RITMO conductor: Open FPGA control sub-project for Fluorescence Activated (Microfluidic) Droplet Sorting (FADS) 
This repository addresses an aspect of microfluidic droplet sorting: The real-time computation solution for fluorescnece signal analysis, based on a FPGA-chip, here on board a small affordable computer with web-server, the RedPitaya. For a more general discussion of Fluorescence Activated (Microfluidic) Droplet Sorting (FADS), see the Open Microfluidics repository, with emphasis on the measurement hardware. FADS is the keystone method of high-throughput droplet microfluidic biological assays.
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Approach and platform choice
The overaching aim of this project is to open up microfluidic experimentation, by creating a prototype instrument that is based on connectable, open source hardware, modern and low-cost components (such as RasberriPi, Adrunio, 3D printing, on-board components, open or at least accessible design software and operation software especially python). A key design element for this purpose is that the hardware and sorftware design is easy to understand and modify for most interested scientists, in contrast to many efforts in current Open Source FPGA development, which need substantive developer expertise. Currently, similar solutions in the lab come either in a "black-box instrument" as a commercial closed-source and non-modyfiable solution, or are assembled by scientists based on National Instruments FPGA cards with user-friendly yet obscure, expensive and closed-source LabView software libraries. Both solutions are not satisfying for the budget or modifyability of most academic labs in the world.
After much consideration, we chose to base our development on the RedPitaya computer board. Even though the FPGA chip itself and the compilation software of the Verilog code to program the FPGA are NOT Open Source, the RedPitaya board design is Open Source and cultivates an extensive academia-development-targeted Open Source software and tutorial framework. The board (here STEMlab 125-14) can also be purchased for ca. 300$ and contains a full linux computer with webserver, similar to the popular (non-FPGA) RasperriPi computer. Most importantly, it has two fast analogue input and output ports that are needed for droplet signal detection and sorting triggering. It is therefore a very accessible starting point. We have based our actual FPGA coding on the Open Source Python library pyrpl.
Note, the RedPitaya now has an X-Channel product where single board computers can be stacked to expand the number of analogue input and output channels. We already have a 6-input channel version now and will soon be looking to adjust the software to work with 6 sensors in parallel.
The documentation of work on this project can be found on this repositorie's wiki.
It contains:
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A description of our development environment,
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Detail on the workflow for FADS including the Verilog code for the sorting trigger,
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A first GUI architecture to look at signals and results,
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And detail on memory access - how to save results back into the memory of the main computer for web-server access.
You're free to fork the project and enhance it. If you have any suggestions to improve it or add any additional functions make a pull-request or open an issue. For interactions in our team and with the community applies the GOSH Code of Conduct.
We would be particularly excited about extensions such as: Simplify the pyprl library fork to the needed tools in this context; further development of the GUI for the user/experimentor and to change the sorting parameters; collecting custom droplet sorting challenges not currently well addressed by exsisting literature examples; extension to more-dimensional questions (boards with more fast analougue inputs-outputs, sorting based on spectral analysis with detector array, sorting based on 2D detector arrays such as imaging detectors, sorting with additional sensor to verify positive sorting events, etc.).
CERN OHL 2W © Nicolas Peschke and Tobias Wenzel. This project is Open Source Hardware - please acknowledge us when using the hardware or sharing modifications.