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fix: clearify that mip.{MSIP, MTIP} are read-only #108

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merged 1 commit into from
Aug 14, 2022

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luojia65
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@luojia65 luojia65 commented Aug 14, 2022

closes #62

In RISC-V privileged specification, it says:

Bits mip.MTIP and mie.MTIE are the interrupt-pending and interrupt-enable bits for machine timer interrupts. MTIP is read-only in mip, and is cleared by writing to the memory-mapped machine-mode timer compare register.

Bits mip.MSIP and mie.MSIE are the interrupt-pending and interrupt-enable bits for machine-level software interrupts. MSIP is read-only in mip, and is written by accesses to memory-mapped control registers, which are used by remote harts to provide machine-level interprocessor interrupts.

indicated by the specification, mip.MSIP and mip.MTIP bits are read-only. This pull request clearifies this by removing {set, clear}_{msoft, mtimer} functions from mip module of riscv crate.

@luojia65 luojia65 requested a review from a team as a code owner August 14, 2022 02:20
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nice find. thanks!

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bors r+

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bors bot commented Aug 14, 2022

@bors bors bot merged commit 98ae3aa into rust-embedded:master Aug 14, 2022
romancardenas pushed a commit that referenced this pull request Nov 17, 2023
108: update to riscv 0.10 r=dkhayes117 a=tfx2001

In `svd2rust` 0.24.2, require `critial-section` feature of `riscv` 0.10.0 to use the `Peripheral::take()`. So update `riscv` to 0.10 avoid link error.

```text
  = note: rust-lld: error: undefined symbol: _critical_section_1_0_release
          >>> referenced by lib.rs:197 (C:\***\.cargo\registry\src\github.51.al-1ecc6299db9ec823\critical-section-1.1.1\src/lib.rs:197)
          >>>               C:\***\target\riscv32imac-unknown-none-elf\debug\deps\blink-38e172683ad1eb45.21kbt3gcucoa48u6.rcgu.o:(core::ptr::drop_in_place$LT$critical_section..with..Guard$GT$::h47fa1a207a83c94b)

          rust-lld: error: undefined symbol: _critical_section_1_0_acquire
          >>> referenced by lib.rs:180 (C:\***\.cargo\registry\src\github.51.al-1ecc6299db9ec823\critical-section-1.1.1\src/lib.rs:180)
          >>>               C:\***\target\riscv32imac-unknown-none-elf\debug\deps\blink-38e172683ad1eb45.54bke7unpav17a81.rcgu.o:(critical_section::with::h3ba86eebd468f130)
```

Co-authored-by: tfx2001 <tfx2001@outlook.com>
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The MTIP bit in mip register is read-only
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