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mbedtls: Disable MD5, SHA1, SHA256 HW ACC for STM32F439xI #5080

Merged
merged 1 commit into from
Sep 21, 2017
Merged

mbedtls: Disable MD5, SHA1, SHA256 HW ACC for STM32F439xI #5080

merged 1 commit into from
Sep 21, 2017

Commits on Sep 12, 2017

  1. mbedtls: Disable MD5, SHA1, SHA256 HW ACC for STM32F439xI 

    STM32F439xI-family MD5, SHA1 and SHA256 hardware acceleration
occasionally produces incorrect output (ARMmbed#5079).

Don't enable MD5, SHA1 and SHA256 HW acceleration on STM32F439xI-family
targets by default until issue ARMmbed#5079 is fixed.
    Andres Amaya Garcia committed Sep 12, 2017
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