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mbedtls: Disable MD5, SHA1, SHA256 HW ACC for STM32F439xI #5080
mbedtls: Disable MD5, SHA1, SHA256 HW ACC for STM32F439xI #5080
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STM32F439xI-family MD5, SHA1 and SHA256 hardware acceleration occasionally produces incorrect output (ARMmbed#5079). Don't enable MD5, SHA1 and SHA256 HW acceleration on STM32F439xI-family targets by default until issue ARMmbed#5079 is fixed.
@andresag01 What is the impact of just disabling these ? |
Should we be aiming to get this in for 5.6 RC2 ? |
@adbridge: The impact of disabling this is a potential decrease in performance and possibly an increase in code size, etc in targets that are using this acceleration code as disabling it just means that we will be using the default mbed TLS software implementation. Of course, this PR is only a workaround and I am currently working with @adustm to assess the full impact of the issue in #5079 and #4928. I hope this is clear. However, it would also be beneficial if @RonEld, @yanesca, @sbutcher-arm take a look at these changes. |
@andresag01 #5018 - this PR fixes the issues (it was already reviewed by you and @yanesca ), deprecate this fix? Is that correct? please let us know the status of this PR, as this has critical in the description, I would like to an answer for this asap cc @adustm |
Hello @0xc0170 |
/morph test-nightly |
Result: SUCCESSYour command has finished executing! Here's what you wrote!
OutputAll builds and test passed! |
Critical workaround to issue #5079.
STM32F439xI-family MD5, SHA1 and SHA256 hardware acceleration
occasionally produces incorrect output (#5079).
Don't enable MD5, SHA1 and SHA256 HW acceleration on STM32F439xI-family
targets by default until issue #5079 is fixed.
Status
READY for REVIEW as WORKAROUND