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[InstCombine] Optimize (select %x, op(%x), 0) to op(%x) for operations where op(0) == 0 #147605

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[InstCombine] Optimize (select %x, op(%x), 0) to op(%x) for operations where op(0) == 0 #147605

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31d8680
Add tests for cases with (select %x, op(%x), 0) for operations where …
Jul 1, 2025
7a12f56
[InstCombine] Optimize (select %x, op(%x), 0) to op(%x) for operation…
Jul 1, 2025
ef056de
Reorder so that matching occurs before any data extraction
bababuck Jul 9, 2025
e08d66e
Use m_c_Intrinsic<Intrinisic::umin> instead of m_c_UMin
bababuck Jul 9, 2025
ed88808
Remove FIXED-ZERO prefix from select-fixed-zero.ll
bababuck Jul 9, 2025
252d55f
Don't match with `shl`, `ashr`, and `ashl` because if the `shfamt` is…
bababuck Jul 9, 2025
09536bb
Don't match with `udiv` and `sdiv` because if the denominator is 0 we…
bababuck Jul 9, 2025
2cdf85f
Add tests for URem and SRem
bababuck Jul 10, 2025
91810fa
Add back in SDiv/UDiv/URem/SRem, but don't freeze them
bababuck Jul 10, 2025
6b59964
[Analysis] Check if the shift amount is an argument with a range when…
bababuck Jul 11, 2025
3b1a350
Remove old FIXED-ZERO labels from select-fixed-zero.ll
bababuck Jul 11, 2025
9b75cf8
Add tests for shl/ashr/lshr with noundef-range defined shamt's
bababuck Jul 10, 2025
3d674ae
Combine Shl/AShr/LShr if the shamt is garunteed to not be poison
bababuck Jul 10, 2025
2de452b
Add test for testing legal shift amounts that are instructions
bababuck Jul 11, 2025
d01d1f2
[Analysis] Consider instructions with known bits when determining the…
bababuck Jul 11, 2025
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19 changes: 19 additions & 0 deletions llvm/lib/Analysis/ValueTracking.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -7318,6 +7318,25 @@ bool llvm::isOverflowIntrinsicNoWrap(const WithOverflowInst *WO,

/// Shifts return poison if shiftwidth is larger than the bitwidth.
static bool shiftAmountKnownInRange(const Value *ShiftAmount) {
auto *A = dyn_cast<Argument>(ShiftAmount);
if (A) {
auto Range = A->getRange();
if (Range && Range->getUnsignedMax().ult(
ShiftAmount->getType()->getIntegerBitWidth())) {
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This should use getScalarSizeInBits(), otherwise it will crash for vector shifts. Same below.

return true;
}
}

const Instruction *I = dyn_cast<Instruction>(ShiftAmount);
if (I) {
const DataLayout &DL = I->getDataLayout();
KnownBits Known = computeKnownBits(ShiftAmount, DL);
if (Known.getMaxValue().ult(ShiftAmount->getType()->getIntegerBitWidth())) {
return true;
}
return false;
}

auto *C = dyn_cast<Constant>(ShiftAmount);
if (!C)
return false;
Expand Down
47 changes: 39 additions & 8 deletions llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -878,7 +878,11 @@ static Instruction *foldSetClearBits(SelectInst &Sel,
// is a vector consisting of 0 and undefs. If a constant compared with x
// is a scalar undefined value or undefined vector then an expression
// should be already folded into a constant.
static Instruction *foldSelectZeroOrMul(SelectInst &SI, InstCombinerImpl &IC) {
//
// This also holds all operations such that Op(0) == 0
// e.g. Shl, Umin, etc
static Instruction *foldSelectZeroOrFixedOp(SelectInst &SI,
InstCombinerImpl &IC) {
auto *CondVal = SI.getCondition();
auto *TrueVal = SI.getTrueValue();
auto *FalseVal = SI.getFalseValue();
Expand All @@ -900,10 +904,31 @@ static Instruction *foldSelectZeroOrMul(SelectInst &SI, InstCombinerImpl &IC) {
// non-zero elements that are masked by undef elements in the compare
// constant.
auto *TrueValC = dyn_cast<Constant>(TrueVal);
if (TrueValC == nullptr ||
!match(FalseVal, m_c_Mul(m_Specific(X), m_Value(Y))) ||
!isa<Instruction>(FalseVal))
if (TrueValC == nullptr || !isa<Instruction>(FalseVal))
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Crash reproducer:

; bin/opt -passes=instcombine test.ll -S
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"

define <2 x i64> @php_url_encode_impl(i32 %0, ptr %p) {
  %2 = load <2 x i64>, ptr %p, align 16
  %.not = icmp eq i32 %0, 0
  %spec.select = select i1 %.not, <2 x i64> zeroinitializer, <2 x i64> %2
  ret <2 x i64> %spec.select
}

opt: /home/dtcxzyw/WorkSpace/Projects/compilers/llvm-project/llvm/lib/IR/Constants.cpp:823: static llvm::Constant* llvm::Constant::mergeUndefsWith(llvm::Constant*, llvm::Constant*): Assertion `isa<FixedVectorType>(Other->getType()) && cast<FixedVectorType>(Other->getType())->getNumElements() == NumElts && "Type mismatch"' failed.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.      Program arguments: bin/opt -passes=instcombine reduced.ll -S
1.      Running pass "function(instcombine<max-iterations=1;verify-fixpoint>)" on module "reduced.ll"
2.      Running pass "instcombine<max-iterations=1;verify-fixpoint>" on function "php_url_encode_impl"
 #0 0x0000727c5de283e2 llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/home/dtcxzyw/WorkSpace/Projects/compilers/LLVM/llvm-build/bin/../lib/libLLVMSupport.so.21.0git+0x2283e2)
 #1 0x0000727c5de249ef llvm::sys::RunSignalHandlers() (/home/dtcxzyw/WorkSpace/Projects/compilers/LLVM/llvm-build/bin/../lib/libLLVMSupport.so.21.0git+0x2249ef)
 #2 0x0000727c5de24b34 SignalHandler(int, siginfo_t*, void*) Signals.cpp:0:0
 #3 0x0000727c5d845330 (/lib/x86_64-linux-gnu/libc.so.6+0x45330)
 #4 0x0000727c5d89eb2c __pthread_kill_implementation ./nptl/pthread_kill.c:44:76
 #5 0x0000727c5d89eb2c __pthread_kill_internal ./nptl/pthread_kill.c:78:10
 #6 0x0000727c5d89eb2c pthread_kill ./nptl/pthread_kill.c:89:10
 #7 0x0000727c5d84527e raise ./signal/../sysdeps/posix/raise.c:27:6
 #8 0x0000727c5d8288ff abort ./stdlib/abort.c:81:7
 #9 0x0000727c5d82881b _nl_load_domain ./intl/loadmsgcat.c:1177:9
#10 0x0000727c5d83b517 (/lib/x86_64-linux-gnu/libc.so.6+0x3b517)
#11 0x0000727c54587344 llvm::Constant::mergeUndefsWith(llvm::Constant*, llvm::Constant*) (/home/dtcxzyw/WorkSpace/Projects/compilers/LLVM/llvm-build/bin/../lib/../lib/libLLVMCore.so.21.0git+0x187344)
#12 0x0000727c55969950 foldSelectZeroOrFixedOp(llvm::SelectInst&, llvm::InstCombinerImpl&) InstCombineSelect.cpp:0:0
#13 0x0000727c559709d0 llvm::InstCombinerImpl::visitSelectInst(llvm::SelectInst&) (/home/dtcxzyw/WorkSpace/Projects/compilers/LLVM/llvm-build/bin/../lib/../lib/libLLVMInstCombine.so.21.0git+0x16f9d0)
#14 0x0000727c55869c18 llvm::InstCombinerImpl::run() (/home/dtcxzyw/WorkSpace/Projects/compilers/LLVM/llvm-build/bin/../lib/../lib/libLLVMInstCombine.so.21.0git+0x68c18)
#15 0x0000727c5586ad7f combineInstructionsOverFunction(llvm::Function&, llvm::InstructionWorklist&, llvm::AAResults*, llvm::AssumptionCache&, llvm::TargetLibraryInfo&, llvm::TargetTransformInfo&, llvm::DominatorTree&, llvm::OptimizationRemarkEmitter&, llvm::BlockFrequencyInfo*, llvm::BranchProbabilityInfo*, llvm::ProfileSummaryInfo*, llvm::InstCombineOptions const&) InstructionCombining.cpp:0:0
#16 0x0000727c5586bde4 llvm::InstCombinePass::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) (/home/dtcxzyw/WorkSpace/Projects/compilers/LLVM/llvm-build/bin/../lib/../lib/libLLVMInstCombine.so.21.0git+0x6ade4)
#17 0x0000727c57daa635 llvm::detail::PassModel<llvm::Function, llvm::InstCombinePass, llvm::AnalysisManager<llvm::Function>>::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) (/home/dtcxzyw/WorkSpace/Projects/compilers/LLVM/llvm-build/bin/../lib/../lib/libPolly.so.21.0git+0x1aa635)
#18 0x0000727c54733a15 llvm::PassManager<llvm::Function, llvm::AnalysisManager<llvm::Function>>::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) (/home/dtcxzyw/WorkSpace/Projects/compilers/LLVM/llvm-build/bin/../lib/../lib/libLLVMCore.so.21.0git+0x333a15)
#19 0x0000727c5c8da9b5 llvm::detail::PassModel<llvm::Function, llvm::PassManager<llvm::Function, llvm::AnalysisManager<llvm::Function>>, llvm::AnalysisManager<llvm::Function>>::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) (/home/dtcxzyw/WorkSpace/Projects/compilers/LLVM/llvm-build/bin/../lib/../lib/libLLVMX86CodeGen.so.21.0git+0xda9b5)
#20 0x0000727c54733e12 llvm::ModuleToFunctionPassAdaptor::run(llvm::Module&, llvm::AnalysisManager<llvm::Module>&) (/home/dtcxzyw/WorkSpace/Projects/compilers/LLVM/llvm-build/bin/../lib/../lib/libLLVMCore.so.21.0git+0x333e12)
#21 0x0000727c5c8db375 llvm::detail::PassModel<llvm::Module, llvm::ModuleToFunctionPassAdaptor, llvm::AnalysisManager<llvm::Module>>::run(llvm::Module&, llvm::AnalysisManager<llvm::Module>&) (/home/dtcxzyw/WorkSpace/Projects/compilers/LLVM/llvm-build/bin/../lib/../lib/libLLVMX86CodeGen.so.21.0git+0xdb375)
#22 0x0000727c54734fed llvm::PassManager<llvm::Module, llvm::AnalysisManager<llvm::Module>>::run(llvm::Module&, llvm::AnalysisManager<llvm::Module>&) (/home/dtcxzyw/WorkSpace/Projects/compilers/LLVM/llvm-build/bin/../lib/../lib/libLLVMCore.so.21.0git+0x334fed)
#23 0x0000727c5df8e309 llvm::runPassPipeline(llvm::StringRef, llvm::Module&, llvm::TargetMachine*, llvm::TargetLibraryInfoImpl*, llvm::ToolOutputFile*, llvm::ToolOutputFile*, llvm::ToolOutputFile*, llvm::StringRef, llvm::ArrayRef<llvm::PassPlugin>, llvm::ArrayRef<std::function<void (llvm::PassBuilder&)>>, llvm::opt_tool::OutputKind, llvm::opt_tool::VerifierKind, bool, bool, bool, bool, bool, bool, bool) (/home/dtcxzyw/WorkSpace/Projects/compilers/LLVM/llvm-build/bin/../lib/libLLVMOptDriver.so.21.0git+0x2d309)
#24 0x0000727c5df994c2 optMain (/home/dtcxzyw/WorkSpace/Projects/compilers/LLVM/llvm-build/bin/../lib/libLLVMOptDriver.so.21.0git+0x384c2)
#25 0x0000727c5d82a1ca __libc_start_call_main ./csu/../sysdeps/nptl/libc_start_call_main.h:74:3
#26 0x0000727c5d82a28b call_init ./csu/../csu/libc-start.c:128:20
#27 0x0000727c5d82a28b __libc_start_main ./csu/../csu/libc-start.c:347:5
#28 0x000059b9a636b095 _start (bin/opt+0x1095)
Aborted (core dumped)

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Thanks.

The issue was that I moved the pattern match to the end of the function. However, one side effect of the pattern match is that it guarantees that the types of TrueV and the Conditional constant Match which is assumed to be true by:

auto *MergedC = Constant::mergeUndefsWith(TrueValC, ZeroC);

Reordering to perform the pattern matching where it was before this MR solved this issue.

return nullptr;

bool FreezeY;
if (match(FalseVal, m_c_Mul(m_Specific(X), m_Value(Y))) ||
match(FalseVal, m_c_And(m_Specific(X), m_Value(Y))) ||
match(FalseVal, m_FShl(m_Specific(X), m_Specific(X), m_Value(Y))) ||
match(FalseVal, m_FShr(m_Specific(X), m_Specific(X), m_Value(Y))) ||
match(FalseVal,
m_c_Intrinsic<Intrinsic::umin>(m_Specific(X), m_Value(Y)))) {
FreezeY = true;
} else if (match(FalseVal, m_SDiv(m_Specific(X), m_Value(Y))) ||
match(FalseVal, m_UDiv(m_Specific(X), m_Value(Y))) ||
match(FalseVal, m_SRem(m_Specific(X), m_Value(Y))) ||
match(FalseVal, m_URem(m_Specific(X), m_Value(Y)))) {
FreezeY = false;
} else if ((match(FalseVal, m_Shl(m_Specific(X), m_Value(Y))) ||
match(FalseVal, m_AShr(m_Specific(X), m_Value(Y))) ||
match(FalseVal, m_LShr(m_Specific(X), m_Value(Y)))) &&
!canCreateUndefOrPoison(dyn_cast<Operator>(FalseVal)) &&
isGuaranteedNotToBePoison(Y)) {
FreezeY = false;
} else {
return nullptr;
}

auto *ZeroC = cast<Constant>(cast<Instruction>(CondVal)->getOperand(1));
auto *MergedC = Constant::mergeUndefsWith(TrueValC, ZeroC);
Expand All @@ -914,9 +939,15 @@ static Instruction *foldSelectZeroOrMul(SelectInst &SI, InstCombinerImpl &IC) {
return nullptr;

auto *FalseValI = cast<Instruction>(FalseVal);
auto *FrY = IC.InsertNewInstBefore(new FreezeInst(Y, Y->getName() + ".fr"),
FalseValI->getIterator());
IC.replaceOperand(*FalseValI, FalseValI->getOperand(0) == Y ? 0 : 1, FrY);
if (FreezeY) {
auto *FrY = IC.InsertNewInstBefore(new FreezeInst(Y, Y->getName() + ".fr"),
FalseValI->getIterator());
IC.replaceOperand(*FalseValI,
FalseValI->getOperand(0) == Y
? 0
: (FalseValI->getOperand(1) == Y ? 1 : 2),
FrY);
}
return IC.replaceInstUsesWith(SI, FalseValI);
}

Expand Down Expand Up @@ -4104,7 +4135,7 @@ Instruction *InstCombinerImpl::visitSelectInst(SelectInst &SI) {
return Add;
if (Instruction *Or = foldSetClearBits(SI, Builder))
return Or;
if (Instruction *Mul = foldSelectZeroOrMul(SI, *this))
if (Instruction *Mul = foldSelectZeroOrFixedOp(SI, *this))
return Mul;

// Turn (select C, (op X, Y), (op X, Z)) -> (op X, (select C, Y, Z))
Expand Down
7 changes: 3 additions & 4 deletions llvm/test/Transforms/InstCombine/icmp-select.ll
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Expand Up @@ -248,10 +248,9 @@ define i1 @icmp_select_implied_cond_relational_off_by_one(i8 %x, i8 %y) {

define i1 @umin_seq_comparison(i8 %x, i8 %y) {
; CHECK-LABEL: @umin_seq_comparison(
; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i8 [[X:%.*]], 0
; CHECK-NEXT: [[CMP21:%.*]] = icmp ule i8 [[X]], [[Y:%.*]]
; CHECK-NEXT: [[CMP2:%.*]] = select i1 [[CMP1]], i1 true, i1 [[CMP21]]
; CHECK-NEXT: ret i1 [[CMP2]]
; CHECK-NEXT: [[Y:%.*]] = freeze i8 [[Y1:%.*]]
; CHECK-NEXT: [[CMP21:%.*]] = icmp ule i8 [[X:%.*]], [[Y]]
; CHECK-NEXT: ret i1 [[CMP21]]
;
%min = call i8 @llvm.umin.i8(i8 %x, i8 %y)
%cmp1 = icmp eq i8 %x, 0
Expand Down
217 changes: 217 additions & 0 deletions llvm/test/Transforms/InstCombine/select-fixed-zero.ll
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@@ -0,0 +1,217 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -passes=instcombine < %s | FileCheck %s

; (select (icmp x, 0, eq), 0, (umin x, y)) -> (umin x, y)
define i64 @umin_select(i64 %a, i64 %b) {
; CHECK-LABEL: @umin_select(
; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]]
; CHECK-NEXT: [[UMIN:%.*]] = call i64 @llvm.umin.i64(i64 [[A:%.*]], i64 [[B_FR]])
; CHECK-NEXT: ret i64 [[UMIN]]
;
%cond = icmp eq i64 %a, 0
%umin = call i64 @llvm.umin.i64(i64 %a, i64 %b)
%select = select i1 %cond, i64 0, i64 %umin
ret i64 %select
}

; (select (icmp x, 0, eq), 0, (mul x, y)) -> (mul x, y)
define i64 @mul_select(i64 %a, i64 %b) {
; CHECK-LABEL: @mul_select(
; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]]
; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[A:%.*]], [[B_FR]]
; CHECK-NEXT: ret i64 [[MUL]]
;
%cond = icmp eq i64 %a, 0
%mul = mul i64 %a, %b
%select = select i1 %cond, i64 0, i64 %mul
ret i64 %select
}

; (select (icmp x, 0, eq), 0, (shl x, y)) -> (shl x, y)
define i64 @shl_select(i64 %a, i64 noundef range(i64 0, 64) %b) {
; CHECK-LABEL: @shl_select(
; CHECK-NEXT: [[SHL1:%.*]] = shl i64 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: ret i64 [[SHL1]]
;
%cond = icmp eq i64 %a, 0
%shl = shl i64 %a, %b
%select = select i1 %cond, i64 0, i64 %shl
ret i64 %select
}

; (select (icmp x, 0, eq), 0, (shl x, y)) -> (shl x, y)
define i64 @and_shl_select(i64 %a, i64 noundef %b) {
; CHECK-LABEL: @and_shl_select(
; CHECK-NEXT: [[AND:%.*]] = and i64 [[B:%.*]], 15
; CHECK-NEXT: [[SHL:%.*]] = shl i64 [[A:%.*]], [[AND]]
; CHECK-NEXT: ret i64 [[SHL]]
;
%cond = icmp eq i64 %a, 0
%and = and i64 %b, 15
%shl = shl i64 %a, %and
%select = select i1 %cond, i64 0, i64 %shl
ret i64 %select
}

; Don't transform since shl could be poison
define i64 @shl_select_undef(i64 %a, i64 noundef %b) {
; CHECK-LABEL: @shl_select_undef(
; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[A:%.*]], 0
; CHECK-NEXT: [[SHL:%.*]] = shl i64 [[A]], [[B:%.*]]
; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[COND]], i64 0, i64 [[SHL]]
; CHECK-NEXT: ret i64 [[SELECT]]
;
%cond = icmp eq i64 %a, 0
%shl = shl i64 %a, %b
%select = select i1 %cond, i64 0, i64 %shl
ret i64 %select
}

; (select (icmp x, 0, eq), 0, (and x, y)) -> (and x, y)
define i64 @and_select(i64 %a, i64 %b) {
; CHECK-LABEL: @and_select(
; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]]
; CHECK-NEXT: [[AND:%.*]] = and i64 [[A:%.*]], [[B_FR]]
; CHECK-NEXT: ret i64 [[AND]]
;
%cond = icmp eq i64 %a, 0
%and = and i64 %a, %b
%select = select i1 %cond, i64 0, i64 %and
ret i64 %select
}

; (select (icmp x, 0, ne), (ashr x, y), 0) -> (ashr x, y)
define i64 @ashr_select(i64 %a, i64 noundef range(i64 0, 64) %b) {
; CHECK-LABEL: @ashr_select(
; CHECK-NEXT: [[ASHR:%.*]] = ashr i64 [[A:%.*]], [[B_FR:%.*]]
; CHECK-NEXT: ret i64 [[ASHR]]
;
%cond = icmp ne i64 0, %a
%ashr = ashr i64 %a, %b
%select = select i1 %cond, i64 %ashr, i64 0
ret i64 %select
}

; (select (icmp x, 0, ne), (lshr x, y), 0) -> (lshr x, y)
define i64 @lshr_select(i64 %a, i64 noundef range(i64 0, 64) %b) {
; CHECK-LABEL: @lshr_select(
; CHECK-NEXT: [[LSHR:%.*]] = lshr i64 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: ret i64 [[LSHR]]
;
%cond = icmp ne i64 0, %a
%lshr = lshr i64 %a, %b
%select = select i1 %cond, i64 %lshr, i64 0
ret i64 %select
}

; (select (icmp x, 0, eq), 0, fshr(x, x, y)) -> fshr(x, x, y)
define i64 @fshr_select(i64 %a, i64 %b) {
; CHECK-LABEL: @fshr_select(
; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]]
; CHECK-NEXT: [[FSHR:%.*]] = call i64 @llvm.fshr.i64(i64 [[A:%.*]], i64 [[A]], i64 [[B_FR]])
; CHECK-NEXT: ret i64 [[FSHR]]
;
%cond = icmp eq i64 %a, 0
%fshr = call i64 @llvm.fshr.i64(i64 %a, i64 %a, i64 %b)
%select = select i1 %cond, i64 0, i64 %fshr
ret i64 %select
}

; (select (icmp x, 0, eq), 0, (fshl x, x, y)) -> (fshl x, x, y)
define i64 @fshl_select(i64 %a, i64 %b) {
; CHECK-LABEL: @fshl_select(
; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]]
; CHECK-NEXT: [[FSHL:%.*]] = call i64 @llvm.fshl.i64(i64 [[A:%.*]], i64 [[A]], i64 [[B_FR]])
; CHECK-NEXT: ret i64 [[FSHL]]
;
%cond = icmp eq i64 %a, 0
%fshl = call i64 @llvm.fshl.i64(i64 %a, i64 %a, i64 %b)
%select = select i1 %cond, i64 0, i64 %fshl
ret i64 %select
}

; (select (icmp x, 0, eq), 0, (fshr x, z, y)) -> leave as is
define i64 @fshr_select_no_combine(i64 %a, i64 %b, i64 %c) {
; CHECK-LABEL: @fshr_select_no_combine(
; CHECK-NEXT: [[COND:%.*]] = icmp eq i64 [[A:%.*]], 0
; CHECK-NEXT: [[FSHR:%.*]] = call i64 @llvm.fshr.i64(i64 [[A]], i64 [[B:%.*]], i64 [[C:%.*]])
; CHECK-NEXT: [[SELECT:%.*]] = select i1 [[COND]], i64 0, i64 [[FSHR]]
; CHECK-NEXT: ret i64 [[SELECT]]
;
%cond = icmp eq i64 %a, 0
%fshr = call i64 @llvm.fshr.i64(i64 %a, i64 %b, i64 %c)
%select = select i1 %cond, i64 0, i64 %fshr
ret i64 %select
}

; (select (icmp x, 0, eq), 0, (sdiv x, y)) -> (sdiv x, y)
define i64 @sdiv_select(i64 %a, i64 %b) {
; CHECK-LABEL: @sdiv_select(
; CHECK-NEXT: [[DIV:%.*]] = sdiv i64 [[A:%.*]], [[B_FR:%.*]]
; CHECK-NEXT: ret i64 [[DIV]]
;
%cond = icmp eq i64 %a, 0
%div = sdiv i64 %a, %b
%select = select i1 %cond, i64 0, i64 %div
ret i64 %select
}

; (select (icmp x, 0, eq), 0, (udiv x, y)) -> (udiv x, y)
define i64 @udiv_select(i64 %a, i64 %b) {
; CHECK-LABEL: @udiv_select(
; CHECK-NEXT: [[DIV:%.*]] = udiv i64 [[A:%.*]], [[B_FR:%.*]]
; CHECK-NEXT: ret i64 [[DIV]]
;
%cond = icmp eq i64 %a, 0
%div = udiv i64 %a, %b
%select = select i1 %cond, i64 0, i64 %div
ret i64 %select
}

; (select (icmp x, 0, eq), 0, (srem x, y)) -> (srem x, y)
define i64 @srem_select(i64 %a, i64 %b) {
; CHECK-LABEL: @srem_select(
; CHECK-NEXT: [[REM:%.*]] = srem i64 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: ret i64 [[REM]]
;
%cond = icmp eq i64 %a, 0
%rem = srem i64 %a, %b
%select = select i1 %cond, i64 0, i64 %rem
ret i64 %select
}

; (select (icmp x, 0, eq), 0, (urem x, y)) -> (urem x, y)
define i64 @urem_select(i64 %a, i64 %b) {
; CHECK-LABEL: @urem_select(
; CHECK-NEXT: [[REM:%.*]] = urem i64 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: ret i64 [[REM]]
;
%cond = icmp eq i64 %a, 0
%rem = urem i64 %a, %b
%select = select i1 %cond, i64 0, i64 %rem
ret i64 %select
}

; (select (icmp x, 0, eq), 0, (icmp x, 0, slt)) -> (icmp x, 0, slt)
define i1 @icmp_slt_select(i64 %a) {
; CHECK-LABEL: @icmp_slt_select(
; CHECK-NEXT: [[ICMP:%.*]] = icmp slt i64 [[A:%.*]], 0
; CHECK-NEXT: ret i1 [[ICMP]]
;
%cond = icmp eq i64 %a, 0
%icmp = icmp slt i64 %a, 0
%select = select i1 %cond, i1 0, i1 %icmp
ret i1 %select
}

; (select (icmp x, 0, eq), 0, (sub 0, x)) -> (sub 0, x)
define i64 @sub_select(i64 %a) {
; CHECK-LABEL: @sub_select(
; CHECK-NEXT: [[SUB:%.*]] = sub i64 0, [[A:%.*]]
; CHECK-NEXT: ret i64 [[SUB]]
;
%cond = icmp eq i64 %a, 0
%sub = sub i64 0, %a
%select = select i1 %cond, i64 0, i64 %sub
ret i64 %select
}
7 changes: 3 additions & 4 deletions llvm/test/Transforms/InstCombine/select.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -893,10 +893,9 @@ define i32 @test56(i16 %x) {

define i32 @test57(i32 %x, i32 %y) {
; CHECK-LABEL: @test57(
; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: [[DOTAND:%.*]] = select i1 [[TOBOOL]], i32 0, i32 [[AND]]
; CHECK-NEXT: ret i32 [[DOTAND]]
; CHECK-NEXT: [[Y:%.*]] = freeze i32 [[Y1:%.*]]
; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y]]
; CHECK-NEXT: ret i32 [[AND]]
;
%and = and i32 %x, %y
%tobool = icmp eq i32 %x, 0
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