prepare HAL release

us-irs · Sep 30, 2024 · 246b084 · 246b084
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diff --git a/va416xx-hal/CHANGELOG.md b/va416xx-hal/CHANGELOG.md
@@ -8,6 +8,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 # [unreleased]
 
+# [v0.3.0] 2024-30-09
+
 ## Changed
 
 - Improve and fix SPI abstractions. Add new low level interface. The primary SPI constructor now

diff --git a/va416xx-hal/src/uart.rs b/va416xx-hal/src/uart.rs
@@ -895,7 +895,7 @@ impl<Uart: Instance> Tx<Uart> {
     ///
     /// This does not necesarily mean that the FIFO can process another word because it might be
     /// full.
-    /// Use the [Self::read_fifo] function to write a word to the FIFO reliably using the [nb]
+    /// Use the [Self::write_fifo] function to write a word to the FIFO reliably using the [nb]
     /// API.
     #[inline(always)]
     pub fn write_fifo_unchecked(&self, data: u32) {
@@ -948,7 +948,7 @@ impl<Uart: Instance> embedded_io::Write for Tx<Uart> {
 
 /// Serial receiver, using interrupts to offload reading to the hardware.
 ///
-/// You can use [Rx::to_rx_with_irq] to convert a normal [Rx] structure into this structure.
+/// You can use [Rx::into_rx_with_irq] to convert a normal [Rx] structure into this structure.
 /// This structure provides two distinct ways to read the UART RX using interrupts. It should
 /// be noted that the interrupt service routine (ISR) still has to be provided by the user. However,
 /// this structure provides API calls which can be used inside the ISRs to simplify the reading