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stm32h7 flash upload support
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befree2008 committed Jun 20, 2020
1 parent 865ae39 commit 9950f14
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Showing 3 changed files with 12 additions and 46 deletions.
35 changes: 9 additions & 26 deletions src/common.c
Original file line number Diff line number Diff line change
Expand Up @@ -252,7 +252,7 @@
#define FLASH_F4_CR_SNB_MASK 0xf8
#define FLASH_F4_SR_BSY 16

//add by wliang
//STM32H7xx
#define FLASH_H7_CR_LOCK 0
#define FLASH_H7_CR_PG 1
#define FLASH_H7_CR_BER 3
Expand All @@ -267,7 +267,7 @@
#define FLASH_H7_KEYR1 (FLASH_H7_REGS_ADDR + 0x04)
#define FLASH_H7_CR1 (FLASH_H7_REGS_ADDR + 0x0C)
#define FLASH_H7_SR1 (FLASH_H7_REGS_ADDR + 0x10)
//add by wliang




Expand Down Expand Up @@ -357,7 +357,7 @@ static uint32_t read_flash_cr(stlink_t *sl) {

if (sl->flash_type == STLINK_FLASH_TYPE_F4)
reg = FLASH_F4_CR;
else if (sl->flash_type == STLINK_FLASH_TYPE_H7) //add by wliang
else if (sl->flash_type == STLINK_FLASH_TYPE_H7)
reg = FLASH_H7_CR1;
else if (sl->flash_type == STLINK_FLASH_TYPE_L4)
reg = STM32L4_FLASH_CR;
Expand Down Expand Up @@ -412,7 +412,6 @@ static inline unsigned int is_flash_locked(stlink_t *sl) {
} else if (sl->flash_type == STLINK_FLASH_TYPE_WB) {
cr_reg = STM32WB_FLASH_CR;
cr_lock_shift = STM32WB_FLASH_CR_LOCK;
//add by wliang
} else if (sl->flash_type == STLINK_FLASH_TYPE_H7) {
cr_reg = FLASH_H7_CR1;
cr_lock_shift = FLASH_H7_CR_LOCK;
Expand Down Expand Up @@ -451,7 +450,6 @@ static void unlock_flash(stlink_t *sl) {
key_reg = STM32Gx_FLASH_KEYR;
} else if (sl->flash_type == STLINK_FLASH_TYPE_WB) {
key_reg = STM32WB_FLASH_KEYR;
//add by wliang
} else if (sl->flash_type == STLINK_FLASH_TYPE_H7) {
key_reg = FLASH_H7_KEYR1;
} else {
Expand Down Expand Up @@ -504,7 +502,6 @@ static void lock_flash(stlink_t *sl) {
} else if (sl->flash_type == STLINK_FLASH_TYPE_WB) {
cr_reg = STM32WB_FLASH_CR;
cr_lock_shift = STM32WB_FLASH_CR_LOCK;
//add by wliang
} else if (sl->flash_type == STLINK_FLASH_TYPE_H7) {
cr_reg = FLASH_H7_CR1;
cr_lock_shift = FLASH_H7_CR_LOCK;
Expand Down Expand Up @@ -693,7 +690,6 @@ static void set_flash_cr_pg(stlink_t *sl) {
} else if (sl->flash_type == STLINK_FLASH_TYPE_WB) {
cr_reg = STM32WB_FLASH_CR;
x |= (1 << FLASH_CR_PG);
//add by wliang
} else if (sl->flash_type == STLINK_FLASH_TYPE_H7) {
cr_reg = FLASH_H7_CR1;
x |= (1 << FLASH_H7_CR_PG);
Expand Down Expand Up @@ -852,7 +848,6 @@ static void set_flash_cr_strt(stlink_t *sl) {
} else if (sl->flash_type == STLINK_FLASH_TYPE_WB) {
cr_reg = STM32WB_FLASH_CR;
cr_strt = 1 << STM32WB_FLASH_CR_STRT;
//add by wliang
}else if (sl->flash_type == STLINK_FLASH_TYPE_H7) {
cr_reg = FLASH_H7_CR1;
cr_strt = 1 << FLASH_H7_CR_START;
Expand Down Expand Up @@ -890,7 +885,6 @@ static inline uint32_t read_flash_sr(stlink_t *sl) {
sr_reg = STM32Gx_FLASH_SR;
} else if (sl->flash_type == STLINK_FLASH_TYPE_WB) {
sr_reg = STM32WB_FLASH_SR;
//add by wliang
} else if (sl->flash_type == STLINK_FLASH_TYPE_H7) {
sr_reg = FLASH_H7_SR1;
} else {
Expand Down Expand Up @@ -924,7 +918,6 @@ static inline unsigned int is_flash_busy(stlink_t *sl) {
sr_busy_shift = STM32Gx_FLASH_SR_BSY;
} else if (sl->flash_type == STLINK_FLASH_TYPE_WB) {
sr_busy_shift = STM32WB_FLASH_SR_BSY;
//add by wliang
} else if (sl->flash_type == STLINK_FLASH_TYPE_H7) {
sr_busy_shift = FLASH_SR_BSY;
} else {
Expand All @@ -947,8 +940,7 @@ static void wait_flash_busy(stlink_t *sl) {
;
}

// add by wliang

// STM32H7 need check QW flag
static inline unsigned int is_queuewait_flag(stlink_t *sl) {
uint32_t sr_waitflag_shift;
unsigned int res;
Expand Down Expand Up @@ -1030,10 +1022,10 @@ static inline void write_flash_ar2(stlink_t *sl, uint32_t n) {

static inline void write_flash_cr_psiz(stlink_t *sl, uint32_t n) {
uint32_t x = read_flash_cr(sl);
//stm32h7 support
if (sl->flash_type == STLINK_FLASH_TYPE_H7){
x &= ~(0x03 << FLASH_H7_CR_PSIZE);
x |= (n << FLASH_H7_CR_PSIZE);

stlink_write_debug32(sl, FLASH_H7_CR1, x);
return ;
}
Expand All @@ -1055,7 +1047,7 @@ static inline void write_flash_cr_snb(stlink_t *sl, uint32_t n) {
stlink_write_debug32(sl, FLASH_F4_CR, x);
}

//add by wliang
//stm32h7 choose right bank number and sector number
static inline void write_flash_cr_ber_snb(stlink_t *sl, uint32_t n) {
uint32_t x = read_flash_cr(sl);
x |= (n << FLASH_H7_CR_SNB);
Expand Down Expand Up @@ -1142,7 +1134,7 @@ int stlink_chip_id(stlink_t *sl, uint32_t *chip_id) {
ret = stlink_read_debug32(sl, 0xE0042000, chip_id);
if (ret == -1)
return ret;
//add by liang 0x5C001000
//stm32h7 chipid in 0x5C001000
if (*chip_id == 0)
{
ret = stlink_read_debug32(sl, 0x5C001000, chip_id);
Expand Down Expand Up @@ -1192,9 +1184,6 @@ int stlink_load_device_params(stlink_t *sl) {
uint32_t chip_id;
uint32_t flash_size;

// add by wliang
//_stlink_usb_read_all_regs
// add by wliang
stlink_chip_id(sl, &chip_id);
sl->chip_id = chip_id & 0xfff;
/* Fix chip_id for F4 rev A errata , Read CPU ID, as CoreID is the same for F2/F4*/
Expand Down Expand Up @@ -1600,12 +1589,6 @@ void stlink_core_stat(stlink_t *sl) {
}

void stlink_print_data(stlink_t * sl) {

//add by wliang
// printf("data_len = %d 0x%x\n", sl->q_len, sl->q_len);
//add by wliang


if (sl->q_len <= 0 || sl->verbose < UDEBUG)
return;
if (sl->verbose > 2)
Expand Down Expand Up @@ -2598,7 +2581,7 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, uint32_t
return 0;

if ((sl->flash_type == STLINK_FLASH_TYPE_F4) || (sl->flash_type == STLINK_FLASH_TYPE_L4)
|| (sl->flash_type == STLINK_FLASH_TYPE_H7)){ //add by wliang
|| (sl->flash_type == STLINK_FLASH_TYPE_H7)){
/* todo: check write operation */

ILOG("Starting Flash write for F2/F4/L4\n");
Expand Down Expand Up @@ -2657,7 +2640,7 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, uint32_t

printf("size: %u\n", (unsigned int)size);

//add by wliang
//stm32h7 program flash directly
if (sl->flash_type == STLINK_FLASH_TYPE_H7){
size = 32;
wait_QW_busy(sl);
Expand Down
5 changes: 1 addition & 4 deletions src/flash_loader.c
Original file line number Diff line number Diff line change
Expand Up @@ -271,9 +271,7 @@ int stlink_flash_loader_write_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t*
sl->chip_id == STLINK_CHIPID_STM32_F7 ||
sl->chip_id == STLINK_CHIPID_STM32_F7XXXX ||
sl->chip_id == STLINK_CHIPID_STM32_F72XXX ||
// add by wliang
sl->chip_id == STLINK_CHIPID_STM32_H74XXX
// add by wliang
) {
int retval;
retval = loader_v_dependent_assignment(sl,
Expand Down Expand Up @@ -346,7 +344,6 @@ int stlink_flash_loader_run(stlink_t *sl, flash_loader_t* fl, stm32_addr_t targe
if (size % sizeof(uint64_t))
++count;
} else if (sl->flash_type == STLINK_FLASH_TYPE_H7) {
//add by wliang
count = size / sizeof(uint32_t);
if (size % sizeof(uint32_t))
++count;
Expand Down Expand Up @@ -376,7 +373,7 @@ int stlink_flash_loader_run(stlink_t *sl, flash_loader_t* fl, stm32_addr_t targe
// by increasing the sleep-per-round to the same order-of-magnitude as
// the tick-rounding that the OS uses, the wait until the error message is
// reduced to the same order of magnitude as what was intended. -- REW.
#define WAIT_ROUNDS 1000
#define WAIT_ROUNDS 100
/* wait until done (reaches breakpoint) */
for (i = 0; i < WAIT_ROUNDS; i++) {
usleep(1000);
Expand Down
18 changes: 2 additions & 16 deletions src/usb.c
Original file line number Diff line number Diff line change
Expand Up @@ -202,13 +202,11 @@ int _stlink_usb_read_debug32(stlink_t *sl, uint32_t addr, uint32_t *data) {
ssize_t size;
const int rep_len = 8;

//add by wliang
memset(rdata, 0, rep_len);
//add by wliang

int i = fill_command(sl, SG_DXFER_FROM_DEV, rep_len);
cmd[i++] = STLINK_DEBUG_COMMAND;
cmd[i++] = STLINK_JTAG_READDEBUG_32BIT; //0x36
cmd[i++] = STLINK_JTAG_READDEBUG_32BIT;
write_uint32(&cmd[i], addr);
size = send_recv(slu, 1, cmd, slu->cmd_len, rdata, rep_len);
if (size == -1) {
Expand Down Expand Up @@ -333,7 +331,7 @@ int _stlink_usb_core_id(stlink_t * sl) {
if (sl->version.jtag_api == STLINK_JTAG_API_V1) {
cmd[i++] = STLINK_DEBUG_READCOREID;
} else {
cmd[i++] = STLINK_DEBUG_APIV2_READ_IDCODES; //0x31
cmd[i++] = STLINK_DEBUG_APIV2_READ_IDCODES;
}
size = send_recv(slu, 1, cmd, slu->cmd_len, data, rep_len);
if (size == -1) {
Expand Down Expand Up @@ -738,12 +736,6 @@ int _stlink_usb_read_reg(stlink_t *sl, int r_idx, struct stlink_reg *regp) {
} else {
cmd[i++] = STLINK_DEBUG_APIV2_READREG;
}
// cmd[i++] = STLINK_DEBUG_APIV2_READ_DAP_REG;
// }
// cmd[i++] = (uint8_t) 0xff;
// cmd[i++] = (uint8_t) 0xff;
// cmd[i++] = (uint8_t) 0x00;
// cmd[i++] = (uint8_t) 0xf8;
cmd[i++] = (uint8_t) r_idx;
size = send_recv(slu, 1, cmd, slu->cmd_len, data, rep_len);

Expand Down Expand Up @@ -956,12 +948,6 @@ int _stlink_usb_write_reg(stlink_t *sl, uint32_t reg, int idx) {
} else {
cmd[i++] = STLINK_DEBUG_APIV2_WRITEREG;
}
// cmd[i++] = STLINK_DEBUG_APIV2_WRITE_DAP_REG;
// }
// cmd[i++] = (uint8_t) 0xff;
// cmd[i++] = (uint8_t) 0xff;
// cmd[i++] = (uint8_t) 0x00;
// cmd[i++] = (uint8_t) 0xf8;
cmd[i++] = idx;
write_uint32(&cmd[i], reg);
size = send_recv(slu, 1, cmd, slu->cmd_len, data, rep_len);
Expand Down

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