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[hardware] Adapt MemPool to the new icache interface
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SamuelRiedel committed Aug 15, 2024
1 parent 06cb9f1 commit 46adb3b
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Showing 4 changed files with 8 additions and 7 deletions.
4 changes: 2 additions & 2 deletions Bender.lock
Original file line number Diff line number Diff line change
Expand Up @@ -16,8 +16,8 @@ packages:
- common_verification
- tech_cells_generic
cluster_icache:
revision: 9520b991d78f95c0384d7d9531c5ae01dd791530
version: null
revision: 0e1fb6751d9684d968ba7fb40836e6118b448ecd
version: 0.1.1
source:
Git: https://github.com/pulp-platform/cluster_icache.git
dependencies:
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2 changes: 1 addition & 1 deletion Bender.yml
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Expand Up @@ -15,7 +15,7 @@ dependencies:
snitch: { path: "hardware/deps/snitch" }
tech_cells_generic: { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.13 }
fpnew: { git: "https://github.com/pulp-platform/cvfpu.git", rev: pulp-v0.1.3 }
cluster_icache: { git: "https://github.com/pulp-platform/cluster_icache.git", rev: 9520b991d78f95c0384d7d9531c5ae01dd791530 }
cluster_icache: { git: "https://github.com/pulp-platform/cluster_icache.git", version: 0.1.1 }

workspace:
checkout_dir: "./hardware/deps"
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4 changes: 2 additions & 2 deletions hardware/scripts/questa/wave_cache.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@ if {$config == {terapool}} {
add wave -noupdate -group cache[$1][$2][$3][$4] -group refill[$i] /mempool_tb/dut/i_mempool_cluster/gen_groups[$1]/gen_rtl_group/i_group/gen_sub_groups[$2]/gen_rtl_sg/i_sub_group/gen_tiles[$3]/i_tile/gen_caches[$4]/i_snitch_icache/gen_prefetcher[$i]/i_snitch_icache_l0/*
}

add wave -noupdate -group cache[$1][$2][$3][$4] -group lookup /mempool_tb/dut/i_mempool_cluster/gen_groups[$1]/gen_rtl_group/i_group/gen_sub_groups[$2]/gen_rtl_sg/i_sub_group/gen_tiles[$3]/i_tile/gen_caches[$4]/i_snitch_icache/i_lookup/*
add wave -noupdate -group cache[$1][$2][$3][$4] -group lookup /mempool_tb/dut/i_mempool_cluster/gen_groups[$1]/gen_rtl_group/i_group/gen_sub_groups[$2]/gen_rtl_sg/i_sub_group/gen_tiles[$3]/i_tile/gen_caches[$4]/i_snitch_icache/gen_serial_lookup/i_lookup/*
add wave -noupdate -group cache[$1][$2][$3][$4] -group handler /mempool_tb/dut/i_mempool_cluster/gen_groups[$1]/gen_rtl_group/i_group/gen_sub_groups[$2]/gen_rtl_sg/i_sub_group/gen_tiles[$3]/i_tile/gen_caches[$4]/i_snitch_icache/i_handler/*
add wave -noupdate -group cache[$1][$2][$3][$4] -group handler /mempool_tb/dut/i_mempool_cluster/gen_groups[$1]/gen_rtl_group/i_group/gen_sub_groups[$2]/gen_rtl_sg/i_sub_group/gen_tiles[$3]/i_tile/gen_caches[$4]/i_snitch_icache/i_handler/pending_q
add wave -noupdate -group cache[$1][$2][$3][$4] -group refill /mempool_tb/dut/i_mempool_cluster/gen_groups[$1]/gen_rtl_group/i_group/gen_sub_groups[$2]/gen_rtl_sg/i_sub_group/gen_tiles[$3]/i_tile/gen_caches[$4]/i_snitch_icache/i_refill/*
Expand All @@ -48,7 +48,7 @@ if {$config == {terapool}} {
add wave -noupdate -group cache[$1][$2][$3] -group refill[$i] /mempool_tb/dut/i_mempool_cluster/gen_groups[$1]/i_group/gen_tiles[$2]/i_tile/gen_caches[$3]/i_snitch_icache/gen_prefetcher[$i]/i_snitch_icache_l0/*
}

add wave -noupdate -group cache[$1][$2][$3] -group lookup /mempool_tb/dut/i_mempool_cluster/gen_groups[$1]/i_group/gen_tiles[$2]/i_tile/gen_caches[$3]/i_snitch_icache/i_lookup/*
add wave -noupdate -group cache[$1][$2][$3] -group lookup /mempool_tb/dut/i_mempool_cluster/gen_groups[$1]/i_group/gen_tiles[$2]/i_tile/gen_caches[$3]/i_snitch_icache/gen_serial_lookup/i_lookup/*
add wave -noupdate -group cache[$1][$2][$3] -group handler /mempool_tb/dut/i_mempool_cluster/gen_groups[$1]/i_group/gen_tiles[$2]/i_tile/gen_caches[$3]/i_snitch_icache/i_handler/*
add wave -noupdate -group cache[$1][$2][$3] -group handler /mempool_tb/dut/i_mempool_cluster/gen_groups[$1]/i_group/gen_tiles[$2]/i_tile/gen_caches[$3]/i_snitch_icache/i_handler/pending_q
add wave -noupdate -group cache[$1][$2][$3] -group refill /mempool_tb/dut/i_mempool_cluster/gen_groups[$1]/i_group/gen_tiles[$2]/i_tile/gen_caches[$3]/i_snitch_icache/i_refill/*
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5 changes: 3 additions & 2 deletions hardware/src/mempool_tile.sv
Original file line number Diff line number Diff line change
Expand Up @@ -298,7 +298,8 @@ module mempool_tile
.FETCH_DW (DataWidth ),
.FILL_AW (AddrWidth ),
.FILL_DW (AxiDataWidth ),
.FETCH_PRIORITY (0 ),
.FETCH_PRIORITY (1 ),
.MERGE_FETCHES (1 ),
.SERIAL_LOOKUP (1 ),
.L1_TAG_SCM (1 ),
.NUM_AXI_OUTSTANDING(8 ),
Expand All @@ -316,7 +317,7 @@ module mempool_tile
.rst_ni (rst_ni ),
.enable_prefetching_i (1'b1 ),
.icache_events_o (/* Unused */ ),
.flush_valid_i (1'b0 ),
.flush_valid_i ({NumCoresPerCache{1'b0}}),
.flush_ready_o (/* Unused */ ),
.inst_addr_i (snitch_inst_addr[c] ),
.inst_data_o (snitch_inst_data[c] ),
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