-
Notifications
You must be signed in to change notification settings - Fork 44
Commit
This commit does not belong to any branch on this repository, and may belong to a fork outside of the repository.
[hardware] Add generated control registers
- Loading branch information
1 parent
e423768
commit 2b27038
Showing
22 changed files
with
1,758 additions
and
226 deletions.
There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,98 @@ | ||
diff --git a/hardware/deps/register_interface/vendor/lowrisc_opentitan/util/reggen/reg_pkg.sv.tpl b/hardware/deps/register_interface/vendor/lowrisc_opentitan/util/reggen/reg_pkg.sv.tpl | ||
index 1c5520a..77619d9 100644 | ||
--- a/hardware/deps/register_interface/vendor/lowrisc_opentitan/util/reggen/reg_pkg.sv.tpl | ||
+++ b/hardware/deps/register_interface/vendor/lowrisc_opentitan/util/reggen/reg_pkg.sv.tpl | ||
@@ -1,6 +1,6 @@ | ||
-// Copyright lowRISC contributors. | ||
-// Licensed under the Apache License, Version 2.0, see LICENSE for details. | ||
-// SPDX-License-Identifier: Apache-2.0 | ||
+// Copyright 2024 ETH Zurich and University of Bologna. | ||
+// Solderpad Hardware License, Version 0.51, see LICENSE for details. | ||
+// SPDX-License-Identifier: SHL-0.51 | ||
// | ||
// Register Package auto-generated by `reggen` containing data structure | ||
<% | ||
@@ -344,4 +344,3 @@ ${reg_data_for_iface(iface_name, iface_desc, for_iface, rb)}\ | ||
% endfor | ||
|
||
endpackage | ||
- | ||
diff --git a/hardware/deps/register_interface/vendor/lowrisc_opentitan/util/reggen/reg_top.sv.tpl b/hardware/deps/register_interface/vendor/lowrisc_opentitan/util/reggen/reg_top.sv.tpl | ||
index bfab87f..2b2764e 100644 | ||
--- a/hardware/deps/register_interface/vendor/lowrisc_opentitan/util/reggen/reg_top.sv.tpl | ||
+++ b/hardware/deps/register_interface/vendor/lowrisc_opentitan/util/reggen/reg_top.sv.tpl | ||
@@ -1,6 +1,6 @@ | ||
-// Copyright lowRISC contributors. | ||
-// Licensed under the Apache License, Version 2.0, see LICENSE for details. | ||
-// SPDX-License-Identifier: Apache-2.0 | ||
+// Copyright 2024 ETH Zurich and University of Bologna. | ||
+// Solderpad Hardware License, Version 0.51, see LICENSE for details. | ||
+// SPDX-License-Identifier: SHL-0.51 | ||
// | ||
// Register Top module auto-generated by `reggen` | ||
<% | ||
@@ -534,6 +534,7 @@ ${rdata_gen(f, r.name.lower() + "_" + f.name.lower())}\ | ||
endmodule | ||
|
||
% if use_reg_iface: | ||
+/* verilator lint_off DECLFILENAME */ | ||
module ${mod_name}_intf | ||
#( | ||
parameter int AW = ${addr_width}, | ||
@@ -568,7 +569,7 @@ module ${mod_name}_intf | ||
|
||
reg_bus_req_t s_reg_req; | ||
reg_bus_rsp_t s_reg_rsp; | ||
- | ||
+ | ||
// Assign SV interface to structs | ||
`REG_BUS_ASSIGN_TO_REQ(s_reg_req, regbus_slave) | ||
`REG_BUS_ASSIGN_FROM_RSP(regbus_slave, s_reg_rsp) | ||
@@ -580,9 +581,9 @@ module ${mod_name}_intf | ||
`REG_BUS_ASSIGN_TO_REQ(s_reg_win_req[i], regbus_win_mst[i]) | ||
`REG_BUS_ASSIGN_FROM_RSP(regbus_win_mst[i], s_reg_win_rsp[i]) | ||
end | ||
- | ||
+ | ||
% endif | ||
- | ||
+ | ||
|
||
${mod_name} #( | ||
.reg_req_t(reg_bus_req_t), | ||
@@ -605,11 +606,10 @@ module ${mod_name}_intf | ||
% endif | ||
.devmode_i | ||
); | ||
- | ||
-endmodule | ||
|
||
+endmodule | ||
+/* verilator lint_on DECLFILENAME */ | ||
% endif | ||
- | ||
<%def name="str_bits_sv(bits)">\ | ||
% if bits.msb != bits.lsb: | ||
${bits.msb}:${bits.lsb}\ | ||
diff --git a/hardware/deps/register_interface/vendor/lowrisc_opentitan/util/regtool.py b/hardware/deps/register_interface/vendor/lowrisc_opentitan/util/regtool.py | ||
index f7e117a..767c839 100755 | ||
--- a/hardware/deps/register_interface/vendor/lowrisc_opentitan/util/regtool.py | ||
+++ b/hardware/deps/register_interface/vendor/lowrisc_opentitan/util/regtool.py | ||
@@ -210,7 +210,7 @@ def main(): | ||
found_lunder = None | ||
copy = re.compile(r'.*(copyright.*)|(.*\(c\).*)', re.IGNORECASE) | ||
spdx = re.compile(r'.*(SPDX-License-Identifier:.+)') | ||
- lunder = re.compile(r'.*(Licensed under.+)', re.IGNORECASE) | ||
+ lunder = re.compile(r'.*(Solderpad.*)|(Apache.*)', re.IGNORECASE) | ||
for line in srcfull.splitlines(): | ||
mat = copy.match(line) | ||
if mat is not None: | ||
@@ -225,7 +225,7 @@ def main(): | ||
src_lic = found_lunder | ||
if found_spdx: | ||
if src_lic is None: | ||
- src_lic = '\n' + found_spdx | ||
+ src_lic = found_spdx | ||
else: | ||
src_lic += '\n' + found_spdx | ||
|
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,32 @@ | ||
# Copyright 2024 ETH Zurich and University of Bologna. | ||
# Solderpad Hardware License, Version 0.51, see LICENSE for details. | ||
# SPDX-License-Identifier: SHL-0.51 | ||
|
||
# Samuel Riedel <sriedel@iis.ee.ethz.ch> | ||
|
||
SHELL = /usr/bin/env bash | ||
ROOT_DIR := $(patsubst %/,%, $(dir $(abspath $(lastword $(MAKEFILE_LIST))))) | ||
RUNTIME_DIR := $(abspath $(ROOT_DIR)/../../../software/runtime) | ||
|
||
regtool ?= $(abspath $(ROOT_DIR)/../../deps/register_interface/vendor/lowrisc_opentitan/util/regtool.py) | ||
|
||
RTL := $(patsubst $(ROOT_DIR)/%.hjson,%,$(shell find $(ROOT_DIR) -name "*.hjson")) | ||
|
||
all: $(RTL)_reg_top.sv $(RUNTIME_DIR)/$(RTL).h | ||
|
||
$(RTL)_reg_top.sv: %_reg_top.sv: %.hjson | ||
$(regtool) $^ -r -t $(ROOT_DIR) | ||
|
||
$(RUNTIME_DIR)/$(RTL).h: $(RUNTIME_DIR)/%.h: %.hjson | ||
$(regtool) $^ -D -o $@ | ||
|
||
$(RTL).html: %.html: %.hjson | ||
$(regtool) $^ -d -o $@ | ||
|
||
clean: | ||
@rm -fv $(RTL)_reg_pkg.sv | ||
@rm -fv $(RTL)_reg_top.sv | ||
@rm -fv $(RTL).html | ||
@rm -fv $(RUNTIME_DIR)/$(RTL).h | ||
|
||
.EXTRA_PREREQS:= $(abspath $(lastword $(MAKEFILE_LIST))) |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,126 @@ | ||
// Copyright 2024 ETH Zurich and University of Bologna. | ||
// Solderpad Hardware License, Version 0.51, see LICENSE for details. | ||
// SPDX-License-Identifier: SHL-0.51 | ||
|
||
{ | ||
name: "control_registers" | ||
clock_primary: "clk_i" | ||
reset_primary: "rst_ni" | ||
bus_interfaces: [ | ||
{ protocol: "reg_iface" | ||
direction: "device" | ||
} | ||
] | ||
param_list: [ | ||
{ name: "ROCacheNumAddrRules", | ||
desc: "Number of programmable address regions for the read-only cache", | ||
type: "int", | ||
default: "4" | ||
}, | ||
{ name: "MAX_NumGroups", | ||
desc: "Maximum number of groups that we support in any configuration", | ||
type: "int", | ||
default: "8" | ||
} | ||
], | ||
regwidth: 32 | ||
registers: [ | ||
{ name: "eoc" | ||
desc: "End-of-Computation Register" | ||
swaccess: "rw" | ||
hwaccess: "hro" | ||
fields: [{ bits: "31:0" }] | ||
}, | ||
{ name: "wake_up" | ||
desc: "Wake Up Register" | ||
swaccess: "wo" | ||
hwaccess: "hro" | ||
hwqe: "true" | ||
fields: [{ bits: "31:0" }] | ||
}, | ||
{ multireg: | ||
{ | ||
name: "wake_up_tile" | ||
desc: "Wake Up Tile Register" | ||
swaccess: "wo" | ||
hwaccess: "hro" | ||
hwqe: "true" | ||
count: "MAX_NumGroups" | ||
cname: "wake_up_tile" | ||
fields: [{ bits: "31:0" }] | ||
}, | ||
}, | ||
{ name: "wake_up_group" | ||
desc: "Wake Up Group Register" | ||
swaccess: "wo" | ||
hwaccess: "hro" | ||
hwqe: "true" | ||
fields: [{ bits: "31:0" }] | ||
}, | ||
{ name: "tcdm_start_address" | ||
desc: "TCDM Start Address Register" | ||
swaccess: "ro" | ||
hwaccess: "hwo" | ||
// External because we want to define the reset from a parameter | ||
hwext: "true" | ||
fields: [{ bits: "31:0" }] | ||
}, | ||
{ name: "tcdm_end_address" | ||
desc: "TCDM End Address Register" | ||
swaccess: "ro" | ||
hwaccess: "hwo" | ||
// External because we want to define the reset from a parameter | ||
hwext: "true" | ||
fields: [{ bits: "31:0" }] | ||
}, | ||
{ name: "nr_cores_reg" | ||
desc: "Number of Cores Register" | ||
swaccess: "ro" | ||
hwaccess: "hwo" | ||
// External because we want to define the reset from a parameter | ||
hwext: "true" | ||
fields: [{ bits: "31:0" }] | ||
}, | ||
{ name: "ro_cache_enable" | ||
desc: "Read-only cache Enable" | ||
swaccess: "rw" | ||
hwaccess: "hro" | ||
resval: "1" | ||
fields: [{ bits: "31:0" }] | ||
}, | ||
{ name: "ro_cache_flush" | ||
desc: "Read-only cache Flush" | ||
swaccess: "rw" | ||
hwaccess: "hro" | ||
fields: [{ bits: "31:0" }] | ||
}, | ||
{ multireg: | ||
{ | ||
name: "ro_cache_start" | ||
desc: "Read-only cache Region Start" | ||
swaccess: "rw" | ||
hwaccess: "hrw" | ||
hwqe: "true" | ||
// External because we want to define the reset from a parameter | ||
hwext: "true" | ||
count: "ROCacheNumAddrRules" | ||
cname: "ro_cache_start" | ||
fields: [{ bits: "31:0" }] | ||
}, | ||
}, | ||
{ multireg: | ||
{ | ||
name: "ro_cache_end" | ||
desc: "Read-only cache Region End" | ||
swaccess: "rw" | ||
hwaccess: "hrw" | ||
hwqe: "true" | ||
// External because we want to define the reset from a parameter | ||
hwext: "true" | ||
count: "ROCacheNumAddrRules" | ||
cname: "ro_cache_end" | ||
fields: [{ bits: "31:0" }] | ||
} | ||
} | ||
] | ||
} |
Oops, something went wrong.