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arch/xtensa/esp32s3: add UART2 support
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This commits adds support of UART2 for EPS32S3 and fixes pin mode
assignment for iomux mode

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
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@pkarashchenko @xiaoxiang781216
pkarashchenko authored and xiaoxiang781216 committed Sep 5, 2023
1 parent 0efd4d0 commit 12ea47b
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Showing 5 changed files with 172 additions and 45 deletions.
7 changes: 7 additions & 0 deletions arch/xtensa/src/esp32s3/esp32s3_config.h
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Original file line number Diff line number Diff line change
Expand Up @@ -52,13 +52,20 @@
#undef CONSOLE_UART
#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_ESP32S3_UART0)
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_UART2_SERIAL_CONSOLE
# define CONSOLE_UART 1
#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_ESP32S3_UART1)
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART2_SERIAL_CONSOLE
# define CONSOLE_UART 1
#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_ESP32S3_UART2)
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
# define CONSOLE_UART 1
#else
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef CONFIG_UART2_SERIAL_CONSOLE
#endif

#ifdef CONFIG_ESP32S3_USBSERIAL
Expand Down
114 changes: 85 additions & 29 deletions arch/xtensa/src/esp32s3/esp32s3_lowputc.c
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Original file line number Diff line number Diff line change
Expand Up @@ -46,11 +46,12 @@
#include "hardware/esp32s3_soc.h"

#include "esp32s3_clockconfig.h"
#include "esp32s3_config.h"
#include "esp32s3_gpio.h"

#include "esp32s3_lowputc.h"

#include "esp32s3_periph.h"

/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
Expand Down Expand Up @@ -142,6 +143,45 @@ struct esp32s3_uart_s g_uart1_config =
};

#endif /* CONFIG_ESP32S3_UART1 */

#ifdef CONFIG_ESP32S3_UART2

struct esp32s3_uart_s g_uart2_config =
{
.periph = ESP32S3_PERIPH_UART2,
.id = 2,
.cpuint = -ENOMEM,
.irq = ESP32S3_IRQ_UART2,
.baud = CONFIG_UART2_BAUD,
.bits = CONFIG_UART2_BITS,
.parity = CONFIG_UART2_PARITY,
.stop_b2 = CONFIG_UART2_2STOP,
.int_pri = ESP32S3_INT_PRIO_DEF,
.txpin = CONFIG_ESP32S3_UART2_TXPIN,
.txsig = U2TXD_OUT_IDX,
.rxpin = CONFIG_ESP32S3_UART2_RXPIN,
.rxsig = U2RXD_IN_IDX,
#ifdef CONFIG_SERIAL_IFLOWCONTROL
.rtspin = CONFIG_ESP32S3_UART2_RTSPIN,
.rtssig = U2RTS_OUT_IDX,
#ifdef CONFIG_UART2_IFLOWCONTROL
.iflow = true, /* input flow control (RTS) enabled */
#else
.iflow = false, /* input flow control (RTS) disabled */
#endif
#endif
#ifdef CONFIG_SERIAL_OFLOWCONTROL
.ctspin = CONFIG_ESP32S3_UART2_CTSPIN,
.ctssig = U2CTS_IN_IDX,
#ifdef CONFIG_UART1_OFLOWCONTROL
.oflow = true, /* output flow control (CTS) enabled */
#else
.oflow = false, /* output flow control (CTS) disabled */
#endif
#endif
};

#endif /* CONFIG_ESP32S3_UART2 */
#endif /* HAVE_UART_DEVICE */

/****************************************************************************
Expand Down Expand Up @@ -399,12 +439,11 @@ void esp32s3_lowputc_set_sclk(const struct esp32s3_uart_s *priv,

uint32_t esp32s3_lowputc_get_sclk(const struct esp32s3_uart_s * priv)
{
uint32_t clk_conf_reg;
uint32_t ret = -ENODATA;
clk_conf_reg = getreg32(UART_CLK_CONF_REG(priv->id));
clk_conf_reg &= UART_SCLK_SEL_M;
clk_conf_reg >>= UART_SCLK_SEL_S;
switch (clk_conf_reg)
uint32_t clk_conf;
uint32_t ret = -ENODATA;

clk_conf = REG_MASK(getreg32(UART_CLK_CONF_REG(priv->id)), UART_SCLK_SEL);
switch (clk_conf)
{
case 1:
ret = esp_clk_apb_freq();
Expand Down Expand Up @@ -432,7 +471,7 @@ uint32_t esp32s3_lowputc_get_sclk(const struct esp32s3_uart_s * priv)
*
****************************************************************************/

void esp32s3_lowputc_baud(const struct esp32s3_uart_s * priv)
void esp32s3_lowputc_baud(const struct esp32s3_uart_s *priv)
{
int sclk_div;
uint32_t sclk_freq;
Expand Down Expand Up @@ -495,7 +534,7 @@ void esp32s3_lowputc_baud(const struct esp32s3_uart_s * priv)
*
****************************************************************************/

void esp32s3_lowputc_normal_mode(const struct esp32s3_uart_s * priv)
void esp32s3_lowputc_normal_mode(const struct esp32s3_uart_s *priv)
{
/* Disable RS485 mode */

Expand All @@ -520,7 +559,7 @@ void esp32s3_lowputc_normal_mode(const struct esp32s3_uart_s * priv)
*
****************************************************************************/

void esp32s3_lowputc_parity(const struct esp32s3_uart_s * priv)
void esp32s3_lowputc_parity(const struct esp32s3_uart_s *priv)
{
if (priv->parity == UART_PARITY_DISABLE)
{
Expand All @@ -547,7 +586,7 @@ void esp32s3_lowputc_parity(const struct esp32s3_uart_s * priv)
*
****************************************************************************/

int esp32s3_lowputc_data_length(const struct esp32s3_uart_s * priv)
int esp32s3_lowputc_data_length(const struct esp32s3_uart_s *priv)
{
int ret = OK;
uint32_t length = priv->bits - 5;
Expand Down Expand Up @@ -608,10 +647,8 @@ void esp32s3_lowputc_stop_length(const struct esp32s3_uart_s *priv)
void esp32s3_lowputc_set_tx_idle_time(const struct esp32s3_uart_s *priv,
uint32_t time)
{
time = time << UART_TX_IDLE_NUM_S;
time = time & UART_TX_IDLE_NUM_M; /* Just in case value overloads */
modifyreg32(UART_IDLE_CONF_REG(priv->id), UART_TX_IDLE_NUM_M,
time);
VALUE_TO_FIELD(time, UART_TX_IDLE_NUM));
}

/****************************************************************************
Expand All @@ -626,10 +663,26 @@ void esp32s3_lowputc_set_tx_idle_time(const struct esp32s3_uart_s *priv,
*
****************************************************************************/

void esp32s3_lowputc_send_byte(const struct esp32s3_uart_s * priv,
void esp32s3_lowputc_send_byte(const struct esp32s3_uart_s *priv,
char byte)
{
putreg32((uint32_t) byte, UART_FIFO_REG(priv->id));
putreg32((uint32_t)byte, UART_FIFO_REG(priv->id));
}

/****************************************************************************
* Name: esp32s3_lowputc_enable_sysclk
*
* Description:
* Enable clock for the UART using the System register.
*
* Parameters:
* priv - Pointer to the private driver struct.
*
****************************************************************************/

void esp32s3_lowputc_enable_sysclk(const struct esp32s3_uart_s *priv)
{
esp32s3_periph_module_enable(PERIPH_UART0_MODULE + priv->id);
}

/****************************************************************************
Expand All @@ -648,13 +701,9 @@ void esp32s3_lowputc_send_byte(const struct esp32s3_uart_s * priv,

bool esp32s3_lowputc_is_tx_fifo_full(const struct esp32s3_uart_s *priv)
{
uint32_t reg;

reg = getreg32(UART_STATUS_REG(priv->id));
reg = reg >> UART_TXFIFO_CNT_S;
reg = reg & UART_TXFIFO_CNT_V;

return !(reg < (UART_TX_FIFO_SIZE - 1));
uint32_t val;
val = REG_MASK(getreg32(UART_STATUS_REG(priv->id)), UART_TXFIFO_CNT);
return val >= (UART_TX_FIFO_SIZE - 1);
}

/****************************************************************************
Expand Down Expand Up @@ -803,10 +852,12 @@ void esp32s3_lowputc_config_pins(const struct esp32s3_uart_s *priv)

if (uart_is_iomux(priv))
{
esp32s3_configgpio(priv->txpin, OUTPUT_FUNCTION_1);
esp32s3_gpio_matrix_out(priv->txpin, SIG_GPIO_OUT_IDX, 0, 0);
esp32s3_configgpio(priv->txpin, priv->id == 1 ? OUTPUT_FUNCTION_3 :
OUTPUT_FUNCTION_1);

esp32s3_configgpio(priv->rxpin, INPUT_FUNCTION_1);
esp32s3_configgpio(priv->rxpin, priv->id == 1 ? INPUT_FUNCTION_3 :
INPUT_FUNCTION_1);
esp32s3_gpio_matrix_out(priv->rxpin, SIG_GPIO_OUT_IDX, 0, 0);

#ifdef CONFIG_SERIAL_IFLOWCONTROL
Expand All @@ -827,8 +878,8 @@ void esp32s3_lowputc_config_pins(const struct esp32s3_uart_s *priv)
}
else
{
esp32s3_configgpio(priv->txpin, OUTPUT_FUNCTION_2);
esp32s3_gpio_matrix_out(priv->txpin, priv->txsig, 0, 0);
esp32s3_configgpio(priv->txpin, OUTPUT_FUNCTION_2);

esp32s3_configgpio(priv->rxpin, INPUT_FUNCTION_2);
esp32s3_gpio_matrix_in(priv->rxpin, priv->rxsig, 0);
Expand Down Expand Up @@ -893,6 +944,8 @@ void xtensa_lowputc(char ch)
struct esp32s3_uart_s *priv = &g_uart0_config;
#elif defined (CONFIG_UART1_SERIAL_CONSOLE)
struct esp32s3_uart_s *priv = &g_uart1_config;
#elif defined (CONFIG_UART2_SERIAL_CONSOLE)
struct esp32s3_uart_s *priv = &g_uart2_config;
#endif

/* Wait until the TX FIFO has space to insert new char */
Expand All @@ -918,15 +971,18 @@ void esp32s3_lowsetup(void)
#ifndef CONFIG_SUPPRESS_UART_CONFIG

#ifdef CONFIG_ESP32S3_UART0

esp32s3_lowputc_enable_sysclk(&g_uart0_config);
esp32s3_lowputc_config_pins(&g_uart0_config);

#endif

#ifdef CONFIG_ESP32S3_UART1

esp32s3_lowputc_enable_sysclk(&g_uart1_config);
esp32s3_lowputc_config_pins(&g_uart1_config);
#endif

#ifdef CONFIG_ESP32S3_UART2
esp32s3_lowputc_enable_sysclk(&g_uart2_config);
esp32s3_lowputc_config_pins(&g_uart2_config);
#endif

#endif /* !CONFIG_SUPPRESS_UART_CONFIG */
Expand Down
3 changes: 3 additions & 0 deletions arch/xtensa/src/esp32s3/esp32s3_lowputc.h
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Original file line number Diff line number Diff line change
Expand Up @@ -44,6 +44,8 @@
#include "hardware/esp32s3_uart.h"
#include "hardware/esp32s3_gpio_sigmap.h"

#include "esp32s3_config.h"

/****************************************************************************
* Public Types
****************************************************************************/
Expand Down Expand Up @@ -121,6 +123,7 @@ struct esp32s3_uart_s

extern struct esp32s3_uart_s g_uart0_config;
extern struct esp32s3_uart_s g_uart1_config;
extern struct esp32s3_uart_s g_uart2_config;

/****************************************************************************
* Public Function Prototypes
Expand Down
14 changes: 6 additions & 8 deletions arch/xtensa/src/esp32s3/esp32s3_periph.c
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Original file line number Diff line number Diff line change
Expand Up @@ -607,9 +607,6 @@ void IRAM_ATTR esp32s3_perip_clk_init(void)
#endif
#ifndef CONFIG_UART1_SERIAL_CONSOLE
SYSTEM_UART1_CLK_EN |
#endif
#ifndef CONFIG_UART2_SERIAL_CONSOLE
SYSTEM_UART2_CLK_EN |
#endif
SYSTEM_USB_CLK_EN |
SYSTEM_SPI2_CLK_EN |
Expand All @@ -629,7 +626,9 @@ void IRAM_ATTR esp32s3_perip_clk_init(void)
SYSTEM_SPI3_DMA_CLK_EN |
SYSTEM_PWM2_CLK_EN |
SYSTEM_PWM3_CLK_EN;
common_perip_clk1 = 0;
#ifndef CONFIG_UART2_SERIAL_CONSOLE
common_perip_clk1 = SYSTEM_UART2_CLK_EN;
#endif
hwcrypto_perip_clk = SYSTEM_CRYPTO_AES_CLK_EN |
SYSTEM_CRYPTO_SHA_CLK_EN |
SYSTEM_CRYPTO_RSA_CLK_EN;
Expand All @@ -650,9 +649,6 @@ void IRAM_ATTR esp32s3_perip_clk_init(void)
#endif
#ifndef CONFIG_UART1_SERIAL_CONSOLE
SYSTEM_UART1_CLK_EN |
#endif
#ifndef CONFIG_UART2_SERIAL_CONSOLE
SYSTEM_UART2_CLK_EN |
#endif
SYSTEM_USB_CLK_EN |
SYSTEM_SPI2_CLK_EN |
Expand All @@ -666,7 +662,9 @@ void IRAM_ATTR esp32s3_perip_clk_init(void)
SYSTEM_I2S1_CLK_EN |
SYSTEM_SPI2_DMA_CLK_EN |
SYSTEM_SPI3_DMA_CLK_EN;
common_perip_clk1 = 0;
#ifndef CONFIG_UART2_SERIAL_CONSOLE
common_perip_clk1 |= SYSTEM_UART2_CLK_EN;
#endif

/* Disable some peripheral clocks. */

Expand Down
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