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A523 FEL fixes #210

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A523 FEL fixes #210

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3ee3b18
fel: a523: add icache fix
apritzel Aug 26, 2024
746a7e4
fel: a523: change buffer and load addresses
apritzel Aug 25, 2024
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15 changes: 10 additions & 5 deletions soc_info.c
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Original file line number Diff line number Diff line change
Expand Up @@ -180,6 +180,10 @@ sram_swap_buffers f1c100s_sram_swap_buffers[] = {
{ .size = 0 } /* End of the table */
};

sram_swap_buffers a523_sram_swap_buffers[] = {
{ .buf1 = 0x45000, .buf2 = 0x40200, .size = 0x0400 },
{ .size = 0 } /* End of the table */
};
/*
* Some SoCs put both stacks, BSS and data segments at the end of a comparably
* large SRAM, so we don't need to move anything around.
Expand Down Expand Up @@ -608,15 +612,16 @@ soc_info_t soc_info_table[] = {
},{
.soc_id = 0x1890, /* Allwinner A523 */
.name = "A523",
.spl_addr = 0x20000,
.scratch_addr = 0x21000,
.thunk_addr = 0x43e00, .thunk_size = 0x200,
.swap_buffers = no_sram_swap_buffers,
.sram_size = 144 * 1024,
.spl_addr = 0x44000,
.scratch_addr = 0x45000,
.thunk_addr = 0x40000, .thunk_size = 0x200,
.swap_buffers = a523_sram_swap_buffers,
.sram_size = 96 * 1024,
.sid_base = 0x03006000,
.sid_offset = 0x200,
.sid_sections = generic_2k_sid_maps,
.rvbar_reg = 0x08000040,
.icache_fix = true,
.watchdog = &wd_a523_compat,
},{
.swap_buffers = NULL /* End of the table */
Expand Down
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