ESP32-C6 LP CORE delay and basic gpio

[bjoernQ]

This adds GPIO (output) and delay functionality to ESP32C6-LP-HAL.
Additionally, there is a basic blinky example.

How to test

in esp32c6-lp-hal run this

cargo build --release --example blinky
objcopy -O binary target\riscv32imac-unknown-none-elf\release\examples\blinky dump.bin

cd into esp32c6-hal and change esp32c6-hal/examples/lp_core_basic.rs to this

//! This shows a very basic example of running code on the LP core.
//!
//! Code on LP core increments a counter and continuously toggles GPIO1. The
//! current value is printed by the HP core.

#![no_std]
#![no_main]

use esp32c6_hal::{
    clock::ClockControl,
    gpio::lp_gpio::IntoLowPowerPin,
    lp_core,
    peripherals::Peripherals,
    prelude::*,
    timer::TimerGroup,
    Rtc,
    IO,
};
use esp_backtrace as _;
use esp_println::{print, println};
const CODE: &[u8] = include_bytes!("../../esp32c6-lp-hal/dump.bin");

#[entry]
fn main() -> ! {
    let peripherals = Peripherals::take();
    let mut system = peripherals.PCR.split();
    let clocks = ClockControl::boot_defaults(system.clock_control).freeze();

    let mut rtc = Rtc::new(peripherals.LP_CLKRST);
    let timer_group0 = TimerGroup::new(
        peripherals.TIMG0,
        &clocks,
        &mut system.peripheral_clock_control,
    );
    let mut wdt0 = timer_group0.wdt;
    let timer_group1 = TimerGroup::new(
        peripherals.TIMG1,
        &clocks,
        &mut system.peripheral_clock_control,
    );
    let mut wdt1 = timer_group1.wdt;

    // Disable watchdog timers
    rtc.swd.disable();
    rtc.rwdt.disable();
    wdt0.disable();
    wdt1.disable();

    let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);

    // configure GPIO 1 as LP output pin
    let mut lp_pin = io.pins.gpio1.into_low_power();
    lp_pin.output_enable(true);

    let mut lp_core = esp32c6_hal::lp_core::LpCore::new(peripherals.LP_CORE);
    lp_core.stop();
    println!("lp core stopped");

    // copy code to LP ram
    let lp_ram = 0x5000_0000 as *mut u8;
    unsafe {
        core::slice::from_raw_parts_mut(lp_ram, 16 * 1024).fill(0);
        core::ptr::copy_nonoverlapping(CODE as *const _ as *const u8, lp_ram, CODE.len());
    }
    println!("copied code (len {})", CODE.len());

    // start LP core
    lp_core.run(lp_core::LpCoreWakeupSource::HpCpu);
    println!("lpcore run");

    let data = (0x50002000) as *mut u32;
    loop {
        print!("Current {:x}           \u{000d}", unsafe {
            data.read_volatile()
        });
    }
}

@jessebraham I didn't inlcude any of your work from bjoernQ/esp32c6lp-hal@dc8e74b ... I don't want to get credit for your work!

[jessebraham]

LGTM, thanks! I'll PR the additions I made some time next week.