ESP32 DRAM linker fix #454
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The ROM code _data_ section is loaded into the middle of the DRAM address space, unlike the other chips where it is loaded at the end. Therefore subtracting the previously "reserved" section from heap end could actually corrupt the ROM data section. For the ESP32, the DRAM block has been split into two individual segments, with some reserved segments in the middle (addresses taken from esp-idf). At the moment we don't use the second segment at all in esp-hal, but we could utilize it in esp-wifi for placing the internal allocator for example.
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Works fine for me - great idea to use that second segment for esp-wifi 👍 |
bjoernQ
approved these changes
Mar 24, 2023
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Lets hold off on this, I'll take a look at the S2 as well. |
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So I checked with the linker scripts produced by esp-idf, the DRAM sections for the esp32s2 & esp32s3 already have their length shortened to account for the ROM data section at the end of memory, so reducing it again is not required. If you could double check the S2 & S3 work, I think this is ready to go after that. |
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Checked S2 and S3 - they work fine! Thanks for taking care of this ... going to merge |
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The ROM code data section is loaded into the middle of the DRAM address space, unlike the other chips where it is loaded at the end. Therefore subtracting the previously "reserved" section from heap end could actually corrupt the ROM data section.
For the ESP32, the DRAM block has been split into two individual segments, with some reserved segments in the middle (addresses taken from esp-idf). At the moment we don't use the second segment at all in esp-hal, but we could utilize it in esp-wifi for placing the internal allocator for example.
Partially fixes #451 (The first issue)