[mono] Adding support for Vector128::ExtractMostSignificantBits intrinsics on amd64

[matouskozak]

Adding intrinsics support for Vector128::ExtractMostSignificantBits method on amd64 (miniJIT and llvm AOT).

Implementation

Extracting the most significant bits (MSBs) from Vector128 on amd64 is based on the use of _mm_movemask_epi8/ps/pd (SSE/SSE2).

• Support for two new opcodes for vectors added:

1. sse_movmsk: Create mask from the most significant bit of each 8/32/64-bit element (_mm_movemask_epi8/ps/pd).
2. ssse3_shuffle: Shuffle 8-bit elements of vector according to shuffle control mask (_mm_shuffle_epi8).

Short/UShort element types

Since the _mm_movemask_epi8/ps/pd doesn't support Short/UShort element types, we first perform _mm_shuffle_epi8 (SSSE3) to shuffle odd bytes (most significant bytes of each Short/UShort) to the lower half of vector while zeroing out the upper half. Next, we use _mm_movemask_epi8 to extract MSBs from shuffled vector.

Other primitive element types

Based on the size of element type, the corresponding version of _mm_movemask_epi8/ps/pd is used to extract MSBs.

Future work

Emitting intrinsics for Vector128 of floating-point types is currently not supported in Mono. This PR adds the support for emitting it on amd64 platform but additional work must be done for arm64 and possibly for WASM before enabling it for Mono.

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Contributes to #76025.

[ivanpovazan]

LGTM!

[matouskozak]

/azp run runtime-extra-platforms

[azure-pipelines]

Azure Pipelines successfully started running 1 pipeline(s).

[matouskozak]

maccatalyst-x64 Release AllSubsets_Mono build error (https://dev.azure.com/dnceng-public/public/_build/results?buildId=363584&view=logs&j=a2a39d6b-70c5-5040-933a-4b8b6e52bf19&t=7de46cbc-684f-5a34-7a8f-d5a9c81d3460) seems releated. I'll investigate further.

[jandupej]

LGTM. I cannot immediately see why LLVM would fail on the i16 case.

[matouskozak]

/azp run runtime-extra-platforms

[azure-pipelines]

Azure Pipelines successfully started running 1 pipeline(s).

[matouskozak]

LGTM

@jandupej looks like it was caused by missing SSSE3 check which is weird considering SSSE3 is more than 15 years old.

[matouskozak]

The failing CI lines are tracked on main and unrelated to this PR.

[jandupej]

LGTM

@jandupej looks like it was caused by missing SSSE3 check which is weird considering SSSE3 is more than 15 years old.

If memory serves, we require the CPU to support at least SSE4.1, so this should not be an issue. Still, it is a good practice to check for ISA extension support before using it.