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Fix issue #32466 #32804

Merged
merged 2 commits into from
Feb 26, 2020
Merged

Fix issue #32466 #32804

merged 2 commits into from
Feb 26, 2020

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briansull
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Fixes outerloop leg: R2R Windows_NT x86 Checked no_tiered_compilation @ Windows.10.Amd64.Open

Fixes issue #32466

Fixes outerloop leg: R2R Windows_NT x86 Checked no_tiered_compilation @ Windows.10.Amd64.Open
@BruceForstall
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@@ -2835,7 +2835,13 @@ void emitter::emitHandleMemOp(GenTreeIndir* indir, instrDesc* id, insFormat fmt,

// Either not generating relocatable code, or addr must be an icon handle, or the
// constant is zero (which we won't generate a relocation for).
assert(!emitComp->opts.compReloc || memBase->IsIconHandle() || memBase->IsIntegralConst(0));
//
// On x86 we can have an indirection of a non-handle int constant without a reloc.
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Nit: With this change, it's not entirely clear that this comment is an extension of the previous comment. Also, while you're here, the previous comment isn't clear about whether this is a statement (i.e. restating the condition of the assert), or describing a condition, e.g. the if statement below).
Could you reword this as a complete statement? Perhaps:

// If we reach here, either:
// - we are not generating relocatable code,
// - the base address is a handle for an integer constant,
// - the base address is a constant zero (which doesn't require a reloc), or
// - the base address is a constant that fits into the memory instruction (this can happen on x86).
//   This last case is captured in the FitsInAddrBase method which is used by Lowering to determine that it can
//   be contained.

Of course, please correct if the above is not correct.

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OK can change the comment.

I didn't like the existing comment, It isn't clear to me why we are testing a different set of invariants here than we when originally set the contained flag. And actually all 31 bit constants don't require a relocation, not just zero (for both x84 and x86)

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@briansull briansull Feb 25, 2020

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I will use your comment and omit this part (which doesn't require a reloc)

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OK, I changed it to:

        // If we reach here, either:
        // - we are not generating relocatable code, (typically the non-AOT JIT case)
        // - the base address is a handle represented by an integer constant,
        // - the base address is a constant zero, or
        // - the base address is a constant that fits into the memory instruction (this can happen on x86).
        //   This last case is captured in the FitsInAddrBase method which is used by Lowering to determine that it can
        //   be contained.
        //

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Great, thanks!

@sandreenko sandreenko added the area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI label Feb 25, 2020
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@CarolEidt CarolEidt left a comment

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LGTM

@briansull
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briansull commented Feb 25, 2020

The last update to this assert was this:

Author: Bruce Forstall <brucefo@microsoft.com>
Date:   Thu Sep 8 16:42:22 2016 -0700

    Fix dotnet/coreclr#7100

    This issue is the following assert:
    ```
    Assert failure '!emitComp->opts.compReloc || memBase->IsIconHandle()'
    ```
    while ngen'ing mscorlib on desktop.

    We're trying to generate
    ```
    cmp ebx, dword ptr [0000H]
    ```
    (due to inlining). But, emitInsBinary() doesn't expect a zero address that
    is not a relocatable handle.

    Simply change the assert to allow this. The code then generates the correct
    zero base address.


    Commit migrated from https://github.com/dotnet/coreclr/commit/08f3ae19c6e07e6772ace96706012ed87e4e6f2e

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LGTM, thank you

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4 participants