Fix esp32c3 FPU issues

[mikee47]

The HostTests application crashes on the esp32c3 because it doesn't have hardware floating-point support. By default code is compiled with FPU instructions which produce 'illegal instruction' exceptions.

The -march=rv32imc setting is required for these processors so emulation code is used instead. The IDF 5.2 compilers have additional zicsr and zifencei extensions. Haven't looked into these, these settings are just copied from the IDF makefiles.

Similiarly, a scan of the IDF makefiles shows a few missing definitions. Don't know whether these are 100% necessary or not but don't seem to do any harm.

[what-the-diff]

PR Summary

• Inclusion of Additional Components in pthread.mk File
  The PR introduces new components to the present pthread build file. These are pthread_include_pthread_cond_var_impl, pthread_include_pthread_rwlock_impl, and pthread_include_pthread_semaphore_impl. These additions offer more functionality in doing multithreaded programming.

• Addition of soc.mk File for ESP32
  A new file named soc.mk has been added as part of the update. The content of this file is related to a system-on-chip (SOC) solution specific for ESP32 architecture. This enhances platform compatibility with different SOC solutions.

• Addition of Conditional Check and Flag Inclusions in app.mk File
  Additional checks have been included in the application build file to add specific flags like -nostartfiles when compiling for an architecture defined by IDF_TARGET_ARCH_RISCV. This allows for greater flexibility and responsiveness when switching between target architectures during development.

• Introduction of Enhanced Architecture Compatibility in build.mk File
  The build file now includes a logic to define ESP32_RISCV_ARCH based on the IDF_VERSION and implements the -march flag with the ESP32_RISCV_ARCH value if IDF_TARGET_ARCH_RISCV is defined. This feature allows smoother adaptation to new architectural updates or differences in the RISC-V architecture when building the project.