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Merge pull request torvalds#261 from Radxa-Alvin/linux-5.10-gen-rkr4.1
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Changes:
  * Add Radxa E25 board

Signed-off-by: Stephen Chen <stephen@radxa.com>
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@RadxaStephen
RadxaStephen authored Dec 29, 2023
2 parents fbc9c31 + 336e1f1 commit 6152b96
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1 change: 1 addition & 0 deletions arch/arm64/boot/dts/rockchip/Makefile
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Expand Up @@ -157,6 +157,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nvr-demo-v10-linux-spi-nand.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nvr-demo-v12-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nvr-demo-v12-linux-spi-nand.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-cm3i-io.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3b.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-lp4-v10.dtb
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294 changes: 294 additions & 0 deletions arch/arm64/boot/dts/rockchip/rk3568-radxa-e25.dts
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2023 Radxa Limited.
*
*/

/dts-v1/;

#include "rk3568-radxa-cm3i.dtsi"

/ {
model = "Radxa E25 Carrier Board";
compatible = "radxa,e25", "radxa,cm3i", "rockchip,rk3568";

fiq_debugger: fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
rockchip,wake-irq = <0>;
/* If enable uart uses irq instead of fiq */
rockchip,irq-mode-enable = <1>;
rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};

debug: debug@fd904000 {
compatible = "rockchip,debug";
reg = <0x0 0xfd904000 0x0 0x1000>,
<0x0 0xfd905000 0x0 0x1000>,
<0x0 0xfd906000 0x0 0x1000>,
<0x0 0xfd907000 0x0 0x1000>;
};

vcc5v0_usb: vcc5v0-usb {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_en>;
regulator-name = "vcc5v0_usb";
};

pcie30_3v3: pcie30-3v3 {
compatible = "regulator-fixed";
regulator-name = "pcie30_3v3";
enable-active-high;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie3v3_en>;
};

minipcie_3v3: minipcie_3v3 {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&minipcie_en>;
regulator-name = "vcc3v3_minipcie";
regulator-always-on;
regulator-boot-on;
};

//low:wifi,high:5G
vcc3v3_minipcie_to_5g_or_wifi: vcc3v3-minipcie-to-5g-or-wifi {
compatible = "regulator-fixed";
enable-active-low;
gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&vcc3v3_minipcie_to_5g_or_wifi_en>;
regulator-name = "vcc3v3_minipcie_to_5g_or_wifi";
regulator-always-on;
regulator-boot-on;
};

vcc3v3_pcie_30x1: vcc3v3-pci-30x1 {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc3v3_pcie_30x1_en>;
regulator-name = "vcc3v3_pci_30x1";
regulator-always-on;
regulator-boot-on;
};

em05_modem: em05-modem {
compatible = "lte-em05-modem-platdata";
pinctrl-names = "default";
pinctrl-0 = <&em05_power_en &em05_airplane_mode &em05_reset>;
em05,power-gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
em05,reset-gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
em05,airplane-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
status = "okay";
};

rgb0: rgb0 {
compatible = "pwm-leds";
status = "okay";

rgb0-red {
pwms = <&pwm1 0 1000000 0>;
max-brightness = <255>;
};

rgb0-blue {
pwms = <&pwm12 0 1000000 0>;
max-brightness = <255>;
};

rgb0-green {
pwms = <&pwm2 0 1000000 0>;
max-brightness = <255>;
};
};
};

&pwm1 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm1m0_pins>;
};

&pwm2 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm2m0_pins>;
};

&pwm12 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm12m1_pins>;
};

&u2phy0_host {
status = "okay";
};

&u2phy0_otg {
vbus-supply = <&vcc5v0_usb>;
status = "okay";
};

&u2phy1_otg {
status = "okay";
};

&u2phy1_host {
status = "okay";
};

&usb2phy0 {
status = "okay";
};

&usb2phy1 {
status = "okay";
};

&usb_host0_ehci {
status = "okay";
};

&usb_host0_ohci {
status = "okay";
};

&usb_host1_ehci {
status = "okay";
};

&usb_host1_ohci {
status = "okay";
};

&usbdrd_dwc3 {
dr_mode = "host";
status = "okay";
};

&usbdrd30 {
status = "okay";
};

&usbhost_dwc3 {
status = "okay";
};

&usbhost30 {
status = "okay";
};

&combphy0_us {
status = "okay";
};

&combphy1_usq {
status = "okay";
};

&rk809_codec {
status = "okay";
};

&combphy2_psq {
status = "okay";
};

&pcie30phy {
status = "okay";
};

&pcie3x2 {
reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&pcie30_3v3>;
pinctrl-0 = <&pcie30x2m1_pins>;
rockchip,bifurcation;
status = "okay";
};

&pcie3x1 {
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&pcie30_3v3>;
pinctrl-0 = <&pcie30x1m1_pins>;
rockchip,bifurcation;
status = "okay";
};

&pcie2x1 {
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&pcie30_3v3>;
pinctrl-0 = <&pcie20m2_pins>;
status = "okay";
};

&sdio_pwrseq {
status = "disabled";
};

&sdmmc2 {
status = "disabled";
};

&uart8 {
status = "disabled";
};

&sata1 {
status = "okay";
};

&pinctrl {
usb {
vcc5v0_en: vcc5v0-en {
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};

pcie {
pcie3v3_en: pcie3v3-en {
rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
};

minipcie_en: vcc3v3-minipcie-en {
rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
};

vcc3v3_minipcie_to_5g_or_wifi_en: vcc3v3-minipcie-to-5g-or-wifi-en {
rockchip,pins = <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
};

vcc3v3_pcie_30x1_en: vcc3v3-pcie-30x1-en {
rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};

lte-em05-modem {
em05_airplane_mode: em05-airplane-mode {
rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};

em05_power_en: em05-power-en {
rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
};

em05_reset: em05-reset {
rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

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