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Programming interface #3532

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neon60
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@neon60 neon60 commented Jun 27, 2024

@randyh62 The programming interface currently.

@neon60 neon60 marked this pull request as draft June 27, 2024 15:08
@neon60 neon60 force-pushed the programming_interface branch 2 times, most recently from e8ce33e to 0c1132d Compare June 29, 2024 10:42
@neon60 neon60 changed the base branch from develop to docs/develop July 4, 2024 10:23
neon60 and others added 8 commits July 5, 2024 16:18
- Add clr surface functions
- Update based on review comments
- Fix clocks
Correct broken reference
Update doc reqs

Update requirements files


Update documentation requirements

Fix
- Move md files to rst
- Impl editorial suggestions from @lpaoletti
- External PR feedbacks from HIP team
Update surface functions in cpp language extensions
Update doxyfile and fix the function naming
Change to new clr branch
Fix white space characthers
@neon60 neon60 force-pushed the programming_interface branch 2 times, most recently from d9b1cb2 to 1d02157 Compare August 20, 2024 12:11
@neon60 neon60 mentioned this pull request Aug 20, 2024
@neon60 neon60 force-pushed the programming_interface branch 2 times, most recently from d1b9a3e to 8d4d17b Compare August 22, 2024 20:30
@MKKnorr MKKnorr self-requested a review September 4, 2024 13:38
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Good job overall, mostly just nitpicking about wording or adding details

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Comment on lines 141 to 140
Read-only storage visible to all threads in a given grid. It is a limited
segment of global with queryable size.
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I think this should highlight the differences to global memory, i.e. (possibly) different caching, and performance recommendations.
Also I'm not sure if it's really a segment of global memory (which is a logical partition), but rather part of device memory (as in physically located there)

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Read-only storage visible to all threads in a given grid. It is a limited
segment of global with queryable size.
Read-only storage visible to all threadson a given device. It is a limited
segment backed by device memory with queryable size. It needs to be set by the host before kernel execution.
Constant memory provides the best performance benefit when all threads within a warp access the same address.

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@neon60 neon60 Sep 18, 2024

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Maybe here given grid was better. Updated. Let's discuss offline.

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Unified Memory is a single memory address space accessible from any processor
within a system. This setup simplifies memory management processes and enables
applications to allocate data that can be read or written by code running on
either CPUs or GPUs. The Unified memory model is shown in the following figure.
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There is no figure here :)

Also, should the performance implications be mentioned here?

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@neon60 neon60 force-pushed the programming_interface branch 3 times, most recently from 5e25f0a to 77cd365 Compare September 17, 2024 12:16
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6 participants