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USART interrupt handler, handle Rx timeout #38

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USART interrupt handler, handle Rx timeout #38

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7ffe11a
[XDMAC] Add missing interrupt events for flush to interrupt handler
Jul 6, 2022
59a1c3f
[USART] add Rx timeout handling to USART interrupt handler and functi…
Jul 6, 2022
47a9649
Merge remote-tracking branch 'origin/master'
May 5, 2023
5ba1d4c
Merge tag 'v3.18.0'
Nov 13, 2023
2eff27c
CHANGED: always 64 bit can frames, refs #5402
Jan 5, 2024
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4 changes: 2 additions & 2 deletions peripheral/can_u2003/templates/plib_can_common.h.ftl
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Original file line number Diff line number Diff line change
Expand Up @@ -324,7 +324,7 @@ typedef struct
unsigned int anmf:1;

/* Data field */
uint8_t data[8];
uint8_t data[64];

} CAN_RX_BUFFER;

Expand Down Expand Up @@ -367,7 +367,7 @@ typedef struct
unsigned int mm:8;

/* Data field */
uint8_t data[8];
uint8_t data[64];

} CAN_TX_BUFFER;

Expand Down
63 changes: 63 additions & 0 deletions peripheral/usart_6089/templates/plib_usart.c.ftl
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Original file line number Diff line number Diff line change
Expand Up @@ -235,6 +235,20 @@ void __attribute__((used)) ${USART_INSTANCE_NAME}_InterruptHandler( void )
}
}
<#else>
/* Receiver timeout */
if (${USART_INSTANCE_NAME}_REGS->US_CSR & US_CSR_USART_TIMEOUT_Msk)
{
if(${USART_INSTANCE_NAME?lower_case}Obj.rxTimeoutCallback != NULL)
{
${USART_INSTANCE_NAME?lower_case}Obj.rxTimeoutCallback(${USART_INSTANCE_NAME?lower_case}Obj.rxTimeoutContext);
}
else
{
/* clear and disable timer to avoid re-raising the timout, reset should be controlled by rxTimeoutCallback */
${USART_INSTANCE_NAME}_ClearReadTimeout();
}
}

/* Receiver status */
if ((${USART_INSTANCE_NAME}_REGS->US_CSR & US_CSR_USART_RXRDY_Msk) != 0U)
{
Expand Down Expand Up @@ -598,6 +612,13 @@ void ${USART_INSTANCE_NAME}_ReadCallbackRegister( USART_CALLBACK callback, uintp
${USART_INSTANCE_NAME?lower_case}Obj.rxContext = context;
}

void ${USART_INSTANCE_NAME}_ReadTimeoutCallbackRegister( USART_CALLBACK callback, uintptr_t context )
{
${USART_INSTANCE_NAME?lower_case}Obj.rxTimeoutCallback = callback;

${USART_INSTANCE_NAME?lower_case}Obj.rxTimeoutContext = context;
}

bool ${USART_INSTANCE_NAME}_WriteIsBusy( void )
{
return ${USART_INSTANCE_NAME?lower_case}Obj.txBusyStatus;
Expand Down Expand Up @@ -643,4 +664,46 @@ size_t ${USART_INSTANCE_NAME}_ReadCountGet( void )
</#if>
}


void ${USART_INSTANCE_NAME}_StartReadTimeoutAfterNextChar(uint32_t nbitperiods)
{
/* update timer value, this also starts the countdown */
${USART_INSTANCE_NAME}_StartReadTimeoutNow(nbitperiods);

/* immediately cancel running countdown (hopefully we're fast enough), and wait for next char */
${USART_INSTANCE_NAME}_REGS->US_CR = US_CR_USART_STTTO_Msk;
}

void ${USART_INSTANCE_NAME}_StartReadTimeoutNow(uint32_t nbitperiods)
{
<#if USART_INTERRUPT_MODE_ENABLE == true>
/* enable USART Rx timeout interrupt */
${USART_INSTANCE_NAME}_REGS->US_IER = US_IER_USART_TIMEOUT_Msk;
</#if>

/* update timer value, immediately starts timeout */
${USART_INSTANCE_NAME}_REGS->US_RTOR = US_RTOR_TO(nbitperiods);
}

void ${USART_INSTANCE_NAME}_RestartReadTimeoutAfterNextChar()
{
${USART_INSTANCE_NAME}_REGS->US_CR = US_CR_USART_STTTO_Msk;
}

void ${USART_INSTANCE_NAME}_RestartReadTimeoutNow()
{
${USART_INSTANCE_NAME}_REGS->US_CR = US_CR_USART_RETTO_Msk;
}

void ${USART_INSTANCE_NAME}_ClearReadTimeout( void )
{
/* reset timer value, stops running timer */
${USART_INSTANCE_NAME}_REGS->US_RTOR = 0;

<#if USART_INTERRUPT_MODE_ENABLE == true>
/* disable USART Rx timeout interrupt */
${USART_INSTANCE_NAME}_REGS->US_IDR = US_IDR_USART_TIMEOUT_Msk;
</#if>
}

</#if>
12 changes: 12 additions & 0 deletions peripheral/usart_6089/templates/plib_usart.h.ftl
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Original file line number Diff line number Diff line change
Expand Up @@ -72,6 +72,16 @@ bool ${USART_INSTANCE_NAME}_Write( void *buffer, const size_t size );

bool ${USART_INSTANCE_NAME}_Read( void *buffer, const size_t size );

void ${USART_INSTANCE_NAME}_StartReadTimeoutNow(uint32_t nbitperiods);

void ${USART_INSTANCE_NAME}_StartReadTimeoutAfterNextChar(uint32_t nbitperiods);

void ${USART_INSTANCE_NAME}_RestartReadTimeoutNow( void );

void ${USART_INSTANCE_NAME}_RestartReadTimeoutAfterNextChar( void );

void ${USART_INSTANCE_NAME}_ClearReadTimeout( void );

<#if USART_INTERRUPT_MODE_ENABLE == false>
int ${USART_INSTANCE_NAME}_ReadByte( void );

Expand All @@ -97,6 +107,8 @@ void ${USART_INSTANCE_NAME}_WriteCallbackRegister( USART_CALLBACK callback, uint

void ${USART_INSTANCE_NAME}_ReadCallbackRegister( USART_CALLBACK callback, uintptr_t context );

void ${USART_INSTANCE_NAME}_ReadTimeoutCallbackRegister( USART_CALLBACK callback, uintptr_t context );

</#if>

bool ${USART_INSTANCE_NAME}_TransmitComplete( void );
Expand Down
2 changes: 2 additions & 0 deletions peripheral/usart_6089/templates/plib_usart_common.h
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Original file line number Diff line number Diff line change
Expand Up @@ -136,6 +136,8 @@ typedef struct
size_t rxProcessedSize;
USART_CALLBACK rxCallback;
uintptr_t rxContext;
USART_CALLBACK rxTimeoutCallback;
uintptr_t rxTimeoutContext;
bool rxBusyStatus;

USART_ERROR errorStatus;
Expand Down
69 changes: 51 additions & 18 deletions peripheral/xdmac_11161/templates/plib_xdmac.c.ftl
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Original file line number Diff line number Diff line change
Expand Up @@ -86,6 +86,7 @@ void __attribute__((used)) ${DMA_INSTANCE_NAME}_InterruptHandler( void )
{
uint32_t chanIntStatus;
uint32_t channel;
XDMAC_TRANSFER_EVENT event = XDMAC_TRANSFER_NONE;

/* Additional temporary variables used to prevent MISRA violations (Rule 13.x) */
bool channelInUse;
Expand All @@ -94,6 +95,7 @@ void __attribute__((used)) ${DMA_INSTANCE_NAME}_InterruptHandler( void )
/* Iterate all channels */
for (channel = 0U; channel < XDMAC_ACTIVE_CHANNELS_MAX; channel++)
{
event = XDMAC_TRANSFER_NONE;
channelInUse = xdmacChannelObj[channel].inUse;
channelContext = xdmacChannelObj[channel].context;

Expand All @@ -105,22 +107,37 @@ void __attribute__((used)) ${DMA_INSTANCE_NAME}_InterruptHandler( void )

if ((chanIntStatus & ( XDMAC_CIS_RBEIS_Msk | XDMAC_CIS_WBEIS_Msk | XDMAC_CIS_ROIS_Msk)) != 0U)
{
xdmacChannelObj[channel].busyStatus = false;

/* It's an error interrupt */
if (NULL != xdmacChannelObj[channel].callback)
{
xdmacChannelObj[channel].callback(XDMAC_TRANSFER_ERROR, channelContext);
}
event = XDMAC_TRANSFER_ERROR;
}
else if ((chanIntStatus & XDMAC_CIS_BIS_Msk) != 0U)
{
xdmacChannelObj[channel].busyStatus = false;

/* It's a block transfer complete interrupt */
event = XDMAC_TRANSFER_COMPLETE;
}
else if ((chanIntStatus & XDMAC_CIS_LIS_Msk) != 0U)
{
/* It's an end of linked list interrupt */
event = XDMAC_TRANSFER_LINKED_LIST_END;
}
else if ((chanIntStatus & XDMAC_CIS_FIS_Msk) != 0U)
{
/* It's an end of flush operation interrupt */
event = XDMAC_TRANSFER_FLUSH_END;
}

if (event != XDMAC_TRANSFER_NONE) {
/* a flush event may occur while a DMA transfer is still running. Therefore don't
* reset the busyStatus in this case.
*/
if (event != XDMAC_TRANSFER_FLUSH_END)
{
xdmacChannelObj[channel].busyStatus = false;
}

if (NULL != xdmacChannelObj[channel].callback)
{
xdmacChannelObj[channel].callback(XDMAC_TRANSFER_COMPLETE, channelContext);
xdmacChannelObj[channel].callback(event, channelContext);
}
}
else
Expand All @@ -137,6 +154,7 @@ void __attribute__((used)) ${DMA_INSTANCE_NAME}_SINT_InterruptHandler( void )
{
uint32_t chanIntStatus;
uint32_t channel;
XDMAC_TRANSFER_EVENT event = XDMAC_TRANSFER_NONE;

/* Additional temporary variables used to prevent MISRA violations (Rule 13.x) */
bool channelInUse;
Expand All @@ -155,22 +173,37 @@ void __attribute__((used)) ${DMA_INSTANCE_NAME}_SINT_InterruptHandler( void )

if ((chanIntStatus & ( XDMAC_CIS_RBEIS_Msk | XDMAC_CIS_WBEIS_Msk | XDMAC_CIS_ROIS_Msk)) != 0U)
{
xdmacChannelObj[channel].busyStatus = false;

/* It's an error interrupt */
if (NULL != xdmacChannelObj[channel].callback)
{
xdmacChannelObj[channel].callback(XDMAC_TRANSFER_ERROR, channelContext);
}
event = XDMAC_TRANSFER_ERROR;
}
else if ((chanIntStatus & XDMAC_CIS_BIS_Msk) != 0U)
{
xdmacChannelObj[channel].busyStatus = false;

/* It's a block transfer complete interrupt */
event = XDMAC_TRANSFER_COMPLETE;
}
else if ((chanIntStatus & XDMAC_CIS_LIS_Msk) != 0U)
{
/* It's an end of linked list interrupt */
event = XDMAC_TRANSFER_LINKED_LIST_END;
}
else if ((chanIntStatus & XDMAC_CIS_FIS_Msk) != 0U)
{
/* It's an end of flush operation interrupt */
event = XDMAC_TRANSFER_FLUSH_END;
}

if (event != XDMAC_TRANSFER_NONE) {
/* a flush event may occur while a DMA transfer is still running. Therefore don't
* reset the busyStatus in this case.
*/
if (event != XDMAC_TRANSFER_FLUSH_END)
{
xdmacChannelObj[channel].busyStatus = false;
}

if (NULL != xdmacChannelObj[channel].callback)
{
xdmacChannelObj[channel].callback(XDMAC_TRANSFER_COMPLETE, channelContext);
xdmacChannelObj[channel].callback(event, channelContext);
}
}
else
Expand Down
8 changes: 7 additions & 1 deletion peripheral/xdmac_11161/templates/plib_xdmac_common.h.ftl
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Original file line number Diff line number Diff line change
Expand Up @@ -93,7 +93,13 @@ typedef enum
XDMAC_TRANSFER_COMPLETE = 1,

/* Error while processing the request */
XDMAC_TRANSFER_ERROR = 2
XDMAC_TRANSFER_ERROR = 2,

/* Reached end of linked list */
XDMAC_TRANSFER_LINKED_LIST_END = 3,

/* Requested flush operation has ended */
XDMAC_TRANSFER_FLUSH_END = 4

} XDMAC_TRANSFER_EVENT;

Expand Down