update icecube2 template to TinyFPGA_BX; it was TinyFPGA_B

icecube2_template/constraints/clk.sdc

@@ -1,13 +1,3 @@
-# ##############################################################################
-
-# iCEcube SDC
-
-# Version:            2017.01.27914
-
-# File Generated:     Jul 9 2017 15:15:35
-
-# ##############################################################################
-
 ####---- CreateClock list ----1
-create_clock  -period 62.50 -name {pin3_clk_16mhz} [get_ports {pin3_clk_16mhz}] 
+create_clock  -period 62.50 -name {CLK_16mhz} [get_ports {CLK_16mhz}] 
 

icecube2_template/constraints/pins.pcf

@@ -12,29 +12,61 @@
 
 # ##############################################################################
 
-###IOSet List 24
-set_io pin13 J1
-set_io pin15_sdi H7
-set_io pin1_usb_dp A3
-set_io pin20 E8
-set_io pin2_usb_dn A4
-set_io pin4 B2
-set_io pin10 E1
-set_io pin18 D9
-set_io pin7 B1
-set_io pin11 G1
-set_io pin19 C9
-set_io pin22 A8
-set_io pin6 A1
-set_io pin12 H1
-set_io pin16_sck G7
-set_io pin21 A9
-set_io pin5 A2
-set_io pin9 D1
-set_io pin14_sdo G6
-set_io pin24 A6
-set_io pin8 C1
-set_io pin17_ss F7
-set_io pin23 A7
-set_io pin3_clk_16mhz B4
+# Left side of board
+set_io PIN_1 A2
+set_io PIN_2 A1
+set_io PIN_3 B1
+set_io PIN_4 C2
+set_io PIN_5 C1
+set_io PIN_6 D2
+set_io PIN_7 D1
+set_io PIN_8 E2
+set_io PIN_9 E1
+set_io PIN_10 G2
+set_io PIN_11 H1
+set_io PIN_12 J1
+set_io PIN_13 H2
+
+# Right side of board
+set_io PIN_14 H9
+set_io PIN_15 D9
+set_io PIN_16 D8
+set_io PIN_17 C9
+set_io PIN_18 A9
+set_io PIN_19 B8
+set_io PIN_20 A8
+set_io PIN_21 B7
+set_io PIN_22 A7
+set_io PIN_23 B6
+set_io PIN_24 A6
+
+# SPI flash interface on bottom of board
+set_io SPI_SS F7
+set_io SPI_SCK G7
+set_io SPI_IO0 G6
+set_io SPI_IO1 H7
+set_io SPI_IO2 H4
+set_io SPI_IO3 J8
+
+# General purpose pins on bottom of board
+set_io PIN_25 G1
+set_io PIN_26 J3
+set_io PIN_27 J4
+set_io PIN_28 G9
+set_io PIN_29 J9
+set_io PIN_30 E8
+set_io PIN_31 J2
+
+# LED
+set_io LED B3
+
+# USB
+set_io USBP B4
+set_io USBN A4
+set_io USBPU A3
+
+# 16MHz clock
+set_io CLK_16mhz B2 # input
+
+
 

icecube2_template/template_sbt.project

@@ -1,11 +1,11 @@
 [Project]
 ProjectVersion=2.0
-Version=Lattice Semiconductor Corporation iCEcube - Release: 2017.01.27914 - Build Date: Jan 12 2017 19:10:45
+Version=Lattice Semiconductor Corporation iCEcube - Release: 2017.08.27940 - Build Date: Sep 11 2017 17:40:01
 ProjectName=template
 Vendor=SiliconBlue
 Synthesis=synplify
-ProjectVFiles=verilog/TinyFPGA_B.v=work
-ProjectCFiles=
+ProjectVFiles=verilog/TinyFPGA_BX.v=work
+ProjectCFiles=constraints/clk.sdc
 CurImplementation=template_Implmnt
 Implementations=template_Implmnt
 StartFromSynthesis=yes
@@ -46,12 +46,12 @@ DevicePower=
 NetlistFile=template_Implmnt/template.edf
 AdditionalEDIFFile=
 IPEDIFFile=
-DesignLib=template_Implmnt/sbt/netlist/oadb-TinyFPGA_B
+DesignLib=template_Implmnt/sbt/netlist/oadb-TinyFPGA_BX
 DesignView=_rt
-DesignCell=TinyFPGA_B
+DesignCell=TinyFPGA_BX
 SynthesisSDCFile=template_Implmnt/template.scf
 UserPinConstraintFile=
-UserSDCFile=constraints/clk.sdc
+UserSDCFile=
 PhysicalConstraintFile=constraints/pins.pcf
 BackendImplPathName=
 Devicevoltage=1.14

icecube2_template/template_syn.prj

@@ -6,7 +6,8 @@
 
 #project files
 
-add_file -verilog -lib work "verilog/TinyFPGA_B.v" 
+add_file -verilog -lib work "verilog/TinyFPGA_BX.v" 
+add_file -constraint -lib work "constraints/clk.sdc"
 #implementation: "template_Implmnt"
 impl -add template_Implmnt -type fpga
 

icecube2_template/verilog/TinyFPGA_BX.v

@@ -0,0 +1,112 @@
+module TinyFPGA_BX (
+// 16MHz clock
+  input CLK_16mhz,
+
+// Left side of board
+  inout PIN_1,
+  inout PIN_2,
+  inout PIN_3,
+  inout PIN_4,
+  inout PIN_5,
+  inout PIN_6,
+  inout PIN_7,
+  inout PIN_8,
+  inout PIN_9,
+  inout PIN_10,
+  inout PIN_11,
+  inout PIN_12,
+  inout PIN_13,
+
+// Right side of board
+  inout PIN_14,
+  inout PIN_15,
+  inout PIN_16,
+  inout PIN_17,
+  inout PIN_18,
+  inout PIN_19,
+  inout PIN_20,
+  inout PIN_21,
+  inout PIN_22,
+  inout PIN_23,
+  inout PIN_24,
+
+// SPI flash interface on bottom of board
+  inout SPI_SS,
+  inout SPI_SCK,
+  inout SPI_IO0,
+  inout SPI_IO1,
+  inout SPI_IO2,
+  inout SPI_IO3,
+
+// General purpose pins on bottom of board
+  inout PIN_25,
+  inout PIN_26,
+  inout PIN_27,
+  inout PIN_28,
+  inout PIN_29,
+  inout PIN_30,
+  inout PIN_31,
+
+// LED
+  inout LED,
+
+// USB
+  inout USBP,
+  inout USBN,
+  output USBPU
+);
+
+// deactivate USB
+assign USBPU = 1'b0;
+
+// Turn off LED
+assign LED = 1'b0;
+
+// Left side of board
+  assign PIN_1 = 1'bz;
+  assign PIN_2 = 1'bz;
+  assign PIN_3 = 1'bz;
+  assign PIN_4 = 1'bz;
+  assign PIN_5 = 1'bz;
+  assign PIN_6 = 1'bz;
+  assign PIN_7 = 1'bz;
+  assign PIN_8 = 1'bz;
+  assign PIN_9 = 1'bz;
+  assign PIN_10 = 1'bz;
+  assign PIN_11 = 1'bz;
+  assign PIN_12 = 1'bz;
+  assign PIN_13 = 1'bz;
+
+// Right side of board
+  assign PIN_14 = 1'bz;
+  assign PIN_15 = 1'bz;
+  assign PIN_16 = 1'bz;
+  assign PIN_17 = 1'bz;
+  assign PIN_18 = 1'bz;
+  assign PIN_19 = 1'bz;
+  assign PIN_20 = 1'bz;
+  assign PIN_21 = 1'bz;
+  assign PIN_22 = 1'bz;
+  assign PIN_23 = 1'bz;
+  assign PIN_24 = 1'bz;
+
+// SPI flash interface on bottom of board
+  assign SPI_SS = 1'bz;
+  assign SPI_SCK = 1'bz;
+  assign SPI_IO0 = 1'bz;
+  assign SPI_IO1 = 1'bz;
+  assign SPI_IO2 = 1'bz;
+  assign SPI_IO3 = 1'bz;
+
+// General purpose pins on bottom of board
+  assign PIN_25 = 1'bz;
+  assign PIN_26 = 1'bz;
+  assign PIN_27 = 1'bz;
+  assign PIN_28 = 1'bz;
+  assign PIN_29 = 1'bz;
+  assign PIN_30 = 1'bz;
+  assign PIN_31 = 1'bz;
+
+
+
+endmodule