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Reorganizing the project. #3

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3703f4b
Updated schematic for Kicad v.5.1.9-1
Doomn00b Jul 11, 2021
6e47ec6
Time to push it.
Doomn00b Jul 11, 2021
0dd47c8
added gerber-folder
Doomn00b Jul 11, 2021
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2 changes: 1 addition & 1 deletion .gitignore
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Original file line number Diff line number Diff line change
Expand Up @@ -4,5 +4,5 @@ synlog.tcl
*~
*.swp
*bak
gerbers/
#gerbers/

0 TinyFPGA AX Card Back.png → Docs/TinyFPGA AX Card Back.png
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0 TinyFPGA AX Card Front.png → Docs/TinyFPGA AX Card Front.png
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0 board/gerbers/TinyFPGA-A.png → Docs/TinyFPGA-A.png
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0 board/TinyFPGA-A.pdf → Docs/TinyFPGA-A_schematic.pdf
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60 changes: 30 additions & 30 deletions template_a1/TinyFPGA_A1.v → Gateware/template_a1/TinyFPGA_A1.v
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@@ -1,29 +1,29 @@
module TinyFPGA_A1 (
inout pin1,
inout pin2,
inout pin3_sn,
inout pin4_mosi,
inout pin5,
inout pin6,
inout pin7_done,
inout pin8_pgmn,
inout pin9_jtgnb,
inout pin10_sda,
inout pin11_scl,
//inout pin12_tdo,
//inout pin13_tdi,
//inout pin14_tck,
//inout pin15_tms,
inout pin16,
inout pin17,
inout pin18_cs,
inout pin19_sclk,
inout pin20_miso,
inout pin21,
inout pin22
);
// left side of board
module TinyFPGA_A1 (
inout pin1,
inout pin2,
inout pin3_sn,
inout pin4_mosi,
inout pin5,
inout pin6,
inout pin7_done,
inout pin8_pgmn,
inout pin9_jtgnb,
inout pin10_sda,
inout pin11_scl,
//inout pin12_tdo,
//inout pin13_tdi,
//inout pin14_tck,
//inout pin15_tms,
inout pin16,
inout pin17,
inout pin18_cs,
inout pin19_sclk,
inout pin20_miso,
inout pin21,
inout pin22
);

// left side of board
assign pin1 = 1'bz;
assign pin2 = 1'bz;
assign pin3_sn = 1'bz;
Expand All @@ -34,8 +34,8 @@ module TinyFPGA_A1 (
assign pin8_pgmn = 1'bz;
assign pin9_jtgnb = 1'bz;
assign pin10_sda = 1'bz;
assign pin11_scl = 1'bz;
assign pin11_scl = 1'bz;

// right side of board
//assign pin12_tdo = 1'bz;
//assign pin13_tdi = 1'bz;
Expand All @@ -47,6 +47,6 @@ module TinyFPGA_A1 (
assign pin19_sclk = 1'bz;
assign pin20_miso = 1'bz;
assign pin21 = 1'bz;
assign pin22 = 1'bz;
assign pin22 = 1'bz;

endmodule
0 template_a1/template_a1.ldf → Gateware/template_a1/template_a1.ldf
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40 changes: 20 additions & 20 deletions template_a1/template_a1.lpf → Gateware/template_a1/template_a1.lpf
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@@ -1,20 +1,20 @@
BLOCK RESETPATHS ;
BLOCK ASYNCPATHS ;
LOCATE COMP "pin1" SITE "13" ;
LOCATE COMP "pin2" SITE "14" ;
LOCATE COMP "pin3_sn" SITE "16" ;
LOCATE COMP "pin4_mosi" SITE "17" ;
LOCATE COMP "pin5" SITE "20" ;
LOCATE COMP "pin6" SITE "21" ;
LOCATE COMP "pin7_done" SITE "23" ;
LOCATE COMP "pin8_pgmn" SITE "25" ;
LOCATE COMP "pin9_jtgnb" SITE "26" ;
LOCATE COMP "pin10_sda" SITE "27" ;
LOCATE COMP "pin11_scl" SITE "28" ;
LOCATE COMP "pin16" SITE "4" ;
LOCATE COMP "pin17" SITE "5" ;
LOCATE COMP "pin18_cs" SITE "8" ;
LOCATE COMP "pin19_sclk" SITE "9" ;
LOCATE COMP "pin20_miso" SITE "10" ;
LOCATE COMP "pin21" SITE "11" ;
LOCATE COMP "pin22" SITE "12" ;
BLOCK RESETPATHS ;
BLOCK ASYNCPATHS ;
LOCATE COMP "pin1" SITE "13" ;
LOCATE COMP "pin2" SITE "14" ;
LOCATE COMP "pin3_sn" SITE "16" ;
LOCATE COMP "pin4_mosi" SITE "17" ;
LOCATE COMP "pin5" SITE "20" ;
LOCATE COMP "pin6" SITE "21" ;
LOCATE COMP "pin7_done" SITE "23" ;
LOCATE COMP "pin8_pgmn" SITE "25" ;
LOCATE COMP "pin9_jtgnb" SITE "26" ;
LOCATE COMP "pin10_sda" SITE "27" ;
LOCATE COMP "pin11_scl" SITE "28" ;
LOCATE COMP "pin16" SITE "4" ;
LOCATE COMP "pin17" SITE "5" ;
LOCATE COMP "pin18_cs" SITE "8" ;
LOCATE COMP "pin19_sclk" SITE "9" ;
LOCATE COMP "pin20_miso" SITE "10" ;
LOCATE COMP "pin21" SITE "11" ;
LOCATE COMP "pin22" SITE "12" ;
0 template_a1/template_a11.sty → Gateware/template_a1/template_a11.sty
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60 changes: 30 additions & 30 deletions template_a2/TinyFPGA_A2.v → Gateware/template_a2/TinyFPGA_A2.v
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@@ -1,29 +1,29 @@
module TinyFPGA_A2 (
inout pin1,
inout pin2,
inout pin3_sn,
inout pin4_mosi,
inout pin5,
inout pin6,
inout pin7_done,
inout pin8_pgmn,
inout pin9_jtgnb,
inout pin10_sda,
inout pin11_scl,
//inout pin12_tdo,
//inout pin13_tdi,
//inout pin14_tck,
//inout pin15_tms,
inout pin16,
inout pin17,
inout pin18_cs,
inout pin19_sclk,
inout pin20_miso,
inout pin21,
inout pin22
);
// left side of board
module TinyFPGA_A2 (
inout pin1,
inout pin2,
inout pin3_sn,
inout pin4_mosi,
inout pin5,
inout pin6,
inout pin7_done,
inout pin8_pgmn,
inout pin9_jtgnb,
inout pin10_sda,
inout pin11_scl,
//inout pin12_tdo,
//inout pin13_tdi,
//inout pin14_tck,
//inout pin15_tms,
inout pin16,
inout pin17,
inout pin18_cs,
inout pin19_sclk,
inout pin20_miso,
inout pin21,
inout pin22
);

// left side of board
assign pin1 = 1'bz;
assign pin2 = 1'bz;
assign pin3_sn = 1'bz;
Expand All @@ -34,8 +34,8 @@ module TinyFPGA_A2 (
assign pin8_pgmn = 1'bz;
assign pin9_jtgnb = 1'bz;
assign pin10_sda = 1'bz;
assign pin11_scl = 1'bz;
assign pin11_scl = 1'bz;

// right side of board
//assign pin12_tdo = 1'bz;
//assign pin13_tdi = 1'bz;
Expand All @@ -47,6 +47,6 @@ module TinyFPGA_A2 (
assign pin19_sclk = 1'bz;
assign pin20_miso = 1'bz;
assign pin21 = 1'bz;
assign pin22 = 1'bz;
assign pin22 = 1'bz;

endmodule
0 template_a2/template_a2.ldf → Gateware/template_a2/template_a2.ldf
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40 changes: 20 additions & 20 deletions template_a2/template_a2.lpf → Gateware/template_a2/template_a2.lpf
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@@ -1,20 +1,20 @@
BLOCK RESETPATHS ;
BLOCK ASYNCPATHS ;
LOCATE COMP "pin1" SITE "13" ;
LOCATE COMP "pin2" SITE "14" ;
LOCATE COMP "pin3_sn" SITE "16" ;
LOCATE COMP "pin4_mosi" SITE "17" ;
LOCATE COMP "pin5" SITE "20" ;
LOCATE COMP "pin6" SITE "21" ;
LOCATE COMP "pin7_done" SITE "23" ;
LOCATE COMP "pin8_pgmn" SITE "25" ;
LOCATE COMP "pin9_jtgnb" SITE "26" ;
LOCATE COMP "pin10_sda" SITE "27" ;
LOCATE COMP "pin11_scl" SITE "28" ;
LOCATE COMP "pin16" SITE "4" ;
LOCATE COMP "pin17" SITE "5" ;
LOCATE COMP "pin18_cs" SITE "8" ;
LOCATE COMP "pin19_sclk" SITE "9" ;
LOCATE COMP "pin20_miso" SITE "10" ;
LOCATE COMP "pin21" SITE "11" ;
LOCATE COMP "pin22" SITE "12" ;
BLOCK RESETPATHS ;
BLOCK ASYNCPATHS ;
LOCATE COMP "pin1" SITE "13" ;
LOCATE COMP "pin2" SITE "14" ;
LOCATE COMP "pin3_sn" SITE "16" ;
LOCATE COMP "pin4_mosi" SITE "17" ;
LOCATE COMP "pin5" SITE "20" ;
LOCATE COMP "pin6" SITE "21" ;
LOCATE COMP "pin7_done" SITE "23" ;
LOCATE COMP "pin8_pgmn" SITE "25" ;
LOCATE COMP "pin9_jtgnb" SITE "26" ;
LOCATE COMP "pin10_sda" SITE "27" ;
LOCATE COMP "pin11_scl" SITE "28" ;
LOCATE COMP "pin16" SITE "4" ;
LOCATE COMP "pin17" SITE "5" ;
LOCATE COMP "pin18_cs" SITE "8" ;
LOCATE COMP "pin19_sclk" SITE "9" ;
LOCATE COMP "pin20_miso" SITE "10" ;
LOCATE COMP "pin21" SITE "11" ;
LOCATE COMP "pin22" SITE "12" ;
0 template_a2/template_a21.sty → Gateware/template_a2/template_a21.sty
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8 changes: 8 additions & 0 deletions Hardware/.gitignore
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@@ -0,0 +1,8 @@
*_Implmnt/
stdout.log
synlog.tcl
*~
*.swp
*bak
gerbers/

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93 changes: 93 additions & 0 deletions Hardware/Libraries/FP_tinyFPGA-AX2.pretty/32QFN.kicad_mod
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(module 32QFN (layer F.Cu) (tedit 592B3A1F)
(attr smd)
(fp_text reference U1 (at 0 -1.7145) (layer F.Fab)
(effects (font (size 0.5 0.5) (thickness 0.125)))
)
(fp_text value LCMXO2-1200HC-4SG32C (at 0 1.27) (layer F.Fab)
(effects (font (size 0.3 0.25) (thickness 0.0625)))
)
(fp_line (start -2.5 -1.5) (end -1.5 -2.5) (layer F.Fab) (width 0.15))
(fp_line (start -2.5 2.5) (end -2.5 -1.5) (layer F.Fab) (width 0.15))
(fp_line (start 2.5 2.5) (end -2.5 2.5) (layer F.Fab) (width 0.15))
(fp_line (start 2.5 -2.5) (end 2.5 2.5) (layer F.Fab) (width 0.15))
(fp_line (start -1.5 -2.5) (end 2.5 -2.5) (layer F.Fab) (width 0.15))
(fp_line (start -1.25 0) (end 1.25 0) (layer F.Mask) (width 0.3))
(fp_line (start -1.35 1.35) (end -1.35 -1.35) (layer F.Mask) (width 0.15))
(fp_line (start 1.35 1.35) (end -1.35 1.35) (layer F.Mask) (width 0.15))
(fp_line (start 1.35 -1.35) (end 1.35 1.35) (layer F.Mask) (width 0.15))
(fp_line (start -1.35 -1.35) (end 1.35 -1.35) (layer F.Mask) (width 0.15))
(fp_line (start 0 -1.25) (end 0 1.25) (layer F.Mask) (width 0.3))
(pad 33 smd rect (at -0.7 0.7) (size 1.17 1.17) (layers F.Cu F.Paste F.Mask))
(pad 33 smd rect (at 0.7 -0.7) (size 1.17 1.17) (layers F.Cu F.Paste F.Mask))
(pad 33 smd rect (at 0.7 0.7) (size 1.17 1.17) (layers F.Cu F.Paste F.Mask))
(pad 33 smd rect (at -0.7 -0.7) (size 1.17 1.17) (layers F.Cu F.Paste F.Mask))
(pad 1 smd oval (at -2.5 -1.75) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 2 smd oval (at -2.5 -1.25) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 3 smd oval (at -2.5 -0.75) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 4 smd oval (at -2.5 -0.25) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 5 smd oval (at -2.5 0.25) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 6 smd oval (at -2.5 0.75) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 7 smd oval (at -2.5 1.25) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 8 smd oval (at -2.5 1.75) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 9 smd oval (at -1.75 2.5 90) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 10 smd oval (at -1.25 2.5 90) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 11 smd oval (at -0.75 2.5 90) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 12 smd oval (at -0.25 2.5 90) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 13 smd oval (at 0.25 2.5 90) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 14 smd oval (at 0.75 2.5 90) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 15 smd oval (at 1.25 2.5 90) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 16 smd oval (at 1.75 2.5 90) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 17 smd oval (at 2.5 1.75) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 18 smd oval (at 2.5 1.25) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 19 smd oval (at 2.5 0.75) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 20 smd oval (at 2.5 0.25) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 21 smd oval (at 2.5 -0.25) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 22 smd oval (at 2.5 -0.75) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 23 smd oval (at 2.5 -1.25) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 24 smd oval (at 2.5 -1.75) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 25 smd oval (at 1.75 -2.5 90) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 26 smd oval (at 1.25 -2.5 90) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 27 smd oval (at 0.75 -2.5 90) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 28 smd oval (at 0.25 -2.5 90) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 29 smd oval (at -0.25 -2.5 90) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 30 smd oval (at -0.75 -2.5 90) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 31 smd oval (at -1.25 -2.5 90) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(pad 32 smd oval (at -1.75 -2.5 90) (size 0.7 0.24) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.07))
(model Housings_DFN_QFN.3dshapes/QFN-32-1EP_5x5mm_Pitch0.5mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
31 changes: 31 additions & 0 deletions Hardware/Libraries/FP_tinyFPGA-AX2.pretty/C_0603.kicad_mod
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(module Capacitors_SMD:C_0603 (layer F.Cu) (tedit 5914069B)
(descr "Capacitor SMD 0603, reflow soldering, AVX (see smccp.pdf)")
(tags "capacitor 0603")
(attr smd)
(fp_text reference C7 (at -1.27 0) (layer F.Fab) hide
(effects (font (size 0.3 0.3) (thickness 0.075)))
)
(fp_text value 10nF (at -0.00254 -0.01016) (layer F.Fab)
(effects (font (size 0.3 0.3) (thickness 0.075)))
)
(fp_text user %R (at -1.27 0) (layer F.Fab)
(effects (font (size 0.3 0.3) (thickness 0.075)))
)
(fp_line (start -0.8 0.4) (end -0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 0.4) (end -0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start 0.8 -0.4) (end 0.8 0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.8 -0.4) (end 0.8 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.35 -0.6) (end 0.35 -0.6) (layer F.SilkS) (width 0.12))
(fp_line (start 0.35 0.6) (end -0.35 0.6) (layer F.SilkS) (width 0.12))
(fp_line (start -1.4 -0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.4 -0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.4 0.65) (end 1.4 -0.65) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.4 0.65) (end -1.4 0.65) (layer F.CrtYd) (width 0.05))
(pad 2 smd rect (at 0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask))
(pad 1 smd rect (at -0.75 0) (size 0.8 0.75) (layers F.Cu F.Paste F.Mask))
(model Capacitors_SMD.3dshapes/C_0603.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
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