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[AArch64] Add better fcmp costs for expanded predicates #147940

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[AArch64] Add better fcmp costs for expanded predicates #147940

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92 changes: 54 additions & 38 deletions llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -4264,10 +4264,9 @@ InstructionCost AArch64TTIImpl::getCmpSelInstrCost(
unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
TTI::TargetCostKind CostKind, TTI::OperandValueInfo Op1Info,
TTI::OperandValueInfo Op2Info, const Instruction *I) const {
int ISD = TLI->InstructionOpcodeToISD(Opcode);
// We don't lower some vector selects well that are wider than the register
// width. TODO: Improve this with different cost kinds.
if (isa<FixedVectorType>(ValTy) && ISD == ISD::SELECT) {
if (isa<FixedVectorType>(ValTy) && Opcode == Instruction::Select) {
// We would need this many instructions to hide the scalarization happening.
const int AmortizationCost = 20;

Expand Down Expand Up @@ -4297,63 +4296,80 @@ InstructionCost AArch64TTIImpl::getCmpSelInstrCost(
return LT.first;
}

static const TypeConversionCostTblEntry
VectorSelectTbl[] = {
{ ISD::SELECT, MVT::v2i1, MVT::v2f32, 2 },
{ ISD::SELECT, MVT::v2i1, MVT::v2f64, 2 },
{ ISD::SELECT, MVT::v4i1, MVT::v4f32, 2 },
{ ISD::SELECT, MVT::v4i1, MVT::v4f16, 2 },
{ ISD::SELECT, MVT::v8i1, MVT::v8f16, 2 },
{ ISD::SELECT, MVT::v16i1, MVT::v16i16, 16 },
{ ISD::SELECT, MVT::v8i1, MVT::v8i32, 8 },
{ ISD::SELECT, MVT::v16i1, MVT::v16i32, 16 },
{ ISD::SELECT, MVT::v4i1, MVT::v4i64, 4 * AmortizationCost },
{ ISD::SELECT, MVT::v8i1, MVT::v8i64, 8 * AmortizationCost },
{ ISD::SELECT, MVT::v16i1, MVT::v16i64, 16 * AmortizationCost }
};
static const TypeConversionCostTblEntry VectorSelectTbl[] = {
{Instruction::Select, MVT::v2i1, MVT::v2f32, 2},
{Instruction::Select, MVT::v2i1, MVT::v2f64, 2},
{Instruction::Select, MVT::v4i1, MVT::v4f32, 2},
{Instruction::Select, MVT::v4i1, MVT::v4f16, 2},
{Instruction::Select, MVT::v8i1, MVT::v8f16, 2},
{Instruction::Select, MVT::v16i1, MVT::v16i16, 16},
{Instruction::Select, MVT::v8i1, MVT::v8i32, 8},
{Instruction::Select, MVT::v16i1, MVT::v16i32, 16},
{Instruction::Select, MVT::v4i1, MVT::v4i64, 4 * AmortizationCost},
{Instruction::Select, MVT::v8i1, MVT::v8i64, 8 * AmortizationCost},
{Instruction::Select, MVT::v16i1, MVT::v16i64, 16 * AmortizationCost}};

EVT SelCondTy = TLI->getValueType(DL, CondTy);
EVT SelValTy = TLI->getValueType(DL, ValTy);
if (SelCondTy.isSimple() && SelValTy.isSimple()) {
if (const auto *Entry = ConvertCostTableLookup(VectorSelectTbl, ISD,
if (const auto *Entry = ConvertCostTableLookup(VectorSelectTbl, Opcode,
SelCondTy.getSimpleVT(),
SelValTy.getSimpleVT()))
return Entry->Cost;
}
}

if (isa<FixedVectorType>(ValTy) && ISD == ISD::SETCC) {
Type *ValScalarTy = ValTy->getScalarType();
if ((ValScalarTy->isHalfTy() && !ST->hasFullFP16()) ||
ValScalarTy->isBFloatTy()) {
auto *ValVTy = cast<FixedVectorType>(ValTy);

// Without dedicated instructions we promote [b]f16 compares to f32.
auto *PromotedTy =
VectorType::get(Type::getFloatTy(ValTy->getContext()), ValVTy);

InstructionCost Cost = 0;
// Promote operands to float vectors.
Cost += 2 * getCastInstrCost(Instruction::FPExt, PromotedTy, ValTy,
TTI::CastContextHint::None, CostKind);
// Compare float vectors.
if (Opcode == Instruction::FCmp) {
// Without dedicated instructions we promote f16 + bf16 compares to f32.
if ((!ST->hasFullFP16() && ValTy->getScalarType()->isHalfTy()) ||
ValTy->getScalarType()->isBFloatTy()) {
Type *PromotedTy =
ValTy->getWithNewType(Type::getFloatTy(ValTy->getContext()));
InstructionCost Cost =
getCastInstrCost(Instruction::FPExt, PromotedTy, ValTy,
TTI::CastContextHint::None, CostKind);
if (!Op1Info.isConstant() && !Op2Info.isConstant())
Cost *= 2;
Cost += getCmpSelInstrCost(Opcode, PromotedTy, CondTy, VecPred, CostKind,
Op1Info, Op2Info);
// During codegen we'll truncate the vector result from i32 to i16.
Cost +=
getCastInstrCost(Instruction::Trunc, VectorType::getInteger(ValVTy),
VectorType::getInteger(PromotedTy),
TTI::CastContextHint::None, CostKind);
if (ValTy->isVectorTy())
Cost += getCastInstrCost(
Instruction::Trunc, VectorType::getInteger(cast<VectorType>(ValTy)),
VectorType::getInteger(cast<VectorType>(PromotedTy)),
TTI::CastContextHint::None, CostKind);
return Cost;
}

auto LT = getTypeLegalizationCost(ValTy);
// Model unknown fp compares as a libcall.
if (LT.second.getScalarType() != MVT::f64 &&
LT.second.getScalarType() != MVT::f32 &&
LT.second.getScalarType() != MVT::f16)
return LT.first * getCallInstrCost(/*Function*/ nullptr, ValTy,
{ValTy, ValTy}, CostKind);

// Some comparison operators require expanding to multiple compares + or.
unsigned Factor = 1;
if (!CondTy->isVectorTy() &&
(VecPred == FCmpInst::FCMP_ONE || VecPred == FCmpInst::FCMP_UEQ))
Factor = 2; // fcmp with 2 selects
else if (isa<FixedVectorType>(ValTy) &&
(VecPred == FCmpInst::FCMP_ONE || VecPred == FCmpInst::FCMP_UEQ ||
VecPred == FCmpInst::FCMP_ORD))
Factor = 3; // fcmxx+fcmyy+or
else if (isa<ScalableVectorType>(ValTy) &&
(VecPred == FCmpInst::FCMP_ONE || VecPred == FCmpInst::FCMP_UEQ))
Factor = 3; // fcmxx+fcmyy+or

return Factor * (CostKind == TTI::TCK_Latency ? 2 : LT.first);
}

// Treat the icmp in icmp(and, 0) or icmp(and, -1/1) when it can be folded to
// icmp(and, 0) as free, as we can make use of ands, but only if the
// comparison is not unsigned. FIXME: Enable for non-throughput cost kinds
// providing it will not cause performance regressions.
if (CostKind == TTI::TCK_RecipThroughput && ValTy->isIntegerTy() &&
ISD == ISD::SETCC && I && !CmpInst::isUnsigned(VecPred) &&
Opcode == Instruction::ICmp && I && !CmpInst::isUnsigned(VecPred) &&
TLI->isTypeLegal(TLI->getValueType(DL, ValTy)) &&
match(I->getOperand(0), m_And(m_Value(), m_Value()))) {
if (match(I->getOperand(1), m_Zero()))
Expand Down
16 changes: 8 additions & 8 deletions llvm/test/Analysis/CostModel/AArch64/cmp.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -13,14 +13,14 @@ define void @cmps() {
; CHECK-NEXT: Cost Model: Found costs of 1 for: %cv16i8 = icmp slt <16 x i8> undef, undef
; CHECK-NEXT: Cost Model: Found costs of 1 for: %cv8i16 = icmp ult <8 x i16> undef, undef
; CHECK-NEXT: Cost Model: Found costs of 1 for: %cv4i32 = icmp sge <4 x i32> undef, undef
; CHECK-NEXT: Cost Model: Found costs of 1 for: %cf16 = fcmp oge half undef, undef
; CHECK-NEXT: Cost Model: Found costs of 1 for: %cf32 = fcmp ogt float undef, undef
; CHECK-NEXT: Cost Model: Found costs of 1 for: %cf64 = fcmp ogt double undef, undef
; CHECK-NEXT: Cost Model: Found costs of 1 for: %cbf64 = fcmp ogt bfloat undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:4 Lat:4 SizeLat:4 for: %cfv816 = fcmp olt <8 x half> undef, undef
; CHECK-NEXT: Cost Model: Found costs of 1 for: %cfv432 = fcmp oge <4 x float> undef, undef
; CHECK-NEXT: Cost Model: Found costs of 1 for: %cfv264 = fcmp oge <2 x double> undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:4 Lat:4 SizeLat:4 for: %cbfv816 = fcmp olt <8 x bfloat> undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:3 CodeSize:3 Lat:4 SizeLat:3 for: %cf16 = fcmp oge half undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:2 SizeLat:1 for: %cf32 = fcmp ogt float undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:2 SizeLat:1 for: %cf64 = fcmp ogt double undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:3 CodeSize:3 Lat:4 SizeLat:3 for: %cbf64 = fcmp ogt bfloat undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:5 Lat:5 SizeLat:5 for: %cfv816 = fcmp olt <8 x half> undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:2 SizeLat:1 for: %cfv432 = fcmp oge <4 x float> undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:2 SizeLat:1 for: %cfv264 = fcmp oge <2 x double> undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:7 CodeSize:5 Lat:5 SizeLat:5 for: %cbfv816 = fcmp olt <8 x bfloat> undef, undef
; CHECK-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
%c8 = icmp slt i8 undef, undef
Expand Down
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