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Methods that read/write digital outputs invert the signals so that the actual output matches the logical value; i.e., dout=0 causes low output (0V), dout=1 causes high output (e.g., 5V).
Watchdog is now automatically reset when any write command is sent (sends a no-op if needed)
New features:
Added HasEthernet method to AmpIO; returns true for FPGA V2.x.
pgm1394 detects FPGA hardware version (V1.x or V2.x) and automatically selects correct programming file (FPGA1394-QLA.mcs for V1.x and FPGA1394Eth-QLA.mcs for V2.x).
Added options to read FPGA and QLA serial numbers in pgm1394.
Ongoing development for ethernet/PCAP and FPGA based velocity estimation (will require firmware > 5 not yet released)
Can be compiled on Windows for future ethernet support
Updated Python wrappers
Bug fixes:
qladisp and qlatest: fixed streaming of long error messages