Harvard Architecture, Circuits, and Compilers
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- Cambridge, MA
- http://vlsiarch.eecs.harvard.edu/
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- FlexASR Public
FlexASR: A Reconfigurable Hardware Accelerator for Attention-based Seq-to-Seq Networks
harvard-acc/FlexASR’s past year of commit activity - EdgeBERT Public
HW/SW co-design of sentence-level energy optimizations for latency-aware multi-task NLP inference
harvard-acc/EdgeBERT’s past year of commit activity - Trireme Public Forked from GiorgioZacharo/Trireme
Trireme: Exploring Hierarchical Multi-Level Parallelism for Domain Specific Hardware Acceleration
harvard-acc/Trireme’s past year of commit activity - gem5-aladdin Public
End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.
harvard-acc/gem5-aladdin’s past year of commit activity - RecPipe Public
harvard-acc/RecPipe’s past year of commit activity
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