-
Updated
Oct 7, 2021 - Verilog
cpu-design
Here are 39 public repositories matching this topic...
4-bit CPU designed with discrete components and 74-series ICs.
-
Updated
Feb 12, 2022 - HTML
This repository contains the CENG3010 Computer Organization course projects. The first project involves developing a GUI-based 32-bit MIPS simulator, while the second project centers on designing a custom 16-bit MIPS-like processor with a unique instruction set.
-
Updated
Aug 6, 2024 - JavaScript
A computer I'm building from scratch out of ICs
-
Updated
Apr 11, 2020 - Prolog
These files make up my home made processor in Verilog. I simulated my processor on an FPGA to create an arcade style duck hunt game!
-
Updated
Jul 8, 2024 - Verilog
Hust Courses for learning Computer hardware design,also It's the experiment of COA(Computer Organization and Architecture)
-
Updated
Jul 5, 2021
Github repo containing all the VHDL files for the EE224 course project involving designing a rudimentary CPU.
-
Updated
May 20, 2024 - VHDL
This project involves designing a single-core RISC-V CPU using Verilog. The design includes an Arithmetic Logic Unit (ALU) with flags, an assembly to machine code converter, a control unit, a microarchitecture and memory initialization to ensure proper functioning of the CPU.
-
Updated
Oct 11, 2024 - JavaScript
Verilog CPU Design Project, ELEC 374 - Digital Systems Engineering
-
Updated
Mar 27, 2023 - Verilog
Verilog implementation of 16-bit RISC Processor with 4-stage pipeline
-
Updated
May 4, 2018 - Verilog
Single-cycle and multi-cycle implementation of a subset of MIPS instruction set
-
Updated
Jul 8, 2022 - Verilog
-
Updated
Sep 5, 2024
FISC-Microlang is a low level language below Assembly. It is used in the FISC project for creating the Microcode memory.
-
Updated
Jun 4, 2018 - M4
An open-source design for an 8-bit RISC CPU
-
Updated
Aug 12, 2018 - Python
Sngle-cycle, Multi-cycle and Pipeline MIPS implementations; Spring 2022
-
Updated
Jul 3, 2023 - Verilog
Building a computer from first principles. Logic Gates -> CPU Architecture -> Machine Language -> VM -> High-Level Language -> Compiler -> OS -> DS & A
-
Updated
Mar 16, 2023 - Hack
Improve this page
Add a description, image, and links to the cpu-design topic page so that developers can more easily learn about it.
Add this topic to your repo
To associate your repository with the cpu-design topic, visit your repo's landing page and select "manage topics."