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[STM32H735]: Set hardware breakpoints for external bus #1219

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c-grant opened this issue Jan 26, 2022 · 0 comments
Closed

[STM32H735]: Set hardware breakpoints for external bus #1219

c-grant opened this issue Jan 26, 2022 · 0 comments

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@c-grant
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c-grant commented Jan 26, 2022

Programmer/board type: [STLINK V3 on STM32H735-DK]
Operating system an version: [Windows 10 19042.1083]
stlink tools version and/or git commit hash: [1.7.0] + pull requests to access external memory
stlink commandline tool name: [st-util]
Target chip (and board, if applicable): [STM32H735 on STM32H735-DK]

GDB is setting breakpoints based on the XML memory map designation of "rom" or "ram", which is hardcoded in st-util for a given processor

However the external bus can be RAM or ROM depending on design. The STM32H735-DK has external FLASH at address 0x90000000. As a result, because the entire external memory range is "ram" as it could be either, software breakpoints (Z0) get sent when a breakpoint is created and the never get tripped as the memory area is read only.

@Nightwalker-87 Nightwalker-87 added this to the v1.7.1 milestone Jan 27, 2022
@Nightwalker-87 Nightwalker-87 changed the title [STM32H735]: Set Hardware Breakpoints For External Bus STM32H735: Set Hardware Breakpoints For External Bus Jan 6, 2023
@Nightwalker-87 Nightwalker-87 modified the milestones: v1.8.0, v1.8.1 Apr 2, 2023
@Nightwalker-87 Nightwalker-87 modified the milestones: v1.8.1, Longlist Sep 4, 2023
@Nightwalker-87 Nightwalker-87 self-assigned this Nov 27, 2023
@Nightwalker-87 Nightwalker-87 changed the title STM32H735: Set Hardware Breakpoints For External Bus [STM32H735]: Set Hardware Breakpoints For External Bus Dec 23, 2023
@Nightwalker-87 Nightwalker-87 changed the title [STM32H735]: Set Hardware Breakpoints For External Bus [STM32H735]: Set hardware breakpoints for external bus Dec 23, 2023
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