From 6a713bc9e148444e5cb1d8237ebcccbbb1a82079 Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Tue, 18 Jul 2023 13:04:00 +0800
Subject: [PATCH 01/32] platform support M2-W6510

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../M2-W6510-48V8C/port_config.ini            |   57 +
 .../M2-W6510-48V8C/sai.profile                |    1 +
 ...d3-m2-w6510-48v8c-48x25G+8x100G.config.bcm |  604 +++
 .../custom_led.bin                            |  Bin 0 -> 236 bytes
 .../default_sku                               |    1 +
 .../x86_64-micas_m2-w6510-48v8c-r0/dev.xml    |  419 ++
 .../dev_exhaust.xml                           |  419 ++
 .../x86_64-micas_m2-w6510-48v8c-r0/fru.py     |  961 +++++
 .../installer.conf                            |    2 +
 .../latest_firmware/bios_upgrade_header.bin   |  Bin 0 -> 8388725 bytes
 .../cpu_cpld_upgrade_header.vme               |  Bin 0 -> 286723 bytes
 .../latest_firmware/fpga_upgrade_header.bin   |  Bin 0 -> 3180414 bytes
 .../other_cpld_upgrade_header.vme             |  Bin 0 -> 1105536 bytes
 .../led_proc_init.soc                         |    7 +
 .../x86_64-micas_m2-w6510-48v8c-r0/monitor.py |  402 ++
 .../x86_64-micas_m2-w6510-48v8c-r0/pcie.yaml  |  440 +++
 .../platform.json                             |  402 ++
 .../platform_asic                             |    1 +
 .../platform_components.json                  |   37 +
 .../plugins/sfputil.py                        |  243 ++
 .../plugins/ssd_util.py                       |  311 ++
 .../pmon_daemon_control.json                  |    3 +
 .../system_health_monitoring_config.json      |    0
 platform/broadcom/one-image.mk                |    3 +-
 platform/broadcom/platform-modules-micas.dep  |    9 +
 platform/broadcom/platform-modules-micas.mk   |   50 +
 platform/broadcom/rules.dep                   |    1 +
 platform/broadcom/rules.mk                    |    1 +
 .../sonic-platform-modules-micas/LICENSE      |   14 +
 .../common/Makefile                           |   42 +
 .../common/app/Makefile                       |   25 +
 .../common/app/dev_util/Makefile              |   30 +
 .../common/app/dev_util/dfd_debug.c           |   43 +
 .../common/app/dev_util/dfd_utest.c           | 1802 +++++++++
 .../common/app/dev_util/dfd_utest.h           |  103 +
 .../common/app/firmware_upgrade/Makefile      |   19 +
 .../common/app/firmware_upgrade/Rules.mk      |   42 +
 .../firmware_upgrade/firmware_driver/Makefile |   19 +
 .../firmware_driver_cpld/Makefile             |   23 +
 .../firmware_driver_cpld/firmware.c           |  144 +
 .../firmware_driver_cpld/firmware_cpld.c      |  384 ++
 .../firmware_cpld_upgrade.c                   | 1879 +++++++++
 .../firmware_driver_cpld/include/firmware.h   |   82 +
 .../include/firmware_cpld.h                   |   64 +
 .../firmware_driver_cpld/include/jbi.h        |   15 +
 .../firmware_driver_cpld/jbicomp.c            |  438 +++
 .../firmware_driver_cpld/jbicomp.h            |   37 +
 .../firmware_driver_cpld/jbiexprt.h           |  224 ++
 .../firmware_driver_cpld/jbijtag.c            | 1679 ++++++++
 .../firmware_driver_cpld/jbijtag.h            |  146 +
 .../firmware_driver_cpld/jbimain.c            | 3362 +++++++++++++++++
 .../firmware_driver_cpld/jbiport.h            |   45 +
 .../firmware_driver_cpld/jbistub.c            | 2518 ++++++++++++
 .../firmware_driver_cpld/jbistub.h            |   95 +
 .../firmware_driver_ispvme/Makefile           |   22 +
 .../firmware_cpld_ispvme.c                    |  450 +++
 .../firmware_cpld_upgrade_ispvme.c            |  691 ++++
 .../firmware_driver_ispvme/firmware_ispvme.c  |  140 +
 .../include/firmware_cpld_ispvme.h            |   70 +
 .../include/firmware_ispvme.h                 |   86 +
 .../firmware_driver_sysfs/Makefile            |   22 +
 .../firmware_driver_sysfs/firmware.c          |  143 +
 .../firmware_driver_sysfs/firmware_sysfs.c    |  495 +++
 .../firmware_sysfs_upgrade.c                  |  258 ++
 .../include/firmware_sysfs.h                  |   88 +
 .../include/firmware_sysfs_upgrade.h          |   72 +
 .../include/firmware_upgrade.h                |   57 +
 .../firmware_upgrade/Makefile                 |   33 +
 .../firmware_upgrade/firmware_upgrade/crc32.c |  216 ++
 .../firmware_upgrade/firmware_upgrade/debug.c |   60 +
 .../firmware_upgrade/firmware_app.c           |  985 +++++
 .../fw_upg_gpio_vme/hardware.c                |  263 ++
 .../fw_upg_gpio_vme/ispvm_ui.c                |  837 ++++
 .../fw_upg_gpio_vme/ivm_core.c                | 3097 +++++++++++++++
 .../fw_upg_isc/firmware_upgrade_isc.c         |   68 +
 .../fw_upg_mtd/firmware_upgrade_mtd.c         |  446 +++
 .../fw_upg_mtd/firmware_upgrade_mtd.h         |   32 +
 .../firmware_upgrade/fw_upg_mtd/mtd-abi.h     |  259 ++
 .../fw_upg_sysfs/firmware_upgrade_sysfs.c     |  285 ++
 .../fw_upg_sysfs/firmware_upgrade_sysfs.h     |   16 +
 .../fw_upg_sysfs/fw_upg_spi_logic_dev.c       | 1181 ++++++
 .../fw_upg_sysfs/fw_upg_spi_logic_dev.h       |   90 +
 .../firmware_upgrade/include/debug.h          |   34 +
 .../firmware_upgrade/include/firmware_app.h   |  172 +
 .../firmware_upgrade/include/vmopcode.h       |  192 +
 .../common/app/fw_upgrade/Makefile            |   18 +
 .../common/app/fw_upgrade/Rules.mk            |   42 +
 .../common/app/fw_upgrade/fw_upgrade/Makefile |   39 +
 .../app/fw_upgrade/fw_upgrade/fw_upgrade.c    | 1632 ++++++++
 .../fw_upgrade/fw_upgrade/fw_upgrade_debug.c  |   51 +
 .../fw_upgrade/include/fw_upgrade.h           |  230 ++
 .../fw_upgrade/include/fw_upgrade_debug.h     |   25 +
 .../common/lib/algorithm/__init__.py          |    0
 .../common/lib/algorithm/hysteresis.py        |  169 +
 .../common/lib/algorithm/openloop.py          |  104 +
 .../common/lib/algorithm/pid.py               |  106 +
 .../common/lib/eepromutil/__init__.py         |    0
 .../common/lib/eepromutil/fantlv.py           |  192 +
 .../common/lib/eepromutil/fru.py              |  961 +++++
 .../common/lib/eepromutil/onietlv.py          |  441 +++
 .../common/lib/plat_hal/__init__.py           |    0
 .../common/lib/plat_hal/baseutil.py           |  164 +
 .../common/lib/plat_hal/chassisbase.py        |  318 ++
 .../common/lib/plat_hal/component.py          |   33 +
 .../common/lib/plat_hal/cpld.py               |   66 +
 .../common/lib/plat_hal/cpu.py                |   48 +
 .../common/lib/plat_hal/dcdc.py               |   11 +
 .../common/lib/plat_hal/devicebase.py         |  348 ++
 .../common/lib/plat_hal/fan.py                |  417 ++
 .../common/lib/plat_hal/interface.py          | 1327 +++++++
 .../common/lib/plat_hal/led.py                |   52 +
 .../common/lib/plat_hal/onie_e2.py            |  127 +
 .../common/lib/plat_hal/osutil.py             |  440 +++
 .../common/lib/plat_hal/psu.py                |  607 +++
 .../common/lib/plat_hal/rotor.py              |  149 +
 .../common/lib/plat_hal/sensor.py             |  219 ++
 .../common/lib/plat_hal/temp.py               |  139 +
 .../common/lib/wbutil/__init__.py             |    0
 .../common/lib/wbutil/baseutil.py             |   38 +
 .../common/lib/wbutil/smbus.py                |  772 ++++
 .../kernel_drivers_blacklist.conf             |    5 +
 .../common/modules/Makefile                   |   55 +
 .../common/modules/dfd_tlveeprom.c            |  516 +++
 .../common/modules/dfd_tlveeprom.h            |  121 +
 .../common/modules/fpga_i2c.h                 |  133 +
 .../common/modules/intel_spi/Makefile         |   21 +
 .../modules/intel_spi/include/intel_spi.h     |   23 +
 .../common/modules/intel_spi/intel_spi.c      |  969 +++++
 .../modules/intel_spi/intel_spi_platform.c    |  167 +
 .../common/modules/linux-5.10/Makefile        |   34 +
 .../common/modules/linux-5.10/wb_at24.c       |  861 +++++
 .../common/modules/linux-5.10/wb_csu550.c     |  236 ++
 .../modules/linux-5.10/wb_i2c_algo_bit.c      |  725 ++++
 .../common/modules/linux-5.10/wb_i2c_gpio.c   |  431 +++
 .../modules/linux-5.10/wb_i2c_gpio_device.c   |  110 +
 .../common/modules/linux-5.10/wb_i2c_i801.c   | 2114 +++++++++++
 .../modules/linux-5.10/wb_i2c_mux_pca954x.c   | 1332 +++++++
 .../modules/linux-5.10/wb_i2c_mux_pca954x.h   |   67 +
 .../modules/linux-5.10/wb_i2c_mux_pca9641.c   | 1395 +++++++
 .../modules/linux-5.10/wb_i2c_mux_pca9641.h   |   64 +
 .../common/modules/linux-5.10/wb_ina3221.c    | 1031 +++++
 .../common/modules/linux-5.10/wb_isl68137.c   |  572 +++
 .../common/modules/linux-5.10/wb_lm75.c       |  987 +++++
 .../common/modules/linux-5.10/wb_lm75.h       |   40 +
 .../common/modules/linux-5.10/wb_pmbus.h      |  535 +++
 .../common/modules/linux-5.10/wb_pmbus_core.c | 2780 ++++++++++++++
 .../common/modules/linux-5.10/wb_tmp401.c     |  798 ++++
 .../common/modules/linux-5.10/wb_tps53622.c   |  265 ++
 .../common/modules/linux-5.10/wb_ucd9000.c    |  675 ++++
 .../common/modules/plat_sysfs/Makefile        |   20 +
 .../modules/plat_sysfs/dev_cfg/Makefile       |   25 +
 .../modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c  |  812 ++++
 .../plat_sysfs/dev_cfg/cfg/dfd_cfg_adapter.c  |  351 ++
 .../plat_sysfs/dev_cfg/cfg/dfd_cfg_file.c     |  236 ++
 .../plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c     |  593 +++
 .../plat_sysfs/dev_cfg/cfg/dfd_cfg_listnode.c |   82 +
 .../plat_sysfs/dev_cfg/dfd_fan_driver.c       |  170 +
 .../modules/plat_sysfs/dev_cfg/dfd_module.c   |   95 +
 .../plat_sysfs/dev_cfg/dfd_psu_driver.c       |   70 +
 .../plat_sysfs/dev_cfg/dfd_sensors_driver.c   |  149 +
 .../plat_sysfs/dev_cfg/dfd_sff_driver.c       |   56 +
 .../plat_sysfs/dev_cfg/dfd_slot_driver.c      |   27 +
 .../plat_sysfs/dev_cfg/include/dfd_cfg.h      |   97 +
 .../dev_cfg/include/dfd_cfg_adapter.h         |   46 +
 .../plat_sysfs/dev_cfg/include/dfd_cfg_file.h |   37 +
 .../plat_sysfs/dev_cfg/include/dfd_cfg_info.h |  109 +
 .../dev_cfg/include/dfd_cfg_listnode.h        |   30 +
 .../dev_cfg/include/dfd_fan_driver.h          |   18 +
 .../plat_sysfs/dev_cfg/include/dfd_module.h   |   96 +
 .../dev_cfg/include/dfd_psu_driver.h          |   10 +
 .../dev_cfg/include/dfd_sensors_driver.h      |   10 +
 .../dev_cfg/include/dfd_sff_driver.h          |    8 +
 .../dev_cfg/include/dfd_slot_driver.h         |    6 +
 .../modules/plat_sysfs/dev_sysfs/Makefile     |   21 +
 .../dev_sysfs/include/plat_switch.h           |   86 +
 .../dev_sysfs/include/sysfs_common.h          |   90 +
 .../modules/plat_sysfs/dev_sysfs/plat_fan.c   |  505 +++
 .../modules/plat_sysfs/dev_sysfs/plat_psu.c   |  430 +++
 .../plat_sysfs/dev_sysfs/plat_sensor.c        |  457 +++
 .../modules/plat_sysfs/dev_sysfs/plat_sff.c   |  291 ++
 .../modules/plat_sysfs/dev_sysfs/plat_slot.c  |  667 ++++
 .../plat_sysfs/dev_sysfs/plat_switch.c        |  135 +
 .../common/modules/platform_common.h          |   74 +
 .../common/modules/platform_common_module.c   |  210 +
 .../common/modules/spi-bitbang-txrx.h         |  107 +
 .../common/modules/wb_eeprom_93xx46.c         |  558 +++
 .../common/modules/wb_fpga_i2c_bus_drv.c      | 1120 ++++++
 .../common/modules/wb_fpga_pca954x_drv.c      |  534 +++
 .../common/modules/wb_fpga_pcie.c             |  164 +
 .../common/modules/wb_gpio_d1500.c            |  367 ++
 .../common/modules/wb_gpio_device.c           |   54 +
 .../common/modules/wb_i2c_dev.c               |  774 ++++
 .../common/modules/wb_i2c_dev.h               |   20 +
 .../common/modules/wb_i2c_ocores.c            | 1143 ++++++
 .../common/modules/wb_i2c_ocores.h            |   28 +
 .../common/modules/wb_io_dev.c                |  571 +++
 .../common/modules/wb_io_dev.h                |   21 +
 .../common/modules/wb_lpc_drv.c               |  166 +
 .../common/modules/wb_lpc_drv.h               |   18 +
 .../common/modules/wb_mac_bsc.c               |  660 ++++
 .../common/modules/wb_optoe.c                 | 1192 ++++++
 .../common/modules/wb_pcie_dev.c              |  770 ++++
 .../common/modules/wb_pcie_dev.h              |   26 +
 .../common/modules/wb_platform_i2c_dev.c      |  749 ++++
 .../common/modules/wb_platform_i2c_dev.h      |   19 +
 .../common/modules/wb_spi_93xx46.c            |  111 +
 .../common/modules/wb_spi_dev.c               |  684 ++++
 .../common/modules/wb_spi_dev.h               |   17 +
 .../common/modules/wb_spi_gpio.c              |  477 +++
 .../common/modules/wb_spi_gpio_device.c       |  153 +
 .../common/modules/wb_spi_nor_device.c        |   87 +
 .../common/modules/wb_spi_ocores.c            | 1025 +++++
 .../common/modules/wb_spi_ocores.h            |   21 +
 .../common/modules/wb_uio_irq.c               |  282 ++
 .../common/modules/wb_wdt.c                   | 1038 +++++
 .../common/modules/wb_wdt.h                   |   46 +
 .../common/modules/wb_xdpe132g5c.c            |  574 +++
 .../common/script/auto_update.py              |  196 +
 .../common/script/avscontrol.py               |  203 +
 .../common/script/dev_monitor.py              |  303 ++
 .../common/script/generate_airflow.py         |  236 ++
 .../common/script/hal_fanctrl.py              | 1135 ++++++
 .../common/script/hal_ledctrl.py              |  830 ++++
 .../common/script/hal_pltfm.py                |  492 +++
 .../common/script/intelligent_monitor.py      |  144 +
 .../script/intelligent_monitor/monitor_fan.py |  284 ++
 .../common/script/platform_common.py          |  178 +
 .../common/script/platform_config.py          |  184 +
 .../common/script/platform_driver.py          |  258 ++
 .../common/script/platform_e2.py              |  434 +++
 .../common/script/platform_intf.py            |  367 ++
 .../common/script/platform_ipmi.py            |   92 +
 .../common/script/platform_manufacturer.py    |  562 +++
 .../common/script/platform_process.py         |  405 ++
 .../common/script/platform_sensors.py         |  253 ++
 .../common/script/platform_test.py            |  142 +
 .../common/script/platform_util.py            |  838 ++++
 .../common/script/pmon_syslog.py              |  519 +++
 .../common/script/reboot_cause.py             |  183 +
 .../common/script/reboot_ctrl.py              |  150 +
 .../common/script/sensors                     |    8 +
 .../common/script/sfp_highest_temperatue.py   |  148 +
 .../common/script/slot_monitor.py             |  242 ++
 .../common/script/ssdmon                      |   82 +
 .../common/script/tty_console.py              |   91 +
 .../common/script/upgrade.py                  |  991 +++++
 .../common/script/warm_upgrade.py             |  514 +++
 .../common/service/platform_driver.service    |   15 +
 .../common/service/platform_process.service   |   16 +
 .../common/sonic_platform/__init__.py         |    2 +
 .../common/sonic_platform/chassis.py          |  530 +++
 .../common/sonic_platform/component.py        |  226 ++
 .../common/sonic_platform/dcdc.py             |   85 +
 .../common/sonic_platform/eeprom.py           |   92 +
 .../common/sonic_platform/fan.py              |  308 ++
 .../common/sonic_platform/fan_drawer.py       |  167 +
 .../common/sonic_platform/pcie.py             |   21 +
 .../common/sonic_platform/platform.py         |   24 +
 .../common/sonic_platform/psu.py              |  359 ++
 .../common/sonic_platform/sfp.py              |  480 +++
 .../common/sonic_platform/thermal.py          |  234 ++
 .../common/sonic_platform/watchdog.py         |  236 ++
 .../debian/changelog                          |    5 +
 .../debian/compat                             |    1 +
 .../debian/control                            |   29 +
 .../debian/copyright                          |   15 +
 ...latform-modules-micas-m2-w6510-32c.install |    1 +
 ...atform-modules-micas-m2-w6510-32c.postinst |   10 +
 ...tform-modules-micas-m2-w6510-48v8c.install |    1 +
 ...form-modules-micas-m2-w6510-48v8c.postinst |   10 +
 ...orm-modules-micas-m2-w6520-24dc8qc.install |    1 +
 ...rm-modules-micas-m2-w6520-24dc8qc.postinst |   10 +
 ...latform-modules-micas-m2-w6910-64c.install |    1 +
 ...atform-modules-micas-m2-w6910-64c.postinst |   10 +
 ...platform-modules-micas-m2-w6920-4s.install |    1 +
 ...latform-modules-micas-m2-w6920-4s.postinst |   10 +
 ...atform-modules-micas-m2-w6930-64qc.install |    1 +
 ...tform-modules-micas-m2-w6930-64qc.postinst |   10 +
 .../debian/rule.mk                            |    5 +
 .../sonic-platform-modules-micas/debian/rules |   92 +
 .../.upgrade_test/cpld_test_header.vme        |  Bin 0 -> 406 bytes
 .../.upgrade_test/fpga_test_header.bin        |   10 +
 .../m2-w6510-48v8c/Makefile                   |   28 +
 .../x86_64_micas_m2_w6510_48v8c_r0_config.py  | 1110 ++++++
 ..._64_micas_m2_w6510_48v8c_r0_port_config.py |    7 +
 .../x86_64_micas_m2_w6510_48v8c_r0_device.py  | 1233 ++++++
 ..._micas_m2_w6510_48v8c_r0_exhaust_device.py | 1233 ++++++
 .../x86_64_micas_m2_w6510_48v8c_r0_monitor.py |  206 +
 .../m2-w6510-48v8c/modules/driver/Makefile    |   15 +
 .../driver/wb_firmware_upgrade_device.c       |  178 +
 .../modules/driver/wb_i2c_dev_device.c        |  140 +
 .../driver/wb_i2c_mux_pca954x_device.c        |  296 ++
 .../modules/driver/wb_i2c_ocores_device.c     |  423 +++
 .../modules/driver/wb_io_dev_device.c         |  103 +
 .../modules/driver/wb_lpc_drv_device.c        |  130 +
 .../modules/driver/wb_pcie_dev_device.c       |   93 +
 .../plat_sysfs_cfg/WB_PLAT_CPLD.cfg           |   41 +
 .../plat_sysfs_cfg/WB_PLAT_FAN.cfg            |  304 ++
 .../plat_sysfs_cfg/WB_PLAT_PSU.cfg            |   64 +
 .../plat_sysfs_cfg/WB_PLAT_SFF.cfg            |  521 +++
 .../plat_sysfs_cfg/cfg_file_name              |    4 +
 .../m2-w6510-48v8c/setup.py                   |   39 +
 src/sonic-device-data/tests/permitted_list    |   10 +
 303 files changed, 94209 insertions(+), 1 deletion(-)
 create mode 100755 device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/port_config.ini
 create mode 100755 device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/sai.profile
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/td3-m2-w6510-48v8c-48x25G+8x100G.config.bcm
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/custom_led.bin
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/default_sku
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev.xml
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev_exhaust.xml
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/fru.py
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/installer.conf
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/bios_upgrade_header.bin
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/cpu_cpld_upgrade_header.vme
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/fpga_upgrade_header.bin
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/other_cpld_upgrade_header.vme
 create mode 100755 device/micas/x86_64-micas_m2-w6510-48v8c-r0/led_proc_init.soc
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/pcie.yaml
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform.json
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_asic
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_components.json
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/plugins/sfputil.py
 create mode 100755 device/micas/x86_64-micas_m2-w6510-48v8c-r0/plugins/ssd_util.py
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/pmon_daemon_control.json
 create mode 100755 device/micas/x86_64-micas_m2-w6510-48v8c-r0/system_health_monitoring_config.json
 create mode 100644 platform/broadcom/platform-modules-micas.dep
 create mode 100644 platform/broadcom/platform-modules-micas.mk
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/LICENSE
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/Makefile
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 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/sfp_highest_temperatue.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/slot_monitor.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/ssdmon
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/tty_console.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/upgrade.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/warm_upgrade.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/service/platform_driver.service
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/service/platform_process.service
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/__init__.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/chassis.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/component.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/dcdc.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/eeprom.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan_drawer.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/pcie.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/platform.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/thermal.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/watchdog.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/changelog
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/compat
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/control
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/copyright
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.install
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.postinst
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48v8c.install
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48v8c.postinst
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.install
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.postinst
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6910-64c.install
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6910-64c.postinst
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-4s.install
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-4s.postinst
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.install
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.postinst
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/debian/rules
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/cpld_test_header.vme
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/fpga_test_header.bin
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_port_config.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_device.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_exhaust_device.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_monitor.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_firmware_upgrade_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_mux_pca954x_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_ocores_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_io_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_lpc_drv_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_pcie_dev_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_FAN.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_PSU.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_SFF.cfg
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/cfg_file_name
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/setup.py

diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/port_config.ini b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/port_config.ini
new file mode 100755
index 000000000000..b71ad39648c9
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/port_config.ini
@@ -0,0 +1,57 @@
+# name           lanes                alias                  index      speed        admin_status
+Ethernet1        57                   twentyfiveGigE0/1      1          25000        up
+Ethernet2        58                   twentyfiveGigE0/2      2          25000        up
+Ethernet3        59                   twentyfiveGigE0/3      3          25000        up
+Ethernet4        60                   twentyfiveGigE0/4      4          25000        up
+Ethernet5        61                   twentyfiveGigE0/5      5          25000        up
+Ethernet6        62                   twentyfiveGigE0/6      6          25000        up
+Ethernet7        63                   twentyfiveGigE0/7      7          25000        up
+Ethernet8        64                   twentyfiveGigE0/8      8          25000        up
+Ethernet9        1                    twentyfiveGigE0/9      9          25000        up
+Ethernet10       2                    twentyfiveGigE0/10     10         25000        up
+Ethernet11       3                    twentyfiveGigE0/11     11         25000        up
+Ethernet12       4                    twentyfiveGigE0/12     12         25000        up
+Ethernet13       5                    twentyfiveGigE0/13     13         25000        up
+Ethernet14       6                    twentyfiveGigE0/14     14         25000        up
+Ethernet15       7                    twentyfiveGigE0/15     15         25000        up
+Ethernet16       8                    twentyfiveGigE0/16     16         25000        up
+Ethernet17       13                   twentyfiveGigE0/17     17         25000        up
+Ethernet18       14                   twentyfiveGigE0/18     18         25000        up
+Ethernet19       15                   twentyfiveGigE0/19     19         25000        up
+Ethernet20       16                   twentyfiveGigE0/20     20         25000        up
+Ethernet21       21                   twentyfiveGigE0/21     21         25000        up
+Ethernet22       22                   twentyfiveGigE0/22     22         25000        up
+Ethernet23       23                   twentyfiveGigE0/23     23         25000        up
+Ethernet24       24                   twentyfiveGigE0/24     24         25000        up
+Ethernet25       29                   twentyfiveGigE0/25     25         25000        up
+Ethernet26       30                   twentyfiveGigE0/26     26         25000        up
+Ethernet27       31                   twentyfiveGigE0/27     27         25000        up
+Ethernet28       32                   twentyfiveGigE0/28     28         25000        up
+Ethernet29       33                   twentyfiveGigE0/29     29         25000        up
+Ethernet30       34                   twentyfiveGigE0/30     30         25000        up
+Ethernet31       35                   twentyfiveGigE0/31     31         25000        up
+Ethernet32       36                   twentyfiveGigE0/32     32         25000        up
+Ethernet33       41                   twentyfiveGigE0/33     33         25000        up
+Ethernet34       42                   twentyfiveGigE0/34     34         25000        up
+Ethernet35       43                   twentyfiveGigE0/35     35         25000        up
+Ethernet36       44                   twentyfiveGigE0/36     36         25000        up
+Ethernet37       49                   twentyfiveGigE0/37     37         25000        up
+Ethernet38       50                   twentyfiveGigE0/38     38         25000        up
+Ethernet39       51                   twentyfiveGigE0/39     39         25000        up
+Ethernet40       52                   twentyfiveGigE0/40     40         25000        up
+Ethernet41       65                   twentyfiveGigE0/41     41         25000        up
+Ethernet42       66                   twentyfiveGigE0/42     42         25000        up
+Ethernet43       67                   twentyfiveGigE0/43     43         25000        up
+Ethernet44       68                   twentyfiveGigE0/44     44         25000        up
+Ethernet45       69                   twentyfiveGigE0/45     45         25000        up
+Ethernet46       70                   twentyfiveGigE0/46     46         25000        up
+Ethernet47       71                   twentyfiveGigE0/47     47         25000        up
+Ethernet48       72                   twentyfiveGigE0/48     48         25000        up
+Ethernet49       85,86,87,88          hundredGigE0/1         49         100000       up
+Ethernet50       77,78,79,80          hundredGigE0/2         50         100000       up
+Ethernet51       97,98,99,100         hundredGigE0/3         51         100000       up
+Ethernet52       93,94,95,96          hundredGigE0/4         52         100000       up
+Ethernet53       113,114,115,116      hundredGigE0/5         53         100000       up
+Ethernet54       105,106,107,108      hundredGigE0/6         54         100000       up
+Ethernet55       121,122,123,124      hundredGigE0/7         55         100000       up
+Ethernet56       125,126,127,128      hundredGigE0/8         56         100000       up
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/sai.profile b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/sai.profile
new file mode 100755
index 000000000000..9dffa1046f04
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/sai.profile
@@ -0,0 +1 @@
+SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-m2-w6510-48v8c-48x25G+8x100G.config.bcm
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/td3-m2-w6510-48v8c-48x25G+8x100G.config.bcm b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/td3-m2-w6510-48v8c-48x25G+8x100G.config.bcm
new file mode 100644
index 000000000000..2893a9473778
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/td3-m2-w6510-48v8c-48x25G+8x100G.config.bcm
@@ -0,0 +1,604 @@
+cancun_dir=/usr/share/sonic/platform/cancun/sdk_6.5.16/
+l2_mem_entries=32768
+l3_mem_entries=16384
+l3_alpm_enable=2
+ipv6_lpm_128b_enable=0x1
+l2xmsg_mode=0
+l3_max_ecmp_mode=1
+svi_my_station_optimization=1
+sai_nbr_bcast_ifp_optimized=2
+sai_stats_support_mask=0x1
+bcm_num_cos=8
+bcm_stat_interval=2000000
+cdma_timeout_usec=3000000
+core_clock_frequency=1525
+dpp_clock_ratio=2:3
+help_cli_enable=1
+ifp_inports_support_enable=1
+#lpm_scaling_enable=1
+max_vp_lags=0
+mem_cache_enable=0
+memlist_enable=1
+miim_intr_enable=0
+module_64ports=1
+oversubscribe_mode=1
+parity_enable=1
+parity_correction=1
+pbmp_gport_stack.0=0x0000000000000000000000000000000000000000000000000000000000000000
+#pbmp_xport_xe.0=0x00000000000000000000000000000000888ffffffffffff9fffffffffffffffe
+pbmp_xport_xe=0xffffffffffffffffffffffffffffffffffffffffe
+port_flex_enable=1
+phy_chain_tx_lane_map_physical{57.0}=0x0123
+phy_chain_tx_lane_map_physical{61.0}=0x0123
+phy_chain_tx_lane_map_physical{1.0}=0x0123
+phy_chain_tx_lane_map_physical{5.0}=0x0123
+phy_chain_tx_lane_map_physical{13.0}=0x0123
+phy_chain_tx_lane_map_physical{21.0}=0x0123
+phy_chain_tx_lane_map_physical{29.0}=0x0123
+phy_chain_tx_lane_map_physical{33.0}=0x0123
+phy_chain_tx_lane_map_physical{41.0}=0x0123
+phy_chain_tx_lane_map_physical{49.0}=0x0123
+phy_chain_tx_lane_map_physical{65.0}=0x3210
+phy_chain_tx_lane_map_physical{69.0}=0x3210
+phy_chain_tx_lane_map_physical{85.0}=0x3210
+phy_chain_tx_lane_map_physical{77.0}=0x0213
+phy_chain_tx_lane_map_physical{97.0}=0x3210
+phy_chain_tx_lane_map_physical{93.0}=0x0213
+phy_chain_tx_lane_map_physical{113.0}=0x3210
+phy_chain_tx_lane_map_physical{105.0}=0x0213
+phy_chain_tx_lane_map_physical{121.0}=0x3120
+phy_chain_tx_lane_map_physical{125.0}=0x1203
+
+phy_chain_rx_lane_map_physical{57.0}=0x1032
+phy_chain_rx_lane_map_physical{61.0}=0x1032
+phy_chain_rx_lane_map_physical{1.0}=0x1032
+phy_chain_rx_lane_map_physical{5.0}=0x1032
+phy_chain_rx_lane_map_physical{13.0}=0x1032
+phy_chain_rx_lane_map_physical{21.0}=0x1032
+phy_chain_rx_lane_map_physical{29.0}=0x1032
+phy_chain_rx_lane_map_physical{33.0}=0x1032
+phy_chain_rx_lane_map_physical{41.0}=0x1032
+phy_chain_rx_lane_map_physical{49.0}=0x1032
+phy_chain_rx_lane_map_physical{65.0}=0x2301
+phy_chain_rx_lane_map_physical{69.0}=0x2301
+phy_chain_rx_lane_map_physical{85.0}=0x1032
+phy_chain_rx_lane_map_physical{77.0}=0x1032
+phy_chain_rx_lane_map_physical{97.0}=0x1032
+phy_chain_rx_lane_map_physical{93.0}=0x1032
+phy_chain_rx_lane_map_physical{113.0}=0x1032
+phy_chain_rx_lane_map_physical{105.0}=0x1032
+phy_chain_rx_lane_map_physical{121.0}=0x2031
+phy_chain_rx_lane_map_physical{125.0}=0x1023
+
+portmap_57=57:25
+portmap_58=58:25
+portmap_59=59:25
+portmap_60=60:25
+portmap_61=61:25
+portmap_62=62:25
+portmap_63=63:25
+portmap_64=64:25
+portmap_1=1:25
+portmap_2=2:25
+portmap_3=3:25
+portmap_4=4:25
+portmap_5=5:25
+portmap_6=6:25
+portmap_7=7:25
+portmap_8=8:25
+portmap_13=13:25
+portmap_14=14:25
+portmap_15=15:25
+portmap_16=16:25
+portmap_21=21:25
+portmap_22=22:25
+portmap_23=23:25
+portmap_24=24:25
+portmap_29=29:25
+portmap_30=30:25
+portmap_31=31:25
+portmap_32=32:25
+portmap_33=33:25
+portmap_34=34:25
+portmap_35=35:25
+portmap_36=36:25
+portmap_41=41:25
+portmap_42=42:25
+portmap_43=43:25
+portmap_44=44:25
+portmap_49=49:25
+portmap_50=50:25
+portmap_51=51:25
+portmap_52=52:25
+portmap_67=65:25
+portmap_68=66:25
+portmap_69=67:25
+portmap_70=68:25
+portmap_71=69:25
+portmap_72=70:25
+portmap_73=71:25
+portmap_74=72:25
+portmap_87=85:100
+portmap_79=77:100
+portmap_99=97:100
+portmap_95=93:100
+portmap_115=113:100
+portmap_107=105:100
+portmap_123=121:100
+portmap_127=125:100
+
+dport_map_port_57=1
+dport_map_port_58=2
+dport_map_port_59=3
+dport_map_port_60=4
+dport_map_port_61=5
+dport_map_port_62=6
+dport_map_port_63=7
+dport_map_port_64=8
+dport_map_port_1=9
+dport_map_port_2=10
+dport_map_port_3=11
+dport_map_port_4=12
+dport_map_port_5=13
+dport_map_port_6=14
+dport_map_port_7=15
+dport_map_port_8=16
+dport_map_port_13=17
+dport_map_port_14=18
+dport_map_port_15=19
+dport_map_port_16=20
+dport_map_port_21=21
+dport_map_port_22=22
+dport_map_port_23=23
+dport_map_port_24=24
+dport_map_port_29=25
+dport_map_port_30=26
+dport_map_port_31=27
+dport_map_port_32=28
+dport_map_port_33=29
+dport_map_port_34=30
+dport_map_port_35=31
+dport_map_port_36=32
+dport_map_port_41=33
+dport_map_port_42=34
+dport_map_port_43=35
+dport_map_port_44=36
+dport_map_port_49=37
+dport_map_port_50=38
+dport_map_port_51=39
+dport_map_port_52=40
+dport_map_port_67=41
+dport_map_port_68=42
+dport_map_port_69=43
+dport_map_port_70=44
+dport_map_port_71=45
+dport_map_port_72=46
+dport_map_port_73=47
+dport_map_port_74=48
+dport_map_port_87=49
+dport_map_port_79=50
+dport_map_port_99=51
+dport_map_port_95=52
+dport_map_port_115=53
+dport_map_port_107=54
+dport_map_port_123=55
+dport_map_port_127=56
+
+phy_chain_tx_polarity_flip_physical{57.0}=0x1
+phy_chain_tx_polarity_flip_physical{58.0}=0x0
+phy_chain_tx_polarity_flip_physical{59.0}=0x1
+phy_chain_tx_polarity_flip_physical{60.0}=0x0
+phy_chain_tx_polarity_flip_physical{61.0}=0x1
+phy_chain_tx_polarity_flip_physical{62.0}=0x0
+phy_chain_tx_polarity_flip_physical{63.0}=0x1
+phy_chain_tx_polarity_flip_physical{64.0}=0x0
+phy_chain_tx_polarity_flip_physical{1.0}=0x0
+phy_chain_tx_polarity_flip_physical{2.0}=0x0
+phy_chain_tx_polarity_flip_physical{3.0}=0x0
+phy_chain_tx_polarity_flip_physical{4.0}=0x0
+phy_chain_tx_polarity_flip_physical{5.0}=0x0
+phy_chain_tx_polarity_flip_physical{6.0}=0x0
+phy_chain_tx_polarity_flip_physical{7.0}=0x0
+phy_chain_tx_polarity_flip_physical{8.0}=0x0
+phy_chain_tx_polarity_flip_physical{13.0}=0x0
+phy_chain_tx_polarity_flip_physical{14.0}=0x0
+phy_chain_tx_polarity_flip_physical{15.0}=0x0
+phy_chain_tx_polarity_flip_physical{16.0}=0x0
+phy_chain_tx_polarity_flip_physical{21.0}=0x0
+phy_chain_tx_polarity_flip_physical{22.0}=0x0
+phy_chain_tx_polarity_flip_physical{23.0}=0x0
+phy_chain_tx_polarity_flip_physical{24.0}=0x0
+phy_chain_tx_polarity_flip_physical{29.0}=0x0
+phy_chain_tx_polarity_flip_physical{30.0}=0x0
+phy_chain_tx_polarity_flip_physical{31.0}=0x0
+phy_chain_tx_polarity_flip_physical{32.0}=0x0
+phy_chain_tx_polarity_flip_physical{33.0}=0x0
+phy_chain_tx_polarity_flip_physical{34.0}=0x0
+phy_chain_tx_polarity_flip_physical{35.0}=0x0
+phy_chain_tx_polarity_flip_physical{36.0}=0x0
+phy_chain_tx_polarity_flip_physical{41.0}=0x0
+phy_chain_tx_polarity_flip_physical{42.0}=0x0
+phy_chain_tx_polarity_flip_physical{43.0}=0x0
+phy_chain_tx_polarity_flip_physical{44.0}=0x0
+phy_chain_tx_polarity_flip_physical{49.0}=0x0
+phy_chain_tx_polarity_flip_physical{50.0}=0x0
+phy_chain_tx_polarity_flip_physical{51.0}=0x0
+phy_chain_tx_polarity_flip_physical{52.0}=0x0
+phy_chain_tx_polarity_flip_physical{65.0}=0x0
+phy_chain_tx_polarity_flip_physical{66.0}=0x0
+phy_chain_tx_polarity_flip_physical{67.0}=0x0
+phy_chain_tx_polarity_flip_physical{68.0}=0x0
+phy_chain_tx_polarity_flip_physical{69.0}=0x0
+phy_chain_tx_polarity_flip_physical{70.0}=0x0
+phy_chain_tx_polarity_flip_physical{71.0}=0x0
+phy_chain_tx_polarity_flip_physical{72.0}=0x0
+phy_chain_tx_polarity_flip_physical{85.0}=0x0
+phy_chain_tx_polarity_flip_physical{86.0}=0x0
+phy_chain_tx_polarity_flip_physical{87.0}=0x1
+phy_chain_tx_polarity_flip_physical{88.0}=0x0
+phy_chain_tx_polarity_flip_physical{77.0}=0x1
+phy_chain_tx_polarity_flip_physical{78.0}=0x0
+phy_chain_tx_polarity_flip_physical{79.0}=0x1
+phy_chain_tx_polarity_flip_physical{80.0}=0x0
+phy_chain_tx_polarity_flip_physical{97.0}=0x0
+phy_chain_tx_polarity_flip_physical{98.0}=0x0
+phy_chain_tx_polarity_flip_physical{99.0}=0x1
+phy_chain_tx_polarity_flip_physical{100.0}=0x0
+phy_chain_tx_polarity_flip_physical{93.0}=0x0
+phy_chain_tx_polarity_flip_physical{94.0}=0x1
+phy_chain_tx_polarity_flip_physical{95.0}=0x1
+phy_chain_tx_polarity_flip_physical{96.0}=0x0
+phy_chain_tx_polarity_flip_physical{113.0}=0x0
+phy_chain_tx_polarity_flip_physical{114.0}=0x0
+phy_chain_tx_polarity_flip_physical{115.0}=0x1
+phy_chain_tx_polarity_flip_physical{116.0}=0x0
+phy_chain_tx_polarity_flip_physical{105.0}=0x0
+phy_chain_tx_polarity_flip_physical{106.0}=0x1
+phy_chain_tx_polarity_flip_physical{107.0}=0x1
+phy_chain_tx_polarity_flip_physical{108.0}=0x0
+phy_chain_tx_polarity_flip_physical{121.0}=0x1
+phy_chain_tx_polarity_flip_physical{122.0}=0x0
+phy_chain_tx_polarity_flip_physical{123.0}=0x1
+phy_chain_tx_polarity_flip_physical{124.0}=0x0
+phy_chain_tx_polarity_flip_physical{125.0}=0x1
+phy_chain_tx_polarity_flip_physical{126.0}=0x0
+phy_chain_tx_polarity_flip_physical{127.0}=0x1
+phy_chain_tx_polarity_flip_physical{128.0}=0x1
+
+phy_chain_rx_polarity_flip_physical{57.0}=0x0
+phy_chain_rx_polarity_flip_physical{58.0}=0x0
+phy_chain_rx_polarity_flip_physical{59.0}=0x0
+phy_chain_rx_polarity_flip_physical{60.0}=0x0
+phy_chain_rx_polarity_flip_physical{61.0}=0x1
+phy_chain_rx_polarity_flip_physical{62.0}=0x1
+phy_chain_rx_polarity_flip_physical{63.0}=0x1
+phy_chain_rx_polarity_flip_physical{64.0}=0x1
+phy_chain_rx_polarity_flip_physical{1.0}=0x1
+phy_chain_rx_polarity_flip_physical{2.0}=0x1
+phy_chain_rx_polarity_flip_physical{3.0}=0x1
+phy_chain_rx_polarity_flip_physical{4.0}=0x1
+phy_chain_rx_polarity_flip_physical{5.0}=0x0
+phy_chain_rx_polarity_flip_physical{6.0}=0x0
+phy_chain_rx_polarity_flip_physical{7.0}=0x0
+phy_chain_rx_polarity_flip_physical{8.0}=0x0
+phy_chain_rx_polarity_flip_physical{13.0}=0x0
+phy_chain_rx_polarity_flip_physical{14.0}=0x0
+phy_chain_rx_polarity_flip_physical{15.0}=0x0
+phy_chain_rx_polarity_flip_physical{16.0}=0x0
+phy_chain_rx_polarity_flip_physical{21.0}=0x0
+phy_chain_rx_polarity_flip_physical{22.0}=0x0
+phy_chain_rx_polarity_flip_physical{23.0}=0x0
+phy_chain_rx_polarity_flip_physical{24.0}=0x0
+phy_chain_rx_polarity_flip_physical{29.0}=0x0
+phy_chain_rx_polarity_flip_physical{30.0}=0x1
+phy_chain_rx_polarity_flip_physical{31.0}=0x0
+phy_chain_rx_polarity_flip_physical{32.0}=0x0
+phy_chain_rx_polarity_flip_physical{33.0}=0x1
+phy_chain_rx_polarity_flip_physical{34.0}=0x1
+phy_chain_rx_polarity_flip_physical{35.0}=0x1
+phy_chain_rx_polarity_flip_physical{36.0}=0x1
+phy_chain_rx_polarity_flip_physical{41.0}=0x1
+phy_chain_rx_polarity_flip_physical{42.0}=0x1
+phy_chain_rx_polarity_flip_physical{43.0}=0x1
+phy_chain_rx_polarity_flip_physical{44.0}=0x1
+phy_chain_rx_polarity_flip_physical{49.0}=0x1
+phy_chain_rx_polarity_flip_physical{50.0}=0x1
+phy_chain_rx_polarity_flip_physical{51.0}=0x1
+phy_chain_rx_polarity_flip_physical{52.0}=0x1
+phy_chain_rx_polarity_flip_physical{65.0}=0x1
+phy_chain_rx_polarity_flip_physical{66.0}=0x1
+phy_chain_rx_polarity_flip_physical{67.0}=0x1
+phy_chain_rx_polarity_flip_physical{68.0}=0x1
+phy_chain_rx_polarity_flip_physical{69.0}=0x0
+phy_chain_rx_polarity_flip_physical{70.0}=0x0
+phy_chain_rx_polarity_flip_physical{71.0}=0x0
+phy_chain_rx_polarity_flip_physical{72.0}=0x0
+phy_chain_rx_polarity_flip_physical{85.0}=0x1
+phy_chain_rx_polarity_flip_physical{86.0}=0x1
+phy_chain_rx_polarity_flip_physical{87.0}=0x1
+phy_chain_rx_polarity_flip_physical{88.0}=0x1
+phy_chain_rx_polarity_flip_physical{77.0}=0x0
+phy_chain_rx_polarity_flip_physical{78.0}=0x0
+phy_chain_rx_polarity_flip_physical{79.0}=0x0
+phy_chain_rx_polarity_flip_physical{80.0}=0x0
+phy_chain_rx_polarity_flip_physical{97.0}=0x0
+phy_chain_rx_polarity_flip_physical{98.0}=0x0
+phy_chain_rx_polarity_flip_physical{99.0}=0x0
+phy_chain_rx_polarity_flip_physical{100.0}=0x0
+phy_chain_rx_polarity_flip_physical{93.0}=0x0
+phy_chain_rx_polarity_flip_physical{94.0}=0x0
+phy_chain_rx_polarity_flip_physical{95.0}=0x0
+phy_chain_rx_polarity_flip_physical{96.0}=0x0
+phy_chain_rx_polarity_flip_physical{113.0}=0x1
+phy_chain_rx_polarity_flip_physical{114.0}=0x1
+phy_chain_rx_polarity_flip_physical{115.0}=0x1
+phy_chain_rx_polarity_flip_physical{116.0}=0x1
+phy_chain_rx_polarity_flip_physical{105.0}=0x0
+phy_chain_rx_polarity_flip_physical{106.0}=0x0
+phy_chain_rx_polarity_flip_physical{107.0}=0x0
+phy_chain_rx_polarity_flip_physical{108.0}=0x0
+phy_chain_rx_polarity_flip_physical{121.0}=0x1
+phy_chain_rx_polarity_flip_physical{122.0}=0x1
+phy_chain_rx_polarity_flip_physical{123.0}=0x0
+phy_chain_rx_polarity_flip_physical{124.0}=0x1
+phy_chain_rx_polarity_flip_physical{125.0}=0x1
+phy_chain_rx_polarity_flip_physical{126.0}=0x0
+phy_chain_rx_polarity_flip_physical{127.0}=0x0
+phy_chain_rx_polarity_flip_physical{128.0}=0x0
+
+serdes_preemphasis_lane0_57=0x0f480d
+serdes_preemphasis_lane1_57=0x0f480d
+serdes_preemphasis_lane2_57=0x0f480d
+serdes_preemphasis_lane3_57=0x0f480d
+serdes_preemphasis_lane0_58=0x0f480d
+serdes_preemphasis_lane1_58=0x0f480d
+serdes_preemphasis_lane2_58=0x0f480d
+serdes_preemphasis_lane3_58=0x0f480d
+serdes_preemphasis_lane0_59=0x0f480d
+serdes_preemphasis_lane1_59=0x0f480d
+serdes_preemphasis_lane2_59=0x0f480d
+serdes_preemphasis_lane3_59=0x0f480d
+serdes_preemphasis_lane0_60=0x0f480d
+serdes_preemphasis_lane1_60=0x0f480d
+serdes_preemphasis_lane2_60=0x0f480d
+serdes_preemphasis_lane3_60=0x0f480d
+serdes_preemphasis_lane0_61=0x0f480d
+serdes_preemphasis_lane1_61=0x0f480d
+serdes_preemphasis_lane2_61=0x0f480d
+serdes_preemphasis_lane3_61=0x0f480d
+serdes_preemphasis_lane0_62=0x0f480d
+serdes_preemphasis_lane1_62=0x0f480d
+serdes_preemphasis_lane2_62=0x0f480d
+serdes_preemphasis_lane3_62=0x0f480d
+serdes_preemphasis_lane0_63=0x0f480d
+serdes_preemphasis_lane1_63=0x0f480d
+serdes_preemphasis_lane2_63=0x0f480d
+serdes_preemphasis_lane3_63=0x0f480d
+serdes_preemphasis_lane0_64=0x0f480d
+serdes_preemphasis_lane1_64=0x0f480d
+serdes_preemphasis_lane2_64=0x0f480d
+serdes_preemphasis_lane3_64=0x0f480d
+serdes_preemphasis_lane0_1=0x0f480d
+serdes_preemphasis_lane1_1=0x0f480d
+serdes_preemphasis_lane2_1=0x0f480d
+serdes_preemphasis_lane3_1=0x0f480d
+serdes_preemphasis_lane0_2=0x0d4b0c
+serdes_preemphasis_lane1_2=0x0d4b0c
+serdes_preemphasis_lane2_2=0x0d4b0c
+serdes_preemphasis_lane3_2=0x0d4b0c
+serdes_preemphasis_lane0_3=0x0f480d
+serdes_preemphasis_lane1_3=0x0f480d
+serdes_preemphasis_lane2_3=0x0f480d
+serdes_preemphasis_lane3_3=0x0f480d
+serdes_preemphasis_lane0_4=0x0d4b0c
+serdes_preemphasis_lane1_4=0x0d4b0c
+serdes_preemphasis_lane2_4=0x0d4b0c
+serdes_preemphasis_lane3_4=0x0d4b0c
+serdes_preemphasis_lane0_5=0x0f480d
+serdes_preemphasis_lane1_5=0x0f480d
+serdes_preemphasis_lane2_5=0x0f480d
+serdes_preemphasis_lane3_5=0x0f480d
+serdes_preemphasis_lane0_6=0x0d4b0c
+serdes_preemphasis_lane1_6=0x0d4b0c
+serdes_preemphasis_lane2_6=0x0d4b0c
+serdes_preemphasis_lane3_6=0x0d4b0c
+serdes_preemphasis_lane0_7=0x0f480d
+serdes_preemphasis_lane1_7=0x0f480d
+serdes_preemphasis_lane2_7=0x0f480d
+serdes_preemphasis_lane3_7=0x0f480d
+serdes_preemphasis_lane0_8=0x0d4b0c
+serdes_preemphasis_lane1_8=0x0d4b0c
+serdes_preemphasis_lane2_8=0x0d4b0c
+serdes_preemphasis_lane3_8=0x0d4b0c
+serdes_preemphasis_lane0_13=0x0f480d
+serdes_preemphasis_lane1_13=0x0f480d
+serdes_preemphasis_lane2_13=0x0f480d
+serdes_preemphasis_lane3_13=0x0f480d
+serdes_preemphasis_lane0_14=0x0d4b0c
+serdes_preemphasis_lane1_14=0x0d4b0c
+serdes_preemphasis_lane2_14=0x0d4b0c
+serdes_preemphasis_lane3_14=0x0d4b0c
+serdes_preemphasis_lane0_15=0x0f480d
+serdes_preemphasis_lane1_15=0x0f480d
+serdes_preemphasis_lane2_15=0x0f480d
+serdes_preemphasis_lane3_15=0x0f480d
+serdes_preemphasis_lane0_16=0x0d4b0c
+serdes_preemphasis_lane1_16=0x0d4b0c
+serdes_preemphasis_lane2_16=0x0d4b0c
+serdes_preemphasis_lane3_16=0x0d4b0c
+serdes_preemphasis_lane0_21=0x0d4b0c
+serdes_preemphasis_lane1_21=0x0d4b0c
+serdes_preemphasis_lane2_21=0x0d4b0c
+serdes_preemphasis_lane3_21=0x0d4b0c
+serdes_preemphasis_lane0_22=0x0d4b0c
+serdes_preemphasis_lane1_22=0x0d4b0c
+serdes_preemphasis_lane2_22=0x0d4b0c
+serdes_preemphasis_lane3_22=0x0d4b0c
+serdes_preemphasis_lane0_23=0x0d4b0c
+serdes_preemphasis_lane1_23=0x0d4b0c
+serdes_preemphasis_lane2_23=0x0d4b0c
+serdes_preemphasis_lane3_23=0x0d4b0c
+serdes_preemphasis_lane0_24=0x0d4b0c
+serdes_preemphasis_lane1_24=0x0d4b0c
+serdes_preemphasis_lane2_24=0x0d4b0c
+serdes_preemphasis_lane3_24=0x0d4b0c
+serdes_preemphasis_lane0_29=0x0d4b0c
+serdes_preemphasis_lane1_29=0x0d4b0c
+serdes_preemphasis_lane2_29=0x0d4b0c
+serdes_preemphasis_lane3_29=0x0d4b0c
+serdes_preemphasis_lane0_30=0x0d4b0c
+serdes_preemphasis_lane1_30=0x0d4b0c
+serdes_preemphasis_lane2_30=0x0d4b0c
+serdes_preemphasis_lane3_30=0x0d4b0c
+serdes_preemphasis_lane0_31=0x0d4b0c
+serdes_preemphasis_lane1_31=0x0d4b0c
+serdes_preemphasis_lane2_31=0x0d4b0c
+serdes_preemphasis_lane3_31=0x0d4b0c
+serdes_preemphasis_lane0_32=0x0d4b0c
+serdes_preemphasis_lane1_32=0x0d4b0c
+serdes_preemphasis_lane2_32=0x0d4b0c
+serdes_preemphasis_lane3_32=0x0d4b0c
+serdes_preemphasis_lane0_33=0x0d4b0c
+serdes_preemphasis_lane1_33=0x0d4b0c
+serdes_preemphasis_lane2_33=0x0d4b0c
+serdes_preemphasis_lane3_33=0x0d4b0c
+serdes_preemphasis_lane0_34=0x0d4b0c
+serdes_preemphasis_lane1_34=0x0d4b0c
+serdes_preemphasis_lane2_34=0x0d4b0c
+serdes_preemphasis_lane3_34=0x0d4b0c
+serdes_preemphasis_lane0_35=0x0d4b0c
+serdes_preemphasis_lane1_35=0x0d4b0c
+serdes_preemphasis_lane2_35=0x0d4b0c
+serdes_preemphasis_lane3_35=0x0d4b0c
+serdes_preemphasis_lane0_36=0x0d4b0c
+serdes_preemphasis_lane1_36=0x0d4b0c
+serdes_preemphasis_lane2_36=0x0d4b0c
+serdes_preemphasis_lane3_36=0x0d4b0c
+serdes_preemphasis_lane0_41=0x0d4b0c
+serdes_preemphasis_lane1_41=0x0d4b0c
+serdes_preemphasis_lane2_41=0x0d4b0c
+serdes_preemphasis_lane3_41=0x0d4b0c
+serdes_preemphasis_lane0_42=0x0d4b0c
+serdes_preemphasis_lane1_42=0x0d4b0c
+serdes_preemphasis_lane2_42=0x0d4b0c
+serdes_preemphasis_lane3_42=0x0d4b0c
+serdes_preemphasis_lane0_43=0x0d4b0c
+serdes_preemphasis_lane1_43=0x0d4b0c
+serdes_preemphasis_lane2_43=0x0d4b0c
+serdes_preemphasis_lane3_43=0x0d4b0c
+serdes_preemphasis_lane0_44=0x0d4b0c
+serdes_preemphasis_lane1_44=0x0d4b0c
+serdes_preemphasis_lane2_44=0x0d4b0c
+serdes_preemphasis_lane3_44=0x0d4b0c
+serdes_preemphasis_lane0_49=0x0f480d
+serdes_preemphasis_lane1_49=0x0f480d
+serdes_preemphasis_lane2_49=0x0f480d
+serdes_preemphasis_lane3_49=0x0f480d
+serdes_preemphasis_lane0_50=0x0d4b0c
+serdes_preemphasis_lane1_50=0x0d4b0c
+serdes_preemphasis_lane2_50=0x0d4b0c
+serdes_preemphasis_lane3_50=0x0d4b0c
+serdes_preemphasis_lane0_51=0x0f480d
+serdes_preemphasis_lane1_51=0x0f480d
+serdes_preemphasis_lane2_51=0x0f480d
+serdes_preemphasis_lane3_51=0x0f480d
+serdes_preemphasis_lane0_52=0x0d4b0c
+serdes_preemphasis_lane1_52=0x0d4b0c
+serdes_preemphasis_lane2_52=0x0d4b0c
+serdes_preemphasis_lane3_52=0x0d4b0c
+serdes_preemphasis_lane0_67=0x0d4b0c
+serdes_preemphasis_lane1_67=0x0d4b0c
+serdes_preemphasis_lane2_67=0x0d4b0c
+serdes_preemphasis_lane3_67=0x0d4b0c
+serdes_preemphasis_lane0_68=0x0d4b0c
+serdes_preemphasis_lane1_68=0x0d4b0c
+serdes_preemphasis_lane2_68=0x0d4b0c
+serdes_preemphasis_lane3_68=0x0d4b0c
+serdes_preemphasis_lane0_69=0x0d4b0c
+serdes_preemphasis_lane1_69=0x0d4b0c
+serdes_preemphasis_lane2_69=0x0d4b0c
+serdes_preemphasis_lane3_69=0x0d4b0c
+serdes_preemphasis_lane0_70=0x0d4b0c
+serdes_preemphasis_lane1_70=0x0d4b0c
+serdes_preemphasis_lane2_70=0x0d4b0c
+serdes_preemphasis_lane3_70=0x0d4b0c
+serdes_preemphasis_lane0_71=0x0d4b0c
+serdes_preemphasis_lane1_71=0x0d4b0c
+serdes_preemphasis_lane2_71=0x0d4b0c
+serdes_preemphasis_lane3_71=0x0d4b0c
+serdes_preemphasis_lane0_72=0x0d4b0c
+serdes_preemphasis_lane1_72=0x0d4b0c
+serdes_preemphasis_lane2_72=0x0d4b0c
+serdes_preemphasis_lane3_72=0x0d4b0c
+serdes_preemphasis_lane0_73=0x0d4b0c
+serdes_preemphasis_lane1_73=0x0d4b0c
+serdes_preemphasis_lane2_73=0x0d4b0c
+serdes_preemphasis_lane3_73=0x0d4b0c
+serdes_preemphasis_lane0_74=0x0d4b0c
+serdes_preemphasis_lane1_74=0x0d4b0c
+serdes_preemphasis_lane2_74=0x0d4b0c
+serdes_preemphasis_lane3_74=0x0d4b0c
+serdes_preemphasis_lane0_87=0x0d4b0c
+serdes_preemphasis_lane1_87=0x0d4b0c
+serdes_preemphasis_lane2_87=0x0d4b0c
+serdes_preemphasis_lane3_87=0x0d4b0c
+serdes_preemphasis_lane0_79=0x0d4b0c
+serdes_preemphasis_lane1_79=0x0d4b0c
+serdes_preemphasis_lane2_79=0x0d4b0c
+serdes_preemphasis_lane3_79=0x0d4b0c
+serdes_preemphasis_lane0_99=0x0d4b0c
+serdes_preemphasis_lane1_99=0x0d4b0c
+serdes_preemphasis_lane2_99=0x0d4b0c
+serdes_preemphasis_lane3_99=0x0d4b0c
+serdes_preemphasis_lane0_95=0x0d4b0c
+serdes_preemphasis_lane1_95=0x0d4b0c
+serdes_preemphasis_lane2_95=0x0d4b0c
+serdes_preemphasis_lane3_95=0x0d4b0c
+serdes_preemphasis_lane0_115=0x0d4b0c
+serdes_preemphasis_lane1_115=0x0d4b0c
+serdes_preemphasis_lane2_115=0x0d4b0c
+serdes_preemphasis_lane3_115=0x0d4b0c
+serdes_preemphasis_lane0_107=0x0d4b0c
+serdes_preemphasis_lane1_107=0x0d4b0c
+serdes_preemphasis_lane2_107=0x0d4b0c
+serdes_preemphasis_lane3_107=0x0d4b0c
+serdes_preemphasis_lane0_123=0x14460a
+serdes_preemphasis_lane1_123=0x14460a
+serdes_preemphasis_lane2_123=0x14460a
+serdes_preemphasis_lane3_123=0x14460a
+serdes_preemphasis_lane0_127=0x14460a
+serdes_preemphasis_lane1_127=0x14460a
+serdes_preemphasis_lane2_127=0x14460a
+serdes_preemphasis_lane3_127=0x14460a
+
+
+reglist_enable=1
+scache_filename=/var/warmboot/wbscache
+schan_intr_enable=0
+stable_size=0x55000000
+stable_location=3
+warmboot_knet_shutdown_mode=1
+tdma_timeout_usec=3000000
+
+#vxlan flex flow mode
+flow_init_mode=1
+
+riot_enable=1
+riot_overlay_l3_intf_mem_size=4096
+riot_overlay_l3_egress_mem_size=32768
+riot_overlay_ecmp_resilient_hash_size=16384
+
+l3_ecmp_levels=2
+
+use_all_splithorizon_groups=1
+sai_tunnel_support=1
+
+#This property allows to enable L2 FDB entry to discard based on Source Mac
+sai_fdb_entry_l2_discard_src_enable=1
+
+#RDMA
+sai_pfc_defaults_disable=1
+sai_optimized_mmu=1
+
+#ACL wb count
+ctr_evict_enable=0
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/custom_led.bin b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/custom_led.bin
new file mode 100644
index 0000000000000000000000000000000000000000..e02f94e7ed87ffe60524721f4aec68d661880e7c
GIT binary patch
literal 236
zcmWN~%}N4M7=YpT%$NoC2ayV4HjWWfZN?-t`<XM<S0t?>f<Wj@Eo_%dp&(qjY@N5z
zN@`aS&J9dA(b`L>=LVkf$CZeDzh_uF%kr>I`FYKD`eLmXf;U;{tHuD;Ze7>$f@av%
zgCSlz(c*=6Vg!#wxw@UXuqvtQF#P>drO^$pZE}t_Ju@=OS5eW|Q7?+4_%^<q{(O;F
z8Gk+2pw12rcG+W}0|FElHYp}ZGszS)%reJ3i)6`>r@%5rR&XfcQvT1^*<cf&3R_gs
WgdB3jF~SL_Tyl<~MTdL3Jn;uTxG=K-

literal 0
HcmV?d00001

diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/default_sku b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/default_sku
new file mode 100644
index 000000000000..921c511b10c6
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/default_sku
@@ -0,0 +1 @@
+M2-W6510-48V8C t1
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev.xml b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev.xml
new file mode 100644
index 000000000000..e2553818d972
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev.xml
@@ -0,0 +1,419 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+      ### type  1 result/1000
+          type  2 result/100
+          type  3 read bit
+     ### property need check must add int front
+-->
+<catalog>
+    <fans>
+        <fan id="fan1" >
+            <property name="present" location="/sys/wb_plat/fan/fan1/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan1/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan1/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/16-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan1/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan1/motor0/speed"/>
+        </fan>
+        <fan id="fan2" >
+            <property name="present" location="/sys/wb_plat/fan/fan2/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan2/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan2/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/17-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan2/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan2/motor0/speed"/>
+        </fan>
+        <fan id="fan3" >
+            <property name="present" location="/sys/wb_plat/fan/fan3/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan3/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan3/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/18-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan3/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan3/motor0/speed"/>
+        </fan>
+        <fan id="fan4" >
+            <property name="present" location="/sys/wb_plat/fan/fan4/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan4/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan4/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/19-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan4/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan4/motor0/speed"/>
+        </fan>
+    </fans>
+    <temps>
+        <temp id="INLET_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-0048/hwmon/*/temp1_input" type="1" addend="-3"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-0048/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-0048/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="OUTLET_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="MAC_IN_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="MAC_OUT_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-004a/hwmon/*/temp1_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-004a/hwmon/*/temp1_max" type="1"/>
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-004a/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+    </temps>
+    <psus>
+        <psu id="psu1" >
+            <property name="present" location="/sys/wb_plat/psu/psu1/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu1/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/24-0050/eeprom"/>
+            <property name="in_current"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/24-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/24-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/24-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/24-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/power2_input"  type="5"/>
+        </psu>
+        <psu id="psu2" >
+            <property name="present" location="/sys/wb_plat/psu/psu2/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu2/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/25-0050/eeprom"/>
+            <property name="in_current"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/25-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/25-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/25-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/25-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/power2_input"  type="5"/>
+        </psu> 
+    </psus> 
+    <dcdcs>
+        <dcdc id="Switch_ZSFP1_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="22.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_QSFP1_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="22.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_5v0_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_ZSFP1_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_QSFP1_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_5v0_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="6.000" />
+            <property name="dcdc_min"   gettype="config" value="4.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_1v2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_Cpld_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_1v2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.440" />
+            <property name="dcdc_min"   gettype="config" value="0.960" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_Cpld_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Con_1v2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.300" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Con_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.800" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Con_SSD_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="4.500" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Con_1v2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.440" />
+            <property name="dcdc_min"   gettype="config" value="0.960" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Con_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Con_SSD_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="4.686" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_5v_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.200" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v7_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.200" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_5v_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="6.000" />
+            <property name="dcdc_min"   gettype="config" value="4.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v7_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.040" />
+            <property name="dcdc_min"   gettype="config" value="1.360" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_CORE_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="47.300" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v05_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="15.400" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_CORE_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.184" />
+            <property name="dcdc_min"   gettype="config" value="1.456" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v05_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.260" />
+            <property name="dcdc_min"   gettype="config" value="0.840" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_CORE_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="220.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_ANALOG_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="18.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_CORE_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.200" />
+            <property name="dcdc_min"   gettype="config" value="0.600" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_ANALOG_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.960" />
+            <property name="dcdc_min"   gettype="config" value="0.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="9.900" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_2v23_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.200" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.440" />
+            <property name="dcdc_min"   gettype="config" value="0.960" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_2v23_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.676" />
+            <property name="dcdc_min"   gettype="config" value="1.784" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+    </dcdcs>
+    <mactemps>
+        <mactemp id="MAC_DIE_0" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp1_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_1" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp2_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_2" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp3_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_3" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp4_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_4" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp5_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_5" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp6_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_6" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp7_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_7" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp8_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_8" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp9_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_9" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp10_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_10" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp11_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_11" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp12_input"  type="1"/>
+        </mactemp>
+    </mactemps>
+    <cpus location="/sys/class/hwmon/hwmon0"/>
+    <decode>
+    <fanpresent>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </fanpresent>
+    <fanstatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </fanstatus>
+    <psucheck>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </psucheck>
+    <psustatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </psustatus>
+    <psutype>
+        <code key="CSU550AP-3-500" value="PA550II-F"/>
+        <code key="DPS-550AB-39 A" value="PA550II-F"/>
+        <code key="GW-CRPS550N2C" value="PA550II-F"/>
+        <code key="CSU550AP-3-300" value="PA550II-F"/>
+        <code key="DPS-550AB-39 B" value="PA550II-F"/>
+        <code key="CSU550AP-3" value="PA550II-F"/>
+        <code key="CSU550AP-3-501" value="PA550II-R"/>
+        <code key="DPS-550AB-40 A" value="PA550II-R"/>
+        <code key="GW-CRPS550N2RC" value="PA550II-R"/>
+    </psutype>
+    <fan_display_name>
+        <code key="M1HFAN III-F" value="M1HFAN III-F"/>
+        <code key="M1HFAN III-R" value="M1HFAN III-R"/>
+    </fan_display_name>
+    </decode>
+</catalog>
+
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev_exhaust.xml b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev_exhaust.xml
new file mode 100644
index 000000000000..6450c7a24316
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev_exhaust.xml
@@ -0,0 +1,419 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+      ### type  1 result/1000
+          type  2 result/100
+          type  3 read bit
+     ### property need check must add int front
+-->
+<catalog>
+    <fans>
+        <fan id="fan1" >
+            <property name="present" location="/sys/wb_plat/fan/fan1/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan1/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan1/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/16-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan1/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan1/motor0/speed"/>
+        </fan>
+        <fan id="fan2" >
+            <property name="present" location="/sys/wb_plat/fan/fan2/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan2/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan2/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/17-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan2/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan2/motor0/speed"/>
+        </fan>
+        <fan id="fan3" >
+            <property name="present" location="/sys/wb_plat/fan/fan3/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan3/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan3/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/18-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan3/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan3/motor0/speed"/>
+        </fan>
+        <fan id="fan4" >
+            <property name="present" location="/sys/wb_plat/fan/fan4/present"       type="4" decode="fanpresent" default="1"/>
+            <property name="status"  location="/sys/wb_plat/fan/fan4/motor0/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="status2" location="/sys/wb_plat/fan/fan4/motor1/status" type="4" decode="fanstatus"  default="1"/>
+            <property name="fru" e2type="fru"  location="/sys/bus/i2c/devices/19-0050/eeprom"/>
+            <property name="rotor1_speed" location="/sys/wb_plat/fan/fan4/motor1/speed"/>
+            <property name="rotor2_speed" location="/sys/wb_plat/fan/fan4/motor0/speed"/>
+        </fan>
+    </fans>
+    <temps>
+        <temp id="INLET_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_input" type="1" addend="-3"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-004c/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="OUTLET_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-0048/hwmon/*/temp1_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-0048/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-0048/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="MAC_IN_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-004a/hwmon/*/temp1_input" type="1" />
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-004a/hwmon/*/temp1_max" type="1" />
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-004a/hwmon/*/temp1_max_hyst" type="1" />
+        </temp>
+        <temp id="MAC_OUT_TEMP" >
+            <property name="temp1_input" location="/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_input" type="1"/>
+            <property name="temp1_max"   location="/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_max" type="1"/>
+            <property name="temp1_max_hyst"    location="/sys/bus/i2c/devices/3-0049/hwmon/*/temp1_max_hyst" type="1"/>
+        </temp>
+    </temps>
+    <psus>
+        <psu id="psu1" >
+            <property name="present" location="/sys/wb_plat/psu/psu1/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu1/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/24-0050/eeprom"/>
+            <property name="in_current"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/24-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/24-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/24-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/24-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/24-0058/hwmon/*/power2_input"  type="5"/>
+        </psu>
+        <psu id="psu2" >
+            <property name="present" location="/sys/wb_plat/psu/psu2/present" type="4" decode="psucheck"  default="1"/>
+            <property name="status"  location="/sys/wb_plat/psu/psu2/output"  type="4" decode="psustatus" default="1"/>
+            <property name="psu" e2type="fru"  location="/sys/bus/i2c/devices/25-0050/eeprom"/>
+            <property name="in_current"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/curr1_input" type="1" />
+            <property name="in_voltage"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/in1_input"  type="1"/>
+            <property name="out_voltage"    location="/sys/bus/i2c/devices/25-0058/hwmon/*/in2_input" type="1" />
+            <property name="out_current"    location="/sys/bus/i2c/devices/25-0058/hwmon/*/curr2_input" type="1" />
+            <property name="temp"    location="/sys/bus/i2c/devices/25-0058/hwmon/*/temp1_input" type="1"/>
+            <property name="fan_speed"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/fan1_input" />
+            <property name="in_power"      location="/sys/bus/i2c/devices/25-0058/hwmon/*/power1_input"  type="5"/>
+            <property name="out_power"     location="/sys/bus/i2c/devices/25-0058/hwmon/*/power2_input"  type="5"/>
+        </psu> 
+    </psus> 
+    <dcdcs>
+        <dcdc id="Switch_ZSFP1_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="22.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_QSFP1_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="22.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_5v0_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_ZSFP1_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_QSFP1_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_5v0_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="6.000" />
+            <property name="dcdc_min"   gettype="config" value="4.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_1v2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_Cpld_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_1v2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.440" />
+            <property name="dcdc_min"   gettype="config" value="0.960" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_Cpld_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Con_1v2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.300" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Con_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.800" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Con_SSD_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="4.500" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Con_1v2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.440" />
+            <property name="dcdc_min"   gettype="config" value="0.960" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Con_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Con_SSD_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_3v3_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="4.686" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_5v_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.200" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v7_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.200" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_3v3_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="3.960" />
+            <property name="dcdc_min"   gettype="config" value="2.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_5v_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="6.000" />
+            <property name="dcdc_min"   gettype="config" value="4.000" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v7_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.040" />
+            <property name="dcdc_min"   gettype="config" value="1.360" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_CORE_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="47.300" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v05_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="15.400" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_CORE_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.184" />
+            <property name="dcdc_min"   gettype="config" value="1.456" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v05_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.260" />
+            <property name="dcdc_min"   gettype="config" value="0.840" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_CORE_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="220.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_ANALOG_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="18.000" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Switch_CORE_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.200" />
+            <property name="dcdc_min"   gettype="config" value="0.600" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Switch_ANALOG_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="0.960" />
+            <property name="dcdc_min"   gettype="config" value="0.640" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v2_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr1_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="9.900" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_2v23_C" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.200" />
+            <property name="dcdc_min"   gettype="config" value="-1.000" />
+            <property name="dcdc_unit"   gettype="config" value="A" />
+        </dcdc>
+
+        <dcdc id="Cpu_1v2_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in2_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="1.440" />
+            <property name="dcdc_min"   gettype="config" value="0.960" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+
+        <dcdc id="Cpu_2v23_V" >
+            <property name="dcdc_input" location="/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in3_input" type="6" />
+            <property name="dcdc_max"   gettype="config" value="2.676" />
+            <property name="dcdc_min"   gettype="config" value="1.784" />
+            <property name="dcdc_unit"   gettype="config" value="V" />
+        </dcdc>
+    </dcdcs>
+    <mactemps>
+        <mactemp id="MAC_DIE_0" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp1_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_1" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp2_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_2" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp3_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_3" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp4_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_4" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp5_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_5" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp6_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_6" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp7_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_7" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp8_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_8" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp9_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_9" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp10_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_10" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp11_input"  type="1"/>
+        </mactemp>
+        <mactemp id="MAC_DIE_11" >
+            <property name="temp_input" location="/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp12_input"  type="1"/>
+        </mactemp>
+    </mactemps>
+    <cpus location="/sys/class/hwmon/hwmon0"/>
+    <decode>
+    <fanpresent>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </fanpresent>
+    <fanstatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </fanstatus>
+    <psucheck>
+        <code key="1" value="PRESENT"/>
+        <code key="0" value="ABSENT"/>
+    </psucheck>
+    <psustatus>
+        <code key="1" value="OK"/>
+        <code key="0" value="NOT OK"/>
+    </psustatus>
+    <psutype>
+        <code key="CSU550AP-3-500" value="PA550II-F"/>
+        <code key="DPS-550AB-39 A" value="PA550II-F"/>
+        <code key="GW-CRPS550N2C" value="PA550II-F"/>
+        <code key="CSU550AP-3-300" value="PA550II-F"/>
+        <code key="DPS-550AB-39 B" value="PA550II-F"/>
+        <code key="CSU550AP-3" value="PA550II-F"/>
+        <code key="CSU550AP-3-501" value="PA550II-R"/>
+        <code key="DPS-550AB-40 A" value="PA550II-R"/>
+        <code key="GW-CRPS550N2RC" value="PA550II-R"/>
+    </psutype>
+    <fan_display_name>
+        <code key="M1HFAN III-F" value="M1HFAN III-F"/>
+        <code key="M1HFAN III-R" value="M1HFAN III-R"/>
+    </fan_display_name>
+    </decode>
+</catalog>
+
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/fru.py b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/fru.py
new file mode 100644
index 000000000000..f95164e03601
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/fru.py
@@ -0,0 +1,961 @@
+#!/usr/bin/python3
+import collections
+from datetime import datetime, timedelta
+from bitarray import bitarray
+
+
+__DEBUG__ = "N"
+
+
+class FruException(Exception):
+    def __init__(self, message='fruerror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+
+def e_print(err):
+    print("ERROR: " + err)
+
+
+def d_print(debug_info):
+    if __DEBUG__ == "Y":
+        print(debug_info)
+
+
+class FruUtil():
+    @staticmethod
+    def decodeLength(value):
+        a = bitarray(8)
+        a.setall(True)
+        a[0:1] = 0
+        a[1:2] = 0
+        x = ord(a.tobytes())
+        return x & ord(value)
+
+    @staticmethod
+    def minToData():
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        endtime = datetime.now()
+        seconds = (endtime - starttime).total_seconds()
+        mins = seconds // 60
+        m = int(round(mins))
+        return m
+
+    @staticmethod
+    def getTimeFormat():
+        return datetime.now().strftime('%Y-%m-%d')
+
+    @staticmethod
+    def getTypeLength(value):
+        if value is None or len(value) == 0:
+            return 0
+        a = bitarray(8)
+        a.setall(False)
+        a[0:1] = 1
+        a[1:2] = 1
+        x = ord(a.tobytes())
+        return x | len(value)
+
+    @staticmethod
+    def checksum(b):
+        result = 0
+        for item in b:
+            result += ord(item)
+        return (0x100 - (result & 0xff)) & 0xff
+
+
+class BaseArea(object):
+    SUGGESTED_SIZE_COMMON_HEADER = 8
+    SUGGESTED_SIZE_INTERNAL_USE_AREA = 72
+    SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32
+    SUGGESTED_SIZE_BOARD_INFO_AREA = 80
+    SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80
+
+    INITVALUE = b'\x00'
+    resultvalue = INITVALUE * 256
+    COMMON_HEAD_VERSION = b'\x01'
+    __childList = None
+
+    def __init__(self, name="", size=0, offset=0):
+        self.__childList = []
+        self._offset = offset
+        self.name = name
+        self._size = size
+        self._isPresent = False
+        self._data = b'\x00' * size
+
+    @property
+    def childList(self):
+        return self.__childList
+
+    @childList.setter
+    def childList(self, value):
+        self.__childList = value
+
+    @property
+    def offset(self):
+        return self._offset
+
+    @offset.setter
+    def offset(self, value):
+        self._offset = value
+
+    @property
+    def size(self):
+        return self._size
+
+    @size.setter
+    def size(self, value):
+        self._size = value
+
+    @property
+    def data(self):
+        return self._data
+
+    @data.setter
+    def data(self, value):
+        self._data = value
+
+    @property
+    def isPresent(self):
+        return self._isPresent
+
+    @isPresent.setter
+    def isPresent(self, value):
+        self._isPresent = value
+
+
+class InternalUseArea(BaseArea):
+    pass
+
+
+class ChassisInfoArea(BaseArea):
+    pass
+
+
+class BoardInfoArea(BaseArea):
+    _boardTime = None
+    _fields = None
+    _mfg_date = None
+    areaversion = None
+    _boardversion = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "mfg_date            : %s \n" \
+                    "boardManufacturer   : %s \n" \
+                    "boardProductName    : %s \n" \
+                    "boardSerialNumber   : %s \n" \
+                    "boardPartNumber     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.boardversion), self.size,
+                              self.language, self.getMfgRealData(),
+                              self.boardManufacturer, self.boardProductName,
+                              self.boardSerialNumber, self.boardPartNumber,
+                              self.fruFileId)
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "boardextra%d         : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["boardversion"] = ord(self.boardversion)
+        dic["boardlength"] = self.size
+        dic["boardlanguage"] = self.language
+        dic["boardmfg_date"] = self.getMfgRealData()
+        dic["boardManufacturer"] = self.boardManufacturer
+        dic["boardProductName"] = self.boardProductName
+        dic["boardSerialNumber"] = self.boardSerialNumber
+        dic["boardPartNumber"] = self.boardPartNumber
+        dic["boardfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]
+        index += 1
+        d_print("decode length :%d class size:%d" %
+                ((ord(self.data[index]) * 8), self.size))
+        index += 2
+
+        timetmp = self.data[index: index + 3]
+        self.mfg_date = ord(timetmp[0]) | (
+            ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16)
+        d_print("decode getMfgRealData :%s" % self.getMfgRealData())
+        index += 3
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardManufacturer:%s" % self.boardManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardProductName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardProductName:%s" % self.boardProductName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardSerialNumber:%s" % self.boardSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardPartNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardPartNumber:%s" % self.boardPartNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if self.data[index] != chr(0xc1):
+                templen = FruUtil.decodeLength(self.data[index])
+                tmpval = self.data[index + 1: index + templen + 1]
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+            else:
+                break
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("boardInfoArea version:%x" % ord(self.boardversion))
+        d_print("boardInfoArea length:%d" % self.size)
+        d_print("boardInfoArea language:%x" % self.language)
+        self.mfg_date = FruUtil.minToData()
+        d_print("boardInfoArea mfg_date:%x" % self.mfg_date)
+
+        self.data = chr(ord(self.boardversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        self.data += chr(self.mfg_date & 0xFF)
+        self.data += chr((self.mfg_date >> 8) & 0xFF)
+        self.data += chr((self.mfg_date >> 16) & 0xFF)
+
+        d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer)
+        typelength = FruUtil.getTypeLength(self.boardManufacturer)
+        self.data += chr(typelength)
+        self.data += self.boardManufacturer
+
+        d_print("boardInfoArea boardProductName:%s" % self.boardProductName)
+        self.data += chr(FruUtil.getTypeLength(self.boardProductName))
+        self.data += self.boardProductName
+
+        d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber))
+        self.data += self.boardSerialNumber
+
+        d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardPartNumber))
+        self.data += self.boardPartNumber
+
+        d_print("boardInfoArea fruFileId:%s" % self.fruFileId)
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        d_print("self data:%d" % len(self.data))
+        d_print("self size:%d" % self.size)
+        d_print("adjust size:%d" % (self.size - len(self.data) - 1))
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+
+        # checksum
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+    def getMfgRealData(self):
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        mactime = starttime + timedelta(minutes=self.mfg_date)
+        return mactime
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def mfg_date(self):
+        return self._mfg_date
+
+    @mfg_date.setter
+    def mfg_date(self, val):
+        self._mfg_date = val
+
+    @property
+    def boardversion(self):
+        self._boardversion = self.COMMON_HEAD_VERSION
+        return self._boardversion
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, val):
+        self._FRUFileID = val
+
+    @property
+    def boardPartNumber(self):
+        return self._boardPartNumber
+
+    @boardPartNumber.setter
+    def boardPartNumber(self, val):
+        self._boardPartNumber = val
+
+    @property
+    def boardSerialNumber(self):
+        return self._boardSerialNumber
+
+    @boardSerialNumber.setter
+    def boardSerialNumber(self, val):
+        self._boardSerialNumber = val
+
+    @property
+    def boardProductName(self):
+        return self._boradProductName
+
+    @boardProductName.setter
+    def boardProductName(self, val):
+        self._boradProductName = val
+
+    @property
+    def boardManufacturer(self):
+        return self._boardManufacturer
+
+    @boardManufacturer.setter
+    def boardManufacturer(self, val):
+        self._boardManufacturer = val
+
+    @property
+    def boardTime(self):
+        return self._boardTime
+
+    @boardTime.setter
+    def boardTime(self, val):
+        self._boardTime = val
+
+    @property
+    def fields(self):
+        return self._fields
+
+    @fields.setter
+    def fields(self, val):
+        self._fields = val
+
+
+class ProductInfoArea(BaseArea):
+    _productManufacturer = None
+    _productAssetTag = None
+    _FRUFileID = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "productManufacturer : %s \n" \
+                    "productName         : %s \n" \
+                    "productPartModelName: %s \n" \
+                    "productVersion      : %s \n" \
+                    "productSerialNumber : %s \n" \
+                    "productAssetTag     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.areaversion), self.size,
+                              self.language, self.productManufacturer,
+                              self.productName, self.productPartModelName,
+                              self.productVersion, self.productSerialNumber,
+                              self.productAssetTag, self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "productextra%d       : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["productversion"] = ord(self.areaversion)
+        dic["productlength"] = self.size
+        dic["productlanguage"] = self.language
+        dic["productManufacturer"] = self.productManufacturer
+        dic["productName"] = self.productName
+        dic["productPartModelName"] = self.productPartModelName
+        dic["productVersion"] = int(self.productVersion, 16)
+        dic["productSerialNumber"] = self.productSerialNumber
+        dic["productAssetTag"] = self.productAssetTag
+        dic["productfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]  # 0
+        index += 1
+        d_print("decode length %d" % (ord(self.data[index]) * 8))
+        d_print("class size %d" % self.size)
+        index += 2
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productManufacturer:%s" % self.productManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productName:%s" % self.productName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productPartModelName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productPartModelName:%s" % self.productPartModelName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productVersion = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productVersion:%s" % self.productVersion)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productSerialNumber:%s" % self.productSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productAssetTag = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productAssetTag:%s" % self.productAssetTag)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if self.data[index] != chr(0xc1) and index < self.size - 1:
+                templen = FruUtil.decodeLength(self.data[index])
+                if templen == 0:
+                    break
+                tmpval = self.data[index + 1: index + templen + 1]
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+            else:
+                break
+
+    @property
+    def productVersion(self):
+        return self._productVersion
+
+    @productVersion.setter
+    def productVersion(self, name):
+        self._productVersion = name
+
+    @property
+    def areaversion(self):
+        self._areaversion = self.COMMON_HEAD_VERSION
+        return self._areaversion
+
+    @areaversion.setter
+    def areaversion(self, name):
+        self._areaversion = name
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def productManufacturer(self):
+        return self._productManufacturer
+
+    @productManufacturer.setter
+    def productManufacturer(self, name):
+        self._productManufacturer = name
+
+    @property
+    def productName(self):
+        return self._productName
+
+    @productName.setter
+    def productName(self, name):
+        self._productName = name
+
+    @property
+    def productPartModelName(self):
+        return self._productPartModelName
+
+    @productPartModelName.setter
+    def productPartModelName(self, name):
+        self._productPartModelName = name
+
+    @property
+    def productSerialNumber(self):
+        return self._productSerialNumber
+
+    @productSerialNumber.setter
+    def productSerialNumber(self, name):
+        self._productSerialNumber = name
+
+    @property
+    def productAssetTag(self):
+        return self._productAssetTag
+
+    @productAssetTag.setter
+    def productAssetTag(self, name):
+        self._productAssetTag = name
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, name):
+        self._FRUFileID = name
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("product version:%x" % ord(self.areaversion))
+        d_print("product length:%d" % self.size)
+        d_print("product language:%x" % self.language)
+        self.data = chr(ord(self.areaversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        typelength = FruUtil.getTypeLength(self.productManufacturer)
+        self.data += chr(typelength)
+        self.data += self.productManufacturer
+
+        self.data += chr(FruUtil.getTypeLength(self.productName))
+        self.data += self.productName
+
+        self.data += chr(FruUtil.getTypeLength(self.productPartModelName))
+        self.data += self.productPartModelName
+
+        self.data += chr(FruUtil.getTypeLength(self.productVersion))
+        self.data += self.productVersion
+
+        self.data += chr(FruUtil.getTypeLength(self.productSerialNumber))
+        self.data += self.productSerialNumber
+
+        self.data += chr(FruUtil.getTypeLength(self.productAssetTag))
+        if self.productAssetTag is not None:
+            self.data += self.productAssetTag
+
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea productextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+        d_print("self.data:%d" % len(self.data))
+        d_print("self.size:%d" % self.size)
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+
+class MultiRecordArea(BaseArea):
+    pass
+
+
+class Field(object):
+
+    def __init__(self, fieldType="ASCII", fieldData=""):
+        self.fieldData = fieldData
+        self.fieldType = fieldType
+
+    @property
+    def fieldType(self):
+        return self.fieldType
+
+    @property
+    def fieldData(self):
+        return self.fieldData
+
+
+class ipmifru(BaseArea):
+    _BoardInfoArea = None
+    _ProductInfoArea = None
+    _InternalUseArea = None
+    _ChassisInfoArea = None
+    _multiRecordArea = None
+    _productinfoAreaOffset = BaseArea.INITVALUE
+    _boardInfoAreaOffset = BaseArea.INITVALUE
+    _internalUserAreaOffset = BaseArea.INITVALUE
+    _chassicInfoAreaOffset = BaseArea.INITVALUE
+    _multiRecordAreaOffset = BaseArea.INITVALUE
+    _bindata = None
+    _bodybin = None
+    _version = BaseArea.COMMON_HEAD_VERSION
+    _zeroCheckSum = None
+    _frusize = 256
+
+    def __str__(self):
+        tmpstr = ""
+        if self.boardInfoArea.isPresent:
+            tmpstr += "\nboardinfoarea: \n"
+            tmpstr += self.boardInfoArea.__str__()
+        if self.productInfoArea.isPresent:
+            tmpstr += "\nproductinfoarea: \n"
+            tmpstr += self.productInfoArea.__str__()
+        return tmpstr
+
+    def decodeBin(self, eeprom):
+        commonHead = eeprom[0:8]
+        d_print("decode version %x" % ord(commonHead[0]))
+        if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]):
+            raise FruException("HEAD VERSION error,not Fru format!", -10)
+        if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]):
+            strtemp = "check header checksum error [cal:%02x data:%02x]" % (
+                FruUtil.checksum(commonHead[0:7]), ord(commonHead[7]))
+            raise FruException(strtemp, -3)
+        if ord(commonHead[1]) != ord(self.INITVALUE):
+            d_print("Internal Use Area is present")
+            self.internalUseArea = InternalUseArea(
+                name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA)
+            self.internalUseArea.isPresent = True
+            self.internalUserAreaOffset = ord(commonHead[1])
+            self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: (
+                self.internalUserAreaOffset * 8 + self.internalUseArea.size)]
+        if ord(commonHead[2]) != ord(self.INITVALUE):
+            d_print("Chassis Info Area is present")
+            self.chassisInfoArea = ChassisInfoArea(
+                name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA)
+            self.chassisInfoArea.isPresent = True
+            self.chassicInfoAreaOffset = ord(commonHead[2])
+            self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: (
+                self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)]
+        if ord(commonHead[3]) != ord(self.INITVALUE):
+            self.boardInfoArea = BoardInfoArea(
+                name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA)
+            self.boardInfoArea.isPresent = True
+            self.boardInfoAreaOffset = ord(commonHead[3])
+            self.boardInfoArea.size = ord(
+                eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8
+            d_print("Board Info Area is present size:%d" %
+                    (self.boardInfoArea.size))
+            self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: (
+                self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)]
+            if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]):
+                strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" %  \
+                    (FruUtil.checksum(
+                        self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.boardInfoArea.decodedata()
+        if ord(commonHead[4]) != ord(self.INITVALUE):
+            d_print("Product Info Area is present")
+            self.productInfoArea = ProductInfoArea(
+                name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA)
+            self.productInfoArea.isPresent = True
+            self.productinfoAreaOffset = ord(commonHead[4])
+            d_print("length offset value: %02x" %
+                    ord(eeprom[self.productinfoAreaOffset * 8 + 1]))
+            self.productInfoArea.size = ord(
+                eeprom[self.productinfoAreaOffset * 8 + 1]) * 8
+            d_print("Product Info Area is present size:%d" %
+                    (self.productInfoArea.size))
+
+            self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: (
+                self.productinfoAreaOffset * 8 + self.productInfoArea.size)]
+            if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]):
+                strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % (
+                    FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.productInfoArea.decodedata()
+        if ord(commonHead[5]) != ord(self.INITVALUE):
+            self.multiRecordArea = MultiRecordArea(
+                name="MultiRecord record Area ")
+            d_print("MultiRecord record present")
+            self.multiRecordArea.isPresent = True
+            self.multiRecordAreaOffset = ord(commonHead[5])
+            self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: (
+                self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)]
+
+    def initDefault(self):
+        self.version = self.COMMON_HEAD_VERSION
+        self.internalUserAreaOffset = self.INITVALUE
+        self.chassicInfoAreaOffset = self.INITVALUE
+        self.boardInfoAreaOffset = self.INITVALUE
+        self.productinfoAreaOffset = self.INITVALUE
+        self.multiRecordAreaOffset = self.INITVALUE
+        self.zeroCheckSum = self.INITVALUE
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        self.productInfoArea = None
+        self.internalUseArea = None
+        self.boardInfoArea = None
+        self.chassisInfoArea = None
+        self.multiRecordArea = None
+        # self.recalcute()
+
+    @property
+    def version(self):
+        return self._version
+
+    @version.setter
+    def version(self, name):
+        self._version = name
+
+    @property
+    def internalUserAreaOffset(self):
+        return self._internalUserAreaOffset
+
+    @internalUserAreaOffset.setter
+    def internalUserAreaOffset(self, obj):
+        self._internalUserAreaOffset = obj
+
+    @property
+    def chassicInfoAreaOffset(self):
+        return self._chassicInfoAreaOffset
+
+    @chassicInfoAreaOffset.setter
+    def chassicInfoAreaOffset(self, obj):
+        self._chassicInfoAreaOffset = obj
+
+    @property
+    def productinfoAreaOffset(self):
+        return self._productinfoAreaOffset
+
+    @productinfoAreaOffset.setter
+    def productinfoAreaOffset(self, obj):
+        self._productinfoAreaOffset = obj
+
+    @property
+    def boardInfoAreaOffset(self):
+        return self._boardInfoAreaOffset
+
+    @boardInfoAreaOffset.setter
+    def boardInfoAreaOffset(self, obj):
+        self._boardInfoAreaOffset = obj
+
+    @property
+    def multiRecordAreaOffset(self):
+        return self._multiRecordAreaOffset
+
+    @multiRecordAreaOffset.setter
+    def multiRecordAreaOffset(self, obj):
+        self._multiRecordAreaOffset = obj
+
+    @property
+    def zeroCheckSum(self):
+        return self._zeroCheckSum
+
+    @zeroCheckSum.setter
+    def zeroCheckSum(self, obj):
+        self._zeroCheckSum = obj
+
+    @property
+    def productInfoArea(self):
+        return self._ProductInfoArea
+
+    @productInfoArea.setter
+    def productInfoArea(self, obj):
+        self._ProductInfoArea = obj
+
+    @property
+    def internalUseArea(self):
+        return self._InternalUseArea
+
+    @internalUseArea.setter
+    def internalUseArea(self, obj):
+        self.internalUseArea = obj
+
+    @property
+    def boardInfoArea(self):
+        return self._BoardInfoArea
+
+    @boardInfoArea.setter
+    def boardInfoArea(self, obj):
+        self._BoardInfoArea = obj
+
+    @property
+    def chassisInfoArea(self):
+        return self._ChassisInfoArea
+
+    @chassisInfoArea.setter
+    def chassisInfoArea(self, obj):
+        self._ChassisInfoArea = obj
+
+    @property
+    def multiRecordArea(self):
+        return self._multiRecordArea
+
+    @multiRecordArea.setter
+    def multiRecordArea(self, obj):
+        self._multiRecordArea = obj
+
+    @property
+    def bindata(self):
+        return self._bindata
+
+    @bindata.setter
+    def bindata(self, obj):
+        self._bindata = obj
+
+    @property
+    def bodybin(self):
+        return self._bodybin
+
+    @bodybin.setter
+    def bodybin(self, obj):
+        self._bodybin = obj
+
+    def recalcuteCommonHead(self):
+        self.bindata = ""
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        d_print("common Header %d" % self.offset)
+        d_print("fru eeprom size  %d" % self._frusize)
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            self.internalUserAreaOffset = self.offset // 8
+            self.offset += self.internalUseArea.size
+            d_print("internalUseArea is present offset:%d" % self.offset)
+
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            self.chassicInfoAreaOffset = self.offset // 8
+            self.offset += self.chassisInfoArea.size
+            d_print("chassisInfoArea is present offset:%d" % self.offset)
+
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            self.boardInfoAreaOffset = self.offset // 8
+            self.offset += self.boardInfoArea.size
+            d_print("boardInfoArea is present offset:%d" % self.offset)
+            d_print("boardInfoArea is present size:%d" %
+                    self.boardInfoArea.size)
+
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            self.productinfoAreaOffset = self.offset // 8
+            self.offset += self.productInfoArea.size
+            d_print("productInfoArea is present offset:%d" % self.offset)
+
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            self.multiRecordAreaOffset = self.offset // 8
+            d_print("multiRecordArea is present offset:%d" % self.offset)
+
+        if self.internalUserAreaOffset == self.INITVALUE:
+            self.internalUserAreaOffset = 0
+        if self.productinfoAreaOffset == self.INITVALUE:
+            self.productinfoAreaOffset = 0
+        if self.chassicInfoAreaOffset == self.INITVALUE:
+            self.chassicInfoAreaOffset = 0
+        if self.boardInfoAreaOffset == self.INITVALUE:
+            self.boardInfoAreaOffset = 0
+        if self.multiRecordAreaOffset == self.INITVALUE:
+            self.multiRecordAreaOffset = 0
+
+        self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset
+                             - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff
+        d_print("zerochecksum:%x" % self.zeroCheckSum)
+        self.data = ""
+        self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr(
+            self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum)
+
+        self.bindata = self.data + self.bodybin
+        totallen = len(self.bindata)
+        d_print("totallen %d" % totallen)
+        if totallen < self._frusize:
+            self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0]))
+        else:
+            raise FruException('bin data more than %d' % self._frusize, -2)
+
+    def recalcutebin(self):
+        self.bodybin = ""
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            d_print("internalUseArea present")
+            self.bodybin += self.internalUseArea.data
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            d_print("chassisInfoArea present")
+            self.bodybin += self.chassisInfoArea.data
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            d_print("boardInfoArea present")
+            self.boardInfoArea.recalcute()
+            self.bodybin += self.boardInfoArea.data
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            d_print("productInfoAreapresent")
+            self.productInfoArea.recalcute()
+            self.bodybin += self.productInfoArea.data
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            d_print("multiRecordArea present")
+            self.bodybin += self.productInfoArea.data
+
+    def recalcute(self, fru_eeprom_size=256):
+        self._frusize = fru_eeprom_size
+        self.recalcutebin()
+        self.recalcuteCommonHead()
+
+    def setValue(self, area, field, value):
+        tmp_area = getattr(self, area, None)
+        if tmp_area is not None:
+            tmp_area.fruSetValue(field, value)
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/installer.conf b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/installer.conf
new file mode 100644
index 000000000000..7a9fec8cc99c
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/installer.conf
@@ -0,0 +1,2 @@
+CONSOLE_SPEED=115200
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll"
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/bios_upgrade_header.bin b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/bios_upgrade_header.bin
new file mode 100644
index 0000000000000000000000000000000000000000..08eba59b3a77d401ecbb2fcca0072552bb48e10f
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diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/cpu_cpld_upgrade_header.vme b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/cpu_cpld_upgrade_header.vme
new file mode 100644
index 0000000000000000000000000000000000000000..83f6b99d2a8bab09825ddc47d54ff4062f325423
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diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/fpga_upgrade_header.bin b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/fpga_upgrade_header.bin
new file mode 100644
index 0000000000000000000000000000000000000000..675ffa24dc947d306edb993e4e2820824bc83c3f
GIT binary patch
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diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/other_cpld_upgrade_header.vme b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/other_cpld_upgrade_header.vme
new file mode 100644
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literal 0
HcmV?d00001

diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/led_proc_init.soc b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/led_proc_init.soc
new file mode 100755
index 000000000000..59238f5cdc94
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/led_proc_init.soc
@@ -0,0 +1,7 @@
+m0 load 0 0x3800 /usr/share/sonic/platform/custom_led.bin
+
+led auto on
+
+led start
+
+linkscan SwPortBitMap=xe,ce
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py
new file mode 100644
index 000000000000..bdeaf190f099
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py
@@ -0,0 +1,402 @@
+#!/usr/bin/python3
+#   * onboard temperature sensors
+#   * FAN trays
+#   * PSU
+#
+import os
+import xml.etree.ElementTree as ET
+import glob
+import json
+from decimal import Decimal
+from fru import ipmifru
+
+
+MAILBOX_DIR = "/sys/bus/i2c/devices/"
+BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type"
+BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow"
+
+
+CONFIG_NAME = "dev.xml"
+
+
+def byteTostr(val):
+    strtmp = ''
+    for value in val:
+        strtmp += chr(value)
+    return strtmp
+
+
+def typeTostr(val):
+    if isinstance(val, bytes):
+        strtmp = byteTostr(val)
+        return strtmp
+    return val
+
+
+def get_board_id():
+    if not os.path.exists(BOARD_ID_PATH):
+        return "NA"
+    with open(BOARD_ID_PATH) as fd:
+        id_str = fd.read().strip()
+    return "0x%x" % (int(id_str, 10))
+
+
+def getboardairflow():
+    if not os.path.exists(BOARD_AIRFLOW_PATH):
+        return "NA"
+    with open(BOARD_AIRFLOW_PATH) as fd:
+        airflow_str = fd.read().strip()
+    data = json.loads(airflow_str)
+    airflow = data.get("board", "NA")
+    return airflow
+
+
+boardid = get_board_id()
+boardairflow = getboardairflow()
+
+
+DEV_XML_FILE_LIST = [
+    "dev_" + boardid + "_" + boardairflow + ".xml",
+    "dev_" + boardid + ".xml",
+    "dev_" + boardairflow + ".xml",
+]
+
+
+def dev_file_read(path, offset, read_len):
+    retval = "ERR"
+    val_list = []
+    msg = ""
+    ret = ""
+    fd = -1
+
+    if not os.path.exists(path):
+        return False, "%s %s not found" % (retval, path)
+
+    try:
+        fd = os.open(path, os.O_RDONLY)
+        os.lseek(fd, offset, os.SEEK_SET)
+        ret = os.read(fd, read_len)
+        for item in ret:
+            val_list.append(item)
+    except Exception as e:
+        msg = str(e)
+        return False, "%s %s" % (retval, msg)
+    finally:
+        if fd > 0:
+            os.close(fd)
+    return True, val_list
+
+
+def getPMCreg(location):
+    retval = 'ERR'
+    if not os.path.isfile(location):
+        return "%s %s  notfound" % (retval, location)
+    try:
+        with open(location, 'r') as fd:
+            retval = fd.read()
+    except Exception as error:
+        return "ERR %s" % str(error)
+
+    retval = retval.rstrip('\r\n')
+    retval = retval.lstrip(" ")
+    return retval
+
+
+# Get a mailbox register
+def get_pmc_register(reg_name):
+    retval = 'ERR'
+    mb_reg_file = reg_name
+    filepath = glob.glob(mb_reg_file)
+    if len(filepath) == 0:
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    mb_reg_file = filepath[0]
+    if not os.path.isfile(mb_reg_file):
+        # print mb_reg_file,  'not found !'
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    try:
+        with open(mb_reg_file, 'rb') as fd:
+            retval = fd.read()
+        retval = typeTostr(retval)
+    except Exception as error:
+        retval = "%s %s read failed, msg: %s" % (retval, mb_reg_file, str(error))
+
+    retval = retval.rstrip('\r\n')
+    retval = retval.lstrip(" ")
+    return retval
+
+
+class checktype():
+    def __init__(self, test1):
+        self.test1 = test1
+
+    @staticmethod
+    def getValue(location, bit, data_type, coefficient=1, addend=0):
+        try:
+            value_t = get_pmc_register(location)
+            if value_t.startswith("ERR") or value_t.startswith("NA"):
+                return value_t
+            if data_type == 1:
+                return float('%.1f' % ((float(value_t) / 1000) + addend))
+            if data_type == 2:
+                return float('%.1f' % (float(value_t) / 100))
+            if data_type == 3:
+                psu_status = int(value_t, 16)
+                return (psu_status & (1 << bit)) >> bit
+            if data_type == 4:
+                return int(value_t, 10)
+            if data_type == 5:
+                return float('%.1f' % (float(value_t) / 1000 / 1000))
+            if data_type == 6:
+                return Decimal(float(value_t) * coefficient / 1000).quantize(Decimal('0.000'))
+            return value_t
+        except Exception as e:
+            value_t = "ERR %s" % str(e)
+            return value_t
+
+    # fanFRU
+    @staticmethod
+    def decodeBinByValue(retval):
+        fru = ipmifru()
+        fru.decodeBin(retval)
+        return fru
+
+    @staticmethod
+    def getfruValue(prob_t, root, val):
+        try:
+            ret, binval_bytes = dev_file_read(val, 0, 256)
+            if ret is False:
+                return binval_bytes
+            binval = byteTostr(binval_bytes)
+            fanpro = {}
+            ret = checktype.decodeBinByValue(binval)
+            fanpro['fan_type'] = ret.productInfoArea.productName
+            fanpro['hw_version'] = str(int(ret.productInfoArea.productVersion, 16))
+            fanpro['sn'] = ret.productInfoArea.productSerialNumber
+            fan_display_name_dict = status.getDecodValue(root, "fan_display_name")
+            fan_name = fanpro['fan_type'].strip()
+            if len(fan_display_name_dict) == 0:
+                return fanpro
+            if fan_name not in fan_display_name_dict:
+                prob_t['errcode'] = -1
+                prob_t['errmsg'] = '%s' % ("ERR fan name: %s not support" % fan_name)
+            else:
+                fanpro['fan_type'] = fan_display_name_dict[fan_name]
+            return fanpro
+        except Exception as error:
+            return "ERR " + str(error)
+
+    @staticmethod
+    def getslotfruValue(val):
+        try:
+            binval = checktype.getValue(val, 0, 0)
+            if binval.startswith("ERR"):
+                return binval
+            slotpro = {}
+            ret = checktype.decodeBinByValue(binval)
+            slotpro['slot_type'] = ret.boardInfoArea.boardProductName
+            slotpro['hw_version'] = ret.boardInfoArea.boardextra1
+            slotpro['sn'] = ret.boardInfoArea.boardSerialNumber
+            return slotpro
+        except Exception as error:
+            return "ERR " + str(error)
+
+    @staticmethod
+    def getpsufruValue(prob_t, root, val):
+        try:
+            psu_match = False
+            binval = checktype.getValue(val, 0, 0)
+            if binval.startswith("ERR"):
+                return binval
+            psupro = {}
+            ret = checktype.decodeBinByValue(binval)
+            psupro['type1'] = ret.productInfoArea.productPartModelName
+            psupro['sn'] = ret.productInfoArea.productSerialNumber
+            psupro['hw_version'] = ret.productInfoArea.productVersion
+            psu_dict = status.getDecodValue(root, "psutype")
+            psupro['type1'] = psupro['type1'].strip()
+            if len(psu_dict) == 0:
+                return psupro
+            for psu_name, display_name in psu_dict.items():
+                if psu_name.strip() == psupro['type1']:
+                    psupro['type1'] = display_name
+                    psu_match = True
+                    break
+            if psu_match is not True:
+                prob_t['errcode'] = -1
+                prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" % psupro['type1'])
+            return psupro
+        except Exception as error:
+            return "ERR " + str(error)
+
+
+class status():
+    def __init__(self, productname):
+        self.productname = productname
+
+    @staticmethod
+    def getETroot(filename):
+        tree = ET.parse(filename)
+        root = tree.getroot()
+        return root
+
+    @staticmethod
+    def getDecodValue(collection, decode):
+        decodes = collection.find('decode')
+        testdecode = decodes.find(decode)
+        test = {}
+        if testdecode is None:
+            return test
+        for neighbor in testdecode.iter('code'):
+            test[neighbor.attrib["key"]] = neighbor.attrib["value"]
+        return test
+
+    @staticmethod
+    def getfileValue(location):
+        return checktype.getValue(location, " ", " ")
+
+    @staticmethod
+    def getETValue(a, filename, tagname):
+        root = status.getETroot(filename)
+        for neighbor in root.iter(tagname):
+            prob_t = {}
+            prob_t = neighbor.attrib
+            prob_t['errcode'] = 0
+            prob_t['errmsg'] = ''
+            for pros in neighbor.iter("property"):
+                ret = dict(list(neighbor.attrib.items()) + list(pros.attrib.items()))
+                if ret.get('e2type') == 'fru' and ret.get("name") == "fru":
+                    fruval = checktype.getfruValue(prob_t, root, ret["location"])
+                    if isinstance(fruval, str) and fruval.startswith("ERR"):
+                        prob_t['errcode'] = -1
+                        prob_t['errmsg'] = fruval
+                        break
+                    prob_t.update(fruval)
+                    continue
+
+                if ret.get("name") == "psu" and ret.get('e2type') == 'fru':
+                    psuval = checktype.getpsufruValue(prob_t, root, ret["location"])
+                    if isinstance(psuval, str) and psuval.startswith("ERR"):
+                        prob_t['errcode'] = -1
+                        prob_t['errmsg'] = psuval
+                        break
+                    prob_t.update(psuval)
+                    continue
+
+                if ret.get("gettype") == "config":
+                    prob_t[ret["name"]] = ret["value"]
+                    continue
+
+                if 'type' not in ret.keys():
+                    val = "0"
+                else:
+                    val = ret["type"]
+                if 'bit' not in ret.keys():
+                    bit = "0"
+                else:
+                    bit = ret["bit"]
+                if 'coefficient' not in ret.keys():
+                    coefficient = 1
+                else:
+                    coefficient = float(ret["coefficient"])
+                if 'addend' not in ret.keys():
+                    addend = 0
+                else:
+                    addend = float(ret["addend"])
+
+                s = checktype.getValue(ret["location"], int(bit), int(val), coefficient, addend)
+                if isinstance(s, str) and s.startswith("ERR"):
+                    prob_t['errcode'] = -1
+                    prob_t['errmsg'] = s
+                    break
+                if 'default' in ret.keys():
+                    rt = status.getDecodValue(root, ret['decode'])
+                    prob_t['errmsg'] = rt[str(s)]
+                    if str(s) != ret["default"]:
+                        prob_t['errcode'] = -1
+                        break
+                else:
+                    if 'decode' in ret.keys():
+                        rt = status.getDecodValue(root, ret['decode'])
+                        if (ret['decode'] == "psutype" and s.replace("\x00", "").rstrip() not in rt):
+                            prob_t['errcode'] = -1
+                            prob_t['errmsg'] = '%s' % ("ERR psu name: %s not support" %
+                                                       (s.replace("\x00", "").rstrip()))
+                        else:
+                            s = rt[str(s).replace("\x00", "").rstrip()]
+                name = ret["name"]
+                prob_t[name] = str(s)
+            a.append(prob_t)
+
+    @staticmethod
+    def getCPUValue(a, filename, tagname):
+        root = status.getETroot(filename)
+        for neighbor in root.iter(tagname):
+            location = neighbor.attrib["location"]
+        L = []
+        for dirpath, dirnames, filenames in os.walk(location):
+            for file in filenames:
+                if file.endswith("input"):
+                    L.append(os.path.join(dirpath, file))
+            L = sorted(L, reverse=False)
+        for i in range(len(L)):
+            prob_t = {}
+            prob_t["name"] = getPMCreg("%s/temp%d_label" % (location, i + 1))
+            prob_t["temp"] = float(getPMCreg("%s/temp%d_input" % (location, i + 1))) / 1000
+            prob_t["alarm"] = float(getPMCreg("%s/temp%d_crit_alarm" % (location, i + 1))) / 1000
+            prob_t["crit"] = float(getPMCreg("%s/temp%d_crit" % (location, i + 1))) / 1000
+            prob_t["max"] = float(getPMCreg("%s/temp%d_max" % (location, i + 1))) / 1000
+            a.append(prob_t)
+
+    @staticmethod
+    def getFileName():
+        fpath = os.path.dirname(os.path.realpath(__file__))
+        for file in DEV_XML_FILE_LIST:
+            xml = fpath + "/" + file
+            if os.path.exists(xml):
+                return xml
+        return fpath + "/" + CONFIG_NAME
+
+    @staticmethod
+    def checkFan(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "fan"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getTemp(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "temp"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getPsu(ret):
+        _filename = status.getFileName()
+       # _filename = "/usr/local/bin/" + status.getFileName()
+        _tagname = "psu"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getcputemp(ret):
+        _filename = status.getFileName()
+        _tagname = "cpus"
+        status.getCPUValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getDcdc(ret):
+        _filename = status.getFileName()
+        _tagname = "dcdc"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getmactemp(ret):
+        _filename = status.getFileName()
+        _tagname = "mactemp"
+        status.getETValue(ret, _filename, _tagname)
+
+    @staticmethod
+    def getmacpower(ret):
+        _filename = status.getFileName()
+        _tagname = "macpower"
+        status.getETValue(ret, _filename, _tagname)
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/pcie.yaml b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/pcie.yaml
new file mode 100644
index 000000000000..7b026cec395e
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/pcie.yaml
@@ -0,0 +1,440 @@
+- bus: '00'
+  dev: '00'
+  fn: '0'
+  id: 6f00
+  name: 'Host bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D DMI2
+    (rev 03)'
+- bus: '00'
+  dev: '01'
+  fn: '0'
+  id: 6f02
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 1 (rev 03)'
+- bus: '00'
+  dev: '01'
+  fn: '1'
+  id: 6f03
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 1 (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '0'
+  id: 6f04
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 03)'
+- bus: '00'
+  dev: '02'
+  fn: '2'
+  id: 6f06
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 2 (rev 03)'
+- bus: '00'
+  dev: '03'
+  fn: '0'
+  id: 6f08
+  name: 'PCI bridge: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D PCI
+    Express Root Port 3 (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '0'
+  id: 6f28
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Map/VTd_Misc/System Management (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '1'
+  id: 6f29
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO Hot Plug (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '2'
+  id: 6f2a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D IIO RAS/Control Status/Global Errors (rev 03)'
+- bus: '00'
+  dev: '05'
+  fn: '4'
+  id: 6f2c
+  name: 'PIC: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon D I/O APIC (rev
+    03)'
+- bus: '00'
+  dev: '14'
+  fn: '0'
+  id: 8c31
+  name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
+    xHCI (rev 05)'
+- bus: '00'
+  dev: '16'
+  fn: '0'
+  id: 8c3a
+  name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset
+    Family MEI Controller #1 (rev 04)'
+- bus: '00'
+  dev: '16'
+  fn: '1'
+  id: 8c3b
+  name: 'Communication controller: Intel Corporation 8 Series/C220 Series Chipset
+    Family MEI Controller #2 (rev 04)'
+- bus: '00'
+  dev: 1c
+  fn: '0'
+  id: 8c10
+  name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express
+    Root Port #1 (rev d5)'
+- bus: '00'
+  dev: 1c
+  fn: '1'
+  id: 8c12
+  name: 'PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express
+    Root Port #2 (rev d5)'
+- bus: '00'
+  dev: 1d
+  fn: '0'
+  id: 8c26
+  name: 'USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB
+    EHCI #1 (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '0'
+  id: 8c54
+  name: 'ISA bridge: Intel Corporation C224 Series Chipset Family Server Standard
+    SKU LPC Controller (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '2'
+  id: 8c02
+  name: 'SATA controller: Intel Corporation 8 Series/C220 Series Chipset Family 6-port
+    SATA Controller 1 [AHCI mode] (rev 05)'
+- bus: '00'
+  dev: 1f
+  fn: '3'
+  id: 8c22
+  name: 'SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller
+    (rev 05)'
+- bus: '01'
+  dev: '00'
+  fn: '0'
+  id: b873
+  name: 'Ethernet controller: Broadcom Inc. and subsidiaries Device b873 (rev 01)'
+- bus: '03'
+  dev: '00'
+  fn: '0'
+  id: 6f50
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 0'
+- bus: '03'
+  dev: '00'
+  fn: '1'
+  id: 6f51
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 1'
+- bus: '03'
+  dev: '00'
+  fn: '2'
+  id: 6f52
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 2'
+- bus: '03'
+  dev: '00'
+  fn: '3'
+  id: 6f53
+  name: 'System peripheral: Intel Corporation Xeon Processor D Family QuickData Technology
+    Register DMA Channel 3'
+- bus: '04'
+  dev: '00'
+  fn: '0'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '04'
+  dev: '00'
+  fn: '1'
+  id: 15ab
+  name: 'Ethernet controller: Intel Corporation Ethernet Connection X552 10 GbE Backplane'
+- bus: '07'
+  dev: '00'
+  fn: '0'
+  id: '1537'
+  name: 'Ethernet controller: Intel Corporation I210 Gigabit Backplane Connection
+    (rev 03)'
+- bus: 08
+  dev: '00'
+  fn: '0'
+  id: '7022'
+  name: 'Memory controller: Xilinx Corporation Device 7022'
+- bus: ff
+  dev: 0b
+  fn: '0'
+  id: 6f81
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '1'
+  id: 6f36
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '2'
+  id: 6f37
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link 0/1 (rev 03)'
+- bus: ff
+  dev: 0b
+  fn: '3'
+  id: 6f76
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R3 QPI Link Debug (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '0'
+  id: 6fe0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '1'
+  id: 6fe1
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '2'
+  id: 6fe2
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0c
+  fn: '3'
+  id: 6fe3
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '0'
+  id: 6ff8
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '4'
+  id: 6ffc
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '5'
+  id: 6ffd
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: 0f
+  fn: '6'
+  id: 6ffe
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Caching Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '0'
+  id: 6f1d
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R2PCIe Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '1'
+  id: 6f34
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D R2PCIe Agent (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '5'
+  id: 6f1e
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '6'
+  id: 6f7d
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '10'
+  fn: '7'
+  id: 6f1f
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Ubox (rev 03)'
+- bus: ff
+  dev: '12'
+  fn: '0'
+  id: 6fa0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 (rev 03)'
+- bus: ff
+  dev: '12'
+  fn: '1'
+  id: 6f30
+  name: 'Performance counters: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Home Agent 0 (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '0'
+  id: 6fa8
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '1'
+  id: 6f71
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Target Address/Thermal/RAS (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '2'
+  id: 6faa
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '3'
+  id: 6fab
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '4'
+  id: 6fac
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '5'
+  id: 6fad
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel Target Address Decoder (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '6'
+  id: 6fae
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Broadcast (rev 03)'
+- bus: ff
+  dev: '13'
+  fn: '7'
+  id: 6faf
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Global Broadcast (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '0'
+  id: 6fb0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 0 Thermal Control (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '1'
+  id: 6fb1
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 1 Thermal Control (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '2'
+  id: 6fb2
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 0 Error (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '3'
+  id: 6fb3
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 1 Error (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '4'
+  id: 6fbc
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '5'
+  id: 6fbd
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '6'
+  id: 6fbe
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '14'
+  fn: '7'
+  id: 6fbf
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D DDRIO Channel 0/1 Interface (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '0'
+  id: 6fb4
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 2 Thermal Control (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '1'
+  id: 6fb5
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 3 Thermal Control (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '2'
+  id: 6fb6
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 2 Error (rev 03)'
+- bus: ff
+  dev: '15'
+  fn: '3'
+  id: 6fb7
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Memory Controller 0 - Channel 3 Error (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '0'
+  id: 6f98
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '1'
+  id: 6f99
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '2'
+  id: 6f9a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '3'
+  id: 6fc0
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1e
+  fn: '4'
+  id: 6f9c
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1f
+  fn: '0'
+  id: 6f88
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
+- bus: ff
+  dev: 1f
+  fn: '2'
+  id: 6f8a
+  name: 'System peripheral: Intel Corporation Xeon E7 v4/Xeon E5 v4/Xeon E3 v4/Xeon
+    D Power Control Unit (rev 03)'
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform.json b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform.json
new file mode 100644
index 000000000000..d6964717c97d
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform.json
@@ -0,0 +1,402 @@
+{
+    "chassis": {
+        "name": "M2-W6510-48V8C",
+        "thermal_manager": false,
+        "status_led": {
+            "controllable": false,
+            "colors": ["green", "blinking_green", "amber", "blinking_amber"]
+        },
+        "components": [
+            {
+                "name": "CPU_CPLD"
+            },
+            {
+                "name": "CONNECT_CPLD"
+            },
+            {
+                "name": "CONNECT_CPLD-FAN"
+            },
+            {
+                "name": "MAC_CPLD1"
+            },
+            {
+                "name": "MAC_CPLD2"
+            },
+            {
+                "name": "FPGA"
+            },
+            {
+                "name": "BIOS"
+            }
+        ],
+        "fans": [
+            {
+                "name": "Fantray1_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray1_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray2_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray2_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray3_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray3_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray4_1",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            },
+            {
+                "name": "Fantray4_2",
+                "speed": {
+                    "controllable": true,
+                    "minimum": 50,
+                    "maximum": 100
+                },
+                "status_led": {
+                    "available": false,
+                    "colors": ["off", "red", "amber", "green"]
+                }
+            }
+        ],
+        "fan_drawers":[
+            {
+                "name": "Fantray1",
+                "num_fans" : 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "FanTray1_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "FanTray1_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray2",
+                "num_fans" : 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "FanTray2_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "FanTray2_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray3",
+                "num_fans" : 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "FanTray3_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "FanTray3_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Fantray4",
+                "num_fans" : 2,
+                "status_led": {
+                    "controllable": false,
+                    "colors": ["amber", "green", "off"]
+                },
+                "fans": [
+                    {
+                        "name": "FanTray4_1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    },
+                    {
+                        "name": "FanTray4_2",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "psus": [
+            {
+                "name": "Psu1",
+                "voltage": true,
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": true,
+                "voltage_low_threshold": true,
+                "temperature": true,
+                "fans_target_speed": true,
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU1_FAN1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            },
+            {
+                "name": "Psu2",
+                "voltage": true,
+                "current": true,
+                "power": true,
+                "max_power": false,
+                "voltage_high_threshold": true,
+                "voltage_low_threshold": true,
+                "temperature": true,
+                "fans_target_speed": true,
+                "status_led": {
+                    "controllable": false
+                },
+                "fans": [
+                    {
+                        "name": "PSU2_FAN1",
+                        "speed": {
+                            "controllable": true,
+                            "minimum": 50,
+                            "maximum": 100
+                        },
+                        "status_led": {
+                            "available": false
+                        }
+                    }
+                ]
+            }
+        ],
+        "thermals": [
+            {
+                "name": "ASIC_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "CPU_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "INLET_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "OUTLET_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "MAC_OUT_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "MAC_IN_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "PSU1_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            },
+            {
+                "name": "PSU2_TEMP",
+                "controllable": false,
+                "low-crit-threshold": true,
+                "high-crit-threshold": true,
+                "low-threshold": true,
+                "high-threshold": true,
+                "minimum-recorded": true,
+                "maximum-recorded": true
+            }
+        ],
+        "modules": [],
+        "sfps": []
+    },
+    "interfaces": {}
+}
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_asic b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_asic
new file mode 100644
index 000000000000..960467652765
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_asic
@@ -0,0 +1 @@
+broadcom
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_components.json
new file mode 100644
index 000000000000..d13b5f686218
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_components.json
@@ -0,0 +1,37 @@
+{
+    "chassis": {
+        "M2-W6510-48V8C": {
+            "component": {
+                "CPU_CPLD": {
+                    "firmware": "/usr/share/sonic/device/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/cpu_cpld_upgrade_header.vme",
+                    "version": "27190516"
+                },
+                "CONNECT_CPLD": {
+                    "firmware": "/usr/share/sonic/device/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/other_cpld_upgrade_header.vme",
+                    "version": "49191230"
+                },
+                "CONNECT_CPLD-FAN": {
+                    "firmware": "/usr/share/sonic/device/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/other_cpld_upgrade_header.vme",
+                    "version": "49191230"
+                },
+                "MAC_CPLD1": {
+                    "firmware" : "/usr/share/sonic/device/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/other_cpld_upgrade_header.vme",
+                    "version" : "16190108"
+                },
+                "MAC_CPLD2": {
+                    "firmware" : "/usr/share/sonic/device/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/other_cpld_upgrade_header.vme",
+                    "version" : "17200110"
+                },
+                "FPGA": {
+                    "firmware": "/usr/share/sonic/device/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/fpga_upgrade_header.bin",
+                    "version": "7a150016"
+                },
+                "BIOS": {
+                    "firmware" : "/usr/share/sonic/device/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/bios_upgrade_header.bin",
+                    "version" : "5.11(3BARB029)"
+                }
+            }
+        }
+    }
+}
+
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/plugins/sfputil.py b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/plugins/sfputil.py
new file mode 100644
index 000000000000..3e195a36f6cb
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/plugins/sfputil.py
@@ -0,0 +1,243 @@
+# sfputil.py
+#
+# Platform-specific SFP transceiver interface for SONiC
+#
+
+try:
+    import time
+    import os
+    import traceback
+    from sonic_sfp.sfputilbase import SfpUtilBase
+except ImportError as e:
+    raise ImportError("%s - required module not found" % str(e))
+
+class SfpUtil(SfpUtilBase):
+    """Platform-specific SfpUtil class"""
+
+    PORT_START = 1
+    PORT_END = 56
+    PORTS_IN_BLOCK = 57
+
+    EEPROM_OFFSET = 32
+    SFP_DEVICE_TYPE = "optoe2"
+    QSFP_DEVICE_TYPE = "optoe1"
+    I2C_MAX_ATTEMPT = 3
+
+    _port_to_eeprom_mapping = {}
+    port_to_i2cbus_mapping ={}
+
+    @property
+    def port_start(self):
+        return self.PORT_START
+
+    @property
+    def port_end(self):
+        return self.PORT_END
+
+    @property
+    def qsfp_ports(self):
+        return range(49, self.PORTS_IN_BLOCK)
+
+    @property
+    def port_to_eeprom_mapping(self):
+        return self._port_to_eeprom_mapping
+
+    def __init__(self):
+        for x in range(self.PORT_START, self.PORTS_IN_BLOCK):
+            self.port_to_i2cbus_mapping[x] = x + self.EEPROM_OFFSET - 1
+        SfpUtilBase.__init__(self)
+
+    def _sfp_read_file_path(self, file_path, offset, num_bytes):
+        attempts = 0
+        while attempts < self.I2C_MAX_ATTEMPT:
+            try:
+                file_path.seek(offset)
+                read_buf = file_path.read(num_bytes)
+            except Exception:
+                attempts += 1
+                time.sleep(0.05)
+            return True, read_buf
+        return False, None
+
+    def _sfp_eeprom_present(self, sysfs_sfp_i2c_client_eeprompath, offset):
+        """Tries to read the eeprom file to determine if the
+        device/sfp is present or not. If sfp present, the read returns
+        valid bytes. If not, read returns error 'Connection timed out"""
+
+        if not os.path.exists(sysfs_sfp_i2c_client_eeprompath):
+            return False
+        with open(sysfs_sfp_i2c_client_eeprompath, "rb", buffering=0) as sysfsfile:
+            rv, buf = self._sfp_read_file_path(sysfsfile, offset, 1)
+            return rv
+
+    def _add_new_sfp_device(self, sysfs_sfp_i2c_adapter_path, devaddr, devtype):
+        try:
+            sysfs_nd_path = "%s/new_device" % sysfs_sfp_i2c_adapter_path
+
+            # Write device address to new_device file
+            nd_str = "%s %s" % (devtype, hex(devaddr))
+            with open(sysfs_nd_path, "w") as nd_file:
+                nd_file.write(nd_str)
+
+        except Exception as err:
+            print("Error writing to new device file: %s" % str(err))
+            return 1
+        else:
+            return 0
+
+    def _get_port_eeprom_path(self, port_num, devid):
+        sysfs_i2c_adapter_base_path = ""
+
+        if port_num in self.port_to_eeprom_mapping:
+            sysfs_sfp_i2c_client_eeprom_path = self.port_to_eeprom_mapping[port_num]
+        else:
+            sysfs_i2c_adapter_base_path = "/sys/class/i2c-adapter"
+
+            i2c_adapter_id = self._get_port_i2c_adapter_id(port_num)
+            if i2c_adapter_id is None:
+                print("Error getting i2c bus num")
+                return None
+
+            # Get i2c virtual bus path for the sfp
+            sysfs_sfp_i2c_adapter_path = "%s/i2c-%s" % (sysfs_i2c_adapter_base_path,
+                                                        str(i2c_adapter_id))
+
+            # If i2c bus for port does not exist
+            if not os.path.exists(sysfs_sfp_i2c_adapter_path):
+                print("Could not find i2c bus %s. Driver not loaded?" % sysfs_sfp_i2c_adapter_path)
+                return None
+
+            sysfs_sfp_i2c_client_path = "%s/%s-00%s" % (sysfs_sfp_i2c_adapter_path,
+                                                        str(i2c_adapter_id),
+                                                        hex(devid)[-2:])
+
+            # If sfp device is not present on bus, Add it
+            if not os.path.exists(sysfs_sfp_i2c_client_path):
+                if port_num in self.qsfp_ports:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.QSFP_DEVICE_TYPE)
+                else:
+                    ret = self._add_new_sfp_device(
+                            sysfs_sfp_i2c_adapter_path, devid, self.SFP_DEVICE_TYPE)
+                if ret != 0:
+                    print("Error adding sfp device")
+                    return None
+
+            sysfs_sfp_i2c_client_eeprom_path = "%s/eeprom" % sysfs_sfp_i2c_client_path
+
+        return sysfs_sfp_i2c_client_eeprom_path
+
+    def _read_eeprom_specific_bytes(self, sysfsfile_eeprom, offset, num_bytes):
+        eeprom_raw = []
+        for i in range(0, num_bytes):
+            eeprom_raw.append("0x00")
+
+        rv, raw = self._sfp_read_file_path(sysfsfile_eeprom, offset, num_bytes)
+        if rv is False:
+            return None
+
+        try:
+            for n in range(0, num_bytes):
+                eeprom_raw[n] = hex(raw[n])[2:].zfill(2)
+        except Exception:
+            return None
+
+        return eeprom_raw
+
+    def get_eeprom_dom_raw(self, port_num):
+        if port_num in self.qsfp_ports:
+            # QSFP DOM EEPROM is also at addr 0x50 and thus also stored in eeprom_ifraw
+            return None
+        # Read dom eeprom at addr 0x51
+        return self._read_eeprom_devid(port_num, self.IDENTITY_EEPROM_ADDR, 256)
+
+    def get_presence(self, port_num):
+        # Check for invalid port_num
+        if port_num < self.port_start or port_num > self.port_end:
+            return False
+
+        presence_path = "/sys/wb_plat/sff/sff%d/present" % port_num
+
+        try:
+            with open(presence_path, "rb") as data:
+                presence_data = data.read(2)
+                if presence_data == "":
+                    return False
+                result = int(presence_data, 16)
+        except IOError:
+            return False
+
+        if result == 1:
+            return True
+        return False
+
+    def get_low_power_mode(self, port_num):
+        # Check for invalid port_num
+
+        return True
+
+    def set_low_power_mode(self, port_num, lpmode):
+        # Check for invalid port_num
+
+        return True
+
+    def reset(self, port_num):
+        # Check for invalid port_num
+        if port_num < self.port_start or port_num > self.port_end:
+            return False
+
+        return True
+
+    def get_transceiver_change_event(self, timeout=0):
+        return False, {}
+
+    def get_highest_temperature(self):
+        offset = 0
+        hightest_temperature = -9999
+
+        presence_flag = False
+        read_eeprom_flag = False
+        temperature_valid_flag = False
+
+        for port in range(49, self.PORTS_IN_BLOCK):
+            if self.get_presence(port) is False:
+                continue
+
+            presence_flag = True
+
+            if port in self.qsfp_ports:
+                offset = 22
+            else:
+                offset = 96
+
+            eeprom_path = self._get_port_eeprom_path(port, 0x50)
+            try:
+                with open(eeprom_path, mode="rb", buffering=0) as eeprom:
+                    read_eeprom_flag = True
+                    eeprom_raw = self._read_eeprom_specific_bytes(eeprom, offset, 2)
+                    msb = int(eeprom_raw[0], 16)
+                    lsb = int(eeprom_raw[1], 16)
+
+                    result = (msb << 8) | (lsb & 0xff)
+                    result = float(result / 256.0)
+                    if -50 <= result <= 200:
+                        temperature_valid_flag = True
+                        hightest_temperature = max(hightest_temperature, result)
+            except Exception:
+                print(traceback.format_exc())
+
+        # all port not presence
+        if presence_flag is False:
+            hightest_temperature = -10000
+
+        # all port read eeprom fail
+        elif read_eeprom_flag is False:
+            hightest_temperature = -9999
+
+        # all port temperature invalid
+        elif read_eeprom_flag is True and temperature_valid_flag is False:
+            hightest_temperature = -10000
+
+        hightest_temperature = round(hightest_temperature, 2)
+
+        return hightest_temperature
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/plugins/ssd_util.py
new file mode 100755
index 000000000000..89d3ccd770bd
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/plugins/ssd_util.py
@@ -0,0 +1,311 @@
+#
+# ssd_util.py
+#
+# Generic implementation of the SSD health API
+# SSD models supported:
+#  - InnoDisk
+#  - StorFly
+#  - Virtium
+
+try:
+    import re
+    import os
+    import subprocess
+    from sonic_platform_base.sonic_ssd.ssd_base import SsdBase
+except ImportError as e:
+    raise ImportError (str(e) + "- required module not found")
+
+SMARTCTL = "smartctl {} -a"
+INNODISK = "iSmart -d {}"
+VIRTIUM  = "SmartCmd -m {}"
+DISK_LIST_CMD = "fdisk -l -o Device"
+DISK_FREE_CMD = "df -h"
+MOUNT_CMD = "mount"
+
+NOT_AVAILABLE = "N/A"
+PE_CYCLE = 3000
+FAIL_PERCENT = 95
+
+# Set Vendor Specific IDs
+INNODISK_HEALTH_ID = 169
+INNODISK_TEMPERATURE_ID = 194
+
+class SsdUtil(SsdBase):
+    """
+    Generic implementation of the SSD health API
+    """
+    model = NOT_AVAILABLE
+    serial = NOT_AVAILABLE
+    firmware = NOT_AVAILABLE
+    temperature = NOT_AVAILABLE
+    health = NOT_AVAILABLE
+    remaining_life = NOT_AVAILABLE
+    sata_rate = NOT_AVAILABLE
+    ssd_info = NOT_AVAILABLE
+    vendor_ssd_info = NOT_AVAILABLE
+
+    def __init__(self, diskdev):
+        self.vendor_ssd_utility = {
+            "Generic"  : { "utility" : SMARTCTL, "parser" : self.parse_generic_ssd_info },
+            "InnoDisk" : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+            "M.2"      : { "utility" : INNODISK, "parser" : self.parse_innodisk_info },
+            "StorFly"  : { "utility" : VIRTIUM,  "parser" : self.parse_virtium_info },
+            "Virtium"  : { "utility" : VIRTIUM,  "parser" : self.parse_virtium_info }
+        }
+
+        """
+        The dict model_attr keys relate the vendors
+        LITEON : "ER2-GD","AF2MA31DTDLT"
+        Intel  : "SSDSCKKB"
+        SMI    : "SM619GXC"
+        samsung: "MZNLH"
+        ADATA  : "IM2S3134N"
+        """
+        self.model_attr = {
+             "ER2-GD"       : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+             "AF2MA31DTDLT" : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" },
+             "SSDSCK"       : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n233\s+(.+?)\n" },
+             "SM619GXC"     : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n169\s+(.+?)\n" },
+             "MZNLH"        : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n245\s+(.+?)\n" },
+             "IM2S3134N"    : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n231\s+(.+?)\n" }
+        }
+
+        self.key_list = list(self.model_attr.keys())
+        self.attr_info_rule = "[\s\S]*SMART Attributes Data Structure revision number: 1|SMART Error Log Version[\s\S]*"
+        self.dev = diskdev
+        # Generic part
+        self.fetch_generic_ssd_info(diskdev)
+        self.parse_generic_ssd_info()
+        self.fetch_vendor_ssd_info(diskdev, "Generic")
+        
+        # Known vendor part
+        if self.model:
+            model_short = self.model.split()[0]
+            if model_short in self.vendor_ssd_utility:
+                self.fetch_vendor_ssd_info(diskdev, model_short)
+                self.parse_vendor_ssd_info(model_short)
+            else:
+                # No handler registered for this disk model
+                pass
+        else:
+            # Failed to get disk model
+            self.model = "Unknown"
+
+    def _execute_shell(self, cmd):
+        process = subprocess.Popen(cmd.split(), universal_newlines=True, stdout=subprocess.PIPE)
+        output, error = process.communicate()
+        exit_code = process.returncode
+        if exit_code:
+            return None
+        return output
+
+    def _parse_re(self, pattern, buffer):
+        res_list = re.findall(pattern, str(buffer))
+        return res_list[0] if res_list else NOT_AVAILABLE
+
+    def fetch_generic_ssd_info(self, diskdev):
+        self.ssd_info = self._execute_shell(self.vendor_ssd_utility["Generic"]["utility"].format(diskdev))
+
+    # Health and temperature values may be overwritten with vendor specific data
+    def parse_generic_ssd_info(self):
+        if "nvme" in self.dev:
+            self.model = self._parse_re('Model Number:\s*(.+?)\n', self.ssd_info)
+
+            health_raw = self._parse_re('Percentage Used\s*(.+?)\n', self.ssd_info)
+            if health_raw == NOT_AVAILABLE:
+                self.health = NOT_AVAILABLE
+            else:
+                health_raw = health_raw.split()[-1]
+                self.health = 100 - float(health_raw.strip('%'))
+
+            temp_raw = self._parse_re('Temperature\s*(.+?)\n', self.ssd_info)
+            if temp_raw == NOT_AVAILABLE:
+                self.temperature = NOT_AVAILABLE
+            else:
+                temp_raw = temp_raw.split()[-2]
+                self.temperature = float(temp_raw)
+        else:
+            self.model = self._parse_re('Device Model:\s*(.+?)\n', self.ssd_info)
+            model_key = ""
+            for key in self.key_list:
+                if re.search(key, self.model):
+                    model_key = key
+                    break
+            if  model_key != "":
+                self.remaining_life = self._parse_re(self.model_attr[model_key]["remainingLife"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[2]
+                self.temperature = self._parse_re(self.model_attr[model_key]["temperature"], re.sub(self.attr_info_rule,"",self.ssd_info)).split()[8]
+                self.health = self.remaining_life
+            # Get the LITEON ssd health value by (PE CYCLE - AVG ERASE CYCLE )/(PE CYCLE)
+            if model_key in ["ER2-GD", "AF2MA31DTDLT"]:
+                avg_erase = int(self._parse_re('\n173\s+(.+?)\n' ,re.sub(self.attr_info_rule,"",self.ssd_info)).split()[-1])
+                self.health = int(round((PE_CYCLE - avg_erase)/PE_CYCLE*100,0))
+            if self.remaining_life != NOT_AVAILABLE and  int(self.remaining_life) < FAIL_PERCENT:
+                self.remaining_life = "Fail"
+        self.sata_rate = self._parse_re('SATA Version is:.*current: (.+?)\)\n', self.ssd_info)
+        self.serial = self._parse_re('Serial Number:\s*(.+?)\n', self.ssd_info)
+        self.firmware = self._parse_re('Firmware Version:\s*(.+?)\n', self.ssd_info)
+
+    def parse_innodisk_info(self):
+        if self.vendor_ssd_info:
+            self.health = self._parse_re('Health:\s*(.+?)%', self.vendor_ssd_info)
+            self.temperature = self._parse_re('Temperature\s*\[\s*(.+?)\]', self.vendor_ssd_info)
+        else:
+            if self.health == NOT_AVAILABLE:
+                health_raw = self.parse_id_number(INNODISK_HEALTH_ID)
+                self.health = health_raw.split()[-1]
+            if self.temperature == NOT_AVAILABLE:
+                temp_raw = self.parse_id_number(INNODISK_TEMPERATURE_ID)
+                self.temperature = temp_raw.split()[-6]
+
+    def parse_virtium_info(self):
+        if self.vendor_ssd_info:
+            self.temperature = self._parse_re('Temperature_Celsius\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            nand_endurance = self._parse_re('NAND_Endurance\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            avg_erase_count = self._parse_re('Average_Erase_Count\s*\d*\s*(\d+?)\s+', self.vendor_ssd_info)
+            try:
+                self.health = 100 - (float(avg_erase_count) * 100 / float(nand_endurance))
+            except (ValueError, ZeroDivisionError):
+                # Invalid avg_erase_count or nand_endurance.
+                pass
+
+    def fetch_vendor_ssd_info(self, diskdev, model):
+        self.vendor_ssd_info = self._execute_shell(self.vendor_ssd_utility[model]["utility"].format(diskdev))
+
+    def parse_vendor_ssd_info(self, model):
+        self.vendor_ssd_utility[model]["parser"]()
+
+    def check_readonly2(self, partition, filesystem):
+        # parse mount cmd output info
+        mount_info = self._execute_shell(MOUNT_CMD)
+        for line in mount_info.split('\n'):
+            column_list = line.split()
+            if line == '':
+                continue
+            if column_list[0] == partition and column_list[2] == filesystem:
+                if column_list[5].split(',')[0][1:] == "ro":
+                    return partition
+                else:
+                    return NOT_AVAILABLE
+        return NOT_AVAILABLE
+
+    def check_readonly(self, partition, filesystem):
+        ret = os.access(filesystem, os.W_OK)
+        if ret == False:
+            return partition
+        else:
+            return NOT_AVAILABLE
+        
+    def get_health(self):
+        """
+        Retrieves current disk health in percentages
+
+        Returns:
+            A float number of current ssd health
+            e.g. 83.5
+        """
+        return float(self.health)
+
+    def get_temperature(self):
+        """
+        Retrieves current disk temperature in Celsius
+
+        Returns:
+            A float number of current temperature in Celsius
+            e.g. 40.1
+        """
+        return float(self.temperature)
+
+    def get_model(self):
+        """
+        Retrieves model for the given disk device
+
+        Returns:
+            A string holding disk model as provided by the manufacturer
+        """
+        return self.model
+
+    def get_firmware(self):
+        """
+        Retrieves firmware version for the given disk device
+
+        Returns:
+            A string holding disk firmware version as provided by the manufacturer
+        """
+        return self.firmware
+
+    def get_serial(self):
+        """
+        Retrieves serial number for the given disk device
+
+        Returns:
+            A string holding disk serial number as provided by the manufacturer
+        """
+        return self.serial
+    def get_sata_rate(self):
+        """
+        Retrieves SATA rate for the given disk device
+        Returns:
+            A string holding current SATA rate as provided by the manufacturer
+        """
+        return self.sata_rate
+    def get_remaining_life(self):
+        """
+        Retrieves remaining life for the given disk device
+        Returns:
+            A string holding disk remaining life as provided by the manufacturer
+        """
+        return self.remaining_life
+    def get_vendor_output(self):
+        """
+        Retrieves vendor specific data for the given disk device
+
+        Returns:
+            A string holding some vendor specific disk information
+        """
+        return self.vendor_ssd_info
+
+    def parse_id_number(self, id):
+        return self._parse_re('{}\s*(.+?)\n'.format(id), self.ssd_info)
+
+    def get_readonly_partition(self):
+        """
+        Check the partition mount filesystem is readonly status,then output the result.
+        Returns:
+            The readonly partition list
+        """
+
+        ro_partition_list = []
+        partition_list = []
+
+        # parse fdisk cmd output info
+        disk_info = self._execute_shell(DISK_LIST_CMD)
+        begin_flag = False
+        for line in disk_info.split('\n'):
+            if line == "Device":
+                begin_flag = True
+                continue
+            if begin_flag:
+                if line != "":
+                    partition_list.append(line)
+                else:
+                    break
+
+        # parse df cmd output info
+        disk_free = self._execute_shell(DISK_FREE_CMD)
+        disk_dict = {}
+        line_num = 0
+        for line in disk_free.split('\n'):
+            line_num = line_num + 1
+            if line_num == 1 or line == "":
+                continue
+            column_list = line.split()
+            disk_dict[column_list[0]] = column_list[5]
+
+        # get partition which is readonly
+        for partition in partition_list:
+            if partition in disk_dict:
+                ret = self.check_readonly(partition, disk_dict[partition])
+                if (ret != NOT_AVAILABLE):
+                    ro_partition_list.append(ret)
+
+        return ro_partition_list
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/pmon_daemon_control.json b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/pmon_daemon_control.json
new file mode 100644
index 000000000000..94592fa8cebc
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/pmon_daemon_control.json
@@ -0,0 +1,3 @@
+{
+    "skip_ledd": true
+}
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/system_health_monitoring_config.json b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/system_health_monitoring_config.json
new file mode 100755
index 000000000000..e69de29bb2d1
diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk
index 82c96104a015..31e7934e04de 100755
--- a/platform/broadcom/one-image.mk
+++ b/platform/broadcom/one-image.mk
@@ -84,7 +84,8 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \
                                $(NOKIA_IXR7250_PLATFORM_MODULE) \
                                $(TENCENT_TCS8400_PLATFORM_MODULE) \
                                $(TENCENT_TCS9400_PLATFORM_MODULE) \
-                               $(UFISPACE_S9300_32D_PLATFORM_MODULE)
+                               $(UFISPACE_S9300_32D_PLATFORM_MODULE) \
+			       $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)
 
 $(SONIC_ONE_IMAGE)_LAZY_BUILD_INSTALLS = $(BRCM_OPENNSL_KERNEL) $(BRCM_DNX_OPENNSL_KERNEL)
 ifeq ($(INSTALL_DEBUG_TOOLS),y)
diff --git a/platform/broadcom/platform-modules-micas.dep b/platform/broadcom/platform-modules-micas.dep
new file mode 100644
index 000000000000..6ae59a668b27
--- /dev/null
+++ b/platform/broadcom/platform-modules-micas.dep
@@ -0,0 +1,9 @@
+MPATH       := $($(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)_SRC_PATH)
+DEP_FILES   := $(SONIC_COMMON_FILES_LIST) platform/broadcom/platform-modules-micas.mk platform/broadcom/platform-modules-micas.dep   
+DEP_FILES   += $(SONIC_COMMON_BASE_FILES_LIST)
+DEP_FILES   += $(addprefix $(MPATH)/,$(shell cd $(MPATH) && git ls-files))
+
+
+$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)_CACHE_MODE  := GIT_CONTENT_SHA 
+$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)_DEP_FLAGS   := $(SONIC_COMMON_FLAGS_LIST)
+$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)_DEP_FILES   := $(DEP_FILES)
diff --git a/platform/broadcom/platform-modules-micas.mk b/platform/broadcom/platform-modules-micas.mk
new file mode 100644
index 000000000000..eaed816cd469
--- /dev/null
+++ b/platform/broadcom/platform-modules-micas.mk
@@ -0,0 +1,50 @@
+## M2-W6510-48V8C
+MICAS_M2_W6510_48V8C_PLATFORM_MODULE_VERSION = 1.0
+export MICAS_M2_W6510_48V8C_PLATFORM_MODULE_VERSION
+
+MICAS_M2_W6510_48V8C_PLATFORM_MODULE = platform-modules-micas-m2-w6510-48v8c_$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE_VERSION)_amd64.deb
+$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-micas
+$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADERS_COMMON) $(PDDF_PLATFORM_MODULE)
+$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6510-48v8c-r0
+SONIC_DPKG_DEBS += $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)
+SONIC_STRETCH_DEBS += $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)
+
+## M2-W6910-64C
+MICAS_M2_W6910_64C_PLATFORM_MODULE_VERSION = 1.0
+export MICAS_M2_W6910_64C_PLATFORM_MODULE_VERSION
+
+MICAS_M2_W6910_64C_PLATFORM_MODULE = platform-modules-micas-m2-w6910-64c_$(MICAS_M2_W6910_64C_PLATFORM_MODULE_VERSION)_amd64.deb
+$(MICAS_M2_W6910_64C_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6910-64c-r0
+$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6910_64C_PLATFORM_MODULE)))
+
+## M2-W6510-32C
+MICAS_M2_W6510_32C_PLATFORM_MODULE_VERSION = 1.0
+export MICAS_M2_W6510_32C_PLATFORM_MODULE_VERSION
+
+MICAS_M2_W6510_32C_PLATFORM_MODULE = platform-modules-micas-m2-w6510-32c_$(MICAS_M2_W6510_32C_PLATFORM_MODULE_VERSION)_amd64.deb
+$(MICAS_M2_W6510_32C_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6510-32c-r0
+$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6510_32C_PLATFORM_MODULE)))
+
+## M2-W6920-4s
+MICAS_M2_W6920_4S_PLATFORM_MODULE_VERSION = 1.0
+export MICAS_M2_W6920_4S_PLATFORM_MODULE_VERSION
+
+MICAS_M2_W6920_4S_PLATFORM_MODULE = platform-modules-micas-m2-w6920-4s_$(MICAS_M2_W6920_4S_PLATFORM_MODULE_VERSION)_amd64.deb
+$(MICAS_M2_W6920_4S_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6920-4s-r0
+$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6920_4S_PLATFORM_MODULE)))
+
+## M2-W6520-24DC8QC
+MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE_VERSION = 1.0
+export MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE_VERSION
+
+MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE = platform-modules-micas-m2-w6520-24dc8qc_$(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE_VERSION)_amd64.deb
+$(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6520-24dc8qc-r0
+$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)))
+
+## M2-W6930-64QC
+MICAS_M2_W6930_64QC_PLATFORM_MODULE_VERSION = 1.0
+export MICAS_M2_W6930_64QC_PLATFORM_MODULE_VERSION
+
+MICAS_M2_W6930_64QC_PLATFORM_MODULE = platform-modules-micas-m2-w6930-64qc_$(MICAS_M2_W6930_64QC_PLATFORM_MODULE_VERSION)_amd64.deb
+$(MICAS_M2_W6930_64QC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6930-64qc-r0
+$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6930_64QC_PLATFORM_MODULE)))
diff --git a/platform/broadcom/rules.dep b/platform/broadcom/rules.dep
index 075636a8dedd..6ca99e51eb23 100644
--- a/platform/broadcom/rules.dep
+++ b/platform/broadcom/rules.dep
@@ -16,6 +16,7 @@ include $(PLATFORM_PATH)/platform-modules-juniper.dep
 include $(PLATFORM_PATH)/platform-modules-ragile.dep
 include $(PLATFORM_PATH)/platform-modules-ruijie.dep
 include $(PLATFORM_PATH)/platform-modules-brcm-xlr-gts.dep
+include $(PLATFORM_PATH)/platform-modules-micas.dep
 include $(PLATFORM_PATH)/docker-syncd-brcm.dep
 include $(PLATFORM_PATH)/docker-syncd-brcm-rpc.dep
 include $(PLATFORM_PATH)/docker-saiserver-brcm.dep
diff --git a/platform/broadcom/rules.mk b/platform/broadcom/rules.mk
index edc4eb57945d..7919ce9c0bb4 100755
--- a/platform/broadcom/rules.mk
+++ b/platform/broadcom/rules.mk
@@ -17,6 +17,7 @@ include $(PLATFORM_PATH)/platform-modules-juniper.mk
 include $(PLATFORM_PATH)/platform-modules-ragile.mk
 #include $(PLATFORM_PATH)/platform-modules-tencent.mk
 include $(PLATFORM_PATH)/platform-modules-ufispace.mk
+include $(PLATFORM_PATH)/platform-modules-micas.mk
 include $(PLATFORM_PATH)/docker-syncd-brcm.mk
 include $(PLATFORM_PATH)/docker-syncd-brcm-rpc.mk
 include $(PLATFORM_PATH)/docker-saiserver-brcm.mk
diff --git a/platform/broadcom/sonic-platform-modules-micas/LICENSE b/platform/broadcom/sonic-platform-modules-micas/LICENSE
new file mode 100644
index 000000000000..5681cac34476
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/LICENSE
@@ -0,0 +1,14 @@
+Copyright (C) 2016  Microsoft, Inc
+This program is free software; you can redistribute it and/or
+modify it under the terms of the GNU General Public License
+as published by the Free Software Foundation; either version 2
+of the License, or (at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/Makefile
new file mode 100755
index 000000000000..578d65b3bf3e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/Makefile
@@ -0,0 +1,42 @@
+PWD		= $(shell pwd)
+CC ?=gcc
+INSTALL_MOD_DIR ?=extra
+KVERSION   ?= $(shell uname -r)
+KERNEL_SRC ?=  /lib/modules/$(KVERSION)
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+SUB_BUILD_DIR = $(PWD)/build
+DIR_KERNEL_SRC = $(PWD)/modules
+SCRIPT_DIR = $(PWD)/script
+SERVICE_DIR = $(PWD)/service
+BLACK_DRIVER_CONF_DIR = $(PWD)/modprobe_conf
+
+app_dir = $(PWD)/app
+app_build_dir = $(app_dir)/build
+modules_build_dir = $(DIR_KERNEL_SRC)/build
+
+INSTALL_MODULE_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)
+INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
+INSTALL_SERVICE_DIR = $(SUB_BUILD_DIR)/lib/systemd/system
+INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages
+INSTALL_BLACK_DRIVER = $(SUB_BUILD_DIR)/etc/modprobe.d
+
+all:
+	$(MAKE) -C $(app_dir)
+	$(MAKE) -C $(DIR_KERNEL_SRC)
+	@if [ ! -d ${INSTALL_MODULE_DIR} ]; then mkdir -p ${INSTALL_MODULE_DIR} ;fi
+	@if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi
+	@if [ ! -d ${INSTALL_SERVICE_DIR} ]; then mkdir -p ${INSTALL_SERVICE_DIR} ;fi
+	@if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi
+	@if [ -d $(PWD)/lib/ ]; then cp -r $(PWD)/lib/* ${INSTALL_LIB_DIR} ;fi
+	@if [ -d $(PWD)/sonic_platform/ ]; then cp -rf $(PWD)/sonic_platform ${INSTALL_LIB_DIR} ;fi
+	cp -r $(app_build_dir)/module/*.ko $(INSTALL_MODULE_DIR)
+	cp -r $(modules_build_dir)/*.ko $(INSTALL_MODULE_DIR)
+	cp -r $(app_dir)/build/app/*  $(INSTALL_SCRIPT_DIR)
+	cp -r $(SCRIPT_DIR)/*  $(INSTALL_SCRIPT_DIR)
+	cp -r $(SERVICE_DIR)/*  $(INSTALL_SERVICE_DIR)
+	@if [ -d $(INSTALL_SCRIPT_DIR) ]; then chmod +x $(INSTALL_SCRIPT_DIR)/* ;fi
+	@if [ ! -d ${INSTALL_BLACK_DRIVER} ]; then mkdir -p ${INSTALL_BLACK_DRIVER} ;fi
+	cp -r  $(BLACK_DRIVER_CONF_DIR)/*  $(INSTALL_BLACK_DRIVER)
+clean:
+	rm -rf $(SUB_BUILD_DIR)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/Makefile
new file mode 100644
index 000000000000..25ba3c5a9156
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/Makefile
@@ -0,0 +1,25 @@
+pes_parent_dir:=$(shell pwd)/$(lastword $(MAKEFILE_LIST))
+pes_parent_dir:=$(shell dirname $(pes_parent_dir))
+
+SUBDIRS=$(shell ls -l | grep ^d | awk '{if($$9 != "build") print $$9}')
+INC = -I./inc
+
+COMMON_OUT_PUT := $(shell pwd)/build
+common_out_put_dir := $(COMMON_OUT_PUT)/app
+common_module_dir := $(COMMON_OUT_PUT)/module/
+export common_out_put_dir common_module_dir
+
+all : CHECK $(SUBDIRS)
+CHECK :
+	@echo $(pes_parent_dir)
+
+$(SUBDIRS):ECHO
+	#@echo $@
+	make -C $@
+
+ECHO:
+	@echo $(SUBDIRS)
+
+.PHONY : clean
+clean :
+	-rm  -rf $(COMMON_OUT_PUT)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/Makefile
new file mode 100644
index 000000000000..e4078716eb33
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/Makefile
@@ -0,0 +1,30 @@
+top_srcdir:=$(shell pwd)
+#include $(top_srcdir)/Rules.mk
+DIR=$(shell pwd)
+BUILD_OUTPUT=$(DIR)/tmp
+SRCS=$(wildcard *.c)
+OBJS=$(patsubst %.c, $(BUILD_OUTPUT)/%.o, $(SRCS))
+DEPS=$(patsubst %.o, %.d, $(OBJS))
+CFLAGS+=-Wall -W -g -I$(DIR)/include
+LDFLAGS=
+PROGRAM=dfd_debug
+
+.PHONY: all
+
+all:$(OBJS)
+	$(CC)  $(OBJS) $(LDFLAGS) -o $(BUILD_OUTPUT)/$(PROGRAM)
+	@if [ ! -d ${common_out_put_dir} ]; then mkdir -p ${common_out_put_dir} ;fi
+	cp -p $(BUILD_OUTPUT)/$(PROGRAM) $(common_out_put_dir)
+
+$(OBJS):$(SRCS)
+	@if [ ! -d ${BUILD_OUTPUT} ]; then mkdir -p ${BUILD_OUTPUT} ;fi
+	$(CC)  -c $(CFLAGS) $(INCLUDE) $(*F).c -o $@
+
+.PHONY: install
+install:
+	@mkdir -p $(common_out_put_dir)
+	cp -p $(BUILD_OUTPUT)/$(PROGRAM) $(common_out_put_dir)
+
+rebuild: clean all
+clean:
+	@rm -rf $(BUILD_OUTPUT)/*
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_debug.c b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_debug.c
new file mode 100644
index 000000000000..93ed6066efed
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_debug.c
@@ -0,0 +1,43 @@
+#include <stdlib.h>
+#include <stdio.h>
+#include <stdbool.h>
+#include <string.h>
+#include <unistd.h>
+#include <pthread.h>
+#include <errno.h>
+#include <fcntl.h>
+#include "dfd_utest.h"
+
+int g_dfd_debug_sw = 0;
+int g_dfd_debugpp_sw = 0;
+
+void dfd_debug_set_init(void)
+{
+    FILE *fp;
+    char buf[10];
+
+    mem_clear(buf, sizeof(buf));
+    fp = fopen(DFD_DEBUGP_DEBUG_FILE, "r");
+    if (fp != NULL) {
+
+        g_dfd_debug_sw = 1;
+        fclose(fp);
+    }
+
+    fp = fopen(DFD_DEBUGPP_DEBUG_FILE, "r");
+    if (fp != NULL) {
+
+        g_dfd_debugpp_sw = 1;
+        fclose(fp);
+    }
+
+    return;
+}
+
+int main(int argc, char* argv[])
+{
+    dfd_debug_set_init();
+    dfd_utest_cmd_main(argc, argv);
+
+    return 0;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.c b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.c
new file mode 100644
index 000000000000..9c711830958e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.c
@@ -0,0 +1,1802 @@
+
+#include <errno.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <stdbool.h>
+#include <string.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <pthread.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <sys/ioctl.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <sys/prctl.h>
+#include <stdint.h>
+#include <semaphore.h>
+#include <linux/version.h>
+#include <sys/mman.h>
+#include <time.h>
+#include "dfd_utest.h"
+
+#define DFD_UTEST_MAX_RDWR_NUM            (256)
+#define DFD_UTEST_DEFAULT_WR_NUM          (1)
+
+#define DEV_MEM_NAME                    "/dev/mem"
+#define DEV_KMEM_NAME                   "/dev/kmem"
+
+#define WIDTH_1Byte                       (1)
+#define WIDTH_2Byte                       (2)
+#define WIDTH_4Byte                       (4)
+#define DFD_UTEST_MAX_BIT_WIDTH           (4)
+
+#ifdef DFD_UTEST_ITEM
+#undef DFD_UTEST_ITEM
+#endif
+#define DFD_UTEST_ITEM(_id, _type_str, _help_info, _help_info_detail)    {_id, #_type_str, dfd_utest_##_type_str, _help_info, _help_info_detail},
+static dfd_utest_t g_dfd_unit_test[] = {
+    DFD_UTEST_ITEM_ALL
+};
+
+static int g_sys_page_size;
+#define SYS_PAGE_SIZE                   g_sys_page_size
+#define SYS_PAGE_MASK                   (~(SYS_PAGE_SIZE - 1))
+
+void dfd_utest_print_cmd(int argc, char* argv[])
+{
+    int i;
+
+    for (i = 1; i < argc; i++) {
+        if (i != 1) {
+            printf(" ");
+        }
+        printf("%s", argv[i]);
+    }
+    return;
+}
+
+void dfd_utest_print_all_help(void)
+{
+    int i, tbl_size;
+
+    tbl_size = sizeof(g_dfd_unit_test) / sizeof(g_dfd_unit_test[0]);
+
+    for (i = 0; i < tbl_size; i++) {
+        printf("%-20s\t\t\t%s\r\n", g_dfd_unit_test[i].type_str, g_dfd_unit_test[i].help_info);
+    }
+
+    return;
+}
+
+void dfd_utest_printf_single_help(int utest_type)
+{
+    int i, tbl_size;
+
+    tbl_size = sizeof(g_dfd_unit_test) / sizeof(g_dfd_unit_test[0]);
+    for (i = 0; i < tbl_size; i++) {
+        if (g_dfd_unit_test[i].utest_type == utest_type) {
+            printf("%-20s\t\t\t%s\r\n", g_dfd_unit_test[i].type_str, g_dfd_unit_test[i].help_info_detail);
+            return;
+        }
+    }
+
+    DFD_DEBUG_DBG("type: %d not match.\n", utest_type);
+    return;
+
+}
+
+void dfd_utest_printf_reg(uint8_t *buf, int buf_len, uint32_t offset_addr)
+{
+    int i, j, tmp;
+
+    j = offset_addr % 16;
+    tmp = j;
+    offset_addr -= j;
+    printf("\n            ");
+
+    for (i = 0; i < 16; i++) {
+        printf("%2x ", i);
+    }
+
+    for (i = 0; i < buf_len + j; i++) {
+        if ((i % 16) == 0) {
+            printf("\n0x%08x  ", offset_addr);
+            offset_addr = offset_addr + 16;
+        }
+        if (tmp) {
+            printf("   ");
+            tmp--;
+        } else {
+            printf("%02x ", buf[i-j]);
+        }
+    }
+
+    printf("\n");
+    return;
+}
+
+#define I2C_RETRIES 0x0701
+#define I2C_TIMEOUT 0x0702
+#define I2C_RDWR 0x0707
+
+#define I2C_SLAVE	0x0703	/* Use this slave address */
+
+#define I2C_SLAVE_FORCE	0x0706	/* Use this slave address, even if it
+				   is already in use by a driver! */
+#define I2C_PEC		0x0708	/* != 0 to use PEC with SMBus */
+#define I2C_SMBUS	0x0720	/* SMBus transfer */
+
+struct i2c_msg
+{
+ unsigned short addr;
+ unsigned short flags;
+#define I2C_M_TEN 0x0010
+#define I2C_M_RD 0x0001
+ unsigned short len;
+ unsigned char *buf;
+};
+
+struct i2c_rdwr_ioctl_data
+{
+ struct i2c_msg *msgs;
+ int nmsgs;
+
+};
+
+#define DFD_I2C_SHORT_ADDR_TYPE 0
+#define DFD_I2C_RETRY_SLEEP_TIME        (10000)   /* 10ms */
+#define DFD_I2C_RETRY_TIME              (50000 / DFD_I2C_RETRY_SLEEP_TIME)
+/* i2c_smbus_xfer read or write markers */
+#define I2C_SMBUS_READ	1
+#define I2C_SMBUS_WRITE	0
+
+/* SMBus transaction types (size parameter in the above functions)
+   Note: these no longer correspond to the (arbitrary) PIIX4 internal codes! */
+#define I2C_SMBUS_QUICK		    0
+#define I2C_SMBUS_BYTE		    1
+#define I2C_SMBUS_BYTE_DATA	    2
+#define I2C_SMBUS_WORD_DATA	    3
+#define I2C_SMBUS_PROC_CALL	    4
+#define I2C_SMBUS_BLOCK_DATA	    5
+#define I2C_SMBUS_I2C_BLOCK_BROKEN  6
+#define I2C_SMBUS_BLOCK_PROC_CALL   7		/* SMBus 2.0 */
+#define I2C_SMBUS_I2C_BLOCK_DATA    8
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,0,36)
+/*  fix tjm */
+
+#ifndef __ASSEMBLY__
+/*
+ * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
+ * header files exported to user space
+ */
+typedef __signed__ char __s8;
+typedef unsigned char __u8;
+
+typedef __signed__ short __s16;
+typedef unsigned short __u16;
+
+typedef __signed__ int __s32;
+typedef unsigned int __u32;
+
+typedef __signed__ long __s64;
+typedef unsigned long __u64;
+
+#endif /* __ASSEMBLY__ */
+
+#else
+/*  do noting add tjm */
+#endif
+
+/*
+ * Data for SMBus Messages
+ */
+#define I2C_SMBUS_BLOCK_MAX	32	/* As specified in SMBus standard */
+union i2c_smbus_data {
+	__u8 byte;
+	__u16 word;
+	__u8 block[I2C_SMBUS_BLOCK_MAX + 2]; /* block[0] is used for length */
+			       /* and one more for user-space compatibility */
+};
+
+/* This is the structure as used in the I2C_SMBUS ioctl call */
+struct i2c_smbus_ioctl_data {
+	__u8 read_write;
+	__u8 command;
+	__u32 size;
+	union i2c_smbus_data  *data;
+};
+int32_t dfd_read_port_i2c_one_time_smbus(char *i2c_name, uint16_t dev_addr, uint16_t offset_addr,
+                                   uint8_t *recv_buf, int32_t size, int addr_type)
+{
+     union i2c_smbus_data data;
+     struct i2c_smbus_ioctl_data ioctl_data;
+     unsigned long addr = dev_addr;
+     int fd;
+     int rc;
+     int rv;
+     int i;
+
+    mem_clear(&ioctl_data, sizeof(struct i2c_smbus_ioctl_data));
+    if (i2c_name == NULL || recv_buf == NULL) {
+            DFD_DEBUG_ERROR("i2c_num = NULL, recv_buf = NULL\r\n");
+            return -1;
+    }
+
+    DFD_DEBUG_DBG("i2c name: %s, dev_addr: 0x%x, offset_addr: 0x%x, size: %d, addr_type: %d.\n", i2c_name, dev_addr,
+        offset_addr, size, addr_type);
+
+    rv = 0;
+    fd = open(i2c_name, O_RDWR | O_SYNC);
+    if (fd < 0) {
+        DFD_DEBUG_ERROR("i2c open fail fd %d\n", fd);
+        rv = fd;
+        goto err;
+    }
+    if (ioctl(fd, I2C_SLAVE_FORCE , addr) < 0) {
+        DFD_DEBUG_ERROR("ioctl 2C_SLAVE_FORCE %d.\n", errno);
+        rv =-1;
+        goto fail;
+    }
+    for (i = 0 ;i < size; i++) {
+         data.byte = 0;
+         ioctl_data.read_write = I2C_SMBUS_READ;
+         ioctl_data.command = (offset_addr + i);
+         ioctl_data.size = I2C_SMBUS_BYTE_DATA;
+         ioctl_data.data= &data;
+
+         rc = ioctl(fd, I2C_SMBUS, &ioctl_data);
+         if (rc < 0) {
+             DFD_DEBUG_ERROR("read, I2C_SMBUS failed: %d.\n", errno);
+             rv = -1;
+             goto fail;
+         }
+         *(recv_buf + i) = data.byte;
+     }
+  fail:
+     close(fd);
+  err:
+     return rv;
+
+}
+
+int32_t dfd_read_port_i2c_one_time(char *i2c_name, uint16_t dev_addr, uint16_t offset_addr,
+                                   uint8_t *recv_buf, int32_t size, int addr_type)
+{
+
+        int32_t fd, rv;
+        struct i2c_rdwr_ioctl_data ioctl_data;
+        struct i2c_msg msgs[2];
+        uint8_t buf[2];
+
+        if (i2c_name == NULL || recv_buf == NULL) {
+            DFD_DEBUG_ERROR("i2c_num = NULL, recv_buf = NULL\r\n");
+            return -1;
+        }
+
+        DFD_DEBUG_DBG("i2c name %s, dev_addr 0x%x, offset_addr 0x%x, size %d, addr_type %d.\n", i2c_name, dev_addr,
+            offset_addr, size, addr_type);
+
+        rv = 0;
+        fd = open(i2c_name, O_RDWR | O_SYNC);
+        if (fd < 0) {
+            DFD_DEBUG_ERROR("i2c open fail fd %d\n", fd);
+            return -1;
+        }
+        mem_clear(&ioctl_data, sizeof(ioctl_data));
+        mem_clear(msgs, sizeof(msgs));
+        mem_clear(buf, sizeof(buf));
+        if (ioctl(fd, I2C_SLAVE, dev_addr) < 0) {
+
+            DFD_DEBUG_ERROR("%s %dioctl fail(ret:%d, errno:%s)!\r\n", __func__ , __LINE__, rv, strerror(errno));
+            rv = -1;
+            goto fail;
+        }
+
+         buf[0] = (uint8_t)(offset_addr);
+         msgs[0].addr= dev_addr;
+         msgs[0].len= 2;
+         msgs[0].buf= buf;
+         msgs[1].addr= dev_addr;
+         msgs[1].flags|= I2C_M_RD;
+         msgs[1].len= 1;
+         msgs[1].buf= recv_buf;
+         ioctl_data.nmsgs= 1;
+         ioctl_data.msgs= msgs;
+
+         rv = ioctl(fd, I2C_RDWR, &ioctl_data);
+        if(rv < 0) {
+            DFD_DEBUG_ERROR("%s %dioctl fail(ret:%d, errno:%s)!\r\n", __func__ , __LINE__, rv, strerror(errno));
+            goto fail;
+        }
+        ioctl_data.msgs= &msgs[1];
+        DFD_DEBUG_DBG("ioctlread, return :%d/n", ioctl(fd, I2C_RDWR, &ioctl_data));
+        DFD_DEBUG_DBG("dfd_read_port_i2c addr: 0x%X, offset: 0x%X, value: 0x%X\n", dev_addr, offset_addr, *recv_buf);
+    fail:
+        close(fd);
+        return rv;
+
+}
+
+int32_t dfd_read_port_i2c(char *i2c_name, uint16_t dev_addr, uint16_t offset_addr,
+                          uint8_t *recv_buf, int32_t size)
+{
+    int i;
+    int rv;
+
+    for (i = 0; i < DFD_I2C_RETRY_TIME; i++) {
+        rv = dfd_read_port_i2c_one_time_smbus(i2c_name, dev_addr, offset_addr, recv_buf, size, DFD_I2C_SHORT_ADDR_TYPE);
+        if (rv < 0) {
+            DFD_DEBUG_ERROR("(read times %d)i2c name %s, dev_addr 0x%X, offset_addr 0x%X, addr_type %d\n", i, i2c_name, dev_addr, offset_addr, DFD_I2C_SHORT_ADDR_TYPE);
+            usleep(DFD_I2C_RETRY_SLEEP_TIME);
+            continue;
+        }
+        break;
+    }
+
+    return rv;
+}
+
+int32_t dfd_write_port_i2c_one_time(char *i2c_name, uint16_t dev_addr, uint16_t offset_addr,
+                                    uint8_t *write_buf, int32_t size,int addr_type)
+{
+    int32_t fd, rv;
+    int index;
+    struct i2c_smbus_ioctl_data ioctl_data;
+    union  i2c_smbus_data data;
+    uint8_t addr_buf[2];
+    uint8_t write_buf_tmp[256];
+
+    if (i2c_name == NULL || write_buf == NULL ) {
+        DFD_DEBUG_ERROR("i2c_num = NULL \r\n");
+        return -1;
+    }
+
+    if (size <= 0) {
+        DFD_DEBUG_ERROR("error:size\n");
+        return -1;
+    }
+    DFD_DEBUG_DBG("i2c name %s, dev_addr 0x%x, offset_addr 0x%x, size %d, addr_type %d\n",i2c_name, dev_addr,
+        offset_addr, size, addr_type);
+    mem_clear(&ioctl_data, sizeof(ioctl_data));
+    mem_clear(addr_buf, sizeof(addr_buf));
+    mem_clear(write_buf_tmp, sizeof(write_buf_tmp));
+
+    rv = 0;
+
+    fd = open(i2c_name, O_RDWR | O_SYNC);
+    if (fd < 0) {
+        DFD_DEBUG_ERROR("i2c open fail fd %d\n", fd);
+        return -1;
+    }
+
+    if (ioctl(fd, I2C_SLAVE_FORCE, dev_addr) < 0) {
+        DFD_DEBUG_ERROR("ioctl, I2C_SLAVE failed: %d.\n", errno);
+        rv = -1;
+        goto fail;
+     }
+
+    for (index = 0; index < size; index++) {
+            data.byte = *(write_buf + index);
+            ioctl_data.read_write = I2C_SMBUS_WRITE;
+            ioctl_data.command = (offset_addr + index);
+            ioctl_data.size = I2C_SMBUS_BYTE_DATA;
+            ioctl_data.data= &data;
+            rv = ioctl(fd, I2C_SMBUS, (unsigned long)&ioctl_data);
+            if(rv < 0) {
+                DFD_DEBUG_ERROR("ioctl fail(ret:%d, errno:%s %d) !\r\n", rv, strerror(errno),errno);
+                break;
+            }
+            DFD_DEBUG_DBG("ret:%d  value:0x%02x\n", rv, data.byte);
+            usleep(5000);
+    }
+
+fail:
+    close(fd);
+    return rv;
+}
+
+int32_t dfd_write_port_i2c(char *i2c_name, uint16_t dev_addr, uint16_t offset_addr,
+                           uint8_t *write_buf, int32_t size)
+{
+    int i;
+    int rv;
+
+    for (i = 0; i < DFD_I2C_RETRY_TIME; i++) {
+        rv = dfd_write_port_i2c_one_time(i2c_name, dev_addr, offset_addr, write_buf,size, DFD_I2C_SHORT_ADDR_TYPE);
+        if (rv < 0) {
+            DFD_DEBUG_ERROR("(write times %d)i2c name %s, dev_addr 0x%X, offset_addr 0x%X, addr_type %d\n",
+                i, i2c_name, dev_addr, offset_addr, DFD_I2C_SHORT_ADDR_TYPE);
+            usleep(DFD_I2C_RETRY_SLEEP_TIME);
+            continue;
+        }
+        break;
+    }
+
+    return rv;
+}
+
+static int dfd_read_io_port(uint16_t offset_addr, uint8_t *recv_buf, int32_t size)
+{
+    int fd;
+    int ret;
+
+    fd = open("/dev/port", O_RDWR);
+    if (fd < 0) {
+        printf("open failed ret %d.\n", fd);
+        return -1;
+    }
+
+    ret = lseek(fd, offset_addr, SEEK_SET);
+    if (ret < 0) {
+        printf("lseek failed ret %d.\n", ret);
+        goto exit;
+    }
+
+    ret = read(fd, recv_buf, size);
+    if (ret != size) {
+        printf("read failed ret %d size %d.\n", ret, size);
+        ret = -1;
+        goto exit;
+    }
+
+exit:
+    close(fd);
+    return ret;
+}
+
+static int dfd_write_io_port(uint16_t offset_addr, uint8_t *write_buf, int32_t size)
+{
+    int fd;
+    int ret;
+
+    fd = open("/dev/port", O_RDWR);
+    if (fd < 0) {
+        printf("open failed ret %d.\n", fd);
+        return -1;
+    }
+
+    ret = lseek(fd, offset_addr, SEEK_SET);
+    if (ret < 0) {
+        printf("lseek failed ret %d.\n", ret);
+        goto exit;
+    }
+
+    ret = write(fd, write_buf, size);
+    if (ret != size) {
+        printf("write failed ret %d size %d.\n", ret, size);
+        ret = -1;
+        goto exit;
+    }
+
+exit:
+    close(fd);
+    return ret;
+}
+
+static int dfd_process_mem(char *dev_name, char is_wr, char width, off_t offset, uint8_t *buf, int32_t size)
+{
+    int mfd, ret = 0;
+    void *base;
+    int i, j;
+    unsigned int val;
+    off_t map_offset;
+    size_t map_size;
+
+    if (size & (width - 1)) {
+        printf("size %d invalid.\n", size);
+        return -1;
+    }
+
+    mfd = open(dev_name, O_RDWR);
+    if (mfd < 0) {
+        printf("Cannot open %s.\n", dev_name);
+        return -1;
+    }
+
+    g_sys_page_size = getpagesize();
+    map_offset = offset & SYS_PAGE_MASK;
+    map_size = size + offset - map_offset;
+    base = mmap(NULL, map_size, PROT_READ | PROT_WRITE, MAP_SHARED, mfd, map_offset);
+    if (base == MAP_FAILED) {
+        printf("mmap offset 0x%lx failed error(%s).\n", map_offset, strerror(errno));
+        close(mfd);
+        return -1;
+    }
+    printf("width %d map_offset 0x%lx, offset 0x%lx, mmap base %p, g_sys_page_size %d\n",
+        width, map_offset, offset, base, g_sys_page_size);
+
+    if (is_wr) {
+        for (i = 0; i < size; i = i + width) {
+            val = 0;
+            for (j = 0; j < width; j++) {
+                val |= buf[i + j] << (8 * j);
+            }
+            switch (width) {
+            case 1:
+                *((volatile unsigned char*)(base + i + offset - map_offset)) = val;
+                break;
+            case 2:
+                *((volatile unsigned short*)(base + i + offset - map_offset)) = val;
+                break;
+            case 4:
+                *((volatile unsigned int*)(base + i + offset - map_offset)) = val;
+                break;
+            default:
+                ret = -1;
+                printf("Not support width %d.\n", width);
+                goto exit;
+            }
+        }
+    } else {
+        for (i = 0; i < size; i = i + width) {
+            switch (width) {
+            case 1:
+                val = *((volatile unsigned char*)(base + i + offset - map_offset));
+                break;
+            case 2:
+                val = *((volatile unsigned short*)(base + i + offset - map_offset));
+                break;
+            case 4:
+                val = *((volatile unsigned int*)(base + i + offset - map_offset));
+                break;
+            default:
+                ret = -1;
+                printf("Not support width %d.\n", width);
+                goto exit;
+            }
+            for (j = 0; j < width; j++) {
+                buf[i + j] = (val >> (8 * j)) & 0xff;
+            }
+        }
+    }
+exit:
+    munmap(base, map_size);
+    close(mfd);
+    return ret;
+}
+
+int32_t dfd_i2c_gen_read_one_time(char *i2c_path, uint32_t dev_addr, uint32_t addr_bitwidth,
+                uint32_t offset_addr, uint8_t *recv_buf, int32_t rd_len)
+{
+    int32_t fd, rv, i;
+    struct i2c_rdwr_ioctl_data ioctl_data;
+    struct i2c_msg msgs[2];
+    uint8_t buf[DFD_UTEST_MAX_BIT_WIDTH];
+
+    fd = open(i2c_path, O_RDWR | O_SYNC);
+    if (fd < 0) {
+        DFD_DEBUG_ERROR("i2c open fail fd:%d\n", fd);
+        return -1;
+    }
+    mem_clear(&ioctl_data, sizeof(ioctl_data));
+    mem_clear(msgs, sizeof(msgs));
+    mem_clear(buf, sizeof(buf));
+
+    i = 0;
+
+    switch (addr_bitwidth) {
+    case WIDTH_4Byte:
+        buf[i++] = (offset_addr >> 24) & 0xFF;
+        buf[i++] = (offset_addr >> 16) & 0xFF;
+        buf[i++] = (offset_addr >> 8) & 0xFF;
+        buf[i++] = offset_addr & 0xFF;
+        break;
+    case WIDTH_2Byte:
+        buf[i++] = (offset_addr >> 8) & 0xFF;
+        buf[i++] = offset_addr & 0xFF;
+        break;
+    case WIDTH_1Byte:
+        buf[i++] = offset_addr & 0xFF;
+        break;
+    default:
+        DFD_DEBUG_ERROR("Only support 1,2,4 Byte Address Width,but set %u addr_bitwidth \n", addr_bitwidth);
+        rv = -1;
+        goto fail;
+    }
+
+    msgs[0].addr = dev_addr;
+    msgs[0].flags = 0;
+    msgs[0].len = addr_bitwidth;
+    msgs[0].buf = buf;
+    msgs[1].addr = dev_addr;
+    msgs[1].flags |= I2C_M_RD;
+    msgs[1].len = rd_len;
+    msgs[1].buf = recv_buf;
+    ioctl_data.nmsgs = 2;
+    ioctl_data.msgs = msgs;
+
+    rv = ioctl(fd, I2C_RDWR, &ioctl_data);
+    if(rv < 0) {
+        DFD_DEBUG_ERROR("%s %d Error: Sending messages failed:(ret:%d, errno:%s)!\n", __func__ , __LINE__, rv, strerror(errno));
+        goto fail;
+    }
+
+fail:
+    close(fd);
+    return rv;
+}
+
+int32_t dfd_i2c_gen_read(char *i2c_path, uint32_t dev_addr, uint32_t addr_bitwidth,
+                uint32_t offset_addr, uint8_t *recv_buf, int32_t rd_len)
+{
+    int i;
+    int rv;
+
+    for (i = 0; i < DFD_I2C_RETRY_TIME; i++) {
+        rv = dfd_i2c_gen_read_one_time(i2c_path, dev_addr, addr_bitwidth, offset_addr, recv_buf, rd_len);
+        if (rv < 0) {
+            DFD_DEBUG_ERROR("(read times:%d) i2c_path:%s, dev_addr:0x%x, addr_bitwidth:%u, offset_addr:0x%x, rd_len:%u\n",
+                i, i2c_path, dev_addr, addr_bitwidth, offset_addr, rd_len);
+            usleep(DFD_I2C_RETRY_SLEEP_TIME);
+            continue;
+        }
+        break;
+    }
+
+    return rv;
+}
+
+int dfd_utest_i2c_gen_rd(int argc, char* argv[])
+{
+    int ret;
+    uint32_t i2c_bus, dev_addr, addr_bitwidth, offset_addr, data_bitwidth, rd_len, i, j;
+    char *stopstring;
+    char i2c_path[32];
+    uint8_t tmp_value[DFD_UTEST_MAX_RDWR_NUM];
+    uint8_t rd_value[DFD_UTEST_MAX_RDWR_NUM];
+
+    if (argc != 8) {
+        DFD_DEBUG_ERROR("params error\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_I2C_GEN_RD);
+        goto exit;
+    }
+
+    i2c_bus =  strtol(argv[2], &stopstring, 10);
+    dev_addr = strtol(argv[3], &stopstring, 16);
+    addr_bitwidth = strtol(argv[4], &stopstring, 10);
+    offset_addr = strtol(argv[5], &stopstring, 16);
+    data_bitwidth = strtol(argv[6], &stopstring, 10);
+    rd_len = strtol(argv[7], &stopstring, 10);
+
+    if (rd_len > DFD_UTEST_MAX_RDWR_NUM) {
+        DFD_DEBUG_ERROR("Input num %d exceed max.\n", rd_len);
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_I2C_GEN_RD);
+        goto exit;
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+    printf(":\n");
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", i2c_bus);
+    mem_clear(tmp_value, sizeof(tmp_value));
+    ret = dfd_i2c_gen_read(i2c_path, dev_addr, addr_bitwidth, offset_addr, tmp_value, rd_len);
+    if (ret < 0) {
+        printf("read failed. ret:%d\n", ret);
+        goto exit;
+    }
+
+    mem_clear(rd_value, sizeof(rd_value));
+    if (data_bitwidth == WIDTH_1Byte) {
+        memcpy(rd_value, tmp_value, rd_len);
+    } else {
+        for (i = 0; i < rd_len; i += data_bitwidth) {
+            for (j = 0; (j < data_bitwidth) && (i + j < rd_len); j++) {
+                rd_value[i + data_bitwidth - j - 1] = tmp_value[i + j];
+            }
+        }
+    }
+
+    dfd_utest_printf_reg(rd_value, rd_len, offset_addr);
+
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int32_t dfd_i2c_gen_write_one_time(char *i2c_path, uint32_t dev_addr, uint32_t addr_bitwidth,
+                uint32_t offset_addr, uint8_t *wr_value, uint32_t wr_len)
+{
+    int32_t fd, rv, i;
+    struct i2c_rdwr_ioctl_data ioctl_data;
+    struct i2c_msg msgs[1];
+    uint8_t buf[DFD_UTEST_MAX_BIT_WIDTH + DFD_UTEST_MAX_RDWR_NUM];
+
+    fd = open(i2c_path, O_RDWR | O_SYNC);
+    if (fd < 0) {
+        DFD_DEBUG_ERROR("i2c open fail fd %d\n", fd);
+        return -1;
+    }
+    mem_clear(&ioctl_data, sizeof(ioctl_data));
+    mem_clear(msgs, sizeof(msgs));
+    mem_clear(buf, sizeof(buf));
+
+    i = 0;
+
+    switch (addr_bitwidth) {
+    case WIDTH_4Byte:
+        buf[i++] = (offset_addr >> 24) & 0xFF;
+        buf[i++] = (offset_addr >> 16) & 0xFF;
+        buf[i++] = (offset_addr >> 8) & 0xFF;
+        buf[i++] = offset_addr & 0xFF;
+        break;
+    case WIDTH_2Byte:
+        buf[i++] = (offset_addr >> 8) & 0xFF;
+        buf[i++] = offset_addr & 0xFF;
+        break;
+    case WIDTH_1Byte:
+        buf[i++] = offset_addr & 0xFF;
+        break;
+    default:
+        DFD_DEBUG_ERROR("Only support 1,2,4 Byte Address Width,but set %u addr_bitwidth \r\n", addr_bitwidth);
+        rv = -1;
+        goto fail;
+    }
+
+    memcpy(buf + addr_bitwidth, wr_value, wr_len);
+
+    msgs[0].addr= dev_addr;
+    msgs[0].flags = 0;
+    msgs[0].len= addr_bitwidth + wr_len;
+    msgs[0].buf= buf;
+
+    ioctl_data.nmsgs= 1;
+    ioctl_data.msgs= msgs;
+
+    rv = ioctl(fd, I2C_RDWR, &ioctl_data);
+    if(rv < 0) {
+        DFD_DEBUG_ERROR("%s %dError: Sending messages failed:(ret:%d, errno:%s)!\n", __func__ , __LINE__, rv, strerror(errno));
+        goto fail;
+    } else if (rv < ioctl_data.nmsgs) {
+        DFD_DEBUG_ERROR("%s %dWarning: only %d/%d messages were sent\n", __func__ , __LINE__, rv, ioctl_data.nmsgs);
+    }
+
+fail:
+    close(fd);
+    return rv;
+}
+
+int32_t dfd_i2c_gen_write(char *i2c_path, uint32_t dev_addr, uint32_t addr_bitwidth,
+                uint32_t offset_addr, uint8_t *wr_value, uint32_t wr_len)
+{
+    int i;
+    int rv;
+
+    for (i = 0; i < DFD_I2C_RETRY_TIME; i++) {
+        rv = dfd_i2c_gen_write_one_time(i2c_path, dev_addr, addr_bitwidth, offset_addr, wr_value, wr_len);
+        if (rv < 0) {
+            DFD_DEBUG_ERROR("(write times:%d)i2c_path:%s, dev_addr:0x%x, addr_bitwidth:%u, offset_addr:0x%x, wr_len:%u\n",
+                i, i2c_path, dev_addr, addr_bitwidth, offset_addr, wr_len);
+            usleep(DFD_I2C_RETRY_SLEEP_TIME);
+            continue;
+        }
+        break;
+    }
+
+    return rv;
+}
+
+int dfd_utest_i2c_gen_wr(int argc, char* argv[])
+{
+    int ret;
+    uint32_t i2c_bus, dev_addr, addr_bitwidth, offset_addr, data_bitwidth, wr_len, tmp_data, para_len, i, j;
+    char *stopstring;
+    char i2c_path[32];
+    uint8_t wr_value[DFD_UTEST_MAX_RDWR_NUM];
+
+    if (argc < 8) {
+        DFD_DEBUG_ERROR("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_I2C_GEN_WR);
+        goto exit;
+    }
+
+    i2c_bus = strtol(argv[2], &stopstring, 10);
+    dev_addr = strtol(argv[3], &stopstring, 16);
+    addr_bitwidth = strtol(argv[4], &stopstring, 10);
+    offset_addr = strtol(argv[5], &stopstring, 16);
+    data_bitwidth = strtol(argv[6], &stopstring, 10);
+
+    para_len = argc - 7;
+    wr_len = para_len * data_bitwidth;
+
+    if (wr_len > DFD_UTEST_MAX_RDWR_NUM) {
+        DFD_DEBUG_ERROR("Input num %d exceed max.\n", wr_len);
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_I2C_GEN_WR);
+        goto exit;
+    }
+
+    if (data_bitwidth == WIDTH_1Byte) {
+        for (i = 0; i < para_len; i++) {
+            wr_value[i] = strtol(argv[7 + i], &stopstring, 16);
+            DFD_DEBUG_DBG(" index :%d value 0x%x\n", i , wr_value[i]);
+        }
+    } else {
+        for (i = 0; i < para_len; i++) {
+            tmp_data = strtol(argv[7 + i], &stopstring, 16);
+            DFD_DEBUG_DBG(" index :%d value 0x%x\n", i , tmp_data);
+            for (j = 0; j < data_bitwidth; j++) {
+                tmp_data = strtol(argv[7 + i], &stopstring, 16);
+                wr_value[j + i * data_bitwidth] = (tmp_data >> (24 - 8 * j)) & 0xFF;
+            }
+        }
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+
+    printf(":\n");
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", i2c_bus);
+
+    ret = dfd_i2c_gen_write(i2c_path, dev_addr, addr_bitwidth, offset_addr, wr_value, wr_len);
+    if (ret < 0) {
+        printf("write failed. ret:%d\n", ret);
+    } else {
+        printf("write success\n");
+    }
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_i2c_rd(int argc, char* argv[])
+{
+    int ret;
+    uint8_t value[DFD_UTEST_MAX_RDWR_NUM];
+    uint16_t dev_addr, offset_addr;
+    char *stopstring;
+    int num, i2c_bus;
+    char i2c_path[32];
+
+    if (argc != 6) {
+        DFD_DEBUG_ERROR("params error\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_I2C_RD);
+        goto exit;
+    }
+
+    i2c_bus =  strtol(argv[2], &stopstring, 10);
+    dev_addr = strtol(argv[3], &stopstring, 16);
+    offset_addr = strtol(argv[4], &stopstring, 16);
+    num = strtol(argv[5], &stopstring, 10);
+
+    if (num > DFD_UTEST_MAX_RDWR_NUM) {
+        DFD_DEBUG_ERROR("Input num %d exceed max.\n", num);
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_I2C_RD);
+        goto exit;
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+    printf(":\n");
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", i2c_bus);
+    mem_clear(value, sizeof(value));
+    ret = dfd_read_port_i2c(i2c_path, dev_addr, offset_addr, value, num);
+    if (ret < 0) {
+        printf("failed ret %d\n", ret);
+        goto exit;
+    }
+
+    dfd_utest_printf_reg(value, num, offset_addr);
+
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+
+}
+
+int dfd_utest_i2c_wr(int argc, char* argv[])
+{
+    int ret;
+    uint16_t dev_addr, offset_addr;
+    char *stopstring;
+    int i2c_bus;
+    char i2c_path[32];
+    uint8_t wr_len,i;
+    uint8_t wr_value[DFD_UTEST_MAX_RDWR_NUM];
+
+    if (argc < 6) {
+        DFD_DEBUG_ERROR("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_I2C_WR);
+        goto exit;
+    }
+
+    wr_len = argc - 5;
+    i2c_bus = strtol(argv[2], &stopstring, 10);
+    dev_addr = strtol(argv[3], &stopstring, 16);
+    offset_addr = strtol(argv[4], &stopstring, 16);
+
+    for (i = 0; i < wr_len; i++) {
+        wr_value[i] = strtol(argv[5+i], &stopstring, 16);
+        DFD_DEBUG_DBG(" index :%d value %x\n", i , wr_value[i]);
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+
+    printf(":\n");
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", i2c_bus);
+
+    ret = dfd_write_port_i2c(i2c_path, dev_addr, offset_addr, wr_value, wr_len);
+    if (ret < 0) {
+        printf("failed ret %d\n", ret);
+    } else {
+        printf("success\n");
+    }
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_io_rd(int argc, char* argv[])
+{
+    int ret;
+    uint8_t value[DFD_UTEST_MAX_RDWR_NUM];
+    uint16_t offset_addr;
+    char *stopstring;
+    int num;
+
+    if (argc != 4) {
+        DFD_DEBUG_ERROR("params error\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_IO_RD);
+        goto exit;
+    }
+
+    offset_addr = strtol(argv[2], &stopstring, 16);
+    num = strtol(argv[3], &stopstring, 10);
+
+    if (num > DFD_UTEST_MAX_RDWR_NUM) {
+        DFD_DEBUG_ERROR("Input num %d exceed max.\n", num);
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_IO_RD);
+        goto exit;
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+    printf(":\n");
+    mem_clear(value, sizeof(value));
+    ret = dfd_read_io_port(offset_addr, value, num);
+    if (ret < 0) {
+        printf("failed ret %d\n", ret);
+        goto exit;
+    }
+
+    dfd_utest_printf_reg(value, num, offset_addr);
+
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_io_wr(int argc, char* argv[])
+{
+    int ret;
+    uint16_t offset_addr;
+    char *stopstring;
+    int32_t wr_len,i;
+    uint8_t wr_value[DFD_UTEST_MAX_RDWR_NUM];
+
+    if (argc < 4) {
+        DFD_DEBUG_ERROR("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_IO_WR);
+        goto exit;
+    }
+
+    wr_len = argc - 3;
+    if (wr_len > DFD_UTEST_MAX_RDWR_NUM) {
+        DFD_DEBUG_ERROR("Input num %d exceed max.\n", wr_len);
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_IO_WR);
+        goto exit;
+    }
+
+    offset_addr = strtol(argv[2], &stopstring, 16);
+
+    for (i = 0; i < wr_len; i++) {
+        wr_value[i] = strtol(argv[3 + i], &stopstring, 16);
+        DFD_DEBUG_DBG(" index :%d value %x\n", i , wr_value[i]);
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+
+    printf(":\n");
+    ret = dfd_write_io_port(offset_addr, wr_value, wr_len);
+    if (ret < 0) {
+        printf("failed ret %d\n", ret);
+    } else {
+        printf("success\n");
+    }
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_phymem_rd(int argc, char* argv[])
+{
+    int ret, width;
+    uint8_t value[DFD_UTEST_MAX_RDWR_NUM];
+    off_t offset_addr;
+    char *stopstring;
+    int num;
+
+    if (argc != 5) {
+        DFD_DEBUG_ERROR("params error\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_PHYMEM_RD);
+        goto exit;
+    }
+
+    width = strtol(argv[2], &stopstring, 10);
+    offset_addr = strtol(argv[3], &stopstring, 16);
+    num = strtol(argv[4], &stopstring, 10);
+
+    if (num > DFD_UTEST_MAX_RDWR_NUM) {
+        DFD_DEBUG_ERROR("Input num %d exceed max.\n", num);
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_PHYMEM_RD);
+        goto exit;
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+    printf(":\n");
+    mem_clear(value, sizeof(value));
+    ret = dfd_process_mem(DEV_MEM_NAME, 0, width, offset_addr, value, num);
+    if (ret < 0) {
+        printf("failed ret %d\n", ret);
+        goto exit;
+    }
+
+    dfd_utest_printf_reg(value, num, offset_addr);
+
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_phymem_wr(int argc, char* argv[])
+{
+    int ret, width;
+    off_t offset_addr;
+    char *stopstring;
+    int32_t wr_len,i;
+    uint8_t wr_value[DFD_UTEST_MAX_RDWR_NUM];
+
+    if (argc < 5) {
+        DFD_DEBUG_ERROR("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_PHYMEM_WR);
+        goto exit;
+    }
+
+    wr_len = argc - 4;
+    if (wr_len > DFD_UTEST_MAX_RDWR_NUM) {
+        DFD_DEBUG_ERROR("Input num %d exceed max.\n", wr_len);
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_PHYMEM_WR);
+        goto exit;
+    }
+
+    width = strtol(argv[2], &stopstring, 10);
+    offset_addr = strtol(argv[3], &stopstring, 16);
+
+    for (i = 0; i < wr_len; i++) {
+        wr_value[i] = strtol(argv[4 + i], &stopstring, 16);
+        DFD_DEBUG_DBG(" index :%d value %x\n", i , wr_value[i]);
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+
+    printf(":\n");
+    ret = dfd_process_mem(DEV_MEM_NAME, 1, width, offset_addr, wr_value, wr_len);
+    if (ret < 0) {
+        printf("failed ret %d\n", ret);
+    } else {
+        printf("success\n");
+    }
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_kmem_rd(int argc, char* argv[])
+{
+    int ret, width;
+    uint8_t value[DFD_UTEST_MAX_RDWR_NUM];
+    uint16_t offset_addr;
+    char *stopstring;
+    int num;
+
+    if (argc != 5) {
+        DFD_DEBUG_ERROR("params error\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_KMEM_RD);
+        goto exit;
+    }
+
+    width = strtol(argv[2], &stopstring, 10);
+    offset_addr = strtol(argv[3], &stopstring, 16);
+    num = strtol(argv[4], &stopstring, 10);
+
+    if (num > DFD_UTEST_MAX_RDWR_NUM) {
+        DFD_DEBUG_ERROR("Input num %d exceed max.\n", num);
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_KMEM_RD);
+        goto exit;
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+    printf(":\n");
+    mem_clear(value, sizeof(value));
+    ret = dfd_process_mem(DEV_KMEM_NAME, 0, width, offset_addr, value, num);
+    if (ret < 0) {
+        printf("failed ret %d\n", ret);
+        goto exit;
+    }
+
+    dfd_utest_printf_reg(value, num, offset_addr);
+
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_kmem_wr(int argc, char* argv[])
+{
+    int ret;
+    uint16_t offset_addr, width;
+    char *stopstring;
+    int32_t wr_len,i;
+    uint8_t wr_value[DFD_UTEST_MAX_RDWR_NUM];
+
+    if (argc < 5) {
+        DFD_DEBUG_ERROR("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_KMEM_WR);
+        goto exit;
+    }
+
+    wr_len = argc - 4;
+    if (wr_len > DFD_UTEST_MAX_RDWR_NUM) {
+        DFD_DEBUG_ERROR("Input num %d exceed max.\n", wr_len);
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_KMEM_WR);
+        goto exit;
+    }
+
+    width = strtol(argv[2], &stopstring, 10);
+    offset_addr = strtol(argv[3], &stopstring, 16);
+
+    for (i = 0; i < wr_len; i++) {
+        wr_value[i] = strtol(argv[4 + i], &stopstring, 16);
+        DFD_DEBUG_DBG(" index :%d value %x\n", i , wr_value[i]);
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+
+    printf(":\n");
+    ret = dfd_process_mem(DEV_KMEM_NAME, 1, width, offset_addr, wr_value, wr_len);
+    if (ret < 0) {
+        printf("failed ret %d\n", ret);
+    } else {
+        printf("success\n");
+    }
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+static unsigned long dfd_utest_get_file_size(const char *path)
+{
+    unsigned long filesize;
+    struct stat statbuff;
+
+    if (stat(path, &statbuff) < 0) {
+        filesize = -1;
+    } else {
+        filesize = statbuff.st_size;
+    }
+
+    return filesize;
+}
+
+int dfd_utest_i2c_file_wr(int argc, char* argv[])
+{
+    int ret;
+    uint16_t dev_addr, offset_addr;
+    char *stopstring;
+    int i2c_bus;
+    char i2c_path[32];
+    char *file_name;
+    unsigned long filesize;
+    int fd;
+    uint8_t wr_buf[DFD_UTEST_MAX_RDWR_NUM];
+    int len;
+    int bpt;    /* byte per times*/
+    int page_left;
+
+    if (argc != 7) {
+        printf("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_I2C_FILE_WR);
+        goto exit;
+    }
+
+    i2c_bus = strtol(argv[2], &stopstring, 10);
+    dev_addr = strtol(argv[3], &stopstring, 16);
+    offset_addr = strtol(argv[4], &stopstring, 16);
+    bpt = strtol(argv[5], &stopstring, 10);
+    file_name = argv[6];
+
+    if ((bpt <= 0) || (bpt > DFD_UTEST_MAX_RDWR_NUM)) {
+        bpt = DFD_UTEST_MAX_RDWR_NUM;
+    }
+
+    if ((bpt & (bpt - 1)) != 0) {
+        printf("Bytes per times %d isn't power of two.\n",bpt);
+        goto exit;
+    }
+
+    filesize = dfd_utest_get_file_size(file_name);
+    if (filesize <= 0) {
+        printf("Input invalid file %s, filesize %lu.\n", file_name, filesize);
+        goto exit;
+    }
+
+    fd = open(file_name, O_RDONLY);
+    if (fd < 0) {
+        printf("open file[%s] fail.\n", file_name);
+        goto exit;
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+
+    printf(":\n");
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", i2c_bus);
+
+    while (filesize > 0) {
+        mem_clear(wr_buf, DFD_UTEST_MAX_RDWR_NUM);
+        len = bpt;
+        if (offset_addr & (bpt - 1)) {
+            page_left = bpt - (offset_addr & (bpt - 1));
+            len  = len  > page_left ? page_left : len;
+        }
+
+        len = read(fd, wr_buf, len);
+
+        ret = dfd_write_port_i2c(i2c_path, dev_addr, offset_addr, wr_buf, len);
+        if (ret < 0) {
+            break;
+        }
+        offset_addr += len;
+        filesize -= len;
+    }
+
+    close(fd);
+
+    if (ret < 0) {
+        printf("failed ret %d\n", ret);
+    } else {
+        printf("success\n");
+    }
+
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+
+}
+
+/* compare with sys_flie_wr, One more step is read back verification */
+int dfd_utest_sysfs_file_upg(int argc, char* argv[])
+{
+    int ret = 0;
+    uint32_t offset_addr;
+    char *file_name;
+    char *sysfs_loc;
+    char *stopstring;
+    unsigned long filesize;
+    int fd, file_fd;
+    uint8_t wr_buf[DFD_UTEST_MAX_RDWR_NUM];
+    int len, write_len, per_wr_len;
+    int i;
+    uint8_t reread_buf[DFD_UTEST_MAX_RDWR_NUM];
+    int reback_len, reread_len;
+    int j = 0;
+
+    if (argc != 5 && argc != 6) {
+        printf("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_SYSFS_FILE_UPG);
+        goto exit;
+    }
+
+    sysfs_loc = argv[2];
+    offset_addr = strtol(argv[3], &stopstring, 16);
+    file_name = argv[4];
+
+    if (argc == 6) {
+        per_wr_len = strtol(argv[5], &stopstring, 10);
+        if (per_wr_len > DFD_UTEST_MAX_RDWR_NUM || per_wr_len <= 0) {
+            printf("per_wr_byte %d invalid, not in range (0, 256]\n", per_wr_len);
+            goto exit;
+        }
+    } else {
+        per_wr_len = DFD_UTEST_DEFAULT_WR_NUM;
+    }
+    DFD_DEBUG_DBG("per_wr_byte: %d\n", per_wr_len);
+    filesize = dfd_utest_get_file_size(file_name);
+    if (filesize <= 0) {
+        printf("Input invalid file %s, filesize %lu.\n", file_name, filesize);
+        goto exit;
+    }
+
+    fd = open(sysfs_loc, O_RDWR | O_SYNC);
+    if (fd < 0) {
+        printf("open file[%s] fail.\n", sysfs_loc);
+        goto exit;
+    }
+
+    file_fd = open(file_name, O_RDONLY);
+    if (file_fd < 0) {
+        printf("open file[%s] fail.\n", file_name);
+        goto open_dev_err;
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+
+    ret = lseek(fd, offset_addr, SEEK_SET);
+    if (ret < 0) {
+        printf("lseek file[%s offset=%d] fail,\n", sysfs_loc, offset_addr);
+        goto fail;
+    }
+
+    printf(":\n");
+    while (filesize > 0) {
+        if (filesize > (unsigned long)per_wr_len) {
+            len = per_wr_len;
+        } else {
+            len = filesize;
+        }
+
+        mem_clear(wr_buf, DFD_UTEST_MAX_RDWR_NUM);
+        for (i = 0; i < DFD_I2C_RETRY_TIME; i++) {
+            len = read(file_fd, wr_buf, len);
+            if (len < 0) {
+                DFD_DEBUG_ERROR("read file[%s] fail, offset = 0x%x retrytimes = %d ret = %d\n",
+                    sysfs_loc, offset_addr, i ,len);
+                usleep(DFD_I2C_RETRY_SLEEP_TIME);
+                continue;
+            }
+            break;
+        }
+        if (i == DFD_I2C_RETRY_TIME) {
+            printf("read file[%s] fail, offset = 0x%x, ret = %d\n", sysfs_loc, offset_addr, len);
+            goto fail;
+        }
+
+        for (i = 0; i < DFD_I2C_RETRY_TIME; i++) {
+            write_len = write(fd, wr_buf, len);
+            if (write_len != len) {
+                DFD_DEBUG_ERROR("write file[%s] fail,offset = 0x%x retrytimes = %d len = %d,write_len =%d\n",
+                    sysfs_loc, offset_addr, i ,len, write_len);
+                usleep(DFD_I2C_RETRY_SLEEP_TIME);
+                continue;
+            }
+            break;
+        }
+        if (i == DFD_I2C_RETRY_TIME) {
+            printf("write file[%s] fail, offset = 0x%x, len = %d,write_len =%d\n",
+                sysfs_loc, offset_addr, len, write_len);
+            goto fail;
+        }
+
+        reback_len = write_len;
+        ret = lseek(fd, -reback_len, SEEK_CUR);
+        if (ret < 0) {
+            printf("reread lseek file[%s offset=%d] fail,lseek len=%d\n",
+                sysfs_loc, offset_addr, reback_len);
+            goto fail;
+        }
+
+        mem_clear(reread_buf, DFD_UTEST_MAX_RDWR_NUM);
+        for (i = 0; i < DFD_I2C_RETRY_TIME; i++) {
+            reread_len = read(fd, reread_buf, reback_len);
+            if (reread_len != reback_len) {
+                DFD_DEBUG_ERROR("reread file[%s] fail,offset = 0x%x retrytimes = %d reread_len = %d,reback_len =%d\n",
+                    sysfs_loc, offset_addr, i ,reread_len, reback_len);
+                usleep(DFD_I2C_RETRY_SLEEP_TIME);
+                continue;
+            }
+            break;
+        }
+        if (i == DFD_I2C_RETRY_TIME) {
+            printf("reread file[%s] fail, offset = 0x%x, reread_len = %d,reback_len = %d\n",
+                sysfs_loc, offset_addr, reread_len, reback_len);
+            goto fail;
+        }
+
+        if (memcmp(reread_buf, wr_buf, reread_len) != 0) {
+            if (j < DFD_I2C_RETRY_TIME) {
+                DFD_DEBUG_ERROR("memcmp file[%s] fail,offset = 0x%x retrytimes = %d\n",
+                                    sysfs_loc, offset_addr, j);
+                j++;
+                ret = lseek(file_fd, -len, SEEK_CUR);
+                if (ret < 0) {
+                    printf("retry file_fd lseek fail,lseek len=%d\n", len);
+                    goto fail;
+                }
+                ret = lseek(fd, -write_len, SEEK_CUR);
+                if (ret < 0) {
+                    printf("retry fd lseek fail,lseek len=%d\n", write_len);
+                    goto fail;
+                }
+                continue;
+            }
+
+            printf("upgrade file[%s] fail, offset = 0x%x.\n", sysfs_loc, offset_addr);
+            printf("want to write buf :\n");
+            for (i = 0; i < reread_len; i++) {
+                printf("0x%x ", wr_buf[i]);
+            }
+            printf("\n");
+
+            printf("actually reread buf :\n");
+            for (i = 0; i < reread_len; i++) {
+                printf("0x%x ", reread_buf[i]);
+            }
+            printf("\n");
+
+            goto fail;
+        }
+
+        offset_addr += len;
+        filesize -= len;
+        usleep(5000);
+    }
+
+    printf("success\n");
+    close(file_fd);
+    close(fd);
+    return DFD_RV_OK;
+
+fail:
+    close(file_fd);
+open_dev_err:
+    close(fd);
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_sysfs_file_wr(int argc, char* argv[])
+{
+    int ret = 0;
+    uint32_t offset_addr;
+    char *file_name;
+    char *sysfs_loc;
+    char *stopstring;
+    unsigned long filesize;
+    int fd, file_fd;
+    uint8_t wr_buf[DFD_UTEST_MAX_RDWR_NUM];
+    int len, write_len, per_wr_len;
+    int i;
+
+    if (argc != 5 && argc != 6) {
+        printf("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_SYSFS_FILE_WR);
+        goto exit;
+    }
+
+    sysfs_loc = argv[2];
+    offset_addr = strtol(argv[3], &stopstring, 16);
+    file_name = argv[4];
+
+    if (argc == 6) {
+        per_wr_len = strtol(argv[5], &stopstring, 10);
+        if (per_wr_len > DFD_UTEST_MAX_RDWR_NUM || per_wr_len <= 0) {
+            printf("per_wr_byte %d invalid, not in range (0, 256]\n", per_wr_len);
+            goto exit;
+        }
+    } else {
+        per_wr_len = DFD_UTEST_DEFAULT_WR_NUM;
+    }
+    DFD_DEBUG_DBG("per_wr_byte: %d\n", per_wr_len);
+    filesize = dfd_utest_get_file_size(file_name);
+    if (filesize <= 0) {
+        printf("Input invalid file %s, filesize %lu.\n", file_name, filesize);
+        goto exit;
+    }
+
+    fd = open(sysfs_loc, O_RDWR | O_SYNC);
+    if (fd < 0) {
+        printf("open file[%s] fail.\n", sysfs_loc);
+        goto exit;
+    }
+
+    file_fd = open(file_name, O_RDONLY);
+    if (file_fd < 0) {
+        printf("open file[%s] fail.\n", file_name);
+        goto open_dev_err;
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+
+    ret = lseek(fd, offset_addr, SEEK_SET);
+    if (ret < 0) {
+        printf("lseek file[%s offset=%d] fail,\n", sysfs_loc, offset_addr);
+        goto fail;
+    }
+
+    printf(":\n");
+    while (filesize > 0) {
+        if (filesize > (unsigned long)per_wr_len) {
+            len = per_wr_len;
+        } else {
+            len = filesize;
+        }
+
+        mem_clear(wr_buf, DFD_UTEST_MAX_RDWR_NUM);
+        for (i = 0; i < DFD_I2C_RETRY_TIME; i++) {
+            len = read(file_fd, wr_buf, len);
+            if (len < 0) {
+                DFD_DEBUG_ERROR("read file[%s] fail, offset = 0x%x retrytimes = %d ret = %d\n",
+                    sysfs_loc, offset_addr, i ,len);
+                usleep(DFD_I2C_RETRY_SLEEP_TIME);
+                continue;
+            }
+            break;
+        }
+        if (i == DFD_I2C_RETRY_TIME) {
+            printf("read file[%s] fail, offset = 0x%x, ret = %d\n", sysfs_loc, offset_addr, len);
+            goto fail;
+        }
+        for (i = 0; i < DFD_I2C_RETRY_TIME; i++) {
+            write_len = write(fd, wr_buf, len);
+            if (write_len != len) {
+                DFD_DEBUG_ERROR("write file[%s] fail,offset = 0x%x retrytimes = %d len = %d,write_len =%d\n", sysfs_loc, offset_addr, i ,len, write_len);
+                usleep(DFD_I2C_RETRY_SLEEP_TIME);
+                continue;
+            }
+            break;
+        }
+
+        if(i == DFD_I2C_RETRY_TIME) {
+            printf("write file[%s] fail, offset = 0x%x, len = %d,write_len =%d\n", sysfs_loc, offset_addr, len, write_len);
+            ret = -1;
+            goto fail;
+        }
+        offset_addr += len;
+        filesize -= len;
+        usleep(5000);
+    }
+
+    printf("success\n");
+    close(file_fd);
+    close(fd);
+    return DFD_RV_OK;
+
+fail:
+    close(file_fd);
+open_dev_err:
+    close(fd);
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_sysfs_file_rd(int argc, char* argv[])
+{
+    int ret = 0;
+    uint32_t offset_addr;
+    char *sysfs_loc;
+    char *stopstring;
+    int fd;
+    uint8_t rd_buf[DFD_UTEST_MAX_RDWR_NUM];
+    int len, read_len;;
+
+    if (argc != 5) {
+        printf("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_SYSFS_FILE_RD);
+        goto exit;
+    }
+
+    sysfs_loc = argv[2];
+    offset_addr = strtol(argv[3], &stopstring, 16);
+    len = strtol(argv[4], &stopstring, 10);
+
+    if (len > DFD_UTEST_MAX_RDWR_NUM) {
+        printf("Input num %d exceed max 256.\n", len);
+        goto exit;
+    }
+
+    fd = open(sysfs_loc, O_RDONLY);
+    if (fd < 0) {
+        printf("open file[%s] fail.\n", sysfs_loc);
+        goto exit;
+    }
+    dfd_utest_print_cmd(argc, argv);
+
+    printf(":\n");
+
+    ret = lseek(fd, offset_addr, SEEK_SET);
+    if (ret < 0) {
+        printf("lseek failed ret %d.\n", ret);
+        goto fail;
+    }
+
+    mem_clear(rd_buf, DFD_UTEST_MAX_RDWR_NUM);
+    read_len = read(fd, rd_buf, len);
+    if (read_len != len) {
+        printf("read failed read_len %d len %d.\n", read_len, len);
+        goto fail;
+    }
+    dfd_utest_printf_reg(rd_buf, read_len, offset_addr);
+    close(fd);
+    return DFD_RV_OK;
+
+fail:
+    close(fd);
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_msr_rd(int argc, char* argv[])
+{
+    int fd;
+    char msr_file_name[64];
+    uint64_t data;
+    uint64_t read_result;
+    char *stopstring;
+    uint8_t cpu_index, width;
+    uint64_t offset;
+
+    if (argc != 5) {
+        printf("rdmsr failed: Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_MSR_RD);
+        goto exit;
+    }
+
+    cpu_index = strtol(argv[2], &stopstring, 10);
+    offset = strtol(argv[3], &stopstring, 16);
+    width = strtol(argv[4], &stopstring, 10);
+
+    if (width != 8 && width != 16 && width != 32 && width != 64) {
+        printf("rdmsr failed: width:%u Input invalid.only support 8 16 32 64\n", width);
+        goto exit;
+    }
+
+    mem_clear(msr_file_name, sizeof(msr_file_name));
+    sprintf(msr_file_name, "/dev/cpu/%u/msr", cpu_index);
+
+    fd = open(msr_file_name, O_RDONLY);
+    if (fd < 0) {
+        if (errno == ENXIO) {
+            fprintf(stderr, "rdmsr failed: No CPU %u\n", cpu_index);
+        } else if (errno == EIO) {
+            fprintf(stderr, "rdmsr failed: CPU %u doesn't support MSRs\n", cpu_index);
+        } else if (errno == ENOENT) {
+            fprintf(stderr, "rdmsr failed: can't find %s file, Please check if modprobe msr driver already\n", msr_file_name);
+        } else {
+            printf("rdmsr failed: %s open failed. errno:%d\n", msr_file_name, errno);
+        }
+        goto exit;
+    }
+
+    if (pread(fd, &data, sizeof(data), offset) != sizeof(data)) {
+        fprintf(stderr, "rdmsr failed: CPU:%u offset:0x%lx read failed\n", cpu_index, offset);
+        goto fail;
+    }
+
+    switch (width) {
+        case 8:
+            read_result = (volatile uint8_t)data;
+            break;
+        case 16:
+            read_result = (volatile uint16_t)data;
+            break;
+        case 32:
+            read_result = (volatile uint32_t)data;
+            break;
+        case 64:
+            read_result = (volatile uint64_t)data;
+            break;
+        default:
+            printf("rdmsr failed: width:%u illegal width.\n", width);
+            goto fail;
+    }
+
+    printf("0x%lx\n", read_result);
+    close(fd);
+    return DFD_RV_OK;
+
+fail:
+    close(fd);
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_utest_sysfs_data_wr(int argc, char* argv[])
+{
+    uint32_t offset;
+    char *sysfs_loc;
+    char *stopstring;
+    uint8_t wr_buf[DFD_UTEST_MAX_RDWR_NUM];
+    int ret, i;
+    int fd, len, write_len, index;
+
+    if (argc < 5) {
+        DFD_DEBUG_ERROR("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_SYSFS_DATA_WR);
+        goto exit;
+    }
+
+    dfd_utest_print_cmd(argc, argv);
+    printf(":\n");
+
+    sysfs_loc = argv[2];
+    offset = strtol(argv[3], &stopstring, 16);
+    len = argc - 4;
+    mem_clear(wr_buf, sizeof(wr_buf));
+    for (i = 0; i < len; i++) {
+        wr_buf[i] = strtol(argv[4 + i], &stopstring, 16);
+        DFD_DEBUG_DBG("index :%d value %x\n", i , wr_buf[i]);
+    }
+
+    fd = open(sysfs_loc, O_RDWR | O_SYNC);
+    if (fd < 0) {
+        printf("open file[%s] fail.\n", sysfs_loc);
+        goto exit;
+    }
+
+    ret = lseek(fd, offset, SEEK_SET);
+    if (ret < 0) {
+        printf("lseek file[%s offset=%d] fail,\n", sysfs_loc, offset);
+        goto fail;
+    }
+    index = 0;
+    while (len > 0) {
+        for (i = 0; i < DFD_I2C_RETRY_TIME; i++) {
+            write_len = write(fd, &wr_buf[index], len);
+            if (write_len < 0) {
+                DFD_DEBUG_ERROR("write file[%s] fail, retrytimes: %d, offset: 0x%x, len: %d, write_len: %d\n",
+                    sysfs_loc, offset, i, len, write_len);
+                usleep(DFD_I2C_RETRY_SLEEP_TIME);
+                continue;
+            }
+            if (write_len == 0) {
+                DFD_DEBUG_ERROR("write file[%s] EOF, offset: 0x%x, len: %d, write_len: %d\n",
+                    sysfs_loc, offset, len, write_len);
+                goto fail;
+            }
+            break;
+        }
+        if(i == DFD_I2C_RETRY_TIME) {
+            printf("write file[%s] fail, offset: 0x%x, len: %d, write_len: %d\n",
+                sysfs_loc, offset, len, write_len);
+            goto fail;
+        }
+        offset += write_len;
+        index += write_len;
+        len -= write_len;
+        usleep(5000);
+    }
+    printf("success\n");
+    close(fd);
+    return DFD_RV_OK;
+fail:
+    close(fd);
+exit:
+    return DFD_RV_MODE_NOTSUPPORT;
+}
+
+dfd_utest_proc_fun dfd_utest_get_proc_func(char *type_str)
+{
+    int i, tbl_size;
+
+    tbl_size = sizeof(g_dfd_unit_test) / sizeof(g_dfd_unit_test[0]);
+
+    for (i = 0; i < tbl_size; i++) {
+        if (!strncmp(g_dfd_unit_test[i].type_str, type_str, strlen(g_dfd_unit_test[i].type_str))) {
+            return g_dfd_unit_test[i].utest_func;
+        }
+    }
+    DFD_DEBUG_DBG("type: %s not match.\n", type_str);
+    return NULL;
+}
+
+void dfd_utest_cmd_main(int argc, char* argv[])
+{
+    dfd_utest_proc_fun pfunc;
+    int ret;
+
+    if (argc < 2) {
+        dfd_utest_print_all_help();
+        return;
+    }
+
+    pfunc = dfd_utest_get_proc_func(argv[1]);
+    if (pfunc == NULL) {
+        DFD_DEBUG_DBG("utest type %s in not support.\n", argv[1]);
+        dfd_utest_print_all_help();
+        return;
+    }
+    ret = pfunc(argc, argv);
+    if ((ret != DFD_RV_MODE_NOTSUPPORT) && (ret != DFD_RV_INDEX_INVALID)) {
+        if (ret == DFD_RV_OK) {
+            DFD_DEBUG_DBG(" [SUCCESS]\n");
+        } else {
+            DFD_DEBUG_DBG(" [FAIL(%d)]\n", ret);
+        }
+    }
+
+    return;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.h b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.h
new file mode 100644
index 000000000000..aa194a4dcdd7
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.h
@@ -0,0 +1,103 @@
+/* monitor_utest.h */
+#ifndef __DFD_UTEST_H__
+#define __DFD_UTEST_H__
+
+#include <string.h>
+
+extern int g_dfd_debug_sw;
+extern int g_dfd_debugpp_sw;
+
+#define DFD_UTEST_TRUE_FALSE_STRING(flag)                   ((flag == true) ? "true" : "false")
+
+#define DFD_DEBUG_DBG(fmt, args...) do {                     \
+    if (g_dfd_debug_sw) {               \
+        printf("" fmt,\
+            ##args);  \
+    }                                                   \
+} while (0)
+
+#define DFD_DEBUG_ERROR(fmt, args...) do {                     \
+    if (g_dfd_debugpp_sw) {               \
+        printf("" fmt,\
+            ##args);  \
+    }                                                   \
+} while (0)
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+typedef enum dfd_rv_s {
+    DFD_RV_OK               = 0,
+    DFD_RV_INIT_ERR         = 1,
+    DFD_RV_SLOT_INVALID     = 2,
+    DFD_RV_MODE_INVALID     = 3,
+    DFD_RV_MODE_NOTSUPPORT  = 4,
+    DFD_RV_TYPE_ERR         = 5,
+    DFD_RV_DEV_NOTSUPPORT   = 6,
+    DFD_RV_DEV_FAIL         = 7,
+    DFD_RV_INDEX_INVALID    = 8,
+    DFD_RV_NO_INTF          = 9,
+    DFD_RV_NO_NODE          = 10,
+    DFD_RV_NODE_FAIL        = 11,
+} dfd_rv_t;
+
+#define DFD_DEBUG_BUF_LEN               (32)
+#define DFD_DEBUGP_DEBUG_FILE           "/sbin/.dfd_debugp_flag"
+#define DFD_DEBUGPP_DEBUG_FILE          "/sbin/.dfd_debugpp_flag"
+
+#define DFD_UTEST_MAX_PARA_NUM          (4)
+#define DFD_UTEST_TYPE_STRING_LEN       (64)
+#define DFD_UTEST_MATCH_STRING_LEN      (64)
+#define DFD_UTEST_HELP_STRING_LEN       (256)
+#define DFD_UTEST_INVALID_PARA          (-1)
+#define DFD_UTEST_BUFF_LEN              (64)
+
+typedef enum dfd_fpga_cpld_flag_e {
+    DFD_CPLD_RW_FLAG = 0x00,
+    DFD_FPGA_RW_FLAG = 0x01,
+} dfd_fpga_cpld_flag_t;
+
+typedef int (* dfd_utest_proc_fun)(int argc, char* argv[]);
+
+#define DFD_UTEST_ITEM_ALL \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_I2C_RD, i2c_rd, "i2c_rd [i2c_bus] [slave_addr] [offset] [len]", "i2c_rd [i2c_bus] [slave_addr] [offset] [len]")    \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_I2C_WR, i2c_wr, "i2c_wr [i2c_bus] [slave_addr] [offset] [data0] ... [dataN]", "i2c_wr [i2c_bus] [slave_addr] [offset] [data0] ... [dataN]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_IO_RD, io_rd, "io_rd [offset] [len]", "io_rd [offset] [len]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_IO_WR, io_wr, "io_wr [offset] [data0]... [dataN]", "io_wr [offset] [data0]... [dataN]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_PHYMEM_RD, phymem_rd, "phymem_rd [bit_width] [offset] [len]", "phymem_rd [bit_width] [offset] [len]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_PHYMEM_WR, phymem_wr, "phymem_wr [bit_width] [offset] [data0]... [dataN]", "phymem_wr [bit_width] [offset] [data0]... [dataN]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_KMEM_RD, kmem_rd, "kmem_rd [bit_width] [offset] [len]", "kmem_rd [bit_width] [offset] [len]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_KMEM_WR, kmem_wr, "kmem_wr [bit_width][offset] [data0]... [dataN]", "kmem_wr [bit_width] [offset] [data0]... [dataN]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_I2C_FILE_WR, i2c_file_wr, "i2c_file_wr [i2c_bus] [slave_addr] [offset] [bpt] [filename]", "i2c_file_wr [i2c_bus] [slave_addr] [offset] [bpt] [filename]\nbpt:bytes per times")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_SYSFS_FILE_WR, sysfs_file_wr, "sysfs_file_wr [sysfs_loc] [offset] [filename] [per_wr_byte]", "sysfs_file_wr [sysfs_loc] [offset]  [filename] [per_wr_byte]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_SYSFS_FILE_RD, sysfs_file_rd, "sysfs_file_rd [sysfs_loc] [offset]  [len]", "sysfs_file_rd [sysfs_loc] [offset]  [len]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_SYSFS_FILE_UPG, sysfs_file_upg, "sysfs_file_upg [sysfs_loc] [offset] [filename] [per_wr_byte]", "sysfs_file_upg [sysfs_loc] [offset]  [filename] [per_wr_byte]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_I2C_GEN_RD, i2c_gen_rd, "i2c_gen_rd [i2c_bus] [slave_addr] [addr_bitwidth] [offset] [data_bitwidth] [len]", "i2c_gen_rd [i2c_bus] [slave_addr] [addr_bitwidth] [offset] [data_bitwidth] [len]")    \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_I2C_GEN_WR, i2c_gen_wr, "i2c_gen_wr [i2c_bus] [slave_addr] [addr_bitwidth] [offset] [data_bitwidth] [data0]... [dataN]", "i2c_gen_wr [i2c_bus] [slave_addr] [addr_bitwidth] [offset] [data_bitwidth] [data0]... [dataN]")    \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_MSR_RD, msr_rd, "msr_rd [cpu_index] [offset] [width]", "msr_rd [cpu_index] [offset] [width]")    \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_SYSFS_DATA_WR, sysfs_data_wr, "sysfs_data_wr [sysfs_loc] [offset] [data0] ... [dataN]", "sysfs_data_wr [sysfs_loc] [offset] [data0] ... [dataN]]")   \
+
+#ifdef DFD_UTEST_ITEM
+#undef DFD_UTEST_ITEM
+#endif
+#define DFD_UTEST_ITEM(_id, _type_str, _help_info, _help_info_detail)    _id,
+typedef enum dfd_utest_item_id_s {
+    DFD_UTEST_ITEM_ALL
+} dfd_utest_item_id_t;
+
+typedef struct {
+    int utest_type;
+    char type_str[DFD_UTEST_TYPE_STRING_LEN];
+    dfd_utest_proc_fun utest_func;
+    char help_info[DFD_UTEST_HELP_STRING_LEN];
+    char help_info_detail[DFD_UTEST_HELP_STRING_LEN];
+} dfd_utest_t;
+
+void dfd_utest_cmd_main(int argc, char* argv[]);
+
+#ifdef DFD_UTEST_ITEM
+#undef DFD_UTEST_ITEM
+#endif
+#define DFD_UTEST_ITEM(_id, _type_str, _help_info, _help_info_detail)    int dfd_utest_##_type_str(int argc, char* argv[]);
+DFD_UTEST_ITEM_ALL
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/Makefile
new file mode 100644
index 000000000000..62663efdbbd5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/Makefile
@@ -0,0 +1,19 @@
+top_srcdir:=$(shell pwd)
+include $(top_srcdir)/Rules.mk
+
+firmware-y:=
+firmware-y += firmware_driver
+firmware-y += firmware_upgrade
+
+.PHONY: all
+all: build
+
+.PHONY: build
+build: $(firmware-y)
+$(foreach dir,$(firmware-y),$(eval $(call compile_dirs,$(dir))))
+
+.PHONY: rpmpkg
+rpmpkg:
+ifeq ("$(CONFIG_CPLD_UPGRADE_ISPVME)", "y")
+	#$(RPMPKG) $(install_cpld_dir) firmware-cpld-ispvme.spec git
+endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/Rules.mk b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/Rules.mk
new file mode 100644
index 000000000000..5fb5a09d34fd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/Rules.mk
@@ -0,0 +1,42 @@
+CC ?= $(CROSS)gcc
+AR ?= $(CROSS)ar
+AS ?= $(CROSS)as
+LD ?= $(CROSS)ld
+STRIP ?= $(CROSS)strip
+
+install_root:=${top_srcdir}/images
+
+install_header_dir:=${install_root}/header
+install_adir:=$(install_root)/lib
+install_symbol_dir:=$(install_root)/symbol
+symbol_files:=$(shell find $(EXPORT_SYMBOL) -name 'Module.symvers')
+#
+# symbol_files += $(shell find $(install_symbol_dir) -name 'Module.symvers')
+# KBUILD_EXTRA_SYMBOLS += $(symbol_files)
+# export KBUILD_EXTRA_SYMBOLS
+
+# top root: install_rootfs_dir
+install_rootfs_dir:=$(install_root)/rootfs
+
+install_sodir:=$(install_rootfs_dir)/$(INSTALL_SODIR)
+
+install_usr_bin_dir:=$(install_rootfs_dir)/usr/bin
+install_sbin_dir:=$(install_rootfs_dir)/sbin
+install_etc_dir:=$(install_rootfs_dir)/etc
+
+export INSTALL_MOD_PATH:=$(ROOT)
+
+BUILD_CFLAGS:=$(CFLAGS) -I$(install_header_dir)
+BUILD_LDFLAGS:=$(LDFLAGS) -L/$(install_sodir) -L/$(install_adir)
+
+define compile_dirs
+.PHONY: $(1)
+$(1):
+	@echo;echo "building $(1)..."
+	@$(MAKE) -C ${1}
+endef
+
+compile.c = $(CC) $(BUILD_CFLAGS) -d -c -o $@ $<
+%.o: %.c
+	$(compile.c)
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/Makefile
new file mode 100644
index 000000000000..e8879aeff5e7
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/Makefile
@@ -0,0 +1,19 @@
+include $(top_srcdir)/Rules.mk
+
+firmware-y:=
+firmware-y += firmware_driver_ispvme
+firmware-y += firmware_driver_cpld
+firmware-y += firmware_driver_sysfs
+
+.PHONY: all
+all: build
+
+.PHONY: build
+build: $(firmware-y)
+$(foreach dir,$(firmware-y),$(eval $(call compile_dirs,$(dir))))
+
+.PHONY: rpmpkg
+rpmpkg:
+ifeq ("$(CONFIG_CPLD_UPGRADE_ISPVME)", "y")
+	#$(RPMPKG) $(install_cpld_dir) firmware-cpld-ispvme.spec git
+endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/Makefile
new file mode 100644
index 000000000000..0add28cb9056
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/Makefile
@@ -0,0 +1,23 @@
+#include $(top_srcdir)/debian/rules
+#KERNELDIR := ${KBUILD_OUTPUT}
+
+PWD		= $(shell pwd)
+
+EXTRA_CFLAGS:= -I$(M)/include
+MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
+FIRMWARE_UPGRADE_PATH = $(abspath $(MAKEFILE_FILE_PATH)/../../include)
+EXTRA_CFLAGS+= -I$(FIRMWARE_UPGRADE_PATH)
+EXTRA_CFLAGS+= -Wall
+
+firmware_driver_cpld-objs := firmware.o
+firmware_driver_cpld-objs += firmware_cpld.o firmware_cpld_upgrade.o
+firmware_driver_cpld-objs += jbicomp.o jbijtag.o jbimain.o jbistub.o
+
+#ifndef CONFIG_FRM_PRODUCT_FILE
+
+$(warning $(firmware_driver_cpld-objs))
+obj-m := firmware_driver_cpld.o
+all:
+	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
+	@if [ ! -d $(common_module_dir) ]; then mkdir -p $(common_module_dir) ;fi
+	cp -p  $(PWD)/*.ko $(common_module_dir)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/firmware.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/firmware.c
new file mode 100644
index 000000000000..db72b369465a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/firmware.c
@@ -0,0 +1,144 @@
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <firmware.h>
+
+int g_firmware_driver_debug = 0;
+module_param(g_firmware_driver_debug, int, S_IRUGO | S_IWUSR);
+
+static LIST_HEAD(drv_list);
+static LIST_HEAD(dev_list);
+
+/**
+ * firmware_driver_register
+ * function:Registered Device Driver
+ * @fw_drv:param[in] Driver information
+ * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+int firmware_driver_register(firmware_driver_t *fw_drv)
+{
+    int ret;
+
+    if (fw_drv == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Parameter error.\n");
+        return FIRMWARE_FAILED;
+    }
+
+    ret = platform_driver_register(fw_drv->drv);
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: failed to register firmware upgrade driver \n");
+        return FIRMWARE_FAILED;
+    }
+
+    /* Adds driver information to the driver list */
+    list_add(&fw_drv->list, &drv_list);
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware upgrade driver register sucess \n");
+
+    return FIRMWARE_SUCCESS;
+}
+
+/**
+ * firmware_driver_unregister
+ * function:unregister Device Driver
+ * @fw_drv:param[in] Driver information
+ */
+void firmware_driver_unregister(firmware_driver_t *fw_drv)
+{
+    list_del_init(&fw_drv->list);
+    platform_driver_unregister(fw_drv->drv);
+}
+
+/*
+ * firmware_get_device_by_minor
+ * function: Get device information based on minor
+ */
+firmware_device_t *firmware_get_device_by_minor(int minor)
+{
+    firmware_device_t *tmp;
+
+    list_for_each_entry(tmp, &dev_list, list) {
+        if (tmp->dev.minor == minor) {
+            return tmp;
+        }
+    }
+
+    return NULL;
+}
+
+/**
+ * firmware_device_register
+ * function:Registered Driver Device
+ * @fw_dev: param[in] Driver information
+ * return value:success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+int firmware_device_register(firmware_device_t *fw_dev)
+{
+    int ret;
+    firmware_device_t *tmp;
+
+    if (fw_dev == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Parameter error.\n");
+        return FIRMWARE_FAILED;
+    }
+    /* Check whether the device file name already exists in the device linked list */
+    list_for_each_entry(tmp, &dev_list, list) {
+        if (strcmp(tmp->name, fw_dev->name) == 0) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("devie %s already exists.\n", fw_dev->name);
+            return FIRMWARE_FAILED;
+        }
+    }
+
+    /* Registere device */
+    ret = misc_register(&fw_dev->dev);
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("register misc error, ret=%d.\n", ret);
+        return FIRMWARE_FAILED;
+    }
+
+    /* Adds a device to the device list */
+    list_add(&fw_dev->list, &dev_list);
+
+    return FIRMWARE_SUCCESS;
+}
+
+/**
+ * firmware_device_unregister
+ * function: unregister Driver Device
+ */
+void firmware_device_unregister(firmware_device_t *fw_dev)
+{
+    list_del(&fw_dev->list);
+    misc_deregister(&fw_dev->dev);
+}
+
+static int __init firmware_driver_init(void)
+{
+    int ret;
+
+    INIT_LIST_HEAD(&drv_list);
+    INIT_LIST_HEAD(&dev_list);
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware driver init.\n");
+    ret = firmware_cpld_init();
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("firmware driver init failed.\n");
+        return FIRMWARE_FAILED;
+    }
+
+    return FIRMWARE_SUCCESS;
+}
+
+static void __exit firmware_driver_exit(void)
+{
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware driver exit.\n");
+    firmware_cpld_exit();
+    INIT_LIST_HEAD(&drv_list);
+    INIT_LIST_HEAD(&dev_list);
+    return;
+}
+
+module_init(firmware_driver_init);
+module_exit(firmware_driver_exit);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("Firmware upgrade driver");
+MODULE_LICENSE("GPL");
+MODULE_VERSION("1.0");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/firmware_cpld.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/firmware_cpld.c
new file mode 100644
index 000000000000..18ec509d0f2e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/firmware_cpld.c
@@ -0,0 +1,384 @@
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/kdev_t.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/of.h>
+#include <linux/uaccess.h>
+#include <firmware.h>
+#include <firmware_cpld.h>
+#include <firmware_upgrade.h>
+
+static int firmware_cpld_open(struct inode *inode, struct file *file)
+{
+    firmware_device_t *frm_dev;
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Open cpld device.\n");
+    frm_dev = firmware_get_device_by_minor(MINOR(inode->i_rdev));
+    if (frm_dev == NULL) {
+        return -ENXIO;
+    }
+    file->private_data = frm_dev;
+
+    return FIRMWARE_SUCCESS;
+}
+
+static ssize_t firmware_cpld_read (struct file *file, char __user *buf, size_t count,
+                                   loff_t *offset)
+{
+    return 0;
+}
+
+static ssize_t firmware_cpld_write (struct file *file, const char __user *buf, size_t count,
+                                    loff_t *offset)
+{
+    return 0;
+}
+
+static loff_t firmware_cpld_llseek(struct file *file, loff_t offset, int origin)
+{
+    return 0;
+}
+
+/*
+ * firmware_cpld_ioctl
+ * function: ioctl command parsing function
+ * @file: param[in] device file name
+ * @cmd:  param[in] command
+ * @arg:  param[in] the parameters in the command
+ * return value: success-FIRMWARE_SUCCESS; fail:other value
+ */
+static long firmware_cpld_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+    int ret;
+    char *buf;
+    void __user *argp;
+    char version[FIRMWARE_NAME_LEN];
+    char chip_name[FIRMWARE_NAME_LEN];
+    cmd_info_t cmd_info;
+    firmware_device_t *frm_dev;
+    firmware_cpld_t *cpld_info;
+
+    /* Get device private data */
+    mem_clear(&cmd_info, sizeof(cmd_info_t));
+    frm_dev = (firmware_device_t *)file->private_data;
+    cpld_info = NULL;
+    if (frm_dev != NULL) {
+        if (frm_dev->priv != NULL) {
+            cpld_info = (firmware_cpld_t *)frm_dev->priv;
+        }
+    }
+    if (cpld_info == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to frm_dev->priv sysfs info.\n");
+        return FIRMWARE_FAILED;
+    }
+    argp = (void __user *)arg;
+
+    switch (cmd) {
+    case FIRMWARE_GET_CHIPNAME:
+        /* get chip name */
+        if (copy_from_user(&cmd_info, argp, sizeof(cmd_info_t))) {
+            return -EFAULT;
+        }
+        mem_clear(chip_name, FIRMWARE_NAME_LEN);
+        ret = fmw_cpld_upg_get_chip_name(frm_dev->chain, cpld_info, chip_name, FIRMWARE_NAME_LEN);
+        if (ret != FIRMWARE_SUCCESS) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to get chip name.\n");
+            return -ENXIO;
+        }
+        if (copy_to_user(cmd_info.data, chip_name, cmd_info.size)) {
+            return -EFAULT;
+        }
+        break;
+    case FIRMWARE_PROGRAM:
+    case FIRMWARE_PROGRAM_JBI:
+        /* firmware upgrade */
+        if (copy_from_user(&cmd_info, argp, sizeof(cmd_info_t))) {
+            return -EFAULT;
+        }
+        buf = (char *) kzalloc(cmd_info.size + 1, GFP_KERNEL);
+        if (buf == NULL) {
+            return -ENOMEM;
+        }
+        if (copy_from_user(buf, cmd_info.data, cmd_info.size)) {
+            kfree(buf);
+            return -EFAULT;
+        }
+        buf[cmd_info.size] = 0;
+        if (cmd == FIRMWARE_PROGRAM_JBI) {
+            /* JBI firmware upgrade */
+            ret = fmw_cpld_upg_program_jbi(frm_dev->chain, cpld_info, buf, cmd_info.size);
+        } else {
+            /* ISC firmware upgrade */
+            ret = fmw_cpld_upg_program(frm_dev->chain, cpld_info, buf, cmd_info.size);
+        }
+        if (ret != FIRMWARE_SUCCESS) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to program cpld.\n");
+            kfree(buf);
+            return -ESRCH;
+        }
+        kfree(buf);
+        break;
+    case FIRMWARE_GET_VERSION:
+        /* get version */
+        if (copy_from_user(&cmd_info, argp, sizeof(cmd_info_t))) {
+            return -EFAULT;
+        }
+        mem_clear(version, FIRMWARE_NAME_LEN);
+        ret = fmw_cpld_upg_get_version(frm_dev->chain, cpld_info, version, FIRMWARE_NAME_LEN);
+        if (ret != FIRMWARE_SUCCESS) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to get version.\n");
+            return -ENXIO;
+        }
+        if (copy_to_user(cmd_info.data, version, cmd_info.size)) {
+            return -EFAULT;
+        }
+        break;
+    default:
+        FIRMWARE_DRIVER_DEBUG_ERROR("not find cmd: %d\r\n", cmd);
+        return -ENOTTY;
+    } /* End of switch */
+
+    return FIRMWARE_SUCCESS;
+}
+
+static int firmware_cpld_release(struct inode *inode, struct file *file)
+{
+    return 0;
+}
+
+static const struct file_operations cpld_dev_fops = {
+    .owner      = THIS_MODULE,
+    .llseek     = firmware_cpld_llseek,
+    .read       = firmware_cpld_read,
+    .write      = firmware_cpld_write,
+    .unlocked_ioctl = firmware_cpld_ioctl,
+    .open       = firmware_cpld_open,
+    .release    = firmware_cpld_release,
+};
+
+static int of_firmware_upgrade_config_init(struct device *dev, firmware_cpld_t *cpld_info)
+{
+    int ret;
+    char *name;
+    int i;
+    char buf[64];
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Enter firmware_upgrade_config_init\r\n");
+    if (cpld_info == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("info is null\r\n");
+        return -1;
+    }
+
+    mem_clear(cpld_info, sizeof(firmware_cpld_t));
+    ret = 0;
+    ret += of_property_read_string(dev->of_node, "type", (const char **)&name);
+    ret += of_property_read_u32(dev->of_node, "tdi", &cpld_info->tdi);
+    ret += of_property_read_u32(dev->of_node, "tck", &cpld_info->tck);
+    ret += of_property_read_u32(dev->of_node, "tms", &cpld_info->tms);
+    ret += of_property_read_u32(dev->of_node, "tdo", &cpld_info->tdo);
+
+    ret += of_property_read_u32(dev->of_node, "chain", &cpld_info->chain);
+    ret += of_property_read_u32(dev->of_node, "chip_index", &cpld_info->chip_index);
+
+    if (ret != 0) {
+       FIRMWARE_DRIVER_DEBUG_ERROR("dts config error, ret:%d.\n", ret);
+       return -ENXIO;
+    }
+
+    strncpy(cpld_info->type, name, sizeof(cpld_info->type) - 1);
+
+    ret = of_property_read_u32(dev->of_node, "tck_delay", &cpld_info->tck_delay);
+    if(ret != 0) {
+        cpld_info->tck_delay = 60;
+    }
+
+    cpld_info->gpio_en_info_num = 0;
+    /* Enable through GPIO */
+    for (i = 0; i < FIRMWARE_EN_INFO_MAX; i++) {
+        mem_clear(buf, sizeof(buf));
+        snprintf(buf, sizeof(buf) - 1, "en_gpio_%d", i);
+        ret = of_property_read_u32(dev->of_node, buf, &cpld_info->gpio_en_info[i].en_gpio);
+        if(ret != 0) {
+            break;
+        }
+
+        mem_clear(buf, sizeof(buf));
+        snprintf(buf, sizeof(buf) - 1, "en_level_%d", i);
+        ret = of_property_read_u32(dev->of_node, buf, &cpld_info->gpio_en_info[i].en_level);
+        if(ret != 0) {
+            break;
+        }
+        cpld_info->gpio_en_info_num++;
+    }
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("type:%s, chain:%u, chip_index:%u, en_info_num:%u\n",
+        cpld_info->type, cpld_info->chain, cpld_info->chip_index, cpld_info->gpio_en_info_num);
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("tdi:%u, tck:%u, tms:%u, tdo:%u tck_delay:%u.\n",
+        cpld_info->tdi, cpld_info->tck, cpld_info->tms, cpld_info->tdo, cpld_info->tck_delay);
+
+    return 0;
+}
+
+static int firmware_upgrade_config_init(struct device *dev, firmware_cpld_t *cpld_info)
+{
+    int i;
+
+    firmware_upgrade_device_t *firmware_upgrade_device;
+    firmware_jtag_device_t jtag_upg_device;
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Enter firmware_upgrade_config_init\r\n");
+    if (cpld_info == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("info is null\r\n");
+        return -1;
+    }
+
+    if (dev->platform_data == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("platform data config error.\n");
+        return -1;
+    }
+    firmware_upgrade_device = dev->platform_data;
+    jtag_upg_device = firmware_upgrade_device->upg_type.jtag;
+
+    mem_clear(cpld_info, sizeof(firmware_cpld_t));
+
+    strncpy(cpld_info->type, firmware_upgrade_device->type, sizeof(cpld_info->type) - 1);
+    cpld_info->tdi = jtag_upg_device.tdi;
+    cpld_info->tck = jtag_upg_device.tck;
+    cpld_info->tms = jtag_upg_device.tms;
+    cpld_info->tdo = jtag_upg_device.tdo;
+    cpld_info->chain = firmware_upgrade_device->chain;
+    cpld_info->chip_index = firmware_upgrade_device->chip_index;
+
+    if (jtag_upg_device.tck_delay == 0) {
+        cpld_info->tck_delay = 60;
+        FIRMWARE_DRIVER_DEBUG_VERBOSE("no config tck_delay, use default value:%u\n", cpld_info->tck_delay);
+    } else {
+        cpld_info->tck_delay = jtag_upg_device.tck_delay;
+    }
+
+    if (firmware_upgrade_device->en_gpio_num > FIRMWARE_EN_INFO_MAX) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("The number of en_gpio_num:%u configurations exceeds the maximum limit:%u.\n",
+            firmware_upgrade_device->en_gpio_num, FIRMWARE_EN_INFO_MAX);
+        return -ENXIO;
+    }
+    cpld_info->gpio_en_info_num = firmware_upgrade_device->en_gpio_num;
+    /* Enable through GPIO */
+    for (i = 0; i < cpld_info->gpio_en_info_num; i++) {
+        cpld_info->gpio_en_info[i].en_gpio = firmware_upgrade_device->en_gpio[i];
+        cpld_info->gpio_en_info[i].en_level = firmware_upgrade_device->en_level[i];
+    }
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("type:%s, chain:%u, chip_index:%u, en_info_num:%u\n",
+        cpld_info->type, cpld_info->chain, cpld_info->chip_index, cpld_info->gpio_en_info_num);
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("tdi:%u, tck:%u, tms:%u, tdo:%u tck_delay:%u.\n",
+        cpld_info->tdi, cpld_info->tck, cpld_info->tms, cpld_info->tdo, cpld_info->tck_delay);
+
+    return 0;
+}
+
+static int  firmware_cpld_probe(struct platform_device *pdev)
+{
+    int ret;
+    firmware_cpld_t *cpld_info;
+    firmware_device_t *frm_dev;
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Enter firmware_cpld_probe\r\n");
+    /* Gets the information in the device tree */
+    cpld_info = devm_kzalloc(&pdev->dev, sizeof(firmware_cpld_t), GFP_KERNEL);
+    if (cpld_info == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to kzalloc cpld device tree.\n");
+        return -EPERM;
+    }
+
+    if (pdev->dev.of_node) {
+        ret = of_firmware_upgrade_config_init(&pdev->dev, cpld_info);
+    } else {
+        ret = firmware_upgrade_config_init(&pdev->dev, cpld_info);
+    }
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("get config init from dts error.\n");
+        return -EPERM;
+    }
+
+    frm_dev = devm_kzalloc(&pdev->dev, sizeof(firmware_device_t), GFP_KERNEL);
+    if (frm_dev == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to kzalloc firmware device.\n");
+        return -EPERM;
+    }
+
+    /* Based on the link number, determine the name of the device file */
+    frm_dev->chain = cpld_info->chain;
+    snprintf(frm_dev->name, FIRMWARE_NAME_LEN - 1, "firmware_cpld%d", frm_dev->chain);
+    strncpy(cpld_info->devname, frm_dev->name, strlen(frm_dev->name) + 1);
+
+    INIT_LIST_HEAD(&frm_dev->list);
+    frm_dev->dev.minor = MISC_DYNAMIC_MINOR;
+    frm_dev->dev.name = frm_dev->name;
+    frm_dev->dev.fops = &cpld_dev_fops;
+    frm_dev->priv = cpld_info;
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Register cpld firmware chain:%d, name:%s.\n", frm_dev->chain, frm_dev->name);
+
+    ret = firmware_device_register(frm_dev);
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to register firmware device.\n");
+        return -EPERM;
+    }
+
+    platform_set_drvdata(pdev, frm_dev);
+    return 0;
+}
+
+static int __exit firmware_cpld_remove(struct platform_device *pdev)
+{
+    firmware_device_t *frm_dev;
+
+    frm_dev = (firmware_device_t *)platform_get_drvdata(pdev);
+    firmware_device_unregister(frm_dev);
+    platform_set_drvdata(pdev, NULL);
+
+    return 0;
+}
+
+static struct of_device_id cpld_match[] = {
+    {
+        .compatible = "firmware_cpld",
+    },
+    {},
+};
+
+static struct platform_driver cpld_driver = {
+    .driver = {
+        .name = "firmware_cpld",
+        .owner = THIS_MODULE,
+        .of_match_table = cpld_match,
+    },
+    .probe = firmware_cpld_probe,
+    .remove = firmware_cpld_remove,
+};
+
+static firmware_driver_t fmw_drv_cpld = {
+    .name = "firmware_cpld",
+    .drv = &cpld_driver,
+};
+
+int firmware_cpld_init(void)
+{
+    int ret;
+
+    INIT_LIST_HEAD(&fmw_drv_cpld.list);
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("cpld upgrade driver register \n");
+    ret = firmware_driver_register(&fmw_drv_cpld);
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("cpld upgrade driver register failed.\n");
+        return ret;
+    }
+    return 0;
+}
+
+void firmware_cpld_exit(void)
+{
+    firmware_driver_unregister(&fmw_drv_cpld);
+    INIT_LIST_HEAD(&fmw_drv_cpld.list);
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/firmware_cpld_upgrade.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/firmware_cpld_upgrade.c
new file mode 100644
index 000000000000..8252c2a39bb2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/firmware_cpld_upgrade.c
@@ -0,0 +1,1879 @@
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/ctype.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <firmware.h>
+#include <firmware_cpld.h>
+#include <jbi.h>
+
+/* CPLD file parses the relevant parameters */
+#define CPLD_HEX                 16
+#define DEC_VAL                  10
+#define CPLD_INIT_CNT            4
+#define CPLD_UNIT_SZ             4
+#define CPLD_HEAD_KEYWORD       "Header"
+#define CPLD_NAME_KEYWORD       "Entity"
+#define CPLD_INIT_KEYWORD       "INITIALIZE"
+#define CPLD_REPEAT_KEYWORD     "REPEAT"
+#define CPLD_END_CHAR           ','
+
+/* TCK clock MAX 16MHz */
+#define    TCK_DELAY                         (current_fmw_cpld->tck_delay)
+
+/*
+ * The instruction format of the MAX II CPLD is 10 bits
+ * For shift_ir state machine use
+ */
+#define    BYPASS                            0x3FF
+#define    EXTEST                            0xF
+#define    SAMPLE                            0x5
+#define    IDCODE                            0x6
+#define    USERCODE                          0x7
+#define    CLAMP                             0xA
+#define    HIGHZ                             0xB
+
+/* Following 7 instructions are IEEE 1532 instructions */
+#define    ISC_ENABLE                        0x2CC
+#define    ISC_DISABLE                       0x201
+#define    ISC_PROGRAM                       0x2F4
+#define    ISC_ERASE                         0x2F2
+#define    ISC_ADDRESS_SHIFT                 0x203
+#define    ISC_READ                          0x205
+#define    ISC_NOOP                          0x210
+
+/*
+ * MAX II devices support the real-time in-system programmability (ISP)
+ * feature that allows you to program the device while it is still in operation.
+ * when there is either a power cycle to the device (powering down and powering
+ * up again) or with the execution of certain ISP instructions to start the SRAM
+ * download process when realtime ISP has completed.
+ */
+#define    RT_ISC_ENABLE                     0x199
+#define    RT_ISC_DISABLE                    0x166
+
+/* Chip ID */
+#define    EPM240_G                          0x020A10DD
+#define    EPM570_G                          0x020A20DD
+#define    EPM1270_G                         0x020A30DD
+#define    EPM2210_G                         0x020A40DD
+#define    EPM240_Z                          0x020A50DD
+#define    EPM570_Z                          0x020A60DD
+
+/* The size of the output data for ID validation */
+#define    VERIFY_IDCODE_SIZE                0x5
+
+/* Erasure and programmatic delay handling */
+#define    ERASE_DELAY                       0x1024
+#define    PROGRAM_DELAY                     0x5
+
+/* Chip instruction register */
+#define    CPLD_INSTRUCTION_SIZE             10
+
+/*
+ * Currently, only two connectors are supported
+ * The size of the instruction register needs to be changed
+ * when more than two connectors are used
+ */
+#ifndef CPLD_MAX_CHIP
+#define    CPLD_MAX_CHIP                     2
+#endif
+
+typedef struct cpld_chip_id {
+    char    *name;
+    uint    id;
+    int     addr_register_length;
+    int     data_register_length;
+    int     eeprom_array_length;
+    int     first_blank_check_length;
+    int     second_blank_check_length;
+    int     first_erase_addr;
+    int     second_erase_addr;
+    int     third_erase_addr;
+    int     verify_idcode_addr;
+} cpld_chip_id_t;
+
+static cpld_chip_id_t cpld_id_table[] = {
+    {"EPM240T100", EPM240_G, 13, 16, 4604, 3327, 511, 0x0, 0x1, 0x11, 0x89},
+    {"EPM570T144", EPM570_G, 14, 16, 8700, 3327, 511, 0x0, 0x1, 0x21, 0x111},
+    {"EPM1270F256", EPM1270_G, 15, 16, 16892, 16383, 511, 0x0, 0x1, 0x41, 0x221},
+    {"5M240Z", EPM240_Z, 13, 16, 4604, 3327, 511, 0x0, 0x1, 0x11, 0x89},
+    {"5M570Z", EPM570_Z, 14, 16, 8700, 3327, 511, 0x0, 0x1, 0x21, 0x111},
+    {NULL, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+};
+
+static cpld_chip_id_t *chip_cpld_info = NULL;
+
+/* The following variables are used when cascading multiple chips */
+static int chip_num, current_chip_index;
+static firmware_cpld_t *current_fmw_cpld;
+
+static int TDI_PULL_UP(void);
+static int TDI_PULL_DOWN(void);
+static int TMS_PULL_UP(void);
+static int TMS_PULL_DOWN(void);
+static int TCK_PULL_UP(void);
+static int TCK_PULL_DOWN(void);
+
+/*
+ * set_currrent_cpld_info
+ * function: Save the current device information
+ * @info: param[in] Information about the device to be updated
+ */
+static void set_currrent_cpld_info(firmware_cpld_t *info)
+{
+    current_fmw_cpld = info;
+}
+
+/*
+ * firmware_upgrade_en
+ * function: Upgrade access enabling switch
+ * @flag: !0:enable 0:disable
+ */
+static int firmware_upgrade_en(int flag)
+{
+    int i;
+    int ret;
+
+    for (i = 0; i < current_fmw_cpld->gpio_en_info_num; i++) {
+        if (flag) {
+            ret = gpio_request(current_fmw_cpld->gpio_en_info[i].en_gpio, "cpld_upgrade");
+            if (ret) {
+                FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_ispvme_upgrade EN[%d] GPIO[%d] failed!\n",
+                        i, current_fmw_cpld->gpio_en_info[i].en_gpio);
+                goto free_gpio;
+            }
+            gpio_direction_output(current_fmw_cpld->gpio_en_info[i].en_gpio, current_fmw_cpld->gpio_en_info[i].en_level);
+            current_fmw_cpld->gpio_en_info[i].flag = 1;
+        } else {
+            gpio_set_value(current_fmw_cpld->gpio_en_info[i].en_gpio, !current_fmw_cpld->gpio_en_info[i].en_level);
+            gpio_free(current_fmw_cpld->gpio_en_info[i].en_gpio);
+            current_fmw_cpld->gpio_en_info[i].flag = 0;
+        }
+    }
+    return 0;
+free_gpio:
+    for (i = 0; i < current_fmw_cpld->gpio_en_info_num; i++) {
+        if (current_fmw_cpld->gpio_en_info[i].flag == 1) {
+            gpio_set_value(current_fmw_cpld->gpio_en_info[i].en_gpio, !current_fmw_cpld->gpio_en_info[i].en_level);
+            gpio_free(current_fmw_cpld->gpio_en_info[i].en_gpio);
+            current_fmw_cpld->gpio_en_info[i].flag = 0;
+        } else {
+            break;
+        }
+    }
+
+    return -1;
+}
+
+/*
+ * init_cpld
+ * function:Initialize CPLD
+ * return value: 0 success ; -1 fail
+ */
+static int init_cpld(void)
+{
+    int ret;
+
+    if (current_fmw_cpld == NULL) {
+        return -1;
+    }
+    mdelay(10);
+    ret = gpio_request(current_fmw_cpld->tdi, "cpld_upgrade");
+    if (ret) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_upgrade TDI GPIO failed!\n");
+        return ret;
+    }
+    ret = gpio_request(current_fmw_cpld->tck, "cpld_upgrade");
+    if (ret) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_upgrade TCK GPIO failed!\n");
+        goto free_tdi;
+    }
+    ret = gpio_request(current_fmw_cpld->tms, "cpld_upgrade");
+    if (ret) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_upgrade TMS GPIO failed!\n");
+        goto free_tck;
+    }
+    ret = gpio_request(current_fmw_cpld->tdo, "cpld_upgrade");
+    if (ret) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_upgrade TDO GPIO failed!\n");
+        goto free_tms;
+    }
+
+    gpio_direction_output(current_fmw_cpld->tdi, 1);
+    gpio_direction_output(current_fmw_cpld->tck, 1);
+    gpio_direction_output(current_fmw_cpld->tms, 1);
+
+    gpio_direction_input(current_fmw_cpld->tdo);
+    ret = firmware_upgrade_en(1);
+    if (ret) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: open firmware upgrade en failed, ret %d.\n", ret);
+        goto free_tdo;
+    }
+
+    /* test GPIO */
+    if (TDI_PULL_UP() < 0 ) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TDI_PULL_UP failed.\n");
+        goto free_tdo;
+    }
+    if (TDI_PULL_DOWN() < 0 ) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TDI_PULL_DOWN failed.\n");
+        goto free_tdo;
+    }
+    if (TMS_PULL_UP() < 0 ) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TMS_PULL_UP failed.\n");
+        goto free_tdo;
+    }
+    if (TMS_PULL_DOWN() < 0 ) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TMS_PULL_DOWN failed.\n");
+        goto free_tdo;
+    }
+    if (TCK_PULL_UP() < 0 ) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TCK_PULL_UP failed.\n");
+        goto free_tdo;
+    }
+    if (TCK_PULL_DOWN() < 0 ) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TCK_PULL_DOWN failed.\n");
+        goto free_tdo;
+    }
+
+    mdelay(10);
+    return 0;
+
+free_tdo:
+    gpio_free(current_fmw_cpld->tdo);
+free_tms:
+    gpio_free(current_fmw_cpld->tms);
+free_tck:
+    gpio_free(current_fmw_cpld->tck);
+free_tdi:
+    gpio_free(current_fmw_cpld->tdi);
+    return ret;
+}
+
+/*
+ * finish_cpld
+ * function: finish  CPLD upgrade operation
+ * return value: 0 success ; -1 fail
+ */
+static int finish_cpld(void)
+{
+    int ret;
+
+    if (current_fmw_cpld == NULL) {
+        return -1;
+    }
+    mdelay(10);
+    ret = firmware_upgrade_en(0);
+    if (ret < 0){
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: close firmware upgrade en failed, ret %d.\r\n", ret);
+    }
+
+    gpio_free(current_fmw_cpld->tdi);
+    gpio_free(current_fmw_cpld->tck);
+    gpio_free(current_fmw_cpld->tms);
+    gpio_free(current_fmw_cpld->tdo);
+    mdelay(10);
+    return 0;
+}
+
+/* Loop waiting for */
+static int pull_wait(int gpio, int value) {
+    int i, j;
+    /* Timeout time is two seconds */
+    for (i = 0; i < 20; i++) {
+        for (j = 0; j < 100; j++) {
+            if (!!gpio_get_value(gpio) == !!value ) {
+                return 0;
+            }
+            /* The first loop does not delay, normally the first loop can immediately return the result */
+            if (i) {
+                mdelay(1);
+            }
+        }
+        /* The CPU is released every 100ms */
+        schedule();
+    }
+    /* timeout */
+    FIRMWARE_DRIVER_DEBUG_ERROR("Error: Wait gpio %d pull to %d failed.\n", gpio, value);
+    return -1;
+}
+
+/* TDI pull-up */
+static int pull_tdi_up(void)
+{
+    if (current_fmw_cpld == NULL) {
+        return -1;
+    }
+    gpio_set_value(current_fmw_cpld->tdi, 1);
+
+    /* Wait for the GPIO value to be set successfully */
+    return pull_wait(current_fmw_cpld->tdi, 1);
+}
+
+/* TDI pull-down */
+static int pull_tdi_down(void)
+{
+    if (current_fmw_cpld == NULL) {
+        return -1;
+    }
+    gpio_set_value(current_fmw_cpld->tdi, 0);
+
+    /* Wait for the GPIO value to be set successfully */
+    return pull_wait(current_fmw_cpld->tdi, 0);
+}
+
+/* TCK pull-up */
+static int pull_tck_up(void)
+{
+    if (current_fmw_cpld == NULL) {
+        return -1;
+    }
+    gpio_set_value(current_fmw_cpld->tck, 1);
+
+    /* Wait for the GPIO value to be set successfully */
+    return pull_wait(current_fmw_cpld->tck, 1);
+}
+
+/* TCK pull-down */
+static int pull_tck_down(void)
+{
+    if (current_fmw_cpld == NULL) {
+        return -1;
+    }
+    gpio_set_value(current_fmw_cpld->tck, 0);
+
+    /* Wait for the GPIO value to be set successfully */
+    return pull_wait(current_fmw_cpld->tck, 0);
+}
+
+/* TMS pull-up */
+static int pull_tms_up(void)
+{
+    if (current_fmw_cpld == NULL) {
+        return -1;
+    }
+    gpio_set_value(current_fmw_cpld->tms, 1);
+
+    /* Wait for the GPIO value to be set successfully */
+    return pull_wait(current_fmw_cpld->tms, 1);
+}
+
+/* TMS pull-down */
+static int pull_tms_down(void)
+{
+    if (current_fmw_cpld == NULL) {
+        return -1;
+    }
+    gpio_set_value(current_fmw_cpld->tms, 0);
+
+    /* Wait for the GPIO value to be set successfully */
+    return pull_wait(current_fmw_cpld->tms, 0);
+}
+
+/* Read TDO */
+static int read_tdo(void)
+{
+    if (current_fmw_cpld == NULL) {
+        return -1;
+    }
+    return gpio_get_value(current_fmw_cpld->tdo);
+}
+
+static firmware_cpld_function_t function_fmw_cpld = {
+      .pull_tdi_up = pull_tdi_up,
+      .pull_tdi_down = pull_tdi_down,
+      .pull_tck_up = pull_tck_up,
+      .pull_tck_down = pull_tck_down,
+      .pull_tms_up = pull_tms_up,
+      .pull_tms_down = pull_tms_down,
+      .read_tdo = read_tdo,
+      .init_cpld = init_cpld,
+      .finish_cpld = finish_cpld,
+};
+
+/*
+ * TDI_PULL_DOWN
+ * function: Lower TDI
+ */
+static int TDI_PULL_DOWN(void)
+{
+    if ( function_fmw_cpld.pull_tdi_down != NULL) {
+        return function_fmw_cpld.pull_tdi_down();
+    } else {
+        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TDI_PULL_DOWN.\n");
+        return -1;
+    }
+}
+
+/*
+ * TDI_PULL_UP
+ * function: High TDI
+ */
+static int TDI_PULL_UP(void)
+{
+    if (function_fmw_cpld.pull_tdi_up != NULL) {
+        return function_fmw_cpld.pull_tdi_up();
+    } else {
+        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TDI_PULL_UP.\n");
+        return -1;
+    }
+}
+
+/*
+ * TCK_PULL_DOWN
+ * function: Lower TCK
+ */
+static int TCK_PULL_DOWN(void)
+{
+    if (function_fmw_cpld.pull_tck_down != NULL) {
+        return function_fmw_cpld.pull_tck_down();
+    } else {
+        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TCK_PULL_DOWN.\n");
+        return -1;
+    }
+}
+
+/*
+ * TCK_PULL_UP
+ * function: High TCK
+ */
+static int TCK_PULL_UP(void)
+{
+    if (function_fmw_cpld.pull_tck_up != NULL) {
+        return function_fmw_cpld.pull_tck_up();
+    } else {
+        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TCK_PULL_UP.\n");
+        return -1;
+    }
+}
+
+/*
+ * TMS_PULL_DOWN
+ * function: Lower TMS
+ */
+static int TMS_PULL_DOWN(void)
+{
+    if (function_fmw_cpld.pull_tms_down != NULL) {
+        return function_fmw_cpld.pull_tms_down();
+    } else {
+        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TMS_PULL_DOWN.\n");
+        return -1;
+    }
+}
+
+/*
+ * TMS_PULL_UP
+ * function: High TMS
+ */
+static int TMS_PULL_UP(void)
+{
+    if (function_fmw_cpld.pull_tms_up != NULL) {
+        return function_fmw_cpld.pull_tms_up();
+    } else {
+        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TMS_PULL_UP.\n");
+        return -1;
+    }
+}
+
+/*
+ * TDO_READ
+ * function:Read the TDO level
+ */
+static int TDO_READ(void)
+{
+    if (function_fmw_cpld.read_tdo != NULL) {
+        return function_fmw_cpld.read_tdo();
+    } else {
+        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TDO_READ.\n");
+        return -1;
+    }
+}
+
+/*
+ * tap_test_logic_reset
+ * function: reset JTAG
+ * No matter what the original state of the controoler, it will enter
+ * Test_Logic_Reset when TMS is held high for at least five rising
+ * edges of TCK (16MHz)
+ * The controller remains in this state while TMS is high
+ */
+static void tap_test_logic_reset(void)
+{
+    int i;
+    TMS_PULL_UP();
+    TCK_PULL_DOWN();
+    ndelay(TCK_DELAY);
+
+    for (i = 0; i < 5; i++) {
+        TCK_PULL_UP();
+        ndelay(TCK_DELAY);
+        TCK_PULL_DOWN();
+        ndelay(TCK_DELAY);
+    }
+    TCK_PULL_UP();
+    ndelay(TCK_DELAY);
+}
+
+/*
+ * tap_run_test_idle
+ * function:  A controller state between scan operations.Once entered, the controller
+ * will remain in the Run_Test/Idle state as long as TMS is held low.
+ */
+static void tap_run_test_idle(void)
+{
+    TMS_PULL_DOWN();
+    TCK_PULL_DOWN();
+    ndelay(TCK_DELAY);
+    TCK_PULL_UP();
+    ndelay(TCK_DELAY);
+}
+
+/*
+ * tap_select_dr_scan
+ * function :This is a temporary controller state in which all test data registers
+ * selected by the current instruction retain their previous state.
+ */
+static void tap_select_dr_scan(void)
+{
+    TMS_PULL_UP();
+    TCK_PULL_DOWN();
+    ndelay(TCK_DELAY);
+    TCK_PULL_UP();
+    ndelay(TCK_DELAY);
+}
+
+/*
+ * tap_capture_dr
+ * function : In this controller state data may be parallel-loaded into test data
+ * register selected by the current instruction on the rising edge of TCK
+ */
+static void tap_capture_dr(void)
+{
+    TMS_PULL_DOWN();
+    TCK_PULL_DOWN();
+    ndelay(TCK_DELAY);
+    TCK_PULL_UP();
+    ndelay(TCK_DELAY);
+}
+
+/*
+ * tap_shift_dr
+ * function: In this controller state.the test data register connected between TDI
+ * and TDO as a result of the current instruction shifts one stage
+ * toward its serial output on each rising edge of TCK.
+ */
+static void tap_shift_dr(void)
+{
+    TMS_PULL_DOWN();
+    TCK_PULL_DOWN();
+    ndelay(TCK_DELAY);
+    TCK_PULL_UP();
+    ndelay(TCK_DELAY);
+}
+
+/*
+ * tap_exit1_dr
+ * function: This is a temporary controller state.
+ */
+static void tap_exit1_dr(int data)
+{
+    int j;
+    if (data) {
+        TDI_PULL_UP();
+    } else {
+        TDI_PULL_DOWN();
+    }
+
+    /* need to idle here */
+    for (j = 1; j < current_chip_index; j++) {
+        TCK_PULL_DOWN();
+        ndelay(TCK_DELAY);
+        TCK_PULL_UP();
+        ndelay(TCK_DELAY);
+    }
+    TMS_PULL_UP();
+    TCK_PULL_DOWN();
+    ndelay(TCK_DELAY);
+    TCK_PULL_UP();
+    ndelay(TCK_DELAY);
+}
+
+/*
+ * tap_update_dr
+ * function : Some test data registers may be provided with a latched parallel output to
+ * prevent changes at the parallel out-put while data is shifted in the
+ * associated whift-register path in response to certain instructions.Data is
+ * latched onto the parallel output of these test data registers from the
+ * shift-register path on the falling edge of TCK in the Update-DR controler state.
+ */
+static void tap_update_dr(void)
+{
+    TMS_PULL_UP();
+    TCK_PULL_DOWN();
+    ndelay(TCK_DELAY);
+    TCK_PULL_UP();
+    ndelay(TCK_DELAY);
+}
+
+/*
+ * tap_select_ir_scan
+ * function:This is a temporarily controler state in which all test data register selected
+ * by the current instruction retain their previous state.
+ */
+static void tap_select_ir_scan(void)
+{
+    TMS_PULL_UP();
+    TCK_PULL_DOWN();
+    ndelay(TCK_DELAY);
+    TCK_PULL_UP();
+    ndelay(TCK_DELAY);
+}
+
+/*
+ * tap_capture_ir
+ * function :In this controller state the shift-register contained in the instruction
+ * register loads a pattern of fixed logic values on the rising edge of
+ * TCK.design-specific data may be loaded into shift-register stages that
+ * are not required to be set to fixed values.
+ */
+static void tap_capture_ir(void)
+{
+    TMS_PULL_DOWN();
+    TCK_PULL_DOWN();
+    ndelay(TCK_DELAY);
+    TCK_PULL_UP();
+    ndelay(TCK_DELAY);
+}
+
+/*
+ * tap_exit1_ir
+ * function : enter exit1 ir state. This is a temporary controller state.
+ */
+static void tap_exit1_ir(int data)
+{
+    if (data) {
+        TDI_PULL_UP();
+    } else {
+        TDI_PULL_DOWN();
+    }
+    TMS_PULL_UP();
+    TCK_PULL_DOWN();
+    ndelay(TCK_DELAY);
+    TCK_PULL_UP();
+    ndelay(TCK_DELAY);
+}
+
+/*
+ * tap_shift_ir
+ * function: In this controller state the shift-register contained in the instruction
+ * register is connected between TDI and TDO and shifts data one stage
+ * toward its serial output on each rising edge of TCK.
+ */
+static void tap_shift_ir(void)
+{
+    TMS_PULL_DOWN();
+    TCK_PULL_DOWN();
+    ndelay(TCK_DELAY);
+    TCK_PULL_UP();
+    ndelay(TCK_DELAY);
+}
+
+/*
+ * The instruction shifted into the instruction register is latched onto the parallel output
+ * from the shift-register path on the falling edge of TCK in this controller state.Once the
+ * new instruction has been latched,it becomes the current instruction.
+ *
+ */
+static void tap_update_ir(void)
+{
+    TMS_PULL_UP();
+    TCK_PULL_DOWN();
+    ndelay(TCK_DELAY);
+    TCK_PULL_UP();
+    ndelay(TCK_DELAY);
+}
+
+static void tap_send_instruction(int instruction, int ins_len)
+{
+    int i;
+    for (i = 0; i < (ins_len - 1); i++) {
+        if (instruction & 0x1) {
+            TDI_PULL_UP();
+        } else {
+            TDI_PULL_DOWN();
+        }
+        TCK_PULL_DOWN();
+        ndelay(TCK_DELAY);
+        TCK_PULL_UP();
+        ndelay(TCK_DELAY);
+        instruction = instruction >> 1;
+    }
+}
+
+static void tap_send_data(int data, int data_len)
+{
+    int i;
+    for (i = 0; i < (data_len - 1); i++) {
+        if (data & 0x1) {
+            TDI_PULL_UP();
+        } else {
+            TDI_PULL_DOWN();
+        }
+        TCK_PULL_DOWN();
+        ndelay(TCK_DELAY);
+        TCK_PULL_UP();
+        ndelay(TCK_DELAY);
+        data = data >> 1;
+    }
+}
+
+/*
+ * tap_rcv_byte
+ * function  : Receive data from the device side
+ * @data : param[out] Received data */
+static void tap_rcv_byte(u8 *data)
+{
+    int i;
+    u8 rec_data = 0;
+    unsigned char tmp;
+    ndelay(TCK_DELAY);
+    for (i = 0; i < 8; i++) {
+        TCK_PULL_DOWN();
+        ndelay(TCK_DELAY);
+        tmp = TDO_READ();
+        rec_data |= (tmp << i);
+        TCK_PULL_UP();
+        ndelay(TCK_DELAY);
+    }
+    *data = rec_data;
+}
+
+/*
+ * tap_idle
+ * function :Used for state machine idling
+ */
+static void tap_idle(void)
+{
+    int i;
+    for (i = 0; i < 0x100; i++) {
+        TCK_PULL_DOWN();
+        ndelay(TCK_DELAY);
+        TCK_PULL_UP();
+        ndelay(TCK_DELAY);
+
+        /* Timely release of CPU   */
+        schedule();
+    }
+}
+
+/*
+ * jtag_read_data
+ * function :Read the JTAG output data
+ * @size: param[in]  buffer size
+ * @data: param[out] read data buffer
+ */
+static void jtag_read_data(u8 *buf, int size)
+{
+    int i, j;
+    /* JTAG state switching */
+    tap_run_test_idle();
+    tap_select_dr_scan();
+    tap_capture_dr();
+    tap_shift_dr();
+    for (j = current_chip_index; j < chip_num; j++) {
+        TCK_PULL_DOWN();
+        ndelay(TCK_DELAY);
+        TCK_PULL_UP();
+        ndelay(TCK_DELAY);
+    }
+    /* Receive data from the device side */
+    for (i = 0; i < size; i++) {
+        tap_rcv_byte(&buf[i]);
+    }
+    /* JTAG state switching */
+    tap_exit1_dr(0);
+    tap_update_dr();
+    tap_run_test_idle();
+}
+
+/*
+ * jtag_send_instruction
+ * function :JTAG instruction sending interface
+ * @instruction: param[in]  Instruction to be sent
+ * @ins_length:  param[in]  Instruction length
+ */
+static void jtag_send_instruction(int instruction, int ins_length)
+{
+    int i, j;
+    i = 1 << (ins_length - 1);
+    /* JTAG state switching */
+    tap_run_test_idle();
+    tap_select_dr_scan();
+    tap_select_ir_scan();
+    tap_capture_ir();
+    tap_shift_ir();
+
+    for (j = chip_num; j > 1; j--) {
+        if (j == current_chip_index) {
+            tap_send_instruction(instruction, ins_length + 1);
+        } else {
+            tap_send_instruction(BYPASS, ins_length + 1);
+        }
+    }
+
+    if (current_chip_index == 1) {
+        tap_send_instruction(instruction, ins_length);
+        /* Gets the highest bit of the instruction */
+        tap_exit1_ir((instruction & i) >> (ins_length - 1));
+    } else {
+        tap_send_instruction(BYPASS, ins_length);
+        /* Gets the highest bit of the instruction */
+        tap_exit1_ir((BYPASS & i) >> (ins_length - 1));
+    }
+
+    /* JTAG state switching */
+    tap_update_ir();
+    tap_run_test_idle();
+}
+
+/*
+ * jtag_send_data
+ * function :JTAG data sending interface
+ * @buf : param[in]    Data that needs to be sent
+ * @data_length: param[in] Data length
+ */
+static void jtag_send_data(unsigned int buf, int data_length)
+{
+    int i;
+    i = 1 << (data_length - 1);
+
+    /* JTAG state switching */
+    tap_run_test_idle();
+    tap_select_dr_scan();
+    tap_capture_dr();
+    tap_shift_dr();
+    tap_send_data(buf, data_length);
+    /* Gets the highest bit of the instruction */
+    tap_exit1_dr((buf & i) >> (data_length - 1));
+    tap_update_dr();
+    tap_run_test_idle();
+}
+
+/*
+ * jtag_program_donebit
+ * JTAG programming end point */
+static void jtag_program_donebit(void)
+{
+    jtag_send_instruction(ISC_ADDRESS_SHIFT, CPLD_INSTRUCTION_SIZE);
+    tap_idle();
+    jtag_send_data(0x0, chip_cpld_info->addr_register_length);
+    tap_idle();
+
+    switch (chip_cpld_info->id) {
+    case EPM240_G:
+    case EPM570_G:
+        jtag_send_instruction(ISC_PROGRAM, CPLD_INSTRUCTION_SIZE);
+        tap_idle();
+        jtag_send_data(0x7BFF, chip_cpld_info->data_register_length);
+        tap_idle();
+        break;
+    case EPM1270_G:
+        jtag_send_instruction(ISC_PROGRAM, CPLD_INSTRUCTION_SIZE);
+        tap_idle();
+        jtag_send_data(0x7FFF, chip_cpld_info->data_register_length);
+        tap_idle();
+
+        jtag_send_instruction(ISC_PROGRAM, CPLD_INSTRUCTION_SIZE);
+        tap_idle();
+        jtag_send_data(0xFFFF, chip_cpld_info->data_register_length);
+        tap_idle();
+
+        jtag_send_instruction(ISC_PROGRAM, CPLD_INSTRUCTION_SIZE);
+        tap_idle();
+        jtag_send_data(0xFFBF, chip_cpld_info->data_register_length);
+        tap_idle();
+
+        jtag_send_instruction(ISC_PROGRAM, CPLD_INSTRUCTION_SIZE);
+        tap_idle();
+        jtag_send_data(0xFFFF, chip_cpld_info->data_register_length);
+        tap_idle();
+        break;
+    default:
+        break;
+    } /* End of switch */
+}
+
+/*
+ * jtag_rt_disable
+ * JTAG Disable state machine under Real-Time ISP
+ */
+static void jtag_rt_disable(void)
+{
+    jtag_send_instruction(RT_ISC_DISABLE, CPLD_INSTRUCTION_SIZE);
+    tap_idle();
+    jtag_send_instruction(BYPASS, CPLD_INSTRUCTION_SIZE);
+    tap_idle();
+}
+
+/*
+ * jtag_verify_idcode
+ * function :JTAG internal ID reading
+ */
+static void jtag_verify_idcode(void)
+{
+    int data, i;
+    u8 buf[2];
+
+    jtag_send_instruction(ISC_ADDRESS_SHIFT, CPLD_INSTRUCTION_SIZE);
+    tap_idle();
+    jtag_send_data(chip_cpld_info->verify_idcode_addr,
+                   chip_cpld_info->addr_register_length);
+    tap_idle();
+    for (i = 0; i < VERIFY_IDCODE_SIZE; i++) {
+        jtag_send_instruction(ISC_READ, CPLD_INSTRUCTION_SIZE);
+        tap_idle();
+
+        jtag_read_data(buf, 2);
+
+        /* When validating the ID, the data is compared to the corresponding chip value,
+           which is retrieved from the BSDL file*/
+        data = (buf[1] << 8) | buf[0];
+    }
+}
+
+/*
+ * jtag_rt_enable
+ * Enter Real-Time ISP mode; JTAG Enable State Machine under Real-Time ISP
+ */
+static void jtag_rt_enable(void)
+{
+    jtag_send_instruction(RT_ISC_ENABLE, CPLD_INSTRUCTION_SIZE);
+    tap_idle();
+}
+
+/*
+ * jtag_erase
+ * JTAG erases the timing
+ */
+static void jtag_erase(void)
+{
+    int i;
+
+    jtag_send_instruction(ISC_ADDRESS_SHIFT, CPLD_INSTRUCTION_SIZE);
+    tap_idle();
+    jtag_send_data(chip_cpld_info->first_erase_addr,
+                   chip_cpld_info->addr_register_length);
+    tap_idle();
+    jtag_send_instruction(ISC_ERASE, CPLD_INSTRUCTION_SIZE);
+    tap_idle();
+    for (i = 0; i < ERASE_DELAY; i++) {
+        tap_idle();
+        tap_idle();
+    }
+
+    jtag_send_instruction(ISC_ADDRESS_SHIFT, CPLD_INSTRUCTION_SIZE);
+    tap_idle();
+    jtag_send_data(chip_cpld_info->second_erase_addr,
+                   chip_cpld_info->addr_register_length);
+    tap_idle();
+    jtag_send_instruction(ISC_ERASE, CPLD_INSTRUCTION_SIZE);
+    tap_idle();
+    for (i = 0; i < ERASE_DELAY; i++) {
+        tap_idle();
+        tap_idle();
+    }
+
+    jtag_send_instruction(ISC_ADDRESS_SHIFT, CPLD_INSTRUCTION_SIZE);
+    tap_idle();
+    jtag_send_data(chip_cpld_info->third_erase_addr,
+                   chip_cpld_info->addr_register_length);
+    tap_idle();
+    jtag_send_instruction(ISC_ERASE, CPLD_INSTRUCTION_SIZE);
+    tap_idle();
+    for (i = 0; i < ERASE_DELAY; i++) {
+        tap_idle();
+        tap_idle();
+    }
+}
+
+/*
+ * jtag_blank_check
+ * JTAG blank detection */
+static void jtag_blank_check(void)
+{
+    int j;
+    int data;
+    u8 buf[2];
+
+    jtag_send_instruction(ISC_ADDRESS_SHIFT, CPLD_INSTRUCTION_SIZE);
+    tap_idle();
+    jtag_send_data(0x0, chip_cpld_info->addr_register_length);
+    tap_idle();
+    for (j = 0; j < chip_cpld_info->first_blank_check_length; j++) {
+        jtag_send_instruction(ISC_READ, CPLD_INSTRUCTION_SIZE);
+        tap_idle();
+
+        jtag_read_data(buf, 2);
+        data = (buf[1] << 8) | buf[0];
+    }
+
+    jtag_send_instruction(ISC_ADDRESS_SHIFT, CPLD_INSTRUCTION_SIZE);
+    tap_idle();
+    jtag_send_data(0x1, chip_cpld_info->addr_register_length);
+    tap_idle();
+    for (j = 0; j < chip_cpld_info->second_blank_check_length; j++) {
+        jtag_send_instruction(ISC_READ, CPLD_INSTRUCTION_SIZE);
+        tap_idle();
+
+        jtag_read_data(buf, 2);
+        data = (buf[1] << 8) | buf[0];
+    }
+}
+
+/*
+ * jtag_verify1
+ * function :JTAG content validation
+ * @buffer : param[in]  original data
+ * return value  0  validation success; -1 validation failed
+ */
+static int jtag_verify1(unsigned int *buffer)
+{
+    int j, ret = 0;
+    unsigned int data;
+    u8 buf[2];
+
+    jtag_send_instruction(ISC_ADDRESS_SHIFT, CPLD_INSTRUCTION_SIZE);
+    tap_idle();
+    jtag_send_data(0x0, chip_cpld_info->addr_register_length);
+    tap_idle();
+    for (j = 0; j < chip_cpld_info->eeprom_array_length; j++) {
+        jtag_send_instruction(ISC_READ, CPLD_INSTRUCTION_SIZE);
+        tap_idle();
+
+        jtag_read_data(buf, 2);
+        data = (buf[1] << 8) | buf[0];
+
+        if (data != buffer[j]) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("%d: %02x, %02x.\n", j, data, buffer[j]);
+            ret = -1;
+            break;
+        }
+    }
+    return ret;
+}
+
+/*
+ * jtag_read_buffer
+ * function:JTAG internal data reading
+ * @size: param[in]   Read size
+ * @buffer: param[out]  Pointer to read data
+ */
+static void jtag_read_buffer(unsigned int *buffer, int size)
+{
+    int j;
+    int data;
+    u8 buf[2];
+
+    jtag_send_instruction(ISC_ADDRESS_SHIFT, CPLD_INSTRUCTION_SIZE);
+    tap_idle();
+    jtag_send_data(0x0, chip_cpld_info->addr_register_length);
+    tap_idle();
+    for (j = 0; j < size; j++) {
+        jtag_send_instruction(ISC_READ, CPLD_INSTRUCTION_SIZE);
+        tap_idle();
+
+        jtag_read_data(buf, 2);
+        data = (buf[1] << 8) | buf[0];
+        buffer[j] = data;
+    }
+}
+
+/*
+ * jtag_program
+ * function:JTAG programming timing
+ * @buffer: param[in]  data pointer to program
+ */
+static void jtag_program(unsigned int *buffer)
+{
+    int i, j;
+
+    jtag_send_instruction(ISC_ADDRESS_SHIFT, CPLD_INSTRUCTION_SIZE);
+    tap_idle();
+    jtag_send_data(0x0, chip_cpld_info->addr_register_length);
+    tap_idle();
+    for (j = 0; j < chip_cpld_info->eeprom_array_length; j++) {
+        jtag_send_instruction(ISC_PROGRAM, CPLD_INSTRUCTION_SIZE);
+        tap_idle();
+
+        jtag_send_data(buffer[j], chip_cpld_info->data_register_length);
+        for (i = 0; i < PROGRAM_DELAY; i++) {
+            tap_idle();
+            tap_idle();
+        }
+    }
+}
+
+/*
+ * cpld_read_id
+ * function: CPLD chip ID read
+ * @chip: param[in] chip index
+ * id : param[out] ID point */
+static void cpld_read_id(int chip, unsigned int *id)
+{
+    u8 data[sizeof(int)];
+    if (!chip_num || chip > chip_num) {
+        return;
+    }
+    current_chip_index = chip;
+    /* Send instructions */
+    jtag_send_instruction(IDCODE, CPLD_INSTRUCTION_SIZE);
+    /* Read Data */
+    jtag_read_data(data, sizeof(int));
+    *id = (data[3] << 24) | (data[2] << 16) | (data[1] << 8) | data[0];
+}
+
+/*
+ * chip_num_init
+ * function:CPLD number of chips initialized */
+static void chip_num_init(void)
+{
+    unsigned int i, id;
+    unsigned char buf[sizeof(int) * CPLD_MAX_CHIP];
+    chip_num = 0;
+
+    /* JTAG state switching */
+    tap_run_test_idle();
+    tap_select_dr_scan();
+    tap_capture_dr();
+    tap_shift_dr();
+
+    for (i = 0; i < sizeof(int) * CPLD_MAX_CHIP; i++) {
+        tap_rcv_byte(&buf[i]);
+    }
+
+    /* JTAG state switching */
+    tap_exit1_dr(0);
+    tap_update_dr();
+    tap_run_test_idle();
+
+    for (i = 0; i < sizeof(int) * CPLD_MAX_CHIP; i += 4) {
+        id = (buf[i + 3] << 24) | (buf[i + 2] << 16) | (buf[i + 1] << 8) | buf[i];
+        FIRMWARE_DRIVER_DEBUG_VERBOSE("ID: %04x\n", id);
+        if (id != 0xFFFFFFFF && id != 0) {
+            chip_num++;
+        }
+    }
+}
+
+/*
+ * cpld_reset
+ * function: reset JTAG
+ * @chip: param[in] chip index
+ */
+static void cpld_reset(int chip)
+{
+    unsigned int chip_type_id = 0;
+    int i;
+    /* JTAG enters the reset state */
+    tap_test_logic_reset();
+    /* Gets the number of chips in the CPLD */
+    chip_num_init();
+    if (!chip_num) {
+        pr_notice("There is no CPLD chip or the chip is not supported!!\r\n");
+        FIRMWARE_DRIVER_DEBUG_ERROR("chip_num == NULL.\n");
+    } else {
+        FIRMWARE_DRIVER_DEBUG_VERBOSE("enter cpld read id.\n");
+        current_chip_index = chip;
+        /* Read chip ID */
+        cpld_read_id(current_chip_index, &chip_type_id);
+        FIRMWARE_DRIVER_DEBUG_VERBOSE("get cpld id: 0x%x.\n", chip_type_id);
+        for (i = 0; cpld_id_table[i].name != NULL; i++) {
+            if (cpld_id_table[i].id == chip_type_id) {
+                chip_cpld_info = &cpld_id_table[i];
+                break;
+            }
+        }
+    }
+    current_chip_index = -1;
+    tap_test_logic_reset();
+}
+
+/*
+ * cpld_program
+ * function: CPLD programming interface
+ * @chip: param[in]    Chip serial number/chip index
+ * @buffer: param[in]  data pointer to program
+ * return value:      0 success; -1 fail
+ */
+static int cpld_program(int chip, unsigned int *buffer)
+{
+    int ret;
+    int counte;
+
+    if (!chip_num || chip > chip_num
+        || chip_cpld_info == NULL) {
+        return -1;
+    }
+    current_chip_index = chip;
+
+    /* Enter Real-Time ISP mode */
+    jtag_rt_enable();
+    /* JTAG internal ID reading */
+    jtag_verify_idcode();
+    /* JTAG erases */
+    jtag_erase();
+    /* JTAG blank detection */
+    jtag_blank_check();
+    /* JTAG programming timing */
+    jtag_program(buffer);
+
+    /* In the process of upgrade, there is a problem with reading data,
+     * which may occur in the process of reading. Some bit reading fails,
+     * but the reason is not found.
+     * Avoidance resolution: perform multiple checks */
+    for (counte = 0; counte < 4; counte++) {
+        ret = jtag_verify1(buffer);
+        if (counte > 0) {
+            pr_notice("Verify again(%d).\n", counte + 1);
+        }
+
+        if (ret == 0) {
+            break;
+        }
+    }
+    pr_notice("Write chip %d cpld success(%d).\n", chip, ret);
+    jtag_program_donebit();
+
+    /* JTAG Disable state machine under Real-Time ISP */
+    jtag_rt_disable();
+
+    return ret;
+}
+
+static void cpld_read_buffer(int chip, unsigned int *buffer, unsigned int size)
+{
+    if (!chip_num || chip > chip_num
+        || chip_cpld_info == NULL) {
+        return;
+    }
+    current_chip_index = chip;
+
+    /* Enter Real-Time ISP mode */
+    jtag_rt_enable();
+
+    /* JTAG internal ID reading */
+    jtag_verify_idcode();
+
+    /* JTAG internal data reading */
+    jtag_read_buffer(buffer, size);
+
+    jtag_rt_disable();
+
+}
+
+/*
+ * cpld_eeprom_size
+ * function:CPLD chip capacity size
+ * return value :Returns chip capacity on success, or 0 on failure
+ */
+static int cpld_eeprom_size(void)
+{
+    int ret;
+
+    if (!chip_num || chip_cpld_info == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("chip_num:%d or chip_cpld_info == NULL.\n", chip_num);
+        ret = 0;
+    } else {
+        ret = chip_cpld_info->eeprom_array_length;
+        FIRMWARE_DRIVER_DEBUG_ERROR("chip_cpld_info->eeprom_array_length = %d.\n",
+            chip_cpld_info->eeprom_array_length);
+    }
+
+    return ret;
+}
+
+/*
+ * cpld_read_name
+ * function: Gets the CPLD chip name
+ * @chip: param[in] Chip serial number/chip index
+ * return value :chip name */
+static char *cpld_read_name(int chip)
+{
+    uint chip_type_id;
+    int i;
+
+    chip_type_id = 0;
+    cpld_read_id(chip, &chip_type_id);
+    for (i = 0; cpld_id_table[i].name != NULL; i++) {
+         if (cpld_id_table[i].id == chip_type_id) {
+             return cpld_id_table[i].name;
+         }
+    }
+
+    return NULL;
+}
+
+/*
+ * cpld_upgrade_init
+ * function:Initialize GPIO and CPLD
+ * return value: success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+static int cpld_upgrade_init(void)
+{
+    int ret;
+
+    if (function_fmw_cpld.init_cpld != NULL) {
+        ret = function_fmw_cpld.init_cpld();
+        if (ret != FIRMWARE_SUCCESS) {
+            return ret;
+        }
+    }
+
+    return FIRMWARE_SUCCESS;
+}
+
+/*
+ * cpld_upgrade_finish
+ * function:Release GPIO and CPLD
+ * return value: success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+static int cpld_upgrade_finish(void)
+{
+    int ret;
+
+    if (function_fmw_cpld.finish_cpld != NULL) {
+        ret = function_fmw_cpld.finish_cpld();
+        if (ret != FIRMWARE_SUCCESS) {
+            return ret;
+        }
+    }
+
+    return FIRMWARE_SUCCESS;
+}
+
+static int cpld_str_hex_to_dec(char *str, char end_char)
+{
+    int i;
+    int result;
+
+    if (str == NULL) {
+        return FIRMWARE_FAILED;
+    }
+
+    i = 0;
+    result = 0;
+    while (str[i] != end_char) {
+        /* Check for hexadecimal characters:0123456789abcdef */
+        if (!isxdigit(str[i]) || i >= CPLD_UNIT_SZ) {
+            return FIRMWARE_FAILED;
+        }
+        /* Check for a number between 0 and 9 */
+        if (isdigit(str[i])) {
+            result = result * CPLD_HEX + str[i] - '0';
+        }
+        /* Check if the character is uppercase */
+        else if (isupper(str[i])) {
+            result = result * CPLD_HEX + str[i] - 'A' + DEC_VAL;
+        } else {
+            result = result * CPLD_HEX + str[i] - 'a' + DEC_VAL;
+        }
+
+        i++;
+    }
+
+    return result;
+}
+
+static int cpld_check_upgrade_data(char *src, int src_len, int *dst, int dst_len)
+{
+    int i, init_lcnt, tmp;
+    char *ptr;
+    int ret;
+
+    if (src == NULL || dst == NULL) {
+        return FIRMWARE_FAILED;
+    }
+    /* Pointers the ptr pointer to the data following the CPLD_INIT_KEYWORD */
+    ret = FIRMWARE_SUCCESS;
+    ptr = strstr(src, CPLD_INIT_KEYWORD);
+    if (ptr == NULL) {
+        return FIRMWARE_FAILED;
+    } else {
+        ptr += strlen(CPLD_INIT_KEYWORD);
+        while (*ptr == '(' || *ptr == '\r' || *ptr == '\n') {
+            ptr++;
+        }
+    }
+
+    /* Converts a hexadecimal string to decimal, with 4 groups of 4 bytes each */
+    i = 0;
+    init_lcnt = 0;
+    for (init_lcnt = 0; init_lcnt < CPLD_INIT_CNT; init_lcnt++) {
+        tmp = cpld_str_hex_to_dec(ptr, CPLD_END_CHAR);
+        if (tmp < 0) {
+            ret = tmp;
+            return ret;
+        }
+        /* int type is 4 bytes */
+        dst[i++] = tmp;
+        if (i >= dst_len) {
+            return FIRMWARE_SUCCESS;
+        }
+
+        ptr += CPLD_UNIT_SZ + 1;
+
+        while (*ptr == '\r' || *ptr == '\n') {
+            ptr++;
+        }
+    }
+
+    /* Point the ptr pointer to the data after CPLD_REPEAT_KEYWORD */
+    ptr = strstr(src, CPLD_REPEAT_KEYWORD);
+    if (ptr == NULL) {
+        return FIRMWARE_FAILED;
+    } else {
+        ptr += strlen(CPLD_REPEAT_KEYWORD);
+        while (*ptr == '(' || *ptr == '\r' || *ptr == '\n') {
+            ptr++;
+        }
+    }
+
+    while (1) {
+        /* Converts the 4 bytes before ',' to base 10 */
+        tmp = cpld_str_hex_to_dec(ptr, CPLD_END_CHAR);
+        if (tmp < 0) {
+            ret = tmp;
+            break;
+        }
+        dst[i++] = tmp;
+        if (i >= dst_len) {
+            return FIRMWARE_SUCCESS;
+        }
+
+        ptr += CPLD_UNIT_SZ + 1;
+
+        while (*ptr == '\r' || *ptr == '\n') {
+            ptr++;
+        }
+    }
+
+    return FIRMWARE_SUCCESS;
+}
+
+/**
+ * fmw_cpld_upg_get_chip_name
+ * function:get chip name
+ * @chain: param[in]  chain
+ * @cpld: param[in]  Device private data
+ * @len:  param[in]  chip name length
+ * @info: param[out] chip name
+ * return value: success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+int fmw_cpld_upg_get_chip_name(int chain, firmware_cpld_t *cpld, char *info, int len)
+{
+    int ret;
+    char *name;
+
+    /* Check the input and output parameters */
+    if (chain < 0 || info == NULL || len <= 0) {
+        return FIRMWARE_FAILED;
+    }
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Cpld driver to get chip name.\n");
+
+    if (cpld == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to get gpio info.(chain = %d)\n", chain);
+    } else {
+        set_currrent_cpld_info(cpld);
+    }
+
+    if (chain != current_fmw_cpld->chain) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("The chain num is not fit."
+                                    "(chain = %d, current chain = %d, current name: %s)\n",
+                  chain, current_fmw_cpld->chain, current_fmw_cpld->devname);
+    }
+
+    /* Initialize GPIO and CPLD */
+    ret = cpld_upgrade_init( );
+    if (ret != FIRMWARE_SUCCESS) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error:Failed to get chip name when init upgrade.(chain = %d)\n",
+            chain);
+        return FIRMWARE_FAILED;
+    }
+
+    /* reset JTAG */
+    cpld_reset(current_fmw_cpld->chip_index);
+    /* Read chip name */
+    name = cpld_read_name(current_fmw_cpld->chip_index);
+    if (name == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to get chip name when read name.(chain %d, index %d)\n",
+            chain, current_fmw_cpld->chip_index);
+        cpld_upgrade_finish( );
+        return FIRMWARE_FAILED;
+    }
+
+    /* Release GPIO */
+    ret = cpld_upgrade_finish( );
+    if (ret != FIRMWARE_SUCCESS) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to get chip name when finish upgrade.(chain = %d)\n",
+            chain);
+        return FIRMWARE_FAILED;
+    }
+
+    strncpy(info, name, len);
+
+    return FIRMWARE_SUCCESS;
+}
+
+/**
+ * fmw_cpld_upg_program
+ * function:Upgrade CPLD(ISC file format)
+ * @chain: param[in] chain
+ * @cpld: param[in] Device private data
+ * @info: param[in] Data to be written
+ * @len:  param[in] Length of data to be written
+ * return value: success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+int fmw_cpld_upg_program(int chain, firmware_cpld_t *cpld, char *info, int len)
+{
+    int i;
+    int time;
+    int ret;
+    int target_len;
+    int *target_buf;
+
+    /* Check the input parameters */
+    if (chain < 0 || info == NULL || len <= 0) {
+        return FIRMWARE_FAILED;
+    }
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Cpld driver to program chip.\n");
+
+    if (cpld == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to get gpio info.(chain = %d)\n", chain);
+    } else {
+        set_currrent_cpld_info(cpld);
+    }
+
+    if (chain != current_fmw_cpld->chain) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("The chain num is not fit.(chain = %d, current chain = %d)\n",
+                  chain, current_fmw_cpld->chain);
+    }
+    /* Initialize GPIO and CPLD */
+    ret = cpld_upgrade_init( );
+    if (ret != FIRMWARE_SUCCESS) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to program when init upgrade.(chain = %d)\n",
+                  chain);
+        return FIRMWARE_FAILED;
+    }
+
+    /* reset JTAG */
+    cpld_reset(current_fmw_cpld->chip_index);
+    /* CPLD chip capacity size */
+    target_len = cpld_eeprom_size();
+    if (target_len <= 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to get cpld size.(chain = %d)\n",
+                  chain);
+        cpld_upgrade_finish( );
+        return FIRMWARE_FAILED;
+    }
+
+    target_buf = (int *) kzalloc(target_len * sizeof(int), GFP_KERNEL);
+    if (target_buf == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to malloc target buffer.(chain = %d)\n",
+                  chain);
+        cpld_upgrade_finish( );
+        return FIRMWARE_FAILED;
+    }
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("cpld_check_upgrade_data start.(chain = %d, %d)\n",
+                  chain, target_len);
+    /* Remove extraneous information */
+    ret = cpld_check_upgrade_data(info, len, target_buf, target_len);
+    if (ret < 0){
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to check data.(chain = %d)\n",
+                  chain);
+        kfree(target_buf);
+        cpld_upgrade_finish( );
+        return FIRMWARE_FAILED;
+    }
+
+    for (i = 0; i < 16 * 8; i += 8) {
+        FIRMWARE_DRIVER_DEBUG_VERBOSE(" %x %x %x %x %x %x %x %x\n",
+                  target_buf[i], target_buf[i + 1],
+                  target_buf[i + 2], target_buf[i + 3],
+                  target_buf[i + 4], target_buf[i + 5],
+                  target_buf[i + 6], target_buf[i + 7]);
+    }
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("cpld_check_upgrade_data finish.(chain = %d)\n", chain);
+
+    /* CPLD device writing */
+    for (time = 0; time < 10; time++) {
+        FIRMWARE_DRIVER_DEBUG_VERBOSE("Start upgrade cpld: %d.(chain = %d)\n", time, chain);
+        ret = cpld_program(current_fmw_cpld->chip_index, target_buf);
+        if (ret >= 0) {
+            break;
+        }
+    }
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to program.(chain = %d)\n", chain);
+        kfree(target_buf);
+        cpld_upgrade_finish( );
+        return FIRMWARE_FAILED;
+    }
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("SUCCESS PROGRAM.\n");
+
+    /* Release GPIO */
+    ret = cpld_upgrade_finish();
+    if (ret != FIRMWARE_SUCCESS) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to program when finish upgrade.(chain = %d)\n",
+                  chain);
+    }
+
+    kfree(target_buf);
+    return FIRMWARE_SUCCESS;
+}
+
+/**
+ * fmw_cpld_upg_program_jbi
+ * function: Upgrade CPLD(JBI file format)
+ * @chain: param[in] chain
+ * @cpld: param[in] Device private data
+ * @info: param[in] Data to be written
+ * @len:  param[in] Length of data to be written
+ * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+int fmw_cpld_upg_program_jbi(int chain, firmware_cpld_t *cpld, char *info, int len)
+{
+    int time, ret;
+    int argc = 3;
+    char *argv[] = {
+        "-r",
+        "-aprogram",
+        "-ddo_real_time_isp=1"
+    };
+
+    /* Check the input parameters */
+    if (chain < 0 || info == NULL || len <= 0) {
+        return FIRMWARE_FAILED;
+    }
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Cpld driver to program chip %d(%p,%p,%d).\n",
+        chain, cpld, info, len);
+
+    if (cpld == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to get gpio info.(chain = %d)\n", chain);
+    } else {
+        set_currrent_cpld_info(cpld);
+    }
+
+    if (chain != current_fmw_cpld->chain) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("The chain num is not fit.(chain = %d, current chain = %d)\n",
+            chain, current_fmw_cpld->chain);
+    }
+    /* Initialize GPIO and CPLD */
+    ret = cpld_upgrade_init( );
+    if (ret != FIRMWARE_SUCCESS) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to program when init upgrade.(chain = %d)\n",
+            chain);
+        return FIRMWARE_FAILED;
+    }
+
+    /* reset JTAG */
+    cpld_reset(current_fmw_cpld->chip_index);
+
+    for (time = 0; time < 30; time++) {
+        FIRMWARE_DRIVER_DEBUG_VERBOSE("Start upgrade cpld: %d.(chain = %d)\n", time, chain);
+        ret = jbi_main((unsigned char *) info, (unsigned long) len, argc, argv);
+        if (ret == 0) {
+            break;
+        }
+    }
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to program.(chain = %d)\n", chain);
+        cpld_upgrade_finish( );
+        return FIRMWARE_FAILED;
+    }
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("SUCCESS PROGRAM.\n");
+
+    /* Release GPIO and CPLD */
+    ret = cpld_upgrade_finish( );
+    if (ret != FIRMWARE_SUCCESS) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to program when finish upgrade.(chain = %d)\n",
+                  chain);
+    }
+
+    return FIRMWARE_SUCCESS;
+}
+
+/**
+ * fmw_cpld_upg_get_version
+ * function: get version
+ * @chain: param[in]  chain
+ * @cpld: param[in]  Device private data
+ * @len:  param[in]  Data length
+ * @info: param[out] Version information buffer
+ * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+int fmw_cpld_upg_get_version(int chain, firmware_cpld_t *cpld, char *info, int len)
+{
+    int ret;
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Cpld driver to get version.\n");
+    if (cpld == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to get gpio info.(chain = %d)\n", chain);
+    } else {
+        set_currrent_cpld_info(cpld);
+    }
+
+    if (chain != current_fmw_cpld->chain) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("The chain num is not fit.(chain = %d, current chain = %d)\n",
+                  chain, current_fmw_cpld->chain);
+    }
+
+    /* CPLD device can't get version */
+    if (function_fmw_cpld.get_version != NULL) {
+        ret = function_fmw_cpld.get_version(chain, info, len);
+        if (ret < 0) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed get version in chain: %d.\n", chain);
+            return FIRMWARE_FAILED;
+        }
+
+        return FIRMWARE_SUCCESS;
+    } else {
+        FIRMWARE_DRIVER_DEBUG_ERROR("The get_version is NULL in chain: %d.\n", chain);
+    }
+
+    return FIRMWARE_FAILED;
+}
+
+/**
+ * fmw_cpld_upg_get_chip_info
+ * function: Get chip content
+ * @chain:  param[in]  chain
+ * @cpld:  param[in]  Device private data
+ * @len:   param[in]  Data length
+ * @info:  param[out] Read Data Buffer
+ * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+int fmw_cpld_upg_get_chip_info(int chain, firmware_cpld_t *cpld, void *info, int len)
+{
+    int i;
+    int ret;
+    int target_len;
+    int *target_buf;
+
+    /* Check input and output parameters */
+    if (chain < 0 || info == NULL || len <= 0) {
+        return FIRMWARE_FAILED;
+    }
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Cpld driver to read chip.\n");
+
+    if (cpld == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to get gpio info.(chain = %d)\n", chain);
+    } else {
+        set_currrent_cpld_info(cpld);
+    }
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Cpld driver to read chip: %s.\n",current_fmw_cpld->devname);
+    if (chain != current_fmw_cpld->chain) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("The chain num is not fit.(chain = %d, current chain = %d)\n",
+                  chain, current_fmw_cpld->chain);
+    }
+
+    /* Initialize GPIO and CPLD */
+    ret = cpld_upgrade_init( );
+    if (ret != FIRMWARE_SUCCESS) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to program when init upgrade.(chain = %d)\n",
+                  chain);
+        return FIRMWARE_FAILED;
+    }
+
+    /* reset JTAG*/
+    cpld_reset(current_fmw_cpld->chip_index);
+    /* CPLD chip capacity size */
+    target_len = cpld_eeprom_size();
+    if (target_len <= 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to get cpld size.(chain = %d)\n",
+                  chain);
+        cpld_upgrade_finish( );
+        return FIRMWARE_FAILED;
+    }
+
+    target_buf = (int *) kzalloc(target_len * sizeof(int), GFP_KERNEL);
+    if (target_buf == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to malloc target buffer.(chain = %d)\n",
+                  chain);
+        cpld_upgrade_finish( );
+        return FIRMWARE_FAILED;
+    }
+    /* Read chip */
+    cpld_read_buffer(current_fmw_cpld->chip_index, target_buf, target_len);
+
+    for (i = 0; i < 16 * 8; i += 8) {
+        FIRMWARE_DRIVER_DEBUG_VERBOSE(" %x %x %x %x %x %x %x %x\n",
+                  target_buf[i], target_buf[i + 1],
+                  target_buf[i + 2], target_buf[i + 3],
+                  target_buf[i + 4], target_buf[i + 5],
+                  target_buf[i + 6], target_buf[i + 7]);
+    }
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Success Read.\n");
+
+    /* Release GPIO and CPLD */
+    ret = cpld_upgrade_finish( );
+    if (ret != FIRMWARE_SUCCESS) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to program when finish upgrade.(chain = %d)\n",
+                  chain);
+    }
+
+    if (copy_to_user(info, target_buf, (len > target_len) ? target_len : len)) {
+        kfree(target_buf);
+        return FIRMWARE_FAILED;
+    }
+
+    kfree(target_buf);
+    return FIRMWARE_SUCCESS;
+}
+
+/**
+ * jbi_jtag_io_
+ * function: JBI GPIO operation
+ * @tms: param[in]  TMS signal level
+ * @tdi: param[in]  TDI signal level
+ * @read_tdo:  param[in] Whether to read the level of the TDO
+ * return value : tdo
+ */
+int __attribute__ ((weak)) jbi_jtag_io_(int tms, int tdi, int read_tdo)
+{
+    int tdo = 0;
+
+    if (tms) {
+        TMS_PULL_UP();
+    } else {
+        TMS_PULL_DOWN();
+    }
+
+    if (tdi) {
+        TDI_PULL_UP();
+    } else {
+        TDI_PULL_DOWN();
+    }
+
+    TCK_PULL_UP();
+    ndelay(TCK_DELAY);
+
+    if (read_tdo) {
+        tdo = TDO_READ();
+    }
+
+    TCK_PULL_DOWN();
+    ndelay(TCK_DELAY);
+
+    return tdo;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/include/firmware.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/include/firmware.h
new file mode 100644
index 000000000000..3a6ab117df5d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/include/firmware.h
@@ -0,0 +1,82 @@
+#ifndef __FIRMWARE_H__
+#define __FIRMWARE_H__
+
+#include <linux/miscdevice.h>
+#include <linux/platform_device.h>
+
+#include <asm/ioctl.h>
+
+/* Debug switch level */
+typedef enum {
+    FIRWMARE_VERBOSE,
+    FIRWMARE_WARN,
+    FIRWMARE_ERROR,
+    FIRWMARE_END,
+} firmware_debug_level_t;
+
+#define FIRMWARE_DRIVER_DEBUG_VERBOSE(fmt, args...) do { \
+    if ((g_firmware_driver_debug) & (1U << FIRWMARE_VERBOSE)) { \
+        printk(KERN_INFO "[FIRMWARW_DRIVER_CPLD][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define FIRMWARE_DRIVER_DEBUG_ERROR(fmt, args...) do { \
+    if ((g_firmware_driver_debug) & (1U << FIRWMARE_ERROR)) { \
+        printk(KERN_ERR "[FIRMWARW_DRIVER_CPLD][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define FIRMWARE_NAME_LEN      48
+
+#define FIRMWARE_FAILED              (-1)
+#define FIRMWARE_SUCCESS             0
+
+/* ioctl publi command, the same as "firmware_upgrade\include\firmware_app.h" */
+#define FIRMWARE_COMMON_TYPE 'C'
+#define FIRMWARE_GET_CHIPNAME            _IOR(FIRMWARE_COMMON_TYPE, 0, char)    /* get the chip name */
+#define FIRMWARE_GET_VERSION             _IOR(FIRMWARE_COMMON_TYPE, 2, int)     /* get version */
+
+/* firmware cpld driver ioctl command, the same as "firmware_upgrade\include\firmware_app.h" */
+#define FIRMWARE_TYPE 'J'
+#define FIRMWARE_PROGRAM                 _IOW(FIRMWARE_TYPE, 1, char)    /* firmware upgrade ISC */
+#define FIRMWARE_READ_CHIP               _IOR(FIRMWARE_TYPE, 5, int)     /* read the contents of the chip */
+#define FIRMWARE_PROGRAM_JBI             _IOW(FIRMWARE_TYPE, 6, char)    /* firmware upgrade JBI */
+
+typedef struct cmd_info_s {
+    uint32_t size;
+    void __user *data;
+} cmd_info_t;
+
+typedef struct firmware_device_s {
+    struct list_head list;             /* device list */
+    uint32_t chain;                    /* chain number */
+    char name[FIRMWARE_NAME_LEN];      /* name */
+    struct miscdevice dev;             /* device */
+    void *priv;                        /* private data */
+} firmware_device_t;
+
+typedef struct firmware_driver_s {
+    struct list_head list;             /* list */
+    char name[FIRMWARE_NAME_LEN];      /* name */
+    struct platform_driver *drv;       /* driver */
+    void *priv;                        /* private data */
+} firmware_driver_t;
+
+extern int g_firmware_driver_debug;
+
+/* Get device information based on minor */
+extern firmware_device_t *firmware_get_device_by_minor(int minor);
+/* Registere device */
+extern int firmware_device_register(firmware_device_t *fw_dev);
+/* Unregister device */
+extern void firmware_device_unregister(firmware_device_t *fw_dev);
+/* Registere driver */
+extern int firmware_driver_register(firmware_driver_t *fw_drv);
+/* Unregister driver */
+extern void firmware_driver_unregister(firmware_driver_t *fw_drv);
+/* CPLD upgrade initialized */
+extern int firmware_cpld_init(void);
+/* CPLD unload function */
+extern void firmware_cpld_exit(void);
+
+#endif /* end of __FIRMWARE_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/include/firmware_cpld.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/include/firmware_cpld.h
new file mode 100644
index 000000000000..ef69655a4b2e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/include/firmware_cpld.h
@@ -0,0 +1,64 @@
+#ifndef __FIRMWARE_CPLD_H__
+#define __FIRMWARE_CPLD_H__
+
+#define FIRMWARE_DEV_NAME_LEN     32
+#define FIRMWARE_MAX_CPLD_NUM     16
+#define FIRMWARE_TYPE_LEN         10
+#define FIRMWARE_EN_INFO_MAX      16
+#define FIRMWARE_EN_INFO_BUF      128
+
+typedef struct firmware_gpio_jtag_en_s {
+    uint32_t en_gpio;                                               /* GPIO enable pin */
+    uint32_t en_level;                                              /* GPIO enable level */
+    int flag;                                                       /* init flag; 1-init 0-not init */
+} firmware_gpio_jtag_en_t;
+
+typedef struct firmware_cpld_s {
+    char devname[FIRMWARE_DEV_NAME_LEN];                        /* Device name */
+    char type[FIRMWARE_TYPE_LEN];                               /* interface type */
+    uint32_t tdi;                                               /* TDI signal corresponding to GPIO pin information */
+    uint32_t tck;                                               /* TCK signal corresponding to GPIO pin information */
+    uint32_t tms;                                               /* TMS signal corresponding to GPIO pin information */
+    uint32_t tdo;                                               /* TDO signal corresponding to GPIO pin information */
+    uint32_t chain;                                             /* chain num */
+    uint32_t chip_index;                                        /* chip index */
+    uint32_t tck_delay;                                         /* Delay time */
+    uint32_t gpio_en_info_num;                                  /* GPIO Enable Number */
+    firmware_gpio_jtag_en_t gpio_en_info[FIRMWARE_EN_INFO_MAX]; /* GPIO Enable Information */
+} firmware_cpld_t;
+
+typedef struct firmware_cpld_function_s{
+    int (*pull_tdi_up)(void);                          /* TDI pull-up */
+    int (*pull_tdi_down)(void);                        /* TDI pull-down */
+    int (*pull_tck_up)(void);                          /* TCK pull-up */
+    int (*pull_tck_down)(void);                        /* TCK pull-down */
+    int (*pull_tms_up)(void);                          /* TMS pull-up */
+    int (*pull_tms_down)(void);                        /* TCK pull-down */
+    int (*read_tdo)(void);                             /* Read TDO */
+    int (*init_cpld)(void);                            /* CPLD upgrade initializes the operation */
+    int (*init_chip)(int chain);                       /* chip initializes the operation */
+    int (*finish_chip)(int chain);                     /* chip completes the operation*/
+    int (*finish_cpld)(void);                          /* CPLD upgrade completes the operation */
+    int (*get_version)(int chain, char *ver, int len); /* get version */
+}firmware_cpld_function_t;
+
+/* get chip name */
+extern int fmw_cpld_upg_get_chip_name(int chain, firmware_cpld_t *cpld, char *info, int len);
+/* ISC firmware upgrad */
+extern int fmw_cpld_upg_program(int chain, firmware_cpld_t *cpld, char *info, int len);
+/* get version */
+extern int fmw_cpld_upg_get_version(int chain, firmware_cpld_t *cpld, char *info, int len);
+/* Read the contents of Chip */
+extern int fmw_cpld_upg_get_chip_info(int chain, firmware_cpld_t *cpld, void *info, int len);
+/* operate TDI */
+extern int fwm_cpld_tdi_op(int value);
+/* operate TCK */
+extern int fwm_cpld_tck_op(int value);
+/* operate TMS */
+extern int fwm_cpld_tms_op(int value);
+/* operate TDO */
+extern int fwm_cpld_tdo_op(void);
+/* JBI firmware upgrad */
+extern int fmw_cpld_upg_program_jbi(int chain, firmware_cpld_t *cpld, char *info, int len);
+
+#endif /* __FIRMWARE_CPLD_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/include/jbi.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/include/jbi.h
new file mode 100644
index 000000000000..865c8d352174
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/include/jbi.h
@@ -0,0 +1,15 @@
+#ifndef __JBI_H__
+#define __JBI_H__
+
+#include <linux/types.h>
+
+/* JTAG operation interface*/
+extern int jbi_jtag_io_(int tms, int tdi, int read_tdo);
+/* delay function */
+extern void jbi_jtag_udelay(unsigned long us);
+/* Debug switch */
+extern int jbi_debug(int level);
+/* JBI upgrade function */
+extern int jbi_main(unsigned char *addr, unsigned long size, int argc, char * const argv[]);
+
+#endif /* __JBI_JTAG_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbicomp.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbicomp.c
new file mode 100644
index 000000000000..064d0ae50ec4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbicomp.c
@@ -0,0 +1,438 @@
+/****************************************************************************/
+/*                                                                          */
+/*  Module:         jbicomp.c                                               */
+/*                                                                          */
+/*                  Copyright (C) Altera Corporation 1997-2001              */
+/*                                                                          */
+/*  Description:    Contains the code for compressing and uncompressing     */
+/*                  Boolean array data.                                     */
+/*                                                                          */
+/*                  This algorithm works by searching previous bytes in the */
+/*                  data that match the current data. If a match is found,  */
+/*                  then the offset and length of the matching data can     */
+/*                  replace the actual data in the output.                  */
+/*                                                                          */
+/*  Revisions:      2.2  fixed /W4 warnings                                 */
+/*                                                                          */
+/****************************************************************************/
+
+#include "jbiport.h"
+#include "jbiexprt.h"
+#include "jbicomp.h"
+#include "jbistub.h"
+
+#define SHORT_BITS          16
+#define CHAR_BITS           8
+#define DATA_BLOB_LENGTH    3
+#define MATCH_DATA_LENGTH   8192
+#define JBI_ACA_REQUEST_SIZE 1024
+#define JBI_ACA_BUFFER_SIZE (MATCH_DATA_LENGTH + JBI_ACA_REQUEST_SIZE)
+
+unsigned long jbi_in_length = 0L;
+unsigned long jbi_in_index = 0L;    /* byte index into compressed array */
+unsigned int jbi_bits_avail = CHAR_BITS;
+
+#if PORT == DOS
+int jbi_current_variable_id = -1;
+int jbi_current_page = -1;
+int jbi_version = 0;
+unsigned long jbi_out_length = 0L;
+unsigned int jbi_out_index = 0; /* byte index into jbi_aca_out_buffer[] */
+unsigned long jbi_aca_in_offset = 0L;
+unsigned char jbi_aca_out_buffer[JBI_ACA_BUFFER_SIZE];
+#endif
+
+/****************************************************************************/
+/*                                                                          */
+/*  The following functions implement incremental decompression of Boolean  */
+/*  array data, using a small memory window.                                */
+/*                                                                          */
+/*  This algorithm works by searching previous bytes in the data that match */
+/*  the current data. If a match is found, then the offset and length of    */
+/*  the matching data can replace the actual data in the output.            */
+/*                                                                          */
+/*  Memory usage is reduced by maintaining a "window" buffer which contains */
+/*  the uncompressed data for one 8K page, plus some extra amount specified */
+/*  by JBI_ACA_REQUEST_SIZE.  The function jbi_uncompress_page() is used to */
+/*  request a subrange of the uncompressed data, starting at a particular   */
+/*  bit position and extending a maximum of JBI_ACA_REQUEST_SIZE bytes.     */
+/*                                                                          */
+/****************************************************************************/
+
+/****************************************************************************/
+/*                                                                          */
+
+unsigned int jbi_bits_required(unsigned int n)
+
+/*                                                                          */
+/*  Description:    Calculate the minimum number of bits required to        */
+/*                  represent n.                                            */
+/*                                                                          */
+/*  Returns:        Number of bits.                                         */
+/*                                                                          */
+/****************************************************************************/
+{
+    unsigned int result = SHORT_BITS;
+
+    if (n == 0)
+    {
+        result = 1;
+    }
+    else
+    {
+        /* Look for the highest non-zero bit position */
+        while ((n & (1 << (SHORT_BITS - 1))) == 0)
+        {
+            n <<= 1;
+            --result;
+        }
+    }
+
+    return (result);
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+unsigned int jbi_read_packed
+(
+#if PORT!=DOS
+    unsigned char *buffer,
+#endif
+    unsigned int bits
+)
+
+/*                                                                          */
+/*  Description:    Read the next value from the input array "buffer".      */
+/*                  Read only "bits" bits from the array. The amount of     */
+/*                  bits that have already been read from "buffer" is       */
+/*                  stored internally to this function.                     */
+/*                                                                          */
+/*  Returns:        Up to 16 bit value. -1 if buffer overrun.               */
+/*                                                                          */
+/****************************************************************************/
+{
+    unsigned int result = 0;
+    unsigned int shift = 0;
+    unsigned int databyte = 0;
+
+    while (bits > 0)
+    {
+#if PORT==DOS
+        databyte = GET_BYTE(jbi_aca_in_offset + jbi_in_index);
+#else
+        databyte = buffer[jbi_in_index];
+#endif
+        result |= (((databyte >> (CHAR_BITS - jbi_bits_avail))
+            & (0xFF >> (CHAR_BITS - jbi_bits_avail))) << shift);
+
+        if (bits <= jbi_bits_avail)
+        {
+            result &= (0xFFFF >> (SHORT_BITS - (bits + shift)));
+            jbi_bits_avail -= bits;
+            bits = 0;
+        }
+        else
+        {
+            ++jbi_in_index;
+            shift += jbi_bits_avail;
+            bits -= jbi_bits_avail;
+            jbi_bits_avail = CHAR_BITS;
+        }
+    }
+
+    return (result);
+}
+
+#if PORT==DOS
+
+/****************************************************************************/
+/*                                                                          */
+
+void jbi_uncompress_next_page(int version)
+
+/*                                                                          */
+/*  Description:    Uncompresses one page of compressed data, using         */
+/*                  data page as reference for repeated sections.           */
+/*                  Overwrites previous page of data in buffer.             */
+/*                                                                          */
+/*  Returns:        TRUE for success, FALSE if error encountered            */
+/*                                                                          */
+/****************************************************************************/
+{
+    unsigned int i, j, offset, length;
+    unsigned int end_index;
+    unsigned long tmp_in_index = jbi_in_index;
+    unsigned int tmp_out_index = jbi_out_index;
+    unsigned int tmp_bits_avail = jbi_bits_avail;
+    unsigned int prev[3];
+    unsigned long long_end;
+    unsigned int match_data_length = MATCH_DATA_LENGTH;
+
+    if (version > 0) --match_data_length;
+
+    if (jbi_current_page < 0)
+    {
+        /* this is the first page of the array */
+        jbi_current_page = 0;
+        jbi_in_index = 4;   /* skip over length field */
+        jbi_out_index = 0;
+        end_index = (jbi_out_length < JBI_ACA_BUFFER_SIZE) ?
+            (unsigned int) jbi_out_length : JBI_ACA_BUFFER_SIZE;
+    }
+    else
+    {
+        /* this is not the first page */
+        ++jbi_current_page;
+        jbi_out_index -= MATCH_DATA_LENGTH;
+        long_end = jbi_out_length -
+            ((long) jbi_current_page * (long) MATCH_DATA_LENGTH);
+        end_index = (long_end < JBI_ACA_BUFFER_SIZE) ?
+            (unsigned int) long_end : JBI_ACA_BUFFER_SIZE;
+
+        /* copy extra data from end of circular buffer to beginning */
+        for (i = 0; i < jbi_out_index; ++i)
+        {
+            jbi_aca_out_buffer[i] = jbi_aca_out_buffer[i + MATCH_DATA_LENGTH];
+        }
+    }
+
+    while (jbi_out_index < end_index)
+    {
+        /* save state so we can undo the last packet when we reach the end */
+        tmp_in_index = jbi_in_index;
+        tmp_out_index = jbi_out_index;
+        tmp_bits_avail = jbi_bits_avail;
+
+        /* A 0 bit indicates literal data. */
+        if (jbi_read_packed(1) == 0)
+        {
+            for (i = 0; i < DATA_BLOB_LENGTH; ++i)
+            {
+                if (jbi_out_index < end_index)
+                {
+                    if (version == 0)
+                    {
+                        prev[i] = jbi_aca_out_buffer[jbi_out_index] & 0xff;
+                    }
+                    jbi_aca_out_buffer[jbi_out_index++] =
+                        (unsigned char) jbi_read_packed(CHAR_BITS);
+                }
+            }
+        }
+        else
+        {
+            /* A 1 bit indicates offset/length to follow. */
+            offset = jbi_read_packed(jbi_bits_required(
+                (jbi_current_page > 0) ? match_data_length :
+                (jbi_out_index > match_data_length ? match_data_length :
+                jbi_out_index)));
+            length = jbi_read_packed(CHAR_BITS);
+
+            if ((version == 0) && (offset == match_data_length + 3))
+            {
+                jbi_aca_out_buffer[jbi_out_index++] = (unsigned char) prev[0];
+                jbi_aca_out_buffer[jbi_out_index++] = (unsigned char) prev[1];
+                jbi_aca_out_buffer[jbi_out_index++] = (unsigned char) prev[2];
+                length -= 3;
+            }
+
+            for (i = 0; i < length; ++i)
+            {
+                if (jbi_out_index < end_index)
+                {
+                    if (offset > jbi_out_index)
+                    {
+                        j = jbi_out_index + MATCH_DATA_LENGTH - offset;
+                    }
+                    else j = jbi_out_index - offset;
+                    jbi_aca_out_buffer[jbi_out_index] = jbi_aca_out_buffer[j];
+                    ++jbi_out_index;
+                }
+            }
+
+            if (version == 0)
+            {
+                prev[0] = jbi_aca_out_buffer[jbi_out_index - 3] & 0xff;
+                prev[1] = jbi_aca_out_buffer[jbi_out_index - 2] & 0xff;
+                prev[2] = jbi_aca_out_buffer[jbi_out_index - 1] & 0xff;
+            }
+        }
+    }
+
+    /* restore the state before the previous packet */
+    jbi_in_index = tmp_in_index;
+    jbi_out_index = tmp_out_index;
+    jbi_bits_avail = tmp_bits_avail;
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+void jbi_uncompress_page
+(
+    int variable_id,
+    int page,
+    int version
+)
+
+/*                                                                          */
+/*  Description:    Uncompress requested page of variable data.  Stores     */
+/*                  uncompressed data in jbi_aca_out_buffer[].              */
+/*                                                                          */
+/*  Returns:        TRUE if successful, otherwise FALSE if:                 */
+/*                      1) variable is not a compressed array               */
+/*                      2) compressed data is illegal or corrupted          */
+/*                      3) requested page is beyond the end of the array    */
+/*                      4) internal error in the code                       */
+/*                                                                          */
+/****************************************************************************/
+{
+    unsigned long symbol_table;
+    unsigned long data_section;
+    unsigned long offset;
+    unsigned long value;
+    int delta = version * 2;
+
+    if (variable_id != jbi_current_variable_id)
+    {
+        /* initialize to uncompress the desired variable */
+        symbol_table = GET_DWORD(16 + (version * 8));
+        data_section = GET_DWORD(20 + (version * 8));
+        offset = symbol_table + ((11 + delta) * variable_id);
+        value = GET_DWORD(offset + 3 + delta);
+        jbi_current_variable_id = variable_id;
+        jbi_current_page = -1;
+        jbi_bits_avail = CHAR_BITS;
+        jbi_in_length = GET_DWORD(offset + 7 + delta);
+        jbi_out_length =
+            (((unsigned long) GET_BYTE(data_section + value)) |
+            (((unsigned long) GET_BYTE(data_section + value + 1)) << 8) |
+            (((unsigned long) GET_BYTE(data_section + value + 2)) << 16) |
+            (((unsigned long) GET_BYTE(data_section + value + 3)) << 24));
+        jbi_in_index = 4;   /* skip over length field */
+        jbi_out_index = 0;
+        jbi_aca_in_offset = data_section + value;
+    }
+
+    /* to look back at an earlier page, start over at the beginning */
+    if (page < jbi_current_page)
+    {
+        jbi_current_page = -1;
+        jbi_in_index = 4;   /* skip over length field */
+        jbi_bits_avail = CHAR_BITS;
+    }
+
+    /* uncompress sequentially up to the desired page */
+    while (page > jbi_current_page)
+    {
+        jbi_uncompress_next_page(version);
+    }
+}
+
+#else
+
+/****************************************************************************/
+/*                                                                          */
+
+unsigned long jbi_uncompress
+(
+    unsigned char *in,
+    unsigned long in_length,
+    unsigned char *out,
+    unsigned long out_length,
+    int version
+)
+
+/*                                                                          */
+/*  Description:    Uncompress data in "in" and write result to "out".      */
+/*                                                                          */
+/*  Returns:        Length of uncompressed data. -1 if:                     */
+/*                      1) out_length is too small                          */
+/*                      2) Internal error in the code                       */
+/*                      3) in doesn't contain ACA compressed data.          */
+/*                                                                          */
+/****************************************************************************/
+{
+#ifdef CONFIG_64BIT
+    unsigned int data_length = 0;
+#else
+    unsigned long data_length = 0L;
+#endif
+    unsigned long i, j;
+    unsigned int offset, length;
+    unsigned int match_data_length = MATCH_DATA_LENGTH;
+
+    if (version > 0) --match_data_length;
+
+    jbi_in_length = in_length;
+    jbi_bits_avail = CHAR_BITS;
+    jbi_in_index = 0L;
+    for (i = 0; i < out_length; ++i) out[i] = 0;
+
+    /* Read number of bytes in data. */
+#ifdef CONFIG_64BIT
+    for (i = 0; i < sizeof(unsigned int); ++i)
+    {
+        data_length = data_length | ((unsigned int)
+            jbi_read_packed(in, CHAR_BITS) << (i * CHAR_BITS));
+    }
+#else
+    for (i = 0; i < sizeof (in_length); ++i)
+    {
+        data_length = data_length | ((unsigned long)
+            jbi_read_packed(in, CHAR_BITS) << (i * CHAR_BITS));
+    }
+#endif
+
+    if (data_length > out_length)
+    {
+#ifdef CONFIG_64BIT
+        jbi_dbg(DEBUG_ERR, "data_length(0x%x,0x%lx)\n",
+            data_length, out_length);
+        data_length = 0;
+#else
+        jbi_dbg(DEBUG_ERR, "data_length(0x%lx,0x%lx)\n",
+            data_length, out_length);
+        data_length = 0L;
+#endif
+    }
+    else
+    {
+        i = 0;
+        while (i < data_length)
+        {
+            /* A 0 bit indicates literal data. */
+            if (jbi_read_packed(in, 1) == 0)
+            {
+                for (j = 0; j < DATA_BLOB_LENGTH; ++j)
+                {
+                    if (i < data_length)
+                    {
+                        out[i] = (unsigned char) jbi_read_packed(in, CHAR_BITS);
+                        i++;
+                    }
+                }
+            }
+            else
+            {
+                /* A 1 bit indicates offset/length to follow. */
+                offset = jbi_read_packed(in, jbi_bits_required((short) (i > match_data_length ? match_data_length : i)));
+                length = jbi_read_packed(in, CHAR_BITS);
+
+                for (j = 0; j < length; ++j)
+                {
+                    if (i < data_length)
+                    {
+                        out[i] = out[i - offset];
+                        i++;
+                    }
+                }
+            }
+        }
+    }
+
+    return (data_length);
+}
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbicomp.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbicomp.h
new file mode 100644
index 000000000000..4dacdcd5d773
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbicomp.h
@@ -0,0 +1,37 @@
+/****************************************************************************/
+/*                                                                          */
+/*  Module:         jbicomp.h                                               */
+/*                                                                          */
+/*                  Copyright (C) Altera Corporation 1997-2001              */
+/*                                                                          */
+/*  Description:    Contains the function prototypes for compressing        */
+/*                  and uncompressing Boolean array data.                   */
+/*                                                                          */
+/****************************************************************************/
+
+#ifndef INC_JBICOMP_H
+#define INC_JBICOMP_H
+
+#if PORT==DOS
+
+void jbi_uncompress_page
+(
+    int variable_id,
+    int page,
+    int version
+);
+
+#else
+
+unsigned long jbi_uncompress
+(
+    unsigned char *in,
+    unsigned long in_length,
+    unsigned char *out,
+    unsigned long out_length,
+    int version
+);
+
+#endif /* PORT==DOS */
+
+#endif /* INC_JBICOMP_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbiexprt.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbiexprt.h
new file mode 100644
index 000000000000..ef4699dd6db3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbiexprt.h
@@ -0,0 +1,224 @@
+/****************************************************************************/
+/*                                                                          */
+/*  Module:         jbiexprt.h                                              */
+/*                                                                          */
+/*                  Copyright (C) Altera Corporation 1998-2001              */
+/*                                                                          */
+/*  Description:    Jam STAPL ByteCode Player Export Header File            */
+/*                                                                          */
+/*  Revisions:                                                              */
+/*                                                                          */
+/****************************************************************************/
+
+#ifndef INC_JBIEXPRT_H
+#define INC_JBIEXPRT_H
+
+/****************************************************************************/
+/*                                                                          */
+/*  Return codes from most JBI functions                                    */
+/*                                                                          */
+/****************************************************************************/
+
+#define JBI_RETURN_TYPE int
+
+#define JBIC_SUCCESS            0
+#define JBIC_OUT_OF_MEMORY      1
+#define JBIC_IO_ERROR           2
+/* #define JAMC_SYNTAX_ERROR       3 */
+#define JBIC_UNEXPECTED_END     4
+#define JBIC_UNDEFINED_SYMBOL   5
+/* #define JAMC_REDEFINED_SYMBOL   6 */
+#define JBIC_INTEGER_OVERFLOW   7
+#define JBIC_DIVIDE_BY_ZERO     8
+#define JBIC_CRC_ERROR          9
+#define JBIC_INTERNAL_ERROR    10
+#define JBIC_BOUNDS_ERROR      11
+/* #define JAMC_TYPE_MISMATCH     12 */
+/* #define JAMC_ASSIGN_TO_CONST   13 */
+/* #define JAMC_NEXT_UNEXPECTED   14 */
+/* #define JAMC_POP_UNEXPECTED    15 */
+/* #define JAMC_RETURN_UNEXPECTED 16 */
+/* #define JAMC_ILLEGAL_SYMBOL    17 */
+#define JBIC_VECTOR_MAP_FAILED 18
+#define JBIC_USER_ABORT        19
+#define JBIC_STACK_OVERFLOW    20
+#define JBIC_ILLEGAL_OPCODE    21
+/* #define JAMC_PHASE_ERROR       22 */
+/* #define JAMC_SCOPE_ERROR       23 */
+#define JBIC_ACTION_NOT_FOUND  24
+
+/****************************************************************************/
+/*                                                                          */
+/*  Macro Definitions                                                       */
+/*                                                                          */
+/****************************************************************************/
+
+/*
+*   For DOS port, program data is stored in a set of 16K pages, accessed
+*   through a pointer table.  For 32-bit version, the buffer is continuous.
+*   The macro GET_BYTE gets a single byte for either case.
+*/
+#if PORT==DOS
+#define PROGRAM_PTR unsigned char **
+#else
+#define PROGRAM_PTR unsigned char *
+#endif
+
+#if PORT==DOS
+#define GET_BYTE(x) (jbi_program[(x) >> 14L][(x) & 0x3fffL])
+#else
+#define GET_BYTE(x) (program[x])
+#endif
+
+#define GET_WORD(x) \
+    (((((unsigned short) GET_BYTE(x)) << 8) & 0xFF00) | \
+    (((unsigned short) GET_BYTE((x)+1)) & 0x00FF))
+
+#define GET_DWORD(x) \
+    (((((unsigned long) GET_BYTE(x)) << 24L) & 0xFF000000L) | \
+    ((((unsigned long) GET_BYTE((x)+1)) << 16L) & 0x00FF0000L) | \
+    ((((unsigned long) GET_BYTE((x)+2)) << 8L) & 0x0000FF00L) | \
+    (((unsigned long) GET_BYTE((x)+3)) & 0x000000FFL))
+
+/****************************************************************************/
+/*                                                                          */
+/*  Structured Types                                                        */
+/*                                                                          */
+/****************************************************************************/
+
+typedef struct JBI_PROCINFO_STRUCT
+{
+    char *name;
+    unsigned char attributes;
+    struct JBI_PROCINFO_STRUCT *next;
+}
+JBI_PROCINFO;
+
+/****************************************************************************/
+/*                                                                          */
+/*  Global Data Prototypes                                                  */
+/*                                                                          */
+/****************************************************************************/
+
+#if PORT==DOS
+extern unsigned char jbi_aca_out_buffer[8192 + 1024];
+#endif
+
+extern PROGRAM_PTR jbi_program;
+
+extern char *jbi_workspace;
+
+extern long jbi_workspace_size;
+
+/****************************************************************************/
+/*                                                                          */
+/*  Function Prototypes                                                     */
+/*                                                                          */
+/****************************************************************************/
+
+JBI_RETURN_TYPE jbi_execute
+(
+    PROGRAM_PTR program,
+    long program_size,
+    char *workspace,
+    long workspace_size,
+    char *action,
+    char **init_list,
+    int reset_jtag,
+    long *error_address,
+    int *exit_code,
+    int *format_version
+);
+
+JBI_RETURN_TYPE jbi_get_note
+(
+    PROGRAM_PTR program,
+    long program_size,
+    long *offset,
+    char *key,
+    char *value,
+    int length
+);
+
+JBI_RETURN_TYPE jbi_check_crc
+(
+    PROGRAM_PTR program,
+    long program_size,
+    unsigned short *expected_crc,
+    unsigned short *actual_crc
+);
+
+JBI_RETURN_TYPE jbi_get_file_info
+(
+    PROGRAM_PTR program,
+    long program_size,
+    int *format_version,
+    int *action_count,
+    int *procedure_count
+);
+
+JBI_RETURN_TYPE jbi_get_action_info
+(
+    PROGRAM_PTR program,
+    long program_size,
+    int index,
+    char **name,
+    char **description,
+    JBI_PROCINFO **procedure_list
+);
+
+int jbi_jtag_io
+(
+    int tms,
+    int tdi,
+    int read_tdo
+);
+
+void jbi_message
+(
+    char *message_text
+);
+
+void jbi_export_integer
+(
+    char *key,
+    long value
+);
+
+void jbi_export_boolean_array
+(
+    char *key,
+    unsigned char *data,
+    long count
+);
+
+void jbi_delay
+(
+    long microseconds
+);
+
+int jbi_vector_map
+(
+    int signal_count,
+    char **signals
+);
+
+int jbi_vector_io
+(
+    int signal_count,
+    long *dir_vect,
+    long *data_vect,
+    long *capture_vect
+);
+
+void *jbi_malloc
+(
+    unsigned int size
+);
+
+void jbi_free
+(
+    void *ptr
+);
+
+#endif /* INC_JBIEXPRT_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbijtag.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbijtag.c
new file mode 100644
index 000000000000..f013100eecb8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbijtag.c
@@ -0,0 +1,1679 @@
+/****************************************************************************/
+/*                                                                          */
+/*  Module:         jbijtag.c                                               */
+/*                                                                          */
+/*                  Copyright (C) Altera Corporation 1998-2001              */
+/*                                                                          */
+/*  Description:    Contains JTAG interface functions                       */
+/*                                                                          */
+/*  Revisions:      2.2  updated state transition paths                     */
+/*                  2.0  added multi-page scan code for 16-bit PORT         */
+/*                                                                          */
+/****************************************************************************/
+
+#include "jbiport.h"
+#include "jbiexprt.h"
+#include "jbicomp.h"
+#include "jbijtag.h"
+
+#define NULL 0
+
+char *jbi_workspace = NULL;
+long jbi_workspace_size = 0L;
+
+/****************************************************************************/
+/*                                                                          */
+/*  Enumerated Types                                                        */
+/*                                                                          */
+/****************************************************************************/
+
+/* maximum JTAG IR and DR lengths (in bits) */
+#define JBIC_MAX_JTAG_IR_PREAMBLE   256
+#define JBIC_MAX_JTAG_IR_POSTAMBLE  256
+#define JBIC_MAX_JTAG_IR_LENGTH     512
+#define JBIC_MAX_JTAG_DR_PREAMBLE  1024
+#define JBIC_MAX_JTAG_DR_POSTAMBLE 1024
+#define JBIC_MAX_JTAG_DR_LENGTH    2048
+
+/*
+*   Global variable to store the current JTAG state
+*/
+JBIE_JTAG_STATE jbi_jtag_state = JBI_ILLEGAL_JTAG_STATE;
+
+/*
+*   Store current stop-state for DR and IR scan commands
+*/
+JBIE_JTAG_STATE jbi_drstop_state = IDLE;
+JBIE_JTAG_STATE jbi_irstop_state = IDLE;
+
+/*
+*   Store current padding values
+*/
+unsigned int jbi_dr_preamble  = 0;
+unsigned int jbi_dr_postamble = 0;
+unsigned int jbi_ir_preamble  = 0;
+unsigned int jbi_ir_postamble = 0;
+unsigned int jbi_dr_length    = 0;
+unsigned int jbi_ir_length    = 0;
+unsigned char *jbi_dr_preamble_data  = NULL;
+unsigned char *jbi_dr_postamble_data = NULL;
+unsigned char *jbi_ir_preamble_data  = NULL;
+unsigned char *jbi_ir_postamble_data = NULL;
+unsigned char *jbi_dr_buffer         = NULL;
+unsigned char *jbi_ir_buffer         = NULL;
+
+/*
+*   This structure shows, for each JTAG state, which state is reached after
+*   a single TCK clock cycle with TMS high or TMS low, respectively.  This
+*   describes all possible state transitions in the JTAG state machine.
+*/
+struct JBIS_JTAG_MACHINE
+{
+    JBIE_JTAG_STATE tms_high;
+    JBIE_JTAG_STATE tms_low;
+} jbi_jtag_state_transitions[] =
+{
+/* RESET     */ { RESET,    IDLE },
+/* IDLE      */ { DRSELECT, IDLE },
+/* DRSELECT  */ { IRSELECT, DRCAPTURE },
+/* DRCAPTURE */ { DREXIT1,  DRSHIFT },
+/* DRSHIFT   */ { DREXIT1,  DRSHIFT },
+/* DREXIT1   */ { DRUPDATE, DRPAUSE },
+/* DRPAUSE   */ { DREXIT2,  DRPAUSE },
+/* DREXIT2   */ { DRUPDATE, DRSHIFT },
+/* DRUPDATE  */ { DRSELECT, IDLE },
+/* IRSELECT  */ { RESET,    IRCAPTURE },
+/* IRCAPTURE */ { IREXIT1,  IRSHIFT },
+/* IRSHIFT   */ { IREXIT1,  IRSHIFT },
+/* IREXIT1   */ { IRUPDATE, IRPAUSE },
+/* IRPAUSE   */ { IREXIT2,  IRPAUSE },
+/* IREXIT2   */ { IRUPDATE, IRSHIFT },
+/* IRUPDATE  */ { DRSELECT, IDLE }
+};
+
+/*
+*   This table contains the TMS value to be used to take the NEXT STEP on
+*   the path to the desired state.  The array index is the current state,
+*   and the bit position is the desired endstate.  To find out which state
+*   is used as the intermediate state, look up the TMS value in the
+*   jbi_jtag_state_transitions[] table.
+*/
+unsigned short jbi_jtag_path_map[16] =
+{
+/*    RST     RTI    SDRS     CDR     SDR    E1DR     PDR    E2DR       */
+    0x0001, 0xFFFD, 0xFE01, 0xFFE7, 0xFFEF, 0xFF0F, 0xFFBF, 0xFFFF,
+/*    UDR    SIRS     CIR     SIR    E1IR     PIR    E2IR     UIR       */
+    0xFEFD, 0x0001, 0xF3FF, 0xF7FF, 0x87FF, 0xDFFF, 0xFFFF, 0x7FFD
+};
+
+/*
+*   Flag bits for jbi_jtag_io() function
+*/
+#define TMS_HIGH   1
+#define TMS_LOW    0
+#define TDI_HIGH   1
+#define TDI_LOW    0
+#define READ_TDO   1
+#define IGNORE_TDO 0
+
+/****************************************************************************/
+/*                                                                          */
+
+JBI_RETURN_TYPE jbi_init_jtag()
+
+/*                                                                          */
+/****************************************************************************/
+{
+    /* initial JTAG state is unknown */
+    jbi_jtag_state = JBI_ILLEGAL_JTAG_STATE;
+
+    /* initialize global variables to default state */
+    jbi_drstop_state = IDLE;
+    jbi_irstop_state = IDLE;
+    jbi_dr_preamble  = 0;
+    jbi_dr_postamble = 0;
+    jbi_ir_preamble  = 0;
+    jbi_ir_postamble = 0;
+    jbi_dr_length    = 0;
+    jbi_ir_length    = 0;
+
+    if (jbi_workspace != NULL)
+    {
+        jbi_dr_preamble_data = (unsigned char *) jbi_workspace;
+        jbi_dr_postamble_data = &jbi_dr_preamble_data[JBIC_MAX_JTAG_DR_PREAMBLE / 8];
+        jbi_ir_preamble_data = &jbi_dr_postamble_data[JBIC_MAX_JTAG_DR_POSTAMBLE / 8];
+        jbi_ir_postamble_data = &jbi_ir_preamble_data[JBIC_MAX_JTAG_IR_PREAMBLE / 8];
+        jbi_dr_buffer = &jbi_ir_postamble_data[JBIC_MAX_JTAG_IR_POSTAMBLE / 8];
+        jbi_ir_buffer = &jbi_dr_buffer[JBIC_MAX_JTAG_DR_LENGTH / 8];
+    }
+    else
+    {
+        jbi_dr_preamble_data  = NULL;
+        jbi_dr_postamble_data = NULL;
+        jbi_ir_preamble_data  = NULL;
+        jbi_ir_postamble_data = NULL;
+        jbi_dr_buffer         = NULL;
+        jbi_ir_buffer         = NULL;
+    }
+
+    return (JBIC_SUCCESS);
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+JBI_RETURN_TYPE jbi_set_drstop_state
+(
+    JBIE_JTAG_STATE state
+)
+
+/*                                                                          */
+/****************************************************************************/
+{
+    jbi_drstop_state = state;
+
+    return (JBIC_SUCCESS);
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+JBI_RETURN_TYPE jbi_set_irstop_state
+(
+    JBIE_JTAG_STATE state
+)
+
+/*                                                                          */
+/****************************************************************************/
+{
+    jbi_irstop_state = state;
+
+    return (JBIC_SUCCESS);
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+JBI_RETURN_TYPE jbi_set_dr_preamble
+(
+    unsigned int count,
+    unsigned int start_index,
+    unsigned char *preamble_data
+)
+
+/*                                                                          */
+/****************************************************************************/
+{
+    JBI_RETURN_TYPE status = JBIC_SUCCESS;
+    unsigned int i;
+    unsigned int j;
+
+    if (jbi_workspace != NULL)
+    {
+        if (count > JBIC_MAX_JTAG_DR_PREAMBLE)
+        {
+            status = JBIC_OUT_OF_MEMORY;
+        }
+        else
+        {
+            jbi_dr_preamble = count;
+        }
+    }
+    else
+    {
+        if (count > jbi_dr_preamble)
+        {
+            jbi_free(jbi_dr_preamble_data);
+            jbi_dr_preamble_data = (unsigned char *) jbi_malloc((count + 7) >> 3);
+
+            if (jbi_dr_preamble_data == NULL)
+            {
+                status = JBIC_OUT_OF_MEMORY;
+            }
+            else
+            {
+                jbi_dr_preamble = count;
+            }
+        }
+        else
+        {
+            jbi_dr_preamble = count;
+        }
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        for (i = 0; i < count; ++i)
+        {
+            j = i + start_index;
+
+            if (preamble_data == NULL)
+            {
+                jbi_dr_preamble_data[i >> 3] |= (1 << (i & 7));
+            }
+            else
+            {
+                if (preamble_data[j >> 3] & (1 << (j & 7)))
+                {
+                    jbi_dr_preamble_data[i >> 3] |= (1 << (i & 7));
+                }
+                else
+                {
+                    jbi_dr_preamble_data[i >> 3] &=
+                        ~(unsigned int) (1 << (i & 7));
+                }
+            }
+        }
+    }
+
+    return (status);
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+JBI_RETURN_TYPE jbi_set_ir_preamble
+(
+    unsigned int count,
+    unsigned int start_index,
+    unsigned char *preamble_data
+)
+
+/*                                                                          */
+/****************************************************************************/
+{
+    JBI_RETURN_TYPE status = JBIC_SUCCESS;
+    unsigned int i;
+    unsigned int j;
+
+    if (jbi_workspace != NULL)
+    {
+        if (count > JBIC_MAX_JTAG_IR_PREAMBLE)
+        {
+            status = JBIC_OUT_OF_MEMORY;
+        }
+        else
+        {
+            jbi_ir_preamble = count;
+        }
+    }
+    else
+    {
+        if (count > jbi_ir_preamble)
+        {
+            jbi_free(jbi_ir_preamble_data);
+            jbi_ir_preamble_data = (unsigned char *) jbi_malloc((count + 7) >> 3);
+
+            if (jbi_ir_preamble_data == NULL)
+            {
+                status = JBIC_OUT_OF_MEMORY;
+            }
+            else
+            {
+                jbi_ir_preamble = count;
+            }
+        }
+        else
+        {
+            jbi_ir_preamble = count;
+        }
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        for (i = 0; i < count; ++i)
+        {
+            j = i + start_index;
+
+            if (preamble_data == NULL)
+            {
+                jbi_ir_preamble_data[i >> 3] |= (1 << (i & 7));
+            }
+            else
+            {
+                if (preamble_data[j >> 3] & (1 << (j & 7)))
+                {
+                    jbi_ir_preamble_data[i >> 3] |= (1 << (i & 7));
+                }
+                else
+                {
+                    jbi_ir_preamble_data[i >> 3] &=
+                        ~(unsigned int) (1 << (i & 7));
+                }
+            }
+        }
+    }
+
+    return (status);
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+JBI_RETURN_TYPE jbi_set_dr_postamble
+(
+    unsigned int count,
+    unsigned int start_index,
+    unsigned char *postamble_data
+)
+
+/*                                                                          */
+/****************************************************************************/
+{
+    JBI_RETURN_TYPE status = JBIC_SUCCESS;
+    unsigned int i;
+    unsigned int j;
+
+    if (jbi_workspace != NULL)
+    {
+        if (count > JBIC_MAX_JTAG_DR_POSTAMBLE)
+        {
+            status = JBIC_OUT_OF_MEMORY;
+        }
+        else
+        {
+            jbi_dr_postamble = count;
+        }
+    }
+    else
+    {
+        if (count > jbi_dr_postamble)
+        {
+            jbi_free(jbi_dr_postamble_data);
+            jbi_dr_postamble_data = (unsigned char *) jbi_malloc((count + 7) >> 3);
+
+            if (jbi_dr_postamble_data == NULL)
+            {
+                status = JBIC_OUT_OF_MEMORY;
+            }
+            else
+            {
+                jbi_dr_postamble = count;
+            }
+        }
+        else
+        {
+            jbi_dr_postamble = count;
+        }
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        for (i = 0; i < count; ++i)
+        {
+            j = i + start_index;
+
+            if (postamble_data == NULL)
+            {
+                jbi_dr_postamble_data[i >> 3] |= (1 << (i & 7));
+            }
+            else
+            {
+                if (postamble_data[j >> 3] & (1 << (j & 7)))
+                {
+                    jbi_dr_postamble_data[i >> 3] |= (1 << (i & 7));
+                }
+                else
+                {
+                    jbi_dr_postamble_data[i >> 3] &=
+                        ~(unsigned int) (1 << (i & 7));
+                }
+            }
+        }
+    }
+
+    return (status);
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+JBI_RETURN_TYPE jbi_set_ir_postamble
+(
+    unsigned int count,
+    unsigned int start_index,
+    unsigned char *postamble_data
+)
+
+/*                                                                          */
+/****************************************************************************/
+{
+    JBI_RETURN_TYPE status = JBIC_SUCCESS;
+    unsigned int i;
+    unsigned int j;
+
+    if (jbi_workspace != NULL)
+    {
+        if (count > JBIC_MAX_JTAG_IR_POSTAMBLE)
+        {
+            status = JBIC_OUT_OF_MEMORY;
+        }
+        else
+        {
+            jbi_ir_postamble = count;
+        }
+    }
+    else
+    {
+        if (count > jbi_ir_postamble)
+        {
+            jbi_free(jbi_ir_postamble_data);
+            jbi_ir_postamble_data = (unsigned char *) jbi_malloc((count + 7) >> 3);
+
+            if (jbi_ir_postamble_data == NULL)
+            {
+                status = JBIC_OUT_OF_MEMORY;
+            }
+            else
+            {
+                jbi_ir_postamble = count;
+            }
+        }
+        else
+        {
+            jbi_ir_postamble = count;
+        }
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        for (i = 0; i < count; ++i)
+        {
+            j = i + start_index;
+
+            if (postamble_data == NULL)
+            {
+                jbi_ir_postamble_data[i >> 3] |= (1 << (i & 7));
+            }
+            else
+            {
+                if (postamble_data[j >> 3] & (1 << (j & 7)))
+                {
+                    jbi_ir_postamble_data[i >> 3] |= (1 << (i & 7));
+                }
+                else
+                {
+                    jbi_ir_postamble_data[i >> 3] &=
+                        ~(unsigned int) (1 << (i & 7));
+                }
+            }
+        }
+    }
+
+    return (status);
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+void jbi_jtag_reset_idle(void)
+
+/*                                                                          */
+/****************************************************************************/
+{
+    int i;
+
+    /*
+    *   Go to Test Logic Reset (no matter what the starting state may be)
+    */
+    for (i = 0; i < 5; ++i)
+    {
+        jbi_jtag_io(TMS_HIGH, TDI_LOW, IGNORE_TDO);
+    }
+
+    /*
+    *   Now step to Run Test / Idle
+    */
+    jbi_jtag_io(TMS_LOW, TDI_LOW, IGNORE_TDO);
+
+    jbi_jtag_state = IDLE;
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+JBI_RETURN_TYPE jbi_goto_jtag_state
+(
+    JBIE_JTAG_STATE state
+)
+
+/*                                                                          */
+/****************************************************************************/
+{
+    int tms;
+    int count = 0;
+    JBI_RETURN_TYPE status = JBIC_SUCCESS;
+    unsigned int tmp_state;
+
+    if (jbi_jtag_state == JBI_ILLEGAL_JTAG_STATE)
+    {
+        /* initialize JTAG chain to known state */
+        jbi_jtag_reset_idle();
+    }
+
+    if (jbi_jtag_state == state)
+    {
+        /*
+        *   We are already in the desired state.  If it is a stable state,
+        *   loop here.  Otherwise do nothing (no clock cycles).
+        */
+        if ((state == IDLE) ||
+            (state == DRSHIFT) ||
+            (state == DRPAUSE) ||
+            (state == IRSHIFT) ||
+            (state == IRPAUSE))
+        {
+            jbi_jtag_io(TMS_LOW, TDI_LOW, IGNORE_TDO);
+        }
+        else if (state == RESET)
+        {
+            jbi_jtag_io(TMS_HIGH, TDI_LOW, IGNORE_TDO);
+        }
+    }
+    else
+    {
+        while ((jbi_jtag_state != state) && (count < 9))
+        {
+            /*
+            *   Get TMS value to take a step toward desired state
+            */
+           if (state < 0) {
+               tmp_state = 0;
+           } else {
+               tmp_state = state;
+           }
+            tms = (jbi_jtag_path_map[jbi_jtag_state] & (1 << tmp_state)) ?
+                TMS_HIGH : TMS_LOW;
+
+            /*
+            *   Take a step
+            */
+            jbi_jtag_io(tms, TDI_LOW, IGNORE_TDO);
+
+            if (tms)
+            {
+                jbi_jtag_state =
+                    jbi_jtag_state_transitions[jbi_jtag_state].tms_high;
+            }
+            else
+            {
+                jbi_jtag_state =
+                    jbi_jtag_state_transitions[jbi_jtag_state].tms_low;
+            }
+
+            ++count;
+        }
+    }
+
+    if (jbi_jtag_state != state)
+    {
+        status = JBIC_INTERNAL_ERROR;
+    }
+
+    return (status);
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+JBI_RETURN_TYPE jbi_do_wait_cycles
+(
+    long cycles,
+    JBIE_JTAG_STATE wait_state
+)
+
+/*                                                                          */
+/*  Description:    Causes JTAG hardware to loop in the specified stable    */
+/*                  state for the specified number of TCK clock cycles.     */
+/*                                                                          */
+/*  Returns:        JBIC_SUCCESS for success, else appropriate error code   */
+/*                                                                          */
+/****************************************************************************/
+{
+    int tms;
+    long count;
+    JBI_RETURN_TYPE status = JBIC_SUCCESS;
+
+    if (jbi_jtag_state != wait_state)
+    {
+        status = jbi_goto_jtag_state(wait_state);
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        /*
+        *   Set TMS high to loop in RESET state
+        *   Set TMS low to loop in any other stable state
+        */
+        tms = (wait_state == RESET) ? TMS_HIGH : TMS_LOW;
+
+        for (count = 0L; count < cycles; count++)
+        {
+            jbi_jtag_io(tms, TDI_LOW, IGNORE_TDO);
+        }
+    }
+
+    return (status);
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+JBI_RETURN_TYPE jbi_do_wait_microseconds
+(
+    long microseconds,
+    JBIE_JTAG_STATE wait_state
+)
+
+/*                                                                          */
+/*  Description:    Causes JTAG hardware to sit in the specified stable     */
+/*                  state for the specified duration of real time.  If      */
+/*                  no JTAG operations have been performed yet, then only   */
+/*                  a delay is performed.  This permits the WAIT USECS      */
+/*                  statement to be used in VECTOR programs without causing */
+/*                  any JTAG operations.                                    */
+/*                                                                          */
+/*  Returns:        JBIC_SUCCESS for success, else appropriate error code   */
+/*                                                                          */
+/****************************************************************************/
+{
+    JBI_RETURN_TYPE status = JBIC_SUCCESS;
+
+    if ((jbi_jtag_state != JBI_ILLEGAL_JTAG_STATE) &&
+        (jbi_jtag_state != wait_state))
+    {
+        status = jbi_goto_jtag_state(wait_state);
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        /*
+        *   Wait for specified time interval
+        */
+        jbi_delay(microseconds);
+    }
+
+    return (status);
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+void jbi_jtag_concatenate_data
+(
+    unsigned char *buffer,
+    unsigned char *preamble_data,
+    unsigned int preamble_count,
+    unsigned char *target_data,
+    unsigned long start_index,
+    unsigned int target_count,
+    unsigned char *postamble_data,
+    unsigned int postamble_count
+)
+
+/*                                                                          */
+/*  Description:    Copies preamble data, target data, and postamble data   */
+/*                  into one buffer for IR or DR scans.                     */
+/*                                                                          */
+/*  Returns:        nothing                                                 */
+/*                                                                          */
+/****************************************************************************/
+{
+    unsigned long i;
+    unsigned long j;
+    unsigned long k;
+
+    for (i = 0L; i < preamble_count; ++i)
+    {
+        if (preamble_data[i >> 3L] & (1L << (i & 7L)))
+        {
+            buffer[i >> 3L] |= (1L << (i & 7L));
+        }
+        else
+        {
+            buffer[i >> 3L] &= ~(unsigned int) (1L << (i & 7L));
+        }
+    }
+
+    j = start_index;
+    k = preamble_count + target_count;
+    for (; i < k; ++i, ++j)
+    {
+        if (target_data[j >> 3L] & (1L << (j & 7L)))
+        {
+            buffer[i >> 3L] |= (1L << (i & 7L));
+        }
+        else
+        {
+            buffer[i >> 3L] &= ~(unsigned int) (1L << (i & 7L));
+        }
+    }
+
+    j = 0L;
+    k = preamble_count + target_count + postamble_count;
+    for (; i < k; ++i, ++j)
+    {
+        if (postamble_data[j >> 3L] & (1L << (j & 7L)))
+        {
+            buffer[i >> 3L] |= (1L << (i & 7L));
+        }
+        else
+        {
+            buffer[i >> 3L] &= ~(unsigned int) (1L << (i & 7L));
+        }
+    }
+}
+
+int jbi_jtag_drscan
+(
+    int start_state,
+    int count,
+    unsigned char *tdi,
+    unsigned char *tdo
+)
+{
+    int i = 0;
+    int tdo_bit = 0;
+    int status = 1;
+
+    /*
+    *   First go to DRSHIFT state
+    */
+    switch (start_state)
+    {
+    case 0:                     /* IDLE */
+        jbi_jtag_io(1, 0, 0);   /* DRSELECT */
+        jbi_jtag_io(0, 0, 0);   /* DRCAPTURE */
+        jbi_jtag_io(0, 0, 0);   /* DRSHIFT */
+        break;
+
+    case 1:                     /* DRPAUSE */
+        jbi_jtag_io(1, 0, 0);   /* DREXIT2 */
+        jbi_jtag_io(1, 0, 0);   /* DRUPDATE */
+        jbi_jtag_io(1, 0, 0);   /* DRSELECT */
+        jbi_jtag_io(0, 0, 0);   /* DRCAPTURE */
+        jbi_jtag_io(0, 0, 0);   /* DRSHIFT */
+        break;
+
+    case 2:                     /* IRPAUSE */
+        jbi_jtag_io(1, 0, 0);   /* IREXIT2 */
+        jbi_jtag_io(1, 0, 0);   /* IRUPDATE */
+        jbi_jtag_io(1, 0, 0);   /* DRSELECT */
+        jbi_jtag_io(0, 0, 0);   /* DRCAPTURE */
+        jbi_jtag_io(0, 0, 0);   /* DRSHIFT */
+        break;
+
+    default:
+        status = 0;
+    }
+
+    if (status)
+    {
+        /* loop in the SHIFT-DR state */
+        for (i = 0; i < count; i++)
+        {
+            tdo_bit = jbi_jtag_io(
+                (i == count - 1),
+                tdi[i >> 3] & (1 << (i & 7)),
+                (tdo != NULL));
+
+            if (tdo != NULL)
+            {
+                if (tdo_bit)
+                {
+                    tdo[i >> 3] |= (1 << (i & 7));
+                }
+                else
+                {
+                    tdo[i >> 3] &= ~(unsigned int) (1 << (i & 7));
+                }
+            }
+        }
+
+        jbi_jtag_io(0, 0, 0);   /* DRPAUSE */
+    }
+
+    return (status);
+}
+
+int jbi_jtag_irscan
+(
+    int start_state,
+    int count,
+    unsigned char *tdi,
+    unsigned char *tdo
+)
+{
+    int i = 0;
+    int tdo_bit = 0;
+    int status = 1;
+
+    /*
+    *   First go to IRSHIFT state
+    */
+    switch (start_state)
+    {
+    case 0:                     /* IDLE */
+        jbi_jtag_io(1, 0, 0);   /* DRSELECT */
+        jbi_jtag_io(1, 0, 0);   /* IRSELECT */
+        jbi_jtag_io(0, 0, 0);   /* IRCAPTURE */
+        jbi_jtag_io(0, 0, 0);   /* IRSHIFT */
+        break;
+
+    case 1:                     /* DRPAUSE */
+        jbi_jtag_io(1, 0, 0);   /* DREXIT2 */
+        jbi_jtag_io(1, 0, 0);   /* DRUPDATE */
+        jbi_jtag_io(1, 0, 0);   /* DRSELECT */
+        jbi_jtag_io(1, 0, 0);   /* IRSELECT */
+        jbi_jtag_io(0, 0, 0);   /* IRCAPTURE */
+        jbi_jtag_io(0, 0, 0);   /* IRSHIFT */
+        break;
+
+    case 2:                     /* IRPAUSE */
+        jbi_jtag_io(1, 0, 0);   /* IREXIT2 */
+        jbi_jtag_io(1, 0, 0);   /* IRUPDATE */
+        jbi_jtag_io(1, 0, 0);   /* DRSELECT */
+        jbi_jtag_io(1, 0, 0);   /* IRSELECT */
+        jbi_jtag_io(0, 0, 0);   /* IRCAPTURE */
+        jbi_jtag_io(0, 0, 0);   /* IRSHIFT */
+        break;
+
+    default:
+        status = 0;
+    }
+
+    if (status)
+    {
+        /* loop in the SHIFT-IR state */
+        for (i = 0; i < count; i++)
+        {
+            tdo_bit = jbi_jtag_io(
+                (i == count - 1),
+                tdi[i >> 3] & (1 << (i & 7)),
+                (tdo != NULL));
+
+            if (tdo != NULL)
+            {
+                if (tdo_bit)
+                {
+                    tdo[i >> 3] |= (1 << (i & 7));
+                }
+                else
+                {
+                    tdo[i >> 3] &= ~(unsigned int) (1 << (i & 7));
+                }
+            }
+        }
+
+        jbi_jtag_io(0, 0, 0);   /* IRPAUSE */
+    }
+
+    return (status);
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+void jbi_jtag_extract_target_data
+(
+    unsigned char *buffer,
+    unsigned char *target_data,
+    unsigned int start_index,
+    unsigned int preamble_count,
+    unsigned int target_count
+)
+
+/*                                                                          */
+/*  Description:    Copies target data from scan buffer, filtering out      */
+/*                  preamble and postamble data.                            */
+/*                                                                          */
+/*  Returns:        nothing                                                 */
+/*                                                                          */
+/****************************************************************************/
+{
+    unsigned int i;
+    unsigned int j;
+    unsigned int k;
+
+    j = preamble_count;
+    k = start_index + target_count;
+    for (i = start_index; i < k; ++i, ++j)
+    {
+        if (buffer[j >> 3] & (1 << (j & 7)))
+        {
+            target_data[i >> 3] |= (1 << (i & 7));
+        }
+        else
+        {
+            target_data[i >> 3] &= ~(unsigned int) (1 << (i & 7));
+        }
+    }
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+JBI_RETURN_TYPE jbi_do_irscan
+(
+    unsigned int count,
+    unsigned char *tdi_data,
+    unsigned int start_index
+)
+
+/*                                                                          */
+/*  Description:    Shifts data into instruction register                   */
+/*                                                                          */
+/*  Returns:        JBIC_SUCCESS for success, else appropriate error code   */
+/*                                                                          */
+/****************************************************************************/
+{
+    int start_code = 0;
+    unsigned int alloc_chars = 0;
+    unsigned int shift_count = jbi_ir_preamble + count + jbi_ir_postamble;
+    JBI_RETURN_TYPE status = JBIC_SUCCESS;
+    JBIE_JTAG_STATE start_state = JBI_ILLEGAL_JTAG_STATE;
+
+    switch (jbi_jtag_state)
+    {
+    case JBI_ILLEGAL_JTAG_STATE:
+    case RESET:
+    case IDLE:
+        start_code = 0;
+        start_state = IDLE;
+        break;
+
+    case DRSELECT:
+    case DRCAPTURE:
+    case DRSHIFT:
+    case DREXIT1:
+    case DRPAUSE:
+    case DREXIT2:
+    case DRUPDATE:
+        start_code = 1;
+        start_state = DRPAUSE;
+        break;
+
+    case IRSELECT:
+    case IRCAPTURE:
+    case IRSHIFT:
+    case IREXIT1:
+    case IRPAUSE:
+    case IREXIT2:
+    case IRUPDATE:
+        start_code = 2;
+        start_state = IRPAUSE;
+        break;
+
+    default:
+        status = JBIC_INTERNAL_ERROR;
+        break;
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        if (jbi_jtag_state != start_state)
+        {
+            status = jbi_goto_jtag_state(start_state);
+        }
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        if (jbi_workspace != NULL)
+        {
+            if (shift_count > JBIC_MAX_JTAG_IR_LENGTH)
+            {
+                status = JBIC_OUT_OF_MEMORY;
+            }
+        }
+        else if (shift_count > jbi_ir_length)
+        {
+            alloc_chars = (shift_count + 7) >> 3;
+            jbi_free(jbi_ir_buffer);
+            jbi_ir_buffer = (unsigned char *) jbi_malloc(alloc_chars);
+
+            if (jbi_ir_buffer == NULL)
+            {
+                status = JBIC_OUT_OF_MEMORY;
+            }
+            else
+            {
+                jbi_ir_length = alloc_chars * 8;
+            }
+        }
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        /*
+        *   Copy preamble data, IR data, and postamble data into a buffer
+        */
+        jbi_jtag_concatenate_data
+        (
+            jbi_ir_buffer,
+            jbi_ir_preamble_data,
+            jbi_ir_preamble,
+            tdi_data,
+            start_index,
+            count,
+            jbi_ir_postamble_data,
+            jbi_ir_postamble
+        );
+
+        /*
+        *   Do the IRSCAN
+        */
+        jbi_jtag_irscan
+        (
+            start_code,
+            shift_count,
+            jbi_ir_buffer,
+            NULL
+        );
+
+        /* jbi_jtag_irscan() always ends in IRPAUSE state */
+        jbi_jtag_state = IRPAUSE;
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        if (jbi_irstop_state != IRPAUSE)
+        {
+            status = jbi_goto_jtag_state(jbi_irstop_state);
+        }
+    }
+
+    return (status);
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+JBI_RETURN_TYPE jbi_swap_ir
+(
+    unsigned int count,
+    unsigned char *in_data,
+    unsigned int in_index,
+    unsigned char *out_data,
+    unsigned int out_index
+)
+
+/*                                                                          */
+/*  Description:    Shifts data into instruction register, capturing output */
+/*                  data                                                    */
+/*                                                                          */
+/*  Returns:        JBIC_SUCCESS for success, else appropriate error code   */
+/*                                                                          */
+/****************************************************************************/
+{
+    int start_code = 0;
+    unsigned int alloc_chars = 0;
+    unsigned int shift_count = jbi_ir_preamble + count + jbi_ir_postamble;
+    JBI_RETURN_TYPE status = JBIC_SUCCESS;
+    JBIE_JTAG_STATE start_state = JBI_ILLEGAL_JTAG_STATE;
+
+    switch (jbi_jtag_state)
+    {
+    case JBI_ILLEGAL_JTAG_STATE:
+    case RESET:
+    case IDLE:
+        start_code = 0;
+        start_state = IDLE;
+        break;
+
+    case DRSELECT:
+    case DRCAPTURE:
+    case DRSHIFT:
+    case DREXIT1:
+    case DRPAUSE:
+    case DREXIT2:
+    case DRUPDATE:
+        start_code = 1;
+        start_state = DRPAUSE;
+        break;
+
+    case IRSELECT:
+    case IRCAPTURE:
+    case IRSHIFT:
+    case IREXIT1:
+    case IRPAUSE:
+    case IREXIT2:
+    case IRUPDATE:
+        start_code = 2;
+        start_state = IRPAUSE;
+        break;
+
+    default:
+        status = JBIC_INTERNAL_ERROR;
+        break;
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        if (jbi_jtag_state != start_state)
+        {
+            status = jbi_goto_jtag_state(start_state);
+        }
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        if (jbi_workspace != NULL)
+        {
+            if (shift_count > JBIC_MAX_JTAG_IR_LENGTH)
+            {
+                status = JBIC_OUT_OF_MEMORY;
+            }
+        }
+        else if (shift_count > jbi_ir_length)
+        {
+            alloc_chars = (shift_count + 7) >> 3;
+            jbi_free(jbi_ir_buffer);
+            jbi_ir_buffer = (unsigned char *) jbi_malloc(alloc_chars);
+
+            if (jbi_ir_buffer == NULL)
+            {
+                status = JBIC_OUT_OF_MEMORY;
+            }
+            else
+            {
+                jbi_ir_length = alloc_chars * 8;
+            }
+        }
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        /*
+        *   Copy preamble data, IR data, and postamble data into a buffer
+        */
+        jbi_jtag_concatenate_data
+        (
+            jbi_ir_buffer,
+            jbi_ir_preamble_data,
+            jbi_ir_preamble,
+            in_data,
+            in_index,
+            count,
+            jbi_ir_postamble_data,
+            jbi_ir_postamble
+        );
+
+        /*
+        *   Do the IRSCAN
+        */
+        jbi_jtag_irscan
+        (
+            start_code,
+            shift_count,
+            jbi_ir_buffer,
+            jbi_ir_buffer
+        );
+
+        /* jbi_jtag_irscan() always ends in IRPAUSE state */
+        jbi_jtag_state = IRPAUSE;
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        if (jbi_irstop_state != IRPAUSE)
+        {
+            status = jbi_goto_jtag_state(jbi_irstop_state);
+        }
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        /*
+        *   Now extract the returned data from the buffer
+        */
+        jbi_jtag_extract_target_data
+        (
+            jbi_ir_buffer,
+            out_data,
+            out_index,
+            jbi_ir_preamble,
+            count
+        );
+    }
+
+    return (status);
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+JBI_RETURN_TYPE jbi_do_drscan
+(
+    unsigned int count,
+    unsigned char *tdi_data,
+    unsigned long start_index
+)
+
+/*                                                                          */
+/*  Description:    Shifts data into data register (ignoring output data)   */
+/*                                                                          */
+/*  Returns:        JBIC_SUCCESS for success, else appropriate error code   */
+/*                                                                          */
+/****************************************************************************/
+{
+    int start_code = 0;
+    unsigned int alloc_chars = 0;
+    unsigned int shift_count = jbi_dr_preamble + count + jbi_dr_postamble;
+    JBI_RETURN_TYPE status = JBIC_SUCCESS;
+    JBIE_JTAG_STATE start_state = JBI_ILLEGAL_JTAG_STATE;
+
+    switch (jbi_jtag_state)
+    {
+    case JBI_ILLEGAL_JTAG_STATE:
+    case RESET:
+    case IDLE:
+        start_code = 0;
+        start_state = IDLE;
+        break;
+
+    case DRSELECT:
+    case DRCAPTURE:
+    case DRSHIFT:
+    case DREXIT1:
+    case DRPAUSE:
+    case DREXIT2:
+    case DRUPDATE:
+        start_code = 1;
+        start_state = DRPAUSE;
+        break;
+
+    case IRSELECT:
+    case IRCAPTURE:
+    case IRSHIFT:
+    case IREXIT1:
+    case IRPAUSE:
+    case IREXIT2:
+    case IRUPDATE:
+        start_code = 2;
+        start_state = IRPAUSE;
+        break;
+
+    default:
+        status = JBIC_INTERNAL_ERROR;
+        break;
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        if (jbi_jtag_state != start_state)
+        {
+            status = jbi_goto_jtag_state(start_state);
+        }
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        if (jbi_workspace != NULL)
+        {
+            if (shift_count > JBIC_MAX_JTAG_DR_LENGTH)
+            {
+                status = JBIC_OUT_OF_MEMORY;
+            }
+        }
+        else if (shift_count > jbi_dr_length)
+        {
+            alloc_chars = (shift_count + 7) >> 3;
+            jbi_free(jbi_dr_buffer);
+            jbi_dr_buffer = (unsigned char *) jbi_malloc(alloc_chars);
+
+            if (jbi_dr_buffer == NULL)
+            {
+                status = JBIC_OUT_OF_MEMORY;
+            }
+            else
+            {
+                jbi_dr_length = alloc_chars * 8;
+            }
+        }
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        /*
+        *   Copy preamble data, DR data, and postamble data into a buffer
+        */
+        jbi_jtag_concatenate_data
+        (
+            jbi_dr_buffer,
+            jbi_dr_preamble_data,
+            jbi_dr_preamble,
+            tdi_data,
+            start_index,
+            count,
+            jbi_dr_postamble_data,
+            jbi_dr_postamble
+        );
+
+        /*
+        *   Do the DRSCAN
+        */
+        jbi_jtag_drscan
+        (
+            start_code,
+            shift_count,
+            jbi_dr_buffer,
+            NULL
+        );
+
+        /* jbi_jtag_drscan() always ends in DRPAUSE state */
+        jbi_jtag_state = DRPAUSE;
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        if (jbi_drstop_state != DRPAUSE)
+        {
+            status = jbi_goto_jtag_state(jbi_drstop_state);
+        }
+    }
+
+    return (status);
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+JBI_RETURN_TYPE jbi_swap_dr
+(
+    unsigned int count,
+    unsigned char *in_data,
+    unsigned long in_index,
+    unsigned char *out_data,
+    unsigned int out_index
+)
+
+/*                                                                          */
+/*  Description:    Shifts data into data register, capturing output data   */
+/*                                                                          */
+/*  Returns:        JBIC_SUCCESS for success, else appropriate error code   */
+/*                                                                          */
+/****************************************************************************/
+{
+    int start_code = 0;
+    unsigned int alloc_chars = 0;
+    unsigned int shift_count = jbi_dr_preamble + count + jbi_dr_postamble;
+    JBI_RETURN_TYPE status = JBIC_SUCCESS;
+    JBIE_JTAG_STATE start_state = JBI_ILLEGAL_JTAG_STATE;
+
+    switch (jbi_jtag_state)
+    {
+    case JBI_ILLEGAL_JTAG_STATE:
+    case RESET:
+    case IDLE:
+        start_code = 0;
+        start_state = IDLE;
+        break;
+
+    case DRSELECT:
+    case DRCAPTURE:
+    case DRSHIFT:
+    case DREXIT1:
+    case DRPAUSE:
+    case DREXIT2:
+    case DRUPDATE:
+        start_code = 1;
+        start_state = DRPAUSE;
+        break;
+
+    case IRSELECT:
+    case IRCAPTURE:
+    case IRSHIFT:
+    case IREXIT1:
+    case IRPAUSE:
+    case IREXIT2:
+    case IRUPDATE:
+        start_code = 2;
+        start_state = IRPAUSE;
+        break;
+
+    default:
+        status = JBIC_INTERNAL_ERROR;
+        break;
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        if (jbi_jtag_state != start_state)
+        {
+            status = jbi_goto_jtag_state(start_state);
+        }
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        if (jbi_workspace != NULL)
+        {
+            if (shift_count > JBIC_MAX_JTAG_DR_LENGTH)
+            {
+                status = JBIC_OUT_OF_MEMORY;
+            }
+        }
+        else if (shift_count > jbi_dr_length)
+        {
+            alloc_chars = (shift_count + 7) >> 3;
+            jbi_free(jbi_dr_buffer);
+            jbi_dr_buffer = (unsigned char *) jbi_malloc(alloc_chars);
+
+            if (jbi_dr_buffer == NULL)
+            {
+                status = JBIC_OUT_OF_MEMORY;
+            }
+            else
+            {
+                jbi_dr_length = alloc_chars * 8;
+            }
+        }
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        /*
+        *   Copy preamble data, DR data, and postamble data into a buffer
+        */
+        jbi_jtag_concatenate_data
+        (
+            jbi_dr_buffer,
+            jbi_dr_preamble_data,
+            jbi_dr_preamble,
+            in_data,
+            in_index,
+            count,
+            jbi_dr_postamble_data,
+            jbi_dr_postamble
+        );
+
+        /*
+        *   Do the DRSCAN
+        */
+        jbi_jtag_drscan
+        (
+            start_code,
+            shift_count,
+            jbi_dr_buffer,
+            jbi_dr_buffer
+        );
+
+        /* jbi_jtag_drscan() always ends in DRPAUSE state */
+        jbi_jtag_state = DRPAUSE;
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        if (jbi_drstop_state != DRPAUSE)
+        {
+            status = jbi_goto_jtag_state(jbi_drstop_state);
+        }
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        /*
+        *   Now extract the returned data from the buffer
+        */
+        jbi_jtag_extract_target_data
+        (
+            jbi_dr_buffer,
+            out_data,
+            out_index,
+            jbi_dr_preamble,
+            count
+        );
+    }
+
+    return (status);
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+void jbi_free_jtag_padding_buffers(int reset_jtag)
+
+/*                                                                          */
+/*  Description:    Frees memory allocated for JTAG IR and DR buffers       */
+/*                                                                          */
+/*  Returns:        nothing                                                 */
+/*                                                                          */
+/****************************************************************************/
+{
+    /*
+    *   If the JTAG interface was used, reset it to TLR
+    */
+    if (reset_jtag && (jbi_jtag_state != JBI_ILLEGAL_JTAG_STATE))
+    {
+        jbi_jtag_reset_idle();
+    }
+
+    if (jbi_workspace == NULL)
+    {
+        if (jbi_dr_preamble_data != NULL)
+        {
+            jbi_free(jbi_dr_preamble_data);
+            jbi_dr_preamble_data = NULL;
+        }
+
+        if (jbi_dr_postamble_data != NULL)
+        {
+            jbi_free(jbi_dr_postamble_data);
+            jbi_dr_postamble_data = NULL;
+        }
+
+        if (jbi_dr_buffer != NULL)
+        {
+            jbi_free(jbi_dr_buffer);
+            jbi_dr_buffer = NULL;
+        }
+
+        if (jbi_ir_preamble_data != NULL)
+        {
+            jbi_free(jbi_ir_preamble_data);
+            jbi_ir_preamble_data = NULL;
+        }
+
+        if (jbi_ir_postamble_data != NULL)
+        {
+            jbi_free(jbi_ir_postamble_data);
+            jbi_ir_postamble_data = NULL;
+        }
+
+        if (jbi_ir_buffer != NULL)
+        {
+            jbi_free(jbi_ir_buffer);
+            jbi_ir_buffer = NULL;
+        }
+    }
+}
+
+#if PORT==DOS
+
+/****************************************************************************/
+/*                                                                          */
+
+JBI_RETURN_TYPE jbi_do_drscan_multi_page
+(
+    unsigned int variable_id,
+    unsigned long count,
+    unsigned long start_index,
+    int version
+)
+
+/*                                                                          */
+/*  Description:    Shifts data into data register (ignoring output data)   */
+/*                  Scan data comes from compressed Boolean array.          */
+/*                                                                          */
+/*  Returns:        JBIC_SUCCESS for success, else appropriate error code   */
+/*                                                                          */
+/****************************************************************************/
+{
+    JBI_RETURN_TYPE status = JBIC_SUCCESS;
+    unsigned long shift_count = jbi_dr_preamble + count + jbi_dr_postamble;
+    unsigned long i;
+    unsigned long j;
+    unsigned long k;
+    unsigned int bi;
+
+    if (status == JBIC_SUCCESS)
+    {
+        status = jbi_goto_jtag_state(DRSHIFT);
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        /*
+        *   Get preamble data, DR data, and postamble data one bit at a time
+        *   and immediately scan it into the JTAG chain
+        */
+
+        for (i = 0L; i < jbi_dr_preamble; ++i)
+        {
+            jbi_jtag_io((i == shift_count - 1),
+                (int) (jbi_dr_preamble_data[i >> 3L] & (1L << (i & 7L))), 0);
+        }
+
+        j = start_index;
+        k = jbi_dr_preamble + count;
+
+        jbi_uncompress_page(variable_id, (unsigned int) (j >> 16L), version);
+
+        for (; i < k; ++i, ++j)
+        {
+            bi = (unsigned int) (j & 0x0000ffffL);
+
+            /* check for page boundary - load next page if necessary */
+            if (bi == 0)
+            {
+                jbi_uncompress_page(variable_id, (unsigned int) (j >> 16L), version);
+            }
+
+            jbi_jtag_io((i == shift_count - 1),
+                (int) (jbi_aca_out_buffer[bi >> 3] & (1 << (bi & 7))), 0);
+        }
+
+        j = 0L;
+        k = jbi_dr_preamble + count + jbi_dr_postamble;
+        for (; i < k; ++i, ++j)
+        {
+            jbi_jtag_io((i == shift_count - 1),
+                (int) (jbi_dr_postamble_data[j >> 3L] & (1L << (j & 7L))), 0);
+        }
+
+        jbi_jtag_io(0, 0, 0);   /* DRPAUSE */
+
+        /* jbi_jtag_drscan() always ends in DRPAUSE state */
+        jbi_jtag_state = DRPAUSE;
+
+        if (jbi_drstop_state != DRPAUSE)
+        {
+            status = jbi_goto_jtag_state(jbi_drstop_state);
+        }
+    }
+
+    return (status);
+}
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbijtag.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbijtag.h
new file mode 100644
index 000000000000..fab2dac0266a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbijtag.h
@@ -0,0 +1,146 @@
+/****************************************************************************/
+/*                                                                          */
+/*  Module:         jbijtag.h                                               */
+/*                                                                          */
+/*                  Copyright (C) Altera Corporation 1998-2001              */
+/*                                                                          */
+/*  Description:    Definitions of JTAG constants, types, and functions     */
+/*                                                                          */
+/****************************************************************************/
+
+#ifndef INC_JBIJTAG_H
+#define INC_JBIJTAG_H
+
+/****************************************************************************/
+/*                                                                          */
+/*  Function Prototypes                                                     */
+/*                                                                          */
+/****************************************************************************/
+typedef enum
+{
+    JBI_ILLEGAL_JTAG_STATE = -1,
+    RESET = 0,
+    IDLE = 1,
+    DRSELECT = 2,
+    DRCAPTURE = 3,
+    DRSHIFT = 4,
+    DREXIT1 = 5,
+    DRPAUSE = 6,
+    DREXIT2 = 7,
+    DRUPDATE = 8,
+    IRSELECT = 9,
+    IRCAPTURE = 10,
+    IRSHIFT = 11,
+    IREXIT1 = 12,
+    IRPAUSE = 13,
+    IREXIT2 = 14,
+    IRUPDATE = 15
+
+} JBIE_JTAG_STATE;
+
+JBI_RETURN_TYPE jbi_init_jtag
+(
+    void
+);
+
+JBI_RETURN_TYPE jbi_set_drstop_state
+(
+    JBIE_JTAG_STATE state
+);
+
+JBI_RETURN_TYPE jbi_set_irstop_state
+(
+    JBIE_JTAG_STATE state
+);
+
+JBI_RETURN_TYPE jbi_set_dr_preamble
+(
+    unsigned int count,
+    unsigned int start_index,
+    unsigned char *preamble_data
+);
+
+JBI_RETURN_TYPE jbi_set_ir_preamble
+(
+    unsigned int count,
+    unsigned int start_index,
+    unsigned char *preamble_data
+);
+
+JBI_RETURN_TYPE jbi_set_dr_postamble
+(
+    unsigned int count,
+    unsigned int start_index,
+    unsigned char *postamble_data
+);
+
+JBI_RETURN_TYPE jbi_set_ir_postamble
+(
+    unsigned int count,
+    unsigned int start_index,
+    unsigned char *postamble_data
+);
+
+JBI_RETURN_TYPE jbi_goto_jtag_state
+(
+    JBIE_JTAG_STATE state
+);
+
+JBI_RETURN_TYPE jbi_do_wait_cycles
+(
+    long cycles,
+    JBIE_JTAG_STATE wait_state
+);
+
+JBI_RETURN_TYPE jbi_do_wait_microseconds
+(
+    long microseconds,
+    JBIE_JTAG_STATE wait_state
+);
+
+JBI_RETURN_TYPE jbi_do_irscan
+(
+    unsigned int count,
+    unsigned char *tdi_data,
+    unsigned int start_index
+);
+
+JBI_RETURN_TYPE jbi_swap_ir
+(
+    unsigned int count,
+    unsigned char *in_data,
+    unsigned int in_index,
+    unsigned char *out_data,
+    unsigned int out_index
+);
+
+JBI_RETURN_TYPE jbi_do_drscan
+(
+    unsigned int count,
+    unsigned char *tdi_data,
+    unsigned long start_index
+);
+
+JBI_RETURN_TYPE jbi_swap_dr
+(
+    unsigned int count,
+    unsigned char *in_data,
+    unsigned long in_index,
+    unsigned char *out_data,
+    unsigned int out_index
+);
+
+void jbi_free_jtag_padding_buffers
+(
+    int reset_jtag
+);
+
+JBI_RETURN_TYPE jbi_do_drscan_multi_page
+(
+    unsigned int variable_id,
+    unsigned long long_count,
+    unsigned long long_index,
+    int version
+);
+
+#endif /* INC_JBIJTAG_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbimain.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbimain.c
new file mode 100644
index 000000000000..b8cab4857074
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbimain.c
@@ -0,0 +1,3362 @@
+/****************************************************************************/
+/*                                                                          */
+/*  Module:         jbimain.c                                               */
+/*                                                                          */
+/*                  Copyright (C) Altera Corporation 1998-2001              */
+/*                                                                          */
+/*  Description:    Jam STAPL ByteCode Player (Interpreter)                 */
+/*                                                                          */
+/*  Revisions:      2.2  fixed /W4 warnings                                 */
+/*                  2.0  added support for STAPL ByteCode format            */
+/*                                                                          */
+/****************************************************************************/
+
+#include "jbiport.h"
+#include "jbiexprt.h"
+#include "jbijtag.h"
+#include "jbicomp.h"
+#include "jbistub.h"
+
+/****************************************************************************/
+/*                                                                          */
+/*  MACROS                                                                  */
+/*                                                                          */
+/****************************************************************************/
+
+#ifndef NULL
+#define NULL 0
+#endif
+
+#define JBI_STACK_SIZE 128
+
+#define JBIC_MESSAGE_LENGTH 1024
+
+/*
+*   This macro checks if enough parameters are available on the stack. The
+*   argument is the number of parameters needed.
+*/
+#define IF_CHECK_STACK(x) \
+    if (stack_ptr < (int) (x)) \
+    { \
+        status = JBIC_STACK_OVERFLOW; \
+    } \
+    else
+
+/*
+*   This macro checks if a code address is inside the code section
+*/
+#define CHECK_PC \
+    if ((pc < code_section) || (pc >= debug_section)) \
+    { \
+        status = JBIC_BOUNDS_ERROR; \
+    }
+
+/****************************************************************************/
+/*                                                                          */
+/*  GLOBAL VARIABLES                                                        */
+/*                                                                          */
+/****************************************************************************/
+
+#if PORT==DOS
+/*
+*   jbi_program is a global pointer used by macros GET_BYTE, GET_WORD, and
+*   GET_DWORD to read data from the JBC file
+*/
+PROGRAM_PTR jbi_program;
+#endif
+
+/****************************************************************************/
+/*                                                                          */
+/*  UTILITY FUNCTIONS                                                       */
+/*                                                                          */
+/****************************************************************************/
+
+int jbi_strlen(char *string)
+{
+    int len = 0;
+
+    while (string[len] != '\0') ++len;
+
+    return (len);
+}
+
+long jbi_atol(char *buffer)
+{
+    long result = 0L;
+    int index = 0;
+
+    while ((buffer[index] >= '0') && (buffer[index] <= '9'))
+    {
+        result = (result * 10) + (buffer[index] - '0');
+        ++index;
+    }
+
+    return (result);
+}
+
+void jbi_ltoa(char *buffer, long number)
+{
+    int index = 0;
+    int rev_index = 0;
+    char reverse[32];
+
+    if (number < 0L)
+    {
+        buffer[index++] = '-';
+        number = 0 - number;
+    }
+    else if (number == 0)
+    {
+        buffer[index++] = '0';
+    }
+
+    while (number != 0)
+    {
+        reverse[rev_index++] = (char) ((number % 10) + '0');
+        number /= 10;
+    }
+
+    while (rev_index > 0)
+    {
+        buffer[index++] = reverse[--rev_index];
+    }
+
+    buffer[index] = '\0';
+}
+
+char jbi_toupper(char ch)
+{
+    return ((char) (((ch >= 'a') && (ch <= 'z')) ? (ch + 'A' - 'a') : ch));
+}
+
+int jbi_stricmp(char *left, char *right)
+{
+    int result = 0;
+    char l, r;
+
+    do
+    {
+        l = jbi_toupper(*left);
+        r = jbi_toupper(*right);
+        result = l - r;
+        ++left;
+        ++right;
+    }
+    while ((result == 0) && (l != '\0') && (r != '\0'));
+
+    return (result);
+}
+
+void jbi_strncpy(char *left, char *right, int count)
+{
+    char ch;
+
+    do
+    {
+        *left = *right;
+        ch = *right;
+        ++left;
+        ++right;
+        --count;
+    }
+    while ((ch != '\0') && (count != 0));
+}
+
+void jbi_make_dword(unsigned char *buf, unsigned long num)
+{
+    buf[0] = (unsigned char) num;
+    buf[1] = (unsigned char) (num >> 8L);
+    buf[2] = (unsigned char) (num >> 16L);
+    buf[3] = (unsigned char) (num >> 24L);
+}
+
+unsigned long jbi_get_dword(unsigned char *buf)
+{
+    return
+        (((unsigned long) buf[0]) |
+        (((unsigned long) buf[1]) << 8L) |
+        (((unsigned long) buf[2]) << 16L) |
+        (((unsigned long) buf[3]) << 24L));
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+JBI_RETURN_TYPE jbi_execute
+(
+    PROGRAM_PTR program,
+    long program_size,
+    char *workspace,
+    long workspace_size,
+    char *action,
+    char **init_list,
+    int reset_jtag,
+    long *error_address,
+    int *exit_code,
+    int *format_version
+)
+
+/*                                                                          */
+/*  Description:                                                            */
+/*                                                                          */
+/*  Returns:                                                                */
+/*                                                                          */
+/****************************************************************************/
+{
+    JBI_RETURN_TYPE status = JBIC_SUCCESS;
+    unsigned long first_word = 0L;
+    unsigned long action_table = 0L;
+    unsigned long proc_table = 0L;
+    unsigned long string_table = 0L;
+    unsigned long symbol_table = 0L;
+    unsigned long data_section = 0L;
+    unsigned long code_section = 0L;
+    unsigned long debug_section = 0L;
+    unsigned long action_count = 0L;
+    unsigned long proc_count = 0L;
+    unsigned long symbol_count = 0L;
+    /*char message_buffer[JBIC_MESSAGE_LENGTH + 1];*/
+    char *message_buffer;
+    addr_t *variables = NULL;
+    long *variable_size = NULL;
+    char *attributes = NULL;
+    unsigned char *proc_attributes = NULL;
+    unsigned long pc;
+    unsigned long opcode_address;
+    unsigned long args[3];
+    unsigned int opcode;
+    unsigned long name_id;
+    addr_t stack[JBI_STACK_SIZE] = {0};
+    unsigned char charbuf[4];
+    long long_temp;
+    unsigned int variable_id;
+    unsigned char *charptr_temp;
+    unsigned char *charptr_temp2;
+    long *longptr_temp;
+    int version = 0;
+    int delta = 0;
+    int stack_ptr = 0;
+    unsigned int arg_count;
+    int done = 0;
+    int bad_opcode = 0;
+    unsigned int count;
+    unsigned int index;
+    unsigned int index2;
+    long long_count;
+    long long_index;
+    long long_index2;
+    unsigned int i;
+    unsigned int j;
+    unsigned long uncompressed_size, uncompressed_result;
+    unsigned int offset;
+    unsigned long value;
+    int current_proc = 0;
+    char *equal_ptr;
+    int length;
+    int reverse;
+
+    unsigned long debug_cnt = 0;
+
+#if PORT==DOS
+    char name[33];
+#else
+    char *name;
+#endif
+
+    jbi_workspace = workspace;
+    jbi_workspace_size = workspace_size;
+
+#if PORT==DOS
+    jbi_program = program;
+#endif
+
+    /* Resolve compilation warnings: the frame size of 1664 bytes is larger than 1024 bytes */
+    message_buffer = (char *) kzalloc(JBIC_MESSAGE_LENGTH + 1, GFP_KERNEL);
+    if (message_buffer == NULL) {
+        jbi_dbg(DEBUG_DETAIL, "Memory not enough jbi_execute \n");
+        return JBIC_OUT_OF_MEMORY;
+    }
+
+    /*
+    *   Read header information
+    */
+    if (program_size > 52L)
+    {
+        first_word    = GET_DWORD(0);
+        version = (int) (first_word & 1L);
+        *format_version = version + 1;
+        delta = version * 8;
+
+        action_table  = GET_DWORD(4);
+        proc_table    = GET_DWORD(8);
+        string_table  = GET_DWORD(4 + delta);
+        symbol_table  = GET_DWORD(16 + delta);
+        data_section  = GET_DWORD(20 + delta);
+        code_section  = GET_DWORD(24 + delta);
+        debug_section = GET_DWORD(28 + delta);
+        action_count  = GET_DWORD(40 + delta);
+        proc_count    = GET_DWORD(44 + delta);
+        symbol_count  = GET_DWORD(48 + (2 * delta));
+
+        jbi_dbg(DEBUG_DETAIL, "version:       %d\n", version);
+        jbi_dbg(DEBUG_DETAIL, "delta:         %d\n", delta);
+        jbi_dbg(DEBUG_DETAIL, "action_table:  0x%08lx\n", action_table);
+        jbi_dbg(DEBUG_DETAIL, "proc_table:    0x%08lx\n", proc_table);
+        jbi_dbg(DEBUG_DETAIL, "string_table:  0x%08lx\n", string_table);
+        jbi_dbg(DEBUG_DETAIL, "symbol_table:  0x%08lx\n", symbol_table);
+        jbi_dbg(DEBUG_DETAIL, "data_section:  0x%08lx\n", data_section);
+        jbi_dbg(DEBUG_DETAIL, "code_section:  0x%08lx\n", code_section);
+        jbi_dbg(DEBUG_DETAIL, "debug_section: 0x%08lx\n", debug_section);
+        jbi_dbg(DEBUG_DETAIL, "action_count:  0x%08lx\n", action_count);
+        jbi_dbg(DEBUG_DETAIL, "proc_count:    0x%08lx\n", proc_count);
+        jbi_dbg(DEBUG_DETAIL, "symbol_count:  0x%08lx\n", symbol_count);
+        jbi_dbg(DEBUG_DETAIL, "\n");
+    }
+
+    if ((first_word != 0x4A414D00L) && (first_word != 0x4A414D01L))
+    {
+        jbi_dbg(DEBUG_ERR, "first_word 0x%lx\n", first_word);
+        done = 1;
+        status = JBIC_IO_ERROR;
+    }
+
+    if ((status == JBIC_SUCCESS) && (symbol_count > 0))
+    {
+        variables = (addr_t *) jbi_malloc(
+            (unsigned int) symbol_count * sizeof(long));
+
+        if (variables == NULL) status = JBIC_OUT_OF_MEMORY;
+
+        if (status == JBIC_SUCCESS)
+        {
+            variable_size = (long *) jbi_malloc(
+                (unsigned int) symbol_count * sizeof(long));
+
+            if (variable_size == NULL) status = JBIC_OUT_OF_MEMORY;
+        }
+
+        if (status == JBIC_SUCCESS)
+        {
+            attributes = (char *) jbi_malloc((unsigned int) symbol_count);
+
+            if (attributes == NULL) status = JBIC_OUT_OF_MEMORY;
+        }
+
+        if ((status == JBIC_SUCCESS) && (version > 0))
+        {
+            proc_attributes = (unsigned char *) jbi_malloc((unsigned int) proc_count);
+
+            if (proc_attributes == NULL) status = JBIC_OUT_OF_MEMORY;
+        }
+
+        if (status == JBIC_SUCCESS)
+        {
+            delta = version * 2;
+
+            for (i = 0; i < (unsigned int) symbol_count; ++i)
+            {
+                offset = (unsigned int) (symbol_table + ((11 + delta) * i));
+
+                value = GET_DWORD(offset + 3 + delta);
+
+                attributes[i] = GET_BYTE(offset);
+
+                /* use bit 7 of attribute byte to indicate that this buffer */
+                /* was dynamically allocated and should be freed later */
+                attributes[i] &= 0x7f;
+
+                variable_size[i] = GET_DWORD(offset + 7 + delta);
+
+                jbi_dbg(DEBUG_NOISY, "symbol %03d: 0x%02x,0x%08lx,0x%08lx\n",
+                    i, attributes[i], value, variable_size[i]);
+
+                /*
+                *   Attribute bits:
+                *   bit 0:  0 = read-only, 1 = read-write
+                *   bit 1:  0 = not compressed, 1 = compressed
+                *   bit 2:  0 = not initialized, 1 = initialized
+                *   bit 3:  0 = scalar, 1 = array
+                *   bit 4:  0 = Boolean, 1 = integer
+                *   bit 5:  0 = declared variable,
+                *           1 = compiler created temporary variable
+                */
+
+                if ((attributes[i] & 0x0c) == 0x04)
+                {
+                    /* initialized scalar variable */
+                    variables[i] = value;
+                }
+                else if ((attributes[i] & 0x1e) == 0x0e)
+                {
+                    /* initialized compressed Boolean array */
+#if PORT==DOS
+                    /* for DOS port, get the size but do not uncompress */
+                    long_index = data_section + value;
+                    uncompressed_size =
+                        (((unsigned long) GET_BYTE(long_index)) |
+                        (((unsigned long) GET_BYTE(long_index + 1L)) << 8L) |
+                        (((unsigned long) GET_BYTE(long_index + 2L)) << 16L) |
+                        (((unsigned long) GET_BYTE(long_index + 3L)) << 24L));
+                    variable_size[i] = uncompressed_size;
+#else
+                    uncompressed_size = jbi_get_dword(
+                        &program[data_section + value]);
+
+                    /* allocate a buffer for the uncompressed data */
+                    variables[i] = (addr_t) jbi_malloc(uncompressed_size);
+
+                    if (variables[i] == (addr_t) 0L)
+                    {
+                        status = JBIC_OUT_OF_MEMORY;
+                    }
+                    else
+                    {
+                        /* set flag so buffer will be freed later */
+                        attributes[i] |= 0x80;
+
+                        /* uncompress the data */
+                        uncompressed_result =
+                            jbi_uncompress(
+                            &program[data_section + value],
+                            variable_size[i],
+                            (unsigned char *) variables[i],
+                            uncompressed_size,
+                            version);
+                        if (uncompressed_result != uncompressed_size)
+                        {
+                            /* decompression failed */
+                            jbi_dbg(DEBUG_ERR, "uncompress fail(0x%lx,0x%lx,0x%lx)(0x%lx)\n",
+                                variable_size[i], uncompressed_result, uncompressed_size, value);
+                            status = JBIC_IO_ERROR;
+                        }
+                        else
+                        {
+                            variable_size[i] = uncompressed_size * 8L;
+                        }
+                    }
+#endif
+                }
+                else if ((attributes[i] & 0x1e) == 0x0c)
+                {
+                    /* initialized Boolean array */
+#if PORT==DOS
+                    /* flag attributes so that memory is freed */
+                    attributes[i] |= 0x80;
+
+                    if (variable_size[i] > 0)
+                    {
+                        unsigned int size = (unsigned int)
+                            ((variable_size[i] + 7L) / 8L);
+
+                        variables[i] = (long) jbi_malloc(size);
+
+                        if (variables[i] == NULL)
+                        {
+                            status = JBIC_OUT_OF_MEMORY;
+                        }
+                        else
+                        {
+                            unsigned char *p = (unsigned char *) variables[i];
+                            /* copy array values into buffer */
+                            for (j = 0; j < size; ++j)
+                            {
+                                p[j] = GET_BYTE(data_section + value + j);
+                            }
+                        }
+                    }
+                    else
+                    {
+                        variables[i] = 0;
+                    }
+#else
+                    variables[i] = value + data_section + (addr_t) program;
+#endif
+                }
+                else if ((attributes[i] & 0x1c) == 0x1c)
+                {
+                    /* initialized integer array */
+                    variables[i] = value + data_section;
+                }
+                else if ((attributes[i] & 0x0c) == 0x08)
+                {
+                    /* uninitialized array */
+
+                    /* flag attributes so that memory is freed */
+                    attributes[i] |= 0x80;
+
+                    if (variable_size[i] > 0)
+                    {
+                        unsigned int size;
+
+                        if (attributes[i] & 0x10)
+                        {
+                            /* integer array */
+                            size = (unsigned int)
+                                (variable_size[i] * sizeof(long));
+                        }
+                        else
+                        {
+                            /* Boolean array */
+                            size = (unsigned int)
+                                ((variable_size[i] + 7L) / 8L);
+                        }
+
+                        variables[i] = (addr_t) jbi_malloc(size);
+
+                        if (variables[i] == (addr_t) NULL)
+                        {
+                            status = JBIC_OUT_OF_MEMORY;
+                        }
+                        else
+                        {
+                            /* zero out memory */
+                            for (j = 0; j < size; ++j)
+                            {
+                                ((unsigned char *)(variables[i]))[j] = 0;
+                            }
+                        }
+                    }
+                    else
+                    {
+                        variables[i] = 0;
+                    }
+                }
+                else
+                {
+                    variables[i] = 0;
+                }
+
+                jbi_dbg(DEBUG_NOISY, "  variables: 0x%08lx,0x%016llx\n",
+                    variable_size[i], (long long) variables[i]);
+            }
+        }
+
+        jbi_dbg(DEBUG_NOISY, "\n");
+    }
+
+    /*
+    *   Initialize variables listed in init_list
+    */
+    if ((status == JBIC_SUCCESS) && (init_list != NULL) && (version == 0))
+    {
+        delta = version * 2;
+        count = 0;
+        while (init_list[count] != NULL)
+        {
+            equal_ptr = init_list[count];
+            length = 0;
+            while ((*equal_ptr != '=') && (*equal_ptr != '\0'))
+            {
+                ++equal_ptr;
+                ++length;
+            }
+            if (*equal_ptr == '=')
+            {
+                ++equal_ptr;
+                value = jbi_atol(equal_ptr);
+                jbi_strncpy(message_buffer, init_list[count], length);
+                message_buffer[length] = '\0';
+                for (i = 0; i < (unsigned int) symbol_count; ++i)
+                {
+                    offset = (unsigned int) (symbol_table + ((11 + delta) * i));
+                    name_id = (version == 0) ? GET_WORD(offset + 1) :
+                        GET_DWORD(offset + 1);
+#if PORT==DOS
+                    for (j = 0; j < 32; ++j)
+                    {
+                        name[j] = GET_BYTE(string_table + name_id + j);
+                    }
+                    name[32] = '\0';
+#else
+                    name = (char *) &program[string_table + name_id];
+#endif
+
+                    if (jbi_stricmp(message_buffer, name) == 0)
+                    {
+                        variables[i] = value;
+                    }
+
+                    jbi_dbg(DEBUG_NOISY, "init_list %03d: 0x%08lx,%s,0x%016llx\n",
+                        i, name_id, name, (long long) variables[i]);
+                }
+            }
+
+            ++count;
+        }
+
+        jbi_dbg(DEBUG_NOISY, "\n");
+    }
+
+    if (status != JBIC_SUCCESS) done = 1;
+
+    jbi_init_jtag();
+
+    pc = code_section;
+    message_buffer[0] = '\0';
+
+    /*
+    *   For JBC version 2, we will execute the procedures corresponding to
+    *   the selected ACTION
+    */
+    if (version > 0)
+    {
+        if (action == NULL)
+        {
+            status = JBIC_ACTION_NOT_FOUND;
+            done = 1;
+        }
+        else
+        {
+            int action_found = 0;
+
+            for (i = 0; (i < action_count) && !action_found; ++i)
+            {
+                name_id = GET_DWORD(action_table + (12 * i));
+
+#if PORT==DOS
+                for (j = 0; j < 32; ++j)
+                {
+                    name[j] = GET_BYTE(string_table + name_id + j);
+                }
+                name[32] = '\0';
+#else
+                name = (char *) &program[string_table + name_id];
+#endif
+
+                if (jbi_stricmp(action, name) == 0)
+                {
+                    action_found = 1;
+                    current_proc = (int) GET_DWORD(action_table + (12 * i) + 8);
+                }
+
+                jbi_dbg(DEBUG_NOISY, "action %03d: 0x%08lx,%s, %d,%d\n",
+                        i, name_id, name, action_found, current_proc);
+            }
+
+            if (!action_found)
+            {
+                status = JBIC_ACTION_NOT_FOUND;
+                done = 1;
+            }
+        }
+
+        if (status == JBIC_SUCCESS)
+        {
+            int first_time = 1;
+            i = current_proc;
+            while ((i != 0) || first_time)
+            {
+                first_time = 0;
+                /* check procedure attribute byte */
+                proc_attributes[i] = (unsigned char)
+                    (GET_BYTE(proc_table + (13 * i) + 8) & 0x03);
+
+                jbi_dbg(DEBUG_NOISY, "  proc_attributes %03d: 0x%02x\n",
+                     i, proc_attributes[i]);
+
+                if (proc_attributes[i] != 0)
+                {
+                    /*
+                    *   BIT0 - OPTIONAL
+                    *   BIT1 - RECOMMENDED
+                    *   BIT6 - FORCED OFF
+                    *   BIT7 - FORCED ON
+                    */
+                    if (init_list != NULL)
+                    {
+                        name_id = GET_DWORD(proc_table + (13 * i));
+#if PORT==DOS
+                        for (j = 0; j < 32; ++j)
+                        {
+                            name[j] = GET_BYTE(string_table + name_id + j);
+                        }
+                        name[32] = '\0';
+#else
+                        name = (char *) &program[string_table + name_id];
+#endif
+
+                        jbi_dbg(DEBUG_NOISY, "    init_list %03d: 0x%08lx,%s\n",
+                            i, name_id, name);
+
+                        count = 0;
+                        while (init_list[count] != NULL)
+                        {
+                            equal_ptr = init_list[count];
+                            length = 0;
+                            while ((*equal_ptr != '=') && (*equal_ptr != '\0'))
+                            {
+                                ++equal_ptr;
+                                ++length;
+                            }
+                            if (*equal_ptr == '=')
+                            {
+                                ++equal_ptr;
+                                jbi_strncpy(message_buffer, init_list[count], length);
+                                message_buffer[length] = '\0';
+
+                                if (jbi_stricmp(message_buffer, name) == 0)
+                                {
+                                    if (jbi_atol(equal_ptr) == 0)
+                                    {
+                                        proc_attributes[i] |= 0x40;
+                                    }
+                                    else
+                                    {
+                                        proc_attributes[i] |= 0x80;
+                                    }
+                                }
+                            }
+
+                            jbi_dbg(DEBUG_NOISY, "      proc_attributes %03d: 0x%02x\n",
+                                i, proc_attributes[i]);
+
+                            ++count;
+                        }
+                    }
+                }
+
+                i = (unsigned int) GET_DWORD(proc_table + (13 * i) + 4);
+            }
+
+            /*
+            *   Set current_proc to the first procedure to be executed
+            */
+            i = current_proc;
+            while ((i != 0) &&
+                ((proc_attributes[i] == 1) ||
+                ((proc_attributes[i] & 0xc0) == 0x40)))
+            {
+                i = (unsigned int) GET_DWORD(proc_table + (13 * i) + 4);
+            }
+
+            if ((i != 0) || ((i == 0) && (current_proc == 0) &&
+                ((proc_attributes[0] != 1) &&
+                ((proc_attributes[0] & 0xc0) != 0x40))))
+            {
+                current_proc = i;
+                pc = code_section + GET_DWORD(proc_table + (13 * i) + 9);
+                CHECK_PC;
+            }
+            else
+            {
+                /* there are no procedures to execute! */
+                done = 1;
+            }
+        }
+
+        jbi_dbg(DEBUG_NOISY, "\n");
+    }
+
+    message_buffer[0] = '\0';
+
+    jbi_dbg(DEBUG_NOISY, "excute pc: 0x%lx,%d\n", pc, current_proc);
+    while (!done)
+    {
+        opcode = (unsigned int) (GET_BYTE(pc) & 0xff);
+        debug_cnt++;
+        jbi_dbg(DEBUG_NOISY, "op: 0x%02x(%03d:0x%08lx,%08lx)",
+            opcode, stack_ptr, pc, debug_cnt);
+        opcode_address = pc;
+        ++pc;
+
+        arg_count = (opcode >> 6) & 3;
+        jbi_dbg(DEBUG_NOISY, " - %u:", arg_count);
+        for (i = 0; i < arg_count; ++i)
+        {
+            args[i] = GET_DWORD(pc);
+            jbi_dbg(DEBUG_NOISY, " 0x%08lx", args[i]);
+            pc += 4;
+        }
+        jbi_dbg(DEBUG_NOISY, "\n");
+
+        switch (opcode)
+        {
+        case 0x00: /* NOP  */
+            /* do nothing */
+            break;
+
+        case 0x01: /* DUP  */
+            IF_CHECK_STACK(1)
+            {
+                stack[stack_ptr] = stack[stack_ptr - 1];
+                ++stack_ptr;
+            }
+            break;
+
+        case 0x02: /* SWP  */
+            IF_CHECK_STACK(2)
+            {
+                long_temp = stack[stack_ptr - 2];
+                stack[stack_ptr - 2] = stack[stack_ptr - 1];
+                stack[stack_ptr - 1] = long_temp;
+            }
+            break;
+
+        case 0x03: /* ADD  */
+            IF_CHECK_STACK(2)
+            {
+                --stack_ptr;
+                stack[stack_ptr - 1] += stack[stack_ptr];
+            }
+            break;
+
+        case 0x04: /* SUB  */
+            IF_CHECK_STACK(2)
+            {
+                --stack_ptr;
+                stack[stack_ptr - 1] -= stack[stack_ptr];
+            }
+            break;
+
+        case 0x05: /* MULT */
+            IF_CHECK_STACK(2)
+            {
+                --stack_ptr;
+                stack[stack_ptr - 1] *= stack[stack_ptr];
+            }
+            break;
+
+        case 0x06: /* DIV  */
+            IF_CHECK_STACK(2)
+            {
+                --stack_ptr;
+                stack[stack_ptr - 1] /= stack[stack_ptr];
+            }
+            break;
+
+        case 0x07: /* MOD  */
+            IF_CHECK_STACK(2)
+            {
+                --stack_ptr;
+                stack[stack_ptr - 1] %= stack[stack_ptr];
+            }
+            break;
+
+        case 0x08: /* SHL  */
+            IF_CHECK_STACK(2)
+            {
+                --stack_ptr;
+                stack[stack_ptr - 1] <<= stack[stack_ptr];
+            }
+            break;
+
+        case 0x09: /* SHR  */
+            IF_CHECK_STACK(2)
+            {
+                --stack_ptr;
+                stack[stack_ptr - 1] >>= stack[stack_ptr];
+            }
+            break;
+
+        case 0x0A: /* NOT  */
+            IF_CHECK_STACK(1)
+            {
+                stack[stack_ptr - 1] ^= (-1L);
+            }
+            break;
+
+        case 0x0B: /* AND  */
+            IF_CHECK_STACK(2)
+            {
+                --stack_ptr;
+                stack[stack_ptr - 1] &= stack[stack_ptr];
+            }
+            break;
+
+        case 0x0C: /* OR   */
+            IF_CHECK_STACK(2)
+            {
+                --stack_ptr;
+                stack[stack_ptr - 1] |= stack[stack_ptr];
+            }
+            break;
+
+        case 0x0D: /* XOR  */
+            IF_CHECK_STACK(2)
+            {
+                --stack_ptr;
+                stack[stack_ptr - 1] ^= stack[stack_ptr];
+            }
+            break;
+
+        case 0x0E: /* INV */
+            IF_CHECK_STACK(1)
+            {
+                stack[stack_ptr - 1] = stack[stack_ptr - 1] ? 0L : 1L;
+            }
+            break;
+
+        case 0x0F: /* GT   */
+            IF_CHECK_STACK(2)
+            {
+                --stack_ptr;
+                stack[stack_ptr - 1] =
+                    (stack[stack_ptr - 1] > stack[stack_ptr]) ? 1L : 0L;
+            }
+            break;
+
+        case 0x10: /* LT   */
+            IF_CHECK_STACK(2)
+            {
+                --stack_ptr;
+                stack[stack_ptr - 1] =
+                    (stack[stack_ptr - 1] < stack[stack_ptr]) ? 1L : 0L;
+            }
+            break;
+
+        case 0x11: /* RET  */
+            if ((version > 0) && (stack_ptr == 0))
+            {
+                /*
+                *   We completed one of the main procedures of an ACTION.
+                *   Find the next procedure to be executed and jump to it.
+                *   If there are no more procedures, then EXIT.
+                */
+                i = (unsigned int) GET_DWORD(proc_table + (13 * current_proc) + 4);
+                while ((i != 0) &&
+                    ((proc_attributes[i] == 1) ||
+                    ((proc_attributes[i] & 0xc0) == 0x40)))
+                {
+                    i = (unsigned int) GET_DWORD(proc_table + (13 * i) + 4);
+                }
+
+                if (i == 0)
+                {
+                    /* there are no procedures to execute! */
+                    done = 1;
+                    *exit_code = 0; /* success */
+                }
+                else
+                {
+                    current_proc = i;
+                    pc = code_section + GET_DWORD(proc_table + (13 * i) + 9);
+                    CHECK_PC;
+                }
+            }
+            else IF_CHECK_STACK(1)
+            {
+                pc = stack[--stack_ptr] + code_section;
+                CHECK_PC;
+                if (pc == code_section)
+                {
+                    status = JBIC_BOUNDS_ERROR;
+                }
+            }
+            break;
+
+        case 0x12: /* CMPS */
+            /*
+            *   Array short compare
+            *   ...stack 0 is source 1 value
+            *   ...stack 1 is source 2 value
+            *   ...stack 2 is mask value
+            *   ...stack 3 is count
+            */
+            IF_CHECK_STACK(4)
+            {
+                long a = stack[--stack_ptr];
+                long b = stack[--stack_ptr];
+                long_temp = stack[--stack_ptr];
+                count = (unsigned int) stack[stack_ptr - 1];
+
+                if ((count < 1) || (count > 32))
+                {
+                    status = JBIC_BOUNDS_ERROR;
+                }
+                else
+                {
+                    long_temp &= ((-1L) >> (32 - count));
+
+                    stack[stack_ptr - 1] =
+                        ((a & long_temp) == (b & long_temp)) ? 1L : 0L;
+                }
+            }
+            break;
+
+        case 0x13: /* PINT */
+            /*
+            *   PRINT add integer
+            *   ...stack 0 is integer value
+            */
+            IF_CHECK_STACK(1)
+            {
+                jbi_ltoa(&message_buffer[jbi_strlen(message_buffer)],
+                    stack[--stack_ptr]);
+            }
+            break;
+
+        case 0x14: /* PRNT */
+            /*
+            *   PRINT finish
+            */
+            jbi_message(message_buffer);
+            message_buffer[0] = '\0';
+            break;
+
+        case 0x15: /* DSS  */
+            /*
+            *   DRSCAN short
+            *   ...stack 0 is scan data
+            *   ...stack 1 is count
+            */
+            IF_CHECK_STACK(2)
+            {
+                long_temp = stack[--stack_ptr];
+                count = (unsigned int) stack[--stack_ptr];
+                jbi_make_dword(charbuf, long_temp);
+                status = jbi_do_drscan(count, charbuf, 0);
+            }
+            break;
+
+        case 0x16: /* DSSC */
+            /*
+            *   DRSCAN short with capture
+            *   ...stack 0 is scan data
+            *   ...stack 1 is count
+            */
+            IF_CHECK_STACK(2)
+            {
+                long_temp = stack[--stack_ptr];
+                count = (unsigned int) stack[stack_ptr - 1];
+                jbi_make_dword(charbuf, long_temp);
+                status = jbi_swap_dr(count, charbuf, 0, charbuf, 0);
+                stack[stack_ptr - 1] = jbi_get_dword(charbuf);
+            }
+            break;
+
+        case 0x17: /* ISS  */
+            /*
+            *   IRSCAN short
+            *   ...stack 0 is scan data
+            *   ...stack 1 is count
+            */
+            IF_CHECK_STACK(2)
+            {
+                long_temp = stack[--stack_ptr];
+                count = (unsigned int) stack[--stack_ptr];
+                jbi_make_dword(charbuf, long_temp);
+                status = jbi_do_irscan(count, charbuf, 0);
+            }
+            break;
+
+        case 0x18: /* ISSC */
+            /*
+            *   IRSCAN short with capture
+            *   ...stack 0 is scan data
+            *   ...stack 1 is count
+            */
+            IF_CHECK_STACK(2)
+            {
+                long_temp = stack[--stack_ptr];
+                count = (unsigned int) stack[stack_ptr - 1];
+                jbi_make_dword(charbuf, long_temp);
+                status = jbi_swap_ir(count, charbuf, 0, charbuf, 0);
+                stack[stack_ptr - 1] = jbi_get_dword(charbuf);
+            }
+            break;
+
+        case 0x19: /* VSS  */
+            /*
+            *   VECTOR short
+            *   ...stack 0 is scan data
+            *   ...stack 1 is count
+            */
+            bad_opcode = 1;
+            break;
+
+        case 0x1A: /* VSSC */
+            /*
+            *   VECTOR short with capture
+            *   ...stack 0 is scan data
+            *   ...stack 1 is count
+            */
+            bad_opcode = 1;
+            break;
+
+        case 0x1B: /* VMPF */
+            /*
+            *   VMAP finish
+            */
+            bad_opcode = 1;
+            break;
+
+        case 0x1C: /* DPR  */
+            IF_CHECK_STACK(1)
+            {
+                count = (unsigned int) stack[--stack_ptr];
+                status = jbi_set_dr_preamble(count, 0, NULL);
+            }
+            break;
+
+        case 0x1D: /* DPRL */
+            /*
+            *   DRPRE with literal data
+            *   ...stack 0 is count
+            *   ...stack 1 is literal data
+            */
+            IF_CHECK_STACK(2)
+            {
+                count = (unsigned int) stack[--stack_ptr];
+                long_temp = stack[--stack_ptr];
+                jbi_make_dword(charbuf, long_temp);
+                status = jbi_set_dr_preamble(count, 0, charbuf);
+            }
+            break;
+
+        case 0x1E: /* DPO  */
+            /*
+            *   DRPOST
+            *   ...stack 0 is count
+            */
+            IF_CHECK_STACK(1)
+            {
+                count = (unsigned int) stack[--stack_ptr];
+                status = jbi_set_dr_postamble(count, 0, NULL);
+            }
+            break;
+
+        case 0x1F: /* DPOL */
+            /*
+            *   DRPOST with literal data
+            *   ...stack 0 is count
+            *   ...stack 1 is literal data
+            */
+            IF_CHECK_STACK(2)
+            {
+                count = (unsigned int) stack[--stack_ptr];
+                long_temp = stack[--stack_ptr];
+                jbi_make_dword(charbuf, long_temp);
+                status = jbi_set_dr_postamble(count, 0, charbuf);
+            }
+            break;
+
+        case 0x20: /* IPR  */
+            IF_CHECK_STACK(1)
+            {
+                count = (unsigned int) stack[--stack_ptr];
+                status = jbi_set_ir_preamble(count, 0, NULL);
+            }
+            break;
+
+        case 0x21: /* IPRL */
+            /*
+            *   IRPRE with literal data
+            *   ...stack 0 is count
+            *   ...stack 1 is literal data
+            */
+            IF_CHECK_STACK(2)
+            {
+                count = (unsigned int) stack[--stack_ptr];
+                long_temp = stack[--stack_ptr];
+                jbi_make_dword(charbuf, long_temp);
+                status = jbi_set_ir_preamble(count, 0, charbuf);
+            }
+            break;
+
+        case 0x22: /* IPO  */
+            /*
+            *   IRPOST
+            *   ...stack 0 is count
+            */
+            IF_CHECK_STACK(1)
+            {
+                count = (unsigned int) stack[--stack_ptr];
+                status = jbi_set_ir_postamble(count, 0, NULL);
+            }
+            break;
+
+        case 0x23: /* IPOL */
+            /*
+            *   IRPOST with literal data
+            *   ...stack 0 is count
+            *   ...stack 1 is literal data
+            */
+            IF_CHECK_STACK(2)
+            {
+                count = (unsigned int) stack[--stack_ptr];
+                long_temp = stack[--stack_ptr];
+                jbi_make_dword(charbuf, long_temp);
+                status = jbi_set_ir_postamble(count, 0, charbuf);
+            }
+            break;
+
+        case 0x24: /* PCHR */
+            IF_CHECK_STACK(1)
+            {
+                unsigned char ch;
+                count = jbi_strlen(message_buffer);
+                ch = (char) stack[--stack_ptr];
+                if ((ch < 1) || (ch > 127))
+                {
+                    /* character code out of range */
+                    /* instead of flagging an error, force the value to 127 */
+                    ch = 127;
+                }
+                message_buffer[count] = ch;
+                message_buffer[count + 1] = '\0';
+            }
+            break;
+
+        case 0x25: /* EXIT */
+            IF_CHECK_STACK(1)
+            {
+                *exit_code = (int) stack[--stack_ptr];
+            }
+            done = 1;
+            break;
+
+        case 0x26: /* EQU  */
+            IF_CHECK_STACK(2)
+            {
+                --stack_ptr;
+                stack[stack_ptr - 1] =
+                    (stack[stack_ptr - 1] == stack[stack_ptr]) ? 1L : 0L;
+            }
+            break;
+
+        case 0x27: /* POPT  */
+            IF_CHECK_STACK(1)
+            {
+                --stack_ptr;
+            }
+            break;
+
+        case 0x28: /* TRST  */
+            bad_opcode = 1;
+            break;
+
+        case 0x29: /* FRQ   */
+            bad_opcode = 1;
+            break;
+
+        case 0x2A: /* FRQU  */
+            bad_opcode = 1;
+            break;
+
+        case 0x2B: /* PD32  */
+            bad_opcode = 1;
+            break;
+
+        case 0x2C: /* ABS   */
+            IF_CHECK_STACK(1)
+            {
+                if (stack[stack_ptr - 1] < 0)
+                {
+                    stack[stack_ptr - 1] = 0 - stack[stack_ptr - 1];
+                }
+            }
+            break;
+
+        case 0x2D: /* BCH0  */
+            /*
+            *   Batch operation 0
+            *   SWP
+            *   SWPN 7
+            *   SWP
+            *   SWPN 6
+            *   DUPN 8
+            *   SWPN 2
+            *   SWP
+            *   DUPN 6
+            *   DUPN 6
+            */
+
+            /* SWP  */
+            IF_CHECK_STACK(2)
+            {
+                long_temp = stack[stack_ptr - 2];
+                stack[stack_ptr - 2] = stack[stack_ptr - 1];
+                stack[stack_ptr - 1] = long_temp;
+            }
+
+            /* SWPN 7 */
+            index = 7 + 1;
+            IF_CHECK_STACK(index)
+            {
+                long_temp = stack[stack_ptr - index];
+                stack[stack_ptr - index] = stack[stack_ptr - 1];
+                stack[stack_ptr - 1] = long_temp;
+            }
+
+            /* SWP  */
+            IF_CHECK_STACK(2)
+            {
+                long_temp = stack[stack_ptr - 2];
+                stack[stack_ptr - 2] = stack[stack_ptr - 1];
+                stack[stack_ptr - 1] = long_temp;
+            }
+
+            /* SWPN 6 */
+            index = 6 + 1;
+            IF_CHECK_STACK(index)
+            {
+                long_temp = stack[stack_ptr - index];
+                stack[stack_ptr - index] = stack[stack_ptr - 1];
+                stack[stack_ptr - 1] = long_temp;
+            }
+
+            /* DUPN 8 */
+            index = 8 + 1;
+            IF_CHECK_STACK(index)
+            {
+                stack[stack_ptr] = stack[stack_ptr - index];
+                ++stack_ptr;
+            }
+
+            /* SWPN 2 */
+            index = 2 + 1;
+            IF_CHECK_STACK(index)
+            {
+                long_temp = stack[stack_ptr - index];
+                stack[stack_ptr - index] = stack[stack_ptr - 1];
+                stack[stack_ptr - 1] = long_temp;
+            }
+
+            /* SWP  */
+            IF_CHECK_STACK(2)
+            {
+                long_temp = stack[stack_ptr - 2];
+                stack[stack_ptr - 2] = stack[stack_ptr - 1];
+                stack[stack_ptr - 1] = long_temp;
+            }
+
+            /* DUPN 6 */
+            index = 6 + 1;
+            IF_CHECK_STACK(index)
+            {
+                stack[stack_ptr] = stack[stack_ptr - index];
+                ++stack_ptr;
+            }
+
+            /* DUPN 6 */
+            index = 6 + 1;
+            IF_CHECK_STACK(index)
+            {
+                stack[stack_ptr] = stack[stack_ptr - index];
+                ++stack_ptr;
+            }
+            break;
+
+        case 0x2E: /* BCH1  */
+            /*
+            *   Batch operation 1
+            *   SWPN 8
+            *   SWP
+            *   SWPN 9
+            *   SWPN 3
+            *   SWP
+            *   SWPN 2
+            *   SWP
+            *   SWPN 7
+            *   SWP
+            *   SWPN 6
+            *   DUPN 5
+            *   DUPN 5
+            */
+            bad_opcode = 1;
+            break;
+
+        case 0x2F: /* PSH0  */
+            stack[stack_ptr++] = 0;
+            break;
+
+        case 0x40: /* PSHL */
+            stack[stack_ptr++] = (long) args[0];
+            break;
+
+        case 0x41: /* PSHV */
+            stack[stack_ptr++] = variables[args[0]];
+            break;
+
+        case 0x42: /* JMP  */
+            pc = args[0] + code_section;
+            CHECK_PC;
+            break;
+
+        case 0x43: /* CALL */
+            stack[stack_ptr++] = pc;
+            pc = args[0] + code_section;
+            CHECK_PC;
+            break;
+
+        case 0x44: /* NEXT */
+            /*
+            *   Process FOR / NEXT loop
+            *   ...argument 0 is variable ID
+            *   ...stack 0 is step value
+            *   ...stack 1 is end value
+            *   ...stack 2 is top address
+            */
+            IF_CHECK_STACK(3)
+            {
+                long step = stack[stack_ptr - 1];
+                long end = stack[stack_ptr - 2];
+                long top = stack[stack_ptr - 3];
+                long iterator = variables[args[0]];
+                int break_out = 0;
+
+                if (step < 0)
+                {
+                    if (iterator <= end) break_out = 1;
+                }
+                else
+                {
+                    if (iterator >= end) break_out = 1;
+                }
+
+                if (break_out)
+                {
+                    stack_ptr -= 3;
+                }
+                else
+                {
+                    variables[args[0]] = iterator + step;
+                    pc = top + code_section;
+                    CHECK_PC;
+                }
+            }
+            break;
+
+        case 0x45: /* PSTR */
+            /*
+            *   PRINT add string
+            *   ...argument 0 is string ID
+            */
+#if PORT==DOS
+            long_index = string_table + args[0];
+            index2 = jbi_strlen(message_buffer);
+
+            do
+            {
+                i = GET_BYTE(long_index);
+                message_buffer[index2] = (char) i;
+                ++long_index;
+                ++index2;
+            }
+            while ((i != '\0') && (index2 < JBIC_MESSAGE_LENGTH));
+#else
+            count = jbi_strlen(message_buffer);
+            jbi_strncpy(&message_buffer[count],
+                (char *) &program[string_table + args[0]],
+                JBIC_MESSAGE_LENGTH - count);
+#endif
+            message_buffer[JBIC_MESSAGE_LENGTH] = '\0';
+            break;
+
+        case 0x46: /* VMAP */
+            /*
+            *   VMAP add signal name
+            *   ...argument 0 is string ID
+            */
+            bad_opcode = 1;
+            break;
+
+        case 0x47: /* SINT */
+            /*
+            *   STATE intermediate state
+            *   ...argument 0 is state code
+            */
+            status = jbi_goto_jtag_state((int) args[0]);
+            break;
+
+        case 0x48: /* ST   */
+            /*
+            *   STATE final state
+            *   ...argument 0 is state code
+            */
+            status = jbi_goto_jtag_state((int) args[0]);
+            break;
+
+        case 0x49: /* ISTP */
+            /*
+            *   IRSTOP state
+            *   ...argument 0 is state code
+            */
+            status = jbi_set_irstop_state((int) args[0]);
+            break;
+
+        case 0x4A: /* DSTP */
+            /*
+            *   DRSTOP state
+            *   ...argument 0 is state code
+            */
+            status = jbi_set_drstop_state((int) args[0]);
+            break;
+
+        case 0x4B: /* SWPN */
+            /*
+            *   Exchange top with Nth stack value
+            *   ...argument 0 is 0-based stack entry to swap with top element
+            */
+            index = ((int) args[0]) + 1;
+            IF_CHECK_STACK(index)
+            {
+                long_temp = stack[stack_ptr - index];
+                stack[stack_ptr - index] = stack[stack_ptr - 1];
+                stack[stack_ptr - 1] = long_temp;
+            }
+            break;
+
+        case 0x4C: /* DUPN */
+            /*
+            *   Duplicate Nth stack value
+            *   ...argument 0 is 0-based stack entry to duplicate
+            */
+            index = ((int) args[0]) + 1;
+            IF_CHECK_STACK(index)
+            {
+                stack[stack_ptr] = stack[stack_ptr - index];
+                ++stack_ptr;
+            }
+            break;
+
+        case 0x4D: /* POPV */
+            /*
+            *   Pop stack into scalar variable
+            *   ...argument 0 is variable ID
+            *   ...stack 0 is value
+            */
+            IF_CHECK_STACK(1)
+            {
+                variables[args[0]] = stack[--stack_ptr];
+            }
+            break;
+
+        case 0x4E: /* POPE */
+            /*
+            *   Pop stack into integer array element
+            *   ...argument 0 is variable ID
+            *   ...stack 0 is array index
+            *   ...stack 1 is value
+            */
+            IF_CHECK_STACK(2)
+            {
+                variable_id = (unsigned int) args[0];
+
+                /*
+                *   If variable is read-only, convert to writable array
+                */
+                if ((version > 0) &&
+                    ((attributes[variable_id] & 0x9c) == 0x1c))
+                {
+                    /*
+                    *   Allocate a writable buffer for this array
+                    */
+                    count = (unsigned int) variable_size[variable_id];
+                    long_temp = variables[variable_id];
+                    longptr_temp = (long *) jbi_malloc(count * sizeof(long));
+                    variables[variable_id] = (addr_t) longptr_temp;
+
+                    if (variables[variable_id] == (addr_t) NULL)
+                    {
+                        status = JBIC_OUT_OF_MEMORY;
+                        break;
+                    }
+                    else
+                    {
+                        /* copy previous contents into buffer */
+                        for (i = 0; i < count; ++i)
+                        {
+                            longptr_temp[i] = GET_DWORD(long_temp);
+                            long_temp += 4L;
+                        }
+
+                        /* set bit 7 - buffer was dynamically allocated */
+                        attributes[variable_id] |= 0x80;
+
+                        /* clear bit 2 - variable is writable */
+                        attributes[variable_id] &= ~0x04;
+                        attributes[variable_id] |= 0x01;
+                    }
+                }
+
+#if PORT==DOS
+                /* for 16-bit version, allow writing in allocated buffers */
+                if ((version > 0) &&
+                    ((attributes[variable_id] & 0x9c) == 0x9c))
+                {
+                    attributes[variable_id] &= ~0x04;
+                    attributes[variable_id] |= 0x01;
+                }
+#endif
+
+                /* check that variable is a writable integer array */
+                if ((attributes[variable_id] & 0x1c) != 0x18)
+                {
+                    status = JBIC_BOUNDS_ERROR;
+                }
+                else
+                {
+                    longptr_temp = (long *) variables[variable_id];
+
+                    /* pop the array index */
+                    index = (unsigned int) stack[--stack_ptr];
+
+                    /* pop the value and store it into the array */
+                    longptr_temp[index] = stack[--stack_ptr];
+                }
+            }
+            break;
+
+        case 0x4F: /* POPA */
+            /*
+            *   Pop stack into Boolean array
+            *   ...argument 0 is variable ID
+            *   ...stack 0 is count
+            *   ...stack 1 is array index
+            *   ...stack 2 is value
+            */
+            IF_CHECK_STACK(3)
+            {
+                variable_id = (unsigned int) args[0];
+
+                /*
+                *   If variable is read-only, convert to writable array
+                */
+                if ((version > 0) &&
+                    ((attributes[variable_id] & 0x9c) == 0x0c))
+                {
+                    /*
+                    *   Allocate a writable buffer for this array
+                    */
+                    long_temp = (variable_size[variable_id] + 7L) >> 3L;
+                    charptr_temp2 = (unsigned char *) variables[variable_id];
+                    charptr_temp = jbi_malloc((unsigned int) long_temp);
+                    variables[variable_id] = (addr_t) charptr_temp;
+
+                    if (variables[variable_id] == (addr_t) NULL)
+                    {
+                        status = JBIC_OUT_OF_MEMORY;
+                    }
+                    else
+                    {
+                        /* zero the buffer */
+                        for (long_index = 0L;
+                            long_index < long_temp;
+                            ++long_index)
+                        {
+                            charptr_temp[long_index] = 0;
+                        }
+
+                        /* copy previous contents into buffer */
+                        for (long_index = 0L;
+                            long_index < variable_size[variable_id];
+                            ++long_index)
+                        {
+#if PORT==DOS
+                            if ((attributes[variable_id] & 0x02) &&
+                                ((long_index & 0x0000FFFF) == 0L))
+                            {
+                                /* initialized compressed Boolean array */
+                                jbi_uncompress_page(variable_id,
+                                    (int) (long_index >> 16), version);
+                                charptr_temp = jbi_aca_out_buffer;
+                                long_index2 = long_index & 0xFFFF;
+                            }
+#else
+                            long_index2 = long_index;
+#endif
+
+                            if (charptr_temp2[long_index2 >> 3] &
+                                (1 << (long_index2 & 7)))
+                            {
+                                charptr_temp[long_index >> 3] |=
+                                    (1 << (long_index & 7));
+                            }
+                        }
+
+                        /* set bit 7 - buffer was dynamically allocated */
+                        attributes[variable_id] |= 0x80;
+
+                        /* clear bit 2 - variable is writable */
+                        attributes[variable_id] &= ~0x04;
+                        attributes[variable_id] |= 0x01;
+                    }
+                }
+
+#if PORT==DOS
+                /* for 16-bit version, allow writing in allocated buffers */
+                if ((version > 0) &&
+                    ((attributes[variable_id] & 0x9c) == 0x8c))
+                {
+                    attributes[variable_id] &= ~0x04;
+                    attributes[variable_id] |= 0x01;
+                }
+#endif
+
+                /* check that variable is a writable Boolean array */
+                if ((attributes[variable_id] & 0x1c) != 0x08)
+                {
+                    status = JBIC_BOUNDS_ERROR;
+                }
+                else
+                {
+                    charptr_temp = (unsigned char *) variables[variable_id];
+
+                    /* pop the count (number of bits to copy) */
+                    long_count = stack[--stack_ptr];
+
+                    /* pop the array index */
+                    long_index = stack[--stack_ptr];
+
+                    reverse = 0;
+
+                    if (version > 0)
+                    {
+                        /* stack 0 = array right index */
+                        /* stack 1 = array left index */
+
+                        if (long_index > long_count)
+                        {
+                            reverse = 1;
+                            long_temp = long_count;
+                            long_count = 1 + long_index - long_count;
+                            long_index = long_temp;
+
+                            /* reverse POPA is not supported */
+                            status = JBIC_BOUNDS_ERROR;
+                            break;
+                        }
+                        else
+                        {
+                            long_count = 1 + long_count - long_index;
+                        }
+                    }
+
+                    /* pop the data */
+                    long_temp = stack[--stack_ptr];
+
+                    if (long_count < 1)
+                    {
+                        status = JBIC_BOUNDS_ERROR;
+                    }
+                    else
+                    {
+                        for (i = 0; i < (unsigned int) long_count; ++i)
+                        {
+                            if (long_temp & (1L << (long) i))
+                            {
+                                charptr_temp[long_index >> 3L] |=
+                                    (1L << (long_index & 7L));
+                            }
+                            else
+                            {
+                                charptr_temp[long_index >> 3L] &=
+                                    ~ (unsigned int) (1L << (long_index & 7L));
+                            }
+                            ++long_index;
+                        }
+                    }
+                }
+            }
+            break;
+
+        case 0x50: /* JMPZ */
+            /*
+            *   Pop stack and branch if zero
+            *   ...argument 0 is address
+            *   ...stack 0 is condition value
+            */
+            IF_CHECK_STACK(1)
+            {
+                if (stack[--stack_ptr] == 0)
+                {
+                    pc = args[0] + code_section;
+                    CHECK_PC;
+                }
+            }
+            break;
+
+        case 0x51: /* DS   */
+        case 0x52: /* IS   */
+            /*
+            *   DRSCAN
+            *   IRSCAN
+            *   ...argument 0 is scan data variable ID
+            *   ...stack 0 is array index
+            *   ...stack 1 is count
+            */
+            IF_CHECK_STACK(2)
+            {
+                long_index = stack[--stack_ptr];
+                long_count = stack[--stack_ptr];
+
+                reverse = 0;
+
+                if (version > 0)
+                {
+                    /* stack 0 = array right index */
+                    /* stack 1 = array left index */
+                    /* stack 2 = count */
+                    long_temp = long_count;
+                    long_count = stack[--stack_ptr];
+
+                    if (long_index > long_temp)
+                    {
+                        reverse = 1;
+                        long_index = long_temp;
+                    }
+                }
+
+#if PORT==DOS
+                if (((long_index & 0xFFFF0000) == 0) &&
+                    ((long_count & 0xFFFF0000) == 0))
+                {
+                    variable_id = (unsigned int) args[0];
+                    if ((attributes[variable_id] & 0x1e) == 0x0e)
+                    {
+                        /* initialized compressed Boolean array */
+                        jbi_uncompress_page(variable_id,
+                            (int) (long_index >> 16), version);
+                        long_index &= 0x0000ffff;
+                        charptr_temp = jbi_aca_out_buffer;
+                    }
+                    else
+                    {
+                        charptr_temp = (unsigned char *) variables[variable_id];
+                    }
+
+                    if (reverse)
+                    {
+                        /* allocate a buffer and reverse the data order */
+                        charptr_temp2 = charptr_temp;
+                        charptr_temp = jbi_malloc((unsigned int)
+                            ((long_count >> 3L) + 1L));
+
+                        if (charptr_temp == NULL)
+                        {
+                            status = JBIC_OUT_OF_MEMORY;
+                            break;
+                        }
+                        else
+                        {
+                            long_temp = long_index + long_count - 1;
+                            long_index2 = 0;
+                            while (long_index2 < long_count)
+                            {
+                                if (charptr_temp2[long_temp >> 3] &
+                                    (1 << (long_temp & 7)))
+                                {
+                                    charptr_temp[long_index2 >> 3] |=
+                                        (1 << (long_index2 & 7));
+                                }
+                                else
+                                {
+                                    charptr_temp[long_index2 >> 3] &=
+                                        ~(1 << (long_index2 & 7));
+                                }
+
+                                --long_temp;
+                                ++long_index2;
+                            }
+                        }
+                    }
+
+                    if (opcode == 0x51) /* DS */
+                    {
+                        status = jbi_do_drscan((unsigned int) long_count,
+                            charptr_temp, (unsigned long) long_index);
+                    }
+                    else    /* IS */
+                    {
+                        status = jbi_do_irscan((unsigned int) long_count,
+                            charptr_temp, (unsigned int) long_index);
+                    }
+
+                    if (reverse) jbi_free(charptr_temp);
+                }
+                else if ((opcode == 0x51) && !reverse)
+                {
+                    status = jbi_do_drscan_multi_page(
+                        (unsigned int) args[0],
+                        (unsigned long) long_count,
+                        (unsigned long) long_index, version);
+                }
+                else
+                {
+                    /* reverse multi-page scans are not supported */
+                    /* multi-page IR scans are not supported */
+                    status = JBIC_BOUNDS_ERROR;
+                }
+#else
+                charptr_temp = (unsigned char *) variables[args[0]];
+
+                if (reverse)
+                {
+                    /* allocate a buffer and reverse the data order */
+                    charptr_temp2 = charptr_temp;
+                    charptr_temp = jbi_malloc((long_count >> 3) + 1);
+                    if (charptr_temp == NULL)
+                    {
+                        status = JBIC_OUT_OF_MEMORY;
+                        break;
+                    }
+                    else
+                    {
+                        long_temp = long_index + long_count - 1;
+                        long_index2 = 0;
+                        while (long_index2 < long_count)
+                        {
+                            if (charptr_temp2[long_temp >> 3] &
+                                (1 << (long_temp & 7)))
+                            {
+                                charptr_temp[long_index2 >> 3] |=
+                                    (1 << (long_index2 & 7));
+                            }
+                            else
+                            {
+                                charptr_temp[long_index2 >> 3] &=
+                                    ~(1 << (long_index2 & 7));
+                            }
+
+                            --long_temp;
+                            ++long_index2;
+                        }
+                    }
+                }
+
+                if (opcode == 0x51) /* DS */
+                {
+                    status = jbi_do_drscan((unsigned int) long_count,
+                        charptr_temp, (unsigned long) long_index);
+                }
+                else    /* IS */
+                {
+                    status = jbi_do_irscan((unsigned int) long_count,
+                        charptr_temp, (unsigned int) long_index);
+                }
+#endif
+
+                if (reverse && (charptr_temp != NULL))
+                {
+                    jbi_free(charptr_temp);
+                }
+            }
+            break;
+
+        case 0x53: /* DPRA */
+            /*
+            *   DRPRE with array data
+            *   ...argument 0 is variable ID
+            *   ...stack 0 is array index
+            *   ...stack 1 is count
+            */
+            IF_CHECK_STACK(2)
+            {
+                index = (unsigned int) stack[--stack_ptr];
+                count = (unsigned int) stack[--stack_ptr];
+
+                if (version > 0)
+                {
+                    /* stack 0 = array right index */
+                    /* stack 1 = array left index */
+                    count = 1 + count - index;
+                }
+
+                charptr_temp = (unsigned char *) variables[args[0]];
+                status = jbi_set_dr_preamble(count, index, charptr_temp);
+            }
+            break;
+
+        case 0x54: /* DPOA */
+            /*
+            *   DRPOST with array data
+            *   ...argument 0 is variable ID
+            *   ...stack 0 is array index
+            *   ...stack 1 is count
+            */
+            IF_CHECK_STACK(2)
+            {
+                index = (unsigned int) stack[--stack_ptr];
+                count = (unsigned int) stack[--stack_ptr];
+
+                if (version > 0)
+                {
+                    /* stack 0 = array right index */
+                    /* stack 1 = array left index */
+                    count = 1 + count - index;
+                }
+
+                charptr_temp = (unsigned char *) variables[args[0]];
+                status = jbi_set_dr_postamble(count, index, charptr_temp);
+            }
+            break;
+
+        case 0x55: /* IPRA */
+            /*
+            *   IRPRE with array data
+            *   ...argument 0 is variable ID
+            *   ...stack 0 is array index
+            *   ...stack 1 is count
+            */
+            IF_CHECK_STACK(2)
+            {
+                index = (unsigned int) stack[--stack_ptr];
+                count = (unsigned int) stack[--stack_ptr];
+
+                if (version > 0)
+                {
+                    /* stack 0 = array right index */
+                    /* stack 1 = array left index */
+                    count = 1 + count - index;
+                }
+
+                charptr_temp = (unsigned char *) variables[args[0]];
+                status = jbi_set_ir_preamble(count, index, charptr_temp);
+            }
+            break;
+
+        case 0x56: /* IPOA */
+            /*
+            *   IRPOST with array data
+            *   ...argument 0 is variable ID
+            *   ...stack 0 is array index
+            *   ...stack 1 is count
+            */
+            IF_CHECK_STACK(2)
+            {
+                index = (unsigned int) stack[--stack_ptr];
+                count = (unsigned int) stack[--stack_ptr];
+
+                if (version > 0)
+                {
+                    /* stack 0 = array right index */
+                    /* stack 1 = array left index */
+                    count = 1 + count - index;
+                }
+
+                charptr_temp = (unsigned char *) variables[args[0]];
+                status = jbi_set_ir_postamble(count, index, charptr_temp);
+            }
+            break;
+
+        case 0x57: /* EXPT */
+            /*
+            *   EXPORT
+            *   ...argument 0 is string ID
+            *   ...stack 0 is integer expression
+            */
+            IF_CHECK_STACK(1)
+            {
+#if PORT==DOS
+                name_id = args[0];
+                for (j = 0; j < 32; ++j)
+                {
+                    name[j] = GET_BYTE(string_table + name_id + j);
+                }
+                name[32] = '\0';
+#else
+                name = (char *) &program[string_table + args[0]];
+#endif
+                long_temp = stack[--stack_ptr];
+                jbi_export_integer(name, long_temp);
+            }
+            break;
+
+        case 0x58: /* PSHE */
+            /*
+            *   Push integer array element
+            *   ...argument 0 is variable ID
+            *   ...stack 0 is array index
+            */
+            IF_CHECK_STACK(1)
+            {
+                variable_id = (unsigned int) args[0];
+                index = (unsigned int) stack[stack_ptr - 1];
+
+                /* check variable type */
+                if ((attributes[variable_id] & 0x1f) == 0x19)
+                {
+                    /* writable integer array */
+                    longptr_temp = (long *) variables[variable_id];
+                    stack[stack_ptr - 1] = longptr_temp[index];
+                }
+                else if ((attributes[variable_id] & 0x1f) == 0x1c)
+                {
+                    /* read-only integer array */
+                    long_temp = variables[variable_id] + (4L * index);
+                    stack[stack_ptr - 1] = GET_DWORD(long_temp);
+                }
+                else
+                {
+                    status = JBIC_BOUNDS_ERROR;
+                }
+            }
+            break;
+
+        case 0x59: /* PSHA */
+            /*
+            *   Push Boolean array
+            *   ...argument 0 is variable ID
+            *   ...stack 0 is count
+            *   ...stack 1 is array index
+            */
+            IF_CHECK_STACK(2)
+            {
+                variable_id = (unsigned int) args[0];
+
+                /* check that variable is a Boolean array */
+                if ((attributes[variable_id] & 0x18) != 0x08)
+                {
+                    status = JBIC_BOUNDS_ERROR;
+                }
+                else
+                {
+                    charptr_temp = (unsigned char *) variables[variable_id];
+
+                    /* pop the count (number of bits to copy) */
+                    count = (unsigned int) stack[--stack_ptr];
+
+                    /* pop the array index */
+                    index = (unsigned int) stack[stack_ptr - 1];
+
+                    if (version > 0)
+                    {
+                        /* stack 0 = array right index */
+                        /* stack 1 = array left index */
+                        count = 1 + count - index;
+                    }
+
+                    if ((count < 1) || (count > 32))
+                    {
+                        status = JBIC_BOUNDS_ERROR;
+                    }
+                    else
+                    {
+#if PORT==DOS
+                        if ((attributes[variable_id] & 0x1e) == 0x0e)
+                        {
+                            /* initialized compressed Boolean array */
+                            jbi_uncompress_page(variable_id,
+                                (int) (stack[stack_ptr - 1] >> 16), version);
+                            charptr_temp = jbi_aca_out_buffer;
+                        }
+#endif
+                        long_temp = 0L;
+
+                        for (i = 0; i < count; ++i)
+                        {
+                            if (charptr_temp[(i + index) >> 3] &
+                                (1 << ((i + index) & 7)))
+                            {
+                                long_temp |= (1L << i);
+                            }
+                        }
+
+                        stack[stack_ptr - 1] = long_temp;
+                    }
+                }
+            }
+            break;
+
+        case 0x5A: /* DYNA */
+            /*
+            *   Dynamically change size of array
+            *   ...argument 0 is variable ID
+            *   ...stack 0 is new size
+            */
+            IF_CHECK_STACK(1)
+            {
+                variable_id = (unsigned int) args[0];
+                long_temp = stack[--stack_ptr];
+
+                if (long_temp > variable_size[variable_id])
+                {
+                    variable_size[variable_id] = long_temp;
+
+                    if (attributes[variable_id] & 0x10)
+                    {
+                        /* allocate integer array */
+                        long_temp *= 4;
+                    }
+                    else
+                    {
+                        /* allocate Boolean array */
+                        long_temp = (long_temp + 7) >> 3;
+                    }
+
+                    /*
+                    *   If the buffer was previously allocated, free it
+                    */
+                    if ((attributes[variable_id] & 0x80) &&
+                        (variables[variable_id] != (addr_t) NULL))
+                    {
+                        jbi_free((void *) variables[variable_id]);
+                        variables[variable_id] = (addr_t) NULL;
+                    }
+
+                    /*
+                    *   Allocate a new buffer of the requested size
+                    */
+                    variables[variable_id] = (addr_t)
+                        jbi_malloc((unsigned int) long_temp);
+
+                    if (variables[variable_id] == (addr_t) NULL)
+                    {
+                        status = JBIC_OUT_OF_MEMORY;
+                    }
+                    else
+                    {
+                        /*
+                        *   Set the attribute bit to indicate that this buffer
+                        *   was dynamically allocated and should be freed later
+                        */
+                        attributes[variable_id] |= 0x80;
+
+                        /* zero out memory */
+                        count = (unsigned int)
+                            ((variable_size[variable_id] + 7L) / 8L);
+                        charptr_temp = (unsigned char *)
+                            (variables[variable_id]);
+                        for (index = 0; index < count; ++index)
+                        {
+                            charptr_temp[index] = 0;
+                        }
+                    }
+                }
+            }
+            break;
+
+        case 0x5B: /* EXPR */
+            bad_opcode = 1;
+            break;
+
+        case 0x5C: /* EXPV */
+            /*
+            *   Export Boolean array
+            *   ...argument 0 is string ID
+            *   ...stack 0 is variable ID
+            *   ...stack 1 is array right index
+            *   ...stack 2 is array left index
+            */
+            IF_CHECK_STACK(3)
+            {
+                if (version == 0)
+                {
+                    /* EXPV is not supported in JBC 1.0 */
+                    bad_opcode = 1;
+                    break;
+                }
+#if PORT==DOS
+                name_id = args[0];
+                for (j = 0; j < 32; ++j)
+                {
+                    name[j] = GET_BYTE(string_table + name_id + j);
+                }
+                name[32] = '\0';
+#else
+                name = (char *) &program[string_table + args[0]];
+#endif
+                variable_id = (unsigned int) stack[--stack_ptr];
+                long_index = stack[--stack_ptr];    /* right index */
+                long_index2 = stack[--stack_ptr];   /* left index */
+
+                if (long_index > long_index2)
+                {
+                    /* reverse indices not supported */
+                    status = JBIC_BOUNDS_ERROR;
+                    break;
+                }
+
+                long_count = 1 + long_index2 - long_index;
+
+                charptr_temp = (unsigned char *) variables[variable_id];
+                charptr_temp2 = NULL;
+
+#if PORT==DOS
+                if ((attributes[variable_id] & 0x1e) == 0x0e)
+                {
+                    /* initialized compressed Boolean array */
+                    jbi_uncompress_page(variable_id,
+                        (int) (long_index >> 16), version);
+                    charptr_temp = jbi_aca_out_buffer;
+                    long_index &= 0x0000FFFF;
+                }
+#endif
+
+                if ((long_index & 7L) != 0)
+                {
+                    charptr_temp2 = jbi_malloc((unsigned int)
+                        ((long_count + 7L) / 8L));
+                    if (charptr_temp2 == NULL)
+                    {
+                        status = JBIC_OUT_OF_MEMORY;
+                        break;
+                    }
+                    else
+                    {
+                        long k = long_index;
+                        for (i = 0; i < (unsigned int) long_count; ++i)
+                        {
+                            if (charptr_temp[k >> 3] & (1 << (k & 7)))
+                            {
+                                charptr_temp2[i >> 3] |= (1 << (i & 7));
+                            }
+                            else
+                            {
+                                charptr_temp2[i >> 3] &= ~(1 << (i & 7));
+                            }
+
+                            ++k;
+                        }
+                        charptr_temp = charptr_temp2;
+                    }
+                }
+                else if (long_index != 0)
+                {
+                    charptr_temp = &charptr_temp[long_index >> 3];
+                }
+
+                jbi_export_boolean_array(name, charptr_temp, long_count);
+
+                /* free allocated buffer */
+                if (((long_index & 7L) != 0) && (charptr_temp2 != NULL))
+                {
+                    jbi_free(charptr_temp2);
+                }
+            }
+            break;
+
+        case 0x80: /* COPY */
+            /*
+            *   Array copy
+            *   ...argument 0 is dest ID
+            *   ...argument 1 is source ID
+            *   ...stack 0 is count
+            *   ...stack 1 is dest index
+            *   ...stack 2 is source index
+            */
+            IF_CHECK_STACK(3)
+            {
+                long copy_count = stack[--stack_ptr];
+                long copy_index = stack[--stack_ptr];
+                long copy_index2 = stack[--stack_ptr];
+                long destleft;
+                long src_count;
+                long dest_count;
+                int src_reverse = 0;
+                int dest_reverse = 0;
+
+                reverse = 0;
+
+                if (version > 0)
+                {
+                    /* stack 0 = source right index */
+                    /* stack 1 = source left index */
+                    /* stack 2 = destination right index */
+                    /* stack 3 = destination left index */
+                    destleft = stack[--stack_ptr];
+
+                    if (copy_count > copy_index)
+                    {
+                        src_reverse = 1;
+                        reverse = 1;
+                        src_count = 1 + copy_count - copy_index;
+                        /* copy_index = source start index */
+                    }
+                    else
+                    {
+                        src_count = 1 + copy_index - copy_count;
+                        copy_index = copy_count;    /* source start index */
+                    }
+
+                    if (copy_index2 > destleft)
+                    {
+                        dest_reverse = 1;
+                        reverse = !reverse;
+                        dest_count = 1 + copy_index2 - destleft;
+                        copy_index2 = destleft; /* destination start index */
+                    }
+                    else
+                    {
+                        dest_count = 1 + destleft - copy_index2;
+                        /* copy_index2 = destination start index */
+                    }
+
+                    copy_count = (src_count < dest_count) ? src_count : dest_count;
+
+                    if ((src_reverse || dest_reverse) &&
+                        (src_count != dest_count))
+                    {
+                        /* If either the source or destination is reversed, */
+                        /* we can't tolerate a length mismatch, because we  */
+                        /* "left justify" the arrays when copying.  This    */
+                        /* won't work correctly with reversed arrays.       */
+                        status = JBIC_BOUNDS_ERROR;
+                    }
+                }
+
+                count = (unsigned int) copy_count;
+                index = (unsigned int) copy_index;
+                index2 = (unsigned int) copy_index2;
+
+                /*
+                *   If destination is a read-only array, allocate a buffer
+                *   and convert it to a writable array
+                */
+                variable_id = (unsigned int) args[1];
+                if ((version > 0) && ((attributes[variable_id] & 0x9c) == 0x0c))
+                {
+                    /*
+                    *   Allocate a writable buffer for this array
+                    */
+                    long_temp = (variable_size[variable_id] + 7L) >> 3L;
+                    charptr_temp2 = (unsigned char *) variables[variable_id];
+                    charptr_temp = jbi_malloc((unsigned int) long_temp);
+                    variables[variable_id] = (addr_t) charptr_temp;
+
+                    if (variables[variable_id] == (addr_t) NULL)
+                    {
+                        status = JBIC_OUT_OF_MEMORY;
+                        break;
+                    }
+                    else
+                    {
+                        /* zero the buffer */
+                        for (long_index = 0L;
+                            long_index < long_temp;
+                            ++long_index)
+                        {
+                            charptr_temp[long_index] = 0;
+                        }
+
+                        /* copy previous contents into buffer */
+                        for (long_index = 0L;
+                            long_index < variable_size[variable_id];
+                            ++long_index)
+                        {
+#if PORT==DOS
+                            if ((attributes[variable_id] & 0x02) &&
+                                ((long_index & 0x0000FFFF) == 0L))
+                            {
+                                /* initialized compressed Boolean array */
+                                jbi_uncompress_page(variable_id,
+                                    (int) (long_index >> 16), version);
+                                charptr_temp = jbi_aca_out_buffer;
+                                long_index2 = long_index & 0xFFFF;
+                            }
+#else
+                            long_index2 = long_index;
+#endif
+
+                            if (charptr_temp2[long_index2 >> 3] &
+                                (1 << (long_index2 & 7)))
+                            {
+                                charptr_temp[long_index >> 3] |=
+                                    (1 << (long_index & 7));
+                            }
+                        }
+
+                        /* set bit 7 - buffer was dynamically allocated */
+                        attributes[variable_id] |= 0x80;
+
+                        /* clear bit 2 - variable is writable */
+                        attributes[variable_id] &= ~0x04;
+                        attributes[variable_id] |= 0x01;
+                    }
+                }
+
+#if PORT==DOS
+                /* for 16-bit version, allow writing in allocated buffers */
+                if ((version > 0) &&
+                    ((attributes[variable_id] & 0x9c) == 0x8c))
+                {
+                    attributes[variable_id] &= ~0x04;
+                    attributes[variable_id] |= 0x01;
+                }
+#endif
+
+                charptr_temp = (unsigned char *) variables[args[1]];
+                charptr_temp2 = (unsigned char *) variables[args[0]];
+
+#if PORT==DOS
+                variable_id = (unsigned int) args[0];
+                if ((attributes[variable_id] & 0x1e) == 0x0e)
+                {
+                    /* initialized compressed Boolean array */
+                    jbi_uncompress_page(variable_id,
+                        (int) (copy_index >> 16), version);
+                    charptr_temp2 = jbi_aca_out_buffer;
+                }
+#endif
+
+                /* check that destination is a writable Boolean array */
+                if ((attributes[args[1]] & 0x1c) != 0x08)
+                {
+                    status = JBIC_BOUNDS_ERROR;
+                    break;
+                }
+
+                if (count < 1)
+                {
+                    status = JBIC_BOUNDS_ERROR;
+                }
+                else
+                {
+                    if (reverse)
+                    {
+                        index2 += (count - 1);
+                    }
+
+                    for (i = 0; i < count; ++i)
+                    {
+                        if (charptr_temp2[index >> 3] & (1 << (index & 7)))
+                        {
+                            charptr_temp[index2 >> 3] |= (1 << (index2 & 7));
+                        }
+                        else
+                        {
+                            charptr_temp[index2 >> 3] &=
+                                ~(unsigned int) (1 << (index2 & 7));
+                        }
+                        ++index;
+                        if (reverse) --index2; else ++index2;
+                    }
+                }
+            }
+            break;
+
+        case 0x81: /* REVA */
+            /*
+            *   ARRAY COPY reversing bit order
+            *   ...argument 0 is dest ID
+            *   ...argument 1 is source ID
+            *   ...stack 0 is dest index
+            *   ...stack 1 is source index
+            *   ...stack 2 is count
+            */
+            bad_opcode = 1;
+            break;
+
+        case 0x82: /* DSC  */
+        case 0x83: /* ISC  */
+            /*
+            *   DRSCAN with capture
+            *   IRSCAN with capture
+            *   ...argument 0 is scan data variable ID
+            *   ...argument 1 is capture variable ID
+            *   ...stack 0 is capture index
+            *   ...stack 1 is scan data index
+            *   ...stack 2 is count
+            */
+            IF_CHECK_STACK(3)
+            {
+                long scan_right, scan_left;
+                long capture_count = 0;
+                long scan_count = 0;
+                long capture_index = stack[--stack_ptr];
+                long scan_index = stack[--stack_ptr];
+                if (version > 0)
+                {
+                    /* stack 0 = capture right index */
+                    /* stack 1 = capture left index */
+                    /* stack 2 = scan right index */
+                    /* stack 3 = scan left index */
+                    /* stack 4 = count */
+                    scan_right = stack[--stack_ptr];
+                    scan_left = stack[--stack_ptr];
+                    capture_count = 1 + scan_index - capture_index;
+                    scan_count = 1 + scan_left - scan_right;
+                    scan_index = scan_right;
+                }
+                long_count = stack[--stack_ptr];
+
+                /*
+                *   If capture array is read-only, allocate a buffer
+                *   and convert it to a writable array
+                */
+                variable_id = (unsigned int) args[1];
+                if ((version > 0) && ((attributes[variable_id] & 0x9c) == 0x0c))
+                {
+                    /*
+                    *   Allocate a writable buffer for this array
+                    */
+                    long_temp = (variable_size[variable_id] + 7L) >> 3L;
+                    charptr_temp2 = (unsigned char *) variables[variable_id];
+                    charptr_temp = jbi_malloc((unsigned int) long_temp);
+                    variables[variable_id] = (addr_t) charptr_temp;
+
+                    if (variables[variable_id] == (addr_t) NULL)
+                    {
+                        status = JBIC_OUT_OF_MEMORY;
+                        break;
+                    }
+                    else
+                    {
+                        /* zero the buffer */
+                        for (long_index = 0L;
+                            long_index < long_temp;
+                            ++long_index)
+                        {
+                            charptr_temp[long_index] = 0;
+                        }
+
+                        /* copy previous contents into buffer */
+                        for (long_index = 0L;
+                            long_index < variable_size[variable_id];
+                            ++long_index)
+                        {
+#if PORT==DOS
+                            if ((attributes[variable_id] & 0x02) &&
+                                ((long_index & 0x0000FFFF) == 0L))
+                            {
+                                /* initialized compressed Boolean array */
+                                jbi_uncompress_page(variable_id,
+                                    (int) (long_index >> 16), version);
+                                charptr_temp = jbi_aca_out_buffer;
+                                long_index2 = long_index & 0xFFFF;
+                            }
+#else
+                            long_index2 = long_index;
+#endif
+
+                            if (charptr_temp2[long_index2 >> 3] &
+                                (1 << (long_index2 & 7)))
+                            {
+                                charptr_temp[long_index >> 3] |=
+                                    (1 << (long_index & 7));
+                            }
+                        }
+
+                        /* set bit 7 - buffer was dynamically allocated */
+                        attributes[variable_id] |= 0x80;
+
+                        /* clear bit 2 - variable is writable */
+                        attributes[variable_id] &= ~0x04;
+                        attributes[variable_id] |= 0x01;
+                    }
+                }
+
+#if PORT==DOS
+                /* for 16-bit version, allow writing in allocated buffers */
+                if ((version > 0) &&
+                    ((attributes[variable_id] & 0x9c) == 0x8c))
+                {
+                    attributes[variable_id] &= ~0x04;
+                    attributes[variable_id] |= 0x01;
+                }
+#endif
+
+                charptr_temp = (unsigned char *) variables[args[0]];
+                charptr_temp2 = (unsigned char *) variables[args[1]];
+
+#if PORT==DOS
+                variable_id = (unsigned int) args[0];
+                if ((attributes[variable_id] & 0x1e) == 0x0e)
+                {
+                    /* initialized compressed Boolean array */
+                    jbi_uncompress_page(variable_id,
+                        (int) (scan_index >> 16), version);
+                    scan_index &= 0x0000ffff;
+                    charptr_temp = jbi_aca_out_buffer;
+                }
+#endif
+
+                if ((version > 0) &&
+                    ((long_count > capture_count) || (long_count > scan_count)))
+                {
+                    status = JBIC_BOUNDS_ERROR;
+                }
+
+                /* check that capture array is a writable Boolean array */
+                if ((attributes[args[1]] & 0x1c) != 0x08)
+                {
+                    status = JBIC_BOUNDS_ERROR;
+                }
+
+                if (status == JBIC_SUCCESS)
+                {
+                    if (opcode == 0x82) /* DSC */
+                    {
+                        status = jbi_swap_dr((unsigned int) long_count,
+                            charptr_temp, (unsigned long) scan_index,
+                            charptr_temp2, (unsigned int) capture_index);
+                    }
+                    else /* ISC */
+                    {
+                        status = jbi_swap_ir((unsigned int) long_count,
+                            charptr_temp, (unsigned int) scan_index,
+                            charptr_temp2, (unsigned int) capture_index);
+                    }
+                }
+            }
+            break;
+
+        case 0x84: /* WAIT */
+            /*
+            *   WAIT
+            *   ...argument 0 is wait state
+            *   ...argument 1 is end state
+            *   ...stack 0 is cycles
+            *   ...stack 1 is microseconds
+            */
+            IF_CHECK_STACK(2)
+            {
+                long_temp = stack[--stack_ptr];
+
+                if (long_temp != 0L)
+                {
+                    status = jbi_do_wait_cycles(long_temp, (unsigned int) args[0]);
+                }
+
+                long_temp = stack[--stack_ptr];
+
+                if ((status == JBIC_SUCCESS) && (long_temp != 0L))
+                {
+                    status = jbi_do_wait_microseconds(long_temp, (unsigned int) args[0]);
+                }
+
+                if ((status == JBIC_SUCCESS) && (args[1] != args[0]))
+                {
+                    status = jbi_goto_jtag_state((unsigned int) args[1]);
+                }
+
+                if (version > 0)
+                {
+                    --stack_ptr;    /* throw away MAX cycles */
+                    --stack_ptr;    /* throw away MAX microseconds */
+                }
+            }
+            break;
+
+        case 0x85: /* VS   */
+            /*
+            *   VECTOR
+            *   ...argument 0 is dir data variable ID
+            *   ...argument 1 is scan data variable ID
+            *   ...stack 0 is dir array index
+            *   ...stack 1 is scan array index
+            *   ...stack 2 is count
+            */
+            bad_opcode = 1;
+            break;
+
+        case 0xC0: /* CMPA */
+            /*
+            *   Array compare
+            *   ...argument 0 is source 1 ID
+            *   ...argument 1 is source 2 ID
+            *   ...argument 2 is mask ID
+            *   ...stack 0 is source 1 index
+            *   ...stack 1 is source 2 index
+            *   ...stack 2 is mask index
+            *   ...stack 3 is count
+            */
+            IF_CHECK_STACK(4)
+            {
+                long a, b;
+                unsigned char *source1 = (unsigned char *) variables[args[0]];
+                unsigned char *source2 = (unsigned char *) variables[args[1]];
+                unsigned char *mask    = (unsigned char *) variables[args[2]];
+                unsigned long index1 = stack[--stack_ptr];
+                unsigned long index2 = stack[--stack_ptr];
+                unsigned long mask_index = stack[--stack_ptr];
+                long_count = stack[--stack_ptr];
+
+                if (version > 0)
+                {
+                    /* stack 0 = source 1 right index */
+                    /* stack 1 = source 1 left index */
+                    /* stack 2 = source 2 right index */
+                    /* stack 3 = source 2 left index */
+                    /* stack 4 = mask right index */
+                    /* stack 5 = mask left index */
+                    long mask_right = stack[--stack_ptr];
+                    long mask_left = stack[--stack_ptr];
+                    a = 1 + index2 - index1; /* source 1 count */
+                    b = 1 + long_count - mask_index; /* source 2 count */
+                    a = (a < b) ? a : b;
+                    b = 1 + mask_left - mask_right; /* mask count */
+                    a = (a < b) ? a : b;
+                    index2 = mask_index;    /* source 2 start index */
+                    mask_index = mask_right;    /* mask start index */
+                    long_count = a;
+                }
+
+                long_temp = 1L;
+
+                if (long_count < 1)
+                {
+                    status = JBIC_BOUNDS_ERROR;
+                }
+                else
+                {
+#if PORT==DOS
+                    variable_id = (unsigned int) args[0];
+                    if ((attributes[variable_id] & 0x1e) == 0x0e)
+                    {
+                        jbi_uncompress_page(variable_id,
+                            (int) (index1 >> 16), version);
+                        index1 &= 0x0000ffff;
+                        source1 = jbi_aca_out_buffer;
+                    }
+
+                    variable_id = (unsigned int) args[1];
+                    if ((attributes[variable_id] & 0x1e) == 0x0e)
+                    {
+                        jbi_uncompress_page(variable_id,
+                            (int) (index2 >> 16), version);
+                        index2 &= 0x0000ffff;
+                        source2 = jbi_aca_out_buffer;
+                    }
+#endif
+                    count = (unsigned int) long_count;
+
+                    for (i = 0; i < count; ++i)
+                    {
+                        if (mask[mask_index >> 3] & (1 << (mask_index & 7)))
+                        {
+                            a = source1[index1 >> 3] & (1 << (index1 & 7))
+                                ? 1 : 0;
+                            b = source2[index2 >> 3] & (1 << (index2 & 7))
+                                ? 1 : 0;
+
+                            if (a != b) long_temp = 0L; /* failure */
+                        }
+                        ++index1;
+                        ++index2;
+                        ++mask_index;
+                    }
+                }
+
+                stack[stack_ptr++] = long_temp;
+            }
+            break;
+
+        case 0xC1: /* VSC  */
+            /*
+            *   VECTOR with capture
+            *   ...argument 0 is dir data variable ID
+            *   ...argument 1 is scan data variable ID
+            *   ...argument 2 is capture variable ID
+            *   ...stack 0 is capture index
+            *   ...stack 1 is scan data index
+            *   ...stack 2 is dir data index
+            *   ...stack 3 is count
+            */
+            bad_opcode = 1;
+            break;
+
+        default:
+            /*
+            *   Unrecognized opcode -- ERROR!
+            */
+            bad_opcode = 1;
+            break;
+        }
+
+        if (bad_opcode)
+        {
+            status = JBIC_ILLEGAL_OPCODE;
+        }
+
+        if ((stack_ptr < 0) || (stack_ptr >= JBI_STACK_SIZE))
+        {
+            status = JBIC_STACK_OVERFLOW;
+        }
+
+        if (status != JBIC_SUCCESS)
+        {
+            done = 1;
+            *error_address = (long) (opcode_address - code_section);
+        }
+    }
+    jbi_dbg(DEBUG_DETAIL, "debug_cnt(total): 0x%lx\n", debug_cnt);
+
+    jbi_dbg(DEBUG_NOISY, "jbi_free_jtag_padding_buffers\n");
+    jbi_free_jtag_padding_buffers(reset_jtag);
+
+    /*
+    *   Free all dynamically allocated arrays
+    */
+    jbi_dbg(DEBUG_NOISY, "jbi_free_attributes\n");
+    if ((attributes != NULL) && (variables != NULL))
+    {
+        for (i = 0; i < (unsigned int) symbol_count; ++i)
+        {
+            if ((attributes[i] & 0x80) && (variables[i] != (addr_t) NULL)
+                && (variables[i] != (addr_t) 1))
+            {
+                jbi_free((void *) variables[i]);
+            }
+        }
+    }
+
+    if (variables != NULL) jbi_free(variables);
+
+    if (variable_size != NULL) jbi_free(variable_size);
+
+    if (attributes != NULL) jbi_free(attributes);
+
+    if (proc_attributes != NULL) jbi_free(proc_attributes);
+
+    jbi_dbg(DEBUG_NOISY, "return status %d\n", status);
+    kfree(message_buffer);
+    return (status);
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+JBI_RETURN_TYPE jbi_get_note
+(
+    PROGRAM_PTR program,
+    long program_size,
+    long *offset,
+    char *key,
+    char *value,
+    int length
+)
+
+/*                                                                          */
+/*  Description:    Gets key and value of NOTE fields in the JBC file.      */
+/*                  Can be called in two modes:  if offset pointer is NULL, */
+/*                  then the function searches for note fields which match  */
+/*                  the key string provided.  If offset is not NULL, then   */
+/*                  the function finds the next note field of any key,      */
+/*                  starting at the offset specified by the offset pointer. */
+/*                                                                          */
+/*  Returns:        JBIC_SUCCESS for success, else appropriate error code   */
+/*                                                                          */
+/****************************************************************************/
+{
+    JBI_RETURN_TYPE status = JBIC_UNEXPECTED_END;
+    unsigned long note_strings = 0L;
+    unsigned long note_table = 0L;
+    unsigned long note_count = 0L;
+    unsigned long first_word = 0L;
+    int version = 0;
+    int delta = 0;
+    char *key_ptr;
+    char *value_ptr;
+    int i;
+
+#if PORT==DOS
+    int count = 0;
+    int done = 0;
+    long long_index = 0;
+    char key_buffer[256];
+    char value_buffer[256];
+
+    jbi_program = program;
+#endif
+
+    /*
+    *   Read header information
+    */
+    if (program_size > 52L)
+    {
+        first_word    = GET_DWORD(0);
+        version = (int) (first_word & 1L);
+        delta = version * 8;
+
+        note_strings  = GET_DWORD(8 + delta);
+        note_table    = GET_DWORD(12 + delta);
+        note_count    = GET_DWORD(44 + (2 * delta));
+    }
+
+    if ((first_word != 0x4A414D00L) && (first_word != 0x4A414D01L))
+    {
+        status = JBIC_IO_ERROR;
+    }
+    else if (note_count > 0L)
+    {
+        if (offset == NULL)
+        {
+            /*
+            *   We will search for the first note with a specific key, and
+            *   return only the value
+            */
+            for (i = 0; (i < (int) note_count) && (status != JBIC_SUCCESS); ++i)
+            {
+#if PORT==DOS
+                done = 0;
+                count = 0;
+                long_index = note_strings + GET_DWORD(note_table + (8 * i));
+                while ((count < 255) && !done)
+                {
+                    key_buffer[count] = GET_BYTE(long_index);
+                    if (key_buffer[count] == '\0') done = 1;
+                    ++long_index;
+                    ++count;
+                }
+                key_buffer[255] = '\0';
+                key_ptr = key_buffer;
+#else
+                key_ptr = (char *) &program[note_strings +
+                    GET_DWORD(note_table + (8 * i))];
+#endif
+                if ((key != NULL) && (jbi_stricmp(key, key_ptr) == 0))
+                {
+                    status = JBIC_SUCCESS;
+
+#if PORT==DOS
+                    done = 0;
+                    count = 0;
+                    long_index = note_strings + GET_DWORD(note_table + (8 * i) + 4);
+                    while ((count < 255) && !done)
+                    {
+                        value_buffer[count] = GET_BYTE(long_index);
+                        if (value_buffer[count] == '\0') done = 1;
+                        ++long_index;
+                        ++count;
+                    }
+                    value_buffer[255] = '\0';
+                    value_ptr = value_buffer;
+#else
+                    value_ptr = (char *) &program[note_strings +
+                        GET_DWORD(note_table + (8 * i) + 4)];
+#endif
+
+                    if (value != NULL)
+                    {
+                        jbi_strncpy(value, value_ptr, length);
+                    }
+                }
+            }
+        }
+        else
+        {
+            /*
+            *   We will search for the next note, regardless of the key, and
+            *   return both the value and the key
+            */
+
+            i = (int) *offset;
+
+            if ((i >= 0) && (i < (int) note_count))
+            {
+                status = JBIC_SUCCESS;
+
+                if (key != NULL)
+                {
+#if PORT==DOS
+                    done = 0;
+                    count = 0;
+                    long_index = note_strings +
+                        GET_DWORD(note_table + (8 * i));
+
+                    while ((count < length) && !done)
+                    {
+                        key[count] = GET_BYTE(long_index);
+                        if (key[count] == '\0') done = 1;
+                        ++long_index;
+                        ++count;
+                    }
+#else
+                    jbi_strncpy(key, (char *) &program[note_strings +
+                        GET_DWORD(note_table + (8 * i))], length);
+#endif
+                }
+
+                if (value != NULL)
+                {
+#if PORT==DOS
+                    done = 0;
+                    count = 0;
+                    long_index = note_strings +
+                        GET_DWORD(note_table + (8 * i) + 4);
+
+                    while ((count < length) && !done)
+                    {
+                        value[count] = GET_BYTE(long_index);
+                        if (value[count] == '\0') done = 1;
+                        ++long_index;
+                        ++count;
+                    }
+#else
+                    jbi_strncpy(value, (char *) &program[note_strings +
+                        GET_DWORD(note_table + (8 * i) + 4)], length);
+#endif
+                }
+
+                *offset = i + 1;
+            }
+        }
+    }
+
+    return (status);
+}
+
+/****************************************************************************/
+/*                                                                          */
+
+JBI_RETURN_TYPE jbi_check_crc
+(
+    PROGRAM_PTR program,
+    long program_size,
+    unsigned short *expected_crc,
+    unsigned short *actual_crc
+)
+
+/*                                                                          */
+/*  Description:    This function reads the entire input file and computes  */
+/*                  the CRC of everything up to the CRC field.              */
+/*                                                                          */
+/*  Returns:        JBIC_SUCCESS for success, JBIC_CRC_ERROR for failure    */
+/*                                                                          */
+/****************************************************************************/
+{
+    JBI_RETURN_TYPE status = JBIC_SUCCESS;
+    unsigned short local_expected, local_actual, shift_reg = 0xffff;
+    int bit, feedback;
+    unsigned char databyte;
+    unsigned long i;
+    unsigned long crc_section = 0L;
+    unsigned long first_word = 0L;
+    int version = 0;
+    int delta = 0;
+
+#if PORT==DOS
+    jbi_program = program;
+#endif
+
+    if (program_size > 52L)
+    {
+        first_word  = GET_DWORD(0);
+        version = (int) (first_word & 1L);
+        delta = version * 8;
+
+        crc_section = GET_DWORD(32 + delta);
+    }
+
+    if ((first_word != 0x4A414D00L) && (first_word != 0x4A414D01L))
+    {
+        status = JBIC_IO_ERROR;
+    }
+
+    if (crc_section >= (unsigned long) program_size)
+    {
+        status = JBIC_IO_ERROR;
+    }
+
+    if (status == JBIC_SUCCESS)
+    {
+        local_expected = (unsigned short) GET_WORD(crc_section);
+        if (expected_crc != NULL) *expected_crc = local_expected;
+
+        for (i = 0; i < crc_section; ++i)
+        {
+            databyte = GET_BYTE(i);
+            for (bit = 0; bit < 8; bit++)   /* compute for each bit */
+            {
+                feedback = (databyte ^ shift_reg) & 0x01;
+                shift_reg >>= 1;    /* shift the shift register */
+                if (feedback) shift_reg ^= 0x8408;  /* invert selected bits */
+                databyte >>= 1;     /* get the next bit of input_byte */
+            }
+        }
+
+        local_actual = (unsigned short) ~shift_reg;
+        if (actual_crc != NULL) *actual_crc = local_actual;
+
+        if (local_expected != local_actual)
+        {
+            status = JBIC_CRC_ERROR;
+        }
+    }
+
+    return (status);
+}
+
+JBI_RETURN_TYPE jbi_get_file_info
+(
+    PROGRAM_PTR program,
+    long program_size,
+    int *format_version,
+    int *action_count,
+    int *procedure_count
+)
+{
+    JBI_RETURN_TYPE status = JBIC_IO_ERROR;
+    unsigned long first_word = 0;
+    int version = 0;
+
+#if PORT==DOS
+    jbi_program = program;
+#endif
+
+    /*
+    *   Read header information
+    */
+    if (program_size > 52L)
+    {
+        first_word = GET_DWORD(0);
+
+        if ((first_word == 0x4A414D00L) || (first_word == 0x4A414D01L))
+        {
+            status = JBIC_SUCCESS;
+
+            version = (int) (first_word & 1L);
+            *format_version = version + 1;
+
+            if (version > 0)
+            {
+                *action_count = (int) GET_DWORD(48);
+                *procedure_count = (int) GET_DWORD(52);
+            }
+        }
+
+    }
+
+    return (status);
+}
+
+JBI_RETURN_TYPE jbi_get_action_info
+(
+    PROGRAM_PTR program,
+    long program_size,
+    int index,
+    char **name,
+    char **description,
+    JBI_PROCINFO **procedure_list
+)
+{
+    JBI_RETURN_TYPE status = JBIC_IO_ERROR;
+    JBI_PROCINFO *procptr = NULL;
+    JBI_PROCINFO *tmpptr = NULL;
+    unsigned long first_word = 0L;
+    unsigned long action_table = 0L;
+    unsigned long proc_table = 0L;
+    unsigned long string_table = 0L;
+    unsigned long note_strings = 0L;
+    unsigned long action_count = 0L;
+    unsigned long proc_count = 0L;
+    unsigned long act_name_id = 0L;
+    unsigned long act_desc_id = 0L;
+    unsigned long act_proc_id = 0L;
+    unsigned long act_proc_name = 0L;
+    unsigned char act_proc_attribute = 0;
+
+#if PORT==DOS
+    int i, length;
+    jbi_program = program;
+#endif
+
+    /*
+    *   Read header information
+    */
+    if (program_size > 52L)
+    {
+        first_word = GET_DWORD(0);
+
+        if (first_word == 0x4A414D01L)
+        {
+            action_table = GET_DWORD(4);
+            proc_table   = GET_DWORD(8);
+            string_table = GET_DWORD(12);
+            note_strings = GET_DWORD(16);
+            action_count = GET_DWORD(48);
+            proc_count   = GET_DWORD(52);
+
+            if (index < (int) action_count)
+            {
+                act_name_id = GET_DWORD(action_table + (12 * index));
+                act_desc_id = GET_DWORD(action_table + (12 * index) + 4);
+                act_proc_id = GET_DWORD(action_table + (12 * index) + 8);
+
+#if PORT==DOS
+                length = 0;
+                while (GET_BYTE(string_table + act_name_id + length) != 0) ++length;
+                *name = jbi_malloc(length + 1);
+                if (*name == NULL)
+                {
+                    status = JBIC_OUT_OF_MEMORY;
+                }
+                else
+                {
+                    for (i = 0; i < length; ++i)
+                    {
+                        (*name)[i] = GET_BYTE(string_table + act_name_id + i);
+                    }
+                    (*name)[length] = '\0';
+                }
+#else
+                *name = (char *) &program[string_table + act_name_id];
+#endif
+
+                if (act_desc_id < (note_strings - string_table))
+                {
+#if PORT==DOS
+                    length = 0;
+                    while (GET_BYTE(string_table + act_desc_id + length) != 0) ++length;
+                    *description = jbi_malloc(length + 1);
+                    if (*description == NULL)
+                    {
+                        status = JBIC_OUT_OF_MEMORY;
+                    }
+                    else
+                    {
+                        for (i = 0; i < length; ++i)
+                        {
+                            (*description)[i] = GET_BYTE(string_table + act_desc_id + i);
+                        }
+                        (*description)[length] = '\0';
+                    }
+#else
+                    *description = (char *) &program[string_table + act_desc_id];
+#endif
+                }
+
+                do
+                {
+                    act_proc_name = GET_DWORD(proc_table + (13 * act_proc_id));
+                    act_proc_attribute = (unsigned char)
+                        (GET_BYTE(proc_table + (13 * act_proc_id) + 8) & 0x03);
+
+                    procptr = (JBI_PROCINFO *) jbi_malloc(sizeof(JBI_PROCINFO));
+
+                    if (procptr == NULL)
+                    {
+                        status = JBIC_OUT_OF_MEMORY;
+                    }
+                    else
+                    {
+#if PORT==DOS
+                        length = 0;
+                        while (GET_BYTE(string_table + act_proc_name + length) != 0) ++length;
+                        procptr->name = jbi_malloc(length + 1);
+                        if (procptr->name == NULL)
+                        {
+                            status = JBIC_OUT_OF_MEMORY;
+                        }
+                        else
+                        {
+                            for (i = 0; i < length; ++i)
+                            {
+                                procptr->name[i] =
+                                    GET_BYTE(string_table + act_proc_name + i);
+                            }
+                            procptr->name[length] = '\0';
+                        }
+#else
+                        procptr->name = (char *)
+                            &program[string_table + act_proc_name];
+#endif
+                        procptr->attributes = act_proc_attribute;
+                        procptr->next = NULL;
+
+                        /* add record to end of linked list */
+                        if (*procedure_list == NULL)
+                        {
+                            *procedure_list = procptr;
+                        }
+                        else
+                        {
+                            tmpptr = *procedure_list;
+                            while (tmpptr->next != NULL) tmpptr = tmpptr->next;
+                            tmpptr->next = procptr;
+                        }
+                    }
+
+                    act_proc_id =
+                        GET_DWORD(proc_table + (13 * act_proc_id) + 4);
+                }
+                while ((act_proc_id != 0) && (act_proc_id < proc_count));
+            }
+        }
+
+    }
+
+    return (status);
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbiport.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbiport.h
new file mode 100644
index 000000000000..28669dc81ff6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbiport.h
@@ -0,0 +1,45 @@
+/****************************************************************************/
+/*                                                                          */
+/*  Module:        jbiport.h                                                */
+/*                                                                          */
+/*                 Copyright (C) Altera Corporation 2000-2001               */
+/*                                                                          */
+/*  Description:   Defines porting macros                                   */
+/*                                                                          */
+/****************************************************************************/
+
+#ifndef INC_JBIPORT_H
+#define INC_JBIPORT_H
+
+/*
+*  PORT defines the target platform: DOS, WINDOWS, UNIX, or EMBEDDED
+*
+*  PORT = DOS      means a 16-bit DOS console-mode application
+*
+*  PORT = WINDOWS  means a 32-bit WIN32 console-mode application for
+*                  Windows 95, 98, 2000, ME or NT.  On NT this will use the
+*                  DeviceIoControl() API to access the Parallel Port.
+*
+*  PORT = UNIX     means any UNIX system.  BitBlaster access is support via
+*                  the standard ANSI system calls open(), read(), write().
+*                  The ByteBlaster is not supported.
+*
+*  PORT = EMBEDDED means all DOS, WINDOWS, and UNIX code is excluded.
+*                  Remaining code supports 16 and 32-bit compilers.
+*                  Additional porting steps may be necessary. See readme
+*                  file for more details.
+*/
+
+#define DOS      2
+#define WINDOWS  3
+#define UNIX     4
+#define EMBEDDED 5
+
+#define PORT EMBEDDED
+
+#ifndef PORT
+/* change this line to build a different port */
+#define PORT WINDOWS
+#endif
+
+#endif /* INC_JBIPORT_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbistub.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbistub.c
new file mode 100644
index 000000000000..396c92caca2b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbistub.c
@@ -0,0 +1,2518 @@
+/****************************************************************************/
+/*                                                                          */
+/*  Module:         jbistub.c                                               */
+/*                                                                          */
+/*                  Copyright (C) Altera Corporation 1997-2001              */
+/*                                                                          */
+/*  Description:    Jam STAPL ByteCode Player main source file              */
+/*                                                                          */
+/*                  Supports Altera ByteBlaster hardware download cable     */
+/*                  on Windows 95 and Windows NT operating systems.         */
+/*                  (A device driver is required for Windows NT.)           */
+/*                                                                          */
+/*                  Also supports BitBlaster hardware download cable on     */
+/*                  Windows 95, Windows NT, and UNIX platforms.             */
+/*                                                                          */
+/*  Revisions:      1.1 fixed control port initialization for ByteBlaster   */
+/*                  2.0 added support for STAPL bytecode format, added code */
+/*                      to get printer port address from Windows registry   */
+/*                  2.1 improved messages, fixed delay-calibration bug in   */
+/*                      16-bit DOS port, added support for "alternative     */
+/*                      cable X", added option to control whether to reset  */
+/*                      the TAP after execution, moved porting macros into  */
+/*                      jbiport.h                                           */
+/*                  2.2 added support for static memory                     */
+/*                      fixed /W4 warnings                                  */
+/*                                                                          */
+/****************************************************************************/
+
+#ifndef NO_ALTERA_STDIO
+#define NO_ALTERA_STDIO
+#endif
+
+#if 0
+#if ( _MSC_VER >= 800 )
+#pragma warning(disable:4115)
+#pragma warning(disable:4201)
+#pragma warning(disable:4214)
+#pragma warning(disable:4514)
+#endif
+#endif
+
+#include "jbiport.h"
+
+#if PORT == WINDOWS
+#include <windows.h>
+#else
+typedef int BOOL;
+typedef unsigned char BYTE;
+typedef unsigned short WORD;
+#if PORT == EMBEDDED
+typedef unsigned int DWORD;
+#else
+typedef unsigned long DWORD;
+#endif
+#define TRUE 1
+#define FALSE 0
+#endif
+
+#if PORT != EMBEDDED
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <io.h>
+#include <fcntl.h>
+#include <process.h>
+#endif
+
+#include <jbi.h>
+
+#include "jbiexprt.h"
+#include "jbistub.h"
+
+#if defined(USE_STATIC_MEMORY)
+    #define N_STATIC_MEMORY_KBYTES ((unsigned int) USE_STATIC_MEMORY)
+    #define N_STATIC_MEMORY_BYTES (N_STATIC_MEMORY_KBYTES * 1024)
+    #define POINTER_ALIGNMENT sizeof(DWORD)
+#else /* USE_STATIC_MEMORY */
+    /* #include <malloc.h> */
+    #define POINTER_ALIGNMENT sizeof(BYTE)
+#endif /* USE_STATIC_MEMORY */
+
+#if PORT != EMBEDDED
+#include <time.h>
+#include <conio.h>
+#include <ctype.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#endif
+
+#if PORT == DOS
+#include <bios.h>
+#endif
+
+int jbi_debug_level = DEBUG_NONE;
+static long jbi_delay_us = 0, jbi_delay_count = 0, jbi_peak_us = 0;
+
+void __jbi_jtag_udelay(unsigned long us)
+{
+    udelay(us);
+}
+void jbi_jtag_udelay(unsigned long us) __attribute__((weak, alias("__jbi_jtag_udelay")));
+
+#if PORT == WINDOWS
+#define PGDC_IOCTL_GET_DEVICE_INFO_PP 0x00166A00L
+#define PGDC_IOCTL_READ_PORT_PP       0x00166A04L
+#define PGDC_IOCTL_WRITE_PORT_PP      0x0016AA08L
+#define PGDC_IOCTL_PROCESS_LIST_PP    0x0016AA1CL
+#define PGDC_READ_INFO                0x0a80
+#define PGDC_READ_PORT                0x0a81
+#define PGDC_WRITE_PORT               0x0a82
+#define PGDC_PROCESS_LIST             0x0a87
+#define PGDC_HDLC_NTDRIVER_VERSION    2
+#define PORT_IO_BUFFER_SIZE           256
+#endif
+
+#if PORT == WINDOWS
+#ifdef __BORLANDC__
+/* create dummy inp() and outp() functions for Borland 32-bit compile */
+WORD inp(WORD address) { address = address; return(0); }
+void outp(WORD address, WORD data) { address = address; data = data; }
+#else
+#pragma intrinsic (inp, outp)
+#endif
+#endif
+
+/*
+*   For Borland C compiler (16-bit), set the stack size
+*/
+#if PORT == DOS
+#ifdef __BORLANDC__
+extern unsigned int _stklen = 50000;
+#endif
+#endif
+
+/************************************************************************
+*
+*   Global variables
+*/
+
+/* file buffer for Jam STAPL ByteCode input file */
+#if PORT == DOS
+unsigned char **file_buffer = NULL;
+#else
+unsigned char *file_buffer = NULL;
+#endif
+long file_pointer = 0L;
+long file_length = 0L;
+
+/* delay count for one millisecond delay */
+long one_ms_delay = 0L;
+
+/* serial port interface available on all platforms */
+BOOL jtag_hardware_initialized = FALSE;
+char *serial_port_name = NULL;
+BOOL specified_com_port = FALSE;
+int com_port = -1;
+void initialize_jtag_hardware(void);
+void close_jtag_hardware(void);
+
+#if defined(USE_STATIC_MEMORY)
+    unsigned char static_memory_heap[N_STATIC_MEMORY_BYTES] = { 0 };
+#endif /* USE_STATIC_MEMORY */
+
+#if defined(USE_STATIC_MEMORY) || defined(MEM_TRACKER)
+    unsigned int n_bytes_allocated = 0;
+#endif /* USE_STATIC_MEMORY || MEM_TRACKER */
+
+#if defined(MEM_TRACKER)
+    unsigned int peak_memory_usage = 0;
+    unsigned int peak_allocations = 0;
+    unsigned int n_allocations = 0;
+#if defined(USE_STATIC_MEMORY)
+    unsigned int n_bytes_not_recovered = 0;
+#endif /* USE_STATIC_MEMORY */
+    const DWORD BEGIN_GUARD = 0x01234567;
+    const DWORD END_GUARD = 0x76543210;
+#endif /* MEM_TRACKER */
+
+#if PORT == WINDOWS || PORT == DOS
+/* parallel port interface available on PC only */
+BOOL specified_lpt_port = FALSE;
+BOOL specified_lpt_addr = FALSE;
+int lpt_port = 1;
+int initial_lpt_ctrl = 0;
+WORD lpt_addr = 0x3bc;
+WORD lpt_addr_table[3] = { 0x3bc, 0x378, 0x278 };
+BOOL alternative_cable_l = FALSE;
+BOOL alternative_cable_x = FALSE;
+void write_byteblaster(int port, int data);
+int read_byteblaster(int port);
+#endif
+
+#if PORT==WINDOWS
+#ifndef __BORLANDC__
+WORD lpt_addresses_from_registry[4] = { 0 };
+#endif
+#endif
+
+#if PORT == WINDOWS
+/* variables to manage cached I/O under Windows NT */
+BOOL windows_nt = FALSE;
+int port_io_count = 0;
+HANDLE nt_device_handle = INVALID_HANDLE_VALUE;
+struct PORT_IO_LIST_STRUCT
+{
+    USHORT command;
+    USHORT data;
+} port_io_buffer[PORT_IO_BUFFER_SIZE];
+extern void flush_ports(void);
+BOOL initialize_nt_driver(void);
+#endif
+
+/* function prototypes to allow forward reference */
+extern void delay_loop(long count);
+
+/*
+*   This structure stores information about each available vector signal
+*/
+struct VECTOR_LIST_STRUCT
+{
+    char *signal_name;
+    int  hardware_bit;
+    int  vector_index;
+};
+
+struct VECTOR_LIST_STRUCT vector_list[] =
+{
+    /* add a record here for each vector signal */
+    { "", 0, -1 }
+};
+
+#define VECTOR_SIGNAL_COUNT ((int)(sizeof(vector_list)/sizeof(vector_list[0])))
+
+BOOL verbose = FALSE;
+
+/************************************************************************
+*
+*   Customized interface functions for Jam STAPL ByteCode Player I/O:
+*
+*   jbi_jtag_io()
+*   jbi_message()
+*   jbi_delay()
+*/
+
+int jbi_jtag_io(int tms, int tdi, int read_tdo)
+{
+#if PORT == WINDOWS || PORT == DOS
+    int data = 0;
+#endif
+    int tdo = 0;
+    int i = 0;
+    int result = 0;
+    char ch_data = 0;
+
+    if (!jtag_hardware_initialized)
+    {
+        initialize_jtag_hardware();
+        jtag_hardware_initialized = TRUE;
+    }
+
+    if (specified_com_port)
+    {
+        ch_data = (char)
+            ((tdi ? 0x01 : 0) | (tms ? 0x02 : 0) | 0x60);
+
+        write(com_port, &ch_data, 1);
+
+        if (read_tdo)
+        {
+            ch_data = 0x7e;
+            write(com_port, &ch_data, 1);
+            for (i = 0; (i < 100) && (result != 1); ++i)
+            {
+                result = read(com_port, &ch_data, 1);
+            }
+            if (result == 1)
+            {
+                tdo = ch_data & 0x01;
+            }
+            else
+            {
+                fprintf(stderr, "Error:  BitBlaster not responding\n");
+            }
+        }
+
+        ch_data = (char)
+            ((tdi ? 0x01 : 0) | (tms ? 0x02 : 0) | 0x64);
+
+        write(com_port, &ch_data, 1);
+    }
+    else
+    {
+#if PORT == WINDOWS || PORT == DOS
+        data = (alternative_cable_l ? ((tdi ? 0x01 : 0) | (tms ? 0x04 : 0)) :
+               (alternative_cable_x ? ((tdi ? 0x01 : 0) | (tms ? 0x04 : 0) | 0x10) :
+               ((tdi ? 0x40 : 0) | (tms ? 0x02 : 0))));
+
+        write_byteblaster(0, data);
+
+        if (read_tdo)
+        {
+            tdo = read_byteblaster(1);
+            tdo = (alternative_cable_l ? ((tdo & 0x40) ? 1 : 0) :
+                  (alternative_cable_x ? ((tdo & 0x10) ? 1 : 0) :
+                  ((tdo & 0x80) ? 0 : 1)));
+        }
+
+        write_byteblaster(0, data | (alternative_cable_l ? 0x02 : (alternative_cable_x ? 0x02: 0x01)));
+
+        write_byteblaster(0, data);
+#elif PORT == EMBEDDED
+        /* Output variables TDI, TMS to the corresponding pin; As read_tdo, return the corresponding pin to the variable tdo */
+        tdo = jbi_jtag_io_(tms, tdi, read_tdo);
+#else
+        /* parallel port interface not available */
+        tdo = 0;
+#endif
+    }
+
+    return (tdo);
+}
+
+void jbi_message(char *message_text)
+{
+    puts(message_text);
+    puts("\n");
+    fflush(stdout);
+}
+
+void jbi_export_integer(char *key, long value)
+{
+    if (verbose)
+    {
+        printf("Export: key = \"%s\", value = %ld\n", key, value);
+        fflush(stdout);
+    }
+}
+
+#define HEX_LINE_CHARS 72
+#define HEX_LINE_BITS (HEX_LINE_CHARS * 4)
+
+char conv_to_hex(unsigned long value)
+{
+    char c;
+
+    if (value > 9)
+    {
+        c = (char) (value + ('A' - 10));
+    }
+    else
+    {
+        c = (char) (value + '0');
+    }
+
+    return (c);
+}
+
+void jbi_export_boolean_array(char *key, unsigned char *data, long count)
+{
+    char string[HEX_LINE_CHARS + 1];
+    long i, offset;
+    unsigned long size, line, lines, linebits, value, j, k;
+
+    if (verbose)
+    {
+        if (count > HEX_LINE_BITS)
+        {
+            printf("Export: key = \"%s\", %ld bits, value = HEX\n", key, count);
+            lines = (count + (HEX_LINE_BITS - 1)) / HEX_LINE_BITS;
+
+            for (line = 0; line < lines; ++line)
+            {
+                if (line < (lines - 1))
+                {
+                    linebits = HEX_LINE_BITS;
+                    size = HEX_LINE_CHARS;
+                    offset = count - ((line + 1) * HEX_LINE_BITS);
+                }
+                else
+                {
+                    linebits = count - ((lines - 1) * HEX_LINE_BITS);
+                    size = (linebits + 3) / 4;
+                    offset = 0L;
+                }
+
+                string[size] = '\0';
+                j = size - 1;
+                value = 0;
+
+                for (k = 0; k < linebits; ++k)
+                {
+                    i = k + offset;
+                    if (data[i >> 3] & (1 << (i & 7))) value |= (1 << (i & 3));
+                    if ((i & 3) == 3)
+                    {
+                        string[j] = conv_to_hex(value);
+                        value = 0;
+                        --j;
+                    }
+                }
+                if ((k & 3) > 0) string[j] = conv_to_hex(value);
+
+                printf("%s\n", string);
+            }
+
+            fflush(stdout);
+        }
+        else
+        {
+            size = (count + 3) / 4;
+            string[size] = '\0';
+            j = size - 1;
+            value = 0;
+
+            for (i = 0; i < count; ++i)
+            {
+                if (data[i >> 3] & (1 << (i & 7))) value |= (1 << (i & 3));
+                if ((i & 3) == 3)
+                {
+                    string[j] = conv_to_hex(value);
+                    value = 0;
+                    --j;
+                }
+            }
+            if ((i & 3) > 0) string[j] = conv_to_hex(value);
+
+            printf("Export: key = \"%s\", %ld bits, value = HEX %s\n",
+                key, count, string);
+            fflush(stdout);
+        }
+    }
+}
+
+void jbi_delay(long microseconds)
+{
+    if (jbi_peak_us < microseconds) {
+        jbi_peak_us = microseconds;
+    }
+    jbi_delay_us += microseconds;
+    jbi_delay_count++;
+
+#if PORT == WINDOWS
+    /* if Windows NT, flush I/O cache buffer before delay loop */
+    if (windows_nt && (port_io_count > 0)) flush_ports();
+#endif
+
+#if PORT == EMBEDDED
+    udelay(microseconds);
+#else
+    delay_loop(microseconds *
+        ((one_ms_delay / 1000L) + ((one_ms_delay % 1000L) ? 1 : 0)));
+#endif
+}
+
+int jbi_vector_map
+(
+    int signal_count,
+    char **signals
+)
+{
+    int signal, vector, ch_index, diff;
+    int matched_count = 0;
+    char l, r;
+
+    for (vector = 0; (vector < VECTOR_SIGNAL_COUNT); ++vector)
+    {
+        vector_list[vector].vector_index = -1;
+    }
+
+    for (signal = 0; signal < signal_count; ++signal)
+    {
+        diff = 1;
+        for (vector = 0; (diff != 0) && (vector < VECTOR_SIGNAL_COUNT);
+            ++vector)
+        {
+            if (vector_list[vector].vector_index == -1)
+            {
+                ch_index = 0;
+                do
+                {
+                    l = signals[signal][ch_index];
+                    r = vector_list[vector].signal_name[ch_index];
+                    diff = (((l >= 'a') && (l <= 'z')) ? (l - ('a' - 'A')) : l)
+                        - (((r >= 'a') && (r <= 'z')) ? (r - ('a' - 'A')) : r);
+                    ++ch_index;
+                }
+                while ((diff == 0) && (l != '\0') && (r != '\0'));
+
+                if (diff == 0)
+                {
+                    vector_list[vector].vector_index = signal;
+                    ++matched_count;
+                }
+            }
+        }
+    }
+
+    return (matched_count);
+}
+
+int jbi_vector_io
+(
+    int signal_count,
+    long *dir_vect,
+    long *data_vect,
+    long *capture_vect
+)
+{
+    int signal, vector, bit;
+    int matched_count = 0;
+    int data = 0;
+    int mask = 0;
+    int dir = 0;
+    int i = 0;
+    int result = 0;
+    char ch_data = 0;
+
+    if (!jtag_hardware_initialized)
+    {
+        initialize_jtag_hardware();
+        jtag_hardware_initialized = TRUE;
+    }
+
+    /*
+    *   Collect information about output signals
+    */
+    for (vector = 0; vector < VECTOR_SIGNAL_COUNT; ++vector)
+    {
+        signal = vector_list[vector].vector_index;
+
+        if ((signal >= 0) && (signal < signal_count))
+        {
+            bit = (1 << vector_list[vector].hardware_bit);
+
+            mask |= bit;
+            if (data_vect[signal >> 5] & (1L << (signal & 0x1f))) data |= bit;
+            if (dir_vect[signal >> 5] & (1L << (signal & 0x1f))) dir |= bit;
+
+            ++matched_count;
+        }
+    }
+
+    /*
+    *   Write outputs to hardware interface, if any
+    */
+    if (dir != 0)
+    {
+        if (specified_com_port)
+        {
+            ch_data = (char) (((data >> 6) & 0x01) | (data & 0x02) |
+                      ((data << 2) & 0x04) | ((data << 3) & 0x08) | 0x60);
+            write(com_port, &ch_data, 1);
+        }
+        else
+        {
+#if PORT == WINDOWS || PORT == DOS
+
+            write_byteblaster(0, data);
+
+#endif
+        }
+    }
+
+    /*
+    *   Read the input signals and save information in capture_vect[]
+    */
+    if ((dir != mask) && (capture_vect != NULL))
+    {
+        if (specified_com_port)
+        {
+            ch_data = 0x7e;
+            write(com_port, &ch_data, 1);
+            for (i = 0; (i < 100) && (result != 1); ++i)
+            {
+                result = read(com_port, &ch_data, 1);
+            }
+            if (result == 1)
+            {
+                data = ((ch_data << 7) & 0x80) | ((ch_data << 3) & 0x10);
+            }
+            else
+            {
+                fprintf(stderr, "Error:  BitBlaster not responding\n");
+            }
+        }
+        else
+        {
+#if PORT == WINDOWS || PORT == DOS
+
+            data = read_byteblaster(1) ^ 0x80; /* parallel port inverts bit 7 */
+
+#endif
+        }
+
+        for (vector = 0; vector < VECTOR_SIGNAL_COUNT; ++vector)
+        {
+            signal = vector_list[vector].vector_index;
+
+            if ((signal >= 0) && (signal < signal_count))
+            {
+                bit = (1 << vector_list[vector].hardware_bit);
+
+                if ((dir & bit) == 0)   /* if it is an input signal... */
+                {
+                    if (data & bit)
+                    {
+                        capture_vect[signal >> 5] |= (1L << (signal & 0x1f));
+                    }
+                    else
+                    {
+                        capture_vect[signal >> 5] &= ~(unsigned long)
+                            (1L << (signal & 0x1f));
+                    }
+                }
+            }
+        }
+    }
+
+    return (matched_count);
+}
+
+void *jbi_malloc(unsigned int size)
+{
+    unsigned int n_bytes_to_allocate =
+#if defined(USE_STATIC_MEMORY) || defined(MEM_TRACKER)
+        sizeof(unsigned int) +
+#endif /* USE_STATIC_MEMORY || MEM_TRACKER */
+#if defined(MEM_TRACKER)
+        (2 * sizeof(DWORD)) +
+#endif /* MEM_TRACKER */
+        (POINTER_ALIGNMENT * ((size + POINTER_ALIGNMENT - 1) / POINTER_ALIGNMENT));
+
+    unsigned char *ptr = 0;
+
+#if defined(MEM_TRACKER)
+    if ((n_bytes_allocated + n_bytes_to_allocate) > peak_memory_usage)
+    {
+        peak_memory_usage = n_bytes_allocated + n_bytes_to_allocate;
+    }
+    if ((n_allocations + 1) > peak_allocations)
+    {
+        peak_allocations = n_allocations + 1;
+    }
+#endif /* MEM_TRACKER */
+
+#if defined(USE_STATIC_MEMORY)
+    if ((n_bytes_allocated + n_bytes_to_allocate) <= N_STATIC_MEMORY_BYTES)
+    {
+        ptr = (&(static_memory_heap[n_bytes_allocated]));
+    }
+#else /* USE_STATIC_MEMORY */
+    ptr = (unsigned char *) malloc(n_bytes_to_allocate);
+#endif /* USE_STATIC_MEMORY */
+
+#if defined(USE_STATIC_MEMORY) || defined(MEM_TRACKER)
+    if (ptr != 0)
+    {
+        unsigned int i = 0;
+
+#if defined(MEM_TRACKER)
+        for (i = 0; i < sizeof(DWORD); ++i)
+        {
+            *ptr = (unsigned char) (BEGIN_GUARD >> (8 * i));
+            ++ptr;
+        }
+#endif /* MEM_TRACKER */
+
+        for (i = 0; i < sizeof(unsigned int); ++i)
+        {
+            *ptr = (unsigned char) (size >> (8 * i));
+            ++ptr;
+        }
+
+#if defined(MEM_TRACKER)
+        for (i = 0; i < sizeof(DWORD); ++i)
+        {
+            *(ptr + size + i) = (unsigned char) (END_GUARD >> (8 * i));
+            /* don't increment ptr */
+        }
+
+        ++n_allocations;
+#endif /* MEM_TRACKER */
+
+        n_bytes_allocated += n_bytes_to_allocate;
+    }
+#endif /* USE_STATIC_MEMORY || MEM_TRACKER */
+
+    jbi_dbg(DEBUG_MM, "malloc 0x%p(%d,%d)\n", ptr, size, n_bytes_to_allocate);
+
+    return ptr;
+}
+
+void jbi_free(void *ptr)
+{
+    jbi_dbg(DEBUG_MM, "free 0x%p\n", ptr);
+
+    if
+    (
+#if defined(MEM_TRACKER)
+        (n_allocations > 0) &&
+#endif /* MEM_TRACKER */
+        (ptr != 0)
+    )
+    {
+        unsigned char *tmp_ptr = (unsigned char *) ptr;
+
+#if defined(USE_STATIC_MEMORY) || defined(MEM_TRACKER)
+        unsigned int n_bytes_to_free = 0;
+        unsigned int i = 0;
+        unsigned int size = 0;
+#endif /* USE_STATIC_MEMORY || MEM_TRACKER */
+#if defined(MEM_TRACKER)
+        DWORD begin_guard = 0;
+        DWORD end_guard = 0;
+
+        tmp_ptr -= sizeof(DWORD);
+#endif /* MEM_TRACKER */
+#if defined(USE_STATIC_MEMORY) || defined(MEM_TRACKER)
+        tmp_ptr -= sizeof(unsigned int);
+#endif /* USE_STATIC_MEMORY || MEM_TRACKER */
+        ptr = tmp_ptr;
+
+#if defined(MEM_TRACKER)
+        for (i = 0; i < sizeof(DWORD); ++i)
+        {
+            begin_guard |= (((DWORD)(*tmp_ptr)) << (8 * i));
+            ++tmp_ptr;
+        }
+#endif /* MEM_TRACKER */
+
+#if defined(USE_STATIC_MEMORY) || defined(MEM_TRACKER)
+        for (i = 0; i < sizeof(unsigned int); ++i)
+        {
+            size |= (((unsigned int)(*tmp_ptr)) << (8 * i));
+            ++tmp_ptr;
+        }
+#endif /* USE_STATIC_MEMORY || MEM_TRACKER */
+
+#if defined(MEM_TRACKER)
+        tmp_ptr += size;
+
+        for (i = 0; i < sizeof(DWORD); ++i)
+        {
+            end_guard |= (((DWORD)(*tmp_ptr)) << (8 * i));
+            ++tmp_ptr;
+        }
+
+        if ((begin_guard != BEGIN_GUARD) || (end_guard != END_GUARD))
+        {
+            fprintf(stderr, "Error: memory corruption detected for allocation #%d... bad %s guard\n",
+                n_allocations, (begin_guard != BEGIN_GUARD) ? "begin" : "end");
+        }
+
+        --n_allocations;
+#endif /* MEM_TRACKER */
+
+#if defined(USE_STATIC_MEMORY) || defined(MEM_TRACKER)
+        n_bytes_to_free =
+#if defined(MEM_TRACKER)
+        (2 * sizeof(DWORD)) +
+#endif /* MEM_TRACKER */
+        sizeof(unsigned int) +
+        (POINTER_ALIGNMENT * ((size + POINTER_ALIGNMENT - 1) / POINTER_ALIGNMENT));
+#endif /* USE_STATIC_MEMORY || MEM_TRACKER */
+
+#if defined(USE_STATIC_MEMORY)
+        if ((((unsigned long) ptr - (unsigned long) static_memory_heap) + n_bytes_to_free) == (unsigned long) n_bytes_allocated)
+        {
+            n_bytes_allocated -= n_bytes_to_free;
+        }
+#if defined(MEM_TRACKER)
+        else
+        {
+            n_bytes_not_recovered += n_bytes_to_free;
+        }
+#endif /* MEM_TRACKER */
+#else /* USE_STATIC_MEMORY */
+#if defined(MEM_TRACKER)
+        n_bytes_allocated -= n_bytes_to_free;
+#endif /* MEM_TRACKER */
+        free(ptr);
+#endif /* USE_STATIC_MEMORY */
+    }
+#if defined(MEM_TRACKER)
+    else
+    {
+        if (ptr != 0)
+        {
+            fprintf(stderr, "Error: attempt to free unallocated memory\n");
+        }
+    }
+#endif /* MEM_TRACKER */
+}
+
+#if PORT == WINDOWS || PORT == DOS
+/************************************************************************
+*
+*   get_tick_count() -- Get system tick count in milliseconds
+*
+*   for DOS, use BIOS function _bios_timeofday()
+*   for WINDOWS use GetTickCount() function
+*   for UNIX use clock() system function
+*/
+DWORD get_tick_count(void)
+{
+    DWORD tick_count = 0L;
+
+#if PORT == WINDOWS
+    tick_count = GetTickCount();
+#elif PORT == DOS
+    _bios_timeofday(_TIME_GETCLOCK, (long *)&tick_count);
+    tick_count *= 55L;  /* convert to milliseconds */
+#else
+    /* assume clock() function returns microseconds */
+    tick_count = (DWORD) (clock() / 1000L);
+#endif
+
+    return (tick_count);
+}
+#endif
+
+#define DELAY_SAMPLES 10
+#define DELAY_CHECK_LOOPS 10000
+
+void calibrate_delay(void)
+{
+#if PORT == WINDOWS || PORT == DOS
+    int sample = 0;
+    int count = 0;
+    DWORD tick_count1 = 0L;
+    DWORD tick_count2 = 0L;
+#endif
+
+    one_ms_delay = 0L;
+
+#if PORT == WINDOWS || PORT == DOS
+    for (sample = 0; sample < DELAY_SAMPLES; ++sample)
+    {
+        count = 0;
+        tick_count1 = get_tick_count();
+        while ((tick_count2 = get_tick_count()) == tick_count1) {};
+        do { delay_loop(DELAY_CHECK_LOOPS); count++; } while
+            ((tick_count1 = get_tick_count()) == tick_count2);
+        one_ms_delay += ((DELAY_CHECK_LOOPS * (DWORD)count) /
+            (tick_count1 - tick_count2));
+    }
+
+    one_ms_delay /= DELAY_SAMPLES;
+#else
+    /* This is system-dependent!  Update this number for target system */
+    one_ms_delay = 1000L;
+#endif
+}
+
+char *error_text[] =
+{
+/* JBIC_SUCCESS            0 */ "success",
+/* JBIC_OUT_OF_MEMORY      1 */ "out of memory",
+/* JBIC_IO_ERROR           2 */ "file access error",
+/* JAMC_SYNTAX_ERROR       3 */ "syntax error",
+/* JBIC_UNEXPECTED_END     4 */ "unexpected end of file",
+/* JBIC_UNDEFINED_SYMBOL   5 */ "undefined symbol",
+/* JAMC_REDEFINED_SYMBOL   6 */ "redefined symbol",
+/* JBIC_INTEGER_OVERFLOW   7 */ "integer overflow",
+/* JBIC_DIVIDE_BY_ZERO     8 */ "divide by zero",
+/* JBIC_CRC_ERROR          9 */ "CRC mismatch",
+/* JBIC_INTERNAL_ERROR    10 */ "internal error",
+/* JBIC_BOUNDS_ERROR      11 */ "bounds error",
+/* JAMC_TYPE_MISMATCH     12 */ "type mismatch",
+/* JAMC_ASSIGN_TO_CONST   13 */ "assignment to constant",
+/* JAMC_NEXT_UNEXPECTED   14 */ "NEXT unexpected",
+/* JAMC_POP_UNEXPECTED    15 */ "POP unexpected",
+/* JAMC_RETURN_UNEXPECTED 16 */ "RETURN unexpected",
+/* JAMC_ILLEGAL_SYMBOL    17 */ "illegal symbol name",
+/* JBIC_VECTOR_MAP_FAILED 18 */ "vector signal name not found",
+/* JBIC_USER_ABORT        19 */ "execution cancelled",
+/* JBIC_STACK_OVERFLOW    20 */ "stack overflow",
+/* JBIC_ILLEGAL_OPCODE    21 */ "illegal instruction code",
+/* JAMC_PHASE_ERROR       22 */ "phase error",
+/* JAMC_SCOPE_ERROR       23 */ "scope error",
+/* JBIC_ACTION_NOT_FOUND  24 */ "action not found",
+};
+
+#define MAX_ERROR_CODE (int)(sizeof(error_text)/sizeof(error_text[0]))
+
+/************************************************************************/
+
+#if 0
+int main(int argc, char **argv)
+{
+    BOOL help = FALSE;
+    BOOL error = FALSE;
+    char *filename = NULL;
+    long offset = 0L;
+    long error_address = 0L;
+    JBI_RETURN_TYPE crc_result = JBIC_SUCCESS;
+    JBI_RETURN_TYPE exec_result = JBIC_SUCCESS;
+    unsigned short expected_crc = 0;
+    unsigned short actual_crc = 0;
+    char key[33] = {0};
+    char value[257] = {0};
+    int exit_status = 0;
+    int arg = 0;
+    int exit_code = 0;
+    int format_version = 0;
+    time_t start_time = 0;
+    time_t end_time = 0;
+    int time_delta = 0;
+    char *workspace = NULL;
+    char *action = NULL;
+    char *init_list[10];
+    int init_count = 0;
+    FILE *fp = NULL;
+    struct stat sbuf;
+    long workspace_size = 0;
+    char *exit_string = NULL;
+    int reset_jtag = 1;
+    int execute_program = 1;
+    int action_count = 0;
+    int procedure_count = 0;
+    int index = 0;
+    char *action_name = NULL;
+    char *description = NULL;
+    JBI_PROCINFO *procedure_list = NULL;
+    JBI_PROCINFO *procptr = NULL;
+
+    verbose = FALSE;
+
+    init_list[0] = NULL;
+
+    /* print out the version string and copyright message */
+    fprintf(stderr, "Jam STAPL ByteCode Player Version 2.2\nCopyright (C) 1998-2001 Altera Corporation\n\n");
+
+    for (arg = 1; arg < argc; arg++)
+    {
+#if PORT == UNIX
+        if (argv[arg][0] == '-')
+#else
+        if ((argv[arg][0] == '-') || (argv[arg][0] == '/'))
+#endif
+        {
+            switch(toupper(argv[arg][1]))
+            {
+            case 'A':               /* set action name */
+                if (action == NULL)
+                {
+                    action = &argv[arg][2];
+                }
+                else
+                {
+                    error = TRUE;
+                }
+                break;
+
+#if PORT == WINDOWS || PORT == DOS
+            case 'C':               /* Use alternative ISP download cable */
+                if(toupper(argv[arg][2]) == 'L')
+                    alternative_cable_l = TRUE;
+                else if(toupper(argv[arg][2]) == 'X')
+                    alternative_cable_x = TRUE;
+                break;
+#endif
+
+            case 'D':               /* initialization list */
+                if (argv[arg][2] == '"')
+                {
+                    init_list[init_count] = &argv[arg][3];
+                }
+                else
+                {
+                    init_list[init_count] = &argv[arg][2];
+                }
+                init_list[++init_count] = NULL;
+                break;
+
+#if PORT == WINDOWS || PORT == DOS
+            case 'P':               /* set LPT port address */
+                specified_lpt_port = TRUE;
+                if (sscanf(&argv[arg][2], "%d", &lpt_port) != 1) error = TRUE;
+                if ((lpt_port < 1) || (lpt_port > 3)) error = TRUE;
+                if (error)
+                {
+                    if (sscanf(&argv[arg][2], "%x", &lpt_port) == 1)
+                    {
+                        if ((lpt_port == 0x3bc) ||
+                            (lpt_port == 0x378) ||
+                            (lpt_port == 0x278))
+                        {
+                            error = FALSE;
+                            specified_lpt_addr = TRUE;
+                            lpt_addr = (WORD) lpt_port;
+                            lpt_port = 1;
+                        }
+                    }
+                }
+                break;
+#endif
+
+            case 'R':       /* don't reset the JTAG chain after use */
+                reset_jtag = 0;
+                break;
+
+            case 'S':               /* set serial port address */
+                serial_port_name = &argv[arg][2];
+                specified_com_port = TRUE;
+                break;
+
+            case 'M':               /* set memory size */
+                if (sscanf(&argv[arg][2], "%ld", &workspace_size) != 1)
+                    error = TRUE;
+                if (workspace_size == 0) error = TRUE;
+                break;
+
+            case 'H':               /* help */
+                help = TRUE;
+                break;
+
+            case 'V':               /* verbose */
+                verbose = TRUE;
+                break;
+
+            case 'I':               /* show info only, do not execute */
+                verbose = TRUE;
+                execute_program = 0;
+                break;
+
+            default:
+                error = TRUE;
+                break;
+            }
+        }
+        else
+        {
+            /* it's a filename */
+            if (filename == NULL)
+            {
+                filename = argv[arg];
+            }
+            else
+            {
+                /* error -- we already found a filename */
+                error = TRUE;
+            }
+        }
+
+        if (error)
+        {
+            fprintf(stderr, "Illegal argument: \"%s\"\n", argv[arg]);
+            help = TRUE;
+            error = FALSE;
+        }
+    }
+
+#if PORT == WINDOWS || PORT == DOS
+    if (specified_lpt_port && specified_com_port)
+    {
+        fprintf(stderr, "Error:  -s and -p options may not be used together\n\n");
+        help = TRUE;
+    }
+#endif
+
+    if (help || (filename == NULL))
+    {
+        fprintf(stderr, "Usage:  jbi [options] <filename>\n");
+        fprintf(stderr, "\nAvailable options:\n");
+        fprintf(stderr, "    -h          : show help message\n");
+        fprintf(stderr, "    -v          : show verbose messages\n");
+        fprintf(stderr, "    -i          : show file info only - does not execute any action\n");
+        fprintf(stderr, "    -a<action>  : specify an action name (Jam STAPL)\n");
+        fprintf(stderr, "    -d<var=val> : initialize variable to specified value (Jam 1.1)\n");
+        fprintf(stderr, "    -d<proc=1>  : enable optional procedure (Jam STAPL)\n");
+        fprintf(stderr, "    -d<proc=0>  : disable recommended procedure (Jam STAPL)\n");
+#if PORT == WINDOWS || PORT == DOS
+        fprintf(stderr, "    -p<port>    : parallel port number or address (for ByteBlaster)\n");
+        fprintf(stderr, "    -c<cable>   : alternative download cable compatibility: -cl or -cx\n");
+#endif
+        fprintf(stderr, "    -s<port>    : serial port name (for BitBlaster)\n");
+        fprintf(stderr, "    -r          : don't reset JTAG TAP after use\n");
+        exit_status = 1;
+    }
+    else if ((workspace_size > 0) &&
+        ((workspace = (char *) jbi_malloc((size_t) workspace_size)) == NULL))
+    {
+        fprintf(stderr, "Error: can't allocate memory (%d Kbytes)\n",
+            (int) (workspace_size / 1024L));
+        exit_status = 1;
+    }
+    else if (access(filename, 0) != 0)
+    {
+        fprintf(stderr, "Error: can't access file \"%s\"\n", filename);
+        exit_status = 1;
+    }
+    else
+    {
+        /* get length of file */
+        if (stat(filename, &sbuf) == 0) file_length = sbuf.st_size;
+
+        if ((fp = fopen(filename, "rb")) == NULL)
+        {
+            fprintf(stderr, "Error: can't open file \"%s\"\n", filename);
+            exit_status = 1;
+        }
+        else
+        {
+            /*
+            *   Read entire file into a buffer
+            */
+#if PORT == DOS
+            int pages = 1 + (int) (file_length >> 14L);
+            int page;
+            file_buffer = (unsigned char **) jbi_malloc(
+                (size_t) (pages * sizeof(char *)));
+
+            for (page = 0; page < pages; ++page)
+            {
+                /* allocate enough 16K blocks to store the file */
+                file_buffer[page] = (unsigned char *) jbi_malloc (0x4000);
+                if (file_buffer[page] == NULL)
+                {
+                    /* flag error and break out of loop */
+                    file_buffer = NULL;
+                    page = pages;
+                }
+            }
+#else
+            file_buffer = (unsigned char *) jbi_malloc((size_t) file_length);
+#endif
+
+            if (file_buffer == NULL)
+            {
+                fprintf(stderr, "Error: can't allocate memory (%d Kbytes)\n",
+                    (int) (file_length / 1024L));
+                exit_status = 1;
+            }
+            else
+            {
+#if PORT == DOS
+                int pages = 1 + (int) (file_length >> 14L);
+                int page;
+                size_t page_size = 0x4000;
+                for (page = 0; (page < pages) && (exit_status == 0); ++page)
+                {
+                    if (page == (pages - 1))
+                    {
+                        /* last page may not be full 16K bytes */
+                        page_size = (size_t) (file_length & 0x3fffL);
+                    }
+                    if (fread(file_buffer[page], 1, page_size, fp) != page_size)
+                    {
+                        fprintf(stderr, "Error reading file \"%s\"\n", filename);
+                        exit_status = 1;
+                    }
+                }
+#else
+                if (fread(file_buffer, 1, (size_t) file_length, fp) !=
+                    (size_t) file_length)
+                {
+                    fprintf(stderr, "Error reading file \"%s\"\n", filename);
+                    exit_status = 1;
+                }
+#endif
+            }
+
+            fclose(fp);
+        }
+
+        if (exit_status == 0)
+        {
+            /*
+            *   Get Operating System type
+            */
+#if PORT == WINDOWS
+            windows_nt = !(GetVersion() & 0x80000000);
+#endif
+
+            /*
+            *   Calibrate the delay loop function
+            */
+            calibrate_delay();
+
+            /*
+            *   Check CRC
+            */
+            crc_result = jbi_check_crc(file_buffer, file_length,
+                &expected_crc, &actual_crc);
+
+            if (verbose || (crc_result == JBIC_CRC_ERROR))
+            {
+                switch (crc_result)
+                {
+                case JBIC_SUCCESS:
+                    printf("CRC matched: CRC value = %04X\n", actual_crc);
+                    break;
+
+                case JBIC_CRC_ERROR:
+                    printf("CRC mismatch: expected %04X, actual %04X\n",
+                        expected_crc, actual_crc);
+                    break;
+
+                case JBIC_UNEXPECTED_END:
+                    printf("Expected CRC not found, actual CRC value = %04X\n",
+                        actual_crc);
+                    break;
+
+                case JBIC_IO_ERROR:
+                    printf("Error: File format is not recognized.\n");
+                    exit(1);
+                    break;
+
+                default:
+                    printf("CRC function returned error code %d\n", crc_result);
+                    break;
+                }
+            }
+
+            if (verbose)
+            {
+                /*
+                *   Display file format version
+                */
+                jbi_get_file_info(file_buffer, file_length,
+                    &format_version, &action_count, &procedure_count);
+
+                printf("File format is %s ByteCode format\n",
+                    (format_version == 2) ? "Jam STAPL" : "pre-standardized Jam 1.1");
+
+                /*
+                *   Dump out NOTE fields
+                */
+                while (jbi_get_note(file_buffer, file_length,
+                    &offset, key, value, 256) == 0)
+                {
+                    printf("NOTE \"%s\" = \"%s\"\n", key, value);
+                }
+
+                /*
+                *   Dump the action table
+                */
+                if ((format_version == 2) && (action_count > 0))
+                {
+                    printf("\nActions available in this file:\n");
+
+                    for (index = 0; index < action_count; ++index)
+                    {
+                        jbi_get_action_info(file_buffer, file_length,
+                            index, &action_name, &description, &procedure_list);
+
+                        if (description == NULL)
+                        {
+                            printf("%s\n", action_name);
+                        }
+                        else
+                        {
+                            printf("%s \"%s\"\n", action_name, description);
+                        }
+
+#if PORT == DOS
+                        if (action_name != NULL) jbi_free(action_name);
+                        if (description != NULL) jbi_free(description);
+#endif
+
+                        procptr = procedure_list;
+                        while (procptr != NULL)
+                        {
+                            if (procptr->attributes != 0)
+                            {
+                                printf("    %s (%s)\n", procptr->name,
+                                    (procptr->attributes == 1) ?
+                                    "optional" : "recommended");
+                            }
+
+#if PORT == DOS
+                            if (procptr->name != NULL) jbi_free(procptr->name);
+#endif
+
+                            procedure_list = procptr->next;
+                            jbi_free(procptr);
+                            procptr = procedure_list;
+                        }
+                    }
+
+                    /* add a blank line before execution messages */
+                    if (execute_program) printf("\n");
+                }
+            }
+
+            if (execute_program)
+            {
+                /*
+                *   Execute the Jam STAPL ByteCode program
+                */
+                time(&start_time);
+                exec_result = jbi_execute(file_buffer, file_length, workspace,
+                    workspace_size, action, init_list, reset_jtag,
+                    &error_address, &exit_code, &format_version);
+                time(&end_time);
+
+                if (exec_result == JBIC_SUCCESS)
+                {
+                    if (format_version == 2)
+                    {
+                        switch (exit_code)
+                        {
+                        case  0: exit_string = "Success"; break;
+                        case  1: exit_string = "Checking chain failure"; break;
+                        case  2: exit_string = "Reading IDCODE failure"; break;
+                        case  3: exit_string = "Reading USERCODE failure"; break;
+                        case  4: exit_string = "Reading UESCODE failure"; break;
+                        case  5: exit_string = "Entering ISP failure"; break;
+                        case  6: exit_string = "Unrecognized device"; break;
+                        case  7: exit_string = "Device revision is not supported"; break;
+                        case  8: exit_string = "Erase failure"; break;
+                        case  9: exit_string = "Device is not blank"; break;
+                        case 10: exit_string = "Device programming failure"; break;
+                        case 11: exit_string = "Device verify failure"; break;
+                        case 12: exit_string = "Read failure"; break;
+                        case 13: exit_string = "Calculating checksum failure"; break;
+                        case 14: exit_string = "Setting security bit failure"; break;
+                        case 15: exit_string = "Querying security bit failure"; break;
+                        case 16: exit_string = "Exiting ISP failure"; break;
+                        case 17: exit_string = "Performing system test failure"; break;
+                        default: exit_string = "Unknown exit code"; break;
+                        }
+                    }
+                    else
+                    {
+                        switch (exit_code)
+                        {
+                        case 0: exit_string = "Success"; break;
+                        case 1: exit_string = "Illegal initialization values"; break;
+                        case 2: exit_string = "Unrecognized device"; break;
+                        case 3: exit_string = "Device revision is not supported"; break;
+                        case 4: exit_string = "Device programming failure"; break;
+                        case 5: exit_string = "Device is not blank"; break;
+                        case 6: exit_string = "Device verify failure"; break;
+                        case 7: exit_string = "SRAM configuration failure"; break;
+                        default: exit_string = "Unknown exit code"; break;
+                        }
+                    }
+
+                    printf("Exit code = %d... %s\n", exit_code, exit_string);
+                }
+                else if ((format_version == 2) &&
+                    (exec_result == JBIC_ACTION_NOT_FOUND))
+                {
+                    if ((action == NULL) || (*action == '\0'))
+                    {
+                        printf("Error: no action specified for Jam STAPL file.\nProgram terminated.\n");
+                    }
+                    else
+                    {
+                        printf("Error: action \"%s\" is not supported for this Jam STAPL file.\nProgram terminated.\n", action);
+                    }
+                }
+                else if (exec_result < MAX_ERROR_CODE)
+                {
+                    printf("Error at address %ld: %s.\nProgram terminated.\n",
+                        error_address, error_text[exec_result]);
+                }
+                else
+                {
+                    printf("Unknown error code %ld\n", exec_result);
+                }
+
+                /*
+                *   Print out elapsed time
+                */
+                if (verbose)
+                {
+                    time_delta = (int) (end_time - start_time);
+                    printf("Elapsed time = %02u:%02u:%02u\n",
+                        time_delta / 3600,          /* hours */
+                        (time_delta % 3600) / 60,   /* minutes */
+                        time_delta % 60);           /* seconds */
+                }
+            }
+        }
+    }
+
+    if (jtag_hardware_initialized) close_jtag_hardware();
+
+    if (workspace != NULL) jbi_free(workspace);
+    if (file_buffer != NULL) jbi_free(file_buffer);
+
+#if defined(MEM_TRACKER)
+    if (verbose)
+    {
+#if defined(USE_STATIC_MEMORY)
+        fprintf(stdout, "Memory Usage Info: static memory size = %ud (%dKB)\n", N_STATIC_MEMORY_BYTES, N_STATIC_MEMORY_KBYTES);
+#endif /* USE_STATIC_MEMORY */
+        fprintf(stdout, "Memory Usage Info: peak memory usage = %ud (%dKB)\n", peak_memory_usage, (peak_memory_usage + 1023) / 1024);
+        fprintf(stdout, "Memory Usage Info: peak allocations = %d\n", peak_allocations);
+#if defined(USE_STATIC_MEMORY)
+        if ((n_bytes_allocated - n_bytes_not_recovered) != 0)
+        {
+            fprintf(stdout, "Memory Usage Info: bytes still allocated = %d (%dKB)\n", (n_bytes_allocated - n_bytes_not_recovered), ((n_bytes_allocated - n_bytes_not_recovered) + 1023) / 1024);
+        }
+#else /* USE_STATIC_MEMORY */
+        if (n_bytes_allocated != 0)
+        {
+            fprintf(stdout, "Memory Usage Info: bytes still allocated = %d (%dKB)\n", n_bytes_allocated, (n_bytes_allocated + 1023) / 1024);
+        }
+#endif /* USE_STATIC_MEMORY */
+        if (n_allocations != 0)
+        {
+            fprintf(stdout, "Memory Usage Info: allocations not freed = %d\n", n_allocations);
+        }
+    }
+#endif /* MEM_TRACKER */
+
+    return (exit_status);
+}
+#endif
+
+#if PORT==WINDOWS
+#ifndef __BORLANDC__
+/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+*
+*   SEARCH_DYN_DATA
+*
+*   Searches recursively in Windows 95/98 Registry for parallel port info
+*   under HKEY_DYN_DATA registry key.  Called by search_local_machine().
+*/
+void search_dyn_data
+(
+    char *dd_path,
+    char *hardware_key,
+    int lpt
+)
+{
+    DWORD index;
+    DWORD size;
+    DWORD type;
+    LONG result;
+    HKEY key;
+    int length;
+    WORD address;
+    char buffer[1024];
+    FILETIME last_write = {0};
+    WORD *word_ptr;
+    int i;
+
+    length = strlen(dd_path);
+
+    if (RegOpenKeyEx(
+        HKEY_DYN_DATA,
+        dd_path,
+        0L,
+        KEY_READ,
+        &key)
+        == ERROR_SUCCESS)
+    {
+        size = 1023;
+
+        if (RegQueryValueEx(
+            key,
+            "HardWareKey",
+            NULL,
+            &type,
+            (unsigned char *) buffer,
+            &size)
+            == ERROR_SUCCESS)
+        {
+            if ((type == REG_SZ) && (stricmp(buffer, hardware_key) == 0))
+            {
+                size = 1023;
+
+                if (RegQueryValueEx(
+                    key,
+                    "Allocation",
+                    NULL,
+                    &type,
+                    (unsigned char *) buffer,
+                    &size)
+                    == ERROR_SUCCESS)
+                {
+                    /*
+                    *   By "inspection", I have found five cases: size 32, 48,
+                    *   56, 60, and 80 bytes.  The port address seems to be
+                    *   located at different offsets in the buffer for these
+                    *   five cases, as shown below.  If a valid port address
+                    *   is not found, or the size is not one of these known
+                    *   sizes, then I search through the entire buffer and
+                    *   look for a value which is a valid port address.
+                    */
+
+                    word_ptr = (WORD *) buffer;
+
+                    if ((type == REG_BINARY) && (size == 32))
+                    {
+                        address = word_ptr[10];
+                    }
+                    else if ((type == REG_BINARY) && (size == 48))
+                    {
+                        address = word_ptr[18];
+                    }
+                    else if ((type == REG_BINARY) && (size == 56))
+                    {
+                        address = word_ptr[22];
+                    }
+                    else if ((type == REG_BINARY) && (size == 60))
+                    {
+                        address = word_ptr[24];
+                    }
+                    else if ((type == REG_BINARY) && (size == 80))
+                    {
+                        address = word_ptr[24];
+                    }
+                    else address = 0;
+
+                    /* if not found, search through entire buffer */
+                    i = 0;
+                    while ((i < (int) (size / 2)) &&
+                        (address != 0x278) &&
+                        (address != 0x27C) &&
+                        (address != 0x378) &&
+                        (address != 0x37C) &&
+                        (address != 0x3B8) &&
+                        (address != 0x3BC))
+                    {
+                        if ((word_ptr[i] == 0x278) ||
+                            (word_ptr[i] == 0x27C) ||
+                            (word_ptr[i] == 0x378) ||
+                            (word_ptr[i] == 0x37C) ||
+                            (word_ptr[i] == 0x3B8) ||
+                            (word_ptr[i] == 0x3BC))
+                        {
+                            address = word_ptr[i];
+                        }
+                        ++i;
+                    }
+
+                    if ((address == 0x278) ||
+                        (address == 0x27C) ||
+                        (address == 0x378) ||
+                        (address == 0x37C) ||
+                        (address == 0x3B8) ||
+                        (address == 0x3BC))
+                    {
+                        lpt_addresses_from_registry[lpt] = address;
+                    }
+                }
+            }
+        }
+
+        index = 0;
+
+        do
+        {
+            size = 1023;
+
+            result = RegEnumKeyEx(
+                key,
+                index++,
+                buffer,
+                &size,
+                NULL,
+                NULL,
+                NULL,
+                &last_write);
+
+            if (result == ERROR_SUCCESS)
+            {
+                dd_path[length] = '\\';
+                dd_path[length + 1] = '\0';
+                strcpy(&dd_path[length + 1], buffer);
+
+                search_dyn_data(dd_path, hardware_key, lpt);
+
+                dd_path[length] = '\0';
+            }
+        }
+        while (result == ERROR_SUCCESS);
+
+        RegCloseKey(key);
+    }
+}
+
+/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+*
+*   SEARCH_LOCAL_MACHINE
+*
+*   Searches recursively in Windows 95/98 Registry for parallel port info
+*   under HKEY_LOCAL_MACHINE\Enum.  When parallel port is found, calls
+*   search_dyn_data() to get the port address.
+*/
+void search_local_machine
+(
+    char *lm_path,
+    char *dd_path
+)
+{
+    DWORD index;
+    DWORD size;
+    DWORD type;
+    LONG result;
+    HKEY key;
+    int length;
+    char buffer[1024];
+    FILETIME last_write = {0};
+
+    length = strlen(lm_path);
+
+    if (RegOpenKeyEx(
+        HKEY_LOCAL_MACHINE,
+        lm_path,
+        0L,
+        KEY_READ,
+        &key)
+        == ERROR_SUCCESS)
+    {
+        size = 1023;
+
+        if (RegQueryValueEx(
+            key,
+            "PortName",
+            NULL,
+            &type,
+            (unsigned char *) buffer,
+            &size)
+            == ERROR_SUCCESS)
+        {
+            if ((type == REG_SZ) &&
+                (size == 5) &&
+                (buffer[0] == 'L') &&
+                (buffer[1] == 'P') &&
+                (buffer[2] == 'T') &&
+                (buffer[3] >= '1') &&
+                (buffer[3] <= '4') &&
+                (buffer[4] == '\0'))
+            {
+                /* we found the entry in HKEY_LOCAL_MACHINE, now we need to */
+                /* find the corresponding entry under HKEY_DYN_DATA.  */
+                /* add 5 to lm_path to skip over "Enum" and backslash */
+                search_dyn_data(dd_path, &lm_path[5], (buffer[3] - '1'));
+            }
+        }
+
+        index = 0;
+
+        do
+        {
+            size = 1023;
+
+            result = RegEnumKeyEx(
+                key,
+                index++,
+                buffer,
+                &size,
+                NULL,
+                NULL,
+                NULL,
+                &last_write);
+
+            if (result == ERROR_SUCCESS)
+            {
+                lm_path[length] = '\\';
+                lm_path[length + 1] = '\0';
+                strcpy(&lm_path[length + 1], buffer);
+
+                search_local_machine(lm_path, dd_path);
+
+                lm_path[length] = '\0';
+            }
+        }
+        while (result == ERROR_SUCCESS);
+
+        RegCloseKey(key);
+    }
+}
+
+/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
+*
+*   GET_LPT_ADDRESSES_FROM_REGISTRY
+*
+*   Searches Win95/98 registry recursively to get I/O port addresses for
+*   parallel ports.
+*/
+void get_lpt_addresses_from_registry()
+{
+    char lm_path[1024];
+    char dd_path[1024];
+
+    strcpy(lm_path, "Enum");
+    strcpy(dd_path, "Config Manager");
+    search_local_machine(lm_path, dd_path);
+}
+#endif
+#endif
+
+void initialize_jtag_hardware()
+{
+    if (specified_com_port)
+    {
+        com_port = open(serial_port_name, O_RDWR);
+        if (com_port == -1)
+        {
+            fprintf(stderr, "Error: can't open serial port \"%s\"\n",
+                serial_port_name);
+        }
+        else
+        {
+            int i = 0, result = 0;
+            char data = 0;
+
+            data = 0x7e;
+            write(com_port, &data, 1);
+
+            for (i = 0; (i < 100) && (result != 1); ++i)
+            {
+                result = read(com_port, &data, 1);
+            }
+
+            if (result == 1)
+            {
+                data = 0x70; write(com_port, &data, 1); /* TDO echo off */
+                data = 0x72; write(com_port, &data, 1); /* auto LEDs off */
+                data = 0x74; write(com_port, &data, 1); /* ERROR LED off */
+                data = 0x76; write(com_port, &data, 1); /* DONE LED off */
+                data = 0x60; write(com_port, &data, 1); /* signals low */
+            }
+            else
+            {
+                fprintf(stderr, "Error: BitBlaster is not responding on %s\n",
+                    serial_port_name);
+                close(com_port);
+                com_port = -1;
+            }
+        }
+    }
+    else
+    {
+#if PORT == WINDOWS || PORT == DOS
+
+#if PORT == WINDOWS
+        if (windows_nt)
+        {
+            initialize_nt_driver();
+        }
+        else
+        {
+#ifdef __BORLANDC__
+            fprintf(stderr, "Error: parallel port access is not available\n");
+#else
+            if (!specified_lpt_addr)
+            {
+                get_lpt_addresses_from_registry();
+
+                lpt_addr = 0;
+
+                if (specified_lpt_port)
+                {
+                    lpt_addr = lpt_addresses_from_registry[lpt_port - 1];
+                }
+
+                if (lpt_addr == 0)
+                {
+                    if (lpt_addresses_from_registry[3] != 0)
+                        lpt_addr = lpt_addresses_from_registry[3];
+                    if (lpt_addresses_from_registry[2] != 0)
+                        lpt_addr = lpt_addresses_from_registry[2];
+                    if (lpt_addresses_from_registry[1] != 0)
+                        lpt_addr = lpt_addresses_from_registry[1];
+                    if (lpt_addresses_from_registry[0] != 0)
+                        lpt_addr = lpt_addresses_from_registry[0];
+                }
+
+                if (lpt_addr == 0)
+                {
+                    if (specified_lpt_port)
+                    {
+                        lpt_addr = lpt_addr_table[lpt_port - 1];
+                    }
+                    else
+                    {
+                        lpt_addr = lpt_addr_table[0];
+                    }
+                }
+            }
+            initial_lpt_ctrl = windows_nt ? 0x0c : read_byteblaster(2);
+#endif
+        }
+#endif
+
+#if PORT == DOS
+        /*
+        *   Read word at specific memory address to get the LPT port address
+        */
+        WORD *bios_address = (WORD *) 0x00400008;
+
+        if (!specified_lpt_addr)
+        {
+            lpt_addr = bios_address[lpt_port - 1];
+
+            if ((lpt_addr != 0x278) &&
+                (lpt_addr != 0x27c) &&
+                (lpt_addr != 0x378) &&
+                (lpt_addr != 0x37c) &&
+                (lpt_addr != 0x3b8) &&
+                (lpt_addr != 0x3bc))
+            {
+                lpt_addr = lpt_addr_table[lpt_port - 1];
+            }
+        }
+        initial_lpt_ctrl = read_byteblaster(2);
+#endif
+
+        /* set AUTO-FEED low to enable ByteBlaster (value to port inverted) */
+        /* set DIRECTION low for data output from parallel port */
+        write_byteblaster(2, (initial_lpt_ctrl | 0x02) & 0xDF);
+#endif
+    }
+}
+
+void close_jtag_hardware()
+{
+    if (specified_com_port)
+    {
+        if (com_port != -1) close(com_port);
+    }
+    else
+    {
+#if PORT == WINDOWS || PORT == DOS
+        /* set AUTO-FEED high to disable ByteBlaster */
+        write_byteblaster(2, initial_lpt_ctrl & 0xfd);
+
+#if PORT == WINDOWS
+        if (windows_nt && (nt_device_handle != INVALID_HANDLE_VALUE))
+        {
+            if (port_io_count > 0) flush_ports();
+
+            CloseHandle(nt_device_handle);
+        }
+#endif
+#endif
+    }
+}
+
+#if PORT == WINDOWS
+/**************************************************************************/
+/*                                                                        */
+
+BOOL initialize_nt_driver()
+
+/*                                                                        */
+/*  Uses CreateFile() to open a connection to the Windows NT device       */
+/*  driver.                                                               */
+/*                                                                        */
+/**************************************************************************/
+{
+    BOOL status = FALSE;
+
+    ULONG buffer[1];
+    ULONG returned_length = 0;
+    char nt_lpt_str[] = { '\\', '\\', '.', '\\',
+        'A', 'L', 'T', 'L', 'P', 'T', '1', '\0' };
+
+    nt_lpt_str[10] = (char) ('1' + (lpt_port - 1));
+
+    nt_device_handle = CreateFile(
+        nt_lpt_str,
+        GENERIC_READ | GENERIC_WRITE,
+        0,
+        NULL,
+        OPEN_EXISTING,
+        FILE_ATTRIBUTE_NORMAL,
+        NULL);
+
+    if (nt_device_handle == INVALID_HANDLE_VALUE)
+    {
+        fprintf(stderr,
+            "I/O error:  cannot open device %s\nCheck port number and device driver installation",
+            nt_lpt_str);
+    }
+    else
+    {
+        if (DeviceIoControl(
+            nt_device_handle,           /* Handle to device */
+            PGDC_IOCTL_GET_DEVICE_INFO_PP,  /* IO Control code */
+            (ULONG *)NULL,                  /* Buffer to driver. */
+            0,                              /* Length of buffer in bytes. */
+            &buffer,                        /* Buffer from driver. */
+            sizeof(ULONG),                  /* Length of buffer in bytes. */
+            &returned_length,               /* Bytes placed in data_buffer. */
+            NULL))                          /* Wait for operation to complete */
+        {
+            if (returned_length == sizeof(ULONG))
+            {
+                if (buffer[0] == PGDC_HDLC_NTDRIVER_VERSION)
+                {
+                    status = TRUE;
+                }
+                else
+                {
+                    fprintf(stderr,
+                        "I/O error:  device driver %s is not compatible\n(Driver version is %lu, expected version %lu.\n",
+                        nt_lpt_str,
+                        (unsigned long) buffer[0],
+                        (unsigned long) PGDC_HDLC_NTDRIVER_VERSION);
+                }
+            }
+            else
+            {
+                fprintf(stderr, "I/O error:  device driver %s is not compatible.\n",
+                    nt_lpt_str);
+            }
+        }
+
+        if (!status)
+        {
+            CloseHandle(nt_device_handle);
+            nt_device_handle = INVALID_HANDLE_VALUE;
+        }
+    }
+
+    if (!status)
+    {
+        /* error message already given */
+        exit(1);
+    }
+
+    return (status);
+}
+#endif
+
+#if PORT == WINDOWS || PORT == DOS
+/**************************************************************************/
+/*                                                                        */
+
+void write_byteblaster
+(
+    int port,
+    int data
+)
+
+/*                                                                        */
+/**************************************************************************/
+{
+#if PORT == WINDOWS
+    BOOL status = FALSE;
+
+    int returned_length = 0;
+    int buffer[2];
+
+    if (windows_nt)
+    {
+        /*
+        *   On Windows NT, access hardware through device driver
+        */
+        if (port == 0)
+        {
+            port_io_buffer[port_io_count].data = (USHORT) data;
+            port_io_buffer[port_io_count].command = PGDC_WRITE_PORT;
+            ++port_io_count;
+
+            if (port_io_count >= PORT_IO_BUFFER_SIZE) flush_ports();
+        }
+        else
+        {
+            if (port_io_count > 0) flush_ports();
+
+            buffer[0] = port;
+            buffer[1] = data;
+
+            status = DeviceIoControl(
+                nt_device_handle,           /* Handle to device */
+                PGDC_IOCTL_WRITE_PORT_PP,   /* IO Control code for write */
+                (ULONG *)&buffer,           /* Buffer to driver. */
+                2 * sizeof(int),            /* Length of buffer in bytes. */
+                (ULONG *)NULL,              /* Buffer from driver.  Not used. */
+                0,                          /* Length of buffer in bytes. */
+                (ULONG *)&returned_length,  /* Bytes returned.  Should be zero. */
+                NULL);                      /* Wait for operation to complete */
+
+            if ((!status) || (returned_length != 0))
+            {
+                fprintf(stderr, "I/O error:  Cannot access ByteBlaster hardware\n");
+                CloseHandle(nt_device_handle);
+                exit(1);
+            }
+        }
+    }
+    else
+#endif
+    {
+        /*
+        *   On Windows 95, access hardware directly
+        */
+        outp((WORD)(port + lpt_addr), (WORD)data);
+    }
+}
+
+/**************************************************************************/
+/*                                                                        */
+
+int read_byteblaster
+(
+    int port
+)
+
+/*                                                                        */
+/**************************************************************************/
+{
+    int data = 0;
+
+#if PORT == WINDOWS
+
+    BOOL status = FALSE;
+
+    int returned_length = 0;
+
+    if (windows_nt)
+    {
+        /* flush output cache buffer before reading from device */
+        if (port_io_count > 0) flush_ports();
+
+        /*
+        *   On Windows NT, access hardware through device driver
+        */
+        status = DeviceIoControl(
+            nt_device_handle,           /* Handle to device */
+            PGDC_IOCTL_READ_PORT_PP,    /* IO Control code for Read */
+            (ULONG *)&port,             /* Buffer to driver. */
+            sizeof(int),                /* Length of buffer in bytes. */
+            (ULONG *)&data,             /* Buffer from driver. */
+            sizeof(int),                /* Length of buffer in bytes. */
+            (ULONG *)&returned_length,  /* Bytes placed in data_buffer. */
+            NULL);                      /* Wait for operation to complete */
+
+        if ((!status) || (returned_length != sizeof(int)))
+        {
+            fprintf(stderr, "I/O error:  Cannot access ByteBlaster hardware\n");
+            CloseHandle(nt_device_handle);
+            exit(1);
+        }
+    }
+    else
+#endif
+    {
+        /*
+        *   On Windows 95, access hardware directly
+        */
+        data = inp((WORD)(port + lpt_addr));
+    }
+
+    return (data & 0xff);
+}
+
+#if PORT == WINDOWS
+void flush_ports(void)
+{
+    ULONG n_writes = 0L;
+    BOOL status;
+
+    status = DeviceIoControl(
+        nt_device_handle,           /* handle to device */
+        PGDC_IOCTL_PROCESS_LIST_PP, /* IO control code */
+        (LPVOID)port_io_buffer,     /* IN buffer (list buffer) */
+        port_io_count * sizeof(struct PORT_IO_LIST_STRUCT),/* length of IN buffer in bytes */
+        (LPVOID)port_io_buffer, /* OUT buffer (list buffer) */
+        port_io_count * sizeof(struct PORT_IO_LIST_STRUCT),/* length of OUT buffer in bytes */
+        &n_writes,                  /* number of writes performed */
+        0);                         /* wait for operation to complete */
+
+    if ((!status) || ((port_io_count * sizeof(struct PORT_IO_LIST_STRUCT)) != n_writes))
+    {
+        fprintf(stderr, "I/O error:  Cannot access ByteBlaster hardware\n");
+        CloseHandle(nt_device_handle);
+        exit(1);
+    }
+
+    port_io_count = 0;
+}
+#endif /* PORT == WINDOWS */
+#endif /* PORT == WINDOWS || PORT == DOS */
+
+#if 0
+#if !defined (DEBUG)
+#pragma optimize ("ceglt", off)
+#endif
+#endif
+
+void delay_loop(long count)
+{
+    while (count != 0L) count--;
+}
+
+#if PORT == EMBEDDED
+
+static void jbi_init_mm(void)
+{
+#if defined(USE_STATIC_MEMORY)
+    int i;
+#endif /* USE_STATIC_MEMORY */
+
+#if defined(USE_STATIC_MEMORY) || defined(MEM_TRACKER)
+    n_bytes_allocated = 0;
+#endif /* USE_STATIC_MEMORY || MEM_TRACKER */
+
+#if defined(MEM_TRACKER)
+    peak_memory_usage = 0;
+    peak_allocations = 0;
+    n_allocations = 0;
+#if defined(USE_STATIC_MEMORY)
+    n_bytes_not_recovered = 0;
+#endif /* USE_STATIC_MEMORY */
+#endif /* MEM_TRACKER */
+
+#if defined(USE_STATIC_MEMORY)
+    jbi_dbg(DEBUG_DETAIL, "static_memory_heap:  0x%p(0x%x)\n",
+        static_memory_heap, N_STATIC_MEMORY_BYTES);
+    for (i = 0; i < N_STATIC_MEMORY_BYTES; i++) {
+        static_memory_heap[i] = 0;
+    }
+#endif /* USE_STATIC_MEMORY */
+
+    jbi_delay_us = 0;
+    jbi_delay_count = 0;
+    jbi_peak_us = 0;
+}
+
+static void jbi_exit_mm(void)
+{
+#if defined(USE_STATIC_MEMORY) || defined(MEM_TRACKER)
+    jbi_dbg(DEBUG_DETAIL, "n_bytes_allocated:     %u\n", n_bytes_allocated);
+    n_bytes_allocated = 0;
+#endif /* USE_STATIC_MEMORY || MEM_TRACKER */
+
+#if defined(MEM_TRACKER)
+    jbi_dbg(DEBUG_DETAIL, "peak_memory_usage:     %u\n", peak_memory_usage);
+    jbi_dbg(DEBUG_DETAIL, "peak_allocations:      %u\n", peak_allocations);
+    jbi_dbg(DEBUG_DETAIL, "n_allocations:         %u\n", n_allocations);
+    peak_memory_usage = 0;
+    peak_allocations = 0;
+    n_allocations = 0;
+#if defined(USE_STATIC_MEMORY)
+    jbi_dbg(DEBUG_DETAIL, "n_bytes_not_recovered: %u\n", n_bytes_not_recovered);
+    n_bytes_not_recovered = 0;
+#endif /* USE_STATIC_MEMORY */
+#endif /* MEM_TRACKER */
+
+    jbi_dbg(DEBUG_DETAIL, "jbi_delay: %ld us, %ld count, peak %ld us\n",
+        jbi_delay_us, jbi_delay_count, jbi_peak_us);
+}
+
+static char *get_exit_string(int format_version, int exit_code)
+{
+    char *exit_string = NULL;
+
+    if (format_version == 2){
+        switch (exit_code) {
+        case 0:
+            exit_string = "Success";
+            break;
+        case 1:
+            exit_string = "Checking chain failure";
+            break;
+        case 2:
+            exit_string = "Reading IDCODE failure";
+            break;
+        case 3:
+            exit_string = "Reading USERCODE failure";
+            break;
+        case 4:
+            exit_string = "Reading UESCODE failure";
+            break;
+        case 5:
+            exit_string = "Entering ISP failure";
+            break;
+        case 6:
+            exit_string = "Unrecognized device";
+            break;
+        case 7:
+            exit_string = "Device revision is not supported";
+            break;
+        case 8:
+            exit_string = "Erase failure";
+            break;
+        case 9:
+            exit_string = "Device is not blank";
+            break;
+        case 10:
+            exit_string = "Device programming failure";
+            break;
+        case 11:
+            exit_string = "Device verify failure";
+            break;
+        case 12:
+            exit_string = "Read failure"; break;
+        case 13:
+            exit_string = "Calculating checksum failure";
+            break;
+        case 14:
+            exit_string = "Setting security bit failure";
+            break;
+        case 15:
+            exit_string = "Querying security bit failure";
+            break;
+        case 16:
+            exit_string = "Exiting ISP failure";
+            break;
+        case 17:
+            exit_string = "Performing system test failure";
+            break;
+        default:
+            exit_string = "Unknown exit code";
+            break;
+        }
+    } else {
+        switch (exit_code) {
+        case 0:
+            exit_string = "Success";
+            break;
+        case 1:
+            exit_string = "Illegal initialization values";
+            break;
+        case 2:
+            exit_string = "Unrecognized device";
+            break;
+        case 3:
+            exit_string = "Device revision is not supported";
+            break;
+        case 4:
+            exit_string = "Device programming failure";
+            break;
+        case 5:
+            exit_string = "Device is not blank";
+            break;
+        case 6:
+            exit_string = "Device verify failure";
+            break;
+        case 7:
+            exit_string = "SRAM configuration failure";
+            break;
+        default:
+            exit_string = "Unknown exit code";
+            break;
+        }
+    }
+
+    return exit_string;
+}
+
+static void jbi_help(void)
+{
+    fprintf(stderr, "Usage:  jbi <addr> <size> [options]\n");
+    fprintf(stderr, "\nAvailable options:\n");
+    fprintf(stderr, "    -h          : show help message\n");
+    fprintf(stderr, "    -v          : show verbose messages\n");
+    fprintf(stderr, "    -i          : show file info only - does not execute any action\n");
+    fprintf(stderr, "    -a<action>  : specify an action name (Jam STAPL)\n");
+    fprintf(stderr, "    -d<var=val> : initialize variable to specified value (Jam 1.1)\n");
+    fprintf(stderr, "    -d<proc=1>  : enable optional procedure (Jam STAPL)\n");
+    fprintf(stderr, "    -d<proc=0>  : disable recommended procedure (Jam STAPL)\n");
+    fprintf(stderr, "    -r          : don't reset JTAG TAP after use\n");
+}
+
+int jbi_debug(int level)
+{
+    jbi_debug_level = level;
+
+    return 0;
+}
+
+int jbi_main(unsigned char *addr, unsigned long size, int argc, char * const argv[])
+{
+    BOOL help = FALSE;
+    BOOL error = FALSE;
+    long offset = 0L;
+    long error_address = 0L;
+    JBI_RETURN_TYPE crc_result = JBIC_SUCCESS;
+    JBI_RETURN_TYPE exec_result = JBIC_SUCCESS;
+    unsigned short expected_crc = 0;
+    unsigned short actual_crc = 0;
+    char key[33] = {0};
+    char value[257] = {0};
+    int exit_status = 0;
+    int arg = 0;
+    int exit_code = 0;
+    int format_version = 0;
+    char *workspace = NULL;
+    char *action = NULL;
+    char *init_list[10];
+    int init_count = 0;
+    long workspace_size = 0;
+    char *exit_string = NULL;
+    int reset_jtag = 1;
+    int execute_program = 1;
+    int action_count = 0;
+    int procedure_count = 0;
+    int index = 0;
+    char *action_name = NULL;
+    char *description = NULL;
+    JBI_PROCINFO *procedure_list = NULL;
+    JBI_PROCINFO *procptr = NULL;
+    char *endp = NULL;
+
+    verbose = FALSE;
+
+    init_list[0] = NULL;
+
+    /* print out the version string and copyright message */
+    printf("Jam STAPL ByteCode Player Version 2.2\n");
+    printf("Copyright (C) 1998-2001 Altera Corporation\n\n");
+
+    for (arg = 0; arg < argc; arg++) {
+        if (argv[arg][0] == '-') {
+            switch (toupper(argv[arg][1])) {
+            case 'A':   /* set action name */
+                if (action == NULL) {
+                    action = &argv[arg][2];
+                } else {
+                    error = TRUE;
+                }
+                break;
+            case 'D':   /* initialization list */
+                if (argv[arg][2] == '"') {
+                    init_list[init_count] = &argv[arg][3];
+                } else {
+                    init_list[init_count] = &argv[arg][2];
+                }
+                init_list[++init_count] = NULL;
+                break;
+            case 'R':   /* don't reset the JTAG chain after use */
+                reset_jtag = 0;
+                break;
+            case 'M':   /* set memory size */
+                workspace = (char *) simple_strtoul(&argv[arg][2], &endp, 16);
+                if (workspace == NULL) {
+                    printf("Error workspace\n");
+                    error = TRUE;
+                } else {
+                    if (*endp == '.') {
+                        workspace_size = simple_strtoul(endp + 1, &endp, 16);
+                        if (*endp != '\0') {
+                            printf("Error workspace size end\n");
+                            error = TRUE;
+                        }
+                    } else {
+                        printf("No workspace size\n");
+                        error = TRUE;
+                    }
+                }
+                break;
+            case 'H':               /* help */
+                help = TRUE;
+                break;
+            case 'V':               /* verbose */
+                verbose = TRUE;
+                break;
+            case 'I':               /* show info only, do not execute */
+                verbose = TRUE;
+                execute_program = 0;
+                break;
+            default:
+                error = TRUE;
+                break;
+            }
+        } else {
+            error = TRUE;
+        }
+
+        if (error) {
+            fprintf(stderr, "Illegal argument: \"%s\"\n", argv[arg]);
+            help = TRUE;
+            error = FALSE;
+        }
+    }
+
+    if (help) {
+        jbi_help();
+        return 0;
+    }
+
+    /* Calibrate the delay loop function */
+    calibrate_delay();
+
+    jbi_init_mm();
+
+    /* Check CRC */
+    crc_result = jbi_check_crc(addr, size, &expected_crc, &actual_crc);
+    if (verbose || (crc_result == JBIC_CRC_ERROR)) {
+        switch (crc_result) {
+        case JBIC_SUCCESS:
+            printf("CRC matched: CRC value = %04X\n", actual_crc);
+            break;
+        case JBIC_CRC_ERROR:
+            printf("CRC mismatch: expected %04X, actual %04X\n", expected_crc, actual_crc);
+            return -1;
+        case JBIC_UNEXPECTED_END:
+            printf("Expected CRC not found, actual CRC value = %04X\n", actual_crc);
+            return -1;
+        case JBIC_IO_ERROR:
+            printf("Error: File format is not recognized.\n");
+            return -1;
+        default:
+            printf("CRC function returned error code %d\n", crc_result);
+            return -1;
+        }
+    }
+
+    if (verbose) {
+        /* Display file format version */
+        jbi_get_file_info(addr, size, &format_version,
+            &action_count, &procedure_count);
+
+        printf("File format is %s ByteCode format\n",
+            (format_version == 2) ? "Jam STAPL" : "pre-standardized Jam 1.1");
+
+        /* Dump out NOTE fields */
+        while (jbi_get_note(addr, size, &offset, key, value, 256) == 0) {
+            printf("NOTE \"%s\" = \"%s\"\n", key, value);
+        }
+
+        /* Dump the action table */
+        if ((format_version == 2) && (action_count > 0)) {
+            printf("\nActions available in this file:\n");
+
+            for (index = 0; index < action_count; ++index) {
+                jbi_get_action_info(addr, size,
+                    index, &action_name, &description, &procedure_list);
+
+                if (description == NULL) {
+                    printf("%s\n", action_name);
+                } else {
+                    printf("%s \"%s\"\n", action_name, description);
+                }
+
+                procptr = procedure_list;
+                while (procptr != NULL) {
+                    if (procptr->attributes != 0) {
+                        printf("    %s (%s)\n", procptr->name,
+                            (procptr->attributes == 1) ? "optional" : "recommended");
+                    }
+
+                    procedure_list = procptr->next;
+                    jbi_free(procptr);
+                    procptr = procedure_list;
+                }
+            }
+
+            /* add a blank line before execution messages */
+            if (execute_program)
+                printf("\n");
+        }
+    }
+
+    if (execute_program) {
+        /* Execute the Jam STAPL ByteCode program */
+        exec_result = jbi_execute(addr, size, workspace,
+            workspace_size, action, init_list, reset_jtag,
+            &error_address, &exit_code, &format_version);
+        if (exec_result == JBIC_SUCCESS) {
+            exit_string = get_exit_string(format_version, exit_code);
+            printf("Exit code = %d... %s\n", exit_code, exit_string);
+        } else if ((format_version == 2) && (exec_result == JBIC_ACTION_NOT_FOUND)) {
+            if ((action == NULL) || (*action == '\0')) {
+                printf("Error: no action specified for Jam STAPL file.\n"
+                    "Program terminated.\n");
+            } else {
+                printf("Error: action \"%s\" is not supported for this Jam STAPL file.\n"
+                    "Program terminated.\n", action);
+            }
+        } else if (exec_result < MAX_ERROR_CODE) {
+            printf("Error at address %ld: %s.\nProgram terminated.\n",
+                error_address, error_text[exec_result]);
+        } else {
+            printf("Unknown error code %d\n", exec_result);
+        }
+    }
+
+    if (jtag_hardware_initialized) {
+        close_jtag_hardware();
+        jtag_hardware_initialized = FALSE;
+    }
+
+#if defined(MEM_TRACKER)
+    if (verbose) {
+#if defined(USE_STATIC_MEMORY)
+        fprintf(stdout, "Memory Usage Info: static memory size = %uBytes (%dKB)\n",
+        N_STATIC_MEMORY_BYTES, N_STATIC_MEMORY_KBYTES);
+#endif /* USE_STATIC_MEMORY */
+        fprintf(stdout, "Memory Usage Info: peak memory usage = %uBytes (%dKB)\n",
+            peak_memory_usage, (peak_memory_usage + 1023) / 1024);
+        fprintf(stdout, "Memory Usage Info: peak allocations = %u\n",
+            peak_allocations);
+#if defined(USE_STATIC_MEMORY)
+        if ((n_bytes_allocated - n_bytes_not_recovered) != 0) {
+            fprintf(stdout, "Memory Usage Info: bytes still allocated = %d (%dKB)\n",
+                (n_bytes_allocated - n_bytes_not_recovered),
+                ((n_bytes_allocated - n_bytes_not_recovered) + 1023) / 1024);
+        }
+#else /* USE_STATIC_MEMORY */
+        if (n_bytes_allocated != 0) {
+            fprintf(stdout, "Memory Usage Info: bytes still allocated = %d (%dKB)\n",
+                n_bytes_allocated, (n_bytes_allocated + 1023) / 1024);
+        }
+#endif /* USE_STATIC_MEMORY */
+        if (n_allocations != 0) {
+            fprintf(stdout, "Memory Usage Info: allocations not freed = %d\n", n_allocations);
+        }
+    }
+#endif /* MEM_TRACKER */
+
+    jbi_exit_mm();
+
+    if (exec_result != JBIC_SUCCESS) {
+        return (-exec_result);
+    }
+
+    if (exit_code != 0) {
+        return (exit_code);
+    }
+
+    return (exit_status);
+}
+
+#endif /* PORT == EMBEDDED */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbistub.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbistub.h
new file mode 100644
index 000000000000..5e5c5332f385
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbistub.h
@@ -0,0 +1,95 @@
+#ifndef __JBISTUB_H__
+#define __JBISTUB_H__
+
+#include <linux/types.h>
+#include <linux/ctype.h>
+#include <linux/kernel.h>
+#include <linux/gfp.h>
+#include <linux/mm.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+
+#ifdef CONFIG_64BIT
+typedef s64 addr_t;
+#else
+typedef s32 addr_t;
+#endif
+/* typedef long addr_t; */
+
+/* #define USE_STATIC_MEMORY   100 */
+/* #define MEM_TRACKER */
+
+/* #define O_RDWR  1 */
+
+#define stdout  (1)
+#define stderr  (2)
+
+#define puts    printk
+#define printf  printk
+
+#define fprintf(std, fmt, arg...)   \
+    do {                            \
+        printf(fmt, ##arg);         \
+    } while (0)
+
+#define DEBUG_NONE      0
+#define DEBUG_ERR       1
+#define DEBUG_DETAIL    2
+#define DEBUG_NOISY     3
+#define DEBUG_MM        4
+
+#define jbi_dbg(level, fmt, arg...)         \
+        do {                                \
+            if (level <= jbi_debug_level) { \
+                printf(fmt, ##arg);         \
+            }                               \
+        } while (0)
+
+extern int jbi_debug_level;
+
+static inline int open(char *path, int flag)
+{
+    return 0;
+}
+
+static inline int close(int fd)
+{
+    return 0;
+}
+
+static inline int read(int fd, char *buf, int count)
+{
+    return 0;
+}
+
+static inline int write(int fd, char *buf, int count)
+{
+    return 0;
+}
+
+static inline int fflush(int fd)
+{
+    return 0;
+}
+
+static inline int clock(void)
+{
+    return 0;
+}
+
+static inline int atoi(const char *nptr)
+{
+    return (int) simple_strtol(nptr, (char **) NULL, 10);
+}
+
+static inline void *malloc(size_t size)
+{
+    return kmalloc(size, GFP_KERNEL);
+}
+
+static inline void free(void *ptr)
+{
+    kfree(ptr);
+}
+
+#endif /* __JBISTUB_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/Makefile
new file mode 100644
index 000000000000..caad44948030
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/Makefile
@@ -0,0 +1,22 @@
+#include $(top_srcdir)/debian/rules
+#KERNELDIR := ${KBUILD_OUTPUT}
+
+PWD		= $(shell pwd)
+
+EXTRA_CFLAGS:= -I$(M)/include
+MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
+FIRMWARE_UPGRADE_PATH = $(abspath $(MAKEFILE_FILE_PATH)/../../include)
+EXTRA_CFLAGS+= -I$(FIRMWARE_UPGRADE_PATH)
+EXTRA_CFLAGS+= -Wall
+
+firmware_driver_ispvme-objs := firmware_ispvme.o
+firmware_driver_ispvme-objs += firmware_cpld_ispvme.o firmware_cpld_upgrade_ispvme.o
+
+#ifndef CONFIG_FRM_PRODUCT_FILE
+
+$(warning $(firmware_driver_ispvme-objs))
+obj-m := firmware_driver_ispvme.o
+all:
+	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
+	@if [ ! -d $(common_module_dir) ]; then mkdir -p $(common_module_dir) ;fi
+	cp -p  $(PWD)/*.ko $(common_module_dir)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/firmware_cpld_ispvme.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/firmware_cpld_ispvme.c
new file mode 100644
index 000000000000..9841782290c1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/firmware_cpld_ispvme.c
@@ -0,0 +1,450 @@
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/kdev_t.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/of.h>
+#include <linux/uaccess.h>
+#include <firmware_ispvme.h>
+#include <firmware_cpld_ispvme.h>
+#include <firmware_upgrade.h>
+
+static int firmware_cpld_open(struct inode *inode, struct file *file)
+{
+    firmware_device_t *frm_dev;
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Open cpld device.\n");
+    frm_dev = firmware_get_device_by_minor(MINOR(inode->i_rdev));
+    if (frm_dev == NULL) {
+        return -ENXIO;
+    }
+    file->private_data = frm_dev;
+
+    return FIRMWARE_SUCCESS;
+}
+
+static ssize_t firmware_cpld_read (struct file *file, char __user *buf, size_t count,
+                                   loff_t *offset)
+{
+    return 0;
+}
+
+static ssize_t firmware_cpld_write (struct file *file, const char __user *buf, size_t count,
+                                    loff_t *offset)
+{
+    return 0;
+}
+
+static loff_t firmware_cpld_llseek(struct file *file, loff_t offset, int origin)
+{
+    return 0;
+}
+
+/*
+ * firmware_cpld_ioctl
+ * function: ispvme driver ioctl command parsing function
+ * @file: param[in] device file name
+ * @cmd:  param[in] command
+ * @arg:  param[in] the parameters in the command
+ * return value: success-FIRMWARE_SUCCESS; fail:other value
+ */
+static long firmware_cpld_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+    int ret;
+    void __user *argp;
+    firmware_device_t *frm_dev;
+    firmware_cpld_t *cpld_info;
+    char value;
+
+    /* Get device private data */
+    frm_dev = (firmware_device_t *)file->private_data;
+    cpld_info = NULL;
+    if (frm_dev != NULL) {
+        if (frm_dev->priv != NULL) {
+            cpld_info = (firmware_cpld_t *)frm_dev->priv;
+        }
+    }
+    if (cpld_info == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to frm_dev->priv sysfs info.\n");
+        return FIRMWARE_FAILED;
+    }
+    argp = (void __user *)arg;
+
+    switch (cmd) {
+    case FIRMWARE_JTAG_TDI:
+        /* Set the TDI signal */
+        if (copy_from_user(&value, argp, sizeof(value))) {
+            return -EFAULT;
+        }
+        if (fwm_cpld_tdi_op(value) < 0 ) {
+            return -EFAULT;
+        }
+        break;
+    case FIRMWARE_JTAG_TCK:
+        /* Set the TCK signal */
+        if (copy_from_user(&value, argp, sizeof(value))) {
+            return -EFAULT;
+        }
+        if (fwm_cpld_tck_op(value) < 0) {
+            return -EFAULT;
+        }
+        break;
+    case FIRMWARE_JTAG_TMS:
+        /* Set the TMS signal */
+        if (copy_from_user(&value, argp, sizeof(value))) {
+            return -EFAULT;
+        }
+        if (fwm_cpld_tms_op(value) < 0) {
+            return -EFAULT;
+        }
+        break;
+    case FIRMWARE_JTAG_TDO:
+        /* Read the TDO signal */
+        value = fwm_cpld_tdo_op();
+        if (copy_to_user(argp, &value, sizeof(value))) {
+            return -EFAULT;
+        }
+        break;
+    case FIRMWARE_JTAG_INIT:
+        /* The VME upgrade mode initializes the operation */
+        ret=firmware_init_vme(cpld_info);
+        if (ret != FIRMWARE_SUCCESS) {
+           FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to init upgrade.(chain = %d)\n",
+                frm_dev != NULL ? frm_dev->chain : -1);
+           return FIRMWARE_FAILED;
+        }
+        break;
+    case FIRMWARE_JTAG_FINISH:
+        /* The VME upgrade mode completes the operation */
+        ret=firmware_finish_vme(cpld_info);
+        if (ret != FIRMWARE_SUCCESS) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to release upgrade.(chain = %d)\n",
+                frm_dev != NULL ? frm_dev->chain : -1);
+            return FIRMWARE_FAILED;
+        }
+        break;
+    default:
+        FIRMWARE_DRIVER_DEBUG_ERROR("not find cmd: %d\r\n", cmd);
+        return -ENOTTY;
+    } /* End of switch */
+
+    return FIRMWARE_SUCCESS;
+}
+
+static int firmware_cpld_release(struct inode *inode, struct file *file)
+{
+    return 0;
+}
+
+static const struct file_operations cpld_dev_fops = {
+    .owner      = THIS_MODULE,
+    .llseek     = firmware_cpld_llseek,
+    .read       = firmware_cpld_read,
+    .write      = firmware_cpld_write,
+    .unlocked_ioctl = firmware_cpld_ioctl,
+    .open       = firmware_cpld_open,
+    .release    = firmware_cpld_release,
+};
+
+static int of_firmware_upgrade_config_init(struct device *dev, firmware_cpld_t *cpld_info)
+{
+    int ret;
+    char *name;
+    int i;
+    char buf[64];
+    firmware_logic_dev_en_t *firmware_logic_dev_en_point;
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Enter firmware_upgrade_config_init\r\n");
+    if (cpld_info == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("info is null\r\n");
+        return -1;
+    }
+
+    mem_clear(cpld_info, sizeof(firmware_cpld_t));
+    ret = 0;
+    ret += of_property_read_string(dev->of_node, "type", (const char **)&name);
+    ret += of_property_read_u32(dev->of_node, "tdi", &cpld_info->tdi);
+    ret += of_property_read_u32(dev->of_node, "tck", &cpld_info->tck);
+    ret += of_property_read_u32(dev->of_node, "tms", &cpld_info->tms);
+    ret += of_property_read_u32(dev->of_node, "tdo", &cpld_info->tdo);
+
+    ret += of_property_read_u32(dev->of_node, "chain", &cpld_info->chain);
+    ret += of_property_read_u32(dev->of_node, "chip_index", &cpld_info->chip_index);
+
+    if (ret != 0) {
+       FIRMWARE_DRIVER_DEBUG_ERROR("dts config error, ret:%d.\n", ret);
+       return -ENXIO;
+    }
+
+    strncpy(cpld_info->type, name, sizeof(cpld_info->type) - 1);
+
+    ret = of_property_read_u32(dev->of_node, "tck_delay", &cpld_info->tck_delay);
+    if(ret != 0) {
+        cpld_info->tck_delay = 60;
+    }
+
+    cpld_info->gpio_en_info_num = 0;
+    /* Enable through GPIO */
+    for (i = 0; i < FIRMWARE_EN_INFO_MAX; i++) {
+        mem_clear(buf, sizeof(buf));
+        snprintf(buf, sizeof(buf) - 1, "en_gpio_%d", i);
+        ret = of_property_read_u32(dev->of_node, buf, &cpld_info->gpio_en_info[i].en_gpio);
+        if(ret != 0) {
+            break;
+        }
+
+        mem_clear(buf, sizeof(buf));
+        snprintf(buf, sizeof(buf) - 1, "en_level_%d", i);
+        ret = of_property_read_u32(dev->of_node, buf, &cpld_info->gpio_en_info[i].en_level);
+        if(ret != 0) {
+            break;
+        }
+        cpld_info->gpio_en_info_num++;
+    }
+
+    cpld_info->logic_dev_en_num = 0;
+    /* Enable through register */
+    for (i = 0; i < FIRMWARE_EN_INFO_MAX; i++) {
+        firmware_logic_dev_en_point = &cpld_info->logic_dev_en_info[i];
+        mem_clear(buf, sizeof(buf));
+        snprintf(buf, sizeof(buf) - 1, "en_logic_dev_%d", i);
+        ret = 0;
+        ret += of_property_read_string(dev->of_node, buf, (const char **)&name);
+        if(ret != 0) {
+            /* Failure to resolve to EN_LOGIC_DEV means no logical device is enabled. No failure is returned */
+            ret = 0;
+            break;
+        }
+        strncpy(firmware_logic_dev_en_point->dev_name, name, FIRMWARE_DEV_NAME_LEN - 1);
+
+        mem_clear(buf, sizeof(buf));
+        snprintf(buf, sizeof(buf) - 1, "en_logic_addr_%d", i);
+        ret = of_property_read_u32(dev->of_node, buf, &firmware_logic_dev_en_point->addr);
+        if (ret != 0) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to config en en_logic_addr_%d ret =%d.\n", i, ret);
+            break;
+        }
+
+        mem_clear(buf, sizeof(buf));
+        snprintf(buf, sizeof(buf) - 1, "en_logic_mask_%d", i);
+        ret = of_property_read_u32(dev->of_node, buf, &firmware_logic_dev_en_point->mask);
+        if (ret != 0) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to config en en_logic_mask_%d ret =%d.\n", i, ret);
+            break;
+        }
+
+        mem_clear(buf, sizeof(buf));
+        snprintf(buf, sizeof(buf) - 1, "en_logic_en_val_%d", i);
+        ret = of_property_read_u32(dev->of_node, buf, &firmware_logic_dev_en_point->en_val);
+        if (ret != 0) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to config en en_logic_en_val_%d ret =%d.\n", i, ret);
+            break;
+        }
+
+        mem_clear(buf, sizeof(buf));
+        snprintf(buf, sizeof(buf) - 1, "en_logic_dis_val_%d", i);
+        ret = of_property_read_u32(dev->of_node, buf, &firmware_logic_dev_en_point->dis_val);
+        if (ret != 0) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to config en en_logic_dis_val_%d ret =%d.\n", i, ret);
+            break;
+        }
+
+        mem_clear(buf, sizeof(buf));
+        snprintf(buf, sizeof(buf) - 1, "en_logic_width_%d", i);
+        ret = of_property_read_u32(dev->of_node, buf, &firmware_logic_dev_en_point->width);
+        if (ret != 0) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to config en en_logic_width_%d ret =%d.\n", i, ret);
+            break;
+        }
+
+        cpld_info->logic_dev_en_num++;
+    }
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("type:%s, chain:%u, chip_index:%u, gpio_en_info_num:%u logic_dev_en_num:%u\n",
+        cpld_info->type, cpld_info->chain, cpld_info->chip_index, cpld_info->gpio_en_info_num, cpld_info->logic_dev_en_num);
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("tdi:%u, tck:%u, tms:%u, tdo:%u tck_delay:%u.\n",
+        cpld_info->tdi, cpld_info->tck, cpld_info->tms, cpld_info->tdo, cpld_info->tck_delay);
+
+    return 0;
+}
+
+static int firmware_upgrade_config_init(struct device *dev, firmware_cpld_t *cpld_info)
+{
+    int i;
+
+    firmware_logic_dev_en_t *firmware_logic_dev_en_point;
+    firmware_upgrade_device_t *firmware_upgrade_device;
+    firmware_jtag_device_t jtag_upg_device;
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Enter firmware_upgrade_config_init\r\n");
+    if (cpld_info == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("info is null\r\n");
+        return -1;
+    }
+
+    if (dev->platform_data == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("platform data config error.\n");
+        return -1;
+    }
+    firmware_upgrade_device = dev->platform_data;
+    jtag_upg_device = firmware_upgrade_device->upg_type.jtag;
+
+    mem_clear(cpld_info, sizeof(firmware_cpld_t));
+    strncpy(cpld_info->type, firmware_upgrade_device->type, sizeof(cpld_info->type) - 1);
+    cpld_info->tdi = jtag_upg_device.tdi;
+    cpld_info->tck = jtag_upg_device.tck;
+    cpld_info->tms = jtag_upg_device.tms;
+    cpld_info->tdo = jtag_upg_device.tdo;
+    cpld_info->chain = firmware_upgrade_device->chain;
+    cpld_info->chip_index = firmware_upgrade_device->chip_index;
+
+    if (jtag_upg_device.tck_delay == 0) {
+        cpld_info->tck_delay = 60;
+        FIRMWARE_DRIVER_DEBUG_VERBOSE("no config tck_delay, use default value:%u\n", cpld_info->tck_delay);
+    } else {
+        cpld_info->tck_delay = jtag_upg_device.tck_delay;
+    }
+
+    if (firmware_upgrade_device->en_gpio_num > FIRMWARE_EN_INFO_MAX) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("The number of en_gpio_num:%u configurations exceeds the maximum limit:%u.\n",
+            firmware_upgrade_device->en_gpio_num, FIRMWARE_EN_INFO_MAX);
+        return -ENXIO;
+    }
+    cpld_info->gpio_en_info_num = firmware_upgrade_device->en_gpio_num;
+    /* Enable through GPIO */
+    for (i = 0; i < cpld_info->gpio_en_info_num; i++) {
+        cpld_info->gpio_en_info[i].en_gpio = firmware_upgrade_device->en_gpio[i];
+        cpld_info->gpio_en_info[i].en_level = firmware_upgrade_device->en_level[i];
+    }
+
+    if (firmware_upgrade_device->en_logic_num > FIRMWARE_EN_INFO_MAX) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("The number of en_logic_num:%u configurations exceeds the maximum limit:%u.\n",
+            firmware_upgrade_device->en_logic_num, FIRMWARE_EN_INFO_MAX);
+        return -ENXIO;
+    }
+    cpld_info->logic_dev_en_num = firmware_upgrade_device->en_logic_num;
+    /* Enable through register */
+    for (i = 0; i < cpld_info->logic_dev_en_num; i++) {
+        firmware_logic_dev_en_point = &cpld_info->logic_dev_en_info[i];
+        strncpy(firmware_logic_dev_en_point->dev_name, firmware_upgrade_device->en_logic_dev[i],
+            FIRMWARE_DEV_NAME_LEN - 1);
+        firmware_logic_dev_en_point->addr = firmware_upgrade_device->en_logic_addr[i];
+        firmware_logic_dev_en_point->mask = firmware_upgrade_device->en_logic_mask[i];
+        firmware_logic_dev_en_point->en_val = firmware_upgrade_device->en_logic_en_val[i];
+        firmware_logic_dev_en_point->dis_val = firmware_upgrade_device->en_logic_dis_val[i];
+        firmware_logic_dev_en_point->width = firmware_upgrade_device->en_logic_width[i];
+    }
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("type:%s, chain:%u, chip_index:%u, gpio_en_info_num:%u logic_dev_en_num:%u\n",
+        cpld_info->type, cpld_info->chain, cpld_info->chip_index, cpld_info->gpio_en_info_num, cpld_info->logic_dev_en_num);
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("tdi:%u, tck:%u, tms:%u, tdo:%u tck_delay:%u.\n",
+        cpld_info->tdi, cpld_info->tck, cpld_info->tms, cpld_info->tdo, cpld_info->tck_delay);
+
+    return 0;
+}
+
+static int  firmware_cpld_probe(struct platform_device *pdev)
+{
+    int ret;
+    firmware_cpld_t *cpld_info;
+    firmware_device_t *frm_dev;
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Enter firmware_cpld_probe\r\n");
+    /* Gets the information in the device tree */
+    cpld_info = devm_kzalloc(&pdev->dev, sizeof(firmware_cpld_t), GFP_KERNEL);
+    if (cpld_info == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to kzalloc cpld device tree.\n");
+        return -EPERM;
+    }
+
+    if (pdev->dev.of_node) {
+        ret = of_firmware_upgrade_config_init(&pdev->dev, cpld_info);
+    } else {
+        ret = firmware_upgrade_config_init(&pdev->dev, cpld_info);
+    }
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("get config init from dts error.\n");
+        return -EPERM;
+    }
+
+    frm_dev = devm_kzalloc(&pdev->dev, sizeof(firmware_device_t), GFP_KERNEL);
+    if (frm_dev == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to kzalloc firmware device.\n");
+        return -EPERM;
+    }
+
+    /* Based on the link number, determine the name of the device file */
+    frm_dev->chain = cpld_info->chain;
+    snprintf(frm_dev->name, FIRMWARE_NAME_LEN - 1, "firmware_cpld_ispvme%d", frm_dev->chain);
+    strncpy(cpld_info->devname, frm_dev->name, strlen(frm_dev->name) + 1);
+
+    INIT_LIST_HEAD(&frm_dev->list);
+    frm_dev->dev.minor = MISC_DYNAMIC_MINOR;
+    frm_dev->dev.name = frm_dev->name;
+    frm_dev->dev.fops = &cpld_dev_fops;
+    frm_dev->priv = cpld_info;
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Register cpld firmware chain:%d, name:%s.\n", frm_dev->chain, frm_dev->name);
+
+    ret = firmware_device_register(frm_dev);
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to register firmware device.\n");
+        return -EPERM;
+    }
+
+    platform_set_drvdata(pdev, frm_dev);
+    return 0;
+}
+
+static int __exit firmware_cpld_remove(struct platform_device *pdev)
+{
+    firmware_device_t *frm_dev;
+
+    frm_dev = (firmware_device_t *)platform_get_drvdata(pdev);
+    firmware_device_unregister(frm_dev);
+    platform_set_drvdata(pdev, NULL);
+
+    return 0;
+}
+
+static struct of_device_id cpld_match[] = {
+    {
+        .compatible = "firmware_cpld_ispvme",
+    },
+    {},
+};
+
+static struct platform_driver cpld_driver = {
+    .driver = {
+        .name = "firmware_cpld_ispvme",
+        .owner = THIS_MODULE,
+        .of_match_table = cpld_match,
+    },
+    .probe = firmware_cpld_probe,
+    .remove = firmware_cpld_remove,
+};
+
+static firmware_driver_t fmw_drv_cpld = {
+    .name = "firmware_cpld_ispvme",
+    .drv = &cpld_driver,
+};
+
+int firmware_cpld_init(void)
+{
+    int ret;
+
+    INIT_LIST_HEAD(&fmw_drv_cpld.list);
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("ispvme upgrade driver register \n");
+    ret = firmware_driver_register(&fmw_drv_cpld);
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("ispvme upgrade driver register failed\n");
+        return ret;
+    }
+    return 0;
+}
+
+void firmware_cpld_exit(void)
+{
+    firmware_driver_unregister(&fmw_drv_cpld);
+    INIT_LIST_HEAD(&fmw_drv_cpld.list);
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/firmware_cpld_upgrade_ispvme.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/firmware_cpld_upgrade_ispvme.c
new file mode 100644
index 000000000000..b8896ed75f38
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/firmware_cpld_upgrade_ispvme.c
@@ -0,0 +1,691 @@
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/ctype.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <firmware_ispvme.h>
+#include <firmware_cpld_ispvme.h>
+#include <firmware_upgrade.h>
+
+/* TCK clock MAX 16MHz */
+#define    TCK_DELAY                         (current_fmw_cpld->tck_delay)
+
+#if 0
+static firmware_cpld_t default_fmw_cpld;
+#endif
+
+static firmware_cpld_t *current_fmw_cpld;
+
+static int TDI_PULL_UP(void);
+static int TDI_PULL_DOWN(void);
+static int TMS_PULL_UP(void);
+static int TMS_PULL_DOWN(void);
+static int TCK_PULL_UP(void);
+static int TCK_PULL_DOWN(void);
+
+/*
+ * set_currrent_cpld_info
+ * function: Save the current device information
+ * @info: param[in] Information about the device to be updated
+ */
+static void set_currrent_cpld_info(firmware_cpld_t *info)
+{
+    current_fmw_cpld = info;
+}
+
+static int firmware_file_read(const char *path, uint32_t addr, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t pos;
+
+    filp = filp_open(path, O_RDONLY, 0);
+    if (IS_ERR(filp)) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    pos = (loff_t)addr;
+    ret = kernel_read(filp, val, size, &pos);
+    if (ret != size) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("read kernel_read failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, addr, size, ret);
+        goto exit;
+    }
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int firmware_file_write(const char *path, uint32_t addr, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t pos;
+
+    filp = filp_open(path, O_RDWR, 777);
+    if (IS_ERR(filp)) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    pos = (loff_t)addr;
+    ret = kernel_write(filp, (void*)val, size, &pos);
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("write kernel_write failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, addr, size, ret);
+        goto exit;
+    }
+    vfs_fsync(filp, 1);
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+/*
+ * firmware_file_do_work
+ * function: Sets logical register values
+ * @path:param[in] Logic device descriptor
+ * @addr:param[in] Logic device address
+ * @value:param[in] the register value needs to be set
+ * @mask:param[in] register mask
+ * @width:param[in] register bit width
+ * return: 0:success, <0:failed
+ */
+static int firmware_file_do_work(char *path, uint32_t addr, uint32_t value, uint32_t mask,
+                    int32_t width)
+{
+    int ret;
+    uint8_t read_value[4], write_value[4];
+    uint8_t tmp_read8, tmp_write8, tmp_mask8;
+    uint32_t tmp_read32, tmp_write32;
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("path=%s, addr=0x%x, value=0x%x mask=0x%x\r\n", path, addr, value, mask);
+    if ((width > 4) || (width < 0)) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("width %d is not support.\r\n", width);
+        return -1;
+    }
+    ret = 0;
+    mem_clear(read_value, sizeof(read_value));
+    mem_clear(write_value, sizeof(write_value));
+    ret = firmware_file_read(path, addr, read_value, width);
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("firmware sysfs read.\r\n");
+        return -1;
+    }
+
+    switch (width) {
+    case 1:
+        tmp_read8 = read_value[0];
+        tmp_mask8 = (uint8_t)(mask) & 0xFF;
+        tmp_write8 = (uint8_t)value & 0xFF;
+        write_value[0] = (tmp_read8 & tmp_mask8) | tmp_write8;
+        FIRMWARE_DRIVER_DEBUG_VERBOSE("1 byte write val[0]:0x%x", write_value[0]);
+        break;
+    case 2:
+        FIRMWARE_DRIVER_DEBUG_ERROR("width %d is not support.\r\n", width);
+        return -1;
+    case 4:
+        memcpy((uint8_t *)&tmp_read32, read_value, 4);
+        tmp_write32 = (tmp_read32 & mask) | value;
+        memcpy(write_value, (uint8_t *)&tmp_write32, 4);
+        FIRMWARE_DRIVER_DEBUG_VERBOSE("4 byte write val[0]:0x%x, val[1]:0x%x, val[2]:0x%x, val[3]:0x%x",
+            write_value[0], write_value[1], write_value[2], write_value[3]);
+        break;
+    default:
+        FIRMWARE_DRIVER_DEBUG_ERROR("width %d is not support.\r\n", width);
+        return -1;
+    }
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("write logic dev[%s] addr[0x%x].\r\n", path, addr);
+    ret = firmware_file_write(path, addr, write_value, width);
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("firmware_file_write %s addr 0x%x failed, ret=%d.\r\n", path, addr, ret);
+        return -1;
+    }
+
+    return 0;
+}
+
+/*
+ * firmware_upgrade_en
+ * function: Upgrade access enabling switch
+ * @flag: !0:enable 0:disable
+ */
+static int firmware_upgrade_en(int flag)
+{
+    int i;
+    firmware_logic_dev_en_t *firmware_logic_dev_en_info;
+    int ret, rv;
+    char *dev_name;
+
+    ret = 0;
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("%s en switch: gpio en num %d, logic reg en num %d.\n",
+            flag ? "Open" : "Close", current_fmw_cpld->gpio_en_info_num, current_fmw_cpld->logic_dev_en_num);
+    for (i = 0; i < current_fmw_cpld->gpio_en_info_num; i++) {
+        if (flag) {
+            ret = gpio_request(current_fmw_cpld->gpio_en_info[i].en_gpio, "cpld_ispvme_upgrade");
+            if (ret) {
+                FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_ispvme_upgrade EN[%d] GPIO[%d] failed!\n",
+                        i, current_fmw_cpld->gpio_en_info[i].en_gpio);
+                goto free_gpio;
+            }
+            gpio_direction_output(current_fmw_cpld->gpio_en_info[i].en_gpio, current_fmw_cpld->gpio_en_info[i].en_level);
+            current_fmw_cpld->gpio_en_info[i].flag = 1;
+        } else {
+            gpio_set_value(current_fmw_cpld->gpio_en_info[i].en_gpio, !current_fmw_cpld->gpio_en_info[i].en_level);
+            gpio_free(current_fmw_cpld->gpio_en_info[i].en_gpio);
+            current_fmw_cpld->gpio_en_info[i].flag = 0;
+        }
+    }
+
+    for (i = 0; i < current_fmw_cpld->logic_dev_en_num; i++) {
+        firmware_logic_dev_en_info = &current_fmw_cpld->logic_dev_en_info[i];
+        dev_name = firmware_logic_dev_en_info->dev_name;
+        FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware sysfs [%d] dev_name[%s] addr[0x%x] mask[0x%x]"
+            " en_val[0x%x] dis_val[0x%x] width[%d]\n",
+            i , firmware_logic_dev_en_info->dev_name, firmware_logic_dev_en_info->addr,
+            firmware_logic_dev_en_info->mask, firmware_logic_dev_en_info->en_val,
+            firmware_logic_dev_en_info->dis_val, firmware_logic_dev_en_info->width);
+        if (flag) {
+            ret = firmware_file_do_work(dev_name, firmware_logic_dev_en_info->addr,
+                    firmware_logic_dev_en_info->en_val, firmware_logic_dev_en_info->mask,
+                    firmware_logic_dev_en_info->width);
+            if (ret < 0) {
+                FIRMWARE_DRIVER_DEBUG_ERROR("Open logic register [%d] EN failed, ret %d.\n", i, ret);
+                goto free_logic_dev;
+            } else {
+                firmware_logic_dev_en_info->flag = 1;
+            }
+        } else {
+            rv = firmware_file_do_work(dev_name, firmware_logic_dev_en_info->addr,
+                    firmware_logic_dev_en_info->dis_val, firmware_logic_dev_en_info->mask,
+                    firmware_logic_dev_en_info->width);
+            if (rv < 0) {
+                FIRMWARE_DRIVER_DEBUG_ERROR("Close logic register [%d] EN failed, ret %d.\n", i, rv);
+                ret = -1;
+            }
+            firmware_logic_dev_en_info->flag = 0;
+        }
+    }
+
+    return ret;
+free_logic_dev:
+    for (i = 0; i < current_fmw_cpld->logic_dev_en_num; i++) {
+        firmware_logic_dev_en_info = &current_fmw_cpld->logic_dev_en_info[i];
+        dev_name = firmware_logic_dev_en_info->dev_name;
+        if (firmware_logic_dev_en_info->flag == 1) {
+            ret = firmware_file_do_work(dev_name, firmware_logic_dev_en_info->addr,
+                    firmware_logic_dev_en_info->dis_val, firmware_logic_dev_en_info->mask,
+                    firmware_logic_dev_en_info->width);
+            if (ret < 0) {
+                FIRMWARE_DRIVER_DEBUG_ERROR("Close logic register [%d] EN failed, ret %d.\n", i, ret);
+            }
+            firmware_logic_dev_en_info->flag = 0;
+        } else {
+            break;
+        }
+    }
+free_gpio:
+    for (i = 0; i < current_fmw_cpld->gpio_en_info_num; i++) {
+        if (current_fmw_cpld->gpio_en_info[i].flag == 1) {
+            gpio_set_value(current_fmw_cpld->gpio_en_info[i].en_gpio, !current_fmw_cpld->gpio_en_info[i].en_level);
+            gpio_free(current_fmw_cpld->gpio_en_info[i].en_gpio);
+            current_fmw_cpld->gpio_en_info[i].flag = 0;
+        } else {
+            break;
+        }
+    }
+
+    return -1;
+}
+
+/*
+ * init_cpld
+ * function:Initialize CPLD
+ * return value: 0 success ; -1 fail
+ */
+static int init_cpld(void)
+{
+    int ret;
+    if (current_fmw_cpld == NULL) {
+        return -1;
+    }
+    mdelay(10);
+    ret = 0;
+    ret = gpio_request(current_fmw_cpld->tdi, "cpld_ispvme_upgrade");
+    if (ret) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_ispvme_upgrade TDI GPIO failed!\n");
+        return ret;
+    }
+    ret = gpio_request(current_fmw_cpld->tck, "cpld_ispvme_upgrade");
+    if (ret) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_ispvme_upgrade TCK GPIO failed!\n");
+        goto free_tdi;
+    }
+    ret = gpio_request(current_fmw_cpld->tms, "cpld_ispvme_upgrade");
+    if (ret) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_ispvme_upgrade TMS GPIO failed!\n");
+        goto free_tck;
+    }
+    ret = gpio_request(current_fmw_cpld->tdo, "cpld_ispvme_upgrade");
+    if (ret) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_ispvme_upgrade TDO GPIO failed!\n");
+        goto free_tms;
+    }
+
+    gpio_direction_output(current_fmw_cpld->tdi, 1);
+    gpio_direction_output(current_fmw_cpld->tck, 1);
+    gpio_direction_output(current_fmw_cpld->tms, 1);
+
+    gpio_direction_input(current_fmw_cpld->tdo);
+    ret = firmware_upgrade_en(1);
+    if (ret) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: open firmware upgrade en failed, ret %d.\n", ret);
+        goto free_tdo;
+    }
+#if 0
+    /* test GPIO */
+    if (TDI_PULL_UP() < 0 ) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TDI_PULL_UP failed.\n");
+        goto free_tdo;
+    }
+    if (TDI_PULL_DOWN() < 0 ) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TDI_PULL_DOWN failed.\n");
+        goto free_tdo;
+    }
+    if (TMS_PULL_UP() < 0 ) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TMS_PULL_UP failed.\n");
+        goto free_tdo;
+    }
+    if (TMS_PULL_DOWN() < 0 ) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TMS_PULL_DOWN failed.\n");
+        goto free_tdo;
+    }
+    if (TCK_PULL_UP() < 0 ) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TCK_PULL_UP failed.\n");
+        goto free_tdo;
+    }
+    if (TCK_PULL_DOWN() < 0 ) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TCK_PULL_DOWN failed.\n");
+        goto free_tdo;
+    }
+#endif
+    mdelay(10);
+    return 0;
+
+free_tdo:
+    gpio_free(current_fmw_cpld->tdo);
+free_tms:
+    gpio_free(current_fmw_cpld->tms);
+free_tck:
+    gpio_free(current_fmw_cpld->tck);
+free_tdi:
+    gpio_free(current_fmw_cpld->tdi);
+    return ret;
+}
+
+/*
+ * finish_cpld
+ * function: finish  CPLD upgrade operation
+ * return value: 0 success ; -1 fail
+ */
+static int finish_cpld(void)
+{
+    int ret;
+
+    if (current_fmw_cpld == NULL) {
+        return -1;
+    }
+    mdelay(10);
+    ret = firmware_upgrade_en(0);
+    if (ret < 0){
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: close firmware upgrade en failed, ret %d.\r\n", ret);
+    }
+
+    gpio_free(current_fmw_cpld->tdi);
+    gpio_free(current_fmw_cpld->tck);
+    gpio_free(current_fmw_cpld->tms);
+    gpio_free(current_fmw_cpld->tdo);
+    mdelay(10);
+    return 0;
+}
+
+/* Loop waiting for */
+static int pull_wait(int gpio, int value) {
+    int i, j;
+    /* Timeout time is two seconds */
+    for (i = 0; i < 20; i++) {
+        for (j = 0; j < 100; j++) {
+            if (!!gpio_get_value(gpio) == !!value ) {
+                return 0;
+            }
+            /* The first loop does not delay, normally the first loop can immediately return the result */
+            if (i) {
+                mdelay(1);
+            }
+        }
+        /* The CPU is released every 100ms */
+        schedule();
+    }
+    /* timeout */
+    FIRMWARE_DRIVER_DEBUG_ERROR("Error: Wait gpio %d pull to %d failed.\n", gpio, value);
+    return -1;
+}
+
+/* TDI pull-up */
+static int pull_tdi_up(void)
+{
+    if (current_fmw_cpld == NULL) {
+        return -1;
+    }
+    gpio_set_value(current_fmw_cpld->tdi, 1);
+
+    /* Wait for the GPIO value to be set successfully */
+    return pull_wait(current_fmw_cpld->tdi, 1);
+}
+
+/* TDI pull-down */
+static int pull_tdi_down(void)
+{
+    if (current_fmw_cpld == NULL) {
+        return -1;
+    }
+    gpio_set_value(current_fmw_cpld->tdi, 0);
+
+    /* Wait for the GPIO value to be set successfully */
+    return pull_wait(current_fmw_cpld->tdi, 0);
+}
+
+/* TCK pull-up */
+static int pull_tck_up(void)
+{
+    if (current_fmw_cpld == NULL) {
+        return -1;
+    }
+    gpio_set_value(current_fmw_cpld->tck, 1);
+
+    /* Wait for the GPIO value to be set successfully */
+    return pull_wait(current_fmw_cpld->tck, 1);
+}
+
+/* TCK pull-down */
+static int pull_tck_down(void)
+{
+    if (current_fmw_cpld == NULL) {
+        return -1;
+    }
+    gpio_set_value(current_fmw_cpld->tck, 0);
+
+    /* Wait for the GPIO value to be set successfully */
+    return pull_wait(current_fmw_cpld->tck, 0);
+}
+
+/* TMS pull-up */
+static int pull_tms_up(void)
+{
+    if (current_fmw_cpld == NULL) {
+        return -1;
+    }
+    gpio_set_value(current_fmw_cpld->tms, 1);
+
+    /* Wait for the GPIO value to be set successfully */
+    return pull_wait(current_fmw_cpld->tms, 1);
+}
+
+/* TMS pull-down */
+static int pull_tms_down(void)
+{
+    if (current_fmw_cpld == NULL) {
+        return -1;
+    }
+    gpio_set_value(current_fmw_cpld->tms, 0);
+
+    /* Wait for the GPIO value to be set successfully */
+    return pull_wait(current_fmw_cpld->tms, 0);
+}
+
+/* Read TDO */
+static int read_tdo(void)
+{
+    if (current_fmw_cpld == NULL) {
+        return -1;
+    }
+    return gpio_get_value(current_fmw_cpld->tdo);
+}
+
+static firmware_cpld_function_t function_fmw_cpld = {
+      .pull_tdi_up = pull_tdi_up,
+      .pull_tdi_down = pull_tdi_down,
+      .pull_tck_up = pull_tck_up,
+      .pull_tck_down = pull_tck_down,
+      .pull_tms_up = pull_tms_up,
+      .pull_tms_down = pull_tms_down,
+      .read_tdo = read_tdo,
+      .init_cpld = init_cpld,
+      .finish_cpld = finish_cpld,
+};
+
+/*
+ * TDI_PULL_DOWN
+ * function: Lower TDI
+ */
+static int TDI_PULL_DOWN(void)
+{
+    if ( function_fmw_cpld.pull_tdi_down != NULL) {
+        return function_fmw_cpld.pull_tdi_down();
+    } else {
+        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TDI_PULL_DOWN.\n");
+        return -1;
+    }
+}
+
+/*
+ * TDI_PULL_UP
+ * function: High TDI
+ */
+static int TDI_PULL_UP(void)
+{
+    if (function_fmw_cpld.pull_tdi_up != NULL) {
+        return function_fmw_cpld.pull_tdi_up();
+    } else {
+        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TDI_PULL_UP.\n");
+        return -1;
+    }
+}
+
+/*
+ * TCK_PULL_DOWN
+ * function: Lower TCK
+ */
+static int TCK_PULL_DOWN(void)
+{
+    if (function_fmw_cpld.pull_tck_down != NULL) {
+        return function_fmw_cpld.pull_tck_down();
+    } else {
+        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TCK_PULL_DOWN.\n");
+        return -1;
+    }
+}
+
+/*
+ * TCK_PULL_UP
+ * function: High TCK
+ */
+static int TCK_PULL_UP(void)
+{
+    if (function_fmw_cpld.pull_tck_up != NULL) {
+        return function_fmw_cpld.pull_tck_up();
+    } else {
+        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TCK_PULL_UP.\n");
+        return -1;
+    }
+}
+
+/*
+ * TMS_PULL_DOWN
+ * function: Lower TMS
+ */
+static int TMS_PULL_DOWN(void)
+{
+    if (function_fmw_cpld.pull_tms_down != NULL) {
+        return function_fmw_cpld.pull_tms_down();
+    } else {
+        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TMS_PULL_DOWN.\n");
+        return -1;
+    }
+}
+
+/*
+ * TMS_PULL_UP
+ * function: High TMS
+ */
+static int TMS_PULL_UP(void)
+{
+    if (function_fmw_cpld.pull_tms_up != NULL) {
+        return function_fmw_cpld.pull_tms_up();
+    } else {
+        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TMS_PULL_UP.\n");
+        return -1;
+    }
+}
+
+/*
+ * TDO_READ
+ * function:Read the TDO level
+ */
+static int TDO_READ(void)
+{
+    if (function_fmw_cpld.read_tdo != NULL) {
+        return function_fmw_cpld.read_tdo();
+    } else {
+        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TDO_READ.\n");
+        return -1;
+    }
+}
+
+/*
+ * cpld_upgrade_init
+ * function:Initialize GPIO and CPLD
+ * return value: success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+static int cpld_upgrade_init(void)
+{
+    int ret;
+
+    if (function_fmw_cpld.init_cpld != NULL) {
+        ret = function_fmw_cpld.init_cpld();
+        if (ret != FIRMWARE_SUCCESS) {
+            return ret;
+        }
+    }
+
+    return FIRMWARE_SUCCESS;
+}
+
+/*
+ * cpld_upgrade_finish
+ * function:Release GPIO and CPLD
+ * return value: success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+static int cpld_upgrade_finish(void)
+{
+    int ret;
+
+    if (function_fmw_cpld.finish_cpld != NULL) {
+        ret = function_fmw_cpld.finish_cpld();
+        if (ret != FIRMWARE_SUCCESS) {
+            return ret;
+        }
+    }
+
+    return FIRMWARE_SUCCESS;
+}
+
+/**
+ * firmware_init_vme
+ * function: Initialize GPIO,
+ * @cpld_info: param[in] Information about the device to be written to
+ */
+int firmware_init_vme(firmware_cpld_t *cpld_info){
+    int ret;
+    set_currrent_cpld_info(cpld_info);
+    /* Initialize GPIO and CPLD */
+    ret = cpld_upgrade_init();
+    return ret;
+}
+
+/**
+ * firmware_finish_vme
+ * function: Release GPIO
+ * @cpld_info: param[in] Information about the device to be written to
+ */
+int firmware_finish_vme(firmware_cpld_t *cpld_info){
+    int ret;
+    set_currrent_cpld_info(cpld_info);
+    ret = cpld_upgrade_finish();
+    return ret;
+}
+
+/**
+ * fwm_cpld_tdi_op
+ * function: Operate TDI
+ * @value: param[in] TDI level */
+int fwm_cpld_tdi_op(int value)
+{
+    if (value) {
+        return TDI_PULL_UP();
+    } else {
+        return TDI_PULL_DOWN();
+    }
+}
+
+/**
+ * fwm_cpld_tck_op
+ * function: Operate TCK
+ * @value: param[in] TCK level */
+int fwm_cpld_tck_op(int value)
+{
+    if (value) {
+        return TCK_PULL_UP();
+    } else {
+        return TCK_PULL_DOWN();
+    }
+}
+
+/**
+ * fwm_cpld_tms_op
+ * function: Operate TMS
+ * value: param[in] TMS level */
+int fwm_cpld_tms_op(int value)
+{
+    if (value) {
+        return TMS_PULL_UP();
+    } else {
+        return TMS_PULL_DOWN();
+    }
+}
+
+/**
+ * fwm_cpld_tdo_op
+ * function: Read TDO
+ */
+int fwm_cpld_tdo_op()
+{
+    return TDO_READ();
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/firmware_ispvme.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/firmware_ispvme.c
new file mode 100644
index 000000000000..e8f75844ae34
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/firmware_ispvme.c
@@ -0,0 +1,140 @@
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <firmware_ispvme.h>
+
+int g_firmware_driver_debug = 0;
+module_param(g_firmware_driver_debug, int, S_IRUGO | S_IWUSR);
+
+static LIST_HEAD(drv_list);
+static LIST_HEAD(dev_list);
+
+/**
+ * firmware_driver_register
+ * function:Registered Device Driver
+ * @fw_drv:param[in] Driver information
+ * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+int firmware_driver_register(firmware_driver_t *fw_drv)
+{
+    int ret;
+
+    if (fw_drv == NULL) {
+        return FIRMWARE_FAILED;
+    }
+
+    ret = platform_driver_register(fw_drv->drv);
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: failed to register firmware upgrade driver \n");
+        return FIRMWARE_FAILED;
+    }
+
+    /* Adds driver information to the driver list */
+    list_add(&fw_drv->list, &drv_list);
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware upgrade driver register sucess \n");
+
+    return FIRMWARE_SUCCESS;
+}
+
+/**
+ * firmware_driver_unregister
+ * function:unregister Device Driver
+ * @fw_drv:param[in] Driver information
+ */
+void firmware_driver_unregister(firmware_driver_t *fw_drv)
+{
+    list_del_init(&fw_drv->list);
+    platform_driver_unregister(fw_drv->drv);
+}
+
+/*
+ * firmware_get_device_by_minor
+ * function: Get device information based on minor
+ */
+firmware_device_t *firmware_get_device_by_minor(int minor)
+{
+    firmware_device_t *tmp;
+
+    list_for_each_entry(tmp, &dev_list, list) {
+        if (tmp->dev.minor == minor) {
+            return tmp;
+        }
+    }
+
+    return NULL;
+}
+
+/**
+ * firmware_device_register
+ * function:Registered Driver Device
+ * @fw_dev: param[in] Driver information
+ * return value:success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+int firmware_device_register(firmware_device_t *fw_dev)
+{
+    int ret;
+    firmware_device_t *tmp;
+
+    if (fw_dev == NULL) {
+        return FIRMWARE_FAILED;
+    }
+    /* Check whether the device file name already exists in the device linked list */
+    list_for_each_entry(tmp, &dev_list, list) {
+        if (strcmp(tmp->name, fw_dev->name) == 0) {
+            return FIRMWARE_FAILED;
+        }
+    }
+
+    /* Registere device */
+    ret = misc_register(&fw_dev->dev);
+    if (ret < 0) {
+        return FIRMWARE_FAILED;
+    }
+
+    /* Adds a device to the device list */
+    list_add(&fw_dev->list, &dev_list);
+
+    return FIRMWARE_SUCCESS;
+}
+
+/**
+ * firmware_device_unregister
+ * function: unregister Driver Device
+ */
+void firmware_device_unregister(firmware_device_t *fw_dev)
+{
+    list_del(&fw_dev->list);
+    misc_deregister(&fw_dev->dev);
+}
+
+static int __init firmware_driver_init(void)
+{
+    int ret;
+
+    INIT_LIST_HEAD(&drv_list);
+    INIT_LIST_HEAD(&dev_list);
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware driver ispvme init.\n");
+    ret = firmware_cpld_init();
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("firmware driver ispvme init failed.\n");
+        return FIRMWARE_FAILED;
+    }
+
+    return FIRMWARE_SUCCESS;
+}
+
+static void __exit firmware_driver_exit(void)
+{
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware driver ispvme exit.\n");
+    firmware_cpld_exit();
+    INIT_LIST_HEAD(&drv_list);
+    INIT_LIST_HEAD(&dev_list);
+    return;
+}
+
+module_init(firmware_driver_init);
+module_exit(firmware_driver_exit);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("Firmware upgrade ispvme driver");
+MODULE_LICENSE("GPL");
+MODULE_VERSION("1.0");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/include/firmware_cpld_ispvme.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/include/firmware_cpld_ispvme.h
new file mode 100644
index 000000000000..eb737d3a56ed
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/include/firmware_cpld_ispvme.h
@@ -0,0 +1,70 @@
+#ifndef __FIRMWARE_CPLD_H__
+#define __FIRMWARE_CPLD_H__
+
+#define FIRMWARE_DEV_NAME_LEN     32
+#define FIRMWARE_MAX_CPLD_NUM     16
+#define FIRMWARE_TYPE_LEN         10
+#define FIRMWARE_EN_INFO_MAX      16
+#define FIRMWARE_EN_INFO_BUF      128
+
+typedef struct firmware_gpio_jtag_en_s {
+    uint32_t en_gpio;                                               /* GPIO enable pin */
+    uint32_t en_level;                                              /* GPIO enable level */
+    int flag;                                                       /* init flag; 1-init 0-not init */
+} firmware_gpio_jtag_en_t;
+
+typedef struct firmware_logic_dev_en_s {
+    char dev_name[FIRMWARE_DEV_NAME_LEN];        /* Logical device name */
+    uint32_t addr;                               /* Enable register address */
+    uint32_t mask;                               /* mask */
+    uint32_t en_val;                             /* Enable value */
+    uint32_t dis_val;                            /* Disable value*/
+    uint32_t width;                              /* width */
+    int flag;                                    /* init flag; 1-init 0-not init */
+} firmware_logic_dev_en_t;
+
+typedef struct firmware_cpld_s {
+    char devname[FIRMWARE_DEV_NAME_LEN];                        /* Device name */
+    char type[FIRMWARE_TYPE_LEN];                               /* interface type */
+    uint32_t tdi;                                               /* TDI signal corresponding to GPIO pin information */
+    uint32_t tck;                                               /* TCK signal corresponding to GPIO pin information */
+    uint32_t tms;                                               /* TMS signal corresponding to GPIO pin information */
+    uint32_t tdo;                                               /* TDO signal corresponding to GPIO pin information */
+    uint32_t chain;                                             /* chain num */
+    uint32_t chip_index;                                        /* chip index */
+    uint32_t tck_delay;                                         /* Delay time */
+    uint32_t gpio_en_info_num;                                  /* GPIO Enable Number */
+    firmware_gpio_jtag_en_t gpio_en_info[FIRMWARE_EN_INFO_MAX]; /* GPIO Enable Information */
+    uint32_t logic_dev_en_num;                                           /* Register Enable Number */
+    firmware_logic_dev_en_t logic_dev_en_info[FIRMWARE_EN_INFO_MAX]; /* Register Enable Information */
+} firmware_cpld_t;
+
+typedef struct firmware_cpld_function_s{
+    int (*pull_tdi_up)(void);                          /* TDI pull-up */
+    int (*pull_tdi_down)(void);                        /* TDI pull-down */
+    int (*pull_tck_up)(void);                          /* TCK pull-up */
+    int (*pull_tck_down)(void);                        /* TCK pull-down */
+    int (*pull_tms_up)(void);                          /* TMS pull-up */
+    int (*pull_tms_down)(void);                        /* TCK pull-down */
+    int (*read_tdo)(void);                             /* Read TDO */
+    int (*init_cpld)(void);                            /* CPLD upgrade initializes the operation */
+    int (*init_chip)(int chain);                       /* chip initializes the operation */
+    int (*finish_chip)(int chain);                     /* chip completes the operation*/
+    int (*finish_cpld)(void);                          /* CPLD upgrade completes the operation */
+    int (*get_version)(int chain, char *ver, int len); /* get version */
+}firmware_cpld_function_t;
+
+/* operate TDI */
+extern int fwm_cpld_tdi_op(int value);
+/* operate TCK */
+extern int fwm_cpld_tck_op(int value);
+/* operate TMS */
+extern int fwm_cpld_tms_op(int value);
+/* operate TDO */
+extern int fwm_cpld_tdo_op(void);
+/* VME upgrade mode completes the operation*/
+extern int firmware_finish_vme(firmware_cpld_t *cpld_info);
+/* VME upgrade mode initializes the operation*/
+extern int firmware_init_vme(firmware_cpld_t *cpld_info);
+
+#endif /* __FIRMWARE_CPLD_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/include/firmware_ispvme.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/include/firmware_ispvme.h
new file mode 100644
index 000000000000..39baf3f30717
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/include/firmware_ispvme.h
@@ -0,0 +1,86 @@
+#ifndef __FIRMWARE_H__
+#define __FIRMWARE_H__
+
+#include <linux/miscdevice.h>
+#include <linux/platform_device.h>
+
+#include <asm/ioctl.h>
+
+/* Debug switch level */
+typedef enum {
+    FIRWMARE_VERBOSE,
+    FIRWMARE_WARN,
+    FIRWMARE_ERROR,
+    FIRWMARE_END,
+} firmware_debug_level_t;
+
+#define FIRMWARE_DRIVER_DEBUG_VERBOSE(fmt, args...) do { \
+    if ((g_firmware_driver_debug) & (1U << FIRWMARE_VERBOSE)) { \
+        printk(KERN_INFO "[FIRMWARW_DRIVER_ISPVME][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define FIRMWARE_DRIVER_DEBUG_ERROR(fmt, args...) do { \
+    if ((g_firmware_driver_debug) & (1U << FIRWMARE_ERROR)) { \
+        printk(KERN_ERR "[FIRMWARW_DRIVER_ISPVME][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define FIRMWARE_NAME_LEN      48
+
+#define FIRMWARE_FAILED              (-1)
+#define FIRMWARE_SUCCESS             0
+
+/* ioctl publi command, the same as "firmware_upgrade\include\firmware_app.h" */
+#define FIRMWARE_COMMON_TYPE 'C'
+#define FIRMWARE_GET_CHIPNAME            _IOR(FIRMWARE_COMMON_TYPE, 0, char)    /* get the chip name */
+#define FIRMWARE_GET_VERSION             _IOR(FIRMWARE_COMMON_TYPE, 2, int)     /* get version */
+
+/* firmware cpld ispvme driver ioctl command, the same as "firmware_upgrade\include\firmware_app.h" */
+#define FIRMWARE_VME_TYPE 'V'
+#define FIRMWARE_JTAG_TDI                _IOR(FIRMWARE_VME_TYPE, 0, char)
+#define FIRMWARE_JTAG_TDO                _IOR(FIRMWARE_VME_TYPE, 1, char)
+#define FIRMWARE_JTAG_TCK                _IOR(FIRMWARE_VME_TYPE, 2, char)
+#define FIRMWARE_JTAG_TMS                _IOR(FIRMWARE_VME_TYPE, 3, char)
+#define FIRMWARE_JTAG_EN                 _IOR(FIRMWARE_VME_TYPE, 4, char)
+#define FIRMWARE_JTAG_INIT               _IOR(FIRMWARE_VME_TYPE, 7, char)   /* enable upgrade access */
+#define FIRMWARE_JTAG_FINISH             _IOR(FIRMWARE_VME_TYPE, 8, char)   /* disable upgrade access */
+
+typedef struct cmd_info_s {
+    uint32_t size;
+    void __user *data;
+} cmd_info_t;
+
+typedef struct firmware_device_s {
+    struct list_head list;             /* device list */
+    uint32_t chain;                    /* chain number */
+    char name[FIRMWARE_NAME_LEN];      /* name */
+    struct miscdevice dev;             /* device */
+    void *priv;                        /* private data */
+} firmware_device_t;
+
+typedef struct firmware_driver_s {
+    struct list_head list;             /* list */
+    char name[FIRMWARE_NAME_LEN];      /* name */
+    struct platform_driver *drv;       /* driver */
+    void *priv;                        /* private data */
+} firmware_driver_t;
+
+extern int g_firmware_driver_debug;
+
+/* Get device information based on minor */
+extern firmware_device_t *firmware_get_device_by_minor(int minor);
+/* Registere device */
+extern int firmware_device_register(firmware_device_t *fw_dev);
+/* Unregister device */
+extern void firmware_device_unregister(firmware_device_t *fw_dev);
+/* Registere driver */
+extern int firmware_driver_register(firmware_driver_t *fw_drv);
+/* Unregister driver */
+extern void firmware_driver_unregister(firmware_driver_t *fw_drv);
+/* CPLD upgrade initialized */
+extern int firmware_cpld_init(void);
+/* CPLD unload function */
+extern void firmware_cpld_exit(void);
+
+#endif /* end of __FIRMWARE_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/Makefile
new file mode 100644
index 000000000000..a1d6d2e2ef68
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/Makefile
@@ -0,0 +1,22 @@
+#include $(top_srcdir)/debian/rules
+#KERNELDIR := ${KBUILD_OUTPUT}
+
+PWD		= $(shell pwd)
+
+EXTRA_CFLAGS:= -I$(M)/include
+MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
+FIRMWARE_UPGRADE_PATH = $(abspath $(MAKEFILE_FILE_PATH)/../../include)
+EXTRA_CFLAGS+= -I$(FIRMWARE_UPGRADE_PATH)
+EXTRA_CFLAGS+= -Wall
+
+firmware_driver_sysfs-objs := firmware.o
+firmware_driver_sysfs-objs += firmware_sysfs.o firmware_sysfs_upgrade.o
+
+#ifndef CONFIG_FRM_PRODUCT_FILE
+
+$(warning $(firmware_driver_sysfs-objs))
+obj-m := firmware_driver_sysfs.o
+all:
+	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
+	@if [ ! -d $(common_module_dir) ]; then mkdir -p $(common_module_dir) ;fi
+	cp -p  $(PWD)/*.ko $(common_module_dir)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/firmware.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/firmware.c
new file mode 100644
index 000000000000..fec51d6238a6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/firmware.c
@@ -0,0 +1,143 @@
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <firmware_sysfs.h>
+
+int g_firmware_driver_debug = 0;
+module_param(g_firmware_driver_debug, int, S_IRUGO | S_IWUSR);
+
+static LIST_HEAD(drv_list);
+static LIST_HEAD(dev_list);
+
+/**
+ * firmware_driver_register
+ * function:Registered Device Driver
+ * @fw_drv:param[in] Driver information
+ * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+int firmware_driver_register(firmware_driver_t *fw_drv)
+{
+    int ret;
+
+    if (fw_drv == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Parameter error.\n");
+        return FIRMWARE_FAILED;
+    }
+
+    ret = platform_driver_register(fw_drv->drv);
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: failed to register firmware upgrade driver \n");
+        return FIRMWARE_FAILED;
+    }
+
+    /* Adds driver information to the driver list */
+    list_add(&fw_drv->list, &drv_list);
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware upgrade driver register sucess \n");
+
+    return FIRMWARE_SUCCESS;
+}
+
+/**
+ * firmware_driver_unregister
+ * function:unregister Device Driver
+ * @fw_drv:param[in] Driver information
+ */
+void firmware_driver_unregister(firmware_driver_t *fw_drv)
+{
+    list_del_init(&fw_drv->list);
+    platform_driver_unregister(fw_drv->drv);
+}
+
+/*
+ * firmware_get_device_by_minor
+ * function: Get device information based on minor
+ */
+firmware_device_t *firmware_get_device_by_minor(int minor)
+{
+    firmware_device_t *tmp;
+
+    list_for_each_entry(tmp, &dev_list, list) {
+        if (tmp->dev.minor == minor) {
+            return tmp;
+        }
+    }
+
+    return NULL;
+}
+
+/**
+ * firmware_device_register
+ * function:Registered Driver Device
+ * @fw_dev: param[in] Driver information
+ * return value:success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+int firmware_device_register(firmware_device_t *fw_dev)
+{
+    int ret;
+    firmware_device_t *tmp;
+
+    if (fw_dev == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Parameter error.\n");
+        return FIRMWARE_FAILED;
+    }
+    /* Check whether the device file name already exists in the device linked list */
+    list_for_each_entry(tmp, &dev_list, list) {
+        if (strcmp(tmp->name, fw_dev->name) == 0) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("devie %s already exists.\n", fw_dev->name);
+            return FIRMWARE_FAILED;
+        }
+    }
+
+    ret = misc_register(&fw_dev->dev);
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("register misc error, ret=%d.\n", ret);
+        return FIRMWARE_FAILED;
+    }
+
+    /* Adds driver information to the driver list */
+    list_add(&fw_dev->list, &dev_list);
+
+    return FIRMWARE_SUCCESS;
+}
+
+/**
+ * firmware_device_unregister
+ * function: unregister Driver Device
+ */
+void firmware_device_unregister(firmware_device_t *fw_dev)
+{
+    list_del(&fw_dev->list);
+    misc_deregister(&fw_dev->dev);
+}
+
+static int __init firmware_driver_init(void)
+{
+    int ret;
+
+    INIT_LIST_HEAD(&drv_list);
+    INIT_LIST_HEAD(&dev_list);
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware driver sysfs init.\n");
+    ret = firmware_sysfs_init();
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("firmware driver sysfs init failed.\n");
+        return FIRMWARE_FAILED;
+    }
+
+    return FIRMWARE_SUCCESS;
+}
+
+static void __exit firmware_driver_exit(void)
+{
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware driver sysfs exit.\n");
+    firmware_sysfs_exit();
+    INIT_LIST_HEAD(&drv_list);
+    INIT_LIST_HEAD(&dev_list);
+    return;
+}
+
+module_init(firmware_driver_init);
+module_exit(firmware_driver_exit);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("Firmware upgrade driver");
+MODULE_LICENSE("GPL");
+MODULE_VERSION("1.0");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/firmware_sysfs.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/firmware_sysfs.c
new file mode 100644
index 000000000000..fef5b43c9db8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/firmware_sysfs.c
@@ -0,0 +1,495 @@
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/kdev_t.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/of.h>
+#include <linux/uaccess.h>
+#include <firmware_sysfs.h>
+#include <firmware_sysfs_upgrade.h>
+#include <firmware_upgrade.h>
+
+static int firmware_sysfs_open(struct inode *inode, struct file *file)
+{
+    firmware_device_t *frm_dev;
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Open device.\n");
+    frm_dev = firmware_get_device_by_minor(MINOR(inode->i_rdev));
+    if (frm_dev == NULL) {
+        return -ENXIO;
+    }
+    file->private_data = frm_dev;
+
+    return FIRMWARE_SUCCESS;
+}
+
+static ssize_t firmware_sysfs_read (struct file *file, char __user *buf, size_t count,
+                                   loff_t *offset)
+{
+    return 0;
+}
+
+static ssize_t firmware_sysfs_write (struct file *file, const char __user *buf, size_t count,
+                                    loff_t *offset)
+{
+    return 0;
+}
+
+static loff_t firmware_sysfs_llseek(struct file *file, loff_t offset, int origin)
+{
+    return 0;
+}
+
+/* firmware_sysfs_ioctl
+* function:ioctl command parsing function
+* @file: param[in] device file name
+* @cmd:  param[in] command
+* @arg:  param[in] the parameters in the command
+* return value: success-FIRMWARE_SUCCESS; fail:other value
+*/
+static long firmware_sysfs_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+    void __user *argp;
+    firmware_device_t *frm_dev;
+    firmware_sysfs_t *sysfs_info;
+    int ret;
+
+    /* Get device private data */
+    frm_dev = (firmware_device_t *)file->private_data;
+    sysfs_info = NULL;
+    if (frm_dev != NULL) {
+        if (frm_dev->priv != NULL) {
+            sysfs_info = (firmware_sysfs_t *)frm_dev->priv;
+        }
+    }
+    if (sysfs_info == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to frm_dev->priv sysfs info.\n");
+        return FIRMWARE_FAILED;
+    }
+    argp = (void __user *)arg;
+
+    switch (cmd) {
+    case FIRMWARE_SYSFS_INIT:
+        /* enable upgrade access */
+        ret = firmware_init_dev_loc(sysfs_info);
+        if (ret != FIRMWARE_SUCCESS) {
+           FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to init upgrade.(chain = %d)\n",
+                frm_dev != NULL ? frm_dev->chain : -1);
+           return FIRMWARE_FAILED;
+        }
+        break;
+    case FIRMWARE_SYSFS_FINISH:
+        /* disable upgrade access */
+        ret = firmware_finish_dev_loc(sysfs_info);
+        if (ret != FIRMWARE_SUCCESS) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to release upgrade.(chain = %d)\n",
+                frm_dev != NULL ? frm_dev->chain : -1);
+            return FIRMWARE_FAILED;
+        }
+        break;
+    case FIRMWARE_SYSFS_SPI_INFO:
+        /* Get SPI logic device information */
+        if (copy_to_user(argp, &sysfs_info->info.spi_logic_info, sizeof(firmware_spi_logic_info_t))) {
+            return -EFAULT;
+        }
+        break;
+    case FIRMWARE_SYSFS_DEV_FILE_INFO:
+        /*Get logic device information */
+        if (copy_to_user(argp, &sysfs_info->info.dev_file_info, sizeof(firmware_dev_file_info_t))) {
+            return -EFAULT;
+        }
+        break;
+    case FIRMWARE_SYSFS_MTD_INFO:
+        /*Get logic device information */
+        if (copy_to_user(argp, &sysfs_info->info.mtd_info, sizeof(firmware_mtd_info_t))) {
+            return -EFAULT;
+        }
+        break;
+    default:
+        FIRMWARE_DRIVER_DEBUG_ERROR("not find cmd: %d\r\n", cmd);
+        return -ENOTTY;
+    } /* End of switch */
+
+    return FIRMWARE_SUCCESS;
+}
+
+static int firmware_sysfs_release(struct inode *inode, struct file *file)
+{
+    return 0;
+}
+
+static const struct file_operations sysfs_dev_fops = {
+    .owner      = THIS_MODULE,
+    .llseek     = firmware_sysfs_llseek,
+    .read       = firmware_sysfs_read,
+    .write      = firmware_sysfs_write,
+    .unlocked_ioctl = firmware_sysfs_ioctl,
+    .open       = firmware_sysfs_open,
+    .release    = firmware_sysfs_release,
+};
+
+/* Gets the information in the device tree */
+static int of_firmware_upgrade_config_init(struct device *dev, firmware_sysfs_t *sysfs_info)
+{
+    int ret;
+    char *name;
+    int8_t buf[64];
+    int i;
+    firmware_logic_dev_en_t *firmware_logic_dev_en_point;
+    uint32_t test_base, test_size;
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Enter firmware_dev_loc_config_init\r\n");
+    if (sysfs_info == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("info is null\r\n");
+        return -1;
+    }
+
+    mem_clear(sysfs_info, sizeof(firmware_sysfs_t));
+    ret = 0;
+    ret += of_property_read_string(dev->of_node, "type", (const char **)&name);
+
+    ret += of_property_read_u32(dev->of_node, "chain", &sysfs_info->chain);
+    ret += of_property_read_u32(dev->of_node, "chip_index", &sysfs_info->chip_index);
+    if (ret != 0) {
+       FIRMWARE_DRIVER_DEBUG_ERROR("dts config error, ret:%d.\n", ret);
+       return -ENXIO;
+    }
+    strncpy(sysfs_info->type, name, sizeof(sysfs_info->type) - 1);
+
+    ret = of_property_read_u32(dev->of_node, "test_base", &test_base);
+    if (ret != 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("dts config test_base, ret:%d.\n", ret);
+        test_base = 0;
+    }
+
+    ret = of_property_read_u32(dev->of_node, "test_size", &test_size);
+    if (ret != 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("dts config test_size, ret:%d.\n", ret);
+        test_size = 0;
+    }
+
+    if (strcmp(sysfs_info->type, FIRMWARE_SYSFS_TYPE_SPI_LOGIC) == 0) {
+        ret = of_property_read_string(dev->of_node, "dev_name", (const char **)&name);
+        if (ret != 0) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("dts config dev_name error, ret:%d.\n", ret);
+            return -ENXIO;
+        }
+        strncpy(sysfs_info->info.spi_logic_info.dev_name, name, FIRMWARE_DEV_NAME_LEN - 1);
+
+        ret = of_property_read_u32(dev->of_node, "flash_base", &sysfs_info->info.spi_logic_info.flash_base);
+        if (ret != 0) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("dts config flash_base error, ret:%d.\n", ret);
+            return -ENXIO;
+        }
+
+        ret = of_property_read_u32(dev->of_node, "ctrl_base", &sysfs_info->info.spi_logic_info.ctrl_base);
+        if (ret != 0) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("dts config ctrl_base error, ret:%d.\n", ret);
+            return -ENXIO;
+        }
+        sysfs_info->info.spi_logic_info.test_base = test_base;
+        sysfs_info->info.spi_logic_info.test_size = test_size;
+    } else if (strcmp(sysfs_info->type, FIRMWARE_SYSFS_TYPE_SYSFS) == 0) {
+        ret = of_property_read_string(dev->of_node, "sysfs_name", (const char **)&name);
+        if (ret != 0) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("dts config sysfs_name error, ret:%d.\n", ret);
+            return -ENXIO;
+        }
+        strncpy(sysfs_info->info.dev_file_info.sysfs_name, name, FIRMWARE_DEV_NAME_LEN - 1);
+
+        ret = of_property_read_u32(dev->of_node, "dev_base", &sysfs_info->info.dev_file_info.dev_base);
+        if (ret != 0) {
+            FIRMWARE_DRIVER_DEBUG_VERBOSE("dts don't config dev_base, dev_base is 0.\n");
+            sysfs_info->info.dev_file_info.dev_base = 0;
+        }
+
+        ret = of_property_read_u32(dev->of_node, "per_len", &sysfs_info->info.dev_file_info.per_len);
+        if (ret != 0) {
+            FIRMWARE_DRIVER_DEBUG_VERBOSE("dts don't config per_len, per_len is 0.\n");
+            sysfs_info->info.dev_file_info.per_len = 0;
+        }
+        sysfs_info->info.dev_file_info.test_base = test_base;
+        sysfs_info->info.dev_file_info.test_size = test_size;
+    } else if (strcmp(sysfs_info->type, FIRMWARE_SYSFS_TYPE_MTD) == 0) {
+        ret = of_property_read_string(dev->of_node, "mtd_name", (const char **)&name);
+        if (ret != 0) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("dts config mtd_name error, ret:%d.\n", ret);
+            return -ENXIO;
+        }
+        strncpy(sysfs_info->info.mtd_info.mtd_name, name, FIRMWARE_DEV_NAME_LEN - 1);
+
+        ret = of_property_read_u32(dev->of_node, "flash_base", &sysfs_info->info.mtd_info.flash_base);
+        if (ret != 0) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("dts config flash_base error, ret:%d.\n", ret);
+            return -ENXIO;
+        }
+        sysfs_info->info.mtd_info.test_base = test_base;
+        sysfs_info->info.mtd_info.test_size = test_size;
+    } else {
+        FIRMWARE_DRIVER_DEBUG_ERROR("dts config sysfs type[%s] is not support, ret:%d.\n", sysfs_info->type, ret);
+        return -ENXIO;
+    }
+
+    sysfs_info->gpio_en_info_num = 0;
+    /* Enable through GPIO */
+    for (i = 0; i < FIRMWARE_EN_INFO_MAX; i++) {
+        mem_clear(buf, sizeof(buf));
+        snprintf(buf, sizeof(buf) - 1, "en_gpio_%d", i);
+        ret = of_property_read_u32(dev->of_node, buf, &sysfs_info->gpio_en_info[i].en_gpio);
+        if(ret != 0) {
+            break;
+        }
+
+        mem_clear(buf, sizeof(buf));
+        snprintf(buf, sizeof(buf) - 1, "en_level_%d", i);
+        ret = of_property_read_u32(dev->of_node, buf, &sysfs_info->gpio_en_info[i].en_level);
+        if(ret != 0) {
+            break;
+        }
+        sysfs_info->gpio_en_info_num++;
+    }
+
+    sysfs_info->logic_dev_en_num = 0;
+    /* Enable through register */
+    for (i = 0; i < FIRMWARE_EN_INFO_MAX; i++) {
+        firmware_logic_dev_en_point = &sysfs_info->logic_dev_en_info[i];
+        mem_clear(buf, sizeof(buf));
+        snprintf(buf, sizeof(buf) - 1, "en_logic_dev_%d", i);
+        ret = 0;
+        ret += of_property_read_string(dev->of_node, buf, (const char **)&name);
+        if(ret != 0) {
+            /* Failure to resolve to EN_LOGIC_DEV means no logical device is enabled. No failure is returned */
+            ret = 0;
+            break;
+        }
+        strncpy(firmware_logic_dev_en_point->dev_name, name, FIRMWARE_DEV_NAME_LEN - 1);
+
+        mem_clear(buf, sizeof(buf));
+        snprintf(buf, sizeof(buf) - 1, "en_logic_addr_%d", i);
+        ret = of_property_read_u32(dev->of_node, buf, &firmware_logic_dev_en_point->addr);
+        if (ret != 0) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to config en en_logic_addr_%d ret =%d.\n", i, ret);
+            break;
+        }
+
+        mem_clear(buf, sizeof(buf));
+        snprintf(buf, sizeof(buf) - 1, "en_logic_mask_%d", i);
+        ret = of_property_read_u32(dev->of_node, buf, &firmware_logic_dev_en_point->mask);
+        if (ret != 0) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to config en en_logic_mask_%d ret =%d.\n", i, ret);
+            break;
+        }
+
+        mem_clear(buf, sizeof(buf));
+        snprintf(buf, sizeof(buf) - 1, "en_logic_en_val_%d", i);
+        ret = of_property_read_u32(dev->of_node, buf, &firmware_logic_dev_en_point->en_val);
+        if (ret != 0) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to config en en_logic_en_val_%d ret =%d.\n", i, ret);
+            break;
+        }
+
+        mem_clear(buf, sizeof(buf));
+        snprintf(buf, sizeof(buf) - 1, "en_logic_dis_val_%d", i);
+        ret = of_property_read_u32(dev->of_node, buf, &firmware_logic_dev_en_point->dis_val);
+        if (ret != 0) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to config en en_logic_dis_val_%d ret =%d.\n", i, ret);
+            break;
+        }
+
+        mem_clear(buf, sizeof(buf));
+        snprintf(buf, sizeof(buf) - 1, "en_logic_width_%d", i);
+        ret = of_property_read_u32(dev->of_node, buf, &firmware_logic_dev_en_point->width);
+        if (ret != 0) {
+            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to config en en_logic_width_%d ret =%d.\n", i, ret);
+            break;
+        }
+
+        sysfs_info->logic_dev_en_num++;
+    }
+
+    return ret;
+}
+
+static int firmware_upgrade_config_init(struct device *dev, firmware_sysfs_t *sysfs_info)
+{
+    int i;
+    firmware_logic_dev_en_t *firmware_logic_dev_en_point;
+    firmware_upgrade_device_t *firmware_upgrade_device;
+    firmware_sysfs_device_t sysfs_upg_device;
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Enter firmware_dev_loc_config_init\r\n");
+    if (sysfs_info == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("info is null\r\n");
+        return -1;
+    }
+
+    if (dev->platform_data == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("platform data config error.\n");
+        return -1;
+    }
+    firmware_upgrade_device = dev->platform_data;
+    sysfs_upg_device = firmware_upgrade_device->upg_type.sysfs;
+
+    mem_clear(sysfs_info, sizeof(firmware_sysfs_t));
+    strncpy(sysfs_info->type, firmware_upgrade_device->type, sizeof(sysfs_info->type) - 1);
+    sysfs_info->chain = firmware_upgrade_device->chain;
+    sysfs_info->chip_index = firmware_upgrade_device->chip_index;
+
+    if (strcmp(sysfs_info->type, FIRMWARE_SYSFS_TYPE_SPI_LOGIC) == 0) {
+        strncpy(sysfs_info->info.spi_logic_info.dev_name, sysfs_upg_device.dev_name, FIRMWARE_DEV_NAME_LEN - 1);
+        sysfs_info->info.spi_logic_info.flash_base = sysfs_upg_device.flash_base;
+        sysfs_info->info.spi_logic_info.ctrl_base = sysfs_upg_device.ctrl_base;
+        sysfs_info->info.spi_logic_info.test_base = sysfs_upg_device.test_base;
+        sysfs_info->info.spi_logic_info.test_size = sysfs_upg_device.test_size;
+    } else if (strcmp(sysfs_info->type, FIRMWARE_SYSFS_TYPE_SYSFS) == 0) {
+        strncpy(sysfs_info->info.dev_file_info.sysfs_name, sysfs_upg_device.sysfs_name, FIRMWARE_DEV_NAME_LEN - 1);
+        sysfs_info->info.dev_file_info.dev_base = sysfs_upg_device.dev_base;
+        sysfs_info->info.dev_file_info.per_len = sysfs_upg_device.per_len;
+        sysfs_info->info.dev_file_info.test_base = sysfs_upg_device.test_base;
+        sysfs_info->info.dev_file_info.test_size = sysfs_upg_device.test_size;
+    } else if (strcmp(sysfs_info->type, FIRMWARE_SYSFS_TYPE_MTD) == 0) {
+        strncpy(sysfs_info->info.mtd_info.mtd_name, sysfs_upg_device.mtd_name, FIRMWARE_DEV_NAME_LEN - 1);
+        sysfs_info->info.mtd_info.flash_base = sysfs_upg_device.flash_base;
+        sysfs_info->info.mtd_info.test_base = sysfs_upg_device.test_base;
+        sysfs_info->info.mtd_info.test_size = sysfs_upg_device.test_size;
+    } else {
+        FIRMWARE_DRIVER_DEBUG_ERROR("config sysfs type[%s] is not support.\n", sysfs_info->type);
+        return -ENXIO;
+    }
+
+    if (firmware_upgrade_device->en_gpio_num > FIRMWARE_EN_INFO_MAX) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("The number of en_gpio_num:%u configurations exceeds the maximum limit:%u.\n",
+            firmware_upgrade_device->en_gpio_num, FIRMWARE_EN_INFO_MAX);
+        return -ENXIO;
+    }
+    sysfs_info->gpio_en_info_num = firmware_upgrade_device->en_gpio_num;
+    /* Enable through GPIO */
+    for (i = 0; i < sysfs_info->gpio_en_info_num; i++) {
+        sysfs_info->gpio_en_info[i].en_gpio = firmware_upgrade_device->en_gpio[i];
+        sysfs_info->gpio_en_info[i].en_level = firmware_upgrade_device->en_level[i];
+    }
+
+    if (firmware_upgrade_device->en_logic_num > FIRMWARE_EN_INFO_MAX) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("The number of en_logic_num:%u configurations exceeds the maximum limit:%u.\n",
+            firmware_upgrade_device->en_logic_num, FIRMWARE_EN_INFO_MAX);
+        return -ENXIO;
+    }
+    sysfs_info->logic_dev_en_num = firmware_upgrade_device->en_logic_num;
+    /* Enable through register */
+    for (i = 0; i < sysfs_info->logic_dev_en_num; i++) {
+        firmware_logic_dev_en_point = &sysfs_info->logic_dev_en_info[i];
+        strncpy(firmware_logic_dev_en_point->dev_name, firmware_upgrade_device->en_logic_dev[i], FIRMWARE_DEV_NAME_LEN - 1);
+        firmware_logic_dev_en_point->addr = firmware_upgrade_device->en_logic_addr[i];
+        firmware_logic_dev_en_point->mask = firmware_upgrade_device->en_logic_mask[i];
+        firmware_logic_dev_en_point->en_val = firmware_upgrade_device->en_logic_en_val[i];
+        firmware_logic_dev_en_point->dis_val = firmware_upgrade_device->en_logic_dis_val[i];
+        firmware_logic_dev_en_point->width = firmware_upgrade_device->en_logic_width[i];
+    }
+
+    return 0;
+}
+
+static int firmware_sysfs_probe(struct platform_device *pdev)
+{
+    int ret;
+    firmware_sysfs_t *sysfs_info;
+    firmware_device_t *frm_dev;
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Enter firmware_sysfs_probe\r\n");
+    sysfs_info = devm_kzalloc(&pdev->dev, sizeof(firmware_sysfs_t), GFP_KERNEL);
+    if (sysfs_info == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to kzalloc device tree.\n");
+        return -EPERM;
+    }
+
+    if (pdev->dev.of_node) {
+        ret = of_firmware_upgrade_config_init(&pdev->dev, sysfs_info);
+    } else {
+        ret = firmware_upgrade_config_init(&pdev->dev, sysfs_info);
+    }
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("get config init from dts error.\n");
+        return -EPERM;
+    }
+
+    frm_dev = devm_kzalloc(&pdev->dev, sizeof(firmware_device_t), GFP_KERNEL);
+    if (frm_dev == NULL) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to kzalloc firmware device.\n");
+        return -EPERM;
+    }
+
+    /* Based on the link number, determine the name of the device file */
+    frm_dev->chain = sysfs_info->chain;
+    snprintf(frm_dev->name, FIRMWARE_NAME_LEN - 1, "firmware_sysfs%d", frm_dev->chain);
+    strncpy(sysfs_info->devname, frm_dev->name, strlen(frm_dev->name) + 1);
+
+    INIT_LIST_HEAD(&frm_dev->list);
+    frm_dev->dev.minor = MISC_DYNAMIC_MINOR;
+    frm_dev->dev.name = frm_dev->name;
+    frm_dev->dev.fops = &sysfs_dev_fops;
+    frm_dev->priv = sysfs_info;
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("Register sysfs firmware chain:%d, name:%s.\n", frm_dev->chain, frm_dev->name);
+
+    ret = firmware_device_register(frm_dev);
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to register firmware device.\n");
+        return -EPERM;
+    }
+
+    platform_set_drvdata(pdev, frm_dev);
+    return 0;
+}
+
+static int __exit firmware_sysfs_remove(struct platform_device *pdev)
+{
+    firmware_device_t *frm_dev;
+
+    frm_dev = (firmware_device_t *)platform_get_drvdata(pdev);
+    firmware_device_unregister(frm_dev);
+    platform_set_drvdata(pdev, NULL);
+
+    return 0;
+}
+
+static struct of_device_id sysfs_match[] = {
+    {
+        .compatible = "firmware_sysfs",
+    },
+    {},
+};
+
+static struct platform_driver sysfs_driver = {
+    .driver = {
+        .name = "firmware_sysfs",
+        .owner = THIS_MODULE,
+        .of_match_table = sysfs_match,
+    },
+    .probe = firmware_sysfs_probe,
+    .remove = firmware_sysfs_remove,
+};
+
+static firmware_driver_t fmw_drv_sysfs = {
+    .name = "firmware_sysfs",
+    .drv = &sysfs_driver,
+};
+
+int firmware_sysfs_init(void)
+{
+    int ret;
+
+    INIT_LIST_HEAD(&fmw_drv_sysfs.list);
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("sysfs upgrade driver register \n");
+    ret = firmware_driver_register(&fmw_drv_sysfs);
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("sysfs upgrade driver register failed\n");
+        return ret;
+    }
+    return 0;
+}
+
+void firmware_sysfs_exit(void)
+{
+    firmware_driver_unregister(&fmw_drv_sysfs);
+    INIT_LIST_HEAD(&fmw_drv_sysfs.list);
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/firmware_sysfs_upgrade.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/firmware_sysfs_upgrade.c
new file mode 100644
index 000000000000..8b883006de53
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/firmware_sysfs_upgrade.c
@@ -0,0 +1,258 @@
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/ctype.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <firmware_sysfs.h>
+#include <firmware_sysfs_upgrade.h>
+#include <firmware_upgrade.h>
+
+static int firmware_file_read(const char *path, uint32_t addr, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t pos;
+
+    filp = filp_open(path, O_RDONLY, 0);
+    if (IS_ERR(filp)) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    pos = (loff_t)addr;
+    ret = kernel_read(filp, val, size, &pos);
+    if (ret != size) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("read kernel_read failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, addr, size, ret);
+        goto exit;
+    }
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int firmware_file_write(const char *path, uint32_t addr, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t pos;
+
+    filp = filp_open(path, O_RDWR, 777);
+    if (IS_ERR(filp)) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    pos = (loff_t)addr;
+    ret = kernel_write(filp, (void*)val, size, &pos);
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("write kernel_write failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, addr, size, ret);
+        goto exit;
+    }
+    vfs_fsync(filp, 1);
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+/*
+ * firmware_file_do_work
+ * function: Sets logical register values
+ * @path:param[in] Logic device descriptor
+ * @addr:param[in] Logic device address
+ * @value:param[in] the register value needs to be set
+ * @mask:param[in] register mask
+ * @width:param[in] register bit width
+ * return: 0:success, <0:failed
+ */
+static int firmware_file_do_work(char *path, uint32_t addr, uint32_t value, uint32_t mask,
+                    int32_t width)
+{
+    int ret;
+    uint8_t read_value[4], write_value[4];
+    uint8_t tmp_read8, tmp_write8, tmp_mask8;
+    uint32_t tmp_read32, tmp_write32;
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("path=%s, addr=0x%x, value=0x%x mask=0x%x\r\n", path, addr, value, mask);
+    if ((width > 4) || (width < 0)) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("width %d is not support.\r\n", width);
+        return -1;
+    }
+    ret = 0;
+    mem_clear(read_value, sizeof(read_value));
+    mem_clear(write_value, sizeof(write_value));
+    ret = firmware_file_read(path, addr, read_value, width);
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("firmware sysfs read.\r\n");
+        return -1;
+    }
+
+    switch (width) {
+    case 1:
+        tmp_read8 = read_value[0];
+        tmp_mask8 = (uint8_t)(mask) & 0xFF;
+        tmp_write8 = (uint8_t)value & 0xFF;
+        write_value[0] = (tmp_read8 & tmp_mask8) | tmp_write8;
+        FIRMWARE_DRIVER_DEBUG_VERBOSE("1 byte write val[0]:0x%x", write_value[0]);
+        break;
+    case 2:
+        FIRMWARE_DRIVER_DEBUG_ERROR("width %d is not support.\r\n", width);
+        return -1;
+    case 4:
+        memcpy((uint8_t *)&tmp_read32, read_value, 4);
+        tmp_write32 = (tmp_read32 & mask) | value;
+        memcpy(write_value, (uint8_t *)&tmp_write32, 4);
+        FIRMWARE_DRIVER_DEBUG_VERBOSE("4 byte write val[0]:0x%x, val[1]:0x%x, val[2]:0x%x, val[3]:0x%x",
+            write_value[0], write_value[1], write_value[2], write_value[3]);
+        break;
+    default:
+        FIRMWARE_DRIVER_DEBUG_ERROR("width %d is not support.\r\n", width);
+        return -1;
+    }
+
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("write logic dev[%s] addr[0x%x].\r\n", path, addr);
+    ret = firmware_file_write(path, addr, write_value, width);
+    if (ret < 0) {
+        FIRMWARE_DRIVER_DEBUG_ERROR("firmware_file_write %s addr 0x%x failed, ret=%d.\r\n", path, addr, ret);
+        return -1;
+    }
+
+    return 0;
+}
+
+/*
+ * firmware_upgrade_en
+ * function:param[in] Upgrade access enabling switch
+ * @flag:param[in] !0:enable 0:disable
+ * return: 0:success, <0:failed
+ */
+static int firmware_upgrade_en(firmware_sysfs_t *sysfs_info, int flag)
+{
+    int i;
+    firmware_logic_dev_en_t *firmware_logic_dev_en_info;
+    int ret, rv;
+    char *dev_name;
+
+    ret = 0;
+    FIRMWARE_DRIVER_DEBUG_VERBOSE("%s en switch: gpio en num %d, logic reg en num %d.\n",
+            flag ? "Open" : "Close", sysfs_info->gpio_en_info_num, sysfs_info->logic_dev_en_num);
+    for (i = 0; i < sysfs_info->gpio_en_info_num; i++) {
+        FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware sysfs [%d] gpio[%d] en_level[%d]\n",
+                i, sysfs_info->gpio_en_info[i].en_gpio, sysfs_info->gpio_en_info[i].en_level);
+        if (flag) {
+            ret = gpio_request(sysfs_info->gpio_en_info[i].en_gpio, "sysfs_upgrade_gpio_en");
+            if (ret) {
+                FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_ispvme_upgrade EN[%d] GPIO[%d] failed!\n",
+                        i, sysfs_info->gpio_en_info[i].en_gpio);
+                goto free_gpio;
+            }
+            gpio_direction_output(sysfs_info->gpio_en_info[i].en_gpio, sysfs_info->gpio_en_info[i].en_level);
+            sysfs_info->gpio_en_info[i].flag = 1;
+        } else {
+            gpio_set_value(sysfs_info->gpio_en_info[i].en_gpio, !sysfs_info->gpio_en_info[i].en_level);
+            gpio_free(sysfs_info->gpio_en_info[i].en_gpio);
+            sysfs_info->gpio_en_info[i].flag = 0;
+        }
+    }
+
+    for (i = 0; i < sysfs_info->logic_dev_en_num; i++) {
+        firmware_logic_dev_en_info = &sysfs_info->logic_dev_en_info[i];
+        dev_name = firmware_logic_dev_en_info->dev_name;
+        FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware sysfs [%d] dev_name[%s] addr[0x%x] mask[0x%x]"
+            " en_val[0x%x] dis_val[0x%x] width[%d]\n",
+            i , firmware_logic_dev_en_info->dev_name, firmware_logic_dev_en_info->addr,
+            firmware_logic_dev_en_info->mask, firmware_logic_dev_en_info->en_val,
+            firmware_logic_dev_en_info->dis_val, firmware_logic_dev_en_info->width);
+        if (flag) {
+            ret = firmware_file_do_work(dev_name, firmware_logic_dev_en_info->addr,
+                    firmware_logic_dev_en_info->en_val, firmware_logic_dev_en_info->mask,
+                    firmware_logic_dev_en_info->width);
+            if (ret < 0) {
+                FIRMWARE_DRIVER_DEBUG_ERROR("Open logic register [%d] EN failed, ret %d.\n", i, ret);
+                goto free_logic_dev;
+            } else {
+                firmware_logic_dev_en_info->flag = 1;
+            }
+        } else {
+            rv = firmware_file_do_work(dev_name, firmware_logic_dev_en_info->addr,
+                    firmware_logic_dev_en_info->dis_val, firmware_logic_dev_en_info->mask,
+                    firmware_logic_dev_en_info->width);
+            if (rv < 0) {
+                FIRMWARE_DRIVER_DEBUG_ERROR("Close logic register [%d] EN failed, ret %d.\n", i, rv);
+                ret = -1;
+            }
+            firmware_logic_dev_en_info->flag = 0;
+        }
+    }
+
+    return ret;
+free_logic_dev:
+    for (i = 0; i < sysfs_info->logic_dev_en_num; i++) {
+        firmware_logic_dev_en_info = &sysfs_info->logic_dev_en_info[i];
+        dev_name = firmware_logic_dev_en_info->dev_name;
+        if (firmware_logic_dev_en_info->flag == 1) {
+            ret = firmware_file_do_work(dev_name, firmware_logic_dev_en_info->addr,
+                        firmware_logic_dev_en_info->dis_val, firmware_logic_dev_en_info->mask,
+                        firmware_logic_dev_en_info->width);
+            if (ret < 0) {
+                FIRMWARE_DRIVER_DEBUG_ERROR("Close logic register [%d] EN failed, ret %d.\n", i, ret);
+            }
+            firmware_logic_dev_en_info->flag = 0;
+        } else {
+            break;
+        }
+    }
+free_gpio:
+    for (i = 0; i < sysfs_info->gpio_en_info_num; i++) {
+        if (sysfs_info->gpio_en_info[i].flag == 1) {
+            gpio_set_value(sysfs_info->gpio_en_info[i].en_gpio, !sysfs_info->gpio_en_info[i].en_level);
+            gpio_free(sysfs_info->gpio_en_info[i].en_gpio);
+            sysfs_info->gpio_en_info[i].flag = 0;
+        } else {
+            break;
+        }
+    }
+
+    return -1;
+}
+
+/*
+ * firmware_init_dev_loc
+ * function: init logic device, enable upgrade access
+ * return: 0:success, <0:failed
+ */
+int firmware_init_dev_loc(firmware_sysfs_t *sysfs_info)
+{
+    int ret;
+
+    ret = firmware_upgrade_en(sysfs_info, 1);
+    return ret;
+}
+
+/*
+ * firmware_finish_dev_loc
+ * function: finish logic device, disable upgrade access
+ * return: 0:success, <0:failed
+ */
+int firmware_finish_dev_loc(firmware_sysfs_t *sysfs_info){
+    int ret;
+    ret = firmware_upgrade_en(sysfs_info, 0);
+    return ret;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/include/firmware_sysfs.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/include/firmware_sysfs.h
new file mode 100644
index 000000000000..9da2303c7c00
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/include/firmware_sysfs.h
@@ -0,0 +1,88 @@
+#ifndef __FIRMWARE_SYSFS_H__
+#define __FIRMWARE_SYSFS_H__
+
+#include <linux/miscdevice.h>
+#include <linux/platform_device.h>
+
+#include <asm/ioctl.h>
+
+/* Debug switch level */
+typedef enum {
+    FIRWMARE_VERBOSE,
+    FIRWMARE_WARN,
+    FIRWMARE_ERROR,
+    FIRWMARE_END,
+} firmware_debug_level_t;
+
+#define FIRMWARE_DRIVER_DEBUG_VERBOSE(fmt, args...) do { \
+    if ((g_firmware_driver_debug) & (1U << FIRWMARE_VERBOSE)) { \
+        printk(KERN_INFO "[FIRMWARW_DRIVER_SYSFS][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define FIRMWARE_DRIVER_DEBUG_ERROR(fmt, args...) do { \
+    if ((g_firmware_driver_debug) & (1U << FIRWMARE_ERROR)) { \
+        printk(KERN_ERR "[FIRMWARW_DRIVER_SYSFS][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define FIRMWARE_NAME_LEN      48
+
+#define FIRMWARE_FAILED              (-1)
+#define FIRMWARE_SUCCESS             0
+
+/* ioctl publi command, the same as "firmware_upgrade\include\firmware_app.h" */
+#define FIRMWARE_COMMON_TYPE 'C'
+#define FIRMWARE_GET_CHIPNAME            _IOR(FIRMWARE_COMMON_TYPE, 0, char)    /* get the chip name */
+#define FIRMWARE_GET_VERSION             _IOR(FIRMWARE_COMMON_TYPE, 2, int)     /* get version */
+
+/* firmware sysfs driver ioctl command, the same as "firmware_upgrade\include\firmware_app.h" */
+#define FIRMWARE_SYSFS_TYPE 'S'
+#define FIRMWARE_SYSFS_INIT               _IOR(FIRMWARE_SYSFS_TYPE, 0, char)   /* enable upgrade access */
+#define FIRMWARE_SYSFS_FINISH             _IOR(FIRMWARE_SYSFS_TYPE, 1, char)   /* disable upgrade access */
+#define FIRMWARE_SYSFS_SPI_INFO           _IOR(FIRMWARE_SYSFS_TYPE, 2, char)   /* spi flash upgrade */
+#define FIRMWARE_SYSFS_DEV_FILE_INFO      _IOR(FIRMWARE_SYSFS_TYPE, 3, char)   /* sysfs upgrade */
+#define FIRMWARE_SYSFS_MTD_INFO           _IOR(FIRMWARE_SYSFS_TYPE, 4, char)   /* sysfs mtd upgrade */
+
+#define FIRMWARE_SYSFS_TYPE_SPI_LOGIC       "SPI_LOGIC"
+#define FIRMWARE_SYSFS_TYPE_SYSFS           "SYSFS"
+#define FIRMWARE_SYSFS_TYPE_MTD             "MTD_DEV"
+
+typedef struct cmd_info_s {
+    uint32_t size;
+    void __user *data;
+} cmd_info_t;
+
+typedef struct firmware_device_s {
+    struct list_head list;             /* device list */
+    uint32_t chain;                    /* chain number */
+    char name[FIRMWARE_NAME_LEN];      /* name */
+    struct miscdevice dev;             /* device */
+    void *priv;                        /* private data */
+} firmware_device_t;
+
+typedef struct firmware_driver_s {
+    struct list_head list;             /* list */
+    char name[FIRMWARE_NAME_LEN];      /* name */
+    struct platform_driver *drv;       /* driver */
+    void *priv;                        /* private data */
+} firmware_driver_t;
+
+extern int g_firmware_driver_debug;
+
+/* Get device information based on minor */
+extern firmware_device_t *firmware_get_device_by_minor(int minor);
+/* Registere device */
+extern int firmware_device_register(firmware_device_t *fw_dev);
+/* Unregister device */
+extern void firmware_device_unregister(firmware_device_t *fw_dev);
+/* Registere driver */
+extern int firmware_driver_register(firmware_driver_t *fw_drv);
+/* Unregister driver */
+extern void firmware_driver_unregister(firmware_driver_t *fw_drv);
+/* SYSFS upgrade initialized */
+extern int firmware_sysfs_init(void);
+/* SYSFS unload function */
+extern void firmware_sysfs_exit(void);
+
+#endif /* end of __FIRMWARE_SYSFS_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/include/firmware_sysfs_upgrade.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/include/firmware_sysfs_upgrade.h
new file mode 100644
index 000000000000..9c6b970274b1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/include/firmware_sysfs_upgrade.h
@@ -0,0 +1,72 @@
+#ifndef __FIRMWARE_SYSFS_UPGRADE_H__
+#define __FIRMWARE_SYSFS_UPGRADE_H__
+
+#define FIRMWARE_DEV_NAME_LEN     64    /* the macro definition needs to same as app space define */
+#define FIRMWARE_TYPE_LEN         10
+#define FIRMWARE_EN_INFO_MAX      16
+
+typedef struct firmware_spi_logic_info_s {
+    char dev_name[FIRMWARE_DEV_NAME_LEN];        /* Logical device name */
+    uint32_t flash_base;                         /* Flash Upgrade Address */
+    uint32_t ctrl_base;                          /* SPI upgrade control register base address */
+    uint32_t test_base;                          /* Test flash address */
+    uint32_t test_size;                          /* Test flash size */
+} firmware_spi_logic_info_t;
+
+typedef struct firmware_dev_file_info_s {
+    char sysfs_name[FIRMWARE_DEV_NAME_LEN];         /* sysfs name */
+    uint32_t dev_base;                              /* device upgrade base address */
+    uint32_t per_len;                               /* The length of bytes per operation */
+    uint32_t test_base;                             /* Test flash address */
+    uint32_t test_size;                             /* Test flash size */
+} firmware_dev_file_info_t;
+
+typedef struct firmware_mtd_info_s {
+    char mtd_name[FIRMWARE_DEV_NAME_LEN];         /* sysfs name */
+    uint32_t flash_base;                          /* Flash Upgrade Address */
+    uint32_t test_base;                           /* Test flash address */
+    uint32_t test_size;                           /* Test flash size */
+} firmware_mtd_info_t;
+
+typedef struct firmware_gpio_jtag_en_s {
+    uint32_t en_gpio;                                               /* GPIO enable pin */
+    uint32_t en_level;                                              /* GPIO enable level */
+    int flag;                                                       /* init flag; 1-init 0-not init */
+} firmware_gpio_jtag_en_t;
+
+typedef struct firmware_logic_dev_en_s {
+    char dev_name[FIRMWARE_DEV_NAME_LEN];        /* Logical device name */
+    uint32_t addr;                               /* Enable register address */
+    uint32_t mask;                               /* mask */
+    uint32_t en_val;                             /* Enable value */
+    uint32_t dis_val;                            /* Disable value*/
+    uint32_t width;                              /* width */
+    int flag;                                    /* init flag; 1-init 0-not init */
+} firmware_logic_dev_en_t;
+
+typedef struct firmware_sysfs_s {
+    char devname[FIRMWARE_DEV_NAME_LEN];                        /* Device name */
+    char type[FIRMWARE_TYPE_LEN];                               /* interface type */
+    uint32_t chain;                                             /* chain num */
+    uint32_t chip_index;                                        /* chip index */
+    union {
+        firmware_spi_logic_info_t spi_logic_info;                   /* SPI logic Information */
+        firmware_dev_file_info_t dev_file_info;                     /* device file Information */
+        firmware_mtd_info_t mtd_info;                               /* mtd device Information */
+    } info;
+    uint32_t gpio_en_info_num;                                       /* GPIO Enable Number */
+    firmware_gpio_jtag_en_t gpio_en_info[FIRMWARE_EN_INFO_MAX]; /* GPIO Enable Information */
+    uint32_t logic_dev_en_num;                                       /* Register Enable Number */
+    firmware_logic_dev_en_t logic_dev_en_info[FIRMWARE_EN_INFO_MAX]; /* Register Enable Information */
+} firmware_sysfs_t;
+
+typedef struct firmware_sysfs_function_s{
+    int (*init_dev)(void);                           /* upgrade initializes the operation */
+    int (*finish_dev)(void);                         /* upgrade completes the operation */
+}firmware_sysfs_function_t;
+
+extern void firmware_set_sysfs_info(firmware_sysfs_t *sysfs_info);
+extern int firmware_init_dev_loc(firmware_sysfs_t *sysfs_info);
+extern int firmware_finish_dev_loc(firmware_sysfs_t *sysfs_info);
+
+#endif /* __FIRMWARE_SYSFS_UPGRADE_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/include/firmware_upgrade.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/include/firmware_upgrade.h
new file mode 100644
index 000000000000..600c69646b1b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/include/firmware_upgrade.h
@@ -0,0 +1,57 @@
+#ifndef __FIRMWARE_UPGRADE_H__
+#define __FIRMWARE_UPGRADE_H__
+
+#include <linux/string.h>
+
+#define TYPE_LEN         (10)
+#define DEV_NAME_LEN     (64)
+#define ENABLE_NUM       (16)
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+typedef struct firmware_jtag_device_s {
+    uint32_t tdi;
+    uint32_t tck;
+    uint32_t tms;
+    uint32_t tdo;
+    uint32_t tck_delay;
+} firmware_jtag_device_t;
+
+typedef struct firmware_sysfs_device_s {
+    uint32_t test_base;
+    uint32_t test_size;
+    char dev_name[DEV_NAME_LEN];
+    uint32_t flash_base;
+    uint32_t ctrl_base;
+    char sysfs_name[DEV_NAME_LEN];
+    uint32_t dev_base;
+    uint32_t per_len;
+    char mtd_name[DEV_NAME_LEN];
+} firmware_sysfs_device_t;
+
+typedef struct firmware_upgrade_device_s {
+    char type[TYPE_LEN];
+    uint32_t chain;
+    uint32_t chip_index;
+
+    uint32_t en_gpio_num;        /* the number of en_gpio */
+    uint32_t en_gpio[ENABLE_NUM];
+    uint32_t en_level[ENABLE_NUM];
+
+    uint32_t en_logic_num;       /* the number of en_logic */
+    char en_logic_dev[ENABLE_NUM][DEV_NAME_LEN];
+    uint32_t en_logic_addr[ENABLE_NUM];
+    uint32_t en_logic_mask[ENABLE_NUM];
+    uint32_t en_logic_en_val[ENABLE_NUM];
+    uint32_t en_logic_dis_val[ENABLE_NUM];
+    uint32_t en_logic_width[ENABLE_NUM];
+
+    int device_flag;
+    union {
+        firmware_jtag_device_t jtag;
+        firmware_sysfs_device_t sysfs;
+    } upg_type;
+
+} firmware_upgrade_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/Makefile
new file mode 100644
index 000000000000..176d44d2abd9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/Makefile
@@ -0,0 +1,33 @@
+include $(top_srcdir)/Rules.mk
+
+#OBJ = firmware_app.o debug.o hardware.o ispvm_ui.o ivm_core.o crc32.o
+PWD = $(shell pwd)
+SRC :=
+SRC += $(shell find $(PWD) -name '*.c')
+
+OBJ := $(SRC:%.c=%.o)
+LIB += $(BUILD_CFALGS) $(BUILD_LDFLAGS) -lpthread -lreadline -lncurses
+INCLUDE = -Iinclude
+INCLUDE+= -Wall
+APP = firmware_upgrade
+ELF_FILE = $(APP)
+MAP_FILE = $(APP).map.sym
+
+.PHONY: build
+build:$(OBJ)
+	$(CC) $^ -o $(ELF_FILE) $(LINKFLAGS) $(LIB)
+	$(NM) $(ELF_FILE) | grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' \
+		| sort > $(MAP_FILE)
+	cp -p $(ELF_FILE) $(common_out_put_dir)
+
+%.o:%.c
+	$(CC) -c $(CFLAGS) $(INCLUDE) $< -o $@
+
+.PHONY: install
+install:
+	echo "firmware_upgrade install success."
+	cp -p $(ELF_FILE) $(common_out_put_dir)
+
+.PHONY: clean
+clean:
+	rm -rf $(BUILD_DIR)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/crc32.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/crc32.c
new file mode 100644
index 000000000000..5b60b40ad1ba
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/crc32.c
@@ -0,0 +1,216 @@
+/*
+ * This file is derived from crc32.c from the zlib-1.1.3 distribution
+ * by Jean-loup Gailly and Mark Adler.
+ */
+
+/* crc32.c -- compute the CRC-32 of a data stream
+ * Copyright (C) 1995-1998 Mark Adler
+ * For conditions of distribution and use, see copyright notice in zlib.h
+ */
+/* xxxx: by chihl for compile error */
+#if 1
+
+#ifndef FAR
+#define FAR
+#endif
+
+typedef unsigned char  Byte;  /* 8 bits */
+typedef unsigned int   uInt;  /* 16 bits or more */
+typedef unsigned long  uLong; /* 32 bits or more */
+
+typedef Byte FAR Bytef;
+typedef char FAR charf;
+typedef int FAR intf;
+typedef uInt FAR uIntf;
+typedef uLong FAR uLongf;
+
+#ifndef OF /* function prototypes */
+#ifdef STDC
+#define OF(args)  args
+#else
+#define OF(args)  ()
+#endif
+#endif
+
+#endif
+
+#define local static
+#define ZEXPORT /* empty */
+unsigned long crc32 (unsigned long, const unsigned char *, unsigned int);
+
+#define DYNAMIC_CRC_TABLE
+
+#ifdef DYNAMIC_CRC_TABLE
+
+local int crc_table_empty = 1;
+local uLongf crc_table[256];
+local void make_crc_table OF((void));
+
+/*
+  Generate a table for a byte-wise 32-bit CRC calculation on the polynomial:
+  x^32+x^26+x^23+x^22+x^16+x^12+x^11+x^10+x^8+x^7+x^5+x^4+x^2+x+1.
+
+  Polynomials over GF(2) are represented in binary, one bit per coefficient,
+  with the lowest powers in the most significant bit.  Then adding polynomials
+  is just exclusive-or, and multiplying a polynomial by x is a right shift by
+  one.  If we call the above polynomial p, and represent a byte as the
+  polynomial q, also with the lowest power in the most significant bit (so the
+  byte 0xb1 is the polynomial x^7+x^3+x+1), then the CRC is (q*x^32) mod p,
+  where a mod b means the remainder after dividing a by b.
+
+  This calculation is done using the shift-register method of multiplying and
+  taking the remainder.  The register is initialized to zero, and for each
+  incoming bit, x^32 is added mod p to the register if the bit is a one (where
+  x^32 mod p is p+x^32 = x^26+...+1), and the register is multiplied mod p by
+  x (which is shifting right by one and adding x^32 mod p if the bit shifted
+  out is a one).  We start with the highest power (least significant bit) of
+  q and repeat for all eight bits of q.
+
+  The table is simply the CRC of all possible eight bit values.  This is all
+  the information needed to generate CRC's on data a byte at a time for all
+  combinations of CRC register values and incoming bytes.
+*/
+local void make_crc_table()
+{
+  uLong c;
+  int n, k;
+  uLong poly;            /* polynomial exclusive-or pattern */
+  /* terms of polynomial defining this crc (except x^32): */
+  static const Byte p[] = {0,1,2,4,5,7,8,10,11,12,16,22,23,26};
+
+  /* make exclusive-or pattern from polynomial (0xedb88320L) */
+  poly = 0L;
+  for (n = 0; n < sizeof(p)/sizeof(Byte); n++)
+    poly |= 1L << (31 - p[n]);
+
+  for (n = 0; n < 256; n++)
+  {
+    c = (uLong)n;
+    for (k = 0; k < 8; k++)
+      c = c & 1 ? poly ^ (c >> 1) : c >> 1;
+    crc_table[n] = c;
+  }
+  crc_table_empty = 0;
+}
+#else
+/* ========================================================================
+ * Table of CRC-32's of all single-byte values (made by make_crc_table)
+ */
+local const uLongf crc_table[256] = {
+  0x00000000L, 0x77073096L, 0xee0e612cL, 0x990951baL, 0x076dc419L,
+  0x706af48fL, 0xe963a535L, 0x9e6495a3L, 0x0edb8832L, 0x79dcb8a4L,
+  0xe0d5e91eL, 0x97d2d988L, 0x09b64c2bL, 0x7eb17cbdL, 0xe7b82d07L,
+  0x90bf1d91L, 0x1db71064L, 0x6ab020f2L, 0xf3b97148L, 0x84be41deL,
+  0x1adad47dL, 0x6ddde4ebL, 0xf4d4b551L, 0x83d385c7L, 0x136c9856L,
+  0x646ba8c0L, 0xfd62f97aL, 0x8a65c9ecL, 0x14015c4fL, 0x63066cd9L,
+  0xfa0f3d63L, 0x8d080df5L, 0x3b6e20c8L, 0x4c69105eL, 0xd56041e4L,
+  0xa2677172L, 0x3c03e4d1L, 0x4b04d447L, 0xd20d85fdL, 0xa50ab56bL,
+  0x35b5a8faL, 0x42b2986cL, 0xdbbbc9d6L, 0xacbcf940L, 0x32d86ce3L,
+  0x45df5c75L, 0xdcd60dcfL, 0xabd13d59L, 0x26d930acL, 0x51de003aL,
+  0xc8d75180L, 0xbfd06116L, 0x21b4f4b5L, 0x56b3c423L, 0xcfba9599L,
+  0xb8bda50fL, 0x2802b89eL, 0x5f058808L, 0xc60cd9b2L, 0xb10be924L,
+  0x2f6f7c87L, 0x58684c11L, 0xc1611dabL, 0xb6662d3dL, 0x76dc4190L,
+  0x01db7106L, 0x98d220bcL, 0xefd5102aL, 0x71b18589L, 0x06b6b51fL,
+  0x9fbfe4a5L, 0xe8b8d433L, 0x7807c9a2L, 0x0f00f934L, 0x9609a88eL,
+  0xe10e9818L, 0x7f6a0dbbL, 0x086d3d2dL, 0x91646c97L, 0xe6635c01L,
+  0x6b6b51f4L, 0x1c6c6162L, 0x856530d8L, 0xf262004eL, 0x6c0695edL,
+  0x1b01a57bL, 0x8208f4c1L, 0xf50fc457L, 0x65b0d9c6L, 0x12b7e950L,
+  0x8bbeb8eaL, 0xfcb9887cL, 0x62dd1ddfL, 0x15da2d49L, 0x8cd37cf3L,
+  0xfbd44c65L, 0x4db26158L, 0x3ab551ceL, 0xa3bc0074L, 0xd4bb30e2L,
+  0x4adfa541L, 0x3dd895d7L, 0xa4d1c46dL, 0xd3d6f4fbL, 0x4369e96aL,
+  0x346ed9fcL, 0xad678846L, 0xda60b8d0L, 0x44042d73L, 0x33031de5L,
+  0xaa0a4c5fL, 0xdd0d7cc9L, 0x5005713cL, 0x270241aaL, 0xbe0b1010L,
+  0xc90c2086L, 0x5768b525L, 0x206f85b3L, 0xb966d409L, 0xce61e49fL,
+  0x5edef90eL, 0x29d9c998L, 0xb0d09822L, 0xc7d7a8b4L, 0x59b33d17L,
+  0x2eb40d81L, 0xb7bd5c3bL, 0xc0ba6cadL, 0xedb88320L, 0x9abfb3b6L,
+  0x03b6e20cL, 0x74b1d29aL, 0xead54739L, 0x9dd277afL, 0x04db2615L,
+  0x73dc1683L, 0xe3630b12L, 0x94643b84L, 0x0d6d6a3eL, 0x7a6a5aa8L,
+  0xe40ecf0bL, 0x9309ff9dL, 0x0a00ae27L, 0x7d079eb1L, 0xf00f9344L,
+  0x8708a3d2L, 0x1e01f268L, 0x6906c2feL, 0xf762575dL, 0x806567cbL,
+  0x196c3671L, 0x6e6b06e7L, 0xfed41b76L, 0x89d32be0L, 0x10da7a5aL,
+  0x67dd4accL, 0xf9b9df6fL, 0x8ebeeff9L, 0x17b7be43L, 0x60b08ed5L,
+  0xd6d6a3e8L, 0xa1d1937eL, 0x38d8c2c4L, 0x4fdff252L, 0xd1bb67f1L,
+  0xa6bc5767L, 0x3fb506ddL, 0x48b2364bL, 0xd80d2bdaL, 0xaf0a1b4cL,
+  0x36034af6L, 0x41047a60L, 0xdf60efc3L, 0xa867df55L, 0x316e8eefL,
+  0x4669be79L, 0xcb61b38cL, 0xbc66831aL, 0x256fd2a0L, 0x5268e236L,
+  0xcc0c7795L, 0xbb0b4703L, 0x220216b9L, 0x5505262fL, 0xc5ba3bbeL,
+  0xb2bd0b28L, 0x2bb45a92L, 0x5cb36a04L, 0xc2d7ffa7L, 0xb5d0cf31L,
+  0x2cd99e8bL, 0x5bdeae1dL, 0x9b64c2b0L, 0xec63f226L, 0x756aa39cL,
+  0x026d930aL, 0x9c0906a9L, 0xeb0e363fL, 0x72076785L, 0x05005713L,
+  0x95bf4a82L, 0xe2b87a14L, 0x7bb12baeL, 0x0cb61b38L, 0x92d28e9bL,
+  0xe5d5be0dL, 0x7cdcefb7L, 0x0bdbdf21L, 0x86d3d2d4L, 0xf1d4e242L,
+  0x68ddb3f8L, 0x1fda836eL, 0x81be16cdL, 0xf6b9265bL, 0x6fb077e1L,
+  0x18b74777L, 0x88085ae6L, 0xff0f6a70L, 0x66063bcaL, 0x11010b5cL,
+  0x8f659effL, 0xf862ae69L, 0x616bffd3L, 0x166ccf45L, 0xa00ae278L,
+  0xd70dd2eeL, 0x4e048354L, 0x3903b3c2L, 0xa7672661L, 0xd06016f7L,
+  0x4969474dL, 0x3e6e77dbL, 0xaed16a4aL, 0xd9d65adcL, 0x40df0b66L,
+  0x37d83bf0L, 0xa9bcae53L, 0xdebb9ec5L, 0x47b2cf7fL, 0x30b5ffe9L,
+  0xbdbdf21cL, 0xcabac28aL, 0x53b39330L, 0x24b4a3a6L, 0xbad03605L,
+  0xcdd70693L, 0x54de5729L, 0x23d967bfL, 0xb3667a2eL, 0xc4614ab8L,
+  0x5d681b02L, 0x2a6f2b94L, 0xb40bbe37L, 0xc30c8ea1L, 0x5a05df1bL,
+  0x2d02ef8dL
+};
+#endif
+
+#if 0
+/* =========================================================================
+ * This function can be used by asm versions of crc32()
+ */
+const uLongf * ZEXPORT get_crc_table()
+{
+#ifdef DYNAMIC_CRC_TABLE
+  if (crc_table_empty) make_crc_table();
+#endif
+  return (const uLongf *)crc_table;
+}
+#endif
+
+/* ========================================================================= */
+#define DO1(buf) crc = crc_table[((int)crc ^ (*buf++)) & 0xff] ^ (crc >> 8);
+#define DO2(buf)  DO1(buf); DO1(buf);
+#define DO4(buf)  DO2(buf); DO2(buf);
+#define DO8(buf)  DO4(buf); DO4(buf);
+
+/* ========================================================================= */
+uLong ZEXPORT crc32(uLong crc, const Bytef *buf, uInt len)
+{
+#ifdef DYNAMIC_CRC_TABLE
+    if (crc_table_empty)
+      make_crc_table();
+#endif
+    crc = crc ^ 0xffffffffL;
+    while (len >= 8)
+    {
+      DO8(buf);
+      len -= 8;
+    }
+    if (len) do {
+      DO1(buf);
+    } while (--len);
+    return crc ^ 0xffffffffL;
+}
+
+#if (CONFIG_COMMANDS & CFG_CMD_JFFS2)
+
+/* No ones complement version. JFFS2 (and other things ?)
+ * don't use ones compliment in their CRC calculations.
+ */
+uLong ZEXPORT crc32_no_comp(uLong crc, const Bytef *buf, uInt len)
+{
+#ifdef DYNAMIC_CRC_TABLE
+    if (crc_table_empty)
+      make_crc_table();
+#endif
+    while (len >= 8)
+    {
+      DO8(buf);
+      len -= 8;
+    }
+    if (len) do {
+      DO1(buf);
+    } while (--len);
+
+    return crc;
+}
+
+#endif  /* CFG_CMD_JFFS2 */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/debug.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/debug.c
new file mode 100644
index 000000000000..dc1b1ccfc70a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/debug.c
@@ -0,0 +1,60 @@
+/*
+ * debug.c
+ * firmware upgrade debug switch control
+ */
+
+#include <unistd.h>
+#include <fcntl.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <ctype.h>
+#include <string.h>
+#include <dirent.h>
+#include <ctype.h>
+#include <debug.h>
+
+int is_debug_on = DEBUG_IGNORE;
+
+/*
+ * firmware_upgrade_debug
+ * function: Debug switch
+ * Parses the file "/var/tmp/.firmware_upgrade_debug" and returns the corresponding debug level
+ * return:off--DEBUG_OFF,  app debug on---DEBUG_APP_ON, kernel debug on--DEBUG_KERN_ON,
+ *        all debug on--DEBUG_ALL_ON, other--DEBUG_IGNORE
+ */
+int firmware_upgrade_debug(void)
+{
+    int size;
+    FILE *fp;
+    char debug_info[DEBUG_INFO_LEN];
+
+    fp = fopen(DEBUG_FILE, "r");
+    if (fp == NULL) {
+        return DEBUG_IGNORE;
+    }
+
+    mem_clear(debug_info, DEBUG_INFO_LEN);
+    size = fread(debug_info, DEBUG_INFO_LEN - 1, 1, fp);
+    if (size < 0) {
+        fclose(fp);
+        return DEBUG_IGNORE;
+    }
+
+    if (strncmp(debug_info, DEBUG_ON_INFO, 1) == 0) {
+        fclose(fp);
+        return DEBUG_APP_ON;
+    }
+
+    if (strncmp(debug_info, DEBUG_ON_ALL, 1) == 0) {
+        fclose(fp);
+        return DEBUG_ALL_ON;
+    }
+
+    if (strncmp(debug_info, DEBUG_OFF_INFO, 1) == 0) {
+        fclose(fp);
+        return DEBUG_OFF;
+    }
+
+    fclose(fp);
+    return DEBUG_IGNORE;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/firmware_app.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/firmware_app.c
new file mode 100644
index 000000000000..ecdc37ef350f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/firmware_app.c
@@ -0,0 +1,985 @@
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <errno.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <ctype.h>
+#include <string.h>
+#include <dirent.h>
+#include <linux/version.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <signal.h>
+#include <firmware_app.h>
+
+int header_offset;
+
+static firmware_file_name_t firmware_file_str[] = {
+    {"VME",             FIRMWARE_VME},
+    {"ISC",             FIRMWARE_ISC},
+    {"JBI",             FIRMWARE_JBI},
+    {"SPI-LOGIC-DEV",   FIRMWARE_SPI_LOGIC_DEV},
+    {"SYSFS",           FIRMWARE_SYSFS_DEV},
+    {"MTD",             FIRMWARE_MTD},
+};
+
+/**
+ * firmware_error_type
+ * function:set error code
+ * @action: param[in]  The stage where the error occurs
+ * @info: param[in] Upgrade file information
+ * return value: error code
+ */
+int firmware_error_type(int action, name_info_t *info)
+{
+    if (info == NULL) {
+        return ERR_FW_UPGRADE;
+    }
+
+    if((info->type <= FIRMWARE_UNDEF_TYPE) || (info->type > FIRMWARE_OTHER)) {
+        return ERR_FW_UPGRADE;
+    }
+
+    if (info->type == FIRMWARE_CPLD) {
+        switch (action) {
+        case FIRMWARE_ACTION_CHECK:
+            return ERR_FW_CHECK_CPLD_UPGRADE;
+        case FIRMWARE_ACTION_MATCH:
+            return ERR_FW_MATCH_CPLD_UPGRADE;
+        case FIRMWARE_ACTION_VERCHECK:
+            return ERR_FW_SAMEVER_CPLD_UPGRADE;
+        case FIRMWARE_ACTION_UPGRADE:
+            return ERR_FW_DO_CPLD_UPGRADE;
+        case FIRMWARE_ACTION_SUPPORT:
+            return ERR_FW_DO_UPGRADE_NOT_SUPPORT;
+        default:
+            return ERR_FW_UPGRADE;
+        }
+    } else if (info->type == FIRMWARE_FPGA) {
+        switch (action) {
+        case FIRMWARE_ACTION_CHECK:
+            return ERR_FW_CHECK_FPGA_UPGRADE;
+        case FIRMWARE_ACTION_MATCH:
+            return ERR_FW_MATCH_FPGA_UPGRADE;
+        case FIRMWARE_ACTION_VERCHECK:
+            return ERR_FW_SAMEVER_FPGA_UPGRADE;
+        case FIRMWARE_ACTION_UPGRADE:
+            return ERR_FW_DO_FPGA_UPGRADE;
+        case FIRMWARE_ACTION_SUPPORT:
+            return ERR_FW_DO_UPGRADE_NOT_SUPPORT;
+        default:
+            return ERR_FW_UPGRADE;
+        }
+    } else {
+        switch (action) {
+        case FIRMWARE_ACTION_CHECK:
+            return ERR_FW_CHECK_UPGRADE;
+        case FIRMWARE_ACTION_MATCH:
+            return ERR_FW_MATCH_UPGRADE;
+        case FIRMWARE_ACTION_VERCHECK:
+            return ERR_FW_SAMEVER_UPGRADE;
+        case FIRMWARE_ACTION_UPGRADE:
+            return ERR_FW_DO_UPGRADE;
+        case FIRMWARE_ACTION_SUPPORT:
+            return ERR_FW_DO_UPGRADE_NOT_SUPPORT;
+        default:
+            return ERR_FW_UPGRADE;
+        }
+    }
+
+}
+
+/*
+ * firmware_check_file_info
+ * function:Check the file information to determine that the file is available for use on the device
+ * @info: param[in] Upgrade file information
+ * @main_type : param[in] main type
+ * @sub_type : param[in] sub type
+ * @slot : param[in] 0--main, sub slot starts at 1
+ * return value : success--FIRMWARE_SUCCESS, other fail return error code
+ */
+static int firmware_check_file_info(name_info_t *info, int main_type, int sub_type, int slot)
+{
+    int i;
+
+    dbg_print(is_debug_on, "Check file info.\n");
+    /* Check the mainboard type */
+    for (i = 0; i < MAX_DEV_NUM; i++) {
+        if (main_type == info->card_type[i]) {
+            dbg_print(is_debug_on, "main type is 0x%x \n", main_type);
+            break;
+        }
+    }
+    if (i == MAX_DEV_NUM) {
+        dbg_print(is_debug_on, "Error: The main type[0x%x] is not matched \n", main_type);
+        return firmware_error_type(FIRMWARE_ACTION_MATCH, info);
+    }
+
+    /* Check the sub board type, if firwmare upgrade sub board, then sub_type must be 0 */
+    for (i = 0; i < MAX_DEV_NUM; i++) {
+        if (sub_type == info->sub_type[i]) {
+            dbg_print(is_debug_on, "sub type is 0x%x \n", sub_type);
+            break;
+        }
+    }
+    if (i == MAX_DEV_NUM) {
+        dbg_print(is_debug_on, "Error: The sub type[0x%x] is not matched \n", sub_type);
+        return firmware_error_type(FIRMWARE_ACTION_MATCH, info);
+    }
+
+    /* if firwmare upgrade main board,  then sub_type must be 0 and slot must be 0
+    * if firwmare upgrade sub board, then sub_type must not be 0 and slot must not be 0 */
+    if (((sub_type != 0) && (slot < 1)) || ((sub_type == 0) && (slot != 0))) {
+        dbg_print(is_debug_on, "Error: The sub type[0x%x] is not match slot %d error.\n", sub_type, slot);
+        return firmware_error_type(FIRMWARE_ACTION_MATCH, info);
+    }
+
+    dbg_print(is_debug_on, "Success check file info.\n");
+
+    return FIRMWARE_SUCCESS;
+}
+
+/*
+ * firmware_get_dev_file_name
+ * function:Gets the name of the device file
+ * @info: param[in] Upgrade file information
+ * @len:  param[in] Device file name length
+ * @file_name: param[out] Device file name
+ */
+static int firmware_get_dev_file_name(name_info_t *info, char *file_name, int len)
+{
+    int ret;
+
+    ret = FIRMWARE_SUCCESS;
+    switch(info->file_type) {
+    case FIRMWARE_VME:
+        snprintf(file_name, len, "/dev/firmware_cpld_ispvme%d", info->chain);
+        break;
+    case FIRMWARE_ISC:
+    case FIRMWARE_JBI:
+        snprintf(file_name, len, "/dev/firmware_cpld%d", info->chain);
+        break;
+    case FIRMWARE_SPI_LOGIC_DEV:
+    case FIRMWARE_SYSFS_DEV:
+    case FIRMWARE_MTD:
+        snprintf(file_name, len, "/dev/firmware_sysfs%d", info->chain);
+        break;
+    default:
+        ret = FIRMWARE_FAILED;
+        break;
+    }
+
+    return ret;
+ }
+
+/**
+ * firmware_check_chip_verison
+ * function: Check chip version
+ * @fd:   param[in] Device file descriptor
+ * @info: param[in] Upgrade file information
+ * return value : success--FIRMWARE_SUCCESS, other fail return error code
+ */
+int firmware_check_chip_verison(int fd, name_info_t *info)
+{
+    int ret;
+    cmd_info_t cmd_info;
+    char version[FIRMWARE_NAME_LEN + 1];
+
+    dbg_print(is_debug_on, "Check chip version.\n");
+    mem_clear(version, FIRMWARE_NAME_LEN);
+    cmd_info.size = FIRMWARE_NAME_LEN;
+    cmd_info.data = (void *) version;
+
+    /* Ignore version checking */
+    if (strncmp("v", info->version, 1) == 0) {
+        dbg_print(is_debug_on, "Skip check chip version.\n");
+        return FIRMWARE_SUCCESS;
+    }
+
+    /* Get the program version from the device file */
+    ret = ioctl(fd, FIRMWARE_GET_VERSION, &cmd_info);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Error: Failed to get version(chain %d, version %s).\n",
+                    info->chain, info->version);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, NULL);
+    }
+    dbg_print(is_debug_on, "Chip verion: %s, file chip verion: %s.\n", version, info->version);
+
+    /* The device version is the same and does not upgrade */
+    if (strcmp(version, info->version) == 0) {
+        dbg_print(is_debug_on, "the file program version is same as the firmware version %s \n",
+                    info->version);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+    dbg_print(is_debug_on, "Check version pass.\n");
+
+    return FIRMWARE_SUCCESS;
+}
+
+/*
+ * firmware_get_file_size
+ * function: Gets the upgrade file size
+ * @file_name: param[in]  Upgrade file name
+ * @size: param[out] Upgrade file size
+ * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+static int firmware_get_file_size(char *file_name, uint32_t *size)
+{
+    int ret;
+    struct stat buf;
+
+    ret = stat(file_name, &buf);
+    if (ret < 0) {
+        return FIRMWARE_FAILED;
+    }
+
+    if (buf.st_size < 0 || buf.st_size - header_offset < 0) {
+        return FIRMWARE_FAILED;
+    }
+    /* Remove the upgrade file header information to actually upgrade the content size */
+    *size = buf.st_size - header_offset;
+
+    return FIRMWARE_SUCCESS;
+}
+
+/*
+ * firmware_get_file_info
+ * function: Gets the contents of the upgrade file
+ * @file_name: param[in]   Upgrade file name
+ * @size:  param[in]  Upgrade file size
+ * @buf:   param[out] Upgrade the file content
+ * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+static int firmware_get_file_info(char *file_name, uint8_t *buf, uint32_t size)
+{
+    FILE *fp;
+    int len;
+    int ret;
+
+    fp = fopen(file_name, "r");
+    if (fp == NULL) {
+        return FIRMWARE_FAILED;
+    }
+    /* Removes the contents of the upgrade file header information */
+    ret = fseek(fp, header_offset, SEEK_SET);
+    if (ret < 0) {
+        fclose(fp);
+        return FIRMWARE_FAILED;
+    }
+
+    len = fread(buf, size, 1, fp);
+    if (len < 0) {
+        fclose(fp);
+        return FIRMWARE_FAILED;
+    }
+    fclose(fp);
+
+    return FIRMWARE_SUCCESS;
+}
+
+/*
+* firmware_upgrade
+* function: firmware upgrade
+* @file_name:   param[in] Upgrade file name
+* @info:        param[in] Upgrade file information
+* return value : success--FIRMWARE_SUCCESS, other fail return error code
+*/
+static int firmware_upgrade(char *file_name, name_info_t *info)
+{
+    int ret;
+    int fd;
+    uint32_t upg_size;
+    uint8_t *upg_buf;
+    char dev_file_name[FIRMWARE_NAME_LEN];
+    unsigned long crc;
+
+    dbg_print(is_debug_on, "Upgrade firmware: %s.\n", file_name);
+    mem_clear(dev_file_name, FIRMWARE_NAME_LEN);
+    ret = firmware_get_dev_file_name(info, dev_file_name, FIRMWARE_NAME_LEN - 1);
+    if (ret != FIRMWARE_SUCCESS) {
+        dbg_print(is_debug_on, "Error: Failed to get dev file name.\n");
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+
+    fd = open(dev_file_name, O_RDWR);
+    if (fd < 0) {
+        dbg_print(is_debug_on, "Error: Failed to open %s.\n", dev_file_name);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+
+#if 0
+    /* check chip name */
+    ret = firmware_check_chip_name(fd, info);
+    if (ret != FIRMWARE_SUCCESS) {
+        dbg_print(is_debug_on, "Error: Failed to check chip name: %s.\n", dev_file_name);
+        close(fd);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+#endif
+
+    /* Check chip version */
+    ret = firmware_check_chip_verison(fd, info);
+    if (ret != FIRMWARE_SUCCESS) {
+        dbg_print(is_debug_on, "Error: Failed to check chip version: %s.\n", dev_file_name);
+        close(fd);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+
+    /* Gets the upgrade file size */
+    ret = firmware_get_file_size(file_name, &upg_size);
+    if (ret != FIRMWARE_SUCCESS) {
+        dbg_print(is_debug_on, "Error: Failed to get file size: %s.\n", file_name);
+        close(fd);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+
+    if (upg_size == 0) {
+        dbg_print(is_debug_on, "Error: The upgrade file is empty \n");
+        close(fd);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+
+    upg_buf = (uint8_t *) malloc(upg_size + 1);
+    if (upg_buf == NULL) {
+        dbg_print(is_debug_on, "Error: Failed to malloc memory for upgrade file info: %s.\n",
+                  dev_file_name);
+        close(fd);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+
+    /* Gets the contents of the upgrade file */
+    mem_clear(upg_buf, upg_size + 1);
+    ret = firmware_get_file_info(file_name, upg_buf, upg_size);
+    if (ret != FIRMWARE_SUCCESS) {
+        dbg_print(is_debug_on, "Error: Failed to read file info: %s.\n", file_name);
+        free(upg_buf);
+        close(fd);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+
+    /* file crc32 check */
+    crc = crc32(0, (const unsigned char *)upg_buf, (unsigned int)upg_size);
+    if (crc != info->crc32) {
+        dbg_print(is_debug_on, "Error: Failed to check file crc: %s.\n", file_name);
+        dbg_print(is_debug_on, "the crc value is : %#08x.\n", (unsigned int)crc);
+        free(upg_buf);
+        close(fd);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+
+    dbg_print(is_debug_on, "Start upgrading firmware, wait...\n");
+
+    /* Start firmware upgrade */
+    switch (info->file_type) {
+    case FIRMWARE_VME:
+        dbg_print(is_debug_on, "start to ispvme upgrade: %s.\n", file_name);
+        ret = firmware_upgrade_ispvme(fd, file_name, info);
+        break;
+    case FIRMWARE_ISC:
+    case FIRMWARE_JBI:
+        dbg_print(is_debug_on, "start to upgrade: %s.\n", file_name);
+        ret = firmware_upgrade_jtag(fd, upg_buf, upg_size, info);
+        break;
+    case FIRMWARE_SPI_LOGIC_DEV:
+        dbg_print(is_debug_on, "start to spi logic dev upgrade: %s.\n", file_name);
+        ret = firmware_upgrade_spi_logic_dev(fd, upg_buf, upg_size, info);
+        break;
+    case FIRMWARE_SYSFS_DEV:
+        dbg_print(is_debug_on, "start to sysfs upgrade: %s.\n", file_name);
+        ret = firmware_upgrade_sysfs(fd, upg_buf, upg_size, info);
+        break;
+    case FIRMWARE_MTD:
+        dbg_print(is_debug_on, "start to mtd device upgrade: %s.\n", file_name);
+        ret = firmware_upgrade_mtd(fd, upg_buf, upg_size, info);
+        break;
+    default:
+        dbg_print(is_debug_on, "Error: file type is not support: %s.\n", file_name);
+        free(upg_buf);
+        close(fd);
+        return firmware_error_type(FIRMWARE_ACTION_UPGRADE, info);
+    }
+
+    dbg_print(is_debug_on, "Completed.\n");
+    if (ret != FIRMWARE_SUCCESS) {
+        dbg_print(is_debug_on, "Error: Failed to upgrade: %s.\n", dev_file_name);
+        free(upg_buf);
+        close(fd);
+        return firmware_error_type(FIRMWARE_ACTION_UPGRADE, info);
+    }
+
+    free(upg_buf);
+    close(fd);
+
+    return FIRMWARE_SUCCESS;
+}
+
+/*
+* firmware_upgrade_test
+* function: firmware upgrade test
+* @file_name:   param[in] Upgrade file name
+* @info:        param[in] Upgrade file information
+* return value : success--FIRMWARE_SUCCESS, other fail return error code
+*/
+static int firmware_upgrade_test(char *file_name, name_info_t *info)
+{
+    int ret;
+    int fd;
+    uint32_t upg_size;
+    uint8_t *upg_buf;
+    char dev_file_name[FIRMWARE_NAME_LEN];
+    unsigned long crc;
+
+    dbg_print(is_debug_on, "Upgrade firmware test: %s.\n", file_name);
+    mem_clear(dev_file_name, FIRMWARE_NAME_LEN);
+    ret = firmware_get_dev_file_name(info, dev_file_name, FIRMWARE_NAME_LEN - 1);
+    if (ret != FIRMWARE_SUCCESS) {
+        dbg_print(is_debug_on, "Error: Failed to get dev file name.\n");
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+
+    fd = open(dev_file_name, O_RDWR);
+    if (fd < 0) {
+        dbg_print(is_debug_on, "Error: Failed to open %s.\n", dev_file_name);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+
+#if 0
+    /* check chip name */
+    ret = firmware_check_chip_name(fd, info);
+    if (ret != FIRMWARE_SUCCESS) {
+        dbg_print(is_debug_on, "Error: Failed to check chip name: %s.\n", dev_file_name);
+        close(fd);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+#endif
+
+    /* Check chip version */
+    ret = firmware_check_chip_verison(fd, info);
+    if (ret != FIRMWARE_SUCCESS) {
+        dbg_print(is_debug_on, "Error: Failed to check chip version: %s.\n", dev_file_name);
+        close(fd);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+
+    /* Gets the upgrade file size */
+    ret = firmware_get_file_size(file_name, &upg_size);
+    if (ret != FIRMWARE_SUCCESS) {
+        dbg_print(is_debug_on, "Error: Failed to get file size: %s.\n", file_name);
+        close(fd);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+
+    upg_buf = (uint8_t *) malloc(upg_size + 1);
+    if (upg_buf == NULL) {
+        dbg_print(is_debug_on, "Error: Failed to malloc memory for upgrade file info: %s.\n",
+                  dev_file_name);
+        close(fd);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+
+    /* Gets the contents of the upgrade file */
+    mem_clear(upg_buf, upg_size + 1);
+    ret = firmware_get_file_info(file_name, upg_buf, upg_size);
+    if (ret != FIRMWARE_SUCCESS) {
+        dbg_print(is_debug_on, "Error: Failed to read file info: %s.\n", file_name);
+        free(upg_buf);
+        close(fd);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+
+    /* file crc32 check */
+    crc = crc32(0, (const unsigned char *)upg_buf, (unsigned int)upg_size);
+    if (crc != info->crc32) {
+        dbg_print(is_debug_on, "Error: Failed to check file crc: %s.\n", file_name);
+        dbg_print(is_debug_on, "the crc value is : %#08x.\n", (unsigned int)crc);
+        free(upg_buf);
+        close(fd);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+
+    dbg_print(is_debug_on, "Start upgrading firmware test, wait...\n");
+
+    /* Start firmware upgrade */
+    switch (info->file_type) {
+    case FIRMWARE_VME:
+        dbg_print(is_debug_on, "start to ispvme upgrade test: %s.\n", file_name);
+        /* WME upgrade link testing is the same as upgrading, using vme test file. */
+        ret = firmware_upgrade_ispvme(fd, file_name, info);
+        break;
+    case FIRMWARE_ISC:
+    case FIRMWARE_JBI:
+        dbg_print(is_debug_on, "start to upgrade test: %s.\n", file_name);
+        ret = firmware_upgrade_jtag_test(fd, upg_buf, upg_size, info);
+        break;
+    case FIRMWARE_SPI_LOGIC_DEV:
+        dbg_print(is_debug_on, "start to spi logic dev upgrade test: %s.\n", file_name);
+        ret = firmware_upgrade_spi_logic_dev_test(fd,info);
+        break;
+    case FIRMWARE_SYSFS_DEV:
+        dbg_print(is_debug_on, "start to sysfs upgrade test: %s.\n", file_name);
+        ret = firmware_upgrade_sysfs_test(fd, info);
+        break;
+    case FIRMWARE_MTD:
+        dbg_print(is_debug_on, "start to mtd device upgrade test: %s.\n", file_name);
+        ret = firmware_upgrade_mtd_test(fd, info);
+        break;
+    default:
+        dbg_print(is_debug_on, "Error: test file type is not support: %s.\n", file_name);
+        free(upg_buf);
+        close(fd);
+        return firmware_error_type(FIRMWARE_ACTION_UPGRADE, info);
+    }
+
+    if (ret != FIRMWARE_SUCCESS) {
+        dbg_print(is_debug_on, "Error: Failed to upgrade test: %s ret=%d.\n", dev_file_name, ret);
+        free(upg_buf);
+        close(fd);
+        if (ret == FIRMWARE_NOT_SUPPORT) {
+            return firmware_error_type(FIRMWARE_ACTION_SUPPORT, info);
+        } else {
+            return firmware_error_type(FIRMWARE_ACTION_UPGRADE, info);
+        }
+    }
+
+    free(upg_buf);
+    close(fd);
+
+    return FIRMWARE_SUCCESS;
+}
+
+/*
+ * firmware_upgrade_file_type_map
+ * function:Gets the corresponding upgrade file type from the upgrade file type list
+ * @value : param[in] file type name
+ * return value : file type, firmware_file_type_t
+ */
+static firmware_file_type_t firmware_upgrade_file_type_map(char *type_str)
+{
+    int type_num;
+    int i;
+
+    type_num = (sizeof(firmware_file_str) /sizeof(firmware_file_str[0]));
+    for (i = 0; i < type_num; i++) {
+        if (!strncmp(firmware_file_str[i].firmware_file_name_str, type_str,
+                strlen(firmware_file_str[i].firmware_file_name_str))) {
+            return firmware_file_str[i].firmware_file_type;
+        }
+    }
+
+    dbg_print(is_debug_on, "firmware file type unknown\n");
+    return FIRMWARE_NONE;
+}
+
+/*
+ * firmware_upgrade_parse_kv
+ * function:Parses the header information of the upgrade file based on the key and value
+ * @key: param[in] key
+ * @value : param[in] value
+ * @info : param[out]  Upgrade file information
+ * return value : success--FIRMWARE_SUCCESS, other fail return error code
+ */
+static int firmware_upgrade_parse_kv(const char *key, const char *value, name_info_t *info)
+{
+    int i;
+    if (key == NULL || value == NULL) {
+        dbg_print(is_debug_on, "Error: failed to get ther key or value.\n");
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    } else if (strcmp(key, FILEHEADER_DEVTYPE) == 0) {
+        /* main board type */
+        for (i = 0; i < MAX_DEV_NUM && info->card_type[i]; i++);
+        if (i == MAX_DEV_NUM) {
+            dbg_print(is_debug_on, "Error: card type is full for %s. \n", value);
+            return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+        }
+        info->card_type[i] = strtoul(value, NULL, 0);
+    } else if (strcmp(key, FILEHEADER_SUBTYPE) == 0) {
+        /* sub board type */
+        for (i = 0; i < MAX_DEV_NUM && info->sub_type[i]; i++);
+        if (i == MAX_DEV_NUM) {
+            dbg_print(is_debug_on, "Error: sub type is full for %s. \n", value);
+            return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+        }
+        info->sub_type[i] = strtoul(value, NULL, 0);
+    } else if (strcmp(key, FILEHEADER_TYPE) == 0) {
+        /* Device type */
+        if (strcmp(value, FIRMWARE_CPLD_NAME) == 0) {
+            info->type = FIRMWARE_CPLD;
+        } else if (strcmp(value, FIRMWARE_FPGA_NAME) == 0) {
+            info->type = FIRMWARE_FPGA;
+        } else {
+            info->type = FIRMWARE_OTHER;
+        }
+    } else if (strcmp(key, FILEHEADER_CHAIN) == 0) {
+        /* link num */
+        info->chain = strtoul(value, NULL, 10);
+    } else if (strcmp(key, FILEHEADER_CHIPNAME) == 0) {
+        /* chip name */
+        if (strlen(value) >= FIRMWARE_NAME_LEN) {
+            dbg_print(is_debug_on, "Error: '%s' is too long for a chipname.\n", value);
+            return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+        }
+        mem_clear(info->chip_name, sizeof(info->chip_name));
+         snprintf(info->chip_name, sizeof(info->chip_name) - 1, "%s", value);
+    } else if (strcmp(key, FILEHEADER_VERSION) == 0) {
+        /* version */
+        if (strlen(value) >= FIRMWARE_NAME_LEN) {
+            dbg_print(is_debug_on, "Error: '%s' is too long for a version.\n", value);
+            return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+        }
+        mem_clear(info->version, sizeof(info->version));
+        snprintf(info->version, sizeof(info->version) - 1, "%s", value);
+    } else if (strcmp(key, FILEHEADER_FILETYPE) == 0) {
+        /* file type */
+        info->file_type = firmware_upgrade_file_type_map((char *)value);
+    } else if (strcmp(key, FILEHEADER_CRC) == 0) {
+        /* file crc32 */
+        info->crc32 = strtoul(value, NULL, 0);
+    } else {
+        dbg_print(is_debug_on, "Warning: key '%s' is unknown. Continue anyway.\n", key);
+        return FIRMWARE_SUCCESS;
+    }
+    dbg_print(is_debug_on, "key %s is matched.\n", key);
+    return FIRMWARE_SUCCESS;
+ }
+
+/*
+ * firmware_upgrade_parse_check
+ * function:Check the results of header parsing
+ * @file_name: Upgrade file name
+ * @info : Upgrade file information
+ * return value : success--FIRMWARE_SUCCESS, other fail return error code
+ */
+static int firmware_upgrade_parse_check(char *file_name, name_info_t *info)
+{
+    int i;
+    if (info->card_type[0] == 0) {
+        dbg_print(is_debug_on, "Error: %s card type is missing.\n", file_name);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+    if ((info->type <= FIRMWARE_UNDEF_TYPE) || (info->type > FIRMWARE_OTHER)) {
+        dbg_print(is_debug_on, "Error: %s type is unknown.\n", file_name);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+    if (strlen(info->chip_name) == 0) {
+        dbg_print(is_debug_on, "Error: %s chip_name is empty.\n", file_name);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+    if (strlen(info->version) == 0) {
+        dbg_print(is_debug_on, "Error: %s version is empty.\n", file_name);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+    if ((info->file_type <= FIRMWARE_UNDEF_FILE_TYPE) || (info->file_type > FIRMWARE_NONE)) {
+        dbg_print(is_debug_on, "Error: %s file type is unknown.\n", file_name);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+    dbg_print(is_debug_on, "The file header parse:(%s) \n" , file_name);
+    dbg_print(is_debug_on, "    card type: ");
+    for (i = 0; i < MAX_DEV_NUM && info->card_type[i]; i++){
+        dbg_print(is_debug_on, "0x%x, ", info->card_type[i]);
+     }
+    dbg_print(is_debug_on, "\n"
+                           "    sub type : ");
+    for (i = 0; i < MAX_DEV_NUM && info->sub_type[i]; i++){
+        dbg_print(is_debug_on, "0x%x, ", info->sub_type[i]);
+    }
+    dbg_print(is_debug_on, "\n"
+                           "    type     : %d, \n"
+                           "    chain     : %d, \n"
+                           "    chip name: %s \n"
+                           "    version  : %s \n"
+                           "    file type: %d \n"
+                           "    the crc32 value: %#x \n",
+    info->type, info->chain, info->chip_name, info->version, info->file_type, info->crc32);
+    return FIRMWARE_SUCCESS;
+}
+
+/*
+ * firmware_upgrade_read_header
+ * function:Read the header information of the upgrade file
+ * @file_name: param[in] Upgrade file name
+ * @info : param[out]  Upgrade file information
+ * return value : success--FIRMWARE_SUCCESS, other fail return error code
+ */
+static int firmware_upgrade_read_header( char *file_name, name_info_t *info)
+{
+    FILE *fp;
+    char *charp;
+    char *charn;
+    char header_buffer[MAX_HEADER_SIZE];
+    char header_key[MAX_HEADER_KV_SIZE];
+    char header_var[MAX_HEADER_KV_SIZE];
+    int ret;
+    int len;
+
+    fp = fopen(file_name, "r");
+    if (fp == NULL) {
+        dbg_print(is_debug_on, "Error: Failed to open file: %s. \n", file_name);
+        perror("fopen");
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+
+    mem_clear(header_buffer, sizeof(header_buffer));
+    len = fread(header_buffer, MAX_HEADER_SIZE - 1, 1, fp);
+    fclose(fp);
+    if (len < 0) {
+        dbg_print(is_debug_on, "Error: Failed to read header : %s. \n", file_name);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+    header_buffer[MAX_HEADER_SIZE - 1] = 0;
+
+    charp = strstr(header_buffer, "FILEHEADER(\n");
+    if (charp == NULL) {
+        dbg_print(is_debug_on, "Error: The file format %s is wrong. \n",  file_name);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+    charp += strlen("FILEHEADER(\n");
+
+    dbg_print(is_debug_on, "File parse start.\n");
+    mem_clear(info, sizeof(name_info_t));
+    ret = 0;
+    charn = charp;
+    mem_clear(header_key, sizeof(header_key));
+    while (*charn != ')') {
+        charn = strpbrk(charp, "=,)\n");
+        if (charn == NULL) {
+            dbg_print(is_debug_on, "Error: The parser can't find mark.\n");
+            return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+        }
+        if (charn - charp >= MAX_HEADER_KV_SIZE) {
+            dbg_print(is_debug_on, "Error: The parser find a overflow mark.\n");
+            return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+        }
+        switch (*charn) {
+        case '=':
+            mem_clear(header_key, sizeof(header_key));
+            memcpy(header_key, charp, charn - charp);
+            break;
+        case '\n':
+        case ',':
+            mem_clear(header_var, sizeof(header_var));
+            memcpy(header_var, charp, charn - charp);
+            dbg_print(is_debug_on, "Parser: %s = %s .\n", header_key, header_var);
+            firmware_upgrade_parse_kv(header_key, header_var, info);
+            break;
+        case ')':
+            break;
+        default:
+            dbg_print(is_debug_on, "Error: The parser get unexpected mark '%c(0x%02X)'.\n", *charn, *charn);
+            return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+        }
+        charp = (charn + 1);
+    }
+
+    ret = firmware_upgrade_parse_check(file_name, info);
+    if (ret != FIRMWARE_SUCCESS) {
+        return FIRMWARE_FAILED;
+    }
+
+    header_offset = charp + 1 - header_buffer; /* charp at '\n' */
+    dbg_print(is_debug_on,"the header offset is  %d \n", header_offset);
+    return FIRMWARE_SUCCESS;
+}
+
+/*
+ * firmware_upgrade_one_file
+ * function: upgrade file
+ * @file_name: Upgrade file name
+ * @main_type: main board type
+ * @sub_type:  sub board type
+ * @slot: 0--main, sub slot starts at 1
+ * return value : success--FIRMWARE_SUCCESS, other fail return error code
+ */
+static int firmware_upgrade_one_file(char *file_name, int main_type, int sub_type, int slot)
+{
+    int ret;
+    name_info_t info;
+
+    if ((slot < 0) || (file_name == NULL)) {
+        dbg_print(is_debug_on, "Failed firmware_upgrade_one_file parameter err.\n");
+        return FIRMWARE_FAILED;
+    }
+
+    dbg_print(is_debug_on, "firmware upgrade %s 0x%x 0x%x %d\n", file_name, main_type, sub_type, slot);
+    /* Read the header information of the upgrade file */
+    ret = firmware_upgrade_read_header(file_name, &info);
+    if (ret != FIRMWARE_SUCCESS) {
+        dbg_print(is_debug_on, "Failed to get file header: %s\n", file_name);
+        return ret;
+    }
+
+    /* Check the file information to determine that the file is available for use on the device */
+    ret = firmware_check_file_info(&info, main_type, sub_type, slot);
+    if (ret != FIRMWARE_SUCCESS) {
+        dbg_print(is_debug_on, "File is not match with the device: %s.\n", file_name);
+        return ret;
+    }
+
+    /* The link number corresponding to the upgrade file is calculated based on the slot number.
+       16 links are reserved for each slot. main boade slot is 0. */
+    info.chain += slot * FIRMWARE_SLOT_MAX_NUM;
+    ret = firmware_upgrade(file_name, &info);
+    if (ret != FIRMWARE_SUCCESS) {
+        dbg_print(is_debug_on, "Failed to upgrade: %s.\n", file_name);
+        return ret;
+    }
+
+    return FIRMWARE_SUCCESS;
+}
+
+/*
+ * firmware_upgrade_file_test
+ * function: upgrade file
+ * @file_name: Upgrade file name
+ * @main_type: main board type
+ * @sub_type:  sub board type
+ * @slot: 0--main, sub slot starts at 1
+ * return value : success--FIRMWARE_SUCCESS, other fail return error code
+ */
+static int firmware_upgrade_file_test(char *file_name, int main_type, int sub_type, int slot)
+{
+    int ret;
+    name_info_t info;
+
+    if ((slot < 0) || (file_name == NULL)) {
+        dbg_print(is_debug_on, "Failed firmware_upgrade_one_file parameter err.\n");
+        return FIRMWARE_FAILED;
+    }
+
+    dbg_print(is_debug_on, "firmware upgrade %s 0x%x 0x%x %d\n", file_name, main_type, sub_type, slot);
+    /* Read the header information of the upgrade file */
+    ret = firmware_upgrade_read_header(file_name, &info);
+    if (ret != FIRMWARE_SUCCESS) {
+        dbg_print(is_debug_on, "Failed to get file header: %s, ret=%d\n", file_name, ret);
+        return ret;
+    }
+
+    /* Check the file information to determine that the file is available for use on the device */
+    ret = firmware_check_file_info(&info, main_type, sub_type, slot);
+    if (ret != FIRMWARE_SUCCESS) {
+        dbg_print(is_debug_on, "File is not match with the device: %s, ret=%d.\n", file_name, ret);
+        return ret;
+    }
+
+    /* The link number corresponding to the upgrade file is calculated based on the slot number.
+       16 links are reserved for each slot. main boade slot is 0. */
+    info.chain += slot * FIRMWARE_SLOT_MAX_NUM;
+    ret = firmware_upgrade_test(file_name, &info);
+    if (ret != FIRMWARE_SUCCESS) {
+        dbg_print(is_debug_on, "Failed to upgrade: %s, ret=%d\n", file_name, ret);
+        return ret;
+    }
+
+    return FIRMWARE_SUCCESS;
+}
+
+static int firmware_upgrade_data_dump(char *argv[])
+{
+    int ret;
+    uint32_t offset, len;
+
+    /* dump by type */
+    if (strcmp(argv[2], "spi_logic_dev") == 0) {
+        /* usag: firmware_upgrade dump spi_logic_dev dev_path offset size print/record_file_path */
+        offset = strtoul(argv[4], NULL, 0);
+        len = strtoul(argv[5], NULL, 0);
+        /* offset needs align by 256 bytes */
+        if ((offset & 0xff) || (len == 0)) {
+            dbg_print(is_debug_on,"only support offset align by 256 bytes.\n");
+            return FIRMWARE_FAILED;
+        }
+        dbg_print(is_debug_on, "start to dump %s data. offset:0x%x, len:0x%x\n", argv[2], offset, len);
+        ret = firmware_upgrade_spi_logic_dev_dump(argv[3], offset, len, argv[6]);
+    } else {
+        dbg_print(is_debug_on, "Error: %s not support dump data.\n", argv[2]);
+        return FIRMWARE_FAILED;
+    }
+
+    if (ret != FIRMWARE_SUCCESS) {
+        dbg_print(is_debug_on, "Failed to dump %s data. ret:%d\n", argv[3], ret);
+        return FIRMWARE_FAILED;
+    }
+
+    return FIRMWARE_SUCCESS;
+}
+
+int main(int argc, char *argv[])
+{
+    int ret;
+    int main_type, sub_type, slot;
+
+    is_debug_on = firmware_upgrade_debug();
+
+    signal(SIGTERM, SIG_IGN);   /* ignore kill signal */
+    signal(SIGINT, SIG_IGN);    /* ignore ctrl+c signal */
+    signal(SIGTSTP, SIG_IGN);   /* ignore ctrl+z signal */
+
+    if ((argc != 5) && (argc != 6) && (argc != 7)) {
+        printf("Use:\n");
+        printf(" upgrade file : firmware_upgrade file main_type sub_type slot\n");
+        printf(" upgrade test : firmware_upgrade test file main_type sub_type slot\n");
+        printf(" spi_logic_dev dump : firmware_upgrade dump spi_logic_dev dev_path offset size print/record_file_path\n");
+        dbg_print(is_debug_on, "Failed to upgrade the number of argv: %d.\n", argc);
+        return ERR_FW_UPGRADE;
+    }
+
+    if (argc == 5) {
+        main_type = strtoul(argv[2], NULL, 16);
+        sub_type = strtoul(argv[3], NULL, 16);
+        slot = strtoul(argv[4], NULL, 10);
+        printf("+================================+\n");
+        printf("|Begin to upgrade, please wait...|\n");
+        ret = firmware_upgrade_one_file(argv[1], main_type, sub_type, slot);
+        if (ret != FIRMWARE_SUCCESS) {
+            dbg_print(is_debug_on, "Failed to upgrade a firmware file: %s. (%d)\n", argv[1], ret);
+            printf("|           Upgrade failed!      |\n");
+            printf("+================================+\n");
+            return ret;
+        }
+
+        printf("|          Upgrade succeeded!    |\n");
+        printf("+================================+\n");
+        dbg_print(is_debug_on, "Sucess to upgrade a firmware file: %s.\n", argv[1]);
+        return FIRMWARE_SUCCESS;
+    } else if ((argc == 6) && (strcmp(argv[1], "test") == 0)) {
+        main_type = strtoul(argv[3], NULL, 16);
+        sub_type = strtoul(argv[4], NULL, 16);
+        slot = strtoul(argv[5], NULL, 10);
+        printf("+=====================================+\n");
+        printf("|Begin to upgrade test, please wait...|\n");
+        ret = firmware_upgrade_file_test(argv[2], main_type, sub_type, slot);
+        if (ret == FIRMWARE_SUCCESS) {
+            printf("|       Upgrade test succeeded!       |\n");
+            printf("+=====================================+\n");
+            dbg_print(is_debug_on, "Sucess to upgrade test a firmware file: %s.\n", argv[2]);
+            return FIRMWARE_SUCCESS;
+        } else if (ret == ERR_FW_DO_UPGRADE_NOT_SUPPORT) {
+            dbg_print(is_debug_on, "do not support to upgrade test a firmware file: %s. (%d)\n", argv[2], ret);
+            printf("|     Not support to upgrade test!    |\n");
+            printf("+=====================================+\n");
+            return ret;
+        } else {
+            dbg_print(is_debug_on, "Failed to upgrade test a firmware file: %s. (%d)\n", argv[2], ret);
+            printf("|         Upgrade test failed!        |\n");
+            printf("+=====================================+\n");
+            return ret;
+        }
+    } else if (strcmp(argv[1], "dump") == 0) {
+        /* print device data */
+        ret = firmware_upgrade_data_dump(argv);
+        if (ret == FIRMWARE_SUCCESS) {
+            printf("dump data succeeded.\n");
+            return FIRMWARE_SUCCESS;
+        } else {
+            printf("dump data failed. ret:%d\n", ret);
+            return ret;
+        }
+    }
+
+    printf("+=================+\n");
+    printf("|  UPGRADE FAIL!  |\n");
+    printf("+=================+\n");
+
+    return ERR_FW_UPGRADE;
+ }
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/hardware.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/hardware.c
new file mode 100644
index 000000000000..c43c9095fda6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/hardware.c
@@ -0,0 +1,263 @@
+/*********************************************************************************
+* Lattice Semiconductor Corp. Copyright 2000-2008
+*
+* This is the hardware.c of ispVME V12.1 for JTAG programmable devices.
+* All the functions requiring customization are organized into this file for
+* the convinience of porting.
+*********************************************************************************/
+/*********************************************************************************
+* Revision History:
+*
+* 09/11/07 NN Type cast mismatch variables
+* 09/24/07 NN Added calibration function.
+*             Calibration will help to determine the system clock frequency
+*             and the count value for one micro-second delay of the target
+*             specific hardware.
+*             Modified the ispVMDelay function
+*             Removed Delay Percent support
+*             Moved the sclock() function from ivm_core.c to hardware.c
+*********************************************************************************/
+
+#include <stdint.h>
+#include <linux/types.h>
+#include <unistd.h>
+#include <stdio.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <sys/ioctl.h>
+#include <firmware_app.h>
+#include <time.h>
+
+/********************************************************************************
+* Declaration of global variables
+*
+*********************************************************************************/
+
+unsigned char  g_siIspPins        = 0x00;   /*Keeper of JTAG pin state*/
+unsigned short g_usInPort         = 0x379;  /*Address of the TDO pin*/
+unsigned short g_usOutPort        = 0x378;  /*Address of TDI, TMS, TCK pin*/
+unsigned short g_usCpu_Frequency  = 1000;   /*Enter your CPU frequency here, unit in MHz.*/
+
+/*********************************************************************************
+* This is the definition of the bit locations of each respective
+* signal in the global variable g_siIspPins.
+*
+* NOTE: Users must add their own implementation here to define
+*       the bit location of the signal to target their hardware.
+*       The example below is for the Lattice download cable on
+*       on the parallel port.
+*
+*********************************************************************************/
+
+#if 0
+const unsigned char g_ucPinTDI          = JTAG_TDI;    /* Bit address of TDI */
+const unsigned char g_ucPinTCK          = JTAG_TCK;    /* Bit address of TCK */
+const unsigned char g_ucPinTMS          = JTAG_TMS;    /* Bit address of TMS */
+const unsigned char g_ucPinENABLE       = JTAG_ENABLE;    /* Bit address of ENABLE */
+const unsigned char g_ucPinTRST         = JTAG_TRST;    /* Bit address of TRST */
+const unsigned char g_ucPinTDO          = JTAG_TDO;    /* Bit address of TDO*/
+#endif
+int g_file_fd = -1;
+/***************************************************************
+*
+* Functions declared in hardware.c module.
+*
+***************************************************************/
+void writePort(unsigned char a_ucPins, unsigned char a_ucValue);
+unsigned char readPort();
+void sclock();
+void ispVMDelay(unsigned short a_usTimeDelay);
+void calibration(void);
+
+/********************************************************************************
+* writePort
+* To apply the specified value to the pins indicated. This routine will
+* be modified for specific systems.
+* As an example, this code uses the IBM-PC standard Parallel port, along with the
+* schematic shown in Lattice documentation, to apply the signals to the
+* JTAG pins.
+*
+* PC Parallel port pin    Signal name           Port bit address
+*        2                g_ucPinTDI             1
+*        3                g_ucPinTCK             2
+*        4                g_ucPinTMS             4
+*        5                g_ucPinENABLE          8
+*        6                g_ucPinTRST            16
+*        10               g_ucPinTDO             64
+*
+*  Parameters:
+*   - a_ucPins, which is actually a set of bit flags (defined above)
+*     that correspond to the bits of the data port. Each of the I/O port
+*     bits that drives an isp programming pin is assigned a flag
+*     (through a #define) corresponding to the signal it drives. To
+*     change the value of more than one pin at once, the flags are added
+*     together, much like file access flags are.
+*
+*     The bit flags are only set if the pin is to be changed. Bits that
+*     do not have their flags set do not have their levels changed. The
+*     state of the port is always manintained in the static global
+*     variable g_siIspPins, so that each pin can be addressed individually
+*     without disturbing the others.
+*
+*   - a_ucValue, which is either HIGH (0x01 ) or LOW (0x00 ). Only these two
+*     values are valid. Any non-zero number sets the pin(s) high.
+*
+*********************************************************************************/
+
+void writePort(unsigned char a_ucPins, unsigned char a_ucValue)
+{
+    switch (a_ucPins) {
+    case JTAG_TCK:
+        ioctl(g_file_fd, FIRMWARE_JTAG_TCK, &a_ucValue);
+        break;
+    case JTAG_TDI:
+        ioctl(g_file_fd, FIRMWARE_JTAG_TDI, &a_ucValue);
+        break;
+    case JTAG_TMS:
+        ioctl(g_file_fd, FIRMWARE_JTAG_TMS, &a_ucValue);
+        break;
+    case JTAG_ENABLE:
+        ioctl(g_file_fd, FIRMWARE_JTAG_EN, &a_ucValue);
+        break;
+    case JTAG_TRST:
+        //ioctl(g_file_fd, FIRMWARE_JTAG_TRST, &a_ucValue);
+        break;
+    default:
+        break;
+    }
+}
+
+/*********************************************************************************
+*
+* readPort
+*
+* Returns the value of the TDO from the device.
+*
+**********************************************************************************/
+unsigned char readPort()
+{
+    unsigned char ucRet = 0;
+
+    ioctl(g_file_fd, FIRMWARE_JTAG_TDO, &ucRet);
+    return (ucRet);
+}
+
+/*********************************************************************************
+* sclock
+*
+* Apply a pulse to TCK.
+*
+* This function is located here so that users can modify to slow down TCK if
+* it is too fast (> 25MHZ). Users can change the IdleTime assignment from 0 to
+* 1, 2... to effectively slowing down TCK by half, quarter...
+*
+*********************************************************************************/
+void sclock()
+{
+    unsigned short IdleTime    = 0; //change to > 0 if need to slow down TCK
+    unsigned short usIdleIndex = 0;
+    IdleTime++;
+    for (usIdleIndex = 0; usIdleIndex < IdleTime; usIdleIndex++) {
+        writePort(JTAG_TCK, 0x01);
+    }
+    for (usIdleIndex = 0; usIdleIndex < IdleTime; usIdleIndex++) {
+        writePort(JTAG_TCK, 0x00);
+    }
+}
+/********************************************************************************
+*
+* ispVMDelay
+*
+*
+* Users must implement a delay to observe a_usTimeDelay, where
+* bit 15 of the a_usTimeDelay defines the unit.
+*      1 = milliseconds
+*      0 = microseconds
+* Example:
+*      a_usTimeDelay = 0x0001 = 1 microsecond delay.
+*      a_usTimeDelay = 0x8001 = 1 millisecond delay.
+*
+* This subroutine is called upon to provide a delay from 1 millisecond to a few
+* hundreds milliseconds each time.
+* It is understood that due to a_usTimeDelay is defined as unsigned short, a 16 bits
+* integer, this function is restricted to produce a delay to 64000 micro-seconds
+* or 32000 milli-second maximum. The VME file will never pass on to this function
+* a delay time > those maximum number. If it needs more than those maximum, the VME
+* file will launch the delay function several times to realize a larger delay time
+* cummulatively.
+* It is perfectly alright to provide a longer delay than required. It is not
+* acceptable if the delay is shorter.
+*
+* Delay function example--using the machine clock signal of the native CPU------
+* When porting ispVME to a native CPU environment, the speed of CPU or
+* the system clock that drives the CPU is usually known.
+* The speed or the time it takes for the native CPU to execute one for loop
+* then can be calculated as follows:
+*       The for loop usually is compiled into the ASSEMBLY code as shown below:
+*       LOOP: DEC RA;
+*             JNZ LOOP;
+*       If each line of assembly code needs 4 machine cycles to execute,
+*       the total number of machine cycles to execute the loop is 2 x 4 = 8.
+*       Usually system clock = machine clock (the internal CPU clock).
+*       Note: Some CPU has a clock multiplier to double the system clock for
+          the machine clock.
+*
+*       Let the machine clock frequency of the CPU be F, or 1 machine cycle = 1/F.
+*       The time it takes to execute one for loop = (1/F ) x 8.
+*       Or one micro-second = F(MHz)/8;
+*
+* Example: The CPU internal clock is set to 100Mhz, then one micro-second = 100/8 = 12
+*
+* The C code shown below can be used to create the milli-second accuracy.
+* Users only need to enter the speed of the cpu.
+*
+**********************************************************************************/
+void ispVMDelay(unsigned short a_usTimeDelay)
+{
+    struct timespec ts;
+
+    if (a_usTimeDelay & 0x8000) {
+        /* milliseconds */
+        a_usTimeDelay &= 0x7FFF;
+        ts.tv_sec  = (long int) (a_usTimeDelay / 1000);
+        ts.tv_nsec = (long int) (a_usTimeDelay % 1000) * 1000000ul;
+    } else {
+        /* microseconds */
+        ts.tv_sec  = 0;
+        ts.tv_nsec = (long int) a_usTimeDelay * 1000ul;
+    }
+
+    nanosleep(&ts, NULL);
+}
+
+/*********************************************************************************
+*
+* calibration
+*
+* It is important to confirm if the delay function is indeed providing
+* the accuracy required. Also one other important parameter needed
+* checking is the clock frequency.
+* Calibration will help to determine the system clock frequency
+* and the loop_per_micro value for one micro-second delay of the target
+* specific hardware.
+*
+**********************************************************************************/
+void calibration(void)
+{
+    /*Apply 2 pulses to TCK.*/
+    writePort(JTAG_TCK, 0x00);
+    writePort(JTAG_TCK, 0x01);
+    writePort(JTAG_TCK, 0x00);
+    writePort(JTAG_TCK, 0x01);
+    writePort(JTAG_TCK, 0x00);
+
+    /*Delay for 1 millisecond. Pass on 1000 or 0x8001 both = 1ms delay.*/
+    ispVMDelay(0x8001);
+
+    /*Apply 2 pulses to TCK*/
+    writePort(JTAG_TCK, 0x01);
+    writePort(JTAG_TCK, 0x00);
+    writePort(JTAG_TCK, 0x01);
+    writePort(JTAG_TCK, 0x00);
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/ispvm_ui.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/ispvm_ui.c
new file mode 100644
index 000000000000..69a8e53852b5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/ispvm_ui.c
@@ -0,0 +1,837 @@
+/**************************************************************
+*
+* Lattice Semiconductor Corp. Copyright 2008
+*
+* ispVME Embedded allows programming of Lattice's suite of FPGA
+* devices on embedded systems through the JTAG port.  The software
+* is distributed in source code form and is open to re - distribution
+* and modification where applicable.
+*
+* ispVME Embedded C Source comprised with 3 modules:
+* ispvm_ui.c is the module provides input and output support.
+* ivm_core.c is the module interpret the VME file(s).
+* hardware.c is the module access the JTAG port of the device(s).
+*
+* The optional module cable.c is for supporting Lattice's parallel
+* port ispDOWNLOAD cable on DOS and Windows 95/98 O/S. It can be
+* requested from Lattice's ispVMSupport.
+*
+***************************************************************/
+
+/**************************************************************
+*
+* Revision History of ispvm_ui.c
+*
+* 3/6/07 ht Added functions vme_out_char(),vme_out_hex(),
+*           vme_out_string() to provide output resources.
+*           Consolidate all printf() calls into the added output
+*           functions.
+*
+* 09/11/07 NN Added Global variables initialization
+* 09/24/07 NN Added a switch allowing users to do calibration.
+* Calibration will help to determine the system clock frequency
+* and the count value for one micro-second delay of the target
+* specific hardware.
+* Removed Delay Percent support
+* 11/15/07  NN moved the checking of the File CRC to the end of processing
+* 08/28/08 NN Added Calculate checksum support.
+***************************************************************/
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <ctype.h>
+#include <debug.h>
+#include <vmopcode.h>
+#include <unistd.h>
+#include <firmware_app.h>
+
+/***************************************************************
+*
+* File pointer to the VME file.
+*
+***************************************************************/
+
+FILE *g_pVMEFile = NULL;
+
+/***************************************************************
+*
+* Functions declared in this ispvm_ui.c module
+*
+***************************************************************/
+unsigned char GetByte(void);
+void vme_out_char(unsigned char charOut);
+void vme_out_hex(unsigned char hexOut);
+void vme_out_string(char *stringOut);
+void ispVMMemManager(signed char cTarget, unsigned short usSize);
+void ispVMFreeMem(void);
+void error_handler(short a_siRetCode, char *pszMessage);
+signed char ispVM(const char *a_pszFilename);
+
+/***************************************************************
+*
+* Global variables.
+*
+***************************************************************/
+unsigned short g_usPreviousSize = 0;
+unsigned short g_usExpectedCRC = 0;
+
+/***************************************************************
+*
+* External variables and functions declared in ivm_core.c module.
+*
+***************************************************************/
+extern signed char ispVMCode();
+extern void ispVMCalculateCRC32(unsigned char a_ucData);
+extern void ispVMStart();
+extern void ispVMEnd();
+extern unsigned short g_usCalculatedCRC;
+extern unsigned short g_usDataType;
+extern unsigned char *g_pucOutMaskData,
+*g_pucInData,
+*g_pucOutData,
+*g_pucHIRData,
+*g_pucTIRData,
+*g_pucHDRData,
+*g_pucTDRData,
+*g_pucOutDMaskData,
+*g_pucIntelBuffer;
+extern unsigned char *g_pucHeapMemory;
+extern unsigned short g_iHeapCounter;
+extern unsigned short g_iHEAPSize;
+extern unsigned short g_usIntelDataIndex;
+extern unsigned short g_usIntelBufferSize;
+extern LVDSPair *g_pLVDSList;
+//08/28/08 NN Added Calculate checksum support.
+extern unsigned long g_usChecksum;
+extern unsigned int g_uiChecksumIndex;
+
+/* Added reinit for call ispvme more than once */
+extern void ivm_core_reinit();
+/***************************************************************
+*
+* External variables and functions declared in hardware.c module.
+*
+***************************************************************/
+extern void calibration(void);
+extern unsigned short g_usCpu_Frequency;
+extern int g_file_fd;
+
+/***************************************************************
+*
+* Supported VME versions.
+*
+***************************************************************/
+
+const char *const g_szSupportedVersions[] = { "__VME2.0", "__VME3.0", "____12.0", "____12.1", 0 };
+
+/***************************************************************
+*
+* GetByte
+*
+* Returns a byte to the caller. The returned byte depends on the
+* g_usDataType register. If the HEAP_IN bit is set, then the byte
+* is returned from the HEAP. If the LHEAP_IN bit is set, then
+* the byte is returned from the intelligent buffer. Otherwise,
+* the byte is returned directly from the VME file.
+*
+***************************************************************/
+
+char* strlwr(char *str)
+{
+    char *orig = str;
+// process the string
+    for (; *str != '\0'; str++)
+        *str = tolower(*str);
+    return orig;
+}
+
+unsigned char GetByte()
+{
+    unsigned char ucData = 0;
+
+    if (g_usDataType & HEAP_IN) {
+
+        /***************************************************************
+        *
+        * Get data from repeat buffer.
+        *
+        ***************************************************************/
+
+        if (g_iHeapCounter > g_iHEAPSize) {
+
+            /***************************************************************
+            *
+            * Data over-run.
+            *
+            ***************************************************************/
+
+            return 0xFF;
+        }
+
+        ucData = g_pucHeapMemory[g_iHeapCounter++];
+    }
+    else if ( g_usDataType & LHEAP_IN ) {
+
+        /***************************************************************
+        *
+        * Get data from intel buffer.
+        *
+        ***************************************************************/
+
+        if (g_usIntelDataIndex >= g_usIntelBufferSize) {
+
+            /***************************************************************
+            *
+            * Data over-run.
+            *
+            ***************************************************************/
+
+            return 0xFF;
+        }
+
+        ucData = g_pucIntelBuffer[g_usIntelDataIndex++];
+    }
+    else {
+
+        /***************************************************************
+        *
+        * Get data from file.
+        *
+        ***************************************************************/
+
+        ucData = (unsigned char)fgetc(g_pVMEFile);
+
+        if (feof(g_pVMEFile)) {
+
+            /***************************************************************
+            *
+            * Reached EOF.
+            *
+            ***************************************************************/
+
+            return 0xFF;
+        }
+        /***************************************************************
+        *
+        * Calculate the 32-bit CRC if the expected CRC exist.
+        *
+        ***************************************************************/
+        if( g_usExpectedCRC != 0)
+        {
+            ispVMCalculateCRC32(ucData);
+        }
+    }
+
+    return (ucData);
+}
+
+/***************************************************************
+*
+* vme_out_char
+*
+* Send a character out to the output resource if available.
+* The monitor is the default output resource.
+*
+*
+***************************************************************/
+void vme_out_char(unsigned char charOut)
+{
+    dbg_print(is_debug_on, "%c", charOut);
+}
+/***************************************************************
+*
+* vme_out_hex
+*
+* Send a character out as in hex format to the output resource
+* if available. The monitor is the default output resource.
+*
+*
+***************************************************************/
+void vme_out_hex(unsigned char hexOut)
+{
+    dbg_print(is_debug_on, "%.2X", hexOut);
+}
+/***************************************************************
+*
+* vme_out_string
+*
+* Send a text string out to the output resource if available.
+* The monitor is the default output resource.
+*
+*
+***************************************************************/
+void vme_out_string(char *stringOut)
+{
+    dbg_print(is_debug_on,"%s",stringOut);
+}
+/***************************************************************
+*
+* ispVMMemManager
+*
+* Allocate memory based on cTarget. The memory size is specified
+* by usSize.
+*
+***************************************************************/
+
+void ispVMMemManager(signed char cTarget, unsigned short usSize)
+{
+    switch (cTarget) {
+    case XTDI:
+    case TDI:
+        if (g_pucInData != NULL) {
+            if (g_usPreviousSize == usSize) { /*memory exist*/
+                break;
+            }
+            else {
+                free(g_pucInData);
+                g_pucInData = NULL;
+            }
+        }
+        g_pucInData = (unsigned char *)malloc(usSize / 8 + 2);
+        g_usPreviousSize = usSize;
+    case XTDO:
+    case TDO:
+        if (g_pucOutData != NULL) {
+            if (g_usPreviousSize == usSize) { /*already exist*/
+                break;
+            }
+            else {
+                free(g_pucOutData);
+                g_pucOutData = NULL;
+            }
+        }
+        g_pucOutData = (unsigned char *)malloc(usSize / 8 + 2);
+        g_usPreviousSize = usSize;
+        break;
+    case MASK:
+        if (g_pucOutMaskData != NULL) {
+            if (g_usPreviousSize == usSize) { /*already allocated*/
+                break;
+            }
+            else {
+                free(g_pucOutMaskData);
+                g_pucOutMaskData = NULL;
+            }
+        }
+        g_pucOutMaskData = (unsigned char *)malloc(usSize / 8 + 2);
+        g_usPreviousSize = usSize;
+        break;
+    case HIR:
+        if (g_pucHIRData != NULL) {
+            free(g_pucHIRData);
+            g_pucHIRData = NULL;
+        }
+        g_pucHIRData = (unsigned char *)malloc(usSize / 8 + 2);
+        break;
+    case TIR:
+        if (g_pucTIRData != NULL) {
+            free(g_pucTIRData);
+            g_pucTIRData = NULL;
+        }
+        g_pucTIRData = (unsigned char *)malloc(usSize / 8 + 2);
+        break;
+    case HDR:
+        if (g_pucHDRData != NULL) {
+            free(g_pucHDRData);
+            g_pucHDRData = NULL;
+        }
+        g_pucHDRData = (unsigned char *)malloc(usSize / 8 + 2);
+        break;
+    case TDR:
+        if (g_pucTDRData != NULL) {
+            free(g_pucTDRData);
+            g_pucTDRData = NULL;
+        }
+        g_pucTDRData = (unsigned char *)malloc(usSize / 8 + 2);
+        break;
+    case HEAP:
+        if (g_pucHeapMemory != NULL) {
+            free(g_pucHeapMemory);
+            g_pucHeapMemory = NULL;
+        }
+        g_pucHeapMemory = (unsigned char *)malloc(usSize + 2);
+        break;
+    case DMASK:
+        if (g_pucOutDMaskData != NULL) {
+            if (g_usPreviousSize == usSize) { /*already allocated*/
+                break;
+            }
+            else {
+                free(g_pucOutDMaskData);
+                g_pucOutDMaskData = NULL;
+            }
+        }
+        g_pucOutDMaskData = (unsigned char *)malloc(usSize / 8 + 2);
+        g_usPreviousSize = usSize;
+        break;
+    case LHEAP:
+        if (g_pucIntelBuffer != NULL) {
+            free(g_pucIntelBuffer);
+            g_pucIntelBuffer = NULL;
+        }
+        g_pucIntelBuffer = (unsigned char *)malloc(usSize + 2);
+        break;
+    case LVDS:
+        if (g_pLVDSList != NULL) {
+            free(g_pLVDSList);
+            g_pLVDSList = NULL;
+        }
+        g_pLVDSList = (LVDSPair * )calloc(usSize, sizeof(LVDSPair));
+        break;
+    default:
+        return;
+    }
+}
+
+/***************************************************************
+*
+* ispVMFreeMem
+*
+* Free memory that were dynamically allocated.
+*
+***************************************************************/
+
+void ispVMFreeMem()
+{
+    if (g_pucHeapMemory != NULL) {
+        free(g_pucHeapMemory);
+        g_pucHeapMemory = NULL;
+    }
+
+    if (g_pucOutMaskData != NULL) {
+        free(g_pucOutMaskData);
+        g_pucOutMaskData = NULL;
+    }
+
+    if (g_pucInData != NULL) {
+        free(g_pucInData);
+        g_pucInData = NULL;
+    }
+
+    if (g_pucOutData != NULL) {
+        free(g_pucOutData);
+        g_pucOutData = NULL;
+    }
+
+    if (g_pucHIRData != NULL) {
+        free(g_pucHIRData);
+        g_pucHIRData = NULL;
+    }
+
+    if (g_pucTIRData != NULL) {
+        free(g_pucTIRData);
+        g_pucTIRData = NULL;
+    }
+
+    if (g_pucHDRData != NULL) {
+        free(g_pucHDRData);
+        g_pucHDRData = NULL;
+    }
+
+    if (g_pucTDRData != NULL) {
+        free(g_pucTDRData);
+        g_pucTDRData = NULL;
+    }
+
+    if (g_pucOutDMaskData != NULL) {
+        free(g_pucOutDMaskData);
+        g_pucOutDMaskData = NULL;
+    }
+
+    if (g_pucIntelBuffer != NULL) {
+        free(g_pucIntelBuffer);
+        g_pucIntelBuffer = NULL;
+    }
+
+    if (g_pLVDSList != NULL) {
+        free(g_pLVDSList);
+        g_pLVDSList = NULL;
+    }
+}
+
+/***************************************************************
+*
+* error_handler
+*
+* Reports the error message.
+*
+***************************************************************/
+
+void error_handler(short a_siRetCode, char *pszMessage)
+{
+    const char *pszErrorMessage[] = { "pass",
+        "verification fail",
+        "can't find the file",
+        "wrong file type",
+        "file error",
+        "option error",
+        "crc verification error" };
+
+    strcpy(pszMessage, pszErrorMessage[-a_siRetCode]);
+}
+/***************************************************************
+*
+* ispVM
+*
+* The entry point of the ispVM embedded. If the version and CRC
+* are verified, then the VME will be processed.
+*
+***************************************************************/
+signed char ispVM(const char *a_pszFilename)
+{
+    char szFileVersion[9] = { 0 };
+    signed char cRetCode         = 0;
+    signed char cIndex           = 0;
+    signed char cVersionIndex    = 0;
+    unsigned char ucReadByte     = 0;
+    int ret;
+    /***************************************************************
+    *
+    * Global variables initialization.
+    *
+    * 09/11/07 NN Added
+    ***************************************************************/
+    g_pucHeapMemory     = NULL;
+    g_iHeapCounter      = 0;
+    g_iHEAPSize         = 0;
+    g_usIntelDataIndex  = 0;
+    g_usIntelBufferSize = 0;
+    g_usPreviousSize     = 0;
+
+    /***************************************************************
+    *
+    * Open a file pointer to the VME file.
+    *
+    ***************************************************************/
+
+    if ((g_pVMEFile = fopen(a_pszFilename, "rb")) == NULL) {
+        return VME_FILE_READ_FAILURE;
+    }
+    /* Skip the contents of the file header */
+    ret=fseek(g_pVMEFile, header_offset, SEEK_SET);
+    if (ret < 0) {
+      vme_out_string("Failed to skip header.\n");
+      fclose(g_pVMEFile);
+      g_pVMEFile = NULL;
+      return VME_ARGUMENT_FAILURE;
+    }
+
+    g_usCalculatedCRC = 0;
+    g_usExpectedCRC   = 0;
+    ucReadByte = GetByte();
+    switch (ucReadByte) {
+    case FILE_CRC:
+
+        /***************************************************************
+        *
+        * Read and store the expected CRC to do the comparison at the end.
+        * Only versions 3.0 and higher support CRC protection.
+        *
+        ***************************************************************/
+
+        g_usExpectedCRC = (unsigned char)fgetc(g_pVMEFile);
+        g_usExpectedCRC <<= 8;
+        g_usExpectedCRC |= fgetc(g_pVMEFile);
+
+        /***************************************************************
+        *
+        * Read and store the version of the VME file.
+        *
+        ***************************************************************/
+
+        for (cIndex = 0; cIndex < 8; cIndex++) {
+            szFileVersion[cIndex] = GetByte();
+        }
+        break;
+    default:
+
+        /***************************************************************
+        *
+        * Read and store the version of the VME file.  Must be version 2.0.
+        *
+        ***************************************************************/
+
+        szFileVersion[0] = (signed char)ucReadByte;
+        for (cIndex = 1; cIndex < 8; cIndex++) {
+            szFileVersion[cIndex] = GetByte();
+        }
+
+        break;
+    }
+
+    /***************************************************************
+    *
+    * Compare the VME file version against the supported version.
+    *
+    ***************************************************************/
+    for (cVersionIndex = 0; g_szSupportedVersions[cVersionIndex] != 0; cVersionIndex++) {
+        for (cIndex = 0; cIndex < 8; cIndex++) {
+            if (szFileVersion[cIndex] != g_szSupportedVersions[cVersionIndex][cIndex]) {
+                cRetCode = VME_VERSION_FAILURE;
+                break;
+            }
+            cRetCode = 0;
+        }
+
+        if (cRetCode == 0) {
+
+            /***************************************************************
+            *
+            * Found matching version, break.
+            *
+            ***************************************************************/
+
+            break;
+        }
+    }
+
+    if (cRetCode < 0) {
+
+        /***************************************************************
+        *
+        * VME file version failed to match the supported versions.
+        *
+        ***************************************************************/
+
+        fclose(g_pVMEFile);
+        g_pVMEFile = NULL;
+        return VME_VERSION_FAILURE;
+    }
+
+    /***************************************************************
+    *
+    * Enable the JTAG port to communicate with the device.
+    * Set the JTAG state machine to the Test-Logic/Reset State.
+    *
+    ***************************************************************/
+    ispVMStart();
+
+    /***************************************************************
+    *
+    * Process the VME file.
+    *
+    ***************************************************************/
+
+    cRetCode = ispVMCode();
+
+    /***************************************************************
+    *
+    * Set the JTAG State Machine to Test-Logic/Reset state then disable
+    * the communication with the JTAG port.
+    *
+    ***************************************************************/
+
+    ispVMEnd();
+
+    fclose(g_pVMEFile);
+    g_pVMEFile = NULL;
+
+    ispVMFreeMem();
+
+    /***************************************************************
+    *
+    * Compare the expected CRC versus the calculated CRC.
+    *
+    ***************************************************************/
+
+    if (cRetCode == 0 && g_usExpectedCRC != 0 && (g_usExpectedCRC != g_usCalculatedCRC)) {
+        printf("Expected CRC:   0x%.4X\n", g_usExpectedCRC);
+        printf("Calculated CRC: 0x%.4X\n", g_usCalculatedCRC);
+        return VME_CRC_FAILURE;
+    }
+
+    return (cRetCode);
+}
+
+/***************************************************************
+*
+* ispvme_reinit
+*
+* Reinit ispvm_ui variables.
+*
+***************************************************************/
+static void ispvm_ui_reinit()
+{
+    g_pVMEFile = NULL;
+    g_usPreviousSize = 0;
+    g_usExpectedCRC = 0;
+}
+
+/***************************************************************
+*
+* main
+*
+***************************************************************/
+
+int ispvme_main(int argc, char *argv[], int file_fd, name_info_t *info)
+{
+    unsigned short iCommandLineIndex  = 0;
+    short siRetCode                   = 0;
+    char szExtension[5] = { 0 };
+    char szCommandLineArg[300] = { 0 };
+    short sicalibrate                 = 0;
+
+    ispvm_ui_reinit();
+    ivm_core_reinit();
+
+    //08/28/08 NN Added Calculate checksum support.
+    g_usChecksum = 0;
+    g_uiChecksumIndex = 0;
+
+    if (file_fd < 0) {
+        dbg_print(is_debug_on, "Error:firmware upgrade ispvme dev parameters failed.\r\n");
+        return -1;
+    } else {
+        g_file_fd = file_fd;
+    }
+
+#if 0
+    ret = firmware_check_chip_name(g_file_fd, info);
+    if (ret != FIRMWARE_SUCCESS) {
+        dbg_print(is_debug_on, "Error: Failed to check chip name: %s.\n", file_name);
+        close(g_file_fd);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+
+    ret = firmware_check_chip_verison(g_file_fd, info);
+    if (ret != FIRMWARE_SUCCESS) {
+        dbg_print(is_debug_on, "Error: Failed to check chip version: %s.\n", file_name);
+        close(g_file_fd);
+        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
+    }
+#endif
+
+    vme_out_string("                 Lattice Semiconductor Corp.\n");
+    vme_out_string("\n             ispVME(tm) V");
+    vme_out_string(VME_VERSION_NUMBER);
+    vme_out_string(" Copyright 1998-2011.\n");
+    vme_out_string("\nFor daisy chain programming of all in-system programmable devices\n\n");
+
+    if (argc < 2) {
+        vme_out_string("\nUsage: vme [option] vme_file [vme_file]\n");
+        vme_out_string("Example: vme vme_file1.vme vme_file2.vme\n");
+        vme_out_string("option   -c:   do the calibration.\n");
+        vme_out_string("Example: vme -c\n");
+        vme_out_string("Example: vme -c vme_file1.vme vme_file2.vme\n");
+        vme_out_string("\n\n");
+        g_file_fd = -1;
+        /* Change return to determine whether the upgrade was successful */
+        return -1;
+    }
+    for (iCommandLineIndex = 1; iCommandLineIndex < argc; iCommandLineIndex++) {
+        strncpy(szCommandLineArg, argv[iCommandLineIndex], sizeof(szCommandLineArg) - 1);
+        if (!strcmp(strlwr(szCommandLineArg), "-c") && (iCommandLineIndex == 1)) {
+            sicalibrate = 1;
+        } else if (!strcmp(strlwr(szCommandLineArg), "-c") && (iCommandLineIndex != 1)) {
+            vme_out_string("Error: calibrate option -c must be the first argument\n\n");
+            g_file_fd = -1;
+            /* Change return to determine whether the upgrade was successful */
+            return -1;
+            //exit(1);
+        } else {
+            strcpy(szExtension, &szCommandLineArg[strlen(szCommandLineArg) - 4]);
+            strlwr(szExtension);
+            if (strcmp(szExtension, ".vme")) {
+                vme_out_string("Error: VME files must end with the extension *.vme\n\n");
+                g_file_fd = -1;
+                /* Change return to determine whether the upgrade was successful */
+                return -1;
+                //exit(1);
+            }
+        }
+    }
+    siRetCode = 0;
+
+    if (sicalibrate) {
+        calibration();
+    }
+    for (iCommandLineIndex = 1; iCommandLineIndex < argc; iCommandLineIndex++) {   /* Process all VME files sequentially */
+        strcpy(szCommandLineArg, argv[iCommandLineIndex]);
+        if (!strcmp(strlwr(szCommandLineArg), "-c") && (iCommandLineIndex == 1)) {
+
+        } else if (!strcmp(strlwr(szCommandLineArg), "-checksum")) {
+
+        } else {
+            vme_out_string("Processing virtual machine file (");
+            vme_out_string(szCommandLineArg);
+            vme_out_string(")......\n\n");
+            siRetCode = ispVM(argv[iCommandLineIndex]);
+            if (siRetCode < 0) {
+                break;
+            }
+        }
+    }
+
+    if (siRetCode < 0) {
+        error_handler(siRetCode, szCommandLineArg);
+        vme_out_string("Failed due to ");
+        vme_out_string(szCommandLineArg);
+        vme_out_string("\n\n");
+        vme_out_string("+=======+\n");
+        vme_out_string("| FAIL! |\n");
+        vme_out_string("+=======+\n\n");
+    } else {
+        vme_out_string("+=======+\n");
+        vme_out_string("| PASS! |\n");
+        vme_out_string("+=======+\n\n");
+        //08/28/08 NN Added Calculate checksum support.
+        if (g_usChecksum != 0) {
+            g_usChecksum &= 0xFFFF;
+            printf("Data Checksum: %.4X\n\n", (unsigned int)g_usChecksum);
+            g_usChecksum = 0;
+        }
+    }
+    g_file_fd = -1;
+    /* Change return to determine whether the upgrade was successful */
+    return siRetCode;
+    //exit(siRetCode);
+}
+
+/*
+ * firmware_upgrade_ispvme
+ * function: ispvme firmware upgrade
+ * @file_fd:   param[in] Upgrade devices fd
+ * @upgrade_file_name:   param[in] Upgrade file name
+ * @info:        param[in] Upgrade file information
+ * return value : success--FIRMWARE_SUCCESS, other fail return error code
+ */
+int firmware_upgrade_ispvme(int file_fd, char *upgrade_file_name, name_info_t *info)
+{
+    char *argv[2];
+    int ret, rv, i, retry;
+
+    argv[1] = upgrade_file_name;
+
+    /* Initialize and enable */
+    rv = ioctl(file_fd, FIRMWARE_JTAG_INIT,NULL);
+    if (rv < 0) {
+      vme_out_string("Failed to init GPIO.\n");
+      return VME_ARGUMENT_FAILURE;
+    }
+
+    i = 0;
+    retry = FIRMWARE_UPGRADE_RETRY_CNT;
+
+    ret = 0;
+    while(i < retry) {
+        ret = ispvme_main(2, argv, file_fd, info);
+        if (ret < 0) {
+            i++;
+            dbg_print(is_debug_on, "%d times ispvme upgrade failed. ret %d.\n", i, ret);
+            continue;
+        } else {
+            dbg_print(is_debug_on, "ispvme upgrade success.\n");
+            break;
+        }
+    }
+
+    /* Upgrade completed, release */
+    rv = ioctl(file_fd, FIRMWARE_JTAG_FINISH, NULL);
+    if (rv < 0) {
+      vme_out_string("Failed to release GPIO.\n");
+      return VME_ARGUMENT_FAILURE;
+    }
+
+    return ret;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/ivm_core.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/ivm_core.c
new file mode 100644
index 000000000000..540be481d35e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/ivm_core.c
@@ -0,0 +1,3097 @@
+/***************************************************************
+*
+* Lattice Semiconductor Corp. Copyright 2009
+*
+* ispVME Embedded allows programming of Lattice's suite of FPGA
+* devices on embedded systems through the JTAG port.  The software
+* is distributed in source code form and is open to re - distribution
+* and modification where applicable.
+*
+* Revision History of ivm_core.c module:
+* 4/25/06 ht   Change some variables from unsigned short or int
+*              to long int to make the code compiler independent.
+* 5/24/06 ht   Support using RESET (TRST) pin as a special purpose
+*              control pin such as triggering the loading of known
+*              state exit.
+* 3/6/07 ht added functions to support output to terminals
+*
+* 09/24/07 NN Type cast mismatch variables
+*          Moved the sclock() function to hardware.c
+* 08/28/08 NN Added Calculate checksum support.
+* 4/1/09 Nguyen replaced the recursive function call codes on
+*        the ispVMLCOUNT function
+*
+***************************************************************/
+
+#include <stdio.h>
+#include <string.h>
+#include <vmopcode.h>
+#include <firmware_app.h>
+
+/***************************************************************
+*
+* Global variables used to specify the flow control and data type.
+*
+*   g_usFlowControl:    flow control register. Each bit in the
+*                               register can potentially change the
+*                               personality of the embedded engine.
+*   g_usDataType:       holds the data type of the current row.
+*
+***************************************************************/
+
+unsigned short g_usFlowControl  = 0x0000;
+unsigned short g_usDataType     = 0x0000;
+
+/***************************************************************
+*
+* Global variables used to specify the ENDDR and ENDIR.
+*
+*   g_ucEndDR:      the state that the device goes to after SDR.
+*   g_ucEndIR:      the state that the device goes to after SIR.
+*
+***************************************************************/
+
+unsigned char g_ucEndDR = DRPAUSE;
+unsigned char g_ucEndIR = IRPAUSE;
+
+/***************************************************************
+*
+* Global variables used to support header/trailer.
+*
+*   g_usHeadDR:     the number of lead devices in bypass.
+*   g_usHeadIR:     the sum of IR length of lead devices.
+*   g_usTailDR:     the number of tail devices in bypass.
+*   g_usTailIR:     the sum of IR length of tail devices.
+*
+***************************************************************/
+
+unsigned short g_usHeadDR = 0;
+unsigned short g_usHeadIR = 0;
+unsigned short g_usTailDR = 0;
+unsigned short g_usTailIR = 0;
+
+/***************************************************************
+*
+* Global variable to store the number of bits of data or instruction
+* to be shifted into or out from the device.
+*
+***************************************************************/
+
+unsigned short g_usiDataSize = 0;
+
+/***************************************************************
+*
+* Stores the frequency. Default to 1 MHz.
+*
+***************************************************************/
+
+int g_iFrequency = 1000;
+
+/***************************************************************
+*
+* Stores the maximum amount of ram needed to hold a row of data.
+*
+***************************************************************/
+
+unsigned short g_usMaxSize = 0;
+
+/***************************************************************
+*
+* Stores the LSH or RSH value.
+*
+***************************************************************/
+
+unsigned short g_usShiftValue = 0;
+
+/***************************************************************
+*
+* Stores the current repeat loop value.
+*
+***************************************************************/
+
+unsigned short g_usRepeatLoops = 0;
+
+/***************************************************************
+*
+* Stores the current vendor.
+*
+***************************************************************/
+
+signed char g_cVendor = LATTICE;
+
+/***************************************************************
+*
+* Stores the VME file CRC.
+*
+***************************************************************/
+
+unsigned short g_usCalculatedCRC = 0;
+
+/***************************************************************
+*
+* Stores the Device Checksum.
+*
+***************************************************************/
+//08/28/08 NN Added Calculate checksum support.
+unsigned long g_usChecksum = 0;
+unsigned int g_uiChecksumIndex = 0;
+
+/***************************************************************
+*
+* Stores the current state of the JTAG state machine.
+*
+***************************************************************/
+
+signed char g_cCurrentJTAGState = 0;
+
+/***************************************************************
+*
+* Global variables used to support looping.
+*
+*   g_pucHeapMemory:    holds the entire repeat loop.
+*   g_iHeapCounter:     points to the current byte in the repeat loop.
+*   g_iHEAPSize:        the current size of the repeat in bytes.
+*
+***************************************************************/
+
+unsigned char *g_pucHeapMemory      = NULL;
+unsigned short g_iHeapCounter       = 0;
+unsigned short g_iHEAPSize          = 0;
+
+/***************************************************************
+*
+* Global variables used to support intelligent programming.
+*
+*   g_usIntelDataIndex:     points to the current byte of the
+*                               intelligent buffer.
+*   g_usIntelBufferSize:    holds the size of the intelligent
+*                               buffer.
+*
+***************************************************************/
+
+unsigned short g_usIntelDataIndex   = 0;
+unsigned short g_usIntelBufferSize  = 0;
+
+/****************************************************************************
+*
+* Holds the maximum size of each respective buffer. These variables are used
+* to write the HEX files when converting VME to HEX.
+*
+*****************************************************************************/
+
+unsigned short g_usTDOSize      = 0;
+unsigned short g_usMASKSize     = 0;
+unsigned short g_usTDISize      = 0;
+unsigned short g_usDMASKSize    = 0;
+unsigned short g_usLCOUNTSize   = 0;
+unsigned short g_usHDRSize      = 0;
+unsigned short g_usTDRSize      = 0;
+unsigned short g_usHIRSize      = 0;
+unsigned short g_usTIRSize      = 0;
+unsigned short g_usHeapSize     = 0;
+
+/***************************************************************
+*
+* Global variables used to store data.
+*
+*   g_pucOutMaskData:       local RAM to hold one row of MASK data.
+*   g_pucInData:            local RAM to hold one row of TDI data.
+*   g_pucOutData:           local RAM to hold one row of TDO data.
+*   g_pucHIRData:           local RAM to hold the current SIR header.
+*   g_pucTIRData:           local RAM to hold the current SIR trailer.
+*   g_pucHDRData:           local RAM to hold the current SDR header.
+*   g_pucTDRData:           local RAM to hold the current SDR trailer.
+*   g_pucIntelBuffer:       local RAM to hold the current intelligent buffer.
+*   g_pucOutDMaskData:      local RAM to hold one row of DMASK data.
+*
+***************************************************************/
+
+unsigned char *g_pucOutMaskData = NULL,
+*g_pucInData         = NULL,
+*g_pucOutData       = NULL,
+*g_pucHIRData       = NULL,
+*g_pucTIRData       = NULL,
+*g_pucHDRData       = NULL,
+*g_pucTDRData       = NULL,
+*g_pucIntelBuffer   = NULL,
+*g_pucOutDMaskData  = NULL;
+
+/***************************************************************
+*
+* JTAG state machine transition table.
+*
+***************************************************************/
+
+struct {
+    unsigned char  CurState;  /* From this state */
+    unsigned char  NextState; /* Step to this state */
+    unsigned char  Pattern;   /* The tragetory of TMS */
+    unsigned char  Pulses;    /* The number of steps */
+} g_JTAGTransistions[25] = {
+    { RESET,    RESET,      0xFC, 6 },  /* Transitions from RESET */
+    { RESET,    IDLE,       0x00, 1 },
+    { RESET,    DRPAUSE,    0x50, 5 },
+    { RESET,    IRPAUSE,    0x68, 6 },
+    { IDLE,     RESET,      0xE0, 3 },  /* Transitions from IDLE */
+    { IDLE,     DRPAUSE,    0xA0, 4 },
+    { IDLE,     IRPAUSE,    0xD0, 5 },
+    { DRPAUSE,  RESET,      0xF8, 5 },  /* Transitions from DRPAUSE */
+    { DRPAUSE,  IDLE,       0xC0, 3 },
+    { DRPAUSE,  IRPAUSE,    0xF4, 7 },
+    { DRPAUSE,  DRPAUSE,    0xE8, 6 },  /* 06/14/06 Support POLING STATUS LOOP*/
+    { IRPAUSE,  RESET,      0xF8, 5 },  /* Transitions from IRPAUSE */
+    { IRPAUSE,  IDLE,       0xC0, 3 },
+    { IRPAUSE,  DRPAUSE,    0xE8, 6 },
+    { DRPAUSE,  SHIFTDR,    0x80, 2 },  /* Extra transitions using SHIFTDR */
+    { IRPAUSE,  SHIFTDR,    0xE0, 5 },
+    { SHIFTDR,  DRPAUSE,    0x80, 2 },
+    { SHIFTDR,  IDLE,       0xC0, 3 },
+    { IRPAUSE,  SHIFTIR,    0x80, 2 },  /* Extra transitions using SHIFTIR */
+    { SHIFTIR,  IRPAUSE,    0x80, 2 },
+    { SHIFTIR,  IDLE,       0xC0, 3 },
+    { DRPAUSE,  DRCAPTURE,  0xE0, 4 }, /* 11/15/05 Support DRCAPTURE*/
+    { DRCAPTURE, DRPAUSE,   0x80, 2 },
+    { IDLE,     DRCAPTURE,  0x80, 2 },
+    { IRPAUSE,  DRCAPTURE,  0xE0, 4 }
+};
+
+/***************************************************************
+*
+* List to hold all LVDS pairs.
+*
+***************************************************************/
+
+LVDSPair *g_pLVDSList           = NULL;
+unsigned short g_usLVDSPairCount = 0;
+
+/***************************************************************
+*
+* Function prototypes.
+*
+***************************************************************/
+
+signed char ispVMCode();
+signed char ispVMDataCode();
+long int ispVMDataSize();
+void ispVMData(unsigned char *Data);
+signed char ispVMShift(signed char Code);
+signed char ispVMAmble(signed char Code);
+signed char ispVMLoop(unsigned short a_usLoopCount);
+signed char ispVMBitShift(signed char mode, unsigned short bits);
+void ispVMComment(unsigned short a_usCommentSize);
+void ispVMHeader(unsigned short a_usHeaderSize);
+signed char ispVMLCOUNT(unsigned short a_usCountSize);
+void ispVMClocks(unsigned short Clocks);
+void ispVMBypass(signed char ScanType, unsigned short Bits);
+void ispVMStateMachine(signed char NextState);
+void ispVMStart();
+void ispVMEnd();
+signed char ispVMSend(unsigned short int);
+signed char ispVMRead(unsigned short int);
+signed char ispVMReadandSave(unsigned short int);
+signed char ispVMProcessLVDS(unsigned short a_usLVDSCount);
+
+/***************************************************************
+*
+* External variables and functions in ispvm_ui.c module
+*
+***************************************************************/
+extern void vme_out_char(unsigned char charOut);
+extern void vme_out_hex(unsigned char hexOut);
+extern void vme_out_string(char *stringOut);
+extern unsigned char GetByte();
+extern void ispVMMemManager(signed char types, unsigned short size);
+
+/***************************************************************
+*
+* External variables and functions in hardware.c module
+*
+***************************************************************/
+extern void ispVMDelay(unsigned short int a_usMicroSecondDelay);
+extern unsigned char readPort();
+extern void writePort(unsigned char pins, unsigned char value);
+extern void sclock();
+extern signed char g_cCurrentJTAGState;
+#ifdef VME_DEBUG
+
+/***************************************************************
+*
+* GetState
+*
+* Returns the state as a string based on the opcode. Only used
+* for debugging purposes.
+*
+***************************************************************/
+
+const char* GetState(unsigned char a_ucState)
+{
+    switch (a_ucState) {
+    case RESET:
+        return ("RESET");
+    case IDLE:
+        return ("IDLE");
+    case IRPAUSE:
+        return ("IRPAUSE");
+    case DRPAUSE:
+        return ("DRPAUSE");
+    case SHIFTIR:
+        return ("SHIFTIR");
+    case SHIFTDR:
+        return ("SHIFTDR");
+    case DRCAPTURE: /* 11/15/05 support DRCAPTURE*/
+        return ("DRCAPTURE");
+    default:
+        break;
+    }
+
+    return 0;
+}
+
+/***************************************************************
+*
+* PrintData
+*
+* Prints the data. Only used for debugging purposes.
+*
+***************************************************************/
+
+void PrintData(unsigned short a_iDataSize, unsigned char *a_pucData)
+{
+    //09/11/07 NN added local variables initialization
+    unsigned short usByteSize  = 0;
+    unsigned short usBitIndex  = 0;
+    signed short usByteIndex   = 0;
+    unsigned char ucByte       = 0;
+    unsigned char ucFlipByte   = 0;
+
+    if (a_iDataSize % 8) {
+        //09/11/07 NN Type cast mismatch variables
+        usByteSize = (unsigned short)(a_iDataSize / 8 + 1);
+    } else {
+        //09/11/07 NN Type cast mismatch variables
+        usByteSize = (unsigned short)(a_iDataSize / 8);// 4
+    }
+    printf("(");
+    //09/11/07 NN Type cast mismatch variables
+    for (usByteIndex = (signed short)(usByteSize - 1); usByteIndex >= 0; usByteIndex--) {
+        ucByte = a_pucData[usByteIndex];
+        ucFlipByte = 0x00;
+
+        /***************************************************************
+        *
+        * Flip each byte.
+        *
+        ***************************************************************/
+
+        for (usBitIndex = 0; usBitIndex < 8; usBitIndex++) {
+            ucFlipByte <<= 1;
+            if (ucByte & 0x1) {
+                ucFlipByte |= 0x1;
+            }
+
+            ucByte >>= 1;
+        }
+
+        /***************************************************************
+        *
+        * Print the flipped byte.
+        *
+        ***************************************************************/
+
+        printf("%.02X", ucFlipByte);
+        if ((usByteSize - usByteIndex) % 40 == 39) {
+            printf("\n\t\t");
+        }
+        if (usByteIndex < 0)
+            break;
+    }
+    printf(")");
+}
+#endif //VME_DEBUG
+
+/***************************************************************
+*
+* ispVMDataSize
+*
+* Returns a VME-encoded number, usually used to indicate the
+* bit length of an SIR/SDR command.
+*
+***************************************************************/
+
+long int ispVMDataSize()
+{
+    //09/11/07 NN added local variables initialization
+    long int iSize           = 0;
+    signed char cCurrentByte = 0;
+    signed char cIndex       = 0;
+    cIndex = 0;
+
+    while ((cCurrentByte = GetByte()) & 0x80) {
+        iSize |= ((long int)(cCurrentByte & 0x7F)) << cIndex;
+        cIndex += 7;
+    }
+    iSize |= ((long int)(cCurrentByte & 0x7F)) << cIndex;
+
+    return iSize;
+}
+
+/***************************************************************
+*
+* ispVMCode
+*
+* This is the heart of the embedded engine. All the high-level opcodes
+* are extracted here. Once they have been identified, then it
+* will call other functions to handle the processing.
+*
+***************************************************************/
+
+signed char ispVMCode()
+{
+    //09/11/07 NN added local variables initialization
+    unsigned short iRepeatSize = 0;
+    signed char cOpcode        = 0;
+    signed char cRetCode       = 0;
+    unsigned char ucState      = 0;
+    unsigned short usDelay     = 0;
+    unsigned short usToggle    = 0;
+    unsigned char usByte       = 0;
+
+    /***************************************************************
+    *
+    * Check the compression flag only if this is the first time
+    * this function is entered. Do not check the compression flag if
+    * it is being called recursively from other functions within
+    * the embedded engine.
+    *
+    ***************************************************************/
+
+    if (!(g_usDataType & LHEAP_IN) && !(g_usDataType & HEAP_IN)) {
+        usByte = GetByte();
+        if (usByte == 0xf1) {
+            g_usDataType |= COMPRESS;
+        } else if (usByte == 0xf2) {
+            g_usDataType &= ~COMPRESS;
+        } else {
+            return VME_INVALID_FILE;
+        }
+    }
+
+    /***************************************************************
+    *
+    * Begin looping through all the VME opcodes.
+    *
+    ***************************************************************/
+    while ((cOpcode = GetByte()) >= 0) {
+        switch (cOpcode) {
+        case STATE:
+
+            /***************************************************************
+            *
+            * Step the JTAG state machine.
+            *
+            ***************************************************************/
+
+            ucState = GetByte();
+            /***************************************************************
+            *
+            * Step the JTAG state machine to DRCAPTURE to support Looping.
+            *
+            ***************************************************************/
+
+            if ((g_usDataType & LHEAP_IN) &&
+                (ucState == DRPAUSE) &&
+                (g_cCurrentJTAGState == ucState)) {
+                ispVMStateMachine(DRCAPTURE);
+            }
+
+            ispVMStateMachine(ucState);
+
+#ifdef VME_DEBUG
+            if (g_usDataType & LHEAP_IN) {
+                printf("LDELAY %s ", GetState(ucState));
+            } else {
+                printf("STATE %s;\n", GetState(ucState));
+            }
+#endif //VME_DEBUG
+            break;
+        case SIR:
+        case SDR:
+        case XSDR:
+
+#ifdef VME_DEBUG
+            switch (cOpcode) {
+            case SIR:
+                printf("SIR ");
+                break;
+            case SDR:
+            case XSDR:
+                if (g_usDataType & LHEAP_IN) {
+                    printf("LSDR ");
+                } else {
+                    printf("SDR ");
+                }
+                break;
+            }
+#endif //VME_DEBUG
+            /***************************************************************
+            *
+            * Shift in data into the device.
+            *
+            ***************************************************************/
+            cRetCode = ispVMShift(cOpcode);
+            if (cRetCode != 0) {
+                return (cRetCode);
+            }
+            break;
+        case WAIT:
+
+            /***************************************************************
+            *
+            * Observe delay.
+            *
+            ***************************************************************/
+
+            //09/11/07 NN Type cast mismatch variables
+            usDelay = (unsigned short)ispVMDataSize();
+            ispVMDelay(usDelay);
+
+#ifdef VME_DEBUG
+            if (usDelay & 0x8000) {
+
+                /***************************************************************
+                *
+                * Since MSB is set, the delay time must be decoded to
+                * millisecond. The SVF2VME encodes the MSB to represent
+                * millisecond.
+                *
+                ***************************************************************/
+
+                usDelay &= ~0x8000;
+                if (g_usDataType & LHEAP_IN) {
+                    printf("%.2E SEC;\n", (float)usDelay / 1000);
+                } else {
+                    printf("RUNTEST %.2E SEC;\n", (float)usDelay / 1000);
+                }
+            } else {
+
+                /***************************************************************
+                *
+                * Since MSB is not set, the delay time is given as microseconds.
+                *
+                ***************************************************************/
+
+                if (g_usDataType & LHEAP_IN) {
+                    printf("%.2E SEC;\n", (float)usDelay / 1000000);
+                } else {
+                    printf("RUNTEST %.2E SEC;\n", (float)usDelay / 1000000);
+                }
+            }
+#endif //VME_DEBUG
+            break;
+        case TCK:
+
+            /***************************************************************
+            *
+            * Issue clock toggles.
+            *
+            ***************************************************************/
+
+            //09/11/07 NN Type cast mismatch variables
+            usToggle = (unsigned short)ispVMDataSize();
+            ispVMClocks(usToggle);
+
+#ifdef VME_DEBUG
+            printf("RUNTEST %d TCK;\n", usToggle);
+#endif //VME_DEBUG
+            break;
+        case ENDDR:
+
+            /***************************************************************
+            *
+            * Set the ENDDR.
+            *
+            ***************************************************************/
+
+            g_ucEndDR = GetByte();
+
+#ifdef VME_DEBUG
+            printf("ENDDR %s;\n", GetState(g_ucEndDR));
+#endif //VME_DEBUG
+            break;
+        case ENDIR:
+
+            /***************************************************************
+            *
+            * Set the ENDIR.
+            *
+            ***************************************************************/
+
+            g_ucEndIR = GetByte();
+
+#ifdef VME_DEBUG
+            printf("ENDIR %s;\n", GetState(g_ucEndIR));
+#endif //VME_DEBUG
+            break;
+        case HIR:
+        case TIR:
+        case HDR:
+        case TDR:
+
+#ifdef VME_DEBUG
+            switch (cOpcode) {
+            case HIR:
+                printf("HIR ");
+                break;
+            case TIR:
+                printf("TIR ");
+                break;
+            case HDR:
+                printf("HDR ");
+                break;
+            case TDR:
+                printf("TDR ");
+                break;
+            }
+#endif //VME_DEBUG
+
+            /***************************************************************
+            *
+            * Set the header/trailer of the device in order to bypass
+            * successfully.
+            *
+            ***************************************************************/
+
+            cRetCode = ispVMAmble(cOpcode);
+            if (cRetCode != 0) {
+                return (cRetCode);
+            }
+
+#ifdef VME_DEBUG
+            printf(";\n");
+#endif //VME_DEBUG
+            break;
+        case MEM:
+
+            /***************************************************************
+            *
+            * The maximum RAM required to support processing one row of the
+            * VME file.
+            *
+            ***************************************************************/
+
+            //09/11/07 NN Type cast mismatch variables
+            g_usMaxSize = (unsigned short)ispVMDataSize();
+
+#ifdef VME_DEBUG
+            printf("// MEMSIZE %d\n", g_usMaxSize);
+#endif //VME_DEBUG
+            break;
+        case VENDOR:
+
+            /***************************************************************
+            *
+            * Set the VENDOR type.
+            *
+            ***************************************************************/
+
+            cOpcode = GetByte();
+            switch (cOpcode) {
+            case LATTICE:
+#ifdef VME_DEBUG
+                printf("// VENDOR LATTICE\n");
+#endif //VME_DEBUG
+                g_cVendor = LATTICE;
+                break;
+            case ALTERA:
+#ifdef VME_DEBUG
+                printf("// VENDOR ALTERA\n");
+#endif //VME_DEBUG
+                g_cVendor = ALTERA;
+                break;
+            case XILINX:
+#ifdef VME_DEBUG
+                printf("// VENDOR XILINX\n");
+#endif //VME_DEBUG
+                g_cVendor = XILINX;
+                break;
+            default:
+                break;
+            }
+            break;
+        case SETFLOW:
+
+            /***************************************************************
+            *
+            * Set the flow control. Flow control determines the personality
+            * of the embedded engine.
+            *
+            ***************************************************************/
+
+            //09/11/07 NN Type cast mismatch variables
+            g_usFlowControl |= (unsigned short)ispVMDataSize();
+            break;
+        case RESETFLOW:
+
+            /***************************************************************
+            *
+            * Unset the flow control.
+            *
+            ***************************************************************/
+
+            //09/11/07 NN Type cast mismatch variables
+            g_usFlowControl &= (unsigned short)~(ispVMDataSize());
+            break;
+        case HEAP:
+
+            /***************************************************************
+            *
+            * Allocate heap size to store loops.
+            *
+            ***************************************************************/
+
+            cRetCode = GetByte();
+            if (cRetCode != SECUREHEAP) {
+                return VME_INVALID_FILE;
+            }
+            //09/11/07 NN Type cast mismatch variables
+            g_iHEAPSize = (unsigned short)ispVMDataSize();
+
+            /****************************************************************************
+            *
+            * Store the maximum size of the HEAP buffer. Used to convert VME to HEX.
+            *
+            *****************************************************************************/
+
+            if (g_iHEAPSize > g_usHeapSize) {
+                g_usHeapSize = g_iHEAPSize;
+            }
+
+            ispVMMemManager(HEAP, (unsigned short)g_iHEAPSize);
+            break;
+        case REPEAT:
+
+            /***************************************************************
+            *
+            * Execute loops.
+            *
+            ***************************************************************/
+
+            g_usRepeatLoops = 0;
+
+            //09/11/07 NN Type cast mismatch variables
+            iRepeatSize = (unsigned short)ispVMDataSize();
+
+            cRetCode = ispVMLoop((unsigned short)iRepeatSize);
+            if (cRetCode != 0) {
+                return (cRetCode);
+            }
+            break;
+        case ENDLOOP:
+
+            /***************************************************************
+            *
+            * Exit point from processing loops.
+            *
+            ***************************************************************/
+
+            return (cRetCode);
+        case ENDVME:
+
+            /***************************************************************
+            *
+            * The only valid exit point that indicates end of programming.
+            *
+            ***************************************************************/
+
+            return (cRetCode);
+        case SHR:
+
+            /***************************************************************
+            *
+            * Right-shift address.
+            *
+            ***************************************************************/
+
+            g_usFlowControl |= SHIFTRIGHT;
+
+            //09/11/07 NN Type cast mismatch variables
+            g_usShiftValue = (unsigned short)(g_usRepeatLoops * (unsigned short)GetByte());
+            break;
+        case SHL:
+
+            /***************************************************************
+            *
+            * Left-shift address.
+            *
+            ***************************************************************/
+
+            g_usFlowControl |= SHIFTLEFT;
+
+            //09/11/07 NN Type cast mismatch variables
+            g_usShiftValue = (unsigned short)(g_usRepeatLoops * (unsigned short)GetByte());
+            break;
+        case FREQUENCY:
+
+            /***************************************************************
+            *
+            * Set the frequency.
+            *
+            ***************************************************************/
+
+            //09/11/07 NN Type cast mismatch variables
+            g_iFrequency = (int)(ispVMDataSize());
+            //10/23/08 NN changed to check if the frequency smaller than 1000
+            if (g_iFrequency >= 1000) {
+                g_iFrequency = g_iFrequency / 1000;
+                if (g_iFrequency == 1)
+                    g_iFrequency = 1000;
+#ifdef VME_DEBUG
+                printf("FREQUENCY %.2E HZ;\n", (float)g_iFrequency * 1000);
+#endif //VME_DEBUG
+            } else {
+                if (g_iFrequency == 0)
+                    g_iFrequency = 1000;
+#ifdef VME_DEBUG
+                printf("FREQUENCY %.2E HZ;\n", (float)g_iFrequency);
+#endif //VME_DEBUG
+            }
+            break;
+        case LCOUNT:
+
+            /***************************************************************
+            *
+            * Process LCOUNT command.
+            *
+            ***************************************************************/
+
+            cRetCode = ispVMLCOUNT((unsigned short)ispVMDataSize());
+            if (cRetCode != 0) {
+                return (cRetCode);
+            }
+            break;
+        case VUES:
+
+            /***************************************************************
+            *
+            * Set the flow control to verify USERCODE.
+            *
+            ***************************************************************/
+
+            g_usFlowControl |= VERIFYUES;
+            break;
+        case COMMENT:
+
+            /***************************************************************
+            *
+            * Display comment.
+            *
+            ***************************************************************/
+
+            ispVMComment((unsigned short)ispVMDataSize());
+            break;
+        case LVDS:
+
+            /***************************************************************
+            *
+            * Process LVDS command.
+            *
+            ***************************************************************/
+
+            ispVMProcessLVDS((unsigned short)ispVMDataSize());
+            break;
+        case HEADER:
+
+            /***************************************************************
+            *
+            * Discard header.
+            *
+            ***************************************************************/
+
+            ispVMHeader((unsigned short)ispVMDataSize());
+            break;
+            /* 03/14/06 Support Toggle ispENABLE signal*/
+        case ispEN:
+            ucState = GetByte();
+            if ((ucState == ON) || (ucState == 0x01))
+                writePort(JTAG_ENABLE, 0x01);
+            else
+                writePort(JTAG_ENABLE, 0x00);
+            ispVMDelay(1);
+            break;
+            /* 05/24/06 support Toggle TRST pin*/
+        case TRST:
+            ucState = GetByte();
+            if (ucState == 0x01)
+                writePort(JTAG_TRST, 0x01);
+            else
+                writePort(JTAG_TRST, 0x00);
+            ispVMDelay(1);
+            break;
+        default:
+
+            /***************************************************************
+            *
+            * Invalid opcode encountered.
+            *
+            ***************************************************************/
+
+#ifdef VME_DEBUG
+            printf("\nINVALID OPCODE: 0x%.2X\n", cOpcode);
+#endif //VME_DEBUG
+
+            return VME_INVALID_FILE;
+        }
+    }
+
+    /***************************************************************
+    *
+    * Invalid exit point. Processing the token 'ENDVME' is the only
+    * valid way to exit the embedded engine.
+    *
+    ***************************************************************/
+
+    return (VME_INVALID_FILE);
+}
+
+/***************************************************************
+*
+* ispVMDataCode
+*
+* Processes the TDI/TDO/MASK/DMASK etc of an SIR/SDR command.
+*
+***************************************************************/
+
+signed char ispVMDataCode()
+{
+    //09/11/07 NN added local variables initialization
+    signed char cDataByte    = 0;
+    signed char siDataSource = 0;  /*source of data from file by default*/
+
+    if (g_usDataType & HEAP_IN) {
+        siDataSource = 1;  /*the source of data from memory*/
+    }
+
+    /****************************************************************************
+    *
+    * Clear the data type register.
+    *
+    *****************************************************************************/
+
+    g_usDataType &= ~(MASK_DATA + TDI_DATA + TDO_DATA + DMASK_DATA + CMASK_DATA);
+
+    /****************************************************************************
+    *
+    * Iterate through SIR/SDR command and look for TDI, TDO, MASK, etc.
+    *
+    *****************************************************************************/
+
+    while ((cDataByte = GetByte()) >= 0) {
+
+        ispVMMemManager(cDataByte, g_usMaxSize);
+        switch (cDataByte) {
+        case TDI:
+
+            /****************************************************************************
+            *
+            * Store the maximum size of the TDI buffer. Used to convert VME to HEX.
+            *
+            *****************************************************************************/
+
+            if (g_usiDataSize > g_usTDISize) {
+                g_usTDISize = g_usiDataSize;
+            }
+            /****************************************************************************
+            *
+            * Updated data type register to indicate that TDI data is currently being
+            * used. Process the data in the VME file into the TDI buffer.
+            *
+            *****************************************************************************/
+
+            g_usDataType |= TDI_DATA;
+            ispVMData(g_pucInData);
+            break;
+        case XTDO:
+
+            /****************************************************************************
+            *
+            * Store the maximum size of the TDO buffer. Used to convert VME to HEX.
+            *
+            *****************************************************************************/
+
+            if (g_usiDataSize > g_usTDOSize) {
+                g_usTDOSize = g_usiDataSize;
+            }
+
+            /****************************************************************************
+            *
+            * Updated data type register to indicate that TDO data is currently being
+            * used.
+            *
+            *****************************************************************************/
+
+            g_usDataType |= TDO_DATA;
+            break;
+        case TDO:
+
+            /****************************************************************************
+            *
+            * Store the maximum size of the TDO buffer. Used to convert VME to HEX.
+            *
+            *****************************************************************************/
+
+            if (g_usiDataSize > g_usTDOSize) {
+                g_usTDOSize = g_usiDataSize;
+            }
+
+            /****************************************************************************
+            *
+            * Updated data type register to indicate that TDO data is currently being
+            * used. Process the data in the VME file into the TDO buffer.
+            *
+            *****************************************************************************/
+
+            g_usDataType |= TDO_DATA;
+            ispVMData(g_pucOutData);
+            break;
+        case MASK:
+
+            /****************************************************************************
+            *
+            * Store the maximum size of the MASK buffer. Used to convert VME to HEX.
+            *
+            *****************************************************************************/
+
+            if (g_usiDataSize > g_usMASKSize) {
+                g_usMASKSize = g_usiDataSize;
+            }
+
+            /****************************************************************************
+            *
+            * Updated data type register to indicate that MASK data is currently being
+            * used. Process the data in the VME file into the MASK buffer.
+            *
+            *****************************************************************************/
+
+            g_usDataType |= MASK_DATA;
+            ispVMData(g_pucOutMaskData);
+            break;
+        case DMASK:
+
+            /****************************************************************************
+            *
+            * Store the maximum size of the DMASK buffer. Used to convert VME to HEX.
+            *
+            *****************************************************************************/
+
+            if (g_usiDataSize > g_usDMASKSize) {
+                g_usDMASKSize = g_usiDataSize;
+            }
+
+            /****************************************************************************
+            *
+            * Updated data type register to indicate that DMASK data is currently being
+            * used. Process the data in the VME file into the DMASK buffer.
+            *
+            *****************************************************************************/
+
+            g_usDataType |= DMASK_DATA;
+            ispVMData(g_pucOutDMaskData);
+            break;
+        case CMASK:
+
+            /****************************************************************************
+            *
+            * Updated data type register to indicate that CMASK data is currently being
+            * used. Process the data in the VME file into the CMASK buffer.
+            *
+            *****************************************************************************/
+
+            g_usDataType |= CMASK_DATA;
+            ispVMData(g_pucOutMaskData);
+            break;
+        case CONTINUE:
+            return (0);
+        default:
+
+            /****************************************************************************
+            *
+            * Encountered invalid opcode.
+            *
+            *****************************************************************************/
+
+            return (VME_INVALID_FILE);
+        }
+
+        switch (cDataByte) {
+        case TDI:
+
+            /****************************************************************************
+            *
+            * Left bit shift. Used when performing algorithm looping.
+            *
+            *****************************************************************************/
+
+            if (g_usFlowControl & SHIFTLEFT) {
+                ispVMBitShift(SHL, g_usShiftValue);
+                g_usFlowControl &= ~SHIFTLEFT;
+            }
+
+            /****************************************************************************
+            *
+            * Right bit shift. Used when performing algorithm looping.
+            *
+            *****************************************************************************/
+
+            if (g_usFlowControl & SHIFTRIGHT) {
+                ispVMBitShift(SHR, g_usShiftValue);
+                g_usFlowControl &= ~SHIFTRIGHT;
+            }
+        default:
+            break;
+        }
+
+        if (siDataSource) {
+            g_usDataType |= HEAP_IN;  /*restore data from memory*/
+        }
+    }
+
+    if (siDataSource) {  /*fetch data from heap memory upon return*/
+        g_usDataType |= HEAP_IN;
+    }
+
+    if (cDataByte < 0) {
+
+        /****************************************************************************
+        *
+        * Encountered invalid opcode.
+        *
+        *****************************************************************************/
+
+        return (VME_INVALID_FILE);
+    } else {
+        return (0);
+    }
+}
+
+/***************************************************************
+*
+* ispVMData
+* Extract one row of data operand from the current data type opcode. Perform
+* the decompression if necessary. Extra RAM is not required for the
+* decompression process. The decompression scheme employed in this module
+* is on row by row basis. The format of the data stream:
+* [compression code][compressed data stream]
+* 0x00    --No compression
+* 0x01    --Compress by 0x00.
+*           Example:
+*           Original stream:   0x000000000000000000000001
+*           Compressed stream: 0x01000901
+*           Detail:            0x01 is the code, 0x00 is the key,
+*                              0x09 is the count of 0x00 bytes,
+*                              0x01 is the uncompressed byte.
+* 0x02    --Compress by 0xFF.
+*           Example:
+*           Original stream:   0xFFFFFFFFFFFFFFFFFFFFFF01
+*           Compressed stream: 0x02FF0901
+*           Detail:            0x02 is the code, 0xFF is the key,
+*                              0x09 is the count of 0xFF bytes,
+*                              0x01 is the uncompressed byte.
+* 0x03
+* : :
+* 0xFE   -- Compress by nibble blocks.
+*           Example:
+*           Original stream:   0x84210842108421084210
+*           Compressed stream: 0x0584210
+*           Detail:            0x05 is the code, means 5 nibbles block.
+*                              0x84210 is the 5 nibble blocks.
+*                              The whole row is 80 bits given by g_usiDataSize.
+*                              The number of times the block repeat itself
+*                              is found by g_usiDataSize/(4*0x05) which is 4.
+* 0xFF   -- Compress by the most frequently happen byte.
+*           Example:
+*           Original stream:   0x04020401030904040404
+*           Compressed stream: 0xFF04(0,1,0x02,0,1,0x01,1,0x03,1,0x09,0,0,0)
+*                          or: 0xFF044090181C240
+*           Detail:            0xFF is the code, 0x04 is the key.
+*                              a bit of 0 represent the key shall be put into
+*                              the current bit position and a bit of 1
+*                              represent copying the next of 8 bits of data
+*                              in.
+*
+***************************************************************/
+
+void ispVMData(unsigned char *ByteData)
+{
+    //09/11/07 NN added local variables initialization
+    unsigned short size               = 0;
+    unsigned short i, j, m, getData   = 0;
+    unsigned char cDataByte           = 0;
+    unsigned char compress            = 0;
+    unsigned short FFcount            = 0;
+    unsigned char compr_char          = 0xFF;
+    unsigned short index              = 0;
+    signed char compression           = 0;
+
+    /*convert number in bits to bytes*/
+    if (g_usiDataSize % 8 > 0) {
+        //09/11/07 NN Type cast mismatch variables
+        size = (unsigned short)(g_usiDataSize / 8 + 1);
+    } else {
+        //09/11/07 NN Type cast mismatch variables
+        size = (unsigned short)(g_usiDataSize / 8);
+    }
+
+    /* If there is compression, then check if compress by key of 0x00 or 0xFF
+       or by other keys or by nibble blocks*/
+
+    if (g_usDataType & COMPRESS) {
+        compression = 1;
+        if (((compress = GetByte()) == VAR) && (g_usDataType & HEAP_IN)) {
+            getData = 1;
+            g_usDataType &= ~(HEAP_IN);
+            compress = GetByte();
+        }
+
+        switch (compress) {
+        case 0x00:
+            /* No compression */
+            compression = 0;
+            break;
+        case 0x01:
+            /* Compress by byte 0x00 */
+            compr_char = 0x00;
+            break;
+        case 0x02:
+            /* Compress by byte 0xFF */
+            compr_char = 0xFF;
+            break;
+        case 0xFF:
+            /* Huffman encoding */
+            compr_char = GetByte();
+            i = 8;
+            for (index = 0; index < size; index++) {
+                ByteData[index] = 0x00;
+                if (i > 7) {
+                    cDataByte = GetByte();
+                    i = 0;
+                }
+                if ((cDataByte << i++) & 0x80)
+                    m = 8;
+                else {
+                    ByteData[index] = compr_char;
+                    m = 0;
+                }
+
+                for (j = 0; j < m; j++) {
+                    if (i > 7) {
+                        cDataByte = GetByte();
+                        i = 0;
+                    }
+                    ByteData[index] |= ((cDataByte << i++) & 0x80) >> j;
+                }
+            }
+            size = 0;
+            break;
+        default:
+            for (index = 0; index < size; index++)
+                ByteData[index] = 0x00;
+            for (index = 0; index < compress; index++) {
+                if (index % 2 == 0)
+                    cDataByte = GetByte();
+                for (i = 0; i < size * 2 / compress; i++) {
+                    //09/11/07 NN Type cast mismatch variables
+                    j = (unsigned short)(index + (i * (unsigned short)compress));
+                    /*clear the nibble to zero first*/
+                    if (j % 2) {
+                        if (index % 2)
+                            ByteData[j / 2] |= cDataByte & 0x0F;
+                        else
+                            ByteData[j / 2] |= cDataByte >> 4;
+                    } else {
+                        if (index % 2)
+                            ByteData[j / 2] |= cDataByte << 4;
+                        else
+                            ByteData[j / 2] |= cDataByte & 0xF0;
+                    }
+                }
+            }
+            size = 0;
+            break;
+        }
+    }
+
+    FFcount = 0;
+
+    /* Decompress by byte 0x00 or 0xFF */
+    for (index = 0; index < size; index++) {
+        if (FFcount <= 0) {
+            cDataByte = GetByte();
+            if ((cDataByte == VAR) && (g_usDataType & HEAP_IN) && !getData && !(g_usDataType & COMPRESS)) {
+                getData = 1;
+                g_usDataType &= ~(HEAP_IN);
+                cDataByte = GetByte();
+            }
+            ByteData[index] = cDataByte;
+            if ((compression) && (cDataByte == compr_char)) /*decompression is on*/
+                //09/11/07 NN Type cast mismatch variables
+                FFcount = (unsigned short)ispVMDataSize();     /*The number of 0xFF or 0x00 bytes*/
+        } else {
+            FFcount--; /*Use up the 0xFF chain first*/
+            ByteData[index] = compr_char;
+        }
+    }
+
+    if (getData) {
+        g_usDataType |= HEAP_IN;
+        getData = 0;
+    }
+}
+
+/***************************************************************
+*
+* ispVMShift
+*
+* Processes the SDR/XSDR/SIR commands.
+*
+***************************************************************/
+
+signed char ispVMShift(signed char a_cCode)
+{
+    //09/11/07 NN added local variables initialization
+    unsigned short iDataIndex  = 0;
+    unsigned short iReadLoop   = 0;
+    signed char cRetCode       = 0;
+
+    cRetCode = 0;
+    //09/11/07 NN Type cast mismatch variables
+    g_usiDataSize = (unsigned short)ispVMDataSize();
+
+    g_usDataType &= ~(SIR_DATA + EXPRESS + SDR_DATA);   /*clear the flags first*/
+
+    switch (a_cCode) {
+    case SIR:
+        g_usDataType |= SIR_DATA;
+        /* 1/15/04 If performing cascading, then go directly to SHIFTIR.  Else,
+           go to IRPAUSE before going to SHIFTIR */
+        if (g_usFlowControl & CASCADE) {
+            ispVMStateMachine(SHIFTIR);
+        } else {
+            ispVMStateMachine(IRPAUSE);
+            ispVMStateMachine(SHIFTIR);
+            if (g_usHeadIR > 0) {
+                ispVMBypass(HIR, g_usHeadIR);
+                sclock();
+            }
+        }
+        break;
+    case XSDR:
+        g_usDataType |= EXPRESS; /*mark simultaneous in and out*/
+    case SDR:
+        g_usDataType |= SDR_DATA;
+        /* 1/15/04 If already in SHIFTDR, then do not move state or shift in header.
+           This would imply that the previously shifted frame was a cascaded frame.  */
+        if (g_cCurrentJTAGState != SHIFTDR) {
+            /* 1/15/04 If performing cascading, then go directly to SHIFTDR.  Else,
+               go to DRPAUSE before going to SHIFTDR */
+            if (g_usFlowControl & CASCADE) {
+                if (g_cCurrentJTAGState == DRPAUSE) {
+                    ispVMStateMachine(SHIFTDR);
+                    /* 1/15/04 If cascade flag has been set and the current state is
+                       DRPAUSE, this implies that the first cascaded frame is about to
+                       be shifted in.  The header must be shifted prior to shifting
+                       the first cascaded frame. */
+                    if (g_usHeadDR > 0) {
+                        ispVMBypass(HDR, g_usHeadDR);
+                        sclock();
+                    }
+                } else {
+                    ispVMStateMachine(SHIFTDR);
+                }
+            } else {
+                ispVMStateMachine(DRPAUSE);
+                ispVMStateMachine(SHIFTDR);
+                if (g_usHeadDR > 0) {
+                    ispVMBypass(HDR, g_usHeadDR);
+                    sclock();
+                }
+            }
+        }
+        break;
+    default:
+        return (VME_INVALID_FILE);
+    }
+
+    cRetCode = ispVMDataCode();
+    if (cRetCode != 0) {
+        return (VME_INVALID_FILE);
+    }
+
+#ifdef VME_DEBUG
+    if (g_usDataType & TDI_DATA) {
+        printf("\n\t\tTDI ");
+        PrintData(g_usiDataSize, g_pucInData);
+    }
+
+    if (g_usDataType & TDO_DATA) {
+        printf("\n\t\tTDO ");
+        PrintData(g_usiDataSize, g_pucOutData);
+    }
+
+    if (g_usDataType & MASK_DATA) {
+        printf("\n\t\tMASK ");
+        PrintData(g_usiDataSize, g_pucOutMaskData);
+    }
+
+    if (g_usDataType & DMASK_DATA) {
+        printf("\n\t\tDMASK ");
+        PrintData(g_usiDataSize, g_pucOutDMaskData);
+    }
+
+    printf(";\n");
+#endif //VME_DEBUG
+    if (g_usDataType & TDO_DATA || g_usDataType & DMASK_DATA) {
+        if (g_usDataType & DMASK_DATA) {
+
+            cRetCode = ispVMReadandSave(g_usiDataSize);
+
+            if (!cRetCode) {
+                if (g_usTailDR > 0) {
+                    sclock();
+                    ispVMBypass(TDR, g_usTailDR);
+                }
+                ispVMStateMachine(DRPAUSE);
+                ispVMStateMachine(SHIFTDR);
+                if (g_usHeadDR > 0) {
+                    ispVMBypass(HDR, g_usHeadDR);
+                    sclock();
+                }
+                for (iDataIndex = 0; iDataIndex < g_usiDataSize / 8 + 1; iDataIndex++)
+                    g_pucInData[iDataIndex] = g_pucOutData[iDataIndex];
+                g_usDataType &= ~(TDO_DATA + DMASK_DATA);
+                cRetCode = ispVMSend(g_usiDataSize);
+            }
+        } else {
+
+                 cRetCode = ispVMRead(g_usiDataSize);
+            if (cRetCode == -1 && g_cVendor == XILINX) {
+                for (iReadLoop = 0; iReadLoop < 30; iReadLoop++) {
+                    cRetCode = ispVMRead(g_usiDataSize);
+                    if (!cRetCode) {
+                        break;
+                    } else {
+                        ispVMStateMachine(DRPAUSE); /*Always DRPAUSE*/
+                        /*Bypass other devices when appropriate*/
+                        ispVMBypass(TDR, g_usTailDR);
+                        ispVMStateMachine(g_ucEndDR);
+                        ispVMStateMachine(IDLE);
+                        ispVMDelay(1000);
+                    }
+                }
+            }
+        }
+    } else { /*TDI only*/
+        cRetCode = ispVMSend(g_usiDataSize);
+
+    }
+
+    /*transfer the input data to the output buffer for the next verify*/
+    if ((g_usDataType & EXPRESS) || (a_cCode == SDR)) {
+        if (g_pucOutData) {
+            for (iDataIndex = 0; iDataIndex < g_usiDataSize / 8 + 1; iDataIndex++)
+                g_pucOutData[iDataIndex] = g_pucInData[iDataIndex];
+        }
+    }
+
+    switch (a_cCode) {
+    case SIR:
+        /* 1/15/04 If not performing cascading, then shift ENDIR */
+        if (!(g_usFlowControl & CASCADE)) {
+            if (g_usTailIR > 0) {
+                sclock();
+                ispVMBypass(TIR, g_usTailIR);
+            }
+            ispVMStateMachine(g_ucEndIR);
+        }
+        break;
+    case XSDR:
+    case SDR:
+        /* 1/15/04 If not performing cascading, then shift ENDDR */
+        if (!(g_usFlowControl & CASCADE)) {
+            if (g_usTailDR > 0) {
+                sclock();
+                ispVMBypass(TDR, g_usTailDR);
+            }
+            ispVMStateMachine(g_ucEndDR);
+        }
+        break;
+    default:
+        break;
+    }
+
+    return (cRetCode);
+}
+
+/***************************************************************
+*
+* ispVMAmble
+*
+* This routine is to extract Header and Trailer parameter for SIR and
+* SDR operations.
+*
+* The Header and Trailer parameter are the pre-amble and post-amble bit
+* stream need to be shifted into TDI or out of TDO of the devices. Mostly
+* is for the purpose of bypassing the leading or trailing devices. ispVM
+* supports only shifting data into TDI to bypass the devices.
+*
+* For a single device, the header and trailer parameters are all set to 0
+* as default by ispVM. If it is for multiple devices, the header and trailer
+* value will change as specified by the VME file.
+*
+***************************************************************/
+
+signed char ispVMAmble(signed char Code)
+{
+    signed char compress = 0;
+    //09/11/07 NN Type cast mismatch variables
+    g_usiDataSize = (unsigned short)ispVMDataSize();
+
+#ifdef VME_DEBUG
+    printf("%d", g_usiDataSize);
+#endif //VME_DEBUG
+
+    if (g_usiDataSize) {
+
+        /****************************************************************************
+        *
+        * Discard the TDI byte and set the compression bit in the data type register
+        * to false if compression is set because TDI data after HIR/HDR/TIR/TDR is not
+        * compressed.
+        *
+        *****************************************************************************/
+
+        GetByte();
+        if (g_usDataType & COMPRESS) {
+            g_usDataType &= ~(COMPRESS);
+            compress = 1;
+        }
+    }
+
+    switch (Code) {
+    case HIR:
+
+        /****************************************************************************
+        *
+        * Store the maximum size of the HIR buffer. Used to convert VME to HEX.
+        *
+        *****************************************************************************/
+
+        if (g_usiDataSize > g_usHIRSize) {
+            g_usHIRSize = g_usiDataSize;
+        }
+
+        /****************************************************************************
+        *
+        * Assign the HIR value and allocate memory.
+        *
+        *****************************************************************************/
+
+        g_usHeadIR = g_usiDataSize;
+        if (g_usHeadIR) {
+            ispVMMemManager(HIR, g_usHeadIR);
+            ispVMData(g_pucHIRData);
+
+#ifdef VME_DEBUG
+            printf(" TDI ");
+            PrintData(g_usHeadIR, g_pucHIRData);
+#endif //VME_DEBUG
+        }
+        break;
+    case TIR:
+
+        /****************************************************************************
+        *
+        * Store the maximum size of the TIR buffer. Used to convert VME to HEX.
+        *
+        *****************************************************************************/
+
+        if (g_usiDataSize > g_usTIRSize) {
+            g_usTIRSize = g_usiDataSize;
+        }
+
+        /****************************************************************************
+        *
+        * Assign the TIR value and allocate memory.
+        *
+        *****************************************************************************/
+
+        g_usTailIR = g_usiDataSize;
+        if (g_usTailIR) {
+            ispVMMemManager(TIR, g_usTailIR);
+            ispVMData(g_pucTIRData);
+
+#ifdef VME_DEBUG
+            printf(" TDI ");
+            PrintData(g_usTailIR, g_pucTIRData);
+#endif //VME_DEBUG
+        }
+        break;
+    case HDR:
+
+        /****************************************************************************
+        *
+        * Store the maximum size of the HDR buffer. Used to convert VME to HEX.
+        *
+        *****************************************************************************/
+
+        if (g_usiDataSize > g_usHDRSize) {
+            g_usHDRSize = g_usiDataSize;
+        }
+
+        /****************************************************************************
+        *
+        * Assign the HDR value and allocate memory.
+        *
+        *****************************************************************************/
+
+        g_usHeadDR = g_usiDataSize;
+        if (g_usHeadDR) {
+            ispVMMemManager(HDR, g_usHeadDR);
+            ispVMData(g_pucHDRData);
+
+#ifdef VME_DEBUG
+            printf(" TDI ");
+            PrintData(g_usHeadDR, g_pucHDRData);
+#endif //VME_DEBUG
+        }
+        break;
+    case TDR:
+
+        /****************************************************************************
+        *
+        * Store the maximum size of the TDR buffer. Used to convert VME to HEX.
+        *
+        *****************************************************************************/
+
+        if (g_usiDataSize > g_usTDRSize) {
+            g_usTDRSize = g_usiDataSize;
+        }
+
+        /****************************************************************************
+        *
+        * Assign the TDR value and allocate memory.
+        *
+        *****************************************************************************/
+
+        g_usTailDR = g_usiDataSize;
+        if (g_usTailDR) {
+            ispVMMemManager(TDR, g_usTailDR);
+            ispVMData(g_pucTDRData);
+
+#ifdef VME_DEBUG
+            printf(" TDI ");
+            PrintData(g_usTailDR, g_pucTDRData);
+#endif //VME_DEBUG
+        }
+        break;
+    default:
+        break;
+    }
+
+    /****************************************************************************
+    *
+    * Re-enable compression if it was previously set.
+    *
+    *****************************************************************************/
+
+    if (compress) {
+        g_usDataType |= COMPRESS;
+    }
+
+    if (g_usiDataSize) {
+        Code = GetByte();
+        if (Code == CONTINUE) {
+            return 0;
+        } else {
+
+            /****************************************************************************
+            *
+            * Encountered invalid opcode.
+            *
+            *****************************************************************************/
+
+            return VME_INVALID_FILE;
+        }
+    }
+
+    return 0;
+}
+
+/***************************************************************
+*
+* ispVMLoop
+*
+* Perform the function call upon by the REPEAT opcode.
+* Memory is to be allocated to store the entire loop from REPEAT to ENDLOOP.
+* After the loop is stored then execution begin. The REPEATLOOP flag is set
+* on the g_usFlowControl register to indicate the repeat loop is in session
+* and therefore fetch opcode from the memory instead of from the file.
+*
+***************************************************************/
+
+signed char ispVMLoop(unsigned short a_usLoopCount)
+{
+    //09/11/07 NN added local variables initialization
+    signed char cRetCode      = 0;
+    unsigned short iHeapIndex = 0;
+    unsigned short iLoopIndex = 0;
+
+    g_usShiftValue = 0;
+    for (iHeapIndex = 0; iHeapIndex < g_iHEAPSize; iHeapIndex++) {
+        g_pucHeapMemory[iHeapIndex] = GetByte();
+    }
+
+    if (g_pucHeapMemory[iHeapIndex - 1] != ENDLOOP) {
+        return (VME_INVALID_FILE);
+    }
+
+    g_usFlowControl |= REPEATLOOP;
+    g_usDataType |= HEAP_IN;
+
+    for (iLoopIndex = 0; iLoopIndex < a_usLoopCount; iLoopIndex++) {
+        g_iHeapCounter = 0;
+        cRetCode = ispVMCode();
+        g_usRepeatLoops++;
+        if (cRetCode < 0) {
+            break;
+        }
+    }
+
+    g_usDataType &= ~(HEAP_IN);
+    g_usFlowControl &= ~(REPEATLOOP);
+    return (cRetCode);
+}
+
+/***************************************************************
+*
+* ispVMBitShift
+*
+* Shift the TDI stream left or right by the number of bits. The data in
+* *g_pucInData is of the VME format, so the actual shifting is the reverse of
+* IEEE 1532 or SVF format.
+*
+***************************************************************/
+
+signed char ispVMBitShift(signed char mode, unsigned short bits)
+{
+    //09/11/07 NN added local variables initialization
+    unsigned short i       = 0;
+    unsigned short size    = 0;
+    unsigned short tmpbits = 0;
+
+    if (g_usiDataSize % 8 > 0) {
+        //09/11/07 NN Type cast mismatch variables
+        size = (unsigned short)(g_usiDataSize / 8 + 1);
+    } else {
+        //09/11/07 NN Type cast mismatch variables
+        size = (unsigned short)(g_usiDataSize / 8);
+    }
+
+    switch (mode) {
+    case SHR:
+        for (i = 0; i < size; i++) {
+            if (g_pucInData[i] != 0) {
+                tmpbits = bits;
+                while (tmpbits > 0) {
+                    g_pucInData[i] <<= 1;
+                    if (g_pucInData[i] == 0) {
+                        i--;
+                        g_pucInData[i] = 1;
+                    }
+                    tmpbits--;
+                }
+            }
+        }
+        break;
+    case SHL:
+        for (i = 0; i < size; i++) {
+            if (g_pucInData[i] != 0) {
+                tmpbits = bits;
+                while (tmpbits > 0) {
+                    g_pucInData[i] >>= 1;
+                    if (g_pucInData[i] == 0) {
+                        i--;
+                        g_pucInData[i] = 8;
+                    }
+                    tmpbits--;
+                }
+            }
+        }
+        break;
+    default:
+        return (VME_INVALID_FILE);
+    }
+
+    return (0);
+}
+
+/***************************************************************
+*
+* ispVMComment
+*
+* Displays the SVF comments.
+*
+***************************************************************/
+
+void ispVMComment(unsigned short a_usCommentSize)
+{
+    char cCurByte = 0;
+    for (; a_usCommentSize > 0; a_usCommentSize--) {
+        /****************************************************************************
+        *
+        * Print character to the terminal.
+        *
+        *****************************************************************************/
+        cCurByte = GetByte();
+        vme_out_char(cCurByte);
+    }
+    cCurByte = '\n';
+    vme_out_char(cCurByte);
+}
+
+/***************************************************************
+*
+* ispVMHeader
+*
+* Iterate the length of the header and discard it.
+*
+***************************************************************/
+
+void ispVMHeader(unsigned short a_usHeaderSize)
+{
+    for (; a_usHeaderSize > 0; a_usHeaderSize--) {
+        GetByte();
+    }
+}
+
+/***************************************************************
+*
+* ispVMCalculateCRC32
+*
+* Calculate the 32-bit CRC.
+*
+***************************************************************/
+
+void ispVMCalculateCRC32(unsigned char a_ucData)
+{
+    //09/11/07 NN added local variables initialization
+    unsigned char ucIndex          = 0;
+    unsigned char ucFlipData       = 0;
+    unsigned short usCRCTableEntry = 0;
+    unsigned int crc_table[16] = {
+        0x0000, 0xCC01, 0xD801,
+        0x1400, 0xF001, 0x3C00,
+        0x2800, 0xE401, 0xA001,
+        0x6C00, 0x7800, 0xB401,
+        0x5000, 0x9C01, 0x8801,
+        0x4400
+    };
+
+    for (ucIndex = 0; ucIndex < 8; ucIndex++) {
+        ucFlipData <<= 1;
+        if (a_ucData & 0x01) {
+            ucFlipData |= 0x01;
+        }
+        a_ucData >>= 1;
+    }
+
+    //09/11/07 NN Type cast mismatch variables
+    usCRCTableEntry = (unsigned short)(crc_table[g_usCalculatedCRC & 0xF]);
+    g_usCalculatedCRC = (unsigned short)((g_usCalculatedCRC >> 4) & 0x0FFF);
+    g_usCalculatedCRC = (unsigned short)(g_usCalculatedCRC ^ usCRCTableEntry ^ crc_table[ucFlipData & 0xF]);
+    usCRCTableEntry = (unsigned short)(crc_table[g_usCalculatedCRC & 0xF]);
+    g_usCalculatedCRC = (unsigned short)((g_usCalculatedCRC >> 4) & 0x0FFF);
+    g_usCalculatedCRC = (unsigned short)(g_usCalculatedCRC ^ usCRCTableEntry ^ crc_table[(ucFlipData >> 4) & 0xF]);
+}
+
+/***************************************************************
+*
+* ispVMLCOUNT
+*
+* Process the intelligent programming loops.
+*
+***************************************************************/
+
+signed char ispVMLCOUNT(unsigned short a_usCountSize)
+{
+    unsigned short usContinue         = 1;
+    unsigned short usIntelBufferIndex = 0;
+    unsigned short usCountIndex       = 0;
+    signed char cRetCode              = 0;
+    signed char cRepeatHeap           = 0;
+    signed char cOpcode               = 0;
+    unsigned char ucState             = 0;
+    unsigned short usDelay            = 0;
+    unsigned short usToggle           = 0;
+
+    g_usIntelBufferSize = (unsigned short)ispVMDataSize();
+
+    /****************************************************************************
+    *
+    * Allocate memory for intel buffer.
+    *
+    *****************************************************************************/
+
+    ispVMMemManager(LHEAP, g_usIntelBufferSize);
+
+    /****************************************************************************
+    *
+    * Store the maximum size of the intelligent buffer. Used to convert VME to HEX.
+    *
+    *****************************************************************************/
+
+    if (g_usIntelBufferSize > g_usLCOUNTSize) {
+        g_usLCOUNTSize = g_usIntelBufferSize;
+    }
+
+    /****************************************************************************
+    *
+    * Copy intel data to the buffer.
+    *
+    *****************************************************************************/
+
+    for (usIntelBufferIndex = 0; usIntelBufferIndex < g_usIntelBufferSize; usIntelBufferIndex++) {
+        g_pucIntelBuffer[usIntelBufferIndex] = GetByte();
+    }
+
+    /****************************************************************************
+    *
+    * Set the data type register to get data from the intelligent data buffer.
+    *
+    *****************************************************************************/
+
+    g_usDataType |= LHEAP_IN;
+
+    /****************************************************************************
+    *
+    * If the HEAP_IN flag is set, temporarily unset the flag so data will be
+    * retrieved from the status buffer.
+    *
+    *****************************************************************************/
+
+    if (g_usDataType & HEAP_IN) {
+        g_usDataType &= ~HEAP_IN;
+        cRepeatHeap = 1;
+    }
+
+#ifdef VME_DEBUG
+    printf("LCOUNT %d;\n", a_usCountSize);
+#endif //VME_DEBUG
+
+    /****************************************************************************
+    *
+    * Iterate through the intelligent programming command.
+    *
+    *****************************************************************************/
+
+    for (usCountIndex = 0; usCountIndex < a_usCountSize; usCountIndex++) {
+
+        /****************************************************************************
+        *
+        * Initialize the intel data index to 0 before each iteration.
+        *
+        *****************************************************************************/
+
+        g_usIntelDataIndex = 0;
+        cOpcode            = 0;
+        ucState            = 0;
+        usDelay            = 0;
+        usToggle           = 0;
+        usContinue         = 1;
+
+        /***************************************************************
+        *
+        * Begin looping through all the VME opcodes.
+        *
+        ***************************************************************/
+        /***************************************************************
+        * 4/1/09 Nguyen replaced the recursive function call codes on
+        *        the ispVMLCOUNT function
+        *
+        ***************************************************************/
+        while (usContinue) {
+            cOpcode = GetByte();
+            switch (cOpcode) {
+            case HIR:
+            case TIR:
+            case HDR:
+            case TDR:
+                /***************************************************************
+                *
+                * Set the header/trailer of the device in order to bypass
+                * successfully.
+                *
+                ***************************************************************/
+
+                ispVMAmble(cOpcode);
+                break;
+            case STATE:
+
+                /***************************************************************
+                *
+                * Step the JTAG state machine.
+                *
+                ***************************************************************/
+
+                ucState = GetByte();
+                /***************************************************************
+                *
+                * Step the JTAG state machine to DRCAPTURE to support Looping.
+                *
+                ***************************************************************/
+
+                if ((g_usDataType & LHEAP_IN) &&
+                    (ucState == DRPAUSE) &&
+                    (g_cCurrentJTAGState == ucState)) {
+                    ispVMStateMachine(DRCAPTURE);
+                }
+                ispVMStateMachine(ucState);
+#ifdef VME_DEBUG
+                printf("LDELAY %s ", GetState(ucState));
+#endif //VME_DEBUG
+                break;
+            case SIR:
+#ifdef VME_DEBUG
+                printf("SIR ");
+#endif //VME_DEBUG
+                /***************************************************************
+                *
+                * Shift in data into the device.
+                *
+                ***************************************************************/
+
+                cRetCode = ispVMShift(cOpcode);
+                break;
+            case SDR:
+
+#ifdef VME_DEBUG
+                printf("LSDR ");
+#endif //VME_DEBUG
+                /***************************************************************
+                *
+                * Shift in data into the device.
+                *
+                ***************************************************************/
+
+                cRetCode = ispVMShift(cOpcode);
+                break;
+            case WAIT:
+
+                /***************************************************************
+                *
+                * Observe delay.
+                *
+                ***************************************************************/
+
+                usDelay = (unsigned short)ispVMDataSize();
+                ispVMDelay(usDelay);
+
+#ifdef VME_DEBUG
+                if (usDelay & 0x8000) {
+
+                    /***************************************************************
+                    *
+                    * Since MSB is set, the delay time must be decoded to
+                    * millisecond. The SVF2VME encodes the MSB to represent
+                    * millisecond.
+                    *
+                    ***************************************************************/
+
+                    usDelay &= ~0x8000;
+                    printf("%.2E SEC;\n", (float)usDelay / 1000);
+                } else {
+
+                    /***************************************************************
+                    *
+                    * Since MSB is not set, the delay time is given as microseconds.
+                    *
+                    ***************************************************************/
+
+                    printf("%.2E SEC;\n", (float)usDelay / 1000000);
+                }
+#endif //VME_DEBUG
+                break;
+            case TCK:
+
+                /***************************************************************
+                *
+                * Issue clock toggles.
+                *
+                ***************************************************************/
+
+                usToggle = (unsigned short)ispVMDataSize();
+                ispVMClocks(usToggle);
+
+#ifdef VME_DEBUG
+                printf("RUNTEST %d TCK;\n", usToggle);
+#endif //VME_DEBUG
+                break;
+            case ENDLOOP:
+
+                /***************************************************************
+                *
+                * Exit point from processing loops.
+                *
+                ***************************************************************/
+                usContinue = 0;
+                break;
+
+            case COMMENT:
+
+                /***************************************************************
+                *
+                * Display comment.
+                *
+                ***************************************************************/
+
+                ispVMComment((unsigned short)ispVMDataSize());
+                break;
+            case ispEN:
+                ucState = GetByte();
+                if ((ucState == ON) || (ucState == 0x01))
+                    writePort(JTAG_ENABLE, 0x01);
+                else
+                    writePort(JTAG_ENABLE, 0x00);
+                ispVMDelay(1);
+                break;
+            case TRST:
+                if (GetByte() == 0x01)
+                    writePort(JTAG_TRST, 0x01);
+                else
+                    writePort(JTAG_TRST, 0x00);
+                ispVMDelay(1);
+                break;
+            default:
+
+                /***************************************************************
+                *
+                * Invalid opcode encountered.
+                *
+                ***************************************************************/
+
+#ifdef VME_DEBUG
+                printf("\nINVALID OPCODE: 0x%.2X\n", cOpcode);
+#endif //VME_DEBUG
+
+                return VME_INVALID_FILE;
+            }
+        }
+        if (cRetCode >= 0) {
+            /****************************************************************************
+            *
+            * Break if intelligent programming is successful.
+            *
+            *****************************************************************************/
+
+            break;
+        }
+
+    }
+    /****************************************************************************
+    *
+    * If HEAP_IN flag was temporarily disabled, re-enable it before exiting.
+    *
+    *****************************************************************************/
+
+    if (cRepeatHeap) {
+        g_usDataType |= HEAP_IN;
+    }
+
+    /****************************************************************************
+    *
+    * Set the data type register to not get data from the intelligent data buffer.
+    *
+    *****************************************************************************/
+
+    g_usDataType &= ~LHEAP_IN;
+    return cRetCode;
+}
+
+/***************************************************************
+*
+* ispVMClocks
+*
+* Applies the specified number of pulses to TCK.
+*
+***************************************************************/
+
+void ispVMClocks(unsigned short Clocks)
+{
+    unsigned short iClockIndex = 0;
+    for (iClockIndex = 0; iClockIndex < Clocks; iClockIndex++) {
+        sclock();
+    }
+}
+
+/***************************************************************
+*
+* ispVMBypass
+*
+* This procedure takes care of the HIR, HDR, TIR, TDR for the
+* purpose of putting the other devices into Bypass mode. The
+* current state is checked to find out if it is at DRPAUSE or
+* IRPAUSE. If it is at DRPAUSE, perform bypass register scan.
+* If it is at IRPAUSE, scan into instruction registers the bypass
+* instruction.
+*
+***************************************************************/
+
+void ispVMBypass(signed char ScanType, unsigned short Bits)
+{
+    //09/11/07 NN added local variables initialization
+    unsigned short iIndex       = 0;
+    unsigned short iSourceIndex = 0;
+    unsigned char cBitState     = 0;
+    unsigned char cCurByte      = 0;
+    unsigned char *pcSource    = NULL;
+
+    if (Bits <= 0) {
+        return;
+    }
+
+    switch (ScanType) {
+    case HIR:
+        pcSource = g_pucHIRData;
+        break;
+    case TIR:
+        pcSource = g_pucTIRData;
+        break;
+    case HDR:
+        pcSource = g_pucHDRData;
+        break;
+    case TDR:
+        pcSource = g_pucTDRData;
+        break;
+    default:
+        break;
+    }
+    if (pcSource) {
+        iSourceIndex = 0;
+        cBitState = 0;
+        for (iIndex = 0; iIndex < Bits - 1; iIndex++) {
+            /* Scan instruction or bypass register */
+            if (iIndex % 8 == 0) {
+                cCurByte = pcSource[iSourceIndex++];
+            }
+            cBitState = (unsigned char)(((cCurByte << iIndex % 8) & 0x80) ? 0x01 : 0x00);
+            writePort(JTAG_TDI, cBitState);
+            sclock();
+        }
+
+        if (iIndex % 8 == 0)  {
+            cCurByte = pcSource[iSourceIndex++];
+        }
+
+        cBitState = (unsigned char)(((cCurByte << iIndex % 8) & 0x80) ? 0x01 : 0x00);
+        writePort(JTAG_TDI, cBitState);
+    }
+}
+
+/***************************************************************
+*
+* ispVMStateMachine
+*
+* This procedure steps all devices in the daisy chain from a given
+* JTAG state to the next desirable state. If the next state is TLR,
+* the JTAG state machine is brute forced into TLR by driving TMS
+* high and pulse TCK 6 times.
+*
+***************************************************************/
+
+void ispVMStateMachine(signed char cNextJTAGState)
+{
+    //09/11/07 NN added local variables initialization
+    signed char cPathIndex  = 0;
+    signed char cStateIndex = 0;
+    short int   found       = 0;
+
+    if ((g_cCurrentJTAGState == cNextJTAGState) && (cNextJTAGState != RESET)) {
+        return;
+    }
+
+    for (cStateIndex = 0; cStateIndex < 25; cStateIndex++) {
+        if ((g_cCurrentJTAGState == g_JTAGTransistions[cStateIndex].CurState) && (cNextJTAGState == g_JTAGTransistions[cStateIndex].NextState)) {
+            found = 1;
+            break;
+        }
+    }
+    if (found) {
+        g_cCurrentJTAGState = cNextJTAGState;
+        for (cPathIndex = 0; cPathIndex < g_JTAGTransistions[cStateIndex].Pulses; cPathIndex++) {
+            if ((g_JTAGTransistions[cStateIndex].Pattern << cPathIndex) & 0x80) {
+                writePort(JTAG_TMS, (unsigned char)0x01);
+            } else {
+                writePort(JTAG_TMS, (unsigned char)0x00);
+            }
+            sclock();
+        }
+
+        writePort(JTAG_TDI, 0x00);
+        writePort(JTAG_TMS, 0x00);
+    }
+}
+
+/***************************************************************
+*
+* ispVMStart
+*
+* Enable the port to the device and set the state to RESET (TLR).
+*
+***************************************************************/
+
+void ispVMStart()
+{
+#ifdef VME_DEBUG
+    printf("// ISPVM EMBEDDED ADDED\n");
+    printf("STATE RESET;\n");
+#endif
+
+    ispVMStateMachine(RESET);    /*step devices to RESET state*/
+
+}
+
+/***************************************************************
+*
+* ispVMEnd
+*
+* Set the state of devices to RESET to enable the devices and disable
+* the port.
+*
+***************************************************************/
+
+void ispVMEnd()
+{
+#ifdef VME_DEBUG
+    printf("// ISPVM EMBEDDED ADDED\n");
+    printf("STATE RESET;\n");
+    printf("RUNTEST 1.00E-001 SEC;\n");
+#endif
+
+    ispVMStateMachine(RESET);   /*step devices to RESET state */
+    ispVMDelay(1000);              /*wake up devices*/
+}
+
+/***************************************************************
+*
+* ispVMSend
+*
+* Send the TDI data stream to devices. The data stream can be
+* instructions or data.
+*
+***************************************************************/
+
+signed char ispVMSend(unsigned short a_usiDataSize)
+{
+    //09/11/07 NN added local variables initialization
+    unsigned short iIndex       = 0;
+    unsigned short iInDataIndex = 0;
+    unsigned char cCurByte      = 0;
+    unsigned char cBitState     = 0;
+
+    for (iIndex = 0; iIndex < a_usiDataSize - 1; iIndex++) {
+        if (iIndex % 8 == 0) {
+            cCurByte = g_pucInData[iInDataIndex++];
+        }
+        cBitState = (unsigned char)(((cCurByte << iIndex % 8) & 0x80) ? 0x01 : 0x00);
+        writePort(JTAG_TDI, cBitState);
+        sclock();
+    }
+
+    if (iIndex % 8 == 0) {
+        /* Take care of the last bit */
+        cCurByte = g_pucInData[iInDataIndex];
+    }
+
+    cBitState = (unsigned char)(((cCurByte << iIndex % 8) & 0x80) ? 0x01 : 0x00);
+
+    writePort(JTAG_TDI, cBitState);
+    if (g_usFlowControl & CASCADE) {
+        /* 1/15/04 Clock in last bit for the first n-1 cascaded frames */
+        sclock();
+    }
+
+    return 0;
+}
+
+/***************************************************************
+*
+* ispVMRead
+*
+* Read the data stream from devices and verify.
+*
+***************************************************************/
+
+signed char ispVMRead(unsigned short a_usiDataSize) //32
+{
+    //09/11/07 NN added local variables initialization
+    unsigned short usDataSizeIndex    = 0;
+    unsigned short usErrorCount       = 0;
+    unsigned short usLastBitIndex     = 0;
+    unsigned char cDataByte           = 0;
+    unsigned char cMaskByte           = 0;
+    unsigned char cInDataByte         = 0;
+    unsigned char cCurBit             = 0;
+    unsigned char cByteIndex          = 0;
+    unsigned short usBufferIndex      = 0;
+    unsigned char ucDisplayByte       = 0x00;
+    unsigned char ucDisplayFlag       = 0x01;
+    char StrChecksum[256] = { 0 };
+    unsigned char g_usCalculateChecksum = 0x00;
+
+    //09/11/07 NN Type cast mismatch variables
+    usLastBitIndex = (unsigned short)(a_usiDataSize - 1);
+
+    /****************************************************************************
+    *
+    * If mask is not all zeros, then set the display flag to 0x00, otherwise
+    * it shall be set to 0x01 to indicate that data read from the device shall
+    * be displayed. If VME_DEBUG is defined, always display data.
+    *
+    *****************************************************************************/
+
+    for (usDataSizeIndex = 0; usDataSizeIndex < (a_usiDataSize + 7) / 8; usDataSizeIndex++) {
+
+          if (g_usDataType & MASK_DATA) {
+            if (g_pucOutMaskData[usDataSizeIndex] != 0x00) {
+                ucDisplayFlag = 0x00;
+                break;
+            }
+        } else if (g_usDataType & CMASK_DATA) {
+            g_usCalculateChecksum = 0x01;
+            ucDisplayFlag = 0x00;
+            break;
+        } else {
+            ucDisplayFlag = 0x00;
+            break;
+        }
+    }
+
+    /****************************************************************************
+    *
+    * Begin shifting data in and out of the device.
+    *
+    *****************************************************************************/
+    for (usDataSizeIndex = 0; usDataSizeIndex < a_usiDataSize; usDataSizeIndex++) {
+        if (cByteIndex == 0) {
+
+            /***************************************************************
+            *
+            * Grab byte from TDO buffer.
+            *
+            ***************************************************************/
+
+            if (g_usDataType & TDO_DATA) {
+                cDataByte = g_pucOutData[usBufferIndex];
+            }
+
+            /***************************************************************
+            *
+            * Grab byte from MASK buffer.
+            *
+            ***************************************************************/
+
+            if (g_usDataType & MASK_DATA) {
+                cMaskByte = g_pucOutMaskData[usBufferIndex];
+            } else {
+                cMaskByte = 0xFF;
+            }
+
+            /***************************************************************
+            *
+            * Grab byte from CMASK buffer.
+            *
+            ***************************************************************/
+
+            if (g_usDataType & CMASK_DATA) {
+                cMaskByte = 0x00;
+                g_usCalculateChecksum = 0x01;
+            }
+
+            /***************************************************************
+            *
+            * Grab byte from TDI buffer.
+            *
+            ***************************************************************/
+
+            if (g_usDataType & TDI_DATA) {
+                cInDataByte = g_pucInData[usBufferIndex];
+            }
+
+            usBufferIndex++;
+        }
+
+        cCurBit = readPort();
+
+           if (ucDisplayFlag) {
+            ucDisplayByte <<= 1;
+            ucDisplayByte |= cCurBit;
+        }
+
+        /****************************************************************************
+        *
+        * Check if data read from port matches with expected TDO.
+        *
+        *****************************************************************************/
+
+        if (g_usDataType & TDO_DATA) {
+            //08/28/08 NN Added Calculate checksum support.
+            if (g_usCalculateChecksum) {
+                if (cCurBit == 0x01)
+                    g_usChecksum += (1 << (g_uiChecksumIndex % 8));
+                g_uiChecksumIndex++;
+            } else {
+                if ((((cMaskByte << cByteIndex) & 0x80) ? 0x01 : 0x00)) {
+                    if (cCurBit != (unsigned char)(((cDataByte << cByteIndex) & 0x80) ? 0x01 : 0x00)) {
+                        usErrorCount++;
+                    }
+                }
+            }
+        }
+
+        /****************************************************************************
+        *
+        * Write TDI data to the port.
+        *
+        *****************************************************************************/
+
+        writePort(JTAG_TDI, (unsigned char)(((cInDataByte << cByteIndex) & 0x80) ? 0x01 : 0x00));
+
+        if (usDataSizeIndex < usLastBitIndex) {
+
+            /****************************************************************************
+            *
+            * Clock data out from the data shift register.
+            *
+            *****************************************************************************/
+
+            sclock();
+        } else if (g_usFlowControl & CASCADE) {
+
+            /****************************************************************************
+            *
+            * Clock in last bit for the first N - 1 cascaded frames.
+            *
+            *****************************************************************************/
+
+            sclock();
+        }
+
+        /***************************************************************
+        *
+        * Increment the byte index. If it exceeds 7, then reset it back
+        * to zero.
+        *
+        ***************************************************************/
+
+        cByteIndex++;
+        if (cByteIndex >= 8) {
+            if (ucDisplayFlag) {
+
+                /***************************************************************
+                *
+                * Store displayed data in the TDO buffer. By reusing the TDO
+                * buffer to store displayed data, there is no need to allocate
+                * a buffer simply to hold display data. This will not cause any
+                * false verification errors because the true TDO byte has already
+                * been consumed.
+                *
+                ***************************************************************/
+
+                g_pucOutData[usBufferIndex - 1] = ucDisplayByte;
+                ucDisplayByte = 0;
+            }
+
+            cByteIndex = 0;
+        }
+        //09/12/07 Nguyen changed to display the 1 bit expected data
+        else if (a_usiDataSize == 1) {
+            if (ucDisplayFlag) {
+
+                /***************************************************************
+                *
+                * Store displayed data in the TDO buffer. By reusing the TDO
+                * buffer to store displayed data, there is no need to allocate
+                * a buffer simply to hold display data. This will not cause any
+                * false verification errors because the true TDO byte has already
+                * been consumed.
+                *
+                ***************************************************************/
+
+                /****************************************************************************
+                *
+                * Flip ucDisplayByte and store it in cDataByte.
+                *
+                *****************************************************************************/
+                cDataByte = 0x00;
+                for (usBufferIndex = 0; usBufferIndex < 8; usBufferIndex++) {
+                    cDataByte <<= 1;
+                    if (ucDisplayByte & 0x01) {
+                        cDataByte |= 0x01;
+                    }
+                    ucDisplayByte >>= 1;
+                }
+                g_pucOutData[0] = cDataByte;
+                ucDisplayByte = 0;
+            }
+
+            cByteIndex = 0;
+        }
+    }
+    if (ucDisplayFlag) {
+
+        /****************************************************************************
+        *
+        * Display data read from the device.
+        *
+        *****************************************************************************/
+
+#ifdef VME_DEBUG
+        printf("RECIEVED TDO (");
+#else
+        vme_out_string("Display Data: 0x");
+#endif //VME_DEBUG
+
+        //09/11/07 NN Type cast mismatch variables
+        for (usDataSizeIndex = (unsigned short)((a_usiDataSize + 7) / 8); usDataSizeIndex > 0; usDataSizeIndex--) {
+            cMaskByte = g_pucOutData[usDataSizeIndex - 1];
+            cDataByte = 0x00;
+
+            /****************************************************************************
+            *
+            * Flip cMaskByte and store it in cDataByte.
+            *
+            *****************************************************************************/
+
+            for (usBufferIndex = 0; usBufferIndex < 8; usBufferIndex++) {
+                cDataByte <<= 1;
+                if (cMaskByte & 0x01) {
+                    cDataByte |= 0x01;
+                }
+                cMaskByte >>= 1;
+            }
+#ifdef VME_DEBUG
+            printf("%.2X", cDataByte);
+            if ((((a_usiDataSize + 7) / 8) - usDataSizeIndex) % 40 == 39) {
+                printf("\n\t\t");
+            }
+#else
+            vme_out_hex(cDataByte);
+#endif //VME_DEBUG
+        }
+
+#ifdef VME_DEBUG
+        printf(")\n\n");
+#else
+        vme_out_string("\n\n");
+#endif //VME_DEBUG
+        //09/02/08 Nguyen changed to display the data Checksum
+        vme_out_string("g_usChecksum:");
+        sprintf(StrChecksum, "%.4X\n\n", (unsigned int)g_usChecksum);
+        vme_out_string(StrChecksum);
+        vme_out_string("\n\n");
+        if (g_usChecksum != 0) {
+            g_usChecksum &= 0xFFFF;
+            sprintf(StrChecksum, "Data Checksum: %.4X\n\n", (unsigned int)g_usChecksum);
+            vme_out_string(StrChecksum);
+            g_usChecksum = 0;
+        }
+    }
+
+    if (usErrorCount > 0) {
+
+        if (g_usFlowControl & VERIFYUES) {
+            vme_out_string("USERCODE verification failed.  Continue programming......\n\n");
+            g_usFlowControl &= ~(VERIFYUES);
+            return 0;
+        } else {
+
+#ifdef VME_DEBUG
+            printf("TOTAL ERRORS: %d\n", usErrorCount);
+#endif //VME_DEBUG
+
+            return VME_VERIFICATION_FAILURE;
+        }
+    } else {
+        if (g_usFlowControl & VERIFYUES) {
+            vme_out_string("USERCODE verification passed.  Programming aborted. \n\n");
+            g_usFlowControl &= ~(VERIFYUES);
+            return 1;
+        } else {
+            return 0;
+        }
+    }
+}
+
+/***************************************************************
+*
+* ispVMReadandSave
+*
+* Support dynamic I/O.
+*
+***************************************************************/
+
+signed char ispVMReadandSave(unsigned short int a_usiDataSize)
+{
+    //09/11/07 NN added local variables initialization
+    unsigned short int usDataSizeIndex = 0;
+    unsigned short int usLastBitIndex  = 0;
+    unsigned short int usBufferIndex   = 0;
+    unsigned short int usOutBitIndex   = 0;
+    unsigned short int usLVDSIndex     = 0;
+    unsigned char cDataByte            = 0;
+    unsigned char cDMASKByte           = 0;
+    unsigned char cInDataByte          = 0;
+    unsigned char cCurBit              = 0;
+    unsigned char cByteIndex           = 0;
+    signed char cLVDSByteIndex         = 0;
+
+    //09/11/07 NN Type cast mismatch variables
+    usLastBitIndex = (unsigned short)(a_usiDataSize - 1);
+
+    /***************************************************************
+    *
+    * Iterate through the data bits.
+    *
+    ***************************************************************/
+
+    for (usDataSizeIndex = 0; usDataSizeIndex < a_usiDataSize; usDataSizeIndex++) {
+        if (cByteIndex == 0) {
+
+            /***************************************************************
+            *
+            * Grab byte from DMASK buffer.
+            *
+            ***************************************************************/
+
+            if (g_usDataType & DMASK_DATA) {
+                cDMASKByte = g_pucOutDMaskData[usBufferIndex];
+            } else {
+                cDMASKByte = 0x00;
+            }
+
+            /***************************************************************
+            *
+            * Grab byte from TDI buffer.
+            *
+            ***************************************************************/
+
+            if (g_usDataType & TDI_DATA) {
+                cInDataByte = g_pucInData[usBufferIndex];
+            }
+
+            usBufferIndex++;
+        }
+
+        cCurBit = readPort();
+        cDataByte = (unsigned char)(((cInDataByte << cByteIndex) & 0x80) ? 0x01 : 0x00);
+
+        /***************************************************************
+        *
+        * Initialize the byte to be zero.
+        *
+        ***************************************************************/
+
+        if (usOutBitIndex % 8 == 0) {
+            g_pucOutData[usOutBitIndex / 8] = 0x00;
+        }
+
+        /***************************************************************
+        *
+        * Use TDI, DMASK, and device TDO to create new TDI (actually
+        * stored in g_pucOutData).
+        *
+        ***************************************************************/
+
+        if ((((cDMASKByte << cByteIndex) & 0x80) ? 0x01 : 0x00)) {
+
+            if (g_pLVDSList) {
+                for (usLVDSIndex = 0; usLVDSIndex < g_usLVDSPairCount; usLVDSIndex++) {
+                    if (g_pLVDSList[usLVDSIndex].usNegativeIndex == usDataSizeIndex) {
+                        g_pLVDSList[usLVDSIndex].ucUpdate = 0x01;
+                        break;
+                    }
+                }
+            }
+
+            /***************************************************************
+            *
+            * DMASK bit is 1, use TDI.
+            *
+            ***************************************************************/
+
+            g_pucOutData[usOutBitIndex / 8] |= (unsigned char)(((cDataByte & 0x1) ? 0x01 : 0x00) << (7 - usOutBitIndex % 8));
+        } else {
+
+            /***************************************************************
+            *
+            * DMASK bit is 0, use device TDO.
+            *
+            ***************************************************************/
+
+            g_pucOutData[usOutBitIndex / 8] |= (unsigned char)(((cCurBit & 0x1) ? 0x01 : 0x00) << (7 - usOutBitIndex % 8));
+        }
+
+        /***************************************************************
+        *
+        * Shift in TDI in order to get TDO out.
+        *
+        ***************************************************************/
+
+        usOutBitIndex++;
+        writePort(JTAG_TDI, cDataByte);
+        if (usDataSizeIndex < usLastBitIndex) {
+            sclock();
+        }
+
+        /***************************************************************
+        *
+        * Increment the byte index. If it exceeds 7, then reset it back
+        * to zero.
+        *
+        ***************************************************************/
+
+        cByteIndex++;
+        if (cByteIndex >= 8) {
+            cByteIndex = 0;
+        }
+    }
+
+    /***************************************************************
+    *
+    * If g_pLVDSList exists and pairs need updating, then update
+    * the negative-pair to receive the flipped positive-pair value.
+    *
+    ***************************************************************/
+
+    if (g_pLVDSList) {
+        for (usLVDSIndex = 0; usLVDSIndex < g_usLVDSPairCount; usLVDSIndex++) {
+            if (g_pLVDSList[usLVDSIndex].ucUpdate) {
+
+                /***************************************************************
+                *
+                * Read the positive value and flip it.
+                *
+                ***************************************************************/
+
+                cDataByte = (unsigned char)(((g_pucOutData[g_pLVDSList[usLVDSIndex].usPositiveIndex / 8] << (g_pLVDSList[usLVDSIndex].usPositiveIndex % 8)) & 0x80) ? 0x01 : 0x00);
+                //09/11/07 NN Type cast mismatch variables
+                cDataByte = (unsigned char)(!cDataByte);
+
+                /***************************************************************
+                *
+                * Get the byte that needs modification.
+                *
+                ***************************************************************/
+
+                cInDataByte = g_pucOutData[g_pLVDSList[usLVDSIndex].usNegativeIndex / 8];
+
+                if (cDataByte) {
+
+                    /***************************************************************
+                    *
+                    * Copy over the current byte and set the negative bit to 1.
+                    *
+                    ***************************************************************/
+
+                    cDataByte = 0x00;
+                    for (cLVDSByteIndex = 7; cLVDSByteIndex >= 0; cLVDSByteIndex--) {
+                        cDataByte <<= 1;
+                        if (7 - (g_pLVDSList[usLVDSIndex].usNegativeIndex % 8) == cLVDSByteIndex) {
+
+                            /***************************************************************
+                            *
+                            * Set negative bit to 1.
+                            *
+                            ***************************************************************/
+
+                            cDataByte |= 0x01;
+                        } else if (cInDataByte & 0x80) {
+                            cDataByte |= 0x01;
+                        }
+
+                        cInDataByte <<= 1;
+                    }
+
+                    /***************************************************************
+                    *
+                    * Store the modified byte.
+                    *
+                    ***************************************************************/
+
+                    g_pucOutData[g_pLVDSList[usLVDSIndex].usNegativeIndex / 8] = cDataByte;
+                } else {
+
+                    /***************************************************************
+                    *
+                    * Copy over the current byte and set the negative bit to 0.
+                    *
+                    ***************************************************************/
+
+                    cDataByte = 0x00;
+                    for (cLVDSByteIndex = 7; cLVDSByteIndex >= 0; cLVDSByteIndex--) {
+                        cDataByte <<= 1;
+                        if (7 - (g_pLVDSList[usLVDSIndex].usNegativeIndex % 8) == cLVDSByteIndex) {
+
+                            /***************************************************************
+                            *
+                            * Set negative bit to 0.
+                            *
+                            ***************************************************************/
+
+                            cDataByte |= 0x00;
+                        } else if (cInDataByte & 0x80) {
+                            cDataByte |= 0x01;
+                        }
+
+                        cInDataByte <<= 1;
+                    }
+
+                    /***************************************************************
+                    *
+                    * Store the modified byte.
+                    *
+                    ***************************************************************/
+
+                    g_pucOutData[g_pLVDSList[usLVDSIndex].usNegativeIndex / 8] = cDataByte;
+                }
+
+                break;
+            }
+        }
+    }
+
+    return (0);
+}
+
+signed char ispVMProcessLVDS(unsigned short a_usLVDSCount)
+{
+    unsigned short usLVDSIndex = 0;
+
+    /***************************************************************
+    *
+    * Allocate memory to hold LVDS pairs.
+    *
+    ***************************************************************/
+
+    ispVMMemManager(LVDS, a_usLVDSCount);
+    g_usLVDSPairCount = a_usLVDSCount;
+
+#ifdef VME_DEBUG
+    printf("LVDS %d (", a_usLVDSCount);
+#endif //VME_DEBUG
+
+    /***************************************************************
+    *
+    * Iterate through each given LVDS pair.
+    *
+    ***************************************************************/
+
+    for (usLVDSIndex = 0; usLVDSIndex < g_usLVDSPairCount; usLVDSIndex++) {
+
+        /***************************************************************
+        *
+        * Assign the positive and negative indices of the LVDS pair.
+        *
+        ***************************************************************/
+
+        //09/11/07 NN Type cast mismatch variables
+        g_pLVDSList[usLVDSIndex].usPositiveIndex = (unsigned short)ispVMDataSize();
+        //09/11/07 NN Type cast mismatch variables
+        g_pLVDSList[usLVDSIndex].usNegativeIndex = (unsigned short)ispVMDataSize();
+
+#ifdef VME_DEBUG
+        if (usLVDSIndex < g_usLVDSPairCount - 1) {
+            printf("%d:%d, ", g_pLVDSList[usLVDSIndex].usPositiveIndex, g_pLVDSList[usLVDSIndex].usNegativeIndex);
+        } else {
+            printf("%d:%d", g_pLVDSList[usLVDSIndex].usPositiveIndex, g_pLVDSList[usLVDSIndex].usNegativeIndex);
+        }
+#endif //VME_DEBUG
+
+    }
+
+#ifdef VME_DEBUG
+    printf(") -- %d;\n", a_usLVDSCount);
+#endif //VME_DEBUG
+
+    return (0);
+}
+
+/***************************************************************
+*
+* ivm_core_reinit
+*
+* Reinit ivm_core variables.
+*
+***************************************************************/
+void ivm_core_reinit()
+{
+    g_usFlowControl  = 0x0000;
+    g_usDataType     = 0x0000;
+
+    g_ucEndDR = DRPAUSE;
+    g_ucEndIR = IRPAUSE;
+
+    g_usHeadDR = 0;
+    g_usHeadIR = 0;
+    g_usTailDR = 0;
+    g_usTailIR = 0;
+
+    g_usiDataSize = 0;
+
+    g_iFrequency = 1000;
+
+    g_usMaxSize = 0;
+
+    g_usShiftValue = 0;
+
+    g_usRepeatLoops = 0;
+
+    g_cVendor = LATTICE;
+
+    g_usCalculatedCRC = 0;
+
+    g_usChecksum = 0;
+    g_uiChecksumIndex = 0;
+
+    g_cCurrentJTAGState = 0;
+
+    g_pucHeapMemory      = NULL;
+    g_iHeapCounter       = 0;
+    g_iHEAPSize          = 0;
+
+    g_usIntelDataIndex   = 0;
+    g_usIntelBufferSize  = 0;
+
+    g_usTDOSize      = 0;
+    g_usMASKSize     = 0;
+    g_usTDISize      = 0;
+    g_usDMASKSize    = 0;
+    g_usLCOUNTSize   = 0;
+    g_usHDRSize      = 0;
+    g_usTDRSize      = 0;
+    g_usHIRSize      = 0;
+    g_usTIRSize      = 0;
+    g_usHeapSize     = 0;
+
+    g_pucOutMaskData   = NULL;
+    g_pucInData        = NULL;
+    g_pucOutData       = NULL;
+    g_pucHIRData       = NULL;
+    g_pucTIRData       = NULL;
+    g_pucHDRData       = NULL;
+    g_pucTDRData       = NULL;
+    g_pucIntelBuffer   = NULL;
+    g_pucOutDMaskData  = NULL;
+
+    g_pLVDSList = NULL;
+    g_usLVDSPairCount = 0;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_isc/firmware_upgrade_isc.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_isc/firmware_upgrade_isc.c
new file mode 100644
index 000000000000..c252dfde7c57
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_isc/firmware_upgrade_isc.c
@@ -0,0 +1,68 @@
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <errno.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <ctype.h>
+#include <string.h>
+#include <dirent.h>
+#include <linux/version.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <firmware_app.h>
+
+/*
+ * firmware_upgrade_jtag
+ * function: Determine whether to upgrade ISC or JBI
+ * @fd:   param[in] Device file descriptor
+ * @buf:  param[in] Upgrade the file content
+ * @size: param[in] Upgrade file size
+ * @info: param[in] Upgrade file information
+ * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+int firmware_upgrade_jtag(int fd, uint8_t *buf, uint32_t size, name_info_t *info)
+{
+    int ret;
+    cmd_info_t cmd_info;
+
+    cmd_info.size = size;
+    cmd_info.data = buf;
+    ret = 0;
+
+    if (info->type == FIRMWARE_CPLD) {
+        /* 0x4A,0x41,0x4D,0x01 is JBI file */
+        if (buf[0] == 0x4A && buf[1] == 0x41 && buf[2] == 0x4D && buf[3] == 0x01) {
+            dbg_print(is_debug_on, "Use jbi file.\n");
+            ret = ioctl(fd, FIRMWARE_PROGRAM_JBI, &cmd_info);
+        } else {
+            dbg_print(is_debug_on, "Use isc file.\n");
+            ret = ioctl(fd, FIRMWARE_PROGRAM, &cmd_info);
+        }
+    }
+
+    if (info->type == FIRMWARE_FPGA) {
+        ret = ioctl(fd, FIRMWARE_PROGRAM, &cmd_info);
+    }
+
+    if (ret < 0) {
+        return FIRMWARE_FAILED;
+    }
+
+    return FIRMWARE_SUCCESS;
+}
+
+/*
+ * firmware_upgrade_jtag_test
+ * function: Determine whether to upgrade ISC or JBI
+ * @fd:   param[in] Device file descriptor
+ * @buf:  param[in] Upgrade the file content
+ * @size: param[in] Upgrade file size
+ * @info: param[in] Upgrade file information
+ * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+int firmware_upgrade_jtag_test(int fd, uint8_t *buf, uint32_t size, name_info_t *info)
+{
+    return FIRMWARE_SUCCESS;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_mtd/firmware_upgrade_mtd.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_mtd/firmware_upgrade_mtd.c
new file mode 100644
index 000000000000..0a7659f0e428
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_mtd/firmware_upgrade_mtd.c
@@ -0,0 +1,446 @@
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <errno.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <ctype.h>
+#include <string.h>
+#include <dirent.h>
+#include <linux/version.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <firmware_app.h>
+#include "firmware_upgrade_mtd.h"
+#include "mtd-abi.h"
+
+static int get_mtdnum_from_name(char *name, int *mtdnum)
+{
+    FILE *fp;
+    int ret;
+    char buf[PATH_LEN];
+    char *start;
+    char *end;
+    char *key_w = "mtd";
+
+    if (name == NULL || mtdnum == NULL) {
+        dbg_print(is_debug_on, "Input invalid error.\n");
+        return -EINVAL;
+    }
+    ret = 0;
+    *mtdnum = -1;
+    fp = fopen("/proc/mtd", "r");
+    if (fp == NULL) {
+        dbg_print(is_debug_on, "Not find mtd device.\n");
+        return -FIRWMARE_MTD_PART_INFO_ERR;
+    }
+
+    mem_clear(buf, sizeof(buf));
+    while(fgets(buf, sizeof(buf), fp)) {
+        if (strstr(buf, name) != NULL) {
+            start = strstr(buf, key_w);
+            if (start == NULL) {
+                dbg_print(is_debug_on, "/proc/mtd don't find %s.\n", key_w);
+                ret = -FIRWMARE_MTD_PART_INFO_ERR;
+                goto exit;
+            }
+            start += strlen(key_w);
+            end = strchr(start, ':');
+            if (end == NULL) {
+                dbg_print(is_debug_on, "/proc/mtd don't find %c.\n", ':');
+                ret = -FIRWMARE_MTD_PART_INFO_ERR;
+                goto exit;
+            }
+
+            *end = '\0';
+            *mtdnum = atoi(start);
+            if (*mtdnum < 0) {
+                dbg_print(is_debug_on, "Not get mtd num.\n");
+                ret = -FIRWMARE_MTD_PART_INFO_ERR;
+                goto exit;
+            }
+        }
+    }
+
+    if (*mtdnum == -1) {
+        ret = -FIRWMARE_MTD_PART_INFO_ERR;
+        goto exit;
+    }
+exit:
+    if (fp != NULL) {
+        fclose(fp);
+    }
+
+    return ret;
+}
+
+static int firmware_sysfs_get_dev_info(int fd, firmware_mtd_info_t *dev_info)
+{
+    int ret;
+
+    ret = ioctl(fd, FIRMWARE_SYSFS_MTD_INFO, dev_info);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Failed to get upg device file info.\n");
+        return ret;
+    }
+
+    dbg_print(is_debug_on, "mtd_name=%s flash_base=0x%x test_base=0x%x test_size=%d.\n",
+            dev_info->mtd_name, dev_info->flash_base, dev_info->test_base, dev_info->test_size);
+    return 0;
+}
+
+/*
+ * MEMGETINFO
+ */
+static int getmeminfo(int fd, struct mtd_info_user *mtd)
+{
+    return ioctl(fd, MEMGETINFO, mtd);
+}
+
+/*
+ * MEMERASE
+ */
+static int memerase(int fd, struct erase_info_user *erase)
+{
+    return ioctl(fd, MEMERASE, erase);
+}
+
+static int erase_flash(int fd, uint32_t offset, uint32_t bytes)
+{
+    int err;
+    struct erase_info_user erase;
+    erase.start = offset;
+    erase.length = bytes;
+    err = memerase(fd, &erase);
+    if (err < 0) {
+        dbg_print(is_debug_on, "Error: memerase failed, err=%d\n", err);
+        return -FIRWMARE_MTD_MEMERASE;
+    }
+    dbg_print(is_debug_on, "Erased %d bytes from address 0x%.8x in flash\n", bytes, offset);
+    return 0;
+}
+
+/*
+ * firmware_upgrade_mtd_block
+ * function: upgrade mtd device block
+ * @dev_info:   param[in] Device file descriptor
+ * @buf:  param[in] Upgrade the file content
+ * @size: param[in] Upgrade file size
+ * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+static int firmware_upgrade_mtd_block(int mtd_fd, uint32_t offset,
+                uint8_t *buf, uint32_t size, uint32_t erasesize)
+{
+    int ret;
+    int i;
+    uint8_t *reread_buf;
+    uint32_t cmp_retry, reread_len, write_len;
+
+    /* Read back data */
+    reread_buf = (uint8_t *) malloc(size);
+    if (reread_buf == NULL) {
+        dbg_print(is_debug_on, "Error: Failed to malloc memory for read back data buf, size=%d.\n", size);
+        return FIRMWARE_FAILED;
+    }
+
+    for (cmp_retry = 0; cmp_retry < FW_SYSFS_RETRY_TIME; cmp_retry++) {
+        for (i = 0; i < FW_SYSFS_RETRY_TIME; i++) {
+            if (offset != lseek(mtd_fd, offset, SEEK_SET)) {
+                dbg_print(is_debug_on, "Error:lseek mtd offset=%x retrytimes=%d failed.\n", offset, i);
+                usleep(FW_SYSFS_RETRY_SLEEP_TIME);
+                continue;
+            }
+
+            dbg_print(is_debug_on, "erase mtd offset=0x%x erasesize=%d retrytimes=%d.\n",
+                        offset, erasesize, i);
+            ret = erase_flash(mtd_fd, offset, erasesize);
+            if (ret < 0) {
+                dbg_print(is_debug_on, "Error:erase mtd offset=%x size=%d retrytimes=%d failed, ret=%d\n",
+                            offset, size, i, ret);
+                usleep(FW_SYSFS_RETRY_SLEEP_TIME);
+                continue;
+            }
+
+            dbg_print(is_debug_on, "write mtd offset=0x%x size=%d retrytimes=%d.\n",
+                        offset, size, i);
+            write_len = write(mtd_fd, buf, size);
+            if (write_len != size) {
+                dbg_print(is_debug_on, "Error:write mtd offset=0x%x size=%d write_len=%d retrytimes=%d.\n",
+                             offset, size, write_len, i);
+                usleep(FW_SYSFS_RETRY_SLEEP_TIME);
+                continue;
+            }
+            break;
+        }
+        if (i == FW_SYSFS_RETRY_TIME) {
+            dbg_print(is_debug_on, "Error: upgrade mtd fail, offset = 0x%x, size = %d\n", offset, size);
+            free(reread_buf);
+            return FIRMWARE_FAILED;
+        }
+
+        usleep(FW_SYSFS_RETRY_SLEEP_TIME);
+        dbg_print(is_debug_on, "Reread mtd offset=0x%x size=%d\n", offset, size);
+        for (i = 0; i < FW_SYSFS_RETRY_TIME; i++) {
+            if (offset != lseek(mtd_fd, offset, SEEK_SET)) {
+                dbg_print(is_debug_on, "Error:lseek mtd offset=%x retrytimes=%d failed.\n", offset, i);
+                usleep(FW_SYSFS_RETRY_SLEEP_TIME);
+                continue;
+            }
+
+            reread_len = read(mtd_fd, reread_buf, size);
+            if (reread_len != size) {
+                dbg_print(is_debug_on, "Error:reread mtd offset=0x%x size=%d reread_len=%d retrytimes=%d.\n",
+                             offset, size, reread_len, i);
+                usleep(FW_SYSFS_RETRY_SLEEP_TIME);
+                continue;
+            }
+            break;
+        }
+        if (i == FW_SYSFS_RETRY_TIME) {
+            dbg_print(is_debug_on, "Error: reread mtd fail, offset = 0x%x size = %d\n", offset, size);
+            free(reread_buf);
+            return FIRMWARE_FAILED;
+        }
+
+        /* Check data */
+        if (memcmp(reread_buf, buf, size) != 0) {
+            dbg_print(is_debug_on, "memcmp mtd fail,offset = 0x%x retrytimes = %d\n", offset, cmp_retry);
+        } else {
+            break;
+        }
+    }
+    if (cmp_retry >= FW_SYSFS_RETRY_TIME) {
+        dbg_print(is_debug_on, "upgrade mtd fail, offset = 0x%x.\n", offset);
+        dbg_print(is_debug_on, "want to write buf :\n");
+        for (i = 0; i < size; i++) {
+            dbg_print(is_debug_on, "0x%x ", buf[i]);
+            if (((i + 1) % 16) == 0) {
+                dbg_print(is_debug_on, "\n");
+            }
+        }
+        dbg_print(is_debug_on, "\n");
+
+        dbg_print(is_debug_on, "actually reread buf :\n");
+        for (i = 0; i < size; i++) {
+            dbg_print(is_debug_on, "0x%x ", reread_buf[i]);
+            if (((i + 1) % 16) == 0) {
+                dbg_print(is_debug_on, "\n");
+            }
+        }
+        dbg_print(is_debug_on, "\n");
+
+        free(reread_buf);
+        return FIRMWARE_FAILED;
+    }
+
+    free(reread_buf);
+    dbg_print(is_debug_on, "firmware upgrade mtd block offset[0x%.8x] success.\n", offset);
+    return FIRMWARE_SUCCESS;
+}
+
+/*
+ * firmware_upgrade_mtd_program
+ * function: upgrade mtd device
+ * @dev_info:   param[in] Device file descriptor
+ * @flash_base: param[in] Upgrade the flash start address
+ * @buf:  param[in] Upgrade the file content
+ * @size: param[in] Upgrade file size
+ * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+static int firmware_upgrade_mtd_program(firmware_mtd_info_t *dev_info,
+                int flash_base, uint8_t *buf, uint32_t size)
+{
+    int ret;
+    int mtdnum;
+    char dev_mtd[PATH_LEN];
+    int mtd_fd;
+    uint32_t offset, len, block_size;
+    struct mtd_info_user mtd_info;
+    uint8_t *data_point;
+
+    ret = get_mtdnum_from_name(dev_info->mtd_name, &mtdnum);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Error:not find %s mtd num.\n", dev_info->mtd_name);
+        return FIRMWARE_FAILED;
+    }
+
+    mem_clear(dev_mtd, sizeof(dev_mtd));
+    snprintf(dev_mtd, sizeof(dev_mtd) - 1, "/dev/mtd%d", mtdnum);
+
+    mtd_fd = open(dev_mtd, O_SYNC | O_RDWR);
+    if (mtd_fd < 0) {
+        dbg_print(is_debug_on, "Error:open %s failed.\n", dev_mtd);
+        goto err;
+    }
+
+    ret = getmeminfo(mtd_fd, &mtd_info);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Error:get mtd info failed, ret=%d.\n", ret);
+        goto failed;
+    }
+
+    offset = flash_base;
+    if (offset >= mtd_info.size) {
+        dbg_print(is_debug_on, "Error: offset[0x%.8x] over size[0x%.8x]\n", offset, size);
+        goto failed;
+    }
+
+    len = size;
+    data_point = buf;
+    while ((offset < mtd_info.size) && (len > 0)) {
+        if (len > mtd_info.erasesize) {
+            block_size = mtd_info.erasesize;
+        } else {
+            block_size = len;
+        }
+        dbg_print(is_debug_on, "upgrade mtd[%s] block offset[0x%.8x] size[%d] relen[%d].\n", dev_mtd, offset, size, len);
+        ret = firmware_upgrade_mtd_block(mtd_fd, offset, data_point, block_size, mtd_info.erasesize);
+        if (ret < 0) {
+            dbg_print(is_debug_on, "Error: mt block offset[0x%.8x] size[0x%.8x] failed.\n", offset, block_size);
+            goto failed;
+        }
+        len -= block_size;
+        data_point += block_size;
+        offset += block_size;
+        usleep(FW_MTD_BLOCK_SLEEP_TIME);
+    }
+
+    if (close(mtd_fd) < 0) {
+        dbg_print(is_debug_on, "Error:close %s failed.\n", dev_mtd);
+    }
+    dbg_print(is_debug_on, "firmware upgrade mtd device success.\n");
+    return FIRMWARE_SUCCESS;
+
+failed:
+    if (close(mtd_fd) < 0) {
+        dbg_print(is_debug_on, "Error:close %s failed.\n", dev_mtd);
+    }
+
+err:
+    dbg_print(is_debug_on, "firmware upgrade mtd device fail.\n");
+    return FIRMWARE_FAILED;
+}
+
+/*
+ * firmware_upgrade_mtd
+ * function: Determine whether to upgrade ISC or JBI
+ * @fd:   param[in] Device file descriptor
+ * @buf:  param[in] Upgrade the file content
+ * @size: param[in] Upgrade file size
+ * @info: param[in] Upgrade file information
+ * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+int firmware_upgrade_mtd(int fd, uint8_t *buf, uint32_t size, name_info_t *info)
+{
+    int ret;
+    firmware_mtd_info_t dev_info;
+
+    if ((buf == NULL) || (info == NULL)) {
+        dbg_print(is_debug_on, "Input invalid error.\n");
+        return FIRMWARE_FAILED;
+    }
+
+    /* get sysfs information*/
+    ret = firmware_sysfs_get_dev_info(fd, &dev_info);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "firmware_sysfs_get_dev_info failed, ret %d.\n", ret);
+        return FIRMWARE_FAILED;
+    }
+
+    /* enable upgrade access */
+    ret = ioctl(fd, FIRMWARE_SYSFS_INIT, NULL);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "init dev logic faile\n");
+        return FIRMWARE_FAILED;
+    }
+
+    ret = firmware_upgrade_mtd_program(&dev_info, dev_info.flash_base, buf, size);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Error:mtd device program failed, ret=%d.\n", ret);
+        goto failed;
+    }
+
+    /* disable upgrade access */
+    ret = ioctl(fd, FIRMWARE_SYSFS_FINISH, NULL);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "close dev logic en failed.\n");
+    }
+
+    return FIRMWARE_SUCCESS;
+
+failed:
+    /* disable upgrade access */
+    ret = ioctl(fd, FIRMWARE_SYSFS_FINISH,NULL);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "close dev logic en failed.\n");
+    }
+
+    return FIRMWARE_FAILED;
+}
+
+/*
+ * firmware_upgrade_mtd_test
+ * function: Determine whether to upgrade ISC or JBI
+ * @fd:   param[in] Device file descriptor
+ * @info: param[in] Upgrade file information
+ * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+int firmware_upgrade_mtd_test(int fd, name_info_t *info)
+{
+    int ret, rv;
+    firmware_mtd_info_t dev_info;
+    uint8_t *data_buf;
+    uint8_t num;
+    int j;
+
+    if (info == NULL) {
+        dbg_print(is_debug_on, "Input invalid error.\n");
+        return FIRMWARE_FAILED;
+    }
+
+    /* get sysfs information*/
+    ret = firmware_sysfs_get_dev_info(fd, &dev_info);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "firmware_sysfs_get_dev_info failed, ret %d.\n", ret);
+        return FIRMWARE_FAILED;
+    }
+
+    if (dev_info.test_size == 0) {
+        dbg_print(is_debug_on, "Error: get flash size:%d, not support.\n", dev_info.test_size);
+        return FIRMWARE_NOT_SUPPORT;
+    }
+
+    data_buf = (uint8_t *) malloc(dev_info.test_size);
+    if (data_buf == NULL) {
+        dbg_print(is_debug_on, "Error: Failed to malloc memory for test data buf, size=%d.\n", dev_info.test_size);
+        return FIRMWARE_FAILED;
+    }
+
+    /* Get random data */
+    for (j = 0; j < dev_info.test_size; j++) {
+        num = (uint8_t) rand() % 256;
+        data_buf[j] = num & 0xff;
+    }
+
+    /* enable upgrade access */
+    ret = ioctl(fd, FIRMWARE_SYSFS_INIT, NULL);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "init dev logic faile\n");
+        free(data_buf);
+        return FIRMWARE_FAILED;
+    }
+
+    ret = firmware_upgrade_mtd_program(&dev_info, dev_info.test_base, data_buf, dev_info.test_size);
+    /* disable upgrade access */
+    rv = ioctl(fd, FIRMWARE_SYSFS_FINISH, NULL);
+    if (rv < 0) {
+        dbg_print(is_debug_on, "close dev logic en failed.\n");
+    }
+    free(data_buf);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Error:mtd device program failed, ret=%d.\n", ret);
+        return FIRMWARE_FAILED;
+    }
+    return FIRMWARE_SUCCESS;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_mtd/firmware_upgrade_mtd.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_mtd/firmware_upgrade_mtd.h
new file mode 100644
index 000000000000..06e36b3149d5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_mtd/firmware_upgrade_mtd.h
@@ -0,0 +1,32 @@
+#ifndef __FIRMWARE_UPGRADE_MTD_H__
+#define __FIRMWARE_UPGRADE_MTD_H__
+
+#include <firmware_app.h>
+
+#define FIRMWARE_DEV_NAME_LEN     64    /* the macro definition needs to same as FIRMWARE_DEV_NAME_LEN in firmware_sysfs_upgrade.h */
+#define PATH_LEN    (256)
+#define FW_MTD_BLOCK_SLEEP_TIME        (10000)   /* 10ms */
+#define FW_SYSFS_RETRY_SLEEP_TIME      (10000)   /* 10ms */
+#define FW_SYSFS_RETRY_TIME            (5)  /* retry 5 times, 50ms = FW_SYSFS_RETRY_TIME *FW_SYSFS_RETRY_SLEEP_TIME;  */
+
+/* Debug switch level */
+typedef enum {
+    FIRWMARE_MTD_SUCCESS = 0,
+    FIRWMARE_MTD_PART_INFO_ERR,
+    FIRWMARE_MTD_MEMERASE,
+    FIRWMARE_MTD_MEMGETINFO,
+    FIRWMARE_END,
+} firmware_debug_level_t;
+
+#define debug(fmt, argv...) do {  \
+    dbg_print(is_debug_on, ""fmt , ##argv);\
+ } while(0)
+
+typedef struct firmware_mtd_info_s {
+    char mtd_name[FIRMWARE_DEV_NAME_LEN];         /* sysfs name */
+    uint32_t flash_base;                               /* Flash Upgrade Address */
+    uint32_t test_base;                                /* Test flash address */
+    uint32_t test_size;                                /* Test flash size */
+} firmware_mtd_info_t;
+
+#endif /* End of __FIRMWARE_UPGRADE_MTD_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_mtd/mtd-abi.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_mtd/mtd-abi.h
new file mode 100644
index 000000000000..f326d23e732e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_mtd/mtd-abi.h
@@ -0,0 +1,259 @@
+
+#ifndef __MTD_ABI_H__
+#define __MTD_ABI_H__
+
+#include <linux/types.h>
+
+struct erase_info_user {
+	__u32 start;
+	__u32 length;
+};
+
+struct erase_info_user64 {
+	__u64 start;
+	__u64 length;
+};
+
+struct mtd_oob_buf {
+	__u32 start;
+	__u32 length;
+	unsigned char *ptr;
+};
+
+struct mtd_oob_buf64 {
+	__u64 start;
+	__u32 pad;
+	__u32 length;
+	__u64 usr_ptr;
+};
+
+/**
+ * MTD operation modes
+ *
+ * @MTD_OPS_PLACE_OOB:	OOB data are placed at the given offset (default)
+ * @MTD_OPS_AUTO_OOB:	OOB data are automatically placed at the free areas
+ *			which are defined by the internal ecclayout
+ * @MTD_OPS_RAW:	data are transferred as-is, with no error correction;
+ *			this mode implies %MTD_OPS_PLACE_OOB
+ *
+ * These modes can be passed to ioctl(MEMWRITE) and are also used internally.
+ * See notes on "MTD file modes" for discussion on %MTD_OPS_RAW vs.
+ * %MTD_FILE_MODE_RAW.
+ */
+enum {
+	MTD_OPS_PLACE_OOB = 0,
+	MTD_OPS_AUTO_OOB = 1,
+	MTD_OPS_RAW = 2,
+};
+
+/**
+ * struct mtd_write_req - data structure for requesting a write operation
+ *
+ * @start:	start address
+ * @len:	length of data buffer
+ * @ooblen:	length of OOB buffer
+ * @usr_data:	user-provided data buffer
+ * @usr_oob:	user-provided OOB buffer
+ * @mode:	MTD mode (see "MTD operation modes")
+ * @padding:	reserved, must be set to 0
+ *
+ * This structure supports ioctl(MEMWRITE) operations, allowing data and/or OOB
+ * writes in various modes. To write to OOB-only, set @usr_data == NULL, and to
+ * write data-only, set @usr_oob == NULL. However, setting both @usr_data and
+ * @usr_oob to NULL is not allowed.
+ */
+struct mtd_write_req {
+	__u64 start;
+	__u64 len;
+	__u64 ooblen;
+	__u64 usr_data;
+	__u64 usr_oob;
+	__u8 mode;
+	__u8 padding[7];
+};
+
+#define MTD_ABSENT		0
+#define MTD_RAM			1
+#define MTD_ROM			2
+#define MTD_NORFLASH		3
+#define MTD_NANDFLASH		4
+#define MTD_DATAFLASH		6
+#define MTD_UBIVOLUME		7
+#define MTD_MLCNANDFLASH	8
+
+#define MTD_WRITEABLE		0x400	/* Device is writeable */
+#define MTD_BIT_WRITEABLE	0x800	/* Single bits can be flipped */
+#define MTD_NO_ERASE		0x1000	/* No erase necessary */
+#define MTD_POWERUP_LOCK	0x2000	/* Always locked after reset */
+
+/* Some common devices / combinations of capabilities */
+#define MTD_CAP_ROM		0
+#define MTD_CAP_RAM		(MTD_WRITEABLE | MTD_BIT_WRITEABLE | MTD_NO_ERASE)
+#define MTD_CAP_NORFLASH	(MTD_WRITEABLE | MTD_BIT_WRITEABLE)
+#define MTD_CAP_NANDFLASH	(MTD_WRITEABLE)
+
+/* Obsolete ECC byte placement modes (used with obsolete MEMGETOOBSEL) */
+#define MTD_NANDECC_OFF		0	// Switch off ECC (Not recommended)
+#define MTD_NANDECC_PLACE	1	// Use the given placement in the structure (YAFFS1 legacy mode)
+#define MTD_NANDECC_AUTOPLACE	2	// Use the default placement scheme
+#define MTD_NANDECC_PLACEONLY	3	// Use the given placement in the structure (Do not store ecc result on read)
+#define MTD_NANDECC_AUTOPL_USR 	4	// Use the given autoplacement scheme rather than using the default
+
+/* OTP mode selection */
+#define MTD_OTP_OFF		0
+#define MTD_OTP_FACTORY		1
+#define MTD_OTP_USER		2
+
+typedef struct mtd_info_user {
+	__u8 type;
+	__u32 flags;
+	__u32 size;	/* Total size of the MTD */
+	__u32 erasesize;
+	__u32 writesize;
+	__u32 oobsize;	/* Amount of OOB data per block (e.g. 16) */
+	__u64 padding;	/* Old obsolete field; do not use */
+} mtd_info_user_t;
+
+struct region_info_user {
+	__u32 offset;		/* At which this region starts,
+				 * from the beginning of the MTD */
+	__u32 erasesize;	/* For this region */
+	__u32 numblocks;	/* Number of blocks in this region */
+	__u32 regionindex;
+};
+
+struct otp_info {
+	__u32 start;
+	__u32 length;
+	__u32 locked;
+};
+
+/*
+ * Note, the following ioctl existed in the past and was removed:
+ * #define MEMSETOOBSEL           _IOW('M', 9, struct nand_oobinfo)
+ * Try to avoid adding a new ioctl with the same ioctl number.
+ */
+
+/* Get basic MTD characteristics info (better to use sysfs) */
+#define MEMGETINFO		_IOR('M', 1, struct mtd_info_user)
+/* Erase segment of MTD */
+#define MEMERASE		_IOW('M', 2, struct erase_info_user)
+/* Write out-of-band data from MTD */
+#define MEMWRITEOOB		_IOWR('M', 3, struct mtd_oob_buf)
+/* Read out-of-band data from MTD */
+#define MEMREADOOB		_IOWR('M', 4, struct mtd_oob_buf)
+/* Lock a chip (for MTD that supports it) */
+#define MEMLOCK			_IOW('M', 5, struct erase_info_user)
+/* Unlock a chip (for MTD that supports it) */
+#define MEMUNLOCK		_IOW('M', 6, struct erase_info_user)
+/* Get the number of different erase regions */
+#define MEMGETREGIONCOUNT	_IOR('M', 7, int)
+/* Get information about the erase region for a specific index */
+#define MEMGETREGIONINFO	_IOWR('M', 8, struct region_info_user)
+/* Get info about OOB modes (e.g., RAW, PLACE, AUTO) - legacy interface */
+#define MEMGETOOBSEL		_IOR('M', 10, struct nand_oobinfo)
+/* Check if an eraseblock is bad */
+#define MEMGETBADBLOCK		_IOW('M', 11, __kernel_loff_t)
+/* Mark an eraseblock as bad */
+#define MEMSETBADBLOCK		_IOW('M', 12, __kernel_loff_t)
+/* Set OTP (One-Time Programmable) mode (factory vs. user) */
+#define OTPSELECT		_IOR('M', 13, int)
+/* Get number of OTP (One-Time Programmable) regions */
+#define OTPGETREGIONCOUNT	_IOW('M', 14, int)
+/* Get all OTP (One-Time Programmable) info about MTD */
+#define OTPGETREGIONINFO	_IOW('M', 15, struct otp_info)
+/* Lock a given range of user data (must be in mode %MTD_FILE_MODE_OTP_USER) */
+#define OTPLOCK			_IOR('M', 16, struct otp_info)
+/* Get ECC layout (deprecated) */
+#define ECCGETLAYOUT		_IOR('M', 17, struct nand_ecclayout_user)
+/* Get statistics about corrected/uncorrected errors */
+#define ECCGETSTATS		_IOR('M', 18, struct mtd_ecc_stats)
+/* Set MTD mode on a per-file-descriptor basis (see "MTD file modes") */
+#define MTDFILEMODE		_IO('M', 19)
+/* Erase segment of MTD (supports 64-bit address) */
+#define MEMERASE64		_IOW('M', 20, struct erase_info_user64)
+/* Write data to OOB (64-bit version) */
+#define MEMWRITEOOB64		_IOWR('M', 21, struct mtd_oob_buf64)
+/* Read data from OOB (64-bit version) */
+#define MEMREADOOB64		_IOWR('M', 22, struct mtd_oob_buf64)
+/* Check if chip is locked (for MTD that supports it) */
+#define MEMISLOCKED		_IOR('M', 23, struct erase_info_user)
+/*
+ * Most generic write interface; can write in-band and/or out-of-band in various
+ * modes (see "struct mtd_write_req")
+ */
+#define MEMWRITE		_IOWR('M', 24, struct mtd_write_req)
+
+/*
+ * Obsolete legacy interface. Keep it in order not to break userspace
+ * interfaces
+ */
+struct nand_oobinfo {
+	__u32 useecc;
+	__u32 eccbytes;
+	__u32 oobfree[8][2];
+	__u32 eccpos[32];
+};
+
+struct nand_oobfree {
+	__u32 offset;
+	__u32 length;
+};
+
+#define MTD_MAX_OOBFREE_ENTRIES	8
+#define MTD_MAX_ECCPOS_ENTRIES	64
+/*
+ * OBSOLETE: ECC layout control structure. Exported to user-space via ioctl
+ * ECCGETLAYOUT for backwards compatbility and should not be mistaken as a
+ * complete set of ECC information. The ioctl truncates the larger internal
+ * structure to retain binary compatibility with the static declaration of the
+ * ioctl. Note that the "MTD_MAX_..._ENTRIES" macros represent the max size of
+ * the user struct, not the MAX size of the internal struct nand_ecclayout.
+ */
+struct nand_ecclayout_user {
+	__u32 eccbytes;
+	__u32 eccpos[MTD_MAX_ECCPOS_ENTRIES];
+	__u32 oobavail;
+	struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES];
+};
+
+/**
+ * struct mtd_ecc_stats - error correction stats
+ *
+ * @corrected:	number of corrected bits
+ * @failed:	number of uncorrectable errors
+ * @badblocks:	number of bad blocks in this partition
+ * @bbtblocks:	number of blocks reserved for bad block tables
+ */
+struct mtd_ecc_stats {
+	__u32 corrected;
+	__u32 failed;
+	__u32 badblocks;
+	__u32 bbtblocks;
+};
+
+/*
+ * MTD file modes - for read/write access to MTD
+ *
+ * @MTD_FILE_MODE_NORMAL:	OTP disabled, ECC enabled
+ * @MTD_FILE_MODE_OTP_FACTORY:	OTP enabled in factory mode
+ * @MTD_FILE_MODE_OTP_USER:	OTP enabled in user mode
+ * @MTD_FILE_MODE_RAW:		OTP disabled, ECC disabled
+ *
+ * These modes can be set via ioctl(MTDFILEMODE). The mode mode will be retained
+ * separately for each open file descriptor.
+ *
+ * Note: %MTD_FILE_MODE_RAW provides the same functionality as %MTD_OPS_RAW -
+ * raw access to the flash, without error correction or autoplacement schemes.
+ * Wherever possible, the MTD_OPS_* mode will override the MTD_FILE_MODE_* mode
+ * (e.g., when using ioctl(MEMWRITE)), but in some cases, the MTD_FILE_MODE is
+ * used out of necessity (e.g., `write()', ioctl(MEMWRITEOOB64)).
+ */
+enum mtd_file_modes {
+	MTD_FILE_MODE_NORMAL = MTD_OTP_OFF,
+	MTD_FILE_MODE_OTP_FACTORY = MTD_OTP_FACTORY,
+	MTD_FILE_MODE_OTP_USER = MTD_OTP_USER,
+	MTD_FILE_MODE_RAW,
+};
+
+#endif /* __MTD_ABI_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/firmware_upgrade_sysfs.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/firmware_upgrade_sysfs.c
new file mode 100644
index 000000000000..10a429d93bde
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/firmware_upgrade_sysfs.c
@@ -0,0 +1,285 @@
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <errno.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <ctype.h>
+#include <string.h>
+#include <dirent.h>
+#include <linux/version.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <firmware_app.h>
+#include "firmware_upgrade_sysfs.h"
+
+static int firmware_sysfs_get_dev_info(int fd, firmware_dev_file_info_t *dev_info)
+{
+    int ret;
+
+    ret = ioctl(fd, FIRMWARE_SYSFS_DEV_FILE_INFO, dev_info);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Failed to get upg flash dev info.\n");
+        return ret;
+    }
+
+    dbg_print(is_debug_on, "sysfs_name=%s per_len=%u.\n", dev_info->sysfs_name, dev_info->per_len);
+    return 0;
+}
+
+/* sysfs upgrade program function */
+int firmware_upgrade_sysfs_program(firmware_dev_file_info_t *dev_info, uint32_t dev_base,
+        uint8_t *buf, uint32_t size)
+{
+    int ret = 0;
+    uint32_t offset_addr, buf_offset, len;
+    uint32_t write_len, cmp_retry, reread_len;
+    int sysfs_fd;
+    uint8_t *reread_buf;
+    int i;
+
+    if (dev_info->per_len > 0) {
+        if (size % dev_info->per_len) {
+            dbg_print(is_debug_on, "firmware sysfs upgrade size[%u] is width[%u] mismatch, ret %d.\n",
+                    size, dev_info->per_len, ret);
+            return FIRMWARE_FAILED;
+        }
+        len = dev_info->per_len;
+    } else {
+        /* Write to the maximum buffer if the length of each write is not configured */
+        len = size;
+    }
+
+    /* Read back data */
+    reread_buf = (uint8_t *) malloc(len);
+    if (reread_buf == NULL) {
+        dbg_print(is_debug_on, "Error: Failed to malloc memory for read back data buf, len=%u.\n", len);
+        return FIRMWARE_FAILED;
+    }
+
+    sysfs_fd = open(dev_info->sysfs_name, O_RDWR | O_SYNC);
+    if (sysfs_fd < 0) {
+        dbg_print(is_debug_on, "open file[%s] fail.\n", dev_info->sysfs_name);
+        free(reread_buf);
+        return FIRMWARE_FAILED;
+    }
+
+    offset_addr = dev_base;
+    buf_offset = 0;
+    cmp_retry = 0;
+    while (buf_offset < size) {
+        /* Calibrate upgrade data length */
+        if (buf_offset + len > size) {
+            len = size - buf_offset;
+        }
+
+        for (i = 0; i < FW_SYSFS_RETRY_TIME; i++) {
+            ret = lseek(sysfs_fd, offset_addr, SEEK_SET);
+            if (ret < 0) {
+                dbg_print(is_debug_on, "lseek file[%s offset=%u] fail.\n", dev_info->sysfs_name, offset_addr);
+                close(sysfs_fd);
+                free(reread_buf);
+                return FIRMWARE_FAILED;
+            }
+            write_len = write(sysfs_fd, buf + buf_offset, len);
+            if (write_len != len) {
+                dbg_print(is_debug_on, "write file[%s] fail,offset = 0x%x retrytimes = %u len = %u, write_len =%u\n",
+                    dev_info->sysfs_name, offset_addr, i ,len, write_len);
+                usleep(FW_SYSFS_RETRY_SLEEP_TIME);
+                continue;
+            }
+            break;
+        }
+
+        if (i == FW_SYSFS_RETRY_TIME) {
+            dbg_print(is_debug_on, "write file[%s] fail, offset = 0x%x, len = %u, write_len =%u\n",
+                dev_info->sysfs_name, offset_addr, len, write_len);
+            close(sysfs_fd);
+            free(reread_buf);
+            return FIRMWARE_FAILED;
+        }
+
+        mem_clear(reread_buf, len);
+        ret = lseek(sysfs_fd, offset_addr, SEEK_SET);
+        if (ret < 0) {
+            dbg_print(is_debug_on, "reread lseek file[%s offset=%u] fail.\n", dev_info->sysfs_name, offset_addr);
+            close(sysfs_fd);
+            free(reread_buf);
+            return FIRMWARE_FAILED;
+        }
+
+        for (i = 0; i < FW_SYSFS_RETRY_TIME; i++) {
+            reread_len = read(sysfs_fd, reread_buf, len);
+            if (reread_len != len) {
+                dbg_print(is_debug_on, "reread file[%s] fail,offset = 0x%x retrytimes = %u reread_len = %u, len =%u\n",
+                    dev_info->sysfs_name, offset_addr, i ,reread_len, len);
+                usleep(FW_SYSFS_RETRY_SLEEP_TIME);
+                continue;
+            }
+            break;
+        }
+        if (i == FW_SYSFS_RETRY_TIME) {
+            dbg_print(is_debug_on, "reread file[%s] fail, offset = 0x%x, reread_len = %u, len = %u\n",
+                dev_info->sysfs_name, offset_addr, reread_len, len);
+            close(sysfs_fd);
+            free(reread_buf);
+            return FIRMWARE_FAILED;
+        }
+
+        /* Check data */
+        if (memcmp(reread_buf, buf + buf_offset, len) != 0) {
+            if (cmp_retry < FW_SYSFS_RETRY_TIME) {
+                dbg_print(is_debug_on, "memcmp file[%s] fail,offset = 0x%x retrytimes = %u\n",
+                                    dev_info->sysfs_name, offset_addr, cmp_retry);
+                cmp_retry++;
+                continue;
+            }
+
+            dbg_print(is_debug_on, "upgrade file[%s] fail, offset = 0x%x.\n", dev_info->sysfs_name, offset_addr);
+            dbg_print(is_debug_on, "want to write buf :\n");
+            for (i = 0; i < len; i++) {
+                dbg_print(is_debug_on, "0x%x ", buf[buf_offset + i]);
+                if (((i + 1) % 16) == 0) {
+                    dbg_print(is_debug_on, "\n");
+                }
+            }
+            dbg_print(is_debug_on, "\n");
+
+            dbg_print(is_debug_on, "actually reread buf :\n");
+            for (i = 0; i < len; i++) {
+                dbg_print(is_debug_on, "0x%x ", reread_buf[i]);
+                if (((i + 1) % 16) == 0) {
+                    dbg_print(is_debug_on, "\n");
+                }
+            }
+            dbg_print(is_debug_on, "\n");
+
+            close(sysfs_fd);
+            free(reread_buf);
+            return FIRMWARE_FAILED;
+        }
+        offset_addr += len;
+        buf_offset += len;
+        usleep(5000);
+    }
+    free(reread_buf);
+
+    dbg_print(is_debug_on, "firmware upgrade sysfs success.\n");
+    close(sysfs_fd);
+    return FIRMWARE_SUCCESS;
+}
+
+/* sysfs upgrade function */
+int firmware_upgrade_sysfs(int fd, uint8_t *buf, uint32_t size, name_info_t *info)
+{
+    int ret = 0;
+    firmware_dev_file_info_t dev_info;
+
+    if ((buf == NULL) || (info == NULL)) {
+        dbg_print(is_debug_on, "Input invalid error.\n");
+        goto exit;
+    }
+
+    /* get sysfs information*/
+    ret = firmware_sysfs_get_dev_info(fd, &dev_info);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "firmware_sysfs_get_dev_info failed, ret %d.\n", ret);
+        goto exit;
+    }
+
+    /* enable upgrade access */
+    ret = ioctl(fd, FIRMWARE_SYSFS_INIT, NULL);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "init dev logic faile\n");
+        goto exit;
+    }
+
+    ret = firmware_upgrade_sysfs_program(&dev_info, dev_info.dev_base, buf, size);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "init dev logic faile\n");
+        goto fail;
+    }
+
+    dbg_print(is_debug_on, "firmware upgrade sysfs success.\n");
+    /* disable upgrade access */
+    ret = ioctl(fd, FIRMWARE_SYSFS_FINISH,NULL);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "close dev logic en failed.\n");
+    }
+    return FIRMWARE_SUCCESS;
+
+fail:
+    /* disable upgrade access */
+    ret = ioctl(fd, FIRMWARE_SYSFS_FINISH, NULL);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "close dev logic en failed.\n");
+    }
+exit:
+    dbg_print(is_debug_on, "firmware upgrade sysfs fail.\n");
+    return FIRMWARE_FAILED;
+}
+
+/* sysfs upgrade test function */
+int firmware_upgrade_sysfs_test(int fd, name_info_t *info)
+{
+    int ret, rv;
+    firmware_dev_file_info_t dev_info;
+    uint8_t *data_buf;
+    uint8_t num;
+    int j;
+
+    if (info == NULL) {
+        dbg_print(is_debug_on, "Input invalid error.\n");
+        return FIRMWARE_FAILED;
+    }
+
+    /* get sysfs information*/
+    ret = firmware_sysfs_get_dev_info(fd, &dev_info);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "firmware_sysfs_get_dev_info failed, ret %d.\n", ret);
+        return FIRMWARE_FAILED;
+    }
+
+    if (dev_info.test_size == 0) {
+        dbg_print(is_debug_on, "Error: get sysfs test size:%d, not support.\n", dev_info.test_size);
+        return FIRMWARE_NOT_SUPPORT;
+    }
+
+    data_buf = (uint8_t *) malloc(dev_info.test_size);
+    if (data_buf == NULL) {
+        dbg_print(is_debug_on, "Error: Failed to malloc memory for test data buf, size=%d.\n", dev_info.test_size);
+        return FIRMWARE_FAILED;
+    }
+
+    /* Get random data */
+    for (j = 0; j < dev_info.test_size; j++) {
+        num = (uint8_t) rand() % 256;
+        data_buf[j] = num & 0xff;
+    }
+
+    /* enable upgrade access */
+    ret = ioctl(fd, FIRMWARE_SYSFS_INIT, NULL);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "init dev logic faile\n");
+        free(data_buf);
+        return FIRMWARE_FAILED;
+    }
+
+    ret = firmware_upgrade_sysfs_program(&dev_info, dev_info.test_base, data_buf, dev_info.test_size);
+    /* disable upgrade access */
+    rv = ioctl(fd, FIRMWARE_SYSFS_FINISH,NULL);
+    if (rv < 0) {
+        dbg_print(is_debug_on, "close dev logic en failed.\n");
+    }
+    free(data_buf);
+
+    if (ret < 0) {
+        dbg_print(is_debug_on, "init dev logic faile\n");
+        return FIRMWARE_FAILED;
+    }
+
+    dbg_print(is_debug_on, "firmware upgrade sysfs success.\n");
+    return FIRMWARE_SUCCESS;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/firmware_upgrade_sysfs.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/firmware_upgrade_sysfs.h
new file mode 100644
index 000000000000..b69080ea642e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/firmware_upgrade_sysfs.h
@@ -0,0 +1,16 @@
+#ifndef __FIRMWARE_UPGRADE_SYSFS_H__
+#define __FIRMWARE_UPGRADE_SYSFS_H__
+
+#define FIRMWARE_DEV_NAME_LEN          (64) /* the macro definition needs to same as FIRMWARE_DEV_NAME_LEN in firmware_sysfs_upgrade.h */
+#define FW_SYSFS_RETRY_SLEEP_TIME      (10000)   /* 10ms */
+#define FW_SYSFS_RETRY_TIME            (5)  /* retry 5 times, 50ms = FW_SYSFS_RETRY_TIME *FW_SYSFS_RETRY_SLEEP_TIME;  */
+
+typedef struct firmware_dev_file_info_s {
+    char sysfs_name[FIRMWARE_DEV_NAME_LEN];         /* sysfs name */
+    uint32_t dev_base;                                   /* device upgrade base address */
+    uint32_t per_len;                                    /* The length of bytes per operation */
+    uint32_t test_base;                                  /* Test device address */
+    uint32_t test_size;                                  /* Test flash size */
+} firmware_dev_file_info_t;
+
+#endif /* End of __FIRMWARE_UPGRADE_SYSFS_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/fw_upg_spi_logic_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/fw_upg_spi_logic_dev.c
new file mode 100644
index 000000000000..7db3c1b7b6ec
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/fw_upg_spi_logic_dev.c
@@ -0,0 +1,1181 @@
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <errno.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <ctype.h>
+#include <string.h>
+#include <dirent.h>
+#include <linux/version.h>
+#include <asm/byteorder.h>
+#include <stdint.h>
+#include <firmware_app.h>
+#include "fw_upg_spi_logic_dev.h"
+
+#define be32_to_cpus(p)  __be32_to_cpus(p)
+#define le32_to_cpus(p)  __le32_to_cpus(p)
+#define cpu_to_be32s(p)  __cpu_to_be32s(p)
+#define cpu_to_le32s(p)  __cpu_to_le32s(p)
+
+static void firmware_upgrade_printf_reg(uint8_t *buf, int buf_len, uint32_t offset_addr)
+{
+    int i, j, tmp;
+
+    j = offset_addr % 16;
+    tmp = j;
+    offset_addr -= j;
+    printf("\n            ");
+
+    for (i = 0; i < 16; i++) {
+        printf("%2x ", i);
+    }
+
+    for (i = 0; i < buf_len + j; i++) {
+        if ((i % 16) == 0) {
+            printf("\n0x%08x  ", offset_addr);
+            offset_addr = offset_addr + 16;
+        }
+        if (tmp) {
+            printf("   ");
+            tmp--;
+        } else {
+            printf("%02x ", buf[i-j]);
+        }
+    }
+
+    printf("\n");
+    return;
+}
+
+static int firmware_upgrade_get_spi_logic_info(int fd, firmware_spi_logic_upg_t *current_upg_priv)
+{
+    int ret;
+    firmware_spi_logic_info_t syfs_info;
+
+    if (fd < 0) {
+        dbg_print(is_debug_on, "Error: get spi logic info fd %d.\n", fd);
+        return fd;
+    }
+
+    ret = 0;
+    ret = ioctl(fd, FIRMWARE_SYSFS_SPI_INFO, &syfs_info);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Failed to get upg flash dev info, ret=%d\n", ret);
+        return -FW_SPI_FLASH_GET_INFO_ERR;
+    }
+
+    current_upg_priv->flash_base          = syfs_info.flash_base;
+    current_upg_priv->ctrl_base           = syfs_info.ctrl_base;
+    memcpy(current_upg_priv->dev_path, syfs_info.logic_dev_name, FIRMWARE_LOGIC_DEV_NAME_LEN - 1);
+    current_upg_priv->status_reg          = syfs_info.ctrl_base + FPGA_UPG_STATUS_REG;
+    current_upg_priv->spi_ctrl_reg        = syfs_info.ctrl_base + FPGA_UPG_SPI_CTRL_REG;
+    current_upg_priv->wr_flash_status_reg = syfs_info.ctrl_base + FPGA_UPG_WR_FLASH_STATUS_REG;
+    current_upg_priv->rd_flash_status_reg = syfs_info.ctrl_base + FPGA_UPG_RD_FLASH_STATUS_REG;
+    current_upg_priv->instruction_reg     = syfs_info.ctrl_base + FPGA_UPG_INSTRUCTION_REG;
+    current_upg_priv->addr_reg            = syfs_info.ctrl_base + FPGA_UPG_ADDR_REG;
+    current_upg_priv->length_reg          = syfs_info.ctrl_base + FPGA_UPG_LENGTH_REG;
+    current_upg_priv->device_id_reg       = syfs_info.ctrl_base + FPGA_UPG_DEVICE_ID_REG;
+    current_upg_priv->drop_reg_num_reg    = syfs_info.ctrl_base + FPGA_UPG_DROP_REQ_NUM_REG;
+    current_upg_priv->test_base           = syfs_info.test_base;
+    current_upg_priv->test_size           = syfs_info.test_size;
+
+    return 0;
+}
+
+static int firmware_upgrade_spi_logic_init(int fd)
+{
+    int ret;
+
+    ret = 0;
+    ret = ioctl(fd, FIRMWARE_SYSFS_INIT, NULL);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Failed to init spi logic, ret=%d\n", ret);
+        return -1;
+    }
+
+    return 0;
+}
+
+static int firmware_upgrade_spi_logic_finish(int fd)
+{
+    int ret;
+
+    if (fd < 0) {
+        dbg_print(is_debug_on, "Error: get spi logic info fd %d.\n", fd);
+        return -1;
+    }
+
+    ret = 0;
+    ret = ioctl(fd, FIRMWARE_SYSFS_FINISH, NULL);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Failed to release spi logic, ret=%d\n", ret);
+        return -1;
+    }
+
+    return 0;
+}
+
+/**
+ * firmware_fpga_file_read -
+ * function:Provide FPGA read-register interface (address must be 4-byte aligned)
+ * @dev_name: Device file descriptor
+ * @offset: device offset
+ * @buf:  Read Data Buffer
+ * @rd_len:  Read Data Length
+ * return: 0--success; other--fail
+ */
+int firmware_fpga_file_read(char *dev_name, uint32_t offset, uint8_t *buf, uint32_t rd_len)
+{
+    int ret, fd;
+
+    if ((dev_name == NULL) || (buf == NULL)) {
+        dbg_print(is_debug_on, "upg_priv or read buf is null.\n");
+        return -1;
+    }
+
+    if ((fd = open(dev_name, O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO)) < 0) {
+        dbg_print(is_debug_on, "Error: Could not open file %s. Errno=%d\n", dev_name, errno);
+        return -1;
+    }
+
+    ret = lseek(fd, offset, SEEK_SET);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "read llseek failed, errno: %s\n", strerror(errno));
+        close(fd);
+        return -1;
+    }
+
+    ret = read(fd, buf, rd_len);
+    if (ret  < 0) {
+        dbg_print(is_debug_on, "read failed, err: %s\n", strerror(errno));
+        close(fd);
+        return -1;
+    }
+
+    close(fd);
+    return 0;
+}
+
+static int firmware_fpga_read_word(char *dev_name, uint32_t addr, uint32_t *val)
+{
+    int ret;
+    uint32_t retry;
+
+    if (sizeof(int) < FIRMWARE_FPGA_WORD_LEN) {
+        dbg_print(is_debug_on, "Error:dfd_fpga_read_word buf len %ld support len %d.\n",
+                sizeof(int), FIRMWARE_FPGA_WORD_LEN);
+        return -1;
+    }
+
+    retry = 0;
+    *val = 0;
+    while(retry < FIRMWARE_FPGA_UPG_RETRY_CNT) {
+        ret = firmware_fpga_file_read(dev_name, addr, (uint8_t *)val, FIRMWARE_FPGA_WORD_LEN);
+        if (ret) {
+            retry++;
+            dbg_print(is_debug_on, "firmware_fpga_file_read addr 0x%x retry %u failed ret %d.\n",
+                addr, retry, ret);
+            continue;
+        } else {
+            le32_to_cpus(val);
+            return 0;
+        }
+    }
+
+    dbg_print(is_debug_on, "dfd_fpga_read_word addr 0x%x retry %u failed ret %d.\n", addr, retry, ret);
+    return -1;
+}
+
+static int firmware_fpga_read_buf(char *dev_name, uint32_t addr, uint8_t *buf, uint32_t rd_len)
+{
+    int ret;
+    uint32_t retry;
+
+    retry = 0;
+    while(retry < FIRMWARE_FPGA_UPG_RETRY_CNT) {
+        ret = firmware_fpga_file_read(dev_name, addr, buf, rd_len);
+        if (ret) {
+            retry++;
+            dbg_print(is_debug_on, "firmware_fpga_file_read addr 0x%x rd_len %u i %d failed ret %d.\n",
+                    addr, rd_len, retry, ret);
+            continue;
+        } else {
+            return 0;
+        }
+    }
+
+    dbg_print(is_debug_on, "firmware_fpga_file_read addr 0x%x rd_len %u retry %u failed ret %d.\n",
+            addr, rd_len, retry, ret);
+    return -1;
+}
+
+/**
+ * firmware_fpga_file_write -
+ * function:Provide FPGA write-register interface (address must be 4-byte aligned)
+ * @dev_name: Device file descriptor
+ * @offset: device offset
+ * @buf:  Write Data Buffer
+ * @wr_len:  Write Data Length
+ * return: 0--success; other--fail
+ */
+int firmware_fpga_file_write(char *dev_name, uint32_t offset, uint8_t *buf, uint32_t wr_len)
+{
+    int ret, fd;
+
+    if ((dev_name == NULL) || (buf == NULL)) {
+        dbg_print(is_debug_on, "dev_name or write buf is null.\n");
+        return -1;
+    }
+
+    if ((fd = open(dev_name, O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO)) < 0) {
+        dbg_print(is_debug_on, "Error: Could not open file %s. Errno=%d\n", dev_name, errno);
+        return -1;
+    }
+
+    ret = lseek(fd, offset, SEEK_SET);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "write llseek failed, err: %s\n", strerror(errno));
+        close(fd);
+        return -1;
+    }
+
+    ret = write(fd, buf, wr_len);
+    if (ret < 0 ) {
+        dbg_print(is_debug_on, "write failed, err: %s\n", strerror(errno));
+        close(fd);
+        return -1;
+    }
+
+    close(fd);
+    return 0;
+}
+
+static int firmware_fpga_write_word(char *dev_name, uint32_t addr, uint32_t val)
+{
+    int ret;
+    uint32_t retry, tmp;
+
+    retry = 0;
+    tmp = val;
+    cpu_to_le32s(&tmp);
+    while(retry < FIRMWARE_FPGA_UPG_RETRY_CNT) {
+        ret = firmware_fpga_file_write(dev_name, addr, (uint8_t *)&tmp, FIRMWARE_FPGA_WORD_LEN);
+        if (ret) {
+            retry++;
+            dbg_print(is_debug_on, "firmware_fpga_file_write addr 0x%x val 0x%x retry %u failed ret %d.\n",
+                addr, val, retry, ret);
+            continue;
+        } else {
+            return 0;
+        }
+    }
+
+    dbg_print(is_debug_on, "firmware_fpga_file_write addr 0x%x val 0x%x retry %u failed ret %d.\n",
+        addr, val, retry, ret);
+    return -1;
+}
+
+static int firmware_fpga_write_buf(char *dev_name, uint32_t addr, uint8_t *buf, uint32_t wr_len)
+{
+    int ret;
+    uint32_t retry;
+
+    retry = 0;
+    while(retry < FIRMWARE_FPGA_UPG_RETRY_CNT) {
+        ret = firmware_fpga_file_write(dev_name, addr, buf, wr_len);
+        if (ret) {
+            retry++;
+            dbg_print(is_debug_on, "firmware_fpga_file_write addr 0x%x wr_len 0x%x retry %u failed ret %d.\n",
+                addr, wr_len, retry, ret);
+            continue;
+        } else {
+            return 0;
+        }
+    }
+
+    dbg_print(is_debug_on, "dfd_fpga_buf_write addr 0x%x wr_len 0x%x retry %u failed ret %d.\n",
+        addr, wr_len, retry, ret);
+
+    return -1;
+}
+
+/* Whether the SPI port is idle, 0--idle, 1--busy */
+static int firmware_fpga_get_status(firmware_spi_logic_upg_t *upg_priv, char *status)
+{
+    int ret;
+    uint32_t addr, val;
+
+    addr = upg_priv->status_reg;
+    ret = firmware_fpga_read_word(upg_priv->dev_path, addr, &val);
+    if (ret) {
+        dbg_print(is_debug_on, "firmware_fpga_get_status addr 0x%x failed ret %d.\n", addr, ret);
+        return -1;
+    }
+
+    *status = val & FPGA_UPG_STATUS_MASK;
+
+    return 0;
+}
+
+/* Wait for the SPI port to become free again */
+static int firmware_fpga_wait_ready(firmware_spi_logic_upg_t *upg_priv)
+{
+    int timeout;
+    char status;
+    int ret;
+
+    timeout = FIRMWARE_UPG_RETRY_TIME_CNT;
+    while (timeout--) {
+        usleep(FIRMWARE_UPG_RETRY_SLEEP_TIME);
+        ret = firmware_fpga_get_status(upg_priv, &status);
+        if (ret) {
+            dbg_print(is_debug_on, "firmware_fpga_get_status failed ret %d.\n", ret);
+            continue;
+        }
+
+        /* Determine if it's idle */
+        if (!status) {
+            return 0;
+        }
+    }
+
+    return -1;
+}
+
+/* Configure access */
+static int firmware_fpga_set_access(firmware_spi_logic_upg_t *upg_priv, uint32_t cmd)
+{
+    int ret;
+    uint32_t addr, val;
+
+    addr = upg_priv->instruction_reg;
+    val = cmd;
+    ret = firmware_fpga_write_word(upg_priv->dev_path, addr, val);
+    if (ret) {
+        dbg_print(is_debug_on, "firmware_fpga_write_word addr 0x%x val 0x%x failed ret %d.\n", addr, val, ret);
+        return -1;
+    }
+
+    addr = upg_priv->spi_ctrl_reg;
+    val = FPGA_UPG_ACCESS_ENABLE;
+    ret = firmware_fpga_write_word(upg_priv->dev_path, addr, val);
+    if (ret) {
+        dbg_print(is_debug_on, "firmware_fpga_write_word addr 0x%x val 0x%x failed ret %d.\n", addr, val, ret);
+        return -1;
+    }
+
+    /* Wait for the SPI port on the FPGA to become free again*/
+    ret = firmware_fpga_wait_ready(upg_priv);
+    if (ret) {
+        dbg_print(is_debug_on,"firmware_fpga_wait_ready failed ret %d.\n", ret);
+        return -FW_SPI_FLASH_BUSY;
+    }
+
+    return 0;
+}
+
+/* Get SPI STATUS register */
+static int firmware_fpga_get_spi_status(firmware_spi_logic_upg_t *upg_priv, char *status)
+{
+    int ret;
+    uint32_t val, addr, cmd;
+
+    cmd = FPGA_UPG_INSTRUTION_RDSR;
+    ret = firmware_fpga_set_access(upg_priv, cmd);
+    if (ret) {
+        dbg_print(is_debug_on, "firmware_fpga_set_access cmd 0x%x failed ret %d.\n", cmd, ret);
+        return -1;
+    }
+
+    addr = upg_priv->rd_flash_status_reg;
+    ret = firmware_fpga_read_word(upg_priv->dev_path, addr, &val);
+    if (ret) {
+        dbg_print(is_debug_on, "firmware_fpga_read_word addr 0x%x failed ret %d.\n", addr, ret);
+        return -1;
+    }
+
+    *status = val & FPGA_UPG_SPI_STATUS_MASK;
+
+    return 0;
+}
+
+/* Wait for the SPI chip operation to complete */
+static int firmware_fpga_wait_spi_ready(firmware_spi_logic_upg_t *upg_priv,
+    uint32_t timeout, uint32_t usleep_time)
+{
+    char status;
+    int ret;
+
+    while (timeout--) {
+        usleep(usleep_time);
+        ret = firmware_fpga_get_spi_status(upg_priv, &status);
+        if (ret) {
+            dbg_print(is_debug_on, "firmware_fpga_get_spi_status failed ret %d.\n", ret);
+            continue;
+        }
+        /* Determine if it's idle */
+        if (!status) {
+            return 0;
+        }
+    }
+
+    return -FW_SPI_FLASH_SPI_BUSY;
+}
+
+/* Configure FPGA upgrade write enable */
+static int firmware_fpga_set_wr_enable(firmware_spi_logic_upg_t *upg_priv)
+{
+    int ret;
+    uint32_t cmd;
+
+    cmd = FPGA_UPG_INSTRUTION_WREN;
+    ret = firmware_fpga_set_access(upg_priv, cmd);
+    if (ret) {
+        dbg_print(is_debug_on, "firmware_fpga_set_access cmd %d failed ret %d.\n", cmd, ret);
+        return -1;
+    }
+
+    return 0;
+}
+
+#if 0
+/* erase all flash */
+static int firmware_fpga_upg_set_erase_all(firmware_spi_logic_upg_t *upg_priv)
+{
+    int ret;
+    int cmd;
+
+    /* Wait for the SPI port on the FPGA to become free */
+    ret = firmware_fpga_wait_ready(upg_priv);
+    if (ret) {
+        dbg_print(is_debug_on, "firmware_fpga_wait_ready failed ret %d.\n", ret);
+        return -1;
+    }
+
+    /* Configure FPGA upgrade write enable */
+    ret = firmware_fpga_set_wr_enable(upg_priv);
+    if (ret) {
+        dbg_print(is_debug_on, "firmware_fpga_set_wr_enable failed ret %d.\n", ret);
+        return -1;
+    }
+
+    cmd = FPGA_UPG_INSTRUTION_BE;
+    ret = firmware_fpga_set_access(upg_priv, cmd);
+    if (ret) {
+        dbg_print(is_debug_on, "firmware_fpga_set_access cmd %d failed ret %d.\n", cmd, ret);
+        return -1;
+    }
+
+    /* Hardware requirements, delay of 1s */
+    sleep(1);
+
+    /* Wait for the SPI chip operation to complete, 1s check status once, max delay 300s */
+    ret = firmware_fpga_wait_spi_ready(upg_priv, 300, (1 * 1000 * 1000));
+    if (ret) {
+        dbg_print(is_debug_on, "dfd_fpga_wait_spi_ready failed ret %d.\n", ret);
+        return -1;
+    }
+
+    dbg_print(is_debug_on, "Success.\n");
+    return 0;
+}
+#endif
+
+/* Erase sectors (256 pages, 64K total) */
+static int firmware_fpga_erase_sector(firmware_spi_logic_upg_t *upg_priv, uint32_t spi_addr)
+{
+    int ret;
+    uint32_t val, addr, cmd;
+
+    /* Wait for the SPI port on the FPGA to become free again */
+    ret = firmware_fpga_wait_ready(upg_priv);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "firmware_fpga_wait_ready failed ret %d.\n", ret);
+        return -FW_SPI_FLASH_BUSY;
+    }
+
+    /* Enable write */
+    ret = firmware_fpga_set_wr_enable(upg_priv);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "firmware_fpga_set_wr_enable failed ret %d.\n", ret);
+        return -FW_SPI_FLASH_WR_ENABLE_ERR;
+    }
+
+    /* Write erase address */
+    val = spi_addr;
+    addr = upg_priv->addr_reg;
+    ret = firmware_fpga_write_word(upg_priv->dev_path, addr, val);
+    if (ret) {
+        dbg_print(is_debug_on, "firmware_fpga_write_word addr 0x%x val 0x%x failed ret %d.\n", addr, val, ret);
+        return -FW_SPI_FLASH_ERASE_ADDR_ERR;
+    }
+
+    /* Enable sector erasure */
+    cmd = FPGA_UPG_INSTRUTION_SE;
+    ret = firmware_fpga_set_access(upg_priv, cmd);
+    if (ret) {
+        dbg_print(is_debug_on, "firmware_fpga_set_access cmd %d failed ret %d.\n", cmd, ret);
+        return -FW_SPI_FLASH_ERASE_SECTOR_ERR;
+    }
+
+    /* Hardware requirements, delay of 0.25s */
+    usleep(250 * 1000);
+
+    /* Wait for the SPI chip operation to complete, 1s check status once, max delay 10s */
+    ret = firmware_fpga_wait_spi_ready(upg_priv, FPGA_UPG_WAIT_SPI_RETRY_CNT, (100 * 1000));
+    if (ret) {
+        dbg_print(is_debug_on, "firmware_fpga_wait_spi_ready failed ret %d.\n", ret);
+        return -FW_SPI_FLASH_SPI_BUSY;
+    }
+
+    return 0;
+}
+
+#if 0
+int firmware_fpga_erase64_sector(firmware_spi_logic_upg_t *upg_priv, int offset)
+{
+    int ret;
+    ret = -1;
+
+    if ((offset % FIRMWARE_SPI_LOGIC_SECTOR_SIZE) == 0) {
+        dbg_print(is_debug_on, "erase 64k area, offset 0x%x.\n", offset);
+        ret = firmware_fpga_erase_sector(upg_priv, offset);
+        if (ret) {
+            dbg_print(is_debug_on, "firmware_fpga_erase_sector offset 0x%x failed ret %d.\n", offset, ret);
+            return ret;
+        }
+    } else {
+        dbg_print(is_debug_on, "Input para invalid, offset 0x%x.\n", offset);
+    }
+
+    return ret;
+}
+#endif
+
+static int firmware_fpga_upg_program(firmware_spi_logic_upg_t *upg_priv,
+    uint32_t spi_addr, uint8_t *buf, uint32_t len)
+{
+    int ret;
+    uint32_t addr, val, cmd, wr_len;
+
+    /* Write data to the Upgrade Content Register */
+    addr = upg_priv->ctrl_base;
+    wr_len = len;
+    ret = firmware_fpga_write_buf(upg_priv->dev_path, addr, (uint8_t*)buf, wr_len);
+    if (ret) {
+        dbg_print(is_debug_on,"firmware_fpga_write_buf addr 0x%x wr_len %d failed ret %d.\n",
+                    addr, len, ret);
+        return -FW_SPI_FLASH_WR_ERR;
+    }
+
+    /* Write length register, FPGA is fixed 256 lengths */
+    val = FFPGA_UPG_DATA_SIZE;
+    addr = upg_priv->length_reg;
+    ret = firmware_fpga_write_word(upg_priv->dev_path, addr, val);
+    if (ret) {
+        dbg_print(is_debug_on,"firmware_fpga_write_word addr 0x%x val 0x%x failed ret %d.\n",
+                addr, val, ret);
+        return -FW_SPI_FLASH_WR_LENGTH_ERR;
+    }
+
+    /* Write address register */
+    val = spi_addr;
+    addr = upg_priv->addr_reg;
+    ret = firmware_fpga_write_word(upg_priv->dev_path, addr, val);
+    if (ret) {
+        dbg_print(is_debug_on,"firmware_fpga_write_word addr 0x%x val 0x%x failed ret %d.\n",
+                addr, val, ret);
+        return -FW_SPI_FLASH_WR_ADDR_ERR;
+    }
+
+    /* Start writing upgrade data to SPI */
+    cmd = FPGA_UPG_INSTRUTION_PP;
+    ret = firmware_fpga_set_access(upg_priv, cmd);
+    if (ret) {
+        dbg_print(is_debug_on,"firmware_fpga_set_access cmd %d failed ret %d.\n", cmd, ret);
+        return -FW_SPI_FLASH_SET_ACCESS_ERR;
+    }
+
+    /* min write wait 0.33ms */
+    usleep(330);
+
+    /* Wait for the SPI chip operation to complete, 100us check status once, max delay 10ms */
+    ret = firmware_fpga_wait_spi_ready(upg_priv, FPGA_UPG_WAIT_SPI_RETRY_CNT, (100));
+    if (ret) {
+        dbg_print(is_debug_on,"firmware_fpga_wait_spi_ready failed ret %d.\n", ret);
+        return -FW_SPI_FLASH_BUSY;
+    }
+
+    return 0;
+}
+
+/**
+ * firmware_fpga_upg_write
+ * function: write interface provided to the upgrade module
+ * @upg_priv: Device information
+ * @addr: upgrade addr
+ * @buf:  Write Data Buffer
+ * @len:  Write Data Length
+ * return: 0--success; other--fail
+ */
+static int firmware_fpga_upg_write(firmware_spi_logic_upg_t *upg_priv,
+    uint32_t addr, uint8_t *buf, uint32_t len)
+{
+    int ret;
+
+    /* address must be 256 bytes aligned */
+    if ((upg_priv == NULL) || (buf == NULL) || (addr & 0xff) || (len > 256)) {
+        dbg_print(is_debug_on,"Input para invalid upg_priv %p buf %p addr 0x%x len %u.\n",
+                upg_priv, buf, addr, len);
+        return -FW_SPI_FLASH_PARAM_ERR;
+    }
+
+    /* Wait for the SPI port on the FPGA to become free again*/
+    ret = firmware_fpga_wait_ready(upg_priv);
+    if (ret) {
+        dbg_print(is_debug_on,"firmware_fpga_wait_ready failed ret %d.\n", ret);
+        return -FW_SPI_FLASH_BUSY;
+    }
+
+    /* Configure write enable */
+    ret = firmware_fpga_set_wr_enable(upg_priv);
+    if (ret) {
+        dbg_print(is_debug_on,"firmware_fpga_set_wr_enable failed ret %d.\n", ret);
+        return -FW_SPI_FLASH_WR_ENABLE_ERR;
+    }
+
+    /* Write upgrade data */
+    ret = firmware_fpga_upg_program(upg_priv, addr, buf, len);
+    if (ret) {
+        dbg_print(is_debug_on,"dfd_fpga_upg_program addr 0x%x len %u failed ret %d.\n", addr, len, ret);
+        return -FW_SPI_FLASH_UPG_ERR;
+    }
+
+    return 0;
+}
+
+static int firmware_fpga_fast_read(firmware_spi_logic_upg_t *upg_priv,
+    uint32_t spi_addr, uint8_t *buf, uint32_t len)
+{
+    int ret;
+    uint32_t val, addr, cmd;
+
+    /* Clear register value */
+    addr = upg_priv->ctrl_base;
+    ret = firmware_fpga_write_buf(upg_priv->dev_path, addr, buf, len);
+    if (ret) {
+        dbg_print(is_debug_on, "firmware_fpga_write_buf addr 0x%x len %d failed ret %d.\n", addr, len, ret);
+        return -FW_SPI_FLASH_WR_ERR;
+    }
+    /* Write length register */
+    val = FFPGA_UPG_DATA_SIZE;
+    addr = upg_priv->length_reg;
+    ret = firmware_fpga_write_word(upg_priv->dev_path, addr, val);
+    if (ret) {
+        dbg_print(is_debug_on, "firmware_fpga_write_word addr 0x%x val 0x%x failed ret %d.\n",
+                addr, val, ret);
+        return -FW_SPI_FLASH_WR_LENGTH_ERR;
+    }
+
+    /* Write address register */
+    val = spi_addr;
+    addr = upg_priv->addr_reg;
+    ret = firmware_fpga_write_word(upg_priv->dev_path, addr, val);
+    if (ret) {
+        dbg_print(is_debug_on, "firmware_fpga_write_word addr 0x%x val 0x%x failed ret %d.\n",
+                    addr, val, ret);
+        return -FW_SPI_FLASH_WR_ADDR_ERR;
+    }
+
+    /* Start reading SPI data */
+    cmd = FPGA_UPG_INSTRUTION_FR;
+    ret = firmware_fpga_set_access(upg_priv, cmd);
+    if (ret) {
+        dbg_print(is_debug_on, "firmware_fpga_set_access cmd %d failed ret %d.\n", cmd, ret);
+        return -FW_SPI_FLASH_SET_ACCESS_ERR;
+    }
+
+    /* Read the upgraded content register to the buffer,
+     * FPGA only supports 4 bytes of read and write */
+    addr = upg_priv->ctrl_base;
+    ret = firmware_fpga_read_buf(upg_priv->dev_path, addr, (uint8_t*)buf, len);
+    if (ret) {
+        dbg_print(is_debug_on, "firmware_fpga_read_buf addr 0x%x len %d failed ret %d.\n", addr, len, ret);
+        return -FW_SPI_FLASH_RD_ERR;
+    }
+
+    return 0;
+}
+
+/**
+ * firmware_fpga_upg_read
+ * function: read interface provided to the upgrade module
+ * @upg_priv: Device information
+ * @addr: upgrade addr
+ * @buf:  Read Data Buffer
+ * @len:  Read Data Length
+ * return: 0--success; other--fail
+ */
+static int firmware_fpga_upg_read(firmware_spi_logic_upg_t *upg_priv,
+    uint32_t addr, uint8_t *buf, uint32_t len)
+{
+    int ret;
+
+    /* address must be 256 bytes aligned */
+    if ((upg_priv == NULL) || (buf == NULL) || (addr & 0xff) || (len > 256)) {
+        dbg_print(is_debug_on, "Input para invalid upg_priv %p buf %p addr 0x%x len %u.\n",
+                upg_priv, buf, addr, len);
+        return -FW_SPI_FLASH_PARAM_ERR;
+    }
+
+    /* Wait for the SPI port on the FPGA to become free again */
+    ret = firmware_fpga_wait_ready(upg_priv);
+    if (ret) {
+        dbg_print(is_debug_on, "firmware_fpga_wait_ready failed ret %d.\n", ret);
+        return -FW_SPI_FLASH_BUSY;
+    }
+
+    /* Configure write enable */
+    ret = firmware_fpga_set_wr_enable(upg_priv);
+    if (ret) {
+        dbg_print(is_debug_on, "firmware_fpga_set_wr_enable failed ret %d.\n", ret);
+        return -FW_SPI_FLASH_WR_ENABLE_ERR;
+    }
+
+    /* Read upgrade data */
+    ret = firmware_fpga_fast_read(upg_priv, addr, buf, len);
+    if (ret) {
+        dbg_print(is_debug_on, "firmware_fpga_fast_read addr 0x%x len %u failed ret %d.\n", addr, len, ret);
+        return -FW_SPI_FLASH_RD_ERR;
+    }
+
+    return 0;
+
+}
+
+static int firmware_upgreade_fpga_onetime(firmware_spi_logic_upg_t *upg_priv,
+        uint32_t flash_base, uint8_t *buf, uint32_t size)
+{
+    uint32_t offset, len, flash_addr, retry;
+    int ret, res;
+    uint8_t rbuf[FFPGA_UPG_DATA_SIZE];
+
+    offset = 0;
+    while(offset < size) {
+        flash_addr = flash_base + offset;
+        /* Erases a sector */
+        if ((flash_addr % FIRMWARE_SPI_LOGIC_SECTOR_SIZE) == 0) {
+            ret = firmware_fpga_erase_sector(upg_priv, flash_addr);
+            if (ret < 0) {
+                dbg_print(is_debug_on, "firmware_fpga_erase_sector flash_addr 0x%x failed ret %d.\n",
+                        flash_addr, ret);
+                goto exit;
+            }
+        }
+
+        if (size > FFPGA_UPG_DATA_SIZE) {
+            len = FFPGA_UPG_DATA_SIZE;
+        } else {
+            len = size;
+        }
+
+        /* first, Write data */
+        ret = firmware_fpga_upg_write(upg_priv, flash_addr, buf + offset, len);
+        if (ret) {
+            dbg_print(is_debug_on, "firmware_fpga_upg_write addr 0x%x len 0x%x failed ret %d.\n",
+                    flash_addr, len, ret);
+            ret = -FW_SPI_FLASH_UPG_ERR;
+            goto exit;
+        }
+
+        /* Read back the data and compare the correctness of the data */
+        for (retry = 0; retry < FPGA_UPG_RETRY_TIMES; retry++) { /*retry 3 times*/
+            mem_clear(rbuf, len);
+            ret = firmware_fpga_upg_read(upg_priv, flash_addr, rbuf, len);
+            res = memcmp(rbuf, buf + offset, len);
+            if (ret || res) {
+                usleep(1000);
+                continue;
+            }
+            break;
+        }
+
+         if (ret) {
+            dbg_print(is_debug_on, "firmware fpga read offset 0x%x len 0x%x failed ret %d.\n", flash_addr, len, ret);
+            ret = -FW_SPI_FLASH_RD_ERR;
+            goto exit;
+        }
+
+        if (res) {
+            dbg_print(is_debug_on, "firmware fpga rbuf wbuf not equal, len 0x%x, check failed.\n", len);
+            ret = -FW_SPI_FLASH_DATA_CMP_ERR;
+            goto exit;
+        }
+        offset += len;
+    }
+
+    dbg_print(is_debug_on, "Update success.\n");
+    return FIRMWARE_SUCCESS;
+exit:
+    dbg_print(is_debug_on, "Update failed.\n");
+    return FIRMWARE_FAILED;
+}
+
+static int firmware_upgrade_do_spi_logic(firmware_spi_logic_upg_t *current_upg_priv,
+        unsigned char *buf, uint32_t size)
+{
+    int i, ret;
+    uint32_t retry;
+
+    i = 0;
+    retry = FIRMWARE_SPI_LOGIC_UPG_RETRY_CNT;
+
+    ret = 0;
+    while(i < retry) {
+        ret = firmware_upgreade_fpga_onetime(current_upg_priv, current_upg_priv->flash_base, buf, size);
+        if (ret) {
+            i++;
+            dbg_print(is_debug_on, "firmware_upgreade_fpga_onetime size 0x%x failed ret %d.\n", size, ret);
+            continue;
+        } else {
+            dbg_print(is_debug_on, "firmware_upgreade_fpga_onetime success.\n");
+            return 0;
+        }
+    }
+
+    return ret;
+}
+
+/*
+ * firmware_upgrade_spi_logic_dev
+ * function: FPGA SPI FLASH Firmware upgrade handler function
+ * @fd:   param[in] sysfs device descriptor
+ * @buf:  param[in] Update data
+ * @size: param[in] Update data size
+ * @info: param[in] Upgrade file information
+ * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+int firmware_upgrade_spi_logic_dev(int fd, uint8_t *buf, uint32_t size, name_info_t *info)
+{
+    int ret;
+    firmware_spi_logic_upg_t current_upg_priv;
+
+    if ((fd < 0) || (buf == NULL) || (info == NULL)) {
+        dbg_print(is_debug_on, "Error:firmware upgrade spi logic dev parameters failed.\n");
+        return FIRMWARE_FAILED;
+    }
+
+    /* Gets the current logical device information */
+    mem_clear(&current_upg_priv, sizeof(firmware_spi_logic_upg_t));
+    ret = firmware_upgrade_get_spi_logic_info(fd, &current_upg_priv);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Error:firmware_upgrade_get_spi_logic_info failed ret %d.\n", ret);
+        return FIRMWARE_FAILED;
+    }
+
+    dbg_print(is_debug_on, "current_upg_priv dev_path[%s] flash_base[0x%0x] ctrl_base[0x%0x]\n",
+                current_upg_priv.dev_path, current_upg_priv.flash_base,
+                current_upg_priv.ctrl_base);
+
+    /* Enable upgrade access */
+    ret = firmware_upgrade_spi_logic_init(fd);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Error:firmware_upgrade_spi_logic_init failed ret %d.\n", ret);
+        return FIRMWARE_FAILED;
+    }
+
+    /* Upgrade logic device */
+    ret = firmware_upgrade_do_spi_logic(&current_upg_priv, buf, size);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Error:firmware_upgrade_do_spi_logic failed ret %d.\n", ret);
+        goto fail;
+    }
+
+    /* disable upgrade access */
+    ret = firmware_upgrade_spi_logic_finish(fd);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Error:firmware_upgrade_spi_logic_finish failed ret %d.\n", ret);
+    }
+
+    return FIRMWARE_SUCCESS;
+fail:
+    /* disable upgrade access */
+    ret = firmware_upgrade_spi_logic_finish(fd);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Error:firmware_upgrade_spi_logic_finish failed ret %d.\n", ret);
+    }
+
+    return FIRMWARE_FAILED;
+}
+
+int firmware_fpga_upgrade_test(firmware_spi_logic_upg_t *current_upg_priv)
+{
+    int ret, i, j, num;
+    uint8_t *wbuf;
+    uint32_t retry;
+
+    ret = FW_SPI_FLASH_RV_OK;
+    wbuf = (uint8_t *) malloc(current_upg_priv->test_size);
+    if (wbuf == NULL) {
+        dbg_print(is_debug_on, "Error: Failed to malloc memory for test data buf, size=0x%x.\n", current_upg_priv->test_size);
+        ret = -FW_SPI_FLASH_NOT_SUPPORT_TEST;
+        goto exit;
+    }
+    mem_clear(wbuf, current_upg_priv->test_size);
+    /* Get random data */
+    for (j = 0; j < current_upg_priv->test_size; j++) {
+        num = rand() % 256;
+        wbuf[j] = num & 0xff;
+    }
+
+    i = 0;
+    retry = FIRMWARE_SPI_LOGIC_UPG_RETRY_CNT;
+
+    ret = 0;
+    while(i < retry) {
+        ret = firmware_upgreade_fpga_onetime(current_upg_priv, current_upg_priv->test_base, wbuf, current_upg_priv->test_size);
+        if (ret) {
+            i++;
+            dbg_print(is_debug_on, "firmware_upgreade_fpga_onetime test size 0x%x failed ret %d.\n",
+                        current_upg_priv->test_size, ret);
+            continue;
+        } else {
+            dbg_print(is_debug_on, "firmware_upgreade_fpga_onetime test success.\n");
+            break;
+        }
+    }
+    free(wbuf);
+exit:
+    return ret;
+}
+
+/*
+ * firmware_upgrade_spi_logic_dev_test
+ * function: FPGA SPI FLASH Firmware upgrade test handler function
+ * @fd:   param[in] sysfs device descriptor
+ * @buf:  param[in] Update data
+ * @size: param[in] Update data size
+ * @info: param[in] Upgrade file information
+ * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
+ */
+int firmware_upgrade_spi_logic_dev_test(int fd, name_info_t *info)
+{
+    int ret;
+    firmware_spi_logic_upg_t current_upg_priv;
+
+    if ((fd < 0) || (info == NULL)) {
+        dbg_print(is_debug_on, "Error:firmware upgrade spi logic dev parameters failed.\n");
+        return FIRMWARE_FAILED;
+    }
+
+    /* Gets the current logical device information */
+    mem_clear(&current_upg_priv, sizeof(firmware_spi_logic_upg_t));
+    ret = firmware_upgrade_get_spi_logic_info(fd, &current_upg_priv);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Error:firmware_upgrade_get_spi_logic_info failed ret %d.\n", ret);
+        return FIRMWARE_FAILED;
+    }
+
+    dbg_print(is_debug_on, "current_upg_priv dev_path[%s] test_base[0x%0x] test_size[0x%x]\n",
+                current_upg_priv.dev_path, current_upg_priv.test_base, current_upg_priv.test_size);
+    if (current_upg_priv.test_size <= 0) {
+        dbg_print(is_debug_on, "Error: don't support flast test.\n");
+        return FIRMWARE_NOT_SUPPORT;
+    }
+
+    /* Enable upgrade access */
+    ret = firmware_upgrade_spi_logic_init(fd);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Error:firmware_upgrade_spi_logic_init failed ret %d.\n", ret);
+        return FIRMWARE_FAILED;
+    }
+
+    /* Upgrade logic device */
+    ret = firmware_fpga_upgrade_test(&current_upg_priv);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Error:firmware_upgrade_do_spi_logic failed ret %d.\n", ret);
+        goto fail;
+    }
+
+    /* disable upgrade access */
+    ret = firmware_upgrade_spi_logic_finish(fd);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Error:firmware_upgrade_spi_logic_finish failed ret %d.\n", ret);
+    }
+
+    return FIRMWARE_SUCCESS;
+fail:
+    /* disable upgrade access */
+    ret = firmware_upgrade_spi_logic_finish(fd);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Error:firmware_upgrade_spi_logic_finish failed ret %d.\n", ret);
+    }
+
+    return FIRMWARE_FAILED;
+}
+
+static int firmware_upgreade_spi_logic_dump(firmware_spi_logic_upg_t *upg_priv,
+        uint32_t offset, uint8_t *buf, uint32_t size)
+{
+    int ret, i;
+    uint32_t addr, buf_page, retry, cnt, rd_len;
+
+    buf_page = FFPGA_UPG_DATA_SIZE;           /* read data by BUF SIZE each time */
+
+    cnt = size / FFPGA_UPG_DATA_SIZE;
+    if (size % FFPGA_UPG_DATA_SIZE) {
+        cnt++;
+    }
+    dbg_print(is_debug_on, "need read number of times:%d.\n", cnt);
+
+    for (i = 0; i < cnt; i++) {
+        addr = offset + i * FFPGA_UPG_DATA_SIZE;
+        if (i == (cnt - 1)) {
+            /* last time read remain size */
+            rd_len = size - buf_page * i;
+        } else {
+            /* each time read buf page size */
+            rd_len = buf_page;
+        }
+
+        for (retry = 0; retry < FPGA_UPG_RETRY_TIMES; retry++) {
+            ret = firmware_fpga_upg_read(upg_priv, addr, buf, rd_len);
+            if (ret < 0) {
+                dbg_print(is_debug_on, "addr:0x%x read %d time failed. ret %d\n", addr, retry, ret);
+                continue;
+            }
+            break;
+        }
+
+        if (ret < 0) {
+            dbg_print(is_debug_on, "finally addr:0x%x read failed ret %d\n", addr, ret);
+            return FIRMWARE_FAILED;
+        }
+
+        buf += rd_len;      /* buf pointer offset rd_len */
+    }
+
+    return FIRMWARE_SUCCESS;
+}
+
+static int firmware_fpga_dump_read(int fd, uint32_t offset, uint8_t *buf, uint32_t len)
+{
+    int ret;
+    firmware_spi_logic_upg_t current_upg_priv;
+
+    if ((fd < 0) || (buf == NULL)) {
+        dbg_print(is_debug_on, "Error:firmware upgrade spi logic dev parameters failed.\n");
+        return FIRMWARE_FAILED;
+    }
+
+    /* Gets the current logical device information */
+    mem_clear(&current_upg_priv, sizeof(firmware_spi_logic_upg_t));
+    ret = firmware_upgrade_get_spi_logic_info(fd, &current_upg_priv);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Error:firmware_upgrade_get_spi_logic_info failed ret %d.\n", ret);
+        return FIRMWARE_FAILED;
+    }
+
+    dbg_print(is_debug_on, "current_upg_priv dev_path[%s] flash_base[0x%0x] ctrl_base[0x%0x]\n",
+                current_upg_priv.dev_path, current_upg_priv.flash_base,
+                current_upg_priv.ctrl_base);
+
+    /* Enable upgrade access */
+    ret = firmware_upgrade_spi_logic_init(fd);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Error:firmware_upgrade_spi_logic_init failed ret %d.\n", ret);
+        return FIRMWARE_FAILED;
+    }
+
+    /* read logic device */
+    ret = firmware_upgreade_spi_logic_dump(&current_upg_priv, offset, buf, len);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Error:firmware_upgrade_do_spi_logic failed ret %d.\n", ret);
+        goto fail;
+    }
+
+    /* disable upgrade access */
+    ret = firmware_upgrade_spi_logic_finish(fd);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Error:firmware_upgrade_spi_logic_finish failed ret %d.\n", ret);
+    }
+
+    return FIRMWARE_SUCCESS;
+
+fail:
+    /* disable upgrade access */
+    ret = firmware_upgrade_spi_logic_finish(fd);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "Error:firmware_upgrade_spi_logic_finish failed ret %d.\n", ret);
+    }
+
+    return FIRMWARE_FAILED;
+}
+
+int firmware_upgrade_spi_logic_dev_dump(char *dev_name, uint32_t offset,
+        uint32_t len, char *record_file)
+{
+    int ret, dev_fd, file_fd;
+    char save_file[FIRMWARE_LOGIC_DEV_NAME_LEN];
+    uint8_t *buf;
+
+    dev_fd = open(dev_name, O_RDWR);
+    if (dev_fd < 0) {
+        dbg_print(is_debug_on, "Error: Failed to open %s, errno:%d.\n", dev_name, errno);
+        return FIRMWARE_FAILED;
+    }
+
+    dbg_print(is_debug_on, "open dev file %s succeeded.\n", dev_name);
+
+    buf = (uint8_t *) malloc(len);
+    if (buf == NULL) {
+        dbg_print(is_debug_on, "Error: Failed to malloc memory read %s data.\n", dev_name);
+        ret = FIRMWARE_FAILED;
+        goto free_dev_fd;
+    }
+
+    mem_clear(buf, len);
+    ret = firmware_fpga_dump_read(dev_fd, offset, buf, len);
+    if (ret < 0) {
+        dbg_print(is_debug_on, "addr 0x%x read 0x%x failed ret:%d\n", offset, len, ret);
+        goto free_data;
+    }
+
+    dbg_print(is_debug_on, "dump data succeeded. offset:0x%x, len:0x%x\n", offset, len);
+
+    if (strcmp(record_file, "print") != 0) {      /* record dump data on 'record_file' */
+        mem_clear(save_file, FIRMWARE_LOGIC_DEV_NAME_LEN);
+        strncpy(save_file, record_file, FIRMWARE_LOGIC_DEV_NAME_LEN - 1);
+        file_fd = open(save_file, O_RDWR|O_CREAT|O_TRUNC, S_IRWXG|S_IRWXU|S_IRWXO);
+        if (file_fd < 0) {
+            dbg_print(is_debug_on, "open file %s fail, errno:%d.\n", save_file, errno);
+            ret = -ENOENT;
+            goto free_data;
+        }
+
+        dbg_print(is_debug_on, "open save file %s succeeded.\n", save_file);
+
+        ret = write(file_fd, buf, len);
+        if (ret < 0) {
+            dbg_print(is_debug_on, "write failed (errno: %d).\n", errno);
+            goto free_file_fd;
+        }
+        dbg_print(is_debug_on, "write save file %s succeeded.\n", save_file);
+        ret = FIRMWARE_SUCCESS;
+    } else {    /* print reg on terminal by format */
+        firmware_upgrade_printf_reg((uint8_t*)buf, len, offset);
+        ret = FIRMWARE_SUCCESS;
+        goto free_data;
+    }
+
+free_file_fd:
+    close(file_fd);
+free_data:
+    free(buf);
+free_dev_fd:
+    close(dev_fd);
+
+    return ret;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/fw_upg_spi_logic_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/fw_upg_spi_logic_dev.h
new file mode 100644
index 000000000000..32f820161e86
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/fw_upg_spi_logic_dev.h
@@ -0,0 +1,90 @@
+#ifndef __FW_UPG_SPI_LOGIC_DEV_H__
+#define __FW_UPG_SPI_LOGIC_DEV_H__
+
+#define FIRMWARE_FPGA_WORD_LEN         (4)
+
+#define FIRMWARE_LOGIC_DEV_NAME_LEN          (64)    /* the macro definition needs to same as FIRMWARE_DEV_NAME_LEN in firmware_sysfs_upgrade.h */
+#define FIRMWARE_SPI_LOGIC_UPG_RETRY_CNT     (10)
+#define FIRMWARE_SPI_LOGIC_UPG_BUFF_SIZE     (256)
+#define FIRMWARE_SPI_LOGIC_SECTOR_SIZE       (0x10000)     /* One sector is 64Kk */
+
+#define FIRMWARE_UPG_RETRY_SLEEP_TIME        (10)   /* 10us */
+#define FIRMWARE_UPG_RETRY_TIME_CNT          (1000)
+#define FPGA_UPG_WAIT_SPI_RETRY_CNT           (100)
+#define FPGA_UPG_WAIT_SPI_RETRY_SLEEP_TIME    (1000 * 10)   /* 10ms */
+
+#define FIRMWARE_FPGA_UPG_RETRY_CNT          (100)
+
+/* FPGA upgrades related instruction definitions */
+#define FPGA_UPG_INSTRUTION_SE                (0xD8)
+#define FPGA_UPG_INSTRUTION_RDSR              (0x05)
+#define FPGA_UPG_INSTRUTION_WREN              (0x06)
+#define FPGA_UPG_INSTRUTION_PP                (0x02)
+#define FPGA_UPG_INSTRUTION_FR                (0x0B)
+#define FPGA_UPG_INSTRUTION_BE                (0xC7)
+#define FPGA_UPG_STATUS_MASK                  (0x1)
+#define FPGA_UPG_ACCESS_ENABLE                (0x3)
+#define FPGA_UPG_SPI_STATUS_MASK              (0x1)
+#define FFPGA_UPG_DATA_SIZE                   (256)
+
+#define FPGA_UPG_RETRY_TIMES                  (3)
+
+/* FPGA upgrades the offset of the associated register */
+#define FPGA_UPG_STATUS_REG                   (0x180)
+#define FPGA_UPG_SPI_CTRL_REG                 (0x184)
+#define FPGA_UPG_WR_FLASH_STATUS_REG          (0x188)
+#define FPGA_UPG_RD_FLASH_STATUS_REG          (0x18C)
+#define FPGA_UPG_INSTRUCTION_REG              (0x190)
+#define FPGA_UPG_ADDR_REG                     (0x194)
+#define FPGA_UPG_LENGTH_REG                   (0x198)
+#define FPGA_UPG_DEVICE_ID_REG                (0x19C)
+#define FPGA_UPG_DROP_REQ_NUM_REG             (0x1A8)
+
+typedef struct firmware_spi_logic_info_s {
+    char logic_dev_name[FIRMWARE_LOGIC_DEV_NAME_LEN]; /* Logical device name */
+    uint32_t flash_base;                                   /* Flash Upgrade Address */
+    uint32_t ctrl_base;                                    /* SPI upgrade control register base address */
+    uint32_t test_base;                                    /* Test flash address */
+    uint32_t test_size;                                    /* Test flash size */
+} firmware_spi_logic_info_t;
+
+typedef struct firmware_spi_logic_upg_s {
+    char dev_path[FIRMWARE_LOGIC_DEV_NAME_LEN];
+    uint32_t flash_base;      /* Flash Upgrade Address */
+    uint32_t ctrl_base;       /* SPI upgrade control register base address */
+    uint32_t status_reg;
+    uint32_t spi_ctrl_reg;
+    uint32_t wr_flash_status_reg;
+    uint32_t rd_flash_status_reg;
+    uint32_t instruction_reg;
+    uint32_t addr_reg;
+    uint32_t length_reg;
+    uint32_t device_id_reg;
+    uint32_t drop_reg_num_reg;
+    uint32_t test_base;          /* Test flash address */
+    uint32_t test_size;          /* Test flash size */
+}firmware_spi_logic_upg_t;
+
+typedef enum firmware_spi_flash_rv_s {
+    FW_SPI_FLASH_RV_OK      = 0,
+    FW_SPI_FLASH_STATUS_ERR,
+    FW_SPI_FLASH_BUSY,
+    FW_SPI_FLASH_SPI_BUSY,
+    FW_SPI_FLASH_WR_ENABLE_ERR,
+    FW_SPI_FLASH_ERASE_ADDR_ERR,
+    FW_SPI_FLASH_ERASE_SECTOR_ERR,
+    FW_SPI_FLASH_WR_ERR,
+    FW_SPI_FLASH_RD_ERR,
+    FW_SPI_FLASH_PARAM_ERR,
+    FW_SPI_FLASH_UPG_ERR,
+    FW_SPI_FLASH_WR_LENGTH_ERR,
+    FW_SPI_FLASH_WR_ADDR_ERR,
+    FW_SPI_FLASH_SET_ACCESS_ERR,
+    FW_SPI_FLASH_DATA_CMP_ERR,
+    FW_SPI_FLASH_GET_INFO_ERR,
+    FW_SPI_FLASH_NOT_SUPPORT_TEST,
+} firmware_spi_flash_rv_t;
+
+int fpga_test_spi_logic_flash(int argc, char *argv[]);
+
+#endif /* End of __FW_UPG_SPI_LOGIC_DEV_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/include/debug.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/include/debug.h
new file mode 100644
index 000000000000..17dd42c3ef77
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/include/debug.h
@@ -0,0 +1,34 @@
+/*
+ *
+ * debug.h
+ * firmware upgrade debug switch control
+ */
+
+#ifndef __FIRMWARE_UPGRADE_DEBUG_H__
+#define __FIRMWARE_UPGRADE_DEBUG_H__
+#include <string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+#define DEBUG_INFO_LEN  20
+#define DEBUG_FILE      "/tmp/.firmware_upgrade_debug"
+#define DEBUG_ON_ALL    "3"
+#define DEBUG_ON_INFO   "1"
+#define DEBUG_OFF_INFO  "0"
+
+enum debug_s {
+    DEBUG_OFF = 0,                  /* off debug  */
+    DEBUG_APP_ON,                   /* open app debug */
+    DEBUG_ALL_ON,                   /* open all debug */
+    DEBUG_IGNORE,                   /* ignore debug */
+};
+
+#define dbg_print(debug, fmt, arg...)  \
+    if (debug == DEBUG_APP_ON || debug == DEBUG_ALL_ON) \
+        { do{printf(fmt,##arg);} while(0); }
+
+/* firmware upgrade debug switch */
+extern int firmware_upgrade_debug(void);
+extern int is_debug_on;
+
+#endif /* End of __FIRMWARE_UPGRADE_DEBUG_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/include/firmware_app.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/include/firmware_app.h
new file mode 100644
index 000000000000..581b2e969ec9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/include/firmware_app.h
@@ -0,0 +1,172 @@
+#ifndef __FIRMWARE_APP_H__
+#define __FIRMWARE_APP_H__
+
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <sys/ioctl.h>
+#include <debug.h>
+#include <stdint.h>
+
+#define ERR_FW_CHECK_CPLD_UPGRADE       (-601)   /* File validation error */
+#define ERR_FW_CHECK_FPGA_UPGRADE       (-602)
+#define ERR_FW_MATCH_CPLD_UPGRADE       (-603)   /* No matching upgrade file found */
+#define ERR_FW_MATCH_FPGA_UPGRADE       (-604)
+#define ERR_FW_SAMEVER_CPLD_UPGRADE     (-605)   /* the same version */
+#define ERR_FW_SAMEVER_FPGA_UPGRADE     (-606)
+#define ERR_FW_DO_CPLD_UPGRADE          (-607)   /* upgrade fail */
+#define ERR_FW_DO_FPGA_UPGRADE          (-608)
+#define ERR_FW_UPGRADE                  (-609)   /* other fail */
+#define ERR_FW_CHECK_UPGRADE            (-610)   /* File validation error */
+#define ERR_FW_MATCH_UPGRADE            (-611)   /* No matching upgrade file found */
+#define ERR_FW_SAMEVER_UPGRADE          (-612)   /* the same version */
+#define ERR_FW_DO_UPGRADE               (-613)   /* upgrade fail */
+#define ERR_FW_DO_UPGRADE_NOT_SUPPORT   (-614)   /* upgrade fail */
+
+#define FIRMWARE_NOT_SUPPORT         (-2)
+#define FIRMWARE_FAILED              (-1)
+#define FIRMWARE_SUCCESS             (0)
+
+#define FIRMWARE_ACTION_CHECK        0
+#define FIRMWARE_ACTION_MATCH        1
+#define FIRMWARE_ACTION_VERCHECK     2
+#define FIRMWARE_ACTION_UPGRADE      3
+#define FIRMWARE_ACTION_SUPPORT      4
+
+#define FIRMWARE_UPGRADE_RETRY_CNT   (10)
+#define FIRMWARE_NAME_LEN            (48)
+#define FIRMWARE_SLOT_MAX_NUM        (16)           /* Maximum number of links supported by board cards */
+
+/* Upgrade file headers */
+#define MAX_DEV_NUM                     10           /* Maximum number of devices to which the upgrade file is applicable */
+#define INSMOD_DRIVER                   1            /* insmod driver */
+#define RMMOD_DRIVER                    0            /* rmmod driver */
+#define MAX_HEADER_SIZE                 1000         /* Upgrade the maximum length of file header information */
+#define MAX_HEADER_KV_SIZE              64           /* Upgrade the maximum length of the file header key value */
+
+/* Upgrade file header key values */
+#define FILEHEADER_DEVTYPE                "DEVTYPE"
+#define FILEHEADER_SUBTYPE                "SUBTYPE"
+#define FILEHEADER_TYPE                   "TYPE"
+#define FILEHEADER_CHAIN                  "CHAIN"
+#define FILEHEADER_CHIPNAME               "CHIPNAME"
+#define FILEHEADER_VERSION                "VERSION"
+#define FILEHEADER_FILETYPE               "FILETYPE"
+#define FILEHEADER_CRC                    "CRC"
+
+#define FIRMWARE_CPLD_NAME           "cpld"
+#define FIRMWARE_FPGA_NAME           "fpga"
+
+/* ioctl publi command, the same as driver */
+#define FIRMWARE_COMMON_TYPE 'C'
+#define FIRMWARE_GET_CHIPNAME            _IOR(FIRMWARE_COMMON_TYPE, 0, char)    /* get the chip name */
+#define FIRMWARE_GET_VERSION             _IOR(FIRMWARE_COMMON_TYPE, 2, int)     /* get version */
+#define FIRMWARE_SET_DEBUG_ON            _IOW(FIRMWARE_COMMON_TYPE, 3, int)     /* debug on */
+#define FIRMWARE_SET_DEBUG_OFF           _IOW(FIRMWARE_COMMON_TYPE, 4, int)     /* debug off */
+
+/* firmware cpld driver ioctl command, the same as "firmware_driver\firmware_driver\include\firmware.h" */
+#define FIRMWARE_TYPE 'J'
+#define FIRMWARE_PROGRAM                 _IOW(FIRMWARE_TYPE, 1, char)    /* firmware upgrade ISC */
+#define FIRMWARE_READ_CHIP               _IOR(FIRMWARE_TYPE, 5, int)     /* read the contents of the chip */
+#define FIRMWARE_PROGRAM_JBI             _IOW(FIRMWARE_TYPE, 6, char)    /* firmware upgrade JBI */
+
+/* firmware cpld ispvme driver ioctl command, the same as "firmware_driver\firmware_driver_ispvme\include\firmware_ispvme.h" */
+#define FIRMWARE_VME_TYPE 'V'
+#define FIRMWARE_JTAG_TDI                _IOR(FIRMWARE_VME_TYPE, 0, char)
+#define FIRMWARE_JTAG_TDO                _IOR(FIRMWARE_VME_TYPE, 1, char)
+#define FIRMWARE_JTAG_TCK                _IOR(FIRMWARE_VME_TYPE, 2, char)
+#define FIRMWARE_JTAG_TMS                _IOR(FIRMWARE_VME_TYPE, 3, char)
+#define FIRMWARE_JTAG_EN                 _IOR(FIRMWARE_VME_TYPE, 4, char)
+#define FIRMWARE_JTAG_INIT               _IOR(FIRMWARE_VME_TYPE, 7, char)   /* enable upgrade access */
+#define FIRMWARE_JTAG_FINISH             _IOR(FIRMWARE_VME_TYPE, 8, char)   /* disable upgrade access */
+
+/* firmware sysfs driver ioctl command, the same as "firmware_driver\firmware_driver_sysfs\include\firmware_sysfs.h" */
+#define FIRMWARE_SYSFS_TYPE 'S'
+#define FIRMWARE_SYSFS_INIT               _IOR(FIRMWARE_SYSFS_TYPE, 0, char)   /* enable upgrade access */
+#define FIRMWARE_SYSFS_FINISH             _IOR(FIRMWARE_SYSFS_TYPE, 1, char)   /* disable upgrade access */
+#define FIRMWARE_SYSFS_SPI_INFO           _IOR(FIRMWARE_SYSFS_TYPE, 2, char)   /* spi flash upgrade */
+#define FIRMWARE_SYSFS_DEV_FILE_INFO      _IOR(FIRMWARE_SYSFS_TYPE, 3, char)   /* sysfs upgrade */
+#define FIRMWARE_SYSFS_MTD_INFO           _IOR(FIRMWARE_SYSFS_TYPE, 4, char)   /* sysfs mtd upgrade */
+
+/* VME file, used to distinguish the JTAG signal that needs to operate */
+#define JTAG_TDO         1
+#define JTAG_TCK         2
+#define JTAG_TDI         3
+#define JTAG_TMS         4
+#define JTAG_ENABLE      5
+#define JTAG_TRST        6
+
+typedef struct name_info_s {
+    int card_type[MAX_DEV_NUM];                      /* main board type */
+    int sub_type[MAX_DEV_NUM];                       /* sub board type */
+    int type;                                        /* device type */
+    int chain;                                        /* chain num */
+    char chip_name[FIRMWARE_NAME_LEN];               /* chip name */
+    char version[FIRMWARE_NAME_LEN];                 /* version */
+    int file_type;                                   /* file type */
+    unsigned int crc32;                              /* 4 byte CRC values */
+} name_info_t;
+
+typedef struct cmd_info_s {
+    uint32_t size;
+    void *data;
+} cmd_info_t;
+
+enum firmware_type_s {
+    FIRMWARE_UNDEF_TYPE = 0,
+    FIRMWARE_CPLD,
+    FIRMWARE_FPGA,
+    FIRMWARE_SYSFS,
+    FIRMWARE_OTHER,
+};
+
+typedef enum firmware_file_type_s {
+    FIRMWARE_UNDEF_FILE_TYPE = 0,
+    FIRMWARE_VME,           /* ispvme cpld, GPIO simulates JTAG */
+    FIRMWARE_ISC,           /* cpld, GPIO simulates JTAG */
+    FIRMWARE_JBI,
+    FIRMWARE_SPI_LOGIC_DEV, /* FPGA SPI upgrde register upgrade flash */
+    FIRMWARE_SYSFS_DEV,     /* write file upgrade eeprom */
+    FIRMWARE_MTD,           /* upgrade mtd device */
+    FIRMWARE_NONE,
+} firmware_file_type_t;
+
+typedef struct firmware_file_name_s {
+    char firmware_file_name_str[MAX_HEADER_KV_SIZE];
+    int firmware_file_type;
+} firmware_file_name_t;
+
+extern int header_offset;
+
+/* CRC32 calculation */
+extern unsigned long crc32(unsigned long crc, const unsigned char *buf, unsigned int len);
+/* VME file upgrade */
+extern int firmware_upgrade_ispvme(int file_fd, char *upgrade_file_name, name_info_t *info);
+extern void writePort(unsigned char a_ucPins, unsigned char a_ucValue);
+extern unsigned char readPort();
+extern void sclock();
+extern void ispVMStateMachine(signed char NextState);
+
+/* spi flash upgrade */
+extern int firmware_upgrade_spi_logic_dev(int fd, uint8_t *buf, uint32_t size, name_info_t *info);
+/* spi flash upgrade test*/
+extern int firmware_upgrade_spi_logic_dev_test(int fd, name_info_t *info);
+/* spi flash data print*/
+extern int firmware_upgrade_spi_logic_dev_dump(char *dev_name, uint32_t offset, uint32_t size, char *record_file);
+
+/* sysfs upgrade */
+extern int firmware_upgrade_sysfs(int fd, uint8_t *buf, uint32_t size, name_info_t *info);
+/* sysfs upgrade test*/
+extern int firmware_upgrade_sysfs_test(int fd, name_info_t *info);
+
+/* isc upgrade */
+extern int firmware_upgrade_jtag(int fd, uint8_t *buf, uint32_t size, name_info_t *info);
+/* isc upgrade test */
+extern int firmware_upgrade_jtag_test(int fd, uint8_t *buf, uint32_t size, name_info_t *info);
+
+/* mtd upgrade */
+extern int firmware_upgrade_mtd(int fd, uint8_t *buf, uint32_t size, name_info_t *info);
+/* mtd upgrade test */
+extern int firmware_upgrade_mtd_test(int fd, name_info_t *info);
+
+#endif /* End of __FIRMWARE_APP_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/include/vmopcode.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/include/vmopcode.h
new file mode 100644
index 000000000000..ae9d713ff86c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/include/vmopcode.h
@@ -0,0 +1,192 @@
+/***************************************************************
+*
+* This is the include file for Lattice Semiconductor's ispVM
+* Embedded software application.
+*
+***************************************************************/
+
+/***************************************************************
+*
+* VME version.
+*
+* History:
+*
+***************************************************************/
+
+#define VME_VERSION_NUMBER "12.2"
+
+/***************************************************************
+*
+* Maximum declarations.
+*
+***************************************************************/
+
+#define VMEHEXMAX   60000L  /* The hex file is split 60K per file. */
+#define SCANMAX     64000L  /* The maximum SDR/SIR burst. */
+
+/***************************************************************
+*
+* Supported JTAG state transitions.
+*
+***************************************************************/
+
+#define RESET      0x00
+#define IDLE       0x01
+#define IRPAUSE    0x02
+#define DRPAUSE    0x03
+#define SHIFTIR    0x04
+#define SHIFTDR    0x05
+#define DRCAPTURE  0x06
+
+/***************************************************************
+*
+* Flow control register bit definitions.  A set bit indicates
+* that the register currently exhibits the corresponding mode.
+*
+***************************************************************/
+
+#define INTEL_PRGM 0x0001    /* Intelligent programming is in effect. */
+#define CASCADE    0x0002    /* Currently splitting large SDR. */
+#define REPEATLOOP 0x0008    /* Currently executing a repeat loop. */
+#define SHIFTRIGHT 0x0080    /* The next data stream needs a right shift. */
+#define SHIFTLEFT  0x0100    /* The next data stream needs a left shift. */
+#define VERIFYUES  0x0200    /* Continue if fail is in effect. */
+
+/***************************************************************
+*
+* DataType register bit definitions.  A set bit indicates
+* that the register currently holds the corresponding type of data.
+*
+***************************************************************/
+
+#define EXPRESS    0x0001    /* Simultaneous program and verify. */
+#define SIR_DATA   0x0002    /* SIR is the active SVF command. */
+#define SDR_DATA   0x0004    /* SDR is the active SVF command. */
+#define COMPRESS   0x0008    /* Data is compressed. */
+#define TDI_DATA   0x0010    /* TDI data is present. */
+#define TDO_DATA   0x0020    /* TDO data is present. */
+#define MASK_DATA  0x0040    /* MASK data is present. */
+#define HEAP_IN    0x0080    /* Data is from the heap. */
+#define LHEAP_IN   0x0200    /* Data is from intel data buffer. */
+#define VARIABLE   0x0400    /* Data is from a declared variable. */
+#define CRC_DATA   0x0800    /* CRC data is pressent. */
+#define CMASK_DATA 0x1000    /* CMASK data is pressent. */
+#define RMASK_DATA 0x2000    /* RMASK data is pressent. */
+#define READ_DATA  0x4000    /* READ data is pressent. */
+#define DMASK_DATA 0x8000    /* DMASK data is pressent. */
+
+/***************************************************************
+*
+* Pin opcodes.
+*
+***************************************************************/
+
+#define signalENABLE  0x1C    /* ispENABLE pin. */
+#define signalTMS     0x1D    /* TMS pin. */
+#define signalTCK     0x1E    /* TCK pin. */
+#define signalTDI     0x1F    /* TDI pin. */
+#define signalTRST    0x20    /* TRST pin. */
+
+/***************************************************************
+*
+* Supported vendors.
+*
+***************************************************************/
+
+#define VENDOR      0x56
+#define LATTICE     0x01
+#define ALTERA      0x02
+#define XILINX      0x03
+
+/***************************************************************
+*
+* Opcode definitions.
+*
+* Note: opcodes must be unique.
+*
+***************************************************************/
+
+#define ENDDATA    0x00    /* The end of the current SDR data stream. */
+#define RUNTEST    0x01    /* The duration to stay at the stable state. */
+#define ENDDR      0x02    /* The stable state after SDR. */
+#define ENDIR      0x03    /* The stable state after SIR. */
+#define ENDSTATE   0x04    /* The stable state after RUNTEST. */
+#define TRST       0x05    /* Assert the TRST pin. */
+#define HIR        0x06    /* The sum of the IR bits of the leading devices. */
+#define TIR        0x07    /* The sum of the IR bits of the trailing devices. */
+#define HDR        0x08    /* The number of leading devices. */
+#define TDR        0x09    /* The number of trailing devices. */
+#define ispEN      0x0A    /* Assert the ispEN pin. */
+#define FREQUENCY  0x0B    /* The maximum clock rate to run the JTAG state machine. */
+#define STATE      0x10    /* Move to the next stable state. */
+#define SIR        0x11    /* The instruction stream follows. */
+#define SDR        0x12    /* The data stream follows. */
+#define TDI        0x13    /* The following data stream feeds into the device. */
+#define TDO        0x14    /* The following data stream is compared against the device. */
+#define MASK       0x15    /* The following data stream is used as mask. */
+#define XSDR       0x16    /* The following data stream is for simultaneous program and verify. */
+#define XTDI       0x17    /* The following data stream is for shift in only. It must be stored for the next XSDR. */
+#define XTDO       0x18    /* There is not data stream.  The data stream was stored from the previous XTDI. */
+#define MEM        0x19    /* The maximum memory needed to allocate in order hold one row of data. */
+#define WAIT       0x1A    /* The duration of delay to observe. */
+#define TCK        0x1B    /* The number of TCK pulses. */
+#define SHR        0x23    /* Set the flow control register for right shift. */
+#define SHL        0x24    /* Set the flow control register for left shift. */
+#define HEAP       0x32    /* The memory size needed to hold one loop. */
+#define REPEAT     0x33    /* The beginning of the loop. */
+#define LEFTPAREN  0x35    /* The beginning of data following the loop. */
+#define VAR          0x55      /* Plac holder for loop data. */
+#define SEC        0x1C    /* The delay time in seconds that must be observed. */
+#define SMASK      0x1D    /* The mask for TDI data. */
+#define MAX        0x1E    /* The absolute maximum wait time. */
+#define ON         0x1F    /* Assert the targeted pin. */
+#define OFF        0x20    /* Dis-assert the targeted pin. */
+#define SETFLOW    0x30    /* Change the flow control register. */
+#define RESETFLOW  0x31    /* Clear the flow control register. */
+#define CRC          0x47    /* The following data stream is used for CRC calculation. */
+#define CMASK        0x48      /* The following data stream is used as mask for CRC calculation. */
+#define RMASK      0x49    /* The following data stream is used as mask for read and save. */
+#define READ         0x50    /* The following data stream is used for read and save. */
+#define ENDLOOP    0x59    /* The end of the repeat loop. */
+#define SECUREHEAP 0x60    /* Used to secure the HEAP opcode. */
+#define VUES       0x61    /* Support continue if fail. */
+#define DMASK      0x62    /* The following data stream is used for dynamic I/O. */
+#define COMMENT    0x63    /* Support SVF comments in the VME file. */
+#define HEADER     0x64    /* Support header in VME file. */
+#define FILE_CRC   0x65    /* Support crc-protected VME file. */
+#define LCOUNT     0x66    /* Support intelligent programming. */
+#define LDELAY     0x67    /* Support intelligent programming. */
+#define LSDR       0x68    /* Support intelligent programming. */
+#define LHEAP      0x69    /* Memory needed to hold intelligent data buffer */
+#define CONTINUE   0x70    /* Allow continuation. */
+#define LVDS         0x71      /* Support LVDS. */
+#define ENDVME     0x7F    /* End of the VME file. */
+#define HIGH       0x80    /* Assert the targeted pin. */
+#define LOW        0x81    /* Dis-assert the targeted pin. */
+#define ENDFILE    0xFF    /* End of file. */
+
+/***************************************************************
+*
+* ispVM Embedded Return Codes.
+*
+***************************************************************/
+
+#define VME_VERIFICATION_FAILURE        -1
+#define VME_FILE_READ_FAILURE             -2
+#define VME_VERSION_FAILURE               -3
+#define VME_INVALID_FILE                    -4
+#define VME_ARGUMENT_FAILURE              -5
+#define VME_CRC_FAILURE                     -6
+
+/***************************************************************
+*
+* Type definitions.
+*
+***************************************************************/
+
+/* Support LVDS */
+typedef struct {
+    unsigned short usPositiveIndex;
+    unsigned short usNegativeIndex;
+    unsigned char  ucUpdate;
+} LVDSPair;
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/Makefile
new file mode 100644
index 000000000000..1701b5f62114
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/Makefile
@@ -0,0 +1,18 @@
+top_srcdir:=$(shell pwd)
+include $(top_srcdir)/Rules.mk
+
+firmware-y:=
+firmware-y += fw_upgrade
+
+.PHONY: all
+all: build
+
+.PHONY: build
+build: $(firmware-y)
+$(foreach dir,$(firmware-y),$(eval $(call compile_dirs,$(dir))))
+
+.PHONY: rpmpkg
+rpmpkg:
+ifeq ("$(CONFIG_CPLD_UPGRADE_ISPVME)", "y")
+	#$(RPMPKG) $(install_cpld_dir) firmware-cpld-ispvme.spec git
+endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/Rules.mk b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/Rules.mk
new file mode 100644
index 000000000000..5fb5a09d34fd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/Rules.mk
@@ -0,0 +1,42 @@
+CC ?= $(CROSS)gcc
+AR ?= $(CROSS)ar
+AS ?= $(CROSS)as
+LD ?= $(CROSS)ld
+STRIP ?= $(CROSS)strip
+
+install_root:=${top_srcdir}/images
+
+install_header_dir:=${install_root}/header
+install_adir:=$(install_root)/lib
+install_symbol_dir:=$(install_root)/symbol
+symbol_files:=$(shell find $(EXPORT_SYMBOL) -name 'Module.symvers')
+#
+# symbol_files += $(shell find $(install_symbol_dir) -name 'Module.symvers')
+# KBUILD_EXTRA_SYMBOLS += $(symbol_files)
+# export KBUILD_EXTRA_SYMBOLS
+
+# top root: install_rootfs_dir
+install_rootfs_dir:=$(install_root)/rootfs
+
+install_sodir:=$(install_rootfs_dir)/$(INSTALL_SODIR)
+
+install_usr_bin_dir:=$(install_rootfs_dir)/usr/bin
+install_sbin_dir:=$(install_rootfs_dir)/sbin
+install_etc_dir:=$(install_rootfs_dir)/etc
+
+export INSTALL_MOD_PATH:=$(ROOT)
+
+BUILD_CFLAGS:=$(CFLAGS) -I$(install_header_dir)
+BUILD_LDFLAGS:=$(LDFLAGS) -L/$(install_sodir) -L/$(install_adir)
+
+define compile_dirs
+.PHONY: $(1)
+$(1):
+	@echo;echo "building $(1)..."
+	@$(MAKE) -C ${1}
+endef
+
+compile.c = $(CC) $(BUILD_CFLAGS) -d -c -o $@ $<
+%.o: %.c
+	$(compile.c)
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/Makefile
new file mode 100644
index 000000000000..8b4bca739087
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/Makefile
@@ -0,0 +1,39 @@
+include ../Rules.mk
+
+OBJ = fw_upgrade.o fw_upgrade_debug.o
+
+LIB += $(BUILD_CFALGS) $(BUILD_LDFLAGS) -lpthread
+ifdef ENABLE_GCOV
+ifeq ($(ENABLE_GCOV), y)
+LIB += -fprofile-arcs
+endif
+endif # ENABLE_GCOV
+
+APP = fw_upgrade
+BUILD_DIR = tmp
+ELF_FILE = $(BUILD_DIR)/$(APP)
+MAP_FILE = $(BUILD_DIR)/$(APP).map.sym
+INCLUDE = -Iinclude
+CFLAGS+=-Wall -W -g
+
+.PHONY: build
+build:make-dir $(addprefix $(BUILD_DIR)/,$(OBJ))
+	$(CC) -o $(ELF_FILE) $(addprefix $(BUILD_DIR)/,$(OBJ)) $(LINKFLAGS) $(LIB)
+
+	cp -p $(ELF_FILE) $(common_out_put_dir)
+
+.PHONY: make-dir
+make-dir:
+	@mkdir -p $(BUILD_DIR)
+
+$(BUILD_DIR)/%.o:%.c
+	$(CC) -c $(CFLAGS) $(INCLUDE) $< -o $@
+
+.PHONY: install
+install:
+	echo "fw_upgrade install success."
+	cp -p $(ELF_FILE) $(common_out_put_dir)
+
+.PHONY: clean
+clean:
+	rm -rf $(BUILD_DIR)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade.c b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade.c
new file mode 100644
index 000000000000..2045608d5c3b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade.c
@@ -0,0 +1,1632 @@
+#include <sys/io.h>
+#include <unistd.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <sys/ioctl.h>
+#include <stdint.h>
+#include <time.h>
+#include <fcntl.h>
+#include <sys/mman.h>
+#include <string.h>
+#include <errno.h>
+#include "fw_upgrade.h"
+
+static flash_info_t flash_info[] = {
+    {
+        .flash_name = "M25L6433F",
+        .flash_size = M32,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = MX25L6433F,
+        .block_size = STEP_64,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "S25FL512S",
+        .flash_size = M64,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = S25FL512S,
+        .block_size = STEP_256,
+        .full_erase = 0,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "MX25l512",
+        .flash_size = M64,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = MX25l512,
+        .block_size = STEP_64,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "STM25P64",
+        .flash_size = M12,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = STM25P64,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "STM25P128",
+        .flash_size = M16,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = STM25P128,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "N25Q256",
+        .flash_size = M16,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = N25Q256,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "N25Q512",
+        .flash_size = M16,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = N25Q512,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "W25X16",
+        .flash_size = M3,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = W25X16,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "W25X64",
+        .flash_size = M12,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = W25X64,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "W25Q64BV",
+        .flash_size = M12,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = W25Q64BV,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "W25Q128BV",
+        .flash_size = M16,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = W25Q128BV,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "W25Q256FV",
+        .flash_size = M16,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = W25Q256FV,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "MX25L1605D",
+        .flash_size = M32,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = MX25L1605D,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "MX25L12805D",
+        .flash_size = M32,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = MX25L12805D,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "MX66L1G45G",
+        .flash_size = M128,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = MX66L1G45G,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+    {
+        .flash_name = "GD25Q256",
+        .flash_size = M16,
+        .flash_type = SPI,
+        .page_size = BYTE_256,
+        .flash_id = GD25Q256,
+        .block_size = STEP_256,
+        .full_erase = 1,
+        .erase_block_command = BLOCK_ERASE_64,
+        .page_program = COMMON_PAGE_PROGRAM,
+    },
+};
+
+static int debug_on;
+
+static void help(void)
+{
+    printf("------------------------------BMC Upgrade Tool--------------------------------\n");
+    printf("Program Flash:\n");
+    printf("\tfw_upgrade upgrade [file name] [chip select: 0 | 1 | 2] ");
+    printf("[erase type: full | block]\n");
+    printf("\t[file name] if file is not located at /home/admin, path should be added\n");
+    printf("\t[chip select] 0:master, 1:slave, 2:both\n");
+    printf("\t[erase type] choose a way to erase chip, full erase would be faster\n");
+    printf("Read BMC Reg:\n");
+    printf("\tfw_upgrade rd [address] [length]\n");
+    printf("\t[address(Hexadecimal)] register address of BMC\n");
+    printf("\t[length(decimal)] length of read data, should be times of 4\n");
+
+    return;
+}
+
+static int set_ioport_rw_access(void)
+{
+
+    if ( iopl(3) < 0) {
+        printf("Can't get access to /dev/port \n");
+        return -1;
+    }
+
+    return 0;
+}
+
+static int get_file_size(char *file_name)
+{
+    FILE * pFile;
+    int size;
+
+    pFile = fopen(file_name,"rb");
+    if (pFile == NULL) {
+        printf("Error opening file\n");
+        return -1;
+    }
+    fseek (pFile, 0, SEEK_END);
+    size = ftell(pFile);
+    fclose (pFile);
+    return size;
+}
+
+static uint8_t _read(uint16_t addr)
+{
+    return inb(addr);
+}
+
+static void _write(uint16_t addr, uint8_t val)
+{
+    outb(val, addr);
+
+    return;
+}
+
+static void write_addr_port(uint8_t addr_val, uint16_t addr_port)
+{
+    _write(addr_port, addr_val);
+
+    return;
+}
+
+static void write_data_port(uint8_t val, uint16_t data_port)
+{
+    _write(data_port, val);
+
+    return;
+}
+
+static uint8_t read_data_port(uint16_t data_port)
+{
+    return _read(data_port);
+}
+
+static void write_ilpc2ahb_addr(uint32_t addr)
+{
+    int i;
+
+    for (i = 0; i < 4; i++) {
+        write_addr_port(SUPERIO_REG0 + i, LPC_ADDR_PORT);
+        write_data_port((addr >> (8 * (3 - i))) & MASK, LPC_DATA_PORT);
+    }
+
+    return;
+}
+
+static void write_ilpc2ahb_data(uint32_t data)
+{
+    int i;
+
+    for (i = 0; i < 4; i++) {
+        write_addr_port(SUPERIO_REG4 + i, LPC_ADDR_PORT);
+        write_data_port((data >> (8 * (3 - i))) & MASK, LPC_DATA_PORT);
+    }
+
+    return;
+}
+
+static uint32_t read_ilpc2ahb_data(void)
+{
+    int i, tmp;
+    uint32_t res;
+
+    res = 0;
+    for (i = 0; i < 4; i++) {
+        write_addr_port(SUPERIO_REG4 + i, LPC_ADDR_PORT);
+        tmp = read_data_port(LPC_DATA_PORT);
+        res |= (tmp << (8 * (3 - i)));
+    }
+
+    return res;
+}
+
+static void trigger_ilpc2ahb_read(void)
+{
+    write_addr_port(SUPERIO_FE, LPC_ADDR_PORT);
+    read_data_port(LPC_DATA_PORT);
+
+    return;
+}
+
+static void trigger_ilpc2ahb_write(void)
+{
+    write_addr_port(SUPERIO_FE, LPC_ADDR_PORT);
+    write_data_port(TOGGLE_WRITE, LPC_DATA_PORT);
+
+    return;
+}
+
+static uint32_t read_bmc_reg(uint32_t addr)
+{
+    uint32_t res;
+
+    write_ilpc2ahb_addr(addr);
+    trigger_ilpc2ahb_read();
+    res = read_ilpc2ahb_data();
+
+    return res;
+}
+
+static void write_bmc_reg(uint32_t addr, uint32_t val)
+{
+    write_ilpc2ahb_addr(addr);
+    write_ilpc2ahb_data(val);
+    trigger_ilpc2ahb_write();
+
+    return;
+}
+
+static uint32_t read_bmc_flash_data(void)
+{
+    uint32_t res;
+
+    trigger_ilpc2ahb_read();
+    res = read_ilpc2ahb_data();
+
+    return res;
+}
+
+static void write_bmc_flash_data(uint32_t data)
+{
+    write_ilpc2ahb_data(data);
+    trigger_ilpc2ahb_write();
+
+    return;
+}
+
+static void write_bmc_flash_addr(uint32_t addr)
+{
+    int i;
+
+    for (i = 0; i < 4; i++) {
+        write_addr_port(SUPERIO_REG4 + i, LPC_ADDR_PORT);
+        write_data_port((addr >> (8 * i)) & MASK, LPC_DATA_PORT);
+    }
+
+    trigger_ilpc2ahb_write();
+
+    return;
+}
+
+static void enable_bytes(int byte)
+{
+    write_addr_port(SUPERIO_REG8, LPC_ADDR_PORT);
+    switch (byte) {
+    case BYTE1:
+        write_data_port(SUPERIO_A0 + BYTE1_VAL, LPC_DATA_PORT);
+        break;
+    case BYTE2:
+        write_data_port(SUPERIO_A0 + BYTE2_VAL, LPC_DATA_PORT);
+        break;
+    case BYTE4:
+        write_data_port(SUPERIO_A0 + BYTE4_VAL, LPC_DATA_PORT);
+        break;
+    default:
+        write_data_port(SUPERIO_A0 + BYTE_RESERVED, LPC_DATA_PORT);
+        break;
+    }
+
+    return;
+}
+
+static void pull_ce_down(flash_info_t* info)
+{
+    write_bmc_reg(info->ce_control_reg, USER_MODE_PULL_CE_DOWN);
+
+    return;
+}
+
+static void pull_ce_up(flash_info_t* info)
+{
+    write_bmc_reg(info->ce_control_reg, USER_MODE_PULL_CE_UP);
+
+    return;
+}
+
+static void send_cmd(uint32_t flash_base_addr, int cmd)
+{
+    write_ilpc2ahb_addr(flash_base_addr);
+    enable_bytes(1);
+    write_addr_port(SUPERIO_REG7, LPC_ADDR_PORT);
+    write_data_port(cmd & MASK, LPC_DATA_PORT);
+    trigger_ilpc2ahb_write();
+    enable_bytes(4);
+
+    return;
+}
+
+static void send_cmd_to_flash(flash_info_t* info, int cmd)
+{
+    pull_ce_down(info);
+    send_cmd(info->flash_base_addr, cmd);
+    pull_ce_up(info);
+
+    return;
+}
+
+static void check_data_length(void)
+{
+    uint8_t tmp;
+    /* Data length check, 4 bytes */
+    write_addr_port(SUPERIO_REG8, LPC_ADDR_PORT);
+    tmp = read_data_port(LPC_DATA_PORT);
+    if (tmp != SUPERIO_A2) {
+        write_data_port(SUPERIO_A2, LPC_DATA_PORT);
+    }
+
+    return;
+}
+
+static void enable_ilpc2ahb(void)
+{
+    /* Write 0xAA then write 0xA5 twice to enable super IO*/
+    write_addr_port(DISABLE_LPC, LPC_ADDR_PORT);
+    write_addr_port(ENABLE_LPC, LPC_ADDR_PORT);
+    write_addr_port(ENABLE_LPC, LPC_ADDR_PORT);
+
+    /* Enable iLPC2AHB */
+    write_addr_port(SUPERIO_07, LPC_ADDR_PORT);
+    write_data_port(LPC_TO_AHB, LPC_DATA_PORT);
+    write_addr_port(SUPERIO_30, LPC_ADDR_PORT);
+    write_data_port(ENABLE_LPC_TO_AHB, LPC_DATA_PORT);
+
+    /* Data length */
+    check_data_length();
+
+    return;
+}
+
+static void disable_ilpc2ahb(void)
+{
+    /* disable ilpc2ahb */
+    write_addr_port(SUPERIO_30, LPC_ADDR_PORT);
+    write_data_port(DISABLE_LPC_TO_AHB, LPC_DATA_PORT);
+    /* disable super IO */
+    write_addr_port(DISABLE_LPC, LPC_ADDR_PORT);
+
+    return;
+}
+
+/* Enable CPU */
+static void enable_cpu(void)
+{
+    /* unlock SCU register */
+    write_bmc_reg(SCU_ADDR, UNLOCK_SCU_KEY);
+    /* enable ARM */
+    write_bmc_reg(REBOOT_CPU_REGISTER, SET_BMC_CPU_BOOT);
+    /* lock SCU register */
+    write_bmc_reg(SCU_ADDR, LOCK_SCU_KEY);
+
+    return;
+}
+
+/* diasble CPU */
+static void disable_cpu(void)
+{
+    uint32_t scu_hw_strap_val;
+
+    /* unlock SCU register */
+    write_bmc_reg(SCU_ADDR, UNLOCK_SCU_KEY);
+    /* disable ARM */
+    scu_hw_strap_val = read_bmc_reg(HARDWARE_STRAP_REGISTER);
+    write_bmc_reg(HARDWARE_STRAP_REGISTER, scu_hw_strap_val |0x01);
+    /* lock SCU register */
+    write_bmc_reg(SCU_ADDR, LOCK_SCU_KEY);
+
+    return;
+}
+
+static void enable_upgrade(void)
+{
+
+    enable_ilpc2ahb();
+    /* diasble CPU */
+    disable_cpu();
+    /* init CE control register */
+    write_bmc_reg(CE0_CONTROL_REGISTER, 0);
+    write_bmc_reg(CE1_CONTROL_REGISTER, 0);
+    /* disable WDT2 */
+    write_bmc_reg(WATCHDOG2_CONTROL, DISABLE_WATCHDOG);
+
+    return;
+}
+
+static void disable_upgrade(void)
+{
+    enable_cpu();
+    dbg_print(debug_on, "DEBUG 0x%x\n", read_bmc_reg(HARDWARE_STRAP_REGISTER));
+    disable_ilpc2ahb();
+
+    return;
+}
+
+static void watchdog_status_debug(void)
+{
+    uint32_t watchdog_reg;
+
+    /* Watchdog Control Register */
+    watchdog_reg = read_bmc_reg(WATCHDOG2_CONTROL);
+    dbg_print(debug_on,"Watchdog Control Register: 0x%x\n", watchdog_reg);
+    dbg_print(debug_on,"Watchdog Enable Signal: 0x%x\n", watchdog_reg & BIT1);
+    dbg_print(debug_on,"Watchdog Reset SyS En: 0x%x\n", (watchdog_reg & BIT2) >> 1);
+    dbg_print(debug_on,"Watchdog Reset Mode: 0x%x\n", (watchdog_reg & (BIT6 | BIT7)) >> 5);
+    switch (watchdog_reg & (BIT6 | BIT7)) {
+    case SOC_SYS:
+        dbg_print(debug_on,"\tReset Mode En: SoC System\n");
+        break;
+    case FULL_CHIP:
+        dbg_print(debug_on,"\tReset Mode En: Full Chip\n");
+        break;
+    case ARM_CPU:
+        dbg_print(debug_on,"\tReset Mode En: ARM Cpu\n");
+        break;
+    default:
+        break;
+    }
+
+    /* Watchdog Timeout Status Register */
+    watchdog_reg = read_bmc_reg(WATCHDOG2_TSR);
+    dbg_print(debug_on,"Watchdog Timeout Occur: 0x%x\n", watchdog_reg & BIT1);
+    dbg_print(debug_on,"Watchdog Boot from: CD%d\n", watchdog_reg & BIT2);
+    dbg_print(debug_on,"Watchdog Interrupt Occur: 0x%x\n", watchdog_reg & BIT3);
+
+    return;
+}
+
+/* CE Type Setting Register */
+static void ce_type_setting_debug(void)
+{
+    uint32_t fmc_reg;
+
+    fmc_reg = read_bmc_reg(FMC_CE_TYPE_SETTING_REG);
+    if ((fmc_reg & CE0_SPI_TYPE) == SPI) {
+        dbg_print(debug_on,"CE0 Type Seeting: 0x%x, Type: SPI\n", fmc_reg & CE0_SPI_TYPE);
+    } else {
+        dbg_print(debug_on,"CE0 Type Seeting: 0x%x, Type: Unknown\n", fmc_reg & CE0_SPI_TYPE);
+    }
+    if (((fmc_reg & CE1_SPI_TYPE) >> BIT2) == SPI) {
+        dbg_print(debug_on,"CE1 Type Seeting: 0x%x, Type: SPI\n", (fmc_reg & CE1_SPI_TYPE) >> BIT2);
+    } else {
+        dbg_print(debug_on,"CE1 Type Seeting: 0x%x, Type: Unknown\n", (fmc_reg & CE1_SPI_TYPE) >> BIT2);
+    }
+
+    return;
+}
+/* CE Control Register */
+static void ce_control_debug(void)
+{
+    uint32_t fmc_reg;
+
+    fmc_reg = read_bmc_reg(CE_CONTROL_REGISTER);
+    dbg_print(debug_on,"CE0 Address Mode: 0x%x, Mode: %d Bytes\n",
+        fmc_reg & BIT1, (fmc_reg & BIT1) + 3);
+    dbg_print(debug_on,"CE1 Address Mode: 0x%x, Mode: %d Bytes\n",
+        (fmc_reg & BIT2) >> 1, ((fmc_reg & BIT2) >> 1)  + 3);
+
+    return;
+}
+
+/* Interrupt Control & Status Register */
+static void irq_control_status_debug(void)
+{
+    uint32_t fmc_reg;
+
+    fmc_reg = read_bmc_reg(INR_STATUS_CONTROL_REGISTER);
+    dbg_print(debug_on,"SPI Write Address Protected Interrupt EN: 0x%x\n", fmc_reg & BIT2);
+    dbg_print(debug_on,"SPI Command Abort Interrupt EN: 0x%x\n", fmc_reg & BIT3);
+    dbg_print(debug_on,"SPI Write Address Protected Status: 0x%x, Status: %s\n",
+        RIGHT_SHIFT_8(fmc_reg) & BIT2, (RIGHT_SHIFT_8(fmc_reg) & BIT2) == BIT2 ? "Occur" : "Normal");
+    dbg_print(debug_on,"SPI Command Abort Status: 0x%x, Status: %s\n",
+        RIGHT_SHIFT_8(fmc_reg) & BIT3, (RIGHT_SHIFT_8(fmc_reg) & BIT3) == BIT3 ? "Occur" : "Normal");
+    /*Clear Abnormal Status*/
+    if ((RIGHT_SHIFT_8(fmc_reg) & BIT3) || (RIGHT_SHIFT_8(fmc_reg) & BIT2)) {
+        write_bmc_reg(INR_STATUS_CONTROL_REGISTER, CLEAR_INR_STATUS_CONTROL);
+    }
+
+    return;
+}
+
+/* Command Control Register */
+static void command_control_debug(void)
+{
+    uint32_t fmc_reg;
+
+    fmc_reg = read_bmc_reg(COMMAND_CONTROL_REGISTER);
+    dbg_print(debug_on,"Data Byte Line 0: %s\n", ((fmc_reg & BIT4) != 0) ? "Disable" : "Enable");
+    dbg_print(debug_on,"Data Byte Line 1: %s\n", ((fmc_reg & BIT3) != 0) ? "Disable" : "Enable");
+    dbg_print(debug_on,"Data Byte Line 2: %s\n", ((fmc_reg & BIT2) != 0) ? "Disable" : "Enable");
+    dbg_print(debug_on,"Data Byte Line 3: %s\n", ((fmc_reg & BIT1) != 0) ? "Disable" : "Enable");
+
+    dbg_print(debug_on,"Address Byte Line 0: %s\n", ((fmc_reg & BIT8) != 0) ? "Disable" : "Enable");
+    dbg_print(debug_on,"Address Byte Line 1: %s\n", ((fmc_reg & BIT7) != 0) ? "Disable" : "Enable");
+    dbg_print(debug_on,"Address Byte Line 2: %s\n", ((fmc_reg & BIT6) != 0) ? "Disable" : "Enable");
+    dbg_print(debug_on,"Address Byte Line 3: %s\n", ((fmc_reg & BIT5) != 0) ? "Disable" : "Enable");
+
+    return;
+}
+
+static void ce_control_reg_debug(void)
+{
+    uint32_t fmc_reg;
+
+    /* CE0 Control Register */
+    fmc_reg = read_bmc_reg(CE0_CONTROL_REGISTER);
+    switch (fmc_reg & (BIT1 | BIT2)){
+    case NORMAL_READ:
+        dbg_print(debug_on,"CE0 Command Mode: Normal Read\n");
+        break;
+    case READ_MODE:
+        dbg_print(debug_on,"CE0 Command Mode: Read Command\n");
+        break;
+    case WRITE_MODE:
+        dbg_print(debug_on,"CE0 Command Mode: Write Command\n");
+        break;
+    case USER_MODE:
+        dbg_print(debug_on,"CE0 Command Mode: User Mode\n");
+        break;
+    default:
+        break;
+    }
+    switch((RIGHT_SHIFT_24(fmc_reg) & (BIT5 | BIT6 | BIT7))){
+    case 0:
+        dbg_print(debug_on,"CE0 IO Mode: Single Mode\n");
+        break;
+    case 2:
+    case 3:
+        dbg_print(debug_on,"CE0 IO Mode: Dual Mode\n");
+        break;
+    default:
+        break;
+    }
+
+    dbg_print(debug_on,"CE0 Inactive Pulse Width: %d HCLK\n",
+        DEFAULT_WIDTH - (RIGHT_SHIFT_24(fmc_reg) & (BIT1 | BIT2 | BIT3 | BIT4)));
+    dbg_print(debug_on,"CE0 Data Input Mode: %s Mode\n", (fmc_reg & BIT4) == 0 ? "Single" : "Dual");
+    dbg_print(debug_on,"CE0 MSB | LSB: %s First\n", (fmc_reg & BIT6) == 0 ? "MSB" : "LSB");
+
+    /* CE1 Control Register */
+    fmc_reg = read_bmc_reg(CE1_CONTROL_REGISTER);
+    switch (fmc_reg & (BIT1 | BIT2)){
+    case NORMAL_READ:
+        dbg_print(debug_on,"CE1 Command Mode: Normal Read\n");
+        break;
+    case READ_MODE:
+        dbg_print(debug_on,"CE1 Command Mode: Read Command\n");
+        break;
+    case WRITE_MODE:
+        dbg_print(debug_on,"CE1 Command Mode: Write Command\n");
+        break;
+    case USER_MODE:
+        dbg_print(debug_on,"CE1 Command Mode: User Mode\n");
+        break;
+    default:
+        break;
+    }
+    switch((RIGHT_SHIFT_24(fmc_reg) & (BIT5 | BIT6 | BIT7))){
+    case 0:
+        dbg_print(debug_on,"CE1 IO Mode: Single Mode\n");
+        break;
+    case 2:
+    case 3:
+        dbg_print(debug_on,"CE1 IO Mode: Dual Mode\n");
+        break;
+    default:
+        break;
+    }
+
+    dbg_print(debug_on,"CE1 Inactive Pulse Width: %d HCLK\n",
+        DEFAULT_WIDTH - (RIGHT_SHIFT_24(fmc_reg) & (BIT1 | BIT2 | BIT3 | BIT4)));
+    dbg_print(debug_on,"CE1 Data Input Mode: %s Mode\n", (fmc_reg & BIT4) == 0 ? "Single" : "Dual");
+    dbg_print(debug_on,"CE1 MSB | LSB: %s First\n", (fmc_reg & BIT6) == 0 ? "MSB" : "LSB");
+
+    return;
+}
+
+static void fmc_debug(void)
+{
+    ce_type_setting_debug();
+    ce_control_debug();
+    irq_control_status_debug();
+    command_control_debug();
+    ce_control_reg_debug();
+
+    return;
+}
+
+/* Enable WatchDog to reset BMC*/
+static void enable_watchdog(int cs)
+{
+    uint32_t enable_watch_cmd;
+
+    enable_watch_cmd = (cs == CE0) ? ENABLE_WATCHDOG : ENABLE_WATCHDOG | BOOT_DEFAULT_MASK;
+    write_bmc_reg(WATCHDOG2_CLEAR_STATUS, CLEAR_WATCHDOG_STATUS);
+    write_bmc_reg(WATCHDOG2_RESET_FUN_MASK, WATCHDOG_GATEMASK);
+    write_bmc_reg(WATCHDOG2_RELOAD_VALUE, WATCHDOG_NEW_COUNT);
+    write_bmc_reg(WATCHDOG2_COUNTER_RST, WATCHDOG_RELOAD_COUNTER);
+    write_bmc_reg(WATCHDOG2_CONTROL, enable_watch_cmd);
+
+    return;
+}
+
+static void bmc_reboot(int cs)
+{
+    enable_watchdog(cs);
+    watchdog_status_debug();
+    disable_upgrade();
+    printf("Upgrade-Complete, BMC rebooting...\n");
+
+    return;
+}
+
+static int get_current_bmc(void)
+{
+    return (read_bmc_reg(WATCHDOG2_TSR) & 0x02) >> 1;
+}
+
+static void get_flash_base_and_ce_ctrl(int current_bmc, int cs, uint32_t *flash_base_addr, uint32_t *ce_ctrl_addr)
+{
+    uint32_t ce0_addr_range_reg_val, ce0_decode_addr;
+    uint32_t ce1_addr_range_reg_val, ce1_decode_addr;
+
+    ce0_addr_range_reg_val = read_bmc_reg(CE0_ADDRESS_RANGE_REGISTER);
+    ce0_decode_addr = SEGMENT_ADDR_START(ce0_addr_range_reg_val);
+    ce1_addr_range_reg_val = read_bmc_reg(CE1_ADDRESS_RANGE_REGISTER);
+    ce1_decode_addr = SEGMENT_ADDR_START(ce1_addr_range_reg_val);
+    dbg_print(debug_on,"CE0 addr decode range reg value:0x%08x, decode addr:0x%08x.\n",
+        ce0_addr_range_reg_val, ce0_decode_addr);
+    dbg_print(debug_on,"CE1 addr decode range reg value:0x%08x, decode addr:0x%08x.\n",
+        ce1_addr_range_reg_val, ce1_decode_addr);
+
+    if (((current_bmc == CURRENT_MASTER) && (cs ==CE0)) || ((current_bmc == CURRENT_SLAVE) && (cs ==CE1))) {
+        *ce_ctrl_addr = CE0_CONTROL_REGISTER;
+        *flash_base_addr = ce0_decode_addr;
+    } else {
+        *ce_ctrl_addr = CE1_CONTROL_REGISTER;
+        *flash_base_addr = ce1_decode_addr;
+    }
+
+    return;
+}
+
+static int get_flash_id(uint32_t flash_base_addr, uint32_t ce_ctrl_addr)
+{
+    uint32_t origin_flash_id, flash_id;
+
+    write_bmc_reg(ce_ctrl_addr, USER_MODE_PULL_CE_DOWN);
+    send_cmd(flash_base_addr, READID);
+    origin_flash_id = read_bmc_flash_data();
+    write_bmc_reg(ce_ctrl_addr, USER_MODE_PULL_CE_UP);
+    flash_id = origin_flash_id & 0xFFFFFF;
+    dbg_print(debug_on,"origin flash id:0x%x, flash id:0x%x\n", origin_flash_id, flash_id);
+
+    return flash_id;
+}
+
+static uint8_t get_flash_status(flash_info_t* info)
+{
+    uint8_t flash_status;
+
+    pull_ce_down(info);
+
+    send_cmd(info->flash_base_addr, READ_FLASH_STATUS);
+
+    flash_status = read_bmc_flash_data() & MASK;
+    pull_ce_up(info);
+
+    dbg_print(debug_on,"get_flash_status:0x%x\n", flash_status);
+    return flash_status;
+}
+
+static int check_flash_write_enable(flash_info_t* info)
+{
+    uint8_t flash_status;
+    int i, count;
+
+    count = FLASH_WEL_TIMEOUT / FLASH_WEL_SLEEP_TIME;
+    for (i = 0; i <= count; i++) {
+        flash_status = get_flash_status(info);
+        if ((flash_status & FLASH_WRITE_ENABLE_MASK) != FLASH_WRITE_ENABLE_MASK) {
+            usleep(FLASH_WEL_SLEEP_TIME);
+        } else {
+            dbg_print(debug_on,"Check flash WEL success, RDSR:0x%x\n", flash_status);
+            return 0;
+        }
+    }
+    printf("Check flash WEL timeout, RDSR:0x%x\n", flash_status);
+    return -1;
+}
+
+static int check_flash_write_process(flash_info_t* info, int timeout, int sleep_time)
+{
+    int i, count;
+    uint8_t flash_status;
+
+    count = timeout / sleep_time;
+    for (i = 0; i <= count; i++) {
+        flash_status = get_flash_status(info);
+        if ((flash_status & FLASH_WIP_MASK) != 0) {
+            usleep(sleep_time);
+        } else {
+            dbg_print(debug_on,"Check flash WIP success, RDSR:0x%x\n", flash_status);
+            return 0;
+        }
+    }
+    printf("Check flash WIP timeout, RDSR:0x%x.\n", flash_status);
+    return -1;
+}
+
+static int flash_write_enable(flash_info_t* info)
+{
+    int ret;
+
+    send_cmd_to_flash(info, WRITE_ENABLE_FLASH);
+    ret = check_flash_write_enable(info);
+    if (ret < 0) {
+        return -1;
+    }
+    return 0;
+}
+
+static void send_block_erase_cmd(flash_info_t* info, uint32_t block_addr)
+{
+    pull_ce_down(info);
+    send_cmd(info->flash_base_addr, info->erase_block_command);
+    write_bmc_flash_addr(block_addr); /* Erase Block addr */
+    pull_ce_up(info);
+
+    return;
+}
+
+static void send_chip_erase_cmd(flash_info_t* info)
+{
+    send_cmd_to_flash(info, CHIP_ERASE_FLASH);
+
+    return;
+}
+
+static int write_bmc_flash_page(flash_info_t* info, uint32_t page_addr, uint8_t *p, int len)
+{
+    int pos;
+
+    if (len % 4) {
+        printf("Page size %d invalid.\n", len);
+        return -1;
+    }
+
+    pos = 0;
+    pull_ce_down(info);
+    send_cmd(info->flash_base_addr, info->page_program);
+    write_bmc_flash_addr(page_addr); /* page address */
+    while (len) {
+        write_bmc_flash_data((*(uint32_t *)(p + pos)));
+        pos += 4;
+        len -= 4;
+    }
+    pull_ce_up(info);
+
+    return 0;
+}
+
+static int erase_chip_full(flash_info_t* info)
+{
+    time_t timep;
+    int ret;
+
+    if (info->full_erase == 0) {
+        printf("Flash not support full erase function.\n");
+        return -1;
+    }
+
+    ret = flash_write_enable(info);
+    if(ret < 0) {
+        printf("Chip erase, enable flash write error.\n");
+        return -1;
+    }
+
+    time(&timep);
+    printf("Full chip erasing, please wait...\n");
+    dbg_print(debug_on,"Erase Start-%s\n",asctime(gmtime(&timep)));
+    send_chip_erase_cmd(info);
+    ret = check_flash_write_process(info, CHIP_ERASE_TIMEOUT, CHIP_ERASE_SLEEP_TIME);
+    if (ret < 0) {
+        printf("Chip erase timeout.\n");
+        return -1;
+    }
+    time(&timep);
+    dbg_print(debug_on,"Erase Finish-%s\n",asctime(gmtime(&timep)));
+    printf("Erase Finish\n");
+    printf("=========================================\n");
+    return 0;
+}
+
+static int erase_chip_block(flash_info_t* info)
+{
+    uint32_t block_addr, end_addr;
+    time_t timep;
+    int ret;
+
+    printf("Block erasing...\n");
+    time (&timep);
+    dbg_print(debug_on,"Erase-Start-%s\n", asctime(gmtime(&timep)));
+    end_addr = info->flash_base_addr + info->flash_size;
+    block_addr = info->flash_base_addr;
+    while (1) {
+        /* Enable write */
+        ret = flash_write_enable(info);
+        if(ret < 0) {
+            printf("Block erase, enable flash write error, block addr:0x%x\n", block_addr);
+            return -1;
+        }
+
+        send_block_erase_cmd(info, block_addr);
+        /* Erase Block(64KB) MAX time 650ms*/
+        ret = check_flash_write_process(info, BLOCK_ERASE_TIMEOUT, BLOCK_ERASE_SLEEP_TIME);
+        if (ret < 0) {
+            printf("Block erase, check write status error, block addr:0x%x\n", block_addr);
+            return -1;
+        }
+        printf("\r0x%x", block_addr);
+        fflush(stdout);
+        if (block_addr >= end_addr) {
+            time(&timep);
+            printf("\r\nErase Finish\n");
+            printf("=========================================\n");
+            dbg_print(debug_on,"\nEnd-Earse-%s\n",asctime(gmtime(&timep)));
+            break;
+        }
+        block_addr += info->block_size;
+    }
+    return 0;
+}
+
+static int program_chip(uint32_t file_size, uint8_t *p, flash_info_t* info)
+{
+    time_t timep;
+    uint32_t page_addr, end_addr;
+    int ret, page_size;
+
+    page_addr = info->flash_base_addr;
+    page_size = info->page_size;
+    end_addr = file_size + info->flash_base_addr;
+    time (&timep);
+    printf("Programming...\n");
+    dbg_print(debug_on,"Program Start-%s\n",asctime(gmtime(&timep)));
+    /* Debug info */
+    fmc_debug();
+    while (1) {
+        /* Write enable */
+        ret = flash_write_enable(info);
+        if(ret < 0) {
+            printf("Page program, enable flash write error, page addr:0x%x\n", page_addr);
+            return -1;
+        }
+        ret = write_bmc_flash_page(info, page_addr, p, page_size);
+        if (ret < 0) {
+             printf("Page program, write bmc flash page error, page addr:0x%x\n", page_addr);
+             return -1;
+         }
+        /* page program MAX time 1.5ms */
+        ret = check_flash_write_process(info, PAGE_PROGRAM_TIMEOUT, PAGE_PROGRAM_SLEEP_TIME);
+        if (ret < 0) {
+            printf("Page program, check write status error, page addr:0x%x\n", page_addr);
+            return -1;
+        }
+        page_addr += page_size;
+        p += page_size;
+        if ((page_addr % 0x10000) == 0) {
+            printf("\r0x%x", page_addr);
+            fflush(stdout);
+        }
+
+        if (page_addr >= end_addr) {
+            printf("\nProgram Finish\n");
+            printf("=========================================\n");
+            time(&timep);
+            dbg_print(debug_on,"\nProgram-End-%s\n",asctime(gmtime(&timep)));
+            break;
+        }
+    } /* End of while (1) */
+    return 0;
+}
+
+static int check_chip(uint32_t file_size, uint8_t *p, flash_info_t* info)
+{
+    time_t timep;
+    uint32_t offset_addr, rd_val, end_addr;
+    int pos;
+
+    offset_addr = info->flash_base_addr;
+    end_addr = file_size + info->flash_base_addr;
+    pos=0;
+    /* Checking */
+    time(&timep);
+    printf("Checking...\n");
+    dbg_print(debug_on,"Checking-Start-%s\n",asctime(gmtime(&timep)));
+
+    pull_ce_down(info);
+    send_cmd(info->flash_base_addr, COMMON_FLASH_READ);
+    write_bmc_flash_addr(info->flash_base_addr);
+    while (1) {
+        if (offset_addr >= end_addr) {
+            break;
+        }
+        rd_val = read_bmc_flash_data();
+        if (rd_val != (*(uint32_t *)(p + pos))) {
+            printf("Check Error at 0x%08x\n", offset_addr);
+            printf("READ:0x%08x VALUE:0x%08x\n", rd_val, (*(uint32_t *)(p + pos)));
+            pull_ce_up(info);
+            return -1;
+        }
+        if ((offset_addr % 0x10000) == 0) {
+            printf("\r0x%x ", offset_addr);
+            fflush(stdout);
+        }
+        offset_addr += 4;
+        pos += 4;
+    }
+    pull_ce_up(info);
+    printf("\r\nFlash Checked\n");
+    printf("=========================================\n");
+    time(&timep);
+    dbg_print(debug_on,"Checking-End-%s\n",asctime(gmtime(&timep)));
+    return 0;
+}
+
+flash_info_t* get_flash_info(int current_bmc, int cs)
+{
+    int i, size;
+    uint32_t flash_base_addr, ce_ctrl_addr, flash_id;
+
+    get_flash_base_and_ce_ctrl(current_bmc, cs, &flash_base_addr, &ce_ctrl_addr);
+
+    size = (sizeof(flash_info) / sizeof((flash_info)[0]));
+
+    flash_id = get_flash_id(flash_base_addr, ce_ctrl_addr);
+    for (i = 0; i < size; i++) {
+        if (flash_info[i].flash_id == flash_id) {
+            flash_info[i].flash_base_addr = flash_base_addr;
+            flash_info[i].ce_control_reg = ce_ctrl_addr;
+            flash_info[i].cs = cs;
+            return &flash_info[i];
+        }
+    }
+    printf("Cannot get flash info, cs:%d, flash base addr:0x%x, ce control addr:0x%x, flash_id:0x%x.\n",
+        cs, flash_base_addr, ce_ctrl_addr, flash_id);
+    return NULL;
+}
+
+static void init_flash(flash_info_t* info)
+{
+    send_cmd_to_flash(info, RSTEN);
+    send_cmd_to_flash(info, RST);
+    send_cmd_to_flash(info, EXIT_OTP);
+    send_cmd_to_flash(info, ENABLE_BYTE4);
+
+    return;
+}
+
+static int upgrade_bmc_core(char *file_name, int erase_type, flash_info_t* info)
+{
+    int file_size, fp, ret;
+    uint8_t *p;
+
+    file_size = get_file_size(file_name);
+    if (file_size < 0) {
+        printf("file size %d Error\n", file_size);
+        return -1;
+    }
+
+    fp = open(file_name, O_RDWR);
+    if (fp < 0) {
+        printf("Cannot open %s.\n", file_name);
+        return -1;
+    }
+
+    p = mmap(NULL, file_size, PROT_READ, MAP_SHARED, fp, 0);
+    if (p == MAP_FAILED) {
+        printf("Could not mmap %s, error(%s).\n", file_name, strerror(errno));
+        close(fp);
+        return -1;
+    }
+
+    printf("* CE%d FLASH TYPE: SPI FLASH\n", info->cs);
+    printf("* FLASH NAME: %s\n", info->flash_name);
+    printf("* File Size:%d, 0x%x\n", file_size, file_size);
+    printf("=========================================\n");
+
+    /* Select erase type */
+    switch (erase_type) {
+    case FULL_ERASE:
+        ret = erase_chip_full(info);
+        break;
+    case BLOCK_ERASE:
+        ret = erase_chip_block(info);
+        break;
+    default:
+        printf("Unsupport earse type:%d\n", erase_type);
+        goto exit;
+        break;
+    }
+
+    if (ret < 0) {
+        printf("Erase Chip Error\n");
+        goto exit;
+    }
+
+    /* Program the flash */
+    ret = program_chip(file_size, p, info);
+    if(ret < 0) {
+        printf("Program Chip Error\n");
+        goto exit;
+    }
+    /* Check */
+    ret = check_chip(file_size, p, info);
+    if(ret < 0) {
+        printf("Check Chip Error\n");
+        goto exit;
+    }
+
+    munmap(p, file_size);
+    close(fp);
+    return 0;
+exit:
+    munmap(p, file_size);
+    close(fp);
+    return -1;
+}
+
+static int upgrade_bmc_flash(char *filename, int current_bmc, int cs, int erase_type)
+{
+    int ret;
+    flash_info_t* info;
+
+    info = get_flash_info(current_bmc, cs);
+    if(info == NULL) {
+        return -1;
+    }
+
+    init_flash(info);
+
+    ret = upgrade_bmc_core(filename, erase_type, info);
+
+    return ret;
+}
+
+static int upgrade_both_flash(char *filename, int erase_type)
+{
+    int ret, current_bmc;
+
+    enable_upgrade();
+
+    current_bmc = get_current_bmc();
+    if (current_bmc == CURRENT_MASTER) {
+        printf("* Current Bmc Default Boot: CE0\n");
+    } else {
+        printf("* Current Bmc Default Boot: CE1\n");
+    }
+
+    ret = upgrade_bmc_flash(filename, current_bmc, CE0, erase_type);
+    if (ret < 0) {
+        printf("Upgrade master bmc flash failed, stop upgrade.\n");
+        goto err;
+    }
+    printf("Upgrade master bmc flash success.\n");
+
+    ret = upgrade_bmc_flash(filename, current_bmc, CE1, erase_type);
+    if (ret < 0) {
+        printf("Upgrade slave bmc flash failed.\n");
+        goto err;
+    }
+    printf("Upgrade slave bmc flash success.\n");
+
+    bmc_reboot(CE0);
+    return 0;
+err:
+    disable_upgrade();
+    return -1;
+}
+
+static int upgrade_single_flash(char *filename, int cs, int erase_type)
+{
+    int ret, current_bmc;
+
+    enable_upgrade();
+
+    current_bmc = get_current_bmc();
+    if (current_bmc == CURRENT_MASTER) {
+        printf("* Current Bmc Default Boot: CE0\n");
+    } else {
+        printf("* Current Bmc Default Boot: CE1\n");
+    }
+
+    ret = upgrade_bmc_flash(filename, current_bmc, cs, erase_type);
+    if (ret < 0) {
+        printf("Upgrade %s bmc flash failed.\n", cs == 0 ? "master":"slave");
+        goto err;
+    }
+    printf("Upgrade %s bmc flash success.\n", cs == 0 ? "master":"slave");
+
+    bmc_reboot(cs);
+    return 0;
+err:
+    disable_upgrade();
+    return -1;
+}
+
+static int upgrade_bmc(char *filename, int cs, int erase_type)
+{
+    int ret;
+
+    if (access(filename, F_OK) < 0) {
+        printf("Can't find file\n");
+        help();
+        return -1;
+    }
+
+    ret = set_ioport_rw_access();
+    if (ret < 0) {
+        printf("IO ERROR\n");
+        return -1;
+    }
+
+    switch(cs) {
+    /* Single */
+    case CE0:
+    case CE1:
+        ret = upgrade_single_flash(filename, cs, erase_type);
+        break;
+    /* Both */
+    case BOTHFLASH:
+        ret = upgrade_both_flash(filename, erase_type);
+        break;
+    default:
+        ret = -1;
+        printf("Unsupport cs:%d\n", cs);
+        break;
+    }
+
+    return ret;
+}
+
+static int read_single_bmc_flash(flash_info_t* info, uint32_t start_addr, int read_size, int is_print)
+{
+    uint32_t res, flash_start_addr, flash_end_addr;
+    char filename[MAX_FILENAME_LENGTH];
+    int fd, ret;
+
+    flash_start_addr = info->flash_base_addr + start_addr;
+    flash_end_addr = flash_start_addr + read_size;
+    ret = 0;
+    fd = 0;
+    if (!is_print) {
+        mem_clear(filename, MAX_FILENAME_LENGTH);
+        snprintf(filename, MAX_FILENAME_LENGTH, "/tmp/image-bmc%d", info->cs);
+        fd = open(filename, O_RDWR | O_CREAT | O_TRUNC, S_IRWXG|S_IRWXU|S_IRWXO);
+        if (fd < 0) {
+            printf("open file %s fail(err:%d)!\r\n", filename, errno);
+            return -1;
+        }
+    }
+
+    printf("* CE%d FLASH TYPE: SPI FLASH\n", info->cs);
+    printf("* FLASH NAME: %s\n", info->flash_name);
+    printf("* Read flash addr:0x%x, size:0x%x\n", flash_start_addr, read_size);
+    printf("=========================================\n");
+    printf("Reading...\n");
+
+    pull_ce_down(info);
+    send_cmd(info->flash_base_addr, COMMON_FLASH_READ);
+    write_bmc_flash_addr(flash_start_addr);
+    while (1) {
+        if (flash_start_addr >= flash_end_addr) {
+            break;
+        }
+        res = read_bmc_flash_data();
+        if (is_print) {
+            printf("addr:0x%08x, val:0x%08x\n", flash_start_addr, res);
+        } else {
+            ret = write(fd, &res, sizeof(res));
+            if (ret < 0) {
+                printf("write failed (errno: %d).\n", errno);
+                ret = -1;
+                goto exit;
+            }
+        }
+        if (((flash_start_addr % 0x10000) == 0) && (!is_print)) {
+            printf("\r0x%x ", flash_start_addr);
+            fflush(stdout);
+        }
+        flash_start_addr += 4;
+    }
+    printf("\r\nRead Finish\n");
+    printf("=========================================\n");
+exit:
+    pull_ce_up(info);
+    if (fd > 0) {
+        close(fd);
+    }
+    return ret;
+}
+
+static int read_bmc_flash(int cs, uint32_t start_addr, int read_size, int is_print)
+{
+    int ret, current_bmc;
+    flash_info_t* info;
+
+    ret = set_ioport_rw_access();
+    if (ret < 0) {
+        printf("IO ERROR\n");
+        return -1;
+    }
+
+    enable_upgrade();
+
+    current_bmc = get_current_bmc();
+    if (current_bmc == CURRENT_MASTER) {
+        printf("* Current Bmc Default Boot: CE0\n");
+    } else {
+        printf("* Current Bmc Default Boot: CE1\n");
+    }
+
+    info = get_flash_info(current_bmc, cs);
+    if(info == NULL) {
+        goto err;
+    }
+
+    if (start_addr >= info->flash_size) {
+        printf("start_addr 0x%x out of range.\n", start_addr);
+        goto err;
+    }
+
+    if ((start_addr + read_size) > info->flash_size) {
+        printf("read size %d exceed flash size.\n", read_size);
+        read_size = info->flash_size - start_addr;
+    }
+
+    init_flash(info);
+
+    ret = read_single_bmc_flash(info, start_addr, read_size, is_print);
+    if (ret < 0) {
+        printf("Read %s bmc flash failed.\n", cs == 0 ? "master" : "slave");
+        goto err;
+    }
+    disable_upgrade();
+    return 0;
+err:
+    disable_upgrade();
+    return -1;
+}
+
+static int read_bmc_reg_main(int argc, char* argv[])
+{
+    uint32_t start_addr, read_val;
+    int read_size, ret;
+    char *stopstring;
+
+    if (argc != 4) {
+        printf("Input invalid.\n");
+        help();
+        return -1;
+    }
+
+    start_addr = strtoul(argv[2], &stopstring, 16);
+    read_size = strtol(argv[3], &stopstring, 10);
+
+    if (read_size <= 0) {
+        printf("read length %d invalid\n", read_size);
+        return -1;
+    }
+
+    if (((start_addr % 4) != 0) || ((read_size % 4) != 0)) {
+        printf("Params invalid, start_addr:0x%08x, read_size:%d\n", start_addr, read_size);
+        printf("Please input address/length times of 4\n");
+        return -1;
+    }
+
+    ret = set_ioport_rw_access();
+    if (ret < 0) {
+        printf("IO ERROR\n");
+        return -1;
+    }
+
+    enable_ilpc2ahb();
+
+    printf("read bcm reg, start_addr:0x%08x, read length:%d\n", start_addr, read_size);
+    printf("===Addr=== | ===Cont===\n");
+    while (read_size) {
+        read_val = read_bmc_reg(start_addr);
+        printf("0x%08x | 0x%08x\n", start_addr, read_val);
+        start_addr += 4;
+        read_size -= 4;
+    }
+
+    disable_ilpc2ahb();
+    return 0;
+}
+
+static int write_bmc_reg_main(int argc, char* argv[])
+{
+    uint32_t addr, wr_val;
+    int ret;
+    char *stopstring;
+
+    if (argc != 4) {
+        printf("Input invalid.\n");
+        help();
+        return -1;
+    }
+
+    addr = strtoul(argv[2], &stopstring, 16);
+    wr_val = strtoul(argv[3], &stopstring, 16);
+
+    if (((addr & MASK_BYTE) != REGISTER_HEAD) || ((addr % 4) != 0)) {
+        printf("Address[0x%08x] invalid, address should be register address and times of 4.\n", addr);
+        return -1;
+    }
+
+    ret = set_ioport_rw_access();
+    if (ret < 0) {
+        printf("IO ERROR\n");
+        return -1;
+    }
+
+    printf("write bcm reg, addr:0x%08x, val:0x%08x\n", addr, wr_val);
+
+    enable_ilpc2ahb();
+    write_bmc_reg(addr, wr_val);
+    disable_ilpc2ahb();
+
+    return 0;
+}
+
+static int get_fmc_info_main(void)
+{
+    int ret;
+
+    ret = set_ioport_rw_access();
+    if (ret < 0) {
+        printf("IO ERROR\n");
+        return -1;
+    }
+
+    enable_ilpc2ahb();
+
+    debug_on = 3;
+    fmc_debug();
+    debug_on = 0;
+
+    disable_ilpc2ahb();
+    return 0;
+}
+
+static int program_flash_main(int argc, char* argv[])
+{
+    int cs, erase_way, ret;
+    char *stopstring;
+    char tmp[128];
+
+    if (argc != 5) {
+        printf("Input invalid.\n");
+        help();
+        return -1;
+    }
+
+    cs = strtol(argv[3], &stopstring, 10);
+    if ((strlen(stopstring) != 0) || cs < 0 || cs > 2) {
+        snprintf(tmp, sizeof(tmp), "%s", argv[3]);
+        printf("Incorrect chip select %s\n", tmp);
+        help();
+        return -1;
+    }
+
+    if (strcmp(argv[4], "full") == 0) {
+        erase_way = FULL_ERASE;
+    } else if (strcmp(argv[4], "block") == 0) {
+        erase_way = BLOCK_ERASE;
+    } else {
+        snprintf(tmp, sizeof(tmp), "%s", argv[4]);
+        printf("Incorrect erase type %s\n", tmp);
+        help();
+        return -1;
+    }
+
+    printf("============BMC Upgrade Tool=============\n");
+    ret = upgrade_bmc(argv[2], cs, erase_way);
+    return ret;
+}
+
+static int read_bmc_flash_main(int argc, char* argv[])
+{
+    int cs, ret, read_size, is_print;
+    uint32_t start_addr;
+    char *stopstring;
+    char tmp[128];
+
+    if (argc != 6) {
+        printf("Input invalid.\n");
+        help();
+        return -1;
+    }
+
+    cs = strtol(argv[2], &stopstring, 10);
+    if ((strlen(stopstring) != 0) || cs < 0 || cs > 1) {
+        snprintf(tmp, sizeof(tmp), "%s", argv[2]);
+        printf("Incorrect chip select %s\n", tmp);
+        help();
+        return -1;
+    }
+
+    start_addr = strtoul(argv[3], &stopstring, 16);
+    read_size = strtol(argv[4], &stopstring, 10);
+
+    if (read_size <= 0) {
+        printf("read length %d invalid\n", read_size);
+        return -1;
+    }
+
+    if (((start_addr % 4) != 0) || ((read_size % 4) != 0)) {
+        printf("Params invalid, start_addr:0x%08x, read_size:%d\n", start_addr, read_size);
+        printf("Please input address/length times of 4\n");
+        return -1;
+    }
+
+    if (strcmp(argv[5], "print") == 0) {
+        is_print = 1;
+    } else {
+        is_print = 0;
+    }
+
+    printf("============READ BMC FLASH=============\n");
+    ret = read_bmc_flash(cs, start_addr, read_size, is_print);
+    return ret;
+}
+
+int main(int argc, char *argv[])
+{
+    int ret;
+
+    debug_on = fw_upgrade_debug();
+
+    if (argc < 2) {
+        help();
+        return -1;
+    }
+
+    if (argc == 2) {
+        if (strcmp(argv[1], "-h") == 0 || strcmp(argv[1], "--help") == 0) {
+            help();
+            return 0;
+        }
+    }
+
+    if (strcmp(argv[1], "rd") == 0) {
+        ret = read_bmc_reg_main(argc, argv);
+        if (ret < 0) {
+            printf("Read Failed\n");
+        }
+        return ret;
+    }
+
+    if (strcmp(argv[1], "wr") == 0 && debug_on == 3) {
+        ret = write_bmc_reg_main(argc, argv);
+        if (ret < 0) {
+            printf("Write Failed\n");
+        }
+        return ret;
+    }
+
+    if (strcmp(argv[1], "info") == 0) {
+        ret = get_fmc_info_main();
+        if (ret < 0) {
+            printf("Get fmc info Failed\n");
+        }
+        return ret;
+    }
+
+    if (strcmp(argv[1], "upgrade") == 0) {
+        ret = program_flash_main(argc, argv);
+        if (ret < 0) {
+            printf("Upgrade BMC failed.\n");
+        }
+        return ret;
+    }
+
+    if (strcmp(argv[1], "read_bmc_flash") == 0) {
+        ret = read_bmc_flash_main(argc, argv);
+        if (ret < 0) {
+            printf("Read BMC flash failed.\n");
+        }
+        return ret;
+    }
+
+    printf("Input invalid.\n");
+    help();
+
+    return -1;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade_debug.c b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade_debug.c
new file mode 100644
index 000000000000..a7a78d011011
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/fw_upgrade_debug.c
@@ -0,0 +1,51 @@
+#include <unistd.h>
+#include <fcntl.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <ctype.h>
+#include <string.h>
+#include <dirent.h>
+#include <ctype.h>
+#include "fw_upgrade_debug.h"
+
+int fw_upgrade_debug(void)
+{
+    int size;
+    FILE *fp;
+    char debug_info[DEBUG_INFO_LEN];
+
+    fp = fopen(DEBUG_FILE, "r");
+    if (fp == NULL) {
+        return DEBUG_IGNORE;
+    }
+
+    mem_clear(debug_info, DEBUG_INFO_LEN);
+    size = fread(debug_info, DEBUG_INFO_LEN - 1, 1, fp);
+    if (size < 0) {
+        fclose(fp);
+        return DEBUG_IGNORE;
+    }
+
+    if (strncmp(debug_info, DEBUG_ON_INFO, 1) == 0) {
+        fclose(fp);
+        return DEBUG_APP_ON;
+    }
+
+    if (strncmp(debug_info, DEBUG_ON_KERN, 1) == 0) {
+        fclose(fp);
+        return DEBUG_KERN_ON;
+    }
+
+    if (strncmp(debug_info, DEBUG_ON_ALL, 1) == 0) {
+        fclose(fp);
+        return DEBUG_ALL_ON;
+    }
+
+    if (strncmp(debug_info, DEBUG_OFF_INFO, 1) == 0) {
+        fclose(fp);
+        return DEBUG_OFF;
+    }
+
+    fclose(fp);
+    return DEBUG_IGNORE;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade.h b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade.h
new file mode 100644
index 000000000000..bd806a94b154
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade.h
@@ -0,0 +1,230 @@
+#ifndef _FW_UPGRADE_H_
+#define _FW_UPGRADE_H_
+
+#include "fw_upgrade_debug.h"
+
+#define dbg_print(debug, fmt, arg...)  \
+    if (debug == DEBUG_APP_ON || debug == DEBUG_ALL_ON) \
+        { do{printf(fmt,##arg);} while(0); }
+
+/* LPC Interface */
+#define LPC_ADDR_PORT               (0x4E)
+#define LPC_DATA_PORT               (0x4F)
+
+/* FMC REGISTER ADDR */
+#define FMC_BASE_ADDR               (0x1E620000)
+#define FMC_CE_TYPE_SETTING_REG     (FMC_BASE_ADDR + 0x00)
+#define CE_CONTROL_REGISTER         (FMC_BASE_ADDR + 0x04)
+#define INR_STATUS_CONTROL_REGISTER (FMC_BASE_ADDR + 0x08)
+#define COMMAND_CONTROL_REGISTER    (FMC_BASE_ADDR + 0x0C)
+#define CE0_CONTROL_REGISTER        (FMC_BASE_ADDR + 0x10)
+#define CE1_CONTROL_REGISTER        (FMC_BASE_ADDR + 0x14)
+#define CE0_ADDRESS_RANGE_REGISTER  (FMC_BASE_ADDR + 0x30)
+#define CE1_ADDRESS_RANGE_REGISTER  (FMC_BASE_ADDR + 0x34)
+
+/* SCU REGISTER ADDR */
+#define SCU_ADDR                    (0x1E6E2000)
+#define HARDWARE_STRAP_REGISTER     (SCU_ADDR + 0x70)
+#define REBOOT_CPU_REGISTER         (SCU_ADDR + 0x7C)
+
+/* SCU KEY */
+#define UNLOCK_SCU_KEY              (0x1688A8A8)
+#define LOCK_SCU_KEY                (0x11111111)
+
+/* WATCHDOG REGISTER ADDR */
+#define WATCHDOG_ADDR               (0x1E785000)
+#define WATCHDOG1_RELOAD_VALUE      (WATCHDOG_ADDR + 0x04)
+#define WATCHDOG1_COUNTER_RST       (WATCHDOG_ADDR + 0x08)
+#define WATCHDOG1_CONTROL           (WATCHDOG_ADDR + 0x0C)
+#define WATCHDOG1_TSR               (WATCHDOG_ADDR + 0x10)
+#define WATCHDOG1_CLEAR_STATUS      (WATCHDOG_ADDR + 0x14)
+#define WATCHDOG1_RESET_FUN_MASK    (WATCHDOG_ADDR + 0x1C)
+
+#define WATCHDOG2_RELOAD_VALUE      (WATCHDOG_ADDR + 0x24)
+#define WATCHDOG2_COUNTER_RST       (WATCHDOG_ADDR + 0x28)
+#define WATCHDOG2_CONTROL           (WATCHDOG_ADDR + 0x2C)
+#define WATCHDOG2_TSR               (WATCHDOG_ADDR + 0x30)
+#define WATCHDOG2_CLEAR_STATUS      (WATCHDOG_ADDR + 0x34)
+#define WATCHDOG2_RESET_FUN_MASK    (WATCHDOG_ADDR + 0x3C)
+
+/* User Mode Command */
+#define WRITE_STATUS                (0x01)
+#define COMMON_PAGE_PROGRAM         (0x02)
+#define COMMON_FLASH_READ           (0x03)
+#define WRITE_DISABLE_FLASH         (0x04)
+#define READ_FLASH_STATUS           (0x05)
+#define WRITE_ENABLE_FLASH          (0x06)
+#define PAGE_PROGRAM_FLASH          (0x12)
+#define SECTOR_ERASE                (0x20)
+#define CLEAR_FLAG                  (0x50)
+#define SUBBLOCK_ERASE              (0x52)
+#define CHIP_ERASE_FLASH            (0x60)
+#define BLOCK_ERASE_64              (0xD8)
+#define READID                      (0x9F)
+#define ENABLE_BYTE4                (0xB7)
+#define EXIT_OTP                    (0xC1)
+#define RSTEN                       (0x66)
+#define RST                         (0x99)
+
+#define BIT1                        (0x01)
+#define BIT2                        (0x02)
+#define BIT3                        (0x04)
+#define BIT4                        (0x08)
+#define BIT5                        (0x10)
+#define BIT6                        (0x20)
+#define BIT7                        (0x40)
+#define BIT8                        (0x80)
+#define RIGHT_SHIFT_8(reg)          (reg >> 8)
+#define RIGHT_SHIFT_16(reg)         (reg >> 16)
+#define RIGHT_SHIFT_24(reg)         (reg >> 24)
+#define MASK                        (0xFF)
+#define FLASH_TYPE_MASK             (BIT1 | BIT2)
+#define BOOT_DEFAULT_MASK           (BIT8)
+#define HEAD_MASK                   (0x00FFFF00)
+#define MASK_BYTE                   (0xFF000000)
+#define BYTE1                       (1)
+#define BYTE2                       (2)
+#define BYTE4                       (4)
+#define BYTE1_VAL                   (0)
+#define BYTE2_VAL                   (1)
+#define BYTE4_VAL                   (2)
+#define BYTE_RESERVED               (3)
+
+/* SuperIO */
+#define SUPERIO_07                  (0x07)
+#define SUPERIO_30                  (0x30)
+#define SUPERIO_A0                  (0xA0)
+#define SUPERIO_A2                  (0xA2)
+#define SUPERIO_REG0                (0xF0)
+#define SUPERIO_REG1                (0xF1)
+#define SUPERIO_REG2                (0xF2)
+#define SUPERIO_REG3                (0xF3)
+#define SUPERIO_REG4                (0xF4)
+#define SUPERIO_REG5                (0xF5)
+#define SUPERIO_REG6                (0xF6)
+#define SUPERIO_REG7                (0xF7)
+#define SUPERIO_REG8                (0xF8)
+#define SUPERIO_FE                  (0xFE)
+
+/* SPI Command */
+#define HIGH_CLOCK                  (0x00000000)
+#define NORMAL_READ                 (0x00000000)
+#define READ_MODE                   (0x00000001)
+#define WRITE_MODE                  (0x00000002)
+#define USER_MODE                   (0x00000003)
+#define PULL_DOWN                   (0x00000000)
+#define PULL_UP                     (0x00000004)
+
+#define CHIP_ERASE_TIME             (60)
+#define CHIP_ERASE_TIMEOUT          (300 * 1000 * 1000)
+#define CHIP_ERASE_SLEEP_TIME       (5 * 1000 * 1000)
+#define BLOCK_ERASE_TIMEOUT         (10 * 1000 * 1000)
+#define BLOCK_ERASE_SLEEP_TIME      (100 * 1000)
+#define PAGE_PROGRAM_TIMEOUT        (100 * 1000)
+#define PAGE_PROGRAM_SLEEP_TIME     (1000)
+#define FLASH_WEL_TIMEOUT           (100 * 1000)
+#define FLASH_WEL_SLEEP_TIME        (1000)
+#define FLASH_WIP_MASK              (0x00000001)
+#define FLASH_WRITE_ENABLE_MASK     (0x00000002)
+
+#define DATA_LENGTH_MASK            (0xA2)
+#define TOGGLE_WRITE                (0xCF)
+#define DISABLE_LPC                 (0xAA)
+#define ENABLE_LPC                  (0xA5)
+#define LPC_TO_AHB                  (0x0D)
+#define ENABLE_LPC_TO_AHB           (0x01)
+#define DISABLE_LPC_TO_AHB          (0x00)
+#define ENABLE_BMC_CPU_BOOT         (0xF10BD286)
+#define DISABLE_BMC_CPU_BOOT        (0xF10BD287)
+#define SET_BMC_CPU_BOOT            (0x01)
+#define CLEAR_WATCHDOG_STATUS       (0x01)
+#define DISABLE_WATCHDOG            (0x00000030)
+#define ENABLE_WATCHDOG             (0x00000033)
+#define WATCHDOG_GATEMASK           (0x033FFFF3)
+#define WATCHDOG_NEW_COUNT          (0x00050000)
+#define WATCHDOG_RELOAD_COUNTER     (0x4755)
+
+#define CE0_SPI_TYPE                (0x00000002)
+#define CE1_SPI_TYPE                (0x00000008)
+#define ERROR_COMMAND               (0x00000400)
+#define ADDRESS_PROTECT             (0x00000200)
+#define CLEAR_INR_STATUS_CONTROL    (ERROR_COMMAND | ADDRESS_PROTECT)
+#define USER_MODE_PULL_CE_DOWN      (HIGH_CLOCK | USER_MODE | PULL_DOWN)
+#define USER_MODE_PULL_CE_UP        (HIGH_CLOCK | USER_MODE | PULL_UP)
+
+#define STEP_64                     (64 * 1024)
+#define STEP_256                    (256 * 1024)
+#define BYTE_256                    (256)
+
+#define CE0                         (0)
+#define CE1                         (1)
+#define BOTHFLASH                   (2)
+#define SOC_SYS                     (0)
+#define FULL_CHIP                   (1)
+#define ARM_CPU                     (2)
+#define FULL_ERASE                  (0)
+#define BLOCK_ERASE                 (1)
+#define READ_ALL                    (2)
+#define CURRENT_SLAVE               (1)
+#define CURRENT_MASTER              (0)
+#define REGISTER_HEAD               (0x1e000000)
+#define DEFAULT_WIDTH               (16)
+#define MAX_FILENAME_LENGTH         (64)
+#define SEGMENT_ADDR_START(_r)      ((((_r) >> 16) & 0xFF) << 23)
+
+typedef struct flash_info {
+    uint32_t flash_size;
+    int cs;
+    int flash_type;
+    uint32_t flash_id;
+    int page_size;
+    char flash_name[64];
+    int erase_block_command;
+    int page_program;
+    int block_size;
+    int full_erase;
+    uint32_t ce_control_reg;
+    uint32_t flash_base_addr;
+} flash_info_t;
+
+typedef enum flash_id {
+    MX25L6433F = 0x1920c2,
+    S25FL512S = 0x200201,
+    MX25l512 = 0x1a20c2,
+    STM25P64 = 0x172020,
+    STM25P128 = 0x182020,
+    N25Q256 = 0x19ba20,
+    N25Q512 = 0x20ba20,
+    W25X16 = 0x1530ef,
+    W25X64 = 0x1730ef,
+    W25Q64BV = 0x1740ef,
+    W25Q128BV = 0x1840ef,
+    W25Q256FV = 0x1940ef,
+    MX25L1605D = 0x1520C2,
+    MX25L12805D = 0x1820C2,
+    MX66L1G45G = 0x1B20C2,
+    SST25VF016B	= 0x4125bf,
+    SST25VF064C = 0x4b25bf,
+    SST25VF040B	= 0x8d25bf,
+    AT25DF161 = 0x02461F,
+    AT25DF321 = 0x01471F,
+    GD25Q256 = 0X1940c8,
+} flash_id_t;
+
+typedef enum flash_type {
+    NOR = 0,
+    SPI = 2,
+} flash_type_t;
+
+typedef enum flash_size {
+    M1  = 0x00080000,
+    M3  = 0x00200000, /* 3M */
+    M6  = 0x00400000, /* 6M */
+    M12 = 0x00800000, /* 12M */
+    M16 = 0x01000000, /* 16M */
+    M32 = 0x02000000, /* 32M */
+    M64 = 0x04000000, /* 64M */
+    M128 = 0x08000000, /* 128M */
+} flash_size_t;
+
+#endif  /*_FW_UPGRADE_H_*/
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade_debug.h b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade_debug.h
new file mode 100644
index 000000000000..05911da62a7e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/fw_upgrade/fw_upgrade/include/fw_upgrade_debug.h
@@ -0,0 +1,25 @@
+#ifndef __FW_UPGRADE_DEBUG_H__
+#define __FW_UPGRADE_DEBUG_H__
+
+#include <string.h>
+
+#define DEBUG_INFO_LEN  20
+#define DEBUG_FILE      "/tmp/.fw_upgrade_debug"
+#define DEBUG_ON_ALL    "3"
+#define DEBUG_ON_KERN   "2"
+#define DEBUG_ON_INFO   "1"
+#define DEBUG_OFF_INFO  "0"
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+enum debug_s {
+    DEBUG_OFF = 0,
+    DEBUG_APP_ON,
+    DEBUG_KERN_ON,
+    DEBUG_ALL_ON,
+    DEBUG_IGNORE,
+};
+
+extern int fw_upgrade_debug(void);
+
+#endif /* End of __FW_UPGRADE_DEBUG_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/__init__.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/__init__.py
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/hysteresis.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/hysteresis.py
new file mode 100644
index 000000000000..81fd596e7fee
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/hysteresis.py
@@ -0,0 +1,169 @@
+#!/usr/bin/env python3
+import os
+import syslog
+import copy
+
+from plat_hal.baseutil import baseutil
+
+HYST_DEBUG_FILE = "/etc/.hysteresis_debug_flag"
+
+HYSTERROR = 1
+HYSTDEBUG = 2
+
+debuglevel = 0
+
+
+def hyst_debug(s):
+    if HYSTDEBUG & debuglevel:
+        syslog.openlog("FANCONTROL-HYST", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def hyst_error(s):
+    if HYSTERROR & debuglevel:
+        syslog.openlog("FANCONTROL-HYST", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+class hysteresis(object):
+    __config = None
+    __hyst_config = None
+
+    def __init__(self):
+        self.__config = baseutil.get_monitor_config()
+        self.__hyst_config = copy.deepcopy(self.__config.get("hyst", {}))
+        # init check
+        errcnt = 0
+        errmsg = ""
+        self.debug_init()
+        for temp_hyst_conf in self.__hyst_config.values():
+            if temp_hyst_conf["flag"] == 0:
+                continue
+            for i in range(temp_hyst_conf["temp_min"], temp_hyst_conf["temp_max"] + 1):
+                if i not in temp_hyst_conf["rising"]:
+                    errcnt -= 1
+                    msg = "%s hyst config error, temp value %d not in rising curve;" % (temp_hyst_conf["name"], i)
+                    hyst_error(msg)
+                    errmsg += msg
+                if i not in temp_hyst_conf["descending"]:
+                    errcnt -= 1
+                    msg = "%s hyst config error, temp value %d not in descending curve;" % (temp_hyst_conf["name"], i)
+                    hyst_error(msg)
+                    errmsg += msg
+        if errcnt < 0:
+            raise KeyError(errmsg)
+
+    def debug_init(self):
+        global debuglevel
+        if os.path.exists(HYST_DEBUG_FILE):
+            debuglevel = debuglevel | HYSTDEBUG | HYSTERROR
+        else:
+            debuglevel = debuglevel & ~(HYSTDEBUG | HYSTERROR)
+
+    def get_temp_hyst_conf(self, temp_name):
+        temp_hyst_conf = self.__hyst_config.get(temp_name)
+        return temp_hyst_conf
+
+    def get_temp_update(self, hyst_para, current_temp):
+        temp = hyst_para["value"]
+        if temp is None:
+            return None
+        temp.append(current_temp)
+        del temp[0]
+        return temp
+
+    def duty_to_pwm(self, duty):
+        pwm = int(round(float(duty) * 255 / 100))
+        return pwm
+
+    def pwm_to_duty(self, pwm):
+        duty = int(round(float(pwm) * 100 / 255))
+        return duty
+
+    def calc_hyst_val(self, temp_name, temp_list):
+
+        temp_hyst_conf = self.get_temp_hyst_conf(temp_name)
+        hyst_min = temp_hyst_conf["hyst_min"]
+        hyst_max = temp_hyst_conf["hyst_max"]
+        temp_min = temp_hyst_conf["temp_min"]
+        temp_max = temp_hyst_conf["temp_max"]
+        rising = temp_hyst_conf["rising"]
+        descending = temp_hyst_conf["descending"]
+        last_hyst_value = temp_hyst_conf["last_hyst_value"]
+        current_temp = temp_list[1]
+        last_temp = temp_list[0]
+
+        hyst_debug("calc_hyst_val, temp_name: %s, current_temp: %s, last_temp: %s, last_hyst_value: %s" %
+                   (temp_name, current_temp, last_temp, last_hyst_value))
+
+        if current_temp < temp_min:
+            hyst_debug("%s current_temp %s less than temp_min %s, set min hyst value: %s" %
+                       (temp_name, current_temp, temp_min, hyst_min))
+            return hyst_min
+
+        if current_temp > temp_max:
+            hyst_debug("%s current_temp %s more than temp_max %s, set max hyst value: %s" %
+                       (temp_name, current_temp, temp_max, hyst_max))
+            return hyst_max
+
+        if last_temp is None:  # first time
+            hyst_value = rising[current_temp]
+            hyst_debug("last_temp is None, it's first hysteresis, using rising hyst value: %s" % hyst_value)
+            return hyst_value
+
+        if current_temp == last_temp:  # temp unchanging
+            hyst_debug("current_temp equal last_temp, keep last hyst value: %s" % last_hyst_value)
+            return last_hyst_value
+
+        if current_temp > last_temp:
+            calc_hyst_value = rising[current_temp]
+            if calc_hyst_value < last_hyst_value:
+                hyst_value = last_hyst_value
+            else:
+                hyst_value = calc_hyst_value
+            hyst_debug("temp rising, last_hyst_value: %s, calc_hyst_value: %s, set hyst value: %s" %
+                       (last_hyst_value, calc_hyst_value, hyst_value))
+            return hyst_value
+
+        calc_hyst_value = descending[current_temp]
+        if calc_hyst_value > last_hyst_value:
+            hyst_value = last_hyst_value
+        else:
+            hyst_value = calc_hyst_value
+        hyst_debug("temp descending, last_hyst_value: %s, calc_hyst_value: %s, set hyst value: %s" %
+                   (last_hyst_value, calc_hyst_value, hyst_value))
+        return hyst_value
+
+    def cacl(self, temp_name, current_temp):
+        self.debug_init()
+        try:
+            temp_hyst_conf = self.get_temp_hyst_conf(temp_name)
+            if temp_hyst_conf is None:
+                hyst_debug("get %s hysteresis config failed" % temp_name)
+                return None
+
+            flag = temp_hyst_conf["flag"]
+            if flag != 1:
+                hyst_debug("%s hysteresis flag == 0, skip" % temp_name)
+                return None
+
+            temp = self.get_temp_update(temp_hyst_conf, current_temp)
+            if temp is None:
+                hyst_debug("get %s update failed" % temp_name)
+                return None
+
+            value = self.calc_hyst_val(temp_name, temp)
+
+            temp_hyst_conf["last_hyst_value"] = value
+
+            speed_type = temp_hyst_conf["type"]
+            if speed_type == "duty":
+                pwm = self.duty_to_pwm(value)
+            else:
+                pwm = value
+
+            hyst_debug("temp_name: %s, current_temp: %s, set pwm 0x%x" % (temp_name, current_temp, pwm))
+            return pwm
+        except Exception as e:
+            hyst_error("temp_name: %s calc hysteresis pwm error, msg: %s" % (temp_name, str(e)))
+            return None
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/openloop.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/openloop.py
new file mode 100644
index 000000000000..6ff731fa7eb2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/openloop.py
@@ -0,0 +1,104 @@
+#!/usr/bin/env python3
+import os
+import syslog
+
+from plat_hal.baseutil import baseutil
+
+OPENLOOP_DEBUG_FILE = "/etc/.openloop_debug_flag"
+
+OPENLOOPERROR = 1
+OPENLOOPDEBUG = 2
+
+debuglevel = 0
+
+
+def openloop_debug(s):
+    if OPENLOOPDEBUG & debuglevel:
+        syslog.openlog("FANCONTROL-OPENLOOP", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def openloop_error(s):
+    if OPENLOOPERROR & debuglevel:
+        syslog.openlog("FANCONTROL-OPENLOOP", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+class openloop(object):
+    __config = None
+    __openloop_config = None
+
+    def __init__(self):
+        self.__config = baseutil.get_monitor_config()
+        self.__openloop_config = self.__config["openloop"]
+
+    def debug_init(self):
+        global debuglevel
+        if os.path.exists(OPENLOOP_DEBUG_FILE):
+            debuglevel = debuglevel | OPENLOOPDEBUG | OPENLOOPERROR
+        else:
+            debuglevel = debuglevel & ~(OPENLOOPDEBUG | OPENLOOPERROR)
+
+    def get_para(self, t):
+        para = self.__openloop_config.get(t)
+        return para
+
+    def linear_cacl(self, temp):
+        self.debug_init()
+        openloop_para = self.get_para("linear")
+        if openloop_para is None:
+            openloop_debug("linear openloop: get para failed")
+            return None
+
+        K = openloop_para["K"]
+        tin_min = openloop_para["tin_min"]
+        pwm_min = openloop_para["pwm_min"]
+        pwm_max = openloop_para["pwm_max"]
+        flag = openloop_para["flag"]
+
+        if flag != 1:
+            openloop_debug("linear openloop: flag == 0")
+            return None
+
+        if temp <= tin_min:
+            openloop_debug("linear openloop: temp = %d less than tin_min[%d]" % (temp, tin_min))
+            return pwm_min
+
+        pwm = int(pwm_min + (temp - tin_min) * K)
+        openloop_debug("linear openloop: cacl_pwm = 0x%x" % pwm)
+
+        pwm = min(pwm, pwm_max)
+        pwm = max(pwm, pwm_min)
+        openloop_debug("linear openloop: temp = %d, pwm = 0x%x" % (temp, pwm))
+        return pwm
+
+    def curve_cacl(self, temp):
+        self.debug_init()
+        openloop_para = self.get_para("curve")
+        if openloop_para is None:
+            openloop_debug("curve openloop: get para failed")
+            return None
+
+        a = openloop_para["a"]
+        b = openloop_para["b"]
+        c = openloop_para["c"]
+        tin_min = openloop_para["tin_min"]
+        pwm_min = openloop_para["pwm_min"]
+        pwm_max = openloop_para["pwm_max"]
+        flag = openloop_para["flag"]
+
+        if flag != 1:
+            openloop_debug("curve openloop: flag == 0")
+            return None
+
+        if temp <= tin_min:
+            openloop_debug("curve openloop: temp = %d less than tin_min[%d]" % (temp, tin_min))
+            return pwm_min
+
+        pwm = int(a * temp * temp + b * temp + c)
+        openloop_debug("curve openloop: cacl_pwm = 0x%x" % pwm)
+
+        pwm = min(pwm, pwm_max)
+        pwm = max(pwm, pwm_min)
+        openloop_debug("curve openloop: temp = %d, pwm = 0x%x" % (temp, pwm))
+        return pwm
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/pid.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/pid.py
new file mode 100644
index 000000000000..c33c1df33b4e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/pid.py
@@ -0,0 +1,106 @@
+#!/usr/bin/env python3
+import os
+import syslog
+import copy
+
+from plat_hal.baseutil import baseutil
+
+PID_DEBUG_FILE = "/etc/.pid_debug_flag"
+
+PIDERROR = 1
+PIDDEBUG = 2
+
+debuglevel = 0
+
+
+def pid_debug(s):
+    if PIDDEBUG & debuglevel:
+        syslog.openlog("FANCONTROL-PID", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def pid_error(s):
+    if PIDERROR & debuglevel:
+        syslog.openlog("FANCONTROL-PID", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+class pid(object):
+    __config = None
+    __pid_config = None
+
+    def __init__(self):
+        self.__config = baseutil.get_monitor_config()
+        self.__pid_config = copy.deepcopy(self.__config["pid"])
+
+    def debug_init(self):
+        global debuglevel
+        if os.path.exists(PID_DEBUG_FILE):
+            debuglevel = debuglevel | PIDDEBUG | PIDERROR
+        else:
+            debuglevel = debuglevel & ~(PIDDEBUG | PIDERROR)
+
+    def get_para(self, name):
+        para = self.__pid_config.get(name)
+        return para
+
+    def get_temp_update(self, pid_para, current_temp):
+        temp = pid_para["value"]
+        if temp is None:
+            return None
+        temp.append(current_temp)
+        del temp[0]
+        return temp
+
+    def cacl(self, last_pwm, name, current_temp):
+        delta_pwm = 0
+        self.debug_init()
+        pid_debug("last_pwm = %d" % last_pwm)
+
+        pid_para = self.get_para(name)
+        if pid_para is None:
+            pid_debug("get %s pid para failed" % name)
+            return None
+
+        temp = self.get_temp_update(pid_para, current_temp)
+        if temp is None:
+            pid_debug("get %s update failed" % name)
+            return None
+
+        speed_type = pid_para["type"]
+        Kp = pid_para["Kp"]
+        Ki = pid_para["Ki"]
+        Kd = pid_para["Kd"]
+        target = pid_para["target"]
+        pwm_min = pid_para["pwm_min"]
+        pwm_max = pid_para["pwm_max"]
+        flag = pid_para["flag"]
+
+        if flag != 1:
+            pid_debug("%s pid flag == 0" % name)
+            return None
+
+        if speed_type == "duty":
+            current_pwm = round(last_pwm * 100 / 255)
+        else:
+            current_pwm = last_pwm
+
+        if temp[2] is None:
+            tmp_pwm = current_pwm
+        elif ((temp[0] is None) or (temp[1] is None)):
+            delta_pwm = Ki * (temp[2] - target)
+            tmp_pwm = current_pwm + delta_pwm
+        else:
+            delta_pwm = Kp * (temp[2] - temp[1]) + Ki * (temp[2] - target) + Kd * (temp[2] - 2 * temp[1] + temp[0])
+            tmp_pwm = current_pwm + delta_pwm
+
+        pid_debug("delta_pwm = %d" % delta_pwm)
+        if speed_type == "duty":
+            pwm = round(tmp_pwm * 255 / 100)
+        else:
+            pwm = int(tmp_pwm)
+
+        pwm = min(pwm, pwm_max)
+        pwm = max(pwm, pwm_min)
+        pid_debug("last_pwm = 0x%x, pwm = 0x%x" % (last_pwm, pwm))
+        return pwm
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/__init__.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/__init__.py
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fantlv.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fantlv.py
new file mode 100644
index 000000000000..4be78e7fdc03
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fantlv.py
@@ -0,0 +1,192 @@
+#!/usr/bin/python3
+# -*- coding: utf-8 -*-
+
+class FantlvException(Exception):
+    def __init__(self, message='fantlverror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+
+class fan_tlv():
+    HEAD_INFO = "\x01\x7e\x01\xf1"
+    VERSION = 0x01
+    FLAG = 0x7E
+    HW_VER = 0X01
+    TYPE = 0xf1
+    TLV_LEN = 00
+    _FAN_TLV_HDR_LEN = 6
+    _FAN_TLV_CRC_LEN = 2
+
+    _FAN_TLV_TYPE_NAME = 0x02
+    _FAN_TLV_TYPE_SN = 0x03
+    _FAN_TLV_TYPE_HW_INFO = 0x05
+    _FAN_TLV_TYPE_DEV_TYPE = 0x06
+
+    @property
+    def dstatus(self):
+        return self._dstatus
+
+    @property
+    def typename(self):
+        return self._typename
+
+    @property
+    def typesn(self):
+        return self._typesn
+
+    @property
+    def typehwinfo(self):
+        return self._typehwinfo
+
+    @property
+    def typedevtype(self):
+        return self._typedevtype
+
+    def __init__(self):
+        self._typename = ""
+        self._typesn = ""
+        self._typehwinfo = ""
+        self._typedevtype = ""
+        self._dstatus = 0
+
+    def strtoarr(self, val):
+        s = []
+        if not isinstance(val, str):
+            return s
+        for index in val:
+            s.append(index)
+        return s
+
+    def hex_to_str(self, s):
+        len_t = len(s)
+        if len_t % 2 != 0:
+            return 0
+        ret = ""
+        for t in range(0, len_t / 2):
+            ret += chr(int(s[2 * t:2 * t + 2], 16))
+        return ret
+
+    def generate_fan_value(self):
+        bin_buffer = [chr(0xff)] * 256
+        bin_buffer[0] = chr(self.VERSION)
+        bin_buffer[1] = chr(self.FLAG)
+        bin_buffer[2] = chr(self.HW_VER)
+        bin_buffer[3] = chr(self.TYPE)
+
+        temp_t = "%08x" % self.typedevtype
+        typedevtype_t = self.hex_to_str(temp_t)
+        total_len = len(self.typename) + len(self.typesn) + \
+            len(self.typehwinfo) + len(typedevtype_t) + 8
+
+        bin_buffer[4] = chr(total_len >> 8)
+        bin_buffer[5] = chr(total_len & 0x00FF)
+
+        index_start = 6
+        bin_buffer[index_start] = chr(self._FAN_TLV_TYPE_NAME)
+        bin_buffer[index_start + 1] = chr(len(self.typename))
+        bin_buffer[index_start + 2: index_start + 2 +
+                   len(self.typename)] = self.strtoarr(self.typename)
+        index_start = index_start + 2 + len(self.typename)
+
+        bin_buffer[index_start] = chr(self._FAN_TLV_TYPE_SN)
+        bin_buffer[index_start + 1] = chr(len(self.typesn))
+        bin_buffer[index_start + 2:index_start + 2 +
+                   len(self.typesn)] = self.strtoarr(self.typesn)
+        index_start = index_start + 2 + len(self.typesn)
+
+        bin_buffer[index_start] = chr(self._FAN_TLV_TYPE_HW_INFO)
+        bin_buffer[index_start + 1] = chr(len(self.typehwinfo))
+        bin_buffer[index_start + 2:index_start + 2 +
+                   len(self.typehwinfo)] = self.strtoarr(self.typehwinfo)
+        index_start = index_start + 2 + len(self.typehwinfo)
+
+        bin_buffer[index_start] = chr(self._FAN_TLV_TYPE_DEV_TYPE)
+        bin_buffer[index_start + 1] = chr(len(typedevtype_t))
+        bin_buffer[index_start + 2:index_start + 2 +
+                   len(typedevtype_t)] = self.strtoarr(typedevtype_t)
+        index_start = index_start + 2 + len(typedevtype_t)
+
+        crcs = fan_tlv.fancrc(''.join(bin_buffer[0:index_start]))
+        bin_buffer[index_start] = chr(crcs >> 8)
+        bin_buffer[index_start + 1] = chr(crcs & 0x00ff)
+        return bin_buffer
+
+    def decode(self, e2):
+        if e2[0:4] != self.HEAD_INFO:
+            raise FantlvException("Fan tlv head info error,not fan tlv type", -10)
+        ret = []
+        self.VERSION = ord(e2[0])
+        self.FLAG = ord(e2[1])
+        self.HW_VER = ord(e2[2])
+        self.TYPE = ord(e2[3])
+        self.TLV_LEN = (ord(e2[4]) << 8) | ord(e2[5])
+
+        tlv_index = self._FAN_TLV_HDR_LEN
+        tlv_end = self._FAN_TLV_HDR_LEN + self.TLV_LEN
+
+        if len(e2) < self._FAN_TLV_HDR_LEN + self.TLV_LEN + 2:
+            raise FantlvException("Fan tlv eeprom len error!", -2)
+        sumcrc = fan_tlv.fancrc(e2[0:self._FAN_TLV_HDR_LEN + self.TLV_LEN])
+        readcrc = ord(e2[self._FAN_TLV_HDR_LEN + self.TLV_LEN]
+                      ) << 8 | ord(e2[self._FAN_TLV_HDR_LEN + self.TLV_LEN + 1])
+        if sumcrc != readcrc:
+            raise FantlvException("Fan tlv eeprom checksum error!", -1)
+        self._dstatus = 0
+        while (tlv_index + 2) < len(e2) and tlv_index < tlv_end:
+            s = self.decoder(
+                e2[tlv_index:tlv_index + 2 + ord(e2[tlv_index + 1])])
+            tlv_index += ord(e2[tlv_index + 1]) + 2
+            ret.append(s)
+
+        return ret
+
+    @staticmethod
+    def fancrc(t):
+        crc = 0
+        for item in t:
+            crc += ord(item)
+        return crc
+
+    def decoder(self, t):
+        try:
+            name = ""
+            value = ""
+            _len = 0
+            if ord(t[0]) == self._FAN_TLV_TYPE_NAME:
+                name = "Product Name"
+                _len = ord(t[1])
+                value = t[2:2 + ord(t[1])]
+                self._typename = value
+            elif ord(t[0]) == self._FAN_TLV_TYPE_SN:
+                name = "serial Number"
+                _len = ord(t[1])
+                value = t[2:2 + ord(t[1])]
+                self._typesn = value
+            elif ord(t[0]) == self._FAN_TLV_TYPE_HW_INFO:
+                name = "hardware info"
+                _len = ord(t[1])
+                value = t[2:2 + ord(t[1])]
+                self._typehwinfo = value
+            elif ord(t[0]) == self._FAN_TLV_TYPE_DEV_TYPE:
+                name = "dev type"
+                _len = ord(t[1])
+                value = "0x"
+                for c in t[2:2 + ord(t[1])]:
+                    value += "%02X" % (ord(c),)
+                self._typedevtype = int(value, 16)
+        except Exception as e:
+            print(e)
+        return {"name": name, "code": ord(t[0]), "value": value, "lens": _len}
+
+    def __str__(self):
+        formatstr = "VERSION     : 0x%02x  \n" \
+                    "   FLAG     : 0x%02x  \n" \
+                    " HW_VER     : 0x%02x  \n" \
+                    "   TYPE     : 0x%02x  \n" \
+                    "typename    : %s      \n" \
+                    "typesn      : %s      \n" \
+                    "typehwinfo  : %s      \n"
+        return formatstr % (self.VERSION, self.FLAG, self.HW_VER, self.TYPE,
+                            self.typename, self.typesn, self.typehwinfo)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fru.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fru.py
new file mode 100644
index 000000000000..f95164e03601
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/fru.py
@@ -0,0 +1,961 @@
+#!/usr/bin/python3
+import collections
+from datetime import datetime, timedelta
+from bitarray import bitarray
+
+
+__DEBUG__ = "N"
+
+
+class FruException(Exception):
+    def __init__(self, message='fruerror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+
+def e_print(err):
+    print("ERROR: " + err)
+
+
+def d_print(debug_info):
+    if __DEBUG__ == "Y":
+        print(debug_info)
+
+
+class FruUtil():
+    @staticmethod
+    def decodeLength(value):
+        a = bitarray(8)
+        a.setall(True)
+        a[0:1] = 0
+        a[1:2] = 0
+        x = ord(a.tobytes())
+        return x & ord(value)
+
+    @staticmethod
+    def minToData():
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        endtime = datetime.now()
+        seconds = (endtime - starttime).total_seconds()
+        mins = seconds // 60
+        m = int(round(mins))
+        return m
+
+    @staticmethod
+    def getTimeFormat():
+        return datetime.now().strftime('%Y-%m-%d')
+
+    @staticmethod
+    def getTypeLength(value):
+        if value is None or len(value) == 0:
+            return 0
+        a = bitarray(8)
+        a.setall(False)
+        a[0:1] = 1
+        a[1:2] = 1
+        x = ord(a.tobytes())
+        return x | len(value)
+
+    @staticmethod
+    def checksum(b):
+        result = 0
+        for item in b:
+            result += ord(item)
+        return (0x100 - (result & 0xff)) & 0xff
+
+
+class BaseArea(object):
+    SUGGESTED_SIZE_COMMON_HEADER = 8
+    SUGGESTED_SIZE_INTERNAL_USE_AREA = 72
+    SUGGESTED_SIZE_CHASSIS_INFO_AREA = 32
+    SUGGESTED_SIZE_BOARD_INFO_AREA = 80
+    SUGGESTED_SIZE_PRODUCT_INFO_AREA = 80
+
+    INITVALUE = b'\x00'
+    resultvalue = INITVALUE * 256
+    COMMON_HEAD_VERSION = b'\x01'
+    __childList = None
+
+    def __init__(self, name="", size=0, offset=0):
+        self.__childList = []
+        self._offset = offset
+        self.name = name
+        self._size = size
+        self._isPresent = False
+        self._data = b'\x00' * size
+
+    @property
+    def childList(self):
+        return self.__childList
+
+    @childList.setter
+    def childList(self, value):
+        self.__childList = value
+
+    @property
+    def offset(self):
+        return self._offset
+
+    @offset.setter
+    def offset(self, value):
+        self._offset = value
+
+    @property
+    def size(self):
+        return self._size
+
+    @size.setter
+    def size(self, value):
+        self._size = value
+
+    @property
+    def data(self):
+        return self._data
+
+    @data.setter
+    def data(self, value):
+        self._data = value
+
+    @property
+    def isPresent(self):
+        return self._isPresent
+
+    @isPresent.setter
+    def isPresent(self, value):
+        self._isPresent = value
+
+
+class InternalUseArea(BaseArea):
+    pass
+
+
+class ChassisInfoArea(BaseArea):
+    pass
+
+
+class BoardInfoArea(BaseArea):
+    _boardTime = None
+    _fields = None
+    _mfg_date = None
+    areaversion = None
+    _boardversion = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "mfg_date            : %s \n" \
+                    "boardManufacturer   : %s \n" \
+                    "boardProductName    : %s \n" \
+                    "boardSerialNumber   : %s \n" \
+                    "boardPartNumber     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.boardversion), self.size,
+                              self.language, self.getMfgRealData(),
+                              self.boardManufacturer, self.boardProductName,
+                              self.boardSerialNumber, self.boardPartNumber,
+                              self.fruFileId)
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "boardextra%d         : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["boardversion"] = ord(self.boardversion)
+        dic["boardlength"] = self.size
+        dic["boardlanguage"] = self.language
+        dic["boardmfg_date"] = self.getMfgRealData()
+        dic["boardManufacturer"] = self.boardManufacturer
+        dic["boardProductName"] = self.boardProductName
+        dic["boardSerialNumber"] = self.boardSerialNumber
+        dic["boardPartNumber"] = self.boardPartNumber
+        dic["boardfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]
+        index += 1
+        d_print("decode length :%d class size:%d" %
+                ((ord(self.data[index]) * 8), self.size))
+        index += 2
+
+        timetmp = self.data[index: index + 3]
+        self.mfg_date = ord(timetmp[0]) | (
+            ord(timetmp[1]) << 8) | (ord(timetmp[2]) << 16)
+        d_print("decode getMfgRealData :%s" % self.getMfgRealData())
+        index += 3
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardManufacturer:%s" % self.boardManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardProductName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardProductName:%s" % self.boardProductName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardSerialNumber:%s" % self.boardSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.boardPartNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode boardPartNumber:%s" % self.boardPartNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if self.data[index] != chr(0xc1):
+                templen = FruUtil.decodeLength(self.data[index])
+                tmpval = self.data[index + 1: index + templen + 1]
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+            else:
+                break
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("boardInfoArea version:%x" % ord(self.boardversion))
+        d_print("boardInfoArea length:%d" % self.size)
+        d_print("boardInfoArea language:%x" % self.language)
+        self.mfg_date = FruUtil.minToData()
+        d_print("boardInfoArea mfg_date:%x" % self.mfg_date)
+
+        self.data = chr(ord(self.boardversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        self.data += chr(self.mfg_date & 0xFF)
+        self.data += chr((self.mfg_date >> 8) & 0xFF)
+        self.data += chr((self.mfg_date >> 16) & 0xFF)
+
+        d_print("boardInfoArea boardManufacturer:%s" % self.boardManufacturer)
+        typelength = FruUtil.getTypeLength(self.boardManufacturer)
+        self.data += chr(typelength)
+        self.data += self.boardManufacturer
+
+        d_print("boardInfoArea boardProductName:%s" % self.boardProductName)
+        self.data += chr(FruUtil.getTypeLength(self.boardProductName))
+        self.data += self.boardProductName
+
+        d_print("boardInfoArea boardSerialNumber:%s" % self.boardSerialNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardSerialNumber))
+        self.data += self.boardSerialNumber
+
+        d_print("boardInfoArea boardPartNumber:%s" % self.boardPartNumber)
+        self.data += chr(FruUtil.getTypeLength(self.boardPartNumber))
+        self.data += self.boardPartNumber
+
+        d_print("boardInfoArea fruFileId:%s" % self.fruFileId)
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "boardextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea boardextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        d_print("self data:%d" % len(self.data))
+        d_print("self size:%d" % self.size)
+        d_print("adjust size:%d" % (self.size - len(self.data) - 1))
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+
+        # checksum
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+    def getMfgRealData(self):
+        starttime = datetime(1996, 1, 1, 0, 0, 0)
+        mactime = starttime + timedelta(minutes=self.mfg_date)
+        return mactime
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def mfg_date(self):
+        return self._mfg_date
+
+    @mfg_date.setter
+    def mfg_date(self, val):
+        self._mfg_date = val
+
+    @property
+    def boardversion(self):
+        self._boardversion = self.COMMON_HEAD_VERSION
+        return self._boardversion
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, val):
+        self._FRUFileID = val
+
+    @property
+    def boardPartNumber(self):
+        return self._boardPartNumber
+
+    @boardPartNumber.setter
+    def boardPartNumber(self, val):
+        self._boardPartNumber = val
+
+    @property
+    def boardSerialNumber(self):
+        return self._boardSerialNumber
+
+    @boardSerialNumber.setter
+    def boardSerialNumber(self, val):
+        self._boardSerialNumber = val
+
+    @property
+    def boardProductName(self):
+        return self._boradProductName
+
+    @boardProductName.setter
+    def boardProductName(self, val):
+        self._boradProductName = val
+
+    @property
+    def boardManufacturer(self):
+        return self._boardManufacturer
+
+    @boardManufacturer.setter
+    def boardManufacturer(self, val):
+        self._boardManufacturer = val
+
+    @property
+    def boardTime(self):
+        return self._boardTime
+
+    @boardTime.setter
+    def boardTime(self, val):
+        self._boardTime = val
+
+    @property
+    def fields(self):
+        return self._fields
+
+    @fields.setter
+    def fields(self, val):
+        self._fields = val
+
+
+class ProductInfoArea(BaseArea):
+    _productManufacturer = None
+    _productAssetTag = None
+    _FRUFileID = None
+    _language = None
+
+    def __str__(self):
+        formatstr = "version             : %x\n" \
+                    "length              : %d \n" \
+                    "language            : %x \n" \
+                    "productManufacturer : %s \n" \
+                    "productName         : %s \n" \
+                    "productPartModelName: %s \n" \
+                    "productVersion      : %s \n" \
+                    "productSerialNumber : %s \n" \
+                    "productAssetTag     : %s \n" \
+                    "fruFileId           : %s \n"
+
+        tmpstr = formatstr % (ord(self.areaversion), self.size,
+                              self.language, self.productManufacturer,
+                              self.productName, self.productPartModelName,
+                              self.productVersion, self.productSerialNumber,
+                              self.productAssetTag, self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                tmpstr += "productextra%d       : %s \n" % (i, valtmpval)
+            else:
+                break
+
+        return tmpstr
+
+    def todict(self):
+        dic = collections.OrderedDict()
+        dic["productversion"] = ord(self.areaversion)
+        dic["productlength"] = self.size
+        dic["productlanguage"] = self.language
+        dic["productManufacturer"] = self.productManufacturer
+        dic["productName"] = self.productName
+        dic["productPartModelName"] = self.productPartModelName
+        dic["productVersion"] = int(self.productVersion, 16)
+        dic["productSerialNumber"] = self.productSerialNumber
+        dic["productAssetTag"] = self.productAssetTag
+        dic["productfruFileId"] = self.fruFileId
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                dic[valtmp] = valtmpval
+            else:
+                break
+        return dic
+
+    def decodedata(self):
+        index = 0
+        self.areaversion = self.data[index]  # 0
+        index += 1
+        d_print("decode length %d" % (ord(self.data[index]) * 8))
+        d_print("class size %d" % self.size)
+        index += 2
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productManufacturer = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productManufacturer:%s" % self.productManufacturer)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productName:%s" % self.productName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productPartModelName = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productPartModelName:%s" % self.productPartModelName)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productVersion = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productVersion:%s" % self.productVersion)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productSerialNumber = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productSerialNumber:%s" % self.productSerialNumber)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.productAssetTag = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode productAssetTag:%s" % self.productAssetTag)
+
+        templen = FruUtil.decodeLength(self.data[index])
+        self.fruFileId = self.data[index + 1: index + templen + 1]
+        index += templen + 1
+        d_print("decode fruFileId:%s" % self.fruFileId)
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if self.data[index] != chr(0xc1) and index < self.size - 1:
+                templen = FruUtil.decodeLength(self.data[index])
+                if templen == 0:
+                    break
+                tmpval = self.data[index + 1: index + templen + 1]
+                d_print("decode boardextra%d:%s" % (i, tmpval))
+                setattr(self, valtmp, tmpval)
+                index += templen + 1
+            else:
+                break
+
+    @property
+    def productVersion(self):
+        return self._productVersion
+
+    @productVersion.setter
+    def productVersion(self, name):
+        self._productVersion = name
+
+    @property
+    def areaversion(self):
+        self._areaversion = self.COMMON_HEAD_VERSION
+        return self._areaversion
+
+    @areaversion.setter
+    def areaversion(self, name):
+        self._areaversion = name
+
+    @property
+    def language(self):
+        self._language = 25
+        return self._language
+
+    @property
+    def productManufacturer(self):
+        return self._productManufacturer
+
+    @productManufacturer.setter
+    def productManufacturer(self, name):
+        self._productManufacturer = name
+
+    @property
+    def productName(self):
+        return self._productName
+
+    @productName.setter
+    def productName(self, name):
+        self._productName = name
+
+    @property
+    def productPartModelName(self):
+        return self._productPartModelName
+
+    @productPartModelName.setter
+    def productPartModelName(self, name):
+        self._productPartModelName = name
+
+    @property
+    def productSerialNumber(self):
+        return self._productSerialNumber
+
+    @productSerialNumber.setter
+    def productSerialNumber(self, name):
+        self._productSerialNumber = name
+
+    @property
+    def productAssetTag(self):
+        return self._productAssetTag
+
+    @productAssetTag.setter
+    def productAssetTag(self, name):
+        self._productAssetTag = name
+
+    @property
+    def fruFileId(self):
+        return self._FRUFileID
+
+    @fruFileId.setter
+    def fruFileId(self, name):
+        self._FRUFileID = name
+
+    def fruSetValue(self, field, value):
+        tmp_field = getattr(self, field, None)
+        if tmp_field is not None:
+            setattr(self, field, value)
+
+    def recalcute(self):
+        d_print("product version:%x" % ord(self.areaversion))
+        d_print("product length:%d" % self.size)
+        d_print("product language:%x" % self.language)
+        self.data = chr(ord(self.areaversion)) + \
+            chr(self.size // 8) + chr(self.language)
+
+        typelength = FruUtil.getTypeLength(self.productManufacturer)
+        self.data += chr(typelength)
+        self.data += self.productManufacturer
+
+        self.data += chr(FruUtil.getTypeLength(self.productName))
+        self.data += self.productName
+
+        self.data += chr(FruUtil.getTypeLength(self.productPartModelName))
+        self.data += self.productPartModelName
+
+        self.data += chr(FruUtil.getTypeLength(self.productVersion))
+        self.data += self.productVersion
+
+        self.data += chr(FruUtil.getTypeLength(self.productSerialNumber))
+        self.data += self.productSerialNumber
+
+        self.data += chr(FruUtil.getTypeLength(self.productAssetTag))
+        if self.productAssetTag is not None:
+            self.data += self.productAssetTag
+
+        self.data += chr(FruUtil.getTypeLength(self.fruFileId))
+        self.data += self.fruFileId
+
+        for i in range(1, 11):
+            valtmp = "productextra%d" % i
+            if hasattr(self, valtmp):
+                valtmpval = getattr(self, valtmp)
+                d_print("boardInfoArea productextra%d:%s" % (i, valtmpval))
+                self.data += chr(FruUtil.getTypeLength(valtmpval))
+                if valtmpval is not None:
+                    self.data += valtmpval
+            else:
+                break
+
+        self.data += chr(0xc1)
+        if len(self.data) > (self.size - 1):
+            incr = (len(self.data) - self.size) // 8 + 1
+            self.size += incr * 8
+        d_print("self.data:%d" % len(self.data))
+        d_print("self.size:%d" % self.size)
+
+        self.data = self.data[0:1] + chr(self.size // 8) + self.data[2:]
+        self.data = self.data.ljust((self.size - 1), chr(self.INITVALUE[0]))
+        checksum = FruUtil.checksum(self.data)
+        d_print("board info checksum:%x" % checksum)
+        self.data += chr(checksum)
+
+
+class MultiRecordArea(BaseArea):
+    pass
+
+
+class Field(object):
+
+    def __init__(self, fieldType="ASCII", fieldData=""):
+        self.fieldData = fieldData
+        self.fieldType = fieldType
+
+    @property
+    def fieldType(self):
+        return self.fieldType
+
+    @property
+    def fieldData(self):
+        return self.fieldData
+
+
+class ipmifru(BaseArea):
+    _BoardInfoArea = None
+    _ProductInfoArea = None
+    _InternalUseArea = None
+    _ChassisInfoArea = None
+    _multiRecordArea = None
+    _productinfoAreaOffset = BaseArea.INITVALUE
+    _boardInfoAreaOffset = BaseArea.INITVALUE
+    _internalUserAreaOffset = BaseArea.INITVALUE
+    _chassicInfoAreaOffset = BaseArea.INITVALUE
+    _multiRecordAreaOffset = BaseArea.INITVALUE
+    _bindata = None
+    _bodybin = None
+    _version = BaseArea.COMMON_HEAD_VERSION
+    _zeroCheckSum = None
+    _frusize = 256
+
+    def __str__(self):
+        tmpstr = ""
+        if self.boardInfoArea.isPresent:
+            tmpstr += "\nboardinfoarea: \n"
+            tmpstr += self.boardInfoArea.__str__()
+        if self.productInfoArea.isPresent:
+            tmpstr += "\nproductinfoarea: \n"
+            tmpstr += self.productInfoArea.__str__()
+        return tmpstr
+
+    def decodeBin(self, eeprom):
+        commonHead = eeprom[0:8]
+        d_print("decode version %x" % ord(commonHead[0]))
+        if ord(self.COMMON_HEAD_VERSION) != ord(commonHead[0]):
+            raise FruException("HEAD VERSION error,not Fru format!", -10)
+        if FruUtil.checksum(commonHead[0:7]) != ord(commonHead[7]):
+            strtemp = "check header checksum error [cal:%02x data:%02x]" % (
+                FruUtil.checksum(commonHead[0:7]), ord(commonHead[7]))
+            raise FruException(strtemp, -3)
+        if ord(commonHead[1]) != ord(self.INITVALUE):
+            d_print("Internal Use Area is present")
+            self.internalUseArea = InternalUseArea(
+                name="Internal Use Area", size=self.SUGGESTED_SIZE_INTERNAL_USE_AREA)
+            self.internalUseArea.isPresent = True
+            self.internalUserAreaOffset = ord(commonHead[1])
+            self.internalUseArea.data = eeprom[self.internalUserAreaOffset * 8: (
+                self.internalUserAreaOffset * 8 + self.internalUseArea.size)]
+        if ord(commonHead[2]) != ord(self.INITVALUE):
+            d_print("Chassis Info Area is present")
+            self.chassisInfoArea = ChassisInfoArea(
+                name="Chassis Info Area", size=self.SUGGESTED_SIZE_CHASSIS_INFO_AREA)
+            self.chassisInfoArea.isPresent = True
+            self.chassicInfoAreaOffset = ord(commonHead[2])
+            self.chassisInfoArea.data = eeprom[self.chassicInfoAreaOffset * 8: (
+                self.chassicInfoAreaOffset * 8 + self.chassisInfoArea.size)]
+        if ord(commonHead[3]) != ord(self.INITVALUE):
+            self.boardInfoArea = BoardInfoArea(
+                name="Board Info Area", size=self.SUGGESTED_SIZE_BOARD_INFO_AREA)
+            self.boardInfoArea.isPresent = True
+            self.boardInfoAreaOffset = ord(commonHead[3])
+            self.boardInfoArea.size = ord(
+                eeprom[self.boardInfoAreaOffset * 8 + 1]) * 8
+            d_print("Board Info Area is present size:%d" %
+                    (self.boardInfoArea.size))
+            self.boardInfoArea.data = eeprom[self.boardInfoAreaOffset * 8: (
+                self.boardInfoAreaOffset * 8 + self.boardInfoArea.size)]
+            if FruUtil.checksum(self.boardInfoArea.data[:-1]) != ord(self.boardInfoArea.data[-1:]):
+                strtmp = "check boardInfoArea checksum error[cal:%02x data:%02x]" %  \
+                    (FruUtil.checksum(
+                        self.boardInfoArea.data[:-1]), ord(self.boardInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.boardInfoArea.decodedata()
+        if ord(commonHead[4]) != ord(self.INITVALUE):
+            d_print("Product Info Area is present")
+            self.productInfoArea = ProductInfoArea(
+                name="Product Info Area ", size=self.SUGGESTED_SIZE_PRODUCT_INFO_AREA)
+            self.productInfoArea.isPresent = True
+            self.productinfoAreaOffset = ord(commonHead[4])
+            d_print("length offset value: %02x" %
+                    ord(eeprom[self.productinfoAreaOffset * 8 + 1]))
+            self.productInfoArea.size = ord(
+                eeprom[self.productinfoAreaOffset * 8 + 1]) * 8
+            d_print("Product Info Area is present size:%d" %
+                    (self.productInfoArea.size))
+
+            self.productInfoArea.data = eeprom[self.productinfoAreaOffset * 8: (
+                self.productinfoAreaOffset * 8 + self.productInfoArea.size)]
+            if FruUtil.checksum(self.productInfoArea.data[:-1]) != ord(self.productInfoArea.data[-1:]):
+                strtmp = "check productInfoArea checksum error [cal:%02x data:%02x]" % (
+                    FruUtil.checksum(self.productInfoArea.data[:-1]), ord(self.productInfoArea.data[-1:]))
+                raise FruException(strtmp, -3)
+            self.productInfoArea.decodedata()
+        if ord(commonHead[5]) != ord(self.INITVALUE):
+            self.multiRecordArea = MultiRecordArea(
+                name="MultiRecord record Area ")
+            d_print("MultiRecord record present")
+            self.multiRecordArea.isPresent = True
+            self.multiRecordAreaOffset = ord(commonHead[5])
+            self.multiRecordArea.data = eeprom[self.multiRecordAreaOffset * 8: (
+                self.multiRecordAreaOffset * 8 + self.multiRecordArea.size)]
+
+    def initDefault(self):
+        self.version = self.COMMON_HEAD_VERSION
+        self.internalUserAreaOffset = self.INITVALUE
+        self.chassicInfoAreaOffset = self.INITVALUE
+        self.boardInfoAreaOffset = self.INITVALUE
+        self.productinfoAreaOffset = self.INITVALUE
+        self.multiRecordAreaOffset = self.INITVALUE
+        self.zeroCheckSum = self.INITVALUE
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        self.productInfoArea = None
+        self.internalUseArea = None
+        self.boardInfoArea = None
+        self.chassisInfoArea = None
+        self.multiRecordArea = None
+        # self.recalcute()
+
+    @property
+    def version(self):
+        return self._version
+
+    @version.setter
+    def version(self, name):
+        self._version = name
+
+    @property
+    def internalUserAreaOffset(self):
+        return self._internalUserAreaOffset
+
+    @internalUserAreaOffset.setter
+    def internalUserAreaOffset(self, obj):
+        self._internalUserAreaOffset = obj
+
+    @property
+    def chassicInfoAreaOffset(self):
+        return self._chassicInfoAreaOffset
+
+    @chassicInfoAreaOffset.setter
+    def chassicInfoAreaOffset(self, obj):
+        self._chassicInfoAreaOffset = obj
+
+    @property
+    def productinfoAreaOffset(self):
+        return self._productinfoAreaOffset
+
+    @productinfoAreaOffset.setter
+    def productinfoAreaOffset(self, obj):
+        self._productinfoAreaOffset = obj
+
+    @property
+    def boardInfoAreaOffset(self):
+        return self._boardInfoAreaOffset
+
+    @boardInfoAreaOffset.setter
+    def boardInfoAreaOffset(self, obj):
+        self._boardInfoAreaOffset = obj
+
+    @property
+    def multiRecordAreaOffset(self):
+        return self._multiRecordAreaOffset
+
+    @multiRecordAreaOffset.setter
+    def multiRecordAreaOffset(self, obj):
+        self._multiRecordAreaOffset = obj
+
+    @property
+    def zeroCheckSum(self):
+        return self._zeroCheckSum
+
+    @zeroCheckSum.setter
+    def zeroCheckSum(self, obj):
+        self._zeroCheckSum = obj
+
+    @property
+    def productInfoArea(self):
+        return self._ProductInfoArea
+
+    @productInfoArea.setter
+    def productInfoArea(self, obj):
+        self._ProductInfoArea = obj
+
+    @property
+    def internalUseArea(self):
+        return self._InternalUseArea
+
+    @internalUseArea.setter
+    def internalUseArea(self, obj):
+        self.internalUseArea = obj
+
+    @property
+    def boardInfoArea(self):
+        return self._BoardInfoArea
+
+    @boardInfoArea.setter
+    def boardInfoArea(self, obj):
+        self._BoardInfoArea = obj
+
+    @property
+    def chassisInfoArea(self):
+        return self._ChassisInfoArea
+
+    @chassisInfoArea.setter
+    def chassisInfoArea(self, obj):
+        self._ChassisInfoArea = obj
+
+    @property
+    def multiRecordArea(self):
+        return self._multiRecordArea
+
+    @multiRecordArea.setter
+    def multiRecordArea(self, obj):
+        self._multiRecordArea = obj
+
+    @property
+    def bindata(self):
+        return self._bindata
+
+    @bindata.setter
+    def bindata(self, obj):
+        self._bindata = obj
+
+    @property
+    def bodybin(self):
+        return self._bodybin
+
+    @bodybin.setter
+    def bodybin(self, obj):
+        self._bodybin = obj
+
+    def recalcuteCommonHead(self):
+        self.bindata = ""
+        self.offset = self.SUGGESTED_SIZE_COMMON_HEADER
+        d_print("common Header %d" % self.offset)
+        d_print("fru eeprom size  %d" % self._frusize)
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            self.internalUserAreaOffset = self.offset // 8
+            self.offset += self.internalUseArea.size
+            d_print("internalUseArea is present offset:%d" % self.offset)
+
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            self.chassicInfoAreaOffset = self.offset // 8
+            self.offset += self.chassisInfoArea.size
+            d_print("chassisInfoArea is present offset:%d" % self.offset)
+
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            self.boardInfoAreaOffset = self.offset // 8
+            self.offset += self.boardInfoArea.size
+            d_print("boardInfoArea is present offset:%d" % self.offset)
+            d_print("boardInfoArea is present size:%d" %
+                    self.boardInfoArea.size)
+
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            self.productinfoAreaOffset = self.offset // 8
+            self.offset += self.productInfoArea.size
+            d_print("productInfoArea is present offset:%d" % self.offset)
+
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            self.multiRecordAreaOffset = self.offset // 8
+            d_print("multiRecordArea is present offset:%d" % self.offset)
+
+        if self.internalUserAreaOffset == self.INITVALUE:
+            self.internalUserAreaOffset = 0
+        if self.productinfoAreaOffset == self.INITVALUE:
+            self.productinfoAreaOffset = 0
+        if self.chassicInfoAreaOffset == self.INITVALUE:
+            self.chassicInfoAreaOffset = 0
+        if self.boardInfoAreaOffset == self.INITVALUE:
+            self.boardInfoAreaOffset = 0
+        if self.multiRecordAreaOffset == self.INITVALUE:
+            self.multiRecordAreaOffset = 0
+
+        self.zeroCheckSum = (0x100 - ord(self.version) - self.internalUserAreaOffset - self.chassicInfoAreaOffset - self.productinfoAreaOffset
+                             - self.boardInfoAreaOffset - self.multiRecordAreaOffset) & 0xff
+        d_print("zerochecksum:%x" % self.zeroCheckSum)
+        self.data = ""
+        self.data += chr(self.version[0]) + chr(self.internalUserAreaOffset) + chr(self.chassicInfoAreaOffset) + chr(
+            self.boardInfoAreaOffset) + chr(self.productinfoAreaOffset) + chr(self.multiRecordAreaOffset) + chr(self.INITVALUE[0]) + chr(self.zeroCheckSum)
+
+        self.bindata = self.data + self.bodybin
+        totallen = len(self.bindata)
+        d_print("totallen %d" % totallen)
+        if totallen < self._frusize:
+            self.bindata = self.bindata.ljust(self._frusize, chr(self.INITVALUE[0]))
+        else:
+            raise FruException('bin data more than %d' % self._frusize, -2)
+
+    def recalcutebin(self):
+        self.bodybin = ""
+        if self.internalUseArea is not None and self.internalUseArea.isPresent:
+            d_print("internalUseArea present")
+            self.bodybin += self.internalUseArea.data
+        if self.chassisInfoArea is not None and self.chassisInfoArea.isPresent:
+            d_print("chassisInfoArea present")
+            self.bodybin += self.chassisInfoArea.data
+        if self.boardInfoArea is not None and self.boardInfoArea.isPresent:
+            d_print("boardInfoArea present")
+            self.boardInfoArea.recalcute()
+            self.bodybin += self.boardInfoArea.data
+        if self.productInfoArea is not None and self.productInfoArea.isPresent:
+            d_print("productInfoAreapresent")
+            self.productInfoArea.recalcute()
+            self.bodybin += self.productInfoArea.data
+        if self.multiRecordArea is not None and self.multiRecordArea.isPresent:
+            d_print("multiRecordArea present")
+            self.bodybin += self.productInfoArea.data
+
+    def recalcute(self, fru_eeprom_size=256):
+        self._frusize = fru_eeprom_size
+        self.recalcutebin()
+        self.recalcuteCommonHead()
+
+    def setValue(self, area, field, value):
+        tmp_area = getattr(self, area, None)
+        if tmp_area is not None:
+            tmp_area.fruSetValue(field, value)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/onietlv.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/onietlv.py
new file mode 100644
index 000000000000..a90f8f8453c8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/onietlv.py
@@ -0,0 +1,441 @@
+#!/usr/bin/python3
+import binascii
+
+
+class OnietlvException(Exception):
+    def __init__(self, message='onietlverror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+
+class onie_tlv(object):
+    TLV_INFO_ID_STRING = "TlvInfo\x00"
+    TLV_INFO_INIA_ID = "\x00\x00\x13\x11"
+    TLV_INFO_VERSION = 0x01
+    TLV_INFO_LENGTH = 0x00
+    TLV_INFO_LENGTH_VALUE = 0xba
+
+    TLV_CODE_PRODUCT_NAME = 0x21
+    TLV_CODE_PART_NUMBER = 0x22
+    TLV_CODE_SERIAL_NUMBER = 0x23
+    TLV_CODE_MAC_BASE = 0x24
+    TLV_CODE_MANUF_DATE = 0x25
+    TLV_CODE_DEVICE_VERSION = 0x26
+    TLV_CODE_LABEL_REVISION = 0x27
+    TLV_CODE_PLATFORM_NAME = 0x28
+    TLV_CODE_ONIE_VERSION = 0x29
+    TLV_CODE_MAC_SIZE = 0x2A
+    TLV_CODE_MANUF_NAME = 0x2B
+    TLV_CODE_MANUF_COUNTRY = 0x2C
+    TLV_CODE_VENDOR_NAME = 0x2D
+    TLV_CODE_DIAG_VERSION = 0x2E
+    TLV_CODE_SERVICE_TAG = 0x2F
+    TLV_CODE_VENDOR_EXT = 0xFD
+    TLV_CODE_CRC_32 = 0xFE
+    _TLV_DISPLAY_VENDOR_EXT = 1
+    TLV_CODE_WB_CARID = 0x01
+    _TLV_INFO_HDR_LEN = 11
+    TLV_CODE_PRODUCT_ID = 0x40
+    TLV_CODE_HW_VERSION = 0x41
+    TLV_CODE_MAIN_FILENAME = 0x42
+    TLV_CODE_DTS_FINENAME = 0x43
+    TLV_CODE_SY_SERIAL0 = 0x44
+    TLV_CODE_SY_SERIAL1 = 0x45
+    TLV_CODE_SY_SERIAL2 = 0x46
+    TLV_CODE_SY_SERIAL3 = 0x47
+    TLV_CODE_PROJECT_ID = 0x48
+    TLV_CODE_SETMAC_VERSION = 0x49
+    TLV_CODE_EEPROM_TYPE = 0x4A
+
+    @property
+    def dstatus(self):
+        return self._dstatus
+
+    @property
+    def cardid(self):
+        return self._cardid
+
+    @property
+    def productname(self):
+        return self._productname
+
+    @property
+    def partnum(self):
+        return self._partnum
+
+    @property
+    def serialnum(self):
+        return self._serialnum
+
+    @property
+    def macbase(self):
+        return self._macbase
+
+    @property
+    def manufdate(self):
+        return self._manufdate
+
+    @property
+    def deviceversion(self):
+        return self._deviceversion
+
+    @property
+    def labelrevision(self):
+        return self._labelrevision
+
+    @property
+    def platformname(self):
+        return self._platformname
+
+    @property
+    def onieversion(self):
+        return self._onieversion
+
+    @property
+    def macsize(self):
+        return self._macsize
+
+    @property
+    def manufname(self):
+        return self._manufname
+
+    @property
+    def manufcountry(self):
+        return self._manufcountry
+
+    @property
+    def vendorname(self):
+        return self._vendorname
+
+    @property
+    def diagname(self):
+        return self._diagname
+
+    @property
+    def servicetag(self):
+        return self._servicetag
+
+    @property
+    def vendorext(self):
+        return self._vendorext
+
+    def __init__(self):
+        self._cardid = ""
+        self._productname = ""
+        self._partnum = ""
+        self._serialnum = ""
+        self._macbase = ""
+        self._manufdate = ""
+        self._deviceversion = ""
+        self._labelrevision = ""
+        self._platformname = ""
+        self._onieversion = ""
+        self._macsize = ""
+        self._manufname = ""
+        self._manufcountry = ""
+        self._vendorname = ""
+        self._diagname = ""
+        self._servicetag = ""
+        self._vendorext = ""
+        self._productid = ""
+        self._hwversion = ""
+        self._mainfilename = ""
+        self._dtsfilename = ""
+        self._syserial0 = ""
+        self._syserial1 = ""
+        self._syserial2 = ""
+        self._syserial3 = ""
+        self._projectid = ""
+        self._setmacversion = ""
+        self._eepromtype = ""
+        self._crc32 = ""
+        self._dstatus = 0
+
+    def oniecrc32(self, v):
+        data_array = bytearray()
+        for x in v:
+            data_array.append(ord(x))
+        return '0x%08x' % (binascii.crc32(bytes(data_array)) & 0xffffffff)
+
+    def getTLV_BODY(self, tlv_type, value):
+        x = []
+        temp_t = ""
+        if tlv_type == self.TLV_CODE_MAC_BASE:
+            arr = value.split(':')
+            for tt in arr:
+                temp_t += chr(int(tt, 16))
+        elif tlv_type == self.TLV_CODE_DEVICE_VERSION:
+            temp_t = chr(value)
+        elif tlv_type == self.TLV_CODE_MAC_SIZE:
+            temp_t = chr(value >> 8) + chr(value & 0x00ff)
+        else:
+            temp_t = value
+        x.append(chr(tlv_type))
+        x.append(chr(len(temp_t)))
+        for i in temp_t:
+            x.append(i)
+        return x
+
+    def generate_ext(self, cardid):
+        s = "%08x" % cardid
+        ret = ""
+        for t in range(0, 4):
+            ret += chr(int(s[2 * t:2 * t + 2], 16))
+        ret = chr(0x01) + chr(len(ret)) + ret
+        return ret
+
+    def generate_value(self, _t):
+        ret = []
+        for i in self.TLV_INFO_ID_STRING:
+            ret.append(i)
+        ret.append(chr(self.TLV_INFO_VERSION))
+        ret.append(chr(self.TLV_INFO_LENGTH))
+        ret.append(chr(self.TLV_INFO_LENGTH_VALUE))
+
+        total_len = 0
+        for key in _t:
+            x = self.getTLV_BODY(key, _t[key])
+            ret += x
+            total_len += len(x)
+        ret[10] = chr(total_len + 6)
+
+        ret.append(chr(0xFE))
+        ret.append(chr(0x04))
+        s = self.oniecrc32(''.join(ret))
+        for t in range(0, 4):
+            ret.append(chr(int(s[2 * t + 2:2 * t + 4], 16)))
+        totallen = len(ret)
+        if totallen < 256:
+            for left_t in range(0, 256 - totallen):
+                ret.append(chr(0x00))
+        return (ret, True)
+
+    def decode_tlv(self, e):
+        tlv_index = 0
+        tlv_end = len(e)
+        ret = []
+        while tlv_index < tlv_end and (tlv_index + 2 + ord(e[tlv_index + 1])) <= len(e):
+            rt = self.decoder(e[tlv_index:tlv_index + 2 + ord(e[tlv_index + 1])])
+            ret.append(rt)
+            if ord(e[tlv_index]) == self.TLV_CODE_CRC_32:
+                break
+            tlv_index += ord(e[tlv_index + 1]) + 2
+        return ret
+
+    def decode(self, e):
+        if e[0:8] != self.TLV_INFO_ID_STRING:
+            raise OnietlvException("ONIE tlv head info error,not onie tlv type", -1)
+        total_len = (ord(e[9]) << 8) | ord(e[10])
+        tlv_index = self._TLV_INFO_HDR_LEN
+        tlv_end = self._TLV_INFO_HDR_LEN + total_len
+        if tlv_end > len(e):
+            raise OnietlvException("ONIE tlv length error", -2)
+        ret = []
+        ret = self.decode_tlv(e[tlv_index:tlv_end])
+        for item in ret:
+            if item['code'] == self.TLV_CODE_VENDOR_EXT:
+                if item["value"][0:4] == self.TLV_INFO_INIA_ID:
+                    rt = self.decode_tlv(item["value"][4:])
+                else:
+                    rt = self.decode_tlv(item["value"][0:])
+                ret.extend(rt)
+        return ret
+
+    def decoder(self, t):
+        if ord(t[0]) == self.TLV_CODE_PRODUCT_NAME:
+            name = "Product Name"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._productname = value
+        elif ord(t[0]) == self.TLV_CODE_PART_NUMBER:
+            name = "Part Number"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._partnum = value
+        elif ord(t[0]) == self.TLV_CODE_SERIAL_NUMBER:
+            name = "Serial Number"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._serialnum = value
+        elif ord(t[0]) == self.TLV_CODE_MAC_BASE:
+            name = "Base MAC Address"
+            _len = ord(t[1])
+            value = ":".join(['%02X' % ord(T) for T in t[2:8]]).upper()
+            self._macbase = value
+        elif ord(t[0]) == self.TLV_CODE_MANUF_DATE:
+            name = "Manufacture Date"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._manufdate = value
+        elif ord(t[0]) == self.TLV_CODE_DEVICE_VERSION:
+            name = "Device Version"
+            _len = ord(t[1])
+            value = ord(t[2])
+            self._deviceversion = value
+        elif ord(t[0]) == self.TLV_CODE_LABEL_REVISION:
+            name = "Label Revision"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._labelrevision = value
+        elif ord(t[0]) == self.TLV_CODE_PLATFORM_NAME:
+            name = "Platform Name"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._platformname = value
+        elif ord(t[0]) == self.TLV_CODE_ONIE_VERSION:
+            name = "ONIE Version"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._onieversion = value
+        elif ord(t[0]) == self.TLV_CODE_MAC_SIZE:
+            name = "MAC Addresses"
+            _len = ord(t[1])
+            value = str((ord(t[2]) << 8) | ord(t[3]))
+            self._macsize = value
+        elif ord(t[0]) == self.TLV_CODE_MANUF_NAME:
+            name = "Manufacturer"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._manufname = value
+        elif ord(t[0]) == self.TLV_CODE_MANUF_COUNTRY:
+            name = "Manufacture Country"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._manufcountry = value
+        elif ord(t[0]) == self.TLV_CODE_VENDOR_NAME:
+            name = "Vendor Name"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._vendorname = value
+        elif ord(t[0]) == self.TLV_CODE_DIAG_VERSION:
+            name = "Diag Version"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._diagname = value
+        elif ord(t[0]) == self.TLV_CODE_SERVICE_TAG:
+            name = "Service Tag"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._servicetag = value
+        elif ord(t[0]) == self.TLV_CODE_VENDOR_EXT:
+            name = "Vendor Extension"
+            _len = ord(t[1])
+            value = ""
+            if self._TLV_DISPLAY_VENDOR_EXT:
+                value = t[2:2 + ord(t[1])]
+            self._vendorext = value
+        elif ord(t[0]) == self.TLV_CODE_CRC_32 and len(t) == 6:
+            name = "CRC-32"
+            _len = ord(t[1])
+            value = "0x%08X" % (((ord(t[2]) << 24) | (
+                ord(t[3]) << 16) | (ord(t[4]) << 8) | ord(t[5])),)
+            self._crc32 = value
+        elif ord(t[0]) == self.TLV_CODE_WB_CARID:
+            name = "Card id"
+            _len = ord(t[1])
+            value = ""
+            for c in t[2:2 + ord(t[1])]:
+                value += "%02X" % (ord(c),)
+            self._cardid = value
+        elif ord(t[0]) == self.TLV_CODE_PRODUCT_ID:
+            name = "Product id"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._productid = value
+        elif ord(t[0]) == self.TLV_CODE_HW_VERSION:
+            name = "Hardware Version"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._hwversion = value
+        elif ord(t[0]) == self.TLV_CODE_MAIN_FILENAME:
+            name = "Main File Name"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._mainfilename = value
+        elif ord(t[0]) == self.TLV_CODE_DTS_FINENAME:
+            name = "DTS File Name"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._dtsfilename = value
+        elif ord(t[0]) == self.TLV_CODE_SY_SERIAL0:
+            name = "SY Serial 0"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._syserial0 = value
+        elif ord(t[0]) == self.TLV_CODE_SY_SERIAL1:
+            name = "SY Serial 1"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._syserial1 = value
+        elif ord(t[0]) == self.TLV_CODE_SY_SERIAL2:
+            name = "SY Serial 2"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._syserial2 = value
+        elif ord(t[0]) == self.TLV_CODE_SY_SERIAL3:
+            name = "SY Serial 3"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._syserial3 = value
+        elif ord(t[0]) == self.TLV_CODE_PROJECT_ID:
+            name = "Project id"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._projectid = value
+        elif ord(t[0]) == self.TLV_CODE_SETMAC_VERSION:
+            name = "Setmac Version"
+            _len = ord(t[1])
+            value = t[2:2 + ord(t[1])]
+            self._setmacversion = value
+        elif ord(t[0]) == self.TLV_CODE_EEPROM_TYPE:
+            name = "EEPROM Type"
+            _len = ord(t[1])
+            value = ""
+            for c in t[2:2 + ord(t[1])]:
+                value += "%02X" % (ord(c),)
+            self._eepromtype = value
+        else:
+            name = "Unknown"
+            _len = ord(t[1])
+            value = ""
+            for c in t[2:2 + ord(t[1])]:
+                value += "0x%02X " % (ord(c),)
+        return {"name": name, "code": ord(t[0]), "value": value, "lens": _len}
+
+    def __str__(self):
+        formatstr = "Card id              : %s      \n" \
+                    "Product Name         : %s      \n" \
+                    "Part Number          : %s      \n" \
+                    "Serial Number        : %s      \n" \
+                    "Base MAC Address     : %s      \n" \
+                    "Manufacture Date     : %s      \n" \
+                    "Device Version       : %s      \n" \
+                    "Label Revision       : %s      \n" \
+                    "Platform Name        : %s      \n" \
+                    "ONIE Version         : %s      \n" \
+                    "MAC Addresses        : %s      \n" \
+                    "Manufacturer         : %s      \n" \
+                    "Manufacture Country  : %s      \n" \
+                    "Vendor Name          : %s      \n" \
+                    "Diag Version         : %s      \n" \
+                    "Service Tag          : %s      \n" \
+                    "CRC-32               : %s      \n"
+        return formatstr % (self._cardid,
+                            self._productname,
+                            self._partnum,
+                            self._serialnum,
+                            self._macbase,
+                            self._manufdate,
+                            self._deviceversion,
+                            self._labelrevision,
+                            self._platformname,
+                            self._onieversion,
+                            self._macsize,
+                            self._manufname,
+                            self._manufcountry,
+                            self._vendorname,
+                            self._diagname,
+                            self._servicetag,
+                            self._crc32)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/__init__.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/__init__.py
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/baseutil.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/baseutil.py
new file mode 100644
index 000000000000..5260107c91be
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/baseutil.py
@@ -0,0 +1,164 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# baseutil.py
+# Python implementation of the Class baseutil
+#
+#######################################################
+import importlib.machinery
+import os
+import syslog
+import json
+from plat_hal.osutil import osutil
+
+SYSLOG_IDENTIFIER = "HAL"
+
+CONFIG_DB_PATH = "/etc/sonic/config_db.json"
+BOARD_ID_PATH = "/sys/module/platform_common/parameters/dfd_my_type"
+BOARD_AIRFLOW_PATH = "/etc/sonic/.airflow"
+
+
+def getonieplatform(path):
+    if not os.path.isfile(path):
+        return ""
+    machine_vars = {}
+    with open(path) as machine_file:
+        for line in machine_file:
+            tokens = line.split('=')
+            if len(tokens) < 2:
+                continue
+            machine_vars[tokens[0]] = tokens[1].strip()
+    return machine_vars.get("onie_platform")
+
+
+def getboardid():
+    if not os.path.exists(BOARD_ID_PATH):
+        return "NA"
+    with open(BOARD_ID_PATH) as fd:
+        id_str = fd.read().strip()
+    return "0x%x" % (int(id_str, 10))
+
+
+def getboardairflow():
+    if not os.path.exists(BOARD_AIRFLOW_PATH):
+        return "NA"
+    with open(BOARD_AIRFLOW_PATH) as fd:
+        airflow_str = fd.read().strip()
+    data = json.loads(airflow_str)
+    airflow = data.get("board", "NA")
+    return airflow
+
+
+def getplatform_config_db():
+    if not os.path.isfile(CONFIG_DB_PATH):
+        return ""
+    val = os.popen("sonic-cfggen -j %s -v DEVICE_METADATA.localhost.platform" % CONFIG_DB_PATH).read().strip()
+    if len(val) <= 0:
+        return ""
+    return val
+
+
+def getplatform_name():
+    if os.path.isfile('/host/machine.conf'):
+        return getonieplatform('/host/machine.conf')
+    if os.path.isfile('/etc/sonic/machine.conf'):
+        return getonieplatform('/etc/sonic/machine.conf')
+    return getplatform_config_db()
+
+
+platform = (getplatform_name()).replace("-", "_")
+boardid = getboardid()
+boardairflow = getboardairflow()
+
+
+CONFIG_FILE_PATH_LIST = [
+    "/usr/local/bin/",
+    "/usr/lib/python3/dist-packages/",
+    "/usr/local/lib/python3.7/dist-packages/hal-config/",
+    "/usr/local/lib/python3.9/dist-packages/hal-config/"
+]
+
+
+DEVICE_CONFIG_FILE_LIST = [
+    platform + "_" + boardid + "_" + boardairflow + "_device.py",
+    platform + "_" + boardid + "_device.py",
+    platform + "_" + boardairflow + "_device.py",
+    platform + "_device.py"
+]
+
+
+MONITOR_CONFIG_FILE_LIST = [
+    platform + "_" + boardid + "_" + boardairflow + "_monitor.py",
+    platform + "_" + boardid + "_monitor.py",
+    platform + "_" + boardairflow + "_monitor.py",
+    platform + "_monitor.py"
+]
+
+
+class baseutil:
+
+    CONFIG_NAME = 'devices'
+    MONITOR_CONFIG_NAME = 'monitor'
+    UBOOT_ENV_URL = '/etc/device/uboot_env'
+
+    @staticmethod
+    def get_config():
+        real_path = None
+        for configfile_path in CONFIG_FILE_PATH_LIST:
+            for config_file in DEVICE_CONFIG_FILE_LIST:
+                file = configfile_path + config_file
+                if os.path.exists(file):
+                    real_path = file
+                    break
+            if real_path is not None:
+                break
+
+        if real_path is None:
+            raise Exception("get hal device config error")
+        devices = importlib.machinery.SourceFileLoader(baseutil.CONFIG_NAME, real_path).load_module()
+        return devices.devices
+
+    @staticmethod
+    def get_monitor_config():
+        real_path = None
+        for configfile_path in CONFIG_FILE_PATH_LIST:
+            for config_file in MONITOR_CONFIG_FILE_LIST:
+                file = configfile_path + config_file
+                if os.path.exists(file):
+                    real_path = file
+                    break
+            if real_path is not None:
+                break
+
+        if real_path is None:
+            raise Exception("get hal monitor config error")
+        monitor = importlib.machinery.SourceFileLoader(baseutil.MONITOR_CONFIG_NAME, real_path).load_module()
+        return monitor.monitor
+
+    @staticmethod
+    def get_productname():
+        ret, val = osutil.command("cat %s |grep productname | awk -F\"=\" '{print $2;}'" % baseutil.UBOOT_ENV_URL)
+        tmp = val.lower().replace('-', '_')
+        if ret != 0 or len(val) <= 0:
+            raise Exception("get productname error")
+        return tmp
+
+    @staticmethod
+    def get_platform():
+        ret, val = osutil.command("cat %s |grep conffitname | awk -F\"=\" '{print $2;}'" % baseutil.UBOOT_ENV_URL)
+        if ret != 0 or len(val) <= 0:
+            raise Exception("get platform error")
+        return val
+
+    @staticmethod
+    def get_product_fullname():
+        ret, val = osutil.command("cat %s |grep productname | awk -F\"=\" '{print $2;}'" % baseutil.UBOOT_ENV_URL)
+        if ret != 0 or len(val) <= 0:
+            raise Exception("get productname error")
+        return val
+
+    @staticmethod
+    def logger_debug(msg):
+        syslog.openlog(SYSLOG_IDENTIFIER)
+        syslog.syslog(syslog.LOG_DEBUG, msg)
+        syslog.closelog()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/chassisbase.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/chassisbase.py
new file mode 100644
index 000000000000..767d6da34ba9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/chassisbase.py
@@ -0,0 +1,318 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# chassisbase.py
+# Python implementation of the Class chassisbase
+#
+#######################################################
+from plat_hal.dcdc import dcdc
+from plat_hal.onie_e2 import onie_e2
+from plat_hal.psu import psu
+from plat_hal.led import led
+from plat_hal.temp import temp
+from plat_hal.fan import fan
+from plat_hal.cpld import cpld
+from plat_hal.component import component
+from plat_hal.cpu import cpu
+from plat_hal.baseutil import baseutil
+
+
+class chassisbase(object):
+    __onie_e2_list = []
+    __psu_list = []
+    __led_list = []
+    __temp_list = []
+    __fan_list = []
+    __card_list = []
+    __sensor_list = []
+    __dcdc_list = []
+    __cpld_list = []
+    __comp_list = []
+    __bios_list = []
+    __bmc_list = []
+    __cpu = None
+
+    def __init__(self, conftype=0, conf=None):
+        # type: (object, object, object) -> object
+        """
+        init chassisbase as order
+
+        type  = 0  use default conf, maybe auto find by platform
+        type  = 1  use given conf,  conf is not None
+
+        BITMAP
+              bit 16
+                      bit 0    PSU
+                      bit 1    LED
+                      bit 2    TEMP
+                      bit 3    fan
+                      bit 4    card
+                      bit 5    sensor
+        """
+        __confTemp = None
+
+        if conftype == 0:
+            # user
+            __confTemp = baseutil.get_config()
+        elif conftype == 1:
+            __confTemp = conf
+
+        # onie_e2
+        onie_e2temp = []
+        onie_e2config = __confTemp.get('onie_e2', [])
+        for item in onie_e2config:
+            onie_e2_1 = onie_e2(item)
+            onie_e2temp.append(onie_e2_1)
+        self.onie_e2_list = onie_e2temp
+
+        # psu
+        psutemp = []
+        psuconfig = __confTemp.get('psus', [])
+        for item in psuconfig:
+            psu1 = psu(item)
+            psutemp.append(psu1)
+        self.psu_list = psutemp
+
+        # led
+        ledtemp = []
+        ledconfig = __confTemp.get('leds', [])
+        for item in ledconfig:
+            led1 = led(item)
+            ledtemp.append(led1)
+        self.led_list = ledtemp
+
+        # temp
+        temptemp = []
+        tempconfig = __confTemp.get('temps', [])
+        for item in tempconfig:
+            temp1 = temp(item)
+            temptemp.append(temp1)
+        self.temp_list = temptemp
+
+        # fan
+        fantemp = []
+        fanconfig = __confTemp.get('fans', [])
+        for item in fanconfig:
+            fan1 = fan(item)
+            fantemp.append(fan1)
+        self.fan_list = fantemp
+
+        # dcdc
+        dcdctemp = []
+        dcdcconfig = __confTemp.get('dcdc', [])
+        for item in dcdcconfig:
+            dcdc1 = dcdc(item)
+            dcdctemp.append(dcdc1)
+        self.dcdc_list = dcdctemp
+
+        # cpld
+        cpldtemp = []
+        cpldconfig = __confTemp.get('cplds', [])
+        for item in cpldconfig:
+            cpld1 = cpld(item)
+            cpldtemp.append(cpld1)
+        self.cpld_list = cpldtemp
+
+        # compoment: cpld/fpga/bios
+        comptemp = []
+        compconfig = __confTemp.get('comp_cpld', [])
+        for item in compconfig:
+            comp1 = component(item)
+            comptemp.append(comp1)
+        self.comp_list = comptemp
+
+        compconfig = __confTemp.get('comp_fpga', [])
+        for item in compconfig:
+            comp1 = component(item)
+            self.comp_list.append(comp1)
+
+        compconfig = __confTemp.get('comp_bios', [])
+        for item in compconfig:
+            comp1 = component(item)
+            self.comp_list.append(comp1)
+
+        # cpu
+        cpuconfig = __confTemp.get('cpu', [])
+        if len(cpuconfig):
+            self.cpu = cpu(cpuconfig[0])
+
+    # dcdc
+    @property
+    def dcdc_list(self):
+        return self.__dcdc_list
+
+    @dcdc_list.setter
+    def dcdc_list(self, val):
+        self.__dcdc_list = val
+
+    # sensor
+    @property
+    def sensor_list(self):
+        return self.__sensor_list
+
+    @sensor_list.setter
+    def sensor_list(self, val):
+        self.__sensor_list = val
+
+    def get_sensor_byname(self, name):
+        tmp = self.sensor_list
+        for item in tmp:
+            if name == item.name:
+                return item
+        return None
+
+    # onie_e2
+    @property
+    def onie_e2_list(self):
+        return self.__onie_e2_list
+
+    @onie_e2_list.setter
+    def onie_e2_list(self, val):
+        self.__onie_e2_list = val
+
+    def get_onie_e2_byname(self, name):
+        tmp = self.onie_e2_list
+        for item in tmp:
+            if name == item.name:
+                return item
+        return None
+
+    # psu
+    @property
+    def psu_list(self):
+        return self.__psu_list
+
+    @psu_list.setter
+    def psu_list(self, val):
+        self.__psu_list = val
+
+    def get_psu_byname(self, name):
+        tmp = self.psu_list
+        for item in tmp:
+            if name == item.name:
+                return item
+        return None
+
+    # fan
+    @property
+    def fan_list(self):
+        return self.__fan_list
+
+    @fan_list.setter
+    def fan_list(self, val):
+        self.__fan_list = val
+
+    def get_fan_byname(self, name):
+        tmp = self.fan_list
+        for item in tmp:
+            if name == item.name:
+                return item
+        return None
+
+    # led
+
+    @property
+    def led_list(self):
+        return self.__led_list
+
+    @led_list.setter
+    def led_list(self, val):
+        self.__led_list = val
+
+    def get_led_byname(self, name):
+        tmp = self.led_list
+        for item in tmp:
+            if name == item.name:
+                return item
+        return None
+
+    # temp
+    @property
+    def temp_list(self):
+        return self.__temp_list
+
+    @temp_list.setter
+    def temp_list(self, val):
+        self.__temp_list = val
+
+    def get_temp_byname(self, name):
+        tmp = self.temp_list
+        for item in tmp:
+            if name == item.name:
+                return item
+        return None
+
+    # cpld
+    @property
+    def cpld_list(self):
+        return self.__cpld_list
+
+    @cpld_list.setter
+    def cpld_list(self, val):
+        self.__cpld_list = val
+
+    def get_cpld_byname(self, name):
+        tmp = self.cpld_list
+        for item in tmp:
+            if name == item.name:
+                return item
+        return None
+
+    @property
+    def comp_list(self):
+        return self.__comp_list
+
+    @comp_list.setter
+    def comp_list(self, val):
+        self.__comp_list = val
+
+    def get_comp_byname(self, name):
+        tmp = self.comp_list
+        for item in tmp:
+            if name == item.name:
+                return item
+        return None
+
+    # bios
+    @property
+    def bios_list(self):
+        return self.__bios_list
+
+    @bios_list.setter
+    def bios_list(self, val):
+        self.__bios_list = val
+
+    def get_bios_byname(self, name):
+        tmp = self.bios_list
+        for item in tmp:
+            if name == item.name:
+                return item
+        return None
+
+    # bmc
+    @property
+    def bmc_list(self):
+        return self.__bmc_list
+
+    @bmc_list.setter
+    def bmc_list(self, val):
+        self.__bmc_list = val
+
+    def get_bmc_byname(self, name):
+        tmp = self.bmc_list
+        for item in tmp:
+            if name == item.name:
+                return item
+        return None
+
+    # cpu
+    @property
+    def cpu(self):
+        return self.__cpu
+
+    @cpu.setter
+    def cpu(self, val):
+        self.__cpu = val
+
+    def get_cpu_byname(self, name):
+        return self.cpu
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/component.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/component.py
new file mode 100644
index 000000000000..0f2ad2167485
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/component.py
@@ -0,0 +1,33 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# component.py
+# Python implementation of the Class fan
+#
+#######################################################
+from plat_hal.devicebase import devicebase
+from plat_hal.osutil import osutil
+
+
+class component(devicebase):
+    __user_reg = None
+
+    def __init__(self, conf=None):
+        if conf is not None:
+            self.name = conf.get('name', None)
+            self.version_file = conf.get('VersionFile', None)
+            self.comp_id = conf.get("comp_id", None)
+            self.desc = conf.get("desc", None)
+            self.slot = conf.get("slot", None)
+
+    def get_version(self):
+        version = "NA"
+        try:
+            ret, version = self.get_value(self.version_file)
+            if ret is False:
+                return version
+            pattern = self.version_file.get('pattern', None)
+            version = osutil.std_match(version, pattern)
+        except Exception:
+            return version
+        return version
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpld.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpld.py
new file mode 100644
index 000000000000..09eed5f975ee
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpld.py
@@ -0,0 +1,66 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# fan.py
+# Python implementation of the Class fan
+#
+#######################################################
+from plat_hal.devicebase import devicebase
+
+
+class cpld(devicebase):
+    __user_reg = None
+
+    def __init__(self, conf=None):
+        if conf is not None:
+            self.name = conf.get('name', None)
+            self.user_reg = conf.get('UserReg', None)
+            self.console_reg = conf.get('ConsoleReg', None)
+            self.console_reg_attrs = conf.get('ConsoleRegAttrs', None)
+            self.version_file = conf.get('VersionFile', None)
+            self.cpld_id = conf.get("cpld_id", None)
+            self.desc = conf.get("desc", None)
+            self.slot = conf.get("slot", None)
+            self.format = conf.get("format", "big_endian")
+            self.warm = conf.get("warm", None)
+            self.type = conf.get("type", None)
+
+    def get_user_reg(self):
+        if self.user_reg is None:
+            return False
+        ret, val = self.get_value(self.user_reg)
+        return val
+
+    def set_user_reg(self, value):
+        if self.user_reg is None:
+            return False
+        byte = value & 0xFF
+        ret, val = self.set_value(self.user_reg, byte)
+        return ret
+
+    def set_console_owner(self, owner):
+        ret = False
+
+        if self.console_reg is None:
+            return False
+        tmpattr = self.console_reg_attrs.get(owner, None)
+        if tmpattr is not None:
+            ret, val = self.set_value(self.console_reg, tmpattr)
+        return ret
+
+    def get_version(self):
+        ret, val = self.get_value(self.version_file)
+        if ret is False:
+            val = "N/A"
+            return val
+        if self.type == "str":
+            return val.strip('\n')
+        val = val.strip('\n').split(" ")
+        if len(val) < 4:
+            val = "N/A"
+            return val
+        if self.format == "little_endian":
+            cpld_version = "%s%s%s%s" % (val[3], val[2], val[1], val[0])
+        else:
+            cpld_version = "%s%s%s%s" % (val[0], val[1], val[2], val[3])
+        return cpld_version
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpu.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpu.py
new file mode 100644
index 000000000000..c6bec1abd1c2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/cpu.py
@@ -0,0 +1,48 @@
+#!/usr/bin/env python3
+###############################################################################
+#
+# Hardware Abstraction Layer APIs -- CPU APIs.
+#
+###############################################################################
+from plat_hal.devicebase import devicebase
+
+
+class cpu(devicebase):
+
+    def __init__(self, conf=None):
+        if conf is not None:
+            self.name = conf.get('name', None)
+            self.cpu_reset_cnt_reg = conf.get('CpuResetCntReg', None)
+            self.reboot_cause_path = conf.get('reboot_cause_path', "/etc/sonic/.reboot/.previous-reboot-cause.txt")
+
+    def get_cpu_reset_num(self):
+        """
+        get cpu reset num.
+        @return cpu reset number, -1 for failure
+        """
+        ret = -1
+        if self.cpu_reset_cnt_reg is None:
+            self.logger_debug("ERR: no support get cpu reset num")
+            return ret
+        ret, reset_num = self.get_value(self.cpu_reset_cnt_reg)
+        if ret is False or reset_num is None:
+            self.logger_debug("ERR: i2c read cpu_reset_cnt_reg,result:%s" % reset_num)
+        else:
+            if isinstance(reset_num, str):
+                ret = int(reset_num, 16)
+            else:
+                ret = reset_num
+        return ret
+
+    def get_cpu_reboot_cause(self):
+        """
+        get_cpu_reboot_cause
+        @return cpu reset number, -1 for failure
+        """
+        try:
+            with open(self.reboot_cause_path) as fd:
+                reboot_cause = fd.read().strip()
+            return reboot_cause
+        except Exception:
+            return "Unknown reboot cause"
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/dcdc.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/dcdc.py
new file mode 100644
index 000000000000..ba604995043d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/dcdc.py
@@ -0,0 +1,11 @@
+#!/usr/bin/env python3
+from plat_hal.devicebase import devicebase
+from plat_hal.sensor import sensor
+
+
+class dcdc(devicebase):
+    def __init__(self, conf=None):
+        if conf is not None:
+            self.name = conf.get('name', None)
+            self.dcdc_id = conf.get("dcdc_id", None)
+            self.sensor = sensor(conf)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/devicebase.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/devicebase.py
new file mode 100644
index 000000000000..2b8f85c663db
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/devicebase.py
@@ -0,0 +1,348 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# devicebase.py
+# Python implementation of the Class devicebase
+#
+#######################################################
+import subprocess
+import shlex
+import ast
+from plat_hal.osutil import osutil
+from plat_hal.baseutil import baseutil
+
+class CodeVisitor(ast.NodeVisitor):
+
+    def __init__(self):
+        self.value = None
+
+    def get_value(self):
+        return self.value
+
+    def get_op_value(self, node):
+        if isinstance(node, ast.Call):       # node is func call
+            value = self.visit_Call(node)
+        elif isinstance(node, ast.BinOp):    # node is BinOp
+            value = self.visit_BinOp(node)
+        elif isinstance(node, ast.UnaryOp):  # node is UnaryOp
+            value = self.visit_UnaryOp(node)
+        elif isinstance(node, ast.Num):      # node is Num Constant
+            value = node.n
+        elif isinstance(node, ast.Str):      # node is Str Constant
+            value = node.s
+        else:
+            raise NotImplementedError("Unsupport operand type: %s" % type(node))
+        return value
+
+    def visit_UnaryOp(self, node):
+        '''
+        node.op: operand type, only support ast.UAdd/ast.USub
+        node.operand: only support ast.Call/ast.Constant(ast.Num/ast.Str)/ast.BinOp/ast.UnaryOp
+        '''
+
+        operand_value = self.get_op_value(node.operand)
+        if isinstance(node.op, ast.UAdd):
+            self.value = operand_value
+        elif isinstance(node.op, ast.USub):
+            self.value = 0 - operand_value
+        else:
+            raise NotImplementedError("Unsupport arithmetic methods %s" % type(node.op))
+        return self.value
+
+    def visit_BinOp(self, node):
+        '''
+        node.left: left operand,  only support ast.Call/ast.Constant(ast.Num)/ast.BinOp
+        node.op: operand type, only support ast.Add/ast.Sub/ast.Mult/ast.Div
+        node.right: right operan, only support ast.Call/ast.Constant(ast.Num/ast.Str)/ast.BinOp
+        '''
+        left_value = self.get_op_value(node.left)
+        right_value = self.get_op_value(node.right)
+
+        if isinstance(node.op, ast.Add):
+            self.value = left_value + right_value
+        elif isinstance(node.op, ast.Sub):
+            self.value = left_value - right_value
+        elif isinstance(node.op, ast.Mult):
+            self.value = left_value * right_value
+        elif isinstance(node.op, ast.Div):
+            self.value = left_value / right_value
+        else:
+            raise NotImplementedError("Unsupport arithmetic methods %s" % type(node.op))
+        return self.value
+
+    def visit_Call(self, node):
+        '''
+        node.func.id: func name, only support 'float', 'int', 'str'
+        node.args: func args list,only support ast.Constant(ast.Num/ast.Str)/ast.BinOp/ast.Call
+        str/float only support one parameter, eg: float(XXX), str(xxx)
+        int support one or two parameters, eg: int(xxx) or int(xxx, 16)
+        xxx can be ast.Call/ast.Constant(ast.Num/ast.Str)/ast.BinOp
+        '''
+        calc_tuple = ("float", "int", "str")
+
+        if node.func.id not in calc_tuple:
+            raise NotImplementedError("Unsupport function call type: %s" % node.func.id)
+
+        args_val_list = []
+        for item in node.args:
+            ret = self.get_op_value(item)
+            args_val_list.append(ret)
+
+        if node.func.id == "str":
+            if len(args_val_list) != 1:
+                raise TypeError("str() takes 1 positional argument but %s were given" % len(args_val_list))
+            value = str(args_val_list[0])
+            self.value = value
+            return value
+
+        if node.func.id == "float":
+            if len(args_val_list) != 1:
+                raise TypeError("float() takes 1 positional argument but %s were given" % len(args_val_list))
+            value = float(args_val_list[0])
+            self.value = value
+            return value
+        # int
+        if len(args_val_list) == 1:
+            value = int(args_val_list[0])
+            self.value = value
+            return value
+        if len(args_val_list) == 2:
+            value = int(args_val_list[0], args_val_list[1])
+            self.value = value
+            return value
+        raise TypeError("int() takes 1 or 2 arguments (%s given)" % len(args_val_list))
+
+
+class devicebase(object):
+    _name = None
+    __error_ret = -99999
+
+    @property
+    def name(self):
+        return self._name
+
+    @name.setter
+    def name(self, val):
+        self._name = val
+
+    def dumpValueByI2c(self, bus, loc):
+        value = ""
+        for i in range(256):
+            ret, val = self.get_i2c(bus, loc, i)
+            value += chr(val)
+        return value
+
+    def byteTostr(self, val):
+        strtmp = ''
+        for value in val:
+            strtmp += chr(value)
+        return strtmp
+
+    def get_eeprom_info(self, conf):
+        eeprom = ""
+        if conf.get('way') == 'sysfs':
+            ret, eeprom = self.get_value(conf)
+            if ret is False:
+                return None
+        elif conf.get('way') == 'devfile':
+            ret, eeprom_list = self.get_value(conf)
+            if ret is False:
+                return None
+            for item in eeprom_list:
+                eeprom += chr(item)
+        else:
+            eeprom = self.dumpValueByI2c(conf.get('bus'), conf.get('addr'))
+        return eeprom
+
+    def exec_os_cmd(self, cmd):
+        status, output = subprocess.getstatusoutput(cmd)
+        return status, output
+
+    def get_value(self, config):
+        '''
+            get value by config way
+            way  i2c/sysfs/lpc
+        '''
+        way = config.get("way")
+        if way == 'sysfs':
+            return self.get_sysfs(config.get("loc"), config.get("flock_path"))
+        if way == "i2c":
+            bus = config.get("bus")
+            addr = config.get("addr")
+            offset = config.get("offset")
+            return self.get_i2c(bus, addr, offset)
+        if way == "io":
+            io_addr = config.get('io_addr')
+            read_len = config.get('read_len', 1)
+            return self.get_io(io_addr, read_len)
+        if way == "i2cword":
+            bus = config.get("bus")
+            addr = config.get("addr")
+            offset = config.get("offset")
+            return self.get_i2cword(bus, addr, offset)
+        if way == "devmem":
+            addr = config.get("addr")
+            digit = config.get("digit")
+            mask = config.get("mask", None)
+            return self.get_devmem(addr, digit, mask)
+        if way == "sdk":
+            get_type = config.get("type")
+            if get_type == "bcm_temp":
+                return self.getbcmtemp()
+            if get_type == "bcm_reg":
+                reg = config.get("reg")
+                return self.getbcmreg(reg)
+            raise Exception("cannot found sdk type deal")
+        if way == "devfile":
+            loc = config.get("loc")
+            offset = config.get("offset")
+            length = config.get("len")
+            ret, val_list = self.devfile_read(loc, offset, length)
+            if ret is True:
+                if length == 1:
+                    val = val_list[0]
+                    return True, val
+                return True, val_list
+            return False, ("devfile read failed. path:%s, offset:0x%x, read_len:%d" % (loc, offset, length))
+        if way == "devfile_ascii":
+            loc = config.get("loc")
+            offset = config.get("offset")
+            length = config.get("len")
+            return self.devfile_read_ascii(loc, offset, length)
+        if way == 'cmd':
+            cmd = config.get("cmd")
+            ret, log = self.exec_os_cmd(cmd)
+            if ret:
+                return False, ("cmd write exec %s failed, log: %s" % (cmd, log))
+            return True, log
+        raise Exception("cannot found way deal")
+
+    def devfile_read(self, loc, offset, length):
+        return osutil.readdevfile(loc, offset, length)
+
+    def devfile_read_ascii(self, loc, offset, length):
+        return osutil.readdevfile_ascii(loc, offset, length)
+
+    def get_sysfs(self, loc, flock_path=None):
+        return self.getsysfs(loc, flock_path)
+
+    def getsysfs(self, loc, flock_path=None):
+        ret, val = osutil.readsysfs(loc, flock_path)
+        return ret, val
+
+    def get_devmem(self, addr, digit, mask):
+        return osutil.getdevmem(addr, digit, mask)
+
+    def get_i2cword(self, bus, addr, offset):
+        return self.geti2cword(bus, addr, offset)
+
+    def geti2cword(self, bus, addr, offset):
+        ret, val = osutil.geti2cword(bus, addr, offset)
+        return ret, val
+
+    def get_io(self, reg_addr, read_len):
+        return self.getio(reg_addr, read_len)
+
+    def getio(self, reg_addr, read_len):
+        ret, val = osutil.io_rd(reg_addr, read_len)
+        return ret, val
+
+    def get_i2c(self, bus, addr, offset):
+        return self.geti2c(bus, addr, offset)
+
+    def geti2c(self, bus, addr, offset):
+        ret, val = osutil.wbi2cget(bus, addr, offset)
+        return ret, val
+
+    def set_value(self, config, val):
+        '''
+            get value by config way
+            way  i2c/sysfs/lpc
+        '''
+        way = config.get("way")
+        if way == 'sysfs':
+            return self.set_sysfs(config.get("loc"), "0x%02x" % val)
+        if way == "i2c":
+            bus = config.get("bus")
+            addr = config.get("addr")
+            offset = config.get("offset")
+            return self.set_i2c(bus, addr, offset, val)
+        if way == "i2cpec":
+            bus = config.get("bus")
+            addr = config.get("addr")
+            offset = config.get("offset")
+            return self.seti2c_byte_pec(bus, addr, offset, val)
+        if way == 'i2cword':
+            bus = config.get("bus")
+            addr = config.get("addr")
+            offset = config.get("offset")
+            return self.set_i2cword(bus, addr, offset, val)
+        if way == "i2cwordpec":
+            bus = config.get("bus")
+            addr = config.get("addr")
+            offset = config.get("offset")
+            return self.set_i2cwordpec(bus, addr, offset, val)
+        if way == "devfile":
+            loc = config.get("loc")
+            offset = config.get("offset")
+            return self.devfile_write(loc, offset, val)
+        return False, "unsupport way: %s" % way
+
+    def set_sysfs(self, loc, value):
+        return self.setsysfs(loc, value)
+
+    def setsysfs(self, loc, value):
+        return osutil.writesysfs(loc, value)
+
+    def set_i2cword(self, bus, addr, offset, byte):
+        return self.seti2cword(bus, addr, offset, byte)
+
+    def seti2cword(self, bus, addr, offset, byte):
+        return osutil.seti2cword(bus, addr, offset, byte)
+
+    def set_i2cwordpec(self, bus, addr, offset, val):
+        return osutil.seti2cwordpec(bus, addr, offset, val)
+
+    def seti2c_byte_pec(self, bus, addr, offset, val):
+        return osutil.seti2c_byte_pec(bus, addr, offset, val)
+
+    def set_i2c(self, bus, addr, offset, byte):
+        return self.seti2c(bus, addr, offset, byte)
+
+    def seti2c(self, bus, addr, offset, byte):
+        ret, val = osutil.wbi2cset(bus, addr, offset, byte)
+        return ret, val
+
+    def devfile_write(self, loc, offset, val):
+        ret, val = osutil.writedevfile(loc, offset, val)
+        return ret, val
+
+    def getbcmtemp(self):
+        try:
+            sta, ret = osutil.getmactemp()
+            if sta is True:
+                mac_aver = float(ret.get("average", self.__error_ret))
+                mac_aver = mac_aver * 1000
+            else:
+                return False, ret
+        except AttributeError as e:
+            return False, str(e)
+        return True, mac_aver
+
+    def getbcmreg(self, reg):
+        ret, val = osutil.getsdkreg(reg)
+        return ret, val
+
+    def logger_debug(self, msg):
+        baseutil.logger_debug(msg)
+
+    def command(self, cmd):
+        ret, output = osutil.command(cmd)
+        return ret, output
+
+    def get_format_value(self, format_str):
+        ast_obj = ast.parse(format_str, mode='eval')
+        visitor = CodeVisitor()
+        visitor.visit(ast_obj)
+        ret = visitor.get_value()
+        return ret
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/fan.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/fan.py
new file mode 100644
index 000000000000..1424c14a4a94
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/fan.py
@@ -0,0 +1,417 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# fan.py
+# Python implementation of the Class fan
+#
+#######################################################
+from eepromutil.fru import ipmifru
+from eepromutil.fantlv import fan_tlv
+from plat_hal.devicebase import devicebase
+from plat_hal.rotor import rotor
+
+
+class fan(devicebase):
+    __rotor_list = []
+    __pn = None
+    __raweeprom = None
+    __sn = None
+    __hw_version = None
+    __e2loc = None
+    __rotors = None
+    __AirFlow = None
+    __SpeedMin = None
+    __SpeedMax = None
+    __PowerMax = None
+    __productName = None
+    __productSerialNumber = None
+    __WatchdogStatus = None
+    __led_attrs_config = None
+    __led_config = None
+    __WatchdogStatus_config = None
+    __AirFlowconifg = None
+    __EnableWatchdogConf = None
+    __Rotor_config = None
+    __fan_display_name = None  # 'N/A'
+    __fan_display_name_conifg = None
+
+    def __init__(self, conf=None):
+        if conf is not None:
+            self.name = conf.get('name', None)
+            self.sn = conf.get('sn', None)
+            self.present = conf.get('present', None)
+            self.e2loc = conf.get('e2loc', None)
+            self.e2_type = conf.get('e2_type', "fru")
+            self.SpeedMin = conf.get('SpeedMin', None)
+            self.SpeedMax = conf.get('SpeedMax', None)
+            self.PowerMax = conf.get('PowerMax', None)
+            self.AirFlowconifg = conf.get("airflow", None)
+            self.WatchdogStatus_config = conf.get('WatchdogStatus', None)
+            self.EnableWatchdogConf = conf.get('EnableWatchdogConf', None)
+            self.led_attrs_config = conf.get('led_attrs', None)
+            self.led_config = conf.get('led', None)
+            self.Rotor_config = conf.get('Rotor', None)
+            self.fan_display_name_conifg = conf.get("fan_display_name", None)
+            rotor_tmp = []
+            for value in self.Rotor_config.values():
+                rotor_tmp.append(rotor(value))
+            rotor_tmp.sort(key=lambda x: x.name, reverse=False)
+            self.rotor_list = rotor_tmp
+            self.rotors = len(self.rotor_list)
+
+    @property
+    def EnableWatchdogConf(self):
+        return self.__EnableWatchdogConf
+
+    @EnableWatchdogConf.setter
+    def EnableWatchdogConf(self, val):
+        self.__EnableWatchdogConf = val
+
+    @property
+    def rotor_list(self):
+        return self.__rotor_list
+
+    @rotor_list.setter
+    def rotor_list(self, val):
+        self.__rotor_list = val
+
+    @property
+    def Rotor_config(self):
+        return self.__Rotor_config
+
+    @Rotor_config.setter
+    def Rotor_config(self, val):
+        self.__Rotor_config = val
+
+    @property
+    def productName(self):
+        return self.__productName
+
+    @productName.setter
+    def productName(self, val):
+        self.__productName = val
+
+    @property
+    def productSerialNumber(self):
+        return self.__productSerialNumber
+
+    @productSerialNumber.setter
+    def productSerialNumber(self, val):
+        self.__productSerialNumber = val
+
+    @property
+    def hw_version(self):
+        return self.__hw_version
+
+    @hw_version.setter
+    def hw_version(self, val):
+        self.__hw_version = val
+
+    @property
+    def sn(self):
+        return self.__sn
+
+    @sn.setter
+    def sn(self, val):
+        self.__sn = val
+
+    @property
+    def pn(self):
+        return self.__pn
+
+    @pn.setter
+    def pn(self, val):
+        self.__pn = val
+
+    @property
+    def raweeprom(self):
+        return self.__raweeprom
+
+    @raweeprom.setter
+    def raweeprom(self, val):
+        self.__raweeprom = val
+
+    @property
+    def SpeedMax(self):
+        return self.__SpeedMax
+
+    @SpeedMax.setter
+    def SpeedMax(self, val):
+        self.__SpeedMax = val
+
+    @property
+    def SpeedMin(self):
+        return self.__SpeedMin
+
+    @SpeedMin.setter
+    def SpeedMin(self, val):
+        self.__SpeedMin = val
+
+    @property
+    def PowerMax(self):
+        return self.__PowerMax
+
+    @PowerMax.setter
+    def PowerMax(self, val):
+        self.__PowerMax = val
+
+    @property
+    def rotors(self):
+        return self.__rotors
+
+    @property
+    def AirFlow(self):
+        return self.__AirFlow
+
+    @AirFlow.setter
+    def AirFlow(self, val):
+        self.__AirFlow = val
+
+    @rotors.setter
+    def rotors(self, val):
+        self.__rotors = val
+
+    @property
+    def fan_display_name_conifg(self):
+        return self.__fan_display_name_conifg
+
+    @fan_display_name_conifg.setter
+    def fan_display_name_conifg(self, val):
+        self.__fan_display_name_conifg = val
+
+    @property
+    def fan_display_name(self):
+        return self.__fan_display_name
+
+    @fan_display_name.setter
+    def fan_display_name(self, val):
+        self.__fan_display_name = val
+
+    def getspeed(self, conf):
+        tmp = None
+        if conf is None:
+            return -1
+        ret, val = self.get_value(conf)
+        if ret is True:
+            tmp = int(str(val), 10)
+        else:
+            val = None
+        if val is not None:
+            return int(15000000 / tmp)
+        return -1
+
+    def get_speed(self, rotor_index):
+        rotor_item = self.get_rotor_index(rotor_index)
+        if rotor_item is None:
+            return None
+        speed = rotor_item.rotor_Speed.Value
+        if speed is None:
+            return None
+        return int(speed)
+
+    def set_led(self, color):
+        status = self.led_attrs_config.get(color, None)
+        if status is None:
+            return False
+
+        mask = self.led_attrs_config.get('mask', 0xff)
+        ret, value = self.get_value(self.led_config)
+        if ret is False or value is None:
+            return False
+        setval = (int(value) & ~mask) | (status)
+        ret, val = self.set_value(self.led_config, setval)
+        return ret
+
+    def get_led(self):
+        mask = self.led_attrs_config.get('mask', 0xff)
+        ret, value = self.get_value(self.led_config)
+        if ret is False or value is None:
+            return False, 'N/A'
+        ledval = int(value) & mask
+        for key, val in self.led_attrs_config.items():
+            if (ledval == val) and (key != "mask"):
+                return True, key
+        return False, 'N/A'
+
+    def set_speed(self, rotor_index, level):
+        if level > 255 or level < 0:
+            return False
+        rotor_item = self.get_rotor_index(rotor_index)
+        if rotor_item is None:
+            return False
+        ret, val = self.set_value(rotor_item.Speedconfig, int(level))
+        return ret
+
+    def get_rotor_index(self, rotor_index):
+        if rotor_index > len(self.rotor_list):
+            return None
+        rotor_item = self.rotor_list[rotor_index - 1]
+        return rotor_item
+
+    def get_rotor_byname(self, rotor_index):
+        for rotor_item in self.rotor_list:
+            if rotor_item.name == rotor_index:
+                return rotor_item
+        return None
+
+    def get_presence(self):
+        ret, val = self.get_value(self.present)
+        if ret is False or val is None:
+            return -1
+        if isinstance(val, str):
+            value = int(val, 16)
+        else:
+            value = val
+        mask = self.present.get("mask")
+        flag = value & mask
+        okval = self.present.get("okval", 0)
+        if flag == okval:
+            return True
+        return False
+
+    def get_speed_pwm(self, rotor_index):
+        rotor_item = self.get_rotor_index(rotor_index)
+        if rotor_item is None:
+            return False
+        if rotor_item.i2c_speed is None:
+            return False
+        val = round(rotor_item.i2c_speed * 100 / 255)
+        return val
+
+    def feed_watchdog(self):
+        ret = False
+        for rotor_item in self.rotor_list:
+            ret, val = rotor_item.feed_watchdog()
+            if ret is False:
+                return ret
+        return ret
+
+    def get_fru_info(self):
+        try:
+            if self.get_presence() is False:
+                raise Exception("%s: not present" % self.name)
+            eeprom = self.get_eeprom_info(self.e2loc)
+            if eeprom is None:
+                raise Exception("%s: value is none" % self.name)
+            fru = ipmifru()
+            if isinstance(eeprom, bytes):
+                eeprom = self.byteTostr(eeprom)
+            fru.decodeBin(eeprom)
+            self.productName = fru.productInfoArea.productName.strip()  # PN
+            self.productSerialNumber = fru.productInfoArea.productSerialNumber.strip()  # SN
+            self.hw_version = fru.productInfoArea.productVersion.strip()  # HW
+        except Exception:
+            self.productName = None
+            self.productSerialNumber = None
+            self.hw_version = None
+            return False
+        return True
+
+    def get_tlv_info(self):
+        try:
+            if self.get_presence() is False:
+                raise Exception("%s: not present" % self.name)
+            eeprom = self.get_eeprom_info(self.e2loc)
+            if eeprom is None:
+                raise Exception("%s: value is none" % self.name)
+            tlv = fan_tlv()
+            rets = tlv.decode(eeprom)
+            for item in rets:
+                if item["name"] == "Product Name":
+                    self.productName = item["value"].replace("\x00", "").strip()
+                elif item["name"] == "serial Number":
+                    self.productSerialNumber = item["value"].replace("\x00", "").strip()
+                elif item["name"] == "hardware info":
+                    self.hw_version = item["value"].replace("\x00", "").strip()
+        except Exception:
+            self.productName = None
+            self.productSerialNumber = None
+            self.hw_version = None
+            return False
+        return True
+
+    def decode_eeprom_info(self):
+        '''get fan name, hw version, sn'''
+        if self.e2_type == "fru":
+            return self.get_fru_info()
+
+        if self.e2_type == "fantlv":
+            return self.get_tlv_info()
+
+        return False
+
+    def get_AirFlow(self):
+        if self.productName is None:
+            ret = self.decode_eeprom_info()
+            if ret is False:
+                self.AirFlow = None
+                return False
+        if self.AirFlowconifg is None:
+            self.AirFlow = None
+            return False
+        for i in self.AirFlowconifg:
+            if self.productName in self.AirFlowconifg[i]:
+                self.AirFlow = i
+                return True
+        self.AirFlow = None
+        return False
+
+    def enable_watchdog(self, enable):
+        ret = False
+        if enable is True:
+            byte = self.EnableWatchdogConf.get("enable_byte", None)
+            ret, val = self.set_value(self.EnableWatchdogConf, byte)
+        elif enable is False:
+            byte = self.EnableWatchdogConf.get("disable_byte", None)
+            ret, val = self.set_value(self.EnableWatchdogConf, byte)
+        return ret
+
+    def get_watchdog_status(self):
+        dic = {"support": None, "open": None, "work_full": None, "work_allow_set": None}
+        if self.WatchdogStatus_config is None:
+            return None
+        ret, val = self.get_value(self.WatchdogStatus_config)
+        if ret is False or val is None:
+            return None
+        support_watchdog_off = self.WatchdogStatus_config.get("support_watchdog_off", None)
+        is_open_off = self.WatchdogStatus_config.get("is_open_off", None)
+        full_running_off = self.WatchdogStatus_config.get("full_running_off", None)
+        running_setting_off = self.WatchdogStatus_config.get("running_setting_off", None)
+        if support_watchdog_off is not None:
+            if support_watchdog_off & val == self.WatchdogStatus_config.get("support_watchdog_mask", None):
+                dic["support"] = True
+            else:
+                dic["support"] = False
+                return dic
+        if is_open_off is not None:
+            if is_open_off & val == self.WatchdogStatus_config.get("is_open_mask", None):
+                dic["open"] = True
+            else:
+                dic["open"] = False
+        if full_running_off is not None:
+            if full_running_off & val == self.WatchdogStatus_config.get("full_running_mask", None):
+                dic["work_full"] = True
+            else:
+                dic["work_full"] = False
+        if running_setting_off is not None:
+            if running_setting_off & val == self.WatchdogStatus_config.get("running_setting_mask", None):
+                dic["work_allow_set"] = True
+            else:
+                dic["work_allow_set"] = False
+        return dic
+
+    def get_fan_display_name(self):
+        if self.productName is None:
+            ret = self.decode_eeprom_info()
+            if ret is False:
+                self.fan_display_name = None
+                return False
+        if self.fan_display_name_conifg is None:
+            self.fan_display_name = self.productName
+            return False
+        for i in self.fan_display_name_conifg:
+            if self.productName in self.fan_display_name_conifg[i]:
+                self.fan_display_name = i
+                return True
+        self.fan_display_name = self.productName
+        return False
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py
new file mode 100644
index 000000000000..d283a50200be
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py
@@ -0,0 +1,1327 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# interface.py
+# Python implementation of the Class interface
+#
+#######################################################
+import collections
+from plat_hal.chassisbase import chassisbase
+from plat_hal.baseutil import baseutil
+from plat_hal.osutil import osutil
+
+
+def Singleton(cls):
+    _instance = {}
+
+    def _singleton(*args, **kargs):
+        if cls not in _instance:
+            _instance[cls] = cls(*args, **kargs)
+        return _instance[cls]
+
+    return _singleton
+
+
+@Singleton
+class interface(object):
+    __chas = None
+    __error_ret = None
+
+    def __init__(self):
+        self.chas = chassisbase()
+        self.__error_ret = -99999
+        self.__na_ret = 'N/A'
+
+    @property
+    def na_ret(self):
+        return self.__na_ret
+
+    @na_ret.setter
+    def na_ret(self, val):
+        self.__na_ret = val
+
+    @property
+    def error_ret(self):
+        return self.__error_ret
+
+    @error_ret.setter
+    def error_ret(self, val):
+        self.__error_ret = val
+
+    @property
+    def chas(self):
+        return self.__chas
+
+    @chas.setter
+    def chas(self, val):
+        self.__chas = val
+
+    # onie_e2
+    def get_onie_e2(self):
+        onie_e2_list = self.chas.onie_e2_list
+        return onie_e2_list
+
+    def get_onie_e2_path(self, name):
+        onie_e2 = self.chas.get_onie_e2_byname(name)
+        if onie_e2 is None:
+            return None
+        return onie_e2.e2_path
+
+    def get_device_airflow(self, name):
+        onie_e2 = self.chas.get_onie_e2_byname(name)
+        if onie_e2 is None:
+            return None
+        return onie_e2.airflow
+
+    def get_onie_e2_obj(self, name):
+        onie_e2 = self.chas.get_onie_e2_byname(name)
+        if onie_e2 is None:
+            return None
+        onie_e2.get_onie_e2_info()
+        return onie_e2
+
+    # temp
+    def get_temps(self):
+        templist = self.chas.temp_list
+        return templist
+
+    def get_temp_total_number(self):
+        templist = self.chas.temp_list
+        return len(templist)
+
+    def check_temp_id_exist(self, temp_id):
+        templist = self.chas.temp_list
+        for temp in templist:
+            if temp.temp_id == temp_id:
+                return True
+        return False
+
+    def get_temp_id_number(self):
+        templist = self.chas.temp_list
+        temp_num = 0
+        for i in range(len(templist)):
+            temp_id = "TEMP" + str(i + 1)
+            ret = self.check_temp_id_exist(temp_id)
+            if ret is True:
+                temp_num = temp_num + 1
+            else:
+                return temp_num
+        return temp_num
+
+    def get_temp_location(self, temp_name):
+        temp = self.chas.get_temp_byname(temp_name)
+        return temp.get_location()
+
+    def set_temp_location(self, temp_name, location):
+        temp = self.chas.get_temp_byname(temp_name)
+        return temp.set_location(location)
+
+    def set_temp_name(self, temp_name, name):
+        temp = self.chas.get_temp_byname(temp_name)
+        return temp.set_name(name)
+
+    def get_appoint_temp(self, temp_name):
+        temp = self.chas.get_led_byname(temp_name)
+        return temp.get_temp()
+
+    def set_appoint_temp(self, temp_name, val):
+        temp = self.chas.get_temp_byname(temp_name)
+        return temp.set_temp(val)
+
+    def get_temp_mintemp(self, temp_name):
+        temp = self.chas.get_temp_byname(temp_name)
+        return temp.get_mintemp()
+
+    def set_temp_mintemp(self, temp_name, val):
+        temp = self.chas.get_temp_byname(temp_name)
+        return temp.set_mintemp(val)
+
+    # led
+    def get_leds(self):
+        ledlist = self.chas.led_list
+        return ledlist
+
+    def get_led_total_number(self):
+        ledlist = self.chas.led_list
+        return len(ledlist)
+
+    def get_led_color(self, led_name):
+        led = self.chas.get_led_byname(led_name)
+        if led is None:
+            return -1
+        return led.get_color()
+
+    def get_led_color_by_type(self, led_type):
+        ledlist = self.chas.led_list
+        ledtmp = None
+        for temp in ledlist:
+            if temp.led_type == led_type:
+                ledtmp = temp
+                break
+        if ledtmp is None:
+            return -1
+        return ledtmp.get_color()
+
+    def set_led_color(self, led_name, color):
+        led = self.chas.get_led_byname(led_name)
+        if led is None:
+            return -1
+        return led.set_color(color)
+
+    # psu
+    def get_psu_total_number(self):
+        psulist = self.chas.psu_list
+        if psulist is None:
+            return -1
+        return len(psulist)
+
+    def get_psus(self):
+        psulist = self.chas.psu_list
+        return psulist
+
+    def get_psu_presence(self, psu_name):
+        psu = self.chas.get_psu_byname(psu_name)
+        if psu is None:
+            return -1
+        return psu.present
+
+    def get_psu_fru_info(self, psu_name):
+        '''
+                    {
+                    "Name": "PSU1",
+                    "SN": "serial_number_example",    # 'N/A'
+                    "PN": "part_number_example",      # 'N/A'
+                    "AirFlow": "B2F"                  # 'N/A'
+                }
+        '''
+        psu = self.chas.get_psu_byname(psu_name)
+        if psu is None:
+            return -1
+        psu.get_fru_info()
+        psu.get_AirFlow()
+        psu.get_psu_display_name()
+
+        dic = collections.OrderedDict()
+        dic["Name"] = psu.name
+        dic["SN"] = psu.productSerialNumber if (psu.productSerialNumber is not None) else self.na_ret
+        dic["PN"] = psu.productPartModelName if (psu.productPartModelName is not None) else self.na_ret
+        dic["DisplayName"] = psu.psu_display_name if (psu.psu_display_name is not None) else self.na_ret
+        dic["VENDOR"] = psu.productManufacturer if (psu.productManufacturer is not None) else self.na_ret
+        dic["HW"] = psu.productVersion if (psu.productVersion is not None) else self.na_ret
+        dic["AirFlow"] = psu.AirFlow if (psu.AirFlow is not None) else self.na_ret
+        return dic
+
+    def get_psu_input_output_status(self, psu_name):
+        psu = self.chas.get_psu_byname(psu_name)
+        if psu is None:
+            return -1
+        psu.InputsCurrent.Value  # just for clear faults
+        if (psu.InputStatus is True) and (psu.OutputStatus is True):
+            return True
+        return False
+
+    def get_psu_status(self, psu_name):
+        """
+        Get status of a specific PSU
+        @return dict of the specific PSU's status, None for failure
+                Example return value(all keys are mandatory)
+                {
+                    "Name": "PSU1",
+                    "InputType": "DC",    # "AC" or 'N/A'
+                    "InputStatus": True,  # H/W status bit
+                    "OutputStatus": True  # H/W status bit
+                    "FanSpeed": {
+                        "Value": 4000,    # -99999
+                        "Min": 2000,      # -99999
+                        "Max": 10000      # -99999
+                    },
+                    "Temperature": {
+                        "Value": 40.0,    # -99999.0
+                        "Min": -30.0,     # -99999.0
+                        "Max": 50.0       # -99999.0
+                    }
+                }
+        """
+        psu = self.chas.get_psu_byname(psu_name)
+        if psu is None:
+            return -1
+
+        dic = collections.OrderedDict()
+        # psu.get_Temperature()
+        temp_dict = collections.OrderedDict()
+        temp_dict['Min'] = psu.Temperature.Min
+        temp_dict['Max'] = psu.Temperature.Max
+        temp_dict['Value'] = psu.Temperature.Value
+        temp_dict['Unit'] = psu.Temperature.Unit
+        dic["Temperature"] = temp_dict
+
+        # psu.get_FanSpeed()
+        fan_speed_dict = collections.OrderedDict()
+        fan_speed_dict['Min'] = psu.FanSpeed.Min
+        fan_speed_dict['Max'] = psu.FanSpeed.Max
+        fan_speed_dict['Tolerance'] = psu.FanSpeedTolerance
+        fan_speed_dict['Value'] = psu.FanSpeed.Value
+        fan_speed_dict['Unit'] = psu.FanSpeed.Unit
+        dic["FanSpeed"] = fan_speed_dict
+
+        dic["Name"] = psu.name
+        dic["InputType"] = psu.InputsType
+        dic["InputStatus"] = psu.InputStatus
+        dic["OutputStatus"] = psu.OutputStatus
+        dic["TempStatus"] = psu.TempStatus
+        dic["FanStatus"] = psu.FanStatus
+        return dic
+
+    def get_psu_power_status(self, psu_name):
+        """
+        Get power status of a specific PSU
+        @return dict of the specific PSU's power status, None for failure
+                Example return value
+                {
+                    "Name": "PSU1",
+                    "Inputs": {
+                        "Status": True, # H/W status bit
+                        "Type": "DC",   # or "AC" or "N/A"
+                        "Voltage": {
+                            "Value": 220,       # -1
+                            "LowAlarm": 200,    # -1
+                            "HighAlarm": 240,   # -1
+                            "Unit": "V"
+                        },
+                        "Current": {
+                            "Value": 6.0,       # -99999.0
+                            "LowAlarm": 0.2,    # -99999.0
+                            "HighAlarm": 7.0,   # -99999.0
+                            "Unit": "A"
+                        },
+                        "Power": {
+                            "Value": 1000,      # -99999
+                            "LowAlarm": -1,     # -99999
+                            "HighAlarm": 1400,  # -99999
+                            "Unit": "W"
+                       }
+                    },
+                    "Outputs": {
+                        "Status": True,
+                        "Voltage": {
+                            "Value": 220,
+                            "LowAlarm": 200,
+                            "HighAlarm": 240,
+                            "Unit": "V"
+                        },
+                        "Current": {
+                            "Value": 6.0,
+                            "LowAlarm": 0.2,
+                            "HighAlarm": 7.0,
+                            "Unit": "A"
+                        },
+                        "Power": {
+                            "Value": 1000,
+                            "LowAlarm": -1,  # Don't care
+                            "HighAlarm": 1400,
+                            "Unit": "W"
+                        }
+                    }
+                }
+        """
+        psu = self.chas.get_psu_byname(psu_name)
+        if psu is None:
+            return -1
+
+        dic = collections.OrderedDict()
+        inputdic = collections.OrderedDict()
+        Outputsdic = collections.OrderedDict()
+        dic["Name"] = psu.name
+        inputdic["Status"] = psu.InputStatus
+        inputdic["Type"] = psu.InputsType
+
+        # psu.get_InputsVoltage()
+        inputdic_voltage = collections.OrderedDict()
+
+        inputdic_voltage["Value"] = psu.InputsVoltage.Value
+        inputdic_voltage["LowAlarm"] = psu.InputsVoltage.Min
+        inputdic_voltage["HighAlarm"] = psu.InputsVoltage.Max
+        inputdic_voltage["Unit"] = psu.InputsVoltage.Unit
+
+        inputdic["Voltage"] = inputdic_voltage
+        inputdic_current = collections.OrderedDict()
+        inputdic_current["Value"] = psu.InputsCurrent.Value
+        inputdic_current["LowAlarm"] = psu.InputsCurrent.Min
+        inputdic_current["HighAlarm"] = psu.InputsCurrent.Max
+        inputdic_current["Unit"] = psu.InputsCurrent.Unit
+        inputdic["Current"] = inputdic_current
+
+        inputdic_power = collections.OrderedDict()
+        inputdic_power["Value"] = psu.InputsPower.Value
+        inputdic_power["LowAlarm"] = psu.InputsPower.Min
+        inputdic_power["HighAlarm"] = psu.InputsPower.Max
+        inputdic_power["Unit"] = psu.InputsPower.Unit
+        inputdic["Power"] = inputdic_power
+        Outputsdic["Status"] = psu.InputStatus
+
+        outputdic_voltage = collections.OrderedDict()
+        outputdic_current = collections.OrderedDict()
+        outputdic_power = collections.OrderedDict()
+
+        outputdic_voltage["Value"] = psu.OutputsVoltage.Value
+        outputdic_voltage["LowAlarm"] = psu.OutputsVoltage.Min
+        outputdic_voltage["HighAlarm"] = psu.OutputsVoltage.Max
+        outputdic_voltage["Unit"] = psu.OutputsVoltage.Unit
+
+        outputdic_current["Value"] = psu.OutputsCurrent.Value
+        outputdic_current["LowAlarm"] = psu.OutputsCurrent.Min
+        outputdic_current["HighAlarm"] = psu.OutputsCurrent.Max
+        outputdic_current["Unit"] = psu.OutputsCurrent.Unit
+
+        outputdic_power["Value"] = psu.OutputsPower.Value
+        outputdic_power["LowAlarm"] = psu.OutputsPower.Min
+        outputdic_power["HighAlarm"] = psu.OutputsPower.Max
+        outputdic_power["Unit"] = psu.OutputsPower.Unit
+
+        Outputsdic["Voltage"] = outputdic_voltage
+        Outputsdic["Current"] = outputdic_current
+        Outputsdic["Power"] = outputdic_power
+
+        dic["Inputs"] = inputdic
+        dic["Outputs"] = Outputsdic
+
+        return dic
+
+    def set_psu_fan_speed_pwm(self, psu_name, pwm):
+        psu = self.chas.get_psu_byname(psu_name)
+        if psu is None:
+            return -1
+        return psu.set_fan_speed_pwm(pwm)
+
+    def get_psu_fan_speed_pwm(self, psu_name):
+        psu = self.chas.get_psu_byname(psu_name)
+        if psu is None:
+            return -1
+        return psu.get_fan_speed_pwm()
+
+    def get_psu_info_all(self):
+        """
+                        {
+                    "Number": 2,
+                    "PSU1": {
+                        "SN": "serial_number_example",  # 'N/A'
+                        "PN": "part_number_example",    # 'N/A'
+                        "AirFlow": "intake",            # 'N/A'
+
+                        "FanSpeed": {
+                            "Value": 4000,
+                            "Min": 2000,
+                            "Max": 30000
+                        },
+                        "Temperature": {
+                            "Value": 35.0,
+                            "Min": -20.0,
+                            "Max": 45.0
+                        },
+                        "Inputs": {
+                            "Status": True, # H/W status bit
+                            "Type": "DC",   # or "AC"
+                            "Voltage": {
+                                "Value": 220,
+                                "LowAlarm": 200,
+                                "HighAlarm": 240,
+                                "Unit": "V"
+                            },
+                            "Current": {
+                                "Value": 6.0,
+                                "LowAlarm": 0.2,
+                                "HighAlarm": 7.0,
+                                "Unit": "A"
+                            },
+                            "Power": {
+                                "Value": 1000,
+                                "LowAlarm": -1,
+                                "HighAlarm": 1400,
+                                "Unit": "W"
+                           }
+                        },
+                        "Outputs": {
+                            "Status": True,
+                            "Voltage": {
+                                "Value": 220,
+                                "LowAlarm": 200,
+                                "HighAlarm": 240,
+                                "Unit": "V"
+                            },
+                            "Current": {
+                                "Value": 6.0,
+                                "LowAlarm": 0.2,
+                                "HighAlarm": 7.0,
+                                "Unit": "A"
+                            },
+                            "Power": {
+                                "Value": 1000,
+                                "LowAlarm": -1,  # Don't care
+                                "HighAlarm": 1400,
+                                "Unit": "W"
+                            }
+                        }
+                    }
+                }
+        """
+
+        psus = self.get_psus()
+        psu_dict = collections.OrderedDict()
+        psu_dict['Number'] = len(psus)
+        for psu in psus:
+            dicttmp = self.get_psu_fru_info(psu.name)
+            dicttmp.update(self.get_psu_status(psu.name))
+            dicttmp.update(self.get_psu_power_status(psu.name))
+            if self.get_psu_presence(psu.name) is True:
+                dicttmp['Present'] = 'yes'
+            else:
+                dicttmp['Present'] = 'no'
+            psu_dict[psu.name] = dicttmp
+        return psu_dict
+
+    def get_fans(self):
+        fanlist = self.chas.fan_list
+        return fanlist
+
+    # fan
+    def get_fan_total_number(self):
+        fanlist = self.chas.fan_list
+        if fanlist is None:
+            return -1
+        return len(fanlist)
+
+    def get_fan_rotor_number(self, fan_name):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        ret = fan.rotors
+        if ret is None:
+            return -1
+        return ret
+
+    def get_fan_speed(self, fan_name, rotor_index):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        ret = fan.get_speed(rotor_index)
+        if ret is None:
+            return -1
+        return ret
+
+    def fan_speed_set_level(self, fan_name, rotor_index, level):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        ret = fan.set_speed(rotor_index, level)
+        if ret is True:
+            return 0
+        return -1
+
+    def get_fan_speed_pwm(self, fan_name, rotor_index):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        val = fan.get_speed_pwm(rotor_index)
+        if val is False:
+            return -1
+        return val
+
+    def set_fan_speed_pwm(self, fan_name, rotor_index, pwm):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        if isinstance(pwm, str):
+            rate = float(pwm.strip('%s'))
+            speed = round(rate * 255 / 100)
+        elif isinstance(pwm, int):
+            speed = round(pwm * 255 / 100)
+        elif isinstance(pwm, float):
+            speed = round(pwm * 255 / 100)
+        else:
+            return -1
+        ret = self.fan_speed_set_level(fan.name, rotor_index, speed)
+        if ret == 0:
+            return 0
+        return -1
+
+    def get_fan_watchdog_status(self):
+        fan = self.chas.fan_list[0]
+        dic = fan.get_watchdog_status()
+        if dic is None or dic["support"] is False:
+            return self.na_ret
+        if dic["open"] is False or dic["work_allow_set"] is True:
+            return "Normal"
+        if dic["work_full"] is True:
+            return "Abnormal"
+        return "Abnormal"
+
+    def enable_fan_watchdog(self, enable=True):
+        fan = self.chas.fan_list[0]
+        ret = fan.enable_watchdog(enable)
+        if ret is True:
+            return 0
+        return -1
+
+    def feed_fan_watchdog(self):
+        fan_list = self.chas.fan_list
+        if fan_list is None:
+            return -1
+        for fan in fan_list:
+            ret = fan.feed_watchdog()
+            if ret is False:
+                return -1
+        return 0
+
+    def set_fan_led(self, fan_name, color):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        ret = fan.set_led(color)
+        if ret is True:
+            return 0
+        return -1
+
+    def get_fan_led(self, fan_name):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return False, 'N/A'
+        return fan.get_led()
+
+    def get_fan_presence(self, fan_name):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        return fan.get_presence()
+
+    def get_fan_fru_info(self, fan_name):
+        """
+        Get specific fan's information
+                    # Properties
+                    "Name": "FAN1",
+                    "SN": "serial_number_example",  # 'N/A'
+                    "PN": "part_number_exampple",   # 'N/A'
+                    "Rotors": 2,                    # -1
+                    "AirFlow": "intake",            # 'N/A'
+                    "SpeedMin": 2000,               # -1
+                    "SpeedMax": 30000               # -1
+        """
+        fan = self.chas.get_fan_byname(fan_name)
+        fan.decode_eeprom_info()
+        fan.get_AirFlow()
+        fan.get_fan_display_name()
+
+        dic = collections.OrderedDict()
+        dic["Name"] = fan.name
+        dic["SN"] = fan.productSerialNumber
+        if dic["SN"] is None:
+            dic["SN"] = self.na_ret
+        dic["PN"] = fan.productName
+        if dic["PN"] is None:
+            dic["PN"] = self.na_ret
+        dic["DisplayName"] = fan.fan_display_name
+        if dic["DisplayName"] is None:
+            dic["DisplayName"] = self.na_ret
+
+        dic["Rotors"] = fan.rotors
+        dic["AirFlow"] = fan.AirFlow
+        if dic["AirFlow"] is None:
+            dic["AirFlow"] = self.na_ret
+        dic["SpeedMin"] = fan.SpeedMin
+        dic["SpeedMax"] = fan.SpeedMax
+        return dic
+
+    def get_fan_eeprom_info(self, fan_name):
+        """
+        Get specific fan's information
+                    # Properties
+                    "Name": "M6510-FAN-F",          # 'N/A'
+                    "SN": "serial_number_example",  # 'N/A'
+                    "HW": "hw_version_exampple",    # 'N/A'
+        """
+        fan = self.chas.get_fan_byname(fan_name)
+        fan.decode_eeprom_info()
+        fan.get_fan_display_name()
+        dic = collections.OrderedDict()
+        dic["NAME"] = fan.productName
+        if dic["NAME"] is None:
+            dic["NAME"] = self.na_ret
+        dic["SN"] = fan.productSerialNumber
+        if dic["SN"] is None:
+            dic["SN"] = self.na_ret
+        dic["HW"] = fan.hw_version
+        if dic["HW"] is None:
+            dic["HW"] = self.na_ret
+        dic["DisplayName"] = fan.fan_display_name
+        if dic["DisplayName"] is None:
+            dic["DisplayName"] = self.na_ret
+        return dic
+
+    def get_product_fullname(self):
+        return baseutil.get_product_fullname()
+
+    def get_fan_status(self, fan_name):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        rotorlist = fan.rotor_list
+        dic = collections.OrderedDict()
+        for rotor in rotorlist:
+            dic_val = collections.OrderedDict()
+            if rotor.rotor_Running is True:
+                dic_val['Running'] = 'yes'
+            else:
+                dic_val['Running'] = 'no'
+            if rotor.rotor_HwAlarm is True:
+                dic_val['HwAlarm'] = 'yes'
+            else:
+                dic_val['HwAlarm'] = 'no'
+            dic_val['Speed'] = int(rotor.rotor_Speed.Value)
+            dic[rotor.name] = dic_val
+        return dic
+
+    def get_fan_rotor_status(self, fan_name, rotor_name):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        rotorlist = fan.rotor_list
+        for rotor in rotorlist:
+            if rotor_name == rotor.name:
+                if rotor.rotor_Running is True:
+                    return True
+                return False
+        return -1
+
+    def get_fan_roll_status(self, fan_name, rotor_index):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        rotor = fan.get_rotor_index(rotor_index)
+        if rotor is None:
+            return -1
+        if rotor.rotor_Running is True:
+            return True
+        return False
+
+    def get_fan_info_fru(self, fan_name):
+        fan = self.chas.get_fan_byname(fan_name)
+        fan.get_fru_info()
+        fan.get_AirFlow()
+        dic = collections.OrderedDict()
+        dic["Name"] = fan.name
+        dic["SN"] = fan.productSerialNumber
+        if dic["SN"] is None:
+            dic["SN"] = self.na_ret
+        dic["PN"] = fan.productPartModelName
+        if dic["PN"] is None:
+            dic["PN"] = self.na_ret
+        flag = self.get_fan_presence(fan_name)
+        if flag is True:
+            dic["Present"] = "yes"
+        elif flag is False:
+            dic["Present"] = "no"
+        else:
+            dic["Present"] = self.na_ret
+        dic["Rotors"] = fan.rotors
+        dic["AirFlow"] = fan.AirFlow
+        if dic["AirFlow"] is None:
+            dic["AirFlow"] = self.na_ret
+        return dic
+
+    # support TLV and FRU FAN E2
+    def get_fan_info(self, fan_name):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return None
+        fan.get_AirFlow()
+        dic = self.get_fan_eeprom_info(fan_name)
+        flag = self.get_fan_presence(fan_name)
+        if flag is True:
+            dic["Present"] = "yes"
+        elif flag is False:
+            dic["Present"] = "no"
+        else:
+            dic["Present"] = self.na_ret
+        dic["Rotors"] = fan.rotors
+        dic["AirFlow"] = fan.AirFlow
+        if dic["AirFlow"] is None:
+            dic["AirFlow"] = self.na_ret
+        dic["PowerMax"] = fan.PowerMax
+        if dic["PowerMax"] is None:
+            dic["PowerMax"] = self.na_ret
+        return dic
+
+    def get_fan_info_rotor(self, fan_name):
+        fan = self.chas.get_fan_byname(fan_name)
+        if fan is None:
+            return -1
+        rotorlist = fan.rotor_list
+        dic = collections.OrderedDict()
+        for rotor in rotorlist:
+            dic_val = collections.OrderedDict()
+            if rotor.rotor_Running is True:
+                dic_val['Running'] = 'yes'
+            else:
+                dic_val['Running'] = 'no'
+            if rotor.rotor_HwAlarm is True:
+                dic_val['HwAlarm'] = 'yes'
+            else:
+                dic_val['HwAlarm'] = 'no'
+            speed_value = rotor.rotor_Speed.Value
+            if speed_value is None:
+                dic_val['Speed'] = self.error_ret
+            else:
+                dic_val['Speed'] = int(speed_value)
+            if rotor.SpeedMin is None:
+                dic_val['SpeedMin'] = self.error_ret
+            else:
+                dic_val['SpeedMin'] = rotor.SpeedMin
+            if rotor.SpeedMax is None:
+                dic_val['SpeedMax'] = self.error_ret
+            else:
+                dic_val['SpeedMax'] = rotor.SpeedMax
+            if rotor.Tolerance is None:
+                dic_val['Tolerance'] = self.error_ret
+            else:
+                dic_val['Tolerance'] = rotor.Tolerance
+
+            dic[rotor.name] = dic_val
+        return dic
+
+    def get_fan_info_all(self):
+        fanlist = self.chas.fan_list
+        dic = collections.OrderedDict()
+        dic['Number'] = len(fanlist)
+        dic['WatchdogStatus'] = self.get_fan_watchdog_status()
+        for fan in fanlist:
+            dic[fan.name] = self.get_fan_info(fan.name)
+            dic[fan.name].update(self.get_fan_info_rotor(fan.name))
+        return dic
+
+    def temp_test(self):
+        templist = self.chas.temp_list
+        dicret = collections.OrderedDict()
+
+        for temp in templist:
+            dic = collections.OrderedDict()
+            temp_value = temp.Value
+            dic["Value"] = temp_value if (temp_value is not None) else self.error_ret
+            dic["LowAlarm"] = temp.Min
+            dic["HighAlarm"] = temp.Max
+            dicret[temp.name] = dic
+        return dicret
+
+    # dcdc
+    def get_dcdc_total_number(self):
+        dcdclist = self.chas.dcdc_list
+        if dcdclist is None:
+            return -1
+        return len(dcdclist)
+
+    def get_dcdc_by_id(self, dcdc_id):
+        dcdclist = self.chas.dcdc_list
+        dcdctmp = None
+        for dcdc in dcdclist:
+            if dcdc.dcdc_id == dcdc_id:
+                dcdctmp = dcdc
+        dic = collections.OrderedDict()
+        if dcdctmp is None:
+            dic["Name"] = self.error_ret
+            dic["Min"] = self.error_ret
+            dic["Max"] = self.error_ret
+            dic["Low"] = self.error_ret
+            dic["High"] = self.error_ret
+            dic["Value"] = self.error_ret
+            dic["Unit"] = self.error_ret
+        else:
+            dic["Name"] = dcdctmp.name
+            dic["Min"] = dcdctmp.sensor.Min
+            dic["Max"] = dcdctmp.sensor.Max
+            dic["Low"] = dcdctmp.sensor.Low
+            dic["High"] = dcdctmp.sensor.High
+            tmp = dcdctmp.sensor.Value
+            if tmp is not None:
+                dic['Value'] = tmp
+            else:
+                dic['Value'] = self.error_ret
+            dic["Unit"] = dcdctmp.sensor.Unit
+        return dic
+
+    def get_dcdc_all_info(self):
+        val_list = collections.OrderedDict()
+        dcdclist = self.chas.dcdc_list
+        for dcdc in dcdclist:
+            dicttmp = {}
+            sensorname = "%s" % (dcdc.name)
+            dicttmp['Min'] = dcdc.sensor.Min
+            dicttmp['Max'] = dcdc.sensor.Max
+            tmp = dcdc.sensor.Value
+            if tmp is not None:
+                dicttmp['Value'] = tmp
+            else:
+                dicttmp['Value'] = self.error_ret
+            dicttmp['Unit'] = dcdc.sensor.Unit
+            val_list[sensorname] = dicttmp
+        return val_list
+
+    # sensors
+    def get_monitor_temp(self, name):
+        templist = self.chas.temp_list
+        temptmp = None
+        for temp in templist:
+            if temp.name == name:
+                temptmp = temp
+
+        dic = collections.OrderedDict()
+        if temptmp is None:
+            dic["Min"] = self.error_ret
+            dic["Max"] = self.error_ret
+            dic["Value"] = self.error_ret
+            dic["Unit"] = self.error_ret
+        else:
+            dic["Min"] = temptmp.Min
+            dic["Max"] = temptmp.Max
+            temp_value = temptmp.Value
+            dic["Value"] = temp_value if (temp_value is not None) else self.error_ret
+            dic["Unit"] = temptmp.Unit
+        return dic
+
+    def get_monitor_temp_by_id(self, temp_id):
+        templist = self.chas.temp_list
+        temptmp = None
+        for temp in templist:
+            if temp.temp_id == temp_id:
+                temptmp = temp
+
+        dic = collections.OrderedDict()
+        if temptmp is None:
+            dic["Name"] = self.error_ret
+            dic["Api_name"] = self.error_ret
+            dic["Min"] = self.error_ret
+            dic["Max"] = self.error_ret
+            dic["Low"] = self.error_ret
+            dic["High"] = self.error_ret
+            dic["Value"] = self.error_ret
+            dic["Unit"] = self.error_ret
+        else:
+            dic["Name"] = temptmp.name
+            dic["Api_name"] = temptmp.api_name
+            dic["Min"] = temptmp.Min
+            dic["Max"] = temptmp.Max
+            dic["Low"] = temptmp.Low
+            dic["High"] = temptmp.High
+            temp_value = temptmp.Value
+            dic["Value"] = temp_value if (temp_value is not None) else self.error_ret
+            dic["Unit"] = temptmp.Unit
+        return dic
+
+    def get_temp_info(self):
+        val_list = collections.OrderedDict()
+        # temp
+        templist = self.chas.temp_list
+        for temp in templist:
+            dic = collections.OrderedDict()
+            dic["Min"] = temp.Min
+            dic["Max"] = temp.Max
+            dic["Low"] = temp.Low
+            dic["High"] = temp.High
+            temp_value = temp.Value
+            dic["Value"] = temp_value if (temp_value is not None) else self.error_ret
+            dic["Unit"] = temp.Unit
+            val_list[temp.name] = dic
+        return val_list
+
+    def get_sensor_info(self):
+        val_list = collections.OrderedDict()
+        # temp
+        templist = self.chas.temp_list
+        for temp in templist:
+            dic = collections.OrderedDict()
+            dic["Min"] = temp.Min
+            dic["Max"] = temp.Max
+            dic["Low"] = temp.Low
+            dic["High"] = temp.High
+            temp_value = temp.Value
+            dic["Value"] = temp_value if (temp_value is not None) else self.error_ret
+            dic["Unit"] = temp.Unit
+            val_list[temp.name] = dic
+        # fan
+        fanlist = self.chas.fan_list
+        for fan in fanlist:
+            for rotor in fan.rotor_list:
+                sensorname = "%s%s" % (fan.name, rotor.name)
+                speed = collections.OrderedDict()
+                speed['Min'] = rotor.rotor_Speed.Min
+                speed['Max'] = rotor.rotor_Speed.Max
+                rotor_speed_Value = rotor.rotor_Speed.Value
+                speed['Value'] = rotor_speed_Value if (rotor_speed_Value is not None) else self.error_ret
+                speed['Unit'] = rotor.rotor_Speed.Unit
+                val_list[sensorname] = speed
+
+        val_list.update(self.get_dcdc_all_info())
+
+        # psu
+        psulist = self.chas.psu_list
+        for psu in psulist:
+            inputdic_voltage = collections.OrderedDict()
+            inputdic_current = collections.OrderedDict()
+            inputdic_power = collections.OrderedDict()
+            outputdic_voltage = collections.OrderedDict()
+            outputdic_current = collections.OrderedDict()
+            outputdic_power = collections.OrderedDict()
+            temperature = collections.OrderedDict()
+            fanspeed = collections.OrderedDict()
+
+            psu_temp_value = psu.Temperature.Value
+            temperature["Value"] = psu_temp_value if (psu_temp_value is not None) else self.error_ret
+            temperature["Min"] = psu.Temperature.Min
+            temperature["Max"] = psu.Temperature.Max
+            temperature["Unit"] = psu.Temperature.Unit
+
+            fanspeed["Value"] = psu.FanSpeed.Value
+            fanspeed["Min"] = psu.FanSpeed.Min
+            fanspeed["Max"] = psu.FanSpeed.Max
+            fanspeed["Unit"] = psu.FanSpeed.Unit
+
+            psu_inputvoltage_value = psu.InputsVoltage.Value
+            inputdic_voltage["Value"] = psu_inputvoltage_value if (
+                psu_inputvoltage_value is not None) else self.error_ret
+            inputdic_voltage["Min"] = psu.InputsVoltage.Min
+            inputdic_voltage["Max"] = psu.InputsVoltage.Max
+            inputdic_voltage["Unit"] = psu.InputsVoltage.Unit
+
+            psu_inputcurrent_value = psu.InputsCurrent.Value
+            inputdic_current["Value"] = psu_inputcurrent_value if (
+                psu_inputcurrent_value is not None) else self.error_ret
+            inputdic_current["Min"] = psu.InputsCurrent.Min
+            inputdic_current["Max"] = psu.InputsCurrent.Max
+            inputdic_current["Unit"] = psu.InputsCurrent.Unit
+
+            psu_inputpower_value = psu.InputsPower.Value
+            inputdic_power["Value"] = psu_inputpower_value if (psu_inputpower_value is not None) else self.error_ret
+            inputdic_power["Min"] = psu.InputsPower.Min
+            inputdic_power["Max"] = psu.InputsPower.Max
+            inputdic_power["Unit"] = psu.InputsPower.Unit
+
+            psu_outputvoltage_value = psu.OutputsVoltage.Value
+            outputdic_voltage["Value"] = psu_outputvoltage_value if (
+                psu_outputvoltage_value is not None) else self.error_ret
+            outputdic_voltage["Min"] = psu.OutputsVoltage.Min
+            outputdic_voltage["Max"] = psu.OutputsVoltage.Max
+            outputdic_voltage["Unit"] = psu.OutputsVoltage.Unit
+
+            psu_outputcurrent_value = psu.OutputsCurrent.Value
+            outputdic_current["Value"] = psu_outputcurrent_value if (
+                psu_outputcurrent_value is not None) else self.error_ret
+            outputdic_current["Min"] = psu.OutputsCurrent.Min
+            outputdic_current["Max"] = psu.OutputsCurrent.Max
+            outputdic_current["Unit"] = psu.OutputsCurrent.Unit
+
+            psu_outputpower_value = psu.OutputsPower.Value
+            outputdic_power["Value"] = psu_outputpower_value if (
+                psu_outputpower_value is not None) else self.error_ret
+            outputdic_power["Min"] = psu.OutputsPower.Min
+            outputdic_power["Max"] = psu.OutputsPower.Max
+            outputdic_power["Unit"] = psu.OutputsPower.Unit
+
+            val_list["%s%s" % (psu.name, "Vol_I")] = inputdic_voltage
+            val_list["%s%s" % (psu.name, "Curr_I")] = inputdic_current
+            val_list["%s%s" % (psu.name, "Power_I")] = inputdic_power
+            val_list["%s%s" % (psu.name, "Vol_O")] = outputdic_voltage
+            val_list["%s%s" % (psu.name, "Curr_O")] = outputdic_current
+            val_list["%s%s" % (psu.name, "Power_O")] = outputdic_power
+            val_list["%s%s" % (psu.name, "Fan")] = fanspeed
+            val_list["%s%s" % (psu.name, "Temp")] = temperature
+
+        return val_list
+
+    # cpld
+    def get_cpld_total_number(self):
+        cpldlist = self.chas.cpld_list
+        return len(cpldlist)
+
+    def get_cpld_user_reg(self):
+        cpld = self.chas.get_cpld_byname("BASE_CPLD")
+        if cpld is None:
+            return None
+        return cpld.get_user_reg()
+
+    def set_cpld_user_reg(self, value):
+        if isinstance(value, int) is False:
+            baseutil.logger_debug("value must int %s" % type(value))
+            return -1
+        if (int(value) < 0 or int(value) > 255):
+            baseutil.logger_debug("value must [0 - 255]")
+            return -1
+        cpld = self.chas.get_cpld_byname("BASE_CPLD")
+        if cpld is None:
+            baseutil.logger_debug("name BASE_CPLD not find")
+            return -1
+        if cpld.set_user_reg(value) is True:
+            return 0
+        return -1
+
+    def set_cpld_console_owner(self, owner):
+        """
+        Set console I/O owner
+
+        @param owner I/O owner of the console, either "cpu" or "bmc"
+
+        @return 0 for success, -1 for failure
+        """
+        if owner is None:
+            baseutil.logger_debug("owner is None")
+            return -1
+        owner_tuple = ("cpu", "bmc")
+        if owner not in owner_tuple:
+            baseutil.logger_debug("owner is %s, must cpu or bmc" % owner)
+            return -1
+        cpld = self.chas.get_cpld_byname("BASE_CPLD")
+        if cpld is None:
+            baseutil.logger_debug("name BASE_CPLD not find")
+            return -1
+        if cpld.set_console_owner(owner) is True:
+            return 0
+        return -1
+
+    def get_cpld_version_by_id(self, cpld_id):
+        cpldlist = self.chas.cpld_list
+        cpldtmp = None
+        for cpld in cpldlist:
+            if cpld.cpld_id == cpld_id:
+                cpldtmp = cpld
+
+        dic = collections.OrderedDict()
+        if cpldtmp is None:
+            dic["Name"] = self.na_ret
+            dic["Version"] = self.na_ret
+            dic["Desc"] = self.na_ret
+            dic["Slot"] = None
+            dic["Warm"] = None
+        else:
+            dic["Name"] = cpldtmp.name
+            dic["Version"] = cpldtmp.get_version()
+            dic["Desc"] = cpldtmp.desc
+            dic["Slot"] = cpldtmp.slot
+            dic["Warm"] = cpldtmp.warm
+        return dic
+
+    def get_cpld_all_version(self):
+        """
+        Get version of all CPLDs' that can be read from BMC
+
+        @return dict of CPLDs' version or None for failure.
+                example outputs:
+                {
+                    "BASE_CPLD": "0.1",     # or "N/A" for read failure
+                    "FAN_CPLD": "0.2"
+                }
+        """
+        cpld_version = {
+            "BASE_CPLD": "N/A",
+            "FAN_CPLD": "N/A"
+        }
+        for cpld_name in cpld_version:
+            cpld = self.chas.get_cpld_byname(cpld_name)
+            if cpld is None:
+                baseutil.logger_debug("name %s not find" % cpld_name)
+                continue
+            cpld_version[cpld_name] = cpld.get_version()
+        return cpld_version
+
+    # comp
+    def get_comp_total_number(self):
+        complist = self.chas.comp_list
+        return len(complist)
+
+    def get_comp_list(self):
+        return self.chas.comp_list
+
+    def get_comp_id(self, comp):
+        return comp.comp_id
+
+    def get_comp_version_by_id(self, comp_id):
+        comp_list = self.chas.comp_list
+        comptmp = None
+        for comp in comp_list:
+            if comp.comp_id == comp_id:
+                comptmp = comp
+                break
+
+        dic = collections.OrderedDict()
+        if comptmp is None:
+            dic["Name"] = self.na_ret
+            dic["Version"] = self.na_ret
+            dic["Desc"] = self.na_ret
+            dic["Slot"] = None
+        else:
+            dic["Name"] = comptmp.name
+            dic["Version"] = comptmp.get_version()
+            dic["Desc"] = comptmp.desc
+            dic["Slot"] = comptmp.slot
+        return dic
+
+    def get_bmc_productname(self):
+        """
+        Get product name
+
+        @return product name string, e.g. $(device name)-F-$(VENDOR_NAME), if error return "N/A"
+        """
+        bmc = self.chas.get_bmc_byname("master")
+        if bmc is None:
+            baseutil.logger_debug("name bmc(master) not find")
+            return self.na_ret
+        return bmc.get_productname()
+
+    def call_bmc_diagcmd(self, cmdstr):
+        """
+        Call BMC diag comman func
+
+        @return ret: 0 sucess , -1 fail
+                outmsg: if success is out msg, or fail is err msg
+        """
+        if (cmdstr is None or cmdstr == ""):
+            outmsg = "cmdstr is empty"
+            baseutil.logger_debug(outmsg)
+            return -1, outmsg
+        bmc = self.chas.get_bmc_byname("master")
+        if bmc is None:
+            outmsg = "name bmc(master) not find"
+            baseutil.logger_debug(outmsg)
+            return -1, outmsg
+        baseutil.logger_debug("call cmdstr %s" % cmdstr)
+        return bmc.call_diagcmd(cmdstr)
+
+    def write_bios_version(self, flash, version):
+        bios = self.chas.get_bios_byname("master")
+        if bios is None:
+            baseutil.logger_debug("name bios(master) not find")
+            return -1
+        return bios.set_bios_version(flash, version)
+
+    def get_bios_version(self):
+        bios = self.chas.get_bios_byname("master")
+        if bios is None:
+            baseutil.logger_debug("name bios(master) not find")
+            return -1
+        return bios.get_bios_version()
+
+    def get_bios_status(self):
+        bios = self.chas.get_bios_byname("master")
+        if bios is None:
+            baseutil.logger_debug("name bios(master) not find")
+            return -1
+        return bios.get_bios_boot_status()
+
+    def get_bmc_mac_rov(self):
+        """
+        Get BMC mac rov
+
+        @return ret: 0 sucess , -1 fail
+                outmsg: if success is out msg, or fail is err msg
+        """
+        bmc = self.chas.get_bmc_byname("master")
+        if bmc is None:
+            msg = "name master not find"
+            baseutil.logger_debug(msg)
+            return -1, msg
+        return bmc.get_mac_rov()
+
+    def get_bmc_next_boot(self):
+        """
+        Get next booting flash of BMC
+
+        @return 'master'/'slave' on success, "N/A" for failure
+        """
+        bmc = self.chas.get_bmc_byname("master")
+        if bmc is None:
+            baseutil.logger_debug("name master not find")
+            return self.na_ret
+        return bmc.get_next_boot()
+
+    def set_bmc_next_boot(self, flash):
+        """
+        Set flash from which next BMC boot
+
+        @param flash Booting flash of BMC, "master" or "slave"
+
+        @return 0 on success, -1 for failure
+        """
+        flash_status = ("master", "slave")
+        if flash is None or flash not in flash_status:
+            baseutil.logger_debug("parameter flash illegal, should be [master|slave]")
+            return -1
+        bmc = self.chas.get_bmc_byname("master")
+        if bmc is None:
+            baseutil.logger_debug("name master not find")
+            return -1
+        return bmc.set_next_boot(flash)
+
+    def reboot_bmc(self):
+        """
+        Reboot running BMC
+        """
+        bmc = self.chas.get_bmc_byname("master")
+        if bmc is None:
+            baseutil.logger_debug("name master not find")
+            return -1
+        return bmc.reboot()
+
+    def get_bmc_info(self):
+        """
+        Get BMC info
+
+        @return dict of BMC info or None for failure
+                    "Version": "1.1.1", # "N/A"
+                    "Flash": "master",  # "N/A"
+                    "Next": "master"    # "N/A"
+        """
+        bmc = self.chas.get_bmc_byname("master")
+        if bmc is None:
+            baseutil.logger_debug("name master not find")
+            return self.na_ret
+        return bmc.get_info()
+
+    def get_bmc_version_all(self):
+        """
+        @return dict of BMCs
+                {
+                    "MasterVersion": "1.1.1",   # "N/A"
+                    "SlaveVersion": "1.1.1"     # "N/A"
+                }
+        """
+        bmc = self.chas.get_bmc_byname("master")
+        if bmc is None:
+            baseutil.logger_debug("name master not find")
+            return self.na_ret
+        return bmc.get_version_all()
+
+    def bmc_execute_command(self, cmd_str):
+        ret, output = osutil.command(cmd_str)
+        if ret:
+            baseutil.logger_debug("execute %s command failed" % (cmd_str))
+        return ret, output
+
+    def get_cpu_reset_num(self):
+        """
+        Get CPU reset num
+        @return CPU reset num on success, -1 for failure
+        """
+        cpu = self.chas.get_cpu_byname("cpu")
+        if cpu is None:
+            msg = "name cpu not find"
+            baseutil.logger_debug(msg)
+            return -1
+        return cpu.get_cpu_reset_num()
+
+    def get_cpu_reboot_cause(self):
+        """
+        Get CPU reboot cause
+        @return string of cpu reboot reason
+        """
+        cpu = self.chas.get_cpu_byname("cpu")
+        if cpu is None:
+            msg = "name cpu not find"
+            baseutil.logger_debug(msg)
+            return "Unknown reboot cause"
+        return cpu.get_cpu_reboot_cause()
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/led.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/led.py
new file mode 100644
index 000000000000..7fb869c74d7f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/led.py
@@ -0,0 +1,52 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# led.py
+# Python implementation of the Class led
+#
+#######################################################
+from plat_hal.devicebase import devicebase
+
+
+class led(devicebase):
+    def __init__(self, conf=None):
+        if conf is not None:
+            self.name = conf.get('name', None)
+            self.led_type = conf.get('led_type', None)
+            self.led_attrs_config = conf.get('led_attrs', None)
+            self.led_config = conf.get('led', None)
+
+    def set_color(self, color):
+        status = self.led_attrs_config.get(color, None)
+        if status is None:
+            return False
+
+        mask = self.led_attrs_config.get('mask', 0xff)
+
+        if isinstance(self.led_config, list):
+            for led_config_index in self.led_config:
+                ret, value = self.get_value(led_config_index)
+                if (ret is False) or (value is None):
+                    return False
+                setval = (int(value) & ~mask) | (status)
+                ret, val = self.set_value(led_config_index, setval)
+                if ret is False:
+                    return ret
+        else:
+            ret, value = self.get_value(self.led_config)
+            if (ret is False) or (value is None):
+                return False
+            setval = (int(value) & ~mask) | (status)
+            ret, val = self.set_value(self.led_config, setval)
+        return ret
+
+    def get_color(self):
+        mask = self.led_attrs_config.get('mask', 0xff)
+        ret, value = self.get_value(self.led_config)
+        if ret is False or value is None:
+            return False, 'N/A'
+        ledval = int(value) & mask
+        for key, val in self.led_attrs_config.items():
+            if (ledval == val) and (key != "mask"):
+                return True, key
+        return False, 'N/A'
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/onie_e2.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/onie_e2.py
new file mode 100644
index 000000000000..9ac32cace263
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/onie_e2.py
@@ -0,0 +1,127 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# onie_e2.py
+# Python implementation of the Class onie_e2
+#
+#######################################################
+from plat_hal.devicebase import devicebase
+from eepromutil.onietlv import onie_tlv
+
+
+class onie_e2(devicebase):
+
+    def __init__(self, conf=None):
+        self._cardid = ""
+        self._productname = ""
+        self._partnum = ""
+        self._serialnum = ""
+        self._macbase = ""
+        self._manufdate = ""
+        self._deviceversion = ""
+        self._labelrevision = ""
+        self._platformname = ""
+        self._onieversion = ""
+        self._macsize = ""
+        self._manufname = ""
+        self._manufcountry = ""
+        self._vendorname = ""
+        self._diagname = ""
+        self._servicetag = ""
+
+        if conf is not None:
+            self.name = conf.get('name', None)
+            self.e2loc = conf.get('e2loc', None)
+            self.e2_path = self.e2loc.get('loc', None)
+            self.airflow = conf.get('airflow', "intake")
+
+    @property
+    def cardid(self):
+        return self._cardid
+
+    @property
+    def productname(self):
+        return self._productname
+
+    @property
+    def partnum(self):
+        return self._partnum
+
+    @property
+    def serialnum(self):
+        return self._serialnum
+
+    @property
+    def macbase(self):
+        return self._macbase
+
+    @property
+    def manufdate(self):
+        return self._manufdate
+
+    @property
+    def deviceversion(self):
+        return self._deviceversion
+
+    @property
+    def labelrevision(self):
+        return self._labelrevision
+
+    @property
+    def platformname(self):
+        return self._platformname
+
+    @property
+    def onieversion(self):
+        return self._onieversion
+
+    @property
+    def macsize(self):
+        return self._macsize
+
+    @property
+    def manufname(self):
+        return self._manufname
+
+    @property
+    def manufcountry(self):
+        return self._manufcountry
+
+    @property
+    def vendorname(self):
+        return self._vendorname
+
+    @property
+    def diagname(self):
+        return self._diagname
+
+    @property
+    def servicetag(self):
+        return self._servicetag
+
+    def get_onie_e2_info(self):
+        try:
+            eeprom = self.get_eeprom_info(self.e2loc)
+            if eeprom is None:
+                raise Exception("%s: value is none" % self.name)
+            onietlv = onie_tlv()
+            onietlv.decode(eeprom)
+            self._cardid = onietlv.cardid
+            self._productname = onietlv.productname
+            self._partnum = onietlv.partnum
+            self._serialnum = onietlv.serialnum
+            self._macbase = onietlv.macbase
+            self._manufdate = onietlv.manufdate
+            self._deviceversion = onietlv.deviceversion
+            self._labelrevision = onietlv.labelrevision
+            self._platformname = onietlv.platformname
+            self._onieversion = onietlv.onieversion
+            self._macsize = onietlv.macsize
+            self._manufname = onietlv.manufname
+            self._manufcountry = onietlv.manufcountry
+            self._vendorname = onietlv.vendorname
+            self._diagname = onietlv.diagname
+            self._servicetag = onietlv.servicetag
+        except Exception:
+            return False
+        return True
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/osutil.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/osutil.py
new file mode 100644
index 000000000000..684e26bb9ecd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/osutil.py
@@ -0,0 +1,440 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# osutil.py
+# Python implementation of the Class osutil
+#
+#######################################################
+
+import os
+import glob
+import re
+import time
+import subprocess
+import fcntl
+import syslog
+from functools import wraps
+from wbutil.smbus import SMBus
+
+
+PLATFORM_HAL_DEBUG_FILE = "/etc/.platform_hal_debug_flag"
+
+
+def platform_hal_debug(s):
+    if os.path.exists(PLATFORM_HAL_DEBUG_FILE):
+        syslog.openlog("PLATFORM_HAL", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def retry(maxretry=6, delay=0.01):
+    '''
+        maxretry:  max retry times
+        delay   :  interval after last retry
+    '''
+    def decorator(f):
+        @wraps(f)
+        def wrapper(*args, **kwargs):
+            time_retry = maxretry
+            time_delay = delay
+            result_msg = ""
+            while time_retry:
+                try:
+                    val, result_msg = f(*args, **kwargs)
+                    if val is True:
+                        return val, result_msg
+                    time_retry -= 1
+                    time.sleep(time_delay)
+                except Exception as e:
+                    time_retry -= 1
+                    result_msg = str(e)
+                    time.sleep(time_delay)
+            return False, "max time retry last errmsg is {}".format(result_msg)
+        return wrapper
+    return decorator
+
+
+pidfile = None
+
+
+def file_rw_lock(file_path):
+    global pidfile
+    pidfile = open(file_path, "r")
+    try:
+        fcntl.flock(pidfile, fcntl.LOCK_EX | fcntl.LOCK_NB)
+        platform_hal_debug("file_rw_lock success")
+        return True
+    except Exception:
+        if pidfile is not None:
+            pidfile.close()
+            pidfile = None
+        return False
+
+
+def file_rw_unlock():
+    try:
+        global pidfile
+
+        if pidfile is not None:
+            fcntl.flock(pidfile, fcntl.LOCK_UN)
+            pidfile.close()
+            pidfile = None
+            platform_hal_debug("file_rw_unlock success")
+        else:
+            platform_hal_debug("pidfile is invalid, do nothing")
+        return True
+    except Exception as e:
+        platform_hal_debug("file_rw_unlock err, msg: %s" % (str(e)))
+        return False
+
+
+def take_file_rw_lock(file_path):
+    loop = 1000
+    ret = False
+    for i in range(0, loop):
+        ret = file_rw_lock(file_path)
+        if ret is True:
+            break
+        time.sleep(0.001)
+    return ret
+
+
+class osutil(object):
+    """
+       osutil
+    """
+
+    @staticmethod
+    @retry(maxretry=6)
+    def wbi2cget_python(bus, addr, reg):
+        with SMBus(bus) as y:
+            val, ind = y.read_byte_data(addr, reg, True)
+        return val, ind
+
+    @staticmethod
+    @retry(maxretry=6)
+    def wbi2cset_python(bus, addr, reg, value):
+        with SMBus(bus) as y:
+            val, ind = y.write_byte_data(addr, reg, value, True)
+        return val, ind
+
+    @staticmethod
+    @retry(maxretry=6)
+    def wbi2cgetword_python(bus, addr, reg):
+        with SMBus(bus) as y:
+            val, ind = y.read_word_data(addr, reg, True)
+        return val, ind
+
+    @staticmethod
+    @retry(maxretry=6)
+    def wbi2csetword_python(bus, addr, reg, value):
+        with SMBus(bus) as y:
+            val, ind = y.write_word_data(addr, reg, value, True)
+        return val, ind
+
+    @staticmethod
+    @retry(maxretry=6)
+    def wbi2csetwordpec_python(bus, addr, reg, value):
+        with SMBus(bus) as y:
+            val, ind = y.write_word_data_pec(addr, reg, value, True)
+        return val, ind
+
+    @staticmethod
+    @retry(maxretry=6)
+    def wbi2cset_byte_pec_python(bus, addr, reg, value):
+        with SMBus(bus) as y:
+            val, ind = y.write_byte_data_pec(addr, reg, value, True)
+        return val, ind
+
+    @staticmethod
+    def command(cmdstr):
+        retcode, output = subprocess.getstatusoutput(cmdstr)
+        return retcode, output
+
+    @staticmethod
+    def geti2cword_i2ctool(bus, addr, offset):
+        command_line = "i2cget -f -y %d 0x%02x 0x%02x  wp" % (bus, addr, offset)
+        retrytime = 6
+        ret_t = ""
+        for i in range(retrytime):
+            ret, ret_t = osutil.command(command_line)
+            if ret == 0:
+                return True, int(ret_t, 16)
+            time.sleep(0.1)
+        return False, ret_t
+
+    @staticmethod
+    def seti2cword_i2ctool(bus, addr, offset, val):
+        command_line = "i2cset -f -y %d 0x%02x 0x%0x 0x%04x wp" % (bus, addr, offset, val)
+        retrytime = 6
+        ret_t = ""
+        for i in range(retrytime):
+            ret, ret_t = osutil.command(command_line)
+            if ret == 0:
+                return True, ret_t
+            time.sleep(0.1)
+        return False, ret_t
+
+    @staticmethod
+    def wbi2cget_i2ctool(bus, devno, address):
+        command_line = "i2cget -f -y %d 0x%02x 0x%02x " % (bus, devno, address)
+        retrytime = 6
+        ret_t = ""
+        for i in range(retrytime):
+            ret, ret_t = osutil.command(command_line)
+            if ret == 0:
+                return True, int(ret_t, 16)
+            time.sleep(0.1)
+        return False, ret_t
+
+    @staticmethod
+    def wbi2cset_i2ctool(bus, devno, address, byte):
+        command_line = "i2cset -f -y %d 0x%02x 0x%02x 0x%02x" % (
+            bus, devno, address, byte)
+        retrytime = 6
+        ret_t = ""
+        for i in range(retrytime):
+            ret, ret_t = osutil.command(command_line)
+            if ret == 0:
+                return True, ret_t
+        return False, ret_t
+
+    @staticmethod
+    def geti2cword(bus, addr, offset):
+        return osutil.wbi2cgetword_python(bus, addr, offset)
+
+    @staticmethod
+    def seti2cword(bus, addr, offset, val):
+        return osutil.wbi2csetword_python(bus, addr, offset, val)
+
+    @staticmethod
+    def seti2cwordpec(bus, addr, offset, val):
+        return osutil.wbi2csetwordpec_python(bus, addr, offset, val)
+
+    @staticmethod
+    def seti2c_byte_pec(bus, addr, offset, val):
+        return osutil.wbi2cset_byte_pec_python(bus, addr, offset, val)
+
+    @staticmethod
+    def wbi2cget(bus, devno, address):
+        return osutil.wbi2cget_python(bus, devno, address)
+
+    @staticmethod
+    def wbi2cset(bus, devno, address, byte):
+        return osutil.wbi2cset_python(bus, devno, address, byte)
+
+    @staticmethod
+    def byteTostr(val):
+        strtmp = ''
+        for value in val:
+            strtmp += chr(value)
+        return strtmp
+
+    @staticmethod
+    def io_rd(reg_addr, read_len=1):
+        try:
+            regaddr = 0
+            if isinstance(reg_addr, int):
+                regaddr = reg_addr
+            else:
+                regaddr = int(reg_addr, 16)
+            devfile = "/dev/port"
+            fd = os.open(devfile, os.O_RDWR | os.O_CREAT)
+            os.lseek(fd, regaddr, os.SEEK_SET)
+            val = os.read(fd, read_len)
+            return True, "".join(["%02x" % item for item in val])
+        except ValueError as e:
+            return False, str(e)
+        except Exception as e:
+            return False, str(e)
+        finally:
+            os.close(fd)
+
+    @staticmethod
+    def readsysfs(location, flock_path=None):
+        flock_path_tmp = None
+        platform_hal_debug("readsysfs, location:%s, flock_path:%s" % (location, flock_path))
+        try:
+            if flock_path is not None:
+                flock_paths = glob.glob(flock_path)
+                if len(flock_paths) != 0:
+                    flock_path_tmp = flock_paths[0]
+                    platform_hal_debug("try to get file lock, path:%s" % flock_path_tmp)
+                    ret = take_file_rw_lock(flock_path_tmp)
+                    if ret is False:
+                        platform_hal_debug("take file lock timeout, path:%s" % flock_path_tmp)
+                        return False, ("take file rw lock timeout, path:%s" % flock_path_tmp)
+                else:
+                    platform_hal_debug("config error, can't find flock_path:%s" % flock_path)
+
+            locations = glob.glob(location)
+            with open(locations[0], 'rb') as fd1:
+                retval = fd1.read()
+            retval = osutil.byteTostr(retval)
+            if flock_path_tmp is not None:
+                file_rw_unlock()
+
+            retval = retval.rstrip('\r\n')
+            retval = retval.lstrip(" ")
+        except Exception as e:
+            if flock_path_tmp is not None:
+                file_rw_unlock()
+            platform_hal_debug("readsysfs error, msg:%s" % str(e))
+            return False, (str(e) + " location[%s]" % location)
+        return True, retval
+
+    @staticmethod
+    def writesysfs(location, value):
+        try:
+            if not os.path.isfile(location):
+                print(location, 'not found !')
+                return False, ("location[%s] not found !" % location)
+            with open(location, 'w') as fd1:
+                fd1.write(value)
+        except Exception as e:
+            return False, (str(e) + " location[%s]" % location)
+        return True, ("set location[%s] %s success !" % (location, value))
+
+    @staticmethod
+    def getdevmem(addr, digit, mask):
+        command_line = "devmem 0x%02x %d" % (addr, digit)
+        retrytime = 6
+        ret_t = ""
+        for i in range(retrytime):
+            ret, ret_t = osutil.command(command_line)
+            if ret == 0:
+                if mask is not None:
+                    ret_t = str(int(ret_t, 16) & mask)
+            return True, ret_t
+        return False, ret_t
+
+    @staticmethod
+    def readdevfile_ascii(path, offset, length):
+        msg = ""
+        ret = ""
+        joinstr = ''
+        fd = -1
+
+        if not os.path.exists(path):
+            msg = path + " not found !"
+            return False, msg
+
+        try:
+            fd = os.open(path, os.O_RDONLY)
+            os.lseek(fd, offset, os.SEEK_SET)
+            ret = os.read(fd, length)
+            for item in ret:
+                joinstr += '%02x ' % item  # like sysfs, display in hex
+        except Exception as e:
+            msg = str(e)
+            return False, msg
+        finally:
+            if fd > 0:
+                os.close(fd)
+        return True, joinstr
+
+    @staticmethod
+    def readdevfile(path, offset, length):
+        msg = ""
+        ret = ""
+        fd = -1
+        val_list = []
+
+        if not os.path.exists(path):
+            msg = path + " not found !"
+            return False, msg
+
+        try:
+            fd = os.open(path, os.O_RDONLY)
+            os.lseek(fd, offset, os.SEEK_SET)
+            ret = os.read(fd, length)
+            for item in ret:
+                val_list.append(item)
+        except Exception as e:
+            msg = str(e)
+            return False, msg
+        finally:
+            if fd > 0:
+                os.close(fd)
+        return True, val_list
+
+    @staticmethod
+    def writedevfile(path, offset, buf):
+        msg = ""
+        fd = -1
+
+        if not os.path.exists(path):
+            msg = path + " not found !"
+            return False, msg
+
+        if isinstance(buf, list):
+            if len(buf) == 0:
+                msg = "buf:%s is NONE !" % buf
+                return False, msg
+        elif isinstance(buf, int):
+            buf = [buf]
+        else:
+            msg = "buf:%s is not list type or not int type !" % buf
+            return False, msg
+
+        try:
+            fd = os.open(path, os.O_WRONLY)
+            os.lseek(fd, offset, os.SEEK_SET)
+            ret = os.write(fd, bytes(buf))
+        except Exception as e:
+            msg = str(e)
+            return False, msg
+        finally:
+            if fd > 0:
+                os.close(fd)
+
+        return True, ret
+
+    @staticmethod
+    def wb_os_system(cmd):
+        status, output = subprocess.getstatusoutput(cmd)
+        return status, output
+
+    @staticmethod
+    def getsdkreg(reg):
+        try:
+            cmd = "bcmcmd -t 1 'getr %s ' < /dev/null" % reg
+            ret, result = osutil.wb_os_system(cmd)
+            result_t = result.strip().replace("\r", "").replace("\n", "")
+            if ret != 0 or "Error:" in result_t:
+                return False, result
+            patt = r"%s.(.*):(.*)>drivshell" % reg
+            rt = re.findall(patt, result_t, re.S)
+            test = re.findall("=(.*)", rt[0][0])[0]
+        except Exception as e:
+            return False, 'get sdk register error, msg: %s' % str(e)
+        return True, test
+
+    @staticmethod
+    def getmactemp():
+        try:
+            result = {}
+            # need to exec twice
+            osutil.wb_os_system("bcmcmd -t 1 \"show temp\" < /dev/null")
+            ret, log = osutil.wb_os_system("bcmcmd -t 1 \"show temp\" < /dev/null")
+            if ret:
+                return False, result
+            logs = log.splitlines()
+            for line in logs:
+                if "average" in line:
+                    b = re.findall(r'\d+.\d+', line)
+                    result["average"] = b[0]
+                elif "maximum" in line:
+                    b = re.findall(r'\d+.\d+', line)
+                    result["maximum"] = b[0]
+        except Exception as e:
+            return False, str(e)
+        return True, result
+
+    @staticmethod
+    def std_match(stdout, pattern):
+        if pattern is None:
+            return stdout.strip()
+        for line in stdout.splitlines():
+            if re.match(pattern, line):
+                return line.strip()
+        return None
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py
new file mode 100644
index 000000000000..e7db0cdcca8b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py
@@ -0,0 +1,607 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# psu.py
+# Python implementation of the Class psu
+#
+#######################################################
+from eepromutil.fru import ipmifru
+from plat_hal.devicebase import devicebase
+from plat_hal.sensor import sensor
+
+
+class psu(devicebase):
+    __pmbus = None
+    __e2loc = None
+    __productManufacturer = None  # : ARTESYN
+    __productName = None  # : CRPS550W
+    __productPartModelName = None  # : CSU550AP-3-300
+    __productVersion = None  # : AB
+    __productSerialNumber = None  # : M623UZ00JYABL
+    __AirFlow = None  # 'N/A'
+    __AirFlowconifg = None
+    __psu_display_name = None  # 'N/A'
+    __psu_display_name_conifg = None
+    __psu_not_present_pwm = None
+    __InputStatus_config = None
+    __OutputStatus_config = None
+    __FanSpeed_config = None
+    __Temperature_config = None
+    __InputStatus = None
+    __OutputStatus = None
+    __FanSpeed = None
+    __Temperature = None
+    __FanSpeedMin = None
+    __FanSpeedMax = None
+    __FanSpeedTolerance = None
+    __InputsVoltage_config = None
+    __InputsCurrent_config = None
+    __InputsPower_config = None
+    __OutputsVoltage_config = None
+    __OutputsCurrent_config = None
+    __OutputsPower_config = None
+    __InputsVoltage = {}
+    __InputsCurrent = None
+    __InputsPower = None
+    __OutputsVoltage = None
+    __OutputsCurrent = None
+    __OutputsPower = None
+    __InputsType_config = None
+    __InputsType = None
+    __psu_sn_config = None
+    __psu_hw_config = None
+    __psu_pn_config = None
+    __psu_vendor_config = None
+    __TempStatus_config = None
+    __FanStatus_config = None
+    __TempStatus = None
+    __FanStatus = None
+
+    def __init__(self, conf=None):
+        self.pmbus = conf.get("pmbusloc", None)
+        self.e2loc = conf.get("e2loc", None)
+        self.__presentconfig = conf.get("present", None)
+        self.name = conf.get("name", None)
+        self.AirFlowconifg = conf.get("airflow", None)
+        self.psu_display_name_conifg = conf.get("psu_display_name", None)
+        self.psu_not_present_pwm = conf.get("psu_not_present_pwm", 100)
+        self.Temperature_config = conf.get("Temperature", None)
+        self.Temperature = sensor(self.Temperature_config)
+
+        self.FanSpeedTolerance = conf.get('psu_fan_tolerance', 30)
+        self.FanSpeed_config = conf.get("FanSpeed", None)
+        self.FanSpeed = sensor(self.FanSpeed_config)
+
+        self.__InputsVoltage_config = conf.get("InputsVoltage", None)
+        self.generate_psu_input_vol(self.__InputsVoltage_config)
+        self.__InputsCurrent_config = conf.get("InputsCurrent", None)
+        self.InputsCurrent = sensor(self.__InputsCurrent_config)
+        self.__InputsPower_config = conf.get("InputsPower", None)
+        self.InputsPower = sensor(self.__InputsPower_config)
+        self.__OutputsVoltage_config = conf.get("OutputsVoltage", None)
+        self.OutputsVoltage = sensor(self.__OutputsVoltage_config)
+        self.__OutputsCurrent_config = conf.get("OutputsCurrent", None)
+        self.OutputsCurrent = sensor(self.__OutputsCurrent_config)
+        self.__OutputsPower_config = conf.get("OutputsPower", None)
+        self.OutputsPower = sensor(self.__OutputsPower_config)
+
+        self.__InputStatus_config = conf.get("InputsStatus", None)
+        self.__OutputStatus_config = conf.get("OutputsStatus", None)
+        self.__InputsType_config = conf.get('InputsType', None)
+        self.__psu_sn_config = conf.get('psu_sn', None)
+        self.__psu_hw_config = conf.get('psu_hw', None)
+        self.__psu_pn_config = conf.get('psu_pn', None)
+        self.__psu_vendor_config = conf.get('psu_vendor', None)
+        self.__TempStatus_config = conf.get("TempStatus", None)
+        self.__FanStatus_config = conf.get("FanStatus", None)
+
+    def generate_psu_input_vol(self, config):
+        tmp = {}
+        for (key, item) in config.items():
+            tmp.setdefault(key, sensor(item))
+        self.__InputsVoltage = tmp
+
+    def get_psu_sensor_by_name(self, psutype):
+        return self.__InputsVoltage.get(psutype) or self.__InputsVoltage.get('other')
+
+    @property
+    def InputsVoltage(self):
+        psutype = self.InputsType
+        input_sensor = self.get_psu_sensor_by_name(psutype)
+        if input_sensor is None:
+            return None
+        return input_sensor
+
+    @InputsVoltage.setter
+    def InputsVoltage(self, val):
+        self.__InputsVoltage = val
+
+    @property
+    def InputsCurrent(self):
+        return self.__InputsCurrent
+
+    @InputsCurrent.setter
+    def InputsCurrent(self, val):
+        self.__InputsCurrent = val
+
+    @property
+    def InputsPower(self):
+        return self.__InputsPower
+
+    @InputsPower.setter
+    def InputsPower(self, val):
+        self.__InputsPower = val
+
+    @property
+    def OutputsVoltage(self):
+        return self.__OutputsVoltage
+
+    @OutputsVoltage.setter
+    def OutputsVoltage(self, val):
+        self.__OutputsVoltage = val
+
+    @property
+    def OutputsCurrent(self):
+        return self.__OutputsCurrent
+
+    @OutputsCurrent.setter
+    def OutputsCurrent(self, val):
+        self.__OutputsCurrent = val
+
+    @property
+    def OutputsPower(self):
+        return self.__OutputsPower
+
+    @OutputsPower.setter
+    def OutputsPower(self, val):
+        self.__OutputsPower = val
+
+    @property
+    def InputStatus(self):
+        if self.present is False:
+            self.__InputStatus = False
+        else:
+            ret, val = self.get_value(self.__InputStatus_config)
+            mask = self.__InputStatus_config.get("mask")
+            if ret is True:
+                ttt = val & mask
+                if ttt == 0:
+                    self.__InputStatus = True
+                else:
+                    self.__InputStatus = False
+            else:
+                self.__InputStatus = False
+        return self.__InputStatus
+
+    @InputStatus.setter
+    def InputStatus(self, val):
+        self.__InputStatus = val
+
+    @property
+    def TempStatus(self):
+        if self.__TempStatus_config is None:
+            return None
+        if self.present is False:
+            self.__TempStatus = False
+        else:
+            ret, val = self.get_value(self.__TempStatus_config)
+            mask = self.__TempStatus_config.get("mask")
+            if ret is True:
+                ttt = val & mask
+                if ttt == 0:
+                    self.__TempStatus = True
+                else:
+                    self.__TempStatus = False
+            else:
+                self.__TempStatus = False
+        return self.__TempStatus
+
+    @TempStatus.setter
+    def TempStatus(self, val):
+        self.__TempStatus = val
+
+    @property
+    def FanStatus(self):
+        if self.__FanStatus_config is None:
+            return None
+        if self.present is False:
+            self.__FanStatus = False
+        else:
+            ret, val = self.get_value(self.__FanStatus_config)
+            mask = self.__FanStatus_config.get("mask")
+            if ret is True:
+                ttt = val & mask
+                if ttt == 0:
+                    self.__FanStatus = True
+                else:
+                    self.__FanStatus = False
+            else:
+                self.__FanStatus = False
+        return self.__FanStatus
+
+    @FanStatus.setter
+    def FanStatus(self, val):
+        self.__FanStatus = val
+
+    @property
+    def InputsType(self):
+        psutypedecode = self.__InputsType_config.get('psutypedecode', None)
+        if self.present is False:
+            self.__InputsType = psutypedecode.get(0x00)
+        else:
+            ret, val = self.get_value(self.__InputsType_config)
+            self.__InputsType = self.__InputsType_config.get(val, None)
+            if self.__InputsType is not None:
+                return self.__InputsType
+            if ret is True and val in psutypedecode:
+                self.__InputsType = psutypedecode.get(val)
+            else:
+                self.__InputsType = psutypedecode.get(0x00)
+        return self.__InputsType
+
+    @InputsType.setter
+    def InputsType(self, val):
+        self.__InputsType = val
+
+    @property
+    def FanSpeedMin(self):
+        return self.__FanSpeedMin
+
+    @FanSpeedMin.setter
+    def FanSpeedMin(self, val):
+        self.__FanSpeedMin = val
+
+    @property
+    def FanSpeedMax(self):
+        return self.__FanSpeedMax
+
+    @FanSpeedMax.setter
+    def FanSpeedMax(self, val):
+        self.__FanSpeedMax = val
+
+    @property
+    def FanSpeedTolerance(self):
+        return self.__FanSpeedTolerance
+
+    @FanSpeedTolerance.setter
+    def FanSpeedTolerance(self, val):
+        self.__FanSpeedTolerance = val
+
+    @property
+    def OutputStatus(self):
+        if self.present is False:
+            self.__OutputStatus = False
+        else:
+            ret, val = self.get_value(self.__OutputStatus_config)
+            mask = self.__OutputStatus_config.get("mask")
+            if ret is True:
+                ttt = val & mask
+                if ttt == 0:
+                    self.__OutputStatus = True
+                else:
+                    self.__OutputStatus = False
+            else:
+                self.__OutputStatus = False
+        return self.__OutputStatus
+
+    @OutputStatus.setter
+    def OutputStatus(self, val):
+        self.__OutputStatus = val
+
+    @property
+    def FanSpeed(self):
+        return self.__FanSpeed
+
+    @FanSpeed.setter
+    def FanSpeed(self, val):
+        self.__FanSpeed = val
+
+    @property
+    def Temperature(self):
+        return self.__Temperature
+
+    @Temperature.setter
+    def Temperature(self, val):
+        self.__Temperature = val
+
+    @property
+    def Temperature_config(self):
+        return self.__Temperature_config
+
+    @Temperature_config.setter
+    def Temperature_config(self, val):
+        self.__Temperature_config = val
+
+    @property
+    def AirFlowconifg(self):
+        return self.__AirFlowconifg
+
+    @AirFlowconifg.setter
+    def AirFlowconifg(self, val):
+        self.__AirFlowconifg = val
+
+    @property
+    def psu_display_name_conifg(self):
+        return self.__psu_display_name_conifg
+
+    @psu_display_name_conifg.setter
+    def psu_display_name_conifg(self, val):
+        self.__psu_display_name_conifg = val
+
+    @property
+    def pmbus(self):
+        return self.__pmbus
+
+    @pmbus.setter
+    def pmbus(self, val):
+        self.__pmbus = val
+
+    @property
+    def e2loc(self):
+        return self.__e2loc
+
+    @e2loc.setter
+    def e2loc(self, val):
+        self.__e2loc = val
+
+    @property
+    def AirFlow(self):
+        return self.__AirFlow
+
+    @AirFlow.setter
+    def AirFlow(self, val):
+        self.__AirFlow = val
+
+    @property
+    def psu_display_name(self):
+        return self.__psu_display_name
+
+    @psu_display_name.setter
+    def psu_display_name(self, val):
+        self.__psu_display_name = val
+
+    @property
+    def psu_not_present_pwm(self):
+        return self.__psu_not_present_pwm
+
+    @psu_not_present_pwm.setter
+    def psu_not_present_pwm(self, val):
+        self.__psu_not_present_pwm = val
+
+    @property
+    def present(self):
+        ret, val = self.get_value(self.__presentconfig)
+        if ret is False or val is None:
+            return False
+        mask = self.__presentconfig.get("mask")
+        if isinstance(val, str):
+            value = int(val, 16)
+        else:
+            value = val
+        ttt = value & mask
+        okval = self.__presentconfig.get("okval", 0)
+        if ttt == okval:
+            return True
+        return False
+
+    @property
+    def productManufacturer(self):
+        return self.__productManufacturer
+
+    @productManufacturer.setter
+    def productManufacturer(self, val):
+        self.__productManufacturer = val
+
+    @property
+    def productName(self):
+        return self.__productName
+
+    @productName.setter
+    def productName(self, val):
+        self.__productName = val
+
+    @property
+    def productPartModelName(self):
+        return self.__productPartModelName
+
+    @productPartModelName.setter
+    def productPartModelName(self, val):
+        self.__productPartModelName = val
+
+    @property
+    def productVersion(self):
+        return self.__productVersion
+
+    @productVersion.setter
+    def productVersion(self, val):
+        self.__productVersion = val
+
+    @property
+    def productSerialNumber(self):
+        return self.__productSerialNumber
+
+    @productSerialNumber.setter
+    def productSerialNumber(self, val):
+        self.__productSerialNumber = val
+
+    @property
+    def psu_sn_sysfs(self):
+        if self.__psu_sn_config is None:
+            return None
+        ret, val = self.get_value(self.__psu_sn_config)
+        if ret is False or val is None:
+            return None
+        return val
+
+    @property
+    def psu_hw_sysfs(self):
+        if self.__psu_hw_config is None:
+            return None
+        ret, val = self.get_value(self.__psu_hw_config)
+        if ret is False or val is None:
+            return None
+        return val
+
+    @property
+    def psu_pn_sysfs(self):
+        if self.__psu_pn_config is None:
+            return None
+        ret, val = self.get_value(self.__psu_pn_config)
+        if ret is False or val is None:
+            return None
+        return val
+
+    @property
+    def psu_vendor_sysfs(self):
+        if self.__psu_vendor_config is None:
+            return None
+        ret, val = self.get_value(self.__psu_vendor_config)
+        if ret is False or val is None:
+            return None
+        return val
+
+    def __str__(self):
+        formatstr =  \
+            "name                : %s \n" \
+            "productManufacturer : %s \n" \
+            "productName         : %s \n" \
+            "productPartModelName: %s \n" \
+            "productVersion      : %s \n" \
+            "productSerialNumber : %s \n" \
+            "AirFlow             : %s \n" \
+
+        tmpstr = formatstr % (self.name, self.productManufacturer,
+                              self.productName, self.productPartModelName,
+                              self.productVersion, self.productSerialNumber, self.AirFlow)
+        return tmpstr
+
+    def get_fan_speed_pwm(self):
+        if self.present is False:
+            return self.psu_not_present_pwm
+        selfconfig = {}
+        selfconfig['bus'] = self.pmbus['bus']
+        selfconfig['addr'] = self.pmbus['addr']
+        selfconfig['way'] = 'i2cword'
+        selfconfig['offset'] = 0x3b
+        ret, val = self.get_value(selfconfig)
+        if ret is True:
+            return val
+        return None
+
+    def set_fan_speed_pwm(self, pwm):
+        '''
+            pmbus
+                if duty:
+                 i2cset -f -y 0x3b 0x0064  wp
+        '''
+        if self.present is False:
+            return None
+        if 0 <= pwm <= 100:
+            # enable duty first
+            selfconfig = {}
+
+            selfconfig['bus'] = self.pmbus['bus']
+            selfconfig['addr'] = self.pmbus['addr']
+            selfconfig['way'] = 'i2cpec'
+            selfconfig['offset'] = 0x3a
+            self.set_value(selfconfig, 0x80)
+
+            selfconfig['way'] = 'i2cwordpec'
+            selfconfig['offset'] = 0x3b
+            bytetmp = pwm
+            ret, val = self.set_value(selfconfig, int(bytetmp))
+            if ret is True:
+                return True
+            return None
+        raise Exception("pwm not in range [0,100]")
+
+    def get_fru_info_by_sysfs(self):
+        try:
+            psu_sn = self.psu_sn_sysfs
+            psu_hw = self.psu_hw_sysfs
+            psu_pn = self.psu_pn_sysfs
+            psu_vendor = self.psu_vendor_sysfs
+            if psu_sn is None or psu_hw is None or psu_pn is None or psu_vendor is None:
+                return False
+            self.productSerialNumber = psu_sn.strip().replace(chr(0), "")
+            self.productVersion = psu_hw.strip()
+            self.productPartModelName = psu_pn.strip()
+            self.productManufacturer = psu_vendor.strip().replace(chr(0), "")
+        except Exception:
+            self.productSerialNumber = None
+            self.productVersion = None
+            self.productPartModelName = None
+            self.productManufacturer = None
+            return False
+        return True
+
+    def get_fru_info_by_decode(self):
+        try:
+            eeprom = self.get_eeprom_info(self.e2loc)
+            if eeprom is None:
+                raise Exception("%s:value is none" % self.name)
+            fru = ipmifru()
+            if isinstance(eeprom, bytes):
+                eeprom = self.byteTostr(eeprom)
+            fru.decodeBin(eeprom)
+            if fru.productInfoArea is not None:
+                self.productManufacturer = fru.productInfoArea.productManufacturer.strip()
+                self.productName = fru.productInfoArea.productName.strip()
+                self.productPartModelName = fru.productInfoArea.productPartModelName.strip()
+                self.productVersion = fru.productInfoArea.productVersion.strip()
+                self.productSerialNumber = fru.productInfoArea.productSerialNumber.strip().replace(chr(0), "")
+        except Exception:
+            self.productManufacturer = None
+            self.productName = None
+            self.productPartModelName = None
+            self.productVersion = None
+            self.productSerialNumber = None
+            return False
+        return True
+
+    def get_fru_info(self):
+        try:
+            if self.present is not True:
+                raise Exception("%s: not present" % self.name)
+            if self.get_fru_info_by_sysfs() is True:
+                return True
+            return self.get_fru_info_by_decode()
+        except Exception:
+            self.productManufacturer = None
+            self.productName = None
+            self.productPartModelName = None
+            self.productVersion = None
+            self.productSerialNumber = None
+            return False
+
+    def get_AirFlow(self):
+        if self.productPartModelName is None:
+            ret = self.get_fru_info()
+            if ret is False:
+                self.AirFlow = None
+                return False
+        if self.AirFlowconifg is None:
+            self.AirFlow = None
+            return False
+        for i in self.AirFlowconifg:
+            if self.productPartModelName in self.AirFlowconifg[i]:
+                self.AirFlow = i
+                return True
+        self.AirFlow = None
+        return False
+
+    def get_psu_display_name(self):
+        if self.productPartModelName is None:
+            ret = self.get_fru_info()
+            if ret is False:
+                self.psu_display_name = None
+                return False
+        if self.psu_display_name_conifg is None:
+            self.psu_display_name = self.productPartModelName
+            return False
+        for i in self.psu_display_name_conifg:
+            if self.productPartModelName in self.psu_display_name_conifg[i]:
+                self.psu_display_name = i
+                return True
+        self.psu_display_name = self.productPartModelName
+        return False
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/rotor.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/rotor.py
new file mode 100644
index 000000000000..2b4e4ffd5f0e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/rotor.py
@@ -0,0 +1,149 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# rotor.py
+# Python implementation of the Class rotor
+#
+#######################################################
+from plat_hal.devicebase import devicebase
+from plat_hal.sensor import sensor
+
+
+class rotor(devicebase):
+    __rotor_Running = None
+    __rotor_HwAlarm_conf = None
+    __rotor_Speed = None
+    __rotor_run_conf = None
+    __Speedconfig = None
+    __i2c_speed = None
+    __SpeedMin = None
+    __SpeedMax = None
+    __SpeedTolerance = None
+
+    def __init__(self, conf=None):
+        self.name = conf.get('name', None)
+        self.rotor_HwAlarm_conf = conf.get('HwAlarm', None)
+        self.rotor_run_conf = conf.get('Running', None)
+        self.SpeedMin = conf.get('SpeedMin', None)
+        self.SpeedMax = conf.get('SpeedMax', None)
+        self.Tolerance = conf.get('tolerance', 30)
+        self.rotor_Speed = sensor(conf.get('Speed', None))
+        self.Speedconfig = conf.get('Set_speed', None)
+
+    def getRunning(self):
+        ret, val = self.get_value(self.rotor_run_conf)
+        if ret is False or val is None:
+            return False
+        if isinstance(val, str):
+            value = int(val, 16)
+        else:
+            value = val
+        mask = self.rotor_run_conf.get("mask")
+        is_runing_value = self.rotor_run_conf.get("is_runing")
+        flag = value & mask
+        if flag == is_runing_value:
+            return True
+        return False
+
+    @property
+    def SpeedMin(self):
+        return self.__SpeedMin
+
+    @SpeedMin.setter
+    def SpeedMin(self, val):
+        self.__SpeedMin = val
+
+    @property
+    def SpeedMax(self):
+        return self.__SpeedMax
+
+    @SpeedMax.setter
+    def SpeedMax(self, val):
+        self.__SpeedMax = val
+
+    @property
+    def Tolerance(self):
+        return self.__SpeedTolerance
+
+    @Tolerance.setter
+    def Tolerance(self, val):
+        self.__SpeedTolerance = val
+
+    @property
+    def i2c_speed(self):
+        ret, val = self.get_value(self.Speedconfig)
+        if ret is False:
+            return None
+        if val is not None:
+            self.__i2c_speed = val
+        return self.__i2c_speed
+
+    def feed_watchdog(self):
+        ret, val = self.get_value(self.Speedconfig)
+        if ret is False:
+            return False, None
+        if val is not None:
+            ret, val = self.set_value(self.Speedconfig, val)
+            return ret, val
+        return False, None
+
+    @i2c_speed.setter
+    def i2c_speed(self, val):
+        self.__i2c_speed = val
+
+    @property
+    def Speedconfig(self):
+        return self.__Speedconfig
+
+    @Speedconfig.setter
+    def Speedconfig(self, val):
+        self.__Speedconfig = val
+
+    @property
+    def rotor_run_conf(self):
+        return self.__rotor_run_conf
+
+    @rotor_run_conf.setter
+    def rotor_run_conf(self, val):
+        self.__rotor_run_conf = val
+
+    @property
+    def rotor_Speed(self):
+        return self.__rotor_Speed
+
+    @rotor_Speed.setter
+    def rotor_Speed(self, val):
+        self.__rotor_Speed = val
+
+    @property
+    def rotor_HwAlarm(self):
+        ret, val = self.get_value(self.rotor_HwAlarm_conf)
+        mask = self.rotor_HwAlarm_conf.get("mask")
+        no_alarm_value = self.rotor_HwAlarm_conf.get("no_alarm")
+        if ret is False or val is None:
+            return False
+        if isinstance(val, str):
+            value = int(val, 16)
+        else:
+            value = val
+        flag = value & mask
+        if flag == no_alarm_value:
+            return False
+        return True
+
+    @property
+    def rotor_HwAlarm_conf(self):
+        return self.__rotor_HwAlarm_conf
+
+    @rotor_HwAlarm_conf.setter
+    def rotor_HwAlarm_conf(self, val):
+        self.__rotor_HwAlarm_conf = val
+
+    @property
+    def rotor_Running(self):
+        self.__rotor_Running = self.getRunning()
+        return self.__rotor_Running
+
+    @rotor_Running.setter
+    def rotor_Running(self, val):
+        self.__rotor_Running = val
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/sensor.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/sensor.py
new file mode 100644
index 000000000000..2b4e05e00e43
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/sensor.py
@@ -0,0 +1,219 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# sensor.py
+# Python implementation of the Class sensor
+#
+#######################################################
+import time
+from plat_hal.devicebase import devicebase
+
+
+class sensor(devicebase):
+
+    __Value = None
+    __Min = None
+    __Max = None
+    __Low = None
+    __High = None
+    __ValueConfig = None
+    __Flag = None
+    __Unit = None
+    __format = None
+    __read_times = None
+
+    __Min_config = None
+    __Max_config = None
+    __Low_config = None
+    __High_config = None
+
+    @property
+    def Min_config(self):
+        return self.__Min_config
+
+    @Min_config.setter
+    def Min_config(self, val):
+        self.__Min_config = val
+
+    @property
+    def Max_config(self):
+        return self.__Max_config
+
+    @Max_config.setter
+    def Max_config(self, val):
+        self.__Max_config = val
+
+    @property
+    def Low_config(self):
+        return self.__Low_config
+
+    @Low_config.setter
+    def Low_config(self, val):
+        self.__Low_config = val
+
+    @property
+    def High_config(self):
+        return self.__High_config
+
+    @High_config.setter
+    def High_config(self, val):
+        self.__High_config = val
+
+    @property
+    def Unit(self):
+        return self.__Unit
+
+    @Unit.setter
+    def Unit(self, val):
+        self.__Unit = val
+
+    @property
+    def format(self):
+        return self.__format
+
+    @format.setter
+    def format(self, val):
+        self.__format = val
+
+    @property
+    def read_times(self):
+        return self.__read_times
+
+    @read_times.setter
+    def read_times(self, val):
+        self.__read_times = val
+
+    @property
+    def ValueConfig(self):
+        return self.__ValueConfig
+
+    @ValueConfig.setter
+    def ValueConfig(self, val):
+        self.__ValueConfig = val
+
+    @property
+    def Flag(self):
+        return self.__Flag
+
+    @Flag.setter
+    def Flag(self, val):
+        self.__Flag = val
+
+    def get_median(self, value_config, read_times):
+        val_list = []
+        for i in range(0, read_times):
+            ret, real_value = self.get_value(value_config)
+            if i != (read_times - 1):
+                time.sleep(0.01)
+            if ret is False or real_value is None:
+                continue
+            val_list.append(real_value)
+        val_list.sort()
+        if val_list:
+            return True, val_list[int((len(val_list) - 1) / 2)]
+        return False, None
+
+    @property
+    def Value(self):
+        try:
+            ret, val = self.get_median(self.ValueConfig, self.read_times)
+            if ret is False or val is None:
+                return None
+            if self.format is None:
+                self.__Value = int(val)
+            else:
+                self.__Value = self.get_format_value(self.format % val)
+            self.__Value = round(float(self.__Value), 3)
+        except Exception:
+            return None
+        return self.__Value
+
+    @Value.setter
+    def Value(self, val):
+        self.__Value = val
+
+    @property
+    def Min(self):
+        try:
+            if self.format is None:
+                self.__Min = self.Min_config
+            else:
+                self.__Min = self.get_format_value(self.format % self.Min_config)
+            self.__Min = round(float(self.__Min), 3)
+        except Exception:
+            return None
+        return self.__Min
+
+    @Min.setter
+    def Min(self, val):
+        self.__Min = val
+
+    @property
+    def Max(self):
+        try:
+            if self.format is None:
+                self.__Max = self.Max_config
+            else:
+                self.__Max = self.get_format_value(self.format % self.Max_config)
+            self.__Max = round(float(self.__Max), 3)
+        except Exception:
+            return None
+        return self.__Max
+
+    @Max.setter
+    def Max(self, val):
+        self.__Max = val
+
+    @property
+    def Low(self):
+        try:
+            if self.format is None:
+                self.__Low = self.Low_config
+            else:
+                self.__Low = self.get_format_value(self.format % self.Low_config)
+        except Exception:
+            return None
+        return self.__Low
+
+    @Low.setter
+    def Low(self, val):
+        self.__Low = val
+
+    @property
+    def High(self):
+        try:
+            if self.format is None:
+                self.__High = self.High_config
+            else:
+                self.__High = self.get_format_value(self.format % self.High_config)
+        except Exception:
+            return None
+        return self.__High
+
+    @High.setter
+    def High(self, val):
+        self.__High = val
+
+    def __init__(self, conf=None):
+        self.ValueConfig = conf.get("value", None)
+        self.Flag = conf.get("flag", None)
+        self.Min_config = conf.get("Min", None)
+        self.Max_config = conf.get("Max", None)
+        self.Low_config = conf.get("Low", None)
+        self.High_config = conf.get("High", None)
+        self.Unit = conf.get('Unit', None)
+        self.format = conf.get('format', None)
+        self.read_times = conf.get('read_times', 1)
+
+    def __str__(self):
+        formatstr =  \
+            "ValueConfig:                : %s \n" \
+            "Min :          %s \n" \
+            "Max : %s \n" \
+            "Unit  : %s \n" \
+            "format:       : %s \n"
+
+        tmpstr = formatstr % (self.ValueConfig, self.Min,
+                              self.Max, self.Unit,
+                              self.format)
+        return tmpstr
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/temp.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/temp.py
new file mode 100644
index 000000000000..a202c20339c9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/temp.py
@@ -0,0 +1,139 @@
+#!/usr/bin/env python3
+#######################################################
+#
+# temp.py
+# Python implementation of the Class temp
+#
+#######################################################
+import os
+import syslog
+from plat_hal.sensor import sensor
+
+
+PLATFORM_HAL_TEMP_DEBUG_FILE = "/etc/.platform_hal_temp_debug_flag"
+
+
+def platform_hal_temp_debug(s):
+    if os.path.exists(PLATFORM_HAL_TEMP_DEBUG_FILE):
+        syslog.openlog("PLATFORM_HAL_TEPM", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+class temp(sensor):
+    def __init__(self, conf=None):
+        super(temp, self).__init__(conf.get('Temperature', None))
+        self.name = conf.get("name", None)
+        self.temp_id = conf.get("temp_id", None)
+        self.api_name = conf.get("api_name", self.name)
+        self.fix_value = conf.get("fix_value", None)
+        self.temp_invalid = conf.get("invalid", None)
+        self.temp_error = conf.get("error", None)
+
+    def temp_cali_by_fan_pwm(self, param, origin_value):
+        fan_pwm_conf = param.get("fan_pwm")
+        temp_fix_list = param.get("temp_fix_list")
+
+        ret, val = self.get_value(fan_pwm_conf)
+        if ret is False or val is None:
+            platform_hal_temp_debug("temp calibration get fan pwm failed, msg: %s, return None" % (val))
+            return None
+
+        fan_pwm = int(val)
+        for item in temp_fix_list:
+            if item["min"] <= fan_pwm <= item["max"]:
+                fix_value = origin_value + item["fix"]
+                platform_hal_temp_debug("temp calibration by fan pwm, origin_value: %s, pwm: %s, fix_value: %s" %
+                                        (origin_value, fan_pwm, fix_value))
+                return fix_value
+        platform_hal_temp_debug("temp calibration by fan pwm, origin_value: %s, pwm: %s, not match return None" %
+                                (origin_value, fan_pwm))
+        return None
+
+    def fix_temp_value(self, origin_value):
+        try:
+            fix_type = self.fix_value.get("fix_type")
+
+            if fix_type == "func":
+                func_name = self.fix_value.get("func_name")
+                func_param = self.fix_value.get("func_param")
+                func = getattr(self, func_name)
+                if func is None:
+                    platform_hal_temp_debug("function %s, not defined" % func_name)
+                    return None
+                value = func(func_param, origin_value)
+                return value
+
+            if fix_type == "config":
+                coefficient = self.fix_value.get("coefficient", 1)
+                addend = self.fix_value.get("addend", 0)
+                value = (origin_value + addend) * coefficient
+                platform_hal_temp_debug("temp calibration by config, coefficient: %s, addend: %s, origin_value: %s, fix_value: %s" %
+                                        (coefficient, addend, origin_value, value))
+                return value
+
+            platform_hal_temp_debug("unsupport fix type: %s, return origin value: %s" % (fix_type, origin_value))
+            return origin_value
+        except Exception as e:
+            platform_hal_temp_debug("fix_temp_value raise exception, msg: %s" % (str(e)))
+            return None
+
+    def get_max_value(self, conf):
+        try:
+            ret, val = self.get_value(conf)
+            if ret is False or val is None:
+                return None
+            return val
+        except Exception:
+            return None
+
+    def check_flag(self):
+        try:
+            okbit = self.Flag.get('okbit')
+            okval = self.Flag.get('okval')
+            ret, val = self.get_value(self.Flag)
+            if (ret is False) or (val is None):
+                return False
+            val_t = (int(val) & (1 << okbit)) >> okbit
+            if val_t != okval:
+                return False
+        except Exception:
+            return False
+        return True
+
+    @property
+    def Value(self):
+        try:
+            if self.Flag is not None:
+                if self.check_flag() is False:
+                    return None
+            if isinstance(self.ValueConfig, list):
+                max_val = None
+                for i in self.ValueConfig:
+                    tmp = self.get_max_value(i)
+                    if tmp is None:
+                        continue
+                    if max_val is None or max_val < tmp:
+                        max_val = tmp
+                if max_val is None:
+                    return None
+                if self.format is None:
+                    self.__Value = int(max_val)
+                else:
+                    self.__Value = self.get_format_value(self.format % max_val)
+            else:
+                ret, val = self.get_value(self.ValueConfig)
+                if ret is False or val is None:
+                    return None
+                if self.format is None:
+                    self.__Value = int(val)
+                else:
+                    self.__Value = self.get_format_value(self.format % val)
+        except Exception:
+            return None
+        if self.fix_value is not None and self.__Value != self.temp_invalid and self.__Value != self.temp_error:
+            self.__Value = self.fix_temp_value(self.__Value)
+        return self.__Value
+
+    @Value.setter
+    def Value(self, val):
+        self.__Value = val
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/__init__.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/__init__.py
new file mode 100644
index 000000000000..e69de29bb2d1
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/baseutil.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/baseutil.py
new file mode 100644
index 000000000000..340a1f7a733f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/baseutil.py
@@ -0,0 +1,38 @@
+#!/usr/bin/env python3
+import os
+
+
+def get_machine_info():
+    if not os.path.isfile('/host/machine.conf'):
+        return None
+    machine_vars = {}
+    with open('/host/machine.conf') as machine_file:
+        for line in machine_file:
+            tokens = line.split('=')
+            if len(tokens) < 2:
+                continue
+            machine_vars[tokens[0]] = tokens[1].strip()
+    return machine_vars
+
+
+def get_platform_info(machine_info):
+    if machine_info is not None:
+        if 'onie_platform' in machine_info:
+            return machine_info['onie_platform']
+        if 'aboot_platform' in machine_info:
+            return machine_info['aboot_platform']
+    return None
+
+
+def get_board_id(machine_info):
+    if machine_info is not None:
+        if 'onie_board_id' in machine_info:
+            return machine_info['onie_board_id'].lower()
+    return "NA"
+
+
+def get_onie_machine(machine_info):
+    if machine_info is not None:
+        if 'onie_machine' in machine_info:
+            return machine_info['onie_machine']
+    return None
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/smbus.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/smbus.py
new file mode 100644
index 000000000000..5f1659b3bbf0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/wbutil/smbus.py
@@ -0,0 +1,772 @@
+#!/usr/bin/env python3
+# smbus2 - A drop-in replacement for smbus-cffi/smbus-python
+# The MIT License (MIT)
+# Copyright (c) 2017 Karl-Petter Lindegaard
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in all
+# copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+import os
+import sys
+from fcntl import ioctl
+from ctypes import c_uint32, c_uint8, c_uint16, c_char, POINTER, Structure, Array, Union, create_string_buffer, string_at
+
+
+# Commands from uapi/linux/i2c-dev.h
+I2C_SLAVE = 0x0703  # Use this slave address
+I2C_SLAVE_FORCE = 0x0706  # Use this slave address, even if it is already in use by a driver!
+I2C_FUNCS = 0x0705  # Get the adapter functionality mask
+I2C_RDWR = 0x0707  # Combined R/W transfer (one STOP only)
+I2C_SMBUS = 0x0720  # SMBus transfer. Takes pointer to i2c_smbus_ioctl_data
+I2C_PEC = 0x0708
+
+# SMBus transfer read or write markers from uapi/linux/i2c.h
+I2C_SMBUS_WRITE = 0
+I2C_SMBUS_READ = 1
+
+# Size identifiers uapi/linux/i2c.h
+I2C_SMBUS_QUICK = 0
+I2C_SMBUS_BYTE = 1
+I2C_SMBUS_BYTE_DATA = 2
+I2C_SMBUS_WORD_DATA = 3
+I2C_SMBUS_PROC_CALL = 4
+# This isn't supported by Pure-I2C drivers with SMBUS emulation, like those in RaspberryPi, OrangePi, etc :(
+I2C_SMBUS_BLOCK_DATA = 5
+I2C_SMBUS_BLOCK_PROC_CALL = 7  # Like I2C_SMBUS_BLOCK_DATA, it isn't supported by Pure-I2C drivers either.
+I2C_SMBUS_I2C_BLOCK_DATA = 8
+I2C_SMBUS_BLOCK_MAX = 32
+
+# To determine what functionality is present (uapi/linux/i2c.h)
+try:
+    from enum import IntFlag
+except ImportError:
+    IntFlag = int
+
+
+class I2cFunc(IntFlag):
+    """
+    These flags identify the operations supported by an I2C/SMBus device.
+
+    You can test these flags on your `smbus.funcs`
+
+    On newer python versions, I2cFunc is an IntFlag enum, but it
+    falls back to class with a bunch of int constants on older releases.
+    """
+    I2C = 0x00000001
+    ADDR_10BIT = 0x00000002
+    PROTOCOL_MANGLING = 0x00000004  # I2C_M_IGNORE_NAK etc.
+    SMBUS_PEC = 0x00000008
+    NOSTART = 0x00000010  # I2C_M_NOSTART
+    SLAVE = 0x00000020
+    SMBUS_BLOCK_PROC_CALL = 0x00008000  # SMBus 2.0
+    SMBUS_QUICK = 0x00010000
+    SMBUS_READ_BYTE = 0x00020000
+    SMBUS_WRITE_BYTE = 0x00040000
+    SMBUS_READ_BYTE_DATA = 0x00080000
+    SMBUS_WRITE_BYTE_DATA = 0x00100000
+    SMBUS_READ_WORD_DATA = 0x00200000
+    SMBUS_WRITE_WORD_DATA = 0x00400000
+    SMBUS_PROC_CALL = 0x00800000
+    SMBUS_READ_BLOCK_DATA = 0x01000000
+    SMBUS_WRITE_BLOCK_DATA = 0x02000000
+    SMBUS_READ_I2C_BLOCK = 0x04000000  # I2C-like block xfer
+    SMBUS_WRITE_I2C_BLOCK = 0x08000000  # w/ 1-byte reg. addr.
+    SMBUS_HOST_NOTIFY = 0x10000000
+
+    SMBUS_BYTE = 0x00060000
+    SMBUS_BYTE_DATA = 0x00180000
+    SMBUS_WORD_DATA = 0x00600000
+    SMBUS_BLOCK_DATA = 0x03000000
+    SMBUS_I2C_BLOCK = 0x0c000000
+    SMBUS_EMUL = 0x0eff0008
+
+
+# i2c_msg flags from uapi/linux/i2c.h
+I2C_M_RD = 0x0001
+
+# Pointer definitions
+LP_c_uint8 = POINTER(c_uint8)
+LP_c_uint16 = POINTER(c_uint16)
+LP_c_uint32 = POINTER(c_uint32)
+
+
+#############################################################
+# Type definitions as in i2c.h
+
+
+class i2c_smbus_data(Array):
+    """
+    Adaptation of the i2c_smbus_data union in ``i2c.h``.
+
+    Data for SMBus messages.
+    """
+    _length_ = I2C_SMBUS_BLOCK_MAX + 2
+    _type_ = c_uint8
+
+
+class union_i2c_smbus_data(Union):
+    _fields_ = [
+        ("byte", c_uint8),
+        ("word", c_uint16),
+        ("block", i2c_smbus_data)
+    ]
+
+
+union_pointer_type = POINTER(union_i2c_smbus_data)
+
+
+class i2c_smbus_ioctl_data(Structure):
+    """
+    As defined in ``i2c-dev.h``.
+    """
+    _fields_ = [
+        ('read_write', c_uint8),
+        ('command', c_uint8),
+        ('size', c_uint32),
+        ('data', union_pointer_type)]
+    __slots__ = [name for name, type in _fields_]
+
+    @staticmethod
+    def create(read_write=I2C_SMBUS_READ, command=0, size=I2C_SMBUS_BYTE_DATA):
+        u = union_i2c_smbus_data()
+        return i2c_smbus_ioctl_data(
+            read_write=read_write, command=command, size=size,
+            data=union_pointer_type(u))
+
+
+#############################################################
+# Type definitions for i2c_rdwr combined transactions
+
+
+class i2c_msg(Structure):
+    """
+    As defined in ``i2c.h``.
+    """
+    _fields_ = [
+        ('addr', c_uint16),
+        ('flags', c_uint16),
+        ('len', c_uint16),
+        ('buf', POINTER(c_char))]
+
+    def __iter__(self):
+        """ Iterator / Generator
+
+        :return: iterates over :py:attr:`buf`
+        :rtype: :py:class:`generator` which returns int values
+        """
+        idx = 0
+        while idx < self.len:
+            yield ord(self.buf[idx])
+            idx += 1
+
+    def __len__(self):
+        return self.len
+
+    def __bytes__(self):
+        return string_at(self.buf, self.len)
+
+    def __repr__(self):
+        return 'i2c_msg(%d,%d,%r)' % (self.addr, self.flags, self.__bytes__())
+
+    def __str__(self):
+        s = self.__bytes__()
+        if sys.version_info.major >= 3:
+            s = ''.join(map(chr, s))
+        return s
+
+    @staticmethod
+    def read(address, length):
+        """
+        Prepares an i2c read transaction.
+
+        :param address: Slave address.
+        :type: address: int
+        :param length: Number of bytes to read.
+        :type: length: int
+        :return: New :py:class:`i2c_msg` instance for read operation.
+        :rtype: :py:class:`i2c_msg`
+        """
+        arr = create_string_buffer(length)
+        return i2c_msg(
+            addr=address, flags=I2C_M_RD, len=length,
+            buf=arr)
+
+    @staticmethod
+    def write(address, buf):
+        """
+        Prepares an i2c write transaction.
+
+        :param address: Slave address.
+        :type address: int
+        :param buf: Bytes to write. Either list of values or str.
+        :type buf: list
+        :return: New :py:class:`i2c_msg` instance for write operation.
+        :rtype: :py:class:`i2c_msg`
+        """
+        if sys.version_info.major >= 3:
+            if isinstance(buf, str):
+                buf = bytes(map(ord, buf))
+            else:
+                buf = bytes(buf)
+        else:
+            if not isinstance(buf, str):
+                buf = ''.join([chr(x) for x in buf])
+        arr = create_string_buffer(buf, len(buf))
+        return i2c_msg(
+            addr=address, flags=0, len=len(arr),
+            buf=arr)
+
+
+class i2c_rdwr_ioctl_data(Structure):
+    """
+    As defined in ``i2c-dev.h``.
+    """
+    _fields_ = [
+        ('msgs', POINTER(i2c_msg)),
+        ('nmsgs', c_uint32)
+    ]
+    __slots__ = [name for name, type in _fields_]
+
+    @staticmethod
+    def create(*i2c_msg_instances):
+        """
+        Factory method for creating a i2c_rdwr_ioctl_data struct that can
+        be called with ``ioctl(fd, I2C_RDWR, data)``.
+
+        :param i2c_msg_instances: Up to 42 i2c_msg instances
+        :rtype: i2c_rdwr_ioctl_data
+        """
+        n_msg = len(i2c_msg_instances)
+        msg_array = (i2c_msg * n_msg)(*i2c_msg_instances)
+        return i2c_rdwr_ioctl_data(
+            msgs=msg_array,
+            nmsgs=n_msg
+        )
+
+
+#############################################################
+
+
+class SMBus(object):
+
+    def __init__(self, bus=None, force=False):
+        """
+        Initialize and (optionally) open an i2c bus connection.
+
+        :param bus: i2c bus number (e.g. 0 or 1)
+            or an absolute file path (e.g. `/dev/i2c-42`).
+            If not given, a subsequent  call to ``open()`` is required.
+        :type bus: int or str
+        :param force: force using the slave address even when driver is
+            already using it.
+        :type force: boolean
+        """
+        self.fd = None
+        self.funcs = I2cFunc(0)
+        if bus is not None:
+            self.open(bus)
+        self.address = None
+        self.force = force
+        self._force_last = None
+
+    def __enter__(self):
+        """Enter handler."""
+        return self
+
+    def __exit__(self, exc_type, exc_val, exc_tb):
+        """Exit handler."""
+        self.close()
+
+    def open(self, bus):
+        """
+        Open a given i2c bus.
+
+        :param bus: i2c bus number (e.g. 0 or 1)
+            or an absolute file path (e.g. '/dev/i2c-42').
+        :type bus: int or str
+        :raise TypeError: if type(bus) is not in (int, str)
+        """
+        if isinstance(bus, int):
+            filepath = "/dev/i2c-{}".format(bus)
+        elif isinstance(bus, str):
+            filepath = bus
+        else:
+            raise TypeError("Unexpected type(bus)={}".format(type(bus)))
+
+        self.fd = os.open(filepath, os.O_RDWR)
+        self.funcs = self._get_funcs()
+
+    def close(self):
+        """
+        Close the i2c connection.
+        """
+        if self.fd:
+            os.close(self.fd)
+            self.fd = None
+
+    def _set_address(self, address, force=None):
+        """
+        Set i2c slave address to use for subsequent calls.
+
+        :param address:
+        :type address: int
+        :param force:
+        :type force: Boolean
+        """
+        force = force if force is not None else self.force
+        if self.address != address or self._force_last != force:
+            if force is True:
+                ioctl(self.fd, I2C_SLAVE_FORCE, address)
+            else:
+                ioctl(self.fd, I2C_SLAVE, address)
+            self.address = address
+            self._force_last = force
+
+    def _get_funcs(self):
+        """
+        Returns a 32-bit value stating supported I2C functions.
+
+        :rtype: int
+        """
+        f = c_uint32()
+        ioctl(self.fd, I2C_FUNCS, f)
+        return f.value
+
+    def write_quick(self, i2c_addr, force=None):
+        """
+        Perform quick transaction. Throws IOError if unsuccessful.
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param force:
+        :type force: Boolean
+        """
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_WRITE, command=0, size=I2C_SMBUS_QUICK)
+        ioctl(self.fd, I2C_SMBUS, msg)
+
+    def read_byte(self, i2c_addr, force=None):
+        """
+        Read a single byte from a device.
+
+        :rtype: int
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param force:
+        :type force: Boolean
+        :return: Read byte value
+        """
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_READ, command=0, size=I2C_SMBUS_BYTE
+        )
+        ioctl(self.fd, I2C_SMBUS, msg)
+        return msg.data.contents.byte
+
+    def write_byte(self, i2c_addr, value, force=None):
+        """
+        Write a single byte to a device.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param value: value to write
+        :type value: int
+        :param force:
+        :type force: Boolean
+        """
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_WRITE, command=value, size=I2C_SMBUS_BYTE
+        )
+        ioctl(self.fd, I2C_SMBUS, msg)
+
+    def read_byte_data(self, i2c_addr, register, force=None):
+        """
+        Read a single byte from a designated register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to read
+        :type register: int
+        :param force:
+        :type force: Boolean
+        :return: Read byte value
+        :rtype: int
+        """
+        val_t = -1
+        returnmsg = ""
+        try:
+            self._set_address(i2c_addr, force=force)
+            msg = i2c_smbus_ioctl_data.create(
+                read_write=I2C_SMBUS_READ, command=register, size=I2C_SMBUS_BYTE_DATA
+            )
+            val_t = ioctl(self.fd, I2C_SMBUS, msg)
+        except Exception as e:
+            self.close()
+            returnmsg = str(e)
+        if val_t < 0:
+            return False, returnmsg
+        return True, msg.data.contents.byte
+
+    def write_byte_data(self, i2c_addr, register, value, force=None):
+        """
+        Write a byte to a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to write to
+        :type register: int
+        :param value: Byte value to transmit
+        :type value: int
+        :param force:
+        :type force: Boolean
+        :rtype: None
+        """
+        val_t = -1
+        returnmsg = ""
+        try:
+            self._set_address(i2c_addr, force=force)
+            msg = i2c_smbus_ioctl_data.create(
+                read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_BYTE_DATA
+            )
+            msg.data.contents.byte = value
+            val_t = ioctl(self.fd, I2C_SMBUS, msg)
+        except Exception as e:
+            returnmsg = str(e)
+            self.close()
+        if val_t < 0:
+            return False, returnmsg or ""
+        return True, ""
+
+    def write_byte_data_pec(self, i2c_addr, register, value, force=None):
+        """
+        Write a byte to a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to write to
+        :type register: int
+        :param value: Byte value to transmit
+        :type value: int
+        :param force:
+        :type force: Boolean
+        :rtype: None
+        """
+        val_t = -1
+        returnmsg = ""
+        try:
+            val_t = ioctl(self.fd, I2C_PEC, 1)
+            if val_t < 0:
+                raise Exception("set pec mod error")
+            self._set_address(i2c_addr, force=force)
+            msg = i2c_smbus_ioctl_data.create(
+                read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_BYTE_DATA
+            )
+            msg.data.contents.byte = value
+            val_t = ioctl(self.fd, I2C_SMBUS, msg)
+        except Exception as e:
+            returnmsg = str(e)
+            self.close()
+        if val_t < 0:
+            return False, returnmsg or ""
+        return True, ""
+
+    def read_word_data(self, i2c_addr, register, force=None):
+        """
+        Read a single word (2 bytes) from a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to read
+        :type register: int
+        :param force:
+        :type force: Boolean
+        :return: 2-byte word
+        :rtype: int
+        """
+        val_t = -1
+        returnmsg = ""
+        try:
+            self._set_address(i2c_addr, force=force)
+            msg = i2c_smbus_ioctl_data.create(
+                read_write=I2C_SMBUS_READ, command=register, size=I2C_SMBUS_WORD_DATA
+            )
+            val_t = ioctl(self.fd, I2C_SMBUS, msg)
+        except Exception as e:
+            returnmsg = str(e)
+            self.close()
+        if val_t < 0:
+            return False, returnmsg or ""
+        return True, msg.data.contents.word
+
+    def write_word_data_pec(self, i2c_addr, register, value, force=None):
+        """
+        Write a byte to a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to write to
+        :type register: int
+        :param value: Word value to transmit
+        :type value: int
+        :param force:
+        :type force: Boolean
+        :rtype: None
+        """
+        val_t = -1
+        returnmsg = ""
+        try:
+            val_t = ioctl(self.fd, I2C_PEC, 1)
+            if val_t < 0:
+                raise Exception("set pec mod error")
+            self._set_address(i2c_addr, force=force)
+            msg = i2c_smbus_ioctl_data.create(
+                read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_WORD_DATA
+            )
+            msg.data.contents.word = value
+            val_t = ioctl(self.fd, I2C_SMBUS, msg)
+        except Exception as e:
+            returnmsg = str(e)
+            self.close()
+        if val_t < 0:
+            return False, returnmsg or ""
+        return True, ""
+
+    def write_word_data(self, i2c_addr, register, value, force=None):
+        """
+        Write a byte to a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to write to
+        :type register: int
+        :param value: Word value to transmit
+        :type value: int
+        :param force:
+        :type force: Boolean
+        :rtype: None
+        """
+        val_t = -1
+        returnmsg = ""
+        try:
+            self._set_address(i2c_addr, force=force)
+            msg = i2c_smbus_ioctl_data.create(
+                read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_WORD_DATA
+            )
+            msg.data.contents.word = value
+            val_t = ioctl(self.fd, I2C_SMBUS, msg)
+        except Exception as e:
+            returnmsg = str(e)
+            self.close()
+        if val_t < 0:
+            return False, returnmsg or ""
+        return True, ""
+
+    def process_call(self, i2c_addr, register, value, force=None):
+        """
+        Executes a SMBus Process Call, sending a 16-bit value and receiving a 16-bit response
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to read/write to
+        :type register: int
+        :param value: Word value to transmit
+        :type value: int
+        :param force:
+        :type force: Boolean
+        :rtype: int
+        """
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_PROC_CALL
+        )
+        msg.data.contents.word = value
+        ioctl(self.fd, I2C_SMBUS, msg)
+        return msg.data.contents.word
+
+    def read_block_data(self, i2c_addr, register, force=None):
+        """
+        Read a block of up to 32-bytes from a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Start register
+        :type register: int
+        :param force:
+        :type force: Boolean
+        :return: List of bytes
+        :rtype: list
+        """
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_READ, command=register, size=I2C_SMBUS_BLOCK_DATA
+        )
+        ioctl(self.fd, I2C_SMBUS, msg)
+        length = msg.data.contents.block[0]
+        return msg.data.contents.block[1:length + 1]
+
+    def write_block_data(self, i2c_addr, register, data, force=None):
+        """
+        Write a block of byte data to a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Start register
+        :type register: int
+        :param data: List of bytes
+        :type data: list
+        :param force:
+        :type force: Boolean
+        :rtype: None
+        """
+        length = len(data)
+        if length > I2C_SMBUS_BLOCK_MAX:
+            raise ValueError("Data length cannot exceed %d bytes" % I2C_SMBUS_BLOCK_MAX)
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_BLOCK_DATA
+        )
+        msg.data.contents.block[0] = length
+        msg.data.contents.block[1:length + 1] = data
+        ioctl(self.fd, I2C_SMBUS, msg)
+
+    def block_process_call(self, i2c_addr, register, data, force=None):
+        """
+        Executes a SMBus Block Process Call, sending a variable-size data
+        block and receiving another variable-size response
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Register to read/write to
+        :type register: int
+        :param data: List of bytes
+        :type data: list
+        :param force:
+        :type force: Boolean
+        :return: List of bytes
+        :rtype: list
+        """
+        length = len(data)
+        if length > I2C_SMBUS_BLOCK_MAX:
+            raise ValueError("Data length cannot exceed %d bytes" % I2C_SMBUS_BLOCK_MAX)
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_BLOCK_PROC_CALL
+        )
+        msg.data.contents.block[0] = length
+        msg.data.contents.block[1:length + 1] = data
+        ioctl(self.fd, I2C_SMBUS, msg)
+        length = msg.data.contents.block[0]
+        return msg.data.contents.block[1:length + 1]
+
+    def read_i2c_block_data(self, i2c_addr, register, length, force=None):
+        """
+        Read a block of byte data from a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Start register
+        :type register: int
+        :param length: Desired block length
+        :type length: int
+        :param force:
+        :type force: Boolean
+        :return: List of bytes
+        :rtype: list
+        """
+        if length > I2C_SMBUS_BLOCK_MAX:
+            raise ValueError("Desired block length over %d bytes" % I2C_SMBUS_BLOCK_MAX)
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_READ, command=register, size=I2C_SMBUS_I2C_BLOCK_DATA
+        )
+        msg.data.contents.byte = length
+        ioctl(self.fd, I2C_SMBUS, msg)
+        return msg.data.contents.block[1:length + 1]
+
+    def write_i2c_block_data(self, i2c_addr, register, data, force=None):
+        """
+        Write a block of byte data to a given register.
+
+        :param i2c_addr: i2c address
+        :type i2c_addr: int
+        :param register: Start register
+        :type register: int
+        :param data: List of bytes
+        :type data: list
+        :param force:
+        :type force: Boolean
+        :rtype: None
+        """
+        length = len(data)
+        if length > I2C_SMBUS_BLOCK_MAX:
+            raise ValueError("Data length cannot exceed %d bytes" % I2C_SMBUS_BLOCK_MAX)
+        self._set_address(i2c_addr, force=force)
+        msg = i2c_smbus_ioctl_data.create(
+            read_write=I2C_SMBUS_WRITE, command=register, size=I2C_SMBUS_I2C_BLOCK_DATA
+        )
+        msg.data.contents.block[0] = length
+        msg.data.contents.block[1:length + 1] = data
+        ioctl(self.fd, I2C_SMBUS, msg)
+
+    def i2c_rdwr(self, *i2c_msgs):
+        """
+        Combine a series of i2c read and write operations in a single
+        transaction (with repeated start bits but no stop bits in between).
+
+        This method takes i2c_msg instances as input, which must be created
+        first with :py:meth:`i2c_msg.read` or :py:meth:`i2c_msg.write`.
+
+        :param i2c_msgs: One or more i2c_msg class instances.
+        :type i2c_msgs: i2c_msg
+        :rtype: None
+        """
+        ioctl_data = i2c_rdwr_ioctl_data.create(*i2c_msgs)
+        ioctl(self.fd, I2C_RDWR, ioctl_data)
+
+
+class SMBusWrapper:
+    """
+    Wrapper class around the SMBus.
+    Deprecated as of version 0.3.0. Please replace with :py:class:`SMBus`.
+
+    Enables the user to wrap access to the :py:class:`SMBus` class in a
+    "with" statement. If auto_cleanup is True (default), the
+    :py:class:`SMBus` handle will be automatically closed
+    upon exit of the ``with`` block.
+    """
+
+    def __init__(self, bus_number=0, auto_cleanup=True, force=False):
+        """
+        :param auto_cleanup: Close bus when leaving scope.
+        :type auto_cleanup: Boolean
+        :param force: Force using the slave address even when driver is already using it.
+        :type force: Boolean
+        """
+        self.bus_number = bus_number
+        self.auto_cleanup = auto_cleanup
+        self.force = force
+        self.bus = None
+
+    def __enter__(self):
+        self.bus = SMBus(bus=self.bus_number, force=self.force)
+        return self.bus
+
+    def __exit__(self, exc_type, exc_val, exc_tb):
+        if self.auto_cleanup:
+            self.bus.close()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf b/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf
new file mode 100644
index 000000000000..5e861802d915
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf
@@ -0,0 +1,5 @@
+blacklist wb_fpga_pcie
+blacklist wb_i2c_i801
+blacklist wb_spi_gpio
+blacklist intel_spi
+blacklist intel_spi_platform
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
new file mode 100644
index 000000000000..8727f1f508f1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
@@ -0,0 +1,55 @@
+PWD		= $(shell pwd)
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+KVERSION   ?= $(shell uname -r)
+KERNEL_SRC ?=  /lib/modules/$(KVERSION)
+
+module_out_put_dir := $(PWD)/build
+export module_out_put_dir
+
+KERNEL_MODULES_SRC = $(PWD)/linux-5.10
+
+PLAT_SYSFS_DIR = $(PWD)/plat_sysfs
+INTEL_SPI = $(PWD)/intel_spi
+
+export PLAT_SYSFS_DIR
+
+platform_common-objs := platform_common_module.o dfd_tlveeprom.o
+obj-m += platform_common.o
+obj-m += wb_mac_bsc.o
+obj-m += wb_fpga_pcie.o
+obj-m += wb_pcie_dev.o
+obj-m += wb_fpga_i2c_bus_drv.o
+obj-m += wb_fpga_pca954x_drv.o
+obj-m += wb_lpc_drv.o
+obj-m += wb_i2c_dev.o
+obj-m += wb_platform_i2c_dev.o
+obj-m += wb_io_dev.o
+obj-m += wb_eeprom_93xx46.o
+obj-m += wb_spi_93xx46.o
+obj-m += wb_gpio_d1500.o
+obj-m += wb_gpio_device.o
+obj-m += wb_i2c_ocores.o
+obj-m += wb_spi_ocores.o
+obj-m += wb_spi_dev.o
+obj-m += wb_wdt.o
+obj-m += wb_optoe.o
+obj-m += wb_spi_gpio.o
+obj-m += wb_spi_gpio_device.o
+obj-m += wb_spi_nor_device.o
+obj-m += wb_xdpe132g5c.o
+obj-m += wb_uio_irq.o
+
+all :
+	$(MAKE) -C $(KERNEL_MODULES_SRC)
+	$(MAKE) -C $(PLAT_SYSFS_DIR)
+	$(MAKE) -C $(INTEL_SPI)
+	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
+	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
+	cp -p  $(PWD)/*.ko $(module_out_put_dir)
+
+clean :
+	rm  -rf $(module_out_put_dir)
+	rm -f ${PWD}/*.o ${PWD}/*.ko ${PWD}/*.mod.c ${PWD}/.*.cmd ${PWD}/.*.o.d ${PWD}/*.mod
+	rm -f ${PWD}/Module.markers ${PWD}/Module.symvers ${PWD}/modules.order
+	rm -rf ${PWD}/.tmp_versions
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.c
new file mode 100644
index 000000000000..0d6f38ecc551
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.c
@@ -0,0 +1,516 @@
+/*
+ * Copyright (C) 2003-2014 FreeIPMI Core Team
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
+/*****************************************************************************\
+ *  Copyright (C) 2007-2014 Lawrence Livermore National Security, LLC.
+ *  Copyright (C) 2007 The Regents of the University of California.
+ *  Produced at Lawrence Livermore National Laboratory (cf, DISCLAIMER).
+ *  Written by Albert Chu <chu11@llnl.gov>
+ *  UCRL-CODE-232183
+ *
+ *  This file is part of Ipmi-fru, a tool used for retrieving
+ *  motherboard field replaceable unit (FRU) information. For details,
+ *  see http://www.llnl.gov/linux/.
+ *
+ *  Ipmi-fru is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by the
+ *  Free Software Foundation; either version 3 of the License, or (at your
+ *  option) any later version.
+ *
+ *  Ipmi-fru is distributed in the hope that it will be useful, but
+ *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with Ipmi-fru.  If not, see <http://www.gnu.org/licenses/>.
+\*****************************************************************************/
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include "platform_common.h"
+#include "dfd_tlveeprom.h"
+
+/* using in is_valid_tlvinfo_header */
+static u_int32_t eeprom_size;
+
+/*
+ *  List of TLV codes and names.
+ */
+static const struct tlv_code_desc tlv_code_list[] = {
+    { TLV_CODE_PRODUCT_NAME      , "Product Name"},
+    { TLV_CODE_PART_NUMBER       , "Part Number"},
+    { TLV_CODE_SERIAL_NUMBER     , "Serial Number"},
+    { TLV_CODE_MAC_BASE          , "Base MAC Address"},
+    { TLV_CODE_MANUF_DATE        , "Manufacture Date"},
+    { TLV_CODE_DEVICE_VERSION    , "Device Version"},
+    { TLV_CODE_LABEL_REVISION    , "Label Revision"},
+    { TLV_CODE_PLATFORM_NAME     , "Platform Name"},
+    { TLV_CODE_ONIE_VERSION      , "ONIE Version"},
+    { TLV_CODE_MAC_SIZE          , "MAC Addresses"},
+    { TLV_CODE_MANUF_NAME        , "Manufacturer"},
+    { TLV_CODE_MANUF_COUNTRY     , "Country Code"},
+    { TLV_CODE_VENDOR_NAME       , "Vendor Name"},
+    { TLV_CODE_DIAG_VERSION      , "Diag Version"},
+    { TLV_CODE_SERVICE_TAG       , "Service Tag"},
+    { TLV_CODE_VENDOR_EXT        , "Vendor Extension"},
+    { TLV_CODE_CRC_32            , "CRC-32"},
+};
+
+#if 0
+#define OPENBMC_VPD_KEY_INVAIL_VAL 0
+
+static const tlv_code_map_t tlv_code_map[] = {
+    { TLV_CODE_PRODUCT_NAME   , OPENBMC_VPD_KEY_PRODUCT_NAME},
+    { TLV_CODE_PART_NUMBER    , OPENBMC_VPD_KEY_PRODUCT_PART_MODEL_NUM},
+    { TLV_CODE_SERIAL_NUMBER  , OPENBMC_VPD_KEY_PRODUCT_SERIAL_NUM},
+    { TLV_CODE_MAC_BASE       , OPENBMC_VPD_KEY_INVAIL_VAL},
+    { TLV_CODE_MANUF_DATE     , OPENBMC_VPD_KEY_BOARD_MFG_DATE},
+    { TLV_CODE_DEVICE_VERSION , OPENBMC_VPD_KEY_PRODUCT_VER},
+    { TLV_CODE_LABEL_REVISION , OPENBMC_VPD_KEY_PRODUCT_CUSTOM7},
+    { TLV_CODE_PLATFORM_NAME  , OPENBMC_VPD_KEY_PRODUCT_CUSTOM1},
+    { TLV_CODE_ONIE_VERSION   , OPENBMC_VPD_KEY_PRODUCT_CUSTOM2},
+    { TLV_CODE_MAC_SIZE       , OPENBMC_VPD_KEY_INVAIL_VAL},
+    { TLV_CODE_MANUF_NAME     , OPENBMC_VPD_KEY_PRODUCT_MFR},
+    { TLV_CODE_MANUF_COUNTRY  , OPENBMC_VPD_KEY_PRODUCT_CUSTOM3},
+    { TLV_CODE_VENDOR_NAME    , OPENBMC_VPD_KEY_PRODUCT_CUSTOM4},
+    { TLV_CODE_DIAG_VERSION   , OPENBMC_VPD_KEY_PRODUCT_CUSTOM8},
+    { TLV_CODE_SERVICE_TAG    , OPENBMC_VPD_KEY_PRODUCT_CUSTOM5},
+    { TLV_CODE_VENDOR_EXT     , OPENBMC_VPD_KEY_PRODUCT_CUSTOM6},
+    { TLV_CODE_CRC_32         , OPENBMC_VPD_KEY_INVAIL_VAL},
+};
+#endif
+
+#define TLV_CODE_NUM (sizeof(tlv_code_list) / sizeof(tlv_code_list[0]))
+
+#if 0
+#define TLV_CODE_MAP_NUM (sizeof(tlv_code_map) / sizeof(tlv_code_map[0]))
+#endif
+
+const unsigned long crc_table[] = {
+    0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3,
+    0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91,
+    0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
+    0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5,
+    0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b,
+    0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
+    0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f,
+    0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d,
+    0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
+    0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01,
+    0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457,
+    0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
+    0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb,
+    0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9,
+    0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
+    0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad,
+    0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683,
+    0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
+    0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7,
+    0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5,
+    0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
+    0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79,
+    0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f,
+    0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
+    0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713,
+    0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21,
+    0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
+    0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45,
+    0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db,
+    0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
+    0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf,
+    0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d,
+};
+
+static unsigned long crc32(unsigned long crc, const unsigned char *buf, unsigned len)
+{
+    unsigned i;
+    if (len < 1)
+        return 0xffffffff;
+
+    for (i = 0; i != len; ++i)
+    {
+        crc = crc_table[(crc ^ buf[i]) & 0xff] ^ (crc >> 8);
+    }
+
+    crc = crc ^ 0xffffffff;
+
+    return crc;
+}
+
+/*
+ *  is_valid_tlv
+ *
+ *  Perform basic sanity checks on a TLV field. The TLV is pointed to
+ *  by the parameter provided.
+ *      1. The type code is not reserved (0x00 or 0xFF)
+ */
+static inline bool is_valid_tlv(tlvinfo_tlv_t *tlv)
+{
+    return ((tlv->type != 0x00) && (tlv->type != 0xFF));
+}
+
+/*
+ *  is_valid_tlvinfo_header
+ *
+ *  Perform sanity checks on the first 11 bytes of the TlvInfo EEPROM
+ *  data pointed to by the parameter:
+ *      1. First 8 bytes contain null-terminated ASCII string "TlvInfo"
+ *      2. Version byte is 1
+ *      3. Total length bytes contain value which is less than or equal
+ *         to the allowed maximum (2048-11)
+ *
+ */
+static inline bool is_valid_tlvinfo_header(tlvinfo_header_t *hdr)
+{
+    int max_size = eeprom_size;
+    return((strcmp(hdr->signature, TLV_INFO_ID_STRING) == 0) &&
+       (hdr->version == TLV_INFO_VERSION) &&
+       (be16_to_cpu(hdr->totallen) <= max_size) );
+}
+
+/*
+ *  decode_tlv_value
+ *
+ *  Decode a single TLV value into a string.
+
+ *  The validity of EEPROM contents and the TLV field have been verified
+ *  prior to calling this function.
+ */
+static void decode_tlv_value(tlvinfo_tlv_t *tlv, tlv_decode_value_t *decode_value)
+{
+    int i;
+    char *value;
+    u_int32_t length;
+
+    value = (char *)decode_value->value;
+
+    switch (tlv->type) {
+    case TLV_CODE_PRODUCT_NAME:
+    case TLV_CODE_PART_NUMBER:
+    case TLV_CODE_SERIAL_NUMBER:
+    case TLV_CODE_MANUF_DATE:
+    case TLV_CODE_LABEL_REVISION:
+    case TLV_CODE_PLATFORM_NAME:
+    case TLV_CODE_ONIE_VERSION:
+    case TLV_CODE_MANUF_NAME:
+    case TLV_CODE_MANUF_COUNTRY:
+    case TLV_CODE_VENDOR_NAME:
+    case TLV_CODE_DIAG_VERSION:
+    case TLV_CODE_SERVICE_TAG:
+    case TLV_CODE_VENDOR_EXT:
+        memcpy(value, tlv->value, tlv->length);
+        value[tlv->length] = 0;
+        length = tlv->length;
+        break;
+    case TLV_CODE_MAC_BASE:
+        length = sprintf(value, "%02X:%02X:%02X:%02X:%02X:%02X",
+                tlv->value[0], tlv->value[1], tlv->value[2],
+                tlv->value[3], tlv->value[4], tlv->value[5]);
+        break;
+    case TLV_CODE_DEVICE_VERSION:
+        length = sprintf(value, "%u", tlv->value[0]);
+        break;
+    case TLV_CODE_MAC_SIZE:
+        length = sprintf(value, "%u", (tlv->value[0] << 8) | tlv->value[1]);
+        break;
+    #if 0
+    case TLV_CODE_VENDOR_EXT:
+        value[0] = 0;
+        length = 0;
+        for (i = 0; (i < (TLV_DECODE_VALUE_MAX_LEN/5)) && (i < tlv->length); i++) {
+            length += sprintf(value, "%s 0x%02X", value, tlv->value[i]);
+        }
+        break;
+    #endif
+    case TLV_CODE_CRC_32:
+        length = sprintf(value, "0x%02X%02X%02X%02X", tlv->value[0],
+                tlv->value[1], tlv->value[2], tlv->value[3]);
+        break;
+    default:
+        value[0] = 0;
+        length = 0;
+        for (i = 0; (i < (TLV_DECODE_VALUE_MAX_LEN/5)) && (i < tlv->length); i++) {
+            length += sprintf(value, "%s 0x%02X", value, tlv->value[i]);
+        }
+        break;
+    }
+
+    decode_value->length = length;
+}
+
+/*
+ *  is_checksum_valid
+ *
+ *  Validate the checksum in the provided TlvInfo EEPROM data. First,
+ *  verify that the TlvInfo header is valid, then make sure the last
+ *  TLV is a CRC-32 TLV. Then calculate the CRC over the EEPROM data
+ *  and compare it to the value stored in the EEPROM CRC-32 TLV.
+ */
+static bool is_checksum_valid(u_int8_t *eeprom)
+{
+    tlvinfo_header_t *eeprom_hdr;
+    tlvinfo_tlv_t *eeprom_crc;
+    unsigned int calc_crc;
+    unsigned int stored_crc;
+
+    eeprom_hdr = (tlvinfo_header_t *) eeprom;
+
+    // Is the eeprom header valid?
+    if (!is_valid_tlvinfo_header(eeprom_hdr)) {
+        return false;
+    }
+
+    // Is the last TLV a CRC?
+    eeprom_crc = (tlvinfo_tlv_t *) &eeprom[sizeof(tlvinfo_header_t) +
+        be16_to_cpu(eeprom_hdr->totallen) - (sizeof(tlvinfo_tlv_t) + 4)];
+    if ((eeprom_crc->type != TLV_CODE_CRC_32) || (eeprom_crc->length != 4)) {
+        return false;
+    }
+
+    // Calculate the checksum
+    calc_crc = crc32(0xffffffffL, (const unsigned char *)eeprom, sizeof(tlvinfo_header_t) +
+             be16_to_cpu(eeprom_hdr->totallen) - 4);
+    stored_crc = ((eeprom_crc->value[0] << 24) | (eeprom_crc->value[1] << 16) |
+          (eeprom_crc->value[2] <<  8) | eeprom_crc->value[3]);
+
+    return (calc_crc == stored_crc);
+}
+
+/*
+ *  tlvinfo_find_tlv
+ *
+ *  This function finds the TLV with the supplied code in the EERPOM.
+ *  An offset from the beginning of the EEPROM is returned in the
+ *  eeprom_index parameter if the TLV is found.
+ */
+static bool tlvinfo_find_tlv(u_int8_t *eeprom, u_int8_t tcode, int *eeprom_index)
+{
+    tlvinfo_header_t *eeprom_hdr;
+    tlvinfo_tlv_t    *eeprom_tlv;
+    int eeprom_end;
+
+    eeprom_hdr = (tlvinfo_header_t *) eeprom;
+
+    // Search through the TLVs, looking for the first one which matches the
+    // supplied type code.
+    *eeprom_index = sizeof(tlvinfo_header_t);
+    eeprom_end = sizeof(tlvinfo_header_t) + be16_to_cpu(eeprom_hdr->totallen);
+    while (*eeprom_index < eeprom_end) {
+        eeprom_tlv = (tlvinfo_tlv_t *) &eeprom[*eeprom_index];
+        if (!is_valid_tlv(eeprom_tlv)) {
+            return false;
+        }
+
+        if (eeprom_tlv->type == tcode) {
+            return true;
+        }
+
+        *eeprom_index += sizeof(tlvinfo_tlv_t) + eeprom_tlv->length;
+    }
+
+    return false;
+}
+
+/*
+ *  tlvinfo_decode_tlv
+ *
+ *  This function finds the TLV with the supplied code in the EERPOM
+ *  and decodes the value into the buffer provided.
+ */
+static bool tlvinfo_decode_tlv(u_int8_t *eeprom, u_int8_t tcode, tlv_decode_value_t *decode_value)
+{
+    int eeprom_index;
+    tlvinfo_tlv_t *eeprom_tlv;
+
+    // Find the TLV and then decode it
+    if (tlvinfo_find_tlv(eeprom, tcode, &eeprom_index)) {
+        eeprom_tlv = (tlvinfo_tlv_t *) &eeprom[eeprom_index];
+        decode_tlv_value(eeprom_tlv, decode_value);
+        return true;
+    }
+
+    return false;
+}
+
+/*
+ *  parse_tlv_eeprom
+ *
+ *  parse the EEPROM into memory, if it hasn't already been read.
+ */
+int parse_tlv_eeprom(u_int8_t *eeprom, u_int32_t size)
+{
+    unsigned int i;
+    bool ret;
+    tlvinfo_header_t *eeprom_hdr;
+    //tlv_info_vec_t tlv_info;
+    tlv_decode_value_t decode_value;
+    int j;
+
+    eeprom_hdr = (tlvinfo_header_t *) eeprom;
+    eeprom_size = size; /* eeprom real size */
+
+    if (!is_valid_tlvinfo_header(eeprom_hdr)) {
+        DBG_ERROR("Failed to check tlv header.\n");
+        return -1;
+    }
+
+    if (!is_checksum_valid(eeprom)) {
+        DBG_ERROR("Failed to check tlv crc.\n");
+        return -1;
+    }
+
+    for (i = 0; i < TLV_CODE_NUM; i++) {
+        mem_clear((void *)&decode_value, sizeof(tlv_decode_value_t));
+        ret = tlvinfo_decode_tlv(eeprom, tlv_code_list[i].m_code, &decode_value);
+        if (!ret) {
+            DBG_ERROR("No found type: %s\n", tlv_code_list[i].m_name);
+            continue;
+        }
+
+        DBG_DEBUG("i: %d,Found type: %s tlv[%d]:%s\n", i, tlv_code_list[i].m_name, tlv_code_list[i].m_code,
+            decode_value.value);
+        for (j = 0; j < decode_value.length; j++) {
+            if ((j % 16) == 0) {
+                DBG_DEBUG("\n");
+            }
+            DBG_DEBUG("%02x ", decode_value.value[j]);
+        }
+        DBG_DEBUG("\n\n");
+    }
+    return 0;
+}
+static int dfd_parse_tlv_eeprom(u_int8_t *eeprom, u_int32_t size, u_int8_t main_type, tlv_decode_value_t *decode_value)
+{
+    bool ret;
+    tlvinfo_header_t *eeprom_hdr;
+    //tlv_info_vec_t tlv_info;
+    int j;
+
+    eeprom_hdr = (tlvinfo_header_t *) eeprom;
+    eeprom_size = size; /* eeprom real size */
+
+    if (!is_valid_tlvinfo_header(eeprom_hdr)) {
+        DBG_ERROR("Failed to check tlv header.\n");
+        return -1;
+    }
+
+    if (!is_checksum_valid(eeprom)) {
+        DBG_ERROR("Failed to check tlv crc.\n");
+        return -1;
+    }
+
+    ret = tlvinfo_decode_tlv(eeprom, main_type, decode_value);
+    if (!ret) {
+        DBG_ERROR("No found type: %d\n", main_type);
+        return -1;
+    }
+
+    DBG_DEBUG("Found type: %d, value: %s\n", main_type,decode_value->value);
+    for (j = 0; j < decode_value->length; j++) {
+        if ((j % 16) == 0) {
+            DBG_DEBUG("\n");
+        }
+        DBG_DEBUG("%02x ", decode_value->value[j]);
+    }
+    DBG_DEBUG("\n\n");
+
+    return 0;
+}
+
+static int tlvinfo_find_wb_ext_tlv(tlv_decode_value_t *ext_tlv_value, u_int8_t ext_type,
+    u_int8_t *buf, u_int8_t *buf_len)
+{
+    tlvinfo_tlv_t    *eeprom_tlv;
+    int eeprom_end, eeprom_index;
+
+    // Search through the TLVs, looking for the first one which matches the
+    // supplied type code.
+    DBG_DEBUG("ext_tlv_value->length: %d.\n", ext_tlv_value->length);
+    for (eeprom_index = 0; eeprom_index < ext_tlv_value->length; eeprom_index++) {
+        if ((eeprom_index % 16) == 0) {
+            DBG_DEBUG("\n");
+        }
+        DBG_DEBUG("%02x ", ext_tlv_value->value[eeprom_index]);
+    }
+
+    DBG_DEBUG("\n");
+
+    eeprom_index = 0;
+    eeprom_end = ext_tlv_value->length;
+    while (eeprom_index < eeprom_end) {
+        eeprom_tlv = (tlvinfo_tlv_t *) &(ext_tlv_value->value[eeprom_index]);
+        if (!is_valid_tlv(eeprom_tlv)) {
+            DBG_ERROR("tlv is not valid, eeprom_tlv->type 0x%x.\n", eeprom_tlv->type);
+            return -1;
+        }
+
+        DBG_DEBUG("eeprom_tlv->length %d.\n", eeprom_tlv->length);
+        if (eeprom_tlv->type == ext_type) {
+            if (*buf_len >= eeprom_tlv->length) {
+                memcpy(buf, eeprom_tlv->value, eeprom_tlv->length);
+                DBG_DEBUG("eeprom_tlv->length %d.\n", eeprom_tlv->length);
+                *buf_len = eeprom_tlv->length;
+                return 0;
+            }
+            DBG_ERROR("buf_len %d small than info_len %d.\n", *buf_len, eeprom_tlv->length);
+            return -1;
+        }
+
+        eeprom_index += sizeof(tlvinfo_tlv_t) + eeprom_tlv->length;
+    }
+
+    DBG_ERROR("ext_type %d: tlv is not found.\n", ext_type);
+    return -1;
+}
+
+int dfd_tlvinfo_get_e2prom_info(u_int8_t *eeprom, u_int32_t size, dfd_tlv_type_t *tlv_type, u_int8_t* buf, u_int8_t *buf_len)
+{
+    tlv_decode_value_t decode_value;
+    int ret;
+
+    if (eeprom == NULL || tlv_type == NULL || buf == NULL) {
+        DBG_ERROR("Input para invalid.\n");
+        return -1;
+    }
+
+    mem_clear((void *)&decode_value, sizeof(tlv_decode_value_t));
+    ret = dfd_parse_tlv_eeprom(eeprom, size, tlv_type->main_type, &decode_value);
+    if (ret) {
+        DBG_ERROR("dfd_parse_tlv_eeprom failed ret %d.\n", ret);
+        return ret;
+    }
+
+    if (tlv_type->main_type != TLV_CODE_VENDOR_EXT) {
+        if (*buf_len >= decode_value.length) {
+            memcpy(buf, decode_value.value, decode_value.length);
+            *buf_len = decode_value.length;
+            return 0;
+        }
+        DBG_ERROR("buf_len %d small than info_len %d.\n", *buf_len, decode_value.length);
+        return -1;
+    }
+    DBG_DEBUG("info_len %d.\n", decode_value.length);
+
+    return tlvinfo_find_wb_ext_tlv(&decode_value, tlv_type->ext_type, buf, buf_len);
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.h
new file mode 100644
index 000000000000..6eaac5848223
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/dfd_tlveeprom.h
@@ -0,0 +1,121 @@
+#ifndef DFD_OPENBMC_TLVEEPROM_H
+#define DFD_OPENBMC_TLVEEPROM_H
+
+#ifndef u_int8_t
+#define u_int8_t unsigned char
+#endif
+
+#ifndef u_int16_t
+#define u_int16_t unsigned short
+#endif
+
+#ifndef u_int32_t
+#define u_int32_t unsigned int
+#endif
+
+#ifndef be16_to_cpu
+#define be16_to_cpu(x)   ntohs(x)
+#endif
+
+#ifndef cpu_to_be16
+#define cpu_to_be16(x)   htons(x)
+#endif
+
+/**
+ *  The TLV Types.
+ *
+ *  Keep these in sync with tlv_code_list in cmd_sys_eeprom.c
+ */
+#define TLV_CODE_PRODUCT_NAME   0x21
+#define TLV_CODE_PART_NUMBER    0x22
+#define TLV_CODE_SERIAL_NUMBER  0x23
+#define TLV_CODE_MAC_BASE       0x24
+#define TLV_CODE_MANUF_DATE     0x25
+#define TLV_CODE_DEVICE_VERSION 0x26
+#define TLV_CODE_LABEL_REVISION 0x27
+#define TLV_CODE_PLATFORM_NAME  0x28
+#define TLV_CODE_ONIE_VERSION   0x29
+#define TLV_CODE_MAC_SIZE       0x2A
+#define TLV_CODE_MANUF_NAME     0x2B
+#define TLV_CODE_MANUF_COUNTRY  0x2C
+#define TLV_CODE_VENDOR_NAME    0x2D
+#define TLV_CODE_DIAG_VERSION   0x2E
+#define TLV_CODE_SERVICE_TAG    0x2F
+#define TLV_CODE_VENDOR_EXT     0xFD
+#define TLV_CODE_CRC_32         0xFE
+
+#define TLV_CODE_NAME_LEN 64
+/*
+ *  Struct for displaying the TLV codes and names.
+ */
+struct tlv_code_desc {
+    u_int8_t m_code;
+    char m_name[TLV_CODE_NAME_LEN];
+};
+
+typedef struct dfd_tlv_type_s {
+    u_int8_t main_type;
+    u_int8_t ext_type;
+} dfd_tlv_type_t;
+
+// Header Field Constants
+#define TLV_INFO_ID_STRING      "TlvInfo"
+#define TLV_INFO_VERSION        0x01
+/*#define TLV_TOTAL_LEN_MAX       (XXXXXXXX - sizeof(tlvinfo_header_t))*/
+
+struct __attribute__ ((__packed__)) tlvinfo_header_s {
+    char    signature[8];   /* 0x00 - 0x07 EEPROM Tag "TlvInfo" */
+    u_int8_t      version;  /* 0x08        Structure version */
+    u_int16_t     totallen; /* 0x09 - 0x0A Length of all data which follows */
+};
+typedef struct tlvinfo_header_s tlvinfo_header_t;
+
+/*
+ * TlvInfo TLV: Layout of a TLV field
+ */
+struct __attribute__ ((__packed__)) tlvinfo_tlv_s {
+    u_int8_t  type;
+    u_int8_t  length;
+    u_int8_t  value[0];
+};
+typedef struct tlvinfo_tlv_s tlvinfo_tlv_t;
+
+#define TLV_VALUE_MAX_LEN        255
+/*
+ * The max decode value is currently for the 'raw' type or the 'vendor
+ * extension' type, both of which have the same decode format.  The
+ * max decode string size is computed as follows:
+ *
+ *   strlen(" 0xFF") * TLV_VALUE_MAX_LEN + 1
+ *
+ */
+#define TLV_DECODE_VALUE_MAX_LEN    ((5 * TLV_VALUE_MAX_LEN) + 1)
+
+typedef struct tlv_decode_value_s {
+    u_int8_t value[TLV_DECODE_VALUE_MAX_LEN];
+    u_int32_t length;
+} tlv_decode_value_t;
+
+typedef enum dfd_tlvinfo_ext_tlv_type_e {
+    DFD_TLVINFO_EXT_TLV_TYPE_DEV_TYPE   = 1,
+} dfd_tlvinfo_ext_tlv_type_t;
+
+#if 0
+#define TLV_TIME_LEN 64
+
+int ipmi_tlv_validate_fru_area(const uint8_t fruid, const char *fru_file_name,
+                           sd_bus *bus_type, const bool bmc_fru);
+
+extern const char *get_vpd_key_names(int key_id);
+extern std::string getService(sdbusplus::bus::bus& bus,
+                         const std::string& intf,
+                         const std::string& path);
+extern std::string getFRUValue(const std::string& section,
+                        const std::string& key,
+                        const std::string& delimiter,
+                        IPMIFruInfo& fruData);
+#endif
+
+int dfd_tlvinfo_get_e2prom_info(u_int8_t *eeprom, u_int32_t size, dfd_tlv_type_t *tlv_type, u_int8_t* buf, u_int8_t *buf_len);
+
+#endif /* endif DFD_OPENBMC_TLVEEPROM_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/fpga_i2c.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/fpga_i2c.h
new file mode 100644
index 000000000000..649a8452debe
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/fpga_i2c.h
@@ -0,0 +1,133 @@
+#ifndef _FPGA_I2C_H
+#define _FPGA_I2C_H
+
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/kallsyms.h>
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+#if 0
+
+#define FPGA_I2C_EXT_9548_ADDR        (0x00)
+#define FPGA_I2C_EXT_9548_CHAN        (0x04)
+#define FPGA_I2C_DEV_SLAVE_ADDR       (0x08)
+#define FPGA_I2C_DEV_REG_ADDR         (0x0C)
+#define FPGA_I2C_DEV_RDWR_LEN         (0x10)
+#define FPGA_I2C_CTRL_REG             (0x14)
+#define FPGA_I2C_STATUS_REG           (0x18)
+#define FPGA_I2C_SCALE_REG            (0x1C)
+#define FPGA_I2C_FILTER_REG           (0x20)
+#define FPGA_I2C_STRETCH_REG          (0x24)
+#define FPGA_I2C_EXT_9548_EXITS_FLAG  (0x28)
+#define FPGA_I2C_INTERNAL_9548_CHAN   (0x2C)
+#define FPGA_I2C_RDWR_DATA_BUF        (0x80)
+#endif
+#define FPGA_I2C_RDWR_MAX_LEN_DEFAULT (128)
+#define I2C_REG_MAX_WIDTH             (16)
+
+#define DEV_NAME_MAX_LEN              (64)
+
+#define FPGA_I2C_MAX_TIMES            (10)
+#define FPGA_I2C_XFER_TIME_OUT        (100000)
+#define FPGA_I2C_SLEEP_TIME           (40)
+
+typedef struct fpga_i2c_reg_s {
+    uint32_t i2c_scale;
+    uint32_t i2c_filter;
+    uint32_t i2c_stretch;
+    uint32_t i2c_ext_9548_exits_flag;
+    uint32_t i2c_ext_9548_addr;
+    uint32_t i2c_ext_9548_chan;
+    uint32_t i2c_in_9548_chan;
+    uint32_t i2c_slave;
+    uint32_t i2c_reg;
+    uint32_t i2c_reg_len;
+    uint32_t i2c_data_len;
+    uint32_t i2c_ctrl;
+    uint32_t i2c_status;
+    uint32_t i2c_err_vec;
+    uint32_t i2c_data_buf;
+    uint32_t i2c_data_buf_len;
+} fpga_i2c_reg_t;
+
+typedef struct fpga_i2c_reset_cfg_s {
+    uint32_t i2c_adap_reset_flag;
+    uint32_t reset_addr;
+    uint32_t reset_on;
+    uint32_t reset_off;
+    uint32_t reset_delay_b;
+    uint32_t reset_delay;
+    uint32_t reset_delay_a;
+} fpga_i2c_reset_cfg_t;
+
+typedef struct fpga_i2c_reg_addr_s {
+    uint8_t reg_addr_len;
+    uint8_t read_reg_addr[I2C_REG_MAX_WIDTH];
+} fpga_i2c_reg_addr_t;
+
+typedef struct fpga_i2c_dev_s {
+    fpga_i2c_reg_t reg;
+    fpga_i2c_reset_cfg_t reset_cfg;
+    fpga_i2c_reg_addr_t i2c_addr_desc;
+    const char *dev_name;
+    uint32_t i2c_scale_value;
+    uint32_t i2c_filter_value;
+    uint32_t i2c_stretch_value;
+    uint32_t i2c_timeout;
+    uint32_t i2c_func_mode;
+    wait_queue_head_t queue;
+    struct i2c_adapter adap;
+    int adap_nr;
+    struct device *dev;
+    bool i2c_params_check;
+} fpga_i2c_dev_t;
+
+typedef struct fpga_i2c_bus_device_s {
+    int i2c_timeout;
+    int i2c_scale;
+    int i2c_filter;
+    int i2c_stretch;
+    int i2c_ext_9548_exits_flag;
+    int i2c_ext_9548_addr;
+    int i2c_ext_9548_chan;
+    int i2c_in_9548_chan;
+    int i2c_slave;
+    int i2c_reg;
+    int i2c_reg_len;
+    int i2c_data_len;
+    int i2c_ctrl;
+    int i2c_status;
+    int i2c_err_vec;
+    int i2c_data_buf;
+    int i2c_data_buf_len;
+    char dev_name[DEV_NAME_MAX_LEN];
+    int adap_nr;
+    int i2c_scale_value;
+    int i2c_filter_value;
+    int i2c_stretch_value;
+    int i2c_func_mode;
+    int i2c_adap_reset_flag;
+    int i2c_reset_addr;
+    int i2c_reset_on;
+    int i2c_reset_off;
+    int i2c_rst_delay_b;        /* delay time before reset(us) */
+    int i2c_rst_delay;          /* reset time(us) */
+    int i2c_rst_delay_a;        /* delay time after reset(us) */
+    int device_flag;
+    bool i2c_params_check;
+    int i2c_data_buf_len_reg;
+    int i2c_offset_reg;
+} fpga_i2c_bus_device_t;
+
+typedef struct fpga_pca954x_device_s {
+    struct i2c_client *client;
+    uint32_t i2c_bus;
+    uint32_t i2c_addr;
+    uint32_t fpga_9548_flag;
+    uint32_t fpga_9548_reset_flag;
+    uint32_t pca9548_base_nr;
+} fpga_pca954x_device_t;
+
+#endif /* _FPGA_I2C_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/Makefile
new file mode 100644
index 000000000000..269e95019cba
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/Makefile
@@ -0,0 +1,21 @@
+PWD		= $(shell pwd)
+
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+#ifdef ENABLE_GCOV
+#ifeq ($(ENABLE_GCOV), y)
+#EXTRA_CFLAGS+= -fprofile-arcs -ftest-coverage -lgcov
+#endif
+#endif # ENABLE_GCOV
+
+obj-m := intel_spi.o
+obj-m += intel_spi_platform.o
+
+all:
+	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
+	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
+	cp -p  $(PWD)/*.ko $(module_out_put_dir)
+clean:
+	rm -f $(PWD)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd
+	rm -f $(PWD)/Module.markers $(PWD)/Module.symvers $(PWD)/modules.order
+	rm -rf $(PWD)/.tmp_versions
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/include/intel_spi.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/include/intel_spi.h
new file mode 100644
index 000000000000..d0a570b1f3b0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/include/intel_spi.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Intel PCH/PCU SPI flash driver.
+ *
+ * Copyright (C) 2016, Intel Corporation
+ * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
+ */
+
+#ifndef INTEL_SPI_H
+#define INTEL_SPI_H
+
+#include <linux/platform_data/intel-spi.h>
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+struct intel_spi;
+struct resource;
+
+struct intel_spi *intel_spi_probe(struct device *dev,
+	struct resource *mem, const struct intel_spi_boardinfo *info);
+int intel_spi_remove(struct intel_spi *ispi);
+
+#endif /* INTEL_SPI_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi.c
new file mode 100644
index 000000000000..98de90f0c0b2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi.c
@@ -0,0 +1,969 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Intel PCH/PCU SPI flash driver.
+ *
+ * Copyright (C) 2016, Intel Corporation
+ * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
+ */
+
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/iopoll.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/sizes.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/spi-nor.h>
+#include <linux/platform_data/intel-spi.h>
+
+#include "intel_spi.h"
+
+/* Offsets are from @ispi->base */
+#define BFPREG				0x00
+
+#define HSFSTS_CTL			0x04
+#define HSFSTS_CTL_FSMIE		BIT(31)
+#define HSFSTS_CTL_FDBC_SHIFT		24
+#define HSFSTS_CTL_FDBC_MASK		(0x3f << HSFSTS_CTL_FDBC_SHIFT)
+
+#define HSFSTS_CTL_FCYCLE_SHIFT		17
+#define HSFSTS_CTL_FCYCLE_MASK		(0x0f << HSFSTS_CTL_FCYCLE_SHIFT)
+/* HW sequencer opcodes */
+#define HSFSTS_CTL_FCYCLE_READ		(0x00 << HSFSTS_CTL_FCYCLE_SHIFT)
+#define HSFSTS_CTL_FCYCLE_WRITE		(0x02 << HSFSTS_CTL_FCYCLE_SHIFT)
+#define HSFSTS_CTL_FCYCLE_ERASE		(0x03 << HSFSTS_CTL_FCYCLE_SHIFT)
+#define HSFSTS_CTL_FCYCLE_ERASE_64K	(0x04 << HSFSTS_CTL_FCYCLE_SHIFT)
+#define HSFSTS_CTL_FCYCLE_RDID		(0x06 << HSFSTS_CTL_FCYCLE_SHIFT)
+#define HSFSTS_CTL_FCYCLE_WRSR		(0x07 << HSFSTS_CTL_FCYCLE_SHIFT)
+#define HSFSTS_CTL_FCYCLE_RDSR		(0x08 << HSFSTS_CTL_FCYCLE_SHIFT)
+
+#define HSFSTS_CTL_FGO			BIT(16)
+#define HSFSTS_CTL_FLOCKDN		BIT(15)
+#define HSFSTS_CTL_FDV			BIT(14)
+#define HSFSTS_CTL_SCIP			BIT(5)
+#define HSFSTS_CTL_AEL			BIT(2)
+#define HSFSTS_CTL_FCERR		BIT(1)
+#define HSFSTS_CTL_FDONE		BIT(0)
+
+#define FADDR				0x08
+#define DLOCK				0x0c
+#define FDATA(n)			(0x10 + ((n) * 4))
+
+#define FRACC				0x50
+
+#define FREG(n)				(0x54 + ((n) * 4))
+#define FREG_BASE_MASK			0x3fff
+#define FREG_LIMIT_SHIFT		16
+#define FREG_LIMIT_MASK			(0x03fff << FREG_LIMIT_SHIFT)
+
+/* Offset is from @ispi->pregs */
+#define PR(n)				((n) * 4)
+#define PR_WPE				BIT(31)
+#define PR_LIMIT_SHIFT			16
+#define PR_LIMIT_MASK			(0x3fff << PR_LIMIT_SHIFT)
+#define PR_RPE				BIT(15)
+#define PR_BASE_MASK			0x3fff
+
+/* Offsets are from @ispi->sregs */
+#define SSFSTS_CTL			0x00
+#define SSFSTS_CTL_FSMIE		BIT(23)
+#define SSFSTS_CTL_DS			BIT(22)
+#define SSFSTS_CTL_DBC_SHIFT		16
+#define SSFSTS_CTL_SPOP			BIT(11)
+#define SSFSTS_CTL_ACS			BIT(10)
+#define SSFSTS_CTL_SCGO			BIT(9)
+#define SSFSTS_CTL_COP_SHIFT		12
+#define SSFSTS_CTL_FRS			BIT(7)
+#define SSFSTS_CTL_DOFRS		BIT(6)
+#define SSFSTS_CTL_AEL			BIT(4)
+#define SSFSTS_CTL_FCERR		BIT(3)
+#define SSFSTS_CTL_FDONE		BIT(2)
+#define SSFSTS_CTL_SCIP			BIT(0)
+
+#define PREOP_OPTYPE			0x04
+#define OPMENU0				0x08
+#define OPMENU1				0x0c
+
+#define OPTYPE_READ_NO_ADDR		0
+#define OPTYPE_WRITE_NO_ADDR		1
+#define OPTYPE_READ_WITH_ADDR		2
+#define OPTYPE_WRITE_WITH_ADDR		3
+
+/* CPU specifics */
+#define BYT_PR				0x74
+#define BYT_SSFSTS_CTL			0x90
+#define BYT_BCR				0xfc
+#define BYT_BCR_WPD			BIT(0)
+#define BYT_FREG_NUM			5
+#define BYT_PR_NUM			5
+
+#define LPT_PR				0x74
+#define LPT_SSFSTS_CTL			0x90
+#define LPT_FREG_NUM			5
+#define LPT_PR_NUM			5
+
+#define BXT_PR				0x84
+#define BXT_SSFSTS_CTL			0xa0
+#define BXT_FREG_NUM			12
+#define BXT_PR_NUM			6
+
+#define CNL_PR				0x84
+#define CNL_FREG_NUM			6
+#define CNL_PR_NUM			5
+
+#define LVSCC				0xc4
+#define UVSCC				0xc8
+#define ERASE_OPCODE_SHIFT		8
+#define ERASE_OPCODE_MASK		(0xff << ERASE_OPCODE_SHIFT)
+#define ERASE_64K_OPCODE_SHIFT		16
+#define ERASE_64K_OPCODE_MASK		(0xff << ERASE_OPCODE_SHIFT)
+
+#define INTEL_SPI_TIMEOUT		5000 /* ms */
+#define INTEL_SPI_FIFO_SZ		64
+
+/**
+ * struct intel_spi - Driver private data
+ * @dev: Device pointer
+ * @info: Pointer to board specific info
+ * @nor: SPI NOR layer structure
+ * @base: Beginning of MMIO space
+ * @pregs: Start of protection registers
+ * @sregs: Start of software sequencer registers
+ * @nregions: Maximum number of regions
+ * @pr_num: Maximum number of protected range registers
+ * @writeable: Is the chip writeable
+ * @locked: Is SPI setting locked
+ * @swseq_reg: Use SW sequencer in register reads/writes
+ * @swseq_erase: Use SW sequencer in erase operation
+ * @erase_64k: 64k erase supported
+ * @atomic_preopcode: Holds preopcode when atomic sequence is requested
+ * @opcodes: Opcodes which are supported. This are programmed by BIOS
+ *           before it locks down the controller.
+ */
+struct intel_spi {
+	struct device *dev;
+	const struct intel_spi_boardinfo *info;
+	struct spi_nor nor;
+	void __iomem *base;
+	void __iomem *pregs;
+	void __iomem *sregs;
+	size_t nregions;
+	size_t pr_num;
+	bool writeable;
+	bool locked;
+	bool swseq_reg;
+	bool swseq_erase;
+	bool erase_64k;
+	u8 atomic_preopcode;
+	u8 opcodes[8];
+};
+
+static bool writeable;
+module_param(writeable, bool, 0);
+MODULE_PARM_DESC(writeable, "Enable write access to SPI flash chip (default=0)");
+
+static void intel_spi_dump_regs(struct intel_spi *ispi)
+{
+	u32 value;
+	int i;
+
+	dev_dbg(ispi->dev, "BFPREG=0x%08x\n", readl(ispi->base + BFPREG));
+
+	value = readl(ispi->base + HSFSTS_CTL);
+	dev_dbg(ispi->dev, "HSFSTS_CTL=0x%08x\n", value);
+	if (value & HSFSTS_CTL_FLOCKDN)
+		dev_dbg(ispi->dev, "-> Locked\n");
+
+	dev_dbg(ispi->dev, "FADDR=0x%08x\n", readl(ispi->base + FADDR));
+	dev_dbg(ispi->dev, "DLOCK=0x%08x\n", readl(ispi->base + DLOCK));
+
+	for (i = 0; i < 16; i++)
+		dev_dbg(ispi->dev, "FDATA(%d)=0x%08x\n",
+			i, readl(ispi->base + FDATA(i)));
+
+	dev_dbg(ispi->dev, "FRACC=0x%08x\n", readl(ispi->base + FRACC));
+
+	for (i = 0; i < ispi->nregions; i++)
+		dev_dbg(ispi->dev, "FREG(%d)=0x%08x\n", i,
+			readl(ispi->base + FREG(i)));
+	for (i = 0; i < ispi->pr_num; i++)
+		dev_dbg(ispi->dev, "PR(%d)=0x%08x\n", i,
+			readl(ispi->pregs + PR(i)));
+
+	if (ispi->sregs) {
+		value = readl(ispi->sregs + SSFSTS_CTL);
+		dev_dbg(ispi->dev, "SSFSTS_CTL=0x%08x\n", value);
+		dev_dbg(ispi->dev, "PREOP_OPTYPE=0x%08x\n",
+			readl(ispi->sregs + PREOP_OPTYPE));
+		dev_dbg(ispi->dev, "OPMENU0=0x%08x\n",
+			readl(ispi->sregs + OPMENU0));
+		dev_dbg(ispi->dev, "OPMENU1=0x%08x\n",
+			readl(ispi->sregs + OPMENU1));
+	}
+
+	if (ispi->info->type == INTEL_SPI_BYT)
+		dev_dbg(ispi->dev, "BCR=0x%08x\n", readl(ispi->base + BYT_BCR));
+
+	dev_dbg(ispi->dev, "LVSCC=0x%08x\n", readl(ispi->base + LVSCC));
+	dev_dbg(ispi->dev, "UVSCC=0x%08x\n", readl(ispi->base + UVSCC));
+
+	dev_dbg(ispi->dev, "Protected regions:\n");
+	for (i = 0; i < ispi->pr_num; i++) {
+		u32 base, limit;
+
+		value = readl(ispi->pregs + PR(i));
+		if (!(value & (PR_WPE | PR_RPE)))
+			continue;
+
+		limit = (value & PR_LIMIT_MASK) >> PR_LIMIT_SHIFT;
+		base = value & PR_BASE_MASK;
+
+		dev_dbg(ispi->dev, " %02d base: 0x%08x limit: 0x%08x [%c%c]\n",
+			 i, base << 12, (limit << 12) | 0xfff,
+			 value & PR_WPE ? 'W' : '.',
+			 value & PR_RPE ? 'R' : '.');
+	}
+
+	dev_dbg(ispi->dev, "Flash regions:\n");
+	for (i = 0; i < ispi->nregions; i++) {
+		u32 region, base, limit;
+
+		region = readl(ispi->base + FREG(i));
+		base = region & FREG_BASE_MASK;
+		limit = (region & FREG_LIMIT_MASK) >> FREG_LIMIT_SHIFT;
+
+		if (base >= limit || (i > 0 && limit == 0))
+			dev_dbg(ispi->dev, " %02d disabled\n", i);
+		else
+			dev_dbg(ispi->dev, " %02d base: 0x%08x limit: 0x%08x\n",
+				 i, base << 12, (limit << 12) | 0xfff);
+	}
+
+	dev_dbg(ispi->dev, "Using %cW sequencer for register access\n",
+		ispi->swseq_reg ? 'S' : 'H');
+	dev_dbg(ispi->dev, "Using %cW sequencer for erase operation\n",
+		ispi->swseq_erase ? 'S' : 'H');
+}
+
+/* Reads max INTEL_SPI_FIFO_SZ bytes from the device fifo */
+static int intel_spi_read_block(struct intel_spi *ispi, void *buf, size_t size)
+{
+	size_t bytes;
+	int i = 0;
+
+	if (size > INTEL_SPI_FIFO_SZ)
+		return -EINVAL;
+
+	while (size > 0) {
+		bytes = min_t(size_t, size, 4);
+		memcpy_fromio(buf, ispi->base + FDATA(i), bytes);
+		size -= bytes;
+		buf += bytes;
+		i++;
+	}
+
+	return 0;
+}
+
+/* Writes max INTEL_SPI_FIFO_SZ bytes to the device fifo */
+static int intel_spi_write_block(struct intel_spi *ispi, const void *buf,
+				 size_t size)
+{
+	size_t bytes;
+	int i = 0;
+
+	if (size > INTEL_SPI_FIFO_SZ)
+		return -EINVAL;
+
+	while (size > 0) {
+		bytes = min_t(size_t, size, 4);
+		memcpy_toio(ispi->base + FDATA(i), buf, bytes);
+		size -= bytes;
+		buf += bytes;
+		i++;
+	}
+
+	return 0;
+}
+
+static int intel_spi_wait_hw_busy(struct intel_spi *ispi)
+{
+	u32 val;
+
+	return readl_poll_timeout(ispi->base + HSFSTS_CTL, val,
+				  !(val & HSFSTS_CTL_SCIP), 0,
+				  INTEL_SPI_TIMEOUT * 1000);
+}
+
+static int intel_spi_wait_sw_busy(struct intel_spi *ispi)
+{
+	u32 val;
+
+	return readl_poll_timeout(ispi->sregs + SSFSTS_CTL, val,
+				  !(val & SSFSTS_CTL_SCIP), 0,
+				  INTEL_SPI_TIMEOUT * 1000);
+}
+
+static int intel_spi_init(struct intel_spi *ispi)
+{
+	u32 opmenu0, opmenu1, lvscc, uvscc, val;
+	int i;
+
+	switch (ispi->info->type) {
+	case INTEL_SPI_BYT:
+		ispi->sregs = ispi->base + BYT_SSFSTS_CTL;
+		ispi->pregs = ispi->base + BYT_PR;
+		ispi->nregions = BYT_FREG_NUM;
+		ispi->pr_num = BYT_PR_NUM;
+		ispi->swseq_reg = true;
+
+		if (writeable) {
+			/* Disable write protection */
+			val = readl(ispi->base + BYT_BCR);
+			if (!(val & BYT_BCR_WPD)) {
+				val |= BYT_BCR_WPD;
+				writel(val, ispi->base + BYT_BCR);
+				val = readl(ispi->base + BYT_BCR);
+			}
+
+			ispi->writeable = !!(val & BYT_BCR_WPD);
+		}
+
+		break;
+
+	case INTEL_SPI_LPT:
+		ispi->sregs = ispi->base + LPT_SSFSTS_CTL;
+		ispi->pregs = ispi->base + LPT_PR;
+		ispi->nregions = LPT_FREG_NUM;
+		ispi->pr_num = LPT_PR_NUM;
+		ispi->swseq_reg = true;
+		break;
+
+	case INTEL_SPI_BXT:
+		ispi->sregs = ispi->base + BXT_SSFSTS_CTL;
+		ispi->pregs = ispi->base + BXT_PR;
+		ispi->nregions = BXT_FREG_NUM;
+		ispi->pr_num = BXT_PR_NUM;
+		ispi->erase_64k = true;
+		break;
+
+	case INTEL_SPI_CNL:
+		ispi->sregs = NULL;
+		ispi->pregs = ispi->base + CNL_PR;
+		ispi->nregions = CNL_FREG_NUM;
+		ispi->pr_num = CNL_PR_NUM;
+		break;
+
+	default:
+		return -EINVAL;
+	}
+
+	/* Disable #SMI generation from HW sequencer */
+	val = readl(ispi->base + HSFSTS_CTL);
+	val &= ~HSFSTS_CTL_FSMIE;
+	writel(val, ispi->base + HSFSTS_CTL);
+
+	/*
+	 * Determine whether erase operation should use HW or SW sequencer.
+	 *
+	 * The HW sequencer has a predefined list of opcodes, with only the
+	 * erase opcode being programmable in LVSCC and UVSCC registers.
+	 * If these registers don't contain a valid erase opcode, erase
+	 * cannot be done using HW sequencer.
+	 */
+	lvscc = readl(ispi->base + LVSCC);
+	uvscc = readl(ispi->base + UVSCC);
+	if (!(lvscc & ERASE_OPCODE_MASK) || !(uvscc & ERASE_OPCODE_MASK))
+		ispi->swseq_erase = true;
+	/* SPI controller on Intel BXT supports 64K erase opcode */
+	if (ispi->info->type == INTEL_SPI_BXT && !ispi->swseq_erase)
+		if (!(lvscc & ERASE_64K_OPCODE_MASK) ||
+		    !(uvscc & ERASE_64K_OPCODE_MASK))
+			ispi->erase_64k = false;
+
+	if (ispi->sregs == NULL && (ispi->swseq_reg || ispi->swseq_erase)) {
+		dev_err(ispi->dev, "software sequencer not supported, but required\n");
+		return -EINVAL;
+	}
+
+	/*
+	 * Some controllers can only do basic operations using hardware
+	 * sequencer. All other operations are supposed to be carried out
+	 * using software sequencer.
+	 */
+	if (ispi->swseq_reg) {
+		/* Disable #SMI generation from SW sequencer */
+		val = readl(ispi->sregs + SSFSTS_CTL);
+		val &= ~SSFSTS_CTL_FSMIE;
+		writel(val, ispi->sregs + SSFSTS_CTL);
+	}
+
+	/* Check controller's lock status */
+	val = readl(ispi->base + HSFSTS_CTL);
+	ispi->locked = !!(val & HSFSTS_CTL_FLOCKDN);
+
+	if (ispi->locked && ispi->sregs) {
+		/*
+		 * BIOS programs allowed opcodes and then locks down the
+		 * register. So read back what opcodes it decided to support.
+		 * That's the set we are going to support as well.
+		 */
+		opmenu0 = readl(ispi->sregs + OPMENU0);
+		opmenu1 = readl(ispi->sregs + OPMENU1);
+
+		if (opmenu0 && opmenu1) {
+			for (i = 0; i < ARRAY_SIZE(ispi->opcodes) / 2; i++) {
+				ispi->opcodes[i] = opmenu0 >> i * 8;
+				ispi->opcodes[i + 4] = opmenu1 >> i * 8;
+			}
+		}
+	}
+
+	intel_spi_dump_regs(ispi);
+
+	return 0;
+}
+
+static int intel_spi_opcode_index(struct intel_spi *ispi, u8 opcode, int optype)
+{
+	int i;
+	int preop;
+
+	if (ispi->locked) {
+		for (i = 0; i < ARRAY_SIZE(ispi->opcodes); i++)
+			if (ispi->opcodes[i] == opcode)
+				return i;
+
+		return -EINVAL;
+	}
+
+	/* The lock is off, so just use index 0 */
+	writel(opcode, ispi->sregs + OPMENU0);
+	preop = readw(ispi->sregs + PREOP_OPTYPE);
+	writel(optype << 16 | preop, ispi->sregs + PREOP_OPTYPE);
+
+	return 0;
+}
+
+static int intel_spi_hw_cycle(struct intel_spi *ispi, u8 opcode, size_t len)
+{
+	u32 val, status;
+	int ret;
+
+	val = readl(ispi->base + HSFSTS_CTL);
+	val &= ~(HSFSTS_CTL_FCYCLE_MASK | HSFSTS_CTL_FDBC_MASK);
+
+	switch (opcode) {
+	case SPINOR_OP_RDID:
+		val |= HSFSTS_CTL_FCYCLE_RDID;
+		break;
+	case SPINOR_OP_WRSR:
+		val |= HSFSTS_CTL_FCYCLE_WRSR;
+		break;
+	case SPINOR_OP_RDSR:
+		val |= HSFSTS_CTL_FCYCLE_RDSR;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	if (len > INTEL_SPI_FIFO_SZ)
+		return -EINVAL;
+
+	val |= (len - 1) << HSFSTS_CTL_FDBC_SHIFT;
+	val |= HSFSTS_CTL_FCERR | HSFSTS_CTL_FDONE;
+	val |= HSFSTS_CTL_FGO;
+	writel(val, ispi->base + HSFSTS_CTL);
+
+	ret = intel_spi_wait_hw_busy(ispi);
+	if (ret)
+		return ret;
+
+	status = readl(ispi->base + HSFSTS_CTL);
+	if (status & HSFSTS_CTL_FCERR)
+		return -EIO;
+	else if (status & HSFSTS_CTL_AEL)
+		return -EACCES;
+
+	return 0;
+}
+
+static int intel_spi_sw_cycle(struct intel_spi *ispi, u8 opcode, size_t len,
+			      int optype)
+{
+	u32 val = 0, status;
+	u8 atomic_preopcode;
+	int ret;
+
+	ret = intel_spi_opcode_index(ispi, opcode, optype);
+	if (ret < 0)
+		return ret;
+
+	if (len > INTEL_SPI_FIFO_SZ)
+		return -EINVAL;
+
+	/*
+	 * Always clear it after each SW sequencer operation regardless
+	 * of whether it is successful or not.
+	 */
+	atomic_preopcode = ispi->atomic_preopcode;
+	ispi->atomic_preopcode = 0;
+
+	/* Only mark 'Data Cycle' bit when there is data to be transferred */
+	if (len > 0)
+		val = ((len - 1) << SSFSTS_CTL_DBC_SHIFT) | SSFSTS_CTL_DS;
+	val |= ret << SSFSTS_CTL_COP_SHIFT;
+	val |= SSFSTS_CTL_FCERR | SSFSTS_CTL_FDONE;
+	val |= SSFSTS_CTL_SCGO;
+	if (atomic_preopcode) {
+		u16 preop;
+
+		switch (optype) {
+		case OPTYPE_WRITE_NO_ADDR:
+		case OPTYPE_WRITE_WITH_ADDR:
+			/* Pick matching preopcode for the atomic sequence */
+			preop = readw(ispi->sregs + PREOP_OPTYPE);
+			if ((preop & 0xff) == atomic_preopcode)
+				; /* Do nothing */
+			else if ((preop >> 8) == atomic_preopcode)
+				val |= SSFSTS_CTL_SPOP;
+			else
+				return -EINVAL;
+
+			/* Enable atomic sequence */
+			val |= SSFSTS_CTL_ACS;
+			break;
+
+		default:
+			return -EINVAL;
+		}
+
+	}
+	writel(val, ispi->sregs + SSFSTS_CTL);
+
+	ret = intel_spi_wait_sw_busy(ispi);
+	if (ret)
+		return ret;
+
+	status = readl(ispi->sregs + SSFSTS_CTL);
+	if (status & SSFSTS_CTL_FCERR)
+		return -EIO;
+	else if (status & SSFSTS_CTL_AEL)
+		return -EACCES;
+
+	return 0;
+}
+
+static int intel_spi_read_reg(struct spi_nor *nor, u8 opcode, u8 *buf,
+			      size_t len)
+{
+	struct intel_spi *ispi = nor->priv;
+	int ret;
+
+	/* Address of the first chip */
+	writel(0, ispi->base + FADDR);
+
+	if (ispi->swseq_reg)
+		ret = intel_spi_sw_cycle(ispi, opcode, len,
+					 OPTYPE_READ_NO_ADDR);
+	else
+		ret = intel_spi_hw_cycle(ispi, opcode, len);
+
+	if (ret)
+		return ret;
+
+	return intel_spi_read_block(ispi, buf, len);
+}
+
+static int intel_spi_write_reg(struct spi_nor *nor, u8 opcode, const u8 *buf,
+			       size_t len)
+{
+	struct intel_spi *ispi = nor->priv;
+	int ret;
+
+	/*
+	 * This is handled with atomic operation and preop code in Intel
+	 * controller so we only verify that it is available. If the
+	 * controller is not locked, program the opcode to the PREOP
+	 * register for later use.
+	 *
+	 * When hardware sequencer is used there is no need to program
+	 * any opcodes (it handles them automatically as part of a command).
+	 */
+	if (opcode == SPINOR_OP_WREN) {
+		u16 preop;
+
+		if (!ispi->swseq_reg)
+			return 0;
+
+		preop = readw(ispi->sregs + PREOP_OPTYPE);
+		if ((preop & 0xff) != opcode && (preop >> 8) != opcode) {
+			if (ispi->locked)
+				return -EINVAL;
+			writel(opcode, ispi->sregs + PREOP_OPTYPE);
+		}
+
+		/*
+		 * This enables atomic sequence on next SW sycle. Will
+		 * be cleared after next operation.
+		 */
+		ispi->atomic_preopcode = opcode;
+		return 0;
+	}
+
+	/*
+	 * We hope that HW sequencer will do the right thing automatically and
+	 * with the SW sequencer we cannot use preopcode anyway, so just ignore
+	 * the Write Disable operation and pretend it was completed
+	 * successfully.
+	 */
+	if (opcode == SPINOR_OP_WRDI)
+		return 0;
+
+	writel(0, ispi->base + FADDR);
+
+	/* Write the value beforehand */
+	ret = intel_spi_write_block(ispi, buf, len);
+	if (ret)
+		return ret;
+
+	if (ispi->swseq_reg)
+		return intel_spi_sw_cycle(ispi, opcode, len,
+					  OPTYPE_WRITE_NO_ADDR);
+	return intel_spi_hw_cycle(ispi, opcode, len);
+}
+
+static ssize_t intel_spi_read(struct spi_nor *nor, loff_t from, size_t len,
+			      u_char *read_buf)
+{
+	struct intel_spi *ispi = nor->priv;
+	size_t block_size, retlen = 0;
+	u32 val, status;
+	ssize_t ret;
+
+	/*
+	 * Atomic sequence is not expected with HW sequencer reads. Make
+	 * sure it is cleared regardless.
+	 */
+	if (WARN_ON_ONCE(ispi->atomic_preopcode))
+		ispi->atomic_preopcode = 0;
+
+	switch (nor->read_opcode) {
+	case SPINOR_OP_READ:
+	case SPINOR_OP_READ_FAST:
+	case SPINOR_OP_READ_4B:
+	case SPINOR_OP_READ_FAST_4B:
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	while (len > 0) {
+		block_size = min_t(size_t, len, INTEL_SPI_FIFO_SZ);
+
+		/* Read cannot cross 4K boundary */
+		block_size = min_t(loff_t, from + block_size,
+				   round_up(from + 1, SZ_4K)) - from;
+
+		writel(from, ispi->base + FADDR);
+
+		val = readl(ispi->base + HSFSTS_CTL);
+		val &= ~(HSFSTS_CTL_FDBC_MASK | HSFSTS_CTL_FCYCLE_MASK);
+		val |= HSFSTS_CTL_AEL | HSFSTS_CTL_FCERR | HSFSTS_CTL_FDONE;
+		val |= (block_size - 1) << HSFSTS_CTL_FDBC_SHIFT;
+		val |= HSFSTS_CTL_FCYCLE_READ;
+		val |= HSFSTS_CTL_FGO;
+		writel(val, ispi->base + HSFSTS_CTL);
+
+		ret = intel_spi_wait_hw_busy(ispi);
+		if (ret)
+			return ret;
+
+		status = readl(ispi->base + HSFSTS_CTL);
+		if (status & HSFSTS_CTL_FCERR)
+			ret = -EIO;
+		else if (status & HSFSTS_CTL_AEL)
+			ret = -EACCES;
+
+		if (ret < 0) {
+			dev_err(ispi->dev, "read error: %llx: %#x\n", from,
+				status);
+			return ret;
+		}
+
+		ret = intel_spi_read_block(ispi, read_buf, block_size);
+		if (ret)
+			return ret;
+
+		len -= block_size;
+		from += block_size;
+		retlen += block_size;
+		read_buf += block_size;
+	}
+
+	return retlen;
+}
+
+static ssize_t intel_spi_write(struct spi_nor *nor, loff_t to, size_t len,
+			       const u_char *write_buf)
+{
+	struct intel_spi *ispi = nor->priv;
+	size_t block_size, retlen = 0;
+	u32 val, status;
+	ssize_t ret;
+
+	/* Not needed with HW sequencer write, make sure it is cleared */
+	ispi->atomic_preopcode = 0;
+
+	while (len > 0) {
+		block_size = min_t(size_t, len, INTEL_SPI_FIFO_SZ);
+
+		/* Write cannot cross 4K boundary */
+		block_size = min_t(loff_t, to + block_size,
+				   round_up(to + 1, SZ_4K)) - to;
+
+		writel(to, ispi->base + FADDR);
+
+		val = readl(ispi->base + HSFSTS_CTL);
+		val &= ~(HSFSTS_CTL_FDBC_MASK | HSFSTS_CTL_FCYCLE_MASK);
+		val |= HSFSTS_CTL_AEL | HSFSTS_CTL_FCERR | HSFSTS_CTL_FDONE;
+		val |= (block_size - 1) << HSFSTS_CTL_FDBC_SHIFT;
+		val |= HSFSTS_CTL_FCYCLE_WRITE;
+
+		ret = intel_spi_write_block(ispi, write_buf, block_size);
+		if (ret) {
+			dev_err(ispi->dev, "failed to write block\n");
+			return ret;
+		}
+
+		/* Start the write now */
+		val |= HSFSTS_CTL_FGO;
+		writel(val, ispi->base + HSFSTS_CTL);
+
+		ret = intel_spi_wait_hw_busy(ispi);
+		if (ret) {
+			dev_err(ispi->dev, "timeout\n");
+			return ret;
+		}
+
+		status = readl(ispi->base + HSFSTS_CTL);
+		if (status & HSFSTS_CTL_FCERR)
+			ret = -EIO;
+		else if (status & HSFSTS_CTL_AEL)
+			ret = -EACCES;
+
+		if (ret < 0) {
+			dev_err(ispi->dev, "write error: %llx: %#x\n", to,
+				status);
+			return ret;
+		}
+
+		len -= block_size;
+		to += block_size;
+		retlen += block_size;
+		write_buf += block_size;
+	}
+
+	return retlen;
+}
+
+static int intel_spi_erase(struct spi_nor *nor, loff_t offs)
+{
+	size_t erase_size, len = nor->mtd.erasesize;
+	struct intel_spi *ispi = nor->priv;
+	u32 val, status, cmd;
+	int ret;
+
+	/* If the hardware can do 64k erase use that when possible */
+	if (len >= SZ_64K && ispi->erase_64k) {
+		cmd = HSFSTS_CTL_FCYCLE_ERASE_64K;
+		erase_size = SZ_64K;
+	} else {
+		cmd = HSFSTS_CTL_FCYCLE_ERASE;
+		erase_size = SZ_4K;
+	}
+
+	if (ispi->swseq_erase) {
+		while (len > 0) {
+			writel(offs, ispi->base + FADDR);
+
+			ret = intel_spi_sw_cycle(ispi, nor->erase_opcode,
+						 0, OPTYPE_WRITE_WITH_ADDR);
+			if (ret)
+				return ret;
+
+			offs += erase_size;
+			len -= erase_size;
+		}
+
+		return 0;
+	}
+
+	/* Not needed with HW sequencer erase, make sure it is cleared */
+	ispi->atomic_preopcode = 0;
+
+	while (len > 0) {
+		writel(offs, ispi->base + FADDR);
+
+		val = readl(ispi->base + HSFSTS_CTL);
+		val &= ~(HSFSTS_CTL_FDBC_MASK | HSFSTS_CTL_FCYCLE_MASK);
+		val |= HSFSTS_CTL_AEL | HSFSTS_CTL_FCERR | HSFSTS_CTL_FDONE;
+		val |= cmd;
+		val |= HSFSTS_CTL_FGO;
+		writel(val, ispi->base + HSFSTS_CTL);
+
+		ret = intel_spi_wait_hw_busy(ispi);
+		if (ret)
+			return ret;
+
+		status = readl(ispi->base + HSFSTS_CTL);
+		if (status & HSFSTS_CTL_FCERR)
+			return -EIO;
+		else if (status & HSFSTS_CTL_AEL)
+			return -EACCES;
+
+		offs += erase_size;
+		len -= erase_size;
+	}
+
+	return 0;
+}
+
+static bool intel_spi_is_protected(const struct intel_spi *ispi,
+				   unsigned int base, unsigned int limit)
+{
+	int i;
+
+	for (i = 0; i < ispi->pr_num; i++) {
+		u32 pr_base, pr_limit, pr_value;
+
+		pr_value = readl(ispi->pregs + PR(i));
+		if (!(pr_value & (PR_WPE | PR_RPE)))
+			continue;
+
+		pr_limit = (pr_value & PR_LIMIT_MASK) >> PR_LIMIT_SHIFT;
+		pr_base = pr_value & PR_BASE_MASK;
+
+		if (pr_base >= base && pr_limit <= limit)
+			return true;
+	}
+
+	return false;
+}
+
+/*
+ * There will be a single partition holding all enabled flash regions. We
+ * call this "BIOS".
+ */
+static void intel_spi_fill_partition(struct intel_spi *ispi,
+				     struct mtd_partition *part)
+{
+	u64 end;
+	int i;
+
+	mem_clear(part, sizeof(*part));
+
+	/* Start from the mandatory descriptor region */
+	part->size = 4096;
+	part->name = "BIOS";
+
+	/*
+	 * Now try to find where this partition ends based on the flash
+	 * region registers.
+	 */
+	for (i = 1; i < ispi->nregions; i++) {
+		u32 region, base, limit;
+
+		region = readl(ispi->base + FREG(i));
+		base = region & FREG_BASE_MASK;
+		limit = (region & FREG_LIMIT_MASK) >> FREG_LIMIT_SHIFT;
+
+		if (base >= limit || limit == 0)
+			continue;
+
+		/*
+		 * If any of the regions have protection bits set, make the
+		 * whole partition read-only to be on the safe side.
+		 */
+		if (intel_spi_is_protected(ispi, base, limit))
+			ispi->writeable = false;
+
+		end = (limit << 12) + 4096;
+		if (end > part->size)
+			part->size = end;
+	}
+}
+
+static const struct spi_nor_controller_ops intel_spi_controller_ops = {
+	.read_reg = intel_spi_read_reg,
+	.write_reg = intel_spi_write_reg,
+	.read = intel_spi_read,
+	.write = intel_spi_write,
+	.erase = intel_spi_erase,
+};
+
+struct intel_spi *intel_spi_probe(struct device *dev,
+	struct resource *mem, const struct intel_spi_boardinfo *info)
+{
+	const struct spi_nor_hwcaps hwcaps = {
+		.mask = SNOR_HWCAPS_READ |
+			SNOR_HWCAPS_READ_FAST |
+			SNOR_HWCAPS_PP,
+	};
+	struct mtd_partition part;
+	struct intel_spi *ispi;
+	int ret;
+
+	if (!info || !mem)
+		return ERR_PTR(-EINVAL);
+
+	ispi = devm_kzalloc(dev, sizeof(*ispi), GFP_KERNEL);
+	if (!ispi)
+		return ERR_PTR(-ENOMEM);
+
+	ispi->base = devm_ioremap_resource(dev, mem);
+	if (IS_ERR(ispi->base))
+		return ERR_CAST(ispi->base);
+
+	ispi->dev = dev;
+	ispi->info = info;
+	ispi->writeable = info->writeable;
+
+	ret = intel_spi_init(ispi);
+	if (ret)
+		return ERR_PTR(ret);
+
+	ispi->nor.dev = ispi->dev;
+	ispi->nor.priv = ispi;
+	ispi->nor.controller_ops = &intel_spi_controller_ops;
+
+	ret = spi_nor_scan(&ispi->nor, NULL, &hwcaps);
+	if (ret) {
+		dev_info(dev, "failed to locate the chip\n");
+		return ERR_PTR(ret);
+	}
+
+	intel_spi_fill_partition(ispi, &part);
+
+	/* Prevent writes if not explicitly enabled */
+	if (!ispi->writeable || !writeable)
+		ispi->nor.mtd.flags &= ~MTD_WRITEABLE;
+
+	ret = mtd_device_register(&ispi->nor.mtd, &part, 1);
+	if (ret)
+		return ERR_PTR(ret);
+
+	return ispi;
+}
+EXPORT_SYMBOL_GPL(intel_spi_probe);
+
+int intel_spi_remove(struct intel_spi *ispi)
+{
+	return mtd_device_unregister(&ispi->nor.mtd);
+}
+EXPORT_SYMBOL_GPL(intel_spi_remove);
+
+MODULE_DESCRIPTION("Intel PCH/PCU SPI flash core driver");
+MODULE_AUTHOR("support");
+MODULE_LICENSE("GPL v2");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi_platform.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi_platform.c
new file mode 100644
index 000000000000..b9f294860ce4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi_platform.c
@@ -0,0 +1,167 @@
+/*
+ * Intel PCH/PCU SPI flash platform driver.
+ *
+ * Copyright (C) 2016, Intel Corporation
+ * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/ioport.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/pci.h>
+
+#include "intel_spi.h"
+
+#define PCI_VENDOR_ID_D1527_LPC             (0x8c54)
+
+#define BIOS_CNTL             (0xdc)
+#define BIOS_CNTL_SRC_SHIFT    2
+#define BIOS_CNTL_WN          BIT(0)
+#define BIOS_CNTL_BLE         BIT(1)
+#define BIOS_CNTL_SMM_BMP     BIT(5)
+
+#define RCBABASE		0xf0
+
+int intel_spi_platform_debug = 0;
+module_param(intel_spi_platform_debug, int, S_IRUGO | S_IWUSR);
+int intel_spi_platform_error = 0;
+module_param(intel_spi_platform_error, int, S_IRUGO | S_IWUSR);
+
+static bool writeable;
+module_param(writeable, bool, 0);
+MODULE_PARM_DESC(writeable, "Enable write access to BIOS (default=0)");
+
+#define INTEL_SPI_PLATFORM_VERBOSE(fmt, args...) do {                                        \
+        if (intel_spi_platform_debug) { \
+            printk(KERN_INFO "[INTEL_SPI_PLATFORM][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+        } \
+    } while (0)
+
+#define INTEL_SPI_PLATFORM_ERROR(fmt, args...) do {                                        \
+        if (intel_spi_platform_error) { \
+            printk(KERN_ERR "[INTEL_SPI_PLATFORM][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+        } \
+    } while (0)
+
+static void intel_spi_enable_bios_write(struct pci_dev *pci_dev, struct intel_spi_boardinfo *info)
+{
+    u8 bios_cntl, value, want, new;
+
+    if (writeable) {
+        pci_read_config_byte(pci_dev, BIOS_CNTL, &bios_cntl);
+        want = bios_cntl;
+        value = (bios_cntl >> BIOS_CNTL_SRC_SHIFT) & 0x3 ;
+        if (value == 0x3) {
+            INTEL_SPI_PLATFORM_VERBOSE("invalid prefetching/caching settings, ");
+        } else {
+            INTEL_SPI_PLATFORM_VERBOSE("prefetching %sabled, caching %sabled, ",
+                (value & 0x2) ? "en" : "dis",
+                (value & 0x1) ? "dis" : "en");
+        }
+
+        /* writeable regardless */
+        want &= ~BIOS_CNTL_SMM_BMP;
+        /* write enable */
+        want |= BIOS_CNTL_WN;
+        /* BIOS lock disabled */
+        want &= ~BIOS_CNTL_BLE;
+        INTEL_SPI_PLATFORM_VERBOSE("bios cntl is:0x%x, want is:0x%x\n", bios_cntl, want);
+        pci_write_config_byte(pci_dev, BIOS_CNTL, want);
+        pci_read_config_byte(pci_dev, BIOS_CNTL, &new);
+        INTEL_SPI_PLATFORM_VERBOSE("\nBIOS_CNTL = 0x%02x: ", new);
+        INTEL_SPI_PLATFORM_VERBOSE("BIOS Lock Enable: %sabled, ", (new & BIOS_CNTL_BLE) ? "en" : "dis");
+        INTEL_SPI_PLATFORM_VERBOSE("BIOS Write Enable: %sabled\n", (new & BIOS_CNTL_WN) ? "en" : "dis");
+
+        if (new & BIOS_CNTL_SMM_BMP) {
+            INTEL_SPI_PLATFORM_VERBOSE("BIOS region SMM protection is enabled!\n");
+        }
+
+        if (new != want) {
+            INTEL_SPI_PLATFORM_VERBOSE("Warning: Setting Bios Control at 0x%x from 0x%02x to 0x%02x failed.\n"
+                "New value is 0x%02x.\n", BIOS_CNTL, value, want, new);
+        } else {
+            info->writeable = !!(new & BIOS_CNTL_WN);
+        }
+        INTEL_SPI_PLATFORM_VERBOSE("Bios Control is 0x%x\n", new);
+    } else {
+        INTEL_SPI_PLATFORM_VERBOSE("Bios don't write\n");
+    }
+
+    return ;
+}
+
+static int intel_spi_platform_probe(struct platform_device *pdev)
+{
+	struct intel_spi_boardinfo *info;
+	struct intel_spi *ispi;
+	struct resource *mem;
+    struct pci_dev *pci_dev = NULL;
+    u32 rcba;
+
+	info = dev_get_platdata(&pdev->dev);
+	if (!info)
+		return -EINVAL;
+
+    pci_dev = pci_get_device(PCI_VENDOR_ID_INTEL, PCI_VENDOR_ID_D1527_LPC, pci_dev);
+    if (!pci_dev) {
+        INTEL_SPI_PLATFORM_ERROR("pci_get_device(0x8086, 0x8c54) failed!\n");
+        return -1;
+    }
+
+    switch (info->type) {
+    case INTEL_SPI_LPT:
+        pci_read_config_dword(pci_dev, RCBABASE, &rcba);
+        if (rcba & 1) {
+            intel_spi_enable_bios_write(pci_dev, info);
+        }
+        break;
+    default:
+        INTEL_SPI_PLATFORM_ERROR("info type[%d] not need set writeable.\n",info->type);
+        break;
+    }
+    INTEL_SPI_PLATFORM_VERBOSE("intel spi boardinfo writeable is %sabled\n",
+            info->writeable ? "en" : "dis");
+
+	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	ispi = intel_spi_probe(&pdev->dev, mem, info);
+	if (IS_ERR(ispi))
+		return PTR_ERR(ispi);
+
+	platform_set_drvdata(pdev, ispi);
+	return 0;
+}
+
+static int intel_spi_platform_remove(struct platform_device *pdev)
+{
+	struct intel_spi *ispi = platform_get_drvdata(pdev);
+
+	return intel_spi_remove(ispi);
+}
+
+static struct of_device_id intel_spi_match[] = {
+    {
+        .compatible = "spi-c224",
+    },
+    {},
+};
+MODULE_DEVICE_TABLE(of, intel_spi_match);
+
+static struct platform_driver intel_spi_platform_driver = {
+	.probe = intel_spi_platform_probe,
+	.remove = intel_spi_platform_remove,
+	.driver = {
+		.name = "intel-spi",
+		.of_match_table = intel_spi_match,
+	},
+};
+
+module_platform_driver(intel_spi_platform_driver);
+
+MODULE_DESCRIPTION("Intel PCH/PCU SPI flash platform driver");
+MODULE_AUTHOR("support");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:intel-spi");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/Makefile
new file mode 100644
index 000000000000..4226f2734275
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/Makefile
@@ -0,0 +1,34 @@
+PWD		= $(shell pwd)
+
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+#ifdef ENABLE_GCOV
+#ifeq ($(ENABLE_GCOV), y)
+#EXTRA_CFLAGS+= -fprofile-arcs -ftest-coverage -lgcov
+#endif
+#endif # ENABLE_GCOV
+
+obj-m := wb_lm75.o
+obj-m += wb_tmp401.o
+obj-m += wb_i2c_mux_pca9641.o
+obj-m += wb_i2c_mux_pca954x.o
+obj-m += wb_i2c_i801.o
+obj-m += wb_i2c_algo_bit.o
+obj-m += wb_i2c_gpio.o
+obj-m += wb_i2c_gpio_device.o
+obj-m += wb_at24.o
+obj-m += wb_pmbus_core.o
+obj-m += wb_csu550.o
+obj-m += wb_ina3221.o
+obj-m += wb_isl68137.o
+obj-m += wb_tps53622.o
+obj-m += wb_ucd9000.o
+
+all:
+	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
+	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
+	cp -p  $(PWD)/*.ko $(module_out_put_dir)
+clean:
+	rm -f $(PWD)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd $(PWD)/*.mod
+	rm -f $(PWD)/Module.markers $(PWD)/Module.symvers $(PWD)/modules.order
+	rm -rf $(PWD)/.tmp_versions
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_at24.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_at24.c
new file mode 100644
index 000000000000..1075e6ef18de
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_at24.c
@@ -0,0 +1,861 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * at24.c - handle most I2C EEPROMs
+ *
+ * Copyright (C) 2005-2007 David Brownell
+ * Copyright (C) 2008 Wolfram Sang, Pengutronix
+ */
+
+#include <linux/acpi.h>
+#include <linux/bitops.h>
+#include <linux/capability.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/jiffies.h>
+#include <linux/kernel.h>
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/nvmem-provider.h>
+#include <linux/of_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/property.h>
+#include <linux/regmap.h>
+#include <linux/regulator/consumer.h>
+#include <linux/slab.h>
+
+/* Address pointer is 16 bit. */
+#define AT24_FLAG_ADDR16	BIT(7)
+/* sysfs-entry will be read-only. */
+#define AT24_FLAG_READONLY	BIT(6)
+/* sysfs-entry will be world-readable. */
+#define AT24_FLAG_IRUGO		BIT(5)
+/* Take always 8 addresses (24c00). */
+#define AT24_FLAG_TAKE8ADDR	BIT(4)
+/* Factory-programmed serial number. */
+#define AT24_FLAG_SERIAL	BIT(3)
+/* Factory-programmed mac address. */
+#define AT24_FLAG_MAC		BIT(2)
+/* Does not auto-rollover reads to the next slave address. */
+#define AT24_FLAG_NO_RDROL	BIT(1)
+
+/*
+ * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
+ * Differences between different vendor product lines (like Atmel AT24C or
+ * MicroChip 24LC, etc) won't much matter for typical read/write access.
+ * There are also I2C RAM chips, likewise interchangeable. One example
+ * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
+ *
+ * However, misconfiguration can lose data. "Set 16-bit memory address"
+ * to a part with 8-bit addressing will overwrite data. Writing with too
+ * big a page size also loses data. And it's not safe to assume that the
+ * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
+ * uses 0x51, for just one example.
+ *
+ * Accordingly, explicit board-specific configuration data should be used
+ * in almost all cases. (One partial exception is an SMBus used to access
+ * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
+ *
+ * So this driver uses "new style" I2C driver binding, expecting to be
+ * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
+ * similar kernel-resident tables; or, configuration data coming from
+ * a bootloader.
+ *
+ * Other than binding model, current differences from "eeprom" driver are
+ * that this one handles write access and isn't restricted to 24c02 devices.
+ * It also handles larger devices (32 kbit and up) with two-byte addresses,
+ * which won't work on pure SMBus systems.
+ */
+
+struct at24_client {
+	struct i2c_client *client;
+	struct regmap *regmap;
+};
+
+struct at24_data {
+	/*
+	 * Lock protects against activities from other Linux tasks,
+	 * but not from changes by other I2C masters.
+	 */
+	struct mutex lock;
+
+	unsigned int write_max;
+	unsigned int num_addresses;
+	unsigned int offset_adj;
+
+	u32 byte_len;
+	u16 page_size;
+	u8 flags;
+
+	struct nvmem_device *nvmem;
+	struct regulator *vcc_reg;
+	void (*read_post)(unsigned int off, char *buf, size_t count);
+
+	/*
+	 * Some chips tie up multiple I2C addresses; dummy devices reserve
+	 * them for us, and we'll use them with SMBus calls.
+	 */
+	struct at24_client client[];
+};
+
+/*
+ * This parameter is to help this driver avoid blocking other drivers out
+ * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
+ * clock, one 256 byte read takes about 1/43 second which is excessive;
+ * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
+ * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
+ *
+ * This value is forced to be a power of two so that writes align on pages.
+ */
+static unsigned int at24_io_limit = 128;
+module_param_named(io_limit, at24_io_limit, uint, 0);
+MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)");
+
+/*
+ * Specs often allow 5 msec for a page write, sometimes 20 msec;
+ * it's important to recover from write timeouts.
+ */
+static unsigned int at24_write_timeout = 25;
+module_param_named(write_timeout, at24_write_timeout, uint, 0);
+MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)");
+
+struct at24_chip_data {
+	u32 byte_len;
+	u8 flags;
+	void (*read_post)(unsigned int off, char *buf, size_t count);
+};
+
+#define AT24_CHIP_DATA(_name, _len, _flags)				\
+	static const struct at24_chip_data _name = {			\
+		.byte_len = _len, .flags = _flags,			\
+	}
+
+#define AT24_CHIP_DATA_CB(_name, _len, _flags, _read_post)		\
+	static const struct at24_chip_data _name = {			\
+		.byte_len = _len, .flags = _flags,			\
+		.read_post = _read_post,				\
+	}
+
+static void at24_read_post_vaio(unsigned int off, char *buf, size_t count)
+{
+	int i;
+
+	if (capable(CAP_SYS_ADMIN))
+		return;
+
+	/*
+	 * Hide VAIO private settings to regular users:
+	 * - BIOS passwords: bytes 0x00 to 0x0f
+	 * - UUID: bytes 0x10 to 0x1f
+	 * - Serial number: 0xc0 to 0xdf
+	 */
+	for (i = 0; i < count; i++) {
+		if ((off + i <= 0x1f) ||
+		    (off + i >= 0xc0 && off + i <= 0xdf))
+			buf[i] = 0;
+	}
+}
+
+/* needs 8 addresses as A0-A2 are ignored */
+AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR);
+/* old variants can't be handled with this generic entry! */
+AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0);
+AT24_CHIP_DATA(at24_data_24cs01, 16,
+	AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
+AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, AT24_FLAG_IRUGO);
+AT24_CHIP_DATA(at24_data_24cs02, 16,
+	AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
+AT24_CHIP_DATA(at24_data_24mac402, 48 / 8,
+	AT24_FLAG_MAC | AT24_FLAG_READONLY);
+AT24_CHIP_DATA(at24_data_24mac602, 64 / 8,
+	AT24_FLAG_MAC | AT24_FLAG_READONLY);
+/* spd is a 24c02 in memory DIMMs */
+AT24_CHIP_DATA(at24_data_spd, 2048 / 8,
+	AT24_FLAG_READONLY | AT24_FLAG_IRUGO);
+/* 24c02_vaio is a 24c02 on some Sony laptops */
+AT24_CHIP_DATA_CB(at24_data_24c02_vaio, 2048 / 8,
+	AT24_FLAG_READONLY | AT24_FLAG_IRUGO,
+	at24_read_post_vaio);
+AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0);
+AT24_CHIP_DATA(at24_data_24cs04, 16,
+	AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
+/* 24rf08 quirk is handled at i2c-core */
+AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0);
+AT24_CHIP_DATA(at24_data_24cs08, 16,
+	AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
+AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0);
+AT24_CHIP_DATA(at24_data_24cs16, 16,
+	AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
+AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16);
+AT24_CHIP_DATA(at24_data_24cs32, 16,
+	AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
+AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16 | AT24_FLAG_IRUGO);
+AT24_CHIP_DATA(at24_data_24cs64, 16,
+	AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
+AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16);
+AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16);
+AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16);
+AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16);
+AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16);
+/* identical to 24c08 ? */
+AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0);
+
+static const struct i2c_device_id at24_ids[] = {
+	{ "wb_24c00",	(kernel_ulong_t)&at24_data_24c00 },
+	{ "wb_24c01",	(kernel_ulong_t)&at24_data_24c01 },
+	{ "wb_24cs01",	(kernel_ulong_t)&at24_data_24cs01 },
+	{ "wb_24c02",	(kernel_ulong_t)&at24_data_24c02 },
+	{ "wb_24cs02",	(kernel_ulong_t)&at24_data_24cs02 },
+	{ "wb_24mac402",	(kernel_ulong_t)&at24_data_24mac402 },
+	{ "wb_24mac602",	(kernel_ulong_t)&at24_data_24mac602 },
+	{ "wb_spd",	(kernel_ulong_t)&at24_data_spd },
+	{ "wb_24c02-vaio",	(kernel_ulong_t)&at24_data_24c02_vaio },
+	{ "wb_24c04",	(kernel_ulong_t)&at24_data_24c04 },
+	{ "wb_24cs04",	(kernel_ulong_t)&at24_data_24cs04 },
+	{ "wb_24c08",	(kernel_ulong_t)&at24_data_24c08 },
+	{ "wb_24cs08",	(kernel_ulong_t)&at24_data_24cs08 },
+	{ "wb_24c16",	(kernel_ulong_t)&at24_data_24c16 },
+	{ "wb_24cs16",	(kernel_ulong_t)&at24_data_24cs16 },
+	{ "wb_24c32",	(kernel_ulong_t)&at24_data_24c32 },
+	{ "wb_24cs32",	(kernel_ulong_t)&at24_data_24cs32 },
+	{ "wb_24c64",	(kernel_ulong_t)&at24_data_24c64 },
+	{ "wb_24cs64",	(kernel_ulong_t)&at24_data_24cs64 },
+	{ "wb_24c128",	(kernel_ulong_t)&at24_data_24c128 },
+	{ "wb_24c256",	(kernel_ulong_t)&at24_data_24c256 },
+	{ "wb_24c512",	(kernel_ulong_t)&at24_data_24c512 },
+	{ "wb_24c1024",	(kernel_ulong_t)&at24_data_24c1024 },
+	{ "wb_24c2048",    (kernel_ulong_t)&at24_data_24c2048 },
+	{ "wb_at24",	0 },
+	{ /* END OF LIST */ }
+};
+MODULE_DEVICE_TABLE(i2c, at24_ids);
+
+static const struct of_device_id at24_of_match[] = {
+	{ .compatible = "atmel,24c00",		.data = &at24_data_24c00 },
+	{ .compatible = "atmel,24c01",		.data = &at24_data_24c01 },
+	{ .compatible = "atmel,24cs01",		.data = &at24_data_24cs01 },
+	{ .compatible = "atmel,24c02",		.data = &at24_data_24c02 },
+	{ .compatible = "atmel,24cs02",		.data = &at24_data_24cs02 },
+	{ .compatible = "atmel,24mac402",	.data = &at24_data_24mac402 },
+	{ .compatible = "atmel,24mac602",	.data = &at24_data_24mac602 },
+	{ .compatible = "atmel,spd",		.data = &at24_data_spd },
+	{ .compatible = "atmel,24c04",		.data = &at24_data_24c04 },
+	{ .compatible = "atmel,24cs04",		.data = &at24_data_24cs04 },
+	{ .compatible = "atmel,24c08",		.data = &at24_data_24c08 },
+	{ .compatible = "atmel,24cs08",		.data = &at24_data_24cs08 },
+	{ .compatible = "atmel,24c16",		.data = &at24_data_24c16 },
+	{ .compatible = "atmel,24cs16",		.data = &at24_data_24cs16 },
+	{ .compatible = "atmel,24c32",		.data = &at24_data_24c32 },
+	{ .compatible = "atmel,24cs32",		.data = &at24_data_24cs32 },
+	{ .compatible = "atmel,24c64",		.data = &at24_data_24c64 },
+	{ .compatible = "atmel,24cs64",		.data = &at24_data_24cs64 },
+	{ .compatible = "atmel,24c128",		.data = &at24_data_24c128 },
+	{ .compatible = "atmel,24c256",		.data = &at24_data_24c256 },
+	{ .compatible = "atmel,24c512",		.data = &at24_data_24c512 },
+	{ .compatible = "atmel,24c1024",	.data = &at24_data_24c1024 },
+	{ .compatible = "atmel,24c2048",	.data = &at24_data_24c2048 },
+	{ /* END OF LIST */ },
+};
+MODULE_DEVICE_TABLE(of, at24_of_match);
+
+static const struct acpi_device_id __maybe_unused at24_acpi_ids[] = {
+	{ "INT3499",	(kernel_ulong_t)&at24_data_INT3499 },
+	{ "TPF0001",	(kernel_ulong_t)&at24_data_24c1024 },
+	{ /* END OF LIST */ }
+};
+MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
+
+/*
+ * This routine supports chips which consume multiple I2C addresses. It
+ * computes the addressing information to be used for a given r/w request.
+ * Assumes that sanity checks for offset happened at sysfs-layer.
+ *
+ * Slave address and byte offset derive from the offset. Always
+ * set the byte address; on a multi-master board, another master
+ * may have changed the chip's "current" address pointer.
+ */
+static struct at24_client *at24_translate_offset(struct at24_data *at24,
+						 unsigned int *offset)
+{
+	unsigned int i;
+
+	if (at24->flags & AT24_FLAG_ADDR16) {
+		i = *offset >> 16;
+		*offset &= 0xffff;
+	} else {
+		i = *offset >> 8;
+		*offset &= 0xff;
+	}
+
+	return &at24->client[i];
+}
+
+static struct device *at24_base_client_dev(struct at24_data *at24)
+{
+	return &at24->client[0].client->dev;
+}
+
+static size_t at24_adjust_read_count(struct at24_data *at24,
+				      unsigned int offset, size_t count)
+{
+	unsigned int bits;
+	size_t remainder;
+
+	/*
+	 * In case of multi-address chips that don't rollover reads to
+	 * the next slave address: truncate the count to the slave boundary,
+	 * so that the read never straddles slaves.
+	 */
+	if (at24->flags & AT24_FLAG_NO_RDROL) {
+		bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8;
+		remainder = BIT(bits) - offset;
+		if (count > remainder)
+			count = remainder;
+	}
+
+	if (count > at24_io_limit)
+		count = at24_io_limit;
+
+	return count;
+}
+
+static ssize_t at24_regmap_read(struct at24_data *at24, char *buf,
+				unsigned int offset, size_t count)
+{
+	unsigned long timeout, read_time;
+	struct at24_client *at24_client;
+	struct i2c_client *client;
+	struct regmap *regmap;
+	int ret;
+
+	at24_client = at24_translate_offset(at24, &offset);
+	regmap = at24_client->regmap;
+	client = at24_client->client;
+	count = at24_adjust_read_count(at24, offset, count);
+
+	/* adjust offset for mac and serial read ops */
+	offset += at24->offset_adj;
+
+	timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
+	do {
+		/*
+		 * The timestamp shall be taken before the actual operation
+		 * to avoid a premature timeout in case of high CPU load.
+		 */
+		read_time = jiffies;
+
+		ret = regmap_bulk_read(regmap, offset, buf, count);
+		dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
+			count, offset, ret, jiffies);
+		if (!ret)
+			return count;
+
+		usleep_range(1000, 1500);
+	} while (time_before(read_time, timeout));
+
+	return -ETIMEDOUT;
+}
+
+/*
+ * Note that if the hardware write-protect pin is pulled high, the whole
+ * chip is normally write protected. But there are plenty of product
+ * variants here, including OTP fuses and partial chip protect.
+ *
+ * We only use page mode writes; the alternative is sloooow. These routines
+ * write at most one page.
+ */
+
+static size_t at24_adjust_write_count(struct at24_data *at24,
+				      unsigned int offset, size_t count)
+{
+	unsigned int next_page;
+
+	/* write_max is at most a page */
+	if (count > at24->write_max)
+		count = at24->write_max;
+
+	/* Never roll over backwards, to the start of this page */
+	next_page = roundup(offset + 1, at24->page_size);
+	if (offset + count > next_page)
+		count = next_page - offset;
+
+	return count;
+}
+
+static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf,
+				 unsigned int offset, size_t count)
+{
+	unsigned long timeout, write_time;
+	struct at24_client *at24_client;
+	struct i2c_client *client;
+	struct regmap *regmap;
+	int ret;
+
+	at24_client = at24_translate_offset(at24, &offset);
+	regmap = at24_client->regmap;
+	client = at24_client->client;
+	count = at24_adjust_write_count(at24, offset, count);
+	timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
+
+	do {
+		/*
+		 * The timestamp shall be taken before the actual operation
+		 * to avoid a premature timeout in case of high CPU load.
+		 */
+		write_time = jiffies;
+
+		ret = regmap_bulk_write(regmap, offset, buf, count);
+		dev_dbg(&client->dev, "write %zu@%d --> %d (%ld)\n",
+			count, offset, ret, jiffies);
+		if (!ret)
+			return count;
+
+		usleep_range(1000, 1500);
+	} while (time_before(write_time, timeout));
+
+	return -ETIMEDOUT;
+}
+
+static int at24_read(void *priv, unsigned int off, void *val, size_t count)
+{
+	struct at24_data *at24;
+	struct device *dev;
+	char *buf = val;
+	int i, ret;
+
+	at24 = priv;
+	dev = at24_base_client_dev(at24);
+
+	if (unlikely(!count))
+		return count;
+
+	if (off + count > at24->byte_len)
+		return -EINVAL;
+
+	ret = pm_runtime_get_sync(dev);
+	if (ret < 0) {
+		pm_runtime_put_noidle(dev);
+		return ret;
+	}
+
+	/*
+	 * Read data from chip, protecting against concurrent updates
+	 * from this host, but not from other I2C masters.
+	 */
+	mutex_lock(&at24->lock);
+
+	for (i = 0; count; i += ret, count -= ret) {
+		ret = at24_regmap_read(at24, buf + i, off + i, count);
+		if (ret < 0) {
+			mutex_unlock(&at24->lock);
+			pm_runtime_put(dev);
+			return ret;
+		}
+	}
+
+	mutex_unlock(&at24->lock);
+
+	pm_runtime_put(dev);
+
+	if (unlikely(at24->read_post))
+		at24->read_post(off, buf, i);
+
+	return 0;
+}
+
+static int at24_write(void *priv, unsigned int off, void *val, size_t count)
+{
+	struct at24_data *at24;
+	struct device *dev;
+	char *buf = val;
+	int ret;
+
+	at24 = priv;
+	dev = at24_base_client_dev(at24);
+
+	if (unlikely(!count))
+		return -EINVAL;
+
+	if (off + count > at24->byte_len)
+		return -EINVAL;
+
+	ret = pm_runtime_get_sync(dev);
+	if (ret < 0) {
+		pm_runtime_put_noidle(dev);
+		return ret;
+	}
+
+	/*
+	 * Write data to chip, protecting against concurrent updates
+	 * from this host, but not from other I2C masters.
+	 */
+	mutex_lock(&at24->lock);
+
+	while (count) {
+		ret = at24_regmap_write(at24, buf, off, count);
+		if (ret < 0) {
+			mutex_unlock(&at24->lock);
+			pm_runtime_put(dev);
+			return ret;
+		}
+		buf += ret;
+		off += ret;
+		count -= ret;
+	}
+
+	mutex_unlock(&at24->lock);
+
+	pm_runtime_put(dev);
+
+	return 0;
+}
+
+static const struct at24_chip_data *at24_get_chip_data(struct device *dev)
+{
+	struct device_node *of_node = dev->of_node;
+	const struct at24_chip_data *cdata;
+	const struct i2c_device_id *id;
+
+	id = i2c_match_id(at24_ids, to_i2c_client(dev));
+
+	/*
+	 * The I2C core allows OF nodes compatibles to match against the
+	 * I2C device ID table as a fallback, so check not only if an OF
+	 * node is present but also if it matches an OF device ID entry.
+	 */
+	if (of_node && of_match_device(at24_of_match, dev))
+		cdata = of_device_get_match_data(dev);
+	else if (id)
+		cdata = (void *)id->driver_data;
+	else
+		cdata = acpi_device_get_match_data(dev);
+
+	if (!cdata)
+		return ERR_PTR(-ENODEV);
+
+	return cdata;
+}
+
+static int at24_make_dummy_client(struct at24_data *at24, unsigned int index,
+				  struct regmap_config *regmap_config)
+{
+	struct i2c_client *base_client, *dummy_client;
+	struct regmap *regmap;
+	struct device *dev;
+
+	base_client = at24->client[0].client;
+	dev = &base_client->dev;
+
+	dummy_client = devm_i2c_new_dummy_device(dev, base_client->adapter,
+						 base_client->addr + index);
+	if (IS_ERR(dummy_client))
+		return PTR_ERR(dummy_client);
+
+	regmap = devm_regmap_init_i2c(dummy_client, regmap_config);
+	if (IS_ERR(regmap))
+		return PTR_ERR(regmap);
+
+	at24->client[index].client = dummy_client;
+	at24->client[index].regmap = regmap;
+
+	return 0;
+}
+
+static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len)
+{
+	if (flags & AT24_FLAG_MAC) {
+		/* EUI-48 starts from 0x9a, EUI-64 from 0x98 */
+		return 0xa0 - byte_len;
+	} else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) {
+		/*
+		 * For 16 bit address pointers, the word address must contain
+		 * a '10' sequence in bits 11 and 10 regardless of the
+		 * intended position of the address pointer.
+		 */
+		return 0x0800;
+	} else if (flags & AT24_FLAG_SERIAL) {
+		/*
+		 * Otherwise the word address must begin with a '10' sequence,
+		 * regardless of the intended address.
+		 */
+		return 0x0080;
+	} else {
+		return 0;
+	}
+}
+
+static int at24_probe(struct i2c_client *client)
+{
+	struct regmap_config regmap_config = { };
+	struct nvmem_config nvmem_config = { };
+	u32 byte_len, page_size, flags, addrw;
+	const struct at24_chip_data *cdata;
+	struct device *dev = &client->dev;
+	bool i2c_fn_i2c, i2c_fn_block;
+	unsigned int i, num_addresses;
+	struct at24_data *at24;
+	struct regmap *regmap;
+	bool writable;
+	u8 test_byte;
+	int err;
+
+	i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C);
+	i2c_fn_block = i2c_check_functionality(client->adapter,
+					       I2C_FUNC_SMBUS_WRITE_I2C_BLOCK);
+
+	cdata = at24_get_chip_data(dev);
+	if (IS_ERR(cdata))
+		return PTR_ERR(cdata);
+
+	err = device_property_read_u32(dev, "pagesize", &page_size);
+	if (err)
+		/*
+		 * This is slow, but we can't know all eeproms, so we better
+		 * play safe. Specifying custom eeprom-types via device tree
+		 * or properties is recommended anyhow.
+		 */
+		page_size = 1;
+
+	flags = cdata->flags;
+	if (device_property_present(dev, "read-only"))
+		flags |= AT24_FLAG_READONLY;
+	if (device_property_present(dev, "no-read-rollover"))
+		flags |= AT24_FLAG_NO_RDROL;
+
+	err = device_property_read_u32(dev, "address-width", &addrw);
+	if (!err) {
+		switch (addrw) {
+		case 8:
+			if (flags & AT24_FLAG_ADDR16)
+				dev_warn(dev,
+					 "Override address width to be 8, while default is 16\n");
+			flags &= ~AT24_FLAG_ADDR16;
+			break;
+		case 16:
+			flags |= AT24_FLAG_ADDR16;
+			break;
+		default:
+			dev_warn(dev, "Bad \"address-width\" property: %u\n",
+				 addrw);
+		}
+	}
+
+	err = device_property_read_u32(dev, "size", &byte_len);
+	if (err)
+		byte_len = cdata->byte_len;
+
+	if (!i2c_fn_i2c && !i2c_fn_block)
+		page_size = 1;
+
+	if (!page_size) {
+		dev_err(dev, "page_size must not be 0!\n");
+		return -EINVAL;
+	}
+
+	if (!is_power_of_2(page_size))
+		dev_warn(dev, "page_size looks suspicious (no power of 2)!\n");
+
+	err = device_property_read_u32(dev, "num-addresses", &num_addresses);
+	if (err) {
+		if (flags & AT24_FLAG_TAKE8ADDR)
+			num_addresses = 8;
+		else
+			num_addresses =	DIV_ROUND_UP(byte_len,
+				(flags & AT24_FLAG_ADDR16) ? 65536 : 256);
+	}
+
+	if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) {
+		dev_err(dev,
+			"invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
+		return -EINVAL;
+	}
+
+	regmap_config.val_bits = 8;
+	regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8;
+	regmap_config.disable_locking = true;
+
+	regmap = devm_regmap_init_i2c(client, &regmap_config);
+	if (IS_ERR(regmap))
+		return PTR_ERR(regmap);
+
+	at24 = devm_kzalloc(dev, struct_size(at24, client, num_addresses),
+			    GFP_KERNEL);
+	if (!at24)
+		return -ENOMEM;
+
+	mutex_init(&at24->lock);
+	at24->byte_len = byte_len;
+	at24->page_size = page_size;
+	at24->flags = flags;
+	at24->read_post = cdata->read_post;
+	at24->num_addresses = num_addresses;
+	at24->offset_adj = at24_get_offset_adj(flags, byte_len);
+	at24->client[0].client = client;
+	at24->client[0].regmap = regmap;
+
+	at24->vcc_reg = devm_regulator_get(dev, "vcc");
+	if (IS_ERR(at24->vcc_reg))
+		return PTR_ERR(at24->vcc_reg);
+
+	writable = !(flags & AT24_FLAG_READONLY);
+	if (writable) {
+		at24->write_max = min_t(unsigned int,
+					page_size, at24_io_limit);
+		if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX)
+			at24->write_max = I2C_SMBUS_BLOCK_MAX;
+	}
+
+	/* use dummy devices for multiple-address chips */
+	for (i = 1; i < num_addresses; i++) {
+		err = at24_make_dummy_client(at24, i, &regmap_config);
+		if (err)
+			return err;
+	}
+
+	/*
+	 * If the 'label' property is not present for the AT24 EEPROM,
+	 * then nvmem_config.id is initialised to NVMEM_DEVID_AUTO,
+	 * and this will append the 'devid' to the name of the NVMEM
+	 * device. This is purely legacy and the AT24 driver has always
+	 * defaulted to this. However, if the 'label' property is
+	 * present then this means that the name is specified by the
+	 * firmware and this name should be used verbatim and so it is
+	 * not necessary to append the 'devid'.
+	 */
+	if (device_property_present(dev, "label")) {
+		nvmem_config.id = NVMEM_DEVID_NONE;
+		err = device_property_read_string(dev, "label",
+						  &nvmem_config.name);
+		if (err)
+			return err;
+	} else {
+		nvmem_config.id = NVMEM_DEVID_AUTO;
+		nvmem_config.name = dev_name(dev);
+	}
+
+	nvmem_config.type = NVMEM_TYPE_EEPROM;
+	nvmem_config.dev = dev;
+	nvmem_config.read_only = !writable;
+	nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO);
+	nvmem_config.owner = THIS_MODULE;
+	nvmem_config.compat = true;
+	nvmem_config.base_dev = dev;
+	nvmem_config.reg_read = at24_read;
+	nvmem_config.reg_write = at24_write;
+	nvmem_config.priv = at24;
+	nvmem_config.stride = 1;
+	nvmem_config.word_size = 1;
+	nvmem_config.size = byte_len;
+
+	i2c_set_clientdata(client, at24);
+
+	err = regulator_enable(at24->vcc_reg);
+	if (err) {
+		dev_err(dev, "Failed to enable vcc regulator\n");
+		return err;
+	}
+
+	/* enable runtime pm */
+	pm_runtime_set_active(dev);
+	pm_runtime_enable(dev);
+
+	at24->nvmem = devm_nvmem_register(dev, &nvmem_config);
+	if (IS_ERR(at24->nvmem)) {
+		pm_runtime_disable(dev);
+		if (!pm_runtime_status_suspended(dev))
+			regulator_disable(at24->vcc_reg);
+		return PTR_ERR(at24->nvmem);
+	}
+
+	/*
+	 * Perform a one-byte test read to verify that the
+	 * chip is functional.
+	 */
+	err = at24_read(at24, 0, &test_byte, 1);
+	if (err) {
+		pm_runtime_disable(dev);
+		if (!pm_runtime_status_suspended(dev))
+			regulator_disable(at24->vcc_reg);
+		return -ENODEV;
+	}
+
+	pm_runtime_idle(dev);
+
+	if (writable)
+		dev_info(dev, "%u byte %s EEPROM, writable, %u bytes/write\n",
+			 byte_len, client->name, at24->write_max);
+	else
+		dev_info(dev, "%u byte %s EEPROM, read-only\n",
+			 byte_len, client->name);
+
+	return 0;
+}
+
+static int at24_remove(struct i2c_client *client)
+{
+	struct at24_data *at24 = i2c_get_clientdata(client);
+
+	pm_runtime_disable(&client->dev);
+	if (!pm_runtime_status_suspended(&client->dev))
+		regulator_disable(at24->vcc_reg);
+	pm_runtime_set_suspended(&client->dev);
+
+	return 0;
+}
+
+static int __maybe_unused at24_suspend(struct device *dev)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct at24_data *at24 = i2c_get_clientdata(client);
+
+	return regulator_disable(at24->vcc_reg);
+}
+
+static int __maybe_unused at24_resume(struct device *dev)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct at24_data *at24 = i2c_get_clientdata(client);
+
+	return regulator_enable(at24->vcc_reg);
+}
+
+static const struct dev_pm_ops at24_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
+				pm_runtime_force_resume)
+	SET_RUNTIME_PM_OPS(at24_suspend, at24_resume, NULL)
+};
+
+static struct i2c_driver at24_driver = {
+	.driver = {
+		.name = "wb_at24",
+		.pm = &at24_pm_ops,
+		.of_match_table = at24_of_match,
+		.acpi_match_table = ACPI_PTR(at24_acpi_ids),
+	},
+	.probe_new = at24_probe,
+	.remove = at24_remove,
+	.id_table = at24_ids,
+};
+
+static int __init at24_init(void)
+{
+	if (!at24_io_limit) {
+		pr_err("at24: at24_io_limit must not be 0!\n");
+		return -EINVAL;
+	}
+
+	at24_io_limit = rounddown_pow_of_two(at24_io_limit);
+	return i2c_add_driver(&at24_driver);
+}
+module_init(at24_init);
+
+static void __exit at24_exit(void)
+{
+	i2c_del_driver(&at24_driver);
+}
+module_exit(at24_exit);
+
+MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
+MODULE_AUTHOR("support");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_csu550.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_csu550.c
new file mode 100644
index 000000000000..36d07f071a71
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_csu550.c
@@ -0,0 +1,236 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Hardware monitoring driver for PMBus devices
+ *
+ * Copyright (c) 2010, 2011 Ericsson AB.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/mutex.h>
+#include <linux/i2c.h>
+#include <linux/pmbus.h>
+#include "wb_pmbus.h"
+
+struct pmbus_device_info {
+    int pages;
+    u32 flags;
+};
+
+static const struct i2c_device_id pmbus_id[];
+
+/*
+ * Find sensor groups and status registers on each page.
+ */
+static void pmbus_find_sensor_groups(struct i2c_client *client,
+                     struct pmbus_driver_info *info)
+{
+    int page;
+
+    /* Sensors detected on page 0 only */
+    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_VIN))
+        info->func[0] |= PMBUS_HAVE_VIN;
+    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_IIN))
+        info->func[0] |= PMBUS_HAVE_IIN;
+    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_PIN))
+        info->func[0] |= PMBUS_HAVE_PIN;
+    if (info->func[0]
+        && wb_pmbus_check_byte_register(client, 0, PMBUS_STATUS_INPUT))
+        info->func[0] |= PMBUS_HAVE_STATUS_INPUT;
+    if (wb_pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_12) &&
+        wb_pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_1)) {
+        info->func[0] |= PMBUS_HAVE_FAN12;
+        if (wb_pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_12))
+            info->func[0] |= PMBUS_HAVE_STATUS_FAN12;
+    }
+    if (wb_pmbus_check_byte_register(client, 0, PMBUS_FAN_CONFIG_34) &&
+        wb_pmbus_check_word_register(client, 0, PMBUS_READ_FAN_SPEED_3)) {
+        info->func[0] |= PMBUS_HAVE_FAN34;
+        if (wb_pmbus_check_byte_register(client, 0, PMBUS_STATUS_FAN_34))
+            info->func[0] |= PMBUS_HAVE_STATUS_FAN34;
+    }
+    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_1))
+        info->func[0] |= PMBUS_HAVE_TEMP;
+    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_2))
+        info->func[0] |= PMBUS_HAVE_TEMP2;
+    if (wb_pmbus_check_word_register(client, 0, PMBUS_READ_TEMPERATURE_3))
+        info->func[0] |= PMBUS_HAVE_TEMP3;
+    if (info->func[0] & (PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2
+                 | PMBUS_HAVE_TEMP3)
+        && wb_pmbus_check_byte_register(client, 0,
+                     PMBUS_STATUS_TEMPERATURE))
+            info->func[0] |= PMBUS_HAVE_STATUS_TEMP;
+
+    /* Sensors detected on all pages */
+    for (page = 0; page < info->pages; page++) {
+        if (wb_pmbus_check_word_register(client, page, PMBUS_READ_VOUT)) {
+            info->func[page] |= PMBUS_HAVE_VOUT;
+            if (wb_pmbus_check_byte_register(client, page,
+                              PMBUS_STATUS_VOUT))
+                info->func[page] |= PMBUS_HAVE_STATUS_VOUT;
+        }
+        if (wb_pmbus_check_word_register(client, page, PMBUS_READ_IOUT)) {
+            info->func[page] |= PMBUS_HAVE_IOUT;
+            if (wb_pmbus_check_byte_register(client, 0,
+                              PMBUS_STATUS_IOUT))
+                info->func[page] |= PMBUS_HAVE_STATUS_IOUT;
+        }
+        if (wb_pmbus_check_word_register(client, page, PMBUS_READ_POUT))
+            info->func[page] |= PMBUS_HAVE_POUT;
+    }
+}
+
+/*
+ * Identify chip parameters.
+ */
+static int pmbus_identify(struct i2c_client *client,
+              struct pmbus_driver_info *info)
+{
+    int ret = 0;
+
+    if (!info->pages) {
+        /*
+         * Check if the PAGE command is supported. If it is,
+         * keep setting the page number until it fails or until the
+         * maximum number of pages has been reached. Assume that
+         * this is the number of pages supported by the chip.
+         */
+        if (wb_pmbus_check_byte_register(client, 0, PMBUS_PAGE)) {
+            int page;
+
+            for (page = 1; page < PMBUS_PAGES; page++) {
+                if (wb_pmbus_set_page(client, page, 0xff) < 0)
+                    break;
+            }
+            wb_pmbus_set_page(client, 0, 0xff);
+            info->pages = page;
+        } else {
+            info->pages = 1;
+        }
+
+        wb_pmbus_clear_faults(client);
+    }
+
+    if (wb_pmbus_check_byte_register(client, 0, PMBUS_VOUT_MODE)) {
+        int vout_mode, i;
+
+        vout_mode = wb_pmbus_read_byte_data(client, 0, PMBUS_VOUT_MODE);
+        if (vout_mode >= 0 && vout_mode != 0xff) {
+            switch (vout_mode >> 5) {
+            case 0:
+                break;
+            case 1:
+                info->format[PSC_VOLTAGE_OUT] = vid;
+                for (i = 0; i < info->pages; i++)
+                    info->vrm_version[i] = vr11;
+                break;
+            case 2:
+                info->format[PSC_VOLTAGE_OUT] = direct;
+                break;
+            default:
+                ret = -ENODEV;
+                goto abort;
+            }
+        }
+    }
+
+    /*
+     * We should check if the COEFFICIENTS register is supported.
+     * If it is, and the chip is configured for direct mode, we can read
+     * the coefficients from the chip, one set per group of sensor
+     * registers.
+     *
+     * To do this, we will need access to a chip which actually supports the
+     * COEFFICIENTS command, since the command is too complex to implement
+     * without testing it. Until then, abort if a chip configured for direct
+     * mode was detected.
+     */
+    if (info->format[PSC_VOLTAGE_OUT] == direct) {
+        ret = -ENODEV;
+        goto abort;
+    }
+
+    /* Try to find sensor groups  */
+    pmbus_find_sensor_groups(client, info);
+abort:
+    return ret;
+}
+
+static int pmbus_probe(struct i2c_client *client)
+{
+    struct pmbus_driver_info *info;
+    struct pmbus_platform_data *pdata = NULL;
+    struct device *dev = &client->dev;
+    struct pmbus_device_info *device_info;
+
+    info = devm_kzalloc(dev, sizeof(struct pmbus_driver_info), GFP_KERNEL);
+    if (!info)
+        return -ENOMEM;
+
+    device_info = (struct pmbus_device_info *)i2c_match_id(pmbus_id, client)->driver_data;
+    if (device_info->flags & PMBUS_SKIP_STATUS_CHECK) {
+        pdata = devm_kzalloc(dev, sizeof(struct pmbus_platform_data),
+                     GFP_KERNEL);
+        if (!pdata)
+            return -ENOMEM;
+
+        pdata->flags = PMBUS_SKIP_STATUS_CHECK;
+    }
+
+    info->pages = device_info->pages;
+    info->identify = pmbus_identify;
+    dev->platform_data = pdata;
+
+    return wb_pmbus_do_probe(client, info);
+}
+
+static const struct pmbus_device_info pmbus_info_one = {
+    .pages = 1,
+    .flags = 0
+};
+
+static const struct pmbus_device_info pmbus_info_zero = {
+    .pages = 0,
+    .flags = 0
+};
+
+static const struct pmbus_device_info pmbus_info_one_skip = {
+    .pages = 1,
+    .flags = PMBUS_SKIP_STATUS_CHECK
+};
+
+static const struct pmbus_device_info pmbus_info_zero_skip = {
+    .pages = 0,
+    .flags = PMBUS_SKIP_STATUS_CHECK
+};
+/*
+ * Use driver_data to set the number of pages supported by the chip.
+ */
+static const struct i2c_device_id pmbus_id[] = {
+    {"wb_csu550", (kernel_ulong_t)&pmbus_info_zero_skip},
+    {"wb_csu800", (kernel_ulong_t)&pmbus_info_one_skip},
+    {"wb_fsp1200", (kernel_ulong_t)&pmbus_info_one_skip},
+    {"wb_dps550", (kernel_ulong_t)&pmbus_info_one_skip},
+    {}
+};
+
+MODULE_DEVICE_TABLE(i2c, pmbus_id);
+
+/* This is the driver that will be inserted */
+static struct i2c_driver pmbus_driver = {
+    .driver = {
+           .name = "wb_pmbus",
+           },
+    .probe_new = pmbus_probe,
+    .remove = wb_pmbus_do_remove,
+    .id_table = pmbus_id,
+};
+
+module_i2c_driver(pmbus_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("Generic PMBus driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_algo_bit.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_algo_bit.c
new file mode 100644
index 000000000000..c98ac7a1c5b6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_algo_bit.c
@@ -0,0 +1,725 @@
+/* -------------------------------------------------------------------------
+ * i2c-algo-bit.c i2c driver algorithms for bit-shift adapters
+ * -------------------------------------------------------------------------
+ *   Copyright (C) 1995-2000 Simon G. Vogl
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+ * ------------------------------------------------------------------------- */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+#include <linux/i2c.h>
+#include <linux/i2c-algo-bit.h>
+
+static int g_i2c_algo_bit_debug = 0;
+static int g_i2c_algo_bit_error = 0;
+
+module_param(g_i2c_algo_bit_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_i2c_algo_bit_error, int, S_IRUGO | S_IWUSR);
+
+#define I2C_ALGO_BIT_DEBUG(fmt, args...) do {                                        \
+    if (g_i2c_algo_bit_debug) { \
+        printk(KERN_INFO "[I2C_ALGO_BIT][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define I2C_ALGO_BIT_ERROR(fmt, args...) do {                                        \
+    if (g_i2c_algo_bit_error) { \
+        printk(KERN_ERR "[I2C_ALGO_BIT][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+/* ----- global defines ----------------------------------------------- */
+
+#ifdef DEBUG
+#define bit_dbg(level, dev, format, args...) \
+	do { \
+		if (i2c_debug >= level) \
+			dev_dbg(dev, format, ##args); \
+	} while (0)
+#else
+#define bit_dbg(level, dev, format, args...) \
+	do {} while (0)
+#endif /* DEBUG */
+
+/* ----- global variables ---------------------------------------------	*/
+
+static int bit_test;	/* see if the line-setting functions work	*/
+module_param(bit_test, int, S_IRUGO);
+MODULE_PARM_DESC(bit_test, "lines testing - 0 off; 1 report; 2 fail if stuck");
+
+#ifdef DEBUG
+static int i2c_debug = 1;
+module_param(i2c_debug, int, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(i2c_debug,
+		 "debug level - 0 off; 1 normal; 2 verbose; 3 very verbose");
+#endif
+
+/* --- setting states on the bus with the right timing: ---------------	*/
+
+#define setsda(adap, val)	adap->setsda(adap->data, val)
+#define setscl(adap, val)	adap->setscl(adap->data, val)
+#define getsda(adap)		adap->getsda(adap->data)
+#define getscl(adap)		adap->getscl(adap->data)
+
+static inline void sdalo(struct i2c_algo_bit_data *adap)
+{
+	setsda(adap, 0);
+	udelay((adap->udelay + 1) / 2);
+}
+
+static inline void sdahi(struct i2c_algo_bit_data *adap)
+{
+	setsda(adap, 1);
+	udelay((adap->udelay + 1) / 2);
+}
+
+static inline void scllo(struct i2c_algo_bit_data *adap)
+{
+	setscl(adap, 0);
+	udelay(adap->udelay / 2);
+}
+
+/*
+ * Raise scl line, and do checking for delays. This is necessary for slower
+ * devices.
+ */
+static int sclhi(struct i2c_algo_bit_data *adap)
+{
+	unsigned long start;
+
+	setscl(adap, 1);
+
+	/* Not all adapters have scl sense line... */
+	if (!adap->getscl)
+		goto done;
+
+	start = jiffies;
+	while (!getscl(adap)) {
+		/* This hw knows how to read the clock line, so we wait
+		 * until it actually gets high.  This is safer as some
+		 * chips may hold it low ("clock stretching") while they
+		 * are processing data internally.
+		 */
+		if (time_after(jiffies, start + adap->timeout)) {
+			/* Test one last time, as we may have been preempted
+			 * between last check and timeout test.
+			 */
+			if (getscl(adap))
+				break;
+			return -ETIMEDOUT;
+		}
+		cpu_relax();
+	}
+#ifdef DEBUG
+	if (jiffies != start && i2c_debug >= 3)
+		pr_debug("i2c-algo-bit: needed %ld jiffies for SCL to go "
+			 "high\n", jiffies - start);
+#endif
+
+done:
+	udelay(adap->udelay);
+	return 0;
+}
+
+/* --- other auxiliary functions --------------------------------------	*/
+static void i2c_start(struct i2c_algo_bit_data *adap)
+{
+	/* assert: scl, sda are high */
+	setsda(adap, 0);
+	udelay(adap->udelay);
+	scllo(adap);
+}
+
+static void i2c_repstart(struct i2c_algo_bit_data *adap)
+{
+	/* assert: scl is low */
+	sdahi(adap);
+	sclhi(adap);
+	setsda(adap, 0);
+	udelay(adap->udelay);
+	scllo(adap);
+}
+
+static void i2c_stop(struct i2c_algo_bit_data *adap)
+{
+	/* assert: scl is low */
+	sdalo(adap);
+	sclhi(adap);
+	setsda(adap, 1);
+	udelay(adap->udelay);
+}
+
+/* send a byte without start cond., look for arbitration,
+   check ackn. from slave */
+/* returns:
+ * 1 if the device acknowledged
+ * 0 if the device did not ack
+ * -ETIMEDOUT if an error occurred (while raising the scl line)
+ */
+static int i2c_outb(struct i2c_adapter *i2c_adap, unsigned char c)
+{
+	int i;
+	int sb;
+	int ack;
+	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
+
+	/* assert: scl is low */
+	for (i = 7; i >= 0; i--) {
+		sb = (c >> i) & 1;
+		setsda(adap, sb);
+		udelay((adap->udelay + 1) / 2);
+		if (sclhi(adap) < 0) { /* timed out */
+			bit_dbg(1, &i2c_adap->dev, "i2c_outb: 0x%02x, "
+				"timeout at bit #%d\n", (int)c, i);
+			return -ETIMEDOUT;
+		}
+		/* FIXME do arbitration here:
+		 * if (sb && !getsda(adap)) -> ouch! Get out of here.
+		 *
+		 * Report a unique code, so higher level code can retry
+		 * the whole (combined) message and *NOT* issue STOP.
+		 */
+		scllo(adap);
+	}
+	sdahi(adap);
+	if (sclhi(adap) < 0) { /* timeout */
+		bit_dbg(1, &i2c_adap->dev, "i2c_outb: 0x%02x, "
+			"timeout at ack\n", (int)c);
+		return -ETIMEDOUT;
+	}
+
+	/* read ack: SDA should be pulled down by slave, or it may
+	 * NAK (usually to report problems with the data we wrote).
+	 */
+	ack = !getsda(adap);    /* ack: sda is pulled low -> success */
+	bit_dbg(2, &i2c_adap->dev, "i2c_outb: 0x%02x %s\n", (int)c,
+		ack ? "A" : "NA");
+
+	scllo(adap);
+	return ack;
+	/* assert: scl is low (sda undef) */
+}
+
+static int i2c_inb(struct i2c_adapter *i2c_adap)
+{
+	/* read byte via i2c port, without start/stop sequence	*/
+	/* acknowledge is sent in i2c_read.			*/
+	int i;
+	unsigned char indata = 0;
+	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
+
+	/* assert: scl is low */
+	sdahi(adap);
+	for (i = 0; i < 8; i++) {
+		if (sclhi(adap) < 0) { /* timeout */
+			bit_dbg(1, &i2c_adap->dev, "i2c_inb: timeout at bit "
+				"#%d\n", 7 - i);
+			return -ETIMEDOUT;
+		}
+		indata *= 2;
+		if (getsda(adap))
+			indata |= 0x01;
+		setscl(adap, 0);
+		udelay(i == 7 ? adap->udelay / 2 : adap->udelay);
+	}
+	/* assert: scl is low */
+	return indata;
+}
+
+/*
+ * Sanity check for the adapter hardware - check the reaction of
+ * the bus lines only if it seems to be idle.
+ */
+static int test_bus(struct i2c_adapter *i2c_adap)
+{
+	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
+	const char *name = i2c_adap->name;
+	int scl, sda, ret;
+
+	if (adap->pre_xfer) {
+		ret = adap->pre_xfer(i2c_adap);
+		if (ret < 0)
+			return -ENODEV;
+	}
+
+	if (adap->getscl == NULL)
+		pr_info("%s: Testing SDA only, SCL is not readable\n", name);
+
+	sda = getsda(adap);
+	scl = (adap->getscl == NULL) ? 1 : getscl(adap);
+	if (!scl || !sda) {
+		printk(KERN_WARNING
+		       "%s: bus seems to be busy (scl=%d, sda=%d)\n",
+		       name, scl, sda);
+		goto bailout;
+	}
+
+	sdalo(adap);
+	sda = getsda(adap);
+	scl = (adap->getscl == NULL) ? 1 : getscl(adap);
+	if (sda) {
+		printk(KERN_WARNING "%s: SDA stuck high!\n", name);
+		goto bailout;
+	}
+	if (!scl) {
+		printk(KERN_WARNING "%s: SCL unexpected low "
+		       "while pulling SDA low!\n", name);
+		goto bailout;
+	}
+
+	sdahi(adap);
+	sda = getsda(adap);
+	scl = (adap->getscl == NULL) ? 1 : getscl(adap);
+	if (!sda) {
+		printk(KERN_WARNING "%s: SDA stuck low!\n", name);
+		goto bailout;
+	}
+	if (!scl) {
+		printk(KERN_WARNING "%s: SCL unexpected low "
+		       "while pulling SDA high!\n", name);
+		goto bailout;
+	}
+
+	scllo(adap);
+	sda = getsda(adap);
+	scl = (adap->getscl == NULL) ? 0 : getscl(adap);
+	if (scl) {
+		printk(KERN_WARNING "%s: SCL stuck high!\n", name);
+		goto bailout;
+	}
+	if (!sda) {
+		printk(KERN_WARNING "%s: SDA unexpected low "
+		       "while pulling SCL low!\n", name);
+		goto bailout;
+	}
+
+	sclhi(adap);
+	sda = getsda(adap);
+	scl = (adap->getscl == NULL) ? 1 : getscl(adap);
+	if (!scl) {
+		printk(KERN_WARNING "%s: SCL stuck low!\n", name);
+		goto bailout;
+	}
+	if (!sda) {
+		printk(KERN_WARNING "%s: SDA unexpected low "
+		       "while pulling SCL high!\n", name);
+		goto bailout;
+	}
+
+	if (adap->post_xfer)
+		adap->post_xfer(i2c_adap);
+
+	pr_info("%s: Test OK\n", name);
+	return 0;
+bailout:
+	sdahi(adap);
+	sclhi(adap);
+
+	if (adap->post_xfer)
+		adap->post_xfer(i2c_adap);
+
+	return -ENODEV;
+}
+
+/* ----- Utility functions
+ */
+
+/* try_address tries to contact a chip for a number of
+ * times before it gives up.
+ * return values:
+ * 1 chip answered
+ * 0 chip did not answer
+ * -x transmission error
+ */
+static int try_address(struct i2c_adapter *i2c_adap,
+		       unsigned char addr, int retries)
+{
+	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
+	int i, ret = 0;
+
+	for (i = 0; i <= retries; i++) {
+		ret = i2c_outb(i2c_adap, addr);
+		if (ret == 1 || i == retries)
+			break;
+		bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
+		i2c_stop(adap);
+		udelay(adap->udelay);
+		yield();
+		bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
+		i2c_start(adap);
+	}
+	if (i && ret)
+		bit_dbg(1, &i2c_adap->dev, "Used %d tries to %s client at "
+			"0x%02x: %s\n", i + 1,
+			addr & 1 ? "read from" : "write to", addr >> 1,
+			ret == 1 ? "success" : "failed, timeout?");
+	return ret;
+}
+
+static int sendbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
+{
+	const unsigned char *temp = msg->buf;
+	int count = msg->len;
+	unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
+	int retval;
+	int wrcount = 0;
+
+	while (count > 0) {
+		retval = i2c_outb(i2c_adap, *temp);
+
+		/* OK/ACK; or ignored NAK */
+		if ((retval > 0) || (nak_ok && (retval == 0))) {
+			count--;
+			temp++;
+			wrcount++;
+
+		/* A slave NAKing the master means the slave didn't like
+		 * something about the data it saw.  For example, maybe
+		 * the SMBus PEC was wrong.
+		 */
+		} else if (retval == 0) {
+			dev_err(&i2c_adap->dev, "sendbytes: NAK bailout.\n");
+			return -EIO;
+
+		/* Timeout; or (someday) lost arbitration
+		 *
+		 * FIXME Lost ARB implies retrying the transaction from
+		 * the first message, after the "winning" master issues
+		 * its STOP.  As a rule, upper layer code has no reason
+		 * to know or care about this ... it is *NOT* an error.
+		 */
+		} else {
+			dev_err(&i2c_adap->dev, "sendbytes: error %d\n",
+					retval);
+			return retval;
+		}
+	}
+	return wrcount;
+}
+
+static int acknak(struct i2c_adapter *i2c_adap, int is_ack)
+{
+	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
+
+	/* assert: sda is high */
+	if (is_ack)		/* send ack */
+		setsda(adap, 0);
+	udelay((adap->udelay + 1) / 2);
+	if (sclhi(adap) < 0) {	/* timeout */
+		dev_err(&i2c_adap->dev, "readbytes: ack/nak timeout\n");
+		return -ETIMEDOUT;
+	}
+	scllo(adap);
+	return 0;
+}
+
+static int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
+{
+	int inval;
+	int rdcount = 0;	/* counts bytes read */
+	unsigned char *temp = msg->buf;
+	int count = msg->len;
+	const unsigned flags = msg->flags;
+
+	while (count > 0) {
+		inval = i2c_inb(i2c_adap);
+		if (inval >= 0) {
+			*temp = inval;
+			rdcount++;
+		} else {   /* read timed out */
+			break;
+		}
+
+		temp++;
+		count--;
+
+		/* Some SMBus transactions require that we receive the
+		   transaction length as the first read byte. */
+		if (rdcount == 1 && (flags & I2C_M_RECV_LEN)) {
+			if (inval <= 0 || inval > I2C_SMBUS_BLOCK_MAX) {
+				if (!(flags & I2C_M_NO_RD_ACK))
+					acknak(i2c_adap, 0);
+				dev_err(&i2c_adap->dev, "readbytes: invalid "
+					"block length (%d)\n", inval);
+				return -EPROTO;
+			}
+			/* The original count value accounts for the extra
+			   bytes, that is, either 1 for a regular transaction,
+			   or 2 for a PEC transaction. */
+			count += inval;
+			msg->len += inval;
+		}
+
+		bit_dbg(2, &i2c_adap->dev, "readbytes: 0x%02x %s\n",
+			inval,
+			(flags & I2C_M_NO_RD_ACK)
+				? "(no ack/nak)"
+				: (count ? "A" : "NA"));
+
+		if (!(flags & I2C_M_NO_RD_ACK)) {
+			inval = acknak(i2c_adap, count);
+			if (inval < 0)
+				return inval;
+		}
+	}
+	return rdcount;
+}
+
+/* doAddress initiates the transfer by generating the start condition (in
+ * try_address) and transmits the address in the necessary format to handle
+ * reads, writes as well as 10bit-addresses.
+ * returns:
+ *  0 everything went okay, the chip ack'ed, or IGNORE_NAK flag was set
+ * -x an error occurred (like: -ENXIO if the device did not answer, or
+ *	-ETIMEDOUT, for example if the lines are stuck...)
+ */
+static int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
+{
+	unsigned short flags = msg->flags;
+	unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
+	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
+
+	unsigned char addr;
+	int ret, retries;
+
+	retries = nak_ok ? 0 : i2c_adap->retries;
+
+	if (flags & I2C_M_TEN) {
+		/* a ten bit address */
+		addr = 0xf0 | ((msg->addr >> 7) & 0x06);
+		bit_dbg(2, &i2c_adap->dev, "addr0: %d\n", addr);
+		/* try extended address code...*/
+		ret = try_address(i2c_adap, addr, retries);
+		if ((ret != 1) && !nak_ok)  {
+			dev_err(&i2c_adap->dev,
+				"died at extended address code\n");
+			return -ENXIO;
+		}
+		/* the remaining 8 bit address */
+		ret = i2c_outb(i2c_adap, msg->addr & 0xff);
+		if ((ret != 1) && !nak_ok) {
+			/* the chip did not ack / xmission error occurred */
+			dev_err(&i2c_adap->dev, "died at 2nd address code\n");
+			return -ENXIO;
+		}
+		if (flags & I2C_M_RD) {
+			bit_dbg(3, &i2c_adap->dev, "emitting repeated "
+				"start condition\n");
+			i2c_repstart(adap);
+			/* okay, now switch into reading mode */
+			addr |= 0x01;
+			ret = try_address(i2c_adap, addr, retries);
+			if ((ret != 1) && !nak_ok) {
+				dev_err(&i2c_adap->dev,
+					"died at repeated address code\n");
+				return -EIO;
+			}
+		}
+	} else {		/* normal 7bit address	*/
+		addr = msg->addr << 1;
+		if (flags & I2C_M_RD)
+			addr |= 1;
+		if (flags & I2C_M_REV_DIR_ADDR)
+			addr ^= 1;
+		ret = try_address(i2c_adap, addr, retries);
+		if ((ret != 1) && !nak_ok)
+			return -ENXIO;
+	}
+
+	return 0;
+}
+
+static void bit_i2c_unblock(struct i2c_adapter *i2c_adap)
+{
+    int i;
+    struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
+
+    for (i = 0; i < 9; i++) {
+        setscl(adap, 0);
+        udelay(5);
+        setscl(adap, 1);
+        udelay(5);
+    }
+    setscl(adap, 0);
+    setsda(adap, 0);
+    udelay(5);
+    setscl(adap, 1);
+    udelay(5);
+    setsda(adap, 1);
+}
+
+static int check_bit_i2c_unblock(struct i2c_adapter *i2c_adap)
+{
+    struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
+    int sda, scl;
+
+    sda = getsda(adap);
+    scl = getscl(adap);
+    if ((sda == 0) && scl) {
+        I2C_ALGO_BIT_ERROR("SCL is high and SDA is low, send 9 clock to device.\n");
+        bit_i2c_unblock(i2c_adap);
+    }
+
+    sda = getsda(adap);
+    scl = getscl(adap);
+    if (sda && scl) {
+        I2C_ALGO_BIT_DEBUG("SCL and SDA are both high, i2c level check ok.\n");
+        return 0;
+    }
+    dev_warn(&i2c_adap->dev, "Check i2c level failed, SCL %s, SDA %s.\n", scl ? "high" : "low", sda ? "high" : "low");
+    return -EIO;
+}
+
+static int bit_xfer(struct i2c_adapter *i2c_adap,
+		    struct i2c_msg msgs[], int num)
+{
+	struct i2c_msg *pmsg;
+	struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
+	int i, ret;
+	unsigned short nak_ok;
+
+	if (adap->pre_xfer) {
+		ret = adap->pre_xfer(i2c_adap);
+		if (ret < 0)
+			return ret;
+	}
+
+    if (check_bit_i2c_unblock(i2c_adap) < 0) {
+        I2C_ALGO_BIT_ERROR("check i2c is block.\n");
+        return -EIO;
+    }
+
+	bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
+	i2c_start(adap);
+	for (i = 0; i < num; i++) {
+		pmsg = &msgs[i];
+		nak_ok = pmsg->flags & I2C_M_IGNORE_NAK;
+		if (!(pmsg->flags & I2C_M_NOSTART)) {
+			if (i) {
+				bit_dbg(3, &i2c_adap->dev, "emitting "
+					"repeated start condition\n");
+				i2c_repstart(adap);
+			}
+			ret = bit_doAddress(i2c_adap, pmsg);
+			if ((ret != 0) && !nak_ok) {
+				bit_dbg(1, &i2c_adap->dev, "NAK from "
+					"device addr 0x%02x msg #%d\n",
+					msgs[i].addr, i);
+				goto bailout;
+			}
+		}
+		if (pmsg->flags & I2C_M_RD) {
+			/* read bytes into buffer*/
+			ret = readbytes(i2c_adap, pmsg);
+			if (ret >= 1)
+				bit_dbg(2, &i2c_adap->dev, "read %d byte%s\n",
+					ret, ret == 1 ? "" : "s");
+			if (ret < pmsg->len) {
+				if (ret >= 0)
+					ret = -EIO;
+				goto bailout;
+			}
+		} else {
+			/* write bytes from buffer */
+			ret = sendbytes(i2c_adap, pmsg);
+			if (ret >= 1)
+				bit_dbg(2, &i2c_adap->dev, "wrote %d byte%s\n",
+					ret, ret == 1 ? "" : "s");
+			if (ret < pmsg->len) {
+				if (ret >= 0)
+					ret = -EIO;
+				goto bailout;
+			}
+		}
+	}
+	ret = i;
+
+bailout:
+	bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
+	i2c_stop(adap);
+
+	if (adap->post_xfer)
+		adap->post_xfer(i2c_adap);
+	return ret;
+}
+
+static u32 bit_func(struct i2c_adapter *adap)
+{
+	return I2C_FUNC_I2C | I2C_FUNC_NOSTART | I2C_FUNC_SMBUS_EMUL |
+	       I2C_FUNC_SMBUS_READ_BLOCK_DATA |
+	       I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
+	       I2C_FUNC_10BIT_ADDR | I2C_FUNC_PROTOCOL_MANGLING;
+}
+
+/* -----exported algorithm data: -------------------------------------	*/
+
+const struct i2c_algorithm wb_i2c_bit_algo = {
+	.master_xfer	= bit_xfer,
+	.functionality	= bit_func,
+};
+EXPORT_SYMBOL(wb_i2c_bit_algo);
+
+static const struct i2c_adapter_quirks i2c_bit_quirk_no_clk_stretch = {
+	.flags = I2C_AQ_NO_CLK_STRETCH,
+};
+
+/*
+ * registering functions to load algorithms at runtime
+ */
+static int __i2c_bit_add_bus(struct i2c_adapter *adap,
+			     int (*add_adapter)(struct i2c_adapter *))
+{
+	struct i2c_algo_bit_data *bit_adap = adap->algo_data;
+	int ret;
+
+	if (bit_test) {
+		ret = test_bus(adap);
+		if (bit_test >= 2 && ret < 0)
+			return -ENODEV;
+	}
+
+	/* register new adapter to i2c module... */
+	adap->algo = &wb_i2c_bit_algo;
+	adap->retries = 3;
+	if (bit_adap->getscl == NULL)
+		adap->quirks = &i2c_bit_quirk_no_clk_stretch;
+
+	ret = add_adapter(adap);
+	if (ret < 0)
+		return ret;
+
+	/* Complain if SCL can't be read */
+	if (bit_adap->getscl == NULL) {
+		dev_warn(&adap->dev, "Not I2C compliant: can't read SCL\n");
+		dev_warn(&adap->dev, "Bus may be unreliable\n");
+	}
+	return 0;
+}
+
+int wb_i2c_bit_add_bus(struct i2c_adapter *adap)
+{
+	return __i2c_bit_add_bus(adap, i2c_add_adapter);
+}
+EXPORT_SYMBOL(wb_i2c_bit_add_bus);
+
+int wb_i2c_bit_add_numbered_bus(struct i2c_adapter *adap)
+{
+	return __i2c_bit_add_bus(adap, i2c_add_numbered_adapter);
+}
+EXPORT_SYMBOL(wb_i2c_bit_add_numbered_bus);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("I2C-Bus bit-banging algorithm");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_gpio.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_gpio.c
new file mode 100644
index 000000000000..0362e905fddb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_gpio.c
@@ -0,0 +1,431 @@
+/*
+ * Bitbanging I2C bus driver using the GPIO API
+ *
+ * Copyright (C) 2007 Atmel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/debugfs.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/i2c-algo-bit.h>
+#include <linux/platform_data/i2c-gpio.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/platform_device.h>
+#include <linux/gpio/consumer.h>
+#include <linux/of.h>
+
+extern int wb_i2c_bit_add_numbered_bus(struct i2c_adapter *adap);
+
+struct i2c_gpio_private_data {
+	struct gpio_desc *sda;
+	struct gpio_desc *scl;
+	struct i2c_adapter adap;
+	struct i2c_algo_bit_data bit_data;
+	struct i2c_gpio_platform_data pdata;
+#ifdef CONFIG_I2C_GPIO_FAULT_INJECTOR
+	struct dentry *debug_dir;
+#endif
+};
+
+/*
+ * Toggle SDA by changing the output value of the pin. This is only
+ * valid for pins configured as open drain (i.e. setting the value
+ * high effectively turns off the output driver.)
+ */
+static void i2c_gpio_setsda_val(void *data, int state)
+{
+	struct i2c_gpio_private_data *priv = data;
+
+	gpiod_set_value_cansleep(priv->sda, state);
+}
+
+/*
+ * Toggle SCL by changing the output value of the pin. This is used
+ * for pins that are configured as open drain and for output-only
+ * pins. The latter case will break the i2c protocol, but it will
+ * often work in practice.
+ */
+static void i2c_gpio_setscl_val(void *data, int state)
+{
+	struct i2c_gpio_private_data *priv = data;
+
+	gpiod_set_value_cansleep(priv->scl, state);
+}
+
+static int i2c_gpio_getsda(void *data)
+{
+	struct i2c_gpio_private_data *priv = data;
+
+	return gpiod_get_value_cansleep(priv->sda);
+}
+
+static int i2c_gpio_getscl(void *data)
+{
+	struct i2c_gpio_private_data *priv = data;
+
+	return gpiod_get_value_cansleep(priv->scl);
+}
+
+#ifdef CONFIG_I2C_GPIO_FAULT_INJECTOR
+static struct dentry *i2c_gpio_debug_dir;
+
+#define setsda(bd, val)	((bd)->setsda((bd)->data, val))
+#define setscl(bd, val)	((bd)->setscl((bd)->data, val))
+#define getsda(bd)	((bd)->getsda((bd)->data))
+#define getscl(bd)	((bd)->getscl((bd)->data))
+
+#define WIRE_ATTRIBUTE(wire) \
+static int fops_##wire##_get(void *data, u64 *val)		\
+{								\
+	struct i2c_gpio_private_data *priv = data;		\
+								\
+	i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);	\
+	*val = get##wire(&priv->bit_data);			\
+	i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);	\
+	return 0;						\
+}								\
+static int fops_##wire##_set(void *data, u64 val)		\
+{								\
+	struct i2c_gpio_private_data *priv = data;		\
+								\
+	i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);	\
+	set##wire(&priv->bit_data, val);			\
+	i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);	\
+	return 0;						\
+}								\
+DEFINE_DEBUGFS_ATTRIBUTE(fops_##wire, fops_##wire##_get, fops_##wire##_set, "%llu\n")
+
+WIRE_ATTRIBUTE(scl);
+WIRE_ATTRIBUTE(sda);
+
+static void i2c_gpio_incomplete_transfer(struct i2c_gpio_private_data *priv,
+					u32 pattern, u8 pattern_size)
+{
+	struct i2c_algo_bit_data *bit_data = &priv->bit_data;
+	int i;
+
+	i2c_lock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);
+
+	/* START condition */
+	setsda(bit_data, 0);
+	udelay(bit_data->udelay);
+
+	/* Send pattern, request ACK, don't send STOP */
+	for (i = pattern_size - 1; i >= 0; i--) {
+		setscl(bit_data, 0);
+		udelay(bit_data->udelay / 2);
+		setsda(bit_data, (pattern >> i) & 1);
+		udelay((bit_data->udelay + 1) / 2);
+		setscl(bit_data, 1);
+		udelay(bit_data->udelay);
+	}
+
+	i2c_unlock_bus(&priv->adap, I2C_LOCK_ROOT_ADAPTER);
+}
+
+static int fops_incomplete_addr_phase_set(void *data, u64 addr)
+{
+	struct i2c_gpio_private_data *priv = data;
+	u32 pattern;
+
+	if (addr > 0x7f)
+		return -EINVAL;
+
+	/* ADDR (7 bit) + RD (1 bit) + Client ACK, keep SDA hi (1 bit) */
+	pattern = (addr << 2) | 3;
+
+	i2c_gpio_incomplete_transfer(priv, pattern, 9);
+
+	return 0;
+}
+DEFINE_DEBUGFS_ATTRIBUTE(fops_incomplete_addr_phase, NULL, fops_incomplete_addr_phase_set, "%llu\n");
+
+static int fops_incomplete_write_byte_set(void *data, u64 addr)
+{
+	struct i2c_gpio_private_data *priv = data;
+	u32 pattern;
+
+	if (addr > 0x7f)
+		return -EINVAL;
+
+	/* ADDR (7 bit) + WR (1 bit) + Client ACK (1 bit) */
+	pattern = (addr << 2) | 1;
+	/* 0x00 (8 bit) + Client ACK, keep SDA hi (1 bit) */
+	pattern = (pattern << 9) | 1;
+
+	i2c_gpio_incomplete_transfer(priv, pattern, 18);
+
+	return 0;
+}
+DEFINE_DEBUGFS_ATTRIBUTE(fops_incomplete_write_byte, NULL, fops_incomplete_write_byte_set, "%llu\n");
+
+static void i2c_gpio_fault_injector_init(struct platform_device *pdev)
+{
+	struct i2c_gpio_private_data *priv = platform_get_drvdata(pdev);
+
+	/*
+	 * If there will be a debugfs-dir per i2c adapter somewhen, put the
+	 * 'fault-injector' dir there. Until then, we have a global dir with
+	 * all adapters as subdirs.
+	 */
+	if (!i2c_gpio_debug_dir) {
+		i2c_gpio_debug_dir = debugfs_create_dir("i2c-fault-injector", NULL);
+		if (!i2c_gpio_debug_dir)
+			return;
+	}
+
+	priv->debug_dir = debugfs_create_dir(pdev->name, i2c_gpio_debug_dir);
+	if (!priv->debug_dir)
+		return;
+
+	debugfs_create_file_unsafe("scl", 0600, priv->debug_dir, priv, &fops_scl);
+	debugfs_create_file_unsafe("sda", 0600, priv->debug_dir, priv, &fops_sda);
+	debugfs_create_file_unsafe("incomplete_address_phase", 0200, priv->debug_dir,
+				   priv, &fops_incomplete_addr_phase);
+	debugfs_create_file_unsafe("incomplete_write_byte", 0200, priv->debug_dir,
+				   priv, &fops_incomplete_write_byte);
+}
+
+static void i2c_gpio_fault_injector_exit(struct platform_device *pdev)
+{
+	struct i2c_gpio_private_data *priv = platform_get_drvdata(pdev);
+
+	debugfs_remove_recursive(priv->debug_dir);
+}
+#else
+static inline void i2c_gpio_fault_injector_init(struct platform_device *pdev) {}
+static inline void i2c_gpio_fault_injector_exit(struct platform_device *pdev) {}
+#endif /* CONFIG_I2C_GPIO_FAULT_INJECTOR*/
+
+static void of_i2c_gpio_get_props(struct device_node *np,
+				  struct i2c_gpio_platform_data *pdata)
+{
+	u32 reg;
+
+	of_property_read_u32(np, "i2c-gpio,delay-us", &pdata->udelay);
+
+	if (!of_property_read_u32(np, "i2c-gpio,timeout-ms", &reg))
+		pdata->timeout = msecs_to_jiffies(reg);
+
+	pdata->sda_is_open_drain =
+		of_property_read_bool(np, "i2c-gpio,sda-open-drain");
+	pdata->scl_is_open_drain =
+		of_property_read_bool(np, "i2c-gpio,scl-open-drain");
+	pdata->scl_is_output_only =
+		of_property_read_bool(np, "i2c-gpio,scl-output-only");
+}
+
+static struct gpio_desc *i2c_gpio_get_desc(struct device *dev,
+					   const char *con_id,
+					   unsigned int index,
+					   enum gpiod_flags gflags)
+{
+	struct gpio_desc *retdesc;
+	int ret;
+
+	retdesc = devm_gpiod_get(dev, con_id, gflags);
+	if (!IS_ERR(retdesc)) {
+		dev_dbg(dev, "got GPIO from name %s\n", con_id);
+		return retdesc;
+	}
+
+	retdesc = devm_gpiod_get_index(dev, NULL, index, gflags);
+	if (!IS_ERR(retdesc)) {
+		dev_dbg(dev, "got GPIO from index %u\n", index);
+		return retdesc;
+	}
+
+	ret = PTR_ERR(retdesc);
+
+	/* FIXME: hack in the old code, is this really necessary? */
+	if (ret == -EINVAL)
+		retdesc = ERR_PTR(-EPROBE_DEFER);
+
+	/* This happens if the GPIO driver is not yet probed, let's defer */
+	if (ret == -ENOENT)
+		retdesc = ERR_PTR(-EPROBE_DEFER);
+
+	if (PTR_ERR(retdesc) != -EPROBE_DEFER)
+		dev_err(dev, "error trying to get descriptor: %d\n", ret);
+
+	return retdesc;
+}
+
+static int i2c_gpio_probe(struct platform_device *pdev)
+{
+	struct i2c_gpio_private_data *priv;
+	struct i2c_gpio_platform_data *pdata;
+	struct i2c_algo_bit_data *bit_data;
+	struct i2c_adapter *adap;
+	struct device *dev = &pdev->dev;
+	struct device_node *np = dev->of_node;
+	enum gpiod_flags gflags;
+	int ret;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	adap = &priv->adap;
+	bit_data = &priv->bit_data;
+	pdata = &priv->pdata;
+
+	if (np) {
+		of_i2c_gpio_get_props(np, pdata);
+	} else {
+		/*
+		 * If all platform data settings are zero it is OK
+		 * to not provide any platform data from the board.
+		 */
+		if (dev_get_platdata(dev))
+			memcpy(pdata, dev_get_platdata(dev), sizeof(*pdata));
+	}
+
+	/*
+	 * First get the GPIO pins; if it fails, we'll defer the probe.
+	 * If the SDA line is marked from platform data or device tree as
+	 * "open drain" it means something outside of our control is making
+	 * this line being handled as open drain, and we should just handle
+	 * it as any other output. Else we enforce open drain as this is
+	 * required for an I2C bus.
+	 */
+	if (pdata->sda_is_open_drain)
+		gflags = GPIOD_OUT_HIGH;
+	else
+		gflags = GPIOD_OUT_HIGH_OPEN_DRAIN;
+	priv->sda = i2c_gpio_get_desc(dev, "sda", 0, gflags);
+	if (IS_ERR(priv->sda))
+		return PTR_ERR(priv->sda);
+
+	/*
+	 * If the SCL line is marked from platform data or device tree as
+	 * "open drain" it means something outside of our control is making
+	 * this line being handled as open drain, and we should just handle
+	 * it as any other output. Else we enforce open drain as this is
+	 * required for an I2C bus.
+	 */
+	if (pdata->scl_is_open_drain)
+		gflags = GPIOD_OUT_HIGH;
+	else
+		gflags = GPIOD_OUT_HIGH_OPEN_DRAIN;
+	priv->scl = i2c_gpio_get_desc(dev, "scl", 1, gflags);
+	if (IS_ERR(priv->scl))
+		return PTR_ERR(priv->scl);
+
+	if (gpiod_cansleep(priv->sda) || gpiod_cansleep(priv->scl))
+		dev_warn(dev, "Slow GPIO pins might wreak havoc into I2C/SMBus bus timing");
+
+	bit_data->setsda = i2c_gpio_setsda_val;
+	bit_data->setscl = i2c_gpio_setscl_val;
+
+	if (!pdata->scl_is_output_only)
+		bit_data->getscl = i2c_gpio_getscl;
+	bit_data->getsda = i2c_gpio_getsda;
+
+	if (pdata->udelay)
+		bit_data->udelay = pdata->udelay;
+	else if (pdata->scl_is_output_only)
+		bit_data->udelay = 50;			/* 10 kHz */
+	else
+		bit_data->udelay = 5;			/* 100 kHz */
+
+	if (pdata->timeout)
+		bit_data->timeout = pdata->timeout;
+	else
+		bit_data->timeout = HZ / 10;		/* 100 ms */
+
+	bit_data->data = priv;
+
+	adap->owner = THIS_MODULE;
+	if (np)
+		strlcpy(adap->name, dev_name(dev), sizeof(adap->name));
+	else
+		snprintf(adap->name, sizeof(adap->name), "i2c-gpio%d", pdev->id);
+
+	adap->algo_data = bit_data;
+	adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
+	adap->dev.parent = dev;
+	adap->dev.of_node = np;
+
+	adap->nr = pdev->id;
+	ret = wb_i2c_bit_add_numbered_bus(adap);
+	if (ret)
+		return ret;
+
+	platform_set_drvdata(pdev, priv);
+
+	/*
+	 * FIXME: using global GPIO numbers is not helpful. If/when we
+	 * get accessors to get the actual name of the GPIO line,
+	 * from the descriptor, then provide that instead.
+	 */
+	dev_info(dev, "using lines %u (SDA) and %u (SCL%s)\n",
+		 desc_to_gpio(priv->sda), desc_to_gpio(priv->scl),
+		 pdata->scl_is_output_only
+		 ? ", no clock stretching" : "");
+
+	i2c_gpio_fault_injector_init(pdev);
+
+	return 0;
+}
+
+static int i2c_gpio_remove(struct platform_device *pdev)
+{
+	struct i2c_gpio_private_data *priv;
+	struct i2c_adapter *adap;
+
+	i2c_gpio_fault_injector_exit(pdev);
+
+	priv = platform_get_drvdata(pdev);
+	adap = &priv->adap;
+
+	i2c_del_adapter(adap);
+
+	return 0;
+}
+
+#if defined(CONFIG_OF)
+static const struct of_device_id i2c_gpio_dt_ids[] = {
+	{ .compatible = "wb-i2c-gpio", },
+	{ /* sentinel */ }
+};
+
+MODULE_DEVICE_TABLE(of, i2c_gpio_dt_ids);
+#endif
+
+static struct platform_driver i2c_gpio_driver = {
+	.driver		= {
+		.name	= "wb-i2c-gpio",
+		.of_match_table	= of_match_ptr(i2c_gpio_dt_ids),
+	},
+	.probe		= i2c_gpio_probe,
+	.remove		= i2c_gpio_remove,
+};
+
+static int __init i2c_gpio_init(void)
+{
+	int ret;
+
+	ret = platform_driver_register(&i2c_gpio_driver);
+	if (ret)
+		printk(KERN_ERR "i2c-gpio: probe failed: %d\n", ret);
+
+	return ret;
+}
+subsys_initcall(i2c_gpio_init);
+
+static void __exit i2c_gpio_exit(void)
+{
+	platform_driver_unregister(&i2c_gpio_driver);
+}
+module_exit(i2c_gpio_exit);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("Platform-independent bitbanging I2C driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:i2c-gpio");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_gpio_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_gpio_device.c
new file mode 100644
index 000000000000..5cf949d70ef8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_gpio_device.c
@@ -0,0 +1,110 @@
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/errno.h>
+#include <linux/ioport.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/platform_data/i2c-gpio.h>
+#include <linux/gpio.h>
+#include <linux/gpio/machine.h>
+#include <linux/delay.h>
+#include <asm/delay.h>
+#include <linux/miscdevice.h>
+
+static int gpio_sda = 17;
+module_param(gpio_sda, int, S_IRUGO | S_IWUSR);
+
+static int gpio_scl = 1;
+module_param(gpio_scl, int, S_IRUGO | S_IWUSR);
+
+static int gpio_udelay = 2;
+module_param(gpio_udelay, int, S_IRUGO | S_IWUSR);
+
+static int g_wb_i2c_gpio_device_debug = 0;
+static int g_wb_i2c_gpio_device_error = 0;
+
+module_param(g_wb_i2c_gpio_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_gpio_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_GPIO_DEVICE_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_gpio_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_GPIO_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_GPIO_DEVICE_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_gpio_device_error) { \
+        printk(KERN_ERR "[WB_I2C_GPIO_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+/****************** i2c adapter with gpio ***********************/
+static struct i2c_gpio_platform_data i2c_pdata = {
+    .udelay = 2,
+    .scl_is_output_only = 0,
+    .sda_is_open_drain  = 0,
+    .scl_is_open_drain = 0,
+};
+
+static void i2c_gpio_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device wb_i2c_gpio_device = {
+    .name       = "wb-i2c-gpio",
+    .id     = -1,
+    .num_resources  = 0,
+    .resource   = NULL,
+    .dev        = {
+        .platform_data = &i2c_pdata,
+        .release = i2c_gpio_release,
+    },
+};
+
+/*
+ * i2c
+ */
+static struct gpiod_lookup_table wb_i2c_gpio_table = {
+    .dev_id = "wb-i2c-gpio",
+    .table = {
+        GPIO_LOOKUP_IDX("wb_gpio_d1500", 17, NULL, 0,
+                GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+        GPIO_LOOKUP_IDX("wb_gpio_d1500", 1, NULL, 1,
+                GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+    },
+};
+
+static int __init wb_i2c_gpio_device_init(void)
+{
+    int err;
+
+    WB_I2C_GPIO_DEVICE_VERBOSE("wb_i2c_gpio_device_init enter!\n");
+    wb_i2c_gpio_table.table[0].chip_hwnum = gpio_sda;
+    wb_i2c_gpio_table.table[1].chip_hwnum = gpio_scl;
+    i2c_pdata.udelay = gpio_udelay;
+    gpiod_add_lookup_table(&wb_i2c_gpio_table);
+
+    err = platform_device_register(&wb_i2c_gpio_device);
+    if (err < 0) {
+        printk(KERN_ERR "register i2c gpio device fail(%d). \n", err);
+        gpiod_remove_lookup_table(&wb_i2c_gpio_table);
+        return -1;
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_gpio_device_exit(void)
+{
+    WB_I2C_GPIO_DEVICE_VERBOSE("wb_i2c_gpio_device_exit enter!\n");
+    platform_device_unregister(&wb_i2c_gpio_device);
+    gpiod_remove_lookup_table(&wb_i2c_gpio_table);
+}
+
+module_init(wb_i2c_gpio_device_init);
+module_exit(wb_i2c_gpio_device_exit);
+MODULE_DESCRIPTION("I2C GPIO Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_i801.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_i801.c
new file mode 100644
index 000000000000..a733c115487e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_i801.c
@@ -0,0 +1,2114 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+    Copyright (c) 1998 - 2002  Frodo Looijaard <frodol@dds.nl>,
+    Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker
+    <mdsxyz123@yahoo.com>
+    Copyright (C) 2007 - 2014  Jean Delvare <jdelvare@suse.de>
+    Copyright (C) 2010         Intel Corporation,
+                               David Woodhouse <dwmw2@infradead.org>
+
+*/
+
+/*
+ * Supports the following Intel I/O Controller Hubs (ICH):
+ *
+ *					I/O			Block	I2C
+ *					region	SMBus	Block	proc.	block
+ * Chip name			PCI ID	size	PEC	buffer	call	read
+ * ---------------------------------------------------------------------------
+ * 82801AA (ICH)		0x2413	16	no	no	no	no
+ * 82801AB (ICH0)		0x2423	16	no	no	no	no
+ * 82801BA (ICH2)		0x2443	16	no	no	no	no
+ * 82801CA (ICH3)		0x2483	32	soft	no	no	no
+ * 82801DB (ICH4)		0x24c3	32	hard	yes	no	no
+ * 82801E (ICH5)		0x24d3	32	hard	yes	yes	yes
+ * 6300ESB			0x25a4	32	hard	yes	yes	yes
+ * 82801F (ICH6)		0x266a	32	hard	yes	yes	yes
+ * 6310ESB/6320ESB		0x269b	32	hard	yes	yes	yes
+ * 82801G (ICH7)		0x27da	32	hard	yes	yes	yes
+ * 82801H (ICH8)		0x283e	32	hard	yes	yes	yes
+ * 82801I (ICH9)		0x2930	32	hard	yes	yes	yes
+ * EP80579 (Tolapai)		0x5032	32	hard	yes	yes	yes
+ * ICH10			0x3a30	32	hard	yes	yes	yes
+ * ICH10			0x3a60	32	hard	yes	yes	yes
+ * 5/3400 Series (PCH)		0x3b30	32	hard	yes	yes	yes
+ * 6 Series (PCH)		0x1c22	32	hard	yes	yes	yes
+ * Patsburg (PCH)		0x1d22	32	hard	yes	yes	yes
+ * Patsburg (PCH) IDF		0x1d70	32	hard	yes	yes	yes
+ * Patsburg (PCH) IDF		0x1d71	32	hard	yes	yes	yes
+ * Patsburg (PCH) IDF		0x1d72	32	hard	yes	yes	yes
+ * DH89xxCC (PCH)		0x2330	32	hard	yes	yes	yes
+ * Panther Point (PCH)		0x1e22	32	hard	yes	yes	yes
+ * Lynx Point (PCH)		0x8c22	32	hard	yes	yes	yes
+ * Lynx Point-LP (PCH)		0x9c22	32	hard	yes	yes	yes
+ * Avoton (SOC)			0x1f3c	32	hard	yes	yes	yes
+ * Wellsburg (PCH)		0x8d22	32	hard	yes	yes	yes
+ * Wellsburg (PCH) MS		0x8d7d	32	hard	yes	yes	yes
+ * Wellsburg (PCH) MS		0x8d7e	32	hard	yes	yes	yes
+ * Wellsburg (PCH) MS		0x8d7f	32	hard	yes	yes	yes
+ * Coleto Creek (PCH)		0x23b0	32	hard	yes	yes	yes
+ * Wildcat Point (PCH)		0x8ca2	32	hard	yes	yes	yes
+ * Wildcat Point-LP (PCH)	0x9ca2	32	hard	yes	yes	yes
+ * BayTrail (SOC)		0x0f12	32	hard	yes	yes	yes
+ * Braswell (SOC)		0x2292	32	hard	yes	yes	yes
+ * Sunrise Point-H (PCH) 	0xa123  32	hard	yes	yes	yes
+ * Sunrise Point-LP (PCH)	0x9d23	32	hard	yes	yes	yes
+ * DNV (SOC)			0x19df	32	hard	yes	yes	yes
+ * Emmitsburg (PCH)		0x1bc9	32	hard	yes	yes	yes
+ * Broxton (SOC)		0x5ad4	32	hard	yes	yes	yes
+ * Lewisburg (PCH)		0xa1a3	32	hard	yes	yes	yes
+ * Lewisburg Supersku (PCH)	0xa223	32	hard	yes	yes	yes
+ * Kaby Lake PCH-H (PCH)	0xa2a3	32	hard	yes	yes	yes
+ * Gemini Lake (SOC)		0x31d4	32	hard	yes	yes	yes
+ * Cannon Lake-H (PCH)		0xa323	32	hard	yes	yes	yes
+ * Cannon Lake-LP (PCH)		0x9da3	32	hard	yes	yes	yes
+ * Cedar Fork (PCH)		0x18df	32	hard	yes	yes	yes
+ * Ice Lake-LP (PCH)		0x34a3	32	hard	yes	yes	yes
+ * Comet Lake (PCH)		0x02a3	32	hard	yes	yes	yes
+ * Comet Lake-H (PCH)		0x06a3	32	hard	yes	yes	yes
+ * Elkhart Lake (PCH)		0x4b23	32	hard	yes	yes	yes
+ * Tiger Lake-LP (PCH)		0xa0a3	32	hard	yes	yes	yes
+ * Tiger Lake-H (PCH)		0x43a3	32	hard	yes	yes	yes
+ * Jasper Lake (SOC)		0x4da3	32	hard	yes	yes	yes
+ * Comet Lake-V (PCH)		0xa3a3	32	hard	yes	yes	yes
+ * Alder Lake-S (PCH)		0x7aa3	32	hard	yes	yes	yes
+ *
+ * Features supported by this driver:
+ * Software PEC				no
+ * Hardware PEC				yes
+ * Block buffer				yes
+ * Block process call transaction	yes
+ * I2C block read transaction		yes (doesn't use the block buffer)
+ * Slave mode				no
+ * SMBus Host Notify			yes
+ * Interrupt processing			yes
+ *
+ * See the file Documentation/i2c/busses/i2c-i801.rst for details.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/stddef.h>
+#include <linux/delay.h>
+#include <linux/ioport.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/i2c-smbus.h>
+#include <linux/acpi.h>
+#include <linux/io.h>
+#include <linux/dmi.h>
+#include <linux/slab.h>
+#include <linux/string.h>
+#include <linux/wait.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/itco_wdt.h>
+#include <linux/pm_runtime.h>
+#include <linux/string.h>
+
+#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI
+#include <linux/gpio/machine.h>
+#include <linux/platform_data/i2c-mux-gpio.h>
+#endif
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+/* I801 SMBus address offsets */
+#define SMBHSTSTS(p)	(0 + (p)->smba)
+#define SMBHSTCNT(p)	(2 + (p)->smba)
+#define SMBHSTCMD(p)	(3 + (p)->smba)
+#define SMBHSTADD(p)	(4 + (p)->smba)
+#define SMBHSTDAT0(p)	(5 + (p)->smba)
+#define SMBHSTDAT1(p)	(6 + (p)->smba)
+#define SMBBLKDAT(p)	(7 + (p)->smba)
+#define SMBPEC(p)	(8 + (p)->smba)		/* ICH3 and later */
+#define SMBAUXSTS(p)	(12 + (p)->smba)	/* ICH4 and later */
+#define SMBAUXCTL(p)	(13 + (p)->smba)	/* ICH4 and later */
+#define SMBSLVSTS(p)	(16 + (p)->smba)	/* ICH3 and later */
+#define SMBSLVCMD(p)	(17 + (p)->smba)	/* ICH3 and later */
+#define SMBNTFDADD(p)	(20 + (p)->smba)	/* ICH3 and later */
+#define SMBPINCTL(p)	(15 + (p)->smba)	/* SMBus Pin Control Register */
+
+/* PCI Address Constants */
+#define SMBBAR		4
+#define SMBPCICTL	0x004
+#define SMBPCISTS	0x006
+#define SMBHSTCFG	0x040
+#define TCOBASE		0x050
+#define TCOCTL		0x054
+
+#define SBREG_BAR		0x10
+#define SBREG_SMBCTRL		0xc6000c
+#define SBREG_SMBCTRL_DNV	0xcf000c
+
+/* Host status bits for SMBPCISTS */
+#define SMBPCISTS_INTS		BIT(3)
+
+/* Control bits for SMBPCICTL */
+#define SMBPCICTL_INTDIS	BIT(10)
+
+/* Host configuration bits for SMBHSTCFG */
+#define SMBHSTCFG_HST_EN	BIT(0)
+#define SMBHSTCFG_SMB_SMI_EN	BIT(1)
+#define SMBHSTCFG_I2C_EN	BIT(2)
+#define SMBHSTCFG_SSRESET	BIT(3)
+#define SSRESET_SLEEP_TIME  1   /* 1us */
+#define SSRESET_RETRY_TIME  (1000 / SSRESET_SLEEP_TIME)
+
+/* Pin status for SMBPINCTL */
+#define SMBPINCTL_CLK_STS	1       /* bit0 SMBCLK_CUR_STS*/
+#define SMBPINCTL_SDA_STS	2       /* bit1 SMBDATA_CUR_STS*/
+#define SMBPINCTL_CLK_CTL	4       /* bit2 SMBCLK_CTL */
+
+#define SMBHSTCFG_SPD_WD	BIT(4)
+
+/* TCO configuration bits for TCOCTL */
+#define TCOCTL_EN		BIT(8)
+
+/* Auxiliary status register bits, ICH4+ only */
+#define SMBAUXSTS_CRCE		BIT(0)
+#define SMBAUXSTS_STCO		BIT(1)
+
+/* Auxiliary control register bits, ICH4+ only */
+#define SMBAUXCTL_CRC		BIT(0)
+#define SMBAUXCTL_E32B		BIT(1)
+
+/* Other settings */
+#define MAX_RETRIES		400
+
+/* I801 command constants */
+#define I801_QUICK		0x00
+#define I801_BYTE		0x04
+#define I801_BYTE_DATA		0x08
+#define I801_WORD_DATA		0x0C
+#define I801_PROC_CALL		0x10	/* unimplemented */
+#define I801_BLOCK_DATA		0x14
+#define I801_I2C_BLOCK_DATA	0x18	/* ICH5 and later */
+#define I801_BLOCK_PROC_CALL	0x1C
+
+/* I801 Host Control register bits */
+#define SMBHSTCNT_INTREN	BIT(0)
+#define SMBHSTCNT_KILL		BIT(1)
+#define SMBHSTCNT_LAST_BYTE	BIT(5)
+#define SMBHSTCNT_START		BIT(6)
+#define SMBHSTCNT_PEC_EN	BIT(7)	/* ICH3 and later */
+
+/* I801 Hosts Status register bits */
+#define SMBHSTSTS_BYTE_DONE	BIT(7)
+#define SMBHSTSTS_INUSE_STS	BIT(6)
+#define SMBHSTSTS_SMBALERT_STS	BIT(5)
+#define SMBHSTSTS_FAILED	BIT(4)
+#define SMBHSTSTS_BUS_ERR	BIT(3)
+#define SMBHSTSTS_DEV_ERR	BIT(2)
+#define SMBHSTSTS_INTR		BIT(1)
+#define SMBHSTSTS_HOST_BUSY	BIT(0)
+
+/* Host Notify Status register bits */
+#define SMBSLVSTS_HST_NTFY_STS	BIT(0)
+
+/* Host Notify Command register bits */
+#define SMBSLVCMD_HST_NTFY_INTREN	BIT(0)
+
+#define STATUS_ERROR_FLAGS	(SMBHSTSTS_FAILED | SMBHSTSTS_BUS_ERR | \
+				 SMBHSTSTS_DEV_ERR)
+
+#define STATUS_FLAGS		(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR | \
+				 STATUS_ERROR_FLAGS)
+
+/* Older devices have their ID defined in <linux/pci_ids.h> */
+#define PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS		0x02a3
+#define PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS		0x06a3
+#define PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS		0x0f12
+#define PCI_DEVICE_ID_INTEL_CDF_SMBUS			0x18df
+#define PCI_DEVICE_ID_INTEL_DNV_SMBUS			0x19df
+#define PCI_DEVICE_ID_INTEL_EBG_SMBUS			0x1bc9
+#define PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS		0x1c22
+#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS		0x1d22
+/* Patsburg also has three 'Integrated Device Function' SMBus controllers */
+#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0		0x1d70
+#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1		0x1d71
+#define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2		0x1d72
+#define PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS		0x1e22
+#define PCI_DEVICE_ID_INTEL_AVOTON_SMBUS		0x1f3c
+#define PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS		0x2292
+#define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS		0x2330
+#define PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS		0x23b0
+#define PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS		0x31d4
+#define PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS		0x34a3
+#define PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS		0x3b30
+#define PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS		0x43a3
+#define PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS		0x4b23
+#define PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS		0x4da3
+#define PCI_DEVICE_ID_INTEL_BROXTON_SMBUS		0x5ad4
+#define PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS		0x7aa3
+#define PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS		0x8c22
+#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS		0x8ca2
+#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS		0x8d22
+#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0		0x8d7d
+#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1		0x8d7e
+#define PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2		0x8d7f
+#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS		0x9c22
+#define PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS	0x9ca2
+#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS	0x9d23
+#define PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS		0x9da3
+#define PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS		0xa0a3
+#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS	0xa123
+#define PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS		0xa1a3
+#define PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS	0xa223
+#define PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS	0xa2a3
+#define PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS		0xa323
+#define PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS		0xa3a3
+
+struct i801_mux_config {
+	char *gpio_chip;
+	unsigned values[3];
+	int n_values;
+	unsigned classes[3];
+	unsigned gpios[2];		/* Relative to gpio_chip->base */
+	int n_gpios;
+};
+
+struct i801_priv {
+	struct i2c_adapter adapter;
+	unsigned long smba;
+	unsigned char original_hstcfg;
+	unsigned char original_slvcmd;
+	struct pci_dev *pci_dev;
+	unsigned int features;
+
+	/* isr processing */
+	wait_queue_head_t waitq;
+	u8 status;
+
+	/* Command state used by isr for byte-by-byte block transactions */
+	u8 cmd;
+	bool is_read;
+	int count;
+	int len;
+	u8 *data;
+
+#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI
+	const struct i801_mux_config *mux_drvdata;
+	struct platform_device *mux_pdev;
+	struct gpiod_lookup_table *lookup;
+#endif
+	struct platform_device *tco_pdev;
+
+	/*
+	 * If set to true the host controller registers are reserved for
+	 * ACPI AML use. Protected by acpi_lock.
+	 */
+	bool acpi_reserved;
+	struct mutex acpi_lock;
+};
+
+#define FEATURE_SMBUS_PEC	BIT(0)
+#define FEATURE_BLOCK_BUFFER	BIT(1)
+#define FEATURE_BLOCK_PROC	BIT(2)
+#define FEATURE_I2C_BLOCK_READ	BIT(3)
+#define FEATURE_IRQ		BIT(4)
+#define FEATURE_HOST_NOTIFY	BIT(5)
+/* Not really a feature, but it's convenient to handle it as such */
+#define FEATURE_IDF		BIT(15)
+#define FEATURE_TCO_SPT		BIT(16)
+#define FEATURE_TCO_CNL		BIT(17)
+
+static const char *i801_feature_names[] = {
+	"SMBus PEC",
+	"Block buffer",
+	"Block process call",
+	"I2C block read",
+	"Interrupt",
+	"SMBus Host Notify",
+};
+
+static unsigned int disable_features;
+module_param(disable_features, uint, S_IRUGO | S_IWUSR);
+MODULE_PARM_DESC(disable_features, "Disable selected driver features:\n"
+	"\t\t  0x01  disable SMBus PEC\n"
+	"\t\t  0x02  disable the block buffer\n"
+	"\t\t  0x08  disable the I2C block read functionality\n"
+	"\t\t  0x10  don't use interrupts\n"
+	"\t\t  0x20  disable SMBus Host Notify ");
+
+static void i801_setscl(struct i801_priv *priv, unsigned int level)
+{
+    int pin_status;
+    pin_status = inb_p(SMBPINCTL(priv));
+    if (level == 0) {
+        pin_status &= (~SMBPINCTL_CLK_CTL);
+    }
+    else {
+        pin_status |= SMBPINCTL_CLK_CTL;
+    }
+    outb_p(pin_status, SMBPINCTL(priv));
+	return;
+}
+
+static void i801_i2c_unblock(struct i801_priv *priv)
+{
+    int i;
+    for (i = 0; i < 10; i++) {
+        i801_setscl(priv, 0);
+        udelay(5);
+        i801_setscl(priv, 1);
+        udelay(5);
+    }
+	return;
+}
+
+static int i801_check_i2c_unblock(struct i801_priv *priv)
+{
+	int pin_status;
+
+	pin_status = inb_p(SMBPINCTL(priv));
+    if ( (!(pin_status & SMBPINCTL_SDA_STS) ) && (pin_status & SMBPINCTL_CLK_STS) ) {
+        dev_dbg(&priv->pci_dev->dev, "SDA is low, send 9 clock to device!\n");
+        i801_i2c_unblock(priv);
+    }
+    return 0;
+}
+
+static void i801_do_reset(struct i801_priv *priv)
+{
+    unsigned char tmp;
+    unsigned int retry_count = 0;
+
+    pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &tmp);
+    tmp |= SMBHSTCFG_SSRESET;
+    pci_write_config_byte(priv->pci_dev, SMBHSTCFG, tmp);
+    pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &tmp);
+
+    while( ((tmp & SMBHSTCFG_SSRESET) != 0) && (retry_count < SSRESET_RETRY_TIME)) {
+        usleep_range(SSRESET_SLEEP_TIME, SSRESET_SLEEP_TIME + 1);
+        retry_count++;
+        pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &tmp);
+    }
+
+    return ;
+}
+
+static int i801_check_i2c_scl(struct i801_priv *priv)
+{
+	int pin_status;
+
+	pin_status = inb_p(SMBPINCTL(priv));
+    if ( (pin_status & SMBPINCTL_SDA_STS) && (pin_status & SMBPINCTL_CLK_STS) ) {
+        return 0;
+    }
+
+    dev_dbg(&priv->pci_dev->dev, "SDA or SCL is low, begin to reset SMBus adapter, pin_status: 0x%x\n",pin_status);
+    i801_do_reset(priv);
+    pin_status = inb_p(SMBPINCTL(priv));
+    if ( (pin_status & SMBPINCTL_SDA_STS) && (pin_status & SMBPINCTL_CLK_STS) ) {
+        return 0;
+    }
+    dev_warn(&priv->pci_dev->dev, "SDA or SCL is low.pin_status:0x%x\n",pin_status);
+    return -1;
+}
+
+/* Make sure the SMBus host is ready to start transmitting.
+   Return 0 if it is, -EBUSY if it is not. */
+static int i801_check_pre(struct i801_priv *priv)
+{
+	int status;
+
+	i801_check_i2c_unblock(priv);
+
+	if (i801_check_i2c_scl(priv)) {
+		return -EIO;
+	}
+
+	status = inb_p(SMBHSTSTS(priv));
+	if (status & SMBHSTSTS_HOST_BUSY) {
+		dev_dbg(&priv->pci_dev->dev, "SMBus is busy, begin to reset SMBus adapter!\n");
+
+		i801_do_reset(priv);
+
+		status = inb_p(SMBHSTSTS(priv));
+		if (status & SMBHSTSTS_HOST_BUSY) {
+			dev_err(&priv->pci_dev->dev, "SMBus is busy, can't use it!\n");
+			return -EBUSY;
+		}
+	}
+
+	status &= STATUS_FLAGS;
+	if (status) {
+		dev_dbg(&priv->pci_dev->dev, "Clearing status flags (%02x)\n",
+			status);
+		outb_p(status, SMBHSTSTS(priv));
+		status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
+		if (status) {
+			dev_err(&priv->pci_dev->dev,
+				"Failed clearing status flags (%02x)\n",
+				status);
+			return -EBUSY;
+		}
+	}
+
+	/*
+	 * Clear CRC status if needed.
+	 * During normal operation, i801_check_post() takes care
+	 * of it after every operation.  We do it here only in case
+	 * the hardware was already in this state when the driver
+	 * started.
+	 */
+	if (priv->features & FEATURE_SMBUS_PEC) {
+		status = inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE;
+		if (status) {
+			dev_dbg(&priv->pci_dev->dev,
+				"Clearing aux status flags (%02x)\n", status);
+			outb_p(status, SMBAUXSTS(priv));
+			status = inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE;
+			if (status) {
+				dev_err(&priv->pci_dev->dev,
+					"Failed clearing aux status flags (%02x)\n",
+					status);
+				return -EBUSY;
+			}
+		}
+	}
+
+	return 0;
+}
+
+/*
+ * Convert the status register to an error code, and clear it.
+ * Note that status only contains the bits we want to clear, not the
+ * actual register value.
+ */
+static int i801_check_post(struct i801_priv *priv, int status)
+{
+	int result = 0;
+
+	/*
+	 * If the SMBus is still busy, we give up
+	 * Note: This timeout condition only happens when using polling
+	 * transactions.  For interrupt operation, NAK/timeout is indicated by
+	 * DEV_ERR.
+	 */
+	if (unlikely(status < 0)) {
+		dev_err(&priv->pci_dev->dev, "Transaction timeout\n");
+		/* try to stop the current command */
+		dev_dbg(&priv->pci_dev->dev, "Terminating the current operation\n");
+		outb_p(SMBHSTCNT_KILL, SMBHSTCNT(priv));
+		usleep_range(1000, 2000);
+		outb_p(0, SMBHSTCNT(priv));
+
+		/* Check if it worked */
+		status = inb_p(SMBHSTSTS(priv));
+		if ((status & SMBHSTSTS_HOST_BUSY) ||
+		    !(status & SMBHSTSTS_FAILED))
+			dev_err(&priv->pci_dev->dev,
+				"Failed terminating the transaction\n");
+		outb_p(STATUS_FLAGS, SMBHSTSTS(priv));
+		return -ETIMEDOUT;
+	}
+
+	if (status & SMBHSTSTS_FAILED) {
+		result = -EIO;
+		dev_err(&priv->pci_dev->dev, "Transaction failed\n");
+	}
+	if (status & SMBHSTSTS_DEV_ERR) {
+		/*
+		 * This may be a PEC error, check and clear it.
+		 *
+		 * AUXSTS is handled differently from HSTSTS.
+		 * For HSTSTS, i801_isr() or i801_wait_intr()
+		 * has already cleared the error bits in hardware,
+		 * and we are passed a copy of the original value
+		 * in "status".
+		 * For AUXSTS, the hardware register is left
+		 * for us to handle here.
+		 * This is asymmetric, slightly iffy, but safe,
+		 * since all this code is serialized and the CRCE
+		 * bit is harmless as long as it's cleared before
+		 * the next operation.
+		 */
+		if ((priv->features & FEATURE_SMBUS_PEC) &&
+		    (inb_p(SMBAUXSTS(priv)) & SMBAUXSTS_CRCE)) {
+			outb_p(SMBAUXSTS_CRCE, SMBAUXSTS(priv));
+			result = -EBADMSG;
+			dev_dbg(&priv->pci_dev->dev, "PEC error\n");
+		} else {
+			result = -ENXIO;
+			dev_dbg(&priv->pci_dev->dev, "No response\n");
+		}
+	}
+	if (status & SMBHSTSTS_BUS_ERR) {
+		result = -EAGAIN;
+		dev_dbg(&priv->pci_dev->dev, "Lost arbitration\n");
+	}
+
+	/* Clear status flags except BYTE_DONE, to be cleared by caller */
+	outb_p(status, SMBHSTSTS(priv));
+
+	return result;
+}
+
+/* Wait for BUSY being cleared and either INTR or an error flag being set */
+static int i801_wait_intr(struct i801_priv *priv)
+{
+	int timeout = 0;
+	int status;
+
+	/* We will always wait for a fraction of a second! */
+	do {
+		usleep_range(250, 500);
+		status = inb_p(SMBHSTSTS(priv));
+	} while (((status & SMBHSTSTS_HOST_BUSY) ||
+		  !(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR))) &&
+		 (timeout++ < MAX_RETRIES));
+
+	if (timeout > MAX_RETRIES) {
+		dev_dbg(&priv->pci_dev->dev, "INTR Timeout!\n");
+		return -ETIMEDOUT;
+	}
+	return status & (STATUS_ERROR_FLAGS | SMBHSTSTS_INTR);
+}
+
+/* Wait for either BYTE_DONE or an error flag being set */
+static int i801_wait_byte_done(struct i801_priv *priv)
+{
+	int timeout = 0;
+	int status;
+
+	/* We will always wait for a fraction of a second! */
+	do {
+		usleep_range(250, 500);
+		status = inb_p(SMBHSTSTS(priv));
+	} while (!(status & (STATUS_ERROR_FLAGS | SMBHSTSTS_BYTE_DONE)) &&
+		 (timeout++ < MAX_RETRIES));
+
+	if (timeout > MAX_RETRIES) {
+		dev_dbg(&priv->pci_dev->dev, "BYTE_DONE Timeout!\n");
+		return -ETIMEDOUT;
+	}
+	return status & STATUS_ERROR_FLAGS;
+}
+
+static int i801_transaction(struct i801_priv *priv, int xact)
+{
+	int status;
+	int result;
+	const struct i2c_adapter *adap = &priv->adapter;
+
+	result = i801_check_pre(priv);
+	if (result < 0)
+		return result;
+
+	if (priv->features & FEATURE_IRQ) {
+		outb_p(xact | SMBHSTCNT_INTREN | SMBHSTCNT_START,
+		       SMBHSTCNT(priv));
+		result = wait_event_timeout(priv->waitq,
+					    (status = priv->status),
+					    adap->timeout);
+		if (!result) {
+			status = -ETIMEDOUT;
+			dev_warn(&priv->pci_dev->dev,
+				 "Timeout waiting for interrupt!\n");
+		}
+		priv->status = 0;
+		return i801_check_post(priv, status);
+	}
+
+	/* the current contents of SMBHSTCNT can be overwritten, since PEC,
+	 * SMBSCMD are passed in xact */
+	outb_p(xact | SMBHSTCNT_START, SMBHSTCNT(priv));
+
+	status = i801_wait_intr(priv);
+	return i801_check_post(priv, status);
+}
+
+static int i801_block_transaction_by_block(struct i801_priv *priv,
+					   union i2c_smbus_data *data,
+					   char read_write, int command,
+					   int hwpec)
+{
+	int i, len;
+	int status;
+	int xact = hwpec ? SMBHSTCNT_PEC_EN : 0;
+
+	switch (command) {
+	case I2C_SMBUS_BLOCK_PROC_CALL:
+		xact |= I801_BLOCK_PROC_CALL;
+		break;
+	case I2C_SMBUS_BLOCK_DATA:
+		xact |= I801_BLOCK_DATA;
+		break;
+	default:
+		return -EOPNOTSUPP;
+	}
+
+	inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */
+
+	/* Use 32-byte buffer to process this transaction */
+	if (read_write == I2C_SMBUS_WRITE) {
+		len = data->block[0];
+		outb_p(len, SMBHSTDAT0(priv));
+		for (i = 0; i < len; i++)
+			outb_p(data->block[i+1], SMBBLKDAT(priv));
+	}
+
+	status = i801_transaction(priv, xact);
+	if (status)
+		return status;
+
+	if (read_write == I2C_SMBUS_READ ||
+	    command == I2C_SMBUS_BLOCK_PROC_CALL) {
+		len = inb_p(SMBHSTDAT0(priv));
+		if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
+			return -EPROTO;
+
+		data->block[0] = len;
+		for (i = 0; i < len; i++)
+			data->block[i + 1] = inb_p(SMBBLKDAT(priv));
+	}
+	return 0;
+}
+
+static void i801_isr_byte_done(struct i801_priv *priv)
+{
+	if (priv->is_read) {
+		/* For SMBus block reads, length is received with first byte */
+		if (((priv->cmd & 0x1c) == I801_BLOCK_DATA) &&
+		    (priv->count == 0)) {
+			priv->len = inb_p(SMBHSTDAT0(priv));
+			if (priv->len < 1 || priv->len > I2C_SMBUS_BLOCK_MAX) {
+				dev_err(&priv->pci_dev->dev,
+					"Illegal SMBus block read size %d\n",
+					priv->len);
+				/* FIXME: Recover */
+				priv->len = I2C_SMBUS_BLOCK_MAX;
+			} else {
+				dev_dbg(&priv->pci_dev->dev,
+					"SMBus block read size is %d\n",
+					priv->len);
+			}
+			priv->data[-1] = priv->len;
+		}
+
+		/* Read next byte */
+		if (priv->count < priv->len)
+			priv->data[priv->count++] = inb(SMBBLKDAT(priv));
+		else
+			dev_dbg(&priv->pci_dev->dev,
+				"Discarding extra byte on block read\n");
+
+		/* Set LAST_BYTE for last byte of read transaction */
+		if (priv->count == priv->len - 1)
+			outb_p(priv->cmd | SMBHSTCNT_LAST_BYTE,
+			       SMBHSTCNT(priv));
+	} else if (priv->count < priv->len - 1) {
+		/* Write next byte, except for IRQ after last byte */
+		outb_p(priv->data[++priv->count], SMBBLKDAT(priv));
+	}
+
+	/* Clear BYTE_DONE to continue with next byte */
+	outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv));
+}
+
+static irqreturn_t i801_host_notify_isr(struct i801_priv *priv)
+{
+	unsigned short addr;
+
+	addr = inb_p(SMBNTFDADD(priv)) >> 1;
+
+	/*
+	 * With the tested platforms, reading SMBNTFDDAT (22 + (p)->smba)
+	 * always returns 0. Our current implementation doesn't provide
+	 * data, so we just ignore it.
+	 */
+	i2c_handle_smbus_host_notify(&priv->adapter, addr);
+
+	/* clear Host Notify bit and return */
+	outb_p(SMBSLVSTS_HST_NTFY_STS, SMBSLVSTS(priv));
+	return IRQ_HANDLED;
+}
+
+/*
+ * There are three kinds of interrupts:
+ *
+ * 1) i801 signals transaction completion with one of these interrupts:
+ *      INTR - Success
+ *      DEV_ERR - Invalid command, NAK or communication timeout
+ *      BUS_ERR - SMI# transaction collision
+ *      FAILED - transaction was canceled due to a KILL request
+ *    When any of these occur, update ->status and wake up the waitq.
+ *    ->status must be cleared before kicking off the next transaction.
+ *
+ * 2) For byte-by-byte (I2C read/write) transactions, one BYTE_DONE interrupt
+ *    occurs for each byte of a byte-by-byte to prepare the next byte.
+ *
+ * 3) Host Notify interrupts
+ */
+static irqreturn_t i801_isr(int irq, void *dev_id)
+{
+	struct i801_priv *priv = dev_id;
+	u16 pcists;
+	u8 status;
+
+	/* Confirm this is our interrupt */
+	pci_read_config_word(priv->pci_dev, SMBPCISTS, &pcists);
+	if (!(pcists & SMBPCISTS_INTS))
+		return IRQ_NONE;
+
+	if (priv->features & FEATURE_HOST_NOTIFY) {
+		status = inb_p(SMBSLVSTS(priv));
+		if (status & SMBSLVSTS_HST_NTFY_STS)
+			return i801_host_notify_isr(priv);
+	}
+
+	status = inb_p(SMBHSTSTS(priv));
+	if (status & SMBHSTSTS_BYTE_DONE)
+		i801_isr_byte_done(priv);
+
+	/*
+	 * Clear irq sources and report transaction result.
+	 * ->status must be cleared before the next transaction is started.
+	 */
+	status &= SMBHSTSTS_INTR | STATUS_ERROR_FLAGS;
+	if (status) {
+		outb_p(status, SMBHSTSTS(priv));
+		priv->status = status;
+		wake_up(&priv->waitq);
+	}
+
+	return IRQ_HANDLED;
+}
+
+/*
+ * For "byte-by-byte" block transactions:
+ *   I2C write uses cmd=I801_BLOCK_DATA, I2C_EN=1
+ *   I2C read uses cmd=I801_I2C_BLOCK_DATA
+ */
+static int i801_block_transaction_byte_by_byte(struct i801_priv *priv,
+					       union i2c_smbus_data *data,
+					       char read_write, int command,
+					       int hwpec)
+{
+	int i, len;
+	int smbcmd;
+	int status;
+	int result;
+	const struct i2c_adapter *adap = &priv->adapter;
+
+	if (command == I2C_SMBUS_BLOCK_PROC_CALL)
+		return -EOPNOTSUPP;
+
+	result = i801_check_pre(priv);
+	if (result < 0)
+		return result;
+
+	len = data->block[0];
+
+	if (read_write == I2C_SMBUS_WRITE) {
+		outb_p(len, SMBHSTDAT0(priv));
+		outb_p(data->block[1], SMBBLKDAT(priv));
+	}
+
+	if (command == I2C_SMBUS_I2C_BLOCK_DATA &&
+	    read_write == I2C_SMBUS_READ)
+		smbcmd = I801_I2C_BLOCK_DATA;
+	else
+		smbcmd = I801_BLOCK_DATA;
+
+	if (priv->features & FEATURE_IRQ) {
+		priv->is_read = (read_write == I2C_SMBUS_READ);
+		if (len == 1 && priv->is_read)
+			smbcmd |= SMBHSTCNT_LAST_BYTE;
+		priv->cmd = smbcmd | SMBHSTCNT_INTREN;
+		priv->len = len;
+		priv->count = 0;
+		priv->data = &data->block[1];
+
+		outb_p(priv->cmd | SMBHSTCNT_START, SMBHSTCNT(priv));
+		result = wait_event_timeout(priv->waitq,
+					    (status = priv->status),
+					    adap->timeout);
+		if (!result) {
+			status = -ETIMEDOUT;
+			dev_warn(&priv->pci_dev->dev,
+				 "Timeout waiting for interrupt!\n");
+		}
+		priv->status = 0;
+		return i801_check_post(priv, status);
+	}
+
+	for (i = 1; i <= len; i++) {
+		if (i == len && read_write == I2C_SMBUS_READ)
+			smbcmd |= SMBHSTCNT_LAST_BYTE;
+		outb_p(smbcmd, SMBHSTCNT(priv));
+
+		if (i == 1)
+			outb_p(inb(SMBHSTCNT(priv)) | SMBHSTCNT_START,
+			       SMBHSTCNT(priv));
+
+		status = i801_wait_byte_done(priv);
+		if (status)
+			goto exit;
+
+		if (i == 1 && read_write == I2C_SMBUS_READ
+		 && command != I2C_SMBUS_I2C_BLOCK_DATA) {
+			len = inb_p(SMBHSTDAT0(priv));
+			if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) {
+				dev_err(&priv->pci_dev->dev,
+					"Illegal SMBus block read size %d\n",
+					len);
+				/* Recover */
+				while (inb_p(SMBHSTSTS(priv)) &
+				       SMBHSTSTS_HOST_BUSY)
+					outb_p(SMBHSTSTS_BYTE_DONE,
+					       SMBHSTSTS(priv));
+				outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv));
+				return -EPROTO;
+			}
+			data->block[0] = len;
+		}
+
+		/* Retrieve/store value in SMBBLKDAT */
+		if (read_write == I2C_SMBUS_READ)
+			data->block[i] = inb_p(SMBBLKDAT(priv));
+		if (read_write == I2C_SMBUS_WRITE && i+1 <= len)
+			outb_p(data->block[i+1], SMBBLKDAT(priv));
+
+		/* signals SMBBLKDAT ready */
+		outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS(priv));
+	}
+
+	status = i801_wait_intr(priv);
+exit:
+	return i801_check_post(priv, status);
+}
+
+static int i801_set_block_buffer_mode(struct i801_priv *priv)
+{
+	outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_E32B, SMBAUXCTL(priv));
+	if ((inb_p(SMBAUXCTL(priv)) & SMBAUXCTL_E32B) == 0)
+		return -EIO;
+	return 0;
+}
+
+/* Block transaction function */
+static int i801_block_transaction(struct i801_priv *priv,
+				  union i2c_smbus_data *data, char read_write,
+				  int command, int hwpec)
+{
+	int result = 0;
+	unsigned char hostc;
+
+	if (command == I2C_SMBUS_I2C_BLOCK_DATA) {
+		if (read_write == I2C_SMBUS_WRITE) {
+			/* set I2C_EN bit in configuration register */
+			pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &hostc);
+			pci_write_config_byte(priv->pci_dev, SMBHSTCFG,
+					      hostc | SMBHSTCFG_I2C_EN);
+		} else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) {
+			dev_err(&priv->pci_dev->dev,
+				"I2C block read is unsupported!\n");
+			return -EOPNOTSUPP;
+		}
+	}
+
+	if (read_write == I2C_SMBUS_WRITE
+	 || command == I2C_SMBUS_I2C_BLOCK_DATA) {
+		if (data->block[0] < 1)
+			data->block[0] = 1;
+		if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
+			data->block[0] = I2C_SMBUS_BLOCK_MAX;
+	} else {
+		data->block[0] = 32;	/* max for SMBus block reads */
+	}
+
+	/* Experience has shown that the block buffer can only be used for
+	   SMBus (not I2C) block transactions, even though the datasheet
+	   doesn't mention this limitation. */
+	if ((priv->features & FEATURE_BLOCK_BUFFER)
+	 && command != I2C_SMBUS_I2C_BLOCK_DATA
+	 && i801_set_block_buffer_mode(priv) == 0)
+		result = i801_block_transaction_by_block(priv, data,
+							 read_write,
+							 command, hwpec);
+	else
+		result = i801_block_transaction_byte_by_byte(priv, data,
+							     read_write,
+							     command, hwpec);
+
+	if (command == I2C_SMBUS_I2C_BLOCK_DATA
+	 && read_write == I2C_SMBUS_WRITE) {
+		/* restore saved configuration register value */
+		pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc);
+	}
+	return result;
+}
+
+/* Return negative errno on error. */
+static s32 i801_access(struct i2c_adapter *adap, u16 addr,
+		       unsigned short flags, char read_write, u8 command,
+		       int size, union i2c_smbus_data *data)
+{
+	int hwpec;
+	int block = 0;
+	int ret = 0, xact = 0;
+	struct i801_priv *priv = i2c_get_adapdata(adap);
+
+	mutex_lock(&priv->acpi_lock);
+	if (priv->acpi_reserved) {
+		mutex_unlock(&priv->acpi_lock);
+		return -EBUSY;
+	}
+
+	pm_runtime_get_sync(&priv->pci_dev->dev);
+
+	hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC)
+		&& size != I2C_SMBUS_QUICK
+		&& size != I2C_SMBUS_I2C_BLOCK_DATA;
+
+	switch (size) {
+	case I2C_SMBUS_QUICK:
+		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
+		       SMBHSTADD(priv));
+		xact = I801_QUICK;
+		break;
+	case I2C_SMBUS_BYTE:
+		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
+		       SMBHSTADD(priv));
+		if (read_write == I2C_SMBUS_WRITE)
+			outb_p(command, SMBHSTCMD(priv));
+		xact = I801_BYTE;
+		break;
+	case I2C_SMBUS_BYTE_DATA:
+		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
+		       SMBHSTADD(priv));
+		outb_p(command, SMBHSTCMD(priv));
+		if (read_write == I2C_SMBUS_WRITE)
+			outb_p(data->byte, SMBHSTDAT0(priv));
+		xact = I801_BYTE_DATA;
+		break;
+	case I2C_SMBUS_WORD_DATA:
+		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
+		       SMBHSTADD(priv));
+		outb_p(command, SMBHSTCMD(priv));
+		if (read_write == I2C_SMBUS_WRITE) {
+			outb_p(data->word & 0xff, SMBHSTDAT0(priv));
+			outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
+		}
+		xact = I801_WORD_DATA;
+		break;
+	case I2C_SMBUS_BLOCK_DATA:
+		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
+		       SMBHSTADD(priv));
+		outb_p(command, SMBHSTCMD(priv));
+		block = 1;
+		break;
+	case I2C_SMBUS_I2C_BLOCK_DATA:
+		/*
+		 * NB: page 240 of ICH5 datasheet shows that the R/#W
+		 * bit should be cleared here, even when reading.
+		 * However if SPD Write Disable is set (Lynx Point and later),
+		 * the read will fail if we don't set the R/#W bit.
+		 */
+		outb_p(((addr & 0x7f) << 1) |
+		       ((priv->original_hstcfg & SMBHSTCFG_SPD_WD) ?
+			(read_write & 0x01) : 0),
+		       SMBHSTADD(priv));
+		if (read_write == I2C_SMBUS_READ) {
+			/* NB: page 240 of ICH5 datasheet also shows
+			 * that DATA1 is the cmd field when reading */
+			outb_p(command, SMBHSTDAT1(priv));
+		} else
+			outb_p(command, SMBHSTCMD(priv));
+		block = 1;
+		break;
+	case I2C_SMBUS_BLOCK_PROC_CALL:
+		/*
+		 * Bit 0 of the slave address register always indicate a write
+		 * command.
+		 */
+		outb_p((addr & 0x7f) << 1, SMBHSTADD(priv));
+		outb_p(command, SMBHSTCMD(priv));
+		block = 1;
+		break;
+	default:
+		dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n",
+			size);
+		ret = -EOPNOTSUPP;
+		goto out;
+	}
+
+	if (hwpec)	/* enable/disable hardware PEC */
+		outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_CRC, SMBAUXCTL(priv));
+	else
+		outb_p(inb_p(SMBAUXCTL(priv)) & (~SMBAUXCTL_CRC),
+		       SMBAUXCTL(priv));
+
+	if (block)
+		ret = i801_block_transaction(priv, data, read_write, size,
+					     hwpec);
+	else
+		ret = i801_transaction(priv, xact);
+
+	/* Some BIOSes don't like it when PEC is enabled at reboot or resume
+	   time, so we forcibly disable it after every transaction. Turn off
+	   E32B for the same reason. */
+	if (hwpec || block)
+		outb_p(inb_p(SMBAUXCTL(priv)) &
+		       ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
+
+	if (block)
+		goto out;
+	if (ret)
+		goto out;
+	if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK))
+		goto out;
+
+	switch (xact & 0x7f) {
+	case I801_BYTE:	/* Result put in SMBHSTDAT0 */
+	case I801_BYTE_DATA:
+		data->byte = inb_p(SMBHSTDAT0(priv));
+		break;
+	case I801_WORD_DATA:
+		data->word = inb_p(SMBHSTDAT0(priv)) +
+			     (inb_p(SMBHSTDAT1(priv)) << 8);
+		break;
+	}
+
+out:
+	pm_runtime_mark_last_busy(&priv->pci_dev->dev);
+	pm_runtime_put_autosuspend(&priv->pci_dev->dev);
+	mutex_unlock(&priv->acpi_lock);
+	return ret;
+}
+
+static u32 i801_func(struct i2c_adapter *adapter)
+{
+	struct i801_priv *priv = i2c_get_adapdata(adapter);
+
+	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
+	       I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
+	       I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK |
+	       ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) |
+	       ((priv->features & FEATURE_BLOCK_PROC) ?
+		I2C_FUNC_SMBUS_BLOCK_PROC_CALL : 0) |
+	       ((priv->features & FEATURE_I2C_BLOCK_READ) ?
+		I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0) |
+	       ((priv->features & FEATURE_HOST_NOTIFY) ?
+		I2C_FUNC_SMBUS_HOST_NOTIFY : 0);
+}
+
+static void i801_enable_host_notify(struct i2c_adapter *adapter)
+{
+	struct i801_priv *priv = i2c_get_adapdata(adapter);
+
+	if (!(priv->features & FEATURE_HOST_NOTIFY))
+		return;
+
+	if (!(SMBSLVCMD_HST_NTFY_INTREN & priv->original_slvcmd))
+		outb_p(SMBSLVCMD_HST_NTFY_INTREN | priv->original_slvcmd,
+		       SMBSLVCMD(priv));
+
+	/* clear Host Notify bit to allow a new notification */
+	outb_p(SMBSLVSTS_HST_NTFY_STS, SMBSLVSTS(priv));
+}
+
+static void i801_disable_host_notify(struct i801_priv *priv)
+{
+	if (!(priv->features & FEATURE_HOST_NOTIFY))
+		return;
+
+	outb_p(priv->original_slvcmd, SMBSLVCMD(priv));
+}
+
+static const struct i2c_algorithm smbus_algorithm = {
+	.smbus_xfer	= i801_access,
+	.functionality	= i801_func,
+};
+
+static const struct pci_device_id i801_ids[] = {
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_2) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_3) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_3) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_3) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_4) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_16) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_17) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_17) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_5) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_6) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EP80579_1) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_5_3400_SERIES_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COLETOCREEK_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_GEMINILAKE_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WILDCATPOINT_LP_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BAYTRAIL_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BRASWELL_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CDF_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EBG_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BROXTON_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS) },
+	{ 0, }
+};
+
+MODULE_DEVICE_TABLE(pci, i801_ids);
+
+#if defined CONFIG_X86 && defined CONFIG_DMI
+static unsigned char apanel_addr;
+
+/* Scan the system ROM for the signature "FJKEYINF" */
+static __init const void __iomem *bios_signature(const void __iomem *bios)
+{
+	ssize_t offset;
+	const unsigned char signature[] = "FJKEYINF";
+
+	for (offset = 0; offset < 0x10000; offset += 0x10) {
+		if (check_signature(bios + offset, signature,
+				    sizeof(signature)-1))
+			return bios + offset;
+	}
+	return NULL;
+}
+
+static void __init input_apanel_init(void)
+{
+	void __iomem *bios;
+	const void __iomem *p;
+
+	bios = ioremap(0xF0000, 0x10000); /* Can't fail */
+	p = bios_signature(bios);
+	if (p) {
+		/* just use the first address */
+		apanel_addr = readb(p + 8 + 3) >> 1;
+	}
+	iounmap(bios);
+}
+
+struct dmi_onboard_device_info {
+	const char *name;
+	u8 type;
+	unsigned short i2c_addr;
+	const char *i2c_type;
+};
+
+static const struct dmi_onboard_device_info dmi_devices[] = {
+	{ "Syleus", DMI_DEV_TYPE_OTHER, 0x73, "fscsyl" },
+	{ "Hermes", DMI_DEV_TYPE_OTHER, 0x73, "fscher" },
+	{ "Hades",  DMI_DEV_TYPE_OTHER, 0x73, "fschds" },
+};
+
+static void dmi_check_onboard_device(u8 type, const char *name,
+				     struct i2c_adapter *adap)
+{
+	int i;
+	struct i2c_board_info info;
+
+	for (i = 0; i < ARRAY_SIZE(dmi_devices); i++) {
+		/* & ~0x80, ignore enabled/disabled bit */
+		if ((type & ~0x80) != dmi_devices[i].type)
+			continue;
+		if (strcasecmp(name, dmi_devices[i].name))
+			continue;
+
+		mem_clear(&info, sizeof(struct i2c_board_info));
+		info.addr = dmi_devices[i].i2c_addr;
+		strlcpy(info.type, dmi_devices[i].i2c_type, I2C_NAME_SIZE);
+		i2c_new_client_device(adap, &info);
+		break;
+	}
+}
+
+/* We use our own function to check for onboard devices instead of
+   dmi_find_device() as some buggy BIOS's have the devices we are interested
+   in marked as disabled */
+static void dmi_check_onboard_devices(const struct dmi_header *dm, void *adap)
+{
+	int i, count;
+
+	if (dm->type != 10)
+		return;
+
+	count = (dm->length - sizeof(struct dmi_header)) / 2;
+	for (i = 0; i < count; i++) {
+		const u8 *d = (char *)(dm + 1) + (i * 2);
+		const char *name = ((char *) dm) + dm->length;
+		u8 type = d[0];
+		u8 s = d[1];
+
+		if (!s)
+			continue;
+		s--;
+		while (s > 0 && name[0]) {
+			name += strlen(name) + 1;
+			s--;
+		}
+		if (name[0] == 0) /* Bogus string reference */
+			continue;
+
+		dmi_check_onboard_device(type, name, adap);
+	}
+}
+
+/* NOTE: Keep this list in sync with drivers/platform/x86/dell-smo8800.c */
+static const char *const acpi_smo8800_ids[] = {
+	"SMO8800",
+	"SMO8801",
+	"SMO8810",
+	"SMO8811",
+	"SMO8820",
+	"SMO8821",
+	"SMO8830",
+	"SMO8831",
+};
+
+static acpi_status check_acpi_smo88xx_device(acpi_handle obj_handle,
+					     u32 nesting_level,
+					     void *context,
+					     void **return_value)
+{
+	struct acpi_device_info *info;
+	acpi_status status;
+	char *hid;
+	int i;
+
+	status = acpi_get_object_info(obj_handle, &info);
+	if (ACPI_FAILURE(status))
+		return AE_OK;
+
+	if (!(info->valid & ACPI_VALID_HID))
+		goto smo88xx_not_found;
+
+	hid = info->hardware_id.string;
+	if (!hid)
+		goto smo88xx_not_found;
+
+	i = match_string(acpi_smo8800_ids, ARRAY_SIZE(acpi_smo8800_ids), hid);
+	if (i < 0)
+		goto smo88xx_not_found;
+
+	kfree(info);
+
+	*((bool *)return_value) = true;
+	return AE_CTRL_TERMINATE;
+
+smo88xx_not_found:
+	kfree(info);
+	return AE_OK;
+}
+
+static bool is_dell_system_with_lis3lv02d(void)
+{
+	bool found;
+	const char *vendor;
+
+	vendor = dmi_get_system_info(DMI_SYS_VENDOR);
+	if (!vendor || strcmp(vendor, "Dell Inc."))
+		return false;
+
+	/*
+	 * Check that ACPI device SMO88xx is present and is functioning.
+	 * Function acpi_get_devices() already filters all ACPI devices
+	 * which are not present or are not functioning.
+	 * ACPI device SMO88xx represents our ST microelectronics lis3lv02d
+	 * accelerometer but unfortunately ACPI does not provide any other
+	 * information (like I2C address).
+	 */
+	found = false;
+	acpi_get_devices(NULL, check_acpi_smo88xx_device, NULL,
+			 (void **)&found);
+
+	return found;
+}
+
+/*
+ * Accelerometer's I2C address is not specified in DMI nor ACPI,
+ * so it is needed to define mapping table based on DMI product names.
+ */
+static const struct {
+	const char *dmi_product_name;
+	unsigned short i2c_addr;
+} dell_lis3lv02d_devices[] = {
+	/*
+	 * Dell platform team told us that these Latitude devices have
+	 * ST microelectronics accelerometer at I2C address 0x29.
+	 */
+	{ "Latitude E5250",     0x29 },
+	{ "Latitude E5450",     0x29 },
+	{ "Latitude E5550",     0x29 },
+	{ "Latitude E6440",     0x29 },
+	{ "Latitude E6440 ATG", 0x29 },
+	{ "Latitude E6540",     0x29 },
+	/*
+	 * Additional individual entries were added after verification.
+	 */
+	{ "Latitude 5480",      0x29 },
+	{ "Vostro V131",        0x1d },
+};
+
+static void register_dell_lis3lv02d_i2c_device(struct i801_priv *priv)
+{
+	struct i2c_board_info info;
+	const char *dmi_product_name;
+	int i;
+
+	dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
+	for (i = 0; i < ARRAY_SIZE(dell_lis3lv02d_devices); ++i) {
+		if (strcmp(dmi_product_name,
+			   dell_lis3lv02d_devices[i].dmi_product_name) == 0)
+			break;
+	}
+
+	if (i == ARRAY_SIZE(dell_lis3lv02d_devices)) {
+		dev_warn(&priv->pci_dev->dev,
+			 "Accelerometer lis3lv02d is present on SMBus but its"
+			 " address is unknown, skipping registration\n");
+		return;
+	}
+
+	mem_clear(&info, sizeof(struct i2c_board_info));
+	info.addr = dell_lis3lv02d_devices[i].i2c_addr;
+	strlcpy(info.type, "lis3lv02d", I2C_NAME_SIZE);
+	i2c_new_client_device(&priv->adapter, &info);
+}
+
+/* Register optional slaves */
+static void i801_probe_optional_slaves(struct i801_priv *priv)
+{
+	/* Only register slaves on main SMBus channel */
+	if (priv->features & FEATURE_IDF)
+		return;
+
+	if (apanel_addr) {
+		struct i2c_board_info info;
+
+		mem_clear(&info, sizeof(struct i2c_board_info));
+		info.addr = apanel_addr;
+		strlcpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE);
+		i2c_new_client_device(&priv->adapter, &info);
+	}
+
+	if (dmi_name_in_vendors("FUJITSU"))
+		dmi_walk(dmi_check_onboard_devices, &priv->adapter);
+
+	if (is_dell_system_with_lis3lv02d())
+		register_dell_lis3lv02d_i2c_device(priv);
+
+	/* Instantiate SPD EEPROMs unless the SMBus is multiplexed */
+#if IS_ENABLED(CONFIG_I2C_MUX_GPIO)
+	if (!priv->mux_drvdata)
+#endif
+		i2c_register_spd(&priv->adapter);
+}
+#else
+static void __init input_apanel_init(void) {}
+static void i801_probe_optional_slaves(struct i801_priv *priv) {}
+#endif	/* CONFIG_X86 && CONFIG_DMI */
+
+#if IS_ENABLED(CONFIG_I2C_MUX_GPIO) && defined CONFIG_DMI
+static struct i801_mux_config i801_mux_config_asus_z8_d12 = {
+	.gpio_chip = "gpio_ich",
+	.values = { 0x02, 0x03 },
+	.n_values = 2,
+	.classes = { I2C_CLASS_SPD, I2C_CLASS_SPD },
+	.gpios = { 52, 53 },
+	.n_gpios = 2,
+};
+
+static struct i801_mux_config i801_mux_config_asus_z8_d18 = {
+	.gpio_chip = "gpio_ich",
+	.values = { 0x02, 0x03, 0x01 },
+	.n_values = 3,
+	.classes = { I2C_CLASS_SPD, I2C_CLASS_SPD, I2C_CLASS_SPD },
+	.gpios = { 52, 53 },
+	.n_gpios = 2,
+};
+
+static const struct dmi_system_id mux_dmi_table[] = {
+	{
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "Z8NA-D6(C)"),
+		},
+		.driver_data = &i801_mux_config_asus_z8_d12,
+	},
+	{
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "Z8P(N)E-D12(X)"),
+		},
+		.driver_data = &i801_mux_config_asus_z8_d12,
+	},
+	{
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "Z8NH-D12"),
+		},
+		.driver_data = &i801_mux_config_asus_z8_d12,
+	},
+	{
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "Z8PH-D12/IFB"),
+		},
+		.driver_data = &i801_mux_config_asus_z8_d12,
+	},
+	{
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "Z8NR-D12"),
+		},
+		.driver_data = &i801_mux_config_asus_z8_d12,
+	},
+	{
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "Z8P(N)H-D12"),
+		},
+		.driver_data = &i801_mux_config_asus_z8_d12,
+	},
+	{
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "Z8PG-D18"),
+		},
+		.driver_data = &i801_mux_config_asus_z8_d18,
+	},
+	{
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "Z8PE-D18"),
+		},
+		.driver_data = &i801_mux_config_asus_z8_d18,
+	},
+	{
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
+			DMI_MATCH(DMI_BOARD_NAME, "Z8PS-D12"),
+		},
+		.driver_data = &i801_mux_config_asus_z8_d12,
+	},
+	{ }
+};
+
+/* Setup multiplexing if needed */
+static int i801_add_mux(struct i801_priv *priv)
+{
+	struct device *dev = &priv->adapter.dev;
+	const struct i801_mux_config *mux_config;
+	struct i2c_mux_gpio_platform_data gpio_data;
+	struct gpiod_lookup_table *lookup;
+	int err, i;
+
+	if (!priv->mux_drvdata)
+		return 0;
+	mux_config = priv->mux_drvdata;
+
+	/* Prepare the platform data */
+	mem_clear(&gpio_data, sizeof(struct i2c_mux_gpio_platform_data));
+	gpio_data.parent = priv->adapter.nr;
+	gpio_data.values = mux_config->values;
+	gpio_data.n_values = mux_config->n_values;
+	gpio_data.classes = mux_config->classes;
+	gpio_data.idle = I2C_MUX_GPIO_NO_IDLE;
+
+	/* Register GPIO descriptor lookup table */
+	lookup = devm_kzalloc(dev,
+			      struct_size(lookup, table, mux_config->n_gpios + 1),
+			      GFP_KERNEL);
+	if (!lookup)
+		return -ENOMEM;
+	lookup->dev_id = "i2c-mux-gpio";
+	for (i = 0; i < mux_config->n_gpios; i++) {
+		lookup->table[i] = (struct gpiod_lookup)
+			GPIO_LOOKUP(mux_config->gpio_chip,
+				    mux_config->gpios[i], "mux", 0);
+	}
+	gpiod_add_lookup_table(lookup);
+	priv->lookup = lookup;
+
+	/*
+	 * Register the mux device, we use PLATFORM_DEVID_NONE here
+	 * because since we are referring to the GPIO chip by name we are
+	 * anyways in deep trouble if there is more than one of these
+	 * devices, and there should likely only be one platform controller
+	 * hub.
+	 */
+	priv->mux_pdev = platform_device_register_data(dev, "i2c-mux-gpio",
+				PLATFORM_DEVID_NONE, &gpio_data,
+				sizeof(struct i2c_mux_gpio_platform_data));
+	if (IS_ERR(priv->mux_pdev)) {
+		err = PTR_ERR(priv->mux_pdev);
+		gpiod_remove_lookup_table(lookup);
+		priv->mux_pdev = NULL;
+		dev_err(dev, "Failed to register i2c-mux-gpio device\n");
+		return err;
+	}
+
+	return 0;
+}
+
+static void i801_del_mux(struct i801_priv *priv)
+{
+	if (priv->mux_pdev)
+		platform_device_unregister(priv->mux_pdev);
+	if (priv->lookup)
+		gpiod_remove_lookup_table(priv->lookup);
+}
+
+static unsigned int i801_get_adapter_class(struct i801_priv *priv)
+{
+	const struct dmi_system_id *id;
+	const struct i801_mux_config *mux_config;
+	unsigned int class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
+	int i;
+
+	id = dmi_first_match(mux_dmi_table);
+	if (id) {
+		/* Remove branch classes from trunk */
+		mux_config = id->driver_data;
+		for (i = 0; i < mux_config->n_values; i++)
+			class &= ~mux_config->classes[i];
+
+		/* Remember for later */
+		priv->mux_drvdata = mux_config;
+	}
+
+	return class;
+}
+#else
+static inline int i801_add_mux(struct i801_priv *priv) { return 0; }
+static inline void i801_del_mux(struct i801_priv *priv) { }
+
+static inline unsigned int i801_get_adapter_class(struct i801_priv *priv)
+{
+	return I2C_CLASS_HWMON | I2C_CLASS_SPD;
+}
+#endif
+
+static const struct itco_wdt_platform_data spt_tco_platform_data = {
+	.name = "Intel PCH",
+	.version = 4,
+};
+
+static DEFINE_SPINLOCK(p2sb_spinlock);
+
+static struct platform_device *
+i801_add_tco_spt(struct i801_priv *priv, struct pci_dev *pci_dev,
+		 struct resource *tco_res)
+{
+	struct resource *res;
+	unsigned int devfn;
+	u64 base64_addr;
+	u32 base_addr;
+	u8 hidden;
+
+	/*
+	 * We must access the NO_REBOOT bit over the Primary to Sideband
+	 * bridge (P2SB). The BIOS prevents the P2SB device from being
+	 * enumerated by the PCI subsystem, so we need to unhide/hide it
+	 * to lookup the P2SB BAR.
+	 */
+	spin_lock(&p2sb_spinlock);
+
+	devfn = PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 1);
+
+	/* Unhide the P2SB device, if it is hidden */
+	pci_bus_read_config_byte(pci_dev->bus, devfn, 0xe1, &hidden);
+	if (hidden)
+		pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, 0x0);
+
+	pci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR, &base_addr);
+	base64_addr = base_addr & 0xfffffff0;
+
+	pci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR + 0x4, &base_addr);
+	base64_addr |= (u64)base_addr << 32;
+
+	/* Hide the P2SB device, if it was hidden before */
+	if (hidden)
+		pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, hidden);
+	spin_unlock(&p2sb_spinlock);
+
+	res = &tco_res[1];
+	if (pci_dev->device == PCI_DEVICE_ID_INTEL_DNV_SMBUS)
+		res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL_DNV;
+	else
+		res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL;
+
+	res->end = res->start + 3;
+	res->flags = IORESOURCE_MEM;
+
+	return platform_device_register_resndata(&pci_dev->dev, "iTCO_wdt", -1,
+					tco_res, 2, &spt_tco_platform_data,
+					sizeof(spt_tco_platform_data));
+}
+
+static const struct itco_wdt_platform_data cnl_tco_platform_data = {
+	.name = "Intel PCH",
+	.version = 6,
+};
+
+static struct platform_device *
+i801_add_tco_cnl(struct i801_priv *priv, struct pci_dev *pci_dev,
+		 struct resource *tco_res)
+{
+	return platform_device_register_resndata(&pci_dev->dev,
+			"iTCO_wdt", -1, tco_res, 1, &cnl_tco_platform_data,
+			sizeof(cnl_tco_platform_data));
+}
+
+static void i801_add_tco(struct i801_priv *priv)
+{
+	struct pci_dev *pci_dev = priv->pci_dev;
+	struct resource tco_res[2], *res;
+	u32 tco_base, tco_ctl;
+
+	/* If we have ACPI based watchdog use that instead */
+	if (acpi_has_watchdog())
+		return;
+
+	if (!(priv->features & (FEATURE_TCO_SPT | FEATURE_TCO_CNL)))
+		return;
+
+	pci_read_config_dword(pci_dev, TCOBASE, &tco_base);
+	pci_read_config_dword(pci_dev, TCOCTL, &tco_ctl);
+	if (!(tco_ctl & TCOCTL_EN))
+		return;
+
+	mem_clear(tco_res, sizeof(tco_res));
+	/*
+	 * Always populate the main iTCO IO resource here. The second entry
+	 * for NO_REBOOT MMIO is filled by the SPT specific function.
+	 */
+	res = &tco_res[0];
+	res->start = tco_base & ~1;
+	res->end = res->start + 32 - 1;
+	res->flags = IORESOURCE_IO;
+
+	if (priv->features & FEATURE_TCO_CNL)
+		priv->tco_pdev = i801_add_tco_cnl(priv, pci_dev, tco_res);
+	else
+		priv->tco_pdev = i801_add_tco_spt(priv, pci_dev, tco_res);
+
+	if (IS_ERR(priv->tco_pdev))
+		dev_warn(&pci_dev->dev, "failed to create iTCO device\n");
+}
+
+#ifdef CONFIG_ACPI
+static bool i801_acpi_is_smbus_ioport(const struct i801_priv *priv,
+				      acpi_physical_address address)
+{
+	return address >= priv->smba &&
+	       address <= pci_resource_end(priv->pci_dev, SMBBAR);
+}
+
+static acpi_status
+i801_acpi_io_handler(u32 function, acpi_physical_address address, u32 bits,
+		     u64 *value, void *handler_context, void *region_context)
+{
+	struct i801_priv *priv = handler_context;
+	struct pci_dev *pdev = priv->pci_dev;
+	acpi_status status;
+
+	/*
+	 * Once BIOS AML code touches the OpRegion we warn and inhibit any
+	 * further access from the driver itself. This device is now owned
+	 * by the system firmware.
+	 */
+	mutex_lock(&priv->acpi_lock);
+
+	if (!priv->acpi_reserved && i801_acpi_is_smbus_ioport(priv, address)) {
+		priv->acpi_reserved = true;
+
+		dev_warn(&pdev->dev, "BIOS is accessing SMBus registers\n");
+		dev_warn(&pdev->dev, "Driver SMBus register access inhibited\n");
+
+		/*
+		 * BIOS is accessing the host controller so prevent it from
+		 * suspending automatically from now on.
+		 */
+		pm_runtime_get_sync(&pdev->dev);
+	}
+
+	if ((function & ACPI_IO_MASK) == ACPI_READ)
+		status = acpi_os_read_port(address, (u32 *)value, bits);
+	else
+		status = acpi_os_write_port(address, (u32)*value, bits);
+
+	mutex_unlock(&priv->acpi_lock);
+
+	return status;
+}
+
+static int i801_acpi_probe(struct i801_priv *priv)
+{
+	struct acpi_device *adev;
+	acpi_status status;
+
+	adev = ACPI_COMPANION(&priv->pci_dev->dev);
+	if (adev) {
+		status = acpi_install_address_space_handler(adev->handle,
+				ACPI_ADR_SPACE_SYSTEM_IO, i801_acpi_io_handler,
+				NULL, priv);
+		if (ACPI_SUCCESS(status))
+			return 0;
+	}
+
+	return acpi_check_resource_conflict(&priv->pci_dev->resource[SMBBAR]);
+}
+
+static void i801_acpi_remove(struct i801_priv *priv)
+{
+	struct acpi_device *adev;
+
+	adev = ACPI_COMPANION(&priv->pci_dev->dev);
+	if (!adev)
+		return;
+
+	acpi_remove_address_space_handler(adev->handle,
+		ACPI_ADR_SPACE_SYSTEM_IO, i801_acpi_io_handler);
+
+	mutex_lock(&priv->acpi_lock);
+	if (priv->acpi_reserved)
+		pm_runtime_put(&priv->pci_dev->dev);
+	mutex_unlock(&priv->acpi_lock);
+}
+#else
+static inline int i801_acpi_probe(struct i801_priv *priv) { return 0; }
+static inline void i801_acpi_remove(struct i801_priv *priv) { }
+#endif
+
+static unsigned char i801_setup_hstcfg(struct i801_priv *priv)
+{
+	unsigned char hstcfg = priv->original_hstcfg;
+
+	hstcfg &= ~SMBHSTCFG_I2C_EN;	/* SMBus timing */
+	hstcfg |= SMBHSTCFG_HST_EN;
+	pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hstcfg);
+	return hstcfg;
+}
+
+static int i801_probe(struct pci_dev *dev, const struct pci_device_id *id)
+{
+	unsigned char temp;
+	int err, i;
+	struct i801_priv *priv;
+
+	priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	i2c_set_adapdata(&priv->adapter, priv);
+	priv->adapter.owner = THIS_MODULE;
+	priv->adapter.class = i801_get_adapter_class(priv);
+	priv->adapter.algo = &smbus_algorithm;
+	priv->adapter.dev.parent = &dev->dev;
+	ACPI_COMPANION_SET(&priv->adapter.dev, ACPI_COMPANION(&dev->dev));
+	priv->adapter.retries = 3;
+	mutex_init(&priv->acpi_lock);
+
+	priv->pci_dev = dev;
+	switch (dev->device) {
+	case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_SMBUS:
+	case PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_SMBUS:
+	case PCI_DEVICE_ID_INTEL_LEWISBURG_SMBUS:
+	case PCI_DEVICE_ID_INTEL_LEWISBURG_SSKU_SMBUS:
+	case PCI_DEVICE_ID_INTEL_DNV_SMBUS:
+	case PCI_DEVICE_ID_INTEL_KABYLAKE_PCH_H_SMBUS:
+	case PCI_DEVICE_ID_INTEL_COMETLAKE_V_SMBUS:
+		priv->features |= FEATURE_BLOCK_PROC;
+		priv->features |= FEATURE_I2C_BLOCK_READ;
+		priv->features |= FEATURE_IRQ;
+		priv->features |= FEATURE_SMBUS_PEC;
+		priv->features |= FEATURE_BLOCK_BUFFER;
+		priv->features |= FEATURE_TCO_SPT;
+		priv->features |= FEATURE_HOST_NOTIFY;
+		break;
+
+	case PCI_DEVICE_ID_INTEL_CANNONLAKE_H_SMBUS:
+	case PCI_DEVICE_ID_INTEL_CANNONLAKE_LP_SMBUS:
+	case PCI_DEVICE_ID_INTEL_CDF_SMBUS:
+	case PCI_DEVICE_ID_INTEL_ICELAKE_LP_SMBUS:
+	case PCI_DEVICE_ID_INTEL_COMETLAKE_SMBUS:
+	case PCI_DEVICE_ID_INTEL_COMETLAKE_H_SMBUS:
+	case PCI_DEVICE_ID_INTEL_ELKHART_LAKE_SMBUS:
+	case PCI_DEVICE_ID_INTEL_TIGERLAKE_LP_SMBUS:
+	case PCI_DEVICE_ID_INTEL_TIGERLAKE_H_SMBUS:
+	case PCI_DEVICE_ID_INTEL_JASPER_LAKE_SMBUS:
+	case PCI_DEVICE_ID_INTEL_EBG_SMBUS:
+	case PCI_DEVICE_ID_INTEL_ALDER_LAKE_S_SMBUS:
+		priv->features |= FEATURE_BLOCK_PROC;
+		priv->features |= FEATURE_I2C_BLOCK_READ;
+		priv->features |= FEATURE_IRQ;
+		priv->features |= FEATURE_SMBUS_PEC;
+		priv->features |= FEATURE_BLOCK_BUFFER;
+		priv->features |= FEATURE_TCO_CNL;
+		priv->features |= FEATURE_HOST_NOTIFY;
+		break;
+
+	case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF0:
+	case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF1:
+	case PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS_IDF2:
+	case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS0:
+	case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS1:
+	case PCI_DEVICE_ID_INTEL_WELLSBURG_SMBUS_MS2:
+		priv->features |= FEATURE_IDF;
+		fallthrough;
+	default:
+		priv->features |= FEATURE_BLOCK_PROC;
+		priv->features |= FEATURE_I2C_BLOCK_READ;
+		priv->features |= FEATURE_IRQ;
+		fallthrough;
+	case PCI_DEVICE_ID_INTEL_82801DB_3:
+		priv->features |= FEATURE_SMBUS_PEC;
+		priv->features |= FEATURE_BLOCK_BUFFER;
+		fallthrough;
+	case PCI_DEVICE_ID_INTEL_82801CA_3:
+		priv->features |= FEATURE_HOST_NOTIFY;
+		fallthrough;
+	case PCI_DEVICE_ID_INTEL_82801BA_2:
+	case PCI_DEVICE_ID_INTEL_82801AB_3:
+	case PCI_DEVICE_ID_INTEL_82801AA_3:
+		break;
+	}
+
+	/* Disable features on user request */
+	for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) {
+		if (priv->features & disable_features & (1 << i))
+			dev_notice(&dev->dev, "%s disabled by user\n",
+				   i801_feature_names[i]);
+	}
+	priv->features &= ~disable_features;
+
+	err = pcim_enable_device(dev);
+	if (err) {
+		dev_err(&dev->dev, "Failed to enable SMBus PCI device (%d)\n",
+			err);
+		return err;
+	}
+	pcim_pin_device(dev);
+
+	/* Determine the address of the SMBus area */
+	priv->smba = pci_resource_start(dev, SMBBAR);
+	if (!priv->smba) {
+		dev_err(&dev->dev,
+			"SMBus base address uninitialized, upgrade BIOS\n");
+		return -ENODEV;
+	}
+
+	if (i801_acpi_probe(priv))
+		return -ENODEV;
+
+	err = pcim_iomap_regions(dev, 1 << SMBBAR,
+				 dev_driver_string(&dev->dev));
+	if (err) {
+		dev_err(&dev->dev,
+			"Failed to request SMBus region 0x%lx-0x%Lx\n",
+			priv->smba,
+			(unsigned long long)pci_resource_end(dev, SMBBAR));
+		i801_acpi_remove(priv);
+		return err;
+	}
+
+	pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &priv->original_hstcfg);
+	temp = i801_setup_hstcfg(priv);
+	if (!(priv->original_hstcfg & SMBHSTCFG_HST_EN))
+		dev_info(&dev->dev, "Enabling SMBus device\n");
+
+	if (temp & SMBHSTCFG_SMB_SMI_EN) {
+		dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n");
+		/* Disable SMBus interrupt feature if SMBus using SMI# */
+		priv->features &= ~FEATURE_IRQ;
+	}
+	if (temp & SMBHSTCFG_SPD_WD)
+		dev_info(&dev->dev, "SPD Write Disable is set\n");
+
+	/* Clear special mode bits */
+	if (priv->features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER))
+		outb_p(inb_p(SMBAUXCTL(priv)) &
+		       ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
+
+	/* Remember original Host Notify setting */
+	if (priv->features & FEATURE_HOST_NOTIFY)
+		priv->original_slvcmd = inb_p(SMBSLVCMD(priv));
+
+	/* Default timeout in interrupt mode: 200 ms */
+	priv->adapter.timeout = HZ / 5;
+
+	if (dev->irq == IRQ_NOTCONNECTED)
+		priv->features &= ~FEATURE_IRQ;
+
+	if (priv->features & FEATURE_IRQ) {
+		u16 pcictl, pcists;
+
+		/* Complain if an interrupt is already pending */
+		pci_read_config_word(priv->pci_dev, SMBPCISTS, &pcists);
+		if (pcists & SMBPCISTS_INTS)
+			dev_warn(&dev->dev, "An interrupt is pending!\n");
+
+		/* Check if interrupts have been disabled */
+		pci_read_config_word(priv->pci_dev, SMBPCICTL, &pcictl);
+		if (pcictl & SMBPCICTL_INTDIS) {
+			dev_info(&dev->dev, "Interrupts are disabled\n");
+			priv->features &= ~FEATURE_IRQ;
+		}
+	}
+
+	if (priv->features & FEATURE_IRQ) {
+		init_waitqueue_head(&priv->waitq);
+
+		err = devm_request_irq(&dev->dev, dev->irq, i801_isr,
+				       IRQF_SHARED,
+				       dev_driver_string(&dev->dev), priv);
+		if (err) {
+			dev_err(&dev->dev, "Failed to allocate irq %d: %d\n",
+				dev->irq, err);
+			priv->features &= ~FEATURE_IRQ;
+		}
+	}
+	dev_info(&dev->dev, "SMBus using %s\n",
+		 priv->features & FEATURE_IRQ ? "PCI interrupt" : "polling");
+
+	i801_add_tco(priv);
+
+	snprintf(priv->adapter.name, sizeof(priv->adapter.name),
+		"SMBus I801 adapter at %04lx", priv->smba);
+	err = i2c_add_adapter(&priv->adapter);
+	if (err) {
+		i801_acpi_remove(priv);
+		return err;
+	}
+
+	i801_enable_host_notify(&priv->adapter);
+
+	i801_probe_optional_slaves(priv);
+	/* We ignore errors - multiplexing is optional */
+	i801_add_mux(priv);
+
+	pci_set_drvdata(dev, priv);
+
+	dev_pm_set_driver_flags(&dev->dev, DPM_FLAG_NO_DIRECT_COMPLETE);
+	pm_runtime_set_autosuspend_delay(&dev->dev, 1000);
+	pm_runtime_use_autosuspend(&dev->dev);
+	pm_runtime_put_autosuspend(&dev->dev);
+	pm_runtime_allow(&dev->dev);
+	dev_info(&dev->dev, "wb-i2c-i801 probe ok.\n");
+
+	return 0;
+}
+
+static void i801_remove(struct pci_dev *dev)
+{
+	struct i801_priv *priv = pci_get_drvdata(dev);
+
+	pm_runtime_forbid(&dev->dev);
+	pm_runtime_get_noresume(&dev->dev);
+
+	i801_disable_host_notify(priv);
+	i801_del_mux(priv);
+	i2c_del_adapter(&priv->adapter);
+	i801_acpi_remove(priv);
+	pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
+
+	platform_device_unregister(priv->tco_pdev);
+
+	/*
+	 * do not call pci_disable_device(dev) since it can cause hard hangs on
+	 * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010)
+	 */
+}
+
+static void i801_shutdown(struct pci_dev *dev)
+{
+	struct i801_priv *priv = pci_get_drvdata(dev);
+
+	/* Restore config registers to avoid hard hang on some systems */
+	i801_disable_host_notify(priv);
+	pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int i801_suspend(struct device *dev)
+{
+	struct i801_priv *priv = dev_get_drvdata(dev);
+
+	pci_write_config_byte(priv->pci_dev, SMBHSTCFG, priv->original_hstcfg);
+	return 0;
+}
+
+static int i801_resume(struct device *dev)
+{
+	struct i801_priv *priv = dev_get_drvdata(dev);
+
+	i801_setup_hstcfg(priv);
+	i801_enable_host_notify(&priv->adapter);
+
+	return 0;
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(i801_pm_ops, i801_suspend, i801_resume);
+
+static struct pci_driver i801_driver = {
+	.name		= "wb_i801_smbus",
+	.id_table	= i801_ids,
+	.probe		= i801_probe,
+	.remove		= i801_remove,
+	.shutdown	= i801_shutdown,
+	.driver		= {
+		.pm	= &i801_pm_ops,
+	},
+};
+
+static int __init i2c_i801_init(void)
+{
+	if (dmi_name_in_vendors("FUJITSU"))
+		input_apanel_init();
+	return pci_register_driver(&i801_driver);
+}
+
+static void __exit i2c_i801_exit(void)
+{
+	pci_unregister_driver(&i801_driver);
+}
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("I801 SMBus driver");
+MODULE_LICENSE("GPL");
+
+module_init(i2c_i801_init);
+module_exit(i2c_i801_exit);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.c
new file mode 100644
index 000000000000..db873b7fcc55
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.c
@@ -0,0 +1,1332 @@
+/*
+ * I2C multiplexer
+ *
+ * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
+ * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
+ *
+ * This module supports the PCA954x series of I2C multiplexer/switch chips
+ * made by Philips Semiconductors.
+ * This includes the:
+ *     PCA9540, PCA9542, PCA9543, PCA9544, PCA9545, PCA9546, PCA9547
+ *     and PCA9548.
+ *
+ * These chips are all controlled via the I2C bus itself, and all have a
+ * single 8-bit register. The upstream "parent" bus fans out to two,
+ * four, or eight downstream busses or channels; which of these
+ * are selected is determined by the chip type and register contents. A
+ * mux can select only one sub-bus at a time; a switch can select any
+ * combination simultaneously.
+ *
+ * Based on:
+ *    pca954x.c from Kumar Gala <galak@kernel.crashing.org>
+ * Copyright (C) 2006
+ *
+ * Based on:
+ *    pca954x.c from Ken Harrenstien
+ * Copyright (C) 2004 Google, Inc. (Ken Harrenstien)
+ *
+ * Based on:
+ *    i2c-virtual_cb.c from Brian Kuschak <bkuschak@yahoo.com>
+ * and
+ *    pca9540.c from Jean Delvare <jdelvare@suse.de>.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/version.h>
+#include <linux/device.h>
+#include <linux/gpio/consumer.h>
+#include <linux/i2c.h>
+#include <linux/i2c-mux.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_irq.h>
+#include <linux/pm.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/i2c-smbus.h>
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+
+#include "wb_i2c_mux_pca954x.h"
+
+#define PCA954X_MAX_NCHANS 8
+#define PCA954X_IRQ_OFFSET 4
+
+#define I2C_RETRY_TIMES         5
+#define I2C_RETRY_WAIT_TIMES    10      /*delay 10ms*/
+
+typedef struct pca9548_cfg_info_s {
+    uint32_t pca9548_base_nr;
+    uint32_t pca9548_reset_type;
+    uint32_t rst_delay_b; /* delay time before reset(us) */
+    uint32_t rst_delay;   /* reset time(us) */
+    uint32_t rst_delay_a; /* delay time after reset(us) */
+    union {
+        i2c_attr_t i2c_attr;
+        gpio_attr_t gpio_attr;
+        io_attr_t io_attr;
+        file_attr_t file_attr;
+    } attr;
+    bool select_chan_check;
+    bool close_chan_force_reset;
+} pca9548_cfg_info_t;
+
+int g_pca954x_debug = 0;
+int g_pca954x_error = 0;
+
+module_param(g_pca954x_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_pca954x_error, int, S_IRUGO | S_IWUSR);
+
+#define PCA954X_DEBUG(fmt, args...) do {                                        \
+    if (g_pca954x_debug) { \
+        printk(KERN_INFO "[PCA95x][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define PCA954X_ERROR(fmt, args...) do {                                        \
+    if (g_pca954x_error) { \
+        printk(KERN_ERR "[PCA95x][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+extern int pca9641_setmuxflag(int nr, int flag);
+enum pca_type {
+    pca_9540,
+    pca_9542,
+    pca_9543,
+    pca_9544,
+    pca_9545,
+    pca_9546,
+    pca_9547,
+    pca_9548,
+};
+
+struct chip_desc {
+    u8 nchans;
+    u8 enable;    /* used for muxes only */
+    u8 has_irq;
+    enum muxtype {
+        pca954x_ismux = 0,
+        pca954x_isswi
+    } muxtype;
+};
+
+struct pca954x {
+    const struct chip_desc *chip;
+    u8 last_chan;        /* last register value */
+    u8 deselect;
+    struct i2c_client *client;
+    struct irq_domain *irq;
+    unsigned int irq_mask;
+    raw_spinlock_t lock;
+    pca9548_cfg_info_t pca9548_cfg_info; /* pca9548 reset cfg */
+};
+
+/* Provide specs for the PCA954x types we know about */
+static const struct chip_desc chips[] = {
+    [pca_9540] = {
+        .nchans = 2,
+        .enable = 0x4,
+        .muxtype = pca954x_ismux,
+    },
+    [pca_9542] = {
+        .nchans = 2,
+        .enable = 0x4,
+        .has_irq = 1,
+        .muxtype = pca954x_ismux,
+    },
+    [pca_9543] = {
+        .nchans = 2,
+        .has_irq = 1,
+        .muxtype = pca954x_isswi,
+    },
+    [pca_9544] = {
+        .nchans = 4,
+        .enable = 0x4,
+        .has_irq = 1,
+        .muxtype = pca954x_ismux,
+    },
+    [pca_9545] = {
+        .nchans = 4,
+        .has_irq = 1,
+        .muxtype = pca954x_isswi,
+    },
+    [pca_9546] = {
+        .nchans = 4,
+        .muxtype = pca954x_isswi,
+    },
+    [pca_9547] = {
+        .nchans = 8,
+        .enable = 0x8,
+        .muxtype = pca954x_ismux,
+    },
+    [pca_9548] = {
+        .nchans = 8,
+        .muxtype = pca954x_isswi,
+    },
+};
+
+static const struct i2c_device_id pca954x_id[] = {
+    { "wb_pca9540", pca_9540 },
+    { "wb_pca9542", pca_9542 },
+    { "wb_pca9543", pca_9543 },
+    { "wb_pca9544", pca_9544 },
+    { "wb_pca9545", pca_9545 },
+    { "wb_pca9546", pca_9546 },
+    { "wb_pca9547", pca_9547 },
+    { "wb_pca9548", pca_9548 },
+    { }
+};
+MODULE_DEVICE_TABLE(i2c, pca954x_id);
+
+#ifdef CONFIG_OF
+static const struct of_device_id pca954x_of_match[] = {
+    { .compatible = "nxp,wb_pca9540", .data = &chips[pca_9540] },
+    { .compatible = "nxp,wb_pca9542", .data = &chips[pca_9542] },
+    { .compatible = "nxp,wb_pca9543", .data = &chips[pca_9543] },
+    { .compatible = "nxp,wb_pca9544", .data = &chips[pca_9544] },
+    { .compatible = "nxp,wb_pca9545", .data = &chips[pca_9545] },
+    { .compatible = "nxp,wb_pca9546", .data = &chips[pca_9546] },
+    { .compatible = "nxp,wb_pca9547", .data = &chips[pca_9547] },
+    { .compatible = "nxp,wb_pca9548", .data = &chips[pca_9548] },
+    {}
+};
+MODULE_DEVICE_TABLE(of, pca954x_of_match);
+#endif
+
+/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer()
+   for this as they will try to lock adapter a second time */
+static int pca954x_reg_write(struct i2c_adapter *adap,
+                 struct i2c_client *client, u8 val)
+{
+    int ret = -ENODEV;
+
+    if (adap->algo->master_xfer) {
+        struct i2c_msg msg;
+        char buf[1];
+
+        msg.addr = client->addr;
+        msg.flags = 0;
+        msg.len = 1;
+        buf[0] = val;
+        msg.buf = buf;
+        ret = __i2c_transfer(adap, &msg, 1);
+
+        if (ret >= 0 && ret != 1)
+            ret = -EREMOTEIO;
+    } else {
+        union i2c_smbus_data data;
+        ret = adap->algo->smbus_xfer(adap, client->addr,
+                         client->flags,
+                         I2C_SMBUS_WRITE,
+                         val, I2C_SMBUS_BYTE, &data);
+    }
+    return ret;
+}
+
+static int pca954x_reg_read(struct i2c_adapter *adap,
+                 struct i2c_client *client, u8 *val)
+{
+    int ret = -ENODEV;
+    u8 tmp_val;
+
+    if (adap->algo->master_xfer) {
+        struct i2c_msg msg;
+
+        msg.addr = client->addr;
+        msg.flags = I2C_M_RD;
+        msg.len = 1;
+        msg.buf = &tmp_val;
+        ret = __i2c_transfer(adap, &msg, 1);
+
+        if (ret >= 0 && ret != 1) {
+            ret = -EREMOTEIO;
+        } else {
+            *val = tmp_val;
+        }
+    } else {
+        union i2c_smbus_data data;
+        ret = adap->algo->smbus_xfer(adap, client->addr,
+                         client->flags,
+                         I2C_SMBUS_READ,
+                         0, I2C_SMBUS_BYTE, &data);
+
+        if (!ret) {
+            tmp_val = data.byte;
+            *val = tmp_val;
+        }
+    }
+
+    return ret;
+}
+
+static int pca954x_setmuxflag(struct i2c_client *client, int flag)
+{
+    int ret;
+    struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent);
+
+    ret = pca9641_setmuxflag(adap->nr, flag);
+    return ret;
+}
+
+static int pca9548_gpio_init(gpio_attr_t *gpio_attr)
+{
+    int err;
+
+    if (gpio_attr->gpio_init) {
+        PCA954X_DEBUG("gpio%d already init, do nothing.\n", gpio_attr->gpio);
+        return 0;
+    }
+
+    PCA954X_DEBUG("gpio%d init.\n", gpio_attr->gpio);
+    err = gpio_request(gpio_attr->gpio, "pca9548_reset");
+    if (err) {
+        goto error;
+    }
+    err = gpio_direction_output(gpio_attr->gpio, gpio_attr->reset_off);
+    if (err) {
+        gpio_free(gpio_attr->gpio);
+        goto error;
+    }
+    gpio_attr->gpio_init = 1;
+    return 0;
+error:
+    PCA954X_ERROR("pca9548_gpio_init failed, ret:%d.\n", err);
+    return err;
+}
+
+static void pca9548_gpio_free(gpio_attr_t *gpio_attr)
+{
+    if (gpio_attr->gpio_init == 1) {
+        PCA954X_DEBUG("gpio%d release.\n", gpio_attr->gpio);
+        gpio_free(gpio_attr->gpio);
+        gpio_attr->gpio_init = 0;
+    }
+}
+
+static int pca954x_reset_file_read(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    filp = filp_open(path, O_RDONLY, 0);
+    if (IS_ERR(filp)) {
+        PCA954X_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    ret = kernel_read(filp, val, size, &tmp_pos);
+    if (ret < 0) {
+        PCA954X_ERROR("kernel_read failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int pca954x_reset_file_write(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    filp = filp_open(path, O_RDWR, 777);
+    if (IS_ERR(filp)) {
+        PCA954X_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    ret = kernel_write(filp, val, size, &tmp_pos);
+    if (ret < 0) {
+        PCA954X_ERROR("kernel_write failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    vfs_fsync(filp, 1);
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int pca954x_reset_i2c_read(uint32_t bus, uint32_t addr, uint32_t offset_addr,
+            unsigned char *buf, uint32_t size)
+{
+    struct file *fp;
+    struct i2c_client client;
+    char i2c_path[32];
+    int i ,j ;
+    int rv;
+
+    rv = 0;
+    mem_clear(i2c_path, sizeof(i2c_path));
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", bus);
+    fp = filp_open(i2c_path, O_RDWR, S_IRUSR | S_IWUSR);
+    if (IS_ERR(fp)) {
+        PCA954X_ERROR("i2c open fail.\n");
+        return -1;
+    }
+    memcpy(&client, fp->private_data, sizeof(struct i2c_client));
+    client.addr = addr;
+    for (j = 0 ;j < size ;j++) {
+        for (i = 0; i < I2C_RETRY_TIMES; i++) {
+            rv = i2c_smbus_read_byte_data(&client, (offset_addr + j));
+            if (rv < 0) {
+                PCA954X_ERROR("i2c read failed, try again.\n");
+                msleep(I2C_RETRY_WAIT_TIMES);
+                if (i >= (I2C_RETRY_TIMES - 1)) {
+                    goto out;
+                }
+                continue;
+          }
+          *(buf + j) = (unsigned char)rv;
+          break;
+        }
+    }
+out:
+    filp_close(fp, NULL);
+    return rv;
+}
+
+static int pca954x_reset_i2c_write(uint32_t bus, uint32_t dev_addr, uint32_t offset_addr,
+            uint8_t write_buf)
+{
+    struct file *fp;
+    struct i2c_client client;
+    char i2c_path[32];
+    int i;
+    int rv;
+
+    rv = 0;
+    mem_clear(i2c_path, sizeof(i2c_path));
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", bus);
+    fp = filp_open(i2c_path, O_RDWR, S_IRUSR | S_IWUSR);
+    if (IS_ERR(fp)) {
+        PCA954X_ERROR("i2c open fail.\n");
+        return -1;
+    }
+    memcpy(&client, fp->private_data, sizeof(struct i2c_client));
+    client.addr = dev_addr;
+    for (i = 0; i < I2C_RETRY_TIMES; i++) {
+        rv = i2c_smbus_write_byte_data(&client, offset_addr, write_buf);
+        if (rv < 0) {
+            PCA954X_ERROR("i2c write failed, try again.\n");
+            msleep(I2C_RETRY_WAIT_TIMES);
+            if (i >= (I2C_RETRY_TIMES - 1)) {
+                goto out;
+            }
+            continue;
+        }
+        break;
+    }
+out:
+    filp_close(fp, NULL);
+    return rv;
+}
+
+static int pca954x_do_file_reset(struct i2c_mux_core *muxc)
+{
+    int ret, timeout, err;
+    struct pca954x *data;
+    pca9548_cfg_info_t *reset_cfg;
+    file_attr_t *file_attr;
+    u8 val;
+    int udelay_cnt;
+
+    data = i2c_mux_priv(muxc);
+    reset_cfg = &data->pca9548_cfg_info;
+    file_attr = &reset_cfg->attr.file_attr;
+    ret = -1;
+
+    PCA954X_DEBUG("rst_delay_b:%u, rst_delay:%u, rst_delay_a:%u.\n",
+        reset_cfg->rst_delay_b, reset_cfg->rst_delay, reset_cfg->rst_delay_a);
+    PCA954X_DEBUG("dev_name:%s, offset:0x%x, mask:0x%x, on:0x%x, off:0x%x.\n",
+        file_attr->dev_name, file_attr->offset, file_attr->mask,
+        file_attr->reset_on, file_attr->reset_off);
+
+    if (reset_cfg->rst_delay_b) {
+        usleep_range(reset_cfg->rst_delay_b, reset_cfg->rst_delay_b + 1);
+    }
+
+    err = pca954x_reset_file_read(file_attr->dev_name, file_attr->offset, &val, sizeof(val));
+    if (err < 0) {
+        goto out;
+    }
+    val &= ~(file_attr->mask);
+    val |= file_attr->reset_on;
+    err = pca954x_reset_file_write(file_attr->dev_name, file_attr->offset, &val, sizeof(val));
+    if (err < 0) {
+        goto out;
+    }
+
+    if (reset_cfg->rst_delay) {
+        usleep_range(reset_cfg->rst_delay, reset_cfg->rst_delay + 1);
+    }
+
+    val &= ~(file_attr->mask);
+    val |= file_attr->reset_off;
+    err = pca954x_reset_file_write(file_attr->dev_name, file_attr->offset, &val, sizeof(val));
+    if (err < 0) {
+        goto out;
+    }
+
+    udelay_cnt = 0;
+    timeout = reset_cfg->rst_delay_a;
+    while (timeout > 0) {
+        usleep_range(1, 2);
+        err = pca954x_reset_file_read(file_attr->dev_name, file_attr->offset, &val, sizeof(val));
+        if (err < 0) {
+            goto out;
+        }
+        val &= (file_attr->mask);
+        if (val == file_attr->reset_off) {
+            ret = 0;
+            PCA954X_DEBUG("pca954x_do_file_reset success.\n");
+            break;
+        }
+        udelay_cnt++;
+        if ((udelay_cnt % 1000) == 0) {
+            /* 1MS schedule*/
+            schedule();
+        }
+        timeout--;
+    }
+    if (ret < 0) {
+        PCA954X_ERROR("pca954x_do_file_reset timeout.\n");
+    }
+out:
+    if (err < 0) {
+        PCA954X_ERROR("pca954x_do_file_reset file rd/wr failed, ret:%d.\n", err);
+    }
+
+    return ret;
+}
+
+static int pca954x_do_io_reset(struct i2c_mux_core *muxc)
+{
+    int ret, timeout;
+    struct pca954x *data;
+    pca9548_cfg_info_t *reset_cfg;
+    io_attr_t *io_attr;
+    u8 val;
+    int udelay_cnt;
+
+    data = i2c_mux_priv(muxc);
+    reset_cfg = &data->pca9548_cfg_info;
+    io_attr = &reset_cfg->attr.io_attr;
+
+    PCA954X_DEBUG("rst_delay_b:%u, rst_delay:%u, rst_delay_a:%u.\n",
+        reset_cfg->rst_delay_b, reset_cfg->rst_delay, reset_cfg->rst_delay_a);
+    PCA954X_DEBUG("io_addr:0x%x, mask:0x%x, on:0x%x, off:0x%x.\n",
+        io_attr->io_addr, io_attr->mask, io_attr->reset_on, io_attr->reset_off);
+
+    if (reset_cfg->rst_delay_b) {
+        usleep_range(reset_cfg->rst_delay_b, reset_cfg->rst_delay_b + 1);
+    }
+
+    val = inb(io_attr->io_addr);
+    val &= ~(io_attr->mask);
+    val |= io_attr->reset_on;
+    outb(val, io_attr->io_addr);
+
+    if (reset_cfg->rst_delay) {
+        usleep_range(reset_cfg->rst_delay, reset_cfg->rst_delay + 1);
+    }
+
+    val &= ~(io_attr->mask);
+    val |= io_attr->reset_off;
+    outb(val, io_attr->io_addr);
+
+    ret = -1;
+    udelay_cnt = 0;
+    timeout = reset_cfg->rst_delay_a;
+    while (timeout > 0) {
+        usleep_range(1, 2);
+        val = inb(io_attr->io_addr);
+        val &= (io_attr->mask);
+        if (val == io_attr->reset_off) {
+            ret = 0;
+            PCA954X_DEBUG("pca954x_do_io_reset success.\n");
+            break;
+        }
+        udelay_cnt++;
+        if ((udelay_cnt % 1000) == 0) {
+            /* 1MS schedule*/
+            schedule();
+        }
+        timeout--;
+    }
+
+    if (ret < 0) {
+        PCA954X_ERROR("pca954x_do_io_reset timeout.\n");
+    }
+
+    return ret;
+}
+
+static int pca954x_do_gpio_reset(struct i2c_mux_core *muxc)
+{
+    int ret, timeout;
+    struct pca954x *data;
+    pca9548_cfg_info_t *reset_cfg;
+    gpio_attr_t *gpio_attr;
+    u8 val;
+    int udelay_cnt;
+
+    data = i2c_mux_priv(muxc);
+    reset_cfg = &data->pca9548_cfg_info;
+    gpio_attr = &reset_cfg->attr.gpio_attr;
+
+    ret = pca9548_gpio_init(gpio_attr);
+    if (ret) {
+        return -1;
+    }
+
+    if (reset_cfg->rst_delay_b) {
+        usleep_range(reset_cfg->rst_delay_b, reset_cfg->rst_delay_b + 1);
+    }
+
+    /* reset on */
+    __gpio_set_value(gpio_attr->gpio, gpio_attr->reset_on);
+
+    if (reset_cfg->rst_delay) {
+        usleep_range(reset_cfg->rst_delay, reset_cfg->rst_delay + 1);
+    }
+
+    /* reset off */
+    __gpio_set_value(gpio_attr->gpio, gpio_attr->reset_off);
+    ret = -1;
+    udelay_cnt = 0;
+    timeout = reset_cfg->rst_delay_a;
+    while (timeout > 0) {
+        usleep_range(1, 2);
+        val = __gpio_get_value(gpio_attr->gpio);
+        if (val == gpio_attr->reset_off) {
+            ret = 0;
+            PCA954X_DEBUG("pca954x_do_gpio_reset success.\n");
+            break;
+        }
+        udelay_cnt++;
+        if ((udelay_cnt % 1000) == 0) {
+            /* 1MS schedule*/
+            schedule();
+        }
+        timeout--;
+    }
+
+    if (ret < 0) {
+        PCA954X_ERROR("pca954x_do_gpio_reset timeout.\n");
+    }
+
+    pca9548_gpio_free(gpio_attr);
+    return ret;
+}
+
+static int pca954x_do_i2c_reset(struct i2c_mux_core *muxc)
+{
+    int ret, timeout, err;
+    struct pca954x *data;
+    pca9548_cfg_info_t *reset_cfg;
+    i2c_attr_t *i2c_attr;
+    u8 val;
+    int udelay_cnt;
+
+    data = i2c_mux_priv(muxc);
+    reset_cfg = &data->pca9548_cfg_info;
+    i2c_attr = &reset_cfg->attr.i2c_attr;
+    ret = -1;
+
+    PCA954X_DEBUG("rst_delay_b:%u, rst_delay:%u, rst_delay_a:%u.\n",
+        reset_cfg->rst_delay_b, reset_cfg->rst_delay, reset_cfg->rst_delay_a);
+    PCA954X_DEBUG("bus:0x%x, addr:0x%x, reg:0x%x, mask:0x%x, on:0x%x, off:0x%x.\n",
+        i2c_attr->i2c_bus, i2c_attr->i2c_addr, i2c_attr->reg_offset,
+        i2c_attr->mask, i2c_attr->reset_on, i2c_attr->reset_off);
+
+    if (reset_cfg->rst_delay_b) {
+        usleep_range(reset_cfg->rst_delay_b, reset_cfg->rst_delay_b + 1);
+    }
+
+    err = pca954x_reset_i2c_read(i2c_attr->i2c_bus, i2c_attr->i2c_addr,
+              i2c_attr->reg_offset, &val, sizeof(val));
+    if (err < 0) {
+        goto out;
+    }
+    val &= ~(i2c_attr->mask);
+    val |= i2c_attr->reset_on;
+    err = pca954x_reset_i2c_write(i2c_attr->i2c_bus, i2c_attr->i2c_addr,
+              i2c_attr->reg_offset, val);
+    if (err < 0) {
+        goto out;
+    }
+
+    if (reset_cfg->rst_delay) {
+        usleep_range(reset_cfg->rst_delay, reset_cfg->rst_delay + 1);
+    }
+
+    val &= ~(i2c_attr->mask);
+    val |= i2c_attr->reset_off;
+    err = pca954x_reset_i2c_write(i2c_attr->i2c_bus, i2c_attr->i2c_addr,
+              i2c_attr->reg_offset, val);
+    if (err < 0) {
+        goto out;
+    }
+
+    udelay_cnt = 0;
+    timeout = reset_cfg->rst_delay_a;
+    while (timeout > 0) {
+        usleep_range(1, 2);
+        err = pca954x_reset_i2c_read(i2c_attr->i2c_bus, i2c_attr->i2c_addr,
+                  i2c_attr->reg_offset, &val, sizeof(val));
+        if (err < 0) {
+            goto out;
+        }
+        val &= (i2c_attr->mask);
+        if (val == i2c_attr->reset_off) {
+            ret = 0;
+            PCA954X_DEBUG("pca954x_do_i2c_reset success.\n");
+            break;
+        }
+        udelay_cnt++;
+        if ((udelay_cnt % 1000) == 0) {
+            /* 1MS schedule*/
+            schedule();
+        }
+        timeout--;
+    }
+    if (ret < 0) {
+        PCA954X_ERROR("pca954x_do_i2c_reset timeout.\n");
+    }
+out:
+    if (err < 0) {
+        PCA954X_ERROR("pca954x_do_i2c_reset i2c op failed, ret:%d.\n", err);
+    }
+    return ret;
+}
+
+static int pca954x_do_reset(struct i2c_mux_core *muxc)
+{
+    int ret;
+    struct pca954x *data;
+
+    data = i2c_mux_priv(muxc);
+    if (data->pca9548_cfg_info.pca9548_reset_type == PCA9548_RESET_NONE) {
+        ret = -1;
+        PCA954X_DEBUG("Don't need to reset.\n");
+    } else if (data->pca9548_cfg_info.pca9548_reset_type == PCA9548_RESET_I2C) {
+        ret = pca954x_do_i2c_reset(muxc);
+    } else if (data->pca9548_cfg_info.pca9548_reset_type == PCA9548_RESET_GPIO) {
+        ret = pca954x_do_gpio_reset(muxc);
+    } else if (data->pca9548_cfg_info.pca9548_reset_type == PCA9548_RESET_IO) {
+        ret = pca954x_do_io_reset(muxc);
+    } else if (data->pca9548_cfg_info.pca9548_reset_type == PCA9548_RESET_FILE) {
+        ret = pca954x_do_file_reset(muxc);
+    } else {
+        ret = -1;
+        PCA954X_ERROR("Unsupport reset type:0x%x.\n",
+            data->pca9548_cfg_info.pca9548_reset_type);
+    }
+
+    if (ret < 0) {
+        PCA954X_ERROR("pca9548_reset_ctrl failed, reset type:%u, ret:%d.\n",
+            data->pca9548_cfg_info.pca9548_reset_type, ret);
+    }
+    return ret;
+}
+
+static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan)
+{
+    struct pca954x *data = i2c_mux_priv(muxc);
+    struct i2c_client *client = data->client;
+    const struct chip_desc *chip = data->chip;
+    u8 regval;
+    int ret = 0;
+    u8 read_val = 0;
+    int rv;
+
+    /* we make switches look like muxes, not sure how to be smarter */
+    if (chip->muxtype == pca954x_ismux)
+        regval = chan | chip->enable;
+    else
+        regval = 1 << chan;
+
+    /* Only select the channel if its different from the last channel */
+    if (data->last_chan != regval) {
+        pca954x_setmuxflag(client, 0);
+        ret = pca954x_reg_write(muxc->parent, client, regval);
+        data->last_chan = ret < 0 ? 0 : regval;
+    }
+
+    if (data->pca9548_cfg_info.select_chan_check) { /* check chan */
+        ret = pca954x_reg_read(muxc->parent, client, &read_val);
+        /* read failed or chan not open, reset pca9548 */
+        if ((ret < 0) || (read_val != data->last_chan)) {
+            dev_warn(&client->dev, "pca954x open channle %u failed, do reset.\n", chan);
+            PCA954X_DEBUG("ret = %d, read_val = %d, last_chan = %d.\n", ret, read_val, data->last_chan);
+            rv = pca954x_do_reset(muxc);
+            if (rv >= 0) {
+                PCA954X_DEBUG("pca954x_do_reset success, rv = %d.\n", rv);
+            } else {
+                PCA954X_DEBUG("pca954x_do_reset failed, rv = %d.\n", rv);
+            }
+            if (ret >= 0) {
+                ret = -EIO; /* chan not match, return IO error */
+            }
+        }
+    }
+
+    return ret;
+}
+
+static int pca954x_deselect_mux(struct i2c_mux_core *muxc, u32 chan)
+{
+    struct pca954x *data = i2c_mux_priv(muxc);
+    struct i2c_client *client = data->client;
+    int ret, rv;
+
+    /* Deselect active channel */
+    data->last_chan = 0;
+    if (data->pca9548_cfg_info.close_chan_force_reset) {
+        ret = pca954x_do_reset(muxc);
+    } else {
+        ret = pca954x_reg_write(muxc->parent, client, data->last_chan);
+        if (ret < 0 ) {
+            dev_warn(&client->dev, "pca954x close channel %u failed, do reset.\n", chan);
+            rv = pca954x_do_reset(muxc);
+            if (rv == 0) {
+                ret = 0;
+            }
+        }
+    }
+
+    rv = pca954x_setmuxflag(client, 1);
+    if (rv == 0) {
+        PCA954X_DEBUG("match 9641, close 9548 channel to deselect 9641.\n");
+        (void)pca954x_reg_write(muxc->parent, client, data->last_chan);
+    } else {
+        PCA954X_DEBUG("dismatch 9641, do nothing.\n");
+    }
+    
+    return ret;
+
+}
+
+static irqreturn_t pca954x_irq_handler(int irq, void *dev_id)
+{
+    struct pca954x *data = dev_id;
+    unsigned int child_irq;
+    int ret, i, handled = 0;
+
+    ret = i2c_smbus_read_byte(data->client);
+    if (ret < 0)
+        return IRQ_NONE;
+
+    for (i = 0; i < data->chip->nchans; i++) {
+        if (ret & BIT(PCA954X_IRQ_OFFSET + i)) {
+            child_irq = irq_linear_revmap(data->irq, i);
+            handle_nested_irq(child_irq);
+            handled++;
+        }
+    }
+    return handled ? IRQ_HANDLED : IRQ_NONE;
+}
+
+static void pca954x_irq_mask(struct irq_data *idata)
+{
+    struct pca954x *data = irq_data_get_irq_chip_data(idata);
+    unsigned int pos = idata->hwirq;
+    unsigned long flags;
+
+    raw_spin_lock_irqsave(&data->lock, flags);
+
+    data->irq_mask &= ~BIT(pos);
+    if (!data->irq_mask)
+        disable_irq(data->client->irq);
+
+    raw_spin_unlock_irqrestore(&data->lock, flags);
+}
+
+static void pca954x_irq_unmask(struct irq_data *idata)
+{
+    struct pca954x *data = irq_data_get_irq_chip_data(idata);
+    unsigned int pos = idata->hwirq;
+    unsigned long flags;
+
+    raw_spin_lock_irqsave(&data->lock, flags);
+
+    if (!data->irq_mask)
+        enable_irq(data->client->irq);
+    data->irq_mask |= BIT(pos);
+
+    raw_spin_unlock_irqrestore(&data->lock, flags);
+}
+
+static int pca954x_irq_set_type(struct irq_data *idata, unsigned int type)
+{
+    if ((type & IRQ_TYPE_SENSE_MASK) != IRQ_TYPE_LEVEL_LOW)
+        return -EINVAL;
+    return 0;
+}
+
+static struct irq_chip pca954x_irq_chip = {
+    .name = "i2c-mux-pca954x",
+    .irq_mask = pca954x_irq_mask,
+    .irq_unmask = pca954x_irq_unmask,
+    .irq_set_type = pca954x_irq_set_type,
+};
+
+static int of_pca954x_irq_setup(struct i2c_mux_core *muxc)
+{
+    struct pca954x *data = i2c_mux_priv(muxc);
+    struct i2c_client *client = data->client;
+    int c, err, irq;
+
+    if (!data->chip->has_irq || client->irq <= 0)
+        return 0;
+
+    raw_spin_lock_init(&data->lock);
+
+    data->irq = irq_domain_add_linear(client->dev.of_node,
+                      data->chip->nchans,
+                      &irq_domain_simple_ops, data);
+    if (!data->irq)
+        return -ENODEV;
+
+    for (c = 0; c < data->chip->nchans; c++) {
+        irq = irq_create_mapping(data->irq, c);
+        irq_set_chip_data(irq, data);
+        irq_set_chip_and_handler(irq, &pca954x_irq_chip,
+            handle_simple_irq);
+    }
+
+    err = devm_request_threaded_irq(&client->dev, data->client->irq, NULL,
+                    pca954x_irq_handler,
+                    IRQF_ONESHOT | IRQF_SHARED,
+                    "pca954x", data);
+    if (err)
+        goto err_req_irq;
+
+    disable_irq(data->client->irq);
+
+    return 0;
+err_req_irq:
+    for (c = 0; c < data->chip->nchans; c++) {
+        irq = irq_find_mapping(data->irq, c);
+        irq_dispose_mapping(irq);
+    }
+    irq_domain_remove(data->irq);
+
+    return err;
+}
+
+static int pca954x_irq_setup(struct i2c_mux_core *muxc)
+{
+    return 0;
+}
+
+static int of_pca954x_reset_data_init(struct pca954x *data)
+{
+    int err;
+    struct device *dev = &data->client->dev;
+    pca9548_cfg_info_t *reset_cfg;
+
+    reset_cfg = &data->pca9548_cfg_info;
+    if (dev == NULL || dev->of_node == NULL) {
+        PCA954X_DEBUG("dev or dev->of_node is NUll, no reset.\n");
+        reset_cfg->pca9548_reset_type = PCA9548_RESET_NONE;
+        return 0;
+    }
+
+    reset_cfg->select_chan_check = of_property_read_bool(dev->of_node, "select_chan_check");
+    reset_cfg->close_chan_force_reset = of_property_read_bool(dev->of_node, "close_chan_force_reset");
+    PCA954X_DEBUG("select_chan_check:%d, close_chan_force_reset:%d.\n", reset_cfg->select_chan_check,
+        reset_cfg->close_chan_force_reset);
+
+    if (of_property_read_u32(dev->of_node, "pca9548_reset_type", &reset_cfg->pca9548_reset_type)) {
+
+        PCA954X_DEBUG("pca9548_reset_type not found, no reset.\n");
+        reset_cfg->pca9548_reset_type = PCA9548_RESET_NONE;
+        return 0;
+    }
+    err = of_property_read_u32(dev->of_node, "rst_delay_b", &reset_cfg->rst_delay_b);
+    err |= of_property_read_u32(dev->of_node, "rst_delay", &reset_cfg->rst_delay);
+    err |= of_property_read_u32(dev->of_node, "rst_delay_a", &reset_cfg->rst_delay_a);
+
+    if (err) {
+        goto dts_config_err;
+    }
+    PCA954X_DEBUG("reset_type:0x%x, rst_delay_b:0x%x, rst_delay:0x%x, rst_delay_a:0x%x.\n",
+        reset_cfg->pca9548_reset_type, reset_cfg->rst_delay_b,
+        reset_cfg->rst_delay, reset_cfg->rst_delay_a);
+
+    if (reset_cfg->pca9548_reset_type == PCA9548_RESET_I2C) {
+
+        PCA954X_DEBUG("reset by i2c.\n");
+        err = of_property_read_u32(dev->of_node, "i2c_bus", &reset_cfg->attr.i2c_attr.i2c_bus);
+        err |=of_property_read_u32(dev->of_node, "i2c_addr", &reset_cfg->attr.i2c_attr.i2c_addr);
+        err |=of_property_read_u32(dev->of_node, "reg_offset", &reset_cfg->attr.i2c_attr.reg_offset);
+        err |=of_property_read_u32(dev->of_node, "mask", &reset_cfg->attr.i2c_attr.mask);
+        err |=of_property_read_u32(dev->of_node, "reset_on", &reset_cfg->attr.i2c_attr.reset_on);
+        err |=of_property_read_u32(dev->of_node, "reset_off", &reset_cfg->attr.i2c_attr.reset_off);
+        if (err) {
+            goto dts_config_err;
+        }
+        PCA954X_DEBUG("bus:%u, addr:0x%x, offset:0x%x, mask:0x%x, on:0x%x, off:0x%x.\n",
+            reset_cfg->attr.i2c_attr.i2c_bus, reset_cfg->attr.i2c_attr.i2c_addr,
+            reset_cfg->attr.i2c_attr.reg_offset, reset_cfg->attr.i2c_attr.mask,
+            reset_cfg->attr.i2c_attr.reset_on, reset_cfg->attr.i2c_attr.reset_off);
+    } else if (reset_cfg->pca9548_reset_type == PCA9548_RESET_GPIO) {
+
+        PCA954X_DEBUG("reset by gpio.\n");
+        err = of_property_read_u32(dev->of_node, "gpio", &reset_cfg->attr.gpio_attr.gpio);
+        err |=of_property_read_u32(dev->of_node, "reset_on", &reset_cfg->attr.gpio_attr.reset_on);
+        err |=of_property_read_u32(dev->of_node, "reset_off", &reset_cfg->attr.gpio_attr.reset_off);
+        if (err) {
+            goto dts_config_err;
+        }
+        PCA954X_DEBUG("gpio number:%u, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.gpio_attr.gpio, reset_cfg->attr.gpio_attr.reset_on,
+            reset_cfg->attr.gpio_attr.reset_off);
+        reset_cfg->attr.gpio_attr.gpio_init = 0;
+    } else if (reset_cfg->pca9548_reset_type == PCA9548_RESET_IO) {
+
+        PCA954X_DEBUG("reset by io.\n");
+        err = of_property_read_u32(dev->of_node, "io_addr", &reset_cfg->attr.io_attr.io_addr);
+        err |=of_property_read_u32(dev->of_node, "mask", &reset_cfg->attr.io_attr.mask);
+        err |=of_property_read_u32(dev->of_node, "reset_on", &reset_cfg->attr.io_attr.reset_on);
+        err |=of_property_read_u32(dev->of_node, "reset_off", &reset_cfg->attr.io_attr.reset_off);
+        if (err) {
+            goto dts_config_err;
+        }
+        PCA954X_DEBUG("io_addr:0x%x, mask:0x%x, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.io_attr.io_addr, reset_cfg->attr.io_attr.mask,
+            reset_cfg->attr.io_attr.reset_on, reset_cfg->attr.io_attr.reset_off);
+    } else if (reset_cfg->pca9548_reset_type == PCA9548_RESET_FILE) {
+
+        PCA954X_DEBUG("reset by file.\n");
+        err = of_property_read_string(dev->of_node, "dev_name", &reset_cfg->attr.file_attr.dev_name);
+        err |=of_property_read_u32(dev->of_node, "offset", &reset_cfg->attr.file_attr.offset);
+        err |=of_property_read_u32(dev->of_node, "mask", &reset_cfg->attr.file_attr.mask);
+        err |=of_property_read_u32(dev->of_node, "reset_on", &reset_cfg->attr.file_attr.reset_on);
+        err |=of_property_read_u32(dev->of_node, "reset_off", &reset_cfg->attr.file_attr.reset_off);
+        if (err) {
+            goto dts_config_err;
+        }
+        PCA954X_DEBUG("dev_name:%s, mask:0x%x, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.file_attr.dev_name, reset_cfg->attr.file_attr.mask,
+            reset_cfg->attr.file_attr.reset_on, reset_cfg->attr.file_attr.reset_off);
+    } else {
+        PCA954X_ERROR("Unsupport reset type:%d.\n", reset_cfg->pca9548_reset_type);
+        goto dts_config_err;
+    }
+    return 0;
+dts_config_err:
+    PCA954X_ERROR("dts config error, ret:%d.\n", err);
+    return -EINVAL;
+}
+
+static int pca954x_reset_data_init(struct pca954x *data)
+{
+    pca9548_cfg_info_t *reset_cfg;
+    i2c_mux_pca954x_device_t *i2c_mux_pca954x_device;
+
+    if (data->client->dev.platform_data == NULL) {
+        PCA954X_DEBUG("pca954x has no reset platform data config.\n");
+        return 0;
+    }
+    reset_cfg = &data->pca9548_cfg_info;
+    i2c_mux_pca954x_device = data->client->dev.platform_data;
+    reset_cfg->select_chan_check = i2c_mux_pca954x_device->select_chan_check;
+    reset_cfg->close_chan_force_reset = i2c_mux_pca954x_device->close_chan_force_reset;
+    PCA954X_DEBUG("select_chan_check:%d, close_chan_force_reset:%d.\n", reset_cfg->select_chan_check,
+        reset_cfg->close_chan_force_reset);
+
+    reset_cfg->pca9548_reset_type = i2c_mux_pca954x_device->pca9548_reset_type;
+    if (reset_cfg->pca9548_reset_type == PCA9548_RESET_NONE) {
+        PCA954X_DEBUG("pca9548_reset_type not found, no reset.\n");
+        return 0;
+    }
+
+    reset_cfg->rst_delay_b = i2c_mux_pca954x_device->rst_delay_b;
+    reset_cfg->rst_delay = i2c_mux_pca954x_device->rst_delay;
+    reset_cfg->rst_delay_a = i2c_mux_pca954x_device->rst_delay_a;
+    PCA954X_DEBUG("reset_type:0x%x, rst_delay_b:0x%x, rst_delay:0x%x, rst_delay_a:0x%x.\n",
+        reset_cfg->pca9548_reset_type, reset_cfg->rst_delay_b,
+        reset_cfg->rst_delay, reset_cfg->rst_delay_a);
+
+    if (reset_cfg->pca9548_reset_type == PCA9548_RESET_I2C) {
+
+        PCA954X_DEBUG("reset by i2c.\n");
+        reset_cfg->attr.i2c_attr.i2c_bus = i2c_mux_pca954x_device->attr.i2c_attr.i2c_bus;
+        reset_cfg->attr.i2c_attr.i2c_addr = i2c_mux_pca954x_device->attr.i2c_attr.i2c_addr;
+        reset_cfg->attr.i2c_attr.reg_offset = i2c_mux_pca954x_device->attr.i2c_attr.reg_offset;
+        reset_cfg->attr.i2c_attr.mask = i2c_mux_pca954x_device->attr.i2c_attr.mask;
+        reset_cfg->attr.i2c_attr.reset_on = i2c_mux_pca954x_device->attr.i2c_attr.reset_on;
+        reset_cfg->attr.i2c_attr.reset_off = i2c_mux_pca954x_device->attr.i2c_attr.reset_off;
+        PCA954X_DEBUG("bus:%u, addr:0x%x, offset:0x%x, mask:0x%x, on:0x%x, off:0x%x.\n",
+            reset_cfg->attr.i2c_attr.i2c_bus, reset_cfg->attr.i2c_attr.i2c_addr,
+            reset_cfg->attr.i2c_attr.reg_offset, reset_cfg->attr.i2c_attr.mask,
+            reset_cfg->attr.i2c_attr.reset_on, reset_cfg->attr.i2c_attr.reset_off);
+    } else if (reset_cfg->pca9548_reset_type == PCA9548_RESET_GPIO) {
+
+        PCA954X_DEBUG("reset by gpio.\n");
+        reset_cfg->attr.gpio_attr.gpio = i2c_mux_pca954x_device->attr.gpio_attr.gpio;
+        reset_cfg->attr.gpio_attr.reset_on = i2c_mux_pca954x_device->attr.gpio_attr.reset_on;
+        reset_cfg->attr.gpio_attr.reset_off = i2c_mux_pca954x_device->attr.gpio_attr.reset_off;
+        PCA954X_DEBUG("gpio number:%u, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.gpio_attr.gpio, reset_cfg->attr.gpio_attr.reset_on,
+            reset_cfg->attr.gpio_attr.reset_off);
+        reset_cfg->attr.gpio_attr.gpio_init = 0;
+    } else if (reset_cfg->pca9548_reset_type == PCA9548_RESET_IO) {
+
+        PCA954X_DEBUG("reset by io.\n");
+        reset_cfg->attr.io_attr.io_addr = i2c_mux_pca954x_device->attr.io_attr.io_addr;
+        reset_cfg->attr.io_attr.mask = i2c_mux_pca954x_device->attr.io_attr.mask;
+        reset_cfg->attr.io_attr.reset_on = i2c_mux_pca954x_device->attr.io_attr.reset_on;
+        reset_cfg->attr.io_attr.reset_off = i2c_mux_pca954x_device->attr.io_attr.reset_off;
+        PCA954X_DEBUG("io_addr:0x%x, mask:0x%x, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.io_attr.io_addr, reset_cfg->attr.io_attr.mask,
+            reset_cfg->attr.io_attr.reset_on, reset_cfg->attr.io_attr.reset_off);
+    } else if (reset_cfg->pca9548_reset_type == PCA9548_RESET_FILE) {
+
+        reset_cfg->attr.file_attr.dev_name = i2c_mux_pca954x_device->attr.file_attr.dev_name;
+        reset_cfg->attr.file_attr.offset = i2c_mux_pca954x_device->attr.file_attr.offset;
+        reset_cfg->attr.file_attr.mask = i2c_mux_pca954x_device->attr.file_attr.mask;
+        reset_cfg->attr.file_attr.reset_on = i2c_mux_pca954x_device->attr.file_attr.reset_on;
+        reset_cfg->attr.file_attr.reset_off = i2c_mux_pca954x_device->attr.file_attr.reset_off;
+        PCA954X_DEBUG("dev_name:%s, mask:0x%x, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.file_attr.dev_name, reset_cfg->attr.file_attr.mask,
+            reset_cfg->attr.file_attr.reset_on, reset_cfg->attr.file_attr.reset_off);
+    } else {
+        PCA954X_ERROR("Unsupport reset type:%d.\n", reset_cfg->pca9548_reset_type);
+        return -EINVAL;
+    }
+    return 0;
+}
+
+/*
+ * I2C init/probing/exit functions
+ */
+static int pca954x_probe(struct i2c_client *client,
+             const struct i2c_device_id *id)
+{
+    struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent);
+    struct device_node *of_node = client->dev.of_node;
+    bool idle_disconnect_dt;
+    struct gpio_desc *gpio;
+    int num, force, class;
+    struct i2c_mux_core *muxc;
+    struct pca954x *data;
+    const struct of_device_id *match;
+    unsigned int probe_disable;
+    int ret, dynamic_nr;
+    i2c_mux_pca954x_device_t *i2c_mux_pca954x_device;
+
+    PCA954X_DEBUG("pca954x_probe, parent bus: %d, 9548 addr:0x%x.\n", adap->nr, client->addr);
+
+    if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE))
+        return -ENODEV;
+
+    muxc = i2c_mux_alloc(adap, &client->dev,
+                 PCA954X_MAX_NCHANS, sizeof(*data), 0,
+                 pca954x_select_chan, pca954x_deselect_mux);
+    if (!muxc)
+        return -ENOMEM;
+    data = i2c_mux_priv(muxc);
+
+    i2c_set_clientdata(client, muxc);
+    data->client = client;
+
+    /* Get the mux out of reset if a reset GPIO is specified. */
+    gpio = devm_gpiod_get_optional(&client->dev, "reset", GPIOD_OUT_LOW);
+    if (IS_ERR(gpio))
+        return PTR_ERR(gpio);
+
+    /* check device connection status */
+
+    if (client->dev.of_node == NULL) {
+        if (client->dev.platform_data == NULL) {
+            probe_disable = 1;
+            PCA954X_DEBUG("has no platform data config, set probe_disable = 1.\n");
+        } else {
+            i2c_mux_pca954x_device = client->dev.platform_data;
+            probe_disable = i2c_mux_pca954x_device->probe_disable;
+        }
+    } else {
+        probe_disable = of_property_read_bool(of_node, "probe_disable");
+    }
+
+    /* Write the mux register at addr to verify
+     * that the mux is in fact present. This also
+     * initializes the mux to disconnected state.
+     */
+    if (!probe_disable && (i2c_smbus_write_byte(client, 0) < 0)) {
+        dev_warn(&client->dev, "probe failed\n");
+        return -ENODEV;
+    }
+
+    match = of_match_device(of_match_ptr(pca954x_of_match), &client->dev);
+    if (match)
+        data->chip = of_device_get_match_data(&client->dev);
+    else
+        data->chip = &chips[id->driver_data];
+
+    data->last_chan = 0;           /* force the first selection */
+
+    if (client->dev.of_node == NULL) {
+        idle_disconnect_dt = false;
+    } else {
+        idle_disconnect_dt = of_node &&
+            of_property_read_bool(of_node, "i2c-mux-idle-disconnect");
+    }
+
+    if (client->dev.of_node) {
+        ret= of_pca954x_reset_data_init(data);
+    } else {
+        ret= pca954x_reset_data_init(data);
+    }
+    if (ret < 0) {
+        dev_err(&client->dev, "pca954x reset config err, ret:%d.\n", ret);
+        return ret;
+    }
+
+    if (client->dev.of_node) {
+        ret = of_pca954x_irq_setup(muxc);
+    } else {
+        ret = pca954x_irq_setup(muxc);
+    }
+    if (ret) {
+        goto fail_del_adapters;
+    }
+
+    if (client->dev.of_node == NULL) {
+        if (client->dev.platform_data == NULL) {
+            dynamic_nr = 1;
+            PCA954X_DEBUG("platform data is NULL, use dynamic adap number.\n");
+        } else {
+            i2c_mux_pca954x_device = client->dev.platform_data;
+            data->pca9548_cfg_info.pca9548_base_nr = i2c_mux_pca954x_device->pca9548_base_nr;
+            if (data->pca9548_cfg_info.pca9548_base_nr == 0) {
+                dynamic_nr = 1;
+                PCA954X_DEBUG("pca9548_base_nr = 0, use dynamic adap number.\n");
+            } else {
+                dynamic_nr = 0;
+                PCA954X_DEBUG("pca9548_base_nr:%u.\n", data->pca9548_cfg_info.pca9548_base_nr);
+            }
+        }
+    } else {
+        if (of_property_read_u32(of_node, "pca9548_base_nr", &data->pca9548_cfg_info.pca9548_base_nr)) {
+
+            dynamic_nr = 1;
+            PCA954X_DEBUG("pca9548_base_nr not found, use dynamic adap number");
+        } else {
+            dynamic_nr = 0;
+            PCA954X_DEBUG("pca9548_base_nr:%u.\n", data->pca9548_cfg_info.pca9548_base_nr);
+        }
+    }
+
+    /* Now create an adapter for each channel */
+    for (num = 0; num < data->chip->nchans; num++) {
+        bool idle_disconnect_pd = false;
+        if (dynamic_nr == 1) {
+            force = 0;              /* dynamic adap number */
+        } else {
+            force = data->pca9548_cfg_info.pca9548_base_nr + num;
+        }
+
+        class = 0;              /* no class by default */
+        data->deselect |= (idle_disconnect_pd ||
+                   idle_disconnect_dt) << num;
+
+        ret = i2c_mux_add_adapter(muxc, force, num, class);
+        if (ret)
+            goto fail_del_adapters;
+    }
+
+    dev_info(&client->dev,
+         "registered %d multiplexed busses for I2C %s %s\n",
+         num, data->chip->muxtype == pca954x_ismux
+                ? "mux" : "switch", client->name);
+
+    return 0;
+
+fail_del_adapters:
+    i2c_mux_del_adapters(muxc);
+    return ret;
+}
+
+static int pca954x_remove(struct i2c_client *client)
+{
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct pca954x *data = i2c_mux_priv(muxc);
+    int c, irq;
+
+    if (data->irq) {
+        for (c = 0; c < data->chip->nchans; c++) {
+            irq = irq_find_mapping(data->irq, c);
+            irq_dispose_mapping(irq);
+        }
+        irq_domain_remove(data->irq);
+    }
+
+    i2c_mux_del_adapters(muxc);
+    return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int pca954x_resume(struct device *dev)
+{
+    struct i2c_client *client = to_i2c_client(dev);
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct pca954x *data = i2c_mux_priv(muxc);
+
+    data->last_chan = 0;
+    return i2c_smbus_write_byte(client, 0);
+}
+#endif
+
+static SIMPLE_DEV_PM_OPS(pca954x_pm, NULL, pca954x_resume);
+
+static struct i2c_driver pca954x_driver = {
+    .driver        = {
+        .name    = "wb_pca954x",
+        .pm    = &pca954x_pm,
+        .of_match_table = of_match_ptr(pca954x_of_match),
+    },
+    .probe        = pca954x_probe,
+    .remove        = pca954x_remove,
+    .id_table    = pca954x_id,
+};
+
+module_i2c_driver(pca954x_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("PCA954x I2C mux/switch driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.h
new file mode 100644
index 000000000000..9cbe162782c5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.h
@@ -0,0 +1,67 @@
+#ifndef __WB_I2C_MUX_PCA954X_H__
+#define __WB_I2C_MUX_PCA954X_H__
+
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+typedef enum pca9548_reset_type_s {
+    PCA9548_RESET_NONE = 0,
+    PCA9548_RESET_I2C = 1,
+    PCA9548_RESET_GPIO = 2,
+    PCA9548_RESET_IO = 3,
+    PCA9548_RESET_FILE = 4,
+} pca9548_reset_type_t;
+
+typedef struct i2c_attr_s {
+    uint32_t i2c_bus;
+    uint32_t i2c_addr;
+    uint32_t reg_offset;
+    uint32_t mask;
+    uint32_t reset_on;
+    uint32_t reset_off;
+} i2c_attr_t;
+
+typedef struct io_attr_s {
+    uint32_t io_addr;
+    uint32_t mask;
+    uint32_t reset_on;
+    uint32_t reset_off;
+} io_attr_t;
+
+typedef struct file_attr_s {
+    const char *dev_name;
+    uint32_t offset;
+    uint32_t mask;
+    uint32_t reset_on;
+    uint32_t reset_off;
+} file_attr_t;
+
+typedef struct gpio_attr_s {
+    int gpio_init;
+    uint32_t gpio;
+    uint32_t reset_on;
+    uint32_t reset_off;
+} gpio_attr_t;
+
+typedef struct i2c_mux_pca954x_device_s {
+    struct i2c_client *client;
+    uint32_t i2c_bus;
+    uint32_t i2c_addr;
+    uint32_t pca9548_base_nr;
+    uint32_t pca9548_reset_type;
+    uint32_t rst_delay_b;                   /* delay time before reset(us) */
+    uint32_t rst_delay;                     /* reset time(us) */
+    uint32_t rst_delay_a;                   /* delay time after reset(us) */
+    bool probe_disable;
+    bool select_chan_check;
+    bool close_chan_force_reset;
+    union {
+        i2c_attr_t i2c_attr;
+        gpio_attr_t gpio_attr;
+        io_attr_t io_attr;
+        file_attr_t file_attr;
+    } attr;
+} i2c_mux_pca954x_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca9641.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca9641.c
new file mode 100644
index 000000000000..519762f0c159
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca9641.c
@@ -0,0 +1,1395 @@
+/*
+ * I2C multiplexer driver for PCA9541 bus master selector
+ *
+ * Copyright (c) 2010 Ericsson AB.
+ *
+ * Author: Guenter Roeck <linux@roeck-us.net>
+ *
+ * Derived from:
+ *  pca954x.c
+ *
+ *  Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
+ *  Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/jiffies.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/i2c.h>
+#include <linux/i2c-mux.h>
+#include <linux/gpio/consumer.h>
+#include <linux/gpio.h>
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+
+#include "wb_i2c_mux_pca9641.h"
+
+/*
+ * The PCA9541 is a bus master selector. It supports two I2C masters connected
+ * to a single slave bus.
+ *
+ * Before each bus transaction, a master has to acquire bus ownership. After the
+ * transaction is complete, bus ownership has to be released. This fits well
+ * into the I2C multiplexer framework, which provides select and release
+ * functions for this purpose. For this reason, this driver is modeled as
+ * single-channel I2C bus multiplexer.
+ *
+ * This driver assumes that the two bus masters are controlled by two different
+ * hosts. If a single host controls both masters, platform code has to ensure
+ * that only one of the masters is instantiated at any given time.
+ */
+
+#define PCA9541_CONTROL		0x01
+#define PCA9541_ISTAT		0x02
+
+#define PCA9541_CTL_MYBUS	(1 << 0)
+#define PCA9541_CTL_NMYBUS	(1 << 1)
+#define PCA9541_CTL_BUSON	(1 << 2)
+#define PCA9541_CTL_NBUSON	(1 << 3)
+#define PCA9541_CTL_BUSINIT	(1 << 4)
+#define PCA9541_CTL_TESTON	(1 << 6)
+#define PCA9541_CTL_NTESTON	(1 << 7)
+#define PCA9541_ISTAT_INTIN	(1 << 0)
+#define PCA9541_ISTAT_BUSINIT	(1 << 1)
+#define PCA9541_ISTAT_BUSOK	(1 << 2)
+#define PCA9541_ISTAT_BUSLOST	(1 << 3)
+#define PCA9541_ISTAT_MYTEST	(1 << 6)
+#define PCA9541_ISTAT_NMYTEST	(1 << 7)
+#define PCA9641_ID             0x00
+#define PCA9641_ID_MAGIC       0x38
+#define PCA9641_CONTROL        0x01
+#define PCA9641_STATUS         0x02
+#define PCA9641_TIME           0x03
+#define PCA9641_CTL_LOCK_REQ           BIT(0)
+#define PCA9641_CTL_LOCK_GRANT         BIT(1)
+#define PCA9641_CTL_BUS_CONNECT        BIT(2)
+#define PCA9641_CTL_BUS_INIT           BIT(3)
+#define PCA9641_CTL_SMBUS_SWRST        BIT(4)
+#define PCA9641_CTL_IDLE_TIMER_DIS     BIT(5)
+#define PCA9641_CTL_SMBUS_DIS          BIT(6)
+#define PCA9641_CTL_PRIORITY           BIT(7)
+#define PCA9641_STS_OTHER_LOCK         BIT(0)
+#define PCA9641_STS_BUS_INIT_FAIL      BIT(1)
+#define PCA9641_STS_BUS_HUNG           BIT(2)
+#define PCA9641_STS_MBOX_EMPTY         BIT(3)
+#define PCA9641_STS_MBOX_FULL          BIT(4)
+#define PCA9641_STS_TEST_INT           BIT(5)
+#define PCA9641_STS_SCL_IO             BIT(6)
+#define PCA9641_STS_SDA_IO             BIT(7)
+#define PCA9641_RES_TIME       0x03
+#define BUSON		(PCA9541_CTL_BUSON | PCA9541_CTL_NBUSON)
+#define MYBUS		(PCA9541_CTL_MYBUS | PCA9541_CTL_NMYBUS)
+#define mybus(x)	(!((x) & MYBUS) || ((x) & MYBUS) == MYBUS)
+#define busoff(x)	(!((x) & BUSON) || ((x) & BUSON) == BUSON)
+#define BUSOFF(x, y)   (!((x) & PCA9641_CTL_LOCK_GRANT) && \
+                       !((y) & PCA9641_STS_OTHER_LOCK))
+#define other_lock(x)  ((x) & PCA9641_STS_OTHER_LOCK)
+#define lock_grant(x)  ((x) & PCA9641_CTL_LOCK_GRANT)
+
+#define PCA9641_RETRY_TIME     (8)
+#define PCA9641_RESET_DELAY    (150)
+
+typedef struct i2c_muxs_struct_flag
+{
+	int nr;
+	char name[48];
+	struct mutex	update_lock;
+	int flag;
+}i2c_mux_flag;
+
+i2c_mux_flag pca_flag = {
+	.flag = -1,
+};
+
+int pca9641_setmuxflag(int nr, int flag)
+{
+	if (pca_flag.nr == nr) {
+	    pca_flag.flag = flag;
+        return 0;
+	}
+	return -1;
+}
+EXPORT_SYMBOL(pca9641_setmuxflag);
+
+static int g_debug_info = 0;
+static int g_debug_err = 0;
+
+module_param(g_debug_info, int, S_IRUGO | S_IWUSR);
+module_param(g_debug_err, int, S_IRUGO | S_IWUSR);
+
+#define PCA_DEBUG(fmt, args...) do {                                        \
+    if (g_debug_info) { \
+        printk(KERN_INFO "[pca9641][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define PCA_DEBUG_ERR(fmt, args...) do {                                        \
+    if (g_debug_err) { \
+        printk(KERN_ERR "[pca9641][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+/* arbitration timeouts, in jiffies */
+#define ARB_TIMEOUT	(HZ / 8)	/* 125 ms until forcing bus ownership */
+#define ARB2_TIMEOUT	(HZ / 4)	/* 250 ms until acquisition failure */
+
+/* arbitration retry delays, in us */
+#define SELECT_DELAY_SHORT	50
+#define SELECT_DELAY_LONG	1000
+#define I2C_RETRY_TIMES         (5)
+#define I2C_RETRY_WAIT_TIMES    (10)      /*delay 10ms*/
+
+typedef struct pca9641_cfg_info_s {
+    uint32_t pca9641_reset_type;
+    uint32_t rst_delay_b; /* delay time before reset(us) */
+    uint32_t rst_delay;   /* reset time(us) */
+    uint32_t rst_delay_a; /* delay time after reset(us) */
+    union {
+        i2c_attr_t i2c_attr;
+        gpio_attr_t gpio_attr;
+        io_attr_t io_attr;
+        file_attr_t file_attr;
+    } attr;
+} pca9641_cfg_info_t;
+
+struct pca9541 {
+	struct i2c_client *client;
+	unsigned long select_timeout;
+	unsigned long arb_timeout;
+    uint32_t pca9641_nr;
+    pca9641_cfg_info_t pca9641_cfg_info; /* pca9641 reset cfg */
+};
+
+static const struct i2c_device_id pca9541_id[] = {
+	{"wb_pca9541", 0},
+	{"wb_pca9641", 1},
+	{}
+};
+
+MODULE_DEVICE_TABLE(i2c, pca9541_id);
+
+#ifdef CONFIG_OF
+static const struct of_device_id pca9541_of_match[] = {
+    { .compatible = "nxp,wb_pca9541" },
+    { .compatible = "nxp,wb_pca9641" },
+    {}
+};
+MODULE_DEVICE_TABLE(of, pca9541_of_match);
+#endif
+
+static int pca9641_gpio_init(gpio_attr_t *gpio_attr)
+{
+    int err;
+
+    if (gpio_attr->gpio_init) {
+        PCA_DEBUG("gpio%d already init, do nothing.\n", gpio_attr->gpio);
+        return 0;
+    }
+
+    PCA_DEBUG("gpio%d init.\n", gpio_attr->gpio);
+    err = gpio_request(gpio_attr->gpio, "pca9641_reset");
+    if (err) {
+        goto error;
+    }
+    err = gpio_direction_output(gpio_attr->gpio, gpio_attr->reset_off);
+    if (err) {
+        gpio_free(gpio_attr->gpio);
+        goto error;
+    }
+    gpio_attr->gpio_init = 1;
+    return 0;
+error:
+    PCA_DEBUG_ERR("pca9641_gpio_init failed, ret:%d.\n", err);
+    return err;
+}
+
+static void pca9641_gpio_free(gpio_attr_t *gpio_attr)
+{
+    if (gpio_attr->gpio_init == 1) {
+        PCA_DEBUG("gpio%d release.\n", gpio_attr->gpio);
+        gpio_free(gpio_attr->gpio);
+        gpio_attr->gpio_init = 0;
+    }
+    return;
+}
+
+static int pca9641_reset_file_read(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    filp = filp_open(path, O_RDONLY, 0);
+    if (IS_ERR(filp)) {
+        PCA_DEBUG_ERR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    ret = kernel_read(filp, val, size, &tmp_pos);
+    if (ret < 0) {
+        PCA_DEBUG_ERR("kernel_read failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int pca9641_reset_file_write(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    filp = filp_open(path, O_RDWR, 777);
+    if (IS_ERR(filp)) {
+        PCA_DEBUG_ERR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    ret = kernel_write(filp, val, size, &tmp_pos);
+    if (ret < 0) {
+        PCA_DEBUG_ERR("kernel_write failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    vfs_fsync(filp, 1);
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int pca9641_reset_i2c_read(uint32_t bus, uint32_t addr, uint32_t offset_addr,
+               unsigned char *buf, uint32_t size)
+{
+    struct file *fp;
+    struct i2c_client client;
+    char i2c_path[32];
+    int i, j;
+    int rv;
+
+    rv = 0;
+    mem_clear(i2c_path, sizeof(i2c_path));
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", bus);
+    fp = filp_open(i2c_path, O_RDWR, S_IRUSR | S_IWUSR);
+    if (IS_ERR(fp)) {
+        PCA_DEBUG_ERR("i2c open fail.\n");
+        return -1;
+    }
+    memcpy(&client, fp->private_data, sizeof(struct i2c_client));
+    client.addr = addr;
+    for (j = 0; j < size; j++) {
+        for (i = 0; i < I2C_RETRY_TIMES; i++) {
+            rv = i2c_smbus_read_byte_data(&client, (offset_addr + j));
+            if (rv < 0) {
+                PCA_DEBUG_ERR("i2c read failed, try again.\n");
+                msleep(I2C_RETRY_WAIT_TIMES);
+                if (i >= (I2C_RETRY_TIMES - 1)) {
+                    goto out;
+                }
+                continue;
+          }
+          *(buf + j) = (unsigned char)rv;
+          break;
+        }
+    }
+out:
+    filp_close(fp, NULL);
+    return rv;
+}
+
+static int pca9641_reset_i2c_write(uint32_t bus, uint32_t dev_addr, uint32_t offset_addr,
+               uint8_t write_buf)
+{
+    struct file *fp;
+    struct i2c_client client;
+    char i2c_path[32];
+    int i;
+    int rv;
+
+    rv = 0;
+    mem_clear(i2c_path, sizeof(i2c_path));
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", bus);
+    fp = filp_open(i2c_path, O_RDWR, S_IRUSR | S_IWUSR);
+    if (IS_ERR(fp)) {
+        PCA_DEBUG_ERR("i2c open fail.\n");
+        return -1;
+    }
+    memcpy(&client, fp->private_data, sizeof(struct i2c_client));
+    client.addr = dev_addr;
+    for (i = 0; i < I2C_RETRY_TIMES; i++) {
+        rv = i2c_smbus_write_byte_data(&client, offset_addr, write_buf);
+        if (rv < 0) {
+            PCA_DEBUG_ERR("i2c write failed, try again.\n");
+            msleep(I2C_RETRY_WAIT_TIMES);
+            if (i >= (I2C_RETRY_TIMES - 1)) {
+                goto out;
+            }
+            continue;
+        }
+        break;
+    }
+out:
+    filp_close(fp, NULL);
+    return rv;
+}
+
+static int pca9641_do_file_reset(struct i2c_mux_core *muxc)
+{
+    int ret, timeout, err;
+    struct pca9541 *data;
+    pca9641_cfg_info_t *reset_cfg;
+    file_attr_t *file_attr;
+    u8 val;
+    int udelay_cnt;
+
+    data = i2c_mux_priv(muxc);
+    reset_cfg = &data->pca9641_cfg_info;
+    file_attr = &reset_cfg->attr.file_attr;
+    ret = -1;
+
+    PCA_DEBUG("rst_delay_b:%u, rst_delay:%u, rst_delay_a:%u.\n",
+        reset_cfg->rst_delay_b, reset_cfg->rst_delay, reset_cfg->rst_delay_a);
+    PCA_DEBUG("dev_name:%s, offset:0x%x, mask:0x%x, on:0x%x, off:0x%x.\n",
+        file_attr->dev_name, file_attr->offset, file_attr->mask,
+        file_attr->reset_on, file_attr->reset_off);
+
+    if (reset_cfg->rst_delay_b) {
+        usleep_range(reset_cfg->rst_delay_b, reset_cfg->rst_delay_b + 1);
+    }
+
+    err = pca9641_reset_file_read(file_attr->dev_name, file_attr->offset, &val, sizeof(val));
+    if (err < 0) {
+        goto out;
+    }
+
+    val &= ~(file_attr->mask);
+    val |= file_attr->reset_on;
+    err = pca9641_reset_file_write(file_attr->dev_name, file_attr->offset, &val, sizeof(val));
+    if (err < 0) {
+        goto out;
+    }
+
+    if (reset_cfg->rst_delay) {
+        usleep_range(reset_cfg->rst_delay, reset_cfg->rst_delay + 1);
+    }
+
+    val &= ~(file_attr->mask);
+    val |= file_attr->reset_off;
+    err = pca9641_reset_file_write(file_attr->dev_name, file_attr->offset, &val, sizeof(val));
+    if (err < 0) {
+        goto out;
+    }
+
+    udelay_cnt = 0;
+    timeout = reset_cfg->rst_delay_a;
+    while (timeout > 0) {
+        usleep_range(1, 2);
+        err = pca9641_reset_file_read(file_attr->dev_name, file_attr->offset, &val, sizeof(val));
+        if (err < 0) {
+            goto out;
+        }
+        val &= (file_attr->mask);
+        if (val == file_attr->reset_off) {
+            ret = 0;
+            PCA_DEBUG("pca9641_do_file_reset success.\n");
+            break;
+        }
+        udelay_cnt++;
+        if ((udelay_cnt % 1000) == 0) {
+            /* 1MS schedule*/
+            schedule();
+        }
+        timeout--;
+    }
+    if (ret < 0) {
+        PCA_DEBUG_ERR("pca9641_do_file_reset timeout.\n");
+    }
+out:
+    if (err < 0) {
+        PCA_DEBUG_ERR("pca9641_do_file_reset file rd/wr failed, ret:%d.\n", err);
+    }
+
+    return ret;
+}
+
+static int pca9641_do_io_reset(struct i2c_mux_core *muxc)
+{
+    int ret, timeout;
+    struct pca9541 *data;
+    pca9641_cfg_info_t *reset_cfg;
+    io_attr_t *io_attr;
+    u8 val;
+    int udelay_cnt;
+
+    data = i2c_mux_priv(muxc);
+    reset_cfg = &data->pca9641_cfg_info;
+    io_attr = &reset_cfg->attr.io_attr;
+
+    PCA_DEBUG("rst_delay_b:%u, rst_delay:%u, rst_delay_a:%u.\n",
+        reset_cfg->rst_delay_b, reset_cfg->rst_delay, reset_cfg->rst_delay_a);
+    PCA_DEBUG("io_addr:0x%x, mask:0x%x, on:0x%x, off:0x%x.\n",
+        io_attr->io_addr, io_attr->mask, io_attr->reset_on, io_attr->reset_off);
+
+    if (reset_cfg->rst_delay_b) {
+        usleep_range(reset_cfg->rst_delay_b, reset_cfg->rst_delay_b + 1);
+    }
+
+    val = inb(io_attr->io_addr);
+    val &= ~(io_attr->mask);
+    val |= io_attr->reset_on;
+    outb(val, io_attr->io_addr);
+
+    if (reset_cfg->rst_delay) {
+        usleep_range(reset_cfg->rst_delay, reset_cfg->rst_delay + 1);
+    }
+
+    val &= ~(io_attr->mask);
+    val |= io_attr->reset_off;
+    outb(val, io_attr->io_addr);
+
+    ret = -1;
+    udelay_cnt = 0;
+    timeout = reset_cfg->rst_delay_a;
+    while (timeout > 0) {
+        usleep_range(1, 2);
+        val = inb(io_attr->io_addr);
+        val &= (io_attr->mask);
+        if (val == io_attr->reset_off) {
+            ret = 0;
+            PCA_DEBUG("pca9641_do_io_reset success.\n");
+            break;
+        }
+        udelay_cnt++;
+        if ((udelay_cnt % 1000) == 0) {
+            /* 1MS schedule*/
+            schedule();
+        }
+        timeout--;
+    }
+
+    if (ret < 0) {
+        PCA_DEBUG_ERR("pca9641_do_io_reset timeout.\n");
+    }
+
+    return ret;
+}
+
+static int pca9641_do_gpio_reset(struct i2c_mux_core *muxc)
+{
+    int ret, timeout;
+    struct pca9541 *data;
+    pca9641_cfg_info_t *reset_cfg;
+    gpio_attr_t *gpio_attr;
+    u8 val;
+    int udelay_cnt;
+
+    data = i2c_mux_priv(muxc);
+    reset_cfg = &data->pca9641_cfg_info;
+    gpio_attr = &reset_cfg->attr.gpio_attr;
+
+    ret = pca9641_gpio_init(gpio_attr);
+    if (ret) {
+        return -1;
+    }
+
+    if (reset_cfg->rst_delay_b) {
+        usleep_range(reset_cfg->rst_delay_b, reset_cfg->rst_delay_b + 1);
+    }
+
+    __gpio_set_value(gpio_attr->gpio, gpio_attr->reset_on);
+
+    if (reset_cfg->rst_delay) {
+        usleep_range(reset_cfg->rst_delay, reset_cfg->rst_delay + 1);
+    }
+
+    __gpio_set_value(gpio_attr->gpio, gpio_attr->reset_off);
+    ret = -1;
+    udelay_cnt = 0;
+    timeout = reset_cfg->rst_delay_a;
+    while (timeout > 0) {
+        usleep_range(1, 2);
+        val = __gpio_get_value(gpio_attr->gpio);
+        if (val == gpio_attr->reset_off) {
+            ret = 0;
+            PCA_DEBUG("pca9641_do_gpio_reset success.\n");
+            break;
+        }
+        udelay_cnt++;
+        if ((udelay_cnt % 1000) == 0) {
+            /* 1MS schedule*/
+            schedule();
+        }
+        timeout--;
+    }
+
+    if (ret < 0) {
+        PCA_DEBUG_ERR("pca9641_do_gpio_reset timeout.\n");
+    }
+
+    pca9641_gpio_free(gpio_attr);
+    return ret;
+}
+
+static int pca9641_do_i2c_reset(struct i2c_mux_core *muxc)
+{
+    int ret, timeout, err;
+    struct pca9541 *data;
+    pca9641_cfg_info_t *reset_cfg;
+    i2c_attr_t *i2c_attr;
+    u8 val;
+    int udelay_cnt;
+
+    data = i2c_mux_priv(muxc);
+    reset_cfg = &data->pca9641_cfg_info;
+    i2c_attr = &reset_cfg->attr.i2c_attr;
+    ret = -1;
+
+    PCA_DEBUG("rst_delay_b:%u, rst_delay:%u, rst_delay_a:%u.\n",
+        reset_cfg->rst_delay_b, reset_cfg->rst_delay, reset_cfg->rst_delay_a);
+    PCA_DEBUG("bus:0x%x, addr:0x%x, reg:0x%x, mask:0x%x, on:0x%x, off:0x%x.\n",
+        i2c_attr->i2c_bus, i2c_attr->i2c_addr, i2c_attr->reg_offset,
+        i2c_attr->mask, i2c_attr->reset_on, i2c_attr->reset_off);
+
+    if (reset_cfg->rst_delay_b) {
+        usleep_range(reset_cfg->rst_delay_b, reset_cfg->rst_delay_b + 1);
+    }
+
+    err = pca9641_reset_i2c_read(i2c_attr->i2c_bus, i2c_attr->i2c_addr,
+              i2c_attr->reg_offset, &val, sizeof(val));
+    if (err < 0) {
+        goto out;
+    }
+
+    val &= ~(i2c_attr->mask);
+    val |= i2c_attr->reset_on;
+    err = pca9641_reset_i2c_write(i2c_attr->i2c_bus, i2c_attr->i2c_addr,
+              i2c_attr->reg_offset, val);
+    if (err < 0) {
+        goto out;
+    }
+
+    if (reset_cfg->rst_delay) {
+        usleep_range(reset_cfg->rst_delay, reset_cfg->rst_delay + 1);
+    }
+
+    val &= ~(i2c_attr->mask);
+    val |= i2c_attr->reset_off;
+    err = pca9641_reset_i2c_write(i2c_attr->i2c_bus, i2c_attr->i2c_addr,
+              i2c_attr->reg_offset, val);
+    if (err < 0) {
+        goto out;
+    }
+
+    udelay_cnt = 0;
+    timeout = reset_cfg->rst_delay_a;
+    while (timeout > 0) {
+        usleep_range(1, 2);
+        err = pca9641_reset_i2c_read(i2c_attr->i2c_bus, i2c_attr->i2c_addr,
+                  i2c_attr->reg_offset, &val, sizeof(val));
+        if (err < 0) {
+            goto out;
+        }
+        val &= (i2c_attr->mask);
+        if (val == i2c_attr->reset_off) {
+            ret = 0;
+            PCA_DEBUG("pca9641_do_i2c_reset success.\n");
+            break;
+        }
+        udelay_cnt++;
+        if ((udelay_cnt % 1000) == 0) {
+            /* 1MS schedule*/
+            schedule();
+        }
+        timeout--;
+    }
+    if (ret < 0) {
+        PCA_DEBUG_ERR("pca9641_do_i2c_reset timeout.\n");
+    }
+out:
+    if (err < 0) {
+        PCA_DEBUG_ERR("pca9641_do_i2c_reset i2c op failed, ret:%d.\n", err);
+    }
+    return ret;
+}
+
+static int pca9641_do_reset(struct i2c_mux_core *muxc)
+{
+    int ret;
+    struct pca9541 *data;
+
+    data = i2c_mux_priv(muxc);
+    if (data->pca9641_cfg_info.pca9641_reset_type == PCA9641_RESET_NONE) {
+        ret = -1;
+        PCA_DEBUG("Don't need to reset.\n");
+    } else if (data->pca9641_cfg_info.pca9641_reset_type == PCA9641_RESET_I2C) {
+        ret = pca9641_do_i2c_reset(muxc);
+    } else if (data->pca9641_cfg_info.pca9641_reset_type == PCA9641_RESET_GPIO) {
+        ret = pca9641_do_gpio_reset(muxc);
+    } else if (data->pca9641_cfg_info.pca9641_reset_type == PCA9641_RESET_IO) {
+        ret = pca9641_do_io_reset(muxc);
+    } else if (data->pca9641_cfg_info.pca9641_reset_type == PCA9641_RESET_FILE) {
+        ret = pca9641_do_file_reset(muxc);
+    } else {
+        ret = -1;
+        PCA_DEBUG_ERR("Unsupport reset type:0x%x.\n",
+            data->pca9641_cfg_info.pca9641_reset_type);
+    }
+
+    if (ret < 0) {
+        PCA_DEBUG_ERR("pca9641_reset_ctrl failed, reset type:%u, ret:%d.\n",
+            data->pca9641_cfg_info.pca9641_reset_type, ret);
+    } else {
+        usleep_range(PCA9641_RESET_DELAY, PCA9641_RESET_DELAY + 1);
+    }
+    return ret;
+}
+
+/*
+ * Write to chip register. Don't use i2c_transfer()/i2c_smbus_xfer()
+ * as they will try to lock the adapter a second time.
+ */
+static int pca9541_reg_write(struct i2c_client *client, u8 command, u8 val)
+{
+	struct i2c_adapter *adap = client->adapter;
+	int ret;
+
+	if (adap->algo->master_xfer) {
+		struct i2c_msg msg;
+		char buf[2];
+
+		msg.addr = client->addr;
+		msg.flags = 0;
+		msg.len = 2;
+		buf[0] = command;
+		buf[1] = val;
+		msg.buf = buf;
+		ret = __i2c_transfer(adap, &msg, 1);
+	} else {
+		union i2c_smbus_data data;
+
+		data.byte = val;
+		ret = adap->algo->smbus_xfer(adap, client->addr,
+					     client->flags,
+					     I2C_SMBUS_WRITE,
+					     command,
+					     I2C_SMBUS_BYTE_DATA, &data);
+	}
+
+	return ret;
+}
+
+/*
+ * Read from chip register. Don't use i2c_transfer()/i2c_smbus_xfer()
+ * as they will try to lock adapter a second time.
+ */
+static int pca9541_reg_read(struct i2c_client *client, u8 command)
+{
+	struct i2c_adapter *adap = client->adapter;
+	int ret;
+	u8 val;
+
+	if (adap->algo->master_xfer) {
+		struct i2c_msg msg[2] = {
+			{
+				.addr = client->addr,
+				.flags = 0,
+				.len = 1,
+				.buf = &command
+			},
+			{
+				.addr = client->addr,
+				.flags = I2C_M_RD,
+				.len = 1,
+				.buf = &val
+			}
+		};
+		ret = __i2c_transfer(adap, msg, 2);
+		if (ret == 2)
+			ret = val;
+		else if (ret >= 0)
+			ret = -EIO;
+	} else {
+		union i2c_smbus_data data;
+
+		ret = adap->algo->smbus_xfer(adap, client->addr,
+					     client->flags,
+					     I2C_SMBUS_READ,
+					     command,
+					     I2C_SMBUS_BYTE_DATA, &data);
+		if (!ret)
+			ret = data.byte;
+	}
+	return ret;
+}
+
+/*
+ * Arbitration management functions
+ */
+
+/* Release bus. Also reset NTESTON and BUSINIT if it was set. */
+static void pca9541_release_bus(struct i2c_client *client)
+{
+	int reg;
+
+	reg = pca9541_reg_read(client, PCA9541_CONTROL);
+	if (reg >= 0 && !busoff(reg) && mybus(reg))
+		pca9541_reg_write(client, PCA9541_CONTROL,
+				  (reg & PCA9541_CTL_NBUSON) >> 1);
+}
+
+/*
+ * Arbitration is defined as a two-step process. A bus master can only activate
+ * the slave bus if it owns it; otherwise it has to request ownership first.
+ * This multi-step process ensures that access contention is resolved
+ * gracefully.
+ *
+ * Bus	Ownership	Other master	Action
+ * state		requested access
+ * ----------------------------------------------------
+ * off	-		yes		wait for arbitration timeout or
+ *					for other master to drop request
+ * off	no		no		take ownership
+ * off	yes		no		turn on bus
+ * on	yes		-		done
+ * on	no		-		wait for arbitration timeout or
+ *					for other master to release bus
+ *
+ * The main contention point occurs if the slave bus is off and both masters
+ * request ownership at the same time. In this case, one master will turn on
+ * the slave bus, believing that it owns it. The other master will request
+ * bus ownership. Result is that the bus is turned on, and master which did
+ * _not_ own the slave bus before ends up owning it.
+ */
+
+/* Control commands per PCA9541 datasheet */
+static const u8 pca9541_control[16] = {
+	4, 0, 1, 5, 4, 4, 5, 5, 0, 0, 1, 1, 0, 4, 5, 1
+};
+
+/*
+ * Channel arbitration
+ *
+ * Return values:
+ *  <0: error
+ *  0 : bus not acquired
+ *  1 : bus acquired
+ */
+static int pca9541_arbitrate(struct i2c_client *client)
+{
+	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+	struct pca9541 *data = i2c_mux_priv(muxc);
+	int reg;
+
+	reg = pca9541_reg_read(client, PCA9541_CONTROL);
+	if (reg < 0)
+		return reg;
+
+	if (busoff(reg)) {
+		int istat;
+		/*
+		 * Bus is off. Request ownership or turn it on unless
+		 * other master requested ownership.
+		 */
+		istat = pca9541_reg_read(client, PCA9541_ISTAT);
+		if (!(istat & PCA9541_ISTAT_NMYTEST)
+		    || time_is_before_eq_jiffies(data->arb_timeout)) {
+			/*
+			 * Other master did not request ownership,
+			 * or arbitration timeout expired. Take the bus.
+			 */
+			pca9541_reg_write(client,
+					  PCA9541_CONTROL,
+					  pca9541_control[reg & 0x0f]
+					  | PCA9541_CTL_NTESTON);
+			data->select_timeout = SELECT_DELAY_SHORT;
+		} else {
+			/*
+			 * Other master requested ownership.
+			 * Set extra long timeout to give it time to acquire it.
+			 */
+			data->select_timeout = SELECT_DELAY_LONG * 2;
+		}
+	} else if (mybus(reg)) {
+		/*
+		 * Bus is on, and we own it. We are done with acquisition.
+		 * Reset NTESTON and BUSINIT, then return success.
+		 */
+		if (reg & (PCA9541_CTL_NTESTON | PCA9541_CTL_BUSINIT))
+			pca9541_reg_write(client,
+					  PCA9541_CONTROL,
+					  reg & ~(PCA9541_CTL_NTESTON
+						  | PCA9541_CTL_BUSINIT));
+		return 1;
+	} else {
+		/*
+		 * Other master owns the bus.
+		 * If arbitration timeout has expired, force ownership.
+		 * Otherwise request it.
+		 */
+		data->select_timeout = SELECT_DELAY_LONG;
+		if (time_is_before_eq_jiffies(data->arb_timeout)) {
+			/* Time is up, take the bus and reset it. */
+			pca9541_reg_write(client,
+					  PCA9541_CONTROL,
+					  pca9541_control[reg & 0x0f]
+					  | PCA9541_CTL_BUSINIT
+					  | PCA9541_CTL_NTESTON);
+		} else {
+			/* Request bus ownership if needed */
+			if (!(reg & PCA9541_CTL_NTESTON))
+				pca9541_reg_write(client,
+						  PCA9541_CONTROL,
+						  reg | PCA9541_CTL_NTESTON);
+		}
+	}
+	return 0;
+}
+
+static int pca9541_select_chan(struct i2c_mux_core *muxc, u32 chan)
+{
+	struct pca9541 *data = i2c_mux_priv(muxc);
+	struct i2c_client *client = data->client;
+	int ret;
+	unsigned long timeout = jiffies + ARB2_TIMEOUT;
+		/* give up after this time */
+
+	data->arb_timeout = jiffies + ARB_TIMEOUT;
+		/* force bus ownership after this time */
+
+	do {
+		ret = pca9541_arbitrate(client);
+		if (ret)
+			return ret < 0 ? ret : 0;
+
+		if (data->select_timeout == SELECT_DELAY_SHORT)
+			udelay(data->select_timeout);
+		else
+			msleep(data->select_timeout / 1000);
+	} while (time_is_after_eq_jiffies(timeout));
+
+    dev_warn(&client->dev, "pca9541 select channel timeout.\n");
+	return -ETIMEDOUT;
+}
+
+static int pca9541_release_chan(struct i2c_mux_core *muxc, u32 chan)
+{
+    struct pca9541 *data = i2c_mux_priv(muxc);
+	struct i2c_client *client = data->client;
+	pca9541_release_bus(client);
+	return 0;
+}
+
+/*
+* Arbitration management functions
+*/
+static void pca9641_release_bus(struct i2c_client *client)
+{
+   pca9541_reg_write(client, PCA9641_CONTROL, 0x80); //master 0x80
+}
+
+/*
+* Channel arbitration
+*
+* Return values:
+*  <0: error
+*  0 : bus not acquired
+*  1 : bus acquired
+*/
+static int pca9641_arbitrate(struct i2c_client *client)
+{
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+    struct pca9541 *data = i2c_mux_priv(muxc);
+    int reg_ctl, reg_sts;
+
+    reg_ctl = pca9541_reg_read(client, PCA9641_CONTROL);
+    if (reg_ctl < 0) {
+        PCA_DEBUG_ERR("pca9641 read control register failed, ret:%d.\n", reg_ctl);
+        return reg_ctl;
+    }
+
+    reg_sts = pca9541_reg_read(client, PCA9641_STATUS);
+    if (reg_sts < 0) {
+        PCA_DEBUG_ERR("pca9641 read status register failed, ret:%d.\n", reg_sts);
+        return reg_sts;
+    }
+
+    if (BUSOFF(reg_ctl, reg_sts)) {
+        /*
+         * Bus is off. Request ownership or turn it on unless
+         * other master requested ownership.
+         */
+        reg_ctl |= PCA9641_CTL_LOCK_REQ;
+        pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl);
+        reg_ctl = pca9541_reg_read(client, PCA9641_CONTROL);
+        if (reg_ctl < 0) {
+            PCA_DEBUG_ERR("Bus is off, but read control register failed, ret:%d.\n", reg_ctl);
+            return reg_ctl;
+        }
+
+        if (lock_grant(reg_ctl)) {
+            /*
+            * Other master did not request ownership,
+            * or arbitration timeout expired. Take the bus.
+            */
+            PCA_DEBUG("Bus is off, get pca9641 arbitration success.\n");
+            reg_ctl |= PCA9641_CTL_BUS_CONNECT | PCA9641_CTL_LOCK_REQ;
+            pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl);
+            return 1;
+        } else {
+            /*
+            * Other master requested ownership.
+            * Set extra long timeout to give it time to acquire it.
+            */
+            PCA_DEBUG("Bus is off, but get pca9641 arbitration failed.\n");
+            data->select_timeout = SELECT_DELAY_LONG * 2;
+        }
+    } else if (lock_grant(reg_ctl)) {
+        /*
+        * Bus is on, and we own it. We are done with acquisition.
+        */
+        PCA_DEBUG("Bus is on, get pca9641 arbitration success.\n");
+        reg_ctl |= PCA9641_CTL_BUS_CONNECT | PCA9641_CTL_LOCK_REQ;
+        pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl);
+        return 1;
+    } else if (other_lock(reg_sts)) {
+        /*
+        * Other master owns the bus.
+        * If arbitration timeout has expired, force ownership.
+        * Otherwise request it.
+        */
+        PCA_DEBUG("Other master owns the bus, try to request it.\n");
+        data->select_timeout = SELECT_DELAY_LONG;
+        reg_ctl |= PCA9641_CTL_LOCK_REQ;
+        pca9541_reg_write(client, PCA9641_CONTROL, reg_ctl);
+    }
+    return 0;
+}
+
+int pca9641_select_chan_single(struct i2c_mux_core *muxc, u32 chan)
+{
+	struct pca9541 *data = i2c_mux_priv(muxc);
+    struct i2c_client *client = data->client;
+    int ret;
+    int result;
+    unsigned long msleep_time;
+    unsigned long timeout = jiffies + ARB2_TIMEOUT;
+    /* give up after this time */
+    data->arb_timeout = jiffies + ARB_TIMEOUT;
+    /* force bus ownership after this time */
+   	for (result = 0 ; result < PCA9641_RETRY_TIME ; result ++) {
+   	   do {
+   		   ret = pca9641_arbitrate(client);
+           if (ret) {
+               return ret < 0 ? -EIO : 0;
+           }
+           msleep_time = data->select_timeout / 1000;
+           if (msleep_time < 1) {
+               msleep(1);
+           } else {
+               msleep(msleep_time);
+           }
+   	   } while (time_is_after_eq_jiffies(timeout));
+       timeout = jiffies + ARB2_TIMEOUT;
+   	}
+    dev_warn(&client->dev, "pca9641 select channel timeout.\n");
+    return -ETIMEDOUT;
+}
+
+static int pca9641_select_chan(struct i2c_mux_core *muxc, u32 chan)
+{
+    int ret, rv;
+
+    ret = pca9641_select_chan_single(muxc, chan);
+    if (ret < 0) {
+        PCA_DEBUG_ERR("pca9641 select channel failed, ret:%d, try to reset pca9641.\n", ret);
+        rv = pca9641_do_reset(muxc);
+
+        if (rv < 0) {
+            PCA_DEBUG_ERR("pca9641 reset failed, rv:%d.\n", rv);
+            return ret;
+        }
+
+        ret = pca9641_select_chan_single(muxc, chan);
+        if (ret < 0) {
+            PCA_DEBUG_ERR("after pca9641 reset, select channel still failed, ret:%d.\n", ret);
+        }
+    }
+    return ret;
+}
+
+static int pca9641_release_chan(struct i2c_mux_core *muxc, u32 chan)
+{
+	struct pca9541 *data = i2c_mux_priv(muxc);
+	struct i2c_client *client = data->client;
+	if (pca_flag.flag) {
+		pca9641_release_bus(client);
+	}
+	return 0;
+}
+
+static int pca9641_detect_id(struct i2c_client *client)
+{
+#if 0
+   int reg;
+
+   reg = pca9541_reg_read(client, PCA9641_ID);
+   if (reg == PCA9641_ID_MAGIC)
+           return 1;
+   else
+           return 0;
+#endif
+    /* only support pca9641 */
+    return 1;
+}
+
+static int pca9641_recordflag(struct i2c_adapter *adap) {
+    if (pca_flag.flag != -1) {
+        pr_err(" %s %d has init already!!!", __func__, __LINE__);
+        return -1 ;
+    }
+    pca_flag.nr = adap->nr;
+	PCA_DEBUG(" adap->nr:%d\n",  adap->nr);
+	snprintf(pca_flag.name, sizeof(pca_flag.name),adap->name);
+    return 0;
+}
+
+static int of_pca9641_reset_data_init(struct pca9541 *data)
+{
+    int err;
+    struct device *dev = &data->client->dev;
+    pca9641_cfg_info_t *reset_cfg;
+
+    reset_cfg = &data->pca9641_cfg_info;
+    if (dev == NULL || dev->of_node == NULL) {
+        PCA_DEBUG("dev or dev->of_node is NUll, no reset.\n");
+        reset_cfg->pca9641_reset_type = PCA9641_RESET_NONE;
+        return 0;
+    }
+
+    if (of_property_read_u32(dev->of_node, "pca9641_reset_type", &reset_cfg->pca9641_reset_type)) {
+
+        PCA_DEBUG("pca9641_reset_type not found, no reset.\n");
+        reset_cfg->pca9641_reset_type = PCA9641_RESET_NONE;
+        return 0;
+    }
+    err = of_property_read_u32(dev->of_node, "rst_delay_b", &reset_cfg->rst_delay_b);
+    err |= of_property_read_u32(dev->of_node, "rst_delay", &reset_cfg->rst_delay);
+    err |= of_property_read_u32(dev->of_node, "rst_delay_a", &reset_cfg->rst_delay_a);
+
+    if (err) {
+        goto dts_config_err;
+    }
+    PCA_DEBUG("reset_type:0x%x, rst_delay_b:0x%x, rst_delay:0x%x, rst_delay_a:0x%x.\n",
+        reset_cfg->pca9641_reset_type, reset_cfg->rst_delay_b,
+        reset_cfg->rst_delay, reset_cfg->rst_delay_a);
+
+    if (reset_cfg->pca9641_reset_type == PCA9641_RESET_I2C) {
+
+        PCA_DEBUG("reset by i2c.\n");
+        err = of_property_read_u32(dev->of_node, "i2c_bus", &reset_cfg->attr.i2c_attr.i2c_bus);
+        err |=of_property_read_u32(dev->of_node, "i2c_addr", &reset_cfg->attr.i2c_attr.i2c_addr);
+        err |=of_property_read_u32(dev->of_node, "reg_offset", &reset_cfg->attr.i2c_attr.reg_offset);
+        err |=of_property_read_u32(dev->of_node, "mask", &reset_cfg->attr.i2c_attr.mask);
+        err |=of_property_read_u32(dev->of_node, "reset_on", &reset_cfg->attr.i2c_attr.reset_on);
+        err |=of_property_read_u32(dev->of_node, "reset_off", &reset_cfg->attr.i2c_attr.reset_off);
+        if (err) {
+            goto dts_config_err;
+        }
+        PCA_DEBUG("bus:%u, addr:0x%x, offset:0x%x, mask:0x%x, on:0x%x, off:0x%x.\n",
+            reset_cfg->attr.i2c_attr.i2c_bus, reset_cfg->attr.i2c_attr.i2c_addr,
+            reset_cfg->attr.i2c_attr.reg_offset, reset_cfg->attr.i2c_attr.mask,
+            reset_cfg->attr.i2c_attr.reset_on, reset_cfg->attr.i2c_attr.reset_off);
+    } else if (reset_cfg->pca9641_reset_type == PCA9641_RESET_GPIO) {
+
+        PCA_DEBUG("reset by gpio.\n");
+        err = of_property_read_u32(dev->of_node, "gpio", &reset_cfg->attr.gpio_attr.gpio);
+        err |=of_property_read_u32(dev->of_node, "reset_on", &reset_cfg->attr.gpio_attr.reset_on);
+        err |=of_property_read_u32(dev->of_node, "reset_off", &reset_cfg->attr.gpio_attr.reset_off);
+        if (err) {
+            goto dts_config_err;
+        }
+        PCA_DEBUG("gpio number:%u, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.gpio_attr.gpio, reset_cfg->attr.gpio_attr.reset_on,
+            reset_cfg->attr.gpio_attr.reset_off);
+        reset_cfg->attr.gpio_attr.gpio_init = 0;
+    } else if (reset_cfg->pca9641_reset_type == PCA9641_RESET_IO) {
+
+        PCA_DEBUG("reset by io.\n");
+        err = of_property_read_u32(dev->of_node, "io_addr", &reset_cfg->attr.io_attr.io_addr);
+        err |=of_property_read_u32(dev->of_node, "mask", &reset_cfg->attr.io_attr.mask);
+        err |=of_property_read_u32(dev->of_node, "reset_on", &reset_cfg->attr.io_attr.reset_on);
+        err |=of_property_read_u32(dev->of_node, "reset_off", &reset_cfg->attr.io_attr.reset_off);
+        if (err) {
+            goto dts_config_err;
+        }
+        PCA_DEBUG("io_addr:0x%x, mask:0x%x, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.io_attr.io_addr, reset_cfg->attr.io_attr.mask,
+            reset_cfg->attr.io_attr.reset_on, reset_cfg->attr.io_attr.reset_off);
+    } else if (reset_cfg->pca9641_reset_type == PCA9641_RESET_FILE) {
+
+        PCA_DEBUG("reset by file.\n");
+        err = of_property_read_string(dev->of_node, "dev_name", &reset_cfg->attr.file_attr.dev_name);
+        err |=of_property_read_u32(dev->of_node, "offset", &reset_cfg->attr.file_attr.offset);
+        err |=of_property_read_u32(dev->of_node, "mask", &reset_cfg->attr.file_attr.mask);
+        err |=of_property_read_u32(dev->of_node, "reset_on", &reset_cfg->attr.file_attr.reset_on);
+        err |=of_property_read_u32(dev->of_node, "reset_off", &reset_cfg->attr.file_attr.reset_off);
+        if (err) {
+            goto dts_config_err;
+        }
+        PCA_DEBUG("dev_name:%s, mask:0x%x, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.file_attr.dev_name, reset_cfg->attr.file_attr.mask,
+            reset_cfg->attr.file_attr.reset_on, reset_cfg->attr.file_attr.reset_off);
+    } else {
+        PCA_DEBUG_ERR("Unsupport reset type:%d.\n", reset_cfg->pca9641_reset_type);
+        goto dts_config_err;
+    }
+    return 0;
+dts_config_err:
+    PCA_DEBUG_ERR("dts config error, ret:%d.\n", err);
+    return -EINVAL;
+}
+
+static int pca9641_reset_data_init(struct pca9541 *data)
+{
+    pca9641_cfg_info_t *reset_cfg;
+    i2c_mux_pca9641_device_t *i2c_mux_pca9641_device;
+
+    if (data->client->dev.platform_data == NULL) {
+        PCA_DEBUG("pca9641 has no reset platform data config.\n");
+        return 0;
+    }
+    reset_cfg = &data->pca9641_cfg_info;
+    i2c_mux_pca9641_device = data->client->dev.platform_data;
+    reset_cfg->pca9641_reset_type = i2c_mux_pca9641_device->pca9641_reset_type;
+    if (reset_cfg->pca9641_reset_type == PCA9641_RESET_NONE) {
+        PCA_DEBUG("pca9641 has no reset function.\n");
+        return 0;
+    }
+
+    reset_cfg->rst_delay_b = i2c_mux_pca9641_device->rst_delay_b;
+    reset_cfg->rst_delay = i2c_mux_pca9641_device->rst_delay;
+    reset_cfg->rst_delay_a = i2c_mux_pca9641_device->rst_delay_a;
+    PCA_DEBUG("reset_type:0x%x, rst_delay_b:0x%x, rst_delay:0x%x, rst_delay_a:0x%x.\n",
+        reset_cfg->pca9641_reset_type, reset_cfg->rst_delay_b,
+        reset_cfg->rst_delay, reset_cfg->rst_delay_a);
+
+    if (reset_cfg->pca9641_reset_type == PCA9641_RESET_I2C) {
+
+        PCA_DEBUG("reset by i2c.\n");
+        reset_cfg->attr.i2c_attr.i2c_bus = i2c_mux_pca9641_device->attr.i2c_attr.i2c_bus;
+        reset_cfg->attr.i2c_attr.i2c_addr = i2c_mux_pca9641_device->attr.i2c_attr.i2c_addr;
+        reset_cfg->attr.i2c_attr.reg_offset = i2c_mux_pca9641_device->attr.i2c_attr.reg_offset;
+        reset_cfg->attr.i2c_attr.mask = i2c_mux_pca9641_device->attr.i2c_attr.mask;
+        reset_cfg->attr.i2c_attr.reset_on = i2c_mux_pca9641_device->attr.i2c_attr.reset_on;
+        reset_cfg->attr.i2c_attr.reset_off = i2c_mux_pca9641_device->attr.i2c_attr.reset_off;
+        PCA_DEBUG("bus:%u, addr:0x%x, offset:0x%x, mask:0x%x, on:0x%x, off:0x%x.\n",
+            reset_cfg->attr.i2c_attr.i2c_bus, reset_cfg->attr.i2c_attr.i2c_addr,
+            reset_cfg->attr.i2c_attr.reg_offset, reset_cfg->attr.i2c_attr.mask,
+            reset_cfg->attr.i2c_attr.reset_on, reset_cfg->attr.i2c_attr.reset_off);
+    } else if (reset_cfg->pca9641_reset_type == PCA9641_RESET_GPIO) {
+
+        PCA_DEBUG("reset by gpio.\n");
+        reset_cfg->attr.gpio_attr.gpio = i2c_mux_pca9641_device->attr.gpio_attr.gpio;
+        reset_cfg->attr.gpio_attr.reset_on = i2c_mux_pca9641_device->attr.gpio_attr.reset_on;
+        reset_cfg->attr.gpio_attr.reset_off = i2c_mux_pca9641_device->attr.gpio_attr.reset_off;
+        PCA_DEBUG("gpio number:%u, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.gpio_attr.gpio, reset_cfg->attr.gpio_attr.reset_on,
+            reset_cfg->attr.gpio_attr.reset_off);
+        reset_cfg->attr.gpio_attr.gpio_init = 0;
+    } else if (reset_cfg->pca9641_reset_type == PCA9641_RESET_IO) {
+
+        PCA_DEBUG("reset by io.\n");
+        reset_cfg->attr.io_attr.io_addr = i2c_mux_pca9641_device->attr.io_attr.io_addr;
+        reset_cfg->attr.io_attr.mask = i2c_mux_pca9641_device->attr.io_attr.mask;
+        reset_cfg->attr.io_attr.reset_on = i2c_mux_pca9641_device->attr.io_attr.reset_on;
+        reset_cfg->attr.io_attr.reset_off = i2c_mux_pca9641_device->attr.io_attr.reset_off;
+        PCA_DEBUG("io_addr:0x%x, mask:0x%x, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.io_attr.io_addr, reset_cfg->attr.io_attr.mask,
+            reset_cfg->attr.io_attr.reset_on, reset_cfg->attr.io_attr.reset_off);
+    } else if (reset_cfg->pca9641_reset_type == PCA9641_RESET_FILE) {
+
+        PCA_DEBUG("reset by file.\n");
+        reset_cfg->attr.file_attr.dev_name = i2c_mux_pca9641_device->attr.file_attr.dev_name;
+        reset_cfg->attr.file_attr.offset = i2c_mux_pca9641_device->attr.file_attr.offset;
+        reset_cfg->attr.file_attr.mask = i2c_mux_pca9641_device->attr.file_attr.mask;
+        reset_cfg->attr.file_attr.reset_on = i2c_mux_pca9641_device->attr.file_attr.reset_on;
+        reset_cfg->attr.file_attr.reset_off = i2c_mux_pca9641_device->attr.file_attr.reset_off;
+        PCA_DEBUG("dev_name:%s, mask:0x%x, reset_on:0x%x, reset_off:0x%x.\n",
+            reset_cfg->attr.file_attr.dev_name, reset_cfg->attr.file_attr.mask,
+            reset_cfg->attr.file_attr.reset_on, reset_cfg->attr.file_attr.reset_off);
+    } else {
+        PCA_DEBUG_ERR("Unsupport reset type:%d.\n", reset_cfg->pca9641_reset_type);
+        return -EINVAL;
+    }
+    return 0;
+}
+
+/*
+ * I2C init/probing/exit functions
+ */
+static int pca9541_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+    struct i2c_adapter *adap = client->adapter;
+    struct i2c_mux_core *muxc;
+    struct pca9541 *data;
+    int force;
+    int ret = -ENODEV;
+    int detect_id;
+    i2c_mux_pca9641_device_t *i2c_mux_pca9641_device;
+
+    if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA))
+        return -ENODEV;
+
+    detect_id = pca9641_detect_id(client);
+
+    /*
+     * I2C accesses are unprotected here.
+     * We have to lock the adapter before releasing the bus.
+     */
+    if (detect_id == 0) {
+        i2c_lock_bus(adap, I2C_LOCK_ROOT_ADAPTER);
+        pca9541_release_bus(client);
+        i2c_unlock_bus(adap, I2C_LOCK_ROOT_ADAPTER);
+    } else {
+        i2c_lock_bus(adap, I2C_LOCK_ROOT_ADAPTER);
+        pca9641_release_bus(client);
+        i2c_unlock_bus(adap, I2C_LOCK_ROOT_ADAPTER);
+    }
+
+    if (detect_id == 0) { /* pca9541 */
+        muxc = i2c_mux_alloc(adap, &client->dev, 1, sizeof(*data),
+                     I2C_MUX_ARBITRATOR,
+                     pca9541_select_chan, pca9541_release_chan);
+        if (!muxc)
+            return -ENOMEM;
+
+        data = i2c_mux_priv(muxc);
+        data->client = client;
+
+        i2c_set_clientdata(client, muxc);
+        /* Create mux adapter */
+        if (of_property_read_u32(client->dev.of_node, "pca9641_nr", &data->pca9641_nr)) {
+
+            force = 0;
+            PCA_DEBUG("pca9641_nr not found, use dynamic adap number.\n");
+        } else {
+            force = data->pca9641_nr;
+            PCA_DEBUG("pca9641_nr: %d.\n", force);
+        }
+
+        ret = i2c_mux_add_adapter(muxc, force, 0, 0);
+        if (ret)
+            return ret;
+    } else {
+        muxc = i2c_mux_alloc(adap, &client->dev, 1, sizeof(*data), I2C_MUX_ARBITRATOR,
+                   pca9641_select_chan, pca9641_release_chan);
+        if (!muxc) {
+            dev_err(&client->dev, "i2c_mux_alloc failed, out of memory.\n");
+            return -ENOMEM;
+        }
+
+        data = i2c_mux_priv(muxc);
+        data->client = client;
+
+        i2c_set_clientdata(client, muxc);
+
+        if (client->dev.of_node) {
+            ret= of_pca9641_reset_data_init(data);
+        } else {
+            ret= pca9641_reset_data_init(data);
+        }
+        if (ret < 0) {
+            dev_err(&client->dev, "pca9641 reset config err, ret:%d.\n", ret);
+            return ret;
+        }
+
+        if (client->dev.of_node == NULL) {
+            if (client->dev.platform_data == NULL) {
+                force = 0;
+                PCA_DEBUG("platform data is NULL, use dynamic adap number.\n");
+            } else {
+                i2c_mux_pca9641_device = client->dev.platform_data;
+                data->pca9641_nr = i2c_mux_pca9641_device->pca9641_nr;
+                if (data->pca9641_nr == 0) {
+                    force = 0;
+                    PCA_DEBUG("pca9641_nr = 0, use dynamic adap number.\n");
+                } else {
+                    force = data->pca9641_nr;
+                    PCA_DEBUG("pca9641_nr: %d.\n", force);
+                }
+            }
+        } else {
+            /* Create mux adapter */
+            if (of_property_read_u32(client->dev.of_node, "pca9641_nr", &data->pca9641_nr)) {
+
+                force = 0;
+                PCA_DEBUG("pca9641_nr not found, use dynamic adap number.\n");
+            } else {
+                force = data->pca9641_nr;
+                PCA_DEBUG("pca9641_nr: %d.\n", force);
+            }
+        }
+
+        ret = i2c_mux_add_adapter(muxc, force, 0, 0);
+        if (ret) {
+            dev_err(&client->dev, "Failed to register master selector.\n");
+            return ret;
+        }
+    }
+    pca9641_recordflag(muxc->adapter[0]);
+
+    dev_info(&client->dev, "registered master selector for I2C %s\n", client->name);
+
+    return 0;
+}
+
+static int pca9541_remove(struct i2c_client *client)
+{
+	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+
+	i2c_mux_del_adapters(muxc);
+	return 0;
+}
+
+static struct i2c_driver pca9641_driver = {
+	.driver = {
+		   .name = "wb_pca9641",
+           .of_match_table = of_match_ptr(pca9541_of_match),
+		   },
+	.probe = pca9541_probe,
+	.remove = pca9541_remove,
+	.id_table = pca9541_id,
+};
+
+module_i2c_driver(pca9641_driver);
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("PCA9541 I2C master selector driver");
+MODULE_LICENSE("GPL v2");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca9641.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca9641.h
new file mode 100644
index 000000000000..b87f7585567b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca9641.h
@@ -0,0 +1,64 @@
+#ifndef __WB_I2C_MUX_PCA9641_H__
+#define __WB_I2C_MUX_PCA9641_H__
+
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+typedef enum pca9641_reset_type_s {
+    PCA9641_RESET_NONE = 0,
+    PCA9641_RESET_I2C = 1,
+    PCA9641_RESET_GPIO = 2,
+    PCA9641_RESET_IO = 3,
+    PCA9641_RESET_FILE = 4,
+} pca9641_reset_type_t;
+
+typedef struct i2c_attr_s {
+    uint32_t i2c_bus;
+    uint32_t i2c_addr;
+    uint32_t reg_offset;
+    uint32_t mask;
+    uint32_t reset_on;
+    uint32_t reset_off;
+} i2c_attr_t;
+
+typedef struct io_attr_s {
+    uint32_t io_addr;
+    uint32_t mask;
+    uint32_t reset_on;
+    uint32_t reset_off;
+} io_attr_t;
+
+typedef struct file_attr_s {
+    const char *dev_name;
+    uint32_t offset;
+    uint32_t mask;
+    uint32_t reset_on;
+    uint32_t reset_off;
+} file_attr_t;
+
+typedef struct gpio_attr_s {
+    int gpio_init;
+    uint32_t gpio;
+    uint32_t reset_on;
+    uint32_t reset_off;
+} gpio_attr_t;
+
+typedef struct i2c_mux_pca9641_device_s {
+    struct i2c_client *client;
+    uint32_t i2c_bus;
+    uint32_t i2c_addr;
+    uint32_t pca9641_nr;
+    uint32_t pca9641_reset_type;
+    uint32_t rst_delay_b;                   /* delay time before reset(us) */
+    uint32_t rst_delay;                     /* reset time(us) */
+    uint32_t rst_delay_a;                   /* delay time after reset(us) */
+    union {
+        i2c_attr_t i2c_attr;
+        gpio_attr_t gpio_attr;
+        io_attr_t io_attr;
+        file_attr_t file_attr;
+    } attr;
+} i2c_mux_pca9641_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ina3221.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ina3221.c
new file mode 100644
index 000000000000..fba2c4e3a68e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ina3221.c
@@ -0,0 +1,1031 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * INA3221 Triple Current/Voltage Monitor
+ *
+ * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
+ *    Andrew F. Davis <afd@ti.com>
+ */
+
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/of.h>
+#include <linux/pm_runtime.h>
+#include <linux/regmap.h>
+#include <linux/util_macros.h>
+
+#define INA3221_DRIVER_NAME        "wb_ina3221"
+
+#define INA3221_CONFIG             0x00
+#define INA3221_SHUNT1             0x01
+#define INA3221_BUS1               0x02
+#define INA3221_SHUNT2             0x03
+#define INA3221_BUS2               0x04
+#define INA3221_SHUNT3             0x05
+#define INA3221_BUS3               0x06
+#define INA3221_CRIT1              0x07
+#define INA3221_WARN1              0x08
+#define INA3221_CRIT2              0x09
+#define INA3221_WARN2              0x0a
+#define INA3221_CRIT3              0x0b
+#define INA3221_WARN3              0x0c
+#define INA3221_SHUNT_SUM          0x0d
+#define INA3221_CRIT_SUM           0x0e
+#define INA3221_MASK_ENABLE        0x0f
+
+#define INA3221_CONFIG_MODE_MASK    GENMASK(2, 0)
+#define INA3221_CONFIG_MODE_POWERDOWN    0
+#define INA3221_CONFIG_MODE_SHUNT    BIT(0)
+#define INA3221_CONFIG_MODE_BUS        BIT(1)
+#define INA3221_CONFIG_MODE_CONTINUOUS    BIT(2)
+#define INA3221_CONFIG_VSH_CT_SHIFT    3
+#define INA3221_CONFIG_VSH_CT_MASK    GENMASK(5, 3)
+#define INA3221_CONFIG_VSH_CT(x)    (((x) & GENMASK(5, 3)) >> 3)
+#define INA3221_CONFIG_VBUS_CT_SHIFT    6
+#define INA3221_CONFIG_VBUS_CT_MASK    GENMASK(8, 6)
+#define INA3221_CONFIG_VBUS_CT(x)    (((x) & GENMASK(8, 6)) >> 6)
+#define INA3221_CONFIG_AVG_SHIFT    9
+#define INA3221_CONFIG_AVG_MASK        GENMASK(11, 9)
+#define INA3221_CONFIG_AVG(x)        (((x) & GENMASK(11, 9)) >> 9)
+#define INA3221_CONFIG_CHs_EN_MASK    GENMASK(14, 12)
+#define INA3221_CONFIG_CHx_EN(x)    BIT(14 - (x))
+
+#define INA3221_MASK_ENABLE_SCC_MASK    GENMASK(14, 12)
+
+#define INA3221_CONFIG_DEFAULT        0x7127
+#define INA3221_RSHUNT_DEFAULT        10000
+
+enum ina3221_fields {
+    /* Configuration */
+    F_RST,
+
+    /* Status Flags */
+    F_CVRF,
+
+    /* Warning Flags */
+    F_WF3, F_WF2, F_WF1,
+
+    /* Alert Flags: SF is the summation-alert flag */
+    F_SF, F_CF3, F_CF2, F_CF1,
+
+    /* sentinel */
+    F_MAX_FIELDS
+};
+
+static const struct reg_field ina3221_reg_fields[] = {
+    [F_RST] = REG_FIELD(INA3221_CONFIG, 15, 15),
+
+    [F_CVRF] = REG_FIELD(INA3221_MASK_ENABLE, 0, 0),
+    [F_WF3] = REG_FIELD(INA3221_MASK_ENABLE, 3, 3),
+    [F_WF2] = REG_FIELD(INA3221_MASK_ENABLE, 4, 4),
+    [F_WF1] = REG_FIELD(INA3221_MASK_ENABLE, 5, 5),
+    [F_SF] = REG_FIELD(INA3221_MASK_ENABLE, 6, 6),
+    [F_CF3] = REG_FIELD(INA3221_MASK_ENABLE, 7, 7),
+    [F_CF2] = REG_FIELD(INA3221_MASK_ENABLE, 8, 8),
+    [F_CF1] = REG_FIELD(INA3221_MASK_ENABLE, 9, 9),
+};
+
+enum ina3221_channels {
+    INA3221_CHANNEL1,
+    INA3221_CHANNEL2,
+    INA3221_CHANNEL3,
+    INA3221_NUM_CHANNELS
+};
+
+/**
+ * struct ina3221_input - channel input source specific information
+ * @label: label of channel input source
+ * @shunt_resistor: shunt resistor value of channel input source
+ * @disconnected: connection status of channel input source
+ */
+struct ina3221_input {
+    const char *label;
+    int shunt_resistor;
+    bool disconnected;
+};
+
+/**
+ * struct ina3221_data - device specific information
+ * @pm_dev: Device pointer for pm runtime
+ * @regmap: Register map of the device
+ * @fields: Register fields of the device
+ * @inputs: Array of channel input source specific structures
+ * @lock: mutex lock to serialize sysfs attribute accesses
+ * @reg_config: Register value of INA3221_CONFIG
+ * @summation_shunt_resistor: equivalent shunt resistor value for summation
+ * @single_shot: running in single-shot operating mode
+ */
+struct ina3221_data {
+    struct device *pm_dev;
+    struct regmap *regmap;
+    struct regmap_field *fields[F_MAX_FIELDS];
+    struct ina3221_input inputs[INA3221_NUM_CHANNELS];
+    struct mutex lock;
+    u32 reg_config;
+    int summation_shunt_resistor;
+
+    bool single_shot;
+};
+
+static inline bool ina3221_is_enabled(struct ina3221_data *ina, int channel)
+{
+    /* Summation channel checks shunt resistor values */
+    if (channel > INA3221_CHANNEL3)
+        return ina->summation_shunt_resistor != 0;
+
+    return pm_runtime_active(ina->pm_dev) &&
+           (ina->reg_config & INA3221_CONFIG_CHx_EN(channel));
+}
+
+/**
+ * Helper function to return the resistor value for current summation.
+ *
+ * There is a condition to calculate current summation -- all the shunt
+ * resistor values should be the same, so as to simply fit the formula:
+ *     current summation = shunt voltage summation / shunt resistor
+ *
+ * Returns the equivalent shunt resistor value on success or 0 on failure
+ */
+static inline int ina3221_summation_shunt_resistor(struct ina3221_data *ina)
+{
+    struct ina3221_input *input = ina->inputs;
+    int i, shunt_resistor = 0;
+
+    for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
+        if (input[i].disconnected || !input[i].shunt_resistor)
+            continue;
+        if (!shunt_resistor) {
+            /* Found the reference shunt resistor value */
+            shunt_resistor = input[i].shunt_resistor;
+        } else {
+            /* No summation if resistor values are different */
+            if (shunt_resistor != input[i].shunt_resistor)
+                return 0;
+        }
+    }
+
+    return shunt_resistor;
+}
+
+/* Lookup table for Bus and Shunt conversion times in usec */
+static const u16 ina3221_conv_time[] = {
+    140, 204, 332, 588, 1100, 2116, 4156, 8244,
+};
+
+/* Lookup table for number of samples using in averaging mode */
+static const int ina3221_avg_samples[] = {
+    1, 4, 16, 64, 128, 256, 512, 1024,
+};
+
+/* Converting update_interval in msec to conversion time in usec */
+static inline u32 ina3221_interval_ms_to_conv_time(u16 config, int interval)
+{
+    u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK);
+    u32 samples_idx = INA3221_CONFIG_AVG(config);
+    u32 samples = ina3221_avg_samples[samples_idx];
+
+    /* Bisect the result to Bus and Shunt conversion times */
+    return DIV_ROUND_CLOSEST(interval * 1000 / 2, channels * samples);
+}
+
+/* Converting CONFIG register value to update_interval in usec */
+static inline u32 ina3221_reg_to_interval_us(u16 config)
+{
+    u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK);
+    u32 vbus_ct_idx = INA3221_CONFIG_VBUS_CT(config);
+    u32 vsh_ct_idx = INA3221_CONFIG_VSH_CT(config);
+    u32 samples_idx = INA3221_CONFIG_AVG(config);
+    u32 samples = ina3221_avg_samples[samples_idx];
+    u32 vbus_ct = ina3221_conv_time[vbus_ct_idx];
+    u32 vsh_ct = ina3221_conv_time[vsh_ct_idx];
+
+    /* Calculate total conversion time */
+    return channels * (vbus_ct + vsh_ct) * samples;
+}
+
+static inline int ina3221_wait_for_data(struct ina3221_data *ina)
+{
+    u32 wait, cvrf;
+
+    wait = ina3221_reg_to_interval_us(ina->reg_config);
+
+    /* Polling the CVRF bit to make sure read data is ready */
+    return regmap_field_read_poll_timeout(ina->fields[F_CVRF],
+                          cvrf, cvrf, wait, wait * 2);
+}
+
+static int ina3221_read_value(struct ina3221_data *ina, unsigned int reg,
+                  int *val)
+{
+    unsigned int regval;
+    int ret;
+
+    ret = regmap_read(ina->regmap, reg, &regval);
+    if (ret)
+        return ret;
+
+    /*
+     * Shunt Voltage Sum register has 14-bit value with 1-bit shift
+     * Other Shunt Voltage registers have 12 bits with 3-bit shift
+     */
+    if (reg == INA3221_SHUNT_SUM)
+        *val = sign_extend32(regval >> 1, 14);
+    else
+        *val = sign_extend32(regval >> 3, 12);
+
+    return 0;
+}
+
+static const u8 ina3221_in_reg[] = {
+    INA3221_BUS1,
+    INA3221_BUS2,
+    INA3221_BUS3,
+    INA3221_SHUNT1,
+    INA3221_SHUNT2,
+    INA3221_SHUNT3,
+    INA3221_SHUNT_SUM,
+};
+
+static int ina3221_read_chip(struct device *dev, u32 attr, long *val)
+{
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    int regval;
+
+    switch (attr) {
+    case hwmon_chip_samples:
+        regval = INA3221_CONFIG_AVG(ina->reg_config);
+        *val = ina3221_avg_samples[regval];
+        return 0;
+    case hwmon_chip_update_interval:
+        /* Return in msec */
+        *val = ina3221_reg_to_interval_us(ina->reg_config);
+        *val = DIV_ROUND_CLOSEST(*val, 1000);
+        return 0;
+    default:
+        return -EOPNOTSUPP;
+    }
+}
+
+static int ina3221_read_in(struct device *dev, u32 attr, int channel, long *val)
+{
+    const bool is_shunt = channel > INA3221_CHANNEL3;
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    u8 reg = ina3221_in_reg[channel];
+    int regval, ret;
+
+    /*
+     * Translate shunt channel index to sensor channel index except
+     * the 7th channel (6 since being 0-aligned) is for summation.
+     */
+    if (channel != 6)
+        channel %= INA3221_NUM_CHANNELS;
+
+    switch (attr) {
+    case hwmon_in_input:
+        if (!ina3221_is_enabled(ina, channel))
+            return -ENODATA;
+
+        /* Write CONFIG register to trigger a single-shot measurement */
+        if (ina->single_shot)
+            regmap_write(ina->regmap, INA3221_CONFIG,
+                     ina->reg_config);
+
+        ret = ina3221_wait_for_data(ina);
+        if (ret)
+            return ret;
+
+        ret = ina3221_read_value(ina, reg, &regval);
+        if (ret)
+            return ret;
+
+        /*
+         * Scale of shunt voltage (uV): LSB is 40uV
+         * Scale of bus voltage (mV): LSB is 8mV
+         */
+        *val = regval * (is_shunt ? 40 : 8);
+        return 0;
+    case hwmon_in_enable:
+        *val = ina3221_is_enabled(ina, channel);
+        return 0;
+    default:
+        return -EOPNOTSUPP;
+    }
+}
+
+static const u8 ina3221_curr_reg[][INA3221_NUM_CHANNELS + 1] = {
+    [hwmon_curr_input] = { INA3221_SHUNT1, INA3221_SHUNT2,
+                   INA3221_SHUNT3, INA3221_SHUNT_SUM },
+    [hwmon_curr_max] = { INA3221_WARN1, INA3221_WARN2, INA3221_WARN3, 0 },
+    [hwmon_curr_crit] = { INA3221_CRIT1, INA3221_CRIT2,
+                  INA3221_CRIT3, INA3221_CRIT_SUM },
+    [hwmon_curr_max_alarm] = { F_WF1, F_WF2, F_WF3, 0 },
+    [hwmon_curr_crit_alarm] = { F_CF1, F_CF2, F_CF3, F_SF },
+};
+
+static int ina3221_read_curr(struct device *dev, u32 attr,
+                 int channel, long *val)
+{
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    struct ina3221_input *input = ina->inputs;
+    u8 reg = ina3221_curr_reg[attr][channel];
+    int resistance_uo, voltage_nv;
+    int regval, ret;
+
+    if (channel > INA3221_CHANNEL3)
+        resistance_uo = ina->summation_shunt_resistor;
+    else
+        resistance_uo = input[channel].shunt_resistor;
+
+    switch (attr) {
+    case hwmon_curr_input:
+        if (!ina3221_is_enabled(ina, channel))
+            return -ENODATA;
+
+        /* Write CONFIG register to trigger a single-shot measurement */
+        if (ina->single_shot)
+            regmap_write(ina->regmap, INA3221_CONFIG,
+                     ina->reg_config);
+
+        ret = ina3221_wait_for_data(ina);
+        if (ret)
+            return ret;
+
+        fallthrough;
+    case hwmon_curr_crit:
+    case hwmon_curr_max:
+        if (!resistance_uo)
+            return -ENODATA;
+
+        ret = ina3221_read_value(ina, reg, &regval);
+        if (ret)
+            return ret;
+
+        /* Scale of shunt voltage: LSB is 40uV (40000nV) */
+        voltage_nv = regval * 40000;
+        /* Return current in mA */
+        *val = DIV_ROUND_CLOSEST(voltage_nv, resistance_uo);
+        return 0;
+    case hwmon_curr_crit_alarm:
+    case hwmon_curr_max_alarm:
+        /* No actual register read if channel is disabled */
+        if (!ina3221_is_enabled(ina, channel)) {
+            /* Return 0 for alert flags */
+            *val = 0;
+            return 0;
+        }
+        ret = regmap_field_read(ina->fields[reg], &regval);
+        if (ret)
+            return ret;
+        *val = regval;
+        return 0;
+    default:
+        return -EOPNOTSUPP;
+    }
+}
+
+static int ina3221_write_chip(struct device *dev, u32 attr, long val)
+{
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    int ret, idx;
+    u32 tmp;
+
+    switch (attr) {
+    case hwmon_chip_samples:
+        idx = find_closest(val, ina3221_avg_samples,
+                   ARRAY_SIZE(ina3221_avg_samples));
+
+        tmp = (ina->reg_config & ~INA3221_CONFIG_AVG_MASK) |
+              (idx << INA3221_CONFIG_AVG_SHIFT);
+        ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
+        if (ret)
+            return ret;
+
+        /* Update reg_config accordingly */
+        ina->reg_config = tmp;
+        return 0;
+    case hwmon_chip_update_interval:
+        tmp = ina3221_interval_ms_to_conv_time(ina->reg_config, val);
+        idx = find_closest(tmp, ina3221_conv_time,
+                   ARRAY_SIZE(ina3221_conv_time));
+
+        /* Update Bus and Shunt voltage conversion times */
+        tmp = INA3221_CONFIG_VBUS_CT_MASK | INA3221_CONFIG_VSH_CT_MASK;
+        tmp = (ina->reg_config & ~tmp) |
+              (idx << INA3221_CONFIG_VBUS_CT_SHIFT) |
+              (idx << INA3221_CONFIG_VSH_CT_SHIFT);
+        ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
+        if (ret)
+            return ret;
+
+        /* Update reg_config accordingly */
+        ina->reg_config = tmp;
+        return 0;
+    default:
+        return -EOPNOTSUPP;
+    }
+}
+
+static int ina3221_write_curr(struct device *dev, u32 attr,
+                  int channel, long val)
+{
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    struct ina3221_input *input = ina->inputs;
+    u8 reg = ina3221_curr_reg[attr][channel];
+    int resistance_uo, current_ma, voltage_uv;
+    int regval;
+
+    if (channel > INA3221_CHANNEL3)
+        resistance_uo = ina->summation_shunt_resistor;
+    else
+        resistance_uo = input[channel].shunt_resistor;
+
+    if (!resistance_uo)
+        return -EOPNOTSUPP;
+
+    /* clamp current */
+    current_ma = clamp_val(val,
+                   INT_MIN / resistance_uo,
+                   INT_MAX / resistance_uo);
+
+    voltage_uv = DIV_ROUND_CLOSEST(current_ma * resistance_uo, 1000);
+
+    /* clamp voltage */
+    voltage_uv = clamp_val(voltage_uv, -163800, 163800);
+
+    /*
+     * Formula to convert voltage_uv to register value:
+     *     regval = (voltage_uv / scale) << shift
+     * Note:
+     *     The scale is 40uV for all shunt voltage registers
+     *     Shunt Voltage Sum register left-shifts 1 bit
+     *     All other Shunt Voltage registers shift 3 bits
+     * Results:
+     *     SHUNT_SUM: (1 / 40uV) << 1 = 1 / 20uV
+     *     SHUNT[1-3]: (1 / 40uV) << 3 = 1 / 5uV
+     */
+    if (reg == INA3221_SHUNT_SUM)
+        regval = DIV_ROUND_CLOSEST(voltage_uv, 20) & 0xfffe;
+    else
+        regval = DIV_ROUND_CLOSEST(voltage_uv, 5) & 0xfff8;
+
+    return regmap_write(ina->regmap, reg, regval);
+}
+
+static int ina3221_write_enable(struct device *dev, int channel, bool enable)
+{
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    u16 config, mask = INA3221_CONFIG_CHx_EN(channel);
+    u16 config_old = ina->reg_config & mask;
+    u32 tmp;
+    int ret;
+
+    config = enable ? mask : 0;
+
+    /* Bypass if enable status is not being changed */
+    if (config_old == config)
+        return 0;
+
+    /* For enabling routine, increase refcount and resume() at first */
+    if (enable) {
+        ret = pm_runtime_resume_and_get(ina->pm_dev);
+        if (ret < 0) {
+            dev_err(dev, "Failed to get PM runtime\n");
+            return ret;
+        }
+    }
+
+    /* Enable or disable the channel */
+    tmp = (ina->reg_config & ~mask) | (config & mask);
+    ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
+    if (ret)
+        goto fail;
+
+    /* Cache the latest config register value */
+    ina->reg_config = tmp;
+
+    /* For disabling routine, decrease refcount or suspend() at last */
+    if (!enable)
+        pm_runtime_put_sync(ina->pm_dev);
+
+    return 0;
+
+fail:
+    if (enable) {
+        dev_err(dev, "Failed to enable channel %d: error %d\n",
+            channel, ret);
+        pm_runtime_put_sync(ina->pm_dev);
+    }
+
+    return ret;
+}
+
+static int ina3221_read(struct device *dev, enum hwmon_sensor_types type,
+            u32 attr, int channel, long *val)
+{
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    int ret;
+
+    mutex_lock(&ina->lock);
+
+    switch (type) {
+    case hwmon_chip:
+        ret = ina3221_read_chip(dev, attr, val);
+        break;
+    case hwmon_in:
+        /* 0-align channel ID */
+        ret = ina3221_read_in(dev, attr, channel - 1, val);
+        break;
+    case hwmon_curr:
+        ret = ina3221_read_curr(dev, attr, channel, val);
+        break;
+    default:
+        ret = -EOPNOTSUPP;
+        break;
+    }
+
+    mutex_unlock(&ina->lock);
+
+    return ret;
+}
+
+static int ina3221_write(struct device *dev, enum hwmon_sensor_types type,
+             u32 attr, int channel, long val)
+{
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    int ret;
+
+    mutex_lock(&ina->lock);
+
+    switch (type) {
+    case hwmon_chip:
+        ret = ina3221_write_chip(dev, attr, val);
+        break;
+    case hwmon_in:
+        /* 0-align channel ID */
+        ret = ina3221_write_enable(dev, channel - 1, val);
+        break;
+    case hwmon_curr:
+        ret = ina3221_write_curr(dev, attr, channel, val);
+        break;
+    default:
+        ret = -EOPNOTSUPP;
+        break;
+    }
+
+    mutex_unlock(&ina->lock);
+
+    return ret;
+}
+
+static int ina3221_read_string(struct device *dev, enum hwmon_sensor_types type,
+                   u32 attr, int channel, const char **str)
+{
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    int index = channel - 1;
+
+    if (channel == 7)
+        *str = "sum of shunt voltages";
+    else
+        *str = ina->inputs[index].label;
+
+    return 0;
+}
+
+static umode_t ina3221_is_visible(const void *drvdata,
+                  enum hwmon_sensor_types type,
+                  u32 attr, int channel)
+{
+    const struct ina3221_data *ina = drvdata;
+    const struct ina3221_input *input = NULL;
+
+    switch (type) {
+    case hwmon_chip:
+        switch (attr) {
+        case hwmon_chip_samples:
+        case hwmon_chip_update_interval:
+            return 0644;
+        default:
+            return 0;
+        }
+    case hwmon_in:
+        /* Ignore in0_ */
+        if (channel == 0)
+            return 0;
+
+        switch (attr) {
+        case hwmon_in_label:
+            if (channel - 1 <= INA3221_CHANNEL3)
+                input = &ina->inputs[channel - 1];
+            else if (channel == 7)
+                return 0444;
+            /* Hide label node if label is not provided */
+            return (input && input->label) ? 0444 : 0;
+        case hwmon_in_input:
+            return 0444;
+        case hwmon_in_enable:
+            return 0644;
+        default:
+            return 0;
+        }
+    case hwmon_curr:
+        switch (attr) {
+        case hwmon_curr_input:
+        case hwmon_curr_crit_alarm:
+        case hwmon_curr_max_alarm:
+            return 0444;
+        case hwmon_curr_crit:
+        case hwmon_curr_max:
+            return 0644;
+        default:
+            return 0;
+        }
+    default:
+        return 0;
+    }
+}
+
+#define INA3221_HWMON_CURR_CONFIG (HWMON_C_INPUT | \
+                   HWMON_C_CRIT | HWMON_C_CRIT_ALARM | \
+                   HWMON_C_MAX | HWMON_C_MAX_ALARM)
+
+static const struct hwmon_channel_info *ina3221_info[] = {
+    HWMON_CHANNEL_INFO(chip,
+               HWMON_C_SAMPLES,
+               HWMON_C_UPDATE_INTERVAL),
+    HWMON_CHANNEL_INFO(in,
+               /* 0: dummy, skipped in is_visible */
+               HWMON_I_INPUT,
+               /* 1-3: input voltage Channels */
+               HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
+               HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
+               HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
+               /* 4-6: shunt voltage Channels */
+               HWMON_I_INPUT,
+               HWMON_I_INPUT,
+               HWMON_I_INPUT,
+               /* 7: summation of shunt voltage channels */
+               HWMON_I_INPUT | HWMON_I_LABEL),
+    HWMON_CHANNEL_INFO(curr,
+               /* 1-3: current channels*/
+               INA3221_HWMON_CURR_CONFIG,
+               INA3221_HWMON_CURR_CONFIG,
+               INA3221_HWMON_CURR_CONFIG,
+               /* 4: summation of current channels */
+               HWMON_C_INPUT | HWMON_C_CRIT | HWMON_C_CRIT_ALARM),
+    NULL
+};
+
+static const struct hwmon_ops ina3221_hwmon_ops = {
+    .is_visible = ina3221_is_visible,
+    .read_string = ina3221_read_string,
+    .read = ina3221_read,
+    .write = ina3221_write,
+};
+
+static const struct hwmon_chip_info ina3221_chip_info = {
+    .ops = &ina3221_hwmon_ops,
+    .info = ina3221_info,
+};
+
+/* Extra attribute groups */
+static ssize_t ina3221_shunt_show(struct device *dev,
+                  struct device_attribute *attr, char *buf)
+{
+    struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr);
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    unsigned int channel = sd_attr->index;
+    struct ina3221_input *input = &ina->inputs[channel];
+
+    return snprintf(buf, PAGE_SIZE, "%d\n", input->shunt_resistor);
+}
+
+static ssize_t ina3221_shunt_store(struct device *dev,
+                   struct device_attribute *attr,
+                   const char *buf, size_t count)
+{
+    struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr);
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    unsigned int channel = sd_attr->index;
+    struct ina3221_input *input = &ina->inputs[channel];
+    int val;
+    int ret;
+
+    ret = kstrtoint(buf, 0, &val);
+    if (ret)
+        return ret;
+
+    val = clamp_val(val, 1, INT_MAX);
+
+    input->shunt_resistor = val;
+
+    /* Update summation_shunt_resistor for summation channel */
+    ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina);
+
+    return count;
+}
+
+/* shunt resistance */
+static SENSOR_DEVICE_ATTR_RW(shunt1_resistor, ina3221_shunt, INA3221_CHANNEL1);
+static SENSOR_DEVICE_ATTR_RW(shunt2_resistor, ina3221_shunt, INA3221_CHANNEL2);
+static SENSOR_DEVICE_ATTR_RW(shunt3_resistor, ina3221_shunt, INA3221_CHANNEL3);
+
+static struct attribute *ina3221_attrs[] = {
+    &sensor_dev_attr_shunt1_resistor.dev_attr.attr,
+    &sensor_dev_attr_shunt2_resistor.dev_attr.attr,
+    &sensor_dev_attr_shunt3_resistor.dev_attr.attr,
+    NULL,
+};
+ATTRIBUTE_GROUPS(ina3221);
+
+static const struct regmap_range ina3221_yes_ranges[] = {
+    regmap_reg_range(INA3221_CONFIG, INA3221_BUS3),
+    regmap_reg_range(INA3221_SHUNT_SUM, INA3221_SHUNT_SUM),
+    regmap_reg_range(INA3221_MASK_ENABLE, INA3221_MASK_ENABLE),
+};
+
+static const struct regmap_access_table ina3221_volatile_table = {
+    .yes_ranges = ina3221_yes_ranges,
+    .n_yes_ranges = ARRAY_SIZE(ina3221_yes_ranges),
+};
+
+static const struct regmap_config ina3221_regmap_config = {
+    .reg_bits = 8,
+    .val_bits = 16,
+
+    .cache_type = REGCACHE_RBTREE,
+    .volatile_table = &ina3221_volatile_table,
+};
+
+static int ina3221_probe_child_from_dt(struct device *dev,
+                       struct device_node *child,
+                       struct ina3221_data *ina)
+{
+    struct ina3221_input *input;
+    u32 val;
+    int ret;
+
+    ret = of_property_read_u32(child, "reg", &val);
+    if (ret) {
+        dev_err(dev, "missing reg property of %pOFn\n", child);
+        return ret;
+    } else if (val > INA3221_CHANNEL3) {
+        dev_err(dev, "invalid reg %d of %pOFn\n", val, child);
+        return ret;
+    }
+
+    input = &ina->inputs[val];
+
+    /* Log the disconnected channel input */
+    if (!of_device_is_available(child)) {
+        input->disconnected = true;
+        return 0;
+    }
+
+    /* Save the connected input label if available */
+    of_property_read_string(child, "label", &input->label);
+
+    /* Overwrite default shunt resistor value optionally */
+    if (!of_property_read_u32(child, "shunt-resistor-micro-ohms", &val)) {
+        if (val < 1 || val > INT_MAX) {
+            dev_err(dev, "invalid shunt resistor value %u of %pOFn\n",
+                val, child);
+            return -EINVAL;
+        }
+        input->shunt_resistor = val;
+    }
+
+    return 0;
+}
+
+static int ina3221_probe_from_dt(struct device *dev, struct ina3221_data *ina)
+{
+    const struct device_node *np = dev->of_node;
+    struct device_node *child;
+    int ret;
+
+    /* Compatible with non-DT platforms */
+    if (!np)
+        return 0;
+
+    ina->single_shot = of_property_read_bool(np, "ti,single-shot");
+
+    for_each_child_of_node(np, child) {
+        ret = ina3221_probe_child_from_dt(dev, child, ina);
+        if (ret) {
+            of_node_put(child);
+            return ret;
+        }
+    }
+
+    return 0;
+}
+
+static int ina3221_probe(struct i2c_client *client)
+{
+    struct device *dev = &client->dev;
+    struct ina3221_data *ina;
+    struct device *hwmon_dev;
+    int i, ret;
+
+    ina = devm_kzalloc(dev, sizeof(*ina), GFP_KERNEL);
+    if (!ina)
+        return -ENOMEM;
+
+    ina->regmap = devm_regmap_init_i2c(client, &ina3221_regmap_config);
+    if (IS_ERR(ina->regmap)) {
+        dev_err(dev, "Unable to allocate register map\n");
+        return PTR_ERR(ina->regmap);
+    }
+
+    for (i = 0; i < F_MAX_FIELDS; i++) {
+        ina->fields[i] = devm_regmap_field_alloc(dev,
+                             ina->regmap,
+                             ina3221_reg_fields[i]);
+        if (IS_ERR(ina->fields[i])) {
+            dev_err(dev, "Unable to allocate regmap fields\n");
+            return PTR_ERR(ina->fields[i]);
+        }
+    }
+
+    for (i = 0; i < INA3221_NUM_CHANNELS; i++)
+        ina->inputs[i].shunt_resistor = INA3221_RSHUNT_DEFAULT;
+
+    ret = ina3221_probe_from_dt(dev, ina);
+    if (ret) {
+        dev_err(dev, "Unable to probe from device tree\n");
+        return ret;
+    }
+
+    /* The driver will be reset, so use reset value */
+    ina->reg_config = INA3221_CONFIG_DEFAULT;
+
+    /* Clear continuous bit to use single-shot mode */
+    if (ina->single_shot)
+        ina->reg_config &= ~INA3221_CONFIG_MODE_CONTINUOUS;
+
+    /* Disable channels if their inputs are disconnected */
+    for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
+        if (ina->inputs[i].disconnected)
+            ina->reg_config &= ~INA3221_CONFIG_CHx_EN(i);
+    }
+
+    /* Initialize summation_shunt_resistor for summation channel control */
+    ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina);
+
+    ina->pm_dev = dev;
+    mutex_init(&ina->lock);
+    dev_set_drvdata(dev, ina);
+
+    /* Enable PM runtime -- status is suspended by default */
+    pm_runtime_enable(ina->pm_dev);
+
+    /* Initialize (resume) the device */
+    for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
+        if (ina->inputs[i].disconnected)
+            continue;
+        /* Match the refcount with number of enabled channels */
+        ret = pm_runtime_get_sync(ina->pm_dev);
+        if (ret < 0)
+            goto fail;
+    }
+
+    hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, ina,
+                             &ina3221_chip_info,
+                             ina3221_groups);
+    if (IS_ERR(hwmon_dev)) {
+        dev_err(dev, "Unable to register hwmon device\n");
+        ret = PTR_ERR(hwmon_dev);
+        goto fail;
+    }
+
+    return 0;
+
+fail:
+    pm_runtime_disable(ina->pm_dev);
+    pm_runtime_set_suspended(ina->pm_dev);
+    /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */
+    for (i = 0; i < INA3221_NUM_CHANNELS; i++)
+        pm_runtime_put_noidle(ina->pm_dev);
+    mutex_destroy(&ina->lock);
+
+    return ret;
+}
+
+static int ina3221_remove(struct i2c_client *client)
+{
+    struct ina3221_data *ina = dev_get_drvdata(&client->dev);
+    int i;
+
+    pm_runtime_disable(ina->pm_dev);
+    pm_runtime_set_suspended(ina->pm_dev);
+
+    /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */
+    for (i = 0; i < INA3221_NUM_CHANNELS; i++)
+        pm_runtime_put_noidle(ina->pm_dev);
+
+    mutex_destroy(&ina->lock);
+
+    return 0;
+}
+
+static int __maybe_unused ina3221_suspend(struct device *dev)
+{
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    int ret;
+
+    /* Save config register value and enable cache-only */
+    ret = regmap_read(ina->regmap, INA3221_CONFIG, &ina->reg_config);
+    if (ret)
+        return ret;
+
+    /* Set to power-down mode for power saving */
+    ret = regmap_update_bits(ina->regmap, INA3221_CONFIG,
+                 INA3221_CONFIG_MODE_MASK,
+                 INA3221_CONFIG_MODE_POWERDOWN);
+    if (ret)
+        return ret;
+
+    regcache_cache_only(ina->regmap, true);
+    regcache_mark_dirty(ina->regmap);
+
+    return 0;
+}
+
+static int __maybe_unused ina3221_resume(struct device *dev)
+{
+    struct ina3221_data *ina = dev_get_drvdata(dev);
+    int ret;
+
+    regcache_cache_only(ina->regmap, false);
+
+    /* Software reset the chip */
+    ret = regmap_field_write(ina->fields[F_RST], true);
+    if (ret) {
+        dev_err(dev, "Unable to reset device\n");
+        return ret;
+    }
+
+    /* Restore cached register values to hardware */
+    ret = regcache_sync(ina->regmap);
+    if (ret)
+        return ret;
+
+    /* Restore config register value to hardware */
+    ret = regmap_write(ina->regmap, INA3221_CONFIG, ina->reg_config);
+    if (ret)
+        return ret;
+
+    /* Initialize summation channel control */
+    if (ina->summation_shunt_resistor) {
+        /*
+         * Take all three channels into summation by default
+         * Shunt measurements of disconnected channels should
+         * be 0, so it does not matter for summation.
+         */
+        ret = regmap_update_bits(ina->regmap, INA3221_MASK_ENABLE,
+                     INA3221_MASK_ENABLE_SCC_MASK,
+                     INA3221_MASK_ENABLE_SCC_MASK);
+        if (ret) {
+            dev_err(dev, "Unable to control summation channel\n");
+            return ret;
+        }
+    }
+
+    return 0;
+}
+
+static const struct dev_pm_ops ina3221_pm = {
+    SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
+                pm_runtime_force_resume)
+    SET_RUNTIME_PM_OPS(ina3221_suspend, ina3221_resume, NULL)
+};
+
+static const struct of_device_id ina3221_of_match_table[] = {
+    { .compatible = "ti,wb_ina3221", },
+    { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, ina3221_of_match_table);
+
+static const struct i2c_device_id ina3221_ids[] = {
+    { "wb_ina3221", 0 },
+    { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(i2c, ina3221_ids);
+
+static struct i2c_driver ina3221_i2c_driver = {
+    .probe_new = ina3221_probe,
+    .remove = ina3221_remove,
+    .driver = {
+        .name = INA3221_DRIVER_NAME,
+        .of_match_table = ina3221_of_match_table,
+        .pm = &ina3221_pm,
+    },
+    .id_table = ina3221_ids,
+};
+module_i2c_driver(ina3221_i2c_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("Texas Instruments INA3221 HWMon Driver");
+MODULE_LICENSE("GPL v2");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_isl68137.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_isl68137.c
new file mode 100644
index 000000000000..2797a831bd66
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_isl68137.c
@@ -0,0 +1,572 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Hardware monitoring driver for Renesas Digital Multiphase Voltage Regulators
+ *
+ * Copyright (c) 2017 Google Inc
+ * Copyright (c) 2020 Renesas Electronics America
+ *
+ */
+
+#include <linux/err.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/string.h>
+#include <linux/sysfs.h>
+
+#include "wb_pmbus.h"
+
+#define ISL68137_VOUT_AVS       (0x30)
+#define RAA_DMPVR2_READ_VMON    (0xc8)
+#define WRITE_PROTECT_CLOSE     (0x00)
+#define WRITE_PROTECT_OPEN      (0x40)
+
+static int g_wb_isl68137_debug = 0;
+static int g_wb_isl68137_error = 0;
+
+module_param(g_wb_isl68137_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_isl68137_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_ISL68137_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_isl68137_debug) { \
+        printk(KERN_INFO "[WB_ISL68137][VER][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_ISL68137_ERROR(fmt, args...) do {                                        \
+    if (g_wb_isl68137_error) { \
+        printk(KERN_ERR "[WB_ISL68137][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+enum chips {
+    isl68137,
+    isl68220,
+    isl68221,
+    isl68222,
+    isl68223,
+    isl68224,
+    isl68225,
+    isl68226,
+    isl68227,
+    isl68229,
+    isl68233,
+    isl68239,
+    isl69222,
+    isl69223,
+    isl69224,
+    isl69225,
+    isl69227,
+    isl69228,
+    isl69234,
+    isl69236,
+    isl69239,
+    isl69242,
+    isl69243,
+    isl69247,
+    isl69248,
+    isl69254,
+    isl69255,
+    isl69256,
+    isl69259,
+    isl69260,
+    isl69268,
+    isl69269,
+    isl69298,
+    raa228000,
+    raa228004,
+    raa228006,
+    raa228228,
+    raa229001,
+    raa229004,
+};
+
+enum variants {
+    raa_dmpvr1_2rail,
+    raa_dmpvr2_1rail,
+    raa_dmpvr2_2rail,
+    raa_dmpvr2_2rail_nontc,
+    raa_dmpvr2_3rail,
+    raa_dmpvr2_hv,
+};
+
+static const struct i2c_device_id raa_dmpvr_id[];
+
+static ssize_t isl68137_avs_enable_show_page(struct i2c_client *client,
+                         int page,
+                         char *buf)
+{
+    int val = wb_pmbus_read_byte_data(client, page, PMBUS_OPERATION);
+
+    return sprintf(buf, "%d\n",
+               (val & ISL68137_VOUT_AVS) == ISL68137_VOUT_AVS ? 1 : 0);
+}
+
+static ssize_t isl68137_avs_enable_store_page(struct i2c_client *client,
+                          int page,
+                          const char *buf, size_t count)
+{
+    int rc, op_val;
+    bool result;
+
+    rc = kstrtobool(buf, &result);
+    if (rc)
+        return rc;
+
+    op_val = result ? ISL68137_VOUT_AVS : 0;
+
+    /*
+     * Writes to VOUT setpoint over AVSBus will persist after the VRM is
+     * switched to PMBus control. Switching back to AVSBus control
+     * restores this persisted setpoint rather than re-initializing to
+     * PMBus VOUT_COMMAND. Writing VOUT_COMMAND first over PMBus before
+     * enabling AVS control is the workaround.
+     */
+    if (op_val == ISL68137_VOUT_AVS) {
+        rc = wb_pmbus_read_word_data(client, page, 0xff,
+                      PMBUS_VOUT_COMMAND);
+        if (rc < 0)
+            return rc;
+
+        rc = wb_pmbus_write_word_data(client, page, PMBUS_VOUT_COMMAND,
+                       rc);
+        if (rc < 0)
+            return rc;
+    }
+
+    rc = wb_pmbus_update_byte_data(client, page, PMBUS_OPERATION,
+                    ISL68137_VOUT_AVS, op_val);
+
+    return (rc < 0) ? rc : count;
+}
+
+static ssize_t isl68137_avs_enable_show(struct device *dev,
+                    struct device_attribute *devattr,
+                    char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+
+    return isl68137_avs_enable_show_page(client, attr->index, buf);
+}
+
+static ssize_t isl68137_avs_enable_store(struct device *dev,
+                struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+
+    return isl68137_avs_enable_store_page(client, attr->index, buf, count);
+}
+
+static ssize_t isl68137_avs_vout_show(struct device *dev, struct device_attribute *devattr,
+                   char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int ret, vout_cmd, vout;
+
+    mutex_lock(&data->update_lock);
+    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
+    if (vout_cmd < 0) {
+        WB_ISL68137_ERROR("%d-%04x: read page%d vout command reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, ret);
+        mutex_unlock(&data->update_lock);
+        return vout_cmd;
+    }
+    vout = vout_cmd * 1000;
+    WB_ISL68137_VERBOSE("%d-%04x: page%d, vout: %d, vout_cmd: 0x%x\n", client->adapter->nr,
+        client->addr, attr->index, vout, vout_cmd);
+    mutex_unlock(&data->update_lock);
+    return snprintf(buf, PAGE_SIZE, "%d\n", vout);
+}
+
+static ssize_t isl68137_avs_vout_store(struct device *dev, struct device_attribute *devattr,
+                   const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int vout, vout_max, vout_min;
+    int ret, vout_cmd, vout_cmd_set;
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    ret = kstrtoint(buf, 0, &vout);
+    if (ret) {
+        WB_ISL68137_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+
+    vout_max = data->vout_max[attr->index];
+    vout_min = data->vout_min[attr->index];
+    if ((vout > vout_max) || (vout < vout_min)) {
+        WB_ISL68137_ERROR("%d-%04x: vout value: %d, out of range [%d, %d] \n", client->adapter->nr,
+            client->addr, vout, vout_min, vout_max);
+        return -EINVAL;
+    }
+
+    /* calc VOUT_COMMAND set value */
+    vout_cmd_set = vout / 1000;
+    if (vout_cmd_set > 0xffff) {
+        WB_ISL68137_ERROR("%d-%04x: invalid value, vout %d, vout_cmd_set: 0x%x\n",
+            client->adapter->nr, client->addr, vout, vout_cmd_set);
+        return -EINVAL;
+    }
+
+    mutex_lock(&data->update_lock);
+
+    /* close write protect */
+    ret = wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, WRITE_PROTECT_CLOSE);
+    if (ret < 0) {
+        WB_ISL68137_ERROR("%d-%04x: close page%d write protect failed, ret: %d\n", client->adapter->nr,
+            client->addr, attr->index, ret);
+        mutex_unlock(&data->update_lock);
+        return ret;
+    }
+
+    /* set VOUT_COMMAND */
+    ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set);
+    if (ret < 0) {
+        WB_ISL68137_ERROR("%d-%04x: set page%d vout cmd reg: 0x%x, value: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set, ret);
+        goto error;
+    }
+
+    /* read back VOUT_COMMAND */
+    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
+    if (vout_cmd < 0) {
+        ret = vout_cmd;
+        WB_ISL68137_ERROR("%d-%04x: read page%d vout command reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, ret);
+        goto error;
+    }
+
+    /* compare vout_cmd and vout_cmd_set */
+    if (vout_cmd != vout_cmd_set) {
+        ret = -EIO;
+        WB_ISL68137_ERROR("%d-%04x: vout cmd value check error, vout cmd read: 0x%x, vout cmd set: 0x%x\n",
+            client->adapter->nr, client->addr, vout_cmd, vout_cmd_set);
+        goto error;
+    }
+
+    /* open write protect */
+    wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, WRITE_PROTECT_OPEN);
+    mutex_unlock(&data->update_lock);
+    WB_ISL68137_VERBOSE("%d-%04x: set page%d vout cmd success, vout %d, vout_cmd_set: 0x%x\n",
+        client->adapter->nr, client->addr, attr->index, vout, vout_cmd_set);
+    return count;
+error:
+    wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, WRITE_PROTECT_OPEN);
+    mutex_unlock(&data->update_lock);
+    return ret;
+}
+
+static ssize_t isl68137_avs_vout_max_store(struct device *dev,
+                   struct device_attribute *devattr, const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int ret, vout_threshold;
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    ret = kstrtoint(buf, 0, &vout_threshold);
+    if (ret) {
+        WB_ISL68137_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+
+    WB_ISL68137_VERBOSE("%d-%04x: vout%d max threshold: %d", client->adapter->nr, client->addr,
+        attr->index, vout_threshold);
+
+    data->vout_max[attr->index] = vout_threshold;
+    return count;
+}
+
+static ssize_t isl68137_avs_vout_max_show(struct device *dev,
+                   struct device_attribute *devattr, char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_max[attr->index]);
+}
+
+static ssize_t isl68137_avs_vout_min_store(struct device *dev,
+                   struct device_attribute *devattr, const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int ret, vout_threshold;
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    ret = kstrtoint(buf, 0, &vout_threshold);
+    if (ret) {
+        WB_ISL68137_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+
+    WB_ISL68137_VERBOSE("%d-%04x: vout%d min threshold: %d", client->adapter->nr, client->addr,
+        attr->index, vout_threshold);
+
+    data->vout_min[attr->index] = vout_threshold;
+    return count;
+}
+
+static ssize_t isl68137_avs_vout_min_show(struct device *dev,
+                   struct device_attribute *devattr, char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_ISL68137_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_min[attr->index]);
+}
+
+static SENSOR_DEVICE_ATTR_RW(avs0_enable, isl68137_avs_enable, 0);
+static SENSOR_DEVICE_ATTR_RW(avs1_enable, isl68137_avs_enable, 1);
+
+static SENSOR_DEVICE_ATTR_RW(avs0_vout, isl68137_avs_vout, 0);
+static SENSOR_DEVICE_ATTR_RW(avs1_vout, isl68137_avs_vout, 1);
+static SENSOR_DEVICE_ATTR_RW(avs0_vout_max, isl68137_avs_vout_max, 0);
+static SENSOR_DEVICE_ATTR_RW(avs0_vout_min, isl68137_avs_vout_min, 0);
+static SENSOR_DEVICE_ATTR_RW(avs1_vout_max, isl68137_avs_vout_max, 1);
+static SENSOR_DEVICE_ATTR_RW(avs1_vout_min, isl68137_avs_vout_min, 1);
+
+static struct attribute *enable_attrs[] = {
+    &sensor_dev_attr_avs0_enable.dev_attr.attr,
+    &sensor_dev_attr_avs1_enable.dev_attr.attr,
+    NULL,
+};
+
+static struct attribute *avs_ctrl_attrs[] = {
+    &sensor_dev_attr_avs0_vout.dev_attr.attr,
+    &sensor_dev_attr_avs1_vout.dev_attr.attr,
+    &sensor_dev_attr_avs0_vout_max.dev_attr.attr,
+    &sensor_dev_attr_avs0_vout_min.dev_attr.attr,
+    &sensor_dev_attr_avs1_vout_max.dev_attr.attr,
+    &sensor_dev_attr_avs1_vout_min.dev_attr.attr,
+    NULL,
+};
+
+static const struct attribute_group enable_group = {
+    .attrs = enable_attrs,
+};
+
+static const struct attribute_group avs_ctrl_group = {
+    .attrs = avs_ctrl_attrs,
+};
+
+static const struct attribute_group *isl68137_attribute_groups[] = {
+    &enable_group,
+    &avs_ctrl_group,
+    NULL,
+};
+
+static int raa_dmpvr2_read_word_data(struct i2c_client *client, int page,
+                     int phase, int reg)
+{
+    int ret;
+
+    switch (reg) {
+    case PMBUS_VIRT_READ_VMON:
+        ret = wb_pmbus_read_word_data(client, page, phase,
+                       RAA_DMPVR2_READ_VMON);
+        break;
+    default:
+        ret = -ENODATA;
+        break;
+    }
+
+    return ret;
+}
+
+static struct pmbus_driver_info raa_dmpvr_info = {
+    .pages = 3,
+    .format[PSC_VOLTAGE_IN] = direct,
+    .format[PSC_VOLTAGE_OUT] = direct,
+    .format[PSC_CURRENT_IN] = direct,
+    .format[PSC_CURRENT_OUT] = direct,
+    .format[PSC_POWER] = direct,
+    .format[PSC_TEMPERATURE] = direct,
+    .m[PSC_VOLTAGE_IN] = 1,
+    .b[PSC_VOLTAGE_IN] = 0,
+    .R[PSC_VOLTAGE_IN] = 2,
+    .m[PSC_VOLTAGE_OUT] = 1,
+    .b[PSC_VOLTAGE_OUT] = 0,
+    .R[PSC_VOLTAGE_OUT] = 3,
+    .m[PSC_CURRENT_IN] = 1,
+    .b[PSC_CURRENT_IN] = 0,
+    .R[PSC_CURRENT_IN] = 2,
+    .m[PSC_CURRENT_OUT] = 1,
+    .b[PSC_CURRENT_OUT] = 0,
+    .R[PSC_CURRENT_OUT] = 1,
+    .m[PSC_POWER] = 1,
+    .b[PSC_POWER] = 0,
+    .R[PSC_POWER] = 0,
+    .m[PSC_TEMPERATURE] = 1,
+    .b[PSC_TEMPERATURE] = 0,
+    .R[PSC_TEMPERATURE] = 0,
+    .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN
+        | PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP2
+        | PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_TEMP
+        | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
+        | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT
+        | PMBUS_HAVE_VMON,
+    .func[1] = PMBUS_HAVE_IIN | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT
+        | PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_TEMP
+        | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_IOUT
+        | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT,
+    .func[2] = PMBUS_HAVE_IIN | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT
+        | PMBUS_HAVE_TEMP | PMBUS_HAVE_TEMP3 | PMBUS_HAVE_STATUS_TEMP
+        | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT | PMBUS_HAVE_IOUT
+        | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT,
+};
+
+static int isl68137_probe(struct i2c_client *client)
+{
+    struct pmbus_driver_info *info;
+
+    info = devm_kzalloc(&client->dev, sizeof(*info), GFP_KERNEL);
+    if (!info)
+        return -ENOMEM;
+    memcpy(info, &raa_dmpvr_info, sizeof(*info));
+
+    switch (i2c_match_id(raa_dmpvr_id, client)->driver_data) {
+    case raa_dmpvr1_2rail:
+        info->pages = 2;
+        info->R[PSC_VOLTAGE_IN] = 3;
+        info->func[0] &= ~PMBUS_HAVE_VMON;
+        info->func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
+            | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
+            | PMBUS_HAVE_POUT;
+        info->groups = isl68137_attribute_groups;
+        break;
+    case raa_dmpvr2_1rail:
+        info->pages = 1;
+        info->read_word_data = raa_dmpvr2_read_word_data;
+        break;
+    case raa_dmpvr2_2rail_nontc:
+        info->func[0] &= ~PMBUS_HAVE_TEMP3;
+        info->func[1] &= ~PMBUS_HAVE_TEMP3;
+        fallthrough;
+    case raa_dmpvr2_2rail:
+        info->pages = 2;
+        info->read_word_data = raa_dmpvr2_read_word_data;
+        break;
+    case raa_dmpvr2_3rail:
+        info->read_word_data = raa_dmpvr2_read_word_data;
+        break;
+    case raa_dmpvr2_hv:
+        info->pages = 1;
+        info->R[PSC_VOLTAGE_IN] = 1;
+        info->m[PSC_VOLTAGE_OUT] = 2;
+        info->R[PSC_VOLTAGE_OUT] = 2;
+        info->m[PSC_CURRENT_IN] = 2;
+        info->m[PSC_POWER] = 2;
+        info->R[PSC_POWER] = -1;
+        info->read_word_data = raa_dmpvr2_read_word_data;
+        break;
+    default:
+        return -ENODEV;
+    }
+
+    return wb_pmbus_do_probe(client, info);
+}
+
+static const struct i2c_device_id raa_dmpvr_id[] = {
+    {"wb_isl68127", raa_dmpvr1_2rail},
+    {"wb_isl68137", raa_dmpvr1_2rail},
+    {"wb_isl68220", raa_dmpvr2_2rail},
+    {"wb_isl68221", raa_dmpvr2_3rail},
+    {"wb_isl68222", raa_dmpvr2_2rail},
+    {"wb_isl68223", raa_dmpvr2_2rail},
+    {"wb_isl68224", raa_dmpvr2_3rail},
+    {"wb_isl68225", raa_dmpvr2_2rail},
+    {"wb_isl68226", raa_dmpvr2_3rail},
+    {"wb_isl68227", raa_dmpvr2_1rail},
+    {"wb_isl68229", raa_dmpvr2_3rail},
+    {"wb_isl68233", raa_dmpvr2_2rail},
+    {"wb_isl68239", raa_dmpvr2_3rail},
+
+    {"wb_isl69222", raa_dmpvr2_2rail},
+    {"wb_isl69223", raa_dmpvr2_3rail},
+    {"wb_isl69224", raa_dmpvr2_2rail},
+    {"wb_isl69225", raa_dmpvr2_2rail},
+    {"wb_isl69227", raa_dmpvr2_3rail},
+    {"wb_isl69228", raa_dmpvr2_3rail},
+    {"wb_isl69234", raa_dmpvr2_2rail},
+    {"wb_isl69236", raa_dmpvr2_2rail},
+    {"wb_isl69239", raa_dmpvr2_3rail},
+    {"wb_isl69242", raa_dmpvr2_2rail},
+    {"wb_isl69243", raa_dmpvr2_1rail},
+    {"wb_isl69247", raa_dmpvr2_2rail},
+    {"wb_isl69248", raa_dmpvr2_2rail},
+    {"wb_isl69254", raa_dmpvr2_2rail},
+    {"wb_isl69255", raa_dmpvr2_2rail},
+    {"wb_isl69256", raa_dmpvr2_2rail},
+    {"wb_isl69259", raa_dmpvr2_2rail},
+    {"wb_isl69260", raa_dmpvr2_2rail},
+    {"wb_isl69268", raa_dmpvr2_2rail},
+    {"wb_isl69269", raa_dmpvr2_3rail},
+    {"wb_isl69298", raa_dmpvr2_2rail},
+
+    {"wb_raa228000", raa_dmpvr2_hv},
+    {"wb_raa228004", raa_dmpvr2_hv},
+    {"wb_raa228006", raa_dmpvr2_hv},
+    {"wb_raa228228", raa_dmpvr2_2rail_nontc},
+    {"wb_raa229001", raa_dmpvr2_2rail},
+    {"wb_raa229004", raa_dmpvr2_2rail},
+    {}
+};
+
+MODULE_DEVICE_TABLE(i2c, raa_dmpvr_id);
+
+/* This is the driver that will be inserted */
+static struct i2c_driver isl68137_driver = {
+    .driver = {
+           .name = "wb_isl68137",
+           },
+    .probe_new = isl68137_probe,
+    .remove = wb_pmbus_do_remove,
+    .id_table = raa_dmpvr_id,
+};
+
+module_i2c_driver(isl68137_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("PMBus driver for Renesas digital multiphase voltage regulators");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_lm75.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_lm75.c
new file mode 100644
index 000000000000..b8291c553688
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_lm75.c
@@ -0,0 +1,987 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * lm75.c - Part of lm_sensors, Linux kernel modules for hardware
+ *	 monitoring
+ * Copyright (c) 1998, 1999  Frodo Looijaard <frodol@dds.nl>
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/of_device.h>
+#include <linux/of.h>
+#include <linux/regmap.h>
+#include <linux/util_macros.h>
+#include <linux/regulator/consumer.h>
+#include <linux/delay.h>
+#include "wb_lm75.h"
+
+/*
+ * This driver handles the LM75 and compatible digital temperature sensors.
+ */
+
+enum lm75_type {		/* keep sorted in alphabetical order */
+	adt75,
+	ds1775,
+	ds75,
+	ds7505,
+	g751,
+	lm75,
+	lm75a,
+	lm75b,
+	max6625,
+	max6626,
+	max31725,
+	mcp980x,
+	pct2075,
+	stds75,
+	stlm75,
+	tcn75,
+	tmp100,
+	tmp101,
+	tmp105,
+	tmp112,
+	tmp175,
+	tmp275,
+	tmp75,
+	tmp75b,
+	tmp75c,
+};
+
+/**
+ * struct lm75_params - lm75 configuration parameters.
+ * @set_mask:		Bits to set in configuration register when configuring
+ *			the chip.
+ * @clr_mask:		Bits to clear in configuration register when configuring
+ *			the chip.
+ * @default_resolution:	Default number of bits to represent the temperature
+ *			value.
+ * @resolution_limits:	Limit register resolution. Optional. Should be set if
+ *			the resolution of limit registers does not match the
+ *			resolution of the temperature register.
+ * @resolutions:	List of resolutions associated with sample times.
+ *			Optional. Should be set if num_sample_times is larger
+ *			than 1, and if the resolution changes with sample times.
+ *			If set, number of entries must match num_sample_times.
+ * @default_sample_time:Sample time to be set by default.
+ * @num_sample_times:	Number of possible sample times to be set. Optional.
+ *			Should be set if the number of sample times is larger
+ *			than one.
+ * @sample_times:	All the possible sample times to be set. Mandatory if
+ *			num_sample_times is larger than 1. If set, number of
+ *			entries must match num_sample_times.
+ */
+
+struct lm75_params {
+	u8			set_mask;
+	u8			clr_mask;
+	u8			default_resolution;
+	u8			resolution_limits;
+	const u8		*resolutions;
+	unsigned int		default_sample_time;
+	u8			num_sample_times;
+	const unsigned int	*sample_times;
+};
+#if 0
+/* Addresses scanned */
+static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4b, 0x4c,
+					0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
+#endif
+/* The LM75 registers */
+#define LM75_REG_TEMP		0x00
+#define LM75_REG_CONF		0x01
+#define LM75_REG_HYST		0x02
+#define LM75_REG_MAX		0x03
+#define PCT2075_REG_IDLE	0x04
+#define LM75_TEMP_INVALID_RETRY_TIMES    (3)
+
+/* Each client has this additional data */
+struct lm75_data {
+	struct i2c_client		*client;
+	struct regmap			*regmap;
+	struct regulator		*vs;
+	u8				orig_conf;
+	u8				current_conf;
+	u8				resolution;	/* In bits, 9 to 16 */
+	unsigned int			sample_time;	/* In ms */
+	enum lm75_type			kind;
+	const struct lm75_params	*params;
+};
+
+/*-----------------------------------------------------------------------*/
+
+static const u8 lm75_sample_set_masks[] = { 0 << 5, 1 << 5, 2 << 5, 3 << 5 };
+
+#define LM75_SAMPLE_CLEAR_MASK	(3 << 5)
+
+/* The structure below stores the configuration values of the supported devices.
+ * In case of being supported multiple configurations, the default one must
+ * always be the first element of the array
+ */
+static const struct lm75_params device_params[] = {
+	[adt75] = {
+		.clr_mask = 1 << 5,	/* not one-shot mode */
+		.default_resolution = 12,
+		.default_sample_time = MSEC_PER_SEC / 10,
+	},
+	[ds1775] = {
+		.clr_mask = 3 << 5,
+		.set_mask = 2 << 5,	/* 11-bit mode */
+		.default_resolution = 11,
+		.default_sample_time = 500,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 125, 250, 500, 1000 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[ds75] = {
+		.clr_mask = 3 << 5,
+		.set_mask = 2 << 5,	/* 11-bit mode */
+		.default_resolution = 11,
+		.default_sample_time = 600,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 150, 300, 600, 1200 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[stds75] = {
+		.clr_mask = 3 << 5,
+		.set_mask = 2 << 5,	/* 11-bit mode */
+		.default_resolution = 11,
+		.default_sample_time = 600,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 150, 300, 600, 1200 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[stlm75] = {
+		.default_resolution = 9,
+		.default_sample_time = MSEC_PER_SEC / 6,
+	},
+	[ds7505] = {
+		.set_mask = 3 << 5,	/* 12-bit mode*/
+		.default_resolution = 12,
+		.default_sample_time = 200,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 25, 50, 100, 200 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[g751] = {
+		.default_resolution = 9,
+		.default_sample_time = MSEC_PER_SEC / 10,
+	},
+	[lm75] = {
+		.default_resolution = 9,
+		.default_sample_time = MSEC_PER_SEC / 10,
+	},
+	[lm75a] = {
+		.default_resolution = 9,
+		.default_sample_time = MSEC_PER_SEC / 10,
+	},
+	[lm75b] = {
+		.default_resolution = 11,
+		.default_sample_time = MSEC_PER_SEC / 10,
+	},
+	[max6625] = {
+		.default_resolution = 9,
+		.default_sample_time = MSEC_PER_SEC / 7,
+	},
+	[max6626] = {
+		.default_resolution = 12,
+		.default_sample_time = MSEC_PER_SEC / 7,
+		.resolution_limits = 9,
+	},
+	[max31725] = {
+		.default_resolution = 16,
+		.default_sample_time = MSEC_PER_SEC / 20,
+	},
+	[tcn75] = {
+		.default_resolution = 9,
+		.default_sample_time = MSEC_PER_SEC / 18,
+	},
+	[pct2075] = {
+		.default_resolution = 11,
+		.default_sample_time = MSEC_PER_SEC / 10,
+		.num_sample_times = 31,
+		.sample_times = (unsigned int []){ 100, 200, 300, 400, 500, 600,
+		700, 800, 900, 1000, 1100, 1200, 1300, 1400, 1500, 1600, 1700,
+		1800, 1900, 2000, 2100, 2200, 2300, 2400, 2500, 2600, 2700,
+		2800, 2900, 3000, 3100 },
+	},
+	[mcp980x] = {
+		.set_mask = 3 << 5,	/* 12-bit mode */
+		.clr_mask = 1 << 7,	/* not one-shot mode */
+		.default_resolution = 12,
+		.resolution_limits = 9,
+		.default_sample_time = 240,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 30, 60, 120, 240 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[tmp100] = {
+		.set_mask = 3 << 5,	/* 12-bit mode */
+		.clr_mask = 1 << 7,	/* not one-shot mode */
+		.default_resolution = 12,
+		.default_sample_time = 320,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 40, 80, 160, 320 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[tmp101] = {
+		.set_mask = 3 << 5,	/* 12-bit mode */
+		.clr_mask = 1 << 7,	/* not one-shot mode */
+		.default_resolution = 12,
+		.default_sample_time = 320,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 40, 80, 160, 320 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[tmp105] = {
+		.set_mask = 3 << 5,	/* 12-bit mode */
+		.clr_mask = 1 << 7,	/* not one-shot mode*/
+		.default_resolution = 12,
+		.default_sample_time = 220,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 28, 55, 110, 220 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[tmp112] = {
+		.set_mask = 3 << 5,	/* 8 samples / second */
+		.clr_mask = 1 << 7,	/* no one-shot mode*/
+		.default_resolution = 12,
+		.default_sample_time = 125,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 125, 250, 1000, 4000 },
+	},
+	[tmp175] = {
+		.set_mask = 3 << 5,	/* 12-bit mode */
+		.clr_mask = 1 << 7,	/* not one-shot mode*/
+		.default_resolution = 12,
+		.default_sample_time = 220,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 28, 55, 110, 220 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[tmp275] = {
+		.set_mask = 3 << 5,	/* 12-bit mode */
+		.clr_mask = 1 << 7,	/* not one-shot mode*/
+		.default_resolution = 12,
+		.default_sample_time = 220,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 28, 55, 110, 220 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[tmp75] = {
+		.set_mask = 3 << 5,	/* 12-bit mode */
+		.clr_mask = 1 << 7,	/* not one-shot mode*/
+		.default_resolution = 12,
+		.default_sample_time = 220,
+		.num_sample_times = 4,
+		.sample_times = (unsigned int []){ 28, 55, 110, 220 },
+		.resolutions = (u8 []) {9, 10, 11, 12 },
+	},
+	[tmp75b] = { /* not one-shot mode, Conversion rate 37Hz */
+		.clr_mask = 1 << 7 | 3 << 5,
+		.default_resolution = 12,
+		.default_sample_time = MSEC_PER_SEC / 37,
+		.sample_times = (unsigned int []){ MSEC_PER_SEC / 37,
+			MSEC_PER_SEC / 18,
+			MSEC_PER_SEC / 9, MSEC_PER_SEC / 4 },
+		.num_sample_times = 4,
+	},
+	[tmp75c] = {
+		.clr_mask = 1 << 5,	/*not one-shot mode*/
+		.default_resolution = 12,
+		.default_sample_time = MSEC_PER_SEC / 12,
+	}
+};
+
+/* input temp threshold check */
+typedef struct lm75_temp_threshold_s {
+    int chip_type;
+    int temp_max;
+    int temp_min;
+} lm75_temp_threshold_t;
+
+static lm75_temp_threshold_t g_lm75_temp_threshold_info[] = {
+    {
+        .chip_type = lm75,
+        .temp_max = 125000,
+        .temp_min = -55000,
+    },
+};
+
+/*-----------------------------------------------------------------------*/
+static int lm75_input_temp_check(struct lm75_data *data, int input_val)
+{
+    int i, size;
+
+    size = ARRAY_SIZE(g_lm75_temp_threshold_info);
+
+    for (i = 0; i < size; i++) {
+        if (g_lm75_temp_threshold_info[i].chip_type == data->kind) {
+            if ((input_val > g_lm75_temp_threshold_info[i].temp_max)
+                    || (input_val < g_lm75_temp_threshold_info[i].temp_min)) {
+                dev_dbg(&data->client->dev, "input temp: %d not in range[%d, %d]\n",
+                    input_val, g_lm75_temp_threshold_info[i].temp_min,
+                    g_lm75_temp_threshold_info[i].temp_max);
+                return -EINVAL;
+            }
+            dev_dbg(&data->client->dev, "input temp: %d in range[%d, %d]", input_val,
+                g_lm75_temp_threshold_info[i].temp_min, g_lm75_temp_threshold_info[i].temp_max);
+            return 0;
+        }
+    }
+    return 0;
+}
+
+static inline long lm75_reg_to_mc(s16 temp, u8 resolution)
+{
+	return ((temp >> (16 - resolution)) * 1000) >> (resolution - 8);
+}
+
+static int lm75_write_config(struct lm75_data *data, u8 set_mask,
+			     u8 clr_mask)
+{
+	u8 value;
+
+	clr_mask |= LM75_SHUTDOWN;
+	value = data->current_conf & ~clr_mask;
+	value |= set_mask;
+
+	if (data->current_conf != value) {
+		s32 err;
+
+		err = i2c_smbus_write_byte_data(data->client, LM75_REG_CONF,
+						value);
+		if (err)
+			return err;
+		data->current_conf = value;
+	}
+	return 0;
+}
+
+static int lm75_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel,
+               long *val)
+{
+    struct lm75_data *data = dev_get_drvdata(dev);
+    unsigned int regval;
+    int err, reg, i, ret;
+
+    switch (type) {
+    case hwmon_chip:
+        switch (attr) {
+        case hwmon_chip_update_interval:
+            *val = data->sample_time;
+            break;
+        default:
+            return -EINVAL;
+        }
+        break;
+    case hwmon_temp:
+        switch (attr) {
+        case hwmon_temp_input:
+            reg = LM75_REG_TEMP;
+            break;
+        case hwmon_temp_max:
+            reg = LM75_REG_MAX;
+            break;
+        case hwmon_temp_max_hyst:
+            reg = LM75_REG_HYST;
+            break;
+        default:
+            return -EINVAL;
+        }
+        for (i = 0; i < LM75_TEMP_INVALID_RETRY_TIMES; i++) {
+            err = regmap_read(data->regmap, reg, &regval);
+            if (err < 0) {
+                return err;
+            }
+            *val = lm75_reg_to_mc(regval, data->resolution);
+            if (attr != LM75_REG_TEMP) {
+                return 0;
+            }
+            /* do input_temp_check */
+            ret = lm75_input_temp_check(data, *val);
+            if (ret == 0) { /* input temp check ok */
+               return 0;
+            }
+            if ((i + 1) < LM75_TEMP_INVALID_RETRY_TIMES) {
+                msleep(data->sample_time);
+            }
+        }
+        dev_info(&data->client->dev, "temp_input value: %ld invalid\n", *val);
+        return -EINVAL;
+    default:
+        return -EINVAL;
+    }
+    return 0;
+}
+
+static int lm75_write_temp(struct device *dev, u32 attr, long temp)
+{
+	struct lm75_data *data = dev_get_drvdata(dev);
+	u8 resolution;
+	int reg;
+
+	switch (attr) {
+	case hwmon_temp_max:
+		reg = LM75_REG_MAX;
+		break;
+	case hwmon_temp_max_hyst:
+		reg = LM75_REG_HYST;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	/*
+	 * Resolution of limit registers is assumed to be the same as the
+	 * temperature input register resolution unless given explicitly.
+	 */
+	if (data->params->resolution_limits)
+		resolution = data->params->resolution_limits;
+	else
+		resolution = data->resolution;
+
+	temp = clamp_val(temp, LM75_TEMP_MIN, LM75_TEMP_MAX);
+	temp = DIV_ROUND_CLOSEST(temp  << (resolution - 8),
+				 1000) << (16 - resolution);
+
+	return regmap_write(data->regmap, reg, (u16)temp);
+}
+
+static int lm75_update_interval(struct device *dev, long val)
+{
+	struct lm75_data *data = dev_get_drvdata(dev);
+	unsigned int reg;
+	u8 index;
+	s32 err;
+
+	index = find_closest(val, data->params->sample_times,
+			     (int)data->params->num_sample_times);
+
+	switch (data->kind) {
+	default:
+		err = lm75_write_config(data, lm75_sample_set_masks[index],
+					LM75_SAMPLE_CLEAR_MASK);
+		if (err)
+			return err;
+
+		data->sample_time = data->params->sample_times[index];
+		if (data->params->resolutions)
+			data->resolution = data->params->resolutions[index];
+		break;
+	case tmp112:
+		err = regmap_read(data->regmap, LM75_REG_CONF, &reg);
+		if (err < 0)
+			return err;
+		reg &= ~0x00c0;
+		reg |= (3 - index) << 6;
+		err = regmap_write(data->regmap, LM75_REG_CONF, reg);
+		if (err < 0)
+			return err;
+		data->sample_time = data->params->sample_times[index];
+		break;
+	case pct2075:
+		err = i2c_smbus_write_byte_data(data->client, PCT2075_REG_IDLE,
+						index + 1);
+		if (err)
+			return err;
+		data->sample_time = data->params->sample_times[index];
+		break;
+	}
+	return 0;
+}
+
+static int lm75_write_chip(struct device *dev, u32 attr, long val)
+{
+	switch (attr) {
+	case hwmon_chip_update_interval:
+		return lm75_update_interval(dev, val);
+	default:
+		return -EINVAL;
+	}
+	return 0;
+}
+
+static int lm75_write(struct device *dev, enum hwmon_sensor_types type,
+		      u32 attr, int channel, long val)
+{
+	switch (type) {
+	case hwmon_chip:
+		return lm75_write_chip(dev, attr, val);
+	case hwmon_temp:
+		return lm75_write_temp(dev, attr, val);
+	default:
+		return -EINVAL;
+	}
+	return 0;
+}
+
+static umode_t lm75_is_visible(const void *data, enum hwmon_sensor_types type,
+			       u32 attr, int channel)
+{
+	const struct lm75_data *config_data = data;
+
+	switch (type) {
+	case hwmon_chip:
+		switch (attr) {
+		case hwmon_chip_update_interval:
+			if (config_data->params->num_sample_times > 1)
+				return 0644;
+			return 0444;
+		}
+		break;
+	case hwmon_temp:
+		switch (attr) {
+		case hwmon_temp_input:
+			return 0444;
+		case hwmon_temp_max:
+		case hwmon_temp_max_hyst:
+			return 0644;
+		}
+		break;
+	default:
+		break;
+	}
+	return 0;
+}
+
+static const struct hwmon_channel_info *lm75_info[] = {
+	HWMON_CHANNEL_INFO(chip,
+			   HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL),
+	HWMON_CHANNEL_INFO(temp,
+			   HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST),
+	NULL
+};
+
+static const struct hwmon_ops lm75_hwmon_ops = {
+	.is_visible = lm75_is_visible,
+	.read = lm75_read,
+	.write = lm75_write,
+};
+
+static const struct hwmon_chip_info lm75_chip_info = {
+	.ops = &lm75_hwmon_ops,
+	.info = lm75_info,
+};
+
+static bool lm75_is_writeable_reg(struct device *dev, unsigned int reg)
+{
+	return reg != LM75_REG_TEMP;
+}
+
+static bool lm75_is_volatile_reg(struct device *dev, unsigned int reg)
+{
+	return reg == LM75_REG_TEMP || reg == LM75_REG_CONF;
+}
+
+static const struct regmap_config lm75_regmap_config = {
+	.reg_bits = 8,
+	.val_bits = 16,
+	.max_register = PCT2075_REG_IDLE,
+	.writeable_reg = lm75_is_writeable_reg,
+	.volatile_reg = lm75_is_volatile_reg,
+	.val_format_endian = REGMAP_ENDIAN_BIG,
+	.cache_type = REGCACHE_RBTREE,
+	.use_single_read = true,
+	.use_single_write = true,
+};
+
+static void lm75_disable_regulator(void *data)
+{
+	struct lm75_data *lm75 = data;
+
+	regulator_disable(lm75->vs);
+}
+
+static void lm75_remove(void *data)
+{
+	struct lm75_data *lm75 = data;
+	struct i2c_client *client = lm75->client;
+
+	i2c_smbus_write_byte_data(client, LM75_REG_CONF, lm75->orig_conf);
+}
+
+static const struct i2c_device_id lm75_ids[];
+
+static int lm75_probe(struct i2c_client *client)
+{
+	struct device *dev = &client->dev;
+	struct device *hwmon_dev;
+	struct lm75_data *data;
+	int status, err;
+	enum lm75_type kind;
+
+	if (client->dev.of_node)
+		kind = (enum lm75_type)of_device_get_match_data(&client->dev);
+	else
+		kind = i2c_match_id(lm75_ids, client)->driver_data;
+
+	if (!i2c_check_functionality(client->adapter,
+			I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA))
+		return -EIO;
+
+	data = devm_kzalloc(dev, sizeof(struct lm75_data), GFP_KERNEL);
+	if (!data)
+		return -ENOMEM;
+
+	data->client = client;
+	data->kind = kind;
+
+	data->vs = devm_regulator_get(dev, "vs");
+	if (IS_ERR(data->vs))
+		return PTR_ERR(data->vs);
+
+	data->regmap = devm_regmap_init_i2c(client, &lm75_regmap_config);
+	if (IS_ERR(data->regmap))
+		return PTR_ERR(data->regmap);
+
+	/* Set to LM75 resolution (9 bits, 1/2 degree C) and range.
+	 * Then tweak to be more precise when appropriate.
+	 */
+
+	data->params = &device_params[data->kind];
+
+	/* Save default sample time and resolution*/
+	data->sample_time = data->params->default_sample_time;
+	data->resolution = data->params->default_resolution;
+
+	/* Enable the power */
+	err = regulator_enable(data->vs);
+	if (err) {
+		dev_err(dev, "failed to enable regulator: %d\n", err);
+		return err;
+	}
+
+	err = devm_add_action_or_reset(dev, lm75_disable_regulator, data);
+	if (err)
+		return err;
+
+	/* Cache original configuration */
+	status = i2c_smbus_read_byte_data(client, LM75_REG_CONF);
+	if (status < 0) {
+		dev_dbg(dev, "Can't read config? %d\n", status);
+		return status;
+	}
+	data->orig_conf = status;
+	data->current_conf = status;
+
+	err = lm75_write_config(data, data->params->set_mask,
+				data->params->clr_mask);
+	if (err)
+		return err;
+
+	err = devm_add_action_or_reset(dev, lm75_remove, data);
+	if (err)
+		return err;
+
+	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
+							 data, &lm75_chip_info,
+							 NULL);
+	if (IS_ERR(hwmon_dev))
+		return PTR_ERR(hwmon_dev);
+
+	dev_info(dev, "%s: sensor '%s'\n", dev_name(hwmon_dev), client->name);
+
+	return 0;
+}
+
+static const struct i2c_device_id lm75_ids[] = {
+	{ "wb_adt75", adt75, },
+	{ "wb_ds1775", ds1775, },
+	{ "wb_ds75", ds75, },
+	{ "wb_ds7505", ds7505, },
+	{ "wb_g751", g751, },
+	{ "wb_lm75", lm75, },
+	{ "wb_lm75a", lm75a, },
+	{ "wb_lm75b", lm75b, },
+	{ "wb_max6625", max6625, },
+	{ "wb_max6626", max6626, },
+	{ "wb_max31725", max31725, },
+	{ "wb_max31726", max31725, },
+	{ "wb_mcp980x", mcp980x, },
+	{ "wb_pct2075", pct2075, },
+	{ "wb_stds75", stds75, },
+	{ "wb_stlm75", stlm75, },
+	{ "wb_tcn75", tcn75, },
+	{ "wb_tmp100", tmp100, },
+	{ "wb_tmp101", tmp101, },
+	{ "wb_tmp105", tmp105, },
+	{ "wb_tmp112", tmp112, },
+	{ "wb_tmp175", tmp175, },
+	{ "wb_tmp275", tmp275, },
+	{ "wb_tmp75", tmp75, },
+	{ "wb_tmp75b", tmp75b, },
+	{ "wb_tmp75c", tmp75c, },
+	{ /* LIST END */ }
+};
+MODULE_DEVICE_TABLE(i2c, lm75_ids);
+
+static const struct of_device_id __maybe_unused lm75_of_match[] = {
+	{
+		.compatible = "adi,adt75",
+		.data = (void *)adt75
+	},
+	{
+		.compatible = "dallas,ds1775",
+		.data = (void *)ds1775
+	},
+	{
+		.compatible = "dallas,ds75",
+		.data = (void *)ds75
+	},
+	{
+		.compatible = "dallas,ds7505",
+		.data = (void *)ds7505
+	},
+	{
+		.compatible = "gmt,g751",
+		.data = (void *)g751
+	},
+	{
+		.compatible = "national,lm75",
+		.data = (void *)lm75
+	},
+	{
+		.compatible = "national,lm75a",
+		.data = (void *)lm75a
+	},
+	{
+		.compatible = "national,lm75b",
+		.data = (void *)lm75b
+	},
+	{
+		.compatible = "maxim,max6625",
+		.data = (void *)max6625
+	},
+	{
+		.compatible = "maxim,max6626",
+		.data = (void *)max6626
+	},
+	{
+		.compatible = "maxim,max31725",
+		.data = (void *)max31725
+	},
+	{
+		.compatible = "maxim,max31726",
+		.data = (void *)max31725
+	},
+	{
+		.compatible = "maxim,mcp980x",
+		.data = (void *)mcp980x
+	},
+	{
+		.compatible = "nxp,pct2075",
+		.data = (void *)pct2075
+	},
+	{
+		.compatible = "st,stds75",
+		.data = (void *)stds75
+	},
+	{
+		.compatible = "st,stlm75",
+		.data = (void *)stlm75
+	},
+	{
+		.compatible = "microchip,tcn75",
+		.data = (void *)tcn75
+	},
+	{
+		.compatible = "ti,tmp100",
+		.data = (void *)tmp100
+	},
+	{
+		.compatible = "ti,tmp101",
+		.data = (void *)tmp101
+	},
+	{
+		.compatible = "ti,tmp105",
+		.data = (void *)tmp105
+	},
+	{
+		.compatible = "ti,tmp112",
+		.data = (void *)tmp112
+	},
+	{
+		.compatible = "ti,tmp175",
+		.data = (void *)tmp175
+	},
+	{
+		.compatible = "ti,tmp275",
+		.data = (void *)tmp275
+	},
+	{
+		.compatible = "ti,tmp75",
+		.data = (void *)tmp75
+	},
+	{
+		.compatible = "ti,tmp75b",
+		.data = (void *)tmp75b
+	},
+	{
+		.compatible = "ti,tmp75c",
+		.data = (void *)tmp75c
+	},
+	{ },
+};
+MODULE_DEVICE_TABLE(of, lm75_of_match);
+
+#define LM75A_ID 0xA1
+#if 0
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int lm75_detect(struct i2c_client *new_client,
+		       struct i2c_board_info *info)
+{
+	struct i2c_adapter *adapter = new_client->adapter;
+	int i;
+	int conf, hyst, os;
+	bool is_lm75a = 0;
+
+	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA |
+				     I2C_FUNC_SMBUS_WORD_DATA))
+		return -ENODEV;
+
+	/*
+	 * Now, we do the remaining detection. There is no identification-
+	 * dedicated register so we have to rely on several tricks:
+	 * unused bits, registers cycling over 8-address boundaries,
+	 * addresses 0x04-0x07 returning the last read value.
+	 * The cycling+unused addresses combination is not tested,
+	 * since it would significantly slow the detection down and would
+	 * hardly add any value.
+	 *
+	 * The National Semiconductor LM75A is different than earlier
+	 * LM75s.  It has an ID byte of 0xaX (where X is the chip
+	 * revision, with 1 being the only revision in existence) in
+	 * register 7, and unused registers return 0xff rather than the
+	 * last read value.
+	 *
+	 * Note that this function only detects the original National
+	 * Semiconductor LM75 and the LM75A. Clones from other vendors
+	 * aren't detected, on purpose, because they are typically never
+	 * found on PC hardware. They are found on embedded designs where
+	 * they can be instantiated explicitly so detection is not needed.
+	 * The absence of identification registers on all these clones
+	 * would make their exhaustive detection very difficult and weak,
+	 * and odds are that the driver would bind to unsupported devices.
+	 */
+
+	/* Unused bits */
+	conf = i2c_smbus_read_byte_data(new_client, 1);
+	if (conf & 0xe0)
+		return -ENODEV;
+
+	/* First check for LM75A */
+	if (i2c_smbus_read_byte_data(new_client, 7) == LM75A_ID) {
+		/*
+		 * LM75A returns 0xff on unused registers so
+		 * just to be sure we check for that too.
+		 */
+		if (i2c_smbus_read_byte_data(new_client, 4) != 0xff
+		 || i2c_smbus_read_byte_data(new_client, 5) != 0xff
+		 || i2c_smbus_read_byte_data(new_client, 6) != 0xff)
+			return -ENODEV;
+		is_lm75a = 1;
+		hyst = i2c_smbus_read_byte_data(new_client, 2);
+		os = i2c_smbus_read_byte_data(new_client, 3);
+	} else { /* Traditional style LM75 detection */
+		/* Unused addresses */
+		hyst = i2c_smbus_read_byte_data(new_client, 2);
+		if (i2c_smbus_read_byte_data(new_client, 4) != hyst
+		 || i2c_smbus_read_byte_data(new_client, 5) != hyst
+		 || i2c_smbus_read_byte_data(new_client, 6) != hyst
+		 || i2c_smbus_read_byte_data(new_client, 7) != hyst)
+			return -ENODEV;
+		os = i2c_smbus_read_byte_data(new_client, 3);
+		if (i2c_smbus_read_byte_data(new_client, 4) != os
+		 || i2c_smbus_read_byte_data(new_client, 5) != os
+		 || i2c_smbus_read_byte_data(new_client, 6) != os
+		 || i2c_smbus_read_byte_data(new_client, 7) != os)
+			return -ENODEV;
+	}
+	/*
+	 * It is very unlikely that this is a LM75 if both
+	 * hysteresis and temperature limit registers are 0.
+	 */
+	if (hyst == 0 && os == 0)
+		return -ENODEV;
+
+	/* Addresses cycling */
+	for (i = 8; i <= 248; i += 40) {
+		if (i2c_smbus_read_byte_data(new_client, i + 1) != conf
+		 || i2c_smbus_read_byte_data(new_client, i + 2) != hyst
+		 || i2c_smbus_read_byte_data(new_client, i + 3) != os)
+			return -ENODEV;
+		if (is_lm75a && i2c_smbus_read_byte_data(new_client, i + 7)
+				!= LM75A_ID)
+			return -ENODEV;
+	}
+
+	strlcpy(info->type, is_lm75a ? "lm75a" : "lm75", I2C_NAME_SIZE);
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_PM
+static int lm75_suspend(struct device *dev)
+{
+	int status;
+	struct i2c_client *client = to_i2c_client(dev);
+
+	status = i2c_smbus_read_byte_data(client, LM75_REG_CONF);
+	if (status < 0) {
+		dev_dbg(&client->dev, "Can't read config? %d\n", status);
+		return status;
+	}
+	status = status | LM75_SHUTDOWN;
+	i2c_smbus_write_byte_data(client, LM75_REG_CONF, status);
+	return 0;
+}
+
+static int lm75_resume(struct device *dev)
+{
+	int status;
+	struct i2c_client *client = to_i2c_client(dev);
+
+	status = i2c_smbus_read_byte_data(client, LM75_REG_CONF);
+	if (status < 0) {
+		dev_dbg(&client->dev, "Can't read config? %d\n", status);
+		return status;
+	}
+	status = status & ~LM75_SHUTDOWN;
+	i2c_smbus_write_byte_data(client, LM75_REG_CONF, status);
+	return 0;
+}
+
+static const struct dev_pm_ops lm75_dev_pm_ops = {
+	.suspend	= lm75_suspend,
+	.resume		= lm75_resume,
+};
+#define LM75_DEV_PM_OPS (&lm75_dev_pm_ops)
+#else
+#define LM75_DEV_PM_OPS NULL
+#endif /* CONFIG_PM */
+
+static struct i2c_driver lm75_driver = {
+	.class		= I2C_CLASS_HWMON,
+	.driver = {
+		.name	= "wb_lm75",
+		.of_match_table = of_match_ptr(lm75_of_match),
+		.pm	= LM75_DEV_PM_OPS,
+	},
+	.probe_new	= lm75_probe,
+	.id_table	= lm75_ids,
+	/* .detect		= lm75_detect, */
+	/* .address_list	= normal_i2c, */
+};
+
+module_i2c_driver(lm75_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("LM75 driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_lm75.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_lm75.h
new file mode 100644
index 000000000000..a398171162a8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_lm75.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * lm75.h - Part of lm_sensors, Linux kernel modules for hardware monitoring
+ * Copyright (c) 2003 Mark M. Hoffman <mhoffman@lightlink.com>
+ */
+
+/*
+ * This file contains common code for encoding/decoding LM75 type
+ * temperature readings, which are emulated by many of the chips
+ * we support.  As the user is unlikely to load more than one driver
+ * which contains this code, we don't worry about the wasted space.
+ */
+
+#include <linux/kernel.h>
+
+/* straight from the datasheet */
+#define LM75_TEMP_MIN (-55000)
+#define LM75_TEMP_MAX 125000
+#define LM75_SHUTDOWN 0x01
+
+/*
+ * TEMP: 0.001C/bit (-55C to +125C)
+ * REG: (0.5C/bit, two's complement) << 7
+ */
+static inline u16 LM75_TEMP_TO_REG(long temp)
+{
+	int ntemp = clamp_val(temp, LM75_TEMP_MIN, LM75_TEMP_MAX);
+
+	ntemp += (ntemp < 0 ? -250 : 250);
+	return (u16)((ntemp / 500) << 7);
+}
+
+static inline int LM75_TEMP_FROM_REG(u16 reg)
+{
+	/*
+	 * use integer division instead of equivalent right shift to
+	 * guarantee arithmetic shift and preserve the sign
+	 */
+	return ((s16)reg / 128) * 500;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus.h
new file mode 100644
index 000000000000..9fb2c9017ae6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus.h
@@ -0,0 +1,535 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * wb_pmbus.h - Common defines and structures for PMBus devices
+ *
+ * Copyright (c) 2010, 2011 Ericsson AB.
+ * Copyright (c) 2012 Guenter Roeck
+ */
+
+#ifndef WB_PMBUS_H
+#define WB_PMBUS_H
+
+#include <linux/bitops.h>
+#include <linux/regulator/driver.h>
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+/*
+ * Registers
+ */
+enum pmbus_regs {
+    PMBUS_PAGE            = 0x00,
+    PMBUS_OPERATION            = 0x01,
+    PMBUS_ON_OFF_CONFIG        = 0x02,
+    PMBUS_CLEAR_FAULTS        = 0x03,
+    PMBUS_PHASE            = 0x04,
+
+    PMBUS_WRITE_PROTECT        = 0x10,
+
+    PMBUS_CAPABILITY        = 0x19,
+    PMBUS_QUERY            = 0x1A,
+
+    PMBUS_VOUT_MODE            = 0x20,
+    PMBUS_VOUT_COMMAND        = 0x21,
+    PMBUS_VOUT_TRIM            = 0x22,
+    PMBUS_VOUT_CAL_OFFSET        = 0x23,
+    PMBUS_VOUT_MAX            = 0x24,
+    PMBUS_VOUT_MARGIN_HIGH        = 0x25,
+    PMBUS_VOUT_MARGIN_LOW        = 0x26,
+    PMBUS_VOUT_TRANSITION_RATE    = 0x27,
+    PMBUS_VOUT_DROOP        = 0x28,
+    PMBUS_VOUT_SCALE_LOOP        = 0x29,
+    PMBUS_VOUT_SCALE_MONITOR    = 0x2A,
+
+    PMBUS_COEFFICIENTS        = 0x30,
+    PMBUS_POUT_MAX            = 0x31,
+
+    PMBUS_FAN_CONFIG_12        = 0x3A,
+    PMBUS_FAN_COMMAND_1        = 0x3B,
+    PMBUS_FAN_COMMAND_2        = 0x3C,
+    PMBUS_FAN_CONFIG_34        = 0x3D,
+    PMBUS_FAN_COMMAND_3        = 0x3E,
+    PMBUS_FAN_COMMAND_4        = 0x3F,
+
+    PMBUS_VOUT_OV_FAULT_LIMIT    = 0x40,
+    PMBUS_VOUT_OV_FAULT_RESPONSE    = 0x41,
+    PMBUS_VOUT_OV_WARN_LIMIT    = 0x42,
+    PMBUS_VOUT_UV_WARN_LIMIT    = 0x43,
+    PMBUS_VOUT_UV_FAULT_LIMIT    = 0x44,
+    PMBUS_VOUT_UV_FAULT_RESPONSE    = 0x45,
+    PMBUS_IOUT_OC_FAULT_LIMIT    = 0x46,
+    PMBUS_IOUT_OC_FAULT_RESPONSE    = 0x47,
+    PMBUS_IOUT_OC_LV_FAULT_LIMIT    = 0x48,
+    PMBUS_IOUT_OC_LV_FAULT_RESPONSE    = 0x49,
+    PMBUS_IOUT_OC_WARN_LIMIT    = 0x4A,
+    PMBUS_IOUT_UC_FAULT_LIMIT    = 0x4B,
+    PMBUS_IOUT_UC_FAULT_RESPONSE    = 0x4C,
+
+    PMBUS_OT_FAULT_LIMIT        = 0x4F,
+    PMBUS_OT_FAULT_RESPONSE        = 0x50,
+    PMBUS_OT_WARN_LIMIT        = 0x51,
+    PMBUS_UT_WARN_LIMIT        = 0x52,
+    PMBUS_UT_FAULT_LIMIT        = 0x53,
+    PMBUS_UT_FAULT_RESPONSE        = 0x54,
+    PMBUS_VIN_OV_FAULT_LIMIT    = 0x55,
+    PMBUS_VIN_OV_FAULT_RESPONSE    = 0x56,
+    PMBUS_VIN_OV_WARN_LIMIT        = 0x57,
+    PMBUS_VIN_UV_WARN_LIMIT        = 0x58,
+    PMBUS_VIN_UV_FAULT_LIMIT    = 0x59,
+
+    PMBUS_IIN_OC_FAULT_LIMIT    = 0x5B,
+    PMBUS_IIN_OC_WARN_LIMIT        = 0x5D,
+
+    PMBUS_POUT_OP_FAULT_LIMIT    = 0x68,
+    PMBUS_POUT_OP_WARN_LIMIT    = 0x6A,
+    PMBUS_PIN_OP_WARN_LIMIT        = 0x6B,
+
+    PMBUS_STATUS_BYTE        = 0x78,
+    PMBUS_STATUS_WORD        = 0x79,
+    PMBUS_STATUS_VOUT        = 0x7A,
+    PMBUS_STATUS_IOUT        = 0x7B,
+    PMBUS_STATUS_INPUT        = 0x7C,
+    PMBUS_STATUS_TEMPERATURE    = 0x7D,
+    PMBUS_STATUS_CML        = 0x7E,
+    PMBUS_STATUS_OTHER        = 0x7F,
+    PMBUS_STATUS_MFR_SPECIFIC    = 0x80,
+    PMBUS_STATUS_FAN_12        = 0x81,
+    PMBUS_STATUS_FAN_34        = 0x82,
+
+    PMBUS_READ_VIN            = 0x88,
+    PMBUS_READ_IIN            = 0x89,
+    PMBUS_READ_VCAP            = 0x8A,
+    PMBUS_READ_VOUT            = 0x8B,
+    PMBUS_READ_IOUT            = 0x8C,
+    PMBUS_READ_TEMPERATURE_1    = 0x8D,
+    PMBUS_READ_TEMPERATURE_2    = 0x8E,
+    PMBUS_READ_TEMPERATURE_3    = 0x8F,
+    PMBUS_READ_FAN_SPEED_1        = 0x90,
+    PMBUS_READ_FAN_SPEED_2        = 0x91,
+    PMBUS_READ_FAN_SPEED_3        = 0x92,
+    PMBUS_READ_FAN_SPEED_4        = 0x93,
+    PMBUS_READ_DUTY_CYCLE        = 0x94,
+    PMBUS_READ_FREQUENCY        = 0x95,
+    PMBUS_READ_POUT            = 0x96,
+    PMBUS_READ_PIN            = 0x97,
+
+    PMBUS_REVISION            = 0x98,
+    PMBUS_MFR_ID            = 0x99,
+    PMBUS_MFR_MODEL            = 0x9A,
+    PMBUS_MFR_REVISION        = 0x9B,
+    PMBUS_MFR_LOCATION        = 0x9C,
+    PMBUS_MFR_DATE            = 0x9D,
+    PMBUS_MFR_SERIAL        = 0x9E,
+
+    PMBUS_MFR_VIN_MIN        = 0xA0,
+    PMBUS_MFR_VIN_MAX        = 0xA1,
+    PMBUS_MFR_IIN_MAX        = 0xA2,
+    PMBUS_MFR_PIN_MAX        = 0xA3,
+    PMBUS_MFR_VOUT_MIN        = 0xA4,
+    PMBUS_MFR_VOUT_MAX        = 0xA5,
+    PMBUS_MFR_IOUT_MAX        = 0xA6,
+    PMBUS_MFR_POUT_MAX        = 0xA7,
+
+    PMBUS_IC_DEVICE_ID        = 0xAD,
+    PMBUS_IC_DEVICE_REV        = 0xAE,
+
+    PMBUS_MFR_MAX_TEMP_1        = 0xC0,
+    PMBUS_MFR_MAX_TEMP_2        = 0xC1,
+    PMBUS_MFR_MAX_TEMP_3        = 0xC2,
+
+/*
+ * Virtual registers.
+ * Useful to support attributes which are not supported by standard PMBus
+ * registers but exist as manufacturer specific registers on individual chips.
+ * Must be mapped to real registers in device specific code.
+ *
+ * Semantics:
+ * Virtual registers are all word size.
+ * READ registers are read-only; writes are either ignored or return an error.
+ * RESET registers are read/write. Reading reset registers returns zero
+ * (used for detection), writing any value causes the associated history to be
+ * reset.
+ * Virtual registers have to be handled in device specific driver code. Chip
+ * driver code returns non-negative register values if a virtual register is
+ * supported, or a negative error code if not. The chip driver may return
+ * -ENODATA or any other error code in this case, though an error code other
+ * than -ENODATA is handled more efficiently and thus preferred. Either case,
+ * the calling PMBus core code will abort if the chip driver returns an error
+ * code when reading or writing virtual registers.
+ */
+    PMBUS_VIRT_BASE            = 0x100,
+    PMBUS_VIRT_READ_TEMP_AVG,
+    PMBUS_VIRT_READ_TEMP_MIN,
+    PMBUS_VIRT_READ_TEMP_MAX,
+    PMBUS_VIRT_RESET_TEMP_HISTORY,
+    PMBUS_VIRT_READ_VIN_AVG,
+    PMBUS_VIRT_READ_VIN_MIN,
+    PMBUS_VIRT_READ_VIN_MAX,
+    PMBUS_VIRT_RESET_VIN_HISTORY,
+    PMBUS_VIRT_READ_IIN_AVG,
+    PMBUS_VIRT_READ_IIN_MIN,
+    PMBUS_VIRT_READ_IIN_MAX,
+    PMBUS_VIRT_RESET_IIN_HISTORY,
+    PMBUS_VIRT_READ_PIN_AVG,
+    PMBUS_VIRT_READ_PIN_MIN,
+    PMBUS_VIRT_READ_PIN_MAX,
+    PMBUS_VIRT_RESET_PIN_HISTORY,
+    PMBUS_VIRT_READ_POUT_AVG,
+    PMBUS_VIRT_READ_POUT_MIN,
+    PMBUS_VIRT_READ_POUT_MAX,
+    PMBUS_VIRT_RESET_POUT_HISTORY,
+    PMBUS_VIRT_READ_VOUT_AVG,
+    PMBUS_VIRT_READ_VOUT_MIN,
+    PMBUS_VIRT_READ_VOUT_MAX,
+    PMBUS_VIRT_RESET_VOUT_HISTORY,
+    PMBUS_VIRT_READ_IOUT_AVG,
+    PMBUS_VIRT_READ_IOUT_MIN,
+    PMBUS_VIRT_READ_IOUT_MAX,
+    PMBUS_VIRT_RESET_IOUT_HISTORY,
+    PMBUS_VIRT_READ_TEMP2_AVG,
+    PMBUS_VIRT_READ_TEMP2_MIN,
+    PMBUS_VIRT_READ_TEMP2_MAX,
+    PMBUS_VIRT_RESET_TEMP2_HISTORY,
+
+    PMBUS_VIRT_READ_VMON,
+    PMBUS_VIRT_VMON_UV_WARN_LIMIT,
+    PMBUS_VIRT_VMON_OV_WARN_LIMIT,
+    PMBUS_VIRT_VMON_UV_FAULT_LIMIT,
+    PMBUS_VIRT_VMON_OV_FAULT_LIMIT,
+    PMBUS_VIRT_STATUS_VMON,
+
+    /*
+     * RPM and PWM Fan control
+     *
+     * Drivers wanting to expose PWM control must define the behaviour of
+     * PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the
+     * {read,write}_word_data callback.
+     *
+     * pmbus core provides a default implementation for
+     * PMBUS_VIRT_FAN_TARGET_[1-4].
+     *
+     * TARGET, PWM and PWM_ENABLE members must be defined sequentially;
+     * pmbus core uses the difference between the provided register and
+     * it's _1 counterpart to calculate the FAN/PWM ID.
+     */
+    PMBUS_VIRT_FAN_TARGET_1,
+    PMBUS_VIRT_FAN_TARGET_2,
+    PMBUS_VIRT_FAN_TARGET_3,
+    PMBUS_VIRT_FAN_TARGET_4,
+    PMBUS_VIRT_PWM_1,
+    PMBUS_VIRT_PWM_2,
+    PMBUS_VIRT_PWM_3,
+    PMBUS_VIRT_PWM_4,
+    PMBUS_VIRT_PWM_ENABLE_1,
+    PMBUS_VIRT_PWM_ENABLE_2,
+    PMBUS_VIRT_PWM_ENABLE_3,
+    PMBUS_VIRT_PWM_ENABLE_4,
+
+    /* Samples for average
+     *
+     * Drivers wanting to expose functionality for changing the number of
+     * samples used for average values should implement support in
+     * {read,write}_word_data callback for either PMBUS_VIRT_SAMPLES if it
+     * applies to all types of measurements, or any number of specific
+     * PMBUS_VIRT_*_SAMPLES registers to allow for individual control.
+     */
+    PMBUS_VIRT_SAMPLES,
+    PMBUS_VIRT_IN_SAMPLES,
+    PMBUS_VIRT_CURR_SAMPLES,
+    PMBUS_VIRT_POWER_SAMPLES,
+    PMBUS_VIRT_TEMP_SAMPLES,
+};
+
+/*
+ * OPERATION
+ */
+#define PB_OPERATION_CONTROL_ON        BIT(7)
+
+/*
+ * WRITE_PROTECT
+ */
+#define PB_WP_ALL    BIT(7)    /* all but WRITE_PROTECT */
+#define PB_WP_OP    BIT(6)    /* all but WP, OPERATION, PAGE */
+#define PB_WP_VOUT    BIT(5)    /* all but WP, OPERATION, PAGE, VOUT, ON_OFF */
+
+#define PB_WP_ANY    (PB_WP_ALL | PB_WP_OP | PB_WP_VOUT)
+
+/*
+ * CAPABILITY
+ */
+#define PB_CAPABILITY_SMBALERT        BIT(4)
+#define PB_CAPABILITY_ERROR_CHECK    BIT(7)
+
+/*
+ * VOUT_MODE
+ */
+#define PB_VOUT_MODE_MODE_MASK        0xe0
+#define PB_VOUT_MODE_PARAM_MASK        0x1f
+
+#define PB_VOUT_MODE_LINEAR        0x00
+#define PB_VOUT_MODE_VID        0x20
+#define PB_VOUT_MODE_DIRECT        0x40
+
+/*
+ * Fan configuration
+ */
+#define PB_FAN_2_PULSE_MASK        (BIT(0) | BIT(1))
+#define PB_FAN_2_RPM            BIT(2)
+#define PB_FAN_2_INSTALLED        BIT(3)
+#define PB_FAN_1_PULSE_MASK        (BIT(4) | BIT(5))
+#define PB_FAN_1_RPM            BIT(6)
+#define PB_FAN_1_INSTALLED        BIT(7)
+
+enum pmbus_fan_mode { percent = 0, rpm };
+
+/*
+ * STATUS_BYTE, STATUS_WORD (lower)
+ */
+#define PB_STATUS_NONE_ABOVE        BIT(0)
+#define PB_STATUS_CML            BIT(1)
+#define PB_STATUS_TEMPERATURE        BIT(2)
+#define PB_STATUS_VIN_UV        BIT(3)
+#define PB_STATUS_IOUT_OC        BIT(4)
+#define PB_STATUS_VOUT_OV        BIT(5)
+#define PB_STATUS_OFF            BIT(6)
+#define PB_STATUS_BUSY            BIT(7)
+
+/*
+ * STATUS_WORD (upper)
+ */
+#define PB_STATUS_UNKNOWN        BIT(8)
+#define PB_STATUS_OTHER            BIT(9)
+#define PB_STATUS_FANS            BIT(10)
+#define PB_STATUS_POWER_GOOD_N        BIT(11)
+#define PB_STATUS_WORD_MFR        BIT(12)
+#define PB_STATUS_INPUT            BIT(13)
+#define PB_STATUS_IOUT_POUT        BIT(14)
+#define PB_STATUS_VOUT            BIT(15)
+
+/*
+ * STATUS_IOUT
+ */
+#define PB_POUT_OP_WARNING        BIT(0)
+#define PB_POUT_OP_FAULT        BIT(1)
+#define PB_POWER_LIMITING        BIT(2)
+#define PB_CURRENT_SHARE_FAULT        BIT(3)
+#define PB_IOUT_UC_FAULT        BIT(4)
+#define PB_IOUT_OC_WARNING        BIT(5)
+#define PB_IOUT_OC_LV_FAULT        BIT(6)
+#define PB_IOUT_OC_FAULT        BIT(7)
+
+/*
+ * STATUS_VOUT, STATUS_INPUT
+ */
+#define PB_VOLTAGE_UV_FAULT        BIT(4)
+#define PB_VOLTAGE_UV_WARNING        BIT(5)
+#define PB_VOLTAGE_OV_WARNING        BIT(6)
+#define PB_VOLTAGE_OV_FAULT        BIT(7)
+
+/*
+ * STATUS_INPUT
+ */
+#define PB_PIN_OP_WARNING        BIT(0)
+#define PB_IIN_OC_WARNING        BIT(1)
+#define PB_IIN_OC_FAULT            BIT(2)
+
+/*
+ * STATUS_TEMPERATURE
+ */
+#define PB_TEMP_UT_FAULT        BIT(4)
+#define PB_TEMP_UT_WARNING        BIT(5)
+#define PB_TEMP_OT_WARNING        BIT(6)
+#define PB_TEMP_OT_FAULT        BIT(7)
+
+/*
+ * STATUS_FAN
+ */
+#define PB_FAN_AIRFLOW_WARNING        BIT(0)
+#define PB_FAN_AIRFLOW_FAULT        BIT(1)
+#define PB_FAN_FAN2_SPEED_OVERRIDE    BIT(2)
+#define PB_FAN_FAN1_SPEED_OVERRIDE    BIT(3)
+#define PB_FAN_FAN2_WARNING        BIT(4)
+#define PB_FAN_FAN1_WARNING        BIT(5)
+#define PB_FAN_FAN2_FAULT        BIT(6)
+#define PB_FAN_FAN1_FAULT        BIT(7)
+
+/*
+ * CML_FAULT_STATUS
+ */
+#define PB_CML_FAULT_OTHER_MEM_LOGIC    BIT(0)
+#define PB_CML_FAULT_OTHER_COMM        BIT(1)
+#define PB_CML_FAULT_PROCESSOR        BIT(3)
+#define PB_CML_FAULT_MEMORY        BIT(4)
+#define PB_CML_FAULT_PACKET_ERROR    BIT(5)
+#define PB_CML_FAULT_INVALID_DATA    BIT(6)
+#define PB_CML_FAULT_INVALID_COMMAND    BIT(7)
+
+enum pmbus_sensor_classes {
+    PSC_VOLTAGE_IN = 0,
+    PSC_VOLTAGE_OUT,
+    PSC_CURRENT_IN,
+    PSC_CURRENT_OUT,
+    PSC_POWER,
+    PSC_TEMPERATURE,
+    PSC_FAN,
+    PSC_PWM,
+    PSC_NUM_CLASSES        /* Number of power sensor classes */
+};
+
+#define PMBUS_PAGES    32    /* Per PMBus specification */
+#define PMBUS_PHASES    8    /* Maximum number of phases per page */
+
+/* Functionality bit mask */
+#define PMBUS_HAVE_VIN        BIT(0)
+#define PMBUS_HAVE_VCAP        BIT(1)
+#define PMBUS_HAVE_VOUT        BIT(2)
+#define PMBUS_HAVE_IIN        BIT(3)
+#define PMBUS_HAVE_IOUT        BIT(4)
+#define PMBUS_HAVE_PIN        BIT(5)
+#define PMBUS_HAVE_POUT        BIT(6)
+#define PMBUS_HAVE_FAN12    BIT(7)
+#define PMBUS_HAVE_FAN34    BIT(8)
+#define PMBUS_HAVE_TEMP        BIT(9)
+#define PMBUS_HAVE_TEMP2    BIT(10)
+#define PMBUS_HAVE_TEMP3    BIT(11)
+#define PMBUS_HAVE_STATUS_VOUT    BIT(12)
+#define PMBUS_HAVE_STATUS_IOUT    BIT(13)
+#define PMBUS_HAVE_STATUS_INPUT    BIT(14)
+#define PMBUS_HAVE_STATUS_TEMP    BIT(15)
+#define PMBUS_HAVE_STATUS_FAN12    BIT(16)
+#define PMBUS_HAVE_STATUS_FAN34    BIT(17)
+#define PMBUS_HAVE_VMON        BIT(18)
+#define PMBUS_HAVE_STATUS_VMON    BIT(19)
+#define PMBUS_HAVE_PWM12    BIT(20)
+#define PMBUS_HAVE_PWM34    BIT(21)
+#define PMBUS_HAVE_SAMPLES    BIT(22)
+
+#define PMBUS_PHASE_VIRTUAL    BIT(30)    /* Phases on this page are virtual */
+#define PMBUS_PAGE_VIRTUAL    BIT(31)    /* Page is virtual */
+
+enum pmbus_data_format { linear = 0, direct, vid };
+enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv };
+
+struct pmbus_driver_info {
+    int pages;        /* Total number of pages */
+    u8 phases[PMBUS_PAGES];    /* Number of phases per page */
+    enum pmbus_data_format format[PSC_NUM_CLASSES];
+    enum vrm_version vrm_version[PMBUS_PAGES]; /* vrm version per page */
+    /*
+     * Support one set of coefficients for each sensor type
+     * Used for chips providing data in direct mode.
+     */
+    int m[PSC_NUM_CLASSES];    /* mantissa for direct data format */
+    int b[PSC_NUM_CLASSES];    /* offset */
+    int R[PSC_NUM_CLASSES];    /* exponent */
+
+    u32 func[PMBUS_PAGES];    /* Functionality, per page */
+    u32 pfunc[PMBUS_PHASES];/* Functionality, per phase */
+    /*
+     * The following functions map manufacturing specific register values
+     * to PMBus standard register values. Specify only if mapping is
+     * necessary.
+     * Functions return the register value (read) or zero (write) if
+     * successful. A return value of -ENODATA indicates that there is no
+     * manufacturer specific register, but that a standard PMBus register
+     * may exist. Any other negative return value indicates that the
+     * register does not exist, and that no attempt should be made to read
+     * the standard register.
+     */
+    int (*read_byte_data)(struct i2c_client *client, int page, int reg);
+    int (*read_word_data)(struct i2c_client *client, int page, int phase,
+                  int reg);
+    int (*write_word_data)(struct i2c_client *client, int page, int reg,
+                   u16 word);
+    int (*write_byte)(struct i2c_client *client, int page, u8 value);
+    /*
+     * The identify function determines supported PMBus functionality.
+     * This function is only necessary if a chip driver supports multiple
+     * chips, and the chip functionality is not pre-determined.
+     */
+    int (*identify)(struct i2c_client *client,
+            struct pmbus_driver_info *info);
+
+    /* Regulator functionality, if supported by this chip driver. */
+    int num_regulators;
+    const struct regulator_desc *reg_desc;
+
+    /* custom attributes */
+    const struct attribute_group **groups;
+};
+
+/* Regulator ops */
+
+extern const struct regulator_ops wb_pmbus_regulator_ops;
+
+/* Macro for filling in array of struct regulator_desc */
+#define PMBUS_REGULATOR(_name, _id)                \
+    [_id] = {                        \
+        .name = (_name # _id),                \
+        .id = (_id),                    \
+        .of_match = of_match_ptr(_name # _id),        \
+        .regulators_node = of_match_ptr("regulators"),    \
+        .ops = &wb_pmbus_regulator_ops,            \
+        .type = REGULATOR_VOLTAGE,            \
+        .owner = THIS_MODULE,                \
+    }
+
+struct pmbus_data {
+    struct device *dev;
+    struct device *hwmon_dev;
+
+    u32 flags;        /* from platform data */
+
+    int exponent[PMBUS_PAGES]; /* linear mode: exponent for output voltages */
+
+    const struct pmbus_driver_info *info;
+
+    int max_attributes;
+    int num_attributes;
+    struct attribute_group group;
+    const struct attribute_group **groups;
+    struct dentry *debugfs;        /* debugfs device directory */
+
+    struct pmbus_sensor *sensors;
+
+    struct mutex update_lock;
+
+    bool has_status_word;        /* device uses STATUS_WORD register */
+    int (*read_status)(struct i2c_client *client, int page);
+
+    s16 currpage;     /* current page, -1 for unknown/unset */
+    s16 currphase;    /* current phase, 0xff for all, -1 for unknown/unset */
+    int vout_max[PMBUS_PAGES];    /* pmbus maximum output voltage */
+    int vout_min[PMBUS_PAGES];    /* pmbus minimum output voltage */
+};
+
+/* Function declarations */
+void wb_pmbus_clear_cache(struct i2c_client *client);
+int wb_pmbus_set_page(struct i2c_client *client, int page, int phase);
+int wb_pmbus_read_word_data(struct i2c_client *client, int page, int phase,
+             u8 reg);
+int wb_pmbus_write_word_data(struct i2c_client *client, int page, u8 reg,
+              u16 word);
+int wb_pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg);
+int wb_pmbus_write_byte(struct i2c_client *client, int page, u8 value);
+int wb_pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg,
+              u8 value);
+int wb_pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
+               u8 mask, u8 value);
+void wb_pmbus_clear_faults(struct i2c_client *client);
+bool wb_pmbus_check_byte_register(struct i2c_client *client, int page, int reg);
+bool wb_pmbus_check_word_register(struct i2c_client *client, int page, int reg);
+int wb_pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info);
+int wb_pmbus_do_remove(struct i2c_client *client);
+const struct pmbus_driver_info *wb_pmbus_get_driver_info(struct i2c_client
+                              *client);
+int wb_pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id,
+                  enum pmbus_fan_mode mode);
+int wb_pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id,
+                  enum pmbus_fan_mode mode);
+int wb_pmbus_update_fan(struct i2c_client *client, int page, int id,
+             u8 config, u8 mask, u16 command);
+struct dentry *wb_pmbus_get_debugfs_dir(struct i2c_client *client);
+
+#endif /* WB_PMBUS_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus_core.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus_core.c
new file mode 100644
index 000000000000..bba6ca39cd3c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus_core.c
@@ -0,0 +1,2780 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Hardware monitoring driver for PMBus devices
+ *
+ * Copyright (c) 2010, 2011 Ericsson AB.
+ * Copyright (c) 2012 Guenter Roeck
+ */
+
+#include <linux/debugfs.h>
+#include <linux/kernel.h>
+#include <linux/math64.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/pmbus.h>
+#include <linux/regulator/driver.h>
+#include <linux/regulator/machine.h>
+#include <linux/delay.h>
+#include "wb_pmbus.h"
+
+/*
+ * Number of additional attribute pointers to allocate
+ * with each call to krealloc
+ */
+#define PMBUS_ATTR_ALLOC_SIZE    (32)
+#define PMBUS_NAME_SIZE          (24)
+#define PMBUS_RETRY_SLEEP_TIME   (10000)   /* 10ms */
+#define PMBUS_RETRY_TIME         (3)
+
+struct pmbus_sensor {
+    struct pmbus_sensor *next;
+    char name[PMBUS_NAME_SIZE];    /* sysfs sensor name */
+    struct device_attribute attribute;
+    u8 page;        /* page number */
+    u8 phase;        /* phase number, 0xff for all phases */
+    u16 reg;        /* register */
+    enum pmbus_sensor_classes class;    /* sensor class */
+    bool update;        /* runtime sensor update needed */
+    bool convert;        /* Whether or not to apply linear/vid/direct */
+    int data;        /* Sensor data.
+                   Negative if there was a read error */
+};
+#define to_pmbus_sensor(_attr) \
+    container_of(_attr, struct pmbus_sensor, attribute)
+
+struct pmbus_boolean {
+    char name[PMBUS_NAME_SIZE];    /* sysfs boolean name */
+    struct sensor_device_attribute attribute;
+    struct pmbus_sensor *s1;
+    struct pmbus_sensor *s2;
+};
+#define to_pmbus_boolean(_attr) \
+    container_of(_attr, struct pmbus_boolean, attribute)
+
+struct pmbus_label {
+    char name[PMBUS_NAME_SIZE];    /* sysfs label name */
+    struct device_attribute attribute;
+    char label[PMBUS_NAME_SIZE];    /* label */
+};
+#define to_pmbus_label(_attr) \
+    container_of(_attr, struct pmbus_label, attribute)
+
+/* Macros for converting between sensor index and register/page/status mask */
+
+#define PB_STATUS_MASK    0xffff
+#define PB_REG_SHIFT    16
+#define PB_REG_MASK    0x3ff
+#define PB_PAGE_SHIFT    26
+#define PB_PAGE_MASK    0x3f
+
+#define pb_reg_to_index(page, reg, mask)    (((page) << PB_PAGE_SHIFT) | \
+                         ((reg) << PB_REG_SHIFT) | (mask))
+
+#define pb_index_to_page(index)            (((index) >> PB_PAGE_SHIFT) & PB_PAGE_MASK)
+#define pb_index_to_reg(index)            (((index) >> PB_REG_SHIFT) & PB_REG_MASK)
+#define pb_index_to_mask(index)            ((index) & PB_STATUS_MASK)
+
+struct pmbus_debugfs_entry {
+    struct i2c_client *client;
+    u8 page;
+    u8 reg;
+};
+
+static const int pmbus_fan_rpm_mask[] = {
+    PB_FAN_1_RPM,
+    PB_FAN_2_RPM,
+    PB_FAN_1_RPM,
+    PB_FAN_2_RPM,
+};
+
+static const int pmbus_fan_config_registers[] = {
+    PMBUS_FAN_CONFIG_12,
+    PMBUS_FAN_CONFIG_12,
+    PMBUS_FAN_CONFIG_34,
+    PMBUS_FAN_CONFIG_34
+};
+
+static const int pmbus_fan_command_registers[] = {
+    PMBUS_FAN_COMMAND_1,
+    PMBUS_FAN_COMMAND_2,
+    PMBUS_FAN_COMMAND_3,
+    PMBUS_FAN_COMMAND_4,
+};
+
+void wb_pmbus_clear_cache(struct i2c_client *client)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    struct pmbus_sensor *sensor;
+
+    for (sensor = data->sensors; sensor; sensor = sensor->next)
+        sensor->data = -ENODATA;
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_clear_cache);
+
+static int wb_pmbus_set_page_tmp(struct i2c_client *client, int page, int phase)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int rv;
+
+    if (page < 0)
+        return 0;
+
+    if (!(data->info->func[page] & PMBUS_PAGE_VIRTUAL) &&
+        data->info->pages > 1 && page != data->currpage) {
+        rv = i2c_smbus_write_byte_data(client, PMBUS_PAGE, page);
+        if (rv < 0)
+            return rv;
+
+        rv = i2c_smbus_read_byte_data(client, PMBUS_PAGE);
+        if (rv < 0)
+            return rv;
+
+        if (rv != page)
+            return -EIO;
+    }
+    data->currpage = page;
+
+    if (data->info->phases[page] && data->currphase != phase &&
+        !(data->info->func[page] & PMBUS_PHASE_VIRTUAL)) {
+        rv = i2c_smbus_write_byte_data(client, PMBUS_PHASE,
+                           phase);
+        if (rv)
+            return rv;
+    }
+    data->currphase = phase;
+
+    return 0;
+}
+
+int wb_pmbus_set_page(struct i2c_client *client, int page, int phase)
+{
+    int rv, i;
+    struct device *dev = &client->dev;
+
+    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
+        rv = wb_pmbus_set_page_tmp(client, page, phase);
+        if(rv >= 0){
+            return rv;
+        }
+        if ((i + 1) < PMBUS_RETRY_TIME) {
+            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
+        }
+    }
+    dev_dbg(dev, "wb_pmbus_set_page failed, page=%d, phase=%d, rv=%d\n",
+        page, phase, rv);
+    return rv;
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_set_page);
+
+static int wb_pmbus_write_byte_tmp(struct i2c_client *client, int page, u8 value)
+{
+    int rv;
+
+    rv = wb_pmbus_set_page(client, page, 0xff);
+    if (rv < 0)
+        return rv;
+
+    return i2c_smbus_write_byte(client, value);
+}
+
+int wb_pmbus_write_byte(struct i2c_client *client, int page, u8 value)
+{
+    int rv, i;
+    struct device *dev = &client->dev;
+
+    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
+        rv = wb_pmbus_write_byte_tmp(client, page, value);
+        if(rv >= 0){
+            return rv;
+        }
+        if ((i + 1) < PMBUS_RETRY_TIME) {
+            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
+        }
+    }
+    dev_dbg(dev, "wb_pmbus_write_byte failed, page=%d, value=0x%x, rv: %d\n",
+        page, value, rv);
+    return rv;
+}
+
+EXPORT_SYMBOL_GPL(wb_pmbus_write_byte);
+
+/*
+ * _pmbus_write_byte() is similar to pmbus_write_byte(), but checks if
+ * a device specific mapping function exists and calls it if necessary.
+ */
+static int _pmbus_write_byte(struct i2c_client *client, int page, u8 value)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    const struct pmbus_driver_info *info = data->info;
+    int status;
+
+    if (info->write_byte) {
+        status = info->write_byte(client, page, value);
+        if (status != -ENODATA)
+            return status;
+    }
+    return wb_pmbus_write_byte(client, page, value);
+}
+
+static int wb_pmbus_write_word_data_tmp(struct i2c_client *client, int page, u8 reg,
+              u16 word)
+{
+    int rv;
+
+    rv = wb_pmbus_set_page(client, page, 0xff);
+    if (rv < 0)
+        return rv;
+
+    return i2c_smbus_write_word_data(client, reg, word);
+}
+
+int wb_pmbus_write_word_data(struct i2c_client *client, int page, u8 reg,
+              u16 word)
+{
+    int rv, i;
+    struct device *dev = &client->dev;
+
+    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
+        rv = wb_pmbus_write_word_data_tmp(client, page, reg, word);
+        if(rv >= 0){
+            return rv;
+        }
+        if ((i + 1) < PMBUS_RETRY_TIME) {
+            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
+        }
+    }
+    dev_dbg(dev, "wb_pmbus_write_word_data failed, page: %d, reg: 0x%x, value: 0x%x, rv: %d\n",
+        page, reg, word, rv);
+    return rv;
+
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_write_word_data);
+
+static int pmbus_write_virt_reg(struct i2c_client *client, int page, int reg,
+                u16 word)
+{
+    int bit;
+    int id;
+    int rv;
+
+    switch (reg) {
+    case PMBUS_VIRT_FAN_TARGET_1 ... PMBUS_VIRT_FAN_TARGET_4:
+        id = reg - PMBUS_VIRT_FAN_TARGET_1;
+        bit = pmbus_fan_rpm_mask[id];
+        rv = wb_pmbus_update_fan(client, page, id, bit, bit, word);
+        break;
+    default:
+        rv = -ENXIO;
+        break;
+    }
+
+    return rv;
+}
+
+/*
+ * _pmbus_write_word_data() is similar to pmbus_write_word_data(), but checks if
+ * a device specific mapping function exists and calls it if necessary.
+ */
+static int _pmbus_write_word_data(struct i2c_client *client, int page, int reg,
+                  u16 word)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    const struct pmbus_driver_info *info = data->info;
+    int status;
+
+    if (info->write_word_data) {
+        status = info->write_word_data(client, page, reg, word);
+        if (status != -ENODATA)
+            return status;
+    }
+
+    if (reg >= PMBUS_VIRT_BASE)
+        return pmbus_write_virt_reg(client, page, reg, word);
+
+    return wb_pmbus_write_word_data(client, page, reg, word);
+}
+
+int wb_pmbus_update_fan(struct i2c_client *client, int page, int id,
+             u8 config, u8 mask, u16 command)
+{
+    int from;
+    int rv;
+    u8 to;
+
+    from = wb_pmbus_read_byte_data(client, page,
+                    pmbus_fan_config_registers[id]);
+    if (from < 0)
+        return from;
+
+    to = (from & ~mask) | (config & mask);
+    if (to != from) {
+        rv = wb_pmbus_write_byte_data(client, page,
+                       pmbus_fan_config_registers[id], to);
+        if (rv < 0)
+            return rv;
+    }
+
+    return _pmbus_write_word_data(client, page,
+                      pmbus_fan_command_registers[id], command);
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_update_fan);
+
+static int wb_pmbus_read_word_data_tmp(struct i2c_client *client, int page, int phase, u8 reg)
+{
+    int rv;
+
+    rv = wb_pmbus_set_page(client, page, phase);
+    if (rv < 0)
+        return rv;
+
+    return i2c_smbus_read_word_data(client, reg);
+}
+
+int wb_pmbus_read_word_data(struct i2c_client *client, int page, int phase, u8 reg)
+{
+    int rv, i;
+    struct device *dev = &client->dev;
+
+    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
+        rv = wb_pmbus_read_word_data_tmp(client, page, phase, reg);
+        if(rv >= 0){
+            return rv;
+        }
+        if ((i + 1) < PMBUS_RETRY_TIME) {
+            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
+        }
+    }
+    dev_dbg(dev, "wb_pmbus_read_word_data failed, page: %d, phase: %d, reg: 0x%x, rv: %d\n",
+        page, phase, reg, rv);
+    return rv;
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_read_word_data);
+
+static int pmbus_read_virt_reg(struct i2c_client *client, int page, int reg)
+{
+    int rv;
+    int id;
+
+    switch (reg) {
+    case PMBUS_VIRT_FAN_TARGET_1 ... PMBUS_VIRT_FAN_TARGET_4:
+        id = reg - PMBUS_VIRT_FAN_TARGET_1;
+        rv = wb_pmbus_get_fan_rate_device(client, page, id, rpm);
+        break;
+    default:
+        rv = -ENXIO;
+        break;
+    }
+
+    return rv;
+}
+
+/*
+ * _pmbus_read_word_data() is similar to wb_pmbus_read_word_data(), but checks if
+ * a device specific mapping function exists and calls it if necessary.
+ */
+static int _pmbus_read_word_data(struct i2c_client *client, int page,
+                 int phase, int reg)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    const struct pmbus_driver_info *info = data->info;
+    int status;
+
+    if (info->read_word_data) {
+        status = info->read_word_data(client, page, phase, reg);
+        if (status != -ENODATA)
+            return status;
+    }
+
+    if (reg >= PMBUS_VIRT_BASE)
+        return pmbus_read_virt_reg(client, page, reg);
+
+    return wb_pmbus_read_word_data(client, page, phase, reg);
+}
+
+/* Same as above, but without phase parameter, for use in check functions */
+static int __pmbus_read_word_data(struct i2c_client *client, int page, int reg)
+{
+    return _pmbus_read_word_data(client, page, 0xff, reg);
+}
+
+static int wb_pmbus_read_byte_data_tmp(struct i2c_client *client, int page, u8 reg)
+{
+    int rv;
+
+    rv = wb_pmbus_set_page(client, page, 0xff);
+    if (rv < 0)
+        return rv;
+
+    return i2c_smbus_read_byte_data(client, reg);
+}
+
+int wb_pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg)
+{
+    int rv, i;
+    struct device *dev = &client->dev;
+
+    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
+        rv = wb_pmbus_read_byte_data_tmp(client, page, reg);
+        if(rv >= 0){
+            return rv;
+        }
+        if ((i + 1) < PMBUS_RETRY_TIME) {
+            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
+        }
+    }
+    dev_dbg(dev, "wb_pmbus_read_byte_data failed, page: %d, reg: 0x%x, rv: %d\n",
+        page, reg, rv);
+    return rv;
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_read_byte_data);
+
+static int wb_pmbus_write_byte_data_tmp(struct i2c_client *client, int page, u8 reg, u8 value)
+{
+    int rv;
+
+    rv = wb_pmbus_set_page(client, page, 0xff);
+    if (rv < 0)
+        return rv;
+
+    return i2c_smbus_write_byte_data(client, reg, value);
+}
+
+int wb_pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg, u8 value)
+{
+    int rv, i;
+    struct device *dev = &client->dev;
+
+    for (i = 0; i < PMBUS_RETRY_TIME; i++) {
+        rv = wb_pmbus_write_byte_data_tmp(client, page, reg, value);
+        if(rv >= 0){
+            return rv;
+        }
+        if ((i + 1) < PMBUS_RETRY_TIME) {
+            usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
+        }
+    }
+    dev_dbg(dev, "wb_pmbus_write_byte_data failed, page: %d, reg: 0x%x, value: 0x%x, rv: %d\n",
+        page, reg, value, rv);
+    return rv;
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_write_byte_data);
+
+int wb_pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg,
+               u8 mask, u8 value)
+{
+    unsigned int tmp;
+    int rv;
+
+    rv = wb_pmbus_read_byte_data(client, page, reg);
+    if (rv < 0)
+        return rv;
+
+    tmp = (rv & ~mask) | (value & mask);
+
+    if (tmp != rv)
+        rv = wb_pmbus_write_byte_data(client, page, reg, tmp);
+
+    return rv;
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_update_byte_data);
+
+/*
+ * _pmbus_read_byte_data() is similar to wb_pmbus_read_byte_data(), but checks if
+ * a device specific mapping function exists and calls it if necessary.
+ */
+static int _pmbus_read_byte_data(struct i2c_client *client, int page, int reg)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    const struct pmbus_driver_info *info = data->info;
+    int status;
+
+    if (info->read_byte_data) {
+        status = info->read_byte_data(client, page, reg);
+        if (status != -ENODATA)
+            return status;
+    }
+    return wb_pmbus_read_byte_data(client, page, reg);
+}
+
+static struct pmbus_sensor *pmbus_find_sensor(struct pmbus_data *data, int page,
+                          int reg)
+{
+    struct pmbus_sensor *sensor;
+
+    for (sensor = data->sensors; sensor; sensor = sensor->next) {
+        if (sensor->page == page && sensor->reg == reg)
+            return sensor;
+    }
+
+    return ERR_PTR(-EINVAL);
+}
+
+static int pmbus_get_fan_rate(struct i2c_client *client, int page, int id,
+                  enum pmbus_fan_mode mode,
+                  bool from_cache)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    bool want_rpm, have_rpm;
+    struct pmbus_sensor *s;
+    int config;
+    int reg;
+
+    want_rpm = (mode == rpm);
+
+    if (from_cache) {
+        reg = want_rpm ? PMBUS_VIRT_FAN_TARGET_1 : PMBUS_VIRT_PWM_1;
+        s = pmbus_find_sensor(data, page, reg + id);
+        if (IS_ERR(s))
+            return PTR_ERR(s);
+
+        return s->data;
+    }
+
+    config = wb_pmbus_read_byte_data(client, page,
+                      pmbus_fan_config_registers[id]);
+    if (config < 0)
+        return config;
+
+    have_rpm = !!(config & pmbus_fan_rpm_mask[id]);
+    if (want_rpm == have_rpm)
+        return wb_pmbus_read_word_data(client, page, 0xff,
+                        pmbus_fan_command_registers[id]);
+
+    /* Can't sensibly map between RPM and PWM, just return zero */
+    return 0;
+}
+
+int wb_pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id,
+                  enum pmbus_fan_mode mode)
+{
+    return pmbus_get_fan_rate(client, page, id, mode, false);
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_get_fan_rate_device);
+
+int wb_pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id,
+                  enum pmbus_fan_mode mode)
+{
+    return pmbus_get_fan_rate(client, page, id, mode, true);
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_get_fan_rate_cached);
+
+static void pmbus_clear_fault_page(struct i2c_client *client, int page)
+{
+    _pmbus_write_byte(client, page, PMBUS_CLEAR_FAULTS);
+}
+
+void wb_pmbus_clear_faults(struct i2c_client *client)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int i;
+
+    for (i = 0; i < data->info->pages; i++)
+        pmbus_clear_fault_page(client, i);
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_clear_faults);
+
+static int pmbus_check_status_cml(struct i2c_client *client)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int status, status2;
+
+    status = data->read_status(client, -1);
+    if (status < 0 || (status & PB_STATUS_CML)) {
+        status2 = _pmbus_read_byte_data(client, -1, PMBUS_STATUS_CML);
+        if (status2 < 0 || (status2 & PB_CML_FAULT_INVALID_COMMAND))
+            return -EIO;
+    }
+    return 0;
+}
+
+static bool pmbus_check_register(struct i2c_client *client,
+                 int (*func)(struct i2c_client *client,
+                         int page, int reg),
+                 int page, int reg)
+{
+    int rv;
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    rv = func(client, page, reg);
+    if (rv >= 0 && !(data->flags & PMBUS_SKIP_STATUS_CHECK))
+        rv = pmbus_check_status_cml(client);
+    pmbus_clear_fault_page(client, -1);
+    return rv >= 0;
+}
+
+static bool pmbus_check_status_register(struct i2c_client *client, int page)
+{
+    int status;
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    status = data->read_status(client, page);
+    if (status >= 0 && !(data->flags & PMBUS_SKIP_STATUS_CHECK) &&
+        (status & PB_STATUS_CML)) {
+        status = _pmbus_read_byte_data(client, -1, PMBUS_STATUS_CML);
+        if (status < 0 || (status & PB_CML_FAULT_INVALID_COMMAND))
+            status = -EIO;
+    }
+
+    pmbus_clear_fault_page(client, -1);
+    return status >= 0;
+}
+
+bool wb_pmbus_check_byte_register(struct i2c_client *client, int page, int reg)
+{
+    return pmbus_check_register(client, _pmbus_read_byte_data, page, reg);
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_check_byte_register);
+
+bool wb_pmbus_check_word_register(struct i2c_client *client, int page, int reg)
+{
+    return pmbus_check_register(client, __pmbus_read_word_data, page, reg);
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_check_word_register);
+
+const struct pmbus_driver_info *wb_pmbus_get_driver_info(struct i2c_client *client)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    return data->info;
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_get_driver_info);
+
+static int pmbus_read_status_byte(struct i2c_client *client, int page)
+{
+    return _pmbus_read_byte_data(client, page, PMBUS_STATUS_BYTE);
+}
+
+static int pmbus_read_status_word(struct i2c_client *client, int page)
+{
+    return _pmbus_read_word_data(client, page, 0xff, PMBUS_STATUS_WORD);
+}
+
+static int pmbus_get_status(struct i2c_client *client, int page, int reg)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int status;
+
+    switch (reg) {
+    case PMBUS_STATUS_WORD:
+        status = data->read_status(client, page);
+        if ((status < 0) || (data->has_status_word && (status == 0xffff))
+            || (!data->has_status_word && (status == 0xff))) {
+            if (data->has_status_word) {
+                data->read_status = pmbus_read_status_byte;
+            } else {
+                data->read_status = pmbus_read_status_word;
+            }
+            data->has_status_word = !data->has_status_word;
+            status = data->read_status(client, page);
+        }
+        break;
+    default:
+        status = _pmbus_read_byte_data(client, page, reg);
+        break;
+    }
+    if (status < 0)
+        wb_pmbus_clear_faults(client);
+    return status;
+}
+
+static void pmbus_update_sensor_data(struct i2c_client *client, struct pmbus_sensor *sensor)
+{
+    if (sensor->data < 0 || sensor->update)
+        sensor->data = _pmbus_read_word_data(client, sensor->page,
+                             sensor->phase, sensor->reg);
+}
+
+/*
+ * Convert linear sensor values to milli- or micro-units
+ * depending on sensor type.
+ */
+static s64 pmbus_reg2data_linear(struct pmbus_data *data,
+                 struct pmbus_sensor *sensor)
+{
+    s16 exponent;
+    s32 mantissa;
+    s64 val;
+
+    if (sensor->class == PSC_VOLTAGE_OUT) {    /* LINEAR16 */
+        exponent = data->exponent[sensor->page];
+        mantissa = (u16) sensor->data;
+    } else {                /* LINEAR11 */
+        exponent = ((s16)sensor->data) >> 11;
+        mantissa = ((s16)((sensor->data & 0x7ff) << 5)) >> 5;
+    }
+
+    val = mantissa;
+
+    /* scale result to milli-units for all sensors except fans */
+    if (sensor->class != PSC_FAN)
+        val = val * 1000LL;
+
+    /* scale result to micro-units for power sensors */
+    if (sensor->class == PSC_POWER)
+        val = val * 1000LL;
+
+    if (exponent >= 0)
+        val <<= exponent;
+    else
+        val >>= -exponent;
+
+    return val;
+}
+
+/*
+ * Convert direct sensor values to milli- or micro-units
+ * depending on sensor type.
+ */
+static s64 pmbus_reg2data_direct(struct pmbus_data *data,
+                 struct pmbus_sensor *sensor)
+{
+    s64 b, val = (s16)sensor->data;
+    s32 m, R;
+
+    m = data->info->m[sensor->class];
+    b = data->info->b[sensor->class];
+    R = data->info->R[sensor->class];
+
+    if (m == 0)
+        return 0;
+
+    /* X = 1/m * (Y * 10^-R - b) */
+    R = -R;
+    /* scale result to milli-units for everything but fans */
+    if (!(sensor->class == PSC_FAN || sensor->class == PSC_PWM)) {
+        R += 3;
+        b *= 1000;
+    }
+
+    /* scale result to micro-units for power sensors */
+    if (sensor->class == PSC_POWER) {
+        R += 3;
+        b *= 1000;
+    }
+
+    while (R > 0) {
+        val *= 10;
+        R--;
+    }
+    while (R < 0) {
+        val = div_s64(val + 5LL, 10L);  /* round closest */
+        R++;
+    }
+
+    val = div_s64(val - b, m);
+    return val;
+}
+
+/*
+ * Convert VID sensor values to milli- or micro-units
+ * depending on sensor type.
+ */
+static s64 pmbus_reg2data_vid(struct pmbus_data *data,
+                  struct pmbus_sensor *sensor)
+{
+    long val = sensor->data;
+    long rv = 0;
+
+    switch (data->info->vrm_version[sensor->page]) {
+    case vr11:
+        if (val >= 0x02 && val <= 0xb2)
+            rv = DIV_ROUND_CLOSEST(160000 - (val - 2) * 625, 100);
+        break;
+    case vr12:
+        if (val >= 0x01)
+            rv = 250 + (val - 1) * 5;
+        break;
+    case vr13:
+        if (val >= 0x01)
+            rv = 500 + (val - 1) * 10;
+        break;
+    case imvp9:
+        if (val >= 0x01)
+            rv = 200 + (val - 1) * 10;
+        break;
+    case amd625mv:
+        if (val >= 0x0 && val <= 0xd8)
+            rv = DIV_ROUND_CLOSEST(155000 - val * 625, 100);
+        break;
+    }
+    return rv;
+}
+
+static s64 pmbus_reg2data(struct pmbus_data *data, struct pmbus_sensor *sensor)
+{
+    s64 val;
+
+    if (!sensor->convert)
+        return sensor->data;
+
+    switch (data->info->format[sensor->class]) {
+    case direct:
+        val = pmbus_reg2data_direct(data, sensor);
+        break;
+    case vid:
+        val = pmbus_reg2data_vid(data, sensor);
+        break;
+    case linear:
+    default:
+        val = pmbus_reg2data_linear(data, sensor);
+        break;
+    }
+    return val;
+}
+
+#define MAX_MANTISSA    (1023 * 1000)
+#define MIN_MANTISSA    (511 * 1000)
+
+static u16 pmbus_data2reg_linear(struct pmbus_data *data,
+                 struct pmbus_sensor *sensor, s64 val)
+{
+    s16 exponent = 0, mantissa;
+    bool negative = false;
+
+    /* simple case */
+    if (val == 0)
+        return 0;
+
+    if (sensor->class == PSC_VOLTAGE_OUT) {
+        /* LINEAR16 does not support negative voltages */
+        if (val < 0)
+            return 0;
+
+        /*
+         * For a static exponents, we don't have a choice
+         * but to adjust the value to it.
+         */
+        if (data->exponent[sensor->page] < 0)
+            val <<= -data->exponent[sensor->page];
+        else
+            val >>= data->exponent[sensor->page];
+        val = DIV_ROUND_CLOSEST_ULL(val, 1000);
+        return clamp_val(val, 0, 0xffff);
+    }
+
+    if (val < 0) {
+        negative = true;
+        val = -val;
+    }
+
+    /* Power is in uW. Convert to mW before converting. */
+    if (sensor->class == PSC_POWER)
+        val = DIV_ROUND_CLOSEST_ULL(val, 1000);
+
+    /*
+     * For simplicity, convert fan data to milli-units
+     * before calculating the exponent.
+     */
+    if (sensor->class == PSC_FAN)
+        val = val * 1000LL;
+
+    /* Reduce large mantissa until it fits into 10 bit */
+    while (val >= MAX_MANTISSA && exponent < 15) {
+        exponent++;
+        val >>= 1;
+    }
+    /* Increase small mantissa to improve precision */
+    while (val < MIN_MANTISSA && exponent > -15) {
+        exponent--;
+        val <<= 1;
+    }
+
+    /* Convert mantissa from milli-units to units */
+    mantissa = clamp_val(DIV_ROUND_CLOSEST_ULL(val, 1000), 0, 0x3ff);
+
+    /* restore sign */
+    if (negative)
+        mantissa = -mantissa;
+
+    /* Convert to 5 bit exponent, 11 bit mantissa */
+    return (mantissa & 0x7ff) | ((exponent << 11) & 0xf800);
+}
+
+static u16 pmbus_data2reg_direct(struct pmbus_data *data,
+                 struct pmbus_sensor *sensor, s64 val)
+{
+    s64 b;
+    s32 m, R;
+
+    m = data->info->m[sensor->class];
+    b = data->info->b[sensor->class];
+    R = data->info->R[sensor->class];
+
+    /* Power is in uW. Adjust R and b. */
+    if (sensor->class == PSC_POWER) {
+        R -= 3;
+        b *= 1000;
+    }
+
+    /* Calculate Y = (m * X + b) * 10^R */
+    if (!(sensor->class == PSC_FAN || sensor->class == PSC_PWM)) {
+        R -= 3;        /* Adjust R and b for data in milli-units */
+        b *= 1000;
+    }
+    val = val * m + b;
+
+    while (R > 0) {
+        val *= 10;
+        R--;
+    }
+    while (R < 0) {
+        val = div_s64(val + 5LL, 10L);  /* round closest */
+        R++;
+    }
+
+    return (u16)clamp_val(val, S16_MIN, S16_MAX);
+}
+
+static u16 pmbus_data2reg_vid(struct pmbus_data *data,
+                  struct pmbus_sensor *sensor, s64 val)
+{
+    val = clamp_val(val, 500, 1600);
+
+    return 2 + DIV_ROUND_CLOSEST_ULL((1600LL - val) * 100LL, 625);
+}
+
+static u16 pmbus_data2reg(struct pmbus_data *data,
+              struct pmbus_sensor *sensor, s64 val)
+{
+    u16 regval;
+
+    if (!sensor->convert)
+        return val;
+
+    switch (data->info->format[sensor->class]) {
+    case direct:
+        regval = pmbus_data2reg_direct(data, sensor, val);
+        break;
+    case vid:
+        regval = pmbus_data2reg_vid(data, sensor, val);
+        break;
+    case linear:
+    default:
+        regval = pmbus_data2reg_linear(data, sensor, val);
+        break;
+    }
+    return regval;
+}
+
+/*
+ * Return boolean calculated from converted data.
+ * <index> defines a status register index and mask.
+ * The mask is in the lower 8 bits, the register index is in bits 8..23.
+ *
+ * The associated pmbus_boolean structure contains optional pointers to two
+ * sensor attributes. If specified, those attributes are compared against each
+ * other to determine if a limit has been exceeded.
+ *
+ * If the sensor attribute pointers are NULL, the function returns true if
+ * (status[reg] & mask) is true.
+ *
+ * If sensor attribute pointers are provided, a comparison against a specified
+ * limit has to be performed to determine the boolean result.
+ * In this case, the function returns true if v1 >= v2 (where v1 and v2 are
+ * sensor values referenced by sensor attribute pointers s1 and s2).
+ *
+ * To determine if an object exceeds upper limits, specify <s1,s2> = <v,limit>.
+ * To determine if an object exceeds lower limits, specify <s1,s2> = <limit,v>.
+ *
+ * If a negative value is stored in any of the referenced registers, this value
+ * reflects an error code which will be returned.
+ */
+static int pmbus_get_boolean(struct i2c_client *client, struct pmbus_boolean *b,
+                 int index)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    struct pmbus_sensor *s1 = b->s1;
+    struct pmbus_sensor *s2 = b->s2;
+    u16 mask = pb_index_to_mask(index);
+    u8 page = pb_index_to_page(index);
+    u16 reg = pb_index_to_reg(index);
+    int ret, status;
+    u16 regval;
+
+    mutex_lock(&data->update_lock);
+    status = pmbus_get_status(client, page, reg);
+    if (status < 0) {
+        ret = status;
+        goto unlock;
+    }
+
+    if (s1)
+        pmbus_update_sensor_data(client, s1);
+    if (s2)
+        pmbus_update_sensor_data(client, s2);
+
+    regval = status & mask;
+    if (s1 && s2) {
+        s64 v1, v2;
+
+        if (s1->data < 0) {
+            ret = s1->data;
+            goto unlock;
+        }
+        if (s2->data < 0) {
+            ret = s2->data;
+            goto unlock;
+        }
+
+        v1 = pmbus_reg2data(data, s1);
+        v2 = pmbus_reg2data(data, s2);
+        ret = !!(regval && v1 >= v2);
+    } else {
+        ret = !!regval;
+    }
+unlock:
+    mutex_unlock(&data->update_lock);
+    return ret;
+}
+
+static ssize_t pmbus_show_boolean(struct device *dev,
+                  struct device_attribute *da, char *buf)
+{
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    struct pmbus_boolean *boolean = to_pmbus_boolean(attr);
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    int val;
+
+    val = pmbus_get_boolean(client, boolean, attr->index);
+    if (val < 0)
+        return val;
+    return snprintf(buf, PAGE_SIZE, "%d\n", val);
+}
+
+static ssize_t pmbus_show_sensor(struct device *dev,
+                 struct device_attribute *devattr, char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct pmbus_sensor *sensor = to_pmbus_sensor(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    ssize_t ret;
+
+    mutex_lock(&data->update_lock);
+    pmbus_update_sensor_data(client, sensor);
+    if (sensor->data < 0)
+        ret = sensor->data;
+    else
+        ret = snprintf(buf, PAGE_SIZE, "%lld\n", pmbus_reg2data(data, sensor));
+    mutex_unlock(&data->update_lock);
+    return ret;
+}
+
+static ssize_t pmbus_set_sensor(struct device *dev,
+                struct device_attribute *devattr,
+                const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    struct pmbus_sensor *sensor = to_pmbus_sensor(devattr);
+    ssize_t rv = count;
+    s64 val;
+    int ret;
+    u16 regval;
+
+    if (kstrtos64(buf, 10, &val) < 0)
+        return -EINVAL;
+
+    mutex_lock(&data->update_lock);
+    regval = pmbus_data2reg(data, sensor, val);
+    ret = _pmbus_write_word_data(client, sensor->page, sensor->reg, regval);
+    if (ret < 0)
+        rv = ret;
+    else
+        sensor->data = regval;
+    mutex_unlock(&data->update_lock);
+    return rv;
+}
+
+static ssize_t pmbus_show_label(struct device *dev,
+                struct device_attribute *da, char *buf)
+{
+    struct pmbus_label *label = to_pmbus_label(da);
+
+    return snprintf(buf, PAGE_SIZE, "%s\n", label->label);
+}
+
+static int pmbus_add_attribute(struct pmbus_data *data, struct attribute *attr)
+{
+    if (data->num_attributes >= data->max_attributes - 1) {
+        int new_max_attrs = data->max_attributes + PMBUS_ATTR_ALLOC_SIZE;
+        void *new_attrs = devm_krealloc(data->dev, data->group.attrs,
+                        new_max_attrs * sizeof(void *),
+                        GFP_KERNEL);
+        if (!new_attrs)
+            return -ENOMEM;
+        data->group.attrs = new_attrs;
+        data->max_attributes = new_max_attrs;
+    }
+
+    data->group.attrs[data->num_attributes++] = attr;
+    data->group.attrs[data->num_attributes] = NULL;
+    return 0;
+}
+
+static void pmbus_dev_attr_init(struct device_attribute *dev_attr,
+                const char *name,
+                umode_t mode,
+                ssize_t (*show)(struct device *dev,
+                        struct device_attribute *attr,
+                        char *buf),
+                ssize_t (*store)(struct device *dev,
+                         struct device_attribute *attr,
+                         const char *buf, size_t count))
+{
+    sysfs_attr_init(&dev_attr->attr);
+    dev_attr->attr.name = name;
+    dev_attr->attr.mode = mode;
+    dev_attr->show = show;
+    dev_attr->store = store;
+}
+
+static void pmbus_attr_init(struct sensor_device_attribute *a,
+                const char *name,
+                umode_t mode,
+                ssize_t (*show)(struct device *dev,
+                        struct device_attribute *attr,
+                        char *buf),
+                ssize_t (*store)(struct device *dev,
+                         struct device_attribute *attr,
+                         const char *buf, size_t count),
+                int idx)
+{
+    pmbus_dev_attr_init(&a->dev_attr, name, mode, show, store);
+    a->index = idx;
+}
+
+static int pmbus_add_boolean(struct pmbus_data *data,
+                 const char *name, const char *type, int seq,
+                 struct pmbus_sensor *s1,
+                 struct pmbus_sensor *s2,
+                 u8 page, u16 reg, u16 mask)
+{
+    struct pmbus_boolean *boolean;
+    struct sensor_device_attribute *a;
+
+    if (WARN((s1 && !s2) || (!s1 && s2), "Bad s1/s2 parameters\n"))
+        return -EINVAL;
+
+    boolean = devm_kzalloc(data->dev, sizeof(*boolean), GFP_KERNEL);
+    if (!boolean)
+        return -ENOMEM;
+
+    a = &boolean->attribute;
+
+    snprintf(boolean->name, sizeof(boolean->name), "%s%d_%s",
+         name, seq, type);
+    boolean->s1 = s1;
+    boolean->s2 = s2;
+    pmbus_attr_init(a, boolean->name, 0444, pmbus_show_boolean, NULL,
+            pb_reg_to_index(page, reg, mask));
+
+    return pmbus_add_attribute(data, &a->dev_attr.attr);
+}
+
+static struct pmbus_sensor *pmbus_add_sensor(struct pmbus_data *data,
+                         const char *name, const char *type,
+                         int seq, int page, int phase,
+                         int reg,
+                         enum pmbus_sensor_classes class,
+                         bool update, bool readonly,
+                         bool convert)
+{
+    struct pmbus_sensor *sensor;
+    struct device_attribute *a;
+
+    sensor = devm_kzalloc(data->dev, sizeof(*sensor), GFP_KERNEL);
+    if (!sensor)
+        return NULL;
+    a = &sensor->attribute;
+
+    if (type)
+        snprintf(sensor->name, sizeof(sensor->name), "%s%d_%s",
+             name, seq, type);
+    else
+        snprintf(sensor->name, sizeof(sensor->name), "%s%d",
+             name, seq);
+
+    if (data->flags & PMBUS_WRITE_PROTECTED)
+        readonly = true;
+
+    sensor->page = page;
+    sensor->phase = phase;
+    sensor->reg = reg;
+    sensor->class = class;
+    sensor->update = update;
+    sensor->convert = convert;
+    sensor->data = -ENODATA;
+    pmbus_dev_attr_init(a, sensor->name,
+                readonly ? 0444 : 0644,
+                pmbus_show_sensor, pmbus_set_sensor);
+
+    if (pmbus_add_attribute(data, &a->attr))
+        return NULL;
+
+    sensor->next = data->sensors;
+    data->sensors = sensor;
+
+    return sensor;
+}
+
+static int pmbus_add_label(struct pmbus_data *data,
+               const char *name, int seq,
+               const char *lstring, int index, int phase)
+{
+    struct pmbus_label *label;
+    struct device_attribute *a;
+
+    label = devm_kzalloc(data->dev, sizeof(*label), GFP_KERNEL);
+    if (!label)
+        return -ENOMEM;
+
+    a = &label->attribute;
+
+    snprintf(label->name, sizeof(label->name), "%s%d_label", name, seq);
+    if (!index) {
+        if (phase == 0xff)
+            strncpy(label->label, lstring,
+                sizeof(label->label) - 1);
+        else
+            snprintf(label->label, sizeof(label->label), "%s.%d",
+                 lstring, phase);
+    } else {
+        if (phase == 0xff)
+            snprintf(label->label, sizeof(label->label), "%s%d",
+                 lstring, index);
+        else
+            snprintf(label->label, sizeof(label->label), "%s%d.%d",
+                 lstring, index, phase);
+    }
+
+    pmbus_dev_attr_init(a, label->name, 0444, pmbus_show_label, NULL);
+    return pmbus_add_attribute(data, &a->attr);
+}
+
+/*
+ * Search for attributes. Allocate sensors, booleans, and labels as needed.
+ */
+
+/*
+ * The pmbus_limit_attr structure describes a single limit attribute
+ * and its associated alarm attribute.
+ */
+struct pmbus_limit_attr {
+    u16 reg;        /* Limit register */
+    u16 sbit;        /* Alarm attribute status bit */
+    bool update;        /* True if register needs updates */
+    bool low;        /* True if low limit; for limits with compare
+                   functions only */
+    const char *attr;    /* Attribute name */
+    const char *alarm;    /* Alarm attribute name */
+};
+
+/*
+ * The pmbus_sensor_attr structure describes one sensor attribute. This
+ * description includes a reference to the associated limit attributes.
+ */
+struct pmbus_sensor_attr {
+    u16 reg;            /* sensor register */
+    u16 gbit;            /* generic status bit */
+    u8 nlimit;            /* # of limit registers */
+    enum pmbus_sensor_classes class;/* sensor class */
+    const char *label;        /* sensor label */
+    bool paged;            /* true if paged sensor */
+    bool update;            /* true if update needed */
+    bool compare;            /* true if compare function needed */
+    u32 func;            /* sensor mask */
+    u32 sfunc;            /* sensor status mask */
+    int sreg;            /* status register */
+    const struct pmbus_limit_attr *limit;/* limit registers */
+};
+
+/*
+ * Add a set of limit attributes and, if supported, the associated
+ * alarm attributes.
+ * returns 0 if no alarm register found, 1 if an alarm register was found,
+ * < 0 on errors.
+ */
+static int pmbus_add_limit_attrs(struct i2c_client *client,
+                 struct pmbus_data *data,
+                 const struct pmbus_driver_info *info,
+                 const char *name, int index, int page,
+                 struct pmbus_sensor *base,
+                 const struct pmbus_sensor_attr *attr)
+{
+    const struct pmbus_limit_attr *l = attr->limit;
+    int nlimit = attr->nlimit;
+    int have_alarm = 0;
+    int i, ret;
+    struct pmbus_sensor *curr;
+
+    for (i = 0; i < nlimit; i++) {
+        if (wb_pmbus_check_word_register(client, page, l->reg)) {
+            curr = pmbus_add_sensor(data, name, l->attr, index,
+                        page, 0xff, l->reg, attr->class,
+                        attr->update || l->update,
+                        false, true);
+            if (!curr)
+                return -ENOMEM;
+            if (l->sbit && (info->func[page] & attr->sfunc)) {
+                ret = pmbus_add_boolean(data, name,
+                    l->alarm, index,
+                    attr->compare ?  l->low ? curr : base
+                              : NULL,
+                    attr->compare ? l->low ? base : curr
+                              : NULL,
+                    page, attr->sreg, l->sbit);
+                if (ret)
+                    return ret;
+                have_alarm = 1;
+            }
+        }
+        l++;
+    }
+    return have_alarm;
+}
+
+static int pmbus_add_sensor_attrs_one(struct i2c_client *client,
+                      struct pmbus_data *data,
+                      const struct pmbus_driver_info *info,
+                      const char *name,
+                      int index, int page, int phase,
+                      const struct pmbus_sensor_attr *attr,
+                      bool paged)
+{
+    struct pmbus_sensor *base;
+    bool upper = !!(attr->gbit & 0xff00);    /* need to check STATUS_WORD */
+    int ret;
+
+    if (attr->label) {
+        ret = pmbus_add_label(data, name, index, attr->label,
+                      paged ? page + 1 : 0, phase);
+        if (ret)
+            return ret;
+    }
+    base = pmbus_add_sensor(data, name, "input", index, page, phase,
+                attr->reg, attr->class, true, true, true);
+    if (!base)
+        return -ENOMEM;
+    /* No limit and alarm attributes for phase specific sensors */
+    if (attr->sfunc && phase == 0xff) {
+        ret = pmbus_add_limit_attrs(client, data, info, name,
+                        index, page, base, attr);
+        if (ret < 0)
+            return ret;
+        /*
+         * Add generic alarm attribute only if there are no individual
+         * alarm attributes, if there is a global alarm bit, and if
+         * the generic status register (word or byte, depending on
+         * which global bit is set) for this page is accessible.
+         */
+        if (!ret && attr->gbit &&
+            (!upper || (upper && data->has_status_word)) &&
+            pmbus_check_status_register(client, page)) {
+            ret = pmbus_add_boolean(data, name, "alarm", index,
+                        NULL, NULL,
+                        page, PMBUS_STATUS_WORD,
+                        attr->gbit);
+            if (ret)
+                return ret;
+        }
+    }
+    return 0;
+}
+
+static bool pmbus_sensor_is_paged(const struct pmbus_driver_info *info,
+                  const struct pmbus_sensor_attr *attr)
+{
+    int p;
+
+    if (attr->paged)
+        return true;
+
+    /*
+     * Some attributes may be present on more than one page despite
+     * not being marked with the paged attribute. If that is the case,
+     * then treat the sensor as being paged and add the page suffix to the
+     * attribute name.
+     * We don't just add the paged attribute to all such attributes, in
+     * order to maintain the un-suffixed labels in the case where the
+     * attribute is only on page 0.
+     */
+    for (p = 1; p < info->pages; p++) {
+        if (info->func[p] & attr->func)
+            return true;
+    }
+    return false;
+}
+
+static int pmbus_add_sensor_attrs(struct i2c_client *client,
+                  struct pmbus_data *data,
+                  const char *name,
+                  const struct pmbus_sensor_attr *attrs,
+                  int nattrs)
+{
+    const struct pmbus_driver_info *info = data->info;
+    int index, i;
+    int ret;
+
+    index = 1;
+    for (i = 0; i < nattrs; i++) {
+        int page, pages;
+        bool paged = pmbus_sensor_is_paged(info, attrs);
+
+        pages = paged ? info->pages : 1;
+        for (page = 0; page < pages; page++) {
+            if (!(info->func[page] & attrs->func))
+                continue;
+            ret = pmbus_add_sensor_attrs_one(client, data, info,
+                             name, index, page,
+                             0xff, attrs, paged);
+            if (ret)
+                return ret;
+            index++;
+            if (info->phases[page]) {
+                int phase;
+
+                for (phase = 0; phase < info->phases[page];
+                     phase++) {
+                    if (!(info->pfunc[phase] & attrs->func))
+                        continue;
+                    ret = pmbus_add_sensor_attrs_one(client,
+                        data, info, name, index, page,
+                        phase, attrs, paged);
+                    if (ret)
+                        return ret;
+                    index++;
+                }
+            }
+        }
+        attrs++;
+    }
+    return 0;
+}
+
+static const struct pmbus_limit_attr vin_limit_attrs[] = {
+    {
+        .reg = PMBUS_VIN_UV_WARN_LIMIT,
+        .attr = "min",
+        .alarm = "min_alarm",
+        .sbit = PB_VOLTAGE_UV_WARNING,
+    }, {
+        .reg = PMBUS_VIN_UV_FAULT_LIMIT,
+        .attr = "lcrit",
+        .alarm = "lcrit_alarm",
+        .sbit = PB_VOLTAGE_UV_FAULT,
+    }, {
+        .reg = PMBUS_VIN_OV_WARN_LIMIT,
+        .attr = "max",
+        .alarm = "max_alarm",
+        .sbit = PB_VOLTAGE_OV_WARNING,
+    }, {
+        .reg = PMBUS_VIN_OV_FAULT_LIMIT,
+        .attr = "crit",
+        .alarm = "crit_alarm",
+        .sbit = PB_VOLTAGE_OV_FAULT,
+    }, {
+        .reg = PMBUS_VIRT_READ_VIN_AVG,
+        .update = true,
+        .attr = "average",
+    }, {
+        .reg = PMBUS_VIRT_READ_VIN_MIN,
+        .update = true,
+        .attr = "lowest",
+    }, {
+        .reg = PMBUS_VIRT_READ_VIN_MAX,
+        .update = true,
+        .attr = "highest",
+    }, {
+        .reg = PMBUS_VIRT_RESET_VIN_HISTORY,
+        .attr = "reset_history",
+    }, {
+        .reg = PMBUS_MFR_VIN_MIN,
+        .attr = "rated_min",
+    }, {
+        .reg = PMBUS_MFR_VIN_MAX,
+        .attr = "rated_max",
+    },
+};
+
+static const struct pmbus_limit_attr vmon_limit_attrs[] = {
+    {
+        .reg = PMBUS_VIRT_VMON_UV_WARN_LIMIT,
+        .attr = "min",
+        .alarm = "min_alarm",
+        .sbit = PB_VOLTAGE_UV_WARNING,
+    }, {
+        .reg = PMBUS_VIRT_VMON_UV_FAULT_LIMIT,
+        .attr = "lcrit",
+        .alarm = "lcrit_alarm",
+        .sbit = PB_VOLTAGE_UV_FAULT,
+    }, {
+        .reg = PMBUS_VIRT_VMON_OV_WARN_LIMIT,
+        .attr = "max",
+        .alarm = "max_alarm",
+        .sbit = PB_VOLTAGE_OV_WARNING,
+    }, {
+        .reg = PMBUS_VIRT_VMON_OV_FAULT_LIMIT,
+        .attr = "crit",
+        .alarm = "crit_alarm",
+        .sbit = PB_VOLTAGE_OV_FAULT,
+    }
+};
+
+static const struct pmbus_limit_attr vout_limit_attrs[] = {
+    {
+        .reg = PMBUS_VOUT_UV_WARN_LIMIT,
+        .attr = "min",
+        .alarm = "min_alarm",
+        .sbit = PB_VOLTAGE_UV_WARNING,
+    }, {
+        .reg = PMBUS_VOUT_UV_FAULT_LIMIT,
+        .attr = "lcrit",
+        .alarm = "lcrit_alarm",
+        .sbit = PB_VOLTAGE_UV_FAULT,
+    }, {
+        .reg = PMBUS_VOUT_OV_WARN_LIMIT,
+        .attr = "max",
+        .alarm = "max_alarm",
+        .sbit = PB_VOLTAGE_OV_WARNING,
+    }, {
+        .reg = PMBUS_VOUT_OV_FAULT_LIMIT,
+        .attr = "crit",
+        .alarm = "crit_alarm",
+        .sbit = PB_VOLTAGE_OV_FAULT,
+    }, {
+        .reg = PMBUS_VIRT_READ_VOUT_AVG,
+        .update = true,
+        .attr = "average",
+    }, {
+        .reg = PMBUS_VIRT_READ_VOUT_MIN,
+        .update = true,
+        .attr = "lowest",
+    }, {
+        .reg = PMBUS_VIRT_READ_VOUT_MAX,
+        .update = true,
+        .attr = "highest",
+    }, {
+        .reg = PMBUS_VIRT_RESET_VOUT_HISTORY,
+        .attr = "reset_history",
+    }, {
+        .reg = PMBUS_MFR_VOUT_MIN,
+        .attr = "rated_min",
+    }, {
+        .reg = PMBUS_MFR_VOUT_MAX,
+        .attr = "rated_max",
+    },
+};
+
+static const struct pmbus_sensor_attr voltage_attributes[] = {
+    {
+        .reg = PMBUS_READ_VIN,
+        .class = PSC_VOLTAGE_IN,
+        .label = "vin",
+        .func = PMBUS_HAVE_VIN,
+        .sfunc = PMBUS_HAVE_STATUS_INPUT,
+        .sreg = PMBUS_STATUS_INPUT,
+        .gbit = PB_STATUS_VIN_UV,
+        .limit = vin_limit_attrs,
+        .nlimit = ARRAY_SIZE(vin_limit_attrs),
+    }, {
+        .reg = PMBUS_VIRT_READ_VMON,
+        .class = PSC_VOLTAGE_IN,
+        .label = "vmon",
+        .func = PMBUS_HAVE_VMON,
+        .sfunc = PMBUS_HAVE_STATUS_VMON,
+        .sreg = PMBUS_VIRT_STATUS_VMON,
+        .limit = vmon_limit_attrs,
+        .nlimit = ARRAY_SIZE(vmon_limit_attrs),
+    }, {
+        .reg = PMBUS_READ_VCAP,
+        .class = PSC_VOLTAGE_IN,
+        .label = "vcap",
+        .func = PMBUS_HAVE_VCAP,
+    }, {
+        .reg = PMBUS_READ_VOUT,
+        .class = PSC_VOLTAGE_OUT,
+        .label = "vout",
+        .paged = true,
+        .func = PMBUS_HAVE_VOUT,
+        .sfunc = PMBUS_HAVE_STATUS_VOUT,
+        .sreg = PMBUS_STATUS_VOUT,
+        .gbit = PB_STATUS_VOUT_OV,
+        .limit = vout_limit_attrs,
+        .nlimit = ARRAY_SIZE(vout_limit_attrs),
+    }
+};
+
+/* Current attributes */
+
+static const struct pmbus_limit_attr iin_limit_attrs[] = {
+    {
+        .reg = PMBUS_IIN_OC_WARN_LIMIT,
+        .attr = "max",
+        .alarm = "max_alarm",
+        .sbit = PB_IIN_OC_WARNING,
+    }, {
+        .reg = PMBUS_IIN_OC_FAULT_LIMIT,
+        .attr = "crit",
+        .alarm = "crit_alarm",
+        .sbit = PB_IIN_OC_FAULT,
+    }, {
+        .reg = PMBUS_VIRT_READ_IIN_AVG,
+        .update = true,
+        .attr = "average",
+    }, {
+        .reg = PMBUS_VIRT_READ_IIN_MIN,
+        .update = true,
+        .attr = "lowest",
+    }, {
+        .reg = PMBUS_VIRT_READ_IIN_MAX,
+        .update = true,
+        .attr = "highest",
+    }, {
+        .reg = PMBUS_VIRT_RESET_IIN_HISTORY,
+        .attr = "reset_history",
+    }, {
+        .reg = PMBUS_MFR_IIN_MAX,
+        .attr = "rated_max",
+    },
+};
+
+static const struct pmbus_limit_attr iout_limit_attrs[] = {
+    {
+        .reg = PMBUS_IOUT_OC_WARN_LIMIT,
+        .attr = "max",
+        .alarm = "max_alarm",
+        .sbit = PB_IOUT_OC_WARNING,
+    }, {
+        .reg = PMBUS_IOUT_UC_FAULT_LIMIT,
+        .attr = "lcrit",
+        .alarm = "lcrit_alarm",
+        .sbit = PB_IOUT_UC_FAULT,
+    }, {
+        .reg = PMBUS_IOUT_OC_FAULT_LIMIT,
+        .attr = "crit",
+        .alarm = "crit_alarm",
+        .sbit = PB_IOUT_OC_FAULT,
+    }, {
+        .reg = PMBUS_VIRT_READ_IOUT_AVG,
+        .update = true,
+        .attr = "average",
+    }, {
+        .reg = PMBUS_VIRT_READ_IOUT_MIN,
+        .update = true,
+        .attr = "lowest",
+    }, {
+        .reg = PMBUS_VIRT_READ_IOUT_MAX,
+        .update = true,
+        .attr = "highest",
+    }, {
+        .reg = PMBUS_VIRT_RESET_IOUT_HISTORY,
+        .attr = "reset_history",
+    }, {
+        .reg = PMBUS_MFR_IOUT_MAX,
+        .attr = "rated_max",
+    },
+};
+
+static const struct pmbus_sensor_attr current_attributes[] = {
+    {
+        .reg = PMBUS_READ_IIN,
+        .class = PSC_CURRENT_IN,
+        .label = "iin",
+        .func = PMBUS_HAVE_IIN,
+        .sfunc = PMBUS_HAVE_STATUS_INPUT,
+        .sreg = PMBUS_STATUS_INPUT,
+        .gbit = PB_STATUS_INPUT,
+        .limit = iin_limit_attrs,
+        .nlimit = ARRAY_SIZE(iin_limit_attrs),
+    }, {
+        .reg = PMBUS_READ_IOUT,
+        .class = PSC_CURRENT_OUT,
+        .label = "iout",
+        .paged = true,
+        .func = PMBUS_HAVE_IOUT,
+        .sfunc = PMBUS_HAVE_STATUS_IOUT,
+        .sreg = PMBUS_STATUS_IOUT,
+        .gbit = PB_STATUS_IOUT_OC,
+        .limit = iout_limit_attrs,
+        .nlimit = ARRAY_SIZE(iout_limit_attrs),
+    }
+};
+
+/* Power attributes */
+
+static const struct pmbus_limit_attr pin_limit_attrs[] = {
+    {
+        .reg = PMBUS_PIN_OP_WARN_LIMIT,
+        .attr = "max",
+        .alarm = "alarm",
+        .sbit = PB_PIN_OP_WARNING,
+    }, {
+        .reg = PMBUS_VIRT_READ_PIN_AVG,
+        .update = true,
+        .attr = "average",
+    }, {
+        .reg = PMBUS_VIRT_READ_PIN_MIN,
+        .update = true,
+        .attr = "input_lowest",
+    }, {
+        .reg = PMBUS_VIRT_READ_PIN_MAX,
+        .update = true,
+        .attr = "input_highest",
+    }, {
+        .reg = PMBUS_VIRT_RESET_PIN_HISTORY,
+        .attr = "reset_history",
+    }, {
+        .reg = PMBUS_MFR_PIN_MAX,
+        .attr = "rated_max",
+    },
+};
+
+static const struct pmbus_limit_attr pout_limit_attrs[] = {
+    {
+        .reg = PMBUS_POUT_MAX,
+        .attr = "cap",
+        .alarm = "cap_alarm",
+        .sbit = PB_POWER_LIMITING,
+    }, {
+        .reg = PMBUS_POUT_OP_WARN_LIMIT,
+        .attr = "max",
+        .alarm = "max_alarm",
+        .sbit = PB_POUT_OP_WARNING,
+    }, {
+        .reg = PMBUS_POUT_OP_FAULT_LIMIT,
+        .attr = "crit",
+        .alarm = "crit_alarm",
+        .sbit = PB_POUT_OP_FAULT,
+    }, {
+        .reg = PMBUS_VIRT_READ_POUT_AVG,
+        .update = true,
+        .attr = "average",
+    }, {
+        .reg = PMBUS_VIRT_READ_POUT_MIN,
+        .update = true,
+        .attr = "input_lowest",
+    }, {
+        .reg = PMBUS_VIRT_READ_POUT_MAX,
+        .update = true,
+        .attr = "input_highest",
+    }, {
+        .reg = PMBUS_VIRT_RESET_POUT_HISTORY,
+        .attr = "reset_history",
+    }, {
+        .reg = PMBUS_MFR_POUT_MAX,
+        .attr = "rated_max",
+    },
+};
+
+static const struct pmbus_sensor_attr power_attributes[] = {
+    {
+        .reg = PMBUS_READ_PIN,
+        .class = PSC_POWER,
+        .label = "pin",
+        .func = PMBUS_HAVE_PIN,
+        .sfunc = PMBUS_HAVE_STATUS_INPUT,
+        .sreg = PMBUS_STATUS_INPUT,
+        .gbit = PB_STATUS_INPUT,
+        .limit = pin_limit_attrs,
+        .nlimit = ARRAY_SIZE(pin_limit_attrs),
+    }, {
+        .reg = PMBUS_READ_POUT,
+        .class = PSC_POWER,
+        .label = "pout",
+        .paged = true,
+        .func = PMBUS_HAVE_POUT,
+        .sfunc = PMBUS_HAVE_STATUS_IOUT,
+        .sreg = PMBUS_STATUS_IOUT,
+        .limit = pout_limit_attrs,
+        .nlimit = ARRAY_SIZE(pout_limit_attrs),
+    }
+};
+
+/* Temperature atributes */
+
+static const struct pmbus_limit_attr temp_limit_attrs[] = {
+    {
+        .reg = PMBUS_UT_WARN_LIMIT,
+        .low = true,
+        .attr = "min",
+        .alarm = "min_alarm",
+        .sbit = PB_TEMP_UT_WARNING,
+    }, {
+        .reg = PMBUS_UT_FAULT_LIMIT,
+        .low = true,
+        .attr = "lcrit",
+        .alarm = "lcrit_alarm",
+        .sbit = PB_TEMP_UT_FAULT,
+    }, {
+        .reg = PMBUS_OT_WARN_LIMIT,
+        .attr = "max",
+        .alarm = "max_alarm",
+        .sbit = PB_TEMP_OT_WARNING,
+    }, {
+        .reg = PMBUS_OT_FAULT_LIMIT,
+        .attr = "crit",
+        .alarm = "crit_alarm",
+        .sbit = PB_TEMP_OT_FAULT,
+    }, {
+        .reg = PMBUS_VIRT_READ_TEMP_MIN,
+        .attr = "lowest",
+    }, {
+        .reg = PMBUS_VIRT_READ_TEMP_AVG,
+        .attr = "average",
+    }, {
+        .reg = PMBUS_VIRT_READ_TEMP_MAX,
+        .attr = "highest",
+    }, {
+        .reg = PMBUS_VIRT_RESET_TEMP_HISTORY,
+        .attr = "reset_history",
+    }, {
+        .reg = PMBUS_MFR_MAX_TEMP_1,
+        .attr = "rated_max",
+    },
+};
+
+static const struct pmbus_limit_attr temp_limit_attrs2[] = {
+    {
+        .reg = PMBUS_UT_WARN_LIMIT,
+        .low = true,
+        .attr = "min",
+        .alarm = "min_alarm",
+        .sbit = PB_TEMP_UT_WARNING,
+    }, {
+        .reg = PMBUS_UT_FAULT_LIMIT,
+        .low = true,
+        .attr = "lcrit",
+        .alarm = "lcrit_alarm",
+        .sbit = PB_TEMP_UT_FAULT,
+    }, {
+        .reg = PMBUS_OT_WARN_LIMIT,
+        .attr = "max",
+        .alarm = "max_alarm",
+        .sbit = PB_TEMP_OT_WARNING,
+    }, {
+        .reg = PMBUS_OT_FAULT_LIMIT,
+        .attr = "crit",
+        .alarm = "crit_alarm",
+        .sbit = PB_TEMP_OT_FAULT,
+    }, {
+        .reg = PMBUS_VIRT_READ_TEMP2_MIN,
+        .attr = "lowest",
+    }, {
+        .reg = PMBUS_VIRT_READ_TEMP2_AVG,
+        .attr = "average",
+    }, {
+        .reg = PMBUS_VIRT_READ_TEMP2_MAX,
+        .attr = "highest",
+    }, {
+        .reg = PMBUS_VIRT_RESET_TEMP2_HISTORY,
+        .attr = "reset_history",
+    }, {
+        .reg = PMBUS_MFR_MAX_TEMP_2,
+        .attr = "rated_max",
+    },
+};
+
+static const struct pmbus_limit_attr temp_limit_attrs3[] = {
+    {
+        .reg = PMBUS_UT_WARN_LIMIT,
+        .low = true,
+        .attr = "min",
+        .alarm = "min_alarm",
+        .sbit = PB_TEMP_UT_WARNING,
+    }, {
+        .reg = PMBUS_UT_FAULT_LIMIT,
+        .low = true,
+        .attr = "lcrit",
+        .alarm = "lcrit_alarm",
+        .sbit = PB_TEMP_UT_FAULT,
+    }, {
+        .reg = PMBUS_OT_WARN_LIMIT,
+        .attr = "max",
+        .alarm = "max_alarm",
+        .sbit = PB_TEMP_OT_WARNING,
+    }, {
+        .reg = PMBUS_OT_FAULT_LIMIT,
+        .attr = "crit",
+        .alarm = "crit_alarm",
+        .sbit = PB_TEMP_OT_FAULT,
+    }, {
+        .reg = PMBUS_MFR_MAX_TEMP_3,
+        .attr = "rated_max",
+    },
+};
+
+static const struct pmbus_sensor_attr temp_attributes[] = {
+    {
+        .reg = PMBUS_READ_TEMPERATURE_1,
+        .class = PSC_TEMPERATURE,
+        .paged = true,
+        .update = true,
+        .compare = true,
+        .func = PMBUS_HAVE_TEMP,
+        .sfunc = PMBUS_HAVE_STATUS_TEMP,
+        .sreg = PMBUS_STATUS_TEMPERATURE,
+        .gbit = PB_STATUS_TEMPERATURE,
+        .limit = temp_limit_attrs,
+        .nlimit = ARRAY_SIZE(temp_limit_attrs),
+    }, {
+        .reg = PMBUS_READ_TEMPERATURE_2,
+        .class = PSC_TEMPERATURE,
+        .paged = true,
+        .update = true,
+        .compare = true,
+        .func = PMBUS_HAVE_TEMP2,
+        .sfunc = PMBUS_HAVE_STATUS_TEMP,
+        .sreg = PMBUS_STATUS_TEMPERATURE,
+        .gbit = PB_STATUS_TEMPERATURE,
+        .limit = temp_limit_attrs2,
+        .nlimit = ARRAY_SIZE(temp_limit_attrs2),
+    }, {
+        .reg = PMBUS_READ_TEMPERATURE_3,
+        .class = PSC_TEMPERATURE,
+        .paged = true,
+        .update = true,
+        .compare = true,
+        .func = PMBUS_HAVE_TEMP3,
+        .sfunc = PMBUS_HAVE_STATUS_TEMP,
+        .sreg = PMBUS_STATUS_TEMPERATURE,
+        .gbit = PB_STATUS_TEMPERATURE,
+        .limit = temp_limit_attrs3,
+        .nlimit = ARRAY_SIZE(temp_limit_attrs3),
+    }
+};
+
+static const int pmbus_fan_registers[] = {
+    PMBUS_READ_FAN_SPEED_1,
+    PMBUS_READ_FAN_SPEED_2,
+    PMBUS_READ_FAN_SPEED_3,
+    PMBUS_READ_FAN_SPEED_4
+};
+
+static const int pmbus_fan_status_registers[] = {
+    PMBUS_STATUS_FAN_12,
+    PMBUS_STATUS_FAN_12,
+    PMBUS_STATUS_FAN_34,
+    PMBUS_STATUS_FAN_34
+};
+
+static const u32 pmbus_fan_flags[] = {
+    PMBUS_HAVE_FAN12,
+    PMBUS_HAVE_FAN12,
+    PMBUS_HAVE_FAN34,
+    PMBUS_HAVE_FAN34
+};
+
+static const u32 pmbus_fan_status_flags[] = {
+    PMBUS_HAVE_STATUS_FAN12,
+    PMBUS_HAVE_STATUS_FAN12,
+    PMBUS_HAVE_STATUS_FAN34,
+    PMBUS_HAVE_STATUS_FAN34
+};
+
+/* Fans */
+
+/* Precondition: FAN_CONFIG_x_y and FAN_COMMAND_x must exist for the fan ID */
+static int pmbus_add_fan_ctrl(struct i2c_client *client,
+        struct pmbus_data *data, int index, int page, int id,
+        u8 config)
+{
+    struct pmbus_sensor *sensor;
+
+    sensor = pmbus_add_sensor(data, "fan", "target", index, page,
+                  0xff, PMBUS_VIRT_FAN_TARGET_1 + id, PSC_FAN,
+                  false, false, true);
+
+    if (!sensor)
+        return -ENOMEM;
+
+    if (!((data->info->func[page] & PMBUS_HAVE_PWM12) ||
+            (data->info->func[page] & PMBUS_HAVE_PWM34)))
+        return 0;
+
+    sensor = pmbus_add_sensor(data, "pwm", NULL, index, page,
+                  0xff, PMBUS_VIRT_PWM_1 + id, PSC_PWM,
+                  false, false, true);
+
+    if (!sensor)
+        return -ENOMEM;
+
+    sensor = pmbus_add_sensor(data, "pwm", "enable", index, page,
+                  0xff, PMBUS_VIRT_PWM_ENABLE_1 + id, PSC_PWM,
+                  true, false, false);
+
+    if (!sensor)
+        return -ENOMEM;
+
+    return 0;
+}
+
+static int pmbus_add_fan_attributes(struct i2c_client *client,
+                    struct pmbus_data *data)
+{
+    const struct pmbus_driver_info *info = data->info;
+    int index = 1;
+    int page;
+    int ret;
+
+    for (page = 0; page < info->pages; page++) {
+        int f;
+
+        for (f = 0; f < ARRAY_SIZE(pmbus_fan_registers); f++) {
+            int regval;
+
+            if (!(info->func[page] & pmbus_fan_flags[f]))
+                break;
+
+            if (!wb_pmbus_check_word_register(client, page,
+                               pmbus_fan_registers[f]))
+                break;
+
+            /*
+             * Skip fan if not installed.
+             * Each fan configuration register covers multiple fans,
+             * so we have to do some magic.
+             */
+            regval = _pmbus_read_byte_data(client, page,
+                pmbus_fan_config_registers[f]);
+            if (regval < 0 ||
+                (!(regval & (PB_FAN_1_INSTALLED >> ((f & 1) * 4)))))
+                continue;
+
+            if (pmbus_add_sensor(data, "fan", "input", index,
+                         page, 0xff, pmbus_fan_registers[f],
+                         PSC_FAN, true, true, true) == NULL)
+                return -ENOMEM;
+
+            /* Fan control */
+            if (wb_pmbus_check_word_register(client, page,
+                    pmbus_fan_command_registers[f])) {
+                ret = pmbus_add_fan_ctrl(client, data, index,
+                             page, f, regval);
+                if (ret < 0)
+                    return ret;
+            }
+
+            /*
+             * Each fan status register covers multiple fans,
+             * so we have to do some magic.
+             */
+            if ((info->func[page] & pmbus_fan_status_flags[f]) &&
+                wb_pmbus_check_byte_register(client,
+                    page, pmbus_fan_status_registers[f])) {
+                int reg;
+
+                if (f > 1)    /* fan 3, 4 */
+                    reg = PMBUS_STATUS_FAN_34;
+                else
+                    reg = PMBUS_STATUS_FAN_12;
+                ret = pmbus_add_boolean(data, "fan",
+                    "alarm", index, NULL, NULL, page, reg,
+                    PB_FAN_FAN1_WARNING >> (f & 1));
+                if (ret)
+                    return ret;
+                ret = pmbus_add_boolean(data, "fan",
+                    "fault", index, NULL, NULL, page, reg,
+                    PB_FAN_FAN1_FAULT >> (f & 1));
+                if (ret)
+                    return ret;
+            }
+            index++;
+        }
+    }
+    return 0;
+}
+
+struct pmbus_samples_attr {
+    int reg;
+    char *name;
+};
+
+struct pmbus_samples_reg {
+    int page;
+    struct pmbus_samples_attr *attr;
+    struct device_attribute dev_attr;
+};
+
+static struct pmbus_samples_attr pmbus_samples_registers[] = {
+    {
+        .reg = PMBUS_VIRT_SAMPLES,
+        .name = "samples",
+    }, {
+        .reg = PMBUS_VIRT_IN_SAMPLES,
+        .name = "in_samples",
+    }, {
+        .reg = PMBUS_VIRT_CURR_SAMPLES,
+        .name = "curr_samples",
+    }, {
+        .reg = PMBUS_VIRT_POWER_SAMPLES,
+        .name = "power_samples",
+    }, {
+        .reg = PMBUS_VIRT_TEMP_SAMPLES,
+        .name = "temp_samples",
+    }
+};
+
+#define to_samples_reg(x) container_of(x, struct pmbus_samples_reg, dev_attr)
+
+static ssize_t pmbus_show_samples(struct device *dev,
+                  struct device_attribute *devattr, char *buf)
+{
+    int val;
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct pmbus_samples_reg *reg = to_samples_reg(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    mutex_lock(&data->update_lock);
+    val = _pmbus_read_word_data(client, reg->page, 0xff, reg->attr->reg);
+    mutex_unlock(&data->update_lock);
+    if (val < 0)
+        return val;
+
+    return snprintf(buf, PAGE_SIZE, "%d\n", val);
+}
+
+static ssize_t pmbus_set_samples(struct device *dev,
+                 struct device_attribute *devattr,
+                 const char *buf, size_t count)
+{
+    int ret;
+    long val;
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct pmbus_samples_reg *reg = to_samples_reg(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    if (kstrtol(buf, 0, &val) < 0)
+        return -EINVAL;
+
+    mutex_lock(&data->update_lock);
+    ret = _pmbus_write_word_data(client, reg->page, reg->attr->reg, val);
+    mutex_unlock(&data->update_lock);
+
+    return ret ? : count;
+}
+
+static int pmbus_add_samples_attr(struct pmbus_data *data, int page,
+                  struct pmbus_samples_attr *attr)
+{
+    struct pmbus_samples_reg *reg;
+
+    reg = devm_kzalloc(data->dev, sizeof(*reg), GFP_KERNEL);
+    if (!reg)
+        return -ENOMEM;
+
+    reg->attr = attr;
+    reg->page = page;
+
+    pmbus_dev_attr_init(&reg->dev_attr, attr->name, 0644,
+                pmbus_show_samples, pmbus_set_samples);
+
+    return pmbus_add_attribute(data, &reg->dev_attr.attr);
+}
+
+static int pmbus_add_samples_attributes(struct i2c_client *client,
+                    struct pmbus_data *data)
+{
+    const struct pmbus_driver_info *info = data->info;
+    int s;
+
+    if (!(info->func[0] & PMBUS_HAVE_SAMPLES))
+        return 0;
+
+    for (s = 0; s < ARRAY_SIZE(pmbus_samples_registers); s++) {
+        struct pmbus_samples_attr *attr;
+        int ret;
+
+        attr = &pmbus_samples_registers[s];
+        if (!wb_pmbus_check_word_register(client, 0, attr->reg))
+            continue;
+
+        ret = pmbus_add_samples_attr(data, 0, attr);
+        if (ret)
+            return ret;
+    }
+
+    return 0;
+}
+
+static int pmbus_find_attributes(struct i2c_client *client,
+                 struct pmbus_data *data)
+{
+    int ret;
+
+    /* Voltage sensors */
+    ret = pmbus_add_sensor_attrs(client, data, "in", voltage_attributes,
+                     ARRAY_SIZE(voltage_attributes));
+    if (ret)
+        return ret;
+
+    /* Current sensors */
+    ret = pmbus_add_sensor_attrs(client, data, "curr", current_attributes,
+                     ARRAY_SIZE(current_attributes));
+    if (ret)
+        return ret;
+
+    /* Power sensors */
+    ret = pmbus_add_sensor_attrs(client, data, "power", power_attributes,
+                     ARRAY_SIZE(power_attributes));
+    if (ret)
+        return ret;
+
+    /* Temperature sensors */
+    ret = pmbus_add_sensor_attrs(client, data, "temp", temp_attributes,
+                     ARRAY_SIZE(temp_attributes));
+    if (ret)
+        return ret;
+
+    /* Fans */
+    ret = pmbus_add_fan_attributes(client, data);
+    if (ret)
+        return ret;
+
+    ret = pmbus_add_samples_attributes(client, data);
+    return ret;
+}
+
+/*
+ * Identify chip parameters.
+ * This function is called for all chips.
+ */
+static int pmbus_identify_common(struct i2c_client *client,
+                 struct pmbus_data *data, int page)
+{
+    int vout_mode = -1;
+
+    if (wb_pmbus_check_byte_register(client, page, PMBUS_VOUT_MODE))
+        vout_mode = _pmbus_read_byte_data(client, page,
+                          PMBUS_VOUT_MODE);
+    if (vout_mode >= 0 && vout_mode != 0xff) {
+        /*
+         * Not all chips support the VOUT_MODE command,
+         * so a failure to read it is not an error.
+         */
+        switch (vout_mode >> 5) {
+        case 0:    /* linear mode      */
+            if (data->info->format[PSC_VOLTAGE_OUT] != linear)
+                return -ENODEV;
+
+            data->exponent[page] = ((s8)(vout_mode << 3)) >> 3;
+            break;
+        case 1: /* VID mode         */
+            if (data->info->format[PSC_VOLTAGE_OUT] != vid)
+                return -ENODEV;
+            break;
+        case 2:    /* direct mode      */
+            if (data->info->format[PSC_VOLTAGE_OUT] != direct)
+                return -ENODEV;
+            break;
+        default:
+            return -ENODEV;
+        }
+    }
+
+    pmbus_clear_fault_page(client, page);
+    return 0;
+}
+
+static int pmbus_init_common(struct i2c_client *client, struct pmbus_data *data,
+                 struct pmbus_driver_info *info)
+{
+    struct device *dev = &client->dev;
+    int page, ret, i;
+
+    /*
+     * Some PMBus chips don't support PMBUS_STATUS_WORD, so try
+     * to use PMBUS_STATUS_BYTE instead if that is the case.
+     * Bail out if both registers are not supported.
+     */
+    for(i = 0; i < PMBUS_RETRY_TIME; i++) {
+        data->read_status = pmbus_read_status_word;
+        ret = i2c_smbus_read_word_data(client, PMBUS_STATUS_WORD);
+        if (ret < 0 || ret == 0xffff) {
+            data->read_status = pmbus_read_status_byte;
+            ret = i2c_smbus_read_byte_data(client, PMBUS_STATUS_BYTE);
+            if (ret < 0 || ret == 0xff) {
+                usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
+                continue;
+            }
+        } else {
+            data->has_status_word = true;
+        }
+        break;
+    }
+
+    if(i == PMBUS_RETRY_TIME) {
+        dev_err(dev, "PMBus status register not found\n");
+        return -ENODEV;
+    }
+
+    /* Enable PEC if the controller supports it */
+    for(i = 0; i < PMBUS_RETRY_TIME; i++) {
+        ret = i2c_smbus_read_byte_data(client, PMBUS_CAPABILITY);
+        if (ret >= 0) {
+            break;
+        }
+        usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
+    }
+
+    if (ret >= 0 && (ret & PB_CAPABILITY_ERROR_CHECK))
+        client->flags |= I2C_CLIENT_PEC;
+
+    /*
+     * Check if the chip is write protected. If it is, we can not clear
+     * faults, and we should not try it. Also, in that case, writes into
+     * limit registers need to be disabled.
+     */
+    for(i = 0; i < PMBUS_RETRY_TIME; i++) {
+        ret = i2c_smbus_read_byte_data(client, PMBUS_WRITE_PROTECT);
+        if (ret >= 0) {
+            break;
+        }
+        usleep_range(PMBUS_RETRY_SLEEP_TIME, PMBUS_RETRY_SLEEP_TIME + 1);
+    }
+
+    if (ret > 0 && (ret & PB_WP_ANY))
+        data->flags |= PMBUS_WRITE_PROTECTED | PMBUS_SKIP_STATUS_CHECK;
+
+    if (data->info->pages)
+        wb_pmbus_clear_faults(client);
+    else
+        pmbus_clear_fault_page(client, -1);
+
+    if (info->identify) {
+        ret = (*info->identify)(client, info);
+        if (ret < 0) {
+            dev_err(dev, "Chip identification failed\n");
+            return ret;
+        }
+    }
+
+    if (info->pages <= 0 || info->pages > PMBUS_PAGES) {
+        dev_err(dev, "Bad number of PMBus pages: %d\n", info->pages);
+        return -ENODEV;
+    }
+
+    for (page = 0; page < info->pages; page++) {
+        ret = pmbus_identify_common(client, data, page);
+        if (ret < 0) {
+            dev_err(dev, "Failed to identify chip capabilities\n");
+            return ret;
+        }
+    }
+    return 0;
+}
+
+#if IS_ENABLED(CONFIG_REGULATOR)
+static int pmbus_regulator_is_enabled(struct regulator_dev *rdev)
+{
+    struct device *dev = rdev_get_dev(rdev);
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    u8 page = rdev_get_id(rdev);
+    int ret;
+
+    ret = wb_pmbus_read_byte_data(client, page, PMBUS_OPERATION);
+    if (ret < 0)
+        return ret;
+
+    return !!(ret & PB_OPERATION_CONTROL_ON);
+}
+
+static int _pmbus_regulator_on_off(struct regulator_dev *rdev, bool enable)
+{
+    struct device *dev = rdev_get_dev(rdev);
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    u8 page = rdev_get_id(rdev);
+
+    return wb_pmbus_update_byte_data(client, page, PMBUS_OPERATION,
+                      PB_OPERATION_CONTROL_ON,
+                      enable ? PB_OPERATION_CONTROL_ON : 0);
+}
+
+static int pmbus_regulator_enable(struct regulator_dev *rdev)
+{
+    return _pmbus_regulator_on_off(rdev, 1);
+}
+
+static int pmbus_regulator_disable(struct regulator_dev *rdev)
+{
+    return _pmbus_regulator_on_off(rdev, 0);
+}
+
+const struct regulator_ops wb_pmbus_regulator_ops = {
+    .enable = pmbus_regulator_enable,
+    .disable = pmbus_regulator_disable,
+    .is_enabled = pmbus_regulator_is_enabled,
+};
+EXPORT_SYMBOL_GPL(wb_pmbus_regulator_ops);
+
+static int pmbus_regulator_register(struct pmbus_data *data)
+{
+    struct device *dev = data->dev;
+    const struct pmbus_driver_info *info = data->info;
+    const struct pmbus_platform_data *pdata = dev_get_platdata(dev);
+    struct regulator_dev *rdev;
+    int i;
+
+    for (i = 0; i < info->num_regulators; i++) {
+        struct regulator_config config = { };
+
+        config.dev = dev;
+        config.driver_data = data;
+
+        if (pdata && pdata->reg_init_data)
+            config.init_data = &pdata->reg_init_data[i];
+
+        rdev = devm_regulator_register(dev, &info->reg_desc[i],
+                           &config);
+        if (IS_ERR(rdev)) {
+            dev_err(dev, "Failed to register %s regulator\n",
+                info->reg_desc[i].name);
+            return PTR_ERR(rdev);
+        }
+    }
+
+    return 0;
+}
+#else
+static int pmbus_regulator_register(struct pmbus_data *data)
+{
+    return 0;
+}
+#endif
+
+static struct dentry *pmbus_debugfs_dir;    /* pmbus debugfs directory */
+
+#if IS_ENABLED(CONFIG_DEBUG_FS)
+static int pmbus_debugfs_get(void *data, u64 *val)
+{
+    int rc;
+    struct pmbus_debugfs_entry *entry = data;
+
+    rc = _pmbus_read_byte_data(entry->client, entry->page, entry->reg);
+    if (rc < 0)
+        return rc;
+
+    *val = rc;
+
+    return 0;
+}
+DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops, pmbus_debugfs_get, NULL,
+             "0x%02llx\n");
+
+static int pmbus_debugfs_get_status(void *data, u64 *val)
+{
+    int rc;
+    struct pmbus_debugfs_entry *entry = data;
+    struct pmbus_data *pdata = i2c_get_clientdata(entry->client);
+
+    rc = pdata->read_status(entry->client, entry->page);
+    if (rc < 0)
+        return rc;
+
+    *val = rc;
+
+    return 0;
+}
+DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops_status, pmbus_debugfs_get_status,
+             NULL, "0x%04llx\n");
+
+static int pmbus_debugfs_get_pec(void *data, u64 *val)
+{
+    struct i2c_client *client = data;
+
+    *val = !!(client->flags & I2C_CLIENT_PEC);
+
+    return 0;
+}
+
+static int pmbus_debugfs_set_pec(void *data, u64 val)
+{
+    int rc;
+    struct i2c_client *client = data;
+
+    if (!val) {
+        client->flags &= ~I2C_CLIENT_PEC;
+        return 0;
+    }
+
+    if (val != 1)
+        return -EINVAL;
+
+    rc = i2c_smbus_read_byte_data(client, PMBUS_CAPABILITY);
+    if (rc < 0)
+        return rc;
+
+    if (!(rc & PB_CAPABILITY_ERROR_CHECK))
+        return -EOPNOTSUPP;
+
+    client->flags |= I2C_CLIENT_PEC;
+
+    return 0;
+}
+DEFINE_DEBUGFS_ATTRIBUTE(pmbus_debugfs_ops_pec, pmbus_debugfs_get_pec,
+             pmbus_debugfs_set_pec, "%llu\n");
+
+static int pmbus_init_debugfs(struct i2c_client *client,
+                  struct pmbus_data *data)
+{
+    int i, idx = 0;
+    char name[PMBUS_NAME_SIZE];
+    struct pmbus_debugfs_entry *entries;
+
+    if (!pmbus_debugfs_dir)
+        return -ENODEV;
+
+    /*
+     * Create the debugfs directory for this device. Use the hwmon device
+     * name to avoid conflicts (hwmon numbers are globally unique).
+     */
+    data->debugfs = debugfs_create_dir(dev_name(data->hwmon_dev),
+                       pmbus_debugfs_dir);
+    if (IS_ERR_OR_NULL(data->debugfs)) {
+        data->debugfs = NULL;
+        return -ENODEV;
+    }
+
+    /* Allocate the max possible entries we need. */
+    entries = devm_kcalloc(data->dev,
+                   data->info->pages * 10, sizeof(*entries),
+                   GFP_KERNEL);
+    if (!entries)
+        return -ENOMEM;
+
+    debugfs_create_file("pec", 0664, data->debugfs, client,
+                &pmbus_debugfs_ops_pec);
+
+    for (i = 0; i < data->info->pages; ++i) {
+        /* Check accessibility of status register if it's not page 0 */
+        if (!i || pmbus_check_status_register(client, i)) {
+            /* No need to set reg as we have special read op. */
+            entries[idx].client = client;
+            entries[idx].page = i;
+            scnprintf(name, PMBUS_NAME_SIZE, "status%d", i);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[idx++],
+                        &pmbus_debugfs_ops_status);
+        }
+
+        if (data->info->func[i] & PMBUS_HAVE_STATUS_VOUT) {
+            entries[idx].client = client;
+            entries[idx].page = i;
+            entries[idx].reg = PMBUS_STATUS_VOUT;
+            scnprintf(name, PMBUS_NAME_SIZE, "status%d_vout", i);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[idx++],
+                        &pmbus_debugfs_ops);
+        }
+
+        if (data->info->func[i] & PMBUS_HAVE_STATUS_IOUT) {
+            entries[idx].client = client;
+            entries[idx].page = i;
+            entries[idx].reg = PMBUS_STATUS_IOUT;
+            scnprintf(name, PMBUS_NAME_SIZE, "status%d_iout", i);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[idx++],
+                        &pmbus_debugfs_ops);
+        }
+
+        if (data->info->func[i] & PMBUS_HAVE_STATUS_INPUT) {
+            entries[idx].client = client;
+            entries[idx].page = i;
+            entries[idx].reg = PMBUS_STATUS_INPUT;
+            scnprintf(name, PMBUS_NAME_SIZE, "status%d_input", i);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[idx++],
+                        &pmbus_debugfs_ops);
+        }
+
+        if (data->info->func[i] & PMBUS_HAVE_STATUS_TEMP) {
+            entries[idx].client = client;
+            entries[idx].page = i;
+            entries[idx].reg = PMBUS_STATUS_TEMPERATURE;
+            scnprintf(name, PMBUS_NAME_SIZE, "status%d_temp", i);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[idx++],
+                        &pmbus_debugfs_ops);
+        }
+
+        if (wb_pmbus_check_byte_register(client, i, PMBUS_STATUS_CML)) {
+            entries[idx].client = client;
+            entries[idx].page = i;
+            entries[idx].reg = PMBUS_STATUS_CML;
+            scnprintf(name, PMBUS_NAME_SIZE, "status%d_cml", i);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[idx++],
+                        &pmbus_debugfs_ops);
+        }
+
+        if (wb_pmbus_check_byte_register(client, i, PMBUS_STATUS_OTHER)) {
+            entries[idx].client = client;
+            entries[idx].page = i;
+            entries[idx].reg = PMBUS_STATUS_OTHER;
+            scnprintf(name, PMBUS_NAME_SIZE, "status%d_other", i);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[idx++],
+                        &pmbus_debugfs_ops);
+        }
+
+        if (wb_pmbus_check_byte_register(client, i,
+                          PMBUS_STATUS_MFR_SPECIFIC)) {
+            entries[idx].client = client;
+            entries[idx].page = i;
+            entries[idx].reg = PMBUS_STATUS_MFR_SPECIFIC;
+            scnprintf(name, PMBUS_NAME_SIZE, "status%d_mfr", i);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[idx++],
+                        &pmbus_debugfs_ops);
+        }
+
+        if (data->info->func[i] & PMBUS_HAVE_STATUS_FAN12) {
+            entries[idx].client = client;
+            entries[idx].page = i;
+            entries[idx].reg = PMBUS_STATUS_FAN_12;
+            scnprintf(name, PMBUS_NAME_SIZE, "status%d_fan12", i);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[idx++],
+                        &pmbus_debugfs_ops);
+        }
+
+        if (data->info->func[i] & PMBUS_HAVE_STATUS_FAN34) {
+            entries[idx].client = client;
+            entries[idx].page = i;
+            entries[idx].reg = PMBUS_STATUS_FAN_34;
+            scnprintf(name, PMBUS_NAME_SIZE, "status%d_fan34", i);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[idx++],
+                        &pmbus_debugfs_ops);
+        }
+    }
+
+    return 0;
+}
+#else
+static int pmbus_init_debugfs(struct i2c_client *client,
+                  struct pmbus_data *data)
+{
+    return 0;
+}
+#endif    /* IS_ENABLED(CONFIG_DEBUG_FS) */
+
+int wb_pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info)
+{
+    struct device *dev = &client->dev;
+    const struct pmbus_platform_data *pdata = dev_get_platdata(dev);
+    struct pmbus_data *data;
+    size_t groups_num = 0;
+    int ret;
+
+    if (!info)
+        return -ENODEV;
+
+    if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WRITE_BYTE
+                     | I2C_FUNC_SMBUS_BYTE_DATA
+                     | I2C_FUNC_SMBUS_WORD_DATA))
+        return -ENODEV;
+
+    data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
+    if (!data)
+        return -ENOMEM;
+
+    if (info->groups)
+        while (info->groups[groups_num])
+            groups_num++;
+
+    data->groups = devm_kcalloc(dev, groups_num + 2, sizeof(void *),
+                    GFP_KERNEL);
+    if (!data->groups)
+        return -ENOMEM;
+
+    i2c_set_clientdata(client, data);
+    mutex_init(&data->update_lock);
+    data->dev = dev;
+
+    if (pdata)
+        data->flags = pdata->flags;
+    data->info = info;
+    data->currpage = -1;
+    data->currphase = -1;
+
+    ret = pmbus_init_common(client, data, info);
+    if (ret < 0)
+        return ret;
+
+    ret = pmbus_find_attributes(client, data);
+    if (ret)
+        return ret;
+
+    /*
+     * If there are no attributes, something is wrong.
+     * Bail out instead of trying to register nothing.
+     */
+    if (!data->num_attributes) {
+        dev_err(dev, "No attributes found\n");
+        return -ENODEV;
+    }
+
+    data->groups[0] = &data->group;
+    memcpy(data->groups + 1, info->groups, sizeof(void *) * groups_num);
+    data->hwmon_dev = devm_hwmon_device_register_with_groups(dev,
+                    client->name, data, data->groups);
+    if (IS_ERR(data->hwmon_dev)) {
+        dev_err(dev, "Failed to register hwmon device\n");
+        return PTR_ERR(data->hwmon_dev);
+    }
+
+    ret = pmbus_regulator_register(data);
+    if (ret)
+        return ret;
+
+    ret = pmbus_init_debugfs(client, data);
+    if (ret)
+        dev_warn(dev, "Failed to register debugfs\n");
+
+    return 0;
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_do_probe);
+
+int wb_pmbus_do_remove(struct i2c_client *client)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    debugfs_remove_recursive(data->debugfs);
+
+    return 0;
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_do_remove);
+
+struct dentry *wb_pmbus_get_debugfs_dir(struct i2c_client *client)
+{
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    return data->debugfs;
+}
+EXPORT_SYMBOL_GPL(wb_pmbus_get_debugfs_dir);
+
+static int __init pmbus_core_init(void)
+{
+    pmbus_debugfs_dir = debugfs_create_dir("pmbus", NULL);
+    if (IS_ERR(pmbus_debugfs_dir))
+        pmbus_debugfs_dir = NULL;
+
+    return 0;
+}
+
+static void __exit pmbus_core_exit(void)
+{
+    debugfs_remove_recursive(pmbus_debugfs_dir);
+}
+
+module_init(pmbus_core_init);
+module_exit(pmbus_core_exit);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("PMBus core driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_tmp401.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_tmp401.c
new file mode 100644
index 000000000000..4118510b1006
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_tmp401.c
@@ -0,0 +1,798 @@
+/* tmp401.c
+ *
+ * Copyright (C) 2007,2008 Hans de Goede <hdegoede@redhat.com>
+ * Preliminary tmp411 support by:
+ * Gabriel Konat, Sander Leget, Wouter Willems
+ * Copyright (C) 2009 Andre Prendel <andre.prendel@gmx.de>
+ *
+ * Cleanup and support for TMP431 and TMP432 by Guenter Roeck
+ * Copyright (c) 2013 Guenter Roeck <linux@roeck-us.net>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/*
+ * Driver for the Texas Instruments TMP401 SMBUS temperature sensor IC.
+ *
+ * Note this IC is in some aspect similar to the LM90, but it has quite a
+ * few differences too, for example the local temp has a higher resolution
+ * and thus has 16 bits registers for its value and limit instead of 8 bits.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/bitops.h>
+#include <linux/slab.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/sysfs.h>
+
+/* Addresses to scan */
+/* static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4c, 0x4d,
+	0x4e, 0x4f, I2C_CLIENT_END }; */
+
+enum chips { tmp401, tmp411, tmp431, tmp432, tmp435, tmp461 };
+
+/*
+ * The TMP401 registers, note some registers have different addresses for
+ * reading and writing
+ */
+#define TMP401_STATUS				0x02
+#define TMP401_CONFIG_READ			0x03
+#define TMP401_CONFIG_WRITE			0x09
+#define TMP401_CONVERSION_RATE_READ		0x04
+#define TMP401_CONVERSION_RATE_WRITE		0x0A
+#define TMP401_TEMP_CRIT_HYST			0x21
+#define TMP401_MANUFACTURER_ID_REG		0xFE
+#define TMP401_DEVICE_ID_REG			0xFF
+
+static const u8 TMP401_TEMP_MSB_READ[7][2] = {
+	{ 0x00, 0x01 },	/* temp */
+	{ 0x06, 0x08 },	/* low limit */
+	{ 0x05, 0x07 },	/* high limit */
+	{ 0x20, 0x19 },	/* therm (crit) limit */
+	{ 0x30, 0x34 },	/* lowest */
+	{ 0x32, 0x36 },	/* highest */
+	{ 0, 0x11 },	/* offset */
+};
+
+static const u8 TMP401_TEMP_MSB_WRITE[7][2] = {
+	{ 0, 0 },	/* temp (unused) */
+	{ 0x0C, 0x0E },	/* low limit */
+	{ 0x0B, 0x0D },	/* high limit */
+	{ 0x20, 0x19 },	/* therm (crit) limit */
+	{ 0x30, 0x34 },	/* lowest */
+	{ 0x32, 0x36 },	/* highest */
+	{ 0, 0x11 },	/* offset */
+};
+
+static const u8 TMP401_TEMP_LSB[7][2] = {
+	{ 0x15, 0x10 },	/* temp */
+	{ 0x17, 0x14 },	/* low limit */
+	{ 0x16, 0x13 },	/* high limit */
+	{ 0, 0 },	/* therm (crit) limit (unused) */
+	{ 0x31, 0x35 },	/* lowest */
+	{ 0x33, 0x37 },	/* highest */
+	{ 0, 0x12 },	/* offset */
+};
+
+static const u8 TMP432_TEMP_MSB_READ[4][3] = {
+	{ 0x00, 0x01, 0x23 },	/* temp */
+	{ 0x06, 0x08, 0x16 },	/* low limit */
+	{ 0x05, 0x07, 0x15 },	/* high limit */
+	{ 0x20, 0x19, 0x1A },	/* therm (crit) limit */
+};
+
+static const u8 TMP432_TEMP_MSB_WRITE[4][3] = {
+	{ 0, 0, 0 },		/* temp  - unused */
+	{ 0x0C, 0x0E, 0x16 },	/* low limit */
+	{ 0x0B, 0x0D, 0x15 },	/* high limit */
+	{ 0x20, 0x19, 0x1A },	/* therm (crit) limit */
+};
+
+static const u8 TMP432_TEMP_LSB[3][3] = {
+	{ 0x29, 0x10, 0x24 },	/* temp */
+	{ 0x3E, 0x14, 0x18 },	/* low limit */
+	{ 0x3D, 0x13, 0x17 },	/* high limit */
+};
+
+/* [0] = fault, [1] = low, [2] = high, [3] = therm/crit */
+static const u8 TMP432_STATUS_REG[] = {
+	0x1b, 0x36, 0x35, 0x37 };
+
+/* Flags */
+#define TMP401_CONFIG_RANGE			BIT(2)
+#define TMP401_CONFIG_SHUTDOWN			BIT(6)
+#define TMP401_STATUS_LOCAL_CRIT		BIT(0)
+#define TMP401_STATUS_REMOTE_CRIT		BIT(1)
+#define TMP401_STATUS_REMOTE_OPEN		BIT(2)
+#define TMP401_STATUS_REMOTE_LOW		BIT(3)
+#define TMP401_STATUS_REMOTE_HIGH		BIT(4)
+#define TMP401_STATUS_LOCAL_LOW			BIT(5)
+#define TMP401_STATUS_LOCAL_HIGH		BIT(6)
+
+/* On TMP432, each status has its own register */
+#define TMP432_STATUS_LOCAL			BIT(0)
+#define TMP432_STATUS_REMOTE1			BIT(1)
+#define TMP432_STATUS_REMOTE2			BIT(2)
+
+/* Manufacturer / Device ID's */
+#define TMP401_MANUFACTURER_ID			0x55
+#define TMP401_DEVICE_ID			0x11
+#define TMP411A_DEVICE_ID			0x12
+#define TMP411B_DEVICE_ID			0x13
+#define TMP411C_DEVICE_ID			0x10
+#define TMP431_DEVICE_ID			0x31
+#define TMP432_DEVICE_ID			0x32
+#define TMP435_DEVICE_ID			0x35
+
+/*
+ * Driver data (common to all clients)
+ */
+
+static const struct i2c_device_id tmp401_id[] = {
+	{ "wb_tmp401", tmp401 },
+	{ "wb_tmp411", tmp411 },
+	{ "wb_tmp431", tmp431 },
+	{ "wb_tmp432", tmp432 },
+	{ "wb_tmp435", tmp435 },
+	{ "wb_tmp461", tmp461 },
+	{ }
+};
+MODULE_DEVICE_TABLE(i2c, tmp401_id);
+
+/*
+ * Client data (each client gets its own)
+ */
+
+struct tmp401_data {
+	struct i2c_client *client;
+	const struct attribute_group *groups[3];
+	struct mutex update_lock;
+	char valid; /* zero until following fields are valid */
+	unsigned long last_updated; /* in jiffies */
+	enum chips kind;
+
+	unsigned int update_interval;	/* in milliseconds */
+
+	/* register values */
+	u8 status[4];
+	u8 config;
+	u16 temp[7][3];
+	u8 temp_crit_hyst;
+};
+
+/*
+ * Sysfs attr show / store functions
+ */
+
+static int tmp401_register_to_temp(u16 reg, u8 config)
+{
+	int temp = reg;
+
+	if (config & TMP401_CONFIG_RANGE)
+		temp -= 64 * 256;
+
+	return DIV_ROUND_CLOSEST(temp * 125, 32);
+}
+
+static u16 tmp401_temp_to_register(long temp, u8 config, int zbits)
+{
+	if (config & TMP401_CONFIG_RANGE) {
+		temp = clamp_val(temp, -64000, 191000);
+		temp += 64000;
+	} else
+		temp = clamp_val(temp, 0, 127000);
+
+	return DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits;
+}
+
+static int tmp401_update_device_reg16(struct i2c_client *client,
+				      struct tmp401_data *data)
+{
+	int i, j, val;
+	int num_regs = data->kind == tmp411 ? 6 : 4;
+	int num_sensors = data->kind == tmp432 ? 3 : 2;
+
+	for (i = 0; i < num_sensors; i++) {		/* local / r1 / r2 */
+		for (j = 0; j < num_regs; j++) {	/* temp / low / ... */
+			u8 regaddr;
+			/*
+			 * High byte must be read first immediately followed
+			 * by the low byte
+			 */
+			regaddr = data->kind == tmp432 ?
+						TMP432_TEMP_MSB_READ[j][i] :
+						TMP401_TEMP_MSB_READ[j][i];
+			val = i2c_smbus_read_byte_data(client, regaddr);
+			if (val < 0)
+				return val;
+			data->temp[j][i] = val << 8;
+			if (j == 3)		/* crit is msb only */
+				continue;
+			regaddr = data->kind == tmp432 ? TMP432_TEMP_LSB[j][i]
+						       : TMP401_TEMP_LSB[j][i];
+			val = i2c_smbus_read_byte_data(client, regaddr);
+			if (val < 0)
+				return val;
+			data->temp[j][i] |= val;
+		}
+	}
+	return 0;
+}
+
+static struct tmp401_data *tmp401_update_device(struct device *dev)
+{
+	struct tmp401_data *data = dev_get_drvdata(dev);
+	struct i2c_client *client = data->client;
+	struct tmp401_data *ret = data;
+	int i, val;
+	unsigned long next_update;
+
+	mutex_lock(&data->update_lock);
+
+	next_update = data->last_updated +
+		      msecs_to_jiffies(data->update_interval);
+	if (time_after(jiffies, next_update) || !data->valid) {
+		if (data->kind != tmp432) {
+			/*
+			 * The driver uses the TMP432 status format internally.
+			 * Convert status to TMP432 format for other chips.
+			 */
+			val = i2c_smbus_read_byte_data(client, TMP401_STATUS);
+			if (val < 0) {
+				ret = ERR_PTR(val);
+				goto abort;
+			}
+			data->status[0] =
+			  (val & TMP401_STATUS_REMOTE_OPEN) >> 1;
+			data->status[1] =
+			  ((val & TMP401_STATUS_REMOTE_LOW) >> 2) |
+			  ((val & TMP401_STATUS_LOCAL_LOW) >> 5);
+			data->status[2] =
+			  ((val & TMP401_STATUS_REMOTE_HIGH) >> 3) |
+			  ((val & TMP401_STATUS_LOCAL_HIGH) >> 6);
+			data->status[3] = val & (TMP401_STATUS_LOCAL_CRIT
+						| TMP401_STATUS_REMOTE_CRIT);
+		} else {
+			for (i = 0; i < ARRAY_SIZE(data->status); i++) {
+				val = i2c_smbus_read_byte_data(client,
+							TMP432_STATUS_REG[i]);
+				if (val < 0) {
+					ret = ERR_PTR(val);
+					goto abort;
+				}
+				data->status[i] = val;
+			}
+		}
+
+		val = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
+		if (val < 0) {
+			ret = ERR_PTR(val);
+			goto abort;
+		}
+		data->config = val;
+		val = tmp401_update_device_reg16(client, data);
+		if (val < 0) {
+			ret = ERR_PTR(val);
+			goto abort;
+		}
+		val = i2c_smbus_read_byte_data(client, TMP401_TEMP_CRIT_HYST);
+		if (val < 0) {
+			ret = ERR_PTR(val);
+			goto abort;
+		}
+		data->temp_crit_hyst = val;
+
+		data->last_updated = jiffies;
+		data->valid = 1;
+	}
+
+abort:
+	mutex_unlock(&data->update_lock);
+	return ret;
+}
+
+static ssize_t show_temp(struct device *dev,
+			 struct device_attribute *devattr, char *buf)
+{
+	int nr = to_sensor_dev_attr_2(devattr)->nr;
+	int index = to_sensor_dev_attr_2(devattr)->index;
+	struct tmp401_data *data = tmp401_update_device(dev);
+
+	if (IS_ERR(data))
+		return PTR_ERR(data);
+
+	return sprintf(buf, "%d\n",
+		tmp401_register_to_temp(data->temp[nr][index], data->config));
+}
+
+static ssize_t show_temp_crit_hyst(struct device *dev,
+	struct device_attribute *devattr, char *buf)
+{
+	int temp, index = to_sensor_dev_attr(devattr)->index;
+	struct tmp401_data *data = tmp401_update_device(dev);
+
+	if (IS_ERR(data))
+		return PTR_ERR(data);
+
+	mutex_lock(&data->update_lock);
+	temp = tmp401_register_to_temp(data->temp[3][index], data->config);
+	temp -= data->temp_crit_hyst * 1000;
+	mutex_unlock(&data->update_lock);
+
+	return sprintf(buf, "%d\n", temp);
+}
+
+static ssize_t show_status(struct device *dev,
+	struct device_attribute *devattr, char *buf)
+{
+	int nr = to_sensor_dev_attr_2(devattr)->nr;
+	int mask = to_sensor_dev_attr_2(devattr)->index;
+	struct tmp401_data *data = tmp401_update_device(dev);
+
+	if (IS_ERR(data))
+		return PTR_ERR(data);
+
+	return sprintf(buf, "%d\n", !!(data->status[nr] & mask));
+}
+
+static ssize_t store_temp(struct device *dev, struct device_attribute *devattr,
+			  const char *buf, size_t count)
+{
+	int nr = to_sensor_dev_attr_2(devattr)->nr;
+	int index = to_sensor_dev_attr_2(devattr)->index;
+	struct tmp401_data *data = dev_get_drvdata(dev);
+	struct i2c_client *client = data->client;
+	long val;
+	u16 reg;
+	u8 regaddr;
+
+	if (kstrtol(buf, 10, &val))
+		return -EINVAL;
+
+	reg = tmp401_temp_to_register(val, data->config, nr == 3 ? 8 : 4);
+
+	mutex_lock(&data->update_lock);
+
+	regaddr = data->kind == tmp432 ? TMP432_TEMP_MSB_WRITE[nr][index]
+				       : TMP401_TEMP_MSB_WRITE[nr][index];
+	i2c_smbus_write_byte_data(client, regaddr, reg >> 8);
+	if (nr != 3) {
+		regaddr = data->kind == tmp432 ? TMP432_TEMP_LSB[nr][index]
+					       : TMP401_TEMP_LSB[nr][index];
+		i2c_smbus_write_byte_data(client, regaddr, reg & 0xFF);
+	}
+	data->temp[nr][index] = reg;
+
+	mutex_unlock(&data->update_lock);
+
+	return count;
+}
+
+static ssize_t store_temp_crit_hyst(struct device *dev, struct device_attribute
+	*devattr, const char *buf, size_t count)
+{
+	int temp, index = to_sensor_dev_attr(devattr)->index;
+	struct tmp401_data *data = tmp401_update_device(dev);
+	long val;
+	u8 reg;
+
+	if (IS_ERR(data))
+		return PTR_ERR(data);
+
+	if (kstrtol(buf, 10, &val))
+		return -EINVAL;
+
+	if (data->config & TMP401_CONFIG_RANGE)
+		val = clamp_val(val, -64000, 191000);
+	else
+		val = clamp_val(val, 0, 127000);
+
+	mutex_lock(&data->update_lock);
+	temp = tmp401_register_to_temp(data->temp[3][index], data->config);
+	val = clamp_val(val, temp - 255000, temp);
+	reg = ((temp - val) + 500) / 1000;
+
+	i2c_smbus_write_byte_data(data->client, TMP401_TEMP_CRIT_HYST,
+				  reg);
+
+	data->temp_crit_hyst = reg;
+
+	mutex_unlock(&data->update_lock);
+
+	return count;
+}
+
+/*
+ * Resets the historical measurements of minimum and maximum temperatures.
+ * This is done by writing any value to any of the minimum/maximum registers
+ * (0x30-0x37).
+ */
+static ssize_t reset_temp_history(struct device *dev,
+	struct device_attribute	*devattr, const char *buf, size_t count)
+{
+	struct tmp401_data *data = dev_get_drvdata(dev);
+	struct i2c_client *client = data->client;
+	long val;
+
+	if (kstrtol(buf, 10, &val))
+		return -EINVAL;
+
+	if (val != 1) {
+		dev_err(dev,
+			"temp_reset_history value %ld not supported. Use 1 to reset the history!\n",
+			val);
+		return -EINVAL;
+	}
+	mutex_lock(&data->update_lock);
+	i2c_smbus_write_byte_data(client, TMP401_TEMP_MSB_WRITE[5][0], val);
+	data->valid = 0;
+	mutex_unlock(&data->update_lock);
+
+	return count;
+}
+
+static ssize_t show_update_interval(struct device *dev,
+				    struct device_attribute *attr, char *buf)
+{
+	struct tmp401_data *data = dev_get_drvdata(dev);
+
+	return sprintf(buf, "%u\n", data->update_interval);
+}
+
+static ssize_t set_update_interval(struct device *dev,
+				   struct device_attribute *attr,
+				   const char *buf, size_t count)
+{
+	struct tmp401_data *data = dev_get_drvdata(dev);
+	struct i2c_client *client = data->client;
+	unsigned long val;
+	int err, rate;
+
+	err = kstrtoul(buf, 10, &val);
+	if (err)
+		return err;
+
+	/*
+	 * For valid rates, interval can be calculated as
+	 *	interval = (1 << (7 - rate)) * 125;
+	 * Rounded rate is therefore
+	 *	rate = 7 - __fls(interval * 4 / (125 * 3));
+	 * Use clamp_val() to avoid overflows, and to ensure valid input
+	 * for __fls.
+	 */
+	val = clamp_val(val, 125, 16000);
+	rate = 7 - __fls(val * 4 / (125 * 3));
+	mutex_lock(&data->update_lock);
+	i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, rate);
+	data->update_interval = (1 << (7 - rate)) * 125;
+	mutex_unlock(&data->update_lock);
+
+	return count;
+}
+
+static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
+static SENSOR_DEVICE_ATTR_2(temp1_min, S_IWUSR | S_IRUGO, show_temp,
+			    store_temp, 1, 0);
+static SENSOR_DEVICE_ATTR_2(temp1_max, S_IWUSR | S_IRUGO, show_temp,
+			    store_temp, 2, 0);
+static SENSOR_DEVICE_ATTR_2(temp1_crit, S_IWUSR | S_IRUGO, show_temp,
+			    store_temp, 3, 0);
+static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IWUSR | S_IRUGO,
+			  show_temp_crit_hyst, store_temp_crit_hyst, 0);
+static SENSOR_DEVICE_ATTR_2(temp1_min_alarm, S_IRUGO, show_status, NULL,
+			    1, TMP432_STATUS_LOCAL);
+static SENSOR_DEVICE_ATTR_2(temp1_max_alarm, S_IRUGO, show_status, NULL,
+			    2, TMP432_STATUS_LOCAL);
+static SENSOR_DEVICE_ATTR_2(temp1_crit_alarm, S_IRUGO, show_status, NULL,
+			    3, TMP432_STATUS_LOCAL);
+static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 0, 1);
+static SENSOR_DEVICE_ATTR_2(temp2_min, S_IWUSR | S_IRUGO, show_temp,
+			    store_temp, 1, 1);
+static SENSOR_DEVICE_ATTR_2(temp2_max, S_IWUSR | S_IRUGO, show_temp,
+			    store_temp, 2, 1);
+static SENSOR_DEVICE_ATTR_2(temp2_crit, S_IWUSR | S_IRUGO, show_temp,
+			    store_temp, 3, 1);
+static SENSOR_DEVICE_ATTR(temp2_crit_hyst, S_IRUGO, show_temp_crit_hyst,
+			  NULL, 1);
+static SENSOR_DEVICE_ATTR_2(temp2_fault, S_IRUGO, show_status, NULL,
+			    0, TMP432_STATUS_REMOTE1);
+static SENSOR_DEVICE_ATTR_2(temp2_min_alarm, S_IRUGO, show_status, NULL,
+			    1, TMP432_STATUS_REMOTE1);
+static SENSOR_DEVICE_ATTR_2(temp2_max_alarm, S_IRUGO, show_status, NULL,
+			    2, TMP432_STATUS_REMOTE1);
+static SENSOR_DEVICE_ATTR_2(temp2_crit_alarm, S_IRUGO, show_status, NULL,
+			    3, TMP432_STATUS_REMOTE1);
+
+static DEVICE_ATTR(update_interval, S_IRUGO | S_IWUSR, show_update_interval,
+		   set_update_interval);
+
+static struct attribute *tmp401_attributes[] = {
+	&sensor_dev_attr_temp1_input.dev_attr.attr,
+	&sensor_dev_attr_temp1_min.dev_attr.attr,
+	&sensor_dev_attr_temp1_max.dev_attr.attr,
+	&sensor_dev_attr_temp1_crit.dev_attr.attr,
+	&sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
+	&sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
+	&sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
+	&sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
+
+	&sensor_dev_attr_temp2_input.dev_attr.attr,
+	&sensor_dev_attr_temp2_min.dev_attr.attr,
+	&sensor_dev_attr_temp2_max.dev_attr.attr,
+	&sensor_dev_attr_temp2_crit.dev_attr.attr,
+	&sensor_dev_attr_temp2_crit_hyst.dev_attr.attr,
+	&sensor_dev_attr_temp2_fault.dev_attr.attr,
+	&sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
+	&sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
+	&sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
+
+	&dev_attr_update_interval.attr,
+
+	NULL
+};
+
+static const struct attribute_group tmp401_group = {
+	.attrs = tmp401_attributes,
+};
+
+/*
+ * Additional features of the TMP411 chip.
+ * The TMP411 stores the minimum and maximum
+ * temperature measured since power-on, chip-reset, or
+ * minimum and maximum register reset for both the local
+ * and remote channels.
+ */
+static SENSOR_DEVICE_ATTR_2(temp1_lowest, S_IRUGO, show_temp, NULL, 4, 0);
+static SENSOR_DEVICE_ATTR_2(temp1_highest, S_IRUGO, show_temp, NULL, 5, 0);
+static SENSOR_DEVICE_ATTR_2(temp2_lowest, S_IRUGO, show_temp, NULL, 4, 1);
+static SENSOR_DEVICE_ATTR_2(temp2_highest, S_IRUGO, show_temp, NULL, 5, 1);
+static SENSOR_DEVICE_ATTR(temp_reset_history, S_IWUSR, NULL, reset_temp_history,
+			  0);
+
+static struct attribute *tmp411_attributes[] = {
+	&sensor_dev_attr_temp1_highest.dev_attr.attr,
+	&sensor_dev_attr_temp1_lowest.dev_attr.attr,
+	&sensor_dev_attr_temp2_highest.dev_attr.attr,
+	&sensor_dev_attr_temp2_lowest.dev_attr.attr,
+	&sensor_dev_attr_temp_reset_history.dev_attr.attr,
+	NULL
+};
+
+static const struct attribute_group tmp411_group = {
+	.attrs = tmp411_attributes,
+};
+
+static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 0, 2);
+static SENSOR_DEVICE_ATTR_2(temp3_min, S_IWUSR | S_IRUGO, show_temp,
+			    store_temp, 1, 2);
+static SENSOR_DEVICE_ATTR_2(temp3_max, S_IWUSR | S_IRUGO, show_temp,
+			    store_temp, 2, 2);
+static SENSOR_DEVICE_ATTR_2(temp3_crit, S_IWUSR | S_IRUGO, show_temp,
+			    store_temp, 3, 2);
+static SENSOR_DEVICE_ATTR(temp3_crit_hyst, S_IRUGO, show_temp_crit_hyst,
+			  NULL, 2);
+static SENSOR_DEVICE_ATTR_2(temp3_fault, S_IRUGO, show_status, NULL,
+			    0, TMP432_STATUS_REMOTE2);
+static SENSOR_DEVICE_ATTR_2(temp3_min_alarm, S_IRUGO, show_status, NULL,
+			    1, TMP432_STATUS_REMOTE2);
+static SENSOR_DEVICE_ATTR_2(temp3_max_alarm, S_IRUGO, show_status, NULL,
+			    2, TMP432_STATUS_REMOTE2);
+static SENSOR_DEVICE_ATTR_2(temp3_crit_alarm, S_IRUGO, show_status, NULL,
+			    3, TMP432_STATUS_REMOTE2);
+
+static struct attribute *tmp432_attributes[] = {
+	&sensor_dev_attr_temp3_input.dev_attr.attr,
+	&sensor_dev_attr_temp3_min.dev_attr.attr,
+	&sensor_dev_attr_temp3_max.dev_attr.attr,
+	&sensor_dev_attr_temp3_crit.dev_attr.attr,
+	&sensor_dev_attr_temp3_crit_hyst.dev_attr.attr,
+	&sensor_dev_attr_temp3_fault.dev_attr.attr,
+	&sensor_dev_attr_temp3_max_alarm.dev_attr.attr,
+	&sensor_dev_attr_temp3_min_alarm.dev_attr.attr,
+	&sensor_dev_attr_temp3_crit_alarm.dev_attr.attr,
+
+	NULL
+};
+
+static const struct attribute_group tmp432_group = {
+	.attrs = tmp432_attributes,
+};
+
+/*
+ * Additional features of the TMP461 chip.
+ * The TMP461 temperature offset for the remote channel.
+ */
+static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IWUSR | S_IRUGO, show_temp,
+			    store_temp, 6, 1);
+
+static struct attribute *tmp461_attributes[] = {
+	&sensor_dev_attr_temp2_offset.dev_attr.attr,
+	NULL
+};
+
+static const struct attribute_group tmp461_group = {
+	.attrs = tmp461_attributes,
+};
+
+/*
+ * Begin non sysfs callback code (aka Real code)
+ */
+
+static int tmp401_init_client(struct tmp401_data *data,
+			      struct i2c_client *client)
+{
+	int config, config_orig, status = 0;
+
+	/* Set the conversion rate to 2 Hz */
+	i2c_smbus_write_byte_data(client, TMP401_CONVERSION_RATE_WRITE, 5);
+	data->update_interval = 500;
+
+	/* Start conversions (disable shutdown if necessary) */
+	config = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
+	if (config < 0)
+		return config;
+
+	config_orig = config;
+	config &= ~TMP401_CONFIG_SHUTDOWN;
+
+	if (config != config_orig)
+		status = i2c_smbus_write_byte_data(client,
+						   TMP401_CONFIG_WRITE,
+						   config);
+
+	return status;
+}
+
+#if 0
+static int tmp401_detect(struct i2c_client *client,
+			 struct i2c_board_info *info)
+{
+	enum chips kind;
+	struct i2c_adapter *adapter = client->adapter;
+	u8 reg;
+
+	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
+		return -ENODEV;
+
+	/* Detect and identify the chip */
+	reg = i2c_smbus_read_byte_data(client, TMP401_MANUFACTURER_ID_REG);
+	if (reg != TMP401_MANUFACTURER_ID)
+		return -ENODEV;
+
+	reg = i2c_smbus_read_byte_data(client, TMP401_DEVICE_ID_REG);
+
+	switch (reg) {
+	case TMP401_DEVICE_ID:
+		if (client->addr != 0x4c)
+			return -ENODEV;
+		kind = tmp401;
+		break;
+	case TMP411A_DEVICE_ID:
+		if (client->addr != 0x4c)
+			return -ENODEV;
+		kind = tmp411;
+		break;
+	case TMP411B_DEVICE_ID:
+		if (client->addr != 0x4d)
+			return -ENODEV;
+		kind = tmp411;
+		break;
+	case TMP411C_DEVICE_ID:
+		if (client->addr != 0x4e)
+			return -ENODEV;
+		kind = tmp411;
+		break;
+	case TMP431_DEVICE_ID:
+		if (client->addr != 0x4c && client->addr != 0x4d)
+			return -ENODEV;
+		kind = tmp431;
+		break;
+	case TMP432_DEVICE_ID:
+		if (client->addr != 0x4c && client->addr != 0x4d)
+			return -ENODEV;
+		kind = tmp432;
+		break;
+	case TMP435_DEVICE_ID:
+		kind = tmp435;
+		break;
+	default:
+		return -ENODEV;
+	}
+
+	reg = i2c_smbus_read_byte_data(client, TMP401_CONFIG_READ);
+	if (reg & 0x1b)
+		return -ENODEV;
+
+	reg = i2c_smbus_read_byte_data(client, TMP401_CONVERSION_RATE_READ);
+	/* Datasheet says: 0x1-0x6 */
+	if (reg > 15)
+		return -ENODEV;
+
+	strlcpy(info->type, tmp401_id[kind].name, I2C_NAME_SIZE);
+
+	return 0;
+}
+#endif
+
+static int tmp401_probe(struct i2c_client *client,
+			const struct i2c_device_id *id)
+{
+	static const char * const names[] = {
+		"TMP401", "TMP411", "TMP431", "TMP432", "TMP435", "TMP461"
+	};
+	struct device *dev = &client->dev;
+	struct device *hwmon_dev;
+	struct tmp401_data *data;
+	int groups = 0, status;
+
+	data = devm_kzalloc(dev, sizeof(struct tmp401_data), GFP_KERNEL);
+	if (!data)
+		return -ENOMEM;
+
+	data->client = client;
+	mutex_init(&data->update_lock);
+	data->kind = id->driver_data;
+
+	/* Initialize the TMP401 chip */
+	status = tmp401_init_client(data, client);
+	if (status < 0)
+		return status;
+
+	/* Register sysfs hooks */
+	data->groups[groups++] = &tmp401_group;
+
+	/* Register additional tmp411 sysfs hooks */
+	if (data->kind == tmp411)
+		data->groups[groups++] = &tmp411_group;
+
+	/* Register additional tmp432 sysfs hooks */
+	if (data->kind == tmp432)
+		data->groups[groups++] = &tmp432_group;
+
+	if (data->kind == tmp461)
+		data->groups[groups++] = &tmp461_group;
+
+	hwmon_dev = devm_hwmon_device_register_with_groups(dev, client->name,
+							   data, data->groups);
+	if (IS_ERR(hwmon_dev))
+		return PTR_ERR(hwmon_dev);
+
+	dev_info(dev, "Detected TI %s chip\n", names[data->kind]);
+
+	return 0;
+}
+
+static struct i2c_driver tmp401_driver = {
+	.class		= I2C_CLASS_HWMON,
+	.driver = {
+		.name	= "wb_tmp401",
+	},
+	.probe		= tmp401_probe,
+	.id_table	= tmp401_id,
+	/* .detect		= tmp401_detect, */
+	/* .address_list	= normal_i2c, */
+};
+
+module_i2c_driver(tmp401_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("Texas Instruments TMP401 temperature sensor driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_tps53622.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_tps53622.c
new file mode 100644
index 000000000000..b68196d9f57c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_tps53622.c
@@ -0,0 +1,265 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Hardware monitoring driver for Texas Instruments TPS53679
+ *
+ * Copyright (c) 2017 Mellanox Technologies. All rights reserved.
+ * Copyright (c) 2017 Vadim Pasternak <vadimp@mellanox.com>
+ */
+
+#include <linux/bits.h>
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include "wb_pmbus.h"
+
+enum chips {
+    tps53647, tps53667, tps53679, tps53681, tps53688, tps53622
+};
+
+#define TPS53647_PAGE_NUM             1
+
+#define TPS53679_PROT_VR12_5MV        0x01 /* VR12.0 mode, 5-mV DAC */
+#define TPS53679_PROT_VR12_5_10MV     0x02 /* VR12.5 mode, 10-mV DAC */
+#define TPS53679_PROT_VR13_10MV       0x04 /* VR13.0 mode, 10-mV DAC */
+#define TPS53679_PROT_IMVP8_5MV       0x05 /* IMVP8 mode, 5-mV DAC */
+#define TPS53679_PROT_VR13_5MV        0x07 /* VR13.0 mode, 5-mV DAC */
+#define TPS53679_PAGE_NUM             2
+
+#define TPS53681_DEVICE_ID            0x81
+
+#define TPS53681_PMBUS_REVISION       0x33
+
+#define TPS53681_MFR_SPECIFIC_20      0xe4    /* Number of phases, per page */
+
+static const struct i2c_device_id tps53679_id[];
+
+static int tps53679_identify_mode(struct i2c_client *client,
+                  struct pmbus_driver_info *info)
+{
+    u8 vout_params;
+    int i, ret;
+
+    for (i = 0; i < info->pages; i++) {
+        /* Read the register with VOUT scaling value.*/
+        ret = wb_pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE);
+        if (ret < 0)
+            return ret;
+
+        vout_params = ret & GENMASK(4, 0);
+
+        switch (vout_params) {
+        case TPS53679_PROT_VR13_10MV:
+        case TPS53679_PROT_VR12_5_10MV:
+            info->vrm_version[i] = vr13;
+            break;
+        case TPS53679_PROT_VR13_5MV:
+        case TPS53679_PROT_VR12_5MV:
+        case TPS53679_PROT_IMVP8_5MV:
+            info->vrm_version[i] = vr12;
+            break;
+        default:
+            return -EINVAL;
+        }
+    }
+
+    return 0;
+}
+
+static int tps53679_identify_phases(struct i2c_client *client,
+                    struct pmbus_driver_info *info)
+{
+    int ret;
+
+    /* On TPS53681, only channel A provides per-phase output current */
+    ret = wb_pmbus_read_byte_data(client, 0, TPS53681_MFR_SPECIFIC_20);
+    if (ret < 0)
+        return ret;
+    info->phases[0] = (ret & 0x07) + 1;
+
+    return 0;
+}
+
+static int tps53679_identify_chip(struct i2c_client *client,
+                  u8 revision, u16 id)
+{
+    u8 buf[I2C_SMBUS_BLOCK_MAX];
+    int ret;
+
+    ret = wb_pmbus_read_byte_data(client, 0, PMBUS_REVISION);
+    if (ret < 0)
+        return ret;
+    if (ret != revision) {
+        dev_err(&client->dev, "Unexpected PMBus revision 0x%x\n", ret);
+        return -ENODEV;
+    }
+
+    ret = i2c_smbus_read_block_data(client, PMBUS_IC_DEVICE_ID, buf);
+    if (ret < 0)
+        return ret;
+    if (ret != 1 || buf[0] != id) {
+        dev_err(&client->dev, "Unexpected device ID 0x%x\n", buf[0]);
+        return -ENODEV;
+    }
+    return 0;
+}
+
+/*
+ * Common identification function for chips with multi-phase support.
+ * Since those chips have special configuration registers, we want to have
+ * some level of reassurance that we are really talking with the chip
+ * being probed. Check PMBus revision and chip ID.
+ */
+static int tps53679_identify_multiphase(struct i2c_client *client,
+                    struct pmbus_driver_info *info,
+                    int pmbus_rev, int device_id)
+{
+    int ret;
+
+    ret = tps53679_identify_chip(client, pmbus_rev, device_id);
+    if (ret < 0)
+        return ret;
+
+    ret = tps53679_identify_mode(client, info);
+    if (ret < 0)
+        return ret;
+
+    return tps53679_identify_phases(client, info);
+}
+
+static int tps53679_identify(struct i2c_client *client,
+                 struct pmbus_driver_info *info)
+{
+    return tps53679_identify_mode(client, info);
+}
+
+static int tps53681_identify(struct i2c_client *client,
+                 struct pmbus_driver_info *info)
+{
+    return tps53679_identify_multiphase(client, info,
+                        TPS53681_PMBUS_REVISION,
+                        TPS53681_DEVICE_ID);
+}
+
+static int tps53681_read_word_data(struct i2c_client *client, int page,
+                   int phase, int reg)
+{
+    /*
+     * For reading the total output current (READ_IOUT) for all phases,
+     * the chip datasheet is a bit vague. It says "PHASE must be set to
+     * FFh to access all phases simultaneously. PHASE may also be set to
+     * 80h readack (!) the total phase current".
+     * Experiments show that the command does _not_ report the total
+     * current for all phases if the phase is set to 0xff. Instead, it
+     * appears to report the current of one of the phases. Override phase
+     * parameter with 0x80 when reading the total output current on page 0.
+     */
+    if (reg == PMBUS_READ_IOUT && page == 0 && phase == 0xff)
+        return wb_pmbus_read_word_data(client, page, 0x80, reg);
+    return -ENODATA;
+}
+
+static struct pmbus_driver_info tps53679_info = {
+    .format[PSC_VOLTAGE_IN] = linear,
+    .format[PSC_VOLTAGE_OUT] = vid,
+    .format[PSC_TEMPERATURE] = linear,
+    .format[PSC_CURRENT_OUT] = linear,
+    .format[PSC_POWER] = linear,
+    .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN |
+        PMBUS_HAVE_STATUS_INPUT |
+        PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
+        PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
+        PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
+        PMBUS_HAVE_POUT,
+    .func[1] = PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
+        PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
+        PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
+        PMBUS_HAVE_POUT,
+    .pfunc[0] = PMBUS_HAVE_IOUT,
+    .pfunc[1] = PMBUS_HAVE_IOUT,
+    .pfunc[2] = PMBUS_HAVE_IOUT,
+    .pfunc[3] = PMBUS_HAVE_IOUT,
+    .pfunc[4] = PMBUS_HAVE_IOUT,
+    .pfunc[5] = PMBUS_HAVE_IOUT,
+};
+
+static int tps53679_probe(struct i2c_client *client)
+{
+    struct device *dev = &client->dev;
+    struct pmbus_driver_info *info;
+    enum chips chip_id;
+
+    if (dev->of_node)
+        chip_id = (enum chips)of_device_get_match_data(dev);
+    else
+        chip_id = i2c_match_id(tps53679_id, client)->driver_data;
+
+    info = devm_kmemdup(dev, &tps53679_info, sizeof(*info), GFP_KERNEL);
+    if (!info)
+        return -ENOMEM;
+
+    switch (chip_id) {
+    case tps53647:
+    case tps53667:
+        info->pages = TPS53647_PAGE_NUM;
+        info->identify = tps53679_identify;
+        break;
+    case tps53679:
+    case tps53688:
+	case tps53622:
+        info->pages = TPS53679_PAGE_NUM;
+        info->identify = tps53679_identify;
+        break;
+    case tps53681:
+        info->pages = TPS53679_PAGE_NUM;
+        info->phases[0] = 6;
+        info->identify = tps53681_identify;
+        info->read_word_data = tps53681_read_word_data;
+        break;
+    default:
+        return -ENODEV;
+    }
+
+    return wb_pmbus_do_probe(client, info);
+}
+
+static const struct i2c_device_id tps53679_id[] = {
+    {"wb_tps53647", tps53647},
+    {"wb_tps53667", tps53667},
+    {"wb_tps53679", tps53679},
+    {"wb_tps53681", tps53681},
+    {"wb_tps53688", tps53688},
+    {"wb_tps53622", tps53622},
+    {}
+};
+
+MODULE_DEVICE_TABLE(i2c, tps53679_id);
+
+static const struct of_device_id __maybe_unused tps53679_of_match[] = {
+    {.compatible = "ti,wb_tps53647", .data = (void *)tps53647},
+    {.compatible = "ti,wb_tps53667", .data = (void *)tps53667},
+    {.compatible = "ti,wb_tps53679", .data = (void *)tps53679},
+    {.compatible = "ti,wb_tps53681", .data = (void *)tps53681},
+    {.compatible = "ti,wb_tps53688", .data = (void *)tps53688},
+    {.compatible = "ti,wb_tps53622", .data = (void *)tps53622},
+    {}
+};
+MODULE_DEVICE_TABLE(of, tps53679_of_match);
+
+static struct i2c_driver tps53679_driver = {
+    .driver = {
+        .name = "wb_tps53622",
+        .of_match_table = of_match_ptr(tps53679_of_match),
+    },
+    .probe_new = tps53679_probe,
+    .remove = wb_pmbus_do_remove,
+    .id_table = tps53679_id,
+};
+
+module_i2c_driver(tps53679_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("PMBus driver for Texas Instruments TPS53679");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ucd9000.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ucd9000.c
new file mode 100644
index 000000000000..9b967f141a86
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ucd9000.c
@@ -0,0 +1,675 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Hardware monitoring driver for UCD90xxx Sequencer and System Health
+ * Controller series
+ *
+ * Copyright (C) 2011 Ericsson AB.
+ */
+
+#include <linux/debugfs.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/pmbus.h>
+#include <linux/gpio/driver.h>
+#include <linux/delay.h>
+#include "wb_pmbus.h"
+
+enum chips { ucd9000, ucd90120, ucd90124, ucd90160, ucd90320, ucd9090,
+         ucd90910 };
+
+#define UCD9000_MONITOR_CONFIG      0xd5
+#define UCD9000_NUM_PAGES           0xd6
+#define UCD9000_FAN_CONFIG_INDEX    0xe7
+#define UCD9000_FAN_CONFIG          0xe8
+#define UCD9000_MFR_STATUS          0xf3
+#define UCD9000_GPIO_SELECT         0xfa
+#define UCD9000_GPIO_CONFIG         0xfb
+#define UCD9000_DEVICE_ID           0xfd
+
+/* GPIO CONFIG bits */
+#define UCD9000_GPIO_CONFIG_ENABLE        BIT(0)
+#define UCD9000_GPIO_CONFIG_OUT_ENABLE    BIT(1)
+#define UCD9000_GPIO_CONFIG_OUT_VALUE     BIT(2)
+#define UCD9000_GPIO_CONFIG_STATUS        BIT(3)
+#define UCD9000_GPIO_INPUT        0
+#define UCD9000_GPIO_OUTPUT       1
+
+#define UCD9000_MON_TYPE(x)       (((x) >> 5) & 0x07)
+#define UCD9000_MON_PAGE(x)       ((x) & 0x1f)
+
+#define UCD9000_MON_VOLTAGE       1
+#define UCD9000_MON_TEMPERATURE   2
+#define UCD9000_MON_CURRENT       3
+#define UCD9000_MON_VOLTAGE_HW    4
+
+#define UCD9000_NUM_FAN           4
+
+#define UCD9000_GPIO_NAME_LEN     16
+#define UCD9090_NUM_GPIOS         23
+#define UCD901XX_NUM_GPIOS        26
+#define UCD90320_NUM_GPIOS        84
+#define UCD90910_NUM_GPIOS        26
+
+#define UCD9000_DEBUGFS_NAME_LEN  24
+#define UCD9000_GPI_COUNT         8
+#define UCD90320_GPI_COUNT        32
+
+#define UCD9000_RETRY_SLEEP_TIME          (10000)   /* 10ms */
+#define UCD9000_RETRY_TIME                (3)
+#define WB_DEV_NAME_MAX_LEN               (64)
+
+static int g_wb_ucd9000_debug = 0;
+static int g_wb_ucd9000_error = 0;
+
+module_param(g_wb_ucd9000_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_ucd9000_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_UDC9000_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_ucd9000_debug) { \
+        printk(KERN_INFO "[WB_UCD9000][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_UDC9000_ERROR(fmt, args...) do {                                        \
+    if (g_wb_ucd9000_error) { \
+        printk(KERN_ERR "[WB_UCD9000][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct ucd9000_data {
+    u8 fan_data[UCD9000_NUM_FAN][I2C_SMBUS_BLOCK_MAX];
+    struct pmbus_driver_info info;
+#ifdef CONFIG_GPIOLIB
+    struct gpio_chip gpio;
+#endif
+    struct dentry *debugfs;
+};
+#define to_ucd9000_data(_info) container_of(_info, struct ucd9000_data, info)
+
+struct ucd9000_debugfs_entry {
+    struct i2c_client *client;
+    u8 index;
+};
+
+static int wb_i2c_smbus_read_block_data(const struct i2c_client *client, u8 command, u8 *values)
+{
+    int rv, i;
+
+    for(i = 0; i < UCD9000_RETRY_TIME; i++) {
+        rv = i2c_smbus_read_block_data(client, command, values);
+        if(rv >= 0){
+            return rv;
+        }
+        usleep_range(UCD9000_RETRY_SLEEP_TIME, UCD9000_RETRY_SLEEP_TIME + 1);
+    }
+    WB_UDC9000_ERROR("read_block_data failed. nr:%d, addr:0x%x, reg:0x%x, rv:%d.",
+        client->adapter->nr, client->addr, command, rv);
+    return rv;
+}
+
+static int ucd9000_get_fan_config(struct i2c_client *client, int fan)
+{
+    int fan_config = 0;
+    struct ucd9000_data *data
+      = to_ucd9000_data(wb_pmbus_get_driver_info(client));
+
+    if (data->fan_data[fan][3] & 1)
+        fan_config |= PB_FAN_2_INSTALLED;   /* Use lower bit position */
+
+    /* Pulses/revolution */
+    fan_config |= (data->fan_data[fan][3] & 0x06) >> 1;
+
+    return fan_config;
+}
+
+static int ucd9000_read_byte_data(struct i2c_client *client, int page, int reg)
+{
+    int ret = 0;
+    int fan_config;
+
+    switch (reg) {
+    case PMBUS_FAN_CONFIG_12:
+        if (page > 0)
+            return -ENXIO;
+
+        ret = ucd9000_get_fan_config(client, 0);
+        if (ret < 0)
+            return ret;
+        fan_config = ret << 4;
+        ret = ucd9000_get_fan_config(client, 1);
+        if (ret < 0)
+            return ret;
+        fan_config |= ret;
+        ret = fan_config;
+        break;
+    case PMBUS_FAN_CONFIG_34:
+        if (page > 0)
+            return -ENXIO;
+
+        ret = ucd9000_get_fan_config(client, 2);
+        if (ret < 0)
+            return ret;
+        fan_config = ret << 4;
+        ret = ucd9000_get_fan_config(client, 3);
+        if (ret < 0)
+            return ret;
+        fan_config |= ret;
+        ret = fan_config;
+        break;
+    default:
+        ret = -ENODATA;
+        break;
+    }
+    return ret;
+}
+
+static const struct i2c_device_id ucd9000_id[] = {
+    {"wb_ucd9000", ucd9000},
+    {"wb_ucd90120", ucd90120},
+    {"wb_ucd90124", ucd90124},
+    {"wb_ucd90160", ucd90160},
+    {"wb_ucd90320", ucd90320},
+    {"wb_ucd9090", ucd9090},
+    {"wb_ucd90910", ucd90910},
+    {}
+};
+MODULE_DEVICE_TABLE(i2c, ucd9000_id);
+
+static const struct of_device_id __maybe_unused ucd9000_of_match[] = {
+    {
+        .compatible = "ti,wb_ucd9000",
+        .data = (void *)ucd9000
+    },
+    {
+        .compatible = "ti,wb_ucd90120",
+        .data = (void *)ucd90120
+    },
+    {
+        .compatible = "ti,wb_ucd90124",
+        .data = (void *)ucd90124
+    },
+    {
+        .compatible = "ti,wb_ucd90160",
+        .data = (void *)ucd90160
+    },
+    {
+        .compatible = "ti,wb_ucd90320",
+        .data = (void *)ucd90320
+    },
+    {
+        .compatible = "ti,wb_ucd9090",
+        .data = (void *)ucd9090
+    },
+    {
+        .compatible = "ti,wb_ucd90910",
+        .data = (void *)ucd90910
+    },
+    { },
+};
+MODULE_DEVICE_TABLE(of, ucd9000_of_match);
+
+#ifdef CONFIG_GPIOLIB
+static int ucd9000_gpio_read_config(struct i2c_client *client,
+                    unsigned int offset)
+{
+    int ret;
+
+    /* No page set required */
+    ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_SELECT, offset);
+    if (ret < 0)
+        return ret;
+
+    return i2c_smbus_read_byte_data(client, UCD9000_GPIO_CONFIG);
+}
+
+static int ucd9000_gpio_get(struct gpio_chip *gc, unsigned int offset)
+{
+    struct i2c_client *client  = gpiochip_get_data(gc);
+    int ret;
+
+    ret = ucd9000_gpio_read_config(client, offset);
+    if (ret < 0)
+        return ret;
+
+    return !!(ret & UCD9000_GPIO_CONFIG_STATUS);
+}
+
+static void ucd9000_gpio_set(struct gpio_chip *gc, unsigned int offset,
+                 int value)
+{
+    struct i2c_client *client = gpiochip_get_data(gc);
+    int ret;
+
+    ret = ucd9000_gpio_read_config(client, offset);
+    if (ret < 0) {
+        dev_dbg(&client->dev, "failed to read GPIO %d config: %d\n",
+            offset, ret);
+        return;
+    }
+
+    if (value) {
+        if (ret & UCD9000_GPIO_CONFIG_STATUS)
+            return;
+
+        ret |= UCD9000_GPIO_CONFIG_STATUS;
+    } else {
+        if (!(ret & UCD9000_GPIO_CONFIG_STATUS))
+            return;
+
+        ret &= ~UCD9000_GPIO_CONFIG_STATUS;
+    }
+
+    ret |= UCD9000_GPIO_CONFIG_ENABLE;
+
+    /* Page set not required */
+    ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, ret);
+    if (ret < 0) {
+        dev_dbg(&client->dev, "Failed to write GPIO %d config: %d\n",
+            offset, ret);
+        return;
+    }
+
+    ret &= ~UCD9000_GPIO_CONFIG_ENABLE;
+
+    ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, ret);
+    if (ret < 0)
+        dev_dbg(&client->dev, "Failed to write GPIO %d config: %d\n",
+            offset, ret);
+}
+
+static int ucd9000_gpio_get_direction(struct gpio_chip *gc,
+                      unsigned int offset)
+{
+    struct i2c_client *client = gpiochip_get_data(gc);
+    int ret;
+
+    ret = ucd9000_gpio_read_config(client, offset);
+    if (ret < 0)
+        return ret;
+
+    return !(ret & UCD9000_GPIO_CONFIG_OUT_ENABLE);
+}
+
+static int ucd9000_gpio_set_direction(struct gpio_chip *gc,
+                      unsigned int offset, bool direction_out,
+                      int requested_out)
+{
+    struct i2c_client *client = gpiochip_get_data(gc);
+    int ret, config, out_val;
+
+    ret = ucd9000_gpio_read_config(client, offset);
+    if (ret < 0)
+        return ret;
+
+    if (direction_out) {
+        out_val = requested_out ? UCD9000_GPIO_CONFIG_OUT_VALUE : 0;
+
+        if (ret & UCD9000_GPIO_CONFIG_OUT_ENABLE) {
+            if ((ret & UCD9000_GPIO_CONFIG_OUT_VALUE) == out_val)
+                return 0;
+        } else {
+            ret |= UCD9000_GPIO_CONFIG_OUT_ENABLE;
+        }
+
+        if (out_val)
+            ret |= UCD9000_GPIO_CONFIG_OUT_VALUE;
+        else
+            ret &= ~UCD9000_GPIO_CONFIG_OUT_VALUE;
+
+    } else {
+        if (!(ret & UCD9000_GPIO_CONFIG_OUT_ENABLE))
+            return 0;
+
+        ret &= ~UCD9000_GPIO_CONFIG_OUT_ENABLE;
+    }
+
+    ret |= UCD9000_GPIO_CONFIG_ENABLE;
+    config = ret;
+
+    /* Page set not required */
+    ret = i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, config);
+    if (ret < 0)
+        return ret;
+
+    config &= ~UCD9000_GPIO_CONFIG_ENABLE;
+
+    return i2c_smbus_write_byte_data(client, UCD9000_GPIO_CONFIG, config);
+}
+
+static int ucd9000_gpio_direction_input(struct gpio_chip *gc,
+                    unsigned int offset)
+{
+    return ucd9000_gpio_set_direction(gc, offset, UCD9000_GPIO_INPUT, 0);
+}
+
+static int ucd9000_gpio_direction_output(struct gpio_chip *gc,
+                     unsigned int offset, int val)
+{
+    return ucd9000_gpio_set_direction(gc, offset, UCD9000_GPIO_OUTPUT,
+                      val);
+}
+
+static void ucd9000_probe_gpio(struct i2c_client *client,
+                   const struct i2c_device_id *mid,
+                   struct ucd9000_data *data)
+{
+    int rc;
+
+    switch (mid->driver_data) {
+    case ucd9090:
+        data->gpio.ngpio = UCD9090_NUM_GPIOS;
+        break;
+    case ucd90120:
+    case ucd90124:
+    case ucd90160:
+        data->gpio.ngpio = UCD901XX_NUM_GPIOS;
+        break;
+    case ucd90320:
+        data->gpio.ngpio = UCD90320_NUM_GPIOS;
+        break;
+    case ucd90910:
+        data->gpio.ngpio = UCD90910_NUM_GPIOS;
+        break;
+    default:
+        return; /* GPIO support is optional. */
+    }
+
+    /*
+     * Pinmux support has not been added to the new gpio_chip.
+     * This support should be added when possible given the mux
+     * behavior of these IO devices.
+     */
+    data->gpio.label = client->name;
+    data->gpio.get_direction = ucd9000_gpio_get_direction;
+    data->gpio.direction_input = ucd9000_gpio_direction_input;
+    data->gpio.direction_output = ucd9000_gpio_direction_output;
+    data->gpio.get = ucd9000_gpio_get;
+    data->gpio.set = ucd9000_gpio_set;
+    data->gpio.can_sleep = true;
+    data->gpio.base = -1;
+    data->gpio.parent = &client->dev;
+
+    rc = devm_gpiochip_add_data(&client->dev, &data->gpio, client);
+    if (rc)
+        dev_warn(&client->dev, "Could not add gpiochip: %d\n", rc);
+}
+#else
+static void ucd9000_probe_gpio(struct i2c_client *client,
+                   const struct i2c_device_id *mid,
+                   struct ucd9000_data *data)
+{
+}
+#endif /* CONFIG_GPIOLIB */
+
+#ifdef CONFIG_DEBUG_FS
+static int ucd9000_get_mfr_status(struct i2c_client *client, u8 *buffer)
+{
+    int ret = wb_pmbus_set_page(client, 0, 0xff);
+
+    if (ret < 0)
+        return ret;
+
+    return wb_i2c_smbus_read_block_data(client, UCD9000_MFR_STATUS, buffer);
+}
+
+static int ucd9000_debugfs_show_mfr_status_bit(void *data, u64 *val)
+{
+    struct ucd9000_debugfs_entry *entry = data;
+    struct i2c_client *client = entry->client;
+    u8 buffer[I2C_SMBUS_BLOCK_MAX];
+    int ret, i;
+
+    ret = ucd9000_get_mfr_status(client, buffer);
+    if (ret < 0)
+        return ret;
+
+    /*
+     * GPI fault bits are in sets of 8, two bytes from end of response.
+     */
+    i = ret - 3 - entry->index / 8;
+    if (i >= 0)
+        *val = !!(buffer[i] & BIT(entry->index % 8));
+
+    return 0;
+}
+DEFINE_DEBUGFS_ATTRIBUTE(ucd9000_debugfs_mfr_status_bit,
+             ucd9000_debugfs_show_mfr_status_bit, NULL, "%1lld\n");
+
+static ssize_t ucd9000_debugfs_read_mfr_status(struct file *file,
+                           char __user *buf, size_t count,
+                           loff_t *ppos)
+{
+    struct i2c_client *client = file->private_data;
+    u8 buffer[I2C_SMBUS_BLOCK_MAX];
+    char str[(I2C_SMBUS_BLOCK_MAX * 2) + 2];
+    char *res;
+    int rc;
+
+    rc = ucd9000_get_mfr_status(client, buffer);
+    if (rc < 0)
+        return rc;
+
+    res = bin2hex(str, buffer, min(rc, I2C_SMBUS_BLOCK_MAX));
+    *res++ = '\n';
+    *res = 0;
+
+    return simple_read_from_buffer(buf, count, ppos, str, res - str);
+}
+
+static const struct file_operations ucd9000_debugfs_show_mfr_status_fops = {
+    .llseek = noop_llseek,
+    .read = ucd9000_debugfs_read_mfr_status,
+    .open = simple_open,
+};
+
+static int ucd9000_init_debugfs(struct i2c_client *client,
+                const struct i2c_device_id *mid,
+                struct ucd9000_data *data)
+{
+    struct dentry *debugfs;
+    struct ucd9000_debugfs_entry *entries;
+    int i, gpi_count;
+    char name[UCD9000_DEBUGFS_NAME_LEN];
+
+    debugfs = wb_pmbus_get_debugfs_dir(client);
+    if (!debugfs)
+        return -ENOENT;
+
+    data->debugfs = debugfs_create_dir(client->name, debugfs);
+    if (!data->debugfs)
+        return -ENOENT;
+
+    /*
+     * Of the chips this driver supports, only the UCD9090, UCD90160,
+     * UCD90320, and UCD90910 report GPI faults in their MFR_STATUS
+     * register, so only create the GPI fault debugfs attributes for those
+     * chips.
+     */
+    if (mid->driver_data == ucd9090 || mid->driver_data == ucd90160 ||
+        mid->driver_data == ucd90320 || mid->driver_data == ucd90910) {
+        gpi_count = mid->driver_data == ucd90320 ? UCD90320_GPI_COUNT
+                             : UCD9000_GPI_COUNT;
+        entries = devm_kcalloc(&client->dev,
+                       gpi_count, sizeof(*entries),
+                       GFP_KERNEL);
+        if (!entries)
+            return -ENOMEM;
+
+        for (i = 0; i < gpi_count; i++) {
+            entries[i].client = client;
+            entries[i].index = i;
+            scnprintf(name, UCD9000_DEBUGFS_NAME_LEN,
+                  "gpi%d_alarm", i + 1);
+            debugfs_create_file(name, 0444, data->debugfs,
+                        &entries[i],
+                        &ucd9000_debugfs_mfr_status_bit);
+        }
+    }
+
+    scnprintf(name, UCD9000_DEBUGFS_NAME_LEN, "mfr_status");
+    debugfs_create_file(name, 0444, data->debugfs, client,
+                &ucd9000_debugfs_show_mfr_status_fops);
+
+    return 0;
+}
+#else
+static int ucd9000_init_debugfs(struct i2c_client *client,
+                const struct i2c_device_id *mid,
+                struct ucd9000_data *data)
+{
+    return 0;
+}
+#endif /* CONFIG_DEBUG_FS */
+
+static int ucd9000_probe(struct i2c_client *client)
+{
+    u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1];
+    char wb_device_name[WB_DEV_NAME_MAX_LEN];
+    struct ucd9000_data *data;
+    struct pmbus_driver_info *info;
+    const struct i2c_device_id *mid;
+    enum chips chip;
+    int i, ret;
+
+    if (!i2c_check_functionality(client->adapter,
+                     I2C_FUNC_SMBUS_BYTE_DATA |
+                     I2C_FUNC_SMBUS_BLOCK_DATA))
+        return -ENODEV;
+
+    ret = wb_i2c_smbus_read_block_data(client, UCD9000_DEVICE_ID,
+                    block_buffer);
+    if (ret < 0) {
+        dev_err(&client->dev, "Failed to read device ID\n");
+        return ret;
+    }
+    block_buffer[ret] = '\0';
+    dev_info(&client->dev, "Device ID %s\n", block_buffer);
+
+    mem_clear(wb_device_name, sizeof(wb_device_name));
+    snprintf(wb_device_name, sizeof(wb_device_name), "wb_%s", block_buffer);
+
+    for (mid = ucd9000_id; mid->name[0]; mid++) {
+        if (!strncasecmp(mid->name, wb_device_name, strlen(mid->name)))
+            break;
+    }
+    if (!mid->name[0]) {
+        dev_err(&client->dev, "Unsupported device\n");
+        return -ENODEV;
+    }
+
+    if (client->dev.of_node)
+        chip = (enum chips)of_device_get_match_data(&client->dev);
+    else
+        chip = mid->driver_data;
+
+    if (chip != ucd9000 && strcmp(client->name, mid->name) != 0)
+        dev_notice(&client->dev,
+               "Device mismatch: Configured %s, detected %s\n",
+               client->name, mid->name);
+
+    data = devm_kzalloc(&client->dev, sizeof(struct ucd9000_data),
+                GFP_KERNEL);
+    if (!data)
+        return -ENOMEM;
+    info = &data->info;
+
+    ret = i2c_smbus_read_byte_data(client, UCD9000_NUM_PAGES);
+    if (ret < 0) {
+        dev_err(&client->dev,
+            "Failed to read number of active pages\n");
+        return ret;
+    }
+    info->pages = ret;
+    if (!info->pages) {
+        dev_err(&client->dev, "No pages configured\n");
+        return -ENODEV;
+    }
+
+    /* The internal temperature sensor is always active */
+    info->func[0] = PMBUS_HAVE_TEMP;
+
+    /* Everything else is configurable */
+    ret = wb_i2c_smbus_read_block_data(client, UCD9000_MONITOR_CONFIG,
+                    block_buffer);
+    if (ret <= 0) {
+        dev_err(&client->dev, "Failed to read configuration data\n");
+        return -ENODEV;
+    }
+    for (i = 0; i < ret; i++) {
+        int page = UCD9000_MON_PAGE(block_buffer[i]);
+
+        if (page >= info->pages)
+            continue;
+
+        switch (UCD9000_MON_TYPE(block_buffer[i])) {
+        case UCD9000_MON_VOLTAGE:
+        case UCD9000_MON_VOLTAGE_HW:
+            info->func[page] |= PMBUS_HAVE_VOUT
+              | PMBUS_HAVE_STATUS_VOUT;
+            break;
+        case UCD9000_MON_TEMPERATURE:
+            info->func[page] |= PMBUS_HAVE_TEMP2
+              | PMBUS_HAVE_STATUS_TEMP;
+            break;
+        case UCD9000_MON_CURRENT:
+            info->func[page] |= PMBUS_HAVE_IOUT
+              | PMBUS_HAVE_STATUS_IOUT;
+            break;
+        default:
+            break;
+        }
+    }
+
+    /* Fan configuration */
+    if (mid->driver_data == ucd90124) {
+        for (i = 0; i < UCD9000_NUM_FAN; i++) {
+            i2c_smbus_write_byte_data(client,
+                          UCD9000_FAN_CONFIG_INDEX, i);
+            ret = wb_i2c_smbus_read_block_data(client,
+                            UCD9000_FAN_CONFIG,
+                            data->fan_data[i]);
+            if (ret < 0)
+                return ret;
+        }
+        i2c_smbus_write_byte_data(client, UCD9000_FAN_CONFIG_INDEX, 0);
+
+        info->read_byte_data = ucd9000_read_byte_data;
+        info->func[0] |= PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_FAN12
+          | PMBUS_HAVE_FAN34 | PMBUS_HAVE_STATUS_FAN34;
+    }
+
+    ucd9000_probe_gpio(client, mid, data);
+
+    ret = wb_pmbus_do_probe(client, info);
+    if (ret)
+        return ret;
+
+    ret = ucd9000_init_debugfs(client, mid, data);
+    if (ret)
+        dev_warn(&client->dev, "Failed to register debugfs: %d\n",
+             ret);
+
+    return 0;
+}
+
+/* This is the driver that will be inserted */
+static struct i2c_driver ucd9000_driver = {
+    .driver = {
+        .name = "wb_ucd9000",
+        .of_match_table = of_match_ptr(ucd9000_of_match),
+    },
+    .probe_new = ucd9000_probe,
+    .remove = wb_pmbus_do_remove,
+    .id_table = ucd9000_id,
+};
+
+module_i2c_driver(ucd9000_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("PMBus driver for TI UCD90xxx");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/Makefile
new file mode 100644
index 000000000000..369b64605dd3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/Makefile
@@ -0,0 +1,20 @@
+pes_parent_dir:=$(shell pwd)/$(lastword $(MAKEFILE_LIST))
+pes_parent_dir:=$(shell dirname $(pes_parent_dir))
+
+SUBDIRS=$(shell ls -l | grep ^d | awk '{if($$9 != "build") print $$9}')
+INC = -I./inc
+
+all : CHECK $(SUBDIRS)
+CHECK :
+	@echo $(pes_parent_dir)
+
+$(SUBDIRS):ECHO
+	#@echo $@
+	make -C $@
+
+ECHO:
+	@echo $(SUBDIRS)
+
+.PHONY : clean
+clean :
+	-rm  -rf $(SYSFS_OUT_PUT)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/Makefile
new file mode 100644
index 000000000000..e516b70b3d92
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/Makefile
@@ -0,0 +1,25 @@
+PWD		= $(shell pwd)
+
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+SUBDIR_CFG = cfg
+plat_dfd-objs := dfd_module.o dfd_fan_driver.o \
+dfd_slot_driver.o \
+dfd_sensors_driver.o \
+dfd_psu_driver.o \
+dfd_sff_driver.o \
+$(SUBDIR_CFG)/dfd_cfg.o \
+$(SUBDIR_CFG)/dfd_cfg_adapter.o \
+$(SUBDIR_CFG)/dfd_cfg_file.o \
+$(SUBDIR_CFG)/dfd_cfg_info.o \
+$(SUBDIR_CFG)/dfd_cfg_listnode.o \
+
+obj-m := plat_dfd.o
+all:
+	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
+	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
+	cp -p  $(PWD)/*.ko $(module_out_put_dir)
+clean:
+	rm -f $(PWD)/*.o $(PWD)/$(SUBDIR_CFG)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd $(PWD)/$(SUBDIR_CFG)/.*.cmd $(PWD)/*.mod
+	rm -f $(PWD)/Module.markers $(PWD)/Module.symvers $(PWD)/modules.order
+	rm -rf $(PWD)/.tmp_versions
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c
new file mode 100644
index 000000000000..b0c9e9f6e723
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c
@@ -0,0 +1,812 @@
+#include <linux/list.h>
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+
+#include "../include/dfd_module.h"
+#include "../include/dfd_cfg_file.h"
+#include "../include/dfd_cfg_listnode.h"
+#include "../include/dfd_cfg_info.h"
+#include "../include/dfd_cfg_adapter.h"
+#include "../include/dfd_cfg.h"
+#include "../../dev_sysfs/include/sysfs_common.h"
+
+#ifdef DFD_CFG_ITEM
+#undef DFD_CFG_ITEM
+#endif
+#define DFD_CFG_ITEM(_id, _name, _index_min, _index_max)    _name,
+static char *dfd_cfg_item_name[] = {
+    DFD_CFG_ITEM_ALL
+};
+
+#ifdef DFD_CFG_ITEM
+#undef DFD_CFG_ITEM
+#endif
+#define DFD_CFG_ITEM(_id, _name, _index_min, _index_max)    {_index_min, _index_max},
+static index_range_t dfd_cfg_item_index_range[] = {
+    DFD_CFG_ITEM_ALL
+};
+
+static lnode_root_t dfd_ko_cfg_list_root;
+
+static void dfd_ko_cfg_del_space_lf_cr(char *str)
+{
+    int i, j;
+    int len;
+
+    len = strlen(str);
+    for (i = 0; i < len; i++) {
+        if (str[i] == '\r' || str[i] == '\n' || str[i] == ' ') {
+            for (j = i; j < len - 1; j++) {
+                str[j] = str[j + 1];
+            }
+            str[j] = '\0';
+            len--;
+            i--;
+        }
+    }
+}
+
+static int dfd_ko_cfg_get_value_from_char(char *value_str, int32_t *value, int line_num)
+{
+    int value_tmp = 0;
+
+    if (strlen(value_str) == 0) {
+        DBG_DEBUG(DBG_WARN, "line%d: value str is empty\n", line_num);
+        *value = DFD_CFG_EMPTY_VALUE;
+        return 0;
+    }
+
+    if ((strlen(value_str) > 2) && (value_str[0] == '0')
+            && (value_str[1] == 'x' || value_str[1] == 'X')) {
+        value_tmp = (int32_t)simple_strtol(value_str, NULL, 16);
+    } else {
+        value_tmp = (int32_t)simple_strtol(value_str, NULL, 10);
+    }
+
+    *value = value_tmp;
+    return 0;
+}
+
+static int dfd_ko_cfg_analyse_index(char *index_str, int *index1, int *index2, int line_num)
+{
+    int rv;
+    char *index1_begin_char, *index2_begin_char;
+
+    if (index_str[0] != '_') {
+        DBG_DEBUG(DBG_ERROR, "line%d: no '-' between name and index1\n", line_num);
+        return -1;
+    }
+
+    index1_begin_char = index_str;
+    rv = dfd_ko_cfg_get_value_from_char(++index1_begin_char, index1, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    if (index2 == NULL) {
+        return 0;
+    }
+
+    index2_begin_char = strchr(index1_begin_char, '_');
+    if (index2_begin_char == NULL) {
+        DBG_DEBUG(DBG_ERROR, "line%d: no '-' between index1 and index2\n", line_num);
+        return -1;
+    } else {
+        rv = dfd_ko_cfg_get_value_from_char(++index2_begin_char, index2, line_num);
+        if (rv < 0) {
+            return -1;
+        }
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_check_array_index(index_range_t *index_range, int *index1, int *index2,
+            int line_num)
+{
+
+    if ((*index1 < 0) || (*index1 > index_range->index1_max)) {
+        DBG_DEBUG(DBG_ERROR, "line%d: index1[%d] invalid, max=%d\n", line_num, *index1,
+            index_range->index1_max);
+        return -1;
+    }
+
+    if (index2 == NULL) {
+        return 0;
+    }
+
+    if ((*index2 < 0) || (*index2 > index_range->index2_max)) {
+        DBG_DEBUG(DBG_ERROR, "line%d: index2[%d] invalid, max=%d\n", line_num, *index2,
+            index_range->index2_max);
+        return -1;
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_get_index(char *index_str, index_range_t *index_range, int *index1,
+            int *index2, int line_num)
+{
+    int rv;
+
+    if (index_range->index2_max == INDEX_NOT_EXIST) {
+        index2 = NULL;
+    }
+
+    rv = dfd_ko_cfg_analyse_index(index_str, index1, index2, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    rv = dfd_ko_cfg_check_array_index(index_range, index1, index2, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_add_int_item(int key, int value, int line_num)
+{
+    int rv;
+    int *int_cfg;
+
+    int_cfg = lnode_find_node(&dfd_ko_cfg_list_root, key);
+    if (int_cfg == NULL) {
+
+        int_cfg = (int *)kmalloc(sizeof(int), GFP_KERNEL);
+        if (int_cfg == NULL) {
+            DBG_DEBUG(DBG_ERROR, "line%d: kmalloc int fail\n", line_num);
+            return -1;
+        }
+
+        *int_cfg = value;
+        rv = lnode_insert_node(&dfd_ko_cfg_list_root, key, int_cfg);
+        if (rv == 0) {
+            DBG_DEBUG(DBG_VERBOSE, "line%d: add int item[%d] success, key=0x%08x\n", line_num, value, key);
+        } else {
+            kfree(int_cfg);
+            int_cfg = NULL;
+            DBG_DEBUG(DBG_ERROR, "line%d: add int item[%d] fail, key=0x%08x rv=%d \n", line_num, value, key, rv);
+            return -1;
+        }
+    } else {
+
+        DBG_DEBUG(DBG_WARN, "line%d: replace int item[%d->%d], key=0x%08x\n", line_num, *int_cfg, value, key);
+        *int_cfg = value;
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_analyse_int_item(dfd_cfg_item_id_t cfg_item_id, char *arg_name, char *arg_value,
+            char *cfg_pre, index_range_t *index_range, int line_num)
+{
+    int rv;
+    int index1 = 0, index2 = 0;
+    int value, key;
+    char *arg_name_tmp;
+
+    if (index_range->index1_max != INDEX_NOT_EXIST) {
+        arg_name_tmp = arg_name + strlen(cfg_pre);
+        rv = dfd_ko_cfg_get_index(arg_name_tmp, index_range, &index1, &index2, line_num);
+        if (rv < 0) {
+            return -1;
+        }
+    }
+
+    rv = dfd_ko_cfg_get_value_from_char(arg_value, &value, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    key = DFD_CFG_KEY(cfg_item_id, index1, index2);
+    rv = dfd_ko_cfg_add_int_item(key, value, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_add_str_item(int key, char *str, int line_num)
+{
+    int rv;
+    char *str_cfg;
+
+    str_cfg = lnode_find_node(&dfd_ko_cfg_list_root, key);
+    if (str_cfg == NULL) {
+
+        str_cfg = (char *)kmalloc(DFD_CFG_STR_MAX_LEN, GFP_KERNEL);
+        if (str_cfg == NULL) {
+            DBG_DEBUG(DBG_ERROR, "line%d: kmalloc str[%lu] fail\n", line_num, strlen(str));
+            return -1;
+        }
+        mem_clear(str_cfg, DFD_CFG_STR_MAX_LEN);
+        strncpy(str_cfg, str, DFD_CFG_STR_MAX_LEN - 1);
+
+        rv = lnode_insert_node(&dfd_ko_cfg_list_root, key, str_cfg);
+        if (rv == 0) {
+            DBG_DEBUG(DBG_VERBOSE, "line%d: add string item[%s] success, key=0x%08x\n", line_num, str_cfg, key);
+        } else {
+            kfree(str_cfg);
+            str_cfg = NULL;
+            DBG_DEBUG(DBG_ERROR, "line%d: add string item[%s] fail, key=0x%08x rv=%d \n", line_num, str_cfg, key, rv);
+            return -1;
+        }
+    } else {
+        DBG_DEBUG(DBG_WARN, "line%d: replace string item[%s->%s], key=0x%08x\n", line_num, str_cfg, str, key);
+        mem_clear(str_cfg, DFD_CFG_STR_MAX_LEN);
+        strncpy(str_cfg, str, DFD_CFG_STR_MAX_LEN - 1);
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_analyse_str_item(dfd_cfg_item_id_t cfg_item_id, char *arg_name, char *arg_value,
+            char *cfg_pre, index_range_t *index_range, int line_num)
+{
+    int rv;
+    int index1 = 0, index2 = 0;
+    int btree_key;
+    char *arg_name_tmp;
+
+    if (index_range->index1_max != INDEX_NOT_EXIST) {
+        arg_name_tmp = arg_name + strlen(cfg_pre);
+        rv = dfd_ko_cfg_get_index(arg_name_tmp, index_range, &index1, &index2, line_num);
+        if (rv < 0) {
+            return -1;
+        }
+    }
+
+    if (strlen(arg_value) >= DFD_CFG_STR_MAX_LEN) {
+        DBG_DEBUG(DBG_ERROR, "line%d: string item[%s] is too long \n", line_num, arg_value);
+        return -1;
+    }
+
+    btree_key = DFD_CFG_KEY(cfg_item_id, index1, index2);
+    rv = dfd_ko_cfg_add_str_item(btree_key, arg_value, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_get_i2c_dev_member(char *member_str, dfd_i2c_dev_mem_t *member, int line_num)
+{
+    dfd_i2c_dev_mem_t mem_index;
+
+    for (mem_index = DFD_I2C_DEV_MEM_BUS; mem_index < DFD_I2C_DEV_MEM_END; mem_index++) {
+        if (memcmp(member_str, g_dfd_i2c_dev_mem_str[mem_index],
+                strlen(g_dfd_i2c_dev_mem_str[mem_index])) == 0) {
+            *member =  mem_index;
+            return 0;
+        }
+    }
+
+    DBG_DEBUG(DBG_ERROR, "line%d: i2c dev member[%s] invalid\n", line_num, member_str);
+    return -1;
+}
+
+static void dfd_ko_cfg_set_i2c_dev_mem_value(dfd_i2c_dev_t *i2c_dev, dfd_i2c_dev_mem_t member,
+                int value)
+{
+    switch (member) {
+    case DFD_I2C_DEV_MEM_BUS:
+        i2c_dev->bus = value;
+        break;
+    case DFD_I2C_DEV_MEM_ADDR:
+        i2c_dev->addr = value;
+        break;
+    default:
+        break;
+    }
+}
+
+static int dfd_ko_cfg_add_i2c_dev_item(int key, dfd_i2c_dev_mem_t member, int value, int line_num)
+{
+    int rv;
+    dfd_i2c_dev_t *i2c_dev_cfg;
+
+    i2c_dev_cfg = lnode_find_node(&dfd_ko_cfg_list_root, key);
+    if (i2c_dev_cfg == NULL) {
+
+        i2c_dev_cfg = (dfd_i2c_dev_t *)kmalloc(sizeof(dfd_i2c_dev_t), GFP_KERNEL);
+        if (i2c_dev_cfg == NULL) {
+            DBG_DEBUG(DBG_ERROR, "line%d: kmalloc i2c_dev fail\n", line_num);
+            return -1;
+        }
+        mem_clear(i2c_dev_cfg, sizeof(dfd_i2c_dev_t));
+
+        dfd_ko_cfg_set_i2c_dev_mem_value(i2c_dev_cfg, member, value);
+        rv = lnode_insert_node(&dfd_ko_cfg_list_root, key, i2c_dev_cfg);
+        if (rv == 0) {
+            DBG_DEBUG(DBG_VERBOSE, "line%d: add i2c_dev item[%s=%d] success, key=0x%08x\n", line_num,
+                g_dfd_i2c_dev_mem_str[member], value, key);
+        } else {
+            kfree(i2c_dev_cfg);
+            i2c_dev_cfg = NULL;
+            DBG_DEBUG(DBG_ERROR, "line%d: add i2c_dev item[%s=%d] fail, key=0x%08x rv=%d\n", line_num,
+                g_dfd_i2c_dev_mem_str[member], value, key, rv);
+            return -1;
+        }
+    } else {
+
+        DBG_DEBUG(DBG_VERBOSE, "line%d: replace i2c_dev item[%s=%d], key=0x%08x\n", line_num,
+            g_dfd_i2c_dev_mem_str[member], value, key);
+        dfd_ko_cfg_set_i2c_dev_mem_value(i2c_dev_cfg, member, value);
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_analyse_i2c_dev_item(dfd_cfg_item_id_t cfg_item_id, char *arg_name,
+            char *arg_value, char *cfg_pre, index_range_t *index_range, int line_num)
+{
+    int rv;
+    int index1 = 0, index2 = 0;
+    int value, key;
+    char *arg_name_tmp;
+    dfd_i2c_dev_mem_t member;
+
+    arg_name_tmp = arg_name + strlen(cfg_pre);
+    rv = dfd_ko_cfg_get_i2c_dev_member(arg_name_tmp, &member, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    if (index_range->index1_max != INDEX_NOT_EXIST) {
+        arg_name_tmp += strlen(g_dfd_i2c_dev_mem_str[member]);
+        rv = dfd_ko_cfg_get_index(arg_name_tmp, index_range, &index1, &index2, line_num);
+        if (rv < 0) {
+            return -1;
+        }
+    }
+
+    rv = dfd_ko_cfg_get_value_from_char(arg_value, &value, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    key = DFD_CFG_KEY(cfg_item_id, index1, index2);
+    rv = dfd_ko_cfg_add_i2c_dev_item(key, member, value, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_get_enum_value_by_str(char *enum_val_str[], int enum_val_end, char *buf)
+{
+    int i;
+    int enum_val;
+
+    enum_val = DFD_CFG_INVALID_VALUE;
+    for (i = 0; i < enum_val_end; i++) {
+        if (memcmp(buf, enum_val_str[i], strlen(enum_val_str[i])) == 0) {
+            enum_val = i;
+            break;
+        }
+    }
+
+    return enum_val;
+}
+
+static int dfd_ko_cfg_get_info_ctrl_member(char *member_str, info_ctrl_mem_t *member, int line_num)
+{
+    info_ctrl_mem_t mem_index;
+
+    for (mem_index = INFO_CTRL_MEM_MODE; mem_index < INFO_CTRL_MEM_END; mem_index++) {
+        if (memcmp(member_str, g_info_ctrl_mem_str[mem_index],
+                strlen(g_info_ctrl_mem_str[mem_index])) == 0) {
+            *member =  mem_index;
+            return 0;
+        }
+    }
+
+    DBG_DEBUG(DBG_ERROR, "line%d: info ctrl member[%s] invalid\n", line_num, member_str);
+    return -1;
+}
+
+static void dfd_ko_cfg_set_info_ctrl_mem_value(info_ctrl_t *info_ctrl, info_ctrl_mem_t member,
+                char *buf_val, int line_num)
+{
+    switch (member) {
+    case INFO_CTRL_MEM_MODE:
+        info_ctrl->mode = dfd_ko_cfg_get_enum_value_by_str(g_info_ctrl_mode_str, INFO_CTRL_MODE_END, buf_val);;
+        break;
+    case INFO_CTRL_MEM_INT_CONS:
+        dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->int_cons), line_num);
+        break;
+    case INFO_CTRL_MEM_SRC:
+        info_ctrl->src = dfd_ko_cfg_get_enum_value_by_str(g_info_src_str, INFO_SRC_END, buf_val);
+        break;
+    case INFO_CTRL_MEM_FRMT:
+        info_ctrl->frmt = dfd_ko_cfg_get_enum_value_by_str(g_info_frmt_str, INFO_FRMT_END, buf_val);
+        break;
+    case INFO_CTRL_MEM_POLA:
+        info_ctrl->pola = dfd_ko_cfg_get_enum_value_by_str(g_info_pola_str, INFO_POLA_END, buf_val);
+        break;
+    case INFO_CTRL_MEM_FPATH:
+        mem_clear(info_ctrl->fpath, sizeof(info_ctrl->fpath));
+        strncpy(info_ctrl->fpath, buf_val, sizeof(info_ctrl->fpath) - 1);
+        break;
+    case INFO_CTRL_MEM_ADDR:
+        dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->addr), line_num);
+        break;
+    case INFO_CTRL_MEM_LEN:
+        dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->len), line_num);
+        break;
+    case INFO_CTRL_MEM_BIT_OFFSET:
+        dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->bit_offset), line_num);
+        break;
+    case INFO_CTRL_MEM_STR_CONS:
+        mem_clear(info_ctrl->str_cons, sizeof(info_ctrl->str_cons));
+        strncpy(info_ctrl->str_cons, buf_val, sizeof(info_ctrl->str_cons) - 1);
+        break;
+    case INFO_CTRL_MEM_INT_EXTRA1:
+        dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->int_extra1), line_num);
+        break;
+    case INFO_CTRL_MEM_INT_EXTRA2:
+        dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->int_extra2), line_num);
+        break;
+    default:
+        break;
+    }
+}
+
+static int dfd_ko_cfg_add_info_ctrl_item(int key, info_ctrl_mem_t member, char *buf_val,
+            int line_num)
+{
+    int rv;
+    info_ctrl_t *info_ctrl_cfg;
+
+    info_ctrl_cfg = lnode_find_node(&dfd_ko_cfg_list_root, key);
+    if (info_ctrl_cfg == NULL) {
+
+        info_ctrl_cfg = (info_ctrl_t *)kmalloc(sizeof(info_ctrl_t), GFP_KERNEL);
+        if (info_ctrl_cfg == NULL) {
+            DBG_DEBUG(DBG_ERROR, "line%d: kmalloc info_ctrl fail\n", line_num);
+            return -1;
+        }
+        mem_clear(info_ctrl_cfg, sizeof(info_ctrl_t));
+
+        dfd_ko_cfg_set_info_ctrl_mem_value(info_ctrl_cfg, member, buf_val, line_num);
+        rv = lnode_insert_node(&dfd_ko_cfg_list_root, key, info_ctrl_cfg);
+        if (rv == 0) {
+            DBG_DEBUG(DBG_VERBOSE, "line%d: add info_ctrl item[%s=%s] success, key=0x%08x\n", line_num,
+                g_info_ctrl_mem_str[member], buf_val, key);
+        } else {
+            kfree(info_ctrl_cfg);
+            info_ctrl_cfg = NULL;
+            DBG_DEBUG(DBG_ERROR, "line%d: add info_ctrl item[%s=%s] fail, key=0x%08x rv=%d\n", line_num,
+                g_info_ctrl_mem_str[member], buf_val, key, rv);
+            return -1;
+        }
+    } else {
+
+        DBG_DEBUG(DBG_VERBOSE, "line%d: replace info_ctrl item[%s=%s], key=0x%08x\n", line_num,
+            g_info_ctrl_mem_str[member], buf_val, key);
+        dfd_ko_cfg_set_info_ctrl_mem_value(info_ctrl_cfg, member, buf_val, line_num);
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_analyse_info_ctrl_item(dfd_cfg_item_id_t cfg_item_id, char *arg_name,
+            char *arg_value, char *cfg_pre, index_range_t *index_range, int line_num)
+{
+    int rv;
+    int index1 = 0, index2 = 0;
+    int key;
+    char *arg_name_tmp;
+    info_ctrl_mem_t member;
+
+    arg_name_tmp = arg_name + strlen(cfg_pre);
+    rv = dfd_ko_cfg_get_info_ctrl_member(arg_name_tmp, &member, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    if (index_range->index1_max != INDEX_NOT_EXIST) {
+        arg_name_tmp += strlen(g_info_ctrl_mem_str[member]);
+        rv = dfd_ko_cfg_get_index(arg_name_tmp, index_range, &index1, &index2, line_num);
+        if (rv < 0) {
+            return -1;
+        }
+    }
+
+    key = DFD_CFG_KEY(cfg_item_id, index1, index2);
+    rv = dfd_ko_cfg_add_info_ctrl_item(key, member, arg_value, line_num);
+    if (rv < 0) {
+        return -1;
+    }
+
+    return 0;
+}
+
+static int dfd_ko_cfg_analyse_config(char *arg_name, char*arg_value, int line_num)
+{
+    int i, rv = 0;
+    int cfg_item_num;
+
+    cfg_item_num = sizeof(dfd_cfg_item_name) / sizeof(dfd_cfg_item_name[0]);
+    for (i = 0; i < cfg_item_num; i++) {
+        if (memcmp(arg_name, dfd_cfg_item_name[i], strlen(dfd_cfg_item_name[i])) == 0){
+            if (DFD_CFG_ITEM_IS_INT(i)) {
+                rv = dfd_ko_cfg_analyse_int_item(i, arg_name, arg_value, dfd_cfg_item_name[i],
+                    &(dfd_cfg_item_index_range[i]), line_num);
+            } else if (DFD_CFG_ITEM_IS_STRING(i)) {
+                rv = dfd_ko_cfg_analyse_str_item(i, arg_name, arg_value, dfd_cfg_item_name[i],
+                    &(dfd_cfg_item_index_range[i]), line_num);
+            } else if (DFD_CFG_ITEM_IS_I2C_DEV(i)) {
+                rv = dfd_ko_cfg_analyse_i2c_dev_item(i, arg_name, arg_value, dfd_cfg_item_name[i],
+                    &(dfd_cfg_item_index_range[i]), line_num);
+            } else if (DFD_CFG_ITEM_IS_INFO_CTRL(i)) {
+                rv = dfd_ko_cfg_analyse_info_ctrl_item(i, arg_name, arg_value, dfd_cfg_item_name[i],
+                    &(dfd_cfg_item_index_range[i]), line_num);
+            } else {
+                rv = -1;
+            }
+            break;
+        }
+    }
+
+    return rv;
+}
+
+static int dfd_ko_cfg_cut_config_line(char *config_line, char *arg_name, char *arg_value)
+{
+    int i, j = 0, k = 0;
+    int len, name_value_flag = 0;
+
+    len = strlen(config_line);
+    for (i = 0; i < len; i++) {
+        if (config_line[i] == '=') {
+            name_value_flag = 1;
+            continue;
+        }
+
+        if (name_value_flag == 0) {
+            arg_name[j++] = config_line[i];
+        } else {
+            arg_value[k++] = config_line[i];
+        }
+    }
+
+    if (name_value_flag == 0) {
+        return -1;
+    } else {
+        return 0;
+    }
+}
+
+static int dfd_ko_cfg_analyse_config_line(char *config_line, int line_num)
+{
+    int rv;
+    char arg_name[DFD_CFG_NAME_MAX_LEN] = {0};
+    char arg_value[DFD_CFG_VALUE_MAX_LEN] = {0};
+
+    dfd_ko_cfg_del_space_lf_cr(config_line);
+
+    if (strlen(config_line) == 0) {
+        DBG_DEBUG(DBG_VERBOSE, "line%d: space line\n", line_num);
+        return 0;
+    }
+
+    if (config_line[0] == '#') {
+        DBG_DEBUG(DBG_VERBOSE, "line%d: comment line[%s]\n", line_num, config_line);
+        return 0;
+    }
+
+    rv = dfd_ko_cfg_cut_config_line(config_line, arg_name, arg_value);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_VERBOSE, "line%d: [%s]no '=' between name and value\n", line_num, config_line);
+        return -1;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "line%d: config_line[%s] name[%s] value[%s]\n", line_num, config_line, arg_name, arg_value);
+    return dfd_ko_cfg_analyse_config(arg_name, arg_value, line_num);
+}
+
+static int dfd_ko_cfg_analyse_config_file(char *fpath)
+{
+    int rv;
+    int line_num = 1;
+    kfile_ctrl_t kfile_ctrl;
+    char config_line[DFD_CFG_CMDLINE_MAX_LEN] = {0};
+
+    rv = kfile_open(fpath, &kfile_ctrl);
+    if (rv != KFILE_RV_OK) {
+        DBG_DEBUG(DBG_ERROR, "open config file[%s] fail, rv=%d\n", fpath, rv);
+        return -1;
+    }
+
+    while(kfile_gets(config_line, sizeof(config_line), &kfile_ctrl) > 0){
+        rv = dfd_ko_cfg_analyse_config_line(config_line, line_num++);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "!!!!file[%s] config line[%d %s] analyse fail\n", fpath, line_num - 1,
+                config_line);
+            break;
+        }
+
+        (void)mem_clear(config_line, sizeof(config_line));
+
+    }
+    kfile_close(&kfile_ctrl);
+
+    return rv;
+}
+
+void *dfd_ko_cfg_get_item(int key)
+{
+    return lnode_find_node(&dfd_ko_cfg_list_root, key);
+}
+
+static void dfd_ko_cfg_print_item(int key, const void *cfg)
+{
+    int item_id;
+    dfd_i2c_dev_t *i2c_dev;
+    info_ctrl_t *info_ctrl;
+
+    if (cfg == NULL) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error\n");
+        return;
+    }
+    printk(KERN_INFO "**************************\n");
+    printk(KERN_INFO "key=0x%08x\n", key);
+
+    item_id = DFD_CFG_ITEM_ID(key);
+    if (DFD_CFG_ITEM_IS_INT(item_id)) {
+        printk(KERN_INFO "int=%d\n", *((int *)cfg));
+    } else if (DFD_CFG_ITEM_IS_I2C_DEV(item_id)) {
+        i2c_dev = (dfd_i2c_dev_t *)cfg;
+        printk(KERN_INFO ".bus=0x%02x\n", i2c_dev->bus);
+        printk(KERN_INFO ".addr=0x%02x\n", i2c_dev->addr);
+    } else if (DFD_CFG_ITEM_IS_INFO_CTRL(item_id)) {
+        info_ctrl = (info_ctrl_t *)cfg;
+        printk(KERN_INFO ".mode=%s\n", g_info_ctrl_mode_str[info_ctrl->mode]);
+        printk(KERN_INFO ".int_cons=%d\n", info_ctrl->int_cons);
+        printk(KERN_INFO ".src=%s\n", g_info_src_str[info_ctrl->src]);
+        printk(KERN_INFO ".frmt=%s\n", g_info_frmt_str[info_ctrl->frmt]);
+        printk(KERN_INFO ".pola=%s\n", g_info_pola_str[info_ctrl->pola]);
+        printk(KERN_INFO ".fpath=%s\n", info_ctrl->fpath);
+        printk(KERN_INFO ".addr=0x%02x\n", info_ctrl->addr);
+        printk(KERN_INFO ".len=%d\n", info_ctrl->len);
+        printk(KERN_INFO ".bit_offset=%d\n", info_ctrl->bit_offset);
+    } else {
+        printk(KERN_INFO "item[%d] error!\n", item_id);
+    }
+}
+
+void dfd_ko_cfg_show_item(int key)
+{
+    void *cfg;
+
+    cfg = lnode_find_node(&dfd_ko_cfg_list_root, key);
+    if (cfg == 0) {
+        printk(KERN_INFO "item[0x%08x] not exist\n", key);
+        return;
+    }
+
+    dfd_ko_cfg_print_item(key, cfg);
+}
+
+static int dfd_get_my_dev_type_by_file(void)
+{
+    struct file *fp;
+    loff_t pos;
+    int card_type;
+    char buf[DFD_PID_BUF_LEN];
+    int ret;
+
+    fp= filp_open(DFD_PUB_CARDTYPE_FILE, O_RDONLY, 0);
+    if (IS_ERR(fp)) {
+        DBG_DEBUG(DBG_VERBOSE, "open file fail!\n");
+        return -1;
+    }
+    mem_clear(buf, DFD_PID_BUF_LEN);
+    pos = 0;
+    ret = kernel_read(fp, buf, DFD_PRODUCT_ID_LENGTH + 1, &pos);
+    if (ret < 0) {
+        DBG_DEBUG(DBG_VERBOSE, "kernel_read failed, path=%s, addr=0, size=%d, ret=%d\n",
+            DFD_PUB_CARDTYPE_FILE, DFD_PRODUCT_ID_LENGTH + 1, ret);
+        filp_close(fp, NULL);
+        return -1;
+    }
+
+    card_type = simple_strtoul(buf, NULL, 10);
+    DBG_DEBUG(DBG_VERBOSE, "card_type 0x%x.\n", card_type);
+
+    filp_close(fp, NULL);
+    return card_type;
+}
+
+static int drv_get_my_dev_type(void)
+{
+    static int type = -1;
+
+    if (type > 0) {
+        return type;
+    }
+    type = dfd_get_my_dev_type_by_file();
+    DBG_DEBUG(DBG_VERBOSE, "ko board type %d\n", type);
+    return type;
+}
+
+static int dfd_ko_cfg_init(void)
+{
+    int rv;
+    int card_type;
+    char file_name[32] = {0};
+    char fpath[128] = {0};
+    kfile_ctrl_t kfile_ctrl;
+
+    rv = lnode_init_root(&dfd_ko_cfg_list_root);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "init list root fail, rv=%d\n", rv);
+        return -1;
+    }
+
+    card_type = drv_get_my_dev_type();
+    if (card_type > 0) {
+        snprintf(fpath, sizeof(fpath), "%s0x%x", DFD_KO_CFG_FILE_DIR, card_type);
+        rv = kfile_open(fpath, &kfile_ctrl);
+        if (rv != KFILE_RV_OK) {
+            DBG_DEBUG(DBG_VERBOSE, "open config file[%s] fail, rv=%d, maybe not exist\n",
+                fpath, rv);
+
+            rv = kfile_open(DFD_KO_CFG_FILE_NAME, &kfile_ctrl);
+            if (rv != KFILE_RV_OK) {
+                DBG_DEBUG(DBG_ERROR, "open config file[%s] fail, rv=%d\n", DFD_KO_CFG_FILE_NAME,
+                    rv);
+                return -1;
+            }
+            DBG_DEBUG(DBG_ERROR, "get config file from: %s, success.\n", DFD_KO_CFG_FILE_NAME);
+        } else {
+            DBG_DEBUG(DBG_VERBOSE, "get config file from: %s, success.\n", fpath);
+        }
+    } else {
+        DBG_DEBUG(DBG_VERBOSE, "get board id failed, try to get config file from: %s\n",
+            DFD_KO_CFG_FILE_NAME);
+
+        rv = kfile_open(DFD_KO_CFG_FILE_NAME, &kfile_ctrl);
+        if (rv != KFILE_RV_OK) {
+            DBG_DEBUG(DBG_ERROR, "open config file[%s] fail, rv=%d\n", DFD_KO_CFG_FILE_NAME, rv);
+            return -1;
+        }
+        DBG_DEBUG(DBG_ERROR, "get config file from: %s, success.\n", DFD_KO_CFG_FILE_NAME);
+    }
+
+    while (kfile_gets(file_name, sizeof(file_name), &kfile_ctrl) > 0) {
+
+        dfd_ko_cfg_del_space_lf_cr(file_name);
+        mem_clear(fpath, sizeof(fpath));
+        snprintf(fpath, sizeof(fpath), "%s%s.cfg", DFD_KO_CFG_FILE_DIR, file_name);
+        DBG_DEBUG(DBG_VERBOSE, ">>>>start parsing config file[%s]\n", fpath);
+
+        rv = dfd_ko_cfg_analyse_config_file(fpath);
+        if (rv < 0) {
+            break;
+        }
+    }
+    kfile_close(&kfile_ctrl);
+
+    return 0;
+}
+
+int32_t dfd_dev_cfg_init(void)
+{
+    return dfd_ko_cfg_init();
+}
+
+void dfd_dev_cfg_exit(void)
+{
+    lnode_free_list(&dfd_ko_cfg_list_root);
+    return;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_adapter.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_adapter.c
new file mode 100644
index 000000000000..1d5ca7072f8f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_adapter.c
@@ -0,0 +1,351 @@
+#include <linux/fs.h>
+#include <linux/slab.h>
+#include <asm/unistd.h>
+#include <linux/uaccess.h>
+#include <linux/types.h>
+#include <linux/delay.h>
+#include <linux/i2c.h>
+
+#include "../include/dfd_module.h"
+#include "../include/dfd_cfg_file.h"
+#include "../include/dfd_cfg.h"
+#include "../include/dfd_cfg_adapter.h"
+#include "../../dev_sysfs/include/sysfs_common.h"
+
+char *g_dfd_i2c_dev_mem_str[DFD_I2C_DEV_MEM_END] = {
+    ".bus",
+    ".addr",
+};
+
+static dfd_i2c_dev_t* dfd_ko_get_cpld_i2c_dev(int sub_slot, int cpld_id)
+{
+    int key;
+    dfd_i2c_dev_t *i2c_dev;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_CPLD_I2C_DEV, sub_slot, cpld_id);
+    i2c_dev = dfd_ko_cfg_get_item(key);
+    if (i2c_dev == NULL) {
+        DBG_DEBUG(DBG_ERROR, "get cpld[%d] i2c dev config fail, key=0x%08x\n", cpld_id, key);
+        return NULL;
+    }
+
+    return i2c_dev;
+}
+
+static int32_t dfd_ko_i2c_smbus_transfer(int read_write, int bus, int addr, int offset, uint8_t *buf, uint32_t size)
+{
+    int rv;
+    struct i2c_adapter *i2c_adap;
+    union i2c_smbus_data data;
+
+    i2c_adap = i2c_get_adapter(bus);
+    if (i2c_adap == NULL) {
+        DBG_DEBUG(DBG_ERROR, "get i2c bus[%d] adapter fail\n", bus);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    if (read_write == I2C_SMBUS_WRITE) {
+        data.byte = *buf;
+    } else {
+        data.byte = 0;
+    }
+    rv = i2c_smbus_xfer(i2c_adap, addr, 0, read_write, offset, I2C_SMBUS_BYTE_DATA, &data);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "i2c dev[bus=%d addr=0x%x offset=0x%x size=%d rw=%d] transfer fail, rv=%d\n",
+            bus, addr, offset, size, read_write, rv);
+        rv = -DFD_RV_DEV_FAIL;
+    } else {
+        DBG_DEBUG(DBG_VERBOSE, "i2c dev[bus=%d addr=0x%x offset=0x%x size=%d rw=%d] transfer success\n",
+            bus, addr, offset, size, read_write);
+        rv = DFD_RV_OK;
+    }
+
+    if (read_write == I2C_SMBUS_READ) {
+        if (rv == DFD_RV_OK) {
+            *buf = data.byte;
+        } else {
+            *buf = 0;
+        }
+    }
+
+    i2c_put_adapter(i2c_adap);
+    return rv;
+}
+
+static int32_t dfd_ko_i2c_read_data(int bus, int addr, int offset, uint8_t *buf, uint32_t size)
+{
+    int i, rv;
+    for (i = 0; i < DFD_KO_CPLD_I2C_RETRY_TIMES; i++) {
+        rv = dfd_ko_i2c_smbus_transfer(I2C_SMBUS_READ, bus, addr, offset, buf, size);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "[%d]cpld read[offset=0x%x] fail, rv %d\n", i, addr, rv);
+            msleep(DFD_KO_CPLD_I2C_RETRY_SLEEP);
+        } else {
+            DBG_DEBUG(DBG_VERBOSE, "[%d]cpld read[offset=0x%x] success, value=0x%x\n",
+                i, addr, *buf);
+            break;
+        }
+    }
+    return rv;
+}
+
+static int32_t dfd_ko_i2c_write_data(int bus, int addr, int offset, uint8_t data, uint32_t size)
+{
+    int i, rv;
+    for (i = 0; i < DFD_KO_CPLD_I2C_RETRY_TIMES; i++) {
+        rv = dfd_ko_i2c_smbus_transfer(I2C_SMBUS_WRITE, bus, addr, offset, &data, size);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "[%d]cpld write[offset=0x%x] fail, rv=%d\n", i, addr, rv);
+            msleep(DFD_KO_CPLD_I2C_RETRY_SLEEP);
+        } else {
+            DBG_DEBUG(DBG_VERBOSE, "[%d]cpld write[offset=0x%x, data=%d] success\n", i, addr, data);
+            break;
+        }
+    }
+
+    return rv;
+}
+
+static int32_t dfd_ko_cpld_i2c_read(int32_t addr, uint8_t *buf)
+{
+    int rv;
+    int sub_slot, cpld_id, cpld_addr;
+    dfd_i2c_dev_t *i2c_dev;
+
+    if (buf == NULL) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error\n");
+        return -DFD_RV_INDEX_INVALID;
+    }
+
+    sub_slot = DFD_KO_CPLD_GET_SLOT(addr);
+    cpld_id = DFD_KO_CPLD_GET_ID(addr);
+    cpld_addr = DFD_KO_CPLD_GET_INDEX(addr);
+
+    i2c_dev = dfd_ko_get_cpld_i2c_dev(sub_slot, cpld_id);
+    if (i2c_dev == NULL) {
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    rv = dfd_ko_i2c_read_data(i2c_dev->bus, i2c_dev->addr, cpld_addr, buf, sizeof(uint8_t));
+
+    return rv;
+}
+
+static int32_t dfd_ko_cpld_i2c_write(int32_t addr, uint8_t data)
+{
+    int rv;
+    int sub_slot, cpld_id, cpld_addr;
+    dfd_i2c_dev_t *i2c_dev;
+
+    sub_slot = DFD_KO_CPLD_GET_SLOT(addr);
+    cpld_id = DFD_KO_CPLD_GET_ID(addr);
+    cpld_addr = DFD_KO_CPLD_GET_INDEX(addr);
+
+    i2c_dev = dfd_ko_get_cpld_i2c_dev(sub_slot, cpld_id);
+    if (i2c_dev == NULL) {
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    rv = dfd_ko_i2c_write_data(i2c_dev->bus, i2c_dev->addr, cpld_addr, data, sizeof(uint8_t));
+
+    return rv;
+}
+
+static int32_t dfd_ko_cpld_io_read(int32_t addr, uint8_t *buf)
+{
+    int cpld_id, sub_slot, offset;
+    int key;
+    int *tmp;
+    uint16_t io_port;
+
+    sub_slot = DFD_KO_CPLD_GET_SLOT(addr);
+    cpld_id = DFD_KO_CPLD_GET_ID(addr);
+    offset = DFD_KO_CPLD_GET_INDEX(addr);
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_CPLD_LPC_DEV, sub_slot, cpld_id);
+    tmp = dfd_ko_cfg_get_item(key);
+    if (tmp == NULL) {
+        DBG_DEBUG(DBG_ERROR,"get cpld io base config fail, key=0x%08x\n", key);
+        return -1;
+    }
+
+    io_port = (u16)(*tmp) + offset;
+    *buf = inb(io_port);
+    DBG_DEBUG(DBG_VERBOSE, "read cpld io port addr 0x%x, data 0x%x\n", io_port, *buf);
+
+    return DFD_RV_OK;
+
+}
+
+static int32_t dfd_ko_cpld_io_write(int32_t addr, uint8_t data)
+{
+    int cpld_id, sub_slot, offset;
+    int key;
+    int *tmp;
+    uint16_t io_port;
+
+    sub_slot = DFD_KO_CPLD_GET_SLOT(addr);
+    cpld_id = DFD_KO_CPLD_GET_ID(addr);
+    offset = DFD_KO_CPLD_GET_INDEX(addr);
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_CPLD_LPC_DEV, sub_slot, cpld_id);
+    tmp = dfd_ko_cfg_get_item(key);
+    if (tmp == NULL) {
+        DBG_DEBUG(DBG_ERROR, "get cpld io base config fail, key=0x%08x\n", key);
+        return -1;
+    }
+
+    io_port = (u16)(*tmp) + offset;
+    DBG_DEBUG(DBG_VERBOSE, "write cpld io port addr 0x%x, data 0x%x\n", io_port, data);
+    outb(data, (u16)io_port);
+
+    return DFD_RV_OK;
+}
+
+static int dfd_cfg_get_cpld_mode(int sub_slot, int cpld_id, int *mode)
+{
+    int key;
+    char *name;
+
+    if (mode == NULL) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error\n");
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_CPLD_MODE, sub_slot, cpld_id);
+    name = dfd_ko_cfg_get_item(key);
+    if (name == NULL) {
+        DBG_DEBUG(DBG_ERROR, "get cpld[%d] mode info ctrl fail, key=0x%08x\n", cpld_id, key);
+        return -DFD_RV_NODE_FAIL;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "cpld_id %d mode_name %s.\n", cpld_id, name);
+    if (!strncmp(name, DFD_KO_CPLD_MODE_I2C_STRING, strlen(DFD_KO_CPLD_MODE_I2C_STRING))) {
+        *mode = DFD_CPLD_MODE_I2C;
+    } else if (!strncmp(name, DFD_KO_CPLD_MODE_LPC_STRING, strlen(DFD_KO_CPLD_MODE_LPC_STRING))) {
+        *mode = DFD_CPLD_MODE_LPC;
+    } else {
+
+        *mode = DFD_CPLD_MODE_I2C;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "cpld_id %d mode %d.\n", cpld_id, *mode);
+    return 0;
+}
+
+int32_t dfd_ko_cpld_read(int32_t addr, uint8_t *buf)
+{
+    int ret;
+    int sub_slot, cpld_id;
+    int cpld_mode;
+
+    sub_slot = DFD_KO_CPLD_GET_SLOT(addr);
+    cpld_id = DFD_KO_CPLD_GET_ID(addr);
+
+    ret = dfd_cfg_get_cpld_mode(sub_slot, cpld_id, &cpld_mode);
+    if (ret) {
+        DBG_DEBUG(DBG_WARN, "drv_get_cpld_mode sub_slot %d cpldid %d faile, set default i2c mode.\n", sub_slot, cpld_id);
+        cpld_mode = DFD_CPLD_MODE_I2C;
+    }
+
+    if (cpld_mode == DFD_CPLD_MODE_I2C) {
+        ret = dfd_ko_cpld_i2c_read(addr, buf);
+    } else if (cpld_mode == DFD_CPLD_MODE_LPC) {
+        ret = dfd_ko_cpld_io_read(addr, buf);
+    } else {
+        DBG_DEBUG(DBG_ERROR, "cpld_mode %d invalid.\n", cpld_mode);
+        ret = -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "addr 0x%x val 0x%x ret %d\n", addr, *buf, ret);
+    return ret;
+}
+
+int32_t dfd_ko_cpld_write(int32_t addr, uint8_t val)
+{
+    int ret;
+    int sub_slot, cpld_id, cpld_mode;
+
+    sub_slot = DFD_KO_CPLD_GET_SLOT(addr);
+    cpld_id = DFD_KO_CPLD_GET_ID(addr);
+
+    ret = dfd_cfg_get_cpld_mode(sub_slot, cpld_id, &cpld_mode);
+    if (ret) {
+        DBG_DEBUG(DBG_ERROR, "drv_get_cpld_mode sub_slot %d cpldid %d faile, set default local_bus mode.\n", sub_slot, cpld_id);
+        cpld_mode = DFD_CPLD_MODE_I2C;
+    }
+
+    if (cpld_mode == DFD_CPLD_MODE_I2C) {
+        ret = dfd_ko_cpld_i2c_write(addr, val);
+    } else if (cpld_mode == DFD_CPLD_MODE_LPC) {
+        ret = dfd_ko_cpld_io_write(addr, val);
+    } else {
+        DBG_DEBUG(DBG_ERROR, "cpld_mode %d invalid.\n", cpld_mode);
+        ret = -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "addr 0x%x val 0x%x ret %d\n", addr, val, ret);
+    return ret;
+}
+
+int32_t dfd_ko_i2c_read(int bus, int addr, int offset, uint8_t *buf, uint32_t size)
+{
+    int i, rv;
+
+    for (i = 0; i < size; i++) {
+        rv = dfd_ko_i2c_read_data(bus, addr, offset, &buf[i], sizeof(uint8_t));
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "dfd_ko_i2c_read[bus=%d addr=0x%x offset=0x%x]fail, rv=%d\n",
+                bus, addr, offset, rv);
+            return rv;
+        }
+        offset++;
+    }
+
+    return size;
+}
+
+int32_t dfd_ko_i2c_write(int bus, int addr, int offset, uint8_t *buf, uint32_t size)
+{
+    int i, rv;
+
+    for (i = 0; i < size; i++) {
+        rv = dfd_ko_i2c_write_data(bus, addr, offset, buf[i], sizeof(uint8_t));
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "dfd_ko_i2c_write[bus=%d addr=0x%x offset=0x%x]fail, rv=%d\n",
+                bus, addr, offset, rv);
+            return rv;
+        }
+        offset++;
+    }
+
+    return size;
+
+}
+
+int32_t dfd_ko_read_file(char *fpath, int32_t addr, uint8_t *val, int32_t read_bytes)
+{
+    int32_t ret;
+    struct file *filp;
+    loff_t pos;
+
+    if ((fpath == NULL) || (val == NULL) || (addr < 0) || (read_bytes < 0)) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error, addr=%d read_bytes=%d\n", addr, read_bytes);
+        return -DFD_RV_INDEX_INVALID;
+    }
+
+    filp = filp_open(fpath, O_RDONLY, 0);
+    if (IS_ERR(filp)){
+        DBG_DEBUG(DBG_ERROR, "open file[%s] fail\n", fpath);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    pos = addr;
+    ret = kernel_read(filp, val, read_bytes, &pos);
+    if (ret < 0) {
+        DBG_DEBUG(DBG_ERROR, "kernel_read failed, path=%s, addr=%d, size=%d, ret=%d\n", fpath, addr, read_bytes, ret);
+        ret = -DFD_RV_DEV_FAIL;
+    }
+
+    filp_close(filp, NULL);
+    return ret;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_file.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_file.c
new file mode 100644
index 000000000000..8d77759ba7e0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_file.c
@@ -0,0 +1,236 @@
+#include <asm/unistd.h>
+#include <linux/uaccess.h>
+#include <linux/stat.h>
+#include <linux/slab.h>
+#include <linux/fs.h>
+#include <linux/mm.h>
+#include <linux/types.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+
+#include "../include/dfd_cfg_file.h"
+#include "../include/dfd_module.h"
+#include "../../dev_sysfs/include/sysfs_common.h"
+
+struct getdents_callback {
+    struct dir_context ctx;
+    const char *obj_name;
+    char *match_name;
+    int dir_len;
+    int found;
+};
+
+int kfile_open(char *fname, kfile_ctrl_t *kfile_ctrl)
+{
+    int ret;
+    struct file *filp;
+    loff_t pos;
+
+    if ((fname == NULL) || (kfile_ctrl == NULL)) {
+        return KFILE_RV_INPUT_ERR;
+    }
+
+    filp = filp_open(fname, O_RDONLY, 0);
+    if (IS_ERR(filp)){
+        return KFILE_RV_OPEN_FAIL;
+    }
+
+    kfile_ctrl->size = filp->f_inode->i_size;
+
+    kfile_ctrl->buf = kmalloc(kfile_ctrl->size, GFP_KERNEL);
+    if (kfile_ctrl->buf == NULL) {
+        ret = KFILE_RV_MALLOC_FAIL;
+        goto close_fp;
+    }
+    mem_clear(kfile_ctrl->buf, kfile_ctrl->size);
+
+    pos = 0;
+    ret = kernel_read(filp, kfile_ctrl->buf, kfile_ctrl->size, &pos);
+    if (ret < 0) {
+        ret = KFILE_RV_RD_FAIL;
+        goto free_buf;
+    }
+
+    kfile_ctrl->pos = 0;
+
+    ret = KFILE_RV_OK;
+    goto close_fp;
+
+free_buf:
+    kfree(kfile_ctrl->buf);
+    kfile_ctrl->buf = NULL;
+
+close_fp:
+    filp_close(filp, NULL);
+    return ret;
+}
+
+void kfile_close(kfile_ctrl_t *kfile_ctrl)
+{
+    if (kfile_ctrl == NULL) {
+        return;
+    }
+
+    kfile_ctrl->size = 0;
+    kfile_ctrl->pos = 0;
+    if (kfile_ctrl->buf) {
+        kfree(kfile_ctrl->buf);
+        kfile_ctrl->buf = NULL;
+    }
+}
+
+int kfile_gets(char *buf, int buf_size, kfile_ctrl_t *kfile_ctrl)
+{
+    int i;
+    int has_cr = 0;
+
+    if ((buf == NULL) || (buf_size <= 0) || (kfile_ctrl == NULL) || (kfile_ctrl->buf == NULL)
+            || (kfile_ctrl->size <= 0)) {
+        return KFILE_RV_INPUT_ERR;
+    }
+
+    mem_clear(buf, buf_size);
+    for (i = 0; i < buf_size; i++) {
+
+        if (kfile_ctrl->pos >= kfile_ctrl->size) {
+            break;
+        }
+
+        if (has_cr) {
+            break;
+        }
+
+        if (IS_CR(kfile_ctrl->buf[kfile_ctrl->pos])) {
+            has_cr = 1;
+        }
+
+        buf[i] = kfile_ctrl->buf[kfile_ctrl->pos];
+        kfile_ctrl->pos++;
+    }
+
+    return i;
+}
+
+int kfile_read(int32_t addr, char *buf, int buf_size, kfile_ctrl_t *kfile_ctrl)
+{
+    int i;
+
+    if ((buf == NULL) || (buf_size <= 0) || (kfile_ctrl == NULL) || (kfile_ctrl->buf == NULL)
+            || (kfile_ctrl->size <= 0)) {
+        return KFILE_RV_INPUT_ERR;
+    }
+
+    if ((addr < 0) || (addr >= kfile_ctrl->size)) {
+        return KFILE_RV_ADDR_ERR;
+    }
+
+    mem_clear(buf, buf_size);
+
+    kfile_ctrl->pos = addr;
+    for (i = 0; i < buf_size; i++) {
+
+        if (kfile_ctrl->pos >= kfile_ctrl->size) {
+            break;
+        }
+
+        buf[i] = kfile_ctrl->buf[kfile_ctrl->pos];
+        kfile_ctrl->pos++;
+    }
+
+    return i;
+}
+
+static int kfile_filldir_one(struct dir_context *ctx, const char * name, int len,
+            loff_t pos, u64 ino, unsigned int d_type)
+{
+    struct getdents_callback *buf ;
+    int result;
+    buf = container_of(ctx, struct getdents_callback, ctx);
+    result = 0;
+    if (strncmp(buf->obj_name, name, strlen(buf->obj_name)) == 0) {
+        if (buf->dir_len < len) {
+            DBG_DEBUG(DBG_ERROR, "match ok. dir name:%s, but buf_len %d small than dir len %d.\n",
+                name, buf->dir_len, len);
+            buf->found = 0;
+            return -1;
+        }
+        mem_clear(buf->match_name, buf->dir_len);
+        memcpy(buf->match_name, name, len);
+        buf->found = 1;
+        result = -1;
+    }
+    return result;
+}
+
+int kfile_iterate_dir(const char *dir_path, const char *obj_name, char *match_name, int len)
+{
+    int ret;
+    struct file *dir;
+    struct getdents_callback buffer = {
+        .ctx.actor = kfile_filldir_one,
+    };
+
+    if(!dir_path || !obj_name || !match_name) {
+        DBG_DEBUG(DBG_ERROR, "params error. \n");
+        return KFILE_RV_INPUT_ERR;
+    }
+    buffer.obj_name = obj_name;
+    buffer.match_name = match_name;
+    buffer.dir_len = len;
+    buffer.found = 0;
+
+    dir = filp_open(dir_path, O_RDONLY, 0);
+    if (IS_ERR(dir)) {
+        DBG_DEBUG(DBG_ERROR, "filp_open error, dir path:%s\n", dir_path);
+        return KFILE_RV_OPEN_FAIL;
+    }
+    ret = iterate_dir(dir, &buffer.ctx);
+    if (buffer.found) {
+        DBG_DEBUG(DBG_VERBOSE, "match ok, dir name:%s\n", match_name);
+        filp_close(dir, NULL);
+        return DFD_RV_OK;
+    }
+    filp_close(dir, NULL);
+    return -DFD_RV_NODE_FAIL;
+}
+
+#if 0
+
+int kfile_write(char *fpath, int32_t addr, char *buf, int buf_size)
+{
+    int ret = KFILE_RV_OK;
+    struct file *filp;
+    mm_segment_t old_fs;
+    int wlen;
+
+    if ((fpath == NULL) || (buf == NULL) || (buf_size <= 0)) {
+        return KFILE_RV_INPUT_ERR;
+    }
+
+    if (addr < 0) {
+        return KFILE_RV_ADDR_ERR;
+    }
+
+    filp = filp_open(fpath, O_RDWR, 0);
+    if (IS_ERR(filp)){
+        return KFILE_RV_OPEN_FAIL;
+    }
+
+    old_fs = get_fs();
+    set_fs(KERNEL_DS);
+
+    filp->f_op->llseek(filp,0,0);
+    filp->f_pos = addr;
+
+    wlen = filp->f_op->write(filp, buf, buf_size, &(filp->f_pos));
+    if (wlen < 0) {
+        ret = KFILE_RV_WR_FAIL;
+    }
+
+    filp->f_op->llseek(filp,0,0);
+    set_fs(old_fs);
+    filp_close(filp, NULL);
+
+    return ret;
+}
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c
new file mode 100644
index 000000000000..6cf05abd55dc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c
@@ -0,0 +1,593 @@
+#include <linux/string.h>
+#include <linux/types.h>
+#include <linux/slab.h>
+
+#include "../include/dfd_module.h"
+#include "../include/dfd_cfg_adapter.h"
+#include "../include/dfd_cfg.h"
+#include "../include/dfd_cfg_info.h"
+#include "../include/dfd_cfg_file.h"
+#include "../../dev_sysfs/include/sysfs_common.h"
+
+#define DFD_HWMON_NAME                                "hwmon"
+#define DFD_GET_CPLD_VOLATGE_CODE_VALUE(value)        ((value >> 4)& 0xfff)
+/* ((code_val * 16 * 33 * k) / ((65536 - 5000) * 10)) = ((code_val * 33 * k) / 37835) */
+#define DFD_GET_CPLD_VOLATGE_REAL_VALUE(code_val, k)  ((code_val * 33 * k) / 37835)
+
+char *g_info_ctrl_mem_str[INFO_CTRL_MEM_END] = {
+    ".mode",
+    ".int_cons",
+    ".src",
+    ".frmt",
+    ".pola",
+    ".fpath",
+    ".addr",
+    ".len",
+    ".bit_offset",
+    ".str_cons",
+    ".int_extra1",
+    ".int_extra2",
+};
+
+char *g_info_ctrl_mode_str[INFO_CTRL_MODE_END] = {
+    "none",
+    "config",
+    "constant",
+    "tlv",
+    "str_constant",
+};
+
+char *g_info_src_str[INFO_SRC_END] = {
+    "none",
+    "cpld",
+    "fpga",
+    "other_i2c",
+    "file",
+};
+
+char *g_info_frmt_str[INFO_FRMT_END] = {
+    "none",
+    "bit",
+    "byte",
+    "num_bytes",
+    "num_str",
+    "num_buf",
+    "buf",
+};
+
+char *g_info_pola_str[INFO_POLA_END] = {
+    "none",
+    "positive",
+    "negative",
+};
+
+static int dfd_read_info_from_cpld(int32_t addr, int read_bytes, uint8_t *val)
+{
+    int i, rv;
+
+    for (i = 0; i < read_bytes; i++) {
+        rv = dfd_ko_cpld_read(addr, &(val[i]));
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "read info[addr=0x%x read_bytes=%d] from cpld fail, reading_byte=%d rv=%d\n",
+                addr, read_bytes, i, rv);
+            return rv;
+        }
+        addr++;
+    }
+
+    return read_bytes;
+}
+
+static int dfd_write_info_to_cpld(int32_t addr, int write_bytes, uint8_t *val, uint8_t bit_mask)
+{
+    int rv;
+    uint8_t val_tmp;
+
+    if (bit_mask != 0xff) {
+        rv = dfd_ko_cpld_read(addr, &val_tmp);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "read original info[addr=0x%x] from cpld fail, rv=%d\n", addr, rv);
+            return -1;
+        }
+
+        val_tmp = (val_tmp & (~bit_mask)) | (val[0] & bit_mask);
+    } else {
+        val_tmp = val[0];
+    }
+
+    rv = dfd_ko_cpld_write(addr, val_tmp);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "write info[addr=0x%x val=0x%x] to cpld fail, rv=%d\n", addr, val_tmp, rv);
+        return -1;
+    }
+
+    return 0;
+}
+
+static int dfd_read_info(info_src_t src, char *fpath, int32_t addr, int read_bytes, uint8_t *val)
+{
+    int rv = 0;
+
+    switch (src) {
+    case INFO_SRC_CPLD:
+        rv = dfd_read_info_from_cpld(addr, read_bytes, val);
+        break;
+    case INFO_SRC_FPGA:
+        rv = -1;
+        DBG_DEBUG(DBG_ERROR, "not support read info from fpga\n");
+        break;
+    case INFO_SRC_OTHER_I2C:
+        rv = -1;
+        DBG_DEBUG(DBG_ERROR, "not support read info from other i2c\n");
+        break;
+    case INFO_SRC_FILE:
+        rv = dfd_ko_read_file(fpath, addr, val, read_bytes);
+        break;
+    default:
+        rv = -1;
+        DBG_DEBUG(DBG_ERROR, "info src[%d] error\n", src);
+        break;
+    }
+
+    return rv;
+}
+
+static int dfd_write_info(info_src_t src, char *fpath, int32_t addr, int write_bytes, uint8_t *val, uint8_t bit_mask)
+{
+    int rv = 0;
+
+    switch (src) {
+    case INFO_SRC_CPLD:
+        rv = dfd_write_info_to_cpld(addr, write_bytes, val, bit_mask);
+        break;
+    case INFO_SRC_FPGA:
+        rv = -1;
+        DBG_DEBUG(DBG_ERROR, "not support write info to fpga\n");
+        break;
+    case INFO_SRC_OTHER_I2C:
+        rv = -1;
+        DBG_DEBUG(DBG_ERROR, "not support write info to other i2c\n");
+        break;
+    case INFO_SRC_FILE:
+        rv = -1;
+        DBG_DEBUG(DBG_ERROR, "not support write info to file\n");
+        break;
+    default:
+        rv = -1;
+        DBG_DEBUG(DBG_ERROR, "info src[%d] error\n", src);
+        break;
+    }
+
+    return rv;
+}
+
+static int dfd_get_info_value(info_ctrl_t *info_ctrl, int *ret, info_num_buf_to_value_f pfun)
+{
+    int i, rv;
+    int read_bytes, readed_bytes, int_tmp;
+    uint8_t byte_tmp, val[INFO_INT_MAX_LEN + 1] = {0};
+
+    if (info_ctrl->mode == INFO_CTRL_MODE_CONS) {
+        *ret = info_ctrl->int_cons;
+        return DFD_RV_OK;
+    }
+    if (info_ctrl->mode == INFO_CTRL_MODE_TLV) {
+        return INFO_CTRL_MODE_TLV;
+    }
+
+    if (IS_INFO_FRMT_BIT(info_ctrl->frmt)) {
+        if (!INFO_BIT_OFFSET_VALID(info_ctrl->bit_offset)) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl bit_offsest[%d] invalid\n",
+                info_ctrl->bit_offset);
+            return -DFD_RV_TYPE_ERR;
+        }
+        read_bytes = 1;
+    } else if (IS_INFO_FRMT_BYTE(info_ctrl->frmt) || IS_INFO_FRMT_NUM_STR(info_ctrl->frmt)
+            || IS_INFO_FRMT_NUM_BUF(info_ctrl->frmt)) {
+        if (!INFO_INT_LEN_VALAID(info_ctrl->len)) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl len[%d] invalid\n", info_ctrl->len);
+            return -DFD_RV_TYPE_ERR;
+        }
+        read_bytes = info_ctrl->len;
+    } else {
+        DBG_DEBUG(DBG_ERROR, "info ctrl info format[%d] error\n", info_ctrl->frmt);
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    readed_bytes = dfd_read_info(info_ctrl->src, info_ctrl->fpath, info_ctrl->addr, read_bytes, &(val[0]));
+    if (readed_bytes <= 0) {
+        DBG_DEBUG(DBG_ERROR, "read int info[src=%s frmt=%s fpath=%s addr=0x%x read_bytes=%d] fail, rv=%d\n",
+            g_info_src_str[info_ctrl->src], g_info_frmt_str[info_ctrl->frmt], info_ctrl->fpath,
+            info_ctrl->addr, read_bytes, readed_bytes);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    if (IS_INFO_FRMT_BIT(info_ctrl->frmt)) {
+        if (info_ctrl->pola == INFO_POLA_NEGA) {
+            val[0] = ~val[0];
+        }
+        byte_tmp = (val[0] >> info_ctrl->bit_offset) & (~(0xff << info_ctrl->len));
+        if (pfun) {
+            rv = pfun(&byte_tmp, sizeof(byte_tmp), &int_tmp);
+            if (rv < 0) {
+                DBG_DEBUG(DBG_ERROR, "info ctrl bit process fail, rv=%d\n", rv);
+                return rv;
+            }
+        } else {
+            int_tmp = (int)byte_tmp;
+        }
+    } else if (IS_INFO_FRMT_BYTE(info_ctrl->frmt)) {
+        int_tmp = 0;
+        for (i = 0; i < info_ctrl->len; i++) {
+            if (info_ctrl->pola == INFO_POLA_NEGA) {
+                int_tmp |=  val[info_ctrl->len - i - 1];
+            } else {
+                int_tmp |=  val[i];
+            }
+            if (i != (info_ctrl->len - 1)) {
+                int_tmp <<= 8;
+            }
+        }
+    } else if (IS_INFO_FRMT_NUM_STR(info_ctrl->frmt)) {
+        val[readed_bytes] = '\0';
+        int_tmp = simple_strtol((char *)(&(val[0])), NULL, 10);
+    } else {
+        if (pfun == NULL) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl number buf process function is null\n");
+            return -DFD_RV_INDEX_INVALID;
+        }
+        rv = pfun(val, readed_bytes, &int_tmp);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl number buf process fail, rv=%d\n", rv);
+            return rv;
+        }
+    }
+
+    *ret = int_tmp;
+    DBG_DEBUG(DBG_VERBOSE, "read int info[src=%s frmt=%s pola=%s fpath=%s addr=0x%x len=%d bit_offset=%d] success, ret=%d\n",
+            g_info_src_str[info_ctrl->src], g_info_frmt_str[info_ctrl->frmt], g_info_pola_str[info_ctrl->pola],
+            info_ctrl->fpath, info_ctrl->addr, info_ctrl->len, info_ctrl->bit_offset, *ret);
+    return DFD_RV_OK;
+}
+
+int dfd_info_get_int(int key, int *ret, info_num_buf_to_value_f pfun)
+{
+    int rv;
+    info_ctrl_t *info_ctrl;
+
+    if (!DFD_CFG_ITEM_IS_INFO_CTRL(DFD_CFG_ITEM_ID(key)) || (ret == NULL)) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error, key=0x%08x\n", key);
+        return -DFD_RV_INDEX_INVALID;
+    }
+
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_WARN, "get info ctrl fail, key=0x%08x\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "get info ctrl value, key=0x%08x\n", key);
+    rv = dfd_get_info_value(info_ctrl, ret, pfun);
+    return rv;
+}
+
+int dfd_info_get_buf(int key, uint8_t *buf, int buf_len, info_buf_to_buf_f pfun)
+{
+    int rv;
+    int read_bytes, buf_real_len;
+    uint8_t buf_tmp[INFO_BUF_MAX_LEN];
+    info_ctrl_t *info_ctrl;
+
+    if (!DFD_CFG_ITEM_IS_INFO_CTRL(DFD_CFG_ITEM_ID(key)) || (buf == NULL)) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error, key=0x%08x\n", key);
+        return -DFD_RV_INDEX_INVALID;
+    }
+
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_WARN, "get info ctrl fail, key=0x%08x\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    if (info_ctrl->mode != INFO_CTRL_MODE_CFG) {
+        DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08x] mode[%d] invalid\n", key, info_ctrl->mode);
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    if (!IS_INFO_FRMT_BUF(info_ctrl->frmt) || !INFO_BUF_LEN_VALAID(info_ctrl->len)
+            || (buf_len <= info_ctrl->len)) {
+        DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08x] format=%d or len=%d invlaid, buf_len=%d\n",
+            key, info_ctrl->frmt, info_ctrl->len, buf_len);
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    read_bytes = dfd_read_info(info_ctrl->src, info_ctrl->fpath, info_ctrl->addr, info_ctrl->len, buf_tmp);
+    if (read_bytes <= 0) {
+        DBG_DEBUG(DBG_ERROR, "read buf info[key=0x%08x src=%s frmt=%s fpath=%s addr=0x%x len=%d] fail, rv=%d\n",
+            key, g_info_src_str[info_ctrl->src], g_info_frmt_str[info_ctrl->frmt], info_ctrl->fpath,
+            info_ctrl->addr, info_ctrl->len, read_bytes);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    if (pfun) {
+        buf_real_len = buf_len;
+        rv = pfun(buf_tmp, read_bytes, buf, &buf_real_len);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08x] buf process fail, rv=%d\n", key, rv);
+            return -DFD_RV_DEV_NOTSUPPORT;
+        }
+    } else {
+        buf_real_len = read_bytes;
+        memcpy(buf, buf_tmp, read_bytes);
+    }
+
+    return buf_real_len;
+}
+
+static int dfd_2key_info_get_buf(info_ctrl_t *info_ctrl, uint8_t *buf, int buf_len, info_hwmon_buf_f pfun)
+{
+    int rv;
+    int read_bytes, buf_real_len;
+    uint8_t buf_tmp[INFO_BUF_MAX_LEN];
+    char temp_fpath[INFO_FPATH_MAX_LEN];
+
+    if (!IS_INFO_FRMT_BUF(info_ctrl->frmt) || !INFO_BUF_LEN_VALAID(info_ctrl->len)
+            || (buf_len <= info_ctrl->len)) {
+        DBG_DEBUG(DBG_ERROR, "key_path info ctrl format=%d or len=%d invlaid, buf_len=%d\n",
+            info_ctrl->frmt, info_ctrl->len, buf_len);
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    rv = kfile_iterate_dir(info_ctrl->fpath, DFD_HWMON_NAME, buf_tmp, INFO_BUF_MAX_LEN);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "dir patch:%s ,can find name %s dir \n",
+            info_ctrl->fpath, DFD_HWMON_NAME);
+        return -DFD_RV_NO_NODE;
+    }
+    mem_clear(temp_fpath, sizeof(temp_fpath));
+    snprintf(temp_fpath, sizeof(temp_fpath), "%s%s/%s",
+        info_ctrl->fpath, buf_tmp, info_ctrl->str_cons);
+    DBG_DEBUG(DBG_VERBOSE, "match ok path = %s \n", temp_fpath);
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+
+    read_bytes = dfd_read_info(info_ctrl->src, temp_fpath, info_ctrl->addr, info_ctrl->len, buf_tmp);
+    if (read_bytes <= 0) {
+        DBG_DEBUG(DBG_ERROR, "read buf info[src=%s frmt=%s fpath=%s addr=0x%x len=%d] fail, rv=%d\n",
+            g_info_src_str[info_ctrl->src], g_info_src_str[info_ctrl->frmt], temp_fpath,
+            info_ctrl->addr, info_ctrl->len, read_bytes);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    if (pfun) {
+        buf_real_len = buf_len;
+        rv = pfun(buf_tmp, read_bytes, buf, &buf_real_len, info_ctrl);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl buf process fail, rv=%d\n", rv);
+            return -DFD_RV_DEV_NOTSUPPORT;
+        }
+    } else {
+        buf_real_len = read_bytes;
+        memcpy(buf, buf_tmp, buf_real_len);
+    }
+    return buf_real_len;
+}
+
+int dfd_info_set_int(int key, int val)
+{
+    int rv;
+    int write_bytes;
+    uint8_t byte_tmp, bit_mask;
+    info_ctrl_t *info_ctrl;
+
+    if (!DFD_CFG_ITEM_IS_INFO_CTRL(DFD_CFG_ITEM_ID(key))) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error, key=0x%08x\n", key);
+        return -DFD_RV_INDEX_INVALID;
+    }
+
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_WARN, "get info ctrl fail, key=0x%08x\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    if (info_ctrl->mode != INFO_CTRL_MODE_CFG) {
+        DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08x] mode[%d] warnning\n", key, info_ctrl->mode);
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    if (IS_INFO_FRMT_BIT(info_ctrl->frmt)) {
+
+        if (!INFO_BIT_OFFSET_VALID(info_ctrl->bit_offset)) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08x] bit_offsest[%d] invalid\n",
+                key, info_ctrl->bit_offset);
+            return -DFD_RV_TYPE_ERR;
+        }
+
+        write_bytes = 1;
+
+        byte_tmp = (uint8_t)(val & 0xff);
+        byte_tmp <<= info_ctrl->bit_offset;
+        if (info_ctrl->pola == INFO_POLA_NEGA) {
+            byte_tmp = ~byte_tmp;
+        }
+
+        bit_mask = (~(0xff << info_ctrl->len)) << info_ctrl->bit_offset;
+    } else if (IS_INFO_FRMT_BYTE(info_ctrl->frmt)) {
+
+        if (!INFO_INT_LEN_VALAID(info_ctrl->len)) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08x] len[%d] invalid\n", key, info_ctrl->len);
+            return -DFD_RV_TYPE_ERR;
+        }
+
+        write_bytes = 1;
+
+        byte_tmp = (uint8_t)(val & 0xff);
+
+        bit_mask = 0xff;
+    } else if (IS_INFO_FRMT_NUM_STR(info_ctrl->frmt)) {
+
+        DBG_DEBUG(DBG_ERROR, "not support str int set\n");
+        return -1;
+    } else if (IS_INFO_FRMT_NUM_BUF(info_ctrl->frmt)) {
+
+        if (!INFO_INT_LEN_VALAID(info_ctrl->len)) {
+            DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08x] len[%d] invalid\n", key, info_ctrl->len);
+            return -DFD_RV_TYPE_ERR;
+        }
+
+        write_bytes = 1;
+
+        byte_tmp = (uint8_t)(val & 0xff);
+
+        bit_mask = 0xff;
+    } else {
+        DBG_DEBUG(DBG_ERROR, "info ctrl[key=0x%08x] format[%d] error\n", key, info_ctrl->frmt);
+        return -DFD_RV_TYPE_ERR;
+    }
+
+    rv = dfd_write_info(info_ctrl->src, info_ctrl->fpath, info_ctrl->addr, write_bytes,
+            &byte_tmp, bit_mask);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "write int info[src=%s frmt=%s fpath=%s addr=0x%x len=%d val=%d] fail, rv=%d\n",
+            g_info_src_str[info_ctrl->src], g_info_frmt_str[info_ctrl->frmt], info_ctrl->fpath,
+            info_ctrl->addr, info_ctrl->len, val, rv);
+        return -DFD_RV_DEV_FAIL;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "write int info[src=%s frmt=%s pola=%s fpath=%s addr=0x%x len=%d bit_offset=%d val=%d] success\n",
+            g_info_src_str[info_ctrl->src], g_info_frmt_str[info_ctrl->frmt], g_info_pola_str[info_ctrl->pola],
+            info_ctrl->fpath, info_ctrl->addr, info_ctrl->len, info_ctrl->bit_offset, val);
+    return DFD_RV_OK;
+}
+
+static int dfd_info_get_cpld_voltage(int key, uint32_t *value)
+{
+    int rv;
+    uint32_t vol_ref_tmp, vol_ref;
+    uint32_t vol_curr_tmp, vol_curr;
+    info_ctrl_t *info_ctrl;
+    info_ctrl_t info_ctrl_tmp;
+    uint32_t vol_coefficient;
+
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_WARN, "get info ctrl fail, key=0x%08x\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    vol_coefficient = (uint32_t)info_ctrl->int_extra2;
+
+    rv = dfd_get_info_value(info_ctrl, &vol_curr_tmp, NULL);
+    if (rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "get cpld current voltage error, addr:0x%x, rv = %d\n", info_ctrl->addr, rv);
+        return rv;
+    }
+    vol_curr_tmp = DFD_GET_CPLD_VOLATGE_CODE_VALUE(vol_curr_tmp);
+    if (info_ctrl->addr == info_ctrl->int_extra1) {
+        vol_curr = DFD_GET_CPLD_VOLATGE_REAL_VALUE(vol_curr_tmp, vol_coefficient);
+        DBG_DEBUG(DBG_VERBOSE, "current voltage is reference voltage, vol_curr_tmp: 0x%x, coefficient: %u, vol_curr: %u\n",
+            vol_curr_tmp, vol_coefficient, vol_curr);
+    } else {
+        memcpy(&info_ctrl_tmp, info_ctrl, sizeof(info_ctrl_t));
+        info_ctrl_tmp.addr = info_ctrl->int_extra1;
+        rv = dfd_get_info_value(&info_ctrl_tmp, &vol_ref_tmp, NULL);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "get cpld reference voltage error, addr: 0x%x, rv: %d\n", info_ctrl_tmp.addr, rv);
+            return rv;
+        }
+        vol_ref = DFD_GET_CPLD_VOLATGE_CODE_VALUE(vol_ref_tmp);
+        DBG_DEBUG(DBG_VERBOSE, "vol_ref_tmp: 0x%x, vol_ref: 0x%x\n", vol_ref_tmp, vol_ref);
+        vol_curr = (vol_curr_tmp * vol_coefficient) / vol_ref;
+        DBG_DEBUG(DBG_VERBOSE, "vol_curr_tmp: 0x%x, vol_ref: 0x%x, coefficient: %u, vol_curr: %u\n",
+            vol_curr_tmp, vol_ref, vol_coefficient, vol_curr);
+    }
+    *value = vol_curr;
+    return DFD_RV_OK;
+}
+
+static int dfd_info_get_sensor_value(int key, uint8_t *buf, int buf_len, info_hwmon_buf_f pfun)
+{
+    int rv, buf_real_len;
+    uint32_t value;
+    uint8_t buf_tmp[INFO_BUF_MAX_LEN];
+    info_ctrl_t *info_ctrl;
+
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_ERROR, "get info ctrl fail, key=0x%08x\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    if ( DFD_CFG_ITEM_ID(key) == DFD_CFG_ITEM_HWMON_IN && info_ctrl->src == INFO_SRC_CPLD) {
+        rv = dfd_info_get_cpld_voltage(key, &value);
+        if(rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "get cpld voltage failed.key=0x%08x, rv:%d\n", key, rv);
+            return -DFD_RV_DEV_NOTSUPPORT;
+        }
+        DBG_DEBUG(DBG_VERBOSE, "get cpld voltage ok, value:%u\n", value);
+        mem_clear(buf_tmp, sizeof(buf_tmp));
+        snprintf(buf_tmp, sizeof(buf_tmp), "%u\n", value);
+        buf_real_len = strlen(buf_tmp);
+        if(buf_len <= buf_real_len) {
+            DBG_DEBUG(DBG_ERROR, "length not enough.buf_len:%d,need length:%d\n", buf_len, buf_real_len);
+            return -DFD_RV_DEV_FAIL;
+        }
+        if (pfun) {
+            buf_real_len = buf_len;
+            rv = pfun(buf_tmp, strlen(buf_tmp), buf, &buf_real_len, info_ctrl);
+            if (rv < 0) {
+                DBG_DEBUG(DBG_ERROR, "deal date error.org value:%s, buf_len:%d, rv=%d\n",
+                    buf_tmp, buf_len, rv);
+                return -DFD_RV_DEV_NOTSUPPORT;
+            }
+        } else {
+            memcpy(buf, buf_tmp, buf_real_len);
+        }
+        return buf_real_len;
+    }
+
+    DBG_DEBUG(DBG_ERROR, "not support mode. key:0x%08x\n", key);
+    return -DFD_RV_MODE_NOTSUPPORT;
+}
+
+int dfd_info_get_sensor(uint32_t key, char *buf, int buf_len, info_hwmon_buf_f pfun)
+{
+    info_ctrl_t *key_info_ctrl;
+    int rv;
+
+    if (!DFD_CFG_ITEM_IS_INFO_CTRL(DFD_CFG_ITEM_ID(key)) ||
+        (buf == NULL) || buf_len <= 0) {
+        DBG_DEBUG(DBG_ERROR, "input arguments error, key_path=0x%08x, buf_len:%d.\n",
+            key, buf_len);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    key_info_ctrl = dfd_ko_cfg_get_item(key);
+    if (key_info_ctrl == NULL) {
+        DBG_DEBUG(DBG_ERROR, "key_path info error, key=0x%08x\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    mem_clear(buf, buf_len);
+
+    if (key_info_ctrl->mode == INFO_CTRL_MODE_SRT_CONS) {
+        snprintf(buf, buf_len, "%s\n", key_info_ctrl->str_cons);
+        DBG_DEBUG(DBG_VERBOSE, "get sensor value through string config, key=0x%08x, value:%s\n", key, buf);
+        return strlen(buf);
+    }
+
+    if (key_info_ctrl->mode == INFO_CTRL_MODE_CFG && key_info_ctrl->src == INFO_SRC_FILE) {
+        DBG_DEBUG(DBG_VERBOSE, "get sensor value through hwmon, key:0x%08x\n", key);
+        rv = dfd_2key_info_get_buf(key_info_ctrl, buf, buf_len, pfun);
+        if (rv < 0) {
+            DBG_DEBUG(DBG_VERBOSE, "get sensor value through hwmon failed, key:0x%08x, rv:%d\n", key, rv);
+        }
+        return rv;
+    }
+    rv = dfd_info_get_sensor_value(key, buf, buf_len, pfun);
+    if( rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "get sensor value failed, key=0x%08x, rv:%d.\n", key, rv);
+    }
+    return rv;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_listnode.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_listnode.c
new file mode 100644
index 000000000000..d6fd7e104c9f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_listnode.c
@@ -0,0 +1,82 @@
+#include <linux/list.h>
+#include <linux/slab.h>
+
+#include "../include/dfd_cfg_listnode.h"
+#include "../../dev_sysfs/include/sysfs_common.h"
+
+void *lnode_find_node(lnode_root_t *root, int key)
+{
+    lnode_node_t *lnode;
+
+    if (root == NULL){
+        return NULL;
+    }
+
+    list_for_each_entry(lnode, &(root->root), lst) {
+        if (lnode->key == key) {
+            return lnode->data;
+        }
+    }
+
+    return NULL;
+}
+
+int lnode_insert_node(lnode_root_t *root, int key, void *data)
+{
+    lnode_node_t *lnode;
+    void *data_tmp;
+
+    if ((root == NULL) || (data == NULL)) {
+        return LNODE_RV_INPUT_ERR;
+    }
+
+    data_tmp = lnode_find_node(root, key);
+    if (data_tmp != NULL) {
+        return LNODE_RV_NODE_EXIST;
+    }
+
+    lnode = kmalloc(sizeof(lnode_node_t), GFP_KERNEL);
+    if (lnode == NULL) {
+        return LNODE_RV_NOMEM;
+    }
+
+    lnode->key = key;
+    lnode->data = data;
+    list_add_tail(&(lnode->lst), &(root->root));
+
+    return LNODE_RV_OK;
+}
+
+int lnode_init_root(lnode_root_t *root)
+{
+    if (root == NULL) {
+        return LNODE_RV_INPUT_ERR;
+    }
+
+    INIT_LIST_HEAD(&(root->root));
+
+    return LNODE_RV_OK;
+}
+
+void lnode_free_list(lnode_root_t *root)
+{
+    lnode_node_t *lnode, *lnode_next;
+
+    if (root == NULL){
+        return ;
+    }
+
+    list_for_each_entry_safe(lnode, lnode_next, &(root->root), lst) {
+        if ( lnode->data ) {
+            kfree(lnode->data);
+            lnode->data = NULL;
+            lnode->key = 0;
+        }
+        list_del(&lnode->lst);
+        kfree(lnode);
+        lnode = NULL;
+    }
+
+    return ;
+
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_fan_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_fan_driver.c
new file mode 100644
index 000000000000..efc322046c07
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_fan_driver.c
@@ -0,0 +1,170 @@
+#include <linux/module.h>
+#include <linux/slab.h>
+
+#include "./include/dfd_module.h"
+#include "./include/dfd_cfg.h"
+#include "./include/dfd_cfg_adapter.h"
+#include "./include/dfd_cfg_info.h"
+#include "../dev_sysfs/include/sysfs_common.h"
+
+#define FAN_SIZE                          (256)
+
+int g_dfd_fan_dbg_level = 0;
+module_param(g_dfd_fan_dbg_level, int, S_IRUGO | S_IWUSR);
+
+int dfd_get_fan_roll_status(unsigned int fan_index, unsigned int motor_index)
+{
+    int key, ret;
+    int status;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_ROLL_STATUS, fan_index, motor_index);
+    ret = dfd_info_get_int(key, &status, NULL);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "get fan roll status error, fan:%d,motor:%d\n",
+            fan_index, motor_index);
+        return ret;
+    }
+
+    DFD_FAN_DEBUG(DBG_VERBOSE, "fan%u motor%u get fan roll status success, status:%d.\n",
+        fan_index, motor_index, status);
+    return status;
+}
+
+int dfd_get_fan_present_status(unsigned int fan_index)
+{
+    int key, ret;
+    int status;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_DEV_PRESENT_STATUS, WB_MAIN_DEV_FAN, fan_index);
+    ret = dfd_info_get_int(key, &status, NULL);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan%u get present status error, key:0x%x\n", fan_index, key);
+        return ret;
+    }
+
+    DFD_FAN_DEBUG(DBG_VERBOSE, "fan%u get present status success, status:%d.\n", fan_index, status);
+    return status;
+}
+
+ssize_t dfd_get_fan_speed(unsigned int fan_index, unsigned int motor_index,unsigned int *speed)
+{
+    int key, ret, speed_tmp;
+
+    if (speed == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "param error. fan index:%d, motor index:%d.\n",
+            fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_SPEED, fan_index, motor_index);
+    ret = dfd_info_get_int(key, &speed_tmp, NULL);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "get fan speed error, key:0x%x,ret:%d\n",key, ret);
+        return ret;
+    }
+
+    if (speed_tmp == 0 || speed_tmp == 0xffff) {
+        *speed = 0;
+    } else {
+        *speed = 15000000 / speed_tmp;
+    }
+    return DFD_RV_OK;
+}
+
+int dfd_set_fan_speed_level(unsigned int fan_index, unsigned int motor_index, int level)
+{
+    int key, ret;
+
+    if (level < 0 || level > 0xff) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan:%u, motor:%u, can not set fan speed level: %d.\n",
+            fan_index, motor_index, level);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_RATIO, fan_index, motor_index);
+    ret = dfd_info_set_int(key, level);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan:%u, motor:%u, set fan level 0x%02x error, key:0x%x,ret:%d\n",
+            fan_index, motor_index, level, key, ret);
+        return ret;
+    }
+
+    DFD_FAN_DEBUG(DBG_VERBOSE, "fan:%u, motor:%u, set fan speed level 0x%02x success.\n",
+        fan_index, motor_index, level);
+    return DFD_RV_OK;
+}
+
+int dfd_set_fan_pwm(unsigned int fan_index, unsigned int motor_index, int pwm)
+{
+    int ret, data;
+
+    if (pwm < 0 || pwm > 100) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan:%u, motor:%u, can't set pwm: %d.\n",
+            fan_index, motor_index, pwm);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    data = pwm * 255 / 100;
+    ret = dfd_set_fan_speed_level(fan_index, motor_index, data);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan:%u, motor:%u, set fan ratio:%d error, ret:%d\n",
+            fan_index, motor_index, data, ret);
+        return ret;
+    }
+
+    DFD_FAN_DEBUG(DBG_VERBOSE, "fan:%u, motor:%u, set fan ratio %d success.\n",
+        fan_index, motor_index, data);
+    return DFD_RV_OK;
+}
+
+int dfd_get_fan_speed_level(unsigned int fan_index, unsigned int motor_index, int *level)
+{
+    int key, ret, speed_level;
+
+    if (level == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "param error. fan index:%d, motor index:%d.\n",
+            fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_FAN_RATIO, fan_index, motor_index);
+    ret = dfd_info_get_int(key, &speed_level, NULL);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan:%u, motor:%u, get fan speed level error, key:0x%x,ret:%d\n",
+            fan_index, motor_index, key, ret);
+        return ret;
+    }
+
+    DFD_FAN_DEBUG(DBG_VERBOSE, "fan:%u, motor:%u, get fan speed level success, value:0x%02x.\n",
+        fan_index, motor_index, speed_level);
+    *level = speed_level;
+    return DFD_RV_OK;
+}
+
+int dfd_get_fan_pwm(unsigned int fan_index, unsigned int motor_index, int *pwm)
+{
+    int ret, level;
+
+    if (pwm == NULL) {
+        DFD_FAN_DEBUG(DBG_ERROR, "param error. fan index:%d, motor index:%d.\n",
+            fan_index, motor_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    ret = dfd_get_fan_speed_level(fan_index, motor_index, &level);
+    if (ret < 0) {
+        DFD_FAN_DEBUG(DBG_ERROR, "fan:%u, motor:%u, get fan pwm error, ret:%d\n",
+            fan_index, motor_index, ret);
+        return ret;
+    }
+
+    if ((level * 100) % 255 > 0) {
+        *pwm = level * 100 / 255 + 1;
+    } else {
+        *pwm = level * 100 / 255;
+    }
+
+    DFD_FAN_DEBUG(DBG_VERBOSE, "fan:%u, motor:%u, get fan pwm success, value:%d.\n",
+        fan_index, motor_index, *pwm);
+    return DFD_RV_OK;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_module.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_module.c
new file mode 100644
index 000000000000..9e5b00b795de
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_module.c
@@ -0,0 +1,95 @@
+#include <linux/module.h>
+
+#include "../dev_sysfs/include/sysfs_common.h"
+#include "./include/dfd_module.h"
+#include "./include/dfd_cfg.h"
+#include "./include/dfd_fan_driver.h"
+#include "./include/dfd_slot_driver.h"
+#include "./include/dfd_sensors_driver.h"
+#include "./include/dfd_psu_driver.h"
+#include "./include/dfd_sff_driver.h"
+
+typedef enum dfd_dev_init_fail_s {
+    DFD_KO_INIT_CPLD_FAIL       = 1,
+    DFD_KO_INIT_FPGA_FAIL       = 2,
+    DFD_KO_INIT_IRQ_FAIL        = 3,
+    DFD_KO_INIT_CFG_FAIL        = 4,
+    DFD_KO_INIT_DATA_FAIL       = 5,
+} dfd_dev_init_fail_t;
+
+int g_dfd_dbg_level = 0;
+
+int dfd_get_dev_number(unsigned int main_dev_id, unsigned int minor_dev_id)
+{
+    int key,dev_num;
+    int *p_dev_num;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_DEV_NUM, main_dev_id, minor_dev_id);
+    p_dev_num = dfd_ko_cfg_get_item(key);
+    if (p_dev_num == NULL) {
+        DBG_DEBUG(DBG_ERROR, "get device number failed, key:0x%x\n",key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+    dev_num = *p_dev_num;
+    DBG_DEBUG(DBG_VERBOSE, "get device number ok, number:%d\n",dev_num);
+    return dev_num;
+}
+
+static struct switch_drivers_t switch_drivers= {
+    .get_dev_number = dfd_get_dev_number,
+    /* fan */
+    .get_fan_speed = dfd_get_fan_speed,
+    .get_fan_pwm = dfd_get_fan_pwm,
+    .set_fan_pwm = dfd_set_fan_pwm,
+    .get_fan_present_status = dfd_get_fan_present_status,
+    .get_fan_roll_status = dfd_get_fan_roll_status,
+    .get_fan_speed_level = dfd_get_fan_speed_level,
+    .set_fan_speed_level = dfd_set_fan_speed_level,
+    /* slot */
+    .get_slot_present_status = dfd_get_slot_present_status,
+    /* sensors */
+    .get_temp_info = dfd_get_temp_info,
+    .get_voltage_info = dfd_get_voltage_info,
+    /* psu */
+    .get_psu_present_status = dfd_get_psu_present_status,
+    .get_psu_output_status = dfd_get_psu_output_status,
+    .get_psu_alert_status = dfd_get_psu_alert_status,
+    /* sff */
+    .get_sff_cpld_info = dfd_get_sff_cpld_info,
+    .get_sff_dir_name = dfd_get_sff_dir_name,
+};
+
+struct switch_drivers_t * dfd_plat_driver_get(void) {
+    return &switch_drivers;
+}
+
+static int32_t __init dfd_dev_init(void)
+{
+    int ret;
+
+    DBG_DEBUG(DBG_VERBOSE, "Enter.\n");
+
+    ret = dfd_dev_cfg_init();
+    if (ret != 0) {
+        DBG_DEBUG(DBG_ERROR, "dfd_dev_cfg_init failed ret %d.\n", ret);
+        ret = -DFD_KO_INIT_CFG_FAIL;
+        return ret;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "success.\n");
+    return 0;
+}
+
+static void __exit dfd_dev_exit(void)
+{
+    DBG_DEBUG(DBG_VERBOSE, "dfd_dev_exit.\n");
+    dfd_dev_cfg_exit();
+    return ;
+}
+
+module_init(dfd_dev_init);
+module_exit(dfd_dev_exit);
+module_param(g_dfd_dbg_level, int, S_IRUGO | S_IWUSR);
+EXPORT_SYMBOL(dfd_plat_driver_get);
+MODULE_AUTHOR("support");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_psu_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_psu_driver.c
new file mode 100644
index 000000000000..55e2e4339ae7
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_psu_driver.c
@@ -0,0 +1,70 @@
+#include <linux/module.h>
+#include <linux/slab.h>
+
+#include "./include/dfd_module.h"
+#include "./include/dfd_cfg.h"
+#include "./include/dfd_cfg_adapter.h"
+#include "./include/dfd_cfg_info.h"
+#include "../dev_sysfs/include/sysfs_common.h"
+
+#define PSU_SIZE                         (256)
+
+typedef enum dfd_psu_status_e {
+    DFD_PSU_PRESENT_STATUS  = 0,
+    DFD_PSU_OUTPUT_STATUS   = 1,
+    DFD_PSU_ALERT_STATUS    = 2,
+} dfd_psu_status_t;
+
+int g_dfd_psu_dbg_level = 0;
+module_param(g_dfd_psu_dbg_level, int, S_IRUGO | S_IWUSR);
+
+int dfd_get_psu_present_status(unsigned int psu_index)
+{
+    int ret, present_key, present_status;
+
+    present_key = DFD_CFG_KEY(DFD_CFG_ITEM_PSU_STATUS, psu_index, DFD_PSU_PRESENT_STATUS);
+    ret = dfd_info_get_int(present_key, &present_status, NULL);
+    if (ret < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "dfd_get_psu_present_status error. psu_index:%d, ret:%d\n",
+            psu_index, ret);
+        return ret;
+    }
+
+    DFD_PSU_DEBUG(DBG_VERBOSE, "dfd_get_psu_present_status success. psu_index:%d, status:%d\n",
+        psu_index, present_status);
+    return present_status;
+}
+
+int dfd_get_psu_output_status(unsigned int psu_index)
+{
+    int ret, output_key, output_status;
+
+    output_key = DFD_CFG_KEY(DFD_CFG_ITEM_PSU_STATUS, psu_index, DFD_PSU_OUTPUT_STATUS);
+    ret = dfd_info_get_int(output_key, &output_status, NULL);
+    if (ret < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "dfd_get_psu_output_status error. psu_index:%d, ret:%d\n",
+            psu_index, ret);
+        return ret;
+    }
+
+    DFD_PSU_DEBUG(DBG_VERBOSE, "dfd_get_psu_output_status success. psu_index:%d, status:%d\n",
+        psu_index, output_status);
+    return output_status;
+}
+
+int dfd_get_psu_alert_status(unsigned int psu_index)
+{
+    int ret, alert_key, alert_status;
+
+    alert_key = DFD_CFG_KEY(DFD_CFG_ITEM_PSU_STATUS, psu_index, DFD_PSU_ALERT_STATUS);
+    ret = dfd_info_get_int(alert_key, &alert_status, NULL);
+    if (ret < 0) {
+        DFD_PSU_DEBUG(DBG_ERROR, "dfd_get_psu_alert_status error. psu_index:%d, ret:%d\n",
+            psu_index, ret);
+        return ret;
+    }
+
+    DFD_PSU_DEBUG(DBG_VERBOSE, "dfd_get_psu_alert_status success. psu_index:%d, status:%d\n",
+        psu_index, alert_status);
+    return alert_status;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_sensors_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_sensors_driver.c
new file mode 100644
index 000000000000..bfca20290efb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_sensors_driver.c
@@ -0,0 +1,149 @@
+#include <linux/module.h>
+#include <linux/slab.h>
+
+#include "./include/dfd_module.h"
+#include "./include/dfd_cfg.h"
+#include "./include/dfd_cfg_adapter.h"
+#include "./include/dfd_cfg_info.h"
+#include "./include/dfd_cfg_file.h"
+#include "../dev_sysfs/include/sysfs_common.h"
+
+#define DFD_GET_TEMP_SENSOR_KEY1(dev_index, temp_index) \
+    (((dev_index & 0xff) << 8) | (temp_index & 0xff))
+#define DFD_GET_TEMP_SENSOR_KEY2(main_dev_id, temp_type) \
+        (((main_dev_id & 0x0f) << 4) | (temp_type & 0x0f))
+#define DFD_FORMAT_STR_MAX_LEN          (32)
+
+int g_dfd_sensor_dbg_level = 0;
+module_param(g_dfd_sensor_dbg_level, int, S_IRUGO | S_IWUSR);
+
+static int dfd_deal_hwmon_buf(uint8_t *buf, int buf_len, uint8_t *buf_new, int *buf_len_new, info_ctrl_t *info_ctrl)
+{
+    int i, tmp_len;
+    int exp, decimal, divisor;
+    int org_value, tmp_value;
+    int div_result, div_mod;
+    char fmt_str[DFD_FORMAT_STR_MAX_LEN];
+
+    exp = info_ctrl->int_cons;
+    decimal = info_ctrl->bit_offset;
+
+    if (exp <= 0) {
+        DBG_DEBUG(DBG_VERBOSE, "exponent %d, don't need transform. buf_len:%d, buf_len_new:%d\n",
+            exp, buf_len, *buf_len_new);
+        snprintf(buf_new, *buf_len_new, "%s", buf);
+        *buf_len_new = strlen(buf_new);
+        return DFD_RV_OK;
+    }
+    divisor = 1;
+    for (i = 0; i < exp; i++) {
+        divisor *= 10;
+    }
+    org_value = simple_strtol(buf, NULL, 10);
+    if (org_value < 0) {
+        tmp_value = 0 - org_value;
+    } else {
+        tmp_value = org_value;
+    }
+    div_result = tmp_value / divisor;
+    div_mod = tmp_value % divisor;
+    DBG_DEBUG(DBG_VERBOSE, "exp:%d, decimal:%d, original value:%d, divisor:%d, result :%d, mod:%d\n",
+        exp, decimal, org_value, divisor, div_result, div_mod);
+
+    mem_clear(fmt_str, sizeof(fmt_str));
+    if (org_value < 0) {
+        snprintf(fmt_str, sizeof(fmt_str), "-%%d.%%0%dd\n",exp);
+    } else {
+        snprintf(fmt_str, sizeof(fmt_str), "%%d.%%0%dd\n",exp);
+    }
+    DBG_DEBUG(DBG_VERBOSE, "format string:%s",fmt_str);
+    snprintf(buf_new, *buf_len_new, fmt_str, div_result, div_mod);
+    *buf_len_new = strlen(buf_new);
+    tmp_len = *buf_len_new;
+
+    if ( decimal > 0) {
+        for(i = 0; i < *buf_len_new; i++) {
+            if (buf_new[i] == '.') {
+                if( i + decimal + 2 <= *buf_len_new ) {
+                    buf_new[i + decimal + 1 ] = '\n';
+                    buf_new[i + decimal + 2 ] = '\0';
+                    *buf_len_new = strlen(buf_new);
+                    DBG_DEBUG(DBG_VERBOSE, "deal decimal[%d] ok, str len:%d, value:%s\n",
+                        decimal, *buf_len_new, buf_new);
+                }
+                break;
+            }
+        }
+        if (tmp_len == *buf_len_new) {
+            DBG_DEBUG(DBG_WARN, "deal decimal[%d] failed, use original value:%s\n", decimal, buf_new);
+        }
+    }
+    return DFD_RV_OK;
+}
+
+static int dfd_get_sensor_info(uint8_t main_dev_id, uint8_t dev_index, uint8_t sensor_type,
+            uint8_t sensor_index, uint8_t sensor_attr, char *buf)
+{
+    uint32_t key;
+    uint16_t key_index1;
+    uint8_t key_index2;
+    int rv;
+    info_hwmon_buf_f pfunc;
+
+    key_index1 = DFD_GET_TEMP_SENSOR_KEY1(dev_index, sensor_index);
+    key_index2 = DFD_GET_TEMP_SENSOR_KEY2(main_dev_id, sensor_attr);
+    if (sensor_type == WB_MINOR_DEV_TEMP ) {
+        key = DFD_CFG_KEY(DFD_CFG_ITEM_HWMON_TEMP, key_index1, key_index2);
+    } else if (sensor_type == WB_MINOR_DEV_IN) {
+        key = DFD_CFG_KEY(DFD_CFG_ITEM_HWMON_IN, key_index1, key_index2);
+    } else {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "unknow sensor type:%d.\n",sensor_type);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    DFD_SENSOR_DEBUG(DBG_VERBOSE, "get sensor info.main_dev_id:%d, dev_index:0x%x, sensor_index:0x%x, sensor_attr:0x%x, key:0x%x,\n",
+        main_dev_id, dev_index, sensor_index, sensor_attr, key);
+
+    pfunc = dfd_deal_hwmon_buf;
+    mem_clear(buf, PAGE_SIZE);
+    rv = dfd_info_get_sensor(key, buf, PAGE_SIZE, pfunc);
+    return rv;
+}
+
+ssize_t dfd_get_temp_info(uint8_t main_dev_id, uint8_t dev_index,
+            uint8_t temp_index, uint8_t temp_attr, char *buf)
+{
+    int rv;
+
+    if (buf == NULL) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "param error. buf is NULL.\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    rv = dfd_get_sensor_info(main_dev_id, dev_index, WB_MINOR_DEV_TEMP, temp_index, temp_attr, buf);
+    if (rv < 0) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "get temp info error. rv:%d\n", rv);
+    } else {
+        DFD_SENSOR_DEBUG(DBG_VERBOSE, "get temp info ok.value:%s\n", buf);
+    }
+    return rv;
+}
+
+ssize_t dfd_get_voltage_info(uint8_t main_dev_id, uint8_t dev_index,
+            uint8_t in_index, uint8_t in_attr, char *buf)
+{
+    int rv;
+
+    if (buf == NULL) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "param error. buf is NULL.\n");
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    rv = dfd_get_sensor_info(main_dev_id, dev_index, WB_MINOR_DEV_IN, in_index, in_attr, buf);
+    if (rv < 0) {
+        DFD_SENSOR_DEBUG(DBG_ERROR, "get voltage info error. rv:%d\n", rv);
+    } else {
+        DFD_SENSOR_DEBUG(DBG_VERBOSE, "get voltage info ok.value:%s\n", buf);
+    }
+    return rv;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_sff_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_sff_driver.c
new file mode 100644
index 000000000000..5c1faff975b1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_sff_driver.c
@@ -0,0 +1,56 @@
+#include <linux/module.h>
+
+#include "./include/dfd_module.h"
+#include "./include/dfd_cfg.h"
+#include "./include/dfd_cfg_info.h"
+#include "./include/dfd_cfg_adapter.h"
+#include "../dev_sysfs/include/sysfs_common.h"
+
+int g_dfd_sff_dbg_level = 0;
+module_param(g_dfd_sff_dbg_level, int, S_IRUGO | S_IWUSR);
+
+ssize_t dfd_get_sff_cpld_info(unsigned int sff_index, int cpld_reg_type, char *buf, int len)
+{
+    int key, ret, value;
+
+    if(buf == NULL) {
+        DFD_SFF_DEBUG(DBG_ERROR, "param error, buf is NULL. sff_index:%d, cpld_reg_type:%d.\n",
+            sff_index, cpld_reg_type);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_SFF_CPLD_REG, sff_index, cpld_reg_type);
+    ret = dfd_info_get_int(key, &value, NULL);
+    if (ret < 0) {
+        DFD_SFF_DEBUG(DBG_ERROR, "get sff cpld reg error, key:0x%x,ret:%d.\n", key, ret);
+        return ret;
+    }
+
+    mem_clear(buf, len);
+    return (ssize_t)snprintf(buf, len, "%d\n", value);
+}
+
+ssize_t dfd_get_sff_dir_name(unsigned int sff_index, char *buf, int buf_len)
+{
+    int key;
+    char *sff_dir_name;
+
+    if (buf == NULL) {
+        DFD_SFF_DEBUG(DBG_ERROR, "param error. buf is NULL.sff index:%d", sff_index);
+        return -DFD_RV_INVALID_VALUE;
+    }
+
+    mem_clear(buf, buf_len);
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_SFF_DIR_NAME, sff_index, 0);
+    sff_dir_name = dfd_ko_cfg_get_item(key);
+    if (sff_dir_name == NULL) {
+        DFD_SFF_DEBUG(DBG_ERROR, "sff dir name config error, key=0x%08x\n", key);
+        return -DFD_RV_NODE_FAIL;
+    }
+
+    DFD_SFF_DEBUG(DBG_VERBOSE, "%s\n", sff_dir_name);
+    snprintf(buf, buf_len, "%s", sff_dir_name);
+    return strlen(buf);
+
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_slot_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_slot_driver.c
new file mode 100644
index 000000000000..69c82adabef0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_slot_driver.c
@@ -0,0 +1,27 @@
+#include <linux/module.h>
+#include <linux/slab.h>
+
+#include "./include/dfd_module.h"
+#include "./include/dfd_cfg.h"
+#include "./include/dfd_cfg_adapter.h"
+#include "./include/dfd_cfg_info.h"
+#include "../dev_sysfs/include/sysfs_common.h"
+
+#define SLOT_SIZE                         (256)
+
+int g_dfd_slot_dbg_level = 0;
+module_param(g_dfd_slot_dbg_level, int, S_IRUGO | S_IWUSR);
+
+int dfd_get_slot_present_status(unsigned int slot_index)
+{
+    int key, ret;
+    int status;
+
+    key = DFD_CFG_KEY(DFD_CFG_ITEM_DEV_PRESENT_STATUS, WB_MAIN_DEV_SLOT, slot_index);
+    ret = dfd_info_get_int(key, &status, NULL);
+    if (ret < 0) {
+        DFD_SLOT_DEBUG(DBG_ERROR, "get slot status error, key:0x%x\n",key);
+        return ret;
+    }
+    return status;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg.h
new file mode 100644
index 000000000000..062654d01504
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg.h
@@ -0,0 +1,97 @@
+#ifndef __DFD_CFG_H__
+#define __DFD_CFG_H__
+
+#include <linux/list.h>
+
+#define DFD_KO_CFG_FILE_NAME     "/etc/plat_sysfs_cfg/cfg_file_name"
+#define DFD_KO_CFG_FILE_DIR      "/etc/plat_sysfs_cfg/"
+#define DFD_PUB_CARDTYPE_FILE    "/sys/module/platform_common/parameters/dfd_my_type"
+
+#define DFD_CFG_CMDLINE_MAX_LEN (256)
+#define DFD_CFG_NAME_MAX_LEN    (256)
+#define DFD_CFG_VALUE_MAX_LEN   (256)
+#define DFD_CFG_STR_MAX_LEN     (64)
+#define DFD_CFG_CPLD_NUM_MAX    (16)
+#define DFD_PRODUCT_ID_LENGTH   (8)
+#define DFD_PID_BUF_LEN         (32)
+#define DFD_TEMP_NAME_BUF_LEN   (32)
+
+#define DFD_CFG_EMPTY_VALUE     (-1)
+#define DFD_CFG_INVALID_VALUE   (0)
+
+#define DFD_CFG_KEY(item, index1, index2) \
+    ((((item) & 0xff) << 24) | (((index1) & 0xffff) << 8) | ((index2) & 0xff))
+#define DFD_CFG_ITEM_ID(key)    (((key) >> 24) & 0xff)
+#define DFD_CFG_INDEX1(key)     (((key) >> 8) & 0xffff)
+#define DFD_CFG_INDEX2(key)     ((key)& 0xff)
+
+#define INDEX_NOT_EXIST     (-1)
+#define INDEX1_MAX           (0xffff)
+#define INDEX2_MAX           (0xff)
+
+#define DFD_CFG_ITEM_ALL \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_NONE, "none", INDEX_NOT_EXIST, INDEX_NOT_EXIST)                       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_DEV_NUM, "dev_num", INDEX1_MAX, INDEX2_MAX)                           \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_CPLD_LPC_DEV, "cpld_lpc_dev", INDEX1_MAX, DFD_CFG_CPLD_NUM_MAX)       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_INT_END, "end_int", INDEX_NOT_EXIST, INDEX_NOT_EXIST)                 \
+                                                                                                    \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_CPLD_MODE, "mode_cpld", INDEX1_MAX, DFD_CFG_CPLD_NUM_MAX)             \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_SFF_DIR_NAME, "sff_dir_name", INDEX1_MAX, INDEX_NOT_EXIST)            \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_STRING_END, "end_string", INDEX_NOT_EXIST, INDEX_NOT_EXIST)           \
+                                                                                                    \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_CPLD_I2C_DEV, "cpld_i2c_dev", INDEX1_MAX, INDEX2_MAX)                 \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_OTHER_I2C_DEV, "other_i2c_dev", INDEX1_MAX, INDEX2_MAX)               \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_I2C_DEV_END, "end_i2c_dev", INDEX_NOT_EXIST, INDEX_NOT_EXIST)         \
+                                                                                                    \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FAN_ROLL_STATUS, "fan_roll_status", INDEX1_MAX, INDEX2_MAX)           \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FAN_SPEED, "fan_speed", INDEX1_MAX, INDEX2_MAX)                       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_FAN_RATIO, "fan_ratio", INDEX1_MAX, INDEX2_MAX)                       \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_DEV_PRESENT_STATUS, "dev_present_status", INDEX1_MAX, INDEX2_MAX)     \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_PSU_STATUS, "psu_status", INDEX1_MAX, INDEX2_MAX)                     \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_HWMON_TEMP, "hwmon_temp", INDEX1_MAX, INDEX2_MAX)                     \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_HWMON_IN, "hwmon_in", INDEX1_MAX, INDEX2_MAX)                         \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_SFF_CPLD_REG, "sff_cpld_reg", INDEX1_MAX, INDEX2_MAX)                 \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_INFO_CTRL_END, "end_info_ctrl", INDEX_NOT_EXIST, INDEX_NOT_EXIST)     \
+
+#ifdef DFD_CFG_ITEM
+#undef DFD_CFG_ITEM
+#endif
+#define DFD_CFG_ITEM(_id, _name, _index_min, _index_max)    _id,
+typedef enum dfd_cfg_item_id_s {
+    DFD_CFG_ITEM_ALL
+} dfd_cfg_item_id_t;
+
+#define DFD_CFG_ITEM_IS_INT(item_id) \
+    (((item_id) > DFD_CFG_ITEM_NONE) && ((item_id) < DFD_CFG_ITEM_INT_END))
+
+#define DFD_CFG_ITEM_IS_STRING(item_id) \
+    (((item_id) > DFD_CFG_ITEM_INT_END) && ((item_id) < DFD_CFG_ITEM_STRING_END))
+
+#define DFD_CFG_ITEM_IS_I2C_DEV(item_id) \
+    (((item_id) > DFD_CFG_ITEM_STRING_END) && ((item_id) < DFD_CFG_ITEM_I2C_DEV_END))
+
+#define DFD_CFG_ITEM_IS_INFO_CTRL(item_id) \
+    (((item_id) > DFD_CFG_ITEM_I2C_DEV_END) && ((item_id) < DFD_CFG_ITEM_INFO_CTRL_END))
+
+typedef struct index_range_s {
+    int index1_max;
+    int index2_max;
+} index_range_t;
+
+typedef struct val_convert_node_s {
+    struct list_head lst;
+    int int_val;
+    char str_val[DFD_CFG_STR_MAX_LEN];
+    int index1;
+    int index2;
+} val_convert_node_t;
+
+void *dfd_ko_cfg_get_item(int key);
+
+void dfd_ko_cfg_show_item(int key);
+
+int32_t dfd_dev_cfg_init(void);
+
+void dfd_dev_cfg_exit(void);
+
+#endif /* __DFD_CFG_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_adapter.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_adapter.h
new file mode 100644
index 000000000000..70d8b536c437
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_adapter.h
@@ -0,0 +1,46 @@
+#ifndef __DFD_CFG_ADAPTER_H__
+#define __DFD_CFG_ADAPTER_H__
+
+#define DFD_KO_CPLD_I2C_RETRY_SLEEP            (10)  /* ms */
+#define DFD_KO_CPLD_I2C_RETRY_TIMES            (50 / DFD_KO_CPLD_I2C_RETRY_SLEEP)
+
+#define DFD_KO_CPLD_GET_SLOT(addr)             ((addr >> 24) & 0xff)
+#define DFD_KO_CPLD_GET_ID(addr)               ((addr >> 16) & 0xff)
+#define DFD_KO_CPLD_GET_INDEX(addr)            (addr & 0xffff)
+#define DFD_KO_CPLD_MODE_I2C_STRING            "i2c"
+#define DFD_KO_CPLD_MODE_LPC_STRING            "lpc"
+
+typedef struct dfd_i2c_dev_s {
+    int bus;
+    int addr;
+} dfd_i2c_dev_t;
+
+typedef enum dfd_i2c_dev_mem_s {
+    DFD_I2C_DEV_MEM_BUS,
+    DFD_I2C_DEV_MEM_ADDR,
+    DFD_I2C_DEV_MEM_END
+} dfd_i2c_dev_mem_t;
+
+typedef enum cpld_mode_e {
+    DFD_CPLD_MODE_I2C,
+    DFD_CPLD_MODE_LPC,
+} cpld_mode_t;
+
+typedef enum i2c_mode_e {
+    DFD_I2C_MODE_NORMAL_I2C,
+    DFD_I2C_MODE_SMBUS,
+} i2c_mode_t;
+
+extern char *g_dfd_i2c_dev_mem_str[DFD_I2C_DEV_MEM_END];
+
+int32_t dfd_ko_cpld_read(int32_t addr, uint8_t *buf);
+
+int32_t dfd_ko_cpld_write(int32_t addr, uint8_t val);
+
+int32_t dfd_ko_i2c_read(int bus, int addr, int offset, uint8_t *buf, uint32_t size);
+
+int32_t dfd_ko_i2c_write(int bus, int addr, int offset, uint8_t *buf, uint32_t size);
+
+int32_t dfd_ko_read_file(char *fpath, int32_t addr, uint8_t *val, int32_t read_bytes);
+
+#endif /* __DFD_CFG_ADAPTER_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_file.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_file.h
new file mode 100644
index 000000000000..50d7a42d5564
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_file.h
@@ -0,0 +1,37 @@
+#ifndef __DFD_CFG_FILE_H__
+#define __DFD_CFG_FILE_H__
+
+#include <linux/types.h>
+
+#define KFILE_RV_OK             (0)
+#define KFILE_RV_INPUT_ERR      (-1)
+#define KFILE_RV_STAT_FAIL      (-2)
+#define KFILE_RV_OPEN_FAIL      (-3)
+#define KFILE_RV_MALLOC_FAIL    (-4)
+#define KFILE_RV_RD_FAIL        (-5)
+#define KFILE_RV_ADDR_ERR       (-6)
+#define KFILE_RV_WR_FAIL        (-7)
+
+#define IS_CR(c)  ((c) == '\n')
+
+typedef struct kfile_ctrl_s {
+    int32_t size;
+    int32_t pos;
+    char *buf;
+} kfile_ctrl_t;
+
+int kfile_open(char *fname, kfile_ctrl_t *kfile_ctrl);
+
+void kfile_close(kfile_ctrl_t *kfile_ctrl);
+
+int kfile_gets(char *buf, int buf_size, kfile_ctrl_t *kfile_ctrl);
+
+int kfile_read(int32_t addr, char *buf, int buf_size, kfile_ctrl_t *kfile_ctrl);
+
+int kfile_iterate_dir(const char *dir_path, const char *obj_name, char *match_name, int len);
+
+#if 0
+
+int kfile_write(char *fpath, int32_t addr, char *buf, int buf_size);
+#endif
+#endif /* __DFD_CFG_FILE_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h
new file mode 100644
index 000000000000..dc1ed17651b9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h
@@ -0,0 +1,109 @@
+#ifndef __DFD_CFG_INFO_H__
+#define __DFD_CFG_INFO_H__
+
+#include <linux/types.h>
+
+typedef int (*info_num_buf_to_value_f)(uint8_t *num_buf, int buf_len, int *num_val);
+
+typedef int (*info_buf_to_buf_f)(uint8_t *buf, int buf_len, uint8_t *buf_new, int *buf_len_new);
+
+#define IS_INFO_FRMT_BIT(frmt)      ((frmt) == INFO_FRMT_BIT)
+#define IS_INFO_FRMT_BYTE(frmt)     (((frmt) == INFO_FRMT_BYTE) || ((frmt) == INFO_FRMT_NUM_BYTES))
+#define IS_INFO_FRMT_NUM_STR(frmt)  ((frmt) == INFO_FRMT_NUM_STR)
+#define IS_INFO_FRMT_NUM_BUF(frmt)  ((frmt) == INFO_FRMT_NUM_BUF)
+#define IS_INFO_FRMT_BUF(frmt)      ((frmt) == INFO_FRMT_BUF)
+
+#define INFO_INT_MAX_LEN            (32)
+#define INFO_INT_LEN_VALAID(len)    (((len) > 0) && ((len) < INFO_INT_MAX_LEN))
+
+#define INFO_BUF_MAX_LEN            (128)
+#define INFO_BUF_LEN_VALAID(len)    (((len) > 0) && ((len) < INFO_BUF_MAX_LEN))
+
+#define INFO_BIT_OFFSET_VALID(bit_offset)   (((bit_offset) >= 0) && ((bit_offset) < 8))
+
+typedef enum info_ctrl_mode_e {
+    INFO_CTRL_MODE_NONE,
+    INFO_CTRL_MODE_CFG,
+    INFO_CTRL_MODE_CONS,
+    INFO_CTRL_MODE_TLV,
+    INFO_CTRL_MODE_SRT_CONS,
+    INFO_CTRL_MODE_END
+} info_ctrl_mode_t;
+
+typedef enum info_frmt_e {
+    INFO_FRMT_NONE,
+    INFO_FRMT_BIT,
+    INFO_FRMT_BYTE,
+    INFO_FRMT_NUM_BYTES,
+    INFO_FRMT_NUM_STR,
+    INFO_FRMT_NUM_BUF,
+    INFO_FRMT_BUF,
+    INFO_FRMT_END
+} info_frmt_t;
+
+typedef enum info_src_e {
+    INFO_SRC_NONE,
+    INFO_SRC_CPLD,
+    INFO_SRC_FPGA,
+    INFO_SRC_OTHER_I2C,
+    INFO_SRC_FILE,
+    INFO_SRC_END
+} info_src_t;
+
+typedef enum info_pola_e {
+    INFO_POLA_NONE,
+    INFO_POLA_POSI,
+    INFO_POLA_NEGA,
+    INFO_POLA_END
+} info_pola_t;
+
+#define INFO_FPATH_MAX_LEN     (128)
+#define INFO_STR_CONS_MAX_LEN  (64)
+typedef struct info_ctrl_s {
+    info_ctrl_mode_t mode;
+    int32_t int_cons;
+    info_src_t src;
+    info_frmt_t frmt;
+    info_pola_t pola;
+    char fpath[INFO_FPATH_MAX_LEN];
+    int32_t addr;
+    int32_t len;
+    int32_t bit_offset;
+    char str_cons[INFO_STR_CONS_MAX_LEN];
+    int32_t int_extra1;
+    int32_t int_extra2;
+} info_ctrl_t;
+
+typedef enum info_ctrl_mem_s {
+    INFO_CTRL_MEM_MODE,
+    INFO_CTRL_MEM_INT_CONS,
+    INFO_CTRL_MEM_SRC,
+    INFO_CTRL_MEM_FRMT,
+    INFO_CTRL_MEM_POLA,
+    INFO_CTRL_MEM_FPATH,
+    INFO_CTRL_MEM_ADDR,
+    INFO_CTRL_MEM_LEN,
+    INFO_CTRL_MEM_BIT_OFFSET,
+    INFO_CTRL_MEM_STR_CONS,
+    INFO_CTRL_MEM_INT_EXTRA1,
+    INFO_CTRL_MEM_INT_EXTRA2,
+    INFO_CTRL_MEM_END
+} info_ctrl_mem_t;
+
+typedef int (*info_hwmon_buf_f)(uint8_t *buf, int buf_len, uint8_t *buf_new, int *buf_len_new, info_ctrl_t *info_ctrl);
+
+extern char *g_info_ctrl_mem_str[INFO_CTRL_MEM_END];
+extern char *g_info_src_str[INFO_SRC_END];
+extern char *g_info_frmt_str[INFO_FRMT_END];
+extern char *g_info_pola_str[INFO_POLA_END];
+extern char *g_info_ctrl_mode_str[INFO_CTRL_MODE_END];
+
+int dfd_info_get_int(int key, int *ret, info_num_buf_to_value_f pfun);
+
+int dfd_info_get_buf(int key, uint8_t *buf, int buf_len, info_buf_to_buf_f pfun);
+
+int dfd_info_set_int(int key, int val);
+
+int dfd_info_get_sensor(uint32_t key, char *buf, int buf_len, info_hwmon_buf_f pfun);
+
+#endif /* __DFD_CFG_INFO_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_listnode.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_listnode.h
new file mode 100644
index 000000000000..955dfa96e42e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_listnode.h
@@ -0,0 +1,30 @@
+#ifndef __DFD_CFG_LISTNODE_H__
+#define __DFD_CFG_LISTNODE_H__
+
+#include <linux/list.h>
+
+#define LNODE_RV_OK             (0)
+#define LNODE_RV_INPUT_ERR      (-1)
+#define LNODE_RV_NODE_EXIST     (-2)
+#define LNODE_RV_NOMEM          (-3)
+
+typedef struct lnode_root_s {
+    struct list_head root;
+} lnode_root_t;
+
+typedef struct lnode_node_s {
+    struct list_head lst;
+
+    int key;
+    void *data;
+} lnode_node_t;
+
+void *lnode_find_node(lnode_root_t *root, int key);
+
+int lnode_insert_node(lnode_root_t *root, int key, void *data);
+
+int lnode_init_root(lnode_root_t *root);
+
+void lnode_free_list(lnode_root_t *root);
+
+#endif /* __DFD_CFG_LISTNODE_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_fan_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_fan_driver.h
new file mode 100644
index 000000000000..1065fd9eed3f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_fan_driver.h
@@ -0,0 +1,18 @@
+#ifndef _DFD_FAN_DRIVER_H_
+#define _DFD_FAN_DRIVER_H_
+
+ssize_t dfd_get_fan_speed(unsigned int fan_index, unsigned int motor_index,unsigned int *speed);
+
+int dfd_set_fan_pwm(unsigned int fan_index, unsigned int motor_index, int pwm);
+
+int dfd_get_fan_pwm(unsigned int fan_index, unsigned int motor_index, int *pwm);
+
+int dfd_get_fan_present_status(unsigned int fan_index);
+
+int dfd_get_fan_roll_status(unsigned int fan_index, unsigned int motor_index);
+
+int dfd_get_fan_speed_level(unsigned int fan_index, unsigned int motor_index, int *level);
+
+int dfd_set_fan_speed_level(unsigned int fan_index, unsigned int motor_index, int level);
+
+#endif /* _DFD_FAN_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_module.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_module.h
new file mode 100644
index 000000000000..a547255cf3ab
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_module.h
@@ -0,0 +1,96 @@
+#ifndef __DFD_MODULE_H__
+#define __DFD_MODULE_H__
+
+typedef enum dfd_rv_s {
+    DFD_RV_OK               = 0,
+    DFD_RV_INIT_ERR         = 1,
+    DFD_RV_SLOT_INVALID     = 2,
+    DFD_RV_MODE_INVALID     = 3,
+    DFD_RV_MODE_NOTSUPPORT  = 4,
+    DFD_RV_TYPE_ERR         = 5,
+    DFD_RV_DEV_NOTSUPPORT   = 6,
+    DFD_RV_DEV_FAIL         = 7,
+    DFD_RV_INDEX_INVALID    = 8,
+    DFD_RV_NO_INTF          = 9,
+    DFD_RV_NO_NODE          = 10,
+    DFD_RV_NODE_FAIL        = 11,
+    DFD_RV_INVALID_VALUE    = 12,
+    DFD_RV_NO_MEMORY        = 13,
+} dfd_rv_t;
+
+typedef enum {
+    DBG_VERBOSE = 0x01,
+    DBG_WARN    = 0x02,
+    DBG_ERROR   = 0x04,
+} dbg_level_t;
+
+extern int g_dfd_dbg_level;
+extern int g_dfd_fan_dbg_level;
+extern int g_dfd_slot_dbg_level;
+extern int g_dfd_sensor_dbg_level;
+extern int g_dfd_psu_dbg_level;
+extern int g_dfd_sff_dbg_level;
+
+#define DBG_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_dbg_level & level) { \
+        if(level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+#define DFD_FAN_DEBUG(level, fmt, arg...) do { \
+            if (g_dfd_fan_dbg_level & level) { \
+                if(level >= DBG_ERROR) { \
+                    printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+                } else { \
+                    printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+                } \
+            } \
+} while (0)
+
+#define DFD_SLOT_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_slot_dbg_level & level) { \
+        if(level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+#define DFD_SENSOR_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_sensor_dbg_level & level) { \
+        if(level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+#define DFD_PSU_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_psu_dbg_level & level) { \
+        if(level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+#define DFD_SFF_DEBUG(level, fmt, arg...) do { \
+    if (g_dfd_sff_dbg_level & level) { \
+        if(level >= DBG_ERROR) { \
+            printk(KERN_ERR "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } else { \
+            printk(KERN_INFO "[DBG-%d]:<%s, %d>:"fmt, level, __FUNCTION__, __LINE__, ##arg); \
+        } \
+    } \
+} while (0)
+
+int dfd_get_dev_number(unsigned int main_dev_id, unsigned int minor_dev_id);
+
+#endif  /* __DFD_MODULE_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_psu_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_psu_driver.h
new file mode 100644
index 000000000000..ce7199660557
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_psu_driver.h
@@ -0,0 +1,10 @@
+#ifndef _DFD_PSU_DRIVER_H_
+#define _DFD_PSU_DRIVER_H_
+
+int dfd_get_psu_present_status(unsigned int psu_index);
+
+int dfd_get_psu_output_status(unsigned int psu_index);
+
+int dfd_get_psu_alert_status(unsigned int psu_index);
+
+#endif /* _DFD_PSU_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_sensors_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_sensors_driver.h
new file mode 100644
index 000000000000..16733b26029f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_sensors_driver.h
@@ -0,0 +1,10 @@
+#ifndef _DFD_SENSORS_DRIVER_H_
+#define _DFD_SENSORS_DRIVER_H_
+
+ssize_t dfd_get_temp_info(uint8_t main_dev_id, uint8_t dev_index,
+            uint8_t temp_index, uint8_t temp_attr, char *buf);
+
+ssize_t dfd_get_voltage_info(uint8_t main_dev_id, uint8_t dev_index,
+            uint8_t in_index, uint8_t in_attr, char *buf);
+
+#endif /* _DFD_SENSORS_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_sff_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_sff_driver.h
new file mode 100644
index 000000000000..7107b72ee4b2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_sff_driver.h
@@ -0,0 +1,8 @@
+#ifndef _DFD_SFF_DRIVER_H_
+#define _DFD_SFF_DRIVER_H_
+
+ssize_t dfd_get_sff_cpld_info(unsigned int sff_index, int cpld_reg_type, char *buf, int len);
+
+ssize_t dfd_get_sff_dir_name(unsigned int sff_index, char *buf, int buf_len);
+
+#endif /* _DFD_SFF_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_slot_driver.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_slot_driver.h
new file mode 100644
index 000000000000..c68caecd2e66
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_slot_driver.h
@@ -0,0 +1,6 @@
+#ifndef _DFD_SLOT_DRIVER_H_
+#define _DFD_SLOT_DRIVER_H_
+
+int dfd_get_slot_present_status(unsigned int slot_index);
+
+#endif /* _DFD_SLOT_DRIVER_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/Makefile
new file mode 100644
index 000000000000..1a1044bb1fe8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/Makefile
@@ -0,0 +1,21 @@
+PWD		= $(shell pwd)
+
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+KBUILD_EXTRA_SYMBOLS += $(PLAT_SYSFS_DIR)/dev_cfg/Module.symvers
+
+obj-m := plat_switch.o
+obj-m += plat_fan.o
+obj-m += plat_psu.o
+obj-m += plat_sff.o
+obj-m += plat_sensor.o
+obj-m += plat_slot.o
+
+all:
+	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
+	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
+	cp -p  $(PWD)/*.ko $(module_out_put_dir)
+clean:
+	rm -f $(PWD)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd $(PWD)/*.mod
+	rm -f $(PWD)/Module.markers $(PWD)/Module.symvers $(PWD)/modules.order
+	rm -rf $(PWD)/.tmp_versions
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/include/plat_switch.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/include/plat_switch.h
new file mode 100644
index 000000000000..bbd813e87114
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/include/plat_switch.h
@@ -0,0 +1,86 @@
+#ifndef _PLAT_SWITCH_H_
+#define _PLAT_SWITCH_H_
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/workqueue.h>
+#include <linux/kobject.h>
+#include <linux/delay.h>
+
+enum LOG_LEVEL{
+    INFO = 0x1,
+    ERR  = 0x2,
+    DBG  = 0x4,
+    ALL  = 0xf
+};
+
+#define LOG_INFO(_prefix, fmt, args...) \
+            do { \
+                if (g_loglevel & INFO) \
+                { \
+                    printk( KERN_INFO _prefix "%s "fmt, __FUNCTION__, ##args); \
+                } \
+            } while (0)
+
+#define LOG_ERR(_prefix, fmt, args...) \
+            do { \
+                if (g_loglevel & ERR) \
+                { \
+                    printk( KERN_ERR _prefix "%s "fmt, __FUNCTION__, ##args); \
+                } \
+            } while (0)
+
+#define LOG_DBG(_prefix, fmt, args...) \
+            do { \
+                if (g_loglevel & DBG) \
+                { \
+                    printk( KERN_DEBUG _prefix "%s "fmt, __FUNCTION__, ##args); \
+                } \
+            } while (0)
+
+#define check_pfun(p) \
+            do { \
+                if (p == NULL) { \
+                    printk( KERN_ERR "%s, %s = NULL.\n", __FUNCTION__, #p); \
+                    return -ENOSYS; \
+                } \
+            }while(0)
+
+#define check_p(p) check_pfun(p)
+
+#define to_switch_obj(x) container_of(x, struct switch_obj, kobj)
+#define to_switch_attr(x) container_of(x, struct switch_attribute, attr)
+#define to_switch_device_attr(x) container_of(x, struct switch_device_attribute, switch_attr)
+
+#define SWITCH_ATTR(_name, _mode, _show, _store, _type)    \
+        { .switch_attr = __ATTR(_name, _mode, _show, _store),   \
+          .type = _type }
+
+#define SWITCH_DEVICE_ATTR(_name, _mode, _show, _store, _type) \
+struct switch_device_attribute switch_dev_attr_##_name          \
+        = SWITCH_ATTR(_name, _mode, _show, _store, _type)
+
+struct switch_obj {
+    struct kobject kobj;
+    unsigned int index;
+};
+
+/* a custom attribute that works just for a struct switch_obj. */
+struct switch_attribute {
+    struct attribute attr;
+    ssize_t (*show)(struct switch_obj *foo, struct switch_attribute *attr, char *buf);
+    ssize_t (*store)(struct switch_obj *foo, struct switch_attribute *attr, const char *buf, size_t count);
+};
+
+struct switch_device_attribute {
+    struct switch_attribute switch_attr;
+    int type;
+};
+
+extern struct switch_obj *wb_plat_kobject_create(const char *name, struct kobject *parent);
+extern void wb_plat_kobject_delete(struct switch_obj **obj);
+
+#endif /* _PLAT_SWITCH_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/include/sysfs_common.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/include/sysfs_common.h
new file mode 100644
index 000000000000..5b73731e1fbf
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/include/sysfs_common.h
@@ -0,0 +1,90 @@
+#ifndef _SYSFS_COMMON_H_
+#define _SYSFS_COMMON_H_
+
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+#define DIR_NAME_MAX_LEN        (64)
+
+#define WB_SYSFS_DEV_ERROR         "NA"
+/* sysfs directory name */
+#define FAN_SYSFS_NAME          "fan"
+#define PSU_SYSFS_NAME          "psu"
+#define SLOT_SYSFS_NAME         "slot"
+#define VOLTAGE_SYSFS_NAME      "in"
+#define TEMP_SYSFS_NAME         "temp"
+#define SFF_SYSFS_NAME          "sff"
+
+typedef enum wb_main_dev_type_e {
+    WB_MAIN_DEV_MAINBOARD = 0,
+    WB_MAIN_DEV_FAN       = 1,
+    WB_MAIN_DEV_PSU       = 2,
+    WB_MAIN_DEV_SFF       = 3,
+    WB_MAIN_DEV_CPLD      = 4,
+    WB_MAIN_DEV_SLOT      = 5,
+} wb_main_dev_type_t;
+
+typedef enum wb_minor_dev_type_e {
+    WB_MINOR_DEV_NONE  = 0,    /* None */
+    WB_MINOR_DEV_TEMP  = 1,
+    WB_MINOR_DEV_IN    = 2,
+    WB_MINOR_DEV_CURR  = 3,
+    WB_MINOR_DEV_POWER = 4,
+    WB_MINOR_DEV_MOTOR = 5,
+    WB_MINOR_DEV_PSU   = 6,
+} wb_minor_dev_type_t;
+
+typedef enum wb_sensor_type_e {
+    WB_SENSOR_INPUT    = 0,
+    WB_SENSOR_ALIAS    = 1,
+    WB_SENSOR_TYPE     = 2,
+    WB_SENSOR_MAX      = 3,
+    WB_SENSOR_MAX_HYST = 4,
+    WB_SENSOR_MIN      = 5,
+    WB_SENSOR_CRIT     = 6,
+} wb_sensor_type_t;
+
+typedef enum wb_sff_cpld_attr_e {
+    WB_SFF_POWER_ON      = 0x01,
+    WB_SFF_TX_FAULT,
+    WB_SFF_TX_DIS,
+    WB_SFF_PRE_N,
+    WB_SFF_RX_LOS,
+    WB_SFF_RESET,
+    WB_SFF_LPMODE,
+    WB_SFF_MODULE_PRESENT,
+    WB_SFF_INTERRUPT,
+} wb_sff_cpld_attr_t;
+
+struct switch_drivers_t{
+    /* device */
+    int (*get_dev_number) (unsigned int main_dev_id, unsigned int minor_dev_id);
+    /* fan */
+    int (*get_fan_number) (void);
+    ssize_t (*get_fan_speed) (unsigned int fan_index, unsigned int motor_index, unsigned int *speed);
+    int (*get_fan_pwm) (unsigned int fan_index, unsigned int motor_index, int *pwm);
+    int (*set_fan_pwm) (unsigned int fan_index, unsigned int motor_index, int pwm);
+    int (*get_fan_present_status)(unsigned int fan_index);
+    int (*get_fan_roll_status)(unsigned int fan_index, unsigned int motor_index);
+    int (*get_fan_speed_level)(unsigned int fan_index, unsigned int motor_index, int *level);
+    int (*set_fan_speed_level)(unsigned int fan_index, unsigned int motor_index, int level);
+    /* slot */
+    int (*get_slot_present_status) (unsigned int slot_index);
+    /* sensors */
+    ssize_t (*get_temp_info)( uint8_t main_dev_id, uint8_t dev_index,
+            uint8_t temp_index, uint8_t temp_attr, char *buf);
+    ssize_t (*get_voltage_info)( uint8_t main_dev_id, uint8_t dev_index,
+            uint8_t in_index, uint8_t in_attr, char *buf);
+    /* psu */
+    int (*get_psu_present_status)(unsigned int psu_index);
+    int (*get_psu_output_status)(unsigned int psu_index);
+    int (*get_psu_alert_status)(unsigned int psu_index);
+    /* sff */
+    ssize_t (*get_sff_cpld_info)( unsigned int sff_index, int cpld_reg_type, char *buf, int len);
+    ssize_t (*get_sff_dir_name)(unsigned int sff_index, char *buf, int buf_len);
+};
+
+extern struct switch_drivers_t * dfd_plat_driver_get(void);
+
+#endif /*_SYSFS_COMMON_H_ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_fan.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_fan.c
new file mode 100644
index 000000000000..d841f2547b6f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_fan.c
@@ -0,0 +1,505 @@
+/*
+ * plat_fan.c
+ * Original Author: support  2020-02-17
+ *
+ * This module create fan kobjects and attributes in /sys/wb_plat/fan
+ *
+ * History
+ *  [Version]        [Author]                   [Date]            [Description]
+ *   *  v1.0          support                  2020-02-17          Initial version
+ */
+
+#include <linux/slab.h>
+
+#include "./include/plat_switch.h"
+#include "./include/sysfs_common.h"
+
+#define FAN_INFO(fmt, args...) LOG_INFO("fan: ", fmt, ##args)
+#define FAN_ERR(fmt, args...)  LOG_ERR("fan: ", fmt, ##args)
+#define FAN_DBG(fmt, args...)  LOG_DBG("fan: ", fmt, ##args)
+
+struct motor_obj_t{
+    struct switch_obj *obj;
+};
+
+struct fan_obj_t{
+    unsigned int motor_number;
+    struct motor_obj_t *motor;
+    struct switch_obj *obj;
+};
+
+struct fan_t{
+    unsigned int fan_number;
+    struct fan_obj_t *fan;
+};
+
+static int g_loglevel = 0;
+static struct fan_t g_fan;
+static struct switch_obj *g_fan_obj = NULL;
+static struct switch_drivers_t *g_drv = NULL;
+
+static ssize_t fan_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_fan.fan_number);
+}
+
+static ssize_t fan_motor_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int index;
+
+    index = obj->index;
+    FAN_DBG("fan_motor_number_show,fan index:%d\n",index);
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_fan.fan[index-1].motor_number);
+}
+
+static ssize_t fan_roll_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int fan_index, motor_index;
+    struct switch_obj *p_obj;
+    int ret;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_roll_status);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    check_p(p_obj);
+
+    fan_index = p_obj->index;
+    motor_index = obj->index;
+
+    ret = g_drv->get_fan_roll_status(fan_index, motor_index);
+    if (ret < 0 ) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", ret);
+}
+
+static ssize_t fan_present_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int fan_index;
+    int ret;
+
+    fan_index = obj->index;
+    FAN_DBG("fan_present_status_show, fan index:%d\n",fan_index);
+    check_p(g_drv);
+    check_p(g_drv->get_fan_present_status);
+
+    ret = g_drv->get_fan_present_status(fan_index);
+    if(ret < 0) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", ret);
+}
+
+static ssize_t fan_speed_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int fan_index, motor_index, speed;
+    int ret;
+    struct switch_obj *p_obj;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_speed);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    check_p(p_obj);
+
+    fan_index = p_obj->index;
+    motor_index = obj->index;
+
+    ret = g_drv->get_fan_speed(fan_index, motor_index, &speed);
+    if(ret < 0) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", speed);
+}
+
+static ssize_t fan_motor_ratio_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int fan_index, motor_index;
+    struct switch_obj *p_obj;
+    int ret, pwm;
+
+    check_p(g_drv);
+    check_p(g_drv->get_fan_pwm);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    check_p(p_obj);
+    fan_index = p_obj->index;
+    motor_index = obj->index;
+    ret = g_drv->get_fan_pwm(fan_index, motor_index, &pwm);
+
+    if (ret < 0 ) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", pwm);
+}
+
+static ssize_t fan_motor_ratio_store(struct switch_obj *obj, struct switch_attribute *attr,
+                                    const char* buf, size_t count)
+{
+    unsigned int fan_index, motor_index;
+    struct switch_obj *p_obj;
+    int ret, pwm;
+
+    check_p(g_drv);
+    check_p(g_drv->set_fan_pwm);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    check_p(p_obj);
+
+    fan_index = p_obj->index;
+    motor_index = obj->index;
+    sscanf(buf, "%d", &pwm);
+
+    if (pwm < 0 || pwm > 100) {
+        FAN_ERR("can not set pwm = %d.\n", pwm);
+        return -EINVAL;
+    }
+    ret = g_drv->set_fan_pwm(fan_index, motor_index, pwm);
+    if (ret < 0) {
+        FAN_ERR("can not set pwm = %d.\n", pwm);
+        return -EIO;
+    }
+    return count;
+}
+
+/************************************fan dir and attrs*******************************************/
+static struct switch_attribute fan_number_att = __ATTR(num_fans, S_IRUGO, fan_number_show, NULL);
+
+static struct attribute *fan_dir_attrs[] = {
+    &fan_number_att.attr,
+    NULL,
+};
+
+static struct attribute_group fan_root_attr_group = {
+    .attrs = fan_dir_attrs,
+};
+
+/*******************************fan1 fan2 dir and attrs*******************************************/
+static struct switch_attribute fan_num_motors_att = __ATTR(num_motors, S_IRUGO, fan_motor_number_show, NULL);
+static struct switch_attribute fan_present_att = __ATTR(present, S_IRUGO, fan_present_status_show, NULL);
+
+static struct attribute *fan_attrs[] = {
+    &fan_num_motors_att.attr,
+    &fan_present_att.attr,
+    NULL,
+};
+
+static struct attribute_group fan_attr_group = {
+    .attrs = fan_attrs,
+};
+
+/*******************************motor0 motor1 dir and attrs*******************************************/
+static struct switch_attribute motor_speed_att = __ATTR(speed, S_IRUGO, fan_speed_show, NULL);
+static struct switch_attribute motor_status_att = __ATTR(status, S_IRUGO, fan_roll_status_show, NULL);
+static struct switch_attribute motor_ratio_att = __ATTR(ratio, S_IRUGO | S_IWUSR, fan_motor_ratio_show, fan_motor_ratio_store);
+
+static struct attribute *motor_attrs[] = {
+    &motor_speed_att.attr,
+    &motor_status_att.attr,
+    &motor_ratio_att.attr,
+    NULL,
+};
+
+static struct attribute_group motor_attr_group = {
+    .attrs = motor_attrs,
+};
+
+static void fanindex_single_motor_remove_kobj_and_attrs(struct fan_obj_t * curr_fan, unsigned int motor_index)
+{
+    struct motor_obj_t *curr_motor; /* point to motor0 motor1...*/
+
+    curr_motor = &curr_fan->motor[motor_index];
+    if (curr_motor->obj) {
+        sysfs_remove_group(&curr_motor->obj->kobj, &motor_attr_group);
+        wb_plat_kobject_delete(&curr_motor->obj);
+        FAN_DBG("delete fan:%d motor%d.\n", curr_fan->obj->index, motor_index);
+    }
+    return;
+}
+
+static int fanindex_single_motor_create_kobj_and_attrs(struct fan_obj_t * curr_fan, unsigned int motor_index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct motor_obj_t *curr_motor; /* point to motor0 motor1...*/
+
+    FAN_DBG("create fan_index:%d, motor%d ...\n", curr_fan->obj->index, motor_index);
+
+    curr_motor = &curr_fan->motor[motor_index];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "motor%d", motor_index);
+    curr_motor->obj = wb_plat_kobject_create(name, &curr_fan->obj->kobj);
+    if (!curr_motor->obj) {
+        FAN_ERR("create fan_index:%d, motor%d object error!\n", curr_fan->obj->index, motor_index);
+        return -EBADRQC;
+    }
+    curr_motor->obj->index = motor_index;
+    if (sysfs_create_group(&curr_motor->obj->kobj, &motor_attr_group) != 0) {
+        FAN_ERR("create fan_index:%d, motor%d attrs error.\n", curr_fan->obj->index, motor_index);
+        wb_plat_kobject_delete(&curr_motor->obj);
+        return -EBADRQC;
+    }
+    FAN_DBG("create fan_index:%d, motor%d ok.\n", curr_fan->obj->index, motor_index);
+    return 0;
+}
+
+static int fanindex_motor_create_kobj_and_attrs(struct fan_obj_t * curr_fan, int motor_num)
+{
+    int motor_index, i;
+
+    curr_fan->motor = kzalloc(sizeof(struct motor_obj_t) * motor_num, GFP_KERNEL);
+    if (!curr_fan->motor) {
+        FAN_ERR("kzalloc motor error, fan index = %d, motor number = %d.\n", curr_fan->obj->index, motor_num);
+        return -ENOMEM;
+    }
+    curr_fan->motor_number = motor_num;
+    for (motor_index = 0; motor_index < motor_num; motor_index++) {
+        if (fanindex_single_motor_create_kobj_and_attrs(curr_fan, motor_index) != 0) {
+            goto motor_error;
+        }
+    }
+    return 0;
+motor_error:
+    for(i = motor_index - 1; i >= 0; i--) {
+        fanindex_single_motor_remove_kobj_and_attrs(curr_fan, i);
+    }
+    if(curr_fan->motor) {
+        kfree(curr_fan->motor);
+        curr_fan->motor = NULL;
+    }
+    return -EBADRQC;
+}
+
+static void fanindex_motor_remove_kobj_and_attrs(struct fan_obj_t *curr_fan, int motor_num)
+{
+    int motor_index;
+
+    for (motor_index = motor_num - 1; motor_index >= 0; motor_index--) {
+        fanindex_single_motor_remove_kobj_and_attrs(curr_fan, motor_index);
+    }
+    return;
+}
+
+static int fan_motor_create(void)
+{
+    int fan_num, motor_num;
+    unsigned int fan_index, i;
+    struct fan_obj_t *curr_fan;     /* point to fan1 fan2...*/
+
+    check_p(g_drv->get_dev_number);
+
+    motor_num = g_drv->get_dev_number(WB_MAIN_DEV_FAN, WB_MINOR_DEV_MOTOR);
+    if (motor_num <= 0) {
+        FAN_ERR("get fan motor number error, motor_num:%d error.\n", motor_num);
+        return -ENODEV;
+    }
+
+    fan_num = g_fan.fan_number;
+    for (fan_index = 1; fan_index <= fan_num; fan_index++) {
+        curr_fan = &g_fan.fan[fan_index - 1];
+        if (fanindex_motor_create_kobj_and_attrs(curr_fan, motor_num) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = fan_index - 1; i > 0; i--) {
+        curr_fan = &g_fan.fan[i - 1];
+        motor_num = curr_fan->motor_number;
+        fanindex_motor_remove_kobj_and_attrs(curr_fan, motor_num);
+    }
+    return -EBADRQC;
+}
+
+static void fan_motor_remove(void)
+{
+    unsigned int fan_index;
+    struct fan_obj_t *curr_fan;
+
+    if (g_fan.fan) {
+       for (fan_index = g_fan.fan_number; fan_index > 0; fan_index--) {
+           curr_fan = &g_fan.fan[fan_index - 1];
+           if (curr_fan->motor) {
+               fanindex_motor_remove_kobj_and_attrs(curr_fan, curr_fan->motor_number);
+               kfree(curr_fan->motor);
+               curr_fan->motor = NULL;
+               curr_fan->motor_number = 0;
+           }
+       }
+    }
+    return;
+}
+
+static void fan_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct fan_obj_t *curr_fan;
+
+    curr_fan = &g_fan.fan[index - 1];
+    if (curr_fan->obj) {
+        sysfs_remove_group(&curr_fan->obj->kobj, &fan_attr_group);
+        wb_plat_kobject_delete(&curr_fan->obj);
+        FAN_DBG("delete fan%d.\n", index);
+    }
+    return;
+}
+
+static int fan_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct fan_obj_t *curr_fan;
+
+    curr_fan = &g_fan.fan[index - 1];
+    FAN_DBG("create fan%d ...\n", index);
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "fan%d", index);
+    curr_fan->obj = wb_plat_kobject_create(name, parent);
+    if (!curr_fan->obj) {
+        FAN_ERR("create fan%d object error!\n", index);
+        return -EBADRQC;
+    }
+    curr_fan->obj->index = index;
+    if (sysfs_create_group(&curr_fan->obj->kobj, &fan_attr_group) != 0) {
+        FAN_ERR("create fan%d attrs error.\n", index);
+        wb_plat_kobject_delete(&curr_fan->obj);
+        return -EBADRQC;
+    }
+    FAN_DBG("create fan%d ok.\n", index);
+    return 0;
+}
+
+static int fan_sub_create_kobj_and_attrs(struct kobject *parent, int fan_num)
+{
+    unsigned int fan_index, i;
+
+    g_fan.fan = kzalloc(sizeof(struct fan_obj_t) * fan_num, GFP_KERNEL);
+    if (!g_fan.fan) {
+        FAN_ERR("kzalloc fan.fan error, fan number = %d.\n", fan_num);
+        return -ENOMEM;
+    }
+
+    for (fan_index = 1; fan_index <= fan_num; fan_index++) {
+        if(fan_sub_single_create_kobj_and_attrs(parent, fan_index) != 0 ) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = fan_index - 1; i > 0; i--) {
+        fan_sub_single_remove_kobj_and_attrs(i);
+    }
+    if (g_fan.fan) {
+        kfree(g_fan.fan);
+        g_fan.fan = NULL;
+    }
+    return -EBADRQC;
+}
+
+static int fan_sub_create(void)
+{
+    int ret, fan_num;
+
+    check_p(g_drv->get_dev_number);
+    fan_num = g_drv->get_dev_number(WB_MAIN_DEV_FAN, WB_MINOR_DEV_NONE);
+    if (fan_num < 0) {
+        FAN_ERR("fan number = %d error.\n", fan_num);
+        return -EINVAL;
+    }
+    g_fan.fan_number = fan_num;
+    ret = fan_sub_create_kobj_and_attrs(&g_fan_obj->kobj, fan_num);
+    return ret;
+}
+
+static void fan_sub_remove(void)
+{
+    unsigned int fan_index;
+
+    if (g_fan.fan) {
+       for (fan_index = g_fan.fan_number; fan_index > 0; fan_index--) {
+           fan_sub_single_remove_kobj_and_attrs(fan_index);
+       }
+       kfree(g_fan.fan);
+    }
+    mem_clear(&g_fan, sizeof(struct fan_t));
+    return;
+}
+
+static int fan_root_create(void)
+{
+    g_fan_obj = wb_plat_kobject_create("fan", NULL);
+    if (!g_fan_obj) {
+        FAN_ERR("wb_plat_kobject_create fan error!\n");
+        return -ENOMEM;
+    }
+
+    if (sysfs_create_group(&g_fan_obj->kobj, &fan_root_attr_group) != 0) {
+        wb_plat_kobject_delete(&g_fan_obj);
+        FAN_ERR("create fan dir attrs error!\n");
+        return -EBADRQC;
+    }
+    FAN_DBG("wb_plat_kobject_create fan directory and attribute success.\n");
+    return 0;
+}
+
+static void fan_root_remove(void)
+{
+    if (g_fan_obj) {
+        sysfs_remove_group(&g_fan_obj->kobj, &fan_root_attr_group);
+        wb_plat_kobject_delete(&g_fan_obj);
+        FAN_DBG("delete fan root success\n");
+    }
+
+    return;
+}
+
+static int fan_init(void)
+{
+    int ret;
+
+    FAN_INFO("fan_init...\n");
+    g_drv = dfd_plat_driver_get();
+    check_p(g_drv);
+
+    ret = fan_root_create();
+    if (ret < 0) {
+        goto fan_root_error;
+    }
+
+    ret = fan_sub_create();
+    if (ret < 0) {
+        goto fan_sub_error;
+    }
+
+    ret = fan_motor_create();
+    if (ret < 0) {
+        goto fan_motor_error;
+    }
+
+    FAN_INFO("fan_init ok.\n");
+    return 0;
+fan_motor_error:
+    fan_sub_remove();
+fan_sub_error:
+    fan_root_remove();
+fan_root_error:
+    return ret;
+}
+
+static void fan_exit(void)
+{
+    fan_motor_remove();
+    fan_sub_remove();
+    fan_root_remove();
+    FAN_INFO("fan_exit ok.\n");
+    return ;
+}
+
+module_init(fan_init);
+module_exit(fan_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("fan sysfs driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_psu.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_psu.c
new file mode 100644
index 000000000000..af3b414314ff
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_psu.c
@@ -0,0 +1,430 @@
+/*
+ * plat_psu.c
+ * Original Author: support 2020-02-17
+ *
+ * This module create psu kobjects and attributes in /sys/wb_plat/psu
+ *
+ * History
+ *  [Version]        [Author]                   [Date]            [Description]
+ *   *  v1.0          support                 2020-02-17          Initial version
+ */
+
+#include <linux/slab.h>
+
+#include "./include/plat_switch.h"
+#include "./include/sysfs_common.h"
+
+#define PSU_INFO(fmt, args...) LOG_INFO("psu: ", fmt, ##args)
+#define PSU_ERR(fmt, args...)  LOG_ERR("psu: ", fmt, ##args)
+#define PSU_DBG(fmt, args...)  LOG_DBG("psu: ", fmt, ##args)
+
+struct temp_obj_t{
+    struct switch_obj *obj;
+};
+
+struct psu_obj_t{
+    unsigned int temp_number;
+    struct temp_obj_t *temp;
+    struct switch_obj *obj;
+};
+
+struct psu_t{
+    unsigned int psu_number;
+    struct psu_obj_t *psu;
+};
+
+static int g_loglevel = 0;
+static struct psu_t g_psu;
+static struct switch_obj *g_psu_obj = NULL;
+static struct switch_drivers_t *g_drv = NULL;
+
+static ssize_t psu_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_psu.psu_number);
+}
+
+static ssize_t psu_present_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+    int ret;
+
+    psu_index = obj->index;
+    PSU_DBG("psu_present_status_show, psu index:%d\n",psu_index);
+    check_p(g_drv);
+    check_p(g_drv->get_psu_present_status);
+
+    ret = g_drv->get_psu_present_status(psu_index);
+    if(ret < 0) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", ret);
+}
+
+static ssize_t psu_output_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+    int ret;
+
+    psu_index = obj->index;
+    PSU_DBG("psu_output_status_show, psu index:%d\n",psu_index);
+    check_p(g_drv);
+    check_p(g_drv->get_psu_output_status);
+
+    ret = g_drv->get_psu_output_status(psu_index);
+    if(ret < 0) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", ret);
+}
+
+static ssize_t psu_alert_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int psu_index;
+    int ret;
+
+    psu_index = obj->index;
+    PSU_DBG("psu_alert_status_show, psu index:%d\n",psu_index);
+    check_p(g_drv);
+    check_p(g_drv->get_psu_alert_status);
+
+    ret = g_drv->get_psu_alert_status(psu_index);
+    if(ret < 0) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", ret);
+}
+
+/************************************psu dir and attrs*******************************************/
+static struct switch_attribute psu_number_att = __ATTR(num_psus, S_IRUGO, psu_number_show, NULL);
+
+static struct attribute *psu_dir_attrs[] = {
+    &psu_number_att.attr,
+    NULL,
+};
+
+static struct attribute_group psu_root_attr_group = {
+    .attrs = psu_dir_attrs,
+};
+
+/*******************************psu1 psu2 dir and attrs*******************************************/
+static struct switch_attribute psu_present_status_att = __ATTR(present, S_IRUGO, psu_present_status_show, NULL);
+static struct switch_attribute psu_output_status_att = __ATTR(output, S_IRUGO, psu_output_status_show, NULL);
+static struct switch_attribute psu_alert_status_att = __ATTR(alert, S_IRUGO, psu_alert_status_show, NULL);
+
+static struct attribute *psu_attrs[] = {
+    &psu_present_status_att.attr,
+    &psu_output_status_att.attr,
+    &psu_alert_status_att.attr,
+    NULL,
+};
+
+static struct attribute_group psu_attr_group = {
+    .attrs = psu_attrs,
+};
+
+/*******************************psu temp0 temp1 dir and attrs*******************************************/
+static struct attribute *psu_temp_attrs[] = {
+    NULL,
+};
+
+static struct attribute_group psu_temp_attr_group = {
+    .attrs = psu_temp_attrs,
+};
+
+static void psuindex_single_temp_remove_kobj_and_attrs(struct psu_obj_t * curr_psu, unsigned int temp_index)
+{
+
+    struct temp_obj_t *curr_temp; /* point to temp0 temp1...*/
+
+    curr_temp = &curr_psu->temp[temp_index];
+    if (curr_temp->obj) {
+        sysfs_remove_group(&curr_temp->obj->kobj, &psu_temp_attr_group);
+        wb_plat_kobject_delete(&curr_temp->obj);
+        PSU_DBG("delete psu:%d temp%d.\n", curr_psu->obj->index, temp_index);
+    }
+    return;
+}
+
+static int psuindex_single_temp_create_kobj_and_attrs(struct psu_obj_t * curr_psu, unsigned int temp_index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct temp_obj_t *curr_temp; /* point to temp0 temp1...*/
+
+    PSU_DBG("create psu_index:%d, temp%d ...\n", curr_psu->obj->index, temp_index);
+
+    curr_temp = &curr_psu->temp[temp_index];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "temp%d", temp_index);
+    curr_temp->obj = wb_plat_kobject_create(name, &curr_psu->obj->kobj);
+    if (!curr_temp->obj) {
+        PSU_ERR("create psu_index:%d, temp%d object error!\n", curr_psu->obj->index, temp_index);
+        return -EBADRQC;
+    }
+    curr_temp->obj->index = temp_index;
+    if (sysfs_create_group(&curr_temp->obj->kobj, &psu_temp_attr_group) != 0) {
+        PSU_ERR("create psu_index:%d, temp%d attrs error.\n", curr_psu->obj->index, temp_index);
+        wb_plat_kobject_delete(&curr_temp->obj);
+        return -EBADRQC;
+    }
+    PSU_DBG("create psu_index:%d, temp%d ok.\n", curr_psu->obj->index, temp_index);
+    return 0;
+}
+
+static int psuindex_temp_create_kobj_and_attrs(struct psu_obj_t * curr_psu, int temp_num)
+{
+    int temp_index, i;
+
+    curr_psu->temp = kzalloc(sizeof(struct temp_obj_t) * temp_num, GFP_KERNEL);
+    if (!curr_psu->temp) {
+        PSU_ERR("kzalloc temp error, psu index = %d, temp number = %d.\n", curr_psu->obj->index, temp_num);
+        return -ENOMEM;
+    }
+    curr_psu->temp_number = temp_num;
+    for (temp_index = 0; temp_index < temp_num; temp_index++) {
+        if (psuindex_single_temp_create_kobj_and_attrs(curr_psu, temp_index) != 0) {
+            goto temp_error;
+        }
+    }
+    return 0;
+temp_error:
+    for (i = temp_index - 1; i >= 0; i--) {
+        psuindex_single_temp_remove_kobj_and_attrs(curr_psu, i);
+    }
+    if (curr_psu->temp) {
+        kfree(curr_psu->temp);
+        curr_psu->temp = NULL;
+    }
+    return -EBADRQC;
+}
+
+static void psuindex_temp_remove_kobj_and_attrs(struct psu_obj_t * curr_psu, int temp_num)
+{
+    unsigned int temp_index;
+
+    for (temp_index = temp_num - 1; temp_index >= 0; temp_index--) {
+        psuindex_single_temp_remove_kobj_and_attrs(curr_psu, temp_index);
+    }
+    return;
+}
+
+static int psu_temp_create(void)
+{
+    int psu_num, temp_num;
+    unsigned int psu_index, i;
+    struct psu_obj_t *curr_psu;     /* point to psu1 psu2...*/
+
+    check_p(g_drv->get_dev_number);
+    temp_num = g_drv->get_dev_number(WB_MAIN_DEV_PSU, WB_MINOR_DEV_TEMP);
+    if (temp_num <= 0) {
+        PSU_INFO("psu temp_num:%d, don't need creat temp directory.\n", temp_num);
+        return 0;
+    }
+
+    psu_num = g_psu.psu_number;
+    for(psu_index = 1; psu_index <= psu_num; psu_index++) {
+        curr_psu = &g_psu.psu[psu_index - 1];
+        if(psuindex_temp_create_kobj_and_attrs(curr_psu, temp_num) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for(i = psu_index - 1; i > 0; i--) {
+        curr_psu = &g_psu.psu[i - 1];
+        temp_num = curr_psu->temp_number;
+        psuindex_temp_remove_kobj_and_attrs(curr_psu, temp_num);
+    }
+    return -EBADRQC;
+}
+
+static void psu_temp_remove(void)
+{
+    unsigned int psu_index;
+    struct psu_obj_t *curr_psu;
+
+    if (g_psu.psu) {
+       for (psu_index = g_psu.psu_number; psu_index > 0; psu_index--) {
+           curr_psu = &g_psu.psu[psu_index - 1];
+           if (curr_psu->temp) {
+               psuindex_temp_remove_kobj_and_attrs(curr_psu,curr_psu->temp_number);
+               kfree(curr_psu->temp);
+               curr_psu->temp = NULL;
+               curr_psu->temp_number = 0;
+           }
+       }
+    }
+    return;
+}
+
+static void psu_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct psu_obj_t *curr_psu;
+
+    curr_psu = &g_psu.psu[index - 1];
+    if (curr_psu->obj) {
+        sysfs_remove_group(&curr_psu->obj->kobj, &psu_attr_group);
+        wb_plat_kobject_delete(&curr_psu->obj);
+        PSU_DBG("delete psu%d.\n", index);
+    }
+    return;
+}
+
+static int psu_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct psu_obj_t *curr_psu;
+
+    curr_psu = &g_psu.psu[index-1];
+    PSU_DBG("create psu%d ...\n", index);
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "%s%d",PSU_SYSFS_NAME, index);
+    curr_psu->obj = wb_plat_kobject_create(name, parent);
+    if (!curr_psu->obj) {
+        PSU_ERR("create psu%d object error!\n", index);
+        return -EBADRQC;
+    }
+    curr_psu->obj->index = index;
+    if (sysfs_create_group(&curr_psu->obj->kobj, &psu_attr_group) != 0) {
+        PSU_ERR("create psu%d attrs error.\n", index);
+        wb_plat_kobject_delete(&curr_psu->obj);
+        return -EBADRQC;
+    }
+    PSU_DBG("create psu%d ok.\n", index);
+    return 0;
+}
+
+static int psu_sub_create_kobj_and_attrs(struct kobject *parent, int psu_num)
+{
+    unsigned int psu_index, i;
+
+    g_psu.psu = kzalloc(sizeof(struct psu_obj_t) * psu_num, GFP_KERNEL);
+    if (!g_psu.psu) {
+        PSU_ERR("kzalloc psu.psu error, psu number = %d.\n", psu_num);
+        return -ENOMEM;
+    }
+
+    for (psu_index = 1; psu_index <= psu_num; psu_index++) {
+        if (psu_sub_single_create_kobj_and_attrs(parent, psu_index) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for(i = psu_index - 1; i > 0; i--) {
+        psu_sub_single_remove_kobj_and_attrs(i);
+    }
+    if(g_psu.psu) {
+        kfree(g_psu.psu);
+        g_psu.psu = NULL;
+    }
+    return -EBADRQC;
+}
+
+static int psu_sub_create(void)
+{
+    int ret, psu_num;
+
+    check_p(g_drv->get_dev_number);
+    psu_num = g_drv->get_dev_number(WB_MAIN_DEV_PSU, WB_MINOR_DEV_NONE);
+    if (psu_num < 0) {
+        PSU_ERR("psu number = %d error.\n", psu_num);
+        return -EINVAL;
+    }
+    g_psu.psu_number = psu_num;
+    ret = psu_sub_create_kobj_and_attrs(&g_psu_obj->kobj, psu_num);
+    return ret;
+}
+
+static void psu_sub_remove(void)
+{
+    unsigned int psu_index;
+
+    if (g_psu.psu) {
+       for (psu_index = g_psu.psu_number; psu_index > 0; psu_index--) {
+           psu_sub_single_remove_kobj_and_attrs(psu_index);
+       }
+       kfree(g_psu.psu);
+    }
+    mem_clear(&g_psu, sizeof(struct psu_t));
+    return ;
+}
+
+static int psu_root_create(void)
+{
+    g_psu_obj = wb_plat_kobject_create(PSU_SYSFS_NAME, NULL);
+    if (!g_psu_obj) {
+        PSU_ERR("wb_plat_kobject_create psu error!\n");
+        return -ENOMEM;
+    }
+
+    if (sysfs_create_group(&g_psu_obj->kobj, &psu_root_attr_group) != 0) {
+        wb_plat_kobject_delete(&g_psu_obj);
+        PSU_ERR("create psu dir attrs error!\n");
+        return -EBADRQC;
+    }
+    PSU_DBG("wb_plat_kobject_create psu directory and attribute success.\n");
+    return 0;
+}
+
+static void psu_root_remove(void)
+{
+    if (g_psu_obj) {
+        sysfs_remove_group(&g_psu_obj->kobj, &psu_root_attr_group);
+        wb_plat_kobject_delete(&g_psu_obj);
+        PSU_DBG("delete psu root success\n");
+    }
+    return;
+}
+
+static int wb_psu_init(void)
+{
+    int ret;
+
+    PSU_INFO("wb_psu_init...\n");
+    g_drv = dfd_plat_driver_get();
+    check_p(g_drv);
+
+    ret = psu_root_create();
+    if (ret < 0) {
+        goto psu_root_error;
+    }
+
+    ret = psu_sub_create();
+    if (ret < 0) {
+        goto psu_sub_error;
+    }
+
+    ret = psu_temp_create();
+    if (ret < 0) {
+        goto psu_temp_error;
+    }
+
+    PSU_INFO("wb_psu_init ok.\n");
+    return 0;
+psu_temp_error:
+    psu_sub_remove();
+psu_sub_error:
+    psu_root_remove();
+psu_root_error:
+    return ret;
+}
+
+static void wb_psu_exit(void)
+{
+    psu_temp_remove();
+    psu_sub_remove();
+    psu_root_remove();
+    PSU_INFO("wb_psu_exit ok.\n");
+    return ;
+}
+
+module_init(wb_psu_init);
+module_exit(wb_psu_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("psu sysfs driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sensor.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sensor.c
new file mode 100644
index 000000000000..04b764e82df9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sensor.c
@@ -0,0 +1,457 @@
+/*
+ * plat_sensor.c
+ * Original Author: support 2020-02-17
+ *
+ * This module create sensor kobjects and attributes in /sys/wb_plat/sensor
+ *
+ * History
+ *  [Version]        [Author]                   [Date]            [Description]
+ *   *  v1.0          support                 2020-02-17          Initial version
+ */
+
+#include <linux/slab.h>
+
+#include "./include/plat_switch.h"
+#include "./include/sysfs_common.h"
+
+#define SENSOR_INFO(fmt, args...) LOG_INFO("sensor: ", fmt, ##args)
+#define SENSOR_ERR(fmt, args...)  LOG_ERR("sensor: ", fmt, ##args)
+#define SENSOR_DBG(fmt, args...)  LOG_DBG("sensor: ", fmt, ##args)
+
+struct sensor_t {
+    unsigned int in_number;
+    unsigned int temp_number;
+    struct sensor_in_t *in;
+    struct sensor_temp_t *temp;
+};
+
+struct sensor_temp_t {
+    struct switch_obj *obj;
+};
+
+struct sensor_in_t {
+    struct switch_obj *obj;
+};
+
+static int g_loglevel = 0;
+static struct switch_drivers_t *g_drv = NULL;
+static struct sensor_t g_sensor;
+static struct switch_obj *g_sensor_obj = NULL;
+
+static ssize_t sensor_temp_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_sensor.temp_number);
+}
+
+static ssize_t sensor_in_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_sensor.in_number);
+}
+
+static ssize_t sensor_voltage_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int in_index;
+    int ret;
+    struct switch_device_attribute *in_attr;
+
+    check_p(g_drv);
+    check_p(g_drv->get_voltage_info);
+    in_index = obj->index;
+
+    in_attr = to_switch_device_attr(attr);
+    check_p(in_attr);
+    SENSOR_DBG("sensor_in_show, in index:0x%x, in type:0x%x\n",in_index, in_attr->type);
+    ret = g_drv->get_voltage_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, in_index, in_attr->type, buf);
+    if (ret < 0) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+    return ret;
+}
+
+static ssize_t sensor_temp_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int temp_index;
+    int ret;
+    struct switch_device_attribute *temp_attr;
+
+    check_p(g_drv);
+    check_p(g_drv->get_temp_info);
+    temp_index = obj->index;
+
+    temp_attr = to_switch_device_attr(attr);
+    check_p(temp_attr);
+    SENSOR_DBG("sensor_temp_show, temp index:0x%x, temp type:0x%x\n", temp_index, temp_attr->type);
+    ret = g_drv->get_temp_info(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_NONE, temp_index, temp_attr->type, buf);
+    if (ret < 0) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+    return ret;
+}
+
+/************************************sensor dir and attrs*******************************************/
+static struct switch_attribute num_temp_att = __ATTR(num_temp_sensors, S_IRUGO, sensor_temp_number_show, NULL);
+static struct switch_attribute num_in_att = __ATTR(num_in_sensors, S_IRUGO, sensor_in_number_show, NULL);
+
+static struct attribute *sensor_dir_attrs[] = {
+    &num_temp_att.attr,
+    &num_in_att.attr,
+    NULL,
+};
+
+static struct attribute_group sensor_root_attr_group = {
+    .attrs = sensor_dir_attrs,
+};
+
+/*******************************temp0 temp1 dir and attrs*******************************************/
+static SWITCH_DEVICE_ATTR(temp_input, S_IRUGO, sensor_temp_show, NULL, WB_SENSOR_INPUT);
+static SWITCH_DEVICE_ATTR(temp_alias, S_IRUGO, sensor_temp_show, NULL, WB_SENSOR_ALIAS);
+static SWITCH_DEVICE_ATTR(temp_type, S_IRUGO, sensor_temp_show, NULL, WB_SENSOR_TYPE);
+static SWITCH_DEVICE_ATTR(temp_max, S_IRUGO, sensor_temp_show, NULL, WB_SENSOR_MAX);
+static SWITCH_DEVICE_ATTR(temp_max_hyst, S_IRUGO, sensor_temp_show, NULL, WB_SENSOR_MAX_HYST);
+static SWITCH_DEVICE_ATTR(temp_min, S_IRUGO, sensor_temp_show, NULL, WB_SENSOR_MIN);
+
+static struct attribute *sensor_temp_attrs[] = {
+    &switch_dev_attr_temp_input.switch_attr.attr,
+    &switch_dev_attr_temp_alias.switch_attr.attr,
+    &switch_dev_attr_temp_type.switch_attr.attr,
+    &switch_dev_attr_temp_max.switch_attr.attr,
+    &switch_dev_attr_temp_max_hyst.switch_attr.attr,
+    &switch_dev_attr_temp_min.switch_attr.attr,
+    NULL,
+};
+
+static struct attribute_group sensor_temp_attr_group = {
+    .attrs = sensor_temp_attrs,
+};
+
+/*******************************in0 in1 dir and attrs*******************************************/
+static SWITCH_DEVICE_ATTR(in_input, S_IRUGO, sensor_voltage_show, NULL, WB_SENSOR_INPUT);
+static SWITCH_DEVICE_ATTR(in_alias, S_IRUGO, sensor_voltage_show, NULL, WB_SENSOR_ALIAS);
+static SWITCH_DEVICE_ATTR(in_type, S_IRUGO, sensor_voltage_show, NULL, WB_SENSOR_TYPE);
+static SWITCH_DEVICE_ATTR(in_max, S_IRUGO, sensor_voltage_show, NULL, WB_SENSOR_MAX);
+static SWITCH_DEVICE_ATTR(in_min, S_IRUGO, sensor_voltage_show, NULL, WB_SENSOR_MIN);
+static SWITCH_DEVICE_ATTR(in_crit, S_IRUGO, sensor_voltage_show, NULL, WB_SENSOR_CRIT);
+
+static struct attribute *sensor_in_attrs[] = {
+    &switch_dev_attr_in_input.switch_attr.attr,
+    &switch_dev_attr_in_alias.switch_attr.attr,
+    &switch_dev_attr_in_type.switch_attr.attr,
+    &switch_dev_attr_in_max.switch_attr.attr,
+    &switch_dev_attr_in_min.switch_attr.attr,
+    &switch_dev_attr_in_crit.switch_attr.attr,
+    NULL,
+};
+
+static struct attribute_group sensor_in_attr_group = {
+    .attrs = sensor_in_attrs,
+};
+
+static int sensor_in_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct sensor_in_t *curr_sensor;
+
+    curr_sensor = &g_sensor.in[index - 1];
+    SENSOR_DBG("create sensor in%d ...\n", index);
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "in%d", index);
+    curr_sensor->obj = wb_plat_kobject_create(name, parent);
+    if (!curr_sensor->obj) {
+        SENSOR_ERR("create sensor in%d object error!\n", index);
+        return -EBADRQC;
+    }
+    curr_sensor->obj->index = index;
+    if (sysfs_create_group(&curr_sensor->obj->kobj, &sensor_in_attr_group) != 0) {
+        SENSOR_ERR("create sensor in%d attrs error.\n", index);
+        wb_plat_kobject_delete(&curr_sensor->obj);
+        return -EBADRQC;
+    }
+    SENSOR_DBG("create sensor in%d ok.\n", index);
+    return 0;
+
+}
+
+static void sensor_in_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct sensor_in_t *curr_in;
+
+    curr_in = &g_sensor.in[index - 1];
+    if (curr_in->obj) {
+        sysfs_remove_group(&curr_in->obj->kobj, &sensor_in_attr_group);
+        wb_plat_kobject_delete(&curr_in->obj);
+        SENSOR_DBG("delete in%d.\n", index);
+    }
+    return;
+}
+
+static int sensor_temp_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct sensor_temp_t *curr_sensor;
+
+    curr_sensor = &g_sensor.temp[index - 1];
+    SENSOR_DBG("create sensor temp%d ...\n", index);
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "temp%d", index);
+    curr_sensor->obj = wb_plat_kobject_create(name, parent);
+    if (!curr_sensor->obj) {
+        SENSOR_ERR("create sensor temp%d object error!\n", index);
+        return -EBADRQC;
+    }
+    curr_sensor->obj->index = index;
+    if (sysfs_create_group(&curr_sensor->obj->kobj, &sensor_temp_attr_group) != 0) {
+        SENSOR_ERR("create sensor temp%d attrs error.\n", index);
+        wb_plat_kobject_delete(&curr_sensor->obj);
+        return -EBADRQC;
+    }
+    SENSOR_DBG("create sensor temp%d ok.\n", index);
+    return 0;
+
+}
+
+static void sensor_temp_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct sensor_temp_t *curr_temp;
+
+    curr_temp = &g_sensor.temp[index - 1];
+    if (curr_temp->obj) {
+        sysfs_remove_group(&curr_temp->obj->kobj, &sensor_temp_attr_group);
+        wb_plat_kobject_delete(&curr_temp->obj);
+        SENSOR_DBG("delete temp%d.\n", index);
+    }
+    return;
+}
+
+static int sensor_temp_sub_create_kobj_and_attrs(struct kobject *parent, int temp_num)
+{
+    unsigned int temp_index, i;
+
+    g_sensor.temp = kzalloc(sizeof(struct sensor_temp_t) * temp_num, GFP_KERNEL);
+    if (!g_sensor.temp ) {
+        SENSOR_ERR("kzalloc g_sensor.temp error, temp number = %d.\n", temp_num);
+        return -ENOMEM;
+    }
+    for (temp_index = 1; temp_index <= temp_num; temp_index++) {
+        if (sensor_temp_sub_single_create_kobj_and_attrs(parent, temp_index) != 0 ) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = temp_index - 1; i > 0; i--) {
+        sensor_temp_sub_single_remove_kobj_and_attrs(i);
+    }
+
+    if (g_sensor.temp) {
+        kfree(g_sensor.temp);
+        g_sensor.temp = NULL;
+    }
+    return -EBADRQC;
+}
+
+static int sensor_in_sub_create_kobj_and_attrs(struct kobject *parent, int in_num)
+{
+    unsigned int in_index, i;
+
+    g_sensor.in = kzalloc(sizeof(struct sensor_in_t) * in_num, GFP_KERNEL);
+    if (!g_sensor.in) {
+        SENSOR_ERR("kzalloc g_sensor.in error, in number = %d.\n", in_num);
+        return -ENOMEM;
+    }
+
+    for (in_index = 1; in_index <= in_num; in_index++) {
+        if (sensor_in_sub_single_create_kobj_and_attrs(parent, in_index) != 0 ) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = in_index - 1; i > 0; i--) {
+        sensor_in_sub_single_remove_kobj_and_attrs(i);
+    }
+
+    if (g_sensor.in) {
+        kfree(g_sensor.in);
+        g_sensor.in = NULL;
+    }
+    return -EBADRQC;
+}
+
+static int sensor_temp_sub_create(void)
+{
+    int ret, temp_num;
+
+    check_p(g_drv->get_dev_number);
+    temp_num = g_drv->get_dev_number(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_TEMP);
+    g_sensor.temp_number = temp_num;
+    if (temp_num <= 0) {
+        SENSOR_DBG("Warning:sensor temp number = %d \n", temp_num);
+        return 0;
+    }
+    ret = sensor_temp_sub_create_kobj_and_attrs(&g_sensor_obj->kobj, temp_num);
+    return ret;
+}
+
+static int sensor_in_sub_create(void)
+{
+    int ret, in_num;
+
+    check_p(g_drv->get_dev_number);
+    in_num = g_drv->get_dev_number(WB_MAIN_DEV_MAINBOARD, WB_MINOR_DEV_IN);
+    g_sensor.in_number = in_num;
+
+    if (in_num <= 0) {
+        SENSOR_DBG("Warning:sensor in number = %d \n", in_num);
+        return 0;
+    }
+    ret = sensor_in_sub_create_kobj_and_attrs(&g_sensor_obj->kobj, in_num);
+    return ret;
+}
+
+static void temp_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct sensor_temp_t * curr_temp;
+
+    curr_temp = &g_sensor.temp[index - 1];
+    if (curr_temp->obj) {
+        sysfs_remove_group(&curr_temp->obj->kobj, &sensor_temp_attr_group);
+        wb_plat_kobject_delete(&curr_temp->obj);
+        SENSOR_DBG("delete sensor temp%d.\n", index);
+    }
+    return;
+}
+
+static void in_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct sensor_in_t * curr_in;
+
+    curr_in = &g_sensor.in[index - 1];
+    if (curr_in->obj) {
+        sysfs_remove_group(&curr_in->obj->kobj, &sensor_in_attr_group);
+        wb_plat_kobject_delete(&curr_in->obj);
+        SENSOR_DBG("delete sensor in%d.\n", index);
+    }
+    return;
+}
+
+static void sensor_temp_sub_remove(void)
+{
+    unsigned int temp_index;
+
+    if (g_sensor.temp) {
+       for (temp_index = g_sensor.temp_number; temp_index > 0; temp_index--) {
+           temp_sub_single_remove_kobj_and_attrs(temp_index);
+       }
+       kfree(g_sensor.temp);
+       g_sensor.temp = NULL;
+    }
+    return;
+}
+
+static void sensor_in_sub_remove(void)
+{
+    unsigned int in_index;
+
+    if (g_sensor.in) {
+       for (in_index = g_sensor.in_number; in_index > 0; in_index--) {
+           in_sub_single_remove_kobj_and_attrs(in_index);
+       }
+       kfree(g_sensor.in);
+       g_sensor.in = NULL;
+    }
+    return;
+}
+
+static void sensor_sub_remove(void)
+{
+    sensor_temp_sub_remove();
+    sensor_in_sub_remove();
+}
+
+static int sensor_sub_create(void)
+{
+    int ret;
+    /* temp creat */
+    ret = sensor_temp_sub_create();
+    if (ret < 0) {
+        goto temp_err;
+    }
+    /* Voltage creat */
+    ret = sensor_in_sub_create();
+    if (ret < 0) {
+        goto in_err;
+    }
+    return 0;
+in_err:
+    sensor_temp_sub_remove();
+temp_err:
+    return ret;
+}
+static void sensor_root_remove(void)
+{
+    if (g_sensor_obj) {
+        sysfs_remove_group(&g_sensor_obj->kobj, &sensor_root_attr_group);
+        wb_plat_kobject_delete(&g_sensor_obj);
+        SENSOR_DBG("delete sensor root success\n");
+    }
+
+    return;
+}
+
+static int sensor_root_create(void)
+{
+    g_sensor_obj = wb_plat_kobject_create("sensor", NULL);
+    if (!g_sensor_obj) {
+        SENSOR_ERR("wb_plat_kobject_create sensor error!\n");
+        return -ENOMEM;
+    }
+
+    if (sysfs_create_group(&g_sensor_obj->kobj, &sensor_root_attr_group) != 0) {
+        wb_plat_kobject_delete(&g_sensor_obj);
+        SENSOR_ERR("create sensor dir attrs error!\n");
+        return -EBADRQC;
+    }
+    SENSOR_DBG("wb_plat_kobject_create sensor directory and attribute success.\n");
+    return 0;
+}
+
+static int wb_sensor_init(void)
+{
+    int ret;
+
+    SENSOR_INFO("wb_sensor_init...\n");
+    g_drv = dfd_plat_driver_get();
+    check_p(g_drv);
+
+    ret = sensor_root_create();
+    if (ret < 0) {
+        goto sensor_root_error;
+    }
+
+    ret = sensor_sub_create();
+    if (ret < 0) {
+        goto sensor_sub_error;
+    }
+    SENSOR_INFO("sensor_init ok.\n");
+    return 0;
+sensor_sub_error:
+    sensor_root_remove();
+sensor_root_error:
+    return ret;
+}
+
+static void wb_sensor_exit(void)
+{
+    sensor_sub_remove();
+    sensor_root_remove();
+    SENSOR_INFO("sensor_exit ok.\n");
+    return;
+}
+
+module_init(wb_sensor_init);
+module_exit(wb_sensor_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("sensors sysfs driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sff.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sff.c
new file mode 100644
index 000000000000..8f09c551f62c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sff.c
@@ -0,0 +1,291 @@
+/*
+ * plat_sff.c
+ * Original Author: support 2020-02-17
+ *
+ * This module create sff kobjects and attributes in /sys/wb_plat/sff
+ *
+ * History
+ *  [Version]        [Author]                   [Date]            [Description]
+ *   *  v1.0         support                  2020-02-17         Initial version
+ */
+
+#include <linux/slab.h>
+
+#include "./include/plat_switch.h"
+#include "./include/sysfs_common.h"
+
+#define SFF_INFO(fmt, args...) LOG_INFO("sff: ", fmt, ##args)
+#define SFF_ERR(fmt, args...)  LOG_ERR("sff: ", fmt, ##args)
+#define SFF_DBG(fmt, args...)  LOG_DBG("sff: ", fmt, ##args)
+
+struct sff_obj_t{
+    struct switch_obj *sff_obj;
+    struct bin_attribute bin;
+    int sff_creat_bin_flag;
+};
+
+struct sff_t{
+    unsigned int sff_number;
+    struct sff_obj_t *sff;
+};
+
+static int g_loglevel = 0;
+static struct sff_t g_sff;
+static struct switch_obj *g_sff_obj = NULL;
+static struct switch_drivers_t *g_drv = NULL;
+
+static ssize_t sff_cpld_info_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int sff_index;
+    int ret;
+    struct switch_device_attribute *sff_cpld_attr;
+
+    check_p(g_drv);
+    check_p(g_drv->get_sff_cpld_info);
+
+    sff_index = obj->index;
+    sff_cpld_attr = to_switch_device_attr(attr);
+    check_p(sff_cpld_attr);
+    SFF_DBG("sff_cpld_info_show, sff index:0x%x, sff cpld attr type:0x%x\n", sff_index, sff_cpld_attr->type);
+    ret = g_drv->get_sff_cpld_info(sff_index, sff_cpld_attr->type, buf, PAGE_SIZE);
+    if(ret < 0) {
+        SFF_ERR("sff_cpld_info_show error. sff index:0x%x, sff cpld attr type:0x%x, ret:%d\n",
+            sff_index, sff_cpld_attr->type,ret );
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+    SFF_DBG("sff_cpld_info_show ok. sff index:0x%x, sff cpld attr type:0x%x, ret:%d\n", sff_index, sff_cpld_attr->type, ret);
+    return ret;
+}
+
+static ssize_t sff_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_sff.sff_number);
+}
+
+/************************************sff attrs*******************************************/
+static struct switch_attribute sff_number_att = __ATTR(num_sffs, S_IRUGO, sff_number_show, NULL);
+static SWITCH_DEVICE_ATTR(present, S_IRUGO, sff_cpld_info_show, NULL, WB_SFF_MODULE_PRESENT);
+
+/*******************************xcvr dir and attrs*******************************************/
+static struct attribute *xcvr_dir_attrs[] = {
+    &sff_number_att.attr,
+    NULL,
+};
+
+static struct attribute_group sff_xcvr_attr_group = {
+    .attrs = xcvr_dir_attrs,
+};
+
+/*******************************sff dir and attrs*******************************************/
+static struct attribute *sff_attrs[] = {
+    &switch_dev_attr_present.switch_attr.attr,
+    NULL,
+};
+
+static struct attribute_group sff_attr_group = {
+    .attrs = sff_attrs,
+};
+
+static int sff_sub_single_create_attrs(unsigned int index)
+{
+    struct sff_obj_t *curr_sff;
+
+    curr_sff = &g_sff.sff[index-1];
+    if (sysfs_create_group(&curr_sff->sff_obj->kobj, &sff_attr_group) != 0) {
+        SFF_ERR("create sff%d dir attrs error!\n", index);
+        wb_plat_kobject_delete(&curr_sff->sff_obj);
+        return -EBADRQC;
+    }
+    SFF_DBG("create sff%d dir attrs ok!\n", index);
+    return 0;
+}
+
+static int sff_sub_single_create_kobj(struct kobject *parent, unsigned int index)
+{
+    struct sff_obj_t *curr_sff;
+    char sff_dir_name[DIR_NAME_MAX_LEN];
+    int ret;
+
+    check_p(g_drv->get_sff_dir_name);
+    ret = g_drv->get_sff_dir_name(index, sff_dir_name, sizeof(sff_dir_name));
+    if (ret < 0) {
+        SFF_ERR("sff index:%d, get sff dir name error. please check sff config.\n", index);
+        return -ENOSYS;
+    }
+
+    curr_sff = &g_sff.sff[index - 1];
+
+    curr_sff->sff_obj = wb_plat_kobject_create(sff_dir_name, parent);
+    if (!curr_sff->sff_obj) {
+        SFF_ERR("sff index:%d, create %s object error! \n", index, sff_dir_name);
+        return -EBADRQC;
+    }
+
+    SFF_DBG("create sff kobj ok. sff index:%d, dir name:%s\n",index, sff_dir_name);
+    curr_sff->sff_obj->index = index;
+
+    return 0;
+}
+
+static void sff_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct sff_obj_t *curr_sff;
+
+    curr_sff = &g_sff.sff[index - 1];
+    /* remove sff dir and attr */
+    if (curr_sff->sff_obj) {
+        SFF_DBG("delete sff%d attrs.\n", curr_sff->sff_obj->index);
+        curr_sff->sff_obj->index = 0;
+        sysfs_remove_group(&curr_sff->sff_obj->kobj, &sff_attr_group);
+        wb_plat_kobject_delete(&curr_sff->sff_obj);
+    }
+
+    return;
+}
+
+static int sff_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    int ret;
+
+    ret = sff_sub_single_create_kobj(parent, index);
+    if (ret < 0) {
+        SFF_ERR("sff index:%d, create sff dir error.\n", index);
+        return ret;
+    }
+
+    ret = sff_sub_single_create_attrs(index);
+    if (ret < 0) {
+        SFF_ERR("sff index:%d, create sff attr error.\n", index);
+        return ret;
+    }
+    return 0;
+}
+
+static int sff_sub_create_kobj_and_attrs(struct kobject *parent, int sff_num)
+{
+    unsigned int sff_index, i;
+
+    g_sff.sff = kzalloc(sizeof(struct sff_obj_t) * sff_num, GFP_KERNEL);
+    if (!g_sff.sff) {
+        SFF_ERR("kzalloc g_sff.sff error, sff number = %d.\n", sff_num);
+        return -ENOMEM;
+    }
+
+    for (sff_index = 1; sff_index <= sff_num; sff_index++) {
+        if (sff_sub_single_create_kobj_and_attrs(parent, sff_index) != 0 ) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = sff_index - 1; i > 0; i--) {
+        sff_sub_single_remove_kobj_and_attrs(i);
+    }
+    if (g_sff.sff) {
+        kfree(g_sff.sff);
+        g_sff.sff = NULL;
+    }
+    return -EBADRQC;
+}
+
+static int sff_sub_create(void)
+{
+    int ret, sff_num;
+
+    check_p(g_drv->get_dev_number);
+    sff_num = g_drv->get_dev_number(WB_MAIN_DEV_SFF, WB_MINOR_DEV_NONE);
+    g_sff.sff_number = sff_num;
+    if (sff_num <= 0) {
+        SFF_ERR("ERROR. port number:%d\n", sff_num);
+        return -EINVAL;
+    }
+
+    ret = sff_sub_create_kobj_and_attrs(&g_sff_obj->kobj, sff_num);
+
+    return ret;
+}
+
+static void sff_sub_remove(void)
+{
+    unsigned int sff_index;
+
+    if (g_sff.sff) {
+       for (sff_index = g_sff.sff_number; sff_index > 0; sff_index--) {
+           sff_sub_single_remove_kobj_and_attrs(sff_index);
+       }
+       kfree(g_sff.sff);
+    }
+    mem_clear(&g_sff, sizeof(struct sff_t));
+    return ;
+}
+
+static int sff_xcvr_create(void)
+{
+    g_sff_obj = wb_plat_kobject_create(SFF_SYSFS_NAME, NULL);
+    if (!g_sff_obj) {
+        SFF_ERR("wb_plat_kobject_create sff error!\n");
+        return -ENOMEM;
+    }
+
+    g_sff_obj->index = 0;
+    if (sysfs_create_group(&g_sff_obj->kobj, &sff_xcvr_attr_group) != 0) {
+        wb_plat_kobject_delete(&g_sff_obj);
+        SFF_ERR("create sff dir attrs error!\n");
+        return -EBADRQC;
+    }
+    SFF_DBG("wb_plat_kobject_create sff directory and attribute success.\n");
+    return 0;
+}
+
+static void sff_xcvr_remove(void)
+{
+    if (g_sff_obj) {
+        sysfs_remove_group(&g_sff_obj->kobj, &sff_xcvr_attr_group);
+        wb_plat_kobject_delete(&g_sff_obj);
+        SFF_DBG("delete sff root success\n");
+    }
+
+    return;
+}
+
+static int wb_sff_init(void)
+{
+    int ret;
+
+    SFF_INFO("wb_sff_init...\n");
+    g_drv = dfd_plat_driver_get();
+    check_p(g_drv);
+
+    ret = sff_xcvr_create();
+    if (ret < 0) {
+        goto sff_root_error;
+    }
+
+    ret = sff_sub_create();
+    if (ret < 0) {
+        goto sff_sub_error;
+    }
+    SFF_INFO("wb_sff_init ok.\n");
+    return 0;
+
+sff_sub_error:
+    sff_xcvr_remove();
+sff_root_error:
+    return ret;
+}
+
+static void wb_sff_exit(void)
+{
+    sff_sub_remove();
+    sff_xcvr_remove();
+    SFF_INFO("wb_sff_exit ok.\n");
+    return ;
+}
+
+module_init(wb_sff_init);
+module_exit(wb_sff_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("sff sysfs driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_slot.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_slot.c
new file mode 100644
index 000000000000..97539a4c24cc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_slot.c
@@ -0,0 +1,667 @@
+/*
+ * plat_slot.c
+ * Original Author: support 2020-02-17
+ *
+ * This module create sff kobjects and attributes in /sys/wb_plat/slot
+ *
+ * History
+ *  [Version]        [Author]                   [Date]            [Description]
+ *   *  v1.0         support                  2020-02-17         Initial version
+ */
+
+#include <linux/slab.h>
+
+#include "./include/plat_switch.h"
+#include "./include/sysfs_common.h"
+
+#define SLOT_INFO(fmt, args...) LOG_INFO("slot: ", fmt, ##args)
+#define SLOT_ERR(fmt, args...)  LOG_ERR("slot: ", fmt, ##args)
+#define SLOT_DBG(fmt, args...)  LOG_DBG("slot: ", fmt, ##args)
+
+struct slot_temp_obj_t{
+    struct switch_obj *obj;
+};
+
+struct slot_in_obj_t{
+    struct switch_obj *obj;
+};
+
+struct slot_obj_t{
+    unsigned int temp_number;
+    unsigned int in_number;
+    struct slot_temp_obj_t *temp;
+    struct slot_in_obj_t *in;
+    struct switch_obj *obj;
+};
+
+struct slot_t{
+    unsigned int slot_number;
+    struct slot_obj_t *slot;
+};
+
+static int g_loglevel = 0;
+static struct slot_t g_slot;
+static struct switch_obj *g_slot_obj = NULL;
+static struct switch_drivers_t *g_drv = NULL;
+
+static ssize_t slot_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_slot.slot_number);
+}
+
+static ssize_t slot_temp_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int index;
+
+    index = obj->index;
+    SLOT_DBG("slot_temp_number_show,slot index:%d\n",index);
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_slot.slot[index-1].temp_number);
+}
+
+static ssize_t slot_in_number_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int index;
+
+    index = obj->index;
+    SLOT_DBG("slot_in_number_show,slot index:%d\n",index);
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", g_slot.slot[index-1].in_number);
+}
+
+static ssize_t slot_present_status_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index;
+    int ret;
+
+    slot_index = obj->index;
+    SLOT_DBG("slot_present_status_show, slot index:%d\n",slot_index);
+    check_p(g_drv);
+    check_p(g_drv->get_slot_present_status);
+
+    ret = g_drv->get_slot_present_status(slot_index);
+    if(ret < 0) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", ret);
+}
+
+static ssize_t slot_voltage_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, in_index;
+    int ret;
+    struct switch_obj *p_obj;
+    struct switch_device_attribute *in_attr;
+
+    check_p(g_drv);
+    check_p(g_drv->get_voltage_info);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    check_p(p_obj);
+
+    slot_index = p_obj->index;
+    in_index = obj->index;
+
+    in_attr = to_switch_device_attr(attr);
+    check_p(in_attr);
+    SLOT_DBG("slot_voltage_show, slot index:0x%x, temp index:0x%x, temp type:0x%x\n",slot_index, in_index, in_attr->type);
+    ret = g_drv->get_voltage_info(WB_MAIN_DEV_SLOT, slot_index, in_index, in_attr->type, buf);
+    if(ret < 0) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+    return ret;
+}
+
+static ssize_t slot_temp_show(struct switch_obj *obj, struct switch_attribute *attr, char *buf)
+{
+    unsigned int slot_index, temp_index;
+    int ret;
+    struct switch_obj *p_obj;
+    struct switch_device_attribute *temp_attr;
+
+    check_p(g_drv);
+    check_p(g_drv->get_temp_info);
+
+    p_obj = to_switch_obj(obj->kobj.parent);
+    check_p(p_obj);
+
+    slot_index = p_obj->index;
+    temp_index = obj->index;
+
+    temp_attr = to_switch_device_attr(attr);
+    check_p(temp_attr);
+    SLOT_DBG("slot_temp_show, slot index:0x%x, temp index:0x%x, temp type:0x%x\n",slot_index, temp_index, temp_attr->type);
+    ret = g_drv->get_temp_info(WB_MAIN_DEV_SLOT, slot_index, temp_index, temp_attr->type, buf);
+    if(ret < 0) {
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", WB_SYSFS_DEV_ERROR);
+    }
+    return ret;
+}
+
+/************************************slot dir and attrs*******************************************/
+static struct switch_attribute slot_number_att = __ATTR(num_slots, S_IRUGO, slot_number_show, NULL);
+
+static struct attribute *slot_dir_attrs[] = {
+    &slot_number_att.attr,
+    NULL,
+};
+
+static struct attribute_group slot_root_attr_group = {
+    .attrs = slot_dir_attrs,
+};
+
+/*******************************slot1 slot2 dir and attrs*******************************************/
+static struct switch_attribute num_temp_sensors_att = __ATTR(num_temp_sensors, S_IRUGO, slot_temp_number_show, NULL);
+static struct switch_attribute num_in_sensors_att = __ATTR(num_in_sensors, S_IRUGO, slot_in_number_show, NULL);
+static struct switch_attribute slot_present_status_att = __ATTR(present, S_IRUGO, slot_present_status_show, NULL);
+
+static struct attribute *slot_attrs[] = {
+    &num_temp_sensors_att.attr,
+    &num_in_sensors_att.attr,
+    &slot_present_status_att.attr,
+    NULL,
+};
+
+static struct attribute_group slot_attr_group = {
+    .attrs = slot_attrs,
+};
+
+/*******************************temp dir and attrs*******************************************/
+static SWITCH_DEVICE_ATTR(temp_alias, S_IRUGO, slot_temp_show, NULL, WB_SENSOR_ALIAS);
+static SWITCH_DEVICE_ATTR(temp_type, S_IRUGO, slot_temp_show, NULL, WB_SENSOR_TYPE);
+static SWITCH_DEVICE_ATTR(temp_max, S_IRUGO, slot_temp_show, NULL, WB_SENSOR_MAX);
+static SWITCH_DEVICE_ATTR(temp_max_hyst, S_IRUGO, slot_temp_show, NULL, WB_SENSOR_MAX_HYST);
+static SWITCH_DEVICE_ATTR(temp_min, S_IRUGO, slot_temp_show, NULL, WB_SENSOR_MIN);
+static SWITCH_DEVICE_ATTR(temp_input, S_IRUGO, slot_temp_show, NULL, WB_SENSOR_INPUT);
+
+static struct attribute *temp_attrs[] = {
+    &switch_dev_attr_temp_alias.switch_attr.attr,
+    &switch_dev_attr_temp_type.switch_attr.attr,
+    &switch_dev_attr_temp_max.switch_attr.attr,
+    &switch_dev_attr_temp_max_hyst.switch_attr.attr,
+    &switch_dev_attr_temp_min.switch_attr.attr,
+    &switch_dev_attr_temp_input.switch_attr.attr,
+    NULL,
+};
+
+static struct attribute_group temp_attr_group = {
+    .attrs = temp_attrs,
+};
+
+/*******************************Voltage dir and attrs*******************************************/
+static SWITCH_DEVICE_ATTR(in_alias, S_IRUGO, slot_voltage_show, NULL, WB_SENSOR_ALIAS);
+static SWITCH_DEVICE_ATTR(in_type, S_IRUGO, slot_voltage_show, NULL, WB_SENSOR_TYPE);
+static SWITCH_DEVICE_ATTR(in_max, S_IRUGO, slot_voltage_show, NULL, WB_SENSOR_MAX);
+static SWITCH_DEVICE_ATTR(in_crit, S_IRUGO, slot_voltage_show, NULL, WB_SENSOR_CRIT);
+static SWITCH_DEVICE_ATTR(in_min, S_IRUGO, slot_voltage_show, NULL, WB_SENSOR_MIN);
+static SWITCH_DEVICE_ATTR(in_input, S_IRUGO, slot_voltage_show, NULL, WB_SENSOR_INPUT);
+
+static struct attribute *in_attrs[] = {
+    &switch_dev_attr_in_alias.switch_attr.attr,
+    &switch_dev_attr_in_type.switch_attr.attr,
+    &switch_dev_attr_in_max.switch_attr.attr,
+    &switch_dev_attr_in_crit.switch_attr.attr,
+    &switch_dev_attr_in_min.switch_attr.attr,
+    &switch_dev_attr_in_input.switch_attr.attr,
+    NULL,
+};
+
+static struct attribute_group in_attr_group = {
+    .attrs = in_attrs,
+};
+
+static void slotindex_single_temp_remove_kobj_and_attrs(struct slot_obj_t * curr_slot, unsigned int temp_index)
+{
+
+    struct slot_temp_obj_t *curr_temp; /* point to temp1 temp2...*/
+
+    curr_temp = &curr_slot->temp[temp_index - 1];
+    if (curr_temp->obj) {
+        sysfs_remove_group(&curr_temp->obj->kobj, &temp_attr_group);
+        wb_plat_kobject_delete(&curr_temp->obj);
+        SLOT_DBG("delete slot:%d temp%d.\n", curr_slot->obj->index, temp_index);
+    }
+    return;
+}
+
+static int slotindex_single_temp_create_kobj_and_attrs(struct slot_obj_t * curr_slot, unsigned int temp_index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct slot_temp_obj_t *curr_temp; /* point to temp1 temp2...*/
+
+    curr_temp = &curr_slot->temp[temp_index - 1];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "%s%d", TEMP_SYSFS_NAME, temp_index);
+
+    curr_temp->obj = wb_plat_kobject_create(name, &curr_slot->obj->kobj);
+    if (!curr_temp->obj) {
+        SLOT_ERR("create slot_index:%d, temp%d object error!\n", curr_slot->obj->index, temp_index);
+        return -EBADRQC;
+    }
+    curr_temp->obj->index = temp_index;
+    if (sysfs_create_group(&curr_temp->obj->kobj, &temp_attr_group) != 0) {
+        SLOT_ERR("create slot_index:%d, temp%d attrs error.\n", curr_slot->obj->index, temp_index);
+        wb_plat_kobject_delete(&curr_temp->obj);
+        return -EBADRQC;
+    }
+    SLOT_DBG("create slot_index:%d, temp%d ok.\n", curr_slot->obj->index, temp_index);
+    return 0;
+}
+
+static void slotindex_temp_remove_kobj_and_attrs(struct slot_obj_t * curr_slot)
+{
+    int temp_index;
+
+    for(temp_index = curr_slot->temp_number; temp_index > 0; temp_index--) {
+        slotindex_single_temp_remove_kobj_and_attrs(curr_slot, temp_index);
+    }
+
+    if(curr_slot->temp) {
+        kfree(curr_slot->temp);
+        curr_slot->temp = NULL;
+        curr_slot->temp_number = 0;
+    }
+    return;
+}
+
+static int slotindex_temp_create_kobj_and_attrs(struct slot_obj_t * curr_slot, int temp_num)
+{
+    int temp_index, i;
+
+    curr_slot->temp_number = temp_num;
+    curr_slot->temp = kzalloc(sizeof(struct slot_temp_obj_t) * temp_num, GFP_KERNEL);
+    if (!curr_slot->temp) {
+        SLOT_ERR("kzalloc slot temp error, slot index = %d, temp number = %d.\n", curr_slot->obj->index, temp_num);
+        return -ENOMEM;
+    }
+
+    for (temp_index = 1; temp_index <= temp_num; temp_index++) {
+        if (slotindex_single_temp_create_kobj_and_attrs(curr_slot, temp_index) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = temp_index - 1; i > 0; i--) {
+        slotindex_single_temp_remove_kobj_and_attrs(curr_slot, i);
+    }
+
+    if (curr_slot->temp) {
+        kfree(curr_slot->temp);
+        curr_slot->temp = NULL;
+        curr_slot->temp_number = 0;
+    }
+    return -EBADRQC;
+}
+
+static void slotindex_single_in_remove_kobj_and_attrs(struct slot_obj_t * curr_slot, unsigned int in_index)
+{
+
+    struct slot_in_obj_t *curr_in; /* point to in1 in2...*/
+
+    curr_in = &curr_slot->in[in_index - 1];
+    if (curr_in->obj) {
+        sysfs_remove_group(&curr_in->obj->kobj, &in_attr_group);
+        wb_plat_kobject_delete(&curr_in->obj);
+        SLOT_DBG("delete slot:%d in%d.\n", curr_slot->obj->index, in_index);
+    }
+    return;
+}
+
+static int slotindex_single_in_create_kobj_and_attrs(struct slot_obj_t * curr_slot, unsigned int in_index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct slot_in_obj_t *curr_in; /* point to in1 in2...*/
+
+    curr_in = &curr_slot->in[in_index - 1];
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "%s%d", VOLTAGE_SYSFS_NAME, in_index);
+    curr_in->obj = wb_plat_kobject_create(name, &curr_slot->obj->kobj);
+    if (!curr_in->obj) {
+        SLOT_ERR("create slot_index:%d, in%d object error!\n", curr_slot->obj->index, in_index);
+        return -EBADRQC;
+    }
+    curr_in->obj->index = in_index;
+    if (sysfs_create_group(&curr_in->obj->kobj, &in_attr_group) != 0) {
+        SLOT_ERR("create slot_index:%d, in%d attrs error.\n", curr_slot->obj->index, in_index);
+        wb_plat_kobject_delete(&curr_in->obj);
+        return -EBADRQC;
+    }
+    SLOT_DBG("create slot_index:%d, in%d ok.\n", curr_slot->obj->index, in_index);
+    return 0;
+}
+
+static void slotindex_in_remove_kobj_and_attrs(struct slot_obj_t * curr_slot)
+{
+    int in_index;
+
+    for(in_index = curr_slot->in_number; in_index > 0; in_index--) {
+        slotindex_single_in_remove_kobj_and_attrs(curr_slot, in_index);
+    }
+
+    if(curr_slot->in) {
+        kfree(curr_slot->in);
+        curr_slot->in = NULL;
+        curr_slot->in_number = 0;
+    }
+    return;
+}
+
+static int slotindex_in_create_kobj_and_attrs(struct slot_obj_t * curr_slot, int in_num)
+{
+    int in_index, i;
+
+    curr_slot->in_number = in_num;
+    curr_slot->in = kzalloc(sizeof(struct slot_in_obj_t) * in_num, GFP_KERNEL);
+    if (!curr_slot->in) {
+        SLOT_ERR("kzalloc slot Voltage error, slot index = %d, Voltage number = %d.\n", curr_slot->obj->index, in_num);
+        return -ENOMEM;
+    }
+
+    for (in_index = 1; in_index <= in_num; in_index++) {
+        if (slotindex_single_in_create_kobj_and_attrs(curr_slot, in_index) != 0 ) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = in_index - 1; i > 0; i++) {
+        slotindex_single_in_remove_kobj_and_attrs(curr_slot, i);
+    }
+
+    if (curr_slot->in) {
+        kfree(curr_slot->in);
+        curr_slot->in = NULL;
+        curr_slot->in_number = 0;
+    }
+    return -EBADRQC;
+}
+
+static void slotindex_obj_remove_kobj_and_attrs(struct slot_obj_t * curr_slot, unsigned int obj_id)
+{
+    switch (obj_id) {
+    case WB_MINOR_DEV_TEMP:
+        slotindex_temp_remove_kobj_and_attrs(curr_slot);
+        break;
+    case WB_MINOR_DEV_IN:
+        slotindex_in_remove_kobj_and_attrs(curr_slot);
+        break;
+    default:
+        SLOT_ERR("Unknow obj id:%d\n", obj_id);
+    }
+    return ;
+}
+
+static int slotindex_obj_create_kobj_and_attrs(struct slot_obj_t * curr_slot, unsigned int obj_id, int obj_num)
+{
+    int ret;
+
+    switch (obj_id) {
+    case WB_MINOR_DEV_TEMP:
+        ret = slotindex_temp_create_kobj_and_attrs(curr_slot, obj_num);
+        break;
+    case WB_MINOR_DEV_IN:
+        ret = slotindex_in_create_kobj_and_attrs(curr_slot, obj_num);
+        break;
+    default:
+        SLOT_ERR("Unknow obj id:%d\n", obj_id);
+        ret = -EINVAL;
+    }
+    return ret;
+}
+
+static void slot_child_obj_remove_by_id(unsigned int obj_id)
+{
+    int slot_num;
+    unsigned int slot_index;
+    struct slot_obj_t *curr_slot;     /* point to slot1 slot2...*/
+
+    slot_num = g_slot.slot_number;
+    if (slot_num <= 0 || !g_slot.slot) {
+        SLOT_DBG("Warning:slot number = %d\n", slot_num);
+        return;
+    }
+
+    for(slot_index = slot_num; slot_index > 0; slot_index--) {
+        curr_slot = &g_slot.slot[slot_index - 1];
+        slotindex_obj_remove_kobj_and_attrs(curr_slot, obj_id);
+    }
+    return;
+}
+
+static int slot_child_obj_create_by_id(unsigned int obj_id)
+{
+    int slot_num, obj_num;
+    unsigned int slot_index, i;
+    struct slot_obj_t *curr_slot;     /* point to slot1 slot2...*/
+
+    check_p(g_drv->get_dev_number);
+    obj_num = g_drv->get_dev_number(WB_MAIN_DEV_SLOT,obj_id);
+    slot_num = g_slot.slot_number;
+    if (obj_num <= 0 || slot_num <= 0 || !g_slot.slot) {
+        SLOT_DBG("Warning:slot number = %d, object number:%d.obj_id:%d\n", slot_num, obj_num, obj_id);
+        return 0;
+    }
+
+    for (slot_index = 1; slot_index <= slot_num; slot_index++) {
+        curr_slot = &g_slot.slot[slot_index - 1];
+        if (slotindex_obj_create_kobj_and_attrs(curr_slot, obj_id, obj_num) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for(i = slot_index - 1; i > 0; i++) {
+        curr_slot = &g_slot.slot[i - 1];
+        slotindex_obj_remove_kobj_and_attrs(curr_slot, obj_id);
+    }
+    return -EBADRQC;
+}
+
+static void slot_child_obj_remove(void)
+{
+    /* temp remove */
+    slot_child_obj_remove_by_id(WB_MINOR_DEV_TEMP);
+
+    /* in creat */
+    slot_child_obj_remove_by_id(WB_MINOR_DEV_IN);
+    return;
+}
+
+static int slot_child_obj_create(void)
+{
+    int ret;
+
+    /* temp creat */
+    ret = slot_child_obj_create_by_id(WB_MINOR_DEV_TEMP);
+    if (ret < 0) {
+        goto temp_err;
+    }
+    /* Voltage creat */
+    ret = slot_child_obj_create_by_id(WB_MINOR_DEV_IN);
+    if(ret < 0) {
+        goto in_err;
+    }
+    return 0;
+in_err:
+    slot_child_obj_remove_by_id(WB_MINOR_DEV_TEMP);
+temp_err:
+    return ret;
+}
+
+static void slot_sub_single_remove_kobj_and_attrs(unsigned int index)
+{
+    struct slot_obj_t *curr_slot;
+
+    curr_slot = &g_slot.slot[index - 1];
+    if (curr_slot->obj) {
+        sysfs_remove_group(&curr_slot->obj->kobj, &slot_attr_group);
+        wb_plat_kobject_delete(&curr_slot->obj);
+        SLOT_DBG("delete slot%d.\n", index);
+    }
+    return;
+}
+
+static int slot_sub_single_create_kobj_and_attrs(struct kobject *parent, unsigned int index)
+{
+    char name[DIR_NAME_MAX_LEN];
+    struct slot_obj_t *curr_slot;
+
+    curr_slot = &g_slot.slot[index - 1];
+    SLOT_DBG("create %s%d ...\n", SLOT_SYSFS_NAME, index);
+    mem_clear(name, sizeof(name));
+    snprintf(name, sizeof(name), "%s%d", SLOT_SYSFS_NAME, index);
+    curr_slot->obj = wb_plat_kobject_create(name, parent);
+    if (!curr_slot->obj) {
+        SLOT_ERR("create slot%d object error!\n", index);
+        return -EBADRQC;
+    }
+    curr_slot->obj->index = index;
+    if (sysfs_create_group(&curr_slot->obj->kobj, &slot_attr_group) != 0) {
+        SLOT_ERR("create slot%d attrs error.\n", index);
+        wb_plat_kobject_delete(&curr_slot->obj);
+        return -EBADRQC;
+    }
+    SLOT_DBG("create slot%d ok.\n", index);
+    return 0;
+}
+
+static int slot_sub_create_kobj_and_attrs(struct kobject *parent, int slot_num)
+{
+    unsigned int slot_index, i;
+
+    g_slot.slot = kzalloc(sizeof(struct slot_obj_t) * slot_num, GFP_KERNEL);
+    if (!g_slot.slot) {
+        SLOT_ERR("kzalloc slot.slot error, slot number = %d.\n", slot_num);
+        return -ENOMEM;
+    }
+
+    for (slot_index = 1; slot_index <= slot_num; slot_index++) {
+        if (slot_sub_single_create_kobj_and_attrs(parent, slot_index) != 0) {
+            goto error;
+        }
+    }
+    return 0;
+error:
+    for (i = slot_index - 1; i > 0; i--) {
+        slot_sub_single_remove_kobj_and_attrs(i);
+    }
+    if (g_slot.slot) {
+        kfree(g_slot.slot);
+        g_slot.slot = NULL;
+    }
+    return -EBADRQC;
+}
+
+/* create slot1 slot2...dir and attrs */
+static int slot_sub_create(void)
+{
+    int ret, slot_num;
+
+    check_p(g_drv->get_dev_number);
+    slot_num = g_drv->get_dev_number(WB_MAIN_DEV_SLOT, WB_MINOR_DEV_NONE);
+    g_slot.slot_number = slot_num;
+    if (slot_num <= 0) {
+        SLOT_DBG("Warning:slot number = %d \n", slot_num);
+        return 0;
+    }
+    ret = slot_sub_create_kobj_and_attrs(&g_slot_obj->kobj, slot_num);
+    return ret;
+}
+
+/**
+ * slot_sub_remove - delete slot1 slot2...dir and attrs
+ */
+static void slot_sub_remove(void)
+{
+    unsigned int slot_index;
+
+    if (g_slot.slot) {
+       for (slot_index = g_slot.slot_number; slot_index > 0; slot_index--) {
+           slot_sub_single_remove_kobj_and_attrs(slot_index);
+       }
+       kfree(g_slot.slot);
+    }
+    mem_clear(&g_slot, sizeof(struct slot_t));
+    return ;
+}
+
+/* create slot dir  and num_slots attr */
+static int slot_root_create(void)
+{
+    g_slot_obj = wb_plat_kobject_create(SLOT_SYSFS_NAME, NULL);
+    if (!g_slot_obj) {
+        SLOT_ERR("wb_plat_kobject_create slot error!\n");
+        return -ENOMEM;
+    }
+
+    if (sysfs_create_group(&g_slot_obj->kobj, &slot_root_attr_group) != 0) {
+        wb_plat_kobject_delete(&g_slot_obj);
+        SLOT_ERR("create slot dir attrs error!\n");
+        return -EBADRQC;
+    }
+    SLOT_DBG("wb_plat_kobject_create slot directory and attribute success.\n");
+    return 0;
+}
+
+static void slot_root_remove(void)
+{
+    if (g_slot_obj) {
+        sysfs_remove_group(&g_slot_obj->kobj, &slot_root_attr_group);
+        wb_plat_kobject_delete(&g_slot_obj);
+        SLOT_DBG("delete slot root success\n");
+    }
+
+    return;
+}
+
+static int wb_slot_init(void)
+{
+    int ret;
+
+    SLOT_INFO("wb_slot_init...\n");
+    g_drv = dfd_plat_driver_get();
+    check_p(g_drv);
+
+    ret = slot_root_create();
+    if (ret < 0) {
+        goto slot_root_error;
+    }
+
+    ret = slot_sub_create();
+    if (ret < 0) {
+        goto slot_sub_error;
+    }
+
+    ret = slot_child_obj_create();
+    if (ret < 0) {
+        goto slot_child_obj_error;
+    }
+
+    SLOT_INFO("wb_slot_init ok.\n");
+    return 0;
+slot_child_obj_error:
+    slot_sub_remove();
+slot_sub_error:
+    slot_root_remove();
+slot_root_error:
+    return ret;
+}
+
+static void wb_slot_exit(void)
+{
+    slot_child_obj_remove();
+    slot_sub_remove();
+    slot_root_remove();
+    SLOT_INFO("wb_slot_exit ok.\n");
+    return ;
+}
+
+module_init(wb_slot_init);
+module_exit(wb_slot_exit);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("slot sysfs driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_switch.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_switch.c
new file mode 100644
index 000000000000..7c71fdb3bd62
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_switch.c
@@ -0,0 +1,135 @@
+/*
+ * plat_switch.c
+ * Original Author: support 2020-02-17
+ *
+ * This module create a kset in sysfs called /sys/wb_plat
+ * Then other switch kobjects are created and assigned to this kset,
+ * such as "board", "cpld", "fan", "psu", "sff", ...
+ *
+ * History
+ *  [Version]        [Author]          [Date]             [Description]
+ *   *  v1.0          support         2020-02-17          Initial version
+ */
+#include "./include/plat_switch.h"
+
+#define SWITCH_INFO(fmt, args...)  LOG_INFO("switch: ", fmt, ##args)
+#define SWITCH_ERR(fmt, args...)   LOG_ERR("switch: ", fmt, ##args)
+#define SWITCH_DBG(fmt, args...)   LOG_DBG("switch: ", fmt, ##args)
+
+static int g_loglevel = 0;
+
+static ssize_t switch_attr_show(struct kobject *kobj,
+                   struct attribute *attr, char *buf)
+{
+    struct switch_attribute *attribute;
+    struct switch_obj *device;
+
+    attribute = to_switch_attr(attr);
+    device = to_switch_obj(kobj);
+
+    if (!attribute->show)
+        return -ENOSYS;
+
+    return attribute->show(device, attribute, buf);
+}
+
+static ssize_t switch_attr_store(struct kobject *kobj,
+                   struct attribute *attr, const char *buf, size_t len)
+{
+    struct switch_attribute *attribute;
+    struct switch_obj *obj;
+
+    attribute = to_switch_attr(attr);
+    obj = to_switch_obj(kobj);
+
+    if (!attribute->store)
+        return -ENOSYS;
+
+    return attribute->store(obj, attribute, buf, len);
+}
+
+static const struct sysfs_ops switch_sysfs_ops = {
+    .show = switch_attr_show,
+    .store = switch_attr_store,
+};
+
+static void switch_obj_release(struct kobject *kobj)
+{
+    struct switch_obj *obj;
+
+    obj = to_switch_obj(kobj);
+    kfree(obj);
+}
+
+static struct kobj_type switch_ktype = {
+    .sysfs_ops = &switch_sysfs_ops,
+    .release = switch_obj_release,
+    .default_attrs = NULL,
+};
+
+static struct kset *switch_kset;
+
+struct switch_obj *wb_plat_kobject_create(const char *name, struct kobject *parent)
+{
+    struct switch_obj *obj = NULL;
+    int ret = 0;
+
+    obj = kzalloc(sizeof(*obj), GFP_KERNEL);
+    if (!obj) {
+        SWITCH_DBG("wb_plat_kobject_create %s kzalloc error", name);
+        return NULL;
+   }
+
+    obj->kobj.kset = switch_kset;
+
+    ret = kobject_init_and_add(&obj->kobj, &switch_ktype, parent, "%s", name);
+    if (ret) {
+        kobject_put(&obj->kobj);
+        SWITCH_DBG("kobject_init_and_add %s error", name);
+        return NULL;
+    }
+
+    return obj;
+}
+
+void wb_plat_kobject_delete(struct switch_obj **obj)
+{
+    if (*obj) {
+        SWITCH_DBG("%s delete %s.\n", (*obj)->kobj.parent->name, (*obj)->kobj.name);
+        kobject_put(&((*obj)->kobj));
+        *obj = NULL;
+    }
+}
+
+static int __init switch_init(void)
+{
+    SWITCH_INFO("...\n");
+
+    switch_kset = kset_create_and_add("wb_plat", NULL, NULL);
+    if (!switch_kset) {
+        SWITCH_ERR("create switch_kset error.\n");
+        return -ENOMEM;
+    }
+
+    SWITCH_INFO("ok.\n");
+    return 0;
+}
+
+static void __exit switch_exit(void)
+{
+    if (switch_kset) {
+        kset_unregister(switch_kset);
+    }
+
+    SWITCH_INFO("ok.\n");
+}
+
+module_init(switch_init);
+module_exit(switch_exit);
+EXPORT_SYMBOL(wb_plat_kobject_create);
+EXPORT_SYMBOL(wb_plat_kobject_delete);
+module_param(g_loglevel, int, 0644);
+MODULE_PARM_DESC(g_loglevel, "the log level(info=0x1, err=0x2, dbg=0x4).\n");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("Switch driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common.h
new file mode 100644
index 000000000000..9e4a4fae00c1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common.h
@@ -0,0 +1,74 @@
+#ifndef __PLATFORM_COMMON_H__
+#define __PLATFORM_COMMON_H__
+
+#include<linux/kernel.h>
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+typedef enum {
+    DBG_START,
+    DBG_VERBOSE,
+    DBG_KEY,
+    DBG_WARN,
+    DBG_ERROR,
+    DBG_END,
+} dbg_level_t;
+
+ typedef struct dfd_i2c_dev_s {
+     int bus;
+     int addr;
+ } dfd_i2c_dev_t;
+
+typedef struct  dfd_dev_head_info_s {
+    uint8_t   ver;
+    uint8_t   flag;
+    uint8_t   hw_ver;
+    uint8_t   type;
+    int16_t   tlv_len;
+} dfd_dev_head_info_t;
+
+typedef struct dfd_dev_tlv_info_s {
+    uint8_t  type;
+    uint8_t  len;
+    uint8_t  data[0];
+} dfd_dev_tlv_info_t;
+
+typedef enum dfd_dev_info_type_e {
+    DFD_DEV_INFO_TYPE_MAC        = 1,
+    DFD_DEV_INFO_TYPE_NAME       = 2,
+    DFD_DEV_INFO_TYPE_SN         = 3,
+    DFD_DEV_INFO_TYPE_PWR_CONS   = 4,
+    DFD_DEV_INFO_TYPE_HW_INFO    = 5,
+    DFD_DEV_INFO_TYPE_DEV_TYPE   = 6,
+} dfd_dev_tlv_type_t;
+
+extern int debuglevel;
+extern s32 platform_i2c_smbus_read_byte_data(const struct i2c_client *client, u8 command);
+extern s32 platform_i2c_smbus_read_i2c_block_data(const struct i2c_client *client,
+                u8 command, u8 length, u8 *values);
+extern s32 platform_i2c_smbus_read_word_data(const struct i2c_client *client, u8 command);
+
+#define DBG_DEBUG(fmt, arg...)  do { \
+    if ( debuglevel > DBG_START && debuglevel < DBG_ERROR) { \
+          printk(KERN_INFO "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+    } else if ( debuglevel >= DBG_ERROR ) {   \
+        printk(KERN_ERR "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+    } else {    } \
+} while (0)
+
+#define DBG_INFO(fmt, arg...)  do { \
+     if ( debuglevel > DBG_KEY) {  \
+        printk(KERN_INFO "[INFO]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+       } \
+ } while (0)
+
+#define DBG_ERROR(fmt, arg...)  do { \
+     if ( debuglevel > DBG_START) {  \
+        printk(KERN_ERR "[ERROR]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+       } \
+ } while (0)
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common_module.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common_module.c
new file mode 100644
index 000000000000..62e04b7db837
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common_module.c
@@ -0,0 +1,210 @@
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/sysfs.h>
+#include <linux/slab.h>
+#include <linux/stat.h>
+#include <linux/uaccess.h>
+#include <linux/init.h>
+#include <linux/fs.h>
+#include <linux/i2c.h>
+#include <linux/i2c-mux.h>
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,19,152)
+#include <linux/i2c-mux-gpio.h>
+#else
+#include <linux/platform_data/i2c-mux-gpio.h>
+#endif
+#include <linux/platform_device.h>
+#include <linux/delay.h>
+#include <linux/i2c-smbus.h>
+#include <linux/string.h>
+#include "platform_common.h"
+#include "dfd_tlveeprom.h"
+
+#define PLATFORM_I2C_RETRY_TIMES    3
+
+#define DFD_TLVEEPROM_I2C_BUS       (0)
+#define DFD_TLVEEPROM_I2C_ADDR      (0x56)
+#define DFD_E2PROM_MAX_LEN          (256)
+#define DFD_CARDTYPE_EXT_TLVLEN     (4)
+
+#define PLATFORM_CARDTYPE_RETRY_CNT      (10)
+#define PLATFORM_CARDTYPE_RETRY_TIMES    (1000)
+
+int debuglevel = 0;
+module_param(debuglevel, int, S_IRUGO | S_IWUSR);
+
+static int dfd_my_type = 0;
+module_param(dfd_my_type, int, S_IRUGO | S_IWUSR);
+
+int g_common_debug_error = 0;
+module_param(g_common_debug_error, int, S_IRUGO | S_IWUSR);
+
+int g_common_debug_verbose = 0;
+module_param(g_common_debug_verbose, int, S_IRUGO | S_IWUSR);
+
+uint32_t dfd_my_type_i2c_bus = 0;
+module_param(dfd_my_type_i2c_bus, int, S_IRUGO | S_IWUSR);
+
+uint32_t dfd_my_type_i2c_addr = 0;
+module_param(dfd_my_type_i2c_addr, int, S_IRUGO | S_IWUSR);
+
+#define RUJIE_COMMON_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_common_debug_verbose) { \
+        printk(KERN_ERR "[PLATFORM_COMMON][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define RUJIE_COMMON_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_common_debug_error) { \
+        printk(KERN_ERR "[PLATFORM_COMMON][ERROR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static int32_t dfd_i2c_read(char *dev, uint32_t addr, uint32_t offset_addr, unsigned char *
+buf, int32_t size)
+{
+    struct file *fp;
+    struct i2c_client client;
+    int i ,j;
+    int rv;
+    s32 val_t;
+
+    val_t = -1;
+    rv = 0;
+    fp = filp_open(dev, O_RDWR, S_IRUSR | S_IWUSR);
+    if (IS_ERR(fp)) {
+        DBG_ERROR("i2c open fail.\n");
+        RUJIE_COMMON_DEBUG_ERROR("i2c open fail.\n");
+        return -1;
+    }
+    memcpy(&client, fp->private_data, sizeof(struct i2c_client));
+    client.addr = addr;
+    for (j = 0 ;j < size ;j++){
+        for (i = 0; i < PLATFORM_I2C_RETRY_TIMES; i++) {
+          if ((val_t = i2c_smbus_read_byte_data(&client, (offset_addr + j)))< 0) {
+              DBG_DEBUG("read try(%d)time  offset_addr:%x \n", i, offset_addr);
+              continue;
+          }  else {
+              * (buf + j) = val_t;
+              break;
+          }
+        }
+        if (val_t < 0) {
+            rv = -1;
+            break;
+        }
+    }
+    filp_close(fp, NULL);
+    return rv;
+}
+
+static int dfd_tlvinfo_get_cardtype(void)
+{
+    char i2c_path[16] = {0};
+    int ret;
+    int cardtype;
+    u_int8_t eeprom[DFD_E2PROM_MAX_LEN];
+    dfd_i2c_dev_t i2c_dev;
+    uint8_t buf[DFD_CARDTYPE_EXT_TLVLEN];
+    uint8_t len;
+    dfd_tlv_type_t tlv_type;
+
+    if (dfd_my_type_i2c_bus != 0) {
+        i2c_dev.bus = dfd_my_type_i2c_bus;
+    } else {
+        i2c_dev.bus = DFD_TLVEEPROM_I2C_BUS;
+    }
+
+    if (dfd_my_type_i2c_addr != 0) {
+        i2c_dev.addr = dfd_my_type_i2c_addr;
+    } else {
+        i2c_dev.addr = DFD_TLVEEPROM_I2C_ADDR;
+    }
+    snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", i2c_dev.bus);
+    RUJIE_COMMON_DEBUG_VERBOSE("Read device eeprom info:(dev:%s, addr:%02x).\n", i2c_path, i2c_dev.addr);
+
+    ret = dfd_i2c_read(i2c_path, i2c_dev.addr, 0, eeprom, DFD_E2PROM_MAX_LEN);
+    if (ret != 0) {
+        DBG_ERROR("Read eeprom info error(dev: %s, addr: %02x).\n", i2c_path, i2c_dev.addr);
+        RUJIE_COMMON_DEBUG_ERROR("Read eeprom info error(dev: %s, addr: %02x).\n", i2c_path, i2c_dev.addr);
+        return ret;
+    }
+
+    tlv_type.main_type = TLV_CODE_VENDOR_EXT;
+    tlv_type.ext_type = DFD_TLVINFO_EXT_TLV_TYPE_DEV_TYPE;
+    len = sizeof(buf);
+    mem_clear(buf, len);
+    ret = dfd_tlvinfo_get_e2prom_info(eeprom, DFD_E2PROM_MAX_LEN, &tlv_type, buf, &len);
+    if (ret) {
+        DBG_ERROR("dfd_tlvinfo_get_e2prom_info failed ret %d.\n", ret);
+        return -1;
+    }
+    for (ret = 0; ret < 4; ret++) {
+        DBG_DEBUG("buf 0x%02x.\n", buf[ret]);
+    }
+
+    cardtype = ntohl(*((uint32_t *)buf));
+    DBG_DEBUG("cardtype 0x%x.\n", cardtype);
+    return cardtype;
+}
+
+static int __dfd_get_my_card_type(void)
+{
+    return dfd_tlvinfo_get_cardtype();
+}
+
+int dfd_get_my_card_type(void)
+{
+    int type;
+    int cnt;
+
+    if (dfd_my_type != 0) {
+        DBG_DEBUG("my_type = 0x%x\r\n", dfd_my_type);
+        return dfd_my_type;
+    }
+
+    cnt = PLATFORM_CARDTYPE_RETRY_CNT;
+    while (cnt--) {
+        type = __dfd_get_my_card_type();
+        if (type < 0) {
+            RUJIE_COMMON_DEBUG_ERROR("__dfd_get_my_card_type fail cnt %d, ret %d.\n", cnt, type);
+            msleep(PLATFORM_CARDTYPE_RETRY_TIMES);
+            continue;
+        }
+        RUJIE_COMMON_DEBUG_VERBOSE("success to get type 0x%x.\n", type);
+        break;
+    }
+
+    dfd_my_type = type;
+    return dfd_my_type;
+}
+EXPORT_SYMBOL(dfd_get_my_card_type);
+
+static int __init platform_common_init(void)
+{
+    int ret;
+
+    RUJIE_COMMON_DEBUG_VERBOSE("Enter.\n");
+    ret = dfd_get_my_card_type();
+    if (ret <= 0) {
+        RUJIE_COMMON_DEBUG_ERROR("dfd_get_my_card_type failed, ret %d.\n", ret);
+        printk(KERN_ERR "Warning: Device type get failed, please check the TLV-EEPROM!\n");
+        return -1;
+    }
+
+    RUJIE_COMMON_DEBUG_VERBOSE("Leave success type 0x%x.\n", ret);
+    return 0;
+}
+
+static void __exit platform_common_exit(void)
+{
+    RUJIE_COMMON_DEBUG_VERBOSE("Exit.\n");
+}
+
+module_init(platform_common_init);
+module_exit(platform_common_exit);
+
+MODULE_DESCRIPTION("Platform Support");
+MODULE_AUTHOR("support");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/spi-bitbang-txrx.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/spi-bitbang-txrx.h
new file mode 100644
index 000000000000..47bb9b898dfd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/spi-bitbang-txrx.h
@@ -0,0 +1,107 @@
+/*
+ * Mix this utility code with some glue code to get one of several types of
+ * simple SPI master driver.  Two do polled word-at-a-time I/O:
+ *
+ *   -	GPIO/parport bitbangers.  Provide chipselect() and txrx_word[](),
+ *	expanding the per-word routines from the inline templates below.
+ *
+ *   -	Drivers for controllers resembling bare shift registers.  Provide
+ *	chipselect() and txrx_word[](), with custom setup()/cleanup() methods
+ *	that use your controller's clock and chipselect registers.
+ *
+ * Some hardware works well with requests at spi_transfer scope:
+ *
+ *   -	Drivers leveraging smarter hardware, with fifos or DMA; or for half
+ *	duplex (MicroWire) controllers.  Provide chipselect() and txrx_bufs(),
+ *	and custom setup()/cleanup() methods.
+ */
+
+/*
+ * The code that knows what GPIO pins do what should have declared four
+ * functions, ideally as inlines, before including this header:
+ *
+ *  void setsck(struct spi_device *, int is_on);
+ *  void setmosi(struct spi_device *, int is_on);
+ *  int getmiso(struct spi_device *);
+ *  void spidelay(unsigned);
+ *
+ * setsck()'s is_on parameter is a zero/nonzero boolean.
+ *
+ * setmosi()'s is_on parameter is a zero/nonzero boolean.
+ *
+ * getmiso() is required to return 0 or 1 only. Any other value is invalid
+ * and will result in improper operation.
+ *
+ * A non-inlined routine would call bitbang_txrx_*() routines.  The
+ * main loop could easily compile down to a handful of instructions,
+ * especially if the delay is a NOP (to run at peak speed).
+ *
+ * Since this is software, the timings may not be exactly what your board's
+ * chips need ... there may be several reasons you'd need to tweak timings
+ * in these routines, not just to make it faster or slower to match a
+ * particular CPU clock rate.
+ */
+
+static inline u32
+bitbang_txrx_be_cpha0(struct spi_device *spi,
+		unsigned nsecs, unsigned cpol, unsigned flags,
+		u32 word, u8 bits)
+{
+	/* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */
+
+	u32 oldbit = (!(word & (1<<(bits-1)))) << 31;
+	/* clock starts at inactive polarity */
+	for (word <<= (32 - bits); likely(bits); bits--) {
+
+		/* setup MSB (to slave) on trailing edge */
+		if ((flags & SPI_MASTER_NO_TX) == 0) {
+			if ((word & (1 << 31)) != oldbit) {
+				setmosi(spi, word & (1 << 31));
+				oldbit = word & (1 << 31);
+			}
+		}
+		spidelay(nsecs);	/* T(setup) */
+
+		setsck(spi, !cpol);
+		spidelay(nsecs);
+
+		/* sample MSB (from slave) on leading edge */
+		word <<= 1;
+		if ((flags & SPI_MASTER_NO_RX) == 0)
+			word |= getmiso(spi);
+		setsck(spi, cpol);
+	}
+	return word;
+}
+
+static inline u32
+bitbang_txrx_be_cpha1(struct spi_device *spi,
+		unsigned nsecs, unsigned cpol, unsigned flags,
+		u32 word, u8 bits)
+{
+	/* if (cpol == 0) this is SPI_MODE_1; else this is SPI_MODE_3 */
+
+	u32 oldbit = (!(word & (1<<(bits-1)))) << 31;
+	/* clock starts at inactive polarity */
+	for (word <<= (32 - bits); likely(bits); bits--) {
+
+		/* setup MSB (to slave) on leading edge */
+		setsck(spi, !cpol);
+		if ((flags & SPI_MASTER_NO_TX) == 0) {
+			if ((word & (1 << 31)) != oldbit) {
+				setmosi(spi, word & (1 << 31));
+				oldbit = word & (1 << 31);
+			}
+		}
+		spidelay(nsecs); /* T(setup) */
+
+		setsck(spi, cpol);
+		spidelay(nsecs);
+
+		/* sample MSB (from slave) on trailing edge */
+		word <<= 1;
+		if ((flags & SPI_MASTER_NO_RX) == 0)
+			word |= getmiso(spi);
+	}
+	return word;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_eeprom_93xx46.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_eeprom_93xx46.c
new file mode 100644
index 000000000000..2ba7e7912ed5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_eeprom_93xx46.c
@@ -0,0 +1,558 @@
+/*
+ * Driver for 93xx46 EEPROMs
+ *
+ * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/gpio/consumer.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_gpio.h>
+#include <linux/slab.h>
+#include <linux/spi/spi.h>
+#include <linux/nvmem-provider.h>
+#include <linux/eeprom_93xx46.h>
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+#define OP_START	0x4
+#define OP_WRITE	(OP_START | 0x1)
+#define OP_READ		(OP_START | 0x2)
+#define ADDR_EWDS	0x00
+#define ADDR_ERAL	0x20
+#define ADDR_EWEN	0x30
+
+static int g_wb_eeprom_93xx46_debug = 0;
+
+module_param(g_wb_eeprom_93xx46_debug, int, S_IRUGO | S_IWUSR);
+
+#define SPI_93xx46_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_eeprom_93xx46_debug) { \
+        printk(KERN_INFO "[EEPROM-93xx46][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct eeprom_93xx46_devtype_data {
+	unsigned int quirks;
+};
+
+static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = {
+	.quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ |
+		  EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH,
+};
+
+struct eeprom_93xx46_dev {
+	struct spi_device *spi;
+	struct eeprom_93xx46_platform_data *pdata;
+	struct mutex lock;
+	struct nvmem_config nvmem_config;
+	struct nvmem_device *nvmem;
+	int addrlen;
+	int size;
+};
+
+static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
+{
+	return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
+}
+
+static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
+{
+	return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
+}
+
+static int eeprom_93xx46_read(void *priv, unsigned int off,
+			      void *val, size_t count)
+{
+	struct eeprom_93xx46_dev *edev = priv;
+	char *buf = val;
+	int err = 0;
+
+	if (unlikely(off >= edev->size))
+		return 0;
+	if ((off + count) > edev->size)
+		count = edev->size - off;
+	if (unlikely(!count))
+		return count;
+
+	mutex_lock(&edev->lock);
+
+	if (edev->pdata->prepare)
+		edev->pdata->prepare(edev);
+
+	while (count) {
+		struct spi_message m;
+		struct spi_transfer t[2] = { { 0 } };
+		u16 cmd_addr = OP_READ << edev->addrlen;
+		size_t nbytes = count;
+		int bits;
+        int data_bit;
+
+		if (edev->addrlen == 7) {
+			cmd_addr |= off & 0x7f;
+			bits = 10;
+            data_bit = 8;
+			if (has_quirk_single_word_read(edev))
+				nbytes = 1;
+		} else {
+			cmd_addr |= (off >> 1) & 0x3f;
+			bits = 9;
+            data_bit = 16;
+			if (has_quirk_single_word_read(edev))
+				nbytes = 2;
+		}
+
+		dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
+			cmd_addr, edev->spi->max_speed_hz);
+
+		spi_message_init(&m);
+
+		t[0].tx_buf = (char *)&cmd_addr;
+		t[0].len = 2;
+		t[0].bits_per_word = bits;
+		spi_message_add_tail(&t[0], &m);
+
+		t[1].rx_buf = buf;
+		t[1].len = nbytes;
+		t[1].bits_per_word = data_bit;
+		spi_message_add_tail(&t[1], &m);
+
+		err = spi_sync(edev->spi, &m);
+		/* have to wait at least Tcsl ns */
+		ndelay(250);
+
+		if (err) {
+			dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
+				nbytes, (int)off, err);
+			break;
+		}
+
+		buf += nbytes;
+		off += nbytes;
+		count -= nbytes;
+	}
+
+	if (edev->pdata->finish)
+		edev->pdata->finish(edev);
+
+	mutex_unlock(&edev->lock);
+
+	return err;
+}
+
+static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
+{
+	struct spi_message m;
+	struct spi_transfer t;
+	int bits, ret;
+	u16 cmd_addr;
+
+	cmd_addr = OP_START << edev->addrlen;
+	if (edev->addrlen == 7) {
+		cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
+		bits = 10;
+	} else {
+		cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
+		bits = 9;
+	}
+
+	if (has_quirk_instruction_length(edev)) {
+		cmd_addr <<= 2;
+		bits += 2;
+	}
+
+	dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
+			is_on ? "en" : "ds", cmd_addr, bits);
+
+	spi_message_init(&m);
+	mem_clear(&t, sizeof(t));
+
+	t.tx_buf = &cmd_addr;
+	t.len = 2;
+	t.bits_per_word = bits;
+	spi_message_add_tail(&t, &m);
+
+	mutex_lock(&edev->lock);
+
+	if (edev->pdata->prepare)
+		edev->pdata->prepare(edev);
+
+	ret = spi_sync(edev->spi, &m);
+	/* have to wait at least Tcsl ns */
+	ndelay(250);
+	if (ret)
+		dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
+			is_on ? "en" : "dis", ret);
+
+	if (edev->pdata->finish)
+		edev->pdata->finish(edev);
+
+	mutex_unlock(&edev->lock);
+	return ret;
+}
+
+static ssize_t
+eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
+			 char *buf, unsigned off)
+{
+	struct spi_message m;
+	struct spi_transfer t[2];
+	int bits, data_len, ret;
+	u16 cmd_addr;
+    int data_bit;
+
+	cmd_addr = OP_WRITE << edev->addrlen;
+
+	if (edev->addrlen == 7) {
+		cmd_addr |= off & 0x7f;
+		bits = 10;
+		data_len = 1;
+        data_bit = 8;
+	} else {
+		cmd_addr |= (off >> 1) & 0x3f;
+		bits = 9;
+		data_len = 2;
+        data_bit = 16;
+	}
+
+	dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
+
+	spi_message_init(&m);
+	mem_clear(t, sizeof(t));
+
+	t[0].tx_buf = (char *)&cmd_addr;
+	t[0].len = 2;
+	t[0].bits_per_word = bits;
+	spi_message_add_tail(&t[0], &m);
+
+	t[1].tx_buf = buf;
+	t[1].len = data_len;
+	t[1].bits_per_word = data_bit;
+	spi_message_add_tail(&t[1], &m);
+
+	ret = spi_sync(edev->spi, &m);
+	/* have to wait program cycle time Twc ms */
+	mdelay(6);
+	return ret;
+}
+
+static int eeprom_93xx46_write(void *priv, unsigned int off,
+				   void *val, size_t count)
+{
+	struct eeprom_93xx46_dev *edev = priv;
+	char *buf = val;
+	int i, ret, step = 1;
+
+	if (unlikely(off >= edev->size))
+		return -EFBIG;
+	if ((off + count) > edev->size)
+		count = edev->size - off;
+	if (unlikely(!count))
+		return count;
+
+	/* only write even number of bytes on 16-bit devices */
+	if (edev->addrlen == 6) {
+		step = 2;
+		count &= ~1;
+	}
+
+	/* erase/write enable */
+	ret = eeprom_93xx46_ew(edev, 1);
+	if (ret)
+		return ret;
+
+	mutex_lock(&edev->lock);
+
+	if (edev->pdata->prepare)
+		edev->pdata->prepare(edev);
+
+	for (i = 0; i < count; i += step) {
+		ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
+		if (ret) {
+			dev_err(&edev->spi->dev, "write failed at %d: %d\n",
+				(int)off + i, ret);
+			break;
+		}
+	}
+
+	if (edev->pdata->finish)
+		edev->pdata->finish(edev);
+
+	mutex_unlock(&edev->lock);
+
+	/* erase/write disable */
+	eeprom_93xx46_ew(edev, 0);
+	return ret;
+}
+
+static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
+{
+	struct eeprom_93xx46_platform_data *pd = edev->pdata;
+	struct spi_message m;
+	struct spi_transfer t;
+	int bits, ret;
+	u16 cmd_addr;
+
+	cmd_addr = OP_START << edev->addrlen;
+	if (edev->addrlen == 7) {
+		cmd_addr |= ADDR_ERAL << 1;
+		bits = 10;
+	} else {
+		cmd_addr |= ADDR_ERAL;
+		bits = 9;
+	}
+
+	if (has_quirk_instruction_length(edev)) {
+		cmd_addr <<= 2;
+		bits += 2;
+	}
+
+	dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
+
+	spi_message_init(&m);
+	mem_clear(&t, sizeof(t));
+
+	t.tx_buf = &cmd_addr;
+	t.len = 2;
+	t.bits_per_word = bits;
+	spi_message_add_tail(&t, &m);
+
+	mutex_lock(&edev->lock);
+
+	if (edev->pdata->prepare)
+		edev->pdata->prepare(edev);
+
+	ret = spi_sync(edev->spi, &m);
+	if (ret)
+		dev_err(&edev->spi->dev, "erase error %d\n", ret);
+	/* have to wait erase cycle time Tec ms */
+	mdelay(6);
+
+	if (pd->finish)
+		pd->finish(edev);
+
+	mutex_unlock(&edev->lock);
+	return ret;
+}
+
+static ssize_t eeprom_93xx46_store_erase(struct device *dev,
+					 struct device_attribute *attr,
+					 const char *buf, size_t count)
+{
+	struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
+	int erase = 0, ret;
+
+	sscanf(buf, "%d", &erase);
+	if (erase) {
+		ret = eeprom_93xx46_ew(edev, 1);
+		if (ret)
+			return ret;
+		ret = eeprom_93xx46_eral(edev);
+		if (ret)
+			return ret;
+		ret = eeprom_93xx46_ew(edev, 0);
+		if (ret)
+			return ret;
+	}
+	return count;
+}
+static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
+
+static void select_assert(void *context)
+{
+	struct eeprom_93xx46_dev *edev = context;
+
+	gpiod_set_value_cansleep(edev->pdata->select, 1);
+}
+
+static void select_deassert(void *context)
+{
+	struct eeprom_93xx46_dev *edev = context;
+
+	gpiod_set_value_cansleep(edev->pdata->select, 0);
+}
+
+static const struct of_device_id eeprom_93xx46_of_table[] = {
+	{ .compatible = "eeprom-93xx46", },
+	{ .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, },
+	{}
+};
+MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table);
+
+static int eeprom_93xx46_probe_dt(struct spi_device *spi)
+{
+	const struct of_device_id *of_id =
+		of_match_device(eeprom_93xx46_of_table, &spi->dev);
+	struct device_node *np = spi->dev.of_node;
+	struct eeprom_93xx46_platform_data *pd;
+	u32 tmp;
+	int gpio;
+	enum of_gpio_flags of_flags;
+	int ret;
+
+	pd = devm_kzalloc(&spi->dev, sizeof(*pd), GFP_KERNEL);
+	if (!pd)
+		return -ENOMEM;
+
+	ret = of_property_read_u32(np, "data-size", &tmp);
+	if (ret < 0) {
+		dev_err(&spi->dev, "data-size property not found\n");
+		return ret;
+	}
+
+	if (tmp == 8) {
+		pd->flags |= EE_ADDR8;
+	} else if (tmp == 16) {
+		pd->flags |= EE_ADDR16;
+	} else {
+		dev_err(&spi->dev, "invalid data-size (%d)\n", tmp);
+		return -EINVAL;
+	}
+
+	if (of_property_read_bool(np, "read-only"))
+		pd->flags |= EE_READONLY;
+
+	gpio = of_get_named_gpio_flags(np, "select-gpios", 0, &of_flags);
+	if (gpio_is_valid(gpio)) {
+		unsigned long flags =
+			of_flags == OF_GPIO_ACTIVE_LOW ? GPIOF_ACTIVE_LOW : 0;
+
+		ret = devm_gpio_request_one(&spi->dev, gpio, flags,
+					    "eeprom_93xx46_select");
+		if (ret)
+			return ret;
+
+		pd->select = gpio_to_desc(gpio);
+		pd->prepare = select_assert;
+		pd->finish = select_deassert;
+
+		gpiod_direction_output(pd->select, 0);
+	}
+
+    if (of_id) {
+        if (of_id->data) {
+            const struct eeprom_93xx46_devtype_data *data = of_id->data;
+
+            pd->quirks = data->quirks;
+        }
+    }
+
+	spi->dev.platform_data = pd;
+
+	return 0;
+}
+
+static int eeprom_93xx46_probe(struct spi_device *spi)
+{
+	struct eeprom_93xx46_platform_data *pd;
+	struct eeprom_93xx46_dev *edev;
+	int err;
+
+	if (spi->dev.of_node) {
+		err = eeprom_93xx46_probe_dt(spi);
+		if (err < 0)
+			return err;
+	}
+
+	pd = spi->dev.platform_data;
+	if (!pd) {
+		dev_err(&spi->dev, "missing platform data\n");
+		return -ENODEV;
+	}
+
+	edev = kzalloc(sizeof(*edev), GFP_KERNEL);
+	if (!edev)
+		return -ENOMEM;
+
+	if (pd->flags & EE_ADDR8)
+		edev->addrlen = 7;
+	else if (pd->flags & EE_ADDR16)
+		edev->addrlen = 6;
+	else {
+		dev_err(&spi->dev, "unspecified address type\n");
+		err = -EINVAL;
+		goto fail;
+	}
+
+	mutex_init(&edev->lock);
+
+	edev->spi = spi;
+	edev->pdata = pd;
+
+	edev->size = 128;
+	edev->nvmem_config.name = dev_name(&spi->dev);
+	edev->nvmem_config.dev = &spi->dev;
+	edev->nvmem_config.read_only = pd->flags & EE_READONLY;
+	edev->nvmem_config.root_only = true;
+	edev->nvmem_config.owner = THIS_MODULE;
+	edev->nvmem_config.compat = true;
+	edev->nvmem_config.base_dev = &spi->dev;
+	edev->nvmem_config.reg_read = eeprom_93xx46_read;
+	edev->nvmem_config.reg_write = eeprom_93xx46_write;
+	edev->nvmem_config.priv = edev;
+	edev->nvmem_config.stride = 4;
+	edev->nvmem_config.word_size = 1;
+	edev->nvmem_config.size = edev->size;
+
+	edev->nvmem = nvmem_register(&edev->nvmem_config);
+	if (IS_ERR(edev->nvmem)) {
+		err = PTR_ERR(edev->nvmem);
+		goto fail;
+	}
+
+    if (g_wb_eeprom_93xx46_debug) {
+        dev_info(&spi->dev, "%d-bit eeprom %s\n",
+            (pd->flags & EE_ADDR8) ? 8 : 16,
+            (pd->flags & EE_READONLY) ? "(readonly)" : "");
+    }
+
+	if (!(pd->flags & EE_READONLY)) {
+		if (device_create_file(&spi->dev, &dev_attr_erase))
+			dev_err(&spi->dev, "can't create erase interface\n");
+	}
+
+	spi_set_drvdata(spi, edev);
+	return 0;
+fail:
+	kfree(edev);
+	return err;
+}
+
+static int eeprom_93xx46_remove(struct spi_device *spi)
+{
+	struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
+
+	nvmem_unregister(edev->nvmem);
+
+	if (!(edev->pdata->flags & EE_READONLY))
+		device_remove_file(&spi->dev, &dev_attr_erase);
+
+	kfree(edev);
+	return 0;
+}
+
+static struct spi_driver wb_eeprom_93xx46_driver = {
+	.driver = {
+		.name	= "wb_93xx46",
+		.of_match_table = of_match_ptr(eeprom_93xx46_of_table),
+	},
+	.probe		= eeprom_93xx46_probe,
+	.remove		= eeprom_93xx46_remove,
+};
+
+module_spi_driver(wb_eeprom_93xx46_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
+MODULE_AUTHOR("support");
+MODULE_ALIAS("spi:93xx46");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_i2c_bus_drv.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_i2c_bus_drv.c
new file mode 100644
index 000000000000..3932cb26cd77
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_i2c_bus_drv.c
@@ -0,0 +1,1120 @@
+/*
+ * fpga_i2c_bus_drv.c
+ * ko to create fpga i2c adapter
+ */
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,12,0)
+#include <linux/of_i2c.h>
+#endif
+#include <linux/delay.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include "fpga_i2c.h"
+
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+
+#define DRV_NAME                      "wb-fpga-i2c"
+#define DRV_VERSION                   "1.0"
+#define DTS_NO_CFG_FLAG               (0)
+
+extern int i2c_device_func_write(const char *path, uint32_t pos, uint8_t *val, size_t size);
+extern int i2c_device_func_read(const char *path, uint32_t pos, uint8_t *val, size_t size);
+extern int pcie_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int pcie_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int io_device_func_write(const char *path, uint32_t pos, uint8_t *val, size_t size);
+extern int io_device_func_read(const char *path, uint32_t pos, uint8_t *val, size_t size);
+extern int spi_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int spi_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+
+#define FPGA_I2C_STRETCH_TIMEOUT  (0x01)
+#define FPGA_I2C_DEADLOCK_FAILED  (0x02)
+#define FPGA_I2C_SLAVE_NO_RESPOND (0x03)
+#define FPGA_I2C_STA_FAIL         (0x01)
+#define FPGA_I2C_STA_BUSY         (0x02)
+#define FPGA_I2C_CTL_BG           (0x01 << 1)
+#define FPGA_I2C_CTL_NO_REG       (0x01 << 2)
+#define FPGA_I2C_CTL_RD           (0x01)
+#define FPGA_I2C_CTL_WR           (0x00)
+#define I2C_READ_MSG_NUM          (0x02)
+#define I2C_WRITE_MSG_NUM         (0x01)
+#define FPGA_REG_WIDTH            (4)
+
+#define SYMBOL_I2C_DEV_MODE       (1)
+#define FILE_MODE                 (2)
+#define SYMBOL_PCIE_DEV_MODE      (3)
+#define SYMBOL_IO_DEV_MODE        (4)
+#define SYMBOL_SPI_DEV_MODE       (5)
+
+int g_wb_fpga_i2c_debug = 0;
+int g_wb_fpga_i2c_error = 0;
+
+module_param(g_wb_fpga_i2c_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_fpga_i2c_error, int, S_IRUGO | S_IWUSR);
+
+#define FPGA_I2C_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_fpga_i2c_debug) { \
+        printk(KERN_INFO "[FPFA_I2C_BUS][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define FPGA_I2C_ERROR(fmt, args...) do {                                        \
+    if (g_wb_fpga_i2c_error) { \
+        printk(KERN_ERR "[FPFA_I2C_BUS][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static int fpga_file_read(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    filp = filp_open(path, O_RDONLY, 0);
+    if (IS_ERR(filp)) {
+        FPGA_I2C_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    ret = kernel_read(filp, val, size, &tmp_pos);
+    if (ret < 0) {
+        FPGA_I2C_ERROR("kernel_read failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int fpga_file_write(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    filp = filp_open(path, O_RDWR, 777);
+    if (IS_ERR(filp)) {
+        FPGA_I2C_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    ret = kernel_write(filp, val, size, &tmp_pos);
+    if (ret < 0) {
+        FPGA_I2C_ERROR("kernel_write failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+    vfs_fsync(filp, 1);
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int fpga_device_write(fpga_i2c_dev_t *fpga_i2c, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+
+    switch (fpga_i2c->i2c_func_mode) {
+    case SYMBOL_I2C_DEV_MODE:
+        ret = i2c_device_func_write(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case FILE_MODE:
+        ret = fpga_file_write(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_PCIE_DEV_MODE:
+        ret = pcie_device_func_write(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_IO_DEV_MODE:
+        ret = io_device_func_write(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_SPI_DEV_MODE:
+        ret = spi_device_func_write(fpga_i2c->dev_name, pos, val, size);
+        break;
+    default:
+        FPGA_I2C_ERROR("err func_mode %d, write failed.\n", fpga_i2c->i2c_func_mode);
+        return -EINVAL;
+    }
+    return ret;
+
+}
+
+static int fpga_device_read(fpga_i2c_dev_t *fpga_i2c, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+
+    switch (fpga_i2c->i2c_func_mode) {
+    case SYMBOL_I2C_DEV_MODE:
+        ret = i2c_device_func_read(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case FILE_MODE:
+        ret = fpga_file_read(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_PCIE_DEV_MODE:
+        ret = pcie_device_func_read(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_IO_DEV_MODE:
+        ret = io_device_func_read(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_SPI_DEV_MODE:
+        ret = spi_device_func_read(fpga_i2c->dev_name, pos, val, size);
+        break;
+    default:
+        FPGA_I2C_ERROR("err func_mode %d, read failed.\n", fpga_i2c->i2c_func_mode);
+        return -EINVAL;
+    }
+
+    return ret;
+}
+
+static int little_endian_dword_to_buf(uint8_t *buf, int len, uint32_t dword)
+{
+    uint8_t tmp_buf[FPGA_REG_WIDTH];
+
+    if (len < 4) {
+        FPGA_I2C_ERROR("Not enough buf, dword to buf: len[%d], dword[0x%x]\n", len, dword);
+        return -1;
+    }
+
+    mem_clear(tmp_buf, sizeof(tmp_buf));
+    tmp_buf[0] = dword & 0xff;
+    tmp_buf[1] = (dword >> 8) & 0xff;
+    tmp_buf[2] = (dword >> 16) & 0xff;
+    tmp_buf[3] = (dword >> 24) & 0xff;
+
+    memcpy(buf, tmp_buf, sizeof(tmp_buf));
+
+    return 0;
+}
+
+static int little_endian_buf_to_dword(uint8_t *buf, int len, uint32_t *dword)
+{
+    int i;
+    uint32_t dword_tmp;
+
+    if (len != FPGA_REG_WIDTH) {
+        FPGA_I2C_ERROR("buf length %d error, can't convert to dowrd.\n", len);
+        return -1;
+    }
+    dword_tmp = 0;
+    for (i = 0; i < FPGA_REG_WIDTH; i++) {
+        dword_tmp |= (buf[i] << (i * 8));
+    }
+    *dword = dword_tmp;
+    return 0;
+}
+
+static int fpga_reg_write(fpga_i2c_dev_t *fpga_i2c, uint32_t addr, uint8_t val)
+{
+    int ret;
+
+    ret = fpga_device_write(fpga_i2c, addr, &val, sizeof(uint8_t));
+    if (ret < 0) {
+        FPGA_I2C_ERROR("fpga reg write failed, dev name:%s, offset:0x%x, value:0x%x.\n",
+            fpga_i2c->dev_name, addr, val);
+        return -EIO;
+    }
+
+    FPGA_I2C_VERBOSE("fpga reg write success, dev name:%s, offset:0x%x, value:0x%x.\n",
+        fpga_i2c->dev_name, addr, val);
+    return 0;
+}
+
+static int fpga_reg_read(fpga_i2c_dev_t *fpga_i2c, uint32_t addr, uint8_t *val)
+{
+    int ret;
+
+    ret = fpga_device_read(fpga_i2c, addr, val, sizeof(uint8_t));
+    if (ret < 0) {
+        FPGA_I2C_ERROR("fpga reg read failed, dev name:%s, offset:0x%x\n",
+            fpga_i2c->dev_name, addr);
+        return -EIO;
+    }
+
+    FPGA_I2C_VERBOSE("fpga reg read success, dev name:%s, offset:0x%x, value:0x%x.\n",
+        fpga_i2c->dev_name, addr, *val);
+    return 0;
+}
+
+static int fpga_data_write(fpga_i2c_dev_t *fpga_i2c, uint32_t addr, uint8_t *val, size_t size)
+{
+    int ret;
+
+    ret = fpga_device_write(fpga_i2c, addr, val, size);
+    if (ret < 0) {
+        FPGA_I2C_ERROR("fpga data write failed, dev name:%s, offset:0x%x, size:%lu.\n",
+            fpga_i2c->dev_name, addr, size);
+        return -EIO;
+    }
+
+    FPGA_I2C_VERBOSE("fpga data write success, dev name:%s, offset:0x%x, size:%lu.\n",
+        fpga_i2c->dev_name, addr, size);
+    return 0;
+}
+
+static int fpga_data_read(fpga_i2c_dev_t *fpga_i2c, uint32_t addr, uint8_t *val, size_t size)
+{
+    int ret;
+
+    ret = fpga_device_read(fpga_i2c, addr, val, size);
+    if (ret < 0) {
+        FPGA_I2C_ERROR("fpga data read failed, dev name:%s, offset:0x%x, size:%lu.\n",
+            fpga_i2c->dev_name, addr, size);
+        return -EIO;
+    }
+
+    FPGA_I2C_VERBOSE("fpga data read success, dev name:%s, offset:0x%x, size:%lu.\n",
+        fpga_i2c->dev_name, addr, size);
+    return 0;
+}
+
+static int fpga_reg_write_32(fpga_i2c_dev_t *fpga_i2c, uint32_t addr, uint32_t val)
+{
+    int ret;
+    uint8_t buf[FPGA_REG_WIDTH];
+
+    mem_clear(buf, sizeof(buf));
+    little_endian_dword_to_buf(buf, sizeof(buf), val);
+    ret = fpga_device_write(fpga_i2c, addr, buf, sizeof(buf));
+    if (ret < 0) {
+        FPGA_I2C_ERROR("fpga reg write failed, dev name: %s, offset: 0x%x, value: 0x%x.\n",
+            fpga_i2c->dev_name, addr, val);
+        return -EIO;
+    }
+
+    FPGA_I2C_VERBOSE("fpga reg write success, dev name: %s, offset: 0x%x, value: 0x%x.\n",
+        fpga_i2c->dev_name, addr, val);
+    return 0;
+}
+
+static int fpga_reg_read_32(fpga_i2c_dev_t *fpga_i2c, uint32_t addr, uint32_t *val)
+{
+    int ret;
+    uint8_t buf[FPGA_REG_WIDTH];
+
+    mem_clear(buf, sizeof(buf));
+    ret = fpga_device_read(fpga_i2c, addr, buf, sizeof(buf));
+    if (ret < 0) {
+        FPGA_I2C_ERROR("fpga reg read failed, dev name: %s, offset: 0x%x, ret: %d\n",
+            fpga_i2c->dev_name, addr, ret);
+        return -EIO;
+    }
+    little_endian_buf_to_dword(buf, sizeof(buf), val);
+    FPGA_I2C_VERBOSE("fpga reg read success, dev name: %s, offset: 0x%x, value: 0x%x.\n",
+        fpga_i2c->dev_name, addr, *val);
+    return 0;
+}
+
+static int fpga_i2c_is_busy(fpga_i2c_dev_t *fpga_i2c)
+{
+    uint8_t val;
+    int ret;
+    fpga_i2c_reg_t *reg;
+
+    reg = &fpga_i2c->reg;
+    ret = fpga_reg_read(fpga_i2c, reg->i2c_status, &val);
+    if (ret < 0 ) {
+        FPGA_I2C_ERROR("read fpga i2c status reg failed, reg addr:0x%x, ret:%d.\n",
+            reg->i2c_status, ret);
+        return 1;
+    }
+    if (val & FPGA_I2C_STA_BUSY) {
+        FPGA_I2C_ERROR("fpga i2c status busy, reg addr:0x%x, value:0x%x.\n",
+            reg->i2c_status, val);
+        return 1;
+    } else {
+        return 0;
+    }
+}
+
+static int fpga_i2c_wait(fpga_i2c_dev_t *fpga_i2c)
+{
+    int retry_cnt;
+
+    retry_cnt = FPGA_I2C_XFER_TIME_OUT/FPGA_I2C_SLEEP_TIME;
+    while (retry_cnt--) {
+        if (fpga_i2c_is_busy(fpga_i2c)) {
+            usleep_range(FPGA_I2C_SLEEP_TIME, FPGA_I2C_SLEEP_TIME + 1);
+        } else {
+            return 0;
+        }
+    }
+
+    return -EBUSY;
+}
+
+static int fpga_i2c_check_status(fpga_i2c_dev_t *fpga_i2c)
+{
+    uint8_t data;
+    int ret;
+    fpga_i2c_reg_t *reg;
+
+    reg = &fpga_i2c->reg;
+
+    ret = fpga_reg_read(fpga_i2c, reg->i2c_status, &data);
+    if (ret) {
+        FPGA_I2C_ERROR("read fpga i2c status reg failed, reg addr:0x%x, ret:%d.\n",
+            reg->i2c_status, ret);
+        return ret;
+    }
+
+    if (data & FPGA_I2C_STA_FAIL) {
+        FPGA_I2C_ERROR("fpga i2c status error, reg addr:0x%x, value:%d.\n",
+            reg->i2c_status, data);
+
+        /* read i2c_err_vec to confirm err type*/
+        if (reg->i2c_err_vec != DTS_NO_CFG_FLAG) {
+            /* read i2c_err_vec reg */
+            ret = fpga_reg_read(fpga_i2c, reg->i2c_err_vec, &data);
+            if (ret) {
+                FPGA_I2C_ERROR("read fpga i2c err vec reg failed, reg addr:0x%x, ret:%d.\n",
+                    reg->i2c_err_vec, ret);
+                return ret;
+            }
+            FPGA_I2C_VERBOSE("get i2c err vec, reg addr:0x%x, read value:0x%x\n", reg->i2c_err_vec, data);
+
+            /* match i2c_err_vec reg value and err type*/
+            switch (data) {
+            case FPGA_I2C_STRETCH_TIMEOUT:
+                ret = -ETIMEDOUT;
+                break;
+            case FPGA_I2C_DEADLOCK_FAILED:
+                ret = -EDEADLK;
+                break;
+            case FPGA_I2C_SLAVE_NO_RESPOND:
+                ret = -ENXIO;
+                break;
+            default:
+                FPGA_I2C_ERROR("get i2c err vec value out of range, reg addr:0x%x, read value:0x%x\n",
+                    reg->i2c_err_vec, data);
+                ret = -EREMOTEIO;
+                break;
+            }
+            return ret;
+        } else {
+            FPGA_I2C_VERBOSE("i2c err vec not config, fpga i2c status check return -1\n");
+            return -EREMOTEIO;
+        }
+    }
+    return 0;
+}
+
+static int fpga_i2c_do_work(fpga_i2c_dev_t *fpga_i2c, int i2c_addr,
+        unsigned char *data, uint32_t length, int is_read)
+{
+    int ret, i;
+    uint8_t op, i2c_reg_addr_len;
+    uint8_t *i2c_read_addr_buf;
+    fpga_i2c_reg_t *reg;
+    fpga_i2c_reg_addr_t *i2c_addr_desc;
+
+    reg = &fpga_i2c->reg;
+
+    ret = fpga_reg_write(fpga_i2c, reg->i2c_slave, i2c_addr);
+    if (ret) {
+        FPGA_I2C_ERROR("write fpga i2c slave reg failed, reg addr:0x%x, value:0x%x, ret:%d.\n",
+            reg->i2c_slave, i2c_addr, ret);
+        goto exit;
+    }
+
+    i2c_addr_desc = &fpga_i2c->i2c_addr_desc;
+    i2c_reg_addr_len = i2c_addr_desc->reg_addr_len;
+    i2c_read_addr_buf = &i2c_addr_desc->read_reg_addr[0];
+
+    if (i2c_reg_addr_len > 0 && i2c_reg_addr_len <= I2C_REG_MAX_WIDTH) {
+        ret = fpga_data_write(fpga_i2c, reg->i2c_reg, i2c_read_addr_buf, i2c_reg_addr_len);
+        if (ret) {
+            FPGA_I2C_ERROR("write fpga i2c offset reg failed, fpga addr:0x%x, reg len:%d, ret:%d\n",
+                reg->i2c_reg, i2c_reg_addr_len, ret);
+            for (i = 0; i < i2c_reg_addr_len; i++) {
+                FPGA_I2C_ERROR("%02d : %02x\n", i, i2c_read_addr_buf[i]);
+            }
+            goto exit;
+        }
+    }
+
+    ret = fpga_reg_write_32(fpga_i2c, reg->i2c_data_len, length);
+    if (ret) {
+        FPGA_I2C_ERROR("write fpga i2c date len reg failed, reg addr:0x%x, value:0x%x, ret:%d.\n",
+            reg->i2c_data_len, length, ret);
+        goto exit;
+    }
+
+    ret = fpga_reg_write(fpga_i2c, reg->i2c_reg_len, i2c_reg_addr_len);
+    if (ret) {
+        FPGA_I2C_ERROR("write fpga i2c reg len reg failed, reg addr:0x%x, value:0x%x, ret:%d.\n",
+            reg->i2c_reg_len, i2c_reg_addr_len, ret);
+        goto exit;
+    }
+
+    if (is_read) {
+        op = FPGA_I2C_CTL_RD | FPGA_I2C_CTL_BG;
+    } else {
+
+        ret = fpga_data_write(fpga_i2c, reg->i2c_data_buf, data, length);
+        if (ret) {
+            FPGA_I2C_ERROR("write fpga i2c date buf failed, reg addr:0x%x, write len:%d, ret:%d.\n",
+                reg->i2c_data_buf, length, ret);
+            goto exit;
+        }
+        op = FPGA_I2C_CTL_WR | FPGA_I2C_CTL_BG ;
+    }
+
+    ret = fpga_reg_write(fpga_i2c, reg->i2c_ctrl, op);
+    if (ret) {
+        FPGA_I2C_ERROR("write fpga i2c control reg failed, reg addr:0x%x, value:%d, ret:%d.\n",
+            reg->i2c_ctrl, op, ret);
+        goto exit;
+    }
+
+    ret = fpga_i2c_wait(fpga_i2c);
+    if (ret) {
+        FPGA_I2C_ERROR("wait fpga i2c status timeout.\n");
+        goto exit;
+    }
+
+    ret = fpga_i2c_check_status(fpga_i2c);
+    if (ret) {
+        FPGA_I2C_ERROR("check fpga i2c status error.\n");
+        goto exit;
+    }
+
+    if (is_read) {
+
+        ret = fpga_data_read(fpga_i2c, reg->i2c_data_buf, data, length);
+        if (ret) {
+            FPGA_I2C_ERROR("read fpga i2c data buf failed, reg addr:0x%x, read len:%d, ret:%d.\n",
+                reg->i2c_data_buf, length, ret);
+            goto exit;
+        }
+    }
+
+exit:
+    return ret;
+}
+
+static int fpga_i2c_write(fpga_i2c_dev_t *fpga_i2c, int target,
+                u8 *data, int length, int i2c_msg_num)
+{
+    int ret, i;
+    fpga_i2c_reg_addr_t *i2c_addr_desc;
+
+    if (i2c_msg_num == I2C_READ_MSG_NUM) {
+
+        if (length > I2C_REG_MAX_WIDTH) {
+            FPGA_I2C_ERROR("read reg addr len %d, more than max length.\n", length);
+            return -EINVAL;
+        }
+
+        i2c_addr_desc = &fpga_i2c->i2c_addr_desc;
+        for (i = 0; i < length; i++) {
+            i2c_addr_desc->read_reg_addr[i] = data[length -i -1];
+            FPGA_I2C_VERBOSE("%02d : %02x\n", i, i2c_addr_desc->read_reg_addr[i]);
+        }
+        i2c_addr_desc->reg_addr_len = length;
+        ret = 0;
+    } else {
+
+        ret = fpga_i2c_do_work(fpga_i2c, target, data, length, 0);
+    }
+
+    return ret;
+}
+
+/**
+ * fpga_i2c_read - receive data from the bus.
+ * @i2c: The struct fpga_i2c_dev_t.
+ * @target: Target address.
+ * @data: Pointer to the location to store the datae .
+ * @length: Length of the data.
+ *
+ * The address is sent over the bus, then the data is read.
+ *
+ * Returns 0 on success, otherwise a negative errno.
+ */
+static int fpga_i2c_read(fpga_i2c_dev_t *fpga_i2c, int target,
+        u8 *data, int length)
+{
+    int ret, offset_size;
+    int i, tmp_val;
+    fpga_i2c_reg_addr_t *i2c_addr_desc;
+    uint8_t i2c_reg_addr_len;
+    uint8_t *i2c_read_addr_buf;
+
+    offset_size = 0;
+    i2c_addr_desc = &fpga_i2c->i2c_addr_desc;
+    i2c_reg_addr_len = i2c_addr_desc->reg_addr_len;
+    i2c_read_addr_buf = &i2c_addr_desc->read_reg_addr[0];
+
+    while (1) {
+        if (length <= fpga_i2c->reg.i2c_data_buf_len) {
+            return fpga_i2c_do_work(fpga_i2c, target, data + offset_size, length, 1);
+        }
+
+        ret = fpga_i2c_do_work(fpga_i2c, target, data + offset_size, fpga_i2c->reg.i2c_data_buf_len, 1);
+        if (ret != 0) {
+            FPGA_I2C_ERROR("fpga_i2c_read failed, i2c addr:0x%x, offset:0x%x, ret:%d.\n",
+                target, offset_size, ret);
+            return ret;
+        }
+
+        tmp_val = i2c_read_addr_buf[0];
+        tmp_val += fpga_i2c->reg.i2c_data_buf_len;
+        if (tmp_val > 0xff) {
+            i2c_read_addr_buf[0] = tmp_val & 0xff;
+            for (i = 1; i < i2c_reg_addr_len; i++) {
+                if (i2c_read_addr_buf[i] == 0xff) {
+                    i2c_read_addr_buf[i] = 0;
+                } else {
+                    i2c_read_addr_buf[i]++;
+                    break;
+                }
+            }
+        } else {
+            i2c_read_addr_buf[0] = tmp_val & 0xff;
+        }
+        offset_size += fpga_i2c->reg.i2c_data_buf_len;
+        length -= fpga_i2c->reg.i2c_data_buf_len;
+    }
+
+    return ret;
+}
+
+static void fpga_i2c_reset(fpga_i2c_dev_t *fpga_i2c) {
+    fpga_i2c_reset_cfg_t *reset_cfg;
+    uint32_t reset_addr;
+
+    reset_cfg = &fpga_i2c->reset_cfg;
+    reset_addr = reset_cfg->reset_addr;
+    if (reset_cfg->reset_delay_b) {
+        usleep_range(reset_cfg->reset_delay_b, reset_cfg->reset_delay_b + 1);
+    }
+
+    fpga_reg_write_32(fpga_i2c, reset_addr, reset_cfg->reset_on);
+    if (reset_cfg->reset_delay) {
+        usleep_range(reset_cfg->reset_delay, reset_cfg->reset_delay + 1);
+    }
+
+    fpga_reg_write_32(fpga_i2c, reset_addr, reset_cfg->reset_off);
+    if (reset_cfg->reset_delay_a) {
+        usleep_range(reset_cfg->reset_delay_a, reset_cfg->reset_delay_a + 1);
+    }
+
+    return;
+}
+
+/**
+ * fpga_i2c_xfer - The driver's master_xfer function.
+ * @adap: Pointer to the i2c_adapter structure.
+ * @msgs: Pointer to the messages to be processed.
+ * @num: Length of the MSGS array.
+ *
+ * Returns the number of messages processed, or a negative errno on
+ * failure.
+ */
+static int fpga_i2c_adapter_init(fpga_i2c_dev_t *fpga_i2c)
+{
+    int ret;
+    fpga_i2c_reg_t *reg;
+
+    reg = &fpga_i2c->reg;
+
+    ret = 0;
+    ret += fpga_reg_write(fpga_i2c, reg->i2c_scale, fpga_i2c->i2c_scale_value);
+    ret += fpga_reg_write(fpga_i2c, reg->i2c_filter, fpga_i2c->i2c_filter_value);
+    ret += fpga_reg_write(fpga_i2c, reg->i2c_stretch, fpga_i2c->i2c_stretch_value);
+    if (ret < 0) {
+        FPGA_I2C_ERROR("fpga_i2c_init failed.\n");
+        return ret;
+    }
+
+    FPGA_I2C_VERBOSE("fpga_i2c_init ok.\n");
+    return 0;
+}
+
+static int fpga_i2c_params_check(fpga_i2c_dev_t *fpga_i2c)
+{
+    int ret;
+    fpga_i2c_reg_t *reg;
+    uint8_t i2c_scale_value, i2c_filter_value, i2c_stretch_value;
+
+    reg = &fpga_i2c->reg;
+    ret = 0;
+    ret += fpga_reg_read(fpga_i2c, reg->i2c_scale, &i2c_scale_value);
+    ret += fpga_reg_read(fpga_i2c, reg->i2c_filter, &i2c_filter_value);
+    ret += fpga_reg_read(fpga_i2c, reg->i2c_stretch, &i2c_stretch_value);
+    if (ret < 0) {
+        FPGA_I2C_ERROR("read fpga i2c params failed.\n");
+        return 1;
+    }
+
+    if ((i2c_scale_value != fpga_i2c->i2c_scale_value)
+            || (i2c_filter_value != fpga_i2c->i2c_filter_value)
+            || (i2c_stretch_value != fpga_i2c->i2c_stretch_value)) {
+        FPGA_I2C_ERROR("fpga i2c params check error, read value: i2c_scale 0x%x, i2c_filter:0x%x, i2c_stretch:0x%x.\n",
+            i2c_scale_value, i2c_filter_value, i2c_stretch_value);
+        FPGA_I2C_ERROR("fpga i2c params check error, config value: i2c_scale 0x%x, i2c_filter:0x%x, i2c_stretch:0x%x.\n",
+            fpga_i2c->i2c_scale_value, fpga_i2c->i2c_filter_value, fpga_i2c->i2c_stretch_value);
+        return 1;
+    }
+
+    FPGA_I2C_VERBOSE("fpga i2c params check ok.\n");
+    return 0;
+}
+
+static int fpga_i2c_xfer(struct i2c_adapter *adap,
+        struct i2c_msg *msgs, int num)
+{
+    struct i2c_msg *pmsg;
+    int i;
+    int ret;
+    fpga_i2c_dev_t *fpga_i2c;
+    fpga_i2c_reg_addr_t *i2c_addr_desc;
+
+    fpga_i2c = i2c_get_adapdata(adap);
+
+    if (num != I2C_READ_MSG_NUM && num != I2C_WRITE_MSG_NUM) {
+        FPGA_I2C_ERROR("unsupport i2c_msg len:%d.\n", num);
+        return -EINVAL;
+    }
+
+    if ((num == I2C_WRITE_MSG_NUM) && (msgs[0].len > fpga_i2c->reg.i2c_data_buf_len)) {
+        FPGA_I2C_ERROR("unsupport i2c_msg type:msg[0].flag:0x%x, buf len:0x%x.\n",
+            msgs[0].flags, msgs[0].len);
+        return -EINVAL;
+    }
+
+    if (num == I2C_READ_MSG_NUM ) {
+        if ((msgs[0].flags & I2C_M_RD) ||!(msgs[1].flags & I2C_M_RD)) {
+            FPGA_I2C_ERROR("unsupport i2c_msg type:msg[0].flag:0x%x, msg[1].flag:0x%x.\n",
+                msgs[0].flags, msgs[1].flags);
+            return -EINVAL;
+        }
+    }
+
+    if (fpga_i2c_is_busy(fpga_i2c)) {
+        FPGA_I2C_ERROR("fpga i2c adapter %d is busy, do reset.\n", adap->nr);
+        if (fpga_i2c->reset_cfg.i2c_adap_reset_flag == 1) {
+
+            fpga_i2c_reset(fpga_i2c);
+
+            fpga_i2c_adapter_init(fpga_i2c);
+        }
+        return -EAGAIN;
+    }
+
+    if (fpga_i2c->i2c_params_check && fpga_i2c_params_check(fpga_i2c)) {
+        FPGA_I2C_ERROR("fpga i2c params check failed, try to reinitialize.\n");
+        fpga_i2c_adapter_init(fpga_i2c);
+    }
+
+    ret = 0;
+    i2c_addr_desc = &fpga_i2c->i2c_addr_desc;
+    i2c_addr_desc->reg_addr_len = 0;
+    mem_clear(i2c_addr_desc->read_reg_addr, sizeof(i2c_addr_desc->read_reg_addr));
+
+    for (i = 0; ret == 0 && i < num; i++) {
+        pmsg = &msgs[i];
+        FPGA_I2C_VERBOSE("Doing %s %d byte(s) to/from 0x%02x - %d of %d messages\n",
+            pmsg->flags & I2C_M_RD ? "read" : "write", pmsg->len, pmsg->addr, i + 1, num);
+
+        if (pmsg->flags & I2C_M_RD) {
+            ret = fpga_i2c_read(fpga_i2c, pmsg->addr, pmsg->buf, pmsg->len);
+
+            if ((pmsg->len == 1) && (pmsg->flags & I2C_M_RECV_LEN)) {
+                if ((ret != 0) || (pmsg->buf[0] > I2C_SMBUS_BLOCK_MAX)) {
+                    FPGA_I2C_ERROR("smbus block data read failed, ret:%d, read len:%u.\n",
+                        ret, pmsg->buf[0]);
+                    return -EPROTO;
+                }
+                pmsg->len = 1 + pmsg->buf[0];
+                FPGA_I2C_VERBOSE("smbus block data read, read len:%d.\n", pmsg->len);
+                ret = fpga_i2c_read(fpga_i2c, pmsg->addr, pmsg->buf, pmsg->len);
+            }
+        } else {
+            ret = fpga_i2c_write(fpga_i2c, pmsg->addr, pmsg->buf, pmsg->len, num);
+        }
+    }
+
+    return (ret != 0) ? ret : num;
+}
+
+static u32 fpga_i2c_functionality(struct i2c_adapter *adap)
+{
+    return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_SMBUS_BLOCK_DATA;
+}
+
+static const struct i2c_algorithm fpga_i2c_algo = {
+    .master_xfer = fpga_i2c_xfer,
+    .functionality = fpga_i2c_functionality,
+};
+
+static struct i2c_adapter fpga_i2c_ops = {
+    .owner = THIS_MODULE,
+    .name = "wb_fpga_i2c",
+    .algo = &fpga_i2c_algo,
+};
+
+static int fpga_i2c_config_init(fpga_i2c_dev_t *fpga_i2c)
+{
+    int ret = 0, rv = 0;
+    fpga_i2c_reg_t *reg;
+    fpga_i2c_reset_cfg_t *reset_cfg;
+    struct device *dev;
+    uint32_t i2c_offset_reg, i2c_data_buf_len_reg;
+    int32_t i2c_offset_val;
+
+    fpga_i2c_bus_device_t *fpga_i2c_bus_device;
+
+    dev = fpga_i2c->dev;
+    reg = &fpga_i2c->reg;
+    reset_cfg = &fpga_i2c->reset_cfg;
+
+    i2c_offset_val = 0;
+
+    if (dev->of_node) {
+        ret = 0;
+        ret += of_property_read_u32(dev->of_node, "i2c_ext_9548_addr", &reg->i2c_ext_9548_addr);
+        ret += of_property_read_u32(dev->of_node, "i2c_ext_9548_chan", &reg->i2c_ext_9548_chan);
+        ret += of_property_read_u32(dev->of_node, "i2c_slave", &reg->i2c_slave);
+        ret += of_property_read_u32(dev->of_node, "i2c_reg", &reg->i2c_reg);
+        ret += of_property_read_u32(dev->of_node, "i2c_data_len", &reg->i2c_data_len);
+        ret += of_property_read_u32(dev->of_node, "i2c_ctrl", &reg->i2c_ctrl);
+        ret += of_property_read_u32(dev->of_node, "i2c_status", &reg->i2c_status);
+        ret += of_property_read_u32(dev->of_node, "i2c_scale", &reg->i2c_scale);
+        ret += of_property_read_u32(dev->of_node, "i2c_filter", &reg->i2c_filter);
+        ret += of_property_read_u32(dev->of_node, "i2c_stretch", &reg->i2c_stretch);
+        ret += of_property_read_u32(dev->of_node, "i2c_ext_9548_exits_flag", &reg->i2c_ext_9548_exits_flag);
+        ret += of_property_read_u32(dev->of_node, "i2c_reg_len", &reg->i2c_reg_len);
+        ret += of_property_read_u32(dev->of_node, "i2c_in_9548_chan", &reg->i2c_in_9548_chan);
+        ret += of_property_read_u32(dev->of_node, "i2c_data_buf", &reg->i2c_data_buf);
+        ret += of_property_read_string(dev->of_node, "dev_name", &fpga_i2c->dev_name);
+        ret += of_property_read_u32(dev->of_node, "i2c_scale_value", &fpga_i2c->i2c_scale_value);
+        ret += of_property_read_u32(dev->of_node, "i2c_filter_value", &fpga_i2c->i2c_filter_value);
+        ret += of_property_read_u32(dev->of_node, "i2c_stretch_value", &fpga_i2c->i2c_stretch_value);
+        ret += of_property_read_u32(dev->of_node, "i2c_timeout", &fpga_i2c->i2c_timeout);
+        ret += of_property_read_u32(dev->of_node, "i2c_func_mode", &fpga_i2c->i2c_func_mode);
+        ret += of_property_read_u32(dev->of_node, "i2c_reset_addr", &reset_cfg->reset_addr);
+        ret += of_property_read_u32(dev->of_node, "i2c_reset_on", &reset_cfg->reset_on);
+        ret += of_property_read_u32(dev->of_node, "i2c_reset_off", &reset_cfg->reset_off);
+        ret += of_property_read_u32(dev->of_node, "i2c_rst_delay_b", &reset_cfg->reset_delay_b);
+        ret += of_property_read_u32(dev->of_node, "i2c_rst_delay", &reset_cfg->reset_delay);
+        ret += of_property_read_u32(dev->of_node, "i2c_rst_delay_a", &reset_cfg->reset_delay_a);
+        ret += of_property_read_u32(dev->of_node, "i2c_adap_reset_flag", &reset_cfg->i2c_adap_reset_flag);
+
+        if (ret != 0) {
+            FPGA_I2C_ERROR("dts config error, ret:%d.\n", ret);
+            ret = -ENXIO;
+            return ret;
+        }
+
+        rv = of_property_read_u32(dev->of_node, "i2c_data_buf_len_reg", &i2c_data_buf_len_reg);
+        if (rv == 0) {
+            ret = fpga_reg_read_32(fpga_i2c, i2c_data_buf_len_reg, &reg->i2c_data_buf_len);
+            if (ret < 0) {
+                dev_err(fpga_i2c->dev, "Failed to get fpga i2c data buf length, reg addr: 0x%x, ret: %d\n",
+                    i2c_data_buf_len_reg, ret);
+                return ret;
+            }
+            FPGA_I2C_VERBOSE("fpga i2c data buf length reg addr: 0x%x, value: %d\n",
+                i2c_data_buf_len_reg, reg->i2c_data_buf_len);
+            if (reg->i2c_data_buf_len == 0) {
+                reg->i2c_data_buf_len = FPGA_I2C_RDWR_MAX_LEN_DEFAULT;
+            }
+        } else {
+            ret = of_property_read_u32(dev->of_node, "i2c_data_buf_len", &reg->i2c_data_buf_len);
+            if (ret != 0) {
+                reg->i2c_data_buf_len = FPGA_I2C_RDWR_MAX_LEN_DEFAULT;
+                ret = 0;
+            }
+        }
+
+        rv = of_property_read_u32(dev->of_node, "i2c_offset_reg", &i2c_offset_reg);
+        if (rv == 0) {
+            ret = fpga_reg_read_32(fpga_i2c, i2c_offset_reg, &i2c_offset_val);
+            if (ret < 0) {
+                dev_err(fpga_i2c->dev, "Failed to get fpga i2c adapter offset value, reg addr: 0x%x, ret: %d\n",
+                    i2c_offset_reg, ret);
+                return ret;
+            }
+            FPGA_I2C_VERBOSE("fpga i2c adapter offset reg addr: 0x%x, value: %d\n",
+                i2c_offset_reg, i2c_offset_val);
+            reg->i2c_scale +=i2c_offset_val;
+            reg->i2c_filter += i2c_offset_val;
+            reg->i2c_stretch += i2c_offset_val;
+            reg->i2c_ext_9548_exits_flag += i2c_offset_val;
+            reg->i2c_ext_9548_addr += i2c_offset_val;
+            reg->i2c_ext_9548_chan += i2c_offset_val;
+            reg->i2c_in_9548_chan += i2c_offset_val;
+            reg->i2c_slave += i2c_offset_val;
+            reg->i2c_reg += i2c_offset_val;
+            reg->i2c_reg_len += i2c_offset_val;
+            reg->i2c_data_len += i2c_offset_val;
+            reg->i2c_ctrl += i2c_offset_val;
+            reg->i2c_status += i2c_offset_val;
+            reg->i2c_data_buf += i2c_offset_val;
+        }
+
+        ret = of_property_read_u32(dev->of_node, "i2c_err_vec", &reg->i2c_err_vec);
+        if (ret != 0) {
+            reg->i2c_err_vec = DTS_NO_CFG_FLAG;
+            FPGA_I2C_VERBOSE("not support i2c_err_vec cfg. ret: %d, set DTS_NO_CFG_FLAG: %d\n",
+                ret, reg->i2c_err_vec);
+            ret = 0;    /* Not configuring i2c_err_vec is not an error  */
+        } else {
+            if (i2c_offset_val != 0) {
+                reg->i2c_err_vec += i2c_offset_val;
+            }
+        }
+    } else {
+        if (dev->platform_data == NULL) {
+            dev_err(fpga_i2c->dev, "Failed to get platform data config.\n");
+            ret = -ENXIO;
+            return ret;
+        }
+        fpga_i2c_bus_device = dev->platform_data;
+        fpga_i2c->dev_name = fpga_i2c_bus_device->dev_name;
+        fpga_i2c->adap_nr = fpga_i2c_bus_device->adap_nr;
+        fpga_i2c->i2c_scale_value = fpga_i2c_bus_device->i2c_scale_value;
+        fpga_i2c->i2c_filter_value = fpga_i2c_bus_device->i2c_filter_value;
+        fpga_i2c->i2c_stretch_value = fpga_i2c_bus_device->i2c_stretch_value;
+        fpga_i2c->i2c_timeout = fpga_i2c_bus_device->i2c_timeout;
+        fpga_i2c->i2c_func_mode = fpga_i2c_bus_device->i2c_func_mode;
+        fpga_i2c->i2c_params_check = fpga_i2c_bus_device->i2c_params_check;
+
+        reset_cfg->reset_addr = fpga_i2c_bus_device->i2c_reset_addr;
+        reset_cfg->reset_on = fpga_i2c_bus_device->i2c_reset_on;
+        reset_cfg->reset_off = fpga_i2c_bus_device->i2c_reset_off;
+        reset_cfg->reset_delay_b = fpga_i2c_bus_device->i2c_rst_delay_b;
+        reset_cfg->reset_delay = fpga_i2c_bus_device->i2c_rst_delay;
+        reset_cfg->reset_delay_a = fpga_i2c_bus_device->i2c_rst_delay_a;
+        reset_cfg->i2c_adap_reset_flag = fpga_i2c_bus_device->i2c_adap_reset_flag;
+
+        reg->i2c_ext_9548_addr = fpga_i2c_bus_device->i2c_ext_9548_addr;
+        reg->i2c_ext_9548_chan = fpga_i2c_bus_device->i2c_ext_9548_chan;
+        reg->i2c_slave = fpga_i2c_bus_device->i2c_slave;
+        reg->i2c_reg = fpga_i2c_bus_device->i2c_reg;
+        reg->i2c_data_len = fpga_i2c_bus_device->i2c_data_len;
+        reg->i2c_ctrl = fpga_i2c_bus_device->i2c_ctrl;
+        reg->i2c_status = fpga_i2c_bus_device->i2c_status;
+        reg->i2c_scale = fpga_i2c_bus_device->i2c_scale;
+        reg->i2c_filter = fpga_i2c_bus_device->i2c_filter;
+        reg->i2c_stretch = fpga_i2c_bus_device->i2c_stretch;
+        reg->i2c_ext_9548_exits_flag = fpga_i2c_bus_device->i2c_ext_9548_exits_flag;
+        reg->i2c_reg_len = fpga_i2c_bus_device->i2c_reg_len;
+        reg->i2c_in_9548_chan = fpga_i2c_bus_device->i2c_in_9548_chan;
+        reg->i2c_data_buf = fpga_i2c_bus_device->i2c_data_buf;
+
+        i2c_data_buf_len_reg = fpga_i2c_bus_device->i2c_data_buf_len_reg;
+        if (i2c_data_buf_len_reg > 0) {
+            ret = fpga_reg_read_32(fpga_i2c, i2c_data_buf_len_reg, &reg->i2c_data_buf_len);
+            if (ret < 0) {
+                dev_err(fpga_i2c->dev, "Failed to get fpga i2c data buf length, reg addr: 0x%x, ret: %d\n",
+                    i2c_data_buf_len_reg, ret);
+                return ret;
+            }
+            FPGA_I2C_VERBOSE("fpga i2c data buf length reg addr: 0x%x, value: %d\n",
+                i2c_data_buf_len_reg, reg->i2c_data_buf_len);
+            if (reg->i2c_data_buf_len == 0) {
+                reg->i2c_data_buf_len = FPGA_I2C_RDWR_MAX_LEN_DEFAULT;
+            }
+        } else {
+            if (fpga_i2c_bus_device->i2c_data_buf_len == 0) {
+                reg->i2c_data_buf_len = FPGA_I2C_RDWR_MAX_LEN_DEFAULT;
+                FPGA_I2C_VERBOSE("not support i2c_data_buf_len cfg, set default_val:%d\n",
+                    reg->i2c_data_buf_len);
+            } else {
+                reg->i2c_data_buf_len = fpga_i2c_bus_device->i2c_data_buf_len;
+            }
+        }
+
+        i2c_offset_reg = fpga_i2c_bus_device->i2c_offset_reg;
+        if (i2c_offset_reg > 0) {
+            rv = fpga_reg_read_32(fpga_i2c, i2c_offset_reg, &i2c_offset_val);
+            if (rv < 0) {
+                dev_err(fpga_i2c->dev, "Failed to get fpga i2c adapter offset value, reg addr: 0x%x, rv: %d\n",
+                    i2c_offset_reg, rv);
+                return rv;
+            }
+            FPGA_I2C_VERBOSE("fpga i2c adapter offset reg addr: 0x%x, value: %d\n",
+                i2c_offset_reg, i2c_offset_val);
+            reg->i2c_scale +=i2c_offset_val;
+            reg->i2c_filter += i2c_offset_val;
+            reg->i2c_stretch += i2c_offset_val;
+            reg->i2c_ext_9548_exits_flag += i2c_offset_val;
+            reg->i2c_ext_9548_addr += i2c_offset_val;
+            reg->i2c_ext_9548_chan += i2c_offset_val;
+            reg->i2c_in_9548_chan += i2c_offset_val;
+            reg->i2c_slave += i2c_offset_val;
+            reg->i2c_reg += i2c_offset_val;
+            reg->i2c_reg_len += i2c_offset_val;
+            reg->i2c_data_len += i2c_offset_val;
+            reg->i2c_ctrl += i2c_offset_val;
+            reg->i2c_status += i2c_offset_val;
+            reg->i2c_data_buf += i2c_offset_val;
+        }
+
+        if (fpga_i2c_bus_device->i2c_err_vec == 0) {
+            reg->i2c_err_vec = DTS_NO_CFG_FLAG;
+            FPGA_I2C_VERBOSE("not support i2c_err_vec cfg, set DTS_NO_CFG_FLAG:%d\n",
+                reg->i2c_err_vec);
+        } else {
+            reg->i2c_err_vec = fpga_i2c_bus_device->i2c_err_vec;
+            if (i2c_offset_val != 0) {
+                reg->i2c_err_vec += i2c_offset_val;
+            }
+        }
+    }
+
+    FPGA_I2C_VERBOSE("i2c_ext_9548_addr:0x%x, i2c_ext_9548_chan:0x%x, i2c_slave:0x%x, i2c_reg:0x%x, i2c_data_len:0x%x.\n",
+        reg->i2c_ext_9548_addr, reg->i2c_ext_9548_chan, reg->i2c_slave, reg->i2c_reg, reg->i2c_data_len);
+    FPGA_I2C_VERBOSE("i2c_ctrl:0x%x, i2c_status:0x%x, i2c_scale:0x%x, i2c_filter:0x%x, i2c_stretch:0x%x.\n",
+        reg->i2c_ctrl, reg->i2c_status, reg->i2c_scale, reg->i2c_filter, reg->i2c_stretch);
+    FPGA_I2C_VERBOSE("i2c_ext_9548_exits_flag:0x%x, i2c_in_9548_chan:0x%x, i2c_data_buf:0x%x, i2c_reg_len:0x%x, i2c_data_buf_len:0x%x.\n",
+        reg->i2c_ext_9548_exits_flag, reg->i2c_in_9548_chan, reg->i2c_data_buf, reg->i2c_reg_len, reg->i2c_data_buf_len);
+    FPGA_I2C_VERBOSE("dev_name:%s, i2c_scale_value:0x%x, i2c_filter_value:0x%x, i2c_stretch_value:0x%x, i2c_timeout:0x%x.\n",
+        fpga_i2c->dev_name, fpga_i2c->i2c_scale_value, fpga_i2c->i2c_filter_value, fpga_i2c->i2c_stretch_value, fpga_i2c->i2c_timeout);
+    FPGA_I2C_VERBOSE("i2c_reset_addr:0x%x, i2c_reset_on:0x%x, i2c_reset_off:0x%x, i2c_rst_delay_b:0x%x, i2c_rst_delay:0x%x, i2c_rst_delay_a:0x%x.\n",
+        reset_cfg->reset_addr, reset_cfg->reset_on, reset_cfg->reset_off, reset_cfg->reset_delay_b, reset_cfg->reset_delay, reset_cfg->reset_delay_a);
+    FPGA_I2C_VERBOSE("i2c_adap_reset_flag:0x%x.\n", reset_cfg->i2c_adap_reset_flag);
+    FPGA_I2C_VERBOSE("i2c_err_vec:0x%x\n", reg->i2c_err_vec);
+
+    return ret;
+}
+
+static int fpga_i2c_probe(struct platform_device *pdev)
+{
+    int ret;
+    fpga_i2c_dev_t *fpga_i2c;
+    struct device *dev;
+
+    fpga_i2c = devm_kzalloc(&pdev->dev, sizeof(fpga_i2c_dev_t), GFP_KERNEL);
+    if (!fpga_i2c) {
+        dev_err(&pdev->dev, "devm_kzalloc failed.\n");
+        ret = -ENOMEM;
+        goto out;
+    }
+
+    fpga_i2c->dev = &pdev->dev;
+
+    ret = fpga_i2c_config_init(fpga_i2c);
+    if (ret !=0) {
+        dev_err(fpga_i2c->dev, "Failed to get fpga i2c dts config.\n");
+        goto out;
+    }
+
+    ret = fpga_i2c_adapter_init(fpga_i2c);
+    if (ret !=0) {
+        dev_err(fpga_i2c->dev, "Failed to init fpga i2c adapter.\n");
+        goto out;
+    }
+
+    if (fpga_i2c->dev->of_node) {
+        fpga_i2c->i2c_params_check = of_property_read_bool(fpga_i2c->dev->of_node, "i2c_params_check");
+    }
+    FPGA_I2C_VERBOSE("fpga i2c params check flag:%d.\n", fpga_i2c->i2c_params_check);
+
+    init_waitqueue_head(&fpga_i2c->queue);
+
+    dev = fpga_i2c->dev;
+    fpga_i2c->adap = fpga_i2c_ops;
+    fpga_i2c->adap.timeout = msecs_to_jiffies(fpga_i2c->i2c_timeout);
+    fpga_i2c->adap.dev.parent = &pdev->dev;
+    fpga_i2c->adap.dev.of_node = pdev->dev.of_node;
+    i2c_set_adapdata(&fpga_i2c->adap, fpga_i2c);
+    platform_set_drvdata(pdev, fpga_i2c);
+
+    if (fpga_i2c->dev->of_node) {
+        /* adap.nr get from dts aliases */
+        ret = i2c_add_adapter(&fpga_i2c->adap);
+    } else {
+        fpga_i2c->adap.nr = fpga_i2c->adap_nr;
+        ret = i2c_add_numbered_adapter(&fpga_i2c->adap);
+    }
+
+    if (ret < 0) {
+        dev_info(fpga_i2c->dev, "Failed to add adapter.\n");
+        goto fail_add;
+    }
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,12,0)
+    of_i2c_register_devices(&fpga_i2c->adap);
+#endif
+    dev_info(fpga_i2c->dev, "registered i2c-%d for %s using mode %d with base address:0x%x, data buf len: %d success.\n",
+        fpga_i2c->adap.nr, fpga_i2c->dev_name, fpga_i2c->i2c_func_mode, fpga_i2c->reg.i2c_scale,
+        fpga_i2c->reg.i2c_data_buf_len);
+    return 0;
+
+fail_add:
+    platform_set_drvdata(pdev, NULL);
+out:
+    return ret;
+};
+
+static int fpga_i2c_remove(struct platform_device *pdev)
+{
+    fpga_i2c_dev_t *fpga_i2c;
+
+    fpga_i2c = platform_get_drvdata(pdev);
+    i2c_del_adapter(&fpga_i2c->adap);
+    platform_set_drvdata(pdev, NULL);
+    return 0;
+};
+
+static struct of_device_id fpga_i2c_match[] = {
+    {
+        .compatible = "wb-fpga-i2c",
+    },
+    {},
+};
+MODULE_DEVICE_TABLE(of, fpga_i2c_match);
+
+static struct platform_driver wb_fpga_i2c_driver = {
+    .probe = fpga_i2c_probe,
+    .remove = fpga_i2c_remove,
+    .driver = {
+        .owner = THIS_MODULE,
+        .name = DRV_NAME,
+        .of_match_table = fpga_i2c_match,
+    },
+};
+
+static int __init wb_fpga_i2c_init(void)
+{
+    return platform_driver_register(&wb_fpga_i2c_driver);
+}
+
+static void __exit wb_fpga_i2c_exit(void)
+{
+    platform_driver_unregister(&wb_fpga_i2c_driver);
+}
+
+module_init(wb_fpga_i2c_init);
+module_exit(wb_fpga_i2c_exit);
+MODULE_DESCRIPTION("fpga i2c adapter driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pca954x_drv.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pca954x_drv.c
new file mode 100644
index 000000000000..8fd9e4f0f1b4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pca954x_drv.c
@@ -0,0 +1,534 @@
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/i2c.h>
+#include <linux/i2c-mux.h>
+#include <linux/delay.h>
+#include <linux/version.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+#include "fpga_i2c.h"
+
+extern int i2c_device_func_write(const char *path, uint32_t pos, uint8_t *val, size_t size);
+extern int pcie_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int io_device_func_write(const char *path, uint32_t pos, uint8_t *val, size_t size);
+extern int spi_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+
+#define PCA954X_MAX_NCHANS           (8)
+#define FPGA_INTERNAL_PCA9548        (1)
+#define FPGA_EXTERNAL_PCA9548        (2)
+#define FPGA_I2C_EXT_9548_EXITS      (0x01 << 0)
+#define FPGA_I2C_9548_NO_RESET       (0x01 << 1)
+
+#define SYMBOL_I2C_DEV_MODE          (1)
+#define FILE_MODE                    (2)
+#define SYMBOL_PCIE_DEV_MODE         (3)
+#define SYMBOL_IO_DEV_MODE           (4)
+#define SYMBOL_SPI_DEV_MODE          (5)
+
+int g_fpga_pca954x_debug = 0;
+int g_fpga_pca954x_error = 0;
+
+module_param(g_fpga_pca954x_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_fpga_pca954x_error, int, S_IRUGO | S_IWUSR);
+
+#define FPGA_PCA954X_VERBOSE(fmt, args...) do {                                        \
+    if (g_fpga_pca954x_debug) { \
+        printk(KERN_INFO "[FPGA_PCA954X][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define FPGA_PCA954X_ERROR(fmt, args...) do {                                        \
+    if (g_fpga_pca954x_error) { \
+        printk(KERN_ERR "[FPGA_PCA954X][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+enum pca_type {
+    pca_9540,
+    pca_9541,
+    pca_9542,
+    pca_9543,
+    pca_9544,
+    pca_9545,
+    pca_9546,
+    pca_9547,
+    pca_9548,
+};
+
+struct pca954x {
+    enum pca_type type;
+    struct i2c_adapter *virt_adaps[PCA954X_MAX_NCHANS];
+    u8 last_chan;                   /* last register value */
+    uint32_t fpga_9548_flag;
+    uint32_t fpga_9548_reset_flag;
+    uint32_t pca9548_base_nr;
+    struct i2c_client *client;
+};
+
+struct chip_desc {
+    u8 nchans;
+    u8 enable;    /* used for muxes only */
+    enum muxtype {
+        pca954x_ismux = 0,
+        pca954x_isswi
+    } muxtype;
+};
+
+/* Provide specs for the PCA954x types we know about */
+static const struct chip_desc chips[] = {
+    [pca_9540] = {
+        .nchans = 2,
+        .enable = 0x4,
+        .muxtype = pca954x_ismux,
+    },
+    [pca_9541] = {
+        .nchans = 1,
+        .muxtype = pca954x_isswi,
+    },
+    [pca_9543] = {
+        .nchans = 2,
+        .muxtype = pca954x_isswi,
+    },
+    [pca_9544] = {
+        .nchans = 4,
+        .enable = 0x4,
+        .muxtype = pca954x_ismux,
+    },
+    [pca_9545] = {
+        .nchans = 4,
+        .muxtype = pca954x_isswi,
+    },
+    [pca_9547] = {
+        .nchans = 8,
+        .enable = 0x8,
+        .muxtype = pca954x_ismux,
+    },
+    [pca_9548] = {
+        .nchans = 8,
+        .muxtype = pca954x_isswi,
+    },
+};
+
+static const struct i2c_device_id fpga_pca954x_id[] = {
+    { "wb_fpga_pca9540", pca_9540 },
+    { "wb_fpga_pca9541", pca_9541 },
+    { "wb_fpga_pca9542", pca_9543 },
+    { "wb_fpga_pca9543", pca_9543 },
+    { "wb_fpga_pca9544", pca_9544 },
+    { "wb_fpga_pca9545", pca_9545 },
+    { "wb_fpga_pca9546", pca_9545 },
+    { "wb_fpga_pca9547", pca_9547 },
+    { "wb_fpga_pca9548", pca_9548 },
+    { }
+};
+MODULE_DEVICE_TABLE(i2c, fpga_pca954x_id);
+
+static int fpga_file_write(const char *path, int pos, unsigned char *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    filp = filp_open(path, O_RDWR, 777);
+    if (IS_ERR(filp)) {
+        FPGA_PCA954X_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    ret = kernel_write(filp, val, size, &tmp_pos);
+    if (ret < 0) {
+        FPGA_PCA954X_ERROR("kernel_write failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    vfs_fsync(filp, 1);
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+
+}
+
+static int fpga_device_write(fpga_i2c_dev_t *fpga_i2c, int pos, unsigned char *val, size_t size)
+{
+    int ret;
+
+    switch (fpga_i2c->i2c_func_mode) {
+    case SYMBOL_I2C_DEV_MODE:
+        ret = i2c_device_func_write(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case FILE_MODE:
+        ret = fpga_file_write(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_PCIE_DEV_MODE:
+        ret = pcie_device_func_write(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_IO_DEV_MODE:
+        ret = io_device_func_write(fpga_i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_SPI_DEV_MODE:
+        ret = spi_device_func_write(fpga_i2c->dev_name, pos, val, size);
+        break;
+    default:
+        FPGA_PCA954X_ERROR("err func_mode %d, write failed.\n", fpga_i2c->i2c_func_mode);
+        return -EINVAL;
+    }
+    return ret;
+}
+
+static int fpga_reg_write(fpga_i2c_dev_t *fpga_i2c, uint32_t addr, uint8_t val)
+{
+    int ret;
+
+    ret = fpga_device_write(fpga_i2c, addr, &val, sizeof(uint8_t));
+    if (ret < 0) {
+        FPGA_PCA954X_ERROR("fpga_device_write failed. name:%s, addr:0x%x, value:0x%x.\n",
+            fpga_i2c->dev_name, addr, val);
+        return ret;
+    }
+
+    FPGA_PCA954X_VERBOSE("fpga reg write success, dev name:%s, offset:0x%x, value:0x%x.\n",
+        fpga_i2c->dev_name, addr, val);
+    return 0;
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,7)
+static int pca954x_select_chan(struct i2c_adapter *adap, void *client, u32 chan)
+{
+    struct pca954x *data = i2c_get_clientdata(client);
+    fpga_i2c_dev_t *fpga_i2c;
+    fpga_i2c_reg_t *reg;
+    int ret;
+    u8 regval, i2c_9548_opt;
+
+    while(i2c_parent_is_i2c_adapter(adap)){
+        adap = to_i2c_adapter(adap->dev.parent);
+    }
+
+    FPGA_PCA954X_VERBOSE("root bus:%d, chan:0x%x, 9548 flag:0x%x, 9548 addr:0x%x.\n",
+        adap->nr, chan, data->fpga_9548_flag, client->addr);
+    fpga_i2c = i2c_get_adapdata(adap);
+    reg = &fpga_i2c->reg;
+
+    regval = 1 << chan;
+    if (data->fpga_9548_flag == FPGA_INTERNAL_PCA9548) {
+        ret = fpga_reg_write(fpga_i2c, reg->i2c_in_9548_chan, regval);
+    } else {
+        if (data->fpga_9548_reset_flag == 1) {
+            i2c_9548_opt = FPGA_I2C_EXT_9548_EXITS & ~(FPGA_I2C_9548_NO_RESET);
+        } else {
+            i2c_9548_opt = FPGA_I2C_EXT_9548_EXITS | FPGA_I2C_9548_NO_RESET;
+        }
+        FPGA_PCA954X_VERBOSE("fpga pca9548 reset flag:0x%x, opt:0x%x.\n",
+            data->fpga_9548_reset_flag, i2c_9548_opt);
+        ret = fpga_reg_write(fpga_i2c, reg->i2c_ext_9548_exits_flag, i2c_9548_opt);
+        ret += fpga_reg_write(fpga_i2c, reg->i2c_ext_9548_addr, client->addr);
+        ret += fpga_reg_write(fpga_i2c, reg->i2c_ext_9548_chan, regval);
+    }
+
+    return ret;
+}
+
+static int pca954x_deselect_mux(struct i2c_adapter *adap, void *client, u32 chan)
+{
+    struct pca954x *data = i2c_get_clientdata(client);
+    fpga_i2c_dev_t *fpga_i2c;
+    fpga_i2c_reg_t *reg;
+    int ret;
+
+    while(i2c_parent_is_i2c_adapter(adap)){
+        adap = to_i2c_adapter(adap->dev.parent);
+    }
+
+    fpga_i2c = i2c_get_adapdata(adap);
+    reg = &fpga_i2c->reg;
+    /* Deselect active channel */
+    data->last_chan = 0;
+    if (data->fpga_9548_flag == FPGA_INTERNAL_PCA9548) {
+        ret = fpga_reg_write(fpga_i2c, reg->i2c_in_9548_chan, 0);
+    } else {
+
+        ret = fpga_reg_write(fpga_i2c, reg->i2c_ext_9548_exits_flag, FPGA_I2C_9548_NO_RESET);
+        ret += fpga_reg_write(fpga_i2c, reg->i2c_ext_9548_chan, 0);
+    }
+
+    return ret;
+}
+#else
+static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan)
+{
+    struct pca954x *data = i2c_mux_priv(muxc);
+    struct i2c_client *client = data->client;
+    struct i2c_adapter *adap;
+    fpga_i2c_dev_t *fpga_i2c;
+    fpga_i2c_reg_t *reg;
+    int ret;
+    u8 regval, i2c_9548_opt;
+
+    adap = muxc->parent;
+    while(i2c_parent_is_i2c_adapter(adap)){
+        adap = to_i2c_adapter(adap->dev.parent);
+    }
+
+    FPGA_PCA954X_VERBOSE("root bus:%d, chan:0x%x, 9548 flag:0x%x, 9548 addr:0x%x.\n",
+        adap->nr, chan, data->fpga_9548_flag, client->addr);
+    fpga_i2c = i2c_get_adapdata(adap);
+    reg = &fpga_i2c->reg;
+
+    regval = 1 << chan;
+    if (data->fpga_9548_flag == FPGA_INTERNAL_PCA9548) {
+        ret = fpga_reg_write(fpga_i2c, reg->i2c_in_9548_chan, regval);
+    } else {
+        if (data->fpga_9548_reset_flag == 1) {
+            i2c_9548_opt = FPGA_I2C_EXT_9548_EXITS & ~(FPGA_I2C_9548_NO_RESET);
+        } else {
+            i2c_9548_opt = FPGA_I2C_EXT_9548_EXITS | FPGA_I2C_9548_NO_RESET;
+        }
+        FPGA_PCA954X_VERBOSE("fpga pca9548 reset flag:0x%x, opt:0x%x.\n",
+            data->fpga_9548_reset_flag, i2c_9548_opt);
+        ret = fpga_reg_write(fpga_i2c, reg->i2c_ext_9548_exits_flag, i2c_9548_opt);
+        ret += fpga_reg_write(fpga_i2c, reg->i2c_ext_9548_addr, client->addr);
+        ret += fpga_reg_write(fpga_i2c, reg->i2c_ext_9548_chan, regval);
+    }
+
+    return ret;
+}
+
+static int pca954x_deselect_mux(struct i2c_mux_core *muxc, u32 chan)
+{
+    struct pca954x *data = i2c_mux_priv(muxc);
+    struct i2c_adapter *adap;
+    fpga_i2c_dev_t *fpga_i2c;
+    fpga_i2c_reg_t *reg;
+    int ret;
+
+    adap = muxc->parent;
+    while(i2c_parent_is_i2c_adapter(adap)){
+        adap = to_i2c_adapter(adap->dev.parent);
+    }
+
+    fpga_i2c = i2c_get_adapdata(adap);
+    reg = &fpga_i2c->reg;
+    ret = 0;
+    /* Deselect active channel */
+    data->last_chan = 0;
+
+    if (data->fpga_9548_flag == FPGA_INTERNAL_PCA9548) {
+        ret = fpga_reg_write(fpga_i2c, reg->i2c_in_9548_chan, 0);
+    } else {
+
+        ret = fpga_reg_write(fpga_i2c, reg->i2c_ext_9548_exits_flag, FPGA_I2C_9548_NO_RESET);
+        ret += fpga_reg_write(fpga_i2c, reg->i2c_ext_9548_chan, 0);
+    }
+
+    return ret;
+}
+#endif
+/*
+ * I2C init/probing/exit functions
+ */
+static int fpga_i2c_pca954x_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+    struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent);
+    int num, force, class;
+    struct pca954x *data;
+    int ret = -ENODEV;
+    struct device *dev;
+    int dynamic_nr = 1;
+    fpga_pca954x_device_t *fpga_pca954x_device;
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(4,6,7)
+    struct i2c_mux_core *muxc;
+#endif
+
+    if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) {
+        dev_err(&client->dev, "i2c adapter:%d, unsupport I2C_FUNC_SMBUS_BYTE.\n", adap->nr);
+        goto err;
+    }
+
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(4,6,7)
+    data = kzalloc(sizeof(struct pca954x), GFP_KERNEL);
+    if (!data) {
+        dev_err(&client->dev, "kzalloc failed.\n");
+        ret = -ENOMEM;
+        goto err;
+    }
+
+    i2c_set_clientdata(client, data);
+#else
+    muxc = i2c_mux_alloc(adap, &client->dev,
+                 PCA954X_MAX_NCHANS, sizeof(*data), 0,
+                 pca954x_select_chan, pca954x_deselect_mux);
+    if (!muxc) {
+        dev_err(&client->dev, "i2c_mux_alloc failed.\n");
+        return -ENOMEM;
+    }
+    data = i2c_mux_priv(muxc);
+    i2c_set_clientdata(client, muxc);
+    data->client = client;
+#endif
+
+    dev = &client->dev;
+    if (dev == NULL) {
+        dev_err(&client->dev, "dev is NULL.\n");
+        ret = -ENODEV;
+        goto exit_free;
+    }
+
+    if (dev->of_node == NULL) {
+        if (client->dev.platform_data == NULL) {
+            dev_err(&client->dev, "Failed to get 954x platform data config.\n");
+            ret = -EINVAL;
+            goto exit_free;
+        }
+        fpga_pca954x_device = client->dev.platform_data;
+        data->fpga_9548_flag = fpga_pca954x_device->fpga_9548_flag;
+        data->fpga_9548_reset_flag = fpga_pca954x_device->fpga_9548_reset_flag;
+        data->pca9548_base_nr = fpga_pca954x_device->pca9548_base_nr;
+        if (data->pca9548_base_nr == 0) {
+
+            dynamic_nr = 1;
+        } else {
+            dynamic_nr = 0;
+            FPGA_PCA954X_VERBOSE("pca9548_base_nr:%u.\n", data->pca9548_base_nr);
+        }
+    } else {
+        data->type = id->driver_data;
+        /* BUS ID */
+        ret = of_property_read_u32(dev->of_node, "fpga_9548_flag", &data->fpga_9548_flag);
+        ret += of_property_read_u32(dev->of_node, "fpga_9548_reset_flag", &data->fpga_9548_reset_flag);
+        if (ret != 0) {
+            dev_err(&client->dev, "Failed to get 954x dts config, ret:%d.\n", ret);
+            ret = -EINVAL;
+            goto exit_free;
+        }
+        if (of_property_read_u32(dev->of_node, "pca9548_base_nr", &data->pca9548_base_nr)) {
+
+            dynamic_nr = 1;
+            FPGA_PCA954X_VERBOSE("pca9548_base_nr not found, use dynamic adap number");
+        } else {
+            dynamic_nr = 0;
+            FPGA_PCA954X_VERBOSE("pca9548_base_nr:%u.\n", data->pca9548_base_nr);
+        }
+    }
+
+    if (data->fpga_9548_flag != FPGA_EXTERNAL_PCA9548 && data->fpga_9548_flag != FPGA_INTERNAL_PCA9548) {
+        dev_err(&client->dev, "Error: fpga 954x flag config error, value:0x%x.\n", data->fpga_9548_flag);
+        ret = -EINVAL;
+        goto exit_free;
+    }
+
+    data->type = id->driver_data;
+    data->last_chan = 0;   /* force the first selection */
+
+    /* Now create an adapter for each channel */
+    for (num = 0; num < chips[data->type].nchans; num++) {
+        if (dynamic_nr == 1) {
+            force = 0;              /* dynamic adap number */
+        } else {
+            force = data->pca9548_base_nr + num;
+        }
+        class = 0;              /* no class by default */
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(4,6,7)
+        data->virt_adaps[num] =
+            i2c_add_mux_adapter(adap, &client->dev, client,
+                force, num, class, pca954x_select_chan, pca954x_deselect_mux);
+
+        if (data->virt_adaps[num] == NULL) {
+            ret = -ENODEV;
+            dev_err(&client->dev, "Failed to register multiplexed adapter %d as bus %d\n",
+                num, force);
+            goto virt_reg_failed;
+        }
+#else
+        ret = i2c_mux_add_adapter(muxc, force, num, class);
+        if (ret) {
+            dev_err(&client->dev, "Failed to register multiplexed adapter %d as bus %d\n",
+                num, force);
+            goto virt_reg_failed;
+        }
+#endif
+    } /* end for num = 0; num < chips[data->type].nchans... */
+
+    dev_info(&client->dev, "registered %d multiplexed busses for I2C %s %s\n",
+        num, chips[data->type].muxtype == pca954x_ismux ? "mux" : "switch", client->name);
+
+    return 0;
+
+virt_reg_failed:
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(4,6,7)
+    for (num--; num >= 0; num--)
+        i2c_del_mux_adapter(data->virt_adaps[num]);
+exit_free:
+    kfree(data);
+#else
+exit_free:
+    i2c_mux_del_adapters(muxc);
+#endif
+err:
+    return ret;
+}
+
+static int fpga_i2c_pca954x_remove(struct i2c_client *client)
+{
+#if LINUX_VERSION_CODE <= KERNEL_VERSION(4,6,7)
+    struct pca954x *data = i2c_get_clientdata(client);
+    const struct chip_desc *chip = &chips[data->type];
+    int i;
+
+    for (i = 0; i < chip->nchans; ++i)
+    if (data->virt_adaps[i]) {
+        i2c_del_mux_adapter(data->virt_adaps[i]);
+        data->virt_adaps[i] = NULL;
+    }
+
+    kfree(data);
+#else
+    struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+
+    i2c_mux_del_adapters(muxc);
+#endif
+
+    return 0;
+}
+
+static struct i2c_driver fpga_i2c_pca954x_driver = {
+    .driver        = {
+        .name = "wb_fpga_pca954x",
+        .owner = THIS_MODULE,
+    },
+    .probe = fpga_i2c_pca954x_probe,
+    .remove = fpga_i2c_pca954x_remove,
+    .id_table = fpga_pca954x_id,
+};
+
+static int __init fpga_i2c_pca954x_init(void)
+{
+    int ret;
+
+    ret = i2c_add_driver(&fpga_i2c_pca954x_driver);
+    return ret;
+}
+
+static void __exit fpga_i2c_pca954x_exit(void)
+{
+    i2c_del_driver(&fpga_i2c_pca954x_driver);
+}
+
+module_init(fpga_i2c_pca954x_init);
+module_exit(fpga_i2c_pca954x_exit);
+MODULE_DESCRIPTION("fpga pca954x driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pcie.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pcie.c
new file mode 100644
index 000000000000..aedcc78dab90
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pcie.c
@@ -0,0 +1,164 @@
+/*
+ * wb_fpga_pcie.c
+ * ko to enable fpga pcie
+ */
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/pci.h>
+
+#define FPGA_MSI_IRQ_NUM            (14)
+#define FPGA_MSI_IRQ_BEGIN          (0)
+#define XILINX_FPGA_USE_MSI         (0)
+#define XILINX_FPGA_NUSE_MSI        (1)
+
+int g_fpga_pcie_dev_debug = 0;
+int g_fpga_pcie_dev_error = 0;
+module_param(g_fpga_pcie_dev_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_fpga_pcie_dev_error, int, S_IRUGO | S_IWUSR);
+
+#define FPGA_PCIE_DEV_VERBOSE(fmt, args...) do {                                        \
+    if (g_fpga_pcie_dev_debug) { \
+        printk(KERN_INFO "[FPGA_PCIE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define FPGA_PCIE_DEV_ERROR(fmt, args...) do {                                        \
+    if (g_fpga_pcie_dev_error) { \
+        printk(KERN_ERR "[FPGA_PCIE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+typedef struct wb_fpga_pcie_s {
+    struct pci_dev *pci_dev;
+    int driver_data;
+} wb_fpga_pcie_t;
+
+static void fpga_pcie_recover(struct pci_dev *pdev, const struct pci_device_id *id)
+{
+    struct resource *mem_base;
+    u32 bar0_val;
+    int ret;
+
+    mem_base = &pdev->resource[0];
+    ret = pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &bar0_val);
+    if (ret) {
+        FPGA_PCIE_DEV_ERROR("pci_read_config_dword failed ret %d.\n", ret);
+        return;
+    }
+    FPGA_PCIE_DEV_VERBOSE("mem_base->start[0x%llx], bar0_val[0x%x], ret %d.\n",
+        mem_base->start, bar0_val, ret);
+
+    if (bar0_val != mem_base->start) {
+        ret = pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, mem_base->start);
+        if (ret) {
+            FPGA_PCIE_DEV_ERROR("pci_write_config_dword mem_base->start[0x%llx], failed ret %d.\n", mem_base->start, ret);
+            return;
+        }
+        FPGA_PCIE_DEV_VERBOSE("pci_write_config_dword mem_base->start[0x%llx] success.\n", mem_base->start);
+    } else {
+        FPGA_PCIE_DEV_VERBOSE("mem_base->start[0x%llx], bar0_val[0x%x], do nothing.\n",
+            mem_base->start, bar0_val);
+    }
+}
+
+static int fpga_pcie_probe(struct pci_dev *pdev, const struct pci_device_id *id)
+{
+    int err;
+    wb_fpga_pcie_t *wb_fpga_pcie;
+
+    FPGA_PCIE_DEV_VERBOSE("Enter vendor 0x%x, subsystem_vendor 0x%x.\n", pdev->vendor, pdev->subsystem_vendor);
+
+    wb_fpga_pcie = devm_kzalloc(&pdev->dev, sizeof(wb_fpga_pcie_t), GFP_KERNEL);
+    if (!wb_fpga_pcie) {
+        dev_err(&pdev->dev, "devm_kzalloc failed.\n");
+        return -ENOMEM;
+    }
+
+    fpga_pcie_recover(pdev, id);
+
+    /* enable device: ask low-level code to enable I/O and memory */
+    FPGA_PCIE_DEV_VERBOSE("start pci_enable_device!\n");
+    err = pci_enable_device(pdev);
+    if (err) {
+        dev_err(&pdev->dev, "Failed to enable pci device, ret:%d.\n", err);
+        return err;
+    }
+
+    FPGA_PCIE_DEV_VERBOSE("start pci_set_master!\n");
+    pci_set_master(pdev);
+
+    wb_fpga_pcie->driver_data = id->driver_data;
+    wb_fpga_pcie->pci_dev = pdev;
+    pci_set_drvdata(pdev, wb_fpga_pcie);
+
+    if (wb_fpga_pcie->driver_data == XILINX_FPGA_USE_MSI) {
+        FPGA_PCIE_DEV_VERBOSE("start pci_enable_msi_range!\n");
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,19,152)
+        err = pci_enable_msi_range(pdev, FPGA_MSI_IRQ_BEGIN + 1, FPGA_MSI_IRQ_NUM);
+#else
+        err = pci_alloc_irq_vectors_affinity(pdev, FPGA_MSI_IRQ_BEGIN + 1,
+                FPGA_MSI_IRQ_NUM, PCI_IRQ_MSI, NULL);
+#endif
+        if (err != FPGA_MSI_IRQ_NUM) {
+            FPGA_PCIE_DEV_ERROR("pci_enable_msi_block err %d FPGA_MSI_IRQ_NUM %d.\n", err,
+                FPGA_MSI_IRQ_NUM);
+            dev_err(&pdev->dev, "Failed to enable pci msi, ret:%d.\n", err);
+            return -EINVAL;
+        }
+    }
+
+    dev_info(&pdev->dev, "fpga pci device init success.\n");
+    return 0;
+}
+
+static void fpga_pcie_remove(struct pci_dev *pdev)
+{
+    wb_fpga_pcie_t *wb_fpga_pcie;
+
+    FPGA_PCIE_DEV_VERBOSE("fpga_pcie_remove.\n");
+
+    wb_fpga_pcie = pci_get_drvdata(pdev);
+    if (wb_fpga_pcie->driver_data == XILINX_FPGA_USE_MSI) {
+        FPGA_PCIE_DEV_VERBOSE("start pci_disable_msi!\n");
+        pci_disable_msi(pdev);
+    }
+
+    pci_disable_device(pdev);
+    return;
+}
+
+static const struct pci_device_id fpga_pci_ids[] = {
+        { PCI_DEVICE(0x10ee, 0x7022), .driver_data = XILINX_FPGA_USE_MSI},
+        { PCI_DEVICE(0x10ee, 0x7011), .driver_data = XILINX_FPGA_NUSE_MSI},
+        {0}
+};
+MODULE_DEVICE_TABLE(pci, fpga_pci_ids);
+
+static struct pci_driver wb_fpga_pcie_driver = {
+    .name = "wb_fpga_pcie",
+    .id_table = fpga_pci_ids,/* only dynamic id's */
+    .probe = fpga_pcie_probe,
+    .remove = fpga_pcie_remove,
+};
+
+static int __init wb_fpga_pcie_init(void)
+{
+
+    FPGA_PCIE_DEV_VERBOSE("wb_fpga_pcie_init enter!\n");
+    return pci_register_driver(&wb_fpga_pcie_driver);
+}
+
+static void __exit wb_fpga_pcie_exit(void)
+{
+    FPGA_PCIE_DEV_VERBOSE("wb_fpga_pcie_exit enter!\n");
+    pci_unregister_driver(&wb_fpga_pcie_driver);
+    return;
+}
+
+module_init(wb_fpga_pcie_init);
+module_exit(wb_fpga_pcie_exit);
+MODULE_DESCRIPTION("fpga pcie driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_d1500.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_d1500.c
new file mode 100644
index 000000000000..7d5d5da87ea7
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_d1500.c
@@ -0,0 +1,367 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2011, 2012 Cavium Inc.
+ */
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/gpio.h>
+#include <linux/io.h>
+#include <linux/errno.h>
+#include <linux/ioport.h>
+#include <linux/spinlock.h>
+
+#define GPIO_NAME           "wb_gpio_d1500"
+
+#define GPIO_BASE           (0x500)
+#define GP_IO_SEL           (GPIO_BASE + 0x4)
+#define GP_LVL              (GPIO_BASE + 0xC)
+#define GPI_NMI_EN          (GPIO_BASE + 0x28)
+#define GPI_NMI_STS         (GPIO_BASE + 0x2a)
+#define GPI_INV             (GPIO_BASE + 0x2c)
+#define GPIO_USE_SEL2       (GPIO_BASE + 0x30)
+#define GP_IO_SEL2          (GPIO_BASE + 0x34)
+#define GP_LVL2             (GPIO_BASE + 0x38)
+#define GPI_NMI_EN_2        (GPIO_BASE + 0x3c)
+#define GPI_NMI_STS_2       (GPIO_BASE + 0x3e)
+#define GPIO_USE_SEL3       (GPIO_BASE + 0x40)
+#define GP_IO_SEL3          (GPIO_BASE + 0x44)
+#define GP_LVL3             (GPIO_BASE + 0x48)
+#define GPI_NMI_EN_3        (GPIO_BASE + 0x50)
+#define GPI_NMI_STS_3       (GPIO_BASE + 0x54)
+
+#define GPIO_BASE_ID        (0)
+#define BANKSIZE            (32)
+#define D1500_GPIO_PIN_NUM  (96)
+#define CELL_NUM            (2)
+
+int g_gpio_d1500_debug = 0;
+int g_gpio_d1500_error = 0;
+module_param(g_gpio_d1500_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_gpio_d1500_error, int, S_IRUGO | S_IWUSR);
+
+#define GPIO_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_gpio_d1500_debug) { \
+        printk(KERN_ERR "[GPIO-D1500][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define GPIO_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_gpio_d1500_error) { \
+        printk(KERN_ERR "[GPIO-D1500][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static DEFINE_SPINLOCK(sio_lock);
+
+struct gpio_d1500_t {
+    struct gpio_chip chip;
+    u64 register_base;
+};
+
+static int wb_gpio_get(struct gpio_chip *gc, unsigned gpio_num)
+{
+    u32 data = 0;
+    unsigned int bank, offset;
+    unsigned long flags;
+
+    bank = gpio_num / BANKSIZE;
+    offset = gpio_num % BANKSIZE;
+
+    spin_lock_irqsave(&sio_lock, flags);
+    if (bank == 0) {
+        data = inl(GP_LVL) & (1 << offset);
+        if (data) {
+            data = 1;
+        }
+    } else if (bank == 1) {
+        data = inl(GP_LVL2) & (1 << offset);
+        if (data) {
+            data = 1;
+        }
+    } else if (bank == 2) {
+        data = inl(GP_LVL3) & (1 << offset);
+        if (data) {
+            data = 1;
+        }
+    }
+    spin_unlock_irqrestore(&sio_lock, flags);
+
+    return data;
+}
+
+static int wb_gpio_direction_in(struct gpio_chip *gc, unsigned gpio_num)
+{
+    u32 data;
+    unsigned int bank, offset;
+    unsigned long flags;
+
+    bank = gpio_num / BANKSIZE;
+    offset = gpio_num % BANKSIZE;
+
+    spin_lock_irqsave(&sio_lock, flags);
+    if (bank == 0) {
+        data = inl(GP_IO_SEL);
+        data = data | (1 << offset);
+        outl(data, GP_IO_SEL);
+    } else if (bank == 1) {
+        data = inl(GP_IO_SEL2);
+        data = data | (1 << offset);
+        outl(data, GP_IO_SEL2);
+    } else if (bank == 2) {
+        data = inl(GP_IO_SEL3);
+        data = data | (1 << offset);
+        outl(data, GP_IO_SEL3);
+    }
+    spin_unlock_irqrestore(&sio_lock, flags);
+
+    return 0;
+}
+
+static void wb_gpio_set(struct gpio_chip *gc,
+                unsigned gpio_num, int val)
+{
+    u32 data;
+    unsigned int bank, offset;
+    unsigned long flags;
+
+    bank = gpio_num / BANKSIZE;
+    offset = gpio_num % BANKSIZE;
+
+    spin_lock_irqsave(&sio_lock, flags);
+    if (bank == 0) {
+        data = inl(GP_LVL);
+        if (val) {
+            data = data | (1 << offset);
+        } else {
+            data = data & ~(1 << offset);
+        }
+        outl(data, GP_LVL);
+    } else if (bank == 1) {
+        data = inl(GP_LVL2);
+        if (val) {
+            data = data | (1 << offset);
+        } else {
+            data = data & ~(1 << offset);
+        }
+        outl(data, GP_LVL2);
+    } else if (bank == 2) {
+        data = inl(GP_LVL3);
+        if (val) {
+            data = data | (1 << offset);
+        } else {
+            data = data & ~(1 << offset);
+        }
+        outl(data, GP_LVL3);
+    }
+    spin_unlock_irqrestore(&sio_lock, flags);
+
+    return;
+}
+
+static int wb_gpio_direction_out(struct gpio_chip *gc,
+                    unsigned gpio_num, int val)
+{
+    u32 data;
+    unsigned int bank, offset;
+    unsigned long flags;
+
+    bank = gpio_num / BANKSIZE;
+    offset = gpio_num % BANKSIZE;
+
+    spin_lock_irqsave(&sio_lock, flags);
+    if (bank == 0) {
+        data = inl(GP_IO_SEL);
+        data = data & ~(1 << offset);
+        outl(data, GP_IO_SEL);
+
+        data = inl(GP_LVL);
+        if (val) {
+            data = data | (1 << offset);
+        } else {
+            data = data & ~(1 << offset);
+        }
+        outl(data, GP_LVL);
+    } else if (bank == 1) {
+        data = inl(GP_IO_SEL2);
+        data = data & ~(1 << offset);
+        outl(data, GP_IO_SEL2);
+
+        data = inl(GP_LVL2);
+        if (val) {
+            data = data | (1 << offset);
+        } else {
+            data = data & ~(1 << offset);
+        }
+        outl(data, GP_LVL2);
+    } else if (bank == 2) {
+        data = inl(GP_IO_SEL3);
+        data = data & ~(1 << offset);
+        outl(data, GP_IO_SEL3);
+
+        data = inl(GP_LVL3);
+        if (val) {
+            data = data | (1 << offset);
+        } else {
+            data = data & ~(1 << offset);
+        }
+        outl(data, GP_LVL3);
+    }
+    spin_unlock_irqrestore(&sio_lock, flags);
+
+    return 0;
+}
+
+#ifdef CONFIG_OF
+static int wb_gpio_of_xlate(struct gpio_chip *chip,
+                              const struct of_phandle_args *gpio_desc,
+                              u32 *flags)
+{
+    if (chip->of_gpio_n_cells < 2) {
+        return -EINVAL;
+    }
+
+    if (flags) {
+        *flags = gpio_desc->args[1];
+    }
+
+    return gpio_desc->args[0];
+}
+#endif
+
+static int wb_gpio_request(struct gpio_chip *chip, unsigned int offset)
+{
+    u32 data;
+    unsigned int bank, tmp_offset;
+    unsigned long flags;
+
+    bank = offset / BANKSIZE;
+    tmp_offset = offset % BANKSIZE;
+
+    spin_lock_irqsave(&sio_lock, flags);
+    if (bank == 0) {
+        data = inl(GPIO_BASE);
+        data = data | (1 << tmp_offset);
+        outl(data, GPIO_BASE);
+    } else if (bank == 1) {
+        data = inl(GPIO_USE_SEL2);
+        data = data | (1 << tmp_offset);
+        outl(data, GPIO_USE_SEL2);
+    } else if (bank == 2) {
+        data = inl(GPIO_USE_SEL3);
+        data = data | (1 << tmp_offset);
+        outl(data, GPIO_USE_SEL3);
+    }
+    spin_unlock_irqrestore(&sio_lock, flags);
+
+    return 0;
+}
+
+#if 0
+static void wb_gpio_free(struct gpio_chip *chip, unsigned int offset)
+{
+    u32 data;
+    unsigned int bank, tmp_offset;
+    unsigned long flags;
+
+    bank = offset / BANKSIZE;
+    tmp_offset = offset % BANKSIZE;
+
+    spin_lock_irqsave(&sio_lock, flags);
+    if (bank == 0) {
+        data = inl(GPIO_BASE);
+        data = data & ~(1 << tmp_offset);
+        outl(data, GPIO_BASE);
+    } else if (bank == 1) {
+        data = inl(GPIO_USE_SEL2);
+        data = data & ~(1 << tmp_offset);
+        outl(data, GPIO_USE_SEL2);
+    } else if (bank == 2) {
+        data = inl(GPIO_USE_SEL3);
+        data = data & ~(1 << tmp_offset);
+        outl(data, GPIO_USE_SEL3);
+    }
+
+    spin_unlock_irqrestore(&sio_lock, flags);
+
+    return;
+}
+#endif
+
+static struct gpio_chip wb_gpio_chip = {
+    .label              = GPIO_NAME,
+    .owner              = THIS_MODULE,
+    .base               = GPIO_BASE_ID,
+    .get                = wb_gpio_get,
+    .direction_input    = wb_gpio_direction_in,
+    .set                = wb_gpio_set,
+    .direction_output   = wb_gpio_direction_out,
+#ifdef CONFIG_OF
+    .of_xlate           = wb_gpio_of_xlate,
+#endif
+    .request            = wb_gpio_request,
+    .ngpio              = D1500_GPIO_PIN_NUM,
+#ifdef CONFIG_OF
+    .of_gpio_n_cells    = CELL_NUM,
+#endif
+    .can_sleep          = false,
+};
+
+static int wb_gpio_probe(struct platform_device *pdev)
+{
+    struct gpio_d1500_t *gpio;
+    int err;
+
+    gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL);
+    if (!gpio) {
+        dev_err(&pdev->dev, "gpio kzalloc failed\n");
+        return -ENOMEM;
+    }
+
+    wb_gpio_chip.parent = &pdev->dev;
+    gpio->register_base = GPIO_BASE;
+    gpio->chip = wb_gpio_chip;
+    pdev->dev.platform_data = &wb_gpio_chip;
+    err = devm_gpiochip_add_data(&pdev->dev, &wb_gpio_chip, gpio);
+    if (err) {
+        dev_err(&pdev->dev, "gpiochip add failed\n");
+        return err;
+    }
+
+    dev_info(&pdev->dev, "register %llu gpio success.\n", gpio->register_base);
+
+    return 0;
+}
+
+static int wb_gpio_remove(struct platform_device *pdev)
+{
+    dev_info(&pdev->dev, "unregister d1500 gpio success\n");
+    return 0;
+}
+
+static const struct of_device_id gpio_d1500_match[] = {
+    {
+        .compatible = "wb_gpio_d1500",
+    },
+    {},
+};
+MODULE_DEVICE_TABLE(of, gpio_d1500_match);
+
+static struct platform_driver wb_gpio_driver = {
+    .driver = {
+        .name        = GPIO_NAME,
+        .of_match_table = gpio_d1500_match,
+    },
+    .probe      = wb_gpio_probe,
+    .remove     = wb_gpio_remove,
+};
+
+module_platform_driver(wb_gpio_driver);
+
+MODULE_DESCRIPTION("d1500 gpio driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_device.c
new file mode 100644
index 000000000000..75f883b5909d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_gpio_device.c
@@ -0,0 +1,54 @@
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+static int g_wb_gpio_device_debug = 0;
+static int g_wb_gpio_device_error = 0;
+
+module_param(g_wb_gpio_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_gpio_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_GPIO_DEVICE_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_gpio_device_debug) { \
+        printk(KERN_INFO "[WB_GPIO_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_GPIO_DEVICE_ERROR(fmt, args...) do {                                        \
+    if (g_wb_gpio_device_error) { \
+        printk(KERN_ERR "[WB_GPIO_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static void wb_gpio_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device wb_gpio_d1500_device = {
+    .name   = "wb_gpio_d1500",
+    .id = -1,
+    .dev    = {
+        .release = wb_gpio_device_release,
+    },
+};
+
+static int __init wb_gpio_device_init(void)
+{
+    WB_GPIO_DEVICE_VERBOSE("wb_gpio_device_init enter!\n");
+    return platform_device_register(&wb_gpio_d1500_device);
+}
+
+static void __exit wb_gpio_device_exit(void)
+{
+    WB_GPIO_DEVICE_VERBOSE("wb_gpio_device_exit enter!\n");
+    return platform_device_unregister(&wb_gpio_d1500_device);
+}
+
+module_init(wb_gpio_device_init);
+module_exit(wb_gpio_device_exit);
+MODULE_DESCRIPTION("GPIO Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c
new file mode 100644
index 000000000000..988ef12a7672
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c
@@ -0,0 +1,774 @@
+/*
+ * wb_io_dev.c
+ * ko to read/write i2c client through /dev/XXX device
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/miscdevice.h>
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <linux/fs.h>
+#include <linux/export.h>
+#include <linux/uio.h>
+
+#include "wb_i2c_dev.h"
+
+#define MAX_I2C_DEV_NUM      (256)
+#define FPGA_MAX_LEN         (256)
+#define MAX_NAME_SIZE        (20)
+#define MAX_BUS_WIDTH        (16)
+#define TRANSFER_WRITE_BUFF  (FPGA_MAX_LEN + MAX_BUS_WIDTH)
+
+#define WIDTH_1Byte          (1)
+#define WIDTH_2Byte          (2)
+#define WIDTH_4Byte          (4)
+
+static int g_i2c_dev_debug = 0;
+static int g_i2c_dev_error = 0;
+
+module_param(g_i2c_dev_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_i2c_dev_error, int, S_IRUGO | S_IWUSR);
+
+#define I2C_DEV_DEBUG_DMESG(fmt, args...) do {                                        \
+    if (g_i2c_dev_debug) { \
+        printk(KERN_ERR "[I2C_DEV][DEBUG][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define I2C_DEV_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_i2c_dev_error) { \
+        printk(KERN_ERR "[I2C_DEV][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static struct i2c_dev_info* i2c_dev_arry[MAX_I2C_DEV_NUM];
+
+struct i2c_dev_info {
+    const char *name;
+    uint32_t data_bus_width;
+    uint32_t addr_bus_width;
+    uint32_t per_rd_len;
+    uint32_t per_wr_len;
+    uint32_t i2c_len;
+    struct miscdevice misc;
+    struct i2c_client *client;
+};
+
+static int transfer_read(struct i2c_client *client, u8 *buf, loff_t regaddr, size_t count)
+{
+    struct i2c_adapter *adap;
+    int i;
+    u8 offset_buf[MAX_BUS_WIDTH];
+    struct i2c_msg msgs[2];
+    int msgs_num, ret;
+    struct i2c_dev_info *i2c_dev;
+
+    if (!client) {
+        I2C_DEV_DEBUG_ERROR("can't get read client\n");
+        return -ENODEV;
+    }
+
+    adap = client->adapter;
+    if (!adap) {
+        I2C_DEV_DEBUG_ERROR("can't get read adap\n");
+        return -ENODEV;
+    }
+
+    i2c_dev = i2c_get_clientdata(client);
+    if (!i2c_dev) {
+        I2C_DEV_DEBUG_ERROR("can't get read i2c_dev\n");
+        return -ENODEV;
+    }
+
+    i = 0;
+
+    mem_clear(offset_buf, sizeof(offset_buf));
+
+    switch (i2c_dev->addr_bus_width) {
+    case WIDTH_4Byte:
+        offset_buf[i++] = (regaddr >> 24) & 0xFF;
+        offset_buf[i++] = (regaddr >> 16) & 0xFF;
+        offset_buf[i++] = (regaddr >> 8) & 0xFF;
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_2Byte:
+        offset_buf[i++] = (regaddr >> 8) & 0xFF;
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_1Byte:
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    default:
+        I2C_DEV_DEBUG_ERROR("Only support 1,2,4 Byte Address Width,but set width = %u\n",
+            i2c_dev->addr_bus_width);
+        return -EINVAL;
+    }
+
+    if (adap->algo->master_xfer) {
+        mem_clear(msgs, sizeof(msgs));
+        msgs[0].addr = client->addr;
+        msgs[0].flags = 0;
+        msgs[0].len = i2c_dev->addr_bus_width;
+        msgs[0].buf = offset_buf;
+
+        msgs[1].addr = client->addr;
+        msgs[1].flags = I2C_M_RD;
+        msgs[1].len = count;
+        msgs[1].buf = buf;
+
+        msgs_num = 2;
+        ret = i2c_transfer(client->adapter, msgs, msgs_num);
+        if (ret != msgs_num) {
+            I2C_DEV_DEBUG_ERROR("i2c_transfer read error\n");
+            return -EINVAL;
+        }
+    } else {
+        I2C_DEV_DEBUG_ERROR("don't find read master_xfer\n");
+        return -EINVAL;
+
+    }
+    return 0;
+}
+
+static int transfer_write(struct i2c_client *client, u8 *buf, loff_t regaddr, size_t count)
+{
+    struct i2c_adapter *adap;
+    int i;
+    u8 offset_buf[TRANSFER_WRITE_BUFF];
+    struct i2c_msg msgs[1];
+    int msgs_num, ret;
+    struct i2c_dev_info *i2c_dev;
+
+    if (!client) {
+        I2C_DEV_DEBUG_ERROR("can't get write client\n");
+        return -ENODEV;
+    }
+
+    adap = client->adapter;
+    if (!adap) {
+        I2C_DEV_DEBUG_ERROR("can't get write adap\n");
+        return -ENODEV;
+    }
+
+    i2c_dev = i2c_get_clientdata(client);
+    if (!i2c_dev) {
+        I2C_DEV_DEBUG_ERROR("can't get read i2c_dev\n");
+        return -ENODEV;
+    }
+
+    i = 0;
+
+    mem_clear(offset_buf, sizeof(offset_buf));
+
+    switch (i2c_dev->addr_bus_width) {
+    case WIDTH_4Byte:
+        offset_buf[i++] = (regaddr >> 24) & 0xFF;
+        offset_buf[i++] = (regaddr >> 16) & 0xFF;
+        offset_buf[i++] = (regaddr >> 8) & 0xFF;
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_2Byte:
+        offset_buf[i++] = (regaddr >> 8) & 0xFF;
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_1Byte:
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    default:
+        I2C_DEV_DEBUG_ERROR("Only support 1,2,4 Byte Address Width,but set width = %u\n",
+            i2c_dev->addr_bus_width);
+        return -EINVAL;
+    }
+
+    memcpy(offset_buf + i2c_dev->addr_bus_width, buf, count);
+
+    if (adap->algo->master_xfer) {
+        mem_clear(msgs, sizeof(msgs));
+
+        msgs[0].addr = client->addr;
+        msgs[0].flags = 0;
+        msgs[0].len = i2c_dev->addr_bus_width + count;
+        msgs[0].buf = offset_buf;
+
+        msgs_num = 1;
+        ret = i2c_transfer(adap, msgs, msgs_num);
+        if (ret != msgs_num) {
+            I2C_DEV_DEBUG_ERROR("i2c_transfer write error\n");
+            return -EINVAL;
+        }
+    } else {
+        I2C_DEV_DEBUG_ERROR("don't find write master_xfer\n");
+        return -EINVAL;
+    }
+
+    return 0;
+}
+
+static long i2c_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+    return 0;
+}
+
+static int i2c_dev_open(struct inode *inode, struct file *file)
+{
+    unsigned int minor = iminor(inode);
+    struct i2c_dev_info *i2c_dev;
+
+    i2c_dev = i2c_dev_arry[minor];
+    if (i2c_dev == NULL) {
+        return -ENODEV;
+    }
+
+    file->private_data = i2c_dev;
+
+    return 0;
+}
+
+static int i2c_dev_release(struct inode *inode, struct file *file)
+{
+    file->private_data = NULL;
+
+    return 0;
+}
+
+static int device_read(struct i2c_dev_info *i2c_dev, uint32_t offset, uint8_t *buf, size_t count)
+{
+    int i, j, ret;
+    u8 tmp_offset;
+    u8 val[FPGA_MAX_LEN];
+    u32 width, rd_len, per_len, tmp;
+    u32 max_per_len;
+
+    if (offset > i2c_dev->i2c_len) {
+        I2C_DEV_DEBUG_DMESG("offset: 0x%x, i2c len: 0x%x, count: %lu, EOF.\n",
+            offset, i2c_dev->i2c_len, count);
+        return 0;
+    }
+
+    if (count > (i2c_dev->i2c_len - offset)) {
+        I2C_DEV_DEBUG_DMESG("read count out of range. input len:%lu, read len:%u.\n",
+            count, i2c_dev->i2c_len - offset);
+        count = i2c_dev->i2c_len - offset;
+    }
+
+    if (count == 0) {
+        I2C_DEV_DEBUG_DMESG("offset: 0x%x, i2c len: 0x%x, read len: %lu, EOF.\n",
+            offset, i2c_dev->i2c_len, count);
+        return 0;
+    }
+
+    width = i2c_dev->data_bus_width;
+    switch (width) {
+    case WIDTH_4Byte:
+        tmp_offset = offset & 0x3;
+        if (tmp_offset) {
+            I2C_DEV_DEBUG_ERROR("data bus width:%u, offset:%u, read size %lu invalid.\n",
+                width, offset, count);
+            return -EINVAL;
+        }
+        break;
+    case WIDTH_2Byte:
+        tmp_offset = offset & 0x1;
+        if (tmp_offset) {
+            I2C_DEV_DEBUG_ERROR("data bus width:%u, offset:%u, read size %lu invalid.\n",
+                width, offset, count);
+            return -EINVAL;
+        }
+        break;
+    case WIDTH_1Byte:
+        break;
+    default:
+        I2C_DEV_DEBUG_ERROR("Only support 1,2,4 Byte Data Width,but set width = %u\n", width);
+        return -EINVAL;
+    }
+
+    max_per_len = i2c_dev->per_rd_len;
+    tmp = (width - 1) & count;
+    rd_len = (tmp == 0) ? count : count + width - tmp;
+    per_len = (rd_len > max_per_len) ? (max_per_len) : (rd_len);
+
+    mem_clear(val, sizeof(val));
+    for (i = 0; i < rd_len; i += per_len) {
+        ret = transfer_read(i2c_dev->client, val + i, offset + i, per_len);
+        if (ret < 0) {
+            I2C_DEV_DEBUG_ERROR("read error.read offset = %u\n", (offset + i));
+            return -EFAULT;
+        }
+    }
+
+    if (width == WIDTH_1Byte) {
+        memcpy(buf, val, count);
+    } else {
+        for (i = 0; i < count; i += width) {
+            for (j = 0; (j < width) && (i + j < count); j++) {
+                buf[i + j] = val[i + width - j - 1];
+            }
+        }
+    }
+
+    return count;
+}
+
+static int device_write(struct i2c_dev_info *i2c_dev, uint32_t offset, uint8_t *buf, size_t count)
+{
+    int i, j, ret;
+    u8 tmp_offset;
+    u32 width;
+    u8 val[FPGA_MAX_LEN];
+    u32 wr_len, per_len, tmp;
+    u32 max_per_len;
+
+    if (offset > i2c_dev->i2c_len) {
+        I2C_DEV_DEBUG_DMESG("offset: 0x%x, i2c len: 0x%x, count: %lu, EOF.\n",
+            offset, i2c_dev->i2c_len, count);
+        return 0;
+    }
+
+    if (count > (i2c_dev->i2c_len - offset)) {
+        I2C_DEV_DEBUG_DMESG("read count out of range. input len:%lu, read len:%u.\n",
+            count, i2c_dev->i2c_len - offset);
+        count = i2c_dev->i2c_len - offset;
+    }
+
+    if (count == 0) {
+        I2C_DEV_DEBUG_DMESG("offset: 0x%x, i2c len: 0x%x, read len: %lu, EOF.\n",
+            offset, i2c_dev->i2c_len, count);
+        return 0;
+    }
+
+    width = i2c_dev->data_bus_width;
+    switch (width) {
+    case WIDTH_4Byte:
+        tmp_offset = offset & 0x3;
+        if (tmp_offset) {
+            I2C_DEV_DEBUG_ERROR("data bus width:%u, offset:%u, read size %lu invalid.\n",
+                width, offset, count);
+            return -EINVAL;
+        }
+        break;
+    case WIDTH_2Byte:
+        tmp_offset = offset & 0x1;
+        if (tmp_offset) {
+            I2C_DEV_DEBUG_ERROR("data bus width:%u, offset:%u, read size %lu invalid.\n",
+                width, offset, count);
+            return -EINVAL;
+        }
+        break;
+    case WIDTH_1Byte:
+        break;
+    default:
+        I2C_DEV_DEBUG_ERROR("Only support 1,2,4 Byte Data Width,but set width = %u\n", width);
+        return -EINVAL;
+    }
+
+    mem_clear(val, sizeof(val));
+
+    if (width == WIDTH_1Byte) {
+        memcpy(val, buf, count);
+    } else {
+        for (i = 0; i < count; i += width) {
+            for (j = 0; (j < width) && (i + j < count); j++) {
+                val[i + width - j - 1] = buf[i + j];
+            }
+        }
+    }
+
+    max_per_len = i2c_dev->per_wr_len;
+    tmp = (width - 1) & count;
+    wr_len = (tmp == 0) ? count : count + width - tmp;
+    per_len = (wr_len > max_per_len) ? (max_per_len) : (wr_len);
+
+    for (i = 0; i < wr_len; i += per_len) {
+        ret = transfer_write(i2c_dev->client, val + i, offset + i, per_len);
+        if (ret < 0) {
+            I2C_DEV_DEBUG_ERROR("write error.offset = %u\n", (offset + i));
+            return -EFAULT;
+        }
+    }
+    return count;
+}
+
+static ssize_t i2c_dev_read(struct file *file, char __user *buf, size_t count, loff_t *offset)
+{
+    u8 val[FPGA_MAX_LEN];
+    int ret, read_len;
+    struct i2c_dev_info *i2c_dev;
+
+    i2c_dev = file->private_data;
+    if (i2c_dev == NULL) {
+        I2C_DEV_DEBUG_ERROR("can't get read private_data.\n");
+        return -EINVAL;
+    }
+
+    if (count == 0) {
+        I2C_DEV_DEBUG_ERROR("Invalid params, read count is 0.\n");
+        return -EINVAL;
+    }
+
+    if (count > sizeof(val)) {
+        I2C_DEV_DEBUG_DMESG("read count %lu exceed max %lu.\n", count, sizeof(val));
+        count = sizeof(val);
+    }
+
+    mem_clear(val, sizeof(val));
+    read_len = device_read(i2c_dev, (uint32_t)*offset, val, count);
+    if (read_len < 0) {
+        I2C_DEV_DEBUG_ERROR("i2c dev read failed, dev name:%s, offset:0x%x, len:%lu.\n",
+            i2c_dev->name, (uint32_t)*offset, count);
+        return read_len;
+    }
+
+    if (access_ok(buf, read_len)) {
+        I2C_DEV_DEBUG_DMESG("user space read, buf: %p, offset: %lld, read count %lu.\n",
+            buf, *offset, count);
+        if (copy_to_user(buf, val, read_len)) {
+            I2C_DEV_DEBUG_ERROR("copy_to_user failed.\n");
+            return -EFAULT;
+        }
+    } else {
+        I2C_DEV_DEBUG_DMESG("kernel space read, buf: %p, offset: %lld, read count %lu.\n",
+            buf, *offset, count);
+        memcpy(buf, val, read_len);
+    }
+
+    *offset += read_len;
+    ret = read_len;
+    return ret;
+}
+
+static ssize_t i2c_dev_read_iter(struct kiocb *iocb, struct iov_iter *to)
+{
+    int ret;
+
+    I2C_DEV_DEBUG_DMESG("i2c_dev_read_iter, file: %p, count: %lu, offset: %lld\n",
+        iocb->ki_filp, to->count, iocb->ki_pos);
+    ret = i2c_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos);
+    return ret;
+}
+
+static ssize_t i2c_dev_write(struct file *file, const char __user *buf, size_t count, loff_t *offset)
+{
+    u8 val[FPGA_MAX_LEN];
+    int write_len;
+    struct i2c_dev_info *i2c_dev;
+
+    i2c_dev = file->private_data;
+    if (i2c_dev == NULL) {
+        I2C_DEV_DEBUG_ERROR("get write private_data error.\n");
+        return -EINVAL;
+    }
+
+    if (count == 0) {
+        I2C_DEV_DEBUG_ERROR("Invalid params, write count is 0.\n");
+        return -EINVAL;
+    }
+
+    if (count > sizeof(val)) {
+        I2C_DEV_DEBUG_DMESG("write count %lu exceed max %lu.\n", count, sizeof(val));
+        count = sizeof(val);
+    }
+
+    mem_clear(val, sizeof(val));
+    if (access_ok(buf, count)) {
+        I2C_DEV_DEBUG_DMESG("user space write, buf: %p, offset: %lld, write count %lu.\n",
+            buf, *offset, count);
+        if (copy_from_user(val, buf, count)) {
+            I2C_DEV_DEBUG_ERROR("copy_from_user failed.\n");
+            return -EFAULT;
+        }
+    } else {
+        I2C_DEV_DEBUG_DMESG("kernel space write, buf: %p, offset: %lld, write count %lu.\n",
+            buf, *offset, count);
+        memcpy(val, buf, count);
+    }
+
+    write_len = device_write(i2c_dev, (uint32_t)*offset, val, count);
+    if (write_len < 0) {
+        I2C_DEV_DEBUG_ERROR("i2c dev write failed, dev name:%s, offset:0x%llx, len:%lu.\n",
+            i2c_dev->name, *offset, count);
+        return write_len;
+    }
+
+    *offset += write_len;
+    return write_len;
+}
+
+static ssize_t i2c_dev_write_iter(struct kiocb *iocb, struct iov_iter *from)
+{
+    int ret;
+
+    I2C_DEV_DEBUG_DMESG("i2c_dev_write_iter, file: %p, count: %lu, offset: %lld\n",
+        iocb->ki_filp, from->count, iocb->ki_pos);
+    ret = i2c_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos);
+    return ret;
+}
+
+static loff_t i2c_dev_llseek(struct file *file, loff_t offset, int origin)
+{
+    loff_t ret = 0;
+    struct i2c_dev_info *i2c_dev;
+
+    i2c_dev = file->private_data;
+    if (i2c_dev == NULL) {
+        I2C_DEV_DEBUG_ERROR("i2c_dev is NULL, llseek failed.\n");
+        return -EINVAL;
+    }
+
+    switch (origin) {
+    case SEEK_SET:
+        if (offset < 0) {
+            I2C_DEV_DEBUG_ERROR("SEEK_SET, offset:%lld, invalid.\n", offset);
+            ret = -EINVAL;
+            break;
+        }
+        if (offset > i2c_dev->i2c_len) {
+            I2C_DEV_DEBUG_ERROR("SEEK_SET out of range, offset:%lld, i2c_len:0x%x.\n",
+                offset, i2c_dev->i2c_len);
+            ret = - EINVAL;
+            break;
+        }
+        file->f_pos = offset;
+        ret = file->f_pos;
+        break;
+    case SEEK_CUR:
+        if (((file->f_pos + offset) > i2c_dev->i2c_len) || ((file->f_pos + offset) < 0)) {
+            I2C_DEV_DEBUG_ERROR("SEEK_CUR out of range, f_ops:%lld, offset:%lld, i2c_len:0x%x.\n",
+                file->f_pos, offset, i2c_dev->i2c_len);
+            ret = - EINVAL;
+            break;
+        }
+        file->f_pos += offset;
+        ret = file->f_pos;
+        break;
+    default:
+        I2C_DEV_DEBUG_ERROR("unsupport llseek type:%d.\n", origin);
+        ret = -EINVAL;
+        break;
+    }
+    return ret;
+}
+
+static const struct file_operations i2c_dev_fops = {
+    .owner      = THIS_MODULE,
+    .llseek     = i2c_dev_llseek,
+    .read_iter     = i2c_dev_read_iter,
+    .write_iter    = i2c_dev_write_iter,
+    .unlocked_ioctl = i2c_dev_ioctl,
+    .open       = i2c_dev_open,
+    .release    = i2c_dev_release,
+};
+
+static struct i2c_dev_info * dev_match(const char *path)
+{
+    struct i2c_dev_info * i2c_dev;
+    char dev_name[MAX_NAME_SIZE];
+    int i;
+    for (i = 0; i < MAX_I2C_DEV_NUM; i++) {
+        if (i2c_dev_arry[ i ] == NULL) {
+            continue;
+        }
+        i2c_dev = i2c_dev_arry[ i ];
+        snprintf(dev_name, MAX_NAME_SIZE,"/dev/%s", i2c_dev->name);
+        if (!strcmp(path, dev_name)) {
+            I2C_DEV_DEBUG_DMESG("get dev_name = %s, minor = %d\n", dev_name, i);
+            return i2c_dev;
+        }
+    }
+
+    return NULL;
+}
+
+int i2c_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    struct i2c_dev_info *i2c_dev = NULL;
+    int ret;
+
+    if(path == NULL){
+        I2C_DEV_DEBUG_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if(buf == NULL){
+        I2C_DEV_DEBUG_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    if (count > FPGA_MAX_LEN) {
+        I2C_DEV_DEBUG_ERROR("read count %lu, beyond max:%d.\n", count, FPGA_MAX_LEN);
+        return -EINVAL;
+    }
+
+    i2c_dev = dev_match(path);
+    if (i2c_dev == NULL) {
+        I2C_DEV_DEBUG_ERROR("i2c_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    ret = device_read(i2c_dev, offset, buf, count);
+    if (ret < 0) {
+        I2C_DEV_DEBUG_ERROR("fpga i2c dev read failed, dev name:%s, offset:0x%x, len:%lu.\n",
+            i2c_dev->name, offset, count);
+        return -EINVAL;
+    }
+
+    return count;
+}
+EXPORT_SYMBOL(i2c_device_func_read);
+
+int i2c_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    struct i2c_dev_info *i2c_dev = NULL;
+    int ret;
+
+    if(path == NULL){
+        I2C_DEV_DEBUG_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if(buf == NULL){
+        I2C_DEV_DEBUG_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    if (count > FPGA_MAX_LEN) {
+        I2C_DEV_DEBUG_ERROR("write count %lu, beyond max:%d.\n", count, FPGA_MAX_LEN);
+        return -EINVAL;
+    }
+
+    i2c_dev = dev_match(path);
+    if (i2c_dev == NULL) {
+        I2C_DEV_DEBUG_ERROR("i2c_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    ret = device_write (i2c_dev, offset, buf, count);
+    if (ret < 0) {
+        I2C_DEV_DEBUG_ERROR("i2c dev write failed, dev name:%s, offset:0x%x, len:%lu.\n",
+            i2c_dev->name, offset, count);
+        return -EINVAL;
+    }
+
+    return count;
+}
+EXPORT_SYMBOL(i2c_device_func_write);
+
+static int i2c_dev_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+    int ret = 0;
+    struct i2c_dev_info *i2c_dev;
+    struct miscdevice *misc;
+    i2c_dev_device_t *i2c_dev_device;
+
+    i2c_dev = devm_kzalloc(&client->dev, sizeof(struct i2c_dev_info), GFP_KERNEL);
+    if (!i2c_dev) {
+        dev_err(&client->dev, "devm_kzalloc error. \n");
+        return -ENOMEM;
+    }
+
+    i2c_set_clientdata(client, i2c_dev);
+    i2c_dev->client = client;
+
+    if (client->dev.of_node) {
+
+        ret += of_property_read_string(client->dev.of_node, "i2c_name", &i2c_dev->name);
+        ret += of_property_read_u32(client->dev.of_node, "data_bus_width", &i2c_dev->data_bus_width);
+        ret += of_property_read_u32(client->dev.of_node, "addr_bus_width", &i2c_dev->addr_bus_width);
+        ret += of_property_read_u32(client->dev.of_node, "per_rd_len", &i2c_dev->per_rd_len);
+        ret += of_property_read_u32(client->dev.of_node, "per_wr_len", &i2c_dev->per_wr_len);
+        ret += of_property_read_u32(client->dev.of_node, "i2c_len", &i2c_dev->i2c_len);
+        if (ret != 0) {
+            dev_err(&client->dev, "dts config error.ret:%d.\n", ret);
+            return -ENXIO;
+        }
+    } else {
+        if (client->dev.platform_data == NULL) {
+            dev_err(&client->dev, "Failed to get platform data config.\n");
+            return -ENXIO;
+        }
+        i2c_dev_device = client->dev.platform_data;
+        i2c_dev->name = i2c_dev_device->i2c_name;
+        i2c_dev->data_bus_width = i2c_dev_device->data_bus_width;
+        i2c_dev->addr_bus_width = i2c_dev_device->addr_bus_width;
+        i2c_dev->per_rd_len = i2c_dev_device->per_rd_len;
+        i2c_dev->per_wr_len = i2c_dev_device->per_wr_len;
+        i2c_dev->i2c_len = i2c_dev_device->i2c_len;
+    }
+
+    if ((i2c_dev->per_rd_len & (i2c_dev->data_bus_width - 1)) ||
+        (i2c_dev->per_wr_len & (i2c_dev->data_bus_width - 1))) {
+        dev_err(&client->dev, "Invalid config per_rd_len %d per_wr_len %d data bus_width %d.\n",
+            i2c_dev->per_rd_len, i2c_dev->per_wr_len, i2c_dev->data_bus_width);
+        return -ENXIO;
+    }
+
+    if ((i2c_dev->i2c_len == 0) || (i2c_dev->i2c_len & (i2c_dev->data_bus_width - 1))) {
+        dev_err(&client->dev, "Invalid config i2c_len %d, data bus_width %d.\n",
+            i2c_dev->i2c_len, i2c_dev->data_bus_width);
+        return -ENXIO;
+    }
+
+    misc = &i2c_dev->misc;
+    misc->minor = MISC_DYNAMIC_MINOR;
+    misc->name = i2c_dev->name;
+    misc->fops = &i2c_dev_fops;
+    misc->mode = 0666;
+    if (misc_register(misc) != 0) {
+        dev_err(&client->dev, "register %s faild.\n", misc->name);
+        return -ENXIO;
+    }
+
+    if (misc->minor >= MAX_I2C_DEV_NUM) {
+        dev_err(&client->dev, "minor number beyond the limit! is %d.\n", misc->minor);
+        misc_deregister(misc);
+        return -ENXIO;
+    }
+    i2c_dev_arry[misc->minor] = i2c_dev;
+
+    dev_info(&client->dev, "register %u addr_bus_width %u data_bus_width 0x%x i2c_len device %s with %u per_rd_len %u per_wr_len success.\n",
+        i2c_dev->addr_bus_width, i2c_dev->data_bus_width, i2c_dev->i2c_len, i2c_dev->name, i2c_dev->per_rd_len, i2c_dev->per_wr_len);
+
+    return 0;
+}
+
+static int i2c_dev_remove(struct i2c_client *client)
+{
+    int i;
+    for (i = 0; i < MAX_I2C_DEV_NUM; i++) {
+        if (i2c_dev_arry[i] != NULL) {
+            misc_deregister(&i2c_dev_arry[i]->misc);
+            i2c_dev_arry[i] = NULL;
+        }
+    }
+    return 0;
+}
+
+static const struct i2c_device_id i2c_dev_id[] = {
+    { "wb-i2c-dev", 0 },
+    { }
+};
+MODULE_DEVICE_TABLE(i2c, i2c_dev_id);
+
+static const struct of_device_id i2c_dev_of_match[] = {
+    { .compatible = "wb-i2c-dev" },
+    { },
+};
+MODULE_DEVICE_TABLE(of, i2c_dev_of_match);
+
+static struct i2c_driver i2c_dev_driver = {
+    .driver = {
+        .name = "wb-i2c-dev",
+        .of_match_table = i2c_dev_of_match,
+    },
+    .probe      = i2c_dev_probe,
+    .remove     = i2c_dev_remove,
+    .id_table   = i2c_dev_id,
+};
+module_i2c_driver(i2c_dev_driver);
+
+MODULE_DESCRIPTION("i2c dev driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.h
new file mode 100644
index 000000000000..9cc95d88e804
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.h
@@ -0,0 +1,20 @@
+#ifndef __WB_I2C_DEV_H__
+#define __WB_I2C_DEV_H__
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+#define I2C_DEV_NAME_MAX_LEN (64)
+
+typedef struct i2c_dev_device_s {
+    struct i2c_client *client;
+    uint32_t i2c_bus;
+    uint32_t i2c_addr;
+    char i2c_name[I2C_DEV_NAME_MAX_LEN];
+    uint32_t data_bus_width;
+    uint32_t addr_bus_width;
+    uint32_t per_rd_len;
+    uint32_t per_wr_len;
+    uint32_t i2c_len;
+} i2c_dev_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c
new file mode 100644
index 000000000000..1f69d96bad0b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c
@@ -0,0 +1,1143 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * i2c-ocores.c: I2C bus driver for OpenCores I2C controller
+ * (https://opencores.org/project/i2c/overview)
+ *
+ * Peter Korsgaard <peter@korsgaard.com>
+ *
+ * Support for the GRLIB port of the controller by
+ * Andreas Larsson <andreas@gaisler.com>
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/errno.h>
+#include <linux/platform_device.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/wait.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <linux/log2.h>
+#include <linux/spinlock.h>
+#include <linux/jiffies.h>
+#include <linux/pci.h>
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+
+#include "wb_i2c_ocores.h"
+
+#define OCORES_FLAG_POLL      BIT(0)
+
+/* registers */
+#define OCI2C_PRELOW          (0)
+#define OCI2C_PREHIGH         (1)
+#define OCI2C_CONTROL         (2)
+#define OCI2C_DATA            (3)
+#define OCI2C_CMD             (4) /* write only */
+#define OCI2C_STATUS          (4) /* read only, same address as OCI2C_CMD */
+
+#define OCI2C_CTRL_IEN        (0x40)
+#define OCI2C_CTRL_EN         (0x80)
+
+#define OCI2C_CMD_START       (0x91)
+#define OCI2C_CMD_STOP        (0x41)
+#define OCI2C_CMD_READ        (0x21)
+#define OCI2C_CMD_WRITE       (0x11)
+#define OCI2C_CMD_READ_ACK    (0x21)
+#define OCI2C_CMD_READ_NACK   (0x29)
+#define OCI2C_CMD_IACK        (0x01)
+
+#define OCI2C_STAT_IF         (0x01)
+#define OCI2C_STAT_TIP        (0x02)
+#define OCI2C_STAT_ARBLOST    (0x20)
+#define OCI2C_STAT_BUSY       (0x40)
+#define OCI2C_STAT_NACK       (0x80)
+
+#define STATE_DONE            (0)
+#define STATE_START           (1)
+#define STATE_WRITE           (2)
+#define STATE_READ            (3)
+#define STATE_ERROR           (4)
+
+#define TYPE_OCORES           (0)
+#define TYPE_GRLIB            (1)
+
+#define OCORE_WAIT_SCH        (40)
+#define REG_IO_WIDTH_1        (1)
+#define REG_IO_WIDTH_2        (2)
+#define REG_IO_WIDTH_4        (4)
+
+#define SYMBOL_I2C_DEV_MODE   (1)
+#define FILE_MODE             (2)
+#define SYMBOL_PCIE_DEV_MODE  (3)
+#define SYMBOL_IO_DEV_MODE    (4)
+
+typedef struct wb_pci_dev_s {
+    uint32_t domain;
+    uint32_t bus;
+    uint32_t slot;
+    uint32_t fn;
+} wb_pci_dev_t;
+
+/*
+ * 'process_lock' exists because ocores_process() and ocores_process_timeout()
+ * can't run in parallel.
+ */
+struct ocores_i2c {
+    uint32_t base_addr;
+    uint32_t reg_shift;
+    uint32_t reg_io_width;
+    unsigned long flags;
+    wait_queue_head_t wait;
+    struct i2c_adapter adap;
+    int adap_nr;
+    struct i2c_msg *msg;
+    int pos;
+    int nmsgs;
+    int state;
+    spinlock_t process_lock;
+    uint32_t ip_clock_khz;
+    uint32_t bus_clock_khz;
+    void (*setreg)(struct ocores_i2c *i2c, int reg, u32 value);
+    u32 (*getreg)(struct ocores_i2c *i2c, int reg);
+    const char *dev_name;
+    uint32_t reg_access_mode;
+    uint32_t big_endian;
+    uint32_t irq_offset;
+    wb_pci_dev_t wb_pci_dev;
+    struct device *dev;
+};
+
+int g_wb_ocores_i2c_debug = 0;
+int g_wb_ocores_i2c_error = 0;
+int g_wb_ocores_i2c_xfer = 0;
+
+module_param(g_wb_ocores_i2c_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_ocores_i2c_error, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_ocores_i2c_xfer, int, S_IRUGO | S_IWUSR);
+
+#define OCORES_I2C_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_ocores_i2c_debug) { \
+        printk(KERN_INFO "[OCORES_I2C][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define OCORES_I2C_ERROR(fmt, args...) do {                                        \
+    if (g_wb_ocores_i2c_error) { \
+        printk(KERN_ERR "[OCORES_I2C][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define OCORES_I2C_XFER(fmt, args...) do {                                        \
+    if (g_wb_ocores_i2c_xfer) { \
+        printk(KERN_INFO "[OCORES_I2C][XFER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+extern int i2c_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int i2c_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int pcie_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int pcie_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int io_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int io_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+#if 0
+int __attribute__((weak)) i2c_device_func_read(const char *path, uint32_t offset,
+                              uint8_t *buf, size_t count)
+{
+    OCORES_I2C_ERROR("enter __weak i2c func read\r\n");
+    return -EINVAL;
+}
+
+int __attribute__((weak)) i2c_device_func_write(const char *path, uint32_t offset,
+                              uint8_t *buf, size_t count)
+{
+    OCORES_I2C_ERROR("enter __weak i2c func write\r\n");
+    return -EINVAL;
+}
+
+int __attribute__((weak)) pcie_device_func_read(const char *path, uint32_t offset,
+                              uint8_t *buf, size_t count)
+{
+    OCORES_I2C_ERROR("enter __weak pcie func read\r\n");
+    return -EINVAL;
+}
+
+int __attribute__((weak)) pcie_device_func_write(const char *path, uint32_t offset,
+                              uint8_t *buf, size_t count)
+{
+    OCORES_I2C_ERROR("enter __weak pcie func write\r\n");
+    return -EINVAL;
+}
+
+int __attribute__((weak)) io_device_func_read(const char *path, uint32_t offset,
+                              uint8_t *buf, size_t count)
+{
+    OCORES_I2C_ERROR("enter __weak io func read\r\n");
+    return -EINVAL;
+}
+
+int __attribute__((weak)) io_device_func_write(const char *path, uint32_t offset,
+                              uint8_t *buf, size_t count)
+{
+    OCORES_I2C_ERROR("enter __weak io func write\r\n");
+    return -EINVAL;
+}
+#endif
+static int ocores_i2c_file_read(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    filp = filp_open(path, O_RDONLY, 0);
+    if (IS_ERR(filp)) {
+        OCORES_I2C_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    ret = kernel_read(filp, val, size, &tmp_pos);
+    if (ret < 0) {
+        OCORES_I2C_ERROR("kernel_read failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int ocores_i2c_file_write(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    filp = filp_open(path, O_RDWR, 777);
+    if (IS_ERR(filp)) {
+        OCORES_I2C_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    ret = kernel_write(filp, val, size, &tmp_pos);
+    if (ret < 0) {
+        OCORES_I2C_ERROR("kernel_write failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    vfs_fsync(filp, 1);
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int ocores_i2c_reg_write(struct ocores_i2c *i2c, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+
+    switch (i2c->reg_access_mode) {
+    case SYMBOL_I2C_DEV_MODE:
+        ret = i2c_device_func_write(i2c->dev_name, pos, val, size);
+        break;
+    case FILE_MODE:
+        ret = ocores_i2c_file_write(i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_PCIE_DEV_MODE:
+        ret = pcie_device_func_write(i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_IO_DEV_MODE:
+        ret = io_device_func_write(i2c->dev_name, pos, val, size);
+        break;
+    default:
+        OCORES_I2C_ERROR("err func_mode, write failed.\n");
+        return -EINVAL;
+    }
+
+    return ret;
+}
+
+static int ocores_i2c_reg_read(struct ocores_i2c *i2c, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+
+    switch (i2c->reg_access_mode) {
+    case SYMBOL_I2C_DEV_MODE:
+        ret = i2c_device_func_read(i2c->dev_name, pos, val, size);
+        break;
+    case FILE_MODE:
+        ret = ocores_i2c_file_read(i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_PCIE_DEV_MODE:
+        ret = pcie_device_func_read(i2c->dev_name, pos, val, size);
+        break;
+    case SYMBOL_IO_DEV_MODE:
+        ret = io_device_func_read(i2c->dev_name, pos, val, size);
+        break;
+    default:
+        OCORES_I2C_ERROR("err func_mode, read failed.\n");
+        return -EINVAL;
+    }
+
+    return ret;
+}
+static void oc_setreg_8(struct ocores_i2c *i2c, int reg, u32 value)
+{
+    u8 buf_tmp[REG_IO_WIDTH_1];
+    u32 pos;
+
+    pos = i2c->base_addr + (reg << i2c->reg_shift);
+    OCORES_I2C_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        i2c->dev_name, i2c->reg_access_mode, pos, value);
+
+    buf_tmp[0] = (value & 0Xff);
+    ocores_i2c_reg_write(i2c, pos, buf_tmp, REG_IO_WIDTH_1);
+    return;
+}
+
+static void oc_setreg_16(struct ocores_i2c *i2c, int reg, u32 value)
+{
+    u8 buf_tmp[REG_IO_WIDTH_2];
+    u32 pos;
+
+    pos = i2c->base_addr + (reg << i2c->reg_shift);
+    OCORES_I2C_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        i2c->dev_name, i2c->reg_access_mode, pos, value);
+
+    buf_tmp[0] = (value & 0Xff);
+    buf_tmp[1] = (value >> 8) & 0xff;
+    ocores_i2c_reg_write(i2c, pos, buf_tmp, REG_IO_WIDTH_2);
+    return;
+}
+
+static void oc_setreg_32(struct ocores_i2c *i2c, int reg, u32 value)
+{
+    u8 buf_tmp[REG_IO_WIDTH_4];
+    u32 pos;
+
+    pos = i2c->base_addr + (reg << i2c->reg_shift);
+    OCORES_I2C_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        i2c->dev_name, i2c->reg_access_mode, pos, value);
+
+    buf_tmp[0] = (value & 0xff);
+    buf_tmp[1] = (value >> 8) & 0xff;
+    buf_tmp[2] = (value >> 16) & 0xff;
+    buf_tmp[3] = (value >> 24) & 0xff;
+
+    ocores_i2c_reg_write(i2c, pos, buf_tmp, REG_IO_WIDTH_4);
+    return;
+}
+
+static void oc_setreg_16be(struct ocores_i2c *i2c, int reg, u32 value)
+{
+    u8 buf_tmp[REG_IO_WIDTH_2];
+    u32 pos;
+
+    pos = i2c->base_addr + (reg << i2c->reg_shift);
+    OCORES_I2C_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        i2c->dev_name, i2c->reg_access_mode, pos, value);
+
+    buf_tmp[0] = (value >> 8) & 0xff;
+    buf_tmp[1] = (value & 0Xff);
+    ocores_i2c_reg_write(i2c, pos, buf_tmp, REG_IO_WIDTH_2);
+    return;
+}
+
+static void oc_setreg_32be(struct ocores_i2c *i2c, int reg, u32 value)
+{
+    u8 buf_tmp[REG_IO_WIDTH_4];
+    u32 pos;
+
+    pos = i2c->base_addr + (reg << i2c->reg_shift);
+    OCORES_I2C_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        i2c->dev_name, i2c->reg_access_mode, pos, value);
+
+    buf_tmp[0] = (value >> 24) & 0xff;
+    buf_tmp[1] = (value >> 16) & 0xff;
+    buf_tmp[2] = (value >> 8) & 0xff;
+    buf_tmp[3] = (value & 0xff);
+    ocores_i2c_reg_write(i2c, pos, buf_tmp, REG_IO_WIDTH_4);
+    return;
+}
+
+static inline u32 oc_getreg_8(struct ocores_i2c *i2c, int reg)
+{
+    u8 buf_tmp[REG_IO_WIDTH_1];
+    u32 value, pos;
+
+    pos = i2c->base_addr + (reg << i2c->reg_shift);
+    ocores_i2c_reg_read(i2c, pos, buf_tmp, REG_IO_WIDTH_1);
+    value = buf_tmp[0];
+
+    OCORES_I2C_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        i2c->dev_name, i2c->reg_access_mode, pos, value);
+
+    return value;
+}
+
+static inline u32 oc_getreg_16(struct ocores_i2c *i2c, int reg)
+{
+    u8 buf_tmp[REG_IO_WIDTH_2];
+    u32 value, pos;
+    int i;
+
+    pos = i2c->base_addr + (reg << i2c->reg_shift);
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    ocores_i2c_reg_read(i2c, pos, buf_tmp, REG_IO_WIDTH_2);
+
+    value = 0;
+    for (i = 0; i < REG_IO_WIDTH_2 ; i++) {
+        value |= buf_tmp[i] << (8 * i);
+    }
+
+    OCORES_I2C_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        i2c->dev_name, i2c->reg_access_mode, pos, value);
+    return value;
+}
+
+static inline u32 oc_getreg_32(struct ocores_i2c *i2c, int reg)
+{
+    u8 buf_tmp[REG_IO_WIDTH_4];
+    u32 value, pos;
+    int i;
+
+    pos = i2c->base_addr + (reg << i2c->reg_shift);
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    ocores_i2c_reg_read(i2c, pos, buf_tmp, REG_IO_WIDTH_4);
+
+    value = 0;
+    for (i = 0; i < REG_IO_WIDTH_4 ; i++) {
+        value |= buf_tmp[i] << (8 * i);
+    }
+    OCORES_I2C_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        i2c->dev_name, i2c->reg_access_mode, pos, value);
+    return value;
+}
+
+static inline u32 oc_getreg_16be(struct ocores_i2c *i2c, int reg)
+{
+    u8 buf_tmp[REG_IO_WIDTH_2];
+    u32 value, pos;
+    int i;
+
+    pos = i2c->base_addr + (reg << i2c->reg_shift);
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    ocores_i2c_reg_read(i2c, pos, buf_tmp, REG_IO_WIDTH_2);
+
+    value = 0;
+    for (i = 0; i < REG_IO_WIDTH_2 ; i++) {
+        value |= buf_tmp[i] << (8 * (REG_IO_WIDTH_2 -i - 1));
+    }
+
+    OCORES_I2C_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        i2c->dev_name, i2c->reg_access_mode, pos, value);
+    return value;
+}
+
+static inline u32 oc_getreg_32be(struct ocores_i2c *i2c, int reg)
+{
+    u8 buf_tmp[REG_IO_WIDTH_4];
+    u32 value, pos;
+    int i;
+
+    pos = i2c->base_addr + (reg << i2c->reg_shift);
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    ocores_i2c_reg_read(i2c, pos, buf_tmp, REG_IO_WIDTH_4);
+
+    value = 0;
+    for (i = 0; i < REG_IO_WIDTH_4 ; i++) {
+        value |= buf_tmp[i] << (8 * (REG_IO_WIDTH_4 -i - 1));
+    }
+
+    OCORES_I2C_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        i2c->dev_name, i2c->reg_access_mode, pos, value);
+    return value;
+
+}
+
+static inline void oc_setreg(struct ocores_i2c *i2c, int reg, u32 value)
+{
+    i2c->setreg(i2c, reg, value);
+    return;
+}
+
+static inline u32 oc_getreg(struct ocores_i2c *i2c, int reg)
+{
+    return i2c->getreg(i2c, reg);
+}
+
+static int ocores_msg_check(struct i2c_msg *msgs, int num)
+{
+    int i, ret = 0;
+
+    if (!msgs) {
+        ret = -EFAULT;
+        goto out;
+    }
+
+    for (i = 0; i < num; ++i) {
+        if (!msgs[i].buf) {
+            ret = -EFAULT;
+            goto out;
+        }
+    }
+
+out:
+    return ret;
+}
+
+static void ocores_process(struct ocores_i2c *i2c, u8 stat)
+{
+    struct i2c_msg *msg = i2c->msg;
+
+    OCORES_I2C_XFER("Enter nr %d.\n", i2c->adap.nr);
+    if ((i2c->state == STATE_DONE) || (i2c->state == STATE_ERROR)) {
+        /* stop has been sent */
+        oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK);
+        wake_up(&i2c->wait);
+        OCORES_I2C_XFER("stop has been sent, exit.\n");
+        goto out;
+    }
+
+    /* error? */
+    if (stat & OCI2C_STAT_ARBLOST) {
+        i2c->state = STATE_ERROR;
+        oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+        OCORES_I2C_XFER("error exit, lose arbitration.\n");
+        goto out;
+    }
+
+    if (ocores_msg_check(i2c->msg, i2c->nmsgs) != 0) {
+        OCORES_I2C_XFER("msg buf is NULL\n");
+        i2c->state = STATE_ERROR;
+        oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+        goto out;
+    }
+
+    if ((i2c->state == STATE_START) || (i2c->state == STATE_WRITE)) {
+        i2c->state =
+            (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE;
+
+        if (stat & OCI2C_STAT_NACK) {
+            i2c->state = STATE_ERROR;
+            oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+            OCORES_I2C_XFER("OCI2C_STAT_NACK, exit.\n");
+            goto out;
+        }
+    } else {
+        msg->buf[i2c->pos++] = oc_getreg(i2c, OCI2C_DATA);
+    }
+
+    /* end of msg? */
+    if (i2c->pos == msg->len) {
+        OCORES_I2C_XFER("Enter end of msg.\n");
+        i2c->nmsgs--;
+        i2c->msg++;
+        i2c->pos = 0;
+        msg = i2c->msg;
+
+        if (i2c->nmsgs) {    /* end? */
+            /* send start? */
+            if (!(msg->flags & I2C_M_NOSTART)) {
+                u8 addr = i2c_8bit_addr_from_msg(msg);
+
+                i2c->state = STATE_START;
+
+                oc_setreg(i2c, OCI2C_DATA, addr);
+                oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START);
+                OCORES_I2C_XFER("send start, exit.\n");
+                goto out;
+            }
+            i2c->state = (msg->flags & I2C_M_RD)
+                ? STATE_READ : STATE_WRITE;
+        } else {
+            i2c->state = STATE_DONE;
+            oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+            OCORES_I2C_XFER("send OCI2C_CMD_STOP, exit.\n");
+            goto out;
+        }
+    }
+
+    if (i2c->state == STATE_READ) {
+        oc_setreg(i2c, OCI2C_CMD, i2c->pos == (msg->len-1) ?
+              OCI2C_CMD_READ_NACK : OCI2C_CMD_READ_ACK);
+    } else {
+        oc_setreg(i2c, OCI2C_DATA, msg->buf[i2c->pos++]);
+        oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_WRITE);
+    }
+
+out:
+    OCORES_I2C_XFER("normal, exit nr %d.\n", i2c->adap.nr);
+    return;
+}
+
+static irqreturn_t ocores_isr(int irq, void *dev_id)
+{
+    struct ocores_i2c *i2c = dev_id;
+    u8 stat;
+    unsigned long flags;
+
+    if (!i2c) {
+        return IRQ_NONE;
+    }
+
+    spin_lock_irqsave(&i2c->process_lock, flags);
+    stat = oc_getreg(i2c, OCI2C_STATUS);
+    if (!(stat & OCI2C_STAT_IF)) {
+        spin_unlock_irqrestore(&i2c->process_lock, flags);
+        return IRQ_NONE;
+    }
+    OCORES_I2C_XFER("Enter, irq %d nr %d addr 0x%x.\n", irq, i2c->adap.nr, (!i2c->msg)? 0 : i2c->msg->addr);
+    ocores_process(i2c, stat);
+    OCORES_I2C_XFER("Leave, irq %d nr %d addr 0x%x.\n", irq, i2c->adap.nr, (!i2c->msg)? 0 : i2c->msg->addr);
+    spin_unlock_irqrestore(&i2c->process_lock, flags);
+
+    return IRQ_HANDLED;
+}
+
+/**
+ * Process timeout event
+ * @i2c: ocores I2C device instance
+ */
+static void ocores_process_timeout(struct ocores_i2c *i2c)
+{
+    unsigned long flags;
+
+    spin_lock_irqsave(&i2c->process_lock, flags);
+    i2c->state = STATE_ERROR;
+    oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_STOP);
+    mdelay(1);
+    spin_unlock_irqrestore(&i2c->process_lock, flags);
+    return;
+}
+
+/**
+ * Wait until something change in a given register
+ * @i2c: ocores I2C device instance
+ * @reg: register to query
+ * @mask: bitmask to apply on register value
+ * @val: expected result
+ * @timeout: timeout in jiffies
+ *
+ * Timeout is necessary to avoid to stay here forever when the chip
+ * does not answer correctly.
+ *
+ * Return: 0 on success, -ETIMEDOUT on timeout
+ */
+static int ocores_wait(struct ocores_i2c *i2c,
+               int reg, u8 mask, u8 val,
+               const unsigned long timeout)
+{
+    u8 status;
+    unsigned long j, jiffies_tmp;
+    unsigned int usleep;
+
+    usleep = OCORE_WAIT_SCH;
+    j = jiffies + timeout;
+    while (1) {
+        jiffies_tmp = jiffies;
+        status = oc_getreg(i2c, reg);
+
+        if ((status & mask) == val) {
+            break;
+        }
+
+        if (time_after(jiffies_tmp, j)) {
+            OCORES_I2C_XFER("STATUS timeout, mask[0x%x]  val[0x%x] status[0x%x]\n", mask, val, status);
+            return -ETIMEDOUT;
+        }
+        usleep_range(usleep,usleep + 1);
+    }
+    return 0;
+
+}
+
+/**
+ * Wait until is possible to process some data
+ * @i2c: ocores I2C device instance
+ *
+ * Used when the device is in polling mode (interrupts disabled).
+ *
+ * Return: 0 on success, -ETIMEDOUT on timeout
+ */
+static int ocores_poll_wait(struct ocores_i2c *i2c)
+{
+    u8 mask;
+    int err;
+
+    if (i2c->state == STATE_DONE || i2c->state == STATE_ERROR) {
+        /* transfer is over */
+        mask = OCI2C_STAT_BUSY;
+    } else {
+        /* on going transfer */
+        mask = OCI2C_STAT_TIP;
+        /*
+         * We wait for the data to be transferred (8bit),
+         * then we start polling on the ACK/NACK bit
+         */
+        udelay((8 * 1000) / i2c->bus_clock_khz);
+    }
+
+    /*
+     * once we are here we expect to get the expected result immediately
+     * so if after 100ms we timeout then something is broken.
+     */
+    err = ocores_wait(i2c, OCI2C_STATUS, mask, 0, msecs_to_jiffies(100));
+    if (err) {
+         OCORES_I2C_XFER("STATUS timeout, bit 0x%x did not clear in 100ms, err %d\n", mask, err);
+    }
+    return err;
+}
+
+/**
+ * It handles an IRQ-less transfer
+ * @i2c: ocores I2C device instance
+ *
+ * Even if IRQ are disabled, the I2C OpenCore IP behavior is exactly the same
+ * (only that IRQ are not produced). This means that we can re-use entirely
+ * ocores_isr(), we just add our polling code around it.
+ *
+ * It can run in atomic context
+ */
+static int ocores_process_polling(struct ocores_i2c *i2c)
+{
+    irqreturn_t ret;
+    int err;
+
+    while (1) {
+        err = ocores_poll_wait(i2c);
+        if (err) {
+            i2c->state = STATE_ERROR;
+            break; /* timeout */
+        }
+
+        ret = ocores_isr(-1, i2c);
+        if (ret == IRQ_NONE) {
+            break; /* all messages have been transferred */
+        }
+    }
+
+    return err;
+}
+
+static int ocores_xfer_core(struct ocores_i2c *i2c,
+                struct i2c_msg *msgs, int num,
+                bool polling)
+{
+    int ret;
+    u8 ctrl;
+    unsigned long flags;
+
+    OCORES_I2C_VERBOSE("Enter ocores_xfer_core. polling mode:%d.\n", polling);
+    spin_lock_irqsave(&i2c->process_lock, flags);
+
+    ctrl = oc_getreg(i2c, OCI2C_CONTROL);
+    if (polling) {
+        oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~OCI2C_CTRL_IEN);
+    } else {
+        oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_IEN);
+    }
+
+    i2c->msg = msgs;
+    i2c->pos = 0;
+    i2c->nmsgs = num;
+    i2c->state = STATE_START;
+
+    oc_setreg(i2c, OCI2C_DATA, i2c_8bit_addr_from_msg(i2c->msg));
+    oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START);
+
+    spin_unlock_irqrestore(&i2c->process_lock, flags);
+
+    if (polling) {
+        ret = ocores_process_polling(i2c);
+        if (ret) {
+            ocores_process_timeout(i2c);
+            return -ETIMEDOUT;
+        }
+    } else {
+        ret = wait_event_timeout(i2c->wait,
+                     (i2c->state == STATE_ERROR) ||
+                     (i2c->state == STATE_DONE), HZ);
+        if (ret == 0) {
+            ocores_process_timeout(i2c);
+            return -ETIMEDOUT;
+        }
+    }
+
+    return (i2c->state == STATE_DONE) ? num : -EIO;
+}
+
+static int ocores_xfer(struct i2c_adapter *adap,
+               struct i2c_msg *msgs, int num)
+{
+    struct ocores_i2c *i2c;
+    int ret;
+
+    OCORES_I2C_VERBOSE("Enter ocores_xfer.\n");
+    if (!adap || ocores_msg_check(msgs, num)) {
+        OCORES_I2C_ERROR("[MAY BE USER SPACE ERROR]:msg buf is NULL\n");
+        return -EFAULT;
+    }
+    OCORES_I2C_VERBOSE("i2c bus:%d, msgs num:%d.\n", adap->nr, num);
+
+    i2c = i2c_get_adapdata(adap);
+
+    if (i2c->flags & OCORES_FLAG_POLL) {
+        ret = ocores_xfer_core(i2c, msgs, num, true);
+    } else {
+        ret = ocores_xfer_core(i2c, msgs, num, false);
+    }
+
+    return ret;
+}
+
+static int ocores_init(struct device *dev, struct ocores_i2c *i2c)
+{
+    int prescale;
+    int diff;
+    u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL);
+
+    /* make sure the device is disabled */
+    ctrl &= ~(OCI2C_CTRL_EN | OCI2C_CTRL_IEN);
+    oc_setreg(i2c, OCI2C_CONTROL, ctrl);
+
+    prescale = (i2c->ip_clock_khz / (5 * i2c->bus_clock_khz)) - 1;
+    prescale = clamp(prescale, 0, 0xffff);
+
+    diff = i2c->ip_clock_khz / (5 * (prescale + 1)) - i2c->bus_clock_khz;
+    if (abs(diff) > i2c->bus_clock_khz / 10) {
+        dev_err(dev, "Unsupported clock settings: core: %d KHz, bus: %d KHz\n",
+            i2c->ip_clock_khz, i2c->bus_clock_khz);
+        return -EINVAL;
+    }
+
+    oc_setreg(i2c, OCI2C_PRELOW, prescale & 0xff);
+    oc_setreg(i2c, OCI2C_PREHIGH, prescale >> 8);
+
+    /* Init the device */
+    oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK);
+    oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_EN);
+
+    return 0;
+}
+
+static u32 ocores_func(struct i2c_adapter *adap)
+{
+    return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+}
+
+static const struct i2c_algorithm ocores_algorithm = {
+    .master_xfer = ocores_xfer,
+    .functionality = ocores_func,
+};
+
+static const struct i2c_adapter ocores_adapter = {
+    .owner = THIS_MODULE,
+    .name = "wb-i2c-ocores",
+    .class = I2C_CLASS_DEPRECATED,
+    .algo = &ocores_algorithm,
+};
+
+static const struct of_device_id ocores_i2c_match[] = {
+    {
+        .compatible = "opencores,wb-i2c-ocores",
+        .data = (void *)TYPE_OCORES,
+    },
+    {},
+};
+MODULE_DEVICE_TABLE(of, ocores_i2c_match);
+
+static int fpga_ocores_i2c_get_irq(struct ocores_i2c *i2c)
+{
+    int devfn, irq;
+    struct device *dev;
+    wb_pci_dev_t *wb_pci_dev;
+    struct pci_dev *pci_dev;
+    i2c_ocores_device_t *i2c_ocores_device;
+    int ret;
+
+    dev = i2c->dev;
+    wb_pci_dev = &i2c->wb_pci_dev;
+
+    if (dev->of_node) {
+        ret = 0;
+        ret += of_property_read_u32(dev->of_node, "pci_domain", &wb_pci_dev->domain);
+        ret += of_property_read_u32(dev->of_node, "pci_bus", &wb_pci_dev->bus);
+        ret += of_property_read_u32(dev->of_node, "pci_slot", &wb_pci_dev->slot);
+        ret += of_property_read_u32(dev->of_node, "pci_fn", &wb_pci_dev->fn);
+
+        if (ret != 0) {
+            OCORES_I2C_ERROR("dts config error, ret:%d.\n", ret);
+            ret = -EINVAL;
+            return ret;
+        }
+    } else {
+        if (i2c->dev->platform_data == NULL) {
+            OCORES_I2C_ERROR("Failed to get platform data config.\n");
+            ret = -EINVAL;
+            return ret;
+        }
+        i2c_ocores_device = i2c->dev->platform_data;
+        wb_pci_dev->domain = i2c_ocores_device->pci_domain;
+        wb_pci_dev->bus = i2c_ocores_device->pci_bus;
+        wb_pci_dev->slot = i2c_ocores_device->pci_slot;
+        wb_pci_dev->fn = i2c_ocores_device->pci_fn;
+    }
+
+    OCORES_I2C_VERBOSE("pci_domain:0x%x, pci_bus:0x%x, pci_slot:0x%x, pci_fn:0x%x.\n",
+        wb_pci_dev->domain, wb_pci_dev->bus, wb_pci_dev->slot, wb_pci_dev->fn);
+
+    devfn = PCI_DEVFN(wb_pci_dev->slot, wb_pci_dev->fn);
+    pci_dev = pci_get_domain_bus_and_slot(wb_pci_dev->domain, wb_pci_dev->bus, devfn);
+    if (pci_dev == NULL) {
+        OCORES_I2C_ERROR("Failed to find pci_dev, domain:0x%04x, bus:0x%02x, devfn:0x%x\n",
+            wb_pci_dev->domain, wb_pci_dev->bus, devfn);
+        return -ENODEV;
+    }
+    irq = pci_dev->irq + i2c->irq_offset;
+    OCORES_I2C_VERBOSE("get irq no:%d.\n", irq);
+    return irq;
+}
+
+static int ocores_i2c_config_init(struct ocores_i2c *i2c)
+{
+    int ret;
+    struct device *dev;
+    i2c_ocores_device_t *i2c_ocores_device;
+
+    dev = i2c->dev;
+    ret = 0;
+
+    if (dev->of_node) {
+        ret += of_property_read_string(dev->of_node, "dev_name", &i2c->dev_name);
+        ret += of_property_read_u32(dev->of_node, "dev_base", &i2c->base_addr);
+        ret += of_property_read_u32(dev->of_node, "reg_shift", &i2c->reg_shift);
+        ret += of_property_read_u32(dev->of_node, "reg_io_width", &i2c->reg_io_width);
+        ret += of_property_read_u32(dev->of_node, "ip_clock_khz", &i2c->ip_clock_khz);
+        ret += of_property_read_u32(dev->of_node, "bus_clock_khz", &i2c->bus_clock_khz);
+        ret += of_property_read_u32(dev->of_node, "reg_access_mode", &i2c->reg_access_mode);
+
+        if (ret != 0) {
+            OCORES_I2C_ERROR("dts config error, ret:%d.\n", ret);
+            ret = -ENXIO;
+            return ret;
+        }
+    } else {
+        if (i2c->dev->platform_data == NULL) {
+            OCORES_I2C_ERROR("Failed to get platform data config.\n");
+            ret = -ENXIO;
+            return ret;
+        }
+        i2c_ocores_device = i2c->dev->platform_data;
+        i2c->dev_name = i2c_ocores_device->dev_name;
+        i2c->adap_nr = i2c_ocores_device->adap_nr;
+        i2c->big_endian = i2c_ocores_device->big_endian;
+        i2c->base_addr = i2c_ocores_device->dev_base;
+        i2c->reg_shift = i2c_ocores_device->reg_shift;
+        i2c->reg_io_width = i2c_ocores_device->reg_io_width;
+        i2c->ip_clock_khz = i2c_ocores_device->ip_clock_khz;
+        i2c->bus_clock_khz = i2c_ocores_device->bus_clock_khz;
+        i2c->reg_access_mode = i2c_ocores_device->reg_access_mode;
+    }
+
+    OCORES_I2C_VERBOSE("name:%s, base:0x%x, reg_shift:0x%x, io_width:0x%x, ip_clock_khz:0x%x, bus_clock_khz:0x%x.\n",
+        i2c->dev_name, i2c->base_addr, i2c->reg_shift, i2c->reg_io_width, i2c->ip_clock_khz, i2c->bus_clock_khz);
+    OCORES_I2C_VERBOSE("reg access mode:%d.\n", i2c->reg_access_mode);
+    return ret;
+}
+
+static int ocores_i2c_probe(struct platform_device *pdev)
+{
+    struct ocores_i2c *i2c;
+    int irq, ret;
+    bool be;
+    i2c_ocores_device_t *i2c_ocores_device;
+
+    OCORES_I2C_VERBOSE("Enter main probe\n");
+
+    i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL);
+    if (!i2c) {
+        dev_err(&pdev->dev, "devm_kzalloc failed.\n");
+        return -ENOMEM;
+    }
+
+    spin_lock_init(&i2c->process_lock);
+
+    i2c->dev = &pdev->dev;
+    ret = ocores_i2c_config_init(i2c);
+    if (ret !=0) {
+        dev_err(i2c->dev, "Failed to get ocores i2c dts config.\n");
+        goto out;
+    }
+
+    if (i2c->dev->of_node) {
+        if (of_property_read_u32(i2c->dev->of_node, "big_endian", &i2c->big_endian)) {
+
+            be = 0;
+        } else {
+            be = i2c->big_endian;
+        }
+    } else {
+        be = i2c->big_endian;
+    }
+
+    if (i2c->reg_io_width == 0) {
+        i2c->reg_io_width = 1; /* Set to default value */
+    }
+
+    if (!i2c->setreg || !i2c->getreg) {
+        switch (i2c->reg_io_width) {
+        case REG_IO_WIDTH_1:
+            i2c->setreg = oc_setreg_8;
+            i2c->getreg = oc_getreg_8;
+            break;
+
+        case REG_IO_WIDTH_2:
+            i2c->setreg = be ? oc_setreg_16be : oc_setreg_16;
+            i2c->getreg = be ? oc_getreg_16be : oc_getreg_16;
+            break;
+
+        case REG_IO_WIDTH_4:
+            i2c->setreg = be ? oc_setreg_32be : oc_setreg_32;
+            i2c->getreg = be ? oc_getreg_32be : oc_getreg_32;
+            break;
+
+        default:
+            dev_err(i2c->dev, "Unsupported I/O width (%d)\n",
+                i2c->reg_io_width);
+            ret = -EINVAL;
+            goto out;
+        }
+    }
+
+    init_waitqueue_head(&i2c->wait);
+    irq = -1;
+
+    if (i2c->dev->of_node) {
+        if (of_property_read_u32(i2c->dev->of_node, "irq_offset", &i2c->irq_offset)) {
+
+            i2c->flags |= OCORES_FLAG_POLL;
+        } else {
+
+            irq = fpga_ocores_i2c_get_irq(i2c);
+            if (irq < 0 ) {
+                dev_err(i2c->dev, "Failed to get  ocores i2c irq number, ret: %d.\n", irq);
+                ret = irq;
+                goto out;
+            }
+        }
+    } else {
+        if (i2c->dev->platform_data == NULL) {
+
+            i2c->flags |= OCORES_FLAG_POLL;
+            OCORES_I2C_VERBOSE("Failed to get platform data config, set OCORES_FLAG_POLL.\n");
+        } else {
+            i2c_ocores_device = i2c->dev->platform_data;
+            if (i2c_ocores_device->irq_type == 0) {
+
+                i2c->flags |= OCORES_FLAG_POLL;
+            } else {
+
+                irq = fpga_ocores_i2c_get_irq(i2c);
+                if (irq < 0 ) {
+                    dev_err(i2c->dev, "Failed to get  ocores i2c irq number, ret: %d.\n", irq);
+                    ret = irq;
+                    goto out;
+                }
+            }
+        }
+    }
+
+    if (!(i2c->flags & OCORES_FLAG_POLL)) {
+        ret = devm_request_irq(&pdev->dev, irq, ocores_isr, 0,
+                       pdev->name, i2c);
+        if (ret) {
+            dev_err(i2c->dev, "Cannot claim IRQ\n");
+            goto out;
+        }
+    }
+
+    ret = ocores_init(i2c->dev, i2c);
+    if (ret) {
+        goto out;
+    }
+
+    /* hook up driver to tree */
+    platform_set_drvdata(pdev, i2c);
+    i2c->adap = ocores_adapter;
+    i2c_set_adapdata(&i2c->adap, i2c);
+    i2c->adap.dev.parent = &pdev->dev;
+    i2c->adap.dev.of_node = pdev->dev.of_node;
+
+    if (i2c->dev->of_node) {
+        /* adap.nr get from dts aliases */
+        ret = i2c_add_adapter(&i2c->adap);
+    } else {
+        i2c->adap.nr = i2c->adap_nr;
+        ret = i2c_add_numbered_adapter(&i2c->adap);
+    }
+    if (ret) {
+        goto fail_add;
+    }
+    OCORES_I2C_VERBOSE("Main probe out\n");
+    dev_info(i2c->dev, "registered i2c-%d for %s with base address:0x%x success.\n",
+        i2c->adap.nr, i2c->dev_name, i2c->base_addr);
+    return 0;
+fail_add:
+    platform_set_drvdata(pdev, NULL);
+out:
+    return ret;
+}
+
+static int ocores_i2c_remove(struct platform_device *pdev)
+{
+    struct ocores_i2c *i2c = platform_get_drvdata(pdev);
+    u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL);
+
+    /* disable i2c logic */
+    ctrl &= ~(OCI2C_CTRL_EN | OCI2C_CTRL_IEN);
+    oc_setreg(i2c, OCI2C_CONTROL, ctrl);
+
+    /* remove adapter & data */
+    i2c_del_adapter(&i2c->adap);
+    return 0;
+}
+
+static struct platform_driver ocores_i2c_driver = {
+    .probe   = ocores_i2c_probe,
+    .remove  = ocores_i2c_remove,
+    .driver  = {
+        .name = "wb-ocores-i2c",
+        .of_match_table = ocores_i2c_match,
+    },
+};
+
+module_platform_driver(ocores_i2c_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("OpenCores I2C bus driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:ocores-i2c");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.h
new file mode 100644
index 000000000000..acd2710a92f0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.h
@@ -0,0 +1,28 @@
+#ifndef __WB_I2C_OCORES_H__
+#define __WB_I2C_OCORES_H__
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+#define I2C_OCORES_DEV_NAME_MAX_LEN (64)
+
+typedef struct i2c_ocores_device_s {
+    uint32_t big_endian;
+    char dev_name[I2C_OCORES_DEV_NAME_MAX_LEN];
+    int adap_nr;
+    uint32_t dev_base;
+    uint32_t reg_shift;
+    uint32_t reg_io_width;
+    uint32_t ip_clock_khz;
+    uint32_t bus_clock_khz;
+    uint32_t reg_access_mode;
+
+    uint32_t irq_type;
+    uint32_t irq_offset;
+    uint32_t pci_domain;
+    uint32_t pci_bus;
+    uint32_t pci_slot;
+    uint32_t pci_fn;
+    int device_flag;
+} i2c_ocores_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.c
new file mode 100644
index 000000000000..b1f5294b85ab
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.c
@@ -0,0 +1,571 @@
+/*
+ * wb_io_dev.c
+ * ko to read/write ioports through /dev/XXX device
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/miscdevice.h>
+#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/fs.h>
+#include <linux/export.h>
+#include <linux/uio.h>
+
+#include "wb_io_dev.h"
+
+#define PROXY_NAME "wb-io-dev"
+#define MAX_IO_DEV_NUM                     (256)
+#define IO_RDWR_MAX_LEN                    (256)
+#define MAX_NAME_SIZE                      (20)
+#define IO_INDIRECT_ADDR_H(addr)           ((addr >> 8) & 0xff)
+#define IO_INDIRECT_ADDR_L(addr)           ((addr) & 0xff)
+#define IO_INDIRECT_OP_WRITE               (0x2)
+#define IO_INDIRECT_OP_READ                (0X3)
+
+static int g_io_dev_debug = 0;
+static int g_io_dev_error = 0;
+
+module_param(g_io_dev_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_io_dev_error, int, S_IRUGO | S_IWUSR);
+
+#define IO_DEV_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_io_dev_debug) { \
+        printk(KERN_INFO "[IO_DEV][VER][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define IO_DEV_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_io_dev_error) { \
+        printk(KERN_ERR "[IO_DEV][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+typedef struct wb_io_dev_s {
+    const char *name;
+    uint32_t io_base;
+    uint32_t io_len;
+    uint32_t indirect_addr;
+    uint32_t wr_data;
+    uint32_t addr_low;
+    uint32_t addr_high;
+    uint32_t rd_data;
+    uint32_t opt_ctl;
+    spinlock_t io_dev_lock;
+    struct miscdevice misc;
+} wb_io_dev_t;
+
+static wb_io_dev_t* io_dev_arry[MAX_IO_DEV_NUM];
+
+static int io_dev_open(struct inode *inode, struct file *file)
+{
+    unsigned int minor = iminor(inode);
+    wb_io_dev_t *wb_io_dev;
+
+    if (minor >= MAX_IO_DEV_NUM) {
+        IO_DEV_DEBUG_ERROR("minor out of range, minor = %d.\n", minor);
+        return -ENODEV;
+    }
+
+    wb_io_dev = io_dev_arry[minor];
+    if (wb_io_dev == NULL) {
+        IO_DEV_DEBUG_ERROR("wb_io_dev is NULL, open failed, minor = %d\n", minor);
+        return -ENODEV;
+    }
+
+    file->private_data = wb_io_dev;
+    return 0;
+}
+
+static int io_dev_release(struct inode *inode, struct file *file)
+{
+    file->private_data = NULL;
+    return 0;
+}
+
+uint8_t io_indirect_addressing_read(wb_io_dev_t *wb_io_dev, uint32_t address)
+{
+    uint8_t addr_l, addr_h, value;
+    unsigned long flags;
+
+    addr_h = IO_INDIRECT_ADDR_H(address);
+    addr_l = IO_INDIRECT_ADDR_L(address);
+    IO_DEV_DEBUG_VERBOSE("read one count, addr = 0x%x\n", address);
+
+    spin_lock_irqsave(&wb_io_dev->io_dev_lock, flags);
+
+    outb(addr_l, wb_io_dev->io_base + wb_io_dev->addr_low);
+
+    outb(addr_h, wb_io_dev->io_base + wb_io_dev->addr_high);
+
+    outb(IO_INDIRECT_OP_READ, wb_io_dev->io_base + wb_io_dev->opt_ctl);
+
+    value = inb(wb_io_dev->io_base + wb_io_dev->rd_data);
+
+    spin_unlock_irqrestore(&wb_io_dev->io_dev_lock, flags);
+
+    return value;
+}
+
+static int io_dev_read_tmp(wb_io_dev_t *wb_io_dev, uint32_t offset, uint8_t *buf, size_t count)
+{
+    int i;
+
+    if (offset > wb_io_dev->io_len) {
+        IO_DEV_DEBUG_VERBOSE("offset:0x%x, io len:0x%x, EOF.\n", offset, wb_io_dev->io_len);
+        return 0;
+    }
+
+    if (count > wb_io_dev->io_len - offset) {
+        IO_DEV_DEBUG_VERBOSE("read count out of range. input len:%lu, read len:%u.\n",
+            count, wb_io_dev->io_len - offset);
+        count = wb_io_dev->io_len - offset;
+    }
+    if (wb_io_dev->indirect_addr) {
+        for (i = 0; i < count; i++) {
+            buf[i] = io_indirect_addressing_read(wb_io_dev, offset + i);
+        }
+    } else {
+        for (i = 0; i < count; i++) {
+            buf[i] = inb(wb_io_dev->io_base + offset + i);
+        }
+    }
+
+    return count;
+}
+
+static ssize_t io_dev_read(struct file *file, char __user *buf, size_t count, loff_t *offset)
+{
+    wb_io_dev_t *wb_io_dev;
+    int ret, read_len;
+    u8 buf_tmp[IO_RDWR_MAX_LEN];
+
+    wb_io_dev = file->private_data;
+    if (wb_io_dev == NULL) {
+        IO_DEV_DEBUG_ERROR("wb_io_dev is NULL, read failed.\n");
+        return -EINVAL;
+    }
+
+    if (count == 0) {
+        IO_DEV_DEBUG_ERROR("Invalid params, read count is 0.\n");
+        return -EINVAL;
+    }
+
+    if (count > sizeof(buf_tmp)) {
+        IO_DEV_DEBUG_VERBOSE("read count %lu exceed max %lu.\n", count, sizeof(buf_tmp));
+        count = sizeof(buf_tmp);
+    }
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    read_len = io_dev_read_tmp(wb_io_dev, *offset, buf_tmp, count);
+    if (read_len < 0) {
+        IO_DEV_DEBUG_ERROR("io_dev_read_tmp failed, ret:%d.\n", read_len);
+        return read_len;
+    }
+
+    if (access_ok(buf, read_len)) {
+        IO_DEV_DEBUG_VERBOSE("user space read, buf: %p, offset: %lld, read count %lu.\n",
+            buf, *offset, count);
+        if (copy_to_user(buf, buf_tmp, read_len)) {
+            IO_DEV_DEBUG_ERROR("copy_to_user failed.\n");
+            return -EFAULT;
+        }
+    } else {
+        IO_DEV_DEBUG_VERBOSE("kernel space read, buf: %p, offset: %lld, read count %lu.\n",
+            buf, *offset, count);
+        memcpy(buf, buf_tmp, read_len);
+    }
+    *offset += read_len;
+    ret = read_len;
+    return ret;
+}
+
+static ssize_t io_dev_read_iter(struct kiocb *iocb, struct iov_iter *to)
+{
+    int ret;
+
+    IO_DEV_DEBUG_VERBOSE("io_dev_read_iter, file: %p, count: %lu, offset: %lld\n",
+        iocb->ki_filp, to->count, iocb->ki_pos);
+    ret = io_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos);
+    return ret;
+}
+
+void io_indirect_addressing_write(wb_io_dev_t *wb_io_dev, uint32_t address, uint8_t reg_val)
+{
+    uint8_t addr_l, addr_h;
+    unsigned long flags;
+
+    addr_h = IO_INDIRECT_ADDR_H(address);
+    addr_l = IO_INDIRECT_ADDR_L(address);
+    IO_DEV_DEBUG_VERBOSE("write one count, addr = 0x%x\n", address);
+
+    spin_lock_irqsave(&wb_io_dev->io_dev_lock, flags);
+
+    outb(reg_val, wb_io_dev->io_base + wb_io_dev->wr_data);
+
+    outb(addr_l, wb_io_dev->io_base + wb_io_dev->addr_low);
+
+    outb(addr_h, wb_io_dev->io_base + wb_io_dev->addr_high);
+
+    outb(IO_INDIRECT_OP_WRITE, wb_io_dev->io_base + wb_io_dev->opt_ctl);
+
+    spin_unlock_irqrestore(&wb_io_dev->io_dev_lock, flags);
+
+    return;
+}
+
+static int io_dev_write_tmp(wb_io_dev_t *wb_io_dev, uint32_t offset, uint8_t *buf, size_t count)
+{
+    int i;
+
+    if (offset > wb_io_dev->io_len) {
+        IO_DEV_DEBUG_VERBOSE("offset:0x%x, io len:0x%x, EOF.\n", offset, wb_io_dev->io_len);
+        return 0;
+    }
+
+    if (count > wb_io_dev->io_len - offset) {
+        IO_DEV_DEBUG_VERBOSE("write count out of range. input len:%lu, write len:%u.\n",
+            count, wb_io_dev->io_len - offset);
+        count = wb_io_dev->io_len - offset;
+    }
+    if (wb_io_dev->indirect_addr) {
+        for (i = 0; i < count; i++) {
+            io_indirect_addressing_write(wb_io_dev, offset + i, buf[i]);
+        }
+    } else {
+        for (i = 0; i < count; i++) {
+            outb(buf[i], wb_io_dev->io_base + offset + i);
+        }
+    }
+
+    return count;
+}
+
+static ssize_t io_dev_write(struct file *file, const char __user *buf, size_t count, loff_t *offset)
+{
+    wb_io_dev_t *wb_io_dev;
+    int write_len;
+    u8 buf_tmp[IO_RDWR_MAX_LEN];
+
+    wb_io_dev = file->private_data;
+    if (wb_io_dev == NULL) {
+        IO_DEV_DEBUG_ERROR("wb_io_dev is NULL, write failed.\n");
+        return -EINVAL;
+    }
+
+    if (count == 0) {
+        IO_DEV_DEBUG_ERROR("Invalid params, write count is 0.\n");
+        return -EINVAL;
+    }
+
+    if (count > sizeof(buf_tmp)) {
+        IO_DEV_DEBUG_VERBOSE("write count %lu exceed max %lu.\n", count, sizeof(buf_tmp));
+        count = sizeof(buf_tmp);
+    }
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    if (access_ok(buf, count)) {
+        IO_DEV_DEBUG_VERBOSE("user space write, buf: %p, offset: %lld, write count %lu.\n",
+            buf, *offset, count);
+        if (copy_from_user(buf_tmp, buf, count)) {
+            IO_DEV_DEBUG_ERROR("copy_from_user failed.\n");
+            return -EFAULT;
+        }
+    } else {
+        IO_DEV_DEBUG_VERBOSE("kernel space write, buf: %p, offset: %lld, write count %lu.\n",
+            buf, *offset, count);
+        memcpy(buf_tmp, buf, count);
+    }
+
+    write_len = io_dev_write_tmp(wb_io_dev, *offset, buf_tmp, count);
+    if (write_len < 0) {
+        IO_DEV_DEBUG_ERROR("io_dev_write_tmp failed, ret:%d.\n", write_len);
+        return write_len;
+    }
+
+    *offset += write_len;
+    return write_len;
+}
+
+static ssize_t io_dev_write_iter(struct kiocb *iocb, struct iov_iter *from)
+{
+    int ret;
+
+    IO_DEV_DEBUG_VERBOSE("io_dev_write_iter, file: %p, count: %lu, offset: %lld\n",
+        iocb->ki_filp, from->count, iocb->ki_pos);
+    ret = io_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos);
+    return ret;
+}
+
+static loff_t io_dev_llseek(struct file *file, loff_t offset, int origin)
+{
+    loff_t ret = 0;
+    wb_io_dev_t *wb_io_dev;
+
+    wb_io_dev = file->private_data;
+    if (wb_io_dev == NULL) {
+        IO_DEV_DEBUG_ERROR("wb_io_dev is NULL, llseek failed.\n");
+        return -EINVAL;
+    }
+
+    switch (origin) {
+    case SEEK_SET:
+        if (offset < 0) {
+            IO_DEV_DEBUG_ERROR("SEEK_SET, offset:%lld, invalid.\n", offset);
+            ret = -EINVAL;
+            break;
+        }
+        if (offset > wb_io_dev->io_len) {
+            IO_DEV_DEBUG_ERROR("SEEK_SET out of range, offset:%lld, io_len:0x%x.\n",
+                offset, wb_io_dev->io_len);
+            ret = - EINVAL;
+            break;
+        }
+        file->f_pos = offset;
+        ret = file->f_pos;
+        break;
+    case SEEK_CUR:
+        if (((file->f_pos + offset) > wb_io_dev->io_len) || ((file->f_pos + offset) < 0)) {
+            IO_DEV_DEBUG_ERROR("SEEK_CUR out of range, f_ops:%lld, offset:%lld, io_len:0x%x.\n",
+                file->f_pos, offset, wb_io_dev->io_len);
+            ret = - EINVAL;
+            break;
+        }
+        file->f_pos += offset;
+        ret = file->f_pos;
+        break;
+    default:
+        IO_DEV_DEBUG_ERROR("unsupport llseek type:%d.\n", origin);
+        ret = -EINVAL;
+        break;
+    }
+    return ret;
+}
+
+static long io_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+    return 0;
+}
+
+static const struct file_operations io_dev_fops = {
+    .owner      = THIS_MODULE,
+    .llseek     = io_dev_llseek,
+    .read_iter  = io_dev_read_iter,
+    .write_iter = io_dev_write_iter,
+    .unlocked_ioctl = io_dev_ioctl,
+    .open       = io_dev_open,
+    .release    = io_dev_release,
+};
+
+static wb_io_dev_t *dev_match(const char *path)
+{
+    wb_io_dev_t *wb_io_dev;
+    char dev_name[MAX_NAME_SIZE];
+    int i;
+
+    for (i = 0; i < MAX_IO_DEV_NUM; i++) {
+        if (io_dev_arry[i] == NULL) {
+            continue;
+        }
+        wb_io_dev = io_dev_arry[i];
+        snprintf(dev_name, MAX_NAME_SIZE,"/dev/%s", wb_io_dev->name);
+        if (!strcmp(path, dev_name)) {
+            IO_DEV_DEBUG_VERBOSE("get dev_name = %s, minor = %d\n", dev_name, i);
+            return wb_io_dev;
+        }
+    }
+
+    return NULL;
+}
+
+int io_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    wb_io_dev_t *wb_io_dev;
+    int read_len;
+
+    if (path == NULL) {
+        IO_DEV_DEBUG_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if (buf == NULL) {
+        IO_DEV_DEBUG_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    wb_io_dev = dev_match(path);
+    if (wb_io_dev == NULL) {
+        IO_DEV_DEBUG_ERROR("io_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    read_len = io_dev_read_tmp(wb_io_dev, offset, buf, count);
+    if (read_len < 0) {
+        IO_DEV_DEBUG_ERROR("io_dev_read_tmp failed, ret:%d.\n", read_len);
+    }
+    return read_len;
+}
+EXPORT_SYMBOL(io_device_func_read);
+
+int io_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    wb_io_dev_t *wb_io_dev;
+    int write_len;
+
+    if (path == NULL) {
+        IO_DEV_DEBUG_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if (buf == NULL) {
+        IO_DEV_DEBUG_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    wb_io_dev = dev_match(path);
+    if (wb_io_dev == NULL) {
+        IO_DEV_DEBUG_ERROR("i2c_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    write_len = io_dev_write_tmp(wb_io_dev, offset, buf, count);
+    if (write_len < 0) {
+        IO_DEV_DEBUG_ERROR("io_dev_write_tmp failed, ret:%d.\n", write_len);
+    }
+    return write_len;
+}
+EXPORT_SYMBOL(io_device_func_write);
+
+static int io_dev_probe(struct platform_device *pdev)
+{
+    int ret;
+    wb_io_dev_t *wb_io_dev;
+    struct miscdevice *misc;
+    io_dev_device_t *io_dev_device;
+
+    wb_io_dev = devm_kzalloc(&pdev->dev, sizeof(wb_io_dev_t), GFP_KERNEL);
+    if (!wb_io_dev) {
+        dev_err(&pdev->dev, "devm_kzalloc failed.\n");
+        ret = -ENOMEM;
+        return ret;
+    }
+    spin_lock_init(&wb_io_dev->io_dev_lock);
+
+    if (pdev->dev.of_node) {
+        ret = 0;
+        ret += of_property_read_string(pdev->dev.of_node, "io_dev_name", &wb_io_dev->name);
+        ret += of_property_read_u32(pdev->dev.of_node, "io_base", &wb_io_dev->io_base);
+        ret += of_property_read_u32(pdev->dev.of_node, "io_len", &wb_io_dev->io_len);
+        if (of_property_read_bool(pdev->dev.of_node, "indirect_addr")) {
+
+            wb_io_dev->indirect_addr = 1;
+            ret += of_property_read_u32(pdev->dev.of_node, "wr_data", &wb_io_dev->wr_data);
+            ret += of_property_read_u32(pdev->dev.of_node, "addr_low", &wb_io_dev->addr_low);
+            ret += of_property_read_u32(pdev->dev.of_node, "addr_high", &wb_io_dev->addr_high);
+            ret += of_property_read_u32(pdev->dev.of_node, "rd_data", &wb_io_dev->rd_data);
+            ret += of_property_read_u32(pdev->dev.of_node, "opt_ctl", &wb_io_dev->opt_ctl);
+        } else {
+
+            wb_io_dev->indirect_addr = 0;
+        }
+        if (ret != 0) {
+            dev_err(&pdev->dev, "Failed to get dts config, ret:%d.\n", ret);
+            return -ENXIO;
+        }
+    } else {
+        if (pdev->dev.platform_data == NULL) {
+            dev_err(&pdev->dev, "Failed to get platform data config.\n");
+            return -ENXIO;
+        }
+        io_dev_device = pdev->dev.platform_data;
+        wb_io_dev->name = io_dev_device->io_dev_name;
+        wb_io_dev->io_base = io_dev_device->io_base;
+        wb_io_dev->io_len = io_dev_device->io_len;
+        wb_io_dev->indirect_addr = io_dev_device->indirect_addr;
+        if (wb_io_dev->indirect_addr == 1) {
+            wb_io_dev->wr_data = io_dev_device->wr_data;
+            wb_io_dev->addr_low = io_dev_device->addr_low;
+            wb_io_dev->addr_high = io_dev_device->addr_high;
+            wb_io_dev->rd_data = io_dev_device->rd_data;
+            wb_io_dev->opt_ctl = io_dev_device->opt_ctl;
+        }
+    }
+
+    IO_DEV_DEBUG_VERBOSE("name:%s, io base:0x%x, io len:0x%x, addressing type:%s.\n",
+        wb_io_dev->name, wb_io_dev->io_base, wb_io_dev->io_len,
+        wb_io_dev->indirect_addr ? "indirect" : "direct");
+
+    misc = &wb_io_dev->misc;
+    misc->minor = MISC_DYNAMIC_MINOR;
+    misc->name = wb_io_dev->name;
+    misc->fops = &io_dev_fops;
+    misc->mode = 0666;
+    if (misc_register(misc) != 0) {
+        dev_err(&pdev->dev, "Failed to register %s device.\n", misc->name);
+        return -ENXIO;
+    }
+    if (misc->minor >= MAX_IO_DEV_NUM) {
+        dev_err(&pdev->dev, "Error: device minor[%d] more than max io device num[%d].\n",
+            misc->minor, MAX_IO_DEV_NUM);
+        misc_deregister(misc);
+        return -EINVAL;
+    }
+    io_dev_arry[misc->minor] = wb_io_dev;
+    dev_info(&pdev->dev, "register %s device [0x%x][0x%x] with minor %d using %s addressing success.\n",
+        misc->name, wb_io_dev->io_base, wb_io_dev->io_len, misc->minor,
+        wb_io_dev->indirect_addr ? "indirect" : "direct");
+
+    return 0;
+}
+
+static int io_dev_remove(struct platform_device *pdev)
+{
+    int i;
+
+    for (i = 0; i < MAX_IO_DEV_NUM ; i++) {
+        if (io_dev_arry[i] != NULL) {
+            misc_deregister(&io_dev_arry[i]->misc);
+            io_dev_arry[i] = NULL;
+        }
+    }
+
+    return 0;
+}
+
+static struct of_device_id io_dev_match[] = {
+    {
+        .compatible = "wb-io-dev",
+    },
+    {},
+};
+MODULE_DEVICE_TABLE(of, io_dev_match);
+
+static struct platform_driver wb_io_dev_driver = {
+    .probe      = io_dev_probe,
+    .remove     = io_dev_remove,
+    .driver     = {
+        .owner  = THIS_MODULE,
+        .name   = PROXY_NAME,
+        .of_match_table = io_dev_match,
+    },
+};
+
+static int __init wb_io_dev_init(void)
+{
+    return platform_driver_register(&wb_io_dev_driver);
+}
+
+static void __exit wb_io_dev_exit(void)
+{
+    platform_driver_unregister(&wb_io_dev_driver);
+}
+
+module_init(wb_io_dev_init);
+module_exit(wb_io_dev_exit);
+MODULE_DESCRIPTION("IO device driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.h
new file mode 100644
index 000000000000..3a1a10f0f20c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.h
@@ -0,0 +1,21 @@
+#ifndef __WB_IO_DEV_H__
+#define __WB_IO_DEV_H__
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+#define IO_DEV_NAME_MAX_LEN (64)
+
+typedef struct io_dev_device_s {
+    char io_dev_name[IO_DEV_NAME_MAX_LEN];
+    uint32_t io_base;
+    uint32_t io_len;
+    uint32_t indirect_addr;
+    uint32_t wr_data;
+    uint32_t addr_low;
+    uint32_t addr_high;
+    uint32_t rd_data;
+    uint32_t opt_ctl;
+    int device_flag;
+} io_dev_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.c
new file mode 100644
index 000000000000..c079dc409696
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.c
@@ -0,0 +1,166 @@
+/*
+ * wb_lpc_drv.c
+ * ko to set lpc pcie config io addr and enable lpc
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <linux/pci.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+
+#include "wb_lpc_drv.h"
+
+#define LPC_DRIVER_NAME                    "wb-lpc"
+#define LPC_MAKE_PCI_IO_RANGE(__base)      ((0xfc0001) | ((__base) & (0xFFFC)))
+
+int g_lpc_dev_debug = 0;
+int g_lpc_dev_error = 0;
+
+module_param(g_lpc_dev_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_lpc_dev_error, int, S_IRUGO | S_IWUSR);
+
+#define LPC_DEV_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_lpc_dev_debug) { \
+        printk(KERN_INFO "[LPC_DEV][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define LPC_DEV_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_lpc_dev_error) { \
+        printk(KERN_ERR "[LPC_DEV][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+typedef struct wb_lpc_dev_s {
+    const char *lpc_io_name;
+    uint32_t domain;
+    uint32_t bus;
+    uint32_t slot;
+    uint32_t fn;
+    uint32_t lpc_io_base;
+    uint32_t lpc_io_size;
+    uint32_t lpc_gen_dec;
+} wb_lpc_dev_t;
+
+static int wb_lpc_probe(struct platform_device *pdev)
+{
+    int ret, devfn;
+    wb_lpc_dev_t *wb_lpc_dev;
+    struct pci_dev *pci_dev;
+    lpc_drv_device_t *lpc_drv_device;
+
+    wb_lpc_dev = devm_kzalloc(&pdev->dev, sizeof(wb_lpc_dev_t), GFP_KERNEL);
+    if (!wb_lpc_dev) {
+        dev_err(&pdev->dev, "devm_kzalloc failed.\n");
+        ret = -ENOMEM;
+        return ret;
+    }
+
+    if (pdev->dev.of_node) {
+        ret = 0;
+        ret += of_property_read_string(pdev->dev.of_node, "lpc_io_name", &wb_lpc_dev->lpc_io_name);
+        ret += of_property_read_u32(pdev->dev.of_node, "pci_domain", &wb_lpc_dev->domain);
+        ret += of_property_read_u32(pdev->dev.of_node, "pci_bus", &wb_lpc_dev->bus);
+        ret += of_property_read_u32(pdev->dev.of_node, "pci_slot", &wb_lpc_dev->slot);
+        ret += of_property_read_u32(pdev->dev.of_node, "pci_fn", &wb_lpc_dev->fn);
+        ret += of_property_read_u32(pdev->dev.of_node, "lpc_io_base", &wb_lpc_dev->lpc_io_base);
+        ret += of_property_read_u32(pdev->dev.of_node, "lpc_io_size", &wb_lpc_dev->lpc_io_size);
+        ret += of_property_read_u32(pdev->dev.of_node, "lpc_gen_dec", &wb_lpc_dev->lpc_gen_dec);
+        if (ret != 0) {
+            dev_err(&pdev->dev, "Failed to get dts config, ret:%d.\n", ret);
+            return -ENXIO;
+        }
+    } else {
+        if (pdev->dev.platform_data == NULL) {
+            dev_err(&pdev->dev, "Failed to get platform data config.\n");
+            return -ENXIO;
+        }
+        lpc_drv_device = pdev->dev.platform_data;
+        wb_lpc_dev->lpc_io_name = lpc_drv_device->lpc_io_name;
+        wb_lpc_dev->domain = lpc_drv_device->pci_domain;
+        wb_lpc_dev->bus = lpc_drv_device->pci_bus;
+        wb_lpc_dev->slot = lpc_drv_device->pci_slot;
+        wb_lpc_dev->fn = lpc_drv_device->pci_fn;
+        wb_lpc_dev->lpc_io_base = lpc_drv_device->lpc_io_base;
+        wb_lpc_dev->lpc_io_size = lpc_drv_device->lpc_io_size;
+        wb_lpc_dev->lpc_gen_dec = lpc_drv_device->lpc_gen_dec;
+    }
+
+    LPC_DEV_DEBUG_VERBOSE("domain:0x%04x, bus:0x%02x, slot:0x%02x, fn:%u\n",
+        wb_lpc_dev->domain,wb_lpc_dev->bus, wb_lpc_dev->slot, wb_lpc_dev->fn);
+    LPC_DEV_DEBUG_VERBOSE("lpc_io_name:%s, lpc_io_base:0x%x, lpc_io_size:%u, lpc_gen_dec:0x%x.\n",
+        wb_lpc_dev->lpc_io_name, wb_lpc_dev->lpc_io_base, wb_lpc_dev->lpc_io_size, wb_lpc_dev->lpc_gen_dec);
+
+    devfn = PCI_DEVFN(wb_lpc_dev->slot, wb_lpc_dev->fn);
+    pci_dev = pci_get_domain_bus_and_slot(wb_lpc_dev->domain, wb_lpc_dev->bus, devfn);
+    if (pci_dev == NULL) {
+        dev_err(&pdev->dev, "Failed to find pci_dev, domain:0x%04x, bus:0x%02x, devfn:0x%x\n",
+            wb_lpc_dev->domain, wb_lpc_dev->bus, devfn);
+        return -ENXIO;
+    }
+
+    pci_write_config_dword(pci_dev, wb_lpc_dev->lpc_gen_dec, LPC_MAKE_PCI_IO_RANGE(wb_lpc_dev->lpc_io_base));
+    if (!request_region(wb_lpc_dev->lpc_io_base, wb_lpc_dev->lpc_io_size, wb_lpc_dev->lpc_io_name)) {
+        dev_err(&pdev->dev, "Failed to request_region [0x%x][0x%x].\n", wb_lpc_dev->lpc_io_base, wb_lpc_dev->lpc_io_size);
+        return -EBUSY;
+    }
+
+    platform_set_drvdata(pdev, wb_lpc_dev);
+
+    dev_info(&pdev->dev, "lpc request_region [0x%x][0x%x] success.\n", wb_lpc_dev->lpc_io_base, wb_lpc_dev->lpc_io_size);
+
+    return 0;
+}
+
+static int wb_lpc_remove(struct platform_device *pdev)
+{
+    wb_lpc_dev_t *wb_lpc_dev;
+
+    wb_lpc_dev = platform_get_drvdata(pdev);
+    if (wb_lpc_dev) {
+        release_region(wb_lpc_dev->lpc_io_base , wb_lpc_dev->lpc_io_size);
+        LPC_DEV_DEBUG_VERBOSE("lpc base:0x%x, len:0x%x.\n", wb_lpc_dev->lpc_io_base, wb_lpc_dev->lpc_io_size);
+    }
+    LPC_DEV_DEBUG_VERBOSE("lpc remove.\n");
+
+    return 0;
+}
+
+static struct of_device_id lpc_dev_match[] = {
+    {
+        .compatible = "wb-lpc",
+    },
+    {},
+};
+MODULE_DEVICE_TABLE(of, lpc_dev_match);
+
+static struct platform_driver wb_lpc_driver = {
+    .probe      = wb_lpc_probe,
+    .remove     = wb_lpc_remove,
+    .driver     = {
+        .owner  = THIS_MODULE,
+        .name   = LPC_DRIVER_NAME,
+        .of_match_table = lpc_dev_match,
+    },
+};
+
+static int __init wb_lpc_init(void)
+{
+    return platform_driver_register(&wb_lpc_driver);
+}
+
+static void __exit wb_lpc_exit(void)
+{
+    platform_driver_unregister(&wb_lpc_driver);
+}
+
+module_init(wb_lpc_init);
+module_exit(wb_lpc_exit);
+MODULE_DESCRIPTION("lpc driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.h
new file mode 100644
index 000000000000..76e8c32c12e9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_lpc_drv.h
@@ -0,0 +1,18 @@
+#ifndef __WB_LPC_DRV_H__
+#define __WB_LPC_DRV_H__
+
+#define LPC_IO_NAME_MAX_LEN (64)
+
+typedef struct lpc_drv_device_s {
+    char lpc_io_name[LPC_IO_NAME_MAX_LEN];
+    int pci_domain;
+    int pci_bus;
+    int pci_slot;
+    int pci_fn;
+    int lpc_io_base;
+    int lpc_io_size;
+    int lpc_gen_dec;
+    int device_flag;
+} lpc_drv_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c
new file mode 100644
index 000000000000..1e84e65d7b11
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c
@@ -0,0 +1,660 @@
+/*
+ * wb_mac_th3.c - A driver for control wb_mac_th3 base on wb_mac.c
+ *
+ * Copyright (c) 1998, 1999  Frodo Looijaard <frodol@dds.nl>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+#define MAC_TEMP_INVALID    (99999999)
+
+#define MAC_SIZE		    (256)
+#define MAC_TEMP_NUM        (16)
+
+#define MAC_ID_REG          (0x02000000)
+
+typedef enum {
+    DBG_START,
+    DBG_VERBOSE,
+    DBG_KEY,
+    DBG_WARN,
+    DBG_ERROR,
+    DBG_END,
+} dbg_level_t;
+
+typedef enum{
+    MAC_TYPE_START,
+    TD4_X9 = 0xb780,
+    TD4_X9_8 = 0xb788,
+    TH3 = 0xb980,
+    TD3 = 0xb870,
+    TD4 = 0xb880,
+    TH4 = 0xb990,
+    MAC_TYPE_END,
+} mac_type;
+
+typedef struct sensor_regs_s {
+    int id;
+    u32 reg;
+} sensor_reg_t;
+
+typedef struct mac_temp_regs_s {
+    int mac_type;
+    sensor_reg_t sensor_reg[MAC_TEMP_NUM];
+} mac_temp_reg_t;
+
+typedef enum {
+    MAC_TEMP_START,
+    MAC_TEMP_INDEX1,
+    MAC_TEMP_INDEX2,
+    MAC_TEMP_INDEX3,
+    MAC_TEMP_INDEX4,
+    MAC_TEMP_INDEX5,
+    MAC_TEMP_INDEX6,
+    MAC_TEMP_INDEX7,
+    MAC_TEMP_INDEX8,
+    MAC_TEMP_INDEX9,
+    MAC_TEMP_INDEX10,
+    MAC_TEMP_INDEX11,
+    MAC_TEMP_INDEX12,
+    MAC_TEMP_INDEX13,
+    MAC_TEMP_INDEX14,
+    MAC_TEMP_INDEX15,
+    MAC_TEMP_END,
+} mac_hwmon_index;
+
+static mac_temp_reg_t mac_temp_reg[] = {
+    {
+        /* TD3 */
+        .mac_type = TD3,
+        .sensor_reg = {
+            {.id = MAC_TEMP_INDEX1,  .reg = 0x02004700},
+            {.id = MAC_TEMP_INDEX2,  .reg = 0x02004800},
+            {.id = MAC_TEMP_INDEX3,  .reg = 0x02004900},
+            {.id = MAC_TEMP_INDEX4,  .reg = 0x02004a00},
+            {.id = MAC_TEMP_INDEX5,  .reg = 0x02004b00},
+            {.id = MAC_TEMP_INDEX6,  .reg = 0x02004c00},
+            {.id = MAC_TEMP_INDEX7,  .reg = 0x02004d00},
+            {.id = MAC_TEMP_INDEX8,  .reg = 0x02004e00},
+            {.id = MAC_TEMP_INDEX9,  .reg = 0x02005200},
+            {.id = MAC_TEMP_INDEX10, .reg = 0x02005100},
+            {.id = MAC_TEMP_INDEX11, .reg = 0x02005000},
+            {.id = MAC_TEMP_INDEX12, .reg = 0x02004f00},
+        },
+    },
+    {
+        /* TD4 */
+        .mac_type = TD4,
+        .sensor_reg = {
+            {.id = MAC_TEMP_INDEX1,  .reg = 0x02004900},
+            {.id = MAC_TEMP_INDEX2,  .reg = 0x02004b00},
+            {.id = MAC_TEMP_INDEX3,  .reg = 0x02004d00},
+            {.id = MAC_TEMP_INDEX4,  .reg = 0x02004f00},
+            {.id = MAC_TEMP_INDEX5,  .reg = 0x02005100},
+            {.id = MAC_TEMP_INDEX6,  .reg = 0x02005300},
+            {.id = MAC_TEMP_INDEX7,  .reg = 0x02005500},
+            {.id = MAC_TEMP_INDEX8,  .reg = 0x02005700},
+            {.id = MAC_TEMP_INDEX9,  .reg = 0x02005900},
+            {.id = MAC_TEMP_INDEX10, .reg = 0x02005b00},
+            {.id = MAC_TEMP_INDEX11, .reg = 0x02005d00},
+            {.id = MAC_TEMP_INDEX12, .reg = 0x02005f00},
+            {.id = MAC_TEMP_INDEX13, .reg = 0x02006100},
+            {.id = MAC_TEMP_INDEX14, .reg = 0x02006300},
+            {.id = MAC_TEMP_INDEX15, .reg = 0x02006500},
+        },
+    },
+    {
+        /* TD4_X9 */
+        .mac_type = TD4_X9,
+        .sensor_reg = {
+            {.id = MAC_TEMP_INDEX1,  .reg = 0x02005a00},
+            {.id = MAC_TEMP_INDEX2,  .reg = 0x02005c00},
+            {.id = MAC_TEMP_INDEX3,  .reg = 0x02005e00},
+            {.id = MAC_TEMP_INDEX4,  .reg = 0x02006000},
+            {.id = MAC_TEMP_INDEX5,  .reg = 0x02006200},
+            {.id = MAC_TEMP_INDEX6,  .reg = 0x02006400},
+            {.id = MAC_TEMP_INDEX7,  .reg = 0x02006600},
+            {.id = MAC_TEMP_INDEX8,  .reg = 0x02006800},
+            {.id = MAC_TEMP_INDEX9,  .reg = 0x02006a00},
+        },
+    },
+    {
+        /* TD4_X9_8 */
+        .mac_type = TD4_X9_8,
+        .sensor_reg = {
+            {.id = MAC_TEMP_INDEX1,  .reg = 0x02005a00},
+            {.id = MAC_TEMP_INDEX2,  .reg = 0x02005c00},
+            {.id = MAC_TEMP_INDEX3,  .reg = 0x02005e00},
+            {.id = MAC_TEMP_INDEX4,  .reg = 0x02006000},
+            {.id = MAC_TEMP_INDEX5,  .reg = 0x02006200},
+            {.id = MAC_TEMP_INDEX6,  .reg = 0x02006400},
+            {.id = MAC_TEMP_INDEX7,  .reg = 0x02006600},
+            {.id = MAC_TEMP_INDEX8,  .reg = 0x02006800},
+            {.id = MAC_TEMP_INDEX9,  .reg = 0x02006a00},
+        },
+    },
+    {
+        /* TH3 */
+        .mac_type = TH3,
+        .sensor_reg = {
+            {.id = MAC_TEMP_INDEX1,  .reg = 0x02004a00},
+            {.id = MAC_TEMP_INDEX2,  .reg = 0x02004b00},
+            {.id = MAC_TEMP_INDEX3,  .reg = 0x02004c00},
+            {.id = MAC_TEMP_INDEX4,  .reg = 0x02004d00},
+            {.id = MAC_TEMP_INDEX5,  .reg = 0x02004e00},
+            {.id = MAC_TEMP_INDEX6,  .reg = 0x02004f00},
+            {.id = MAC_TEMP_INDEX7,  .reg = 0x02005000},
+            {.id = MAC_TEMP_INDEX8,  .reg = 0x02005100},
+            {.id = MAC_TEMP_INDEX9,  .reg = 0x02005200},
+            {.id = MAC_TEMP_INDEX10, .reg = 0x02005300},
+            {.id = MAC_TEMP_INDEX11, .reg = 0x02005400},
+            {.id = MAC_TEMP_INDEX12, .reg = 0x02005500},
+            {.id = MAC_TEMP_INDEX13, .reg = 0x02005600},
+            {.id = MAC_TEMP_INDEX14, .reg = 0x02005700},
+            {.id = MAC_TEMP_INDEX15, .reg = 0x02005800},
+        },
+    },
+    {
+        /* TH4 */
+        .mac_type = TH4,
+        .sensor_reg = {
+            {.id = MAC_TEMP_INDEX1,  .reg = 0x0201d800},
+            {.id = MAC_TEMP_INDEX2,  .reg = 0x0201e000},
+            {.id = MAC_TEMP_INDEX3,  .reg = 0x0201e800},
+            {.id = MAC_TEMP_INDEX4,  .reg = 0x0201f000},
+            {.id = MAC_TEMP_INDEX5,  .reg = 0x0201f800},
+            {.id = MAC_TEMP_INDEX6,  .reg = 0x02020000},
+            {.id = MAC_TEMP_INDEX7,  .reg = 0x02020800},
+            {.id = MAC_TEMP_INDEX8,  .reg = 0x02021000},
+            {.id = MAC_TEMP_INDEX9,  .reg = 0x02021800},
+            {.id = MAC_TEMP_INDEX10, .reg = 0x02022000},
+            {.id = MAC_TEMP_INDEX11, .reg = 0x02022800},
+            {.id = MAC_TEMP_INDEX12, .reg = 0x02023000},
+            {.id = MAC_TEMP_INDEX13, .reg = 0x02023800},
+            {.id = MAC_TEMP_INDEX14, .reg = 0x02024000},
+            {.id = MAC_TEMP_INDEX15, .reg = 0x02024800},
+        },
+    },
+};
+
+static int debuglevel = 0;
+module_param(debuglevel, int, S_IRUGO | S_IWUSR);
+
+static int mac_pcie_id = MAC_TYPE_START;
+module_param(mac_pcie_id, int, S_IRUGO | S_IWUSR);
+
+#define DBG_DEBUG(fmt, arg...)  do { \
+    if ( debuglevel > DBG_START && debuglevel < DBG_ERROR) { \
+          printk(KERN_INFO "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+    } else if ( debuglevel >= DBG_ERROR ) {   \
+        printk(KERN_ERR "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+    } else {    } \
+} while (0)
+
+#define DBG_ERROR(fmt, arg...)  do { \
+     if ( debuglevel > DBG_START) {  \
+        printk(KERN_ERR "[ERROR]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+       } \
+ } while (0)
+
+struct mac_data {
+    struct i2c_client   *client;
+    struct device		*hwmon_dev;
+    struct mutex        update_lock;
+    u8                  data[MAC_SIZE]; /* Register value */
+};
+
+static int wb_i2c_read_one_time(struct i2c_client *client, u8 *recv_buf, int size)
+{
+    struct i2c_msg msgs[2];
+    int ret = 0;
+
+    if ((client == NULL) || (recv_buf == NULL)) {
+        DBG_DEBUG("i2c_client || recv_buf = NULL\r\n");
+        return -1;
+    }
+
+    mem_clear(msgs, sizeof(msgs));
+
+    msgs[0].buf = recv_buf;
+    msgs[0].len = size;
+    msgs[0].addr = client->addr;
+    msgs[0].flags |= I2C_M_RD;
+
+    ret = i2c_transfer(client->adapter, msgs, 1);
+    if (ret < 0) {
+        return ret;
+    }
+    DBG_DEBUG("i2c_transfer, dev_addr 0x%x, size %d.\n", client->addr, size);
+
+    return 0;
+}
+
+static int wb_i2c_write_one_time(struct i2c_client *client, u8 *write_buf, int size)
+{
+    struct i2c_msg msgs[2];
+    int ret = 0;
+
+    if ((client == NULL) || (write_buf == NULL)) {
+        DBG_DEBUG("i2c_client || write_buf = NULL\r\n");
+        return -1;
+    }
+
+    if ((size <= 0)) {
+        DBG_DEBUG("size invalid, size %d\n", size);
+        return -1;
+    }
+
+    mem_clear(msgs, sizeof(msgs));
+
+    msgs[0].len = size;
+    msgs[0].buf = write_buf;
+    msgs[0].addr = client->addr;
+
+    ret = i2c_transfer(client->adapter, msgs, 1);
+    if (ret < 0) {
+        return ret;
+    }
+    DBG_DEBUG("i2c_transfer, dev_addr 0x%x, size %d\n", client->addr, size);
+
+    return 0;
+}
+
+static u8 step2_buf1[8] = {0x03, 0x21, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00};
+static u8 step2_buf2[8] = {0x03, 0x21, 0x04, 0x0c, 0x2c, 0x38, 0x02, 0x00};
+static u8 step2_buf3[8] = {0x03, 0x21, 0x04, 0x10, 0x02, 0x00, 0x4a, 0x00};
+static u8 step2_buf4[8] = {0x03, 0x21, 0x04, 0x00, 0x00, 0x00, 0x00, 0x01};
+static u8 step2_buf5[4] = {0x03, 0x21, 0x04, 0x08};
+static u8 step2_buf6[4] = {0x03, 0x21, 0x04, 0x10};
+
+static int getmac_register(struct i2c_client *client, u32 index, int *reg_value)
+{
+    int i;
+    int ret = 0;
+    int value = 0;
+    unsigned char read_buf[8];
+
+    if (index == 0) {
+        DBG_ERROR("invalid index\n");
+        return -1;
+    }
+
+    step2_buf3[7]  = index & 0xff;
+    step2_buf3[6]  = (index >> 8) & 0xff;
+    step2_buf3[5]  = (index >> 16) & 0xff;
+    step2_buf3[4]  = (index >> 24) & 0xff;
+
+     ret = wb_i2c_write_one_time(client, step2_buf1, 8);
+     if (ret < 0) {
+         DBG_ERROR("write step2_buf1 failed, ret = %d\n", ret);
+     }
+     ret = wb_i2c_write_one_time(client, step2_buf2, 8);
+     if (ret < 0) {
+         DBG_ERROR("write step2_buf2 failed, ret = %d\n", ret);
+     }
+     ret = wb_i2c_write_one_time(client, step2_buf3, 8);
+     if (ret < 0) {
+         DBG_ERROR("write step2_buf3 failed, ret = %d\n", ret);
+     }
+     ret = wb_i2c_write_one_time(client, step2_buf4, 8);
+     if (ret < 0) {
+         DBG_ERROR("write step2_buf4 failed, ret = %d\n", ret);
+     }
+
+     ret = wb_i2c_write_one_time(client, step2_buf5, 4);
+     if (ret < 0) {
+         DBG_ERROR("write step2_buf5 failed, ret = %d\n", ret);
+     }
+     ret = wb_i2c_read_one_time(client, read_buf, 4);
+     if (ret < 0) {
+         DBG_ERROR("read failed, ret = %d\n", ret);
+     }
+     for (i = 0; i < 4; i++) {
+         DBG_DEBUG("read_buf[%d] = 0x%x \n", i, read_buf[i]);
+     }
+
+     ret = wb_i2c_write_one_time(client, step2_buf6, 4);
+     if (ret < 0) {
+         DBG_ERROR("write step2_buf6 failed, ret = %d\n", ret);
+     }
+
+    ret = wb_i2c_read_one_time(client, read_buf, 4);
+    if (ret < 0) {
+        DBG_ERROR("read failed, ret = %d\n", ret);
+        return ret;
+    }
+
+    value = (read_buf[0] << 24)| (read_buf[1] << 16) | (read_buf[2] << 8) | read_buf[3];
+    *reg_value = value;
+
+    return ret;
+}
+
+static int mac_calcute(u32 reg, int *temp)
+{
+    int ret = 0;
+    u32 tmp = 0;
+
+    switch(mac_pcie_id) {
+    case TD3:
+    case TH3:
+        tmp = reg & 0x3ff;
+        *temp =  434100 - (tmp * 535);
+        break;
+    case TD4:
+    case TH4:
+    case TD4_X9:
+    case TD4_X9_8:
+        tmp = reg & 0x7ff;
+        *temp = (356070 - (tmp * 237));
+        break;
+    default:
+        ret = -1;
+        DBG_ERROR("read failed, ret = %d\n", ret);
+        break;
+    }
+
+    if ((*temp / 1000 < -70) || (*temp / 1000 > 200)) {
+        ret = -1;
+        DBG_ERROR("mac temp invalid, temp = %d\n", *temp );
+    }
+
+    return ret;
+}
+
+static int find_reg_type(int type, int *type_index)
+{
+    int i;
+    int size;
+
+    size = ARRAY_SIZE(mac_temp_reg);
+    for (i = 0; i < size; i++) {
+        if (mac_temp_reg[i].mac_type == type) {
+            *type_index = i;
+            return 0;
+        }
+    }
+
+    return -1;
+}
+
+static sensor_reg_t * find_reg_offset(int type, int index)
+{
+    int i;
+    int type_index;
+    int ret;
+
+    ret = find_reg_type(type, &type_index);
+    if (ret < 0) {
+        DBG_ERROR("find_reg_type failed, ret = %d\n", ret);
+        return NULL;
+    }
+
+    for (i = 0; i < MAC_TEMP_NUM; i++) {
+        if (mac_temp_reg[type_index].sensor_reg[i].id == index) {
+            return &(mac_temp_reg[type_index].sensor_reg[i]);
+        }
+    }
+
+    return NULL;
+}
+
+static int get_mactemp(struct i2c_client *client, int index, int *temp)
+{
+    int ret;
+    int reg_value;
+
+    if (index == 0) {
+        DBG_ERROR("invalid index\n");
+        return -1;
+    }
+
+    ret = getmac_register(client, index, &reg_value);
+    if (ret < 0) {
+        DBG_ERROR("getmac_register failed, ret = %d\n", ret);
+        return ret;
+    }
+    DBG_DEBUG("reg_value = 0x%x \n", reg_value);
+
+    ret = mac_calcute(reg_value, temp);
+    if (ret < 0) {
+        DBG_ERROR("mac_calcute failed, ret = %d\n", ret);
+        return ret;
+    }
+
+    return 0;
+}
+
+static ssize_t show_mac_temp(struct device *dev, struct device_attribute *da, char *buf)
+{
+    struct mac_data *data = dev_get_drvdata(dev);
+    struct i2c_client *client = data->client;
+    u32 index_value = to_sensor_dev_attr_2(da)->index;
+    sensor_reg_t *t;
+    int result = 0;
+    int temp = -MAC_TEMP_INVALID;
+
+    mutex_lock(&data->update_lock);
+    t = find_reg_offset(mac_pcie_id, index_value);
+    if (t == NULL) {
+        temp = -MAC_TEMP_INVALID;
+        DBG_ERROR("find_reg_offset failed, mac_pcie_id = %d, index_value = %d\n", mac_pcie_id, index_value);
+    } else {
+        result = get_mactemp(client, t->reg, &temp);
+        if (result < 0) {
+            temp = -MAC_TEMP_INVALID;
+            DBG_ERROR("get_mactemp failed, ret = %d\n", result);
+        }
+    }
+
+    mutex_unlock(&data->update_lock);
+    return snprintf(buf, MAC_SIZE, "%d\n", temp);
+}
+
+static ssize_t show_mac_max_temp(struct device *dev, struct device_attribute *da, char *buf)
+{
+    struct mac_data *data = dev_get_drvdata(dev);
+    struct i2c_client *client = data->client;
+    int i;
+    int result;
+    int temp = -MAC_TEMP_INVALID;
+    int type_index;
+    int tmp;
+
+    mutex_lock(&data->update_lock);
+
+    result = find_reg_type(mac_pcie_id, &type_index);
+    if (result < 0) {
+        DBG_ERROR("find_reg_type failed, ret = %d\n", result);
+        goto exit;
+    }
+
+    for (i = 0; i < MAC_TEMP_NUM; i++) {
+        result = get_mactemp(client, mac_temp_reg[type_index].sensor_reg[i].reg, &tmp);
+        if (result < 0) {
+            DBG_ERROR("get_mactemp failed, ret = %d\n", result);
+            tmp = -MAC_TEMP_INVALID;
+        }
+
+        temp = (temp > tmp) ? temp : tmp;
+    }
+
+exit:
+    mutex_unlock(&data->update_lock);
+    return snprintf(buf, MAC_SIZE, "%d\n", temp);
+}
+
+static int mac_bsc_init(struct i2c_client *client)
+{
+    int ret;
+    int reg_value;
+    int mac_id = 0;
+
+    ret = getmac_register(client, MAC_ID_REG, &reg_value);
+    if (ret < 0) {
+        DBG_ERROR("getmac_register failed, ret = %d\n", ret);
+        return ret;
+    }
+
+    DBG_DEBUG("reg_value = 0x%x \n", reg_value);
+    mac_id = reg_value & 0xffff;
+    return mac_id;
+}
+
+static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX1);
+static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX2);
+static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX3);
+static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX4);
+static SENSOR_DEVICE_ATTR(temp5_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX5);
+static SENSOR_DEVICE_ATTR(temp6_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX6);
+static SENSOR_DEVICE_ATTR(temp7_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX7);
+static SENSOR_DEVICE_ATTR(temp8_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX8);
+static SENSOR_DEVICE_ATTR(temp9_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX9);
+static SENSOR_DEVICE_ATTR(temp10_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX10);
+static SENSOR_DEVICE_ATTR(temp11_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX11);
+static SENSOR_DEVICE_ATTR(temp12_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX12);
+static SENSOR_DEVICE_ATTR(temp13_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX13);
+static SENSOR_DEVICE_ATTR(temp14_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX14);
+static SENSOR_DEVICE_ATTR(temp15_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX15);
+static SENSOR_DEVICE_ATTR(temp99_input, S_IRUGO, show_mac_max_temp, NULL, 0);
+
+static struct attribute *mac_hwmon_attrs[] = {
+    &sensor_dev_attr_temp1_input.dev_attr.attr,
+    &sensor_dev_attr_temp2_input.dev_attr.attr,
+    &sensor_dev_attr_temp3_input.dev_attr.attr,
+    &sensor_dev_attr_temp4_input.dev_attr.attr,
+    &sensor_dev_attr_temp5_input.dev_attr.attr,
+    &sensor_dev_attr_temp6_input.dev_attr.attr,
+    &sensor_dev_attr_temp7_input.dev_attr.attr,
+    &sensor_dev_attr_temp8_input.dev_attr.attr,
+    &sensor_dev_attr_temp9_input.dev_attr.attr,
+    &sensor_dev_attr_temp10_input.dev_attr.attr,
+    &sensor_dev_attr_temp11_input.dev_attr.attr,
+    &sensor_dev_attr_temp12_input.dev_attr.attr,
+    &sensor_dev_attr_temp13_input.dev_attr.attr,
+    &sensor_dev_attr_temp14_input.dev_attr.attr,
+    &sensor_dev_attr_temp15_input.dev_attr.attr,
+    &sensor_dev_attr_temp99_input.dev_attr.attr,
+    NULL
+};
+ATTRIBUTE_GROUPS(mac_hwmon);
+
+static int init_bcs_command(int mac_type) {
+    int ret;
+
+    ret = 0;
+    switch (mac_type) {
+        case TD3:
+            step2_buf2[5] = 0x38;
+            break;
+        case TH3:
+        case TH4:
+        case TD4:
+        case TD4_X9:
+        case TD4_X9_8:
+            step2_buf2[5] = 0x40;
+            break;
+        default:
+            ret = -1;
+            break;
+    }
+    return ret;
+}
+
+static int mac_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+    struct mac_data *data;
+    int mac_type;
+    int ret;
+
+    mac_type = id->driver_data;
+    mac_pcie_id = mac_type;
+    if (init_bcs_command(mac_type) < 0) {
+        DBG_ERROR("mactype[%x] not support \n", mac_type);
+        return -1;
+    };
+
+    if (mac_type == TD4) {
+        ret = mac_bsc_init(client);
+        if (ret < 0) {
+            DBG_ERROR("mac_bsc_init failed, ret = %d\n", ret);
+            return -1;
+        }
+        mac_type = ret;
+        mac_pcie_id = mac_type;
+    }
+
+    DBG_DEBUG("=========mac_probe(%x)===========\n",client->addr);
+    DBG_DEBUG("mac_type: %x\n", mac_type);
+    data = devm_kzalloc(&client->dev, sizeof(struct mac_data), GFP_KERNEL);
+    if (!data) {
+        return -ENOMEM;
+    }
+
+    data->client = client;
+    i2c_set_clientdata(client, data);
+    mutex_init(&data->update_lock);
+
+    data->hwmon_dev = hwmon_device_register_with_groups(&client->dev, client->name, data, mac_hwmon_groups);
+	if (IS_ERR(data->hwmon_dev)) {
+        return PTR_ERR(data->hwmon_dev);
+    }
+
+    return 0;
+}
+
+static int mac_remove(struct i2c_client *client)
+{
+    struct mac_data *data = i2c_get_clientdata(client);
+    hwmon_device_unregister(data->hwmon_dev);
+    return 0;
+}
+
+static const struct i2c_device_id mac_id[] = {
+    { "wb_mac_bsc_td3", TD3 },
+    { "wb_mac_bsc_td4", TD4 },
+    { "wb_mac_bsc_th3", TH3 },
+    { "wb_mac_bsc_th4", TH4 },
+    {}
+};
+MODULE_DEVICE_TABLE(i2c, mac_id);
+
+static struct i2c_driver wb_mac_bsc_driver = {
+    .driver = {
+        .name   = "wb_mac_bsc",
+    },
+    .probe      = mac_probe,
+    .remove     = mac_remove,
+    .id_table   = mac_id,
+};
+
+module_i2c_driver(wb_mac_bsc_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("mac bsc driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_optoe.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_optoe.c
new file mode 100644
index 000000000000..c09162368ad0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_optoe.c
@@ -0,0 +1,1192 @@
+/*
+ * optoe.c - A driver to read and write the EEPROM on optical transceivers
+ * (SFP, QSFP and similar I2C based devices)
+ *
+ * Copyright (C) 2014 Cumulus networks Inc.
+ * Copyright (C) 2017 Finisar Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Freeoftware Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+/*
+ *	Description:
+ *	a) Optical transceiver EEPROM read/write transactions are just like
+ *		the at24 eeproms managed by the at24.c i2c driver
+ *	b) The register/memory layout is up to 256 128 byte pages defined by
+ *		a "pages valid" register and switched via a "page select"
+ *		register as explained in below diagram.
+ *	c) 256 bytes are mapped at a time. 'Lower page 00h' is the first 128
+ *	        bytes of address space, and always references the same
+ *	        location, independent of the page select register.
+ *	        All mapped pages are mapped into the upper 128 bytes
+ *	        (offset 128-255) of the i2c address.
+ *	d) Devices with one I2C address (eg QSFP) use I2C address 0x50
+ *		(A0h in the spec), and map all pages in the upper 128 bytes
+ *		of that address.
+ *	e) Devices with two I2C addresses (eg SFP) have 256 bytes of data
+ *		at I2C address 0x50, and 256 bytes of data at I2C address
+ *		0x51 (A2h in the spec).  Page selection and paged access
+ *		only apply to this second I2C address (0x51).
+ *	e) The address space is presented, by the driver, as a linear
+ *	        address space.  For devices with one I2C client at address
+ *	        0x50 (eg QSFP), offset 0-127 are in the lower
+ *	        half of address 50/A0h/client[0].  Offset 128-255 are in
+ *	        page 0, 256-383 are page 1, etc.  More generally, offset
+ *	        'n' resides in page (n/128)-1.  ('page -1' is the lower
+ *	        half, offset 0-127).
+ *	f) For devices with two I2C clients at address 0x50 and 0x51 (eg SFP),
+ *		the address space places offset 0-127 in the lower
+ *	        half of 50/A0/client[0], offset 128-255 in the upper
+ *	        half.  Offset 256-383 is in the lower half of 51/A2/client[1].
+ *	        Offset 384-511 is in page 0, in the upper half of 51/A2/...
+ *	        Offset 512-639 is in page 1, in the upper half of 51/A2/...
+ *	        Offset 'n' is in page (n/128)-3 (for n > 383)
+ *
+ *	                    One I2c addressed (eg QSFP) Memory Map
+ *
+ *	                    2-Wire Serial Address: 1010000x
+ *
+ *	                    Lower Page 00h (128 bytes)
+ *	                    =====================
+ *	                   |                     |
+ *	                   |                     |
+ *	                   |                     |
+ *	                   |                     |
+ *	                   |                     |
+ *	                   |                     |
+ *	                   |                     |
+ *	                   |                     |
+ *	                   |                     |
+ *	                   |                     |
+ *	                   |Page Select Byte(127)|
+ *	                    =====================
+ *	                              |
+ *	                              |
+ *	                              |
+ *	                              |
+ *	                              V
+ *	     ------------------------------------------------------------
+ *	    |                 |                  |                       |
+ *	    |                 |                  |                       |
+ *	    |                 |                  |                       |
+ *	    |                 |                  |                       |
+ *	    |                 |                  |                       |
+ *	    |                 |                  |                       |
+ *	    |                 |                  |                       |
+ *	    |                 |                  |                       |
+ *	    |                 |                  |                       |
+ *	    V                 V                  V                       V
+ *	 ------------   --------------      ---------------     --------------
+ *	|            | |              |    |               |   |              |
+ *	|   Upper    | |     Upper    |    |     Upper     |   |    Upper     |
+ *	|  Page 00h  | |    Page 01h  |    |    Page 02h   |   |   Page 03h   |
+ *	|            | |   (Optional) |    |   (Optional)  |   |  (Optional   |
+ *	|            | |              |    |               |   |   for Cable  |
+ *	|            | |              |    |               |   |  Assemblies) |
+ *	|    ID      | |     AST      |    |      User     |   |              |
+ *	|  Fields    | |    Table     |    |   EEPROM Data |   |              |
+ *	|            | |              |    |               |   |              |
+ *	|            | |              |    |               |   |              |
+ *	|            | |              |    |               |   |              |
+ *	 ------------   --------------      ---------------     --------------
+ *
+ * The SFF 8436 (QSFP) spec only defines the 4 pages described above.
+ * In anticipation of future applications and devices, this driver
+ * supports access to the full architected range, 256 pages.
+ *
+ * The CMIS (Common Management Interface Specification) defines use of
+ * considerably more pages (at least to page 0xAF), which this driver
+ * supports.
+ *
+ * NOTE: This version of the driver ONLY SUPPORTS BANK 0 PAGES on CMIS
+ * devices.
+ *
+ **/
+
+/* #define DEBUG 1 */
+
+#undef EEPROM_CLASS
+#ifdef CONFIG_EEPROM_CLASS
+#define EEPROM_CLASS
+#endif
+#ifdef CONFIG_EEPROM_CLASS_MODULE
+#define EEPROM_CLASS
+#endif
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/mutex.h>
+#include <linux/sysfs.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+#ifdef EEPROM_CLASS
+#include <linux/eeprom_class.h>
+#endif
+
+#include <linux/types.h>
+
+/* The maximum length of a port name */
+#define MAX_PORT_NAME_LEN 20
+
+struct optoe_platform_data {
+	u32		byte_len;		/* size (sum of all addr) */
+	u16		page_size;		/* for writes */
+	u8		flags;
+	void		*dummy1;		/* backward compatibility */
+	void		*dummy2;		/* backward compatibility */
+
+#ifdef EEPROM_CLASS
+	struct eeprom_platform_data *eeprom_data;
+#endif
+	char port_name[MAX_PORT_NAME_LEN];
+};
+
+/* fundamental unit of addressing for EEPROM */
+#define OPTOE_PAGE_SIZE 128
+/*
+ * Single address devices (eg QSFP) have 256 pages, plus the unpaged
+ * low 128 bytes.  If the device does not support paging, it is
+ * only 2 'pages' long.
+ */
+#define OPTOE_ARCH_PAGES 256
+#define ONE_ADDR_EEPROM_SIZE ((1 + OPTOE_ARCH_PAGES) * OPTOE_PAGE_SIZE)
+#define ONE_ADDR_EEPROM_UNPAGED_SIZE (2 * OPTOE_PAGE_SIZE)
+/*
+ * Dual address devices (eg SFP) have 256 pages, plus the unpaged
+ * low 128 bytes, plus 256 bytes at 0x50.  If the device does not
+ * support paging, it is 4 'pages' long.
+ */
+#define TWO_ADDR_EEPROM_SIZE ((3 + OPTOE_ARCH_PAGES) * OPTOE_PAGE_SIZE)
+#define TWO_ADDR_EEPROM_UNPAGED_SIZE (4 * OPTOE_PAGE_SIZE)
+#define TWO_ADDR_NO_0X51_SIZE (2 * OPTOE_PAGE_SIZE)
+
+/* a few constants to find our way around the EEPROM */
+#define OPTOE_PAGE_SELECT_REG   0x7F
+#define ONE_ADDR_PAGEABLE_REG 0x02
+#define QSFP_NOT_PAGEABLE (1<<2)
+#define CMIS_NOT_PAGEABLE (1<<7)
+#define TWO_ADDR_PAGEABLE_REG 0x40
+#define TWO_ADDR_PAGEABLE (1<<4)
+#define TWO_ADDR_0X51_REG 92
+#define TWO_ADDR_0X51_SUPP (1<<6)
+#define OPTOE_ID_REG 0
+#define OPTOE_READ_OP 0
+#define OPTOE_WRITE_OP 1
+#define OPTOE_EOF 0  /* used for access beyond end of device */
+
+struct optoe_data {
+	struct optoe_platform_data chip;
+	int use_smbus;
+	char port_name[MAX_PORT_NAME_LEN];
+
+	/*
+	 * Lock protects against activities from other Linux tasks,
+	 * but not from changes by other I2C masters.
+	 */
+	struct mutex lock;
+	struct bin_attribute bin;
+	struct attribute_group attr_group;
+
+	u8 *writebuf;
+	unsigned int write_max;
+
+	unsigned int num_addresses;
+
+#ifdef EEPROM_CLASS
+	struct eeprom_device *eeprom_dev;
+#endif
+
+	/* dev_class: ONE_ADDR (QSFP) or TWO_ADDR (SFP) */
+	int dev_class;
+
+	struct i2c_client *client[];
+};
+
+/*
+ * This parameter is to help this driver avoid blocking other drivers out
+ * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
+ * clock, one 256 byte read takes about 1/43 second which is excessive;
+ * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
+ * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
+ *
+ * This value is forced to be a power of two so that writes align on pages.
+ */
+static unsigned int io_limit = OPTOE_PAGE_SIZE;
+
+/*
+ * specs often allow 5 msec for a page write, sometimes 20 msec;
+ * it's important to recover from write timeouts.
+ */
+static unsigned int write_timeout = 50;
+
+/*
+ * flags to distinguish one-address (QSFP family) from two-address (SFP family)
+ * If the family is not known, figure it out when the device is accessed
+ */
+#define ONE_ADDR 1
+#define TWO_ADDR 2
+#define CMIS_ADDR 3
+
+static const struct i2c_device_id optoe_ids[] = {
+	{ "wb_optoe1", ONE_ADDR },
+	{ "wb_optoe2", TWO_ADDR },
+	{ "wb_optoe3", CMIS_ADDR },
+	{ "wb_sff8436", ONE_ADDR },
+	{ "wb_24c04", TWO_ADDR },
+	{ /* END OF LIST */ }
+};
+MODULE_DEVICE_TABLE(i2c, optoe_ids);
+
+/*-------------------------------------------------------------------------*/
+/*
+ * This routine computes the addressing information to be used for
+ * a given r/w request.
+ *
+ * Task is to calculate the client (0 = i2c addr 50, 1 = i2c addr 51),
+ * the page, and the offset.
+ *
+ * Handles both single address (eg QSFP) and two address (eg SFP).
+ *     For SFP, offset 0-255 are on client[0], >255 is on client[1]
+ *     Offset 256-383 are on the lower half of client[1]
+ *     Pages are accessible on the upper half of client[1].
+ *     Offset >383 are in 128 byte pages mapped into the upper half
+ *
+ *     For QSFP, all offsets are on client[0]
+ *     offset 0-127 are on the lower half of client[0] (no paging)
+ *     Pages are accessible on the upper half of client[1].
+ *     Offset >127 are in 128 byte pages mapped into the upper half
+ *
+ *     Callers must not read/write beyond the end of a client or a page
+ *     without recomputing the client/page.  Hence offset (within page)
+ *     plus length must be less than or equal to 128.  (Note that this
+ *     routine does not have access to the length of the call, hence
+ *     cannot do the validity check.)
+ *
+ * Offset within Lower Page 00h and Upper Page 00h are not recomputed
+ */
+
+static uint8_t optoe_translate_offset(struct optoe_data *optoe,
+		loff_t *offset, struct i2c_client **client)
+{
+	unsigned int page = 0;
+
+	*client = optoe->client[0];
+
+	/* if SFP style, offset > 255, shift to i2c addr 0x51 */
+	if (optoe->dev_class == TWO_ADDR) {
+		if (*offset > 255) {
+			/* like QSFP, but shifted to client[1] */
+			*client = optoe->client[1];
+			*offset -= 256;
+		}
+	}
+
+	/*
+	 * if offset is in the range 0-128...
+	 * page doesn't matter (using lower half), return 0.
+	 * offset is already correct (don't add 128 to get to paged area)
+	 */
+	if (*offset < OPTOE_PAGE_SIZE)
+		return page;
+
+	/* note, page will always be positive since *offset >= 128 */
+	page = (*offset >> 7)-1;
+	/* 0x80 places the offset in the top half, offset is last 7 bits */
+	*offset = OPTOE_PAGE_SIZE + (*offset & 0x7f);
+
+	return page;  /* note also returning client and offset */
+}
+
+static ssize_t optoe_eeprom_read(struct optoe_data *optoe,
+		    struct i2c_client *client,
+		    char *buf, unsigned int offset, size_t count)
+{
+	struct i2c_msg msg[2];
+	u8 msgbuf[2];
+	unsigned long timeout, read_time;
+	int status, i;
+
+	mem_clear(msg, sizeof(msg));
+
+	switch (optoe->use_smbus) {
+	case I2C_SMBUS_I2C_BLOCK_DATA:
+		/*smaller eeproms can work given some SMBus extension calls */
+		if (count > I2C_SMBUS_BLOCK_MAX)
+			count = I2C_SMBUS_BLOCK_MAX;
+		break;
+	case I2C_SMBUS_WORD_DATA:
+		/* Check for odd length transaction */
+		count = (count == 1) ? 1 : 2;
+		break;
+	case I2C_SMBUS_BYTE_DATA:
+		count = 1;
+		break;
+	default:
+		/*
+		 * When we have a better choice than SMBus calls, use a
+		 * combined I2C message. Write address; then read up to
+		 * io_limit data bytes.  msgbuf is u8 and will cast to our
+		 * needs.
+		 */
+		i = 0;
+		msgbuf[i++] = offset;
+
+		msg[0].addr = client->addr;
+		msg[0].buf = msgbuf;
+		msg[0].len = i;
+
+		msg[1].addr = client->addr;
+		msg[1].flags = I2C_M_RD;
+		msg[1].buf = buf;
+		msg[1].len = count;
+	}
+
+	/*
+	 * Reads fail if the previous write didn't complete yet. We may
+	 * loop a few times until this one succeeds, waiting at least
+	 * long enough for one entire page write to work.
+	 */
+	timeout = jiffies + msecs_to_jiffies(write_timeout);
+	do {
+		read_time = jiffies;
+
+		switch (optoe->use_smbus) {
+		case I2C_SMBUS_I2C_BLOCK_DATA:
+			status = i2c_smbus_read_i2c_block_data(client, offset,
+					count, buf);
+			break;
+		case I2C_SMBUS_WORD_DATA:
+			status = i2c_smbus_read_word_data(client, offset);
+			if (status >= 0) {
+				buf[0] = status & 0xff;
+				if (count == 2)
+					buf[1] = status >> 8;
+				status = count;
+			}
+			break;
+		case I2C_SMBUS_BYTE_DATA:
+			status = i2c_smbus_read_byte_data(client, offset);
+			if (status >= 0) {
+				buf[0] = status;
+				status = count;
+			}
+			break;
+		default:
+			status = i2c_transfer(client->adapter, msg, 2);
+			if (status == 2)
+				status = count;
+		}
+
+		dev_dbg(&client->dev, "eeprom read %zu@%d --> %d (%ld)\n",
+				count, offset, status, jiffies);
+
+		if (status == count)  /* happy path */
+			return count;
+
+		/* REVISIT: at HZ=100, this is sloooow */
+		usleep_range(1000, 2000);
+	} while (time_before(read_time, timeout));
+
+	return -ETIMEDOUT;
+}
+
+static ssize_t optoe_eeprom_write(struct optoe_data *optoe,
+				struct i2c_client *client,
+				const char *buf,
+				unsigned int offset, size_t count)
+{
+	struct i2c_msg msg;
+	ssize_t status;
+	unsigned long timeout, write_time;
+	unsigned int next_page_start;
+	int i = 0;
+
+	/* write max is at most a page
+	 * (In this driver, write_max is actually one byte!)
+	 */
+	if (count > optoe->write_max)
+		count = optoe->write_max;
+
+	/* shorten count if necessary to avoid crossing page boundary */
+	next_page_start = roundup(offset + 1, OPTOE_PAGE_SIZE);
+	if (offset + count > next_page_start)
+		count = next_page_start - offset;
+
+	switch (optoe->use_smbus) {
+	case I2C_SMBUS_I2C_BLOCK_DATA:
+		/*smaller eeproms can work given some SMBus extension calls */
+		if (count > I2C_SMBUS_BLOCK_MAX)
+			count = I2C_SMBUS_BLOCK_MAX;
+		break;
+	case I2C_SMBUS_WORD_DATA:
+		/* Check for odd length transaction */
+		count = (count == 1) ? 1 : 2;
+		break;
+	case I2C_SMBUS_BYTE_DATA:
+		count = 1;
+		break;
+	default:
+		/* If we'll use I2C calls for I/O, set up the message */
+		msg.addr = client->addr;
+		msg.flags = 0;
+
+		/* msg.buf is u8 and casts will mask the values */
+		msg.buf = optoe->writebuf;
+
+		msg.buf[i++] = offset;
+		memcpy(&msg.buf[i], buf, count);
+		msg.len = i + count;
+		break;
+	}
+
+	/*
+	 * Reads fail if the previous write didn't complete yet. We may
+	 * loop a few times until this one succeeds, waiting at least
+	 * long enough for one entire page write to work.
+	 */
+	timeout = jiffies + msecs_to_jiffies(write_timeout);
+	do {
+		write_time = jiffies;
+
+		switch (optoe->use_smbus) {
+		case I2C_SMBUS_I2C_BLOCK_DATA:
+			status = i2c_smbus_write_i2c_block_data(client,
+						offset, count, buf);
+			if (status == 0)
+				status = count;
+			break;
+		case I2C_SMBUS_WORD_DATA:
+			if (count == 2) {
+				status = i2c_smbus_write_word_data(client,
+					offset, (u16)((buf[0])|(buf[1] << 8)));
+			} else {
+				/* count = 1 */
+				status = i2c_smbus_write_byte_data(client,
+					offset, buf[0]);
+			}
+			if (status == 0)
+				status = count;
+			break;
+		case I2C_SMBUS_BYTE_DATA:
+			status = i2c_smbus_write_byte_data(client, offset,
+						buf[0]);
+			if (status == 0)
+				status = count;
+			break;
+		default:
+			status = i2c_transfer(client->adapter, &msg, 1);
+			if (status == 1)
+				status = count;
+			break;
+		}
+
+		dev_dbg(&client->dev, "eeprom write %zu@%d --> %ld (%lu)\n",
+				count, offset, (long int) status, jiffies);
+
+		if (status == count)
+			return count;
+
+		/* REVISIT: at HZ=100, this is sloooow */
+		usleep_range(1000, 2000);
+	} while (time_before(write_time, timeout));
+
+	return -ETIMEDOUT;
+}
+
+static ssize_t optoe_eeprom_update_client(struct optoe_data *optoe,
+				char *buf, loff_t off,
+				size_t count, int opcode)
+{
+	struct i2c_client *client;
+	ssize_t retval = 0;
+	uint8_t page = 0;
+    uint8_t loc;
+	loff_t phy_offset = off;
+	int ret = 0;
+
+	page = optoe_translate_offset(optoe, &phy_offset, &client);
+	dev_dbg(&client->dev,
+		"%s off %lld  page:%d phy_offset:%lld, count:%ld, opcode:%d\n",
+		__func__, off, page, phy_offset, (long int) count, opcode);
+
+    ret = optoe_eeprom_read(optoe, client, &loc, OPTOE_PAGE_SELECT_REG, 1);
+    if (ret < 0) {
+        dev_dbg(&client->dev, "Read page register for get now location page failed. ret:%d\n", ret);
+        return ret;
+    }
+
+    /* Only when read and now location page is inconsistent, will doing switch page */
+    if (loc != page) {
+        ret = optoe_eeprom_write(optoe, client, &page,
+            OPTOE_PAGE_SELECT_REG, 1);
+        if (ret < 0) {
+            dev_dbg(&client->dev,
+                "Write page register for page %d failed ret:%d!\n",
+                    page, ret);
+            return ret;
+        }
+    }
+
+	while (count) {
+		ssize_t	status;
+
+		if (opcode == OPTOE_READ_OP) {
+			status =  optoe_eeprom_read(optoe, client,
+				buf, phy_offset, count);
+		} else {
+			status =  optoe_eeprom_write(optoe, client,
+				buf, phy_offset, count);
+		}
+		if (status <= 0) {
+			if (retval == 0)
+				retval = status;
+			break;
+		}
+		buf += status;
+		phy_offset += status;
+		count -= status;
+		retval += status;
+	}
+
+	return retval;
+}
+
+/*
+ * Figure out if this access is within the range of supported pages.
+ * Note this is called on every access because we don't know if the
+ * module has been replaced since the last call.
+ * If/when modules support more pages, this is the routine to update
+ * to validate and allow access to additional pages.
+ *
+ * Returns updated len for this access:
+ *     - entire access is legal, original len is returned.
+ *     - access begins legal but is too long, len is truncated to fit.
+ *     - initial offset exceeds supported pages, return OPTOE_EOF (zero)
+ */
+static ssize_t optoe_page_legal(struct optoe_data *optoe,
+		loff_t off, size_t len)
+{
+	struct i2c_client *client = optoe->client[0];
+	u8 regval;
+	int not_pageable;
+	int status;
+	size_t maxlen;
+
+	if (off < 0)
+		return -EINVAL;
+	if (optoe->dev_class == TWO_ADDR) {
+		/* SFP case */
+		/* if only using addr 0x50 (first 256 bytes) we're good */
+		if ((off + len) <= TWO_ADDR_NO_0X51_SIZE)
+			return len;
+		/* if offset exceeds possible pages, we're not good */
+		if (off >= TWO_ADDR_EEPROM_SIZE)
+			return OPTOE_EOF;
+		/* in between, are pages supported? */
+		status = optoe_eeprom_read(optoe, client, &regval,
+				TWO_ADDR_PAGEABLE_REG, 1);
+		if (status < 0)
+			return status;  /* error out (no module?) */
+		if (regval & TWO_ADDR_PAGEABLE) {
+			/* Pages supported, trim len to the end of pages */
+			maxlen = TWO_ADDR_EEPROM_SIZE - off;
+		} else {
+			/* pages not supported, trim len to unpaged size */
+			if (off >= TWO_ADDR_EEPROM_UNPAGED_SIZE)
+				return OPTOE_EOF;
+
+			/* will be accessing addr 0x51, is that supported? */
+			/* byte 92, bit 6 implies DDM support, 0x51 support */
+			status = optoe_eeprom_read(optoe, client, &regval,
+						TWO_ADDR_0X51_REG, 1);
+			if (status < 0)
+				return status;
+			if (regval & TWO_ADDR_0X51_SUPP) {
+				/* addr 0x51 is OK */
+				maxlen = TWO_ADDR_EEPROM_UNPAGED_SIZE - off;
+			} else {
+				/* addr 0x51 NOT supported, trim to 256 max */
+				if (off >= TWO_ADDR_NO_0X51_SIZE)
+					return OPTOE_EOF;
+				maxlen = TWO_ADDR_NO_0X51_SIZE - off;
+			}
+		}
+		len = (len > maxlen) ? maxlen : len;
+		dev_dbg(&client->dev,
+			"page_legal, SFP, off %lld len %ld\n",
+			off, (long int) len);
+	} else {
+		/* QSFP case, CMIS case */
+		/* if no pages needed, we're good */
+		if ((off + len) <= ONE_ADDR_EEPROM_UNPAGED_SIZE)
+			return len;
+		/* if offset exceeds possible pages, we're not good */
+		if (off >= ONE_ADDR_EEPROM_SIZE)
+			return OPTOE_EOF;
+		/* in between, are pages supported? */
+		status = optoe_eeprom_read(optoe, client, &regval,
+				ONE_ADDR_PAGEABLE_REG, 1);
+		if (status < 0)
+			return status;  /* error out (no module?) */
+
+		if (optoe->dev_class == ONE_ADDR) {
+			not_pageable = QSFP_NOT_PAGEABLE;
+		} else {
+			not_pageable = CMIS_NOT_PAGEABLE;
+		}
+		dev_dbg(&client->dev,
+			"Paging Register: 0x%x; not_pageable mask: 0x%x\n",
+			regval, not_pageable);
+
+		if (regval & not_pageable) {
+			/* pages not supported, trim len to unpaged size */
+			if (off >= ONE_ADDR_EEPROM_UNPAGED_SIZE)
+				return OPTOE_EOF;
+			maxlen = ONE_ADDR_EEPROM_UNPAGED_SIZE - off;
+		} else {
+			/* Pages supported, trim len to the end of pages */
+			maxlen = ONE_ADDR_EEPROM_SIZE - off;
+		}
+		len = (len > maxlen) ? maxlen : len;
+		dev_dbg(&client->dev,
+			"page_legal, QSFP, off %lld len %ld\n",
+			off, (long int) len);
+	}
+	return len;
+}
+
+static ssize_t optoe_read_write(struct optoe_data *optoe,
+		char *buf, loff_t off, size_t len, int opcode)
+{
+	struct i2c_client *client = optoe->client[0];
+	int chunk;
+	int status = 0;
+	ssize_t retval;
+	size_t pending_len = 0, chunk_len = 0;
+	loff_t chunk_offset = 0, chunk_start_offset = 0;
+	loff_t chunk_end_offset = 0;
+
+	dev_dbg(&client->dev,
+		"%s: off %lld  len:%ld, opcode:%s\n",
+		__func__, off, (long int) len,
+		(opcode == OPTOE_READ_OP) ? "r" : "w");
+	if (unlikely(!len))
+		return len;
+
+	/*
+	 * Read data from chip, protecting against concurrent updates
+	 * from this host, but not from other I2C masters.
+	 */
+	mutex_lock(&optoe->lock);
+
+	/*
+	 * Confirm this access fits within the device suppored addr range
+	 */
+	status = optoe_page_legal(optoe, off, len);
+	if ((status == OPTOE_EOF) || (status < 0)) {
+		mutex_unlock(&optoe->lock);
+		return status;
+	}
+	len = status;
+
+	/*
+	 * For each (128 byte) chunk involved in this request, issue a
+	 * separate call to sff_eeprom_update_client(), to
+	 * ensure that each access recalculates the client/page
+	 * and writes the page register as needed.
+	 * Note that chunk to page mapping is confusing, is different for
+	 * QSFP and SFP, and never needs to be done.  Don't try!
+	 */
+	pending_len = len; /* amount remaining to transfer */
+	retval = 0;  /* amount transferred */
+	for (chunk = off >> 7; chunk <= (off + len - 1) >> 7; chunk++) {
+
+		/*
+		 * Compute the offset and number of bytes to be read/write
+		 *
+		 * 1. start at an offset not equal to 0 (within the chunk)
+		 *    and read/write less than the rest of the chunk
+		 * 2. start at an offset not equal to 0 and read/write the rest
+		 *    of the chunk
+		 * 3. start at offset 0 (within the chunk) and read/write less
+		 *    than entire chunk
+		 * 4. start at offset 0 (within the chunk), and read/write
+		 *    the entire chunk
+		 */
+		chunk_start_offset = chunk * OPTOE_PAGE_SIZE;
+		chunk_end_offset = chunk_start_offset + OPTOE_PAGE_SIZE;
+
+		if (chunk_start_offset < off) {
+			chunk_offset = off;
+			if ((off + pending_len) < chunk_end_offset)
+				chunk_len = pending_len;
+			else
+				chunk_len = chunk_end_offset - off;
+		} else {
+			chunk_offset = chunk_start_offset;
+			if (pending_len < OPTOE_PAGE_SIZE)
+				chunk_len = pending_len;
+			else
+				chunk_len = OPTOE_PAGE_SIZE;
+		}
+
+		dev_dbg(&client->dev,
+			"sff_r/w: off %lld, len %ld, chunk_start_offset %lld, chunk_offset %lld, chunk_len %ld, pending_len %ld\n",
+			off, (long int) len, chunk_start_offset, chunk_offset,
+			(long int) chunk_len, (long int) pending_len);
+
+		/*
+		 * note: chunk_offset is from the start of the EEPROM,
+		 * not the start of the chunk
+		 */
+		status = optoe_eeprom_update_client(optoe, buf,
+				chunk_offset, chunk_len, opcode);
+		if (status != chunk_len) {
+			/* This is another 'no device present' path */
+			dev_dbg(&client->dev,
+			"o_u_c: chunk %d c_offset %lld c_len %ld failed %d!\n",
+			chunk, chunk_offset, (long int) chunk_len, status);
+			if (status > 0)
+				retval += status;
+			if (retval == 0)
+				retval = status;
+			break;
+		}
+		buf += status;
+		pending_len -= status;
+		retval += status;
+	}
+	mutex_unlock(&optoe->lock);
+
+	return retval;
+}
+
+static ssize_t optoe_bin_read(struct file *filp, struct kobject *kobj,
+		struct bin_attribute *attr,
+		char *buf, loff_t off, size_t count)
+{
+	struct i2c_client *client = to_i2c_client(container_of(kobj,
+				struct device, kobj));
+	struct optoe_data *optoe = i2c_get_clientdata(client);
+
+	return optoe_read_write(optoe, buf, off, count, OPTOE_READ_OP);
+}
+
+static ssize_t optoe_bin_write(struct file *filp, struct kobject *kobj,
+		struct bin_attribute *attr,
+		char *buf, loff_t off, size_t count)
+{
+	struct i2c_client *client = to_i2c_client(container_of(kobj,
+				struct device, kobj));
+	struct optoe_data *optoe = i2c_get_clientdata(client);
+
+	return optoe_read_write(optoe, buf, off, count, OPTOE_WRITE_OP);
+}
+
+static int optoe_remove(struct i2c_client *client)
+{
+	struct optoe_data *optoe;
+	int i;
+
+	optoe = i2c_get_clientdata(client);
+	sysfs_remove_group(&client->dev.kobj, &optoe->attr_group);
+	sysfs_remove_bin_file(&client->dev.kobj, &optoe->bin);
+
+	for (i = 1; i < optoe->num_addresses; i++)
+		i2c_unregister_device(optoe->client[i]);
+
+#ifdef EEPROM_CLASS
+	eeprom_device_unregister(optoe->eeprom_dev);
+#endif
+
+	kfree(optoe->writebuf);
+	kfree(optoe);
+	return 0;
+}
+
+static ssize_t show_dev_class(struct device *dev,
+			struct device_attribute *dattr, char *buf)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct optoe_data *optoe = i2c_get_clientdata(client);
+	ssize_t count;
+
+	mutex_lock(&optoe->lock);
+	count = sprintf(buf, "%d\n", optoe->dev_class);
+	mutex_unlock(&optoe->lock);
+
+	return count;
+}
+
+static ssize_t set_dev_class(struct device *dev,
+			struct device_attribute *attr,
+			const char *buf, size_t count)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct optoe_data *optoe = i2c_get_clientdata(client);
+	int dev_class;
+
+	/*
+	 * dev_class is actually the number of i2c addresses used, thus
+	 * legal values are "1" (QSFP class) and "2" (SFP class)
+	 * And...  CMIS spec is 1 i2c address, but puts the pageable
+	 * bit in a different location, so CMIS devices are "3"
+	 */
+
+	if (kstrtoint(buf, 0, &dev_class) != 0 ||
+		dev_class < 1 || dev_class > 3)
+		return -EINVAL;
+
+	mutex_lock(&optoe->lock);
+	if (dev_class == TWO_ADDR) {
+		/* SFP family */
+		/* if it doesn't exist, create 0x51 i2c address */
+		if (!optoe->client[1]) {
+			optoe->client[1] = i2c_new_dummy_device(client->adapter, 0x51);
+			if (!optoe->client[1]) {
+				dev_err(&client->dev,
+					"address 0x51 unavailable\n");
+				mutex_unlock(&optoe->lock);
+				return -EADDRINUSE;
+			}
+		}
+		optoe->bin.size = TWO_ADDR_EEPROM_SIZE;
+		optoe->num_addresses = 2;
+	} else {
+		/* one-address (eg QSFP) and CMIS family */
+		/* if it exists, remove 0x51 i2c address */
+		if (optoe->client[1]) {
+			i2c_unregister_device(optoe->client[1]);
+			optoe->client[1] = NULL;
+		}
+		optoe->bin.size = ONE_ADDR_EEPROM_SIZE;
+		optoe->num_addresses = 1;
+	}
+	optoe->dev_class = dev_class;
+	mutex_unlock(&optoe->lock);
+
+	return count;
+}
+
+/*
+ * if using the EEPROM CLASS driver, we don't report a port_name,
+ * the EEPROM CLASS drive handles that.  Hence all this code is
+ * only compiled if we are NOT using the EEPROM CLASS driver.
+ */
+#ifndef EEPROM_CLASS
+
+static ssize_t show_port_name(struct device *dev,
+			struct device_attribute *dattr, char *buf)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct optoe_data *optoe = i2c_get_clientdata(client);
+	ssize_t count;
+
+	mutex_lock(&optoe->lock);
+	count = sprintf(buf, "%s\n", optoe->port_name);
+	mutex_unlock(&optoe->lock);
+
+	return count;
+}
+
+static ssize_t set_port_name(struct device *dev,
+			struct device_attribute *attr,
+			const char *buf, size_t count)
+{
+	struct i2c_client *client = to_i2c_client(dev);
+	struct optoe_data *optoe = i2c_get_clientdata(client);
+	char port_name[MAX_PORT_NAME_LEN];
+
+	/* no checking, this value is not used except by show_port_name */
+
+	if (sscanf(buf, "%19s", port_name) != 1)
+		return -EINVAL;
+
+	mutex_lock(&optoe->lock);
+	strcpy(optoe->port_name, port_name);
+	mutex_unlock(&optoe->lock);
+
+	return count;
+}
+
+static DEVICE_ATTR(port_name,  0644, show_port_name, set_port_name);
+#endif  /* if NOT defined EEPROM_CLASS, the common case */
+
+static DEVICE_ATTR(dev_class,  0644, show_dev_class, set_dev_class);
+
+static struct attribute *optoe_attrs[] = {
+#ifndef EEPROM_CLASS
+	&dev_attr_port_name.attr,
+#endif
+	&dev_attr_dev_class.attr,
+	NULL,
+};
+
+static struct attribute_group optoe_attr_group = {
+	.attrs = optoe_attrs,
+};
+
+static int optoe_probe(struct i2c_client *client,
+			const struct i2c_device_id *id)
+{
+	int err;
+	int use_smbus = 0;
+	struct optoe_platform_data chip;
+	struct optoe_data *optoe;
+	int num_addresses = 0;
+	char port_name[MAX_PORT_NAME_LEN];
+
+	if (client->addr != 0x50) {
+		dev_dbg(&client->dev, "probe, bad i2c addr: 0x%x\n",
+				      client->addr);
+		err = -EINVAL;
+		goto exit;
+	}
+
+	if (client->dev.platform_data) {
+		chip = *(struct optoe_platform_data *)client->dev.platform_data;
+		/* take the port name from the supplied platform data */
+#ifdef EEPROM_CLASS
+		strncpy(port_name, chip.eeprom_data->label, MAX_PORT_NAME_LEN);
+#else
+		memcpy(port_name, chip.port_name, MAX_PORT_NAME_LEN);
+#endif
+		dev_dbg(&client->dev,
+			"probe, chip provided, flags:0x%x; name: %s\n",
+			chip.flags, client->name);
+	} else {
+		if (!id->driver_data) {
+			err = -ENODEV;
+			goto exit;
+		}
+		dev_dbg(&client->dev, "probe, building chip\n");
+		strcpy(port_name, "unitialized");
+		chip.flags = 0;
+#ifdef EEPROM_CLASS
+		chip.eeprom_data = NULL;
+#endif
+	}
+
+	/* Use I2C operations unless we're stuck with SMBus extensions. */
+	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
+		if (i2c_check_functionality(client->adapter,
+				I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
+			use_smbus = I2C_SMBUS_I2C_BLOCK_DATA;
+		} else if (i2c_check_functionality(client->adapter,
+				I2C_FUNC_SMBUS_READ_WORD_DATA)) {
+			use_smbus = I2C_SMBUS_WORD_DATA;
+		} else if (i2c_check_functionality(client->adapter,
+				I2C_FUNC_SMBUS_READ_BYTE_DATA)) {
+			use_smbus = I2C_SMBUS_BYTE_DATA;
+		} else {
+			err = -EPFNOSUPPORT;
+			goto exit;
+		}
+	}
+
+	/*
+	 * Make room for two i2c clients
+	 */
+	num_addresses = 2;
+
+	optoe = kzalloc(sizeof(struct optoe_data) +
+			num_addresses * sizeof(struct i2c_client *),
+			GFP_KERNEL);
+	if (!optoe) {
+		err = -ENOMEM;
+		goto exit;
+	}
+
+	mutex_init(&optoe->lock);
+
+	/* determine whether this is a one-address or two-address module */
+	if ((strcmp(client->name, "wb_optoe1") == 0) ||
+	    (strcmp(client->name, "wb_sff8436") == 0)) {
+		/* one-address (eg QSFP) family */
+		optoe->dev_class = ONE_ADDR;
+		chip.byte_len = ONE_ADDR_EEPROM_SIZE;
+		num_addresses = 1;
+	} else if ((strcmp(client->name, "wb_optoe2") == 0) ||
+		   (strcmp(client->name, "wb_24c04") == 0)) {
+		/* SFP family */
+		optoe->dev_class = TWO_ADDR;
+		chip.byte_len = TWO_ADDR_EEPROM_SIZE;
+		num_addresses = 2;
+	} else if (strcmp(client->name, "wb_optoe3") == 0) {
+		/* CMIS spec */
+		optoe->dev_class = CMIS_ADDR;
+		chip.byte_len = ONE_ADDR_EEPROM_SIZE;
+		num_addresses = 1;
+	} else {     /* those were the only choices */
+		err = -EINVAL;
+		goto exit;
+	}
+
+	dev_dbg(&client->dev, "dev_class: %d\n", optoe->dev_class);
+	optoe->use_smbus = use_smbus;
+	optoe->chip = chip;
+	optoe->num_addresses = num_addresses;
+	memcpy(optoe->port_name, port_name, MAX_PORT_NAME_LEN);
+
+	/*
+	 * Export the EEPROM bytes through sysfs, since that's convenient.
+	 * By default, only root should see the data (maybe passwords etc)
+	 */
+	sysfs_bin_attr_init(&optoe->bin);
+	optoe->bin.attr.name = "eeprom";
+	optoe->bin.attr.mode = 0444;
+	optoe->bin.read = optoe_bin_read;
+	optoe->bin.size = chip.byte_len;
+
+	if (!use_smbus ||
+			(i2c_check_functionality(client->adapter,
+				I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) ||
+			i2c_check_functionality(client->adapter,
+				I2C_FUNC_SMBUS_WRITE_WORD_DATA) ||
+			i2c_check_functionality(client->adapter,
+				I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) {
+		/*
+		 * NOTE: AN-2079
+		 * Finisar recommends that the host implement 1 byte writes
+		 * only since this module only supports 32 byte page boundaries.
+		 * 2 byte writes are acceptable for PE and Vout changes per
+		 * Application Note AN-2071.
+		 */
+		unsigned int write_max = 1;
+
+		optoe->bin.write = optoe_bin_write;
+		optoe->bin.attr.mode |= 0200;
+
+		if (write_max > io_limit)
+			write_max = io_limit;
+		if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX)
+			write_max = I2C_SMBUS_BLOCK_MAX;
+		optoe->write_max = write_max;
+
+		/* buffer (data + address at the beginning) */
+		optoe->writebuf = kmalloc(write_max + 2, GFP_KERNEL);
+		if (!optoe->writebuf) {
+			err = -ENOMEM;
+			goto exit_kfree;
+		}
+	} else {
+		dev_warn(&client->dev,
+			"cannot write due to controller restrictions.");
+	}
+
+	optoe->client[0] = client;
+
+	/* SFF-8472 spec requires that the second I2C address be 0x51 */
+	if (num_addresses == 2) {
+		optoe->client[1] = i2c_new_dummy_device(client->adapter, 0x51);
+		if (!optoe->client[1]) {
+			dev_err(&client->dev, "address 0x51 unavailable\n");
+			err = -EADDRINUSE;
+			goto err_struct;
+		}
+	}
+
+	/* create the sysfs eeprom file */
+	err = sysfs_create_bin_file(&client->dev.kobj, &optoe->bin);
+	if (err)
+		goto err_struct;
+
+	optoe->attr_group = optoe_attr_group;
+
+	err = sysfs_create_group(&client->dev.kobj, &optoe->attr_group);
+	if (err) {
+		dev_err(&client->dev, "failed to create sysfs attribute group.\n");
+		goto err_struct;
+	}
+
+#ifdef EEPROM_CLASS
+	optoe->eeprom_dev = eeprom_device_register(&client->dev,
+							chip.eeprom_data);
+	if (IS_ERR(optoe->eeprom_dev)) {
+		dev_err(&client->dev, "error registering eeprom device.\n");
+		err = PTR_ERR(optoe->eeprom_dev);
+		goto err_sysfs_cleanup;
+	}
+#endif
+
+	i2c_set_clientdata(client, optoe);
+
+	dev_info(&client->dev, "%zu byte %s EEPROM, %s\n",
+		optoe->bin.size, client->name,
+		optoe->bin.write ? "read/write" : "read-only");
+
+	if (use_smbus == I2C_SMBUS_WORD_DATA ||
+	    use_smbus == I2C_SMBUS_BYTE_DATA) {
+		dev_notice(&client->dev,
+			"Falling back to %s reads, performance will suffer\n",
+			use_smbus == I2C_SMBUS_WORD_DATA ? "word" : "byte");
+	}
+
+	return 0;
+
+#ifdef EEPROM_CLASS
+err_sysfs_cleanup:
+	sysfs_remove_group(&client->dev.kobj, &optoe->attr_group);
+	sysfs_remove_bin_file(&client->dev.kobj, &optoe->bin);
+#endif
+
+err_struct:
+	if (num_addresses == 2) {
+		if (optoe->client[1]) {
+			i2c_unregister_device(optoe->client[1]);
+			optoe->client[1] = NULL;
+		}
+	}
+
+	kfree(optoe->writebuf);
+exit_kfree:
+	kfree(optoe);
+exit:
+	dev_dbg(&client->dev, "probe error %d\n", err);
+
+	return err;
+}
+
+/*-------------------------------------------------------------------------*/
+
+static struct i2c_driver optoe_driver = {
+	.driver = {
+		.name = "wb_optoe",
+		.owner = THIS_MODULE,
+	},
+	.probe = optoe_probe,
+	.remove = optoe_remove,
+	.id_table = optoe_ids,
+};
+
+static int __init optoe_init(void)
+{
+
+	if (!io_limit) {
+		pr_err("optoe: io_limit must not be 0!\n");
+		return -EINVAL;
+	}
+
+	io_limit = rounddown_pow_of_two(io_limit);
+	return i2c_add_driver(&optoe_driver);
+}
+module_init(optoe_init);
+
+static void __exit optoe_exit(void)
+{
+	i2c_del_driver(&optoe_driver);
+}
+module_exit(optoe_exit);
+
+MODULE_DESCRIPTION("Driver for optical transceiver (SFP, QSFP, ...) EEPROMs");
+MODULE_AUTHOR("support");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c
new file mode 100644
index 000000000000..757c100e4738
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c
@@ -0,0 +1,770 @@
+/*
+ * wb_pcie_dev.c
+ * ko to read/write pcie iomem and ioports through /dev/XXX device
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/miscdevice.h>
+#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <linux/pci.h>
+#include <linux/io.h>
+#include <linux/ioport.h>
+#include <linux/uio.h>
+
+#include "wb_pcie_dev.h"
+
+#define PROXY_NAME "wb-pci-dev"
+#define MAX_NAME_SIZE            (20)
+#define MAX_PCIE_NUM             (256)
+#define PCI_RDWR_MAX_LEN         (256)
+#define PCIE_BUS_WIDTH_1         (1)
+#define PCIE_BUS_WIDTH_2         (2)
+#define PCIE_BUS_WIDTH_4         (4)
+
+static int g_pcie_dev_debug = 0;
+static int g_pcie_dev_error = 0;
+
+module_param(g_pcie_dev_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_pcie_dev_error, int, S_IRUGO | S_IWUSR);
+
+#define PCIE_DEV_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_pcie_dev_debug) { \
+        printk(KERN_INFO "[PCIE_DEV][VER][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define PCIE_DEV_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_pcie_dev_error) { \
+        printk(KERN_ERR "[PCIE_DEV][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+typedef struct firmware_upg_s {
+    int upg_ctrl_base;
+    int upg_flash_base;
+} firmware_upg_t;
+
+typedef struct wb_pci_dev_s {
+    const char *name;
+    uint32_t domain;
+    uint32_t bus;
+    uint32_t slot;
+    uint32_t fn;
+    uint32_t bar;
+    void __iomem *pci_mem_base;
+    uint32_t pci_io_base;
+    uint32_t bar_len;
+    uint32_t bar_flag;
+    uint32_t bus_width;
+    struct miscdevice misc;
+    void (*setreg)(struct wb_pci_dev_s *wb_pci_dev, int reg, u32 value);
+    u32 (*getreg)(struct wb_pci_dev_s *wb_pci_dev, int reg);
+    firmware_upg_t firmware_upg;
+} wb_pci_dev_t;
+
+static wb_pci_dev_t* pcie_dev_arry[MAX_PCIE_NUM];
+
+static void pci_dev_setreg_8(wb_pci_dev_t *wb_pci_dev, int reg, u32 value)
+{
+    u8 w_value;
+
+    w_value = (u8)(value & 0xff);
+    if (wb_pci_dev->bar_flag == IORESOURCE_MEM) {
+        writeb(w_value, wb_pci_dev->pci_mem_base + reg);
+    } else {
+        outb(w_value, wb_pci_dev->pci_io_base + reg);
+    }
+    return;
+}
+
+static void pci_dev_setreg_16(wb_pci_dev_t *wb_pci_dev, int reg, u32 value)
+{
+    u16 w_value;
+
+    w_value = (u16)(value & 0xffff);
+    if (wb_pci_dev->bar_flag == IORESOURCE_MEM) {
+        writew(w_value, wb_pci_dev->pci_mem_base + reg);
+    } else {
+        outw(w_value, wb_pci_dev->pci_io_base + reg);
+    }
+
+    return;
+}
+
+static void pci_dev_setreg_32(wb_pci_dev_t *wb_pci_dev, int reg, u32 value)
+{
+
+    if (wb_pci_dev->bar_flag == IORESOURCE_MEM) {
+        writel(value, wb_pci_dev->pci_mem_base + reg);
+    } else {
+        outl(value, wb_pci_dev->pci_io_base + reg);
+    }
+    return;
+}
+
+static inline u32 pci_dev_getreg_8(wb_pci_dev_t *wb_pci_dev, int reg)
+{
+    u32 value;
+
+    if (wb_pci_dev->bar_flag == IORESOURCE_MEM) {
+        value = readb(wb_pci_dev->pci_mem_base + reg);
+    } else {
+        value = inb(wb_pci_dev->pci_io_base + reg);
+    }
+
+    return value;
+}
+
+static inline u32 pci_dev_getreg_16(wb_pci_dev_t *wb_pci_dev, int reg)
+{
+    u32 value;
+
+    if (wb_pci_dev->bar_flag == IORESOURCE_MEM) {
+        value = readw(wb_pci_dev->pci_mem_base + reg);
+    } else {
+        value = inw(wb_pci_dev->pci_io_base + reg);
+    }
+
+    return value;
+}
+
+static inline u32 pci_dev_getreg_32(wb_pci_dev_t *wb_pci_dev, int reg)
+{
+    u32 value;
+
+    if (wb_pci_dev->bar_flag == IORESOURCE_MEM) {
+        value = readl(wb_pci_dev->pci_mem_base + reg);
+    } else {
+        value = inl(wb_pci_dev->pci_io_base + reg);
+    }
+
+    return value;
+}
+
+static inline void pci_dev_setreg(wb_pci_dev_t *wb_pci_dev, int reg, u32 value)
+{
+    wb_pci_dev->setreg(wb_pci_dev, reg, value);
+}
+
+static inline u32 pci_dev_getreg(wb_pci_dev_t *wb_pci_dev, int reg)
+{
+    return wb_pci_dev->getreg(wb_pci_dev, reg);
+}
+
+static int pci_dev_open(struct inode *inode, struct file *file)
+{
+    unsigned int minor = iminor(inode);
+    wb_pci_dev_t *wb_pci_dev;
+
+    PCIE_DEV_DEBUG_VERBOSE("inode: %p, file: %p, minor: %u", inode, file, minor);
+
+    if (minor >= MAX_PCIE_NUM) {
+        PCIE_DEV_DEBUG_ERROR("minor out of range, minor = %d.\n", minor);
+        return -ENODEV;
+    }
+
+    wb_pci_dev = pcie_dev_arry[minor];
+    if (wb_pci_dev == NULL) {
+        PCIE_DEV_DEBUG_ERROR("wb_pci_dev is NULL, open failed, minor = %d\n", minor);
+        return -ENODEV;
+    }
+
+    file->private_data = wb_pci_dev;
+    return 0;
+}
+
+static int pci_dev_release(struct inode *inode, struct file *file)
+{
+    file->private_data = NULL;
+    return 0;
+}
+
+static int pci_dev_read_tmp(wb_pci_dev_t *wb_pci_dev, uint32_t offset, uint8_t *buf, size_t count)
+{
+    int width, i, j;
+    u32 val;
+
+    if (offset > wb_pci_dev->bar_len) {
+        PCIE_DEV_DEBUG_VERBOSE("offset:0x%x, bar len:0x%x, EOF.\n", offset, wb_pci_dev->bar_len);
+        return 0;
+    }
+
+    width = wb_pci_dev->bus_width;
+
+    if (offset % width) {
+        PCIE_DEV_DEBUG_ERROR("pci bus width:%d, offset:0x%x, read size %lu invalid.\n",
+            width, offset, count);
+        return -EINVAL;
+    }
+
+    if (count > wb_pci_dev->bar_len - offset) {
+        PCIE_DEV_DEBUG_VERBOSE("read count out of range. input len:%lu, read len:%u.\n",
+            count, wb_pci_dev->bar_len - offset);
+        count = wb_pci_dev->bar_len - offset;
+    }
+
+    for (i = 0; i < count; i += width) {
+        val = pci_dev_getreg(wb_pci_dev, offset + i);
+        for (j = 0; (j < width) && (i + j < count); j++) {
+            buf[i + j] = (val >> (8 * j)) & 0xff;
+        }
+    }
+    return count;
+}
+
+static ssize_t pci_dev_read(struct file *file, char __user *buf, size_t count, loff_t *offset)
+{
+    wb_pci_dev_t *wb_pci_dev;
+    int ret, read_len;
+    u8 buf_tmp[PCI_RDWR_MAX_LEN];
+
+    wb_pci_dev = file->private_data;
+    if (wb_pci_dev == NULL) {
+        PCIE_DEV_DEBUG_ERROR("wb_pci_dev is NULL, read failed.\n");
+        return -EINVAL;
+    }
+
+    if (count == 0) {
+        PCIE_DEV_DEBUG_ERROR("Invalid params, read count is 0.\n");
+        return -EINVAL;
+    }
+
+    if (count > sizeof(buf_tmp)) {
+        PCIE_DEV_DEBUG_VERBOSE("read count %lu exceed max %lu.\n", count, sizeof(buf_tmp));
+        count = sizeof(buf_tmp);
+    }
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    read_len = pci_dev_read_tmp(wb_pci_dev, *offset, buf_tmp, count);
+    if (read_len < 0) {
+        PCIE_DEV_DEBUG_ERROR("pci_dev_read_tmp failed, ret:%d.\n", read_len);
+        return read_len;
+    }
+    if (access_ok(buf, read_len)) {
+        PCIE_DEV_DEBUG_VERBOSE("user space read, buf: %p, offset: %lld, read count %lu.\n",
+            buf, *offset, count);
+        if (copy_to_user(buf, buf_tmp, read_len)) {
+            PCIE_DEV_DEBUG_ERROR("copy_to_user failed.\n");
+            return -EFAULT;
+        }
+    } else {
+        PCIE_DEV_DEBUG_VERBOSE("kernel space read, buf: %p, offset: %lld, read count %lu.\n",
+            buf, *offset, count);
+        memcpy(buf, buf_tmp, read_len);
+    }
+    *offset += read_len;
+    ret = read_len;
+    return ret;
+}
+
+static ssize_t pci_dev_read_iter(struct kiocb *iocb, struct iov_iter *to)
+{
+    int ret;
+
+    PCIE_DEV_DEBUG_VERBOSE("pci_dev_read_iter, file: %p, count: %lu, offset: %lld\n",
+        iocb->ki_filp, to->count, iocb->ki_pos);
+    ret = pci_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos);
+    return ret;
+}
+
+static int pci_dev_write_tmp(wb_pci_dev_t *wb_pci_dev, uint32_t offset, uint8_t *buf, size_t count)
+{
+    int width, i, j;
+    u32 val;
+
+    if (offset > wb_pci_dev->bar_len) {
+        PCIE_DEV_DEBUG_VERBOSE("offset:0x%x, bar len:0x%x, EOF.\n", offset, wb_pci_dev->bar_len);
+        return 0;
+    }
+
+    width = wb_pci_dev->bus_width;
+
+    if (offset % width) {
+        PCIE_DEV_DEBUG_ERROR("pci bus width:%d, offset:0x%x, read size %lu invalid.\n",
+            width, offset, count);
+        return -EINVAL;
+    }
+
+    if (count > wb_pci_dev->bar_len - offset) {
+        PCIE_DEV_DEBUG_VERBOSE("write count out of range. input len:%lu, write len:%u.\n",
+            count, wb_pci_dev->bar_len - offset);
+        count = wb_pci_dev->bar_len - offset;
+    }
+
+    for (i = 0; i < count; i += width) {
+        val = 0;
+        for (j = 0; (j < width) && (i + j < count); j++) {
+            val |= buf[i + j] << (8 * j);
+        }
+        pci_dev_setreg(wb_pci_dev, i + offset, val);
+    }
+
+    return count;
+}
+
+static ssize_t pci_dev_write(struct file *file, const char __user *buf, size_t count,
+                   loff_t *offset)
+{
+    wb_pci_dev_t *wb_pci_dev;
+    u8 buf_tmp[PCI_RDWR_MAX_LEN];
+    int write_len;
+
+    wb_pci_dev = file->private_data;
+    if (wb_pci_dev == NULL) {
+        PCIE_DEV_DEBUG_ERROR("wb_pci_dev is NULL, write failed.\n");
+        return -EINVAL;
+    }
+
+    if (count == 0) {
+        PCIE_DEV_DEBUG_ERROR("Invalid params, write count is 0.\n");
+        return -EINVAL;
+    }
+
+    if (count > sizeof(buf_tmp)) {
+        PCIE_DEV_DEBUG_VERBOSE("write count %lu exceed max %lu.\n", count, sizeof(buf_tmp));
+        count = sizeof(buf_tmp);
+    }
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    if (access_ok(buf, count)) {
+        PCIE_DEV_DEBUG_VERBOSE("user space write, buf: %p, offset: %lld, write count %lu.\n",
+            buf, *offset, count);
+        if (copy_from_user(buf_tmp, buf, count)) {
+            PCIE_DEV_DEBUG_ERROR("copy_from_user failed.\n");
+            return -EFAULT;
+        }
+    } else {
+        PCIE_DEV_DEBUG_VERBOSE("kernel space write, buf: %p, offset: %lld, write count %lu.\n",
+            buf, *offset, count);
+        memcpy(buf_tmp, buf, count);
+    }
+
+    write_len = pci_dev_write_tmp(wb_pci_dev, *offset, buf_tmp, count);
+    if (write_len < 0) {
+        PCIE_DEV_DEBUG_ERROR("pci_dev_write_tmp failed, ret:%d.\n", write_len);
+        return write_len;
+    }
+
+    *offset += write_len;
+    return write_len;
+}
+
+static ssize_t pci_dev_write_iter(struct kiocb *iocb, struct iov_iter *from)
+{
+    int ret;
+
+    PCIE_DEV_DEBUG_VERBOSE("pci_dev_write_iter, file: %p, count: %lu, offset: %lld\n",
+        iocb->ki_filp, from->count, iocb->ki_pos);
+    ret = pci_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos);
+    return ret;
+}
+
+static loff_t pci_dev_llseek(struct file *file, loff_t offset, int origin)
+{
+    loff_t ret = 0;
+    wb_pci_dev_t *wb_pci_dev;
+
+    wb_pci_dev = file->private_data;
+    if (wb_pci_dev == NULL) {
+        PCIE_DEV_DEBUG_ERROR("wb_pci_dev is NULL, llseek failed.\n");
+        return -EINVAL;
+    }
+
+    switch (origin) {
+    case SEEK_SET:
+        if (offset < 0) {
+            PCIE_DEV_DEBUG_ERROR("SEEK_SET, offset:%lld, invalid.\n", offset);
+            ret = -EINVAL;
+            break;
+        }
+        if (offset > wb_pci_dev->bar_len) {
+            PCIE_DEV_DEBUG_ERROR("SEEK_SET out of range, offset:%lld, bar len:0x%x.\n",
+                offset, wb_pci_dev->bar_len);
+            ret = - EINVAL;
+            break;
+        }
+        file->f_pos = offset;
+        ret = file->f_pos;
+        break;
+    case SEEK_CUR:
+        if (((file->f_pos + offset) > wb_pci_dev->bar_len) || ((file->f_pos + offset) < 0)) {
+            PCIE_DEV_DEBUG_ERROR("SEEK_CUR out of range, f_ops:%lld, offset:%lld, bar len:0x%x.\n",
+                file->f_pos, offset, wb_pci_dev->bar_len);
+            ret = - EINVAL;
+            break;
+        }
+        file->f_pos += offset;
+        ret = file->f_pos;
+        break;
+    default:
+        PCIE_DEV_DEBUG_ERROR("unsupport llseek type:%d.\n", origin);
+        ret = -EINVAL;
+        break;
+    }
+    return ret;
+}
+
+static long pci_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+    wb_pci_dev_t *wb_pci_dev;
+    void __user *argp;
+    firmware_upg_t *firmware_upg;
+    int upg_ctrl_base;
+    int upg_flash_base;
+
+    PCIE_DEV_DEBUG_VERBOSE("ioctl, cmd=0x%02x, arg=0x%02lx\n",cmd, arg);
+
+    wb_pci_dev = file->private_data;
+    if (wb_pci_dev == NULL) {
+        PCIE_DEV_DEBUG_ERROR("wb_pci_dev is NULL, ioctl failed.\n");
+        return -EINVAL;
+    }
+
+    firmware_upg = &wb_pci_dev->firmware_upg;
+
+    argp = (void __user *)arg;
+
+    switch (cmd) {
+    case GET_FPGA_UPG_CTL_BASE:
+        if (firmware_upg->upg_ctrl_base < 0) {
+            PCIE_DEV_DEBUG_ERROR("dts not adaptive upg_ctrl_base\n");
+            return -EFAULT;
+        } else {
+            upg_ctrl_base = firmware_upg->upg_ctrl_base;
+            if (copy_to_user(argp, &upg_ctrl_base, sizeof(upg_ctrl_base))) {
+                PCIE_DEV_DEBUG_ERROR("upg_ctrl_base copy_from_user failed\n");
+                return -EFAULT;
+            }
+        }
+        break;
+    case GET_FPGA_UPG_FLASH_BASE:
+        if (firmware_upg->upg_flash_base < 0) {
+            PCIE_DEV_DEBUG_ERROR("dts not adaptive upg_flash_base\n");
+            return -EFAULT;
+        } else {
+            upg_flash_base = firmware_upg->upg_flash_base;
+            if (copy_to_user(argp, &upg_flash_base, sizeof(upg_flash_base))) {
+                PCIE_DEV_DEBUG_ERROR("upg_flash_base copy_from_user failed\n");
+                return -EFAULT;
+            }
+        }
+        break;
+    default:
+        PCIE_DEV_DEBUG_ERROR("command unsupported \n");
+        return -ENOTTY;
+    }
+
+    return 0;
+}
+
+static const struct file_operations pcie_dev_fops = {
+    .owner      = THIS_MODULE,
+    .llseek     = pci_dev_llseek,
+    .read_iter  = pci_dev_read_iter,
+    .write_iter = pci_dev_write_iter,
+    .unlocked_ioctl = pci_dev_ioctl,
+    .open       = pci_dev_open,
+    .release    = pci_dev_release,
+};
+
+static wb_pci_dev_t *dev_match(const char *path)
+{
+    wb_pci_dev_t *wb_pci_dev;
+    char dev_name[MAX_NAME_SIZE];
+    int i;
+
+    for (i = 0; i < MAX_PCIE_NUM; i++) {
+        if (pcie_dev_arry[i] == NULL) {
+            continue;
+        }
+        wb_pci_dev = pcie_dev_arry[i];
+        snprintf(dev_name, MAX_NAME_SIZE,"/dev/%s", wb_pci_dev->name);
+        if (!strcmp(path, dev_name)) {
+            PCIE_DEV_DEBUG_VERBOSE("get dev_name = %s, minor = %d\n", dev_name, i);
+            return wb_pci_dev;
+        }
+    }
+
+    return NULL;
+}
+
+int pcie_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    wb_pci_dev_t *wb_pci_dev;
+    int read_len;
+
+    if (path == NULL) {
+        PCIE_DEV_DEBUG_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if (buf == NULL) {
+        PCIE_DEV_DEBUG_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    wb_pci_dev = dev_match(path);
+    if (wb_pci_dev == NULL) {
+        PCIE_DEV_DEBUG_ERROR("i2c_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    read_len = pci_dev_read_tmp(wb_pci_dev, offset, buf, count);
+    if (read_len < 0) {
+        PCIE_DEV_DEBUG_ERROR("pci_dev_read_tmp failed, ret:%d.\n", read_len);
+    }
+    return read_len;
+}
+EXPORT_SYMBOL(pcie_device_func_read);
+
+int pcie_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    wb_pci_dev_t *wb_pci_dev;
+    int write_len;
+
+    if (path == NULL) {
+        PCIE_DEV_DEBUG_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if (buf == NULL) {
+        PCIE_DEV_DEBUG_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    wb_pci_dev = dev_match(path);
+    if (wb_pci_dev == NULL) {
+        PCIE_DEV_DEBUG_ERROR("i2c_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    write_len = pci_dev_write_tmp(wb_pci_dev, offset, buf, count);
+    if (write_len < 0) {
+        PCIE_DEV_DEBUG_ERROR("pci_dev_write_tmp failed, ret:%d.\n", write_len);
+    }
+    return write_len;
+}
+EXPORT_SYMBOL(pcie_device_func_write);
+
+static int pci_setup_bars(wb_pci_dev_t *wb_pci_dev, struct pci_dev *dev)
+{
+    int ret;
+    uint32_t addr, len, flags;
+
+    ret = 0;
+    addr = pci_resource_start(dev, wb_pci_dev->bar);
+    len = pci_resource_len(dev, wb_pci_dev->bar);
+    if (addr == 0 || len == 0) {
+        PCIE_DEV_DEBUG_ERROR("get bar addr failed. bar:%d, addr:0x%x, len:0x%x.\n",
+            wb_pci_dev->bar, addr, len);
+        return -EFAULT;
+    }
+    wb_pci_dev->bar_len = len;
+
+    flags = pci_resource_flags(dev, wb_pci_dev->bar);
+    PCIE_DEV_DEBUG_VERBOSE("bar:%d, flag:0x%08x, phys addr:0x%x, len:0x%x\n",
+        wb_pci_dev->bar, flags, addr, len);
+    if (flags & IORESOURCE_MEM) {
+        wb_pci_dev->bar_flag = IORESOURCE_MEM;
+        wb_pci_dev->pci_mem_base = ioremap(addr, len);
+        PCIE_DEV_DEBUG_VERBOSE("pci mem base:%p.\n", wb_pci_dev->pci_mem_base);
+    } else if (flags & IORESOURCE_IO) {
+        wb_pci_dev->bar_flag = IORESOURCE_IO;
+        wb_pci_dev->pci_io_base = addr;
+        PCIE_DEV_DEBUG_VERBOSE("pci io base:0x%x.\n", wb_pci_dev->pci_io_base);
+    } else {
+        PCIE_DEV_DEBUG_ERROR("unknow pci bar flag:0x%08x.\n", flags);
+        ret = -EINVAL;
+    }
+
+    return ret;
+}
+
+static int pci_dev_probe(struct platform_device *pdev)
+{
+    int ret, devfn;
+    wb_pci_dev_t *wb_pci_dev;
+    struct pci_dev *pci_dev;
+    struct miscdevice *misc;
+    firmware_upg_t *firmware_upg;
+    pci_dev_device_t *pci_dev_device;
+
+    wb_pci_dev = devm_kzalloc(&pdev->dev, sizeof(wb_pci_dev_t), GFP_KERNEL);
+    if (!wb_pci_dev) {
+        dev_err(&pdev->dev, "devm_kzalloc failed.\n");
+        ret = -ENOMEM;
+        return ret;
+    }
+
+    firmware_upg = &wb_pci_dev->firmware_upg;
+
+    if (pdev->dev.of_node) {
+        ret = 0;
+        ret += of_property_read_string(pdev->dev.of_node, "pci_dev_name", &wb_pci_dev->name);
+        ret += of_property_read_u32(pdev->dev.of_node, "pci_domain", &wb_pci_dev->domain);
+        ret += of_property_read_u32(pdev->dev.of_node, "pci_bus", &wb_pci_dev->bus);
+        ret += of_property_read_u32(pdev->dev.of_node, "pci_slot", &wb_pci_dev->slot);
+        ret += of_property_read_u32(pdev->dev.of_node, "pci_fn", &wb_pci_dev->fn);
+        ret += of_property_read_u32(pdev->dev.of_node, "pci_bar", &wb_pci_dev->bar);
+        ret += of_property_read_u32(pdev->dev.of_node, "bus_width", &wb_pci_dev->bus_width);
+
+        if (ret != 0) {
+            dev_err(&pdev->dev, "Failed to get dts config, ret:%d.\n", ret);
+            return -ENXIO;
+        }
+
+        ret = 0;
+        ret += of_property_read_u32(pdev->dev.of_node, "upg_ctrl_base", &firmware_upg->upg_ctrl_base);
+        ret += of_property_read_u32(pdev->dev.of_node, "upg_flash_base", &firmware_upg->upg_flash_base);
+        if (ret != 0) {
+            PCIE_DEV_DEBUG_VERBOSE("dts don't adaptive fpga upg related, ret:%d.\n", ret);
+            firmware_upg->upg_ctrl_base  = -1;
+            firmware_upg->upg_flash_base = -1;
+        } else {
+            PCIE_DEV_DEBUG_VERBOSE("upg_ctrl_base:0x%04x, upg_flash_base:0x%02x.\n",
+                firmware_upg->upg_ctrl_base, firmware_upg->upg_flash_base);
+        }
+    } else {
+        if (pdev->dev.platform_data == NULL) {
+            dev_err(&pdev->dev, "Failed to get platform data config.\n");
+            return -ENXIO;
+        }
+        pci_dev_device = pdev->dev.platform_data;
+        wb_pci_dev->name = pci_dev_device->pci_dev_name;
+        wb_pci_dev->domain = pci_dev_device->pci_domain;
+        wb_pci_dev->bus = pci_dev_device->pci_bus;
+        wb_pci_dev->slot = pci_dev_device->pci_slot;
+        wb_pci_dev->fn = pci_dev_device->pci_fn;
+        wb_pci_dev->bar = pci_dev_device->pci_bar;
+        wb_pci_dev->bus_width = pci_dev_device->bus_width;
+        firmware_upg->upg_ctrl_base = pci_dev_device->upg_ctrl_base;
+        firmware_upg->upg_flash_base = pci_dev_device->upg_flash_base;
+        PCIE_DEV_DEBUG_VERBOSE("upg_ctrl_base:0x%04x, upg_flash_base:0x%02x.\n",
+            firmware_upg->upg_ctrl_base, firmware_upg->upg_flash_base);
+    }
+
+    PCIE_DEV_DEBUG_VERBOSE("name:%s, domain:0x%04x, bus:0x%02x, slot:0x%02x, fn:%u, bar:%u, bus_width:%d.\n",
+        wb_pci_dev->name, wb_pci_dev->domain, wb_pci_dev->bus, wb_pci_dev->slot, wb_pci_dev->fn,
+        wb_pci_dev->bar, wb_pci_dev->bus_width);
+
+    devfn = PCI_DEVFN(wb_pci_dev->slot, wb_pci_dev->fn);
+    pci_dev = pci_get_domain_bus_and_slot(wb_pci_dev->domain, wb_pci_dev->bus, devfn);
+    if (pci_dev == NULL) {
+        dev_err(&pdev->dev, "Failed to find pci_dev, domain:0x%04x, bus:0x%02x, devfn:0x%x\n",
+            wb_pci_dev->domain, wb_pci_dev->bus, devfn);
+        return -ENXIO;
+    }
+    ret = pci_setup_bars(wb_pci_dev, pci_dev);
+    if (ret != 0) {
+        dev_err(&pdev->dev, "Failed to get pci bar address.\n");
+        return ret;
+    }
+
+    if (!wb_pci_dev->setreg || !wb_pci_dev->getreg) {
+        switch (wb_pci_dev->bus_width) {
+        case 1:
+            wb_pci_dev->setreg = pci_dev_setreg_8;
+            wb_pci_dev->getreg = pci_dev_getreg_8;
+            break;
+
+        case 2:
+            wb_pci_dev->setreg = pci_dev_setreg_16;
+            wb_pci_dev->getreg = pci_dev_getreg_16;
+            break;
+
+        case 4:
+            wb_pci_dev->setreg = pci_dev_setreg_32;
+            wb_pci_dev->getreg = pci_dev_getreg_32;
+            break;
+        default:
+            dev_err(&pdev->dev, "Error: unsupported I/O width (%d).\n", wb_pci_dev->bus_width);
+            ret = -EINVAL;
+            goto io_unmap;
+        }
+    }
+
+    misc = &wb_pci_dev->misc;
+    misc->minor = MISC_DYNAMIC_MINOR;
+    misc->name = wb_pci_dev->name;
+    misc->fops = &pcie_dev_fops;
+    misc->mode = 0666;
+    if (misc_register(misc) != 0) {
+        dev_err(&pdev->dev, "Failed to register %s device.\n", misc->name);
+        ret = -ENXIO;
+        goto io_unmap;
+    }
+    if (misc->minor >= MAX_PCIE_NUM) {
+        dev_err(&pdev->dev, "Error: device minor[%d] more than max pcie num[%d].\n",
+            misc->minor, MAX_PCIE_NUM);
+        misc_deregister(misc);
+        ret = -EINVAL;
+        goto io_unmap;
+    }
+    pcie_dev_arry[misc->minor] = wb_pci_dev;
+    dev_info(&pdev->dev, "%04x:%02x:%02x.%d[bar%d: %s]: register %s device with minor:%d success.\n",
+        wb_pci_dev->domain, wb_pci_dev->bus, wb_pci_dev->slot, wb_pci_dev->fn, wb_pci_dev->bar,
+        wb_pci_dev->bar_flag == IORESOURCE_MEM ? "IORESOURCE_MEM" : "IORESOURCE_IO",
+        misc->name, misc->minor );
+    return 0;
+
+io_unmap:
+    if (wb_pci_dev->pci_mem_base) {
+        iounmap(wb_pci_dev->pci_mem_base);
+    }
+    return ret;
+}
+
+static int pci_dev_remove(struct platform_device *pdev)
+{
+    int i;
+
+    for (i = 0; i < MAX_PCIE_NUM ; i++) {
+        if (pcie_dev_arry[i] != NULL) {
+            if (pcie_dev_arry[i]->pci_mem_base) {
+                iounmap(pcie_dev_arry[i]->pci_mem_base);
+            }
+            misc_deregister(&pcie_dev_arry[i]->misc);
+            pcie_dev_arry[i] = NULL;
+        }
+    }
+
+    return 0;
+}
+
+static struct of_device_id pci_dev_match[] = {
+    {
+        .compatible = "wb-pci-dev",
+    },
+    {},
+};
+MODULE_DEVICE_TABLE(of, pci_dev_match);
+
+static struct platform_driver wb_pci_dev_driver = {
+    .probe      = pci_dev_probe,
+    .remove     = pci_dev_remove,
+    .driver     = {
+        .owner  = THIS_MODULE,
+        .name   = PROXY_NAME,
+        .of_match_table = pci_dev_match,
+    },
+};
+
+static int __init wb_pci_dev_init(void)
+{
+    return platform_driver_register(&wb_pci_dev_driver);
+}
+
+static void __exit wb_pci_dev_exit(void)
+{
+    platform_driver_unregister(&wb_pci_dev_driver);
+}
+
+module_init(wb_pci_dev_init);
+module_exit(wb_pci_dev_exit);
+MODULE_DESCRIPTION("pcie device driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.h
new file mode 100644
index 000000000000..9ba0f3b457ea
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.h
@@ -0,0 +1,26 @@
+#ifndef __WB_PCIE_DEV_H__
+#define __WB_PCIE_DEV_H__
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+#define UPG_TYPE 'U'
+#define GET_FPGA_UPG_CTL_BASE              _IOR(UPG_TYPE, 0, int)
+#define GET_FPGA_UPG_FLASH_BASE            _IOR(UPG_TYPE, 1, int)
+
+#define PCI_DEV_NAME_MAX_LEN (64)
+
+typedef struct pci_dev_device_s {
+    char pci_dev_name[PCI_DEV_NAME_MAX_LEN];
+    int pci_domain;
+    int pci_bus;
+    int pci_slot;
+    int pci_fn;
+    int pci_bar;
+    int bus_width;
+    int upg_ctrl_base;
+    int upg_flash_base;
+    int device_flag;
+} pci_dev_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.c
new file mode 100644
index 000000000000..3fe1c4aa10f5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.c
@@ -0,0 +1,749 @@
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/miscdevice.h>
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <linux/fs.h>
+#include <linux/export.h>
+
+#include "wb_platform_i2c_dev.h"
+
+#define PROXY_NAME "wb-platform-i2c-dev"
+#define MAX_I2C_DEV_NUM      (256)
+#define FPGA_MAX_LEN         (256)
+#define MAX_NAME_SIZE        (20)
+#define MAX_BUS_WIDTH        (16)
+#define TRANSFER_WRITE_BUFF  (FPGA_MAX_LEN + MAX_BUS_WIDTH)
+
+#define WIDTH_1Byte          (1)
+#define WIDTH_2Byte          (2)
+#define WIDTH_4Byte          (4)
+
+int g_i2c_dev_debug = 0;
+int g_i2c_dev_error = 0;
+
+module_param(g_i2c_dev_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_i2c_dev_error, int, S_IRUGO | S_IWUSR);
+
+#define I2C_DEV_DEBUG_DMESG(fmt, args...) do {                                        \
+    if (g_i2c_dev_debug) { \
+        printk(KERN_ERR "[I2C_DEV][DEBUG][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define I2C_DEV_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_i2c_dev_error) { \
+        printk(KERN_ERR "[I2C_DEV][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static struct platform_i2c_dev_info* i2c_dev_arry[MAX_I2C_DEV_NUM];
+
+struct platform_i2c_dev_info {
+    uint32_t i2c_bus;
+    uint32_t i2c_addr;
+    const char *name;
+    uint32_t data_bus_width;
+    uint32_t addr_bus_width;
+    uint32_t per_rd_len;
+    uint32_t per_wr_len;
+    struct miscdevice misc;
+};
+
+static int transfer_read(struct platform_i2c_dev_info *i2c_dev, u8 *buf, loff_t regaddr, size_t count)
+{
+    int i, j;
+    struct i2c_adapter *adap;
+    union i2c_smbus_data data;
+    u8 offset_buf[MAX_BUS_WIDTH];
+    struct i2c_msg msgs[2];
+    int msgs_num, ret;
+    u8 offset;
+    u8 length;
+
+    if (!i2c_dev) {
+        I2C_DEV_DEBUG_ERROR("can't get read i2c_dev\r\n");
+        return -ENODEV;
+    }
+
+    i = 0;
+
+    mem_clear(offset_buf, sizeof(offset_buf));
+
+    switch (i2c_dev->addr_bus_width) {
+    case WIDTH_4Byte:
+        offset_buf[i++] = (regaddr >> 24) & 0xFF;
+        offset_buf[i++] = (regaddr >> 16) & 0xFF;
+        offset_buf[i++] = (regaddr >> 8) & 0xFF;
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_2Byte:
+        offset_buf[i++] = (regaddr >> 8) & 0xFF;
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_1Byte:
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    default:
+        I2C_DEV_DEBUG_ERROR("Only support 1,2,4 Byte Address Width,but set width = %u\r\n", i2c_dev->addr_bus_width);
+        return -EINVAL;
+    }
+
+    adap = i2c_get_adapter(i2c_dev->i2c_bus);
+    if (adap == NULL) {
+        I2C_DEV_DEBUG_ERROR("get i2c adapter %d faild.\n", i2c_dev->i2c_bus);
+        return -ENXIO;
+    }
+
+    if (adap->algo->master_xfer) {
+        mem_clear(msgs, sizeof(msgs));
+        msgs[0].addr = i2c_dev->i2c_addr;
+        msgs[0].flags = 0;
+        msgs[0].len = i2c_dev->addr_bus_width;
+        msgs[0].buf = offset_buf;
+
+        msgs[1].addr = i2c_dev->i2c_addr;
+        msgs[1].flags = I2C_M_RD;
+        msgs[1].len = count;
+        msgs[1].buf = buf;
+
+        msgs_num = 2;
+        ret = i2c_transfer(adap, msgs, msgs_num);
+        if (ret != msgs_num) {
+            I2C_DEV_DEBUG_ERROR("i2c_transfer read error\r\n");
+            ret = -EFAULT;
+            goto error_exit;
+        }
+    } else {
+        if (i2c_dev->addr_bus_width == WIDTH_1Byte) {
+            offset = regaddr & 0xFF;
+            if (i2c_check_functionality(adap, I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
+                for (j = 0; j < count; j += I2C_SMBUS_BLOCK_MAX) {
+                    if (count - j > I2C_SMBUS_BLOCK_MAX) {
+                        length = I2C_SMBUS_BLOCK_MAX;
+                    } else {
+                        length = count - j;
+                    }
+                    data.block[0] = length;
+                    ret = adap->algo->smbus_xfer(adap, i2c_dev->i2c_addr,
+                                    0,
+                                    I2C_SMBUS_READ,
+                                    offset, I2C_SMBUS_I2C_BLOCK_DATA, &data);
+                    if (ret) {
+                        I2C_DEV_DEBUG_ERROR("smbus_xfer read block error, ret = %d\r\n", ret);
+                        ret = -EFAULT;
+                        goto error_exit;
+                    }
+                    memcpy(buf + j, data.block + 1, length);
+                    offset += length;
+                }
+            } else {
+                for (j = 0; j < count; j++) {
+                    ret = adap->algo->smbus_xfer(adap, i2c_dev->i2c_addr,
+                                    0,
+                                    I2C_SMBUS_READ,
+                                    offset, I2C_SMBUS_BYTE_DATA, &data);
+
+                    if (!ret) {
+                        buf[j] = data.byte;
+                    } else {
+                        I2C_DEV_DEBUG_ERROR("smbus_xfer read byte error, ret = %d\r\n", ret);
+                        ret = -EFAULT;
+                        goto error_exit;
+                    }
+                    offset++;
+                }
+            }
+        } else {
+            I2C_DEV_DEBUG_ERROR("smbus_xfer not support addr_bus_width = %d\r\n", i2c_dev->addr_bus_width);
+            ret = -EINVAL;
+            goto error_exit;
+        }
+    }
+
+    i2c_put_adapter(adap);
+    return 0;
+error_exit:
+    i2c_put_adapter(adap);
+    return ret;
+}
+
+static int transfer_write(struct platform_i2c_dev_info *i2c_dev, u8 *buf, loff_t regaddr, size_t count)
+{
+    int i, j;
+    struct i2c_adapter *adap;
+    union i2c_smbus_data data;
+    u8 offset_buf[TRANSFER_WRITE_BUFF];
+    struct i2c_msg msgs[1];
+    int msgs_num, ret;
+    u8 offset;
+    u8 length;
+
+    if (!i2c_dev) {
+        I2C_DEV_DEBUG_ERROR("can't get read i2c_dev\r\n");
+        return -ENODEV;
+    }
+
+    i = 0;
+
+    mem_clear(offset_buf, sizeof(offset_buf));
+
+    switch (i2c_dev->addr_bus_width) {
+    case WIDTH_4Byte:
+        offset_buf[i++] = (regaddr >> 24) & 0xFF;
+        offset_buf[i++] = (regaddr >> 16) & 0xFF;
+        offset_buf[i++] = (regaddr >> 8) & 0xFF;
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_2Byte:
+        offset_buf[i++] = (regaddr >> 8) & 0xFF;
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_1Byte:
+        offset_buf[i++] = regaddr & 0xFF;
+        break;
+    default:
+        I2C_DEV_DEBUG_ERROR("Only support 1,2,4 Byte Address Width,but set width = %u\r\n", i2c_dev->addr_bus_width);
+        return -EINVAL;
+    }
+
+    memcpy(offset_buf + i2c_dev->addr_bus_width, buf, count);
+
+    adap = i2c_get_adapter(i2c_dev->i2c_bus);
+    if (adap == NULL) {
+        I2C_DEV_DEBUG_ERROR("get i2c adapter %d faild.\n", i2c_dev->i2c_bus);
+        return -ENXIO;
+    }
+
+    if (adap->algo->master_xfer) {
+        mem_clear(msgs, sizeof(msgs));
+
+        msgs[0].addr = i2c_dev->i2c_addr;
+        msgs[0].flags = 0;
+        msgs[0].len = i2c_dev->addr_bus_width + count;
+        msgs[0].buf = offset_buf;
+
+        msgs_num = 1;
+        ret = i2c_transfer(adap, msgs, msgs_num);
+        if (ret != msgs_num) {
+            I2C_DEV_DEBUG_ERROR("i2c_transfer write error\r\n");
+            ret = -EFAULT;
+            goto error_exit;
+        }
+    } else {
+        if (i2c_dev->addr_bus_width == WIDTH_1Byte) {
+            offset = regaddr & 0xFF;
+            if (i2c_check_functionality(adap, I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) {
+                for (j = 0; j < count; j += I2C_SMBUS_BLOCK_MAX) {
+                    if (count - j > I2C_SMBUS_BLOCK_MAX) {
+                        length = I2C_SMBUS_BLOCK_MAX;
+                    } else {
+                        length = count - j;
+                    }
+                    data.block[0] = length;
+                    memcpy(data.block + 1, buf + j, length);
+                    ret = adap->algo->smbus_xfer(adap, i2c_dev->i2c_addr,
+                                    0,
+                                    I2C_SMBUS_WRITE,
+                                    offset, I2C_SMBUS_I2C_BLOCK_DATA, &data);
+                    if (ret) {
+                        I2C_DEV_DEBUG_ERROR("smbus_xfer write block error, ret = %d\r\n", ret);
+                        ret = -EFAULT;
+                        goto error_exit;
+                    }
+                    offset += length;
+                }
+            } else {
+                for (j = 0; j < count; j++) {
+                    data.byte = buf[j];
+                    ret = adap->algo->smbus_xfer(adap, i2c_dev->i2c_addr,
+                                    0,
+                                    I2C_SMBUS_WRITE,
+                                    offset, I2C_SMBUS_BYTE_DATA, &data);
+                    if (ret) {
+                        I2C_DEV_DEBUG_ERROR("smbus_xfer write byte error, ret = %d\r\n", ret);
+                        ret = -EFAULT;
+                        goto error_exit;
+                    }
+                    offset += 1;
+                }
+            }
+        } else {
+            I2C_DEV_DEBUG_ERROR("smbus_xfer not support addr_bus_width = %d\r\n", i2c_dev->addr_bus_width);
+            ret = -EINVAL;
+            goto error_exit;
+        }
+    }
+
+    i2c_put_adapter(adap);
+    return 0;
+error_exit:
+    i2c_put_adapter(adap);
+    return ret;
+}
+
+static long i2c_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+    return 0;
+}
+
+static int i2c_dev_open(struct inode *inode, struct file *file)
+{
+    unsigned int minor = iminor(inode);
+    struct platform_i2c_dev_info *i2c_dev;
+
+    i2c_dev = i2c_dev_arry[minor];
+    if (i2c_dev == NULL) {
+        return -ENODEV;
+    }
+
+    file->private_data = i2c_dev;
+
+    return 0;
+}
+
+static int i2c_dev_release(struct inode *inode, struct file *file)
+{
+    file->private_data = NULL;
+
+    return 0;
+}
+
+static int device_read(struct platform_i2c_dev_info *i2c_dev, uint32_t offset, uint8_t *buf, int count)
+{
+    int i, j, ret;
+    u8 tmp_offset;
+    u8 val[FPGA_MAX_LEN];
+    u32 width, rd_len, per_len, tmp;
+    u32 max_per_len;
+
+    width = i2c_dev->data_bus_width;
+    switch (width) {
+    case WIDTH_4Byte:
+        tmp_offset = offset & 0x3;
+        if (tmp_offset) {
+            I2C_DEV_DEBUG_ERROR("data bus width:%u, offset:%u, read size %d invalid.\r\n", width, offset, count);
+            return -EINVAL;
+        }
+        break;
+    case WIDTH_2Byte:
+        tmp_offset = offset & 0x1;
+        if (tmp_offset) {
+            I2C_DEV_DEBUG_ERROR("data bus width:%u, offset:%u, read size %d invalid.\r\n", width, offset, count);
+            return -EINVAL;
+        }
+        break;
+    case WIDTH_1Byte:
+        break;
+    default:
+        I2C_DEV_DEBUG_ERROR("Only support 1,2,4 Byte Data Width,but set width = %u\r\n", width);
+        return -EINVAL;
+    }
+
+    max_per_len = i2c_dev->per_rd_len;
+    tmp = (width - 1) & count;
+    rd_len = (tmp == 0) ? count : count + width - tmp;
+    per_len = (rd_len > max_per_len) ? (max_per_len) : (rd_len);
+
+    mem_clear(val, sizeof(val));
+    for (i = 0; i < rd_len; i += per_len) {
+        ret = transfer_read(i2c_dev, val + i, offset + i, per_len);
+        if (ret < 0) {
+            I2C_DEV_DEBUG_ERROR("read error.read offset = %u\r\n", (offset + i));
+            return -EFAULT;
+        }
+    }
+
+    if (width == WIDTH_1Byte) {
+        memcpy(buf, val, count);
+    } else {
+        for (i = 0; i < count; i += width) {
+            for (j = 0; (j < width) && (i + j < count); j++) {
+                buf[i + j] = val[i + width - j - 1];
+            }
+        }
+    }
+
+    return 0;
+}
+
+static int device_write(struct platform_i2c_dev_info *i2c_dev, uint32_t offset, uint8_t *buf, size_t count)
+{
+    int i, j, ret;
+    u8 tmp_offset;
+    u32 width;
+    u8 val[FPGA_MAX_LEN];
+    u32 wr_len, per_len, tmp;
+    u32 max_per_len;
+
+    width = i2c_dev->data_bus_width;
+    switch (width) {
+    case WIDTH_4Byte:
+        tmp_offset = offset & 0x3;
+        if (tmp_offset) {
+            I2C_DEV_DEBUG_ERROR("data bus width:%u, offset:%u, read size %lu invalid.\r\n", width, offset, count);
+            return -EINVAL;
+        }
+        break;
+    case WIDTH_2Byte:
+        tmp_offset = offset & 0x1;
+        if (tmp_offset) {
+            I2C_DEV_DEBUG_ERROR("data bus width:%u, offset:%u, read size %lu invalid.\r\n", width, offset, count);
+            return -EINVAL;
+        }
+        break;
+    case WIDTH_1Byte:
+        break;
+    default:
+        I2C_DEV_DEBUG_ERROR("Only support 1,2,4 Byte Data Width,but set width = %u\r\n", width);
+        return -EINVAL;
+    }
+
+    mem_clear(val, sizeof(val));
+
+    if (width == WIDTH_1Byte) {
+        memcpy(val, buf, count);
+    } else {
+        for (i = 0; i < count; i += width) {
+            for (j = 0; (j < width) && (i + j < count); j++) {
+                val[i + width - j - 1] = buf[i + j];
+            }
+        }
+    }
+
+    max_per_len = i2c_dev->per_wr_len;
+    tmp = (width - 1) & count;
+    wr_len = (tmp == 0) ? count : count + width - tmp;
+    per_len = (wr_len > max_per_len) ? (max_per_len) : (wr_len);
+
+    for (i = 0; i < wr_len; i += per_len) {
+        ret = transfer_write(i2c_dev, val + i, offset + i, per_len);
+        if (ret < 0) {
+            I2C_DEV_DEBUG_ERROR("write error.offset = %u\r\n", (offset + i));
+            return -EFAULT;
+        }
+    }
+    return 0;
+}
+
+static ssize_t i2c_dev_read(struct file *file, char __user *buf, size_t count, loff_t *offset)
+{
+    u8 val[FPGA_MAX_LEN];
+    int ret;
+    struct platform_i2c_dev_info *i2c_dev;
+
+    if (count <= 0 || count > sizeof(val)) {
+        I2C_DEV_DEBUG_ERROR("read conut %lu , beyond max:%lu.\n", count, sizeof(val));
+        return -EINVAL;
+    }
+
+    i2c_dev = file->private_data;
+    if (i2c_dev == NULL) {
+        I2C_DEV_DEBUG_ERROR("can't get read private_data .\r\n");
+        return -EINVAL;
+    }
+
+    ret = device_read(i2c_dev, (uint32_t)*offset, val, count);
+    if (ret < 0) {
+        I2C_DEV_DEBUG_ERROR("i2c dev read failed, dev name:%s, offset:0x%x, len:%lu.\n",
+            i2c_dev->name, (uint32_t)*offset, count);
+        return -EINVAL;
+    }
+
+    if (copy_to_user(buf, val, count)) {
+        I2C_DEV_DEBUG_ERROR("copy_to_user error \r\n");
+        return -EFAULT;
+    } else{
+        *offset += count;
+    }
+
+    return count;
+}
+
+static ssize_t i2c_dev_write(struct file *file, const char __user *buf, size_t count, loff_t *offset)
+{
+    u8 val[FPGA_MAX_LEN];
+    int ret;
+    struct platform_i2c_dev_info *i2c_dev;
+
+    if (count <= 0 || count > sizeof(val)) {
+        I2C_DEV_DEBUG_ERROR("write conut %lu, beyond max val:%lu.\n", count, sizeof(val));
+        return -EINVAL;
+    }
+
+    i2c_dev = file->private_data;
+    if (i2c_dev == NULL) {
+        I2C_DEV_DEBUG_ERROR("get write private_data error.\r\n");
+        return -EINVAL;
+    }
+
+    mem_clear(val, sizeof(val));
+    if (copy_from_user(val, buf, count)) {
+        I2C_DEV_DEBUG_ERROR("copy_from_user error.\r\n");
+        return -EFAULT;
+    }
+
+    ret = device_write (i2c_dev, (uint32_t)*offset, val, count);
+    if (ret < 0) {
+        I2C_DEV_DEBUG_ERROR("i2c dev write failed, dev name:%s, offset:0x%llx, len:%lu.\n",
+            i2c_dev->name, *offset, count);
+        return -EINVAL;
+    }
+
+    *offset += count;
+    return count;
+}
+
+static loff_t i2c_dev_llseek(struct file *file, loff_t offset, int origin)
+{
+    loff_t ret = 0;
+
+    switch (origin) {
+    case SEEK_SET:
+        if (offset < 0) {
+            I2C_DEV_DEBUG_ERROR("SEEK_SET, offset:%lld, invalid.\r\n", offset);
+            ret = -EINVAL;
+            break;
+        }
+        file->f_pos = offset;
+        ret = file->f_pos;
+        break;
+    case SEEK_CUR:
+        if (file->f_pos + offset < 0) {
+            I2C_DEV_DEBUG_ERROR("SEEK_CUR out of range, f_ops:%lld, offset:%lld.\n",
+                 file->f_pos, offset);
+        }
+        file->f_pos += offset;
+        ret = file->f_pos;
+        break;
+    default:
+        I2C_DEV_DEBUG_ERROR("unsupport llseek type:%d.\n", origin);
+        ret = -EINVAL;
+        break;
+    }
+    return ret;
+}
+
+static const struct file_operations i2c_dev_fops = {
+    .owner      = THIS_MODULE,
+    .llseek     = i2c_dev_llseek,
+    .read       = i2c_dev_read,
+    .write      = i2c_dev_write,
+    .unlocked_ioctl = i2c_dev_ioctl,
+    .open       = i2c_dev_open,
+    .release    = i2c_dev_release,
+};
+
+static struct platform_i2c_dev_info * dev_match(const char *path)
+{
+    struct platform_i2c_dev_info *i2c_dev;
+    char dev_name[MAX_NAME_SIZE];
+    int i;
+    for (i = 0; i < MAX_I2C_DEV_NUM; i++) {
+        if (i2c_dev_arry[ i ] == NULL) {
+            continue;
+        }
+        i2c_dev = i2c_dev_arry[ i ];
+        snprintf(dev_name, MAX_NAME_SIZE,"/dev/%s", i2c_dev->name);
+        if (!strcmp(path, dev_name)) {
+            I2C_DEV_DEBUG_DMESG("get dev_name = %s, minor = %d\n", dev_name, i);
+            return i2c_dev;
+        }
+    }
+
+    return NULL;
+}
+
+int platform_i2c_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    struct platform_i2c_dev_info *i2c_dev = NULL;
+    int ret;
+
+    if(path == NULL){
+        I2C_DEV_DEBUG_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if(buf == NULL){
+        I2C_DEV_DEBUG_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    if (count > FPGA_MAX_LEN) {
+        I2C_DEV_DEBUG_ERROR("read conut %lu, beyond max:%d.\n", count, FPGA_MAX_LEN);
+        return -EINVAL;
+    }
+
+    i2c_dev = dev_match(path);
+    if (i2c_dev == NULL) {
+        I2C_DEV_DEBUG_ERROR("i2c_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    ret = device_read(i2c_dev, offset, buf, count);
+    if (ret < 0) {
+        I2C_DEV_DEBUG_ERROR("fpga i2c dev read failed, dev name:%s, offset:0x%x, len:%lu.\n",
+            i2c_dev->name, offset, count);
+        return -EINVAL;
+    }
+
+    return count;
+}
+EXPORT_SYMBOL(platform_i2c_device_func_read);
+
+int platform_i2c_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    struct platform_i2c_dev_info *i2c_dev = NULL;
+    int ret;
+
+    if(path == NULL){
+        I2C_DEV_DEBUG_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if(buf == NULL){
+        I2C_DEV_DEBUG_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    if (count > FPGA_MAX_LEN) {
+        I2C_DEV_DEBUG_ERROR("write conut %lu, beyond max:%d.\n", count, FPGA_MAX_LEN);
+        return -EINVAL;
+    }
+
+    i2c_dev = dev_match(path);
+    if (i2c_dev == NULL) {
+        I2C_DEV_DEBUG_ERROR("i2c_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    ret = device_write (i2c_dev, offset, buf, count);
+    if (ret < 0) {
+        I2C_DEV_DEBUG_ERROR("i2c dev write failed, dev name:%s, offset:0x%x, len:%lu.\n",
+            i2c_dev->name, offset, count);
+        return -EINVAL;
+    }
+
+    return count;
+}
+EXPORT_SYMBOL(platform_i2c_device_func_write);
+
+static int platform_i2c_dev_probe(struct platform_device *pdev)
+{
+    int ret = 0;
+    struct platform_i2c_dev_info *i2c_dev;
+    struct miscdevice *misc;
+    platform_i2c_dev_device_t *platform_i2c_dev_device;
+
+    i2c_dev = devm_kzalloc(&pdev->dev, sizeof(struct platform_i2c_dev_info), GFP_KERNEL);
+    if (!i2c_dev) {
+        dev_err(&pdev->dev, "devm_kzalloc error. \r\n");
+        return -ENOMEM;
+    }
+
+    if (pdev->dev.of_node) {
+
+        ret += of_property_read_u32(pdev->dev.of_node, "i2c_bus", &i2c_dev->i2c_bus);
+        ret += of_property_read_u32(pdev->dev.of_node, "i2c_addr", &i2c_dev->i2c_addr);
+        ret += of_property_read_string(pdev->dev.of_node, "i2c_name", &i2c_dev->name);
+        ret += of_property_read_u32(pdev->dev.of_node, "data_bus_width", &i2c_dev->data_bus_width);
+        ret += of_property_read_u32(pdev->dev.of_node, "addr_bus_width", &i2c_dev->addr_bus_width);
+        ret += of_property_read_u32(pdev->dev.of_node, "per_rd_len", &i2c_dev->per_rd_len);
+        ret += of_property_read_u32(pdev->dev.of_node, "per_wr_len", &i2c_dev->per_wr_len);
+        if (ret != 0) {
+            dev_err(&pdev->dev, "dts config error.ret:%d.\r\n", ret);
+            return -ENXIO;
+        }
+    } else {
+        if (pdev->dev.platform_data == NULL) {
+            dev_err(&pdev->dev, "Failed to get platform data config.\n");
+            return -ENXIO;
+        }
+        platform_i2c_dev_device = pdev->dev.platform_data;
+        i2c_dev->i2c_bus = platform_i2c_dev_device->i2c_bus;
+        i2c_dev->i2c_addr = platform_i2c_dev_device->i2c_addr;
+        i2c_dev->name = platform_i2c_dev_device->i2c_name;
+        i2c_dev->data_bus_width = platform_i2c_dev_device->data_bus_width;
+        i2c_dev->addr_bus_width = platform_i2c_dev_device->addr_bus_width;
+        i2c_dev->per_rd_len = platform_i2c_dev_device->per_rd_len;
+        i2c_dev->per_wr_len = platform_i2c_dev_device->per_wr_len;
+    }
+
+    if ((i2c_dev->per_rd_len & (i2c_dev->data_bus_width - 1)) || (i2c_dev->per_wr_len & (i2c_dev->data_bus_width - 1))) {
+        dev_err(&pdev->dev, "Invalid config per_rd_len %d per_wr_len %d data bus_width %d.\r\n", i2c_dev->per_rd_len,
+            i2c_dev->per_wr_len, i2c_dev->data_bus_width);
+        return -ENXIO;
+    }
+
+    misc = &i2c_dev->misc;
+    misc->minor = MISC_DYNAMIC_MINOR;
+    misc->name = i2c_dev->name;
+    misc->fops = &i2c_dev_fops;
+    if (misc_register(misc) != 0) {
+        dev_err(&pdev->dev, "register %s faild.\r\n", misc->name);
+        return -ENXIO;
+    }
+
+    if (misc->minor >= MAX_I2C_DEV_NUM) {
+        dev_err(&pdev->dev, "minor number beyond the limit! is %d.\r\n", misc->minor);
+        misc_deregister(misc);
+        return -ENXIO;
+    }
+    i2c_dev_arry[misc->minor] = i2c_dev;
+
+    dev_info(&pdev->dev, "register %u addr_bus_width %u data_bus_width device %s with %u per_rd_len %u per_wr_len success.\r\n",
+        i2c_dev->addr_bus_width, i2c_dev->data_bus_width, i2c_dev->name, i2c_dev->per_rd_len, i2c_dev->per_wr_len);
+
+    return 0;
+}
+
+static int platform_i2c_dev_remove(struct platform_device *pdev)
+{
+    int i;
+
+    for (i = 0; i < MAX_I2C_DEV_NUM ; i++) {
+        if (i2c_dev_arry[i] != NULL) {
+            misc_deregister(&i2c_dev_arry[i]->misc);
+            i2c_dev_arry[i] = NULL;
+        }
+    }
+
+    return 0;
+}
+
+static const struct of_device_id platform_i2c_dev_of_match[] = {
+    { .compatible = "wb-platform-i2c-dev" },
+    { },
+};
+MODULE_DEVICE_TABLE(of, platform_i2c_dev_of_match);
+
+static struct platform_driver wb_platform_i2c_dev_driver = {
+    .probe      = platform_i2c_dev_probe,
+    .remove     = platform_i2c_dev_remove,
+    .driver     = {
+        .owner  = THIS_MODULE,
+        .name   = PROXY_NAME,
+        .of_match_table = platform_i2c_dev_of_match,
+    },
+};
+
+static int __init wb_platform_i2c_dev_init(void)
+{
+    return platform_driver_register(&wb_platform_i2c_dev_driver);
+}
+
+static void __exit wb_platform_i2c_dev_exit(void)
+{
+    platform_driver_unregister(&wb_platform_i2c_dev_driver);
+}
+
+module_init(wb_platform_i2c_dev_init);
+module_exit(wb_platform_i2c_dev_exit);
+
+MODULE_DESCRIPTION("platform i2c dev driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.h
new file mode 100644
index 000000000000..b5158c9fec57
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.h
@@ -0,0 +1,19 @@
+#ifndef __WB_PLATFORM_I2C_DEV_H__
+#define __WB_PLATFORM_I2C_DEV_H__
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+#define I2C_DEV_NAME_MAX_LEN (64)
+
+typedef struct platform_i2c_dev_device_s {
+    uint32_t i2c_bus;
+    uint32_t i2c_addr;
+    char i2c_name[I2C_DEV_NAME_MAX_LEN];
+    uint32_t data_bus_width;
+    uint32_t addr_bus_width;
+    uint32_t per_rd_len;
+    uint32_t per_wr_len;
+    int device_flag;
+} platform_i2c_dev_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_93xx46.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_93xx46.c
new file mode 100644
index 000000000000..abc4f1567aec
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_93xx46.c
@@ -0,0 +1,111 @@
+/*
+ * EEPROMs access control driver for display configuration EEPROMs
+ * on DigsyMTC board.
+ *
+ * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/module.h>
+#include <linux/gpio.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/spi_gpio.h>
+#include <linux/eeprom_93xx46.h>
+
+#define DEFAULT_SPI_BUS_NUM     (0)
+#define DEFAULT_SPI_CS_NUM      (0)
+#define DEFAULT_SPI_HZ          (100000)
+
+#define GPIO_EEPROM_CS          (-1)
+
+int g_wb_spi_93xx46_debug = 0;
+int g_wb_spi_93xx46_error = 0;
+int spi_bus_num = DEFAULT_SPI_BUS_NUM;
+int spi_cs_gpio = GPIO_EEPROM_CS;
+
+module_param(g_wb_spi_93xx46_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_spi_93xx46_error, int, S_IRUGO | S_IWUSR);
+module_param(spi_bus_num, int, S_IRUGO | S_IWUSR);
+module_param(spi_cs_gpio, int, S_IRUGO | S_IWUSR);
+
+#define SPI_93xx46_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_spi_93xx46_debug) { \
+        printk(KERN_INFO "[SPI-93xx46][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define SPI_93xx46_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_spi_93xx46_error) { \
+        printk(KERN_ERR "[SPI-93xx46][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct eeprom_93xx46_platform_data eeprom_data = {
+    .flags      = EE_ADDR16,
+    .quirks     = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ,
+};
+
+struct spi_board_info eeprom_93xx46_info __initdata = {
+        .modalias           = "wb_93xx46",
+        .max_speed_hz       = DEFAULT_SPI_HZ,
+        .bus_num            = DEFAULT_SPI_BUS_NUM,
+        .chip_select        = DEFAULT_SPI_CS_NUM,
+        .mode               = SPI_MODE_0 | SPI_CS_HIGH,
+        .controller_data    = (void *)GPIO_EEPROM_CS,
+        .platform_data      = &eeprom_data,
+};
+
+static struct spi_device *g_spi_device;
+
+static int __init wb_spi_93xx46_init(void)
+{
+    struct spi_master *master;
+
+    SPI_93xx46_DEBUG_VERBOSE("Enter.\n");
+
+    eeprom_93xx46_info.bus_num = spi_bus_num;
+    eeprom_93xx46_info.controller_data = (void *)(long)spi_cs_gpio;
+    master = spi_busnum_to_master(eeprom_93xx46_info.bus_num);
+    if (!master) {
+        SPI_93xx46_DEBUG_ERROR("get bus_num %u spi master failed.\n",
+            eeprom_93xx46_info.bus_num);
+        return -EINVAL;
+    }
+
+    g_spi_device = spi_new_device(master, &eeprom_93xx46_info);
+    put_device(&master->dev);
+    if (!g_spi_device) {
+        SPI_93xx46_DEBUG_ERROR("register spi new device failed.\n");
+        return -EPERM;
+    }
+
+    if (g_wb_spi_93xx46_debug) {
+        dev_info(&g_spi_device->dev, "register %u bus_num spi 93xx46 eeprom success\n",
+            eeprom_93xx46_info.bus_num);
+    }
+
+    return 0;
+}
+
+static void __exit wb_spi_93xx46_exit(void)
+{
+    spi_unregister_device(g_spi_device);
+
+    if (g_wb_spi_93xx46_debug) {
+        dev_info(&g_spi_device->dev, "unregister spi 93xx46 eeprom success\n");
+    }
+
+    return;
+}
+
+module_init(wb_spi_93xx46_init);
+module_exit(wb_spi_93xx46_exit);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("create 93xx46 eeprom device");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.c
new file mode 100644
index 000000000000..b569ace32526
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.c
@@ -0,0 +1,684 @@
+/*
+ * wb_spi_dev.c
+ * ko to read/write spi device through /dev/XXX device
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/miscdevice.h>
+#include <linux/spi/spi.h>
+#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <linux/fs.h>
+#include <linux/export.h>
+#include <linux/uio.h>
+
+#include "wb_spi_dev.h"
+
+#define MAX_SPI_DEV_NUM      (256)
+#define MAX_RW_LEN           (256)
+#define MAX_NAME_SIZE        (20)
+#define MAX_ADDR_BUS_WIDTH   (4)
+
+#define TRANSFER_WRITE_BUFF  (1 + MAX_ADDR_BUS_WIDTH + MAX_RW_LEN)
+
+#define WIDTH_1Byte          (1)
+#define WIDTH_2Byte          (2)
+#define WIDTH_4Byte          (4)
+
+#define OP_READ             (0x3)
+#define OP_WRITE            (0x2)
+
+static int g_spi_dev_debug = 0;
+static int g_spi_dev_error = 0;
+
+module_param(g_spi_dev_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_spi_dev_error, int, S_IRUGO | S_IWUSR);
+
+#define SPI_DEV_DEBUG(fmt, args...) do {                                        \
+    if (g_spi_dev_debug) { \
+        printk(KERN_ERR "[SPI_DEV][DEBUG][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define SPI_DEV_ERROR(fmt, args...) do {                                        \
+    if (g_spi_dev_error) { \
+        printk(KERN_ERR "[SPI_DEV][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static struct spi_dev_info* spi_dev_arry[MAX_SPI_DEV_NUM];
+
+struct spi_dev_info {
+    const char *name;
+    uint32_t data_bus_width;
+    uint32_t addr_bus_width;
+    uint32_t per_rd_len;
+    uint32_t per_wr_len;
+    uint32_t spi_len;
+    struct miscdevice misc;
+    struct spi_device *spi_device;
+};
+
+static int transfer_read(struct spi_dev_info *spi_dev, u8 *buf, uint32_t regaddr, size_t count)
+{
+    int i, ret;
+    u8 tx_buf[MAX_ADDR_BUS_WIDTH + 1];
+    struct spi_message m;
+    struct spi_transfer xfer[2];
+
+    i = 0;
+    mem_clear(tx_buf, sizeof(tx_buf));
+    tx_buf[i++] = OP_READ;
+
+    switch (spi_dev->addr_bus_width) {
+    case WIDTH_4Byte:
+        tx_buf[i++] = (regaddr >> 24) & 0xFF;
+        tx_buf[i++] = (regaddr >> 16) & 0xFF;
+        tx_buf[i++] = (regaddr >> 8) & 0xFF;
+        tx_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_2Byte:
+        tx_buf[i++] = (regaddr >> 8) & 0xFF;
+        tx_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_1Byte:
+        tx_buf[i++] = regaddr & 0xFF;
+        break;
+    default:
+        SPI_DEV_ERROR("Only support 1,2,4 Byte Width,but set width = %u\n",
+            spi_dev->addr_bus_width);
+        return -EINVAL;
+    }
+
+    mem_clear(xfer, sizeof(xfer));
+    spi_message_init(&m);
+    xfer[0].tx_buf = tx_buf;
+    xfer[0].len = spi_dev->addr_bus_width + 1;
+    spi_message_add_tail(&xfer[0], &m);
+
+    xfer[1].rx_buf = buf;
+    xfer[1].len = count;
+    spi_message_add_tail(&xfer[1], &m);
+
+    ret = spi_sync(spi_dev->spi_device, &m);
+    if (ret) {
+        SPI_DEV_ERROR("transfer_read failed, reg addr:0x%x, len:%lu, ret:%d.\n",
+            regaddr, count, ret);
+        return -EIO;
+    }
+    return 0;
+}
+
+static int transfer_write(struct spi_dev_info *spi_dev, u8 *buf, uint32_t regaddr, size_t count)
+{
+    int i, ret;
+    u8 tx_buf[TRANSFER_WRITE_BUFF];
+    struct spi_message m;
+    struct spi_transfer xfer ;
+
+    i = 0;
+    mem_clear(tx_buf, sizeof(tx_buf));
+    tx_buf[i++] = OP_WRITE;
+    switch (spi_dev->addr_bus_width) {
+    case WIDTH_4Byte:
+        tx_buf[i++] = (regaddr >> 24) & 0xFF;
+        tx_buf[i++] = (regaddr >> 16) & 0xFF;
+        tx_buf[i++] = (regaddr >> 8) & 0xFF;
+        tx_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_2Byte:
+        tx_buf[i++] = (regaddr >> 8) & 0xFF;
+        tx_buf[i++] = regaddr & 0xFF;
+        break;
+    case WIDTH_1Byte:
+        tx_buf[i++] = regaddr & 0xFF;
+        break;
+    default:
+        SPI_DEV_ERROR("Only support 1,2,4 Byte Width, but set width = %u\n",
+            spi_dev->addr_bus_width);
+        return -EINVAL;
+    }
+
+    memcpy(tx_buf + i, buf, count);
+
+    mem_clear(&xfer, sizeof(xfer));
+    spi_message_init(&m);
+    xfer.tx_buf = tx_buf;
+    xfer.len = count + i;
+    spi_message_add_tail(&xfer, &m);
+
+    ret = spi_sync(spi_dev->spi_device, &m);
+    if (ret) {
+        SPI_DEV_ERROR("transfer_write failed, reg addr:0x%x, len:%lu, ret:%d.\n",
+            regaddr, count, ret);
+        return -EIO;
+    }
+    return 0;
+}
+
+static long spi_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+    return 0;
+}
+
+static int spi_dev_open(struct inode *inode, struct file *file)
+{
+    unsigned int minor = iminor(inode);
+    struct spi_dev_info *spi_dev;
+
+    if (minor >= MAX_SPI_DEV_NUM) {
+        SPI_DEV_ERROR("minor out of range, minor = %d.\n", minor);
+        return -ENODEV;
+    }
+
+    spi_dev = spi_dev_arry[minor];
+    if (spi_dev == NULL) {
+        SPI_DEV_ERROR("spi_dev is NULL, open failed, minor = %d\n", minor);
+        return -ENODEV;
+    }
+
+    file->private_data = spi_dev;
+
+    return 0;
+}
+
+static int spi_dev_release(struct inode *inode, struct file *file)
+{
+    file->private_data = NULL;
+
+    return 0;
+}
+
+static int device_read(struct spi_dev_info *spi_dev, uint32_t offset, uint8_t *buf, size_t count)
+{
+    int i, j, ret;
+    u8 val[MAX_RW_LEN];
+    u32 data_width, rd_len, per_len, tmp;
+    u32 max_per_len;
+
+    if (offset > spi_dev->spi_len) {
+        SPI_DEV_DEBUG("offset: 0x%x, spi len: 0x%x, count: %lu, EOF.\n",
+            offset, spi_dev->spi_len, count);
+        return 0;
+    }
+
+    data_width = spi_dev->data_bus_width;
+    if (offset % data_width) {
+        SPI_DEV_ERROR("data bus width:%d, offset:0x%x, read size %lu invalid.\n",
+            data_width, offset, count);
+        return -EINVAL;
+    }
+
+    if (count > (spi_dev->spi_len - offset)) {
+        SPI_DEV_DEBUG("read count out of range. input len:%lu, read len:%u.\n",
+            count, spi_dev->spi_len - offset);
+        count = spi_dev->spi_len - offset;
+    }
+
+    if (count == 0) {
+        SPI_DEV_DEBUG("offset: 0x%x, spi len: 0x%x, read len: %lu, EOF.\n",
+            offset, spi_dev->spi_len, count);
+        return 0;
+    }
+
+    max_per_len = spi_dev->per_rd_len;
+    tmp = (data_width - 1) & count;
+    rd_len = (tmp == 0) ? count : count + data_width - tmp;
+    per_len = (rd_len > max_per_len) ? (max_per_len) : (rd_len);
+
+    mem_clear(val, sizeof(val));
+    for (i = 0; i < rd_len; i += per_len) {
+        ret = transfer_read(spi_dev, val + i, offset + i, per_len);
+        if (ret < 0) {
+            SPI_DEV_ERROR("read error.read offset = %u\n", (offset + i));
+            return -EFAULT;
+        }
+    }
+
+    if (data_width == WIDTH_1Byte) {
+        memcpy(buf, val, count);
+    } else {
+        for (i = 0; i < count; i += data_width) {
+            for (j = 0; (j < data_width) && (i + j < count); j++) {
+                buf[i + j] = val[i + data_width - j - 1];
+            }
+        }
+    }
+
+    return count;
+}
+
+static int device_write(struct spi_dev_info *spi_dev, uint32_t offset, uint8_t *buf, size_t count)
+{
+    int i, j, ret;
+    u32 data_width;
+    u8 val[MAX_RW_LEN];
+    u32 wr_len, per_len, tmp;
+    u32 max_per_len;
+
+    if (offset > spi_dev->spi_len) {
+        SPI_DEV_DEBUG("offset: 0x%x, spi len: 0x%x, count: %lu, EOF.\n",
+            offset, spi_dev->spi_len, count);
+        return 0;
+    }
+
+    data_width = spi_dev->data_bus_width;
+    if (offset % data_width) {
+        SPI_DEV_ERROR("data bus width:%d, offset:0x%x, read size %lu invalid.\n",
+            data_width, offset, count);
+        return -EINVAL;
+    }
+
+    if (count > (spi_dev->spi_len - offset)) {
+        SPI_DEV_DEBUG("read count out of range. input len:%lu, read len:%u.\n",
+            count, spi_dev->spi_len - offset);
+        count = spi_dev->spi_len - offset;
+    }
+
+    if (count == 0) {
+        SPI_DEV_DEBUG("offset: 0x%x, i2c len: 0x%x, read len: %lu, EOF.\n",
+            offset, spi_dev->spi_len, count);
+        return 0;
+    }
+
+    mem_clear(val, sizeof(val));
+
+    if (data_width == WIDTH_1Byte) {
+        memcpy(val, buf, count);
+    } else {
+        for (i = 0; i < count; i += data_width) {
+            for (j = 0; (j < data_width) && (i + j < count); j++) {
+                val[i + data_width - j - 1] = buf[i + j];
+            }
+        }
+    }
+
+    max_per_len = spi_dev->per_wr_len;
+    tmp = (data_width - 1) & count;
+    wr_len = (tmp == 0) ? count : count + data_width - tmp;
+    per_len = (wr_len > max_per_len) ? (max_per_len) : (wr_len);
+
+    for (i = 0; i < wr_len; i += per_len) {
+        ret = transfer_write(spi_dev, val + i, offset + i, per_len);
+        if (ret < 0) {
+            SPI_DEV_ERROR("write error.offset = %u\n", (offset + i));
+            return -EFAULT;
+        }
+    }
+    return count;
+}
+
+static ssize_t spi_dev_read(struct file *file, char __user *buf, size_t count, loff_t *offset)
+{
+    u8 val[MAX_RW_LEN];
+    int ret, read_len;
+    struct spi_dev_info *spi_dev;
+
+    spi_dev = file->private_data;
+    if (spi_dev == NULL) {
+        SPI_DEV_ERROR("can't get read private_data.\n");
+        return -EINVAL;
+    }
+
+    if (count == 0) {
+        SPI_DEV_ERROR("Invalid params, read count is 0.\n");
+        return -EINVAL;
+    }
+
+    if (count > sizeof(val)) {
+        SPI_DEV_DEBUG("read count %lu exceed max %lu.\n", count, sizeof(val));
+        count = sizeof(val);
+    }
+
+    mem_clear(val, sizeof(val));
+    read_len = device_read(spi_dev, (uint32_t)*offset, val, count);
+    if (read_len < 0) {
+        SPI_DEV_ERROR("spi dev read failed, dev name:%s, offset:0x%x, len:%lu.\n",
+            spi_dev->name, (uint32_t)*offset, count);
+        return read_len;
+    }
+
+    if (access_ok(buf, read_len)) {
+        SPI_DEV_DEBUG("user space read, buf: %p, offset: %lld, read count %lu.\n",
+            buf, *offset, count);
+        if (copy_to_user(buf, val, read_len)) {
+            SPI_DEV_ERROR("copy_to_user failed.\n");
+            return -EFAULT;
+        }
+    } else {
+        SPI_DEV_DEBUG("kernel space read, buf: %p, offset: %lld, read count %lu.\n",
+            buf, *offset, count);
+        memcpy(buf, val, read_len);
+    }
+
+    *offset += read_len;
+    ret = read_len;
+    return ret;
+}
+
+static ssize_t spi_dev_read_iter(struct kiocb *iocb, struct iov_iter *to)
+{
+    int ret;
+
+    SPI_DEV_DEBUG("spi_dev_read_iter, file: %p, count: %lu, offset: %lld\n",
+        iocb->ki_filp, to->count, iocb->ki_pos);
+    ret = spi_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos);
+    return ret;
+}
+
+static ssize_t spi_dev_write(struct file *file, const char __user *buf,
+                   size_t count, loff_t *offset)
+{
+    u8 val[MAX_RW_LEN];
+    int write_len;
+    struct spi_dev_info *spi_dev;
+
+    spi_dev = file->private_data;
+    if (spi_dev == NULL) {
+        SPI_DEV_ERROR("get write private_data error.\n");
+        return -EINVAL;
+    }
+
+    if (count == 0) {
+        SPI_DEV_ERROR("Invalid params, write count is 0.\n");
+        return -EINVAL;
+    }
+
+    if (count > sizeof(val)) {
+        SPI_DEV_DEBUG("write count %lu exceed max %lu.\n", count, sizeof(val));
+        count = sizeof(val);
+    }
+
+    mem_clear(val, sizeof(val));
+    if (access_ok(buf, count)) {
+        SPI_DEV_DEBUG("user space write, buf: %p, offset: %lld, write count %lu.\n",
+            buf, *offset, count);
+        if (copy_from_user(val, buf, count)) {
+            SPI_DEV_ERROR("copy_from_user failed.\n");
+            return -EFAULT;
+        }
+    } else {
+        SPI_DEV_DEBUG("kernel space write, buf: %p, offset: %lld, write count %lu.\n",
+            buf, *offset, count);
+        memcpy(val, buf, count);
+    }
+
+    write_len = device_write(spi_dev, (uint32_t)*offset, val, count);
+    if (write_len < 0) {
+        SPI_DEV_ERROR("spi dev write failed, dev name:%s, offset:0x%llx, len:%lu.\n",
+            spi_dev->name, *offset, count);
+        return write_len;
+    }
+
+    *offset += write_len;
+    return write_len;
+}
+
+static ssize_t spi_dev_write_iter(struct kiocb *iocb, struct iov_iter *from)
+{
+    int ret;
+
+    SPI_DEV_DEBUG("spi_dev_write_iter, file: %p, count: %lu, offset: %lld\n",
+        iocb->ki_filp, from->count, iocb->ki_pos);
+    ret = spi_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos);
+    return ret;
+}
+
+static loff_t spi_dev_llseek(struct file *file, loff_t offset, int origin)
+{
+    loff_t ret = 0;
+    struct spi_dev_info *spi_dev;
+
+    spi_dev = file->private_data;
+    if (spi_dev == NULL) {
+        SPI_DEV_ERROR("spi_dev is NULL, llseek failed.\n");
+        return -EINVAL;
+    }
+
+    switch (origin) {
+    case SEEK_SET:
+        if (offset < 0) {
+            SPI_DEV_ERROR("SEEK_SET, offset:%lld, invalid.\n", offset);
+            ret = -EINVAL;
+            break;
+        }
+        if (offset > spi_dev->spi_len) {
+            SPI_DEV_ERROR("SEEK_SET out of range, offset:%lld, i2c_len:0x%x.\n",
+                offset, spi_dev->spi_len);
+            ret = - EINVAL;
+            break;
+        }
+        file->f_pos = offset;
+        ret = file->f_pos;
+        break;
+    case SEEK_CUR:
+        if (((file->f_pos + offset) > spi_dev->spi_len) || ((file->f_pos + offset) < 0)) {
+            SPI_DEV_ERROR("SEEK_CUR out of range, f_ops:%lld, offset:%lld.\n",
+                 file->f_pos, offset);
+        }
+        file->f_pos += offset;
+        ret = file->f_pos;
+        break;
+    default:
+        SPI_DEV_ERROR("unsupport llseek type:%d.\n", origin);
+        ret = -EINVAL;
+        break;
+    }
+    return ret;
+}
+
+static const struct file_operations spi_dev_fops = {
+    .owner          = THIS_MODULE,
+    .llseek         = spi_dev_llseek,
+    .read_iter      = spi_dev_read_iter,
+    .write_iter     = spi_dev_write_iter,
+    .unlocked_ioctl = spi_dev_ioctl,
+    .open           = spi_dev_open,
+    .release        = spi_dev_release,
+};
+
+static struct spi_dev_info * dev_match(const char *path)
+{
+    struct spi_dev_info * spi_dev;
+    char dev_name[MAX_NAME_SIZE];
+    int i;
+    for (i = 0; i < MAX_SPI_DEV_NUM; i++) {
+        if (spi_dev_arry[ i ] == NULL) {
+            continue;
+        }
+        spi_dev = spi_dev_arry[ i ];
+        snprintf(dev_name, MAX_NAME_SIZE,"/dev/%s", spi_dev->name);
+        if (!strcmp(path, dev_name)) {
+            SPI_DEV_DEBUG("get dev_name = %s, minor = %d\n", dev_name, i);
+            return spi_dev;
+        }
+    }
+
+    return NULL;
+}
+
+int spi_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    struct spi_dev_info *spi_dev = NULL;
+    int ret;
+
+    if(path == NULL){
+        SPI_DEV_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if(buf == NULL){
+        SPI_DEV_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    if (count > MAX_RW_LEN) {
+        SPI_DEV_ERROR("read count %lu, beyond max:%d.\n", count, MAX_RW_LEN);
+        return -EINVAL;
+    }
+
+    spi_dev = dev_match(path);
+    if (spi_dev == NULL) {
+        SPI_DEV_ERROR("spi_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    ret = device_read(spi_dev, offset, buf, count);
+    if (ret < 0) {
+        SPI_DEV_ERROR("spi dev read failed, dev name:%s, offset:0x%x, len:%lu.\n",
+            spi_dev->name, offset, count);
+        return -EINVAL;
+    }
+
+    return count;
+}
+EXPORT_SYMBOL(spi_device_func_read);
+
+int spi_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count)
+{
+    struct spi_dev_info *spi_dev = NULL;
+    int ret;
+
+    if(path == NULL){
+        SPI_DEV_ERROR("path NULL");
+        return -EINVAL;
+    }
+
+    if(buf == NULL){
+        SPI_DEV_ERROR("buf NULL");
+        return -EINVAL;
+    }
+
+    if (count > MAX_RW_LEN) {
+        SPI_DEV_ERROR("write count %lu, beyond max:%d.\n", count, MAX_RW_LEN);
+        return -EINVAL;
+    }
+
+    spi_dev = dev_match(path);
+    if (spi_dev == NULL) {
+        SPI_DEV_ERROR("i2c_dev match failed. dev path = %s", path);
+        return -EINVAL;
+    }
+
+    ret = device_write (spi_dev, offset, buf, count);
+    if (ret < 0) {
+        SPI_DEV_ERROR("i2c dev write failed, dev name:%s, offset:0x%x, len:%lu.\n",
+            spi_dev->name, offset, count);
+        return -EINVAL;
+    }
+
+    return count;
+}
+EXPORT_SYMBOL(spi_device_func_write);
+
+static int spi_dev_probe(struct spi_device *spi)
+{
+    int ret;
+    struct spi_dev_info *spi_dev;
+    struct miscdevice *misc;
+    spi_dev_device_t *spi_dev_device;
+
+    spi_dev = devm_kzalloc(&spi->dev, sizeof(struct spi_dev_info), GFP_KERNEL);
+    if (!spi_dev) {
+        dev_err(&spi->dev, "devm_kzalloc error. \n");
+        return -ENOMEM;
+    }
+
+    spi_set_drvdata(spi, spi_dev);
+    spi_dev->spi_device = spi;
+
+    if (spi->dev.of_node) {
+
+        ret = 0;
+        ret += of_property_read_string(spi->dev.of_node, "spi_dev_name", &spi_dev->name);
+        ret += of_property_read_u32(spi->dev.of_node, "data_bus_width", &spi_dev->data_bus_width);
+        ret += of_property_read_u32(spi->dev.of_node, "addr_bus_width", &spi_dev->addr_bus_width);
+        ret += of_property_read_u32(spi->dev.of_node, "per_rd_len", &spi_dev->per_rd_len);
+        ret += of_property_read_u32(spi->dev.of_node, "per_wr_len", &spi_dev->per_wr_len);
+        ret += of_property_read_u32(spi->dev.of_node, "spi_len", &spi_dev->spi_len);
+        if (ret != 0) {
+            dev_err(&spi->dev, "dts config error.ret:%d.\n", ret);
+            return -ENXIO;
+        }
+    } else {
+        if (spi->dev.platform_data == NULL) {
+            dev_err(&spi->dev, "Failed to get platform data config.\n");
+            return -ENXIO;
+        }
+        spi_dev_device = spi->dev.platform_data;
+        spi_dev->name = spi_dev_device->spi_dev_name;
+        spi_dev->data_bus_width = spi_dev_device->data_bus_width;
+        spi_dev->addr_bus_width = spi_dev_device->addr_bus_width;
+        spi_dev->per_rd_len = spi_dev_device->per_rd_len;
+        spi_dev->per_wr_len = spi_dev_device->per_wr_len;
+        spi_dev->spi_len = spi_dev_device->spi_len;
+    }
+
+    if ((spi_dev->per_rd_len & (spi_dev->data_bus_width - 1))
+            || (spi_dev->per_wr_len & (spi_dev->data_bus_width - 1))) {
+        dev_err(&spi->dev, "Invalid config per_rd_len [%u] per_wr_len [%u] data bus_width [%u], addr bus width [%u].\n",
+            spi_dev->per_rd_len, spi_dev->per_wr_len, spi_dev->data_bus_width, spi_dev->addr_bus_width);
+        return -ENXIO;
+    }
+
+    misc = &spi_dev->misc;
+    misc->minor = MISC_DYNAMIC_MINOR;
+    misc->name = spi_dev->name;
+    misc->fops = &spi_dev_fops;
+    misc->mode = 0666;
+    if (misc_register(misc) != 0) {
+        dev_err(&spi->dev, "register %s faild.\n", misc->name);
+        return -ENXIO;
+    }
+
+    if (misc->minor >= MAX_SPI_DEV_NUM) {
+        dev_err(&spi->dev, "minor number beyond the limit! is %d.\n", misc->minor);
+        misc_deregister(misc);
+        return -ENXIO;
+    }
+    spi_dev_arry[misc->minor] = spi_dev;
+
+    dev_info(&spi->dev, "register %u data_bus_width %u addr_bus_witdh 0x%x spi_len device %s with %u per_rd_len %u per_wr_len success.\n",
+        spi_dev->data_bus_width, spi_dev->addr_bus_width, spi_dev->spi_len, spi_dev->name, spi_dev->per_rd_len, spi_dev->per_wr_len);
+
+    return 0;
+}
+
+static int spi_dev_remove(struct spi_device *spi)
+{
+    int i;
+
+    for (i = 0; i < MAX_SPI_DEV_NUM; i++) {
+        if (spi_dev_arry[i] != NULL) {
+            misc_deregister(&spi_dev_arry[i]->misc);
+            spi_dev_arry[i] = NULL;
+        }
+    }
+    return 0;
+}
+
+static const struct of_device_id spi_dev_of_match[] = {
+    { .compatible = "wb-spi-dev" },
+    { },
+};
+
+MODULE_DEVICE_TABLE(of, spi_dev_of_match);
+
+static struct spi_driver spi_dev_driver = {
+    .driver = {
+        .name = "wb-spi-dev",
+        .of_match_table = of_match_ptr(spi_dev_of_match),
+    },
+    .probe      = spi_dev_probe,
+    .remove     = spi_dev_remove,
+};
+
+module_spi_driver(spi_dev_driver);
+
+MODULE_DESCRIPTION("spi dev driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.h
new file mode 100644
index 000000000000..fed5237e3860
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.h
@@ -0,0 +1,17 @@
+#ifndef __WB_SPI_DEV_H__
+#define __WB_SPI_DEV_H__
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+#define SPI_DEV_NAME_MAX_LEN (64)
+
+typedef struct spi_dev_device_s {
+    char spi_dev_name[SPI_DEV_NAME_MAX_LEN];
+    uint32_t data_bus_width;
+    uint32_t addr_bus_width;
+    uint32_t per_rd_len;
+    uint32_t per_wr_len;
+    uint32_t spi_len;
+} spi_dev_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio.c
new file mode 100644
index 000000000000..16408f067be1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio.c
@@ -0,0 +1,477 @@
+/*
+ * SPI master driver using generic bitbanged GPIO
+ *
+ * Copyright (C) 2006,2008 David Brownell
+ * Copyright (C) 2017 Linus Walleij
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/gpio/consumer.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+
+#include <linux/spi/spi.h>
+#include <linux/spi/spi_bitbang.h>
+#include <linux/spi/spi_gpio.h>
+
+/*
+ * This bitbanging SPI master driver should help make systems usable
+ * when a native hardware SPI engine is not available, perhaps because
+ * its driver isn't yet working or because the I/O pins it requires
+ * are used for other purposes.
+ *
+ * platform_device->driver_data ... points to spi_gpio
+ *
+ * spi->controller_state ... reserved for bitbang framework code
+ * spi->controller_data ... holds chipselect GPIO
+ *
+ * spi->master->dev.driver_data ... points to spi_gpio->bitbang
+ */
+
+struct spi_gpio {
+	struct spi_bitbang		bitbang;
+	struct spi_gpio_platform_data	pdata;
+	struct platform_device		*pdev;
+	struct gpio_desc		*sck;
+	struct gpio_desc		*miso;
+	struct gpio_desc		*mosi;
+	struct gpio_desc		**cs_gpios;
+	bool				has_cs;
+};
+
+/*----------------------------------------------------------------------*/
+
+/*
+ * Because the overhead of going through four GPIO procedure calls
+ * per transferred bit can make performance a problem, this code
+ * is set up so that you can use it in either of two ways:
+ *
+ *   - The slow generic way:  set up platform_data to hold the GPIO
+ *     numbers used for MISO/MOSI/SCK, and issue procedure calls for
+ *     each of them.  This driver can handle several such busses.
+ *
+ *   - The quicker inlined way:  only helps with platform GPIO code
+ *     that inlines operations for constant GPIOs.  This can give
+ *     you tight (fast!) inner loops, but each such bus needs a
+ *     new driver.  You'll define a new C file, with Makefile and
+ *     Kconfig support; the C code can be a total of six lines:
+ *
+ *		#define DRIVER_NAME	"myboard_spi2"
+ *		#define	SPI_MISO_GPIO	119
+ *		#define	SPI_MOSI_GPIO	120
+ *		#define	SPI_SCK_GPIO	121
+ *		#define	SPI_N_CHIPSEL	4
+ *		#include "spi-gpio.c"
+ */
+
+#ifndef DRIVER_NAME
+#define DRIVER_NAME	"wb_spi_gpio"
+
+#define GENERIC_BITBANG	/* vs tight inlines */
+
+#endif
+
+/*----------------------------------------------------------------------*/
+
+static inline struct spi_gpio *__pure
+spi_to_spi_gpio(const struct spi_device *spi)
+{
+	const struct spi_bitbang	*bang;
+	struct spi_gpio			*spi_gpio;
+
+	bang = spi_master_get_devdata(spi->master);
+	spi_gpio = container_of(bang, struct spi_gpio, bitbang);
+	return spi_gpio;
+}
+
+static inline struct spi_gpio_platform_data *__pure
+spi_to_pdata(const struct spi_device *spi)
+{
+	return &spi_to_spi_gpio(spi)->pdata;
+}
+
+/* These helpers are in turn called by the bitbang inlines */
+static inline void setsck(const struct spi_device *spi, int is_on)
+{
+	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
+
+	gpiod_set_value_cansleep(spi_gpio->sck, is_on);
+}
+
+static inline void setmosi(const struct spi_device *spi, int is_on)
+{
+	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
+
+	gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
+}
+
+static inline int getmiso(const struct spi_device *spi)
+{
+	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
+
+	if (spi->mode & SPI_3WIRE)
+		return !!gpiod_get_value_cansleep(spi_gpio->mosi);
+	else
+		return !!gpiod_get_value_cansleep(spi_gpio->miso);
+}
+
+/*
+ * NOTE:  this clocks "as fast as we can".  It "should" be a function of the
+ * requested device clock.  Software overhead means we usually have trouble
+ * reaching even one Mbit/sec (except when we can inline bitops), so for now
+ * we'll just assume we never need additional per-bit slowdowns.
+ */
+#define spidelay(nsecs)	do {} while (0)
+
+#include "spi-bitbang-txrx.h"
+
+/*
+ * These functions can leverage inline expansion of GPIO calls to shrink
+ * costs for a txrx bit, often by factors of around ten (by instruction
+ * count).  That is particularly visible for larger word sizes, but helps
+ * even with default 8-bit words.
+ *
+ * REVISIT overheads calling these functions for each word also have
+ * significant performance costs.  Having txrx_bufs() calls that inline
+ * the txrx_word() logic would help performance, e.g. on larger blocks
+ * used with flash storage or MMC/SD.  There should also be ways to make
+ * GCC be less stupid about reloading registers inside the I/O loops,
+ * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
+ */
+
+static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
+		unsigned nsecs, u32 word, u8 bits, unsigned flags)
+{
+	return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
+}
+
+static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
+		unsigned nsecs, u32 word, u8 bits, unsigned flags)
+{
+	return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
+}
+
+static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
+		unsigned nsecs, u32 word, u8 bits, unsigned flags)
+{
+	return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
+}
+
+static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
+		unsigned nsecs, u32 word, u8 bits, unsigned flags)
+{
+	return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
+}
+
+/*
+ * These functions do not call setmosi or getmiso if respective flag
+ * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
+ * call when such pin is not present or defined in the controller.
+ * A separate set of callbacks is defined to get highest possible
+ * speed in the generic case (when both MISO and MOSI lines are
+ * available), as optimiser will remove the checks when argument is
+ * constant.
+ */
+
+static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
+		unsigned nsecs, u32 word, u8 bits, unsigned flags)
+{
+	flags = spi->master->flags;
+	return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
+}
+
+static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
+		unsigned nsecs, u32 word, u8 bits, unsigned flags)
+{
+	flags = spi->master->flags;
+	return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
+}
+
+static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
+		unsigned nsecs, u32 word, u8 bits, unsigned flags)
+{
+	flags = spi->master->flags;
+	return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
+}
+
+static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
+		unsigned nsecs, u32 word, u8 bits, unsigned flags)
+{
+	flags = spi->master->flags;
+	return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
+}
+
+/*----------------------------------------------------------------------*/
+
+static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
+{
+	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
+
+	/* set initial clock line level */
+	if (is_active)
+		gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
+
+	/* Drive chip select line, if we have one */
+	if (spi_gpio->has_cs) {
+		struct gpio_desc *cs = spi_gpio->cs_gpios[spi->chip_select];
+
+		/* SPI chip selects are normally active-low */
+		gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
+	}
+}
+
+static int spi_gpio_setup(struct spi_device *spi)
+{
+	struct gpio_desc	*cs;
+	int			status = 0;
+	struct spi_gpio		*spi_gpio = spi_to_spi_gpio(spi);
+
+	/*
+	 * The CS GPIOs have already been
+	 * initialized from the descriptor lookup.
+	 */
+	cs = spi_gpio->cs_gpios[spi->chip_select];
+	if (!spi->controller_state && cs)
+		status = gpiod_direction_output(cs,
+						!(spi->mode & SPI_CS_HIGH));
+
+	if (!status)
+		status = spi_bitbang_setup(spi);
+
+	return status;
+}
+
+static int spi_gpio_set_direction(struct spi_device *spi, bool output)
+{
+	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
+
+	if (output)
+		return gpiod_direction_output(spi_gpio->mosi, 1);
+	else
+		return gpiod_direction_input(spi_gpio->mosi);
+}
+
+static void spi_gpio_cleanup(struct spi_device *spi)
+{
+	spi_bitbang_cleanup(spi);
+}
+
+/*
+ * It can be convenient to use this driver with pins that have alternate
+ * functions associated with a "native" SPI controller if a driver for that
+ * controller is not available, or is missing important functionality.
+ *
+ * On platforms which can do so, configure MISO with a weak pullup unless
+ * there's an external pullup on that signal.  That saves power by avoiding
+ * floating signals.  (A weak pulldown would save power too, but many
+ * drivers expect to see all-ones data as the no slave "response".)
+ */
+static int spi_gpio_request(struct device *dev,
+			    struct spi_gpio *spi_gpio,
+			    unsigned int num_chipselects,
+			    u16 *mflags)
+{
+	int i;
+
+	spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
+	if (IS_ERR(spi_gpio->mosi))
+		return PTR_ERR(spi_gpio->mosi);
+	if (!spi_gpio->mosi)
+		/* HW configuration without MOSI pin */
+		*mflags |= SPI_MASTER_NO_TX;
+
+	spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
+	if (IS_ERR(spi_gpio->miso))
+		return PTR_ERR(spi_gpio->miso);
+	/*
+	 * No setting SPI_MASTER_NO_RX here - if there is only a MOSI
+	 * pin connected the host can still do RX by changing the
+	 * direction of the line.
+	 */
+
+	spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
+	if (IS_ERR(spi_gpio->sck))
+		return PTR_ERR(spi_gpio->sck);
+
+	for (i = 0; i < num_chipselects; i++) {
+		spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs",
+							     i, GPIOD_OUT_HIGH);
+		if (IS_ERR(spi_gpio->cs_gpios[i]))
+			return PTR_ERR(spi_gpio->cs_gpios[i]);
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_OF
+static const struct of_device_id spi_gpio_dt_ids[] = {
+	{ .compatible = "wb-spi-gpio" },
+	{}
+};
+MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
+
+static int spi_gpio_probe_dt(struct platform_device *pdev)
+{
+	int ret;
+	u32 tmp;
+	struct spi_gpio_platform_data	*pdata;
+	struct device_node *np = pdev->dev.of_node;
+	const struct of_device_id *of_id =
+			of_match_device(spi_gpio_dt_ids, &pdev->dev);
+
+	if (!of_id)
+		return 0;
+
+	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+	if (!pdata)
+		return -ENOMEM;
+
+	ret = of_property_read_u32(np, "num-chipselects", &tmp);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "num-chipselects property not found\n");
+		goto error_free;
+	}
+
+	pdata->num_chipselect = tmp;
+	pdev->dev.platform_data = pdata;
+
+	return 1;
+
+error_free:
+	devm_kfree(&pdev->dev, pdata);
+	return ret;
+}
+#else
+static inline int spi_gpio_probe_dt(struct platform_device *pdev)
+{
+	return 0;
+}
+#endif
+
+static int spi_gpio_probe(struct platform_device *pdev)
+{
+	int				status;
+	struct spi_master		*master;
+	struct spi_gpio			*spi_gpio;
+	struct spi_gpio_platform_data	*pdata;
+	u16 master_flags = 0;
+	bool use_of = 0;
+
+	status = spi_gpio_probe_dt(pdev);
+	if (status < 0)
+		return status;
+	if (status > 0)
+		use_of = 1;
+
+	pdata = dev_get_platdata(&pdev->dev);
+#ifdef GENERIC_BITBANG
+	if (!pdata || (!use_of && !pdata->num_chipselect))
+		return -ENODEV;
+#endif
+
+	master = spi_alloc_master(&pdev->dev, sizeof(*spi_gpio));
+	if (!master)
+		return -ENOMEM;
+
+	spi_gpio = spi_master_get_devdata(master);
+
+	spi_gpio->cs_gpios = devm_kcalloc(&pdev->dev,
+				pdata->num_chipselect,
+				sizeof(*spi_gpio->cs_gpios),
+				GFP_KERNEL);
+	if (!spi_gpio->cs_gpios)
+		return -ENOMEM;
+
+	platform_set_drvdata(pdev, spi_gpio);
+
+	/* Determine if we have chip selects connected */
+	spi_gpio->has_cs = !!pdata->num_chipselect;
+
+	spi_gpio->pdev = pdev;
+	if (pdata)
+		spi_gpio->pdata = *pdata;
+
+	status = spi_gpio_request(&pdev->dev, spi_gpio,
+				  pdata->num_chipselect, &master_flags);
+	if (status)
+		return status;
+
+	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
+	master->mode_bits = SPI_3WIRE | SPI_CPHA | SPI_CPOL | SPI_CS_HIGH;
+	master->flags = master_flags;
+	master->bus_num = pdev->id;
+	/* The master needs to think there is a chipselect even if not connected */
+	master->num_chipselect = spi_gpio->has_cs ? pdata->num_chipselect : 1;
+	master->setup = spi_gpio_setup;
+	master->cleanup = spi_gpio_cleanup;
+
+	if (pdev->dev.of_node) {
+		master->dev.of_node = pdev->dev.of_node;
+	}
+
+	spi_gpio->bitbang.master = master;
+	spi_gpio->bitbang.chipselect = spi_gpio_chipselect;
+	spi_gpio->bitbang.set_line_direction = spi_gpio_set_direction;
+
+	if ((master_flags & SPI_MASTER_NO_TX) == 0) {
+		spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
+		spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
+		spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
+		spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
+	} else {
+		spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
+		spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
+		spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
+		spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
+	}
+	spi_gpio->bitbang.setup_transfer = spi_bitbang_setup_transfer;
+
+	status = spi_bitbang_start(&spi_gpio->bitbang);
+	if (status)
+		spi_master_put(master);
+
+	return status;
+}
+
+static int spi_gpio_remove(struct platform_device *pdev)
+{
+	struct spi_gpio			*spi_gpio;
+	struct spi_gpio_platform_data	*pdata;
+
+	spi_gpio = platform_get_drvdata(pdev);
+	pdata = dev_get_platdata(&pdev->dev);
+
+	/* stop() unregisters child devices too */
+	spi_bitbang_stop(&spi_gpio->bitbang);
+
+	spi_master_put(spi_gpio->bitbang.master);
+
+	return 0;
+}
+
+MODULE_ALIAS("platform:" DRIVER_NAME);
+
+static struct platform_driver spi_gpio_driver = {
+	.driver = {
+		.name	= DRIVER_NAME,
+		.of_match_table = of_match_ptr(spi_gpio_dt_ids),
+	},
+	.probe		= spi_gpio_probe,
+	.remove		= spi_gpio_remove,
+};
+module_platform_driver(spi_gpio_driver);
+
+MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
+MODULE_AUTHOR("support");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio_device.c
new file mode 100644
index 000000000000..e70c97b1af9d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio_device.c
@@ -0,0 +1,153 @@
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/gpio.h>
+#include <linux/gpio/machine.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/spi_gpio.h>
+
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/spi/eeprom.h>
+#include <linux/spi/flash.h>
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+#define DEFAULT_GPIO_SCK        (67)
+#define DEFAULT_GPIO_MISO       (32)
+#define DEFAULT_GPIO_MOSI       (65)
+#define DEFAULT_GPIO_CS         (6)
+#define DEFAULT_SPI_BUS         (0)
+
+static int sck = DEFAULT_GPIO_SCK;
+module_param(sck, int, S_IRUGO | S_IWUSR);
+
+static int miso = DEFAULT_GPIO_MISO;
+module_param(miso, int, S_IRUGO | S_IWUSR);
+
+static int mosi = DEFAULT_GPIO_MOSI;
+module_param(mosi, int, S_IRUGO | S_IWUSR);
+
+static int cs = DEFAULT_GPIO_CS;
+module_param(cs, int, S_IRUGO | S_IWUSR);
+
+static int bus = DEFAULT_SPI_BUS;
+module_param(bus, int, S_IRUGO | S_IWUSR);
+
+static int g_wb_spi_gpio_device_debug = 0;
+static int g_wb_spi_gpio_device_error = 0;
+
+module_param(g_wb_spi_gpio_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_spi_gpio_device_error, int, S_IRUGO | S_IWUSR);
+
+static char gpiod_lookup_table_devid[64];
+
+#define WB_SPI_GPIO_DEVICE_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_spi_gpio_device_debug) { \
+        printk(KERN_INFO "[WB_SPI_GPIO_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_SPI_GPIO_DEVICE_ERROR(fmt, args...) do {                                        \
+    if (g_wb_spi_gpio_device_error) { \
+        printk(KERN_ERR "[WB_SPI_GPIO_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static struct gpiod_lookup_table wb_spi_gpio_table = {
+    .table          = {
+        GPIO_LOOKUP("wb_gpio_d1500", DEFAULT_GPIO_SCK,
+                "sck", GPIO_ACTIVE_HIGH),
+        GPIO_LOOKUP("wb_gpio_d1500", DEFAULT_GPIO_MOSI,
+                "mosi", GPIO_ACTIVE_HIGH),
+        GPIO_LOOKUP("wb_gpio_d1500", DEFAULT_GPIO_MISO,
+                "miso", GPIO_ACTIVE_HIGH),
+        GPIO_LOOKUP("wb_gpio_d1500", DEFAULT_GPIO_CS,
+                "cs", GPIO_ACTIVE_HIGH),
+        { },
+    },
+};
+
+static struct spi_gpio_platform_data spi_pdata = {
+    .num_chipselect = 1,
+};
+
+static void spi_gpio_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device wb_spi_gpio_device = {
+    .name           = "wb_spi_gpio",
+    .num_resources  = 0,
+    .id             = -1,
+
+    .dev = {
+        .platform_data = &spi_pdata,
+        .release = spi_gpio_release,
+    }
+};
+
+static void wb_spi_gpio_table_devid_name_set(void) {
+    int size;
+
+    size = sizeof(gpiod_lookup_table_devid);
+    wb_spi_gpio_device.id = bus;
+
+    mem_clear(gpiod_lookup_table_devid, size);
+    switch (bus) {
+    case PLATFORM_DEVID_NONE:
+        snprintf(gpiod_lookup_table_devid, size, "%s", wb_spi_gpio_device.name);
+        break;
+    case PLATFORM_DEVID_AUTO:
+        snprintf(gpiod_lookup_table_devid, size, "%s.%d.auto", wb_spi_gpio_device.name, bus);
+        break;
+    default:
+        snprintf(gpiod_lookup_table_devid, size, "%s.%d", wb_spi_gpio_device.name, bus);
+        break;
+    }
+
+    wb_spi_gpio_table.dev_id = gpiod_lookup_table_devid;
+    return ;
+}
+static int __init wb_spi_gpio_device_init(void)
+{
+    int err;
+    struct gpiod_lookup *p;
+
+    WB_SPI_GPIO_DEVICE_VERBOSE("enter!\n");
+    wb_spi_gpio_table.table[0].chip_hwnum = sck;
+    wb_spi_gpio_table.table[1].chip_hwnum = mosi;
+    wb_spi_gpio_table.table[2].chip_hwnum = miso;
+    wb_spi_gpio_table.table[3].chip_hwnum = cs;
+    wb_spi_gpio_table_devid_name_set();
+    WB_SPI_GPIO_DEVICE_VERBOSE("spi gpi device table bus[%d] dev id[%s]\n", bus, wb_spi_gpio_table.dev_id);
+    for (p = &wb_spi_gpio_table.table[0]; p->key; p++) {
+        WB_SPI_GPIO_DEVICE_VERBOSE("con_id:%s gpio:%d\n", p->con_id, p->chip_hwnum);
+    }
+
+    gpiod_add_lookup_table(&wb_spi_gpio_table);
+    err = platform_device_register(&wb_spi_gpio_device);
+    if (err < 0) {
+        printk(KERN_ERR "register spi gpio device fail(%d). \n", err);
+        gpiod_remove_lookup_table(&wb_spi_gpio_table);
+        return -1;
+    }
+
+    return 0;
+}
+
+static void __exit wb_spi_gpio_device_exit(void)
+{
+    WB_SPI_GPIO_DEVICE_VERBOSE("enter!\n");
+    platform_device_unregister(&wb_spi_gpio_device);
+    gpiod_remove_lookup_table(&wb_spi_gpio_table);
+}
+
+module_init(wb_spi_gpio_device_init);
+module_exit(wb_spi_gpio_device_exit);
+MODULE_DESCRIPTION("SPI GPIO Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_nor_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_nor_device.c
new file mode 100644
index 000000000000..4196601f717b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_nor_device.c
@@ -0,0 +1,87 @@
+#include <linux/module.h>
+#include <linux/gpio.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/spi_gpio.h>
+
+/* The SPI Bus number that the device is mounted on can be specified manually when this module is loaded */
+#define DEFAULT_SPI_BUS_NUM     (0)
+#define DEFAULT_SPI_CS_NUM      (0)
+#define DEFAULT_SPI_HZ          (100000)
+
+int g_wb_spi_nor_dev_debug = 0;
+int g_wb_spi_nor_dev_error = 0;
+int spi_bus_num = DEFAULT_SPI_BUS_NUM;
+
+module_param(g_wb_spi_nor_dev_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_spi_nor_dev_error, int, S_IRUGO | S_IWUSR);
+module_param(spi_bus_num, int, S_IRUGO | S_IWUSR);
+
+#define SPI_NOR_DEV_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_spi_nor_dev_debug) { \
+        printk(KERN_INFO "[SPI_NOR_DEV][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define SPI_NOR_DEV_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_spi_nor_dev_error) { \
+        printk(KERN_ERR "[SPI_NOR_DEV][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct spi_board_info spi_nor_device_info __initdata= {
+    .modalias           = "mx25l6405d",
+    .bus_num            = DEFAULT_SPI_BUS_NUM,
+    .chip_select        = DEFAULT_SPI_CS_NUM,
+    .max_speed_hz       = 10 * 1000 * 1000,
+};
+
+static struct spi_device *g_spi_device;
+
+static int __init wb_spi_nor_dev_init(void)
+{
+    struct spi_master *master;
+
+    SPI_NOR_DEV_DEBUG_VERBOSE("Enter.\n");
+
+    spi_nor_device_info.bus_num = spi_bus_num;
+    master = spi_busnum_to_master(spi_nor_device_info.bus_num);  /* Get the controller according to the SPI Bus number */
+    if (!master) {
+        SPI_NOR_DEV_DEBUG_ERROR("get bus_num %u spi master failed.\n",
+            spi_nor_device_info.bus_num);
+        return -EINVAL;
+    }
+
+    g_spi_device = spi_new_device(master, &spi_nor_device_info);
+    put_device(&master->dev);
+    if (!g_spi_device) {
+        SPI_NOR_DEV_DEBUG_ERROR("register spi new device failed.\n");
+        return -EPERM;
+    }
+
+    if (g_wb_spi_nor_dev_debug) {
+        dev_info(&g_spi_device->dev, "register %u bus_num spi nor device success\n",
+            spi_nor_device_info.bus_num);
+    }
+
+    return 0;
+}
+
+static void __exit wb_spi_nor_dev_exit(void)
+{
+    spi_unregister_device(g_spi_device);
+
+    if (g_wb_spi_nor_dev_debug) {
+        dev_info(&g_spi_device->dev, "unregister spi nor device success\n");
+    }
+
+    return;
+}
+
+module_init(wb_spi_nor_dev_init);
+module_exit(wb_spi_nor_dev_exit);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("create spi nor device");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.c
new file mode 100644
index 000000000000..a709427c5b73
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.c
@@ -0,0 +1,1025 @@
+/*
+ * wb_spi_ocores.c
+ * ko to create ocores spi adapter
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <linux/spi/spi_bitbang.h>
+#include <linux/module.h>
+#include <linux/jiffies.h>
+#include <linux/wait.h>
+#include <linux/of_platform.h>
+#include <linux/of.h>
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+
+#include "wb_spi_ocores.h"
+
+#define SPIOC_WAIT_SCH        (5)
+#define SPIOC_CONF            (0x00)
+#define SPIOC_LSBF            BIT(0)    /* 0:MSB 1:LSB */
+#define SPIOC_IDLE_LOW        BIT(1)
+#define SPIOC_INTREN          BIT(2)    /* 0:enable 1:disabel */
+#define SPIOC_DIV_MASK        (0xf0)
+#define SPIOC_MAX_DIV         (0x0E)
+#define SPIOC_DIV(div)        (((div) & 0x0f) << 4)
+
+#define SPIOC_STS             (0x01)
+#define SPIOC_INTR_STS        BIT(0)
+#define SPIOC_BUSY_STS        BIT(1)
+#define SPIOC_RXNUM_SHIFT     (4)
+#define SPIOC_RXNUM_MASK      (0xf << SPIOC_RXNUM_SHIFT)
+/* Just for read */
+#define SPIOC_RXNUM(reg)      (((reg) & SPIOC_RXNUM_MASK) >> SPIOC_RXNUM_SHIFT )
+
+#define SPIOC_TXTOT_NUM       (0x02)
+#define SPIOC_TXNUM(reg)      ((reg) & 0x0f)
+#define SPIOC_TOTNUM(reg)     (((reg) & 0x0f) << 4)
+
+#define SPIOC_TXCTL           (0x03)
+#define SPIOC_CSLV            BIT(0) /* 0:Deassert SPICS 1:Laeve SPICS */
+#define SPIOC_TRSTART         BIT(1)
+#define SPIOC_CSID_SHIFT      (5)
+#define SPIOC_CSID_MASK       (0x7 << SPIOC_CSID_SHIFT)
+/* Just for write */
+#define SPIOC_CSID(id)        (((id) << SPIOC_CSID_SHIFT) & SPIOC_CSID_MASK)
+
+/* Just single byte */
+#define SPIOC_RX(i)           ((0x4) + i)
+#define SPIOC_TX(i)           ((0x4) + i)
+
+#define SPIOC_MAX_LEN         ((unsigned int)8)
+#define SPIOC_TXRX_MAX_LEN    ((unsigned int)7)
+
+#define MODEBITS              (SPI_CPHA |SPI_CPOL | SPI_LSB_FIRST |SPI_CS_HIGH)
+
+#define REG_IO_WIDTH_1        (1)
+#define REG_IO_WIDTH_2        (2)
+#define REG_IO_WIDTH_4        (4)
+
+#define SYMBOL_I2C_DEV_MODE   (1)
+#define FILE_MODE             (2)
+#define SYMBOL_PCIE_DEV_MODE  (3)
+#define SYMBOL_IO_DEV_MODE    (4)
+
+int g_spi_oc_debug = 0;
+int g_spi_oc_error = 0;
+
+module_param(g_spi_oc_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_spi_oc_error, int, S_IRUGO | S_IWUSR);
+
+#define SPI_OC_VERBOSE(fmt, args...) do {                                        \
+    if (g_spi_oc_debug) { \
+        printk(KERN_INFO "[OC_SPI_BUS][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define SPI_OC_ERROR(fmt, args...) do {                                        \
+    if (g_spi_oc_error) { \
+        printk(KERN_ERR "[OC_SPI_BUS][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct spioc {
+    /* bitbang has to be first */
+    struct spi_bitbang bitbang;
+    int irq;
+    struct completion done;
+    unsigned int reamin_len;
+    unsigned int cur_pos;
+    unsigned int cur_len;
+    const u8 *txp;
+    u8 *rxp;
+    u8 chip_select;
+    void (*setreg)(struct spioc *spioc, int reg, u32 value);
+    u32 (*getreg)(struct spioc *spioc, int reg);
+    uint32_t bus_num;
+    const char *dev_name;
+    uint32_t reg_access_mode;
+    uint32_t base_addr;
+    uint32_t reg_shift;
+    uint32_t reg_io_width;
+    uint32_t num_chipselect;
+    uint32_t freq;
+    uint32_t big_endian;
+    struct device *dev;
+    int transfer_busy_flag;
+};
+
+extern int i2c_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int i2c_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int pcie_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int pcie_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int io_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int io_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+
+static int oc_spi_file_read(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    filp = filp_open(path, O_RDONLY, 0);
+    if (IS_ERR(filp)) {
+        SPI_OC_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    ret = kernel_read(filp, val, size, &tmp_pos);
+    if (ret < 0) {
+        SPI_OC_ERROR("kernel_read failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int oc_spi_file_write(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    filp = filp_open(path, O_RDWR, 777);
+    if (IS_ERR(filp)) {
+        SPI_OC_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    ret = kernel_write(filp, val, size, &tmp_pos);
+    if (ret < 0) {
+        SPI_OC_ERROR("kernel_write failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    vfs_fsync(filp, 1);
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int oc_spi_reg_write(struct spioc *spioc, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+
+    switch (spioc->reg_access_mode) {
+    case SYMBOL_I2C_DEV_MODE:
+        ret = i2c_device_func_write(spioc->dev_name, pos, val, size);
+        break;
+    case FILE_MODE:
+        ret = oc_spi_file_write(spioc->dev_name, pos, val, size);
+        break;
+    case SYMBOL_PCIE_DEV_MODE:
+        ret = pcie_device_func_write(spioc->dev_name, pos, val, size);
+        break;
+    case SYMBOL_IO_DEV_MODE:
+        ret = io_device_func_write(spioc->dev_name, pos, val, size);
+        break;
+    default:
+        SPI_OC_ERROR("err func_mode, write failed.\n");
+        return -EINVAL;
+    }
+
+    return ret;
+}
+
+static int oc_spi_reg_read(struct spioc *spioc, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+
+    switch (spioc->reg_access_mode) {
+    case SYMBOL_I2C_DEV_MODE:
+        ret = i2c_device_func_read(spioc->dev_name, pos, val, size);
+        break;
+    case FILE_MODE:
+        ret = oc_spi_file_read(spioc->dev_name, pos, val, size);
+        break;
+    case SYMBOL_PCIE_DEV_MODE:
+        ret = pcie_device_func_read(spioc->dev_name, pos, val, size);
+        break;
+    case SYMBOL_IO_DEV_MODE:
+        ret = io_device_func_read(spioc->dev_name, pos, val, size);
+        break;
+    default:
+        SPI_OC_ERROR("err func_mode, read failed.\n");
+        return -EINVAL;
+    }
+
+    return ret;
+}
+
+static void oc_spi_setreg_8(struct spioc *spioc, int reg, u32 value)
+{
+    u8 buf_tmp[REG_IO_WIDTH_1];
+    u32 pos;
+
+    pos = spioc->base_addr + (reg << spioc->reg_shift);
+    SPI_OC_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        spioc->dev_name, spioc->reg_access_mode, pos, value);
+
+    buf_tmp[0] = (value & 0Xff);
+    oc_spi_reg_write(spioc, pos, buf_tmp, REG_IO_WIDTH_1);
+    return;
+}
+
+static void oc_spi_setreg_16(struct spioc *spioc, int reg, u32 value)
+{
+    u8 buf_tmp[REG_IO_WIDTH_2];
+    u32 pos;
+
+    pos = spioc->base_addr + (reg << spioc->reg_shift);
+    SPI_OC_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        spioc->dev_name, spioc->reg_access_mode, pos, value);
+
+    buf_tmp[0] = (value & 0Xff);
+    buf_tmp[1] = (value >> 8) & 0xff;
+    oc_spi_reg_write(spioc, pos, buf_tmp, REG_IO_WIDTH_2);
+    return;
+}
+
+static void oc_spi_setreg_32(struct spioc *spioc, int reg, u32 value)
+{
+    u8 buf_tmp[REG_IO_WIDTH_4];
+    u32 pos;
+
+    pos = spioc->base_addr + (reg << spioc->reg_shift);
+    SPI_OC_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        spioc->dev_name, spioc->reg_access_mode, pos, value);
+
+    buf_tmp[0] = (value & 0xff);
+    buf_tmp[1] = (value >> 8) & 0xff;
+    buf_tmp[2] = (value >> 16) & 0xff;
+    buf_tmp[3] = (value >> 24) & 0xff;
+
+    oc_spi_reg_write(spioc, pos, buf_tmp, REG_IO_WIDTH_4);
+    return;
+}
+
+static void oc_spi_setreg_16be(struct spioc *spioc, int reg, u32 value)
+{
+    u8 buf_tmp[REG_IO_WIDTH_2];
+    u32 pos;
+
+    pos = spioc->base_addr + (reg << spioc->reg_shift);
+    SPI_OC_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        spioc->dev_name, spioc->reg_access_mode, pos, value);
+
+    buf_tmp[0] = (value >> 8) & 0xff;
+    buf_tmp[1] = (value & 0Xff);
+    oc_spi_reg_write(spioc, pos, buf_tmp, REG_IO_WIDTH_2);
+    return;
+}
+
+static void oc_spi_setreg_32be(struct spioc *spioc, int reg, u32 value)
+{
+    u8 buf_tmp[REG_IO_WIDTH_4];
+    u32 pos;
+
+    pos = spioc->base_addr + (reg << spioc->reg_shift);
+    SPI_OC_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        spioc->dev_name, spioc->reg_access_mode, pos, value);
+
+    buf_tmp[0] = (value >> 24) & 0xff;
+    buf_tmp[1] = (value >> 16) & 0xff;
+    buf_tmp[2] = (value >> 8) & 0xff;
+    buf_tmp[3] = (value & 0xff);
+    oc_spi_reg_write(spioc, pos, buf_tmp, REG_IO_WIDTH_4);
+    return;
+}
+
+static inline u32 oc_spi_getreg_8(struct spioc *spioc, int reg)
+{
+    u8 buf_tmp[REG_IO_WIDTH_1];
+    u32 value, pos;
+
+    pos = spioc->base_addr + (reg << spioc->reg_shift);
+    oc_spi_reg_read(spioc, pos, buf_tmp, REG_IO_WIDTH_1);
+    value = buf_tmp[0];
+
+    SPI_OC_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        spioc->dev_name, spioc->reg_access_mode, pos, value);
+
+    return value;
+}
+
+static inline u32 oc_spi_getreg_16(struct spioc *spioc, int reg)
+{
+    u8 buf_tmp[REG_IO_WIDTH_2];
+    u32 value, pos;
+    int i;
+
+    pos = spioc->base_addr + (reg << spioc->reg_shift);
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    oc_spi_reg_read(spioc, pos, buf_tmp, REG_IO_WIDTH_2);
+
+    value = 0;
+    for (i = 0; i < REG_IO_WIDTH_2 ; i++) {
+        value |= buf_tmp[i] << (8 * i);
+    }
+
+    SPI_OC_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        spioc->dev_name, spioc->reg_access_mode, pos, value);
+    return value;
+}
+
+static inline u32 oc_spi_getreg_32(struct spioc *spioc, int reg)
+{
+    u8 buf_tmp[REG_IO_WIDTH_4];
+    u32 value, pos;
+    int i;
+
+    pos = spioc->base_addr + (reg << spioc->reg_shift);
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    oc_spi_reg_read(spioc, pos, buf_tmp, REG_IO_WIDTH_4);
+
+    value = 0;
+    for (i = 0; i < REG_IO_WIDTH_4 ; i++) {
+        value |= buf_tmp[i] << (8 * i);
+    }
+    SPI_OC_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        spioc->dev_name, spioc->reg_access_mode, pos, value);
+    return value;
+}
+
+static inline u32 oc_spi_getreg_16be(struct spioc *spioc, int reg)
+{
+    u8 buf_tmp[REG_IO_WIDTH_2];
+    u32 value, pos;
+    int i;
+
+    pos = spioc->base_addr + (reg << spioc->reg_shift);
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    oc_spi_reg_read(spioc, pos, buf_tmp, REG_IO_WIDTH_2);
+
+    value = 0;
+    for (i = 0; i < REG_IO_WIDTH_2 ; i++) {
+        value |= buf_tmp[i] << (8 * (REG_IO_WIDTH_2 -i - 1));
+    }
+
+    SPI_OC_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        spioc->dev_name, spioc->reg_access_mode, pos, value);
+    return value;
+}
+
+static inline u32 oc_spi_getreg_32be(struct spioc *spioc, int reg)
+{
+    u8 buf_tmp[REG_IO_WIDTH_4];
+    u32 value, pos;
+    int i;
+
+    pos = spioc->base_addr + (reg << spioc->reg_shift);
+
+    mem_clear(buf_tmp, sizeof(buf_tmp));
+    oc_spi_reg_read(spioc, pos, buf_tmp, REG_IO_WIDTH_4);
+
+    value = 0;
+    for (i = 0; i < REG_IO_WIDTH_4 ; i++) {
+        value |= buf_tmp[i] << (8 * (REG_IO_WIDTH_4 -i - 1));
+    }
+
+    SPI_OC_VERBOSE("path:%s, access mode:%d, pos:0x%x, value0x%x.\n",
+        spioc->dev_name, spioc->reg_access_mode, pos, value);
+    return value;
+
+}
+
+static inline void oc_spi_setreg(struct spioc *spioc, int reg, u32 value)
+{
+    spioc->setreg(spioc, reg, value);
+    return;
+}
+
+static inline u32 oc_spi_getreg(struct spioc *spioc, int reg)
+{
+    return spioc->getreg(spioc, reg);
+}
+
+static int spioc_get_clkdiv(struct spioc *spioc, u32 speed)
+{
+    u32 rate, div;
+
+    rate = spioc->freq;
+    SPI_OC_VERBOSE("clk get rate:%u, speed:%u\n", rate, speed);
+    /* fs = fw/((DIV+2)*2) */
+
+    if (speed > (rate / 4)) {
+        div = 0;
+        SPI_OC_VERBOSE("spi device speed[%u] more than a quarter of clk rate[%u].\n",
+            speed, rate);
+        return div;
+    }
+    div = (rate/(2 * speed)) - 2;
+    if (div > SPIOC_MAX_DIV) {
+        SPI_OC_ERROR("Unsupport spi device speed, div:%u.\n", div);
+        return -1;
+    }
+    SPI_OC_VERBOSE("DIV is:0x%x\n", div);
+    return div;
+}
+
+static inline int spioc_wait_trans(struct spioc *spioc, const unsigned long timeout)
+{
+    unsigned long j;
+    unsigned int sch_time;
+    u8 reg;
+
+    j = jiffies + timeout;
+    sch_time = SPIOC_WAIT_SCH;
+    while (1) {
+        reg = oc_spi_getreg(spioc, SPIOC_STS);
+        if (!(reg & SPIOC_BUSY_STS)) {
+            SPI_OC_VERBOSE("wait ok!\n");
+            break;
+        }
+
+        if (time_after(jiffies, j)) {
+            return -ETIMEDOUT;
+        }
+
+        usleep_range(sch_time, sch_time + 1);
+    }
+
+    return 0;
+}
+
+static void spioc_chipselect(struct spi_device *spi, int is_active)
+{
+    struct spioc *spioc;
+    u8 tx_conf;
+    int ret;
+
+    spioc = spi_master_get_devdata(spi->master);
+    spioc->transfer_busy_flag = 0;
+    ret = spioc_wait_trans(spioc, msecs_to_jiffies(100));
+    if (ret < 0) {
+        SPI_OC_ERROR("spi transfer is busy, ret=%d.\n", ret);
+        spioc->transfer_busy_flag = 1;
+        return;
+    }
+    spioc->chip_select = spi->chip_select;
+    SPI_OC_VERBOSE("spioc_chipselect:%u, value:%d.\n", spioc->chip_select, is_active);
+    tx_conf = 0;
+    tx_conf |= SPIOC_CSID(spioc->chip_select);
+    if (is_active) {
+        tx_conf |= SPIOC_CSLV;
+    }
+
+    SPI_OC_VERBOSE("tx_config:[0x%x]\n", tx_conf);
+    oc_spi_setreg(spioc, SPIOC_TXCTL, tx_conf);
+    return;
+}
+
+static void spioc_copy_tx(struct spioc *spioc)
+{
+    const u8 *src;
+    int i;
+
+    if (!spioc->txp) {
+        SPI_OC_ERROR("spioc->txp is NULL.\n");
+        return;
+    }
+
+    src = (u8 *)spioc->txp + spioc->cur_pos;
+    SPI_OC_VERBOSE("current tx len:0x%x, tx pos:[0x%x]\n", spioc->cur_len, spioc->cur_pos);
+
+    for (i = 0; i < spioc->cur_len; i++) {
+        SPI_OC_VERBOSE("write %d, val:[0x%x]\n", i, src[i]);
+        oc_spi_setreg(spioc, SPIOC_TX(i), src[i]);
+    }
+}
+
+static void spioc_copy_rx(struct spioc *spioc)
+{
+    u8 *dest;
+    int i;
+
+    if (!spioc->rxp) {
+        SPI_OC_ERROR("spioc->rxp is NULL.\n");
+        return;
+    }
+
+    dest = (u8 *)spioc->rxp + spioc->cur_pos;
+    SPI_OC_VERBOSE("current rx len:0x%x, rx pos:[0x%x]\n", spioc->cur_len, spioc->cur_pos);
+
+    for (i = 0; i < spioc->cur_len; i++) {
+        dest[i] = oc_spi_getreg(spioc, SPIOC_RX(i));
+        SPI_OC_VERBOSE("read %d, val:[0x%x]\n", i, dest[i]);
+    }
+}
+
+static int spioc_setup_transfer(struct spi_device *spi, struct spi_transfer *transfer)
+{
+    struct spioc *spioc;
+    u8 ctrl;
+    u32 hz;
+    int div;
+
+    spioc = spi_master_get_devdata(spi->master);
+    ctrl = 0;
+
+    if (spi->mode & SPI_LSB_FIRST) {
+        ctrl |= SPIOC_LSBF;
+    }
+
+    if (!(spi->mode & SPI_CPOL)) {
+        ctrl |= SPIOC_IDLE_LOW;
+    }
+
+    if (spioc->irq < 0) {
+
+        ctrl |= SPIOC_INTREN;
+    }
+
+    if (transfer != NULL) {
+        hz = transfer->speed_hz;
+
+        if (hz == 0) {
+            hz = spi->max_speed_hz;
+        }
+    } else {
+        hz = spi->max_speed_hz;
+    }
+
+    if (hz == 0) {
+        SPI_OC_ERROR("Unsupport zero speed.\n");
+        return -EINVAL;
+    }
+
+    div = spioc_get_clkdiv(spioc, hz);
+    if (div < 0) {
+        SPI_OC_ERROR("get div error, div:%d.\n", div);
+        return -EINVAL;
+    }
+    ctrl |= SPIOC_DIV(div);
+
+    SPI_OC_VERBOSE("ctrl:[0x%x].\n", ctrl);
+
+    oc_spi_setreg(spioc, SPIOC_CONF, ctrl);
+    return 0;
+}
+
+static int spioc_spi_setup(struct spi_device *spi)
+{
+    struct spioc *spioc;
+
+    if (!(spi->mode & SPI_CPHA)) {
+        SPI_OC_ERROR("Unsupport spi device mde:0x%x, SPI_CPHA must be 1.\n", spi->mode);
+        return -EINVAL;
+    }
+
+    spioc = spi_master_get_devdata(spi->master);
+    if (spi->chip_select >= spioc->num_chipselect) {
+        SPI_OC_ERROR("Spi device chipselect:%u, more than max chipselect:%u.\n",
+            spi->chip_select, spioc->num_chipselect);
+        return -EINVAL;
+    }
+    SPI_OC_VERBOSE("Support spi device mode:0x%x, chip_select:%u.\n",
+        spi->mode, spi->chip_select);
+    return 0;
+}
+
+static int spioc_transfer_start(struct spioc *spioc)
+{
+    u8 tx_conf;
+    int ret;
+
+    tx_conf = oc_spi_getreg(spioc, SPIOC_TXCTL);
+    tx_conf |= SPIOC_TRSTART;
+
+    SPI_OC_VERBOSE("tx_config:[0x%x]\n", tx_conf);
+    oc_spi_setreg(spioc, SPIOC_TXCTL, tx_conf);
+
+    ret = spioc_wait_trans(spioc, msecs_to_jiffies(100));
+    return ret;
+}
+
+static int spioc_tx_start_one(struct spioc *spioc)
+{
+    unsigned int txlen;
+    u8 txreg;
+    int ret;
+
+    if (!spioc->reamin_len) {
+        SPI_OC_VERBOSE("spioc txlen:[0x0]\n");
+        return 0;
+    }
+
+    spioc->cur_len = spioc->reamin_len > SPIOC_MAX_LEN ? SPIOC_MAX_LEN : spioc->reamin_len;
+
+    txlen = spioc->cur_len;
+    spioc->reamin_len -= txlen;
+    SPI_OC_VERBOSE("txlen:[0x%x], tx len remain:[0x%x]\n", txlen, spioc->reamin_len);
+
+    spioc_copy_tx(spioc);
+
+    /* when we only send, txlen == totlen */
+    txreg = SPIOC_TXNUM(txlen) | SPIOC_TOTNUM(txlen);
+    SPI_OC_VERBOSE("txreg:[0x%x]\n", txreg);
+    oc_spi_setreg(spioc, SPIOC_TXTOT_NUM, txreg);
+
+    ret = spioc_transfer_start(spioc);
+    if (ret) {
+        SPI_OC_ERROR("spioc tx rx poll wait for transfer timeout.\n");
+        return ret;
+    }
+
+    if (spioc->reamin_len) {
+        spioc->cur_pos += txlen;
+        SPI_OC_VERBOSE("cur_txpos:[0x%x]\n", spioc->cur_pos);
+    }
+
+    return 0;
+}
+
+static int spioc_rx_start_one(struct spioc *spioc)
+{
+    unsigned int rxlen;
+    u8 txtnum;
+    int ret;
+
+    if (!spioc->reamin_len) {
+        SPI_OC_VERBOSE("spioc reamin_len:[0x0]\n");
+        return 0;
+    }
+
+    spioc->cur_len = spioc->reamin_len > SPIOC_MAX_LEN ? SPIOC_MAX_LEN : spioc->reamin_len;
+
+    rxlen = spioc->cur_len;
+    spioc->reamin_len -= rxlen;
+    SPI_OC_VERBOSE("rxlen:[0x%x], rx len remain:[0x%x]\n", rxlen, spioc->reamin_len);
+
+    /* when we only receive, rxnum=totnum. txnum=0 */
+    txtnum = SPIOC_TOTNUM(rxlen);
+    SPI_OC_VERBOSE("tx total reg:0x%x\n", txtnum);
+    oc_spi_setreg(spioc, SPIOC_TXTOT_NUM, txtnum);
+
+    ret = spioc_transfer_start(spioc);
+    if (ret) {
+        SPI_OC_ERROR("spioc tx rx poll wait for transfer timeout.\n");
+        return ret;
+    }
+
+    spioc_copy_rx(spioc);
+
+    if (spioc->reamin_len) {
+        spioc->cur_pos += rxlen;
+        SPI_OC_VERBOSE("cur_rxpos:[0x%x]\n", spioc->cur_pos);
+    }
+
+    return 0;
+}
+
+static int spioc_tx_rx_start_one(struct spioc *spioc)
+{
+    unsigned int txlen, total_len;
+    u8 txreg;
+    int ret;
+
+    if (!spioc->reamin_len) {
+        SPI_OC_VERBOSE("spioc reamin_len:[0x0]\n");
+        return 0;
+    }
+
+    spioc->cur_len = spioc->reamin_len > SPIOC_TXRX_MAX_LEN ? SPIOC_TXRX_MAX_LEN : spioc->reamin_len;
+
+    txlen = spioc->cur_len;
+    spioc->reamin_len -= txlen;
+    SPI_OC_VERBOSE("tx len:[0x%x], tx len remain:[0x%x]\n", txlen, spioc->reamin_len);
+
+    spioc_copy_tx(spioc);
+
+    total_len = 2 * txlen;      /* total_len=txlen + rxlen; rxlen=txlen */
+    txreg = SPIOC_TXNUM(txlen) | SPIOC_TOTNUM(total_len);
+    SPI_OC_VERBOSE("txreg:[0x%x]\n", txreg);
+    oc_spi_setreg(spioc, SPIOC_TXTOT_NUM, txreg);
+
+    ret = spioc_transfer_start(spioc);
+    if (ret) {
+        SPI_OC_ERROR("spioc tx rx poll wait for transfer timeout.\n");
+        return ret;
+    }
+
+    spioc_copy_rx(spioc);
+    if (spioc->reamin_len) {
+        spioc->cur_pos += txlen;
+        SPI_OC_VERBOSE("cur_txrx pos:[0x%x]\n", spioc->cur_pos);
+    }
+    return 0;
+}
+
+static int spioc_spi_txrx_bufs(struct spi_device *spi, struct spi_transfer *t)
+{
+    struct spioc *spioc;
+    int ret , len;
+
+    if(!t->len || (!t->tx_buf && !t->rx_buf)) {
+        SPI_OC_ERROR("params error, tx_buf and rx_buf may both NULL, transfer len:0x%x.\n",
+            t->len);
+        return 0;
+    }
+
+    spioc = spi_master_get_devdata(spi->master);
+    if (spioc->transfer_busy_flag) {
+        ret = -EBUSY;
+        goto err;
+    }
+
+    spioc->txp = t->tx_buf;
+    spioc->rxp = t->rx_buf;
+    spioc->reamin_len = t->len;
+    spioc->cur_len = 0;
+    spioc->cur_pos = 0;
+    len = t->len;
+    ret = 0;
+    if (spioc->irq >= 0) {
+        /* use interrupt driven data transfer */
+        if (t->tx_buf && t->rx_buf) {
+            spioc_tx_rx_start_one(spioc);
+            wait_for_completion(&spioc->done);
+        } else if (t->tx_buf) {
+            spioc_tx_start_one(spioc);
+            wait_for_completion(&spioc->done);
+
+        } else {
+            spioc_rx_start_one(spioc);
+            wait_for_completion(&spioc->done);
+        }
+    } else {
+        if (t->tx_buf && t->rx_buf) {
+            SPI_OC_VERBOSE("start tx rx, len:0x%x\n", t->len);
+            while (spioc->reamin_len) {
+                ret = spioc_tx_rx_start_one(spioc);
+                if (ret) {
+                    goto err;
+                }
+            }
+        } else if (t->tx_buf) {
+            SPI_OC_VERBOSE("start tx, txlen:0x%x\n", t->len);
+            while (spioc->reamin_len) {
+                ret = spioc_tx_start_one(spioc);
+                if (ret) {
+                    goto err;
+                }
+            }
+        } else {
+            SPI_OC_VERBOSE("start rx, rxlen:0x%x\n", t->len);
+            while (spioc->reamin_len) {
+                ret = spioc_rx_start_one(spioc);
+                if (ret) {
+                    goto err;
+                }
+            }
+        }
+    }
+    SPI_OC_VERBOSE("return num: 0x%x\n", len);
+    return len;
+err:
+    return ret;
+}
+
+static irqreturn_t spioc_spi_irq(int irq, void *dev)
+{
+    struct spioc *spioc;
+
+    spioc = dev;
+    /* gooooohi, interrupt status bit judgment is not done */
+
+    if (spioc->txp && spioc->rxp) {
+        if (!spioc->reamin_len) {
+            complete(&spioc->done);
+        } else {
+            spioc_tx_rx_start_one(spioc);
+        }
+    } else if (spioc->txp) {
+        if (!spioc->reamin_len) {
+            complete(&spioc->done);
+        } else {
+            spioc_tx_start_one(spioc);
+        }
+    } else if (spioc->rxp){
+        if (!spioc->reamin_len) {
+            complete(&spioc->done);
+        } else {
+            spioc_rx_start_one(spioc);
+        }
+    }
+
+    return IRQ_HANDLED;
+}
+
+static int ocores_spi_config_init(struct spioc *spioc)
+{
+    int ret = 0;
+    struct device *dev;
+    spi_ocores_device_t *spi_ocores_device;
+
+    dev = spioc->dev;
+    if (dev->of_node) {
+        ret += of_property_read_string(dev->of_node, "dev_name", &spioc->dev_name);
+        ret += of_property_read_u32(dev->of_node, "dev_base", &spioc->base_addr);
+        ret += of_property_read_u32(dev->of_node, "reg_shift", &spioc->reg_shift);
+        ret += of_property_read_u32(dev->of_node, "reg_io_width", &spioc->reg_io_width);
+        ret += of_property_read_u32(dev->of_node, "clock-frequency", &spioc->freq);
+        ret += of_property_read_u32(dev->of_node, "reg_access_mode", &spioc->reg_access_mode);
+        ret += of_property_read_u32(dev->of_node, "num_chipselect", &spioc->num_chipselect);
+
+        if (ret != 0) {
+            SPI_OC_ERROR("dts config error, ret:%d.\n", ret);
+            ret = -ENXIO;
+            return ret;
+        }
+    } else {
+        if (spioc->dev->platform_data == NULL) {
+            SPI_OC_ERROR("platform data config error.\n");
+            ret = -ENXIO;
+            return ret;
+        }
+        spi_ocores_device = spioc->dev->platform_data;
+        spioc->bus_num = spi_ocores_device->bus_num;
+        spioc->dev_name = spi_ocores_device->dev_name;
+        spioc->big_endian = spi_ocores_device->big_endian;
+        spioc->base_addr = spi_ocores_device->dev_base;
+        spioc->reg_shift = spi_ocores_device->reg_shift;
+        spioc->reg_io_width = spi_ocores_device->reg_io_width;
+        spioc->freq = spi_ocores_device->clock_frequency;
+        spioc->reg_access_mode = spi_ocores_device->reg_access_mode;
+        spioc->num_chipselect = spi_ocores_device->num_chipselect;
+    }
+
+    SPI_OC_VERBOSE("name:%s, base:0x%x, reg_shift:0x%x, io_width:0x%x, clock-frequency:0x%x.\n",
+        spioc->dev_name, spioc->base_addr, spioc->reg_shift, spioc->reg_io_width, spioc->freq);
+    SPI_OC_VERBOSE("reg access mode:%u, num_chipselect:%u.\n",
+        spioc->reg_access_mode, spioc->num_chipselect);
+    return ret;
+}
+
+static int spioc_probe(struct platform_device *pdev)
+{
+    struct spi_master *master;
+    struct spioc *spioc;
+    int ret;
+    bool be;
+
+    ret = -1;
+    master = spi_alloc_master(&pdev->dev, sizeof(struct spioc));
+    if (!master) {
+        dev_err(&pdev->dev, "Failed to alloc spi master.\n");
+        goto out;
+    }
+
+    spioc = spi_master_get_devdata(master);
+    platform_set_drvdata(pdev, spioc);
+
+    spioc->dev = &pdev->dev;
+    ret = ocores_spi_config_init(spioc);
+    if (ret != 0) {
+        dev_err(spioc->dev, "Failed to get ocores spi dts config.\n");
+        goto free;
+    }
+
+    if (spioc->dev->of_node) {
+        if (of_property_read_u32(spioc->dev->of_node, "big_endian", &spioc->big_endian)) {
+
+            be = 0;
+        } else {
+            be = spioc->big_endian;
+        }
+    } else {
+        be = spioc->big_endian;
+    }
+
+    if (spioc->reg_io_width == 0) {
+        spioc->reg_io_width = 1; /* Set to default value */
+    }
+
+    if (!spioc->setreg || !spioc->getreg) {
+        switch (spioc->reg_io_width) {
+        case REG_IO_WIDTH_1:
+            spioc->setreg = oc_spi_setreg_8;
+            spioc->getreg = oc_spi_getreg_8;
+            break;
+
+        case REG_IO_WIDTH_2:
+            spioc->setreg = be ? oc_spi_setreg_16be : oc_spi_setreg_16;
+            spioc->getreg = be ? oc_spi_getreg_16be : oc_spi_getreg_16;
+            break;
+
+        case REG_IO_WIDTH_4:
+            spioc->setreg = be ? oc_spi_setreg_32be : oc_spi_setreg_32;
+            spioc->getreg = be ? oc_spi_getreg_32be : oc_spi_getreg_32;
+            break;
+
+        default:
+            dev_err(spioc->dev, "Unsupported I/O width (%d)\n", spioc->reg_io_width);
+            ret = -EINVAL;
+            goto free;
+        }
+    }
+
+    /* master state */
+    master->num_chipselect = spioc->num_chipselect;
+    master->mode_bits = MODEBITS;
+    master->setup = spioc_spi_setup;
+    if (spioc->dev->of_node) {
+        master->dev.of_node = pdev->dev.of_node;
+    } else {
+        master->bus_num = spioc->bus_num;
+    }
+
+    /* setup the state for the bitbang driver */
+    spioc->bitbang.master = master;
+    spioc->bitbang.setup_transfer = spioc_setup_transfer;
+    spioc->bitbang.chipselect = spioc_chipselect;
+    spioc->bitbang.txrx_bufs = spioc_spi_txrx_bufs;
+
+    /* gooooohi need revision */
+    spioc->irq = platform_get_irq(pdev, 0);
+    if (spioc->irq >= 0) {
+        SPI_OC_VERBOSE("spi oc use irq, irq number:%d.\n", spioc->irq);
+        init_completion(&spioc->done);
+        ret = devm_request_irq(&pdev->dev, spioc->irq, spioc_spi_irq, 0,
+                               pdev->name, spioc);
+        if (ret) {
+            dev_err(spioc->dev, "Failed to request irq:%d.\n", spioc->irq);
+            goto free;
+        }
+    }
+
+    ret = spi_bitbang_start(&spioc->bitbang);
+    if (ret) {
+        dev_err(spioc->dev, "Failed to start spi bitbang, ret:%d.\n", ret);
+        goto free;
+    }
+    dev_info(spioc->dev, "registered spi-%d for %s with base address:0x%x success.\n",
+        master->bus_num, spioc->dev_name, spioc->base_addr);
+
+    return ret;
+free:
+    spi_master_put(master);
+out:
+    return ret;
+}
+
+static int spioc_remove(struct platform_device *pdev)
+{
+    struct spioc *spioc;
+    struct spi_master *master;
+
+    spioc = platform_get_drvdata(pdev);
+    master = spioc->bitbang.master;
+    spi_bitbang_stop(&spioc->bitbang);
+    platform_set_drvdata(pdev, NULL);
+    spi_master_put(master);
+
+    return 0;
+}
+
+static const struct of_device_id spioc_match[] = {
+    { .compatible = "wb-spi-oc", },
+    {},
+};
+MODULE_DEVICE_TABLE(of, spioc_match);
+
+static struct platform_driver spioc_driver = {
+    .probe = spioc_probe,
+    .remove = spioc_remove,
+    .driver = {
+        .name  = "wb-spioc",
+        .owner = THIS_MODULE,
+        .of_match_table = spioc_match,
+    },
+};
+
+module_platform_driver(spioc_driver);
+
+MODULE_DESCRIPTION("spi open core adapter driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.h
new file mode 100644
index 000000000000..647ff0c5f9cf
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.h
@@ -0,0 +1,21 @@
+#ifndef __WB_SPI_OCORES_H__
+#define __WB_SPI_OCORES_H__
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
+#define SPI_OCORES_DEV_NAME_MAX_LEN (64)
+
+typedef struct spi_ocores_device_s {
+    uint32_t bus_num;
+    uint32_t big_endian;
+    char dev_name[SPI_OCORES_DEV_NAME_MAX_LEN];
+    uint32_t reg_access_mode;
+    uint32_t dev_base;
+    uint32_t reg_shift;
+    uint32_t reg_io_width;
+    uint32_t clock_frequency;
+    uint32_t num_chipselect;
+    int device_flag;
+} spi_ocores_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_uio_irq.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_uio_irq.c
new file mode 100644
index 000000000000..da2b582443b8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_uio_irq.c
@@ -0,0 +1,282 @@
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/uio_driver.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/kobject.h>
+#include <linux/irq.h>
+#include <linux/gpio.h>
+#include <linux/of.h>
+#include <linux/version.h>
+#include <linux/spinlock.h>
+
+typedef struct dfd_irq_s {
+    int gpio;
+    int irq_type;
+    struct uio_info dfd_irq_info;
+    spinlock_t lock;
+    struct attribute_group attr_group;
+} dfd_irq_t;
+
+#define DRV_NAME                      "uio-irq"
+#define DRV_VERSION                   "1.0"
+#define ENABLE_VAL                    (1)
+#define DISABLE_VAL                   (0)
+
+#define DEBUG_ERR_LEVEL       (0x1)
+#define DEBUG_WARN_LEVEL      (0x2)
+#define DEBUG_INFO_LEVEL      (0x4)
+#define DEBUG_VER_LEVEL       (0x8)
+
+static int debug = 0;
+module_param(debug, int, S_IRUGO | S_IWUSR);
+#define DEBUG_ERROR(fmt, args...)                                                           \
+    do {                                                                                    \
+        if (debug & DEBUG_ERR_LEVEL) {                                                                    \
+            printk(KERN_ERR "[ERR][func:%s line:%d]  "fmt, __func__, __LINE__, ## args);         \
+        } else {                                                                            \
+            pr_debug(fmt, ## args);                                                         \
+        }                                                                                   \
+    } while(0)
+
+#define DEBUG_WARN(fmt, args...)                                                            \
+        do {                                                                                \
+            if (debug & DEBUG_WARN_LEVEL) {                                                                \
+                printk(KERN_WARNING "[WARN][func:%s line:%d]  "fmt, __func__, __LINE__, ## args); \
+            } else {                                                                        \
+                pr_debug(fmt, ## args);                                                     \
+            }                                                                               \
+        } while(0)
+
+#define DEBUG_INFO(fmt, args...)                                                            \
+    do {                                                                                    \
+        if (debug & DEBUG_INFO_LEVEL) {                                                                    \
+            printk(KERN_INFO "[INFO][func:%s line:%d]  "fmt, __func__, __LINE__, ## args);        \
+        } else {                                                                            \
+            pr_debug(fmt, ## args);                                                         \
+        }                                                                                   \
+    } while(0)
+
+#define DEBUG_VERBOSE(fmt, args...)                                                         \
+    do {                                                                                    \
+        if (debug & DEBUG_VER_LEVEL) {                                                                    \
+            printk(KERN_DEBUG "[VER][func:%s line:%d]  "fmt, __func__, __LINE__, ## args);       \
+        } else {                                                                            \
+            pr_debug(fmt, ## args);                                                         \
+        }                                                                                   \
+    } while(0)
+
+static irqreturn_t dfd_genirq_handler(int irq, struct uio_info *dev_info)
+{
+    disable_irq_nosync(irq);
+    DEBUG_VERBOSE("handler disable irq");
+    return IRQ_HANDLED;
+}
+
+static int dfd_genirq_irqcontrol(struct uio_info *dev_info, s32 irq_on)
+{
+    struct irq_data *irqdata;
+
+    irqdata = irq_get_irq_data(dev_info->irq);
+
+    if (irqd_irq_disabled(irqdata) == !irq_on) {
+        DEBUG_VERBOSE("irq already disable");
+        return 0;
+    }
+    if (irq_on) {
+        DEBUG_VERBOSE("irqcontrol enable irq");
+        enable_irq(dev_info->irq);
+    } else {
+        DEBUG_VERBOSE("irqcontrol disable irq");
+        disable_irq(dev_info->irq);
+    }
+
+    return 0;
+}
+
+static ssize_t set_irq_enable(struct device *dev,
+            struct device_attribute *attr,
+            const char *buf, size_t count)
+{
+    dfd_irq_t *dfd_irq;
+    struct uio_info *dev_info;
+    unsigned long flags;
+    int ret, val;
+
+    dfd_irq = dev_get_drvdata(dev);
+    dev_info = &dfd_irq->dfd_irq_info;
+
+    spin_lock_irqsave(&dfd_irq->lock, flags);
+
+    sscanf(buf, "%d", &val);
+    DEBUG_VERBOSE("set val:%d.\n", val);
+
+    if ((val != ENABLE_VAL) && (val != DISABLE_VAL)) {
+        DEBUG_ERROR("unsupport val:%d ", val);
+        ret = -EINVAL;
+        goto fail;
+    }
+
+    if (val) {
+        DEBUG_VERBOSE("sysfs enable irq");
+        enable_irq(dev_info->irq);
+    } else {
+        DEBUG_VERBOSE("sysfs disable irq");
+        disable_irq(dev_info->irq);
+    }
+
+    spin_unlock_irqrestore(&dfd_irq->lock, flags);
+    return count;
+
+fail:
+    spin_unlock_irqrestore(&dfd_irq->lock, flags);
+    return ret;
+}
+
+static DEVICE_ATTR(irq_enable,  S_IWUSR, NULL, set_irq_enable);
+
+static struct attribute *irq_attrs[] = {
+    &dev_attr_irq_enable.attr,
+    NULL,
+};
+
+static struct attribute_group irq_attr_group = {
+    .attrs = irq_attrs,
+};
+
+static int dfd_irq_probe(struct platform_device *pdev)
+{
+    u32 gpio, irq_type, pirq_line;
+    int ret, ret1, ret2;
+    struct uio_info *dfd_irq_info;
+    dfd_irq_t *dfd_irq;
+
+    dfd_irq = kzalloc(sizeof(dfd_irq_t), GFP_KERNEL);
+    if (!dfd_irq) {
+        dev_err(&pdev->dev, "dfd_irq_t kzalloc failed.\n");
+        return -ENOMEM;
+    }
+
+    dfd_irq_info = &dfd_irq->dfd_irq_info;
+    dfd_irq_info->version = "1.0";
+    dfd_irq_info->name = "uio-irq";
+
+    /* get pirq line for x86 */
+    ret1 = of_property_read_u32(pdev->dev.of_node, "pirq-line", &pirq_line);
+    if (!ret1) {
+        DEBUG_VERBOSE("use pirq-line method, pirq-line:%u", pirq_line);
+        dfd_irq_info->irq = pirq_line;
+    }
+
+    ret2 = of_property_read_u32(pdev->dev.of_node, "gpio", &gpio);
+    if (!ret2 && ret1) {
+        dfd_irq->gpio = gpio;
+        gpio_request(dfd_irq->gpio, "GPIOA");
+        dfd_irq_info->irq = gpio_to_irq(dfd_irq->gpio);
+        DEBUG_VERBOSE("use gpio:%u, irq num:%ld", gpio, dfd_irq_info->irq);
+    } else if (ret2 && ret1){
+        ret = -ENXIO;
+        dev_err(&pdev->dev, "no define irq num. ret2:%d, ret1:%d.\n", ret2, ret1);
+        goto free_mem;
+    }
+
+    ret = of_property_read_u32(pdev->dev.of_node, "irq_type", &irq_type);
+    if (!ret && ret1) {
+        DEBUG_VERBOSE("use irq_type:%u", irq_type);
+        dfd_irq->irq_type = irq_type;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39)
+        irq_set_irq_type(dfd_irq_info->irq, dfd_irq->irq_type);
+#else
+        set_irq_type(dfd_irq_info->irq, dfd_irq->irq_type);
+#endif
+    } else if (ret && ret1){
+        ret = -ENXIO;
+        dev_err(&pdev->dev, "no define irq type. ret:%d, ret1:%d.\n", ret, ret1);
+        goto free_mem;
+    }
+
+    dfd_irq_info->irq_flags = IRQF_SHARED;
+    dfd_irq_info->handler = dfd_genirq_handler;
+    dfd_irq_info->irqcontrol = dfd_genirq_irqcontrol;
+
+    if(uio_register_device(&pdev->dev, dfd_irq_info)){
+        ret = -ENODEV;
+        dev_err(&pdev->dev, "uio register failed.\n");
+        goto free_mem;
+    }
+
+    spin_lock_init(&dfd_irq->lock);
+
+    dfd_irq->attr_group = irq_attr_group;
+    ret = sysfs_create_group(&pdev->dev.kobj, &dfd_irq->attr_group);
+    if (ret != 0) {
+        dev_err(&pdev->dev, "sysfs_create_group failed. ret:%d.\n", ret);
+        goto free_mem;
+    }
+    DEBUG_VERBOSE("sysfs create group success\n");
+
+    platform_set_drvdata(pdev, dfd_irq);
+
+    return 0;
+
+free_mem:
+    kfree(dfd_irq);
+
+    return ret;
+}
+
+static int dfd_irq_remove(struct platform_device *pdev)
+{
+    dfd_irq_t *dfd_irq;
+    struct uio_info *dfd_irq_info;
+
+    dfd_irq = platform_get_drvdata(pdev);
+    dfd_irq_info = &dfd_irq->dfd_irq_info;
+
+    uio_unregister_device(dfd_irq_info);
+    kfree(dfd_irq);
+
+    sysfs_remove_group(&pdev->dev.kobj, &dfd_irq->attr_group);
+
+    return 0;
+}
+
+static struct of_device_id dfd_irq_match[] = {
+    {
+        .compatible = "uio-irq",
+    },
+    {},
+};
+MODULE_DEVICE_TABLE(of, dfd_irq_match);
+
+static struct platform_driver dfd_irq_driver = {
+    .probe      = dfd_irq_probe,
+    .remove     = dfd_irq_remove,
+    .driver     = {
+        .owner  = THIS_MODULE,
+        .name   = DRV_NAME,
+        .of_match_table = dfd_irq_match,
+    },
+};
+
+static int __init dfd_irq_init(void)
+{
+    int ret;
+
+    ret =  platform_driver_register(&dfd_irq_driver);
+    if (ret != 0 ) {
+        return ret;
+    }
+
+    return 0;
+}
+
+static void __exit dfd_irq_exit(void)
+{
+    platform_driver_unregister(&dfd_irq_driver);
+}
+
+module_init(dfd_irq_init);
+module_exit(dfd_irq_exit);
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c
new file mode 100644
index 000000000000..8c02d981843a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c
@@ -0,0 +1,1038 @@
+/*
+ * wb_wdt.c
+ * ko for watchdog function
+ */
+
+#include <linux/err.h>
+#include <linux/delay.h>
+#include <linux/module.h>
+#include <linux/of_gpio.h>
+#include <linux/platform_device.h>
+#include <linux/watchdog.h>
+#include <linux/hrtimer.h>
+#include <linux/uaccess.h>
+#include <linux/kthread.h>
+#include <linux/mutex.h>
+#include <linux/hwmon-sysfs.h>
+
+#include "wb_wdt.h"
+
+#define GPIO_FEED_WDT_MODE   (1)
+#define LOGIC_FEED_WDT_MODE  (2)
+
+#define SYMBOL_I2C_DEV_MODE  (1)
+#define SYMBOL_PCIE_DEV_MODE (2)
+#define SYMBOL_IO_DEV_MODE   (3)
+#define FILE_MODE            (4)
+
+#define ONE_BYTE             (1)
+
+#define WDT_OFF              (0)
+#define WDT_ON               (1)
+
+#define MS_TO_S              (1000)
+#define MS_TO_NS             (1000 * 1000)
+
+#define MAX_REG_VAL          (255)
+
+extern int i2c_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int i2c_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int pcie_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int pcie_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int io_device_func_write(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+extern int io_device_func_read(const char *path, uint32_t offset, uint8_t *buf, size_t count);
+
+int g_wb_wdt_debug = 0;
+int g_wb_wdt_error = 0;
+
+module_param(g_wb_wdt_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_wdt_error, int, S_IRUGO | S_IWUSR);
+
+#define WDT_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_wdt_debug) { \
+        printk(KERN_INFO "[WDT][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WDT_ERROR(fmt, args...) do {                                        \
+    if (g_wb_wdt_error) { \
+        printk(KERN_ERR "[WDT][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+enum {
+    HW_ALGO_TOGGLE,
+    HW_ALGO_LEVEL,
+};
+
+enum {
+    WATCHDOG_DEVICE_TYPE    = 0,
+    HRTIMER_TYPE,
+    THREAD_TYPE,
+};
+
+typedef struct wb_wdt_priv_s {
+
+    struct task_struct *thread;
+    struct hrtimer hrtimer;
+    ktime_t   m_kt;
+    const char  *config_dev_name;
+    uint8_t     config_mode;
+    uint8_t     hw_algo;
+    uint8_t     enable_val;
+    uint8_t     disable_val;
+    uint8_t     enable_mask;
+    uint8_t     priv_func_mode;
+    uint8_t     feed_wdt_type;
+    uint32_t    enable_reg;
+    uint32_t    timeout_cfg_reg;
+    uint32_t    timeleft_cfg_reg;
+    uint32_t    hw_margin;
+    uint32_t    feed_time;
+    uint32_t    timer_accuracy;
+    gpio_wdt_info_t     gpio_wdt;
+    logic_wdt_info_t    logic_wdt;
+    struct device *dev;
+    const struct attribute_group *sysfs_group;
+    uint8_t sysfs_index;
+    struct mutex update_lock;
+    struct watchdog_device  wdd;
+}wb_wdt_priv_t;
+
+static int wdt_file_read(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    filp = filp_open(path, O_RDONLY, 0);
+    if (IS_ERR(filp)) {
+        WDT_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    ret = kernel_read(filp, val, size, &tmp_pos);
+    if (ret < 0) {
+        WDT_ERROR("kernel_read failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int wdt_file_write(const char *path, uint32_t pos, uint8_t *val, size_t size)
+{
+    int ret;
+    struct file *filp;
+    loff_t tmp_pos;
+
+    filp = filp_open(path, O_RDWR, 777);
+    if (IS_ERR(filp)) {
+        WDT_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
+        filp = NULL;
+        goto exit;
+    }
+
+    tmp_pos = (loff_t)pos;
+    ret = kernel_write(filp, val, size, &tmp_pos);
+    if (ret < 0) {
+        WDT_ERROR("kernel_write failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        goto exit;
+    }
+
+    vfs_fsync(filp, 1);
+    filp_close(filp, NULL);
+
+    return ret;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+
+    return -1;
+}
+
+static int wb_wdt_read(uint8_t mode, const char *path,
+                uint32_t offset, uint8_t *buf, size_t count)
+{
+    int ret;
+
+    switch (mode) {
+    case SYMBOL_I2C_DEV_MODE:
+        ret = i2c_device_func_read(path, offset, buf, count);
+        break;
+    case SYMBOL_PCIE_DEV_MODE:
+        ret = pcie_device_func_read(path, offset, buf, count);
+        break;
+    case SYMBOL_IO_DEV_MODE:
+        ret = io_device_func_read(path, offset, buf, count);
+        break;
+    case FILE_MODE:
+        ret = wdt_file_read(path, offset, buf, count);
+        break;
+    default:
+        WDT_ERROR("mode %u error, wdt func read failed.\n", mode);
+        return -EINVAL;
+    }
+
+    WDT_VERBOSE("wdt func read mode:%u,dev_nam:%s, offset:0x%x, read_val:0x%x, size:%lu.\n",
+        mode, path, offset, *buf, count);
+
+    return ret;
+}
+
+static int wb_wdt_write(uint8_t mode, const char *path,
+                uint32_t offset, uint8_t *buf, size_t count)
+{
+    int ret;
+
+    switch (mode) {
+    case SYMBOL_I2C_DEV_MODE:
+        ret = i2c_device_func_write(path, offset, buf, count);
+        break;
+    case SYMBOL_PCIE_DEV_MODE:
+        ret = pcie_device_func_write(path, offset, buf, count);
+        break;
+    case SYMBOL_IO_DEV_MODE:
+        ret = io_device_func_write(path, offset, buf, count);
+        break;
+    case FILE_MODE:
+        ret = wdt_file_write(path, offset, buf, count);
+        break;
+    default:
+        WDT_ERROR("mode %u error, wdt func write failed.\n", mode);
+        return -EINVAL;
+    }
+
+    WDT_VERBOSE("wdt func write mode:%u, dev_nam:%s, offset:0x%x, write_val:0x%x, size:%lu.\n",
+        mode, path, offset, *buf, count);
+
+    return ret;
+}
+
+static int wb_wdt_enable_ctrl(wb_wdt_priv_t *priv, uint8_t flag)
+{
+    int ret;
+    uint8_t val;
+    uint8_t ctrl_val;
+
+    switch (flag) {
+    case WDT_ON:
+        ctrl_val = priv->enable_val;
+        break;
+    case WDT_OFF:
+        ctrl_val = priv->disable_val;
+        break;
+    default:
+        WDT_ERROR("unsupport wdt enable ctrl:%u.\n", flag);
+        return -EINVAL;
+    }
+
+    ret = wb_wdt_read(priv->priv_func_mode, priv->config_dev_name,
+                priv->enable_reg, &val, ONE_BYTE);
+    if (ret < 0) {
+        dev_err(priv->dev, "read wdt control reg error.\n");
+        return ret;
+    }
+
+    val &= ~priv->enable_mask;
+
+    val |= ctrl_val & priv->enable_mask;
+
+    ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                priv->enable_reg, &val, ONE_BYTE);
+    if (ret < 0) {
+        dev_err(priv->dev, "write wdt control reg error.\n");
+        return ret;
+    }
+
+    return 0;
+}
+
+static void wdt_hwping(wb_wdt_priv_t *priv)
+{
+    gpio_wdt_info_t *gpio_wdt;
+    logic_wdt_info_t *logic_wdt;
+    uint8_t tmp_val;
+    int ret;
+
+    if (priv->config_mode == GPIO_FEED_WDT_MODE) {
+        gpio_wdt = &priv->gpio_wdt;
+        switch (priv->hw_algo) {
+        case HW_ALGO_TOGGLE:
+            gpio_wdt = &priv->gpio_wdt;
+            gpio_wdt->state = !gpio_wdt->state;
+            gpio_set_value_cansleep(gpio_wdt->gpio, gpio_wdt->state);
+            WDT_VERBOSE("gpio toggle wdt work. val:%u\n", gpio_wdt->state);
+            break;
+        case HW_ALGO_LEVEL:
+            gpio_wdt = &priv->gpio_wdt;
+            /* Pulse */
+            gpio_set_value_cansleep(gpio_wdt->gpio, !gpio_wdt->active_low);
+            udelay(1);
+            gpio_set_value_cansleep(gpio_wdt->gpio, gpio_wdt->active_low);
+            WDT_VERBOSE("gpio level wdt work.\n");
+            break;
+        }
+    } else {
+        logic_wdt = &priv->logic_wdt;
+        switch (priv->hw_algo) {
+        case HW_ALGO_TOGGLE:
+            logic_wdt->active_val = !logic_wdt->active_val;
+            ret = wb_wdt_write(logic_wdt->logic_func_mode, logic_wdt->feed_dev_name,
+                        logic_wdt->feed_reg, &logic_wdt->active_val, ONE_BYTE);
+            if (ret < 0) {
+                WDT_ERROR("logic toggle wdt write failed.ret = %d\n", ret);
+            }
+            WDT_VERBOSE("logic toggle wdt work.\n");
+        break;
+        case HW_ALGO_LEVEL:
+            tmp_val = !logic_wdt->active_val;
+            ret = wb_wdt_write(logic_wdt->logic_func_mode, logic_wdt->feed_dev_name,
+                        logic_wdt->feed_reg, &tmp_val, ONE_BYTE);
+            if (ret < 0) {
+                WDT_ERROR("logic level wdt write first failed.ret = %d\n", ret);
+            }
+            udelay(1);
+            ret = wb_wdt_write(logic_wdt->logic_func_mode, logic_wdt->feed_dev_name,
+                        logic_wdt->feed_reg, &logic_wdt->active_val, ONE_BYTE);
+            if (ret < 0) {
+                WDT_ERROR("logic level wdt write second failed.ret = %d\n", ret);
+            }
+            WDT_VERBOSE("logic level wdt work.\n");
+            break;
+        }
+    }
+    return;
+}
+
+static enum hrtimer_restart hrtimer_hwping(struct hrtimer *timer)
+{
+    wb_wdt_priv_t *priv = container_of(timer, wb_wdt_priv_t, hrtimer);
+
+    wdt_hwping(priv);
+    hrtimer_forward(timer, timer->base->get_time(), priv->m_kt);
+    return HRTIMER_RESTART;
+}
+
+static int thread_timer_cfg(wb_wdt_priv_t *priv, wb_wdt_device_t *wb_wdt_device)
+{
+    struct device *dev;
+    uint32_t hw_margin;
+    uint32_t feed_time;
+    uint32_t accuracy;
+    uint8_t set_time_val;
+    int ret;
+
+    dev = priv->dev;
+
+    ret = 0;
+    if (dev->of_node) {
+        ret += of_property_read_u32(dev->of_node, "feed_time", &priv->feed_time);
+        if (ret != 0) {
+            dev_err(dev, "thread Failed to priv dts.\n");
+            return -ENXIO;
+        }
+    } else {
+        priv->feed_time = wb_wdt_device->feed_time;
+    }
+    WDT_VERBOSE("thread priv->feed_time: %u.\n", priv->feed_time);
+
+    hw_margin = priv->hw_margin;
+    feed_time = priv->feed_time;
+    accuracy = priv->timer_accuracy;
+
+    if ((feed_time > (hw_margin / 2)) || (feed_time == 0)) {
+        dev_err(dev, "thread timer feed_time[%d] should be less than half hw_margin or zero.\n", feed_time);
+        return -EINVAL;
+    }
+
+    set_time_val = hw_margin / accuracy;
+    ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                priv->timeout_cfg_reg, &set_time_val, ONE_BYTE);
+    if (ret < 0) {
+        dev_err(dev, "set wdt thread timer reg error.\n");
+        return ret;
+    }
+    return 0;
+}
+
+static int wdt_thread_timer(void *data)
+{
+    wb_wdt_priv_t *priv = data;
+
+    while (!kthread_should_stop()) {
+        schedule_timeout_uninterruptible(msecs_to_jiffies(priv->feed_time));
+        wdt_hwping(priv);
+    }
+    return 0;
+}
+
+static int thread_timer_create(wb_wdt_priv_t *priv, wb_wdt_device_t *wb_wdt_device)
+{
+    struct task_struct *p;
+    int ret;
+
+    ret = thread_timer_cfg(priv, wb_wdt_device);
+    if (ret < 0) {
+        dev_err(priv->dev, "set wdt thread timer failed.\n");
+        return ret;
+    }
+
+    p = kthread_create(wdt_thread_timer, (void *)priv, "%s", "wb_wdt");
+    if (!IS_ERR(p)) {
+        WDT_VERBOSE("timer thread create success.\n");
+        priv->thread = p;
+        wake_up_process(p);
+    } else {
+        dev_err(priv->dev, "timer thread create failed.\n");
+        return -ENXIO;
+    }
+
+    ret = wb_wdt_enable_ctrl(priv, WDT_ON);
+    if (ret < 0) {
+        dev_err(priv->dev, "thread enable wdt failed.\n");
+        return -ENXIO;
+    }
+
+    return 0;
+}
+
+static int hrtimer_cfg(wb_wdt_priv_t *priv, wb_wdt_device_t *wb_wdt_device)
+{
+    struct device *dev;
+    struct hrtimer *hrtimer;
+    uint8_t set_time_val;
+    uint8_t hrtimer_s;
+    uint32_t hrtimer_ns;
+    int ret;
+    uint32_t hw_margin;
+    uint32_t feed_time;
+    uint32_t accuracy;
+    uint32_t max_timeout;
+
+    dev = priv->dev;
+
+    ret = 0;
+    if (dev->of_node) {
+        ret += of_property_read_u32(dev->of_node, "feed_time", &priv->feed_time);
+        if (ret != 0) {
+            dev_err(dev, "hrtimer Failed to priv dts.\n");
+            return -ENXIO;
+        }
+    } else {
+        priv->feed_time = wb_wdt_device->feed_time;
+    }
+    WDT_VERBOSE("hrtimer priv->feed_time: %u.\n", priv->feed_time);
+
+    hrtimer = &priv->hrtimer;
+    hw_margin = priv->hw_margin;
+    feed_time = priv->feed_time;
+    accuracy = priv->timer_accuracy;
+    max_timeout = accuracy * 255;
+
+    if (hw_margin < accuracy || hw_margin > max_timeout) {
+        dev_err(dev, "hrtimer_hw_margin should be between %u and %u.\n",
+            accuracy, max_timeout);
+        return -EINVAL;
+    }
+    if ((feed_time > (hw_margin / 2)) || (feed_time == 0)) {
+        dev_err(dev, "feed_time[%d] should be less than half hw_margin or zeor.\n", feed_time);
+        return -EINVAL;
+    }
+
+    hrtimer_s = feed_time / MS_TO_S;
+    hrtimer_ns = (feed_time % MS_TO_S) * MS_TO_NS;
+    set_time_val = hw_margin / accuracy;
+
+    ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                priv->timeout_cfg_reg, &set_time_val, ONE_BYTE);
+    if (ret < 0) {
+        dev_err(dev, "set wdt time reg error.\n");
+        return ret;
+    }
+
+    priv->m_kt = ktime_set(hrtimer_s, hrtimer_ns);
+    hrtimer_init(hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+    hrtimer->function = hrtimer_hwping;
+    hrtimer_start(hrtimer, priv->m_kt, HRTIMER_MODE_REL);
+
+    ret = wb_wdt_enable_ctrl(priv, WDT_ON);
+    if (ret < 0) {
+        dev_err(dev, "hrtimer enable wdt failed.\n");
+        return -ENXIO;
+    }
+
+    return 0;
+}
+
+static int wb_wdt_ping(struct watchdog_device *wdd)
+{
+    wb_wdt_priv_t *priv = watchdog_get_drvdata(wdd);
+
+    wdt_hwping(priv);
+    return 0;
+}
+
+static int wb_wdt_start(struct watchdog_device *wdd)
+{
+    wb_wdt_priv_t *priv = watchdog_get_drvdata(wdd);
+    int ret;
+
+    ret = wb_wdt_enable_ctrl(priv, WDT_ON);
+    if (ret < 0) {
+        WDT_ERROR("start wdt enable failed.\n");
+        return -ENXIO;
+    }
+    set_bit(WDOG_HW_RUNNING, &wdd->status);
+    return 0;
+}
+
+static int wb_wdt_stop(struct watchdog_device *wdd)
+{
+    wb_wdt_priv_t *priv = watchdog_get_drvdata(wdd);
+    int ret;
+
+    ret = wb_wdt_enable_ctrl(priv, WDT_OFF);
+    if (ret < 0) {
+        WDT_ERROR("stop wdt enable failed.\n");
+        return -ENXIO;
+    }
+    clear_bit(WDOG_HW_RUNNING, &wdd->status);
+    return 0;
+}
+
+static int wb_wdt_set_timeout(struct watchdog_device *wdd, unsigned int t)
+{
+    wb_wdt_priv_t *priv = watchdog_get_drvdata(wdd);
+    uint32_t timeout_ms;
+    uint32_t accuracy;
+    uint8_t set_time_val;
+    int ret;
+
+    accuracy = priv->timer_accuracy;
+    timeout_ms = t * 1000;
+    if (timeout_ms > accuracy * 255) {
+        WDT_ERROR("set wdt timeout too larger error.timeout_ms:%u\n", timeout_ms);
+        return -EINVAL;
+    }
+
+    set_time_val = timeout_ms / accuracy;
+    ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                priv->timeout_cfg_reg, &set_time_val, ONE_BYTE);
+    if (ret < 0) {
+        WDT_ERROR("set wdt timeout reg error, set_time_val:%u ret:%d\n", set_time_val, ret);
+        return ret;
+    }
+    wdd->timeout = t;
+
+    return 0;
+}
+
+static unsigned int wb_wdt_get_timeleft(struct watchdog_device *wdd)
+{
+    wb_wdt_priv_t *priv = watchdog_get_drvdata(wdd);
+    unsigned int time_left;
+    uint32_t accuracy;
+    uint8_t get_time_val;
+    int ret;
+
+    accuracy = priv->timer_accuracy;
+
+    ret = wb_wdt_read(priv->priv_func_mode, priv->config_dev_name,
+                priv->timeleft_cfg_reg, &get_time_val, ONE_BYTE);
+    if (ret < 0) {
+        WDT_ERROR("get wdt timeout reg error.ret:%d\n", ret);
+        return ret;
+    }
+    time_left = get_time_val * accuracy / MS_TO_S;
+
+    WDT_VERBOSE("get wdt timeleft %d get_time_val %d accuracy=%d\n",
+            time_left, get_time_val, accuracy);
+    return time_left;
+}
+
+static const struct watchdog_info wb_wdt_ident = {
+    .options    = WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,
+    .firmware_version = 0,
+    .identity   = "CPLD Watchdog",
+};
+
+static const struct watchdog_ops wb_wdt_ops = {
+    .owner        = THIS_MODULE,
+    .start        = wb_wdt_start,
+    .stop         = wb_wdt_stop,
+    .ping         = wb_wdt_ping,
+    .set_timeout  = wb_wdt_set_timeout,
+    .get_timeleft  = wb_wdt_get_timeleft,
+};
+
+static int watchdog_device_cfg(wb_wdt_priv_t *priv)
+{
+    int ret;
+    uint8_t set_time_val;
+
+    ret = wb_wdt_enable_ctrl(priv, WDT_OFF);
+    if (ret < 0) {
+        dev_err(priv->dev, "probe disable wdt failed.\n");
+        return -ENXIO;
+    }
+
+    set_time_val = priv->hw_margin / priv->timer_accuracy;
+    ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                priv->timeout_cfg_reg, &set_time_val, ONE_BYTE);
+    if (ret < 0) {
+        dev_err(priv->dev, "set wdt time reg error.\n");
+        return ret;
+    }
+
+    watchdog_set_drvdata(&priv->wdd, priv);
+
+    priv->wdd.info         = &wb_wdt_ident;
+    priv->wdd.ops          = &wb_wdt_ops;
+    priv->wdd.bootstatus   = 0;
+    priv->wdd.timeout      = priv->hw_margin / MS_TO_S;
+    priv->wdd.min_timeout  = priv->timer_accuracy / MS_TO_S;
+    priv->wdd.max_timeout  = priv->timer_accuracy * MAX_REG_VAL / MS_TO_S;
+    priv->wdd.parent       = priv->dev;
+
+    watchdog_stop_on_reboot(&priv->wdd);
+
+    ret = devm_watchdog_register_device(priv->dev, &priv->wdd);
+    if (ret != 0) {
+        dev_err(priv->dev, "cannot register watchdog device (err=%d)\n", ret);
+        return -ENXIO;
+    }
+
+    return 0;
+}
+
+static int logic_wdt_init(wb_wdt_priv_t *priv, wb_wdt_device_t *wb_wdt_device)
+{
+    struct device *dev;
+    logic_wdt_info_t *logic_wdt;
+    int ret;
+
+    dev = priv->dev;
+    logic_wdt = &priv->logic_wdt;
+
+    ret = 0;
+    if (dev->of_node) {
+        ret += of_property_read_string(dev->of_node, "feed_dev_name", &logic_wdt->feed_dev_name);
+        ret += of_property_read_u32(dev->of_node, "feed_reg", &logic_wdt->feed_reg);
+        ret += of_property_read_u8(dev->of_node, "active_val", &logic_wdt->active_val);
+        ret += of_property_read_u8(dev->of_node, "logic_func_mode", &logic_wdt->logic_func_mode);
+        if (ret != 0) {
+            dev_err(dev, "Failed to logic_wdt dts.\n");
+            return -ENXIO;
+        }
+    } else {
+        logic_wdt->feed_dev_name = wb_wdt_device->wdt_config_mode.logic_wdt.feed_dev_name;
+        logic_wdt->feed_reg = wb_wdt_device->wdt_config_mode.logic_wdt.feed_reg;
+        logic_wdt->active_val = wb_wdt_device->wdt_config_mode.logic_wdt.active_val;
+        logic_wdt->logic_func_mode = wb_wdt_device->wdt_config_mode.logic_wdt.logic_func_mode;
+    }
+
+    logic_wdt->state_val = logic_wdt->active_val;
+
+    WDT_VERBOSE("feed_dev_name:%s, feed_reg:0x%x, active_val:%u, logic_func_mode:%u\n",
+        logic_wdt->feed_dev_name, logic_wdt->feed_reg,
+        logic_wdt->active_val, logic_wdt->logic_func_mode);
+
+    return 0;
+}
+
+static int gpio_wdt_init(wb_wdt_priv_t *priv, wb_wdt_device_t *wb_wdt_device)
+{
+    struct device *dev;
+    gpio_wdt_info_t *gpio_wdt;
+    enum of_gpio_flags flags;
+    uint32_t f = 0;
+    int ret;
+
+    dev = priv->dev;
+    gpio_wdt = &priv->gpio_wdt;
+
+    if (dev->of_node) {
+        gpio_wdt->gpio = of_get_gpio_flags(dev->of_node, 0, &flags);
+    } else {
+        gpio_wdt->gpio = wb_wdt_device->wdt_config_mode.gpio_wdt.gpio;
+        flags = wb_wdt_device->wdt_config_mode.gpio_wdt.flags;
+    }
+    if (!gpio_is_valid(gpio_wdt->gpio)) {
+        dev_err(dev, "gpio is invalid.\n");
+        return gpio_wdt->gpio;
+    }
+
+    gpio_wdt->active_low = flags & OF_GPIO_ACTIVE_LOW;
+
+    if(priv->hw_algo == HW_ALGO_TOGGLE) {
+        f = GPIOF_IN;
+    } else {
+        f = gpio_wdt->active_low ? GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;
+    }
+
+    ret = devm_gpio_request_one(dev, gpio_wdt->gpio, f,
+                dev_name(dev));
+    if (ret) {
+        dev_err(dev, "devm_gpio_request_one failed.\n");
+        return ret;
+    }
+
+    gpio_wdt->state = gpio_wdt->active_low;
+    gpio_direction_output(gpio_wdt->gpio, gpio_wdt->state);
+
+    WDT_VERBOSE("active_low:%d\n", gpio_wdt->active_low);
+    return 0;
+}
+
+static ssize_t set_wdt_sysfs_value(struct device *dev, struct device_attribute *da,
+                        const char *buf, size_t count)
+{
+    wb_wdt_priv_t *priv = dev_get_drvdata(dev);
+    int ret, val;
+
+    val = 0;
+    sscanf(buf, "%d", &val);
+    WDT_VERBOSE("set wdt, val:%d.\n", val);
+
+    if (val < 0 || val > 255) {
+        WDT_ERROR("set wdt val %d failed.\n", val);
+        return -EINVAL;
+    }
+
+    mutex_lock(&priv->update_lock);
+
+    ret = wb_wdt_enable_ctrl(priv, val);
+    if (ret < 0) {
+        WDT_ERROR("set wdt sysfs value:%u failed.\n", val);
+        goto fail;
+    }
+
+    WDT_VERBOSE("set wdt sysfs value:%u successed.\n", val);
+    mutex_unlock(&priv->update_lock);
+    return count;
+
+fail:
+    mutex_unlock(&priv->update_lock);
+    return ret;
+}
+
+static ssize_t show_wdt_sysfs_value(struct device *dev,
+                        struct device_attribute *da, char *buf)
+{
+    wb_wdt_priv_t *priv = dev_get_drvdata(dev);
+    uint8_t val, status;
+    int ret;
+
+    mutex_lock(&priv->update_lock);
+
+    ret = wb_wdt_read(priv->priv_func_mode, priv->config_dev_name,
+                priv->enable_reg, &val, ONE_BYTE);
+    if (ret < 0) {
+        dev_err(priv->dev, "read wdt enable reg val error.\n");
+        goto fail;
+    }
+
+    val &= priv->enable_mask;
+    if (val == priv->enable_val) {
+        status = WDT_ON;
+    } else if(val == priv->disable_val) {
+        status = WDT_OFF;
+    } else {
+        WDT_ERROR("enable reg read val not match set val, read val:%u, mask:%u, enable_val:%u, disable_val:%u",
+            val, priv->enable_mask, priv->enable_val, priv->disable_val);
+        ret = -EIO;
+        goto fail;
+    }
+
+    WDT_VERBOSE("read_val:%u, mask:%u, enable_val:%u, disable_val:%u, status:%u",
+        val, priv->enable_mask, priv->enable_val, priv->disable_val, status);
+
+    mutex_unlock(&priv->update_lock);
+    return sprintf(buf, "%u\n", status);
+
+fail:
+    mutex_unlock(&priv->update_lock);
+    return ret;
+}
+
+static SENSOR_DEVICE_ATTR(wdt_status, S_IRUGO | S_IWUSR, show_wdt_sysfs_value, set_wdt_sysfs_value, 0);
+
+static struct attribute *wdt_sysfs_attrs[] = {
+    &sensor_dev_attr_wdt_status.dev_attr.attr,
+    NULL
+};
+
+static const struct attribute_group wdt_sysfs_group = {
+    .attrs = wdt_sysfs_attrs,
+};
+
+struct wdt_attr_match_group {
+    uint8_t index;
+    const struct attribute_group *attr_group_ptr;
+};
+
+static struct wdt_attr_match_group g_wdt_attr_match[] = {
+    {0, &wdt_sysfs_group},
+};
+
+static const struct attribute_group *wdt_get_attr_group(uint32_t index)
+{
+    int i;
+    struct wdt_attr_match_group *group;
+
+    for (i = 0; i < ARRAY_SIZE(g_wdt_attr_match); i++) {
+        group = &g_wdt_attr_match[i];
+        if (index == group->index) {
+            WDT_VERBOSE("get wdt attr, index:%u.\n", index);
+            return group->attr_group_ptr;
+        }
+    }
+
+    return NULL;
+}
+
+static int wb_wdt_probe(struct platform_device *pdev)
+{
+    wb_wdt_priv_t *priv;
+    int ret;
+    const char *algo;
+    wb_wdt_device_t *wb_wdt_device;
+
+    priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+    if (!priv) {
+        dev_err(&pdev->dev, "devm_kzalloc failed.\n");
+        return -ENOMEM;
+    }
+
+    platform_set_drvdata(pdev, priv);
+
+    if (pdev->dev.of_node) {
+        ret = 0;
+        ret += of_property_read_string(pdev->dev.of_node, "config_dev_name", &priv->config_dev_name);
+        ret += of_property_read_string(pdev->dev.of_node, "hw_algo", &algo);
+        ret += of_property_read_u8(pdev->dev.of_node, "config_mode", &priv->config_mode);
+        ret += of_property_read_u8(pdev->dev.of_node, "priv_func_mode", &priv->priv_func_mode);
+        ret += of_property_read_u8(pdev->dev.of_node, "enable_val", &priv->enable_val);
+        ret += of_property_read_u8(pdev->dev.of_node, "disable_val", &priv->disable_val);
+        ret += of_property_read_u8(pdev->dev.of_node, "enable_mask", &priv->enable_mask);
+        ret += of_property_read_u32(pdev->dev.of_node, "enable_reg", &priv->enable_reg);
+        ret += of_property_read_u32(pdev->dev.of_node, "timeout_cfg_reg", &priv->timeout_cfg_reg);
+        ret += of_property_read_u32(pdev->dev.of_node,"hw_margin_ms", &priv->hw_margin);
+        ret += of_property_read_u8(pdev->dev.of_node,"feed_wdt_type", &priv->feed_wdt_type);
+        ret += of_property_read_u32(pdev->dev.of_node,"timer_accuracy", &priv->timer_accuracy);
+        if (ret != 0) {
+            dev_err(&pdev->dev, "Failed to priv dts.\n");
+            return -ENXIO;
+        }
+
+        priv->sysfs_index = SYSFS_NO_CFG;
+        of_property_read_u8(pdev->dev.of_node,"sysfs_index", &priv->sysfs_index);
+
+        priv->timeleft_cfg_reg = priv->timeout_cfg_reg;
+        of_property_read_u32(pdev->dev.of_node,"timeleft_cfg_reg", &priv->timeleft_cfg_reg);
+    } else {
+        if (pdev->dev.platform_data == NULL) {
+            dev_err(&pdev->dev, "Failed to get platform data config.\n");
+            return -ENXIO;
+        }
+        wb_wdt_device = pdev->dev.platform_data;
+        priv->config_dev_name = wb_wdt_device->config_dev_name;
+        algo = wb_wdt_device->hw_algo;
+        priv->config_mode = wb_wdt_device->config_mode;
+        priv->priv_func_mode = wb_wdt_device->priv_func_mode;
+        priv->enable_val = wb_wdt_device->enable_val;
+        priv->disable_val = wb_wdt_device->disable_val;
+        priv->enable_mask = wb_wdt_device->enable_mask;
+        priv->enable_reg = wb_wdt_device->enable_reg;
+        priv->timeout_cfg_reg = wb_wdt_device->timeout_cfg_reg;
+        priv->hw_margin = wb_wdt_device->hw_margin;
+        priv->timer_accuracy = wb_wdt_device->timer_accuracy;
+        priv->feed_wdt_type = wb_wdt_device->feed_wdt_type;
+        priv->sysfs_index = wb_wdt_device->sysfs_index;
+        priv->timeleft_cfg_reg = wb_wdt_device->timeleft_cfg_reg;
+    }
+
+    if (!strcmp(algo, "toggle")) {
+        priv->hw_algo = HW_ALGO_TOGGLE;
+    } else if (!strcmp(algo, "level")) {
+        priv->hw_algo = HW_ALGO_LEVEL;
+    } else {
+        dev_err(&pdev->dev, "hw_algo config error.must be toggle or level.\n");
+        return -EINVAL;
+    }
+
+    WDT_VERBOSE("config_dev_name:%s, config_mode:%u, priv_func_mode:%u, enable_reg:0x%x, timeout_cfg_reg:0x%x\n",
+        priv->config_dev_name, priv->config_mode, priv->priv_func_mode, priv->enable_reg, priv->timeout_cfg_reg);
+    WDT_VERBOSE("timeout_cfg_reg:0x%x, enable_val:%u, disable_val:%u, enable_mask:%u, hw_margin:%u, feed_wdt_type:%u\n",
+        priv->timeleft_cfg_reg, priv->enable_val, priv->disable_val, priv->enable_mask, priv->hw_margin, priv->feed_wdt_type);
+
+    priv->dev = &pdev->dev;
+    if (priv->config_mode == GPIO_FEED_WDT_MODE) {
+        ret = gpio_wdt_init(priv, wb_wdt_device);
+        if (ret < 0) {
+            dev_err(&pdev->dev, "init gpio mode wdt failed.\n");
+            return -ENXIO;
+        }
+    } else if (priv->config_mode == LOGIC_FEED_WDT_MODE) {
+        ret = logic_wdt_init(priv, wb_wdt_device);
+        if (ret < 0) {
+            dev_err(&pdev->dev, "init func mode wdt failed.\n");
+            return -ENXIO;
+        }
+    } else {
+        dev_err(&pdev->dev, "unsupport %u config_mode, dts configure error.\n",
+            priv->config_mode);
+        return -ENXIO;
+    }
+
+    switch (priv->feed_wdt_type) {
+    case WATCHDOG_DEVICE_TYPE:
+        ret = watchdog_device_cfg(priv);
+        break;
+    case HRTIMER_TYPE:
+        ret = hrtimer_cfg(priv, wb_wdt_device);
+        break;
+    case THREAD_TYPE:
+        ret = thread_timer_create(priv, wb_wdt_device);
+        break;
+    default:
+        dev_err(&pdev->dev, "timer type %u unsupport.\n", priv->feed_wdt_type);
+        return -EINVAL;
+    }
+    if (ret < 0) {
+        dev_err(&pdev->dev, "init timer feed_wdt_type %u failed.\n", priv->feed_wdt_type);
+        return -ENXIO;
+    }
+
+    dev_info(&pdev->dev, "register %s mode, config_mode %u, func_mode %u, %u ms overtime wdt success\n",
+        algo, priv->config_mode, priv->priv_func_mode, priv->hw_margin);
+
+    if (priv->sysfs_index != SYSFS_NO_CFG) {
+
+        priv->sysfs_group = wdt_get_attr_group(priv->sysfs_index);
+        if (priv->sysfs_group) {
+            ret = sysfs_create_group(&pdev->dev.kobj, priv->sysfs_group);
+            if (ret != 0) {
+                dev_err(&pdev->dev, "sysfs_create_group failed. ret:%d.\n", ret);
+                return -ENOMEM;
+            }
+            dev_info(&pdev->dev, "sysfs create group success\n");
+        } else {
+            dev_err(&pdev->dev, "failed to find %u index wdt, return NULL.\n", priv->sysfs_index);
+            return -ENOMEM;
+        }
+
+        mutex_init(&priv->update_lock);
+
+        dev_info(&pdev->dev, "register %u index wdt sysfs success." ,priv->sysfs_index);
+    }
+
+    return 0;
+}
+
+static void unregister_action(struct platform_device *pdev)
+{
+    wb_wdt_priv_t *priv = platform_get_drvdata(pdev);
+    gpio_wdt_info_t *gpio_wdt;
+    logic_wdt_info_t *logic_wdt;
+    int ret;
+
+    ret = wb_wdt_enable_ctrl(priv, WDT_OFF);
+    if (ret < 0) {
+        dev_err(&pdev->dev, "remove disable wdt failed.\n");
+    }
+
+    if (priv->sysfs_index != SYSFS_NO_CFG) {
+       sysfs_remove_group(&pdev->dev.kobj, priv->sysfs_group);
+    }
+
+    if (priv->feed_wdt_type == HRTIMER_TYPE) {
+        hrtimer_cancel(&priv->hrtimer);
+    } else if (priv->feed_wdt_type == THREAD_TYPE) {
+        kthread_stop(priv->thread);
+        priv->thread = NULL;
+    } else {
+        WDT_VERBOSE("wdd type, do nothing.\n");
+    }
+
+    if (priv->config_mode == GPIO_FEED_WDT_MODE) {
+        gpio_wdt = &priv->gpio_wdt;
+        gpio_set_value_cansleep(gpio_wdt->gpio, !gpio_wdt->active_low);
+
+        if (priv->hw_algo == HW_ALGO_TOGGLE) {
+            gpio_direction_input(gpio_wdt->gpio);
+        }
+    } else {
+        logic_wdt = &priv->logic_wdt;
+        logic_wdt->state_val = !logic_wdt->state_val;
+        ret = wb_wdt_write(logic_wdt->logic_func_mode, logic_wdt->feed_dev_name,
+                    logic_wdt->feed_reg, &logic_wdt->state_val, ONE_BYTE);
+        if (ret < 0) {
+            dev_err(&pdev->dev, "set wdt control reg error.\n");
+        }
+    }
+
+    return;
+}
+
+static int wb_wdt_remove(struct platform_device *pdev)
+{
+    WDT_VERBOSE("enter remove wdt.\n");
+    unregister_action(pdev);
+    dev_info(&pdev->dev, "remove wdt finish.\n");
+
+    return 0;
+}
+
+static void wb_wdt_shutdown(struct platform_device *pdev)
+{
+    WDT_VERBOSE("enter shutdown wdt.\n");
+    unregister_action(pdev);
+    dev_info(&pdev->dev, "shutdown wdt finish.\n");
+
+    return;
+}
+
+static const struct of_device_id wb_wdt_dt_ids[] = {
+    { .compatible = "wb_wdt", },
+    { }
+};
+MODULE_DEVICE_TABLE(of, wb_wdt_dt_ids);
+
+static struct platform_driver wb_wdt_driver = {
+    .driver = {
+        .name       = "wb_wdt",
+        .of_match_table = wb_wdt_dt_ids,
+    },
+    .probe  = wb_wdt_probe,
+    .remove = wb_wdt_remove,
+    .shutdown = wb_wdt_shutdown,
+};
+
+#ifdef CONFIG_GPIO_WATCHDOG_ARCH_INITCALL
+static int __init wb_wdt_init(void)
+{
+    return platform_driver_register(&wb_wdt_driver);
+}
+arch_initcall(wb_wdt_init);
+#else
+module_platform_driver(wb_wdt_driver);
+#endif
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("watchdog driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.h
new file mode 100644
index 000000000000..10c30e13f94c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.h
@@ -0,0 +1,46 @@
+#ifndef __WB_WDT_H__
+#define __WB_WDT_H__
+
+#include <linux/of_gpio.h>
+
+#define SYSFS_NO_CFG         (0xff)
+
+typedef struct gpio_wdt_info_s {
+    int       gpio;
+    enum of_gpio_flags  flags;
+    bool      active_low;
+    bool      state;
+}gpio_wdt_info_t;
+
+typedef struct logic_wdt_info_s {
+    const char  *feed_dev_name;
+    uint8_t     logic_func_mode;
+    uint32_t    feed_reg;
+    uint8_t     active_val;
+    uint8_t     state_val;
+}logic_wdt_info_t;
+
+typedef struct wb_wdt_device_s {
+    int         device_flag;
+    const char  *config_dev_name;
+    uint8_t     config_mode;
+    const char  *hw_algo;
+    uint8_t     enable_val;
+    uint8_t     disable_val;
+    uint8_t     enable_mask;
+    uint8_t     priv_func_mode;
+    uint8_t     feed_wdt_type;
+    uint32_t    enable_reg;
+    uint32_t    timeout_cfg_reg;
+    uint32_t    timeleft_cfg_reg;
+    uint32_t    hw_margin;
+    uint32_t    feed_time;
+    uint32_t    timer_accuracy;
+    union {
+        gpio_wdt_info_t gpio_wdt;
+        logic_wdt_info_t logic_wdt;
+    } wdt_config_mode;
+    uint8_t sysfs_index;
+} wb_wdt_device_t;
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c
new file mode 100644
index 000000000000..edc12d34b6e2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c
@@ -0,0 +1,574 @@
+/*
+ * xdpe132g5c_i2c_drv.c
+ *
+ * This module create sysfs to set AVS and create hwmon to get out power
+ * through xdpe132g5c I2C address.
+ *
+ * History
+ *  [Version]                [Date]                    [Description]
+ *   *  v1.0                2021-09-17                  Initial version
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+#include <linux/fs.h>
+#include <linux/uaccess.h>
+#include <linux/delay.h>
+
+#define WB_I2C_RETRY_SLEEP_TIME          (10000)   /* 10ms */
+#define WB_I2C_RETRY_TIME                (10)
+#define WB_XDPE_I2C_PAGE_ADDR            (0xff)
+#define WB_XDPE_I2C_VOUT_MODE            (0x40)
+#define WB_XDPE_I2C_VOUT_COMMAND         (0x42)
+#define WB_XDPE_I2C_VOUT_PAGE            (0x06)
+#define WB_XDPE_VOUT_MAX_THRESHOLD       ((0xFFFF * 1000L * 1000L) / (256))
+#define WB_XDPE_VOUT_MIN_THRESHOLD       (0)
+
+static int g_wb_xdpe_debug = 0;
+static int g_wb_xdpe_error = 0;
+
+module_param(g_wb_xdpe_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_xdpe_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_XDPE_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_xdpe_debug) { \
+        printk(KERN_INFO "[WB_XDPE][VER][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_XDPE_ERROR(fmt, args...) do {                                        \
+    if (g_wb_xdpe_error) { \
+        printk(KERN_ERR "[WB_XDPE][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct xdpe_data {
+    struct i2c_client *client;
+    struct device *hwmon_dev;
+    struct mutex update_lock;
+    long vout_max;
+    long vout_min;
+};
+
+typedef struct xdpe_vout_data_s {
+    u8 vout_mode;
+    int vout_precision;
+} xdpe_vout_data_t;
+
+static xdpe_vout_data_t g_xdpe_vout_group[] = {
+    {.vout_mode = 0x18, .vout_precision = 256},
+    {.vout_mode = 0x17, .vout_precision = 512},
+    {.vout_mode = 0x16, .vout_precision = 1024},
+    {.vout_mode = 0x15, .vout_precision = 2048},
+    {.vout_mode = 0x14, .vout_precision = 4096},
+};
+
+static s32 wb_i2c_smbus_read_byte_data(const struct i2c_client *client, u8 command)
+{
+    int i;
+    s32 ret;
+
+    for (i = 0; i < WB_I2C_RETRY_TIME; i++) {
+        ret = i2c_smbus_read_byte_data(client, command);
+        if (ret >= 0) {
+            return ret;
+        }
+        usleep_range(WB_I2C_RETRY_SLEEP_TIME, WB_I2C_RETRY_SLEEP_TIME + 1);
+    }
+    return ret;
+}
+
+static s32 wb_i2c_smbus_write_byte_data(const struct i2c_client *client, u8 command, u8 value)
+{
+    int i;
+    s32 ret;
+
+    for (i = 0; i < WB_I2C_RETRY_TIME; i++) {
+        ret = i2c_smbus_write_byte_data(client, command, value);
+        if (ret >= 0) {
+            return ret;
+        }
+        usleep_range(WB_I2C_RETRY_SLEEP_TIME, WB_I2C_RETRY_SLEEP_TIME + 1);
+    }
+    return ret;
+}
+
+static s32 wb_i2c_smbus_read_word_data(const struct i2c_client *client, u8 command)
+{
+    int i;
+    s32 ret;
+
+    for (i = 0; i < WB_I2C_RETRY_TIME; i++) {
+        ret = i2c_smbus_read_word_data(client, command);
+        if (ret >= 0) {
+            return ret;
+        }
+        usleep_range(WB_I2C_RETRY_SLEEP_TIME, WB_I2C_RETRY_SLEEP_TIME + 1);
+    }
+    return ret;
+}
+
+static s32 wb_i2c_smbus_write_word_data(const struct i2c_client *client, u8 command,
+               u16 value)
+{
+    int i;
+    s32 ret;
+
+    for (i = 0; i < WB_I2C_RETRY_TIME; i++) {
+        ret = i2c_smbus_write_word_data(client, command, value);
+        if (ret >= 0) {
+            return ret;
+        }
+        usleep_range(WB_I2C_RETRY_SLEEP_TIME, WB_I2C_RETRY_SLEEP_TIME + 1);
+    }
+    return ret;
+}
+
+static long calc_power_linear11_data(int data)
+{
+    s16 exponent;
+    s32 mantissa;
+    long val;
+
+    exponent = ((s16)data) >> 11;
+    mantissa = ((s16)((data & 0x7ff) << 5)) >> 5;
+    val = mantissa;
+    val = val * 1000L * 1000L;
+
+    if (exponent >= 0) {
+        val <<= exponent;
+    } else {
+        val >>= -exponent;
+    }
+    return val;
+}
+
+static int read_xdpe_power_value(const struct i2c_client *client, u8 page, u8 reg, long *value)
+{
+    int ret, data;
+
+    ret = wb_i2c_smbus_write_byte_data(client, WB_XDPE_I2C_PAGE_ADDR, page);
+    if (ret < 0) {
+        WB_XDPE_ERROR("%d-%04x: set xdpe page%u failed, ret: %d\n", client->adapter->nr,
+            client->addr, page, ret);
+        return ret;
+    }
+    data = wb_i2c_smbus_read_word_data(client, reg);
+    if (data < 0) {
+        WB_XDPE_ERROR("%d-%04x: read xdpe page%u reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, page, reg, data);
+        return data;
+    }
+    *value = calc_power_linear11_data(data);
+    WB_XDPE_VERBOSE("%d-%04x: page%u reg: 0x%x rd_data: 0x%x, decode linear11 value: %ld\n",
+        client->adapter->nr, client->addr, page, reg, data, *value);
+    return 0;
+}
+
+static ssize_t xdpe_power_value_show(struct device *dev, struct device_attribute *da,
+                   char *buf)
+{
+    int ret, ori_page;
+    u16 sensor_h, sensor_l;
+    u8 page, reg;
+    struct sensor_device_attribute *attr;
+    struct i2c_client *client;
+    struct xdpe_data *data;
+    long value1, value2;
+
+    data = dev_get_drvdata(dev);
+    client = data->client;
+    attr = to_sensor_dev_attr(da);
+    sensor_h = ((attr->index) >> 16) & 0xffff;
+    sensor_l = (attr->index) & 0xffff;
+
+    mutex_lock(&data->update_lock);
+
+    ori_page = wb_i2c_smbus_read_byte_data(client, WB_XDPE_I2C_PAGE_ADDR);
+    if (ori_page < 0) {
+        WB_XDPE_ERROR("%d-%04x: read xdpe origin page failed, ret: %d\n", client->adapter->nr,
+            client->addr, ori_page);
+        mutex_unlock(&data->update_lock);
+        return ori_page;
+    }
+    value1 = 0;
+    value2 = 0;
+
+    if (sensor_h) {
+        page = (sensor_h >> 8) & 0xff;
+        reg = sensor_h & 0xff;
+        ret = read_xdpe_power_value(client, page, reg, &value1);
+        if (ret < 0) {
+            WB_XDPE_ERROR("%d-%04x: read xdpe sensor high sensor page%u reg: 0x%x failed, ret: %d\n",
+                client->adapter->nr, client->addr, page, reg, ret);
+            goto error;
+        }
+        WB_XDPE_VERBOSE("%d-%04x: read xdpe sensor high sensor page%u reg: 0x%x success, value: %ld\n",
+            client->adapter->nr, client->addr, page, reg, value1);
+    }
+
+    page = (sensor_l >> 8) & 0xff;
+    reg = sensor_l & 0xff;
+    ret = read_xdpe_power_value(client, page, reg, &value2);
+    if (ret < 0) {
+        WB_XDPE_ERROR("%d-%04x: read xdpe sensor low sensor page%u reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, page, reg, ret);
+        goto error;
+    }
+    WB_XDPE_VERBOSE("%d-%04x: read xdpe sensor low sensor page%u reg: 0x%x success, value: %ld\n",
+        client->adapter->nr, client->addr, page, reg, value2);
+
+    wb_i2c_smbus_write_byte_data(client, WB_XDPE_I2C_PAGE_ADDR, ori_page);
+    mutex_unlock(&data->update_lock);
+    return snprintf(buf, PAGE_SIZE, "%ld\n", value1 + value2);
+error:
+    wb_i2c_smbus_write_byte_data(client, WB_XDPE_I2C_PAGE_ADDR, ori_page);
+    mutex_unlock(&data->update_lock);
+    return ret;
+}
+
+static int xdpe_get_vout_precision(const struct i2c_client *client, int *vout_precision)
+{
+    int i, vout_mode, a_size;
+
+    vout_mode = wb_i2c_smbus_read_byte_data(client, WB_XDPE_I2C_VOUT_MODE);
+    if (vout_mode < 0) {
+        WB_XDPE_ERROR("%d-%04x: read xdpe vout mode reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, WB_XDPE_I2C_VOUT_MODE, vout_mode);
+        return vout_mode;
+    }
+
+    a_size = ARRAY_SIZE(g_xdpe_vout_group);
+    for (i = 0; i < a_size; i++) {
+        if (g_xdpe_vout_group[i].vout_mode == vout_mode) {
+            *vout_precision = g_xdpe_vout_group[i].vout_precision;
+            WB_XDPE_VERBOSE("%d-%04x: match, vout mode: 0x%x, precision: %d\n",
+                client->adapter->nr, client->addr, vout_mode, *vout_precision);
+            break;
+        }
+    }
+    if (i == a_size) {
+        WB_XDPE_ERROR("%d-%04x: invalid vout mode: 0x%x\n",client->adapter->nr, client->addr,
+            vout_mode);
+        return -EINVAL;
+    }
+    return 0;
+}
+
+static ssize_t xdpe_avs_vout_show(struct device *dev, struct device_attribute *da, char *buf)
+{
+    int ret, ori_page, vout_cmd, vout_precision;
+    struct i2c_client *client;
+    struct xdpe_data *data;
+    long vout;
+
+    client = to_i2c_client(dev);
+    data = i2c_get_clientdata(client);
+
+    mutex_lock(&data->update_lock);
+
+    ori_page = wb_i2c_smbus_read_byte_data(client, WB_XDPE_I2C_PAGE_ADDR);
+    if (ori_page < 0) {
+        WB_XDPE_ERROR("%d-%04x: read xdpe origin page failed, ret: %d\n", client->adapter->nr,
+            client->addr, ori_page);
+        mutex_unlock(&data->update_lock);
+        return ori_page;
+    }
+
+    ret = wb_i2c_smbus_write_byte_data(client, WB_XDPE_I2C_PAGE_ADDR, WB_XDPE_I2C_VOUT_PAGE);
+    if (ret < 0) {
+        WB_XDPE_ERROR("%d-%04x: set xdpe avs vout page%u failed, ret: %d\n", client->adapter->nr,
+            client->addr, WB_XDPE_I2C_VOUT_PAGE, ret);
+        goto error;
+    }
+
+    ret = xdpe_get_vout_precision(client, &vout_precision);
+    if (ret < 0) {
+        WB_XDPE_ERROR("%d-%04x: get xdpe avs vout precision failed, ret: %d\n",
+            client->adapter->nr, client->addr, ret);
+        goto error;
+    }
+
+    vout_cmd = wb_i2c_smbus_read_word_data(client, WB_XDPE_I2C_VOUT_COMMAND);
+    if (vout_cmd < 0) {
+        ret = vout_cmd;
+        WB_XDPE_ERROR("%d-%04x: read xdpe vout command reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, WB_XDPE_I2C_VOUT_COMMAND, ret);
+        goto error;
+    }
+
+    wb_i2c_smbus_write_byte_data(client, WB_XDPE_I2C_PAGE_ADDR, ori_page);
+    mutex_unlock(&data->update_lock);
+
+    vout = vout_cmd * 1000L * 1000L / vout_precision;
+    WB_XDPE_VERBOSE("%d-%04x: vout: %ld, vout_cmd: 0x%x, precision: %d\n", client->adapter->nr,
+        client->addr, vout, vout_cmd, vout_precision);
+    return snprintf(buf, PAGE_SIZE, "%ld\n", vout);
+error:
+    wb_i2c_smbus_write_byte_data(client, WB_XDPE_I2C_PAGE_ADDR, ori_page);
+    mutex_unlock(&data->update_lock);
+    return ret;
+}
+
+static ssize_t xdpe_avs_vout_store(struct device *dev, struct device_attribute *da,
+                   const char *buf, size_t count)
+{
+    int ret, ori_page, vout_cmd, vout_cmd_set, vout_precision;
+    struct i2c_client *client;
+    struct xdpe_data *data;
+    long vout, vout_max, vout_min;
+
+    client = to_i2c_client(dev);
+    ret = kstrtol(buf, 10, &vout);
+    if (ret) {
+        WB_XDPE_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+
+    data = i2c_get_clientdata(client);
+    vout_max = data->vout_max;
+    vout_min = data->vout_min;
+    if ((vout > vout_max) || (vout < vout_min)) {
+        WB_XDPE_ERROR("%d-%04x: vout value: %ld, out of range [%ld, %ld] \n", client->adapter->nr,
+            client->addr, vout, vout_min, vout_max);
+        return -EINVAL;
+    }
+
+    mutex_lock(&data->update_lock);
+
+    ori_page = wb_i2c_smbus_read_byte_data(client, WB_XDPE_I2C_PAGE_ADDR);
+    if (ori_page < 0) {
+        WB_XDPE_ERROR("%d-%04x: read xdpe origin page failed, ret: %d\n", client->adapter->nr,
+            client->addr, ori_page);
+        mutex_unlock(&data->update_lock);
+        return ori_page;
+    }
+
+    ret = wb_i2c_smbus_write_byte_data(client, WB_XDPE_I2C_PAGE_ADDR, WB_XDPE_I2C_VOUT_PAGE);
+    if (ret < 0) {
+        WB_XDPE_ERROR("%d-%04x: set xdpe avs vout page%u failed, ret: %d\n", client->adapter->nr,
+            client->addr, WB_XDPE_I2C_VOUT_PAGE, ret);
+        goto error;
+    }
+
+    ret = xdpe_get_vout_precision(client, &vout_precision);
+    if (ret < 0) {
+        WB_XDPE_ERROR("%d-%04x: get xdpe avs vout precision failed, ret: %d\n",
+            client->adapter->nr, client->addr, ret);
+        goto error;
+    }
+
+    vout_cmd_set = (vout * vout_precision) / (1000L * 1000L);
+    if (vout_cmd_set > 0xffff) {
+        WB_XDPE_ERROR("%d-%04x: invalid value, vout %ld, vout_precision: %d, vout_cmd_set: 0x%x\n",
+            client->adapter->nr, client->addr, vout, vout_precision, vout_cmd_set);
+        ret = -EINVAL;
+        goto error;
+    }
+    ret = wb_i2c_smbus_write_word_data(client, WB_XDPE_I2C_VOUT_COMMAND, vout_cmd_set);
+    if (ret < 0) {
+        WB_XDPE_ERROR("%d-%04x: set xdpe vout cmd reg: 0x%x,  value: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, WB_XDPE_I2C_VOUT_COMMAND, vout_cmd_set, ret);
+        goto error;
+    }
+
+    vout_cmd = wb_i2c_smbus_read_word_data(client, WB_XDPE_I2C_VOUT_COMMAND);
+    if (vout_cmd < 0) {
+        ret = vout_cmd;
+        WB_XDPE_ERROR("%d-%04x: read xdpe vout command reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, WB_XDPE_I2C_VOUT_COMMAND, ret);
+        goto error;
+    }
+    if (vout_cmd != vout_cmd_set) {
+        ret = -EIO;
+        WB_XDPE_ERROR("%d-%04x: vout cmd value check error, vout cmd read: 0x%x, vout cmd set: 0x%x\n",
+            client->adapter->nr, client->addr, vout_cmd, vout_cmd_set);
+        goto error;
+
+    }
+
+    wb_i2c_smbus_write_byte_data(client, WB_XDPE_I2C_PAGE_ADDR, ori_page);
+    mutex_unlock(&data->update_lock);
+    WB_XDPE_VERBOSE("%d-%04x: set vout cmd success, vout %ld, vout_precision: %d, vout_cmd_set: 0x%x\n",
+        client->adapter->nr, client->addr, vout, vout_precision, vout_cmd_set);
+    return count;
+error:
+    wb_i2c_smbus_write_byte_data(client, WB_XDPE_I2C_PAGE_ADDR, ori_page);
+    mutex_unlock(&data->update_lock);
+    return ret;
+}
+
+static ssize_t xdpe_avs_vout_max_show(struct device *dev, struct device_attribute *da, char *buf)
+{
+    struct i2c_client *client;
+    struct xdpe_data *data;
+    long vout_max;
+
+    client = to_i2c_client(dev);
+    data = i2c_get_clientdata(client);
+    vout_max = data->vout_max;
+    return snprintf(buf, PAGE_SIZE, "%ld\n", vout_max);
+}
+
+static ssize_t xdpe_avs_vout_max_store(struct device *dev, struct device_attribute *da,
+                   const char *buf, size_t count)
+{
+    int ret;
+    struct i2c_client *client;
+    struct xdpe_data *data;
+    long vout_max;
+
+    client = to_i2c_client(dev);
+    ret = kstrtol(buf, 10, &vout_max);
+    if (ret) {
+        WB_XDPE_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+    WB_XDPE_VERBOSE("%d-%04x: vout max threshold: %ld", client->adapter->nr, client->addr,
+        vout_max);
+    data = i2c_get_clientdata(client);
+    data->vout_max = vout_max;
+    return count;
+}
+
+static ssize_t xdpe_avs_vout_min_show(struct device *dev, struct device_attribute *da, char *buf)
+{
+    struct i2c_client *client;
+    struct xdpe_data *data;
+    long vout_min;
+
+    client = to_i2c_client(dev);
+    data = i2c_get_clientdata(client);
+    vout_min = data->vout_min;
+    return snprintf(buf, PAGE_SIZE, "%ld\n", vout_min);
+}
+
+static ssize_t xdpe_avs_vout_min_store(struct device *dev, struct device_attribute *da,
+                   const char *buf, size_t count)
+{
+    int ret;
+    struct i2c_client *client;
+    struct xdpe_data *data;
+    long vout_min;
+
+    client = to_i2c_client(dev);
+    ret = kstrtol(buf, 10, &vout_min);
+    if (ret) {
+        WB_XDPE_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+    WB_XDPE_VERBOSE("%d-%04x: vout min threshold: %ld", client->adapter->nr, client->addr,
+        vout_min);
+    data = i2c_get_clientdata(client);
+    data->vout_min = vout_min;
+    return count;
+}
+
+/* xdpe hwmon */
+static SENSOR_DEVICE_ATTR(power1_input, S_IRUGO ,xdpe_power_value_show, NULL, 0x072c);
+static SENSOR_DEVICE_ATTR(power2_input, S_IRUGO ,xdpe_power_value_show, NULL, 0x0b2c);
+static SENSOR_DEVICE_ATTR(power3_input, S_IRUGO  ,xdpe_power_value_show, NULL, 0x072c0b2c);
+
+static struct attribute *xdpe_hwmon_attrs[] = {
+    &sensor_dev_attr_power1_input.dev_attr.attr,
+    &sensor_dev_attr_power2_input.dev_attr.attr,
+    &sensor_dev_attr_power3_input.dev_attr.attr,
+    NULL
+};
+ATTRIBUTE_GROUPS(xdpe_hwmon);
+
+/* xdpe sysfs */
+static SENSOR_DEVICE_ATTR(avs_vout, S_IRUGO | S_IWUSR, xdpe_avs_vout_show, xdpe_avs_vout_store, 0);
+static SENSOR_DEVICE_ATTR(avs_vout_max, S_IRUGO | S_IWUSR, xdpe_avs_vout_max_show, xdpe_avs_vout_max_store, 0);
+static SENSOR_DEVICE_ATTR(avs_vout_min, S_IRUGO | S_IWUSR, xdpe_avs_vout_min_show, xdpe_avs_vout_min_store, 0);
+
+static struct attribute *xdpe132g5c_sysfs_attrs[] = {
+    &sensor_dev_attr_avs_vout.dev_attr.attr,
+    &sensor_dev_attr_avs_vout_max.dev_attr.attr,
+    &sensor_dev_attr_avs_vout_min.dev_attr.attr,
+    NULL,
+};
+
+static const struct attribute_group xdpe132g5c_sysfs_attrs_group = {
+    .attrs = xdpe132g5c_sysfs_attrs,
+};
+
+static int xdpe132g5c_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+    struct xdpe_data *data;
+    int ret;
+
+    WB_XDPE_VERBOSE("bus: %d, addr: 0x%02x do probe.\n", client->adapter->nr, client->addr);
+    data = devm_kzalloc(&client->dev, sizeof(struct xdpe_data), GFP_KERNEL);
+    if (!data) {
+        dev_err(&client->dev, "devm_kzalloc failed.\n");
+        return -ENOMEM;
+    }
+
+    data->client = client;
+    i2c_set_clientdata(client, data);
+    mutex_init(&data->update_lock);
+
+    ret = sysfs_create_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group);
+    if (ret != 0) {
+        dev_err(&client->dev, "Create xdpe132g5c sysfs failed, ret: %d\n", ret);
+        return ret;
+    }
+    data->hwmon_dev = hwmon_device_register_with_groups(&client->dev, client->name, data,
+                          xdpe_hwmon_groups);
+    if (IS_ERR(data->hwmon_dev)) {
+        ret = PTR_ERR(data->hwmon_dev);
+        sysfs_remove_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group);
+        dev_err(&client->dev, "Failed to register xdpe hwmon device, ret: %d\n", ret);
+        return ret;
+    }
+    data->vout_max = WB_XDPE_VOUT_MAX_THRESHOLD;
+    data->vout_min = WB_XDPE_VOUT_MIN_THRESHOLD;
+    dev_info(&client->dev, "xdpe132g5c probe success\n");
+    return 0;
+}
+
+static int xdpe132g5c_remove(struct i2c_client *client)
+{
+    struct xdpe_data *data;
+
+    WB_XDPE_VERBOSE("bus: %d, addr: 0x%02x do remove\n", client->adapter->nr, client->addr);
+    data = i2c_get_clientdata(client);
+    hwmon_device_unregister(data->hwmon_dev);
+    sysfs_remove_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group);
+    return 0;
+}
+
+static const struct i2c_device_id xdpe132g5c_id[] = {
+    {"wb_xdpe132g5c", 0},
+    {}
+};
+
+MODULE_DEVICE_TABLE(i2c, xdpe132g5c_id);
+
+static const struct of_device_id __maybe_unused xdpe132g5c_of_match[] = {
+    {.compatible = "infineon,wb_xdpe132g5c"},
+    {}
+};
+MODULE_DEVICE_TABLE(of, xdpe132g5c_of_match);
+
+static struct i2c_driver wb_xdpe132g5c_driver = {
+    .driver = {
+        .name = "wb_xdpe132g5c",
+        .of_match_table = of_match_ptr(xdpe132g5c_of_match),
+    },
+    .probe      = xdpe132g5c_probe,
+    .remove     = xdpe132g5c_remove,
+    .id_table   = xdpe132g5c_id,
+};
+
+module_i2c_driver(wb_xdpe132g5c_driver);
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("I2C driver for Infineon XDPE132 family");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/auto_update.py b/platform/broadcom/sonic-platform-modules-micas/common/script/auto_update.py
new file mode 100755
index 000000000000..838e64f6b417
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/auto_update.py
@@ -0,0 +1,196 @@
+#!/usr/bin/env python3
+
+try:
+    import os
+    import json
+    import logging
+    import sys
+    from sonic_py_common import device_info
+    from sonic_platform.platform import Platform
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+PLATFORM_COMPONENTS_FILE = "platform_components.json"
+CHASSIS_KEY = "chassis"
+COMPONENT_KEY = "component"
+FIRMWARE_KEY = "firmware"
+VERSION_KEY = "version"
+chassis_component_map = {}
+current_chassis_component_map = {}
+current_chassis = Platform().get_chassis()
+
+
+def parse_component_section(section, component):
+    if not isinstance(component, dict):
+        logging.error("dictionary is expected: key=%s", COMPONENT_KEY)
+        return False
+
+    if not component:
+        return False
+
+    missing_key = None
+    chassis_component_map[section] = {}
+
+    for key1, value1 in component.items():
+        if not isinstance(value1, dict):
+            logging.error("dictionary is expected: key=%s", key1)
+            return False
+
+        if value1:
+            if len(value1) < 1 or len(value1) > 3:
+                logging.error("unexpected number of records: key=%s", key1)
+                return False
+
+            if FIRMWARE_KEY not in value1:
+                missing_key = FIRMWARE_KEY
+                break
+
+            for key2, value2 in value1.items():
+                if not isinstance(value2, str):
+                    logging.error("string is expected: key=%s", key2)
+                    return False
+
+            chassis_component_map[section][key1] = value1
+
+    if missing_key is not None:
+        logging.error("\"%s\" key hasn't been found", missing_key)
+        return False
+
+    return True
+
+
+def parse_chassis_section(chassis):
+    if not isinstance(chassis, dict):
+        logging.error("dictionary is expected: key=%s", CHASSIS_KEY)
+        return False
+
+    if not chassis:
+        logging.error("dictionary is empty: key=%s", CHASSIS_KEY)
+        return False
+
+    if len(chassis) != 1:
+        logging.error("unexpected number of records: key=%s", CHASSIS_KEY)
+        return False
+
+    for key, value in chassis.items():
+        if not isinstance(value, dict):
+            logging.error("dictionary is expected: key=%s", key)
+            return False
+
+        if not value:
+            logging.error("dictionary is empty: key=%s", key)
+            return False
+
+        if COMPONENT_KEY not in value:
+            logging.error("\"%s\" key hasn't been found", COMPONENT_KEY)
+            return False
+
+        if len(value) != 1:
+            logging.error("unexpected number of records: key=%s", key)
+            return False
+
+        return parse_component_section(key, value[COMPONENT_KEY])
+
+    return False
+
+
+def get_platform_components_path():
+    PLATFORM_COMPONENTS_PATH_TEMPLATE = "/usr/share/sonic/device/{}/{}"
+    PLATFORM_COMPONENTS_FILE_PATH = PLATFORM_COMPONENTS_PATH_TEMPLATE.format(
+        device_info.get_platform(), PLATFORM_COMPONENTS_FILE)
+    return PLATFORM_COMPONENTS_FILE_PATH
+
+
+def parse_platform_components():
+    platform_components_path = get_platform_components_path()
+    with open(platform_components_path) as platform_components:
+        data = json.load(platform_components)
+
+        if not isinstance(data, dict):
+            logging.error("dictionary is expected: key=root")
+            return False
+
+        if not data:
+            logging.error("dictionary is empty: key=root")
+            return False
+
+        if CHASSIS_KEY not in data:
+            logging.error("\"%s\" key hasn't been found", CHASSIS_KEY)
+            return False
+
+        return parse_chassis_section(data[CHASSIS_KEY])
+
+
+def get_current_chassis_component_map():
+    chassis_name = current_chassis.get_name()
+    current_chassis_component_map[chassis_name] = {}
+
+    component_list = current_chassis.get_all_components()
+    for component in component_list:
+        component_name = component.get_name()
+        current_chassis_component_map[chassis_name][component_name] = component
+
+    return current_chassis_component_map
+
+
+def get_upgrade_dict():
+    upgrade_dict = {}
+    firmware_version_current = ""
+    firmware_version_available = ""
+
+    if not parse_platform_components():
+        logging.error("Reading platform_components.json i, ion exception")
+        sys.exit(1)
+
+    if not get_current_chassis_component_map():
+        logging.error("Reading firmware i, ion from the driver is abnormal")
+        sys.exit(1)
+
+    chassis_name = current_chassis.get_name()
+    diff_keys = set(chassis_component_map.keys()) ^ set(current_chassis_component_map.keys())
+    if diff_keys:
+        logging.error("%s names mismatch: keys=%s", chassis_name, str(list(diff_keys)))
+        return None
+
+    for chassis_name, component_map in current_chassis_component_map.items():
+        for component_name, component in component_map.items():
+            firmware_version_current = component.get_firmware_version()
+            if component_name in chassis_component_map[chassis_name]:
+                firmware_version_available = chassis_component_map[chassis_name][component_name][VERSION_KEY]
+            else:
+                logging.warning("can't find %s in %s", component_name, PLATFORM_COMPONENTS_FILE)
+                break
+
+            if not os.path.exists(chassis_component_map[chassis_name][component_name][FIRMWARE_KEY]):
+                logging.error("%s does not exist", chassis_component_map[chassis_name][component_name][FIRMWARE_KEY])
+                break
+
+            if firmware_version_available != firmware_version_current:
+                upgrade_dict[component_name] = chassis_component_map[chassis_name][component_name][FIRMWARE_KEY]
+
+    return upgrade_dict
+
+
+def auto_upgrade():
+    upgrade_result_dict = {}
+    chassis_name = current_chassis.get_name()
+
+    upgrade_dict = get_upgrade_dict()
+    if not upgrade_dict:
+        logging.info("No firmware found for automatic upgrade")
+        return None
+
+    component_map = current_chassis_component_map[chassis_name]
+    for value, path in upgrade_dict.items():
+        status = component_map[value].install_firmware(path)
+        if status:
+            upgrade_result_dict[value] = "success"
+            logging.info("%s Upgrade Success", value)
+        else:
+            upgrade_result_dict[value] = "failed"
+            logging.error("%s Upgrade Failed", value)
+    return upgrade_result_dict
+
+
+if __name__ == '__main__':
+    auto_upgrade()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/avscontrol.py b/platform/broadcom/sonic-platform-modules-micas/common/script/avscontrol.py
new file mode 100755
index 000000000000..a0a2ccaac938
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/avscontrol.py
@@ -0,0 +1,203 @@
+#!/usr/bin/env python3
+import sys
+import os
+import time
+import syslog
+import glob
+import click
+from platform_config import MAC_DEFAULT_PARAM
+from platform_util import getSdkReg, write_sysfs, get_value, get_format_value
+
+
+AVSCTROL_DEBUG_FILE = "/etc/.avscontrol_debug_flag"
+
+AVSCTROLERROR = 1
+AVSCTROLDEBUG = 2
+
+debuglevel = 0
+
+CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+
+
+class AliasedGroup(click.Group):
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        if len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+        return None
+
+
+def avscontrol_debug(s):
+    if AVSCTROLDEBUG & debuglevel:
+        syslog.openlog("AVSCONTROL", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def avscontrol_error(s):
+    if AVSCTROLERROR & debuglevel:
+        syslog.openlog("AVSCONTROL", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+def avserror(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("AVSCONTROL", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_ERR, s)
+
+
+def avsinfo(s):
+    syslog.openlog("AVSCONTROL", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_INFO, s)
+
+
+def debug_init():
+    global debuglevel
+    if os.path.exists(AVSCTROL_DEBUG_FILE):
+        debuglevel = debuglevel | AVSCTROLDEBUG | AVSCTROLERROR
+    else:
+        debuglevel = debuglevel & ~(AVSCTROLDEBUG | AVSCTROLERROR)
+
+
+def set_avs_value_sysfs(conf, dcdc_value):
+    msg = ""
+    formula = conf.get("formula", None)
+    loc = conf.get("loc")
+    locations = glob.glob(loc)
+    if len(locations) == 0:
+        msg = "avs sysfs loc: %s not found" % loc
+        avscontrol_error(msg)
+        return False, msg
+    sysfs_loc = locations[0]
+    avscontrol_debug("set_avs_value_sysfs, loc: %s, origin dcdc value: %s, formula: %s" %
+                     (sysfs_loc, dcdc_value, formula))
+    if formula is not None:
+        dcdc_value = get_format_value(formula % (dcdc_value))
+    wr_val = str(dcdc_value)
+    avscontrol_debug("set_avs_value_sysfs, write val: %s" % wr_val)
+    ret, log = write_sysfs(sysfs_loc, wr_val)
+    if ret is False:
+        msg = "set_avs_value_sysfs failed, msg: %s" % log
+        avscontrol_error(msg)
+    return ret, msg
+
+
+def set_avs_value(avs_conf, dcdc_value):
+    set_avs_way = avs_conf.get("set_avs", {}).get("gettype")
+    if set_avs_way != "sysfs":
+        msg = "unsupport set avs value type: %s" % set_avs_way
+        avscontrol_error(msg)
+        return False, msg
+    ret, msg = set_avs_value_sysfs(avs_conf["set_avs"], dcdc_value)
+    return ret, msg
+
+
+def get_dcdc_value(avs_conf, rov_value):
+    msg = ""
+    mac_avs_param = avs_conf.get("mac_avs_param", {})
+    if rov_value not in mac_avs_param.keys():
+        if avs_conf["type"] == 0:
+            msg = "VID:0x%x out of range, voltage regulate stop" % rov_value
+            avsinfo(msg)
+            return False, msg
+        dcdc_value = mac_avs_param[avs_conf["default"]]
+        avsinfo("VID:0x%x out of range, use default VID:0x%x" % (rov_value, dcdc_value))
+    else:
+        dcdc_value = mac_avs_param[rov_value]
+    return True, dcdc_value
+
+
+def get_rov_value_cpld(avs_conf):
+    cpld_avs_config = avs_conf["cpld_avs"]
+    return get_value(cpld_avs_config)
+
+
+def get_rov_value_sdk(avs_conf):
+    name = avs_conf["sdkreg"]
+    ret, status = getSdkReg(name)
+    if ret is False:
+        return False, status
+    status = int(status, 16)
+    # shift operation
+    if avs_conf["sdktype"] != 0:
+        status = (status >> avs_conf["macregloc"]) & avs_conf["mask"]
+    macavs = status
+    return True, macavs
+
+
+def doAvsCtrol_single(avs_conf):
+    try:
+        avs_name = avs_conf.get("name")
+        rov_source = avs_conf["rov_source"]
+        if rov_source == 0:
+            ret, rov_value = get_rov_value_cpld(avs_conf)  # get rov from cpld reg
+        else:
+            ret, rov_value = get_rov_value_sdk(avs_conf)  # get rov from sdk reg
+        if ret is False:
+            msg = "%s get rov_value failed, msg: %s" % (avs_name, rov_value)
+            avscontrol_error(msg)
+            return False, msg
+        avscontrol_debug("%s rov_value:  0x%x" % (avs_name, rov_value))
+        ret, dcdc_value = get_dcdc_value(avs_conf, rov_value)
+        if ret is False:
+            msg = "%s get output voltage value failed, msg: %s" % (avs_name, dcdc_value)
+            avscontrol_error(msg)
+            return False, msg
+        ret, msg = set_avs_value(avs_conf, dcdc_value)
+        return ret, msg
+    except Exception as e:
+        msg = "%s avscontrol raise exception, msg: %s" % (avs_name, str(e))
+        avscontrol_error(msg)
+        return False, msg
+
+
+def doAvsCtrol(avs_conf):
+    retry_time = avs_conf.get("retry", 10)
+    for i in range(retry_time):
+        debug_init()
+        ret, log = doAvsCtrol_single(avs_conf)
+        if ret is True:
+            return True, log
+        time.sleep(1)
+    return False, log
+
+
+def run():
+    # wait 30s for device steady
+    time.sleep(30)
+    errcnt = 0
+    msg = ""
+    for item in MAC_DEFAULT_PARAM:
+        status, log = doAvsCtrol(item)
+        if status is False:
+            errcnt += 1
+            msg += log
+
+    if errcnt == 0:
+        avsinfo("%%AVSCONTROL success")
+        sys.exit(0)
+    avserror("%%DEV_MONITOR-AVS: MAC Voltage adjust failed.")
+    avserror("%%DEV_MONITOR-AVS: errmsg: %s" % msg)
+    sys.exit(1)
+
+
+@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
+def main():
+    '''device operator'''
+
+
+@main.command()
+def start():
+    '''start AVS control'''
+    avsinfo("%%AVSCONTROL start")
+    run()
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/dev_monitor.py b/platform/broadcom/sonic-platform-modules-micas/common/script/dev_monitor.py
new file mode 100755
index 000000000000..e13377b80fe9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/dev_monitor.py
@@ -0,0 +1,303 @@
+#!/usr/bin/env python3
+import sys
+import os
+import time
+import syslog
+import traceback
+import click
+from platform_config import DEV_MONITOR_PARAM
+from platform_util import io_rd, wbi2cget
+
+
+CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+
+
+class AliasedGroup(click.Group):
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        if len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+        return None
+
+
+DEVMONITOR_DEBUG_FILE = "/etc/.devmonitor_debug_flag"
+
+debuglevel = 0
+
+
+def debug_init():
+    global debuglevel
+    if os.path.exists(DEVMONITOR_DEBUG_FILE):
+        debuglevel = 1
+    else:
+        debuglevel = 0
+
+
+def devwarninglog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("DEVMONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_WARNING, s)
+
+
+def devcriticallog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("DEVMONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_CRIT, s)
+
+
+def deverror(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("DEVMONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_ERR, s)
+
+
+def devinfo(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("DEVMONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_INFO, s)
+
+
+def devdebuglog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    if debuglevel == 1:
+        syslog.openlog("DEVMONITOR", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+class DevMonitor():
+
+    def getpresentstatus(self, param):
+        try:
+            ret = {}
+            ret["status"] = ''
+            gettype = param.get('gettype')
+            presentbit = param.get('presentbit')
+            okval = param.get('okval')
+            if gettype == "io":
+                io_addr = param.get('io_addr')
+                val = io_rd(io_addr)
+                if val is None:
+                    ret["status"] = "NOT OK"
+                    return ret
+                retval = val
+            else:
+                bus = param.get('bus')
+                loc = param.get('loc')
+                offset = param.get('offset')
+                ind, val = wbi2cget(bus, loc, offset)
+                if ind is not True:
+                    ret["status"] = "NOT OK"
+                    return ret
+                retval = val
+            val_t = (int(retval, 16) & (1 << presentbit)) >> presentbit
+            if val_t != okval:
+                ret["status"] = "ABSENT"
+            else:
+                ret["status"] = "PRESENT"
+        except Exception as e:
+            ret["status"] = "NOT OK"
+            deverror("getpresentstatus error")
+            deverror(str(e))
+        return ret
+
+    def removeDev(self, bus, loc):
+        cmd = "echo  0x%02x > /sys/bus/i2c/devices/i2c-%d/delete_device" % (loc, bus)
+        devpath = "/sys/bus/i2c/devices/%d-%04x" % (bus, loc)
+        if os.path.exists(devpath):
+            os.system(cmd)
+
+    def addDev(self, name, bus, loc):
+        if name == "lm75":
+            time.sleep(0.1)
+        cmd = "echo  %s 0x%02x > /sys/bus/i2c/devices/i2c-%d/new_device" % (name, loc, bus)
+        devpath = "/sys/bus/i2c/devices/%d-%04x" % (bus, loc)
+        if os.path.exists(devpath) is False:
+            os.system(cmd)
+
+    def checkattr(self, bus, loc, attr):
+        try:
+            attrpath = "/sys/bus/i2c/devices/%d-%04x/%s" % (bus, loc, attr)
+            if os.path.exists(attrpath):
+                return True
+        except Exception as e:
+            deverror("checkattr error")
+            deverror(str(e))
+        return False
+
+    def monitor(self, ret):
+        totalerr = 0
+        for item in ret:
+            try:
+                name = item.get('name')
+                itemattr = '%sattr' % name
+                val_t = getattr(DevMonitor, itemattr, None)
+                if val_t == 'OK':
+                    continue
+                present = item.get('present', None)
+                devices = item.get('device')
+                err_t = 0
+                for item_dev in devices:
+                    item_devattr = '%s' % (item_dev['id'])
+                    val_t = getattr(DevMonitor, item_devattr, None)
+                    if val_t == 'OK':
+                        continue
+                    devname = item_dev.get('name')
+                    bus = item_dev.get('bus')
+                    loc = item_dev.get('loc')
+                    attr = item_dev.get('attr')
+                    if self.checkattr(bus, loc, attr) is False:
+                        err_t -= 1
+                        setattr(DevMonitor, item_devattr, 'NOT OK')
+                        if present is not None:
+                            presentstatus = self.getpresentstatus(present)
+                            devdebuglog("%s present status:%s" % (name, presentstatus.get('status')))
+                            if presentstatus.get('status') == 'PRESENT':
+                                self.removeDev(bus, loc)
+                                time.sleep(0.1)
+                                self.addDev(devname, bus, loc)
+                        else:
+                            self.removeDev(bus, loc)
+                            time.sleep(0.1)
+                            self.addDev(devname, bus, loc)
+                    else:
+                        setattr(DevMonitor, item_devattr, 'OK')
+                    val_t = getattr(DevMonitor, item_devattr, None)
+                    devdebuglog("%s status %s" % (item_devattr, val_t))
+                if err_t == 0:
+                    setattr(DevMonitor, itemattr, 'OK')
+                else:
+                    totalerr -= 1
+                    setattr(DevMonitor, itemattr, 'NOT OK')
+                val_t = getattr(DevMonitor, itemattr, None)
+                devdebuglog("%s status %s" % (itemattr, val_t))
+            except Exception as e:
+                totalerr -= 1
+                deverror("monitor error")
+                deverror(str(e))
+        return totalerr
+
+    def psusmonitor(self):
+        psus_conf = DEV_MONITOR_PARAM.get('psus')
+        if psus_conf is None:
+            return 0
+        psusattr = 'psusattr'
+        val_t = getattr(DevMonitor, psusattr, None)
+        if val_t == 'OK':
+            return 0
+        ret = self.monitor(psus_conf)
+        if ret == 0:
+            setattr(DevMonitor, psusattr, 'OK')
+        else:
+            setattr(DevMonitor, psusattr, 'NOT OK')
+        val_t = getattr(DevMonitor, psusattr, None)
+        devdebuglog("psusattr:value:%s" % (val_t))
+        return ret
+
+    def fansmonitor(self):
+        fans_conf = DEV_MONITOR_PARAM.get('fans')
+        if fans_conf is None:
+            return 0
+        fansattr = 'fansattr'
+        val_t = getattr(DevMonitor, fansattr, None)
+        if val_t == 'OK':
+            return 0
+        ret = self.monitor(fans_conf)
+        if ret == 0:
+            setattr(DevMonitor, fansattr, 'OK')
+        else:
+            setattr(DevMonitor, fansattr, 'NOT OK')
+        val_t = getattr(DevMonitor, fansattr, None)
+        devdebuglog("fansattr:value:%s" % (val_t))
+        return ret
+
+    def slotsmonitor(self):
+        slots_conf = DEV_MONITOR_PARAM.get('slots')
+        if slots_conf is None:
+            return 0
+        slotsattr = 'slotsattr'
+        val_t = getattr(DevMonitor, slotsattr, None)
+        if val_t == 'OK':
+            return 0
+        ret = self.monitor(slots_conf)
+        if ret == 0:
+            setattr(DevMonitor, slotsattr, 'OK')
+        else:
+            setattr(DevMonitor, slotsattr, 'NOT OK')
+        val_t = getattr(DevMonitor, slotsattr, None)
+        devdebuglog("slotsattr:value:%s" % (val_t))
+        return ret
+
+    def othersmonitor(self):
+        others_conf = DEV_MONITOR_PARAM.get('others')
+        if others_conf is None:
+            return 0
+        othersattr = 'othersattr'
+        val_t = getattr(DevMonitor, othersattr, None)
+        if val_t == 'OK':
+            return 0
+        ret = self.monitor(others_conf)
+        if ret == 0:
+            setattr(DevMonitor, othersattr, 'OK')
+        else:
+            setattr(DevMonitor, othersattr, 'NOT OK')
+        val_t = getattr(DevMonitor, othersattr, None)
+        devdebuglog("othersattr:value:%s" % (val_t))
+        return ret
+
+
+def doDevMonitor(devMonitor):
+    ret_t = 0
+    ret_t += devMonitor.psusmonitor()
+    ret_t += devMonitor.fansmonitor()
+    ret_t += devMonitor.slotsmonitor()
+    ret_t += devMonitor.othersmonitor()
+    return ret_t
+
+
+def run(interval, devMonitor):
+    # devMonitor.devattrinit()
+    while True:
+        try:
+            debug_init()
+            ret = doDevMonitor(devMonitor)
+        except Exception as e:
+            traceback.print_exc()
+            deverror(str(e))
+            ret = -1
+        if ret == 0:
+            time.sleep(5)
+            devinfo("dev_monitor finished!")
+            sys.exit(0)
+        time.sleep(interval)
+
+
+@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
+def main():
+    '''device operator'''
+
+
+@main.command()
+def start():
+    '''start device monitor'''
+    devinfo("dev_monitor start")
+    devMonitor = DevMonitor()
+    interval = DEV_MONITOR_PARAM.get('polling_time', 10)
+    run(interval, devMonitor)
+
+
+@main.command()
+def stop():
+    '''stop device monitor '''
+    devinfo("stop")
+
+
+# device_i2c operation
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/generate_airflow.py b/platform/broadcom/sonic-platform-modules-micas/common/script/generate_airflow.py
new file mode 100755
index 000000000000..29d18e7b2688
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/generate_airflow.py
@@ -0,0 +1,236 @@
+#!/usr/bin/env python
+# -*- coding: UTF-8 -*-
+'''
+generate board air flow according to fan and psu air flow
+write resulet to AIRFLOW_RESULT_FILE, file format:
+{
+    "FAN1": {
+        "model":"M1HFAN I-F",
+        "airflow":"intake",
+    },
+    "PSU1": {
+        "model":"CSU550AP-3-500",
+        "airflow":"intake",
+    },
+    "board":"intake"
+}
+'''
+import os
+import syslog
+import json
+from platform_config import AIR_FLOW_CONF, AIRFLOW_RESULT_FILE
+from platform_util import dev_file_read, byteTostr
+from eepromutil.fru import ipmifru
+from eepromutil.fantlv import fan_tlv
+
+
+AIRFLOW_DEBUG_FILE = "/etc/.airflow_debug_flag"
+
+AIRFLOWERROR = 1
+AIRFLOWDEBUG = 2
+
+debuglevel = 0
+
+
+def airflow_info(s):
+    syslog.openlog("AIRFLOW", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_INFO, s)
+
+
+def airflow_error(s):
+    syslog.openlog("AIRFLOW", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_ERR, s)
+
+
+def airflow_debug(s):
+    if AIRFLOWDEBUG & debuglevel:
+        syslog.openlog("AIRFLOW", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def airflow_debug_error(s):
+    if AIRFLOWERROR & debuglevel:
+        syslog.openlog("AIRFLOW", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+def debug_init():
+    global debuglevel
+    try:
+        with open(AIRFLOW_DEBUG_FILE, "r") as fd:
+            value = fd.read()
+        debuglevel = int(value)
+    except Exception:
+        debuglevel = 0
+
+
+def get_model_fru(device, eeprom):
+    try:
+        fru = ipmifru()
+        fru.decodeBin(eeprom)
+        dev_name = device.get("name")
+        area = device.get("area")
+        field = device.get("field")
+        tmp_area = getattr(fru, area, None)
+        if tmp_area is None:
+            msg = "%s fru %s area config error" % (dev_name, area)
+            return False, msg
+        model = getattr(tmp_area, field, None)
+        if model is None:
+            msg = "%s get model error, area: %s, field: %s" % (dev_name, area, field)
+            return False, msg
+        airflow_debug("%s get model success, model: %s" % (dev_name, model))
+        return True, model
+    except Exception as e:
+        return False, str(e)
+
+
+def get_model_fantlv(device, eeprom):
+    try:
+        dev_name = device.get("name")
+        tlv = fan_tlv()
+        rets = tlv.decode(eeprom)
+        if len(rets) == 0:
+            msg = "%s decode fantlv eeprom info error" % dev_name
+            return False, msg
+
+        field = device.get("field")
+        for fantlv_item in rets:
+            if fantlv_item.get("name") == field:
+                return True, fantlv_item["value"]
+        msg = "%s get model error, field: %s not found" % (dev_name, field)
+        return False, msg
+    except Exception as e:
+        return False, str(e)
+
+
+def get_device_modele(device):
+    e2_type = device.get("e2_type")
+    dev_name = device.get("name")
+    support_e2_type = ("fru", "fantlv")
+    if e2_type not in support_e2_type:
+        msg = "%s unsupport e2_type: %s" % (dev_name, e2_type)
+        return False, msg
+
+    e2_path = device.get("e2_path")
+    e2_size = device.get("e2_size", 256)
+    ret, binval_bytes = dev_file_read(e2_path, 0, e2_size)
+    if ret is False:
+        msg = "%s eeprom read error, eeprom path: %s, msg: %s" % (dev_name, e2_path, binval_bytes)
+        return False, msg
+
+    binval = byteTostr(binval_bytes)
+    if e2_type == "fru":
+        return get_model_fru(device, binval)
+    return get_model_fantlv(device, binval)
+
+
+def get_board_air_flow(fan_intake_num, fan_exhaust_num, psu_intake_num, psu_exhaust_num):
+    airflow_debug("fan_intake_num: %d, fan_exhaust_num: %d, psu_intake_num: %d, psu_exhaust_num: %d" %
+                  (fan_intake_num, fan_exhaust_num, psu_intake_num, psu_exhaust_num))
+
+    if fan_intake_num == 0 and fan_exhaust_num == 0 and psu_intake_num == 0 and psu_exhaust_num == 0:
+        airflow_error("get all fans and psus air flow failed")
+        return "N/A"
+
+    if fan_intake_num > fan_exhaust_num:
+        airflow_debug("fan intake number %d more than fan exhaust number %s, set board air flow: intake")
+        return "intake"
+
+    if fan_intake_num < fan_exhaust_num:
+        airflow_debug("fan intake number less than fan exhaust number, set board air flow: exhaust")
+        return "exhaust"
+
+    airflow_debug("fan intake number equal to exhaust number, check psu air flow")
+
+    if psu_intake_num > psu_exhaust_num:
+        airflow_debug("psu intake number more than psu exhaust number, set board air flow: intake")
+        return "intake"
+
+    if psu_intake_num < psu_exhaust_num:
+        airflow_debug("psu intake number less than psu exhaust number, set board air flow: exhaust")
+        return "exhaust"
+
+    airflow_debug("fan and psu intake and exhaust number equal, return intake")
+    return "intake"
+
+
+def generate_airflow():
+    fan_intake_list = []
+    fan_exhaust_list = []
+    psu_intake_list = []
+    psu_exhaust_list = []
+    ret = {}
+    fans = AIR_FLOW_CONF.get("fans", [])
+    psus = AIR_FLOW_CONF.get("psus", [])
+
+    for fan in fans:
+        dev_name = fan.get("name")
+        air_flow = "N/A"
+        status, model = get_device_modele(fan)
+        if status is False:
+            ret[dev_name] = {"model": "N/A", "airflow": "N/A"}
+            airflow_error(model)
+            continue
+        model = model.strip()
+        airflowconifg = AIR_FLOW_CONF[fan["decode"]]
+        for key, value in airflowconifg.items():
+            if model in value:
+                air_flow = key
+        ret[dev_name] = {"model": model, "airflow": air_flow}
+        airflow_debug("%s model: %s, airflow: %s" % (dev_name, model, air_flow))
+        if air_flow == "intake":
+            fan_intake_list.append(fan.get("name"))
+        elif air_flow == "exhaust":
+            fan_exhaust_list.append(fan.get("name"))
+
+    airflow_debug("fan_intake_list: %s" % fan_intake_list)
+    airflow_debug("fan_exhaust_list: %s" % fan_exhaust_list)
+
+    for psu in psus:
+        dev_name = psu.get("name")
+        air_flow = "N/A"
+        status, model = get_device_modele(psu)
+        if status is False:
+            ret[dev_name] = {"model": "N/A", "airflow": "N/A"}
+            airflow_error(model)
+            continue
+        model = model.strip()
+        airflowconifg = AIR_FLOW_CONF[psu["decode"]]
+        for key, value in airflowconifg.items():
+            if model in value:
+                air_flow = key
+        ret[dev_name] = {"model": model, "airflow": air_flow}
+        airflow_debug("%s model: %s, airflow: %s" % (dev_name, model, air_flow))
+        if air_flow == "intake":
+            psu_intake_list.append(psu.get("name"))
+        elif air_flow == "exhaust":
+            psu_exhaust_list.append(psu.get("name"))
+
+    airflow_debug("psu_intake_list: %s" % psu_intake_list)
+    airflow_debug("psu_exhaust_list: %s" % psu_exhaust_list)
+
+    fan_intake_num = len(fan_intake_list)
+    fan_exhaust_num = len(fan_exhaust_list)
+    psu_intake_num = len(psu_intake_list)
+    psu_exhaust_num = len(psu_exhaust_list)
+
+    board_airflow = get_board_air_flow(fan_intake_num, fan_exhaust_num, psu_intake_num, psu_exhaust_num)
+    airflow_debug("board_airflow: %s" % board_airflow)
+    ret["board"] = board_airflow
+    ret_json = json.dumps(ret, ensure_ascii=False, indent=4)
+
+    out_file_dir = os.path.dirname(AIRFLOW_RESULT_FILE)
+    if len(out_file_dir) != 0:
+        cmd = "mkdir -p %s" % out_file_dir
+        os.system(cmd)
+        os.system("sync")
+    with open(AIRFLOW_RESULT_FILE, "w") as fd:
+        fd.write(ret_json)
+    os.system("sync")
+
+
+if __name__ == '__main__':
+    debug_init()
+    airflow_debug("enter main")
+    generate_airflow()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py
new file mode 100755
index 000000000000..7722b111f944
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py
@@ -0,0 +1,1135 @@
+#!/usr/bin/env python3
+import os
+import subprocess
+import time
+import syslog
+import traceback
+from plat_hal.interface import interface
+from plat_hal.baseutil import baseutil
+from algorithm.pid import pid
+from algorithm.openloop import openloop
+from algorithm.hysteresis import hysteresis
+
+
+SWITCH_TEMP = "SWITCH_TEMP"
+INLET_TEMP = "INLET_TEMP"
+BOARD_TEMP = "BOARD_TEMP"
+OUTLET_TEMP = "OUTLET_TEMP"
+CPU_TEMP = "CPU_TEMP"
+
+FANCTROL_DEBUG_FILE = "/etc/.fancontrol_debug_flag"
+# coordination with REBOOT_CAUSE_PARA
+OTP_SWITCH_REBOOT_JUDGE_FILE = "/etc/.otp_reboot_flag"
+OTP_OTHER_REBOOT_JUDGE_FILE = OTP_SWITCH_REBOOT_JUDGE_FILE
+
+FANCTROLERROR = 1
+FANCTROLDEBUG = 2
+FANAIRFLOWDEBUG = 4
+
+debuglevel = 0
+
+F2B_AIR_FLOW = "intake"
+B2F_AIR_FLOW = "exhaust"
+ONIE_E2_NAME = "ONIE_E2"
+
+TEMP_REBOOT_CRIT_SWITCH_FLAG = 1
+TEMP_REBOOT_CRIT_OTHER_FLAG = 2
+
+
+def fancontrol_debug(s):
+    if FANCTROLDEBUG & debuglevel:
+        syslog.openlog("FANCONTROL", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def fancontrol_error(s):
+    if FANCTROLERROR & debuglevel:
+        syslog.openlog("FANCONTROL", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+def fanairflow_debug(s):
+    if FANAIRFLOWDEBUG & debuglevel:
+        syslog.openlog("AIR_FLOW_MONITOR", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def fancontrol_warn(s):
+    syslog.openlog("FANCONTROL", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_LOCAL1 | syslog.LOG_WARNING, s)
+
+
+def fancontrol_crit(s):
+    syslog.openlog("FANCONTROL", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_LOCAL1 | syslog.LOG_CRIT, s)
+
+
+def fancontrol_alert(s):
+    syslog.openlog("FANCONTROL", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_LOCAL1 | syslog.LOG_ALERT, s)
+
+
+def fancontrol_emerg(s):
+    syslog.openlog("FANCONTROL", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_LOCAL1 | syslog.LOG_EMERG, s)
+
+
+def exec_os_cmd(cmd):
+    status, output = subprocess.getstatusoutput(cmd)
+    if status:
+        print(output)
+    return status, output
+
+
+def debug_init():
+    global debuglevel
+    try:
+        with open(FANCTROL_DEBUG_FILE, "r") as fd:
+            value = fd.read()
+        debuglevel = int(value)
+    except Exception:
+        debuglevel = 0
+
+
+error_temp = -9999  # get temp error
+invalid_temp = -10000  # get temp invalid
+PRE_FAN_NOK_UNKNOWN = "UNKNOWN"
+
+
+class DevFan(object):
+
+    def __init__(self, name, hal_interface):
+        self.__name = name
+        self.origin_name = None
+        self.display_name = None
+        self.air_flow = None
+        self.air_flow_inconsistent = False
+        self.int_case = hal_interface
+
+    @property
+    def name(self):
+        return self.__name
+
+    def get_fan_rotor_number(self):
+        return self.int_case.get_fan_rotor_number(self.name)
+
+    def get_fan_presence(self):
+        return self.int_case.get_fan_presence(self.name)
+
+    def get_fan_rotor_status(self, rotor_name):
+        return self.int_case.get_fan_rotor_status(self.name, rotor_name)
+
+    def get_fan_fru_info(self):
+        return self.int_case.get_fan_fru_info(self.name)
+
+    @property
+    def na_ret(self):
+        return self.int_case.na_ret
+
+    def update_fru_info(self):
+        try:
+            dic = self.get_fan_fru_info()
+            self.origin_name = dic["PN"]
+            self.air_flow = dic["AirFlow"]
+            self.display_name = dic["DisplayName"]
+        except Exception as e:
+            fanairflow_debug("update %s fru info error, msg: %s" % (self.name, str(e)))
+            self.origin_name = self.na_ret
+            self.air_flow = self.na_ret
+            self.display_name = self.na_ret
+
+
+class DevPsu(object):
+
+    def __init__(self, name, hal_interface):
+        self.__name = name
+        self.origin_name = None
+        self.display_name = None
+        self.air_flow = None
+        self.air_flow_inconsistent = False
+        self.int_case = hal_interface
+
+    @property
+    def name(self):
+        return self.__name
+
+    def get_psu_fru_info(self):
+        return self.int_case.get_psu_fru_info(self.name)
+
+    @property
+    def na_ret(self):
+        return self.int_case.na_ret
+
+    def update_fru_info(self):
+        try:
+            dic = self.get_psu_fru_info()
+            self.origin_name = dic["PN"]
+            self.air_flow = dic["AirFlow"]
+            self.display_name = dic["DisplayName"]
+        except Exception as e:
+            fanairflow_debug("update %s fru info error, msg: %s" % (self.name, str(e)))
+            self.origin_name = self.na_ret
+            self.air_flow = self.na_ret
+            self.display_name = self.na_ret
+
+
+class fancontrol(object):
+    __int_case = None
+
+    __pwm = 0x80
+
+    def __init__(self):
+        self.int_case = interface()
+        self.__config = baseutil.get_monitor_config()
+        self.__pid_config = self.__config["pid"]
+        self.__hyst_config = self.__config.get("hyst", {})
+        self.__temps_threshold_config = self.__config["temps_threshold"]
+        for temp_threshold in self.__temps_threshold_config.values():
+            temp_threshold['temp'] = 0
+            temp_threshold['fail_num'] = 0
+            temp_threshold['warning_num'] = 0  # temp warning times
+            temp_threshold['critical_num'] = 0  # temp critical times
+            temp_threshold['emergency_num'] = 0  # temp emergency times
+            temp_threshold.setdefault('ignore_threshold', 0)  # default temp threshold on
+            temp_threshold.setdefault('invalid', invalid_temp)
+            temp_threshold.setdefault('error', error_temp)
+
+        self.__otp_reboot_judge_file_config = self.__config.get("otp_reboot_judge_file", None)
+        if self.__otp_reboot_judge_file_config is None:
+            self.__otp_switch_reboot_judge_file = OTP_SWITCH_REBOOT_JUDGE_FILE
+            self.__otp_other_reboot_judge_file = OTP_OTHER_REBOOT_JUDGE_FILE
+        else:
+            self.__otp_switch_reboot_judge_file = self.__otp_reboot_judge_file_config.get(
+                "otp_switch_reboot_judge_file", OTP_SWITCH_REBOOT_JUDGE_FILE)
+            self.__otp_other_reboot_judge_file = self.__otp_reboot_judge_file_config.get(
+                "otp_other_reboot_judge_file", OTP_OTHER_REBOOT_JUDGE_FILE)
+
+        self.__fan_rotor_error_num = {}
+        self.__fan_present_status = {}  # {"FAN1":0, "FAN2":1...} 1:present, 0:absent
+        self.__fan_rotate_status = {}  # {"FAN1":0, "FAN2":1...} 1:OK, 0:NOT OK
+        self.__fan_repair_flag = {}    # {"FAN1":0, "FAN2":1...} 1:repair, 0:give up
+        fan_num = self.get_fan_total_number()
+        for i in range(fan_num):
+            fan_name = "FAN" + str(i + 1)
+            self.__fan_present_status[fan_name] = 1  # present
+            self.__fan_rotate_status[fan_name] = 1  # OK
+            self.__fan_repair_flag[fan_name] = 1  # repair
+            rotor_num = self.get_rotor_number(fan_name)
+            tmp_fan = {}
+            for j in range(rotor_num):
+                rotor_name = "Rotor" + str(j + 1)
+                tmp_fan[rotor_name] = 0  # not error
+            self.__fan_rotor_error_num[fan_name] = tmp_fan
+
+        self.__fancontrol_para = self.__config["fancontrol_para"]
+        self.__interval = self.__fancontrol_para.get("interval", 5)
+        self.__fan_status_interval = self.__fancontrol_para.get("fan_status_interval", 0)
+        self.__max_pwm = self.__fancontrol_para.get("max_pwm", 0xff)
+        self.__min_pwm = self.__fancontrol_para.get("min_pwm", 0x80)
+        self.__abnormal_pwm = self.__fancontrol_para.get("abnormal_pwm", 0xbb)
+        self.__warning_pwm = self.__fancontrol_para.get("warning_pwm", 0xff)
+        self.__temp_invalid_pid_pwm = self.__fancontrol_para.get("temp_invalid_pid_pwm", 0x80)
+        self.__temp_error_pid_pwm = self.__fancontrol_para.get("temp_error_pid_pwm", 0x80)
+        self.__temp_fail_num = self.__fancontrol_para.get("temp_fail_num", 3)
+        self.__check_temp_fail = self.__fancontrol_para.get("check_temp_fail", [])
+        self.__temp_warning_num = self.__fancontrol_para.get("temp_warning_num", 3)
+        self.__temp_critical_num = self.__fancontrol_para.get("temp_critical_num", 3)
+        self.__temp_emergency_num = self.__fancontrol_para.get("temp_emergency_num", 3)
+        self.__temp_warning_countdown = self.__fancontrol_para.get("temp_warning_countdown", 60)
+        self.__temp_critical_countdown = self.__fancontrol_para.get("temp_critical_countdown", 60)
+        self.__temp_emergency_countdown = self.__fancontrol_para.get("temp_emergency_countdown", 60)
+        self.__rotor_error_count = self.__fancontrol_para.get("rotor_error_count", 6)
+        self.__inlet_mac_diff = self.__fancontrol_para.get("inlet_mac_diff", 50)
+        self.__check_crit_reboot_flag = self.__fancontrol_para.get("check_crit_reboot_flag", 1)
+        self.__check_emerg_reboot_flag = self.__fancontrol_para.get("check_emerg_reboot_flag", 1)
+        self.__check_crit_reboot_num = self.__fancontrol_para.get("check_crit_reboot_num", 3)
+        self.__check_crit_sleep_time = self.__fancontrol_para.get("check_crit_sleep_time", 20)
+        self.__check_emerg_reboot_num = self.__fancontrol_para.get("check_emerg_reboot_num", 3)
+        self.__check_emerg_sleep_time = self.__fancontrol_para.get("check_emerg_sleep_time", 20)
+        self.__check_temp_emergency = self.__fancontrol_para.get("check_temp_emergency", 0)
+        self.__check_temp_critical = self.__fancontrol_para.get("check_temp_critical", 1)
+        self.__check_temp_warning = self.__fancontrol_para.get("check_temp_warning", 1)
+        self.__check_temp_emergency_reboot = self.__fancontrol_para.get("check_temp_emergency_reboot", [])
+        self.__psu_absent_fullspeed_num = self.__fancontrol_para.get("psu_absent_fullspeed_num", 1)
+        self.__fan_absent_fullspeed_num = self.__fancontrol_para.get("fan_absent_fullspeed_num", 1)
+        self.__rotor_error_fullspeed_num = self.__fancontrol_para.get("rotor_error_fullspeed_num", 1)
+        self.__psu_fan_control = self.__fancontrol_para.get("psu_fan_control", 1)  # default control psu fan
+        self.__fan_plug_in_pwm = self.__fancontrol_para.get("fan_plug_in_pwm", 0x80)
+        self.__fan_plug_in_default_countdown = self.__fancontrol_para.get("fan_plug_in_default_countdown", 0)
+        self.__deal_fan_error_policy = self.__fancontrol_para.get("deal_fan_error", 0)
+        self.__deal_fan_error_conf = self.__fancontrol_para.get("deal_fan_error_conf", {})
+        self.__deal_fan_error_default_countdown = self.__deal_fan_error_conf.get("countdown", 0)
+
+        self.__warning_countdown = 0  # temp warning flag for normal fancontrol
+        self.__critical_countdown = 0  # temp critical flag for normal fancontrol
+        self.__emergency_countdown = 0  # temp emergency flag for normal fancontrol
+        self.__fan_plug_in_countdown = 0  # fan plug in flag for normal fancontrol
+        self.__deal_fan_error_countdown = 0
+        self.__fan_absent_num = 0
+        self.__fan_nok_num = 0
+        self.__pre_fan_nok = PRE_FAN_NOK_UNKNOWN
+        self.openloop = openloop()
+        self.pid = pid()
+        self.hyst = hysteresis()
+        self.__pwm = self.__min_pwm
+
+        self.__board_air_flow = ""
+        self.__fan_air_flow_monitor = self.__fancontrol_para.get("fan_air_flow_monitor", 0)
+        self.__psu_air_flow_monitor = self.__fancontrol_para.get("psu_air_flow_monitor", 0)
+        self.__air_flow_correct_fan_pwm = self.__fancontrol_para.get("air_flow_correct_fan_pwm", 0xff)
+        self.__air_flow_correct_psu_pwm = self.__fancontrol_para.get("air_flow_correct_psu_pwm", 0xff)
+        self.__air_flow_error_fan_pwm = self.__fancontrol_para.get("air_flow_error_fan_pwm", 0)
+        self.__air_flow_error_psu_pwm = self.__fancontrol_para.get("air_flow_error_psu_pwm", 0)
+        self.fan_air_flow_inconsistent_flag = False
+        self.psu_air_flow_inconsistent_flag = False
+        self.air_flow_inconsistent_flag = False
+        self.fan_obj_list = []
+        self.psu_obj_list = []
+
+    @property
+    def na_ret(self):
+        return self.int_case.na_ret
+
+    def get_onie_e2_obj(self, name):
+        return self.int_case.get_onie_e2_obj(name)
+
+    @property
+    def board_air_flow(self):
+        air_flow_tuple = (F2B_AIR_FLOW, B2F_AIR_FLOW)
+        if self.__board_air_flow not in air_flow_tuple:
+            self.__board_air_flow = self.int_case.get_device_airflow(ONIE_E2_NAME)
+            fanairflow_debug("board_air_flow: %s" % self.__board_air_flow)
+        return self.__board_air_flow
+
+    @property
+    def fan_air_flow_monitor(self):
+        return self.__fan_air_flow_monitor
+
+    @property
+    def psu_air_flow_monitor(self):
+        return self.__psu_air_flow_monitor
+
+    @property
+    def air_flow_correct_fan_pwm(self):
+        return self.__air_flow_correct_fan_pwm
+
+    @property
+    def air_flow_correct_psu_pwm(self):
+        return self.__air_flow_correct_psu_pwm
+
+    @property
+    def air_flow_error_fan_pwm(self):
+        return self.__air_flow_error_fan_pwm
+
+    @property
+    def air_flow_error_psu_pwm(self):
+        return self.__air_flow_error_psu_pwm
+
+    def get_para(self, t):
+        para = self.__pid_config.get(t)
+        return para
+
+    def update_over_temp_threshold_num(self):
+        for temp_threshold in self.__temps_threshold_config.values():
+            if temp_threshold['ignore_threshold']:
+                continue
+            emergency_threshold = temp_threshold.get('emergency', None)
+            critical_threshold = temp_threshold.get('critical', None)
+            warning_threshold = temp_threshold.get('warning', None)
+            fancontrol_debug("%s warning = %s, critical = %s, emergency = %s" %
+                             (temp_threshold['name'], warning_threshold, critical_threshold, emergency_threshold))
+
+            if emergency_threshold is not None and temp_threshold['temp'] >= emergency_threshold:
+                temp_threshold['emergency_num'] += 1
+            else:
+                temp_threshold['emergency_num'] = 0
+
+            if critical_threshold is not None and temp_threshold['temp'] >= critical_threshold:
+                temp_threshold['critical_num'] += 1
+            else:
+                temp_threshold['critical_num'] = 0
+
+            if warning_threshold is not None and temp_threshold['temp'] >= warning_threshold:
+                temp_threshold['warning_num'] += 1
+            else:
+                temp_threshold['warning_num'] = 0
+
+            fancontrol_debug("%s warning_num = %d, critical_num = %d, emergency_num = %d" %
+                             (temp_threshold['name'], temp_threshold['warning_num'], temp_threshold['critical_num'], temp_threshold.get("emergency_num")))
+
+    def get_monitor_temp(self):
+        sensorlist = self.int_case.get_temp_info()
+
+        for temp_threshold in self.__temps_threshold_config.values():
+            sensor = sensorlist.get(temp_threshold['name'])
+            if sensor["Value"] is None or int(sensor["Value"]) == self.int_case.error_ret:
+                temp_threshold['fail_num'] += 1
+                fancontrol_error("get %s failed, fail_num = %d" % (temp_threshold['name'], temp_threshold['fail_num']))
+            else:
+                temp_threshold['fail_num'] = 0
+                temp_threshold.setdefault('fix', 0)
+                temp_threshold['temp'] = sensor["Value"] + temp_threshold['fix']
+            fancontrol_debug("%s = %d" % (temp_threshold['name'], temp_threshold['temp']))
+        self.update_over_temp_threshold_num()
+
+    def is_temp_warning(self):
+        warning_flag = False
+        for temp_threshold in self.__temps_threshold_config.values():
+            if temp_threshold['ignore_threshold']:
+                continue
+            if temp_threshold['warning_num'] >= self.__temp_warning_num:
+                warning_flag = True
+                fancontrol_warn("%%FANCONTROL-4-TEMP_HIGH: %s temperature %sC is larger than warning threshold %sC." %
+                                (temp_threshold['name'], temp_threshold['temp'], temp_threshold.get('warning')))
+        return warning_flag
+
+    def checkTempWarning(self):
+        try:
+            if self.is_temp_warning():
+                self.__warning_countdown = self.__temp_warning_countdown
+                fancontrol_debug("temp is over warning")
+                return True
+            if self.__warning_countdown > 0:
+                self.__warning_countdown -= 1
+            return False
+        except Exception as e:
+            fancontrol_error("%%policy: checkTempWarning failed")
+            fancontrol_error(str(e))
+        return False
+
+    def checkTempWarningCountdown(self):
+        if self.__warning_countdown > 0:
+            return True
+        return False
+
+    def is_temp_critical(self):
+        critical_flag = False
+        for temp_threshold in self.__temps_threshold_config.values():
+            temp_threshold['critical_flag'] = False
+            if temp_threshold['ignore_threshold']:
+                continue
+            if temp_threshold['critical_num'] >= self.__temp_critical_num:
+                critical_flag = True
+                temp_threshold['critical_flag'] = True
+                fancontrol_crit("%%FANCONTROL-2-TEMP_HIGH: %s temperature %sC is larger than critical threshold %sC." %
+                                (temp_threshold['name'], temp_threshold['temp'], temp_threshold.get('critical')))
+        return critical_flag
+
+    def checkTempCritical(self):
+        try:
+            if self.is_temp_critical():
+                self.__critical_countdown = self.__temp_critical_countdown
+                fancontrol_debug("temp is over critical")
+                return True
+            if self.__critical_countdown > 0:
+                self.__critical_countdown -= 1
+            return False
+        except Exception as e:
+            fancontrol_error("%%policy: checkTempCrit failed")
+            fancontrol_error(str(e))
+        return False
+
+    def is_temp_emergency(self):
+        emergency_flag = False
+        for temp_threshold in self.__temps_threshold_config.values():
+            temp_threshold['emergency_flag'] = False
+            if temp_threshold['ignore_threshold']:
+                continue
+            if temp_threshold['emergency_num'] >= self.__temp_emergency_num:
+                emergency_flag = True
+                temp_threshold['emergency_flag'] = True
+                fancontrol_alert("%%FANCONTROL-1-TEMP_HIGH: %s temperature %sC is larger than emergency threshold %sC." %
+                                 (temp_threshold['name'], temp_threshold['temp'], temp_threshold.get('emergency')))
+        return emergency_flag
+
+    def checkTempEmergency(self):
+        try:
+            if self.is_temp_emergency():
+                self.__emergency_countdown = self.__temp_emergency_countdown
+                fancontrol_debug("temp is over emergency")
+                return True
+            if self.__emergency_countdown > 0:
+                self.__emergency_countdown -= 1
+            return False
+        except Exception as e:
+            fancontrol_error("%%policy: checkTempEmergency failed")
+            fancontrol_error(str(e))
+        return False
+
+    def checkTempCriticalCountdown(self):
+        if self.__critical_countdown > 0:
+            return True
+        return False
+
+    def checkTempEmergencyCountdown(self):
+        if self.__emergency_countdown > 0:
+            return True
+        return False
+
+    def checkTempRebootCrit(self):
+        try:
+            if self.is_temp_critical():
+                temp_dict = dict(self.__temps_threshold_config)
+                tmp = temp_dict.get(SWITCH_TEMP)
+                if tmp['critical_flag'] is True:
+                    fancontrol_debug("switch temp is over reboot critical")
+                    return TEMP_REBOOT_CRIT_SWITCH_FLAG
+                del temp_dict[SWITCH_TEMP]
+                for temp_items in temp_dict.values():
+                    if temp_items['ignore_threshold']:
+                        continue
+                    if temp_items['critical_flag'] is False:
+                        return 0
+
+                fancontrol_debug("other temp is over reboot critical")
+                return TEMP_REBOOT_CRIT_OTHER_FLAG
+        except Exception as e:
+            fancontrol_error("%%policy: checkTempRebootCrit failed")
+            fancontrol_error(str(e))
+        return 0
+
+    def checkCritReboot(self):
+        try:
+            reboot_flag = self.checkTempRebootCrit()
+            if reboot_flag > 0:
+                self.set_all_fan_speed_pwm(self.__max_pwm)
+                for i in range(self.__check_crit_reboot_num):
+                    time.sleep(self.__check_crit_sleep_time)
+                    self.get_monitor_temp()
+                    reboot_flag = self.checkTempRebootCrit()
+                    if reboot_flag > 0:
+                        fancontrol_emerg("%%FANCONTROL-0-TEMP_EMERG: The temperature of device over reboot critical value lasts for %d seconds." %
+                                         (self.__check_crit_sleep_time * (i + 1)))
+                        continue
+                    fancontrol_debug("The temperature of device is not over reboot critical value.")
+                    break
+                if reboot_flag > 0:
+                    fancontrol_emerg(
+                        "%%FANCONTROL-0-TEMP_EMERG: The temperature of device over reboot critical value, system is going to reboot now.")
+                    for temp_threshold in self.__temps_threshold_config.values():
+                        fancontrol_emerg(
+                            "%%FANCONTROL-TEMP_EMERG: %s temperature: %sC." %
+                            (temp_threshold['name'], temp_threshold['temp']))
+                    if reboot_flag == TEMP_REBOOT_CRIT_SWITCH_FLAG:
+                        create_judge_file = "touch %s" % self.__otp_switch_reboot_judge_file
+                    else:
+                        create_judge_file = "touch %s" % self.__otp_other_reboot_judge_file
+                    exec_os_cmd(create_judge_file)
+                    exec_os_cmd("sync")
+                    time.sleep(3)
+                    os.system("/sbin/reboot")
+        except Exception as e:
+            fancontrol_error("%%policy: checkCritReboot failed")
+            fancontrol_error(str(e))
+
+    def checkTempRebootEmerg(self):
+        try:
+            if self.is_temp_emergency():
+                temp_emerg_reboot_flag = False
+                for temp_list in self.__check_temp_emergency_reboot:
+                    for temp in temp_list:
+                        tmp = self.__temps_threshold_config.get(temp)
+                        if tmp['emergency_flag'] is False:
+                            fancontrol_debug("temp_list %s, temp: %s not emergency" % (temp_list, temp))
+                            temp_emerg_reboot_flag = False
+                            break
+                        temp_emerg_reboot_flag = True
+                    if temp_emerg_reboot_flag is True:
+                        fancontrol_debug("temp_list %s, all temp is over emergency reboot" % temp_list)
+                        return True
+        except Exception as e:
+            fancontrol_error("%%policy: checkTempRebootEmerg failed")
+            fancontrol_error(str(e))
+        return False
+
+    def checkEmergReboot(self):
+        try:
+            reboot_flag = False
+            if self.checkTempRebootEmerg() is True:
+                self.set_all_fan_speed_pwm(self.__max_pwm)
+                for i in range(self.__check_emerg_reboot_num):
+                    time.sleep(self.__check_emerg_sleep_time)
+                    self.get_monitor_temp()
+                    if self.checkTempRebootEmerg() is True:
+                        fancontrol_emerg("%%FANCONTROL-0-TEMP_EMERG: The temperature of device over reboot emergency value lasts for %d seconds." %
+                                         (self.__check_emerg_sleep_time * (i + 1)))
+                        reboot_flag = True
+                        continue
+                    fancontrol_debug("The temperature of device is not over reboot emergency value.")
+                    reboot_flag = False
+                    break
+                if reboot_flag is True:
+                    fancontrol_emerg(
+                        "%%FANCONTROL-0-TEMP_EMERG: The temperature of device over reboot emergency value, system is going to reboot now.")
+                    for temp_threshold in self.__temps_threshold_config.values():
+                        fancontrol_emerg(
+                            "%%FANCONTROL-0-TEMP_EMERG: %s temperature: %sC." %
+                            (temp_threshold['name'], temp_threshold['temp']))
+                    create_judge_file = "touch %s" % OTP_SWITCH_REBOOT_JUDGE_FILE
+                    exec_os_cmd(create_judge_file)
+                    exec_os_cmd("sync")
+                    time.sleep(3)
+                    os.system("/sbin/reboot")
+        except Exception as e:
+            fancontrol_error("%%policy: checkEmergReboot failed")
+            fancontrol_error(str(e))
+
+    def get_fan_total_number(self):
+        return self.int_case.get_fan_total_number()
+
+    def get_rotor_number(self, fan_name):
+        return self.int_case.get_fan_rotor_number(fan_name)
+
+    def get_fan_presence(self, fan_name):
+        return self.int_case.get_fan_presence(fan_name)
+
+    def get_fan_rotor_status(self, fan_name, rotor_name):
+        return self.int_case.get_fan_rotor_status(fan_name, rotor_name)
+
+    def get_psu_total_number(self):
+        return self.int_case.get_psu_total_number()
+
+    def get_psu_presence(self, psu_name):
+        return self.int_case.get_psu_presence(psu_name)
+
+    def get_psu_input_output_status(self, psu_name):
+        return self.int_case.get_psu_input_output_status(psu_name)
+
+    def checkFanPresence(self):
+        absent_num = 0
+
+        fan_num = self.get_fan_total_number()
+        for i in range(fan_num):
+            fan_name = "FAN" + str(i + 1)
+            rotor_num = self.get_rotor_number(fan_name)
+            tmp_fan = self.__fan_rotor_error_num.get(fan_name)
+            status = self.get_fan_presence(fan_name)
+            if status is False:
+                absent_num = absent_num + 1
+                self.__fan_present_status[fan_name] = 0
+                fancontrol_debug("%s absent" % fan_name)
+            else:
+                if self.__fan_present_status[fan_name] == 0:    # absent -> present
+                    self.__pre_fan_nok = PRE_FAN_NOK_UNKNOWN
+                    self.__fan_plug_in_countdown = self.__fan_plug_in_default_countdown
+                    self.__fan_repair_flag[fan_name] = 1
+                    for j in range(rotor_num):
+                        rotor_name = "Rotor" + str(j + 1)
+                        tmp_fan[rotor_name] = 0
+                self.__fan_present_status[fan_name] = 1
+                fancontrol_debug("%s presence" % fan_name)
+        return absent_num
+
+    def checkFanRotorStatus(self):
+        err_num = 0
+        self.__fan_nok_num = 0
+        fan_num = self.get_fan_total_number()
+        for i in range(fan_num):
+            fan_name = "FAN" + str(i + 1)
+            rotor_num = self.get_rotor_number(fan_name)
+            tmp_fan = self.__fan_rotor_error_num.get(fan_name)
+            fan_rotor_err_cnt = 0
+            for j in range(rotor_num):
+                rotor_name = "Rotor" + str(j + 1)
+                status = self.get_fan_rotor_status(fan_name, rotor_name)
+                if status is True:
+                    tmp_fan[rotor_name] = 0
+                    fancontrol_debug("%s %s ok" % (fan_name, rotor_name))
+                else:
+                    tmp_fan[rotor_name] += 1
+                    if tmp_fan[rotor_name] >= self.__rotor_error_count:
+                        err_num = err_num + 1
+                        fan_rotor_err_cnt += 1
+                        fancontrol_debug("%s %s error" % (fan_name, rotor_name))
+                    fancontrol_debug("%s %s error %d times" % (fan_name, rotor_name, tmp_fan[rotor_name]))
+            if fan_rotor_err_cnt == 0:
+                self.__fan_rotate_status[fan_name] = 1  # FAN is ok
+            else:
+                self.__fan_rotate_status[fan_name] = 0  # FAN is not ok
+                self.__fan_nok_num += 1
+        fancontrol_debug("fan not ok number:%d." % self.__fan_nok_num)
+        return err_num
+
+    def checkPsuPresence(self):
+        absent_num = 0
+        psu_num = self.get_psu_total_number()
+        for i in range(psu_num):
+            psu_name = "PSU" + str(i + 1)
+            status = self.get_psu_presence(psu_name)
+            if status is False:
+                absent_num = absent_num + 1
+                fancontrol_debug("%s absent" % psu_name)
+            else:
+                fancontrol_debug("%s presence" % psu_name)
+        return absent_num
+
+    def checkPsuStatus(self):
+        err_num = 0
+        psu_num = self.get_psu_total_number()
+        for i in range(psu_num):
+            psu_name = "PSU" + str(i + 1)
+            status = self.get_psu_input_output_status(psu_name)
+            if status is False:
+                err_num = err_num + 1
+                fancontrol_debug("%s error" % psu_name)
+            else:
+                fancontrol_debug("%s ok" % psu_name)
+        return err_num
+
+    def checkDevError(self):
+        pwm = self.__min_pwm
+        switchtemp = self.__temps_threshold_config.get(SWITCH_TEMP)['temp']
+        inlettemp = self.__temps_threshold_config.get(INLET_TEMP)['temp']
+        temp_diff = abs(switchtemp - inlettemp)
+        fancontrol_debug("|switchtemp - inlettemp| = %d" % temp_diff)
+        if temp_diff >= self.__inlet_mac_diff:
+            fancontrol_debug("temp_diff is over than inlet_mac_diff(%d)" % self.__inlet_mac_diff)
+            if self.__pwm > self.__abnormal_pwm:
+                pwm = self.__max_pwm
+            else:
+                pwm = self.__abnormal_pwm
+        return pwm
+
+    def checktempfail(self):
+        pwm = self.__min_pwm
+        for temp in self.__check_temp_fail:
+            temp_name = temp.get("temp_name")
+            temp_fail_num = self.__temps_threshold_config.get(temp_name)['fail_num']
+            if temp_fail_num >= self.__temp_fail_num:
+                pwm = self.__abnormal_pwm
+                fancontrol_debug("%s temp_fail_num = %d" % (temp_name, temp_fail_num))
+                fancontrol_debug("self.__temp_fail_num = %d" % self.__temp_fail_num)
+        return pwm
+
+    def abnormal_check(self):
+        pwm_list = []
+        pwm_min = self.__min_pwm
+        pwm_list.append(pwm_min)
+
+        if self.__check_temp_emergency == 1:
+            status = self.checkTempEmergency()
+            if status is True:
+                over_emerg_pwm = self.__max_pwm
+                pwm_list.append(over_emerg_pwm)
+                fancontrol_debug("over_emerg_pwm = 0x%x" % over_emerg_pwm)
+                # do reset check
+                if self.__check_emerg_reboot_flag == 1:
+                    self.checkEmergReboot()
+            else:
+                if self.checkTempEmergencyCountdown() is True:  # temp lower than emergency in 5 min
+                    over_emerg_countdown_pwm = self.__max_pwm
+                    pwm_list.append(over_emerg_countdown_pwm)
+                    fancontrol_debug("TempEmergencyCountdown: %d, over_emerg_countdown_pwm = 0x%x" %
+                                     (self.__emergency_countdown, over_emerg_countdown_pwm))
+
+        if self.__check_temp_critical == 1:
+            status = self.checkTempCritical()
+            if status is True:
+                over_crit_pwm = self.__max_pwm
+                pwm_list.append(over_crit_pwm)
+                fancontrol_debug("over_crit_pwm = 0x%x" % over_crit_pwm)
+                # do reset check
+                if self.__check_crit_reboot_flag == 1:
+                    self.checkCritReboot()
+            else:
+                if self.checkTempCriticalCountdown() is True:  # temp lower than critical in 5 min
+                    over_crit_countdown_pwm = self.__max_pwm
+                    pwm_list.append(over_crit_countdown_pwm)
+                    fancontrol_debug("TempCriticalCountdown: %d, over_crit_countdown_pwm = 0x%x" %
+                                     (self.__critical_countdown, over_crit_countdown_pwm))
+
+        if self.__check_temp_warning == 1:
+            status = self.checkTempWarning()
+            if status is True:
+                over_warn_pwm = self.__warning_pwm
+                pwm_list.append(over_warn_pwm)
+                fancontrol_debug("over_warn_pwm = 0x%x" % over_warn_pwm)
+            else:
+                if self.checkTempWarningCountdown() is True:  # temp lower than warning in 5 min
+                    over_warn_countdown_pwm = self.__warning_pwm
+                    pwm_list.append(over_warn_countdown_pwm)
+                    fancontrol_debug("TempWarningCountdown: %d, over_warn_countdown_pwm = 0x%x" %
+                                     (self.__warning_countdown, over_warn_countdown_pwm))
+
+        self.__fan_absent_num = self.checkFanPresence()
+        if self.__fan_absent_num >= self.__fan_absent_fullspeed_num:
+            fan_absent_pwm = self.__max_pwm
+            pwm_list.append(fan_absent_pwm)
+            fancontrol_debug("fan_absent_pwm = 0x%x" % fan_absent_pwm)
+
+        rotor_err_num = self.checkFanRotorStatus()
+        if rotor_err_num >= self.__rotor_error_fullspeed_num:
+            rotor_err_pwm = self.__max_pwm
+            pwm_list.append(rotor_err_pwm)
+            fancontrol_debug("rotor_err_pwm = 0x%x" % rotor_err_pwm)
+
+        psu_absent_num = self.checkPsuPresence()
+        if psu_absent_num >= self.__psu_absent_fullspeed_num:
+            psu_absent_pwm = self.__max_pwm
+            pwm_list.append(psu_absent_pwm)
+            fancontrol_debug("psu_absent_pwm = 0x%x" % psu_absent_pwm)
+
+        dev_err_pwm = self.checkDevError()
+        pwm_list.append(dev_err_pwm)
+        fancontrol_debug("dev_err_pwm = 0x%x" % dev_err_pwm)
+
+        temp_fail_pwm = self.checktempfail()
+        pwm_list.append(temp_fail_pwm)
+        fancontrol_debug("temp_fail_pwm = 0x%x" % temp_fail_pwm)
+
+        pwm = max(pwm_list)
+        return pwm
+
+    def get_error_fan(self):
+        fan_num = self.get_fan_total_number()
+        for i in range(fan_num):
+            fan_name = "FAN" + str(i + 1)
+            if self.__fan_rotate_status[fan_name] == 0:
+                return fan_name
+        return None
+
+    def fan_error_update_pwm(self, fan_pwm_dict):
+        try:
+            fancontrol_debug("enter deal fan error policy")
+            ori_fan_pwm_dict = fan_pwm_dict.copy()
+
+            err_fan_name = self.get_error_fan()
+            if err_fan_name is None:
+                fancontrol_debug("fan name is None, do nothing.")
+                return ori_fan_pwm_dict
+
+            if self.__fan_repair_flag[err_fan_name] == 0:
+                fancontrol_debug("%s already repaired, do nothing." % err_fan_name)
+                return ori_fan_pwm_dict
+
+            if self.__pre_fan_nok != err_fan_name:
+                fancontrol_debug(
+                    "not ok fan change from %s to %s, update countdown." %
+                    (self.__pre_fan_nok, err_fan_name))
+                self.__deal_fan_error_countdown = self.__deal_fan_error_default_countdown
+                if self.__pre_fan_nok != PRE_FAN_NOK_UNKNOWN:
+                    fancontrol_debug(
+                        "%s repaire success, %s NOT OK, try to repaire." %
+                        (self.__pre_fan_nok, err_fan_name))
+                    self.__fan_repair_flag[self.__pre_fan_nok] = 0
+                self.__pre_fan_nok = err_fan_name
+
+            if self.__deal_fan_error_countdown > 0:
+                self.__deal_fan_error_countdown -= 1
+            fancontrol_debug("%s repaire, countdown %d." % (err_fan_name, self.__deal_fan_error_countdown))
+
+            if self.__deal_fan_error_countdown == 0:
+                self.__fan_repair_flag[err_fan_name] = 0
+                fancontrol_debug("%s set repaire fail flag, use origin pwm." % err_fan_name)
+                return ori_fan_pwm_dict
+
+            fan_err_pwm_conf_list = self.__deal_fan_error_conf[err_fan_name]
+            for item in fan_err_pwm_conf_list:
+                fan_pwm_dict[item["name"]] = item["pwm"]
+            fancontrol_debug("fan pwm update, fan pwm dict:%s" % fan_pwm_dict)
+
+            return fan_pwm_dict
+        except Exception as e:
+            fancontrol_error("%%policy: deal_fan_error raise Exception:%s" % str(e))
+            self.__pre_fan_nok = PRE_FAN_NOK_UNKNOWN
+        return ori_fan_pwm_dict
+
+    def get_fan_pwm_dict(self, default_pwm):
+        fan_pwm_dict = {}
+        fan_num = self.get_fan_total_number()
+        for i in range(fan_num):
+            fan_name = "FAN" + str(i + 1)
+            fan_pwm_dict[fan_name] = default_pwm
+        if self.__deal_fan_error_policy:
+            if self.__fan_absent_num == 0 and self.__fan_nok_num == 1:
+                fan_pwm_dict = self.fan_error_update_pwm(fan_pwm_dict)
+            else:
+                if self.__pre_fan_nok != PRE_FAN_NOK_UNKNOWN and self.__fan_rotate_status[self.__pre_fan_nok] == 1:
+                    fancontrol_debug("%s repaire success." % (self.__pre_fan_nok))
+                    self.__fan_repair_flag[self.__pre_fan_nok] = 0
+                self.__pre_fan_nok = PRE_FAN_NOK_UNKNOWN
+        return fan_pwm_dict
+
+    def get_psu_pwm_dict(self, default_pwm):
+        psu_pwm_dict = {}
+        psu_num = self.get_psu_total_number()
+        for i in range(psu_num):
+            psu_name = "PSU" + str(i + 1)
+            psu_pwm_dict[psu_name] = default_pwm
+        return psu_pwm_dict
+
+    def check_board_air_flow(self):
+        board_air_flow = self.board_air_flow
+        air_flow_tuple = (F2B_AIR_FLOW, B2F_AIR_FLOW)
+        if board_air_flow not in air_flow_tuple:
+            fanairflow_debug("get board air flow error, value [%s]" % board_air_flow)
+            return False
+        fanairflow_debug("board air flow check ok: %s" % board_air_flow)
+        return True
+
+    def check_fan_air_flow(self):
+        if self.fan_air_flow_monitor:
+            fanairflow_debug("open air flow monitor, check fan air flow")
+            ret = self.check_board_air_flow()
+            if ret is False:
+                fanairflow_debug("get board air flow error, set fan_air_flow_inconsistent_flag False")
+                self.fan_air_flow_inconsistent_flag = False
+                return
+            air_flow_inconsistent_flag_tmp = False
+            for fan_obj in self.fan_obj_list:
+                fan_obj.update_fru_info()
+                fanairflow_debug("%s origin name: [%s], display name: [%s] air flow [%s]" %
+                                 (fan_obj.name, fan_obj.origin_name, fan_obj.display_name, fan_obj.air_flow))
+                if fan_obj.air_flow == self.na_ret:
+                    fanairflow_debug("%s get air flow failed, set air_flow_inconsistent flag False" % fan_obj.name)
+                    fan_obj.air_flow_inconsistent = False
+                    continue
+                if fan_obj.air_flow != self.board_air_flow:
+                    fanairflow_debug("%s air flow error, origin name: [%s], display name: [%s], fan air flow [%s], board air flow [%s]" %
+                                     (fan_obj.name, fan_obj.origin_name, fan_obj.display_name, fan_obj.air_flow, self.board_air_flow))
+                    air_flow_inconsistent_flag_tmp = True
+                    fan_obj.air_flow_inconsistent = True
+                else:
+                    fanairflow_debug("%s air flow check ok, origin name: [%s], display name: [%s], fan air flow: [%s], board air flow: [%s]" %
+                                     (fan_obj.name, fan_obj.origin_name, fan_obj.display_name, fan_obj.air_flow, self.board_air_flow))
+                    fan_obj.air_flow_inconsistent = False
+            self.fan_air_flow_inconsistent_flag = air_flow_inconsistent_flag_tmp
+        else:
+            fanairflow_debug("air flow monitor not open, set fan_air_flow_inconsistent_flag False")
+            self.fan_air_flow_inconsistent_flag = False
+        return
+
+    def check_psu_air_flow(self):
+        if self.psu_air_flow_monitor:
+            fanairflow_debug("open air flow monitor, check psu air flow")
+            ret = self.check_board_air_flow()
+            if ret is False:
+                fanairflow_debug("get board air flow error, set psu_air_flow_inconsistent_flag False")
+                self.psu_air_flow_inconsistent_flag = False
+                return
+            air_flow_inconsistent_flag_tmp = False
+            for psu_obj in self.psu_obj_list:
+                psu_obj.update_fru_info()
+                fanairflow_debug("%s origin name: [%s], display name: [%s] air flow [%s]" %
+                                 (psu_obj.name, psu_obj.origin_name, psu_obj.display_name, psu_obj.air_flow))
+                if psu_obj.air_flow == self.na_ret:
+                    fanairflow_debug("%s get air flow failed, set air_flow_inconsistent flag False" % psu_obj.name)
+                    psu_obj.air_flow_inconsistent = False
+                    continue
+                if psu_obj.air_flow != self.board_air_flow:
+                    fanairflow_debug("%s air flow error, origin name: [%s], display name: [%s], psu air flow [%s], board air flow [%s]" %
+                                     (psu_obj.name, psu_obj.origin_name, psu_obj.display_name, psu_obj.air_flow, self.board_air_flow))
+                    air_flow_inconsistent_flag_tmp = True
+                    psu_obj.air_flow_inconsistent = True
+                else:
+                    fanairflow_debug("%s air flow check ok, origin name: [%s], display name: [%s], psu air flow: [%s], board air flow: [%s]" %
+                                     (psu_obj.name, psu_obj.origin_name, psu_obj.display_name, psu_obj.air_flow, self.board_air_flow))
+                    psu_obj.air_flow_inconsistent = False
+            self.psu_air_flow_inconsistent_flag = air_flow_inconsistent_flag_tmp
+        else:
+            fanairflow_debug("air flow monitor not open, set psu_air_flow_inconsistent_flag False")
+            self.psu_air_flow_inconsistent_flag = False
+        return
+
+    def do_fancontrol(self):
+        pwm_list = []
+        pwm_min = self.__min_pwm
+        pwm_list.append(pwm_min)
+
+        # first check air flow
+        self.check_fan_air_flow()
+        self.check_psu_air_flow()
+        if self.fan_air_flow_inconsistent_flag is True or self.psu_air_flow_inconsistent_flag is True:
+            self.air_flow_inconsistent_flag = True
+        else:
+            self.air_flow_inconsistent_flag = False
+        fanairflow_debug("check_air_flow, air_flow_inconsistent_flag: %s" % self.air_flow_inconsistent_flag)
+        # get_monitor_temp
+        self.get_monitor_temp()
+        fancontrol_debug("last_pwm = 0x%x" % self.__pwm)
+        # openloop
+        inlettemp = self.__temps_threshold_config.get(INLET_TEMP)['temp']
+        linear_value = self.openloop.linear_cacl(inlettemp)
+        if linear_value is None:
+            linear_value = self.__min_pwm
+        pwm_list.append(linear_value)
+        fancontrol_debug("linear_value = 0x%x" % linear_value)
+
+        curve_value = self.openloop.curve_cacl(inlettemp)
+        if curve_value is None:
+            curve_value = self.__min_pwm
+        pwm_list.append(curve_value)
+        fancontrol_debug("curve_value = 0x%x" % curve_value)
+
+        # hyst
+        for hyst_index in self.__hyst_config.values():
+            temp_name = hyst_index.get("name")
+            hyst_flag = hyst_index.get("flag", 0)
+            if hyst_flag == 0:
+                fancontrol_debug("%s hyst flag is 0, do nothing" % temp_name)
+                continue
+            tmp_temp = int(self.__temps_threshold_config.get(temp_name)['temp'])  # make sure temp is int
+            hyst_value = self.hyst.cacl(temp_name, tmp_temp)
+            if hyst_value is None:
+                hyst_value = self.__min_pwm
+            pwm_list.append(hyst_value)
+            fancontrol_debug("%s hyst_value = 0x%x" % (temp_name, hyst_value))
+
+        # pid
+        for pid_index in self.__pid_config.values():
+            temp_name = pid_index.get("name")
+            pid_flag = pid_index.get("flag", 0)
+            if pid_flag == 0:
+                fancontrol_debug("%s pid flag is 0, do nothing" % temp_name)
+                continue
+            tmp_temp = self.__temps_threshold_config.get(temp_name)['temp']
+            if tmp_temp is not None:
+                tmp_temp = int(tmp_temp)  # make sure temp is int
+                invalid_temp_val = self.__temps_threshold_config.get(temp_name)['invalid']
+                error_temp_val = self.__temps_threshold_config.get(temp_name)['error']
+                if tmp_temp == invalid_temp_val:  # temp is invalid
+                    temp = None
+                    self.pid.cacl(self.__pwm, temp_name, temp)  # temp invalid, PID need to record None
+                    pid_value = self.__temp_invalid_pid_pwm
+                    fancontrol_debug("%s is invalid, pid_value = 0x%x" % (temp_name, pid_value))
+                    fancontrol_debug("temp = %d, invalid_temp = %d" % (tmp_temp, invalid_temp_val))
+                elif tmp_temp == error_temp_val:  # temp is error
+                    temp = None
+                    self.pid.cacl(self.__pwm, temp_name, temp)  # temp error, PID need to record None
+                    pid_value = self.__temp_error_pid_pwm
+                    fancontrol_debug("%s is error, pid_value = 0x%x" % (temp_name, pid_value))
+                    fancontrol_debug("temp = %d, error_temp = %d" % (tmp_temp, error_temp_val))
+                else:
+                    pid_value = self.pid.cacl(self.__pwm, temp_name, tmp_temp)
+            else:  # temp get failed
+                pid_value = self.pid.cacl(self.__pwm, temp_name, tmp_temp)
+            if pid_value is None:
+                pid_value = self.__min_pwm
+            pwm_list.append(pid_value)
+            fancontrol_debug("%s pid_value = 0x%x" % (temp_name, pid_value))
+
+        # abnormal
+        abnormal_value = self.abnormal_check()
+        pwm_list.append(abnormal_value)
+        fancontrol_debug("abnormal_value = 0x%x" % abnormal_value)
+
+        if self.__fan_plug_in_countdown > 0 and self.__fan_absent_num == 0:
+            fancontrol_debug("fan plug in countdown %d, set plug in pwm: 0x%x" %
+                             (self.__fan_plug_in_countdown, self.__fan_plug_in_pwm))
+            self.__pwm = self.__fan_plug_in_pwm
+            self.__fan_plug_in_countdown -= 1
+        else:
+            self.__pwm = max(pwm_list)
+        fancontrol_debug("__pwm = 0x%x\n" % self.__pwm)
+        if self.air_flow_inconsistent_flag is True:
+            fanairflow_debug("air flow inconsistent, set all fan speed pwm")
+            self.set_all_fan_speed_pwm(self.__pwm)
+        else:
+            fanairflow_debug("air flow consistent, deal fan error policy")
+            fan_pwm_dict = self.get_fan_pwm_dict(self.__pwm)
+            psu_pwm_dict = self.get_psu_pwm_dict(self.__pwm)
+            self.set_fan_pwm_independent(fan_pwm_dict, psu_pwm_dict)
+
+    def run(self):
+        start_time = time.time()
+        while True:
+            try:
+                debug_init()
+                if self.__fan_status_interval > 0 and self.__fan_status_interval < self.__interval:
+                    delta_time = time.time() - start_time
+                    if delta_time >= self.__interval or delta_time < 0:
+                        self.do_fancontrol()
+                        start_time = time.time()
+                    else:
+                        self.checkFanPresence()
+                    time.sleep(self.__fan_status_interval)
+                else:
+                    self.do_fancontrol()
+                    time.sleep(self.__interval)
+            except Exception as e:
+                traceback.print_exc()
+                fancontrol_error(str(e))
+
+    def set_all_fan_speed_pwm(self, pwm):
+        fan_pwm_dict = {}
+        psu_pwm_dict = {}
+        fan_num = self.get_fan_total_number()
+        for i in range(fan_num):
+            fan_name = "FAN" + str(i + 1)
+            fan_pwm_dict[fan_name] = pwm
+
+        psu_num = self.get_psu_total_number()
+        for i in range(psu_num):
+            psu_name = "PSU" + str(i + 1)
+            psu_pwm_dict[psu_name] = pwm
+        self.set_fan_pwm_independent(fan_pwm_dict, psu_pwm_dict)
+
+    def set_fan_pwm_independent(self, fan_pwm_dict, psu_pwm_dict):
+        if self.air_flow_inconsistent_flag is True:
+            for psu_obj in self.psu_obj_list:
+                if psu_obj.air_flow_inconsistent is True:
+                    psu_pwm_dict[psu_obj.name] = self.air_flow_error_psu_pwm
+                    fanairflow_debug("%s air flow error, origin name: [%s], display name: [%s], psu air flow: [%s], board air flow: [%s], set psu pwm: 0x%x" %
+                                     (psu_obj.name, psu_obj.origin_name, psu_obj.display_name, psu_obj.air_flow, self.board_air_flow, self.air_flow_error_psu_pwm))
+                else:
+                    psu_pwm_dict[psu_obj.name] = self.air_flow_correct_psu_pwm
+                    fanairflow_debug("%s air flow correct, origin name: [%s], display name: [%s], psu air flow: [%s], board air flow: [%s], set psu pwm: 0x%x" %
+                                     (psu_obj.name, psu_obj.origin_name, psu_obj.display_name, psu_obj.air_flow, self.board_air_flow, self.air_flow_correct_psu_pwm))
+
+            for fan_obj in self.fan_obj_list:
+                if fan_obj.air_flow_inconsistent is True:
+                    fan_pwm_dict[fan_obj.name] = self.air_flow_error_fan_pwm
+                    fanairflow_debug("%s air flow error, origin name: [%s], display name: [%s], fan air flow: [%s], board air flow: [%s], set fan pwm: 0x%x" %
+                                     (fan_obj.name, fan_obj.origin_name, fan_obj.display_name, fan_obj.air_flow, self.board_air_flow, self.air_flow_error_fan_pwm))
+                else:
+                    fan_pwm_dict[fan_obj.name] = self.air_flow_correct_fan_pwm
+                    fanairflow_debug("%s air flow correct, origin name: [%s], display name: [%s], fan air flow: [%s], board air flow: [%s], set fan pwm: 0x%x" %
+                                     (fan_obj.name, fan_obj.origin_name, fan_obj.display_name, fan_obj.air_flow, self.board_air_flow, self.air_flow_correct_fan_pwm))
+        fan_num = self.get_fan_total_number()
+        for i in range(fan_num):
+            fan_name = "FAN" + str(i + 1)
+            self.fan_set_speed_pwm_by_name(fan_name, fan_pwm_dict[fan_name])
+        if self.__psu_fan_control == 1:
+            psu_num = self.get_psu_total_number()
+            for i in range(psu_num):
+                psu_name = "PSU" + str(i + 1)
+                self.psu_set_speed_pwm_by_name(psu_name, psu_pwm_dict[psu_name])
+
+    def fan_set_speed_pwm_by_name(self, fan_name, pwm):
+        duty = round(pwm * 100 / 255)
+        rotor_len = self.get_rotor_number(fan_name)
+        for i in range(rotor_len):
+            val = self.int_case.set_fan_speed_pwm(fan_name, i + 1, duty)
+            if val != 0:
+                fancontrol_error("%s rotor%d: %d" % (fan_name, i + 1, val))
+
+    def psu_set_speed_pwm_by_name(self, psu_name, pwm):
+        duty = round(pwm * 100 / 255)
+        status = self.int_case.set_psu_fan_speed_pwm(psu_name, int(duty))
+        if status is not True:
+            fancontrol_error("set %s speed fail" % psu_name)
+
+    def fan_obj_init(self):
+        fan_num = self.get_fan_total_number()
+        for i in range(fan_num):
+            fan_name = "FAN" + str(i + 1)
+            fan_obj = DevFan(fan_name, self.int_case)
+            self.fan_obj_list.append(fan_obj)
+        fanairflow_debug("fan object initialize success")
+
+    def psu_obj_init(self):
+        psu_num = self.get_psu_total_number()
+        for i in range(psu_num):
+            psu_name = "PSU" + str(i + 1)
+            psu_obj = DevPsu(psu_name, self.int_case)
+            self.psu_obj_list.append(psu_obj)
+        fanairflow_debug("psu object initialize success")
+
+
+if __name__ == '__main__':
+    debug_init()
+    fancontrol_debug("enter main")
+    fan_control = fancontrol()
+    fan_control.fan_obj_init()
+    fan_control.psu_obj_init()
+    fan_control.run()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/hal_ledctrl.py b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_ledctrl.py
new file mode 100755
index 000000000000..c21fd3c1f585
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_ledctrl.py
@@ -0,0 +1,830 @@
+#!/usr/bin/env python3
+import time
+import syslog
+import traceback
+from plat_hal.interface import interface
+from plat_hal.baseutil import baseutil
+try:
+    import abc
+except ImportError as error:
+    raise ImportError(str(error) + " - required module not found") from error
+
+SWITCH_TEMP = "SWITCH_TEMP"
+F2B_AIR_FLOW = "intake"
+B2F_AIR_FLOW = "exhaust"
+ONIE_E2_NAME = "ONIE_E2"
+
+# status
+STATUS_PRESENT = "PRESENT"
+STATUS_ABSENT = "ABSENT"
+STATUS_OK = "OK"
+STATUS_NOT_OK = "NOT OK"
+STATUS_FAILED = "FAILED"
+STATUS_UNKNOWN = "UNKNOWN"
+
+LEDCTROL_DEBUG_FILE = "/etc/.ledcontrol_debug_flag"
+
+LEDCTROLERROR = 1
+LEDCTROLDEBUG = 2
+
+debuglevel = 0
+# led status defined
+COLOR_GREEN = 1
+COLOR_AMBER = 2
+COLOR_RED = 3
+LED_STATUS_DICT = {COLOR_GREEN: "green", COLOR_AMBER: "amber", COLOR_RED: "red"}
+
+
+def ledcontrol_debug(s):
+    if LEDCTROLDEBUG & debuglevel:
+        syslog.openlog("LEDCONTROL", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def ledcontrol_error(s):
+    if LEDCTROLERROR & debuglevel:
+        syslog.openlog("LEDCONTROL", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+def air_flow_warn(s):
+    syslog.openlog("AIR_FLOW_MONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_LOCAL1 | syslog.LOG_WARNING, s)
+
+
+def air_flow_error(s):
+    syslog.openlog("AIR_FLOW_MONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_LOCAL1 | syslog.LOG_ERR, s)
+
+
+def air_flow_emerg(s):
+    syslog.openlog("AIR_FLOW_MONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_LOCAL1 | syslog.LOG_EMERG, s)
+
+
+def debug_init():
+    global debuglevel
+    try:
+        with open(LEDCTROL_DEBUG_FILE, "r") as fd:
+            value = fd.read()
+        debuglevel = int(value)
+    except Exception:
+        debuglevel = 0
+
+
+class DevBase(object):
+    __metaclass__ = abc.ABCMeta
+
+    def __init__(self, name, air_flow_monitor):
+        self.__name = name
+        self.__air_flow_monitor = air_flow_monitor
+        self.present = STATUS_UNKNOWN
+        self.status = STATUS_UNKNOWN
+        self.status_summary = STATUS_UNKNOWN
+        self.origin_name = STATUS_UNKNOWN
+        self.display_name = STATUS_UNKNOWN
+        self.air_flow = STATUS_UNKNOWN
+        self.led_status = COLOR_GREEN
+
+    @property
+    def name(self):
+        return self.__name
+
+    @property
+    def air_flow_monitor(self):
+        return self.__air_flow_monitor
+
+    @abc.abstractmethod
+    def get_present(self):
+        """
+        Gets the present status of PSU/FAN
+
+        Returns:
+            A string, e.g. 'PRESENT, ABSENT, FAILED'
+        """
+        raise NotImplementedError
+
+    @abc.abstractmethod
+    def get_status(self):
+        """
+        Gets the status of PSU/FAN
+
+        Returns:
+            A string, e.g. 'OK, NOT OK, FAILED'
+        """
+        raise NotImplementedError
+
+    @abc.abstractmethod
+    def update_dev_info(self):
+        """
+        update status and fru info of PSU/FAN
+
+        include present, status, status_summary, part_model_name, product_name, air_flow
+        """
+        raise NotImplementedError
+
+    @abc.abstractmethod
+    def set_module_led(self, color):
+        """
+        set PSU/FAN module LED status
+
+        Args:
+            color: A string representing the color with which to set the
+                   PSU/FAN module LED status
+
+        Returns:
+            bool: True if status LED state is set successfully, False if not
+        """
+        raise NotImplementedError
+
+
+class DevPsu(DevBase):
+
+    def __init__(self, name, air_flow_monitor, hal_interface):
+        super(DevPsu, self).__init__(name, air_flow_monitor)
+        self.int_case = hal_interface
+
+    def get_psu_presence(self):
+        return self.int_case.get_psu_presence(self.name)
+
+    def get_psu_input_output_status(self):
+        return self.int_case.get_psu_input_output_status(self.name)
+
+    def get_psu_fru_info(self):
+        return self.int_case.get_psu_fru_info(self.name)
+
+    @property
+    def na_ret(self):
+        return self.int_case.na_ret
+
+    def get_present(self):
+        try:
+            status = self.get_psu_presence()
+            if status is True:
+                return STATUS_PRESENT
+            if status is False:
+                return STATUS_ABSENT
+        except Exception as e:
+            ledcontrol_error("get %s present status error, msg: %s" % (self.name, str(e)))
+        return STATUS_FAILED
+
+    def get_status(self):
+        try:
+            status = self.get_psu_input_output_status()
+            if status is True:
+                return STATUS_OK
+            if status is False:
+                return STATUS_NOT_OK
+        except Exception as e:
+            ledcontrol_error("get %s status error, msg: %s" % (self.name, str(e)))
+        return STATUS_FAILED
+
+    def update_dev_info(self):
+        try:
+            # update status
+            self.present = self.get_present()
+            if self.present != STATUS_PRESENT:
+                self.status = STATUS_UNKNOWN
+                self.status_summary = self.present
+            else:
+                self.status = self.get_status()
+                self.status_summary = self.status
+            # update fru info if need air flow monitor
+            if self.air_flow_monitor:
+                dic = self.get_psu_fru_info()
+                self.origin_name = dic["PN"]
+                self.air_flow = dic["AirFlow"]
+                self.display_name = dic["DisplayName"]
+        except Exception as e:
+            ledcontrol_error("update %s info error, msg: %s" % (self.name, str(e)))
+            self.present = STATUS_FAILED
+            self.status = STATUS_FAILED
+            self.status_summary = STATUS_FAILED
+            self.origin_name = self.na_ret
+            self.air_flow = self.na_ret
+            self.display_name = self.na_ret
+
+    def set_module_led(self, color):
+        """
+        set PSU module LED is not support, always return True
+        """
+        return True
+
+
+class DevFan(DevBase):
+
+    def __init__(self, name, air_flow_monitor, hal_interface):
+        super(DevFan, self).__init__(name, air_flow_monitor)
+        self.int_case = hal_interface
+
+    def get_fan_rotor_number(self):
+        return self.int_case.get_fan_rotor_number(self.name)
+
+    def get_fan_presence(self):
+        return self.int_case.get_fan_presence(self.name)
+
+    def get_fan_rotor_status(self, rotor_name):
+        return self.int_case.get_fan_rotor_status(self.name, rotor_name)
+
+    def get_fan_fru_info(self):
+        return self.int_case.get_fan_fru_info(self.name)
+
+    @property
+    def na_ret(self):
+        return self.int_case.na_ret
+
+    def get_present(self):
+        try:
+            status = self.get_fan_presence()
+            if status is True:
+                return STATUS_PRESENT
+            if status is False:
+                return STATUS_ABSENT
+        except Exception as e:
+            ledcontrol_error("get %s present status error, msg: %s" % (self.name, str(e)))
+        return STATUS_FAILED
+
+    def get_status(self):
+        try:
+            rotor_num = self.get_fan_rotor_number()
+            err_motor_num = 0
+            for j in range(rotor_num):
+                rotor_name = "Rotor" + str(j + 1)
+                roll_status = self.get_fan_rotor_status(rotor_name)
+                if roll_status is not True:
+                    err_motor_num += 1
+                    ledcontrol_debug("%s %s error, status %s" % (self.name, rotor_name, roll_status))
+                else:
+                    ledcontrol_debug("%s %s ok" % (self.name, rotor_name))
+            if err_motor_num > 0:
+                return STATUS_NOT_OK
+            return STATUS_OK
+        except Exception as e:
+            ledcontrol_error("get %s status error, msg: %s" % (self.name, str(e)))
+        return STATUS_FAILED
+
+    def update_dev_info(self):
+        try:
+            # update status
+            self.present = self.get_present()
+            if self.present != STATUS_PRESENT:
+                self.status = STATUS_UNKNOWN
+                self.status_summary = self.present
+            else:
+                self.status = self.get_status()
+                self.status_summary = self.status
+            # update fru info if need air flow monitor
+            if self.air_flow_monitor:
+                dic = self.get_fan_fru_info()
+                self.origin_name = dic["PN"]
+                self.air_flow = dic["AirFlow"]
+                self.display_name = dic["DisplayName"]
+        except Exception as e:
+            ledcontrol_error("update %s fru info error, msg: %s" % (self.name, str(e)))
+            self.present = STATUS_FAILED
+            self.status = STATUS_FAILED
+            self.status_summary = STATUS_FAILED
+            self.origin_name = self.na_ret
+            self.air_flow = self.na_ret
+            self.display_name = self.na_ret
+
+    def set_module_led(self, color):
+        ret = self.int_case.set_fan_led(self.name, color)
+        if ret == 0:
+            return True
+        return False
+
+
+class ledcontrol(object):
+
+    def __init__(self):
+        self.fan_obj_list = []
+        self.psu_obj_list = []
+        self.board_psu_led_status = COLOR_GREEN
+        self.board_fan_led_status = COLOR_GREEN
+        self.__board_air_flow = ""
+        self.int_case = interface()
+        self.__config = baseutil.get_monitor_config()
+        self.__temps_threshold_config = self.__config["temps_threshold"]
+        for temp_threshold in self.__temps_threshold_config.values():
+            temp_threshold['temp'] = 0
+            temp_threshold['fail_num'] = 0
+        self.__ledcontrol_para = self.__config["ledcontrol_para"]
+        self.__interval = self.__ledcontrol_para.get("interval", 5)
+        self.__checkpsu = self.__ledcontrol_para.get("checkpsu", 0)
+        self.__checkfan = self.__ledcontrol_para.get("checkfan", 0)
+        self.__psu_amber_num = self.__ledcontrol_para.get("psu_amber_num")
+        self.__fan_amber_num = self.__ledcontrol_para.get("fan_amber_num")
+        self.__psu_air_flow_amber_num = self.__ledcontrol_para.get("psu_air_flow_amber_num", 0)
+        self.__fan_air_flow_amber_num = self.__ledcontrol_para.get("fan_air_flow_amber_num", 0)
+        self.__board_sys_led = self.__ledcontrol_para.get("board_sys_led", [])
+        self.__board_psu_led = self.__ledcontrol_para.get("board_psu_led", [])
+        self.__board_fan_led = self.__ledcontrol_para.get("board_fan_led", [])
+        self.__psu_air_flow_monitor = self.__ledcontrol_para.get("psu_air_flow_monitor", 0)
+        self.__fan_air_flow_monitor = self.__ledcontrol_para.get("fan_air_flow_monitor", 0)
+        self.__fan_mix_list = self.__ledcontrol_para.get("fan_mix_list", [])
+
+    @property
+    def na_ret(self):
+        return self.int_case.na_ret
+
+    @property
+    def checkpsu(self):
+        return self.__checkpsu
+
+    @property
+    def checkfan(self):
+        return self.__checkfan
+
+    @property
+    def psu_amber_num(self):
+        return self.__psu_amber_num
+
+    @property
+    def fan_amber_num(self):
+        return self.__fan_amber_num
+
+    @property
+    def psu_air_flow_amber_num(self):
+        return self.__psu_air_flow_amber_num
+
+    @property
+    def fan_air_flow_amber_num(self):
+        return self.__fan_air_flow_amber_num
+
+    @property
+    def psu_air_flow_monitor(self):
+        return self.__psu_air_flow_monitor
+
+    @property
+    def fan_air_flow_monitor(self):
+        return self.__fan_air_flow_monitor
+
+    @property
+    def board_sys_led(self):
+        return self.__board_sys_led
+
+    @property
+    def board_psu_led(self):
+        return self.__board_psu_led
+
+    @property
+    def board_fan_led(self):
+        return self.__board_fan_led
+
+    @property
+    def fan_mix_list(self):
+        return self.__fan_mix_list
+
+    @property
+    def interval(self):
+        return self.__interval
+
+    def get_fan_total_number(self):
+        return self.int_case.get_fan_total_number()
+
+    def get_psu_total_number(self):
+        return self.int_case.get_psu_total_number()
+
+    def get_onie_e2_obj(self, name):
+        return self.int_case.get_onie_e2_obj(name)
+
+    def set_led_color(self, led_name, color):
+        try:
+            ret = self.int_case.set_led_color(led_name, color)
+        except Exception as e:
+            ledcontrol_error("set %s led %s error, msg: %s" % (led_name, color, str(e)))
+            ret = False
+        return ret
+
+    def set_sys_led(self, color):
+        for led in self.board_sys_led:
+            led_name = led.get("led_name")
+            ret = self.set_led_color(led_name, color)
+            if ret is True:
+                ledcontrol_debug("set %s success, color:%s," % (led_name, color))
+            else:
+                ledcontrol_debug("set %s failed, color:%s," % (led_name, color))
+
+    def set_psu_led(self, color):
+        for led in self.board_psu_led:
+            led_name = led.get("led_name")
+            ret = self.set_led_color(led_name, color)
+            if ret is True:
+                ledcontrol_debug("set %s success, color:%s," % (led_name, color))
+            else:
+                ledcontrol_debug("set %s failed, color:%s," % (led_name, color))
+
+    def set_fan_led(self, color):
+        for led in self.board_fan_led:
+            led_name = led.get("led_name")
+            ret = self.set_led_color(led_name, color)
+            if ret is True:
+                ledcontrol_debug("set %s success, color:%s," % (led_name, color))
+            else:
+                ledcontrol_debug("set %s failed, color:%s," % (led_name, color))
+
+    def set_fan_module_led(self):
+        for fan_obj in self.fan_obj_list:
+            color = LED_STATUS_DICT.get(fan_obj.led_status)
+            ret = fan_obj.set_module_led(color)
+            if ret is True:
+                ledcontrol_debug("set %s module led success, color: %s," % (fan_obj.name, color))
+            else:
+                ledcontrol_debug("set %s module led failed, color: %s," % (fan_obj.name, color))
+
+    @property
+    def board_air_flow(self):
+        air_flow_tuple = (F2B_AIR_FLOW, B2F_AIR_FLOW)
+        if self.__board_air_flow not in air_flow_tuple:
+            self.__board_air_flow = self.int_case.get_device_airflow(ONIE_E2_NAME)
+            ledcontrol_debug("board_air_flow: %s" % self.__board_air_flow)
+        return self.__board_air_flow
+
+    def update_psu_info(self):
+        for psu_obj in self.psu_obj_list:
+            psu_obj.update_dev_info()
+            ledcontrol_debug("%s present: [%s], status: [%s] status_summary [%s]" %
+                             (psu_obj.name, psu_obj.present, psu_obj.status, psu_obj.status_summary))
+            if psu_obj.air_flow_monitor:
+                ledcontrol_debug("%s origin name: [%s], display name: [%s] air flow [%s]" %
+                                 (psu_obj.name, psu_obj.origin_name, psu_obj.display_name, psu_obj.air_flow))
+
+    def update_fan_info(self):
+        for fan_obj in self.fan_obj_list:
+            fan_obj.update_dev_info()
+            ledcontrol_debug("%s present: [%s], status: [%s] status_summary [%s]" %
+                             (fan_obj.name, fan_obj.present, fan_obj.status, fan_obj.status_summary))
+            if fan_obj.air_flow_monitor:
+                ledcontrol_debug("%s origin name: [%s], display name: [%s] air flow [%s]" %
+                                 (fan_obj.name, fan_obj.origin_name, fan_obj.display_name, fan_obj.air_flow))
+
+    def get_monitor_temp(self):
+        sensorlist = self.int_case.get_temp_info()
+
+        for temp_threshold in self.__temps_threshold_config.values():
+            sensor = sensorlist.get(temp_threshold['name'])
+            if sensor["Value"] is None:
+                temp_threshold['fail_num'] += 1
+                ledcontrol_error("get %s failed, fail_num = %d" % (temp_threshold['name'], temp_threshold['fail_num']))
+            else:
+                temp_threshold['fail_num'] = 0
+                temp_threshold.setdefault('fix', 0)
+                temp_threshold['temp'] = sensor["Value"] + temp_threshold['fix']
+            ledcontrol_debug("%s = %d" % (temp_threshold['name'], temp_threshold['temp']))
+            ledcontrol_debug("warning = %d, critical = %d" % (temp_threshold['warning'], temp_threshold['critical']))
+
+    def is_temp_warning(self):
+        warning_flag = False
+        for temp_threshold in self.__temps_threshold_config.values():
+            if temp_threshold['temp'] >= temp_threshold['warning']:
+                warning_flag = True
+                ledcontrol_debug("%s is over warning" % temp_threshold['name'])
+                ledcontrol_debug(
+                    "%s = %d, warning = %d" %
+                    (temp_threshold['name'],
+                     temp_threshold['temp'],
+                        temp_threshold['warning']))
+        return warning_flag
+
+    def checkTempWarning(self):
+        try:
+            if self.is_temp_warning():
+                ledcontrol_debug("temp is over warning")
+                return True
+        except Exception as e:
+            ledcontrol_error("%%policy: checkTempWarning failed")
+            ledcontrol_error(str(e))
+        return False
+
+    def is_temp_critical(self):
+        critical_flag = False
+        for temp_threshold in self.__temps_threshold_config.values():
+            temp_threshold['critical_flag'] = False
+            if temp_threshold['temp'] >= temp_threshold['critical']:
+                critical_flag = True
+                temp_threshold['critical_flag'] = True
+                ledcontrol_debug("%s is over critical" % temp_threshold['name'])
+                ledcontrol_debug(
+                    "%s = %d, critical = %d" %
+                    (temp_threshold['name'],
+                     temp_threshold['temp'],
+                        temp_threshold['critical']))
+        return critical_flag
+
+    def checkTempCrit(self):
+        try:
+            if self.is_temp_critical():
+                temp_dict = dict(self.__temps_threshold_config)
+                tmp = temp_dict.get(SWITCH_TEMP)
+                if tmp['critical_flag'] is True:
+                    ledcontrol_debug("temp is over critical")
+                    return True
+
+                del temp_dict[SWITCH_TEMP]
+                for temp_items in temp_dict.values():
+                    if temp_items['critical_flag'] is False:
+                        return False
+
+                ledcontrol_debug("temp is over critical")
+                return True
+        except Exception as e:
+            ledcontrol_error("%%policy: checkTempCrit failed")
+            ledcontrol_error(str(e))
+        return False
+
+    def check_board_air_flow(self):
+        board_air_flow = self.board_air_flow
+        air_flow_tuple = (F2B_AIR_FLOW, B2F_AIR_FLOW)
+        if board_air_flow not in air_flow_tuple:
+            air_flow_error("%%AIR_FLOW_MONITOR-3-BOARD: Get board air flow failed, value: %s." % board_air_flow)
+            return False
+        ledcontrol_debug("board air flow check ok: %s" % board_air_flow)
+        return True
+
+    def get_monitor_fan_status(self):
+        fanerrnum = 0
+        for fan_obj in self.fan_obj_list:
+            status = fan_obj.status_summary
+            ledcontrol_debug("%s status: %s" % (fan_obj.name, status))
+            if status != STATUS_OK:
+                fan_obj.led_status = COLOR_RED
+                fanerrnum += 1
+            else:
+                fan_obj.led_status = COLOR_GREEN
+        ledcontrol_debug("fan error number: %d" % fanerrnum)
+
+        if fanerrnum == 0:
+            fan_led_status = COLOR_GREEN
+        elif fanerrnum <= self.fan_amber_num:
+            fan_led_status = COLOR_AMBER
+        else:
+            fan_led_status = COLOR_RED
+        ledcontrol_debug("monitor fan status, set fan led: %s" % LED_STATUS_DICT.get(fan_led_status))
+        return fan_led_status
+
+    def get_monitor_psu_status(self):
+        psuerrnum = 0
+        for psu_obj in self.psu_obj_list:
+            status = psu_obj.status_summary
+            ledcontrol_debug("%s status: %s" % (psu_obj.name, status))
+            if status != STATUS_OK:
+                psu_obj.led_status = COLOR_RED
+                psuerrnum += 1
+            else:
+                psu_obj.led_status = COLOR_GREEN
+        ledcontrol_debug("psu error number: %d" % psuerrnum)
+
+        if psuerrnum == 0:
+            psu_led_status = COLOR_GREEN
+        elif psuerrnum <= self.psu_amber_num:
+            psu_led_status = COLOR_AMBER
+        else:
+            psu_led_status = COLOR_RED
+        ledcontrol_debug("monitor psu status, set psu led: %s" % LED_STATUS_DICT.get(psu_led_status))
+        return psu_led_status
+
+    def get_monitor_fan_air_flow(self):
+        if self.fan_air_flow_monitor == 0:
+            ledcontrol_debug("fan air flow monitor not open, default green")
+            return COLOR_GREEN
+
+        ret = self.check_board_air_flow()
+        if ret is False:
+            ledcontrol_debug("check board air flow error, skip fan air flow monitor.")
+            return COLOR_GREEN
+
+        fan_led_status_list = []
+        fan_air_flow_ok_obj_list = []
+        fan_air_flow_ok_set = set()
+        fan_module_led_list = []
+        fan_air_flow_err_num = 0
+        for fan_obj in self.fan_obj_list:
+            if fan_obj.present != STATUS_PRESENT:
+                fan_module_led_list.append(COLOR_GREEN)
+                continue
+            if fan_obj.air_flow == self.na_ret:
+                air_flow_warn("%%AIR_FLOW_MONITOR-4-FAN: %s get air flow failed, fan model: %s, air flow: %s." %
+                              (fan_obj.name, fan_obj.display_name, fan_obj.air_flow))
+                led_status = COLOR_AMBER
+                fan_module_led_list.append(led_status)
+            elif fan_obj.air_flow != self.board_air_flow:
+                air_flow_emerg("%%AIR_FLOW_MONITOR-0-FAN: %s air flow error, fan model: %s, fan air flow: %s, board air flow: %s." %
+                               (fan_obj.name, fan_obj.display_name, fan_obj.air_flow, self.board_air_flow))
+                led_status = COLOR_RED
+                fan_air_flow_err_num += 1
+            else:
+                fan_air_flow_ok_obj_list.append(fan_obj)
+                fan_air_flow_ok_set.add(fan_obj.origin_name)
+                ledcontrol_debug("%s air flow check ok, origin name: [%s], display name: [%s], fan air flow: [%s], board air flow: [%s]" %
+                                 (fan_obj.name, fan_obj.origin_name, fan_obj.display_name, fan_obj.air_flow, self.board_air_flow))
+                led_status = COLOR_GREEN
+                fan_module_led_list.append(led_status)
+            if led_status > fan_obj.led_status:
+                fan_obj.led_status = led_status
+        if len(fan_module_led_list) != 0:
+            fan_led_status = max(fan_module_led_list)
+            fan_led_status_list.append(fan_led_status)
+        # check fan mixing
+        if len(fan_air_flow_ok_set) > 1 and fan_air_flow_ok_set not in self.fan_mix_list:
+            for fan_obj in fan_air_flow_ok_obj_list:
+                air_flow_warn("%%AIR_FLOW_MONITOR-4-FAN: %s mixing, fan model: %s, air flow: %s." %
+                              (fan_obj.name, fan_obj.origin_name, fan_obj.air_flow))
+            fan_led_status = COLOR_AMBER
+            fan_led_status_list.append(fan_led_status)
+        # check fan air flow error number
+        if fan_air_flow_err_num == 0:
+            fan_led_status = COLOR_GREEN
+        elif fan_air_flow_err_num <= self.fan_air_flow_amber_num:
+            fan_led_status = COLOR_AMBER
+        else:
+            fan_led_status = COLOR_RED
+        fan_led_status_list.append(fan_led_status)
+
+        fan_led_status = max(fan_led_status_list)
+        ledcontrol_debug("monitor fan air flow, set fan led: %s" % LED_STATUS_DICT.get(fan_led_status))
+        return fan_led_status
+
+    def get_monitor_psu_air_flow(self):
+        if self.psu_air_flow_monitor == 0:
+            ledcontrol_debug("psu air flow monitor not open, default green")
+            return COLOR_GREEN
+
+        ret = self.check_board_air_flow()
+        if ret is False:
+            ledcontrol_debug("check board air flow error, skip psu air flow monitor.")
+            return COLOR_GREEN
+
+        psu_led_status_list = []
+        psu_module_led_list = []
+        psu_air_flow_err_num = 0
+        for psu_obj in self.psu_obj_list:
+            if psu_obj.present != STATUS_PRESENT:
+                psu_module_led_list.append(COLOR_GREEN)
+                continue
+            if psu_obj.air_flow == self.na_ret:
+                air_flow_warn("%%AIR_FLOW_MONITOR-4-PSU: %s get air flow failed, psu model: %s, air flow: %s." %
+                              (psu_obj.name, psu_obj.display_name, psu_obj.air_flow))
+                led_status = COLOR_AMBER
+                psu_module_led_list.append(led_status)
+            elif psu_obj.air_flow != self.board_air_flow:
+                air_flow_emerg("%%AIR_FLOW_MONITOR-0-PSU: %s air flow error, psu model: %s, psu air flow: %s, board air flow: %s." %
+                               (psu_obj.name, psu_obj.display_name, psu_obj.air_flow, self.board_air_flow))
+                led_status = COLOR_RED
+                psu_air_flow_err_num += 1
+            else:
+                ledcontrol_debug("%s psu air flow check ok, origin name: [%s], display name: [%s], psu air flow: [%s], board air flow: [%s]" %
+                                 (psu_obj.name, psu_obj.origin_name, psu_obj.display_name, psu_obj.air_flow, self.board_air_flow))
+                led_status = COLOR_GREEN
+                psu_module_led_list.append(led_status)
+            if led_status > psu_obj.led_status:
+                psu_obj.led_status = led_status
+
+        if len(psu_module_led_list) != 0:
+            psu_led_status = max(psu_module_led_list)
+            psu_led_status_list.append(psu_led_status)
+
+        # check fan air flow error number
+        if psu_air_flow_err_num == 0:
+            psu_led_status = COLOR_GREEN
+        elif psu_air_flow_err_num <= self.psu_air_flow_amber_num:
+            psu_led_status = COLOR_AMBER
+        else:
+            psu_led_status = COLOR_RED
+        psu_led_status_list.append(psu_led_status)
+
+        psu_led_status = max(psu_led_status_list)
+        ledcontrol_debug("monitor psu air flow, set psu led: %s" % LED_STATUS_DICT.get(psu_led_status))
+        return psu_led_status
+
+    def get_temp_sys_led_status(self):
+        if self.checkTempCrit() is True:
+            sys_led_status = COLOR_RED
+        elif self.checkTempWarning() is True:
+            sys_led_status = COLOR_AMBER
+        else:
+            sys_led_status = COLOR_GREEN
+        ledcontrol_debug("monitor temperature, set sys led: %s" % LED_STATUS_DICT.get(sys_led_status))
+        return sys_led_status
+
+    def get_sys_led_follow_fan_status(self):
+
+        if self.checkfan:
+            sys_led_status = self.board_fan_led_status
+            ledcontrol_debug("sys led follow fan led, set sys led: %s" % LED_STATUS_DICT.get(sys_led_status))
+        else:
+            sys_led_status = COLOR_GREEN
+            ledcontrol_debug("sys led don't follow fan led, set default green")
+        return sys_led_status
+
+    def get_sys_led_follow_psu_status(self):
+        if self.checkpsu:
+            sys_led_status = self.board_psu_led_status
+            ledcontrol_debug("sys led follow psu led, set sys led: %s" % LED_STATUS_DICT.get(sys_led_status))
+        else:
+            sys_led_status = COLOR_GREEN
+            ledcontrol_debug("sys led don't follow psu led, set default green")
+        return sys_led_status
+
+    def dealSysLedStatus(self):
+        sys_led_status_list = []
+        # get_monitor_temp
+        self.get_monitor_temp()
+
+        # monitor temp get sys led status
+        sys_led_status = self.get_temp_sys_led_status()
+        sys_led_status_list.append(sys_led_status)
+
+        # check sys led follow fan led status
+        sys_led_status = self.get_sys_led_follow_fan_status()
+        sys_led_status_list.append(sys_led_status)
+
+        # check sys led follow psu led status
+        sys_led_status = self.get_sys_led_follow_psu_status()
+        sys_led_status_list.append(sys_led_status)
+
+        sys_led_status = max(sys_led_status_list)
+        sys_led_color = LED_STATUS_DICT.get(sys_led_status)
+
+        # set sys led
+        self.set_sys_led(sys_led_color)
+
+    def dealFanLedStatus(self):
+        fan_led_status_list = []
+        # update fan info
+        self.update_fan_info()
+
+        # monitor fan status first
+        fan_led_status = self.get_monitor_fan_status()
+        fan_led_status_list.append(fan_led_status)
+
+        # monitor fan air flow
+        fan_led_status = self.get_monitor_fan_air_flow()
+        fan_led_status_list.append(fan_led_status)
+
+        self.board_fan_led_status = max(fan_led_status_list)
+        fan_led_color = LED_STATUS_DICT.get(self.board_fan_led_status)
+
+        # set fan led
+        self.set_fan_led(fan_led_color)
+        # set fan module led
+        self.set_fan_module_led()
+
+    def dealPsuLedStatus(self):
+        psu_led_status_list = []
+        # update psu info
+        self.update_psu_info()
+
+        # monitor psu status first
+        psu_led_status = self.get_monitor_psu_status()
+        psu_led_status_list.append(psu_led_status)
+
+        # monitor psu air flow
+        psu_led_status = self.get_monitor_psu_air_flow()
+        psu_led_status_list.append(psu_led_status)
+
+        self.board_psu_led_status = max(psu_led_status_list)
+        psu_led_color = LED_STATUS_DICT.get(self.board_psu_led_status)
+
+        # set psu led
+        self.set_psu_led(psu_led_color)
+
+    def do_ledcontrol(self):
+        self.dealPsuLedStatus()
+        self.dealFanLedStatus()
+        self.dealSysLedStatus()
+
+    def fan_obj_init(self):
+        fan_num = self.get_fan_total_number()
+        for i in range(fan_num):
+            fan_name = "FAN" + str(i + 1)
+            fan_obj = DevFan(fan_name, self.fan_air_flow_monitor, self.int_case)
+            self.fan_obj_list.append(fan_obj)
+        ledcontrol_debug("fan object initialize success")
+
+    def psu_obj_init(self):
+        psu_num = self.get_psu_total_number()
+        for i in range(psu_num):
+            psu_name = "PSU" + str(i + 1)
+            psu_obj = DevPsu(psu_name, self.psu_air_flow_monitor, self.int_case)
+            self.psu_obj_list.append(psu_obj)
+        ledcontrol_debug("psu object initialize success")
+
+    def run(self):
+        while True:
+            try:
+                debug_init()
+                self.do_ledcontrol()
+                time.sleep(self.interval)
+            except Exception as e:
+                traceback.print_exc()
+                ledcontrol_error(str(e))
+
+
+if __name__ == '__main__':
+    debug_init()
+    ledcontrol_debug("enter main")
+    led_control = ledcontrol()
+    led_control.fan_obj_init()
+    led_control.psu_obj_init()
+    led_control.run()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/hal_pltfm.py b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_pltfm.py
new file mode 100755
index 000000000000..11196f507ef1
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_pltfm.py
@@ -0,0 +1,492 @@
+#!/usr/bin/env python3
+# -*- coding: UTF-8 -*-
+import inspect
+import sys
+import json
+import time
+from plat_hal.interface import interface
+
+
+class Command():
+    def __init__(self, name, f):
+        self.name = name
+        self.f = f
+        self.paramcount = self.f.__code__.co_argcount
+
+    def dofun(self, args):
+        fn = self.f.__call__
+        fn(*args)
+
+
+class Group():
+    def __init__(self, name, f):
+        self.groups = []
+        self.commands = []
+        self.name = name
+        self.f = f
+
+    def add_groups(self, command):
+        self.groups.append(command)
+
+    def add_commands(self, commnad):
+        x = Command(commnad.__name__, commnad)
+        self.commands.append(x)
+
+    def find_valuebyname(self, name):
+        for item in self.groups:
+            if name == item.name:
+                return item
+        for item in self.commands:
+            if name == item.name:
+                return item
+        return None
+
+    def deal(self, args):
+        if len(args) <= 0:
+            return self.print_help()
+        funclevel = args[0]
+        val = self.find_valuebyname(funclevel)
+        if val is None:
+            return self.print_help()
+        if isinstance(val, Command):
+            if len(args) < (val.paramcount + 1):
+                return self.print_help()
+            inputargs = args[1: (1 + val.paramcount)]
+            return val.dofun(inputargs)
+        if isinstance(val, Group):
+            args = args[1:]
+            return val.deal(args)
+        return self.print_help()
+
+    def get_max(self, arr):
+        lentmp = 0
+        for ar in arr:
+            lentmp = len(ar) if (len(ar) > lentmp) else lentmp
+        return lentmp
+
+    def print_help(self):
+
+        namesize = []
+        for item in self.groups:
+            namesize.append(item.name)
+        for item in self.commands:
+            namesize.append(item.name)
+        maxvalue = self.get_max(namesize)
+
+        if len(self.groups) > 0:
+            print("Groups:")
+            for item in self.groups:
+                print("   %-*s    %s" % (maxvalue, item.name, item.f.__doc__ or ''))
+        if len(self.commands) > 0:
+            print("Commands:")
+            for item in self.commands:
+                print("   %-*s   %s" % (maxvalue, item.name, item.f.__doc__ or ''))
+
+
+class clival():
+    @staticmethod
+    def Fire(val=None):
+        group = Group("top", 'mainlevel')
+        clival.iterGroup(val, group)
+        # context = {}
+        # caller = inspect.stack()[1]
+        # caller_frame = caller[0]
+        # caller_globals = caller_frame.f_globals
+        # caller_locals = caller_frame.f_locals
+        # context.update(caller_globals)
+        # context.update(caller_locals)
+        args = sys.argv[1:]
+        group.deal(args)
+
+    @staticmethod
+    def iterGroup(val, group):
+        for key, item in val.items():
+            if item is None:  # first level
+                if inspect.isfunction(key):
+                    group.add_commands(key)
+            else:
+                group1 = Group(key.__name__, key)
+                clival.iterGroup(item, group1)
+                group.add_groups(group1)
+
+
+def psu():
+    r'''test psu '''
+
+
+def fan():
+    r'''test fan '''
+
+
+def sensor():
+    r'''test sensor '''
+
+
+def dcdc():
+    r'''test dcdc '''
+
+
+def led():
+    r'''test led '''
+
+
+def e2():
+    r'''test onie eeprom '''
+
+
+def temps():
+    r'''test temps sensor'''
+
+def cpu():
+    r'''test cpu'''
+
+
+int_case = interface()
+
+
+def get_total_number():
+    r'''psu  get_total_number '''
+    print("=================get_total_number======================")
+    print(int_case.get_psu_total_number())
+
+
+def get_presence():
+    r'''psu  get_presence '''
+    print("=================get_presence======================")
+    psus = int_case.get_psus()
+    for psu_item in psus:
+        print(psu_item.name, end=' ')
+        print(int_case.get_psu_presence(psu_item.name))
+
+
+def get_fru_info():
+    r'''psu  get_fru_info '''
+    print("=================get_fru_info======================")
+    psus = int_case.get_psus()
+    for psu_item in psus:
+        print(psu_item.name, end=' ')
+        print(json.dumps(int_case.get_psu_fru_info(psu_item.name), ensure_ascii=False, indent=4))
+
+
+def get_status():
+    r'''psu  get_status '''
+    print("=================get_status======================")
+    psus = int_case.get_psus()
+    for psu_item in psus:
+        print(psu_item.name, end=' ')
+        print(json.dumps(int_case.get_psu_status(psu_item.name), ensure_ascii=False, indent=4))
+
+
+def set_psu_fan_speed_pwm(realspeed):
+    r'''set_psu_fan_speed_pwm'''
+    print("=================set_psu_fan_speed_pwm======================")
+    psus = int_case.get_psus()
+    for psu_item in psus:
+        print(psu_item.name, end=' ')
+        print(int_case.set_psu_fan_speed_pwm(psu_item.name, int(realspeed)))
+
+
+def get_psu_fan_speed_pwm():
+    r'''get_psu_fan_speed_pwm'''
+    print("=================get_psu_fan_speed_pwm======================")
+    psus = int_case.get_psus()
+    for psu_item in psus:
+        print(psu_item.name, end=' ')
+        print(json.dumps(int_case.get_psu_fan_speed_pwm(psu_item.name)))
+
+
+def get_psu_power_status():
+    r'''psu  get_psu_power_status '''
+    print("=================get_psu_power_status======================")
+    psus = int_case.get_psus()
+    for psu_item in psus:
+        print(psu_item.name, end=' ')
+        print(json.dumps(int_case.get_psu_power_status(psu_item.name), ensure_ascii=False, indent=4))
+
+
+def get_info_all():
+    r'''psu  get_info_all '''
+    print("=================get_info_all======================")
+    print(json.dumps(int_case.get_psu_info_all(), ensure_ascii=False, indent=4))
+
+
+def fan_get_total_number():
+    print("=================get_info_all======================")
+    print(json.dumps(int_case.get_fan_total_number(), ensure_ascii=False, indent=4))
+
+
+def fan_get_rotor_number():
+    r'''fan_get_rotor_number'''
+    print("=================fan_get_rotor_number======================")
+    fans = int_case.get_fans()
+    for fan_item in fans:
+        print(fan_item.name, end=' ')
+        print(int_case.get_fan_rotor_number(fan_item.name))
+
+
+def fan_get_speed():
+    r'''fan_get_speed'''
+    print("=================fan_get_speed======================")
+    fans = int_case.get_fans()
+    for fan_item in fans:
+        rotors = fan_item.rotor_list
+        for rotor in rotors:
+            index = rotors.index(rotor)
+            print("%s rotor%d" % (fan_item.name, index + 1), end='  ')
+            print(int_case.get_fan_speed(fan_item.name, index + 1))
+
+
+def fan_get_speed_pwm():
+    r'''fan_get_speed_pwm'''
+    print("=================fan_get_speed_pwm======================")
+    fans = int_case.get_fans()
+    for fan_item in fans:
+        rotors = fan_item.rotor_list
+        for rotor in rotors:
+            index = rotors.index(rotor)
+            print("%s rotor%d" % (fan_item.name, index + 1), end='  ')
+            print(int_case.get_fan_speed_pwm(fan_item.name, index + 1))
+
+
+def fan_set_speed_pwm(pwm):
+    r'''fan_set_speed_pwm'''
+    print("=================fan_set_speed_pwm======================")
+    fans = int_case.get_fans()
+    for fan_item in fans:
+        rotors = fan_item.rotor_list
+        for rotor in rotors:
+            index = rotors.index(rotor)
+            print("%s %s" % (fan_item.name, rotor.name), end='  ')
+            val = int_case.set_fan_speed_pwm(fan_item.name, index + 1, pwm)
+            print(val)
+
+
+def fan_get_watchdog_status():
+    r'''fan_get_watchdog_status'''
+    print("=================fan_get_watchdog_status======================")
+    print(int_case.get_fan_watchdog_status())
+
+
+def fan_enable_watchdog():
+    r'''fan_enable_watchdog'''
+    print("=================fan_enable_watchdog======================")
+    print('enable', int_case.enable_fan_watchdog())
+
+
+def fan_disable_watchdog():
+    r'''fan_disable_watchdog'''
+    print("=================fan_disable_watchdog======================")
+    print('disable', int_case.enable_fan_watchdog(enable=False))
+
+
+def fan_get_speed1():
+    r'''fan_get_speed'''
+    print("=================fan_get_speed======================")
+    fans = int_case.get_fans()
+    for fan_item in fans:
+        rotors = fan_item.rotor_list
+        for rotor in rotors:
+            print("%s %s" % (fan_item.name, rotor.name), end='  ')
+            print(int_case.get_fan_speed(fan_item.name, rotor.name))
+
+
+def fan_feed_watchdog():
+    r'''fan_feed_watchdog'''
+    print("=================fan_feed_watchdog======================")
+    fan_get_speed()
+    print(int_case.feed_fan_watchdog())
+    time.sleep(2)
+    fan_get_speed()
+
+
+def fan_set_led(color):
+    r'''fan_set_led'''
+    print("=================fan_set_led======================")
+    fans = int_case.get_fans()
+    for fan_item in fans:
+        print("%s" % fan_item.name)
+        print(color, int_case.set_fan_led(fan_item.name, color))
+
+def fan_get_led():
+    r'''fan_get_led'''
+    print("=================fan_get_led======================")
+    fans = int_case.get_fans()
+    for fan_item in fans:
+        print("%s" % fan_item.name)
+        print(int_case.get_fan_led(fan_item.name))
+
+
+def fan_get_presence():
+    r'''fan_get_presence'''
+    print("=================fan_get_presence======================")
+    fans = int_case.get_fans()
+    for fan_item in fans:
+        print("%s" % fan_item.name)
+        print(int_case.get_fan_presence(fan_item.name))
+
+
+def fan_get_info():
+    r'''fan_get_info'''
+    print("=================fan_get_info======================")
+    fans = int_case.get_fans()
+    for fan_item in fans:
+        print("%s" % fan_item.name)
+        print(json.dumps(int_case.get_fan_info(fan_item.name), ensure_ascii=False, indent=4))
+
+
+def fan_get_status():
+    r'''fan_get_status'''
+    print("=================fan_get_status======================")
+    fans = int_case.get_fans()
+    for fan_item in fans:
+        print("%s" % fan_item.name)
+        print(json.dumps(int_case.get_fan_status(fan_item.name), ensure_ascii=False, indent=4))
+
+
+def fan_get_info_all():
+    r'''fan_get_info_all'''
+    print("=================fan_get_info_all======================")
+    print(json.dumps(int_case.get_fan_info_all(), ensure_ascii=False, indent=4))
+
+
+def get_sensor_info():
+    r'''get_sensor_info'''
+    print("=================get_sensor_info======================")
+    print(json.dumps(int_case.get_sensor_info(), ensure_ascii=False, indent=4))
+
+
+def get_dcdc_all_info():
+    r'''get_dcdc_all_info'''
+    print("=================get_dcdc_all_info======================")
+    print(json.dumps(int_case.get_dcdc_all_info(), ensure_ascii=False, indent=4))
+
+
+def set_all_led_color(color):
+    r'''set_all_led_color color'''
+    print("=================set_all_led_color======================")
+    leds = int_case.get_leds()
+    for led_item in leds:
+        print("%s" % led_item.name)
+        print(color, int_case.set_led_color(led_item.name, color))
+
+
+def get_all_led_color():
+    r'''get_all_led_color'''
+    print("=================get_all_led_color======================")
+    leds = int_case.get_leds()
+    for led_item in leds:
+        print("%s" % led_item.name)
+        print(int_case.get_led_color(led_item.name))
+
+
+def set_single_led_color(led_name, color):
+    r'''set_single_led_color led_name color'''
+    print("=================set_single_led_color======================")
+    leds = int_case.get_leds()
+    for led_item in leds:
+        if led_name == led_item.name:
+            print("%s" % led_item.name)
+            print(color, int_case.set_led_color(led_item.name, color))
+
+
+def get_single_led_color(led_name):
+    r'''get_single_led_color'''
+    print("=================get_single_led_color======================")
+    leds = int_case.get_leds()
+    for led_item in leds:
+        if led_name == led_item.name:
+            print("%s" % led_item.name)
+            print(int_case.get_led_color(led_item.name))
+
+
+def get_onie_e2_path():
+    r'''get_onie_e2_path'''
+    print("=================get_onie_e2_path======================")
+    path = int_case.get_onie_e2_path("ONIE_E2")
+    print("%s" % path)
+
+
+def get_device_airflow():
+    r'''get_device_airflow'''
+    print("=================get_device_airflow======================")
+    airflow = int_case.get_device_airflow("ONIE_E2")
+    print("%s" % airflow)
+
+
+def get_temps_sensor():
+    r'''get_temps_sensor'''
+    print("=================get_temps_sensor======================")
+    temp_list = int_case.get_temps()
+    for temp in temp_list:
+        print("id: %s, name: %s, API name: %s, value: %s" % (temp.temp_id, temp.name, temp.api_name, temp.Value))
+
+def get_cpu_reset_num():
+    r'''get_cpu_reset_num'''
+    print("=================get_cpu_reset_num======================")
+    print(int_case.get_cpu_reset_num())
+
+def get_cpu_reboot_cause():
+    r'''get_cpu_reboot_cause'''
+    print("=================get_cpu_reboot_cause======================")
+    print(int_case.get_cpu_reboot_cause())
+
+
+def run_cli_man():
+    clival.Fire(
+        {
+            psu: {
+                get_total_number: None,
+                get_presence: None,
+                get_fru_info: None,
+                set_psu_fan_speed_pwm: None,
+                get_psu_fan_speed_pwm: None,
+                get_status: None,
+                get_psu_power_status: None,
+                get_info_all: None
+            },
+            fan: {
+                fan_get_total_number: None,
+                fan_get_rotor_number: None,
+                fan_get_speed: None,
+                fan_get_speed_pwm: None,
+                fan_set_speed_pwm: None,
+                fan_get_watchdog_status: None,
+                fan_enable_watchdog: None,
+                fan_disable_watchdog: None,
+                fan_feed_watchdog: None,
+                fan_set_led: None,
+                fan_get_led: None,
+                fan_get_presence: None,
+                fan_get_info: None,
+                fan_get_status: None,
+                fan_get_info_all: None
+            },
+            sensor: {
+                get_sensor_info: None
+            },
+            dcdc: {
+                get_dcdc_all_info: None
+            },
+            led: {
+                set_all_led_color: None,
+                set_single_led_color: None,
+                get_all_led_color: None,
+                get_single_led_color: None,
+            },
+            e2: {
+                get_onie_e2_path: None,
+                get_device_airflow: None,
+            },
+            temps: {
+                get_temps_sensor: None,
+            },
+            cpu: {
+                get_cpu_reset_num: None,
+                get_cpu_reboot_cause: None,
+            }
+        }
+    )
+
+
+if __name__ == '__main__':
+    run_cli_man()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor.py b/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor.py
new file mode 100755
index 000000000000..33d5bfba64e6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor.py
@@ -0,0 +1,144 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+
+import os
+import time
+import syslog
+from plat_hal.interface import interface
+from plat_hal.baseutil import baseutil
+from platform_util import io_rd, wbi2cget
+
+INTELLIGENT_MONITOR_DEBUG_FILE = "/etc/.intelligent_monitor_debug"
+
+debuglevel = 0
+
+
+def monitor_syslog_debug(s):
+    if debuglevel:
+        syslog.openlog("INTELLIGENT_MONITOR_DEBUG", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def monitor_syslog(s):
+    syslog.openlog("INTELLIGENT_MONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_WARNING, s)
+
+
+def pmon_syslog_notice(s):
+    syslog.openlog("PMON_SYSLOG", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_NOTICE, s)
+
+
+class IntelligentMonitor():
+    def __init__(self):
+        self.dcdc_dict = {}
+        self.int_case = interface()
+        self.__config = baseutil.get_monitor_config()
+        self.__intelligent_monitor_para = self.__config.get('intelligent_monitor_para', {})
+        self.__interval = self.__intelligent_monitor_para.get('interval', 60)
+        self.__dcdc_whitelist = self.__config.get('dcdc_monitor_whitelist', {})
+        self.__error_ret = self.int_case.error_ret
+
+    @property
+    def error_ret(self):
+        return self.__error_ret
+
+    @property
+    def interval(self):
+        return self.__interval
+
+    def debug_init(self):
+        global debuglevel
+        if os.path.exists(INTELLIGENT_MONITOR_DEBUG_FILE):
+            debuglevel = 1
+        else:
+            debuglevel = 0
+
+    def dcdc_whitelist_check(self, dcdc_name):
+        try:
+            check_item = self.__dcdc_whitelist.get(dcdc_name, {})
+            if len(check_item) == 0:
+                return False
+            gettype = check_item.get("gettype", None)
+            checkbit = check_item.get("checkbit", None)
+            okval = check_item.get("okval", None)
+            if gettype is None or checkbit is None or okval is None:
+                monitor_syslog('%%INTELLIGENT_MONITOR-3-DCDC_WHITELIST_FAILED: %s config error. gettype:%s, checkbit:%s, okval:%s' %
+                               (dcdc_name, gettype, checkbit, okval))
+                return False
+            if gettype == "io":
+                io_addr = check_item.get('io_addr', None)
+                val = io_rd(io_addr)
+                if val is not None:
+                    retval = val
+                else:
+                    monitor_syslog(
+                        '%%INTELLIGENT_MONITOR-3-DCDC_WHITELIST_FAILED: %s io_rd error. io_addr:%s' %
+                        (dcdc_name, io_addr))
+                    return False
+            elif gettype == "i2c":
+                bus = check_item.get('bus', None)
+                addr = check_item.get('addr', None)
+                offset = check_item.get('offset', None)
+                ind, val = wbi2cget(bus, addr, offset)
+                if ind is True:
+                    retval = val
+                else:
+                    monitor_syslog('%%INTELLIGENT_MONITOR-3-DCDC_WHITELIST_FAILED: %s i2cget error. bus:%s, addr:%s, offset:%s' %
+                                   (dcdc_name, bus, addr, offset))
+                    return False
+            else:
+                monitor_syslog('%%INTELLIGENT_MONITOR-3-DCDC_WHITELIST_FAILED: %s gettype not support' % dcdc_name)
+                return False
+
+            val_t = (int(retval, 16) & (1 << checkbit)) >> checkbit
+            if val_t != okval:
+                return False
+            return True
+        except Exception as e:
+            monitor_syslog('%%WHITELIST_CHECK: %s check error, msg: %s.' % (dcdc_name, str(e)))
+            return False
+
+    def update_dcdc_status(self):
+        try:
+            self.dcdc_dict = self.int_case.get_dcdc_all_info()
+            for dcdc_name, item in self.dcdc_dict.items():
+                ret = self.dcdc_whitelist_check(dcdc_name)
+                if ret is False:
+                    if item['Value'] == self.error_ret:
+                        monitor_syslog(
+                            '%%INTELLIGENT_MONITOR-3-DCDC_SENSOR_FAILED: The value of %s read failed.' %
+                            (dcdc_name))
+                    elif float(item['Value']) > float(item['Max']):
+                        pmon_syslog_notice('%%PMON-5-VOLTAGE_HIGH: %s voltage %.3f%s is larger than max threshold %.3f%s.' %
+                                           (dcdc_name, float(item['Value']), item['Unit'], float(item['Max']), item['Unit']))
+                    elif float(item['Value']) < float(item['Min']):
+                        pmon_syslog_notice('%%PMON-5-VOLTAGE_LOW: %s voltage %.3f%s is lower than min threshold %.3f%s.' %
+                                           (dcdc_name, float(item['Value']), item['Unit'], float(item['Min']), item['Unit']))
+                    else:
+                        monitor_syslog_debug('%%INTELLIGENT_MONITOR-6-DCDC_SENSOR_OK: %s normal, value is %.3f%s.' %
+                                             (dcdc_name, item['Value'], item['Unit']))
+                else:
+                    monitor_syslog_debug(
+                        '%%INTELLIGENT_MONITOR-6-DCDC_WHITELIST_CHECK: %s is in dcdc whitelist, not monitor voltage' %
+                        dcdc_name)
+                    continue
+        except Exception as e:
+            monitor_syslog('%%INTELLIGENT_MONITOR-3-EXCEPTION: update dcdc sensors status error, msg: %s.' % (str(e)))
+
+    def doWork(self):
+        self.update_dcdc_status()
+
+    def run(self):
+        while True:
+            try:
+                self.debug_init()
+                self.doWork()
+                time.sleep(self.interval)
+            except Exception as e:
+                monitor_syslog('%%INTELLIGENT_MONITOR-3-EXCEPTION: %s.' % (str(e)))
+
+
+if __name__ == '__main__':
+    intelligent_monitor = IntelligentMonitor()
+    intelligent_monitor.run()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor/monitor_fan.py b/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor/monitor_fan.py
new file mode 100755
index 000000000000..c84319f3b798
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor/monitor_fan.py
@@ -0,0 +1,284 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+
+import os
+import time
+import logging
+from logging.handlers import RotatingFileHandler
+
+from plat_hal.interface import interface
+from plat_hal.baseutil import baseutil
+
+
+DEBUG_FILE = "/etc/.monitor_fan_debug_flag"
+
+LOG_FILE = "/var/log/intelligent_monitor/monitor_fan_log"
+
+E2_NAME = "ONIE_E2"
+
+
+def _init_logger():
+    if not os.path.exists(LOG_FILE):
+        os.system("mkdir -p %s" % os.path.dirname(LOG_FILE))
+        os.system("sync")
+    handler = RotatingFileHandler(filename=LOG_FILE, maxBytes=5 * 1024 * 1024, backupCount=1)
+    formatter = logging.Formatter("%(asctime)s %(levelname)s %(filename)s[%(funcName)s][%(lineno)s]: %(message)s")
+    handler.setFormatter(formatter)
+    logger = logging.getLogger(__name__)
+    logger.setLevel(logging.INFO)
+    logger.addHandler(handler)
+    return logger
+
+
+class Fan(object):
+
+    def __init__(self, name, hal_interface):
+        self.name = name
+        self.fan_dict = {}
+        self.int_case = hal_interface
+        self.update_time = 0
+        self.pre_present = False
+        self.pre_status = True
+        self.plugin_cnt = 0
+        self.plugout_cnt = 0
+        self.status_normal_cnt = 0
+        self.status_error_cnt = 0
+
+    def fan_dict_update(self):
+        local_time = time.time()
+        if not self.fan_dict or (local_time - self.update_time) >= 1:  # update data every 1 seconds
+            self.update_time = local_time
+            self.fan_dict = self.int_case.get_fan_info(self.name)
+
+    def get_model(self):
+        self.fan_dict_update()
+        return self.fan_dict["NAME"]
+
+    def get_serial(self):
+        self.fan_dict_update()
+        return self.fan_dict["SN"]
+
+    def get_presence(self):
+        return self.int_case.get_fan_presence(self.name)
+
+    def get_rotor_speed(self, rotor_name):
+        """
+        Retrieves the speed of fan as a percentage of full speed
+
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        fan_dir = {}
+        fan_dir = self.int_case.get_fan_info_rotor(self.name)
+        # get fan rotor pwm
+        value = fan_dir[rotor_name]["Speed"]
+        max_speed = fan_dir[rotor_name]["SpeedMax"]
+
+        if isinstance(value, str) or value is None:
+            return 0
+        pwm = value * 100 / max_speed
+        if pwm > 100:
+            pwm = 100
+        elif pwm < 0:
+            pwm = 0
+        return int(pwm)
+
+    def get_rotor_speed_tolerance(self, rotor_name):
+        """
+        Retrieves the speed tolerance of the fan
+        Returns:
+            An integer, the percentage of variance from target speed which is
+        considered tolerable
+        """
+        # The default tolerance value is fixed as 30%
+        fan_dir = {}
+        fan_dir = self.int_case.get_fan_info_rotor(self.name)
+        # get fan rotor tolerance
+        tolerance = fan_dir[rotor_name]["Tolerance"]
+
+        if isinstance(tolerance, str) or tolerance is None:
+            return 30
+        return tolerance
+
+    def get_target_speed(self):
+        """
+        Retrieves the target (expected) speed of the fan
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        pwm = self.int_case.get_fan_speed_pwm(self.name, 0)
+        return int(pwm)
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the FAN
+        Returns:
+            bool: True if FAN is operating properly, False if not
+        """
+        if not self.get_presence():
+            return False
+
+        rotor_num = self.int_case.get_fan_rotor_number(self.name)
+        for i in range(rotor_num):
+            rotor_name = "Rotor" + str(i + 1)
+            speed = self.get_rotor_speed(rotor_name)
+            tolerance = self.get_rotor_speed_tolerance(rotor_name)
+            target = self.get_target_speed()
+            if (speed - target) > target * tolerance / 100:
+                return False
+            if (target - speed) > target * tolerance / 100:
+                return False
+
+        return True
+
+    def get_direction(self):
+        """
+        Retrieves the fan airflow direction
+        Returns:
+            A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
+            depending on fan direction
+
+        Notes:
+            - Forward/Exhaust : Air flows from Port side to Fan side.
+            - Reverse/Intake  : Air flows from Fan side to Port side.
+        """
+        self.fan_dict_update()
+        return self.fan_dict["AirFlow"]
+
+
+class MonitorFan(object):
+
+    def __init__(self):
+        self.int_case = interface()
+        self.logger = _init_logger()
+        self.fan_obj_list = []
+        self.__config = baseutil.get_monitor_config()
+        self.__monitor_fan_config = self.__config.get("monitor_fan_para", {})
+        self.__present_interval = self.__monitor_fan_config.get("present_interval", 0.5)
+        self.__status_interval = self.__monitor_fan_config.get("status_interval", 5)
+        self.__present_check_cnt = self.__monitor_fan_config.get("present_check_cnt", 3)
+        self.__status_check_cnt = self.__monitor_fan_config.get("status_check_cnt", 3)
+
+    def debug_init(self):
+        if os.path.exists(DEBUG_FILE):
+            self.logger.setLevel(logging.DEBUG)
+        else:
+            self.logger.setLevel(logging.INFO)
+
+    def get_fan_total_number(self):
+        return self.int_case.get_fan_total_number()
+
+    def get_device_airflow(self):
+        return self.int_case.get_device_airflow(E2_NAME)
+
+    def fan_obj_init(self):
+        fan_num = self.get_fan_total_number()
+        for i in range(fan_num):
+            fan_name = "FAN" + str(i + 1)
+            fan_obj = Fan(fan_name, self.int_case)
+            self.fan_obj_list.append(fan_obj)
+        self.logger.info("fan object initialize success")
+
+    def fan_airflow_check(self, fan_obj):
+        fan_airflow = fan_obj.get_direction()
+        device_airflow = self.get_device_airflow()
+        if fan_airflow != device_airflow:
+            self.logger.error("%s airflow[%s] not match device airflow[%s]", fan_obj.name, fan_airflow, device_airflow)
+        else:
+            self.logger.debug("%s airflow[%s] match device airflow[%s]", fan_obj.name, fan_airflow, device_airflow)
+
+    def fan_plug_in_out_check(self, fan_obj):
+        present = fan_obj.get_presence()
+        if present is True:
+            self.logger.debug("%s is present", fan_obj.name)
+        else:
+            self.logger.debug("%s is absent", fan_obj.name)
+
+        if present != fan_obj.pre_present:
+            if present is True:
+                fan_obj.plugin_cnt += 1
+                fan_obj.plugout_cnt = 0
+                if fan_obj.plugin_cnt >= self.__present_check_cnt:
+                    fan_obj.pre_present = True
+                    self.logger.info("%s [serial:%s] is plugin", fan_obj.name, fan_obj.get_serial())
+                    self.fan_airflow_check(fan_obj)
+            else:
+                fan_obj.plugin_cnt = 0
+                fan_obj.plugout_cnt += 1
+                if fan_obj.plugout_cnt >= self.__present_check_cnt:
+                    fan_obj.pre_present = False
+                    self.logger.info("%s is plugout", fan_obj.name)
+        else:
+            fan_obj.plugin_cnt = 0
+            fan_obj.plugout_cnt = 0
+            self.logger.debug("%s present status is not change", fan_obj.name)
+
+    def fan_status_check(self, fan_obj):
+        status = fan_obj.get_status()
+        if status is True:
+            self.logger.debug("%s is normal", fan_obj.name)
+        else:
+            self.logger.debug("%s is error", fan_obj.name)
+
+        if status != fan_obj.pre_status:
+            if status is True:
+                fan_obj.status_normal_cnt += 1
+                fan_obj.status_error_cnt = 0
+                if fan_obj.status_normal_cnt >= self.__status_check_cnt:
+                    fan_obj.pre_status = True
+                    self.logger.info(
+                        "%s [serial:%s] is form error change to normal",
+                        fan_obj.name,
+                        fan_obj.get_serial())
+            else:
+                fan_obj.status_normal_cnt = 0
+                fan_obj.status_error_cnt += 1
+                if fan_obj.status_error_cnt >= self.__status_check_cnt:
+                    fan_obj.pre_status = False
+                    self.logger.info(
+                        "%s [serial:%s] is form normal change to error",
+                        fan_obj.name,
+                        fan_obj.get_serial())
+        else:
+            fan_obj.status_normal_cnt = 0
+            fan_obj.status_error_cnt = 0
+            self.logger.debug("%s status is not change", fan_obj.name)
+
+    def checkFanPresence(self):
+        for fan_obj in self.fan_obj_list:
+            self.fan_plug_in_out_check(fan_obj)
+
+    def checkFanStatus(self):
+        for fan_obj in self.fan_obj_list:
+            self.fan_status_check(fan_obj)
+
+    def run(self):
+        start_time = time.time()
+        while True:
+            try:
+                self.debug_init()
+                delta_time = time.time() - start_time
+                if self.__present_interval <= self.__status_interval:
+                    if delta_time >= self.__status_interval or delta_time < 0:
+                        self.checkFanStatus()
+                        start_time = time.time()
+                    else:
+                        self.checkFanPresence()
+                    time.sleep(self.__present_interval)
+                else:
+                    if delta_time >= self.__present_interval or delta_time < 0:
+                        self.checkFanPresence()
+                        start_time = time.time()
+                    else:
+                        self.checkFanStatus()
+                    time.sleep(self.__status_interval)
+            except Exception as e:
+                self.logger.error('EXCEPTION: %s.', str(e))
+
+
+if __name__ == '__main__':
+    monitor_fan = MonitorFan()
+    monitor_fan.fan_obj_init()
+    monitor_fan.run()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py
new file mode 100755
index 000000000000..4fe0beec44d5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py
@@ -0,0 +1,178 @@
+#!/usr/bin/python3
+
+__all__ = [
+    "BLACKLIST_DRIVERS",
+    "DRIVERLISTS",
+    "DEVICE",
+    "STARTMODULE",
+    "MAC_LED_RESET",
+    "MAC_DEFAULT_PARAM",
+    "DEV_MONITOR_PARAM",
+    "SLOT_MONITOR_PARAM",
+    "MANUINFO_CONF",
+    "REBOOT_CTRL_PARAM",
+    "PMON_SYSLOG_STATUS",
+    "OPTOE",
+    "REBOOT_CAUSE_PARA",
+    "UPGRADE_SUMMARY",
+    "WARM_UPGRADE_PARAM",
+    "WARM_UPG_FLAG",
+    "WARM_UPGRADE_STARTED_FLAG",
+    "PLATFORM_E2_CONF",
+    "AIR_FLOW_CONF",
+    "AIRFLOW_RESULT_FILE",
+    "INIT_PARAM_PRE",
+    "INIT_COMMAND_PRE",
+    "INIT_PARAM",
+    "INIT_COMMAND",
+    "MONITOR_TEMP_MIN",
+    "MONITOR_K",
+    "MONITOR_MAC_IN",
+    "MONITOR_DEFAULT_SPEED",
+    "MONITOR_MAX_SPEED",
+    "MONITOR_MIN_SPEED",
+    "MONITOR_MAC_ERROR_SPEED",
+    "MONITOR_FAN_TOTAL_NUM",
+    "MONITOR_MAC_UP_TEMP",
+    "MONITOR_MAC_LOWER_TEMP",
+    "MONITOR_MAC_MAX_TEMP",
+    "MONITOR_FALL_TEMP",
+    "MONITOR_MAC_WARNING_THRESHOLD",
+    "MONITOR_OUTTEMP_WARNING_THRESHOLD",
+    "MONITOR_BOARDTEMP_WARNING_THRESHOLD",
+    "MONITOR_CPUTEMP_WARNING_THRESHOLD",
+    "MONITOR_INTEMP_WARNING_THRESHOLD",
+    "MONITOR_MAC_CRITICAL_THRESHOLD",
+    "MONITOR_OUTTEMP_CRITICAL_THRESHOLD",
+    "MONITOR_BOARDTEMP_CRITICAL_THRESHOLD",
+    "MONITOR_CPUTEMP_CRITICAL_THRESHOLD",
+    "MONITOR_INTEMP_CRITICAL_THRESHOLD",
+    "MONITOR_CRITICAL_NUM",
+    "MONITOR_SHAKE_TIME",
+    "MONITOR_INTERVAL",
+    "MONITOR_LED_INTERVAL",
+    "MONITOR_PID_FLAG",
+    "MONITOR_MAC_SOURCE_SYSFS",
+    "MONITOR_MAC_SOURCE_PATH",
+    "MONITOR_PID_MODULE",
+    "PSU_FAN_FOLLOW",
+    "MONITOR_SYS_LED",
+    "MONITOR_SYS_FAN_LED",
+    "MONITOR_FANS_LED",
+    "MONITOR_SYS_PSU_LED",
+    "MONITOR_FAN_STATUS",
+    "MONITOR_PSU_STATUS",
+    "MONITOR_DEV_STATUS",
+    "MONITOR_DEV_STATUS_DECODE",
+    "DEV_LEDS",
+    "fanloc"
+]
+
+# driver blacklist parameter
+BLACKLIST_DRIVERS = []
+
+# driver list parameter
+DRIVERLISTS = []
+
+# device list parameter
+DEVICE = []
+
+# start module parameters
+STARTMODULE = {}
+
+# mac led reset parameter
+MAC_LED_RESET = {}
+
+# avscontrol parameter
+MAC_DEFAULT_PARAM = []
+
+# dev_monitor parameter
+DEV_MONITOR_PARAM = {}
+
+# slot_monitor parameter
+SLOT_MONITOR_PARAM = {}
+
+# platform_manufacturer parameter
+MANUINFO_CONF = {}
+
+# reboot_ctrl parameter
+REBOOT_CTRL_PARAM = {}
+
+# pmon_syslog parameter
+PMON_SYSLOG_STATUS = {}
+
+# sfp optoe device parameter
+OPTOE = []
+
+# reboot_cause parameter
+REBOOT_CAUSE_PARA = []
+
+# upgrade parameter
+UPGRADE_SUMMARY = {}
+
+# warm_uprade parameter
+WARM_UPGRADE_PARAM = {}
+WARM_UPG_FLAG = "/etc/sonic/.warm_upg_flag"
+WARM_UPGRADE_STARTED_FLAG = "/etc/sonic/.doing_warm_upg"
+
+# platform_e2 parameter
+PLATFORM_E2_CONF = {}
+
+# generate_airflow parameter
+AIR_FLOW_CONF = {}
+AIRFLOW_RESULT_FILE = "/etc/sonic/.airflow"
+
+# Initialization parameters
+INIT_PARAM_PRE = []
+INIT_COMMAND_PRE = []
+INIT_PARAM = []
+INIT_COMMAND = []
+
+################################ fancontrol parameter###################################
+MONITOR_TEMP_MIN = 38
+MONITOR_K = 11
+MONITOR_MAC_IN = 35
+MONITOR_DEFAULT_SPEED = 0x60
+MONITOR_MAX_SPEED = 0xFF
+MONITOR_MIN_SPEED = 0x60
+MONITOR_MAC_ERROR_SPEED = 0XBB
+MONITOR_FAN_TOTAL_NUM = 4
+MONITOR_MAC_UP_TEMP = 50
+MONITOR_MAC_LOWER_TEMP = -50
+MONITOR_MAC_MAX_TEMP = 100   #
+
+MONITOR_FALL_TEMP = 4
+MONITOR_MAC_WARNING_THRESHOLD = 100
+MONITOR_OUTTEMP_WARNING_THRESHOLD = 85
+MONITOR_BOARDTEMP_WARNING_THRESHOLD = 85
+MONITOR_CPUTEMP_WARNING_THRESHOLD = 85
+MONITOR_INTEMP_WARNING_THRESHOLD = 70
+
+MONITOR_MAC_CRITICAL_THRESHOLD = 105
+MONITOR_OUTTEMP_CRITICAL_THRESHOLD = 90
+MONITOR_BOARDTEMP_CRITICAL_THRESHOLD = 90
+MONITOR_CPUTEMP_CRITICAL_THRESHOLD = 100
+MONITOR_INTEMP_CRITICAL_THRESHOLD = 80
+MONITOR_CRITICAL_NUM = 3
+MONITOR_SHAKE_TIME = 20
+MONITOR_INTERVAL = 60
+MONITOR_LED_INTERVAL = 2
+MONITOR_PID_FLAG = 0
+
+MONITOR_MAC_SOURCE_SYSFS = 0
+MONITOR_MAC_SOURCE_PATH = None
+
+MONITOR_PID_MODULE = {}
+
+PSU_FAN_FOLLOW = {}
+
+MONITOR_SYS_LED = []
+MONITOR_SYS_FAN_LED = []
+MONITOR_FANS_LED = []
+MONITOR_SYS_PSU_LED = []
+MONITOR_FAN_STATUS = []
+MONITOR_PSU_STATUS = []
+MONITOR_DEV_STATUS = {}
+MONITOR_DEV_STATUS_DECODE = {}
+DEV_LEDS = {}
+fanloc = []
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py
new file mode 100755
index 000000000000..004a64c72233
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py
@@ -0,0 +1,184 @@
+#!/usr/bin/python3
+
+import sys
+import os
+from wbutil.baseutil import get_machine_info
+from wbutil.baseutil import get_platform_info
+from wbutil.baseutil import get_board_id
+
+__all__ = [
+    "MAILBOX_DIR",
+    "PLATFORM_GLOBALCONFIG",
+    "GLOBALCONFIG",
+    "STARTMODULE",
+    "MAC_LED_RESET",
+    "MAC_DEFAULT_PARAM",
+    "DEV_MONITOR_PARAM",
+    "SLOT_MONITOR_PARAM",
+    "MANUINFO_CONF",
+    "REBOOT_CTRL_PARAM",
+    "PMON_SYSLOG_STATUS",
+    "REBOOT_CAUSE_PARA",
+    "UPGRADE_SUMMARY",
+    "WARM_UPGRADE_PARAM",
+    "WARM_UPG_FLAG",
+    "WARM_UPGRADE_STARTED_FLAG",
+    "PLATFORM_E2_CONF",
+    "AIR_FLOW_CONF",
+    "AIRFLOW_RESULT_FILE",
+    "GLOBALINITPARAM",
+    "GLOBALINITCOMMAND",
+    "GLOBALINITPARAM_PRE",
+    "GLOBALINITCOMMAND_PRE",
+    "MONITOR_CONST",
+    "PSU_FAN_FOLLOW",
+    "MONITOR_SYS_LED",
+    "MONITOR_FANS_LED",
+    "MONITOR_SYS_FAN_LED",
+    "MONITOR_SYS_PSU_LED",
+    "MONITOR_FAN_STATUS",
+    "MONITOR_PSU_STATUS",
+    "MONITOR_DEV_STATUS",
+    "MONITOR_DEV_STATUS_DECODE",
+    "DEV_LEDS",
+    "fanloc"
+]
+
+
+def getdeviceplatform():
+    x = get_platform_info(get_machine_info())
+    if x is not None:
+        filepath = "/usr/share/sonic/device/" + x
+        return filepath
+    return None
+
+
+platform = get_platform_info(get_machine_info())
+board_id = get_board_id(get_machine_info())
+platformpath = getdeviceplatform()
+MAILBOX_DIR = "/sys/bus/i2c/devices/"
+grtd_productfile = (platform + "_config").replace("-", "_")
+common_productfile = "platform_common"
+platform_configfile = (platform + "_" + board_id + "_config").replace("-", "_")  # platfrom + board_id
+configfile_pre = "/usr/local/bin/"
+sys.path.append(platformpath)
+sys.path.append(configfile_pre)
+
+############################################################################################
+if os.path.exists(configfile_pre + platform_configfile + ".py"):
+    module_product = __import__(platform_configfile, globals(), locals(), [], 0)
+elif os.path.exists(configfile_pre + grtd_productfile + ".py"):
+    module_product = __import__(grtd_productfile, globals(), locals(), [], 0)
+elif os.path.exists(configfile_pre + common_productfile + ".py"):
+    module_product = __import__(common_productfile, globals(), locals(), [], 0)
+else:
+    print("config file not exist")
+    sys.exit(-1)
+############################################################################################
+
+PLATFORM_GLOBALCONFIG = {
+    "DRIVERLISTS": module_product.DRIVERLISTS,
+    "OPTOE": module_product.OPTOE,
+    "DEVS": module_product.DEVICE,
+    "BLACKLIST_DRIVERS": module_product.BLACKLIST_DRIVERS
+}
+GLOBALCONFIG = PLATFORM_GLOBALCONFIG
+
+# start module parameters
+STARTMODULE = module_product.STARTMODULE
+
+# mac led reset parameter
+MAC_LED_RESET = module_product.MAC_LED_RESET
+
+# avscontrol parameter
+MAC_DEFAULT_PARAM = module_product.MAC_DEFAULT_PARAM
+
+# dev_monitor parameter
+DEV_MONITOR_PARAM = module_product.DEV_MONITOR_PARAM
+
+# slot_monitor parameter
+SLOT_MONITOR_PARAM = module_product.SLOT_MONITOR_PARAM
+
+# platform_manufacturer parameter
+MANUINFO_CONF = module_product.MANUINFO_CONF
+
+# reboot_ctrl parameter
+REBOOT_CTRL_PARAM = module_product.REBOOT_CTRL_PARAM
+
+# pmon_syslog parameter
+PMON_SYSLOG_STATUS = module_product.PMON_SYSLOG_STATUS
+
+# reboot_cause parameter
+REBOOT_CAUSE_PARA = module_product.REBOOT_CAUSE_PARA
+
+# upgrade parameter
+UPGRADE_SUMMARY = module_product.UPGRADE_SUMMARY
+
+# warm_uprade parameter
+WARM_UPGRADE_PARAM = module_product.WARM_UPGRADE_PARAM
+WARM_UPG_FLAG = module_product.WARM_UPG_FLAG
+WARM_UPGRADE_STARTED_FLAG = module_product.WARM_UPGRADE_STARTED_FLAG
+
+# platform_e2 parameter
+PLATFORM_E2_CONF = module_product.PLATFORM_E2_CONF
+
+# generate_airflow parameter
+AIR_FLOW_CONF = module_product.AIR_FLOW_CONF
+AIRFLOW_RESULT_FILE = module_product.AIRFLOW_RESULT_FILE
+
+# Initialization parameters
+GLOBALINITPARAM = module_product.INIT_PARAM
+GLOBALINITCOMMAND = module_product.INIT_COMMAND
+GLOBALINITPARAM_PRE = module_product.INIT_PARAM_PRE
+GLOBALINITCOMMAND_PRE = module_product.INIT_COMMAND_PRE
+
+################################ fancontrol parameter###################################
+
+
+class MONITOR_CONST:
+    TEMP_MIN = module_product.MONITOR_TEMP_MIN
+    K = module_product.MONITOR_K
+    MAC_IN = module_product.MONITOR_MAC_IN
+    DEFAULT_SPEED = module_product.MONITOR_DEFAULT_SPEED
+    MAX_SPEED = module_product.MONITOR_MAX_SPEED
+    MIN_SPEED = module_product.MONITOR_MIN_SPEED
+    MAC_ERROR_SPEED = module_product.MONITOR_MAC_ERROR_SPEED
+    FAN_TOTAL_NUM = module_product.MONITOR_FAN_TOTAL_NUM
+    MAC_UP_TEMP = module_product.MONITOR_MAC_UP_TEMP
+    MAC_LOWER_TEMP = module_product.MONITOR_MAC_LOWER_TEMP
+    MAC_MAX_TEMP = module_product.MONITOR_MAC_MAX_TEMP
+
+    MAC_WARNING_THRESHOLD = module_product.MONITOR_MAC_WARNING_THRESHOLD
+    OUTTEMP_WARNING_THRESHOLD = module_product.MONITOR_OUTTEMP_WARNING_THRESHOLD
+    BOARDTEMP_WARNING_THRESHOLD = module_product.MONITOR_BOARDTEMP_WARNING_THRESHOLD
+    CPUTEMP_WARNING_THRESHOLD = module_product.MONITOR_CPUTEMP_WARNING_THRESHOLD
+    INTEMP_WARNING_THRESHOLD = module_product.MONITOR_INTEMP_WARNING_THRESHOLD
+
+    MAC_CRITICAL_THRESHOLD = module_product.MONITOR_MAC_CRITICAL_THRESHOLD
+    OUTTEMP_CRITICAL_THRESHOLD = module_product.MONITOR_OUTTEMP_CRITICAL_THRESHOLD
+    BOARDTEMP_CRITICAL_THRESHOLD = module_product.MONITOR_BOARDTEMP_CRITICAL_THRESHOLD
+    CPUTEMP_CRITICAL_THRESHOLD = module_product.MONITOR_CPUTEMP_CRITICAL_THRESHOLD
+    INTEMP_CRITICAL_THRESHOLD = module_product.MONITOR_INTEMP_CRITICAL_THRESHOLD
+    CRITICAL_NUM = module_product.MONITOR_CRITICAL_NUM
+    SHAKE_TIME = module_product.MONITOR_SHAKE_TIME
+    MONITOR_INTERVAL = module_product.MONITOR_INTERVAL
+    MONITOR_LED_INTERVAL = module_product.MONITOR_LED_INTERVAL
+    MONITOR_FALL_TEMP = module_product.MONITOR_FALL_TEMP
+    MONITOR_PID_FLAG = module_product.MONITOR_PID_FLAG
+    MONITOR_PID_MODULE = module_product.MONITOR_PID_MODULE
+
+    MONITOR_MAC_SOURCE_SYSFS = module_product.MONITOR_MAC_SOURCE_SYSFS
+    MONITOR_MAC_SOURCE_PATH = module_product.MONITOR_MAC_SOURCE_PATH
+
+
+PSU_FAN_FOLLOW = module_product.PSU_FAN_FOLLOW
+MONITOR_SYS_LED = module_product.MONITOR_SYS_LED
+MONITOR_FANS_LED = module_product.MONITOR_FANS_LED
+MONITOR_SYS_FAN_LED = module_product.MONITOR_SYS_FAN_LED
+MONITOR_SYS_PSU_LED = module_product.MONITOR_SYS_PSU_LED
+MONITOR_FAN_STATUS = module_product.MONITOR_FAN_STATUS
+MONITOR_PSU_STATUS = module_product.MONITOR_PSU_STATUS
+MONITOR_DEV_STATUS = module_product.MONITOR_DEV_STATUS
+MONITOR_DEV_STATUS_DECODE = module_product.MONITOR_DEV_STATUS_DECODE
+DEV_LEDS = module_product.DEV_LEDS
+fanloc = module_product.fanloc
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_driver.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_driver.py
new file mode 100755
index 000000000000..6d2c6de653d9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_driver.py
@@ -0,0 +1,258 @@
+#!/usr/bin/env python3
+import os
+import subprocess
+import time
+import click
+from platform_config import GLOBALCONFIG, WARM_UPGRADE_STARTED_FLAG, WARM_UPG_FLAG
+
+
+CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+
+
+class AliasedGroup(click.Group):
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        if len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+        return None
+
+
+def log_os_system(cmd):
+    status, output = subprocess.getstatusoutput(cmd)
+    if status:
+        print(output)
+    return status, output
+
+
+def platform_process_file_check():
+    # WARM_UPGRADE_STARTED_FLAG is used as warm_upgrade.py process start flag
+    if os.path.exists(WARM_UPGRADE_STARTED_FLAG):
+        os.remove(WARM_UPGRADE_STARTED_FLAG)
+
+    # WARM_UPG_FLAG is used as port related service judgment flag
+    if os.path.exists(WARM_UPG_FLAG):
+        os.remove(WARM_UPG_FLAG)
+
+
+def startCommon_operation():
+    platform_process_file_check()
+
+
+def check_driver():
+    status, output = log_os_system("lsmod | grep wb | wc -l")
+    if status:
+        return False
+    if output.isdigit() and int(output) > 0:
+        return True
+    return False
+
+
+def removeDev(bus, loc):
+    cmd = "echo  0x%02x > /sys/bus/i2c/devices/i2c-%d/delete_device" % (loc, bus)
+    devpath = "/sys/bus/i2c/devices/%d-%04x" % (bus, loc)
+    if os.path.exists(devpath):
+        log_os_system(cmd)
+
+
+def addDev(name, bus, loc):
+    if name == "lm75":
+        time.sleep(0.1)
+    pdevpath = "/sys/bus/i2c/devices/i2c-%d/" % (bus)
+    for i in range(1, 100):
+        if os.path.exists(pdevpath) is True:
+            break
+        time.sleep(0.1)
+        if i % 10 == 0:
+            click.echo("%%WB_PLATFORM_DRIVER-INIT: %s not found, wait 0.1 second ! i %d " % (pdevpath, i))
+
+    cmd = "echo  %s 0x%02x > /sys/bus/i2c/devices/i2c-%d/new_device" % (name, loc, bus)
+    devpath = "/sys/bus/i2c/devices/%d-%04x" % (bus, loc)
+    if os.path.exists(devpath) is False:
+        os.system(cmd)
+
+
+def removeOPTOE(startbus, endbus):
+    for bus in range(endbus, startbus - 1, -1):
+        removeDev(bus, 0x50)
+
+
+def addOPTOE(name, startbus, endbus):
+    for bus in range(startbus, endbus + 1):
+        addDev(name, bus, 0x50)
+
+
+def removeoptoes():
+    optoes = GLOBALCONFIG["OPTOE"]
+    for index in range(len(optoes) - 1, -1, -1):
+        removeOPTOE(optoes[index]["startbus"], optoes[index]["endbus"])
+
+
+def addoptoes():
+    optoes = GLOBALCONFIG["OPTOE"]
+    for optoe in optoes:
+        addOPTOE(optoe["name"], optoe["startbus"], optoe["endbus"])
+
+
+def removedevs():
+    devs = GLOBALCONFIG["DEVS"]
+    for index in range(len(devs) - 1, -1, -1):
+        removeDev(devs[index]["bus"], devs[index]["loc"])
+
+
+def adddevs():
+    devs = GLOBALCONFIG["DEVS"]
+    for dev in devs:
+        addDev(dev["name"], dev["bus"], dev["loc"])
+
+
+def checksignaldriver(name):
+    modisexistcmd = "lsmod | grep -w %s | wc -l" % name
+    status, output = log_os_system(modisexistcmd)
+    if status:
+        return False
+    if output.isdigit() and int(output) > 0:
+        return True
+    return False
+
+
+def adddriver(name, delay):
+    cmd = "modprobe %s" % name
+    if delay != 0:
+        time.sleep(delay)
+    if checksignaldriver(name) is not True:
+        log_os_system(cmd)
+
+
+def removedriver(name, delay, removeable=1):
+    realname = name.lstrip().split(" ")[0]
+    cmd = "rmmod -f %s" % realname
+    if checksignaldriver(realname) and removeable:
+        log_os_system(cmd)
+    if delay > 0:
+        time.sleep(delay)
+
+
+def removedrivers():
+    if GLOBALCONFIG is None:
+        click.echo("%%WB_PLATFORM_DRIVER-INIT: load global config failed.")
+        return
+    drivers = GLOBALCONFIG.get("DRIVERLISTS", None)
+    if drivers is None:
+        click.echo("%%WB_PLATFORM_DRIVER-INIT: load driver list failed.")
+        return
+    for index in range(len(drivers) - 1, -1, -1):
+        delay = 0
+        name = ""
+        removeable = drivers[index].get("removable", 1)
+        if isinstance(drivers[index], dict) and "delay" in drivers[index]:
+            name = drivers[index].get("name")
+            delay = drivers[index]["delay"]
+        else:
+            name = drivers[index]
+        removedriver(name, delay, removeable)
+
+
+def adddrivers():
+    if GLOBALCONFIG is None:
+        click.echo("%%WB_PLATFORM_DRIVER-INIT: load global config failed.")
+        return
+    drivers = GLOBALCONFIG.get("DRIVERLISTS", None)
+    if drivers is None:
+        click.echo("%%WB_PLATFORM_DRIVER-INIT: load driver list failed.")
+        return
+    for driver in drivers:
+        delay = 0
+        name = ""
+        if isinstance(driver, dict) and "delay" in driver:
+            name = driver.get("name")
+            delay = driver["delay"]
+        else:
+            name = driver
+        adddriver(name, delay)
+
+
+def blacklist_driver_remove():
+    if GLOBALCONFIG is None:
+        click.echo("%%WB_PLATFORM_DRIVER-INIT: load global config failed.")
+        return
+    blacklist_drivers = GLOBALCONFIG.get("BLACKLIST_DRIVERS", [])
+    for driver in blacklist_drivers:
+        delay = 0
+        name = ""
+        if isinstance(driver, dict) and "delay" in driver:
+            name = driver.get("name")
+            delay = driver["delay"]
+        else:
+            name = driver
+        removedriver(name, delay)
+
+
+def unload_driver():
+    removeoptoes()
+    removedevs()
+    removedrivers()
+
+
+def reload_driver():
+    removedevs()
+    removedrivers()
+    time.sleep(1)
+    adddrivers()
+    adddevs()
+
+
+def i2c_check(bus, retrytime=6):
+    try:
+        i2cpath = "/sys/bus/i2c/devices/" + bus
+        while retrytime and not os.path.exists(i2cpath):
+            click.echo("%%WB_PLATFORM_DRIVER-HA: i2c bus abnormal, last bus %s is not exist." % i2cpath)
+            reload_driver()
+            retrytime -= 1
+            time.sleep(1)
+    except Exception as e:
+        click.echo("%%WB_PLATFORM_DRIVER-HA: %s" % str(e))
+
+
+def load_driver():
+    startCommon_operation()
+    adddrivers()
+    adddevs()
+    addoptoes()
+
+
+@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
+def main():
+    '''device operator'''
+
+
+@main.command()
+def start():
+    '''load drivers and device '''
+    blacklist_driver_remove()
+    if check_driver():
+        unload_driver()
+    load_driver()
+
+
+@main.command()
+def stop():
+    '''stop drivers device '''
+    unload_driver()
+
+
+@main.command()
+def restart():
+    '''restart drivers and device'''
+    unload_driver()
+    load_driver()
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py
new file mode 100755
index 000000000000..808d93216210
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py
@@ -0,0 +1,434 @@
+#!/usr/bin/env python3
+# -*- coding: UTF-8 -*-
+import click
+
+from eepromutil.fru import ipmifru
+from eepromutil.fantlv import fan_tlv
+import eepromutil.onietlv as ot
+from platform_config import PLATFORM_E2_CONF
+from platform_util import byteTostr, dev_file_read
+
+CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+
+
+class AliasedGroup(click.Group):
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        if len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+        return None
+
+
+class ExtraFunc(object):
+    @staticmethod
+    def decode_mac(encodedata):
+        if encodedata is None:
+            return None
+        ret = ":".join("%02x" % ord(data) for data in encodedata)
+        return ret.upper()
+
+    @staticmethod
+    def decode_mac_number(encodedata):
+        if encodedata is None:
+            return None
+        return (ord(encodedata[0]) << 8) | (ord(encodedata[1]) & 0x00ff)
+
+    @staticmethod
+    @staticmethod
+    def fru_decode_mac_number(params):
+        ipmi_fru = params.get("fru")
+        area = params.get("area")
+        field = params.get("field")
+        area_info = getattr(ipmi_fru, area, None)
+        if area_info is not None:
+            raw_mac_number = getattr(area_info, field, None)
+            mac_number = decode_mac_number(raw_mac_number)
+            ipmi_fru.setValue(area, field, mac_number)
+
+    @staticmethod
+    def fru_decode_mac(params):
+        ipmi_fru = params.get("fru")
+        area = params.get("area")
+        field = params.get("field")
+        area_info = getattr(ipmi_fru, area, None)
+        if area_info is not None:
+            raw_mac = getattr(area_info, field, None)
+            decoded_mac = decode_mac(raw_mac)
+            ipmi_fru.setValue(area, field, decoded_mac)
+
+    @staticmethod
+    def fru_decode_hw(params):
+        ipmi_fru = params.get("fru")
+        area = params.get("area")
+        field = params.get("field")
+        area_info = getattr(ipmi_fru, area, None)
+        if area_info is not None:
+            raw_hw = getattr(area_info, field, None)
+            decode_hw = str(int(raw_hw, 16))
+            ipmi_fru.setValue(area, field, decode_hw)
+
+
+def set_onie_value(params):
+    onie = params.get("onie")
+    field = params.get("field")
+    config_value = params.get("config_value")
+    for index, onie_item in enumerate(onie):
+        if onie_item.get("name") == field:
+            if "value" in onie_item.keys():
+                onie[index]["value"] = config_value
+
+
+def onie_eeprom_decode(onie, e2_decode):
+    for e2_decode_item in e2_decode:
+        field = e2_decode_item.get("field")
+        decode_type = e2_decode_item.get("decode_type")
+        if decode_type == 'func':
+            params = {
+                "onie": onie,
+                "field": field
+            }
+            func_name = e2_decode_item.get("func_name")
+            if func_name is not None:
+                run_func(func_name, params)
+        elif decode_type == 'config':
+            config_value = e2_decode_item.get("config_value")
+            if config_value is not None:
+                params = {
+                    "onie": onie,
+                    "field": field,
+                    "config_value": config_value
+                }
+                set_onie_value(params)
+        else:
+            print("unsupport decode type")
+            continue
+
+
+def onie_eeprom_show(eeprom, e2_decode=None):
+    try:
+        onietlv = ot.onie_tlv()
+        rets = onietlv.decode(eeprom)
+        if e2_decode is not None:
+            onie_eeprom_decode(rets, e2_decode)
+        print("%-20s %-5s %-5s  %-20s" % ("TLV name", "Code", "lens", "Value"))
+        for item in rets:
+            if item["code"] == 0xfd:
+                print("%-20s 0x%-02X   %-5s" % (item["name"], item["code"], item["lens"]))
+            else:
+                print("%-20s 0x%-02X   %-5s %-20s" % (item["name"], item["code"], item["lens"], item["value"]))
+    except Exception as e:
+        print(str(e))
+
+
+def set_fantlv_value(params):
+    fantlv_dict = params.get("fantlv")
+    field = params.get("field")
+    config_value = params.get("config_value")
+    for index, fantlv_item in enumerate(fantlv_dict):
+        if fantlv_item.get("name") == field:
+            if "value" in fantlv_item.keys():
+                fantlv_dict[index]["value"] = config_value
+
+
+def fantlv_eeprom_decode(fantlv_dict, e2_decode):
+    for e2_decode_item in e2_decode:
+        field = e2_decode_item.get("field")
+        decode_type = e2_decode_item.get("decode_type")
+        if decode_type == 'func':
+            params = {
+                "fantlv": fantlv_dict,
+                "field": field
+            }
+            func_name = e2_decode_item.get("func_name")
+            if func_name is not None:
+                run_func(func_name, params)
+        elif decode_type == 'config':
+            config_value = e2_decode_item.get("config_value")
+            if config_value is not None:
+                params = {
+                    "fantlv": fantlv_dict,
+                    "field": field,
+                    "config_value": config_value
+                }
+                set_fantlv_value(params)
+        else:
+            print("unsupport decode type")
+            continue
+
+
+def fantlv_eeprom_show(eeprom, e2_decode=None):
+    try:
+        tlv = fan_tlv()
+        rets = tlv.decode(eeprom)
+        if len(rets) == 0:
+            print("fan tlv eeprom info error.!")
+            return
+        if e2_decode is not None:
+            fantlv_eeprom_decode(rets, e2_decode)
+        print("%-15s %-5s %-5s  %-20s" % ("TLV name", "Code", "lens", "Value"))
+        for item in rets:
+            print("%-15s 0x%-02X   %-5s %-20s" % (item["name"], item["code"], item["lens"], item["value"]))
+    except Exception as e:
+        print(str(e))
+    return
+
+
+def run_func(funcname, params):
+    try:
+        func = getattr(ExtraFunc, funcname)
+        func(params)
+    except Exception as e:
+        print(str(e))
+
+def set_fru_value(params):
+    ipmi_fru = params.get("fru")
+    area = params.get("area")
+    field = params.get("field")
+    config_value = params.get("config_value")
+    ipmi_fru.setValue(area, field, config_value)
+
+
+def fru_eeprom_decode(ipmi_fru, e2_decode):
+    for e2_decode_item in e2_decode:
+        area = e2_decode_item.get("area")
+        field = e2_decode_item.get("field")
+        decode_type = e2_decode_item.get("decode_type")
+        if decode_type == 'func':
+            params = {
+                "fru": ipmi_fru,
+                "area": area,
+                "field": field
+            }
+            func_name = e2_decode_item.get("func_name")
+            if func_name is not None:
+                run_func(func_name, params)
+        elif decode_type == 'config':
+            config_value = e2_decode_item.get("config_value")
+            if config_value is not None:
+                params = {
+                    "fru": ipmi_fru,
+                    "area": area,
+                    "field": field,
+                    "config_value": config_value
+                }
+                set_fru_value(params)
+        else:
+            print("unsupport decode type")
+            continue
+
+
+def fru_eeprom_show(eeprom, e2_decode=None):
+    try:
+        ipmi_fru = ipmifru()
+        ipmi_fru.decodeBin(eeprom)
+        if e2_decode is not None:
+            fru_eeprom_decode(ipmi_fru, e2_decode)
+        print("=================board=================")
+        print(ipmi_fru.boardInfoArea)
+        print("=================product=================")
+        print(ipmi_fru.productInfoArea)
+    except Exception as e:
+        print(str(e))
+
+
+def eeprom_parase(eeprom_conf):
+    name = eeprom_conf.get("name")
+    e2_type = eeprom_conf.get("e2_type")
+    e2_path = eeprom_conf.get("e2_path")
+    e2_size = eeprom_conf.get("e2_size", 256)
+    e2_decode = eeprom_conf.get("e2_decode")
+    print("===================%s===================" % name)
+    ret, binval_bytes = dev_file_read(e2_path, 0, e2_size)
+    if ret is False:
+        print("eeprom read error, eeprom path: %s, msg: %s" % (e2_path, binval_bytes))
+        return
+    binval = byteTostr(binval_bytes)
+    if e2_type == "onie_tlv":
+        onie_eeprom_show(binval, e2_decode)
+    elif e2_type == "fru":
+        fru_eeprom_show(binval, e2_decode)
+    elif e2_type == "fantlv":
+        fantlv_eeprom_show(binval, e2_decode)
+    else:
+        print("Unknow eeprom type: %s" % e2_type)
+    return
+
+
+def get_fans_eeprom_info(param):
+    fan_eeprom_conf = PLATFORM_E2_CONF.get("fan", [])
+    fan_num = len(fan_eeprom_conf)
+    if fan_num == 0:
+        print("fan number is 0, can't get fan eeprom info")
+        return
+    if param == 'all':
+        for conf in fan_eeprom_conf:
+            eeprom_parase(conf)
+        return
+    if not param.isdigit():
+        print("param error, %s is not digital or 'all'" % param)
+        return
+    fan_index = int(param, 10) - 1
+    if fan_index < 0 or fan_index >= fan_num:
+        print("param error, total fan number: %d, fan index: %d" % (fan_num, fan_index + 1))
+        return
+    eeprom_parase(fan_eeprom_conf[fan_index])
+    return
+
+
+def get_psus_eeprom_info(param):
+    psu_eeprom_conf = PLATFORM_E2_CONF.get("psu", [])
+    psu_num = len(psu_eeprom_conf)
+    if psu_num == 0:
+        print("psu number is 0, can't get psu eeprom info")
+        return
+    if param == 'all':
+        for conf in psu_eeprom_conf:
+            eeprom_parase(conf)
+        return
+    if not param.isdigit():
+        print("param error, %s is not digital or 'all'" % param)
+        return
+    psu_index = int(param, 10) - 1
+    if psu_index < 0 or psu_index >= psu_num:
+        print("param error, total psu number: %d, psu index: %d" % (psu_num, psu_index + 1))
+        return
+    eeprom_parase(psu_eeprom_conf[psu_index])
+    return
+
+
+def get_slots_eeprom_info(param):
+    slot_eeprom_conf = PLATFORM_E2_CONF.get("slot", [])
+    slot_num = len(slot_eeprom_conf)
+    if slot_num == 0:
+        print("slot number is 0, can't get slot eeprom info")
+        return
+    if param == 'all':
+        for conf in slot_eeprom_conf:
+            eeprom_parase(conf)
+        return
+    if not param.isdigit():
+        print("param error, %s is not digital or 'all'" % param)
+        return
+    slot_index = int(param, 10) - 1
+    if slot_index < 0 or slot_index >= slot_num:
+        print("param error, total slot number: %d, slot index: %d" % (slot_num, slot_index + 1))
+        return
+    eeprom_parase(slot_eeprom_conf[slot_index])
+    return
+
+
+def get_syseeprom_info(param):
+    syseeprom_conf = PLATFORM_E2_CONF.get("syseeprom", [])
+    syseeprom_num = len(syseeprom_conf)
+    if syseeprom_num == 0:
+        print("syseeprom number is 0, can't get syseeprom info")
+        return
+    if param == 'all':
+        for conf in syseeprom_conf:
+            eeprom_parase(conf)
+        return
+    if not param.isdigit():
+        print("param error, %s is not digital or 'all'" % param)
+        return
+    syseeprom_index = int(param, 10) - 1
+    if syseeprom_index < 0 or syseeprom_index >= syseeprom_num:
+        print("param error, total syseeprom number: %d, syseeprom index: %d" % (syseeprom_num, syseeprom_index + 1))
+        return
+    eeprom_parase(syseeprom_conf[syseeprom_index])
+    return
+
+
+def decode_eeprom_info(e2_type, e2_path, e2_size):
+    if not e2_size.isdigit():
+        print("param error, e2_size %s is not digital" % e2_size)
+        return
+    e2_size = int(e2_size, 10)
+    eeprom_conf = {}
+    eeprom_conf["name"] = e2_type
+    eeprom_conf["e2_type"] = e2_type
+    eeprom_conf["e2_path"] = e2_path
+    eeprom_conf["e2_size"] = e2_size
+    eeprom_parase(eeprom_conf)
+    return
+
+
+@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
+def main():
+    '''platform eeprom display script'''
+
+# fan eeprom info display
+
+
+@main.command()
+@click.argument('fan_index', required=True)
+def fan(fan_index):
+    '''fan_index(1, 2, 3...)/all'''
+    get_fans_eeprom_info(fan_index)
+
+# psu eeprom info display
+
+
+@main.command()
+@click.argument('psu_index', required=True)
+def psu(psu_index):
+    '''psu_index(1, 2, 3...)/all'''
+    get_psus_eeprom_info(psu_index)
+
+# slot eeprom info display
+
+
+@main.command()
+@click.argument('slot_index', required=True)
+def slot(slot_index):
+    '''slot_index(1, 2, 3...)/all'''
+    get_slots_eeprom_info(slot_index)
+
+# syseeprom info display
+
+
+@main.command()
+@click.argument('syseeprom_index', required=True)
+def syseeprom(syseeprom_index):
+    '''syseeprom_index(1, 2, 3...)/all'''
+    get_syseeprom_info(syseeprom_index)
+
+# fru eeprom info decode
+
+
+@main.command()
+@click.argument('e2_path', required=True)
+@click.argument('e2_size', required=False, default="256")
+def fru(e2_path, e2_size):
+    '''e2_path'''
+    decode_eeprom_info("fru", e2_path, e2_size)
+
+# fantlv eeprom info decode
+
+
+@main.command()
+@click.argument('e2_path', required=True)
+@click.argument('e2_size', required=False, default="256")
+def fantlv(e2_path, e2_size):
+    '''e2_path'''
+    decode_eeprom_info("fantlv", e2_path, e2_size)
+
+# onie_tlv eeprom info decode
+
+
+@main.command()
+@click.argument('e2_path', required=True)
+@click.argument('e2_size', required=False, default="256")
+def onie_tlv(e2_path, e2_size):
+    '''e2_path'''
+    decode_eeprom_info("onie_tlv", e2_path, e2_size)
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_intf.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_intf.py
new file mode 100755
index 000000000000..2143b9420cd3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_intf.py
@@ -0,0 +1,367 @@
+#!/usr/bin/env python3
+import os
+import syslog
+import importlib.machinery
+from platform_util import getplatform_name, dev_file_read, dev_file_write, write_sysfs, read_sysfs
+
+__all__ = [
+    "platform_reg_read",
+    "platform_reg_write",
+    "platform_set_optoe_type",
+    "platform_get_optoe_type",
+    "platform_sfp_read",
+    "platform_sfp_write",
+]
+
+CPLD = 0
+FPGA = 1
+CPLD_PATH = "/dev/cpld%d"
+FPGA_PATH = "/dev/fpga%d"
+
+
+OPTOE_PATH = "/sys/bus/i2c/devices/%d-0050/"
+OPTOE_DEV_CLASS = "dev_class"
+OPTOE_EEPROM = "eeprom"
+
+
+PLATFORM_INTF_DEBUG_FILE = "/etc/.platform_intf_debug_flag"
+
+
+CONFIG_FILE_LIST = [
+    "/usr/local/bin/",
+    "/usr/local/lib/python3/dist-packages/config/",
+    "/usr/local/lib/python3.7/dist-packages/config/",
+    "/usr/local/lib/python3.9/dist-packages/config/"]
+
+
+def platform_intf_debug(s):
+    if os.path.exists(PLATFORM_INTF_DEBUG_FILE):
+        syslog.openlog("PLATFORM_INTF_DEBUG", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def platform_intf_error(s):
+    if os.path.exists(PLATFORM_INTF_DEBUG_FILE):
+        syslog.openlog("PLATFORM_INTF_ERROR", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+class IntfPlatform:
+    CONFIG_NAME = 'PLATFORM_INTF_OPTOE'
+    __port_optoe_dict = {}
+
+    def __init__(self):
+        real_path = None
+        platform_name = (getplatform_name()).replace("-", "_")
+        for configfile_path in CONFIG_FILE_LIST:
+            configfile = configfile_path + platform_name + "_port_config.py"
+            if os.path.exists(configfile):
+                real_path = configfile
+                break
+        if real_path is None:
+            raise Exception("get port config error")
+        config = importlib.machinery.SourceFileLoader(self.CONFIG_NAME, real_path).load_module()
+        self.__port_optoe_dict = config.PLATFORM_INTF_OPTOE
+
+    def get_dev_path(self, dev_type, dev_id):
+        if dev_type == CPLD:
+            path = CPLD_PATH % dev_id
+        elif dev_type == FPGA:
+            path = FPGA_PATH % dev_id
+        else:
+            msg = "dev_type error!"
+            return False, msg
+        platform_intf_debug("path:%s" % path)
+        return True, path
+
+    def get_port_path(self, port):
+        port_num = self.__port_optoe_dict.get("port_num", 0)
+        optoe_start_bus = self.__port_optoe_dict.get("optoe_start_bus", 0)
+        if port_num <= 0 or optoe_start_bus <= 0:
+            msg = "PLATFORM_INTF_OPTOE config error!"
+            return False, msg
+        if port <= 0 or port > port_num:
+            msg = "port out of range !"
+            return False, msg
+        path = OPTOE_PATH % (port + optoe_start_bus - 1)
+        platform_intf_debug("path:%s" % path)
+        return True, path
+
+    ###########################################
+    # reg_read - read logic device register
+    # @dev_type: 0: CPLD, 1: FPGA
+    # @dev_id: device ID, start from 0
+    # @offset: register offset
+    # @size: read length
+    # return:
+    # @ret: True if read success, False if not
+    # @info: The read value list if read success, otherwise the detail error message
+    ###########################################
+    def reg_read(self, dev_type, dev_id, offset, size):
+        ret, path = self.get_dev_path(dev_type, dev_id)
+        if ret is False:
+            return False, path
+        ret, info = dev_file_read(path, offset, size)
+        return ret, info
+
+    ###########################################
+    # platform_reg_write - write logic device register
+    # @dev_type: 0: CPLD, 1: FPGA
+    # @dev_id: device ID, start from 0
+    # @offset: register offset
+    # @val_list: The write value list
+    # return:
+    # @ret: True if write success, False if not
+    # @info: The write value length if write success, otherwise the detail error message
+    ###########################################
+    def reg_write(self, dev_type, dev_id, offset, val_list):
+        ret, path = self.get_dev_path(dev_type, dev_id)
+        if ret is False:
+            return False, path
+        ret, info = dev_file_write(path, offset, val_list)
+        return ret, info
+
+    ###########################################
+    # set_optoe_type - set port optoe type
+    # @port: port index start from 1
+    # @optoe_type: optoe type, including the following values
+    # 1: OPTOE1
+    # 2: OPTOE2
+    # 3: OPTOE3
+    # return:
+    # @ret: True if set optoe type success, False if not
+    # @info: None if set optoe type success, otherwise the detail error message
+    ###########################################
+    def set_optoe_type(self, port, optoe_type):
+        ret, path = self.get_port_path(port)
+        if ret is False:
+            return False, path
+        optoe_type_path = path + OPTOE_DEV_CLASS
+        ret, info = write_sysfs(optoe_type_path, "%d" % optoe_type)
+        if ret is False:
+            return False, info
+        return True, None
+
+    ###########################################
+    # get_optoe_type - get port optoe type
+    # @port: port index start from 1
+    # return:
+    # @ret: True if set optoe type success, False if not
+    # @info: Optoe type value if get optoe type success, otherwise the detail error message
+    # optoe type including the following values
+    # 1: OPTOE1
+    # 2: OPTOE2
+    # 3: OPTOE3
+    ###########################################
+    def get_optoe_type(self, port):
+        ret, path = self.get_port_path(port)
+        if ret is False:
+            return False, path
+        optoe_type_path = path + OPTOE_DEV_CLASS
+        ret, info = read_sysfs(optoe_type_path)
+        if ret is False:
+            return False, info
+        return True, int(info)
+
+    ###########################################
+    # sfp_read -read sfp eeprom
+    # @port_id: port index start from 1
+    # @offset: sfp eeprom offset
+    # @size: read sfp eeprom length
+    # return:
+    # @ret: True if read success, False if not
+    # @info: The read value list if read success, otherwise the detail error message
+    ###########################################
+    def sfp_read(self, port_id, offset, size):
+        ret, path = self.get_port_path(port_id)
+        if ret is False:
+            return False, path
+        optoe_eeprom_path = path + OPTOE_EEPROM
+        ret, info = dev_file_read(optoe_eeprom_path, offset, size)
+        return ret, info
+
+    ###########################################
+    # sfp_write -write sfp eeprom
+    # @port_id: port index start from 1
+    # @offset: sfp eeprom offset
+    # @val_list: The write value list
+    # return:
+    # @ret: True if read success, False if not
+    # @info: The write value length if write success, otherwise the detail error message
+    ###########################################
+    def sfp_write(self, port_id, offset, val_list):
+        ret, path = self.get_port_path(port_id)
+        if ret is False:
+            return False, path
+        optoe_eeprom_path = path + OPTOE_EEPROM
+        ret, info = dev_file_write(optoe_eeprom_path, offset, val_list)
+        return ret, info
+
+
+platform = IntfPlatform()
+
+
+###########################################
+# platform_reg_read - read logic device register
+# @dev_type: 0: CPLD, 1: FPGA
+# @dev_id: device ID, start from 0
+# @offset: register offset
+# @size: read length
+# return:
+# @ret: True if read success, False if not
+# @info: The read value list if read success, otherwise the detail error message
+###########################################
+def platform_reg_read(dev_type, dev_id, offset, size):
+    ret = False
+    info = None
+
+    # params check
+    if (isinstance(dev_type, int) is False or isinstance(dev_id, int) is False or
+            isinstance(offset, int) is False or isinstance(size, int) is False):
+        info = "params type check fail in platform_reg_read"
+        return ret, info
+    if dev_id < 0 or offset < 0 or size <= 0:
+        info = "params value check fail in platform_reg_read"
+        return ret, info
+    support_dev_type = (CPLD, FPGA)
+    if dev_type not in support_dev_type:
+        info = "dev_type match erro, fail in platform_reg_read"
+        return ret, info
+
+    # call the solve func
+    return platform.reg_read(dev_type, dev_id, offset, size)
+
+
+###########################################
+# platform_reg_write - write logic device register
+# @dev_type: 0: CPLD, 1: FPGA
+# @dev_id: device ID, start from 0
+# @offset: register offset
+# @val_list: The write value list
+# return:
+# @ret: True if write success, False if not
+# @info: The write value length if write success, otherwise the detail error message
+###########################################
+def platform_reg_write(dev_type, dev_id, offset, val_list):
+    ret = False
+    info = None
+
+    # params check
+    if (isinstance(dev_type, int) is False or isinstance(dev_id, int) is False or
+            isinstance(offset, int) is False or isinstance(val_list, list) is False):
+        info = "params type check fail in platform_reg_write"
+        return ret, info
+    if dev_id < 0 or offset < 0 or len(val_list) <= 0:
+        info = "params value check fail in platform_reg_write"
+        return ret, info
+    support_dev_type = (CPLD, FPGA)
+    if dev_type not in support_dev_type:
+        info = "dev_type match erro, fail in platform_reg_write"
+        return ret, info
+
+    # call the solve func
+    return platform.reg_write(dev_type, dev_id, offset, val_list)
+
+
+###########################################
+# platform_set_optoe_type - set port optoe type
+# @port: port index start from 1
+# @optoe_type: optoe type, including the following values
+# 1: OPTOE1
+# 2: OPTOE2
+# 3: OPTOE3
+# return:
+# @ret: True if set optoe type success, False if not
+# @info: None if set optoe type success, otherwise the detail error message
+###########################################
+def platform_set_optoe_type(port, optoe_type):
+    ret = False
+    info = None
+
+    # params check
+    if isinstance(port, int) is False or isinstance(optoe_type, int) is False:
+        info = "params type check fail in platform_set_optoe_type"
+        return ret, info
+    if port < 0 or optoe_type < 1 or optoe_type > 3:
+        info = "params value check fail in platform_set_optoe_type"
+        return ret, info
+
+    # call the solve func
+    return platform.set_optoe_type(port, optoe_type)
+
+
+###########################################
+# platform_get_optoe_type - get port optoe type
+# @port: port index start from 1
+# return:
+# @ret: True if set optoe type success, False if not
+# @info: Optoe type value if get optoe type success, otherwise the detail error message
+# optoe type including the following values
+# 1: OPTOE1
+# 2: OPTOE2
+# 3: OPTOE3
+###########################################
+def platform_get_optoe_type(port):
+    ret = False
+    info = None
+
+    # params check
+    if isinstance(port, int) is False:
+        info = "params type check fail in platform_get_optoe_type"
+        return ret, info
+    if port < 0:
+        info = "params value check fail in platform_get_optoe_type"
+        return ret, info
+
+    # call the solve func
+    return platform.get_optoe_type(port)
+
+
+###########################################
+# platform_sfp_read -read sfp eeprom
+# @port_id: port index start from 1
+# @offset: sfp eeprom offset
+# @size: read sfp eeprom length
+# return:
+# @ret: True if read success, False if not
+# @info: The read value list if read success, otherwise the detail error message
+###########################################
+def platform_sfp_read(port_id, offset, size):
+    ret = False
+    info = None
+
+    # params check
+    if isinstance(port_id, int) is False or isinstance(offset, int) is False or isinstance(size, int) is False:
+        info = "params type check fail in platform_sfp_read"
+        return ret, info
+    if port_id < 0 or offset < 0 or size <= 0:
+        info = "params value check fail in platform_sfp_read"
+        return ret, info
+
+    # call the solve func
+    return platform.sfp_read(port_id, offset, size)
+
+
+###########################################
+# platform_sfp_write -write sfp eeprom
+# @port_id: port index start from 1
+# @offset: sfp eeprom offset
+# @val_list: The write value list
+# return:
+# @ret: True if read success, False if not
+# @info: The write value length if write success, otherwise the detail error message
+###########################################
+def platform_sfp_write(port_id, offset, val_list):
+    ret = False
+    info = None
+
+    # params check
+    if isinstance(port_id, int) is False or isinstance(offset, int) is False or isinstance(val_list, list) is False:
+        info = "params type check fail in platform_sfp_write"
+        return ret, info
+    if port_id < 0 or offset < 0 or len(val_list) <= 0:
+        info = "params value check fail in platform_sfp_write"
+        return ret, info
+
+    # call the solve func
+    return platform.sfp_write(port_id, offset, val_list)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_ipmi.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_ipmi.py
new file mode 100755
index 000000000000..c9b72c99cca9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_ipmi.py
@@ -0,0 +1,92 @@
+#!/usr/bin/env python3
+# -*- coding: utf-8 -*-
+import sys
+import os
+import syslog
+import click
+from platform_util import exec_os_cmd
+
+
+IPMITOOL_CMD = "ipmitool raw 0x32 0x04"  # All products are the same command
+
+PLATFORM_IPMI_DEBUG_FILE = "/etc/.platform_ipmi_debug_flag"
+UPGRADEDEBUG = 1
+debuglevel = 0
+
+
+def debug_init():
+    global debuglevel
+    if os.path.exists(PLATFORM_IPMI_DEBUG_FILE):
+        debuglevel = debuglevel | UPGRADEDEBUG
+    else:
+        debuglevel = debuglevel & ~(UPGRADEDEBUG)
+
+
+def ipmidebuglog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    if UPGRADEDEBUG & debuglevel:
+        syslog.openlog("PLATFORM_IPMI", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def ipmierror(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("PLATFORM_IPMI", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_ERR, s)
+
+
+@click.command()
+@click.argument('cmd', required=True)
+def platform_ipmi_main(cmd):
+    '''Send command to BMC through ipmi'''
+    try:
+        # Convert string command to ASCII
+        user_cmd = ""
+        for ch in cmd:
+            user_cmd += " " + str(ord(ch))
+
+        final_cmd = IPMITOOL_CMD + user_cmd
+        ipmidebuglog("final cmd:%s" % final_cmd)
+
+        # exec ipmitool cmd
+        status, output = exec_os_cmd(final_cmd)
+        if status:
+            ipmierror("exec ipmitool_cmd:%s user_cmd:%s failed" % (IPMITOOL_CMD, cmd))
+            ipmierror("failed log: %s" % output)
+            return False, "exec final_cmd failed"
+
+        # the data read by ipmitool is hex value, needs transformation
+        data_list = output.replace("\n", "").strip(' ').split(' ')
+        ipmidebuglog("data_list: %s" % data_list)
+        result = ""
+        for data in data_list:
+            result += chr(int(data, 16))
+
+        # 'result' string include ret and log, separated by ,
+        result_list = result.split(',', 2)
+        if len(result_list) != 2:
+            log = "split failed. len(result) != 2. result:%s" % result
+            ipmierror(log)
+            return False, log
+        if int(result_list[0]) != 0:
+            ipmierror("finally analy ipmitool_cmd:%s user_cmd:%s exec failed" % (IPMITOOL_CMD, cmd))
+            ipmierror("failed return log: %s" % result_list[1])
+            print(result_list[1])
+            return False, result_list[1]
+
+        ipmidebuglog("finally exec ipmitool_cmd:%s user_cmd:%s success" % (IPMITOOL_CMD, cmd))
+        print(result_list[1])
+        return True, result_list[1]
+
+    except Exception as e:
+        log = "An exception occurred, exception log:%s" % str(e)
+        ipmierror(log)
+        return False, log
+
+
+if __name__ == '__main__':
+    debug_init()
+    ret, msg = platform_ipmi_main()
+    if ret is False:
+        sys.exit(1)
+    sys.exit(0)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_manufacturer.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_manufacturer.py
new file mode 100755
index 000000000000..b2643da9bce4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_manufacturer.py
@@ -0,0 +1,562 @@
+#!/usr/bin/env python3
+
+import re
+import mmap
+import fcntl
+import subprocess
+import shlex
+import signal
+import os
+import time
+import sys
+from platform_config import MANUINFO_CONF
+from monitor import status
+
+
+INDENT = 4
+
+
+def printerr(vchar):
+    sys.stderr.write(vchar + '\n')
+
+
+g_extra_cache = {}
+g_meminfo_cache = {}
+g_exphy_cache = {}
+
+
+def exec_os_cmd(cmd, timeout = None):
+    status, output = subprocess.getstatusoutput(cmd)
+    return status, output
+
+
+def exphyfwsplit():
+    # improve performance
+    global g_exphy_cache
+    if g_exphy_cache:
+        return
+    cmd = "bcmcmd -t 1 \"phy control xe,ce fw_get\" |grep fw_version"
+    ret, output = exec_os_cmd(cmd)
+    if ret or len(output) == 0:
+        raise Exception("run cmd: {} error, status: {}, msg: {}".format(cmd, ret, output))
+    exphyfwstr = output.strip()
+    portlist = exphyfwstr.split("\n")
+    for port in portlist:
+        phy_addr_str = get_regular_val(port, r"phy_addr\s*=\s*\w+", 0)
+        if phy_addr_str.startswith("ERR"):
+            continue
+        phy_addr_key = phy_addr_str.replace(" ", "")
+        if phy_addr_key in g_exphy_cache:
+            continue
+
+        g_exphy_cache[phy_addr_key] = {}
+
+        fw_version_str = get_regular_val(port, r"fw_version\s*=\s*\w+", 0)
+        if fw_version_str.startswith("ERR"):
+            del g_exphy_cache[phy_addr_key]
+            continue
+
+        fw_version = fw_version_str.split("=")[1].strip()
+        g_exphy_cache[phy_addr_key]["fw_version"] = fw_version
+
+        if "success" in port:
+            ret = "OK"
+        else:
+            ret = "Unexpected"
+        g_exphy_cache[phy_addr_key]["status"] = ret
+    return
+
+
+def lshwmemorysplit():
+    # improve performance
+    global g_meminfo_cache
+    if g_meminfo_cache:
+        return
+    cmd = "lshw -c memory"
+    ret, output = exec_os_cmd(cmd)
+    if ret or len(output) == 0:
+        raise Exception("run cmd: {} error, status: {}, msg: {}".format(cmd, ret, output))
+    memstr = output.strip()
+    memlist = memstr.split("*-")
+    for item in memlist:
+        if item.strip().startswith("memory") and "System Memory" not in item:
+            continue
+        line_index = 0
+        for line in item.splitlines():
+            line_index += 1
+            if line_index == 1:
+                memdict_key = line
+                g_meminfo_cache[memdict_key] = {}
+            else:
+                if ":" not in line:
+                    continue
+                key = line.split(":", 1)[0].strip()
+                value = line.split(":", 1)[1].strip()
+                g_meminfo_cache[memdict_key][key] = value
+            if "empty" in item:
+                break
+    return
+
+
+def run_extra_func(funcname):
+    # improve performance
+    if funcname in g_extra_cache:
+        return g_extra_cache.get(funcname)
+    func = getattr(status, funcname)
+    ret = []
+    func(ret)
+    if ret:
+        g_extra_cache[funcname] = ret
+    return ret
+
+
+def get_extra_value(funcname, itemid, key):
+    for item in run_extra_func(funcname):
+        if item.get("id") == itemid:
+            return item.get(key, "NA")
+    return "NA"
+
+
+def io_wr(reg_addr, reg_data):
+    try:
+        regdata = 0
+        regaddr = 0
+        if isinstance(reg_addr, int):
+            regaddr = reg_addr
+        else:
+            regaddr = int(reg_addr, 16)
+        if isinstance(reg_data, int):
+            regdata = reg_data
+        else:
+            regdata = int(reg_data, 16)
+        devfile = "/dev/port"
+        fd = os.open(devfile, os.O_RDWR | os.O_CREAT)
+        os.lseek(fd, regaddr, os.SEEK_SET)
+        os.write(fd, regdata.to_bytes(1, 'little'))
+        return True
+    except ValueError as e:
+        print(e)
+        return False
+    except Exception as e:
+        print(e)
+        return False
+    finally:
+        os.close(fd)
+
+
+def checksignaldriver(name):
+    modisexistcmd = "lsmod | grep -w %s | wc -l" % name
+    ret, output = exec_os_cmd(modisexistcmd)
+    if ret:
+        return False
+    if output.isdigit() and int(output) > 0:
+        return True
+    return False
+
+
+def adddriver(name):
+    cmd = "modprobe %s" % name
+    if checksignaldriver(name) is not True:
+        ret, log = exec_os_cmd(cmd)
+        if ret != 0 or len(log) > 0:
+            return False
+        return True
+    return True
+
+
+def removedriver(name):
+    cmd = "rmmod %s" % name
+    if checksignaldriver(name):
+        exec_os_cmd(cmd)
+
+def deal_itmes(item_list):
+    for item in item_list:
+        dealtype = item.get("dealtype")
+        if dealtype == "shell":
+            cmd = item.get("cmd")
+            timeout = item.get("timeout", 10)
+            exec_os_cmd(cmd, timeout)
+        elif dealtype == "io_wr":
+            io_addr = item.get("io_addr")
+            wr_value = item.get("value")
+            io_wr(io_addr, wr_value)
+
+
+def get_func_value(funcname, params):
+    func = getattr(ExtraFunc, funcname)
+    ret = func(params)
+    return ret
+
+
+def read_pci_reg(pcibus, slot, fn, resource, offset):
+    '''read pci register'''
+    if offset % 4 != 0:
+        return "ERR offset: %d not 4 bytes align"
+    filename = "/sys/bus/pci/devices/0000:%02x:%02x.%x/resource%d" % (int(pcibus), int(slot), int(fn), int(resource))
+    size = os.path.getsize(filename)
+    with open(filename, "r+") as file:
+        data = mmap.mmap(file.fileno(), size)
+        result = data[offset: offset + 4]
+        s = result[::-1]
+        val = 0
+        for value in s:
+            val = val << 8 | value
+        data.close()
+    return "%08x" % val
+
+
+def devfileread(path, offset, length, bit_width):
+    ret = ""
+    val_str = ''
+    val_list = []
+    fd = -1
+    if not os.path.exists(path):
+        return "%s not found !" % path
+    if length % bit_width != 0:
+        return "only support read by bit_width"
+    if length < bit_width:
+        return "len needs to greater than or equal to bit_width"
+
+    try:
+        fd = os.open(path, os.O_RDONLY)
+        os.lseek(fd, offset, os.SEEK_SET)
+        ret = os.read(fd, length)
+        for item in ret:
+            val_list.append(item)
+
+        for i in range(0, length, bit_width):
+            for j in range(0, bit_width):
+                val_str += "%02x" % val_list[i + bit_width - j - 1]
+    except Exception as e:
+        return str(e)
+    finally:
+        if fd > 0:
+            os.close(fd)
+    return val_str
+
+
+def read_reg(loc, offset, size):
+    with open(loc, 'rb') as file:
+        file.seek(offset)
+        return ' '.join(["%02x" % item for item in file.read(size)])
+
+
+def std_match(stdout, pattern):
+    if pattern is None:
+        return stdout.strip()
+    for line in stdout.splitlines():
+        if re.match(pattern, line):
+            return line.strip()
+    raise EOFError("pattern: {} does not match anything in stdout {}".format(
+        pattern, stdout))
+
+
+def i2c_rd(bus, loc, offset):
+    '''
+    read i2c with i2cget command
+    '''
+    cmd = "i2cget -f -y {} {} {}".format(bus, loc, offset)
+    retrytime = 6
+    for i in range(retrytime):
+        ret, stdout = subprocess.getstatusoutput(cmd)
+        if ret == 0:
+            return stdout
+        time.sleep(0.1)
+    raise RuntimeError("run cmd: {} error, status {}".format(cmd, ret))
+
+
+def i2c_rd_bytes(bus, loc, offset, size):
+    blist = []
+    for i in range(size):
+        ret = i2c_rd(bus, loc, offset + i)
+        blist.append(ret)
+
+    return blist
+
+
+def get_pair_val(source, separator):
+    try:
+        value = source.split(separator, 1)[1]
+    except (ValueError, IndexError):
+        return "ERR separator: {} does not match in source: {}".format(separator, source)
+    return value.strip()
+
+
+def get_regular_val(source, pattern, group):
+    try:
+        value = re.findall(pattern, source)[group]
+    except Exception:
+        return "ERR pattern: {} does not match  in source: {} with group: {}".format(pattern, source, group)
+    return value.strip()
+
+
+def find_match(file2read, pattern):
+    with open(file2read, 'r') as file:
+        for line in file:
+            if not re.match(pattern, line):
+                continue
+            return line.strip()
+    return "ERR pattern %s not match in %s" % (pattern, file2read)
+
+
+def readaline(file2read):
+    with open(file2read, 'r') as file:
+        return file.readline()
+
+
+def sort_key(e):
+    return e.arrt_index
+
+
+class ExtraFunc(object):
+    @staticmethod
+    def get_bcm5387_version(params):
+        version = ""
+        try:
+            before_deal_list = params.get("before", [])
+            deal_itmes(before_deal_list)
+
+            ret, version = exec_os_cmd(params["get_version"])
+            if ret != 0:
+                version = "ERR " + version
+
+            after_deal_list = params.get("after", [])
+            deal_itmes(after_deal_list)
+
+        except Exception as e:
+            version = "ERR %s" % (str(e))
+        finally:
+            finally_deal_list = params.get("finally", [])
+            deal_itmes(finally_deal_list)
+        return version
+
+    @staticmethod
+    def get_memory_value(params):
+        root_key = params.get("root_key")
+        sub_key = params.get("sub_key")
+        lshwmemorysplit()
+        return g_meminfo_cache.get(root_key, {}).get(sub_key, "NA")
+
+    @staticmethod
+    def get_memory_bank_value(params):
+        lshwmemorysplit()
+        bank = params.get("bankid")
+        if g_meminfo_cache.get(bank, {}):
+            return True
+        return False
+
+    @staticmethod
+    def get_exphy_fw(phyid):
+        exphyfwsplit()
+        if phyid not in g_exphy_cache:
+            return "ERR %s not found." % phyid
+        fw_version = g_exphy_cache.get(phyid).get("fw_version")
+        ret = g_exphy_cache.get(phyid).get("status")
+        msg = "%s    %s" % (fw_version, ret)
+        return msg
+
+class CallbackSet:
+    def cpld_format(self, blist):
+        if isinstance(blist, str):
+            blist = blist.split()
+        elif not isinstance(blist, list) or len(blist) != 4:
+            raise ValueError("cpld format: wrong parameter: {}".format(blist))
+
+        return "{}{}{}{}".format(*blist).replace("0x", "")
+
+
+class VersionHunter:
+    call = CallbackSet()
+
+    def __init__(self, entires):
+        self.head = None
+        self.next = None
+        self.key = None
+        self.cmd = None
+        self.file = None
+        self.reg = None
+        self.i2c = None
+        self.extra = None
+        self.pattern = None
+        self.separator = None
+        self.parent = None
+        self.ignore = False
+        self.children = []
+        self.level = 0
+        self.callback = None
+        self.delspace = None
+        self.arrt_index = None
+        self.config = None
+        self.precheck = None
+        self.func = None
+        self.regular = None
+        self.group = 0
+        self.pci = None
+        self.devfile = None
+        self.decode = None
+        self.timeout = 10
+        self.__dict__.update(entires)
+
+    def check_para(self):
+        if self.pattern is None:
+            return False
+        if self.cmd is None or self.file is None:
+            return False
+        return True
+
+    def get_version(self):
+        ret = "NA"
+        try:
+            if self.cmd is not None:
+                ret, output = exec_os_cmd(self.cmd, self.timeout)
+                if ret or len(output) == 0:
+                    raise RuntimeError("run cmd: {} error, status: {}, msg: {}".format(self.cmd, ret, output))
+                ret = std_match(output, self.pattern)
+            elif self.file is not None:
+                ret = self.read_file()
+            elif self.reg is not None:
+                ret = read_reg(self.reg.get("loc"), self.reg.get("offset"),
+                               self.reg.get("size"))
+            elif self.extra:
+                ret = get_extra_value(self.extra.get("funcname"),
+                                      self.extra.get("id"),
+                                      self.extra.get("key"))
+            elif self.i2c:
+                ret = i2c_rd_bytes(self.i2c.get("bus"), self.i2c.get("loc"),
+                                   self.i2c.get("offset"),
+                                   self.i2c.get("size"))
+            elif self.config:
+                ret = self.config
+            elif self.func:
+                ret = get_func_value(self.func.get("funcname"),
+                                     self.func.get("params"))
+            elif self.pci:
+                ret = read_pci_reg(self.pci.get("bus"), self.pci.get("slot"),
+                                   self.pci.get("fn"), self.pci.get("bar"), self.pci.get("offset"))
+            elif self.devfile:
+                ret = devfileread(self.devfile.get("loc"), self.devfile.get("offset"),
+                                  self.devfile.get("len"), self.devfile.get("bit_width"))
+
+        except Exception as e:
+            # printerr(e.message)
+            return "ERR %s" % str(e)
+        return self.exe_callback(ret)
+
+    def exe_callback(self, data):
+        try:
+            if self.callback:
+                method = getattr(self.call, self.callback)
+                return method(data)
+        except Exception:
+            return "ERR run callback method: {} error, data: {}".format(self.callback, data)
+        return data
+
+    def read_file(self):
+        if self.pattern is not None:
+            return find_match(self.file, self.pattern)
+        return readaline(self.file)
+
+    def hunt(self):
+        if self.ignore:
+            return
+        indent = self.level * INDENT * " "
+
+        if self.precheck:
+            try:
+                ret = get_func_value(self.precheck.get("funcname"), self.precheck.get("params"))
+                if ret is not True:
+                    return
+            except Exception as e:
+                err_msg = "ERR %s" % str(e)
+                format_str = "{}{:<{}}{}".format(indent, self.key + ':',
+                                                 (30 - len(indent)), err_msg)
+                print(format_str)
+                return
+        # has children
+        if self.children:
+            self.children.sort(key=sort_key)
+            format_str = "{}{}:".format(indent, self.key)
+            print(format_str)
+            for child in self.children:
+                if not isinstance(child, VersionHunter):
+                    continue
+                child.level = self.level + 1
+                child.hunt()
+        else:
+            version = self.get_version() or ""
+            if not version.startswith("ERR"):
+                version = version.replace("\x00", "").strip()
+                if self.separator is not None:
+                    version = get_pair_val(version, self.separator)
+                if self.delspace is not None:
+                    version = version.replace(" ", "")
+                if self.regular is not None:
+                    version = get_regular_val(version, self.regular, self.group)
+                if self.decode is not None:
+                    tmp_version = self.decode.get(version)
+                    if tmp_version is None:
+                        version = "ERR decode %s failed" % version
+                    else:
+                        version = tmp_version
+            format_str = "{}{:<{}}{}".format(indent, self.key + ':',
+                                             (30 - len(indent)), version)
+            print(format_str)
+
+        if self.next:
+            print("")
+            self.next.hunt()
+
+
+pidfile = 0
+
+
+def ApplicationInstance():
+    global pidfile
+    pidfile = open(os.path.realpath(__file__), "r")
+    try:
+        fcntl.flock(pidfile, fcntl.LOCK_EX | fcntl.LOCK_NB)
+        return True
+    except Exception:
+        return False
+
+
+def run():
+    if os.geteuid() != 0:
+        print("Root privileges are required for this operation")
+        sys.exit(1)
+
+    start_time = time.time()
+    while True:
+        ret = ApplicationInstance()
+        if ret is True:
+            break
+        if time.time() - start_time > 10:
+            printerr("manufacturer is running.")
+            sys.exit(1)
+        time.sleep(0.5)
+
+    objmap = {}
+
+    try:
+        target = {}
+        target.update(MANUINFO_CONF)
+        for objname, value in target.items():
+            objmap[objname] = VersionHunter(value)
+    except Exception as e:
+        printerr(str(e))
+        sys.exit(1)
+
+    head = None
+    for objname, obj in objmap.items():
+        if head is None and obj.head:
+            head = obj
+        if obj.parent:
+            objmap.get(obj.parent).children.append(obj)
+        if obj.next:
+            obj.next = objmap.get(obj.next)
+
+    head.hunt()
+
+
+if __name__ == "__main__":
+    run()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py
new file mode 100755
index 000000000000..61d255823786
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py
@@ -0,0 +1,405 @@
+#!/usr/bin/env python3
+import os
+import subprocess
+import glob
+import time
+import click
+import shutil
+from platform_config import STARTMODULE, MAC_LED_RESET, AIRFLOW_RESULT_FILE
+from platform_config import GLOBALINITPARAM, GLOBALINITCOMMAND, GLOBALINITPARAM_PRE, GLOBALINITCOMMAND_PRE
+from platform_util import wbpciwr
+
+
+CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+
+
+class AliasedGroup(click.Group):
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        if len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+        return None
+
+
+def log_os_system(cmd):
+    status, output = subprocess.getstatusoutput(cmd)
+    if status:
+        print(output)
+    return status, output
+
+
+def write_sysfs_value(reg_name, value):
+    mb_reg_file = "/sys/bus/i2c/devices/" + reg_name
+    locations = glob.glob(mb_reg_file)
+    if len(locations) == 0:
+        print("%s not found" % mb_reg_file)
+        return False
+    sysfs_loc = locations[0]
+    try:
+        with open(sysfs_loc, 'w') as fd:
+            fd.write(value)
+    except Exception:
+        return False
+    return True
+
+
+def getPid(name):
+    ret = []
+    for dirname in os.listdir('/proc'):
+        if dirname == 'curproc':
+            continue
+        try:
+            with open('/proc/{}/cmdline'.format(dirname), mode='r') as fd:
+                content = fd.read()
+        except Exception:
+            continue
+        if name in content:
+            ret.append(dirname)
+    return ret
+
+
+def startAvscontrol():
+    if STARTMODULE.get('avscontrol', 0) == 1:
+        cmd = "nohup avscontrol.py start >/dev/null 2>&1 &"
+        rets = getPid("avscontrol.py")
+        if len(rets) == 0:
+            os.system(cmd)
+
+
+def startFanctrol():
+    if STARTMODULE.get('fancontrol', 0) == 1:
+        cmd = "nohup fancontrol.py start >/dev/null 2>&1 &"
+        rets = getPid("fancontrol.py")
+        if len(rets) == 0:
+            os.system(cmd)
+
+
+def starthal_fanctrl():
+    if STARTMODULE.get('hal_fanctrl', 0) == 1:
+        cmd = "nohup hal_fanctrl.py start >/dev/null 2>&1 &"
+        rets = getPid("hal_fanctrl.py")
+        if len(rets) == 0:
+            os.system(cmd)
+
+
+def starthal_ledctrl():
+    if STARTMODULE.get('hal_ledctrl', 0) == 1:
+        cmd = "nohup hal_ledctrl.py start >/dev/null 2>&1 &"
+        rets = getPid("hal_ledctrl.py")
+        if len(rets) == 0:
+            os.system(cmd)
+
+
+def startDevmonitor():
+    if STARTMODULE.get('dev_monitor', 0) == 1:
+        cmd = "nohup dev_monitor.py start >/dev/null 2>&1 &"
+        rets = getPid("dev_monitor.py")
+        if len(rets) == 0:
+            os.system(cmd)
+
+
+def startSlotmonitor():
+    if STARTMODULE.get('slot_monitor', 0) == 1:
+        cmd = "nohup slot_monitor.py start >/dev/null 2>&1 &"
+        rets = getPid("slot_monitor.py")
+        if len(rets) == 0:
+            os.system(cmd)
+
+
+def startIntelligentmonitor():
+    if STARTMODULE.get('intelligent_monitor', 0) == 1:
+        cmd = "nohup intelligent_monitor.py >/dev/null 2>&1 &"
+        rets = getPid("intelligent_monitor.py")
+        if len(rets) == 0:
+            os.system(cmd)
+
+
+def startSignalmonitor():
+    if STARTMODULE.get('signal_monitor', 0) == 1:
+        cmd = "nohup signal_monitor.py start >/dev/null 2>&1 &"
+        rets = getPid("signal_monitor.py")
+        if len(rets) == 0:
+            os.system(cmd)
+
+
+def startSff_temp_polling():
+    if STARTMODULE.get('sff_temp_polling', 0) == 1:
+        cmd = "nohup sfp_highest_temperatue.py >/dev/null 2>&1 &"
+        rets = getPid("sfp_highest_temperatue.py")
+        if len(rets) == 0:
+            os.system(cmd)
+
+
+def startRebootCause():
+    if STARTMODULE.get('reboot_cause', 0) == 1:
+        cmd = "nohup reboot_cause.py >/dev/null 2>&1 &"
+        rets = getPid("reboot_cause.py")
+        if len(rets) == 0:
+            os.system(cmd)
+
+
+def startPMON_sys():
+    if STARTMODULE.get('pmon_syslog', 0) == 1:
+        cmd = "nohup pmon_syslog.py >/dev/null 2>&1 &"
+        rets = getPid("pmon_syslog.py")
+        if len(rets) == 0:
+            os.system(cmd)
+
+
+def startSff_polling():
+    if STARTMODULE.get('sff_polling', 0) == 1:
+        cmd = "nohup sff_polling.py start > /dev/null 2>&1 &"
+        rets = getPid("sff_polling.py")
+        if len(rets) == 0:
+            os.system(cmd)
+
+
+def generate_air_flow():
+    cmd = "nohup generate_airflow.py > /dev/null 2>&1 &"
+    rets = getPid("generate_airflow.py")
+    if len(rets) == 0:
+        os.system(cmd)
+        time.sleep(1)
+
+
+def startGenerate_air_flow():
+    if STARTMODULE.get('generate_airflow', 0) == 1:
+        for i in range(10):
+            generate_air_flow()
+            if os.path.exists(AIRFLOW_RESULT_FILE):
+                click.echo("%%WB_PLATFORM_PROCESS: generate air flow success")
+                return
+            time.sleep(1)
+        click.echo("%%WB_PLATFORM_PROCESS: generate air flow,failed, %s not exits" % AIRFLOW_RESULT_FILE)
+    return
+
+
+def start_tty_console():
+    if STARTMODULE.get('tty_console', 0) == 1:
+        cmd = "nohup tty_console.py > /dev/null 2>&1 &"
+        rets = getPid("tty_console.py")
+        if len(rets) == 0:
+            os.system(cmd)
+
+
+def stopAvscontrol():
+    if STARTMODULE.get('avscontrol', 0) == 1:
+        rets = getPid("avscontrol.py")
+        for ret in rets:
+            cmd = "kill " + ret
+            os.system(cmd)
+
+
+def stopFanctrol():
+    if STARTMODULE.get('fancontrol', 0) == 1:
+        rets = getPid("fancontrol.py")  #
+        for ret in rets:
+            cmd = "kill " + ret
+            os.system(cmd)
+
+
+def stophal_fanctrl():
+    if STARTMODULE.get('hal_fanctrl', 0) == 1:
+        rets = getPid("hal_fanctrl.py")
+        for ret in rets:
+            cmd = "kill " + ret
+            os.system(cmd)
+
+
+def stophal_ledctrl():
+    if STARTMODULE.get('hal_ledctrl', 0) == 1:
+        rets = getPid("hal_ledctrl.py")
+        for ret in rets:
+            cmd = "kill " + ret
+            os.system(cmd)
+
+
+def stopDevmonitor():
+    if STARTMODULE.get('dev_monitor', 0) == 1:
+        rets = getPid("dev_monitor.py")  #
+        for ret in rets:
+            cmd = "kill " + ret
+            os.system(cmd)
+
+
+def stopSlotmonitor():
+    if STARTMODULE.get('slot_monitor', 0) == 1:
+        rets = getPid("slot_monitor.py")  #
+        for ret in rets:
+            cmd = "kill " + ret
+            os.system(cmd)
+
+
+def stopIntelligentmonitor():
+    if STARTMODULE.get('intelligent_monitor', 0) == 1:
+        rets = getPid("intelligent_monitor.py")
+        for ret in rets:
+            cmd = "kill " + ret
+            os.system(cmd)
+
+
+def stopSignalmonitor():
+    if STARTMODULE.get('signal_monitor', 0) == 1:
+        rets = getPid("signal_monitor.py")  #
+        for ret in rets:
+            cmd = "kill " + ret
+            os.system(cmd)
+
+
+def stopSff_temp_polling():
+    if STARTMODULE.get('sff_temp_polling', 0) == 1:
+        rets = getPid("sfp_highest_temperatue.py")
+        for ret in rets:
+            cmd = "kill " + ret
+            os.system(cmd)
+
+
+def stopPMON_sys():
+    if STARTMODULE.get('pmon_syslog', 0) == 1:
+        rets = getPid("pmon_syslog.py")
+        for ret in rets:
+            cmd = "kill " + ret
+            os.system(cmd)
+
+
+def stopRebootCause():
+    if STARTMODULE.get('reboot_cause', 0) == 1:
+        rets = getPid("reboot_cause.py")
+        for ret in rets:
+            cmd = "kill " + ret
+            os.system(cmd)
+
+
+def stopSff_polling():
+    if STARTMODULE.get('sff_polling', 0) == 1:
+        rets = getPid("sff_polling.py")
+        for ret in rets:
+            cmd = "kill " + ret
+            os.system(cmd)
+
+
+def stopGenerate_air_flow():
+    if STARTMODULE.get('generate_airflow', 0) == 1:
+        rets = getPid("generate_airflow.py")
+        for ret in rets:
+            cmd = "kill " + ret
+            os.system(cmd)
+
+
+def stop_tty_console():
+    if STARTMODULE.get('tty_console', 0) == 1:
+        rets = getPid("tty_console.py")
+        for ret in rets:
+            cmd = "kill " + ret
+            os.system(cmd)
+
+
+def otherinit():
+    for index in GLOBALINITPARAM:
+        write_sysfs_value(index["loc"], index["value"])
+
+    for index in GLOBALINITCOMMAND:
+        log_os_system(index)
+
+
+def otherinit_pre():
+    for index in GLOBALINITPARAM_PRE:
+        write_sysfs_value(index["loc"], index["value"])
+
+    for index in GLOBALINITCOMMAND_PRE:
+        log_os_system(index)
+
+
+def unload_apps():
+    stopSff_polling()
+    stopPMON_sys()
+    stopSignalmonitor()
+    stopIntelligentmonitor()
+    stopSlotmonitor()
+    stopDevmonitor()
+    stopAvscontrol()
+    stophal_ledctrl()
+    stophal_fanctrl()
+    stopFanctrol()
+    stopSff_temp_polling()
+    stopRebootCause()
+    stop_tty_console()
+    stopGenerate_air_flow()
+
+
+def MacLedSet(data):
+    '''write pci register'''
+    pcibus = MAC_LED_RESET.get("pcibus")
+    slot = MAC_LED_RESET.get("slot")
+    fn = MAC_LED_RESET.get("fn")
+    resource = MAC_LED_RESET.get("bar")
+    offset = MAC_LED_RESET.get("offset")
+    val = MAC_LED_RESET.get(data, None)
+    if val is None:
+        click.echo("%%WB_PLATFORM_PROCESS-INIT: MacLedSet wrong input")
+        return
+    wbpciwr(pcibus, slot, fn, resource, offset, val)
+
+
+def copy_machineconf():
+    try:
+        shutil.copyfile("/host/machine.conf", "/etc/sonic/machine.conf")
+        return True
+    except Exception:
+        return False
+
+def load_apps():
+    copy_machineconf()
+    otherinit_pre()
+    startGenerate_air_flow()
+    start_tty_console()
+    startRebootCause()
+    startSff_temp_polling()
+    startFanctrol()
+    starthal_fanctrl()
+    starthal_ledctrl()
+    startAvscontrol()
+    startDevmonitor()
+    startSlotmonitor()
+    startIntelligentmonitor()
+    startSignalmonitor()
+    startPMON_sys()
+    startSff_polling()
+    otherinit()
+    if STARTMODULE.get("macledreset", 0) == 1:
+        MacLedSet("reset")
+
+
+@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
+def main():
+    '''device operator'''
+
+
+@main.command()
+def start():
+    '''load process '''
+    load_apps()
+
+
+@main.command()
+def stop():
+    '''stop process '''
+    unload_apps()
+
+
+@main.command()
+def restart():
+    '''restart process'''
+    unload_apps()
+    load_apps()
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py
new file mode 100755
index 000000000000..1727242b74b9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py
@@ -0,0 +1,253 @@
+#!/usr/bin/python3
+
+import os
+import sys
+import importlib.machinery
+
+
+def get_machine_info():
+    if not os.path.isfile('/host/machine.conf'):
+        return None
+    machine_vars = {}
+    with open('/host/machine.conf') as machine_file:
+        for line in machine_file:
+            tokens = line.split('=')
+            if len(tokens) < 2:
+                continue
+            machine_vars[tokens[0]] = tokens[1].strip()
+    return machine_vars
+
+
+def get_platform_info(machine_info):
+    if machine_info is not None:
+        if 'onie_platform' in machine_info:
+            return machine_info['onie_platform']
+        if 'aboot_platform' in machine_info:
+            return machine_info['aboot_platform']
+    return None
+
+
+PLATFORM_ROOT_PATH = '/usr/share/sonic/device'
+PLATFORM_SPECIFIC_MODULE_NAME = 'monitor'
+PLATFORM_SPECIFIC_CLASS_NAME = 'status'
+platform_status_class = None
+platform = None
+
+
+def get_platform_name():
+    global platform
+    platform = get_platform_info(get_machine_info())
+    return platform
+
+
+val = get_platform_name()
+sys.path.append("/".join([PLATFORM_ROOT_PATH, platform]))
+
+# Loads platform specific sfputil module from source
+
+
+def load_platform_monitor():
+    global platform_status_class
+    platform_name = get_platform_info(get_machine_info())
+    platform_path = "/".join([PLATFORM_ROOT_PATH, platform_name])
+    try:
+        module_file = "/".join([platform_path, PLATFORM_SPECIFIC_MODULE_NAME + ".py"])
+        module = importlib.machinery.SourceFileLoader(PLATFORM_SPECIFIC_MODULE_NAME, module_file).load_module()
+    except IOError:
+        return -1
+    try:
+        platform_status_class = getattr(module, PLATFORM_SPECIFIC_CLASS_NAME)
+    except AttributeError:
+        return -2
+    return 0
+
+
+def printerr(msg):
+    print("\033[0;31m%s\033[0m" % msg)
+
+
+def print_console(msg):
+    print(msg)
+
+
+val_t = load_platform_monitor()
+if val_t != 0:
+    raise Exception("load monitor.py error")
+
+
+def print_platform():
+    platform_info = get_platform_name()
+    print_console(platform_info)
+    print_console("")
+
+
+def print_cputemp_sensors():
+    val_ret = get_call_value_by_function("getcputemp")
+    print_info_str = ""
+    toptile = "Onboard coretemp Sensors:"
+    formatstr = "    {name:<20} : {temp} C (high = {max} C , crit = {crit} C )"
+
+    if len(val_ret) != 0:
+        print_info_str += toptile + '\n'
+        for item in val_ret:
+            print_info_str += formatstr.format(**item) + '\n'
+    print_console(print_info_str)
+
+
+def print_boardtemp():
+    val_ret = get_call_value_by_function("getTemp")
+    print_info_str = ""
+    toptile = "Onboard Temperature Sensors:"
+    errformat = "    {id:<20} : {errmsg}"
+    formatstr = "    {id:<20} : {temp1_input} C (high = {temp1_max} C, hyst = {temp1_max_hyst} C)"
+
+    if len(val_ret) != 0:
+        print_info_str += toptile + '\n'
+        for item in val_ret:
+            realformat = formatstr if item.get('errcode', 0) == 0 else errformat
+            print_info_str += realformat.format(**item) + '\n'
+    print_console(print_info_str)
+
+
+def print_mactemp_sensors():
+    val_ret = get_call_value_by_function("getmactemp")
+    print_info_str = ""
+    toptile = "Onboard MAC Temperature Sensors:"
+    errformat = "    {id:<20} : {errmsg}"
+    formatstr = "    {id:<20} : {temp_input} C"
+
+    if len(val_ret) != 0:
+        print_info_str += toptile + '\n'
+        for item in val_ret:
+            realformat = formatstr if item.get('errcode', 0) == 0 else errformat
+            print_info_str += realformat.format(**item) + '\n'
+        print_console(print_info_str)
+
+
+def print_macpower_sensors():
+    val_ret = get_call_value_by_function("getmacpower")
+    print_info_str = ""
+    toptile = "Onboard MAC Power Sensors:"
+    errformat = "    {id:<20} : {errmsg}"
+    formatstr = "    {id:<20} : {power_input} W"
+
+    if len(val_ret) != 0:
+        print_info_str += toptile + '\n'
+        for item in val_ret:
+            realformat = formatstr if item.get('errcode', 0) == 0 else errformat
+            print_info_str += realformat.format(**item) + '\n'
+        print_console(print_info_str)
+
+
+def print_fan_sensor():
+    val_ret = get_call_value_by_function("checkFan")
+    print_info_str = ""
+    toptile = "Onboard fan Sensors:"
+    errformat = "    {id} : {errmsg}\n"  # "    {id:<20} : {errmsg}"
+    fan_signle_rotor_format = "    {id} : \n"  \
+        "        fan_type  :{fan_type}\n"  \
+        "        sn        :{sn}\n"  \
+        "        hw_version:{hw_version}\n"  \
+        "        Speed     :{Speed} RPM\n"     \
+        "        status    :{errmsg} \n"
+    fan_double_rotor_format = "    {id} : \n"  \
+        "        fan_type  :{fan_type}\n"  \
+        "        sn        :{sn}\n"  \
+        "        hw_version:{hw_version}\n"  \
+        "        Speed     :\n"     \
+        "            speed_front :{rotor1_speed:<5} RPM\n"     \
+        "            speed_rear  :{rotor2_speed:<5} RPM\n"     \
+        "        status    :{errmsg} \n"
+
+    if len(val_ret) != 0:
+        print_info_str += toptile + '\n'
+        for item in val_ret:
+            if item.get('Speed', None) is None:
+                realformat = fan_double_rotor_format if item.get('errcode', 0) == 0 else errformat
+            else:
+                realformat = fan_signle_rotor_format if item.get('errcode', 0) == 0 else errformat
+            print_info_str += realformat.format(**item)
+    print_console(print_info_str)
+
+
+def print_psu_sensor():
+    val_ret = get_call_value_by_function("getPsu")
+    print_info_str = ""
+    toptile = "Onboard Power Supply Unit Sensors:"
+    errformat = "    {id} : {errmsg}\n"  # "    {id:<20} : {errmsg}"
+    psuformat = "    {id} : \n"  \
+                "        type       :{type1}\n"  \
+                "        sn         :{sn}\n"  \
+                "        in_current :{in_current} A\n"  \
+                "        in_voltage :{in_voltage} V\n"     \
+                "        out_current:{out_current} A\n"     \
+                "        out_voltage:{out_voltage} V\n"     \
+                "        temp       :{temp} C        \n"     \
+                "        fan_speed  :{fan_speed} RPM\n"     \
+                "        in_power   :{in_power} W\n"        \
+                "        out_power  :{out_power} W\n"
+
+    if len(val_ret) != 0:
+        print_info_str += toptile + '\r\n'
+        for item in val_ret:
+            realformat = psuformat if item.get('errcode', 0) == 0 else errformat
+            print_info_str += realformat.format(**item)
+    print_console(print_info_str)
+
+
+def print_slot_sensor():
+    val_ret = get_call_value_by_function("checkSlot")
+    print_info_str = ""
+    toptile = "Onboard slot Sensors:"
+    errformat = "    {id} : {errmsg}\n"  # "    {id:<20} : {errmsg}"
+    psuformat = "    {id} : \n"  \
+                "        slot_type  :{slot_type}\n"  \
+                "        sn         :{sn}\n"  \
+                "        hw_version :{hw_version} \n"  \
+                "        status     :{errmsg}\n"
+
+    if len(val_ret) != 0:
+        print_info_str += toptile + '\r\n'
+        for item in val_ret:
+            realformat = psuformat if item.get('errcode', 0) == 0 else errformat
+            print_info_str += realformat.format(**item)
+        print_console(print_info_str)
+
+
+def print_boarddcdc():
+    val_ret = get_call_value_by_function("getDcdc")
+    print_info_str = ""
+    toptile = "Onboard DCDC Sensors:"
+    errformat = "    {id:<26} : {errmsg}"
+    formatstr = "    {id:<26} : {dcdc_input:<6} {dcdc_unit:<1} (Min = {dcdc_min:<6} {dcdc_unit:<1}, Max = {dcdc_max:<6} {dcdc_unit:<1})"
+
+    if len(val_ret) != 0:
+        print_info_str += toptile + '\n'
+        for item in val_ret:
+            realformat = formatstr if item.get('errcode', 0) == 0 else errformat
+            print_info_str += realformat.format(**item) + '\n'
+        print_console(print_info_str)
+
+
+def get_call_value_by_function(function_name):
+    valtemp = []
+    if hasattr(platform_status_class, function_name):
+        test2_func = getattr(platform_status_class, function_name)
+        test2_func(valtemp)
+    return valtemp
+
+
+def getsensors():
+    print_platform()
+    print_cputemp_sensors()
+    print_boardtemp()
+    print_mactemp_sensors()
+    print_macpower_sensors()
+    print_fan_sensor()
+    print_psu_sensor()
+    print_slot_sensor()
+    print_boarddcdc()
+
+
+if __name__ == "__main__":
+    getsensors()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_test.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_test.py
new file mode 100755
index 000000000000..da7119a9ce49
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_test.py
@@ -0,0 +1,142 @@
+#!/usr/bin/env python3
+# -*- coding: UTF-8 -*-
+
+try:
+    import click
+    from platform_intf import platform_reg_read, platform_reg_write, platform_get_optoe_type
+    from platform_intf import platform_set_optoe_type, platform_sfp_read, platform_sfp_write
+except ImportError as error:
+    raise ImportError('%s - required module not found' % str(error)) from error
+
+
+CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+
+
+class AliasedGroup(click.Group):
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        if len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+        return None
+
+
+def print_reg(info, offset):
+    try:
+        size = len(info)
+        j = offset % 16
+        tmp = j
+        offset -= j
+        print_buf = "\n            "
+
+        for i in range(16):
+            print_buf = print_buf + "%2x " % i
+        print(print_buf)
+
+        print_buf = None
+        for i in range(size + j):
+            if i % 16 == 0:
+                print_buf = ""
+                print_buf = "0x%08x  " % offset
+                offset = offset + 16
+            if tmp:
+                print_buf = print_buf + "   "
+                tmp = tmp - 1
+            else:
+                print_buf = print_buf + "%02x " % info[i - j]
+            if (i + 1) % 16 == 0 or i == size + j - 1:
+                print(print_buf)
+    except Exception as e:
+        msg = str(e)
+        print("i = %d, j = %d," % (i, j))
+        print(msg)
+
+
+@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
+def main():
+    '''platform_test main'''
+
+
+@main.command()
+@click.argument('dev_type', required=True)
+@click.argument('dev_id', required=True)
+@click.argument('offset', required=True)
+@click.argument('size', required=True)
+def reg_rd(dev_type, dev_id, offset, size):
+    '''read cpld/fpga reg'''
+    ret, info = platform_reg_read(int(dev_type), int(dev_id), int(offset), int(size))
+    print(ret)
+    if ret is True:
+        print_reg(info, int(offset))
+    else:
+        print(info)
+
+
+@main.command()
+@click.argument('dev_type', required=True)
+@click.argument('dev_id', required=True)
+@click.argument('offset', required=True)
+@click.argument('value', required=True)
+def reg_wr(dev_type, dev_id, offset, value):
+    '''write cpld/fpga reg'''
+    value_list = []
+    value_list.append(int(value))
+    ret, info = platform_reg_write(int(dev_type), int(dev_id), int(offset), value_list)
+    print(ret)
+    print(info)
+
+
+@main.command()
+@click.argument('port', required=True)
+def get_optoe_type(port):
+    '''get optoe type'''
+    ret, info = platform_get_optoe_type(int(port))
+    print(ret)
+    print(info)
+
+
+@main.command()
+@click.argument('port', required=True)
+@click.argument('optoe_type', required=True)
+def set_optoe_type(port, optoe_type):
+    '''set optoe type'''
+    ret, info = platform_set_optoe_type(int(port), int(optoe_type))
+    print(ret)
+    print(info)
+
+
+@main.command()
+@click.argument('port_id', required=True)
+@click.argument('offset', required=True)
+@click.argument('size', required=True)
+def sfp_rd(port_id, offset, size):
+    '''read sfp'''
+    ret, info = platform_sfp_read(int(port_id), int(offset), int(size))
+    print(ret)
+    if ret is True:
+        print_reg(info, int(offset))
+    else:
+        print(info)
+
+
+@main.command()
+@click.argument('port_id', required=True)
+@click.argument('offset', required=True)
+@click.argument('value', required=True)
+def sfp_wr(port_id, offset, value):
+    '''write sfp'''
+    value_list = []
+    value_list.append(int(value))
+    ret, info = platform_sfp_write(int(port_id), int(offset), value_list)
+    print(ret)
+    print(info)
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_util.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_util.py
new file mode 100755
index 000000000000..71a97e5a236d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_util.py
@@ -0,0 +1,838 @@
+#!/usr/bin/python3
+
+import sys
+import os
+import re
+import subprocess
+import shlex
+import time
+import mmap
+import glob
+import logging.handlers
+import shutil
+import gzip
+import ast
+
+
+CONFIG_DB_PATH = "/etc/sonic/config_db.json"
+MAILBOX_DIR = "/sys/bus/i2c/devices/"
+
+
+__all__ = [
+    "strtoint",
+    "byteTostr",
+    "getplatform_name",
+    "wbi2cget",
+    "wbi2cset",
+    "wbpcird",
+    "wbpciwr",
+    "wbi2cgetWord",
+    "wbi2csetWord",
+    "wbi2cset_pec",
+    "wbi2cset_wordpec",
+    "wbsysset",
+    "dev_file_read",
+    "dev_file_write",
+    "wb_os_system",
+    "io_rd",
+    "io_wr",
+    "exec_os_cmd",
+    "exec_os_cmd_log",
+    "write_sysfs",
+    "read_sysfs",
+    "get_sysfs_value",
+    "write_sysfs_value",
+    "get_value",
+    "set_value",
+    "getSdkReg",
+    "getMacTemp",
+    "getMacTemp_sysfs",
+    "get_format_value"
+]
+
+class CodeVisitor(ast.NodeVisitor):
+
+    def __init__(self):
+        self.value = None
+
+    def get_value(self):
+        return self.value
+
+    def get_op_value(self, node):
+        if isinstance(node, ast.Call):       # node is func call
+            value = self.visit_Call(node)
+        elif isinstance(node, ast.BinOp):    # node is BinOp
+            value = self.visit_BinOp(node)
+        elif isinstance(node, ast.UnaryOp):  # node is UnaryOp
+            value = self.visit_UnaryOp(node)
+        elif isinstance(node, ast.Num):      # node is Num Constant
+            value = node.n
+        elif isinstance(node, ast.Str):      # node is Str Constant
+            value = node.s
+        else:
+            raise NotImplementedError("Unsupport operand type: %s" % type(node))
+        return value
+
+    def visit_UnaryOp(self, node):
+        '''
+        node.op: operand type, only support ast.UAdd/ast.USub
+        node.operand: only support ast.Call/ast.Constant(ast.Num/ast.Str)/ast.BinOp/ast.UnaryOp
+        '''
+
+        operand_value = self.get_op_value(node.operand)
+        if isinstance(node.op, ast.UAdd):
+            self.value = operand_value
+        elif isinstance(node.op, ast.USub):
+            self.value = 0 - operand_value
+        else:
+            raise NotImplementedError("Unsupport arithmetic methods %s" % type(node.op))
+        return self.value
+
+    def visit_BinOp(self, node):
+        '''
+        node.left: left operand,  only support ast.Call/ast.Constant(ast.Num)/ast.BinOp
+        node.op: operand type, only support ast.Add/ast.Sub/ast.Mult/ast.Div
+        node.right: right operan, only support ast.Call/ast.Constant(ast.Num/ast.Str)/ast.BinOp
+        '''
+        left_value = self.get_op_value(node.left)
+        right_value = self.get_op_value(node.right)
+
+        if isinstance(node.op, ast.Add):
+            self.value = left_value + right_value
+        elif isinstance(node.op, ast.Sub):
+            self.value = left_value - right_value
+        elif isinstance(node.op, ast.Mult):
+            self.value = left_value * right_value
+        elif isinstance(node.op, ast.Div):
+            self.value = left_value / right_value
+        else:
+            raise NotImplementedError("Unsupport arithmetic methods %s" % type(node.op))
+        return self.value
+
+    def visit_Call(self, node):
+        '''
+        node.func.id: func name, only support 'float', 'int', 'str'
+        node.args: func args list,only support ast.Constant(ast.Num/ast.Str)/ast.BinOp/ast.Call
+        str/float only support one parameter, eg: float(XXX), str(xxx)
+        int support one or two parameters, eg: int(xxx) or int(xxx, 16)
+        xxx can be ast.Call/ast.Constant(ast.Num/ast.Str)/ast.BinOp
+        '''
+        calc_tuple = ("float", "int", "str")
+
+        if node.func.id not in calc_tuple:
+            raise NotImplementedError("Unsupport function call type: %s" % node.func.id)
+
+        args_val_list = []
+        for item in node.args:
+            ret = self.get_op_value(item)
+            args_val_list.append(ret)
+
+        if node.func.id == "str":
+            if len(args_val_list) != 1:
+                raise TypeError("str() takes 1 positional argument but %s were given" % len(args_val_list))
+            value = str(args_val_list[0])
+            self.value = value
+            return value
+
+        if node.func.id == "float":
+            if len(args_val_list) != 1:
+                raise TypeError("float() takes 1 positional argument but %s were given" % len(args_val_list))
+            value = float(args_val_list[0])
+            self.value = value
+            return value
+        # int
+        if len(args_val_list) == 1:
+            value = int(args_val_list[0])
+            self.value = value
+            return value
+        if len(args_val_list) == 2:
+            value = int(args_val_list[0], args_val_list[1])
+            self.value = value
+            return value
+        raise TypeError("int() takes 1 or 2 arguments (%s given)" % len(args_val_list))
+
+def inttostr(vl, length):
+    if not isinstance(vl, int):
+        raise Exception(" type error")
+    index = 0
+    ret_t = ""
+    while index < length:
+        ret = 0xff & (vl >> index * 8)
+        ret_t += chr(ret)
+        index += 1
+    return ret_t
+
+
+def strtoint(str_tmp):
+    value = 0
+    rest_v = str_tmp.replace("0X", "").replace("0x", "")
+    str_len = len(rest_v)
+    for index, val in enumerate(rest_v):
+        value |= int(val, 16) << ((str_len - index - 1) * 4)
+    return value
+
+
+def inttobytes(val, length):
+    if not isinstance(val, int):
+        raise Exception("type error")
+    data_array = bytearray()
+    index = 0
+    while index < length:
+        ret = 0xff & (val >> index * 8)
+        data_array.append(ret)
+        index += 1
+    return data_array
+
+
+def byteTostr(val):
+    strtmp = ''
+    for value in val:
+        strtmp += chr(value)
+    return strtmp
+
+
+def typeTostr(val):
+    strtmp = ''
+    if isinstance(val, bytes):
+        strtmp = byteTostr(val)
+    return strtmp
+
+
+def getonieplatform(path):
+    if not os.path.isfile(path):
+        return ""
+    machine_vars = {}
+    with open(path) as machine_file:
+        for line in machine_file:
+            tokens = line.split('=')
+            if len(tokens) < 2:
+                continue
+            machine_vars[tokens[0]] = tokens[1].strip()
+    return machine_vars.get("onie_platform")
+
+
+def getplatform_config_db():
+    if not os.path.isfile(CONFIG_DB_PATH):
+        return ""
+    val = os.popen("sonic-cfggen -j %s -v DEVICE_METADATA.localhost.platform" % CONFIG_DB_PATH).read().strip()
+    if len(val) <= 0:
+        return ""
+    return val
+
+
+def getplatform_name():
+    if os.path.isfile('/host/machine.conf'):
+        return getonieplatform('/host/machine.conf')
+    if os.path.isfile('/etc/sonic/machine.conf'):
+        return getonieplatform('/etc/sonic/machine.conf')
+    return getplatform_config_db()
+
+
+def wbi2cget(bus, devno, address, word=None):
+    if word is None:
+        command_line = "i2cget -f -y %d 0x%02x 0x%02x " % (bus, devno, address)
+    else:
+        command_line = "i2cget -f -y %d 0x%02x 0x%02x %s" % (bus, devno, address, word)
+    retrytime = 6
+    ret_t = ""
+    for i in range(retrytime):
+        ret, ret_t = wb_os_system(command_line)
+        if ret == 0:
+            return True, ret_t
+        time.sleep(0.1)
+    return False, ret_t
+
+
+def wbi2cset(bus, devno, address, byte):
+    command_line = "i2cset -f -y %d 0x%02x 0x%02x 0x%02x" % (
+        bus, devno, address, byte)
+    retrytime = 6
+    ret_t = ""
+    for i in range(retrytime):
+        ret, ret_t = wb_os_system(command_line)
+        if ret == 0:
+            return True, ret_t
+    return False, ret_t
+
+
+def wbpcird(pcibus, slot, fn, resource, offset):
+    '''read pci register'''
+    if offset % 4 != 0:
+        return "ERR offset: %d not 4 bytes align"
+    filename = "/sys/bus/pci/devices/0000:%02x:%02x.%x/resource%d" % (int(pcibus), int(slot), int(fn), int(resource))
+    with open(filename, "r+") as file:
+        size = os.path.getsize(filename)
+        data = mmap.mmap(file.fileno(), size)
+        result = data[offset: offset + 4]
+        s = result[::-1]
+        val = 0
+        for value in s:
+            val = val << 8 | value
+        data.close()
+    return "0x%08x" % val
+
+
+def wbpciwr(pcibus, slot, fn, resource, offset, data):
+    '''write pci register'''
+    ret = inttobytes(data, 4)
+    filename = "/sys/bus/pci/devices/0000:%02x:%02x.%x/resource%d" % (int(pcibus), int(slot), int(fn), int(resource))
+    with open(filename, "r+") as file:
+        size = os.path.getsize(filename)
+        data = mmap.mmap(file.fileno(), size)
+        data[offset: offset + 4] = ret
+        result = data[offset: offset + 4]
+        s = result[::-1]
+        val = 0
+        for value in s:
+            val = val << 8 | value
+        data.close()
+
+
+def wbi2cgetWord(bus, devno, address):
+    command_line = "i2cget -f -y %d 0x%02x 0x%02x w" % (bus, devno, address)
+    retrytime = 3
+    ret_t = ""
+    for i in range(retrytime):
+        ret, ret_t = wb_os_system(command_line)
+        if ret == 0:
+            return True, ret_t
+    return False, ret_t
+
+
+def wbi2csetWord(bus, devno, address, byte):
+    command_line = "i2cset -f -y %d 0x%02x 0x%02x 0x%x w" % (
+        bus, devno, address, byte)
+    retrytime = 6
+    ret_t = ""
+    for i in range(retrytime):
+        ret, ret_t = wb_os_system(command_line)
+        if ret == 0:
+            return True, ret_t
+    return False, ret_t
+
+
+def wbi2cset_pec(bus, devno, address, byte):
+    command_line = "i2cset -f -y %d 0x%02x 0x%02x 0x%02x bp" % (
+        bus, devno, address, byte)
+    retrytime = 6
+    ret_t = ""
+    for i in range(retrytime):
+        ret, ret_t = wb_os_system(command_line)
+        if ret == 0:
+            return True, ret_t
+    return False, ret_t
+
+
+def wbi2cset_wordpec(bus, devno, address, byte):
+    command_line = "i2cset -f -y %d 0x%02x 0x%02x 0x%02x wp" % (
+        bus, devno, address, byte)
+    retrytime = 6
+    ret_t = ""
+    for i in range(retrytime):
+        ret, ret_t = wb_os_system(command_line)
+        if ret == 0:
+            return True, ret_t
+    return False, ret_t
+
+
+def wbsysset(location, value):
+    command_line = "echo 0x%02x > %s" % (value, location)
+    retrytime = 6
+    ret_t = ""
+    for i in range(retrytime):
+        ret, ret_t = wb_os_system(command_line)
+        if ret == 0:
+            return True, ret_t
+    return False, ret_t
+
+
+def dev_file_read(path, offset, read_len):
+    val_list = []
+    msg = ""
+    ret = ""
+    fd = -1
+
+    if not os.path.exists(path):
+        msg = path + " not found !"
+        return False, msg
+
+    try:
+        fd = os.open(path, os.O_RDONLY)
+        os.lseek(fd, offset, os.SEEK_SET)
+        ret = os.read(fd, read_len)
+        for item in ret:
+            val_list.append(item)
+    except Exception as e:
+        msg = str(e)
+        return False, msg
+    finally:
+        if fd > 0:
+            os.close(fd)
+    return True, val_list
+
+
+def dev_file_write(path, offset, buf_list):
+    msg = ""
+    fd = -1
+
+    if not isinstance(buf_list, list) or len(buf_list) == 0:
+        msg = "buf:%s is not list type or is NONE !" % buf_list
+        return False, msg
+
+    if not os.path.exists(path):
+        msg = path + " not found !"
+        return False, msg
+
+    try:
+        fd = os.open(path, os.O_WRONLY)
+        os.lseek(fd, offset, os.SEEK_SET)
+        ret = os.write(fd, bytes(buf_list))
+    except Exception as e:
+        msg = str(e)
+        return False, msg
+    finally:
+        if fd > 0:
+            os.close(fd)
+
+    return True, ret
+
+
+def wb_os_system(cmd):
+    status, output = subprocess.getstatusoutput(cmd)
+    return status, output
+
+
+def io_rd(reg_addr, read_len=1):
+    try:
+        regaddr = 0
+        if isinstance(reg_addr, int):
+            regaddr = reg_addr
+        else:
+            regaddr = int(reg_addr, 16)
+        devfile = "/dev/port"
+        fd = os.open(devfile, os.O_RDWR | os.O_CREAT)
+        os.lseek(fd, regaddr, os.SEEK_SET)
+        val = os.read(fd, read_len)
+        return "".join(["%02x" % item for item in val])
+    except ValueError:
+        return None
+    except Exception as e:
+        print(e)
+        return None
+    finally:
+        os.close(fd)
+
+
+def io_wr(reg_addr, reg_data):
+    try:
+        regdata = 0
+        regaddr = 0
+        if isinstance(reg_addr, int):
+            regaddr = reg_addr
+        else:
+            regaddr = int(reg_addr, 16)
+        if isinstance(reg_data, int):
+            regdata = reg_data
+        else:
+            regdata = int(reg_data, 16)
+        devfile = "/dev/port"
+        fd = os.open(devfile, os.O_RDWR | os.O_CREAT)
+        os.lseek(fd, regaddr, os.SEEK_SET)
+        os.write(fd, regdata.to_bytes(1, 'little'))
+        return True
+    except ValueError as e:
+        print(e)
+        return False
+    except Exception as e:
+        print(e)
+        return False
+    finally:
+        os.close(fd)
+
+
+def exec_os_cmd(cmd):
+    status, output = subprocess.getstatusoutput(cmd)
+    return status, output
+
+
+def exec_os_cmd_log(cmd):
+    proc = subprocess.Popen(shlex.split(cmd), stdin=subprocess.PIPE, shell=False, stderr=sys.stderr, close_fds=True,
+                            stdout=sys.stdout, universal_newlines=True, bufsize=1)
+    proc.wait()
+    stdout = proc.communicate()[0]
+    stdout = typeTostr(stdout)
+    return proc.returncode, stdout
+
+
+def write_sysfs(location, value):
+    try:
+        if not os.path.isfile(location):
+            return False, ("location[%s] not found !" % location)
+        with open(location, 'w') as fd1:
+            fd1.write(value)
+    except Exception as e:
+        return False, (str(e) + " location[%s]" % location)
+    return True, ("set location[%s] %s success !" % (location, value))
+
+
+def read_sysfs(location):
+    try:
+        locations = glob.glob(location)
+        with open(locations[0], 'rb') as fd1:
+            retval = fd1.read()
+        retval = typeTostr(retval)
+        retval = retval.rstrip('\r\n')
+        retval = retval.lstrip(" ")
+    except Exception as e:
+        return False, (str(e) + "location[%s]" % location)
+    return True, retval
+
+
+def get_pmc_register(reg_name):
+    retval = 'ERR'
+    mb_reg_file = MAILBOX_DIR + reg_name
+    filepath = glob.glob(mb_reg_file)
+    if len(filepath) == 0:
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    mb_reg_file = filepath[0]
+    if not os.path.isfile(mb_reg_file):
+        return "%s %s  notfound" % (retval, mb_reg_file)
+    try:
+        with open(mb_reg_file, 'r') as fd:
+            retval = fd.read()
+    except Exception as error:
+        retval = retval + str(error)
+    retval = retval.rstrip('\r\n')
+    retval = retval.lstrip(" ")
+    return retval
+
+
+def get_sysfs_value(location):
+    pos_t = str(location)
+    name = get_pmc_register(pos_t)
+    return name
+
+
+def write_sysfs_value(reg_name, value):
+    fileLoc = MAILBOX_DIR + reg_name
+    try:
+        if not os.path.isfile(fileLoc):
+            print(fileLoc, 'not found !')
+            return False
+        with open(fileLoc, 'w') as fd:
+            fd.write(value)
+    except Exception:
+        print("Unable to open " + fileLoc + "file !")
+        return False
+    return True
+
+
+def get_value_once(config):
+    try:
+        way = config.get("gettype")
+        int_decode = config.get("int_decode", 16)
+        if way == 'sysfs':
+            loc = config.get("loc")
+            ret, val = read_sysfs(loc)
+            if ret is True:
+                return True, int(val, int_decode)
+            return False, ("sysfs read %s failed. log:%s" % (loc, val))
+        if way == "i2c":
+            bus = config.get("bus")
+            addr = config.get("loc")
+            offset = config.get("offset", 0)
+            ret, val = wbi2cget(bus, addr, offset)
+            if ret is True:
+                return True, int(val, int_decode)
+            return False, ("i2c read failed. bus:%d , addr:0x%x, offset:0x%x" % (bus, addr, offset))
+        if way == "io":
+            io_addr = config.get('io_addr')
+            val = io_rd(io_addr)
+            if len(val) != 0:
+                return True, int(val, int_decode)
+            return False, ("io_addr read 0x%x failed" % io_addr)
+        if way == "i2cword":
+            bus = config.get("bus")
+            addr = config.get("loc")
+            offset = config.get("offset")
+            ret, val = wbi2cgetWord(bus, addr, offset)
+            if ret is True:
+                return True, int(val, int_decode)
+            return False, ("i2cword read failed. bus:%d, addr:0x%x, offset:0x%x" % (bus, addr, offset))
+        if way == "devfile":
+            path = config.get("path")
+            offset = config.get("offset")
+            read_len = config.get("read_len")
+            ret, val_list = dev_file_read(path, offset, read_len)
+            if ret is True:
+                return True, val_list
+            return False, ("devfile read failed. path:%s, offset:0x%x, read_len:%d" % (path, offset, read_len))
+        if way == 'cmd':
+            cmd = config.get("cmd")
+            ret, val = exec_os_cmd(cmd)
+            if ret:
+                return False, ("cmd read exec %s failed, log: %s" % (cmd, val))
+            return True, int(val, int_decode)
+        if way == 'file_exist':
+            judge_file = config.get('judge_file', None)
+            if os.path.exists(judge_file):
+                return True, True
+            return True, False
+        return False, "not support read type"
+    except Exception as e:
+        return False, ("get_value_once exception:%s happen" % str(e))
+
+
+def set_value_once(config):
+    try:
+        delay_time = config.get("delay", None)
+        if delay_time is not None:
+            time.sleep(delay_time)
+
+        way = config.get("gettype")
+        if way == 'sysfs':
+            loc = config.get("loc")
+            value = config.get("value")
+            mask = config.get("mask", 0xff)
+            mask_tuple = (0xff, 0)
+            if mask not in mask_tuple:
+                ret, read_value = read_sysfs(loc)
+                if ret is True:
+                    read_value = int(read_value, base=16)
+                    value = (read_value & mask) | value
+                else:
+                    return False, ("sysfs read %s failed. log:%s" % (loc, read_value))
+            ret, log = write_sysfs(loc, "0x%02x" % value)
+            if ret is not True:
+                return False, ("sysfs %s write 0x%x failed" % (loc, value))
+            return True, ("sysfs write 0x%x success" % value)
+        if way == "i2c":
+            bus = config.get("bus")
+            addr = config.get("loc")
+            offset = config.get("offset")
+            value = config.get("value")
+            mask = config.get("mask", 0xff)
+            mask_tuple = (0xff, 0)
+            if mask not in mask_tuple:
+                ret, read_value = wbi2cget(bus, addr, offset)
+                if ret is True:
+                    read_value = int(read_value, base=16)
+                    value = (read_value & mask) | value
+                else:
+                    return False, ("i2c read failed. bus:%d , addr:0x%x, offset:0x%x" % (bus, addr, offset))
+            ret, log = wbi2cset(bus, addr, offset, value)
+            if ret is not True:
+                return False, ("i2c write bus:%d, addr:0x%x, offset:0x%x, value:0x%x failed" %
+                               (bus, addr, offset, value))
+            return True, ("i2c write bus:%d, addr:0x%x, offset:0x%x, value:0x%x success" %
+                          (bus, addr, offset, value))
+        if way == "io":
+            io_addr = config.get('io_addr')
+            value = config.get('value')
+            mask = config.get("mask", 0xff)
+            mask_tuple = (0xff, 0)
+            if mask not in mask_tuple:
+                read_value = io_rd(io_addr)
+                if read_value is None:
+                    return False, ("io_addr 0x%x read failed" % (io_addr))
+                read_value = int(read_value, base=16)
+                value = (read_value & mask) | value
+            ret = io_wr(io_addr, value)
+            if ret is not True:
+                return False, ("io_addr 0x%x write 0x%x failed" % (io_addr, value))
+            return True, ("io_addr 0x%x write 0x%x success" % (io_addr, value))
+        if way == 'i2cword':
+            bus = config.get("bus")
+            addr = config.get("loc")
+            offset = config.get("offset")
+            value = config.get("value")
+            mask = config.get("mask", 0xff)
+            mask_tuple = (0xff, 0)
+            if mask not in mask_tuple:
+                ret, read_value = wbi2cgetWord(bus, addr, offset)
+                if ret is True:
+                    read_value = int(read_value, base=16)
+                    value = (read_value & mask) | value
+                else:
+                    return False, ("i2c read word failed. bus:%d , addr:0x%x, offset:0x%x" % (bus, addr, offset))
+            ret, log = wbi2csetWord(bus, addr, offset, value)
+            if ret is not True:
+                return False, ("i2cword write bus:%d, addr:0x%x, offset:0x%x, value:0x%x failed" %
+                               (bus, addr, offset, value))
+            return True, ("i2cword write bus:%d, addr:0x%x, offset:0x%x, value:0x%x success" %
+                          (bus, addr, offset, value))
+        if way == "devfile":
+            path = config.get("path")
+            offset = config.get("offset")
+            buf_list = config.get("value")
+            ret, log = dev_file_write(path, offset, buf_list)
+            if ret is True:
+                return True, ("devfile write path:%s, offset:0x%x, buf_list:%s success." % (path, offset, buf_list))
+            return False, ("devfile read  path:%s, offset:0x%x, buf_list:%s failed.log:%s" %
+                           (path, offset, buf_list, log))
+        if way == 'cmd':
+            cmd = config.get("cmd")
+            ret, log = exec_os_cmd(cmd)
+            if ret:
+                return False, ("cmd write exec %s failed, log: %s" % (cmd, log))
+            return True, ("cmd write exec %s success" % cmd)
+        if way == 'bit_wr':
+            mask = config.get("mask")
+            bit_val = config.get("value")
+            val_config = config.get("val_config")
+            ret, rd_value = get_value_once(val_config)
+            if ret is False:
+                return False, ("bit_wr read failed, log: %s" % rd_value)
+            wr_val = (rd_value & mask) | bit_val
+            val_config["value"] = wr_val
+            ret, log = set_value_once(val_config)
+            if ret is False:
+                return False, ("bit_wr failed, log: %s" % log)
+            return True, ("bit_wr success, log: %s" % log)
+        if way == 'creat_file':
+            file_name = config.get("file")
+            ret, log = exec_os_cmd("touch %s" % file_name)
+            if ret:
+                return False, ("creat file %s failed, log: %s" % (file_name, log))
+            exec_os_cmd("sync")
+            return True, ("creat file %s success" % file_name)
+        if way == 'remove_file':
+            file_name = config.get("file")
+            ret, log = exec_os_cmd("rm -rf %s" % file_name)
+            if ret:
+                return False, ("remove file %s failed, log: %s" % (file_name, log))
+            exec_os_cmd("sync")
+            return True, ("remove file %s success" % file_name)
+        return False, "not support write type"
+    except Exception as e:
+        return False, ("set_value_once exception:%s happen" % str(e))
+
+
+def get_value(config):
+    retrytime = 6
+    for i in range(retrytime):
+        ret, val = get_value_once(config)
+        if ret is True:
+            return True, val
+        time.sleep(0.1)
+    return False, val
+
+
+def set_value(config):
+    retrytime = 6
+    ignore_result_flag = config.get("ignore_result", 0)
+    for i in range(retrytime):
+        ret, log = set_value_once(config)
+        if ret is True:
+            return True, log
+        if ignore_result_flag == 1:
+            return True, log
+        time.sleep(0.1)
+    return False, log
+
+
+class CompressedRotatingFileHandler(logging.handlers.RotatingFileHandler):
+    def doRollover(self):
+        """
+        Do a rollover, as described in __init__().
+        """
+        if self.stream:
+            self.stream.close()
+            self.stream = None
+        if self.backupCount > 0:
+            for i in range(self.backupCount - 1, 0, -1):
+                sfn = "%s.%d.gz" % (self.baseFilename, i)
+                dfn = "%s.%d.gz" % (self.baseFilename, i + 1)
+                if os.path.exists(sfn):
+                    if os.path.exists(dfn):
+                        os.remove(dfn)
+                    os.rename(sfn, dfn)
+            dfn = self.baseFilename + ".1.gz"
+            if os.path.exists(dfn):
+                os.remove(dfn)
+            # These two lines below are the only new lines. I commented out the os.rename(self.baseFilename, dfn) and
+            #  replaced it with these two lines.
+            with open(self.baseFilename, 'rb') as f_in, gzip.open(dfn, 'wb') as f_out:
+                shutil.copyfileobj(f_in, f_out)
+        self.mode = 'w'
+        self.stream = self._open()
+
+
+def getSdkReg(reg):
+    try:
+        cmd = "bcmcmd -t 1 'getr %s ' < /dev/null" % reg
+        ret, result = wb_os_system(cmd)
+        result_t = result.strip().replace("\r", "").replace("\n", "")
+        if ret != 0 or "Error:" in result_t:
+            return False, result
+        patt = r"%s.(.*):(.*)>drivshell" % reg
+        rt = re.findall(patt, result_t, re.S)
+        test = re.findall("=(.*)", rt[0][0])[0]
+    except Exception:
+        return False, 'getsdk register error'
+    return True, test
+
+
+def getMacTemp():
+    result = {}
+    wb_os_system("bcmcmd -t 1 \"show temp\" < /dev/null")
+    ret, log = wb_os_system("bcmcmd -t 1 \"show temp\" < /dev/null")
+    if ret:
+        return False, result
+    logs = log.splitlines()
+    for line in logs:
+        if "average" in line:
+            b = re.findall(r'\d+.\d+', line)
+            result["average"] = b[0]
+        elif "maximum" in line:
+            b = re.findall(r'\d+.\d+', line)
+            result["maximum"] = b[0]
+    return True, result
+
+
+def getMacTemp_sysfs(mactempconf):
+    temp = -1000000
+    try:
+        temp_list = []
+        mac_temp_loc = mactempconf.get("loc", [])
+        mac_temp_flag = mactempconf.get("flag", None)
+        if mac_temp_flag is not None:
+            gettype = mac_temp_flag.get('gettype')
+            okbit = mac_temp_flag.get('okbit')
+            okval = mac_temp_flag.get('okval')
+            if gettype == "io":
+                io_addr = mac_temp_flag.get('io_addr')
+                val = io_rd(io_addr)
+                if val is None:
+                    raise Exception("get mac_flag by io failed.")
+            else:
+                bus = mac_temp_flag.get('bus')
+                loc = mac_temp_flag.get('loc')
+                offset = mac_temp_flag.get('offset')
+                ind, val = wbi2cget(bus, loc, offset)
+                if ind is not True:
+                    raise Exception("get mac_flag by i2c failed.")
+            val_t = (int(val, 16) & (1 << okbit)) >> okbit
+            if val_t != okval:
+                raise Exception("mac_flag invalid, val_t:%d." % val_t)
+        for loc in mac_temp_loc:
+            temp_s = get_sysfs_value(loc)
+            if isinstance(temp_s, str) and temp_s.startswith("ERR"):
+                raise Exception("get mac temp error. loc:%s" % loc)
+            temp_t = int(temp_s)
+            if temp_t == -1000000:
+                raise Exception("mac temp invalid.loc:%s" % loc)
+            temp_list.append(temp_t)
+        temp_list.sort(reverse=True)
+        temp = temp_list[0]
+    except Exception:
+        return False, temp
+    return True, temp
+
+def get_format_value(format_str):
+    ast_obj = ast.parse(format_str, mode='eval')
+    visitor = CodeVisitor()
+    visitor.visit(ast_obj)
+    ret = visitor.get_value()
+    return ret
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/pmon_syslog.py b/platform/broadcom/sonic-platform-modules-micas/common/script/pmon_syslog.py
new file mode 100755
index 000000000000..8bdceef8c1b5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/pmon_syslog.py
@@ -0,0 +1,519 @@
+#!/usr/bin/python3
+#   * onboard interval check
+#   * FAN trays
+#   * PSU
+#   * SFF
+import time
+import syslog
+import traceback
+import glob
+from platform_config import PMON_SYSLOG_STATUS
+
+PMON_DEBUG_FILE = "/etc/.pmon_syslog_debug_flag"
+debuglevel = 0
+PMONERROR = 1
+PMONDEBUG = 2
+
+
+def pmon_debug(s):
+    if PMONDEBUG & debuglevel:
+        syslog.openlog("PMON_SYSLOG", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def pmon_error(s):
+    if PMONERROR & debuglevel:
+        syslog.openlog("PMON_SYSLOG", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+def dev_syslog(s):
+    syslog.openlog("PMON_SYSLOG", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_LOCAL1 | syslog.LOG_NOTICE, s)
+
+
+# status
+STATUS_PRESENT = 'PRESENT'
+STATUS_ABSENT = 'ABSENT'
+STATUS_OK = 'OK'
+STATUS_NOT_OK = 'NOT OK'
+STATUS_FAILED = 'FAILED'
+
+
+class checkBase(object):
+    def __init__(self, path, dev_name, display_name, obj_type, config):
+        self._peroid_syslog = None
+        self._peroid_failed_syslog = None  # exception
+        self._preDevStatus = None
+        self._path = path
+        self._name = dev_name
+        self._display_name = display_name
+        self._type = obj_type
+        self._config = config
+
+    def getCurstatus(self):
+        # get ok/not ok/absent status
+        status, log = self.getPresent()
+        if status == STATUS_PRESENT:
+            # check status
+            property_status, log = self.getStatus()
+            if property_status is not None:
+                status = property_status
+        return status, log
+
+    def getPresent(self):
+        presentFilepath = self.getPath()
+        try:
+            # get ok/not ok/absent status
+            presentConfig = self._config["present"]
+            mask = presentConfig.get("mask", 0xff)
+            absent_val = presentConfig.get("ABSENT", None)
+            absent_val = absent_val & mask
+            with open(presentFilepath, "r") as fd:
+                retval = fd.read()
+                if int(retval) == absent_val:
+                    return STATUS_ABSENT, None
+                return STATUS_PRESENT, None
+        except Exception as e:
+            return STATUS_FAILED, (str(e) + " location[%s]" % presentFilepath)
+
+    def getStatus(self):
+        if "status" in self._config:
+            statusConfig = self._config["status"]
+            for itemConfig in statusConfig:
+                mask = itemConfig.get("mask", 0xff)
+                ok_val = itemConfig.get("okval", None)
+                ok_val = ok_val & mask
+                Filepath = itemConfig["path"] % self._name
+                try:
+                    with open(Filepath, "r") as fd1:
+                        retval = fd1.read()
+                        if int(retval) != ok_val:
+                            return STATUS_NOT_OK, None
+                except Exception as e:
+                    return STATUS_FAILED, (str(e) + " location[%s]" % Filepath)
+            return STATUS_OK, None
+        return None, None
+
+    def getPath(self):
+        return self._path
+
+    def getName(self):
+        return self._name
+
+    def getType(self):
+        return self._type
+
+    def getDisplayName(self):
+        return self._display_name
+
+    def getnochangedMsgFlag(self):
+        return self._config["nochangedmsgflag"]
+
+    def getnochangedMsgTime(self):
+        return self._config["nochangedmsgtime"]
+
+    def getnoprintFirstTimeFlag(self):
+        return self._config["noprintfirsttimeflag"]
+
+    def checkStatus(self):
+        # syslog msg
+        dev_type = self.getType()
+        display_name = self.getDisplayName()
+        nochangedMsgTime = self.getnochangedMsgTime()
+        getnochangedMsgFlag = self.getnochangedMsgFlag()
+        noprintFirstTimeFlag = self.getnoprintFirstTimeFlag()
+        MSG_IN = '%%PMON-5-' + dev_type + '_PLUG_IN: %s is PRESENT.'
+        MSG_OUT = '%%PMON-5-' + dev_type + '_PLUG_OUT: %s is ABSENT.'
+        MSG_OK = '%%PMON-5-' + dev_type + '_OK: %s is OK.'
+        MSG_NOT_OK = '%%PMON-5-' + dev_type + '_FAILED: %s is NOT OK.'
+        MSG_ABSENT = '%%PMON-5-' + dev_type + '_ABSENT: %s is ABSENT.'
+        MSG_UNKNOWN = '%%PMON-5-' + dev_type + '_UNKNOWN: %s is UNKNOWN.%s'
+        MSG_RECOVER = '%%PMON-5-' + dev_type + '_OK: %s is OK. Recover from ' + dev_type + ' FAILED.'
+
+        curStatus, log = self.getCurstatus()
+        pmon_debug("%s: current status %s" % (display_name, curStatus))
+        pmon_debug("%s: pre status %s" % (display_name, self._preDevStatus))
+        pmon_debug("%s: peroid_syslog %s" % (display_name, self._peroid_syslog))
+
+        if curStatus == STATUS_FAILED:
+            # get status failed
+            if self._peroid_failed_syslog is not None:
+                if getnochangedMsgFlag and time.time() - self._peroid_failed_syslog >= nochangedMsgTime:
+                    # absent as before for some time, notice
+                    dev_syslog(MSG_UNKNOWN % (display_name, log))
+                    self._peroid_failed_syslog = time.time()
+            else:  # first time failed
+                dev_syslog(MSG_UNKNOWN % (display_name, log))
+                self._peroid_failed_syslog = time.time()
+            return
+        self._peroid_failed_syslog = time.time()
+
+        if self._preDevStatus is None:
+            # 1st time
+            if noprintFirstTimeFlag == 1:
+                self._peroid_syslog = time.time()
+            else:
+                if curStatus == STATUS_PRESENT:
+                    # present
+                    dev_syslog(MSG_IN % display_name)
+                elif curStatus == STATUS_OK:
+                    # ok
+                    dev_syslog(MSG_OK % display_name)
+                elif curStatus == STATUS_NOT_OK:
+                    # not ok
+                    dev_syslog(MSG_NOT_OK % display_name)
+                    self._peroid_syslog = time.time()
+                else:
+                    # absent
+                    dev_syslog(MSG_ABSENT % display_name)
+                    self._peroid_syslog = time.time()
+        else:
+            # from 2nd time...
+            if self._preDevStatus == curStatus:
+                # status not changed
+                if self._preDevStatus == STATUS_ABSENT:
+                    if self._peroid_syslog is not None:
+                        if getnochangedMsgFlag and time.time() - self._peroid_syslog >= nochangedMsgTime:
+                            # absent as before for some time, notice
+                            dev_syslog(MSG_ABSENT % display_name)
+                            self._peroid_syslog = time.time()
+                elif self._preDevStatus == STATUS_NOT_OK:
+                    if self._peroid_syslog is not None:
+                        if getnochangedMsgFlag and time.time() - self._peroid_syslog >= nochangedMsgTime:
+                            # not ok as before for some time, notice
+                            dev_syslog(MSG_NOT_OK % display_name)
+                            self._peroid_syslog = time.time()
+            else:
+                # status changed
+                if self._preDevStatus == STATUS_ABSENT:
+                    if curStatus == STATUS_NOT_OK:
+                        # absent -> not ok
+                        dev_syslog(MSG_IN % display_name)
+                        dev_syslog(MSG_NOT_OK % display_name)
+                        self._peroid_syslog = time.time()
+                    elif curStatus == STATUS_OK:
+                        # absent -> ok
+                        dev_syslog(MSG_IN % display_name)
+                        dev_syslog(MSG_OK % display_name)
+                    else:
+                        # absent -> prsent
+                        dev_syslog(MSG_IN % display_name)
+
+                elif self._preDevStatus == STATUS_OK:
+                    if curStatus == STATUS_NOT_OK:
+                        # ok -> not ok
+                        dev_syslog(MSG_NOT_OK % display_name)
+                        self._peroid_syslog = time.time()
+                    elif curStatus == STATUS_ABSENT:
+                        # ok -> absent
+                        dev_syslog(MSG_OUT % display_name)
+                        self._peroid_syslog = time.time()
+                elif self._preDevStatus == STATUS_PRESENT:
+                    # present -> absent
+                    dev_syslog(MSG_OUT % display_name)
+                    self._peroid_syslog = time.time()
+                else:  # not ok
+                    if curStatus == STATUS_OK:
+                        # not ok -> ok
+                        dev_syslog(MSG_RECOVER % display_name)
+                        dev_syslog(MSG_OK % display_name)
+                    else:
+                        # not ok -> absent
+                        dev_syslog(MSG_OUT % display_name)
+                        self._peroid_syslog = time.time()
+        self._preDevStatus = curStatus
+
+
+class checkSfp(checkBase):
+    def __init__(self, path, dev_name, display_name, config):
+        super(checkSfp, self).__init__(path, dev_name, display_name, 'XCVR', config)
+
+    def getPath(self):
+        super(checkSfp, self).getPath()
+        return self._path
+
+    def getName(self):
+        super(checkSfp, self).getName()
+        return self._name
+
+    def getType(self):
+        super(checkSfp, self).getType()
+        return self._type
+
+
+class checkSlot(checkBase):
+    def __init__(self, path, dev_name, display_name, config):
+        super(checkSlot, self).__init__(path, dev_name, display_name, 'SLOT', config)
+
+    def getPath(self):
+        super(checkSlot, self).getPath()
+        return self._path
+
+    def getName(self):
+        super(checkSlot, self).getName()
+        return self._name
+
+    def getType(self):
+        super(checkSlot, self).getType()
+        return self._type
+
+
+class checkPSU(checkBase):
+    def __init__(self, path, dev_name, display_name, config):
+        super(checkPSU, self).__init__(path, dev_name, display_name, 'PSU', config)
+
+    def getPath(self):
+        super(checkPSU, self).getPath()
+        return self._path
+
+    def getName(self):
+        super(checkPSU, self).getName()
+        return self._name
+
+    def getType(self):
+        super(checkPSU, self).getType()
+        return self._type
+
+
+class checkFAN(checkBase):
+    def __init__(self, path, dev_name, display_name, config):
+        super(checkFAN, self).__init__(path, dev_name, display_name, 'FAN', config)
+
+    def getPath(self):
+        super(checkFAN, self).getPath()
+        return self._path
+
+    def getName(self):
+        super(checkFAN, self).getName()
+        return self._name
+
+    def getType(self):
+        super(checkFAN, self).getType()
+        return self._type
+
+
+class platformSyslog():
+    def __init__(self):
+        self.__sfp_checklist = []
+        self.__fan_checklist = []
+        self.__psu_checklist = []
+        self.__slot_checklist = []
+        self.__temp_checklist = []
+        self.temps_peroid_syslog = {}
+        self.normal_status = 0
+        self.warning_status = 1
+        self.critical_status = 2
+        self.poweron_flag = 0
+
+        self.pmon_syslog_config = PMON_SYSLOG_STATUS.copy()
+        self.__pollingtime = self.pmon_syslog_config.get('polling_time', 3)
+
+        tmpconfig = self.pmon_syslog_config.get('sffs', None)
+        if tmpconfig is not None:
+            preset_item = tmpconfig.get("present", {})
+            path = preset_item.get("path", [])
+            for location in path:
+                if '*' not in location:
+                    pmon_error("sff location config error: %s" % location)
+                    continue
+                dev_name_index = 0
+                loc_split_list = location.split('/')
+                for i, item in enumerate(loc_split_list):
+                    if '*' in item:
+                        dev_name_index = i
+                        break
+                locations = glob.glob(location)
+                for dev_path in locations:
+                    dev_name_list = dev_path.split('/')
+                    # explame:get eth1 from /sys_switch/transceiver/eth1/present
+                    dev_name = dev_name_list[dev_name_index]
+                    dev_name_alias = tmpconfig.get("alias", {})
+                    display_name = dev_name_alias.get(dev_name, dev_name)
+                    dev = checkSfp(dev_path, dev_name, display_name, tmpconfig)
+                    self.__sfp_checklist.append(dev)
+
+        tmpconfig = self.pmon_syslog_config.get('fans', None)
+        if tmpconfig is not None:
+            preset_item = tmpconfig.get("present", {})
+            path = preset_item.get("path", [])
+            for location in path:
+                if '*' not in location:
+                    pmon_error("fan location config error: %s" % location)
+                    continue
+                dev_name_index = 0
+                loc_split_list = location.split('/')
+                for i, item in enumerate(loc_split_list):
+                    if '*' in item:
+                        dev_name_index = i
+                        break
+                locations = glob.glob(location)
+                for dev_path in locations:
+                    dev_name_list = dev_path.split('/')
+                    dev_name = dev_name_list[dev_name_index]
+                    dev_name_alias = tmpconfig.get("alias", {})
+                    display_name = dev_name_alias.get(dev_name, dev_name)
+                    dev = checkFAN(dev_path, dev_name, display_name, tmpconfig)
+                    self.__fan_checklist.append(dev)
+
+        tmpconfig = self.pmon_syslog_config.get('psus', None)
+        if tmpconfig is not None:
+            preset_item = tmpconfig.get("present", {})
+            path = preset_item.get("path", [])
+            for location in path:
+                if '*' not in location:
+                    pmon_error("psu location config error: %s" % location)
+                    continue
+                dev_name_index = 0
+                loc_split_list = location.split('/')
+                for i, item in enumerate(loc_split_list):
+                    if '*' in item:
+                        dev_name_index = i
+                        break
+                locations = glob.glob(location)
+                for dev_path in locations:
+                    dev_name_list = dev_path.split('/')
+                    dev_name = dev_name_list[dev_name_index]
+                    dev_name_alias = tmpconfig.get("alias", {})
+                    display_name = dev_name_alias.get(dev_name, dev_name)
+                    dev = checkPSU(dev_path, dev_name, display_name, tmpconfig)
+                    self.__psu_checklist.append(dev)
+
+        tmpconfig = self.pmon_syslog_config.get('slots', None)
+        if tmpconfig is not None:
+            preset_item = tmpconfig.get("present", {})
+            path = preset_item.get("path", [])
+            for location in path:
+                if '*' not in location:
+                    pmon_error("slot location config error: %s" % location)
+                    continue
+                dev_name_index = 0
+                loc_split_list = location.split('/')
+                for i, item in enumerate(loc_split_list):
+                    if '*' in item:
+                        dev_name_index = i
+                        break
+                locations = glob.glob(location)
+                for dev_path in locations:
+                    dev_name_list = dev_path.split('/')
+                    dev_name = dev_name_list[dev_name_index]
+                    dev_name_alias = tmpconfig.get("alias", {})
+                    display_name = dev_name_alias.get(dev_name, dev_name)
+                    dev = checkSlot(dev_path, dev_name, display_name, tmpconfig)
+                    self.__slot_checklist.append(dev)
+
+        tmpconfig = self.pmon_syslog_config.get('temps', None)
+        if tmpconfig is not None:
+            self.__temp_checklist = tmpconfig.get('temps_list', [])
+            self.__temps_pollingseconds = tmpconfig.get('over_temps_polling_seconds', None)
+
+    def checkTempStaus(self, temp_item):
+        temp_name = temp_item.get('name', None)
+        input_path = temp_item.get('input_path', None)
+        warning_temp = temp_item.get('warning', None)
+        critical_temp = temp_item.get('critical', None)
+        input_accuracy = temp_item.get('input_accuracy', None)
+        if temp_name is None or input_path is None or warning_temp is None or critical_temp is None:
+            dev_syslog('%%PMON-5-TEMP_NOTICE: get temperature config parament failed.')
+            return
+        try:
+            locations = glob.glob(input_path)
+            with open(locations[0], "r") as fd:
+                input_temp = fd.read()
+            input_temp = float(input_temp) / float(input_accuracy)
+
+            if 'time' not in temp_item:
+                temp_item['time'] = time.time()
+                temp_item['status'] = self.normal_status
+            if float(input_temp) >= float(warning_temp):
+                if float(input_temp) >= float(critical_temp):
+                    if time.time() - \
+                            temp_item['time'] >= self.__temps_pollingseconds or temp_item['status'] != self.critical_status:
+                        dev_syslog('%%PMON-5-TEMP_HIGH: %s temperature %sC is larger than max critical threshold %sC.'
+                                   % (temp_name, input_temp, critical_temp))
+                        temp_item['status'] = self.critical_status
+                        temp_item['time'] = time.time()
+                else:
+                    if time.time() - \
+                            temp_item['time'] >= self.__temps_pollingseconds or temp_item['status'] != self.warning_status:
+                        dev_syslog('%%PMON-5-TEMP_HIGH: %s temperature %sC is larger than max warning threshold %sC.'
+                                   % (temp_name, input_temp, warning_temp))
+                        temp_item['status'] = self.warning_status
+                        temp_item['time'] = time.time()
+            else:
+                pmon_debug(
+                    "%s temperature %sC is in range [%s, %s]" %
+                    (temp_name, input_temp, warning_temp, critical_temp))
+                temp_item['status'] = self.normal_status
+                temp_item['time'] = time.time()
+        except Exception as e:
+            dev_syslog('%%PMON-5-TEMP_NOTICE: Cannot get %s temperature. Exception log: %s' % (temp_name, str(e)))
+        return
+
+    def sysfs_precondition_check(self, check_module, check_project):
+        try:
+            tmpconfig = self.pmon_syslog_config.get(check_module, None)
+            if tmpconfig is not None:
+                check_list = tmpconfig.get(check_project, [])
+                for check_item in check_list:
+                    location = check_item.get("path", None)
+                    ok_val = check_item.get("ok_val", None)
+                    mask = check_item.get("mask", 0xff)
+                    ok_val = ok_val & mask
+                    locations = glob.glob(location)
+                    for power_path in locations:
+                        with open(power_path, "r") as fd:
+                            retval = fd.read()
+                        if int(retval) != ok_val:
+                            return
+                self.poweron_flag = 1
+        except Exception as e:
+            dev_syslog('%%PMON-5-TEMP_NOTICE: Cannot check power status. Exception log: %s' % str(e))
+        return
+
+    def updateSysDeviceStatus(self):
+        if self.poweron_flag == 1:
+            for dev in self.__sfp_checklist:
+                dev.checkStatus()
+        else:
+            self.sysfs_precondition_check('sffs', 'power')
+
+        for dev in self.__fan_checklist:
+            dev.checkStatus()
+        for dev in self.__psu_checklist:
+            dev.checkStatus()
+        for dev in self.__slot_checklist:
+            dev.checkStatus()
+        for temp_item in self.__temp_checklist:
+            self.checkTempStaus(temp_item)
+
+    def getPollingtime(self):
+        return self.__pollingtime
+
+    def debug_init(self):
+        global debuglevel
+        try:
+            with open(PMON_DEBUG_FILE, "r") as fd:
+                value = fd.read()
+            debuglevel = int(value)
+        except Exception:
+            debuglevel = 0
+
+    def doWork(self):
+        try:
+            self.debug_init()
+            self.updateSysDeviceStatus()
+        except Exception as e:
+            MSG_EXCEPTION = '%%PMON-5-NOTICE: Exception happened! info:%s' % str(e)
+            pmon_error(MSG_EXCEPTION % traceback.format_exc())
+
+
+def run():
+    platform = platformSyslog()
+    while True:
+        platform.doWork()
+        time.sleep(platform.getPollingtime())
+
+
+if __name__ == '__main__':
+    run()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/reboot_cause.py b/platform/broadcom/sonic-platform-modules-micas/common/script/reboot_cause.py
new file mode 100755
index 000000000000..2f125c5084c2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/reboot_cause.py
@@ -0,0 +1,183 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+import sys
+import os
+import time
+import syslog
+from platform_util import get_value, set_value, exec_os_cmd, wb_os_system
+from platform_config import REBOOT_CAUSE_PARA
+
+REBOOT_CAUSE_DEBUG_FILE = "/etc/.reboot_cause_debug"
+REBOOT_CAUSE_STARTED_FLAG = "/tmp/.reboot_cause_started_flag"
+
+debuglevel = 0
+
+
+def record_syslog_debug(s):
+    if debuglevel:
+        syslog.openlog("REBOOT_CAUSE_DEBUG", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def record_syslog(s):
+    syslog.openlog("REBOOT_CAUSE", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_WARNING, s)
+
+
+class RebootCause():
+    def __init__(self):
+        self.reboot_cause_para = REBOOT_CAUSE_PARA.copy()
+        self.reboot_cause_list = self.reboot_cause_para.get('reboot_cause_list', None)
+        self.other_reboot_cause_record = self.reboot_cause_para.get('other_reboot_cause_record', None)
+
+    def debug_init(self):
+        global debuglevel
+        if os.path.exists(REBOOT_CAUSE_DEBUG_FILE):
+            debuglevel = 1
+        else:
+            debuglevel = 0
+
+    def monitor_point_check(self, item):
+        try:
+            gettype = item.get('gettype', None)
+            okval = item.get('okval', None)
+            compare_mode = item.get('compare_mode', "equal")
+            ret, value = get_value(item)
+            if ret is True:
+                if compare_mode == "equal":
+                    if value == okval:
+                        return True
+                elif compare_mode == "great":
+                    if value > okval:
+                        return True
+                elif compare_mode == "ignore":
+                    return True
+                else:
+                    record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: compare_mode %s not match error.' % (compare_mode))
+            else:
+                record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: base point check type:%s not support.' % gettype)
+        except Exception as e:
+            record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: base point check error. msg: %s.' % (str(e)))
+        return False
+
+    def reboot_cause_record(self, item_list):
+        RET = {"RETURN_KEY1": 0}
+        try:
+            for item in item_list:
+                record_type = item.get('record_type', None)
+                if record_type == 'file':
+                    file_mode = item.get('mode', None)
+                    file_log = item.get('log', None)
+                    file_path = item.get('path', None)
+                    file_max_size = item.get('file_max_size', 0)
+
+                    if file_path is None:
+                        record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: record type is file, but path is none.')
+                        continue
+
+                    if file_max_size > 0:
+                        file_size = 0
+                        if os.path.exists(file_path):
+                            file_size = os.path.getsize(file_path) // file_max_size
+                        if file_size >= 1:
+                            reocrd_cmd = "mv %s %s_bak" % (file_path, file_path)
+                            status, output = exec_os_cmd(reocrd_cmd)
+                            if status:
+                                record_syslog(
+                                    '%%REBOOT_CAUSE-3-EXCEPTION: exec cmd %s failed, %s' %
+                                    (reocrd_cmd, output))
+
+                    if file_mode == 'cover':
+                        operate_cmd = ">"
+                    elif file_mode == 'add':
+                        operate_cmd = ">>"
+                    else:
+                        RET["RETURN_KEY1"] = -1
+                        record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: file record mode:%s not support.' % file_mode)
+                        continue
+
+                    create_dir = "mkdir -p %s" % os.path.dirname(file_path)
+                    status, ret_t = wb_os_system(create_dir)
+                    if status != 0:
+                        RET["RETURN_KEY1"] = -1
+                        record_syslog(
+                            '%%REBOOT_CAUSE-3-EXCEPTION: create %s failed, msg: %s' %
+                            (os.path.dirname(file_path), ret_t))
+                        continue
+
+                    status, date = wb_os_system("date")
+                    if status != 0 or len(date) == 0:
+                        RET["RETURN_KEY1"] = -1
+                        record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: get date failed.')
+                        continue
+
+                    reocrd_cmd = "echo %s %s %s %s" % (file_log, date, operate_cmd, file_path)
+                    status, ret_t = wb_os_system(reocrd_cmd)
+                    if status != 0:
+                        RET["RETURN_KEY1"] = -1
+                        record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: get date failed, msg: %s' % ret_t)
+                        continue
+                    wb_os_system('sync')
+                else:
+                    RET["RETURN_KEY1"] = -1
+                    record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: record_type:%s not support.' % record_type)
+                    continue
+        except Exception as e:
+            RET["RETURN_KEY1"] = -1
+            record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: reboot cause record error. msg: %s.' % (str(e)))
+        if RET["RETURN_KEY1"] == 0:
+            return True
+        return False
+
+    def reboot_cause_check(self):
+        try:
+            reboot_cause_flag = False
+            if self.reboot_cause_list is None:
+                record_syslog_debug('%%REBOOT_CAUSE-6-DEBUG: reboot cause check config not found')
+                return
+            for item in self.reboot_cause_list:
+                name = item.get('name', None)
+                monitor_point = item.get('monitor_point', None)
+                record = item.get('record', None)
+                finish_operation_list = item.get('finish_operation', [])
+                if name is None or monitor_point is None or record is None:
+                    record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: reboot cause check get config failed.name:%s, monitor_point:%s, record:%s' %
+                                  (name, monitor_point, record))
+                    return
+                ret = self.monitor_point_check(monitor_point)
+                if ret is True:
+                    record_syslog_debug('%%REBOOT_CAUSE-6-DEBUG: %s reboot cause is happen' % name)
+                    self.reboot_cause_record(record)
+                    reboot_cause_flag = True
+                    for finish_operation_item in finish_operation_list:
+                        ret, log = set_value(finish_operation_item)
+                        if ret is False:
+                            log = "%%REBOOT_CAUSE-3-EXCEPTION: " + log
+                            record_syslog(log)
+
+            if reboot_cause_flag is False and self.other_reboot_cause_record is not None:
+                record_syslog_debug('%%REBOOT_CAUSE-6-DEBUG: other reboot cause is happen')
+                self.reboot_cause_record(self.other_reboot_cause_record)
+        except Exception as e:
+            record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: reboot cause check error. msg: %s.' % (str(e)))
+        return
+
+    def run(self):
+        try:
+            self.debug_init()
+            if os.path.exists(REBOOT_CAUSE_STARTED_FLAG):
+                record_syslog_debug(
+                    '%%REBOOT_CAUSE-6-DEBUG: Reboot cause has been started and will not be started again')
+                sys.exit(0)
+            self.reboot_cause_check()
+            wb_os_system("touch %s" % REBOOT_CAUSE_STARTED_FLAG)
+            wb_os_system("sync")
+            time.sleep(5)
+            sys.exit(0)
+        except Exception as e:
+            record_syslog('%%REBOOT_CAUSE-3-EXCEPTION: %s.' % (str(e)))
+
+
+if __name__ == '__main__':
+    reboot_cause = RebootCause()
+    reboot_cause.run()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/reboot_ctrl.py b/platform/broadcom/sonic-platform-modules-micas/common/script/reboot_ctrl.py
new file mode 100755
index 000000000000..17d3f5902b9d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/reboot_ctrl.py
@@ -0,0 +1,150 @@
+#!/usr/bin/env python3
+# -*- coding: UTF-8 -*-
+import time
+import syslog
+import click
+from platform_util import write_sysfs, wbi2cset, io_wr, wbi2csetWord
+from platform_config import REBOOT_CTRL_PARAM
+
+
+REBOOTCTLDEBUG = 0
+
+CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+
+
+class AliasedGroup(click.Group):
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        if len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+        return None
+
+
+def rebootctrlwarning(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("REBOOTCTRL", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_WARNING, s)
+
+
+def rebootctrlcritical(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("REBOOTCTRL", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_CRIT, s)
+
+
+def rebootctrlerror(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("REBOOTCTRL", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_ERR, s)
+
+
+def rebootctrldebug(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    if REBOOTCTLDEBUG == 1:
+        syslog.openlog("REBOOTCTRL", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+class RebootCtrl():
+    def __init__(self):
+        self.config = REBOOT_CTRL_PARAM.copy()
+
+    def set_value(self, config, val):
+        way = config.get("gettype")
+        if way == 'sysfs':
+            loc = config.get("loc")
+            value = config.get(val)
+            rebootctrldebug("sysfs type.loc:0x%x, value:0x%x" % (loc, value))
+            return write_sysfs(loc, "0x%02x" % value)
+        if way == "i2c":
+            bus = config.get("bus")
+            addr = config.get("loc")
+            offset = config.get("offset")
+            value = config.get(val)
+            rebootctrldebug("i2c type.bus:0x%x, addr:0x%x, offset:0x%x, value:0x%x" % (bus, addr, offset, value))
+            return wbi2cset(bus, addr, offset, value)
+        if way == "io":
+            io_addr = config.get('io_addr')
+            value = config.get(val)
+            rebootctrldebug("io type.io_addr:0x%x, value:0x%x" % (io_addr, value))
+            ret = io_wr(io_addr, value)
+            if ret is not True:
+                return False, ("write 0x%x failed" % io_addr)
+            return True, ("write 0x%x success" % io_addr)
+        if way == 'i2cword':
+            bus = config.get("bus")
+            addr = config.get("loc")
+            offset = config.get("offset")
+            value = config.get(val)
+            rebootctrldebug("i2cword type.bus:0x%x, addr:0x%x, offset:0x%x, value:0x%x" % (bus, addr, offset, value))
+            return wbi2csetWord(bus, addr, offset, value)
+        return False, "unsupport way: %s" % way
+
+    def reset_operate(self, config):
+        ret, log = self.set_value(config, "rst_val")
+        rst_delay = config.get("rst_delay", 0)
+        time.sleep(rst_delay)
+        return ret, log
+
+    def unlock_reset_operate(self, config):
+        ret, log = self.set_value(config, "unlock_rst_val")
+        unlock_rst_delay = config.get("unlock_rst_delay", 0)
+        time.sleep(unlock_rst_delay)
+        return ret, log
+
+    def do_rebootctrl(self, option):
+        if self.config is None:
+            rebootctrlerror("Reset failed, REBOOT_CTRL_PARAM cfg get failed.")
+            return
+        try:
+            name_conf = self.config.get(option, None)
+            if name_conf is None:
+                print("Reset %s not support" % option)
+                return
+            try:
+                click.confirm("Are you sure you want to reset " + option + "?",
+                              default=False, abort=True, show_default=True)
+            except Exception as e:
+                print("Aborted, msg: %s" % str(e))
+                return
+            print("Reset %s start" % option)
+            ret, log = self.reset_operate(name_conf)
+            if ret is False:
+                rebootctrlerror(log)
+                print("Reset %s failed" % option)
+                return
+            if "unlock_rst_val" in name_conf:
+                ret, log = self.unlock_reset_operate(name_conf)
+                if ret is False:
+                    rebootctrlerror(log)
+                    print("%s unlock reset failed" % option)
+                    return
+            print("Reset %s success" % option)
+        except Exception:
+            rebootctrlerror("do_rebootctrl Exception error")
+        return
+
+
+@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
+def main():
+    '''reboot_ctrl reset [option]'''
+
+
+@main.command()
+@click.argument('option', required=True)
+def reset(option):
+    '''reset device'''
+    rebootctrldebug("reboot ctrl option %s" % option)
+    rebootctrl = RebootCtrl()
+    rebootctrl.do_rebootctrl(option)
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/sensors b/platform/broadcom/sonic-platform-modules-micas/common/script/sensors
new file mode 100755
index 000000000000..a2c72b123a43
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/sensors
@@ -0,0 +1,8 @@
+#!/bin/bash
+#docker exec -i pmon sensors "$@"
+
+
+#To probe sensors not part of lm-sensors
+if [ -r /usr/local/bin/platform_sensors.py ]; then
+        python /usr/local/bin/platform_sensors.py
+fi
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/sfp_highest_temperatue.py b/platform/broadcom/sonic-platform-modules-micas/common/script/sfp_highest_temperatue.py
new file mode 100755
index 000000000000..4dd98f3a36b3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/sfp_highest_temperatue.py
@@ -0,0 +1,148 @@
+#!/usr/bin/python3
+import os
+import importlib.machinery
+import time
+import syslog
+import subprocess
+import fcntl
+
+sfp_temperature_file = "/tmp/highest_sff_temp"
+
+SFP_TEMP_DEBUG_FILE = "/etc/.sfp_temp_debug_flag"
+SFP_TEMP_RECORD_DEBUG = 1
+SFP_TEMP_RECORD_ERROR = 2
+debuglevel = 0
+
+
+def sfp_temp_debug(s):
+    if SFP_TEMP_RECORD_DEBUG & debuglevel:
+        syslog.openlog("SFP_TEMP_DEBUG", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def sfp_temp_error(s):
+    if SFP_TEMP_RECORD_ERROR & debuglevel:
+        syslog.openlog("SFP_TEMP_ERROR", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+pidfile = None
+
+
+def file_rw_lock():
+    global pidfile
+    pidfile = open(sfp_temperature_file, "r")
+    try:
+        fcntl.flock(pidfile, fcntl.LOCK_EX | fcntl.LOCK_NB)
+        sfp_temp_debug("file lock success")
+        return True
+    except Exception:
+        if pidfile is not None:
+            pidfile.close()
+            pidfile = None
+        return False
+
+
+def file_rw_unlock():
+    try:
+        global pidfile
+
+        if pidfile is not None:
+            fcntl.flock(pidfile, fcntl.LOCK_UN)
+            pidfile.close()
+            pidfile = None
+            sfp_temp_debug("file unlock success")
+        else:
+            sfp_temp_debug("pidfile is invalid, do nothing")
+        return True
+    except Exception as e:
+        sfp_temp_error("file unlock err, msg:%s" % (str(e)))
+        return False
+
+
+def get_sfp_highest_temperature():
+    highest_temperature = 0
+    platform_sfputil = None
+
+    sfputil_dir = "/usr/share/sonic/device/"
+    try:
+        if not os.path.exists(sfputil_dir):
+            sfputil_dir = "/usr/share/sonic/platform/"
+            sfputil_path = sfputil_dir + "/plugins/sfputil.py"
+        else:
+            cmd = "cat /host/machine.conf | grep onie_build_platform"
+            ret, output = subprocess.getstatusoutput(cmd)
+            if ret != 0:
+                sfp_temp_error("cmd: %s execution fail, output: %s" % (cmd, output))
+
+            onie_platform = output.split("=")[1]
+            sfputil_path = sfputil_dir + onie_platform + "/plugins/sfputil.py"
+
+        module = importlib.machinery.SourceFileLoader("sfputil", sfputil_path).load_module()
+        platform_sfputil_class = getattr(module, "SfpUtil")
+        platform_sfputil = platform_sfputil_class()
+
+        temperature = platform_sfputil.get_highest_temperature()
+        highest_temperature = int(temperature) * 1000
+    except Exception as e:
+        sfp_temp_error("get sfp temperature error, msg:%s" % str(e))
+        highest_temperature = -9999000
+
+    return highest_temperature
+
+
+def write_sfp_highest_temperature(temperature):
+
+    loop = 1000
+    ret = False
+    try:
+        if os.path.exists(sfp_temperature_file) is False:
+            with open(sfp_temperature_file, 'w') as sfp_f:
+                pass
+        for i in range(0, loop):
+            ret = file_rw_lock()
+            if ret is True:
+                break
+            time.sleep(0.001)
+
+        if ret is False:
+            sfp_temp_error("take file lock timeout")
+            return
+
+        with open(sfp_temperature_file, 'w') as sfp_f:
+            sfp_f.write("%s\n" % str(temperature))
+
+        file_rw_unlock()
+        return
+    except Exception as e:
+        sfp_temp_error("write sfp temperature error, msg:%s" % str(e))
+        file_rw_unlock()
+        return
+
+
+def debug_init():
+    global debuglevel
+
+    try:
+        with open(SFP_TEMP_DEBUG_FILE, "r") as fd:
+            value = fd.read()
+        debuglevel = int(value)
+    except Exception:
+        debuglevel = 0
+
+
+def main():
+    while True:
+        debug_init()
+        temperature = 0
+        try:
+            temperature = get_sfp_highest_temperature()
+            write_sfp_highest_temperature(temperature)
+        except Exception as e:
+            sfp_temp_error("get/write sfp temperature error, msg:%s" % str(e))
+            write_sfp_highest_temperature(-9999000)
+        time.sleep(5)
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/slot_monitor.py b/platform/broadcom/sonic-platform-modules-micas/common/script/slot_monitor.py
new file mode 100755
index 000000000000..b8b774c8b726
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/slot_monitor.py
@@ -0,0 +1,242 @@
+#!/usr/bin/env python3
+# -*- coding: UTF-8 -*-
+import time
+import syslog
+import traceback
+import operator
+import click
+from platform_config import SLOT_MONITOR_PARAM, MONITOR_DEV_STATUS_DECODE
+from platform_util import io_rd, io_wr, wbi2cget, wbi2cset
+
+
+SLOTMONITORDEBUG = 0
+
+CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+
+
+class AliasedGroup(click.Group):
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        if len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+        return None
+
+
+def slotwarninglog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("SLOTMONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_WARNING, s)
+
+
+def slotcriticallog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("SLOTMONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_CRIT, s)
+
+
+def sloterror(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("SLOTMONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_ERR, s)
+
+
+def slotinfo(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("SLOTMONITOR", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_INFO, s)
+
+
+def slotdebuglog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    if SLOTMONITORDEBUG == 1:
+        syslog.openlog("SLOTMONITOR", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+class SlotMonitor():
+    def __init__(self):
+        self.preSlotStatus = []
+
+    def checkslot(self, ret):
+        slots_conf = SLOT_MONITOR_PARAM.get('slots', None)
+        slotpresent = MONITOR_DEV_STATUS_DECODE.get('slotpresent', None)
+
+        if slots_conf is None or slotpresent is None:
+            return False
+        for item_slot in slots_conf:
+            totalerr = 0
+            try:
+                ret_t = {}
+                ret_t["id"] = item_slot.get('name')
+                ret_t["status"] = ""
+                presentattr = item_slot.get('present')
+                gettype = presentattr.get('gettype')
+                presentbit = presentattr.get('presentbit')
+                if gettype == "io":
+                    io_addr = presentattr.get('io_addr')
+                    val = io_rd(io_addr)
+                    if val is not None:
+                        retval = val
+                    else:
+                        totalerr -= 1
+                        sloterror(" %s  %s" % (item_slot.get('name'), "lpc read failed"))
+                else:
+                    bus = presentattr.get('bus')
+                    loc = presentattr.get('loc')
+                    offset = presentattr.get('offset')
+                    ind, val = wbi2cget(bus, loc, offset)
+                    if ind is True:
+                        retval = val
+                    else:
+                        totalerr -= 1
+                        sloterror(" %s  %s" % (item_slot.get('name'), "i2c read failed"))
+                if totalerr < 0:
+                    ret_t["status"] = "NOT OK"
+                    ret.append(ret_t)
+                    continue
+                val_t = (int(retval, 16) & (1 << presentbit)) >> presentbit
+                slotdebuglog("%s present:%s" % (item_slot.get('name'), slotpresent.get(val_t)))
+                if val_t != slotpresent.get('okval'):
+                    ret_t["status"] = "ABSENT"
+                else:
+                    ret_t["status"] = "PRESENT"
+            except Exception as e:
+                ret_t["status"] = "NOT OK"
+                totalerr -= 1
+                sloterror("checkslot error")
+                sloterror(str(e))
+            ret.append(ret_t)
+        return True
+
+    def dealslotplugin(self, name):
+        slotdebuglog("enter dealslotplugin %s" % name)
+        # wait for slot stable
+        time.sleep(5)
+        slots_conf = SLOT_MONITOR_PARAM.get('slots', None)
+        if slots_conf is None:
+            return False
+        for item_slot in slots_conf:
+            try:
+                slotdebuglog("name %s, item_slot.get('name') %s" % (name, item_slot.get('name')))
+                if name == item_slot.get('name'):
+                    actattr = item_slot.get('act')
+                    for item_act in actattr:
+                        gettype = item_act.get('gettype')
+                        if gettype == "io":
+                            io_addr = item_act.get('io_addr')
+                            value = item_act.get('value')
+                            mask = item_act.get('mask')
+                            val = io_rd(io_addr)
+                            if val is None:
+                                sloterror(" %s  %s" % (name, "lpc read failed"))
+                                continue
+                            set_val = (int(val, 16) & mask) | value
+                            ret = io_wr(io_addr, set_val)
+                            if ret is not True:
+                                sloterror(" %s %s" % (name, "lpc write failed"))
+                                continue
+                            slotdebuglog("io set io_addr:0x%x value:0x%x success" % (io_addr, set_val))
+                        elif gettype == "i2c":
+                            bus = item_act.get('bus')
+                            loc = item_act.get('loc')
+                            offset = item_act.get('offset')
+                            value = item_act.get('value')
+                            ret, log = wbi2cset(bus, loc, offset, value)
+                            if ret is not True:
+                                sloterror(" %s %s %s" % (name, "i2c write failed", log))
+                                continue
+                            slotdebuglog(
+                                "i2c set bus:%d loc:0x%x offset:0x%x value:0x%x success" %
+                                (bus, loc, offset, value))
+                        else:
+                            sloterror("gettype error")
+                    break
+            except Exception as e:
+                sloterror("dealslotplugin failed")
+                sloterror(str(e))
+                return False
+        return True
+
+    def updateSlotStatus(self):
+        '''
+        Only two status: PRESENT and ABSENT
+        '''
+        curSlotStatus = []
+        self.checkslot(curSlotStatus)
+        slotdebuglog('curSlotStatus: {}\n preSlotStatus: {}'.format(curSlotStatus, self.preSlotStatus))
+        if operator.eq(self.preSlotStatus, curSlotStatus) is False:
+            if len(self.preSlotStatus) == 0:
+                # first time
+                for i, item in enumerate(curSlotStatus):
+                    if item['status'] == 'PRESENT':
+                        slotdebuglog('SLOT_PLUG_IN: %s' % (item['id']))
+                    elif item['status'] == 'ABSENT':
+                        slotdebuglog('SLOT_ABSENT: %s' % (item['id']))
+                    else:
+                        slotdebuglog('SLOT_FAILED: %s status %s not support yet' % (item['id'], item['status']))
+                    self.preSlotStatus.append(item)
+            else:
+                for i, item in enumerate(curSlotStatus):
+                    if item['status'] == self.preSlotStatus[i]['status']:
+                        continue
+                    if item['status'] == 'PRESENT' and self.preSlotStatus[i]['status'] == 'ABSENT':
+                        self.dealslotplugin(item['id'])
+                        slotinfo('SLOT_PLUG_IN: %s' % (item['id']))
+                    elif item['status'] == 'ABSENT' and self.preSlotStatus[i]['status'] == 'PRESENT':
+                        slotwarninglog('SLOT_PLUG_OUT: %s' % (item['id']))
+                    else:
+                        slotwarninglog('SLOT_PLUG_OUT: %s status change from %s to %s not support' %
+                                       (item['id'], self.preSlotStatus[i]['status'], item['status']))
+                    self.preSlotStatus.remove(self.preSlotStatus[i])
+                    self.preSlotStatus.insert(i, item)
+
+    def slotmonitor(self):
+        self.updateSlotStatus()
+        return 0
+
+
+def doSlotMonitor(slotMonitor):
+    slotMonitor.slotmonitor()
+
+
+def run(interval, slotMonitor):
+    # slotMonitor.devattrinit()
+    while True:
+        try:
+            doSlotMonitor(slotMonitor)
+        except Exception as e:
+            traceback.print_exc()
+            sloterror(str(e))
+        time.sleep(interval)
+
+
+@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
+def main():
+    '''slot monitor operator'''
+
+
+@main.command()
+def start():
+    '''start slot monitor'''
+    slotinfo("slot_monitor start")
+    slotMonitor = SlotMonitor()
+    interval = SLOT_MONITOR_PARAM.get('polling_time', 1)
+    run(interval, slotMonitor)
+
+
+@main.command()
+def stop():
+    '''stop slot monitor '''
+    slotinfo("stop")
+
+
+# device_i2c operation
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/ssdmon b/platform/broadcom/sonic-platform-modules-micas/common/script/ssdmon
new file mode 100755
index 000000000000..4290b0a68725
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/ssdmon
@@ -0,0 +1,82 @@
+#!/usr/bin/env python3
+#
+# ssdmon
+#
+# Command-line utility to check SSD health and parameters
+#
+
+try:
+    import argparse
+    import os
+    import sys
+
+    from sonic_py_common import device_info, logger
+except ImportError as e:
+    raise ImportError("%s - required module not found" % str(e))
+
+DEFAULT_DEVICE = "/dev/sda"
+SYSLOG_IDENTIFIER = "ssdmon"
+
+# Global logger instance
+log = logger.Logger(SYSLOG_IDENTIFIER)
+
+def import_ssd_api(diskdev):
+    """
+    Loads platform specific or generic ssd_mon module from source
+    Raises an ImportError exception if none of above available
+
+    Returns:
+        Instance of the class with SSD API implementation (vendor or generic)
+    """
+
+    # try to load platform specific module
+    try:
+        platform_path, _ = device_info.get_paths_to_platform_and_hwsku_dirs()
+        platform_plugins_path = os.path.join(platform_path, "plugins")
+        sys.path.append(os.path.abspath(platform_plugins_path))
+        from ssd_util import SsdUtil
+    except ImportError as e:
+        log.log_warning("Platform specific SsdMon module not found.")
+
+    return SsdUtil(diskdev)
+
+def is_number(s):
+    try:
+        float(s)
+        return True
+    except ValueError:
+        return False
+
+# ==================== Entry point ====================
+def ssdmon():
+    if os.geteuid() != 0:
+        print("Root privileges are required for this operation")
+        sys.exit(1)
+
+    parser = argparse.ArgumentParser()
+    parser.add_argument("-d", "--device", help="Device name to show health info", default=DEFAULT_DEVICE)
+    parser.add_argument("-t", "--temperature", action="store_true", default=False, help="Show only temperature")
+    parser.add_argument("-j", "--health", action="store_true", default=False, help="Show only health")
+
+    args = parser.parse_args()
+
+    ssd = import_ssd_api(args.device)
+
+    if args.temperature:
+        print(ssd.get_temperature())
+        return
+
+    if args.health:
+        print(ssd.get_health())
+        return
+
+    print("Device Model : {}".format(ssd.get_model()))
+    print("Firmware     : {}".format(ssd.get_firmware()))
+    print("Serial       : {}".format(ssd.get_serial()))
+    print("Health       : {}{}".format(ssd.get_health(), "%" if is_number(ssd.get_health()) else ""))
+    print("Remain Life  : {}{}".format(ssd.get_remaining_life(), "%" if is_number(ssd.get_remaining_life()) else ""))
+    print("Temperature  : {}{}".format(ssd.get_temperature(), "C" if is_number(ssd.get_temperature()) else ""))
+    print("SATA Rate    : {}".format(ssd.get_sata_rate()))
+
+if __name__ == '__main__':
+    ssdmon()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/tty_console.py b/platform/broadcom/sonic-platform-modules-micas/common/script/tty_console.py
new file mode 100755
index 000000000000..4fae02f5128e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/tty_console.py
@@ -0,0 +1,91 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+
+import logging.handlers
+import subprocess
+import shlex
+import time
+import sys
+import os
+from platform_util import CompressedRotatingFileHandler, exec_os_cmd
+
+console_file = "/dev/ttyS1"
+console_logfile = "/var/log/bmc-console.log"
+MAX_LOG_BYTES = 20 * 1024 * 1024
+BACKUP_COUNT = 9
+
+READ_SIZE = 1024
+
+logger = logging.getLogger("cpu_monitor_bmc")
+logger.setLevel(logging.DEBUG)
+fh = CompressedRotatingFileHandler(
+    console_logfile,
+    mode='a',
+    maxBytes=MAX_LOG_BYTES,
+    backupCount=BACKUP_COUNT,
+    encoding=None,
+    delay=0)
+fh.setLevel(logging.DEBUG)
+
+formatter = logging.Formatter("%(asctime)s - %(levelname)s - %(message)s")
+fh.setFormatter(formatter)
+logger.addHandler(fh)
+
+
+def tty_system_cmd(cmd, print_log=True):
+    if print_log:
+        logger.debug("command: %s", cmd)
+        status, output = exec_os_cmd(cmd)
+        logger.debug("command status %s", status)
+        logger.debug("command output:\n%s", output)
+    else:
+        status, output = exec_os_cmd(cmd)
+    return status, output
+
+
+if __name__ == '__main__':
+    try_times = 0
+    while try_times < 3:
+        try_times = try_times + 1
+        ret, log = tty_system_cmd("stty -F /dev/ttyS1 | grep 115200", True)
+        if len(log) != 0 and "115200" in log:
+            break
+        tty_system_cmd("stty -F /dev/ttyS1 115200", True)
+        if try_times > 1:
+            logger.error("The %d time try to set SONiC /dev/ttyS1 115200", try_times)
+
+    if not os.path.exists(console_file):
+        logger.error("device %s not exist", console_file)
+        sys.exit(1)
+
+    nopen = 3
+    while nopen > 0:
+        try:
+            console_fd = os.open(console_file, os.O_RDONLY)
+            break
+        except Exception as e:
+            logger.error(e)
+            logger.error("open %s failed", console_file)
+            nopen = nopen - 1
+            time.sleep(1)
+    if nopen == 0:
+        sys.exit(1)
+
+    try:
+        tmp_read = ""
+        while True:
+            dev_read = os.read(console_fd, READ_SIZE)
+            dev_read = str(dev_read, encoding='utf-8')
+            if len(dev_read) == 1 and dev_read == "\n":
+                continue
+            if dev_read[len(dev_read) - 1] == '\n':
+                tmp_read = tmp_read + dev_read[0:(len(dev_read) - 1)]
+                logger.info(tmp_read)
+                tmp_read = ""
+            else:
+                tmp_read = tmp_read + dev_read
+
+    except Exception as e:
+        if console_fd is not None:
+            os.close(console_fd)
+        logger.error(e)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/upgrade.py b/platform/broadcom/sonic-platform-modules-micas/common/script/upgrade.py
new file mode 100755
index 000000000000..1b2523198ed8
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/upgrade.py
@@ -0,0 +1,991 @@
+#!/usr/bin/env python3
+# -*- coding: UTF-8 -*-
+import sys
+import os
+import time
+import syslog
+import signal
+import click
+from platform_util import get_value, set_value, exec_os_cmd, exec_os_cmd_log
+from platform_config import UPGRADE_SUMMARY, WARM_UPGRADE_STARTED_FLAG
+from warm_upgrade import WarmBasePlatform
+
+
+############################# Error code defined #############################
+ERR_FW_CHECK_CPLD_UPGRADE = -601    # "Failed to check the device CPLD information"
+ERR_FW_CHECK_FPGA_UPGRADE = -602    # "Failed to check the device FPGA information"
+ERR_FW_MATCH_CPLD_UPGRADE = -603    # "Not found upgrade CPLD file."
+ERR_FW_MATCH_FPGA_UPGRADE = -604    # "Not found upgrade FPGA file."
+ERR_FW_SAMEVER_CPLD_UPGRADE = -605    # "The CPLD version in device is same"
+ERR_FW_SAMEVER_FPGA_UPGRADE = -606    # "The FPGA version in device is same"
+ERR_FW_DO_CPLD_UPGRADE = -607    # "Doing upgrade CPLD is failed."
+ERR_FW_DO_FPGA_UPGRADE = -608    # "Doing upgrade FPGA is failed."
+ERR_FW_UPGRADE = -609    # "Failed to upgrade firmware"
+FIRMWARE_PROGRAM_EXEC_ERR = -610    # "Firmware program run error!"
+ERR_FW_FILE_FOUND = -701    # "Failed to find upgrade file"
+ERR_FW_HEAD_PARSE = -702    # "Failed to parse upgrade firmware head info"
+ERR_FW_CONFIG_FOUND = -703    # "Failed to find config item"
+ERR_FW_NOSUPPORT_HOT = -704    # "No support hot upgrade"
+ERR_FW_CHECK_SIZE = -705    # "Failed to check file size"
+ERR_FW_DEVICE_ACCESS = -706    # "Failed to access device"
+ERR_FW_NO_FILE_SUCCESS = -707    # "No files were successfully upgraded"
+ERR_FW_CARD_ABSENT = -708    # "The subcard not present"
+ERR_FW_HEAD_CHECK = -709    # "Failed to check head info"
+ERR_FW_FOOL_PROOF = -710    # "Failed to fool proof verification"
+ERR_FW_RAISE_EXCEPTION = -711    # Code raise exception
+ERR_FW_INVALID_PARAM = -712    # Invalid parameter
+ERR_FW_UNZIP_FAILED = -713    # Unzip firmware failed
+
+FIRMWARE_SUCCESS = 0
+CHECK_OK = 0
+
+
+UPGRADE_DEBUG_FILE = "/etc/.upgrade_debug_flag"
+UPGRADE_FILE_DIR = "/tmp/firmware/"
+
+UPGRADEDEBUG = 1
+
+debuglevel = 0
+
+COLD_UPGRADE = 1
+WARM_UPGRADE = 2
+TEST_UPGRADE = 3
+BMC_UPGRADE = 4
+
+CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+
+
+class AliasedGroup(click.Group):
+
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        if len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+        return None
+
+
+def debug_init():
+    global debuglevel
+    if os.path.exists(UPGRADE_DEBUG_FILE):
+        debuglevel = debuglevel | UPGRADEDEBUG
+    else:
+        debuglevel = debuglevel & ~(UPGRADEDEBUG)
+
+
+def upgradewarninglog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("UPGRADE", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_WARNING, s)
+
+
+def upgradecriticallog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("UPGRADE", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_CRIT, s)
+
+
+def upgradeerror(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("UPGRADE", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_ERR, s)
+
+
+def upgradedebuglog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    if UPGRADEDEBUG & debuglevel:
+        syslog.openlog("UPGRADE", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def signal_init():
+    signal.signal(signal.SIGINT, signal.SIG_IGN)  # ignore ctrl+c signal
+    signal.signal(signal.SIGTERM, signal.SIG_IGN)  # ignore kill signal
+    signal.signal(signal.SIGTSTP, signal.SIG_IGN)  # ignore ctrl+z signal
+
+
+class BasePlatform():
+
+    def __init__(self):
+        self.upgrade_param = UPGRADE_SUMMARY.copy()
+        self.devtype = self.upgrade_param.get('devtype', None)
+        self.max_slot_num = self.upgrade_param.get("max_slot_num", 0)
+        self.head_info_config = {}
+        self.slot_config = {}
+        self.cold_chain_config = {}
+        self.subtype = None
+        self.chain = None
+        self.filetype = None
+        self.DEVTYPE = None
+        self.SUBTYPE = '0'
+        self.TYPE = None
+        self.CHAIN = None
+        self.CHIPNAME = None
+        self.VERSION = None
+        self.FILETYPE = None
+        self.CRC = None
+        self.SUBTYPE_LIST = None
+
+    def save_and_set_value(self, cfg_list):
+        for config in cfg_list:
+            ret, val = get_value(config)
+            if ret:
+                config["save_value"] = val
+            else:
+                upgradeerror(val)
+                return False, "get save value fail"
+
+            set_val = config.get("set_value", None)
+            if set_val is None:
+                log = "save_and_set_value lack of set_val config"
+                upgradeerror(log)
+                return log
+
+            gettype = config.get("gettype", None)
+            set_cmd = config.get("set_cmd", None)
+            if gettype == "cmd":
+                if set_cmd is None:
+                    log = "save_and_set_value lack of set_cmd config"
+                    upgradeerror(log)
+                    return False, log
+                config["cmd"] = set_cmd % set_val
+                upgradedebuglog("save_and_set_value modify set cmd to %s" % config["cmd"])
+            else:
+                config["value"] = set_val
+                upgradedebuglog("save_and_set_value modify set val to %s" % config["value"])
+
+            ret, log = set_value(config)
+            if ret is False:
+                upgradeerror(log)
+                return False, log
+        return True, "save and set value success"
+
+    def recover_save_value(self, cfg_list):
+        total_err = 0
+        for config in cfg_list:
+            upgradedebuglog("config: %s, recover save value" % config)
+            val = config.get("save_value", None)
+            if val is None:
+                upgradeerror("recover_save_value lack of save_value config")
+                total_err -= 1
+                continue
+            gettype = config.get("gettype", None)
+            set_cmd = config.get("set_cmd", None)
+            if gettype == "cmd":
+                config["cmd"] = set_cmd % val
+                upgradedebuglog("recover_save_value modify set cmd to %s" % config["cmd"])
+            else:
+                config["value"] = val
+                upgradedebuglog("recover_save_value modify set val to %s" % config["value"])
+
+            ret, log = set_value(config)
+            if ret is False:
+                upgradeerror("recover save value write failed, log: %s" % log)
+                total_err -= 1
+            else:
+                upgradedebuglog("recover save value success")
+        if total_err < 0:
+            return False, "recover save value failed"
+        return True, "recover save value success"
+
+    def check_slot_present(self, slot_present_config):
+        presentbit = slot_present_config.get('presentbit')
+        ret, value = get_value(slot_present_config)
+        if ret is False:
+            return "NOT OK"
+        if isinstance(value, str):
+            val_t = int(value, 16)
+        else:
+            val_t = value
+        val_t = (val_t & (1 << presentbit)) >> presentbit
+        if val_t != slot_present_config.get('okval'):
+            status = "ABSENT"
+        else:
+            status = "PRESENT"
+        return status
+
+    def linecard_present_check(self, slot_present_config):
+        present_status = self.check_slot_present(slot_present_config)
+        if present_status == "NOT OK":
+            return ERR_FW_DEVICE_ACCESS, "get slot present status failed."
+        if present_status == "ABSENT":
+            return ERR_FW_CARD_ABSENT, "slot absent"
+        return CHECK_OK, "slot present"
+
+    def subprocess_warm_upgrade(self, config, file, main_type, sub_type, slot):
+        dev_name = config.get("name", None)
+        status, output = self.subprocess_firmware_upgrade(config, file, main_type, sub_type, slot)
+        if status is False:
+            upgradeerror("%s warm upgrade failed" % dev_name)
+            return False, output
+        command = "warm_upgrade.py %s 0x%x 0x%x %s %s %s" % (file, main_type, sub_type, slot, self.filetype, self.chain)
+        upgradedebuglog("warm upgrade cmd: %s" % command)
+        if os.path.exists(UPGRADE_DEBUG_FILE):
+            status, output = exec_os_cmd_log(command)
+        else:
+            status, output = exec_os_cmd(command)
+        if status:
+            upgradeerror("%s warm upgrade failed" % dev_name)
+            return False, output
+        upgradedebuglog("%s warm upgrade success" % dev_name)
+        return True, "upgrade success"
+
+    def do_fw_upg_init_cmd(self, dev_name, init_cmd_list):
+        # pre operation
+        try:
+            for init_cmd_config in init_cmd_list:
+                ret, log = set_value(init_cmd_config)
+                if ret is False:
+                    upgradeerror("%s do init cmd: %s failed, msg: %s" % (dev_name, init_cmd_config, log))
+                    return False, log
+            msg = "%s firmware init cmd all set success" % dev_name
+            upgradedebuglog(msg)
+            return True, msg
+        except Exception as e:
+            return False, str(e)
+
+    def do_fw_upg_finish_cmd(self, dev_name, finish_cmd_list):
+        # end operation
+        ret = 0
+        for finish_cmd_config in finish_cmd_list:
+            ret_t, log = set_value(finish_cmd_config)
+            if ret_t is False:
+                upgradeerror("%s do finish cmd: %s failed, msg: %s" % (dev_name, finish_cmd_config, log))
+                ret = -1
+        if ret != 0:
+            msg = "%s firmware finish cmd exec failed" % dev_name
+            upgradeerror(msg)
+            return False, msg
+        msg = "%s firmware finish cmd all set success" % dev_name
+        upgradedebuglog(msg)
+        return True, msg
+
+    def subprocess_firmware_upgrade(self, config, file, main_type, sub_type, slot):
+        dev_name = config.get("name", None)
+        init_cmd_list = config.get("init_cmd", [])
+        finish_cmd_list = config.get("finish_cmd", [])
+        try:
+            ret, log = self.do_fw_upg_init_cmd(dev_name, init_cmd_list)
+            if ret is False:
+                self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+                return False, log
+            time.sleep(0.5)  # delay 0.5s after execute init_cmd
+            command = "firmware_upgrade %s 0x%x 0x%x %s" % (file, main_type, sub_type, slot)
+            upgradedebuglog("firmware upgrade cmd: %s" % command)
+            if os.path.exists(UPGRADE_DEBUG_FILE):
+                status, output = exec_os_cmd_log(command)
+            else:
+                status, output = exec_os_cmd(command)
+            if status:
+                self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+                upgradeerror("%s firmware upgrade failed, msg: %s" % (dev_name, output))
+                return False, output
+            upgradedebuglog("%s firmware upgrade success" % dev_name)
+            ret, log = self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+            if ret is False:
+                return False, log
+            return True, "upgrade success"
+        except Exception as e:
+            self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+            return False, str(e)
+
+    def subprocess_test_upgrade(self, config, file, main_type, sub_type, slot):
+        dev_name = config.get("name", None)
+        init_cmd_list = config.get("init_cmd", [])
+        finish_cmd_list = config.get("finish_cmd", [])
+        try:
+            ret, log = self.do_fw_upg_init_cmd(dev_name, init_cmd_list)
+            if ret is False:
+                self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+                return False, log
+            time.sleep(0.5)  # delay 0.5s after execute init_cmd
+            command = "firmware_upgrade test %s 0x%x 0x%x %s" % (file, main_type, sub_type, slot)
+            upgradedebuglog("firmware upgrade cmd: %s" % command)
+            if os.path.exists(UPGRADE_DEBUG_FILE):
+                status, output = exec_os_cmd_log(command)
+            else:
+                status, output = exec_os_cmd(command)
+            if status:
+                self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+                upgradeerror("%s test upgrade failed, msg: %s" % (dev_name, output))
+                return False, output
+            upgradedebuglog("%s test upgrade success" % dev_name)
+            ret, log = self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+            if ret is False:
+                return False, log
+            return True, "upgrade success"
+        except Exception as e:
+            self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+            return False, str(e)
+
+    def subprocess_bmc_upgrade(self, config, file, chip_select, erase_type):
+        dev_name = config.get("name", None)
+        init_cmd_list = config.get("init_cmd", [])
+        finish_cmd_list = config.get("finish_cmd", [])
+        save_set_reg_list = config.get("save_set_reg", [])
+        try:
+            # save and set reg
+            ret, log = self.save_and_set_value(save_set_reg_list)
+            if ret is False:
+                upgradeerror(log)
+                self.recover_save_value(save_set_reg_list)
+                self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+                return False, log
+            upgradedebuglog("%s save and set cmd all set success" % dev_name)
+            time.sleep(0.5)  # delay 0.5s after execute save and set reg
+
+            # pre operation
+            ret, log = self.do_fw_upg_init_cmd(dev_name, init_cmd_list)
+            if ret is False:
+                self.recover_save_value(save_set_reg_list)
+                self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+                return False, log
+
+            upgradedebuglog("%s bmc init cmd all set success" % dev_name)
+            time.sleep(0.5)  # delay 0.5s after execute init_cmd
+
+            command = "fw_upgrade upgrade %s %s %s" % (file, chip_select, erase_type)
+            upgradedebuglog("fw_upgrade upgrade cmd: %s" % command)
+            status, output = exec_os_cmd_log(command)
+            if status:
+                upgradeerror("%s bmc upgrade failed" % dev_name)
+                self.recover_save_value(save_set_reg_list)
+                self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+                return False, output
+            upgradedebuglog("%s bmc upgrade success" % dev_name)
+
+            ret1, log1 = self.recover_save_value(save_set_reg_list)
+            if ret1 is False:
+                upgradeerror("bmc upgrade recover save value failed, msg: %s" % log1)
+            ret2, log2 = self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+            if ret2 is False:
+                upgradeerror("bmc upgrade do finish command failed, msg: %s" % log2)
+            if ret1 is False or ret2 is False:
+                return False, "bmc upgrade do recover save value or finish command failed"
+            return True, "upgrade success"
+
+        except Exception as e:
+            self.recover_save_value(save_set_reg_list)
+            self.do_fw_upg_finish_cmd(dev_name, finish_cmd_list)
+            return False, str(e)
+
+    def file_head_param_check(self, head_info_config):
+        try:
+            self.DEVTYPE = head_info_config.get('DEVTYPE', None)
+            self.SUBTYPE = head_info_config.get('SUBTYPE', '0')
+            self.TYPE = head_info_config.get('TYPE', None)
+            self.CHAIN = head_info_config.get('CHAIN', None)
+            self.CHIPNAME = head_info_config.get('CHIPNAME', None)
+            self.VERSION = head_info_config.get('VERSION', None)
+            self.FILETYPE = head_info_config.get('FILETYPE', None)
+            self.CRC = head_info_config.get('CRC', None)
+
+            if self.devtype != int(self.DEVTYPE, 16):
+                return ERR_FW_HEAD_CHECK, ("no support %s devtype" % self.DEVTYPE)
+
+            if self.SUBTYPE is not None:
+                self.SUBTYPE_LIST = self.SUBTYPE.split(',')
+                self.SUBTYPE_LIST = [int(tmp_subtype, base=16) for tmp_subtype in self.SUBTYPE_LIST]
+                if len(self.SUBTYPE) != 0 and self.subtype not in self.SUBTYPE_LIST:
+                    return ERR_FW_HEAD_CHECK, ("no support %s SUBTYPE" % self.SUBTYPE)
+
+            if len(self.CHAIN) == 0 or len(self.FILETYPE) == 0:
+                return ERR_FW_HEAD_CHECK, ("CHAIN:%s, FILETYPE:%s get failed" % (self.CHAIN, self.FILETYPE))
+            self.chain = int(self.CHAIN)
+            self.filetype = self.FILETYPE
+            upgradedebuglog("file head param: devtype:0x%x, subtype:0x%x, chain:%s, filetype:%s"
+                            % (self.devtype, self.subtype, self.chain, self.filetype))
+            return CHECK_OK, "SUCCESS"
+        except Exception as e:
+            return ERR_FW_RAISE_EXCEPTION, str(e)
+
+    def parse_file_head(self, file):
+        try:
+            self.head_info_config = {}
+            with open(file, 'r', errors='ignore') as fd:
+                rdbuf = fd.read()
+            upgradedebuglog("start parse upgrade file head")
+            file_head_start = rdbuf.index('FILEHEADER(\n')  # ponit to F
+            file_head_start += rdbuf[file_head_start:].index('\n')  # ponit to \n
+            file_head_end = rdbuf.index(')\n')
+            header_buf = rdbuf[file_head_start + 1: file_head_end - 1]
+            upgradedebuglog("upgrade file head find FILEHEADER")
+            for line in header_buf.split('\n'):
+                head_list = line.split('=', 1)
+                head_key = head_list[0]
+                head_val = head_list[1]
+                self.head_info_config[head_key] = head_val
+            upgradedebuglog("file: %s head_info_config: %s" % (file, self.head_info_config))
+            return CHECK_OK, "SUCCESS"
+        except Exception as e:
+            msg = "parse %s head failed, msg: %s" % (file, str(e))
+            upgradeerror(msg)
+            return ERR_FW_RAISE_EXCEPTION, msg
+
+    def get_file_size_k(self, file):
+        fsize = os.path.getsize(file)
+        fsize = fsize / float(1024)
+        return round(fsize, 2)
+
+    def get_device_model(self, conf):
+        ret, val = get_value(conf)
+        if ret is False:
+            msg = "get device model failed, msg: %s" % val
+            return False, msg
+        decode_val = conf.get("decode")
+        if decode_val is None:
+            return True, val
+        for k, v in decode_val.items():
+            if val == v:
+                return True, k
+        msg = "device model decode error, val: %s" % val
+        return False, msg
+
+    def upgrade_fool_proofing(self, conf):
+        try:
+            status, dev_model = self.get_device_model(conf)
+            if status is False:
+                msg = "upgrade fool proofing get device model failed, msg: %s" % dev_model
+                upgradeerror(msg)
+                return False, msg
+            upgradedebuglog("get device model success, device model: %s" % dev_model)
+            if dev_model != self.VERSION:
+                msg = "upgrade fool proofing failed, device model: %s, upgrade file version: %s" % (
+                    dev_model, self.VERSION)
+                upgradedebuglog(msg)
+                return False, msg
+            msg = "upgrade fool proofing pass, device model: %s, upgrade file version: %s" % (dev_model, self.VERSION)
+            upgradedebuglog(msg)
+            return True, msg
+        except Exception as e:
+            upgradeerror(str(e))
+            return False, str(e)
+
+    def upgrading(self, config, file, devtype, subtype, slot, option_flag, erase_type=None):
+        dev_name = config.get("name", None)
+        if option_flag == COLD_UPGRADE:
+            status, output = self.subprocess_firmware_upgrade(config, file, devtype, subtype, slot)
+        elif option_flag == WARM_UPGRADE:
+            status, output = self.subprocess_warm_upgrade(config, file, devtype, subtype, slot)
+        elif option_flag == TEST_UPGRADE:
+            status, output = self.subprocess_test_upgrade(config, file, devtype, subtype, slot)
+        elif option_flag == BMC_UPGRADE:
+            status, output = self.subprocess_bmc_upgrade(config, file, slot, erase_type)
+        else:
+            log = "%s set error option flag" % dev_name
+            upgradeerror(log)
+            return False, log
+
+        if status is False:
+            upgradeerror("%s upgrade failed" % dev_name)
+            return False, output
+        upgradedebuglog("%s upgrade success" % dev_name)
+        return True, "upgrade success"
+
+    def initial_check(self, file, slot, upg_type):
+        try:
+            upgradedebuglog("BasePlatform initial_check, file: %s, slot: %s, upg_type: %s" %
+                            (file, slot, upg_type))
+
+            upgradedebuglog("do file exist check...")
+            if not os.path.isfile(file):
+                msg = "%s not found" % file
+                upgradedebuglog(msg)
+                return ERR_FW_FILE_FOUND, msg
+            upgradedebuglog("file exist check ok")
+
+            slot_name = "slot%d" % slot
+            slot_config = self.upgrade_param.get(slot_name, {})
+            slot_present_config = slot_config.get("present", {})
+            if len(slot_present_config) != 0:
+                upgradedebuglog("do %s present check..." % slot_name)
+                ret, log = self.linecard_present_check(slot_present_config)
+                if ret != CHECK_OK:
+                    msg = "check %s present error, msg: %s" % (slot_name, log)
+                    upgradedebuglog(msg)
+                    return ret, msg
+                upgradedebuglog("%s present check ok" % slot_name)
+
+            upgradedebuglog("do file head parse...")
+            self.subtype = slot_config.get("subtype", 0)
+            ret, log = self.parse_file_head(file)
+            if ret != CHECK_OK:
+                return ret, log
+            upgradedebuglog("file head parse success")
+
+            upgradedebuglog("do file head check...")
+            ret, log = self.file_head_param_check(self.head_info_config)
+            if ret != CHECK_OK:
+                msg = "file: %s, head check failed, msg: %s" % (file, log)
+                upgradedebuglog(msg)
+                return ret, msg
+            upgradedebuglog("file head check ok")
+
+            upgradedebuglog("get upgrade chain config...")
+            filetype_config = slot_config.get(self.filetype, {})
+            if len(filetype_config) == 0:
+                msg = "file: %s filetype: %s no support" % (file, self.filetype)
+                upgradedebuglog(msg)
+                return ERR_FW_CONFIG_FOUND, msg
+            chain_num = "chain%s" % self.chain
+            chain_config = filetype_config.get(chain_num, {})
+            if len(chain_config) == 0:
+                msg = "file: %s get %s config failed" % (file, chain_num)
+                upgradedebuglog(msg)
+                return ERR_FW_CONFIG_FOUND, msg
+            self.cold_chain_config = chain_config
+            upgradedebuglog("get %s filetype: %s %s config success" % (slot_name, self.filetype, chain_num))
+
+            fool_proofing = chain_config.get("fool_proofing")
+            if fool_proofing is not None:
+                upgradedebuglog("do fool proofing check...")
+                status, log = self.upgrade_fool_proofing(fool_proofing)
+                if status is False:
+                    msg = "upgrade fool proofing check failed, msg: %s" % log
+                    upgradedebuglog(msg)
+                    return ERR_FW_FOOL_PROOF, msg
+                upgradedebuglog("do fool proofing check ok")
+
+            if upg_type == WARM_UPGRADE:
+                upgradedebuglog("do support warm upgrade check...")
+                if chain_config.get("is_support_warm_upg", 0) != 1:
+                    msg = "file: %s %s chain config not support warm upgrade" % (file, slot_name)
+                    upgradedebuglog(msg)
+                    return ERR_FW_NOSUPPORT_HOT, msg
+                upgradedebuglog("file: %s %s chain config support warm upgrade" % (file, slot_name))
+
+            filesizecheck = chain_config.get("filesizecheck", 0)
+            if filesizecheck != 0:
+                upgradedebuglog("do file size check...")
+                file_size = self.get_file_size_k(file)
+                if file_size > filesizecheck:
+                    msg = "file: %s size: %s exceed %s" % (file, file_size, filesizecheck)
+                    upgradedebuglog(msg)
+                    return ERR_FW_CHECK_SIZE, msg
+                msg = "file: %s size: %s check ok" % (file, file_size)
+                upgradedebuglog(msg)
+
+            msg = "file: %s slot: %s upgrade type: %s check ok" % (file, slot, upg_type)
+            upgradedebuglog(msg)
+            return CHECK_OK, msg
+        except Exception as e:
+            return ERR_FW_RAISE_EXCEPTION, str(e)
+
+    def do_upgrade(self, file, slot, upg_type):
+        try:
+            ret, log = self.initial_check(file, slot, upg_type)
+            if ret != CHECK_OK:
+                return ret, log
+
+            # start upgrading
+            upgradedebuglog("start upgrading")
+            ret, log = self.upgrading(self.cold_chain_config, file, self.devtype, self.subtype, slot, upg_type)
+            if ret is False:
+                upgradeerror("upgrade failed")
+                return ERR_FW_UPGRADE, log
+            upgradedebuglog("upgrade success")
+            return FIRMWARE_SUCCESS, "SUCCESS"
+        except Exception as e:
+            return ERR_FW_RAISE_EXCEPTION, str(e)
+
+    def do_pre_check(self, conf):
+        ret, val = get_value(conf)
+        if ret is False:
+            msg = "pre check get value failed, msg: %s" % val
+            return False, msg
+        ok_val = conf.get("ok_val")
+        if val == ok_val:
+            msg = "pre check success, ok_val: %s, get value: %s" % (ok_val, val)
+            return True, msg
+        msg = "pre check failed, ok_val: %s, get value: %s" % (ok_val, val)
+        return False, msg
+
+    def do_test(self, device, slot):
+        try:
+            # slot present check
+            slot_name = "slot%d" % slot
+            slot_config = self.upgrade_param.get(slot_name, {})
+            slot_present_config = slot_config.get("present", {})
+            if len(slot_present_config) != 0:
+                ret, log = self.linecard_present_check(slot_present_config)
+                if ret != CHECK_OK:
+                    msg = "check %s present error, msg: %s" % (slot_name, log)
+                    upgradedebuglog(msg)
+                    return ret, msg
+                upgradedebuglog("%s present" % slot_name)
+
+            # get list of devices to be tested
+            test_config = slot_config.get("TEST", {})
+            if len(test_config) == 0:
+                return ERR_FW_CONFIG_FOUND, "test config no found"
+            device_list = test_config.get(device, [])
+            if len(device_list) == 0:
+                return ERR_FW_CONFIG_FOUND, ("logic device %s test config list not found" % device)
+
+            # test_file existence check
+            for test_config in device_list:
+                chain_num = test_config.get("chain", None)
+                test_file = test_config.get("file", None)
+                display_name = test_config.get("display_name", None)
+                if chain_num is None or test_file is None or display_name is None:
+                    log = "test_config:%s lack of config" % test_config
+                    upgradeerror(log)
+                    return ERR_FW_CONFIG_FOUND, log
+                if not os.path.isfile(test_file):
+                    return ERR_FW_FILE_FOUND, ("%s not found" % test_file)
+
+            # start testing
+            RET = 0
+            pre_check_failed = 0
+            pre_check_failed_summary = ""
+            failed_summary = "chain test failed.\ntest fail chain:"
+            success_summary = "test success chain:"
+            for test_config in device_list:
+                chain_num = test_config.get("chain", None)
+                test_file = test_config.get("file", None)
+                display_name = test_config.get("display_name", None)
+                pre_check_conf = test_config.get("pre_check", None)
+                if pre_check_conf is not None:
+                    status, msg = self.do_pre_check(pre_check_conf)
+                    if status is False:
+                        pre_check_failed += 1
+                        log = "\nchain:%d, name:%s, pre check failed, msg: %s" % (chain_num, display_name, msg)
+                        upgradedebuglog(log)
+                        pre_check_failed_summary += log
+                        continue
+                    upgradedebuglog("chain:%d, name:%s, pre check ok, msg: %s" % (chain_num, display_name, msg))
+                ret, log = self.do_upgrade(test_file, slot, TEST_UPGRADE)
+                if ret != FIRMWARE_SUCCESS:
+                    RET = -1
+                    upgradeerror("chain:%d, name:%s test failed" % (chain_num, display_name))
+                    failed_summary += "\n    chain:%d, name:%s;" % (chain_num, display_name)
+                else:
+                    upgradedebuglog("chain:%d, name:%s test success" % (chain_num, display_name))
+                    success_summary += "\n    chain:%d, name:%s;" % (chain_num, display_name)
+            if RET != 0:
+                return ERR_FW_UPGRADE, failed_summary
+            if pre_check_failed == len(device_list):
+                return ERR_FW_NO_FILE_SUCCESS, failed_summary + pre_check_failed_summary
+            return FIRMWARE_SUCCESS, success_summary
+        except Exception as e:
+            return ERR_FW_RAISE_EXCEPTION, str(e)
+
+    def do_test_main(self, device, slot):
+        print("+================================+")
+        print("|Doing upgrade test, please wait.|")
+        ret, log = self.do_test(device, slot)
+        if ret == FIRMWARE_SUCCESS:
+            print("|         test succeeded!        |")
+            print("+================================+")
+            print(log)
+            sys.exit(0)
+        else:
+            print("|         test failed!           |")
+            print("+================================+")
+            print("FAILED REASON:")
+            print(log)
+            sys.exit(1)
+
+    def do_bmc_upgrade_main(self, file, chip_select, erase_type):
+        bmc_upgrade_config = self.upgrade_param.get("BMC", {})
+        ret, log = self.upgrading(bmc_upgrade_config, file, self.devtype,
+                                  self.subtype, chip_select, BMC_UPGRADE, erase_type)
+        if ret is True:
+            print("===========upgrade succeeded!============")
+            sys.exit(0)
+        else:
+            print("============upgrade failed!==============")
+            print("FAILED REASON:")
+            print("%s" % log)
+            sys.exit(1)
+
+
+class FileUpg(object):
+    def __init__(self, config, file, devtype, subtype, slot, filetype, chain, upg_type):
+        self.config = config
+        self.file = file
+        self.devtype = devtype
+        self.subtype = subtype
+        self.slot = slot
+        self.filetype = filetype
+        self.chain = chain
+        self.upg_type = upg_type
+
+    def __repr__(self):
+        return "file:%s slot:%d" % (self.file, self.slot)
+
+
+class FwUpg(object):
+    def __init__(self):
+        self.upg_platform = BasePlatform()
+        self.warm_upg_platform = WarmBasePlatform()
+        self.max_slot_num = self.upg_platform.max_slot_num
+        self.file_list = []
+
+    def do_file_refresh(self, fw_upg_instance):
+        fw_upg_config = fw_upg_instance.config
+        fw_upg_file = fw_upg_instance.file
+        fw_upg_devtype = fw_upg_instance.devtype
+        fw_upg_subype = fw_upg_instance.subtype
+        fw_upg_slot = fw_upg_instance.slot
+        fw_upg_filetype = fw_upg_instance.filetype
+        fw_upg_chain = fw_upg_instance.chain
+        dev_name = fw_upg_config.get("name", None)
+        upgradedebuglog("%s start warm upgrade, file: %s, devtype:0x%x, subype: 0x%x, slot: %d, filetype: %s, chain: %d" %
+                        (dev_name, fw_upg_file, fw_upg_devtype, fw_upg_subype, fw_upg_slot, fw_upg_filetype, fw_upg_chain))
+        status, output = self.warm_upg_platform.do_warmupgrade(fw_upg_file, fw_upg_devtype, fw_upg_subype, fw_upg_slot,
+                                                               fw_upg_filetype, fw_upg_chain)
+        if status is False:
+            upgradeerror("%s warm upgrade failed, msg: %s" % (dev_name, output))
+            return False, output
+        upgradedebuglog("%s warm upgrade success" % dev_name)
+        return True, "upgrade success"
+
+    def do_refresh(self):
+        try:
+            exec_os_cmd("touch %s" % WARM_UPGRADE_STARTED_FLAG)
+            exec_os_cmd("sync")
+
+            # stop upper layer services access
+            ret, log = self.warm_upg_platform.stop_services_access()
+            if ret is False:
+                upgradeerror("stop upper layer services access failed")
+                upgradeerror(log)
+                return ERR_FW_UPGRADE, log
+            upgradedebuglog("stop upper layer services access success")
+
+            for file_instance in self.file_list:
+                file_info = repr(file_instance)
+                ret, log = self.do_file_refresh(file_instance)
+                if ret is False:
+                    msg = "%s refresh failed, ret:%s, \n log:%s." % (file_info, ret, log)
+                    upgradeerror(msg)
+                    return ERR_FW_UPGRADE, msg
+                upgradedebuglog("%s refresh success." % file_info)
+            msg = "all files refresh success."
+            return FIRMWARE_SUCCESS, msg
+        except Exception as e:
+            msg = "do warm upg exception happend. log:%s" % str(e)
+            upgradeerror(msg)
+            return ERR_FW_UPGRADE, msg
+        finally:
+            self.warm_upg_platform.start_services_access()
+            if os.path.isfile(WARM_UPGRADE_STARTED_FLAG):
+                exec_os_cmd("rm -rf %s" % WARM_UPGRADE_STARTED_FLAG)
+                exec_os_cmd("sync")
+
+    def do_file_cold_upg(self, fw_upg_instance):
+        try:
+            upgradedebuglog("start cold upgrade")
+            fw_upg_config = fw_upg_instance.config
+            fw_upg_file = fw_upg_instance.file
+            fw_upg_devtype = fw_upg_instance.devtype
+            fw_upg_subype = fw_upg_instance.subtype
+            fw_upg_slot = fw_upg_instance.slot
+            ret, log = self.upg_platform.upgrading(
+                fw_upg_config, fw_upg_file, fw_upg_devtype, fw_upg_subype, fw_upg_slot, COLD_UPGRADE)
+            if ret is False:
+                upgradeerror("cold upgrade %s slot%d failed, log:%s" % (fw_upg_file, fw_upg_slot, log))
+                return ERR_FW_UPGRADE, log
+            log = "cold upgrade %s slot%d success" % (fw_upg_file, fw_upg_slot)
+            upgradedebuglog(log)
+            return FIRMWARE_SUCCESS, log
+        except Exception as e:
+            msg = "do cold upg exception happend. log:%s" % str(e)
+            upgradeerror(msg)
+            return ERR_FW_UPGRADE, msg
+
+    def do_file_init_check(self, file_path, slot, upg_type):
+        upgradedebuglog("do_file_init_check, file_path: %s, slot: %s, upg_type: %s" % (file_path, slot, upg_type))
+
+        if slot is None:  # traverse all slots
+            for i in range(0, self.max_slot_num + 1):
+                ret, log = self.upg_platform.initial_check(file_path, i, upg_type)
+                if ret != CHECK_OK:
+                    upgradedebuglog(
+                        "file: %s, slot%d initial check not ok, ret: %d, msg: %s" %
+                        (file_path, i, ret, log))
+                    accept_error = (ERR_FW_CARD_ABSENT, ERR_FW_HEAD_CHECK, ERR_FW_FOOL_PROOF)
+                    if ret in accept_error:
+                        msg = "file: %s, slot%d initial check ret: %d, acceptable error." % (file_path, i, ret)
+                        upgradedebuglog(msg)
+                        continue
+                    return ret, log
+                file_instance = FileUpg(self.upg_platform.cold_chain_config, file_path, self.upg_platform.devtype,
+                                        self.upg_platform.subtype, i, self.upg_platform.filetype, self.upg_platform.chain, upg_type)
+                self.file_list.append(file_instance)
+        else:
+            slot = int(slot, 10)
+            ret, log = self.upg_platform.initial_check(file_path, slot, upg_type)
+            if ret != CHECK_OK:
+                msg = "file: %s, slot%d initial check not ok, ret: %d,  msg: %s" % (file_path, slot, ret, log)
+                return ret, msg
+            file_instance = FileUpg(self.upg_platform.cold_chain_config, file_path, self.upg_platform.devtype,
+                                    self.upg_platform.subtype, slot, self.upg_platform.filetype, self.upg_platform.chain, upg_type)
+            self.file_list.append(file_instance)
+        msg = "file: %s all slots init check ok" % file_path
+        return CHECK_OK, msg
+
+    def do_dir_init_check(self, path, slot, upg_type):
+        for root, dirs, names in os.walk(path):
+            # root: directory absolute path
+            # dirs: folder path collection under directory
+            # names: file path collection under directory
+            for filename in names:
+                # file_path is file absolute path
+                file_path = os.path.join(root, filename)
+                ret, log = self.do_file_init_check(file_path, slot, upg_type)
+                if ret != CHECK_OK:
+                    return ret, log
+        msg = "all files in dir have been check ok"
+        upgradedebuglog(msg)
+        return CHECK_OK, msg
+
+    def do_fw_upg(self, path, slot, upg_type):
+        match_zip_file_flag = False
+        try:
+            upgradedebuglog("do_fw_upg, path: %s, slot: %s, upg_type: %s" % (path, slot, upg_type))
+            if slot is not None and not slot.isdigit():
+                msg = "invalid slot param: %s" % slot
+                upgradeerror(msg)
+                return ERR_FW_INVALID_PARAM, msg
+
+            upgradedebuglog("start init check")
+            if os.path.isfile(path) and path.endswith(".zip"):
+                upgradedebuglog("firmware upgrade via compressed package: %s" % path)
+                # remove origin firmware upgrade file
+                exec_os_cmd("rm -rf %s" % UPGRADE_FILE_DIR)
+                cmd = "unzip -o %s -d /tmp/" % path
+                if os.path.exists(UPGRADE_DEBUG_FILE):
+                    status, output = exec_os_cmd_log(cmd)
+                else:
+                    status, output = exec_os_cmd(cmd)
+                if status:
+                    msg = "unzip %s failed, log: %s" % (path, output)
+                    upgradeerror(msg)
+                    return ERR_FW_UNZIP_FAILED, msg
+                match_zip_file_flag = True
+                path = UPGRADE_FILE_DIR
+
+            if os.path.isdir(path):
+                ret, msg = self.do_dir_init_check(path, slot, upg_type)
+            elif os.path.isfile(path):
+                ret, msg = self.do_file_init_check(path, slot, upg_type)
+            else:
+                ret = ERR_FW_FILE_FOUND
+                msg = "path: %s not found" % path
+                upgradeerror(msg)
+
+            if ret != CHECK_OK:
+                return ret, msg
+
+            # self.file_list is a collection of all check ok files
+            if len(self.file_list) == 0:
+                msg = "all file upgrade check not be satisfied."
+                upgradeerror(msg)
+                return ERR_FW_NO_FILE_SUCCESS, msg
+
+            SUCCUSS_FILE_SUMMARY = "SUCCESS FILE: \n"
+            # file cold upgrade
+            upgradedebuglog("start all files cold upgrade")
+            for file_instance in self.file_list:
+                file_info = repr(file_instance)
+                ret, log = self.do_file_cold_upg(file_instance)
+                if ret != FIRMWARE_SUCCESS:
+                    msg = "%s cold upgrade failed, ret:%d, \n log:\n%s." % (file_info, ret, log)
+                    upgradeerror(msg)
+                    return ret, msg
+                SUCCUSS_FILE_SUMMARY += "%s \n" % file_info
+                upgradedebuglog("%s cold upgrade success." % file_info)
+
+            # file refresh upgrade
+            if upg_type == WARM_UPGRADE:
+                upgradedebuglog("start all files refresh upgrade")
+                ret, log = self.do_refresh()
+                if ret != FIRMWARE_SUCCESS:
+                    return ret, log
+
+            msg = "all file upgrade success"
+            upgradedebuglog(msg)
+            return FIRMWARE_SUCCESS, SUCCUSS_FILE_SUMMARY
+        except Exception as e:
+            msg = "do dir upgrade exception happend. log: %s" % str(e)
+            upgradeerror(msg)
+            return ERR_FW_UPGRADE, msg
+        finally:
+            if match_zip_file_flag is True:
+                exec_os_cmd("rm -rf %s" % UPGRADE_FILE_DIR)
+
+    def fw_upg(self, path, slot, upg_type):
+        print("+================================+")
+        print("|  Doing upgrade, please wait... |")
+        ret, log = self.do_fw_upg(path, slot, upg_type)
+        if ret == FIRMWARE_SUCCESS:
+            print("|       upgrade succeeded!       |")
+            print("+================================+")
+            print(log)
+            sys.exit(0)
+        else:
+            print("|        upgrade failed!         |")
+            print("+================================+")
+            print("FAILED REASON:")
+            print("%s" % log)
+            sys.exit(1)
+
+
+@click.group(cls=AliasedGroup, context_settings=CONTEXT_SETTINGS)
+def main():
+    '''upgrade script'''
+
+
+# cold upgrade
+@main.command()
+@click.argument('file_name', required=True)
+@click.argument('slot_num', required=False, default=None)
+def cold(file_name, slot_num):
+    '''cold upgrade'''
+    fwupg = FwUpg()
+    fwupg.fw_upg(file_name, slot_num, COLD_UPGRADE)
+
+
+# warm upgrade
+@main.command()
+@click.argument('file_name', required=True)
+@click.argument('slot_num', required=False, default=None)
+def warm(file_name, slot_num):
+    '''warm upgrade'''
+    fwupg = FwUpg()
+    fwupg.fw_upg(file_name, slot_num, WARM_UPGRADE)
+
+
+# test upgrade
+@main.command()
+@click.argument('device', required=True)
+@click.argument('slot_num', required=True)
+def test(device, slot_num):
+    '''upgrade test'''
+    platform = BasePlatform()
+    platform.do_test_main(device, int(slot_num))
+
+
+# BMC upgrade
+@main.command()
+@click.argument('file_name', required=True)
+@click.argument('chip_select', required=False, default="2")
+@click.argument('erase_type', required=False, default="full")
+def bmc(file_name, chip_select, erase_type):
+    '''BMC upgrade'''
+    platform = BasePlatform()
+    platform.do_bmc_upgrade_main(file_name, chip_select, erase_type)
+
+
+if __name__ == '__main__':
+    signal_init()
+    debug_init()
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/warm_upgrade.py b/platform/broadcom/sonic-platform-modules-micas/common/script/warm_upgrade.py
new file mode 100755
index 000000000000..69a310faa606
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/warm_upgrade.py
@@ -0,0 +1,514 @@
+#!/usr/bin/env python3
+# -*- coding: UTF-8 -*-
+import sys
+import os
+import time
+import syslog
+import signal
+import click
+from platform_util import get_value, set_value, exec_os_cmd, exec_os_cmd_log
+from platform_config import WARM_UPGRADE_PARAM
+
+
+WARM_UPGRADE_DEBUG_FILE = "/etc/.warm_upgrade_debug_flag"
+
+WARMUPGRADEDEBUG = 1
+
+debuglevel = 0
+
+CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
+
+
+class AliasedGroup(click.Group):
+
+    def get_command(self, ctx, cmd_name):
+        rv = click.Group.get_command(self, ctx, cmd_name)
+        if rv is not None:
+            return rv
+        matches = [x for x in self.list_commands(ctx)
+                   if x.startswith(cmd_name)]
+        if not matches:
+            return None
+        if len(matches) == 1:
+            return click.Group.get_command(self, ctx, matches[0])
+        ctx.fail('Too many matches: %s' % ', '.join(sorted(matches)))
+        return None
+
+
+def debug_init():
+    global debuglevel
+    if os.path.exists(WARM_UPGRADE_DEBUG_FILE):
+        debuglevel = debuglevel | WARMUPGRADEDEBUG
+    else:
+        debuglevel = debuglevel & ~(WARMUPGRADEDEBUG)
+
+
+def warmupgradewarninglog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("WARMUPGRADE", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_WARNING, s)
+
+
+def warmupgradecriticallog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("WARMUPGRADE", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_CRIT, s)
+
+
+def warmupgradeerror(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    syslog.openlog("WARMUPGRADE", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_ERR, s)
+
+
+def warmupgradedebuglog(s):
+    # s = s.decode('utf-8').encode('gb2312')
+    if WARMUPGRADEDEBUG & debuglevel:
+        syslog.openlog("WARMUPGRADE", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_DEBUG, s)
+
+
+def subprocess_warm_upgrade(file, main_type, sub_type, slot):
+    command = "firmware_upgrade %s 0x%x 0x%x %s" % (file, main_type, sub_type, slot)
+    warmupgradedebuglog("warm upgrade firmware cmd:%s" % command)
+    if os.path.exists(WARM_UPGRADE_DEBUG_FILE):
+        return exec_os_cmd_log(command)
+    return exec_os_cmd(command)
+
+
+def signal_init():
+    signal.signal(signal.SIGINT, signal.SIG_IGN)  # ignore ctrl+c signal
+    signal.signal(signal.SIGTERM, signal.SIG_IGN)  # ignore kill signal
+    signal.signal(signal.SIGTSTP, signal.SIG_IGN)  # ignore ctrl+z signal
+
+
+class RefreshUpgradeBase(object):
+
+    def __init__(self, config, slot_num, devtype, subtype):
+        self._config = config
+        self._slot_num = slot_num
+        self._devtype = devtype
+        self._subtype = subtype
+        self.device_name = self._config.get("name", None)
+        self.refresh_file = self._config.get("refresh_file", None)
+        self.init_cmd_list = self._config.get("init_cmd", [])
+        self.save_set_reg_list = self._config.get("save_set_reg", [])
+        self.rw_recover_reg_list = self._config.get("rw_recover_reg", [])
+        self.after_upgrade_delay = self._config.get("after_upgrade_delay", None)
+        self.after_upgrade_delay_timeout = self._config.get("after_upgrade_delay_timeout", None)
+        self.refresh_finish_flag_check_config = self._config.get("refresh_finish_flag_check", None)
+        self.access_check_reg_config = self._config.get("access_check_reg", {})
+        self.time_delay = 0
+        self.finish_cmd_list = self._config.get("finish_cmd", [])
+
+    def get_config(self):
+        pass
+
+    def get_slot_num(self):
+        pass
+
+    def save_value(self, cfg_list):
+        for config in cfg_list:
+            ret, val = get_value(config)
+            if ret:
+                config["value"] = val
+            else:
+                warmupgradeerror(val)
+                return False, val
+        return True, "save value success"
+
+    def save_and_set_value(self, cfg_list):
+        for config in cfg_list:
+            ret, val = get_value(config)
+            if ret:
+                config["save_value"] = val
+            else:
+                warmupgradeerror(val)
+                return False, "get save value fail"
+            set_val = config.get("set_value", None)
+            if set_val is not None:
+                config["value"] = set_val
+            else:
+                warmupgradeerror("save_and_set_value lack of set_val config")
+                return False, "set value is not config"
+            ret, log = set_value(config)
+            if ret is False:
+                warmupgradeerror(log)
+                return False, log
+        return True, "save value success"
+
+    def recover_value(self, cfg_list):
+        fail_flag = 0
+        for config in cfg_list:
+            ret, log = set_value(config)
+            if ret is False:
+                fail_flag = -1
+                warmupgradeerror("recover_value set_value failed, log: %s" % log)
+        if fail_flag != 0:
+            warmupgradeerror("recover_value write failed")
+            return False, "recover write failed"
+        return True, "recover write success"
+
+    def recover_save_value(self, cfg_list):
+        total_err = 0
+        for config in cfg_list:
+            val = config.get("save_value", None)
+            if val is None:
+                warmupgradeerror("recover_save_value lack of save_value config")
+                total_err -= 1
+                continue
+            config["value"] = val
+            ret, log = set_value(config)
+            if ret is False:
+                total_err -= 1
+                warmupgradeerror("recover save value write failed, log: %s" % log)
+            else:
+                warmupgradedebuglog("recover save value success")
+        if total_err < 0:
+            return False, "recover save value failed"
+        return True, "recover save value success"
+
+    def do_fw_upg_init_cmd(self, init_cmd_list):
+        # pre operation
+        try:
+            for init_cmd_config in init_cmd_list:
+                ret, log = set_value(init_cmd_config)
+                if ret is False:
+                    warmupgradeerror("%s do init cmd: %s failed, msg: %s" % (self.device_name, init_cmd_config, log))
+                    return False, log
+            msg = "%s warm upgrade init cmd all set success" % self.device_name
+            warmupgradedebuglog(msg)
+            return True, msg
+        except Exception as e:
+            return False, str(e)
+
+    def do_fw_upg_finish_cmd(self, finish_cmd_list):
+        # end operation
+        total_err = 0
+        for finish_cmd_config in finish_cmd_list:
+            ret_t, log = set_value(finish_cmd_config)
+            if ret_t is False:
+                warmupgradeerror("%s do finish cmd: %s failed, msg: %s" % (self.device_name, finish_cmd_config, log))
+                total_err -= 1
+        if total_err < 0:
+            msg = "%s warm upgrade finish cmd exec failed" % self.device_name
+            warmupgradeerror(msg)
+            return False, msg
+        msg = "%s warm upgrade finish cmd all set success" % self.device_name
+        warmupgradedebuglog(msg)
+        return True, msg
+
+    def access_test(self, config):
+        # polling execute command
+        polling_cmd_list = config.get("polling_cmd", [])
+        for polling_cmd_config in polling_cmd_list:
+            ret, log = set_value(polling_cmd_config)
+            if ret is False:
+                warmupgradeerror(log)
+                return False
+        polling_delay = config.get("polling_delay", None)
+        if polling_delay is not None:
+            time.sleep(polling_delay)
+
+        # record check val
+        check_val = config.get("value", None)
+        # write value
+        ret, log = set_value(config)
+        if ret is False:
+            warmupgradeerror(log)
+            return False
+        # read value
+        ret, val = get_value(config)
+        if ret is False:
+            warmupgradeerror(val)
+            return False
+
+        # compare write and read val
+        warmupgradedebuglog("check_val:%s" % check_val)
+        warmupgradedebuglog("get_value:%s" % val)
+        if val != check_val:
+            warmupgradeerror("check_val:%s != get_value:%s" % (check_val, val))
+            return False
+        return True
+
+    def check_value(self, config):
+        # record check val
+        check_val = config.get("value", None)
+        ret, val = get_value(config)
+        if ret is False:
+            warmupgradeerror(val)
+            return False
+        # compare write and read val
+        warmupgradedebuglog("check_val:%s" % check_val)
+        warmupgradedebuglog("get_value:%s" % val)
+        if val != check_val:
+            warmupgradeerror("check_val:%s != get_value:%s" % (check_val, val))
+            return False
+        return True
+
+    def refresh_file_upgrade(self):
+        try:
+            warmupgradedebuglog("start %s warm upgrading" % self.device_name)
+
+            # save and set reg
+            ret, log = self.save_and_set_value(self.save_set_reg_list)
+            if ret is False:
+                warmupgradeerror(log)
+                self.recover_save_value(self.save_set_reg_list)
+                self.do_fw_upg_finish_cmd(self.finish_cmd_list)
+                return False, log
+            warmupgradedebuglog("%s save and set reg cmd all set success" % self.device_name)
+            time.sleep(0.5)  # delay 0.5s after execute save and set reg
+
+            # pre operation
+            ret, log = self.do_fw_upg_init_cmd(self.init_cmd_list)
+            if ret is False:
+                warmupgradeerror(log)
+                self.recover_save_value(self.save_set_reg_list)
+                self.do_fw_upg_finish_cmd(self.finish_cmd_list)
+                return False, log
+            time.sleep(0.5)  # delay 0.5s after execute init_cmd
+
+            # save reg
+            ret, log = self.save_value(self.rw_recover_reg_list)
+            if ret is False:
+                warmupgradeerror("%s save reg failed" % self.device_name)
+                self.recover_save_value(self.save_set_reg_list)
+                self.do_fw_upg_finish_cmd(self.finish_cmd_list)
+                return False, log
+            warmupgradedebuglog("%s all reg save success" % self.device_name)
+
+            # upgrade refresh file
+            if self.refresh_file is not None:
+                status, output = subprocess_warm_upgrade(
+                    self.refresh_file, self._devtype, self._subtype, self._slot_num)
+                if status:
+                    log = "%s refresh file upg failed, msg: %s" % (self.device_name, output)
+                    warmupgradeerror(log)
+                    self.recover_save_value(self.save_set_reg_list)
+                    self.do_fw_upg_finish_cmd(self.finish_cmd_list)
+                    return False, log
+                warmupgradedebuglog("%s refresh file upg success" % self.device_name)
+
+            # delay the preset time after the upgrade is complete
+            if self.after_upgrade_delay is not None:
+                time.sleep(self.after_upgrade_delay)
+
+            # check something in the timeout period
+            if self.after_upgrade_delay_timeout is not None:
+                while self.time_delay < self.after_upgrade_delay_timeout:
+
+                    # check refresh finish flag
+                    if self.refresh_finish_flag_check_config is not None:
+                        ret = self.check_value(self.refresh_finish_flag_check_config)
+                        if ret is False:
+                            time.sleep(1)
+                            self.time_delay = self.time_delay + 1
+                            warmupgradedebuglog("doing refresh_finish_flag_check, time_delay:%s" % self.time_delay)
+                            continue
+                        warmupgradedebuglog("%s upgrade_finish_flag_check success. self.time_delay:%d"
+                                            % (self.device_name, self.time_delay))
+
+                    # doing logic device rw access test
+                    ret = self.access_test(self.access_check_reg_config)
+                    if ret:
+                        warmupgradedebuglog(
+                            "%s rw test success. self.time_delay:%d" %
+                            (self.device_name, self.time_delay))
+                        break
+                    time.sleep(1)
+                    self.time_delay = self.time_delay + 1
+                    warmupgradedebuglog("doing access_test, self.time_delay:%s" % self.time_delay)
+
+                if self.time_delay >= self.after_upgrade_delay_timeout:
+                    log = "wait %s access test timeout" % self.device_name
+                    warmupgradeerror(log)
+                    self.recover_save_value(self.save_set_reg_list)
+                    self.do_fw_upg_finish_cmd(self.finish_cmd_list)
+                    return False, log
+                warmupgradedebuglog("%s access test success" % self.device_name)
+
+            # recover reg
+            ret, log = self.recover_value(self.rw_recover_reg_list)
+            if ret is False:
+                warmupgradeerror("recover %s reg failed" % self.device_name)
+                self.recover_save_value(self.save_set_reg_list)
+                self.do_fw_upg_finish_cmd(self.finish_cmd_list)
+                return False, log
+            warmupgradedebuglog("recover %s reg success" % self.device_name)
+            # finally
+            ret1, log1 = self.recover_save_value(self.save_set_reg_list)
+            if ret1 is False:
+                warmupgradeerror("bmc upgrade recover save value failed, msg: %s" % log1)
+            ret2, log2 = self.do_fw_upg_finish_cmd(self.finish_cmd_list)
+            if ret2 is False:
+                warmupgradeerror("bmc upgrade do finish command failed, msg: %s" % log2)
+            if ret1 is False or ret2 is False:
+                return False, "upgrading %s recover save value or finish command failed" % self.device_name
+            return True, "upgrading %s success" % self.device_name
+
+        except Exception as e:
+            log = "refresh file upgrade Exception happend, error log : %s" % str(e)
+            self.recover_save_value(self.save_set_reg_list)
+            self.do_fw_upg_finish_cmd(self.finish_cmd_list)
+            return False, log
+
+
+class RefreshUpgrade(RefreshUpgradeBase):
+
+    def __init__(self, config, slot_num, devtype, subtype):
+        super(RefreshUpgrade, self).__init__(config, slot_num, devtype, subtype)
+
+    def get_config(self):
+        super(RefreshUpgrade, self).get_config()
+        return self._config
+
+    def get_slot_num(self):
+        super(RefreshUpgrade, self).get_slot_num()
+        return self._slot_num
+
+
+class WarmBasePlatform():
+
+    def __init__(self):
+        signal_init()
+        debug_init()
+        self.warm_upgrade_param = WARM_UPGRADE_PARAM.copy()
+        self.stop_services_cmd_list = self.warm_upgrade_param.get("stop_services_cmd", [])
+        self.start_services_cmd_list = self.warm_upgrade_param.get("start_services_cmd", [])
+        self.__warm_upgrade_config_list = []
+
+    def execute_command_list(self, cmd_list):
+        for cmd_item in cmd_list:
+            warmupgradedebuglog("execute cmd: %s" % cmd_item)
+            status, output = exec_os_cmd(cmd_item)
+            if status:
+                log = "execute %s failed, msg: %s" % (cmd_item, output)
+                warmupgradeerror(log)
+                return False, log
+        return True, "execute success"
+
+    def stop_services_access(self):
+        return self.execute_command_list(self.stop_services_cmd_list)
+
+    def start_services_access(self):
+        return self.execute_command_list(self.start_services_cmd_list)
+
+    def check_slot_present(self, slot_present_config):
+        totalerr = 0
+        presentbit = slot_present_config.get('presentbit')
+        ret, value = get_value(slot_present_config)
+        if ret is False:
+            return "NOT OK"
+        if isinstance(value, str):
+            val_t = int(value, 16)
+        else:
+            val_t = value
+        val_t = (val_t & (1 << presentbit)) >> presentbit
+        if val_t != slot_present_config.get('okval'):
+            status = "ABSENT"
+        else:
+            status = "PRESENT"
+        return status
+
+    def linecard_present_check(self, slot_name, slot_present_config):
+        present_status = self.check_slot_present(slot_present_config)
+        present_status_tuple = ("ABSENT", "NOT OK")
+        if present_status in present_status_tuple:
+            return False, ("%s not present, warm upgrade exit" % slot_name)
+        warmupgradedebuglog("%s present" % slot_name)
+        return True, ("%s present" % slot_name)
+
+    def start_warmupgrade(self):
+        try:
+            # start refresh file upgrade process
+            for dev in self.__warm_upgrade_config_list:
+                ret, log = dev.refresh_file_upgrade()
+                if ret is False:
+                    return ret, log
+            return True, "all success"
+        except Exception as e:
+            log = "Exception happend, error log : %s" % str(e)
+            return False, log
+
+    def do_warmupgrade(self, file, main_type, sub_type, slot, file_type, chain):
+        try:
+            # upgrade file existence check
+            if not os.path.isfile(file):
+                return False, "%s not found" % file
+
+            # get slot config
+            slot_name = "slot%d" % slot
+            slot_config = self.warm_upgrade_param.get(slot_name, {})
+            if len(slot_config) == 0:
+                return False, ("%s config not found" % slot_name)
+
+            # linecard present check
+            slot_present_config = slot_config.get("present", {})
+            if len(slot_present_config) != 0:
+                ret, log = self.linecard_present_check(slot_name, slot_present_config)
+                if ret is False:
+                    return False, log
+
+            # match file_type and chain_num get chain_config
+            file_type_config = slot_config.get(file_type, {})
+            chain_name = "chain%d" % chain
+            chain_list = file_type_config.get(chain_name, [])
+            self.__warm_upgrade_config_list = []
+            for refresh_config in chain_list:
+                # refresh_file existence check
+                refresh_file_judge_flag = refresh_config.get("refresh_file_judge_flag", 0)
+                if refresh_file_judge_flag == 1:
+                    refresh_file = refresh_config.get("refresh_file", None)
+                    if not os.path.isfile(refresh_file):
+                        log = "%s not found" % refresh_file
+                        return False, log
+                # each refresh_config add as an instance of RefreshUpgrade Class
+                refresh_instance = RefreshUpgrade(refresh_config, slot, main_type, sub_type)
+                self.__warm_upgrade_config_list.append(refresh_instance)
+
+            ret, log = self.start_warmupgrade()
+            if ret is False:
+                warmupgradeerror("doing warm upgrade failed")
+                warmupgradeerror(log)
+                return ret, log
+
+        except Exception as e:
+            log = "Exception happend, error log : %s" % str(e)
+            return False, log
+        return True, "all success"
+
+    def do_warm_upgrade(self, file, main_type, sub_type, slot, file_type, chain):
+        print("+================================+")
+        print("|Begin warm upgrade, please wait..|")
+        ret, log = self.do_warmupgrade(file, main_type, sub_type, slot, file_type, chain)
+        if ret:
+            print("|     warm upgrade succeeded!    |")
+            print("+================================+")
+            sys.exit(0)
+        else:
+            print("|       warm upgrade failed!     |")
+            print("+================================+")
+            print("FAILED REASON:")
+            print("%s" % log)
+            sys.exit(1)
+
+
+@click.group(invoke_without_command=True, context_settings=CONTEXT_SETTINGS)
+@click.argument('file', required=True)
+@click.argument('main_type', required=True)
+@click.argument('sub_type', required=True)
+@click.argument('slot', required=True)
+@click.argument('file_type', required=True)
+@click.argument('chain', required=True)
+def main(file, main_type, sub_type, slot, file_type, chain):
+    '''warm upgrade'''
+    signal_init()
+    debug_init()
+    platform = WarmBasePlatform()
+    platform.do_warm_upgrade(file, int(main_type, 16), int(sub_type, 16), int(slot), file_type, int(chain))
+
+
+# warm upgrade
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/service/platform_driver.service b/platform/broadcom/sonic-platform-modules-micas/common/service/platform_driver.service
new file mode 100644
index 000000000000..08a49d695c92
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/service/platform_driver.service
@@ -0,0 +1,15 @@
+[Unit]
+Description= Global Initialize platform drivers.
+After=local-fs.target
+Before=pmon.service platform_process.service
+#DefaultDependencies=no
+
+[Service]
+Type=oneshot
+ExecStart=/usr/local/bin/platform_driver.py start
+ExecStop=/usr/local/bin/platform_driver.py stop
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/service/platform_process.service b/platform/broadcom/sonic-platform-modules-micas/common/service/platform_process.service
new file mode 100644
index 000000000000..13dd778559f2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/service/platform_process.service
@@ -0,0 +1,16 @@
+[Unit]
+Description= Global Load process.
+After=platform_driver.service
+Before=determine-reboot-cause.service pmon.service
+Requires=platform_driver.service
+#DefaultDependencies=no
+
+[Service]
+Type=oneshot
+ExecStart=/usr/local/bin/platform_process.py start
+ExecStop=/usr/local/bin/platform_process.py stop
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/__init__.py
new file mode 100644
index 000000000000..b70995a582fc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/__init__.py
@@ -0,0 +1,2 @@
+__all__ = ["platform", "chassis", "sfp", "eeprom", "component", "thermal", "psu", "fan", "fan_drawer", "watchdog"]
+from . import platform
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/chassis.py
new file mode 100644
index 000000000000..b0ddc8691f2e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/chassis.py
@@ -0,0 +1,530 @@
+#!/usr/bin/env python3
+
+#############################################################################
+#
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#############################################################################
+
+try:
+    import time
+    import sys
+    from sonic_platform_base.chassis_base import ChassisBase
+    from sonic_platform.sfp import Sfp
+    from sonic_platform.psu import Psu
+    # from sonic_platform.fan import Fan
+    from sonic_platform.fan_drawer import FanDrawer
+    from sonic_platform.thermal import Thermal
+    # from sonic_platform.watchdog import Watchdog
+    from sonic_platform.component import Component
+    from sonic_platform.eeprom import Eeprom
+    from sonic_platform.dcdc import Dcdc
+    from plat_hal.baseutil import baseutil
+
+    from plat_hal.interface import interface
+
+except ImportError as error:
+    raise ImportError(str(error) + "- required module not found")from error
+
+
+class Chassis(ChassisBase):
+    """
+    Platform-specific Chassis class
+    """
+    # List of Dcdc objects representing all dcdc
+    # available on the chassis
+    _dcdc_list = None
+
+    STATUS_INSERTED = "1"
+    STATUS_REMOVED = "0"
+    STATUS_NORMAL = "0"
+    STATUS_ABNORMAL = "1"
+    sfp_present_dict = {}
+    fan_present_dict = {}
+    voltage_status_dict = {}
+
+    def __init__(self):
+        ChassisBase.__init__(self)
+        self._dcdc_list = []
+        self.int_case = interface()
+        # Initialize SFP list
+
+        # sfp.py will read eeprom contents and retrive the eeprom data.
+        # It will also provide support sfp controls like reset and setting
+        # low power mode.
+        # We pass the eeprom path and sfp control path from chassis.py
+        # So that sfp.py implementation can be generic to all platforms
+        try:
+            self._sfp_list = []
+            self.port_num = baseutil.get_config().get("sfps", None).get("port_num", 0)
+            self.port_start_index = baseutil.get_config().get("sfps", None).get("port_index_start", 0)
+            # fix problem with first index is 1, we add a fake sfp node
+            if self.port_start_index == 1:
+                self._sfp_list.append(Sfp(1))
+
+            # sfp id always start at 1
+            for index in range(1, self.port_num + 1):
+                self._sfp_list.append(Sfp(index))
+
+            for i in range(self.port_start_index, self.port_start_index + self.port_num):
+                self.sfp_present_dict[i] = self.STATUS_REMOVED
+
+        except Exception as err:
+            print("SFP init error: %s" % str(err))
+
+        try:
+            self._eeprom = Eeprom(self.int_case)
+        except Exception as err:
+            print("EEPROM INIT ERROR %s" % str(err))
+
+        # Initialize watchdog
+        # self._watchdog = Watchdog()
+        fantray_num = self.int_case.get_fan_total_number()
+        for index in range(fantray_num):
+            fandrawer = FanDrawer(self.int_case, index + 1)
+            self._fan_drawer_list.append(fandrawer)
+            self._fan_list.extend(fandrawer._fan_list)
+
+        psu_num = self.int_case.get_psu_total_number()
+        for index in range(psu_num):
+            psuobj = Psu(self.int_case, index + 1)
+            self._psu_list.append(psuobj)
+
+        thermal_num = self.int_case.get_temp_id_number()
+        for index in range(thermal_num):
+            thermalobj = Thermal(self.int_case, index + 1)
+            self._thermal_list.append(thermalobj)
+
+        component_num = self.int_case.get_cpld_total_number()
+        for index in range(component_num):
+            componentobj = Component(self.int_case, index + 1)
+            self._component_list.append(componentobj)
+
+        dcdc_num = self.int_case.get_dcdc_total_number()
+        for index in range(dcdc_num):
+            dcdcobj = Dcdc(self.int_case, index + 1)
+            self._dcdc_list.append(dcdcobj)
+
+    def get_name(self):
+        """
+        Retrieves the name of the chassis
+        Returns:
+            string: The name of the chassis
+        """
+        name = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        name = sys_eeprom.modelstr(e)
+        if name is None:
+            return ''
+        return name
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the chassis
+        Returns:
+            bool: True if chassis is present, False if not
+        """
+        return True
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the chassis
+        Returns:
+            string: Model/part number of chassis
+        """
+        model = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        model = sys_eeprom.modelnumber(e)
+        if model is None:
+            return ''
+        return model
+
+    def get_serial_number(self):
+        """
+        Retrieves the hardware serial number for the chassis
+
+        Returns:
+            A string containing the hardware serial number for this chassis.
+        """
+        serial_number = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        serial_number = sys_eeprom.serial_number_str(e)
+        if serial_number is None:
+            return ''
+
+        return serial_number
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        device_version = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        device_version = sys_eeprom.deviceversion(e)
+        if device_version is None:
+            return ''
+
+        return device_version
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the chassis (Service tag)
+        Returns:
+            string: Serial number of chassis
+        """
+        return self.get_serial_number()
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the chassis
+        Returns:
+            bool: A boolean value, True if chassis is operating properly
+            False if not
+        """
+        return True
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
+
+    def initizalize_system_led(self):
+        return True
+
+    def set_status_led(self, color):
+        return False
+
+    def get_status_led(self):
+        """
+        Gets the state of the system LED
+
+        Returns:
+            A string, one of the valid LED color strings which could be vendor
+            specified.
+        """
+        ret, color = self.int_case.get_led_color_by_type('SYS_LED')
+        if ret is True:
+            return color
+        return 'N/A'
+
+    def get_base_mac(self):
+        """
+        Retrieves the base MAC address for the chassis
+
+        Returns:
+            A string containing the MAC address in the format
+            'XX:XX:XX:XX:XX:XX'
+        """
+        base_mac = ''
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return ''
+
+        e = sys_eeprom.read_eeprom()
+        base_mac = sys_eeprom.base_mac_addr(e)
+        if base_mac is None:
+            return ''
+
+        return base_mac.upper()
+
+    def get_system_eeprom_info(self):
+        """
+        Retrieves the full content of system EEPROM information for the chassis
+
+        Returns:
+            A dictionary where keys are the type code defined in
+            OCP ONIE TlvInfo EEPROM format and values are their corresponding
+            values.
+            Ex. { '0x21':'AG9064', '0x22':'V1.0', '0x23':'AG9064-0109867821',
+                  '0x24':'001c0f000fcd0a', '0x25':'02/03/2018 16:22:00',
+                  '0x26':'01', '0x27':'REV01', '0x28':'AG9064-C2358-16G'}
+        """
+        sys_eeprom = self.get_eeprom()
+        if sys_eeprom is None:
+            return {}
+        return sys_eeprom.system_eeprom_info()
+
+    def get_thermal_manager(self):
+        """
+        Retrieves thermal manager class on this chassis
+        :return: A class derived from ThermalManagerBase representing the
+        specified thermal manager. ThermalManagerBase is returned as default
+        """
+        return False
+
+    def get_reboot_cause(self):
+        """
+        Retrieves the cause of the previous reboot
+        Returns:
+            A tuple (string, string) where the first element is a string
+            containing the cause of the previous reboot. This string must be
+            one of the predefined strings in this class. If the first string
+            is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used
+            to pass a description of the reboot cause.
+        """
+        reboot_cause_msg = self.int_case.get_cpu_reboot_cause()
+        if "Power Loss" in reboot_cause_msg:
+            reboot_cause_type = self.REBOOT_CAUSE_POWER_LOSS
+        elif "Watchdog" in reboot_cause_msg:
+            reboot_cause_type = self.REBOOT_CAUSE_WATCHDOG
+        elif "BMC reboot" in reboot_cause_msg or "BMC powerdown" in reboot_cause_msg:
+            reboot_cause_type = self.REBOOT_CAUSE_HARDWARE_OTHER
+        elif "Thermal Overload: ASIC" in reboot_cause_msg:
+            reboot_cause_type = self.REBOOT_CAUSE_THERMAL_OVERLOAD_ASIC
+        elif "Thermal Overload: Other" in reboot_cause_msg:
+            reboot_cause_type = self.REBOOT_CAUSE_THERMAL_OVERLOAD_OTHER
+        elif "Other" in reboot_cause_msg:
+            reboot_cause_type = self.REBOOT_CAUSE_NON_HARDWARE
+        else:
+            reboot_cause_type = self.REBOOT_CAUSE_NON_HARDWARE
+        return (reboot_cause_type, reboot_cause_msg)
+
+    def get_module(self, index):
+        """
+        Retrieves module represented by (0-based) index <index>
+
+        Args:
+            index: An integer, the index (0-based) of the module to
+            retrieve
+
+        Returns:
+            An object dervied from ModuleBase representing the specified
+            module
+        """
+        module = None
+
+        try:
+            if self.get_num_modules():
+                module = self._module_list[index]
+        except IndexError:
+            sys.stderr.write("Module index {} out of range (0-{})\n".format(
+                             index, len(self._module_list) - 1))
+
+        return module
+
+    def get_fan_drawer(self, index):
+        """
+        Retrieves fan drawers represented by (0-based) index <index>
+
+        Args:
+            index: An integer, the index (0-based) of the fan drawer to
+            retrieve
+
+        Returns:
+            An object dervied from FanDrawerBase representing the specified fan
+            drawer
+        """
+        fan_drawer = None
+
+        try:
+            if self.get_num_fan_drawers():
+                fan_drawer = self._fan_drawer_list[index]
+        except IndexError:
+            sys.stderr.write("Fan drawer index {} out of range (0-{})\n".format(
+                             index, len(self._fan_drawer_list) - 1))
+
+        return fan_drawer
+
+    def get_change_event(self, timeout=0):
+        """
+        Returns a nested dictionary containing all devices which have
+        experienced a change at chassis level
+
+        Args:
+            timeout: Timeout in milliseconds (optional). If timeout == 0,
+                this method will block until a change is detected.
+
+        Returns:
+            (bool, dict):
+                - bool: True if call successful, False if not;
+                - dict: A nested dictionary where key is a device type,
+                        value is a dictionary with key:value pairs in the format of
+                        {'device_id':'device_event'}, where device_id is the device ID
+                        for this device and device_event.
+                        The known devices's device_id and device_event was defined as table below.
+                         -----------------------------------------------------------------
+                         device   |     device_id       |  device_event  |  annotate
+                         -----------------------------------------------------------------
+                         'fan'          '<fan number>'     '0'              Fan removed
+                                                           '1'              Fan inserted
+
+                         'sfp'          '<sfp number>'     '0'              Sfp removed
+                                                           '1'              Sfp inserted
+                                                           '2'              I2C bus stuck
+                                                           '3'              Bad eeprom
+                                                           '4'              Unsupported cable
+                                                           '5'              High Temperature
+                                                           '6'              Bad cable
+
+                         'voltage'      '<monitor point>'  '0'              Vout normal
+                                                           '1'              Vout abnormal
+                         --------------------------------------------------------------------
+                  Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'},
+                       'voltage':{'U20':'0', 'U21':'1'}}
+                  Indicates that:
+                     fan 0 has been removed, fan 2 has been inserted.
+                     sfp 11 has been removed, sfp 12 has been inserted.
+                     monitored voltage U20 became normal, voltage U21 became abnormal.
+                  Note: For sfp, when event 3-6 happened, the module will not be avalaible,
+                        XCVRD shall stop to read eeprom before SFP recovered from error status.
+        """
+
+        change_event_dict = {"fan": {}, "sfp": {}, "voltage": {}}
+
+        start_time = time.time()
+        forever = False
+
+        if timeout == 0:
+            forever = True
+        elif timeout > 0:
+            timeout = timeout / float(1000)  # Convert to secs
+        else:
+            print("get_change_event:Invalid timeout value: %s" % timeout)
+            return False, change_event_dict
+
+        end_time = start_time + timeout
+        if start_time > end_time:
+            print("get_change_event:time wrap / invalid timeout value: %s" % timeout)
+            return False, change_event_dict  # Time wrap or possibly incorrect timeout
+        try:
+            while timeout >= 0:
+                # check for sfp
+                sfp_change_dict = self.get_transceiver_change_event()
+                # check for fan
+                fan_change_dict = self.get_fan_change_event()
+                # check for voltage
+                voltage_change_dict = self.get_voltage_change_event()
+
+                if sfp_change_dict or fan_change_dict or voltage_change_dict:
+                    change_event_dict["sfp"] = sfp_change_dict
+                    change_event_dict["fan"] = fan_change_dict
+                    change_event_dict["voltage"] = voltage_change_dict
+                    return True, change_event_dict
+                if forever:
+                    time.sleep(1)
+                else:
+                    timeout = end_time - time.time()
+                    if timeout >= 1:
+                        time.sleep(1)  # We poll at 1 second granularity
+                    else:
+                        if timeout > 0:
+                            time.sleep(timeout)
+                        return True, change_event_dict
+        except Exception as e:
+            print(e)
+        print("get_change_event: Should not reach here.")
+        return False, change_event_dict
+
+    def get_transceiver_change_event(self):
+        current_sfp_present_dict = {}
+        ret_dict = {}
+
+        # Check for OIR events and return ret_dict
+        for i in range(self.port_start_index, self.port_start_index + self.port_num):
+            sfp = self._sfp_list[i]
+            if sfp.get_presence():
+                current_sfp_present_dict[i] = self.STATUS_INSERTED
+
+            else:
+                current_sfp_present_dict[i] = self.STATUS_REMOVED
+
+        # Update reg value
+        if current_sfp_present_dict == self.sfp_present_dict:
+            return ret_dict
+
+        for index, status in current_sfp_present_dict.items():
+            if self.sfp_present_dict[index] != status:
+                ret_dict[index] = status
+
+        self.sfp_present_dict = current_sfp_present_dict
+
+        return ret_dict
+
+    def get_fan_change_event(self):
+        current_fan_present_dict = {}
+        ret_dict = {}
+
+        # Check for OIR events and return ret_dict
+        for index, fan in enumerate(self._fan_list):
+            if fan.get_presence() is True:
+                current_fan_present_dict[index] = self.STATUS_INSERTED
+            else:
+                current_fan_present_dict[index] = self.STATUS_REMOVED
+
+        if len(self.fan_present_dict) == 0:       # first time
+            self.fan_present_dict = current_fan_present_dict
+            return {}
+
+        if current_fan_present_dict == self.fan_present_dict:
+            return {}
+
+        # updated fan_present_dict
+        for index, status in current_fan_present_dict.items():
+            if self.fan_present_dict[index] != status:
+                ret_dict[str(index)] = status
+        self.fan_present_dict = current_fan_present_dict
+        return ret_dict
+
+    def get_voltage_change_event(self):
+        current_voltage_status_dict = {}
+        ret_dict = {}
+
+        # Check for OIR events and return ret_dict
+        for index, dcdc in enumerate(self._dcdc_list):
+            name = dcdc.get_name()
+            value = dcdc.get_value()
+            high = dcdc.get_high_threshold()
+            low = dcdc.get_low_threshold()
+            if (value is None) or (value > high) or (value < low):
+                current_voltage_status_dict[name] = self.STATUS_ABNORMAL
+            else:
+                current_voltage_status_dict[name] = self.STATUS_NORMAL
+
+        if len(self.voltage_status_dict) == 0:   # first time
+            self.voltage_status_dict = current_voltage_status_dict
+            return {}
+
+        if current_voltage_status_dict == self.voltage_status_dict:
+            return {}
+
+        # updated voltage_status_dict
+        for name, status in current_voltage_status_dict.items():
+            if self.voltage_status_dict[name] != status:
+                ret_dict[name] = status
+        self.voltage_status_dict = current_voltage_status_dict
+        return ret_dict
+
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/component.py
new file mode 100644
index 000000000000..fa674a98a6bf
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/component.py
@@ -0,0 +1,226 @@
+#!/usr/bin/env python3
+
+########################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the Components' (e.g., BIOS, CPLD, FPGA, etc.) available in
+# the platform
+#
+########################################################################
+
+try:
+    import time
+    import subprocess
+    import os
+    from sonic_platform_base.component_base import ComponentBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+
+FIRMWARE_UPDATE_DIR = "/tmp/.firmwareupdate/"
+
+class Component(ComponentBase):
+    """Platform-specific Component class"""
+
+    def __init__(self, interface_obj, index):
+        self.cpld_dict = {}
+        self.int_case = interface_obj
+        self.index = index
+        self.update_time = 0
+        self.cpld_id = "CPLD" + str(index)
+
+    def cpld_dict_update(self):
+        local_time = time.time()
+        if not self.cpld_dict or (local_time - self.update_time) >= 1:  # update data every 1 seconds
+            self.update_time = local_time
+            self.cpld_dict = self.int_case.get_cpld_version_by_id(self.cpld_id)
+
+    def get_slot(self):
+        self.cpld_dict_update()
+        return self.cpld_dict["Slot"]
+
+    def get_warm_upgrade_flag(self):
+        self.cpld_dict_update()
+        return self.cpld_dict["Warm"]
+
+    def get_name(self):
+        """
+        Retrieves the name of the component
+
+        Returns:
+            A string containing the name of the component
+        """
+        self.cpld_dict_update()
+        return self.cpld_dict["Name"]
+
+    def get_description(self):
+        """
+        Retrieves the description of the component
+
+        Returns:
+            A string containing the description of the component
+        """
+        self.cpld_dict_update()
+        return self.cpld_dict["Desc"]
+
+    def get_firmware_version(self):
+        """
+        Retrieves the firmware version of the component
+
+        Note: the firmware version will be read from HW
+
+        Returns:
+            A string containing the firmware version of the component
+        """
+        self.cpld_dict_update()
+        return self.cpld_dict["Version"]
+
+    def get_available_firmware_version(self, image_path):
+        """
+        Retrieves the available firmware version of the component
+
+        Note: the firmware version will be read from image
+
+        Args:
+            image_path: A string, path to firmware image
+
+        Returns:
+            A string containing the available firmware version of the component
+        """
+        raise NotImplementedError
+
+    def get_firmware_update_notification(self, image_path):
+        """
+        Retrieves a notification on what should be done in order to complete
+        the component firmware update
+
+        Args:
+            image_path: A string, path to firmware image
+
+        Returns:
+            A string containing the component firmware update notification if required.
+            By default 'None' value will be used, which indicates that no actions are required
+        """
+        return None
+
+    def install_firmware(self, image_path):
+        """
+        Installs firmware to the component
+
+        This API performs firmware installation only: this may/may not be the same as firmware update.
+        In case platform component requires some extra steps (apart from calling Low Level Utility)
+        to load the installed firmware (e.g, reboot, power cycle, etc.) - this must be done manually by user
+
+        Note: in case immediate actions are required to complete the component firmware update
+        (e.g., reboot, power cycle, etc.) - will be done automatically by API and no return value provided
+
+        Args:
+            image_path: A string, path to firmware image
+
+        Returns:
+            A boolean, True if install was successful, False if not
+        """
+        if not os.path.isfile(image_path):
+            print("ERROR: %s not found" % image_path)
+            return False
+        cmdstr = "upgrade.py cold %s %d" % (image_path, self.get_slot())
+        status, output = subprocess.getstatusoutput(cmdstr)
+        if status == 0:
+            print("INFO: %s firmware install succeeded" % self.get_name())
+            return True
+        print("%s install failed. status:%d, output:\n%s" % (self.get_name(), status, output))
+        return False
+
+    def update_firmware(self, image_path):
+        """
+        Updates firmware of the component
+
+        This API performs firmware update: it assumes firmware installation and loading in a single call.
+        In case platform component requires some extra steps (apart from calling Low Level Utility)
+        to load the installed firmware (e.g, reboot, power cycle, etc.) - this will be done automatically by API
+
+        Args:
+            image_path: A string, path to firmware image
+
+        Raises:
+            RuntimeError: update failed
+        """
+        if not os.path.isfile(image_path):
+            raise RuntimeError("ERROR: %s not found" % image_path)
+
+        if self.get_warm_upgrade_flag() == 1:  # use warm upgrade
+            cmdstr = "upgrade.py warm %s %d" % (image_path, self.get_slot())
+        else:
+            cmdstr = "upgrade.py cold %s %d" % (image_path, self.get_slot())
+        status, output = subprocess.getstatusoutput(cmdstr)
+        if status == 0:
+            if self.get_warm_upgrade_flag() != 1:  # not support warm upgrade, need to cold reboot
+                print("INFO: %s firmware install succeeded" % self.get_name())
+                print("INFO: please cold reboot to make the %s firmware up-to-date" % self.get_name())
+            else:
+                print("INFO: %s firmware update succeeded" % self.get_name())
+                print("INFO: %s firmware version up-to-date" % self.get_name())
+            return None
+        raise RuntimeError(output)
+
+    def auto_update_firmware(self, image_path, boot_type):
+        """
+        Updates firmware of the component
+
+        This API performs firmware update automatically based on boot_type: it assumes firmware installation
+        and/or creating a loading task during the reboot, if needed, in a single call.
+        In case platform component requires some extra steps (apart from calling Low Level Utility)
+        to load the installed firmware (e.g, reboot, power cycle, etc.) - this will be done automatically during the reboot.
+        The loading task will be created by API.
+
+        Args:
+            image_path: A string, path to firmware image
+            boot_type: A string, reboot type following the upgrade
+                         - none/fast/warm/cold
+
+        Returns:
+            Output: A return code
+                return_code: An integer number, status of component firmware auto-update
+                    - return code of a positive number indicates successful auto-update
+                        - status_installed = 1
+                        - status_updated = 2
+                        - status_scheduled = 3
+                    - return_code of a negative number indicates failed auto-update
+                        - status_err_boot_type = -1
+                        - status_err_image = -2
+                        - status_err_unknown = -3
+
+        Raises:
+            RuntimeError: auto-update failure cause
+        """
+        if not os.path.isfile(image_path):
+            print("ERROR: %s not found" % image_path)
+            return -2
+
+        if not os.path.isdir(FIRMWARE_UPDATE_DIR):
+            os.mkdir(FIRMWARE_UPDATE_DIR)
+
+        warm_upgrade_flag = self.get_warm_upgrade_flag()
+        file_name = os.path.basename(image_path)
+        file_path = os.path.join(FIRMWARE_UPDATE_DIR, file_name)
+        if os.path.exists(file_path):   # firmware already update
+            if warm_upgrade_flag == 1:
+                print("INFO: %s firmware update succeeded, firmware version up-to-date" % self.get_name())
+                return 2
+            print("INFO: %s firmware install succeeded, please cold reboot to make it up-to-date" % self.get_name())
+            return 1
+
+        if warm_upgrade_flag == 1:  # use warm upgrade
+            cmdstr = "upgrade.py warm %s %d" % (image_path, self.get_slot())
+        else:
+            cmdstr = "upgrade.py cold %s %d" % (image_path, self.get_slot())
+        status, output = subprocess.getstatusoutput(cmdstr)
+        if status == 0:
+            os.mknod(file_path)
+            if warm_upgrade_flag == 1:
+                print("INFO: %s firmware update succeeded, firmware version up-to-date" % self.get_name())
+                return 2
+            print("INFO: %s firmware install succeeded, please cold reboot to make it up-to-date" % self.get_name())
+            return 1
+        print("%s update failed, status:%d, output:\n%s" % (self.get_name(), status, output))
+        return -3
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/dcdc.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/dcdc.py
new file mode 100644
index 000000000000..494d4aa610dc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/dcdc.py
@@ -0,0 +1,85 @@
+#!/usr/bin/env python3
+
+########################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the Thermals' information which are available in the platform
+#
+########################################################################
+import time
+
+
+class Dcdc(object):
+
+    def __init__(self, interface_obj, index):
+        self.dcdc_dict = {}
+        self.int_case = interface_obj
+        self.index = index
+        self.update_time = 0
+        self.dcdc_id = "DCDC" + str(index)
+
+    def dcdc_dict_update(self):
+        local_time = time.time()
+        if not self.dcdc_dict or (local_time - self.update_time) >= 1:  # update data every 1 seconds
+            self.update_time = local_time
+            self.dcdc_dict = self.int_case.get_dcdc_by_id(self.dcdc_id)
+
+    def get_name(self):
+        """
+        Retrieves the name of the sensor
+
+        Returns:
+            string: The name of the sensor
+        """
+        self.dcdc_dict_update()
+        return self.dcdc_dict["Name"]
+
+    def get_value(self):
+        """
+        Retrieves current value reading from sensor
+        """
+        self.dcdc_dict_update()
+        value = self.dcdc_dict["Value"]
+        if value is None:
+            value = 0
+        return round(float(value), 3)
+
+    def get_high_threshold(self):
+        """
+        Retrieves the high threshold temperature of sensor
+        """
+        self.dcdc_dict_update()
+        value = self.dcdc_dict["High"]
+        if value is None:
+            value = 0
+        return round(float(value), 3)
+
+    def get_low_threshold(self):
+        """
+        Retrieves the low threshold temperature of sensor
+        """
+        self.dcdc_dict_update()
+        value = self.dcdc_dict["Low"]
+        if value is None:
+            value = 0
+        return round(float(value), 3)
+
+    def get_high_critical_threshold(self):
+        """
+        Retrieves the high critical threshold temperature of sensor
+        """
+        self.dcdc_dict_update()
+        value = self.dcdc_dict["Max"]
+        if value is None:
+            value = 0
+        return round(float(value), 3)
+
+    def get_low_critical_threshold(self):
+        """
+        Retrieves the low critical threshold temperature of sensor
+        """
+        self.dcdc_dict_update()
+        value = self.dcdc_dict["Min"]
+        if value is None:
+            value = 0
+        return round(float(value), 3)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/eeprom.py
new file mode 100644
index 000000000000..05fcc3c25678
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/eeprom.py
@@ -0,0 +1,92 @@
+#!/usr/bin/env python3
+########################################################################
+#
+# Module contains platform specific implementation of SONiC Platform
+# Base API and provides the EEPROMs' information.
+#
+# The different EEPROMs available are as follows:
+# - System EEPROM : Contains Serial number, Service tag, Base MA
+#                   address, etc. in ONIE TlvInfo EEPROM format.
+# - PSU EEPROM : Contains Serial number, Part number, Service Tag,
+#                PSU type, Revision.
+# - Fan EEPROM : Contains Serial number, Part number, Service Tag,
+#                Fan type, Number of Fans in Fantray, Revision.
+########################################################################
+
+try:
+    from sonic_eeprom import eeprom_tlvinfo
+except ImportError as error:
+    raise ImportError(str(error) + "- required module not found") from error
+
+
+class Eeprom(eeprom_tlvinfo.TlvInfoDecoder):
+
+    def __init__(self, interface_obj):
+        self.int_case = interface_obj
+        self.name = "ONIE_E2"
+
+        eeprom_path = self.int_case.get_onie_e2_path(self.name)
+        if eeprom_path is None:
+            raise ValueError("get eeprom path failed")
+
+        super().__init__(eeprom_path, 0, "", True)
+
+    def modelnumber(self, e):
+        '''
+        Returns the value field of the model(part) number TLV as a string
+        '''
+        (is_valid, t) = self.get_tlv_field(e, self._TLV_CODE_PART_NUMBER)
+        if not is_valid:
+            return super().part_number_str(e)
+
+        return t[2].decode("ascii")
+
+    def deviceversion(self, e):
+        '''
+        Returns the value field of the Device Version as a string
+        '''
+        (is_valid, t) = self.get_tlv_field(e, self._TLV_CODE_DEVICE_VERSION)
+        if not is_valid:
+            return "N/A"
+
+        return str(ord(t[2]))
+
+    def system_eeprom_info(self):
+        '''
+        Retrieves the full content of system EEPROM information for the chassis
+
+        Returns:
+            A dictionary where keys are the type code defined in
+            OCP ONIE TlvInfo EEPROM format and values are their corresponding
+            values.
+            Ex. { '0x21':'AG9064', '0x22':'V1.0', '0x23':'AG9064-0109867821',
+                  '0x24':'001c0f000fcd0a', '0x25':'02/03/2018 16:22:00',
+                  '0x26':'01', '0x27':'REV01', '0x28':'AG9064-C2358-16G'}
+        '''
+        sys_eeprom_dict = {}
+        e = self.read_eeprom()
+        if self._TLV_HDR_ENABLED:
+            if not self.is_valid_tlvinfo_header(e):
+                return {}
+            total_len = (e[9] << 8) | e[10]
+            tlv_index = self._TLV_INFO_HDR_LEN
+            tlv_end = self._TLV_INFO_HDR_LEN + total_len
+        else:
+            tlv_index = self.eeprom_start
+            tlv_end = self._TLV_INFO_MAX_LEN
+
+        while (tlv_index + 2) < len(e) and tlv_index < tlv_end:
+            if not self.is_valid_tlv(e[tlv_index:]):
+                break
+
+            tlv = e[tlv_index:tlv_index + 2 + e[tlv_index + 1]]
+            code = "0x%02X" % tlv[0]
+            name, value = self.decoder(None, tlv)
+            sys_eeprom_dict[code] = value
+
+            if e[tlv_index] == self._TLV_CODE_QUANTA_CRC or \
+                    e[tlv_index] == self._TLV_CODE_CRC_32:
+                break
+            tlv_index += e[tlv_index + 1] + 2
+
+        return sys_eeprom_dict
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py
new file mode 100644
index 000000000000..1ad578e40546
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py
@@ -0,0 +1,308 @@
+#!/usr/bin/env python3
+########################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the Fans' information which are available in the platform.
+#
+########################################################################
+
+try:
+    import time
+    from sonic_platform_base.fan_base import FanBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+
+class Fan(FanBase):
+    """Platform-specific Fan class"""
+
+    def __init__(self, interface_obj, fantray_index, fan_index, psu_fan=False, psu_index=0):
+        self.fan_dict = {}
+        self.int_case = interface_obj
+        self.fantray_index = fantray_index
+        self.fan_index = fan_index
+        self.psu_index = psu_index
+        self.is_psu_fan = psu_fan
+        self.update_time = 0
+        if not self.is_psu_fan:
+            self.name = "FAN" + str(fantray_index)
+        else:
+            self.name = "PSU" + str(psu_index)
+
+    def fan_dict_update(self):
+        local_time = time.time()
+        if not self.fan_dict or (local_time - self.update_time) >= 1:  # update data every 1 seconds
+            self.update_time = local_time
+            if not self.is_psu_fan:
+                self.fan_dict = self.int_case.get_fan_info(self.name)
+            else:
+                self.fan_dict = self.int_case.get_psu_fru_info(self.name)
+
+    def get_name(self):
+        """
+        Retrieves the fan name
+        Returns:
+            string: The name of the device
+        """
+        if not self.is_psu_fan:
+            return "Fantray{}_{}".format(self.fantray_index, self.fan_index)
+        return "PSU{}_FAN{}".format(self.psu_index, self.fan_index)
+
+    def get_model(self):
+        """
+        Retrieves the part number of the FAN
+        Returns:
+            string: Part number of FAN
+        """
+        if not self.is_psu_fan:
+            self.fan_dict_update()
+            return self.fan_dict["DisplayName"]
+        return 'N/A'
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the FAN
+        Returns:
+            string: Serial number of FAN
+        """
+        if not self.is_psu_fan:
+            self.fan_dict_update()
+            return self.fan_dict["SN"]
+        return 'N/A'
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the FAN
+        Returns:
+            bool: True if fan is present, False if not
+        """
+        if not self.is_psu_fan:
+            return self.int_case.get_fan_presence(self.name)
+        return self.int_case.get_psu_presence(self.name)
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the FAN
+        Returns:
+            bool: True if FAN is operating properly, False if not
+        """
+        if not self.get_presence():
+            return False
+
+        if not self.is_psu_fan:
+            fan_dir = {}
+            fan_dir = self.int_case.get_fan_info_rotor(self.name)
+            # get fan rotor pwm
+            rotor_name = "Rotor" + str(self.fan_index)
+            value = fan_dir[rotor_name]["Speed"]
+            min_speed = fan_dir[rotor_name]["SpeedMin"]
+            max_speed = fan_dir[rotor_name]["SpeedMax"]
+            tolerance = fan_dir[rotor_name]["Tolerance"]
+        else:
+            psu_status_dict = self.int_case.get_psu_status(self.name)
+            value = psu_status_dict["FanSpeed"]["Value"]
+            min_speed = psu_status_dict["FanSpeed"]["Min"]
+            max_speed = psu_status_dict["FanSpeed"]["Max"]
+            tolerance = psu_status_dict["FanSpeed"]["Tolerance"]
+
+        if isinstance(tolerance, str) or tolerance is None:
+            tolerance = 30
+
+        if isinstance(value, str) or value is None:
+            return False
+
+        if value < min_speed:
+            return False
+
+        speed = int(value * 100 / max_speed)
+        if speed > 100:
+            speed = 100
+        elif speed < 0:
+            speed = 0
+        target = self.get_target_speed()
+
+        if (speed - target) > target * tolerance / 100:
+            return False
+        if (target - speed) > target * tolerance / 100:
+            return False
+
+        return True
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return True
+
+    def get_direction(self):
+        """
+        Retrieves the fan airflow direction
+        Returns:
+            A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST
+            depending on fan direction
+
+        Notes:
+            - Forward/Exhaust : Air flows from Port side to Fan side.
+            - Reverse/Intake  : Air flows from Fan side to Port side.
+        """
+        self.fan_dict_update()
+        air_flow = self.fan_dict["AirFlow"]
+        if air_flow is not None:
+            return air_flow
+        return self.FAN_DIRECTION_NOT_APPLICABLE
+
+    def get_speed(self):
+        """
+        Retrieves the speed of fan as a percentage of full speed
+
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        if not self.get_presence():
+            return 0
+
+        if not self.is_psu_fan:
+            fan_dir = {}
+            fan_dir = self.int_case.get_fan_info_rotor(self.name)
+            # get fan rotor pwm
+            rotor_name = "Rotor" + str(self.fan_index)
+            value = fan_dir[rotor_name]["Speed"]
+            max_speed = fan_dir[rotor_name]["SpeedMax"]
+        else:
+            psu_status_dict = self.int_case.get_psu_status(self.name)
+            value = psu_status_dict["FanSpeed"]["Value"]
+            max_speed = psu_status_dict["FanSpeed"]["Max"]
+
+        if isinstance(value, str) or value is None:
+            return 0
+        pwm = value * 100 / max_speed
+        if pwm > 100:
+            pwm = 100
+        elif pwm < 0:
+            pwm = 0
+        return int(pwm)
+
+    def get_speed_tolerance(self):
+        """
+        Retrieves the speed tolerance of the fan
+        Returns:
+            An integer, the percentage of variance from target speed which is
+        considered tolerable
+        """
+        # The default tolerance value is fixed as 30%
+        if not self.is_psu_fan:
+            fan_dir = {}
+            fan_dir = self.int_case.get_fan_info_rotor(self.name)
+            # get fan rotor tolerance
+            rotor_name = "Rotor" + str(self.fan_index)
+            tolerance = fan_dir[rotor_name]["Tolerance"]
+        else:
+            psu_status_dict = self.int_case.get_psu_status(self.name)
+            tolerance = psu_status_dict["FanSpeed"]["Tolerance"]
+
+        if isinstance(tolerance, str) or tolerance is None:
+            return 30
+        return tolerance
+
+    def fan_set_speed_pwm(self, pwm):
+        status = self.int_case.set_fan_speed_pwm(self.name, self.fan_index, pwm)
+        if status == -1:
+            return False
+        return True
+
+    def set_speed(self, speed):
+        """
+        Set fan speed to expected value
+        Args:
+            speed: An integer, the percentage of full fan speed to set fan to,
+                   in the range 0 (off) to 100 (full speed)
+        Returns:
+            bool: True if set success, False if fail.
+        """
+        if not self.is_psu_fan:
+            return self.fan_set_speed_pwm(speed)
+        return self.int_case.set_psu_fan_speed_pwm(self.name, int(speed))
+
+    def set_status_led(self, color):
+        """
+        Set led to expected color
+        Args:
+            color: A string representing the color with which to set the
+                   fan module status LED
+        Returns:
+            bool: True if set success, False if fail.
+        """
+        # not supported
+        return False
+
+    def get_status_led(self):
+        """
+        Gets the state of the Fan status LED
+
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings.
+        """
+        if self.is_psu_fan:
+            # No LED available for PSU Fan
+            return 'N/A'
+
+        if not self.get_presence():
+            return 'N/A'
+
+        ret, color = self.int_case.get_fan_led(self.name)
+        if ret is True:
+            return color
+        return 'N/A'
+
+    def get_target_speed(self):
+        """
+        Retrieves the target (expected) speed of the fan
+        Returns:
+            An integer, the percentage of full fan speed, in the range 0 (off)
+                 to 100 (full speed)
+        """
+        if not self.is_psu_fan:
+            # get fan rotor pwm
+            pwm = int(self.int_case.get_fan_speed_pwm(self.name, self.fan_index))
+        else:
+            psu_status_dict = self.int_case.get_psu_status(self.name)
+            if psu_status_dict["InputStatus"] is False:
+                pwm = 0
+            else:
+                pwm = self.get_speed()  # target equal to real pwm, to avoid alarm
+        return int(pwm)
+
+    def get_vendor(self):
+        """
+        Retrieves the vendor name of the fan
+
+        Returns:
+            string: Vendor name of fan
+        """
+        if not self.is_psu_fan:
+            return "WB"
+        return 'N/A'
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        if not self.is_psu_fan:
+            self.fan_dict_update()
+            return self.fan_dict["HW"]
+        return 'N/A'
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan_drawer.py
new file mode 100644
index 000000000000..f0b039648158
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan_drawer.py
@@ -0,0 +1,167 @@
+#!/usr/bin/env python3
+#
+# fan_drawer_base.py
+#
+# Abstract base class for implementing a platform-specific class with which
+# to interact with a fan drawer module in SONiC
+#
+
+try:
+    import time
+    from sonic_platform_base.fan_drawer_base import FanDrawerBase
+    from sonic_platform.fan import Fan
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+
+class FanDrawer(FanDrawerBase):
+    """
+    Abstract base class for interfacing with a fan drawer
+    """
+    # Device type definition. Note, this is a constant.
+    DEVICE_TYPE = "fan_drawer"
+
+    def __init__(self, interface_obj, fantray_index):
+        FanDrawerBase.__init__(self)
+        self.fantray_dict = {}
+        self.fantray_update_time = 0
+        self.fantray_index = fantray_index
+        self.int_case = interface_obj
+        self.fantrayname = "FAN" + str(fantray_index)
+        self.num_fans_per_fantray = self.int_case.get_fan_rotor_number(self.fantrayname)
+        for i in range(self.num_fans_per_fantray):
+            self._fan_list.append(Fan(interface_obj, fantray_index, i + 1))
+
+    def fantray_dict_update(self):
+        local_time = time.time()
+        # update data every 1 seconds
+        if not self.fantray_dict or (local_time - self.fantray_update_time) >= 1:
+            self.fantray_update_time = local_time
+            self.fantray_dict = self.int_case.get_fan_info(self.fantrayname)
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+        Returns:
+            string: The name of the device
+        """
+        return "Fantray{}".format(self.fantray_index)
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the FAN
+        Returns:
+            bool: True if fan is present, False if not
+        """
+        return self.int_case.get_fan_presence(self.fantrayname)
+
+    def get_model(self):
+        """
+        Retrieves the part number of the FAN
+        Returns:
+            string: Part number of FAN
+        """
+        self.fantray_dict_update()
+        return self.fantray_dict["NAME"]
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the FAN
+        Returns:
+            string: Serial number of FAN
+        """
+        self.fantray_dict_update()
+        return self.fantray_dict["SN"]
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        self.fantray_dict_update()
+        return self.fantray_dict["HW"]
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the FAN
+        Returns:
+            bool: True if FAN is operating properly, False if not
+        """
+        for i in range(self.num_fans_per_fantray):
+            if self._fan_list[i].get_status() is False:
+                return False
+        return True
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return True
+
+    def get_num_fans(self):
+        """
+        Retrieves the number of fans available on this fan drawer
+        Returns:
+            An integer, the number of fan modules available on this fan drawer
+        """
+        return len(self._fan_list)
+
+    def get_all_fans(self):
+        """
+        Retrieves all fan modules available on this fan drawer
+        Returns:
+            A list of objects derived from FanBase representing all fan
+            modules available on this fan drawer
+        """
+        return self._fan_list
+
+    def set_status_led(self, color):
+        """
+        Sets the state of the fan drawer status LED
+        Args:
+            color: A string representing the color with which to set the
+                   fan drawer status LED
+        Returns:
+            bool: True if status LED state is set successfully, False if not
+        """
+        # not supported
+        return False
+
+    def get_status_led(self):
+        """
+        Gets the state of the Fan status LED
+
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings.
+        """
+        if not self.get_presence():
+            return 'N/A'
+
+        ret, color = self.int_case.get_fan_led(self.fantrayname)
+        if ret is True:
+            return color
+        return 'N/A'
+
+    def get_maximum_consumed_power(self):
+        """
+        Retrives the maximum power drawn by Fan Drawer
+
+        Returns:
+            A float, with value of the maximum consumable power of the
+            component.
+        """
+        self.fantray_dict_update()
+        return self.fantray_dict["PowerMax"]
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/pcie.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/pcie.py
new file mode 100644
index 000000000000..8ea66f339e96
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/pcie.py
@@ -0,0 +1,21 @@
+#!/usr/bin/env python3
+# -*- coding: utf-8 -*-
+
+########################################################################
+#
+# Module contains a platform specific implementation of SONiC Platform
+# Base PCIe class
+#
+########################################################################
+
+try:
+    from sonic_platform_base.sonic_pcie.pcie_common import PcieUtil
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+
+class Pcie(PcieUtil):
+    """Platform-specific Pcie class"""
+
+    def __init__(self, platform_path):
+        PcieUtil.__init__(self, platform_path)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/platform.py
new file mode 100644
index 000000000000..4d6fe03d93ac
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/platform.py
@@ -0,0 +1,24 @@
+#!/usr/bin/env python3
+
+#############################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#############################################################################
+
+try:
+    from sonic_platform_base.platform_base import PlatformBase
+    from sonic_platform.chassis import Chassis
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+
+class Platform(PlatformBase):
+    """
+    Platform-specific class
+    """
+
+    def __init__(self):
+        PlatformBase.__init__(self)
+        self._chassis = Chassis()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py
new file mode 100644
index 000000000000..a9f7e87d2027
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py
@@ -0,0 +1,359 @@
+#!/usr/bin/env python3
+########################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the PSUs' information which are available in the platform
+#
+########################################################################
+
+
+try:
+    import time
+    from sonic_platform_base.psu_base import PsuBase
+    from sonic_platform.fan import Fan
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+
+class Psu(PsuBase):
+    """Platform-specific PSU class"""
+
+    def __init__(self, interface_obj, index):
+        self.psu_dict = {}
+        self.psu_status_dict = {}
+        self.psu_power_dict = {}
+        self._fan_list = []
+        self._thermal_list = []
+        self.int_case = interface_obj
+        self.index = index
+        self.name = "PSU" + str(index)
+
+        self.psu_dict_update_time = 0
+        self.psu_status_dict_update_time = 0
+        self.psu_power_dict_update_time = 0
+
+        self._fan_list.append(Fan(self.int_case, 1, 1, psu_fan=True, psu_index=index))
+
+    def psu_dict_update(self):
+        local_time = time.time()
+        if not self.psu_dict or (local_time - self.psu_dict_update_time) >= 1:  # update data every 1 seconds
+            self.psu_dict_update_time = local_time
+            self.psu_dict = self.int_case.get_psu_fru_info(self.name)
+
+    def psu_status_dict_update(self):
+        local_time = time.time()
+        if not self.psu_status_dict or (
+                local_time - self.psu_status_dict_update_time) >= 1:  # update data every 1 seconds
+            self.psu_status_dict_update_time = local_time
+            self.psu_status_dict = self.int_case.get_psu_status(self.name)
+
+    def psu_power_dict_update(self):
+        local_time = time.time()
+        if not self.psu_power_dict or (
+                local_time - self.psu_power_dict_update_time) >= 1:  # update data every 1 seconds
+            self.psu_power_dict_update_time = local_time
+            self.psu_power_dict = self.int_case.get_psu_power_status(self.name)
+
+    def get_name(self):
+        """
+        Retrieves the name of the device
+
+        Returns:
+            string: The name of the device
+        """
+        return "Psu{}".format(self.index)
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the Power Supply Unit (PSU)
+
+        Returns:
+            bool: True if PSU is present, False if not
+        """
+        return self.int_case.get_psu_presence(self.name)
+
+    def get_model(self):
+        """
+        Retrieves the part number of the PSU
+
+        Returns:
+            string: Part number of PSU
+        """
+        self.psu_dict_update()
+        return self.psu_dict["DisplayName"]
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the PSU
+
+        Returns:
+            string: Serial number of PSU
+        """
+        self.psu_dict_update()
+        return self.psu_dict["SN"]
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the PSU
+
+        Returns:
+            bool: True if PSU is operating properly, False if not
+        """
+        return self.int_case.get_psu_input_output_status(self.name)
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return True
+
+    def get_voltage(self):
+        """
+        Retrieves current PSU voltage output
+
+        Returns:
+            A float number, the output voltage in volts,
+            e.g. 12.1
+        """
+        self.psu_status_dict_update()
+        if self.psu_status_dict["InputStatus"] is False:
+            value = 0
+        else:
+            self.psu_power_dict_update()
+            value = self.psu_power_dict["Outputs"]["Voltage"]["Value"]
+            if value is None:
+                value = 0
+        return round(float(value), 1)
+
+    def get_current(self):
+        """
+        Retrieves present electric current supplied by PSU
+
+        Returns:
+            A float number, electric current in amperes,
+            e.g. 15.4
+        """
+        self.psu_status_dict_update()
+        if self.psu_status_dict["InputStatus"] is False:
+            value = 0
+        else:
+            self.psu_power_dict_update()
+            value = self.psu_power_dict["Outputs"]["Current"]["Value"]
+            if value is None:
+                value = 0
+        return round(float(value), 1)
+
+    def get_power(self):
+        """
+        Retrieves current energy supplied by PSU
+
+        Returns:
+            A float number, the power in watts,
+            e.g. 302.6
+        """
+        self.psu_status_dict_update()
+        if self.psu_status_dict["InputStatus"] is False:
+            value = 0
+        else:
+            self.psu_power_dict_update()
+            value = self.psu_power_dict["Outputs"]["Power"]["Value"]
+            if value is None:
+                value = 0
+        return round(float(value), 1)
+
+    def get_powergood_status(self):
+        """
+        Retrieves the powergood status of PSU
+
+        Returns:
+            A boolean, True if PSU has stablized its output voltages and
+            passed all its internal self-tests, False if not.
+        """
+        return self.int_case.get_psu_input_output_status(self.name)
+
+    def get_status_led(self):
+        """
+        Gets the state of the PSU status LED
+
+        Returns:
+            A string, one of the predefined STATUS_LED_COLOR_* strings.
+        """
+        if not self.get_presence():
+            return "N/A"
+        if self.int_case.get_psu_input_output_status(self.name):
+            return self.STATUS_LED_COLOR_GREEN
+        return self.STATUS_LED_COLOR_RED
+
+    def set_status_led(self, color):
+        """
+        Sets the state of the PSU status LED
+        Args:
+            color: A string representing the color with which to set the
+                   PSU status LED
+        Returns:
+            bool: True if status LED state is set successfully, False if
+                  not
+        """
+        # not supported
+        return False
+
+    def get_temperature(self):
+        """
+        Retrieves current temperature reading from PSU
+
+        Returns:
+            A float number of current temperature in Celsius up to nearest thousandth
+            of one degree Celsius, e.g. 30.125
+        """
+        self.psu_status_dict_update()
+        value = self.psu_status_dict["Temperature"]["Value"]
+        if value is None:
+            value = 0
+        return round(float(value), 1)
+
+    def get_temperature_high_threshold(self):
+        """
+        Retrieves the high threshold temperature of PSU
+
+        Returns:
+            A float number, the high threshold temperature of PSU in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        self.psu_status_dict_update()
+        value = self.psu_status_dict["Temperature"]["Max"]
+        if value is None:
+            value = 0
+        return round(float(value), 1)
+
+    def get_voltage_high_threshold(self):
+        """
+        Retrieves the high threshold PSU voltage output
+
+        Returns:
+            A float number, the high threshold output voltage in volts,
+            e.g. 12.1
+        """
+        self.psu_power_dict_update()
+        value = self.psu_power_dict["Outputs"]["Voltage"]["HighAlarm"]
+        if value is None:
+            value = 0
+        return round(float(value), 1)
+
+    def get_voltage_low_threshold(self):
+        """
+        Retrieves the low threshold PSU voltage output
+
+        Returns:
+            A float number, the low threshold output voltage in volts,
+            e.g. 12.1
+        """
+        self.psu_power_dict_update()
+        value = self.psu_power_dict["Outputs"]["Voltage"]["LowAlarm"]
+        if value is None:
+            value = 0
+        return round(float(value), 1)
+
+    def get_input_voltage(self):
+        """
+        Get the input voltage of the PSU
+
+        Returns:
+            A float number, the input voltage in volts,
+        """
+        self.psu_status_dict_update()
+        if self.psu_status_dict["InputStatus"] is False:
+            value = 0
+        else:
+            self.psu_power_dict_update()
+            value = self.psu_power_dict["Inputs"]["Voltage"]["Value"]
+            if value is None:
+                value = 0
+        return round(float(value), 1)
+
+    def get_input_current(self):
+        """
+        Get the input electric current of the PSU
+
+        Returns:
+            A float number, the input current in amperes, e.g 220.3
+        """
+        self.psu_status_dict_update()
+        if self.psu_status_dict["InputStatus"] is False:
+            value = 0
+        else:
+            self.psu_power_dict_update()
+            value = self.psu_power_dict["Inputs"]["Current"]["Value"]
+            if value is None:
+                value = 0
+        return round(float(value), 1)
+
+    def get_input_power(self):
+        """
+        Get the input current energy of the PSU
+
+        Returns:
+            A float number, the input power in watts, e.g. 302.6
+        """
+        self.psu_status_dict_update()
+        if self.psu_status_dict["InputStatus"] is False:
+            value = 0
+        else:
+            self.psu_power_dict_update()
+            value = self.psu_power_dict["Inputs"]["Power"]["Value"]
+            if value is None:
+                value = 0
+        return round(float(value), 1)
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        self.psu_dict_update()
+        return self.psu_dict["HW"]
+
+    def get_vendor(self):
+        """
+        Retrieves the vendor name of the psu
+
+        Returns:
+            string: Vendor name of psu
+        """
+        self.psu_dict_update()
+        return self.psu_dict["VENDOR"]
+
+    def get_maximum_supplied_power(self):
+        """
+        Retrieves the maximum supplied power by PSU
+
+        Returns:
+            A float number, the maximum power output in Watts.
+            e.g. 1200.1
+        """
+        return False
+
+    def get_thermal(self, index):
+        """
+        Retrieves thermal unit represented by (0-based) index <index>
+
+        Args:
+            index: An integer, the index (0-based) of the thermal to
+            retrieve
+
+        Returns:
+            An object dervied from ThermalBase representing the specified thermal
+        """
+        return False
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py
new file mode 100644
index 000000000000..97401083f458
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py
@@ -0,0 +1,480 @@
+#!/usr/bin/python
+# -*- coding: UTF-8 -*-
+
+#############################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the platform information
+#
+#
+# *_device.py config version instruction:
+#      ver 1.0 - platform api:
+#           "presence_cpld": {
+#               "dev_id": {
+#                   [dev_id]: {
+#                       "offset": {
+#                           [offset]: [port_id]
+#                       }
+#                    }
+#                 }
+#              }
+#           "reset_cpld": {
+#               "dev_id": {
+#                   [dev_id]: {
+#                       "offset": {
+#                           [offset]: [port_id]
+#                       }
+#                    }
+#                 }
+#           }
+#      ver 2.0 - wb_plat:
+#               "presence_path": "/xx/wb_plat/xx[port_id]/present"
+#               "eeprom_path": "/sys/bus/i2c/devices/i2c-[bus]/[bus]-0050/eeprom"
+#               "reset_path": "/xx/wb_plat/xx[port_id]/reset"
+#############################################################################
+import sys
+import time
+import syslog
+import traceback
+from abc import abstractmethod
+
+configfile_pre = "/usr/local/bin/"
+sys.path.append(configfile_pre)
+
+try:
+    from platform_intf import *
+    from sonic_platform_base.sonic_xcvr.sfp_optoe_base import SfpOptoeBase
+    from plat_hal.baseutil import baseutil
+
+except ImportError as error:
+    raise ImportError(str(error) + "- required module not found") from error
+
+LOG_DEBUG_LEVEL = 1
+LOG_WARNING_LEVEL = 2
+LOG_ERROR_LEVEL = 3
+
+
+class Sfp(SfpOptoeBase):
+
+    OPTOE_DRV_TYPE1 = 1
+    OPTOE_DRV_TYPE2 = 2
+    OPTOE_DRV_TYPE3 = 3
+
+    # index must start at 1
+    def __init__(self, index):
+        SfpOptoeBase.__init__(self)
+        self.sfp_type = None
+        sfp_config = baseutil.get_config().get("sfps", None)
+        self.log_level_config = sfp_config.get("log_level", LOG_WARNING_LEVEL)
+        # Init instance of SfpCust
+        ver = sfp_config.get("ver", None)
+        if ver is None:
+            self._sfplog(LOG_ERROR_LEVEL, "Get Ver Config Error!")
+        vers = int(float(ver))
+        if vers == 1:
+            self._sfp_api = SfpV1(index)
+        elif vers == 2:
+            self._sfp_api = SfpV2(index)
+        else:
+            self._sfplog(LOG_ERROR_LEVEL, "Get SfpVer Error!")
+
+    def get_eeprom_path(self):
+        return self._sfp_api._get_eeprom_path()
+
+    def read_eeprom(self, offset, num_bytes):
+        return self._sfp_api.read_eeprom(offset, num_bytes)
+
+    def write_eeprom(self, offset, num_bytes, write_buffer):
+        return self._sfp_api.write_eeprom(offset, num_bytes, write_buffer)
+
+    def get_presence(self):
+        return self._sfp_api.get_presence()
+
+    def get_transceiver_info(self):
+        # temporary solution for a sonic202111 bug
+        transceiver_info = super().get_transceiver_info()
+        try:
+            if transceiver_info is not None and transceiver_info["vendor_rev"] is not None:
+                transceiver_info["hardware_rev"] = transceiver_info["vendor_rev"]
+        except BaseException:
+            print(traceback.format_exc())
+            return None
+        return transceiver_info
+
+    def reset(self):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'SFP':
+            self._sfplog(LOG_ERROR_LEVEL, 'SFP does not support reset')
+            return False
+
+        self._sfplog(LOG_DEBUG_LEVEL, 'resetting...')
+        ret = self._sfp_api.set_reset(True)
+        if ret:
+            time.sleep(0.5)
+            ret = self._sfp_api.set_reset(False)
+
+        return ret
+
+    def get_lpmode(self):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'SFP':
+            self._sfplog(LOG_WARNING_LEVEL, 'SFP does not support lpmode')
+            return False
+
+        # implement in future
+
+        return False
+
+    def set_lpmode(self, lpmode):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None or self._xcvr_api is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'QSFP-DD':
+            return SfpOptoeBase.set_lpmode(self, lpmode)
+        if self.sfp_type == 'QSFP':
+            if lpmode:
+                return self._xcvr_api.set_power_override(True, lpmode)
+            return self._xcvr_api.set_power_override(False, lpmode)
+        self._sfplog(LOG_WARNING_LEVEL, 'SFP does not support lpmode')
+        return False
+
+    def set_optoe_write_max(self, write_max):
+        """
+        This func is declared and implemented by SONiC but we're not supported
+        so override it as NotImplemented
+        """
+        self._sfplog(LOG_DEBUG_LEVEL, "set_optoe_write_max NotImplemented")
+
+    def refresh_xcvr_api(self):
+        """
+        Updates the XcvrApi associated with this SFP
+        """
+        self._xcvr_api = self._xcvr_api_factory.create_xcvr_api()
+        class_name = self._xcvr_api.__class__.__name__
+        optoe_type = None
+        # set sfp_type
+        if 'CmisApi' in class_name:
+            self.sfp_type = 'QSFP-DD'
+            optoe_type = self.OPTOE_DRV_TYPE3
+        elif 'Sff8472Api' in class_name:
+            self.sfp_type = 'SFP'
+            optoe_type = self.OPTOE_DRV_TYPE2
+        elif ('Sff8636Api' in class_name or 'Sff8436Api' in class_name):
+            self.sfp_type = 'QSFP'
+            optoe_type = self.OPTOE_DRV_TYPE1
+        # set optoe driver
+        if optoe_type is not None:
+            self._sfp_api.set_optoe_type(optoe_type)
+
+    def _sfplog(self, log_level, msg):
+        if log_level >= self.log_level_config:
+            try:
+                syslog.openlog("Sfp")
+                if log_level == LOG_DEBUG_LEVEL:
+                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                elif log_level == LOG_WARNING_LEVEL:
+                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                elif log_level == LOG_ERROR_LEVEL:
+                    syslog.syslog(syslog.LOG_ERR, msg)
+                syslog.closelog()
+
+            except BaseException:
+                print(traceback.format_exc())
+
+
+class SfpCust():
+    def __init__(self, index):
+        self.eeprom_path = None
+        self._init_config(index)
+
+    def _init_config(self, index):
+        sfp_config = baseutil.get_config().get("sfps", None)
+        self.log_level_config = sfp_config.get("log_level", LOG_WARNING_LEVEL)
+        self._port_id = index
+        self.eeprom_retry_times = sfp_config.get("eeprom_retry_times", 0)
+        self.eeprom_retry_break_sec = sfp_config.get("eeprom_retry_break_sec", 0)
+
+    def _get_eeprom_path(self):
+        return self.eeprom_path or None
+
+    @abstractmethod
+    def get_presence(self):
+        pass
+
+    def read_eeprom(self, offset, num_bytes):
+        try:
+            for i in range(self.eeprom_retry_times):
+                with open(self._get_eeprom_path(), mode='rb', buffering=0) as f:
+                    f.seek(offset)
+                    result = f.read(num_bytes)
+                    # temporary solution for a sonic202111 bug
+                    if len(result) < num_bytes:
+                        result = result[::-1].zfill(num_bytes)[::-1]
+                    if result is not None:
+                        return bytearray(result)
+                    time.sleep(self.eeprom_retry_break_sec)
+                    continue
+
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+        return None
+
+    def write_eeprom(self, offset, num_bytes, write_buffer):
+        try:
+            for i in range(self.eeprom_retry_times):
+                ret = SfpOptoeBase.write_eeprom(self, offset, num_bytes, write_buffer)
+                if ret is False:
+                    time.sleep(self.eeprom_retry_break_sec)
+                    continue
+                break
+
+            return ret
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+    @abstractmethod
+    def set_optoe_type(self, optoe_type):
+        pass
+
+    @abstractmethod
+    def set_reset(self, reset):
+        pass
+
+    def _convert_str_range_to_int_arr(self, range_str):
+        if not range_str:
+            return []
+
+        int_range_strs = range_str.split(',')
+        range_res = []
+        for int_range_str in int_range_strs:
+            if '-' in int_range_str:
+                range_s = int(int_range_str.split('-')[0])
+                range_e = int(int_range_str.split('-')[1]) + 1
+            else:
+                range_s = int(int_range_str)
+                range_e = int(int_range_str) + 1
+
+            range_res = range_res + list(range(range_s, range_e))
+
+        return range_res
+
+    def _sfplog(self, log_level, msg):
+        if log_level >= self.log_level_config:
+            try:
+                syslog.openlog("SfpCust")
+                if log_level == LOG_DEBUG_LEVEL:
+                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                elif log_level == LOG_WARNING_LEVEL:
+                    syslog.syslog(syslog.LOG_DEBUG, msg)
+                elif log_level == LOG_ERROR_LEVEL:
+                    syslog.syslog(syslog.LOG_ERR, msg)
+                syslog.closelog()
+
+            except BaseException:
+                print(traceback.format_exc())
+
+
+class SfpV1(SfpCust):
+    def _init_config(self, index):
+        super()._init_config(index)
+        # init presence path
+        sfp_config = baseutil.get_config().get("sfps", None)
+        self.presence_cpld = sfp_config.get("presence_cpld", None)
+        self.presence_val_is_present = sfp_config.get("presence_val_is_present", 0)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init presence path")
+
+        # init reset path
+        self.reset_cpld = sfp_config.get("reset_cpld", None)
+        self.reset_val_is_reset = sfp_config.get("reset_val_is_reset", 0)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init cpld path")
+
+    def get_presence(self):
+        if self.presence_cpld is None:
+            self._sfplog(LOG_ERROR_LEVEL, "presence_cpld is None!")
+            return False
+        try:
+            dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.presence_cpld)
+            ret, info = platform_reg_read(0, dev_id, offset, 1)
+            if (ret is False
+                    or info is None):
+                return False
+            return info[0] & (1 << offset_bit) == self.presence_val_is_present
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+    def read_eeprom(self, offset, num_bytes):
+        try:
+            for i in range(self.eeprom_retry_times):
+                ret, info = platform_sfp_read(self._port_id, offset, num_bytes)
+                if (ret is False
+                        or info is None):
+                    time.sleep(self.eeprom_retry_break_sec)
+                    continue
+                eeprom_raw = []
+                for i in range(0, num_bytes):
+                    eeprom_raw.append(0)
+                for n in range(0, len(info)):
+                    eeprom_raw[n] = info[n]
+                # temporary solution for a sonic202111 bug
+                if len(eeprom_raw) < num_bytes:
+                    eeprom_raw = eeprom_raw[::-1].zfill(num_bytes)[::-1]
+                return bytearray(eeprom_raw)
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+        return None
+
+    def write_eeprom(self, offset, num_bytes, write_buffer):
+        try:
+            for i in range(self.eeprom_retry_times):
+                # TODO: write_buffer is bytearray, need to convert to int array
+                val_list = []
+                if isinstance(write_buffer, list):
+                    val_list = write_buffer
+                else:
+                    val_list.append(write_buffer)
+                ret, info = platform_sfp_write(self._port_id, offset, val_list)
+                if (ret is False
+                        or info is None):
+                    time.sleep(self.eeprom_retry_break_sec)
+                    continue
+                return True
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+
+        return False
+
+    def set_optoe_type(self, optoe_type):
+        ret, info = platform_get_optoe_type(self._port_id)
+        if ret is True and info != optoe_type:
+            try:
+                ret, _ = platform_set_optoe_type(self._port_id, optoe_type)
+            except Exception as err:
+                self._sfplog(LOG_ERROR_LEVEL, "Set optoe err %s" % err)
+
+    def set_reset(self, reset):
+        if self.reset_cpld is None:
+            self._sfplog(LOG_ERROR_LEVEL, "reset_cpld is None!")
+            return False
+        try:
+            val = []
+            dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.reset_cpld)
+            ret, info = platform_reg_read(0, dev_id, offset, 1)
+            if self.reset_val_is_reset == 0:
+                if reset:
+                    val.append(info[0] & (~(1 << offset_bit)))
+                else:
+                    val.append(info[0] | (1 << offset_bit))
+            else:
+                if reset:
+                    val.append(info[0] | (1 << offset_bit))
+                else:
+                    val.append(info[0] & (~(1 << offset_bit)))
+
+            ret, info = platform_reg_write(0, dev_id, offset, val)
+            if ret is False:
+                self._sfplog(LOG_ERROR_LEVEL, "platform_reg_write error!")
+                return False
+
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+        return True
+
+    def _get_sfp_cpld_info(self, cpld_config):
+        dev_id = 0
+        offset = 0
+
+        for dev_id_temp in cpld_config["dev_id"]:
+            for offset_temp in cpld_config["dev_id"][dev_id_temp]["offset"]:
+                port_range_str = cpld_config["dev_id"][dev_id_temp]["offset"][offset_temp]
+                port_range_int = self._convert_str_range_to_int_arr(port_range_str)
+                if self._port_id in port_range_int:
+                    dev_id = dev_id_temp
+                    offset = offset_temp
+                    offset_bit = port_range_int.index(self._port_id)
+                    break
+
+        return dev_id, offset, offset_bit
+
+
+class SfpV2(SfpCust):
+    def _init_config(self, index):
+        super()._init_config(index)
+        # init eeprom path
+        sfp_config = baseutil.get_config().get("sfps", None)
+        eeprom_path_config = sfp_config.get("eeprom_path", None)
+        eeprom_path_key = sfp_config.get("eeprom_path_key")[self._port_id - 1]
+        self.eeprom_path = None if eeprom_path_config is None else eeprom_path_config % (
+            eeprom_path_key, eeprom_path_key)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init eeprom path: %s" % self.eeprom_path)
+
+        # init presence path
+        self.presence_path = None if sfp_config.get("presence_path",
+                                                    None) is None else sfp_config.get("presence_path") % self._port_id
+        self.presence_val_is_present = sfp_config.get("presence_val_is_present", 0)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init presence path: %s" % self.presence_path)
+
+        # init optoe driver path
+        optoe_driver_path = sfp_config.get("optoe_driver_path", None)
+        optoe_driver_key = sfp_config.get("optoe_driver_key")[self._port_id - 1]
+        self.dev_class_path = None if optoe_driver_path is None else optoe_driver_path % (
+            optoe_driver_key, optoe_driver_key)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init optoe driver path: %s" % self.dev_class_path)
+
+        # init reset path
+        self.reset_path = None if sfp_config.get(
+            "reset_path",
+            None) is None else sfp_config.get(
+            "reset_path",
+            None) % self._port_id
+        self.reset_val_is_reset = sfp_config.get("reset_val_is_reset", 0)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init reset path: %s" % self.reset_path)
+
+    def get_presence(self):
+        if self.presence_path is None:
+            self._sfplog(LOG_ERROR_LEVEL, "presence_path is None!")
+            return False
+        try:
+            with open(self.presence_path, "rb") as data:
+                sysfs_data = data.read(1)
+                if sysfs_data != "":
+                    result = int(sysfs_data, 16)
+            return result == self.presence_val_is_present
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+    def set_reset(self, reset):
+        return True
+
+    def set_optoe_type(self, optoe_type):
+        if self.dev_class_path is None:
+            self._sfplog(LOG_ERROR_LEVEL, "dev_class_path is None!")
+            return False
+        try:
+            with open(self.dev_class_path, "r+") as dc_file:
+                dc_file_val = dc_file.read(1)
+                if int(dc_file_val) != optoe_type:
+                    dc_str = "%s" % str(optoe_type)
+                    dc_file.write(dc_str)
+                    # dc_file.close()
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+        return True
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/thermal.py
new file mode 100644
index 000000000000..4632de3bc1e4
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/thermal.py
@@ -0,0 +1,234 @@
+#!/usr/bin/env python3
+
+########################################################################
+#
+# Module contains an implementation of SONiC Platform Base API and
+# provides the Thermals' information which are available in the platform
+#
+########################################################################
+
+
+try:
+    import time
+    from sonic_platform_base.thermal_base import ThermalBase
+except ImportError as e:
+    raise ImportError(str(e) + "- required module not found") from e
+
+
+class Thermal(ThermalBase):
+
+    def __init__(self, interface_obj, index):
+        self.temp_dict = {}
+        self.temperature_list = []
+        self.int_case = interface_obj
+        self.index = index
+        self.update_time = 0
+        self.temp_id = "TEMP" + str(index)
+
+    def temp_dict_update(self):
+        local_time = time.time()
+        if not self.temp_dict or (local_time - self.update_time) >= 1:  # update data every 1 seconds
+            self.update_time = local_time
+            self.temp_dict = self.int_case.get_monitor_temp_by_id(self.temp_id)
+
+    def get_name(self):
+        """
+        Retrieves the name of the thermal
+
+        Returns:
+            string: The name of the thermal
+        """
+        self.temp_dict_update()
+        return self.temp_dict["Api_name"]
+
+    def get_presence(self):
+        """
+        Retrieves the presence of the thermal
+
+        Returns:
+            bool: True if thermal is present, False if not
+        """
+        return True
+
+    def get_model(self):
+        """
+        Retrieves the model number (or part number) of the Thermal
+
+        Returns:
+            string: Model/part number of Thermal
+        """
+        return "N/A"
+
+    def get_serial(self):
+        """
+        Retrieves the serial number of the Thermal
+
+        Returns:
+            string: Serial number of Thermal
+        """
+        return "N/A"
+
+    def get_revision(self):
+        """
+        Retrieves the hardware revision of the device
+
+        Returns:
+            string: Revision value of device
+        """
+        return "N/A"
+
+    def get_status(self):
+        """
+        Retrieves the operational status of the thermal
+
+        Returns:
+            A boolean value, True if thermal is operating properly,
+            False if not
+        """
+        self.temp_dict_update()
+        if (self.temp_dict["Value"] >= self.temp_dict["High"]) or (self.temp_dict["Value"] <= self.temp_dict["Low"]):
+            return False
+
+        return True
+
+    def get_position_in_parent(self):
+        """
+        Retrieves 1-based relative physical position in parent device. If the agent cannot determine the parent-relative position
+        for some reason, or if the associated value of entPhysicalContainedIn is '0', then the value '-1' is returned
+        Returns:
+            integer: The 1-based relative physical position in parent device or -1 if cannot determine the position
+        """
+        return -1
+
+    def is_replaceable(self):
+        """
+        Indicate whether this device is replaceable.
+        Returns:
+            bool: True if it is replaceable.
+        """
+        return False
+
+    def get_temperature(self):
+        """
+        Retrieves current temperature reading from thermal
+
+        Returns:
+            A float number of current temperature in Celsius up to nearest thousandth
+            of one degree Celsius, e.g. 30.125
+        """
+        self.temp_dict_update()
+        value = self.temp_dict["Value"]
+        if value is None or value == self.int_case.error_ret:
+            return "N/A"
+        if len(self.temperature_list) >= 1000:
+            del self.temperature_list[0]
+        self.temperature_list.append(float(value))
+        return round(float(value), 1)
+
+    def get_high_threshold(self):
+        """
+        Retrieves the high threshold temperature of thermal
+
+        Returns:
+            A float number, the high threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        self.temp_dict_update()
+        value = self.temp_dict["High"]
+        if value is None or value == self.int_case.error_ret:
+            return "N/A"
+        return round(float(value), 1)
+
+    def get_low_threshold(self):
+        """
+        Retrieves the low threshold temperature of thermal
+
+        Returns:
+            A float number, the low threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        self.temp_dict_update()
+        value = self.temp_dict["Low"]
+        if value is None or value == self.int_case.error_ret:
+            return "N/A"
+        return round(float(value), 1)
+
+    def set_high_threshold(self, temperature):
+        """
+        Sets the high threshold temperature of thermal
+
+        Args :
+            temperature: A float number up to nearest thousandth of one degree Celsius,
+            e.g. 30.125
+
+        Returns:
+            A boolean, True if threshold is set successfully, False if not
+        """
+        # not supported
+        return False
+
+    def set_low_threshold(self, temperature):
+        """
+        Sets the low threshold temperature of thermal
+
+        Args :
+            temperature: A float number up to nearest thousandth of one degree Celsius,
+            e.g. 30.125
+
+        Returns:
+            A boolean, True if threshold is set successfully, False if not
+        """
+        # not supported
+        return False
+
+    def get_high_critical_threshold(self):
+        """
+        Retrieves the high critical threshold temperature of thermal
+
+        Returns:
+            A float number, the high critical threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        self.temp_dict_update()
+        value = self.temp_dict["Max"]
+        if value is None or value == self.int_case.error_ret:
+            return "N/A"
+        return round(float(value), 1)
+
+    def get_low_critical_threshold(self):
+        """
+        Retrieves the low critical threshold temperature of thermal
+
+        Returns:
+            A float number, the low critical threshold temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        self.temp_dict_update()
+        value = self.temp_dict["Min"]
+        if value is None or value == self.int_case.error_ret:
+            return "N/A"
+        return round(float(value), 1)
+
+    def get_minimum_recorded(self):
+        """
+        Retrieves the minimum recorded temperature of thermal
+
+        Returns:
+            A float number, the minimum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        if len(self.temperature_list) == 0:
+            return "N/A"
+        return round(float(min(self.temperature_list)), 1)
+
+    def get_maximum_recorded(self):
+        """
+        Retrieves the maximum recorded temperature of thermal
+
+        Returns:
+            A float number, the maximum recorded temperature of thermal in Celsius
+            up to nearest thousandth of one degree Celsius, e.g. 30.125
+        """
+        if len(self.temperature_list) == 0:
+            return "N/A"
+        return round(float(max(self.temperature_list)), 1)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/watchdog.py
new file mode 100644
index 000000000000..948337f47a9a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/watchdog.py
@@ -0,0 +1,236 @@
+#!/usr/bin/env python3
+
+########################################################################
+#
+#
+# Abstract base class for implementing a platform-specific class with
+# which to interact with a hardware watchdog module in SONiC
+#
+########################################################################
+
+import fcntl
+import os
+import array
+
+try:
+    from sonic_platform_base.watchdog_base import WatchdogBase
+except ImportError as error:
+    raise ImportError(str(error) + "- required module not found") from error
+
+
+# ioctl constants
+IO_WRITE = 0x40000000
+IO_READ = 0x80000000
+IO_READ_WRITE = 0xC0000000
+IO_SIZE_INT = 0x00040000
+IO_SIZE_40 = 0x00280000
+IO_TYPE_WATCHDOG = ord('W') << 8
+
+WDR_INT = IO_READ | IO_SIZE_INT | IO_TYPE_WATCHDOG
+WDR_40 = IO_READ | IO_SIZE_40 | IO_TYPE_WATCHDOG
+WDWR_INT = IO_READ_WRITE | IO_SIZE_INT | IO_TYPE_WATCHDOG
+
+# Watchdog ioctl command
+WDIOC_GETSUPPORT = 0 | WDR_40
+WDIOC_GETSTATUS = 1 | WDR_INT
+WDIOC_GETBOOTSTATUS = 2 | WDR_INT
+WDIOC_GETTEMP = 3 | WDR_INT
+WDIOC_SETOPTIONS = 4 | WDR_INT
+WDIOC_KEEPALIVE = 5 | WDR_INT
+WDIOC_SETTIMEOUT = 6 | WDWR_INT
+WDIOC_GETTIMEOUT = 7 | WDR_INT
+WDIOC_SETPRETIMEOUT = 8 | WDWR_INT
+WDIOC_GETPRETIMEOUT = 9 | WDR_INT
+WDIOC_GETTIMELEFT = 10 | WDR_INT
+
+# Watchdog status constants
+WDIOS_DISABLECARD = 0x0001
+WDIOS_ENABLECARD = 0x0002
+
+WDT_COMMON_ERROR = -1
+WDT_IDENTITY = "CPLD Watchdog"
+WDT_SYSFS_PATH = "/sys/class/watchdog/"
+
+DEFAULT_TIMEOUT = 180
+
+
+class Watchdog(WatchdogBase):
+    """
+    Abstract base class for interfacing with a hardware watchdog module
+    """
+
+    def __init__(self):
+        self.watchdog, self.wdt_main_dev_name = self._get_wdt()
+        self.status_path = "/sys/class/watchdog/%s/status" % self.wdt_main_dev_name
+        self.state_path = "/sys/class/watchdog/%s/state" % self.wdt_main_dev_name
+        self.timeout_path = "/sys/class/watchdog/%s/timeout" % self.wdt_main_dev_name
+        # Set default value
+        self._disable()
+        self.armed = False
+        self.timeout = self._gettimeout()
+
+    def _is_wd_main(self, dev):
+        """
+        Checks watchdog identity
+        """
+        identity = self._read_file(
+            "{}/{}/identity".format(WDT_SYSFS_PATH, dev))
+        return identity == WDT_IDENTITY
+
+    def _get_wdt(self):
+        """
+        Retrieves watchdog device
+        """
+        wdt_main_dev_list = [dev for dev in os.listdir(
+            "/dev/") if dev.startswith("watchdog") and self._is_wd_main(dev)]
+        if not wdt_main_dev_list:
+            return None
+        wdt_main_dev_name = wdt_main_dev_list[0]
+        watchdog_device_path = "/dev/{}".format(wdt_main_dev_name)
+        watchdog = os.open(watchdog_device_path, os.O_RDWR)
+        return watchdog, wdt_main_dev_name
+
+    def _read_file(self, file_path):
+        """
+        Read text file
+        """
+        try:
+            with open(file_path, "r") as fd:
+                txt = fd.read()
+        except IOError:
+            return WDT_COMMON_ERROR
+        return txt.strip()
+
+    def _enable(self):
+        """
+        Turn on the watchdog timer
+        """
+        req = array.array('h', [WDIOS_ENABLECARD])
+        fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False)
+
+    def _disable(self):
+        """
+        Turn off the watchdog timer
+        """
+        req = array.array('h', [WDIOS_DISABLECARD])
+        fcntl.ioctl(self.watchdog, WDIOC_SETOPTIONS, req, False)
+
+    def _keepalive(self):
+        """
+        Keep alive watchdog timer
+        """
+        fcntl.ioctl(self.watchdog, WDIOC_KEEPALIVE)
+
+    def _settimeout(self, seconds):
+        """
+        Set watchdog timer timeout
+        @param seconds - timeout in seconds
+        @return is the actual set timeout
+        """
+        req = array.array('I', [seconds])
+        fcntl.ioctl(self.watchdog, WDIOC_SETTIMEOUT, req, True)
+        return int(req[0])
+
+    def _gettimeout(self):
+        """
+        Get watchdog timeout
+        @return watchdog timeout
+        """
+        req = array.array('I', [0])
+        fcntl.ioctl(self.watchdog, WDIOC_GETTIMEOUT, req, True)
+
+        return int(req[0])
+
+    def _gettimeleft(self):
+        """
+        Get time left before watchdog timer expires
+        @return time left in seconds
+        """
+        req = array.array('I', [0])
+        fcntl.ioctl(self.watchdog, WDIOC_GETTIMELEFT, req, True)
+
+        return int(req[0])
+
+    def arm(self, seconds):
+        """
+        Arm the hardware watchdog with a timeout of <seconds> seconds.
+        If the watchdog is currently armed, calling this function will
+        simply reset the timer to the provided value. If the underlying
+        hardware does not support the value provided in <seconds>, this
+        method should arm the watchdog with the *next greater* available
+        value.
+
+        Returns:
+            An integer specifying the *actual* number of seconds the watchdog
+            was armed with. On failure returns -1.
+        """
+        ret = WDT_COMMON_ERROR
+        if seconds < 0:
+            return ret
+
+        try:
+            if self.timeout != seconds:
+                self.timeout = self._settimeout(seconds)
+            if self.armed:
+                self._keepalive()
+            else:
+                self._settimeout(seconds)
+                self._enable()
+                self.armed = True
+            ret = self.timeout
+        except IOError:
+            pass
+
+        return ret
+
+    def disarm(self):
+        """
+        Disarm the hardware watchdog
+
+        Returns:
+            A boolean, True if watchdog is disarmed successfully, False if not
+        """
+        disarmed = False
+        if self.is_armed():
+            try:
+                self._disable()
+                self.armed = False
+                disarmed = True
+            except IOError:
+                pass
+
+        return disarmed
+
+    def is_armed(self):
+        """
+        Retrieves the armed state of the hardware watchdog.
+
+        Returns:
+            A boolean, True if watchdog is armed, False if not
+        """
+        return self.armed
+
+    def get_remaining_time(self):
+        """
+        If the watchdog is armed, retrieve the number of seconds remaining on
+        the watchdog timer
+
+        Returns:
+            An integer specifying the number of seconds remaining on thei
+            watchdog timer. If the watchdog is not armed, returns -1.
+        """
+        timeleft = WDT_COMMON_ERROR
+
+        if self.armed:
+            try:
+                timeleft = self._gettimeleft()
+            except IOError:
+                pass
+
+        return timeleft
+
+    def __del__(self):
+        """
+        Close watchdog
+        """
+        os.close(self.watchdog)
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/changelog b/platform/broadcom/sonic-platform-modules-micas/debian/changelog
new file mode 100644
index 000000000000..d908208c5e37
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/changelog
@@ -0,0 +1,5 @@
+sonic-micas-platform-modules (1.0) unstable; urgency=low
+
+  * Initial release
+
+ -- support <support>  Fri, 21 APR 2017 11:11:11 -0800
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/compat b/platform/broadcom/sonic-platform-modules-micas/debian/compat
new file mode 100644
index 000000000000..f599e28b8ab0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/compat
@@ -0,0 +1 @@
+10
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/control b/platform/broadcom/sonic-platform-modules-micas/debian/control
new file mode 100644
index 000000000000..edb2c002f6ad
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/control
@@ -0,0 +1,29 @@
+Source: sonic-micas-platform-modules
+Section: main
+Priority: extra
+Maintainer: support
+Standards-Version: 3.9.3
+
+Package: platform-modules-micas-m2-w6510-48v8c
+Architecture: amd64
+Description: kernel modules for platform devices such as fan, led, sfp
+
+Package: platform-modules-micas-m2-w6510-32c
+Architecture: amd64
+Description: kernel modules for platform devices such as fan, led, sfp
+
+Package: platform-modules-micas-m2-w6910-64c
+Architecture: amd64
+Description: kernel modules for platform devices such as fan, led, sfp
+
+Package: platform-modules-micas-m2-w6920-4s
+Architecture: amd64
+Description: kernel modules for platform devices such as fan, led, sfp
+
+Package: platform-modules-micas-m2-w6520-24dc8qc
+Architecture: amd64
+Description: kernel modules for platform devices such as fan, led, sfp
+
+Package: platform-modules-micas-m2-w6930-64qc
+Architecture: amd64
+Description: kernel modules for platform devices such as fan, led, sfp
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/copyright b/platform/broadcom/sonic-platform-modules-micas/debian/copyright
new file mode 100644
index 000000000000..676cdeec726b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/copyright
@@ -0,0 +1,15 @@
+Copyright (C) 2016  Microsoft, Inc
+
+This program is free software; you can redistribute it and/or
+modify it under the terms of the GNU General Public License
+as published by the Free Software Foundation; either version 2
+of the License, or (at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.install
new file mode 100644
index 000000000000..ae2477cf1148
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.install
@@ -0,0 +1 @@
+m2-w6510-32c/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6510-32c-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.postinst
new file mode 100644
index 000000000000..a8132f4f65a9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.postinst
@@ -0,0 +1,10 @@
+#!/bin/sh
+# postinst
+
+kernel_version=$(uname -r)
+
+if [ -e /boot/System.map-${kernel_version} ]; then
+    depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
+fi
+
+#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48v8c.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48v8c.install
new file mode 100644
index 000000000000..6f3e9b257f5d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48v8c.install
@@ -0,0 +1 @@
+m2-w6510-48v8c/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6510-48v8c-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48v8c.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48v8c.postinst
new file mode 100644
index 000000000000..a8132f4f65a9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-48v8c.postinst
@@ -0,0 +1,10 @@
+#!/bin/sh
+# postinst
+
+kernel_version=$(uname -r)
+
+if [ -e /boot/System.map-${kernel_version} ]; then
+    depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
+fi
+
+#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.install
new file mode 100644
index 000000000000..3a94db8f4428
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.install
@@ -0,0 +1 @@
+m2-w6520-24dc8qc/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6520-24dc8qc-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.postinst
new file mode 100644
index 000000000000..a8132f4f65a9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.postinst
@@ -0,0 +1,10 @@
+#!/bin/sh
+# postinst
+
+kernel_version=$(uname -r)
+
+if [ -e /boot/System.map-${kernel_version} ]; then
+    depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
+fi
+
+#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6910-64c.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6910-64c.install
new file mode 100644
index 000000000000..f813226c209b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6910-64c.install
@@ -0,0 +1 @@
+m2-w6910-64c/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6910-64c-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6910-64c.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6910-64c.postinst
new file mode 100644
index 000000000000..a8132f4f65a9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6910-64c.postinst
@@ -0,0 +1,10 @@
+#!/bin/sh
+# postinst
+
+kernel_version=$(uname -r)
+
+if [ -e /boot/System.map-${kernel_version} ]; then
+    depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
+fi
+
+#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-4s.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-4s.install
new file mode 100644
index 000000000000..4c6c156343bd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-4s.install
@@ -0,0 +1 @@
+m2-w6920-4s/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6920-4s-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-4s.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-4s.postinst
new file mode 100644
index 000000000000..a8132f4f65a9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-4s.postinst
@@ -0,0 +1,10 @@
+#!/bin/sh
+# postinst
+
+kernel_version=$(uname -r)
+
+if [ -e /boot/System.map-${kernel_version} ]; then
+    depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
+fi
+
+#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.install
new file mode 100644
index 000000000000..f6e2060d2d11
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.install
@@ -0,0 +1 @@
+m2-w6930-64qc/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6930-64qc-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.postinst
new file mode 100644
index 000000000000..a8132f4f65a9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.postinst
@@ -0,0 +1,10 @@
+#!/bin/sh
+# postinst
+
+kernel_version=$(uname -r)
+
+if [ -e /boot/System.map-${kernel_version} ]; then
+    depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
+fi
+
+#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
new file mode 100644
index 000000000000..f27bca1d6579
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/rule.mk
@@ -0,0 +1,5 @@
+currentdir = $(shell pwd)
+
+MODULE_DIRS := m2-w6510-48v8c
+
+export MODULE_DIRS
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/rules b/platform/broadcom/sonic-platform-modules-micas/debian/rules
new file mode 100755
index 000000000000..e801ef47f459
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/rules
@@ -0,0 +1,92 @@
+#!/usr/bin/make -f
+CC=gcc
+INSTALL_MOD_DIR:=extra
+KVERSION   ?= $(shell uname -r)
+KERNEL_SRC :=  /lib/modules/$(KVERSION)
+MOD_SRC_DIR:= $(shell pwd)
+KBUILD_OUTPUT=$(KERNEL_SRC)/build
+
+LIB_DIR = usr/lib/python3/dist-packages
+CUSTOM_RULES_DIR := $(shell pwd)/debian
+
+export  INSTALL_MOD_DIR top_srcdir KVERSION  KERNEL_SRC CC  KBUILD_OUTPUT CUSTOM_RULES_DIR
+
+include $(CUSTOM_RULES_DIR)/rule.mk
+
+#all product need common
+COMPILE_DIRS = $(MODULE_DIRS)
+
+clean_dirs = $(MODULE_DIRS)
+clean_dirs += common
+
+complie_clean_dirs := $(addprefix _clean_,$(clean_dirs) )
+
+%:
+	dh $@
+build: COMPILE_WHL
+	@echo "build success"
+
+$(complie_clean_dirs):
+	$(MAKE) -C $(patsubst _clean_%,%,$@) clean
+
+common_build :
+	$(MAKE) -C  $(MOD_SRC_DIR)/common
+
+$(COMPILE_DIRS): common_build
+	$(MAKE) -C  $(MOD_SRC_DIR)/$@
+	dh_testdir
+	dh_installdirs
+	cp -r $(MOD_SRC_DIR)/common/build/*  debian/platform-modules-micas-$@/; \
+	cp -r $(MOD_SRC_DIR)/$@/build/*  debian/platform-modules-micas-$@/; \
+
+COMPILE_WHL: $(COMPILE_DIRS)
+	@(for mod in $(MODULE_DIRS); do \
+		cd $(MOD_SRC_DIR)/$${mod}; \
+		cp -r $(MOD_SRC_DIR)/common/lib/plat_hal $(MOD_SRC_DIR)/$${mod}/; \
+		cp -r $(MOD_SRC_DIR)/common/lib/wbutil $(MOD_SRC_DIR)/$${mod}/; \
+		cp -r $(MOD_SRC_DIR)/common/lib/eepromutil $(MOD_SRC_DIR)/$${mod}/; \
+		cp -r $(MOD_SRC_DIR)/common/sonic_platform $(MOD_SRC_DIR)/$${mod}/; \
+		cp $(MOD_SRC_DIR)/common/script/hal_pltfm.py $(MOD_SRC_DIR)/$${mod}/hal_pltfm.py; \
+		cp $(MOD_SRC_DIR)/common/script/platform_util.py $(MOD_SRC_DIR)/$${mod}/platform_util.py; \
+		cp $(MOD_SRC_DIR)/common/script/platform_intf.py $(MOD_SRC_DIR)/$${mod}/platform_intf.py; \
+		python3 setup.py bdist_wheel -d $(MOD_SRC_DIR)/$${mod}/modules; \
+		rm -rf $(MOD_SRC_DIR)/$${mod}/plat_hal; \
+		rm -rf $(MOD_SRC_DIR)/$${mod}/wbutil; \
+		rm -rf $(MOD_SRC_DIR)/$${mod}/eepromutil; \
+		rm -rf $(MOD_SRC_DIR)/$${mod}/sonic_platform; \
+		rm -rf $(MOD_SRC_DIR)/$${mod}/hal_pltfm.py; \
+		rm -rf $(MOD_SRC_DIR)/$${mod}/platform_intf.py; \
+		rm -rf $(MOD_SRC_DIR)/$${mod}/platform_util.py; \
+		cd $(MOD_SRC_DIR); \
+	done)
+
+binary: binary-indep
+	@echo "======================================================="
+
+binary-indep:
+	# Resuming debhelper scripts
+	dh_testroot
+	dh_install
+	dh_installchangelogs
+	dh_installdocs
+	dh_systemd_enable
+	dh_installinit
+	dh_systemd_start
+	dh_link
+	dh_fixperms
+	dh_compress
+	dh_strip
+	dh_installdeb
+	dh_gencontrol
+	dh_md5sums
+	dh_builddeb
+override_dh_usrlocal:
+
+override_dh_pysupport:
+
+clean:  $(complie_clean_dirs)
+	dh_testdir
+	dh_testroot
+	dh_clean
+
+.PHONY: build  $(COMPILE_DIRS) binary binary-arch binary-indep clean
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/cpld_test_header.vme b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/cpld_test_header.vme
new file mode 100644
index 0000000000000000000000000000000000000000..083fd78f3ea1919d9d3737fe0d8d0c7b8b2ce881
GIT binary patch
literal 406
zcmaiu!AgWc7{^Cl9GwWZEU4QY>mrW2O9%#{v#rqDVj^@}T%AMUt^?Upr*1u1&(K43
z?FnqO2k^UmA0NNppMS~gYSXfp);#POTEzEsNrQ-{S16)+_OzzH_2yb`frh&jGzynN
zocKiSc%1|*>JQ(XrjPMM;vcLbWx(?lMPV9>2xnduTlc0w*NEL#8!^N-$!~cVJr}!X
zU*U-Hx_RHReT%cEsj*`cOSm-1L@17ejCweGWq851n7EkCz1hsO3AQcUK?q#pT+$Q+
zaP`9Ix{m7r0$EYyqaQexPBa5Reu@nVOwPd9@%QJs+)cP9_xx1wT$jWNHKXIBQctQq
VsrNb@^ic_@K=0eZ|8`^i#~;mYW4-_Y

literal 0
HcmV?d00001

diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/fpga_test_header.bin b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/fpga_test_header.bin
new file mode 100644
index 000000000000..bdf9ae2139e2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/fpga_test_header.bin
@@ -0,0 +1,10 @@
+fpga_test_header.bin
+FILEHEADER(
+DEVTYPE=0x404a
+TYPE=fpga
+CHAIN=3
+CHIPNAME=fpga
+VERSION=v0
+FILETYPE=SPI-LOGIC-DEV
+CRC=0x00000000
+)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile
new file mode 100644
index 000000000000..1b84abef410a
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile
@@ -0,0 +1,28 @@
+PWD		= $(shell pwd)
+DIR_KERNEL_SRC = $(PWD)/modules/driver
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+SUB_BUILD_DIR = $(PWD)/build
+INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)
+INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
+INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages
+INSTALL_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/plat_sysfs_cfg
+INSTALL_UPGRADE_TEST_DIR = $(SUB_BUILD_DIR)/etc/.upgrade_test
+
+all:
+	$(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules
+	@if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi
+	cp -r $(DIR_KERNEL_SRC)/*.ko $(INSTALL_DIR)
+	@if [ ! -d ${INSTALL_SCRIPT_DIR} ]; then mkdir -p ${INSTALL_SCRIPT_DIR} ;fi
+	cp -r $(PWD)/config/*  $(INSTALL_SCRIPT_DIR)
+	@if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi
+	@if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi
+	@if [ ! -d ${INSTALL_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_SYSFS_CFG_DIR} ;fi
+	@if [ -d $(PWD)/plat_sysfs_cfg/ ]; then cp -r $(PWD)/plat_sysfs_cfg/* ${INSTALL_SYSFS_CFG_DIR} ;fi
+	@if [ ! -d ${INSTALL_UPGRADE_TEST_DIR} ]; then mkdir -p ${INSTALL_UPGRADE_TEST_DIR} ;fi
+	@if [ -d $(PWD)/.upgrade_test/ ]; then cp -r $(PWD)/.upgrade_test/* ${INSTALL_UPGRADE_TEST_DIR} ;fi
+clean:
+	rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd
+	rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order
+	rm -rf ${DIR_KERNEL_SRC}/.tmp_versions
+	rm -rf $(SUB_BUILD_DIR)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
new file mode 100755
index 000000000000..5aef2f7a3086
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
@@ -0,0 +1,1110 @@
+#!/usr/bin/python
+# -*- coding: UTF-8 -*-
+from platform_common import *
+
+STARTMODULE = {
+    "hal_fanctrl": 1,
+    "hal_ledctrl": 1,
+    "avscontrol": 1,
+    "dev_monitor": 1,
+    "pmon_syslog": 1,
+    "tty_console": 1,
+    "macledreset": 1,
+    "sff_temp_polling": 1,
+    "generate_airflow": 1,
+    "reboot_cause": 1,
+}
+
+MAC_LED_RESET = {"pcibus": 8, "slot": 0, "fn": 0, "bar": 0, "offset": 64, "reset": 0x98}
+
+MANUINFO_CONF = {
+    "bios": {
+        "key": "BIOS",
+        "head": True,
+        "next": "onie"
+    },
+    "bios_vendor": {
+        "parent": "bios",
+        "key": "Vendor",
+        "cmd": "dmidecode -t 0 |grep Vendor",
+        "pattern": r".*Vendor",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "bios_version": {
+        "parent": "bios",
+        "key": "Version",
+        "cmd": "dmidecode -t 0 |grep Version",
+        "pattern": r".*Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "bios_date": {
+        "parent": "bios",
+        "key": "Release Date",
+        "cmd": "dmidecode -t 0 |grep Release",
+        "pattern": r".*Release Date",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+    "onie": {
+        "key": "ONIE",
+        "next": "cpu"
+    },
+    "onie_date": {
+        "parent": "onie",
+        "key": "Build Date",
+        "file": "/host/machine.conf",
+        "pattern": r"^onie_build_date",
+        "separator": "=",
+        "arrt_index": 1,
+    },
+    "onie_version": {
+        "parent": "onie",
+        "key": "Version",
+        "file": "/host/machine.conf",
+        "pattern": r"^onie_version",
+        "separator": "=",
+        "arrt_index": 2,
+    },
+
+    "cpu": {
+        "key": "CPU",
+        "next": "ssd"
+    },
+    "cpu_vendor": {
+        "parent": "cpu",
+        "key": "Vendor",
+        "cmd": "dmidecode --type processor |grep Manufacturer",
+        "pattern": r".*Manufacturer",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "cpu_model": {
+        "parent": "cpu",
+        "key": "Device Model",
+        "cmd": "dmidecode --type processor | grep Version",
+        "pattern": r".*Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "cpu_core": {
+        "parent": "cpu",
+        "key": "Core Count",
+        "cmd": "dmidecode --type processor | grep \"Core Count\"",
+        "pattern": r".*Core Count",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+    "cpu_thread": {
+        "parent": "cpu",
+        "key": "Thread Count",
+        "cmd": "dmidecode --type processor | grep \"Thread Count\"",
+        "pattern": r".*Thread Count",
+        "separator": ":",
+        "arrt_index": 4,
+    },
+    "ssd": {
+        "key": "SSD",
+        "next": "cpld"
+    },
+    "ssd_model": {
+        "parent": "ssd",
+        "key": "Device Model",
+        "cmd": "smartctl -i /dev/sda |grep \"Device Model\"",
+        "pattern": r".*Device Model",
+        "separator": ":",
+        "arrt_index": 1,
+    },
+    "ssd_fw": {
+        "parent": "ssd",
+        "key": "Firmware Version",
+        "cmd": "smartctl -i /dev/sda |grep \"Firmware Version\"",
+        "pattern": r".*Firmware Version",
+        "separator": ":",
+        "arrt_index": 2,
+    },
+    "ssd_user_cap": {
+        "parent": "ssd",
+        "key": "User Capacity",
+        "cmd": "smartctl -i /dev/sda |grep \"User Capacity\"",
+        "pattern": r".*User Capacity",
+        "separator": ":",
+        "arrt_index": 3,
+    },
+
+    "cpld": {
+        "key": "CPLD",
+        "next": "psu"
+    },
+
+    "cpld1": {
+        "key": "CPLD1",
+        "parent": "cpld",
+        "arrt_index": 1,
+    },
+    "cpld1_model": {
+        "key": "Device Model",
+        "parent": "cpld1",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld1_vender": {
+        "key": "Vendor",
+        "parent": "cpld1",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld1_desc": {
+        "key": "Description",
+        "parent": "cpld1",
+        "config": "CPU_CPLD",
+        "arrt_index": 3,
+    },
+    "cpld1_version": {
+        "key": "Firmware Version",
+        "parent": "cpld1",
+        "reg": {
+            "loc": "/dev/port",
+            "offset": 0x700,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld2": {
+        "key": "CPLD2",
+        "parent": "cpld",
+        "arrt_index": 2,
+    },
+    "cpld2_model": {
+        "key": "Device Model",
+        "parent": "cpld2",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld2_vender": {
+        "key": "Vendor",
+        "parent": "cpld2",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld2_desc": {
+        "key": "Description",
+        "parent": "cpld2",
+        "config": "CONNECT_CPLD",
+        "arrt_index": 3,
+    },
+    "cpld2_version": {
+        "key": "Firmware Version",
+        "parent": "cpld2",
+        "reg": {
+            "loc": "/dev/port",
+            "offset": 0x900,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld3": {
+        "key": "CPLD3",
+        "parent": "cpld",
+        "arrt_index": 3,
+    },
+    "cpld3_model": {
+        "key": "Device Model",
+        "parent": "cpld3",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld3_vender": {
+        "key": "Vendor",
+        "parent": "cpld3",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld3_desc": {
+        "key": "Description",
+        "parent": "cpld3",
+        "config": "CONNECT_CPLD-FAN",
+        "arrt_index": 3,
+    },
+    "cpld3_version": {
+        "key": "Firmware Version",
+        "parent": "cpld3",
+        "i2c": {
+            "bus": "2",
+            "loc": "0x0d",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld4": {
+        "key": "CPLD4",
+        "parent": "cpld",
+        "arrt_index": 4,
+    },
+    "cpld4_model": {
+        "key": "Device Model",
+        "parent": "cpld4",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld4_vender": {
+        "key": "Vendor",
+        "parent": "cpld4",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld4_desc": {
+        "key": "Description",
+        "parent": "cpld4",
+        "config": "MAC_CPLD1",
+        "arrt_index": 3,
+    },
+    "cpld4_version": {
+        "key": "Firmware Version",
+        "parent": "cpld4",
+        "i2c": {
+            "bus": "8",
+            "loc": "0x30",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "cpld5": {
+        "key": "CPLD5",
+        "parent": "cpld",
+        "arrt_index": 5,
+    },
+    "cpld5_model": {
+        "key": "Device Model",
+        "parent": "cpld5",
+        "config": "LCMXO3LF-2100C-5BG256C",
+        "arrt_index": 1,
+    },
+    "cpld5_vender": {
+        "key": "Vendor",
+        "parent": "cpld5",
+        "config": "LATTICE",
+        "arrt_index": 2,
+    },
+    "cpld5_desc": {
+        "key": "Description",
+        "parent": "cpld5",
+        "config": "MAC_CPLD2",
+        "arrt_index": 3,
+    },
+    "cpld5_version": {
+        "key": "Firmware Version",
+        "parent": "cpld5",
+        "i2c": {
+            "bus": "8",
+            "loc": "0x31",
+            "offset": 0,
+            "size": 4
+        },
+        "callback": "cpld_format",
+        "arrt_index": 4,
+    },
+
+    "psu": {
+        "key": "PSU",
+        "next": "fan"
+    },
+
+    "psu1": {
+        "parent": "psu",
+        "key": "PSU1",
+        "arrt_index": 1,
+    },
+    "psu1_hw_version": {
+        "key": "Hardware Version",
+        "parent": "psu1",
+        "extra": {
+            "funcname": "getPsu",
+            "id": "psu1",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "psu1_fw_version": {
+        "key": "Firmware Version",
+        "parent": "psu1",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "psu2": {
+        "parent": "psu",
+        "key": "PSU2",
+        "arrt_index": 2,
+    },
+    "psu2_hw_version": {
+        "key": "Hardware Version",
+        "parent": "psu2",
+        "extra": {
+            "funcname": "getPsu",
+            "id": "psu2",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "psu2_fw_version": {
+        "key": "Firmware Version",
+        "parent": "psu2",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan": {
+        "key": "FAN",
+        "next": "i210"
+    },
+
+    "fan1": {
+        "key": "FAN1",
+        "parent": "fan",
+        "arrt_index": 1,
+    },
+    "fan1_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan1",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan1",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan1_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan1",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan2": {
+        "key": "FAN2",
+        "parent": "fan",
+        "arrt_index": 2,
+    },
+    "fan2_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan2",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan2",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan2_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan2",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan3": {
+        "key": "FAN3",
+        "parent": "fan",
+        "arrt_index": 3,
+    },
+    "fan3_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan3",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan3",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan3_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan3",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "fan4": {
+        "key": "FAN4",
+        "parent": "fan",
+        "arrt_index": 4,
+    },
+    "fan4_hw_version": {
+        "key": "Hardware Version",
+        "parent": "fan4",
+        "extra": {
+            "funcname": "checkFan",
+            "id": "fan4",
+            "key": "hw_version"
+        },
+        "arrt_index": 1,
+    },
+    "fan4_fw_version": {
+        "key": "Firmware Version",
+        "parent": "fan4",
+        "config": "NA",
+        "arrt_index": 2,
+    },
+
+    "i210": {
+        "key": "NIC",
+        "next": "fpga"
+    },
+    "i210_model": {
+        "parent": "i210",
+        "config": "NA",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "i210_vendor": {
+        "parent": "i210",
+        "config": "INTEL",
+        "key": "Vendor",
+        "arrt_index": 2,
+    },
+    "i210_version": {
+        "parent": "i210",
+        "cmd": "ethtool -i eth0",
+        "pattern": r"firmware-version",
+        "separator": ":",
+        "key": "Firmware Version",
+        "arrt_index": 3,
+    },
+
+    "fpga": {
+        "key": "FPGA",
+        "next": "asic"
+    },
+    "fpga_model": {
+        "parent": "fpga",
+        "config": "XC7A15T-2FGG484C",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "fpga_vendor": {
+        "parent": "fpga",
+        "config": "XILINX",
+        "key": "Vendor",
+        "arrt_index": 2,
+    },
+    "fpga_desc": {
+        "parent": "fpga",
+        "config": "NA",
+        "key": "Description",
+        "arrt_index": 3,
+    },
+    "fpga_hw_version": {
+        "parent": "fpga",
+        "config": "NA",
+        "key": "Hardware Version",
+        "arrt_index": 4,
+    },
+    "fpga_fw_version": {
+        "parent": "fpga",
+        "pci": {
+            "bus": 8,
+            "slot": 0,
+            "fn": 0,
+            "bar": 0,
+            "offset": 0
+        },
+        "key": "Firmware Version",
+        "arrt_index": 5,
+    },
+    "fpga_date": {
+        "parent": "fpga",
+        "pci": {
+            "bus": 8,
+            "slot": 0,
+            "fn": 0,
+            "bar": 0,
+            "offset": 4
+        },
+        "key": "Build Date",
+        "arrt_index": 6,
+    },
+    "asic": {
+        "key": "ASIC",
+    },
+    "sdk_model": {
+        "parent": "asic",
+        "cmd": "bcmcmd -t 1 att",
+        "pattern": r"^Attach",
+        "regular": r"(?<=\()[^)]*(?=\))",
+        "key": "Device Model",
+        "arrt_index": 1,
+    },
+    "sdk_version": {
+        "parent": "asic",
+        "cmd": "bcmcmd -t 1 version | grep Release",
+        "pattern": r".*Release",
+        "separator": ":",
+        "key": "SDK Version",
+        "arrt_index": 2,
+    },
+    "pci_version": {
+        "parent": "asic",
+        "cmd": "bcmcmd -t 1 \"pciephy fw version\" |grep \"PCIe FW version\"",
+        "pattern": r".*PCIe FW version",
+        "separator": ":",
+        "key": "PCIe Firmware Version",
+        "arrt_index": 3,
+    },
+}
+
+PMON_SYSLOG_STATUS = {
+    "polling_time": 3,
+    "sffs": {
+        "present": {"path": ["/sys/wb_plat/sff/*/present"], "ABSENT": 0},
+        "nochangedmsgflag": 0,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 1,
+        "alias": {
+            "sff1": "Ethernet1",
+            "sff2": "Ethernet2",
+            "sff3": "Ethernet3",
+            "sff4": "Ethernet4",
+            "sff5": "Ethernet5",
+            "sff6": "Ethernet6",
+            "sff7": "Ethernet7",
+            "sff8": "Ethernet8",
+            "sff9": "Ethernet9",
+            "sff10": "Ethernet10",
+            "sff11": "Ethernet11",
+            "sff12": "Ethernet12",
+            "sff13": "Ethernet13",
+            "sff14": "Ethernet14",
+            "sff15": "Ethernet15",
+            "sff16": "Ethernet16",
+            "sff17": "Ethernet17",
+            "sff18": "Ethernet18",
+            "sff19": "Ethernet19",
+            "sff20": "Ethernet20",
+            "sff21": "Ethernet21",
+            "sff22": "Ethernet22",
+            "sff23": "Ethernet23",
+            "sff24": "Ethernet24",
+            "sff25": "Ethernet25",
+            "sff26": "Ethernet26",
+            "sff27": "Ethernet27",
+            "sff28": "Ethernet28",
+            "sff29": "Ethernet29",
+            "sff30": "Ethernet30",
+            "sff31": "Ethernet31",
+            "sff32": "Ethernet32",
+            "sff33": "Ethernet33",
+            "sff34": "Ethernet34",
+            "sff35": "Ethernet35",
+            "sff36": "Ethernet36",
+            "sff37": "Ethernet37",
+            "sff38": "Ethernet38",
+            "sff39": "Ethernet39",
+            "sff40": "Ethernet40",
+            "sff41": "Ethernet41",
+            "sff42": "Ethernet42",
+            "sff43": "Ethernet43",
+            "sff44": "Ethernet44",
+            "sff45": "Ethernet45",
+            "sff46": "Ethernet46",
+            "sff47": "Ethernet47",
+            "sff48": "Ethernet48",
+            "sff49": "Ethernet49",
+            "sff50": "Ethernet50",
+            "sff51": "Ethernet51",
+            "sff52": "Ethernet52",
+            "sff53": "Ethernet53",
+            "sff54": "Ethernet54",
+            "sff55": "Ethernet55",
+            "sff56": "Ethernet56",
+        }
+    },
+    "fans": {
+        "present": {"path": ["/sys/wb_plat/fan/*/present"], "ABSENT": 0},
+        "status": [
+            {"path": "/sys/wb_plat/fan/%s/motor0/status", 'okval': 1},
+            {"path": "/sys/wb_plat/fan/%s/motor1/status", 'okval': 1},
+        ],
+        "nochangedmsgflag": 1,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 0,
+        "alias": {
+            "fan1": "FAN1",
+            "fan2": "FAN2",
+            "fan3": "FAN3",
+            "fan4": "FAN4"
+        }
+    },
+    "psus": {
+        "present": {"path": ["/sys/wb_plat/psu/*/present"], "ABSENT": 0},
+        "status": [
+            {"path": "/sys/wb_plat/psu/%s/output", "okval": 1},
+            {"path": "/sys/wb_plat/psu/%s/alert", "okval": 0},
+        ],
+        "nochangedmsgflag": 1,
+        "nochangedmsgtime": 60,
+        "noprintfirsttimeflag": 0,
+        "alias": {
+            "psu1": "PSU1",
+            "psu2": "PSU2"
+        }
+    }
+}
+
+##################### MAC Voltage adjust####################################
+MAC_DEFAULT_PARAM = [
+    {
+        "name": "mac_core",              # AVS name
+        "type": 1,                       # 1: used default value, if rov value not in range. 0: do nothing, if rov value not in range
+        "default": 0x74,                 # default value, if rov value not in range
+        "sdkreg": "TOP_AVS_SEL_REG",     # SDK register name
+        "sdktype": 0,                    # 0: No shift operation required, 1: shift operation required
+        "macregloc": 24,                 # Shift right 24 bits
+        "mask": 0xff,                    # Use with macregloc
+        "rov_source": 1,                 # 0:get rov value from cpld, 1: get rov value from SDK
+        "cpld_avs": {"bus": 6, "loc": 0x0d, "offset": 0xc3, "gettype": "i2c"},
+        "set_avs": {
+            "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/avs0_vout",
+            "gettype": "sysfs", "formula": "int((%f)*1000000)"
+        },
+        "mac_avs_param": {
+            0x08: 0.888,
+            0x72: 0.900,
+            0x73: 0.894,
+            0x74: 0.888,
+            0x75: 0.882,
+            0x76: 0.875,
+            0x77: 0.869,
+            0x78: 0.863,
+            0x79: 0.857,
+            0x7a: 0.850,
+            0x7b: 0.844,
+            0x7c: 0.838,
+            0x7d: 0.832,
+            0x7e: 0.825,
+            0x7f: 0.819,
+            0x80: 0.813,
+            0x81: 0.807,
+            0x82: 0.800,
+            0x83: 0.794,
+            0x84: 0.788,
+            0x85: 0.782,
+            0x86: 0.775,
+            0x87: 0.769,
+            0x88: 0.763,
+            0x89: 0.757,
+            0x8A: 0.750
+        }
+    }
+]
+
+BLACKLIST_DRIVERS = [
+    {"name": "i2c_i801", "delay": 0},
+]
+
+DRIVERLISTS = [
+    {"name": "wb_i2c_i801", "delay": 0},
+    {"name": "wb_gpio_d1500", "delay": 0},
+    {"name": "i2c_dev", "delay": 0},
+    {"name": "wb_i2c_algo_bit", "delay": 0},
+    {"name": "wb_i2c_gpio", "delay": 0},
+    {"name": "i2c_mux", "delay": 0},
+    {"name": "wb_gpio_device", "delay": 0},
+    {"name": "wb_i2c_gpio_device gpio_sda=17 gpio_scl=1 gpio_udelay=2", "delay": 0},
+    {"name": "platform_common dfd_my_type=0x404a", "delay": 0},
+    {"name": "wb_lpc_drv", "delay": 0},
+    {"name": "wb_lpc_drv_device", "delay": 0},
+    {"name": "wb_io_dev", "delay": 0},
+    {"name": "wb_io_dev_device", "delay": 0},
+    {"name": "wb_fpga_pcie", "delay": 0},
+    {"name": "wb_pcie_dev", "delay": 0},
+    {"name": "wb_pcie_dev_device", "delay": 0},
+    {"name": "wb_i2c_dev", "delay": 0},
+    {"name": "wb_i2c_ocores", "delay": 0},
+    {"name": "wb_i2c_ocores_device", "delay": 0},
+    {"name": "wb_i2c_mux_pca9641", "delay": 0},
+    {"name": "wb_i2c_mux_pca954x", "delay": 0},
+    {"name": "wb_i2c_mux_pca954x_device", "delay": 0},
+    {"name": "wb_i2c_dev_device", "delay": 0},
+    {"name": "wb_lm75", "delay": 0},
+    {"name": "wb_optoe", "delay": 0},
+    {"name": "wb_at24", "delay": 0},
+    {"name": "wb_mac_bsc", "delay": 0},
+    {"name": "wb_pmbus_core", "delay": 0},
+    {"name": "wb_isl68137", "delay": 0},
+    {"name": "wb_csu550", "delay": 0},
+    {"name": "wb_ina3221", "delay": 0},
+    {"name": "wb_tps53622", "delay": 0},
+    {"name": "firmware_driver_cpld", "delay": 0},
+    {"name": "firmware_driver_ispvme", "delay": 0},
+    {"name": "firmware_driver_sysfs", "delay": 0},
+    {"name": "wb_firmware_upgrade_device", "delay": 0},
+    {"name": "plat_dfd", "delay": 0},
+    {"name": "plat_switch", "delay": 0},
+    {"name": "plat_fan", "delay": 0},
+    {"name": "plat_psu", "delay": 0},
+    {"name": "plat_sff", "delay": 0},
+]
+
+DEVICE = [
+    {"name": "wb_24c02", "bus": 0, "loc": 0x56},
+    {"name": "wb_mac_bsc_td3", "bus": 3, "loc": 0x44},
+    # fan
+    {"name": "wb_24c02", "bus": 16, "loc": 0x50},
+    {"name": "wb_24c02", "bus": 17, "loc": 0x50},
+    {"name": "wb_24c02", "bus": 18, "loc": 0x50},
+    {"name": "wb_24c02", "bus": 19, "loc": 0x50},
+    # psu
+    {"name": "wb_24c02", "bus": 24, "loc": 0x50},
+    {"name": "wb_dps550", "bus": 24, "loc": 0x58},
+    {"name": "wb_24c02", "bus": 25, "loc": 0x50},
+    {"name": "wb_dps550", "bus": 25, "loc": 0x58},
+    # temp
+    {"name": "wb_lm75", "bus": 3, "loc": 0x48},
+    {"name": "wb_lm75", "bus": 3, "loc": 0x49},
+    {"name": "wb_lm75", "bus": 3, "loc": 0x4a},
+    {"name": "wb_lm75", "bus": 3, "loc": 0x4b},
+    {"name": "wb_lm75", "bus": 3, "loc": 0x4c},
+    # dcdc
+    {"name": "wb_ina3221", "bus": 7, "loc": 0x40},
+    {"name": "wb_ina3221", "bus": 7, "loc": 0x41},
+    {"name": "wb_ina3221", "bus": 7, "loc": 0x42},
+    {"name": "wb_ina3221", "bus": 7, "loc": 0x43},
+    {"name": "wb_tps53622", "bus": 7, "loc": 0x60},
+    {"name": "wb_tps53622", "bus": 7, "loc": 0x6c},
+    {"name": "wb_isl68127", "bus": 7, "loc": 0x64},
+]
+
+OPTOE = [
+    {"name": "wb_optoe2", "startbus": 32, "endbus": 79},
+    {"name": "wb_optoe1", "startbus": 80, "endbus": 87},
+]
+
+DEV_MONITOR_PARAM = {
+    "polling_time": 10,
+    "psus": [
+        {
+            "name": "psu1",
+            "present": {"gettype": "i2c", "bus": 6, "loc": 0x0d, "offset": 0x51, "presentbit": 0, "okval": 0},
+            "device": [
+                {"id": "psu1pmbus", "name": "wb_dps550", "bus": 24, "loc": 0x58, "attr": "hwmon"},
+                {"id": "psu1frue2", "name": "wb_24c02", "bus": 24, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "psu2",
+            "present": {"gettype": "i2c", "bus": 6, "loc": 0x0d, "offset": 0x51, "presentbit": 4, "okval": 0},
+            "device": [
+                {"id": "psu2pmbus", "name": "wb_dps550", "bus": 25, "loc": 0x58, "attr": "hwmon"},
+                {"id": "psu2frue2", "name": "wb_24c02", "bus": 25, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+    ],
+    "fans": [
+        {
+            "name": "fan1",
+            "present": {"gettype": "i2c", "bus": 2, "loc": 0x0d, "offset": 0x30, "presentbit": 0, "okval": 0},
+            "device": [
+                {"id": "fan1frue2", "name": "24c02", "bus": 16, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan2",
+            "present": {"gettype": "i2c", "bus": 2, "loc": 0x0d, "offset": 0x30, "presentbit": 1, "okval": 0},
+            "device": [
+                {"id": "fan2frue2", "name": "24c02", "bus": 17, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan3",
+            "present": {"gettype": "i2c", "bus": 2, "loc": 0x0d, "offset": 0x30, "presentbit": 2, "okval": 0},
+            "device": [
+                {"id": "fan3frue2", "name": "24c02", "bus": 18, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "fan4",
+            "present": {"gettype": "i2c", "bus": 2, "loc": 0x0d, "offset": 0x30, "presentbit": 3, "okval": 0},
+            "device": [
+                {"id": "fan4frue2", "name": "24c02", "bus": 19, "loc": 0x50, "attr": "eeprom"},
+            ],
+        },
+    ],
+    "others": [
+        {
+            "name": "eeprom",
+            "device": [
+                {"id": "eeprom_1", "name": "wb_24c02", "bus": 0, "loc": 0x56, "attr": "eeprom"},
+            ],
+        },
+        {
+            "name": "lm75",
+            "device": [
+                {"id": "lm75_1", "name": "wb_lm75", "bus": 3, "loc": 0x48, "attr": "hwmon"},
+                {"id": "lm75_2", "name": "wb_lm75", "bus": 3, "loc": 0x49, "attr": "hwmon"},
+                {"id": "lm75_3", "name": "wb_lm75", "bus": 3, "loc": 0x4a, "attr": "hwmon"},
+                {"id": "lm75_4", "name": "wb_lm75", "bus": 3, "loc": 0x4b, "attr": "hwmon"},
+                {"id": "lm75_5", "name": "wb_lm75", "bus": 3, "loc": 0x4c, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "mac_bsc",
+            "device": [
+                {"id": "mac_bsc_1", "name": "wb_mac_bsc_td3", "bus": 3, "loc": 0x44, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "ina3221",
+            "device": [
+                {"id": "ina3221_1", "name": "wb_ina3221", "bus": 7, "loc": 0x40, "attr": "hwmon"},
+                {"id": "ina3221_2", "name": "wb_ina3221", "bus": 7, "loc": 0x41, "attr": "hwmon"},
+                {"id": "ina3221_3", "name": "wb_ina3221", "bus": 7, "loc": 0x42, "attr": "hwmon"},
+                {"id": "ina3221_4", "name": "wb_ina3221", "bus": 7, "loc": 0x43, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "tps53622",
+            "device": [
+                {"id": "tps53622_1", "name": "wb_tps53622", "bus": 7, "loc": 0x60, "attr": "hwmon"},
+                {"id": "tps53622_2", "name": "wb_tps53622", "bus": 7, "loc": 0x6c, "attr": "hwmon"},
+            ],
+        },
+        {
+            "name": "isl68127",
+            "device": [
+                {"id": "isl68127_1", "name": "wb_isl68127", "bus": 7, "loc": 0x64, "attr": "hwmon"},
+            ],
+        }
+    ],
+}
+
+INIT_PARAM_PRE = [
+    {"loc": "7-0064/hwmon/hwmon*/avs0_vout_max", "value": "900000"},
+    {"loc": "7-0064/hwmon/hwmon*/avs0_vout_min", "value": "750000"},
+]
+INIT_COMMAND_PRE = [
+    "i2cset -y -f 6 0x0d 0x91 0x48",
+    "i2cset -y -f 6 0x0d 0x92 0x01",  # MAC_PWR_EN
+    "i2cset -y -f 6 0x0d 0x94 0x01",  # SFF_PWR_EN
+    "i2cset -y -f 6 0x0d 0xbf 0x01",  # enbale tty_console monitor
+]
+
+INIT_PARAM = []
+
+INIT_COMMAND = [
+    "i2cset -y -f 8 0x30 0x60 0x00",  # enable txdis[1~8]
+    "i2cset -y -f 8 0x30 0x61 0x00",  # enable txdis[9~16]
+    "i2cset -y -f 8 0x30 0x62 0x00",  # enable txdis[17~24]
+    "i2cset -y -f 8 0x31 0x60 0x00",  # enable txdis[24~32]
+    "i2cset -y -f 8 0x31 0x61 0x00",  # enable txdis[33~40]
+    "i2cset -y -f 8 0x31 0x62 0x00",  # enable txdis[41~48]
+]
+
+REBOOT_CAUSE_PARA = {
+    "reboot_cause_list": [
+        {
+            "name": "otp_switch_reboot",
+            "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_switch_reboot_flag", "okval": True},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Thermal Overload: ASIC, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Thermal Overload: ASIC, ",
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+            ],
+            "finish_operation": [
+                {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_switch_reboot_flag"},
+            ]
+        },
+        {
+            "name": "otp_other_reboot",
+            "monitor_point": {"gettype": "file_exist", "judge_file": "/etc/.otp_other_reboot_flag", "okval": True},
+            "record": [
+                {"record_type": "file", "mode": "cover", "log": "Thermal Overload: Other, ",
+                    "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+                {"record_type": "file", "mode": "add", "log": "Thermal Overload: Other, ",
+                    "path": "/etc/sonic/.reboot/.history-reboot-cause.txt", "file_max_size": 1 * 1024 * 1024}
+            ],
+            "finish_operation": [
+                {"gettype": "cmd", "cmd": "rm -rf /etc/.otp_other_reboot_flag"},
+            ]
+        },
+    ],
+    "other_reboot_cause_record": [
+        {"record_type": "file", "mode": "cover", "log": "Other, ", "path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"},
+        {"record_type": "file", "mode": "add", "log": "Other, ", "path": "/etc/sonic/.reboot/.history-reboot-cause.txt"}
+    ],
+}
+
+UPGRADE_SUMMARY = {
+    "devtype": 0x404a,
+
+    "slot0": {
+        "subtype": 0,
+        "VME": {
+            "chain1": {
+                "name": "VME_CPLD",
+                "is_support_warm_upg": 0,
+            },
+        },
+
+        "SPI-LOGIC-DEV": {
+            "chain3": {
+                "name": "FPGA",
+                "is_support_warm_upg": 0,
+            },
+        },
+
+        "MTD": {
+            "chain2": {
+                "name": "BIOS",
+                "is_support_warm_upg": 0,
+                "filesizecheck": 10240,  # bios check file size, Unit: K
+                "init_cmd": [
+                    {"io_addr": 0x722, "value": 0x02, "gettype": "io"},
+                    {"cmd": "modprobe mtd", "gettype": "cmd"},
+                    {"cmd": "modprobe spi_nor", "gettype": "cmd"},
+                    {"cmd": "modprobe ofpart", "gettype": "cmd"},
+                    {"cmd": "modprobe intel_spi writeable=1", "gettype": "cmd"},
+                    {"cmd": "modprobe intel_spi_platform writeable=1", "gettype": "cmd"},
+                ],
+                "finish_cmd": [
+                    {"cmd": "rmmod intel_spi_platform", "gettype": "cmd"},
+                    {"cmd": "rmmod intel_spi", "gettype": "cmd"},
+                    {"cmd": "rmmod ofpart", "gettype": "cmd"},
+                    {"cmd": "rmmod spi_nor", "gettype": "cmd"},
+                    {"cmd": "rmmod mtd", "gettype": "cmd"},
+                ],
+            },
+        },
+
+        "TEST": {
+            "cpld": [
+                {"chain": 1, "file": "/etc/.upgrade_test/cpld_test_header.vme", "display_name": "CPLD"},
+            ],
+            "fpga": [
+                {
+                    "chain": 3,
+                    "file": "/etc/.upgrade_test/fpga_test_header.bin",
+                    "display_name": "FPGA",
+                },
+            ],
+        },
+    },
+
+    "BMC": {
+        "name": "BMC",
+        "init_cmd": [
+        ],
+        "finish_cmd": [],
+    },
+}
+
+
+PLATFORM_E2_CONF = {
+    "fan": [
+        {
+            "name": "fan1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/16-0050/eeprom",
+            "e2_decode": [
+                {
+                    "area": "productInfoArea", "field": "productVersion", "decode_type": "func", "func_name": "fru_decode_hw"
+                },
+                {
+                    "area": "boardInfoArea", "field": "boardextra1", "decode_type": "func", "func_name": "fru_decode_hw"
+                },
+            ],
+        },
+        {
+            "name": "fan2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/17-0050/eeprom",
+            "e2_decode": [
+                {
+                    "area": "productInfoArea", "field": "productVersion", "decode_type": "func", "func_name": "fru_decode_hw"
+                },
+                {
+                    "area": "boardInfoArea", "field": "boardextra1", "decode_type": "func", "func_name": "fru_decode_hw"
+                },
+            ],
+        },
+        {
+            "name": "fan3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/18-0050/eeprom",
+            "e2_decode": [
+                {
+                    "area": "productInfoArea", "field": "productVersion", "decode_type": "func", "func_name": "fru_decode_hw"
+                },
+                {
+                    "area": "boardInfoArea", "field": "boardextra1", "decode_type": "func", "func_name": "fru_decode_hw"
+                },
+            ],
+        },
+        {
+            "name": "fan4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/19-0050/eeprom",
+            "e2_decode": [
+                {
+                    "area": "productInfoArea", "field": "productVersion", "decode_type": "func", "func_name": "fru_decode_hw"
+                },
+                {
+                    "area": "boardInfoArea", "field": "boardextra1", "decode_type": "func", "func_name": "fru_decode_hw"
+                },
+            ],
+        },
+    ],
+    "psu": [
+        {"name": "psu1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/24-0050/eeprom"},
+        {"name": "psu2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/25-0050/eeprom"},
+    ],
+    "syseeprom": [
+        {"name": "syseeprom", "e2_type": "onie_tlv", "e2_path": "/sys/bus/i2c/devices/0-0056/eeprom"},
+    ],
+}
+
+AIR_FLOW_CONF = {
+    "psu_fan_airflow": {
+        "intake": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3'],
+        "exhaust": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC']
+    },
+
+    "fanairflow": {
+        "intake": ['M1HFAN III-F'],
+        "exhaust": ['M1HFAN III-R']
+    },
+
+    "fans": [
+        {
+            "name": "FAN1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/16-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+        {
+            "name": "FAN2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/17-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+        {
+            "name": "FAN3", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/18-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        },
+        {
+            "name": "FAN4", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/19-0050/eeprom",
+            "area": "productInfoArea", "field": "productName", "decode": "fanairflow"
+        }
+    ],
+
+    "psus": [
+        {
+            "name": "PSU1", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/24-0050/eeprom",
+            "area": "productInfoArea", "field": "productPartModelName", "decode": "psu_fan_airflow"
+        },
+        {
+            "name": "PSU2", "e2_type": "fru", "e2_path": "/sys/bus/i2c/devices/25-0050/eeprom",
+            "area": "productInfoArea", "field": "productPartModelName", "decode": "psu_fan_airflow"
+        }
+    ]
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_port_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_port_config.py
new file mode 100755
index 000000000000..26f92a77a020
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_port_config.py
@@ -0,0 +1,7 @@
+#!/usr/bin/python3
+# -*- coding: UTF-8 -*-
+
+PLATFORM_INTF_OPTOE = {
+    "port_num": 56,
+    "optoe_start_bus": 32,
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_device.py
new file mode 100755
index 000000000000..3142b08e3091
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_device.py
@@ -0,0 +1,1233 @@
+#!/usr/bin/python3
+
+psu_fan_airflow = {
+    "intake": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3'],
+    "exhaust": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC']
+}
+
+fanairflow = {
+    "intake": ['M1HFAN III-F'],
+    "exhaust": ['M1HFAN III-R'],
+}
+
+psu_display_name = {
+    "PA550II-F": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3'],
+    "PA550II-R": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC']
+}
+
+psutypedecode = {
+    0x00: 'N/A',
+    0x01: 'AC',
+    0x02: 'DC',
+}
+
+
+class Unit:
+    Temperature = "C"
+    Voltage = "V"
+    Current = "A"
+    Power = "W"
+    Speed = "RPM"
+
+
+PSU_NOT_PRESENT_PWM = 100
+
+
+class threshold:
+    PSU_TEMP_MIN = -20 * 1000
+    PSU_TEMP_MAX = 60 * 1000
+
+    PSU_FAN_SPEED_MIN = 2000
+    PSU_FAN_SPEED_MAX = 18000
+
+    PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000
+    PSU_OUTPUT_VOLTAGE_MAX = 14 * 1000
+
+    PSU_AC_INPUT_VOLTAGE_MIN = 200 * 1000
+    PSU_AC_INPUT_VOLTAGE_MAX = 240 * 1000
+
+    PSU_DC_INPUT_VOLTAGE_MIN = 190 * 1000
+    PSU_DC_INPUT_VOLTAGE_MAX = 290 * 1000
+
+    ERR_VALUE = -9999999
+
+    PSU_OUTPUT_POWER_MIN = 10 * 1000 * 1000
+    PSU_OUTPUT_POWER_MAX = 560 * 1000 * 1000
+
+    PSU_INPUT_POWER_MIN = 10 * 1000 * 1000
+    PSU_INPUT_POWER_MAX = 625 * 1000 * 1000
+
+    PSU_OUTPUT_CURRENT_MIN = 1 * 1000
+    PSU_OUTPUT_CURRENT_MAX = 45 * 1000
+
+    PSU_INPUT_CURRENT_MIN = 0 * 1000
+    PSU_INPUT_CURRENT_MAX = 7 * 1000
+
+    FRONT_FAN_SPEED_MAX = 24000
+    REAR_FAN_SPEED_MAX = 22500
+    FAN_SPEED_MIN = 5000
+
+
+class Description:
+    CPLD = "Used for managing IO modules, SFP+ modules and system LEDs"
+    BIOS = "Performs initialization of hardware components during booting"
+    FPGA = "Platform management controller for on-board temperature monitoring, in-chassis power"
+
+
+devices = {
+    "onie_e2": [
+        {
+            "name": "ONIE_E2",
+            "e2loc": {"loc": "/sys/bus/i2c/devices/0-0056/eeprom", "way": "sysfs"},
+            "airflow": "intake"
+        },
+    ],
+    "psus": [
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/24-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 24, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU1",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 24, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        },
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/25-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 25, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU2",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 25, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        }
+    ],
+    "temps": [
+        {
+            "name": "SWITCH_TEMP",
+            "temp_id": "TEMP1",
+            "api_name": "ASIC_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp99_input", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 105000,
+                "Max": 110000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "CPU_TEMP",
+            "temp_id": "TEMP2",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -15000,
+                "Low": 0,
+                "High": 100000,
+                "Max": 102000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "INLET_TEMP",
+            "temp_id": "TEMP3",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "fix_value": {
+                "fix_type": "config",
+                "addend": -3,
+            }
+        },
+        {
+            "name": "OUTLET_TEMP",
+            "temp_id": "TEMP4",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-004c/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 75000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "BOARD_TEMP",
+            "temp_id": "TEMP5",
+            "api_name": "MAC_OUT_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-004a/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 75000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "MAC_IN_TEMP",
+            "temp_id": "TEMP6",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 75000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU1_TEMP",
+            "temp_id": "TEMP7",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -20000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU2_TEMP",
+            "temp_id": "TEMP8",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -20000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "SFF_TEMP",
+            "Temperature": {
+                "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 90000,
+                "Max": 100000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "invalid": -10000,
+            "error": -9999,
+        }
+    ],
+    "leds": [
+        {
+            "name": "FRONT_SYS_LED",
+            "led_type": "SYS_LED",
+            "led": {"bus": 6, "addr": 0x0d, "offset": 0x72, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+        },
+        {
+            "name": "FRONT_PSU_LED",
+            "led_type": "PSU_LED",
+            "led": {"bus": 6, "addr": 0x0d, "offset": 0x73, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x10, "red_flash": 0x11, "red": 0x12,
+                "green_flash": 0x13, "green": 0x14, "amber_flash": 0x15,
+                "amber": 0x16, "mask": 0x17
+            },
+        },
+        {
+            "name": "FRONT_FAN_LED",
+            "led_type": "FAN_LED",
+            "led": {"bus": 6, "addr": 0x0d, "offset": 0x74, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x10, "red_flash": 0x11, "red": 0x12,
+                "green_flash": 0x13, "green": 0x14, "amber_flash": 0x15,
+                "amber": 0x16, "mask": 0x17
+            },
+        },
+    ],
+    "fans": [
+        {
+            "name": "FAN1",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-16/16-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3b, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0b, "red_flash": 0x0e, "red": 0x0a,
+                "green_flash": 0x0d, "green": 0x09, "amber_flash": 0x07,
+                "amber": 0x03, "mask": 0x0f
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x14, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x14, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN2",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-17/17-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3c, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0b, "red_flash": 0x0e, "red": 0x0a,
+                "green_flash": 0x0d, "green": 0x09, "amber_flash": 0x07,
+                "amber": 0x03, "mask": 0x0f
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x15, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x15, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN3",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-18/18-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3d, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0b, "red_flash": 0x0e, "red": 0x0a,
+                "green_flash": 0x0d, "green": 0x09, "amber_flash": 0x07,
+                "amber": 0x03, "mask": 0x0f
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x16, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x16, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+
+        {
+            "name": "FAN4",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-19/19-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3e, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0b, "red_flash": 0x0e, "red": 0x0a,
+                "green_flash": 0x0d, "green": 0x09, "amber_flash": 0x07,
+                "amber": 0x03, "mask": 0x0f
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x17, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x17, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+
+    ],
+    "cplds": [
+        {
+            "name": "CPU_CPLD",
+            "cpld_id": "CPLD1",
+            "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for system power",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "CONNECT_CPLD",
+            "cpld_id": "CPLD2",
+            "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "CONNECT_CPLD-FAN",
+            "cpld_id": "CPLD3",
+            "VersionFile": {"loc": "/dev/cpld2", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for fan modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "MAC_CPLD1",
+            "cpld_id": "CPLD4",
+            "VersionFile": {"loc": "/dev/cpld3", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "MAC_CPLD2",
+            "cpld_id": "CPLD5",
+            "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "FPGA",
+            "cpld_id": "CPLD6",
+            "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "format": "little_endian",
+            "warm": 0,
+        },
+        {
+            "name": "BIOS",
+            "cpld_id": "CPLD7",
+            "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"},
+            "desc": "Performs initialization of hardware components during booting",
+            "slot": 0,
+            "type": "str",
+            "warm": 0,
+        },
+    ],
+    "dcdc": [
+        {
+            "name": "Switch_ZSFP1_3v3_C",
+            "dcdc_id": "DCDC1",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 22000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_QSFP1_3v3_C",
+            "dcdc_id": "DCDC2",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 22000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_5v0_C",
+            "dcdc_id": "DCDC3",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 1000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_ZSFP1_3v3_V",
+            "dcdc_id": "DCDC4",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_QSFP1_3v3_V",
+            "dcdc_id": "DCDC5",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_5v0_V",
+            "dcdc_id": "DCDC6",
+            "Min": 4000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 6000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_1v2_C",
+            "dcdc_id": "DCDC7",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_3v3_C",
+            "dcdc_id": "DCDC8",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 1000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_Cpld_3v3_C",
+            "dcdc_id": "DCDC9",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_1v2_V",
+            "dcdc_id": "DCDC10",
+            "Min": 960,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1440,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_3v3_V",
+            "dcdc_id": "DCDC11",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_Cpld_3v3_V",
+            "dcdc_id": "DCDC12",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_1v2_C",
+            "dcdc_id": "DCDC13",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 1300,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_3v3_C",
+            "dcdc_id": "DCDC14",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2800,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_SSD_3v3_C",
+            "dcdc_id": "DCDC15",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 4500,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_1v2_V",
+            "dcdc_id": "DCDC16",
+            "Min": 960,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1440,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_3v3_V",
+            "dcdc_id": "DCDC17",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_SSD_3v3_V",
+            "dcdc_id": "DCDC18",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_3v3_C",
+            "dcdc_id": "DCDC19",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 4686,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_5v_C",
+            "dcdc_id": "DCDC20",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v7_C",
+            "dcdc_id": "DCDC21",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_3v3_V",
+            "dcdc_id": "DCDC22",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_5v_V",
+            "dcdc_id": "DCDC23",
+            "Min": 4000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 6000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v7_V",
+            "dcdc_id": "DCDC24",
+            "Min": 1360,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 2040,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_CORE_C",
+            "dcdc_id": "DCDC25",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 47300,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v05_C",
+            "dcdc_id": "DCDC26",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 15400,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_CORE_V",
+            "dcdc_id": "DCDC27",
+            "Min": 1456,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 2184,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v05_V",
+            "dcdc_id": "DCDC28",
+            "Min": 840,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1260,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_CORE_C",
+            "dcdc_id": "DCDC29",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 220000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_ANALOG_C",
+            "dcdc_id": "DCDC30",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 18000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_CORE_V",
+            "dcdc_id": "DCDC31",
+            "Min": 600,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_ANALOG_V",
+            "dcdc_id": "DCDC32",
+            "Min": 640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v2_C",
+            "dcdc_id": "DCDC33",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 9900,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_2v23_C",
+            "dcdc_id": "DCDC34",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v2_V",
+            "dcdc_id": "DCDC35",
+            "Min": 960,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1440,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_2v23_V",
+            "dcdc_id": "DCDC36",
+            "Min": 1784,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 2676,
+            "format": "float(float(%s)/1000)",
+        },
+    ],
+    "cpu": [
+        {
+            "name": "cpu",
+            "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"
+        }
+    ],
+    "sfps": {
+        "ver": '1.0',
+        "port_index_start": 1,
+        "port_num": 56,
+        "log_level": 2,
+        "eeprom_retry_times": 5,
+        "eeprom_retry_break_sec": 0.2,
+        "presence_cpld": {
+            "dev_id": {
+                3: {
+                    "offset": {
+                        0x30: "1-8",
+                        0x31: "9-16",
+                        0x32: "17-24",
+                    },
+                },
+                4: {
+                    "offset": {
+                        0x30: "25-32",
+                        0x31: "33-40",
+                        0x32: "41-48",
+                        0x33: "49-56",
+                    },
+                },
+            },
+        },
+        "presence_val_is_present": 0,
+        "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom",
+        "eeprom_path_key": list(range(32, 88)),
+        "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class",
+        "optoe_driver_key": list(range(32, 88)),
+        "txdis_cpld": {
+            "dev_id": {
+                3: {
+                    "offset": {
+                        0x60: "1-8",
+                        0x61: "9-16",
+                        0x62: "17-24",
+                    },
+                },
+                4: {
+                    "offset": {
+                        0x60: "25-32",
+                        0x61: "33-40",
+                        0x62: "41-48",
+                    },
+                },
+            },
+        },
+        "txdisable_val_is_on": 0,
+        "reset_cpld": {
+            "dev_id": {
+                4: {
+                    "offset": {
+                        0xb9: "49-56",
+                    },
+                },
+            },
+        },
+        "reset_val_is_reset": 0,
+    }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_exhaust_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_exhaust_device.py
new file mode 100755
index 000000000000..3fadc9cc4608
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_exhaust_device.py
@@ -0,0 +1,1233 @@
+#!/usr/bin/python3
+
+psu_fan_airflow = {
+    "intake": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3'],
+    "exhaust": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC']
+}
+
+fanairflow = {
+    "intake": ['M1HFAN III-F'],
+    "exhaust": ['M1HFAN III-R'],
+}
+
+psu_display_name = {
+    "PA550II-F": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3'],
+    "PA550II-R": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC']
+}
+
+psutypedecode = {
+    0x00: 'N/A',
+    0x01: 'AC',
+    0x02: 'DC',
+}
+
+
+class Unit:
+    Temperature = "C"
+    Voltage = "V"
+    Current = "A"
+    Power = "W"
+    Speed = "RPM"
+
+
+PSU_NOT_PRESENT_PWM = 100
+
+
+class threshold:
+    PSU_TEMP_MIN = -20 * 1000
+    PSU_TEMP_MAX = 60 * 1000
+
+    PSU_FAN_SPEED_MIN = 2000
+    PSU_FAN_SPEED_MAX = 18000
+
+    PSU_OUTPUT_VOLTAGE_MIN = 11 * 1000
+    PSU_OUTPUT_VOLTAGE_MAX = 14 * 1000
+
+    PSU_AC_INPUT_VOLTAGE_MIN = 200 * 1000
+    PSU_AC_INPUT_VOLTAGE_MAX = 240 * 1000
+
+    PSU_DC_INPUT_VOLTAGE_MIN = 190 * 1000
+    PSU_DC_INPUT_VOLTAGE_MAX = 290 * 1000
+
+    ERR_VALUE = -9999999
+
+    PSU_OUTPUT_POWER_MIN = 10 * 1000 * 1000
+    PSU_OUTPUT_POWER_MAX = 560 * 1000 * 1000
+
+    PSU_INPUT_POWER_MIN = 10 * 1000 * 1000
+    PSU_INPUT_POWER_MAX = 625 * 1000 * 1000
+
+    PSU_OUTPUT_CURRENT_MIN = 1 * 1000
+    PSU_OUTPUT_CURRENT_MAX = 45 * 1000
+
+    PSU_INPUT_CURRENT_MIN = 0 * 1000
+    PSU_INPUT_CURRENT_MAX = 7 * 1000
+
+    FRONT_FAN_SPEED_MAX = 24000
+    REAR_FAN_SPEED_MAX = 22500
+    FAN_SPEED_MIN = 5000
+
+
+class Description:
+    CPLD = "Used for managing IO modules, SFP+ modules and system LEDs"
+    BIOS = "Performs initialization of hardware components during booting"
+    FPGA = "Platform management controller for on-board temperature monitoring, in-chassis power"
+
+
+devices = {
+    "onie_e2": [
+        {
+            "name": "ONIE_E2",
+            "e2loc": {"loc": "/sys/bus/i2c/devices/0-0056/eeprom", "way": "sysfs"},
+            "airflow": "exhaust"
+        },
+    ],
+    "psus": [
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/24-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 24, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU1",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 24, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        },
+        {
+            "e2loc": {"loc": "/sys/bus/i2c/devices/25-0050/eeprom", "way": "sysfs"},
+            "pmbusloc": {"bus": 25, "addr": 0x58, "way": "i2c"},
+            "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "name": "PSU2",
+            "psu_display_name": psu_display_name,
+            "airflow": psu_fan_airflow,
+            "TempStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": threshold.PSU_TEMP_MIN,
+                "Max": threshold.PSU_TEMP_MAX,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "FanStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
+            "FanSpeed": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
+                "Min": threshold.PSU_FAN_SPEED_MIN,
+                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Unit": Unit.Speed
+            },
+            "psu_fan_tolerance": 40,
+            "InputsStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x2000},
+            "InputsType": {"bus": 25, "addr": 0x58, "offset": 0x80, "way": "i2c", 'psutypedecode': psutypedecode},
+            "InputsVoltage": {
+                'AC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_AC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_AC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+
+                },
+                'DC': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                },
+                'other': {
+                    "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
+                    "Min": threshold.ERR_VALUE,
+                    "Max": threshold.ERR_VALUE,
+                    "Unit": Unit.Voltage,
+                    "format": "float(float(%s)/1000)"
+                }
+            },
+            "InputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_CURRENT_MIN,
+                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "InputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
+                "Min": threshold.PSU_INPUT_POWER_MIN,
+                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+            "OutputsStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
+            "OutputsVoltage": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Unit": Unit.Voltage,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsCurrent": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
+                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Unit": Unit.Current,
+                "format": "float(float(%s)/1000)"
+            },
+            "OutputsPower": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
+                "Min": threshold.PSU_OUTPUT_POWER_MIN,
+                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Unit": Unit.Power,
+                "format": "float(float(%s)/1000000)"
+            },
+        }
+    ],
+    "temps": [
+        {
+            "name": "SWITCH_TEMP",
+            "temp_id": "TEMP1",
+            "api_name": "ASIC_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-0044/hwmon/hwmon*/temp99_input", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 105000,
+                "Max": 110000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "CPU_TEMP",
+            "temp_id": "TEMP2",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/platform/devices/coretemp.0/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -15000,
+                "Low": 0,
+                "High": 100000,
+                "Max": 102000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "INLET_TEMP",
+            "temp_id": "TEMP3",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-004c/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "fix_value": {
+                "fix_type": "config",
+                "addend": -3,
+            }
+        },
+        {
+            "name": "OUTLET_TEMP",
+            "temp_id": "TEMP4",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-0048/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 75000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "BOARD_TEMP",
+            "temp_id": "TEMP5",
+            "api_name": "MAC_OUT_TEMP",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-0049/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 75000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "MAC_IN_TEMP",
+            "temp_id": "TEMP6",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/3-004a/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 75000,
+                "Max": 80000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU1_TEMP",
+            "temp_id": "TEMP7",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -20000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "PSU2_TEMP",
+            "temp_id": "TEMP8",
+            "Temperature": {
+                "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
+                "Min": -20000,
+                "Low": 0,
+                "High": 55000,
+                "Max": 60000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            }
+        },
+        {
+            "name": "SFF_TEMP",
+            "Temperature": {
+                "value": {"loc": "/tmp/highest_sff_temp", "way": "sysfs", "flock_path": "/tmp/highest_sff_temp"},
+                "Min": -30000,
+                "Low": 0,
+                "High": 90000,
+                "Max": 100000,
+                "Unit": Unit.Temperature,
+                "format": "float(float(%s)/1000)"
+            },
+            "invalid": -10000,
+            "error": -9999,
+        }
+    ],
+    "leds": [
+        {
+            "name": "FRONT_SYS_LED",
+            "led_type": "SYS_LED",
+            "led": {"bus": 6, "addr": 0x0d, "offset": 0x72, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x00, "red_flash": 0x01, "red": 0x02,
+                "green_flash": 0x03, "green": 0x04, "amber_flash": 0x05,
+                "amber": 0x06, "mask": 0x07
+            },
+        },
+        {
+            "name": "FRONT_PSU_LED",
+            "led_type": "PSU_LED",
+            "led": {"bus": 6, "addr": 0x0d, "offset": 0x73, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x10, "red_flash": 0x11, "red": 0x12,
+                "green_flash": 0x13, "green": 0x14, "amber_flash": 0x15,
+                "amber": 0x16, "mask": 0x17
+            },
+        },
+        {
+            "name": "FRONT_FAN_LED",
+            "led_type": "FAN_LED",
+            "led": {"bus": 6, "addr": 0x0d, "offset": 0x74, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x10, "red_flash": 0x11, "red": 0x12,
+                "green_flash": 0x13, "green": 0x14, "amber_flash": 0x15,
+                "amber": 0x16, "mask": 0x17
+            },
+        },
+    ],
+    "fans": [
+        {
+            "name": "FAN1",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-16/16-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3b, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0b, "red_flash": 0x0e, "red": 0x0a,
+                "green_flash": 0x0d, "green": 0x09, "amber_flash": 0x07,
+                "amber": 0x03, "mask": 0x0f
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x14, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x14, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan1/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan1/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN2",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-17/17-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3c, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0b, "red_flash": 0x0e, "red": 0x0a,
+                "green_flash": 0x0d, "green": 0x09, "amber_flash": 0x07,
+                "amber": 0x03, "mask": 0x0f
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x15, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x15, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan2/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan2/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+        {
+            "name": "FAN3",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-18/18-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan3/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3d, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0b, "red_flash": 0x0e, "red": 0x0a,
+                "green_flash": 0x0d, "green": 0x09, "amber_flash": 0x07,
+                "amber": 0x03, "mask": 0x0f
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x16, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x16, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan3/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan3/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+
+        {
+            "name": "FAN4",
+            "airflow": fanairflow,
+            "e2loc": {'loc': '/sys/bus/i2c/devices/i2c-19/19-0050/eeprom', 'way': 'sysfs'},
+            "present": {"loc": "/sys/wb_plat/fan/fan4/present", "way": "sysfs", "mask": 0x01, "okval": 1},
+            "SpeedMin": threshold.FAN_SPEED_MIN,
+            "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+            "led": {"bus": 2, "addr": 0x0d, "offset": 0x3e, "way": "i2c"},
+            "led_attrs": {
+                "off": 0x0b, "red_flash": 0x0e, "red": 0x0a,
+                "green_flash": 0x0d, "green": 0x09, "amber_flash": 0x07,
+                "amber": 0x03, "mask": 0x0f
+            },
+            "PowerMax": 38.4,
+            "Rotor": {
+                "Rotor1_config": {
+                    "name": "Rotor1",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x17, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor1/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.FRONT_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor1/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.FRONT_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+                "Rotor2_config": {
+                    "name": "Rotor2",
+                    "Set_speed": {"bus": 2, "addr": 0x0d, "offset": 0x17, "way": "i2c"},
+                    "Running": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "is_runing": 1},
+                    "HwAlarm": {"loc": "/sys/wb_plat/fan/fan4/motor0/status", "way": "sysfs", "mask": 0x01, "no_alarm": 1},
+                    "SpeedMin": threshold.FAN_SPEED_MIN,
+                    "SpeedMax": threshold.REAR_FAN_SPEED_MAX,
+                    "Speed": {
+                        "value": {"loc": "/sys/wb_plat/fan/fan4/motor0/speed", "way": "sysfs"},
+                        "Min": threshold.FAN_SPEED_MIN,
+                        "Max": threshold.REAR_FAN_SPEED_MAX,
+                        "Unit": Unit.Speed,
+                    },
+                },
+            },
+        },
+
+    ],
+    "cplds": [
+        {
+            "name": "CPU_CPLD",
+            "cpld_id": "CPLD1",
+            "VersionFile": {"loc": "/dev/cpld0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for system power",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "CONNECT_CPLD",
+            "cpld_id": "CPLD2",
+            "VersionFile": {"loc": "/dev/cpld1", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "CONNECT_CPLD-FAN",
+            "cpld_id": "CPLD3",
+            "VersionFile": {"loc": "/dev/cpld2", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for fan modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "MAC_CPLD1",
+            "cpld_id": "CPLD4",
+            "VersionFile": {"loc": "/dev/cpld3", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "MAC_CPLD2",
+            "cpld_id": "CPLD5",
+            "VersionFile": {"loc": "/dev/cpld4", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for sff modules",
+            "slot": 0,
+            "warm": 0,
+        },
+        {
+            "name": "FPGA",
+            "cpld_id": "CPLD6",
+            "VersionFile": {"loc": "/dev/fpga0", "offset": 0, "len": 4, "way": "devfile_ascii"},
+            "desc": "Used for base functions",
+            "slot": 0,
+            "format": "little_endian",
+            "warm": 0,
+        },
+        {
+            "name": "BIOS",
+            "cpld_id": "CPLD7",
+            "VersionFile": {"cmd": "dmidecode -s bios-version", "way": "cmd"},
+            "desc": "Performs initialization of hardware components during booting",
+            "slot": 0,
+            "type": "str",
+            "warm": 0,
+        },
+    ],
+    "dcdc": [
+        {
+            "name": "Switch_ZSFP1_3v3_C",
+            "dcdc_id": "DCDC1",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 22000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_QSFP1_3v3_C",
+            "dcdc_id": "DCDC2",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 22000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_5v0_C",
+            "dcdc_id": "DCDC3",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 1000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_ZSFP1_3v3_V",
+            "dcdc_id": "DCDC4",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_QSFP1_3v3_V",
+            "dcdc_id": "DCDC5",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_5v0_V",
+            "dcdc_id": "DCDC6",
+            "Min": 4000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0040/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 6000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_1v2_C",
+            "dcdc_id": "DCDC7",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_3v3_C",
+            "dcdc_id": "DCDC8",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 1000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_Cpld_3v3_C",
+            "dcdc_id": "DCDC9",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_1v2_V",
+            "dcdc_id": "DCDC10",
+            "Min": 960,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1440,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_3v3_V",
+            "dcdc_id": "DCDC11",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_Cpld_3v3_V",
+            "dcdc_id": "DCDC12",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0041/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_1v2_C",
+            "dcdc_id": "DCDC13",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 1300,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_3v3_C",
+            "dcdc_id": "DCDC14",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2800,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_SSD_3v3_C",
+            "dcdc_id": "DCDC15",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 4500,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_1v2_V",
+            "dcdc_id": "DCDC16",
+            "Min": 960,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1440,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_3v3_V",
+            "dcdc_id": "DCDC17",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Con_SSD_3v3_V",
+            "dcdc_id": "DCDC18",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0042/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_3v3_C",
+            "dcdc_id": "DCDC19",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 4686,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_5v_C",
+            "dcdc_id": "DCDC20",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v7_C",
+            "dcdc_id": "DCDC21",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_3v3_V",
+            "dcdc_id": "DCDC22",
+            "Min": 2640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 3960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_5v_V",
+            "dcdc_id": "DCDC23",
+            "Min": 4000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 6000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v7_V",
+            "dcdc_id": "DCDC24",
+            "Min": 1360,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0043/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 2040,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_CORE_C",
+            "dcdc_id": "DCDC25",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 47300,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v05_C",
+            "dcdc_id": "DCDC26",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 15400,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_CORE_V",
+            "dcdc_id": "DCDC27",
+            "Min": 1456,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 2184,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v05_V",
+            "dcdc_id": "DCDC28",
+            "Min": 840,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0060/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1260,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_CORE_C",
+            "dcdc_id": "DCDC29",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 220000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_ANALOG_C",
+            "dcdc_id": "DCDC30",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/curr3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 18000,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_CORE_V",
+            "dcdc_id": "DCDC31",
+            "Min": 600,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Switch_ANALOG_V",
+            "dcdc_id": "DCDC32",
+            "Min": 640,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-0064/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 960,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v2_C",
+            "dcdc_id": "DCDC33",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr1_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 9900,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_2v23_C",
+            "dcdc_id": "DCDC34",
+            "Min": -1000,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/curr2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "A",
+            "Max": 2200,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_1v2_V",
+            "dcdc_id": "DCDC35",
+            "Min": 960,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in2_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 1440,
+            "format": "float(float(%s)/1000)",
+        },
+
+        {
+            "name": "Cpu_2v23_V",
+            "dcdc_id": "DCDC36",
+            "Min": 1784,
+            "value": {
+                "loc": "/sys/bus/i2c/devices/7-006c/hwmon/hwmon*/in3_input",
+                "way": "sysfs",
+            },
+            "read_times": 5,
+            "Unit": "V",
+            "Max": 2676,
+            "format": "float(float(%s)/1000)",
+        },
+    ],
+    "cpu": [
+        {
+            "name": "cpu",
+            "reboot_cause_path": "/etc/sonic/.reboot/.previous-reboot-cause.txt"
+        }
+    ],
+    "sfps": {
+        "ver": '1.0',
+        "port_index_start": 1,
+        "port_num": 56,
+        "log_level": 2,
+        "eeprom_retry_times": 5,
+        "eeprom_retry_break_sec": 0.2,
+        "presence_cpld": {
+            "dev_id": {
+                3: {
+                    "offset": {
+                        0x30: "1-8",
+                        0x31: "9-16",
+                        0x32: "17-24",
+                    },
+                },
+                4: {
+                    "offset": {
+                        0x30: "25-32",
+                        0x31: "33-40",
+                        0x32: "41-48",
+                        0x33: "49-56",
+                    },
+                },
+            },
+        },
+        "presence_val_is_present": 0,
+        "eeprom_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/eeprom",
+        "eeprom_path_key": list(range(32, 88)),
+        "optoe_driver_path": "/sys/bus/i2c/devices/i2c-%d/%d-0050/dev_class",
+        "optoe_driver_key": list(range(32, 88)),
+        "txdis_cpld": {
+            "dev_id": {
+                3: {
+                    "offset": {
+                        0x60: "1-8",
+                        0x61: "9-16",
+                        0x62: "17-24",
+                    },
+                },
+                4: {
+                    "offset": {
+                        0x60: "25-32",
+                        0x61: "33-40",
+                        0x62: "41-48",
+                    },
+                },
+            },
+        },
+        "txdisable_val_is_on": 0,
+        "reset_cpld": {
+            "dev_id": {
+                4: {
+                    "offset": {
+                        0xb9: "49-56",
+                    },
+                },
+            },
+        },
+        "reset_val_is_reset": 0,
+    }
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_monitor.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_monitor.py
new file mode 100755
index 000000000000..aab279a21da2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_monitor.py
@@ -0,0 +1,206 @@
+# coding:utf-8
+
+
+monitor = {
+    "openloop": {
+        "linear": {
+            "name": "linear",
+            "flag": 0,
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "K": 11,
+            "tin_min": 38,
+        },
+        "curve": {
+            "name": "curve",
+            "flag": 0,
+            "pwm_min": 0x5a,
+            "pwm_max": 0xff,
+            "a": 0.086,
+            "b": 0.318,
+            "c": 28,
+            "tin_min": 25,
+        },
+    },
+
+    "pid": {
+        "CPU_TEMP": {
+            "name": "CPU_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 3,
+            "Ki": 0.5,
+            "Kd": 0.5,
+            "target": 89,
+            "value": [None, None, None],
+        },
+        "SWITCH_TEMP": {
+            "name": "SWITCH_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 3,
+            "Ki": 0.4,
+            "Kd": 0.4,
+            "target": 82,
+            "value": [None, None, None],
+        },
+        "OUTLET_TEMP": {
+            "name": "OUTLET_TEMP",
+            "flag": 0,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 65,
+            "value": [None, None, None],
+        },
+        "BOARD_TEMP": {
+            "name": "BOARD_TEMP",
+            "flag": 0,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 2,
+            "Ki": 0.4,
+            "Kd": 0.3,
+            "target": 65,
+            "value": [None, None, None],
+        },
+        "SFF_TEMP": {
+            "name": "SFF_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "pwm_min": 0x80,
+            "pwm_max": 0xff,
+            "Kp": 0.1,
+            "Ki": 0.4,
+            "Kd": 0,
+            "target": 60,
+            "value": [None, None, None],
+        },
+    },
+
+    "hyst": {
+        "INLET_TEMP": {
+            "name": "INLET_TEMP",
+            "flag": 1,
+            "type": "duty",
+            "hyst_min": 50,        # duty
+            "hyst_max": 100,       # duty
+            "last_hyst_value": 50,  # duty
+            "temp_min": 23,
+            "temp_max": 40,
+            "value": [None, None],
+            "rising": {
+                23: 50,
+                24: 50,
+                25: 50,
+                26: 53,
+                27: 56,
+                28: 59,
+                29: 62,
+                30: 65,
+                31: 68,
+                32: 71,
+                33: 74,
+                34: 77,
+                35: 80,
+                36: 84,
+                37: 88,
+                38: 92,
+                39: 96,
+                40: 100,
+            },
+            "descending": {
+                23: 50,
+                24: 53,
+                25: 56,
+                26: 59,
+                27: 62,
+                28: 65,
+                29: 68,
+                30: 71,
+                31: 74,
+                32: 77,
+                33: 80,
+                34: 84,
+                35: 88,
+                36: 92,
+                37: 96,
+                38: 100,
+                39: 100,
+                40: 100,
+            },
+        }
+    },
+
+    "temps_threshold": {
+        "SWITCH_TEMP": {"name": "SWITCH_TEMP", "warning": 100, "critical": 105},
+        "INLET_TEMP": {"name": "INLET_TEMP", "warning": 40, "critical": 50},
+        "BOARD_TEMP": {"name": "BOARD_TEMP", "warning": 70, "critical": 80},
+        "OUTLET_TEMP": {"name": "OUTLET_TEMP", "warning": 70, "critical": 80},
+        "CPU_TEMP": {"name": "CPU_TEMP", "warning": 100, "critical": 102},
+        "SFF_TEMP": {"name": "SFF_TEMP", "warning": 999, "critical": 1000, "ignore_threshold": 1, "invalid": -10000, "error": -9999},
+    },
+
+    "fancontrol_para": {
+        "interval": 5,
+        "fan_air_flow_monitor": 1,
+        "psu_air_flow_monitor": 1,
+        "max_pwm": 0xff,
+        "min_pwm": 0x80,
+        "abnormal_pwm": 0xff,
+        "warning_pwm": 0xff,
+        "temp_invalid_pid_pwm": 0x80,
+        "temp_error_pid_pwm": 0x80,
+        "temp_fail_num": 3,
+        "check_temp_fail": [
+            {"temp_name": "INLET_TEMP"},
+            {"temp_name": "SWITCH_TEMP"},
+            {"temp_name": "CPU_TEMP"},
+        ],
+        "temp_warning_num": 3,  # temp over warning 3 times continuously
+        "temp_critical_num": 3,  # temp over critical 3 times continuously
+        "temp_warning_countdown": 60,  # 5 min warning speed after not warning
+        "temp_critical_countdown": 60,  # 5 min full speed after not critical
+        "rotor_error_count": 6,  # fan rotor error 6 times continuously
+        "inlet_mac_diff": 999,
+        "check_crit_reboot_flag": 1,
+        "check_crit_reboot_num": 3,
+        "check_crit_sleep_time": 20,
+        "psu_absent_fullspeed_num": 0xFF,
+        "fan_absent_fullspeed_num": 1,
+        "rotor_error_fullspeed_num": 1,
+    },
+
+    "ledcontrol_para": {
+        "interval": 5,
+        "checkpsu": 0,  # 0: sys led don't follow psu led
+        "checkfan": 0,  # 0: sys led don't follow fan led
+        "psu_amber_num": 1,
+        "fan_amber_num": 1,
+        "board_sys_led": [
+            {"led_name": "FRONT_SYS_LED"},
+        ],
+        "board_psu_led": [
+            {"led_name": "FRONT_PSU_LED"},
+        ],
+        "board_fan_led": [
+            {"led_name": "FRONT_FAN_LED"},
+        ],
+        "psu_air_flow_monitor": 1,
+        "fan_air_flow_monitor": 1,
+        "psu_air_flow_amber_num": 1,
+        "fan_air_flow_amber_num": 1,
+    },
+    "otp_reboot_judge_file": {
+        "otp_switch_reboot_judge_file": "/etc/.otp_switch_reboot_flag",
+        "otp_other_reboot_judge_file": "/etc/.otp_other_reboot_flag",
+    },
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile
new file mode 100755
index 000000000000..e59ffd7ee67d
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile
@@ -0,0 +1,15 @@
+MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
+MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules)
+FIRMWARE_UPGRADE_PATH = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/app/firmware_upgrade/firmware_driver/include)
+
+EXTRA_CFLAGS+= -I$(MODULES_DIR)
+EXTRA_CFLAGS+= -I$(MODULES_DIR)/linux-5.10
+EXTRA_CFLAGS+= -I$(FIRMWARE_UPGRADE_PATH)
+
+obj-m :=  wb_pcie_dev_device.o
+obj-m += wb_i2c_mux_pca954x_device.o
+obj-m += wb_i2c_ocores_device.o
+obj-m += wb_lpc_drv_device.o
+obj-m += wb_i2c_dev_device.o
+obj-m += wb_io_dev_device.o
+obj-m += wb_firmware_upgrade_device.o
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_firmware_upgrade_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_firmware_upgrade_device.c
new file mode 100644
index 000000000000..5fcaa8da1963
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_firmware_upgrade_device.c
@@ -0,0 +1,178 @@
+/*
+ * wb_firmware_upgrade.c
+ * Original Author: support  2021-03-17
+ *
+ * ko for firmware device
+ * History
+ *  [Version]        [Author]           [Date]            [Description]
+ *    v1.0          support            2021-05-07          Initial version
+ */
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <firmware_upgrade.h>
+
+static int g_wb_firmware_upgrade_debug = 0;
+static int g_wb_firmware_upgrade_error = 0;
+
+module_param(g_wb_firmware_upgrade_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_firmware_upgrade_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_FIRMWARE_UPGRADE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_firmware_upgrade_debug) { \
+        printk(KERN_INFO "[WB_FIRMWARE_UPGRADE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_FIRMWARE_UPGRADE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_firmware_upgrade_error) { \
+        printk(KERN_ERR "[WB_FIRMWARE_UPGRADE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+/* cpld */
+static firmware_upgrade_device_t firmware_upgrade_device_data0 = {
+    .type           = "JTAG",
+    .upg_type.jtag = {
+        .tdi             = 67,
+        .tck             = 65,
+        .tms             = 6,
+        .tdo             = 32,
+    },
+    .en_gpio[0]     = 50,
+    .en_level[0]    = 1,
+    .en_gpio[1]     = 48,
+    .en_level[1]    = 1,
+    .chain          = 1,
+    .chip_index     = 1,
+
+    .en_gpio_num    = 2,
+    .en_logic_num   = 0,
+};
+
+/* fpga */
+static firmware_upgrade_device_t firmware_upgrade_device_data1 = {
+    .type               = "SPI_LOGIC",
+    .chain              = 3,
+    .chip_index         = 1,
+    .upg_type.sysfs = {
+        .dev_name     = "/dev/fpga0",
+        .ctrl_base    = 0xa00,
+        .flash_base   = 0x1A0000,
+        .test_base    = 0x7F0000,
+        .test_size    = 0x10000,
+    },
+    .en_gpio_num        = 0,
+    .en_logic_num       = 0,
+};
+
+static firmware_upgrade_device_t firmware_upgrade_device_data2 = {
+    .type               = "SPI_LOGIC",
+    .chain              = 4,
+    .chip_index         = 1,
+    .upg_type.sysfs = {
+        .dev_name     = "/dev/fpga0",
+        .ctrl_base    = 0xa00,
+        .flash_base   = 0x0,
+        .test_base    = 0x7F0000,
+        .test_size    = 0x10000,
+    },
+    .en_gpio_num        = 0,
+    .en_logic_num       = 0,
+};
+
+/* bios */
+static firmware_upgrade_device_t firmware_upgrade_device_data3 = {
+    .type               = "MTD_DEV",
+    .chain              = 2,
+    .chip_index         = 1,
+    .upg_type.sysfs = {
+        .mtd_name     = "BIOS",
+        .flash_base   = 0x800000,
+    },
+
+    .en_gpio_num        = 0,
+    .en_logic_num       = 0,
+};
+
+static void firmware_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device firmware_upgrade_device[] = {
+    {
+        .name   = "firmware_cpld_ispvme",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &firmware_upgrade_device_data0,
+            .release = firmware_device_release,
+        },
+    },
+    {
+        .name   = "firmware_sysfs",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &firmware_upgrade_device_data1,
+            .release = firmware_device_release,
+        },
+    },
+    {
+        .name   = "firmware_sysfs",
+        .id = 3,
+        .dev    = {
+            .platform_data  = &firmware_upgrade_device_data2,
+            .release = firmware_device_release,
+        },
+    },
+    {
+        .name   = "firmware_sysfs",
+        .id = 4,
+        .dev    = {
+            .platform_data  = &firmware_upgrade_device_data3,
+            .release = firmware_device_release,
+        },
+    },
+ };
+
+ static int __init firmware_upgrade_device_init(void)
+ {
+     int i;
+     int ret = 0;
+     firmware_upgrade_device_t *firmware_upgrade_device_data;
+
+     WB_FIRMWARE_UPGRADE_DEBUG_VERBOSE("enter!\n");
+     for (i = 0; i < ARRAY_SIZE(firmware_upgrade_device); i++) {
+         firmware_upgrade_device_data = firmware_upgrade_device[i].dev.platform_data;
+         ret = platform_device_register(&firmware_upgrade_device[i]);
+         if (ret < 0) {
+             firmware_upgrade_device_data->device_flag = -1; /* device register failed, set flag -1 */
+             printk(KERN_ERR "firmware_upgrade_device id%d register failed!\n", i + 1);
+         } else {
+             firmware_upgrade_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+         }
+     }
+     return 0;
+ }
+
+ static void __exit firmware_upgrade_device_exit(void)
+ {
+     int i;
+     firmware_upgrade_device_t *firmware_upgrade_device_data;
+
+     WB_FIRMWARE_UPGRADE_DEBUG_VERBOSE("enter!\n");
+     for (i = ARRAY_SIZE(firmware_upgrade_device) - 1; i >= 0; i--) {
+         firmware_upgrade_device_data = firmware_upgrade_device[i].dev.platform_data;
+         if (firmware_upgrade_device_data->device_flag == 0) { /* device register success, need unregister */
+             platform_device_unregister(&firmware_upgrade_device[i]);
+         }
+     }
+ }
+
+ module_init(firmware_upgrade_device_init);
+ module_exit(firmware_upgrade_device_exit);
+ MODULE_DESCRIPTION("FIRMWARE UPGRADE Devices");
+ MODULE_LICENSE("GPL");
+ MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_dev_device.c
new file mode 100644
index 000000000000..865e7afea44c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_dev_device.c
@@ -0,0 +1,140 @@
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_dev.h>
+
+static int g_wb_i2c_dev_device_debug = 0;
+static int g_wb_i2c_dev_device_error = 0;
+
+module_param(g_wb_i2c_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_dev_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_dev_device_error) { \
+        printk(KERN_ERR "[WB_I2C_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static i2c_dev_device_t i2c_dev_device_data0 = {
+    .i2c_bus = 2,
+    .i2c_addr = 0x0d,
+    .i2c_name = "cpld2",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data1 = {
+    .i2c_bus = 8,
+    .i2c_addr = 0x30,
+    .i2c_name = "cpld3",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data2 = {
+    .i2c_bus = 8,
+    .i2c_addr = 0x31,
+    .i2c_name = "cpld4",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+static i2c_dev_device_t i2c_dev_device_data3 = {
+    .i2c_bus = 6,
+    .i2c_addr = 0x0d,
+    .i2c_name = "cpld5",
+    .data_bus_width = 1,
+    .addr_bus_width = 1,
+    .per_rd_len = 256,
+    .per_wr_len = 256,
+    .i2c_len = 256,
+};
+
+struct i2c_board_info i2c_dev_device_info[] = {
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data0,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data1,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data2,
+    },
+    {
+        .type = "wb-i2c-dev",
+        .platform_data = &i2c_dev_device_data3,
+    },
+};
+
+static int __init wb_i2c_dev_device_init(void)
+{
+    int i;
+    struct i2c_adapter *adap;
+    struct i2c_client *client;
+    i2c_dev_device_t *i2c_dev_device_data;
+
+    WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(i2c_dev_device_info); i++) {
+        i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+        i2c_dev_device_info[i].addr = i2c_dev_device_data->i2c_addr;
+        adap = i2c_get_adapter(i2c_dev_device_data->i2c_bus);
+        if (adap == NULL) {
+            i2c_dev_device_data->client = NULL;
+            printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_dev_device_data->i2c_bus);
+            continue;
+        }
+        client = i2c_new_client_device(adap, &i2c_dev_device_info[i]);
+        if (!client) {
+            i2c_dev_device_data->client = NULL;
+            printk(KERN_ERR "Failed to register i2c dev device %d at bus %d!\n",
+                i2c_dev_device_data->i2c_addr, i2c_dev_device_data->i2c_bus);
+        } else {
+            i2c_dev_device_data->client = client;
+        }
+        i2c_put_adapter(adap);
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_dev_device_exit(void)
+{
+    int i;
+    i2c_dev_device_t *i2c_dev_device_data;
+
+    WB_I2C_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(i2c_dev_device_info) - 1; i >= 0; i--) {
+        i2c_dev_device_data = i2c_dev_device_info[i].platform_data;
+        if (i2c_dev_device_data->client) {
+            i2c_unregister_device(i2c_dev_device_data->client);
+            i2c_dev_device_data->client = NULL;
+        }
+    }
+}
+
+module_init(wb_i2c_dev_device_init);
+module_exit(wb_i2c_dev_device_exit);
+MODULE_DESCRIPTION("I2C DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_mux_pca954x_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_mux_pca954x_device.c
new file mode 100644
index 000000000000..f12a71013451
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_mux_pca954x_device.c
@@ -0,0 +1,296 @@
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/i2c.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_mux_pca954x.h>
+
+static int g_wb_i2c_mux_pca954x_device_debug = 0;
+static int g_wb_i2c_mux_pca954x_device_error = 0;
+
+module_param(g_wb_i2c_mux_pca954x_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_mux_pca954x_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_mux_pca954x_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_MUX_PCA954X_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_MUX_PCA954X_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_mux_pca954x_device_error) { \
+        printk(KERN_ERR "[WB_I2C_MUX_PCA954X_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data0 = {
+    .i2c_bus                        = 2,
+    .i2c_addr                       = 0x77,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 16,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/cpld5",
+        .file_attr.offset           = 0x60,
+        .file_attr.mask             = 0x02,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x02,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data1 = {
+    .i2c_bus                        = 4,
+    .i2c_addr                       = 0x77,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 24,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/cpld5",
+        .file_attr.offset           = 0x60,
+        .file_attr.mask             = 0x01,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x01,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data2 = {
+    .i2c_bus                        = 12,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 32,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x20,
+        .file_attr.mask             = 0x01,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x01,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data3 = {
+    .i2c_bus                        = 12,
+    .i2c_addr                       = 0x71,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 40,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x20,
+        .file_attr.mask             = 0x01,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x01,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data4 = {
+    .i2c_bus                        = 12,
+    .i2c_addr                       = 0x72,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 48,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x20,
+        .file_attr.mask             = 0x01,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x01,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data5 = {
+    .i2c_bus                        = 12,
+    .i2c_addr                       = 0x73,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 56,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x20,
+        .file_attr.mask             = 0x01,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x01,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data6 = {
+    .i2c_bus                        = 13,
+    .i2c_addr                       = 0x70,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 64,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x20,
+        .file_attr.mask             = 0x01,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x01,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data7 = {
+    .i2c_bus                        = 13,
+    .i2c_addr                       = 0x71,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 72,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x20,
+        .file_attr.mask             = 0x01,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x01,
+    },
+};
+
+static i2c_mux_pca954x_device_t i2c_mux_pca954x_device_data8 = {
+    .i2c_bus                        = 13,
+    .i2c_addr                       = 0x72,
+    .probe_disable                  = 1,
+    .select_chan_check              = 0,
+    .close_chan_force_reset         = 0,
+    .pca9548_base_nr                = 80,
+    .pca9548_reset_type             = PCA9548_RESET_FILE,
+    .rst_delay_b                    = 0,
+    .rst_delay                      = 1000,
+    .rst_delay_a                    = 1000,
+    .attr = {
+        .file_attr.dev_name         = "/dev/fpga0",
+        .file_attr.offset           = 0x20,
+        .file_attr.mask             = 0x01,
+        .file_attr.reset_on         = 0x00,
+        .file_attr.reset_off        = 0x01,
+    },
+};
+
+struct i2c_board_info i2c_mux_pca954x_device_info[] = {
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data0,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data1,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data2,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data3,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data4,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data5,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data6,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data7,
+    },
+    {
+        .type = "wb_pca9548",
+        .platform_data = &i2c_mux_pca954x_device_data8,
+    },
+};
+
+static int __init wb_i2c_mux_pca954x_device_init(void)
+{
+    int i;
+    struct i2c_adapter *adap;
+    struct i2c_client *client;
+    i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data;
+
+    WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(i2c_mux_pca954x_device_info); i++) {
+        i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data;
+        i2c_mux_pca954x_device_info[i].addr = i2c_mux_pca954x_device_data->i2c_addr;
+        adap = i2c_get_adapter(i2c_mux_pca954x_device_data->i2c_bus);
+        if (adap == NULL) {
+            i2c_mux_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "get i2c bus %d adapter fail.\n", i2c_mux_pca954x_device_data->i2c_bus);
+            continue;
+        }
+        client = i2c_new_client_device(adap, &i2c_mux_pca954x_device_info[i]);
+        if (!client) {
+            i2c_mux_pca954x_device_data->client = NULL;
+            printk(KERN_ERR "Failed to register pca954x device %d at bus %d!\n",
+                i2c_mux_pca954x_device_data->i2c_addr, i2c_mux_pca954x_device_data->i2c_bus);
+        } else {
+            i2c_mux_pca954x_device_data->client = client;
+        }
+        i2c_put_adapter(adap);
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_mux_pca954x_device_exit(void)
+{
+    int i;
+    i2c_mux_pca954x_device_t *i2c_mux_pca954x_device_data;
+
+    WB_I2C_MUX_PCA954X_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(i2c_mux_pca954x_device_info) - 1; i >= 0; i--) {
+        i2c_mux_pca954x_device_data = i2c_mux_pca954x_device_info[i].platform_data;
+        if (i2c_mux_pca954x_device_data->client) {
+            i2c_unregister_device(i2c_mux_pca954x_device_data->client);
+            i2c_mux_pca954x_device_data->client = NULL;
+        }
+    }
+}
+
+module_init(wb_i2c_mux_pca954x_device_init);
+module_exit(wb_i2c_mux_pca954x_device_exit);
+MODULE_DESCRIPTION("I2C MUX PCA954X Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_ocores_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_ocores_device.c
new file mode 100644
index 000000000000..ff7ba9d26fbc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_ocores_device.c
@@ -0,0 +1,423 @@
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_i2c_ocores.h>
+
+static int g_wb_i2c_ocores_device_debug = 0;
+static int g_wb_i2c_ocores_device_error = 0;
+
+module_param(g_wb_i2c_ocores_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_i2c_ocores_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_i2c_ocores_device_debug) { \
+        printk(KERN_INFO "[WB_I2C_OCORE_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_I2C_OCORE_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_i2c_ocores_device_error) { \
+        printk(KERN_ERR "[WB_I2C_OCORE_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static i2c_ocores_device_t i2c_ocores_device_data0 = {
+    .adap_nr = 2,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0800,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 0,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data1 = {
+    .adap_nr = 3,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0820,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 1,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data2 = {
+    .adap_nr = 4,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0840,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 2,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data3 = {
+    .adap_nr = 5,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0860,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 3,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data4 = {
+    .adap_nr = 6,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0880,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 4,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data5 = {
+    .adap_nr = 7,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x08a0,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 5,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data6 = {
+    .adap_nr = 8,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x08c0,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 6,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data7 = {
+    .adap_nr = 9,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x08e0,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 7,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data8 = {
+    .adap_nr = 10,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0900,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 8,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data9 = {
+    .adap_nr = 11,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0920,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 9,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data10 = {
+    .adap_nr = 12,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0940,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 10,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data11 = {
+    .adap_nr = 13,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0960,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 11,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data12 = {
+    .adap_nr = 14,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x0980,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 12,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static i2c_ocores_device_t i2c_ocores_device_data13 = {
+    .adap_nr = 15,
+    .big_endian = 0,
+    .dev_name = "/dev/fpga0",
+    .reg_access_mode = 3,
+    .dev_base = 0x09a0,
+    .reg_shift = 2,
+    .reg_io_width = 4,
+    .ip_clock_khz = 125000,
+    .bus_clock_khz = 100,
+    .irq_offset = 13,
+    .pci_domain = 0,
+    .pci_bus = 8,
+    .pci_slot = 0,
+    .pci_fn = 0,
+};
+
+static void wb_i2c_ocores_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device i2c_ocores_device[] = {
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data0,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data1,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 3,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data2,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 4,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data3,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 5,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data4,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 6,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data5,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 7,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data6,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 8,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data7,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 9,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data8,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 10,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data9,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 11,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data10,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 12,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data11,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 13,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data12,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+    {
+        .name   = "wb-ocores-i2c",
+        .id = 14,
+        .dev    = {
+            .platform_data  = &i2c_ocores_device_data13,
+            .release = wb_i2c_ocores_device_release,
+        },
+    },
+};
+
+static int __init wb_i2c_ocores_device_init(void)
+{
+    int i;
+    int ret = 0;
+    i2c_ocores_device_t *i2c_ocores_device_data;
+
+    WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(i2c_ocores_device); i++) {
+        i2c_ocores_device_data = i2c_ocores_device[i].dev.platform_data;
+        ret = platform_device_register(&i2c_ocores_device[i]);
+        if (ret < 0) {
+            i2c_ocores_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-ocores-i2c.%d register failed!\n", i + 1);
+        } else {
+            i2c_ocores_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_i2c_ocores_device_exit(void)
+{
+    int i;
+    i2c_ocores_device_t *i2c_ocores_device_data;
+
+    WB_I2C_OCORE_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(i2c_ocores_device) - 1; i >= 0; i--) {
+        i2c_ocores_device_data = i2c_ocores_device[i].dev.platform_data;
+        if (i2c_ocores_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&i2c_ocores_device[i]);
+        }
+    }
+}
+
+module_init(wb_i2c_ocores_device_init);
+module_exit(wb_i2c_ocores_device_exit);
+MODULE_DESCRIPTION("I2C OCORES Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_io_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_io_dev_device.c
new file mode 100644
index 000000000000..cc84938fff0e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_io_dev_device.c
@@ -0,0 +1,103 @@
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_io_dev.h>
+
+static int g_wb_io_dev_device_debug = 0;
+static int g_wb_io_dev_device_error = 0;
+
+module_param(g_wb_io_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_io_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_IO_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_io_dev_device_debug) { \
+        printk(KERN_INFO "[WB_IO_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_IO_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_io_dev_device_error) { \
+        printk(KERN_ERR "[WB_IO_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static io_dev_device_t io_dev_device_data0 = {
+    .io_dev_name = "cpld0",
+    .io_base = 0x700,
+    .io_len = 0x100,
+    .indirect_addr = 0,
+};
+
+static io_dev_device_t io_dev_device_data1 = {
+    .io_dev_name = "cpld1",
+    .io_base = 0x900,
+    .io_len = 0x100,
+    .indirect_addr = 0,
+};
+
+static void wb_io_dev_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device io_dev_device[] = {
+    {
+        .name   = "wb-io-dev",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &io_dev_device_data0,
+            .release = wb_io_dev_device_release,
+        },
+    },
+    {
+        .name   = "wb-io-dev",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &io_dev_device_data1,
+            .release = wb_io_dev_device_release,
+        },
+    },
+};
+
+static int __init wb_io_dev_device_init(void)
+{
+    int i;
+    int ret = 0;
+    io_dev_device_t *io_dev_device_data;
+
+    WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(io_dev_device); i++) {
+        io_dev_device_data = io_dev_device[i].dev.platform_data;
+        ret = platform_device_register(&io_dev_device[i]);
+        if (ret < 0) {
+            io_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-io-dev.%d register failed!\n", i + 1);
+        } else {
+            io_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_io_dev_device_exit(void)
+{
+    int i;
+    io_dev_device_t *io_dev_device_data;
+
+    WB_IO_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(io_dev_device) - 1; i >= 0; i--) {
+        io_dev_device_data = io_dev_device[i].dev.platform_data;
+        if (io_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&io_dev_device[i]);
+        }
+    }
+}
+
+module_init(wb_io_dev_device_init);
+module_exit(wb_io_dev_device_exit);
+MODULE_DESCRIPTION("IO DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_lpc_drv_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_lpc_drv_device.c
new file mode 100644
index 000000000000..9b6b61a51735
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_lpc_drv_device.c
@@ -0,0 +1,130 @@
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_lpc_drv.h>
+
+static int g_wb_lpc_drv_device_debug = 0;
+static int g_wb_lpc_drv_device_error = 0;
+
+module_param(g_wb_lpc_drv_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_lpc_drv_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_LPC_DRV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_lpc_drv_device_debug) { \
+        printk(KERN_INFO "[WB_LPC_DRV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_LPC_DRV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_lpc_drv_device_error) { \
+        printk(KERN_ERR "[WB_LPC_DRV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static lpc_drv_device_t lpc_drv_device_data_0 = {
+    .lpc_io_name = "wb_lpc",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 0,
+    .lpc_io_base = 0x700,
+    .lpc_io_size = 0x100,
+    .lpc_gen_dec = 0x84,
+};
+
+static lpc_drv_device_t lpc_drv_device_data_1 = {
+    .lpc_io_name = "wb_lpc",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 0,
+    .lpc_io_base = 0x900,
+    .lpc_io_size = 0x100,
+    .lpc_gen_dec = 0x88,
+};
+
+static lpc_drv_device_t lpc_drv_device_data_2 = {
+    .lpc_io_name = "wb_lpc",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 0,
+    .lpc_io_base = 0xb00,
+    .lpc_io_size = 0x100,
+    .lpc_gen_dec = 0x90,
+};
+
+static void wb_lpc_drv_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device lpc_drv_device[] = {
+    {
+        .name   = "wb-lpc",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &lpc_drv_device_data_0,
+            .release = wb_lpc_drv_device_release,
+        },
+    },
+    {
+        .name   = "wb-lpc",
+        .id = 2,
+        .dev    = {
+            .platform_data  = &lpc_drv_device_data_1,
+            .release = wb_lpc_drv_device_release,
+        },
+    },
+    {
+        .name   = "wb-lpc",
+        .id = 3,
+        .dev    = {
+            .platform_data  = &lpc_drv_device_data_2,
+            .release = wb_lpc_drv_device_release,
+        },
+    },
+};
+
+static int __init wb_lpc_drv_device_init(void)
+{
+    int i;
+    int ret = 0;
+    lpc_drv_device_t *lpc_drv_device_data;
+
+    WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(lpc_drv_device); i++) {
+        lpc_drv_device_data = lpc_drv_device[i].dev.platform_data;
+        ret = platform_device_register(&lpc_drv_device[i]);
+        if (ret < 0) {
+            lpc_drv_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-lpc.%d register failed!\n", i + 1);
+        } else {
+            lpc_drv_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_lpc_drv_device_exit(void)
+{
+    int i;
+    lpc_drv_device_t *lpc_drv_device_data;
+
+    WB_LPC_DRV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(lpc_drv_device) - 1; i >= 0; i--) {
+        lpc_drv_device_data = lpc_drv_device[i].dev.platform_data;
+        if (lpc_drv_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&lpc_drv_device[i]);
+        }
+    }
+}
+
+module_init(wb_lpc_drv_device_init);
+module_exit(wb_lpc_drv_device_exit);
+MODULE_DESCRIPTION("LPC DRV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_pcie_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_pcie_dev_device.c
new file mode 100644
index 000000000000..f79b29770d29
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_pcie_dev_device.c
@@ -0,0 +1,93 @@
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include <wb_pcie_dev.h>
+
+static int g_wb_pcie_dev_device_debug = 0;
+static int g_wb_pcie_dev_device_error = 0;
+
+module_param(g_wb_pcie_dev_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_pcie_dev_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_pcie_dev_device_debug) { \
+        printk(KERN_INFO "[WB_PCIE_DEV_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_PCIE_DEV_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_pcie_dev_device_error) { \
+        printk(KERN_ERR "[WB_PCIE_DEV_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static pci_dev_device_t pcie_dev_device_data0 = {
+    .pci_dev_name = "fpga0",
+    .pci_domain = 0x0000,
+    .pci_bus = 0x08,
+    .pci_slot = 0x00,
+    .pci_fn = 0,
+    .pci_bar = 0,
+    .bus_width = 4,
+    .upg_ctrl_base = 0xa00,
+    .upg_flash_base = 0x1a0000,
+};
+
+static void wb_pcie_dev_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device pcie_dev_device[] = {
+    {
+        .name   = "wb-pci-dev",
+        .id = 1,
+        .dev    = {
+            .platform_data  = &pcie_dev_device_data0,
+            .release = wb_pcie_dev_device_release,
+        },
+    },
+};
+
+static int __init wb_pcie_dev_device_init(void)
+{
+    int i;
+    int ret = 0;
+    pci_dev_device_t *pcie_dev_device_data;
+
+    WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = 0; i < ARRAY_SIZE(pcie_dev_device); i++) {
+        pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+        ret = platform_device_register(&pcie_dev_device[i]);
+        if (ret < 0) {
+            pcie_dev_device_data->device_flag = -1; /* device register failed, set flag -1 */
+            printk(KERN_ERR "wb-pci-dev.%d register failed!\n", i + 1);
+        } else {
+            pcie_dev_device_data->device_flag = 0; /* device register suucess, set flag 0 */
+        }
+    }
+    return 0;
+}
+
+static void __exit wb_pcie_dev_device_exit(void)
+{
+    int i;
+    pci_dev_device_t *pcie_dev_device_data;
+
+    WB_PCIE_DEV_DEVICE_DEBUG_VERBOSE("enter!\n");
+    for (i = ARRAY_SIZE(pcie_dev_device) - 1; i >= 0; i--) {
+        pcie_dev_device_data = pcie_dev_device[i].dev.platform_data;
+        if (pcie_dev_device_data->device_flag == 0) { /* device register success, need unregister */
+            platform_device_unregister(&pcie_dev_device[i]);
+        }
+    }
+}
+
+module_init(wb_pcie_dev_device_init);
+module_exit(wb_pcie_dev_device_exit);
+MODULE_DESCRIPTION("PCIE DEV Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_CPLD.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
new file mode 100644
index 000000000000..98d1da1750c3
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_CPLD.cfg
@@ -0,0 +1,41 @@
+# configuration item: I2C address of CPLD
+# format: cpld_i2c_dev.bus_[cpld_slot]_[cpld_id] cpld_i2c_dev.addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+# bus: I2C bus number of CPLD
+# addr: I2C address of CPLD
+cpld_i2c_dev.bus_0_2=2
+cpld_i2c_dev.addr_0_2=0x0d
+cpld_i2c_dev.bus_0_3=8
+cpld_i2c_dev.addr_0_3=0x30
+cpld_i2c_dev.bus_0_4=8
+cpld_i2c_dev.addr_0_4=0x31
+cpld_i2c_dev.bus_0_5=6
+cpld_i2c_dev.addr_0_5=0x0d
+
+
+# configuration item: LPC address of CPLD
+# format: cpld_lpc_addr_[cpld_slot]_[cpld_id]
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+cpld_lpc_dev_0_0=0x700
+cpld_lpc_dev_0_1=0x900
+
+
+# configuration item: CPLD access method, lpc or i2c
+# format: mode_cpld_[cpld_slot][cpld_slot]=lpc/i2c
+# cpld_slot: Main card: 0, linear card: start from 1
+# cpld_id: start from 0
+mode_cpld_0_0=lpc
+mode_cpld_0_1=lpc
+mode_cpld_0_2=i2c
+mode_cpld_0_3=i2c
+mode_cpld_0_4=i2c
+mode_cpld_0_5=i2c
+
+
+# configuration item: the number of CPLD
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: CPLD main_dev is 4
+# minor_dev: CPLD minor_dev not exist
+dev_num_4_0=6
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_FAN.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_FAN.cfg
new file mode 100644
index 000000000000..2350b74eb8bc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_FAN.cfg
@@ -0,0 +1,304 @@
+# configuration item: the number of fans
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: fan main_dev is 1
+# minor_dev: fan minor_dev not exist(0)
+dev_num_1_0=4
+
+
+# configuration item: the number of rotors
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: rotor main_dev is 1
+# minor_dev: rotor minor_dev is 5
+dev_num_1_5=2
+
+
+# configuration item: fan presence status
+# format: dev_present_status_[main_dev_id][fan_index]
+# main_dev_id: fan main_dev_id is 1
+# fan_index: start from 1
+dev_present_status.mode_1_1=config
+dev_present_status.src_1_1=cpld
+dev_present_status.frmt_1_1=bit
+dev_present_status.pola_1_1=negative
+dev_present_status.addr_1_1=0x00020030
+dev_present_status.len_1_1=1
+dev_present_status.bit_offset_1_1=0
+
+dev_present_status.mode_1_2=config
+dev_present_status.src_1_2=cpld
+dev_present_status.frmt_1_2=bit
+dev_present_status.pola_1_2=negative
+dev_present_status.addr_1_2=0x00020030
+dev_present_status.len_1_2=1
+dev_present_status.bit_offset_1_2=1
+
+dev_present_status.mode_1_3=config
+dev_present_status.src_1_3=cpld
+dev_present_status.frmt_1_3=bit
+dev_present_status.pola_1_3=negative
+dev_present_status.addr_1_3=0x00020030
+dev_present_status.len_1_3=1
+dev_present_status.bit_offset_1_3=2
+
+dev_present_status.mode_1_4=config
+dev_present_status.src_1_4=cpld
+dev_present_status.frmt_1_4=bit
+dev_present_status.pola_1_4=negative
+dev_present_status.addr_1_4=0x00020030
+dev_present_status.len_1_4=1
+dev_present_status.bit_offset_1_4=3
+
+
+# configuration item: fan rotor status
+# format: fan_roll_status_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_roll_status.mode_1_0=config
+fan_roll_status.int_cons_1_0=
+fan_roll_status.src_1_0=cpld
+fan_roll_status.frmt_1_0=bit
+fan_roll_status.pola_1_0=positive
+fan_roll_status.fpath_1_0=
+fan_roll_status.addr_1_0=0x00020031
+fan_roll_status.len_1_0=1
+fan_roll_status.bit_offset_1_0=0
+
+fan_roll_status.mode_1_1=config
+fan_roll_status.int_cons_1_1=
+fan_roll_status.src_1_1=cpld
+fan_roll_status.frmt_1_1=bit
+fan_roll_status.pola_1_1=positive
+fan_roll_status.fpath_1_1=
+fan_roll_status.addr_1_1=0x00020034
+fan_roll_status.len_1_1=1
+fan_roll_status.bit_offset_1_1=0
+
+fan_roll_status.mode_2_0=config
+fan_roll_status.int_cons_2_0=
+fan_roll_status.src_2_0=cpld
+fan_roll_status.frmt_2_0=bit
+fan_roll_status.pola_2_0=positive
+fan_roll_status.fpath_2_0=
+fan_roll_status.addr_2_0=0x00020031
+fan_roll_status.len_2_0=1
+fan_roll_status.bit_offset_2_0=1
+
+fan_roll_status.mode_2_1=config
+fan_roll_status.int_cons_2_1=
+fan_roll_status.src_2_1=cpld
+fan_roll_status.frmt_2_1=bit
+fan_roll_status.pola_2_1=positive
+fan_roll_status.fpath_2_1=
+fan_roll_status.addr_2_1=0x00020034
+fan_roll_status.len_2_1=1
+fan_roll_status.bit_offset_2_1=1
+
+fan_roll_status.mode_3_0=config
+fan_roll_status.int_cons_3_0=
+fan_roll_status.src_3_0=cpld
+fan_roll_status.frmt_3_0=bit
+fan_roll_status.pola_3_0=positive
+fan_roll_status.fpath_3_0=
+fan_roll_status.addr_3_0=0x00020031
+fan_roll_status.len_3_0=1
+fan_roll_status.bit_offset_3_0=2
+
+fan_roll_status.mode_3_1=config
+fan_roll_status.int_cons_3_1=
+fan_roll_status.src_3_1=cpld
+fan_roll_status.frmt_3_1=bit
+fan_roll_status.pola_3_1=positive
+fan_roll_status.fpath_3_1=
+fan_roll_status.addr_3_1=0x00020034
+fan_roll_status.len_3_1=1
+fan_roll_status.bit_offset_3_1=2
+
+fan_roll_status.mode_4_0=config
+fan_roll_status.int_cons_4_0=
+fan_roll_status.src_4_0=cpld
+fan_roll_status.frmt_4_0=bit
+fan_roll_status.pola_4_0=positive
+fan_roll_status.fpath_4_0=
+fan_roll_status.addr_4_0=0x00020031
+fan_roll_status.len_4_0=1
+fan_roll_status.bit_offset_4_0=3
+
+fan_roll_status.mode_4_1=config
+fan_roll_status.int_cons_4_1=
+fan_roll_status.src_4_1=cpld
+fan_roll_status.frmt_4_1=bit
+fan_roll_status.pola_4_1=positive
+fan_roll_status.fpath_4_1=
+fan_roll_status.addr_4_1=0x00020034
+fan_roll_status.len_4_1=1
+fan_roll_status.bit_offset_4_1=3
+
+
+# configuration item: fan speed
+# format: fan_speed_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_speed.mode_1_0=config
+fan_speed.int_cons_1_0=
+fan_speed.src_1_0=cpld
+fan_speed.frmt_1_0=num_bytes
+fan_speed.pola_1_0=negative
+fan_speed.fpath_1_0=
+fan_speed.addr_1_0=0x0002001b
+fan_speed.len_1_0=2
+fan_speed.bit_offset_1_0=
+
+fan_speed.mode_1_1=config
+fan_speed.int_cons_1_1=
+fan_speed.src_1_1=cpld
+fan_speed.frmt_1_1=num_bytes
+fan_speed.pola_1_1=negative
+fan_speed.fpath_1_1=
+fan_speed.addr_1_1=0x00020025
+fan_speed.len_1_1=2
+fan_speed.bit_offset_1_1=
+
+fan_speed.mode_2_0=config
+fan_speed.int_cons_2_0=
+fan_speed.src_2_0=cpld
+fan_speed.frmt_2_0=num_bytes
+fan_speed.pola_2_0=negative
+fan_speed.fpath_2_0=
+fan_speed.addr_2_0=0x0002001d
+fan_speed.len_2_0=2
+fan_speed.bit_offset_2_0=
+
+fan_speed.mode_2_1=config
+fan_speed.int_cons_2_1=
+fan_speed.src_2_1=cpld
+fan_speed.frmt_2_1=num_bytes
+fan_speed.pola_2_1=negative
+fan_speed.fpath_2_1=
+fan_speed.addr_2_1=0x00020027
+fan_speed.len_2_1=2
+fan_speed.bit_offset_2_1=
+
+fan_speed.mode_3_0=config
+fan_speed.int_cons_3_0=
+fan_speed.src_3_0=cpld
+fan_speed.frmt_3_0=num_bytes
+fan_speed.pola_3_0=negative
+fan_speed.fpath_3_0=
+fan_speed.addr_3_0=0x0002001f
+fan_speed.len_3_0=2
+fan_speed.bit_offset_3_0=
+
+fan_speed.mode_3_1=config
+fan_speed.int_cons_3_1=
+fan_speed.src_3_1=cpld
+fan_speed.frmt_3_1=num_bytes
+fan_speed.pola_3_1=negative
+fan_speed.fpath_3_1=
+fan_speed.addr_3_1=0x00020029
+fan_speed.len_3_1=2
+fan_speed.bit_offset_3_1=
+
+fan_speed.mode_4_0=config
+fan_speed.int_cons_4_0=
+fan_speed.src_4_0=cpld
+fan_speed.frmt_4_0=num_bytes
+fan_speed.pola_4_0=negative
+fan_speed.fpath_4_0=
+fan_speed.addr_4_0=0x00020021
+fan_speed.len_4_0=2
+fan_speed.bit_offset_4_0=
+
+fan_speed.mode_4_1=config
+fan_speed.int_cons_4_1=
+fan_speed.src_4_1=cpld
+fan_speed.frmt_4_1=num_bytes
+fan_speed.pola_4_1=negative
+fan_speed.fpath_4_1=
+fan_speed.addr_4_1=0x0002002b
+fan_speed.len_4_1=2
+fan_speed.bit_offset_4_1=
+
+
+# configuration item: fan pwm
+# format: fan_ratio_[fan_id]_[motor_id]
+# fan_id: start from 1
+# motor_id: start from 0
+fan_ratio.mode_1_0=config
+fan_ratio.int_cons_1_0=
+fan_ratio.src_1_0=cpld
+fan_ratio.frmt_1_0=byte
+fan_ratio.pola_1_0=
+fan_ratio.fpath_1_0=
+fan_ratio.addr_1_0=0x00020014
+fan_ratio.len_1_0=1
+fan_ratio.bit_offset_1_0=
+
+fan_ratio.mode_1_1=config
+fan_ratio.int_cons_1_1=
+fan_ratio.src_1_1=cpld
+fan_ratio.frmt_1_1=byte
+fan_ratio.pola_1_1=
+fan_ratio.fpath_1_1=
+fan_ratio.addr_1_1=0x00020014
+fan_ratio.len_1_1=1
+fan_ratio.bit_offset_1_1=
+
+fan_ratio.mode_2_0=config
+fan_ratio.int_cons_2_0=
+fan_ratio.src_2_0=cpld
+fan_ratio.frmt_2_0=byte
+fan_ratio.pola_2_0=
+fan_ratio.fpath_2_0=
+fan_ratio.addr_2_0=0x00020015
+fan_ratio.len_2_0=1
+fan_ratio.bit_offset_2_0=
+
+fan_ratio.mode_2_1=config
+fan_ratio.int_cons_2_1=
+fan_ratio.src_2_1=cpld
+fan_ratio.frmt_2_1=byte
+fan_ratio.pola_2_1=
+fan_ratio.fpath_2_1=
+fan_ratio.addr_2_1=0x00020015
+fan_ratio.len_2_1=1
+fan_ratio.bit_offset_2_1=
+
+fan_ratio.mode_3_0=config
+fan_ratio.int_cons_3_0=
+fan_ratio.src_3_0=cpld
+fan_ratio.frmt_3_0=byte
+fan_ratio.pola_3_0=
+fan_ratio.fpath_3_0=
+fan_ratio.addr_3_0=0x00020016
+fan_ratio.len_3_0=1
+fan_ratio.bit_offset_3_0=
+
+fan_ratio.mode_3_1=config
+fan_ratio.int_cons_3_1=
+fan_ratio.src_3_1=cpld
+fan_ratio.frmt_3_1=byte
+fan_ratio.pola_3_1=
+fan_ratio.fpath_3_1=
+fan_ratio.addr_3_1=0x00020016
+fan_ratio.len_3_1=1
+fan_ratio.bit_offset_3_1=
+
+fan_ratio.mode_4_0=config
+fan_ratio.int_cons_4_0=
+fan_ratio.src_4_0=cpld
+fan_ratio.frmt_4_0=byte
+fan_ratio.pola_4_0=
+fan_ratio.fpath_4_0=
+fan_ratio.addr_4_0=0x00020017
+fan_ratio.len_4_0=1
+fan_ratio.bit_offset_4_0=
+
+fan_ratio.mode_4_1=config
+fan_ratio.int_cons_4_1=
+fan_ratio.src_4_1=cpld
+fan_ratio.frmt_4_1=byte
+fan_ratio.pola_4_1=
+fan_ratio.fpath_4_1=
+fan_ratio.addr_4_1=0x00020017
+fan_ratio.len_4_1=1
+fan_ratio.bit_offset_4_1=
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_PSU.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_PSU.cfg
new file mode 100644
index 000000000000..082ef20fe97f
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_PSU.cfg
@@ -0,0 +1,64 @@
+# configuration item: the number of psus
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: psu main_dev is 2
+# minor_dev: psu minor_dev not exist(0)
+dev_num_2_0=2
+
+
+# configuration item: psu status
+# format: psu_status_[psu_index]_[status_id]
+# psu_index: start from 1
+# status_id: 0: presence 1: output 2: alert
+# psu1 presence status
+psu_status.mode_1_0=config
+psu_status.src_1_0=cpld
+psu_status.frmt_1_0=bit
+psu_status.pola_1_0=negative
+psu_status.addr_1_0=0x00050051
+psu_status.len_1_0=1
+psu_status.bit_offset_1_0=0
+
+# psu1 output status
+psu_status.mode_1_1=config
+psu_status.src_1_1=cpld
+psu_status.frmt_1_1=bit
+psu_status.pola_1_1=positive
+psu_status.addr_1_1=0x00050051
+psu_status.len_1_1=1
+psu_status.bit_offset_1_1=1
+
+# psu1 alert status
+psu_status.mode_1_2=config
+psu_status.src_1_2=cpld
+psu_status.frmt_1_2=bit
+psu_status.pola_1_2=negative
+psu_status.addr_1_2=0x00050051
+psu_status.len_1_2=1
+psu_status.bit_offset_1_2=2
+
+# psu2 presence status
+psu_status.mode_2_0=config
+psu_status.src_2_0=cpld
+psu_status.frmt_2_0=bit
+psu_status.pola_2_0=negative
+psu_status.addr_2_0=0x00050051
+psu_status.len_2_0=1
+psu_status.bit_offset_2_0=4
+
+# psu2 output status
+psu_status.mode_2_1=config
+psu_status.src_2_1=cpld
+psu_status.frmt_2_1=bit
+psu_status.pola_2_1=positive
+psu_status.addr_2_1=0x00050051
+psu_status.len_2_1=1
+psu_status.bit_offset_2_1=5
+
+# psu2 alert status
+psu_status.mode_2_2=config
+psu_status.src_2_2=cpld
+psu_status.frmt_2_2=bit
+psu_status.pola_2_2=negative
+psu_status.addr_2_2=0x00050051
+psu_status.len_2_2=1
+psu_status.bit_offset_2_2=6
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_SFF.cfg b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_SFF.cfg
new file mode 100644
index 000000000000..7f57dfd93c5b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/WB_PLAT_SFF.cfg
@@ -0,0 +1,521 @@
+# configuration item: the number of sffs
+# format: dev_num_[main_dev]_[minor_dev]
+# main_dev: sff main_dev is 3
+# minor_dev: sff minor_dev not exist(0)
+dev_num_3_0=56
+
+# configuration item: The directory name of sff sysfs
+# format: sff_dir_name_[sff_index]
+# sff_index: start from 1
+sff_dir_name_1 =sff1
+sff_dir_name_2 =sff2
+sff_dir_name_3 =sff3
+sff_dir_name_4 =sff4
+sff_dir_name_5 =sff5
+sff_dir_name_6 =sff6
+sff_dir_name_7 =sff7
+sff_dir_name_8 =sff8
+sff_dir_name_9 =sff9
+sff_dir_name_10 =sff10
+sff_dir_name_11 =sff11
+sff_dir_name_12 =sff12
+sff_dir_name_13 =sff13
+sff_dir_name_14 =sff14
+sff_dir_name_15 =sff15
+sff_dir_name_16 =sff16
+sff_dir_name_17 =sff17
+sff_dir_name_18 =sff18
+sff_dir_name_19 =sff19
+sff_dir_name_20 =sff20
+sff_dir_name_21 =sff21
+sff_dir_name_22 =sff22
+sff_dir_name_23 =sff23
+sff_dir_name_24 =sff24
+sff_dir_name_25 =sff25
+sff_dir_name_26 =sff26
+sff_dir_name_27 =sff27
+sff_dir_name_28 =sff28
+sff_dir_name_29 =sff29
+sff_dir_name_30 =sff30
+sff_dir_name_31 =sff31
+sff_dir_name_32 =sff32
+sff_dir_name_33 =sff33
+sff_dir_name_34 =sff34
+sff_dir_name_35 =sff35
+sff_dir_name_36 =sff36
+sff_dir_name_37 =sff37
+sff_dir_name_38 =sff38
+sff_dir_name_39 =sff39
+sff_dir_name_40 =sff40
+sff_dir_name_41 =sff41
+sff_dir_name_42 =sff42
+sff_dir_name_43 =sff43
+sff_dir_name_44 =sff44
+sff_dir_name_45 =sff45
+sff_dir_name_46 =sff46
+sff_dir_name_47 =sff47
+sff_dir_name_48 =sff48
+sff_dir_name_49 =sff49
+sff_dir_name_50 =sff50
+sff_dir_name_51 =sff51
+sff_dir_name_52 =sff52
+sff_dir_name_53 =sff53
+sff_dir_name_54 =sff54
+sff_dir_name_55 =sff55
+sff_dir_name_56 =sff56
+
+
+# configuration item: sff cpld register status
+# format: sff_cpld_reg_[sff_index]_[cpld_reg]
+# sff_index: start from 1
+# cpld_reg: 1: power_on, 2: tx_fault, 3: tx_dis, 4:pre_n, 5:rx_los
+# 6: reset, 7: lpmode, 8: module_present, 9: interrupt
+
+# sff cpld presence status
+sff_cpld_reg.mode_1_8=config
+sff_cpld_reg.src_1_8=cpld
+sff_cpld_reg.frmt_1_8=bit
+sff_cpld_reg.pola_1_8=negative
+sff_cpld_reg.addr_1_8=0x00030030
+sff_cpld_reg.len_1_8=1
+sff_cpld_reg.bit_offset_1_8=0
+
+sff_cpld_reg.mode_2_8=config
+sff_cpld_reg.src_2_8=cpld
+sff_cpld_reg.frmt_2_8=bit
+sff_cpld_reg.pola_2_8=negative
+sff_cpld_reg.addr_2_8=0x00030030
+sff_cpld_reg.len_2_8=1
+sff_cpld_reg.bit_offset_2_8=1
+
+sff_cpld_reg.mode_3_8=config
+sff_cpld_reg.src_3_8=cpld
+sff_cpld_reg.frmt_3_8=bit
+sff_cpld_reg.pola_3_8=negative
+sff_cpld_reg.addr_3_8=0x00030030
+sff_cpld_reg.len_3_8=1
+sff_cpld_reg.bit_offset_3_8=2
+
+sff_cpld_reg.mode_4_8=config
+sff_cpld_reg.src_4_8=cpld
+sff_cpld_reg.frmt_4_8=bit
+sff_cpld_reg.pola_4_8=negative
+sff_cpld_reg.addr_4_8=0x00030030
+sff_cpld_reg.len_4_8=1
+sff_cpld_reg.bit_offset_4_8=3
+
+sff_cpld_reg.mode_5_8=config
+sff_cpld_reg.src_5_8=cpld
+sff_cpld_reg.frmt_5_8=bit
+sff_cpld_reg.pola_5_8=negative
+sff_cpld_reg.addr_5_8=0x00030030
+sff_cpld_reg.len_5_8=1
+sff_cpld_reg.bit_offset_5_8=4
+
+sff_cpld_reg.mode_6_8=config
+sff_cpld_reg.src_6_8=cpld
+sff_cpld_reg.frmt_6_8=bit
+sff_cpld_reg.pola_6_8=negative
+sff_cpld_reg.addr_6_8=0x00030030
+sff_cpld_reg.len_6_8=1
+sff_cpld_reg.bit_offset_6_8=5
+
+sff_cpld_reg.mode_7_8=config
+sff_cpld_reg.src_7_8=cpld
+sff_cpld_reg.frmt_7_8=bit
+sff_cpld_reg.pola_7_8=negative
+sff_cpld_reg.addr_7_8=0x00030030
+sff_cpld_reg.len_7_8=1
+sff_cpld_reg.bit_offset_7_8=6
+
+sff_cpld_reg.mode_8_8=config
+sff_cpld_reg.src_8_8=cpld
+sff_cpld_reg.frmt_8_8=bit
+sff_cpld_reg.pola_8_8=negative
+sff_cpld_reg.addr_8_8=0x00030030
+sff_cpld_reg.len_8_8=1
+sff_cpld_reg.bit_offset_8_8=7
+
+sff_cpld_reg.mode_9_8=config
+sff_cpld_reg.src_9_8=cpld
+sff_cpld_reg.frmt_9_8=bit
+sff_cpld_reg.pola_9_8=negative
+sff_cpld_reg.addr_9_8=0x00030031
+sff_cpld_reg.len_9_8=1
+sff_cpld_reg.bit_offset_9_8=0
+
+sff_cpld_reg.mode_10_8=config
+sff_cpld_reg.src_10_8=cpld
+sff_cpld_reg.frmt_10_8=bit
+sff_cpld_reg.pola_10_8=negative
+sff_cpld_reg.addr_10_8=0x00030031
+sff_cpld_reg.len_10_8=1
+sff_cpld_reg.bit_offset_10_8=1
+
+sff_cpld_reg.mode_11_8=config
+sff_cpld_reg.src_11_8=cpld
+sff_cpld_reg.frmt_11_8=bit
+sff_cpld_reg.pola_11_8=negative
+sff_cpld_reg.addr_11_8=0x00030031
+sff_cpld_reg.len_11_8=1
+sff_cpld_reg.bit_offset_11_8=2
+
+sff_cpld_reg.mode_12_8=config
+sff_cpld_reg.src_12_8=cpld
+sff_cpld_reg.frmt_12_8=bit
+sff_cpld_reg.pola_12_8=negative
+sff_cpld_reg.addr_12_8=0x00030031
+sff_cpld_reg.len_12_8=1
+sff_cpld_reg.bit_offset_12_8=3
+
+sff_cpld_reg.mode_13_8=config
+sff_cpld_reg.src_13_8=cpld
+sff_cpld_reg.frmt_13_8=bit
+sff_cpld_reg.pola_13_8=negative
+sff_cpld_reg.addr_13_8=0x00030031
+sff_cpld_reg.len_13_8=1
+sff_cpld_reg.bit_offset_13_8=4
+
+sff_cpld_reg.mode_14_8=config
+sff_cpld_reg.src_14_8=cpld
+sff_cpld_reg.frmt_14_8=bit
+sff_cpld_reg.pola_14_8=negative
+sff_cpld_reg.addr_14_8=0x00030031
+sff_cpld_reg.len_14_8=1
+sff_cpld_reg.bit_offset_14_8=5
+
+sff_cpld_reg.mode_15_8=config
+sff_cpld_reg.src_15_8=cpld
+sff_cpld_reg.frmt_15_8=bit
+sff_cpld_reg.pola_15_8=negative
+sff_cpld_reg.addr_15_8=0x00030031
+sff_cpld_reg.len_15_8=1
+sff_cpld_reg.bit_offset_15_8=6
+
+sff_cpld_reg.mode_16_8=config
+sff_cpld_reg.src_16_8=cpld
+sff_cpld_reg.frmt_16_8=bit
+sff_cpld_reg.pola_16_8=negative
+sff_cpld_reg.addr_16_8=0x00030031
+sff_cpld_reg.len_16_8=1
+sff_cpld_reg.bit_offset_16_8=7
+
+sff_cpld_reg.mode_17_8=config
+sff_cpld_reg.src_17_8=cpld
+sff_cpld_reg.frmt_17_8=bit
+sff_cpld_reg.pola_17_8=negative
+sff_cpld_reg.addr_17_8=0x00030032
+sff_cpld_reg.len_17_8=1
+sff_cpld_reg.bit_offset_17_8=0
+
+sff_cpld_reg.mode_18_8=config
+sff_cpld_reg.src_18_8=cpld
+sff_cpld_reg.frmt_18_8=bit
+sff_cpld_reg.pola_18_8=negative
+sff_cpld_reg.addr_18_8=0x00030032
+sff_cpld_reg.len_18_8=1
+sff_cpld_reg.bit_offset_18_8=1
+
+sff_cpld_reg.mode_19_8=config
+sff_cpld_reg.src_19_8=cpld
+sff_cpld_reg.frmt_19_8=bit
+sff_cpld_reg.pola_19_8=negative
+sff_cpld_reg.addr_19_8=0x00030032
+sff_cpld_reg.len_19_8=1
+sff_cpld_reg.bit_offset_19_8=2
+
+sff_cpld_reg.mode_20_8=config
+sff_cpld_reg.src_20_8=cpld
+sff_cpld_reg.frmt_20_8=bit
+sff_cpld_reg.pola_20_8=negative
+sff_cpld_reg.addr_20_8=0x00030032
+sff_cpld_reg.len_20_8=1
+sff_cpld_reg.bit_offset_20_8=3
+
+sff_cpld_reg.mode_21_8=config
+sff_cpld_reg.src_21_8=cpld
+sff_cpld_reg.frmt_21_8=bit
+sff_cpld_reg.pola_21_8=negative
+sff_cpld_reg.addr_21_8=0x00030032
+sff_cpld_reg.len_21_8=1
+sff_cpld_reg.bit_offset_21_8=4
+
+sff_cpld_reg.mode_22_8=config
+sff_cpld_reg.src_22_8=cpld
+sff_cpld_reg.frmt_22_8=bit
+sff_cpld_reg.pola_22_8=negative
+sff_cpld_reg.addr_22_8=0x00030032
+sff_cpld_reg.len_22_8=1
+sff_cpld_reg.bit_offset_22_8=5
+
+sff_cpld_reg.mode_23_8=config
+sff_cpld_reg.src_23_8=cpld
+sff_cpld_reg.frmt_23_8=bit
+sff_cpld_reg.pola_23_8=negative
+sff_cpld_reg.addr_23_8=0x00030032
+sff_cpld_reg.len_23_8=1
+sff_cpld_reg.bit_offset_23_8=6
+
+sff_cpld_reg.mode_24_8=config
+sff_cpld_reg.src_24_8=cpld
+sff_cpld_reg.frmt_24_8=bit
+sff_cpld_reg.pola_24_8=negative
+sff_cpld_reg.addr_24_8=0x00030032
+sff_cpld_reg.len_24_8=1
+sff_cpld_reg.bit_offset_24_8=7
+
+sff_cpld_reg.mode_25_8=config
+sff_cpld_reg.src_25_8=cpld
+sff_cpld_reg.frmt_25_8=bit
+sff_cpld_reg.pola_25_8=negative
+sff_cpld_reg.addr_25_8=0x00040030
+sff_cpld_reg.len_25_8=1
+sff_cpld_reg.bit_offset_25_8=0
+
+sff_cpld_reg.mode_26_8=config
+sff_cpld_reg.src_26_8=cpld
+sff_cpld_reg.frmt_26_8=bit
+sff_cpld_reg.pola_26_8=negative
+sff_cpld_reg.addr_26_8=0x00040030
+sff_cpld_reg.len_26_8=1
+sff_cpld_reg.bit_offset_26_8=1
+
+sff_cpld_reg.mode_27_8=config
+sff_cpld_reg.src_27_8=cpld
+sff_cpld_reg.frmt_27_8=bit
+sff_cpld_reg.pola_27_8=negative
+sff_cpld_reg.addr_27_8=0x00040030
+sff_cpld_reg.len_27_8=1
+sff_cpld_reg.bit_offset_27_8=2
+
+sff_cpld_reg.mode_28_8=config
+sff_cpld_reg.src_28_8=cpld
+sff_cpld_reg.frmt_28_8=bit
+sff_cpld_reg.pola_28_8=negative
+sff_cpld_reg.addr_28_8=0x00040030
+sff_cpld_reg.len_28_8=1
+sff_cpld_reg.bit_offset_28_8=3
+
+sff_cpld_reg.mode_29_8=config
+sff_cpld_reg.src_29_8=cpld
+sff_cpld_reg.frmt_29_8=bit
+sff_cpld_reg.pola_29_8=negative
+sff_cpld_reg.addr_29_8=0x00040030
+sff_cpld_reg.len_29_8=1
+sff_cpld_reg.bit_offset_29_8=4
+
+sff_cpld_reg.mode_30_8=config
+sff_cpld_reg.src_30_8=cpld
+sff_cpld_reg.frmt_30_8=bit
+sff_cpld_reg.pola_30_8=negative
+sff_cpld_reg.addr_30_8=0x00040030
+sff_cpld_reg.len_30_8=1
+sff_cpld_reg.bit_offset_30_8=5
+
+sff_cpld_reg.mode_31_8=config
+sff_cpld_reg.src_31_8=cpld
+sff_cpld_reg.frmt_31_8=bit
+sff_cpld_reg.pola_31_8=negative
+sff_cpld_reg.addr_31_8=0x00040030
+sff_cpld_reg.len_31_8=1
+sff_cpld_reg.bit_offset_31_8=6
+
+sff_cpld_reg.mode_32_8=config
+sff_cpld_reg.src_32_8=cpld
+sff_cpld_reg.frmt_32_8=bit
+sff_cpld_reg.pola_32_8=negative
+sff_cpld_reg.addr_32_8=0x00040030
+sff_cpld_reg.len_32_8=1
+sff_cpld_reg.bit_offset_32_8=7
+
+sff_cpld_reg.mode_33_8=config
+sff_cpld_reg.src_33_8=cpld
+sff_cpld_reg.frmt_33_8=bit
+sff_cpld_reg.pola_33_8=negative
+sff_cpld_reg.addr_33_8=0x00040031
+sff_cpld_reg.len_33_8=1
+sff_cpld_reg.bit_offset_33_8=0
+
+sff_cpld_reg.mode_34_8=config
+sff_cpld_reg.src_34_8=cpld
+sff_cpld_reg.frmt_34_8=bit
+sff_cpld_reg.pola_34_8=negative
+sff_cpld_reg.addr_34_8=0x00040031
+sff_cpld_reg.len_34_8=1
+sff_cpld_reg.bit_offset_34_8=1
+
+sff_cpld_reg.mode_35_8=config
+sff_cpld_reg.src_35_8=cpld
+sff_cpld_reg.frmt_35_8=bit
+sff_cpld_reg.pola_35_8=negative
+sff_cpld_reg.addr_35_8=0x00040031
+sff_cpld_reg.len_35_8=1
+sff_cpld_reg.bit_offset_35_8=2
+
+sff_cpld_reg.mode_36_8=config
+sff_cpld_reg.src_36_8=cpld
+sff_cpld_reg.frmt_36_8=bit
+sff_cpld_reg.pola_36_8=negative
+sff_cpld_reg.addr_36_8=0x00040031
+sff_cpld_reg.len_36_8=1
+sff_cpld_reg.bit_offset_36_8=3
+
+sff_cpld_reg.mode_37_8=config
+sff_cpld_reg.src_37_8=cpld
+sff_cpld_reg.frmt_37_8=bit
+sff_cpld_reg.pola_37_8=negative
+sff_cpld_reg.addr_37_8=0x00040031
+sff_cpld_reg.len_37_8=1
+sff_cpld_reg.bit_offset_37_8=4
+
+sff_cpld_reg.mode_38_8=config
+sff_cpld_reg.src_38_8=cpld
+sff_cpld_reg.frmt_38_8=bit
+sff_cpld_reg.pola_38_8=negative
+sff_cpld_reg.addr_38_8=0x00040031
+sff_cpld_reg.len_38_8=1
+sff_cpld_reg.bit_offset_38_8=5
+
+sff_cpld_reg.mode_39_8=config
+sff_cpld_reg.src_39_8=cpld
+sff_cpld_reg.frmt_39_8=bit
+sff_cpld_reg.pola_39_8=negative
+sff_cpld_reg.addr_39_8=0x00040031
+sff_cpld_reg.len_39_8=1
+sff_cpld_reg.bit_offset_39_8=6
+
+sff_cpld_reg.mode_40_8=config
+sff_cpld_reg.src_40_8=cpld
+sff_cpld_reg.frmt_40_8=bit
+sff_cpld_reg.pola_40_8=negative
+sff_cpld_reg.addr_40_8=0x00040031
+sff_cpld_reg.len_40_8=1
+sff_cpld_reg.bit_offset_40_8=7
+
+sff_cpld_reg.mode_41_8=config
+sff_cpld_reg.src_41_8=cpld
+sff_cpld_reg.frmt_41_8=bit
+sff_cpld_reg.pola_41_8=negative
+sff_cpld_reg.addr_41_8=0x00040032
+sff_cpld_reg.len_41_8=1
+sff_cpld_reg.bit_offset_41_8=0
+
+sff_cpld_reg.mode_42_8=config
+sff_cpld_reg.src_42_8=cpld
+sff_cpld_reg.frmt_42_8=bit
+sff_cpld_reg.pola_42_8=negative
+sff_cpld_reg.addr_42_8=0x00040032
+sff_cpld_reg.len_42_8=1
+sff_cpld_reg.bit_offset_42_8=1
+
+sff_cpld_reg.mode_43_8=config
+sff_cpld_reg.src_43_8=cpld
+sff_cpld_reg.frmt_43_8=bit
+sff_cpld_reg.pola_43_8=negative
+sff_cpld_reg.addr_43_8=0x00040032
+sff_cpld_reg.len_43_8=1
+sff_cpld_reg.bit_offset_43_8=2
+
+sff_cpld_reg.mode_44_8=config
+sff_cpld_reg.src_44_8=cpld
+sff_cpld_reg.frmt_44_8=bit
+sff_cpld_reg.pola_44_8=negative
+sff_cpld_reg.addr_44_8=0x00040032
+sff_cpld_reg.len_44_8=1
+sff_cpld_reg.bit_offset_44_8=3
+
+sff_cpld_reg.mode_45_8=config
+sff_cpld_reg.src_45_8=cpld
+sff_cpld_reg.frmt_45_8=bit
+sff_cpld_reg.pola_45_8=negative
+sff_cpld_reg.addr_45_8=0x00040032
+sff_cpld_reg.len_45_8=1
+sff_cpld_reg.bit_offset_45_8=4
+
+sff_cpld_reg.mode_46_8=config
+sff_cpld_reg.src_46_8=cpld
+sff_cpld_reg.frmt_46_8=bit
+sff_cpld_reg.pola_46_8=negative
+sff_cpld_reg.addr_46_8=0x00040032
+sff_cpld_reg.len_46_8=1
+sff_cpld_reg.bit_offset_46_8=5
+
+sff_cpld_reg.mode_47_8=config
+sff_cpld_reg.src_47_8=cpld
+sff_cpld_reg.frmt_47_8=bit
+sff_cpld_reg.pola_47_8=negative
+sff_cpld_reg.addr_47_8=0x00040032
+sff_cpld_reg.len_47_8=1
+sff_cpld_reg.bit_offset_47_8=6
+
+sff_cpld_reg.mode_48_8=config
+sff_cpld_reg.src_48_8=cpld
+sff_cpld_reg.frmt_48_8=bit
+sff_cpld_reg.pola_48_8=negative
+sff_cpld_reg.addr_48_8=0x00040032
+sff_cpld_reg.len_48_8=1
+sff_cpld_reg.bit_offset_48_8=7
+
+sff_cpld_reg.mode_49_8=config
+sff_cpld_reg.src_49_8=cpld
+sff_cpld_reg.frmt_49_8=bit
+sff_cpld_reg.pola_49_8=negative
+sff_cpld_reg.addr_49_8=0x00040033
+sff_cpld_reg.len_49_8=1
+sff_cpld_reg.bit_offset_49_8=0
+
+sff_cpld_reg.mode_50_8=config
+sff_cpld_reg.src_50_8=cpld
+sff_cpld_reg.frmt_50_8=bit
+sff_cpld_reg.pola_50_8=negative
+sff_cpld_reg.addr_50_8=0x00040033
+sff_cpld_reg.len_50_8=1
+sff_cpld_reg.bit_offset_50_8=1
+
+sff_cpld_reg.mode_51_8=config
+sff_cpld_reg.src_51_8=cpld
+sff_cpld_reg.frmt_51_8=bit
+sff_cpld_reg.pola_51_8=negative
+sff_cpld_reg.addr_51_8=0x00040033
+sff_cpld_reg.len_51_8=1
+sff_cpld_reg.bit_offset_51_8=2
+
+sff_cpld_reg.mode_52_8=config
+sff_cpld_reg.src_52_8=cpld
+sff_cpld_reg.frmt_52_8=bit
+sff_cpld_reg.pola_52_8=negative
+sff_cpld_reg.addr_52_8=0x00040033
+sff_cpld_reg.len_52_8=1
+sff_cpld_reg.bit_offset_52_8=3
+
+sff_cpld_reg.mode_53_8=config
+sff_cpld_reg.src_53_8=cpld
+sff_cpld_reg.frmt_53_8=bit
+sff_cpld_reg.pola_53_8=negative
+sff_cpld_reg.addr_53_8=0x00040033
+sff_cpld_reg.len_53_8=1
+sff_cpld_reg.bit_offset_53_8=4
+
+sff_cpld_reg.mode_54_8=config
+sff_cpld_reg.src_54_8=cpld
+sff_cpld_reg.frmt_54_8=bit
+sff_cpld_reg.pola_54_8=negative
+sff_cpld_reg.addr_54_8=0x00040033
+sff_cpld_reg.len_54_8=1
+sff_cpld_reg.bit_offset_54_8=5
+
+sff_cpld_reg.mode_55_8=config
+sff_cpld_reg.src_55_8=cpld
+sff_cpld_reg.frmt_55_8=bit
+sff_cpld_reg.pola_55_8=negative
+sff_cpld_reg.addr_55_8=0x00040033
+sff_cpld_reg.len_55_8=1
+sff_cpld_reg.bit_offset_55_8=6
+
+sff_cpld_reg.mode_56_8=config
+sff_cpld_reg.src_56_8=cpld
+sff_cpld_reg.frmt_56_8=bit
+sff_cpld_reg.pola_56_8=negative
+sff_cpld_reg.addr_56_8=0x00040033
+sff_cpld_reg.len_56_8=1
+sff_cpld_reg.bit_offset_56_8=7
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/cfg_file_name b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/cfg_file_name
new file mode 100644
index 000000000000..5f49420441a5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/plat_sysfs_cfg/cfg_file_name
@@ -0,0 +1,4 @@
+WB_PLAT_CPLD
+WB_PLAT_FAN
+WB_PLAT_PSU
+WB_PLAT_SFF
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/setup.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/setup.py
new file mode 100644
index 000000000000..6c3916921abb
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/setup.py
@@ -0,0 +1,39 @@
+from setuptools import setup
+
+setup(
+    name='sonic-platform',
+    version='1.0',
+    description='SONiC platform API implementation',
+    license='Apache 2.0',
+    author='SONiC Team',
+    author_email='support',
+    url='',
+    maintainer='support',
+    maintainer_email='',
+    packages=[
+        'sonic_platform',
+        'plat_hal',
+        'wbutil',
+        'eepromutil',
+        'hal-config',
+        'config',
+    ],
+    py_modules=[
+        'hal_pltfm',
+        'platform_util',
+        'platform_intf',
+    ],
+    classifiers=[
+        'Development Status :: 3 - Alpha',
+        'Environment :: Plugins',
+        'Intended Audience :: Developers',
+        'Intended Audience :: Information Technology',
+        'Intended Audience :: System Administrators',
+        'License :: OSI Approved :: Apache Software License',
+        'Natural Language :: English',
+        'Operating System :: POSIX :: Linux',
+        'Programming Language :: Python :: 3.7',
+        'Topic :: Utilities',
+    ],
+    keywords='sonic SONiC platform PLATFORM',
+)
diff --git a/src/sonic-device-data/tests/permitted_list b/src/sonic-device-data/tests/permitted_list
index 82c92126e6bc..854bca27baff 100644
--- a/src/sonic-device-data/tests/permitted_list
+++ b/src/sonic-device-data/tests/permitted_list
@@ -333,3 +333,13 @@ cmic_dma_abort_in_cold_boot
 hybrid_pfc_deadlock_enable
 sai_pfc_dlr_init_capability
 appl_param_nof_ports_per_modid
+svi_my_station_optimization
+warmboot_knet_shutdown_mode
+sai_fdb_entry_l2_discard_src_enable
+sai_pfc_defaults_disable
+sai_fdb_entry_l2_discard_src_enable
+svi_my_station_optimization
+sai_nbr_bcast_ifp_optimized
+sai_pfc_defaults_disable
+sai_optimized_mmu
+warmboot_knet_shutdown_mode

From c91fe11b73767edf9b88a5ceebbe8b3e9383c016 Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Tue, 18 Jul 2023 14:44:02 +0800
Subject: [PATCH 02/32] fix compile error

Signed-off-by: philo <philo@micasnetworks.com>
---
 src/sonic-device-data/tests/permitted_list | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/sonic-device-data/tests/permitted_list b/src/sonic-device-data/tests/permitted_list
index 854bca27baff..719b6788d9c0 100644
--- a/src/sonic-device-data/tests/permitted_list
+++ b/src/sonic-device-data/tests/permitted_list
@@ -342,4 +342,4 @@ svi_my_station_optimization
 sai_nbr_bcast_ifp_optimized
 sai_pfc_defaults_disable
 sai_optimized_mmu
-warmboot_knet_shutdown_mode
+sai_stats_support_mask

From 4ce78fc4014f1af7f5dc3ef75f94493469ec4f82 Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Wed, 19 Jul 2023 08:35:03 +0800
Subject: [PATCH 03/32] fix compile error

Signed-off-by: philo <philo@micasnetworks.com>
---
 platform/broadcom/platform-modules-micas.mk   | 40 -------------------
 .../debian/control                            | 20 ----------
 ...latform-modules-micas-m2-w6510-32c.install |  1 -
 ...atform-modules-micas-m2-w6510-32c.postinst | 10 -----
 ...orm-modules-micas-m2-w6520-24dc8qc.install |  1 -
 ...rm-modules-micas-m2-w6520-24dc8qc.postinst | 10 -----
 ...latform-modules-micas-m2-w6910-64c.install |  1 -
 ...atform-modules-micas-m2-w6910-64c.postinst | 10 -----
 ...platform-modules-micas-m2-w6920-4s.install |  1 -
 ...latform-modules-micas-m2-w6920-4s.postinst | 10 -----
 ...atform-modules-micas-m2-w6930-64qc.install |  1 -
 ...tform-modules-micas-m2-w6930-64qc.postinst | 10 -----
 12 files changed, 115 deletions(-)
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.install
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.postinst
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.install
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.postinst
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6910-64c.install
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6910-64c.postinst
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-4s.install
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-4s.postinst
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.install
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.postinst

diff --git a/platform/broadcom/platform-modules-micas.mk b/platform/broadcom/platform-modules-micas.mk
index eaed816cd469..7f2a95cade55 100644
--- a/platform/broadcom/platform-modules-micas.mk
+++ b/platform/broadcom/platform-modules-micas.mk
@@ -8,43 +8,3 @@ $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEAD
 $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6510-48v8c-r0
 SONIC_DPKG_DEBS += $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)
 SONIC_STRETCH_DEBS += $(MICAS_M2_W6510_48V8C_PLATFORM_MODULE)
-
-## M2-W6910-64C
-MICAS_M2_W6910_64C_PLATFORM_MODULE_VERSION = 1.0
-export MICAS_M2_W6910_64C_PLATFORM_MODULE_VERSION
-
-MICAS_M2_W6910_64C_PLATFORM_MODULE = platform-modules-micas-m2-w6910-64c_$(MICAS_M2_W6910_64C_PLATFORM_MODULE_VERSION)_amd64.deb
-$(MICAS_M2_W6910_64C_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6910-64c-r0
-$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6910_64C_PLATFORM_MODULE)))
-
-## M2-W6510-32C
-MICAS_M2_W6510_32C_PLATFORM_MODULE_VERSION = 1.0
-export MICAS_M2_W6510_32C_PLATFORM_MODULE_VERSION
-
-MICAS_M2_W6510_32C_PLATFORM_MODULE = platform-modules-micas-m2-w6510-32c_$(MICAS_M2_W6510_32C_PLATFORM_MODULE_VERSION)_amd64.deb
-$(MICAS_M2_W6510_32C_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6510-32c-r0
-$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6510_32C_PLATFORM_MODULE)))
-
-## M2-W6920-4s
-MICAS_M2_W6920_4S_PLATFORM_MODULE_VERSION = 1.0
-export MICAS_M2_W6920_4S_PLATFORM_MODULE_VERSION
-
-MICAS_M2_W6920_4S_PLATFORM_MODULE = platform-modules-micas-m2-w6920-4s_$(MICAS_M2_W6920_4S_PLATFORM_MODULE_VERSION)_amd64.deb
-$(MICAS_M2_W6920_4S_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6920-4s-r0
-$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6920_4S_PLATFORM_MODULE)))
-
-## M2-W6520-24DC8QC
-MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE_VERSION = 1.0
-export MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE_VERSION
-
-MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE = platform-modules-micas-m2-w6520-24dc8qc_$(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE_VERSION)_amd64.deb
-$(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6520-24dc8qc-r0
-$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6520_24DC8QC_PLATFORM_MODULE)))
-
-## M2-W6930-64QC
-MICAS_M2_W6930_64QC_PLATFORM_MODULE_VERSION = 1.0
-export MICAS_M2_W6930_64QC_PLATFORM_MODULE_VERSION
-
-MICAS_M2_W6930_64QC_PLATFORM_MODULE = platform-modules-micas-m2-w6930-64qc_$(MICAS_M2_W6930_64QC_PLATFORM_MODULE_VERSION)_amd64.deb
-$(MICAS_M2_W6930_64QC_PLATFORM_MODULE)_PLATFORM = x86_64-micas_m2-w6930-64qc-r0
-$(eval $(call add_extra_package,$(MICAS_M2_W6510_48V8C_PLATFORM_MODULE),$(MICAS_M2_W6930_64QC_PLATFORM_MODULE)))
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/control b/platform/broadcom/sonic-platform-modules-micas/debian/control
index edb2c002f6ad..55b5837776d5 100644
--- a/platform/broadcom/sonic-platform-modules-micas/debian/control
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/control
@@ -7,23 +7,3 @@ Standards-Version: 3.9.3
 Package: platform-modules-micas-m2-w6510-48v8c
 Architecture: amd64
 Description: kernel modules for platform devices such as fan, led, sfp
-
-Package: platform-modules-micas-m2-w6510-32c
-Architecture: amd64
-Description: kernel modules for platform devices such as fan, led, sfp
-
-Package: platform-modules-micas-m2-w6910-64c
-Architecture: amd64
-Description: kernel modules for platform devices such as fan, led, sfp
-
-Package: platform-modules-micas-m2-w6920-4s
-Architecture: amd64
-Description: kernel modules for platform devices such as fan, led, sfp
-
-Package: platform-modules-micas-m2-w6520-24dc8qc
-Architecture: amd64
-Description: kernel modules for platform devices such as fan, led, sfp
-
-Package: platform-modules-micas-m2-w6930-64qc
-Architecture: amd64
-Description: kernel modules for platform devices such as fan, led, sfp
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.install
deleted file mode 100644
index ae2477cf1148..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.install
+++ /dev/null
@@ -1 +0,0 @@
-m2-w6510-32c/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6510-32c-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.postinst
deleted file mode 100644
index a8132f4f65a9..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6510-32c.postinst
+++ /dev/null
@@ -1,10 +0,0 @@
-#!/bin/sh
-# postinst
-
-kernel_version=$(uname -r)
-
-if [ -e /boot/System.map-${kernel_version} ]; then
-    depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
-fi
-
-#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.install
deleted file mode 100644
index 3a94db8f4428..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.install
+++ /dev/null
@@ -1 +0,0 @@
-m2-w6520-24dc8qc/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6520-24dc8qc-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.postinst
deleted file mode 100644
index a8132f4f65a9..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6520-24dc8qc.postinst
+++ /dev/null
@@ -1,10 +0,0 @@
-#!/bin/sh
-# postinst
-
-kernel_version=$(uname -r)
-
-if [ -e /boot/System.map-${kernel_version} ]; then
-    depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
-fi
-
-#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6910-64c.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6910-64c.install
deleted file mode 100644
index f813226c209b..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6910-64c.install
+++ /dev/null
@@ -1 +0,0 @@
-m2-w6910-64c/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6910-64c-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6910-64c.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6910-64c.postinst
deleted file mode 100644
index a8132f4f65a9..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6910-64c.postinst
+++ /dev/null
@@ -1,10 +0,0 @@
-#!/bin/sh
-# postinst
-
-kernel_version=$(uname -r)
-
-if [ -e /boot/System.map-${kernel_version} ]; then
-    depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
-fi
-
-#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-4s.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-4s.install
deleted file mode 100644
index 4c6c156343bd..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-4s.install
+++ /dev/null
@@ -1 +0,0 @@
-m2-w6920-4s/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6920-4s-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-4s.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-4s.postinst
deleted file mode 100644
index a8132f4f65a9..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6920-4s.postinst
+++ /dev/null
@@ -1,10 +0,0 @@
-#!/bin/sh
-# postinst
-
-kernel_version=$(uname -r)
-
-if [ -e /boot/System.map-${kernel_version} ]; then
-    depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
-fi
-
-#DEBHELPER#
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.install b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.install
deleted file mode 100644
index f6e2060d2d11..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.install
+++ /dev/null
@@ -1 +0,0 @@
-m2-w6930-64qc/modules/sonic_platform-1.0-py3-none-any.whl /usr/share/sonic/device/x86_64-micas_m2-w6930-64qc-r0
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.postinst b/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.postinst
deleted file mode 100644
index a8132f4f65a9..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/debian/platform-modules-micas-m2-w6930-64qc.postinst
+++ /dev/null
@@ -1,10 +0,0 @@
-#!/bin/sh
-# postinst
-
-kernel_version=$(uname -r)
-
-if [ -e /boot/System.map-${kernel_version} ]; then
-    depmod -a -F /boot/System.map-${kernel_version} ${kernel_version} || true
-fi
-
-#DEBHELPER#

From 6af64de2c4150c1ce36250e1ad925418fbedb244 Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Wed, 19 Jul 2023 14:04:51 +0800
Subject: [PATCH 04/32] fix code stytle for review

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../media_settings.json                       | 2020 +++++++++++++++++
 .../modules/plat_sysfs/dev_sysfs/plat_fan.c   |    4 -
 .../modules/plat_sysfs/dev_sysfs/plat_psu.c   |    4 -
 .../plat_sysfs/dev_sysfs/plat_sensor.c        |    5 -
 .../modules/plat_sysfs/dev_sysfs/plat_sff.c   |    4 -
 .../modules/plat_sysfs/dev_sysfs/plat_slot.c  |    4 -
 .../plat_sysfs/dev_sysfs/plat_switch.c        |    4 -
 .../common/modules/platform_common_module.c   |   22 +-
 .../driver/wb_firmware_upgrade_device.c       |    4 -
 9 files changed, 2031 insertions(+), 40 deletions(-)
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/media_settings.json

diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/media_settings.json b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/media_settings.json
new file mode 100644
index 000000000000..e848307fd9bf
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/media_settings.json
@@ -0,0 +1,2020 @@
+{
+    "PORT_MEDIA_SETTINGS": {
+        "49": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000C",
+                    "lane1": "0x0000000C",
+                    "lane2": "0x0000000C",
+                    "lane3": "0x0000000C"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000D",
+                    "lane1": "0x0000000D",
+                    "lane2": "0x0000000D",
+                    "lane3": "0x0000000D"
+                }
+            },
+            "QSFP+-": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003C",
+                    "lane1": "0x0000003C",
+                    "lane2": "0x0000003C",
+                    "lane3": "0x0000003C"
+                },
+                "post1": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                }
+            }
+        },
+        "50": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000C",
+                    "lane1": "0x0000000C",
+                    "lane2": "0x0000000C",
+                    "lane3": "0x0000000C"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000D",
+                    "lane1": "0x0000000D",
+                    "lane2": "0x0000000D",
+                    "lane3": "0x0000000D"
+                }
+            },
+            "QSFP+-": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003C",
+                    "lane1": "0x0000003C",
+                    "lane2": "0x0000003C",
+                    "lane3": "0x0000003C"
+                },
+                "post1": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000004",
+                    "lane2": "0x00000004",
+                    "lane3": "0x00000004"
+                }
+            }
+        },
+        "51": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000C",
+                    "lane1": "0x0000000C",
+                    "lane2": "0x0000000C",
+                    "lane3": "0x0000000C"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000D",
+                    "lane1": "0x0000000D",
+                    "lane2": "0x0000000D",
+                    "lane3": "0x0000000D"
+                }
+            },
+            "QSFP+-": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003C",
+                    "lane1": "0x0000003C",
+                    "lane2": "0x0000003C",
+                    "lane3": "0x0000003C"
+                },
+                "post1": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000006",
+                    "lane2": "0x00000006",
+                    "lane3": "0x00000004"
+                }
+            }
+        },
+        "52": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000C",
+                    "lane1": "0x0000000C",
+                    "lane2": "0x0000000C",
+                    "lane3": "0x0000000C"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000D",
+                    "lane1": "0x0000000D",
+                    "lane2": "0x0000000D",
+                    "lane3": "0x0000000D"
+                }
+            },
+            "QSFP+-": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003C",
+                    "lane1": "0x0000003C",
+                    "lane2": "0x0000003C",
+                    "lane3": "0x0000003C"
+                },
+                "post1": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000005",
+                    "lane2": "0x00000005",
+                    "lane3": "0x00000005"
+                }
+            }
+        },
+        "53": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000C",
+                    "lane1": "0x0000000C",
+                    "lane2": "0x0000000C",
+                    "lane3": "0x0000000C"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000D",
+                    "lane1": "0x0000000D",
+                    "lane2": "0x0000000D",
+                    "lane3": "0x0000000D"
+                }
+            },
+            "QSFP+-": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003C",
+                    "lane1": "0x0000003C",
+                    "lane2": "0x0000003C",
+                    "lane3": "0x0000003C"
+                },
+                "post1": {
+                    "lane0": "0x00000004",
+                    "lane1": "0x00000006",
+                    "lane2": "0x00000006",
+                    "lane3": "0x00000006"
+                }
+            }
+        },
+        "54": {
+            "Default": {
+                "pre1": {
+                    "lane0": "0x0000000C",
+                    "lane1": "0x0000000C",
+                    "lane2": "0x0000000C",
+                    "lane3": "0x0000000C"
+                },
+                "main": {
+                    "lane0": "0x0000004B",
+                    "lane1": "0x0000004B",
+                    "lane2": "0x0000004B",
+                    "lane3": "0x0000004B"
+                },
+                "post1": {
+                    "lane0": "0x0000000D",
+                    "lane1": "0x0000000D",
+                    "lane2": "0x0000000D",
+                    "lane3": "0x0000000D"
+                }
+            },
+            "QSFP+-": {
+                "pre1": {
+                    "lane0": "0x00000000",
+                    "lane1": "0x00000000",
+                    "lane2": "0x00000000",
+                    "lane3": "0x00000000"
+                },
+                "main": {
+                    "lane0": "0x0000003C",
+                    "lane1": "0x0000003C",
+                    "lane2": "0x0000003C",
+                    "lane3": "0x0000003C"
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\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_fan.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_fan.c
index d841f2547b6f..931c7c243a21 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_fan.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_fan.c
@@ -1,12 +1,8 @@
 /*
  * plat_fan.c
- * Original Author: support  2020-02-17
  *
  * This module create fan kobjects and attributes in /sys/wb_plat/fan
  *
- * History
- *  [Version]        [Author]                   [Date]            [Description]
- *   *  v1.0          support                  2020-02-17          Initial version
  */
 
 #include <linux/slab.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_psu.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_psu.c
index af3b414314ff..197f94b64991 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_psu.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_psu.c
@@ -1,12 +1,8 @@
 /*
  * plat_psu.c
- * Original Author: support 2020-02-17
  *
  * This module create psu kobjects and attributes in /sys/wb_plat/psu
  *
- * History
- *  [Version]        [Author]                   [Date]            [Description]
- *   *  v1.0          support                 2020-02-17          Initial version
  */
 
 #include <linux/slab.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sensor.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sensor.c
index 04b764e82df9..aaf62f4c1a3c 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sensor.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sensor.c
@@ -1,12 +1,7 @@
 /*
  * plat_sensor.c
- * Original Author: support 2020-02-17
  *
  * This module create sensor kobjects and attributes in /sys/wb_plat/sensor
- *
- * History
- *  [Version]        [Author]                   [Date]            [Description]
- *   *  v1.0          support                 2020-02-17          Initial version
  */
 
 #include <linux/slab.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sff.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sff.c
index 8f09c551f62c..50c0f78aede9 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sff.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_sff.c
@@ -1,12 +1,8 @@
 /*
  * plat_sff.c
- * Original Author: support 2020-02-17
  *
  * This module create sff kobjects and attributes in /sys/wb_plat/sff
  *
- * History
- *  [Version]        [Author]                   [Date]            [Description]
- *   *  v1.0         support                  2020-02-17         Initial version
  */
 
 #include <linux/slab.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_slot.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_slot.c
index 97539a4c24cc..7c50f283bd06 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_slot.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_slot.c
@@ -1,12 +1,8 @@
 /*
  * plat_slot.c
- * Original Author: support 2020-02-17
  *
  * This module create sff kobjects and attributes in /sys/wb_plat/slot
  *
- * History
- *  [Version]        [Author]                   [Date]            [Description]
- *   *  v1.0         support                  2020-02-17         Initial version
  */
 
 #include <linux/slab.h>
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_switch.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_switch.c
index 7c71fdb3bd62..9563260f32b4 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_switch.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_switch.c
@@ -1,14 +1,10 @@
 /*
  * plat_switch.c
- * Original Author: support 2020-02-17
  *
  * This module create a kset in sysfs called /sys/wb_plat
  * Then other switch kobjects are created and assigned to this kset,
  * such as "board", "cpld", "fan", "psu", "sff", ...
  *
- * History
- *  [Version]        [Author]          [Date]             [Description]
- *   *  v1.0          support         2020-02-17          Initial version
  */
 #include "./include/plat_switch.h"
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common_module.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common_module.c
index 62e04b7db837..189a3aa056b2 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common_module.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/platform_common_module.c
@@ -49,13 +49,13 @@ module_param(dfd_my_type_i2c_bus, int, S_IRUGO | S_IWUSR);
 uint32_t dfd_my_type_i2c_addr = 0;
 module_param(dfd_my_type_i2c_addr, int, S_IRUGO | S_IWUSR);
 
-#define RUJIE_COMMON_DEBUG_VERBOSE(fmt, args...) do {                                        \
+#define PLATFORM_COMMON_DEBUG_VERBOSE(fmt, args...) do {                                        \
     if (g_common_debug_verbose) { \
         printk(KERN_ERR "[PLATFORM_COMMON][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
     } \
 } while (0)
 
-#define RUJIE_COMMON_DEBUG_ERROR(fmt, args...) do {                                        \
+#define PLATFORM_COMMON_DEBUG_ERROR(fmt, args...) do {                                        \
     if (g_common_debug_error) { \
         printk(KERN_ERR "[PLATFORM_COMMON][ERROR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
     } \
@@ -75,7 +75,7 @@ buf, int32_t size)
     fp = filp_open(dev, O_RDWR, S_IRUSR | S_IWUSR);
     if (IS_ERR(fp)) {
         DBG_ERROR("i2c open fail.\n");
-        RUJIE_COMMON_DEBUG_ERROR("i2c open fail.\n");
+        PLATFORM_COMMON_DEBUG_ERROR("i2c open fail.\n");
         return -1;
     }
     memcpy(&client, fp->private_data, sizeof(struct i2c_client));
@@ -122,12 +122,12 @@ static int dfd_tlvinfo_get_cardtype(void)
         i2c_dev.addr = DFD_TLVEEPROM_I2C_ADDR;
     }
     snprintf(i2c_path, sizeof(i2c_path), "/dev/i2c-%d", i2c_dev.bus);
-    RUJIE_COMMON_DEBUG_VERBOSE("Read device eeprom info:(dev:%s, addr:%02x).\n", i2c_path, i2c_dev.addr);
+    PLATFORM_COMMON_DEBUG_VERBOSE("Read device eeprom info:(dev:%s, addr:%02x).\n", i2c_path, i2c_dev.addr);
 
     ret = dfd_i2c_read(i2c_path, i2c_dev.addr, 0, eeprom, DFD_E2PROM_MAX_LEN);
     if (ret != 0) {
         DBG_ERROR("Read eeprom info error(dev: %s, addr: %02x).\n", i2c_path, i2c_dev.addr);
-        RUJIE_COMMON_DEBUG_ERROR("Read eeprom info error(dev: %s, addr: %02x).\n", i2c_path, i2c_dev.addr);
+        PLATFORM_COMMON_DEBUG_ERROR("Read eeprom info error(dev: %s, addr: %02x).\n", i2c_path, i2c_dev.addr);
         return ret;
     }
 
@@ -168,11 +168,11 @@ int dfd_get_my_card_type(void)
     while (cnt--) {
         type = __dfd_get_my_card_type();
         if (type < 0) {
-            RUJIE_COMMON_DEBUG_ERROR("__dfd_get_my_card_type fail cnt %d, ret %d.\n", cnt, type);
+            PLATFORM_COMMON_DEBUG_ERROR("__dfd_get_my_card_type fail cnt %d, ret %d.\n", cnt, type);
             msleep(PLATFORM_CARDTYPE_RETRY_TIMES);
             continue;
         }
-        RUJIE_COMMON_DEBUG_VERBOSE("success to get type 0x%x.\n", type);
+        PLATFORM_COMMON_DEBUG_VERBOSE("success to get type 0x%x.\n", type);
         break;
     }
 
@@ -185,21 +185,21 @@ static int __init platform_common_init(void)
 {
     int ret;
 
-    RUJIE_COMMON_DEBUG_VERBOSE("Enter.\n");
+    PLATFORM_COMMON_DEBUG_VERBOSE("Enter.\n");
     ret = dfd_get_my_card_type();
     if (ret <= 0) {
-        RUJIE_COMMON_DEBUG_ERROR("dfd_get_my_card_type failed, ret %d.\n", ret);
+        PLATFORM_COMMON_DEBUG_ERROR("dfd_get_my_card_type failed, ret %d.\n", ret);
         printk(KERN_ERR "Warning: Device type get failed, please check the TLV-EEPROM!\n");
         return -1;
     }
 
-    RUJIE_COMMON_DEBUG_VERBOSE("Leave success type 0x%x.\n", ret);
+    PLATFORM_COMMON_DEBUG_VERBOSE("Leave success type 0x%x.\n", ret);
     return 0;
 }
 
 static void __exit platform_common_exit(void)
 {
-    RUJIE_COMMON_DEBUG_VERBOSE("Exit.\n");
+    PLATFORM_COMMON_DEBUG_VERBOSE("Exit.\n");
 }
 
 module_init(platform_common_init);
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_firmware_upgrade_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_firmware_upgrade_device.c
index 5fcaa8da1963..6dce748325a2 100644
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_firmware_upgrade_device.c
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_firmware_upgrade_device.c
@@ -1,11 +1,7 @@
 /*
  * wb_firmware_upgrade.c
- * Original Author: support  2021-03-17
  *
  * ko for firmware device
- * History
- *  [Version]        [Author]           [Date]            [Description]
- *    v1.0          support            2021-05-07          Initial version
  */
 #include <linux/module.h>
 #include <linux/io.h>

From 371525159d8e58ca29bdd8897d1fc9c9c6de596f Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Tue, 22 Aug 2023 09:39:35 +0800
Subject: [PATCH 05/32] fix semgrep

Signed-off-by: philo <philo@micasnetworks.com>
---
 device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py
index bdeaf190f099..b94d4261d460 100644
--- a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py
@@ -4,7 +4,7 @@
 #   * PSU
 #
 import os
-import xml.etree.ElementTree as ET
+from lxml import etree as ET
 import glob
 import json
 from decimal import Decimal

From 927ee905e6e19fbfd27f08110668e4cc56139d92 Mon Sep 17 00:00:00 2001
From: Philo <135693886+philo-micas@users.noreply.github.com>
Date: Tue, 5 Sep 2023 10:39:14 +0800
Subject: [PATCH 06/32] reserve semgrep fix since it will casue show env
 command fail

---
 device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py
index b94d4261d460..bdeaf190f099 100644
--- a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py
@@ -4,7 +4,7 @@
 #   * PSU
 #
 import os
-from lxml import etree as ET
+import xml.etree.ElementTree as ET
 import glob
 import json
 from decimal import Decimal

From 55fc7b7bd45c1f75563e59357a38f809459e557c Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Wed, 27 Sep 2023 15:54:18 +0800
Subject: [PATCH 07/32] Modifying device and platform files

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../latest_firmware/bios_upgrade_header.bin   | Bin 8388725 -> 0 bytes
 .../cpu_cpld_upgrade_header.vme               | Bin 286723 -> 0 bytes
 .../latest_firmware/fpga_upgrade_header.bin   | Bin 3180414 -> 0 bytes
 .../other_cpld_upgrade_header.vme             | Bin 1105536 -> 0 bytes
 .../platform_components.json                  |  14 +++++++-------
 .../.upgrade_test/cpld_test_header.vme        | Bin 406 -> 0 bytes
 ...{fpga_test_header.bin => fpga_test_header} |   0
 .../x86_64_micas_m2_w6510_48v8c_r0_config.py  |   4 ++--
 8 files changed, 9 insertions(+), 9 deletions(-)
 delete mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/bios_upgrade_header.bin
 delete mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/cpu_cpld_upgrade_header.vme
 delete mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/fpga_upgrade_header.bin
 delete mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/other_cpld_upgrade_header.vme
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/cpld_test_header.vme
 rename platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/{fpga_test_header.bin => fpga_test_header} (100%)

diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/bios_upgrade_header.bin b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/bios_upgrade_header.bin
deleted file mode 100644
index 08eba59b3a77d401ecbb2fcca0072552bb48e10f..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

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deleted file mode 100644
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diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_components.json
index d13b5f686218..7986fe321313 100644
--- a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_components.json
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_components.json
@@ -3,31 +3,31 @@
         "M2-W6510-48V8C": {
             "component": {
                 "CPU_CPLD": {
-                    "firmware": "/usr/share/sonic/device/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/cpu_cpld_upgrade_header.vme",
+                    "firmware": "",
                     "version": "27190516"
                 },
                 "CONNECT_CPLD": {
-                    "firmware": "/usr/share/sonic/device/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/other_cpld_upgrade_header.vme",
+                    "firmware": "",
                     "version": "49191230"
                 },
                 "CONNECT_CPLD-FAN": {
-                    "firmware": "/usr/share/sonic/device/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/other_cpld_upgrade_header.vme",
+                    "firmware": "",
                     "version": "49191230"
                 },
                 "MAC_CPLD1": {
-                    "firmware" : "/usr/share/sonic/device/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/other_cpld_upgrade_header.vme",
+                    "firmware" : "",
                     "version" : "16190108"
                 },
                 "MAC_CPLD2": {
-                    "firmware" : "/usr/share/sonic/device/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/other_cpld_upgrade_header.vme",
+                    "firmware" : "",
                     "version" : "17200110"
                 },
                 "FPGA": {
-                    "firmware": "/usr/share/sonic/device/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/fpga_upgrade_header.bin",
+                    "firmware": "",
                     "version": "7a150016"
                 },
                 "BIOS": {
-                    "firmware" : "/usr/share/sonic/device/x86_64-micas_m2-w6510-48v8c-r0/latest_firmware/bios_upgrade_header.bin",
+                    "firmware" : "",
                     "version" : "5.11(3BARB029)"
                 }
             }
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/cpld_test_header.vme b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/cpld_test_header.vme
deleted file mode 100644
index 083fd78f3ea1919d9d3737fe0d8d0c7b8b2ce881..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

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diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/fpga_test_header.bin b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/fpga_test_header
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/fpga_test_header.bin
rename to platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/fpga_test_header
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
index 5aef2f7a3086..d56e5cce8c7e 100755
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
@@ -990,12 +990,12 @@
 
         "TEST": {
             "cpld": [
-                {"chain": 1, "file": "/etc/.upgrade_test/cpld_test_header.vme", "display_name": "CPLD"},
+                #{"chain": 1, "file": "/etc/.upgrade_test/cpld_test_header.vme", "display_name": "CPLD"},
             ],
             "fpga": [
                 {
                     "chain": 3,
-                    "file": "/etc/.upgrade_test/fpga_test_header.bin",
+                    "file": "/etc/.upgrade_test/fpga_test_header",
                     "display_name": "FPGA",
                 },
             ],

From 8e3c18238cb449f89f3d0a6fda908980d12372ae Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Wed, 27 Sep 2023 17:14:25 +0800
Subject: [PATCH 08/32] del binary files

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../m2-w6510-48v8c/.upgrade_test/fpga_test_header      | 10 ----------
 .../m2-w6510-48v8c/Makefile                            |  3 ---
 .../config/x86_64_micas_m2_w6510_48v8c_r0_config.py    | 10 +++++-----
 3 files changed, 5 insertions(+), 18 deletions(-)
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/fpga_test_header

diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/fpga_test_header b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/fpga_test_header
deleted file mode 100644
index bdf9ae2139e2..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/fpga_test_header
+++ /dev/null
@@ -1,10 +0,0 @@
-fpga_test_header.bin
-FILEHEADER(
-DEVTYPE=0x404a
-TYPE=fpga
-CHAIN=3
-CHIPNAME=fpga
-VERSION=v0
-FILETYPE=SPI-LOGIC-DEV
-CRC=0x00000000
-)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile
index 1b84abef410a..052a5a6a0773 100644
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile
@@ -7,7 +7,6 @@ INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)
 INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
 INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages
 INSTALL_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/plat_sysfs_cfg
-INSTALL_UPGRADE_TEST_DIR = $(SUB_BUILD_DIR)/etc/.upgrade_test
 
 all:
 	$(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules
@@ -19,8 +18,6 @@ all:
 	@if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi
 	@if [ ! -d ${INSTALL_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_SYSFS_CFG_DIR} ;fi
 	@if [ -d $(PWD)/plat_sysfs_cfg/ ]; then cp -r $(PWD)/plat_sysfs_cfg/* ${INSTALL_SYSFS_CFG_DIR} ;fi
-	@if [ ! -d ${INSTALL_UPGRADE_TEST_DIR} ]; then mkdir -p ${INSTALL_UPGRADE_TEST_DIR} ;fi
-	@if [ -d $(PWD)/.upgrade_test/ ]; then cp -r $(PWD)/.upgrade_test/* ${INSTALL_UPGRADE_TEST_DIR} ;fi
 clean:
 	rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd
 	rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
index d56e5cce8c7e..9f1e988c93d5 100755
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
@@ -993,11 +993,11 @@
                 #{"chain": 1, "file": "/etc/.upgrade_test/cpld_test_header.vme", "display_name": "CPLD"},
             ],
             "fpga": [
-                {
-                    "chain": 3,
-                    "file": "/etc/.upgrade_test/fpga_test_header",
-                    "display_name": "FPGA",
-                },
+                #{
+                #    "chain": 3,
+                #    "file": "/etc/.upgrade_test/fpga_test_header",
+                #    "display_name": "FPGA",
+                #},
             ],
         },
     },

From 4022b24dda53faacbb4928f452edf83445886908 Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Thu, 28 Sep 2023 14:16:31 +0800
Subject: [PATCH 09/32] update device and platfrom files

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../M2-W6510-48V8C/hwsku.json                 |  172 ++
 .../M2-W6510-48V8C/port_config.ini            |   14 +-
 ...d3-m2-w6510-48v8c-48x25G+8x100G.config.bcm |    1 +
 .../x86_64-micas_m2-w6510-48v8c-r0/dev.xml    |    1 +
 .../dev_exhaust.xml                           |    1 +
 .../x86_64-micas_m2-w6510-48v8c-r0/hwsku.json |  172 ++
 .../platform.json                             |  435 +++-
 .../common/app/dev_util/dfd_utest.c           |  319 +++
 .../common/app/dev_util/dfd_utest.h           |    6 +
 .../common/lib/eepromutil/cust_fru.py         |  135 ++
 .../common/lib/plat_hal/devicebase.py         |    3 +
 .../common/lib/plat_hal/interface.py          |   11 +-
 .../common/lib/plat_hal/psu.py                |  134 +-
 .../common/lib/plat_hal/sensor.py             |   81 +-
 .../kernel_drivers_blacklist.conf             |    2 +
 .../common/modules/Makefile                   |    5 +
 .../common/modules/hw_test.c                  |  608 ++++++
 .../common/modules/hw_test.h                  |   31 +
 .../common/modules/intel_spi/Makefile         |    1 +
 .../common/modules/intel_spi/intel_spi.c      |   51 +-
 .../common/modules/intel_spi/intel_spi_pci.c  |  106 +
 .../modules/intel_spi/intel_spi_platform.c    |    9 +-
 .../common/modules/linux-5.10/Makefile        |    2 +
 .../modules/linux-5.10/wb_i2c_gpio_device.c   |   29 +-
 .../common/modules/linux-5.10/wb_i2c_ismt.c   | 1102 ++++++++++
 .../modules/linux-5.10/wb_i2c_mux_pca954x.c   |    2 +-
 .../modules/linux-5.10/wb_i2c_mux_pca9641.c   |    1 +
 .../common/modules/linux-5.10/wb_isl68137.c   |    4 +-
 .../common/modules/linux-5.10/wb_lm75.c       |    7 +-
 .../common/modules/linux-5.10/wb_pmbus_core.c |   20 +-
 .../common/modules/linux-5.10/wb_tmp401.c     |  288 ++-
 .../common/modules/linux-5.10/wb_xdpe12284.c  |  495 +++++
 .../common/modules/phy/Makefile               |   23 +
 .../common/modules/phy/mdio_bitbang.c         |  232 +++
 .../common/modules/phy/mdio_gpio.c            |  217 ++
 .../common/modules/phy/wb_mdio_gpio_device.c  |  110 +
 .../common/modules/pinctrl/Makefile           |   17 +
 .../common/modules/pinctrl/core.h             |  249 +++
 .../common/modules/pinctrl/wb_gpio_c3000.c    |  452 ++++
 .../modules/pinctrl/wb_gpio_c3000_device.c    |   69 +
 .../common/modules/pinctrl/wb_pinctrl_intel.c | 1829 +++++++++++++++++
 .../common/modules/pinctrl/wb_pinctrl_intel.h |  275 +++
 .../plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c     |  159 ++
 .../plat_sysfs/dev_cfg/dfd_fan_driver.c       |   43 +-
 .../plat_sysfs/dev_cfg/include/dfd_cfg.h      |    2 +
 .../plat_sysfs/dev_cfg/include/dfd_cfg_info.h |    8 +
 .../common/modules/wb_i2c_dev.c               |   49 +-
 .../common/modules/wb_mac_bsc.c               |  973 +++++----
 .../common/modules/wb_platform_i2c_dev.c      |    6 +-
 .../common/modules/wb_wdt.c                   |  155 +-
 .../common/modules/wb_wdt.h                   |    7 +
 .../common/script/generate_airflow.py         |   22 +-
 .../common/script/platform_common.py          |    4 +
 .../common/script/platform_config.py          |    4 +
 .../common/script/platform_e2.py              |   33 +-
 .../common/script/platform_intf.py            |   25 +-
 .../common/script/platform_sensors.py         |   71 +-
 .../common/script/set_eth_mac.py              |  274 +++
 .../common/script/slot_monitor.py             |   21 +-
 .../common/sonic_platform/fan.py              |    8 +-
 .../common/sonic_platform/psu.py              |   26 +-
 .../common/sonic_platform/sfp.py              |  214 +-
 .../x86_64_micas_m2_w6510_48v8c_r0_config.py  |    2 +-
 .../x86_64_micas_m2_w6510_48v8c_r0_device.py  |  216 +-
 ..._micas_m2_w6510_48v8c_r0_exhaust_device.py |  214 +-
 65 files changed, 9532 insertions(+), 725 deletions(-)
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/hwsku.json
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/hwsku.json
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/cust_fru.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi_pci.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_ismt.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe12284.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/phy/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/phy/mdio_bitbang.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/phy/mdio_gpio.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/phy/wb_mdio_gpio_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/core.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000_device.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.h
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/set_eth_mac.py

diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/hwsku.json b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/hwsku.json
new file mode 100644
index 000000000000..9a5a4d2b6420
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/hwsku.json
@@ -0,0 +1,172 @@
+{
+	"interfaces": {
+			"Ethernet1": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet2": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet3": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet4": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet5": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet6": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet7": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet8": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet9": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet10": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet11": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet12": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet13": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet14": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet15": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet16": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet17": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet18": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet19": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet20": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet21": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet22": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet23": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet24": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet25": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet26": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet27": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet28": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet29": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet30": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet31": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet32": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet33": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet34": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet35": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet36": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet37": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet38": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet39": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet40": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet41": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet42": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet43": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet44": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet45": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet46": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet47": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet48": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet49": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet53": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet57": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet61": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet65": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet69": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet73": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet77": {
+				"default_brkout_mode": "1x100G"
+			}
+	}
+}
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/port_config.ini b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/port_config.ini
index b71ad39648c9..57d6132aac04 100755
--- a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/port_config.ini
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/port_config.ini
@@ -48,10 +48,10 @@ Ethernet46       70                   twentyfiveGigE0/46     46         25000
 Ethernet47       71                   twentyfiveGigE0/47     47         25000        up
 Ethernet48       72                   twentyfiveGigE0/48     48         25000        up
 Ethernet49       85,86,87,88          hundredGigE0/1         49         100000       up
-Ethernet50       77,78,79,80          hundredGigE0/2         50         100000       up
-Ethernet51       97,98,99,100         hundredGigE0/3         51         100000       up
-Ethernet52       93,94,95,96          hundredGigE0/4         52         100000       up
-Ethernet53       113,114,115,116      hundredGigE0/5         53         100000       up
-Ethernet54       105,106,107,108      hundredGigE0/6         54         100000       up
-Ethernet55       121,122,123,124      hundredGigE0/7         55         100000       up
-Ethernet56       125,126,127,128      hundredGigE0/8         56         100000       up
+Ethernet53       77,78,79,80          hundredGigE0/2         50         100000       up
+Ethernet57       97,98,99,100         hundredGigE0/3         51         100000       up
+Ethernet61       93,94,95,96          hundredGigE0/4         52         100000       up
+Ethernet65       113,114,115,116      hundredGigE0/5         53         100000       up
+Ethernet69       105,106,107,108      hundredGigE0/6         54         100000       up
+Ethernet73       121,122,123,124      hundredGigE0/7         55         100000       up
+Ethernet77       125,126,127,128      hundredGigE0/8         56         100000       up
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/td3-m2-w6510-48v8c-48x25G+8x100G.config.bcm b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/td3-m2-w6510-48v8c-48x25G+8x100G.config.bcm
index 2893a9473778..559a49f4c887 100644
--- a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/td3-m2-w6510-48v8c-48x25G+8x100G.config.bcm
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/M2-W6510-48V8C/td3-m2-w6510-48v8c-48x25G+8x100G.config.bcm
@@ -22,6 +22,7 @@ memlist_enable=1
 miim_intr_enable=0
 module_64ports=1
 oversubscribe_mode=1
+oversubscribe_mixed_sister_25_50_enable=1
 parity_enable=1
 parity_correction=1
 pbmp_gport_stack.0=0x0000000000000000000000000000000000000000000000000000000000000000
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev.xml b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev.xml
index e2553818d972..86a147b8ffd5 100644
--- a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev.xml
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev.xml
@@ -409,6 +409,7 @@
         <code key="CSU550AP-3-501" value="PA550II-R"/>
         <code key="DPS-550AB-40 A" value="PA550II-R"/>
         <code key="GW-CRPS550N2RC" value="PA550II-R"/>
+        <code key="U1D-D10800-DRB" value="PD800I-F"/>
     </psutype>
     <fan_display_name>
         <code key="M1HFAN III-F" value="M1HFAN III-F"/>
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev_exhaust.xml b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev_exhaust.xml
index 6450c7a24316..86851af90ec9 100644
--- a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev_exhaust.xml
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/dev_exhaust.xml
@@ -409,6 +409,7 @@
         <code key="CSU550AP-3-501" value="PA550II-R"/>
         <code key="DPS-550AB-40 A" value="PA550II-R"/>
         <code key="GW-CRPS550N2RC" value="PA550II-R"/>
+        <code key="U1D-D10800-DRB" value="PD800I-F"/>
     </psutype>
     <fan_display_name>
         <code key="M1HFAN III-F" value="M1HFAN III-F"/>
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/hwsku.json b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/hwsku.json
new file mode 100644
index 000000000000..9a5a4d2b6420
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/hwsku.json
@@ -0,0 +1,172 @@
+{
+	"interfaces": {
+			"Ethernet1": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet2": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet3": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet4": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet5": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet6": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet7": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet8": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet9": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet10": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet11": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet12": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet13": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet14": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet15": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet16": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet17": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet18": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet19": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet20": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet21": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet22": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet23": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet24": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet25": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet26": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet27": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet28": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet29": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet30": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet31": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet32": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet33": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet34": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet35": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet36": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet37": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet38": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet39": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet40": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet41": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet42": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet43": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet44": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet45": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet46": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet47": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet48": {
+				"default_brkout_mode": "1x25G"
+			},
+			"Ethernet49": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet53": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet57": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet61": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet65": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet69": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet73": {
+				"default_brkout_mode": "1x100G"
+			},
+			"Ethernet77": {
+				"default_brkout_mode": "1x100G"
+			}
+	}
+}
\ No newline at end of file
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform.json b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform.json
index d6964717c97d..0fe70dd1411e 100644
--- a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform.json
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform.json
@@ -137,7 +137,7 @@
                 },
                 "fans": [
                     {
-                        "name": "FanTray1_1",
+                        "name": "Fantray1_1",
                         "speed": {
                             "controllable": true,
                             "minimum": 50,
@@ -148,7 +148,7 @@
                         }
                     },
                     {
-                        "name": "FanTray1_2",
+                        "name": "Fantray1_2",
                         "speed": {
                             "controllable": true,
                             "minimum": 50,
@@ -169,7 +169,7 @@
                 },
                 "fans": [
                     {
-                        "name": "FanTray2_1",
+                        "name": "Fantray2_1",
                         "speed": {
                             "controllable": true,
                             "minimum": 50,
@@ -180,7 +180,7 @@
                         }
                     },
                     {
-                        "name": "FanTray2_2",
+                        "name": "Fantray2_2",
                         "speed": {
                             "controllable": true,
                             "minimum": 50,
@@ -201,7 +201,7 @@
                 },
                 "fans": [
                     {
-                        "name": "FanTray3_1",
+                        "name": "Fantray3_1",
                         "speed": {
                             "controllable": true,
                             "minimum": 50,
@@ -212,7 +212,7 @@
                         }
                     },
                     {
-                        "name": "FanTray3_2",
+                        "name": "Fantray3_2",
                         "speed": {
                             "controllable": true,
                             "minimum": 50,
@@ -233,7 +233,7 @@
                 },
                 "fans": [
                     {
-                        "name": "FanTray4_1",
+                        "name": "Fantray4_1",
                         "speed": {
                             "controllable": true,
                             "minimum": 50,
@@ -244,7 +244,7 @@
                         }
                     },
                     {
-                        "name": "FanTray4_2",
+                        "name": "Fantray4_2",
                         "speed": {
                             "controllable": true,
                             "minimum": 50,
@@ -398,5 +398,422 @@
         "modules": [],
         "sfps": []
     },
-    "interfaces": {}
+    "interfaces": {
+        "Ethernet1": {
+            "index": "1",
+            "lanes": "57",
+            "breakout_modes": {
+                "1x25G": ["Eth1"]
+            }
+        },
+        "Ethernet2": {
+            "index": "2",
+            "lanes": "58",
+            "breakout_modes": {
+                "1x25G": ["Eth2"]
+            }
+        },
+        "Ethernet3": {
+            "index": "3",
+            "lanes": "59",
+            "breakout_modes": {
+                "1x25G": ["Eth3"]
+            }
+        },
+        "Ethernet4": {
+            "index": "4",
+            "lanes": "60",
+            "breakout_modes": {
+                "1x25G": ["Eth4"]
+            }
+        },
+        "Ethernet5": {
+            "index": "5",
+            "lanes": "61",
+            "breakout_modes": {
+                "1x25G": ["Eth5"]
+            }
+        },
+        "Ethernet6": {
+            "index": "6",
+            "lanes": "62",
+            "breakout_modes": {
+                "1x25G": ["Eth6"]
+            }
+        },
+        "Ethernet7": {
+            "index": "7",
+            "lanes": "63",
+            "breakout_modes": {
+                "1x25G": ["Eth7"]
+            }
+        },
+        "Ethernet8": {
+            "index": "8",
+            "lanes": "64",
+            "breakout_modes": {
+                "1x25G": ["Eth8"]
+            }
+        },
+        "Ethernet9": {
+            "index": "9",
+            "lanes": "1",
+            "breakout_modes": {
+                "1x25G": ["Eth9"]
+            }
+        },
+        "Ethernet10": {
+            "index": "10",
+            "lanes": "2",
+            "breakout_modes": {
+                "1x25G": ["Eth10"]
+            }
+        },
+        "Ethernet11": {
+            "index": "11",
+            "lanes": "3",
+            "breakout_modes": {
+                "1x25G": ["Eth11"]
+            }
+        },
+        "Ethernet12": {
+            "index": "12",
+            "lanes": "4",
+            "breakout_modes": {
+                "1x25G": ["Eth12"]
+            }
+        },
+        "Ethernet13": {
+            "index": "13",
+            "lanes": "5",
+            "breakout_modes": {
+                "1x25G": ["Eth13"]
+            }
+        },
+        "Ethernet14": {
+            "index": "14",
+            "lanes": "6",
+            "breakout_modes": {
+                "1x25G": ["Eth14"]
+            }
+        },
+        "Ethernet15": {
+            "index": "15",
+            "lanes": "7",
+            "breakout_modes": {
+                "1x25G": ["Eth15"]
+            }
+        },
+        "Ethernet16": {
+            "index": "16",
+            "lanes": "8",
+            "breakout_modes": {
+                "1x25G": ["Eth16"]
+            }
+        },
+         "Ethernet17": {
+            "index": "17",
+            "lanes": "13",
+            "breakout_modes": {
+                "1x25G": ["Eth17"]
+            }
+        },
+        "Ethernet18": {
+            "index": "18",
+            "lanes": "14",
+            "breakout_modes": {
+                "1x25G": ["Eth18"]
+            }
+        },
+        "Ethernet19": {
+            "index": "19",
+            "lanes": "15",
+            "breakout_modes": {
+                "1x25G": ["Eth19"]
+            }
+        },
+        "Ethernet20": {
+            "index": "20",
+            "lanes": "16",
+            "breakout_modes": {
+                "1x25G": ["Eth20"]
+            }
+        },
+        "Ethernet21": {
+            "index": "21",
+            "lanes": "21",
+            "breakout_modes": {
+                "1x25G": ["Eth21"]
+            }
+        },
+        "Ethernet22": {
+            "index": "22",
+            "lanes": "22",
+            "breakout_modes": {
+                "1x25G": ["Eth22"]
+            }
+        },
+        "Ethernet23": {
+            "index": "23",
+            "lanes": "23",
+            "breakout_modes": {
+                "1x25G": ["Eth23"]
+            }
+        },
+        "Ethernet24": {
+            "index": "24",
+            "lanes": "24",
+            "breakout_modes": {
+                "1x25G": ["Eth24"]
+            }
+        },
+        "Ethernet25": {
+            "index": "25",
+            "lanes": "29",
+            "breakout_modes": {
+                "1x25G": ["Eth25"]
+            }
+        },
+        "Ethernet26": {
+            "index": "26",
+            "lanes": "30",
+            "breakout_modes": {
+                "1x25G": ["Eth26"]
+            }
+        },
+        "Ethernet27": {
+            "index": "27",
+            "lanes": "31",
+            "breakout_modes": {
+                "1x25G": ["Eth27"]
+            }
+        },
+        "Ethernet28": {
+            "index": "28",
+            "lanes": "32",
+            "breakout_modes": {
+                "1x25G": ["Eth28"]
+            }
+        },
+        "Ethernet29": {
+            "index": "29",
+            "lanes": "33",
+            "breakout_modes": {
+                "1x25G": ["Eth29"]
+            }
+        },
+        "Ethernet30": {
+            "index": "30",
+            "lanes": "34",
+            "breakout_modes": {
+                "1x25G": ["Eth30"]
+            }
+        },
+        "Ethernet31": {
+            "index": "31",
+            "lanes": "35",
+            "breakout_modes": {
+                "1x25G": ["Eth31"]
+            }
+        },
+        "Ethernet32": {
+            "index": "32",
+            "lanes": "36",
+            "breakout_modes": {
+                "1x25G": ["Eth32"]
+            }
+        },
+        "Ethernet33": {
+            "index": "33",
+            "lanes": "41",
+            "breakout_modes": {
+                "1x25G": ["Eth33"]
+            }
+        },
+        "Ethernet34": {
+            "index": "34",
+            "lanes": "42",
+            "breakout_modes": {
+                "1x25G": ["Eth34"]
+            }
+        },
+        "Ethernet35": {
+            "index": "35",
+            "lanes": "43",
+            "breakout_modes": {
+                "1x25G": ["Eth35"]
+            }
+        },
+        "Ethernet36": {
+            "index": "36",
+            "lanes": "44",
+            "breakout_modes": {
+                "1x25G": ["Eth36"]
+            }
+        },
+        "Ethernet37": {
+            "index": "37",
+            "lanes": "49",
+            "breakout_modes": {
+                "1x25G": ["Eth37"]
+            }
+        },
+        "Ethernet38": {
+            "index": "38",
+            "lanes": "50",
+            "breakout_modes": {
+                "1x25G": ["Eth38"]
+            }
+        },
+        "Ethernet39": {
+            "index": "39",
+            "lanes": "51",
+            "breakout_modes": {
+                "1x25G": ["Eth39"]
+            }
+        },
+        "Ethernet40": {
+            "index": "40",
+            "lanes": "52",
+            "breakout_modes": {
+                "1x25G": ["Eth40"]
+            }
+        },
+        "Ethernet41": {
+            "index": "41",
+            "lanes": "65",
+            "breakout_modes": {
+                "1x25G": ["Eth41"]
+            }
+        },
+        "Ethernet42": {
+            "index": "42",
+            "lanes": "66",
+            "breakout_modes": {
+                "1x25G": ["Eth42"]
+            }
+        },
+        "Ethernet43": {
+            "index": "43",
+            "lanes": "67",
+            "breakout_modes": {
+                "1x25G": ["Eth43"]
+            }
+        },
+        "Ethernet44": {
+            "index": "44",
+            "lanes": "68",
+            "breakout_modes": {
+                "1x25G": ["Eth44"]
+            }
+        },
+        "Ethernet45": {
+            "index": "45",
+            "lanes": "69",
+            "breakout_modes": {
+                "1x25G": ["Eth45"]
+            }
+        },
+        "Ethernet46": {
+            "index": "46",
+            "lanes": "70",
+            "breakout_modes": {
+                "1x25G": ["Eth46"]
+            }
+        },
+        "Ethernet47": {
+            "index": "47",
+            "lanes": "71",
+            "breakout_modes": {
+                "1x25G": ["Eth47"]
+            }
+        },
+        "Ethernet48": {
+            "index": "48",
+            "lanes": "72",
+            "breakout_modes": {
+                "1x25G": ["Eth48"]
+            }
+        },
+        "Ethernet49": {
+            "index": "49,49,49,49",
+            "lanes": "85,86,87,88",
+            "breakout_modes": {
+                "1x100G": ["Eth49"],
+                "2x50G": ["Eth49/1", "Eth49/2"],
+                "4x25G[10G]": ["Eth49/1", "Eth49/2", "Eth49/3", "Eth49/4"],
+                "4x10G": ["Eth49/1", "Eth49/2", "Eth49/3", "Eth49/4"]
+            }
+        },
+        "Ethernet53": {
+            "index": "50,50,50,50",
+            "lanes": "77,78,79,80",
+            "breakout_modes": {
+                "1x100G": ["Eth50"],
+                "2x50G": ["Eth50/1", "Eth50/2"],
+                "4x25G[10G]": ["Eth50/1", "Eth50/2", "Eth50/3", "Eth50/4"],
+                "4x10G": ["Eth50/1", "Eth50/2", "Eth50/3", "Eth50/4"]
+            }
+        },
+        "Ethernet57": {
+            "index": "51,51,51,51",
+            "lanes": "97,98,99,100",
+            "breakout_modes": {
+                "1x100G": ["Eth51"],
+                "2x50G": ["Eth51/1", "Eth51/2"],
+                "4x25G[10G]": ["Eth51/1", "Eth51/2", "Eth51/3", "Eth51/4"],
+                "4x10G": ["Eth51/1", "Eth51/2", "Eth51/3", "Eth51/4"]
+            }
+        },
+        "Ethernet61": {
+            "index": "52,52,52,52",
+            "lanes": "93,94,95,96",
+            "breakout_modes": {
+                "1x100G": ["Eth52"],
+                "2x50G": ["Eth52/1", "Eth52/2"],
+                "4x25G[10G]": ["Eth52/1", "Eth52/2", "Eth52/3", "Eth52/4"],
+                "4x10G": ["Eth52/1", "Eth52/2", "Eth52/3", "Eth52/4"]
+            }
+        },
+        "Ethernet65": {
+            "index": "53,53,53,53",
+            "lanes": "113,114,115,116",
+            "breakout_modes": {
+                "1x100G": ["Eth53"],
+                "2x50G": ["Eth53/1", "Eth53/2"],
+                "4x25G[10G]": ["Eth53/1", "Eth53/2", "Eth53/3", "Eth53/4"],
+                "4x10G": ["Eth53/1", "Eth53/2", "Eth53/3", "Eth53/4"]
+            }
+        },
+        "Ethernet69": {
+            "index": "54,54,54,54",
+            "lanes": "105,106,107,108",
+            "breakout_modes": {
+                "1x100G": ["Eth54"],
+                "2x50G": ["Eth54/1","Eth54/2"],
+                "4x25G[10G]": ["Eth54/1", "Eth54/2", "Eth54/3", "Eth54/4"],
+                "4x10G": ["Eth54/1", "Eth54/2", "Eth54/3", "Eth54/4"]
+            }
+        },
+        "Ethernet73": {
+            "index": "55,55,55,55",
+            "lanes": "121,122,123,124",
+            "breakout_modes": {
+                "1x100G": ["Eth55"],
+                "2x50G": ["Eth55/1", "Eth55/2"],
+                "4x25G[10G]": ["Eth55/1", "Eth55/2", "Eth55/3", "Eth55/4"],
+                "4x10G": ["Eth55/1", "Eth55/2", "Eth55/3", "Eth55/4"]
+            }
+        },
+        "Ethernet77": {
+            "index": "56,56,56,56",
+            "lanes": "125,126,127,128",
+            "breakout_modes": {
+                "1x100G": ["Eth56"],
+                "2x50G": ["Eth56/1", "Eth56/2"],
+                "4x25G[10G]": ["Eth56/1", "Eth56/2", "Eth56/3", "Eth56/4"],
+                "4x10G": ["Eth56/1", "Eth56/2", "Eth56/3", "Eth56/4"]
+            }
+        }
+    }
 }
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.c b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.c
index 9c711830958e..c82b0baad4c3 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.c
@@ -31,6 +31,27 @@
 #define WIDTH_4Byte                       (4)
 #define DFD_UTEST_MAX_BIT_WIDTH           (4)
 
+struct phydev_user_info {
+    int phy_index;
+    uint32_t regnum;
+    uint32_t regval;
+};
+
+#define CMD_PHY_LIST                        _IOR('P', 0, struct phydev_user_info)
+#define CMD_PHY_READ                        _IOR('P', 1, struct phydev_user_info)
+#define CMD_PHY_WRITE                       _IOR('P', 2, struct phydev_user_info)
+
+struct mdio_dev_user_info {
+    int mdio_index;
+    int phyaddr;
+    uint32_t regnum;
+    uint32_t regval;
+};
+
+#define CMD_MDIO_LIST                        _IOR('M', 0, struct mdio_dev_user_info)
+#define CMD_MDIO_READ                        _IOR('M', 1, struct mdio_dev_user_info)
+#define CMD_MDIO_WRITE                       _IOR('M', 2, struct mdio_dev_user_info)
+
 #ifdef DFD_UTEST_ITEM
 #undef DFD_UTEST_ITEM
 #endif
@@ -1758,6 +1779,304 @@ int dfd_utest_sysfs_data_wr(int argc, char* argv[])
     return DFD_RV_MODE_NOTSUPPORT;
 }
 
+static void phy_help(char *name)
+{
+    fprintf(stderr,
+            "Usage: %s  phy_index(dec) regnum(hex) [regval(hex)]                    \n"
+            "  phy_index     phydev index                                           \n"
+            "  regnum        phydev register address                                \n"
+            "  regval        phydev register value                                  \n",
+            name);
+    return;
+}
+
+static void mdio_help(char *name)
+{
+    fprintf(stderr,
+            "Usage: %s  mdio_index(dec) phyaddr(hex) regnum(hex) [regval(hex)]      \n"
+            "  mdio_index    mdiodev index                                          \n"
+            "  phyaddr       phydev address                                         \n"
+            "  regnum        phydev register address                                \n"
+            "  regval        phydev register value                                  \n",
+            name);
+    return;
+}
+
+static int phydev_arg_parse(int argc, char* argv[], int *phy_index, uint32_t *regnum, uint32_t *regval,
+               int num_arg)
+{
+
+    unsigned long index, regaddr, value;
+    char *end;
+
+    if (argc != num_arg) {
+        return -EINVAL;
+    }
+
+    index = strtoul(argv[2], &end, 0);
+    if (*end) {
+        fprintf(stderr, "Error: index invalid!\n");
+        return -EINVAL;
+    }
+
+    regaddr = strtoul(argv[3], &end, 0);
+    if (*end || regaddr > 0xffff) {
+        fprintf(stderr, "Error: regaddr invalid!\n");
+        return -EINVAL;
+    }
+
+    if (argc > 4) {
+        value = strtoul(argv[4], &end, 0);
+        if (*end || value > 0xffff) {
+            fprintf(stderr, "Error: reg data invalid!\n");
+            return -EINVAL;
+        }
+
+        *regval = (uint32_t)value;
+    }
+
+    *phy_index     =  (uint32_t)index;
+    *regnum        =  (uint32_t)regaddr;
+
+    return 0;
+}
+
+static int mdiodev_arg_parse(int argc, char* argv[], int *mdio_index, int *phyaddr, uint32_t *regnum,
+               uint32_t *regval, int num_arg)
+{
+
+    unsigned long index, addr, regaddr, value;
+    char *end;
+
+    if (argc != num_arg) {
+        return -EINVAL;
+    }
+
+    index = strtoul(argv[2], &end, 0);
+    if (*end) {
+        fprintf(stderr, "Error: index invalid!\n");
+        return -EINVAL;
+    }
+
+    addr = strtoul(argv[3], &end, 0);
+    if (*end || addr > 0x1f) {
+        fprintf(stderr, "Error: phyaddr invalid!\n");
+        return -EINVAL;
+    }
+
+    regaddr = strtoul(argv[4], &end, 0);
+    if (*end || regaddr > 0xffff) {
+        fprintf(stderr, "Error: regaddr invalid!\n");
+        return -EINVAL;
+    }
+
+    if (argc > 5) {
+        value = strtoul(argv[5], &end, 0);
+        if (*end || value > 0xffff) {
+            fprintf(stderr, "Error: reg data invalid!\n");
+            return -EINVAL;
+        }
+
+        *regval = (uint32_t)value;
+    }
+
+    *mdio_index    =  (uint32_t)index;
+    *phyaddr       =  (int)addr;
+    *regnum        =  (uint32_t)regaddr;
+
+    return 0;
+}
+
+int dfd_utest_phydev_list(int argc, char* argv[])
+{
+    int fd;
+
+    if (argc != 2) {
+        printf("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_PHYDEV_LIST);
+        return DFD_RV_MODE_NOTSUPPORT;
+    }
+
+    argv = argv;
+    fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO);
+    if (fd < 0) {
+        fprintf(stderr, "Error: Could not open file "
+                "/dev/dram: %s\n", strerror(errno));
+        return -1;
+    }
+
+    (void)ioctl(fd, CMD_PHY_LIST, NULL);
+
+    close(fd);
+
+    return 0;
+}
+
+int dfd_utest_phydev_rd(int argc, char* argv[])
+{
+    struct phydev_user_info phy_info;
+    int fd;
+    long int ret;
+
+    ret = phydev_arg_parse(argc, argv, &phy_info.phy_index, &phy_info.regnum, &phy_info.regval, 4);
+    if (ret < 0) {
+        phy_help("phydev_rd");
+        return -1;
+    }
+
+    fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO);
+    if (fd < 0) {
+        fprintf(stderr, "Error: Could not open file "
+                "/dev/dram: %s\n", strerror(errno));
+        return -1;
+    }
+
+    ret = ioctl(fd, CMD_PHY_READ, &phy_info);
+    if (ret < 0) {
+        fprintf(stderr, "Error: phy read error : %s\n", strerror(errno));
+        close(fd);
+        return  -1;
+    }
+
+    close(fd);
+
+    printf("Read success --- phydev%d regnum: 0x%x, value: 0x%x\n",phy_info.phy_index,
+        phy_info.regnum, phy_info.regval);
+
+    return 0;
+}
+
+int dfd_utest_phydev_wr(int argc, char* argv[])
+{
+    struct phydev_user_info  phy_info;
+    int fd;
+    long int ret;
+
+    ret = phydev_arg_parse(argc, argv, &phy_info.phy_index, &phy_info.regnum, &phy_info.regval, 5);
+    if (ret < 0) {
+        phy_help("phydev_wr");
+        return -1;
+    }
+
+    fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO);
+    if (fd < 0) {
+        fprintf(stderr, "Error: Could not open file "
+                "/dev/dram: %s\n", strerror(errno));
+        return -1;
+    }
+
+    ret = ioctl(fd, CMD_PHY_WRITE, &phy_info);
+    if (ret < 0) {
+        fprintf(stderr, "Error: phy write error : %s\n", strerror(errno));
+        close(fd);
+        return  -1;
+    }
+
+    close(fd);
+
+    printf("write success --- phydev%d regnum: 0x%x, value: 0x%x\n",phy_info.phy_index,
+        phy_info.regnum, phy_info.regval);
+
+    return 0;
+}
+
+int dfd_utest_mdiodev_list(int argc, char* argv[])
+{
+    int fd;
+
+    if (argc != 2) {
+        printf("Input invalid.\n");
+        dfd_utest_printf_single_help(DFD_UTEST_ITEM_MDIODEV_LIST);
+        return DFD_RV_MODE_NOTSUPPORT;
+    }
+
+    argv = argv;
+    fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO);
+    if (fd < 0) {
+        fprintf(stderr, "Error: Could not open file "
+                "/dev/dram: %s\n", strerror(errno));
+        return -1;
+    }
+
+    (void)ioctl(fd, CMD_MDIO_LIST, NULL);
+
+    close(fd);
+
+    return 0;
+}
+
+int dfd_utest_mdiodev_rd(int argc, char* argv[])
+{
+    struct mdio_dev_user_info mdio_info;
+    int fd;
+    long int ret;
+
+    ret = mdiodev_arg_parse(argc, argv, &mdio_info.mdio_index, &mdio_info.phyaddr,
+              &mdio_info.regnum, &mdio_info.regval, 5);
+    if (ret < 0) {
+        mdio_help("mdiodev_rd");
+        return -1;
+    }
+
+    fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO);
+    if (fd < 0) {
+        fprintf(stderr, "Error: Could not open file "
+                "/dev/dram: %s\n", strerror(errno));
+        return -1;
+    }
+
+    ret = ioctl(fd, CMD_MDIO_READ, &mdio_info);
+    if (ret < 0) {
+        fprintf(stderr, "Error: mdio read error : %s\n", strerror(errno));
+        close(fd);
+        return  -1;
+    }
+
+    close(fd);
+
+    printf("Read success\n mdio_index  phyaddr     regnum      value\n");
+    printf("  %-10d  %#-10x  %#-10x  %#-10x\n", mdio_info.mdio_index, mdio_info.phyaddr,
+        mdio_info.regnum, mdio_info.regval);
+
+    return 0;
+}
+
+int dfd_utest_mdiodev_wr(int argc, char* argv[])
+{
+    struct mdio_dev_user_info mdio_info;
+    int fd;
+    long int ret;
+
+    ret = mdiodev_arg_parse(argc, argv, &mdio_info.mdio_index, &mdio_info.phyaddr,
+              &mdio_info.regnum, &mdio_info.regval, 6);
+    if (ret < 0) {
+        mdio_help("mdiodev_wr");
+        return -1;
+    }
+
+    fd = open("/dev/dram_test", O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO);
+    if (fd < 0) {
+        fprintf(stderr, "Error: Could not open file "
+                "/dev/dram: %s\n", strerror(errno));
+        return -1;
+    }
+
+    ret = ioctl(fd, CMD_MDIO_WRITE, &mdio_info);
+    if (ret < 0) {
+        fprintf(stderr, "Error: mdio write error : %s\n", strerror(errno));
+        close(fd);
+        return  -1;
+    }
+
+    close(fd);
+
+    printf("write success\n mdio_index  phyaddr     regnum      value\n");
+    printf("  %-10d  %#-10x  %#-10x  %#-10x\n", mdio_info.mdio_index, mdio_info.phyaddr,
+        mdio_info.regnum, mdio_info.regval);
+
+    return 0;
+}
+
 dfd_utest_proc_fun dfd_utest_get_proc_func(char *type_str)
 {
     int i, tbl_size;
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.h b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.h
index aa194a4dcdd7..1ae65148ea9c 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/dev_util/dfd_utest.h
@@ -75,6 +75,12 @@ typedef int (* dfd_utest_proc_fun)(int argc, char* argv[]);
     DFD_UTEST_ITEM(DFD_UTEST_ITEM_I2C_GEN_WR, i2c_gen_wr, "i2c_gen_wr [i2c_bus] [slave_addr] [addr_bitwidth] [offset] [data_bitwidth] [data0]... [dataN]", "i2c_gen_wr [i2c_bus] [slave_addr] [addr_bitwidth] [offset] [data_bitwidth] [data0]... [dataN]")    \
     DFD_UTEST_ITEM(DFD_UTEST_ITEM_MSR_RD, msr_rd, "msr_rd [cpu_index] [offset] [width]", "msr_rd [cpu_index] [offset] [width]")    \
     DFD_UTEST_ITEM(DFD_UTEST_ITEM_SYSFS_DATA_WR, sysfs_data_wr, "sysfs_data_wr [sysfs_loc] [offset] [data0] ... [dataN]", "sysfs_data_wr [sysfs_loc] [offset] [data0] ... [dataN]]")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_PHYDEV_LIST, phydev_list, "phydev_list", "phydev_list")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_PHYDEV_RD, phydev_rd, "phydev_rd phy_index reg_addr", "phydev_rd phy_index reg_addr")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_PHYDEV_WR, phydev_wr, "phydev_wr phy_index reg_addr reg_data", "phydev_wr phy_index reg_addr reg_data")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_MDIODEV_LIST, mdiodev_list, "mdiodev_list", "mdiodev_list")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_MDIODEV_RD, mdiodev_rd, "mdiodev_rd mdio_index phyaddr reg_addr", "mdiodev_rd mdio_index phyaddr reg_addr")   \
+    DFD_UTEST_ITEM(DFD_UTEST_ITEM_MDIODEV_WR, mdiodev_wr, "mdiodev_wr mdio_index phyaddr reg_addr reg_data", "mdiodev_wr mdio_index phyaddr reg_addr reg_data")   \
 
 #ifdef DFD_UTEST_ITEM
 #undef DFD_UTEST_ITEM
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/cust_fru.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/cust_fru.py
new file mode 100644
index 000000000000..940c722ce467
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/eepromutil/cust_fru.py
@@ -0,0 +1,135 @@
+#!/usr/bin/python
+# -*- coding: utf-8 -*-
+import sys
+import os
+
+
+class CustFruException(Exception):
+    def __init__(self, message='custfrueerror', code=-100):
+        err = 'errcode: {0} message:{1}'.format(code, message)
+        Exception.__init__(self, err)
+        self.code = code
+        self.message = message
+
+
+class CustFru():
+    MAGIC_HEAD_INFO = 0x7a
+
+    _CUST_MAGIC_OFFSET = 0
+    _CUST_MAGIC_LEN = 1
+    _CUST_VERSION_OFFSET = 1
+    _CUST_VERSION_LEN = 6
+    _CUST_CRC_OFFSET = 7
+    _CUST_CRC_LEN = 1
+    _CUST_PRODUCT_NAME_OFFSET = 10
+    _CUST_PRODUCT_NAME_LEN = 17
+    _CUST_MANUFACTURER_OFFSET = 27
+    _CUST_MANUFACTURER_LEN = 7
+    _CUST_SERIAL_NUMBER_OFFSET = 34
+    _CUST_SERIAL_NUMBER_LEN = 25
+    _CUST_INPUT_TYPE_OFFSET = 78
+    _CUST_INPUT_TYPE_LEN = 2
+    _CUST_INPUT_OFFSET = 86
+    _CUST_INPUT_LEN = 15
+    _CUST_OUTPUT_OFFSET = 108
+    _CUST_OUTPUT_LEN = 11
+    _CUST_POWER_OFFSET = 200
+    _CUST_POWER_LEN = 10
+    _CUST_MANUFACTURER_DATE_OFFSET = 210
+    _CUST_MANUFACTURER_DATE_LEN = 3
+
+    def __init__(self):
+        self.magic = ""
+        self.version = ""
+        self.crc = ""
+        self.product_name = ""
+        self.manufacturer = ""
+        self.serial_number = ""
+        self.input_type = ""
+        self.input = ""
+        self.output = ""
+        self.power = ""
+        self.manufacturer_date = ""
+
+    def checksum(self, v):
+        result = 0
+        for item in v:
+            result += ord(item)
+        return (result & 0xff)
+
+    def decode(self, e2):
+        # header
+        e2_index = 0
+        head = ord(e2[0])
+        if head != self.MAGIC_HEAD_INFO:
+            raise CustFruException("Customization fru eeprom head info error, head:0x%x" % head, -10)
+        self.magic = "0x%02x" % self.MAGIC_HEAD_INFO
+
+        # version
+        version = "%s" % (e2[self._CUST_VERSION_OFFSET:self._CUST_VERSION_OFFSET + self._CUST_VERSION_LEN])
+        self.version = version.replace("\xff", "").strip()
+
+        # crc
+        crc_calc = self.checksum(e2[0:self._CUST_CRC_OFFSET])
+        if crc_calc != ord(e2[self._CUST_CRC_OFFSET]):
+            raise CustFruException("Customization fru eeprom crc check error, calc: 0x%x, read: 0x%x" % (crc_calc, ord(e2[self._CUST_CRC_OFFSET])), -10)
+        self.crc = crc_calc
+
+        # Product Name
+        product_name = "%s" % (e2[self._CUST_PRODUCT_NAME_OFFSET:self._CUST_PRODUCT_NAME_OFFSET + self._CUST_PRODUCT_NAME_LEN])
+        self.product_name = product_name.replace("\xff", "").strip()
+
+        # manufacturer
+        manufacturer = "%s" % (e2[self._CUST_MANUFACTURER_OFFSET:self._CUST_MANUFACTURER_OFFSET + self._CUST_MANUFACTURER_LEN])
+        self.manufacturer = manufacturer.strip()
+
+        # serial_number
+        serial_number = "%s" % (e2[self._CUST_SERIAL_NUMBER_OFFSET:self._CUST_SERIAL_NUMBER_OFFSET + self._CUST_SERIAL_NUMBER_LEN])
+        self.serial_number = serial_number.strip()
+
+        # input_type
+        input_type = "%s" % (e2[self._CUST_INPUT_TYPE_OFFSET:self._CUST_INPUT_TYPE_OFFSET + self._CUST_INPUT_TYPE_LEN])
+        self.input_type = input_type.strip()
+
+        # input
+        input = "%s" % (e2[self._CUST_INPUT_OFFSET:self._CUST_INPUT_OFFSET + self._CUST_INPUT_LEN])
+        self.input = input.strip()
+
+        # output
+        output = "%s" % (e2[self._CUST_OUTPUT_OFFSET:self._CUST_OUTPUT_OFFSET + self._CUST_OUTPUT_LEN])
+        self.output = output.strip()
+
+        # power
+        power = "%s" % (e2[self._CUST_POWER_OFFSET:self._CUST_POWER_OFFSET + self._CUST_POWER_LEN])
+        self.power = power.replace("\xff", "").strip()
+
+        # manufacturer_date
+        manufacturer_year = ord(e2[self._CUST_MANUFACTURER_DATE_OFFSET]) + 2000
+        manufacturer_month = ord(e2[self._CUST_MANUFACTURER_DATE_OFFSET + 1])
+        manufacturer_day = ord(e2[self._CUST_MANUFACTURER_DATE_OFFSET + 2])
+        self.manufacturer_date = "%04d-%02d-%02d" % (manufacturer_year, manufacturer_month, manufacturer_day)
+
+        return
+
+
+    def __str__(self):
+        formatstr = "Version            : %s      \n" \
+                    "Product Name       : %s      \n" \
+                    "Manufacturer       : %s      \n" \
+                    "Serial Number      : %s      \n" \
+                    "AC/DC Power Module : %s      \n" \
+                    "INPUT              : %s      \n" \
+                    "OUTPUT             : %s      \n" \
+                    "POWER              : %s      \n" \
+                    "Manufacturer Date  : %s      \n"
+        str_tmp = formatstr % (self.version,
+                            self.product_name,
+                            self.manufacturer,
+                            self.serial_number,
+                            self.input_type,
+                            self.input,
+                            self.output,
+                            self.power,
+                            self.manufacturer_date)
+        return str_tmp.replace("\x00","")
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/devicebase.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/devicebase.py
index 2b8f85c663db..001b4ee239bf 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/devicebase.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/devicebase.py
@@ -215,6 +215,9 @@ def get_value(self, config):
             if ret:
                 return False, ("cmd write exec %s failed, log: %s" % (cmd, log))
             return True, log
+        if way == 'config':
+            value = config.get("value")
+            return True, value
         raise Exception("cannot found way deal")
 
     def devfile_read(self, loc, offset, length):
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py
index d283a50200be..7092f555c496 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py
@@ -216,7 +216,10 @@ def get_psu_input_output_status(self, psu_name):
         if psu is None:
             return -1
         psu.InputsCurrent.Value  # just for clear faults
-        if (psu.InputStatus is True) and (psu.OutputStatus is True):
+        if psu.InputStatus is True and psu.OutputStatus is True:
+            return True
+        # only has outputstatus
+        if psu.InputStatus is None and psu.OutputStatus is True:
             return True
         return False
 
@@ -246,6 +249,9 @@ def get_psu_status(self, psu_name):
         if psu is None:
             return -1
 
+        if psu.get_threshold_by_model == 1:
+            psu.get_fru_info()
+
         dic = collections.OrderedDict()
         # psu.get_Temperature()
         temp_dict = collections.OrderedDict()
@@ -327,7 +333,8 @@ def get_psu_power_status(self, psu_name):
         psu = self.chas.get_psu_byname(psu_name)
         if psu is None:
             return -1
-
+        if psu.get_threshold_by_model == 1:
+            psu.get_fru_info()
         dic = collections.OrderedDict()
         inputdic = collections.OrderedDict()
         Outputsdic = collections.OrderedDict()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py
index e7db0cdcca8b..a5fc3bf77098 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py
@@ -6,6 +6,7 @@
 #
 #######################################################
 from eepromutil.fru import ipmifru
+from eepromutil.cust_fru import CustFru
 from plat_hal.devicebase import devicebase
 from plat_hal.sensor import sensor
 
@@ -60,30 +61,32 @@ class psu(devicebase):
     def __init__(self, conf=None):
         self.pmbus = conf.get("pmbusloc", None)
         self.e2loc = conf.get("e2loc", None)
+        self.e2_type = conf.get('e2_type', "fru")
         self.__presentconfig = conf.get("present", None)
         self.name = conf.get("name", None)
+        self.get_threshold_by_model = conf.get("get_threshold_by_model", 0)
         self.AirFlowconifg = conf.get("airflow", None)
         self.psu_display_name_conifg = conf.get("psu_display_name", None)
         self.psu_not_present_pwm = conf.get("psu_not_present_pwm", 100)
         self.Temperature_config = conf.get("Temperature", None)
-        self.Temperature = sensor(self.Temperature_config)
+        self.Temperature = sensor(self.Temperature_config, self.get_psu_model)
 
         self.FanSpeedTolerance = conf.get('psu_fan_tolerance', 30)
         self.FanSpeed_config = conf.get("FanSpeed", None)
-        self.FanSpeed = sensor(self.FanSpeed_config)
+        self.FanSpeed = sensor(self.FanSpeed_config, self.get_psu_model)
 
         self.__InputsVoltage_config = conf.get("InputsVoltage", None)
         self.generate_psu_input_vol(self.__InputsVoltage_config)
         self.__InputsCurrent_config = conf.get("InputsCurrent", None)
-        self.InputsCurrent = sensor(self.__InputsCurrent_config)
+        self.InputsCurrent = sensor(self.__InputsCurrent_config, self.get_psu_model)
         self.__InputsPower_config = conf.get("InputsPower", None)
-        self.InputsPower = sensor(self.__InputsPower_config)
+        self.InputsPower = sensor(self.__InputsPower_config, self.get_psu_model)
         self.__OutputsVoltage_config = conf.get("OutputsVoltage", None)
-        self.OutputsVoltage = sensor(self.__OutputsVoltage_config)
+        self.OutputsVoltage = sensor(self.__OutputsVoltage_config, self.get_psu_model)
         self.__OutputsCurrent_config = conf.get("OutputsCurrent", None)
-        self.OutputsCurrent = sensor(self.__OutputsCurrent_config)
+        self.OutputsCurrent = sensor(self.__OutputsCurrent_config, self.get_psu_model)
         self.__OutputsPower_config = conf.get("OutputsPower", None)
-        self.OutputsPower = sensor(self.__OutputsPower_config)
+        self.OutputsPower = sensor(self.__OutputsPower_config, self.get_psu_model)
 
         self.__InputStatus_config = conf.get("InputsStatus", None)
         self.__OutputStatus_config = conf.get("OutputsStatus", None)
@@ -95,10 +98,17 @@ def __init__(self, conf=None):
         self.__TempStatus_config = conf.get("TempStatus", None)
         self.__FanStatus_config = conf.get("FanStatus", None)
 
+    def get_psu_model(self):
+        if self.productPartModelName is None:
+            ret = self.get_fru_info()
+            if ret is False:
+                return None
+        return self.productPartModelName
+
     def generate_psu_input_vol(self, config):
         tmp = {}
         for (key, item) in config.items():
-            tmp.setdefault(key, sensor(item))
+            tmp.setdefault(key, sensor(item, self.get_psu_model))
         self.__InputsVoltage = tmp
 
     def get_psu_sensor_by_name(self, psutype):
@@ -158,14 +168,21 @@ def OutputsPower(self, val):
 
     @property
     def InputStatus(self):
+        if self.__InputStatus_config is None:
+            return None
         if self.present is False:
             self.__InputStatus = False
         else:
             ret, val = self.get_value(self.__InputStatus_config)
             mask = self.__InputStatus_config.get("mask")
             if ret is True:
-                ttt = val & mask
-                if ttt == 0:
+                if isinstance(val, str):
+                    value = int(val, 16)
+                else:
+                    value = val
+                ttt = value & mask
+                okval = self.__InputStatus_config.get("okval", 0)
+                if ttt == okval:
                     self.__InputStatus = True
                 else:
                     self.__InputStatus = False
@@ -187,8 +204,13 @@ def TempStatus(self):
             ret, val = self.get_value(self.__TempStatus_config)
             mask = self.__TempStatus_config.get("mask")
             if ret is True:
-                ttt = val & mask
-                if ttt == 0:
+                if isinstance(val, str):
+                    value = int(val, 16)
+                else:
+                    value = val
+                ttt = value & mask
+                okval = self.__TempStatus_config.get("okval", 0)
+                if ttt == okval:
                     self.__TempStatus = True
                 else:
                     self.__TempStatus = False
@@ -210,8 +232,13 @@ def FanStatus(self):
             ret, val = self.get_value(self.__FanStatus_config)
             mask = self.__FanStatus_config.get("mask")
             if ret is True:
-                ttt = val & mask
-                if ttt == 0:
+                if isinstance(val, str):
+                    value = int(val, 16)
+                else:
+                    value = val
+                ttt = value & mask
+                okval = self.__FanStatus_config.get("okval", 0)
+                if ttt == okval:
                     self.__FanStatus = True
                 else:
                     self.__FanStatus = False
@@ -223,9 +250,8 @@ def FanStatus(self):
     def FanStatus(self, val):
         self.__FanStatus = val
 
-    @property
-    def InputsType(self):
-        psutypedecode = self.__InputsType_config.get('psutypedecode', None)
+    def get_input_type_pmbus(self):
+        psutypedecode = self.__InputsType_config.get('psutypedecode', {})
         if self.present is False:
             self.__InputsType = psutypedecode.get(0x00)
         else:
@@ -239,6 +265,30 @@ def InputsType(self):
                 self.__InputsType = psutypedecode.get(0x00)
         return self.__InputsType
 
+    def get_input_type_fru(self):
+        self.__InputsType = 'N/A'
+        if self.productPartModelName is None:
+            ret = self.get_fru_info()
+            if ret is False:
+                return self.__InputsType
+        psutypedecode = self.__InputsType_config.get('psutypedecode', {})
+        for key, value in psutypedecode.items():
+            if self.productPartModelName in value:
+                self.__InputsType = key
+        return self.__InputsType
+
+    @property
+    def InputsType(self):
+        gettype = self.__InputsType_config.get('gettype', "pmbus")
+        if gettype == "pmbus":
+            return self.get_input_type_pmbus()
+
+        if gettype == "fru":
+            return self.get_input_type_fru()
+
+        self.__InputsType = 'N/A'
+        return self.__InputsType
+
     @InputsType.setter
     def InputsType(self, val):
         self.__InputsType = val
@@ -269,14 +319,21 @@ def FanSpeedTolerance(self, val):
 
     @property
     def OutputStatus(self):
+        if self.__OutputStatus_config is None:
+            return None
         if self.present is False:
             self.__OutputStatus = False
         else:
             ret, val = self.get_value(self.__OutputStatus_config)
             mask = self.__OutputStatus_config.get("mask")
             if ret is True:
-                ttt = val & mask
-                if ttt == 0:
+                if isinstance(val, str):
+                    value = int(val, 16)
+                else:
+                    value = val
+                ttt = value & mask
+                okval = self.__OutputStatus_config.get("okval", 0)
+                if ttt == okval:
                     self.__OutputStatus = True
                 else:
                     self.__OutputStatus = False
@@ -476,6 +533,8 @@ def __str__(self):
         return tmpstr
 
     def get_fan_speed_pwm(self):
+        if self.pmbus is None:
+            return None
         if self.present is False:
             return self.psu_not_present_pwm
         selfconfig = {}
@@ -496,6 +555,10 @@ def set_fan_speed_pwm(self, pwm):
         '''
         if self.present is False:
             return None
+
+        if self.pmbus is None:
+            return None
+
         if 0 <= pwm <= 100:
             # enable duty first
             selfconfig = {}
@@ -559,13 +622,44 @@ def get_fru_info_by_decode(self):
             return False
         return True
 
+    def get_custfru_info_by_decode(self):
+        try:
+            eeprom = self.get_eeprom_info(self.e2loc)
+            if eeprom is None:
+                raise Exception("%s:value is none" % self.name)
+            custfru = CustFru()
+            if isinstance(eeprom, bytes):
+                eeprom = self.byteTostr(eeprom)
+            custfru.decode(eeprom)
+            self.productManufacturer = custfru.manufacturer.strip()
+            self.productName = custfru.product_name.strip()
+            self.productPartModelName = custfru.product_name.strip()
+            self.productVersion = custfru.version.strip()
+            self.productSerialNumber = custfru.serial_number.strip().replace(chr(0), "")
+        except Exception:
+            self.productManufacturer = None
+            self.productName = None
+            self.productPartModelName = None
+            self.productVersion = None
+            self.productSerialNumber = None
+            return False
+        return True
+
     def get_fru_info(self):
         try:
             if self.present is not True:
                 raise Exception("%s: not present" % self.name)
+
             if self.get_fru_info_by_sysfs() is True:
                 return True
-            return self.get_fru_info_by_decode()
+
+            if self.e2_type == "fru":
+                return self.get_fru_info_by_decode()
+
+            if self.e2_type == "custfru":
+                return self.get_custfru_info_by_decode()
+
+            raise Exception("%s: unsupport e2_type: %s" % (self.name, self.e2_type))
         except Exception:
             self.productManufacturer = None
             self.productName = None
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/sensor.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/sensor.py
index 2b4e05e00e43..af2a5384b618 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/sensor.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/sensor.py
@@ -135,10 +135,23 @@ def Value(self, val):
     @property
     def Min(self):
         try:
-            if self.format is None:
-                self.__Min = self.Min_config
+            if isinstance(self.Min_config, dict):
+                if self.call_back is None:
+                    self.__Min = self.Min_config.get("other")
+                else:
+                    ret = self.call_back()
+                    if ret not in self.Min_config:
+                        self.__Min = self.Min_config.get("other")
+                    else:
+                        self.__Min = self.Min_config[ret]
             else:
-                self.__Min = self.get_format_value(self.format % self.Min_config)
+                self.__Min = self.Min_config
+
+            if self.__Min is None:
+                return None
+
+            if self.format is not None:
+                self.__Min = self.get_format_value(self.format % self.__Min)
             self.__Min = round(float(self.__Min), 3)
         except Exception:
             return None
@@ -151,10 +164,23 @@ def Min(self, val):
     @property
     def Max(self):
         try:
-            if self.format is None:
-                self.__Max = self.Max_config
+            if isinstance(self.Max_config, dict):
+                if self.call_back is None:
+                    self.__Max = self.Max_config.get("other")
+                else:
+                    ret = self.call_back()
+                    if ret not in self.Max_config:
+                        self.__Max = self.Max_config.get("other")
+                    else:
+                        self.__Max = self.Max_config[ret]
             else:
-                self.__Max = self.get_format_value(self.format % self.Max_config)
+                self.__Max = self.Max_config
+
+            if self.__Max is None:
+                return None
+
+            if self.format is not None:
+                self.__Max = self.get_format_value(self.format % self.__Max)
             self.__Max = round(float(self.__Max), 3)
         except Exception:
             return None
@@ -167,10 +193,24 @@ def Max(self, val):
     @property
     def Low(self):
         try:
-            if self.format is None:
-                self.__Low = self.Low_config
+            if isinstance(self.Low_config, dict):
+                if self.call_back is None:
+                    self.__Low = self.Low_config.get("other")
+                else:
+                    ret = self.call_back()
+                    if ret not in self.Low_config:
+                        self.__Low = self.Low_config.get("other")
+                    else:
+                        self.__Low = self.Low_config[ret]
             else:
-                self.__Low = self.get_format_value(self.format % self.Low_config)
+                self.__Low = self.Low_config
+
+            if self.__Low is None:
+                return None
+
+            if self.format is not None:
+                self.__Low = self.get_format_value(self.format % self.__Low)
+            self.__Low = round(float(self.__Low), 3)
         except Exception:
             return None
         return self.__Low
@@ -182,10 +222,24 @@ def Low(self, val):
     @property
     def High(self):
         try:
-            if self.format is None:
-                self.__High = self.High_config
+            if isinstance(self.High_config, dict):
+                if self.call_back is None:
+                    self.__High = self.High_config.get("other")
+                else:
+                    ret = self.call_back()
+                    if ret not in self.High_config:
+                        self.__High = self.High_config.get("other")
+                    else:
+                        self.__High = self.High_config[ret]
             else:
-                self.__High = self.get_format_value(self.format % self.High_config)
+                self.__High = self.High_config
+
+            if self.__High is None:
+                return None
+
+            if self.format is not None:
+                self.__High = self.get_format_value(self.format % self.__High)
+            self.__High = round(float(self.__High), 3)
         except Exception:
             return None
         return self.__High
@@ -194,7 +248,7 @@ def High(self):
     def High(self, val):
         self.__High = val
 
-    def __init__(self, conf=None):
+    def __init__(self, conf=None, call_back=None):
         self.ValueConfig = conf.get("value", None)
         self.Flag = conf.get("flag", None)
         self.Min_config = conf.get("Min", None)
@@ -204,6 +258,7 @@ def __init__(self, conf=None):
         self.Unit = conf.get('Unit', None)
         self.format = conf.get('format', None)
         self.read_times = conf.get('read_times', 1)
+        self.call_back = call_back
 
     def __str__(self):
         formatstr =  \
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf b/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf
index 5e861802d915..39d56582bd1d 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf
@@ -3,3 +3,5 @@ blacklist wb_i2c_i801
 blacklist wb_spi_gpio
 blacklist intel_spi
 blacklist intel_spi_platform
+blacklist wb_i2c_ismt
+blacklist intel_spi_pci
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
index 8727f1f508f1..a31299039ab4 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
@@ -11,6 +11,8 @@ KERNEL_MODULES_SRC = $(PWD)/linux-5.10
 
 PLAT_SYSFS_DIR = $(PWD)/plat_sysfs
 INTEL_SPI = $(PWD)/intel_spi
+PHY = $(PWD)/phy
+PINCTRL = $(PWD)/pinctrl
 
 export PLAT_SYSFS_DIR
 
@@ -39,11 +41,14 @@ obj-m += wb_spi_gpio_device.o
 obj-m += wb_spi_nor_device.o
 obj-m += wb_xdpe132g5c.o
 obj-m += wb_uio_irq.o
+obj-m += hw_test.o
 
 all :
 	$(MAKE) -C $(KERNEL_MODULES_SRC)
 	$(MAKE) -C $(PLAT_SYSFS_DIR)
 	$(MAKE) -C $(INTEL_SPI)
+	$(MAKE) -C $(PHY)
+	$(MAKE) -C $(PINCTRL)
 	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
 	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
 	cp -p  $(PWD)/*.ko $(module_out_put_dir)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.c
new file mode 100644
index 000000000000..e74f4e800582
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.c
@@ -0,0 +1,608 @@
+/*
+ * hw_test.c
+ * Original Author : support, 2020-10-15
+ *
+ * History
+ *    v1.0    support  2020-10-15  Initial version.
+ */
+
+#include <linux/miscdevice.h>
+#include <linux/delay.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/fs.h>
+#include <linux/types.h>
+#include <linux/delay.h>
+#include <linux/moduleparam.h>
+#include <linux/slab.h>
+#include <linux/errno.h>
+#include <linux/ioctl.h>
+#include <linux/cdev.h>
+#include <linux/string.h>
+#include <linux/list.h>
+#include <linux/pci.h>
+#include <linux/uaccess.h>
+#include <asm/atomic.h>
+#include <asm/unistd.h>
+#include <linux/major.h>
+#include <linux/device.h>
+#include <linux/miscdevice.h>
+#include <asm/irq.h>
+#include <linux/phy.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+
+#include "hw_test.h"
+
+extern struct bus_type mdio_bus_type;
+
+struct board_mdio_dev {
+    struct list_head list;
+    struct mii_bus *mdio_bus;
+    int mdio_index;
+};
+
+struct board_phy_dev {
+    struct list_head list;
+    struct phy_device *phydev;
+    int phy_index;
+};
+
+static LIST_HEAD(mdio_dev_list);
+static LIST_HEAD(phydev_list);
+static struct class *class_mdio_bus = NULL;
+
+#define PRINT_BUF_SIZE         (256)
+#define INVALID_PHY_ADDR       (0xFF)
+#define MAX_MDIO_DEVICE_NUMS   (1000)
+#define MAX_PHY_DEVICE_NUMS    (1000)
+
+#define dram_debug(fmt, ...) \
+        printk(KERN_NOTICE pr_fmt(fmt), ##__VA_ARGS__)
+
+static ssize_t dram_dev_read (struct file *file, char __user *buf, size_t count,
+                              loff_t *offset)
+{
+    u8 value8;
+    u16 value16;
+    u32 value32;
+
+    if (file->private_data != NULL) {
+        return -EINVAL;
+    }
+
+    file->private_data = ioremap(file->f_pos, count);
+
+    if (!file->private_data) {
+        pr_notice("%s, %d\n", __FUNCTION__, __LINE__);
+        return -ENODEV;
+    }
+
+    rmb();
+    switch (count) {
+    case 1:
+        value8 = readb(file->private_data);
+        if (copy_to_user(buf, &value8, sizeof(u8))) {
+            return -EFAULT;
+        }
+        break;
+    case 2:
+        value16 = readw(file->private_data);
+        if (copy_to_user(buf, &value16, sizeof(u16))) {
+            return -EFAULT;
+        }
+        break;
+    case 4:
+        value32 = readl(file->private_data);
+        if (copy_to_user(buf, &value32, sizeof(u32))) {
+            return -EFAULT;
+        }
+        break;
+    default:
+        return -EINVAL;
+    }
+
+    iounmap(file->private_data);
+    file->private_data = NULL;
+    return count;
+
+}
+
+static ssize_t dram_dev_write (struct file *file, const char __user *buf, size_t count,
+                               loff_t *offset)
+{
+    u8 value8;
+    u16 value16;
+    u32 value32;
+
+    if (file->private_data != NULL) {
+        return -EINVAL;
+    }
+
+    file->private_data = ioremap(file->f_pos, count);
+
+    if (!file->private_data) {
+        pr_err("%s, %d\n", __FUNCTION__, __LINE__);
+        return -ENODEV;
+    }
+
+    switch (count) {
+    case 1:
+        if (copy_from_user(&value8, buf, sizeof(u8))) {
+            return -EFAULT;
+        }
+        writeb(value8, file->private_data);
+        break;
+    case 2:
+        if (copy_from_user(&value16, buf, sizeof(u16))) {
+            return -EFAULT;
+        }
+        writew(value16, file->private_data);
+        break;
+    case 4:
+        if (copy_from_user(&value32, buf, sizeof(u32))) {
+            return -EFAULT;
+        }
+        writel(value32, file->private_data);
+        break;
+    default:
+        return -EINVAL;
+    }
+
+    wmb();
+    iounmap(file->private_data);
+    file->private_data = NULL;
+    return count;
+}
+
+static loff_t dram_dev_llseek(struct file *file, loff_t offset, int origin)
+{
+    loff_t ret;
+
+    switch (origin) {
+        case 0:
+            file->f_pos = offset;
+            ret = file->f_pos;
+            break;
+        case 1:
+            file->f_pos += offset;
+            ret = file->f_pos;
+            break;
+        default:
+            ret = -EINVAL;
+    }
+    return ret;
+}
+
+static int temp_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
+{
+    return 0;
+}
+
+static int temp_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum, u16 value)
+{
+    return 0;
+}
+
+static int init_class_mdio_bus(void)
+{
+    struct mii_bus *bus;
+    int err = 0;
+
+    bus = mdiobus_alloc();
+
+	bus->name  = "temp_mdio_bus";
+    snprintf(bus->id, MII_BUS_ID_SIZE, "temp_mdio_bus0");
+    bus->read  = temp_mdiobus_read;
+	bus->write = temp_mdiobus_write;
+
+	err = mdiobus_register(bus);
+	if (err) {
+        printk(KERN_ERR "temp mdio bus register fail\n");
+        return -1;
+	}
+
+    class_mdio_bus = bus->dev.class;
+    mdiobus_unregister(bus);
+
+    return 0;
+}
+
+static int mdio_match_success(struct device *dev, const void * data)
+{
+
+    return 1;
+}
+
+static int add_all_mdio_devices_to_list(void)
+{
+    struct device *dev, *dev_start = NULL;
+    struct board_mdio_dev *mdio_dev = NULL;
+    int i = 0;
+    struct class *bus_class = class_mdio_bus;
+
+    for (i = 0; i < MAX_MDIO_DEVICE_NUMS; i++) {
+        dev = class_find_device(bus_class, dev_start, NULL, mdio_match_success);
+        if (dev != NULL) {
+            mdio_dev = kzalloc(sizeof(struct board_mdio_dev), GFP_KERNEL);
+            if (mdio_dev == NULL) {
+                printk(KERN_ERR "%s: alloc fail\n", __func__);
+                return -EFAULT;
+            }
+
+            mdio_dev->mdio_index = i;
+            mdio_dev->mdio_bus = to_mii_bus(dev);
+            list_add_tail(&mdio_dev->list, &mdio_dev_list);
+
+            dev_start = dev;
+        } else {
+            break;
+        }
+    }
+
+    printk(KERN_INFO "mdio dev numbers = %d\n", i);
+
+    return 0;
+}
+
+static void delete_all_mdio_devices_from_list(void)
+{
+    struct list_head *n, *pos;
+    struct board_mdio_dev *mdio_dev;
+
+    list_for_each_safe(pos, n, &mdio_dev_list) {
+        list_del(pos);
+        mdio_dev = list_entry(pos, struct board_mdio_dev, list);
+        kfree(mdio_dev);
+    }
+
+    return;
+}
+
+void list_all_mdio_devices_info(void)
+{
+    struct board_mdio_dev *mdio_dev;
+    unsigned char phyaddr[PHY_MAX_ADDR];
+    int i = 0, j = 0;
+    int phydev_num = 0;
+    char buf[PRINT_BUF_SIZE];
+    int len = 0;
+
+    printk(KERN_INFO "all the mdio devs info:\n");
+    printk(KERN_INFO "index        busid                 name                  phy_num     phyaddr \n");
+    list_for_each_entry(mdio_dev, &mdio_dev_list, list) {
+        i = 0;
+        j = 0;
+        phydev_num = 0;
+        mem_clear(phyaddr, INVALID_PHY_ADDR, sizeof(phyaddr));
+        mem_clear(buf, 0, sizeof(buf));
+
+        for (i = 0; i < PHY_MAX_ADDR; i++) {
+            if (mdio_dev->mdio_bus->mdio_map[i]) {
+                phydev_num++;
+                phyaddr[j] = (unsigned char)i;
+                j++;
+            }
+        }
+
+        len = snprintf(buf, sizeof(buf), "  %-10d  %-20s  %-20s  %-10d ", mdio_dev->mdio_index,
+                  mdio_dev->mdio_bus->id, mdio_dev->mdio_bus->name, phydev_num);
+
+        for (i = 0; i < PHY_MAX_ADDR; i++) {
+            if (phyaddr[i] == INVALID_PHY_ADDR) {
+                break;
+            }
+
+            len += snprintf(&buf[len], sizeof(buf) - len,  " %#x", phyaddr[i]);
+        }
+
+        printk(KERN_INFO "%s\n", buf);
+    }
+
+    return;
+}
+
+static struct mii_bus *get_mdio_dev_according_to_index(int mdio_index)
+{
+    struct board_mdio_dev *mdio_dev;
+    list_for_each_entry(mdio_dev, &mdio_dev_list, list) {
+        if (mdio_dev->mdio_index == mdio_index) {
+            return mdio_dev->mdio_bus;
+        }
+    }
+
+    printk(KERN_ERR "no exist the mdio dev it's mdio_index = %d, please exec cmd [hw_test.bin mdiodev_list] to view mdiodev info\n",
+        mdio_index);
+
+    return NULL;
+}
+
+int board_mdio_read(int mdio_index, int phyaddr, u32 regnum)
+{
+    struct mii_bus *bus;
+    int reg_val;
+
+    bus = get_mdio_dev_according_to_index(mdio_index);
+    if (bus == NULL) {
+        return -1;
+    }
+
+    reg_val = mdiobus_read(bus, phyaddr, regnum);
+
+    return reg_val;
+}
+
+int board_mdio_write(int mdio_index, int phyaddr, u32 regnum, u16 val)
+{
+    struct mii_bus *bus;
+    int ret;
+
+    bus = get_mdio_dev_according_to_index(mdio_index);
+    if (bus == NULL) {
+        return -1;
+    }
+
+    ret = mdiobus_write(bus, phyaddr, regnum, val);
+
+    return ret;
+}
+
+static int phy_match_success(struct device *dev, const void * data)
+{
+
+    return 1;
+}
+
+static int add_all_phydevs_to_list(void)
+{
+    struct device *dev, *dev_start = NULL;
+    struct board_phy_dev *board_phydev = NULL;
+    int i = 0;
+
+    for (i = 0; i < MAX_PHY_DEVICE_NUMS; i++) {
+        dev = bus_find_device(&mdio_bus_type, dev_start, NULL, phy_match_success);
+        if (dev != NULL) {
+            board_phydev = kzalloc(sizeof(struct board_phy_dev), GFP_KERNEL);
+            if (board_phydev == NULL) {
+                printk(KERN_ERR "%s: alloc fail\n", __func__);
+                return -EFAULT;
+            }
+
+            board_phydev->phy_index = i;
+            board_phydev->phydev = to_phy_device(dev);
+            list_add_tail(&board_phydev->list, &phydev_list);
+
+            dev_start = dev;
+        } else {
+            break;
+        }
+    }
+
+    printk(KERN_INFO "phydev num = %d\n", i);
+
+    return 0;
+}
+
+static void delete_all_phydevs_from_list(void)
+{
+    struct list_head *n, *pos;
+    struct board_phy_dev *board_phydev;
+
+    list_for_each_safe(pos, n, &phydev_list) {
+        list_del(pos);
+        board_phydev = list_entry(pos, struct board_phy_dev, list);
+        kfree(board_phydev);
+    }
+
+    return;
+}
+
+void list_all_phydevs_info(void)
+{
+    struct board_phy_dev *board_phydev;
+
+    printk(KERN_INFO "all the phydevs info:\n");
+    printk(KERN_INFO "index        phyaddr     phyId       phydev_name\n");
+    list_for_each_entry(board_phydev, &phydev_list, list) {
+        printk(KERN_INFO "  %-10d  %#-10x  %#-10x  %-20s\n", board_phydev->phy_index, board_phydev->phydev->mdio.addr,\
+              board_phydev->phydev->phy_id, dev_name(&board_phydev->phydev->mdio.dev));
+    }
+
+    return;
+}
+
+static struct phy_device *get_phy_dev_according_to_index(int phy_index)
+{
+    struct board_phy_dev *board_phydev;
+    list_for_each_entry(board_phydev, &phydev_list, list) {
+        if (board_phydev->phy_index == phy_index) {
+            return board_phydev->phydev;
+        }
+    }
+
+    printk(KERN_ERR "no exist the phydev it's phy_index = %d, please exec cmd [hw_test.bin phydev_list] to view phydev info\n", phy_index);
+
+    return NULL;
+}
+
+int board_phy_read(int phy_index, u32 regnum)
+{
+    struct phy_device *phydev;
+    int reg_val;
+
+    phydev = get_phy_dev_according_to_index(phy_index);
+    if (phydev == NULL) {
+        return -1;
+    }
+
+    reg_val = phy_read(phydev, regnum);
+
+    return reg_val;
+}
+
+int board_phy_write(int phy_index, u32 regnum, u16 val)
+{
+    struct phy_device *phydev;
+    int ret;
+
+    phydev = get_phy_dev_according_to_index(phy_index);
+    if (phydev == NULL) {
+        return -1;
+    }
+
+    ret = phy_write(phydev, regnum, val);
+
+    return ret;
+}
+
+static long dram_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+    void __user *argp = (void __user *)arg;
+    int ret = 0;
+    struct phydev_user_info phy_user_info;
+    struct mdio_dev_user_info mdio_user_info;
+
+    switch (cmd) {
+    case CMD_PHY_LIST:
+        list_all_phydevs_info();
+        break;
+
+    case CMD_PHY_READ:
+        if (copy_from_user(&phy_user_info, argp, sizeof(struct phydev_user_info)))
+            return -EFAULT;
+
+        ret = board_phy_read(phy_user_info.phy_index, phy_user_info.regnum);
+        if (ret < 0) {
+            return -EFAULT;
+        }
+
+        phy_user_info.regval = (u32)ret;
+
+        if (copy_to_user(argp, &phy_user_info, sizeof(struct phydev_user_info)))
+            return -EFAULT;
+
+        break;
+
+    case CMD_PHY_WRITE:
+        if (copy_from_user(&phy_user_info, argp, sizeof(struct phydev_user_info)))
+            return -EFAULT;
+
+        ret = board_phy_write(phy_user_info.phy_index, phy_user_info.regnum, (u16)phy_user_info.regval);
+        if (ret < 0) {
+            return -EFAULT;
+        }
+
+        break;
+
+    case CMD_MDIO_LIST:
+        list_all_mdio_devices_info();
+        break;
+
+    case CMD_MDIO_READ:
+        if (copy_from_user(&mdio_user_info, argp, sizeof(struct mdio_dev_user_info)))
+            return -EFAULT;
+
+        ret = board_mdio_read(mdio_user_info.mdio_index, mdio_user_info.phyaddr, mdio_user_info.regnum);
+        if (ret < 0) {
+            return -EFAULT;
+        }
+
+        mdio_user_info.regval = (u32)ret;
+
+        if (copy_to_user(argp, &mdio_user_info, sizeof(struct mdio_dev_user_info)))
+            return -EFAULT;
+
+        break;
+
+    case CMD_MDIO_WRITE:
+        if (copy_from_user(&mdio_user_info, argp, sizeof(struct mdio_dev_user_info)))
+            return -EFAULT;
+
+        ret = board_mdio_write(mdio_user_info.mdio_index, mdio_user_info.phyaddr, mdio_user_info.regnum, (u16)mdio_user_info.regval);
+        if (ret < 0) {
+            return -EFAULT;
+        }
+
+        break;
+
+    default:
+        printk("unknown ioctl cmd\n");
+        break;
+    }
+
+    return 0;
+}
+
+static int dram_dev_open(struct inode *inode, struct file *file)
+{
+    file->private_data = NULL;
+    file->f_pos = 0;
+    return 0;
+
+}
+
+static int dram_dev_release(struct inode *inode, struct file *file)
+{
+    if (file->private_data) {
+        iounmap(file->private_data);
+    }
+    return 0;
+}
+
+static const struct file_operations dram_dev_fops = {
+    .owner      = THIS_MODULE,
+    .llseek     = dram_dev_llseek,
+    .read       = dram_dev_read,
+    .write      = dram_dev_write,
+    .unlocked_ioctl = dram_dev_ioctl,
+    .open       = dram_dev_open,
+    .release    = dram_dev_release,
+};
+
+static struct miscdevice dram_dev = {
+    .minor  = MISC_DYNAMIC_MINOR,
+    .name   = "dram_test",
+    .fops   = &dram_dev_fops,
+};
+
+static int __init dram_init(void)
+{
+    if (add_all_phydevs_to_list() != 0) {
+        printk(KERN_ERR "add all phydev to list fail\n");
+        delete_all_phydevs_from_list();
+        return -ENXIO;
+    }
+
+    if (init_class_mdio_bus() == 0) {
+        if (add_all_mdio_devices_to_list() == -EFAULT) {
+            printk(KERN_ERR "add all mdiodev to list fail\n");
+            delete_all_mdio_devices_from_list();
+            delete_all_phydevs_from_list();
+            return -ENXIO;
+        }
+    }
+
+    if (misc_register(&dram_dev) != 0) {
+        pr_notice("Register %s failed.\n", dram_dev.name);
+        delete_all_mdio_devices_from_list();
+        delete_all_phydevs_from_list();
+        return -ENXIO;
+    }
+
+    return 0;
+}
+
+static void __exit dram_exit(void)
+{
+    misc_deregister(&dram_dev);
+
+    delete_all_mdio_devices_from_list();
+    delete_all_phydevs_from_list();
+}
+
+module_init(dram_init);
+module_exit(dram_exit);
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.h
new file mode 100644
index 000000000000..695fa336c4ff
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/hw_test.h
@@ -0,0 +1,31 @@
+
+#ifndef _LINUX_DRAM_DRIVER_H
+#define _LINUX_DRAM_DRIVER_H
+
+#include <linux/types.h>
+#include <linux/compiler.h>
+
+#define mem_clear(data, val, size) memset((data), val, (size))
+
+struct phydev_user_info {
+    int phy_index;
+    u32 regnum;
+    u32 regval;
+};
+
+#define CMD_PHY_LIST                        _IOR('P', 0, struct phydev_user_info)
+#define CMD_PHY_READ                        _IOR('P', 1, struct phydev_user_info)
+#define CMD_PHY_WRITE                       _IOR('P', 2, struct phydev_user_info)
+
+struct mdio_dev_user_info {
+    int mdio_index;
+    int phyaddr;
+    u32 regnum;
+    u32 regval;
+};
+
+#define CMD_MDIO_LIST                        _IOR('M', 0, struct mdio_dev_user_info)
+#define CMD_MDIO_READ                        _IOR('M', 1, struct mdio_dev_user_info)
+#define CMD_MDIO_WRITE                       _IOR('M', 2, struct mdio_dev_user_info)
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/Makefile
index 269e95019cba..b84963167b0b 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/Makefile
@@ -10,6 +10,7 @@ EXTRA_CFLAGS+= -Wall
 
 obj-m := intel_spi.o
 obj-m += intel_spi_platform.o
+obj-m += intel_spi_pci.o
 
 all:
 	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi.c
index 98de90f0c0b2..a111d52211e4 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi.c
@@ -53,17 +53,17 @@
 #define FRACC				0x50
 
 #define FREG(n)				(0x54 + ((n) * 4))
-#define FREG_BASE_MASK			0x3fff
+#define FREG_BASE_MASK			GENMASK(14, 0)
 #define FREG_LIMIT_SHIFT		16
-#define FREG_LIMIT_MASK			(0x03fff << FREG_LIMIT_SHIFT)
+#define FREG_LIMIT_MASK			GENMASK(30, 16)
 
 /* Offset is from @ispi->pregs */
 #define PR(n)				((n) * 4)
 #define PR_WPE				BIT(31)
 #define PR_LIMIT_SHIFT			16
-#define PR_LIMIT_MASK			(0x3fff << PR_LIMIT_SHIFT)
+#define PR_LIMIT_MASK			GENMASK(30, 16)
 #define PR_RPE				BIT(15)
-#define PR_BASE_MASK			0x3fff
+#define PR_BASE_MASK			GENMASK(14, 0)
 
 /* Offsets are from @ispi->sregs */
 #define SSFSTS_CTL			0x00
@@ -117,7 +117,7 @@
 #define ERASE_OPCODE_SHIFT		8
 #define ERASE_OPCODE_MASK		(0xff << ERASE_OPCODE_SHIFT)
 #define ERASE_64K_OPCODE_SHIFT		16
-#define ERASE_64K_OPCODE_MASK		(0xff << ERASE_OPCODE_SHIFT)
+#define ERASE_64K_OPCODE_MASK		(0xff << ERASE_64K_OPCODE_SHIFT)
 
 #define INTEL_SPI_TIMEOUT		5000 /* ms */
 #define INTEL_SPI_FIFO_SZ		64
@@ -132,7 +132,6 @@
  * @sregs: Start of software sequencer registers
  * @nregions: Maximum number of regions
  * @pr_num: Maximum number of protected range registers
- * @writeable: Is the chip writeable
  * @locked: Is SPI setting locked
  * @swseq_reg: Use SW sequencer in register reads/writes
  * @swseq_erase: Use SW sequencer in erase operation
@@ -150,7 +149,6 @@ struct intel_spi {
 	void __iomem *sregs;
 	size_t nregions;
 	size_t pr_num;
-	bool writeable;
 	bool locked;
 	bool swseq_reg;
 	bool swseq_erase;
@@ -305,6 +303,14 @@ static int intel_spi_wait_sw_busy(struct intel_spi *ispi)
 				  INTEL_SPI_TIMEOUT * 1000);
 }
 
+static bool intel_spi_set_writeable(struct intel_spi *ispi)
+{
+	if (!ispi->info->set_writeable)
+		return false;
+
+	return ispi->info->set_writeable(ispi->base, ispi->info->data);
+}
+
 static int intel_spi_init(struct intel_spi *ispi)
 {
 	u32 opmenu0, opmenu1, lvscc, uvscc, val;
@@ -317,19 +323,6 @@ static int intel_spi_init(struct intel_spi *ispi)
 		ispi->nregions = BYT_FREG_NUM;
 		ispi->pr_num = BYT_PR_NUM;
 		ispi->swseq_reg = true;
-
-		if (writeable) {
-			/* Disable write protection */
-			val = readl(ispi->base + BYT_BCR);
-			if (!(val & BYT_BCR_WPD)) {
-				val |= BYT_BCR_WPD;
-				writel(val, ispi->base + BYT_BCR);
-				val = readl(ispi->base + BYT_BCR);
-			}
-
-			ispi->writeable = !!(val & BYT_BCR_WPD);
-		}
-
 		break;
 
 	case INTEL_SPI_LPT:
@@ -359,6 +352,12 @@ static int intel_spi_init(struct intel_spi *ispi)
 		return -EINVAL;
 	}
 
+	/* Try to disable write protection if user asked to do so */
+	if (writeable && !intel_spi_set_writeable(ispi)) {
+		dev_warn(ispi->dev, "can't disable chip write protection\n");
+		writeable = false;
+	}
+
 	/* Disable #SMI generation from HW sequencer */
 	val = readl(ispi->base + HSFSTS_CTL);
 	val &= ~HSFSTS_CTL_FSMIE;
@@ -885,9 +884,12 @@ static void intel_spi_fill_partition(struct intel_spi *ispi,
 		/*
 		 * If any of the regions have protection bits set, make the
 		 * whole partition read-only to be on the safe side.
+		 *
+		 * Also if the user did not ask the chip to be writeable
+		 * mask the bit too.
 		 */
-		if (intel_spi_is_protected(ispi, base, limit))
-			ispi->writeable = false;
+		if (!writeable || intel_spi_is_protected(ispi, base, limit))
+			part->mask_flags |= MTD_WRITEABLE;
 
 		end = (limit << 12) + 4096;
 		if (end > part->size)
@@ -928,7 +930,6 @@ struct intel_spi *intel_spi_probe(struct device *dev,
 
 	ispi->dev = dev;
 	ispi->info = info;
-	ispi->writeable = info->writeable;
 
 	ret = intel_spi_init(ispi);
 	if (ret)
@@ -946,10 +947,6 @@ struct intel_spi *intel_spi_probe(struct device *dev,
 
 	intel_spi_fill_partition(ispi, &part);
 
-	/* Prevent writes if not explicitly enabled */
-	if (!ispi->writeable || !writeable)
-		ispi->nor.mtd.flags &= ~MTD_WRITEABLE;
-
 	ret = mtd_device_register(&ispi->nor.mtd, &part, 1);
 	if (ret)
 		return ERR_PTR(ret);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi_pci.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi_pci.c
new file mode 100644
index 000000000000..a89050b8a525
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi_pci.c
@@ -0,0 +1,106 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Intel PCH/PCU SPI flash PCI driver.
+ *
+ * Copyright (C) 2016, Intel Corporation
+ * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
+ */
+
+#include <linux/ioport.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+
+#include "intel_spi.h"
+
+#define BCR		0xdc
+#define BCR_WPD		BIT(0)
+
+static bool intel_spi_pci_set_writeable(void __iomem *base, void *data)
+{
+	struct pci_dev *pdev = data;
+	u32 bcr;
+
+	/* Try to make the chip read/write */
+	pci_read_config_dword(pdev, BCR, &bcr);
+	if (!(bcr & BCR_WPD)) {
+		bcr |= BCR_WPD;
+		pci_write_config_dword(pdev, BCR, bcr);
+		pci_read_config_dword(pdev, BCR, &bcr);
+	}
+
+	return bcr & BCR_WPD;
+}
+
+static const struct intel_spi_boardinfo bxt_info = {
+	.type = INTEL_SPI_BXT,
+	.set_writeable = intel_spi_pci_set_writeable,
+};
+
+static const struct intel_spi_boardinfo cnl_info = {
+	.type = INTEL_SPI_CNL,
+	.set_writeable = intel_spi_pci_set_writeable,
+};
+
+static int intel_spi_pci_probe(struct pci_dev *pdev,
+			       const struct pci_device_id *id)
+{
+	struct intel_spi_boardinfo *info;
+	struct intel_spi *ispi;
+	int ret;
+
+	ret = pcim_enable_device(pdev);
+	if (ret)
+		return ret;
+
+	info = devm_kmemdup(&pdev->dev, (void *)id->driver_data, sizeof(*info),
+			    GFP_KERNEL);
+	if (!info)
+		return -ENOMEM;
+
+	info->data = pdev;
+	ispi = intel_spi_probe(&pdev->dev, &pdev->resource[0], info);
+	if (IS_ERR(ispi))
+		return PTR_ERR(ispi);
+
+	pci_set_drvdata(pdev, ispi);
+	return 0;
+}
+
+static void intel_spi_pci_remove(struct pci_dev *pdev)
+{
+	intel_spi_remove(pci_get_drvdata(pdev));
+}
+
+static const struct pci_device_id intel_spi_pci_ids[] = {
+	{ PCI_VDEVICE(INTEL, 0x02a4), (unsigned long)&bxt_info },
+	{ PCI_VDEVICE(INTEL, 0x06a4), (unsigned long)&bxt_info },
+	{ PCI_VDEVICE(INTEL, 0x18e0), (unsigned long)&bxt_info },
+	{ PCI_VDEVICE(INTEL, 0x19e0), (unsigned long)&bxt_info },
+	{ PCI_VDEVICE(INTEL, 0x1bca), (unsigned long)&bxt_info },
+	{ PCI_VDEVICE(INTEL, 0x34a4), (unsigned long)&bxt_info },
+	{ PCI_VDEVICE(INTEL, 0x43a4), (unsigned long)&cnl_info },
+	{ PCI_VDEVICE(INTEL, 0x4b24), (unsigned long)&bxt_info },
+	{ PCI_VDEVICE(INTEL, 0x4da4), (unsigned long)&bxt_info },
+	{ PCI_VDEVICE(INTEL, 0x7aa4), (unsigned long)&cnl_info },
+	{ PCI_VDEVICE(INTEL, 0xa0a4), (unsigned long)&bxt_info },
+	{ PCI_VDEVICE(INTEL, 0xa1a4), (unsigned long)&bxt_info },
+	{ PCI_VDEVICE(INTEL, 0xa224), (unsigned long)&bxt_info },
+	{ PCI_VDEVICE(INTEL, 0xa324), (unsigned long)&cnl_info },
+	{ PCI_VDEVICE(INTEL, 0xa3a4), (unsigned long)&bxt_info },
+	{ },
+};
+MODULE_DEVICE_TABLE(pci, intel_spi_pci_ids);
+
+static struct pci_driver intel_spi_pci_driver = {
+	.name = "intel-spi",
+	.id_table = intel_spi_pci_ids,
+	.probe = intel_spi_pci_probe,
+	.remove = intel_spi_pci_remove,
+};
+
+module_pci_driver(intel_spi_pci_driver);
+
+MODULE_DESCRIPTION("Intel PCH/PCU SPI flash PCI driver");
+MODULE_AUTHOR("support");
+MODULE_LICENSE("GPL v2");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi_platform.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi_platform.c
index b9f294860ce4..489716d4d545 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi_platform.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi_platform.c
@@ -47,7 +47,7 @@ MODULE_PARM_DESC(writeable, "Enable write access to BIOS (default=0)");
         } \
     } while (0)
 
-static void intel_spi_enable_bios_write(struct pci_dev *pci_dev, struct intel_spi_boardinfo *info)
+static void intel_spi_enable_bios_write(struct pci_dev *pci_dev, struct intel_spi_boardinfo *info, int *writeable_flag)
 {
     u8 bios_cntl, value, want, new;
 
@@ -84,7 +84,7 @@ static void intel_spi_enable_bios_write(struct pci_dev *pci_dev, struct intel_sp
             INTEL_SPI_PLATFORM_VERBOSE("Warning: Setting Bios Control at 0x%x from 0x%02x to 0x%02x failed.\n"
                 "New value is 0x%02x.\n", BIOS_CNTL, value, want, new);
         } else {
-            info->writeable = !!(new & BIOS_CNTL_WN);
+            *writeable_flag = !!(new & BIOS_CNTL_WN);
         }
         INTEL_SPI_PLATFORM_VERBOSE("Bios Control is 0x%x\n", new);
     } else {
@@ -101,6 +101,7 @@ static int intel_spi_platform_probe(struct platform_device *pdev)
 	struct resource *mem;
     struct pci_dev *pci_dev = NULL;
     u32 rcba;
+    int writeable_flag = 0;
 
 	info = dev_get_platdata(&pdev->dev);
 	if (!info)
@@ -116,7 +117,7 @@ static int intel_spi_platform_probe(struct platform_device *pdev)
     case INTEL_SPI_LPT:
         pci_read_config_dword(pci_dev, RCBABASE, &rcba);
         if (rcba & 1) {
-            intel_spi_enable_bios_write(pci_dev, info);
+            intel_spi_enable_bios_write(pci_dev, info, &writeable_flag);
         }
         break;
     default:
@@ -124,7 +125,7 @@ static int intel_spi_platform_probe(struct platform_device *pdev)
         break;
     }
     INTEL_SPI_PLATFORM_VERBOSE("intel spi boardinfo writeable is %sabled\n",
-            info->writeable ? "en" : "dis");
+            writeable_flag ? "en" : "dis");
 
 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	ispi = intel_spi_probe(&pdev->dev, mem, info);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/Makefile
index 4226f2734275..c8e0ac458c14 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/Makefile
@@ -23,6 +23,8 @@ obj-m += wb_ina3221.o
 obj-m += wb_isl68137.o
 obj-m += wb_tps53622.o
 obj-m += wb_ucd9000.o
+obj-m += wb_xdpe12284.o
+obj-m += wb_i2c_ismt.o
 
 all:
 	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_gpio_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_gpio_device.c
index 5cf949d70ef8..1e1d815eedf1 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_gpio_device.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_gpio_device.c
@@ -13,6 +13,9 @@
 #include <asm/delay.h>
 #include <linux/miscdevice.h>
 
+#define I2C_GPIO_DEV_NAME_LEN (16)
+static char i2c_gpio_dev_name[I2C_GPIO_DEV_NAME_LEN] = {0};
+
 static int gpio_sda = 17;
 module_param(gpio_sda, int, S_IRUGO | S_IWUSR);
 
@@ -22,6 +25,13 @@ module_param(gpio_scl, int, S_IRUGO | S_IWUSR);
 static int gpio_udelay = 2;
 module_param(gpio_udelay, int, S_IRUGO | S_IWUSR);
 
+static int bus_num = -1;
+module_param(bus_num, int, S_IRUGO | S_IWUSR);
+
+static char *gpio_chip_name = NULL;
+module_param(gpio_chip_name, charp, 0644);
+MODULE_PARM_DESC(str_var, "A string variable for GPIO controller");
+
 static int g_wb_i2c_gpio_device_debug = 0;
 static int g_wb_i2c_gpio_device_error = 0;
 
@@ -44,7 +54,7 @@ module_param(g_wb_i2c_gpio_device_error, int, S_IRUGO | S_IWUSR);
 static struct i2c_gpio_platform_data i2c_pdata = {
     .udelay = 2,
     .scl_is_output_only = 0,
-    .sda_is_open_drain  = 0,
+    .sda_is_open_drain = 0,
     .scl_is_open_drain = 0,
 };
 
@@ -70,10 +80,11 @@ static struct platform_device wb_i2c_gpio_device = {
 static struct gpiod_lookup_table wb_i2c_gpio_table = {
     .dev_id = "wb-i2c-gpio",
     .table = {
-        GPIO_LOOKUP_IDX("wb_gpio_d1500", 17, NULL, 0,
+        GPIO_LOOKUP("wb_gpio_d1500", 17, "sda",
                 GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
-        GPIO_LOOKUP_IDX("wb_gpio_d1500", 1, NULL, 1,
+        GPIO_LOOKUP("wb_gpio_d1500", 1, "scl",
                 GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+        { },
     },
 };
 
@@ -85,6 +96,18 @@ static int __init wb_i2c_gpio_device_init(void)
     wb_i2c_gpio_table.table[0].chip_hwnum = gpio_sda;
     wb_i2c_gpio_table.table[1].chip_hwnum = gpio_scl;
     i2c_pdata.udelay = gpio_udelay;
+
+    if (gpio_chip_name) {
+        wb_i2c_gpio_table.table[0].key = gpio_chip_name;
+        wb_i2c_gpio_table.table[1].key = gpio_chip_name;
+    }
+
+    if (bus_num >= 0) {
+        wb_i2c_gpio_device.id = bus_num;
+        snprintf(i2c_gpio_dev_name, I2C_GPIO_DEV_NAME_LEN, "wb-i2c-gpio.%d", bus_num);
+        wb_i2c_gpio_table.dev_id = i2c_gpio_dev_name;
+    }
+
     gpiod_add_lookup_table(&wb_i2c_gpio_table);
 
     err = platform_device_register(&wb_i2c_gpio_device);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_ismt.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_ismt.c
new file mode 100644
index 000000000000..350d30b83cb6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_ismt.c
@@ -0,0 +1,1102 @@
+/*
+ * This file is provided under a dual BSD/GPLv2 license.  When using or
+ * redistributing this file, you may do so under either license.
+ *
+ * Copyright(c) 2012 Intel Corporation. All rights reserved.
+ *
+ * GPL LICENSE SUMMARY
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ * The full GNU General Public License is included in this distribution
+ * in the file called LICENSE.GPL.
+ *
+ * BSD LICENSE
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ *   * Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *   * Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in
+ *     the documentation and/or other materials provided with the
+ *     distribution.
+ *   * Neither the name of Intel Corporation nor the names of its
+ *     contributors may be used to endorse or promote products derived
+ *     from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ *  Supports the SMBus Message Transport (SMT) in the Intel Atom Processor
+ *  S12xx Product Family.
+ *
+ *  Features supported by this driver:
+ *  Hardware PEC                     yes
+ *  Block buffer                     yes
+ *  Block process call transaction   no
+ *  Slave mode                       no
+ */
+
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/stddef.h>
+#include <linux/completion.h>
+#include <linux/dma-mapping.h>
+#include <linux/i2c.h>
+#include <linux/acpi.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+
+#include <linux/io-64-nonatomic-lo-hi.h>
+
+/* PCI Address Constants */
+#define SMBBAR		0
+
+#define ISMT_DBCTRL		0x388	/* ISMT PIN Control Register */
+#define ISMT_DBSTS		0X38C	/* ISMT PIN Status Register */
+
+#define ISMT_DBSTS_CLK_STS	(1<<9)	/* bit9 SMBCLK_CUR_STS */
+#define ISMT_DBSTS_SDA_STS	(1<<8)	/* bit8 SMBDATA_CUR_STS */
+#define ISMT_DBCTRL_CLK_CTL	(1<<1)	/* bit1 SMBCLK_CTL */
+#define ISMT_DBCTRL_ENABLE	(1<<31)	/* bit31 EN */
+
+/* PCI DIDs for the Intel SMBus Message Transport (SMT) Devices */
+#define PCI_DEVICE_ID_INTEL_S1200_SMT0	0x0c59
+#define PCI_DEVICE_ID_INTEL_S1200_SMT1	0x0c5a
+#define PCI_DEVICE_ID_INTEL_CDF_SMT	0x18ac
+#define PCI_DEVICE_ID_INTEL_DNV_SMT	0x19ac
+#define PCI_DEVICE_ID_INTEL_EBG_SMT	0x1bff
+#define PCI_DEVICE_ID_INTEL_AVOTON_SMT	0x1f15
+
+#define ISMT_DESC_ENTRIES	2	/* number of descriptor entries */
+#define ISMT_MAX_RETRIES	3	/* number of SMBus retries to attempt */
+
+/* Hardware Descriptor Constants - Control Field */
+#define ISMT_DESC_CWRL	0x01	/* Command/Write Length */
+#define ISMT_DESC_BLK	0X04	/* Perform Block Transaction */
+#define ISMT_DESC_FAIR	0x08	/* Set fairness flag upon successful arbit. */
+#define ISMT_DESC_PEC	0x10	/* Packet Error Code */
+#define ISMT_DESC_I2C	0x20	/* I2C Enable */
+#define ISMT_DESC_INT	0x40	/* Interrupt */
+#define ISMT_DESC_SOE	0x80	/* Stop On Error */
+
+/* Hardware Descriptor Constants - Status Field */
+#define ISMT_DESC_SCS	0x01	/* Success */
+#define ISMT_DESC_DLTO	0x04	/* Data Low Time Out */
+#define ISMT_DESC_NAK	0x08	/* NAK Received */
+#define ISMT_DESC_CRC	0x10	/* CRC Error */
+#define ISMT_DESC_CLTO	0x20	/* Clock Low Time Out */
+#define ISMT_DESC_COL	0x40	/* Collisions */
+#define ISMT_DESC_LPR	0x80	/* Large Packet Received */
+
+/* Macros */
+#define ISMT_DESC_ADDR_RW(addr, rw) (((addr) << 1) | (rw))
+
+/* iSMT General Register address offsets (SMBBAR + <addr>) */
+#define ISMT_GR_GCTRL		0x000	/* General Control */
+#define ISMT_GR_SMTICL		0x008	/* SMT Interrupt Cause Location */
+#define ISMT_GR_ERRINTMSK	0x010	/* Error Interrupt Mask */
+#define ISMT_GR_ERRAERMSK	0x014	/* Error AER Mask */
+#define ISMT_GR_ERRSTS		0x018	/* Error Status */
+#define ISMT_GR_ERRINFO		0x01c	/* Error Information */
+
+/* iSMT Master Registers */
+#define ISMT_MSTR_MDBA		0x100	/* Master Descriptor Base Address */
+#define ISMT_MSTR_MCTRL		0x108	/* Master Control */
+#define ISMT_MSTR_MSTS		0x10c	/* Master Status */
+#define ISMT_MSTR_MDS		0x110	/* Master Descriptor Size */
+#define ISMT_MSTR_RPOLICY	0x114	/* Retry Policy */
+
+/* iSMT Miscellaneous Registers */
+#define ISMT_SPGT	0x300	/* SMBus PHY Global Timing */
+
+/* General Control Register (GCTRL) bit definitions */
+#define ISMT_GCTRL_TRST	0x04	/* Target Reset */
+#define ISMT_GCTRL_KILL	0x08	/* Kill */
+#define ISMT_GCTRL_SRST	0x40	/* Soft Reset */
+
+/* Master Control Register (MCTRL) bit definitions */
+#define ISMT_MCTRL_SS	0x01		/* Start/Stop */
+#define ISMT_MCTRL_MEIE	0x10		/* Master Error Interrupt Enable */
+#define ISMT_MCTRL_FMHP	0x00ff0000	/* Firmware Master Head Ptr (FMHP) */
+
+/* Master Status Register (MSTS) bit definitions */
+#define ISMT_MSTS_HMTP	0xff0000	/* HW Master Tail Pointer (HMTP) */
+#define ISMT_MSTS_MIS	0x20		/* Master Interrupt Status (MIS) */
+#define ISMT_MSTS_MEIS	0x10		/* Master Error Int Status (MEIS) */
+#define ISMT_MSTS_IP	0x01		/* In Progress */
+
+/* Master Descriptor Size (MDS) bit definitions */
+#define ISMT_MDS_MASK	0xff	/* Master Descriptor Size mask (MDS) */
+
+/* SMBus PHY Global Timing Register (SPGT) bit definitions */
+#define ISMT_SPGT_SPD_MASK	0xc0000000	/* SMBus Speed mask */
+#define ISMT_SPGT_SPD_80K	0x00		/* 80 kHz */
+#define ISMT_SPGT_SPD_100K	(0x1 << 30)	/* 100 kHz */
+#define ISMT_SPGT_SPD_400K	(0x2 << 30)	/* 400 kHz */
+#define ISMT_SPGT_SPD_1M	(0x3 << 30)	/* 1 MHz */
+
+/* MSI Control Register (MSICTL) bit definitions */
+#define ISMT_MSICTL_MSIE	0x01	/* MSI Enable */
+
+/* iSMT Hardware Descriptor */
+struct ismt_desc {
+	u8 tgtaddr_rw;	/* target address & r/w bit */
+	u8 wr_len_cmd;	/* write length in bytes or a command */
+	u8 rd_len;	/* read length */
+	u8 control;	/* control bits */
+	u8 status;	/* status bits */
+	u8 retry;	/* collision retry and retry count */
+	u8 rxbytes;	/* received bytes */
+	u8 txbytes;	/* transmitted bytes */
+	u32 dptr_low;	/* lower 32 bit of the data pointer */
+	u32 dptr_high;	/* upper 32 bit of the data pointer */
+} __packed;
+
+struct ismt_priv {
+	struct i2c_adapter adapter;
+	void __iomem *smba;			/* PCI BAR */
+	struct pci_dev *pci_dev;
+	struct ismt_desc *hw;			/* descriptor virt base addr */
+	dma_addr_t io_rng_dma;			/* descriptor HW base addr */
+	u8 head;				/* ring buffer head pointer */
+	struct completion cmp;			/* interrupt completion */
+	u8 buffer[I2C_SMBUS_BLOCK_MAX + 16];	/* temp R/W data buffer */
+};
+
+static const struct pci_device_id ismt_ids[] = {
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT0) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT1) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CDF_SMT) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMT) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EBG_SMT) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMT) },
+	{ 0, }
+};
+
+MODULE_DEVICE_TABLE(pci, ismt_ids);
+
+/* Bus speed control bits for slow debuggers - refer to the docs for usage */
+static unsigned int bus_speed = 100;
+static unsigned int delay = 1000;
+module_param(bus_speed, uint, S_IRUGO);
+MODULE_PARM_DESC(bus_speed, "Bus Speed in kHz (100 by default)");
+module_param(delay, uint, S_IRUGO);
+MODULE_PARM_DESC(delay, "Delay in microsecs before access (1000 by default)");
+
+static unsigned int dma_reset_timeout = 1000;
+module_param(dma_reset_timeout, uint, S_IRUGO);
+
+static void ismt_hw_init(struct ismt_priv *priv);
+
+/**
+ * __ismt_desc_dump() - dump the contents of a specific descriptor
+ * @dev: the iSMT device
+ * @desc: the iSMT hardware descriptor
+ */
+static void __ismt_desc_dump(struct device *dev, const struct ismt_desc *desc)
+{
+
+	dev_dbg(dev, "Descriptor struct:  %p\n", desc);
+	dev_dbg(dev, "\ttgtaddr_rw=0x%02X\n", desc->tgtaddr_rw);
+	dev_dbg(dev, "\twr_len_cmd=0x%02X\n", desc->wr_len_cmd);
+	dev_dbg(dev, "\trd_len=    0x%02X\n", desc->rd_len);
+	dev_dbg(dev, "\tcontrol=   0x%02X\n", desc->control);
+	dev_dbg(dev, "\tstatus=    0x%02X\n", desc->status);
+	dev_dbg(dev, "\tretry=     0x%02X\n", desc->retry);
+	dev_dbg(dev, "\trxbytes=   0x%02X\n", desc->rxbytes);
+	dev_dbg(dev, "\ttxbytes=   0x%02X\n", desc->txbytes);
+	dev_dbg(dev, "\tdptr_low=  0x%08X\n", desc->dptr_low);
+	dev_dbg(dev, "\tdptr_high= 0x%08X\n", desc->dptr_high);
+}
+/**
+ * ismt_desc_dump() - dump the contents of a descriptor for debug purposes
+ * @priv: iSMT private data
+ */
+static void ismt_desc_dump(struct ismt_priv *priv)
+{
+	struct device *dev = &priv->pci_dev->dev;
+	struct ismt_desc *desc = &priv->hw[priv->head];
+
+	dev_dbg(dev, "Dump of the descriptor struct:  0x%X\n", priv->head);
+	__ismt_desc_dump(dev, desc);
+}
+
+static void ismt_reset_dma(struct ismt_priv *priv)
+{
+    uint val;
+    u16 ctrl;
+    struct pci_dev *pdev;
+    u32 addr_lo, addr_hi;
+
+    /* save msiaddr */
+    pdev = priv->pci_dev;
+    pci_read_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_LO, &addr_lo);
+    pci_read_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, &addr_hi);
+
+    /* Clear the start bit */
+    val = readl(priv->smba + ISMT_MSTR_MCTRL);
+    val &= ~ISMT_MCTRL_SS;
+    writel(val, priv->smba + ISMT_MSTR_MCTRL);
+
+    val = readl(priv->smba + ISMT_GR_GCTRL);
+    writel(val | ISMT_GCTRL_KILL | ISMT_GCTRL_TRST | ISMT_GCTRL_SRST, priv->smba + ISMT_GR_GCTRL);
+
+    if (dma_reset_timeout > 0) {
+        usleep_range(dma_reset_timeout, dma_reset_timeout + 1);
+    }
+
+    ismt_hw_init(priv);
+    pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_LO, addr_lo);
+    pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, addr_hi);
+    /* enable msi */
+    pci_read_config_word(pdev, pdev->msi_cap + PCI_MSI_FLAGS, &ctrl);
+    ctrl |= PCI_MSI_FLAGS_ENABLE;
+    pci_write_config_word(pdev, pdev->msi_cap + PCI_MSI_FLAGS, ctrl);
+}
+
+/**
+ * ismt_gen_reg_dump() - dump the iSMT General Registers
+ * @priv: iSMT private data
+ */
+static void ismt_gen_reg_dump(struct ismt_priv *priv)
+{
+	struct device *dev = &priv->pci_dev->dev;
+
+	dev_dbg(dev, "Dump of the iSMT General Registers\n");
+	dev_dbg(dev, "  GCTRL.... : (0x%p)=0x%X\n",
+		priv->smba + ISMT_GR_GCTRL,
+		readl(priv->smba + ISMT_GR_GCTRL));
+	dev_dbg(dev, "  SMTICL... : (0x%p)=0x%016llX\n",
+		priv->smba + ISMT_GR_SMTICL,
+		(long long unsigned int)readq(priv->smba + ISMT_GR_SMTICL));
+	dev_dbg(dev, "  ERRINTMSK : (0x%p)=0x%X\n",
+		priv->smba + ISMT_GR_ERRINTMSK,
+		readl(priv->smba + ISMT_GR_ERRINTMSK));
+	dev_dbg(dev, "  ERRAERMSK : (0x%p)=0x%X\n",
+		priv->smba + ISMT_GR_ERRAERMSK,
+		readl(priv->smba + ISMT_GR_ERRAERMSK));
+	dev_dbg(dev, "  ERRSTS... : (0x%p)=0x%X\n",
+		priv->smba + ISMT_GR_ERRSTS,
+		readl(priv->smba + ISMT_GR_ERRSTS));
+	dev_dbg(dev, "  ERRINFO.. : (0x%p)=0x%X\n",
+		priv->smba + ISMT_GR_ERRINFO,
+		readl(priv->smba + ISMT_GR_ERRINFO));
+}
+
+/**
+ * ismt_mstr_reg_dump() - dump the iSMT Master Registers
+ * @priv: iSMT private data
+ */
+static void ismt_mstr_reg_dump(struct ismt_priv *priv)
+{
+	struct device *dev = &priv->pci_dev->dev;
+
+	dev_dbg(dev, "Dump of the iSMT Master Registers\n");
+	dev_dbg(dev, "  MDBA..... : (0x%p)=0x%016llX\n",
+		priv->smba + ISMT_MSTR_MDBA,
+		(long long unsigned int)readq(priv->smba + ISMT_MSTR_MDBA));
+	dev_dbg(dev, "  MCTRL.... : (0x%p)=0x%X\n",
+		priv->smba + ISMT_MSTR_MCTRL,
+		readl(priv->smba + ISMT_MSTR_MCTRL));
+	dev_dbg(dev, "  MSTS..... : (0x%p)=0x%X\n",
+		priv->smba + ISMT_MSTR_MSTS,
+		readl(priv->smba + ISMT_MSTR_MSTS));
+	dev_dbg(dev, "  MDS...... : (0x%p)=0x%X\n",
+		priv->smba + ISMT_MSTR_MDS,
+		readl(priv->smba + ISMT_MSTR_MDS));
+	dev_dbg(dev, "  RPOLICY.. : (0x%p)=0x%X\n",
+		priv->smba + ISMT_MSTR_RPOLICY,
+		readl(priv->smba + ISMT_MSTR_RPOLICY));
+	dev_dbg(dev, "  SPGT..... : (0x%p)=0x%X\n",
+		priv->smba + ISMT_SPGT,
+		readl(priv->smba + ISMT_SPGT));
+}
+
+/**
+ * ismt_submit_desc() - add a descriptor to the ring
+ * @priv: iSMT private data
+ */
+static void ismt_submit_desc(struct ismt_priv *priv)
+{
+	uint fmhp;
+	uint val;
+
+	ismt_desc_dump(priv);
+	ismt_gen_reg_dump(priv);
+	ismt_mstr_reg_dump(priv);
+
+	/* Set the FMHP (Firmware Master Head Pointer)*/
+	fmhp = ((priv->head + 1) % ISMT_DESC_ENTRIES) << 16;
+	val = readl(priv->smba + ISMT_MSTR_MCTRL);
+	writel((val & ~ISMT_MCTRL_FMHP) | fmhp,
+	       priv->smba + ISMT_MSTR_MCTRL);
+
+	/* Set the start bit */
+	val = readl(priv->smba + ISMT_MSTR_MCTRL);
+	writel(val | ISMT_MCTRL_SS,
+	       priv->smba + ISMT_MSTR_MCTRL);
+}
+
+/**
+ * ismt_process_desc() - handle the completion of the descriptor
+ * @desc: the iSMT hardware descriptor
+ * @data: data buffer from the upper layer
+ * @priv: ismt_priv struct holding our dma buffer
+ * @size: SMBus transaction type
+ * @read_write: flag to indicate if this is a read or write
+ */
+static int ismt_process_desc(const struct ismt_desc *desc,
+			     union i2c_smbus_data *data,
+			     struct ismt_priv *priv, int size,
+			     char read_write)
+{
+	u8 *dma_buffer = PTR_ALIGN(&priv->buffer[0], 16);
+
+	dev_dbg(&priv->pci_dev->dev, "Processing completed descriptor\n");
+	__ismt_desc_dump(&priv->pci_dev->dev, desc);
+	ismt_gen_reg_dump(priv);
+	ismt_mstr_reg_dump(priv);
+
+	if (desc->status & ISMT_DESC_SCS) {
+		if (read_write == I2C_SMBUS_WRITE &&
+		    size != I2C_SMBUS_PROC_CALL)
+			return 0;
+
+		switch (size) {
+		case I2C_SMBUS_BYTE:
+		case I2C_SMBUS_BYTE_DATA:
+			data->byte = dma_buffer[0];
+			break;
+		case I2C_SMBUS_WORD_DATA:
+		case I2C_SMBUS_PROC_CALL:
+			data->word = dma_buffer[0] | (dma_buffer[1] << 8);
+			break;
+		case I2C_SMBUS_BLOCK_DATA:
+			if (desc->rxbytes != dma_buffer[0] + 1)
+				return -EMSGSIZE;
+
+			memcpy(data->block, dma_buffer, desc->rxbytes);
+			break;
+		case I2C_SMBUS_I2C_BLOCK_DATA:
+			memcpy(&data->block[1], dma_buffer, desc->rxbytes);
+			data->block[0] = desc->rxbytes;
+			break;
+		}
+		return 0;
+	}
+
+	if (likely(desc->status & ISMT_DESC_NAK))
+		return -ENXIO;
+
+	if (desc->status & ISMT_DESC_CRC)
+		return -EBADMSG;
+
+	if (desc->status & ISMT_DESC_COL)
+		return -EAGAIN;
+
+	if (desc->status & ISMT_DESC_LPR)
+		return -EPROTO;
+
+	if (desc->status & (ISMT_DESC_DLTO | ISMT_DESC_CLTO))
+		return -ETIMEDOUT;
+
+	return -EIO;
+}
+
+static void ismt_setscl(struct ismt_priv *priv, unsigned int level)
+{
+    int pin_status;
+
+    pin_status = readl(priv->smba + ISMT_DBCTRL);
+    if (level == 0) {
+        pin_status &= (~ISMT_DBCTRL_CLK_CTL);
+    } else {
+        pin_status |= ISMT_DBCTRL_CLK_CTL;
+    }
+    writel(pin_status, priv->smba + ISMT_DBCTRL);
+    pin_status = readl(priv->smba + ISMT_DBCTRL);
+    dev_dbg(&priv->pci_dev->dev, "dbctrl status = 0x%04x\r\n", pin_status);
+    return;
+}
+
+static void ismt_i2c_unblock(struct ismt_priv *priv)
+{
+    int i;
+    int pin_status, ori_status;
+
+    pin_status = readl(priv->smba + ISMT_DBCTRL);
+    ori_status = pin_status;
+    if ((pin_status & ISMT_DBCTRL_ENABLE) == 0) {
+        pin_status |= ISMT_DBCTRL_ENABLE;
+        writel(pin_status, priv->smba + ISMT_DBCTRL);
+        pin_status = readl(priv->smba + ISMT_DBCTRL);
+        dev_dbg(&priv->pci_dev->dev, "enable dbctrl pin status = 0x%04x\r\n", pin_status);
+    }
+
+    for (i = 0; i < 10; i++) {
+        ismt_setscl(priv, 0);
+        udelay(5);
+        ismt_setscl(priv, 1);
+        udelay(5);
+    }
+
+    pin_status = readl(priv->smba + ISMT_DBCTRL);
+    if (pin_status != ori_status) {
+        writel(ori_status, priv->smba + ISMT_DBCTRL);
+        pin_status = readl(priv->smba + ISMT_DBCTRL);
+        dev_dbg(&priv->pci_dev->dev, "reback dbctrl pin status = 0x%04x\r\n", pin_status);
+    }
+
+    return;
+}
+
+static int ismt_check_i2c_unblock(struct ismt_priv *priv)
+{
+    int pin_status;
+
+    pin_status = readl(priv->smba + ISMT_DBSTS);
+
+    if ( (!(pin_status & ISMT_DBSTS_SDA_STS) ) && (pin_status & ISMT_DBSTS_CLK_STS) ) {
+        dev_dbg(&priv->pci_dev->dev, "SDA is low, send 9 clock to device!\n");
+        ismt_i2c_unblock(priv);
+    }
+    return 0;
+}
+
+static int ismt_check_i2c_scl(struct ismt_priv *priv)
+{
+    int pin_status;
+
+    pin_status = readl(priv->smba + ISMT_DBSTS);
+
+    if ( (pin_status & ISMT_DBSTS_SDA_STS) && (pin_status & ISMT_DBSTS_CLK_STS) ) {
+        return 0;
+    }
+
+    dev_warn(&priv->pci_dev->dev, "SDA or SCL is low.pin_status:0x%x\n", pin_status);
+    return -1;
+}
+
+/* Make sure the SMBus host is ready to start transmitting.
+   Return 0 if it is, -EIO if it is not. */
+static int ismt_check_pre(struct ismt_priv *priv)
+{
+    ismt_check_i2c_unblock(priv);
+
+    /* SDA or SCL is low, return -EIO */
+    if (ismt_check_i2c_scl(priv)) {
+        return -EIO;
+    }
+
+    return 0;
+}
+
+/**
+ * ismt_access() - process an SMBus command
+ * @adap: the i2c host adapter
+ * @addr: address of the i2c/SMBus target
+ * @flags: command options
+ * @read_write: read from or write to device
+ * @command: the i2c/SMBus command to issue
+ * @size: SMBus transaction type
+ * @data: read/write data buffer
+ */
+static int ismt_access(struct i2c_adapter *adap, u16 addr,
+		       unsigned short flags, char read_write, u8 command,
+		       int size, union i2c_smbus_data *data)
+{
+	int ret;
+	unsigned long time_left;
+	dma_addr_t dma_addr = 0; /* address of the data buffer */
+	u8 dma_size = 0;
+	enum dma_data_direction dma_direction = 0;
+	struct ismt_desc *desc;
+	struct ismt_priv *priv = i2c_get_adapdata(adap);
+	struct device *dev = &priv->pci_dev->dev;
+	u8 *dma_buffer = PTR_ALIGN(&priv->buffer[0], 16);
+
+	if (delay > 0) {
+        usleep_range(delay, delay + 1);
+    }
+
+	ret = ismt_check_pre(priv);
+	if (ret < 0) {
+		return ret;
+	}
+
+	desc = &priv->hw[priv->head];
+
+	/* Initialize the DMA buffer */
+	memset(priv->buffer, 0, sizeof(priv->buffer));
+
+	/* Initialize the descriptor */
+	memset(desc, 0, sizeof(struct ismt_desc));
+	desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, read_write);
+
+	/* Initialize common control bits */
+	if (likely(pci_dev_msi_enabled(priv->pci_dev)))
+		desc->control = ISMT_DESC_INT | ISMT_DESC_FAIR;
+	else
+		desc->control = ISMT_DESC_FAIR;
+
+	if ((flags & I2C_CLIENT_PEC) && (size != I2C_SMBUS_QUICK)
+	    && (size != I2C_SMBUS_I2C_BLOCK_DATA))
+		desc->control |= ISMT_DESC_PEC;
+
+	switch (size) {
+	case I2C_SMBUS_QUICK:
+		dev_dbg(dev, "I2C_SMBUS_QUICK\n");
+		break;
+
+	case I2C_SMBUS_BYTE:
+		if (read_write == I2C_SMBUS_WRITE) {
+			/*
+			 * Send Byte
+			 * The command field contains the write data
+			 */
+			dev_dbg(dev, "I2C_SMBUS_BYTE:  WRITE\n");
+			desc->control |= ISMT_DESC_CWRL;
+			desc->wr_len_cmd = command;
+		} else {
+			/* Receive Byte */
+			dev_dbg(dev, "I2C_SMBUS_BYTE:  READ\n");
+			dma_size = 1;
+			dma_direction = DMA_FROM_DEVICE;
+			desc->rd_len = 1;
+		}
+		break;
+
+	case I2C_SMBUS_BYTE_DATA:
+		if (read_write == I2C_SMBUS_WRITE) {
+			/*
+			 * Write Byte
+			 * Command plus 1 data byte
+			 */
+			dev_dbg(dev, "I2C_SMBUS_BYTE_DATA:  WRITE\n");
+			desc->wr_len_cmd = 2;
+			dma_size = 2;
+			dma_direction = DMA_TO_DEVICE;
+			dma_buffer[0] = command;
+			dma_buffer[1] = data->byte;
+		} else {
+			/* Read Byte */
+			dev_dbg(dev, "I2C_SMBUS_BYTE_DATA:  READ\n");
+			desc->control |= ISMT_DESC_CWRL;
+			desc->wr_len_cmd = command;
+			desc->rd_len = 1;
+			dma_size = 1;
+			dma_direction = DMA_FROM_DEVICE;
+		}
+		break;
+
+	case I2C_SMBUS_WORD_DATA:
+		if (read_write == I2C_SMBUS_WRITE) {
+			/* Write Word */
+			dev_dbg(dev, "I2C_SMBUS_WORD_DATA:  WRITE\n");
+			desc->wr_len_cmd = 3;
+			dma_size = 3;
+			dma_direction = DMA_TO_DEVICE;
+			dma_buffer[0] = command;
+			dma_buffer[1] = data->word & 0xff;
+			dma_buffer[2] = data->word >> 8;
+		} else {
+			/* Read Word */
+			dev_dbg(dev, "I2C_SMBUS_WORD_DATA:  READ\n");
+			desc->wr_len_cmd = command;
+			desc->control |= ISMT_DESC_CWRL;
+			desc->rd_len = 2;
+			dma_size = 2;
+			dma_direction = DMA_FROM_DEVICE;
+		}
+		break;
+
+	case I2C_SMBUS_PROC_CALL:
+		dev_dbg(dev, "I2C_SMBUS_PROC_CALL\n");
+		desc->wr_len_cmd = 3;
+		desc->rd_len = 2;
+		dma_size = 3;
+		dma_direction = DMA_BIDIRECTIONAL;
+		dma_buffer[0] = command;
+		dma_buffer[1] = data->word & 0xff;
+		dma_buffer[2] = data->word >> 8;
+		break;
+
+	case I2C_SMBUS_BLOCK_DATA:
+		if (read_write == I2C_SMBUS_WRITE) {
+			/* Block Write */
+			dev_dbg(dev, "I2C_SMBUS_BLOCK_DATA:  WRITE\n");
+			dma_size = data->block[0] + 1;
+			dma_direction = DMA_TO_DEVICE;
+			desc->wr_len_cmd = dma_size;
+			desc->control |= ISMT_DESC_BLK;
+			dma_buffer[0] = command;
+			memcpy(&dma_buffer[1], &data->block[1], dma_size - 1);
+		} else {
+			/* Block Read */
+			dev_dbg(dev, "I2C_SMBUS_BLOCK_DATA:  READ\n");
+			dma_size = I2C_SMBUS_BLOCK_MAX;
+			dma_direction = DMA_FROM_DEVICE;
+			desc->rd_len = dma_size;
+			desc->wr_len_cmd = command;
+			desc->control |= (ISMT_DESC_BLK | ISMT_DESC_CWRL);
+		}
+		break;
+
+	case I2C_SMBUS_I2C_BLOCK_DATA:
+		/* Make sure the length is valid */
+		if (data->block[0] < 1)
+			data->block[0] = 1;
+
+		if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
+			data->block[0] = I2C_SMBUS_BLOCK_MAX;
+
+		if (read_write == I2C_SMBUS_WRITE) {
+			/* i2c Block Write */
+			dev_dbg(dev, "I2C_SMBUS_I2C_BLOCK_DATA:  WRITE\n");
+			dma_size = data->block[0] + 1;
+			dma_direction = DMA_TO_DEVICE;
+			desc->wr_len_cmd = dma_size;
+			desc->control |= ISMT_DESC_I2C;
+			dma_buffer[0] = command;
+			memcpy(&dma_buffer[1], &data->block[1], dma_size - 1);
+		} else {
+			/* i2c Block Read */
+			dev_dbg(dev, "I2C_SMBUS_I2C_BLOCK_DATA:  READ\n");
+			dma_size = data->block[0];
+			dma_direction = DMA_FROM_DEVICE;
+			desc->rd_len = dma_size;
+			desc->wr_len_cmd = command;
+			desc->control |= (ISMT_DESC_I2C | ISMT_DESC_CWRL);
+			/*
+			 * Per the "Table 15-15. I2C Commands",
+			 * in the External Design Specification (EDS),
+			 * (Document Number: 508084, Revision: 2.0),
+			 * the _rw bit must be 0
+			 */
+			desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, 0);
+		}
+		break;
+
+	default:
+		dev_err(dev, "Unsupported transaction %d\n",
+			size);
+		return -EOPNOTSUPP;
+	}
+
+	/* map the data buffer */
+	if (dma_size != 0) {
+		dev_dbg(dev, " dev=%p\n", dev);
+		dev_dbg(dev, " data=%p\n", data);
+		dev_dbg(dev, " dma_buffer=%p\n", dma_buffer);
+		dev_dbg(dev, " dma_size=%d\n", dma_size);
+		dev_dbg(dev, " dma_direction=%d\n", dma_direction);
+
+		dma_addr = dma_map_single(dev,
+				      dma_buffer,
+				      dma_size,
+				      dma_direction);
+
+		if (dma_mapping_error(dev, dma_addr)) {
+			dev_err(dev, "Error in mapping dma buffer %p\n",
+				dma_buffer);
+			return -EIO;
+		}
+
+		dev_dbg(dev, " dma_addr = %pad\n", &dma_addr);
+
+		desc->dptr_low = lower_32_bits(dma_addr);
+		desc->dptr_high = upper_32_bits(dma_addr);
+	}
+
+	reinit_completion(&priv->cmp);
+
+	/* Add the descriptor */
+	ismt_submit_desc(priv);
+
+	/* Now we wait for interrupt completion, 1s */
+	time_left = wait_for_completion_timeout(&priv->cmp, HZ*1);
+
+	/* unmap the data buffer */
+	if (dma_size != 0)
+		dma_unmap_single(dev, dma_addr, dma_size, dma_direction);
+
+	if (unlikely(!time_left)) {
+		dev_warn(dev, "completion wait timed out:addr[%d-0x%x], read_write[%d], command[0x%x], size[%d]\n",
+					adap->nr, addr, read_write, command, size);
+		ismt_reset_dma(priv);
+		ret = -ETIMEDOUT;
+		priv->head = 0;
+		return ret;
+	}
+
+	/* do any post processing of the descriptor here */
+	ret = ismt_process_desc(desc, data, priv, size, read_write);
+	/* Update the ring pointer */
+	priv->head++;
+	priv->head %= ISMT_DESC_ENTRIES;
+
+	return ret;
+}
+
+/**
+ * ismt_func() - report which i2c commands are supported by this adapter
+ * @adap: the i2c host adapter
+ */
+static u32 ismt_func(struct i2c_adapter *adap)
+{
+	return I2C_FUNC_SMBUS_QUICK		|
+	       I2C_FUNC_SMBUS_BYTE		|
+	       I2C_FUNC_SMBUS_BYTE_DATA		|
+	       I2C_FUNC_SMBUS_WORD_DATA		|
+	       I2C_FUNC_SMBUS_PROC_CALL		|
+	       I2C_FUNC_SMBUS_BLOCK_DATA	|
+	       I2C_FUNC_SMBUS_I2C_BLOCK		|
+	       I2C_FUNC_SMBUS_PEC;
+}
+
+static const struct i2c_algorithm smbus_algorithm = {
+	.smbus_xfer	= ismt_access,
+	.functionality	= ismt_func,
+};
+
+/**
+ * ismt_handle_isr() - interrupt handler bottom half
+ * @priv: iSMT private data
+ */
+static irqreturn_t ismt_handle_isr(struct ismt_priv *priv)
+{
+	complete(&priv->cmp);
+
+	return IRQ_HANDLED;
+}
+
+/**
+ * ismt_do_interrupt() - IRQ interrupt handler
+ * @vec: interrupt vector
+ * @data: iSMT private data
+ */
+static irqreturn_t ismt_do_interrupt(int vec, void *data)
+{
+	u32 val;
+	struct ismt_priv *priv = data;
+
+	/*
+	 * check to see it's our interrupt, return IRQ_NONE if not ours
+	 * since we are sharing interrupt
+	 */
+	val = readl(priv->smba + ISMT_MSTR_MSTS);
+
+	if (!(val & (ISMT_MSTS_MIS | ISMT_MSTS_MEIS)))
+		return IRQ_NONE;
+	else
+		writel(val | ISMT_MSTS_MIS | ISMT_MSTS_MEIS,
+		       priv->smba + ISMT_MSTR_MSTS);
+
+	return ismt_handle_isr(priv);
+}
+
+/**
+ * ismt_do_msi_interrupt() - MSI interrupt handler
+ * @vec: interrupt vector
+ * @data: iSMT private data
+ */
+static irqreturn_t ismt_do_msi_interrupt(int vec, void *data)
+{
+	return ismt_handle_isr(data);
+}
+
+/**
+ * ismt_hw_init() - initialize the iSMT hardware
+ * @priv: iSMT private data
+ */
+static void ismt_hw_init(struct ismt_priv *priv)
+{
+	u32 val;
+	struct device *dev = &priv->pci_dev->dev;
+
+	/* initialize the Master Descriptor Base Address (MDBA) */
+	writeq(priv->io_rng_dma, priv->smba + ISMT_MSTR_MDBA);
+
+	/* initialize the Master Control Register (MCTRL) */
+	writel(ISMT_MCTRL_MEIE, priv->smba + ISMT_MSTR_MCTRL);
+
+	/* initialize the Master Status Register (MSTS) */
+	writel(0, priv->smba + ISMT_MSTR_MSTS);
+
+	/* initialize the Master Descriptor Size (MDS) */
+	val = readl(priv->smba + ISMT_MSTR_MDS);
+	writel((val & ~ISMT_MDS_MASK) | (ISMT_DESC_ENTRIES - 1),
+		priv->smba + ISMT_MSTR_MDS);
+
+	/*
+	 * Set the SMBus speed (could use this for slow HW debuggers)
+	 */
+
+	val = readl(priv->smba + ISMT_SPGT);
+
+	switch (bus_speed) {
+	case 0:
+		break;
+
+	case 80:
+		dev_dbg(dev, "Setting SMBus clock to 80 kHz\n");
+		writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_80K),
+			priv->smba + ISMT_SPGT);
+		break;
+
+	case 100:
+		dev_dbg(dev, "Setting SMBus clock to 100 kHz\n");
+		writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_100K),
+			priv->smba + ISMT_SPGT);
+		break;
+
+	case 400:
+		dev_dbg(dev, "Setting SMBus clock to 400 kHz\n");
+		writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_400K),
+			priv->smba + ISMT_SPGT);
+		break;
+
+	case 1000:
+		dev_dbg(dev, "Setting SMBus clock to 1000 kHz\n");
+		writel(((val & ~ISMT_SPGT_SPD_MASK) | ISMT_SPGT_SPD_1M),
+			priv->smba + ISMT_SPGT);
+		break;
+
+	default:
+		dev_warn(dev, "Invalid SMBus clock speed, only 0, 80, 100, 400, and 1000 are valid\n");
+		break;
+	}
+
+	val = readl(priv->smba + ISMT_SPGT);
+
+	switch (val & ISMT_SPGT_SPD_MASK) {
+	case ISMT_SPGT_SPD_80K:
+		bus_speed = 80;
+		break;
+	case ISMT_SPGT_SPD_100K:
+		bus_speed = 100;
+		break;
+	case ISMT_SPGT_SPD_400K:
+		bus_speed = 400;
+		break;
+	case ISMT_SPGT_SPD_1M:
+		bus_speed = 1000;
+		break;
+	}
+	dev_info(dev, "SMBus clock is running at %d kHz with delay %d us\n", bus_speed, delay);
+}
+
+/**
+ * ismt_dev_init() - initialize the iSMT data structures
+ * @priv: iSMT private data
+ */
+static int ismt_dev_init(struct ismt_priv *priv)
+{
+	/* allocate memory for the descriptor */
+	priv->hw = dmam_alloc_coherent(&priv->pci_dev->dev,
+				       (ISMT_DESC_ENTRIES
+					       * sizeof(struct ismt_desc)),
+				       &priv->io_rng_dma,
+				       GFP_KERNEL);
+	if (!priv->hw)
+		return -ENOMEM;
+
+	priv->head = 0;
+	init_completion(&priv->cmp);
+
+	return 0;
+}
+
+/**
+ * ismt_int_init() - initialize interrupts
+ * @priv: iSMT private data
+ */
+static int ismt_int_init(struct ismt_priv *priv)
+{
+	int err;
+
+	/* Try using MSI interrupts */
+	err = pci_enable_msi(priv->pci_dev);
+	if (err)
+		goto intx;
+
+	err = devm_request_irq(&priv->pci_dev->dev,
+			       priv->pci_dev->irq,
+			       ismt_do_msi_interrupt,
+			       0,
+			       "ismt-msi",
+			       priv);
+	if (err) {
+		pci_disable_msi(priv->pci_dev);
+		goto intx;
+	}
+
+	return 0;
+
+	/* Try using legacy interrupts */
+intx:
+	dev_warn(&priv->pci_dev->dev,
+		 "Unable to use MSI interrupts, falling back to legacy\n");
+
+	err = devm_request_irq(&priv->pci_dev->dev,
+			       priv->pci_dev->irq,
+			       ismt_do_interrupt,
+			       IRQF_SHARED,
+			       "ismt-intx",
+			       priv);
+	if (err) {
+		dev_err(&priv->pci_dev->dev, "no usable interrupts\n");
+		return err;
+	}
+
+	return 0;
+}
+
+static struct pci_driver ismt_driver;
+
+/**
+ * ismt_probe() - probe for iSMT devices
+ * @pdev: PCI-Express device
+ * @id: PCI-Express device ID
+ */
+static int
+ismt_probe(struct pci_dev *pdev, const struct pci_device_id *id)
+{
+	int err;
+	struct ismt_priv *priv;
+	unsigned long start, len;
+
+	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	pci_set_drvdata(pdev, priv);
+
+	i2c_set_adapdata(&priv->adapter, priv);
+	priv->adapter.owner = THIS_MODULE;
+	priv->adapter.class = I2C_CLASS_HWMON;
+	priv->adapter.algo = &smbus_algorithm;
+	priv->adapter.dev.parent = &pdev->dev;
+	ACPI_COMPANION_SET(&priv->adapter.dev, ACPI_COMPANION(&pdev->dev));
+	priv->adapter.retries = ISMT_MAX_RETRIES;
+
+	priv->pci_dev = pdev;
+
+	err = pcim_enable_device(pdev);
+	if (err) {
+		dev_err(&pdev->dev, "Failed to enable SMBus PCI device (%d)\n",
+			err);
+		return err;
+	}
+
+	/* enable bus mastering */
+	pci_set_master(pdev);
+
+	/* Determine the address of the SMBus area */
+	start = pci_resource_start(pdev, SMBBAR);
+	len = pci_resource_len(pdev, SMBBAR);
+	if (!start || !len) {
+		dev_err(&pdev->dev,
+			"SMBus base address uninitialized, upgrade BIOS\n");
+		return -ENODEV;
+	}
+
+	snprintf(priv->adapter.name, sizeof(priv->adapter.name),
+		 "SMBus iSMT adapter at %lx", start);
+
+	dev_dbg(&priv->pci_dev->dev, " start=0x%lX\n", start);
+	dev_dbg(&priv->pci_dev->dev, " len=0x%lX\n", len);
+
+	err = acpi_check_resource_conflict(&pdev->resource[SMBBAR]);
+	if (err) {
+		dev_err(&pdev->dev, "ACPI resource conflict!\n");
+		return err;
+	}
+
+	err = pci_request_region(pdev, SMBBAR, ismt_driver.name);
+	if (err) {
+		dev_err(&pdev->dev,
+			"Failed to request SMBus region 0x%lx-0x%lx\n",
+			start, start + len);
+		return err;
+	}
+
+	priv->smba = pcim_iomap(pdev, SMBBAR, len);
+	if (!priv->smba) {
+		dev_err(&pdev->dev, "Unable to ioremap SMBus BAR\n");
+		return -ENODEV;
+	}
+
+	if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) ||
+	    (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0)) {
+		if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
+		    (pci_set_consistent_dma_mask(pdev,
+						 DMA_BIT_MASK(32)) != 0)) {
+			dev_err(&pdev->dev, "pci_set_dma_mask fail %p\n",
+				pdev);
+			return -ENODEV;
+		}
+	}
+
+	err = ismt_dev_init(priv);
+	if (err)
+		return err;
+
+	ismt_hw_init(priv);
+
+	err = ismt_int_init(priv);
+	if (err)
+		return err;
+
+	err = i2c_add_adapter(&priv->adapter);
+	if (err)
+		return -ENODEV;
+    dev_info(&pdev->dev, "wb-i2c-ismt probe ok.\n");
+	return 0;
+}
+
+/**
+ * ismt_remove() - release driver resources
+ * @pdev: PCI-Express device
+ */
+static void ismt_remove(struct pci_dev *pdev)
+{
+	struct ismt_priv *priv = pci_get_drvdata(pdev);
+
+	i2c_del_adapter(&priv->adapter);
+}
+
+static struct pci_driver ismt_driver = {
+	.name = "wb_ismt_smbus",
+	.id_table = ismt_ids,
+	.probe = ismt_probe,
+	.remove = ismt_remove,
+};
+
+module_pci_driver(ismt_driver);
+
+MODULE_LICENSE("Dual BSD/GPL");
+MODULE_AUTHOR("Bill E. Brown <bill.e.brown@intel.com>");
+MODULE_DESCRIPTION("Intel SMBus Message Transport (iSMT) driver");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.c
index db873b7fcc55..f318234ae90f 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.c
@@ -833,7 +833,7 @@ static int pca954x_deselect_mux(struct i2c_mux_core *muxc, u32 chan)
     } else {
         PCA954X_DEBUG("dismatch 9641, do nothing.\n");
     }
-    
+
     return ret;
 
 }
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca9641.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca9641.c
index 519762f0c159..c5b6a835ac9f 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca9641.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca9641.c
@@ -105,6 +105,7 @@ typedef struct i2c_muxs_struct_flag
 }i2c_mux_flag;
 
 i2c_mux_flag pca_flag = {
+	.nr = -1,
 	.flag = -1,
 };
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_isl68137.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_isl68137.c
index 2797a831bd66..5b3b54d92180 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_isl68137.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_isl68137.c
@@ -168,13 +168,13 @@ static ssize_t isl68137_avs_vout_show(struct device *dev, struct device_attribut
     struct i2c_client *client = to_i2c_client(dev->parent);
     struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
     struct pmbus_data *data = i2c_get_clientdata(client);
-    int ret, vout_cmd, vout;
+    int vout_cmd, vout;
 
     mutex_lock(&data->update_lock);
     vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
     if (vout_cmd < 0) {
         WB_ISL68137_ERROR("%d-%04x: read page%d vout command reg: 0x%x failed, ret: %d\n",
-            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, ret);
+            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd);
         mutex_unlock(&data->update_lock);
         return vout_cmd;
     }
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_lm75.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_lm75.c
index b8291c553688..0386cfb0b61d 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_lm75.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_lm75.c
@@ -311,6 +311,11 @@ static lm75_temp_threshold_t g_lm75_temp_threshold_info[] = {
         .temp_max = 125000,
         .temp_min = -55000,
     },
+    {
+        .chip_type = tmp275,
+        .temp_max = 125000,
+        .temp_min = -40000,
+    },
 };
 
 /*-----------------------------------------------------------------------*/
@@ -400,7 +405,7 @@ static int lm75_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
                 return err;
             }
             *val = lm75_reg_to_mc(regval, data->resolution);
-            if (attr != LM75_REG_TEMP) {
+            if (reg != LM75_REG_TEMP) {
                 return 0;
             }
             /* do input_temp_check */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus_core.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus_core.c
index bba6ca39cd3c..343aea446b9f 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus_core.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus_core.c
@@ -1580,7 +1580,7 @@ static const struct pmbus_sensor_attr voltage_attributes[] = {
         .sreg = PMBUS_STATUS_INPUT,
         .gbit = PB_STATUS_VIN_UV,
         .limit = vin_limit_attrs,
-        .nlimit = ARRAY_SIZE(vin_limit_attrs),
+        .nlimit = 0,
     }, {
         .reg = PMBUS_VIRT_READ_VMON,
         .class = PSC_VOLTAGE_IN,
@@ -1589,7 +1589,7 @@ static const struct pmbus_sensor_attr voltage_attributes[] = {
         .sfunc = PMBUS_HAVE_STATUS_VMON,
         .sreg = PMBUS_VIRT_STATUS_VMON,
         .limit = vmon_limit_attrs,
-        .nlimit = ARRAY_SIZE(vmon_limit_attrs),
+        .nlimit = 0,
     }, {
         .reg = PMBUS_READ_VCAP,
         .class = PSC_VOLTAGE_IN,
@@ -1605,7 +1605,7 @@ static const struct pmbus_sensor_attr voltage_attributes[] = {
         .sreg = PMBUS_STATUS_VOUT,
         .gbit = PB_STATUS_VOUT_OV,
         .limit = vout_limit_attrs,
-        .nlimit = ARRAY_SIZE(vout_limit_attrs),
+        .nlimit = 0,
     }
 };
 
@@ -1690,7 +1690,7 @@ static const struct pmbus_sensor_attr current_attributes[] = {
         .sreg = PMBUS_STATUS_INPUT,
         .gbit = PB_STATUS_INPUT,
         .limit = iin_limit_attrs,
-        .nlimit = ARRAY_SIZE(iin_limit_attrs),
+        .nlimit = 0,
     }, {
         .reg = PMBUS_READ_IOUT,
         .class = PSC_CURRENT_OUT,
@@ -1701,7 +1701,7 @@ static const struct pmbus_sensor_attr current_attributes[] = {
         .sreg = PMBUS_STATUS_IOUT,
         .gbit = PB_STATUS_IOUT_OC,
         .limit = iout_limit_attrs,
-        .nlimit = ARRAY_SIZE(iout_limit_attrs),
+        .nlimit = 0,
     }
 };
 
@@ -1781,7 +1781,7 @@ static const struct pmbus_sensor_attr power_attributes[] = {
         .sreg = PMBUS_STATUS_INPUT,
         .gbit = PB_STATUS_INPUT,
         .limit = pin_limit_attrs,
-        .nlimit = ARRAY_SIZE(pin_limit_attrs),
+        .nlimit = 0,
     }, {
         .reg = PMBUS_READ_POUT,
         .class = PSC_POWER,
@@ -1791,7 +1791,7 @@ static const struct pmbus_sensor_attr power_attributes[] = {
         .sfunc = PMBUS_HAVE_STATUS_IOUT,
         .sreg = PMBUS_STATUS_IOUT,
         .limit = pout_limit_attrs,
-        .nlimit = ARRAY_SIZE(pout_limit_attrs),
+        .nlimit = 0,
     }
 };
 
@@ -1920,7 +1920,7 @@ static const struct pmbus_sensor_attr temp_attributes[] = {
         .sreg = PMBUS_STATUS_TEMPERATURE,
         .gbit = PB_STATUS_TEMPERATURE,
         .limit = temp_limit_attrs,
-        .nlimit = ARRAY_SIZE(temp_limit_attrs),
+        .nlimit = 0,
     }, {
         .reg = PMBUS_READ_TEMPERATURE_2,
         .class = PSC_TEMPERATURE,
@@ -1932,7 +1932,7 @@ static const struct pmbus_sensor_attr temp_attributes[] = {
         .sreg = PMBUS_STATUS_TEMPERATURE,
         .gbit = PB_STATUS_TEMPERATURE,
         .limit = temp_limit_attrs2,
-        .nlimit = ARRAY_SIZE(temp_limit_attrs2),
+        .nlimit = 0,
     }, {
         .reg = PMBUS_READ_TEMPERATURE_3,
         .class = PSC_TEMPERATURE,
@@ -1944,7 +1944,7 @@ static const struct pmbus_sensor_attr temp_attributes[] = {
         .sreg = PMBUS_STATUS_TEMPERATURE,
         .gbit = PB_STATUS_TEMPERATURE,
         .limit = temp_limit_attrs3,
-        .nlimit = ARRAY_SIZE(temp_limit_attrs3),
+        .nlimit = 0,
     }
 };
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_tmp401.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_tmp401.c
index 4118510b1006..b8d3a024f624 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_tmp401.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_tmp401.c
@@ -42,6 +42,7 @@
 #include <linux/err.h>
 #include <linux/mutex.h>
 #include <linux/sysfs.h>
+#include <linux/delay.h>
 
 /* Addresses to scan */
 /* static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4c, 0x4d,
@@ -53,14 +54,15 @@ enum chips { tmp401, tmp411, tmp431, tmp432, tmp435, tmp461 };
  * The TMP401 registers, note some registers have different addresses for
  * reading and writing
  */
-#define TMP401_STATUS				0x02
-#define TMP401_CONFIG_READ			0x03
-#define TMP401_CONFIG_WRITE			0x09
-#define TMP401_CONVERSION_RATE_READ		0x04
-#define TMP401_CONVERSION_RATE_WRITE		0x0A
-#define TMP401_TEMP_CRIT_HYST			0x21
-#define TMP401_MANUFACTURER_ID_REG		0xFE
-#define TMP401_DEVICE_ID_REG			0xFF
+#define TMP401_STATUS                   (0x02)
+#define TMP401_CONFIG_READ              (0x03)
+#define TMP401_CONFIG_WRITE             (0x09)
+#define TMP401_CONVERSION_RATE_READ     (0x04)
+#define TMP401_CONVERSION_RATE_WRITE    (0x0A)
+#define TMP401_TEMP_CRIT_HYST           (0x21)
+#define TMP401_MANUFACTURER_ID_REG      (0xFE)
+#define TMP401_DEVICE_ID_REG            (0xFF)
+#define TMP401_DEVICE_CAR_REG           (0x22) /* Consecutive Alert Register */
 
 static const u8 TMP401_TEMP_MSB_READ[7][2] = {
 	{ 0x00, 0x01 },	/* temp */
@@ -117,30 +119,52 @@ static const u8 TMP432_STATUS_REG[] = {
 	0x1b, 0x36, 0x35, 0x37 };
 
 /* Flags */
-#define TMP401_CONFIG_RANGE			BIT(2)
-#define TMP401_CONFIG_SHUTDOWN			BIT(6)
-#define TMP401_STATUS_LOCAL_CRIT		BIT(0)
-#define TMP401_STATUS_REMOTE_CRIT		BIT(1)
-#define TMP401_STATUS_REMOTE_OPEN		BIT(2)
-#define TMP401_STATUS_REMOTE_LOW		BIT(3)
-#define TMP401_STATUS_REMOTE_HIGH		BIT(4)
-#define TMP401_STATUS_LOCAL_LOW			BIT(5)
-#define TMP401_STATUS_LOCAL_HIGH		BIT(6)
+#define TMP401_CONFIG_RANGE             BIT(2)
+#define TMP401_CONFIG_SHUTDOWN          BIT(6)
+#define TMP401_STATUS_LOCAL_CRIT        BIT(0)
+#define TMP401_STATUS_REMOTE_CRIT       BIT(1)
+#define TMP401_STATUS_REMOTE_OPEN       BIT(2)
+#define TMP401_STATUS_REMOTE_LOW        BIT(3)
+#define TMP401_STATUS_REMOTE_HIGH       BIT(4)
+#define TMP401_STATUS_LOCAL_LOW         BIT(5)
+#define TMP401_STATUS_LOCAL_HIGH        BIT(6)
 
 /* On TMP432, each status has its own register */
-#define TMP432_STATUS_LOCAL			BIT(0)
-#define TMP432_STATUS_REMOTE1			BIT(1)
-#define TMP432_STATUS_REMOTE2			BIT(2)
+#define TMP432_STATUS_LOCAL             BIT(0)
+#define TMP432_STATUS_REMOTE1           BIT(1)
+#define TMP432_STATUS_REMOTE2           BIT(2)
 
 /* Manufacturer / Device ID's */
-#define TMP401_MANUFACTURER_ID			0x55
-#define TMP401_DEVICE_ID			0x11
-#define TMP411A_DEVICE_ID			0x12
-#define TMP411B_DEVICE_ID			0x13
-#define TMP411C_DEVICE_ID			0x10
-#define TMP431_DEVICE_ID			0x31
-#define TMP432_DEVICE_ID			0x32
-#define TMP435_DEVICE_ID			0x35
+#define TMP401_MANUFACTURER_ID      (0x55)
+#define TMP401_DEVICE_ID            (0x11)
+#define TMP411A_DEVICE_ID           (0x12)
+#define TMP411B_DEVICE_ID           (0x13)
+#define TMP411C_DEVICE_ID           (0x10)
+#define TMP431_DEVICE_ID            (0x31)
+#define TMP432_DEVICE_ID            (0x32)
+#define TMP435_DEVICE_ID            (0x35)
+
+/* Timeout function bit */
+#define TIMEOUT_STATE_BIT                  (7)   /* 1:enable 0:disable */
+#define TIMEOUT_STATE_EN                   (1)   /* 1:enable  */
+#define TIMEOUT_STATE_IEN                  (0)   /* 0:disable */
+#define TIMEOUT_STATE_NA                   "NA"
+#define TMP401_TEMP_INVALID_RETRY_TIMES    (3)
+
+/* input temp threshold check */
+typedef struct tmp401_temp_threshold_s {
+    int chip_type;
+    int temp_max;
+    int temp_min;
+} tmp401_temp_threshold_t;
+
+static tmp401_temp_threshold_t g_tmp401_input_threshold_info[] = {
+    {
+        .chip_type = tmp411,
+        .temp_max = 127000,
+        .temp_min = -55000,
+    },
+};
 
 /*
  * Driver data (common to all clients)
@@ -309,18 +333,61 @@ static struct tmp401_data *tmp401_update_device(struct device *dev)
 	return ret;
 }
 
-static ssize_t show_temp(struct device *dev,
-			 struct device_attribute *devattr, char *buf)
+static int tmp401_input_temp_check(struct tmp401_data *data, int input_val)
 {
-	int nr = to_sensor_dev_attr_2(devattr)->nr;
-	int index = to_sensor_dev_attr_2(devattr)->index;
-	struct tmp401_data *data = tmp401_update_device(dev);
-
-	if (IS_ERR(data))
-		return PTR_ERR(data);
+    int i, size;
+
+    size = ARRAY_SIZE(g_tmp401_input_threshold_info);
+
+    for (i = 0; i < size; i++) {
+        if (g_tmp401_input_threshold_info[i].chip_type == data->kind) {
+            if ((input_val > g_tmp401_input_threshold_info[i].temp_max)
+                    || (input_val < g_tmp401_input_threshold_info[i].temp_min)) {
+                dev_dbg(&data->client->dev, "input temp: %d not in range[%d, %d]\n",
+                    input_val, g_tmp401_input_threshold_info[i].temp_min,
+                    g_tmp401_input_threshold_info[i].temp_max);
+                return -EINVAL;
+            }
+            dev_dbg(&data->client->dev, "input temp: %d in range[%d, %d]", input_val,
+                g_tmp401_input_threshold_info[i].temp_min, g_tmp401_input_threshold_info[i].temp_max);
+            return 0;
+        }
+    }
+    return 0;
+}
 
-	return sprintf(buf, "%d\n",
-		tmp401_register_to_temp(data->temp[nr][index], data->config));
+static ssize_t show_temp(struct device *dev, struct device_attribute *devattr, char *buf)
+{
+    int nr, index, i, value, ret;
+    struct tmp401_data *data;
+    struct i2c_client *client;
+
+    data = dev_get_drvdata(dev);
+    client = data->client;
+
+    nr = to_sensor_dev_attr_2(devattr)->nr;
+    index = to_sensor_dev_attr_2(devattr)->index;
+
+    for (i = 0; i < TMP401_TEMP_INVALID_RETRY_TIMES; i++) {
+        data = tmp401_update_device(dev);
+        if (IS_ERR(data)) {
+            return PTR_ERR(data);
+        }
+        value = tmp401_register_to_temp(data->temp[nr][index], data->config);
+        if (nr != 0) {  /* not input temp, return value */
+            return sprintf(buf, "%d\n", value);
+        }
+        /* nr == 0 is temp input, do input_temp_check */
+        ret = tmp401_input_temp_check(data, value);
+        if (ret == 0) { /* input temp check ok */
+           return sprintf(buf, "%d\n", value);
+        }
+        if ((i + 1) < TMP401_TEMP_INVALID_RETRY_TIMES) {
+            msleep(data->update_interval);
+        }
+    }
+    dev_info(&client->dev, "temp%d_input value: %d invalid\n", index + 1, value);
+    return -EINVAL;
 }
 
 static ssize_t show_temp_crit_hyst(struct device *dev,
@@ -488,6 +555,140 @@ static ssize_t set_update_interval(struct device *dev,
 	return count;
 }
 
+/*
+ * Enable/disable the state of the timeout function
+ * @dev: device info
+ * @state: 1:enable 0:disable
+ */
+static int timeout_cfg(struct device *dev, int state)
+{
+    int rv, chip_type;
+    u8 reg_value;
+    struct tmp401_data *data;
+    struct i2c_client *client;
+
+    data = dev_get_drvdata(dev);
+    client = data->client;
+
+    /* get chip type */
+    chip_type = data->kind;
+    dev_dbg(&client->dev, "set timeout. chip:%d, state:%d\n", chip_type, state);
+
+    /* chip type check */
+    if(chip_type != tmp401 && chip_type != tmp411)  {
+        dev_info(&client->dev,
+            "Chip type: %d, not support timeout config.!\n", chip_type);
+        return -EPERM;
+    }
+
+    /* parameter check */
+    if(state != TIMEOUT_STATE_EN && state != TIMEOUT_STATE_IEN) {
+        dev_err(&client->dev,
+            "Parameter check error. state: %d not supported.!\n", state);
+        return -EINVAL;
+    }
+
+    mutex_lock(&data->update_lock);
+    /* read the Consecutive alert register */
+    reg_value = i2c_smbus_read_byte_data(client, TMP401_DEVICE_CAR_REG);
+    if (reg_value < 0) {
+        dev_err(&client->dev, "Failed to read. reg:0x%0x, value:%d\n", TMP401_DEVICE_CAR_REG, reg_value);
+        mutex_unlock(&data->update_lock);
+        return -EIO;
+    }
+    dev_dbg(&client->dev, "get register value. reg:0x%0x, value:0x%0x\n", TMP401_DEVICE_CAR_REG, reg_value);
+
+    /* same value case, do not write */
+    if((u8)state == (reg_value >> TIMEOUT_STATE_BIT)) {
+        mutex_unlock(&data->update_lock);
+        dev_info(&client->dev, "timeout config has been set and the current state is %d.\n", state);
+        return 0;
+    }
+
+    /* calculate the register value */
+    reg_value = (reg_value & ~(1 << TIMEOUT_STATE_BIT)) | (state << TIMEOUT_STATE_BIT);
+
+    /* set the Consecutive alert register */
+    dev_dbg(&client->dev, "set register value. reg:0x%0x, value:0x%0x\n", TMP401_DEVICE_CAR_REG, reg_value);
+    rv = i2c_smbus_write_byte_data(client, TMP401_DEVICE_CAR_REG, reg_value);
+    if (rv < 0) {
+        dev_err(&client->dev,
+            "set the register Error. reg:0x%0x, value:%d\n", TMP401_DEVICE_CAR_REG, reg_value);
+        mutex_unlock(&data->update_lock);
+        return -EIO;
+    }
+    mutex_unlock(&data->update_lock);
+
+    dev_info(&client->dev, "set bus timeout success. reg:0x%0x, value:0x%0x\n", TMP401_DEVICE_CAR_REG, reg_value);
+
+    return 0;
+}
+
+static ssize_t set_timeout_en(struct device *dev,
+                   struct device_attribute *attr,
+                   const char *buf, size_t count)
+{
+    int val, err;
+    struct i2c_client *client;
+    struct tmp401_data *data;
+
+    data = dev_get_drvdata(dev);
+    client = data->client;
+
+    err = kstrtoint(buf, 0, &val);
+    if (err) {
+        dev_err(&client->dev,
+            "kstrtoint error: %d.\n", err);
+        return err;
+    }
+
+    err = timeout_cfg(dev, val);
+    if(err < 0) {
+        dev_err(&client->dev,
+            "set bus timeout error: %d. value:%d!\n", err, val);
+        return err;
+    }
+
+    return count;
+}
+
+static ssize_t show_timeout_en(struct device *dev,
+    struct device_attribute *devattr, char *buf)
+{
+    int chip_type;
+    u8 reg_value;
+    struct tmp401_data *data;
+    struct i2c_client *client;
+
+    data = dev_get_drvdata(dev);
+    client = data->client;
+
+    /* get chip type */
+    chip_type = data->kind;
+    dev_dbg(&client->dev, "get timeout. chip:%d\n", chip_type);
+
+    /* chip type check */
+    if(chip_type != tmp401 && chip_type != tmp411)  {
+        dev_info(&client->dev,
+            "Chip type: %d, not support timeout config.!\n", chip_type);
+        /* not support, return NA */
+        return (ssize_t)snprintf(buf, PAGE_SIZE, "%s\n", TIMEOUT_STATE_NA);
+    }
+
+    /* read the Consecutive alert register */
+    reg_value = i2c_smbus_read_byte_data(client, TMP401_DEVICE_CAR_REG);
+    if (reg_value < 0) {
+        dev_err(&client->dev, "Failed to read. reg:0x%0x, value:%d\n", TMP401_DEVICE_CAR_REG, reg_value);
+        return -EIO;
+    }
+    dev_dbg(&client->dev, "get register value. reg:0x%0x, value:0x%0x\n", TMP401_DEVICE_CAR_REG, reg_value);
+
+    /* decode the register value */
+    reg_value = reg_value >> TIMEOUT_STATE_BIT;
+
+    return (ssize_t)snprintf(buf, PAGE_SIZE, "%d\n", reg_value);
+}
+
 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IWUSR | S_IRUGO, show_temp,
 			    store_temp, 1, 0);
@@ -523,6 +724,7 @@ static SENSOR_DEVICE_ATTR_2(temp2_crit_alarm, S_IRUGO, show_status, NULL,
 
 static DEVICE_ATTR(update_interval, S_IRUGO | S_IWUSR, show_update_interval,
 		   set_update_interval);
+static DEVICE_ATTR(timeout_en, S_IRUGO | S_IWUSR, show_timeout_en, set_timeout_en);
 
 static struct attribute *tmp401_attributes[] = {
 	&sensor_dev_attr_temp1_input.dev_attr.attr,
@@ -545,6 +747,7 @@ static struct attribute *tmp401_attributes[] = {
 	&sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
 
 	&dev_attr_update_interval.attr,
+	&dev_attr_timeout_en.attr,
 
 	NULL
 };
@@ -775,6 +978,15 @@ static int tmp401_probe(struct i2c_client *client,
 	if (IS_ERR(hwmon_dev))
 		return PTR_ERR(hwmon_dev);
 
+    /* disable the timeout function */
+    status = timeout_cfg(hwmon_dev, TIMEOUT_STATE_IEN);
+    if((status < 0) && (status != -EPERM)) {
+        dev_err(dev,
+            "set bus timeout error when probing: %d.!\n", status);
+        /* here, no need call devm_hwmon_device_unregister, device managed. */
+        return status;
+    }
+
 	dev_info(dev, "Detected TI %s chip\n", names[data->kind]);
 
 	return 0;
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe12284.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe12284.c
new file mode 100644
index 000000000000..404c349f51f0
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe12284.c
@@ -0,0 +1,495 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Hardware monitoring driver for Infineon Multi-phase Digital VR Controllers
+ *
+ * Copyright (c) 2020 Mellanox Technologies. All rights reserved.
+ */
+
+#include <linux/err.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/sysfs.h>
+#include "wb_pmbus.h"
+
+#define XDPE122_PROT_VR12_5MV        (0x01) /* VR12.0 mode, 5-mV DAC */
+#define XDPE122_PROT_VR12_5_10MV     (0x02) /* VR12.5 mode, 10-mV DAC */
+#define XDPE122_PROT_IMVP9_10MV      (0x03) /* IMVP9 mode, 10-mV DAC */
+#define XDPE122_AMD_625MV            (0x10) /* AMD mode 6.25mV */
+#define XDPE122_PAGE_NUM             (2)
+#define XDPE122_WRITE_PROTECT_CLOSE  (0x00)
+#define XDPE122_WRITE_PROTECT_OPEN   (0x40)
+
+static int g_wb_xdpe122_debug = 0;
+static int g_wb_xdpe122_error = 0;
+
+module_param(g_wb_xdpe122_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_xdpe122_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_XDPE122_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_xdpe122_debug) { \
+        printk(KERN_INFO "[WB_XDPE122][VER][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_XDPE122_ERROR(fmt, args...) do {                                        \
+    if (g_wb_xdpe122_error) { \
+        printk(KERN_ERR "[WB_XDPE122][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static int xdpe122_data2reg_vid(struct pmbus_data *data, int page, long val)
+{
+    int vrm_version;
+
+    vrm_version = data->info->vrm_version[page];
+    WB_XDPE122_VERBOSE("page%d, vrm_version: %d, data_val: %ld\n",
+        page, vrm_version, val);
+    /* Convert data to VID register. */
+    switch (vrm_version) {
+    case vr13:
+        if (val >= 500) {
+            return 1 + DIV_ROUND_CLOSEST(val - 500, 10);
+        }
+        return 0;
+    case vr12:
+        if (val >= 250) {
+            return 1 + DIV_ROUND_CLOSEST(val - 250, 5);
+        }
+        return 0;
+    case imvp9:
+        if (val >= 200) {
+            return 1 + DIV_ROUND_CLOSEST(val - 200, 10);
+        }
+        return 0;
+    case amd625mv:
+        if (val >= 200 && val <= 1550) {
+            return DIV_ROUND_CLOSEST((1550 - val) * 100, 625);
+        }
+        return 0;
+    default:
+        WB_XDPE122_ERROR("Unsupport vrm_version, page%d, vrm_version: %d\n",
+            page, vrm_version);
+        return -EINVAL;
+    }
+    return 0;
+}
+
+
+/*
+ * Convert VID sensor values to milli- or micro-units
+ * depending on sensor type.
+ */
+static s64 xdpe122_reg2data_vid(struct pmbus_data *data, int page, long val)
+{
+
+    long rv;
+    int vrm_version;
+
+    rv = 0;
+    vrm_version = data->info->vrm_version[page];
+    switch (vrm_version) {
+    case vr11:
+        if (val >= 0x02 && val <= 0xb2)
+            rv = DIV_ROUND_CLOSEST(160000 - (val - 2) * 625, 100);
+        break;
+    case vr12:
+        if (val >= 0x01)
+            rv = 250 + (val - 1) * 5;
+        break;
+    case vr13:
+        if (val >= 0x01)
+            rv = 500 + (val - 1) * 10;
+        break;
+    case imvp9:
+        if (val >= 0x01)
+            rv = 200 + (val - 1) * 10;
+        break;
+    case amd625mv:
+        if (val >= 0x0 && val <= 0xd8)
+            rv = DIV_ROUND_CLOSEST(155000 - val * 625, 100);
+        break;
+    }
+    WB_XDPE122_VERBOSE("page%d, vrm_version: %d, reg_val: 0x%lx, data_val: %ld\n",
+        page, vrm_version, val, rv);
+    return rv;
+}
+
+static ssize_t xdpe122_avs_vout_show(struct device *dev, struct device_attribute *devattr,
+                   char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int vout_cmd, vout;
+
+    mutex_lock(&data->update_lock);
+    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
+    if (vout_cmd < 0) {
+        WB_XDPE122_ERROR("%d-%04x: read page%d, vout command reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd);
+        mutex_unlock(&data->update_lock);
+        return vout_cmd;
+    }
+
+    vout = xdpe122_reg2data_vid(data, attr->index, vout_cmd);
+    vout = vout * 1000;
+    WB_XDPE122_VERBOSE("%d-%04x: page%d, vout command reg_val: 0x%x, vout: %d uV\n",
+        client->adapter->nr, client->addr, attr->index, vout_cmd, vout);
+
+    mutex_unlock(&data->update_lock);
+    return snprintf(buf, PAGE_SIZE, "%d\n", vout);
+}
+
+static ssize_t xdpe122_avs_vout_store(struct device *dev, struct device_attribute *devattr,
+                   const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int vout, vout_max, vout_min, vout_mv;
+    int ret, vout_cmd, vout_cmd_set;
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    ret = kstrtoint(buf, 0, &vout);
+    if (ret) {
+        WB_XDPE122_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+
+    vout_max = data->vout_max[attr->index];
+    vout_min = data->vout_min[attr->index];
+    if ((vout > vout_max) || (vout < vout_min)) {
+        WB_XDPE122_ERROR("%d-%04x: vout value: %d, out of range [%d, %d] \n", client->adapter->nr,
+            client->addr, vout, vout_min, vout_max);
+        return -EINVAL;
+    }
+
+    /* calc VOUT_COMMAND set value Unit must be mV*/
+    vout_mv = vout / 1000;
+    vout_cmd_set = xdpe122_data2reg_vid(data, attr->index, vout_mv);
+    if ((vout_cmd_set < 0) || (vout_cmd_set > 0xffff)) {
+        WB_XDPE122_ERROR("%d-%04x: invalid value, vout %d uV, vout_cmd_set: %d\n",
+            client->adapter->nr, client->addr, vout, vout_cmd_set);
+        return -EINVAL;
+    }
+
+    mutex_lock(&data->update_lock);
+
+    /* close write protect */
+    ret = wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, XDPE122_WRITE_PROTECT_CLOSE);
+    if (ret < 0) {
+        WB_XDPE122_ERROR("%d-%04x: close page%d write protect failed, ret: %d\n", client->adapter->nr,
+            client->addr, attr->index, ret);
+        mutex_unlock(&data->update_lock);
+        return ret;
+    }
+
+    /* set VOUT_COMMAND */
+    ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set);
+    if (ret < 0) {
+        WB_XDPE122_ERROR("%d-%04x: set page%d vout cmd reg: 0x%x, value: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set, ret);
+        goto error;
+    }
+
+    /* read back VOUT_COMMAND */
+    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
+    if (vout_cmd < 0) {
+        ret = vout_cmd;
+        WB_XDPE122_ERROR("%d-%04x: read page%d vout command reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, ret);
+        goto error;
+    }
+
+    /* compare vout_cmd and vout_cmd_set */
+    if (vout_cmd != vout_cmd_set) {
+        ret = -EIO;
+        WB_XDPE122_ERROR("%d-%04x: vout cmd value check error, vout cmd read: 0x%x, vout cmd set: 0x%x\n",
+            client->adapter->nr, client->addr, vout_cmd, vout_cmd_set);
+        goto error;
+    }
+
+    /* open write protect */
+    wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, XDPE122_WRITE_PROTECT_OPEN);
+    mutex_unlock(&data->update_lock);
+    WB_XDPE122_VERBOSE("%d-%04x: set page%d vout cmd success, vout %d uV, vout_cmd_set: 0x%x\n",
+        client->adapter->nr, client->addr, attr->index, vout, vout_cmd_set);
+    return count;
+error:
+    wb_pmbus_write_byte_data(client, attr->index, PMBUS_WRITE_PROTECT, XDPE122_WRITE_PROTECT_OPEN);
+    mutex_unlock(&data->update_lock);
+    return ret;
+}
+
+static ssize_t xdpe122_avs_vout_max_store(struct device *dev,
+                   struct device_attribute *devattr, const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int ret, vout_threshold;
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    ret = kstrtoint(buf, 0, &vout_threshold);
+    if (ret) {
+        WB_XDPE122_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+
+    WB_XDPE122_VERBOSE("%d-%04x: vout%d max threshold: %d", client->adapter->nr, client->addr,
+        attr->index, vout_threshold);
+
+    data->vout_max[attr->index] = vout_threshold;
+    return count;
+}
+
+static ssize_t xdpe122_avs_vout_max_show(struct device *dev,
+                   struct device_attribute *devattr, char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_max[attr->index]);
+}
+
+static ssize_t xdpe122_avs_vout_min_store(struct device *dev,
+                   struct device_attribute *devattr, const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int ret, vout_threshold;
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    ret = kstrtoint(buf, 0, &vout_threshold);
+    if (ret) {
+        WB_XDPE122_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+
+    WB_XDPE122_VERBOSE("%d-%04x: vout%d min threshold: %d", client->adapter->nr, client->addr,
+        attr->index, vout_threshold);
+
+    data->vout_min[attr->index] = vout_threshold;
+    return count;
+}
+
+static ssize_t xdpe122_avs_vout_min_show(struct device *dev,
+                   struct device_attribute *devattr, char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_XDPE122_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_min[attr->index]);
+}
+
+static SENSOR_DEVICE_ATTR_RW(avs0_vout, xdpe122_avs_vout, 0);
+static SENSOR_DEVICE_ATTR_RW(avs1_vout, xdpe122_avs_vout, 1);
+static SENSOR_DEVICE_ATTR_RW(avs0_vout_max, xdpe122_avs_vout_max, 0);
+static SENSOR_DEVICE_ATTR_RW(avs0_vout_min, xdpe122_avs_vout_min, 0);
+static SENSOR_DEVICE_ATTR_RW(avs1_vout_max, xdpe122_avs_vout_max, 1);
+static SENSOR_DEVICE_ATTR_RW(avs1_vout_min, xdpe122_avs_vout_min, 1);
+
+static struct attribute *avs_ctrl_attrs[] = {
+    &sensor_dev_attr_avs0_vout.dev_attr.attr,
+    &sensor_dev_attr_avs1_vout.dev_attr.attr,
+    &sensor_dev_attr_avs0_vout_max.dev_attr.attr,
+    &sensor_dev_attr_avs0_vout_min.dev_attr.attr,
+    &sensor_dev_attr_avs1_vout_max.dev_attr.attr,
+    &sensor_dev_attr_avs1_vout_min.dev_attr.attr,
+    NULL,
+};
+
+static const struct attribute_group avs_ctrl_group = {
+    .attrs = avs_ctrl_attrs,
+};
+
+static const struct attribute_group *xdpe122_attribute_groups[] = {
+    &avs_ctrl_group,
+    NULL,
+};
+
+static int xdpe122_read_word_data(struct i2c_client *client, int page,
+				  int phase, int reg)
+{
+	const struct pmbus_driver_info *info = wb_pmbus_get_driver_info(client);
+	long val;
+	s16 exponent;
+	s32 mantissa;
+	int ret;
+
+	switch (reg) {
+	case PMBUS_VOUT_OV_FAULT_LIMIT:
+	case PMBUS_VOUT_UV_FAULT_LIMIT:
+		ret = wb_pmbus_read_word_data(client, page, phase, reg);
+		if (ret < 0)
+			return ret;
+
+		/* Convert register value to LINEAR11 data. */
+		exponent = ((s16)ret) >> 11;
+		mantissa = ((s16)((ret & GENMASK(10, 0)) << 5)) >> 5;
+		val = mantissa * 1000L;
+		if (exponent >= 0)
+			val <<= exponent;
+		else
+			val >>= -exponent;
+
+		/* Convert data to VID register. */
+		switch (info->vrm_version[page]) {
+		case vr13:
+			if (val >= 500)
+				return 1 + DIV_ROUND_CLOSEST(val - 500, 10);
+			return 0;
+		case vr12:
+			if (val >= 250)
+				return 1 + DIV_ROUND_CLOSEST(val - 250, 5);
+			return 0;
+		case imvp9:
+			if (val >= 200)
+				return 1 + DIV_ROUND_CLOSEST(val - 200, 10);
+			return 0;
+		case amd625mv:
+			if (val >= 200 && val <= 1550)
+				return DIV_ROUND_CLOSEST((1550 - val) * 100,
+							 625);
+			return 0;
+		default:
+			return -EINVAL;
+		}
+	default:
+		return -ENODATA;
+	}
+
+	return 0;
+}
+
+static int xdpe122_identify(struct i2c_client *client,
+			    struct pmbus_driver_info *info)
+{
+	u8 vout_params;
+	int i, ret;
+
+	for (i = 0; i < XDPE122_PAGE_NUM; i++) {
+		/* Read the register with VOUT scaling value.*/
+		ret = wb_pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE);
+		if (ret < 0)
+			return ret;
+
+		vout_params = ret & GENMASK(4, 0);
+
+		switch (vout_params) {
+		case XDPE122_PROT_VR12_5_10MV:
+			info->vrm_version[i] = vr13;
+			break;
+		case XDPE122_PROT_VR12_5MV:
+			info->vrm_version[i] = vr12;
+			break;
+		case XDPE122_PROT_IMVP9_10MV:
+			info->vrm_version[i] = imvp9;
+			break;
+		case XDPE122_AMD_625MV:
+			info->vrm_version[i] = amd625mv;
+			break;
+		default:
+			return -EINVAL;
+		}
+	}
+
+	return 0;
+}
+
+static struct pmbus_driver_info xdpe122_info = {
+	.pages = XDPE122_PAGE_NUM,
+	.format[PSC_VOLTAGE_IN] = linear,
+	.format[PSC_VOLTAGE_OUT] = vid,
+	.format[PSC_TEMPERATURE] = linear,
+	.format[PSC_CURRENT_IN] = linear,
+	.format[PSC_CURRENT_OUT] = linear,
+	.format[PSC_POWER] = linear,
+	.func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
+		PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
+		PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
+		PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT,
+	.func[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT |
+		PMBUS_HAVE_IIN | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT |
+		PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP |
+		PMBUS_HAVE_POUT | PMBUS_HAVE_PIN | PMBUS_HAVE_STATUS_INPUT,
+	.groups = xdpe122_attribute_groups,
+	.identify = xdpe122_identify,
+	.read_word_data = xdpe122_read_word_data,
+};
+
+static int xdpe122_probe(struct i2c_client *client)
+{
+	struct pmbus_driver_info *info;
+
+	info = devm_kmemdup(&client->dev, &xdpe122_info, sizeof(*info),
+			    GFP_KERNEL);
+	if (!info)
+		return -ENOMEM;
+
+	return wb_pmbus_do_probe(client, info);
+}
+
+static const struct i2c_device_id xdpe122_id[] = {
+	{"wb_xdpe12254", 0},
+	{"wb_xdpe12284", 0},
+	{}
+};
+
+MODULE_DEVICE_TABLE(i2c, xdpe122_id);
+
+static const struct of_device_id __maybe_unused xdpe122_of_match[] = {
+	{.compatible = "infineon,wb_xdpe12254"},
+	{.compatible = "infineon,wb_xdpe12284"},
+	{}
+};
+MODULE_DEVICE_TABLE(of, xdpe122_of_match);
+
+static struct i2c_driver xdpe122_driver = {
+	.driver = {
+		.name = "wb_xdpe12284",
+		.of_match_table = of_match_ptr(xdpe122_of_match),
+	},
+	.probe_new = xdpe122_probe,
+	.remove = wb_pmbus_do_remove,
+	.id_table = xdpe122_id,
+};
+
+module_i2c_driver(xdpe122_driver);
+
+MODULE_AUTHOR("Vadim Pasternak <vadimp@mellanox.com>");
+MODULE_DESCRIPTION("PMBus driver for Infineon XDPE122 family");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/Makefile
new file mode 100644
index 000000000000..4d5f8d5358d9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/Makefile
@@ -0,0 +1,23 @@
+PWD		= $(shell pwd)
+
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+
+ifndef CONFIG_MDIO_BITBANG
+obj-m += mdio_bitbang.o
+endif
+
+ifndef CONFIG_MDIO_GPIO
+obj-m += mdio_gpio.o
+endif
+
+obj-m += wb_mdio_gpio_device.o
+
+all:
+	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
+	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
+	cp -p  $(PWD)/*.ko $(module_out_put_dir)
+clean:
+	rm -f $(PWD)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd $(PWD)/*.mod
+	rm -f $(PWD)/Module.markers $(PWD)/Module.symvers $(PWD)/modules.order
+	rm -rf $(PWD)/.tmp_versions
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/mdio_bitbang.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/mdio_bitbang.c
new file mode 100644
index 000000000000..5136275c8e73
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/mdio_bitbang.c
@@ -0,0 +1,232 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Bitbanged MDIO support.
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ * Copyright (c) 2007 Freescale Semiconductor
+ *
+ * Based on CPM2 MDIO code which is:
+ *
+ * Copyright (c) 2003 Intracom S.A.
+ *  by Pantelis Antoniou <panto@intracom.gr>
+ *
+ * 2005 (c) MontaVista Software, Inc.
+ * Vitaly Bordug <vbordug@ru.mvista.com>
+ */
+
+#include <linux/module.h>
+#include <linux/mdio-bitbang.h>
+#include <linux/types.h>
+#include <linux/delay.h>
+
+#define MDIO_READ 2
+#define MDIO_WRITE 1
+
+#define MDIO_C45 (1<<15)
+#define MDIO_C45_ADDR (MDIO_C45 | 0)
+#define MDIO_C45_READ (MDIO_C45 | 3)
+#define MDIO_C45_WRITE (MDIO_C45 | 1)
+
+#define MDIO_SETUP_TIME 10
+#define MDIO_HOLD_TIME 10
+
+/* Minimum MDC period is 400 ns, plus some margin for error.  MDIO_DELAY
+ * is done twice per period.
+ */
+#define MDIO_DELAY 250
+
+/* The PHY may take up to 300 ns to produce data, plus some margin
+ * for error.
+ */
+#define MDIO_READ_DELAY 350
+
+/* MDIO must already be configured as output. */
+static void mdiobb_send_bit(struct mdiobb_ctrl *ctrl, int val)
+{
+	const struct mdiobb_ops *ops = ctrl->ops;
+
+	ops->set_mdio_data(ctrl, val);
+	ndelay(MDIO_DELAY);
+	ops->set_mdc(ctrl, 1);
+	ndelay(MDIO_DELAY);
+	ops->set_mdc(ctrl, 0);
+}
+
+/* MDIO must already be configured as input. */
+static int mdiobb_get_bit(struct mdiobb_ctrl *ctrl)
+{
+	const struct mdiobb_ops *ops = ctrl->ops;
+
+	ndelay(MDIO_DELAY);
+	ops->set_mdc(ctrl, 1);
+	ndelay(MDIO_READ_DELAY);
+	ops->set_mdc(ctrl, 0);
+
+	return ops->get_mdio_data(ctrl);
+}
+
+/* MDIO must already be configured as output. */
+static void mdiobb_send_num(struct mdiobb_ctrl *ctrl, u16 val, int bits)
+{
+	int i;
+
+	for (i = bits - 1; i >= 0; i--)
+		mdiobb_send_bit(ctrl, (val >> i) & 1);
+}
+
+/* MDIO must already be configured as input. */
+static u16 mdiobb_get_num(struct mdiobb_ctrl *ctrl, int bits)
+{
+	int i;
+	u16 ret = 0;
+
+	for (i = bits - 1; i >= 0; i--) {
+		ret <<= 1;
+		ret |= mdiobb_get_bit(ctrl);
+	}
+
+	return ret;
+}
+
+/* Utility to send the preamble, address, and
+ * register (common to read and write).
+ */
+static void mdiobb_cmd(struct mdiobb_ctrl *ctrl, int op, u8 phy, u8 reg)
+{
+	const struct mdiobb_ops *ops = ctrl->ops;
+	int i;
+
+	ops->set_mdio_dir(ctrl, 1);
+
+	/*
+	 * Send a 32 bit preamble ('1's) with an extra '1' bit for good
+	 * measure.  The IEEE spec says this is a PHY optional
+	 * requirement.  The AMD 79C874 requires one after power up and
+	 * one after a MII communications error.  This means that we are
+	 * doing more preambles than we need, but it is safer and will be
+	 * much more robust.
+	 */
+
+	for (i = 0; i < 32; i++)
+		mdiobb_send_bit(ctrl, 1);
+
+	/* send the start bit (01) and the read opcode (10) or write (01).
+	   Clause 45 operation uses 00 for the start and 11, 10 for
+	   read/write */
+	mdiobb_send_bit(ctrl, 0);
+	if (op & MDIO_C45)
+		mdiobb_send_bit(ctrl, 0);
+	else
+		mdiobb_send_bit(ctrl, 1);
+	mdiobb_send_bit(ctrl, (op >> 1) & 1);
+	mdiobb_send_bit(ctrl, (op >> 0) & 1);
+
+	mdiobb_send_num(ctrl, phy, 5);
+	mdiobb_send_num(ctrl, reg, 5);
+}
+
+/* In clause 45 mode all commands are prefixed by MDIO_ADDR to specify the
+   lower 16 bits of the 21 bit address. This transfer is done identically to a
+   MDIO_WRITE except for a different code. To enable clause 45 mode or
+   MII_ADDR_C45 into the address. Theoretically clause 45 and normal devices
+   can exist on the same bus. Normal devices should ignore the MDIO_ADDR
+   phase. */
+static int mdiobb_cmd_addr(struct mdiobb_ctrl *ctrl, int phy, u32 addr)
+{
+	unsigned int dev_addr = (addr >> 16) & 0x1F;
+	unsigned int reg = addr & 0xFFFF;
+	mdiobb_cmd(ctrl, MDIO_C45_ADDR, phy, dev_addr);
+
+	/* send the turnaround (10) */
+	mdiobb_send_bit(ctrl, 1);
+	mdiobb_send_bit(ctrl, 0);
+
+	mdiobb_send_num(ctrl, reg, 16);
+
+	ctrl->ops->set_mdio_dir(ctrl, 0);
+	mdiobb_get_bit(ctrl);
+
+	return dev_addr;
+}
+
+static int mdiobb_read(struct mii_bus *bus, int phy, int reg)
+{
+	struct mdiobb_ctrl *ctrl = bus->priv;
+	int ret, i;
+
+	if (reg & MII_ADDR_C45) {
+		reg = mdiobb_cmd_addr(ctrl, phy, reg);
+		mdiobb_cmd(ctrl, MDIO_C45_READ, phy, reg);
+	} else
+		mdiobb_cmd(ctrl, MDIO_READ, phy, reg);
+
+	ctrl->ops->set_mdio_dir(ctrl, 0);
+
+	/* check the turnaround bit: the PHY should be driving it to zero, if this
+	 * PHY is listed in phy_ignore_ta_mask as having broken TA, skip that
+	 */
+	if (mdiobb_get_bit(ctrl) != 0 &&
+	    !(bus->phy_ignore_ta_mask & (1 << phy))) {
+		/* PHY didn't drive TA low -- flush any bits it
+		 * may be trying to send.
+		 */
+		for (i = 0; i < 32; i++)
+			mdiobb_get_bit(ctrl);
+
+		return 0xffff;
+	}
+
+	ret = mdiobb_get_num(ctrl, 16);
+	mdiobb_get_bit(ctrl);
+	return ret;
+}
+
+static int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val)
+{
+	struct mdiobb_ctrl *ctrl = bus->priv;
+
+	if (reg & MII_ADDR_C45) {
+		reg = mdiobb_cmd_addr(ctrl, phy, reg);
+		mdiobb_cmd(ctrl, MDIO_C45_WRITE, phy, reg);
+	} else
+		mdiobb_cmd(ctrl, MDIO_WRITE, phy, reg);
+
+	/* send the turnaround (10) */
+	mdiobb_send_bit(ctrl, 1);
+	mdiobb_send_bit(ctrl, 0);
+
+	mdiobb_send_num(ctrl, val, 16);
+
+	ctrl->ops->set_mdio_dir(ctrl, 0);
+	mdiobb_get_bit(ctrl);
+	return 0;
+}
+
+struct mii_bus *alloc_mdio_bitbang(struct mdiobb_ctrl *ctrl)
+{
+	struct mii_bus *bus;
+
+	bus = mdiobus_alloc();
+	if (!bus)
+		return NULL;
+
+	__module_get(ctrl->ops->owner);
+
+	bus->read = mdiobb_read;
+	bus->write = mdiobb_write;
+	bus->priv = ctrl;
+
+	return bus;
+}
+EXPORT_SYMBOL(alloc_mdio_bitbang);
+
+void free_mdio_bitbang(struct mii_bus *bus)
+{
+	struct mdiobb_ctrl *ctrl = bus->priv;
+
+	module_put(ctrl->ops->owner);
+	mdiobus_free(bus);
+}
+EXPORT_SYMBOL(free_mdio_bitbang);
+
+MODULE_LICENSE("GPL v2");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/mdio_gpio.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/mdio_gpio.c
new file mode 100644
index 000000000000..1b00235d7dc5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/mdio_gpio.c
@@ -0,0 +1,217 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * GPIO based MDIO bitbang driver.
+ * Supports OpenFirmware.
+ *
+ * Copyright (c) 2008 CSE Semaphore Belgium.
+ *  by Laurent Pinchart <laurentp@cse-semaphore.com>
+ *
+ * Copyright (C) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
+ *
+ * Based on earlier work by
+ *
+ * Copyright (c) 2003 Intracom S.A.
+ *  by Pantelis Antoniou <panto@intracom.gr>
+ *
+ * 2005 (c) MontaVista Software, Inc.
+ * Vitaly Bordug <vbordug@ru.mvista.com>
+ */
+
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/mdio-gpio.h>
+#include <linux/mdio-bitbang.h>
+#include <linux/mdio-gpio.h>
+#include <linux/gpio/consumer.h>
+#include <linux/of_mdio.h>
+
+struct mdio_gpio_info {
+	struct mdiobb_ctrl ctrl;
+	struct gpio_desc *mdc, *mdio, *mdo;
+};
+
+static int mdio_gpio_get_data(struct device *dev,
+			      struct mdio_gpio_info *bitbang)
+{
+	bitbang->mdc = devm_gpiod_get_index(dev, NULL, MDIO_GPIO_MDC,
+					    GPIOD_OUT_LOW);
+	if (IS_ERR(bitbang->mdc))
+		return PTR_ERR(bitbang->mdc);
+
+	bitbang->mdio = devm_gpiod_get_index(dev, NULL, MDIO_GPIO_MDIO,
+					     GPIOD_IN);
+	if (IS_ERR(bitbang->mdio))
+		return PTR_ERR(bitbang->mdio);
+
+	bitbang->mdo = devm_gpiod_get_index_optional(dev, NULL, MDIO_GPIO_MDO,
+						     GPIOD_OUT_LOW);
+	return PTR_ERR_OR_ZERO(bitbang->mdo);
+}
+
+static void mdio_dir(struct mdiobb_ctrl *ctrl, int dir)
+{
+	struct mdio_gpio_info *bitbang =
+		container_of(ctrl, struct mdio_gpio_info, ctrl);
+
+	if (bitbang->mdo) {
+		/* Separate output pin. Always set its value to high
+		 * when changing direction. If direction is input,
+		 * assume the pin serves as pull-up. If direction is
+		 * output, the default value is high.
+		 */
+		gpiod_set_value_cansleep(bitbang->mdo, 1);
+		return;
+	}
+
+	if (dir)
+		gpiod_direction_output(bitbang->mdio, 1);
+	else
+		gpiod_direction_input(bitbang->mdio);
+}
+
+static int mdio_get(struct mdiobb_ctrl *ctrl)
+{
+	struct mdio_gpio_info *bitbang =
+		container_of(ctrl, struct mdio_gpio_info, ctrl);
+
+	return gpiod_get_value_cansleep(bitbang->mdio);
+}
+
+static void mdio_set(struct mdiobb_ctrl *ctrl, int what)
+{
+	struct mdio_gpio_info *bitbang =
+		container_of(ctrl, struct mdio_gpio_info, ctrl);
+
+	if (bitbang->mdo)
+		gpiod_set_value_cansleep(bitbang->mdo, what);
+	else
+		gpiod_set_value_cansleep(bitbang->mdio, what);
+}
+
+static void mdc_set(struct mdiobb_ctrl *ctrl, int what)
+{
+	struct mdio_gpio_info *bitbang =
+		container_of(ctrl, struct mdio_gpio_info, ctrl);
+
+	gpiod_set_value_cansleep(bitbang->mdc, what);
+}
+
+static const struct mdiobb_ops mdio_gpio_ops = {
+	.owner = THIS_MODULE,
+	.set_mdc = mdc_set,
+	.set_mdio_dir = mdio_dir,
+	.set_mdio_data = mdio_set,
+	.get_mdio_data = mdio_get,
+};
+
+static struct mii_bus *mdio_gpio_bus_init(struct device *dev,
+					  struct mdio_gpio_info *bitbang,
+					  int bus_id)
+{
+	struct mdio_gpio_platform_data *pdata = dev_get_platdata(dev);
+	struct mii_bus *new_bus;
+
+	bitbang->ctrl.ops = &mdio_gpio_ops;
+
+	new_bus = alloc_mdio_bitbang(&bitbang->ctrl);
+	if (!new_bus)
+		return NULL;
+
+	new_bus->name = "GPIO Bitbanged MDIO";
+	new_bus->parent = dev;
+
+	if (bus_id != -1)
+		snprintf(new_bus->id, MII_BUS_ID_SIZE, "gpio-%x", bus_id);
+	else
+		strncpy(new_bus->id, "gpio", MII_BUS_ID_SIZE);
+
+	if (pdata) {
+		new_bus->phy_mask = pdata->phy_mask;
+		new_bus->phy_ignore_ta_mask = pdata->phy_ignore_ta_mask;
+	}
+
+	dev_set_drvdata(dev, new_bus);
+
+	return new_bus;
+}
+
+static void mdio_gpio_bus_deinit(struct device *dev)
+{
+	struct mii_bus *bus = dev_get_drvdata(dev);
+
+	free_mdio_bitbang(bus);
+}
+
+static void mdio_gpio_bus_destroy(struct device *dev)
+{
+	struct mii_bus *bus = dev_get_drvdata(dev);
+
+	mdiobus_unregister(bus);
+	mdio_gpio_bus_deinit(dev);
+}
+
+static int mdio_gpio_probe(struct platform_device *pdev)
+{
+	struct mdio_gpio_info *bitbang;
+	struct mii_bus *new_bus;
+	int ret, bus_id;
+
+	bitbang = devm_kzalloc(&pdev->dev, sizeof(*bitbang), GFP_KERNEL);
+	if (!bitbang)
+		return -ENOMEM;
+
+	ret = mdio_gpio_get_data(&pdev->dev, bitbang);
+	if (ret)
+		return ret;
+
+	if (pdev->dev.of_node) {
+		bus_id = of_alias_get_id(pdev->dev.of_node, "mdio-gpio");
+		if (bus_id < 0) {
+			dev_warn(&pdev->dev, "failed to get alias id\n");
+			bus_id = 0;
+		}
+	} else {
+		bus_id = pdev->id;
+	}
+
+	new_bus = mdio_gpio_bus_init(&pdev->dev, bitbang, bus_id);
+	if (!new_bus)
+		return -ENODEV;
+
+	ret = of_mdiobus_register(new_bus, pdev->dev.of_node);
+	if (ret)
+		mdio_gpio_bus_deinit(&pdev->dev);
+
+	return ret;
+}
+
+static int mdio_gpio_remove(struct platform_device *pdev)
+{
+	mdio_gpio_bus_destroy(&pdev->dev);
+
+	return 0;
+}
+
+static const struct of_device_id mdio_gpio_of_match[] = {
+	{ .compatible = "virtual,mdio-gpio", },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, mdio_gpio_of_match);
+
+static struct platform_driver mdio_gpio_driver = {
+	.probe = mdio_gpio_probe,
+	.remove = mdio_gpio_remove,
+	.driver		= {
+		.name	= "mdio-gpio",
+		.of_match_table = mdio_gpio_of_match,
+	},
+};
+
+module_platform_driver(mdio_gpio_driver);
+
+MODULE_ALIAS("platform:mdio-gpio");
+MODULE_AUTHOR("Laurent Pinchart, Paulius Zaleckas");
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Generic driver for MDIO bus emulation using GPIO");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/wb_mdio_gpio_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/wb_mdio_gpio_device.c
new file mode 100644
index 000000000000..e3198b378a20
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/wb_mdio_gpio_device.c
@@ -0,0 +1,110 @@
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/errno.h>
+#include <linux/ioport.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/platform_data/mdio-gpio.h>
+#include <linux/mdio-gpio.h>
+#include <linux/gpio.h>
+#include <linux/gpio/machine.h>
+
+static int gpio_mdc = 44;
+module_param(gpio_mdc, int, S_IRUGO | S_IWUSR);
+
+static int gpio_mdio = 45;
+module_param(gpio_mdio, int, S_IRUGO | S_IWUSR);
+
+static char *gpio_chip_name = NULL;
+module_param(gpio_chip_name, charp, 0644);
+MODULE_PARM_DESC(str_var, "A string variable for GPIO controller");
+
+static int g_wb_mdio_gpio_device_debug = 0;
+static int g_wb_mdio_gpio_device_error = 0;
+
+module_param(g_wb_mdio_gpio_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_mdio_gpio_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_MIDO_GPIO_DEVICE_DEBUG_VERBOSE(fmt, args...) do {                                        \
+    if (g_wb_mdio_gpio_device_debug) { \
+        printk(KERN_INFO "[WB_MDIO_GPIO_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_MIDO_GPIO_DEVICE_DEBUG_ERROR(fmt, args...) do {                                        \
+    if (g_wb_mdio_gpio_device_error) { \
+        printk(KERN_ERR "[WB_MDIO_GPIO_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+struct mdio_gpio_platform_data mdio_gpio_device_data = {
+    .phy_mask = 0,
+    .phy_ignore_ta_mask = 0,
+};
+
+static void wb_mdio_gpio_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device mdio_gpio_device = {
+    .name   = "mdio-gpio",
+    .num_resources  = 0,
+    .id             = -1,
+    .dev    = {
+        .platform_data  = &mdio_gpio_device_data,
+        .release = wb_mdio_gpio_device_release,
+    },
+};
+
+static struct gpiod_lookup_table wb_mdio_gpio_table = {
+    .dev_id = "mdio-gpio",
+    .table = {
+        GPIO_LOOKUP_IDX("wb_gpio_d1500", 44, NULL, MDIO_GPIO_MDC,
+                GPIO_ACTIVE_HIGH),
+        GPIO_LOOKUP_IDX("wb_gpio_d1500", 45, NULL, MDIO_GPIO_MDIO,
+                GPIO_ACTIVE_HIGH),
+        { },
+    },
+};
+
+static int __init wb_mdio_gpio_device_init(void)
+{
+    int err;
+
+    WB_MIDO_GPIO_DEVICE_DEBUG_VERBOSE("wb_mdio_gpio_device_init enter!\n");
+    wb_mdio_gpio_table.table[0].chip_hwnum = gpio_mdc;
+    wb_mdio_gpio_table.table[1].chip_hwnum = gpio_mdio;
+
+    if (gpio_chip_name) {
+        wb_mdio_gpio_table.table[0].key = gpio_chip_name;
+        wb_mdio_gpio_table.table[1].key = gpio_chip_name;
+    }
+
+    gpiod_add_lookup_table(&wb_mdio_gpio_table);
+
+    err = platform_device_register(&mdio_gpio_device);
+    if (err < 0) {
+        printk(KERN_ERR "register mdio gpio device fail(%d). \n", err);
+        gpiod_remove_lookup_table(&wb_mdio_gpio_table);
+        return -1;
+    }
+    return 0;
+
+}
+
+static void __exit wb_mdio_gpio_device_exit(void)
+{
+    WB_MIDO_GPIO_DEVICE_DEBUG_VERBOSE("wb_mdio_gpio_device_exit enter!\n");
+    platform_device_unregister(&mdio_gpio_device);
+    gpiod_remove_lookup_table(&wb_mdio_gpio_table);
+}
+
+module_init(wb_mdio_gpio_device_init);
+module_exit(wb_mdio_gpio_device_exit);
+MODULE_DESCRIPTION("WB MDIO GPIO Devices");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/Makefile
new file mode 100644
index 000000000000..295934ca4a29
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/Makefile
@@ -0,0 +1,17 @@
+PWD		= $(shell pwd)
+
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+
+obj-m := wb_pinctrl_intel.o
+obj-m += wb_gpio_c3000.o
+obj-m += wb_gpio_c3000_device.o
+
+all:
+	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
+	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
+	cp -p  $(PWD)/*.ko $(module_out_put_dir)
+clean:
+	rm -f $(PWD)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd $(PWD)/*.mod
+	rm -f $(PWD)/Module.markers $(PWD)/Module.symvers $(PWD)/modules.order
+	rm -rf $(PWD)/.tmp_versions
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/core.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/core.h
new file mode 100644
index 000000000000..840103c40c14
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/core.h
@@ -0,0 +1,249 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Core private header for the pin control subsystem
+ *
+ * Copyright (C) 2011 ST-Ericsson SA
+ * Written on behalf of Linaro for ST-Ericsson
+ *
+ * Author: Linus Walleij <linus.walleij@linaro.org>
+ */
+
+#include <linux/kref.h>
+#include <linux/mutex.h>
+#include <linux/radix-tree.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/machine.h>
+
+struct pinctrl_gpio_range;
+
+/**
+ * struct pinctrl_dev - pin control class device
+ * @node: node to include this pin controller in the global pin controller list
+ * @desc: the pin controller descriptor supplied when initializing this pin
+ *	controller
+ * @pin_desc_tree: each pin descriptor for this pin controller is stored in
+ *	this radix tree
+ * @pin_group_tree: optionally each pin group can be stored in this radix tree
+ * @num_groups: optionally number of groups can be kept here
+ * @pin_function_tree: optionally each function can be stored in this radix tree
+ * @num_functions: optionally number of functions can be kept here
+ * @gpio_ranges: a list of GPIO ranges that is handled by this pin controller,
+ *	ranges are added to this list at runtime
+ * @dev: the device entry for this pin controller
+ * @owner: module providing the pin controller, used for refcounting
+ * @driver_data: driver data for drivers registering to the pin controller
+ *	subsystem
+ * @p: result of pinctrl_get() for this device
+ * @hog_default: default state for pins hogged by this device
+ * @hog_sleep: sleep state for pins hogged by this device
+ * @mutex: mutex taken on each pin controller specific action
+ * @device_root: debugfs root for this device
+ */
+struct pinctrl_dev {
+	struct list_head node;
+	struct pinctrl_desc *desc;
+	struct radix_tree_root pin_desc_tree;
+#ifdef CONFIG_GENERIC_PINCTRL_GROUPS
+	struct radix_tree_root pin_group_tree;
+	unsigned int num_groups;
+#endif
+#ifdef CONFIG_GENERIC_PINMUX_FUNCTIONS
+	struct radix_tree_root pin_function_tree;
+	unsigned int num_functions;
+#endif
+	struct list_head gpio_ranges;
+	struct device *dev;
+	struct module *owner;
+	void *driver_data;
+	struct pinctrl *p;
+	struct pinctrl_state *hog_default;
+	struct pinctrl_state *hog_sleep;
+	struct mutex mutex;
+#ifdef CONFIG_DEBUG_FS
+	struct dentry *device_root;
+#endif
+};
+
+/**
+ * struct pinctrl - per-device pin control state holder
+ * @node: global list node
+ * @dev: the device using this pin control handle
+ * @states: a list of states for this device
+ * @state: the current state
+ * @dt_maps: the mapping table chunks dynamically parsed from device tree for
+ *	this device, if any
+ * @users: reference count
+ */
+struct pinctrl {
+	struct list_head node;
+	struct device *dev;
+	struct list_head states;
+	struct pinctrl_state *state;
+	struct list_head dt_maps;
+	struct kref users;
+};
+
+/**
+ * struct pinctrl_state - a pinctrl state for a device
+ * @node: list node for struct pinctrl's @states field
+ * @name: the name of this state
+ * @settings: a list of settings for this state
+ */
+struct pinctrl_state {
+	struct list_head node;
+	const char *name;
+	struct list_head settings;
+};
+
+/**
+ * struct pinctrl_setting_mux - setting data for MAP_TYPE_MUX_GROUP
+ * @group: the group selector to program
+ * @func: the function selector to program
+ */
+struct pinctrl_setting_mux {
+	unsigned group;
+	unsigned func;
+};
+
+/**
+ * struct pinctrl_setting_configs - setting data for MAP_TYPE_CONFIGS_*
+ * @group_or_pin: the group selector or pin ID to program
+ * @configs: a pointer to an array of config parameters/values to program into
+ *	hardware. Each individual pin controller defines the format and meaning
+ *	of config parameters.
+ * @num_configs: the number of entries in array @configs
+ */
+struct pinctrl_setting_configs {
+	unsigned group_or_pin;
+	unsigned long *configs;
+	unsigned num_configs;
+};
+
+/**
+ * struct pinctrl_setting - an individual mux or config setting
+ * @node: list node for struct pinctrl_settings's @settings field
+ * @type: the type of setting
+ * @pctldev: pin control device handling to be programmed. Not used for
+ *   PIN_MAP_TYPE_DUMMY_STATE.
+ * @dev_name: the name of the device using this state
+ * @data: Data specific to the setting type
+ */
+struct pinctrl_setting {
+	struct list_head node;
+	enum pinctrl_map_type type;
+	struct pinctrl_dev *pctldev;
+	const char *dev_name;
+	union {
+		struct pinctrl_setting_mux mux;
+		struct pinctrl_setting_configs configs;
+	} data;
+};
+
+/**
+ * struct pin_desc - pin descriptor for each physical pin in the arch
+ * @pctldev: corresponding pin control device
+ * @name: a name for the pin, e.g. the name of the pin/pad/finger on a
+ *	datasheet or such
+ * @dynamic_name: if the name of this pin was dynamically allocated
+ * @drv_data: driver-defined per-pin data. pinctrl core does not touch this
+ * @mux_usecount: If zero, the pin is not claimed, and @owner should be NULL.
+ *	If non-zero, this pin is claimed by @owner. This field is an integer
+ *	rather than a boolean, since pinctrl_get() might process multiple
+ *	mapping table entries that refer to, and hence claim, the same group
+ *	or pin, and each of these will increment the @usecount.
+ * @mux_owner: The name of device that called pinctrl_get().
+ * @mux_setting: The most recent selected mux setting for this pin, if any.
+ * @gpio_owner: If pinctrl_gpio_request() was called for this pin, this is
+ *	the name of the GPIO that "owns" this pin.
+ */
+struct pin_desc {
+	struct pinctrl_dev *pctldev;
+	const char *name;
+	bool dynamic_name;
+	void *drv_data;
+	/* These fields only added when supporting pinmux drivers */
+#ifdef CONFIG_PINMUX
+	unsigned mux_usecount;
+	const char *mux_owner;
+	const struct pinctrl_setting_mux *mux_setting;
+	const char *gpio_owner;
+#endif
+};
+
+/**
+ * struct pinctrl_maps - a list item containing part of the mapping table
+ * @node: mapping table list node
+ * @maps: array of mapping table entries
+ * @num_maps: the number of entries in @maps
+ */
+struct pinctrl_maps {
+	struct list_head node;
+	const struct pinctrl_map *maps;
+	unsigned num_maps;
+};
+
+#ifdef CONFIG_GENERIC_PINCTRL_GROUPS
+
+/**
+ * struct group_desc - generic pin group descriptor
+ * @name: name of the pin group
+ * @pins: array of pins that belong to the group
+ * @num_pins: number of pins in the group
+ * @data: pin controller driver specific data
+ */
+struct group_desc {
+	const char *name;
+	int *pins;
+	int num_pins;
+	void *data;
+};
+
+int pinctrl_generic_get_group_count(struct pinctrl_dev *pctldev);
+
+const char *pinctrl_generic_get_group_name(struct pinctrl_dev *pctldev,
+					   unsigned int group_selector);
+
+int pinctrl_generic_get_group_pins(struct pinctrl_dev *pctldev,
+				   unsigned int group_selector,
+				   const unsigned int **pins,
+				   unsigned int *npins);
+
+struct group_desc *pinctrl_generic_get_group(struct pinctrl_dev *pctldev,
+					     unsigned int group_selector);
+
+int pinctrl_generic_add_group(struct pinctrl_dev *pctldev, const char *name,
+			      int *gpins, int ngpins, void *data);
+
+int pinctrl_generic_remove_group(struct pinctrl_dev *pctldev,
+				 unsigned int group_selector);
+
+#endif	/* CONFIG_GENERIC_PINCTRL_GROUPS */
+
+struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *dev_name);
+struct pinctrl_dev *get_pinctrl_dev_from_of_node(struct device_node *np);
+int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name);
+const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin);
+int pinctrl_get_group_selector(struct pinctrl_dev *pctldev,
+			       const char *pin_group);
+
+static inline struct pin_desc *pin_desc_get(struct pinctrl_dev *pctldev,
+					    unsigned int pin)
+{
+	return radix_tree_lookup(&pctldev->pin_desc_tree, pin);
+}
+
+extern struct pinctrl_gpio_range *
+pinctrl_find_gpio_range_from_pin_nolock(struct pinctrl_dev *pctldev,
+					unsigned int pin);
+
+extern int pinctrl_force_sleep(struct pinctrl_dev *pctldev);
+extern int pinctrl_force_default(struct pinctrl_dev *pctldev);
+
+extern struct mutex pinctrl_maps_mutex;
+extern struct list_head pinctrl_maps;
+
+#define for_each_maps(_maps_node_, _i_, _map_) \
+	list_for_each_entry(_maps_node_, &pinctrl_maps, node) \
+		for (_i_ = 0, _map_ = &_maps_node_->maps[_i_]; \
+			_i_ < _maps_node_->num_maps; \
+			_i_++, _map_ = &_maps_node_->maps[_i_])
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000.c
new file mode 100644
index 000000000000..753c8a061a86
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000.c
@@ -0,0 +1,452 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Intel Denverton SoC pinctrl/GPIO driver
+ *
+ * Copyright (C) 2017, Intel Corporation
+ * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
+ */
+
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/pci.h>
+
+#include "wb_pinctrl_intel.h"
+
+static int g_c3000_gpio_debug = 0;
+static int g_c3000_gpio_error = 0;
+module_param(g_c3000_gpio_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_c3000_gpio_error, int, S_IRUGO | S_IWUSR);
+
+#define C3000_GPIO_VERBOSE(fmt, args...) do {                                        \
+    if (g_c3000_gpio_debug) { \
+        printk(KERN_INFO "[GPIO_PCIE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define C3000_GPIO_ERROR(fmt, args...) do {                                        \
+    if (g_c3000_gpio_error) { \
+        printk(KERN_ERR "[GPIO_PCIE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define DNV_PAD_OWN	0x020
+#define DNV_PADCFGLOCK	0x090
+#define DNV_HOSTSW_OWN	0x0C0
+#define DNV_GPI_IS	0x100
+#define DNV_GPI_IE	0x120
+
+#define DNV_GPP(n, s, e)				\
+	{						\
+		.reg_num = (n),				\
+		.base = (s),				\
+		.size = ((e) - (s) + 1),		\
+	}
+
+#define DNV_COMMUNITY(b, s, e, g, d)			\
+	{						\
+		.barno = (b),				\
+		.padown_offset = DNV_PAD_OWN,		\
+		.padcfglock_offset = DNV_PADCFGLOCK,	\
+		.hostown_offset = DNV_HOSTSW_OWN,	\
+		.is_offset = DNV_GPI_IS,		\
+		.ie_offset = DNV_GPI_IE,		\
+		.pin_base = (s),			\
+		.npins = ((e) - (s) + 1),		\
+		.gpps = (g),				\
+		.ngpps = ARRAY_SIZE(g),			\
+		.dw_base = (d),				\
+	}
+
+/* Denverton */
+static const struct pinctrl_pin_desc dnv_pins[] = {
+	/* North ALL */
+	PINCTRL_PIN(0, "GBE0_SDP0"),
+	PINCTRL_PIN(1, "GBE1_SDP0"),
+	PINCTRL_PIN(2, "GBE0_SDP1"),
+	PINCTRL_PIN(3, "GBE1_SDP1"),
+	PINCTRL_PIN(4, "GBE0_SDP2"),
+	PINCTRL_PIN(5, "GBE1_SDP2"),
+	PINCTRL_PIN(6, "GBE0_SDP3"),
+	PINCTRL_PIN(7, "GBE1_SDP3"),
+	PINCTRL_PIN(8, "GBE2_LED0"),
+	PINCTRL_PIN(9, "GBE2_LED1"),
+	PINCTRL_PIN(10, "GBE0_I2C_CLK"),
+	PINCTRL_PIN(11, "GBE0_I2C_DATA"),
+	PINCTRL_PIN(12, "GBE1_I2C_CLK"),
+	PINCTRL_PIN(13, "GBE1_I2C_DATA"),
+	PINCTRL_PIN(14, "NCSI_RXD0"),
+	PINCTRL_PIN(15, "NCSI_CLK_IN"),
+	PINCTRL_PIN(16, "NCSI_RXD1"),
+	PINCTRL_PIN(17, "NCSI_CRS_DV"),
+	PINCTRL_PIN(18, "NCSI_ARB_IN"),
+	PINCTRL_PIN(19, "NCSI_TX_EN"),
+	PINCTRL_PIN(20, "NCSI_TXD0"),
+	PINCTRL_PIN(21, "NCSI_TXD1"),
+	PINCTRL_PIN(22, "NCSI_ARB_OUT"),
+	PINCTRL_PIN(23, "GBE0_LED0"),
+	PINCTRL_PIN(24, "GBE0_LED1"),
+	PINCTRL_PIN(25, "GBE1_LED0"),
+	PINCTRL_PIN(26, "GBE1_LED1"),
+	PINCTRL_PIN(27, "GPIO0"),
+	PINCTRL_PIN(28, "PCIE_CLKREQ0_N"),
+	PINCTRL_PIN(29, "PCIE_CLKREQ1_N"),
+	PINCTRL_PIN(30, "PCIE_CLKREQ2_N"),
+	PINCTRL_PIN(31, "PCIE_CLKREQ3_N"),
+	PINCTRL_PIN(32, "PCIE_CLKREQ4_N"),
+	PINCTRL_PIN(33, "GPIO1"),
+	PINCTRL_PIN(34, "GPIO2"),
+	PINCTRL_PIN(35, "SVID_ALERT_N"),
+	PINCTRL_PIN(36, "SVID_DATA"),
+	PINCTRL_PIN(37, "SVID_CLK"),
+	PINCTRL_PIN(38, "THERMTRIP_N"),
+	PINCTRL_PIN(39, "PROCHOT_N"),
+	PINCTRL_PIN(40, "MEMHOT_N"),
+	/* South DFX */
+	PINCTRL_PIN(41, "DFX_PORT_CLK0"),
+	PINCTRL_PIN(42, "DFX_PORT_CLK1"),
+	PINCTRL_PIN(43, "DFX_PORT0"),
+	PINCTRL_PIN(44, "DFX_PORT1"),
+	PINCTRL_PIN(45, "DFX_PORT2"),
+	PINCTRL_PIN(46, "DFX_PORT3"),
+	PINCTRL_PIN(47, "DFX_PORT4"),
+	PINCTRL_PIN(48, "DFX_PORT5"),
+	PINCTRL_PIN(49, "DFX_PORT6"),
+	PINCTRL_PIN(50, "DFX_PORT7"),
+	PINCTRL_PIN(51, "DFX_PORT8"),
+	PINCTRL_PIN(52, "DFX_PORT9"),
+	PINCTRL_PIN(53, "DFX_PORT10"),
+	PINCTRL_PIN(54, "DFX_PORT11"),
+	PINCTRL_PIN(55, "DFX_PORT12"),
+	PINCTRL_PIN(56, "DFX_PORT13"),
+	PINCTRL_PIN(57, "DFX_PORT14"),
+	PINCTRL_PIN(58, "DFX_PORT15"),
+	/* South GPP0 */
+	PINCTRL_PIN(59, "GPIO12"),
+	PINCTRL_PIN(60, "SMB5_GBE_ALRT_N"),
+	PINCTRL_PIN(61, "PCIE_CLKREQ5_N"),
+	PINCTRL_PIN(62, "PCIE_CLKREQ6_N"),
+	PINCTRL_PIN(63, "PCIE_CLKREQ7_N"),
+	PINCTRL_PIN(64, "UART0_RXD"),
+	PINCTRL_PIN(65, "UART0_TXD"),
+	PINCTRL_PIN(66, "SMB5_GBE_CLK"),
+	PINCTRL_PIN(67, "SMB5_GBE_DATA"),
+	PINCTRL_PIN(68, "ERROR2_N"),
+	PINCTRL_PIN(69, "ERROR1_N"),
+	PINCTRL_PIN(70, "ERROR0_N"),
+	PINCTRL_PIN(71, "IERR_N"),
+	PINCTRL_PIN(72, "MCERR_N"),
+	PINCTRL_PIN(73, "SMB0_LEG_CLK"),
+	PINCTRL_PIN(74, "SMB0_LEG_DATA"),
+	PINCTRL_PIN(75, "SMB0_LEG_ALRT_N"),
+	PINCTRL_PIN(76, "SMB1_HOST_DATA"),
+	PINCTRL_PIN(77, "SMB1_HOST_CLK"),
+	PINCTRL_PIN(78, "SMB2_PECI_DATA"),
+	PINCTRL_PIN(79, "SMB2_PECI_CLK"),
+	PINCTRL_PIN(80, "SMB4_CSME0_DATA"),
+	PINCTRL_PIN(81, "SMB4_CSME0_CLK"),
+	PINCTRL_PIN(82, "SMB4_CSME0_ALRT_N"),
+	PINCTRL_PIN(83, "USB_OC0_N"),
+	PINCTRL_PIN(84, "FLEX_CLK_SE0"),
+	PINCTRL_PIN(85, "FLEX_CLK_SE1"),
+	PINCTRL_PIN(86, "GPIO4"),
+	PINCTRL_PIN(87, "GPIO5"),
+	PINCTRL_PIN(88, "GPIO6"),
+	PINCTRL_PIN(89, "GPIO7"),
+	PINCTRL_PIN(90, "SATA0_LED_N"),
+	PINCTRL_PIN(91, "SATA1_LED_N"),
+	PINCTRL_PIN(92, "SATA_PDETECT0"),
+	PINCTRL_PIN(93, "SATA_PDETECT1"),
+	PINCTRL_PIN(94, "SATA0_SDOUT"),
+	PINCTRL_PIN(95, "SATA1_SDOUT"),
+	PINCTRL_PIN(96, "UART1_RXD"),
+	PINCTRL_PIN(97, "UART1_TXD"),
+	PINCTRL_PIN(98, "GPIO8"),
+	PINCTRL_PIN(99, "GPIO9"),
+	PINCTRL_PIN(100, "TCK"),
+	PINCTRL_PIN(101, "TRST_N"),
+	PINCTRL_PIN(102, "TMS"),
+	PINCTRL_PIN(103, "TDI"),
+	PINCTRL_PIN(104, "TDO"),
+	PINCTRL_PIN(105, "CX_PRDY_N"),
+	PINCTRL_PIN(106, "CX_PREQ_N"),
+	PINCTRL_PIN(107, "CTBTRIGINOUT"),
+	PINCTRL_PIN(108, "CTBTRIGOUT"),
+	PINCTRL_PIN(109, "DFX_SPARE2"),
+	PINCTRL_PIN(110, "DFX_SPARE3"),
+	PINCTRL_PIN(111, "DFX_SPARE4"),
+	/* South GPP1 */
+	PINCTRL_PIN(112, "SUSPWRDNACK"),
+	PINCTRL_PIN(113, "PMU_SUSCLK"),
+	PINCTRL_PIN(114, "ADR_TRIGGER"),
+	PINCTRL_PIN(115, "PMU_SLP_S45_N"),
+	PINCTRL_PIN(116, "PMU_SLP_S3_N"),
+	PINCTRL_PIN(117, "PMU_WAKE_N"),
+	PINCTRL_PIN(118, "PMU_PWRBTN_N"),
+	PINCTRL_PIN(119, "PMU_RESETBUTTON_N"),
+	PINCTRL_PIN(120, "PMU_PLTRST_N"),
+	PINCTRL_PIN(121, "SUS_STAT_N"),
+	PINCTRL_PIN(122, "SLP_S0IX_N"),
+	PINCTRL_PIN(123, "SPI_CS0_N"),
+	PINCTRL_PIN(124, "SPI_CS1_N"),
+	PINCTRL_PIN(125, "SPI_MOSI_IO0"),
+	PINCTRL_PIN(126, "SPI_MISO_IO1"),
+	PINCTRL_PIN(127, "SPI_IO2"),
+	PINCTRL_PIN(128, "SPI_IO3"),
+	PINCTRL_PIN(129, "SPI_CLK"),
+	PINCTRL_PIN(130, "SPI_CLK_LOOPBK"),
+	PINCTRL_PIN(131, "ESPI_IO0"),
+	PINCTRL_PIN(132, "ESPI_IO1"),
+	PINCTRL_PIN(133, "ESPI_IO2"),
+	PINCTRL_PIN(134, "ESPI_IO3"),
+	PINCTRL_PIN(135, "ESPI_CS0_N"),
+	PINCTRL_PIN(136, "ESPI_CLK"),
+	PINCTRL_PIN(137, "ESPI_RST_N"),
+	PINCTRL_PIN(138, "ESPI_ALRT0_N"),
+	PINCTRL_PIN(139, "GPIO10"),
+	PINCTRL_PIN(140, "GPIO11"),
+	PINCTRL_PIN(141, "ESPI_CLK_LOOPBK"),
+	PINCTRL_PIN(142, "EMMC_CMD"),
+	PINCTRL_PIN(143, "EMMC_STROBE"),
+	PINCTRL_PIN(144, "EMMC_CLK"),
+	PINCTRL_PIN(145, "EMMC_D0"),
+	PINCTRL_PIN(146, "EMMC_D1"),
+	PINCTRL_PIN(147, "EMMC_D2"),
+	PINCTRL_PIN(148, "EMMC_D3"),
+	PINCTRL_PIN(149, "EMMC_D4"),
+	PINCTRL_PIN(150, "EMMC_D5"),
+	PINCTRL_PIN(151, "EMMC_D6"),
+	PINCTRL_PIN(152, "EMMC_D7"),
+	PINCTRL_PIN(153, "GPIO3"),
+};
+
+static const unsigned int dnv_uart0_pins[] = { 60, 61, 64, 65 };
+static const unsigned int dnv_uart0_modes[] = { 2, 3, 1, 1 };
+static const unsigned int dnv_uart1_pins[] = { 94, 95, 96, 97 };
+static const unsigned int dnv_uart2_pins[] = { 60, 61, 62, 63 };
+static const unsigned int dnv_uart2_modes[] = { 1, 2, 2, 2 };
+static const unsigned int dnv_emmc_pins[] = {
+	142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152,
+};
+
+static const struct intel_pingroup dnv_groups[] = {
+	PIN_GROUP("uart0_grp", dnv_uart0_pins, dnv_uart0_modes),
+	PIN_GROUP("uart1_grp", dnv_uart1_pins, 1),
+	PIN_GROUP("uart2_grp", dnv_uart2_pins, dnv_uart2_modes),
+	PIN_GROUP("emmc_grp", dnv_emmc_pins, 1),
+};
+
+static const char * const dnv_uart0_groups[] = { "uart0_grp" };
+static const char * const dnv_uart1_groups[] = { "uart1_grp" };
+static const char * const dnv_uart2_groups[] = { "uart2_grp" };
+static const char * const dnv_emmc_groups[] = { "emmc_grp" };
+
+static const struct intel_function dnv_functions[] = {
+	FUNCTION("uart0", dnv_uart0_groups),
+	FUNCTION("uart1", dnv_uart1_groups),
+	FUNCTION("uart2", dnv_uart2_groups),
+	FUNCTION("emmc", dnv_emmc_groups),
+};
+
+static const struct intel_padgroup dnv_north_gpps[] = {
+	DNV_GPP(0, 0, 31),	/* North ALL_0 */
+	DNV_GPP(1, 32, 40),	/* North ALL_1 */
+};
+
+static const struct intel_padgroup dnv_south_gpps[] = {
+	DNV_GPP(0, 41, 58),	/* South DFX */
+	DNV_GPP(1, 59, 90),	/* South GPP0_0 */
+	DNV_GPP(2, 91, 111),	/* South GPP0_1 */
+	DNV_GPP(3, 112, 143),	/* South GPP1_0 */
+	DNV_GPP(4, 144, 153),	/* South GPP1_1 */
+};
+
+static const struct intel_community dnv_communities[] = {
+	DNV_COMMUNITY(0, 0, 40, dnv_north_gpps, 0xc20000),
+	DNV_COMMUNITY(1, 41, 153, dnv_south_gpps, 0xc50000),
+};
+
+static const struct intel_pinctrl_soc_data dnv_soc_data = {
+	.pins = dnv_pins,
+	.npins = ARRAY_SIZE(dnv_pins),
+	.groups = dnv_groups,
+	.ngroups = ARRAY_SIZE(dnv_groups),
+	.functions = dnv_functions,
+	.nfunctions = ARRAY_SIZE(dnv_functions),
+	.communities = dnv_communities,
+	.ncommunities = ARRAY_SIZE(dnv_communities),
+};
+
+static INTEL_PINCTRL_PM_OPS(dnv_pinctrl_pm_ops);
+
+static int pci_dev_init(wb_gpio_data_t *wb_gpio_data, struct pci_dev *pci_dev)
+{
+    int err, i;
+    void __iomem *base;
+
+    C3000_GPIO_VERBOSE("Enter vendor 0x%x, device 0x%x.\n",
+        pci_dev->vendor, pci_dev->device);
+
+    C3000_GPIO_VERBOSE("start pci_enable_device!\n");
+    err = pci_enable_device(pci_dev);
+    if (err) {
+        dev_err(&pci_dev->dev, "Failed to enable pci device, ret:%d.\n", err);
+        return err;
+    }
+
+    err = pci_request_region(pci_dev, 0, "P2SB");
+    if (err) {
+        dev_err(&pci_dev->dev, "Requesting C3000 P2SB BAR0 region failed, ret: %d\n", err);
+        goto err_disable;
+    }
+
+    C3000_GPIO_VERBOSE("start pci_set_master!\n");
+    pci_set_master(pci_dev);
+
+    base = pci_iomap(pci_dev, wb_gpio_data->pci_bar, 0);
+    if (!base) {
+        dev_err(&pci_dev->dev, "pci_iomap bar: %d failed\n", wb_gpio_data->pci_bar);
+        err = -ENOMEM;
+        goto err_release;
+    }
+    wb_gpio_data->pci_mem_base = base;
+
+    for (i = 0; i < dnv_soc_data.ncommunities; i++) {
+        wb_gpio_data->res[i] = base + dnv_soc_data.communities[i].dw_base;
+    }
+    return 0;
+err_release:
+    pci_release_region(pci_dev, wb_gpio_data->pci_bar);
+err_disable:
+    pci_disable_device(pci_dev);
+    return err;
+}
+
+static void pci_dev_release(wb_gpio_data_t *wb_gpio_data)
+{
+    struct pci_dev *pci_dev;
+
+    pci_dev = wb_gpio_data->pci_dev;
+    if (wb_gpio_data->pci_mem_base) {
+        pci_iounmap(pci_dev, wb_gpio_data->pci_mem_base);
+    }
+    pci_release_region(pci_dev, wb_gpio_data->pci_bar);
+    pci_disable_device(pci_dev);
+    return;
+}
+
+static int wb_gpio_driver_probe(struct platform_device *plat_dev)
+{
+    int ret, devfn;
+    wb_gpio_data_t *wb_gpio_data;
+    wb_gpio_data_t *c3000_gpio_device;
+    struct pci_dev *pci_dev;
+
+    if (dnv_soc_data.ncommunities > GPIO_RES_MAX) {
+        dev_err(&plat_dev->dev, "GPIO ncommunities %lu is more than GPIO resource number: %d\n",
+            dnv_soc_data.ncommunities, GPIO_RES_MAX);
+        return -EINVAL;
+    }
+
+    wb_gpio_data = devm_kzalloc(&plat_dev->dev, sizeof(wb_gpio_data_t), GFP_KERNEL);
+    if (!wb_gpio_data) {
+        dev_err(&plat_dev->dev, "devm_kzalloc failed.\n");
+        ret = -ENOMEM;
+        return ret;
+    }
+
+    if (plat_dev->dev.of_node) {
+        ret = 0;
+        ret += of_property_read_u32(plat_dev->dev.of_node, "pci_domain", &wb_gpio_data->pci_domain);
+        ret += of_property_read_u32(plat_dev->dev.of_node, "pci_bus", &wb_gpio_data->pci_bus);
+        ret += of_property_read_u32(plat_dev->dev.of_node, "pci_slot", &wb_gpio_data->pci_slot);
+        ret += of_property_read_u32(plat_dev->dev.of_node, "pci_fn", &wb_gpio_data->pci_fn);
+        ret += of_property_read_u32(plat_dev->dev.of_node, "pci_bar", &wb_gpio_data->pci_bar);
+        ret += of_property_read_u32(plat_dev->dev.of_node, "irq", &wb_gpio_data->irq);
+        if (ret != 0) {
+            dev_err(&plat_dev->dev, "Failed to get dts config, ret:%d.\n", ret);
+            return -ENXIO;
+        }
+    } else {
+        if (plat_dev->dev.platform_data == NULL) {
+            dev_err(&plat_dev->dev, "Failed to get platform data config.\n");
+            return -ENXIO;
+        }
+        c3000_gpio_device = plat_dev->dev.platform_data;
+        wb_gpio_data->pci_domain = c3000_gpio_device->pci_domain;
+        wb_gpio_data->pci_bus = c3000_gpio_device->pci_bus;
+        wb_gpio_data->pci_slot = c3000_gpio_device->pci_slot;
+        wb_gpio_data->pci_fn = c3000_gpio_device->pci_fn;
+        wb_gpio_data->pci_bar = c3000_gpio_device->pci_bar;
+        wb_gpio_data->irq = c3000_gpio_device->irq;
+    }
+
+    C3000_GPIO_VERBOSE("domain:0x%04x, bus:0x%02x, slot:0x%02x, fn:%u, bar:%u, irq: %d\n",
+        wb_gpio_data->pci_domain, wb_gpio_data->pci_bus, wb_gpio_data->pci_slot, wb_gpio_data->pci_fn,
+        wb_gpio_data->pci_bar, wb_gpio_data->irq);
+
+    devfn = PCI_DEVFN(wb_gpio_data->pci_slot, wb_gpio_data->pci_fn);
+    pci_dev = pci_get_domain_bus_and_slot(wb_gpio_data->pci_domain, wb_gpio_data->pci_bus, devfn);
+    if (pci_dev == NULL) {
+        dev_err(&plat_dev->dev, "Failed to find pci_dev, domain:0x%04x, bus:0x%02x, devfn:0x%x\n",
+            wb_gpio_data->pci_domain, wb_gpio_data->pci_bus, devfn);
+        return -ENXIO;
+    }
+    wb_gpio_data->pci_dev = pci_dev;
+    ret = pci_dev_init(wb_gpio_data, pci_dev);
+    if (ret != 0) {
+        dev_err(&plat_dev->dev, "Failed to get pci bar address.\n");
+        return ret;
+    }
+    C3000_GPIO_VERBOSE("pci_dev_init success, pci_mem_bae: 0x%pK, res0: 0x%pK, res1: 0x%pK\n",
+        wb_gpio_data->pci_mem_base, wb_gpio_data->res[0], wb_gpio_data->res[1]);
+
+    platform_set_drvdata(plat_dev, wb_gpio_data);
+
+    ret = wb_pinctrl_probe(plat_dev, &dnv_soc_data);
+    if (ret) {
+        dev_err(&plat_dev->dev, "C3000 gpio pinctrl probe failed, ret:%d\n", ret);
+        pci_dev_release(wb_gpio_data);
+        return ret;
+    }
+    dev_info(&plat_dev->dev, "C3000 gpio pinctrl probe success.\n");
+    return 0;
+}
+
+static int wb_gpio_driver_remove(struct platform_device *plat_dev)
+{
+    wb_gpio_data_t *wb_gpio_data;
+
+    C3000_GPIO_VERBOSE("c3000_gpio_pcie_remove.\n");
+
+    wb_gpio_data = platform_get_drvdata(plat_dev);
+    pci_dev_release(wb_gpio_data);
+    return 0;
+}
+
+static const struct of_device_id gpio_c3000_match[] = {
+	{
+		.compatible = "wb_gpio_c3000",
+	},
+	{},
+};
+MODULE_DEVICE_TABLE(of, gpio_c3000_match);
+
+static struct platform_driver wb_gpio_c3000_driver = {
+	.driver = {
+		.name		= "wb_gpio_c3000",
+		.of_match_table = gpio_c3000_match,
+	},
+	.probe = wb_gpio_driver_probe,
+	.remove = wb_gpio_driver_remove,
+};
+
+module_platform_driver(wb_gpio_c3000_driver);
+
+MODULE_DESCRIPTION("C3000 GPIO Controller driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000_device.c
new file mode 100644
index 000000000000..33ab19a5ac44
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_gpio_c3000_device.c
@@ -0,0 +1,69 @@
+#include <linux/module.h>
+#include <linux/io.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+
+#include "wb_pinctrl_intel.h"
+
+static int g_wb_c300_gpio_device_debug = 0;
+static int g_wb_c300_gpio_device_error = 0;
+
+module_param(g_wb_c300_gpio_device_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_c300_gpio_device_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_C3000_GPIO_DEVICE_DEBUG(fmt, args...) do {                                        \
+    if (g_wb_c300_gpio_device_debug) { \
+        printk(KERN_INFO "[WB_C3000_GPIO_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_C3000_GPIO_DEVICE_ERROR(fmt, args...) do {                                        \
+    if (g_wb_c300_gpio_device_error) { \
+        printk(KERN_ERR "[WB_C3000_GPIO_DEVICE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+static wb_gpio_data_t c3000_gpio_device_data = {
+    .irq = 15,
+    .pci_domain = 0x0000,
+    .pci_bus = 0x00,
+    .pci_slot = 0x1f,
+    .pci_fn = 1,
+    .pci_bar = 0,
+};
+
+static void wb_c3000_gpio_device_release(struct device *dev)
+{
+    return;
+}
+
+static struct platform_device c3000_gpio_device = {
+    .name   = "wb_gpio_c3000",
+    .id = -1,
+    .dev    = {
+        .platform_data = &c3000_gpio_device_data,
+        .release = wb_c3000_gpio_device_release,
+    },
+};
+
+static int __init wb_c3000_gpio_device_init(void)
+{
+    WB_C3000_GPIO_DEVICE_DEBUG("wb_c3000_gpio_device_init enter!\n");
+    return platform_device_register(&c3000_gpio_device);
+
+}
+
+static void __exit wb_c3000_gpio_device_exit(void)
+{
+
+    WB_C3000_GPIO_DEVICE_DEBUG("wb_c3000_gpio_device_exit enter!\n");
+    platform_device_unregister(&c3000_gpio_device);
+    return;
+}
+
+module_init(wb_c3000_gpio_device_init);
+module_exit(wb_c3000_gpio_device_exit);
+MODULE_DESCRIPTION("C3000 GPIO Controller device");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.c
new file mode 100644
index 000000000000..7a52f17ac8f9
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.c
@@ -0,0 +1,1829 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Intel pinctrl/GPIO core driver.
+ *
+ * Copyright (C) 2015, Intel Corporation
+ * Authors: Mathias Nyman <mathias.nyman@linux.intel.com>
+ *          Mika Westerberg <mika.westerberg@linux.intel.com>
+ */
+
+#include <linux/acpi.h>
+#include <linux/gpio/driver.h>
+#include <linux/interrupt.h>
+#include <linux/log2.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/property.h>
+#include <linux/time.h>
+
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinmux.h>
+#include <linux/pinctrl/pinconf.h>
+#include <linux/pinctrl/pinconf-generic.h>
+
+#include "core.h"
+#include "wb_pinctrl_intel.h"
+
+/* Offset from regs */
+#define REVID				0x000
+#define REVID_SHIFT			16
+#define REVID_MASK			GENMASK(31, 16)
+
+#define PADBAR				0x00c
+
+#define PADOWN_BITS			4
+#define PADOWN_SHIFT(p)			((p) % 8 * PADOWN_BITS)
+#define PADOWN_MASK(p)			(GENMASK(3, 0) << PADOWN_SHIFT(p))
+#define PADOWN_GPP(p)			((p) / 8)
+
+/* Offset from pad_regs */
+#define PADCFG0				0x000
+#define PADCFG0_RXEVCFG_SHIFT		25
+#define PADCFG0_RXEVCFG_MASK		GENMASK(26, 25)
+#define PADCFG0_RXEVCFG_LEVEL		0
+#define PADCFG0_RXEVCFG_EDGE		1
+#define PADCFG0_RXEVCFG_DISABLED	2
+#define PADCFG0_RXEVCFG_EDGE_BOTH	3
+#define PADCFG0_PREGFRXSEL		BIT(24)
+#define PADCFG0_RXINV			BIT(23)
+#define PADCFG0_GPIROUTIOXAPIC		BIT(20)
+#define PADCFG0_GPIROUTSCI		BIT(19)
+#define PADCFG0_GPIROUTSMI		BIT(18)
+#define PADCFG0_GPIROUTNMI		BIT(17)
+#define PADCFG0_PMODE_SHIFT		10
+#define PADCFG0_PMODE_MASK		GENMASK(13, 10)
+#define PADCFG0_PMODE_GPIO		0
+#define PADCFG0_GPIORXDIS		BIT(9)
+#define PADCFG0_GPIOTXDIS		BIT(8)
+#define PADCFG0_GPIORXSTATE		BIT(1)
+#define PADCFG0_GPIOTXSTATE		BIT(0)
+
+#define PADCFG1				0x004
+#define PADCFG1_TERM_UP			BIT(13)
+#define PADCFG1_TERM_SHIFT		10
+#define PADCFG1_TERM_MASK		GENMASK(12, 10)
+#define PADCFG1_TERM_20K		BIT(2)
+#define PADCFG1_TERM_5K			BIT(1)
+#define PADCFG1_TERM_1K			BIT(0)
+#define PADCFG1_TERM_833		(BIT(1) | BIT(0))
+
+#define PADCFG2				0x008
+#define PADCFG2_DEBEN			BIT(0)
+#define PADCFG2_DEBOUNCE_SHIFT		1
+#define PADCFG2_DEBOUNCE_MASK		GENMASK(4, 1)
+
+#define DEBOUNCE_PERIOD_NSEC		31250
+
+struct intel_pad_context {
+	u32 padcfg0;
+	u32 padcfg1;
+	u32 padcfg2;
+};
+
+struct intel_community_context {
+	u32 *intmask;
+	u32 *hostown;
+};
+
+#define pin_to_padno(c, p)	((p) - (c)->pin_base)
+#define padgroup_offset(g, p)	((p) - (g)->base)
+
+static struct intel_community *intel_get_community(struct intel_pinctrl *pctrl,
+						   unsigned int pin)
+{
+	struct intel_community *community;
+	int i;
+
+	for (i = 0; i < pctrl->ncommunities; i++) {
+		community = &pctrl->communities[i];
+		if (pin >= community->pin_base &&
+		    pin < community->pin_base + community->npins)
+			return community;
+	}
+
+	dev_warn(pctrl->dev, "failed to find community for pin %u\n", pin);
+	return NULL;
+}
+
+static const struct intel_padgroup *
+intel_community_get_padgroup(const struct intel_community *community,
+			     unsigned int pin)
+{
+	int i;
+
+	for (i = 0; i < community->ngpps; i++) {
+		const struct intel_padgroup *padgrp = &community->gpps[i];
+
+		if (pin >= padgrp->base && pin < padgrp->base + padgrp->size)
+			return padgrp;
+	}
+
+	return NULL;
+}
+
+static void __iomem *intel_get_padcfg(struct intel_pinctrl *pctrl,
+				      unsigned int pin, unsigned int reg)
+{
+	const struct intel_community *community;
+	unsigned int padno;
+	size_t nregs;
+
+	community = intel_get_community(pctrl, pin);
+	if (!community)
+		return NULL;
+
+	padno = pin_to_padno(community, pin);
+	nregs = (community->features & PINCTRL_FEATURE_DEBOUNCE) ? 4 : 2;
+
+	if (reg >= nregs * 4)
+		return NULL;
+
+	return community->pad_regs + reg + padno * nregs * 4;
+}
+
+static bool intel_pad_owned_by_host(struct intel_pinctrl *pctrl, unsigned int pin)
+{
+	const struct intel_community *community;
+	const struct intel_padgroup *padgrp;
+	unsigned int gpp, offset, gpp_offset;
+	void __iomem *padown;
+
+	community = intel_get_community(pctrl, pin);
+	if (!community)
+		return false;
+	if (!community->padown_offset)
+		return true;
+
+	padgrp = intel_community_get_padgroup(community, pin);
+	if (!padgrp)
+		return false;
+
+	gpp_offset = padgroup_offset(padgrp, pin);
+	gpp = PADOWN_GPP(gpp_offset);
+	offset = community->padown_offset + padgrp->padown_num * 4 + gpp * 4;
+	padown = community->regs + offset;
+
+	return !(readl(padown) & PADOWN_MASK(gpp_offset));
+}
+
+static bool intel_pad_set_acpi_mode(struct intel_pinctrl *pctrl,
+                unsigned pin, bool acpi_mode)
+{
+	const struct intel_community *community;
+	const struct intel_padgroup *padgrp;
+	unsigned int offset, gpp_offset;
+	void __iomem *hostown;
+	uint32_t value;
+
+	community = intel_get_community(pctrl, pin);
+	if (!community)
+		return true;
+	if (!community->hostown_offset)
+		return false;
+
+	padgrp = intel_community_get_padgroup(community, pin);
+	if (!padgrp)
+		return true;
+
+	gpp_offset = padgroup_offset(padgrp, pin);
+	offset = community->hostown_offset + padgrp->reg_num * 4;
+	hostown = community->regs + offset;
+
+	value = readl(hostown);
+	if (acpi_mode) {
+		/* ACPI mode */
+		value &= ~BIT(gpp_offset);
+	} else {
+		/* GPIO mode */
+		value |= BIT(gpp_offset);
+	}
+
+	writel(value, hostown);
+
+	return !(readl(hostown) & BIT(gpp_offset));
+}
+
+static bool intel_pad_acpi_mode(struct intel_pinctrl *pctrl, unsigned int pin)
+{
+	const struct intel_community *community;
+	const struct intel_padgroup *padgrp;
+	unsigned int offset, gpp_offset;
+	void __iomem *hostown;
+
+	community = intel_get_community(pctrl, pin);
+	if (!community)
+		return true;
+	if (!community->hostown_offset)
+		return false;
+
+	padgrp = intel_community_get_padgroup(community, pin);
+	if (!padgrp)
+		return true;
+
+	gpp_offset = padgroup_offset(padgrp, pin);
+	offset = community->hostown_offset + padgrp->reg_num * 4;
+	hostown = community->regs + offset;
+
+	return !(readl(hostown) & BIT(gpp_offset));
+}
+
+/**
+ * enum - Locking variants of the pad configuration
+ *
+ * @PAD_UNLOCKED:	pad is fully controlled by the configuration registers
+ * @PAD_LOCKED:		pad configuration registers, except TX state, are locked
+ * @PAD_LOCKED_TX:	pad configuration TX state is locked
+ * @PAD_LOCKED_FULL:	pad configuration registers are locked completely
+ *
+ * Locking is considered as read-only mode for corresponding registers and
+ * their respective fields. That said, TX state bit is locked separately from
+ * the main locking scheme.
+ */
+enum {
+	PAD_UNLOCKED	= 0,
+	PAD_LOCKED	= 1,
+	PAD_LOCKED_TX	= 2,
+	PAD_LOCKED_FULL	= PAD_LOCKED | PAD_LOCKED_TX,
+};
+
+static int intel_pad_locked(struct intel_pinctrl *pctrl, unsigned int pin)
+{
+	struct intel_community *community;
+	const struct intel_padgroup *padgrp;
+	unsigned int offset, gpp_offset;
+	u32 value;
+	int ret = PAD_UNLOCKED;
+
+	community = intel_get_community(pctrl, pin);
+	if (!community)
+		return PAD_LOCKED_FULL;
+	if (!community->padcfglock_offset)
+		return PAD_UNLOCKED;
+
+	padgrp = intel_community_get_padgroup(community, pin);
+	if (!padgrp)
+		return PAD_LOCKED_FULL;
+
+	gpp_offset = padgroup_offset(padgrp, pin);
+
+	/*
+	 * If PADCFGLOCK and PADCFGLOCKTX bits are both clear for this pad,
+	 * the pad is considered unlocked. Any other case means that it is
+	 * either fully or partially locked.
+	 */
+	offset = community->padcfglock_offset + 0 + padgrp->reg_num * 8;
+	value = readl(community->regs + offset);
+	if (value & BIT(gpp_offset))
+		ret |= PAD_LOCKED;
+
+	offset = community->padcfglock_offset + 4 + padgrp->reg_num * 8;
+	value = readl(community->regs + offset);
+	if (value & BIT(gpp_offset))
+		ret |= PAD_LOCKED_TX;
+
+	return ret;
+}
+
+static bool intel_pad_is_unlocked(struct intel_pinctrl *pctrl, unsigned int pin)
+{
+	return (intel_pad_locked(pctrl, pin) & PAD_LOCKED) == PAD_UNLOCKED;
+}
+
+static bool intel_pad_usable(struct intel_pinctrl *pctrl, unsigned int pin)
+{
+	return intel_pad_owned_by_host(pctrl, pin) && intel_pad_is_unlocked(pctrl, pin);
+}
+
+static int intel_get_groups_count(struct pinctrl_dev *pctldev)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+
+	return pctrl->soc->ngroups;
+}
+
+static const char *intel_get_group_name(struct pinctrl_dev *pctldev,
+				      unsigned int group)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+
+	return pctrl->soc->groups[group].name;
+}
+
+static int intel_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group,
+			      const unsigned int **pins, unsigned int *npins)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+
+	*pins = pctrl->soc->groups[group].pins;
+	*npins = pctrl->soc->groups[group].npins;
+	return 0;
+}
+
+static void intel_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
+			       unsigned int pin)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+	void __iomem *padcfg;
+	u32 cfg0, cfg1, mode;
+	int locked;
+	bool acpi;
+
+	if (!intel_pad_owned_by_host(pctrl, pin)) {
+		seq_puts(s, "not available");
+		return;
+	}
+
+	cfg0 = readl(intel_get_padcfg(pctrl, pin, PADCFG0));
+	cfg1 = readl(intel_get_padcfg(pctrl, pin, PADCFG1));
+
+	mode = (cfg0 & PADCFG0_PMODE_MASK) >> PADCFG0_PMODE_SHIFT;
+	if (mode == PADCFG0_PMODE_GPIO)
+		seq_puts(s, "GPIO ");
+	else
+		seq_printf(s, "mode %d ", mode);
+
+	seq_printf(s, "0x%08x 0x%08x", cfg0, cfg1);
+
+	/* Dump the additional PADCFG registers if available */
+	padcfg = intel_get_padcfg(pctrl, pin, PADCFG2);
+	if (padcfg)
+		seq_printf(s, " 0x%08x", readl(padcfg));
+
+	locked = intel_pad_locked(pctrl, pin);
+	acpi = intel_pad_acpi_mode(pctrl, pin);
+
+	if (locked || acpi) {
+		seq_puts(s, " [");
+		if (locked)
+			seq_puts(s, "LOCKED");
+		if ((locked & PAD_LOCKED_FULL) == PAD_LOCKED_TX)
+			seq_puts(s, " tx");
+		else if ((locked & PAD_LOCKED_FULL) == PAD_LOCKED_FULL)
+			seq_puts(s, " full");
+
+		if (locked && acpi)
+			seq_puts(s, ", ");
+
+		if (acpi)
+			seq_puts(s, "ACPI");
+		seq_puts(s, "]");
+	}
+}
+
+static const struct pinctrl_ops intel_pinctrl_ops = {
+	.get_groups_count = intel_get_groups_count,
+	.get_group_name = intel_get_group_name,
+	.get_group_pins = intel_get_group_pins,
+	.pin_dbg_show = intel_pin_dbg_show,
+};
+
+static int intel_get_functions_count(struct pinctrl_dev *pctldev)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+
+	return pctrl->soc->nfunctions;
+}
+
+static const char *intel_get_function_name(struct pinctrl_dev *pctldev,
+					   unsigned int function)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+
+	return pctrl->soc->functions[function].name;
+}
+
+static int intel_get_function_groups(struct pinctrl_dev *pctldev,
+				     unsigned int function,
+				     const char * const **groups,
+				     unsigned int * const ngroups)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+
+	*groups = pctrl->soc->functions[function].groups;
+	*ngroups = pctrl->soc->functions[function].ngroups;
+	return 0;
+}
+
+static int intel_pinmux_set_mux(struct pinctrl_dev *pctldev,
+				unsigned int function, unsigned int group)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+	const struct intel_pingroup *grp = &pctrl->soc->groups[group];
+	unsigned long flags;
+	int i;
+
+	raw_spin_lock_irqsave(&pctrl->lock, flags);
+
+	/*
+	 * All pins in the groups needs to be accessible and writable
+	 * before we can enable the mux for this group.
+	 */
+	for (i = 0; i < grp->npins; i++) {
+		if (!intel_pad_usable(pctrl, grp->pins[i])) {
+			raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+			return -EBUSY;
+		}
+	}
+
+	/* Now enable the mux setting for each pin in the group */
+	for (i = 0; i < grp->npins; i++) {
+		void __iomem *padcfg0;
+		u32 value;
+
+		padcfg0 = intel_get_padcfg(pctrl, grp->pins[i], PADCFG0);
+		value = readl(padcfg0);
+
+		value &= ~PADCFG0_PMODE_MASK;
+
+		if (grp->modes)
+			value |= grp->modes[i] << PADCFG0_PMODE_SHIFT;
+		else
+			value |= grp->mode << PADCFG0_PMODE_SHIFT;
+
+		writel(value, padcfg0);
+	}
+
+	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+	return 0;
+}
+
+static void __intel_gpio_set_direction(void __iomem *padcfg0, bool input)
+{
+	u32 value;
+
+	value = readl(padcfg0);
+	if (input) {
+		value &= ~PADCFG0_GPIORXDIS;
+		value |= PADCFG0_GPIOTXDIS;
+	} else {
+		value &= ~PADCFG0_GPIOTXDIS;
+		value |= PADCFG0_GPIORXDIS;
+	}
+	writel(value, padcfg0);
+}
+
+static int intel_gpio_get_gpio_mode(void __iomem *padcfg0)
+{
+	return (readl(padcfg0) & PADCFG0_PMODE_MASK) >> PADCFG0_PMODE_SHIFT;
+}
+
+static void intel_gpio_set_gpio_mode(void __iomem *padcfg0)
+{
+	u32 value;
+
+	value = readl(padcfg0);
+
+	/* Put the pad into GPIO mode */
+	value &= ~PADCFG0_PMODE_MASK;
+	value |= PADCFG0_PMODE_GPIO;
+
+	/* Disable input and output buffers */
+	value |= PADCFG0_GPIORXDIS;
+	value |= PADCFG0_GPIOTXDIS;
+
+	/* Disable SCI/SMI/NMI generation */
+	value &= ~(PADCFG0_GPIROUTIOXAPIC | PADCFG0_GPIROUTSCI);
+	value &= ~(PADCFG0_GPIROUTSMI | PADCFG0_GPIROUTNMI);
+
+	writel(value, padcfg0);
+}
+
+static int intel_gpio_request_enable(struct pinctrl_dev *pctldev,
+				     struct pinctrl_gpio_range *range,
+				     unsigned int pin)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+	void __iomem *padcfg0;
+	unsigned long flags;
+
+	padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0);
+
+	raw_spin_lock_irqsave(&pctrl->lock, flags);
+
+	if (!intel_pad_owned_by_host(pctrl, pin)) {
+		raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+		return -EBUSY;
+	}
+
+	if (!intel_pad_is_unlocked(pctrl, pin)) {
+		raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+		return 0;
+	}
+
+	/*
+	 * If pin is already configured in GPIO mode, we assume that
+	 * firmware provides correct settings. In such case we avoid
+	 * potential glitches on the pin. Otherwise, for the pin in
+	 * alternative mode, consumer has to supply respective flags.
+	 */
+	if (intel_gpio_get_gpio_mode(padcfg0) == PADCFG0_PMODE_GPIO) {
+		raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+		return 0;
+	}
+
+	intel_gpio_set_gpio_mode(padcfg0);
+
+	/* Disable TX buffer and enable RX (this will be input) */
+	__intel_gpio_set_direction(padcfg0, true);
+
+	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+	return 0;
+}
+
+static int intel_gpio_set_direction(struct pinctrl_dev *pctldev,
+				    struct pinctrl_gpio_range *range,
+				    unsigned int pin, bool input)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+	void __iomem *padcfg0;
+	unsigned long flags;
+
+	padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0);
+
+	raw_spin_lock_irqsave(&pctrl->lock, flags);
+	__intel_gpio_set_direction(padcfg0, input);
+	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+	return 0;
+}
+
+static const struct pinmux_ops intel_pinmux_ops = {
+	.get_functions_count = intel_get_functions_count,
+	.get_function_name = intel_get_function_name,
+	.get_function_groups = intel_get_function_groups,
+	.set_mux = intel_pinmux_set_mux,
+	.gpio_request_enable = intel_gpio_request_enable,
+	.gpio_set_direction = intel_gpio_set_direction,
+};
+
+static int intel_config_get_pull(struct intel_pinctrl *pctrl, unsigned int pin,
+				 enum pin_config_param param, u32 *arg)
+{
+	const struct intel_community *community;
+	void __iomem *padcfg1;
+	unsigned long flags;
+	u32 value, term;
+
+	community = intel_get_community(pctrl, pin);
+	padcfg1 = intel_get_padcfg(pctrl, pin, PADCFG1);
+
+	raw_spin_lock_irqsave(&pctrl->lock, flags);
+	value = readl(padcfg1);
+	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+	term = (value & PADCFG1_TERM_MASK) >> PADCFG1_TERM_SHIFT;
+
+	switch (param) {
+	case PIN_CONFIG_BIAS_DISABLE:
+		if (term)
+			return -EINVAL;
+		break;
+
+	case PIN_CONFIG_BIAS_PULL_UP:
+		if (!term || !(value & PADCFG1_TERM_UP))
+			return -EINVAL;
+
+		switch (term) {
+		case PADCFG1_TERM_833:
+			*arg = 833;
+			break;
+		case PADCFG1_TERM_1K:
+			*arg = 1000;
+			break;
+		case PADCFG1_TERM_5K:
+			*arg = 5000;
+			break;
+		case PADCFG1_TERM_20K:
+			*arg = 20000;
+			break;
+		}
+
+		break;
+
+	case PIN_CONFIG_BIAS_PULL_DOWN:
+		if (!term || value & PADCFG1_TERM_UP)
+			return -EINVAL;
+
+		switch (term) {
+		case PADCFG1_TERM_833:
+			if (!(community->features & PINCTRL_FEATURE_1K_PD))
+				return -EINVAL;
+			*arg = 833;
+			break;
+		case PADCFG1_TERM_1K:
+			if (!(community->features & PINCTRL_FEATURE_1K_PD))
+				return -EINVAL;
+			*arg = 1000;
+			break;
+		case PADCFG1_TERM_5K:
+			*arg = 5000;
+			break;
+		case PADCFG1_TERM_20K:
+			*arg = 20000;
+			break;
+		}
+
+		break;
+
+	default:
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int intel_config_get_debounce(struct intel_pinctrl *pctrl, unsigned int pin,
+				     enum pin_config_param param, u32 *arg)
+{
+	void __iomem *padcfg2;
+	unsigned long flags;
+	unsigned long v;
+	u32 value2;
+
+	padcfg2 = intel_get_padcfg(pctrl, pin, PADCFG2);
+	if (!padcfg2)
+		return -ENOTSUPP;
+
+	raw_spin_lock_irqsave(&pctrl->lock, flags);
+	value2 = readl(padcfg2);
+	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+	if (!(value2 & PADCFG2_DEBEN))
+		return -EINVAL;
+
+	v = (value2 & PADCFG2_DEBOUNCE_MASK) >> PADCFG2_DEBOUNCE_SHIFT;
+	*arg = BIT(v) * DEBOUNCE_PERIOD_NSEC / NSEC_PER_USEC;
+
+	return 0;
+}
+
+static int intel_config_get(struct pinctrl_dev *pctldev, unsigned int pin,
+			    unsigned long *config)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+	enum pin_config_param param = pinconf_to_config_param(*config);
+	u32 arg = 0;
+	int ret;
+
+	if (!intel_pad_owned_by_host(pctrl, pin))
+		return -ENOTSUPP;
+
+	switch (param) {
+	case PIN_CONFIG_BIAS_DISABLE:
+	case PIN_CONFIG_BIAS_PULL_UP:
+	case PIN_CONFIG_BIAS_PULL_DOWN:
+		ret = intel_config_get_pull(pctrl, pin, param, &arg);
+		if (ret)
+			return ret;
+		break;
+
+	case PIN_CONFIG_INPUT_DEBOUNCE:
+		ret = intel_config_get_debounce(pctrl, pin, param, &arg);
+		if (ret)
+			return ret;
+		break;
+
+	default:
+		return -ENOTSUPP;
+	}
+
+	*config = pinconf_to_config_packed(param, arg);
+	return 0;
+}
+
+static int intel_config_set_pull(struct intel_pinctrl *pctrl, unsigned int pin,
+				 unsigned long config)
+{
+	unsigned int param = pinconf_to_config_param(config);
+	unsigned int arg = pinconf_to_config_argument(config);
+	const struct intel_community *community;
+	void __iomem *padcfg1;
+	unsigned long flags;
+	int ret = 0;
+	u32 value;
+
+	community = intel_get_community(pctrl, pin);
+	padcfg1 = intel_get_padcfg(pctrl, pin, PADCFG1);
+
+	raw_spin_lock_irqsave(&pctrl->lock, flags);
+
+	value = readl(padcfg1);
+
+	switch (param) {
+	case PIN_CONFIG_BIAS_DISABLE:
+		value &= ~(PADCFG1_TERM_MASK | PADCFG1_TERM_UP);
+		break;
+
+	case PIN_CONFIG_BIAS_PULL_UP:
+		value &= ~PADCFG1_TERM_MASK;
+
+		value |= PADCFG1_TERM_UP;
+
+		/* Set default strength value in case none is given */
+		if (arg == 1)
+			arg = 5000;
+
+		switch (arg) {
+		case 20000:
+			value |= PADCFG1_TERM_20K << PADCFG1_TERM_SHIFT;
+			break;
+		case 5000:
+			value |= PADCFG1_TERM_5K << PADCFG1_TERM_SHIFT;
+			break;
+		case 1000:
+			value |= PADCFG1_TERM_1K << PADCFG1_TERM_SHIFT;
+			break;
+		case 833:
+			value |= PADCFG1_TERM_833 << PADCFG1_TERM_SHIFT;
+			break;
+		default:
+			ret = -EINVAL;
+		}
+
+		break;
+
+	case PIN_CONFIG_BIAS_PULL_DOWN:
+		value &= ~(PADCFG1_TERM_UP | PADCFG1_TERM_MASK);
+
+		/* Set default strength value in case none is given */
+		if (arg == 1)
+			arg = 5000;
+
+		switch (arg) {
+		case 20000:
+			value |= PADCFG1_TERM_20K << PADCFG1_TERM_SHIFT;
+			break;
+		case 5000:
+			value |= PADCFG1_TERM_5K << PADCFG1_TERM_SHIFT;
+			break;
+		case 1000:
+			if (!(community->features & PINCTRL_FEATURE_1K_PD)) {
+				ret = -EINVAL;
+				break;
+			}
+			value |= PADCFG1_TERM_1K << PADCFG1_TERM_SHIFT;
+			break;
+		case 833:
+			if (!(community->features & PINCTRL_FEATURE_1K_PD)) {
+				ret = -EINVAL;
+				break;
+			}
+			value |= PADCFG1_TERM_833 << PADCFG1_TERM_SHIFT;
+			break;
+		default:
+			ret = -EINVAL;
+		}
+
+		break;
+	}
+
+	if (!ret)
+		writel(value, padcfg1);
+
+	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+	return ret;
+}
+
+static int intel_config_set_debounce(struct intel_pinctrl *pctrl,
+				     unsigned int pin, unsigned int debounce)
+{
+	void __iomem *padcfg0, *padcfg2;
+	unsigned long flags;
+	u32 value0, value2;
+
+	padcfg2 = intel_get_padcfg(pctrl, pin, PADCFG2);
+	if (!padcfg2)
+		return -ENOTSUPP;
+
+	padcfg0 = intel_get_padcfg(pctrl, pin, PADCFG0);
+
+	raw_spin_lock_irqsave(&pctrl->lock, flags);
+
+	value0 = readl(padcfg0);
+	value2 = readl(padcfg2);
+
+	/* Disable glitch filter and debouncer */
+	value0 &= ~PADCFG0_PREGFRXSEL;
+	value2 &= ~(PADCFG2_DEBEN | PADCFG2_DEBOUNCE_MASK);
+
+	if (debounce) {
+		unsigned long v;
+
+		v = order_base_2(debounce * NSEC_PER_USEC / DEBOUNCE_PERIOD_NSEC);
+		if (v < 3 || v > 15) {
+			raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+			return -EINVAL;
+		}
+
+		/* Enable glitch filter and debouncer */
+		value0 |= PADCFG0_PREGFRXSEL;
+		value2 |= v << PADCFG2_DEBOUNCE_SHIFT;
+		value2 |= PADCFG2_DEBEN;
+	}
+
+	writel(value0, padcfg0);
+	writel(value2, padcfg2);
+
+	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+	return 0;
+}
+
+static int intel_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
+			  unsigned long *configs, unsigned int nconfigs)
+{
+	struct intel_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
+	int i, ret;
+
+	if (!intel_pad_usable(pctrl, pin))
+		return -ENOTSUPP;
+
+	for (i = 0; i < nconfigs; i++) {
+		switch (pinconf_to_config_param(configs[i])) {
+		case PIN_CONFIG_BIAS_DISABLE:
+		case PIN_CONFIG_BIAS_PULL_UP:
+		case PIN_CONFIG_BIAS_PULL_DOWN:
+			ret = intel_config_set_pull(pctrl, pin, configs[i]);
+			if (ret)
+				return ret;
+			break;
+
+		case PIN_CONFIG_INPUT_DEBOUNCE:
+			ret = intel_config_set_debounce(pctrl, pin,
+				pinconf_to_config_argument(configs[i]));
+			if (ret)
+				return ret;
+			break;
+
+		default:
+			return -ENOTSUPP;
+		}
+	}
+
+	return 0;
+}
+
+static const struct pinconf_ops intel_pinconf_ops = {
+	.is_generic = true,
+	.pin_config_get = intel_config_get,
+	.pin_config_set = intel_config_set,
+};
+
+static const struct pinctrl_desc intel_pinctrl_desc = {
+	.pctlops = &intel_pinctrl_ops,
+	.pmxops = &intel_pinmux_ops,
+	.confops = &intel_pinconf_ops,
+	.owner = THIS_MODULE,
+};
+
+/**
+ * intel_gpio_to_pin() - Translate from GPIO offset to pin number
+ * @pctrl: Pinctrl structure
+ * @offset: GPIO offset from gpiolib
+ * @community: Community is filled here if not %NULL
+ * @padgrp: Pad group is filled here if not %NULL
+ *
+ * When coming through gpiolib irqchip, the GPIO offset is not
+ * automatically translated to pinctrl pin number. This function can be
+ * used to find out the corresponding pinctrl pin.
+ */
+static int intel_gpio_to_pin(struct intel_pinctrl *pctrl, unsigned int offset,
+			     const struct intel_community **community,
+			     const struct intel_padgroup **padgrp)
+{
+	int i;
+
+	for (i = 0; i < pctrl->ncommunities; i++) {
+		const struct intel_community *comm = &pctrl->communities[i];
+		int j;
+
+		for (j = 0; j < comm->ngpps; j++) {
+			const struct intel_padgroup *pgrp = &comm->gpps[j];
+
+			if (pgrp->gpio_base == INTEL_GPIO_BASE_NOMAP)
+				continue;
+
+			if (offset >= pgrp->gpio_base &&
+			    offset < pgrp->gpio_base + pgrp->size) {
+				int pin;
+
+				pin = pgrp->base + offset - pgrp->gpio_base;
+				if (community)
+					*community = comm;
+				if (padgrp)
+					*padgrp = pgrp;
+
+				return pin;
+			}
+		}
+	}
+
+	return -EINVAL;
+}
+
+/**
+ * intel_pin_to_gpio() - Translate from pin number to GPIO offset
+ * @pctrl: Pinctrl structure
+ * @pin: pin number
+ *
+ * Translate the pin number of pinctrl to GPIO offset
+ */
+static __maybe_unused int intel_pin_to_gpio(struct intel_pinctrl *pctrl, int pin)
+{
+	const struct intel_community *community;
+	const struct intel_padgroup *padgrp;
+
+	community = intel_get_community(pctrl, pin);
+	if (!community)
+		return -EINVAL;
+
+	padgrp = intel_community_get_padgroup(community, pin);
+	if (!padgrp)
+		return -EINVAL;
+
+	return pin - padgrp->base + padgrp->gpio_base;
+}
+
+static int intel_gpio_get(struct gpio_chip *chip, unsigned int offset)
+{
+	struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
+	void __iomem *reg;
+	u32 padcfg0;
+	int pin;
+
+	pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL);
+	if (pin < 0)
+		return -EINVAL;
+
+	reg = intel_get_padcfg(pctrl, pin, PADCFG0);
+	if (!reg)
+		return -EINVAL;
+
+	padcfg0 = readl(reg);
+	if (!(padcfg0 & PADCFG0_GPIOTXDIS))
+		return !!(padcfg0 & PADCFG0_GPIOTXSTATE);
+
+	return !!(padcfg0 & PADCFG0_GPIORXSTATE);
+}
+
+static void intel_gpio_set(struct gpio_chip *chip, unsigned int offset,
+			   int value)
+{
+	struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
+	unsigned long flags;
+	void __iomem *reg;
+	u32 padcfg0;
+	int pin;
+
+	pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL);
+	if (pin < 0)
+		return;
+
+	reg = intel_get_padcfg(pctrl, pin, PADCFG0);
+	if (!reg)
+		return;
+
+	raw_spin_lock_irqsave(&pctrl->lock, flags);
+	padcfg0 = readl(reg);
+	if (value)
+		padcfg0 |= PADCFG0_GPIOTXSTATE;
+	else
+		padcfg0 &= ~PADCFG0_GPIOTXSTATE;
+	writel(padcfg0, reg);
+	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+}
+
+static int intel_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
+{
+	struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
+	unsigned long flags;
+	void __iomem *reg;
+	u32 padcfg0;
+	int pin;
+
+	pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL);
+	if (pin < 0)
+		return -EINVAL;
+
+	reg = intel_get_padcfg(pctrl, pin, PADCFG0);
+	if (!reg)
+		return -EINVAL;
+
+	raw_spin_lock_irqsave(&pctrl->lock, flags);
+	padcfg0 = readl(reg);
+	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+	if (padcfg0 & PADCFG0_PMODE_MASK)
+		return -EINVAL;
+
+	if (padcfg0 & PADCFG0_GPIOTXDIS)
+		return GPIO_LINE_DIRECTION_IN;
+
+	return GPIO_LINE_DIRECTION_OUT;
+}
+
+static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)
+{
+	return pinctrl_gpio_direction_input(chip->base + offset);
+}
+
+static int intel_gpio_direction_output(struct gpio_chip *chip, unsigned int offset,
+				       int value)
+{
+	intel_gpio_set(chip, offset, value);
+	return pinctrl_gpio_direction_output(chip->base + offset);
+}
+
+static const struct gpio_chip intel_gpio_chip = {
+	.owner = THIS_MODULE,
+	.request = gpiochip_generic_request,
+	.free = gpiochip_generic_free,
+	.get_direction = intel_gpio_get_direction,
+	.direction_input = intel_gpio_direction_input,
+	.direction_output = intel_gpio_direction_output,
+	.get = intel_gpio_get,
+	.set = intel_gpio_set,
+	.set_config = gpiochip_generic_config,
+};
+
+static void intel_gpio_irq_ack(struct irq_data *d)
+{
+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+	struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
+	const struct intel_community *community;
+	const struct intel_padgroup *padgrp;
+	int pin;
+
+	pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), &community, &padgrp);
+	if (pin >= 0) {
+		unsigned int gpp, gpp_offset, is_offset;
+
+		gpp = padgrp->reg_num;
+		gpp_offset = padgroup_offset(padgrp, pin);
+		is_offset = community->is_offset + gpp * 4;
+
+		raw_spin_lock(&pctrl->lock);
+		writel(BIT(gpp_offset), community->regs + is_offset);
+		raw_spin_unlock(&pctrl->lock);
+	}
+}
+
+static void intel_gpio_irq_mask_unmask(struct irq_data *d, bool mask)
+{
+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+	struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
+	const struct intel_community *community;
+	const struct intel_padgroup *padgrp;
+	int pin;
+
+	pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), &community, &padgrp);
+	if (pin >= 0) {
+		unsigned int gpp, gpp_offset;
+		unsigned long flags;
+		void __iomem *reg, *is;
+		u32 value;
+
+		gpp = padgrp->reg_num;
+		gpp_offset = padgroup_offset(padgrp, pin);
+
+		reg = community->regs + community->ie_offset + gpp * 4;
+		is = community->regs + community->is_offset + gpp * 4;
+
+		raw_spin_lock_irqsave(&pctrl->lock, flags);
+
+		/* Clear interrupt status first to avoid unexpected interrupt */
+		writel(BIT(gpp_offset), is);
+
+		value = readl(reg);
+		if (mask)
+			value &= ~BIT(gpp_offset);
+		else
+			value |= BIT(gpp_offset);
+		writel(value, reg);
+		raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+	}
+}
+
+static void intel_gpio_irq_mask(struct irq_data *d)
+{
+	intel_gpio_irq_mask_unmask(d, true);
+}
+
+static void intel_gpio_irq_unmask(struct irq_data *d)
+{
+	intel_gpio_irq_mask_unmask(d, false);
+}
+
+static int intel_gpio_irq_type(struct irq_data *d, unsigned int type)
+{
+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+	struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
+	unsigned int pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), NULL, NULL);
+	unsigned long flags;
+	void __iomem *reg;
+	u32 value;
+
+	reg = intel_get_padcfg(pctrl, pin, PADCFG0);
+	if (!reg)
+		return -EINVAL;
+
+	/* set not ACPI mode */
+	intel_pad_set_acpi_mode(pctrl, pin, false);
+
+	/*
+	 * If the pin is in ACPI mode it is still usable as a GPIO but it
+	 * cannot be used as IRQ because GPI_IS status bit will not be
+	 * updated by the host controller hardware.
+	 */
+	if (intel_pad_acpi_mode(pctrl, pin)) {
+		dev_warn(pctrl->dev, "pin %u cannot be used as IRQ\n", pin);
+		return -EPERM;
+	}
+
+	raw_spin_lock_irqsave(&pctrl->lock, flags);
+
+	intel_gpio_set_gpio_mode(reg);
+
+	/* Disable TX buffer and enable RX (this will be input) */
+	__intel_gpio_set_direction(reg, true);
+
+	value = readl(reg);
+
+	value &= ~(PADCFG0_RXEVCFG_MASK | PADCFG0_RXINV);
+
+	if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
+		value |= PADCFG0_RXEVCFG_EDGE_BOTH << PADCFG0_RXEVCFG_SHIFT;
+	} else if (type & IRQ_TYPE_EDGE_FALLING) {
+		value |= PADCFG0_RXEVCFG_EDGE << PADCFG0_RXEVCFG_SHIFT;
+		value |= PADCFG0_RXINV;
+	} else if (type & IRQ_TYPE_EDGE_RISING) {
+		value |= PADCFG0_RXEVCFG_EDGE << PADCFG0_RXEVCFG_SHIFT;
+	} else if (type & IRQ_TYPE_LEVEL_MASK) {
+		if (type & IRQ_TYPE_LEVEL_LOW)
+			value |= PADCFG0_RXINV;
+	} else {
+		value |= PADCFG0_RXEVCFG_DISABLED << PADCFG0_RXEVCFG_SHIFT;
+	}
+
+	writel(value, reg);
+
+	if (type & IRQ_TYPE_EDGE_BOTH)
+		irq_set_handler_locked(d, handle_edge_irq);
+	else if (type & IRQ_TYPE_LEVEL_MASK)
+		irq_set_handler_locked(d, handle_level_irq);
+
+	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+	return 0;
+}
+
+static int intel_gpio_irq_wake(struct irq_data *d, unsigned int on)
+{
+	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
+	struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
+	unsigned int pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), NULL, NULL);
+
+	if (on)
+		enable_irq_wake(pctrl->irq);
+	else
+		disable_irq_wake(pctrl->irq);
+
+	dev_dbg(pctrl->dev, "%sable wake for pin %u\n", on ? "en" : "dis", pin);
+	return 0;
+}
+
+static int intel_gpio_community_irq_handler(struct intel_pinctrl *pctrl,
+					    const struct intel_community *community)
+{
+	struct gpio_chip *gc = &pctrl->chip;
+	unsigned int gpp;
+	int ret = 0;
+
+	for (gpp = 0; gpp < community->ngpps; gpp++) {
+		const struct intel_padgroup *padgrp = &community->gpps[gpp];
+		unsigned long pending, enabled, gpp_offset;
+		unsigned long flags;
+
+		raw_spin_lock_irqsave(&pctrl->lock, flags);
+
+		pending = readl(community->regs + community->is_offset +
+				padgrp->reg_num * 4);
+		enabled = readl(community->regs + community->ie_offset +
+				padgrp->reg_num * 4);
+
+		raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+		/* Only interrupts that are enabled */
+		pending &= enabled;
+
+		for_each_set_bit(gpp_offset, &pending, padgrp->size) {
+			unsigned int irq;
+
+			irq = irq_find_mapping(gc->irq.domain,
+					       padgrp->gpio_base + gpp_offset);
+			generic_handle_irq(irq);
+		}
+
+		ret += pending ? 1 : 0;
+	}
+
+	return ret;
+}
+
+static irqreturn_t intel_gpio_irq(int irq, void *data)
+{
+	const struct intel_community *community;
+	struct intel_pinctrl *pctrl = data;
+	unsigned int i;
+	int ret = 0;
+
+	/* Need to check all communities for pending interrupts */
+	for (i = 0; i < pctrl->ncommunities; i++) {
+		community = &pctrl->communities[i];
+		ret += intel_gpio_community_irq_handler(pctrl, community);
+	}
+
+	return IRQ_RETVAL(ret);
+}
+
+static int intel_gpio_add_community_ranges(struct intel_pinctrl *pctrl,
+				const struct intel_community *community)
+{
+	int ret = 0, i;
+
+	for (i = 0; i < community->ngpps; i++) {
+		const struct intel_padgroup *gpp = &community->gpps[i];
+
+		if (gpp->gpio_base == INTEL_GPIO_BASE_NOMAP)
+			continue;
+
+		ret = gpiochip_add_pin_range(&pctrl->chip, dev_name(pctrl->dev),
+					     gpp->gpio_base, gpp->base,
+					     gpp->size);
+		if (ret)
+			return ret;
+	}
+
+	return ret;
+}
+
+static int intel_gpio_add_pin_ranges(struct gpio_chip *gc)
+{
+	struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
+	int ret, i;
+
+	for (i = 0; i < pctrl->ncommunities; i++) {
+		struct intel_community *community = &pctrl->communities[i];
+
+		ret = intel_gpio_add_community_ranges(pctrl, community);
+		if (ret) {
+			dev_err(pctrl->dev, "failed to add GPIO pin range\n");
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static unsigned int intel_gpio_ngpio(const struct intel_pinctrl *pctrl)
+{
+	const struct intel_community *community;
+	unsigned int ngpio = 0;
+	int i, j;
+
+	for (i = 0; i < pctrl->ncommunities; i++) {
+		community = &pctrl->communities[i];
+		for (j = 0; j < community->ngpps; j++) {
+			const struct intel_padgroup *gpp = &community->gpps[j];
+
+			if (gpp->gpio_base == INTEL_GPIO_BASE_NOMAP)
+				continue;
+
+			if (gpp->gpio_base + gpp->size > ngpio)
+				ngpio = gpp->gpio_base + gpp->size;
+		}
+	}
+
+	return ngpio;
+}
+
+static int intel_gpio_probe(struct intel_pinctrl *pctrl, int irq)
+{
+	int ret;
+	struct gpio_irq_chip *girq;
+
+	pctrl->chip = intel_gpio_chip;
+
+	/* Setup GPIO chip */
+	pctrl->chip.ngpio = intel_gpio_ngpio(pctrl);
+	pctrl->chip.label = dev_name(pctrl->dev);
+	pctrl->chip.parent = pctrl->dev;
+	pctrl->chip.base = 0;
+	pctrl->chip.add_pin_ranges = intel_gpio_add_pin_ranges;
+	pctrl->irq = irq;
+
+	/* Setup IRQ chip */
+	pctrl->irqchip.name = dev_name(pctrl->dev);
+	pctrl->irqchip.irq_ack = intel_gpio_irq_ack;
+	pctrl->irqchip.irq_mask = intel_gpio_irq_mask;
+	pctrl->irqchip.irq_unmask = intel_gpio_irq_unmask;
+	pctrl->irqchip.irq_set_type = intel_gpio_irq_type;
+	pctrl->irqchip.irq_set_wake = intel_gpio_irq_wake;
+	pctrl->irqchip.flags = IRQCHIP_MASK_ON_SUSPEND;
+
+	/*
+	 * On some platforms several GPIO controllers share the same interrupt
+	 * line.
+	 */
+	ret = devm_request_irq(pctrl->dev, irq, intel_gpio_irq,
+			       IRQF_SHARED | IRQF_NO_THREAD,
+			       dev_name(pctrl->dev), pctrl);
+	if (ret) {
+		dev_err(pctrl->dev, "failed to request interrupt\n");
+		return ret;
+	}
+
+	girq = &pctrl->chip.irq;
+	girq->chip = &pctrl->irqchip;
+	/* This will let us handle the IRQ in the driver */
+	girq->parent_handler = NULL;
+	girq->num_parents = 0;
+	girq->default_type = IRQ_TYPE_NONE;
+	girq->handler = handle_bad_irq;
+
+	ret = devm_gpiochip_add_data(pctrl->dev, &pctrl->chip, pctrl);
+	if (ret) {
+		dev_err(pctrl->dev, "failed to register gpiochip\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int intel_pinctrl_add_padgroups(struct intel_pinctrl *pctrl,
+				       struct intel_community *community)
+{
+	struct intel_padgroup *gpps;
+	unsigned int npins = community->npins;
+	unsigned int padown_num = 0;
+	size_t ngpps, i;
+
+	if (community->gpps)
+		ngpps = community->ngpps;
+	else
+		ngpps = DIV_ROUND_UP(community->npins, community->gpp_size);
+
+	gpps = devm_kcalloc(pctrl->dev, ngpps, sizeof(*gpps), GFP_KERNEL);
+	if (!gpps)
+		return -ENOMEM;
+
+	for (i = 0; i < ngpps; i++) {
+		if (community->gpps) {
+			gpps[i] = community->gpps[i];
+		} else {
+			unsigned int gpp_size = community->gpp_size;
+
+			gpps[i].reg_num = i;
+			gpps[i].base = community->pin_base + i * gpp_size;
+			gpps[i].size = min(gpp_size, npins);
+			npins -= gpps[i].size;
+		}
+
+		if (gpps[i].size > 32)
+			return -EINVAL;
+
+		/* Special treatment for GPIO base */
+		switch (gpps[i].gpio_base) {
+			case INTEL_GPIO_BASE_MATCH:
+				gpps[i].gpio_base = gpps[i].base;
+				break;
+			case INTEL_GPIO_BASE_ZERO:
+				gpps[i].gpio_base = 0;
+				break;
+			case INTEL_GPIO_BASE_NOMAP:
+			default:
+				break;
+		}
+
+		gpps[i].padown_num = padown_num;
+
+		/*
+		 * In older hardware the number of padown registers per
+		 * group is fixed regardless of the group size.
+		 */
+		if (community->gpp_num_padown_regs)
+			padown_num += community->gpp_num_padown_regs;
+		else
+			padown_num += DIV_ROUND_UP(gpps[i].size * 4, 32);
+	}
+
+	community->ngpps = ngpps;
+	community->gpps = gpps;
+
+	return 0;
+}
+
+static int intel_pinctrl_pm_init(struct intel_pinctrl *pctrl)
+{
+#ifdef CONFIG_PM_SLEEP
+	const struct intel_pinctrl_soc_data *soc = pctrl->soc;
+	struct intel_community_context *communities;
+	struct intel_pad_context *pads;
+	int i;
+
+	pads = devm_kcalloc(pctrl->dev, soc->npins, sizeof(*pads), GFP_KERNEL);
+	if (!pads)
+		return -ENOMEM;
+
+	communities = devm_kcalloc(pctrl->dev, pctrl->ncommunities,
+				   sizeof(*communities), GFP_KERNEL);
+	if (!communities)
+		return -ENOMEM;
+
+	for (i = 0; i < pctrl->ncommunities; i++) {
+		struct intel_community *community = &pctrl->communities[i];
+		u32 *intmask, *hostown;
+
+		intmask = devm_kcalloc(pctrl->dev, community->ngpps,
+				       sizeof(*intmask), GFP_KERNEL);
+		if (!intmask)
+			return -ENOMEM;
+
+		communities[i].intmask = intmask;
+
+		hostown = devm_kcalloc(pctrl->dev, community->ngpps,
+				       sizeof(*hostown), GFP_KERNEL);
+		if (!hostown)
+			return -ENOMEM;
+
+		communities[i].hostown = hostown;
+	}
+
+	pctrl->context.pads = pads;
+	pctrl->context.communities = communities;
+#endif
+
+	return 0;
+}
+
+int wb_pinctrl_probe(struct platform_device *pdev,
+			       const struct intel_pinctrl_soc_data *soc_data)
+{
+	struct intel_pinctrl *pctrl;
+	struct intel_community *community;
+    wb_gpio_data_t *wb_gpio_data;
+	void __iomem *regs;
+	int i, ret;
+	u32 padbar, rev;
+
+	if (!soc_data) {
+		dev_err(&pdev->dev, "soc_data is null\n");
+		return -EINVAL;
+	}
+
+    wb_gpio_data = platform_get_drvdata(pdev);
+	pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
+	if (!pctrl) {
+        dev_err(&pdev->dev, "pctrl kzalloc failed\n");
+        return -ENOMEM;
+    }
+
+	/* check resource */
+	if (soc_data->ncommunities > GPIO_RES_MAX) {
+		dev_err(&pdev->dev, "GPIO ncommunities %lu is more than GPIO resource number: %d\n",
+            soc_data->ncommunities, GPIO_RES_MAX);
+		return -EINVAL;
+	}
+
+	pctrl->dev = &pdev->dev;
+	pctrl->soc = soc_data;
+	pctrl->irq = wb_gpio_data->irq;
+	raw_spin_lock_init(&pctrl->lock);
+
+	/*
+	 * Make a copy of the communities which we can use to hold pointers
+	 * to the registers.
+	 */
+	pctrl->ncommunities = pctrl->soc->ncommunities;
+	pctrl->communities = devm_kcalloc(&pdev->dev, pctrl->ncommunities,
+				  sizeof(*pctrl->communities), GFP_KERNEL);
+	if (!pctrl->communities) {
+        dev_err(&pdev->dev, "devm_kcalloc communities failed. ret:%d\n", ret);
+        return -ENOMEM;
+    }
+
+	for (i = 0; i < pctrl->ncommunities; i++) {
+		community = &pctrl->communities[i];
+		*community = pctrl->soc->communities[i];
+
+		regs = wb_gpio_data->res[i];
+
+		/*
+		 * Determine community features based on the revision if
+		 * not specified already.
+		 */
+		if (!community->features) {
+			rev = (readl(regs + REVID) & REVID_MASK) >> REVID_SHIFT;
+			if (rev >= 0x94) {
+				community->features |= PINCTRL_FEATURE_DEBOUNCE;
+				community->features |= PINCTRL_FEATURE_1K_PD;
+			}
+		}
+
+		/* Read offset of the pad configuration registers */
+		padbar = readl(regs + PADBAR);
+
+		community->regs = regs;
+		community->pad_regs = regs + padbar;
+
+		ret = intel_pinctrl_add_padgroups(pctrl, community);
+		if (ret) {
+ 			dev_err(&pdev->dev, "intel_pinctrl_add_padgroups failed. ret:%d\n", ret);
+			return ret;
+        }
+	}
+
+	ret = intel_pinctrl_pm_init(pctrl);
+	if (ret) {
+        dev_err(&pdev->dev, "intel_pinctrl_pm_init failed. ret:%d\n", ret);
+        return ret;
+    }
+
+	pctrl->pctldesc = intel_pinctrl_desc;
+	pctrl->pctldesc.name = dev_name(&pdev->dev);
+	pctrl->pctldesc.pins = pctrl->soc->pins;
+	pctrl->pctldesc.npins = pctrl->soc->npins;
+
+	pctrl->pctldev = devm_pinctrl_register(&pdev->dev, &pctrl->pctldesc,
+					       pctrl);
+	if (IS_ERR(pctrl->pctldev)) {
+		dev_err(&pdev->dev, "failed to register pinctrl driver\n");
+		return PTR_ERR(pctrl->pctldev);
+	}
+
+    ret = intel_gpio_probe(pctrl, pctrl->irq);
+    if (ret) {
+        dev_err(&pdev->dev, "intel_gpio_probe failed. ret:%d\n", ret);
+        return ret;
+    }
+    return 0;
+}
+EXPORT_SYMBOL_GPL(wb_pinctrl_probe);
+
+#if 0
+int intel_pinctrl_probe_by_hid(struct platform_device *pdev)
+{
+	const struct intel_pinctrl_soc_data *data;
+
+	data = device_get_match_data(&pdev->dev);
+	if (!data)
+		return -ENODATA;
+
+	return intel_pinctrl_probe(pdev, data);
+}
+EXPORT_SYMBOL_GPL(intel_pinctrl_probe_by_hid);
+
+int intel_pinctrl_probe_by_uid(struct platform_device *pdev)
+{
+	const struct intel_pinctrl_soc_data *data;
+
+	data = intel_pinctrl_get_soc_data(pdev);
+	if (IS_ERR(data))
+		return PTR_ERR(data);
+
+	return intel_pinctrl_probe(pdev, data);
+}
+EXPORT_SYMBOL_GPL(intel_pinctrl_probe_by_uid);
+
+const struct intel_pinctrl_soc_data *intel_pinctrl_get_soc_data(struct platform_device *pdev)
+{
+	const struct intel_pinctrl_soc_data *data = NULL;
+	const struct intel_pinctrl_soc_data **table;
+	struct acpi_device *adev;
+	unsigned int i;
+
+	adev = ACPI_COMPANION(&pdev->dev);
+	if (adev) {
+		const void *match = device_get_match_data(&pdev->dev);
+
+		table = (const struct intel_pinctrl_soc_data **)match;
+		for (i = 0; table[i]; i++) {
+			if (!strcmp(adev->pnp.unique_id, table[i]->uid)) {
+				data = table[i];
+				break;
+			}
+		}
+	} else {
+		const struct platform_device_id *id;
+
+		id = platform_get_device_id(pdev);
+		if (!id)
+			return ERR_PTR(-ENODEV);
+
+		table = (const struct intel_pinctrl_soc_data **)id->driver_data;
+		data = table[pdev->id];
+	}
+
+	return data ?: ERR_PTR(-ENODATA);
+}
+EXPORT_SYMBOL_GPL(intel_pinctrl_get_soc_data);
+#endif
+
+#ifdef CONFIG_PM_SLEEP
+static bool intel_pinctrl_should_save(struct intel_pinctrl *pctrl, unsigned int pin)
+{
+	const struct pin_desc *pd = pin_desc_get(pctrl->pctldev, pin);
+
+	if (!pd || !intel_pad_usable(pctrl, pin))
+		return false;
+
+	/*
+	 * Only restore the pin if it is actually in use by the kernel (or
+	 * by userspace). It is possible that some pins are used by the
+	 * BIOS during resume and those are not always locked down so leave
+	 * them alone.
+	 */
+	if (pd->mux_owner || pd->gpio_owner ||
+	    gpiochip_line_is_irq(&pctrl->chip, intel_pin_to_gpio(pctrl, pin)))
+		return true;
+
+	return false;
+}
+
+int wb_intel_pinctrl_suspend_noirq(struct device *dev)
+{
+	struct intel_pinctrl *pctrl = dev_get_drvdata(dev);
+	struct intel_community_context *communities;
+	struct intel_pad_context *pads;
+	int i;
+
+	pads = pctrl->context.pads;
+	for (i = 0; i < pctrl->soc->npins; i++) {
+		const struct pinctrl_pin_desc *desc = &pctrl->soc->pins[i];
+		void __iomem *padcfg;
+		u32 val;
+
+		if (!intel_pinctrl_should_save(pctrl, desc->number))
+			continue;
+
+		val = readl(intel_get_padcfg(pctrl, desc->number, PADCFG0));
+		pads[i].padcfg0 = val & ~PADCFG0_GPIORXSTATE;
+		val = readl(intel_get_padcfg(pctrl, desc->number, PADCFG1));
+		pads[i].padcfg1 = val;
+
+		padcfg = intel_get_padcfg(pctrl, desc->number, PADCFG2);
+		if (padcfg)
+			pads[i].padcfg2 = readl(padcfg);
+	}
+
+	communities = pctrl->context.communities;
+	for (i = 0; i < pctrl->ncommunities; i++) {
+		struct intel_community *community = &pctrl->communities[i];
+		void __iomem *base;
+		unsigned int gpp;
+
+		base = community->regs + community->ie_offset;
+		for (gpp = 0; gpp < community->ngpps; gpp++)
+			communities[i].intmask[gpp] = readl(base + gpp * 4);
+
+		base = community->regs + community->hostown_offset;
+		for (gpp = 0; gpp < community->ngpps; gpp++)
+			communities[i].hostown[gpp] = readl(base + gpp * 4);
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(wb_intel_pinctrl_suspend_noirq);
+
+static void intel_gpio_irq_init(struct intel_pinctrl *pctrl)
+{
+	size_t i;
+
+	for (i = 0; i < pctrl->ncommunities; i++) {
+		const struct intel_community *community;
+		void __iomem *base;
+		unsigned int gpp;
+
+		community = &pctrl->communities[i];
+		base = community->regs;
+
+		for (gpp = 0; gpp < community->ngpps; gpp++) {
+			/* Mask and clear all interrupts */
+			writel(0, base + community->ie_offset + gpp * 4);
+			writel(0xffff, base + community->is_offset + gpp * 4);
+		}
+	}
+}
+
+static bool intel_gpio_update_reg(void __iomem *reg, u32 mask, u32 value)
+{
+	u32 curr, updated;
+
+	curr = readl(reg);
+
+	updated = (curr & ~mask) | (value & mask);
+	if (curr == updated)
+		return false;
+
+	writel(updated, reg);
+	return true;
+}
+
+static void intel_restore_hostown(struct intel_pinctrl *pctrl, unsigned int c,
+				  void __iomem *base, unsigned int gpp, u32 saved)
+{
+	const struct intel_community *community = &pctrl->communities[c];
+	const struct intel_padgroup *padgrp = &community->gpps[gpp];
+	struct device *dev = pctrl->dev;
+	const char *dummy;
+	u32 requested = 0;
+	unsigned int i;
+
+	if (padgrp->gpio_base == INTEL_GPIO_BASE_NOMAP)
+		return;
+
+	for_each_requested_gpio_in_range(&pctrl->chip, i, padgrp->gpio_base, padgrp->size, dummy)
+		requested |= BIT(i);
+
+	if (!intel_gpio_update_reg(base + gpp * 4, requested, saved))
+		return;
+
+	dev_dbg(dev, "restored hostown %u/%u %#08x\n", c, gpp, readl(base + gpp * 4));
+}
+
+static void intel_restore_intmask(struct intel_pinctrl *pctrl, unsigned int c,
+				  void __iomem *base, unsigned int gpp, u32 saved)
+{
+	struct device *dev = pctrl->dev;
+
+	if (!intel_gpio_update_reg(base + gpp * 4, ~0U, saved))
+		return;
+
+	dev_dbg(dev, "restored mask %u/%u %#08x\n", c, gpp, readl(base + gpp * 4));
+}
+
+static void intel_restore_padcfg(struct intel_pinctrl *pctrl, unsigned int pin,
+				 unsigned int reg, u32 saved)
+{
+	u32 mask = (reg == PADCFG0) ? PADCFG0_GPIORXSTATE : 0;
+	unsigned int n = reg / sizeof(u32);
+	struct device *dev = pctrl->dev;
+	void __iomem *padcfg;
+
+	padcfg = intel_get_padcfg(pctrl, pin, reg);
+	if (!padcfg)
+		return;
+
+	if (!intel_gpio_update_reg(padcfg, ~mask, saved))
+		return;
+
+	dev_dbg(dev, "restored pin %u padcfg%u %#08x\n", pin, n, readl(padcfg));
+}
+
+int wb_intel_pinctrl_resume_noirq(struct device *dev)
+{
+	struct intel_pinctrl *pctrl = dev_get_drvdata(dev);
+	const struct intel_community_context *communities;
+	const struct intel_pad_context *pads;
+	int i;
+
+	/* Mask all interrupts */
+	intel_gpio_irq_init(pctrl);
+
+	pads = pctrl->context.pads;
+	for (i = 0; i < pctrl->soc->npins; i++) {
+		const struct pinctrl_pin_desc *desc = &pctrl->soc->pins[i];
+
+		if (!intel_pinctrl_should_save(pctrl, desc->number))
+			continue;
+
+		intel_restore_padcfg(pctrl, desc->number, PADCFG0, pads[i].padcfg0);
+		intel_restore_padcfg(pctrl, desc->number, PADCFG1, pads[i].padcfg1);
+		intel_restore_padcfg(pctrl, desc->number, PADCFG2, pads[i].padcfg2);
+	}
+
+	communities = pctrl->context.communities;
+	for (i = 0; i < pctrl->ncommunities; i++) {
+		struct intel_community *community = &pctrl->communities[i];
+		void __iomem *base;
+		unsigned int gpp;
+
+		base = community->regs + community->ie_offset;
+		for (gpp = 0; gpp < community->ngpps; gpp++)
+			intel_restore_intmask(pctrl, i, base, gpp, communities[i].intmask[gpp]);
+
+		base = community->regs + community->hostown_offset;
+		for (gpp = 0; gpp < community->ngpps; gpp++)
+			intel_restore_hostown(pctrl, i, base, gpp, communities[i].hostown[gpp]);
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(wb_intel_pinctrl_resume_noirq);
+#endif
+
+MODULE_AUTHOR("Mathias Nyman <mathias.nyman@linux.intel.com>");
+MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
+MODULE_DESCRIPTION("Intel pinctrl/GPIO core driver");
+MODULE_LICENSE("GPL v2");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.h
new file mode 100644
index 000000000000..5ed0cc0651a5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/pinctrl/wb_pinctrl_intel.h
@@ -0,0 +1,275 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Core pinctrl/GPIO driver for Intel GPIO controllers
+ *
+ * Copyright (C) 2015, Intel Corporation
+ * Authors: Mathias Nyman <mathias.nyman@linux.intel.com>
+ *          Mika Westerberg <mika.westerberg@linux.intel.com>
+ */
+
+#ifndef PINCTRL_INTEL_H
+#define PINCTRL_INTEL_H
+
+#include <linux/bits.h>
+#include <linux/compiler_types.h>
+#include <linux/gpio/driver.h>
+#include <linux/irq.h>
+#include <linux/kernel.h>
+#include <linux/pm.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/spinlock_types.h>
+
+struct platform_device;
+struct device;
+
+#define GPIO_RES_MAX    (2)
+
+typedef struct wb_gpio_data_s {
+    int irq;
+    void __iomem *res[GPIO_RES_MAX];
+    unsigned int pci_domain;
+    unsigned int pci_bus;
+    unsigned int pci_slot;
+    unsigned int pci_fn;
+    unsigned int pci_bar;
+    struct pci_dev *pci_dev;
+    void __iomem *pci_mem_base;
+} wb_gpio_data_t;
+
+/**
+ * struct intel_pingroup - Description about group of pins
+ * @name: Name of the groups
+ * @pins: All pins in this group
+ * @npins: Number of pins in this groups
+ * @mode: Native mode in which the group is muxed out @pins. Used if @modes
+ *        is %NULL.
+ * @modes: If not %NULL this will hold mode for each pin in @pins
+ */
+struct intel_pingroup {
+	const char *name;
+	const unsigned int *pins;
+	size_t npins;
+	unsigned short mode;
+	const unsigned int *modes;
+};
+
+/**
+ * struct intel_function - Description about a function
+ * @name: Name of the function
+ * @groups: An array of groups for this function
+ * @ngroups: Number of groups in @groups
+ */
+struct intel_function {
+	const char *name;
+	const char * const *groups;
+	size_t ngroups;
+};
+
+/**
+ * struct intel_padgroup - Hardware pad group information
+ * @reg_num: GPI_IS register number
+ * @base: Starting pin of this group
+ * @size: Size of this group (maximum is 32).
+ * @gpio_base: Starting GPIO base of this group
+ * @padown_num: PAD_OWN register number (assigned by the core driver)
+ *
+ * If pad groups of a community are not the same size, use this structure
+ * to specify them.
+ */
+struct intel_padgroup {
+	unsigned int reg_num;
+	unsigned int base;
+	unsigned int size;
+	int gpio_base;
+	unsigned int padown_num;
+};
+
+/**
+ * enum - Special treatment for GPIO base in pad group
+ *
+ * @INTEL_GPIO_BASE_ZERO:	force GPIO base to be 0
+ * @INTEL_GPIO_BASE_NOMAP:	no GPIO mapping should be created
+ * @INTEL_GPIO_BASE_MATCH:	matches with starting pin number
+ */
+enum {
+	INTEL_GPIO_BASE_ZERO	= -2,
+	INTEL_GPIO_BASE_NOMAP	= -1,
+	INTEL_GPIO_BASE_MATCH	= 0,
+};
+
+/**
+ * struct intel_community - Intel pin community description
+ * @barno: MMIO BAR number where registers for this community reside
+ * @padown_offset: Register offset of PAD_OWN register from @regs. If %0
+ *                 then there is no support for owner.
+ * @padcfglock_offset: Register offset of PADCFGLOCK from @regs. If %0 then
+ *                     locking is not supported.
+ * @hostown_offset: Register offset of HOSTSW_OWN from @regs. If %0 then it
+ *                  is assumed that the host owns the pin (rather than
+ *                  ACPI).
+ * @is_offset: Register offset of GPI_IS from @regs.
+ * @ie_offset: Register offset of GPI_IE from @regs.
+ * @features: Additional features supported by the hardware
+ * @pin_base: Starting pin of pins in this community
+ * @npins: Number of pins in this community
+ * @gpp_size: Maximum number of pads in each group, such as PADCFGLOCK,
+ *            HOSTSW_OWN, GPI_IS, GPI_IE. Used when @gpps is %NULL.
+ * @gpp_num_padown_regs: Number of pad registers each pad group consumes at
+ *			 minimum. Use %0 if the number of registers can be
+ *			 determined by the size of the group.
+ * @gpps: Pad groups if the controller has variable size pad groups
+ * @ngpps: Number of pad groups in this community
+ * @pad_map: Optional non-linear mapping of the pads
+ * @nirqs: Optional total number of IRQs this community can generate
+ * @acpi_space_id: Optional address space ID for ACPI OpRegion handler
+ * @regs: Community specific common registers (reserved for core driver)
+ * @pad_regs: Community specific pad registers (reserved for core driver)
+ *
+ * In some of Intel GPIO host controllers this driver supports each pad group
+ * is of equal size (except the last one). In that case the driver can just
+ * fill in @gpp_size field and let the core driver to handle the rest. If
+ * the controller has pad groups of variable size the client driver can
+ * pass custom @gpps and @ngpps instead.
+ */
+struct intel_community {
+	unsigned int barno;
+	unsigned int padown_offset;
+	unsigned int padcfglock_offset;
+	unsigned int hostown_offset;
+	unsigned int is_offset;
+	unsigned int ie_offset;
+	unsigned int features;
+	unsigned int pin_base;
+	size_t npins;
+	unsigned int gpp_size;
+	unsigned int gpp_num_padown_regs;
+	const struct intel_padgroup *gpps;
+	size_t ngpps;
+	const unsigned int *pad_map;
+	unsigned short nirqs;
+	unsigned short acpi_space_id;
+
+	/* Reserved for the core driver */
+	void __iomem *regs;
+	void __iomem *pad_regs;
+    u32 dw_base;
+};
+
+/* Additional features supported by the hardware */
+#define PINCTRL_FEATURE_DEBOUNCE	BIT(0)
+#define PINCTRL_FEATURE_1K_PD		BIT(1)
+
+/**
+ * PIN_GROUP - Declare a pin group
+ * @n: Name of the group
+ * @p: An array of pins this group consists
+ * @m: Mode which the pins are put when this group is active. Can be either
+ *     a single integer or an array of integers in which case mode is per
+ *     pin.
+ */
+#define PIN_GROUP(n, p, m)					\
+	{							\
+		.name = (n),					\
+		.pins = (p),					\
+		.npins = ARRAY_SIZE((p)),			\
+		.mode = __builtin_choose_expr(			\
+			__builtin_constant_p((m)), (m), 0),	\
+		.modes = __builtin_choose_expr(			\
+			__builtin_constant_p((m)), NULL, (m)),	\
+	}
+
+#define FUNCTION(n, g)				\
+	{					\
+		.name = (n),			\
+		.groups = (g),			\
+		.ngroups = ARRAY_SIZE((g)),	\
+	}
+
+/**
+ * struct intel_pinctrl_soc_data - Intel pin controller per-SoC configuration
+ * @uid: ACPI _UID for the probe driver use if needed
+ * @pins: Array if pins this pinctrl controls
+ * @npins: Number of pins in the array
+ * @groups: Array of pin groups
+ * @ngroups: Number of groups in the array
+ * @functions: Array of functions
+ * @nfunctions: Number of functions in the array
+ * @communities: Array of communities this pinctrl handles
+ * @ncommunities: Number of communities in the array
+ *
+ * The @communities is used as a template by the core driver. It will make
+ * copy of all communities and fill in rest of the information.
+ */
+struct intel_pinctrl_soc_data {
+	const char *uid;
+	const struct pinctrl_pin_desc *pins;
+	size_t npins;
+	const struct intel_pingroup *groups;
+	size_t ngroups;
+	const struct intel_function *functions;
+	size_t nfunctions;
+	const struct intel_community *communities;
+	size_t ncommunities;
+};
+
+struct intel_pad_context;
+struct intel_community_context;
+
+/**
+ * struct intel_pinctrl_context - context to be saved during suspend-resume
+ * @pads: Opaque context per pad (driver dependent)
+ * @communities: Opaque context per community (driver dependent)
+ */
+struct intel_pinctrl_context {
+	struct intel_pad_context *pads;
+	struct intel_community_context *communities;
+};
+
+/**
+ * struct intel_pinctrl - Intel pinctrl private structure
+ * @dev: Pointer to the device structure
+ * @lock: Lock to serialize register access
+ * @pctldesc: Pin controller description
+ * @pctldev: Pointer to the pin controller device
+ * @chip: GPIO chip in this pin controller
+ * @irqchip: IRQ chip in this pin controller
+ * @soc: SoC/PCH specific pin configuration data
+ * @communities: All communities in this pin controller
+ * @ncommunities: Number of communities in this pin controller
+ * @context: Configuration saved over system sleep
+ * @irq: pinctrl/GPIO chip irq number
+ */
+struct intel_pinctrl {
+	struct device *dev;
+	raw_spinlock_t lock;
+	struct pinctrl_desc pctldesc;
+	struct pinctrl_dev *pctldev;
+	struct gpio_chip chip;
+	struct irq_chip irqchip;
+	const struct intel_pinctrl_soc_data *soc;
+	struct intel_community *communities;
+	size_t ncommunities;
+	struct intel_pinctrl_context context;
+	int irq;
+};
+
+int wb_pinctrl_probe(struct platform_device *pdev, const struct intel_pinctrl_soc_data *soc_data);
+
+#if 0
+const struct intel_pinctrl_soc_data *intel_pinctrl_get_soc_data(struct platform_device *pdev);
+int intel_pinctrl_probe_by_hid(struct platform_device *pdev);
+int intel_pinctrl_probe_by_uid(struct platform_device *pdev);
+#endif
+
+#ifdef CONFIG_PM_SLEEP
+int wb_intel_pinctrl_suspend_noirq(struct device *dev);
+int wb_intel_pinctrl_resume_noirq(struct device *dev);
+#endif
+
+#define INTEL_PINCTRL_PM_OPS(_name)					\
+const struct dev_pm_ops _name = {					\
+	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(wb_intel_pinctrl_suspend_noirq,	\
+				      wb_intel_pinctrl_resume_noirq)	\
+}
+
+#endif /* PINCTRL_INTEL_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c
index 6cf05abd55dc..f56473d16292 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c
@@ -462,6 +462,103 @@ int dfd_info_set_int(int key, int val)
     return DFD_RV_OK;
 }
 
+static int dfd_info_reg2data_linear(int key, int data, int *temp_value)
+{
+    s16 exponent;
+    s32 mantissa;
+    int val;
+    info_ctrl_t *info_ctrl;
+
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_WARN, "get info ctrl fail, key=%d\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    switch (info_ctrl->int_extra1) {
+    case LINEAR11:
+        exponent = ((s16)data) >> 11;
+        mantissa = ((s16)((data & 0x7ff) << 5)) >> 5;
+        val = mantissa;
+        val = val * 1000L;
+        break;
+    case LINEAR16:
+        break;
+    default:
+        break;
+    }
+
+    if (DFD_CFG_ITEM_ID(key) == DFD_CFG_ITEM_HWMON_POWER) {
+        val = val * 1000L;
+    }
+
+    if (exponent >= 0) {
+        val <<= exponent;
+    } else {
+        val >>= -exponent;
+    }
+    *temp_value = val;
+
+    return DFD_RV_OK;
+}
+
+static int dfd_info_reg2data_tmp464(int data, int *temp_value)
+{
+    s16 tmp_val;
+    int val;
+
+    DBG_DEBUG(DBG_VERBOSE, "reg2data_tmp464, data=%d\n", data);
+
+    if (data >= 0) {
+        val = data*625/80;
+    } else {
+        tmp_val = ~(data & 0x7ff) + 1;
+        val = tmp_val*625/80;
+    }
+    *temp_value = val;
+
+    return DFD_RV_OK;
+}
+
+static int dfd_info_reg2data_mac_th5(int data, int *temp_value)
+{
+    int tmp_val;
+    int val;
+
+    DBG_DEBUG(DBG_VERBOSE, "reg2data_mac_th5, data=%d\n", data);
+
+    tmp_val = data >> 4;
+    val = 476359 - (((tmp_val - 2) * 317704) / 2000);
+
+    DBG_DEBUG(DBG_VERBOSE, "reg2data_mac_th5, val=%d\n", val);
+    *temp_value = val;
+
+    return DFD_RV_OK;
+}
+
+static int dfd_info_reg2data_mac_td3(int data, int *temp_value)
+{
+    int val;
+
+    if (data == 0) {
+        DBG_DEBUG(DBG_ERROR,"invalid cpld data=%d\n", data);
+        *temp_value = -READ_TEMP_FAIL;
+        return DFD_RV_OK;
+    }
+
+    DBG_DEBUG(DBG_VERBOSE, "reg2data_mac_td3, data=%d\n", data);
+    val = 434100 - (12500000 / (data * 100 - 1) *535);
+    if ((val / 1000 < -70) || (val / 1000 > 200)) {
+        DBG_DEBUG(DBG_ERROR,"out of range cpld val=%d\n", val);
+        *temp_value = -READ_TEMP_FAIL;
+        return DFD_RV_OK;
+    }
+    DBG_DEBUG(DBG_VERBOSE, "reg2data_mac_td3, val=%d\n", val);
+    *temp_value = val;
+
+    return DFD_RV_OK;
+}
+
 static int dfd_info_get_cpld_voltage(int key, uint32_t *value)
 {
     int rv;
@@ -507,6 +604,51 @@ static int dfd_info_get_cpld_voltage(int key, uint32_t *value)
     return DFD_RV_OK;
 }
 
+static int dfd_info_get_cpld_temperature(int key, int *value)
+{
+    int rv;
+    int temp_reg;
+    int temp_value;
+    info_ctrl_t *info_ctrl;
+
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    if (info_ctrl == NULL) {
+        DBG_DEBUG(DBG_WARN, "get info ctrl fail, key=0x%08x\n", key);
+        return -DFD_RV_DEV_NOTSUPPORT;
+    }
+
+    rv = dfd_info_get_int(key, &temp_reg, NULL);
+    if(rv < 0) {
+        DBG_DEBUG(DBG_ERROR, "get cpld current temperature error, addr:0x%x, rv =%d\n", info_ctrl->addr, rv);
+        return rv;
+    }
+    DBG_DEBUG(DBG_VERBOSE, "get cpld temp:0x%08x, extra1 0x%x\n", temp_reg, info_ctrl->int_extra1);
+
+    switch (info_ctrl->int_extra1) {
+    case LINEAR11:
+        rv = dfd_info_reg2data_linear(key, temp_reg, &temp_value);
+        break;
+    case TMP464:
+        rv = dfd_info_reg2data_tmp464(temp_reg, &temp_value);
+        break;
+    case MAC_TH5:
+        rv = dfd_info_reg2data_mac_th5(temp_reg, &temp_value);
+        break;
+    case MAC_TD3:
+        rv = dfd_info_reg2data_mac_td3(temp_reg, &temp_value);
+        break;
+    default:
+        temp_value = temp_reg;
+        rv = DFD_RV_OK;
+        break;
+    }
+    
+    DBG_DEBUG(DBG_VERBOSE, "calc temp:%d \n", temp_value);
+    *value = temp_value;
+
+    return rv;
+}
+
 static int dfd_info_get_sensor_value(int key, uint8_t *buf, int buf_len, info_hwmon_buf_f pfun)
 {
     int rv, buf_real_len;
@@ -546,6 +688,23 @@ static int dfd_info_get_sensor_value(int key, uint8_t *buf, int buf_len, info_hw
             memcpy(buf, buf_tmp, buf_real_len);
         }
         return buf_real_len;
+    } else if ( DFD_CFG_ITEM_ID(key) == DFD_CFG_ITEM_HWMON_TEMP && info_ctrl->src == INFO_SRC_CPLD ) {
+        rv = dfd_info_get_cpld_temperature(key, &value);
+        if(rv < 0) {
+            DBG_DEBUG(DBG_ERROR, "get cpld temperature failed.key=0x%08x, rv:%d\n", key, rv);
+            return -DFD_RV_DEV_NOTSUPPORT;
+        }
+        DBG_DEBUG(DBG_VERBOSE, "get cpld temperature ok, value:%d buf_len %d\n", value, buf_len);
+        mem_clear(buf_tmp, sizeof(buf_tmp));
+        snprintf(buf_tmp, sizeof(buf_tmp), "%d\n", value);
+        buf_real_len = strlen(buf_tmp);
+        if(buf_len <= buf_real_len) {
+            DBG_DEBUG(DBG_ERROR, "length not enough.buf_len:%d,need length:%d\n", buf_len, buf_real_len);
+            return -DFD_RV_DEV_FAIL;
+        }
+        DBG_DEBUG(DBG_VERBOSE, "buf_real_len %d\n", buf_real_len);
+        memcpy(buf, buf_tmp, buf_real_len);
+        return buf_real_len;
     }
 
     DBG_DEBUG(DBG_ERROR, "not support mode. key:0x%08x\n", key);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_fan_driver.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_fan_driver.c
index efc322046c07..d8965d75c9c0 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_fan_driver.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/dfd_fan_driver.c
@@ -12,6 +12,10 @@
 int g_dfd_fan_dbg_level = 0;
 module_param(g_dfd_fan_dbg_level, int, S_IRUGO | S_IWUSR);
 
+typedef enum fan_speed_format_mem_s {
+    LINEAR120 = 1,
+} fan_speed_format_mem_t;
+
 int dfd_get_fan_roll_status(unsigned int fan_index, unsigned int motor_index)
 {
     int key, ret;
@@ -46,9 +50,30 @@ int dfd_get_fan_present_status(unsigned int fan_index)
     return status;
 }
 
+static int dfd_get_fan_speed_linear120(int origin_data, int *speed)
+{
+    *speed = origin_data * 120;
+    DFD_FAN_DEBUG(DBG_VERBOSE, "get fan speed by linear120 origin_data: %d, speed: %d\n",
+        origin_data, *speed);
+    return 0;
+}
+
+static int dfd_get_fan_speed_default(int origin_data, int *speed)
+{
+    if (origin_data == 0 || origin_data == 0xffff) {
+        *speed = 0;
+    } else {
+        *speed = 15000000 / origin_data;
+    }
+    DFD_FAN_DEBUG(DBG_VERBOSE, "get fan speed by default origin_data: %d, speed: %d\n",
+        origin_data, *speed);
+    return 0;
+}
+
 ssize_t dfd_get_fan_speed(unsigned int fan_index, unsigned int motor_index,unsigned int *speed)
 {
     int key, ret, speed_tmp;
+    info_ctrl_t *info_ctrl;
 
     if (speed == NULL) {
         DFD_FAN_DEBUG(DBG_ERROR, "param error. fan index:%d, motor index:%d.\n",
@@ -62,13 +87,19 @@ ssize_t dfd_get_fan_speed(unsigned int fan_index, unsigned int motor_index,unsig
         DFD_FAN_DEBUG(DBG_ERROR, "get fan speed error, key:0x%x,ret:%d\n",key, ret);
         return ret;
     }
-
-    if (speed_tmp == 0 || speed_tmp == 0xffff) {
-        *speed = 0;
-    } else {
-        *speed = 15000000 / speed_tmp;
+    DFD_FAN_DEBUG(DBG_VERBOSE, "get fan origin data: 0x%x\n", speed_tmp);
+
+    info_ctrl = dfd_ko_cfg_get_item(key);
+    switch (info_ctrl->int_extra1) {
+    case LINEAR120:
+        ret = dfd_get_fan_speed_linear120(speed_tmp, speed);
+        break;
+    default:
+        ret = dfd_get_fan_speed_default(speed_tmp, speed);
+        break;
     }
-    return DFD_RV_OK;
+
+    return ret;
 }
 
 int dfd_set_fan_speed_level(unsigned int fan_index, unsigned int motor_index, int level)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg.h
index 062654d01504..af3de1ca9938 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg.h
@@ -28,6 +28,7 @@
 #define INDEX_NOT_EXIST     (-1)
 #define INDEX1_MAX           (0xffff)
 #define INDEX2_MAX           (0xff)
+#define READ_TEMP_FAIL 1000000
 
 #define DFD_CFG_ITEM_ALL \
     DFD_CFG_ITEM(DFD_CFG_ITEM_NONE, "none", INDEX_NOT_EXIST, INDEX_NOT_EXIST)                       \
@@ -52,6 +53,7 @@
     DFD_CFG_ITEM(DFD_CFG_ITEM_HWMON_IN, "hwmon_in", INDEX1_MAX, INDEX2_MAX)                         \
     DFD_CFG_ITEM(DFD_CFG_ITEM_SFF_CPLD_REG, "sff_cpld_reg", INDEX1_MAX, INDEX2_MAX)                 \
     DFD_CFG_ITEM(DFD_CFG_ITEM_INFO_CTRL_END, "end_info_ctrl", INDEX_NOT_EXIST, INDEX_NOT_EXIST)     \
+    DFD_CFG_ITEM(DFD_CFG_ITEM_HWMON_POWER, "hwmon_power", INDEX1_MAX, INDEX2_MAX)                   \
 
 #ifdef DFD_CFG_ITEM
 #undef DFD_CFG_ITEM
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h
index dc1ed17651b9..2c304e99ca3a 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h
@@ -90,6 +90,14 @@ typedef enum info_ctrl_mem_s {
     INFO_CTRL_MEM_END
 } info_ctrl_mem_t;
 
+typedef enum sensor_format_mem_s {
+    LINEAR11 = 1,
+    LINEAR16,
+    TMP464,
+    MAC_TH5,
+    MAC_TD3
+} sensor_format_mem_t;
+
 typedef int (*info_hwmon_buf_f)(uint8_t *buf, int buf_len, uint8_t *buf_new, int *buf_len_new, info_ctrl_t *info_ctrl);
 
 extern char *g_info_ctrl_mem_str[INFO_CTRL_MEM_END];
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c
index 988ef12a7672..4abdccabeda9 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c
@@ -61,11 +61,14 @@ struct i2c_dev_info {
 static int transfer_read(struct i2c_client *client, u8 *buf, loff_t regaddr, size_t count)
 {
     struct i2c_adapter *adap;
-    int i;
+    union i2c_smbus_data data;
+    int i, j;
     u8 offset_buf[MAX_BUS_WIDTH];
     struct i2c_msg msgs[2];
     int msgs_num, ret;
     struct i2c_dev_info *i2c_dev;
+    u8 offset;
+    u8 length;
 
     if (!client) {
         I2C_DEV_DEBUG_ERROR("can't get read client\n");
@@ -127,9 +130,47 @@ static int transfer_read(struct i2c_client *client, u8 *buf, loff_t regaddr, siz
             return -EINVAL;
         }
     } else {
-        I2C_DEV_DEBUG_ERROR("don't find read master_xfer\n");
-        return -EINVAL;
-
+        if (i2c_dev->addr_bus_width == WIDTH_1Byte) {
+            offset = regaddr & 0xFF;
+            if (i2c_check_functionality(adap, I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
+                for (j = 0; j < count; j += I2C_SMBUS_BLOCK_MAX) {
+                    if (count - j > I2C_SMBUS_BLOCK_MAX) {
+                        length = I2C_SMBUS_BLOCK_MAX;
+                    } else {
+                        length = count - j;
+                    }
+                    data.block[0] = length;
+                    ret = adap->algo->smbus_xfer(adap, client->addr,
+                                    0,
+                                    I2C_SMBUS_READ,
+                                    offset, I2C_SMBUS_I2C_BLOCK_DATA, &data);
+                    if (ret) {
+                        I2C_DEV_DEBUG_ERROR("smbus_xfer read block error, ret = %d\n", ret);
+                        return -EFAULT;
+                    }
+                    memcpy(buf + j, data.block + 1, length);
+                    offset += length;
+                }
+            } else {
+                for (j = 0; j < count; j++) {
+                    ret = adap->algo->smbus_xfer(adap, client->addr,
+                                    0,
+                                    I2C_SMBUS_READ,
+                                    offset, I2C_SMBUS_BYTE_DATA, &data);
+
+                    if (!ret) {
+                        buf[j] = data.byte;
+                    } else {
+                        I2C_DEV_DEBUG_ERROR("smbus_xfer read byte error, ret = %d\n", ret);
+                        return -EFAULT;
+                    }
+                    offset++;
+                }
+            }
+        } else {
+            I2C_DEV_DEBUG_ERROR("smbus_xfer not support addr_bus_width = %d\n", i2c_dev->addr_bus_width);
+            return -EINVAL;
+        }
     }
     return 0;
 }
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c
index 1e84e65d7b11..d72e91ace060 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c
@@ -1,5 +1,4 @@
 /*
- * wb_mac_th3.c - A driver for control wb_mac_th3 base on wb_mac.c
  *
  * Copyright (c) 1998, 1999  Frodo Looijaard <frodol@dds.nl>
  *
@@ -32,20 +31,31 @@
 #define mem_clear(data, size) memset((data), 0, (size))
 
 #define MAC_TEMP_INVALID    (99999999)
+#define MAC_ID_REG          (0x02000000)
 
-#define MAC_SIZE		    (256)
-#define MAC_TEMP_NUM        (16)
+#define MAC_REG_ADDR_WIDTH (4)
+#define MAC_REG_DATA_WIDTH (4)
+#define MAC_BSC_MAX_TEMP_NUM (16)
+#define MAC_BSC_MAX_READ_REG_STEP (6)
+#define MAC_BSC_MAX_SETUP_NUM (1)
 
-#define MAC_ID_REG          (0x02000000)
+static int g_wb_mac_bsc_debug = 0;
+static int g_wb_mac_bsc_error = 0;
 
-typedef enum {
-    DBG_START,
-    DBG_VERBOSE,
-    DBG_KEY,
-    DBG_WARN,
-    DBG_ERROR,
-    DBG_END,
-} dbg_level_t;
+module_param(g_wb_mac_bsc_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_mac_bsc_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_MAC_BSC_DEBUG(fmt, args...) do {                                        \
+    if (g_wb_mac_bsc_debug) { \
+        printk(KERN_INFO "[MAC_BSC][VER][func:%s line:%d] "fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
+
+#define WB_MAC_BSC_ERROR(fmt, args...) do {                                        \
+    if (g_wb_mac_bsc_error) { \
+        printk(KERN_ERR "[MAC_BSC][ERR][func:%s line:%d]"fmt, __func__, __LINE__, ## args); \
+    } \
+} while (0)
 
 typedef enum{
     MAC_TYPE_START,
@@ -53,20 +63,11 @@ typedef enum{
     TD4_X9_8 = 0xb788,
     TH3 = 0xb980,
     TD3 = 0xb870,
+    TD3_X2 = 0xb274,
     TD4 = 0xb880,
     TH4 = 0xb990,
     MAC_TYPE_END,
-} mac_type;
-
-typedef struct sensor_regs_s {
-    int id;
-    u32 reg;
-} sensor_reg_t;
-
-typedef struct mac_temp_regs_s {
-    int mac_type;
-    sensor_reg_t sensor_reg[MAC_TEMP_NUM];
-} mac_temp_reg_t;
+} mac_id;
 
 typedef enum {
     MAC_TEMP_START,
@@ -88,365 +89,446 @@ typedef enum {
     MAC_TEMP_END,
 } mac_hwmon_index;
 
-static mac_temp_reg_t mac_temp_reg[] = {
+typedef enum action_e {
+    I2C_WRITE,
+    I2C_READ
+} action_t;
+
+typedef struct i2c_op_s {
+    action_t op;
+    uint32_t reg_addr;
+    uint32_t reg_val;
+    int read_back;
+} i2c_op_t;
+
+typedef struct dev_params_s {
+    int mac_id;
+    i2c_op_t sbus_setup[MAC_BSC_MAX_SETUP_NUM];
+    i2c_op_t vtmon_read[MAC_BSC_MAX_READ_REG_STEP];
+    uint32_t vtmon_reg_addrs[MAC_BSC_MAX_TEMP_NUM];
+    uint8_t vtmon_instances;
+    uint32_t vtmon_data_width;
+    int vtmon_scalar;
+    int vtmon_offset;
+    uint8_t sbus_setup_ops;
+    int vtmon_read_ops;
+    int sbus_addr_op;
+    int sbus_error_op;
+    uint32_t sbus_error_mask;
+} dev_params_t;
+
+static dev_params_t mac_temp_conf[] = {
     {
-        /* TD3 */
-        .mac_type = TD3,
-        .sensor_reg = {
-            {.id = MAC_TEMP_INDEX1,  .reg = 0x02004700},
-            {.id = MAC_TEMP_INDEX2,  .reg = 0x02004800},
-            {.id = MAC_TEMP_INDEX3,  .reg = 0x02004900},
-            {.id = MAC_TEMP_INDEX4,  .reg = 0x02004a00},
-            {.id = MAC_TEMP_INDEX5,  .reg = 0x02004b00},
-            {.id = MAC_TEMP_INDEX6,  .reg = 0x02004c00},
-            {.id = MAC_TEMP_INDEX7,  .reg = 0x02004d00},
-            {.id = MAC_TEMP_INDEX8,  .reg = 0x02004e00},
-            {.id = MAC_TEMP_INDEX9,  .reg = 0x02005200},
-            {.id = MAC_TEMP_INDEX10, .reg = 0x02005100},
-            {.id = MAC_TEMP_INDEX11, .reg = 0x02005000},
-            {.id = MAC_TEMP_INDEX12, .reg = 0x02004f00},
+        .mac_id = TD3_X2,
+        /* CMIC_TOP_SBUS_RING_MAP_0_7 = 0x52222100 */
+        .sbus_setup = {{I2C_WRITE, 0x1010000c, 0x52222100, 0}},
+        .vtmon_read = {
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRL = 0x00000000 */
+            {I2C_WRITE, 0x10110400, 0x00000000, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGE[0] = 0x2c380200 */
+            {I2C_WRITE, 0x1011040c, 0x2c380200, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGE[1] = TOP_PVTMON_RESULT_0 */
+            {I2C_WRITE, 0x10110410, 0x02005300, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRL = 0x00000001 */
+            {I2C_WRITE, 0x10110400, 0x00000001, 0},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_ERR */
+            {I2C_READ, 0x10110408},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGE[1] */
+            {I2C_READ, 0x10110410}
         },
+        .vtmon_reg_addrs = {
+            0x02005300, 0x02005400, 0x02005500, 0x02005600, 0x02005700, 0x02005800
+        },
+        .vtmon_instances = 6,
+        .vtmon_data_width = 10,
+        .vtmon_scalar = -5570,
+        .vtmon_offset = 4578289,
+        .sbus_setup_ops = 1,
+        .vtmon_read_ops = 6,
+        .sbus_addr_op = 2,
+        .sbus_error_op = 4,
+        .sbus_error_mask = 0x00000041,
     },
     {
-        /* TD4 */
-        .mac_type = TD4,
-        .sensor_reg = {
-            {.id = MAC_TEMP_INDEX1,  .reg = 0x02004900},
-            {.id = MAC_TEMP_INDEX2,  .reg = 0x02004b00},
-            {.id = MAC_TEMP_INDEX3,  .reg = 0x02004d00},
-            {.id = MAC_TEMP_INDEX4,  .reg = 0x02004f00},
-            {.id = MAC_TEMP_INDEX5,  .reg = 0x02005100},
-            {.id = MAC_TEMP_INDEX6,  .reg = 0x02005300},
-            {.id = MAC_TEMP_INDEX7,  .reg = 0x02005500},
-            {.id = MAC_TEMP_INDEX8,  .reg = 0x02005700},
-            {.id = MAC_TEMP_INDEX9,  .reg = 0x02005900},
-            {.id = MAC_TEMP_INDEX10, .reg = 0x02005b00},
-            {.id = MAC_TEMP_INDEX11, .reg = 0x02005d00},
-            {.id = MAC_TEMP_INDEX12, .reg = 0x02005f00},
-            {.id = MAC_TEMP_INDEX13, .reg = 0x02006100},
-            {.id = MAC_TEMP_INDEX14, .reg = 0x02006300},
-            {.id = MAC_TEMP_INDEX15, .reg = 0x02006500},
+        .mac_id = TD3,  /* TD3_X7*/
+        /* CMIC_TOP_SBUS_RING_MAP_0_7 = 0x52222100 */
+        .sbus_setup = {{I2C_WRITE, 0x0320000c, 0x52222100, 0}},
+        .vtmon_read = {
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRL = 0x00000000 */
+            {I2C_WRITE, 0x03210400, 0x00000000, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGE[0] = 0x2c380200 */
+            {I2C_WRITE, 0x0321040c, 0x2c380200, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGE[1] = TOP_PVTMON_RESULT_0 */
+            {I2C_WRITE, 0x03210410, 0x02004700, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRL = 0x00000001 */
+            {I2C_WRITE, 0x03210400, 0x00000001, 0},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_ERR */
+            {I2C_READ, 0x03210408},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGE[1] */
+            {I2C_READ, 0x03210410}
+        },
+        .vtmon_reg_addrs = {
+            0x02004700, 0x02004800, 0x02004900, 0x02004a00, 0x02004b00, 0x02004c00,
+            0x02004d00, 0x02004e00, 0x02005200, 0x02005100, 0x02005000, 0x02004f00
         },
+        .vtmon_instances = 12,
+        .vtmon_data_width = 10,
+        .vtmon_scalar = -5350,
+        .vtmon_offset = 4341000,
+        .sbus_setup_ops = 0,
+        .vtmon_read_ops = 6,
+        .sbus_addr_op = 2,
+        .sbus_error_op = 4,
+        .sbus_error_mask = 0x00000041,
     },
     {
-        /* TD4_X9 */
-        .mac_type = TD4_X9,
-        .sensor_reg = {
-            {.id = MAC_TEMP_INDEX1,  .reg = 0x02005a00},
-            {.id = MAC_TEMP_INDEX2,  .reg = 0x02005c00},
-            {.id = MAC_TEMP_INDEX3,  .reg = 0x02005e00},
-            {.id = MAC_TEMP_INDEX4,  .reg = 0x02006000},
-            {.id = MAC_TEMP_INDEX5,  .reg = 0x02006200},
-            {.id = MAC_TEMP_INDEX6,  .reg = 0x02006400},
-            {.id = MAC_TEMP_INDEX7,  .reg = 0x02006600},
-            {.id = MAC_TEMP_INDEX8,  .reg = 0x02006800},
-            {.id = MAC_TEMP_INDEX9,  .reg = 0x02006a00},
+        .mac_id = TH3,
+        .vtmon_read = {
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRL = 0x00000000 */
+            {I2C_WRITE, 0x03210400, 0x00000000, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGE[0] = 0x2c400200 */
+            {I2C_WRITE, 0x0321040c, 0x2c400200, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGE[1] = TOP_PVTMON_RESULT_0 */
+            {I2C_WRITE, 0x03210410, 0x02004a00, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRL = 0x00000001 */
+            {I2C_WRITE, 0x03210400, 0x00000001, 0},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_ERR */
+            {I2C_READ, 0x03210408},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGE[1] */
+            {I2C_READ, 0x03210410}
         },
+        .vtmon_reg_addrs = {
+            0x02004a00, 0x02004b00, 0x02004c00, 0x02004d00, 0x02004e00, 0x02004f00,
+            0x02005000, 0x02005100, 0x02005200, 0x02005300, 0x02005400, 0x02005500,
+            0x02005600, 0x02005700, 0x02005800
+        },
+        .vtmon_instances = 15,
+        .vtmon_data_width = 10,
+        .vtmon_scalar = -5350,
+        .vtmon_offset = 4341000,
+        .sbus_setup_ops = 0,
+        .vtmon_read_ops = 6,
+        .sbus_addr_op = 2,
+        .sbus_error_op = -1,
+    },
+    {
+        .mac_id = TD4_X9,
+        /* CMIC_TOP_SBUS_RING_MAP_8_15r = 0x00000000 */
+        .sbus_setup = {{I2C_WRITE, 0x03200010, 0x00000000, 0}},
+        .vtmon_read = {
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRLr = 0x00000000 */
+            {I2C_WRITE, 0x03210400, 0x00000000, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[0] = 0x2c400200 */
+            {I2C_WRITE, 0x0321040c, 0x2c400200, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[1] = TOP_VTMON_0_RESULT_1r */
+            {I2C_WRITE, 0x03210410, 0x02005a00, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRLr = 0x00000001 */
+            {I2C_WRITE, 0x03210400, 0x00000001, 0},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_ERRr */
+            {I2C_READ, 0x03210408},
+             /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[1] */
+            {I2C_READ, 0x03210410}
+        },
+        .vtmon_reg_addrs = {
+            0x02005a00, 0x02005c00, 0x02005e00, 0x02006000, 0x02006200, 0x02006400,
+            0x02006600, 0x02006800, 0x02006a00
+        },
+        .vtmon_instances = 9,
+        .vtmon_data_width = 11,
+        .vtmon_scalar = -2454,
+        .vtmon_offset = 3668120,
+        .sbus_setup_ops = 0,
+        .vtmon_read_ops = 6,
+        .sbus_addr_op = 2,
+        .sbus_error_op = 4,
+        .sbus_error_mask = 0x00000041,
     },
     {
-        /* TD4_X9_8 */
-        .mac_type = TD4_X9_8,
-        .sensor_reg = {
-            {.id = MAC_TEMP_INDEX1,  .reg = 0x02005a00},
-            {.id = MAC_TEMP_INDEX2,  .reg = 0x02005c00},
-            {.id = MAC_TEMP_INDEX3,  .reg = 0x02005e00},
-            {.id = MAC_TEMP_INDEX4,  .reg = 0x02006000},
-            {.id = MAC_TEMP_INDEX5,  .reg = 0x02006200},
-            {.id = MAC_TEMP_INDEX6,  .reg = 0x02006400},
-            {.id = MAC_TEMP_INDEX7,  .reg = 0x02006600},
-            {.id = MAC_TEMP_INDEX8,  .reg = 0x02006800},
-            {.id = MAC_TEMP_INDEX9,  .reg = 0x02006a00},
+        .mac_id = TD4_X9_8,
+        /* CMIC_TOP_SBUS_RING_MAP_8_15r = 0x00000000 */
+        .sbus_setup = {{I2C_WRITE, 0x03200010, 0x00000000, 0}},
+        .vtmon_read = {
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRLr = 0x00000000 */
+            {I2C_WRITE, 0x03210400, 0x00000000, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[0] = 0x2c400200 */
+            {I2C_WRITE, 0x0321040c, 0x2c400200, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[1] = TOP_VTMON_0_RESULT_1r */
+            {I2C_WRITE, 0x03210410, 0x02005a00, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRLr = 0x00000001 */
+            {I2C_WRITE, 0x03210400, 0x00000001, 0},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_ERRr */
+            {I2C_READ, 0x03210408},
+             /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[1] */
+            {I2C_READ, 0x03210410}
         },
+        .vtmon_reg_addrs = {
+            0x02005a00, 0x02005c00, 0x02005e00, 0x02006000, 0x02006200, 0x02006400,
+            0x02006600, 0x02006800, 0x02006a00
+        },
+        .vtmon_instances = 9,
+        .vtmon_data_width = 11,
+        .vtmon_scalar = -2454,
+        .vtmon_offset = 3668120,
+        .sbus_setup_ops = 0,
+        .vtmon_read_ops = 6,
+        .sbus_addr_op = 2,
+        .sbus_error_op = 4,
+        .sbus_error_mask = 0x00000041,
     },
     {
-        /* TH3 */
-        .mac_type = TH3,
-        .sensor_reg = {
-            {.id = MAC_TEMP_INDEX1,  .reg = 0x02004a00},
-            {.id = MAC_TEMP_INDEX2,  .reg = 0x02004b00},
-            {.id = MAC_TEMP_INDEX3,  .reg = 0x02004c00},
-            {.id = MAC_TEMP_INDEX4,  .reg = 0x02004d00},
-            {.id = MAC_TEMP_INDEX5,  .reg = 0x02004e00},
-            {.id = MAC_TEMP_INDEX6,  .reg = 0x02004f00},
-            {.id = MAC_TEMP_INDEX7,  .reg = 0x02005000},
-            {.id = MAC_TEMP_INDEX8,  .reg = 0x02005100},
-            {.id = MAC_TEMP_INDEX9,  .reg = 0x02005200},
-            {.id = MAC_TEMP_INDEX10, .reg = 0x02005300},
-            {.id = MAC_TEMP_INDEX11, .reg = 0x02005400},
-            {.id = MAC_TEMP_INDEX12, .reg = 0x02005500},
-            {.id = MAC_TEMP_INDEX13, .reg = 0x02005600},
-            {.id = MAC_TEMP_INDEX14, .reg = 0x02005700},
-            {.id = MAC_TEMP_INDEX15, .reg = 0x02005800},
+        .mac_id = TD4,  /* TD4-X11 */
+        /* CMIC_TOP_SBUS_RING_MAP_8_15r = 0x00000000 */
+        .sbus_setup = {{I2C_WRITE, 0x03200010, 0x00000000, 0}},
+        .vtmon_read = {
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRLr = 0x00000000 */
+            {I2C_WRITE, 0x03210400, 0x00000000, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[0] = 0x2c400200 */
+            {I2C_WRITE, 0x0321040c, 0x2c400200, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[1] = TOP_VTMON_0_RESULT_1r */
+            {I2C_WRITE, 0x03210410, 0x02004900, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRLr = 0x00000001 */
+            {I2C_WRITE, 0x03210400, 0x00000001, 0},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_ERRr */
+            {I2C_READ,  0x03210408},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[1] */
+            {I2C_READ,  0x03210410}
+        },
+        .vtmon_reg_addrs = {
+            0x02004900, 0x02004b00, 0x02004d00, 0x02004f00, 0x02005100, 0x02005300,
+            0x02005500, 0x02005700, 0x02005900, 0x02005b00, 0x02005d00, 0x02005f00,
+            0x02006100, 0x02006300, 0x02006500
         },
+        .vtmon_instances = 15,
+        .vtmon_data_width = 11,
+        .vtmon_scalar = -2454,
+        .vtmon_offset = 3668120,
+        .sbus_setup_ops = 0,
+        .vtmon_read_ops = 6,
+        .sbus_addr_op = 2,
+        .sbus_error_op = 4,
+        .sbus_error_mask = 0x00000041,
     },
     {
-        /* TH4 */
-        .mac_type = TH4,
-        .sensor_reg = {
-            {.id = MAC_TEMP_INDEX1,  .reg = 0x0201d800},
-            {.id = MAC_TEMP_INDEX2,  .reg = 0x0201e000},
-            {.id = MAC_TEMP_INDEX3,  .reg = 0x0201e800},
-            {.id = MAC_TEMP_INDEX4,  .reg = 0x0201f000},
-            {.id = MAC_TEMP_INDEX5,  .reg = 0x0201f800},
-            {.id = MAC_TEMP_INDEX6,  .reg = 0x02020000},
-            {.id = MAC_TEMP_INDEX7,  .reg = 0x02020800},
-            {.id = MAC_TEMP_INDEX8,  .reg = 0x02021000},
-            {.id = MAC_TEMP_INDEX9,  .reg = 0x02021800},
-            {.id = MAC_TEMP_INDEX10, .reg = 0x02022000},
-            {.id = MAC_TEMP_INDEX11, .reg = 0x02022800},
-            {.id = MAC_TEMP_INDEX12, .reg = 0x02023000},
-            {.id = MAC_TEMP_INDEX13, .reg = 0x02023800},
-            {.id = MAC_TEMP_INDEX14, .reg = 0x02024000},
-            {.id = MAC_TEMP_INDEX15, .reg = 0x02024800},
+        .mac_id = TH4,
+        .vtmon_read = {
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRLr = 0x00000000 */
+            {I2C_WRITE, 0x03210400, 0x00000000, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[0] = 0x2c400200 */
+            {I2C_WRITE, 0x0321040c, 0x2c400200, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[1] = TOP_VTMON_0_RESULT_1r */
+            {I2C_WRITE, 0x03210410, 0x0201d800, 1},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_CTRLr = 0x00000001 */
+            {I2C_WRITE, 0x03210400, 0x00000001, 0},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_ERRr */
+            {I2C_READ,  0x03210408},
+            /* CMIC_COMMON_POOL_SCHAN_CH4_MESSAGEr[1] */
+            {I2C_READ,  0x03210410}
+        },
+        .vtmon_reg_addrs = {
+            0x0201d800, 0x0201e000, 0x0201e800, 0x0201f000, 0x0201f800, 0x02020000,
+            0x02020800, 0x02021000, 0x02021800, 0x02022000, 0x02022800, 0x02023000,
+            0x02023800, 0x02024000, 0x02024800,
         },
+        .vtmon_instances = 15,
+        .vtmon_data_width = 11,
+        .vtmon_scalar = -2454,
+        .vtmon_offset = 3668120,
+        .sbus_setup_ops = 0,
+        .vtmon_read_ops = 6,
+        .sbus_addr_op = 2,
+        .sbus_error_op = -1,
     },
 };
 
-static int debuglevel = 0;
-module_param(debuglevel, int, S_IRUGO | S_IWUSR);
-
-static int mac_pcie_id = MAC_TYPE_START;
-module_param(mac_pcie_id, int, S_IRUGO | S_IWUSR);
-
-#define DBG_DEBUG(fmt, arg...)  do { \
-    if ( debuglevel > DBG_START && debuglevel < DBG_ERROR) { \
-          printk(KERN_INFO "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
-    } else if ( debuglevel >= DBG_ERROR ) {   \
-        printk(KERN_ERR "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
-    } else {    } \
-} while (0)
-
-#define DBG_ERROR(fmt, arg...)  do { \
-     if ( debuglevel > DBG_START) {  \
-        printk(KERN_ERR "[ERROR]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
-       } \
- } while (0)
-
 struct mac_data {
-    struct i2c_client   *client;
-    struct device		*hwmon_dev;
-    struct mutex        update_lock;
-    u8                  data[MAC_SIZE]; /* Register value */
+    struct i2c_client *client;
+    struct device *hwmon_dev;
+    struct mutex update_lock;
+    dev_params_t dev_param;
 };
 
-static int wb_i2c_read_one_time(struct i2c_client *client, u8 *recv_buf, int size)
+static int bsc_i2c_read(struct i2c_client *client, uint32_t reg_addr, uint32_t *reg_val)
 {
+    int msgs_num, ret, i;
+    uint8_t addr_buf[MAC_REG_ADDR_WIDTH];
+    uint8_t data_buf[MAC_REG_DATA_WIDTH];
+    uint32_t val;
     struct i2c_msg msgs[2];
-    int ret = 0;
 
-    if ((client == NULL) || (recv_buf == NULL)) {
-        DBG_DEBUG("i2c_client || recv_buf = NULL\r\n");
-        return -1;
+    for (i = 0; i < MAC_REG_ADDR_WIDTH; i++) {
+        addr_buf[i] = (reg_addr >> ((MAC_REG_ADDR_WIDTH -i -1) * 8)) & 0xff;
     }
 
     mem_clear(msgs, sizeof(msgs));
-
-    msgs[0].buf = recv_buf;
-    msgs[0].len = size;
     msgs[0].addr = client->addr;
-    msgs[0].flags |= I2C_M_RD;
-
-    ret = i2c_transfer(client->adapter, msgs, 1);
-    if (ret < 0) {
-        return ret;
+    msgs[0].flags = 0;
+    msgs[0].len = MAC_REG_ADDR_WIDTH;
+    msgs[0].buf = addr_buf;
+
+    msgs[1].addr = client->addr;
+    msgs[1].flags = I2C_M_RD;
+    msgs[1].len = MAC_REG_DATA_WIDTH;
+    msgs[1].buf = data_buf;
+
+    msgs_num = 2;
+    ret = i2c_transfer(client->adapter, msgs, msgs_num);
+    if (ret != msgs_num) {
+        WB_MAC_BSC_ERROR("i2c_transfer read failed, reg_addr: 0x%x, ret: %d\n", reg_addr, ret);
+        return -EIO;
     }
-    DBG_DEBUG("i2c_transfer, dev_addr 0x%x, size %d.\n", client->addr, size);
-
+    val = 0;
+    for (i = 0; i < MAC_REG_DATA_WIDTH; i++) {
+        val |= data_buf[i] << ((MAC_REG_DATA_WIDTH - i -1) * 8);
+    }
+    WB_MAC_BSC_DEBUG("bsc_i2c_read success, reg_addr: 0x%x, reg_val: 0x%x\n", reg_addr, val);
+    *reg_val = val;
     return 0;
 }
 
-static int wb_i2c_write_one_time(struct i2c_client *client, u8 *write_buf, int size)
+static int bsc_i2c_write(struct i2c_client *client, uint32_t reg_addr, uint32_t reg_val)
 {
-    struct i2c_msg msgs[2];
-    int ret = 0;
+    int ret, i;
+    uint8_t write_buf[MAC_REG_ADDR_WIDTH + MAC_REG_DATA_WIDTH];
+    struct i2c_msg msgs[1];
 
-    if ((client == NULL) || (write_buf == NULL)) {
-        DBG_DEBUG("i2c_client || write_buf = NULL\r\n");
-        return -1;
+    /* fill reg_addr first*/
+    for (i = 0; i < MAC_REG_ADDR_WIDTH; i++) {
+        write_buf[i] = (reg_addr >> ((MAC_REG_ADDR_WIDTH -i -1) * 8)) & 0xff;
     }
-
-    if ((size <= 0)) {
-        DBG_DEBUG("size invalid, size %d\n", size);
-        return -1;
+    for (i = 0; i < MAC_REG_DATA_WIDTH; i++) {
+        write_buf[i + MAC_REG_ADDR_WIDTH] = (reg_val >> ((MAC_REG_DATA_WIDTH -i -1) * 8)) & 0xff;
     }
 
     mem_clear(msgs, sizeof(msgs));
-
-    msgs[0].len = size;
+    msgs[0].len = MAC_REG_ADDR_WIDTH + MAC_REG_DATA_WIDTH;
     msgs[0].buf = write_buf;
     msgs[0].addr = client->addr;
+    msgs[0].flags = I2C_M_IGNORE_NAK;
 
     ret = i2c_transfer(client->adapter, msgs, 1);
     if (ret < 0) {
+        WB_MAC_BSC_DEBUG("i2c_transfer write failed, reg_addr: 0x%x, reg_val: 0x%x, ret: %d\n",
+            reg_addr, reg_val, ret);
         return ret;
     }
-    DBG_DEBUG("i2c_transfer, dev_addr 0x%x, size %d\n", client->addr, size);
-
+    WB_MAC_BSC_DEBUG("i2c_transfer write reg_addr: 0x%x, reg_val: 0x%x success\n",
+        reg_addr, reg_val);
     return 0;
 }
 
-static u8 step2_buf1[8] = {0x03, 0x21, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00};
-static u8 step2_buf2[8] = {0x03, 0x21, 0x04, 0x0c, 0x2c, 0x38, 0x02, 0x00};
-static u8 step2_buf3[8] = {0x03, 0x21, 0x04, 0x10, 0x02, 0x00, 0x4a, 0x00};
-static u8 step2_buf4[8] = {0x03, 0x21, 0x04, 0x00, 0x00, 0x00, 0x00, 0x01};
-static u8 step2_buf5[4] = {0x03, 0x21, 0x04, 0x08};
-static u8 step2_buf6[4] = {0x03, 0x21, 0x04, 0x10};
-
-static int getmac_register(struct i2c_client *client, u32 index, int *reg_value)
+static int handle_operation(struct i2c_client *client, i2c_op_t *operation)
 {
-    int i;
-    int ret = 0;
-    int value = 0;
-    unsigned char read_buf[8];
-
-    if (index == 0) {
-        DBG_ERROR("invalid index\n");
-        return -1;
+    int ret;
+    uint32_t rd_back_val;
+
+    if (operation->op == I2C_WRITE) {
+        ret = bsc_i2c_write(client, operation->reg_addr, operation->reg_val);
+        WB_MAC_BSC_DEBUG("bsc_i2c_write reg_addr: 0x%x, set val: 0x%x, ret: %d\n",
+            operation->reg_addr, operation->reg_val, ret);
+        if (operation->read_back) {
+            ret = bsc_i2c_read(client, operation->reg_addr, &rd_back_val);
+            if (rd_back_val != operation->reg_val) {
+                WB_MAC_BSC_ERROR("bsc_i2c_write failed, reg_addr: 0x%x, set val: 0x%x, read back valu: 0x%x\n",
+                    operation->reg_addr, operation->reg_val, rd_back_val);
+                return -1;
+            }
+             WB_MAC_BSC_DEBUG("bsc_i2c_write success, reg_addr: 0x%x, set val: 0x%x, read_back val: 0x%x\n",
+                 operation->reg_addr, operation->reg_val, rd_back_val);
+        }
+        return 0;
     }
 
-    step2_buf3[7]  = index & 0xff;
-    step2_buf3[6]  = (index >> 8) & 0xff;
-    step2_buf3[5]  = (index >> 16) & 0xff;
-    step2_buf3[4]  = (index >> 24) & 0xff;
-
-     ret = wb_i2c_write_one_time(client, step2_buf1, 8);
-     if (ret < 0) {
-         DBG_ERROR("write step2_buf1 failed, ret = %d\n", ret);
-     }
-     ret = wb_i2c_write_one_time(client, step2_buf2, 8);
-     if (ret < 0) {
-         DBG_ERROR("write step2_buf2 failed, ret = %d\n", ret);
-     }
-     ret = wb_i2c_write_one_time(client, step2_buf3, 8);
-     if (ret < 0) {
-         DBG_ERROR("write step2_buf3 failed, ret = %d\n", ret);
-     }
-     ret = wb_i2c_write_one_time(client, step2_buf4, 8);
-     if (ret < 0) {
-         DBG_ERROR("write step2_buf4 failed, ret = %d\n", ret);
-     }
-
-     ret = wb_i2c_write_one_time(client, step2_buf5, 4);
-     if (ret < 0) {
-         DBG_ERROR("write step2_buf5 failed, ret = %d\n", ret);
-     }
-     ret = wb_i2c_read_one_time(client, read_buf, 4);
-     if (ret < 0) {
-         DBG_ERROR("read failed, ret = %d\n", ret);
-     }
-     for (i = 0; i < 4; i++) {
-         DBG_DEBUG("read_buf[%d] = 0x%x \n", i, read_buf[i]);
-     }
-
-     ret = wb_i2c_write_one_time(client, step2_buf6, 4);
-     if (ret < 0) {
-         DBG_ERROR("write step2_buf6 failed, ret = %d\n", ret);
-     }
-
-    ret = wb_i2c_read_one_time(client, read_buf, 4);
-    if (ret < 0) {
-        DBG_ERROR("read failed, ret = %d\n", ret);
+    if (operation->op == I2C_READ) {
+        ret = bsc_i2c_read(client, operation->reg_addr, &operation->reg_val);
+        WB_MAC_BSC_DEBUG("bsc_i2c_read reg_addr: 0x%x, get val: 0x%x, ret: %d\n",
+            operation->reg_addr, operation->reg_val, ret);
         return ret;
     }
 
-    value = (read_buf[0] << 24)| (read_buf[1] << 16) | (read_buf[2] << 8) | read_buf[3];
-    *reg_value = value;
-
-    return ret;
+    WB_MAC_BSC_ERROR("Unsupport operation type: %d\n", operation->op);
+    return -EINVAL;
 }
 
-static int mac_calcute(u32 reg, int *temp)
+static int get_mac_reg(struct i2c_client *client, uint32_t reg_addr, uint32_t *reg_value)
 {
-    int ret = 0;
-    u32 tmp = 0;
-
-    switch(mac_pcie_id) {
-    case TD3:
-    case TH3:
-        tmp = reg & 0x3ff;
-        *temp =  434100 - (tmp * 535);
-        break;
-    case TD4:
-    case TH4:
-    case TD4_X9:
-    case TD4_X9_8:
-        tmp = reg & 0x7ff;
-        *temp = (356070 - (tmp * 237));
-        break;
-    default:
-        ret = -1;
-        DBG_ERROR("read failed, ret = %d\n", ret);
-        break;
-    }
-
-    if ((*temp / 1000 < -70) || (*temp / 1000 > 200)) {
-        ret = -1;
-        DBG_ERROR("mac temp invalid, temp = %d\n", *temp );
-    }
-
-    return ret;
-}
-
-static int find_reg_type(int type, int *type_index)
-{
-    int i;
-    int size;
-
-    size = ARRAY_SIZE(mac_temp_reg);
-    for (i = 0; i < size; i++) {
-        if (mac_temp_reg[i].mac_type == type) {
-            *type_index = i;
-            return 0;
+    int i, ret;
+    i2c_op_t *op;
+    struct mac_data *data;
+    dev_params_t *dev_params;
+    uint32_t val_tmp;
+
+    data = i2c_get_clientdata(client);
+    dev_params = &data->dev_param;
+    val_tmp = 0;
+    for (i = 0; i < dev_params->vtmon_read_ops; i++) {
+        op = &dev_params->vtmon_read[i];
+        if (i == dev_params->sbus_addr_op) {
+            op->reg_val = reg_addr;
+        }
+        WB_MAC_BSC_DEBUG("Start to handle %s operation, step: %d, reg_addr: 0x%x, reg_value: 0x%x, read back flag: %d\n",
+            op->op == I2C_READ ? "I2C_READ" : "I2C_WRITE", i, op->reg_addr, op->reg_val, op->read_back);
+        ret = handle_operation(client, op);
+        if (ret < 0) {
+            WB_MAC_BSC_ERROR("handle operation %d failed, ret: %d\n", i, ret);
+            return ret;
+        }
+        if (op->op == I2C_READ) {
+            val_tmp = op->reg_val;
         }
-    }
-
-    return -1;
-}
-
-static sensor_reg_t * find_reg_offset(int type, int index)
-{
-    int i;
-    int type_index;
-    int ret;
 
-    ret = find_reg_type(type, &type_index);
-    if (ret < 0) {
-        DBG_ERROR("find_reg_type failed, ret = %d\n", ret);
-        return NULL;
+        if (i == dev_params->sbus_error_op) {
+            if (val_tmp & dev_params->sbus_error_mask) {
+                WB_MAC_BSC_ERROR("SBUS error seen, status value: 0x%x\n", op->reg_val);
+                return -EIO;
+            }
+            WB_MAC_BSC_DEBUG("Error status check ok, status: 0x%x, error_mask: 0x%x \n",
+                val_tmp, dev_params->sbus_error_mask);
+        }
     }
 
-    for (i = 0; i < MAC_TEMP_NUM; i++) {
-        if (mac_temp_reg[type_index].sensor_reg[i].id == index) {
-            return &(mac_temp_reg[type_index].sensor_reg[i]);
-        }
+    if (val_tmp == reg_addr) {
+        WB_MAC_BSC_ERROR("get mac register error, register value: 0x%x equal to reg_addr: 0x%x\n",
+            val_tmp, reg_addr);
+        return -EIO;
     }
 
-    return NULL;
+    *reg_value = val_tmp;
+    WB_MAC_BSC_DEBUG("get_mac_reg success, reg_addr: 0x%x, reg_value: 0x%x", reg_addr, *reg_value);
+    return 0;
 }
 
-static int get_mactemp(struct i2c_client *client, int index, int *temp)
+static int read_vtmon(struct i2c_client *client, uint8_t vtmon, int *temp)
 {
+    struct mac_data *data;
+    dev_params_t *dev_params;
+    uint32_t reg_addr, reg_val;
+    uint32_t vtmon_val;
     int ret;
-    int reg_value;
 
-    if (index == 0) {
-        DBG_ERROR("invalid index\n");
+    data = i2c_get_clientdata(client);
+    dev_params = &data->dev_param;
+
+    if (vtmon >= dev_params->vtmon_instances) {
+        WB_MAC_BSC_ERROR("VTMON index [%d] greater or equal to VTMON instance number: %d\n",
+            vtmon, dev_params->vtmon_instances);
         return -1;
     }
-
-    ret = getmac_register(client, index, &reg_value);
+    reg_addr = dev_params->vtmon_reg_addrs[vtmon];
+    ret = get_mac_reg(client, reg_addr, &reg_val);
     if (ret < 0) {
-        DBG_ERROR("getmac_register failed, ret = %d\n", ret);
+        WB_MAC_BSC_ERROR("Read VTMON[%d] failed, reg_addr: 0x%x, ret: %d\n",
+            vtmon, reg_addr, ret);
         return ret;
     }
-    DBG_DEBUG("reg_value = 0x%x \n", reg_value);
 
-    ret = mac_calcute(reg_value, temp);
-    if (ret < 0) {
-        DBG_ERROR("mac_calcute failed, ret = %d\n", ret);
-        return ret;
-    }
+    vtmon_val = reg_val & ((1 << dev_params->vtmon_data_width) - 1);
+    *temp = ((dev_params->vtmon_scalar * vtmon_val) + dev_params->vtmon_offset) / 10;
 
+    if ((*temp / 1000 < -40) || (*temp / 1000 > 120)) {
+        WB_MAC_BSC_ERROR("MAC temp invalid, vtmon: %d, temp: %d\n", vtmon, *temp);
+        return -EINVAL;
+    }
+    WB_MAC_BSC_DEBUG("Read mac temp success, index: %d, value: %d\n", vtmon + 1, *temp);
     return 0;
 }
 
@@ -454,76 +536,44 @@ static ssize_t show_mac_temp(struct device *dev, struct device_attribute *da, ch
 {
     struct mac_data *data = dev_get_drvdata(dev);
     struct i2c_client *client = data->client;
-    u32 index_value = to_sensor_dev_attr_2(da)->index;
-    sensor_reg_t *t;
-    int result = 0;
-    int temp = -MAC_TEMP_INVALID;
+    u32 temp_index = to_sensor_dev_attr(da)->index;
+    int ret, temp;
 
     mutex_lock(&data->update_lock);
-    t = find_reg_offset(mac_pcie_id, index_value);
-    if (t == NULL) {
+    ret = read_vtmon(client, temp_index - 1, &temp);
+    if (ret < 0) {
         temp = -MAC_TEMP_INVALID;
-        DBG_ERROR("find_reg_offset failed, mac_pcie_id = %d, index_value = %d\n", mac_pcie_id, index_value);
-    } else {
-        result = get_mactemp(client, t->reg, &temp);
-        if (result < 0) {
-            temp = -MAC_TEMP_INVALID;
-            DBG_ERROR("get_mactemp failed, ret = %d\n", result);
-        }
+        WB_MAC_BSC_ERROR("get_mactemp index: %d failed, ret = %d\n", temp_index, ret);
     }
-
     mutex_unlock(&data->update_lock);
-    return snprintf(buf, MAC_SIZE, "%d\n", temp);
+    return snprintf(buf, PAGE_SIZE, "%d\n", temp);
 }
 
 static ssize_t show_mac_max_temp(struct device *dev, struct device_attribute *da, char *buf)
 {
     struct mac_data *data = dev_get_drvdata(dev);
     struct i2c_client *client = data->client;
-    int i;
-    int result;
-    int temp = -MAC_TEMP_INVALID;
-    int type_index;
-    int tmp;
+    dev_params_t *dev_params;
+    int i, ret;
+    int tmp, temp;
 
     mutex_lock(&data->update_lock);
 
-    result = find_reg_type(mac_pcie_id, &type_index);
-    if (result < 0) {
-        DBG_ERROR("find_reg_type failed, ret = %d\n", result);
-        goto exit;
-    }
-
-    for (i = 0; i < MAC_TEMP_NUM; i++) {
-        result = get_mactemp(client, mac_temp_reg[type_index].sensor_reg[i].reg, &tmp);
-        if (result < 0) {
-            DBG_ERROR("get_mactemp failed, ret = %d\n", result);
+    dev_params = &data->dev_param;
+    temp = -MAC_TEMP_INVALID;
+    for (i = 0; i < dev_params->vtmon_instances ; i++) {
+        ret = read_vtmon(client, i, &tmp);
+        if (ret < 0) {
+            WB_MAC_BSC_ERROR("Get mactemp failed, temp index: %d, ret = %d\n",
+                i, ret);
             tmp = -MAC_TEMP_INVALID;
         }
 
         temp = (temp > tmp) ? temp : tmp;
     }
 
-exit:
     mutex_unlock(&data->update_lock);
-    return snprintf(buf, MAC_SIZE, "%d\n", temp);
-}
-
-static int mac_bsc_init(struct i2c_client *client)
-{
-    int ret;
-    int reg_value;
-    int mac_id = 0;
-
-    ret = getmac_register(client, MAC_ID_REG, &reg_value);
-    if (ret < 0) {
-        DBG_ERROR("getmac_register failed, ret = %d\n", ret);
-        return ret;
-    }
-
-    DBG_DEBUG("reg_value = 0x%x \n", reg_value);
-    mac_id = reg_value & 0xffff;
-    return mac_id;
+    return snprintf(buf, PAGE_SIZE, "%d\n", temp);
 }
 
 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_mac_temp, NULL, MAC_TEMP_INDEX1);
@@ -564,85 +614,220 @@ static struct attribute *mac_hwmon_attrs[] = {
 };
 ATTRIBUTE_GROUPS(mac_hwmon);
 
-static int init_bcs_command(int mac_type) {
-    int ret;
+static void mac_bsc_setup(struct i2c_client *client)
+{
+    int i, ret;
+    struct mac_data *data;
+    dev_params_t *dev_params;
+    uint32_t reg_value;
+
+    data = i2c_get_clientdata(client);
+    dev_params = &data->dev_param;
+
+    for (i = 0; i < dev_params->sbus_setup_ops; i++) {
+        ret = bsc_i2c_read(client, dev_params->sbus_setup[i].reg_addr, &reg_value);
+        if ((ret < 0) || (reg_value != dev_params->sbus_setup[i].reg_val)) {
+            WB_MAC_BSC_DEBUG("bsc setup op%d, ret: %d, reg_addr: 0x%x, read value: 0x%x not equal to set value: 0x%x\n",
+                i, ret, dev_params->sbus_setup[i].reg_addr, reg_value, dev_params->sbus_setup[i].reg_val);
+            bsc_i2c_write(client, dev_params->sbus_setup[i].reg_addr, dev_params->sbus_setup[i].reg_val);
+        } else {
+            WB_MAC_BSC_DEBUG("bsc setup op%d, reg_addr: 0x%x, read value: 0x%x equal to set value: 0x%x\n",
+                i, dev_params->sbus_setup[i].reg_addr, reg_value, dev_params->sbus_setup[i].reg_val);
+        }
+    }
+    return;
+}
+
+static int mac_bsc_init(struct i2c_client *client)
+{
+    int ret, mac_id;
+    uint32_t reg_value;
 
-    ret = 0;
-    switch (mac_type) {
-        case TD3:
-            step2_buf2[5] = 0x38;
-            break;
-        case TH3:
-        case TH4:
-        case TD4:
-        case TD4_X9:
-        case TD4_X9_8:
-            step2_buf2[5] = 0x40;
-            break;
-        default:
-            ret = -1;
-            break;
+    ret = get_mac_reg(client, MAC_ID_REG, &reg_value);
+    if (ret < 0) {
+        WB_MAC_BSC_ERROR("Get MAC ID failed, reg_addr: 0x%x, ret = %d\n",
+            MAC_ID_REG, ret);
+        return ret;
     }
-    return ret;
+
+    WB_MAC_BSC_DEBUG("Get MAC ID success, reg_addr: 0x%x, value: 0x%x \n",
+        MAC_ID_REG, reg_value);
+    mac_id = reg_value & 0xffff;
+    return mac_id;
 }
 
-static int mac_probe(struct i2c_client *client, const struct i2c_device_id *id)
+static int find_mac_config(int type, int *index)
 {
-    struct mac_data *data;
-    int mac_type;
-    int ret;
+    int i, size;
 
-    mac_type = id->driver_data;
-    mac_pcie_id = mac_type;
-    if (init_bcs_command(mac_type) < 0) {
-        DBG_ERROR("mactype[%x] not support \n", mac_type);
+    size = ARRAY_SIZE(mac_temp_conf);
+    for (i = 0; i < size; i++) {
+        if (mac_temp_conf[i].mac_id == type) {
+            *index = i;
+            return 0;
+        }
+    }
+    return -1;
+}
+
+static int mac_bsc_config_check(dev_params_t *dev_params)
+{
+    i2c_op_t *last_op;
+    i2c_op_t *err_op;
+    i2c_op_t *addr_op;
+
+    /* vtmon_instances should not more than the MAC_BSC_MAX_TEMP_NUM */
+    if ((dev_params->vtmon_instances > MAC_BSC_MAX_TEMP_NUM) ||
+        (dev_params->vtmon_instances <= 0)) {
+        WB_MAC_BSC_ERROR("VTMON instance number %d more than the max number: %d\n",
+            dev_params->vtmon_instances, MAC_BSC_MAX_TEMP_NUM);
         return -1;
-    };
+    }
 
-    if (mac_type == TD4) {
-        ret = mac_bsc_init(client);
-        if (ret < 0) {
-            DBG_ERROR("mac_bsc_init failed, ret = %d\n", ret);
+    /* vtmon read operation steps should not more than the MAC_BSC_MAX_READ_REG_STEP */
+    if ((dev_params->vtmon_read_ops > MAC_BSC_MAX_READ_REG_STEP) ||
+        (dev_params->vtmon_read_ops <=0)) {
+        WB_MAC_BSC_ERROR("VTMON read ops number %d more than the max step: %d\n",
+            dev_params->vtmon_read_ops, MAC_BSC_MAX_READ_REG_STEP);
+        return -1;
+    }
+
+    /* the last operation must be I2C_READ to get temperature register value */
+    last_op = &dev_params->vtmon_read[dev_params->vtmon_read_ops - 1];
+    if (last_op->op != I2C_READ) {
+        WB_MAC_BSC_ERROR("VTMON read ops config error, last operation not I2C_READ, last step: %d, op_code: %d\n",
+            dev_params->vtmon_read_ops - 1, last_op->op);
+        return -1;
+    }
+
+    /* the address operation steps should not more than the vtmon_read_ops and not the last step */
+    if ((dev_params->sbus_addr_op >= (dev_params->vtmon_read_ops - 1)) ||
+        (dev_params->sbus_addr_op < 0)) {
+        WB_MAC_BSC_ERROR("VTMON addr op step invalid, index %d, read ops: %d\n",
+            dev_params->sbus_addr_op, dev_params->vtmon_read_ops);
+        return -1;
+    }
+
+    /* the address operation must be I2C_WRITE to set temperature register address */
+    addr_op = &dev_params->vtmon_read[dev_params->sbus_addr_op];
+    if (addr_op->op != I2C_WRITE) {
+        WB_MAC_BSC_ERROR("VTMON addr op config error, addr operation not I2C_WRITE, addr op step: %d, op_code: %d\n",
+            dev_params->sbus_addr_op, addr_op->op);
+        return -1;
+    }
+
+    /* the error status operation steps should not more than the vtmon_read_ops and not the last step */
+    if (dev_params->sbus_error_op >= (dev_params->vtmon_read_ops - 1)) {
+        WB_MAC_BSC_ERROR("VTMON error op step invalid, index %d, read ops: %d\n",
+            dev_params->sbus_error_op, dev_params->vtmon_read_ops);
+        return -1;
+    }
+
+    /* if error status operation exist, it must be I2C_READ to get error status register */
+    if (dev_params->sbus_error_op >=0) {
+        err_op = &dev_params->vtmon_read[dev_params->sbus_error_op];
+        if (err_op->op != I2C_READ) {
+            WB_MAC_BSC_ERROR("VTMON error op config error, error operation not I2C_READ, error op step: %d, op_code: %d\n",
+                dev_params->sbus_error_op, err_op->op);
             return -1;
         }
-        mac_type = ret;
-        mac_pcie_id = mac_type;
+    }
+    WB_MAC_BSC_DEBUG("dev_params check ok, instance number: %d, read_ops: %d, addr_op: %d, error_op: %d\n",
+        dev_params->vtmon_instances, dev_params->vtmon_read_ops,
+        dev_params->sbus_addr_op, dev_params->sbus_error_op);
+    return 0;
+}
+
+static int mac_probe(struct i2c_client *client, const struct i2c_device_id *id)
+{
+    struct mac_data *data;
+    int ret, mac_id, index;
+
+    WB_MAC_BSC_DEBUG("=========mac_probe(%d-%04x)===========\n",
+        client->adapter->nr, client->addr);
+
+    if (!client->adapter->algo->master_xfer) {
+        dev_err(&client->adapter->dev, "I2C level transfers not supported\n");
+        return -EOPNOTSUPP;
     }
 
-    DBG_DEBUG("=========mac_probe(%x)===========\n",client->addr);
-    DBG_DEBUG("mac_type: %x\n", mac_type);
     data = devm_kzalloc(&client->dev, sizeof(struct mac_data), GFP_KERNEL);
     if (!data) {
+        dev_err(&client->dev, "Failed to devm_kzalloc.\n");
         return -ENOMEM;
     }
 
     data->client = client;
     i2c_set_clientdata(client, data);
-    mutex_init(&data->update_lock);
 
+    mac_id = id->driver_data;
+    ret = find_mac_config(mac_id, &index);
+    if (ret < 0) {
+        dev_err(&client->dev, "Failed to find mac config, mac id from driver_data: 0x%x\n", mac_id);
+        return -EINVAL;
+    }
+    data->dev_param = mac_temp_conf[index];
+    ret = mac_bsc_config_check(&data->dev_param);
+    if (ret < 0) {
+        dev_err(&client->dev, "Invalid config parameter, mac id: 0x%x, config index: %d\n",
+            mac_id, index);
+        return -EINVAL;
+    }
+
+    mac_bsc_setup(client);
+
+    if (mac_id == TD4) {
+        ret = mac_bsc_init(client);
+        if (ret < 0) {
+            dev_err(&client->dev, "Failed to get mac id, ret: %d\n", ret);
+            return -EIO;
+        }
+        mac_id = ret;
+        ret = find_mac_config(mac_id, &index);
+        if (ret < 0) {
+            dev_err(&client->dev, "Failed to find mac config, mac id from chip: 0x%x\n", mac_id);
+            return -EINVAL;
+        }
+        data->dev_param = mac_temp_conf[index];
+        ret = mac_bsc_config_check(&data->dev_param);
+        if (ret < 0) {
+            dev_err(&client->dev, "Invalid config parameter, mac id: 0x%x, config index: %d\n",
+                mac_id, index);
+            return -EINVAL;
+        }
+    }
+
+    WB_MAC_BSC_DEBUG("mac_id: 0x%x, config index: %d\n", mac_id, index);
+
+    mutex_init(&data->update_lock);
     data->hwmon_dev = hwmon_device_register_with_groups(&client->dev, client->name, data, mac_hwmon_groups);
-	if (IS_ERR(data->hwmon_dev)) {
+    if (IS_ERR(data->hwmon_dev)) {
+        dev_err(&client->dev, "Failed to register mac bsc hwmon\n");
         return PTR_ERR(data->hwmon_dev);
     }
 
+    dev_info(&client->dev, "Register mac bsc %x with %d vtmon instance number success\n",
+        mac_id, data->dev_param.vtmon_instances);
     return 0;
 }
 
 static int mac_remove(struct i2c_client *client)
 {
     struct mac_data *data = i2c_get_clientdata(client);
+
     hwmon_device_unregister(data->hwmon_dev);
     return 0;
 }
 
-static const struct i2c_device_id mac_id[] = {
+static const struct i2c_device_id mac_id_table[] = {
     { "wb_mac_bsc_td3", TD3 },
+    { "wb_mac_bsc_td3_x2", TD3_X2 },
     { "wb_mac_bsc_td4", TD4 },
     { "wb_mac_bsc_th3", TH3 },
     { "wb_mac_bsc_th4", TH4 },
     {}
 };
-MODULE_DEVICE_TABLE(i2c, mac_id);
+MODULE_DEVICE_TABLE(i2c, mac_id_table);
 
 static struct i2c_driver wb_mac_bsc_driver = {
     .driver = {
@@ -650,7 +835,7 @@ static struct i2c_driver wb_mac_bsc_driver = {
     },
     .probe      = mac_probe,
     .remove     = mac_remove,
-    .id_table   = mac_id,
+    .id_table   = mac_id_table,
 };
 
 module_i2c_driver(wb_mac_bsc_driver);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.c
index 3fe1c4aa10f5..092c99da2ad8 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_platform_i2c_dev.c
@@ -134,7 +134,7 @@ static int transfer_read(struct platform_i2c_dev_info *i2c_dev, u8 *buf, loff_t
                                     I2C_SMBUS_READ,
                                     offset, I2C_SMBUS_I2C_BLOCK_DATA, &data);
                     if (ret) {
-                        I2C_DEV_DEBUG_ERROR("smbus_xfer read block error, ret = %d\r\n", ret);
+                        I2C_DEV_DEBUG_ERROR("smbus_xfer read block error, ret = %d\n", ret);
                         ret = -EFAULT;
                         goto error_exit;
                     }
@@ -151,7 +151,7 @@ static int transfer_read(struct platform_i2c_dev_info *i2c_dev, u8 *buf, loff_t
                     if (!ret) {
                         buf[j] = data.byte;
                     } else {
-                        I2C_DEV_DEBUG_ERROR("smbus_xfer read byte error, ret = %d\r\n", ret);
+                        I2C_DEV_DEBUG_ERROR("smbus_xfer read byte error, ret = %d\n", ret);
                         ret = -EFAULT;
                         goto error_exit;
                     }
@@ -159,7 +159,7 @@ static int transfer_read(struct platform_i2c_dev_info *i2c_dev, u8 *buf, loff_t
                 }
             }
         } else {
-            I2C_DEV_DEBUG_ERROR("smbus_xfer not support addr_bus_width = %d\r\n", i2c_dev->addr_bus_width);
+            I2C_DEV_DEBUG_ERROR("smbus_xfer not support addr_bus_width = %d\n", i2c_dev->addr_bus_width);
             ret = -EINVAL;
             goto error_exit;
         }
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c
index 8c02d981843a..c97288944061 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c
@@ -63,6 +63,7 @@ module_param(g_wb_wdt_error, int, S_IRUGO | S_IWUSR);
 enum {
     HW_ALGO_TOGGLE,
     HW_ALGO_LEVEL,
+    HW_ALGO_EIGENVALUES,
 };
 
 enum {
@@ -72,7 +73,6 @@ enum {
 };
 
 typedef struct wb_wdt_priv_s {
-
     struct task_struct *thread;
     struct hrtimer hrtimer;
     ktime_t   m_kt;
@@ -89,7 +89,13 @@ typedef struct wb_wdt_priv_s {
     uint32_t    timeleft_cfg_reg;
     uint32_t    hw_margin;
     uint32_t    feed_time;
+    uint8_t     timer_accuracy_reg_flag;
+    uint32_t    timer_accuracy_reg;
+    uint8_t     timer_accuracy_reg_val;
     uint32_t    timer_accuracy;
+    uint8_t     timer_update_reg_flag;
+    uint32_t    timer_update_reg;
+    uint8_t     timer_update_reg_val;
     gpio_wdt_info_t     gpio_wdt;
     logic_wdt_info_t    logic_wdt;
     struct device *dev;
@@ -297,7 +303,7 @@ static void wdt_hwping(wb_wdt_priv_t *priv)
                 WDT_ERROR("logic toggle wdt write failed.ret = %d\n", ret);
             }
             WDT_VERBOSE("logic toggle wdt work.\n");
-        break;
+            break;
         case HW_ALGO_LEVEL:
             tmp_val = !logic_wdt->active_val;
             ret = wb_wdt_write(logic_wdt->logic_func_mode, logic_wdt->feed_dev_name,
@@ -313,6 +319,17 @@ static void wdt_hwping(wb_wdt_priv_t *priv)
             }
             WDT_VERBOSE("logic level wdt work.\n");
             break;
+        case HW_ALGO_EIGENVALUES:
+            ret = wb_wdt_write(logic_wdt->logic_func_mode, logic_wdt->feed_dev_name,
+                        logic_wdt->feed_reg, &logic_wdt->active_val, ONE_BYTE);
+            if (ret < 0) {
+                WDT_ERROR("logic eigenvalues wdt write failed, path: %s, mode: %d, reg: 0x%x, val: 0x%x, ret: %d\n",
+                    logic_wdt->feed_dev_name, logic_wdt->logic_func_mode, logic_wdt->feed_reg,
+                    logic_wdt->active_val, ret);
+            }
+            WDT_VERBOSE("logic eigenvalues wdt work, path: %s, mode: %d, reg: 0x%x, val: 0x%x\n",
+                logic_wdt->feed_dev_name, logic_wdt->logic_func_mode, logic_wdt->feed_reg, logic_wdt->active_val);
+            break;
         }
     }
     return;
@@ -359,6 +376,16 @@ static int thread_timer_cfg(wb_wdt_priv_t *priv, wb_wdt_device_t *wb_wdt_device)
         return -EINVAL;
     }
 
+    if (priv->timer_accuracy_reg_flag != 0) {
+        ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                    priv->timer_accuracy_reg, &priv->timer_accuracy_reg_val, ONE_BYTE);
+        if (ret < 0) {
+            dev_err(priv->dev, "set timer_accuracy_reg error, reg_addr: 0x%x, value: 0x%x, ret: %d.\n",
+                priv->timer_accuracy_reg, priv->timer_accuracy_reg_val, ret);
+            return ret;
+        }
+    }
+
     set_time_val = hw_margin / accuracy;
     ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
                 priv->timeout_cfg_reg, &set_time_val, ONE_BYTE);
@@ -366,6 +393,17 @@ static int thread_timer_cfg(wb_wdt_priv_t *priv, wb_wdt_device_t *wb_wdt_device)
         dev_err(dev, "set wdt thread timer reg error.\n");
         return ret;
     }
+
+    if (priv->timer_update_reg_flag != 0) {
+        ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                    priv->timer_update_reg, &priv->timer_update_reg_val, ONE_BYTE);
+        if (ret < 0) {
+            dev_err(priv->dev, "set timer_update_reg error,  reg_addr: 0x%x, value: 0x%x, ret: %d.\n",
+                priv->timer_update_reg, priv->timer_update_reg_val, ret);
+            return ret;
+        }
+    }
+
     return 0;
 }
 
@@ -457,6 +495,16 @@ static int hrtimer_cfg(wb_wdt_priv_t *priv, wb_wdt_device_t *wb_wdt_device)
     hrtimer_ns = (feed_time % MS_TO_S) * MS_TO_NS;
     set_time_val = hw_margin / accuracy;
 
+    if (priv->timer_accuracy_reg_flag != 0) {
+        ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                    priv->timer_accuracy_reg, &priv->timer_accuracy_reg_val, ONE_BYTE);
+        if (ret < 0) {
+            dev_err(priv->dev, "set timer_accuracy_reg error, reg_addr: 0x%x, value: 0x%x, ret: %d.\n",
+                priv->timer_accuracy_reg, priv->timer_accuracy_reg_val, ret);
+            return ret;
+        }
+    }
+
     ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
                 priv->timeout_cfg_reg, &set_time_val, ONE_BYTE);
     if (ret < 0) {
@@ -464,6 +512,16 @@ static int hrtimer_cfg(wb_wdt_priv_t *priv, wb_wdt_device_t *wb_wdt_device)
         return ret;
     }
 
+    if (priv->timer_update_reg_flag != 0) {
+        ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                    priv->timer_update_reg, &priv->timer_update_reg_val, ONE_BYTE);
+        if (ret < 0) {
+            dev_err(priv->dev, "set timer_update_reg error,  reg_addr: 0x%x, value: 0x%x, ret: %d.\n",
+                priv->timer_update_reg, priv->timer_update_reg_val, ret);
+            return ret;
+        }
+    }
+
     priv->m_kt = ktime_set(hrtimer_s, hrtimer_ns);
     hrtimer_init(hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
     hrtimer->function = hrtimer_hwping;
@@ -529,6 +587,16 @@ static int wb_wdt_set_timeout(struct watchdog_device *wdd, unsigned int t)
         return -EINVAL;
     }
 
+    if (priv->timer_accuracy_reg_flag != 0) {
+        ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                    priv->timer_accuracy_reg, &priv->timer_accuracy_reg_val, ONE_BYTE);
+        if (ret < 0) {
+            WDT_ERROR("set timer_accuracy_reg error, reg_addr: 0x%x, value: 0x%x, ret: %d.\n",
+                priv->timer_accuracy_reg, priv->timer_accuracy_reg_val, ret);
+            return ret;
+        }
+    }
+
     set_time_val = timeout_ms / accuracy;
     ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
                 priv->timeout_cfg_reg, &set_time_val, ONE_BYTE);
@@ -536,6 +604,17 @@ static int wb_wdt_set_timeout(struct watchdog_device *wdd, unsigned int t)
         WDT_ERROR("set wdt timeout reg error, set_time_val:%u ret:%d\n", set_time_val, ret);
         return ret;
     }
+
+    if (priv->timer_update_reg_flag != 0) {
+        ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                    priv->timer_update_reg, &priv->timer_update_reg_val, ONE_BYTE);
+        if (ret < 0) {
+            WDT_ERROR("set timer_update_reg error,  reg_addr: 0x%x, value: 0x%x, ret: %d.\n",
+                priv->timer_update_reg, priv->timer_update_reg_val, ret);
+            return ret;
+        }
+    }
+
     wdd->timeout = t;
 
     return 0;
@@ -590,6 +669,16 @@ static int watchdog_device_cfg(wb_wdt_priv_t *priv)
         return -ENXIO;
     }
 
+    if (priv->timer_accuracy_reg_flag != 0) {
+        ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                    priv->timer_accuracy_reg, &priv->timer_accuracy_reg_val, ONE_BYTE);
+        if (ret < 0) {
+            dev_err(priv->dev, "set timer_accuracy_reg error, reg_addr: 0x%x, value: 0x%x, ret: %d.\n",
+                priv->timer_accuracy_reg, priv->timer_accuracy_reg_val, ret);
+            return ret;
+        }
+    }
+
     set_time_val = priv->hw_margin / priv->timer_accuracy;
     ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
                 priv->timeout_cfg_reg, &set_time_val, ONE_BYTE);
@@ -598,6 +687,16 @@ static int watchdog_device_cfg(wb_wdt_priv_t *priv)
         return ret;
     }
 
+    if (priv->timer_update_reg_flag != 0) {
+        ret = wb_wdt_write(priv->priv_func_mode, priv->config_dev_name,
+                    priv->timer_update_reg, &priv->timer_update_reg_val, ONE_BYTE);
+        if (ret < 0) {
+            dev_err(priv->dev, "set timer_update_reg error,  reg_addr: 0x%x, value: 0x%x, ret: %d.\n",
+                priv->timer_update_reg, priv->timer_update_reg_val, ret);
+            return ret;
+        }
+    }
+
     watchdog_set_drvdata(&priv->wdd, priv);
 
     priv->wdd.info         = &wb_wdt_ident;
@@ -844,6 +943,44 @@ static int wb_wdt_probe(struct platform_device *pdev)
 
         priv->timeleft_cfg_reg = priv->timeout_cfg_reg;
         of_property_read_u32(pdev->dev.of_node,"timeleft_cfg_reg", &priv->timeleft_cfg_reg);
+
+        /* timer accuracy register is optional */
+        ret = of_property_read_u8(pdev->dev.of_node,"timer_accuracy_reg_flag", &priv->timer_accuracy_reg_flag);
+        if (ret < 0) {
+            /* case: don't has timer_accuracy_reg */
+            dev_dbg(&pdev->dev, "Failed to get property in dts: timer_accuracy_reg_flag.\n");
+            priv->timer_accuracy_reg_flag = 0;
+        } else {
+            ret = of_property_read_u32(pdev->dev.of_node, "timer_accuracy_reg", &priv->timer_accuracy_reg);
+            if (ret < 0) {
+                dev_err(&pdev->dev, "Failed to get timer accuracy register address.\n");
+                return -ENXIO;
+            }
+            ret = of_property_read_u8(pdev->dev.of_node, "timer_accuracy_reg_val", &priv->timer_accuracy_reg_val);
+            if (ret < 0) {
+                dev_err(&pdev->dev, "Failed to get timer accuracy register value.\n");
+                return -ENXIO;
+            }
+        }
+
+        /* timer update register is optional */
+        ret = of_property_read_u8(pdev->dev.of_node,"timer_update_reg_flag", &priv->timer_update_reg_flag);
+        if (ret < 0) {
+            /* case: don't has timer_update_reg */
+            dev_dbg(&pdev->dev, "Failed to get property in dts: timer_update_reg_flag.\n");
+            priv->timer_update_reg_flag = 0; /* no timer update register */
+        } else {
+            ret = of_property_read_u32(pdev->dev.of_node, "timer_update_reg", &priv->timer_update_reg);
+            if (ret < 0) {
+                dev_err(&pdev->dev, "Failed to get timer update register address.\n");
+                return -ENXIO;
+            }
+            ret = of_property_read_u8(pdev->dev.of_node, "timer_update_reg_val", &priv->timer_update_reg_val);
+            if (ret < 0) {
+                dev_err(&pdev->dev, "Failed to get timer update register value.\n");
+                return -ENXIO;
+            }
+        }
     } else {
         if (pdev->dev.platform_data == NULL) {
             dev_err(&pdev->dev, "Failed to get platform data config.\n");
@@ -864,12 +1001,20 @@ static int wb_wdt_probe(struct platform_device *pdev)
         priv->feed_wdt_type = wb_wdt_device->feed_wdt_type;
         priv->sysfs_index = wb_wdt_device->sysfs_index;
         priv->timeleft_cfg_reg = wb_wdt_device->timeleft_cfg_reg;
+        priv->timer_accuracy_reg_flag = wb_wdt_device->timer_accuracy_reg_flag;
+        priv->timer_accuracy_reg = wb_wdt_device->timer_accuracy_reg;
+        priv->timer_accuracy_reg_val = wb_wdt_device->timer_accuracy_reg_val;
+        priv->timer_update_reg_flag = wb_wdt_device->timer_update_reg_flag;
+        priv->timer_update_reg = wb_wdt_device->timer_update_reg;
+        priv->timer_update_reg_val = wb_wdt_device->timer_update_reg_val;
     }
 
     if (!strcmp(algo, "toggle")) {
         priv->hw_algo = HW_ALGO_TOGGLE;
     } else if (!strcmp(algo, "level")) {
         priv->hw_algo = HW_ALGO_LEVEL;
+    } else if (!strcmp(algo, "eigenvalues")) {
+        priv->hw_algo = HW_ALGO_EIGENVALUES;
     } else {
         dev_err(&pdev->dev, "hw_algo config error.must be toggle or level.\n");
         return -EINVAL;
@@ -877,8 +1022,12 @@ static int wb_wdt_probe(struct platform_device *pdev)
 
     WDT_VERBOSE("config_dev_name:%s, config_mode:%u, priv_func_mode:%u, enable_reg:0x%x, timeout_cfg_reg:0x%x\n",
         priv->config_dev_name, priv->config_mode, priv->priv_func_mode, priv->enable_reg, priv->timeout_cfg_reg);
-    WDT_VERBOSE("timeout_cfg_reg:0x%x, enable_val:%u, disable_val:%u, enable_mask:%u, hw_margin:%u, feed_wdt_type:%u\n",
+    WDT_VERBOSE("timeout_cfg_reg:0x%x, enable_val:0x%x, disable_val:0x%x, enable_mask:0x%x, hw_margin:%u, feed_wdt_type:%u\n",
         priv->timeleft_cfg_reg, priv->enable_val, priv->disable_val, priv->enable_mask, priv->hw_margin, priv->feed_wdt_type);
+    WDT_VERBOSE("timer_accuracy_reg_flag: %d, timer_accuracy_reg: 0x%x, timer_accuracy_reg_val: 0x%x, timer_accuracy: %d\n",
+        priv->timer_accuracy_reg_flag, priv->timer_accuracy_reg, priv->timer_accuracy_reg_val, priv->timer_accuracy);
+    WDT_VERBOSE("timer_update_reg_flag: %d, timer_update_reg: 0x%x, timer_update_reg_val: 0x%x\n", priv->timer_update_reg_flag,
+        priv->timer_update_reg, priv->timer_update_reg_val);
 
     priv->dev = &pdev->dev;
     if (priv->config_mode == GPIO_FEED_WDT_MODE) {
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.h
index 10c30e13f94c..d45904ba32ea 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.h
@@ -4,6 +4,7 @@
 #include <linux/of_gpio.h>
 
 #define SYSFS_NO_CFG         (0xff)
+#define INVALID_REG_ADDR     (0xffffffff)
 
 typedef struct gpio_wdt_info_s {
     int       gpio;
@@ -35,7 +36,13 @@ typedef struct wb_wdt_device_s {
     uint32_t    timeleft_cfg_reg;
     uint32_t    hw_margin;
     uint32_t    feed_time;
+    uint8_t     timer_accuracy_reg_flag;
+    uint32_t    timer_accuracy_reg;
+    uint8_t     timer_accuracy_reg_val;
     uint32_t    timer_accuracy;
+    uint8_t     timer_update_reg_flag;
+    uint32_t    timer_update_reg;
+    uint8_t     timer_update_reg_val;
     union {
         gpio_wdt_info_t gpio_wdt;
         logic_wdt_info_t logic_wdt;
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/generate_airflow.py b/platform/broadcom/sonic-platform-modules-micas/common/script/generate_airflow.py
index 29d18e7b2688..89d3e72335ff 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/generate_airflow.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/generate_airflow.py
@@ -21,6 +21,7 @@
 from platform_config import AIR_FLOW_CONF, AIRFLOW_RESULT_FILE
 from platform_util import dev_file_read, byteTostr
 from eepromutil.fru import ipmifru
+from eepromutil.cust_fru import CustFru
 from eepromutil.fantlv import fan_tlv
 
 
@@ -84,6 +85,21 @@ def get_model_fru(device, eeprom):
     except Exception as e:
         return False, str(e)
 
+def get_model_custfru(device, eeprom):
+    try:
+        custfru = CustFru()
+        custfru.decode(eeprom)
+        dev_name = device.get("name")
+        field = device.get("field")
+        model = getattr(custfru, field, None)
+        if model is None:
+            msg = "%s get model error, field: %s" % (dev_name, field)
+            return False, msg
+        airflow_debug("%s get model success, model: %s" % (dev_name, model))
+        return True, model
+    except Exception as e:
+        return False, str(e)
+
 
 def get_model_fantlv(device, eeprom):
     try:
@@ -107,7 +123,7 @@ def get_model_fantlv(device, eeprom):
 def get_device_modele(device):
     e2_type = device.get("e2_type")
     dev_name = device.get("name")
-    support_e2_type = ("fru", "fantlv")
+    support_e2_type = ("fru", "fantlv", "custfru")
     if e2_type not in support_e2_type:
         msg = "%s unsupport e2_type: %s" % (dev_name, e2_type)
         return False, msg
@@ -122,6 +138,8 @@ def get_device_modele(device):
     binval = byteTostr(binval_bytes)
     if e2_type == "fru":
         return get_model_fru(device, binval)
+    if e2_type == "custfru":
+        return get_model_custfru(device, binval)
     return get_model_fantlv(device, binval)
 
 
@@ -134,7 +152,7 @@ def get_board_air_flow(fan_intake_num, fan_exhaust_num, psu_intake_num, psu_exha
         return "N/A"
 
     if fan_intake_num > fan_exhaust_num:
-        airflow_debug("fan intake number %d more than fan exhaust number %s, set board air flow: intake")
+        airflow_debug("fan intake number more than fan exhaust number, set board air flow: intake")
         return "intake"
 
     if fan_intake_num < fan_exhaust_num:
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py
index 4fe0beec44d5..259a46067f76 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py
@@ -25,6 +25,7 @@
     "INIT_COMMAND_PRE",
     "INIT_PARAM",
     "INIT_COMMAND",
+    "SET_MAC_CONF",
     "MONITOR_TEMP_MIN",
     "MONITOR_K",
     "MONITOR_MAC_IN",
@@ -128,6 +129,9 @@
 INIT_PARAM = []
 INIT_COMMAND = []
 
+# Set eth mac address parameters
+SET_MAC_CONF = []
+
 ################################ fancontrol parameter###################################
 MONITOR_TEMP_MIN = 38
 MONITOR_K = 11
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py
index 004a64c72233..b53136304928 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py
@@ -30,6 +30,7 @@
     "GLOBALINITCOMMAND",
     "GLOBALINITPARAM_PRE",
     "GLOBALINITCOMMAND_PRE",
+    "SET_MAC_CONF",
     "MONITOR_CONST",
     "PSU_FAN_FOLLOW",
     "MONITOR_SYS_LED",
@@ -132,6 +133,9 @@ def getdeviceplatform():
 GLOBALINITPARAM_PRE = module_product.INIT_PARAM_PRE
 GLOBALINITCOMMAND_PRE = module_product.INIT_COMMAND_PRE
 
+# Set eth mac address parameters
+SET_MAC_CONF = module_product.SET_MAC_CONF
+
 ################################ fancontrol parameter###################################
 
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py
index 808d93216210..152dd16a25a6 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py
@@ -3,6 +3,7 @@
 import click
 
 from eepromutil.fru import ipmifru
+from eepromutil.cust_fru import CustFru
 from eepromutil.fantlv import fan_tlv
 import eepromutil.onietlv as ot
 from platform_config import PLATFORM_E2_CONF
@@ -238,6 +239,15 @@ def fru_eeprom_show(eeprom, e2_decode=None):
         print(str(e))
 
 
+def custfru_eeprom_show(eeprom, e2_decode=None):
+    try:
+        custfru = CustFru()
+        custfru.decode(eeprom)
+        print(custfru)
+    except Exception as e:
+        print(str(e))
+
+
 def eeprom_parase(eeprom_conf):
     name = eeprom_conf.get("name")
     e2_type = eeprom_conf.get("e2_type")
@@ -256,6 +266,8 @@ def eeprom_parase(eeprom_conf):
         fru_eeprom_show(binval, e2_decode)
     elif e2_type == "fantlv":
         fantlv_eeprom_show(binval, e2_decode)
+    elif e2_type == "custfru":
+        custfru_eeprom_show(binval, e2_decode)
     else:
         print("Unknow eeprom type: %s" % e2_type)
     return
@@ -363,45 +375,40 @@ def decode_eeprom_info(e2_type, e2_path, e2_size):
 def main():
     '''platform eeprom display script'''
 
-# fan eeprom info display
-
 
+# fan eeprom info display
 @main.command()
 @click.argument('fan_index', required=True)
 def fan(fan_index):
     '''fan_index(1, 2, 3...)/all'''
     get_fans_eeprom_info(fan_index)
 
-# psu eeprom info display
-
 
+# psu eeprom info display
 @main.command()
 @click.argument('psu_index', required=True)
 def psu(psu_index):
     '''psu_index(1, 2, 3...)/all'''
     get_psus_eeprom_info(psu_index)
 
-# slot eeprom info display
-
 
+# slot eeprom info display
 @main.command()
 @click.argument('slot_index', required=True)
 def slot(slot_index):
     '''slot_index(1, 2, 3...)/all'''
     get_slots_eeprom_info(slot_index)
 
-# syseeprom info display
-
 
+# syseeprom info display
 @main.command()
 @click.argument('syseeprom_index', required=True)
 def syseeprom(syseeprom_index):
     '''syseeprom_index(1, 2, 3...)/all'''
     get_syseeprom_info(syseeprom_index)
 
-# fru eeprom info decode
-
 
+# fru eeprom info decode
 @main.command()
 @click.argument('e2_path', required=True)
 @click.argument('e2_size', required=False, default="256")
@@ -409,9 +416,8 @@ def fru(e2_path, e2_size):
     '''e2_path'''
     decode_eeprom_info("fru", e2_path, e2_size)
 
-# fantlv eeprom info decode
-
 
+# fantlv eeprom info decode
 @main.command()
 @click.argument('e2_path', required=True)
 @click.argument('e2_size', required=False, default="256")
@@ -419,9 +425,8 @@ def fantlv(e2_path, e2_size):
     '''e2_path'''
     decode_eeprom_info("fantlv", e2_path, e2_size)
 
-# onie_tlv eeprom info decode
-
 
+# onie_tlv eeprom info decode
 @main.command()
 @click.argument('e2_path', required=True)
 @click.argument('e2_size', required=False, default="256")
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_intf.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_intf.py
index 2143b9420cd3..43f36f040d6a 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_intf.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_intf.py
@@ -76,14 +76,31 @@ def get_dev_path(self, dev_type, dev_id):
 
     def get_port_path(self, port):
         port_num = self.__port_optoe_dict.get("port_num", 0)
-        optoe_start_bus = self.__port_optoe_dict.get("optoe_start_bus", 0)
-        if port_num <= 0 or optoe_start_bus <= 0:
-            msg = "PLATFORM_INTF_OPTOE config error!"
+        if port_num <= 0:
+            msg = "PLATFORM_INTF_OPTOE port_num config error, port_num: %d!" % port_num
             return False, msg
+
         if port <= 0 or port > port_num:
             msg = "port out of range !"
             return False, msg
-        path = OPTOE_PATH % (port + optoe_start_bus - 1)
+
+        port_bus_map = self.__port_optoe_dict.get("port_bus_map")
+        optoe_start_bus = self.__port_optoe_dict.get("optoe_start_bus", 0)
+        if port_bus_map is None: # get port bus by optoe_start_bus
+            if optoe_start_bus <= 0:
+                msg = "PLATFORM_INTF_OPTOE optoe_start_bus config error, optoe_start_bus: %d" % optoe_start_bus
+                return False, msg
+            port_bus = port + optoe_start_bus - 1
+        else: # get port bus by port_bus_map
+            port_bus = port_bus_map.get(port)
+            if port_bus is None:
+                msg = "port %d don't has i2c bus" % port
+                return False, msg
+            if not isinstance(port_bus, int) or port_bus < 0:
+                msg = "port %d i2c bus config error, port_bus: %s " % port_bus
+                return False, msg
+
+        path = OPTOE_PATH % (port_bus)
         platform_intf_debug("path:%s" % path)
         return True, path
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py
index 1727242b74b9..d5b72f48f51b 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py
@@ -145,19 +145,19 @@ def print_fan_sensor():
     toptile = "Onboard fan Sensors:"
     errformat = "    {id} : {errmsg}\n"  # "    {id:<20} : {errmsg}"
     fan_signle_rotor_format = "    {id} : \n"  \
-        "        fan_type  :{fan_type}\n"  \
-        "        sn        :{sn}\n"  \
-        "        hw_version:{hw_version}\n"  \
-        "        Speed     :{Speed} RPM\n"     \
-        "        status    :{errmsg} \n"
+        "        fan_type  : {fan_type}\n"  \
+        "        sn        : {sn}\n"  \
+        "        hw_version: {hw_version}\n"  \
+        "        Speed     : {Speed} RPM\n"     \
+        "        status    : {errmsg} \n"
     fan_double_rotor_format = "    {id} : \n"  \
-        "        fan_type  :{fan_type}\n"  \
-        "        sn        :{sn}\n"  \
-        "        hw_version:{hw_version}\n"  \
+        "        fan_type  : {fan_type}\n"  \
+        "        sn        : {sn}\n"  \
+        "        hw_version: {hw_version}\n"  \
         "        Speed     :\n"     \
-        "            speed_front :{rotor1_speed:<5} RPM\n"     \
-        "            speed_rear  :{rotor2_speed:<5} RPM\n"     \
-        "        status    :{errmsg} \n"
+        "            speed_front : {rotor1_speed:<5} RPM\n"     \
+        "            speed_rear  : {rotor2_speed:<5} RPM\n"     \
+        "        status    : {errmsg} \n"
 
     if len(val_ret) != 0:
         print_info_str += toptile + '\n'
@@ -176,23 +176,41 @@ def print_psu_sensor():
     toptile = "Onboard Power Supply Unit Sensors:"
     errformat = "    {id} : {errmsg}\n"  # "    {id:<20} : {errmsg}"
     psuformat = "    {id} : \n"  \
-                "        type       :{type1}\n"  \
-                "        sn         :{sn}\n"  \
-                "        in_current :{in_current} A\n"  \
-                "        in_voltage :{in_voltage} V\n"     \
-                "        out_current:{out_current} A\n"     \
-                "        out_voltage:{out_voltage} V\n"     \
-                "        temp       :{temp} C        \n"     \
-                "        fan_speed  :{fan_speed} RPM\n"     \
-                "        in_power   :{in_power} W\n"        \
-                "        out_power  :{out_power} W\n"
+                "        type       : {type1}\n"  \
+                "        sn         : {sn}\n"  \
+                "        in_current : {in_current} A\n"  \
+                "        in_voltage : {in_voltage} V\n"     \
+                "        out_current: {out_current} A\n"     \
+                "        out_voltage: {out_voltage} V\n"     \
+                "        temp       : {temp} C        \n"     \
+                "        fan_speed  : {fan_speed} RPM\n"     \
+                "        in_power   : {in_power} W\n"        \
+                "        out_power  : {out_power} W\n"
 
     if len(val_ret) != 0:
         print_info_str += toptile + '\r\n'
         for item in val_ret:
             realformat = psuformat if item.get('errcode', 0) == 0 else errformat
             print_info_str += realformat.format(**item)
-    print_console(print_info_str)
+        print_console(print_info_str)
+
+def print_cust_psu_sensor():
+    val_ret = get_call_value_by_function("getCustPsu")
+    print_info_str = ""
+    toptile = "Onboard Power Supply Unit Sensors:"
+    errformat = "    {id} : {errmsg}\n"  # "    {id:<20} : {errmsg}"
+    psuformat = "    {id} : \n"  \
+                "        Model      : {type1}\n"  \
+                "        Serial     : {sn}\n"  \
+                "        HW Rev     : {hw_version}\n" \
+                "        Status     : {errmsg}\n"
+
+    if len(val_ret) != 0:
+        print_info_str += toptile + '\r\n'
+        for item in val_ret:
+            realformat = psuformat if item.get('errcode', 0) == 0 else errformat
+            print_info_str += realformat.format(**item)
+        print_console(print_info_str)
 
 
 def print_slot_sensor():
@@ -201,10 +219,10 @@ def print_slot_sensor():
     toptile = "Onboard slot Sensors:"
     errformat = "    {id} : {errmsg}\n"  # "    {id:<20} : {errmsg}"
     psuformat = "    {id} : \n"  \
-                "        slot_type  :{slot_type}\n"  \
-                "        sn         :{sn}\n"  \
-                "        hw_version :{hw_version} \n"  \
-                "        status     :{errmsg}\n"
+                "        slot_type  : {slot_type}\n"  \
+                "        sn         : {sn}\n"  \
+                "        hw_version : {hw_version} \n"  \
+                "        status     : {errmsg}\n"
 
     if len(val_ret) != 0:
         print_info_str += toptile + '\r\n'
@@ -245,6 +263,7 @@ def getsensors():
     print_macpower_sensors()
     print_fan_sensor()
     print_psu_sensor()
+    print_cust_psu_sensor()
     print_slot_sensor()
     print_boarddcdc()
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/set_eth_mac.py b/platform/broadcom/sonic-platform-modules-micas/common/script/set_eth_mac.py
new file mode 100755
index 000000000000..3e445a3ac73c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/set_eth_mac.py
@@ -0,0 +1,274 @@
+#!/usr/bin/env python
+# -*- coding: UTF-8 -*-
+import syslog
+import os
+import re
+import eepromutil.onietlv as ot
+from eepromutil.fru import ipmifru
+from platform_config import STARTMODULE, SET_MAC_CONF
+from platform_util import byteTostr, dev_file_read, exec_os_cmd
+
+
+STANDARD_MAC_LEN = 12
+SETMAC_DEBUG_FILE = "/etc/.setmac_debug_flag"
+
+SETMACERROR = 1
+SETMACDEBUG = 2
+debuglevel = 0
+
+cfg_prefix = "iface"
+mac_prefix = "hwaddress ether"
+
+def setmac_debug(s):
+    if SETMACDEBUG & debuglevel:
+        syslog.openlog("SETMAC", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_INFO, s)
+
+
+def setmac_error(s):
+    if SETMACERROR & debuglevel:
+        syslog.openlog("SETMAC", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+def setmac_info(s):
+    syslog.openlog("SETMAC", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_INFO, s)
+
+
+def debug_init():
+    global debuglevel
+    try:
+        with open(SETMAC_DEBUG_FILE, "r") as fd:
+            value = fd.read()
+        debuglevel = int(value)
+    except Exception:
+        debuglevel = 0
+
+
+def decode_mac(encodedata):
+    if encodedata == None:
+        return None
+    ret = ":".join("%02x" % ord(data) for data in encodedata)
+    return ret.upper()
+
+
+def validate_mac(value):
+    if value is None:
+        setmac_error("mac is none")
+        return False
+    if value.find('-') != -1:
+        pattern = re.compile(r"^\s*([0-9a-fA-F]{2,2}-){5,5}[0-9a-fA-F]{2,2}\s*$")
+        temp_value = value.replace("-", "")
+    elif value.find(':') != -1:
+        pattern = re.compile(r"^\s*([0-9a-fA-F]{2,2}:){5,5}[0-9a-fA-F]{2,2}\s*$")
+        temp_value = value.replace(":", "")
+    else:
+        pattern = re.compile(r"^\s*([0-9a-fA-F]{2,2}){5,5}[0-9a-fA-F]{2,2}\s*$")
+        temp_value = value
+    if not pattern.match(value):
+        setmac_error("mac format error")
+        return False
+    if len(temp_value) != STANDARD_MAC_LEN:
+        setmac_error("mac len error len:%d" % len(temp_value))
+        return False
+    if temp_value == "000000000000":
+        setmac_error("illegal zero mac")
+        return False
+    if int(temp_value, 16) >> 40 & 1 == 1:
+        setmac_error("illegal mac")
+        return False
+    setmac_debug("mac validate success")
+    return True
+
+
+def get_onie_eeprom(eeprom):
+    try:
+        onietlv = ot.onie_tlv()
+        rets = onietlv.decode(eeprom)
+        setmac_debug("%-20s %-5s %-5s  %-20s" % ("TLV name", "Code", "lens", "Value"))
+        for item in rets:
+            if item["code"] == 0xfd:
+                setmac_debug("%-20s 0x%-02X   %-5s" % (item["name"], item["code"], item["lens"]))
+            else:
+                setmac_debug("%-20s 0x%-02X   %-5s %-20s" % (item["name"], item["code"], item["lens"], item["value"]))
+    except Exception as e:
+        setmac_error(str(e))
+        return False, str(e)
+    return True, rets
+
+
+def get_fru_eeprom_info(eeprom):
+    try:
+        fru = ipmifru()
+        fru.decodeBin(eeprom)
+    except Exception as e:
+        setmac_error(str(e))
+        return False, str(e)
+    return True, fru
+
+
+def get_mac_from_eeprom(eeprom_conf):
+    name = eeprom_conf.get("name")
+    e2_type = eeprom_conf.get("e2_type")
+    e2_path = eeprom_conf.get("e2_path")
+    e2_size = eeprom_conf.get("e2_size", 256)
+    mac_location = eeprom_conf.get("mac_location", {})
+    e2_mac = None
+
+    support_e2_type = ("fru", "onie_tlv")
+    if e2_type not in support_e2_type:
+        msg = "Unsupport e2 type: %s" % e2_type
+        return False, msg
+
+    setmac_debug("===================%s===================" % name)
+    ret, binval_bytes = dev_file_read(e2_path, 0, e2_size)
+    if ret is False:
+        msg = "eeprom read error, eeprom path: %s, msg: %s" % (e2_path, binval_bytes)
+        return False, msg
+    binval = byteTostr(binval_bytes)
+
+    # onie_tlv
+    if e2_type == "onie_tlv":
+        status, eeprom_info = get_onie_eeprom(binval)
+        if status is False:
+            msg = "get_onie_eeprom failed, msg: %s" % (eeprom_info)
+            return False, msg
+
+        field = mac_location.get("field", "")
+        for eeprom_info_item in eeprom_info:
+            if eeprom_info_item.get("name") == field:
+                e2_mac = eeprom_info_item.get("value")
+                break
+        if e2_mac is None:
+            msg = "get_onie_eeprom mac address failed, e2_mac is None"
+            return False, msg
+        return True, e2_mac
+
+    # fru
+    status, eeprom_info = get_fru_eeprom_info(binval)
+    if status is False:
+        msg = "get_fru_eeprom_info failed, msg: %s" % (eeprom_info)
+        return False, msg
+
+    area = mac_location.get("area", "")
+    field = mac_location.get("field", "")
+    fru_area = getattr(eeprom_info, area, None)
+    fru_field = getattr(fru_area, field, None)
+    e2_mac = decode_mac(fru_field)
+    if e2_mac is None:
+        msg = "decode_mac failed, area: %s, field: %s, value: %s" % (area, field, fru_field)
+        return False, msg
+    return True, e2_mac
+
+
+def read_mac_from_config_file(ifcfg):
+    ifcfg_file_path = ifcfg.get("ifcfg_file_path")
+    if not os.path.exists(ifcfg_file_path):
+        msg = "%s not exist" % ifcfg_file_path
+        return False, msg
+    try:
+        fd = open(ifcfg_file_path, 'r')
+        for line in reversed(fd.readlines()):
+            if line.strip().startswith(mac_prefix):
+                mac = line.strip().replace(mac_prefix, "").strip()
+                return True, mac
+    except Exception as e:
+        setmac_error(str(e))
+        return False, str(e)
+    return False, "mac address not found in %s" % ifcfg_file_path
+
+
+def set_e2_mac_to_config_file(eth_name, mac, ifcfg):
+    try:
+        ifcfg_file_path = ifcfg.get("ifcfg_file_path")
+        cfg_file_dir = os.path.dirname(ifcfg_file_path)
+        if not os.path.exists(cfg_file_dir):
+            cmd = "mkdir -p %s" % cfg_file_dir
+            setmac_info("Create interfaces config directory: %s" % cfg_file_dir)
+            os.system(cmd)
+            os.system("sync")
+        wr_val = cfg_prefix + " %s\n" % eth_name
+        wr_val += "    %s %s\n" % (mac_prefix, mac)
+        with open(ifcfg_file_path, "w") as fd:
+            fd.write(wr_val)
+        os.system("sync")
+        setmac_info("Create interfaces config: %s with mac address: %s" % (ifcfg_file_path, mac))
+        return True
+    except Exception as e:
+        setmac_error(str(e))
+        return False
+
+def get_eth_current_mac(eth_name):
+    get_mac_cmd = "ifconfig %s |grep ether |awk '{print $2}'" % eth_name
+    status, output = exec_os_cmd(get_mac_cmd)
+    if status or len(output) == 0:
+        msg = "get mac exec cmd : %s fail, msg: %s" % (get_mac_cmd, output)
+        setmac_error(msg)
+        return False, msg
+    mac = output.replace("\n", "").upper()
+    return True, mac
+
+def set_eth_mac(eth_name, mac):
+    set_mac_cmd = "ifconfig %s hw ether %s" % (eth_name, mac)
+    status, output = exec_os_cmd(set_mac_cmd)
+    if status:
+        setmac_error("run cmd: %s fail, msg: %s" % (set_mac_cmd, output))
+        return False
+    setmac_info("ifconfig %s with mac address: %s success" % (eth_name, mac))
+    return True
+
+
+def doSetmac():
+    if STARTMODULE.get('set_eth_mac', 0) == 0:
+        setmac_debug("set_eth_mac config not set")
+        return
+
+    try:
+        if SET_MAC_CONF is None:
+            setmac_debug("set_mac_conf in none")
+            return
+
+        if len(SET_MAC_CONF) == 0:
+            setmac_debug("set_mac_conf list is none")
+            return
+
+        for setmac_item in SET_MAC_CONF:
+            eth_name = setmac_item.get("eth_name")
+            e2_name = setmac_item.get("e2_name", "")
+            ifcfg = setmac_item.get("ifcfg")
+            if eth_name is None or ifcfg is None:
+                setmac_error("set_mac_conf error, eth_name or ifcfg is None")
+                continue
+
+            # decode mac by eeprom
+            status, e2_mac = get_mac_from_eeprom(setmac_item)
+            if status is False:
+                setmac_error("get mac from %s eeprom fail, msg: %s" % (e2_name, e2_mac))
+                continue
+            status = validate_mac(e2_mac)
+            if status is False:
+                setmac_error("e2_mac: %s invalid" % e2_mac)
+                continue
+            setmac_debug("get mac from %s eeprom info success, mac: %s" % (e2_name, e2_mac))
+
+            # read config file mac address
+            status, cfg_mac = read_mac_from_config_file(ifcfg)
+            setmac_debug("read_mac_from_config_file, status: %s, cfg_mac: %s" % (status, cfg_mac))
+            if status is False or cfg_mac != e2_mac:
+                set_e2_mac_to_config_file(eth_name, e2_mac, ifcfg)
+                # check current eth mac
+                status, current_mac = get_eth_current_mac(eth_name)
+                if status is False:
+                    setmac_error("get %s current mac fail" % eth_name)
+                    continue
+                setmac_debug("current_mac:%s len:%d" % (current_mac, len(current_mac)))
+                if current_mac != e2_mac:
+                    set_eth_mac(eth_name, e2_mac)
+    except Exception as e:
+        setmac_error(str(e))
+    return
+
+
+if __name__ == '__main__':
+    debug_init()
+    doSetmac()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/slot_monitor.py b/platform/broadcom/sonic-platform-modules-micas/common/script/slot_monitor.py
index b8b774c8b726..0385f50b6f50 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/slot_monitor.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/slot_monitor.py
@@ -5,11 +5,14 @@
 import traceback
 import operator
 import click
-from platform_config import SLOT_MONITOR_PARAM, MONITOR_DEV_STATUS_DECODE
+import os
+from platform_config import SLOT_MONITOR_PARAM
 from platform_util import io_rd, io_wr, wbi2cget, wbi2cset
 
 
 SLOTMONITORDEBUG = 0
+SLOTMONITOR_DEBUG_FILE = "/etc/.slotmonitor_debug_flag"
+
 
 CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
 
@@ -29,6 +32,14 @@ def get_command(self, ctx, cmd_name):
         return None
 
 
+def debug_init():
+    global SLOTMONITORDEBUG
+    if os.path.exists(SLOTMONITOR_DEBUG_FILE):
+        SLOTMONITORDEBUG = 1
+    else:
+        SLOTMONITORDEBUG = 0
+
+
 def slotwarninglog(s):
     # s = s.decode('utf-8').encode('gb2312')
     syslog.openlog("SLOTMONITOR", syslog.LOG_PID)
@@ -66,9 +77,8 @@ def __init__(self):
 
     def checkslot(self, ret):
         slots_conf = SLOT_MONITOR_PARAM.get('slots', None)
-        slotpresent = MONITOR_DEV_STATUS_DECODE.get('slotpresent', None)
 
-        if slots_conf is None or slotpresent is None:
+        if slots_conf is None:
             return False
         for item_slot in slots_conf:
             totalerr = 0
@@ -102,8 +112,7 @@ def checkslot(self, ret):
                     ret.append(ret_t)
                     continue
                 val_t = (int(retval, 16) & (1 << presentbit)) >> presentbit
-                slotdebuglog("%s present:%s" % (item_slot.get('name'), slotpresent.get(val_t)))
-                if val_t != slotpresent.get('okval'):
+                if val_t != presentattr.get('okval'):
                     ret_t["status"] = "ABSENT"
                 else:
                     ret_t["status"] = "PRESENT"
@@ -112,6 +121,7 @@ def checkslot(self, ret):
                 totalerr -= 1
                 sloterror("checkslot error")
                 sloterror(str(e))
+            slotdebuglog("%s status: %s" % (ret_t["id"], ret_t["status"]))
             ret.append(ret_t)
         return True
 
@@ -210,6 +220,7 @@ def run(interval, slotMonitor):
     # slotMonitor.devattrinit()
     while True:
         try:
+            debug_init()
             doSlotMonitor(slotMonitor)
         except Exception as e:
             traceback.print_exc()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py
index 1ad578e40546..be1c8ce8f4fd 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py
@@ -109,6 +109,10 @@ def get_status(self):
             tolerance = 30
 
         if isinstance(value, str) or value is None:
+            if self.is_psu_fan:
+                psu_status_dict = self.int_case.get_psu_status(self.name)
+                if psu_status_dict["OutputStatus"] is True:
+                    return True
             return False
 
         if value < min_speed:
@@ -186,7 +190,7 @@ def get_speed(self):
             max_speed = psu_status_dict["FanSpeed"]["Max"]
 
         if isinstance(value, str) or value is None:
-            return 0
+            return None
         pwm = value * 100 / max_speed
         if pwm > 100:
             pwm = 100
@@ -282,6 +286,8 @@ def get_target_speed(self):
                 pwm = 0
             else:
                 pwm = self.get_speed()  # target equal to real pwm, to avoid alarm
+        if pwm is None:
+            return None
         return int(pwm)
 
     def get_vendor(self):
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py
index a9f7e87d2027..2a634ca6b0a8 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py
@@ -127,13 +127,13 @@ def get_voltage(self):
             e.g. 12.1
         """
         self.psu_status_dict_update()
-        if self.psu_status_dict["InputStatus"] is False:
+        if self.psu_status_dict["OutputStatus"] is False:
             value = 0
         else:
             self.psu_power_dict_update()
             value = self.psu_power_dict["Outputs"]["Voltage"]["Value"]
             if value is None:
-                value = 0
+                return None
         return round(float(value), 1)
 
     def get_current(self):
@@ -145,13 +145,13 @@ def get_current(self):
             e.g. 15.4
         """
         self.psu_status_dict_update()
-        if self.psu_status_dict["InputStatus"] is False:
+        if self.psu_status_dict["OutputStatus"] is False:
             value = 0
         else:
             self.psu_power_dict_update()
             value = self.psu_power_dict["Outputs"]["Current"]["Value"]
             if value is None:
-                value = 0
+                return None
         return round(float(value), 1)
 
     def get_power(self):
@@ -163,13 +163,13 @@ def get_power(self):
             e.g. 302.6
         """
         self.psu_status_dict_update()
-        if self.psu_status_dict["InputStatus"] is False:
+        if self.psu_status_dict["OutputStatus"] is False:
             value = 0
         else:
             self.psu_power_dict_update()
             value = self.psu_power_dict["Outputs"]["Power"]["Value"]
             if value is None:
-                value = 0
+                return None
         return round(float(value), 1)
 
     def get_powergood_status(self):
@@ -219,7 +219,7 @@ def get_temperature(self):
         self.psu_status_dict_update()
         value = self.psu_status_dict["Temperature"]["Value"]
         if value is None:
-            value = 0
+            return None
         return round(float(value), 1)
 
     def get_temperature_high_threshold(self):
@@ -233,7 +233,7 @@ def get_temperature_high_threshold(self):
         self.psu_status_dict_update()
         value = self.psu_status_dict["Temperature"]["Max"]
         if value is None:
-            value = 0
+            return None
         return round(float(value), 1)
 
     def get_voltage_high_threshold(self):
@@ -247,7 +247,7 @@ def get_voltage_high_threshold(self):
         self.psu_power_dict_update()
         value = self.psu_power_dict["Outputs"]["Voltage"]["HighAlarm"]
         if value is None:
-            value = 0
+            return None
         return round(float(value), 1)
 
     def get_voltage_low_threshold(self):
@@ -261,7 +261,7 @@ def get_voltage_low_threshold(self):
         self.psu_power_dict_update()
         value = self.psu_power_dict["Outputs"]["Voltage"]["LowAlarm"]
         if value is None:
-            value = 0
+            return None
         return round(float(value), 1)
 
     def get_input_voltage(self):
@@ -278,7 +278,7 @@ def get_input_voltage(self):
             self.psu_power_dict_update()
             value = self.psu_power_dict["Inputs"]["Voltage"]["Value"]
             if value is None:
-                value = 0
+                return None
         return round(float(value), 1)
 
     def get_input_current(self):
@@ -295,7 +295,7 @@ def get_input_current(self):
             self.psu_power_dict_update()
             value = self.psu_power_dict["Inputs"]["Current"]["Value"]
             if value is None:
-                value = 0
+                return None
         return round(float(value), 1)
 
     def get_input_power(self):
@@ -312,7 +312,7 @@ def get_input_power(self):
             self.psu_power_dict_update()
             value = self.psu_power_dict["Inputs"]["Power"]["Value"]
             if value is None:
-                value = 0
+                return None
         return round(float(value), 1)
 
     def get_revision(self):
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py
index 97401083f458..f0563ec1833d 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py
@@ -84,9 +84,6 @@ def get_eeprom_path(self):
     def read_eeprom(self, offset, num_bytes):
         return self._sfp_api.read_eeprom(offset, num_bytes)
 
-    def write_eeprom(self, offset, num_bytes, write_buffer):
-        return self._sfp_api.write_eeprom(offset, num_bytes, write_buffer)
-
     def get_presence(self):
         return self._sfp_api.get_presence()
 
@@ -94,13 +91,31 @@ def get_transceiver_info(self):
         # temporary solution for a sonic202111 bug
         transceiver_info = super().get_transceiver_info()
         try:
-            if transceiver_info is not None and transceiver_info["vendor_rev"] is not None:
+            if transceiver_info == None:
+                return None
+            if transceiver_info['cable_type'] == None:
+                transceiver_info['cable_type'] = 'N/A'
+            if transceiver_info["vendor_rev"] is not None:
                 transceiver_info["hardware_rev"] = transceiver_info["vendor_rev"]
         except BaseException:
             print(traceback.format_exc())
             return None
         return transceiver_info
 
+    def get_reset_status(self):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'SFP':
+            self._sfplog(LOG_ERROR_LEVEL, 'SFP does not support reset')
+            return False
+
+        ret = self._sfp_api.get_reset_status()
+        return ret
+
     def reset(self):
         if self.get_presence() is False:
             return False
@@ -127,14 +142,12 @@ def get_lpmode(self):
         if self.sfp_type is None:
             self.refresh_xcvr_api()
 
-        if self.sfp_type == 'SFP':
+        if self.sfp_type == 'QSFP' or self.sfp_type == 'QSFP-DD':
+            return SfpOptoeBase.get_lpmode(self)
+
             self._sfplog(LOG_WARNING_LEVEL, 'SFP does not support lpmode')
             return False
 
-        # implement in future
-
-        return False
-
     def set_lpmode(self, lpmode):
         if self.get_presence() is False:
             return False
@@ -142,15 +155,61 @@ def set_lpmode(self, lpmode):
         if self.sfp_type is None or self._xcvr_api is None:
             self.refresh_xcvr_api()
 
-        if self.sfp_type == 'QSFP-DD':
+        if self.sfp_type == 'QSFP-DD' or self.sfp_type == 'QSFP':
             return SfpOptoeBase.set_lpmode(self, lpmode)
-        if self.sfp_type == 'QSFP':
-            if lpmode:
-                return self._xcvr_api.set_power_override(True, lpmode)
-            return self._xcvr_api.set_power_override(False, lpmode)
+
         self._sfplog(LOG_WARNING_LEVEL, 'SFP does not support lpmode')
         return False
 
+    def get_tx_disable(self):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'SFP':
+            return self._sfp_api.get_tx_disable()
+
+        return SfpOptoeBase.get_tx_disable(self)
+
+    def get_tx_disable_channel(self):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'SFP':
+            return self._sfp_api.get_tx_disable_channel()
+
+        return SfpOptoeBase.get_tx_disable_channel(self)
+
+    def tx_disable(self, tx_disable):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'SFP':
+            return self._sfp_api.set_tx_disable(tx_disable)
+
+        return SfpOptoeBase.tx_disable(self, tx_disable)
+
+    def tx_disable_channel(self, channel, disable):
+        if self.get_presence() is False:
+            return False
+
+        if self.sfp_type is None:
+            self.refresh_xcvr_api()
+
+        if self.sfp_type == 'SFP':
+            self._sfplog(LOG_WARNING_LEVEL, 'SFP does not support tx disable channel')
+            return False
+
+        return SfpOptoeBase.tx_disable_channel(self, channel, disable)
+
     def set_optoe_write_max(self, write_max):
         """
         This func is declared and implemented by SONiC but we're not supported
@@ -293,6 +352,13 @@ def _init_config(self, index):
         super()._init_config(index)
         # init presence path
         sfp_config = baseutil.get_config().get("sfps", None)
+
+        eeprom_path_config = sfp_config.get("eeprom_path", None)
+        eeprom_path_key = sfp_config.get("eeprom_path_key")[self._port_id - 1]
+        self.eeprom_path = None if eeprom_path_config is None else eeprom_path_config % (
+            eeprom_path_key, eeprom_path_key)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init eeprom path: %s" % self.eeprom_path)
+
         self.presence_cpld = sfp_config.get("presence_cpld", None)
         self.presence_val_is_present = sfp_config.get("presence_val_is_present", 0)
         self._sfplog(LOG_DEBUG_LEVEL, "Done init presence path")
@@ -302,6 +368,11 @@ def _init_config(self, index):
         self.reset_val_is_reset = sfp_config.get("reset_val_is_reset", 0)
         self._sfplog(LOG_DEBUG_LEVEL, "Done init cpld path")
 
+        # init tx_disable path
+        self.txdis_cpld = sfp_config.get("txdis_cpld", None)
+        self.txdisable_val_is_on = sfp_config.get("txdisable_val_is_on", 0)
+        self._sfplog(LOG_DEBUG_LEVEL, "Done init cpld tx_disable path")
+
     def get_presence(self):
         if self.presence_cpld is None:
             self._sfplog(LOG_ERROR_LEVEL, "presence_cpld is None!")
@@ -317,6 +388,59 @@ def get_presence(self):
             self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
             return False
 
+    def get_reset_status(self):
+        if self.reset_cpld is None:
+            self._sfplog(LOG_ERROR_LEVEL, "reset_cpld is None!")
+            return False
+        try:
+            dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.reset_cpld)
+            ret, info = platform_reg_read(0, dev_id, offset, 1)
+            if (ret is False
+                    or info is None):
+                self._sfplog(LOG_ERROR_LEVEL, "platform_reg_read error!")
+                return False
+
+            return (info[0] & (1 << offset_bit) == self.reset_val_is_reset)
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+    def get_tx_disable(self):
+        if self.reset_cpld is None:
+            self._sfplog(LOG_ERROR_LEVEL, "txdis_cpld is None!")
+            return None
+
+        try:
+            tx_disable_list = []
+            dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.txdis_cpld)
+            ret, info = platform_reg_read(0, dev_id, offset, 1)
+            if (ret is False
+                    or info is None):
+                self._sfplog(LOG_ERROR_LEVEL, "platform_reg_read error!")
+                return None
+            if self.txdisable_val_is_on == 1:
+                tx_disable_list.append(info[0] & (1 << offset_bit) != 0)
+            else:
+                tx_disable_list.append(info[0] & (1 << offset_bit) == 0)
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return None
+
+        return tx_disable_list
+
+    def get_tx_disable_channel(self):
+        tx_disable_list = []
+        tx_disable_list = self.get_tx_disable()
+        if tx_disable_list is None:
+            return 0
+
+        tx_disabled = 0
+        for i in range(len(tx_disable_list)):
+            if tx_disable_list[i]:
+                tx_disabled |= 1 << i
+
+        return tx_disabled
+
     def read_eeprom(self, offset, num_bytes):
         try:
             for i in range(self.eeprom_retry_times):
@@ -338,26 +462,6 @@ def read_eeprom(self, offset, num_bytes):
             self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
         return None
 
-    def write_eeprom(self, offset, num_bytes, write_buffer):
-        try:
-            for i in range(self.eeprom_retry_times):
-                # TODO: write_buffer is bytearray, need to convert to int array
-                val_list = []
-                if isinstance(write_buffer, list):
-                    val_list = write_buffer
-                else:
-                    val_list.append(write_buffer)
-                ret, info = platform_sfp_write(self._port_id, offset, val_list)
-                if (ret is False
-                        or info is None):
-                    time.sleep(self.eeprom_retry_break_sec)
-                    continue
-                return True
-        except BaseException:
-            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
-
-        return False
-
     def set_optoe_type(self, optoe_type):
         ret, info = platform_get_optoe_type(self._port_id)
         if ret is True and info != optoe_type:
@@ -374,6 +478,11 @@ def set_reset(self, reset):
             val = []
             dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.reset_cpld)
             ret, info = platform_reg_read(0, dev_id, offset, 1)
+            if (ret is False
+                    or info is None):
+                self._sfplog(LOG_ERROR_LEVEL, "platform_reg_read error!")
+                return False
+
             if self.reset_val_is_reset == 0:
                 if reset:
                     val.append(info[0] & (~(1 << offset_bit)))
@@ -396,10 +505,45 @@ def set_reset(self, reset):
 
         return True
 
+    def set_tx_disable(self, tx_disable):
+        if self.txdis_cpld is None:
+            self._sfplog(LOG_ERROR_LEVEL, "txdis_cpld is None!")
+            return False
+        try:
+            val = []
+            dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.txdis_cpld)
+            ret, info = platform_reg_read(0, dev_id, offset, 1)
+            if (ret is False
+                    or info is None):
+                self._sfplog(LOG_ERROR_LEVEL, "platform_reg_read error!")
+                return False
+
+            if self.txdisable_val_is_on == 0:
+                if tx_disable:
+                    val.append(info[0] & (~(1 << offset_bit)))
+                else:
+                    val.append(info[0] | (1 << offset_bit))
+            else:
+                if tx_disable:
+                    val.append(info[0] | (1 << offset_bit))
+                else:
+                    val.append(info[0] & (~(1 << offset_bit)))
+
+            ret, info = platform_reg_write(0, dev_id, offset, val)
+            if ret is False:
+                self._sfplog(LOG_ERROR_LEVEL, "platform_reg_write error!")
+                return False
+
+        except BaseException:
+            self._sfplog(LOG_ERROR_LEVEL, traceback.format_exc())
+            return False
+
+        return True
+
     def _get_sfp_cpld_info(self, cpld_config):
         dev_id = 0
         offset = 0
-
+        offset_bit = 0
         for dev_id_temp in cpld_config["dev_id"]:
             for offset_temp in cpld_config["dev_id"][dev_id_temp]["offset"]:
                 port_range_str = cpld_config["dev_id"][dev_id_temp]["offset"][offset_temp]
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
index 9f1e988c93d5..0ef88cdcd5e2 100755
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
@@ -1069,7 +1069,7 @@
 
 AIR_FLOW_CONF = {
     "psu_fan_airflow": {
-        "intake": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3'],
+        "intake": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3', 'U1D-D10800-DRB'],
         "exhaust": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC']
     },
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_device.py
index 3142b08e3091..c1eb46247086 100755
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_device.py
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_device.py
@@ -1,7 +1,7 @@
 #!/usr/bin/python3
 
 psu_fan_airflow = {
-    "intake": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3'],
+    "intake": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3', 'U1D-D10800-DRB'],
     "exhaust": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC']
 }
 
@@ -12,7 +12,8 @@
 
 psu_display_name = {
     "PA550II-F": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3'],
-    "PA550II-R": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC']
+    "PA550II-R": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC'],
+    "PD800I-F": ['U1D-D10800-DRB']
 }
 
 psutypedecode = {
@@ -66,6 +67,33 @@ class threshold:
     FRONT_FAN_SPEED_MAX = 24000
     REAR_FAN_SPEED_MAX = 22500
     FAN_SPEED_MIN = 5000
+    
+
+    ASPOWER_DC_PSU_TEMP_MIN = -10 * 1000
+    ASPOWER_DC_PSU_TEMP_MAX = 55 * 1000
+
+    ASPOWER_DC_PSU_FAN_SPEED_MIN = 800
+    ASPOWER_DC_PSU_FAN_SPEED_MAX = 24000
+
+    ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MIN = 11.4 * 1000
+    ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MAX = 12.6 * 1000
+
+    ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MIN = 36 * 1000
+    ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MAX = 72 * 1000
+
+    ASPOWER_DC_ERR_VALUE = -9999999
+
+    ASPOWER_DC_PSU_OUTPUT_POWER_MIN = 5 * 1000 * 1000
+    ASPOWER_DC_PSU_OUTPUT_POWER_MAX = 800 * 1000 * 1000
+
+    ASPOWER_DC_PSU_INPUT_POWER_MIN = 5 * 1000 * 1000
+    ASPOWER_DC_PSU_INPUT_POWER_MAX = 880 * 1000 * 1000
+
+    ASPOWER_DC_PSU_OUTPUT_CURRENT_MIN = 0.5 * 1000
+    ASPOWER_DC_PSU_OUTPUT_CURRENT_MAX = 66 * 1000
+
+    ASPOWER_DC_PSU_INPUT_CURRENT_MIN = 1 * 1000
+    ASPOWER_DC_PSU_INPUT_CURRENT_MAX = 28 * 1000
 
 
 class Description:
@@ -88,21 +116,34 @@ class Description:
             "pmbusloc": {"bus": 24, "addr": 0x58, "way": "i2c"},
             "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
             "name": "PSU1",
+            "get_threshold_by_model": 1,
             "psu_display_name": psu_display_name,
             "airflow": psu_fan_airflow,
             "TempStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
             "Temperature": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
-                "Min": threshold.PSU_TEMP_MIN,
-                "Max": threshold.PSU_TEMP_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_TEMP_MIN,
+                    "other": threshold.PSU_TEMP_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_TEMP_MAX,
+                    "other": threshold.PSU_TEMP_MAX,
+                },
                 "Unit": Unit.Temperature,
                 "format": "float(float(%s)/1000)"
             },
             "FanStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
             "FanSpeed": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
-                "Min": threshold.PSU_FAN_SPEED_MIN,
-                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_FAN_SPEED_MIN,
+                    "other": threshold.PSU_FAN_SPEED_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_FAN_SPEED_MAX,
+                    "other": threshold.PSU_FAN_SPEED_MAX,
+                },
                 "Unit": Unit.Speed
             },
             "psu_fan_tolerance": 40,
@@ -119,52 +160,94 @@ class Description:
                 },
                 'DC': {
                     "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
-                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
-                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Min": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MIN,
+                        "other": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    },
+                    "Max": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MAX,
+                        "other": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    },
                     "Unit": Unit.Voltage,
                     "format": "float(float(%s)/1000)"
                 },
                 'other': {
                     "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
-                    "Min": threshold.ERR_VALUE,
-                    "Max": threshold.ERR_VALUE,
+                    "Min": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MIN,
+                        "other": threshold.ERR_VALUE,
+                    },
+                    "Max": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MAX,
+                        "other": threshold.ERR_VALUE,
+                    },
                     "Unit": Unit.Voltage,
                     "format": "float(float(%s)/1000)"
                 }
             },
             "InputsCurrent": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
-                "Min": threshold.PSU_INPUT_CURRENT_MIN,
-                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_CURRENT_MIN,
+                    "other": threshold.PSU_INPUT_CURRENT_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_CURRENT_MAX,
+                    "other": threshold.PSU_INPUT_CURRENT_MAX,
+                },
                 "Unit": Unit.Current,
                 "format": "float(float(%s)/1000)"
             },
             "InputsPower": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
-                "Min": threshold.PSU_INPUT_POWER_MIN,
-                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_POWER_MIN,
+                    "other": threshold.PSU_INPUT_POWER_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_POWER_MAX,
+                    "other": threshold.PSU_INPUT_POWER_MAX,
+                },
                 "Unit": Unit.Power,
                 "format": "float(float(%s)/1000000)"
             },
             "OutputsStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
             "OutputsVoltage": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
-                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
-                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MIN,
+                    "other": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MAX,
+                    "other": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                },
                 "Unit": Unit.Voltage,
                 "format": "float(float(%s)/1000)"
             },
             "OutputsCurrent": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
-                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
-                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_CURRENT_MIN,
+                    "other": threshold.PSU_OUTPUT_CURRENT_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_CURRENT_MAX,
+                    "other": threshold.PSU_OUTPUT_CURRENT_MAX,
+                },
                 "Unit": Unit.Current,
                 "format": "float(float(%s)/1000)"
             },
             "OutputsPower": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
-                "Min": threshold.PSU_OUTPUT_POWER_MIN,
-                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_POWER_MIN,
+                    "other": threshold.PSU_OUTPUT_POWER_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_POWER_MAX,
+                    "other": threshold.PSU_OUTPUT_POWER_MAX,
+                },
                 "Unit": Unit.Power,
                 "format": "float(float(%s)/1000000)"
             },
@@ -174,21 +257,34 @@ class Description:
             "pmbusloc": {"bus": 25, "addr": 0x58, "way": "i2c"},
             "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
             "name": "PSU2",
+            "get_threshold_by_model": 1,
             "psu_display_name": psu_display_name,
             "airflow": psu_fan_airflow,
             "TempStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
             "Temperature": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
-                "Min": threshold.PSU_TEMP_MIN,
-                "Max": threshold.PSU_TEMP_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_TEMP_MIN,
+                    "other": threshold.PSU_TEMP_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_TEMP_MAX,
+                    "other": threshold.PSU_TEMP_MAX,
+                },
                 "Unit": Unit.Temperature,
                 "format": "float(float(%s)/1000)"
             },
             "FanStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
             "FanSpeed": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
-                "Min": threshold.PSU_FAN_SPEED_MIN,
-                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_FAN_SPEED_MIN,
+                    "other": threshold.PSU_FAN_SPEED_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_FAN_SPEED_MAX,
+                    "other": threshold.PSU_FAN_SPEED_MAX,
+                },
                 "Unit": Unit.Speed
             },
             "psu_fan_tolerance": 40,
@@ -205,52 +301,94 @@ class Description:
                 },
                 'DC': {
                     "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
-                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
-                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Min": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MIN,
+                        "other": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    },
+                    "Max": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MAX,
+                        "other": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    },
                     "Unit": Unit.Voltage,
                     "format": "float(float(%s)/1000)"
                 },
                 'other': {
                     "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
-                    "Min": threshold.ERR_VALUE,
-                    "Max": threshold.ERR_VALUE,
+                    "Min": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MIN,
+                        "other": threshold.ERR_VALUE,
+                    },
+                    "Max": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MAX,
+                        "other": threshold.ERR_VALUE,
+                    },
                     "Unit": Unit.Voltage,
                     "format": "float(float(%s)/1000)"
                 }
             },
             "InputsCurrent": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
-                "Min": threshold.PSU_INPUT_CURRENT_MIN,
-                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_CURRENT_MIN,
+                    "other": threshold.PSU_INPUT_CURRENT_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_CURRENT_MAX,
+                    "other": threshold.PSU_INPUT_CURRENT_MAX,
+                },
                 "Unit": Unit.Current,
                 "format": "float(float(%s)/1000)"
             },
             "InputsPower": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
-                "Min": threshold.PSU_INPUT_POWER_MIN,
-                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_POWER_MIN,
+                    "other": threshold.PSU_INPUT_POWER_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_POWER_MAX,
+                    "other": threshold.PSU_INPUT_POWER_MAX,
+                },
                 "Unit": Unit.Power,
                 "format": "float(float(%s)/1000000)"
             },
             "OutputsStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
             "OutputsVoltage": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
-                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
-                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MIN,
+                    "other": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MAX,
+                    "other": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                },
                 "Unit": Unit.Voltage,
                 "format": "float(float(%s)/1000)"
             },
             "OutputsCurrent": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
-                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
-                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_CURRENT_MIN,
+                    "other": threshold.PSU_OUTPUT_CURRENT_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_CURRENT_MAX,
+                    "other": threshold.PSU_OUTPUT_CURRENT_MAX,
+                },
                 "Unit": Unit.Current,
                 "format": "float(float(%s)/1000)"
             },
             "OutputsPower": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
-                "Min": threshold.PSU_OUTPUT_POWER_MIN,
-                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_POWER_MIN,
+                    "other": threshold.PSU_OUTPUT_POWER_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_POWER_MAX,
+                    "other": threshold.PSU_OUTPUT_POWER_MAX,
+                },
                 "Unit": Unit.Power,
                 "format": "float(float(%s)/1000000)"
             },
@@ -1218,7 +1356,7 @@ class Description:
                 },
             },
         },
-        "txdisable_val_is_on": 0,
+        "txdisable_val_is_on": 1,
         "reset_cpld": {
             "dev_id": {
                 4: {
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_exhaust_device.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_exhaust_device.py
index 3fadc9cc4608..c2b857975382 100755
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_exhaust_device.py
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/hal-config/x86_64_micas_m2_w6510_48v8c_r0_exhaust_device.py
@@ -1,7 +1,7 @@
 #!/usr/bin/python3
 
 psu_fan_airflow = {
-    "intake": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3'],
+    "intake": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3', 'U1D-D10800-DRB'],
     "exhaust": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC']
 }
 
@@ -12,7 +12,8 @@
 
 psu_display_name = {
     "PA550II-F": ['CSU550AP-3-500', 'DPS-550AB-39 A', 'GW-CRPS550N2C', 'CSU550AP-3-300', 'DPS-550AB-39 B', 'CSU550AP-3'],
-    "PA550II-R": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC']
+    "PA550II-R": ['CSU550AP-3-501', 'DPS-550AB-40 A', 'GW-CRPS550N2RC'],
+    "PD800I-F": ['U1D-D10800-DRB']
 }
 
 psutypedecode = {
@@ -66,6 +67,33 @@ class threshold:
     FRONT_FAN_SPEED_MAX = 24000
     REAR_FAN_SPEED_MAX = 22500
     FAN_SPEED_MIN = 5000
+    
+
+    ASPOWER_DC_PSU_TEMP_MIN = -10 * 1000
+    ASPOWER_DC_PSU_TEMP_MAX = 55 * 1000
+
+    ASPOWER_DC_PSU_FAN_SPEED_MIN = 800
+    ASPOWER_DC_PSU_FAN_SPEED_MAX = 24000
+
+    ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MIN = 11.4 * 1000
+    ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MAX = 12.6 * 1000
+
+    ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MIN = 36 * 1000
+    ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MAX = 72 * 1000
+
+    ASPOWER_DC_ERR_VALUE = -9999999
+
+    ASPOWER_DC_PSU_OUTPUT_POWER_MIN = 5 * 1000 * 1000
+    ASPOWER_DC_PSU_OUTPUT_POWER_MAX = 800 * 1000 * 1000
+
+    ASPOWER_DC_PSU_INPUT_POWER_MIN = 5 * 1000 * 1000
+    ASPOWER_DC_PSU_INPUT_POWER_MAX = 880 * 1000 * 1000
+
+    ASPOWER_DC_PSU_OUTPUT_CURRENT_MIN = 0.5 * 1000
+    ASPOWER_DC_PSU_OUTPUT_CURRENT_MAX = 66 * 1000
+
+    ASPOWER_DC_PSU_INPUT_CURRENT_MIN = 1 * 1000
+    ASPOWER_DC_PSU_INPUT_CURRENT_MAX = 28 * 1000
 
 
 class Description:
@@ -88,21 +116,34 @@ class Description:
             "pmbusloc": {"bus": 24, "addr": 0x58, "way": "i2c"},
             "present": {"loc": "/sys/wb_plat/psu/psu1/present", "way": "sysfs", "mask": 0x01, "okval": 1},
             "name": "PSU1",
+            "get_threshold_by_model": 1,
             "psu_display_name": psu_display_name,
             "airflow": psu_fan_airflow,
             "TempStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
             "Temperature": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
-                "Min": threshold.PSU_TEMP_MIN,
-                "Max": threshold.PSU_TEMP_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_TEMP_MIN,
+                    "other": threshold.PSU_TEMP_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_TEMP_MAX,
+                    "other": threshold.PSU_TEMP_MAX,
+                },
                 "Unit": Unit.Temperature,
                 "format": "float(float(%s)/1000)"
             },
             "FanStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
             "FanSpeed": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
-                "Min": threshold.PSU_FAN_SPEED_MIN,
-                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_FAN_SPEED_MIN,
+                    "other": threshold.PSU_FAN_SPEED_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_FAN_SPEED_MAX,
+                    "other": threshold.PSU_FAN_SPEED_MAX,
+                },
                 "Unit": Unit.Speed
             },
             "psu_fan_tolerance": 40,
@@ -119,52 +160,94 @@ class Description:
                 },
                 'DC': {
                     "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
-                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
-                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Min": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MIN,
+                        "other": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    },
+                    "Max": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MAX,
+                        "other": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    },
                     "Unit": Unit.Voltage,
                     "format": "float(float(%s)/1000)"
                 },
                 'other': {
                     "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
-                    "Min": threshold.ERR_VALUE,
-                    "Max": threshold.ERR_VALUE,
+                    "Min": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MIN,
+                        "other": threshold.ERR_VALUE,
+                    },
+                    "Max": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MAX,
+                        "other": threshold.ERR_VALUE,
+                    },
                     "Unit": Unit.Voltage,
                     "format": "float(float(%s)/1000)"
                 }
             },
             "InputsCurrent": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
-                "Min": threshold.PSU_INPUT_CURRENT_MIN,
-                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_CURRENT_MIN,
+                    "other": threshold.PSU_INPUT_CURRENT_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_CURRENT_MAX,
+                    "other": threshold.PSU_INPUT_CURRENT_MAX,
+                },
                 "Unit": Unit.Current,
                 "format": "float(float(%s)/1000)"
             },
             "InputsPower": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
-                "Min": threshold.PSU_INPUT_POWER_MIN,
-                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_POWER_MIN,
+                    "other": threshold.PSU_INPUT_POWER_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_POWER_MAX,
+                    "other": threshold.PSU_INPUT_POWER_MAX,
+                },
                 "Unit": Unit.Power,
                 "format": "float(float(%s)/1000000)"
             },
             "OutputsStatus": {"bus": 24, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
             "OutputsVoltage": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
-                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
-                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MIN,
+                    "other": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MAX,
+                    "other": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                },
                 "Unit": Unit.Voltage,
                 "format": "float(float(%s)/1000)"
             },
             "OutputsCurrent": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
-                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
-                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_CURRENT_MIN,
+                    "other": threshold.PSU_OUTPUT_CURRENT_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_CURRENT_MAX,
+                    "other": threshold.PSU_OUTPUT_CURRENT_MAX,
+                },
                 "Unit": Unit.Current,
                 "format": "float(float(%s)/1000)"
             },
             "OutputsPower": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-24/24-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
-                "Min": threshold.PSU_OUTPUT_POWER_MIN,
-                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_POWER_MIN,
+                    "other": threshold.PSU_OUTPUT_POWER_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_POWER_MAX,
+                    "other": threshold.PSU_OUTPUT_POWER_MAX,
+                },
                 "Unit": Unit.Power,
                 "format": "float(float(%s)/1000000)"
             },
@@ -174,21 +257,34 @@ class Description:
             "pmbusloc": {"bus": 25, "addr": 0x58, "way": "i2c"},
             "present": {"loc": "/sys/wb_plat/psu/psu2/present", "way": "sysfs", "mask": 0x01, "okval": 1},
             "name": "PSU2",
+            "get_threshold_by_model": 1,
             "psu_display_name": psu_display_name,
             "airflow": psu_fan_airflow,
             "TempStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0004},
             "Temperature": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/temp1_input", "way": "sysfs"},
-                "Min": threshold.PSU_TEMP_MIN,
-                "Max": threshold.PSU_TEMP_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_TEMP_MIN,
+                    "other": threshold.PSU_TEMP_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_TEMP_MAX,
+                    "other": threshold.PSU_TEMP_MAX,
+                },
                 "Unit": Unit.Temperature,
                 "format": "float(float(%s)/1000)"
             },
             "FanStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x0400},
             "FanSpeed": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/fan1_input", "way": "sysfs"},
-                "Min": threshold.PSU_FAN_SPEED_MIN,
-                "Max": threshold.PSU_FAN_SPEED_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_FAN_SPEED_MIN,
+                    "other": threshold.PSU_FAN_SPEED_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_FAN_SPEED_MAX,
+                    "other": threshold.PSU_FAN_SPEED_MAX,
+                },
                 "Unit": Unit.Speed
             },
             "psu_fan_tolerance": 40,
@@ -205,52 +301,94 @@ class Description:
                 },
                 'DC': {
                     "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
-                    "Min": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
-                    "Max": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    "Min": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MIN,
+                        "other": threshold.PSU_DC_INPUT_VOLTAGE_MIN,
+                    },
+                    "Max": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MAX,
+                        "other": threshold.PSU_DC_INPUT_VOLTAGE_MAX,
+                    },
                     "Unit": Unit.Voltage,
                     "format": "float(float(%s)/1000)"
                 },
                 'other': {
                     "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in1_input", "way": "sysfs"},
-                    "Min": threshold.ERR_VALUE,
-                    "Max": threshold.ERR_VALUE,
+                    "Min": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MIN,
+                        "other": threshold.ERR_VALUE,
+                    },
+                    "Max": {
+                        "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_DC_INPUT_VOLTAGE_MAX,
+                        "other": threshold.ERR_VALUE,
+                    },
                     "Unit": Unit.Voltage,
                     "format": "float(float(%s)/1000)"
                 }
             },
             "InputsCurrent": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/curr1_input", "way": "sysfs"},
-                "Min": threshold.PSU_INPUT_CURRENT_MIN,
-                "Max": threshold.PSU_INPUT_CURRENT_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_CURRENT_MIN,
+                    "other": threshold.PSU_INPUT_CURRENT_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_CURRENT_MAX,
+                    "other": threshold.PSU_INPUT_CURRENT_MAX,
+                },
                 "Unit": Unit.Current,
                 "format": "float(float(%s)/1000)"
             },
             "InputsPower": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/power1_input", "way": "sysfs"},
-                "Min": threshold.PSU_INPUT_POWER_MIN,
-                "Max": threshold.PSU_INPUT_POWER_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_POWER_MIN,
+                    "other": threshold.PSU_INPUT_POWER_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_INPUT_POWER_MAX,
+                    "other": threshold.PSU_INPUT_POWER_MAX,
+                },
                 "Unit": Unit.Power,
                 "format": "float(float(%s)/1000000)"
             },
             "OutputsStatus": {"bus": 25, "addr": 0x58, "offset": 0x79, "way": "i2cword", "mask": 0x8800},
             "OutputsVoltage": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/in2_input", "way": "sysfs"},
-                "Min": threshold.PSU_OUTPUT_VOLTAGE_MIN,
-                "Max": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MIN,
+                    "other": threshold.PSU_OUTPUT_VOLTAGE_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_VOLTAGE_MAX,
+                    "other": threshold.PSU_OUTPUT_VOLTAGE_MAX,
+                },
                 "Unit": Unit.Voltage,
                 "format": "float(float(%s)/1000)"
             },
             "OutputsCurrent": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/curr2_input", "way": "sysfs"},
-                "Min": threshold.PSU_OUTPUT_CURRENT_MIN,
-                "Max": threshold.PSU_OUTPUT_CURRENT_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_CURRENT_MIN,
+                    "other": threshold.PSU_OUTPUT_CURRENT_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_CURRENT_MAX,
+                    "other": threshold.PSU_OUTPUT_CURRENT_MAX,
+                },
                 "Unit": Unit.Current,
                 "format": "float(float(%s)/1000)"
             },
             "OutputsPower": {
                 "value": {"loc": "/sys/bus/i2c/devices/i2c-25/25-0058/hwmon/hwmon*/power2_input", "way": "sysfs"},
-                "Min": threshold.PSU_OUTPUT_POWER_MIN,
-                "Max": threshold.PSU_OUTPUT_POWER_MAX,
+                "Min": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_POWER_MIN,
+                    "other": threshold.PSU_OUTPUT_POWER_MIN,
+                },
+                "Max": {
+                    "U1D-D10800-DRB": threshold.ASPOWER_DC_PSU_OUTPUT_POWER_MAX,
+                    "other": threshold.PSU_OUTPUT_POWER_MAX,
+                },
                 "Unit": Unit.Power,
                 "format": "float(float(%s)/1000000)"
             },

From a797bc8889ae4470a80d81e5643f578a6af1e9f5 Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Thu, 28 Sep 2023 16:34:42 +0800
Subject: [PATCH 10/32] update permitted_list

Signed-off-by: philo <philo@micasnetworks.com>
---
 src/sonic-device-data/tests/permitted_list | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/sonic-device-data/tests/permitted_list b/src/sonic-device-data/tests/permitted_list
index b5c9a1644830..76dd0c759df5 100644
--- a/src/sonic-device-data/tests/permitted_list
+++ b/src/sonic-device-data/tests/permitted_list
@@ -343,3 +343,4 @@ svi_my_station_optimization
 warmboot_knet_shutdown_mode
 sai_stats_support_mask
 sai_default_cpu_tx_tc
+oversubscribe_mixed_sister_25_50_enable

From 9cd35678b9ed20826eec5f8e93591e44f82d83db Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Tue, 10 Oct 2023 17:16:45 +0800
Subject: [PATCH 11/32] update wb_i2c_dev_device.c

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../m2-w6510-48v8c/modules/driver/wb_i2c_dev_device.c            | 1 +
 1 file changed, 1 insertion(+)

diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_dev_device.c
index 865e7afea44c..efe4ba726921 100644
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_dev_device.c
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_dev_device.c
@@ -7,6 +7,7 @@
 
 #include <wb_i2c_dev.h>
 
+
 static int g_wb_i2c_dev_device_debug = 0;
 static int g_wb_i2c_dev_device_error = 0;
 

From 08e2b159e3d30db6d23208215bae506b69723d6b Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Wed, 1 Nov 2023 12:04:32 +0800
Subject: [PATCH 12/32] Upload license files

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../firmware_driver_cpld/COPYING              | 340 +++++++++++++++++
 .../firmware_upgrade/firmware_upgrade/COPYING | 340 +++++++++++++++++
 .../firmware_upgrade/fw_upg_gpio_vme/COPYING  | 340 +++++++++++++++++
 .../fw_upg_gpio_vme/LICENSE.Lattice           |  28 ++
 .../common/modules/COPYING                    |  20 +
 .../common/modules/GPL-2.0                    | 359 ++++++++++++++++++
 6 files changed, 1427 insertions(+)
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/COPYING
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/COPYING
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/COPYING
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/LICENSE.Lattice
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/COPYING
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/GPL-2.0

diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/COPYING b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/COPYING
new file mode 100644
index 000000000000..3912109b5cd6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/COPYING
@@ -0,0 +1,340 @@
+		    GNU GENERAL PUBLIC LICENSE
+		       Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+                       51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+			    Preamble
+
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users.  This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it.  (Some other Free Software Foundation software is covered by
+the GNU Library General Public License instead.)  You can apply it to
+your programs, too.
+
+  When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+
+  To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+
+  For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have.  You must make sure that they, too, receive or can get the
+source code.  And you must show them these terms so they know their
+rights.
+
+  We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+
+  Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software.  If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors' reputations.
+
+  Finally, any free program is threatened constantly by software
+patents.  We wish to avoid the danger that redistributors of a free
+program will individually obtain patent licenses, in effect making the
+program proprietary.  To prevent this, we have made it clear that any
+patent must be licensed for everyone's free use or not licensed at all.
+
+  The precise terms and conditions for copying, distribution and
+modification follow.
+
+		    GNU GENERAL PUBLIC LICENSE
+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+  0. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License.  The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
+either verbatim or with modifications and/or translated into another
+language.  (Hereinafter, translation is included without limitation in
+the term "modification".)  Each licensee is addressed as "you".
+
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope.  The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+
+  1. You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+
+  2. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+
+    a) You must cause the modified files to carry prominent notices
+    stating that you changed the files and the date of any change.
+
+    b) You must cause any work that you distribute or publish, that in
+    whole or in part contains or is derived from the Program or any
+    part thereof, to be licensed as a whole at no charge to all third
+    parties under the terms of this License.
+
+    c) If the modified program normally reads commands interactively
+    when run, you must cause it, when started running for such
+    interactive use in the most ordinary way, to print or display an
+    announcement including an appropriate copyright notice and a
+    notice that there is no warranty (or else, saying that you provide
+    a warranty) and that users may redistribute the program under
+    these conditions, and telling the user how to view a copy of this
+    License.  (Exception: if the Program itself is interactive but
+    does not normally print such an announcement, your work based on
+    the Program is not required to print an announcement.)
+
+These requirements apply to the modified work as a whole.  If
+identifiable sections of that work are not derived from the Program,
+and can be reasonably considered independent and separate works in
+themselves, then this License, and its terms, do not apply to those
+sections when you distribute them as separate works.  But when you
+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote it.
+
+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
+collective works based on the Program.
+
+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
+
+  3. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
+
+    a) Accompany it with the complete corresponding machine-readable
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+    years, to give any third party, for a charge no more than your
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+
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+    allowed only for noncommercial distribution and only if you
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+    an offer, in accord with Subsection b above.)
+
+The source code for a work means the preferred form of the work for
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+operating system on which the executable runs, unless that component
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+distribution of the source code, even though third parties are not
+compelled to copy the source along with the object code.
+
+  4. You may not copy, modify, sublicense, or distribute the Program
+except as expressly provided under this License.  Any attempt
+otherwise to copy, modify, sublicense or distribute the Program is
+void, and will automatically terminate your rights under this License.
+However, parties who have received copies, or rights, from you under
+this License will not have their licenses terminated so long as such
+parties remain in full compliance.
+
+  5. You are not required to accept this License, since you have not
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+distribute the Program or its derivative works.  These actions are
+prohibited by law if you do not accept this License.  Therefore, by
+modifying or distributing the Program (or any work based on the
+Program), you indicate your acceptance of this License to do so, and
+all its terms and conditions for copying, distributing or modifying
+the Program or works based on it.
+
+  6. Each time you redistribute the Program (or any work based on the
+Program), the recipient automatically receives a license from the
+original licensor to copy, distribute or modify the Program subject to
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+restrictions on the recipients' exercise of the rights granted herein.
+You are not responsible for enforcing compliance by third parties to
+this License.
+
+  7. If, as a consequence of a court judgment or allegation of patent
+infringement or for any other reason (not limited to patent issues),
+conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
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+License and any other pertinent obligations, then as a consequence you
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+license would not permit royalty-free redistribution of the Program by
+all those who receive copies directly or indirectly through you, then
+the only way you could satisfy both it and this License would be to
+refrain entirely from distribution of the Program.
+
+If any portion of this section is held invalid or unenforceable under
+any particular circumstance, the balance of the section is intended to
+apply and the section as a whole is intended to apply in other
+circumstances.
+
+It is not the purpose of this section to induce you to infringe any
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+such claims; this section has the sole purpose of protecting the
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+to distribute software through any other system and a licensee cannot
+impose that choice.
+
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+
+  8. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
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+
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+of the General Public License from time to time.  Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+Each version is given a distinguishing version number.  If the Program
+specifies a version number of this License which applies to it and "any
+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation.  If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+
+  10. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
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+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this.  Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+
+			    NO WARRANTY
+
+  11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+
+  12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+		     END OF TERMS AND CONDITIONS
+
+	    How to Apply These Terms to Your New Programs
+
+  If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+  To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+    <one line to give the program's name and a brief idea of what it does.>
+    Copyright (C) <year>  <name of author>
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+    Gnomovision version 69, Copyright (C) year name of author
+    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+    This is free software, and you are welcome to redistribute it
+    under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License.  Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  Here is a sample; alter the names:
+
+  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+  `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+  <signature of Ty Coon>, 1 April 1989
+  Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs.  If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library.  If this is what you want to do, use the GNU Library General
+Public License instead of this License.
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/COPYING b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/COPYING
new file mode 100644
index 000000000000..3912109b5cd6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/COPYING
@@ -0,0 +1,340 @@
+		    GNU GENERAL PUBLIC LICENSE
+		       Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+                       51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+			    Preamble
+
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users.  This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it.  (Some other Free Software Foundation software is covered by
+the GNU Library General Public License instead.)  You can apply it to
+your programs, too.
+
+  When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+
+  To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+
+  For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have.  You must make sure that they, too, receive or can get the
+source code.  And you must show them these terms so they know their
+rights.
+
+  We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+
+  Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software.  If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors' reputations.
+
+  Finally, any free program is threatened constantly by software
+patents.  We wish to avoid the danger that redistributors of a free
+program will individually obtain patent licenses, in effect making the
+program proprietary.  To prevent this, we have made it clear that any
+patent must be licensed for everyone's free use or not licensed at all.
+
+  The precise terms and conditions for copying, distribution and
+modification follow.
+
+		    GNU GENERAL PUBLIC LICENSE
+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+  0. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License.  The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
+either verbatim or with modifications and/or translated into another
+language.  (Hereinafter, translation is included without limitation in
+the term "modification".)  Each licensee is addressed as "you".
+
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope.  The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+
+  1. You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+
+  2. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+
+    a) You must cause the modified files to carry prominent notices
+    stating that you changed the files and the date of any change.
+
+    b) You must cause any work that you distribute or publish, that in
+    whole or in part contains or is derived from the Program or any
+    part thereof, to be licensed as a whole at no charge to all third
+    parties under the terms of this License.
+
+    c) If the modified program normally reads commands interactively
+    when run, you must cause it, when started running for such
+    interactive use in the most ordinary way, to print or display an
+    announcement including an appropriate copyright notice and a
+    notice that there is no warranty (or else, saying that you provide
+    a warranty) and that users may redistribute the program under
+    these conditions, and telling the user how to view a copy of this
+    License.  (Exception: if the Program itself is interactive but
+    does not normally print such an announcement, your work based on
+    the Program is not required to print an announcement.)
+
+These requirements apply to the modified work as a whole.  If
+identifiable sections of that work are not derived from the Program,
+and can be reasonably considered independent and separate works in
+themselves, then this License, and its terms, do not apply to those
+sections when you distribute them as separate works.  But when you
+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote it.
+
+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
+collective works based on the Program.
+
+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
+
+  3. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
+
+    a) Accompany it with the complete corresponding machine-readable
+    source code, which must be distributed under the terms of Sections
+    1 and 2 above on a medium customarily used for software interchange; or,
+
+    b) Accompany it with a written offer, valid for at least three
+    years, to give any third party, for a charge no more than your
+    cost of physically performing source distribution, a complete
+    machine-readable copy of the corresponding source code, to be
+    distributed under the terms of Sections 1 and 2 above on a medium
+    customarily used for software interchange; or,
+
+    c) Accompany it with the information you received as to the offer
+    to distribute corresponding source code.  (This alternative is
+    allowed only for noncommercial distribution and only if you
+    received the program in object code or executable form with such
+    an offer, in accord with Subsection b above.)
+
+The source code for a work means the preferred form of the work for
+making modifications to it.  For an executable work, complete source
+code means all the source code for all modules it contains, plus any
+associated interface definition files, plus the scripts used to
+control compilation and installation of the executable.  However, as a
+special exception, the source code distributed need not include
+anything that is normally distributed (in either source or binary
+form) with the major components (compiler, kernel, and so on) of the
+operating system on which the executable runs, unless that component
+itself accompanies the executable.
+
+If distribution of executable or object code is made by offering
+access to copy from a designated place, then offering equivalent
+access to copy the source code from the same place counts as
+distribution of the source code, even though third parties are not
+compelled to copy the source along with the object code.
+
+  4. You may not copy, modify, sublicense, or distribute the Program
+except as expressly provided under this License.  Any attempt
+otherwise to copy, modify, sublicense or distribute the Program is
+void, and will automatically terminate your rights under this License.
+However, parties who have received copies, or rights, from you under
+this License will not have their licenses terminated so long as such
+parties remain in full compliance.
+
+  5. You are not required to accept this License, since you have not
+signed it.  However, nothing else grants you permission to modify or
+distribute the Program or its derivative works.  These actions are
+prohibited by law if you do not accept this License.  Therefore, by
+modifying or distributing the Program (or any work based on the
+Program), you indicate your acceptance of this License to do so, and
+all its terms and conditions for copying, distributing or modifying
+the Program or works based on it.
+
+  6. Each time you redistribute the Program (or any work based on the
+Program), the recipient automatically receives a license from the
+original licensor to copy, distribute or modify the Program subject to
+these terms and conditions.  You may not impose any further
+restrictions on the recipients' exercise of the rights granted herein.
+You are not responsible for enforcing compliance by third parties to
+this License.
+
+  7. If, as a consequence of a court judgment or allegation of patent
+infringement or for any other reason (not limited to patent issues),
+conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License.  If you cannot
+distribute so as to satisfy simultaneously your obligations under this
+License and any other pertinent obligations, then as a consequence you
+may not distribute the Program at all.  For example, if a patent
+license would not permit royalty-free redistribution of the Program by
+all those who receive copies directly or indirectly through you, then
+the only way you could satisfy both it and this License would be to
+refrain entirely from distribution of the Program.
+
+If any portion of this section is held invalid or unenforceable under
+any particular circumstance, the balance of the section is intended to
+apply and the section as a whole is intended to apply in other
+circumstances.
+
+It is not the purpose of this section to induce you to infringe any
+patents or other property right claims or to contest validity of any
+such claims; this section has the sole purpose of protecting the
+integrity of the free software distribution system, which is
+implemented by public license practices.  Many people have made
+generous contributions to the wide range of software distributed
+through that system in reliance on consistent application of that
+system; it is up to the author/donor to decide if he or she is willing
+to distribute software through any other system and a licensee cannot
+impose that choice.
+
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+
+  8. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
+may add an explicit geographical distribution limitation excluding
+those countries, so that distribution is permitted only in or among
+countries not thus excluded.  In such case, this License incorporates
+the limitation as if written in the body of this License.
+
+  9. The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time.  Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+Each version is given a distinguishing version number.  If the Program
+specifies a version number of this License which applies to it and "any
+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation.  If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+
+  10. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
+to ask for permission.  For software which is copyrighted by the Free
+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this.  Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+
+			    NO WARRANTY
+
+  11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE RISK AS
+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+
+  12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+		     END OF TERMS AND CONDITIONS
+
+	    How to Apply These Terms to Your New Programs
+
+  If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+  To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+    <one line to give the program's name and a brief idea of what it does.>
+    Copyright (C) <year>  <name of author>
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+    Gnomovision version 69, Copyright (C) year name of author
+    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+    This is free software, and you are welcome to redistribute it
+    under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License.  Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  Here is a sample; alter the names:
+
+  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+  `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+  <signature of Ty Coon>, 1 April 1989
+  Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs.  If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library.  If this is what you want to do, use the GNU Library General
+Public License instead of this License.
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/COPYING b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/COPYING
new file mode 100644
index 000000000000..3912109b5cd6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/COPYING
@@ -0,0 +1,340 @@
+		    GNU GENERAL PUBLIC LICENSE
+		       Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+                       51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+			    Preamble
+
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users.  This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it.  (Some other Free Software Foundation software is covered by
+the GNU Library General Public License instead.)  You can apply it to
+your programs, too.
+
+  When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+
+  To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+
+  For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have.  You must make sure that they, too, receive or can get the
+source code.  And you must show them these terms so they know their
+rights.
+
+  We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+
+  Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software.  If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors' reputations.
+
+  Finally, any free program is threatened constantly by software
+patents.  We wish to avoid the danger that redistributors of a free
+program will individually obtain patent licenses, in effect making the
+program proprietary.  To prevent this, we have made it clear that any
+patent must be licensed for everyone's free use or not licensed at all.
+
+  The precise terms and conditions for copying, distribution and
+modification follow.
+
+		    GNU GENERAL PUBLIC LICENSE
+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+  0. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License.  The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
+either verbatim or with modifications and/or translated into another
+language.  (Hereinafter, translation is included without limitation in
+the term "modification".)  Each licensee is addressed as "you".
+
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope.  The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+
+  1. You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+
+  2. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+
+    a) You must cause the modified files to carry prominent notices
+    stating that you changed the files and the date of any change.
+
+    b) You must cause any work that you distribute or publish, that in
+    whole or in part contains or is derived from the Program or any
+    part thereof, to be licensed as a whole at no charge to all third
+    parties under the terms of this License.
+
+    c) If the modified program normally reads commands interactively
+    when run, you must cause it, when started running for such
+    interactive use in the most ordinary way, to print or display an
+    announcement including an appropriate copyright notice and a
+    notice that there is no warranty (or else, saying that you provide
+    a warranty) and that users may redistribute the program under
+    these conditions, and telling the user how to view a copy of this
+    License.  (Exception: if the Program itself is interactive but
+    does not normally print such an announcement, your work based on
+    the Program is not required to print an announcement.)
+
+These requirements apply to the modified work as a whole.  If
+identifiable sections of that work are not derived from the Program,
+and can be reasonably considered independent and separate works in
+themselves, then this License, and its terms, do not apply to those
+sections when you distribute them as separate works.  But when you
+distribute the same sections as part of a whole which is a work based
+on the Program, the distribution of the whole must be on the terms of
+this License, whose permissions for other licensees extend to the
+entire whole, and thus to each and every part regardless of who wrote it.
+
+Thus, it is not the intent of this section to claim rights or contest
+your rights to work written entirely by you; rather, the intent is to
+exercise the right to control the distribution of derivative or
+collective works based on the Program.
+
+In addition, mere aggregation of another work not based on the Program
+with the Program (or with a work based on the Program) on a volume of
+a storage or distribution medium does not bring the other work under
+the scope of this License.
+
+  3. You may copy and distribute the Program (or a work based on it,
+under Section 2) in object code or executable form under the terms of
+Sections 1 and 2 above provided that you also do one of the following:
+
+    a) Accompany it with the complete corresponding machine-readable
+    source code, which must be distributed under the terms of Sections
+    1 and 2 above on a medium customarily used for software interchange; or,
+
+    b) Accompany it with a written offer, valid for at least three
+    years, to give any third party, for a charge no more than your
+    cost of physically performing source distribution, a complete
+    machine-readable copy of the corresponding source code, to be
+    distributed under the terms of Sections 1 and 2 above on a medium
+    customarily used for software interchange; or,
+
+    c) Accompany it with the information you received as to the offer
+    to distribute corresponding source code.  (This alternative is
+    allowed only for noncommercial distribution and only if you
+    received the program in object code or executable form with such
+    an offer, in accord with Subsection b above.)
+
+The source code for a work means the preferred form of the work for
+making modifications to it.  For an executable work, complete source
+code means all the source code for all modules it contains, plus any
+associated interface definition files, plus the scripts used to
+control compilation and installation of the executable.  However, as a
+special exception, the source code distributed need not include
+anything that is normally distributed (in either source or binary
+form) with the major components (compiler, kernel, and so on) of the
+operating system on which the executable runs, unless that component
+itself accompanies the executable.
+
+If distribution of executable or object code is made by offering
+access to copy from a designated place, then offering equivalent
+access to copy the source code from the same place counts as
+distribution of the source code, even though third parties are not
+compelled to copy the source along with the object code.
+
+  4. You may not copy, modify, sublicense, or distribute the Program
+except as expressly provided under this License.  Any attempt
+otherwise to copy, modify, sublicense or distribute the Program is
+void, and will automatically terminate your rights under this License.
+However, parties who have received copies, or rights, from you under
+this License will not have their licenses terminated so long as such
+parties remain in full compliance.
+
+  5. You are not required to accept this License, since you have not
+signed it.  However, nothing else grants you permission to modify or
+distribute the Program or its derivative works.  These actions are
+prohibited by law if you do not accept this License.  Therefore, by
+modifying or distributing the Program (or any work based on the
+Program), you indicate your acceptance of this License to do so, and
+all its terms and conditions for copying, distributing or modifying
+the Program or works based on it.
+
+  6. Each time you redistribute the Program (or any work based on the
+Program), the recipient automatically receives a license from the
+original licensor to copy, distribute or modify the Program subject to
+these terms and conditions.  You may not impose any further
+restrictions on the recipients' exercise of the rights granted herein.
+You are not responsible for enforcing compliance by third parties to
+this License.
+
+  7. If, as a consequence of a court judgment or allegation of patent
+infringement or for any other reason (not limited to patent issues),
+conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License.  If you cannot
+distribute so as to satisfy simultaneously your obligations under this
+License and any other pertinent obligations, then as a consequence you
+may not distribute the Program at all.  For example, if a patent
+license would not permit royalty-free redistribution of the Program by
+all those who receive copies directly or indirectly through you, then
+the only way you could satisfy both it and this License would be to
+refrain entirely from distribution of the Program.
+
+If any portion of this section is held invalid or unenforceable under
+any particular circumstance, the balance of the section is intended to
+apply and the section as a whole is intended to apply in other
+circumstances.
+
+It is not the purpose of this section to induce you to infringe any
+patents or other property right claims or to contest validity of any
+such claims; this section has the sole purpose of protecting the
+integrity of the free software distribution system, which is
+implemented by public license practices.  Many people have made
+generous contributions to the wide range of software distributed
+through that system in reliance on consistent application of that
+system; it is up to the author/donor to decide if he or she is willing
+to distribute software through any other system and a licensee cannot
+impose that choice.
+
+This section is intended to make thoroughly clear what is believed to
+be a consequence of the rest of this License.
+
+  8. If the distribution and/or use of the Program is restricted in
+certain countries either by patents or by copyrighted interfaces, the
+original copyright holder who places the Program under this License
+may add an explicit geographical distribution limitation excluding
+those countries, so that distribution is permitted only in or among
+countries not thus excluded.  In such case, this License incorporates
+the limitation as if written in the body of this License.
+
+  9. The Free Software Foundation may publish revised and/or new versions
+of the General Public License from time to time.  Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+Each version is given a distinguishing version number.  If the Program
+specifies a version number of this License which applies to it and "any
+later version", you have the option of following the terms and conditions
+either of that version or of any later version published by the Free
+Software Foundation.  If the Program does not specify a version number of
+this License, you may choose any version ever published by the Free Software
+Foundation.
+
+  10. If you wish to incorporate parts of the Program into other free
+programs whose distribution conditions are different, write to the author
+to ask for permission.  For software which is copyrighted by the Free
+Software Foundation, write to the Free Software Foundation; we sometimes
+make exceptions for this.  Our decision will be guided by the two goals
+of preserving the free status of all derivatives of our free software and
+of promoting the sharing and reuse of software generally.
+
+			    NO WARRANTY
+
+  11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE RISK AS
+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+
+  12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+		     END OF TERMS AND CONDITIONS
+
+	    How to Apply These Terms to Your New Programs
+
+  If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+  To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+    <one line to give the program's name and a brief idea of what it does.>
+    Copyright (C) <year>  <name of author>
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+    Gnomovision version 69, Copyright (C) year name of author
+    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+    This is free software, and you are welcome to redistribute it
+    under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License.  Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  Here is a sample; alter the names:
+
+  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+  `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+  <signature of Ty Coon>, 1 April 1989
+  Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs.  If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library.  If this is what you want to do, use the GNU Library General
+Public License instead of this License.
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/LICENSE.Lattice b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/LICENSE.Lattice
new file mode 100644
index 000000000000..259613f09129
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/LICENSE.Lattice
@@ -0,0 +1,28 @@
+LATTICE DIAMOND PROGRAMMER EMBEDDED AND ispVM EMBEDDED SOFTWARE
+LICENSE TERMS
+The Lattice Diamond Programmer Embedded Software (and ispVM Embedded Software) is subject to the
+following licensing terms:
+Copyright (c) 2016, Lattice Semiconductor Corporation. All rights reserved.
+Redistribution and use in source and binary forms, with or without modification, are permitted provided
+that the following conditions are met:
+•
+•
+Redistributions of source code must retain the above copyright notice, this list of
+conditions and the following disclaimer.
+Redistributions in binary form must reproduce the above copyright notice, this list of
+conditions and the following disclaimer in the documentation and/or other materials
+provided with the distribution.•
+Neither the name of Lattice Semiconductor Corporation, its affiliates, or the names of its
+contributors may be used to endorse or promote products derived from this software
+without specific prior written permission.
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/COPYING b/platform/broadcom/sonic-platform-modules-micas/common/modules/COPYING
new file mode 100644
index 000000000000..a635a38ef940
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/COPYING
@@ -0,0 +1,20 @@
+The Linux Kernel is provided under:
+
+	SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+
+Being under the terms of the GNU General Public License version 2 only,
+according with:
+
+	LICENSES/preferred/GPL-2.0
+
+With an explicit syscall exception, as stated at:
+
+	LICENSES/exceptions/Linux-syscall-note
+
+In addition, other licenses may also apply. Please see:
+
+	Documentation/process/license-rules.rst
+
+for more details.
+
+All contributions to the Linux Kernel are subject to this COPYING file.
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/GPL-2.0 b/platform/broadcom/sonic-platform-modules-micas/common/modules/GPL-2.0
new file mode 100644
index 000000000000..ff0812fd89cc
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/GPL-2.0
@@ -0,0 +1,359 @@
+Valid-License-Identifier: GPL-2.0
+Valid-License-Identifier: GPL-2.0-only
+Valid-License-Identifier: GPL-2.0+
+Valid-License-Identifier: GPL-2.0-or-later
+SPDX-URL: https://spdx.org/licenses/GPL-2.0.html
+Usage-Guide:
+  To use this license in source code, put one of the following SPDX
+  tag/value pairs into a comment according to the placement
+  guidelines in the licensing rules documentation.
+  For 'GNU General Public License (GPL) version 2 only' use:
+    SPDX-License-Identifier: GPL-2.0
+  or
+    SPDX-License-Identifier: GPL-2.0-only
+  For 'GNU General Public License (GPL) version 2 or any later version' use:
+    SPDX-License-Identifier: GPL-2.0+
+  or
+    SPDX-License-Identifier: GPL-2.0-or-later
+License-Text:
+
+		    GNU GENERAL PUBLIC LICENSE
+		       Version 2, June 1991
+
+ Copyright (C) 1989, 1991 Free Software Foundation, Inc.
+                       51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+			    Preamble
+
+  The licenses for most software are designed to take away your
+freedom to share and change it.  By contrast, the GNU General Public
+License is intended to guarantee your freedom to share and change free
+software--to make sure the software is free for all its users.  This
+General Public License applies to most of the Free Software
+Foundation's software and to any other program whose authors commit to
+using it.  (Some other Free Software Foundation software is covered by
+the GNU Library General Public License instead.)  You can apply it to
+your programs, too.
+
+  When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+this service if you wish), that you receive source code or can get it
+if you want it, that you can change the software or use pieces of it
+in new free programs; and that you know you can do these things.
+
+  To protect your rights, we need to make restrictions that forbid
+anyone to deny you these rights or to ask you to surrender the rights.
+These restrictions translate to certain responsibilities for you if you
+distribute copies of the software, or if you modify it.
+
+  For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must give the recipients all the rights that
+you have.  You must make sure that they, too, receive or can get the
+source code.  And you must show them these terms so they know their
+rights.
+
+  We protect your rights with two steps: (1) copyright the software, and
+(2) offer you this license which gives you legal permission to copy,
+distribute and/or modify the software.
+
+  Also, for each author's protection and ours, we want to make certain
+that everyone understands that there is no warranty for this free
+software.  If the software is modified by someone else and passed on, we
+want its recipients to know that what they have is not the original, so
+that any problems introduced by others will not reflect on the original
+authors' reputations.
+
+  Finally, any free program is threatened constantly by software
+patents.  We wish to avoid the danger that redistributors of a free
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+program proprietary.  To prevent this, we have made it clear that any
+patent must be licensed for everyone's free use or not licensed at all.
+
+  The precise terms and conditions for copying, distribution and
+modification follow.
+
+		    GNU GENERAL PUBLIC LICENSE
+   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
+
+  0. This License applies to any program or other work which contains
+a notice placed by the copyright holder saying it may be distributed
+under the terms of this General Public License.  The "Program", below,
+refers to any such program or work, and a "work based on the Program"
+means either the Program or any derivative work under copyright law:
+that is to say, a work containing the Program or a portion of it,
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+language.  (Hereinafter, translation is included without limitation in
+the term "modification".)  Each licensee is addressed as "you".
+
+Activities other than copying, distribution and modification are not
+covered by this License; they are outside its scope.  The act of
+running the Program is not restricted, and the output from the Program
+is covered only if its contents constitute a work based on the
+Program (independent of having been made by running the Program).
+Whether that is true depends on what the Program does.
+
+  1. You may copy and distribute verbatim copies of the Program's
+source code as you receive it, in any medium, provided that you
+conspicuously and appropriately publish on each copy an appropriate
+copyright notice and disclaimer of warranty; keep intact all the
+notices that refer to this License and to the absence of any warranty;
+and give any other recipients of the Program a copy of this License
+along with the Program.
+
+You may charge a fee for the physical act of transferring a copy, and
+you may at your option offer warranty protection in exchange for a fee.
+
+  2. You may modify your copy or copies of the Program or any portion
+of it, thus forming a work based on the Program, and copy and
+distribute such modifications or work under the terms of Section 1
+above, provided that you also meet all of these conditions:
+
+    a) You must cause the modified files to carry prominent notices
+    stating that you changed the files and the date of any change.
+
+    b) You must cause any work that you distribute or publish, that in
+    whole or in part contains or is derived from the Program or any
+    part thereof, to be licensed as a whole at no charge to all third
+    parties under the terms of this License.
+
+    c) If the modified program normally reads commands interactively
+    when run, you must cause it, when started running for such
+    interactive use in the most ordinary way, to print or display an
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+    notice that there is no warranty (or else, saying that you provide
+    a warranty) and that users may redistribute the program under
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+
+These requirements apply to the modified work as a whole.  If
+identifiable sections of that work are not derived from the Program,
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+distribute the same sections as part of a whole which is a work based
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+Thus, it is not the intent of this section to claim rights or contest
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+
+This section is intended to make thoroughly clear what is believed to
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+
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+be similar in spirit to the present version, but may differ in detail to
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+
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+either of that version or of any later version published by the Free
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+Foundation.
+
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+
+			    NO WARRANTY
+
+  11. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY
+FOR THE PROGRAM, TO THE EXTENT PERMITTED BY APPLICABLE LAW.  EXCEPT WHEN
+OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES
+PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED
+OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE RISK AS
+TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.  SHOULD THE
+PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING,
+REPAIR OR CORRECTION.
+
+  12. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
+WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR
+REDISTRIBUTE THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES,
+INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING
+OUT OF THE USE OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED
+TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY
+YOU OR THIRD PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGES.
+
+		     END OF TERMS AND CONDITIONS
+
+	    How to Apply These Terms to Your New Programs
+
+  If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+  To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+convey the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+    <one line to give the program's name and a brief idea of what it does.>
+    Copyright (C) <year>  <name of author>
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+
+
+Also add information on how to contact you by electronic and paper mail.
+
+If the program is interactive, make it output a short notice like this
+when it starts in an interactive mode:
+
+    Gnomovision version 69, Copyright (C) year name of author
+    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+    This is free software, and you are welcome to redistribute it
+    under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License.  Of course, the commands you use may
+be called something other than `show w' and `show c'; they could even be
+mouse-clicks or menu items--whatever suits your program.
+
+You should also get your employer (if you work as a programmer) or your
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  Here is a sample; alter the names:
+
+  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
+  `Gnomovision' (which makes passes at compilers) written by James Hacker.
+
+  <signature of Ty Coon>, 1 April 1989
+  Ty Coon, President of Vice
+
+This General Public License does not permit incorporating your program into
+proprietary programs.  If your program is a subroutine library, you may
+consider it more useful to permit linking proprietary applications with the
+library.  If this is what you want to do, use the GNU Library General
+Public License instead of this License.

From de10b739c766428771ccc91d732dbd968d96366e Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Fri, 3 Nov 2023 17:22:37 +0800
Subject: [PATCH 13/32] delete firmware upgrade func

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../common/Makefile                           |    1 -
 .../common/app/firmware_upgrade/Makefile      |   19 -
 .../common/app/firmware_upgrade/Rules.mk      |   42 -
 .../firmware_upgrade/firmware_driver/Makefile |   19 -
 .../firmware_driver_cpld/COPYING              |  340 --
 .../firmware_driver_cpld/Makefile             |   23 -
 .../firmware_driver_cpld/firmware.c           |  144 -
 .../firmware_driver_cpld/firmware_cpld.c      |  384 --
 .../firmware_cpld_upgrade.c                   | 1879 ---------
 .../firmware_driver_cpld/include/firmware.h   |   82 -
 .../include/firmware_cpld.h                   |   64 -
 .../firmware_driver_cpld/include/jbi.h        |   15 -
 .../firmware_driver_cpld/jbicomp.c            |  438 ---
 .../firmware_driver_cpld/jbicomp.h            |   37 -
 .../firmware_driver_cpld/jbiexprt.h           |  224 --
 .../firmware_driver_cpld/jbijtag.c            | 1679 --------
 .../firmware_driver_cpld/jbijtag.h            |  146 -
 .../firmware_driver_cpld/jbimain.c            | 3362 -----------------
 .../firmware_driver_cpld/jbiport.h            |   45 -
 .../firmware_driver_cpld/jbistub.c            | 2518 ------------
 .../firmware_driver_cpld/jbistub.h            |   95 -
 .../firmware_driver_ispvme/Makefile           |   22 -
 .../firmware_cpld_ispvme.c                    |  450 ---
 .../firmware_cpld_upgrade_ispvme.c            |  691 ----
 .../firmware_driver_ispvme/firmware_ispvme.c  |  140 -
 .../include/firmware_cpld_ispvme.h            |   70 -
 .../include/firmware_ispvme.h                 |   86 -
 .../firmware_driver_sysfs/Makefile            |   22 -
 .../firmware_driver_sysfs/firmware.c          |  143 -
 .../firmware_driver_sysfs/firmware_sysfs.c    |  495 ---
 .../firmware_sysfs_upgrade.c                  |  258 --
 .../include/firmware_sysfs.h                  |   88 -
 .../include/firmware_sysfs_upgrade.h          |   72 -
 .../include/firmware_upgrade.h                |   57 -
 .../firmware_upgrade/firmware_upgrade/COPYING |  340 --
 .../firmware_upgrade/Makefile                 |   33 -
 .../firmware_upgrade/firmware_upgrade/crc32.c |  216 --
 .../firmware_upgrade/firmware_upgrade/debug.c |   60 -
 .../firmware_upgrade/firmware_app.c           |  985 -----
 .../firmware_upgrade/fw_upg_gpio_vme/COPYING  |  340 --
 .../fw_upg_gpio_vme/LICENSE.Lattice           |   28 -
 .../fw_upg_gpio_vme/hardware.c                |  263 --
 .../fw_upg_gpio_vme/ispvm_ui.c                |  837 ----
 .../fw_upg_gpio_vme/ivm_core.c                | 3097 ---------------
 .../fw_upg_isc/firmware_upgrade_isc.c         |   68 -
 .../fw_upg_mtd/firmware_upgrade_mtd.c         |  446 ---
 .../fw_upg_mtd/firmware_upgrade_mtd.h         |   32 -
 .../firmware_upgrade/fw_upg_mtd/mtd-abi.h     |  259 --
 .../fw_upg_sysfs/firmware_upgrade_sysfs.c     |  285 --
 .../fw_upg_sysfs/firmware_upgrade_sysfs.h     |   16 -
 .../fw_upg_sysfs/fw_upg_spi_logic_dev.c       | 1181 ------
 .../fw_upg_sysfs/fw_upg_spi_logic_dev.h       |   90 -
 .../firmware_upgrade/include/debug.h          |   34 -
 .../firmware_upgrade/include/firmware_app.h   |  172 -
 .../firmware_upgrade/include/vmopcode.h       |  192 -
 .../common/modules/Makefile                   |    2 +
 .../common/modules/linux-5.10/Makefile        |    1 +
 .../common/modules/linux-5.10/wb_i2c_ismt.c   |    7 +-
 .../common/modules/linux-5.10/wb_ucd9000.c    |    3 +-
 .../modules/linux-5.10/wb_xdpe132g5c_pmbus.c  |  281 ++
 .../modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c  |    3 +
 .../plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c     |   51 +-
 .../plat_sysfs/dev_cfg/include/dfd_cfg_info.h |    2 +
 .../common/modules/sdhci/Makefile             |   18 +
 .../common/modules/sdhci/cqhci.h              |  242 ++
 .../common/modules/sdhci/sdhci-pci-arasan.c   |  331 ++
 .../common/modules/sdhci/sdhci-pci-core.c     | 2566 +++++++++++++
 .../common/modules/sdhci/sdhci-pci-dwc-mshc.c |   84 +
 .../common/modules/sdhci/sdhci-pci-gli.c      |  865 +++++
 .../common/modules/sdhci/sdhci-pci-o2micro.c  |  862 +++++
 .../common/modules/sdhci/sdhci-pci.h          |  203 +
 .../common/modules/sdhci/sdhci.h              |  811 ++++
 .../common/modules/wb_spi_gpio_device.c       |   10 +
 .../common/script/drv_update.py               |  152 +
 .../common/script/platform_common.py          |    4 +
 .../common/script/platform_config.py          |    4 +
 .../common/script/platform_process.py         |    8 +
 .../common/sonic_platform/sfp.py              |   16 +-
 .../.upgrade_test/cpld_test_header.vme        |  Bin 0 -> 406 bytes
 .../.upgrade_test/fpga_test_header.bin        |   10 +
 .../m2-w6510-48v8c/Makefile                   |    3 +
 .../x86_64_micas_m2_w6510_48v8c_r0_config.py  |   16 +-
 .../m2-w6510-48v8c/modules/driver/Makefile    |    3 -
 .../driver/wb_firmware_upgrade_device.c       |  174 -
 .../modules/driver/wb_i2c_dev_device.c        |    1 -
 85 files changed, 6523 insertions(+), 23334 deletions(-)
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/Makefile
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/Rules.mk
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/Makefile
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/COPYING
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/Makefile
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/firmware.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/firmware_cpld.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/firmware_cpld_upgrade.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/include/firmware.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/include/firmware_cpld.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/include/jbi.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbicomp.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbicomp.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbiexprt.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbijtag.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbijtag.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbimain.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbiport.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbistub.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbistub.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/Makefile
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/firmware_cpld_ispvme.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/firmware_cpld_upgrade_ispvme.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/firmware_ispvme.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/include/firmware_cpld_ispvme.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/include/firmware_ispvme.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/Makefile
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/firmware.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/firmware_sysfs.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/firmware_sysfs_upgrade.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/include/firmware_sysfs.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/include/firmware_sysfs_upgrade.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/include/firmware_upgrade.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/COPYING
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/Makefile
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/crc32.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/debug.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/firmware_app.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/COPYING
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/LICENSE.Lattice
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/hardware.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/ispvm_ui.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/ivm_core.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_isc/firmware_upgrade_isc.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_mtd/firmware_upgrade_mtd.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_mtd/firmware_upgrade_mtd.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_mtd/mtd-abi.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/firmware_upgrade_sysfs.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/firmware_upgrade_sysfs.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/fw_upg_spi_logic_dev.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/fw_upg_spi_logic_dev.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/include/debug.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/include/firmware_app.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/include/vmopcode.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/cqhci.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-arasan.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-core.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-dwc-mshc.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-gli.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-o2micro.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci.h
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/drv_update.py
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/cpld_test_header.vme
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/fpga_test_header.bin
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_firmware_upgrade_device.c

diff --git a/platform/broadcom/sonic-platform-modules-micas/common/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/Makefile
index 578d65b3bf3e..385dae0884fb 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/common/Makefile
@@ -30,7 +30,6 @@ all:
 	@if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi
 	@if [ -d $(PWD)/lib/ ]; then cp -r $(PWD)/lib/* ${INSTALL_LIB_DIR} ;fi
 	@if [ -d $(PWD)/sonic_platform/ ]; then cp -rf $(PWD)/sonic_platform ${INSTALL_LIB_DIR} ;fi
-	cp -r $(app_build_dir)/module/*.ko $(INSTALL_MODULE_DIR)
 	cp -r $(modules_build_dir)/*.ko $(INSTALL_MODULE_DIR)
 	cp -r $(app_dir)/build/app/*  $(INSTALL_SCRIPT_DIR)
 	cp -r $(SCRIPT_DIR)/*  $(INSTALL_SCRIPT_DIR)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/Makefile
deleted file mode 100644
index 62663efdbbd5..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/Makefile
+++ /dev/null
@@ -1,19 +0,0 @@
-top_srcdir:=$(shell pwd)
-include $(top_srcdir)/Rules.mk
-
-firmware-y:=
-firmware-y += firmware_driver
-firmware-y += firmware_upgrade
-
-.PHONY: all
-all: build
-
-.PHONY: build
-build: $(firmware-y)
-$(foreach dir,$(firmware-y),$(eval $(call compile_dirs,$(dir))))
-
-.PHONY: rpmpkg
-rpmpkg:
-ifeq ("$(CONFIG_CPLD_UPGRADE_ISPVME)", "y")
-	#$(RPMPKG) $(install_cpld_dir) firmware-cpld-ispvme.spec git
-endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/Rules.mk b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/Rules.mk
deleted file mode 100644
index 5fb5a09d34fd..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/Rules.mk
+++ /dev/null
@@ -1,42 +0,0 @@
-CC ?= $(CROSS)gcc
-AR ?= $(CROSS)ar
-AS ?= $(CROSS)as
-LD ?= $(CROSS)ld
-STRIP ?= $(CROSS)strip
-
-install_root:=${top_srcdir}/images
-
-install_header_dir:=${install_root}/header
-install_adir:=$(install_root)/lib
-install_symbol_dir:=$(install_root)/symbol
-symbol_files:=$(shell find $(EXPORT_SYMBOL) -name 'Module.symvers')
-#
-# symbol_files += $(shell find $(install_symbol_dir) -name 'Module.symvers')
-# KBUILD_EXTRA_SYMBOLS += $(symbol_files)
-# export KBUILD_EXTRA_SYMBOLS
-
-# top root: install_rootfs_dir
-install_rootfs_dir:=$(install_root)/rootfs
-
-install_sodir:=$(install_rootfs_dir)/$(INSTALL_SODIR)
-
-install_usr_bin_dir:=$(install_rootfs_dir)/usr/bin
-install_sbin_dir:=$(install_rootfs_dir)/sbin
-install_etc_dir:=$(install_rootfs_dir)/etc
-
-export INSTALL_MOD_PATH:=$(ROOT)
-
-BUILD_CFLAGS:=$(CFLAGS) -I$(install_header_dir)
-BUILD_LDFLAGS:=$(LDFLAGS) -L/$(install_sodir) -L/$(install_adir)
-
-define compile_dirs
-.PHONY: $(1)
-$(1):
-	@echo;echo "building $(1)..."
-	@$(MAKE) -C ${1}
-endef
-
-compile.c = $(CC) $(BUILD_CFLAGS) -d -c -o $@ $<
-%.o: %.c
-	$(compile.c)
-
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/Makefile
deleted file mode 100644
index e8879aeff5e7..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/Makefile
+++ /dev/null
@@ -1,19 +0,0 @@
-include $(top_srcdir)/Rules.mk
-
-firmware-y:=
-firmware-y += firmware_driver_ispvme
-firmware-y += firmware_driver_cpld
-firmware-y += firmware_driver_sysfs
-
-.PHONY: all
-all: build
-
-.PHONY: build
-build: $(firmware-y)
-$(foreach dir,$(firmware-y),$(eval $(call compile_dirs,$(dir))))
-
-.PHONY: rpmpkg
-rpmpkg:
-ifeq ("$(CONFIG_CPLD_UPGRADE_ISPVME)", "y")
-	#$(RPMPKG) $(install_cpld_dir) firmware-cpld-ispvme.spec git
-endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/COPYING b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/COPYING
deleted file mode 100644
index 3912109b5cd6..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/COPYING
+++ /dev/null
@@ -1,340 +0,0 @@
-		    GNU GENERAL PUBLIC LICENSE
-		       Version 2, June 1991
-
- Copyright (C) 1989, 1991 Free Software Foundation, Inc.
-                       51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
- Everyone is permitted to copy and distribute verbatim copies
- of this license document, but changing it is not allowed.
-
-			    Preamble
-
-  The licenses for most software are designed to take away your
-freedom to share and change it.  By contrast, the GNU General Public
-License is intended to guarantee your freedom to share and change free
-software--to make sure the software is free for all its users.  This
-General Public License applies to most of the Free Software
-Foundation's software and to any other program whose authors commit to
-using it.  (Some other Free Software Foundation software is covered by
-the GNU Library General Public License instead.)  You can apply it to
-your programs, too.
-
-  When we speak of free software, we are referring to freedom, not
-price.  Our General Public Licenses are designed to make sure that you
-have the freedom to distribute copies of free software (and charge for
-this service if you wish), that you receive source code or can get it
-if you want it, that you can change the software or use pieces of it
-in new free programs; and that you know you can do these things.
-
-  To protect your rights, we need to make restrictions that forbid
-anyone to deny you these rights or to ask you to surrender the rights.
-These restrictions translate to certain responsibilities for you if you
-distribute copies of the software, or if you modify it.
-
-  For example, if you distribute copies of such a program, whether
-gratis or for a fee, you must give the recipients all the rights that
-you have.  You must make sure that they, too, receive or can get the
-source code.  And you must show them these terms so they know their
-rights.
-
-  We protect your rights with two steps: (1) copyright the software, and
-(2) offer you this license which gives you legal permission to copy,
-distribute and/or modify the software.
-
-  Also, for each author's protection and ours, we want to make certain
-that everyone understands that there is no warranty for this free
-software.  If the software is modified by someone else and passed on, we
-want its recipients to know that what they have is not the original, so
-that any problems introduced by others will not reflect on the original
-authors' reputations.
-
-  Finally, any free program is threatened constantly by software
-patents.  We wish to avoid the danger that redistributors of a free
-program will individually obtain patent licenses, in effect making the
-program proprietary.  To prevent this, we have made it clear that any
-patent must be licensed for everyone's free use or not licensed at all.
-
-  The precise terms and conditions for copying, distribution and
-modification follow.
-
-		    GNU GENERAL PUBLIC LICENSE
-   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
-
-  0. This License applies to any program or other work which contains
-a notice placed by the copyright holder saying it may be distributed
-under the terms of this General Public License.  The "Program", below,
-refers to any such program or work, and a "work based on the Program"
-means either the Program or any derivative work under copyright law:
-that is to say, a work containing the Program or a portion of it,
-either verbatim or with modifications and/or translated into another
-language.  (Hereinafter, translation is included without limitation in
-the term "modification".)  Each licensee is addressed as "you".
-
-Activities other than copying, distribution and modification are not
-covered by this License; they are outside its scope.  The act of
-running the Program is not restricted, and the output from the Program
-is covered only if its contents constitute a work based on the
-Program (independent of having been made by running the Program).
-Whether that is true depends on what the Program does.
-
-  1. You may copy and distribute verbatim copies of the Program's
-source code as you receive it, in any medium, provided that you
-conspicuously and appropriately publish on each copy an appropriate
-copyright notice and disclaimer of warranty; keep intact all the
-notices that refer to this License and to the absence of any warranty;
-and give any other recipients of the Program a copy of this License
-along with the Program.
-
-You may charge a fee for the physical act of transferring a copy, and
-you may at your option offer warranty protection in exchange for a fee.
-
-  2. You may modify your copy or copies of the Program or any portion
-of it, thus forming a work based on the Program, and copy and
-distribute such modifications or work under the terms of Section 1
-above, provided that you also meet all of these conditions:
-
-    a) You must cause the modified files to carry prominent notices
-    stating that you changed the files and the date of any change.
-
-    b) You must cause any work that you distribute or publish, that in
-    whole or in part contains or is derived from the Program or any
-    part thereof, to be licensed as a whole at no charge to all third
-    parties under the terms of this License.
-
-    c) If the modified program normally reads commands interactively
-    when run, you must cause it, when started running for such
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-    a warranty) and that users may redistribute the program under
-    these conditions, and telling the user how to view a copy of this
-    License.  (Exception: if the Program itself is interactive but
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-    the Program is not required to print an announcement.)
-
-These requirements apply to the modified work as a whole.  If
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-sections when you distribute them as separate works.  But when you
-distribute the same sections as part of a whole which is a work based
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-this License, whose permissions for other licensees extend to the
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-Thus, it is not the intent of this section to claim rights or contest
-your rights to work written entirely by you; rather, the intent is to
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-collective works based on the Program.
-
-In addition, mere aggregation of another work not based on the Program
-with the Program (or with a work based on the Program) on a volume of
-a storage or distribution medium does not bring the other work under
-the scope of this License.
-
-  3. You may copy and distribute the Program (or a work based on it,
-under Section 2) in object code or executable form under the terms of
-Sections 1 and 2 above provided that you also do one of the following:
-
-    a) Accompany it with the complete corresponding machine-readable
-    source code, which must be distributed under the terms of Sections
-    1 and 2 above on a medium customarily used for software interchange; or,
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-
-  8. If the distribution and/or use of the Program is restricted in
-certain countries either by patents or by copyrighted interfaces, the
-original copyright holder who places the Program under this License
-may add an explicit geographical distribution limitation excluding
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-Foundation.
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-		     END OF TERMS AND CONDITIONS
-
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-    Copyright (C) <year>  <name of author>
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-    This program is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 2 of the License, or
-    (at your option) any later version.
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-    This program is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
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-    along with this program; if not, write to the Free Software
-    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
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-Also add information on how to contact you by electronic and paper mail.
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-when it starts in an interactive mode:
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-    Gnomovision version 69, Copyright (C) year name of author
-    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
-    This is free software, and you are welcome to redistribute it
-    under certain conditions; type `show c' for details.
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-The hypothetical commands `show w' and `show c' should show the appropriate
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-be called something other than `show w' and `show c'; they could even be
-mouse-clicks or menu items--whatever suits your program.
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-You should also get your employer (if you work as a programmer) or your
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-  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
-  `Gnomovision' (which makes passes at compilers) written by James Hacker.
-
-  <signature of Ty Coon>, 1 April 1989
-  Ty Coon, President of Vice
-
-This General Public License does not permit incorporating your program into
-proprietary programs.  If your program is a subroutine library, you may
-consider it more useful to permit linking proprietary applications with the
-library.  If this is what you want to do, use the GNU Library General
-Public License instead of this License.
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/Makefile
deleted file mode 100644
index 0add28cb9056..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/Makefile
+++ /dev/null
@@ -1,23 +0,0 @@
-#include $(top_srcdir)/debian/rules
-#KERNELDIR := ${KBUILD_OUTPUT}
-
-PWD		= $(shell pwd)
-
-EXTRA_CFLAGS:= -I$(M)/include
-MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
-FIRMWARE_UPGRADE_PATH = $(abspath $(MAKEFILE_FILE_PATH)/../../include)
-EXTRA_CFLAGS+= -I$(FIRMWARE_UPGRADE_PATH)
-EXTRA_CFLAGS+= -Wall
-
-firmware_driver_cpld-objs := firmware.o
-firmware_driver_cpld-objs += firmware_cpld.o firmware_cpld_upgrade.o
-firmware_driver_cpld-objs += jbicomp.o jbijtag.o jbimain.o jbistub.o
-
-#ifndef CONFIG_FRM_PRODUCT_FILE
-
-$(warning $(firmware_driver_cpld-objs))
-obj-m := firmware_driver_cpld.o
-all:
-	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
-	@if [ ! -d $(common_module_dir) ]; then mkdir -p $(common_module_dir) ;fi
-	cp -p  $(PWD)/*.ko $(common_module_dir)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/firmware.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/firmware.c
deleted file mode 100644
index db72b369465a..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/firmware.c
+++ /dev/null
@@ -1,144 +0,0 @@
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <firmware.h>
-
-int g_firmware_driver_debug = 0;
-module_param(g_firmware_driver_debug, int, S_IRUGO | S_IWUSR);
-
-static LIST_HEAD(drv_list);
-static LIST_HEAD(dev_list);
-
-/**
- * firmware_driver_register
- * function:Registered Device Driver
- * @fw_drv:param[in] Driver information
- * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-int firmware_driver_register(firmware_driver_t *fw_drv)
-{
-    int ret;
-
-    if (fw_drv == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Parameter error.\n");
-        return FIRMWARE_FAILED;
-    }
-
-    ret = platform_driver_register(fw_drv->drv);
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: failed to register firmware upgrade driver \n");
-        return FIRMWARE_FAILED;
-    }
-
-    /* Adds driver information to the driver list */
-    list_add(&fw_drv->list, &drv_list);
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware upgrade driver register sucess \n");
-
-    return FIRMWARE_SUCCESS;
-}
-
-/**
- * firmware_driver_unregister
- * function:unregister Device Driver
- * @fw_drv:param[in] Driver information
- */
-void firmware_driver_unregister(firmware_driver_t *fw_drv)
-{
-    list_del_init(&fw_drv->list);
-    platform_driver_unregister(fw_drv->drv);
-}
-
-/*
- * firmware_get_device_by_minor
- * function: Get device information based on minor
- */
-firmware_device_t *firmware_get_device_by_minor(int minor)
-{
-    firmware_device_t *tmp;
-
-    list_for_each_entry(tmp, &dev_list, list) {
-        if (tmp->dev.minor == minor) {
-            return tmp;
-        }
-    }
-
-    return NULL;
-}
-
-/**
- * firmware_device_register
- * function:Registered Driver Device
- * @fw_dev: param[in] Driver information
- * return value:success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-int firmware_device_register(firmware_device_t *fw_dev)
-{
-    int ret;
-    firmware_device_t *tmp;
-
-    if (fw_dev == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Parameter error.\n");
-        return FIRMWARE_FAILED;
-    }
-    /* Check whether the device file name already exists in the device linked list */
-    list_for_each_entry(tmp, &dev_list, list) {
-        if (strcmp(tmp->name, fw_dev->name) == 0) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("devie %s already exists.\n", fw_dev->name);
-            return FIRMWARE_FAILED;
-        }
-    }
-
-    /* Registere device */
-    ret = misc_register(&fw_dev->dev);
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("register misc error, ret=%d.\n", ret);
-        return FIRMWARE_FAILED;
-    }
-
-    /* Adds a device to the device list */
-    list_add(&fw_dev->list, &dev_list);
-
-    return FIRMWARE_SUCCESS;
-}
-
-/**
- * firmware_device_unregister
- * function: unregister Driver Device
- */
-void firmware_device_unregister(firmware_device_t *fw_dev)
-{
-    list_del(&fw_dev->list);
-    misc_deregister(&fw_dev->dev);
-}
-
-static int __init firmware_driver_init(void)
-{
-    int ret;
-
-    INIT_LIST_HEAD(&drv_list);
-    INIT_LIST_HEAD(&dev_list);
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware driver init.\n");
-    ret = firmware_cpld_init();
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("firmware driver init failed.\n");
-        return FIRMWARE_FAILED;
-    }
-
-    return FIRMWARE_SUCCESS;
-}
-
-static void __exit firmware_driver_exit(void)
-{
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware driver exit.\n");
-    firmware_cpld_exit();
-    INIT_LIST_HEAD(&drv_list);
-    INIT_LIST_HEAD(&dev_list);
-    return;
-}
-
-module_init(firmware_driver_init);
-module_exit(firmware_driver_exit);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("Firmware upgrade driver");
-MODULE_LICENSE("GPL");
-MODULE_VERSION("1.0");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/firmware_cpld.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/firmware_cpld.c
deleted file mode 100644
index 18ec509d0f2e..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/firmware_cpld.c
+++ /dev/null
@@ -1,384 +0,0 @@
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/kdev_t.h>
-#include <linux/slab.h>
-#include <linux/fs.h>
-#include <linux/of.h>
-#include <linux/uaccess.h>
-#include <firmware.h>
-#include <firmware_cpld.h>
-#include <firmware_upgrade.h>
-
-static int firmware_cpld_open(struct inode *inode, struct file *file)
-{
-    firmware_device_t *frm_dev;
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Open cpld device.\n");
-    frm_dev = firmware_get_device_by_minor(MINOR(inode->i_rdev));
-    if (frm_dev == NULL) {
-        return -ENXIO;
-    }
-    file->private_data = frm_dev;
-
-    return FIRMWARE_SUCCESS;
-}
-
-static ssize_t firmware_cpld_read (struct file *file, char __user *buf, size_t count,
-                                   loff_t *offset)
-{
-    return 0;
-}
-
-static ssize_t firmware_cpld_write (struct file *file, const char __user *buf, size_t count,
-                                    loff_t *offset)
-{
-    return 0;
-}
-
-static loff_t firmware_cpld_llseek(struct file *file, loff_t offset, int origin)
-{
-    return 0;
-}
-
-/*
- * firmware_cpld_ioctl
- * function: ioctl command parsing function
- * @file: param[in] device file name
- * @cmd:  param[in] command
- * @arg:  param[in] the parameters in the command
- * return value: success-FIRMWARE_SUCCESS; fail:other value
- */
-static long firmware_cpld_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
-{
-    int ret;
-    char *buf;
-    void __user *argp;
-    char version[FIRMWARE_NAME_LEN];
-    char chip_name[FIRMWARE_NAME_LEN];
-    cmd_info_t cmd_info;
-    firmware_device_t *frm_dev;
-    firmware_cpld_t *cpld_info;
-
-    /* Get device private data */
-    mem_clear(&cmd_info, sizeof(cmd_info_t));
-    frm_dev = (firmware_device_t *)file->private_data;
-    cpld_info = NULL;
-    if (frm_dev != NULL) {
-        if (frm_dev->priv != NULL) {
-            cpld_info = (firmware_cpld_t *)frm_dev->priv;
-        }
-    }
-    if (cpld_info == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to frm_dev->priv sysfs info.\n");
-        return FIRMWARE_FAILED;
-    }
-    argp = (void __user *)arg;
-
-    switch (cmd) {
-    case FIRMWARE_GET_CHIPNAME:
-        /* get chip name */
-        if (copy_from_user(&cmd_info, argp, sizeof(cmd_info_t))) {
-            return -EFAULT;
-        }
-        mem_clear(chip_name, FIRMWARE_NAME_LEN);
-        ret = fmw_cpld_upg_get_chip_name(frm_dev->chain, cpld_info, chip_name, FIRMWARE_NAME_LEN);
-        if (ret != FIRMWARE_SUCCESS) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to get chip name.\n");
-            return -ENXIO;
-        }
-        if (copy_to_user(cmd_info.data, chip_name, cmd_info.size)) {
-            return -EFAULT;
-        }
-        break;
-    case FIRMWARE_PROGRAM:
-    case FIRMWARE_PROGRAM_JBI:
-        /* firmware upgrade */
-        if (copy_from_user(&cmd_info, argp, sizeof(cmd_info_t))) {
-            return -EFAULT;
-        }
-        buf = (char *) kzalloc(cmd_info.size + 1, GFP_KERNEL);
-        if (buf == NULL) {
-            return -ENOMEM;
-        }
-        if (copy_from_user(buf, cmd_info.data, cmd_info.size)) {
-            kfree(buf);
-            return -EFAULT;
-        }
-        buf[cmd_info.size] = 0;
-        if (cmd == FIRMWARE_PROGRAM_JBI) {
-            /* JBI firmware upgrade */
-            ret = fmw_cpld_upg_program_jbi(frm_dev->chain, cpld_info, buf, cmd_info.size);
-        } else {
-            /* ISC firmware upgrade */
-            ret = fmw_cpld_upg_program(frm_dev->chain, cpld_info, buf, cmd_info.size);
-        }
-        if (ret != FIRMWARE_SUCCESS) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to program cpld.\n");
-            kfree(buf);
-            return -ESRCH;
-        }
-        kfree(buf);
-        break;
-    case FIRMWARE_GET_VERSION:
-        /* get version */
-        if (copy_from_user(&cmd_info, argp, sizeof(cmd_info_t))) {
-            return -EFAULT;
-        }
-        mem_clear(version, FIRMWARE_NAME_LEN);
-        ret = fmw_cpld_upg_get_version(frm_dev->chain, cpld_info, version, FIRMWARE_NAME_LEN);
-        if (ret != FIRMWARE_SUCCESS) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to get version.\n");
-            return -ENXIO;
-        }
-        if (copy_to_user(cmd_info.data, version, cmd_info.size)) {
-            return -EFAULT;
-        }
-        break;
-    default:
-        FIRMWARE_DRIVER_DEBUG_ERROR("not find cmd: %d\r\n", cmd);
-        return -ENOTTY;
-    } /* End of switch */
-
-    return FIRMWARE_SUCCESS;
-}
-
-static int firmware_cpld_release(struct inode *inode, struct file *file)
-{
-    return 0;
-}
-
-static const struct file_operations cpld_dev_fops = {
-    .owner      = THIS_MODULE,
-    .llseek     = firmware_cpld_llseek,
-    .read       = firmware_cpld_read,
-    .write      = firmware_cpld_write,
-    .unlocked_ioctl = firmware_cpld_ioctl,
-    .open       = firmware_cpld_open,
-    .release    = firmware_cpld_release,
-};
-
-static int of_firmware_upgrade_config_init(struct device *dev, firmware_cpld_t *cpld_info)
-{
-    int ret;
-    char *name;
-    int i;
-    char buf[64];
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Enter firmware_upgrade_config_init\r\n");
-    if (cpld_info == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("info is null\r\n");
-        return -1;
-    }
-
-    mem_clear(cpld_info, sizeof(firmware_cpld_t));
-    ret = 0;
-    ret += of_property_read_string(dev->of_node, "type", (const char **)&name);
-    ret += of_property_read_u32(dev->of_node, "tdi", &cpld_info->tdi);
-    ret += of_property_read_u32(dev->of_node, "tck", &cpld_info->tck);
-    ret += of_property_read_u32(dev->of_node, "tms", &cpld_info->tms);
-    ret += of_property_read_u32(dev->of_node, "tdo", &cpld_info->tdo);
-
-    ret += of_property_read_u32(dev->of_node, "chain", &cpld_info->chain);
-    ret += of_property_read_u32(dev->of_node, "chip_index", &cpld_info->chip_index);
-
-    if (ret != 0) {
-       FIRMWARE_DRIVER_DEBUG_ERROR("dts config error, ret:%d.\n", ret);
-       return -ENXIO;
-    }
-
-    strncpy(cpld_info->type, name, sizeof(cpld_info->type) - 1);
-
-    ret = of_property_read_u32(dev->of_node, "tck_delay", &cpld_info->tck_delay);
-    if(ret != 0) {
-        cpld_info->tck_delay = 60;
-    }
-
-    cpld_info->gpio_en_info_num = 0;
-    /* Enable through GPIO */
-    for (i = 0; i < FIRMWARE_EN_INFO_MAX; i++) {
-        mem_clear(buf, sizeof(buf));
-        snprintf(buf, sizeof(buf) - 1, "en_gpio_%d", i);
-        ret = of_property_read_u32(dev->of_node, buf, &cpld_info->gpio_en_info[i].en_gpio);
-        if(ret != 0) {
-            break;
-        }
-
-        mem_clear(buf, sizeof(buf));
-        snprintf(buf, sizeof(buf) - 1, "en_level_%d", i);
-        ret = of_property_read_u32(dev->of_node, buf, &cpld_info->gpio_en_info[i].en_level);
-        if(ret != 0) {
-            break;
-        }
-        cpld_info->gpio_en_info_num++;
-    }
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("type:%s, chain:%u, chip_index:%u, en_info_num:%u\n",
-        cpld_info->type, cpld_info->chain, cpld_info->chip_index, cpld_info->gpio_en_info_num);
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("tdi:%u, tck:%u, tms:%u, tdo:%u tck_delay:%u.\n",
-        cpld_info->tdi, cpld_info->tck, cpld_info->tms, cpld_info->tdo, cpld_info->tck_delay);
-
-    return 0;
-}
-
-static int firmware_upgrade_config_init(struct device *dev, firmware_cpld_t *cpld_info)
-{
-    int i;
-
-    firmware_upgrade_device_t *firmware_upgrade_device;
-    firmware_jtag_device_t jtag_upg_device;
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Enter firmware_upgrade_config_init\r\n");
-    if (cpld_info == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("info is null\r\n");
-        return -1;
-    }
-
-    if (dev->platform_data == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("platform data config error.\n");
-        return -1;
-    }
-    firmware_upgrade_device = dev->platform_data;
-    jtag_upg_device = firmware_upgrade_device->upg_type.jtag;
-
-    mem_clear(cpld_info, sizeof(firmware_cpld_t));
-
-    strncpy(cpld_info->type, firmware_upgrade_device->type, sizeof(cpld_info->type) - 1);
-    cpld_info->tdi = jtag_upg_device.tdi;
-    cpld_info->tck = jtag_upg_device.tck;
-    cpld_info->tms = jtag_upg_device.tms;
-    cpld_info->tdo = jtag_upg_device.tdo;
-    cpld_info->chain = firmware_upgrade_device->chain;
-    cpld_info->chip_index = firmware_upgrade_device->chip_index;
-
-    if (jtag_upg_device.tck_delay == 0) {
-        cpld_info->tck_delay = 60;
-        FIRMWARE_DRIVER_DEBUG_VERBOSE("no config tck_delay, use default value:%u\n", cpld_info->tck_delay);
-    } else {
-        cpld_info->tck_delay = jtag_upg_device.tck_delay;
-    }
-
-    if (firmware_upgrade_device->en_gpio_num > FIRMWARE_EN_INFO_MAX) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("The number of en_gpio_num:%u configurations exceeds the maximum limit:%u.\n",
-            firmware_upgrade_device->en_gpio_num, FIRMWARE_EN_INFO_MAX);
-        return -ENXIO;
-    }
-    cpld_info->gpio_en_info_num = firmware_upgrade_device->en_gpio_num;
-    /* Enable through GPIO */
-    for (i = 0; i < cpld_info->gpio_en_info_num; i++) {
-        cpld_info->gpio_en_info[i].en_gpio = firmware_upgrade_device->en_gpio[i];
-        cpld_info->gpio_en_info[i].en_level = firmware_upgrade_device->en_level[i];
-    }
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("type:%s, chain:%u, chip_index:%u, en_info_num:%u\n",
-        cpld_info->type, cpld_info->chain, cpld_info->chip_index, cpld_info->gpio_en_info_num);
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("tdi:%u, tck:%u, tms:%u, tdo:%u tck_delay:%u.\n",
-        cpld_info->tdi, cpld_info->tck, cpld_info->tms, cpld_info->tdo, cpld_info->tck_delay);
-
-    return 0;
-}
-
-static int  firmware_cpld_probe(struct platform_device *pdev)
-{
-    int ret;
-    firmware_cpld_t *cpld_info;
-    firmware_device_t *frm_dev;
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Enter firmware_cpld_probe\r\n");
-    /* Gets the information in the device tree */
-    cpld_info = devm_kzalloc(&pdev->dev, sizeof(firmware_cpld_t), GFP_KERNEL);
-    if (cpld_info == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to kzalloc cpld device tree.\n");
-        return -EPERM;
-    }
-
-    if (pdev->dev.of_node) {
-        ret = of_firmware_upgrade_config_init(&pdev->dev, cpld_info);
-    } else {
-        ret = firmware_upgrade_config_init(&pdev->dev, cpld_info);
-    }
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("get config init from dts error.\n");
-        return -EPERM;
-    }
-
-    frm_dev = devm_kzalloc(&pdev->dev, sizeof(firmware_device_t), GFP_KERNEL);
-    if (frm_dev == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to kzalloc firmware device.\n");
-        return -EPERM;
-    }
-
-    /* Based on the link number, determine the name of the device file */
-    frm_dev->chain = cpld_info->chain;
-    snprintf(frm_dev->name, FIRMWARE_NAME_LEN - 1, "firmware_cpld%d", frm_dev->chain);
-    strncpy(cpld_info->devname, frm_dev->name, strlen(frm_dev->name) + 1);
-
-    INIT_LIST_HEAD(&frm_dev->list);
-    frm_dev->dev.minor = MISC_DYNAMIC_MINOR;
-    frm_dev->dev.name = frm_dev->name;
-    frm_dev->dev.fops = &cpld_dev_fops;
-    frm_dev->priv = cpld_info;
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Register cpld firmware chain:%d, name:%s.\n", frm_dev->chain, frm_dev->name);
-
-    ret = firmware_device_register(frm_dev);
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to register firmware device.\n");
-        return -EPERM;
-    }
-
-    platform_set_drvdata(pdev, frm_dev);
-    return 0;
-}
-
-static int __exit firmware_cpld_remove(struct platform_device *pdev)
-{
-    firmware_device_t *frm_dev;
-
-    frm_dev = (firmware_device_t *)platform_get_drvdata(pdev);
-    firmware_device_unregister(frm_dev);
-    platform_set_drvdata(pdev, NULL);
-
-    return 0;
-}
-
-static struct of_device_id cpld_match[] = {
-    {
-        .compatible = "firmware_cpld",
-    },
-    {},
-};
-
-static struct platform_driver cpld_driver = {
-    .driver = {
-        .name = "firmware_cpld",
-        .owner = THIS_MODULE,
-        .of_match_table = cpld_match,
-    },
-    .probe = firmware_cpld_probe,
-    .remove = firmware_cpld_remove,
-};
-
-static firmware_driver_t fmw_drv_cpld = {
-    .name = "firmware_cpld",
-    .drv = &cpld_driver,
-};
-
-int firmware_cpld_init(void)
-{
-    int ret;
-
-    INIT_LIST_HEAD(&fmw_drv_cpld.list);
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("cpld upgrade driver register \n");
-    ret = firmware_driver_register(&fmw_drv_cpld);
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("cpld upgrade driver register failed.\n");
-        return ret;
-    }
-    return 0;
-}
-
-void firmware_cpld_exit(void)
-{
-    firmware_driver_unregister(&fmw_drv_cpld);
-    INIT_LIST_HEAD(&fmw_drv_cpld.list);
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/firmware_cpld_upgrade.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/firmware_cpld_upgrade.c
deleted file mode 100644
index 8252c2a39bb2..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/firmware_cpld_upgrade.c
+++ /dev/null
@@ -1,1879 +0,0 @@
-#include <linux/kernel.h>
-#include <linux/delay.h>
-#include <linux/gpio.h>
-#include <linux/ctype.h>
-#include <linux/slab.h>
-#include <linux/uaccess.h>
-#include <firmware.h>
-#include <firmware_cpld.h>
-#include <jbi.h>
-
-/* CPLD file parses the relevant parameters */
-#define CPLD_HEX                 16
-#define DEC_VAL                  10
-#define CPLD_INIT_CNT            4
-#define CPLD_UNIT_SZ             4
-#define CPLD_HEAD_KEYWORD       "Header"
-#define CPLD_NAME_KEYWORD       "Entity"
-#define CPLD_INIT_KEYWORD       "INITIALIZE"
-#define CPLD_REPEAT_KEYWORD     "REPEAT"
-#define CPLD_END_CHAR           ','
-
-/* TCK clock MAX 16MHz */
-#define    TCK_DELAY                         (current_fmw_cpld->tck_delay)
-
-/*
- * The instruction format of the MAX II CPLD is 10 bits
- * For shift_ir state machine use
- */
-#define    BYPASS                            0x3FF
-#define    EXTEST                            0xF
-#define    SAMPLE                            0x5
-#define    IDCODE                            0x6
-#define    USERCODE                          0x7
-#define    CLAMP                             0xA
-#define    HIGHZ                             0xB
-
-/* Following 7 instructions are IEEE 1532 instructions */
-#define    ISC_ENABLE                        0x2CC
-#define    ISC_DISABLE                       0x201
-#define    ISC_PROGRAM                       0x2F4
-#define    ISC_ERASE                         0x2F2
-#define    ISC_ADDRESS_SHIFT                 0x203
-#define    ISC_READ                          0x205
-#define    ISC_NOOP                          0x210
-
-/*
- * MAX II devices support the real-time in-system programmability (ISP)
- * feature that allows you to program the device while it is still in operation.
- * when there is either a power cycle to the device (powering down and powering
- * up again) or with the execution of certain ISP instructions to start the SRAM
- * download process when realtime ISP has completed.
- */
-#define    RT_ISC_ENABLE                     0x199
-#define    RT_ISC_DISABLE                    0x166
-
-/* Chip ID */
-#define    EPM240_G                          0x020A10DD
-#define    EPM570_G                          0x020A20DD
-#define    EPM1270_G                         0x020A30DD
-#define    EPM2210_G                         0x020A40DD
-#define    EPM240_Z                          0x020A50DD
-#define    EPM570_Z                          0x020A60DD
-
-/* The size of the output data for ID validation */
-#define    VERIFY_IDCODE_SIZE                0x5
-
-/* Erasure and programmatic delay handling */
-#define    ERASE_DELAY                       0x1024
-#define    PROGRAM_DELAY                     0x5
-
-/* Chip instruction register */
-#define    CPLD_INSTRUCTION_SIZE             10
-
-/*
- * Currently, only two connectors are supported
- * The size of the instruction register needs to be changed
- * when more than two connectors are used
- */
-#ifndef CPLD_MAX_CHIP
-#define    CPLD_MAX_CHIP                     2
-#endif
-
-typedef struct cpld_chip_id {
-    char    *name;
-    uint    id;
-    int     addr_register_length;
-    int     data_register_length;
-    int     eeprom_array_length;
-    int     first_blank_check_length;
-    int     second_blank_check_length;
-    int     first_erase_addr;
-    int     second_erase_addr;
-    int     third_erase_addr;
-    int     verify_idcode_addr;
-} cpld_chip_id_t;
-
-static cpld_chip_id_t cpld_id_table[] = {
-    {"EPM240T100", EPM240_G, 13, 16, 4604, 3327, 511, 0x0, 0x1, 0x11, 0x89},
-    {"EPM570T144", EPM570_G, 14, 16, 8700, 3327, 511, 0x0, 0x1, 0x21, 0x111},
-    {"EPM1270F256", EPM1270_G, 15, 16, 16892, 16383, 511, 0x0, 0x1, 0x41, 0x221},
-    {"5M240Z", EPM240_Z, 13, 16, 4604, 3327, 511, 0x0, 0x1, 0x11, 0x89},
-    {"5M570Z", EPM570_Z, 14, 16, 8700, 3327, 511, 0x0, 0x1, 0x21, 0x111},
-    {NULL, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
-};
-
-static cpld_chip_id_t *chip_cpld_info = NULL;
-
-/* The following variables are used when cascading multiple chips */
-static int chip_num, current_chip_index;
-static firmware_cpld_t *current_fmw_cpld;
-
-static int TDI_PULL_UP(void);
-static int TDI_PULL_DOWN(void);
-static int TMS_PULL_UP(void);
-static int TMS_PULL_DOWN(void);
-static int TCK_PULL_UP(void);
-static int TCK_PULL_DOWN(void);
-
-/*
- * set_currrent_cpld_info
- * function: Save the current device information
- * @info: param[in] Information about the device to be updated
- */
-static void set_currrent_cpld_info(firmware_cpld_t *info)
-{
-    current_fmw_cpld = info;
-}
-
-/*
- * firmware_upgrade_en
- * function: Upgrade access enabling switch
- * @flag: !0:enable 0:disable
- */
-static int firmware_upgrade_en(int flag)
-{
-    int i;
-    int ret;
-
-    for (i = 0; i < current_fmw_cpld->gpio_en_info_num; i++) {
-        if (flag) {
-            ret = gpio_request(current_fmw_cpld->gpio_en_info[i].en_gpio, "cpld_upgrade");
-            if (ret) {
-                FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_ispvme_upgrade EN[%d] GPIO[%d] failed!\n",
-                        i, current_fmw_cpld->gpio_en_info[i].en_gpio);
-                goto free_gpio;
-            }
-            gpio_direction_output(current_fmw_cpld->gpio_en_info[i].en_gpio, current_fmw_cpld->gpio_en_info[i].en_level);
-            current_fmw_cpld->gpio_en_info[i].flag = 1;
-        } else {
-            gpio_set_value(current_fmw_cpld->gpio_en_info[i].en_gpio, !current_fmw_cpld->gpio_en_info[i].en_level);
-            gpio_free(current_fmw_cpld->gpio_en_info[i].en_gpio);
-            current_fmw_cpld->gpio_en_info[i].flag = 0;
-        }
-    }
-    return 0;
-free_gpio:
-    for (i = 0; i < current_fmw_cpld->gpio_en_info_num; i++) {
-        if (current_fmw_cpld->gpio_en_info[i].flag == 1) {
-            gpio_set_value(current_fmw_cpld->gpio_en_info[i].en_gpio, !current_fmw_cpld->gpio_en_info[i].en_level);
-            gpio_free(current_fmw_cpld->gpio_en_info[i].en_gpio);
-            current_fmw_cpld->gpio_en_info[i].flag = 0;
-        } else {
-            break;
-        }
-    }
-
-    return -1;
-}
-
-/*
- * init_cpld
- * function:Initialize CPLD
- * return value: 0 success ; -1 fail
- */
-static int init_cpld(void)
-{
-    int ret;
-
-    if (current_fmw_cpld == NULL) {
-        return -1;
-    }
-    mdelay(10);
-    ret = gpio_request(current_fmw_cpld->tdi, "cpld_upgrade");
-    if (ret) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_upgrade TDI GPIO failed!\n");
-        return ret;
-    }
-    ret = gpio_request(current_fmw_cpld->tck, "cpld_upgrade");
-    if (ret) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_upgrade TCK GPIO failed!\n");
-        goto free_tdi;
-    }
-    ret = gpio_request(current_fmw_cpld->tms, "cpld_upgrade");
-    if (ret) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_upgrade TMS GPIO failed!\n");
-        goto free_tck;
-    }
-    ret = gpio_request(current_fmw_cpld->tdo, "cpld_upgrade");
-    if (ret) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_upgrade TDO GPIO failed!\n");
-        goto free_tms;
-    }
-
-    gpio_direction_output(current_fmw_cpld->tdi, 1);
-    gpio_direction_output(current_fmw_cpld->tck, 1);
-    gpio_direction_output(current_fmw_cpld->tms, 1);
-
-    gpio_direction_input(current_fmw_cpld->tdo);
-    ret = firmware_upgrade_en(1);
-    if (ret) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: open firmware upgrade en failed, ret %d.\n", ret);
-        goto free_tdo;
-    }
-
-    /* test GPIO */
-    if (TDI_PULL_UP() < 0 ) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TDI_PULL_UP failed.\n");
-        goto free_tdo;
-    }
-    if (TDI_PULL_DOWN() < 0 ) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TDI_PULL_DOWN failed.\n");
-        goto free_tdo;
-    }
-    if (TMS_PULL_UP() < 0 ) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TMS_PULL_UP failed.\n");
-        goto free_tdo;
-    }
-    if (TMS_PULL_DOWN() < 0 ) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TMS_PULL_DOWN failed.\n");
-        goto free_tdo;
-    }
-    if (TCK_PULL_UP() < 0 ) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TCK_PULL_UP failed.\n");
-        goto free_tdo;
-    }
-    if (TCK_PULL_DOWN() < 0 ) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TCK_PULL_DOWN failed.\n");
-        goto free_tdo;
-    }
-
-    mdelay(10);
-    return 0;
-
-free_tdo:
-    gpio_free(current_fmw_cpld->tdo);
-free_tms:
-    gpio_free(current_fmw_cpld->tms);
-free_tck:
-    gpio_free(current_fmw_cpld->tck);
-free_tdi:
-    gpio_free(current_fmw_cpld->tdi);
-    return ret;
-}
-
-/*
- * finish_cpld
- * function: finish  CPLD upgrade operation
- * return value: 0 success ; -1 fail
- */
-static int finish_cpld(void)
-{
-    int ret;
-
-    if (current_fmw_cpld == NULL) {
-        return -1;
-    }
-    mdelay(10);
-    ret = firmware_upgrade_en(0);
-    if (ret < 0){
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: close firmware upgrade en failed, ret %d.\r\n", ret);
-    }
-
-    gpio_free(current_fmw_cpld->tdi);
-    gpio_free(current_fmw_cpld->tck);
-    gpio_free(current_fmw_cpld->tms);
-    gpio_free(current_fmw_cpld->tdo);
-    mdelay(10);
-    return 0;
-}
-
-/* Loop waiting for */
-static int pull_wait(int gpio, int value) {
-    int i, j;
-    /* Timeout time is two seconds */
-    for (i = 0; i < 20; i++) {
-        for (j = 0; j < 100; j++) {
-            if (!!gpio_get_value(gpio) == !!value ) {
-                return 0;
-            }
-            /* The first loop does not delay, normally the first loop can immediately return the result */
-            if (i) {
-                mdelay(1);
-            }
-        }
-        /* The CPU is released every 100ms */
-        schedule();
-    }
-    /* timeout */
-    FIRMWARE_DRIVER_DEBUG_ERROR("Error: Wait gpio %d pull to %d failed.\n", gpio, value);
-    return -1;
-}
-
-/* TDI pull-up */
-static int pull_tdi_up(void)
-{
-    if (current_fmw_cpld == NULL) {
-        return -1;
-    }
-    gpio_set_value(current_fmw_cpld->tdi, 1);
-
-    /* Wait for the GPIO value to be set successfully */
-    return pull_wait(current_fmw_cpld->tdi, 1);
-}
-
-/* TDI pull-down */
-static int pull_tdi_down(void)
-{
-    if (current_fmw_cpld == NULL) {
-        return -1;
-    }
-    gpio_set_value(current_fmw_cpld->tdi, 0);
-
-    /* Wait for the GPIO value to be set successfully */
-    return pull_wait(current_fmw_cpld->tdi, 0);
-}
-
-/* TCK pull-up */
-static int pull_tck_up(void)
-{
-    if (current_fmw_cpld == NULL) {
-        return -1;
-    }
-    gpio_set_value(current_fmw_cpld->tck, 1);
-
-    /* Wait for the GPIO value to be set successfully */
-    return pull_wait(current_fmw_cpld->tck, 1);
-}
-
-/* TCK pull-down */
-static int pull_tck_down(void)
-{
-    if (current_fmw_cpld == NULL) {
-        return -1;
-    }
-    gpio_set_value(current_fmw_cpld->tck, 0);
-
-    /* Wait for the GPIO value to be set successfully */
-    return pull_wait(current_fmw_cpld->tck, 0);
-}
-
-/* TMS pull-up */
-static int pull_tms_up(void)
-{
-    if (current_fmw_cpld == NULL) {
-        return -1;
-    }
-    gpio_set_value(current_fmw_cpld->tms, 1);
-
-    /* Wait for the GPIO value to be set successfully */
-    return pull_wait(current_fmw_cpld->tms, 1);
-}
-
-/* TMS pull-down */
-static int pull_tms_down(void)
-{
-    if (current_fmw_cpld == NULL) {
-        return -1;
-    }
-    gpio_set_value(current_fmw_cpld->tms, 0);
-
-    /* Wait for the GPIO value to be set successfully */
-    return pull_wait(current_fmw_cpld->tms, 0);
-}
-
-/* Read TDO */
-static int read_tdo(void)
-{
-    if (current_fmw_cpld == NULL) {
-        return -1;
-    }
-    return gpio_get_value(current_fmw_cpld->tdo);
-}
-
-static firmware_cpld_function_t function_fmw_cpld = {
-      .pull_tdi_up = pull_tdi_up,
-      .pull_tdi_down = pull_tdi_down,
-      .pull_tck_up = pull_tck_up,
-      .pull_tck_down = pull_tck_down,
-      .pull_tms_up = pull_tms_up,
-      .pull_tms_down = pull_tms_down,
-      .read_tdo = read_tdo,
-      .init_cpld = init_cpld,
-      .finish_cpld = finish_cpld,
-};
-
-/*
- * TDI_PULL_DOWN
- * function: Lower TDI
- */
-static int TDI_PULL_DOWN(void)
-{
-    if ( function_fmw_cpld.pull_tdi_down != NULL) {
-        return function_fmw_cpld.pull_tdi_down();
-    } else {
-        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TDI_PULL_DOWN.\n");
-        return -1;
-    }
-}
-
-/*
- * TDI_PULL_UP
- * function: High TDI
- */
-static int TDI_PULL_UP(void)
-{
-    if (function_fmw_cpld.pull_tdi_up != NULL) {
-        return function_fmw_cpld.pull_tdi_up();
-    } else {
-        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TDI_PULL_UP.\n");
-        return -1;
-    }
-}
-
-/*
- * TCK_PULL_DOWN
- * function: Lower TCK
- */
-static int TCK_PULL_DOWN(void)
-{
-    if (function_fmw_cpld.pull_tck_down != NULL) {
-        return function_fmw_cpld.pull_tck_down();
-    } else {
-        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TCK_PULL_DOWN.\n");
-        return -1;
-    }
-}
-
-/*
- * TCK_PULL_UP
- * function: High TCK
- */
-static int TCK_PULL_UP(void)
-{
-    if (function_fmw_cpld.pull_tck_up != NULL) {
-        return function_fmw_cpld.pull_tck_up();
-    } else {
-        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TCK_PULL_UP.\n");
-        return -1;
-    }
-}
-
-/*
- * TMS_PULL_DOWN
- * function: Lower TMS
- */
-static int TMS_PULL_DOWN(void)
-{
-    if (function_fmw_cpld.pull_tms_down != NULL) {
-        return function_fmw_cpld.pull_tms_down();
-    } else {
-        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TMS_PULL_DOWN.\n");
-        return -1;
-    }
-}
-
-/*
- * TMS_PULL_UP
- * function: High TMS
- */
-static int TMS_PULL_UP(void)
-{
-    if (function_fmw_cpld.pull_tms_up != NULL) {
-        return function_fmw_cpld.pull_tms_up();
-    } else {
-        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TMS_PULL_UP.\n");
-        return -1;
-    }
-}
-
-/*
- * TDO_READ
- * function:Read the TDO level
- */
-static int TDO_READ(void)
-{
-    if (function_fmw_cpld.read_tdo != NULL) {
-        return function_fmw_cpld.read_tdo();
-    } else {
-        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TDO_READ.\n");
-        return -1;
-    }
-}
-
-/*
- * tap_test_logic_reset
- * function: reset JTAG
- * No matter what the original state of the controoler, it will enter
- * Test_Logic_Reset when TMS is held high for at least five rising
- * edges of TCK (16MHz)
- * The controller remains in this state while TMS is high
- */
-static void tap_test_logic_reset(void)
-{
-    int i;
-    TMS_PULL_UP();
-    TCK_PULL_DOWN();
-    ndelay(TCK_DELAY);
-
-    for (i = 0; i < 5; i++) {
-        TCK_PULL_UP();
-        ndelay(TCK_DELAY);
-        TCK_PULL_DOWN();
-        ndelay(TCK_DELAY);
-    }
-    TCK_PULL_UP();
-    ndelay(TCK_DELAY);
-}
-
-/*
- * tap_run_test_idle
- * function:  A controller state between scan operations.Once entered, the controller
- * will remain in the Run_Test/Idle state as long as TMS is held low.
- */
-static void tap_run_test_idle(void)
-{
-    TMS_PULL_DOWN();
-    TCK_PULL_DOWN();
-    ndelay(TCK_DELAY);
-    TCK_PULL_UP();
-    ndelay(TCK_DELAY);
-}
-
-/*
- * tap_select_dr_scan
- * function :This is a temporary controller state in which all test data registers
- * selected by the current instruction retain their previous state.
- */
-static void tap_select_dr_scan(void)
-{
-    TMS_PULL_UP();
-    TCK_PULL_DOWN();
-    ndelay(TCK_DELAY);
-    TCK_PULL_UP();
-    ndelay(TCK_DELAY);
-}
-
-/*
- * tap_capture_dr
- * function : In this controller state data may be parallel-loaded into test data
- * register selected by the current instruction on the rising edge of TCK
- */
-static void tap_capture_dr(void)
-{
-    TMS_PULL_DOWN();
-    TCK_PULL_DOWN();
-    ndelay(TCK_DELAY);
-    TCK_PULL_UP();
-    ndelay(TCK_DELAY);
-}
-
-/*
- * tap_shift_dr
- * function: In this controller state.the test data register connected between TDI
- * and TDO as a result of the current instruction shifts one stage
- * toward its serial output on each rising edge of TCK.
- */
-static void tap_shift_dr(void)
-{
-    TMS_PULL_DOWN();
-    TCK_PULL_DOWN();
-    ndelay(TCK_DELAY);
-    TCK_PULL_UP();
-    ndelay(TCK_DELAY);
-}
-
-/*
- * tap_exit1_dr
- * function: This is a temporary controller state.
- */
-static void tap_exit1_dr(int data)
-{
-    int j;
-    if (data) {
-        TDI_PULL_UP();
-    } else {
-        TDI_PULL_DOWN();
-    }
-
-    /* need to idle here */
-    for (j = 1; j < current_chip_index; j++) {
-        TCK_PULL_DOWN();
-        ndelay(TCK_DELAY);
-        TCK_PULL_UP();
-        ndelay(TCK_DELAY);
-    }
-    TMS_PULL_UP();
-    TCK_PULL_DOWN();
-    ndelay(TCK_DELAY);
-    TCK_PULL_UP();
-    ndelay(TCK_DELAY);
-}
-
-/*
- * tap_update_dr
- * function : Some test data registers may be provided with a latched parallel output to
- * prevent changes at the parallel out-put while data is shifted in the
- * associated whift-register path in response to certain instructions.Data is
- * latched onto the parallel output of these test data registers from the
- * shift-register path on the falling edge of TCK in the Update-DR controler state.
- */
-static void tap_update_dr(void)
-{
-    TMS_PULL_UP();
-    TCK_PULL_DOWN();
-    ndelay(TCK_DELAY);
-    TCK_PULL_UP();
-    ndelay(TCK_DELAY);
-}
-
-/*
- * tap_select_ir_scan
- * function:This is a temporarily controler state in which all test data register selected
- * by the current instruction retain their previous state.
- */
-static void tap_select_ir_scan(void)
-{
-    TMS_PULL_UP();
-    TCK_PULL_DOWN();
-    ndelay(TCK_DELAY);
-    TCK_PULL_UP();
-    ndelay(TCK_DELAY);
-}
-
-/*
- * tap_capture_ir
- * function :In this controller state the shift-register contained in the instruction
- * register loads a pattern of fixed logic values on the rising edge of
- * TCK.design-specific data may be loaded into shift-register stages that
- * are not required to be set to fixed values.
- */
-static void tap_capture_ir(void)
-{
-    TMS_PULL_DOWN();
-    TCK_PULL_DOWN();
-    ndelay(TCK_DELAY);
-    TCK_PULL_UP();
-    ndelay(TCK_DELAY);
-}
-
-/*
- * tap_exit1_ir
- * function : enter exit1 ir state. This is a temporary controller state.
- */
-static void tap_exit1_ir(int data)
-{
-    if (data) {
-        TDI_PULL_UP();
-    } else {
-        TDI_PULL_DOWN();
-    }
-    TMS_PULL_UP();
-    TCK_PULL_DOWN();
-    ndelay(TCK_DELAY);
-    TCK_PULL_UP();
-    ndelay(TCK_DELAY);
-}
-
-/*
- * tap_shift_ir
- * function: In this controller state the shift-register contained in the instruction
- * register is connected between TDI and TDO and shifts data one stage
- * toward its serial output on each rising edge of TCK.
- */
-static void tap_shift_ir(void)
-{
-    TMS_PULL_DOWN();
-    TCK_PULL_DOWN();
-    ndelay(TCK_DELAY);
-    TCK_PULL_UP();
-    ndelay(TCK_DELAY);
-}
-
-/*
- * The instruction shifted into the instruction register is latched onto the parallel output
- * from the shift-register path on the falling edge of TCK in this controller state.Once the
- * new instruction has been latched,it becomes the current instruction.
- *
- */
-static void tap_update_ir(void)
-{
-    TMS_PULL_UP();
-    TCK_PULL_DOWN();
-    ndelay(TCK_DELAY);
-    TCK_PULL_UP();
-    ndelay(TCK_DELAY);
-}
-
-static void tap_send_instruction(int instruction, int ins_len)
-{
-    int i;
-    for (i = 0; i < (ins_len - 1); i++) {
-        if (instruction & 0x1) {
-            TDI_PULL_UP();
-        } else {
-            TDI_PULL_DOWN();
-        }
-        TCK_PULL_DOWN();
-        ndelay(TCK_DELAY);
-        TCK_PULL_UP();
-        ndelay(TCK_DELAY);
-        instruction = instruction >> 1;
-    }
-}
-
-static void tap_send_data(int data, int data_len)
-{
-    int i;
-    for (i = 0; i < (data_len - 1); i++) {
-        if (data & 0x1) {
-            TDI_PULL_UP();
-        } else {
-            TDI_PULL_DOWN();
-        }
-        TCK_PULL_DOWN();
-        ndelay(TCK_DELAY);
-        TCK_PULL_UP();
-        ndelay(TCK_DELAY);
-        data = data >> 1;
-    }
-}
-
-/*
- * tap_rcv_byte
- * function  : Receive data from the device side
- * @data : param[out] Received data */
-static void tap_rcv_byte(u8 *data)
-{
-    int i;
-    u8 rec_data = 0;
-    unsigned char tmp;
-    ndelay(TCK_DELAY);
-    for (i = 0; i < 8; i++) {
-        TCK_PULL_DOWN();
-        ndelay(TCK_DELAY);
-        tmp = TDO_READ();
-        rec_data |= (tmp << i);
-        TCK_PULL_UP();
-        ndelay(TCK_DELAY);
-    }
-    *data = rec_data;
-}
-
-/*
- * tap_idle
- * function :Used for state machine idling
- */
-static void tap_idle(void)
-{
-    int i;
-    for (i = 0; i < 0x100; i++) {
-        TCK_PULL_DOWN();
-        ndelay(TCK_DELAY);
-        TCK_PULL_UP();
-        ndelay(TCK_DELAY);
-
-        /* Timely release of CPU   */
-        schedule();
-    }
-}
-
-/*
- * jtag_read_data
- * function :Read the JTAG output data
- * @size: param[in]  buffer size
- * @data: param[out] read data buffer
- */
-static void jtag_read_data(u8 *buf, int size)
-{
-    int i, j;
-    /* JTAG state switching */
-    tap_run_test_idle();
-    tap_select_dr_scan();
-    tap_capture_dr();
-    tap_shift_dr();
-    for (j = current_chip_index; j < chip_num; j++) {
-        TCK_PULL_DOWN();
-        ndelay(TCK_DELAY);
-        TCK_PULL_UP();
-        ndelay(TCK_DELAY);
-    }
-    /* Receive data from the device side */
-    for (i = 0; i < size; i++) {
-        tap_rcv_byte(&buf[i]);
-    }
-    /* JTAG state switching */
-    tap_exit1_dr(0);
-    tap_update_dr();
-    tap_run_test_idle();
-}
-
-/*
- * jtag_send_instruction
- * function :JTAG instruction sending interface
- * @instruction: param[in]  Instruction to be sent
- * @ins_length:  param[in]  Instruction length
- */
-static void jtag_send_instruction(int instruction, int ins_length)
-{
-    int i, j;
-    i = 1 << (ins_length - 1);
-    /* JTAG state switching */
-    tap_run_test_idle();
-    tap_select_dr_scan();
-    tap_select_ir_scan();
-    tap_capture_ir();
-    tap_shift_ir();
-
-    for (j = chip_num; j > 1; j--) {
-        if (j == current_chip_index) {
-            tap_send_instruction(instruction, ins_length + 1);
-        } else {
-            tap_send_instruction(BYPASS, ins_length + 1);
-        }
-    }
-
-    if (current_chip_index == 1) {
-        tap_send_instruction(instruction, ins_length);
-        /* Gets the highest bit of the instruction */
-        tap_exit1_ir((instruction & i) >> (ins_length - 1));
-    } else {
-        tap_send_instruction(BYPASS, ins_length);
-        /* Gets the highest bit of the instruction */
-        tap_exit1_ir((BYPASS & i) >> (ins_length - 1));
-    }
-
-    /* JTAG state switching */
-    tap_update_ir();
-    tap_run_test_idle();
-}
-
-/*
- * jtag_send_data
- * function :JTAG data sending interface
- * @buf : param[in]    Data that needs to be sent
- * @data_length: param[in] Data length
- */
-static void jtag_send_data(unsigned int buf, int data_length)
-{
-    int i;
-    i = 1 << (data_length - 1);
-
-    /* JTAG state switching */
-    tap_run_test_idle();
-    tap_select_dr_scan();
-    tap_capture_dr();
-    tap_shift_dr();
-    tap_send_data(buf, data_length);
-    /* Gets the highest bit of the instruction */
-    tap_exit1_dr((buf & i) >> (data_length - 1));
-    tap_update_dr();
-    tap_run_test_idle();
-}
-
-/*
- * jtag_program_donebit
- * JTAG programming end point */
-static void jtag_program_donebit(void)
-{
-    jtag_send_instruction(ISC_ADDRESS_SHIFT, CPLD_INSTRUCTION_SIZE);
-    tap_idle();
-    jtag_send_data(0x0, chip_cpld_info->addr_register_length);
-    tap_idle();
-
-    switch (chip_cpld_info->id) {
-    case EPM240_G:
-    case EPM570_G:
-        jtag_send_instruction(ISC_PROGRAM, CPLD_INSTRUCTION_SIZE);
-        tap_idle();
-        jtag_send_data(0x7BFF, chip_cpld_info->data_register_length);
-        tap_idle();
-        break;
-    case EPM1270_G:
-        jtag_send_instruction(ISC_PROGRAM, CPLD_INSTRUCTION_SIZE);
-        tap_idle();
-        jtag_send_data(0x7FFF, chip_cpld_info->data_register_length);
-        tap_idle();
-
-        jtag_send_instruction(ISC_PROGRAM, CPLD_INSTRUCTION_SIZE);
-        tap_idle();
-        jtag_send_data(0xFFFF, chip_cpld_info->data_register_length);
-        tap_idle();
-
-        jtag_send_instruction(ISC_PROGRAM, CPLD_INSTRUCTION_SIZE);
-        tap_idle();
-        jtag_send_data(0xFFBF, chip_cpld_info->data_register_length);
-        tap_idle();
-
-        jtag_send_instruction(ISC_PROGRAM, CPLD_INSTRUCTION_SIZE);
-        tap_idle();
-        jtag_send_data(0xFFFF, chip_cpld_info->data_register_length);
-        tap_idle();
-        break;
-    default:
-        break;
-    } /* End of switch */
-}
-
-/*
- * jtag_rt_disable
- * JTAG Disable state machine under Real-Time ISP
- */
-static void jtag_rt_disable(void)
-{
-    jtag_send_instruction(RT_ISC_DISABLE, CPLD_INSTRUCTION_SIZE);
-    tap_idle();
-    jtag_send_instruction(BYPASS, CPLD_INSTRUCTION_SIZE);
-    tap_idle();
-}
-
-/*
- * jtag_verify_idcode
- * function :JTAG internal ID reading
- */
-static void jtag_verify_idcode(void)
-{
-    int data, i;
-    u8 buf[2];
-
-    jtag_send_instruction(ISC_ADDRESS_SHIFT, CPLD_INSTRUCTION_SIZE);
-    tap_idle();
-    jtag_send_data(chip_cpld_info->verify_idcode_addr,
-                   chip_cpld_info->addr_register_length);
-    tap_idle();
-    for (i = 0; i < VERIFY_IDCODE_SIZE; i++) {
-        jtag_send_instruction(ISC_READ, CPLD_INSTRUCTION_SIZE);
-        tap_idle();
-
-        jtag_read_data(buf, 2);
-
-        /* When validating the ID, the data is compared to the corresponding chip value,
-           which is retrieved from the BSDL file*/
-        data = (buf[1] << 8) | buf[0];
-    }
-}
-
-/*
- * jtag_rt_enable
- * Enter Real-Time ISP mode; JTAG Enable State Machine under Real-Time ISP
- */
-static void jtag_rt_enable(void)
-{
-    jtag_send_instruction(RT_ISC_ENABLE, CPLD_INSTRUCTION_SIZE);
-    tap_idle();
-}
-
-/*
- * jtag_erase
- * JTAG erases the timing
- */
-static void jtag_erase(void)
-{
-    int i;
-
-    jtag_send_instruction(ISC_ADDRESS_SHIFT, CPLD_INSTRUCTION_SIZE);
-    tap_idle();
-    jtag_send_data(chip_cpld_info->first_erase_addr,
-                   chip_cpld_info->addr_register_length);
-    tap_idle();
-    jtag_send_instruction(ISC_ERASE, CPLD_INSTRUCTION_SIZE);
-    tap_idle();
-    for (i = 0; i < ERASE_DELAY; i++) {
-        tap_idle();
-        tap_idle();
-    }
-
-    jtag_send_instruction(ISC_ADDRESS_SHIFT, CPLD_INSTRUCTION_SIZE);
-    tap_idle();
-    jtag_send_data(chip_cpld_info->second_erase_addr,
-                   chip_cpld_info->addr_register_length);
-    tap_idle();
-    jtag_send_instruction(ISC_ERASE, CPLD_INSTRUCTION_SIZE);
-    tap_idle();
-    for (i = 0; i < ERASE_DELAY; i++) {
-        tap_idle();
-        tap_idle();
-    }
-
-    jtag_send_instruction(ISC_ADDRESS_SHIFT, CPLD_INSTRUCTION_SIZE);
-    tap_idle();
-    jtag_send_data(chip_cpld_info->third_erase_addr,
-                   chip_cpld_info->addr_register_length);
-    tap_idle();
-    jtag_send_instruction(ISC_ERASE, CPLD_INSTRUCTION_SIZE);
-    tap_idle();
-    for (i = 0; i < ERASE_DELAY; i++) {
-        tap_idle();
-        tap_idle();
-    }
-}
-
-/*
- * jtag_blank_check
- * JTAG blank detection */
-static void jtag_blank_check(void)
-{
-    int j;
-    int data;
-    u8 buf[2];
-
-    jtag_send_instruction(ISC_ADDRESS_SHIFT, CPLD_INSTRUCTION_SIZE);
-    tap_idle();
-    jtag_send_data(0x0, chip_cpld_info->addr_register_length);
-    tap_idle();
-    for (j = 0; j < chip_cpld_info->first_blank_check_length; j++) {
-        jtag_send_instruction(ISC_READ, CPLD_INSTRUCTION_SIZE);
-        tap_idle();
-
-        jtag_read_data(buf, 2);
-        data = (buf[1] << 8) | buf[0];
-    }
-
-    jtag_send_instruction(ISC_ADDRESS_SHIFT, CPLD_INSTRUCTION_SIZE);
-    tap_idle();
-    jtag_send_data(0x1, chip_cpld_info->addr_register_length);
-    tap_idle();
-    for (j = 0; j < chip_cpld_info->second_blank_check_length; j++) {
-        jtag_send_instruction(ISC_READ, CPLD_INSTRUCTION_SIZE);
-        tap_idle();
-
-        jtag_read_data(buf, 2);
-        data = (buf[1] << 8) | buf[0];
-    }
-}
-
-/*
- * jtag_verify1
- * function :JTAG content validation
- * @buffer : param[in]  original data
- * return value  0  validation success; -1 validation failed
- */
-static int jtag_verify1(unsigned int *buffer)
-{
-    int j, ret = 0;
-    unsigned int data;
-    u8 buf[2];
-
-    jtag_send_instruction(ISC_ADDRESS_SHIFT, CPLD_INSTRUCTION_SIZE);
-    tap_idle();
-    jtag_send_data(0x0, chip_cpld_info->addr_register_length);
-    tap_idle();
-    for (j = 0; j < chip_cpld_info->eeprom_array_length; j++) {
-        jtag_send_instruction(ISC_READ, CPLD_INSTRUCTION_SIZE);
-        tap_idle();
-
-        jtag_read_data(buf, 2);
-        data = (buf[1] << 8) | buf[0];
-
-        if (data != buffer[j]) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("%d: %02x, %02x.\n", j, data, buffer[j]);
-            ret = -1;
-            break;
-        }
-    }
-    return ret;
-}
-
-/*
- * jtag_read_buffer
- * function:JTAG internal data reading
- * @size: param[in]   Read size
- * @buffer: param[out]  Pointer to read data
- */
-static void jtag_read_buffer(unsigned int *buffer, int size)
-{
-    int j;
-    int data;
-    u8 buf[2];
-
-    jtag_send_instruction(ISC_ADDRESS_SHIFT, CPLD_INSTRUCTION_SIZE);
-    tap_idle();
-    jtag_send_data(0x0, chip_cpld_info->addr_register_length);
-    tap_idle();
-    for (j = 0; j < size; j++) {
-        jtag_send_instruction(ISC_READ, CPLD_INSTRUCTION_SIZE);
-        tap_idle();
-
-        jtag_read_data(buf, 2);
-        data = (buf[1] << 8) | buf[0];
-        buffer[j] = data;
-    }
-}
-
-/*
- * jtag_program
- * function:JTAG programming timing
- * @buffer: param[in]  data pointer to program
- */
-static void jtag_program(unsigned int *buffer)
-{
-    int i, j;
-
-    jtag_send_instruction(ISC_ADDRESS_SHIFT, CPLD_INSTRUCTION_SIZE);
-    tap_idle();
-    jtag_send_data(0x0, chip_cpld_info->addr_register_length);
-    tap_idle();
-    for (j = 0; j < chip_cpld_info->eeprom_array_length; j++) {
-        jtag_send_instruction(ISC_PROGRAM, CPLD_INSTRUCTION_SIZE);
-        tap_idle();
-
-        jtag_send_data(buffer[j], chip_cpld_info->data_register_length);
-        for (i = 0; i < PROGRAM_DELAY; i++) {
-            tap_idle();
-            tap_idle();
-        }
-    }
-}
-
-/*
- * cpld_read_id
- * function: CPLD chip ID read
- * @chip: param[in] chip index
- * id : param[out] ID point */
-static void cpld_read_id(int chip, unsigned int *id)
-{
-    u8 data[sizeof(int)];
-    if (!chip_num || chip > chip_num) {
-        return;
-    }
-    current_chip_index = chip;
-    /* Send instructions */
-    jtag_send_instruction(IDCODE, CPLD_INSTRUCTION_SIZE);
-    /* Read Data */
-    jtag_read_data(data, sizeof(int));
-    *id = (data[3] << 24) | (data[2] << 16) | (data[1] << 8) | data[0];
-}
-
-/*
- * chip_num_init
- * function:CPLD number of chips initialized */
-static void chip_num_init(void)
-{
-    unsigned int i, id;
-    unsigned char buf[sizeof(int) * CPLD_MAX_CHIP];
-    chip_num = 0;
-
-    /* JTAG state switching */
-    tap_run_test_idle();
-    tap_select_dr_scan();
-    tap_capture_dr();
-    tap_shift_dr();
-
-    for (i = 0; i < sizeof(int) * CPLD_MAX_CHIP; i++) {
-        tap_rcv_byte(&buf[i]);
-    }
-
-    /* JTAG state switching */
-    tap_exit1_dr(0);
-    tap_update_dr();
-    tap_run_test_idle();
-
-    for (i = 0; i < sizeof(int) * CPLD_MAX_CHIP; i += 4) {
-        id = (buf[i + 3] << 24) | (buf[i + 2] << 16) | (buf[i + 1] << 8) | buf[i];
-        FIRMWARE_DRIVER_DEBUG_VERBOSE("ID: %04x\n", id);
-        if (id != 0xFFFFFFFF && id != 0) {
-            chip_num++;
-        }
-    }
-}
-
-/*
- * cpld_reset
- * function: reset JTAG
- * @chip: param[in] chip index
- */
-static void cpld_reset(int chip)
-{
-    unsigned int chip_type_id = 0;
-    int i;
-    /* JTAG enters the reset state */
-    tap_test_logic_reset();
-    /* Gets the number of chips in the CPLD */
-    chip_num_init();
-    if (!chip_num) {
-        pr_notice("There is no CPLD chip or the chip is not supported!!\r\n");
-        FIRMWARE_DRIVER_DEBUG_ERROR("chip_num == NULL.\n");
-    } else {
-        FIRMWARE_DRIVER_DEBUG_VERBOSE("enter cpld read id.\n");
-        current_chip_index = chip;
-        /* Read chip ID */
-        cpld_read_id(current_chip_index, &chip_type_id);
-        FIRMWARE_DRIVER_DEBUG_VERBOSE("get cpld id: 0x%x.\n", chip_type_id);
-        for (i = 0; cpld_id_table[i].name != NULL; i++) {
-            if (cpld_id_table[i].id == chip_type_id) {
-                chip_cpld_info = &cpld_id_table[i];
-                break;
-            }
-        }
-    }
-    current_chip_index = -1;
-    tap_test_logic_reset();
-}
-
-/*
- * cpld_program
- * function: CPLD programming interface
- * @chip: param[in]    Chip serial number/chip index
- * @buffer: param[in]  data pointer to program
- * return value:      0 success; -1 fail
- */
-static int cpld_program(int chip, unsigned int *buffer)
-{
-    int ret;
-    int counte;
-
-    if (!chip_num || chip > chip_num
-        || chip_cpld_info == NULL) {
-        return -1;
-    }
-    current_chip_index = chip;
-
-    /* Enter Real-Time ISP mode */
-    jtag_rt_enable();
-    /* JTAG internal ID reading */
-    jtag_verify_idcode();
-    /* JTAG erases */
-    jtag_erase();
-    /* JTAG blank detection */
-    jtag_blank_check();
-    /* JTAG programming timing */
-    jtag_program(buffer);
-
-    /* In the process of upgrade, there is a problem with reading data,
-     * which may occur in the process of reading. Some bit reading fails,
-     * but the reason is not found.
-     * Avoidance resolution: perform multiple checks */
-    for (counte = 0; counte < 4; counte++) {
-        ret = jtag_verify1(buffer);
-        if (counte > 0) {
-            pr_notice("Verify again(%d).\n", counte + 1);
-        }
-
-        if (ret == 0) {
-            break;
-        }
-    }
-    pr_notice("Write chip %d cpld success(%d).\n", chip, ret);
-    jtag_program_donebit();
-
-    /* JTAG Disable state machine under Real-Time ISP */
-    jtag_rt_disable();
-
-    return ret;
-}
-
-static void cpld_read_buffer(int chip, unsigned int *buffer, unsigned int size)
-{
-    if (!chip_num || chip > chip_num
-        || chip_cpld_info == NULL) {
-        return;
-    }
-    current_chip_index = chip;
-
-    /* Enter Real-Time ISP mode */
-    jtag_rt_enable();
-
-    /* JTAG internal ID reading */
-    jtag_verify_idcode();
-
-    /* JTAG internal data reading */
-    jtag_read_buffer(buffer, size);
-
-    jtag_rt_disable();
-
-}
-
-/*
- * cpld_eeprom_size
- * function:CPLD chip capacity size
- * return value :Returns chip capacity on success, or 0 on failure
- */
-static int cpld_eeprom_size(void)
-{
-    int ret;
-
-    if (!chip_num || chip_cpld_info == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("chip_num:%d or chip_cpld_info == NULL.\n", chip_num);
-        ret = 0;
-    } else {
-        ret = chip_cpld_info->eeprom_array_length;
-        FIRMWARE_DRIVER_DEBUG_ERROR("chip_cpld_info->eeprom_array_length = %d.\n",
-            chip_cpld_info->eeprom_array_length);
-    }
-
-    return ret;
-}
-
-/*
- * cpld_read_name
- * function: Gets the CPLD chip name
- * @chip: param[in] Chip serial number/chip index
- * return value :chip name */
-static char *cpld_read_name(int chip)
-{
-    uint chip_type_id;
-    int i;
-
-    chip_type_id = 0;
-    cpld_read_id(chip, &chip_type_id);
-    for (i = 0; cpld_id_table[i].name != NULL; i++) {
-         if (cpld_id_table[i].id == chip_type_id) {
-             return cpld_id_table[i].name;
-         }
-    }
-
-    return NULL;
-}
-
-/*
- * cpld_upgrade_init
- * function:Initialize GPIO and CPLD
- * return value: success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-static int cpld_upgrade_init(void)
-{
-    int ret;
-
-    if (function_fmw_cpld.init_cpld != NULL) {
-        ret = function_fmw_cpld.init_cpld();
-        if (ret != FIRMWARE_SUCCESS) {
-            return ret;
-        }
-    }
-
-    return FIRMWARE_SUCCESS;
-}
-
-/*
- * cpld_upgrade_finish
- * function:Release GPIO and CPLD
- * return value: success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-static int cpld_upgrade_finish(void)
-{
-    int ret;
-
-    if (function_fmw_cpld.finish_cpld != NULL) {
-        ret = function_fmw_cpld.finish_cpld();
-        if (ret != FIRMWARE_SUCCESS) {
-            return ret;
-        }
-    }
-
-    return FIRMWARE_SUCCESS;
-}
-
-static int cpld_str_hex_to_dec(char *str, char end_char)
-{
-    int i;
-    int result;
-
-    if (str == NULL) {
-        return FIRMWARE_FAILED;
-    }
-
-    i = 0;
-    result = 0;
-    while (str[i] != end_char) {
-        /* Check for hexadecimal characters:0123456789abcdef */
-        if (!isxdigit(str[i]) || i >= CPLD_UNIT_SZ) {
-            return FIRMWARE_FAILED;
-        }
-        /* Check for a number between 0 and 9 */
-        if (isdigit(str[i])) {
-            result = result * CPLD_HEX + str[i] - '0';
-        }
-        /* Check if the character is uppercase */
-        else if (isupper(str[i])) {
-            result = result * CPLD_HEX + str[i] - 'A' + DEC_VAL;
-        } else {
-            result = result * CPLD_HEX + str[i] - 'a' + DEC_VAL;
-        }
-
-        i++;
-    }
-
-    return result;
-}
-
-static int cpld_check_upgrade_data(char *src, int src_len, int *dst, int dst_len)
-{
-    int i, init_lcnt, tmp;
-    char *ptr;
-    int ret;
-
-    if (src == NULL || dst == NULL) {
-        return FIRMWARE_FAILED;
-    }
-    /* Pointers the ptr pointer to the data following the CPLD_INIT_KEYWORD */
-    ret = FIRMWARE_SUCCESS;
-    ptr = strstr(src, CPLD_INIT_KEYWORD);
-    if (ptr == NULL) {
-        return FIRMWARE_FAILED;
-    } else {
-        ptr += strlen(CPLD_INIT_KEYWORD);
-        while (*ptr == '(' || *ptr == '\r' || *ptr == '\n') {
-            ptr++;
-        }
-    }
-
-    /* Converts a hexadecimal string to decimal, with 4 groups of 4 bytes each */
-    i = 0;
-    init_lcnt = 0;
-    for (init_lcnt = 0; init_lcnt < CPLD_INIT_CNT; init_lcnt++) {
-        tmp = cpld_str_hex_to_dec(ptr, CPLD_END_CHAR);
-        if (tmp < 0) {
-            ret = tmp;
-            return ret;
-        }
-        /* int type is 4 bytes */
-        dst[i++] = tmp;
-        if (i >= dst_len) {
-            return FIRMWARE_SUCCESS;
-        }
-
-        ptr += CPLD_UNIT_SZ + 1;
-
-        while (*ptr == '\r' || *ptr == '\n') {
-            ptr++;
-        }
-    }
-
-    /* Point the ptr pointer to the data after CPLD_REPEAT_KEYWORD */
-    ptr = strstr(src, CPLD_REPEAT_KEYWORD);
-    if (ptr == NULL) {
-        return FIRMWARE_FAILED;
-    } else {
-        ptr += strlen(CPLD_REPEAT_KEYWORD);
-        while (*ptr == '(' || *ptr == '\r' || *ptr == '\n') {
-            ptr++;
-        }
-    }
-
-    while (1) {
-        /* Converts the 4 bytes before ',' to base 10 */
-        tmp = cpld_str_hex_to_dec(ptr, CPLD_END_CHAR);
-        if (tmp < 0) {
-            ret = tmp;
-            break;
-        }
-        dst[i++] = tmp;
-        if (i >= dst_len) {
-            return FIRMWARE_SUCCESS;
-        }
-
-        ptr += CPLD_UNIT_SZ + 1;
-
-        while (*ptr == '\r' || *ptr == '\n') {
-            ptr++;
-        }
-    }
-
-    return FIRMWARE_SUCCESS;
-}
-
-/**
- * fmw_cpld_upg_get_chip_name
- * function:get chip name
- * @chain: param[in]  chain
- * @cpld: param[in]  Device private data
- * @len:  param[in]  chip name length
- * @info: param[out] chip name
- * return value: success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-int fmw_cpld_upg_get_chip_name(int chain, firmware_cpld_t *cpld, char *info, int len)
-{
-    int ret;
-    char *name;
-
-    /* Check the input and output parameters */
-    if (chain < 0 || info == NULL || len <= 0) {
-        return FIRMWARE_FAILED;
-    }
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Cpld driver to get chip name.\n");
-
-    if (cpld == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to get gpio info.(chain = %d)\n", chain);
-    } else {
-        set_currrent_cpld_info(cpld);
-    }
-
-    if (chain != current_fmw_cpld->chain) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("The chain num is not fit."
-                                    "(chain = %d, current chain = %d, current name: %s)\n",
-                  chain, current_fmw_cpld->chain, current_fmw_cpld->devname);
-    }
-
-    /* Initialize GPIO and CPLD */
-    ret = cpld_upgrade_init( );
-    if (ret != FIRMWARE_SUCCESS) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error:Failed to get chip name when init upgrade.(chain = %d)\n",
-            chain);
-        return FIRMWARE_FAILED;
-    }
-
-    /* reset JTAG */
-    cpld_reset(current_fmw_cpld->chip_index);
-    /* Read chip name */
-    name = cpld_read_name(current_fmw_cpld->chip_index);
-    if (name == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to get chip name when read name.(chain %d, index %d)\n",
-            chain, current_fmw_cpld->chip_index);
-        cpld_upgrade_finish( );
-        return FIRMWARE_FAILED;
-    }
-
-    /* Release GPIO */
-    ret = cpld_upgrade_finish( );
-    if (ret != FIRMWARE_SUCCESS) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to get chip name when finish upgrade.(chain = %d)\n",
-            chain);
-        return FIRMWARE_FAILED;
-    }
-
-    strncpy(info, name, len);
-
-    return FIRMWARE_SUCCESS;
-}
-
-/**
- * fmw_cpld_upg_program
- * function:Upgrade CPLD(ISC file format)
- * @chain: param[in] chain
- * @cpld: param[in] Device private data
- * @info: param[in] Data to be written
- * @len:  param[in] Length of data to be written
- * return value: success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-int fmw_cpld_upg_program(int chain, firmware_cpld_t *cpld, char *info, int len)
-{
-    int i;
-    int time;
-    int ret;
-    int target_len;
-    int *target_buf;
-
-    /* Check the input parameters */
-    if (chain < 0 || info == NULL || len <= 0) {
-        return FIRMWARE_FAILED;
-    }
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Cpld driver to program chip.\n");
-
-    if (cpld == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to get gpio info.(chain = %d)\n", chain);
-    } else {
-        set_currrent_cpld_info(cpld);
-    }
-
-    if (chain != current_fmw_cpld->chain) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("The chain num is not fit.(chain = %d, current chain = %d)\n",
-                  chain, current_fmw_cpld->chain);
-    }
-    /* Initialize GPIO and CPLD */
-    ret = cpld_upgrade_init( );
-    if (ret != FIRMWARE_SUCCESS) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to program when init upgrade.(chain = %d)\n",
-                  chain);
-        return FIRMWARE_FAILED;
-    }
-
-    /* reset JTAG */
-    cpld_reset(current_fmw_cpld->chip_index);
-    /* CPLD chip capacity size */
-    target_len = cpld_eeprom_size();
-    if (target_len <= 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to get cpld size.(chain = %d)\n",
-                  chain);
-        cpld_upgrade_finish( );
-        return FIRMWARE_FAILED;
-    }
-
-    target_buf = (int *) kzalloc(target_len * sizeof(int), GFP_KERNEL);
-    if (target_buf == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to malloc target buffer.(chain = %d)\n",
-                  chain);
-        cpld_upgrade_finish( );
-        return FIRMWARE_FAILED;
-    }
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("cpld_check_upgrade_data start.(chain = %d, %d)\n",
-                  chain, target_len);
-    /* Remove extraneous information */
-    ret = cpld_check_upgrade_data(info, len, target_buf, target_len);
-    if (ret < 0){
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to check data.(chain = %d)\n",
-                  chain);
-        kfree(target_buf);
-        cpld_upgrade_finish( );
-        return FIRMWARE_FAILED;
-    }
-
-    for (i = 0; i < 16 * 8; i += 8) {
-        FIRMWARE_DRIVER_DEBUG_VERBOSE(" %x %x %x %x %x %x %x %x\n",
-                  target_buf[i], target_buf[i + 1],
-                  target_buf[i + 2], target_buf[i + 3],
-                  target_buf[i + 4], target_buf[i + 5],
-                  target_buf[i + 6], target_buf[i + 7]);
-    }
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("cpld_check_upgrade_data finish.(chain = %d)\n", chain);
-
-    /* CPLD device writing */
-    for (time = 0; time < 10; time++) {
-        FIRMWARE_DRIVER_DEBUG_VERBOSE("Start upgrade cpld: %d.(chain = %d)\n", time, chain);
-        ret = cpld_program(current_fmw_cpld->chip_index, target_buf);
-        if (ret >= 0) {
-            break;
-        }
-    }
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to program.(chain = %d)\n", chain);
-        kfree(target_buf);
-        cpld_upgrade_finish( );
-        return FIRMWARE_FAILED;
-    }
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("SUCCESS PROGRAM.\n");
-
-    /* Release GPIO */
-    ret = cpld_upgrade_finish();
-    if (ret != FIRMWARE_SUCCESS) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to program when finish upgrade.(chain = %d)\n",
-                  chain);
-    }
-
-    kfree(target_buf);
-    return FIRMWARE_SUCCESS;
-}
-
-/**
- * fmw_cpld_upg_program_jbi
- * function: Upgrade CPLD(JBI file format)
- * @chain: param[in] chain
- * @cpld: param[in] Device private data
- * @info: param[in] Data to be written
- * @len:  param[in] Length of data to be written
- * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-int fmw_cpld_upg_program_jbi(int chain, firmware_cpld_t *cpld, char *info, int len)
-{
-    int time, ret;
-    int argc = 3;
-    char *argv[] = {
-        "-r",
-        "-aprogram",
-        "-ddo_real_time_isp=1"
-    };
-
-    /* Check the input parameters */
-    if (chain < 0 || info == NULL || len <= 0) {
-        return FIRMWARE_FAILED;
-    }
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Cpld driver to program chip %d(%p,%p,%d).\n",
-        chain, cpld, info, len);
-
-    if (cpld == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to get gpio info.(chain = %d)\n", chain);
-    } else {
-        set_currrent_cpld_info(cpld);
-    }
-
-    if (chain != current_fmw_cpld->chain) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("The chain num is not fit.(chain = %d, current chain = %d)\n",
-            chain, current_fmw_cpld->chain);
-    }
-    /* Initialize GPIO and CPLD */
-    ret = cpld_upgrade_init( );
-    if (ret != FIRMWARE_SUCCESS) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to program when init upgrade.(chain = %d)\n",
-            chain);
-        return FIRMWARE_FAILED;
-    }
-
-    /* reset JTAG */
-    cpld_reset(current_fmw_cpld->chip_index);
-
-    for (time = 0; time < 30; time++) {
-        FIRMWARE_DRIVER_DEBUG_VERBOSE("Start upgrade cpld: %d.(chain = %d)\n", time, chain);
-        ret = jbi_main((unsigned char *) info, (unsigned long) len, argc, argv);
-        if (ret == 0) {
-            break;
-        }
-    }
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to program.(chain = %d)\n", chain);
-        cpld_upgrade_finish( );
-        return FIRMWARE_FAILED;
-    }
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("SUCCESS PROGRAM.\n");
-
-    /* Release GPIO and CPLD */
-    ret = cpld_upgrade_finish( );
-    if (ret != FIRMWARE_SUCCESS) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to program when finish upgrade.(chain = %d)\n",
-                  chain);
-    }
-
-    return FIRMWARE_SUCCESS;
-}
-
-/**
- * fmw_cpld_upg_get_version
- * function: get version
- * @chain: param[in]  chain
- * @cpld: param[in]  Device private data
- * @len:  param[in]  Data length
- * @info: param[out] Version information buffer
- * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-int fmw_cpld_upg_get_version(int chain, firmware_cpld_t *cpld, char *info, int len)
-{
-    int ret;
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Cpld driver to get version.\n");
-    if (cpld == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to get gpio info.(chain = %d)\n", chain);
-    } else {
-        set_currrent_cpld_info(cpld);
-    }
-
-    if (chain != current_fmw_cpld->chain) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("The chain num is not fit.(chain = %d, current chain = %d)\n",
-                  chain, current_fmw_cpld->chain);
-    }
-
-    /* CPLD device can't get version */
-    if (function_fmw_cpld.get_version != NULL) {
-        ret = function_fmw_cpld.get_version(chain, info, len);
-        if (ret < 0) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed get version in chain: %d.\n", chain);
-            return FIRMWARE_FAILED;
-        }
-
-        return FIRMWARE_SUCCESS;
-    } else {
-        FIRMWARE_DRIVER_DEBUG_ERROR("The get_version is NULL in chain: %d.\n", chain);
-    }
-
-    return FIRMWARE_FAILED;
-}
-
-/**
- * fmw_cpld_upg_get_chip_info
- * function: Get chip content
- * @chain:  param[in]  chain
- * @cpld:  param[in]  Device private data
- * @len:   param[in]  Data length
- * @info:  param[out] Read Data Buffer
- * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-int fmw_cpld_upg_get_chip_info(int chain, firmware_cpld_t *cpld, void *info, int len)
-{
-    int i;
-    int ret;
-    int target_len;
-    int *target_buf;
-
-    /* Check input and output parameters */
-    if (chain < 0 || info == NULL || len <= 0) {
-        return FIRMWARE_FAILED;
-    }
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Cpld driver to read chip.\n");
-
-    if (cpld == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to get gpio info.(chain = %d)\n", chain);
-    } else {
-        set_currrent_cpld_info(cpld);
-    }
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Cpld driver to read chip: %s.\n",current_fmw_cpld->devname);
-    if (chain != current_fmw_cpld->chain) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("The chain num is not fit.(chain = %d, current chain = %d)\n",
-                  chain, current_fmw_cpld->chain);
-    }
-
-    /* Initialize GPIO and CPLD */
-    ret = cpld_upgrade_init( );
-    if (ret != FIRMWARE_SUCCESS) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to program when init upgrade.(chain = %d)\n",
-                  chain);
-        return FIRMWARE_FAILED;
-    }
-
-    /* reset JTAG*/
-    cpld_reset(current_fmw_cpld->chip_index);
-    /* CPLD chip capacity size */
-    target_len = cpld_eeprom_size();
-    if (target_len <= 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to get cpld size.(chain = %d)\n",
-                  chain);
-        cpld_upgrade_finish( );
-        return FIRMWARE_FAILED;
-    }
-
-    target_buf = (int *) kzalloc(target_len * sizeof(int), GFP_KERNEL);
-    if (target_buf == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to malloc target buffer.(chain = %d)\n",
-                  chain);
-        cpld_upgrade_finish( );
-        return FIRMWARE_FAILED;
-    }
-    /* Read chip */
-    cpld_read_buffer(current_fmw_cpld->chip_index, target_buf, target_len);
-
-    for (i = 0; i < 16 * 8; i += 8) {
-        FIRMWARE_DRIVER_DEBUG_VERBOSE(" %x %x %x %x %x %x %x %x\n",
-                  target_buf[i], target_buf[i + 1],
-                  target_buf[i + 2], target_buf[i + 3],
-                  target_buf[i + 4], target_buf[i + 5],
-                  target_buf[i + 6], target_buf[i + 7]);
-    }
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Success Read.\n");
-
-    /* Release GPIO and CPLD */
-    ret = cpld_upgrade_finish( );
-    if (ret != FIRMWARE_SUCCESS) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to program when finish upgrade.(chain = %d)\n",
-                  chain);
-    }
-
-    if (copy_to_user(info, target_buf, (len > target_len) ? target_len : len)) {
-        kfree(target_buf);
-        return FIRMWARE_FAILED;
-    }
-
-    kfree(target_buf);
-    return FIRMWARE_SUCCESS;
-}
-
-/**
- * jbi_jtag_io_
- * function: JBI GPIO operation
- * @tms: param[in]  TMS signal level
- * @tdi: param[in]  TDI signal level
- * @read_tdo:  param[in] Whether to read the level of the TDO
- * return value : tdo
- */
-int __attribute__ ((weak)) jbi_jtag_io_(int tms, int tdi, int read_tdo)
-{
-    int tdo = 0;
-
-    if (tms) {
-        TMS_PULL_UP();
-    } else {
-        TMS_PULL_DOWN();
-    }
-
-    if (tdi) {
-        TDI_PULL_UP();
-    } else {
-        TDI_PULL_DOWN();
-    }
-
-    TCK_PULL_UP();
-    ndelay(TCK_DELAY);
-
-    if (read_tdo) {
-        tdo = TDO_READ();
-    }
-
-    TCK_PULL_DOWN();
-    ndelay(TCK_DELAY);
-
-    return tdo;
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/include/firmware.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/include/firmware.h
deleted file mode 100644
index 3a6ab117df5d..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/include/firmware.h
+++ /dev/null
@@ -1,82 +0,0 @@
-#ifndef __FIRMWARE_H__
-#define __FIRMWARE_H__
-
-#include <linux/miscdevice.h>
-#include <linux/platform_device.h>
-
-#include <asm/ioctl.h>
-
-/* Debug switch level */
-typedef enum {
-    FIRWMARE_VERBOSE,
-    FIRWMARE_WARN,
-    FIRWMARE_ERROR,
-    FIRWMARE_END,
-} firmware_debug_level_t;
-
-#define FIRMWARE_DRIVER_DEBUG_VERBOSE(fmt, args...) do { \
-    if ((g_firmware_driver_debug) & (1U << FIRWMARE_VERBOSE)) { \
-        printk(KERN_INFO "[FIRMWARW_DRIVER_CPLD][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-#define FIRMWARE_DRIVER_DEBUG_ERROR(fmt, args...) do { \
-    if ((g_firmware_driver_debug) & (1U << FIRWMARE_ERROR)) { \
-        printk(KERN_ERR "[FIRMWARW_DRIVER_CPLD][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-#define FIRMWARE_NAME_LEN      48
-
-#define FIRMWARE_FAILED              (-1)
-#define FIRMWARE_SUCCESS             0
-
-/* ioctl publi command, the same as "firmware_upgrade\include\firmware_app.h" */
-#define FIRMWARE_COMMON_TYPE 'C'
-#define FIRMWARE_GET_CHIPNAME            _IOR(FIRMWARE_COMMON_TYPE, 0, char)    /* get the chip name */
-#define FIRMWARE_GET_VERSION             _IOR(FIRMWARE_COMMON_TYPE, 2, int)     /* get version */
-
-/* firmware cpld driver ioctl command, the same as "firmware_upgrade\include\firmware_app.h" */
-#define FIRMWARE_TYPE 'J'
-#define FIRMWARE_PROGRAM                 _IOW(FIRMWARE_TYPE, 1, char)    /* firmware upgrade ISC */
-#define FIRMWARE_READ_CHIP               _IOR(FIRMWARE_TYPE, 5, int)     /* read the contents of the chip */
-#define FIRMWARE_PROGRAM_JBI             _IOW(FIRMWARE_TYPE, 6, char)    /* firmware upgrade JBI */
-
-typedef struct cmd_info_s {
-    uint32_t size;
-    void __user *data;
-} cmd_info_t;
-
-typedef struct firmware_device_s {
-    struct list_head list;             /* device list */
-    uint32_t chain;                    /* chain number */
-    char name[FIRMWARE_NAME_LEN];      /* name */
-    struct miscdevice dev;             /* device */
-    void *priv;                        /* private data */
-} firmware_device_t;
-
-typedef struct firmware_driver_s {
-    struct list_head list;             /* list */
-    char name[FIRMWARE_NAME_LEN];      /* name */
-    struct platform_driver *drv;       /* driver */
-    void *priv;                        /* private data */
-} firmware_driver_t;
-
-extern int g_firmware_driver_debug;
-
-/* Get device information based on minor */
-extern firmware_device_t *firmware_get_device_by_minor(int minor);
-/* Registere device */
-extern int firmware_device_register(firmware_device_t *fw_dev);
-/* Unregister device */
-extern void firmware_device_unregister(firmware_device_t *fw_dev);
-/* Registere driver */
-extern int firmware_driver_register(firmware_driver_t *fw_drv);
-/* Unregister driver */
-extern void firmware_driver_unregister(firmware_driver_t *fw_drv);
-/* CPLD upgrade initialized */
-extern int firmware_cpld_init(void);
-/* CPLD unload function */
-extern void firmware_cpld_exit(void);
-
-#endif /* end of __FIRMWARE_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/include/firmware_cpld.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/include/firmware_cpld.h
deleted file mode 100644
index ef69655a4b2e..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/include/firmware_cpld.h
+++ /dev/null
@@ -1,64 +0,0 @@
-#ifndef __FIRMWARE_CPLD_H__
-#define __FIRMWARE_CPLD_H__
-
-#define FIRMWARE_DEV_NAME_LEN     32
-#define FIRMWARE_MAX_CPLD_NUM     16
-#define FIRMWARE_TYPE_LEN         10
-#define FIRMWARE_EN_INFO_MAX      16
-#define FIRMWARE_EN_INFO_BUF      128
-
-typedef struct firmware_gpio_jtag_en_s {
-    uint32_t en_gpio;                                               /* GPIO enable pin */
-    uint32_t en_level;                                              /* GPIO enable level */
-    int flag;                                                       /* init flag; 1-init 0-not init */
-} firmware_gpio_jtag_en_t;
-
-typedef struct firmware_cpld_s {
-    char devname[FIRMWARE_DEV_NAME_LEN];                        /* Device name */
-    char type[FIRMWARE_TYPE_LEN];                               /* interface type */
-    uint32_t tdi;                                               /* TDI signal corresponding to GPIO pin information */
-    uint32_t tck;                                               /* TCK signal corresponding to GPIO pin information */
-    uint32_t tms;                                               /* TMS signal corresponding to GPIO pin information */
-    uint32_t tdo;                                               /* TDO signal corresponding to GPIO pin information */
-    uint32_t chain;                                             /* chain num */
-    uint32_t chip_index;                                        /* chip index */
-    uint32_t tck_delay;                                         /* Delay time */
-    uint32_t gpio_en_info_num;                                  /* GPIO Enable Number */
-    firmware_gpio_jtag_en_t gpio_en_info[FIRMWARE_EN_INFO_MAX]; /* GPIO Enable Information */
-} firmware_cpld_t;
-
-typedef struct firmware_cpld_function_s{
-    int (*pull_tdi_up)(void);                          /* TDI pull-up */
-    int (*pull_tdi_down)(void);                        /* TDI pull-down */
-    int (*pull_tck_up)(void);                          /* TCK pull-up */
-    int (*pull_tck_down)(void);                        /* TCK pull-down */
-    int (*pull_tms_up)(void);                          /* TMS pull-up */
-    int (*pull_tms_down)(void);                        /* TCK pull-down */
-    int (*read_tdo)(void);                             /* Read TDO */
-    int (*init_cpld)(void);                            /* CPLD upgrade initializes the operation */
-    int (*init_chip)(int chain);                       /* chip initializes the operation */
-    int (*finish_chip)(int chain);                     /* chip completes the operation*/
-    int (*finish_cpld)(void);                          /* CPLD upgrade completes the operation */
-    int (*get_version)(int chain, char *ver, int len); /* get version */
-}firmware_cpld_function_t;
-
-/* get chip name */
-extern int fmw_cpld_upg_get_chip_name(int chain, firmware_cpld_t *cpld, char *info, int len);
-/* ISC firmware upgrad */
-extern int fmw_cpld_upg_program(int chain, firmware_cpld_t *cpld, char *info, int len);
-/* get version */
-extern int fmw_cpld_upg_get_version(int chain, firmware_cpld_t *cpld, char *info, int len);
-/* Read the contents of Chip */
-extern int fmw_cpld_upg_get_chip_info(int chain, firmware_cpld_t *cpld, void *info, int len);
-/* operate TDI */
-extern int fwm_cpld_tdi_op(int value);
-/* operate TCK */
-extern int fwm_cpld_tck_op(int value);
-/* operate TMS */
-extern int fwm_cpld_tms_op(int value);
-/* operate TDO */
-extern int fwm_cpld_tdo_op(void);
-/* JBI firmware upgrad */
-extern int fmw_cpld_upg_program_jbi(int chain, firmware_cpld_t *cpld, char *info, int len);
-
-#endif /* __FIRMWARE_CPLD_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/include/jbi.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/include/jbi.h
deleted file mode 100644
index 865c8d352174..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/include/jbi.h
+++ /dev/null
@@ -1,15 +0,0 @@
-#ifndef __JBI_H__
-#define __JBI_H__
-
-#include <linux/types.h>
-
-/* JTAG operation interface*/
-extern int jbi_jtag_io_(int tms, int tdi, int read_tdo);
-/* delay function */
-extern void jbi_jtag_udelay(unsigned long us);
-/* Debug switch */
-extern int jbi_debug(int level);
-/* JBI upgrade function */
-extern int jbi_main(unsigned char *addr, unsigned long size, int argc, char * const argv[]);
-
-#endif /* __JBI_JTAG_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbicomp.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbicomp.c
deleted file mode 100644
index 064d0ae50ec4..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbicomp.c
+++ /dev/null
@@ -1,438 +0,0 @@
-/****************************************************************************/
-/*                                                                          */
-/*  Module:         jbicomp.c                                               */
-/*                                                                          */
-/*                  Copyright (C) Altera Corporation 1997-2001              */
-/*                                                                          */
-/*  Description:    Contains the code for compressing and uncompressing     */
-/*                  Boolean array data.                                     */
-/*                                                                          */
-/*                  This algorithm works by searching previous bytes in the */
-/*                  data that match the current data. If a match is found,  */
-/*                  then the offset and length of the matching data can     */
-/*                  replace the actual data in the output.                  */
-/*                                                                          */
-/*  Revisions:      2.2  fixed /W4 warnings                                 */
-/*                                                                          */
-/****************************************************************************/
-
-#include "jbiport.h"
-#include "jbiexprt.h"
-#include "jbicomp.h"
-#include "jbistub.h"
-
-#define SHORT_BITS          16
-#define CHAR_BITS           8
-#define DATA_BLOB_LENGTH    3
-#define MATCH_DATA_LENGTH   8192
-#define JBI_ACA_REQUEST_SIZE 1024
-#define JBI_ACA_BUFFER_SIZE (MATCH_DATA_LENGTH + JBI_ACA_REQUEST_SIZE)
-
-unsigned long jbi_in_length = 0L;
-unsigned long jbi_in_index = 0L;    /* byte index into compressed array */
-unsigned int jbi_bits_avail = CHAR_BITS;
-
-#if PORT == DOS
-int jbi_current_variable_id = -1;
-int jbi_current_page = -1;
-int jbi_version = 0;
-unsigned long jbi_out_length = 0L;
-unsigned int jbi_out_index = 0; /* byte index into jbi_aca_out_buffer[] */
-unsigned long jbi_aca_in_offset = 0L;
-unsigned char jbi_aca_out_buffer[JBI_ACA_BUFFER_SIZE];
-#endif
-
-/****************************************************************************/
-/*                                                                          */
-/*  The following functions implement incremental decompression of Boolean  */
-/*  array data, using a small memory window.                                */
-/*                                                                          */
-/*  This algorithm works by searching previous bytes in the data that match */
-/*  the current data. If a match is found, then the offset and length of    */
-/*  the matching data can replace the actual data in the output.            */
-/*                                                                          */
-/*  Memory usage is reduced by maintaining a "window" buffer which contains */
-/*  the uncompressed data for one 8K page, plus some extra amount specified */
-/*  by JBI_ACA_REQUEST_SIZE.  The function jbi_uncompress_page() is used to */
-/*  request a subrange of the uncompressed data, starting at a particular   */
-/*  bit position and extending a maximum of JBI_ACA_REQUEST_SIZE bytes.     */
-/*                                                                          */
-/****************************************************************************/
-
-/****************************************************************************/
-/*                                                                          */
-
-unsigned int jbi_bits_required(unsigned int n)
-
-/*                                                                          */
-/*  Description:    Calculate the minimum number of bits required to        */
-/*                  represent n.                                            */
-/*                                                                          */
-/*  Returns:        Number of bits.                                         */
-/*                                                                          */
-/****************************************************************************/
-{
-    unsigned int result = SHORT_BITS;
-
-    if (n == 0)
-    {
-        result = 1;
-    }
-    else
-    {
-        /* Look for the highest non-zero bit position */
-        while ((n & (1 << (SHORT_BITS - 1))) == 0)
-        {
-            n <<= 1;
-            --result;
-        }
-    }
-
-    return (result);
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-unsigned int jbi_read_packed
-(
-#if PORT!=DOS
-    unsigned char *buffer,
-#endif
-    unsigned int bits
-)
-
-/*                                                                          */
-/*  Description:    Read the next value from the input array "buffer".      */
-/*                  Read only "bits" bits from the array. The amount of     */
-/*                  bits that have already been read from "buffer" is       */
-/*                  stored internally to this function.                     */
-/*                                                                          */
-/*  Returns:        Up to 16 bit value. -1 if buffer overrun.               */
-/*                                                                          */
-/****************************************************************************/
-{
-    unsigned int result = 0;
-    unsigned int shift = 0;
-    unsigned int databyte = 0;
-
-    while (bits > 0)
-    {
-#if PORT==DOS
-        databyte = GET_BYTE(jbi_aca_in_offset + jbi_in_index);
-#else
-        databyte = buffer[jbi_in_index];
-#endif
-        result |= (((databyte >> (CHAR_BITS - jbi_bits_avail))
-            & (0xFF >> (CHAR_BITS - jbi_bits_avail))) << shift);
-
-        if (bits <= jbi_bits_avail)
-        {
-            result &= (0xFFFF >> (SHORT_BITS - (bits + shift)));
-            jbi_bits_avail -= bits;
-            bits = 0;
-        }
-        else
-        {
-            ++jbi_in_index;
-            shift += jbi_bits_avail;
-            bits -= jbi_bits_avail;
-            jbi_bits_avail = CHAR_BITS;
-        }
-    }
-
-    return (result);
-}
-
-#if PORT==DOS
-
-/****************************************************************************/
-/*                                                                          */
-
-void jbi_uncompress_next_page(int version)
-
-/*                                                                          */
-/*  Description:    Uncompresses one page of compressed data, using         */
-/*                  data page as reference for repeated sections.           */
-/*                  Overwrites previous page of data in buffer.             */
-/*                                                                          */
-/*  Returns:        TRUE for success, FALSE if error encountered            */
-/*                                                                          */
-/****************************************************************************/
-{
-    unsigned int i, j, offset, length;
-    unsigned int end_index;
-    unsigned long tmp_in_index = jbi_in_index;
-    unsigned int tmp_out_index = jbi_out_index;
-    unsigned int tmp_bits_avail = jbi_bits_avail;
-    unsigned int prev[3];
-    unsigned long long_end;
-    unsigned int match_data_length = MATCH_DATA_LENGTH;
-
-    if (version > 0) --match_data_length;
-
-    if (jbi_current_page < 0)
-    {
-        /* this is the first page of the array */
-        jbi_current_page = 0;
-        jbi_in_index = 4;   /* skip over length field */
-        jbi_out_index = 0;
-        end_index = (jbi_out_length < JBI_ACA_BUFFER_SIZE) ?
-            (unsigned int) jbi_out_length : JBI_ACA_BUFFER_SIZE;
-    }
-    else
-    {
-        /* this is not the first page */
-        ++jbi_current_page;
-        jbi_out_index -= MATCH_DATA_LENGTH;
-        long_end = jbi_out_length -
-            ((long) jbi_current_page * (long) MATCH_DATA_LENGTH);
-        end_index = (long_end < JBI_ACA_BUFFER_SIZE) ?
-            (unsigned int) long_end : JBI_ACA_BUFFER_SIZE;
-
-        /* copy extra data from end of circular buffer to beginning */
-        for (i = 0; i < jbi_out_index; ++i)
-        {
-            jbi_aca_out_buffer[i] = jbi_aca_out_buffer[i + MATCH_DATA_LENGTH];
-        }
-    }
-
-    while (jbi_out_index < end_index)
-    {
-        /* save state so we can undo the last packet when we reach the end */
-        tmp_in_index = jbi_in_index;
-        tmp_out_index = jbi_out_index;
-        tmp_bits_avail = jbi_bits_avail;
-
-        /* A 0 bit indicates literal data. */
-        if (jbi_read_packed(1) == 0)
-        {
-            for (i = 0; i < DATA_BLOB_LENGTH; ++i)
-            {
-                if (jbi_out_index < end_index)
-                {
-                    if (version == 0)
-                    {
-                        prev[i] = jbi_aca_out_buffer[jbi_out_index] & 0xff;
-                    }
-                    jbi_aca_out_buffer[jbi_out_index++] =
-                        (unsigned char) jbi_read_packed(CHAR_BITS);
-                }
-            }
-        }
-        else
-        {
-            /* A 1 bit indicates offset/length to follow. */
-            offset = jbi_read_packed(jbi_bits_required(
-                (jbi_current_page > 0) ? match_data_length :
-                (jbi_out_index > match_data_length ? match_data_length :
-                jbi_out_index)));
-            length = jbi_read_packed(CHAR_BITS);
-
-            if ((version == 0) && (offset == match_data_length + 3))
-            {
-                jbi_aca_out_buffer[jbi_out_index++] = (unsigned char) prev[0];
-                jbi_aca_out_buffer[jbi_out_index++] = (unsigned char) prev[1];
-                jbi_aca_out_buffer[jbi_out_index++] = (unsigned char) prev[2];
-                length -= 3;
-            }
-
-            for (i = 0; i < length; ++i)
-            {
-                if (jbi_out_index < end_index)
-                {
-                    if (offset > jbi_out_index)
-                    {
-                        j = jbi_out_index + MATCH_DATA_LENGTH - offset;
-                    }
-                    else j = jbi_out_index - offset;
-                    jbi_aca_out_buffer[jbi_out_index] = jbi_aca_out_buffer[j];
-                    ++jbi_out_index;
-                }
-            }
-
-            if (version == 0)
-            {
-                prev[0] = jbi_aca_out_buffer[jbi_out_index - 3] & 0xff;
-                prev[1] = jbi_aca_out_buffer[jbi_out_index - 2] & 0xff;
-                prev[2] = jbi_aca_out_buffer[jbi_out_index - 1] & 0xff;
-            }
-        }
-    }
-
-    /* restore the state before the previous packet */
-    jbi_in_index = tmp_in_index;
-    jbi_out_index = tmp_out_index;
-    jbi_bits_avail = tmp_bits_avail;
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-void jbi_uncompress_page
-(
-    int variable_id,
-    int page,
-    int version
-)
-
-/*                                                                          */
-/*  Description:    Uncompress requested page of variable data.  Stores     */
-/*                  uncompressed data in jbi_aca_out_buffer[].              */
-/*                                                                          */
-/*  Returns:        TRUE if successful, otherwise FALSE if:                 */
-/*                      1) variable is not a compressed array               */
-/*                      2) compressed data is illegal or corrupted          */
-/*                      3) requested page is beyond the end of the array    */
-/*                      4) internal error in the code                       */
-/*                                                                          */
-/****************************************************************************/
-{
-    unsigned long symbol_table;
-    unsigned long data_section;
-    unsigned long offset;
-    unsigned long value;
-    int delta = version * 2;
-
-    if (variable_id != jbi_current_variable_id)
-    {
-        /* initialize to uncompress the desired variable */
-        symbol_table = GET_DWORD(16 + (version * 8));
-        data_section = GET_DWORD(20 + (version * 8));
-        offset = symbol_table + ((11 + delta) * variable_id);
-        value = GET_DWORD(offset + 3 + delta);
-        jbi_current_variable_id = variable_id;
-        jbi_current_page = -1;
-        jbi_bits_avail = CHAR_BITS;
-        jbi_in_length = GET_DWORD(offset + 7 + delta);
-        jbi_out_length =
-            (((unsigned long) GET_BYTE(data_section + value)) |
-            (((unsigned long) GET_BYTE(data_section + value + 1)) << 8) |
-            (((unsigned long) GET_BYTE(data_section + value + 2)) << 16) |
-            (((unsigned long) GET_BYTE(data_section + value + 3)) << 24));
-        jbi_in_index = 4;   /* skip over length field */
-        jbi_out_index = 0;
-        jbi_aca_in_offset = data_section + value;
-    }
-
-    /* to look back at an earlier page, start over at the beginning */
-    if (page < jbi_current_page)
-    {
-        jbi_current_page = -1;
-        jbi_in_index = 4;   /* skip over length field */
-        jbi_bits_avail = CHAR_BITS;
-    }
-
-    /* uncompress sequentially up to the desired page */
-    while (page > jbi_current_page)
-    {
-        jbi_uncompress_next_page(version);
-    }
-}
-
-#else
-
-/****************************************************************************/
-/*                                                                          */
-
-unsigned long jbi_uncompress
-(
-    unsigned char *in,
-    unsigned long in_length,
-    unsigned char *out,
-    unsigned long out_length,
-    int version
-)
-
-/*                                                                          */
-/*  Description:    Uncompress data in "in" and write result to "out".      */
-/*                                                                          */
-/*  Returns:        Length of uncompressed data. -1 if:                     */
-/*                      1) out_length is too small                          */
-/*                      2) Internal error in the code                       */
-/*                      3) in doesn't contain ACA compressed data.          */
-/*                                                                          */
-/****************************************************************************/
-{
-#ifdef CONFIG_64BIT
-    unsigned int data_length = 0;
-#else
-    unsigned long data_length = 0L;
-#endif
-    unsigned long i, j;
-    unsigned int offset, length;
-    unsigned int match_data_length = MATCH_DATA_LENGTH;
-
-    if (version > 0) --match_data_length;
-
-    jbi_in_length = in_length;
-    jbi_bits_avail = CHAR_BITS;
-    jbi_in_index = 0L;
-    for (i = 0; i < out_length; ++i) out[i] = 0;
-
-    /* Read number of bytes in data. */
-#ifdef CONFIG_64BIT
-    for (i = 0; i < sizeof(unsigned int); ++i)
-    {
-        data_length = data_length | ((unsigned int)
-            jbi_read_packed(in, CHAR_BITS) << (i * CHAR_BITS));
-    }
-#else
-    for (i = 0; i < sizeof (in_length); ++i)
-    {
-        data_length = data_length | ((unsigned long)
-            jbi_read_packed(in, CHAR_BITS) << (i * CHAR_BITS));
-    }
-#endif
-
-    if (data_length > out_length)
-    {
-#ifdef CONFIG_64BIT
-        jbi_dbg(DEBUG_ERR, "data_length(0x%x,0x%lx)\n",
-            data_length, out_length);
-        data_length = 0;
-#else
-        jbi_dbg(DEBUG_ERR, "data_length(0x%lx,0x%lx)\n",
-            data_length, out_length);
-        data_length = 0L;
-#endif
-    }
-    else
-    {
-        i = 0;
-        while (i < data_length)
-        {
-            /* A 0 bit indicates literal data. */
-            if (jbi_read_packed(in, 1) == 0)
-            {
-                for (j = 0; j < DATA_BLOB_LENGTH; ++j)
-                {
-                    if (i < data_length)
-                    {
-                        out[i] = (unsigned char) jbi_read_packed(in, CHAR_BITS);
-                        i++;
-                    }
-                }
-            }
-            else
-            {
-                /* A 1 bit indicates offset/length to follow. */
-                offset = jbi_read_packed(in, jbi_bits_required((short) (i > match_data_length ? match_data_length : i)));
-                length = jbi_read_packed(in, CHAR_BITS);
-
-                for (j = 0; j < length; ++j)
-                {
-                    if (i < data_length)
-                    {
-                        out[i] = out[i - offset];
-                        i++;
-                    }
-                }
-            }
-        }
-    }
-
-    return (data_length);
-}
-
-#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbicomp.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbicomp.h
deleted file mode 100644
index 4dacdcd5d773..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbicomp.h
+++ /dev/null
@@ -1,37 +0,0 @@
-/****************************************************************************/
-/*                                                                          */
-/*  Module:         jbicomp.h                                               */
-/*                                                                          */
-/*                  Copyright (C) Altera Corporation 1997-2001              */
-/*                                                                          */
-/*  Description:    Contains the function prototypes for compressing        */
-/*                  and uncompressing Boolean array data.                   */
-/*                                                                          */
-/****************************************************************************/
-
-#ifndef INC_JBICOMP_H
-#define INC_JBICOMP_H
-
-#if PORT==DOS
-
-void jbi_uncompress_page
-(
-    int variable_id,
-    int page,
-    int version
-);
-
-#else
-
-unsigned long jbi_uncompress
-(
-    unsigned char *in,
-    unsigned long in_length,
-    unsigned char *out,
-    unsigned long out_length,
-    int version
-);
-
-#endif /* PORT==DOS */
-
-#endif /* INC_JBICOMP_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbiexprt.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbiexprt.h
deleted file mode 100644
index ef4699dd6db3..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbiexprt.h
+++ /dev/null
@@ -1,224 +0,0 @@
-/****************************************************************************/
-/*                                                                          */
-/*  Module:         jbiexprt.h                                              */
-/*                                                                          */
-/*                  Copyright (C) Altera Corporation 1998-2001              */
-/*                                                                          */
-/*  Description:    Jam STAPL ByteCode Player Export Header File            */
-/*                                                                          */
-/*  Revisions:                                                              */
-/*                                                                          */
-/****************************************************************************/
-
-#ifndef INC_JBIEXPRT_H
-#define INC_JBIEXPRT_H
-
-/****************************************************************************/
-/*                                                                          */
-/*  Return codes from most JBI functions                                    */
-/*                                                                          */
-/****************************************************************************/
-
-#define JBI_RETURN_TYPE int
-
-#define JBIC_SUCCESS            0
-#define JBIC_OUT_OF_MEMORY      1
-#define JBIC_IO_ERROR           2
-/* #define JAMC_SYNTAX_ERROR       3 */
-#define JBIC_UNEXPECTED_END     4
-#define JBIC_UNDEFINED_SYMBOL   5
-/* #define JAMC_REDEFINED_SYMBOL   6 */
-#define JBIC_INTEGER_OVERFLOW   7
-#define JBIC_DIVIDE_BY_ZERO     8
-#define JBIC_CRC_ERROR          9
-#define JBIC_INTERNAL_ERROR    10
-#define JBIC_BOUNDS_ERROR      11
-/* #define JAMC_TYPE_MISMATCH     12 */
-/* #define JAMC_ASSIGN_TO_CONST   13 */
-/* #define JAMC_NEXT_UNEXPECTED   14 */
-/* #define JAMC_POP_UNEXPECTED    15 */
-/* #define JAMC_RETURN_UNEXPECTED 16 */
-/* #define JAMC_ILLEGAL_SYMBOL    17 */
-#define JBIC_VECTOR_MAP_FAILED 18
-#define JBIC_USER_ABORT        19
-#define JBIC_STACK_OVERFLOW    20
-#define JBIC_ILLEGAL_OPCODE    21
-/* #define JAMC_PHASE_ERROR       22 */
-/* #define JAMC_SCOPE_ERROR       23 */
-#define JBIC_ACTION_NOT_FOUND  24
-
-/****************************************************************************/
-/*                                                                          */
-/*  Macro Definitions                                                       */
-/*                                                                          */
-/****************************************************************************/
-
-/*
-*   For DOS port, program data is stored in a set of 16K pages, accessed
-*   through a pointer table.  For 32-bit version, the buffer is continuous.
-*   The macro GET_BYTE gets a single byte for either case.
-*/
-#if PORT==DOS
-#define PROGRAM_PTR unsigned char **
-#else
-#define PROGRAM_PTR unsigned char *
-#endif
-
-#if PORT==DOS
-#define GET_BYTE(x) (jbi_program[(x) >> 14L][(x) & 0x3fffL])
-#else
-#define GET_BYTE(x) (program[x])
-#endif
-
-#define GET_WORD(x) \
-    (((((unsigned short) GET_BYTE(x)) << 8) & 0xFF00) | \
-    (((unsigned short) GET_BYTE((x)+1)) & 0x00FF))
-
-#define GET_DWORD(x) \
-    (((((unsigned long) GET_BYTE(x)) << 24L) & 0xFF000000L) | \
-    ((((unsigned long) GET_BYTE((x)+1)) << 16L) & 0x00FF0000L) | \
-    ((((unsigned long) GET_BYTE((x)+2)) << 8L) & 0x0000FF00L) | \
-    (((unsigned long) GET_BYTE((x)+3)) & 0x000000FFL))
-
-/****************************************************************************/
-/*                                                                          */
-/*  Structured Types                                                        */
-/*                                                                          */
-/****************************************************************************/
-
-typedef struct JBI_PROCINFO_STRUCT
-{
-    char *name;
-    unsigned char attributes;
-    struct JBI_PROCINFO_STRUCT *next;
-}
-JBI_PROCINFO;
-
-/****************************************************************************/
-/*                                                                          */
-/*  Global Data Prototypes                                                  */
-/*                                                                          */
-/****************************************************************************/
-
-#if PORT==DOS
-extern unsigned char jbi_aca_out_buffer[8192 + 1024];
-#endif
-
-extern PROGRAM_PTR jbi_program;
-
-extern char *jbi_workspace;
-
-extern long jbi_workspace_size;
-
-/****************************************************************************/
-/*                                                                          */
-/*  Function Prototypes                                                     */
-/*                                                                          */
-/****************************************************************************/
-
-JBI_RETURN_TYPE jbi_execute
-(
-    PROGRAM_PTR program,
-    long program_size,
-    char *workspace,
-    long workspace_size,
-    char *action,
-    char **init_list,
-    int reset_jtag,
-    long *error_address,
-    int *exit_code,
-    int *format_version
-);
-
-JBI_RETURN_TYPE jbi_get_note
-(
-    PROGRAM_PTR program,
-    long program_size,
-    long *offset,
-    char *key,
-    char *value,
-    int length
-);
-
-JBI_RETURN_TYPE jbi_check_crc
-(
-    PROGRAM_PTR program,
-    long program_size,
-    unsigned short *expected_crc,
-    unsigned short *actual_crc
-);
-
-JBI_RETURN_TYPE jbi_get_file_info
-(
-    PROGRAM_PTR program,
-    long program_size,
-    int *format_version,
-    int *action_count,
-    int *procedure_count
-);
-
-JBI_RETURN_TYPE jbi_get_action_info
-(
-    PROGRAM_PTR program,
-    long program_size,
-    int index,
-    char **name,
-    char **description,
-    JBI_PROCINFO **procedure_list
-);
-
-int jbi_jtag_io
-(
-    int tms,
-    int tdi,
-    int read_tdo
-);
-
-void jbi_message
-(
-    char *message_text
-);
-
-void jbi_export_integer
-(
-    char *key,
-    long value
-);
-
-void jbi_export_boolean_array
-(
-    char *key,
-    unsigned char *data,
-    long count
-);
-
-void jbi_delay
-(
-    long microseconds
-);
-
-int jbi_vector_map
-(
-    int signal_count,
-    char **signals
-);
-
-int jbi_vector_io
-(
-    int signal_count,
-    long *dir_vect,
-    long *data_vect,
-    long *capture_vect
-);
-
-void *jbi_malloc
-(
-    unsigned int size
-);
-
-void jbi_free
-(
-    void *ptr
-);
-
-#endif /* INC_JBIEXPRT_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbijtag.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbijtag.c
deleted file mode 100644
index f013100eecb8..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbijtag.c
+++ /dev/null
@@ -1,1679 +0,0 @@
-/****************************************************************************/
-/*                                                                          */
-/*  Module:         jbijtag.c                                               */
-/*                                                                          */
-/*                  Copyright (C) Altera Corporation 1998-2001              */
-/*                                                                          */
-/*  Description:    Contains JTAG interface functions                       */
-/*                                                                          */
-/*  Revisions:      2.2  updated state transition paths                     */
-/*                  2.0  added multi-page scan code for 16-bit PORT         */
-/*                                                                          */
-/****************************************************************************/
-
-#include "jbiport.h"
-#include "jbiexprt.h"
-#include "jbicomp.h"
-#include "jbijtag.h"
-
-#define NULL 0
-
-char *jbi_workspace = NULL;
-long jbi_workspace_size = 0L;
-
-/****************************************************************************/
-/*                                                                          */
-/*  Enumerated Types                                                        */
-/*                                                                          */
-/****************************************************************************/
-
-/* maximum JTAG IR and DR lengths (in bits) */
-#define JBIC_MAX_JTAG_IR_PREAMBLE   256
-#define JBIC_MAX_JTAG_IR_POSTAMBLE  256
-#define JBIC_MAX_JTAG_IR_LENGTH     512
-#define JBIC_MAX_JTAG_DR_PREAMBLE  1024
-#define JBIC_MAX_JTAG_DR_POSTAMBLE 1024
-#define JBIC_MAX_JTAG_DR_LENGTH    2048
-
-/*
-*   Global variable to store the current JTAG state
-*/
-JBIE_JTAG_STATE jbi_jtag_state = JBI_ILLEGAL_JTAG_STATE;
-
-/*
-*   Store current stop-state for DR and IR scan commands
-*/
-JBIE_JTAG_STATE jbi_drstop_state = IDLE;
-JBIE_JTAG_STATE jbi_irstop_state = IDLE;
-
-/*
-*   Store current padding values
-*/
-unsigned int jbi_dr_preamble  = 0;
-unsigned int jbi_dr_postamble = 0;
-unsigned int jbi_ir_preamble  = 0;
-unsigned int jbi_ir_postamble = 0;
-unsigned int jbi_dr_length    = 0;
-unsigned int jbi_ir_length    = 0;
-unsigned char *jbi_dr_preamble_data  = NULL;
-unsigned char *jbi_dr_postamble_data = NULL;
-unsigned char *jbi_ir_preamble_data  = NULL;
-unsigned char *jbi_ir_postamble_data = NULL;
-unsigned char *jbi_dr_buffer         = NULL;
-unsigned char *jbi_ir_buffer         = NULL;
-
-/*
-*   This structure shows, for each JTAG state, which state is reached after
-*   a single TCK clock cycle with TMS high or TMS low, respectively.  This
-*   describes all possible state transitions in the JTAG state machine.
-*/
-struct JBIS_JTAG_MACHINE
-{
-    JBIE_JTAG_STATE tms_high;
-    JBIE_JTAG_STATE tms_low;
-} jbi_jtag_state_transitions[] =
-{
-/* RESET     */ { RESET,    IDLE },
-/* IDLE      */ { DRSELECT, IDLE },
-/* DRSELECT  */ { IRSELECT, DRCAPTURE },
-/* DRCAPTURE */ { DREXIT1,  DRSHIFT },
-/* DRSHIFT   */ { DREXIT1,  DRSHIFT },
-/* DREXIT1   */ { DRUPDATE, DRPAUSE },
-/* DRPAUSE   */ { DREXIT2,  DRPAUSE },
-/* DREXIT2   */ { DRUPDATE, DRSHIFT },
-/* DRUPDATE  */ { DRSELECT, IDLE },
-/* IRSELECT  */ { RESET,    IRCAPTURE },
-/* IRCAPTURE */ { IREXIT1,  IRSHIFT },
-/* IRSHIFT   */ { IREXIT1,  IRSHIFT },
-/* IREXIT1   */ { IRUPDATE, IRPAUSE },
-/* IRPAUSE   */ { IREXIT2,  IRPAUSE },
-/* IREXIT2   */ { IRUPDATE, IRSHIFT },
-/* IRUPDATE  */ { DRSELECT, IDLE }
-};
-
-/*
-*   This table contains the TMS value to be used to take the NEXT STEP on
-*   the path to the desired state.  The array index is the current state,
-*   and the bit position is the desired endstate.  To find out which state
-*   is used as the intermediate state, look up the TMS value in the
-*   jbi_jtag_state_transitions[] table.
-*/
-unsigned short jbi_jtag_path_map[16] =
-{
-/*    RST     RTI    SDRS     CDR     SDR    E1DR     PDR    E2DR       */
-    0x0001, 0xFFFD, 0xFE01, 0xFFE7, 0xFFEF, 0xFF0F, 0xFFBF, 0xFFFF,
-/*    UDR    SIRS     CIR     SIR    E1IR     PIR    E2IR     UIR       */
-    0xFEFD, 0x0001, 0xF3FF, 0xF7FF, 0x87FF, 0xDFFF, 0xFFFF, 0x7FFD
-};
-
-/*
-*   Flag bits for jbi_jtag_io() function
-*/
-#define TMS_HIGH   1
-#define TMS_LOW    0
-#define TDI_HIGH   1
-#define TDI_LOW    0
-#define READ_TDO   1
-#define IGNORE_TDO 0
-
-/****************************************************************************/
-/*                                                                          */
-
-JBI_RETURN_TYPE jbi_init_jtag()
-
-/*                                                                          */
-/****************************************************************************/
-{
-    /* initial JTAG state is unknown */
-    jbi_jtag_state = JBI_ILLEGAL_JTAG_STATE;
-
-    /* initialize global variables to default state */
-    jbi_drstop_state = IDLE;
-    jbi_irstop_state = IDLE;
-    jbi_dr_preamble  = 0;
-    jbi_dr_postamble = 0;
-    jbi_ir_preamble  = 0;
-    jbi_ir_postamble = 0;
-    jbi_dr_length    = 0;
-    jbi_ir_length    = 0;
-
-    if (jbi_workspace != NULL)
-    {
-        jbi_dr_preamble_data = (unsigned char *) jbi_workspace;
-        jbi_dr_postamble_data = &jbi_dr_preamble_data[JBIC_MAX_JTAG_DR_PREAMBLE / 8];
-        jbi_ir_preamble_data = &jbi_dr_postamble_data[JBIC_MAX_JTAG_DR_POSTAMBLE / 8];
-        jbi_ir_postamble_data = &jbi_ir_preamble_data[JBIC_MAX_JTAG_IR_PREAMBLE / 8];
-        jbi_dr_buffer = &jbi_ir_postamble_data[JBIC_MAX_JTAG_IR_POSTAMBLE / 8];
-        jbi_ir_buffer = &jbi_dr_buffer[JBIC_MAX_JTAG_DR_LENGTH / 8];
-    }
-    else
-    {
-        jbi_dr_preamble_data  = NULL;
-        jbi_dr_postamble_data = NULL;
-        jbi_ir_preamble_data  = NULL;
-        jbi_ir_postamble_data = NULL;
-        jbi_dr_buffer         = NULL;
-        jbi_ir_buffer         = NULL;
-    }
-
-    return (JBIC_SUCCESS);
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-JBI_RETURN_TYPE jbi_set_drstop_state
-(
-    JBIE_JTAG_STATE state
-)
-
-/*                                                                          */
-/****************************************************************************/
-{
-    jbi_drstop_state = state;
-
-    return (JBIC_SUCCESS);
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-JBI_RETURN_TYPE jbi_set_irstop_state
-(
-    JBIE_JTAG_STATE state
-)
-
-/*                                                                          */
-/****************************************************************************/
-{
-    jbi_irstop_state = state;
-
-    return (JBIC_SUCCESS);
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-JBI_RETURN_TYPE jbi_set_dr_preamble
-(
-    unsigned int count,
-    unsigned int start_index,
-    unsigned char *preamble_data
-)
-
-/*                                                                          */
-/****************************************************************************/
-{
-    JBI_RETURN_TYPE status = JBIC_SUCCESS;
-    unsigned int i;
-    unsigned int j;
-
-    if (jbi_workspace != NULL)
-    {
-        if (count > JBIC_MAX_JTAG_DR_PREAMBLE)
-        {
-            status = JBIC_OUT_OF_MEMORY;
-        }
-        else
-        {
-            jbi_dr_preamble = count;
-        }
-    }
-    else
-    {
-        if (count > jbi_dr_preamble)
-        {
-            jbi_free(jbi_dr_preamble_data);
-            jbi_dr_preamble_data = (unsigned char *) jbi_malloc((count + 7) >> 3);
-
-            if (jbi_dr_preamble_data == NULL)
-            {
-                status = JBIC_OUT_OF_MEMORY;
-            }
-            else
-            {
-                jbi_dr_preamble = count;
-            }
-        }
-        else
-        {
-            jbi_dr_preamble = count;
-        }
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        for (i = 0; i < count; ++i)
-        {
-            j = i + start_index;
-
-            if (preamble_data == NULL)
-            {
-                jbi_dr_preamble_data[i >> 3] |= (1 << (i & 7));
-            }
-            else
-            {
-                if (preamble_data[j >> 3] & (1 << (j & 7)))
-                {
-                    jbi_dr_preamble_data[i >> 3] |= (1 << (i & 7));
-                }
-                else
-                {
-                    jbi_dr_preamble_data[i >> 3] &=
-                        ~(unsigned int) (1 << (i & 7));
-                }
-            }
-        }
-    }
-
-    return (status);
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-JBI_RETURN_TYPE jbi_set_ir_preamble
-(
-    unsigned int count,
-    unsigned int start_index,
-    unsigned char *preamble_data
-)
-
-/*                                                                          */
-/****************************************************************************/
-{
-    JBI_RETURN_TYPE status = JBIC_SUCCESS;
-    unsigned int i;
-    unsigned int j;
-
-    if (jbi_workspace != NULL)
-    {
-        if (count > JBIC_MAX_JTAG_IR_PREAMBLE)
-        {
-            status = JBIC_OUT_OF_MEMORY;
-        }
-        else
-        {
-            jbi_ir_preamble = count;
-        }
-    }
-    else
-    {
-        if (count > jbi_ir_preamble)
-        {
-            jbi_free(jbi_ir_preamble_data);
-            jbi_ir_preamble_data = (unsigned char *) jbi_malloc((count + 7) >> 3);
-
-            if (jbi_ir_preamble_data == NULL)
-            {
-                status = JBIC_OUT_OF_MEMORY;
-            }
-            else
-            {
-                jbi_ir_preamble = count;
-            }
-        }
-        else
-        {
-            jbi_ir_preamble = count;
-        }
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        for (i = 0; i < count; ++i)
-        {
-            j = i + start_index;
-
-            if (preamble_data == NULL)
-            {
-                jbi_ir_preamble_data[i >> 3] |= (1 << (i & 7));
-            }
-            else
-            {
-                if (preamble_data[j >> 3] & (1 << (j & 7)))
-                {
-                    jbi_ir_preamble_data[i >> 3] |= (1 << (i & 7));
-                }
-                else
-                {
-                    jbi_ir_preamble_data[i >> 3] &=
-                        ~(unsigned int) (1 << (i & 7));
-                }
-            }
-        }
-    }
-
-    return (status);
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-JBI_RETURN_TYPE jbi_set_dr_postamble
-(
-    unsigned int count,
-    unsigned int start_index,
-    unsigned char *postamble_data
-)
-
-/*                                                                          */
-/****************************************************************************/
-{
-    JBI_RETURN_TYPE status = JBIC_SUCCESS;
-    unsigned int i;
-    unsigned int j;
-
-    if (jbi_workspace != NULL)
-    {
-        if (count > JBIC_MAX_JTAG_DR_POSTAMBLE)
-        {
-            status = JBIC_OUT_OF_MEMORY;
-        }
-        else
-        {
-            jbi_dr_postamble = count;
-        }
-    }
-    else
-    {
-        if (count > jbi_dr_postamble)
-        {
-            jbi_free(jbi_dr_postamble_data);
-            jbi_dr_postamble_data = (unsigned char *) jbi_malloc((count + 7) >> 3);
-
-            if (jbi_dr_postamble_data == NULL)
-            {
-                status = JBIC_OUT_OF_MEMORY;
-            }
-            else
-            {
-                jbi_dr_postamble = count;
-            }
-        }
-        else
-        {
-            jbi_dr_postamble = count;
-        }
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        for (i = 0; i < count; ++i)
-        {
-            j = i + start_index;
-
-            if (postamble_data == NULL)
-            {
-                jbi_dr_postamble_data[i >> 3] |= (1 << (i & 7));
-            }
-            else
-            {
-                if (postamble_data[j >> 3] & (1 << (j & 7)))
-                {
-                    jbi_dr_postamble_data[i >> 3] |= (1 << (i & 7));
-                }
-                else
-                {
-                    jbi_dr_postamble_data[i >> 3] &=
-                        ~(unsigned int) (1 << (i & 7));
-                }
-            }
-        }
-    }
-
-    return (status);
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-JBI_RETURN_TYPE jbi_set_ir_postamble
-(
-    unsigned int count,
-    unsigned int start_index,
-    unsigned char *postamble_data
-)
-
-/*                                                                          */
-/****************************************************************************/
-{
-    JBI_RETURN_TYPE status = JBIC_SUCCESS;
-    unsigned int i;
-    unsigned int j;
-
-    if (jbi_workspace != NULL)
-    {
-        if (count > JBIC_MAX_JTAG_IR_POSTAMBLE)
-        {
-            status = JBIC_OUT_OF_MEMORY;
-        }
-        else
-        {
-            jbi_ir_postamble = count;
-        }
-    }
-    else
-    {
-        if (count > jbi_ir_postamble)
-        {
-            jbi_free(jbi_ir_postamble_data);
-            jbi_ir_postamble_data = (unsigned char *) jbi_malloc((count + 7) >> 3);
-
-            if (jbi_ir_postamble_data == NULL)
-            {
-                status = JBIC_OUT_OF_MEMORY;
-            }
-            else
-            {
-                jbi_ir_postamble = count;
-            }
-        }
-        else
-        {
-            jbi_ir_postamble = count;
-        }
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        for (i = 0; i < count; ++i)
-        {
-            j = i + start_index;
-
-            if (postamble_data == NULL)
-            {
-                jbi_ir_postamble_data[i >> 3] |= (1 << (i & 7));
-            }
-            else
-            {
-                if (postamble_data[j >> 3] & (1 << (j & 7)))
-                {
-                    jbi_ir_postamble_data[i >> 3] |= (1 << (i & 7));
-                }
-                else
-                {
-                    jbi_ir_postamble_data[i >> 3] &=
-                        ~(unsigned int) (1 << (i & 7));
-                }
-            }
-        }
-    }
-
-    return (status);
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-void jbi_jtag_reset_idle(void)
-
-/*                                                                          */
-/****************************************************************************/
-{
-    int i;
-
-    /*
-    *   Go to Test Logic Reset (no matter what the starting state may be)
-    */
-    for (i = 0; i < 5; ++i)
-    {
-        jbi_jtag_io(TMS_HIGH, TDI_LOW, IGNORE_TDO);
-    }
-
-    /*
-    *   Now step to Run Test / Idle
-    */
-    jbi_jtag_io(TMS_LOW, TDI_LOW, IGNORE_TDO);
-
-    jbi_jtag_state = IDLE;
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-JBI_RETURN_TYPE jbi_goto_jtag_state
-(
-    JBIE_JTAG_STATE state
-)
-
-/*                                                                          */
-/****************************************************************************/
-{
-    int tms;
-    int count = 0;
-    JBI_RETURN_TYPE status = JBIC_SUCCESS;
-    unsigned int tmp_state;
-
-    if (jbi_jtag_state == JBI_ILLEGAL_JTAG_STATE)
-    {
-        /* initialize JTAG chain to known state */
-        jbi_jtag_reset_idle();
-    }
-
-    if (jbi_jtag_state == state)
-    {
-        /*
-        *   We are already in the desired state.  If it is a stable state,
-        *   loop here.  Otherwise do nothing (no clock cycles).
-        */
-        if ((state == IDLE) ||
-            (state == DRSHIFT) ||
-            (state == DRPAUSE) ||
-            (state == IRSHIFT) ||
-            (state == IRPAUSE))
-        {
-            jbi_jtag_io(TMS_LOW, TDI_LOW, IGNORE_TDO);
-        }
-        else if (state == RESET)
-        {
-            jbi_jtag_io(TMS_HIGH, TDI_LOW, IGNORE_TDO);
-        }
-    }
-    else
-    {
-        while ((jbi_jtag_state != state) && (count < 9))
-        {
-            /*
-            *   Get TMS value to take a step toward desired state
-            */
-           if (state < 0) {
-               tmp_state = 0;
-           } else {
-               tmp_state = state;
-           }
-            tms = (jbi_jtag_path_map[jbi_jtag_state] & (1 << tmp_state)) ?
-                TMS_HIGH : TMS_LOW;
-
-            /*
-            *   Take a step
-            */
-            jbi_jtag_io(tms, TDI_LOW, IGNORE_TDO);
-
-            if (tms)
-            {
-                jbi_jtag_state =
-                    jbi_jtag_state_transitions[jbi_jtag_state].tms_high;
-            }
-            else
-            {
-                jbi_jtag_state =
-                    jbi_jtag_state_transitions[jbi_jtag_state].tms_low;
-            }
-
-            ++count;
-        }
-    }
-
-    if (jbi_jtag_state != state)
-    {
-        status = JBIC_INTERNAL_ERROR;
-    }
-
-    return (status);
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-JBI_RETURN_TYPE jbi_do_wait_cycles
-(
-    long cycles,
-    JBIE_JTAG_STATE wait_state
-)
-
-/*                                                                          */
-/*  Description:    Causes JTAG hardware to loop in the specified stable    */
-/*                  state for the specified number of TCK clock cycles.     */
-/*                                                                          */
-/*  Returns:        JBIC_SUCCESS for success, else appropriate error code   */
-/*                                                                          */
-/****************************************************************************/
-{
-    int tms;
-    long count;
-    JBI_RETURN_TYPE status = JBIC_SUCCESS;
-
-    if (jbi_jtag_state != wait_state)
-    {
-        status = jbi_goto_jtag_state(wait_state);
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        /*
-        *   Set TMS high to loop in RESET state
-        *   Set TMS low to loop in any other stable state
-        */
-        tms = (wait_state == RESET) ? TMS_HIGH : TMS_LOW;
-
-        for (count = 0L; count < cycles; count++)
-        {
-            jbi_jtag_io(tms, TDI_LOW, IGNORE_TDO);
-        }
-    }
-
-    return (status);
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-JBI_RETURN_TYPE jbi_do_wait_microseconds
-(
-    long microseconds,
-    JBIE_JTAG_STATE wait_state
-)
-
-/*                                                                          */
-/*  Description:    Causes JTAG hardware to sit in the specified stable     */
-/*                  state for the specified duration of real time.  If      */
-/*                  no JTAG operations have been performed yet, then only   */
-/*                  a delay is performed.  This permits the WAIT USECS      */
-/*                  statement to be used in VECTOR programs without causing */
-/*                  any JTAG operations.                                    */
-/*                                                                          */
-/*  Returns:        JBIC_SUCCESS for success, else appropriate error code   */
-/*                                                                          */
-/****************************************************************************/
-{
-    JBI_RETURN_TYPE status = JBIC_SUCCESS;
-
-    if ((jbi_jtag_state != JBI_ILLEGAL_JTAG_STATE) &&
-        (jbi_jtag_state != wait_state))
-    {
-        status = jbi_goto_jtag_state(wait_state);
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        /*
-        *   Wait for specified time interval
-        */
-        jbi_delay(microseconds);
-    }
-
-    return (status);
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-void jbi_jtag_concatenate_data
-(
-    unsigned char *buffer,
-    unsigned char *preamble_data,
-    unsigned int preamble_count,
-    unsigned char *target_data,
-    unsigned long start_index,
-    unsigned int target_count,
-    unsigned char *postamble_data,
-    unsigned int postamble_count
-)
-
-/*                                                                          */
-/*  Description:    Copies preamble data, target data, and postamble data   */
-/*                  into one buffer for IR or DR scans.                     */
-/*                                                                          */
-/*  Returns:        nothing                                                 */
-/*                                                                          */
-/****************************************************************************/
-{
-    unsigned long i;
-    unsigned long j;
-    unsigned long k;
-
-    for (i = 0L; i < preamble_count; ++i)
-    {
-        if (preamble_data[i >> 3L] & (1L << (i & 7L)))
-        {
-            buffer[i >> 3L] |= (1L << (i & 7L));
-        }
-        else
-        {
-            buffer[i >> 3L] &= ~(unsigned int) (1L << (i & 7L));
-        }
-    }
-
-    j = start_index;
-    k = preamble_count + target_count;
-    for (; i < k; ++i, ++j)
-    {
-        if (target_data[j >> 3L] & (1L << (j & 7L)))
-        {
-            buffer[i >> 3L] |= (1L << (i & 7L));
-        }
-        else
-        {
-            buffer[i >> 3L] &= ~(unsigned int) (1L << (i & 7L));
-        }
-    }
-
-    j = 0L;
-    k = preamble_count + target_count + postamble_count;
-    for (; i < k; ++i, ++j)
-    {
-        if (postamble_data[j >> 3L] & (1L << (j & 7L)))
-        {
-            buffer[i >> 3L] |= (1L << (i & 7L));
-        }
-        else
-        {
-            buffer[i >> 3L] &= ~(unsigned int) (1L << (i & 7L));
-        }
-    }
-}
-
-int jbi_jtag_drscan
-(
-    int start_state,
-    int count,
-    unsigned char *tdi,
-    unsigned char *tdo
-)
-{
-    int i = 0;
-    int tdo_bit = 0;
-    int status = 1;
-
-    /*
-    *   First go to DRSHIFT state
-    */
-    switch (start_state)
-    {
-    case 0:                     /* IDLE */
-        jbi_jtag_io(1, 0, 0);   /* DRSELECT */
-        jbi_jtag_io(0, 0, 0);   /* DRCAPTURE */
-        jbi_jtag_io(0, 0, 0);   /* DRSHIFT */
-        break;
-
-    case 1:                     /* DRPAUSE */
-        jbi_jtag_io(1, 0, 0);   /* DREXIT2 */
-        jbi_jtag_io(1, 0, 0);   /* DRUPDATE */
-        jbi_jtag_io(1, 0, 0);   /* DRSELECT */
-        jbi_jtag_io(0, 0, 0);   /* DRCAPTURE */
-        jbi_jtag_io(0, 0, 0);   /* DRSHIFT */
-        break;
-
-    case 2:                     /* IRPAUSE */
-        jbi_jtag_io(1, 0, 0);   /* IREXIT2 */
-        jbi_jtag_io(1, 0, 0);   /* IRUPDATE */
-        jbi_jtag_io(1, 0, 0);   /* DRSELECT */
-        jbi_jtag_io(0, 0, 0);   /* DRCAPTURE */
-        jbi_jtag_io(0, 0, 0);   /* DRSHIFT */
-        break;
-
-    default:
-        status = 0;
-    }
-
-    if (status)
-    {
-        /* loop in the SHIFT-DR state */
-        for (i = 0; i < count; i++)
-        {
-            tdo_bit = jbi_jtag_io(
-                (i == count - 1),
-                tdi[i >> 3] & (1 << (i & 7)),
-                (tdo != NULL));
-
-            if (tdo != NULL)
-            {
-                if (tdo_bit)
-                {
-                    tdo[i >> 3] |= (1 << (i & 7));
-                }
-                else
-                {
-                    tdo[i >> 3] &= ~(unsigned int) (1 << (i & 7));
-                }
-            }
-        }
-
-        jbi_jtag_io(0, 0, 0);   /* DRPAUSE */
-    }
-
-    return (status);
-}
-
-int jbi_jtag_irscan
-(
-    int start_state,
-    int count,
-    unsigned char *tdi,
-    unsigned char *tdo
-)
-{
-    int i = 0;
-    int tdo_bit = 0;
-    int status = 1;
-
-    /*
-    *   First go to IRSHIFT state
-    */
-    switch (start_state)
-    {
-    case 0:                     /* IDLE */
-        jbi_jtag_io(1, 0, 0);   /* DRSELECT */
-        jbi_jtag_io(1, 0, 0);   /* IRSELECT */
-        jbi_jtag_io(0, 0, 0);   /* IRCAPTURE */
-        jbi_jtag_io(0, 0, 0);   /* IRSHIFT */
-        break;
-
-    case 1:                     /* DRPAUSE */
-        jbi_jtag_io(1, 0, 0);   /* DREXIT2 */
-        jbi_jtag_io(1, 0, 0);   /* DRUPDATE */
-        jbi_jtag_io(1, 0, 0);   /* DRSELECT */
-        jbi_jtag_io(1, 0, 0);   /* IRSELECT */
-        jbi_jtag_io(0, 0, 0);   /* IRCAPTURE */
-        jbi_jtag_io(0, 0, 0);   /* IRSHIFT */
-        break;
-
-    case 2:                     /* IRPAUSE */
-        jbi_jtag_io(1, 0, 0);   /* IREXIT2 */
-        jbi_jtag_io(1, 0, 0);   /* IRUPDATE */
-        jbi_jtag_io(1, 0, 0);   /* DRSELECT */
-        jbi_jtag_io(1, 0, 0);   /* IRSELECT */
-        jbi_jtag_io(0, 0, 0);   /* IRCAPTURE */
-        jbi_jtag_io(0, 0, 0);   /* IRSHIFT */
-        break;
-
-    default:
-        status = 0;
-    }
-
-    if (status)
-    {
-        /* loop in the SHIFT-IR state */
-        for (i = 0; i < count; i++)
-        {
-            tdo_bit = jbi_jtag_io(
-                (i == count - 1),
-                tdi[i >> 3] & (1 << (i & 7)),
-                (tdo != NULL));
-
-            if (tdo != NULL)
-            {
-                if (tdo_bit)
-                {
-                    tdo[i >> 3] |= (1 << (i & 7));
-                }
-                else
-                {
-                    tdo[i >> 3] &= ~(unsigned int) (1 << (i & 7));
-                }
-            }
-        }
-
-        jbi_jtag_io(0, 0, 0);   /* IRPAUSE */
-    }
-
-    return (status);
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-void jbi_jtag_extract_target_data
-(
-    unsigned char *buffer,
-    unsigned char *target_data,
-    unsigned int start_index,
-    unsigned int preamble_count,
-    unsigned int target_count
-)
-
-/*                                                                          */
-/*  Description:    Copies target data from scan buffer, filtering out      */
-/*                  preamble and postamble data.                            */
-/*                                                                          */
-/*  Returns:        nothing                                                 */
-/*                                                                          */
-/****************************************************************************/
-{
-    unsigned int i;
-    unsigned int j;
-    unsigned int k;
-
-    j = preamble_count;
-    k = start_index + target_count;
-    for (i = start_index; i < k; ++i, ++j)
-    {
-        if (buffer[j >> 3] & (1 << (j & 7)))
-        {
-            target_data[i >> 3] |= (1 << (i & 7));
-        }
-        else
-        {
-            target_data[i >> 3] &= ~(unsigned int) (1 << (i & 7));
-        }
-    }
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-JBI_RETURN_TYPE jbi_do_irscan
-(
-    unsigned int count,
-    unsigned char *tdi_data,
-    unsigned int start_index
-)
-
-/*                                                                          */
-/*  Description:    Shifts data into instruction register                   */
-/*                                                                          */
-/*  Returns:        JBIC_SUCCESS for success, else appropriate error code   */
-/*                                                                          */
-/****************************************************************************/
-{
-    int start_code = 0;
-    unsigned int alloc_chars = 0;
-    unsigned int shift_count = jbi_ir_preamble + count + jbi_ir_postamble;
-    JBI_RETURN_TYPE status = JBIC_SUCCESS;
-    JBIE_JTAG_STATE start_state = JBI_ILLEGAL_JTAG_STATE;
-
-    switch (jbi_jtag_state)
-    {
-    case JBI_ILLEGAL_JTAG_STATE:
-    case RESET:
-    case IDLE:
-        start_code = 0;
-        start_state = IDLE;
-        break;
-
-    case DRSELECT:
-    case DRCAPTURE:
-    case DRSHIFT:
-    case DREXIT1:
-    case DRPAUSE:
-    case DREXIT2:
-    case DRUPDATE:
-        start_code = 1;
-        start_state = DRPAUSE;
-        break;
-
-    case IRSELECT:
-    case IRCAPTURE:
-    case IRSHIFT:
-    case IREXIT1:
-    case IRPAUSE:
-    case IREXIT2:
-    case IRUPDATE:
-        start_code = 2;
-        start_state = IRPAUSE;
-        break;
-
-    default:
-        status = JBIC_INTERNAL_ERROR;
-        break;
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        if (jbi_jtag_state != start_state)
-        {
-            status = jbi_goto_jtag_state(start_state);
-        }
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        if (jbi_workspace != NULL)
-        {
-            if (shift_count > JBIC_MAX_JTAG_IR_LENGTH)
-            {
-                status = JBIC_OUT_OF_MEMORY;
-            }
-        }
-        else if (shift_count > jbi_ir_length)
-        {
-            alloc_chars = (shift_count + 7) >> 3;
-            jbi_free(jbi_ir_buffer);
-            jbi_ir_buffer = (unsigned char *) jbi_malloc(alloc_chars);
-
-            if (jbi_ir_buffer == NULL)
-            {
-                status = JBIC_OUT_OF_MEMORY;
-            }
-            else
-            {
-                jbi_ir_length = alloc_chars * 8;
-            }
-        }
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        /*
-        *   Copy preamble data, IR data, and postamble data into a buffer
-        */
-        jbi_jtag_concatenate_data
-        (
-            jbi_ir_buffer,
-            jbi_ir_preamble_data,
-            jbi_ir_preamble,
-            tdi_data,
-            start_index,
-            count,
-            jbi_ir_postamble_data,
-            jbi_ir_postamble
-        );
-
-        /*
-        *   Do the IRSCAN
-        */
-        jbi_jtag_irscan
-        (
-            start_code,
-            shift_count,
-            jbi_ir_buffer,
-            NULL
-        );
-
-        /* jbi_jtag_irscan() always ends in IRPAUSE state */
-        jbi_jtag_state = IRPAUSE;
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        if (jbi_irstop_state != IRPAUSE)
-        {
-            status = jbi_goto_jtag_state(jbi_irstop_state);
-        }
-    }
-
-    return (status);
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-JBI_RETURN_TYPE jbi_swap_ir
-(
-    unsigned int count,
-    unsigned char *in_data,
-    unsigned int in_index,
-    unsigned char *out_data,
-    unsigned int out_index
-)
-
-/*                                                                          */
-/*  Description:    Shifts data into instruction register, capturing output */
-/*                  data                                                    */
-/*                                                                          */
-/*  Returns:        JBIC_SUCCESS for success, else appropriate error code   */
-/*                                                                          */
-/****************************************************************************/
-{
-    int start_code = 0;
-    unsigned int alloc_chars = 0;
-    unsigned int shift_count = jbi_ir_preamble + count + jbi_ir_postamble;
-    JBI_RETURN_TYPE status = JBIC_SUCCESS;
-    JBIE_JTAG_STATE start_state = JBI_ILLEGAL_JTAG_STATE;
-
-    switch (jbi_jtag_state)
-    {
-    case JBI_ILLEGAL_JTAG_STATE:
-    case RESET:
-    case IDLE:
-        start_code = 0;
-        start_state = IDLE;
-        break;
-
-    case DRSELECT:
-    case DRCAPTURE:
-    case DRSHIFT:
-    case DREXIT1:
-    case DRPAUSE:
-    case DREXIT2:
-    case DRUPDATE:
-        start_code = 1;
-        start_state = DRPAUSE;
-        break;
-
-    case IRSELECT:
-    case IRCAPTURE:
-    case IRSHIFT:
-    case IREXIT1:
-    case IRPAUSE:
-    case IREXIT2:
-    case IRUPDATE:
-        start_code = 2;
-        start_state = IRPAUSE;
-        break;
-
-    default:
-        status = JBIC_INTERNAL_ERROR;
-        break;
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        if (jbi_jtag_state != start_state)
-        {
-            status = jbi_goto_jtag_state(start_state);
-        }
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        if (jbi_workspace != NULL)
-        {
-            if (shift_count > JBIC_MAX_JTAG_IR_LENGTH)
-            {
-                status = JBIC_OUT_OF_MEMORY;
-            }
-        }
-        else if (shift_count > jbi_ir_length)
-        {
-            alloc_chars = (shift_count + 7) >> 3;
-            jbi_free(jbi_ir_buffer);
-            jbi_ir_buffer = (unsigned char *) jbi_malloc(alloc_chars);
-
-            if (jbi_ir_buffer == NULL)
-            {
-                status = JBIC_OUT_OF_MEMORY;
-            }
-            else
-            {
-                jbi_ir_length = alloc_chars * 8;
-            }
-        }
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        /*
-        *   Copy preamble data, IR data, and postamble data into a buffer
-        */
-        jbi_jtag_concatenate_data
-        (
-            jbi_ir_buffer,
-            jbi_ir_preamble_data,
-            jbi_ir_preamble,
-            in_data,
-            in_index,
-            count,
-            jbi_ir_postamble_data,
-            jbi_ir_postamble
-        );
-
-        /*
-        *   Do the IRSCAN
-        */
-        jbi_jtag_irscan
-        (
-            start_code,
-            shift_count,
-            jbi_ir_buffer,
-            jbi_ir_buffer
-        );
-
-        /* jbi_jtag_irscan() always ends in IRPAUSE state */
-        jbi_jtag_state = IRPAUSE;
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        if (jbi_irstop_state != IRPAUSE)
-        {
-            status = jbi_goto_jtag_state(jbi_irstop_state);
-        }
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        /*
-        *   Now extract the returned data from the buffer
-        */
-        jbi_jtag_extract_target_data
-        (
-            jbi_ir_buffer,
-            out_data,
-            out_index,
-            jbi_ir_preamble,
-            count
-        );
-    }
-
-    return (status);
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-JBI_RETURN_TYPE jbi_do_drscan
-(
-    unsigned int count,
-    unsigned char *tdi_data,
-    unsigned long start_index
-)
-
-/*                                                                          */
-/*  Description:    Shifts data into data register (ignoring output data)   */
-/*                                                                          */
-/*  Returns:        JBIC_SUCCESS for success, else appropriate error code   */
-/*                                                                          */
-/****************************************************************************/
-{
-    int start_code = 0;
-    unsigned int alloc_chars = 0;
-    unsigned int shift_count = jbi_dr_preamble + count + jbi_dr_postamble;
-    JBI_RETURN_TYPE status = JBIC_SUCCESS;
-    JBIE_JTAG_STATE start_state = JBI_ILLEGAL_JTAG_STATE;
-
-    switch (jbi_jtag_state)
-    {
-    case JBI_ILLEGAL_JTAG_STATE:
-    case RESET:
-    case IDLE:
-        start_code = 0;
-        start_state = IDLE;
-        break;
-
-    case DRSELECT:
-    case DRCAPTURE:
-    case DRSHIFT:
-    case DREXIT1:
-    case DRPAUSE:
-    case DREXIT2:
-    case DRUPDATE:
-        start_code = 1;
-        start_state = DRPAUSE;
-        break;
-
-    case IRSELECT:
-    case IRCAPTURE:
-    case IRSHIFT:
-    case IREXIT1:
-    case IRPAUSE:
-    case IREXIT2:
-    case IRUPDATE:
-        start_code = 2;
-        start_state = IRPAUSE;
-        break;
-
-    default:
-        status = JBIC_INTERNAL_ERROR;
-        break;
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        if (jbi_jtag_state != start_state)
-        {
-            status = jbi_goto_jtag_state(start_state);
-        }
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        if (jbi_workspace != NULL)
-        {
-            if (shift_count > JBIC_MAX_JTAG_DR_LENGTH)
-            {
-                status = JBIC_OUT_OF_MEMORY;
-            }
-        }
-        else if (shift_count > jbi_dr_length)
-        {
-            alloc_chars = (shift_count + 7) >> 3;
-            jbi_free(jbi_dr_buffer);
-            jbi_dr_buffer = (unsigned char *) jbi_malloc(alloc_chars);
-
-            if (jbi_dr_buffer == NULL)
-            {
-                status = JBIC_OUT_OF_MEMORY;
-            }
-            else
-            {
-                jbi_dr_length = alloc_chars * 8;
-            }
-        }
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        /*
-        *   Copy preamble data, DR data, and postamble data into a buffer
-        */
-        jbi_jtag_concatenate_data
-        (
-            jbi_dr_buffer,
-            jbi_dr_preamble_data,
-            jbi_dr_preamble,
-            tdi_data,
-            start_index,
-            count,
-            jbi_dr_postamble_data,
-            jbi_dr_postamble
-        );
-
-        /*
-        *   Do the DRSCAN
-        */
-        jbi_jtag_drscan
-        (
-            start_code,
-            shift_count,
-            jbi_dr_buffer,
-            NULL
-        );
-
-        /* jbi_jtag_drscan() always ends in DRPAUSE state */
-        jbi_jtag_state = DRPAUSE;
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        if (jbi_drstop_state != DRPAUSE)
-        {
-            status = jbi_goto_jtag_state(jbi_drstop_state);
-        }
-    }
-
-    return (status);
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-JBI_RETURN_TYPE jbi_swap_dr
-(
-    unsigned int count,
-    unsigned char *in_data,
-    unsigned long in_index,
-    unsigned char *out_data,
-    unsigned int out_index
-)
-
-/*                                                                          */
-/*  Description:    Shifts data into data register, capturing output data   */
-/*                                                                          */
-/*  Returns:        JBIC_SUCCESS for success, else appropriate error code   */
-/*                                                                          */
-/****************************************************************************/
-{
-    int start_code = 0;
-    unsigned int alloc_chars = 0;
-    unsigned int shift_count = jbi_dr_preamble + count + jbi_dr_postamble;
-    JBI_RETURN_TYPE status = JBIC_SUCCESS;
-    JBIE_JTAG_STATE start_state = JBI_ILLEGAL_JTAG_STATE;
-
-    switch (jbi_jtag_state)
-    {
-    case JBI_ILLEGAL_JTAG_STATE:
-    case RESET:
-    case IDLE:
-        start_code = 0;
-        start_state = IDLE;
-        break;
-
-    case DRSELECT:
-    case DRCAPTURE:
-    case DRSHIFT:
-    case DREXIT1:
-    case DRPAUSE:
-    case DREXIT2:
-    case DRUPDATE:
-        start_code = 1;
-        start_state = DRPAUSE;
-        break;
-
-    case IRSELECT:
-    case IRCAPTURE:
-    case IRSHIFT:
-    case IREXIT1:
-    case IRPAUSE:
-    case IREXIT2:
-    case IRUPDATE:
-        start_code = 2;
-        start_state = IRPAUSE;
-        break;
-
-    default:
-        status = JBIC_INTERNAL_ERROR;
-        break;
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        if (jbi_jtag_state != start_state)
-        {
-            status = jbi_goto_jtag_state(start_state);
-        }
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        if (jbi_workspace != NULL)
-        {
-            if (shift_count > JBIC_MAX_JTAG_DR_LENGTH)
-            {
-                status = JBIC_OUT_OF_MEMORY;
-            }
-        }
-        else if (shift_count > jbi_dr_length)
-        {
-            alloc_chars = (shift_count + 7) >> 3;
-            jbi_free(jbi_dr_buffer);
-            jbi_dr_buffer = (unsigned char *) jbi_malloc(alloc_chars);
-
-            if (jbi_dr_buffer == NULL)
-            {
-                status = JBIC_OUT_OF_MEMORY;
-            }
-            else
-            {
-                jbi_dr_length = alloc_chars * 8;
-            }
-        }
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        /*
-        *   Copy preamble data, DR data, and postamble data into a buffer
-        */
-        jbi_jtag_concatenate_data
-        (
-            jbi_dr_buffer,
-            jbi_dr_preamble_data,
-            jbi_dr_preamble,
-            in_data,
-            in_index,
-            count,
-            jbi_dr_postamble_data,
-            jbi_dr_postamble
-        );
-
-        /*
-        *   Do the DRSCAN
-        */
-        jbi_jtag_drscan
-        (
-            start_code,
-            shift_count,
-            jbi_dr_buffer,
-            jbi_dr_buffer
-        );
-
-        /* jbi_jtag_drscan() always ends in DRPAUSE state */
-        jbi_jtag_state = DRPAUSE;
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        if (jbi_drstop_state != DRPAUSE)
-        {
-            status = jbi_goto_jtag_state(jbi_drstop_state);
-        }
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        /*
-        *   Now extract the returned data from the buffer
-        */
-        jbi_jtag_extract_target_data
-        (
-            jbi_dr_buffer,
-            out_data,
-            out_index,
-            jbi_dr_preamble,
-            count
-        );
-    }
-
-    return (status);
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-void jbi_free_jtag_padding_buffers(int reset_jtag)
-
-/*                                                                          */
-/*  Description:    Frees memory allocated for JTAG IR and DR buffers       */
-/*                                                                          */
-/*  Returns:        nothing                                                 */
-/*                                                                          */
-/****************************************************************************/
-{
-    /*
-    *   If the JTAG interface was used, reset it to TLR
-    */
-    if (reset_jtag && (jbi_jtag_state != JBI_ILLEGAL_JTAG_STATE))
-    {
-        jbi_jtag_reset_idle();
-    }
-
-    if (jbi_workspace == NULL)
-    {
-        if (jbi_dr_preamble_data != NULL)
-        {
-            jbi_free(jbi_dr_preamble_data);
-            jbi_dr_preamble_data = NULL;
-        }
-
-        if (jbi_dr_postamble_data != NULL)
-        {
-            jbi_free(jbi_dr_postamble_data);
-            jbi_dr_postamble_data = NULL;
-        }
-
-        if (jbi_dr_buffer != NULL)
-        {
-            jbi_free(jbi_dr_buffer);
-            jbi_dr_buffer = NULL;
-        }
-
-        if (jbi_ir_preamble_data != NULL)
-        {
-            jbi_free(jbi_ir_preamble_data);
-            jbi_ir_preamble_data = NULL;
-        }
-
-        if (jbi_ir_postamble_data != NULL)
-        {
-            jbi_free(jbi_ir_postamble_data);
-            jbi_ir_postamble_data = NULL;
-        }
-
-        if (jbi_ir_buffer != NULL)
-        {
-            jbi_free(jbi_ir_buffer);
-            jbi_ir_buffer = NULL;
-        }
-    }
-}
-
-#if PORT==DOS
-
-/****************************************************************************/
-/*                                                                          */
-
-JBI_RETURN_TYPE jbi_do_drscan_multi_page
-(
-    unsigned int variable_id,
-    unsigned long count,
-    unsigned long start_index,
-    int version
-)
-
-/*                                                                          */
-/*  Description:    Shifts data into data register (ignoring output data)   */
-/*                  Scan data comes from compressed Boolean array.          */
-/*                                                                          */
-/*  Returns:        JBIC_SUCCESS for success, else appropriate error code   */
-/*                                                                          */
-/****************************************************************************/
-{
-    JBI_RETURN_TYPE status = JBIC_SUCCESS;
-    unsigned long shift_count = jbi_dr_preamble + count + jbi_dr_postamble;
-    unsigned long i;
-    unsigned long j;
-    unsigned long k;
-    unsigned int bi;
-
-    if (status == JBIC_SUCCESS)
-    {
-        status = jbi_goto_jtag_state(DRSHIFT);
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        /*
-        *   Get preamble data, DR data, and postamble data one bit at a time
-        *   and immediately scan it into the JTAG chain
-        */
-
-        for (i = 0L; i < jbi_dr_preamble; ++i)
-        {
-            jbi_jtag_io((i == shift_count - 1),
-                (int) (jbi_dr_preamble_data[i >> 3L] & (1L << (i & 7L))), 0);
-        }
-
-        j = start_index;
-        k = jbi_dr_preamble + count;
-
-        jbi_uncompress_page(variable_id, (unsigned int) (j >> 16L), version);
-
-        for (; i < k; ++i, ++j)
-        {
-            bi = (unsigned int) (j & 0x0000ffffL);
-
-            /* check for page boundary - load next page if necessary */
-            if (bi == 0)
-            {
-                jbi_uncompress_page(variable_id, (unsigned int) (j >> 16L), version);
-            }
-
-            jbi_jtag_io((i == shift_count - 1),
-                (int) (jbi_aca_out_buffer[bi >> 3] & (1 << (bi & 7))), 0);
-        }
-
-        j = 0L;
-        k = jbi_dr_preamble + count + jbi_dr_postamble;
-        for (; i < k; ++i, ++j)
-        {
-            jbi_jtag_io((i == shift_count - 1),
-                (int) (jbi_dr_postamble_data[j >> 3L] & (1L << (j & 7L))), 0);
-        }
-
-        jbi_jtag_io(0, 0, 0);   /* DRPAUSE */
-
-        /* jbi_jtag_drscan() always ends in DRPAUSE state */
-        jbi_jtag_state = DRPAUSE;
-
-        if (jbi_drstop_state != DRPAUSE)
-        {
-            status = jbi_goto_jtag_state(jbi_drstop_state);
-        }
-    }
-
-    return (status);
-}
-
-#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbijtag.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbijtag.h
deleted file mode 100644
index fab2dac0266a..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbijtag.h
+++ /dev/null
@@ -1,146 +0,0 @@
-/****************************************************************************/
-/*                                                                          */
-/*  Module:         jbijtag.h                                               */
-/*                                                                          */
-/*                  Copyright (C) Altera Corporation 1998-2001              */
-/*                                                                          */
-/*  Description:    Definitions of JTAG constants, types, and functions     */
-/*                                                                          */
-/****************************************************************************/
-
-#ifndef INC_JBIJTAG_H
-#define INC_JBIJTAG_H
-
-/****************************************************************************/
-/*                                                                          */
-/*  Function Prototypes                                                     */
-/*                                                                          */
-/****************************************************************************/
-typedef enum
-{
-    JBI_ILLEGAL_JTAG_STATE = -1,
-    RESET = 0,
-    IDLE = 1,
-    DRSELECT = 2,
-    DRCAPTURE = 3,
-    DRSHIFT = 4,
-    DREXIT1 = 5,
-    DRPAUSE = 6,
-    DREXIT2 = 7,
-    DRUPDATE = 8,
-    IRSELECT = 9,
-    IRCAPTURE = 10,
-    IRSHIFT = 11,
-    IREXIT1 = 12,
-    IRPAUSE = 13,
-    IREXIT2 = 14,
-    IRUPDATE = 15
-
-} JBIE_JTAG_STATE;
-
-JBI_RETURN_TYPE jbi_init_jtag
-(
-    void
-);
-
-JBI_RETURN_TYPE jbi_set_drstop_state
-(
-    JBIE_JTAG_STATE state
-);
-
-JBI_RETURN_TYPE jbi_set_irstop_state
-(
-    JBIE_JTAG_STATE state
-);
-
-JBI_RETURN_TYPE jbi_set_dr_preamble
-(
-    unsigned int count,
-    unsigned int start_index,
-    unsigned char *preamble_data
-);
-
-JBI_RETURN_TYPE jbi_set_ir_preamble
-(
-    unsigned int count,
-    unsigned int start_index,
-    unsigned char *preamble_data
-);
-
-JBI_RETURN_TYPE jbi_set_dr_postamble
-(
-    unsigned int count,
-    unsigned int start_index,
-    unsigned char *postamble_data
-);
-
-JBI_RETURN_TYPE jbi_set_ir_postamble
-(
-    unsigned int count,
-    unsigned int start_index,
-    unsigned char *postamble_data
-);
-
-JBI_RETURN_TYPE jbi_goto_jtag_state
-(
-    JBIE_JTAG_STATE state
-);
-
-JBI_RETURN_TYPE jbi_do_wait_cycles
-(
-    long cycles,
-    JBIE_JTAG_STATE wait_state
-);
-
-JBI_RETURN_TYPE jbi_do_wait_microseconds
-(
-    long microseconds,
-    JBIE_JTAG_STATE wait_state
-);
-
-JBI_RETURN_TYPE jbi_do_irscan
-(
-    unsigned int count,
-    unsigned char *tdi_data,
-    unsigned int start_index
-);
-
-JBI_RETURN_TYPE jbi_swap_ir
-(
-    unsigned int count,
-    unsigned char *in_data,
-    unsigned int in_index,
-    unsigned char *out_data,
-    unsigned int out_index
-);
-
-JBI_RETURN_TYPE jbi_do_drscan
-(
-    unsigned int count,
-    unsigned char *tdi_data,
-    unsigned long start_index
-);
-
-JBI_RETURN_TYPE jbi_swap_dr
-(
-    unsigned int count,
-    unsigned char *in_data,
-    unsigned long in_index,
-    unsigned char *out_data,
-    unsigned int out_index
-);
-
-void jbi_free_jtag_padding_buffers
-(
-    int reset_jtag
-);
-
-JBI_RETURN_TYPE jbi_do_drscan_multi_page
-(
-    unsigned int variable_id,
-    unsigned long long_count,
-    unsigned long long_index,
-    int version
-);
-
-#endif /* INC_JBIJTAG_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbimain.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbimain.c
deleted file mode 100644
index b8cab4857074..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbimain.c
+++ /dev/null
@@ -1,3362 +0,0 @@
-/****************************************************************************/
-/*                                                                          */
-/*  Module:         jbimain.c                                               */
-/*                                                                          */
-/*                  Copyright (C) Altera Corporation 1998-2001              */
-/*                                                                          */
-/*  Description:    Jam STAPL ByteCode Player (Interpreter)                 */
-/*                                                                          */
-/*  Revisions:      2.2  fixed /W4 warnings                                 */
-/*                  2.0  added support for STAPL ByteCode format            */
-/*                                                                          */
-/****************************************************************************/
-
-#include "jbiport.h"
-#include "jbiexprt.h"
-#include "jbijtag.h"
-#include "jbicomp.h"
-#include "jbistub.h"
-
-/****************************************************************************/
-/*                                                                          */
-/*  MACROS                                                                  */
-/*                                                                          */
-/****************************************************************************/
-
-#ifndef NULL
-#define NULL 0
-#endif
-
-#define JBI_STACK_SIZE 128
-
-#define JBIC_MESSAGE_LENGTH 1024
-
-/*
-*   This macro checks if enough parameters are available on the stack. The
-*   argument is the number of parameters needed.
-*/
-#define IF_CHECK_STACK(x) \
-    if (stack_ptr < (int) (x)) \
-    { \
-        status = JBIC_STACK_OVERFLOW; \
-    } \
-    else
-
-/*
-*   This macro checks if a code address is inside the code section
-*/
-#define CHECK_PC \
-    if ((pc < code_section) || (pc >= debug_section)) \
-    { \
-        status = JBIC_BOUNDS_ERROR; \
-    }
-
-/****************************************************************************/
-/*                                                                          */
-/*  GLOBAL VARIABLES                                                        */
-/*                                                                          */
-/****************************************************************************/
-
-#if PORT==DOS
-/*
-*   jbi_program is a global pointer used by macros GET_BYTE, GET_WORD, and
-*   GET_DWORD to read data from the JBC file
-*/
-PROGRAM_PTR jbi_program;
-#endif
-
-/****************************************************************************/
-/*                                                                          */
-/*  UTILITY FUNCTIONS                                                       */
-/*                                                                          */
-/****************************************************************************/
-
-int jbi_strlen(char *string)
-{
-    int len = 0;
-
-    while (string[len] != '\0') ++len;
-
-    return (len);
-}
-
-long jbi_atol(char *buffer)
-{
-    long result = 0L;
-    int index = 0;
-
-    while ((buffer[index] >= '0') && (buffer[index] <= '9'))
-    {
-        result = (result * 10) + (buffer[index] - '0');
-        ++index;
-    }
-
-    return (result);
-}
-
-void jbi_ltoa(char *buffer, long number)
-{
-    int index = 0;
-    int rev_index = 0;
-    char reverse[32];
-
-    if (number < 0L)
-    {
-        buffer[index++] = '-';
-        number = 0 - number;
-    }
-    else if (number == 0)
-    {
-        buffer[index++] = '0';
-    }
-
-    while (number != 0)
-    {
-        reverse[rev_index++] = (char) ((number % 10) + '0');
-        number /= 10;
-    }
-
-    while (rev_index > 0)
-    {
-        buffer[index++] = reverse[--rev_index];
-    }
-
-    buffer[index] = '\0';
-}
-
-char jbi_toupper(char ch)
-{
-    return ((char) (((ch >= 'a') && (ch <= 'z')) ? (ch + 'A' - 'a') : ch));
-}
-
-int jbi_stricmp(char *left, char *right)
-{
-    int result = 0;
-    char l, r;
-
-    do
-    {
-        l = jbi_toupper(*left);
-        r = jbi_toupper(*right);
-        result = l - r;
-        ++left;
-        ++right;
-    }
-    while ((result == 0) && (l != '\0') && (r != '\0'));
-
-    return (result);
-}
-
-void jbi_strncpy(char *left, char *right, int count)
-{
-    char ch;
-
-    do
-    {
-        *left = *right;
-        ch = *right;
-        ++left;
-        ++right;
-        --count;
-    }
-    while ((ch != '\0') && (count != 0));
-}
-
-void jbi_make_dword(unsigned char *buf, unsigned long num)
-{
-    buf[0] = (unsigned char) num;
-    buf[1] = (unsigned char) (num >> 8L);
-    buf[2] = (unsigned char) (num >> 16L);
-    buf[3] = (unsigned char) (num >> 24L);
-}
-
-unsigned long jbi_get_dword(unsigned char *buf)
-{
-    return
-        (((unsigned long) buf[0]) |
-        (((unsigned long) buf[1]) << 8L) |
-        (((unsigned long) buf[2]) << 16L) |
-        (((unsigned long) buf[3]) << 24L));
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-JBI_RETURN_TYPE jbi_execute
-(
-    PROGRAM_PTR program,
-    long program_size,
-    char *workspace,
-    long workspace_size,
-    char *action,
-    char **init_list,
-    int reset_jtag,
-    long *error_address,
-    int *exit_code,
-    int *format_version
-)
-
-/*                                                                          */
-/*  Description:                                                            */
-/*                                                                          */
-/*  Returns:                                                                */
-/*                                                                          */
-/****************************************************************************/
-{
-    JBI_RETURN_TYPE status = JBIC_SUCCESS;
-    unsigned long first_word = 0L;
-    unsigned long action_table = 0L;
-    unsigned long proc_table = 0L;
-    unsigned long string_table = 0L;
-    unsigned long symbol_table = 0L;
-    unsigned long data_section = 0L;
-    unsigned long code_section = 0L;
-    unsigned long debug_section = 0L;
-    unsigned long action_count = 0L;
-    unsigned long proc_count = 0L;
-    unsigned long symbol_count = 0L;
-    /*char message_buffer[JBIC_MESSAGE_LENGTH + 1];*/
-    char *message_buffer;
-    addr_t *variables = NULL;
-    long *variable_size = NULL;
-    char *attributes = NULL;
-    unsigned char *proc_attributes = NULL;
-    unsigned long pc;
-    unsigned long opcode_address;
-    unsigned long args[3];
-    unsigned int opcode;
-    unsigned long name_id;
-    addr_t stack[JBI_STACK_SIZE] = {0};
-    unsigned char charbuf[4];
-    long long_temp;
-    unsigned int variable_id;
-    unsigned char *charptr_temp;
-    unsigned char *charptr_temp2;
-    long *longptr_temp;
-    int version = 0;
-    int delta = 0;
-    int stack_ptr = 0;
-    unsigned int arg_count;
-    int done = 0;
-    int bad_opcode = 0;
-    unsigned int count;
-    unsigned int index;
-    unsigned int index2;
-    long long_count;
-    long long_index;
-    long long_index2;
-    unsigned int i;
-    unsigned int j;
-    unsigned long uncompressed_size, uncompressed_result;
-    unsigned int offset;
-    unsigned long value;
-    int current_proc = 0;
-    char *equal_ptr;
-    int length;
-    int reverse;
-
-    unsigned long debug_cnt = 0;
-
-#if PORT==DOS
-    char name[33];
-#else
-    char *name;
-#endif
-
-    jbi_workspace = workspace;
-    jbi_workspace_size = workspace_size;
-
-#if PORT==DOS
-    jbi_program = program;
-#endif
-
-    /* Resolve compilation warnings: the frame size of 1664 bytes is larger than 1024 bytes */
-    message_buffer = (char *) kzalloc(JBIC_MESSAGE_LENGTH + 1, GFP_KERNEL);
-    if (message_buffer == NULL) {
-        jbi_dbg(DEBUG_DETAIL, "Memory not enough jbi_execute \n");
-        return JBIC_OUT_OF_MEMORY;
-    }
-
-    /*
-    *   Read header information
-    */
-    if (program_size > 52L)
-    {
-        first_word    = GET_DWORD(0);
-        version = (int) (first_word & 1L);
-        *format_version = version + 1;
-        delta = version * 8;
-
-        action_table  = GET_DWORD(4);
-        proc_table    = GET_DWORD(8);
-        string_table  = GET_DWORD(4 + delta);
-        symbol_table  = GET_DWORD(16 + delta);
-        data_section  = GET_DWORD(20 + delta);
-        code_section  = GET_DWORD(24 + delta);
-        debug_section = GET_DWORD(28 + delta);
-        action_count  = GET_DWORD(40 + delta);
-        proc_count    = GET_DWORD(44 + delta);
-        symbol_count  = GET_DWORD(48 + (2 * delta));
-
-        jbi_dbg(DEBUG_DETAIL, "version:       %d\n", version);
-        jbi_dbg(DEBUG_DETAIL, "delta:         %d\n", delta);
-        jbi_dbg(DEBUG_DETAIL, "action_table:  0x%08lx\n", action_table);
-        jbi_dbg(DEBUG_DETAIL, "proc_table:    0x%08lx\n", proc_table);
-        jbi_dbg(DEBUG_DETAIL, "string_table:  0x%08lx\n", string_table);
-        jbi_dbg(DEBUG_DETAIL, "symbol_table:  0x%08lx\n", symbol_table);
-        jbi_dbg(DEBUG_DETAIL, "data_section:  0x%08lx\n", data_section);
-        jbi_dbg(DEBUG_DETAIL, "code_section:  0x%08lx\n", code_section);
-        jbi_dbg(DEBUG_DETAIL, "debug_section: 0x%08lx\n", debug_section);
-        jbi_dbg(DEBUG_DETAIL, "action_count:  0x%08lx\n", action_count);
-        jbi_dbg(DEBUG_DETAIL, "proc_count:    0x%08lx\n", proc_count);
-        jbi_dbg(DEBUG_DETAIL, "symbol_count:  0x%08lx\n", symbol_count);
-        jbi_dbg(DEBUG_DETAIL, "\n");
-    }
-
-    if ((first_word != 0x4A414D00L) && (first_word != 0x4A414D01L))
-    {
-        jbi_dbg(DEBUG_ERR, "first_word 0x%lx\n", first_word);
-        done = 1;
-        status = JBIC_IO_ERROR;
-    }
-
-    if ((status == JBIC_SUCCESS) && (symbol_count > 0))
-    {
-        variables = (addr_t *) jbi_malloc(
-            (unsigned int) symbol_count * sizeof(long));
-
-        if (variables == NULL) status = JBIC_OUT_OF_MEMORY;
-
-        if (status == JBIC_SUCCESS)
-        {
-            variable_size = (long *) jbi_malloc(
-                (unsigned int) symbol_count * sizeof(long));
-
-            if (variable_size == NULL) status = JBIC_OUT_OF_MEMORY;
-        }
-
-        if (status == JBIC_SUCCESS)
-        {
-            attributes = (char *) jbi_malloc((unsigned int) symbol_count);
-
-            if (attributes == NULL) status = JBIC_OUT_OF_MEMORY;
-        }
-
-        if ((status == JBIC_SUCCESS) && (version > 0))
-        {
-            proc_attributes = (unsigned char *) jbi_malloc((unsigned int) proc_count);
-
-            if (proc_attributes == NULL) status = JBIC_OUT_OF_MEMORY;
-        }
-
-        if (status == JBIC_SUCCESS)
-        {
-            delta = version * 2;
-
-            for (i = 0; i < (unsigned int) symbol_count; ++i)
-            {
-                offset = (unsigned int) (symbol_table + ((11 + delta) * i));
-
-                value = GET_DWORD(offset + 3 + delta);
-
-                attributes[i] = GET_BYTE(offset);
-
-                /* use bit 7 of attribute byte to indicate that this buffer */
-                /* was dynamically allocated and should be freed later */
-                attributes[i] &= 0x7f;
-
-                variable_size[i] = GET_DWORD(offset + 7 + delta);
-
-                jbi_dbg(DEBUG_NOISY, "symbol %03d: 0x%02x,0x%08lx,0x%08lx\n",
-                    i, attributes[i], value, variable_size[i]);
-
-                /*
-                *   Attribute bits:
-                *   bit 0:  0 = read-only, 1 = read-write
-                *   bit 1:  0 = not compressed, 1 = compressed
-                *   bit 2:  0 = not initialized, 1 = initialized
-                *   bit 3:  0 = scalar, 1 = array
-                *   bit 4:  0 = Boolean, 1 = integer
-                *   bit 5:  0 = declared variable,
-                *           1 = compiler created temporary variable
-                */
-
-                if ((attributes[i] & 0x0c) == 0x04)
-                {
-                    /* initialized scalar variable */
-                    variables[i] = value;
-                }
-                else if ((attributes[i] & 0x1e) == 0x0e)
-                {
-                    /* initialized compressed Boolean array */
-#if PORT==DOS
-                    /* for DOS port, get the size but do not uncompress */
-                    long_index = data_section + value;
-                    uncompressed_size =
-                        (((unsigned long) GET_BYTE(long_index)) |
-                        (((unsigned long) GET_BYTE(long_index + 1L)) << 8L) |
-                        (((unsigned long) GET_BYTE(long_index + 2L)) << 16L) |
-                        (((unsigned long) GET_BYTE(long_index + 3L)) << 24L));
-                    variable_size[i] = uncompressed_size;
-#else
-                    uncompressed_size = jbi_get_dword(
-                        &program[data_section + value]);
-
-                    /* allocate a buffer for the uncompressed data */
-                    variables[i] = (addr_t) jbi_malloc(uncompressed_size);
-
-                    if (variables[i] == (addr_t) 0L)
-                    {
-                        status = JBIC_OUT_OF_MEMORY;
-                    }
-                    else
-                    {
-                        /* set flag so buffer will be freed later */
-                        attributes[i] |= 0x80;
-
-                        /* uncompress the data */
-                        uncompressed_result =
-                            jbi_uncompress(
-                            &program[data_section + value],
-                            variable_size[i],
-                            (unsigned char *) variables[i],
-                            uncompressed_size,
-                            version);
-                        if (uncompressed_result != uncompressed_size)
-                        {
-                            /* decompression failed */
-                            jbi_dbg(DEBUG_ERR, "uncompress fail(0x%lx,0x%lx,0x%lx)(0x%lx)\n",
-                                variable_size[i], uncompressed_result, uncompressed_size, value);
-                            status = JBIC_IO_ERROR;
-                        }
-                        else
-                        {
-                            variable_size[i] = uncompressed_size * 8L;
-                        }
-                    }
-#endif
-                }
-                else if ((attributes[i] & 0x1e) == 0x0c)
-                {
-                    /* initialized Boolean array */
-#if PORT==DOS
-                    /* flag attributes so that memory is freed */
-                    attributes[i] |= 0x80;
-
-                    if (variable_size[i] > 0)
-                    {
-                        unsigned int size = (unsigned int)
-                            ((variable_size[i] + 7L) / 8L);
-
-                        variables[i] = (long) jbi_malloc(size);
-
-                        if (variables[i] == NULL)
-                        {
-                            status = JBIC_OUT_OF_MEMORY;
-                        }
-                        else
-                        {
-                            unsigned char *p = (unsigned char *) variables[i];
-                            /* copy array values into buffer */
-                            for (j = 0; j < size; ++j)
-                            {
-                                p[j] = GET_BYTE(data_section + value + j);
-                            }
-                        }
-                    }
-                    else
-                    {
-                        variables[i] = 0;
-                    }
-#else
-                    variables[i] = value + data_section + (addr_t) program;
-#endif
-                }
-                else if ((attributes[i] & 0x1c) == 0x1c)
-                {
-                    /* initialized integer array */
-                    variables[i] = value + data_section;
-                }
-                else if ((attributes[i] & 0x0c) == 0x08)
-                {
-                    /* uninitialized array */
-
-                    /* flag attributes so that memory is freed */
-                    attributes[i] |= 0x80;
-
-                    if (variable_size[i] > 0)
-                    {
-                        unsigned int size;
-
-                        if (attributes[i] & 0x10)
-                        {
-                            /* integer array */
-                            size = (unsigned int)
-                                (variable_size[i] * sizeof(long));
-                        }
-                        else
-                        {
-                            /* Boolean array */
-                            size = (unsigned int)
-                                ((variable_size[i] + 7L) / 8L);
-                        }
-
-                        variables[i] = (addr_t) jbi_malloc(size);
-
-                        if (variables[i] == (addr_t) NULL)
-                        {
-                            status = JBIC_OUT_OF_MEMORY;
-                        }
-                        else
-                        {
-                            /* zero out memory */
-                            for (j = 0; j < size; ++j)
-                            {
-                                ((unsigned char *)(variables[i]))[j] = 0;
-                            }
-                        }
-                    }
-                    else
-                    {
-                        variables[i] = 0;
-                    }
-                }
-                else
-                {
-                    variables[i] = 0;
-                }
-
-                jbi_dbg(DEBUG_NOISY, "  variables: 0x%08lx,0x%016llx\n",
-                    variable_size[i], (long long) variables[i]);
-            }
-        }
-
-        jbi_dbg(DEBUG_NOISY, "\n");
-    }
-
-    /*
-    *   Initialize variables listed in init_list
-    */
-    if ((status == JBIC_SUCCESS) && (init_list != NULL) && (version == 0))
-    {
-        delta = version * 2;
-        count = 0;
-        while (init_list[count] != NULL)
-        {
-            equal_ptr = init_list[count];
-            length = 0;
-            while ((*equal_ptr != '=') && (*equal_ptr != '\0'))
-            {
-                ++equal_ptr;
-                ++length;
-            }
-            if (*equal_ptr == '=')
-            {
-                ++equal_ptr;
-                value = jbi_atol(equal_ptr);
-                jbi_strncpy(message_buffer, init_list[count], length);
-                message_buffer[length] = '\0';
-                for (i = 0; i < (unsigned int) symbol_count; ++i)
-                {
-                    offset = (unsigned int) (symbol_table + ((11 + delta) * i));
-                    name_id = (version == 0) ? GET_WORD(offset + 1) :
-                        GET_DWORD(offset + 1);
-#if PORT==DOS
-                    for (j = 0; j < 32; ++j)
-                    {
-                        name[j] = GET_BYTE(string_table + name_id + j);
-                    }
-                    name[32] = '\0';
-#else
-                    name = (char *) &program[string_table + name_id];
-#endif
-
-                    if (jbi_stricmp(message_buffer, name) == 0)
-                    {
-                        variables[i] = value;
-                    }
-
-                    jbi_dbg(DEBUG_NOISY, "init_list %03d: 0x%08lx,%s,0x%016llx\n",
-                        i, name_id, name, (long long) variables[i]);
-                }
-            }
-
-            ++count;
-        }
-
-        jbi_dbg(DEBUG_NOISY, "\n");
-    }
-
-    if (status != JBIC_SUCCESS) done = 1;
-
-    jbi_init_jtag();
-
-    pc = code_section;
-    message_buffer[0] = '\0';
-
-    /*
-    *   For JBC version 2, we will execute the procedures corresponding to
-    *   the selected ACTION
-    */
-    if (version > 0)
-    {
-        if (action == NULL)
-        {
-            status = JBIC_ACTION_NOT_FOUND;
-            done = 1;
-        }
-        else
-        {
-            int action_found = 0;
-
-            for (i = 0; (i < action_count) && !action_found; ++i)
-            {
-                name_id = GET_DWORD(action_table + (12 * i));
-
-#if PORT==DOS
-                for (j = 0; j < 32; ++j)
-                {
-                    name[j] = GET_BYTE(string_table + name_id + j);
-                }
-                name[32] = '\0';
-#else
-                name = (char *) &program[string_table + name_id];
-#endif
-
-                if (jbi_stricmp(action, name) == 0)
-                {
-                    action_found = 1;
-                    current_proc = (int) GET_DWORD(action_table + (12 * i) + 8);
-                }
-
-                jbi_dbg(DEBUG_NOISY, "action %03d: 0x%08lx,%s, %d,%d\n",
-                        i, name_id, name, action_found, current_proc);
-            }
-
-            if (!action_found)
-            {
-                status = JBIC_ACTION_NOT_FOUND;
-                done = 1;
-            }
-        }
-
-        if (status == JBIC_SUCCESS)
-        {
-            int first_time = 1;
-            i = current_proc;
-            while ((i != 0) || first_time)
-            {
-                first_time = 0;
-                /* check procedure attribute byte */
-                proc_attributes[i] = (unsigned char)
-                    (GET_BYTE(proc_table + (13 * i) + 8) & 0x03);
-
-                jbi_dbg(DEBUG_NOISY, "  proc_attributes %03d: 0x%02x\n",
-                     i, proc_attributes[i]);
-
-                if (proc_attributes[i] != 0)
-                {
-                    /*
-                    *   BIT0 - OPTIONAL
-                    *   BIT1 - RECOMMENDED
-                    *   BIT6 - FORCED OFF
-                    *   BIT7 - FORCED ON
-                    */
-                    if (init_list != NULL)
-                    {
-                        name_id = GET_DWORD(proc_table + (13 * i));
-#if PORT==DOS
-                        for (j = 0; j < 32; ++j)
-                        {
-                            name[j] = GET_BYTE(string_table + name_id + j);
-                        }
-                        name[32] = '\0';
-#else
-                        name = (char *) &program[string_table + name_id];
-#endif
-
-                        jbi_dbg(DEBUG_NOISY, "    init_list %03d: 0x%08lx,%s\n",
-                            i, name_id, name);
-
-                        count = 0;
-                        while (init_list[count] != NULL)
-                        {
-                            equal_ptr = init_list[count];
-                            length = 0;
-                            while ((*equal_ptr != '=') && (*equal_ptr != '\0'))
-                            {
-                                ++equal_ptr;
-                                ++length;
-                            }
-                            if (*equal_ptr == '=')
-                            {
-                                ++equal_ptr;
-                                jbi_strncpy(message_buffer, init_list[count], length);
-                                message_buffer[length] = '\0';
-
-                                if (jbi_stricmp(message_buffer, name) == 0)
-                                {
-                                    if (jbi_atol(equal_ptr) == 0)
-                                    {
-                                        proc_attributes[i] |= 0x40;
-                                    }
-                                    else
-                                    {
-                                        proc_attributes[i] |= 0x80;
-                                    }
-                                }
-                            }
-
-                            jbi_dbg(DEBUG_NOISY, "      proc_attributes %03d: 0x%02x\n",
-                                i, proc_attributes[i]);
-
-                            ++count;
-                        }
-                    }
-                }
-
-                i = (unsigned int) GET_DWORD(proc_table + (13 * i) + 4);
-            }
-
-            /*
-            *   Set current_proc to the first procedure to be executed
-            */
-            i = current_proc;
-            while ((i != 0) &&
-                ((proc_attributes[i] == 1) ||
-                ((proc_attributes[i] & 0xc0) == 0x40)))
-            {
-                i = (unsigned int) GET_DWORD(proc_table + (13 * i) + 4);
-            }
-
-            if ((i != 0) || ((i == 0) && (current_proc == 0) &&
-                ((proc_attributes[0] != 1) &&
-                ((proc_attributes[0] & 0xc0) != 0x40))))
-            {
-                current_proc = i;
-                pc = code_section + GET_DWORD(proc_table + (13 * i) + 9);
-                CHECK_PC;
-            }
-            else
-            {
-                /* there are no procedures to execute! */
-                done = 1;
-            }
-        }
-
-        jbi_dbg(DEBUG_NOISY, "\n");
-    }
-
-    message_buffer[0] = '\0';
-
-    jbi_dbg(DEBUG_NOISY, "excute pc: 0x%lx,%d\n", pc, current_proc);
-    while (!done)
-    {
-        opcode = (unsigned int) (GET_BYTE(pc) & 0xff);
-        debug_cnt++;
-        jbi_dbg(DEBUG_NOISY, "op: 0x%02x(%03d:0x%08lx,%08lx)",
-            opcode, stack_ptr, pc, debug_cnt);
-        opcode_address = pc;
-        ++pc;
-
-        arg_count = (opcode >> 6) & 3;
-        jbi_dbg(DEBUG_NOISY, " - %u:", arg_count);
-        for (i = 0; i < arg_count; ++i)
-        {
-            args[i] = GET_DWORD(pc);
-            jbi_dbg(DEBUG_NOISY, " 0x%08lx", args[i]);
-            pc += 4;
-        }
-        jbi_dbg(DEBUG_NOISY, "\n");
-
-        switch (opcode)
-        {
-        case 0x00: /* NOP  */
-            /* do nothing */
-            break;
-
-        case 0x01: /* DUP  */
-            IF_CHECK_STACK(1)
-            {
-                stack[stack_ptr] = stack[stack_ptr - 1];
-                ++stack_ptr;
-            }
-            break;
-
-        case 0x02: /* SWP  */
-            IF_CHECK_STACK(2)
-            {
-                long_temp = stack[stack_ptr - 2];
-                stack[stack_ptr - 2] = stack[stack_ptr - 1];
-                stack[stack_ptr - 1] = long_temp;
-            }
-            break;
-
-        case 0x03: /* ADD  */
-            IF_CHECK_STACK(2)
-            {
-                --stack_ptr;
-                stack[stack_ptr - 1] += stack[stack_ptr];
-            }
-            break;
-
-        case 0x04: /* SUB  */
-            IF_CHECK_STACK(2)
-            {
-                --stack_ptr;
-                stack[stack_ptr - 1] -= stack[stack_ptr];
-            }
-            break;
-
-        case 0x05: /* MULT */
-            IF_CHECK_STACK(2)
-            {
-                --stack_ptr;
-                stack[stack_ptr - 1] *= stack[stack_ptr];
-            }
-            break;
-
-        case 0x06: /* DIV  */
-            IF_CHECK_STACK(2)
-            {
-                --stack_ptr;
-                stack[stack_ptr - 1] /= stack[stack_ptr];
-            }
-            break;
-
-        case 0x07: /* MOD  */
-            IF_CHECK_STACK(2)
-            {
-                --stack_ptr;
-                stack[stack_ptr - 1] %= stack[stack_ptr];
-            }
-            break;
-
-        case 0x08: /* SHL  */
-            IF_CHECK_STACK(2)
-            {
-                --stack_ptr;
-                stack[stack_ptr - 1] <<= stack[stack_ptr];
-            }
-            break;
-
-        case 0x09: /* SHR  */
-            IF_CHECK_STACK(2)
-            {
-                --stack_ptr;
-                stack[stack_ptr - 1] >>= stack[stack_ptr];
-            }
-            break;
-
-        case 0x0A: /* NOT  */
-            IF_CHECK_STACK(1)
-            {
-                stack[stack_ptr - 1] ^= (-1L);
-            }
-            break;
-
-        case 0x0B: /* AND  */
-            IF_CHECK_STACK(2)
-            {
-                --stack_ptr;
-                stack[stack_ptr - 1] &= stack[stack_ptr];
-            }
-            break;
-
-        case 0x0C: /* OR   */
-            IF_CHECK_STACK(2)
-            {
-                --stack_ptr;
-                stack[stack_ptr - 1] |= stack[stack_ptr];
-            }
-            break;
-
-        case 0x0D: /* XOR  */
-            IF_CHECK_STACK(2)
-            {
-                --stack_ptr;
-                stack[stack_ptr - 1] ^= stack[stack_ptr];
-            }
-            break;
-
-        case 0x0E: /* INV */
-            IF_CHECK_STACK(1)
-            {
-                stack[stack_ptr - 1] = stack[stack_ptr - 1] ? 0L : 1L;
-            }
-            break;
-
-        case 0x0F: /* GT   */
-            IF_CHECK_STACK(2)
-            {
-                --stack_ptr;
-                stack[stack_ptr - 1] =
-                    (stack[stack_ptr - 1] > stack[stack_ptr]) ? 1L : 0L;
-            }
-            break;
-
-        case 0x10: /* LT   */
-            IF_CHECK_STACK(2)
-            {
-                --stack_ptr;
-                stack[stack_ptr - 1] =
-                    (stack[stack_ptr - 1] < stack[stack_ptr]) ? 1L : 0L;
-            }
-            break;
-
-        case 0x11: /* RET  */
-            if ((version > 0) && (stack_ptr == 0))
-            {
-                /*
-                *   We completed one of the main procedures of an ACTION.
-                *   Find the next procedure to be executed and jump to it.
-                *   If there are no more procedures, then EXIT.
-                */
-                i = (unsigned int) GET_DWORD(proc_table + (13 * current_proc) + 4);
-                while ((i != 0) &&
-                    ((proc_attributes[i] == 1) ||
-                    ((proc_attributes[i] & 0xc0) == 0x40)))
-                {
-                    i = (unsigned int) GET_DWORD(proc_table + (13 * i) + 4);
-                }
-
-                if (i == 0)
-                {
-                    /* there are no procedures to execute! */
-                    done = 1;
-                    *exit_code = 0; /* success */
-                }
-                else
-                {
-                    current_proc = i;
-                    pc = code_section + GET_DWORD(proc_table + (13 * i) + 9);
-                    CHECK_PC;
-                }
-            }
-            else IF_CHECK_STACK(1)
-            {
-                pc = stack[--stack_ptr] + code_section;
-                CHECK_PC;
-                if (pc == code_section)
-                {
-                    status = JBIC_BOUNDS_ERROR;
-                }
-            }
-            break;
-
-        case 0x12: /* CMPS */
-            /*
-            *   Array short compare
-            *   ...stack 0 is source 1 value
-            *   ...stack 1 is source 2 value
-            *   ...stack 2 is mask value
-            *   ...stack 3 is count
-            */
-            IF_CHECK_STACK(4)
-            {
-                long a = stack[--stack_ptr];
-                long b = stack[--stack_ptr];
-                long_temp = stack[--stack_ptr];
-                count = (unsigned int) stack[stack_ptr - 1];
-
-                if ((count < 1) || (count > 32))
-                {
-                    status = JBIC_BOUNDS_ERROR;
-                }
-                else
-                {
-                    long_temp &= ((-1L) >> (32 - count));
-
-                    stack[stack_ptr - 1] =
-                        ((a & long_temp) == (b & long_temp)) ? 1L : 0L;
-                }
-            }
-            break;
-
-        case 0x13: /* PINT */
-            /*
-            *   PRINT add integer
-            *   ...stack 0 is integer value
-            */
-            IF_CHECK_STACK(1)
-            {
-                jbi_ltoa(&message_buffer[jbi_strlen(message_buffer)],
-                    stack[--stack_ptr]);
-            }
-            break;
-
-        case 0x14: /* PRNT */
-            /*
-            *   PRINT finish
-            */
-            jbi_message(message_buffer);
-            message_buffer[0] = '\0';
-            break;
-
-        case 0x15: /* DSS  */
-            /*
-            *   DRSCAN short
-            *   ...stack 0 is scan data
-            *   ...stack 1 is count
-            */
-            IF_CHECK_STACK(2)
-            {
-                long_temp = stack[--stack_ptr];
-                count = (unsigned int) stack[--stack_ptr];
-                jbi_make_dword(charbuf, long_temp);
-                status = jbi_do_drscan(count, charbuf, 0);
-            }
-            break;
-
-        case 0x16: /* DSSC */
-            /*
-            *   DRSCAN short with capture
-            *   ...stack 0 is scan data
-            *   ...stack 1 is count
-            */
-            IF_CHECK_STACK(2)
-            {
-                long_temp = stack[--stack_ptr];
-                count = (unsigned int) stack[stack_ptr - 1];
-                jbi_make_dword(charbuf, long_temp);
-                status = jbi_swap_dr(count, charbuf, 0, charbuf, 0);
-                stack[stack_ptr - 1] = jbi_get_dword(charbuf);
-            }
-            break;
-
-        case 0x17: /* ISS  */
-            /*
-            *   IRSCAN short
-            *   ...stack 0 is scan data
-            *   ...stack 1 is count
-            */
-            IF_CHECK_STACK(2)
-            {
-                long_temp = stack[--stack_ptr];
-                count = (unsigned int) stack[--stack_ptr];
-                jbi_make_dword(charbuf, long_temp);
-                status = jbi_do_irscan(count, charbuf, 0);
-            }
-            break;
-
-        case 0x18: /* ISSC */
-            /*
-            *   IRSCAN short with capture
-            *   ...stack 0 is scan data
-            *   ...stack 1 is count
-            */
-            IF_CHECK_STACK(2)
-            {
-                long_temp = stack[--stack_ptr];
-                count = (unsigned int) stack[stack_ptr - 1];
-                jbi_make_dword(charbuf, long_temp);
-                status = jbi_swap_ir(count, charbuf, 0, charbuf, 0);
-                stack[stack_ptr - 1] = jbi_get_dword(charbuf);
-            }
-            break;
-
-        case 0x19: /* VSS  */
-            /*
-            *   VECTOR short
-            *   ...stack 0 is scan data
-            *   ...stack 1 is count
-            */
-            bad_opcode = 1;
-            break;
-
-        case 0x1A: /* VSSC */
-            /*
-            *   VECTOR short with capture
-            *   ...stack 0 is scan data
-            *   ...stack 1 is count
-            */
-            bad_opcode = 1;
-            break;
-
-        case 0x1B: /* VMPF */
-            /*
-            *   VMAP finish
-            */
-            bad_opcode = 1;
-            break;
-
-        case 0x1C: /* DPR  */
-            IF_CHECK_STACK(1)
-            {
-                count = (unsigned int) stack[--stack_ptr];
-                status = jbi_set_dr_preamble(count, 0, NULL);
-            }
-            break;
-
-        case 0x1D: /* DPRL */
-            /*
-            *   DRPRE with literal data
-            *   ...stack 0 is count
-            *   ...stack 1 is literal data
-            */
-            IF_CHECK_STACK(2)
-            {
-                count = (unsigned int) stack[--stack_ptr];
-                long_temp = stack[--stack_ptr];
-                jbi_make_dword(charbuf, long_temp);
-                status = jbi_set_dr_preamble(count, 0, charbuf);
-            }
-            break;
-
-        case 0x1E: /* DPO  */
-            /*
-            *   DRPOST
-            *   ...stack 0 is count
-            */
-            IF_CHECK_STACK(1)
-            {
-                count = (unsigned int) stack[--stack_ptr];
-                status = jbi_set_dr_postamble(count, 0, NULL);
-            }
-            break;
-
-        case 0x1F: /* DPOL */
-            /*
-            *   DRPOST with literal data
-            *   ...stack 0 is count
-            *   ...stack 1 is literal data
-            */
-            IF_CHECK_STACK(2)
-            {
-                count = (unsigned int) stack[--stack_ptr];
-                long_temp = stack[--stack_ptr];
-                jbi_make_dword(charbuf, long_temp);
-                status = jbi_set_dr_postamble(count, 0, charbuf);
-            }
-            break;
-
-        case 0x20: /* IPR  */
-            IF_CHECK_STACK(1)
-            {
-                count = (unsigned int) stack[--stack_ptr];
-                status = jbi_set_ir_preamble(count, 0, NULL);
-            }
-            break;
-
-        case 0x21: /* IPRL */
-            /*
-            *   IRPRE with literal data
-            *   ...stack 0 is count
-            *   ...stack 1 is literal data
-            */
-            IF_CHECK_STACK(2)
-            {
-                count = (unsigned int) stack[--stack_ptr];
-                long_temp = stack[--stack_ptr];
-                jbi_make_dword(charbuf, long_temp);
-                status = jbi_set_ir_preamble(count, 0, charbuf);
-            }
-            break;
-
-        case 0x22: /* IPO  */
-            /*
-            *   IRPOST
-            *   ...stack 0 is count
-            */
-            IF_CHECK_STACK(1)
-            {
-                count = (unsigned int) stack[--stack_ptr];
-                status = jbi_set_ir_postamble(count, 0, NULL);
-            }
-            break;
-
-        case 0x23: /* IPOL */
-            /*
-            *   IRPOST with literal data
-            *   ...stack 0 is count
-            *   ...stack 1 is literal data
-            */
-            IF_CHECK_STACK(2)
-            {
-                count = (unsigned int) stack[--stack_ptr];
-                long_temp = stack[--stack_ptr];
-                jbi_make_dword(charbuf, long_temp);
-                status = jbi_set_ir_postamble(count, 0, charbuf);
-            }
-            break;
-
-        case 0x24: /* PCHR */
-            IF_CHECK_STACK(1)
-            {
-                unsigned char ch;
-                count = jbi_strlen(message_buffer);
-                ch = (char) stack[--stack_ptr];
-                if ((ch < 1) || (ch > 127))
-                {
-                    /* character code out of range */
-                    /* instead of flagging an error, force the value to 127 */
-                    ch = 127;
-                }
-                message_buffer[count] = ch;
-                message_buffer[count + 1] = '\0';
-            }
-            break;
-
-        case 0x25: /* EXIT */
-            IF_CHECK_STACK(1)
-            {
-                *exit_code = (int) stack[--stack_ptr];
-            }
-            done = 1;
-            break;
-
-        case 0x26: /* EQU  */
-            IF_CHECK_STACK(2)
-            {
-                --stack_ptr;
-                stack[stack_ptr - 1] =
-                    (stack[stack_ptr - 1] == stack[stack_ptr]) ? 1L : 0L;
-            }
-            break;
-
-        case 0x27: /* POPT  */
-            IF_CHECK_STACK(1)
-            {
-                --stack_ptr;
-            }
-            break;
-
-        case 0x28: /* TRST  */
-            bad_opcode = 1;
-            break;
-
-        case 0x29: /* FRQ   */
-            bad_opcode = 1;
-            break;
-
-        case 0x2A: /* FRQU  */
-            bad_opcode = 1;
-            break;
-
-        case 0x2B: /* PD32  */
-            bad_opcode = 1;
-            break;
-
-        case 0x2C: /* ABS   */
-            IF_CHECK_STACK(1)
-            {
-                if (stack[stack_ptr - 1] < 0)
-                {
-                    stack[stack_ptr - 1] = 0 - stack[stack_ptr - 1];
-                }
-            }
-            break;
-
-        case 0x2D: /* BCH0  */
-            /*
-            *   Batch operation 0
-            *   SWP
-            *   SWPN 7
-            *   SWP
-            *   SWPN 6
-            *   DUPN 8
-            *   SWPN 2
-            *   SWP
-            *   DUPN 6
-            *   DUPN 6
-            */
-
-            /* SWP  */
-            IF_CHECK_STACK(2)
-            {
-                long_temp = stack[stack_ptr - 2];
-                stack[stack_ptr - 2] = stack[stack_ptr - 1];
-                stack[stack_ptr - 1] = long_temp;
-            }
-
-            /* SWPN 7 */
-            index = 7 + 1;
-            IF_CHECK_STACK(index)
-            {
-                long_temp = stack[stack_ptr - index];
-                stack[stack_ptr - index] = stack[stack_ptr - 1];
-                stack[stack_ptr - 1] = long_temp;
-            }
-
-            /* SWP  */
-            IF_CHECK_STACK(2)
-            {
-                long_temp = stack[stack_ptr - 2];
-                stack[stack_ptr - 2] = stack[stack_ptr - 1];
-                stack[stack_ptr - 1] = long_temp;
-            }
-
-            /* SWPN 6 */
-            index = 6 + 1;
-            IF_CHECK_STACK(index)
-            {
-                long_temp = stack[stack_ptr - index];
-                stack[stack_ptr - index] = stack[stack_ptr - 1];
-                stack[stack_ptr - 1] = long_temp;
-            }
-
-            /* DUPN 8 */
-            index = 8 + 1;
-            IF_CHECK_STACK(index)
-            {
-                stack[stack_ptr] = stack[stack_ptr - index];
-                ++stack_ptr;
-            }
-
-            /* SWPN 2 */
-            index = 2 + 1;
-            IF_CHECK_STACK(index)
-            {
-                long_temp = stack[stack_ptr - index];
-                stack[stack_ptr - index] = stack[stack_ptr - 1];
-                stack[stack_ptr - 1] = long_temp;
-            }
-
-            /* SWP  */
-            IF_CHECK_STACK(2)
-            {
-                long_temp = stack[stack_ptr - 2];
-                stack[stack_ptr - 2] = stack[stack_ptr - 1];
-                stack[stack_ptr - 1] = long_temp;
-            }
-
-            /* DUPN 6 */
-            index = 6 + 1;
-            IF_CHECK_STACK(index)
-            {
-                stack[stack_ptr] = stack[stack_ptr - index];
-                ++stack_ptr;
-            }
-
-            /* DUPN 6 */
-            index = 6 + 1;
-            IF_CHECK_STACK(index)
-            {
-                stack[stack_ptr] = stack[stack_ptr - index];
-                ++stack_ptr;
-            }
-            break;
-
-        case 0x2E: /* BCH1  */
-            /*
-            *   Batch operation 1
-            *   SWPN 8
-            *   SWP
-            *   SWPN 9
-            *   SWPN 3
-            *   SWP
-            *   SWPN 2
-            *   SWP
-            *   SWPN 7
-            *   SWP
-            *   SWPN 6
-            *   DUPN 5
-            *   DUPN 5
-            */
-            bad_opcode = 1;
-            break;
-
-        case 0x2F: /* PSH0  */
-            stack[stack_ptr++] = 0;
-            break;
-
-        case 0x40: /* PSHL */
-            stack[stack_ptr++] = (long) args[0];
-            break;
-
-        case 0x41: /* PSHV */
-            stack[stack_ptr++] = variables[args[0]];
-            break;
-
-        case 0x42: /* JMP  */
-            pc = args[0] + code_section;
-            CHECK_PC;
-            break;
-
-        case 0x43: /* CALL */
-            stack[stack_ptr++] = pc;
-            pc = args[0] + code_section;
-            CHECK_PC;
-            break;
-
-        case 0x44: /* NEXT */
-            /*
-            *   Process FOR / NEXT loop
-            *   ...argument 0 is variable ID
-            *   ...stack 0 is step value
-            *   ...stack 1 is end value
-            *   ...stack 2 is top address
-            */
-            IF_CHECK_STACK(3)
-            {
-                long step = stack[stack_ptr - 1];
-                long end = stack[stack_ptr - 2];
-                long top = stack[stack_ptr - 3];
-                long iterator = variables[args[0]];
-                int break_out = 0;
-
-                if (step < 0)
-                {
-                    if (iterator <= end) break_out = 1;
-                }
-                else
-                {
-                    if (iterator >= end) break_out = 1;
-                }
-
-                if (break_out)
-                {
-                    stack_ptr -= 3;
-                }
-                else
-                {
-                    variables[args[0]] = iterator + step;
-                    pc = top + code_section;
-                    CHECK_PC;
-                }
-            }
-            break;
-
-        case 0x45: /* PSTR */
-            /*
-            *   PRINT add string
-            *   ...argument 0 is string ID
-            */
-#if PORT==DOS
-            long_index = string_table + args[0];
-            index2 = jbi_strlen(message_buffer);
-
-            do
-            {
-                i = GET_BYTE(long_index);
-                message_buffer[index2] = (char) i;
-                ++long_index;
-                ++index2;
-            }
-            while ((i != '\0') && (index2 < JBIC_MESSAGE_LENGTH));
-#else
-            count = jbi_strlen(message_buffer);
-            jbi_strncpy(&message_buffer[count],
-                (char *) &program[string_table + args[0]],
-                JBIC_MESSAGE_LENGTH - count);
-#endif
-            message_buffer[JBIC_MESSAGE_LENGTH] = '\0';
-            break;
-
-        case 0x46: /* VMAP */
-            /*
-            *   VMAP add signal name
-            *   ...argument 0 is string ID
-            */
-            bad_opcode = 1;
-            break;
-
-        case 0x47: /* SINT */
-            /*
-            *   STATE intermediate state
-            *   ...argument 0 is state code
-            */
-            status = jbi_goto_jtag_state((int) args[0]);
-            break;
-
-        case 0x48: /* ST   */
-            /*
-            *   STATE final state
-            *   ...argument 0 is state code
-            */
-            status = jbi_goto_jtag_state((int) args[0]);
-            break;
-
-        case 0x49: /* ISTP */
-            /*
-            *   IRSTOP state
-            *   ...argument 0 is state code
-            */
-            status = jbi_set_irstop_state((int) args[0]);
-            break;
-
-        case 0x4A: /* DSTP */
-            /*
-            *   DRSTOP state
-            *   ...argument 0 is state code
-            */
-            status = jbi_set_drstop_state((int) args[0]);
-            break;
-
-        case 0x4B: /* SWPN */
-            /*
-            *   Exchange top with Nth stack value
-            *   ...argument 0 is 0-based stack entry to swap with top element
-            */
-            index = ((int) args[0]) + 1;
-            IF_CHECK_STACK(index)
-            {
-                long_temp = stack[stack_ptr - index];
-                stack[stack_ptr - index] = stack[stack_ptr - 1];
-                stack[stack_ptr - 1] = long_temp;
-            }
-            break;
-
-        case 0x4C: /* DUPN */
-            /*
-            *   Duplicate Nth stack value
-            *   ...argument 0 is 0-based stack entry to duplicate
-            */
-            index = ((int) args[0]) + 1;
-            IF_CHECK_STACK(index)
-            {
-                stack[stack_ptr] = stack[stack_ptr - index];
-                ++stack_ptr;
-            }
-            break;
-
-        case 0x4D: /* POPV */
-            /*
-            *   Pop stack into scalar variable
-            *   ...argument 0 is variable ID
-            *   ...stack 0 is value
-            */
-            IF_CHECK_STACK(1)
-            {
-                variables[args[0]] = stack[--stack_ptr];
-            }
-            break;
-
-        case 0x4E: /* POPE */
-            /*
-            *   Pop stack into integer array element
-            *   ...argument 0 is variable ID
-            *   ...stack 0 is array index
-            *   ...stack 1 is value
-            */
-            IF_CHECK_STACK(2)
-            {
-                variable_id = (unsigned int) args[0];
-
-                /*
-                *   If variable is read-only, convert to writable array
-                */
-                if ((version > 0) &&
-                    ((attributes[variable_id] & 0x9c) == 0x1c))
-                {
-                    /*
-                    *   Allocate a writable buffer for this array
-                    */
-                    count = (unsigned int) variable_size[variable_id];
-                    long_temp = variables[variable_id];
-                    longptr_temp = (long *) jbi_malloc(count * sizeof(long));
-                    variables[variable_id] = (addr_t) longptr_temp;
-
-                    if (variables[variable_id] == (addr_t) NULL)
-                    {
-                        status = JBIC_OUT_OF_MEMORY;
-                        break;
-                    }
-                    else
-                    {
-                        /* copy previous contents into buffer */
-                        for (i = 0; i < count; ++i)
-                        {
-                            longptr_temp[i] = GET_DWORD(long_temp);
-                            long_temp += 4L;
-                        }
-
-                        /* set bit 7 - buffer was dynamically allocated */
-                        attributes[variable_id] |= 0x80;
-
-                        /* clear bit 2 - variable is writable */
-                        attributes[variable_id] &= ~0x04;
-                        attributes[variable_id] |= 0x01;
-                    }
-                }
-
-#if PORT==DOS
-                /* for 16-bit version, allow writing in allocated buffers */
-                if ((version > 0) &&
-                    ((attributes[variable_id] & 0x9c) == 0x9c))
-                {
-                    attributes[variable_id] &= ~0x04;
-                    attributes[variable_id] |= 0x01;
-                }
-#endif
-
-                /* check that variable is a writable integer array */
-                if ((attributes[variable_id] & 0x1c) != 0x18)
-                {
-                    status = JBIC_BOUNDS_ERROR;
-                }
-                else
-                {
-                    longptr_temp = (long *) variables[variable_id];
-
-                    /* pop the array index */
-                    index = (unsigned int) stack[--stack_ptr];
-
-                    /* pop the value and store it into the array */
-                    longptr_temp[index] = stack[--stack_ptr];
-                }
-            }
-            break;
-
-        case 0x4F: /* POPA */
-            /*
-            *   Pop stack into Boolean array
-            *   ...argument 0 is variable ID
-            *   ...stack 0 is count
-            *   ...stack 1 is array index
-            *   ...stack 2 is value
-            */
-            IF_CHECK_STACK(3)
-            {
-                variable_id = (unsigned int) args[0];
-
-                /*
-                *   If variable is read-only, convert to writable array
-                */
-                if ((version > 0) &&
-                    ((attributes[variable_id] & 0x9c) == 0x0c))
-                {
-                    /*
-                    *   Allocate a writable buffer for this array
-                    */
-                    long_temp = (variable_size[variable_id] + 7L) >> 3L;
-                    charptr_temp2 = (unsigned char *) variables[variable_id];
-                    charptr_temp = jbi_malloc((unsigned int) long_temp);
-                    variables[variable_id] = (addr_t) charptr_temp;
-
-                    if (variables[variable_id] == (addr_t) NULL)
-                    {
-                        status = JBIC_OUT_OF_MEMORY;
-                    }
-                    else
-                    {
-                        /* zero the buffer */
-                        for (long_index = 0L;
-                            long_index < long_temp;
-                            ++long_index)
-                        {
-                            charptr_temp[long_index] = 0;
-                        }
-
-                        /* copy previous contents into buffer */
-                        for (long_index = 0L;
-                            long_index < variable_size[variable_id];
-                            ++long_index)
-                        {
-#if PORT==DOS
-                            if ((attributes[variable_id] & 0x02) &&
-                                ((long_index & 0x0000FFFF) == 0L))
-                            {
-                                /* initialized compressed Boolean array */
-                                jbi_uncompress_page(variable_id,
-                                    (int) (long_index >> 16), version);
-                                charptr_temp = jbi_aca_out_buffer;
-                                long_index2 = long_index & 0xFFFF;
-                            }
-#else
-                            long_index2 = long_index;
-#endif
-
-                            if (charptr_temp2[long_index2 >> 3] &
-                                (1 << (long_index2 & 7)))
-                            {
-                                charptr_temp[long_index >> 3] |=
-                                    (1 << (long_index & 7));
-                            }
-                        }
-
-                        /* set bit 7 - buffer was dynamically allocated */
-                        attributes[variable_id] |= 0x80;
-
-                        /* clear bit 2 - variable is writable */
-                        attributes[variable_id] &= ~0x04;
-                        attributes[variable_id] |= 0x01;
-                    }
-                }
-
-#if PORT==DOS
-                /* for 16-bit version, allow writing in allocated buffers */
-                if ((version > 0) &&
-                    ((attributes[variable_id] & 0x9c) == 0x8c))
-                {
-                    attributes[variable_id] &= ~0x04;
-                    attributes[variable_id] |= 0x01;
-                }
-#endif
-
-                /* check that variable is a writable Boolean array */
-                if ((attributes[variable_id] & 0x1c) != 0x08)
-                {
-                    status = JBIC_BOUNDS_ERROR;
-                }
-                else
-                {
-                    charptr_temp = (unsigned char *) variables[variable_id];
-
-                    /* pop the count (number of bits to copy) */
-                    long_count = stack[--stack_ptr];
-
-                    /* pop the array index */
-                    long_index = stack[--stack_ptr];
-
-                    reverse = 0;
-
-                    if (version > 0)
-                    {
-                        /* stack 0 = array right index */
-                        /* stack 1 = array left index */
-
-                        if (long_index > long_count)
-                        {
-                            reverse = 1;
-                            long_temp = long_count;
-                            long_count = 1 + long_index - long_count;
-                            long_index = long_temp;
-
-                            /* reverse POPA is not supported */
-                            status = JBIC_BOUNDS_ERROR;
-                            break;
-                        }
-                        else
-                        {
-                            long_count = 1 + long_count - long_index;
-                        }
-                    }
-
-                    /* pop the data */
-                    long_temp = stack[--stack_ptr];
-
-                    if (long_count < 1)
-                    {
-                        status = JBIC_BOUNDS_ERROR;
-                    }
-                    else
-                    {
-                        for (i = 0; i < (unsigned int) long_count; ++i)
-                        {
-                            if (long_temp & (1L << (long) i))
-                            {
-                                charptr_temp[long_index >> 3L] |=
-                                    (1L << (long_index & 7L));
-                            }
-                            else
-                            {
-                                charptr_temp[long_index >> 3L] &=
-                                    ~ (unsigned int) (1L << (long_index & 7L));
-                            }
-                            ++long_index;
-                        }
-                    }
-                }
-            }
-            break;
-
-        case 0x50: /* JMPZ */
-            /*
-            *   Pop stack and branch if zero
-            *   ...argument 0 is address
-            *   ...stack 0 is condition value
-            */
-            IF_CHECK_STACK(1)
-            {
-                if (stack[--stack_ptr] == 0)
-                {
-                    pc = args[0] + code_section;
-                    CHECK_PC;
-                }
-            }
-            break;
-
-        case 0x51: /* DS   */
-        case 0x52: /* IS   */
-            /*
-            *   DRSCAN
-            *   IRSCAN
-            *   ...argument 0 is scan data variable ID
-            *   ...stack 0 is array index
-            *   ...stack 1 is count
-            */
-            IF_CHECK_STACK(2)
-            {
-                long_index = stack[--stack_ptr];
-                long_count = stack[--stack_ptr];
-
-                reverse = 0;
-
-                if (version > 0)
-                {
-                    /* stack 0 = array right index */
-                    /* stack 1 = array left index */
-                    /* stack 2 = count */
-                    long_temp = long_count;
-                    long_count = stack[--stack_ptr];
-
-                    if (long_index > long_temp)
-                    {
-                        reverse = 1;
-                        long_index = long_temp;
-                    }
-                }
-
-#if PORT==DOS
-                if (((long_index & 0xFFFF0000) == 0) &&
-                    ((long_count & 0xFFFF0000) == 0))
-                {
-                    variable_id = (unsigned int) args[0];
-                    if ((attributes[variable_id] & 0x1e) == 0x0e)
-                    {
-                        /* initialized compressed Boolean array */
-                        jbi_uncompress_page(variable_id,
-                            (int) (long_index >> 16), version);
-                        long_index &= 0x0000ffff;
-                        charptr_temp = jbi_aca_out_buffer;
-                    }
-                    else
-                    {
-                        charptr_temp = (unsigned char *) variables[variable_id];
-                    }
-
-                    if (reverse)
-                    {
-                        /* allocate a buffer and reverse the data order */
-                        charptr_temp2 = charptr_temp;
-                        charptr_temp = jbi_malloc((unsigned int)
-                            ((long_count >> 3L) + 1L));
-
-                        if (charptr_temp == NULL)
-                        {
-                            status = JBIC_OUT_OF_MEMORY;
-                            break;
-                        }
-                        else
-                        {
-                            long_temp = long_index + long_count - 1;
-                            long_index2 = 0;
-                            while (long_index2 < long_count)
-                            {
-                                if (charptr_temp2[long_temp >> 3] &
-                                    (1 << (long_temp & 7)))
-                                {
-                                    charptr_temp[long_index2 >> 3] |=
-                                        (1 << (long_index2 & 7));
-                                }
-                                else
-                                {
-                                    charptr_temp[long_index2 >> 3] &=
-                                        ~(1 << (long_index2 & 7));
-                                }
-
-                                --long_temp;
-                                ++long_index2;
-                            }
-                        }
-                    }
-
-                    if (opcode == 0x51) /* DS */
-                    {
-                        status = jbi_do_drscan((unsigned int) long_count,
-                            charptr_temp, (unsigned long) long_index);
-                    }
-                    else    /* IS */
-                    {
-                        status = jbi_do_irscan((unsigned int) long_count,
-                            charptr_temp, (unsigned int) long_index);
-                    }
-
-                    if (reverse) jbi_free(charptr_temp);
-                }
-                else if ((opcode == 0x51) && !reverse)
-                {
-                    status = jbi_do_drscan_multi_page(
-                        (unsigned int) args[0],
-                        (unsigned long) long_count,
-                        (unsigned long) long_index, version);
-                }
-                else
-                {
-                    /* reverse multi-page scans are not supported */
-                    /* multi-page IR scans are not supported */
-                    status = JBIC_BOUNDS_ERROR;
-                }
-#else
-                charptr_temp = (unsigned char *) variables[args[0]];
-
-                if (reverse)
-                {
-                    /* allocate a buffer and reverse the data order */
-                    charptr_temp2 = charptr_temp;
-                    charptr_temp = jbi_malloc((long_count >> 3) + 1);
-                    if (charptr_temp == NULL)
-                    {
-                        status = JBIC_OUT_OF_MEMORY;
-                        break;
-                    }
-                    else
-                    {
-                        long_temp = long_index + long_count - 1;
-                        long_index2 = 0;
-                        while (long_index2 < long_count)
-                        {
-                            if (charptr_temp2[long_temp >> 3] &
-                                (1 << (long_temp & 7)))
-                            {
-                                charptr_temp[long_index2 >> 3] |=
-                                    (1 << (long_index2 & 7));
-                            }
-                            else
-                            {
-                                charptr_temp[long_index2 >> 3] &=
-                                    ~(1 << (long_index2 & 7));
-                            }
-
-                            --long_temp;
-                            ++long_index2;
-                        }
-                    }
-                }
-
-                if (opcode == 0x51) /* DS */
-                {
-                    status = jbi_do_drscan((unsigned int) long_count,
-                        charptr_temp, (unsigned long) long_index);
-                }
-                else    /* IS */
-                {
-                    status = jbi_do_irscan((unsigned int) long_count,
-                        charptr_temp, (unsigned int) long_index);
-                }
-#endif
-
-                if (reverse && (charptr_temp != NULL))
-                {
-                    jbi_free(charptr_temp);
-                }
-            }
-            break;
-
-        case 0x53: /* DPRA */
-            /*
-            *   DRPRE with array data
-            *   ...argument 0 is variable ID
-            *   ...stack 0 is array index
-            *   ...stack 1 is count
-            */
-            IF_CHECK_STACK(2)
-            {
-                index = (unsigned int) stack[--stack_ptr];
-                count = (unsigned int) stack[--stack_ptr];
-
-                if (version > 0)
-                {
-                    /* stack 0 = array right index */
-                    /* stack 1 = array left index */
-                    count = 1 + count - index;
-                }
-
-                charptr_temp = (unsigned char *) variables[args[0]];
-                status = jbi_set_dr_preamble(count, index, charptr_temp);
-            }
-            break;
-
-        case 0x54: /* DPOA */
-            /*
-            *   DRPOST with array data
-            *   ...argument 0 is variable ID
-            *   ...stack 0 is array index
-            *   ...stack 1 is count
-            */
-            IF_CHECK_STACK(2)
-            {
-                index = (unsigned int) stack[--stack_ptr];
-                count = (unsigned int) stack[--stack_ptr];
-
-                if (version > 0)
-                {
-                    /* stack 0 = array right index */
-                    /* stack 1 = array left index */
-                    count = 1 + count - index;
-                }
-
-                charptr_temp = (unsigned char *) variables[args[0]];
-                status = jbi_set_dr_postamble(count, index, charptr_temp);
-            }
-            break;
-
-        case 0x55: /* IPRA */
-            /*
-            *   IRPRE with array data
-            *   ...argument 0 is variable ID
-            *   ...stack 0 is array index
-            *   ...stack 1 is count
-            */
-            IF_CHECK_STACK(2)
-            {
-                index = (unsigned int) stack[--stack_ptr];
-                count = (unsigned int) stack[--stack_ptr];
-
-                if (version > 0)
-                {
-                    /* stack 0 = array right index */
-                    /* stack 1 = array left index */
-                    count = 1 + count - index;
-                }
-
-                charptr_temp = (unsigned char *) variables[args[0]];
-                status = jbi_set_ir_preamble(count, index, charptr_temp);
-            }
-            break;
-
-        case 0x56: /* IPOA */
-            /*
-            *   IRPOST with array data
-            *   ...argument 0 is variable ID
-            *   ...stack 0 is array index
-            *   ...stack 1 is count
-            */
-            IF_CHECK_STACK(2)
-            {
-                index = (unsigned int) stack[--stack_ptr];
-                count = (unsigned int) stack[--stack_ptr];
-
-                if (version > 0)
-                {
-                    /* stack 0 = array right index */
-                    /* stack 1 = array left index */
-                    count = 1 + count - index;
-                }
-
-                charptr_temp = (unsigned char *) variables[args[0]];
-                status = jbi_set_ir_postamble(count, index, charptr_temp);
-            }
-            break;
-
-        case 0x57: /* EXPT */
-            /*
-            *   EXPORT
-            *   ...argument 0 is string ID
-            *   ...stack 0 is integer expression
-            */
-            IF_CHECK_STACK(1)
-            {
-#if PORT==DOS
-                name_id = args[0];
-                for (j = 0; j < 32; ++j)
-                {
-                    name[j] = GET_BYTE(string_table + name_id + j);
-                }
-                name[32] = '\0';
-#else
-                name = (char *) &program[string_table + args[0]];
-#endif
-                long_temp = stack[--stack_ptr];
-                jbi_export_integer(name, long_temp);
-            }
-            break;
-
-        case 0x58: /* PSHE */
-            /*
-            *   Push integer array element
-            *   ...argument 0 is variable ID
-            *   ...stack 0 is array index
-            */
-            IF_CHECK_STACK(1)
-            {
-                variable_id = (unsigned int) args[0];
-                index = (unsigned int) stack[stack_ptr - 1];
-
-                /* check variable type */
-                if ((attributes[variable_id] & 0x1f) == 0x19)
-                {
-                    /* writable integer array */
-                    longptr_temp = (long *) variables[variable_id];
-                    stack[stack_ptr - 1] = longptr_temp[index];
-                }
-                else if ((attributes[variable_id] & 0x1f) == 0x1c)
-                {
-                    /* read-only integer array */
-                    long_temp = variables[variable_id] + (4L * index);
-                    stack[stack_ptr - 1] = GET_DWORD(long_temp);
-                }
-                else
-                {
-                    status = JBIC_BOUNDS_ERROR;
-                }
-            }
-            break;
-
-        case 0x59: /* PSHA */
-            /*
-            *   Push Boolean array
-            *   ...argument 0 is variable ID
-            *   ...stack 0 is count
-            *   ...stack 1 is array index
-            */
-            IF_CHECK_STACK(2)
-            {
-                variable_id = (unsigned int) args[0];
-
-                /* check that variable is a Boolean array */
-                if ((attributes[variable_id] & 0x18) != 0x08)
-                {
-                    status = JBIC_BOUNDS_ERROR;
-                }
-                else
-                {
-                    charptr_temp = (unsigned char *) variables[variable_id];
-
-                    /* pop the count (number of bits to copy) */
-                    count = (unsigned int) stack[--stack_ptr];
-
-                    /* pop the array index */
-                    index = (unsigned int) stack[stack_ptr - 1];
-
-                    if (version > 0)
-                    {
-                        /* stack 0 = array right index */
-                        /* stack 1 = array left index */
-                        count = 1 + count - index;
-                    }
-
-                    if ((count < 1) || (count > 32))
-                    {
-                        status = JBIC_BOUNDS_ERROR;
-                    }
-                    else
-                    {
-#if PORT==DOS
-                        if ((attributes[variable_id] & 0x1e) == 0x0e)
-                        {
-                            /* initialized compressed Boolean array */
-                            jbi_uncompress_page(variable_id,
-                                (int) (stack[stack_ptr - 1] >> 16), version);
-                            charptr_temp = jbi_aca_out_buffer;
-                        }
-#endif
-                        long_temp = 0L;
-
-                        for (i = 0; i < count; ++i)
-                        {
-                            if (charptr_temp[(i + index) >> 3] &
-                                (1 << ((i + index) & 7)))
-                            {
-                                long_temp |= (1L << i);
-                            }
-                        }
-
-                        stack[stack_ptr - 1] = long_temp;
-                    }
-                }
-            }
-            break;
-
-        case 0x5A: /* DYNA */
-            /*
-            *   Dynamically change size of array
-            *   ...argument 0 is variable ID
-            *   ...stack 0 is new size
-            */
-            IF_CHECK_STACK(1)
-            {
-                variable_id = (unsigned int) args[0];
-                long_temp = stack[--stack_ptr];
-
-                if (long_temp > variable_size[variable_id])
-                {
-                    variable_size[variable_id] = long_temp;
-
-                    if (attributes[variable_id] & 0x10)
-                    {
-                        /* allocate integer array */
-                        long_temp *= 4;
-                    }
-                    else
-                    {
-                        /* allocate Boolean array */
-                        long_temp = (long_temp + 7) >> 3;
-                    }
-
-                    /*
-                    *   If the buffer was previously allocated, free it
-                    */
-                    if ((attributes[variable_id] & 0x80) &&
-                        (variables[variable_id] != (addr_t) NULL))
-                    {
-                        jbi_free((void *) variables[variable_id]);
-                        variables[variable_id] = (addr_t) NULL;
-                    }
-
-                    /*
-                    *   Allocate a new buffer of the requested size
-                    */
-                    variables[variable_id] = (addr_t)
-                        jbi_malloc((unsigned int) long_temp);
-
-                    if (variables[variable_id] == (addr_t) NULL)
-                    {
-                        status = JBIC_OUT_OF_MEMORY;
-                    }
-                    else
-                    {
-                        /*
-                        *   Set the attribute bit to indicate that this buffer
-                        *   was dynamically allocated and should be freed later
-                        */
-                        attributes[variable_id] |= 0x80;
-
-                        /* zero out memory */
-                        count = (unsigned int)
-                            ((variable_size[variable_id] + 7L) / 8L);
-                        charptr_temp = (unsigned char *)
-                            (variables[variable_id]);
-                        for (index = 0; index < count; ++index)
-                        {
-                            charptr_temp[index] = 0;
-                        }
-                    }
-                }
-            }
-            break;
-
-        case 0x5B: /* EXPR */
-            bad_opcode = 1;
-            break;
-
-        case 0x5C: /* EXPV */
-            /*
-            *   Export Boolean array
-            *   ...argument 0 is string ID
-            *   ...stack 0 is variable ID
-            *   ...stack 1 is array right index
-            *   ...stack 2 is array left index
-            */
-            IF_CHECK_STACK(3)
-            {
-                if (version == 0)
-                {
-                    /* EXPV is not supported in JBC 1.0 */
-                    bad_opcode = 1;
-                    break;
-                }
-#if PORT==DOS
-                name_id = args[0];
-                for (j = 0; j < 32; ++j)
-                {
-                    name[j] = GET_BYTE(string_table + name_id + j);
-                }
-                name[32] = '\0';
-#else
-                name = (char *) &program[string_table + args[0]];
-#endif
-                variable_id = (unsigned int) stack[--stack_ptr];
-                long_index = stack[--stack_ptr];    /* right index */
-                long_index2 = stack[--stack_ptr];   /* left index */
-
-                if (long_index > long_index2)
-                {
-                    /* reverse indices not supported */
-                    status = JBIC_BOUNDS_ERROR;
-                    break;
-                }
-
-                long_count = 1 + long_index2 - long_index;
-
-                charptr_temp = (unsigned char *) variables[variable_id];
-                charptr_temp2 = NULL;
-
-#if PORT==DOS
-                if ((attributes[variable_id] & 0x1e) == 0x0e)
-                {
-                    /* initialized compressed Boolean array */
-                    jbi_uncompress_page(variable_id,
-                        (int) (long_index >> 16), version);
-                    charptr_temp = jbi_aca_out_buffer;
-                    long_index &= 0x0000FFFF;
-                }
-#endif
-
-                if ((long_index & 7L) != 0)
-                {
-                    charptr_temp2 = jbi_malloc((unsigned int)
-                        ((long_count + 7L) / 8L));
-                    if (charptr_temp2 == NULL)
-                    {
-                        status = JBIC_OUT_OF_MEMORY;
-                        break;
-                    }
-                    else
-                    {
-                        long k = long_index;
-                        for (i = 0; i < (unsigned int) long_count; ++i)
-                        {
-                            if (charptr_temp[k >> 3] & (1 << (k & 7)))
-                            {
-                                charptr_temp2[i >> 3] |= (1 << (i & 7));
-                            }
-                            else
-                            {
-                                charptr_temp2[i >> 3] &= ~(1 << (i & 7));
-                            }
-
-                            ++k;
-                        }
-                        charptr_temp = charptr_temp2;
-                    }
-                }
-                else if (long_index != 0)
-                {
-                    charptr_temp = &charptr_temp[long_index >> 3];
-                }
-
-                jbi_export_boolean_array(name, charptr_temp, long_count);
-
-                /* free allocated buffer */
-                if (((long_index & 7L) != 0) && (charptr_temp2 != NULL))
-                {
-                    jbi_free(charptr_temp2);
-                }
-            }
-            break;
-
-        case 0x80: /* COPY */
-            /*
-            *   Array copy
-            *   ...argument 0 is dest ID
-            *   ...argument 1 is source ID
-            *   ...stack 0 is count
-            *   ...stack 1 is dest index
-            *   ...stack 2 is source index
-            */
-            IF_CHECK_STACK(3)
-            {
-                long copy_count = stack[--stack_ptr];
-                long copy_index = stack[--stack_ptr];
-                long copy_index2 = stack[--stack_ptr];
-                long destleft;
-                long src_count;
-                long dest_count;
-                int src_reverse = 0;
-                int dest_reverse = 0;
-
-                reverse = 0;
-
-                if (version > 0)
-                {
-                    /* stack 0 = source right index */
-                    /* stack 1 = source left index */
-                    /* stack 2 = destination right index */
-                    /* stack 3 = destination left index */
-                    destleft = stack[--stack_ptr];
-
-                    if (copy_count > copy_index)
-                    {
-                        src_reverse = 1;
-                        reverse = 1;
-                        src_count = 1 + copy_count - copy_index;
-                        /* copy_index = source start index */
-                    }
-                    else
-                    {
-                        src_count = 1 + copy_index - copy_count;
-                        copy_index = copy_count;    /* source start index */
-                    }
-
-                    if (copy_index2 > destleft)
-                    {
-                        dest_reverse = 1;
-                        reverse = !reverse;
-                        dest_count = 1 + copy_index2 - destleft;
-                        copy_index2 = destleft; /* destination start index */
-                    }
-                    else
-                    {
-                        dest_count = 1 + destleft - copy_index2;
-                        /* copy_index2 = destination start index */
-                    }
-
-                    copy_count = (src_count < dest_count) ? src_count : dest_count;
-
-                    if ((src_reverse || dest_reverse) &&
-                        (src_count != dest_count))
-                    {
-                        /* If either the source or destination is reversed, */
-                        /* we can't tolerate a length mismatch, because we  */
-                        /* "left justify" the arrays when copying.  This    */
-                        /* won't work correctly with reversed arrays.       */
-                        status = JBIC_BOUNDS_ERROR;
-                    }
-                }
-
-                count = (unsigned int) copy_count;
-                index = (unsigned int) copy_index;
-                index2 = (unsigned int) copy_index2;
-
-                /*
-                *   If destination is a read-only array, allocate a buffer
-                *   and convert it to a writable array
-                */
-                variable_id = (unsigned int) args[1];
-                if ((version > 0) && ((attributes[variable_id] & 0x9c) == 0x0c))
-                {
-                    /*
-                    *   Allocate a writable buffer for this array
-                    */
-                    long_temp = (variable_size[variable_id] + 7L) >> 3L;
-                    charptr_temp2 = (unsigned char *) variables[variable_id];
-                    charptr_temp = jbi_malloc((unsigned int) long_temp);
-                    variables[variable_id] = (addr_t) charptr_temp;
-
-                    if (variables[variable_id] == (addr_t) NULL)
-                    {
-                        status = JBIC_OUT_OF_MEMORY;
-                        break;
-                    }
-                    else
-                    {
-                        /* zero the buffer */
-                        for (long_index = 0L;
-                            long_index < long_temp;
-                            ++long_index)
-                        {
-                            charptr_temp[long_index] = 0;
-                        }
-
-                        /* copy previous contents into buffer */
-                        for (long_index = 0L;
-                            long_index < variable_size[variable_id];
-                            ++long_index)
-                        {
-#if PORT==DOS
-                            if ((attributes[variable_id] & 0x02) &&
-                                ((long_index & 0x0000FFFF) == 0L))
-                            {
-                                /* initialized compressed Boolean array */
-                                jbi_uncompress_page(variable_id,
-                                    (int) (long_index >> 16), version);
-                                charptr_temp = jbi_aca_out_buffer;
-                                long_index2 = long_index & 0xFFFF;
-                            }
-#else
-                            long_index2 = long_index;
-#endif
-
-                            if (charptr_temp2[long_index2 >> 3] &
-                                (1 << (long_index2 & 7)))
-                            {
-                                charptr_temp[long_index >> 3] |=
-                                    (1 << (long_index & 7));
-                            }
-                        }
-
-                        /* set bit 7 - buffer was dynamically allocated */
-                        attributes[variable_id] |= 0x80;
-
-                        /* clear bit 2 - variable is writable */
-                        attributes[variable_id] &= ~0x04;
-                        attributes[variable_id] |= 0x01;
-                    }
-                }
-
-#if PORT==DOS
-                /* for 16-bit version, allow writing in allocated buffers */
-                if ((version > 0) &&
-                    ((attributes[variable_id] & 0x9c) == 0x8c))
-                {
-                    attributes[variable_id] &= ~0x04;
-                    attributes[variable_id] |= 0x01;
-                }
-#endif
-
-                charptr_temp = (unsigned char *) variables[args[1]];
-                charptr_temp2 = (unsigned char *) variables[args[0]];
-
-#if PORT==DOS
-                variable_id = (unsigned int) args[0];
-                if ((attributes[variable_id] & 0x1e) == 0x0e)
-                {
-                    /* initialized compressed Boolean array */
-                    jbi_uncompress_page(variable_id,
-                        (int) (copy_index >> 16), version);
-                    charptr_temp2 = jbi_aca_out_buffer;
-                }
-#endif
-
-                /* check that destination is a writable Boolean array */
-                if ((attributes[args[1]] & 0x1c) != 0x08)
-                {
-                    status = JBIC_BOUNDS_ERROR;
-                    break;
-                }
-
-                if (count < 1)
-                {
-                    status = JBIC_BOUNDS_ERROR;
-                }
-                else
-                {
-                    if (reverse)
-                    {
-                        index2 += (count - 1);
-                    }
-
-                    for (i = 0; i < count; ++i)
-                    {
-                        if (charptr_temp2[index >> 3] & (1 << (index & 7)))
-                        {
-                            charptr_temp[index2 >> 3] |= (1 << (index2 & 7));
-                        }
-                        else
-                        {
-                            charptr_temp[index2 >> 3] &=
-                                ~(unsigned int) (1 << (index2 & 7));
-                        }
-                        ++index;
-                        if (reverse) --index2; else ++index2;
-                    }
-                }
-            }
-            break;
-
-        case 0x81: /* REVA */
-            /*
-            *   ARRAY COPY reversing bit order
-            *   ...argument 0 is dest ID
-            *   ...argument 1 is source ID
-            *   ...stack 0 is dest index
-            *   ...stack 1 is source index
-            *   ...stack 2 is count
-            */
-            bad_opcode = 1;
-            break;
-
-        case 0x82: /* DSC  */
-        case 0x83: /* ISC  */
-            /*
-            *   DRSCAN with capture
-            *   IRSCAN with capture
-            *   ...argument 0 is scan data variable ID
-            *   ...argument 1 is capture variable ID
-            *   ...stack 0 is capture index
-            *   ...stack 1 is scan data index
-            *   ...stack 2 is count
-            */
-            IF_CHECK_STACK(3)
-            {
-                long scan_right, scan_left;
-                long capture_count = 0;
-                long scan_count = 0;
-                long capture_index = stack[--stack_ptr];
-                long scan_index = stack[--stack_ptr];
-                if (version > 0)
-                {
-                    /* stack 0 = capture right index */
-                    /* stack 1 = capture left index */
-                    /* stack 2 = scan right index */
-                    /* stack 3 = scan left index */
-                    /* stack 4 = count */
-                    scan_right = stack[--stack_ptr];
-                    scan_left = stack[--stack_ptr];
-                    capture_count = 1 + scan_index - capture_index;
-                    scan_count = 1 + scan_left - scan_right;
-                    scan_index = scan_right;
-                }
-                long_count = stack[--stack_ptr];
-
-                /*
-                *   If capture array is read-only, allocate a buffer
-                *   and convert it to a writable array
-                */
-                variable_id = (unsigned int) args[1];
-                if ((version > 0) && ((attributes[variable_id] & 0x9c) == 0x0c))
-                {
-                    /*
-                    *   Allocate a writable buffer for this array
-                    */
-                    long_temp = (variable_size[variable_id] + 7L) >> 3L;
-                    charptr_temp2 = (unsigned char *) variables[variable_id];
-                    charptr_temp = jbi_malloc((unsigned int) long_temp);
-                    variables[variable_id] = (addr_t) charptr_temp;
-
-                    if (variables[variable_id] == (addr_t) NULL)
-                    {
-                        status = JBIC_OUT_OF_MEMORY;
-                        break;
-                    }
-                    else
-                    {
-                        /* zero the buffer */
-                        for (long_index = 0L;
-                            long_index < long_temp;
-                            ++long_index)
-                        {
-                            charptr_temp[long_index] = 0;
-                        }
-
-                        /* copy previous contents into buffer */
-                        for (long_index = 0L;
-                            long_index < variable_size[variable_id];
-                            ++long_index)
-                        {
-#if PORT==DOS
-                            if ((attributes[variable_id] & 0x02) &&
-                                ((long_index & 0x0000FFFF) == 0L))
-                            {
-                                /* initialized compressed Boolean array */
-                                jbi_uncompress_page(variable_id,
-                                    (int) (long_index >> 16), version);
-                                charptr_temp = jbi_aca_out_buffer;
-                                long_index2 = long_index & 0xFFFF;
-                            }
-#else
-                            long_index2 = long_index;
-#endif
-
-                            if (charptr_temp2[long_index2 >> 3] &
-                                (1 << (long_index2 & 7)))
-                            {
-                                charptr_temp[long_index >> 3] |=
-                                    (1 << (long_index & 7));
-                            }
-                        }
-
-                        /* set bit 7 - buffer was dynamically allocated */
-                        attributes[variable_id] |= 0x80;
-
-                        /* clear bit 2 - variable is writable */
-                        attributes[variable_id] &= ~0x04;
-                        attributes[variable_id] |= 0x01;
-                    }
-                }
-
-#if PORT==DOS
-                /* for 16-bit version, allow writing in allocated buffers */
-                if ((version > 0) &&
-                    ((attributes[variable_id] & 0x9c) == 0x8c))
-                {
-                    attributes[variable_id] &= ~0x04;
-                    attributes[variable_id] |= 0x01;
-                }
-#endif
-
-                charptr_temp = (unsigned char *) variables[args[0]];
-                charptr_temp2 = (unsigned char *) variables[args[1]];
-
-#if PORT==DOS
-                variable_id = (unsigned int) args[0];
-                if ((attributes[variable_id] & 0x1e) == 0x0e)
-                {
-                    /* initialized compressed Boolean array */
-                    jbi_uncompress_page(variable_id,
-                        (int) (scan_index >> 16), version);
-                    scan_index &= 0x0000ffff;
-                    charptr_temp = jbi_aca_out_buffer;
-                }
-#endif
-
-                if ((version > 0) &&
-                    ((long_count > capture_count) || (long_count > scan_count)))
-                {
-                    status = JBIC_BOUNDS_ERROR;
-                }
-
-                /* check that capture array is a writable Boolean array */
-                if ((attributes[args[1]] & 0x1c) != 0x08)
-                {
-                    status = JBIC_BOUNDS_ERROR;
-                }
-
-                if (status == JBIC_SUCCESS)
-                {
-                    if (opcode == 0x82) /* DSC */
-                    {
-                        status = jbi_swap_dr((unsigned int) long_count,
-                            charptr_temp, (unsigned long) scan_index,
-                            charptr_temp2, (unsigned int) capture_index);
-                    }
-                    else /* ISC */
-                    {
-                        status = jbi_swap_ir((unsigned int) long_count,
-                            charptr_temp, (unsigned int) scan_index,
-                            charptr_temp2, (unsigned int) capture_index);
-                    }
-                }
-            }
-            break;
-
-        case 0x84: /* WAIT */
-            /*
-            *   WAIT
-            *   ...argument 0 is wait state
-            *   ...argument 1 is end state
-            *   ...stack 0 is cycles
-            *   ...stack 1 is microseconds
-            */
-            IF_CHECK_STACK(2)
-            {
-                long_temp = stack[--stack_ptr];
-
-                if (long_temp != 0L)
-                {
-                    status = jbi_do_wait_cycles(long_temp, (unsigned int) args[0]);
-                }
-
-                long_temp = stack[--stack_ptr];
-
-                if ((status == JBIC_SUCCESS) && (long_temp != 0L))
-                {
-                    status = jbi_do_wait_microseconds(long_temp, (unsigned int) args[0]);
-                }
-
-                if ((status == JBIC_SUCCESS) && (args[1] != args[0]))
-                {
-                    status = jbi_goto_jtag_state((unsigned int) args[1]);
-                }
-
-                if (version > 0)
-                {
-                    --stack_ptr;    /* throw away MAX cycles */
-                    --stack_ptr;    /* throw away MAX microseconds */
-                }
-            }
-            break;
-
-        case 0x85: /* VS   */
-            /*
-            *   VECTOR
-            *   ...argument 0 is dir data variable ID
-            *   ...argument 1 is scan data variable ID
-            *   ...stack 0 is dir array index
-            *   ...stack 1 is scan array index
-            *   ...stack 2 is count
-            */
-            bad_opcode = 1;
-            break;
-
-        case 0xC0: /* CMPA */
-            /*
-            *   Array compare
-            *   ...argument 0 is source 1 ID
-            *   ...argument 1 is source 2 ID
-            *   ...argument 2 is mask ID
-            *   ...stack 0 is source 1 index
-            *   ...stack 1 is source 2 index
-            *   ...stack 2 is mask index
-            *   ...stack 3 is count
-            */
-            IF_CHECK_STACK(4)
-            {
-                long a, b;
-                unsigned char *source1 = (unsigned char *) variables[args[0]];
-                unsigned char *source2 = (unsigned char *) variables[args[1]];
-                unsigned char *mask    = (unsigned char *) variables[args[2]];
-                unsigned long index1 = stack[--stack_ptr];
-                unsigned long index2 = stack[--stack_ptr];
-                unsigned long mask_index = stack[--stack_ptr];
-                long_count = stack[--stack_ptr];
-
-                if (version > 0)
-                {
-                    /* stack 0 = source 1 right index */
-                    /* stack 1 = source 1 left index */
-                    /* stack 2 = source 2 right index */
-                    /* stack 3 = source 2 left index */
-                    /* stack 4 = mask right index */
-                    /* stack 5 = mask left index */
-                    long mask_right = stack[--stack_ptr];
-                    long mask_left = stack[--stack_ptr];
-                    a = 1 + index2 - index1; /* source 1 count */
-                    b = 1 + long_count - mask_index; /* source 2 count */
-                    a = (a < b) ? a : b;
-                    b = 1 + mask_left - mask_right; /* mask count */
-                    a = (a < b) ? a : b;
-                    index2 = mask_index;    /* source 2 start index */
-                    mask_index = mask_right;    /* mask start index */
-                    long_count = a;
-                }
-
-                long_temp = 1L;
-
-                if (long_count < 1)
-                {
-                    status = JBIC_BOUNDS_ERROR;
-                }
-                else
-                {
-#if PORT==DOS
-                    variable_id = (unsigned int) args[0];
-                    if ((attributes[variable_id] & 0x1e) == 0x0e)
-                    {
-                        jbi_uncompress_page(variable_id,
-                            (int) (index1 >> 16), version);
-                        index1 &= 0x0000ffff;
-                        source1 = jbi_aca_out_buffer;
-                    }
-
-                    variable_id = (unsigned int) args[1];
-                    if ((attributes[variable_id] & 0x1e) == 0x0e)
-                    {
-                        jbi_uncompress_page(variable_id,
-                            (int) (index2 >> 16), version);
-                        index2 &= 0x0000ffff;
-                        source2 = jbi_aca_out_buffer;
-                    }
-#endif
-                    count = (unsigned int) long_count;
-
-                    for (i = 0; i < count; ++i)
-                    {
-                        if (mask[mask_index >> 3] & (1 << (mask_index & 7)))
-                        {
-                            a = source1[index1 >> 3] & (1 << (index1 & 7))
-                                ? 1 : 0;
-                            b = source2[index2 >> 3] & (1 << (index2 & 7))
-                                ? 1 : 0;
-
-                            if (a != b) long_temp = 0L; /* failure */
-                        }
-                        ++index1;
-                        ++index2;
-                        ++mask_index;
-                    }
-                }
-
-                stack[stack_ptr++] = long_temp;
-            }
-            break;
-
-        case 0xC1: /* VSC  */
-            /*
-            *   VECTOR with capture
-            *   ...argument 0 is dir data variable ID
-            *   ...argument 1 is scan data variable ID
-            *   ...argument 2 is capture variable ID
-            *   ...stack 0 is capture index
-            *   ...stack 1 is scan data index
-            *   ...stack 2 is dir data index
-            *   ...stack 3 is count
-            */
-            bad_opcode = 1;
-            break;
-
-        default:
-            /*
-            *   Unrecognized opcode -- ERROR!
-            */
-            bad_opcode = 1;
-            break;
-        }
-
-        if (bad_opcode)
-        {
-            status = JBIC_ILLEGAL_OPCODE;
-        }
-
-        if ((stack_ptr < 0) || (stack_ptr >= JBI_STACK_SIZE))
-        {
-            status = JBIC_STACK_OVERFLOW;
-        }
-
-        if (status != JBIC_SUCCESS)
-        {
-            done = 1;
-            *error_address = (long) (opcode_address - code_section);
-        }
-    }
-    jbi_dbg(DEBUG_DETAIL, "debug_cnt(total): 0x%lx\n", debug_cnt);
-
-    jbi_dbg(DEBUG_NOISY, "jbi_free_jtag_padding_buffers\n");
-    jbi_free_jtag_padding_buffers(reset_jtag);
-
-    /*
-    *   Free all dynamically allocated arrays
-    */
-    jbi_dbg(DEBUG_NOISY, "jbi_free_attributes\n");
-    if ((attributes != NULL) && (variables != NULL))
-    {
-        for (i = 0; i < (unsigned int) symbol_count; ++i)
-        {
-            if ((attributes[i] & 0x80) && (variables[i] != (addr_t) NULL)
-                && (variables[i] != (addr_t) 1))
-            {
-                jbi_free((void *) variables[i]);
-            }
-        }
-    }
-
-    if (variables != NULL) jbi_free(variables);
-
-    if (variable_size != NULL) jbi_free(variable_size);
-
-    if (attributes != NULL) jbi_free(attributes);
-
-    if (proc_attributes != NULL) jbi_free(proc_attributes);
-
-    jbi_dbg(DEBUG_NOISY, "return status %d\n", status);
-    kfree(message_buffer);
-    return (status);
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-JBI_RETURN_TYPE jbi_get_note
-(
-    PROGRAM_PTR program,
-    long program_size,
-    long *offset,
-    char *key,
-    char *value,
-    int length
-)
-
-/*                                                                          */
-/*  Description:    Gets key and value of NOTE fields in the JBC file.      */
-/*                  Can be called in two modes:  if offset pointer is NULL, */
-/*                  then the function searches for note fields which match  */
-/*                  the key string provided.  If offset is not NULL, then   */
-/*                  the function finds the next note field of any key,      */
-/*                  starting at the offset specified by the offset pointer. */
-/*                                                                          */
-/*  Returns:        JBIC_SUCCESS for success, else appropriate error code   */
-/*                                                                          */
-/****************************************************************************/
-{
-    JBI_RETURN_TYPE status = JBIC_UNEXPECTED_END;
-    unsigned long note_strings = 0L;
-    unsigned long note_table = 0L;
-    unsigned long note_count = 0L;
-    unsigned long first_word = 0L;
-    int version = 0;
-    int delta = 0;
-    char *key_ptr;
-    char *value_ptr;
-    int i;
-
-#if PORT==DOS
-    int count = 0;
-    int done = 0;
-    long long_index = 0;
-    char key_buffer[256];
-    char value_buffer[256];
-
-    jbi_program = program;
-#endif
-
-    /*
-    *   Read header information
-    */
-    if (program_size > 52L)
-    {
-        first_word    = GET_DWORD(0);
-        version = (int) (first_word & 1L);
-        delta = version * 8;
-
-        note_strings  = GET_DWORD(8 + delta);
-        note_table    = GET_DWORD(12 + delta);
-        note_count    = GET_DWORD(44 + (2 * delta));
-    }
-
-    if ((first_word != 0x4A414D00L) && (first_word != 0x4A414D01L))
-    {
-        status = JBIC_IO_ERROR;
-    }
-    else if (note_count > 0L)
-    {
-        if (offset == NULL)
-        {
-            /*
-            *   We will search for the first note with a specific key, and
-            *   return only the value
-            */
-            for (i = 0; (i < (int) note_count) && (status != JBIC_SUCCESS); ++i)
-            {
-#if PORT==DOS
-                done = 0;
-                count = 0;
-                long_index = note_strings + GET_DWORD(note_table + (8 * i));
-                while ((count < 255) && !done)
-                {
-                    key_buffer[count] = GET_BYTE(long_index);
-                    if (key_buffer[count] == '\0') done = 1;
-                    ++long_index;
-                    ++count;
-                }
-                key_buffer[255] = '\0';
-                key_ptr = key_buffer;
-#else
-                key_ptr = (char *) &program[note_strings +
-                    GET_DWORD(note_table + (8 * i))];
-#endif
-                if ((key != NULL) && (jbi_stricmp(key, key_ptr) == 0))
-                {
-                    status = JBIC_SUCCESS;
-
-#if PORT==DOS
-                    done = 0;
-                    count = 0;
-                    long_index = note_strings + GET_DWORD(note_table + (8 * i) + 4);
-                    while ((count < 255) && !done)
-                    {
-                        value_buffer[count] = GET_BYTE(long_index);
-                        if (value_buffer[count] == '\0') done = 1;
-                        ++long_index;
-                        ++count;
-                    }
-                    value_buffer[255] = '\0';
-                    value_ptr = value_buffer;
-#else
-                    value_ptr = (char *) &program[note_strings +
-                        GET_DWORD(note_table + (8 * i) + 4)];
-#endif
-
-                    if (value != NULL)
-                    {
-                        jbi_strncpy(value, value_ptr, length);
-                    }
-                }
-            }
-        }
-        else
-        {
-            /*
-            *   We will search for the next note, regardless of the key, and
-            *   return both the value and the key
-            */
-
-            i = (int) *offset;
-
-            if ((i >= 0) && (i < (int) note_count))
-            {
-                status = JBIC_SUCCESS;
-
-                if (key != NULL)
-                {
-#if PORT==DOS
-                    done = 0;
-                    count = 0;
-                    long_index = note_strings +
-                        GET_DWORD(note_table + (8 * i));
-
-                    while ((count < length) && !done)
-                    {
-                        key[count] = GET_BYTE(long_index);
-                        if (key[count] == '\0') done = 1;
-                        ++long_index;
-                        ++count;
-                    }
-#else
-                    jbi_strncpy(key, (char *) &program[note_strings +
-                        GET_DWORD(note_table + (8 * i))], length);
-#endif
-                }
-
-                if (value != NULL)
-                {
-#if PORT==DOS
-                    done = 0;
-                    count = 0;
-                    long_index = note_strings +
-                        GET_DWORD(note_table + (8 * i) + 4);
-
-                    while ((count < length) && !done)
-                    {
-                        value[count] = GET_BYTE(long_index);
-                        if (value[count] == '\0') done = 1;
-                        ++long_index;
-                        ++count;
-                    }
-#else
-                    jbi_strncpy(value, (char *) &program[note_strings +
-                        GET_DWORD(note_table + (8 * i) + 4)], length);
-#endif
-                }
-
-                *offset = i + 1;
-            }
-        }
-    }
-
-    return (status);
-}
-
-/****************************************************************************/
-/*                                                                          */
-
-JBI_RETURN_TYPE jbi_check_crc
-(
-    PROGRAM_PTR program,
-    long program_size,
-    unsigned short *expected_crc,
-    unsigned short *actual_crc
-)
-
-/*                                                                          */
-/*  Description:    This function reads the entire input file and computes  */
-/*                  the CRC of everything up to the CRC field.              */
-/*                                                                          */
-/*  Returns:        JBIC_SUCCESS for success, JBIC_CRC_ERROR for failure    */
-/*                                                                          */
-/****************************************************************************/
-{
-    JBI_RETURN_TYPE status = JBIC_SUCCESS;
-    unsigned short local_expected, local_actual, shift_reg = 0xffff;
-    int bit, feedback;
-    unsigned char databyte;
-    unsigned long i;
-    unsigned long crc_section = 0L;
-    unsigned long first_word = 0L;
-    int version = 0;
-    int delta = 0;
-
-#if PORT==DOS
-    jbi_program = program;
-#endif
-
-    if (program_size > 52L)
-    {
-        first_word  = GET_DWORD(0);
-        version = (int) (first_word & 1L);
-        delta = version * 8;
-
-        crc_section = GET_DWORD(32 + delta);
-    }
-
-    if ((first_word != 0x4A414D00L) && (first_word != 0x4A414D01L))
-    {
-        status = JBIC_IO_ERROR;
-    }
-
-    if (crc_section >= (unsigned long) program_size)
-    {
-        status = JBIC_IO_ERROR;
-    }
-
-    if (status == JBIC_SUCCESS)
-    {
-        local_expected = (unsigned short) GET_WORD(crc_section);
-        if (expected_crc != NULL) *expected_crc = local_expected;
-
-        for (i = 0; i < crc_section; ++i)
-        {
-            databyte = GET_BYTE(i);
-            for (bit = 0; bit < 8; bit++)   /* compute for each bit */
-            {
-                feedback = (databyte ^ shift_reg) & 0x01;
-                shift_reg >>= 1;    /* shift the shift register */
-                if (feedback) shift_reg ^= 0x8408;  /* invert selected bits */
-                databyte >>= 1;     /* get the next bit of input_byte */
-            }
-        }
-
-        local_actual = (unsigned short) ~shift_reg;
-        if (actual_crc != NULL) *actual_crc = local_actual;
-
-        if (local_expected != local_actual)
-        {
-            status = JBIC_CRC_ERROR;
-        }
-    }
-
-    return (status);
-}
-
-JBI_RETURN_TYPE jbi_get_file_info
-(
-    PROGRAM_PTR program,
-    long program_size,
-    int *format_version,
-    int *action_count,
-    int *procedure_count
-)
-{
-    JBI_RETURN_TYPE status = JBIC_IO_ERROR;
-    unsigned long first_word = 0;
-    int version = 0;
-
-#if PORT==DOS
-    jbi_program = program;
-#endif
-
-    /*
-    *   Read header information
-    */
-    if (program_size > 52L)
-    {
-        first_word = GET_DWORD(0);
-
-        if ((first_word == 0x4A414D00L) || (first_word == 0x4A414D01L))
-        {
-            status = JBIC_SUCCESS;
-
-            version = (int) (first_word & 1L);
-            *format_version = version + 1;
-
-            if (version > 0)
-            {
-                *action_count = (int) GET_DWORD(48);
-                *procedure_count = (int) GET_DWORD(52);
-            }
-        }
-
-    }
-
-    return (status);
-}
-
-JBI_RETURN_TYPE jbi_get_action_info
-(
-    PROGRAM_PTR program,
-    long program_size,
-    int index,
-    char **name,
-    char **description,
-    JBI_PROCINFO **procedure_list
-)
-{
-    JBI_RETURN_TYPE status = JBIC_IO_ERROR;
-    JBI_PROCINFO *procptr = NULL;
-    JBI_PROCINFO *tmpptr = NULL;
-    unsigned long first_word = 0L;
-    unsigned long action_table = 0L;
-    unsigned long proc_table = 0L;
-    unsigned long string_table = 0L;
-    unsigned long note_strings = 0L;
-    unsigned long action_count = 0L;
-    unsigned long proc_count = 0L;
-    unsigned long act_name_id = 0L;
-    unsigned long act_desc_id = 0L;
-    unsigned long act_proc_id = 0L;
-    unsigned long act_proc_name = 0L;
-    unsigned char act_proc_attribute = 0;
-
-#if PORT==DOS
-    int i, length;
-    jbi_program = program;
-#endif
-
-    /*
-    *   Read header information
-    */
-    if (program_size > 52L)
-    {
-        first_word = GET_DWORD(0);
-
-        if (first_word == 0x4A414D01L)
-        {
-            action_table = GET_DWORD(4);
-            proc_table   = GET_DWORD(8);
-            string_table = GET_DWORD(12);
-            note_strings = GET_DWORD(16);
-            action_count = GET_DWORD(48);
-            proc_count   = GET_DWORD(52);
-
-            if (index < (int) action_count)
-            {
-                act_name_id = GET_DWORD(action_table + (12 * index));
-                act_desc_id = GET_DWORD(action_table + (12 * index) + 4);
-                act_proc_id = GET_DWORD(action_table + (12 * index) + 8);
-
-#if PORT==DOS
-                length = 0;
-                while (GET_BYTE(string_table + act_name_id + length) != 0) ++length;
-                *name = jbi_malloc(length + 1);
-                if (*name == NULL)
-                {
-                    status = JBIC_OUT_OF_MEMORY;
-                }
-                else
-                {
-                    for (i = 0; i < length; ++i)
-                    {
-                        (*name)[i] = GET_BYTE(string_table + act_name_id + i);
-                    }
-                    (*name)[length] = '\0';
-                }
-#else
-                *name = (char *) &program[string_table + act_name_id];
-#endif
-
-                if (act_desc_id < (note_strings - string_table))
-                {
-#if PORT==DOS
-                    length = 0;
-                    while (GET_BYTE(string_table + act_desc_id + length) != 0) ++length;
-                    *description = jbi_malloc(length + 1);
-                    if (*description == NULL)
-                    {
-                        status = JBIC_OUT_OF_MEMORY;
-                    }
-                    else
-                    {
-                        for (i = 0; i < length; ++i)
-                        {
-                            (*description)[i] = GET_BYTE(string_table + act_desc_id + i);
-                        }
-                        (*description)[length] = '\0';
-                    }
-#else
-                    *description = (char *) &program[string_table + act_desc_id];
-#endif
-                }
-
-                do
-                {
-                    act_proc_name = GET_DWORD(proc_table + (13 * act_proc_id));
-                    act_proc_attribute = (unsigned char)
-                        (GET_BYTE(proc_table + (13 * act_proc_id) + 8) & 0x03);
-
-                    procptr = (JBI_PROCINFO *) jbi_malloc(sizeof(JBI_PROCINFO));
-
-                    if (procptr == NULL)
-                    {
-                        status = JBIC_OUT_OF_MEMORY;
-                    }
-                    else
-                    {
-#if PORT==DOS
-                        length = 0;
-                        while (GET_BYTE(string_table + act_proc_name + length) != 0) ++length;
-                        procptr->name = jbi_malloc(length + 1);
-                        if (procptr->name == NULL)
-                        {
-                            status = JBIC_OUT_OF_MEMORY;
-                        }
-                        else
-                        {
-                            for (i = 0; i < length; ++i)
-                            {
-                                procptr->name[i] =
-                                    GET_BYTE(string_table + act_proc_name + i);
-                            }
-                            procptr->name[length] = '\0';
-                        }
-#else
-                        procptr->name = (char *)
-                            &program[string_table + act_proc_name];
-#endif
-                        procptr->attributes = act_proc_attribute;
-                        procptr->next = NULL;
-
-                        /* add record to end of linked list */
-                        if (*procedure_list == NULL)
-                        {
-                            *procedure_list = procptr;
-                        }
-                        else
-                        {
-                            tmpptr = *procedure_list;
-                            while (tmpptr->next != NULL) tmpptr = tmpptr->next;
-                            tmpptr->next = procptr;
-                        }
-                    }
-
-                    act_proc_id =
-                        GET_DWORD(proc_table + (13 * act_proc_id) + 4);
-                }
-                while ((act_proc_id != 0) && (act_proc_id < proc_count));
-            }
-        }
-
-    }
-
-    return (status);
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbiport.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbiport.h
deleted file mode 100644
index 28669dc81ff6..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbiport.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/****************************************************************************/
-/*                                                                          */
-/*  Module:        jbiport.h                                                */
-/*                                                                          */
-/*                 Copyright (C) Altera Corporation 2000-2001               */
-/*                                                                          */
-/*  Description:   Defines porting macros                                   */
-/*                                                                          */
-/****************************************************************************/
-
-#ifndef INC_JBIPORT_H
-#define INC_JBIPORT_H
-
-/*
-*  PORT defines the target platform: DOS, WINDOWS, UNIX, or EMBEDDED
-*
-*  PORT = DOS      means a 16-bit DOS console-mode application
-*
-*  PORT = WINDOWS  means a 32-bit WIN32 console-mode application for
-*                  Windows 95, 98, 2000, ME or NT.  On NT this will use the
-*                  DeviceIoControl() API to access the Parallel Port.
-*
-*  PORT = UNIX     means any UNIX system.  BitBlaster access is support via
-*                  the standard ANSI system calls open(), read(), write().
-*                  The ByteBlaster is not supported.
-*
-*  PORT = EMBEDDED means all DOS, WINDOWS, and UNIX code is excluded.
-*                  Remaining code supports 16 and 32-bit compilers.
-*                  Additional porting steps may be necessary. See readme
-*                  file for more details.
-*/
-
-#define DOS      2
-#define WINDOWS  3
-#define UNIX     4
-#define EMBEDDED 5
-
-#define PORT EMBEDDED
-
-#ifndef PORT
-/* change this line to build a different port */
-#define PORT WINDOWS
-#endif
-
-#endif /* INC_JBIPORT_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbistub.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbistub.c
deleted file mode 100644
index 396c92caca2b..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbistub.c
+++ /dev/null
@@ -1,2518 +0,0 @@
-/****************************************************************************/
-/*                                                                          */
-/*  Module:         jbistub.c                                               */
-/*                                                                          */
-/*                  Copyright (C) Altera Corporation 1997-2001              */
-/*                                                                          */
-/*  Description:    Jam STAPL ByteCode Player main source file              */
-/*                                                                          */
-/*                  Supports Altera ByteBlaster hardware download cable     */
-/*                  on Windows 95 and Windows NT operating systems.         */
-/*                  (A device driver is required for Windows NT.)           */
-/*                                                                          */
-/*                  Also supports BitBlaster hardware download cable on     */
-/*                  Windows 95, Windows NT, and UNIX platforms.             */
-/*                                                                          */
-/*  Revisions:      1.1 fixed control port initialization for ByteBlaster   */
-/*                  2.0 added support for STAPL bytecode format, added code */
-/*                      to get printer port address from Windows registry   */
-/*                  2.1 improved messages, fixed delay-calibration bug in   */
-/*                      16-bit DOS port, added support for "alternative     */
-/*                      cable X", added option to control whether to reset  */
-/*                      the TAP after execution, moved porting macros into  */
-/*                      jbiport.h                                           */
-/*                  2.2 added support for static memory                     */
-/*                      fixed /W4 warnings                                  */
-/*                                                                          */
-/****************************************************************************/
-
-#ifndef NO_ALTERA_STDIO
-#define NO_ALTERA_STDIO
-#endif
-
-#if 0
-#if ( _MSC_VER >= 800 )
-#pragma warning(disable:4115)
-#pragma warning(disable:4201)
-#pragma warning(disable:4214)
-#pragma warning(disable:4514)
-#endif
-#endif
-
-#include "jbiport.h"
-
-#if PORT == WINDOWS
-#include <windows.h>
-#else
-typedef int BOOL;
-typedef unsigned char BYTE;
-typedef unsigned short WORD;
-#if PORT == EMBEDDED
-typedef unsigned int DWORD;
-#else
-typedef unsigned long DWORD;
-#endif
-#define TRUE 1
-#define FALSE 0
-#endif
-
-#if PORT != EMBEDDED
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <io.h>
-#include <fcntl.h>
-#include <process.h>
-#endif
-
-#include <jbi.h>
-
-#include "jbiexprt.h"
-#include "jbistub.h"
-
-#if defined(USE_STATIC_MEMORY)
-    #define N_STATIC_MEMORY_KBYTES ((unsigned int) USE_STATIC_MEMORY)
-    #define N_STATIC_MEMORY_BYTES (N_STATIC_MEMORY_KBYTES * 1024)
-    #define POINTER_ALIGNMENT sizeof(DWORD)
-#else /* USE_STATIC_MEMORY */
-    /* #include <malloc.h> */
-    #define POINTER_ALIGNMENT sizeof(BYTE)
-#endif /* USE_STATIC_MEMORY */
-
-#if PORT != EMBEDDED
-#include <time.h>
-#include <conio.h>
-#include <ctype.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#endif
-
-#if PORT == DOS
-#include <bios.h>
-#endif
-
-int jbi_debug_level = DEBUG_NONE;
-static long jbi_delay_us = 0, jbi_delay_count = 0, jbi_peak_us = 0;
-
-void __jbi_jtag_udelay(unsigned long us)
-{
-    udelay(us);
-}
-void jbi_jtag_udelay(unsigned long us) __attribute__((weak, alias("__jbi_jtag_udelay")));
-
-#if PORT == WINDOWS
-#define PGDC_IOCTL_GET_DEVICE_INFO_PP 0x00166A00L
-#define PGDC_IOCTL_READ_PORT_PP       0x00166A04L
-#define PGDC_IOCTL_WRITE_PORT_PP      0x0016AA08L
-#define PGDC_IOCTL_PROCESS_LIST_PP    0x0016AA1CL
-#define PGDC_READ_INFO                0x0a80
-#define PGDC_READ_PORT                0x0a81
-#define PGDC_WRITE_PORT               0x0a82
-#define PGDC_PROCESS_LIST             0x0a87
-#define PGDC_HDLC_NTDRIVER_VERSION    2
-#define PORT_IO_BUFFER_SIZE           256
-#endif
-
-#if PORT == WINDOWS
-#ifdef __BORLANDC__
-/* create dummy inp() and outp() functions for Borland 32-bit compile */
-WORD inp(WORD address) { address = address; return(0); }
-void outp(WORD address, WORD data) { address = address; data = data; }
-#else
-#pragma intrinsic (inp, outp)
-#endif
-#endif
-
-/*
-*   For Borland C compiler (16-bit), set the stack size
-*/
-#if PORT == DOS
-#ifdef __BORLANDC__
-extern unsigned int _stklen = 50000;
-#endif
-#endif
-
-/************************************************************************
-*
-*   Global variables
-*/
-
-/* file buffer for Jam STAPL ByteCode input file */
-#if PORT == DOS
-unsigned char **file_buffer = NULL;
-#else
-unsigned char *file_buffer = NULL;
-#endif
-long file_pointer = 0L;
-long file_length = 0L;
-
-/* delay count for one millisecond delay */
-long one_ms_delay = 0L;
-
-/* serial port interface available on all platforms */
-BOOL jtag_hardware_initialized = FALSE;
-char *serial_port_name = NULL;
-BOOL specified_com_port = FALSE;
-int com_port = -1;
-void initialize_jtag_hardware(void);
-void close_jtag_hardware(void);
-
-#if defined(USE_STATIC_MEMORY)
-    unsigned char static_memory_heap[N_STATIC_MEMORY_BYTES] = { 0 };
-#endif /* USE_STATIC_MEMORY */
-
-#if defined(USE_STATIC_MEMORY) || defined(MEM_TRACKER)
-    unsigned int n_bytes_allocated = 0;
-#endif /* USE_STATIC_MEMORY || MEM_TRACKER */
-
-#if defined(MEM_TRACKER)
-    unsigned int peak_memory_usage = 0;
-    unsigned int peak_allocations = 0;
-    unsigned int n_allocations = 0;
-#if defined(USE_STATIC_MEMORY)
-    unsigned int n_bytes_not_recovered = 0;
-#endif /* USE_STATIC_MEMORY */
-    const DWORD BEGIN_GUARD = 0x01234567;
-    const DWORD END_GUARD = 0x76543210;
-#endif /* MEM_TRACKER */
-
-#if PORT == WINDOWS || PORT == DOS
-/* parallel port interface available on PC only */
-BOOL specified_lpt_port = FALSE;
-BOOL specified_lpt_addr = FALSE;
-int lpt_port = 1;
-int initial_lpt_ctrl = 0;
-WORD lpt_addr = 0x3bc;
-WORD lpt_addr_table[3] = { 0x3bc, 0x378, 0x278 };
-BOOL alternative_cable_l = FALSE;
-BOOL alternative_cable_x = FALSE;
-void write_byteblaster(int port, int data);
-int read_byteblaster(int port);
-#endif
-
-#if PORT==WINDOWS
-#ifndef __BORLANDC__
-WORD lpt_addresses_from_registry[4] = { 0 };
-#endif
-#endif
-
-#if PORT == WINDOWS
-/* variables to manage cached I/O under Windows NT */
-BOOL windows_nt = FALSE;
-int port_io_count = 0;
-HANDLE nt_device_handle = INVALID_HANDLE_VALUE;
-struct PORT_IO_LIST_STRUCT
-{
-    USHORT command;
-    USHORT data;
-} port_io_buffer[PORT_IO_BUFFER_SIZE];
-extern void flush_ports(void);
-BOOL initialize_nt_driver(void);
-#endif
-
-/* function prototypes to allow forward reference */
-extern void delay_loop(long count);
-
-/*
-*   This structure stores information about each available vector signal
-*/
-struct VECTOR_LIST_STRUCT
-{
-    char *signal_name;
-    int  hardware_bit;
-    int  vector_index;
-};
-
-struct VECTOR_LIST_STRUCT vector_list[] =
-{
-    /* add a record here for each vector signal */
-    { "", 0, -1 }
-};
-
-#define VECTOR_SIGNAL_COUNT ((int)(sizeof(vector_list)/sizeof(vector_list[0])))
-
-BOOL verbose = FALSE;
-
-/************************************************************************
-*
-*   Customized interface functions for Jam STAPL ByteCode Player I/O:
-*
-*   jbi_jtag_io()
-*   jbi_message()
-*   jbi_delay()
-*/
-
-int jbi_jtag_io(int tms, int tdi, int read_tdo)
-{
-#if PORT == WINDOWS || PORT == DOS
-    int data = 0;
-#endif
-    int tdo = 0;
-    int i = 0;
-    int result = 0;
-    char ch_data = 0;
-
-    if (!jtag_hardware_initialized)
-    {
-        initialize_jtag_hardware();
-        jtag_hardware_initialized = TRUE;
-    }
-
-    if (specified_com_port)
-    {
-        ch_data = (char)
-            ((tdi ? 0x01 : 0) | (tms ? 0x02 : 0) | 0x60);
-
-        write(com_port, &ch_data, 1);
-
-        if (read_tdo)
-        {
-            ch_data = 0x7e;
-            write(com_port, &ch_data, 1);
-            for (i = 0; (i < 100) && (result != 1); ++i)
-            {
-                result = read(com_port, &ch_data, 1);
-            }
-            if (result == 1)
-            {
-                tdo = ch_data & 0x01;
-            }
-            else
-            {
-                fprintf(stderr, "Error:  BitBlaster not responding\n");
-            }
-        }
-
-        ch_data = (char)
-            ((tdi ? 0x01 : 0) | (tms ? 0x02 : 0) | 0x64);
-
-        write(com_port, &ch_data, 1);
-    }
-    else
-    {
-#if PORT == WINDOWS || PORT == DOS
-        data = (alternative_cable_l ? ((tdi ? 0x01 : 0) | (tms ? 0x04 : 0)) :
-               (alternative_cable_x ? ((tdi ? 0x01 : 0) | (tms ? 0x04 : 0) | 0x10) :
-               ((tdi ? 0x40 : 0) | (tms ? 0x02 : 0))));
-
-        write_byteblaster(0, data);
-
-        if (read_tdo)
-        {
-            tdo = read_byteblaster(1);
-            tdo = (alternative_cable_l ? ((tdo & 0x40) ? 1 : 0) :
-                  (alternative_cable_x ? ((tdo & 0x10) ? 1 : 0) :
-                  ((tdo & 0x80) ? 0 : 1)));
-        }
-
-        write_byteblaster(0, data | (alternative_cable_l ? 0x02 : (alternative_cable_x ? 0x02: 0x01)));
-
-        write_byteblaster(0, data);
-#elif PORT == EMBEDDED
-        /* Output variables TDI, TMS to the corresponding pin; As read_tdo, return the corresponding pin to the variable tdo */
-        tdo = jbi_jtag_io_(tms, tdi, read_tdo);
-#else
-        /* parallel port interface not available */
-        tdo = 0;
-#endif
-    }
-
-    return (tdo);
-}
-
-void jbi_message(char *message_text)
-{
-    puts(message_text);
-    puts("\n");
-    fflush(stdout);
-}
-
-void jbi_export_integer(char *key, long value)
-{
-    if (verbose)
-    {
-        printf("Export: key = \"%s\", value = %ld\n", key, value);
-        fflush(stdout);
-    }
-}
-
-#define HEX_LINE_CHARS 72
-#define HEX_LINE_BITS (HEX_LINE_CHARS * 4)
-
-char conv_to_hex(unsigned long value)
-{
-    char c;
-
-    if (value > 9)
-    {
-        c = (char) (value + ('A' - 10));
-    }
-    else
-    {
-        c = (char) (value + '0');
-    }
-
-    return (c);
-}
-
-void jbi_export_boolean_array(char *key, unsigned char *data, long count)
-{
-    char string[HEX_LINE_CHARS + 1];
-    long i, offset;
-    unsigned long size, line, lines, linebits, value, j, k;
-
-    if (verbose)
-    {
-        if (count > HEX_LINE_BITS)
-        {
-            printf("Export: key = \"%s\", %ld bits, value = HEX\n", key, count);
-            lines = (count + (HEX_LINE_BITS - 1)) / HEX_LINE_BITS;
-
-            for (line = 0; line < lines; ++line)
-            {
-                if (line < (lines - 1))
-                {
-                    linebits = HEX_LINE_BITS;
-                    size = HEX_LINE_CHARS;
-                    offset = count - ((line + 1) * HEX_LINE_BITS);
-                }
-                else
-                {
-                    linebits = count - ((lines - 1) * HEX_LINE_BITS);
-                    size = (linebits + 3) / 4;
-                    offset = 0L;
-                }
-
-                string[size] = '\0';
-                j = size - 1;
-                value = 0;
-
-                for (k = 0; k < linebits; ++k)
-                {
-                    i = k + offset;
-                    if (data[i >> 3] & (1 << (i & 7))) value |= (1 << (i & 3));
-                    if ((i & 3) == 3)
-                    {
-                        string[j] = conv_to_hex(value);
-                        value = 0;
-                        --j;
-                    }
-                }
-                if ((k & 3) > 0) string[j] = conv_to_hex(value);
-
-                printf("%s\n", string);
-            }
-
-            fflush(stdout);
-        }
-        else
-        {
-            size = (count + 3) / 4;
-            string[size] = '\0';
-            j = size - 1;
-            value = 0;
-
-            for (i = 0; i < count; ++i)
-            {
-                if (data[i >> 3] & (1 << (i & 7))) value |= (1 << (i & 3));
-                if ((i & 3) == 3)
-                {
-                    string[j] = conv_to_hex(value);
-                    value = 0;
-                    --j;
-                }
-            }
-            if ((i & 3) > 0) string[j] = conv_to_hex(value);
-
-            printf("Export: key = \"%s\", %ld bits, value = HEX %s\n",
-                key, count, string);
-            fflush(stdout);
-        }
-    }
-}
-
-void jbi_delay(long microseconds)
-{
-    if (jbi_peak_us < microseconds) {
-        jbi_peak_us = microseconds;
-    }
-    jbi_delay_us += microseconds;
-    jbi_delay_count++;
-
-#if PORT == WINDOWS
-    /* if Windows NT, flush I/O cache buffer before delay loop */
-    if (windows_nt && (port_io_count > 0)) flush_ports();
-#endif
-
-#if PORT == EMBEDDED
-    udelay(microseconds);
-#else
-    delay_loop(microseconds *
-        ((one_ms_delay / 1000L) + ((one_ms_delay % 1000L) ? 1 : 0)));
-#endif
-}
-
-int jbi_vector_map
-(
-    int signal_count,
-    char **signals
-)
-{
-    int signal, vector, ch_index, diff;
-    int matched_count = 0;
-    char l, r;
-
-    for (vector = 0; (vector < VECTOR_SIGNAL_COUNT); ++vector)
-    {
-        vector_list[vector].vector_index = -1;
-    }
-
-    for (signal = 0; signal < signal_count; ++signal)
-    {
-        diff = 1;
-        for (vector = 0; (diff != 0) && (vector < VECTOR_SIGNAL_COUNT);
-            ++vector)
-        {
-            if (vector_list[vector].vector_index == -1)
-            {
-                ch_index = 0;
-                do
-                {
-                    l = signals[signal][ch_index];
-                    r = vector_list[vector].signal_name[ch_index];
-                    diff = (((l >= 'a') && (l <= 'z')) ? (l - ('a' - 'A')) : l)
-                        - (((r >= 'a') && (r <= 'z')) ? (r - ('a' - 'A')) : r);
-                    ++ch_index;
-                }
-                while ((diff == 0) && (l != '\0') && (r != '\0'));
-
-                if (diff == 0)
-                {
-                    vector_list[vector].vector_index = signal;
-                    ++matched_count;
-                }
-            }
-        }
-    }
-
-    return (matched_count);
-}
-
-int jbi_vector_io
-(
-    int signal_count,
-    long *dir_vect,
-    long *data_vect,
-    long *capture_vect
-)
-{
-    int signal, vector, bit;
-    int matched_count = 0;
-    int data = 0;
-    int mask = 0;
-    int dir = 0;
-    int i = 0;
-    int result = 0;
-    char ch_data = 0;
-
-    if (!jtag_hardware_initialized)
-    {
-        initialize_jtag_hardware();
-        jtag_hardware_initialized = TRUE;
-    }
-
-    /*
-    *   Collect information about output signals
-    */
-    for (vector = 0; vector < VECTOR_SIGNAL_COUNT; ++vector)
-    {
-        signal = vector_list[vector].vector_index;
-
-        if ((signal >= 0) && (signal < signal_count))
-        {
-            bit = (1 << vector_list[vector].hardware_bit);
-
-            mask |= bit;
-            if (data_vect[signal >> 5] & (1L << (signal & 0x1f))) data |= bit;
-            if (dir_vect[signal >> 5] & (1L << (signal & 0x1f))) dir |= bit;
-
-            ++matched_count;
-        }
-    }
-
-    /*
-    *   Write outputs to hardware interface, if any
-    */
-    if (dir != 0)
-    {
-        if (specified_com_port)
-        {
-            ch_data = (char) (((data >> 6) & 0x01) | (data & 0x02) |
-                      ((data << 2) & 0x04) | ((data << 3) & 0x08) | 0x60);
-            write(com_port, &ch_data, 1);
-        }
-        else
-        {
-#if PORT == WINDOWS || PORT == DOS
-
-            write_byteblaster(0, data);
-
-#endif
-        }
-    }
-
-    /*
-    *   Read the input signals and save information in capture_vect[]
-    */
-    if ((dir != mask) && (capture_vect != NULL))
-    {
-        if (specified_com_port)
-        {
-            ch_data = 0x7e;
-            write(com_port, &ch_data, 1);
-            for (i = 0; (i < 100) && (result != 1); ++i)
-            {
-                result = read(com_port, &ch_data, 1);
-            }
-            if (result == 1)
-            {
-                data = ((ch_data << 7) & 0x80) | ((ch_data << 3) & 0x10);
-            }
-            else
-            {
-                fprintf(stderr, "Error:  BitBlaster not responding\n");
-            }
-        }
-        else
-        {
-#if PORT == WINDOWS || PORT == DOS
-
-            data = read_byteblaster(1) ^ 0x80; /* parallel port inverts bit 7 */
-
-#endif
-        }
-
-        for (vector = 0; vector < VECTOR_SIGNAL_COUNT; ++vector)
-        {
-            signal = vector_list[vector].vector_index;
-
-            if ((signal >= 0) && (signal < signal_count))
-            {
-                bit = (1 << vector_list[vector].hardware_bit);
-
-                if ((dir & bit) == 0)   /* if it is an input signal... */
-                {
-                    if (data & bit)
-                    {
-                        capture_vect[signal >> 5] |= (1L << (signal & 0x1f));
-                    }
-                    else
-                    {
-                        capture_vect[signal >> 5] &= ~(unsigned long)
-                            (1L << (signal & 0x1f));
-                    }
-                }
-            }
-        }
-    }
-
-    return (matched_count);
-}
-
-void *jbi_malloc(unsigned int size)
-{
-    unsigned int n_bytes_to_allocate =
-#if defined(USE_STATIC_MEMORY) || defined(MEM_TRACKER)
-        sizeof(unsigned int) +
-#endif /* USE_STATIC_MEMORY || MEM_TRACKER */
-#if defined(MEM_TRACKER)
-        (2 * sizeof(DWORD)) +
-#endif /* MEM_TRACKER */
-        (POINTER_ALIGNMENT * ((size + POINTER_ALIGNMENT - 1) / POINTER_ALIGNMENT));
-
-    unsigned char *ptr = 0;
-
-#if defined(MEM_TRACKER)
-    if ((n_bytes_allocated + n_bytes_to_allocate) > peak_memory_usage)
-    {
-        peak_memory_usage = n_bytes_allocated + n_bytes_to_allocate;
-    }
-    if ((n_allocations + 1) > peak_allocations)
-    {
-        peak_allocations = n_allocations + 1;
-    }
-#endif /* MEM_TRACKER */
-
-#if defined(USE_STATIC_MEMORY)
-    if ((n_bytes_allocated + n_bytes_to_allocate) <= N_STATIC_MEMORY_BYTES)
-    {
-        ptr = (&(static_memory_heap[n_bytes_allocated]));
-    }
-#else /* USE_STATIC_MEMORY */
-    ptr = (unsigned char *) malloc(n_bytes_to_allocate);
-#endif /* USE_STATIC_MEMORY */
-
-#if defined(USE_STATIC_MEMORY) || defined(MEM_TRACKER)
-    if (ptr != 0)
-    {
-        unsigned int i = 0;
-
-#if defined(MEM_TRACKER)
-        for (i = 0; i < sizeof(DWORD); ++i)
-        {
-            *ptr = (unsigned char) (BEGIN_GUARD >> (8 * i));
-            ++ptr;
-        }
-#endif /* MEM_TRACKER */
-
-        for (i = 0; i < sizeof(unsigned int); ++i)
-        {
-            *ptr = (unsigned char) (size >> (8 * i));
-            ++ptr;
-        }
-
-#if defined(MEM_TRACKER)
-        for (i = 0; i < sizeof(DWORD); ++i)
-        {
-            *(ptr + size + i) = (unsigned char) (END_GUARD >> (8 * i));
-            /* don't increment ptr */
-        }
-
-        ++n_allocations;
-#endif /* MEM_TRACKER */
-
-        n_bytes_allocated += n_bytes_to_allocate;
-    }
-#endif /* USE_STATIC_MEMORY || MEM_TRACKER */
-
-    jbi_dbg(DEBUG_MM, "malloc 0x%p(%d,%d)\n", ptr, size, n_bytes_to_allocate);
-
-    return ptr;
-}
-
-void jbi_free(void *ptr)
-{
-    jbi_dbg(DEBUG_MM, "free 0x%p\n", ptr);
-
-    if
-    (
-#if defined(MEM_TRACKER)
-        (n_allocations > 0) &&
-#endif /* MEM_TRACKER */
-        (ptr != 0)
-    )
-    {
-        unsigned char *tmp_ptr = (unsigned char *) ptr;
-
-#if defined(USE_STATIC_MEMORY) || defined(MEM_TRACKER)
-        unsigned int n_bytes_to_free = 0;
-        unsigned int i = 0;
-        unsigned int size = 0;
-#endif /* USE_STATIC_MEMORY || MEM_TRACKER */
-#if defined(MEM_TRACKER)
-        DWORD begin_guard = 0;
-        DWORD end_guard = 0;
-
-        tmp_ptr -= sizeof(DWORD);
-#endif /* MEM_TRACKER */
-#if defined(USE_STATIC_MEMORY) || defined(MEM_TRACKER)
-        tmp_ptr -= sizeof(unsigned int);
-#endif /* USE_STATIC_MEMORY || MEM_TRACKER */
-        ptr = tmp_ptr;
-
-#if defined(MEM_TRACKER)
-        for (i = 0; i < sizeof(DWORD); ++i)
-        {
-            begin_guard |= (((DWORD)(*tmp_ptr)) << (8 * i));
-            ++tmp_ptr;
-        }
-#endif /* MEM_TRACKER */
-
-#if defined(USE_STATIC_MEMORY) || defined(MEM_TRACKER)
-        for (i = 0; i < sizeof(unsigned int); ++i)
-        {
-            size |= (((unsigned int)(*tmp_ptr)) << (8 * i));
-            ++tmp_ptr;
-        }
-#endif /* USE_STATIC_MEMORY || MEM_TRACKER */
-
-#if defined(MEM_TRACKER)
-        tmp_ptr += size;
-
-        for (i = 0; i < sizeof(DWORD); ++i)
-        {
-            end_guard |= (((DWORD)(*tmp_ptr)) << (8 * i));
-            ++tmp_ptr;
-        }
-
-        if ((begin_guard != BEGIN_GUARD) || (end_guard != END_GUARD))
-        {
-            fprintf(stderr, "Error: memory corruption detected for allocation #%d... bad %s guard\n",
-                n_allocations, (begin_guard != BEGIN_GUARD) ? "begin" : "end");
-        }
-
-        --n_allocations;
-#endif /* MEM_TRACKER */
-
-#if defined(USE_STATIC_MEMORY) || defined(MEM_TRACKER)
-        n_bytes_to_free =
-#if defined(MEM_TRACKER)
-        (2 * sizeof(DWORD)) +
-#endif /* MEM_TRACKER */
-        sizeof(unsigned int) +
-        (POINTER_ALIGNMENT * ((size + POINTER_ALIGNMENT - 1) / POINTER_ALIGNMENT));
-#endif /* USE_STATIC_MEMORY || MEM_TRACKER */
-
-#if defined(USE_STATIC_MEMORY)
-        if ((((unsigned long) ptr - (unsigned long) static_memory_heap) + n_bytes_to_free) == (unsigned long) n_bytes_allocated)
-        {
-            n_bytes_allocated -= n_bytes_to_free;
-        }
-#if defined(MEM_TRACKER)
-        else
-        {
-            n_bytes_not_recovered += n_bytes_to_free;
-        }
-#endif /* MEM_TRACKER */
-#else /* USE_STATIC_MEMORY */
-#if defined(MEM_TRACKER)
-        n_bytes_allocated -= n_bytes_to_free;
-#endif /* MEM_TRACKER */
-        free(ptr);
-#endif /* USE_STATIC_MEMORY */
-    }
-#if defined(MEM_TRACKER)
-    else
-    {
-        if (ptr != 0)
-        {
-            fprintf(stderr, "Error: attempt to free unallocated memory\n");
-        }
-    }
-#endif /* MEM_TRACKER */
-}
-
-#if PORT == WINDOWS || PORT == DOS
-/************************************************************************
-*
-*   get_tick_count() -- Get system tick count in milliseconds
-*
-*   for DOS, use BIOS function _bios_timeofday()
-*   for WINDOWS use GetTickCount() function
-*   for UNIX use clock() system function
-*/
-DWORD get_tick_count(void)
-{
-    DWORD tick_count = 0L;
-
-#if PORT == WINDOWS
-    tick_count = GetTickCount();
-#elif PORT == DOS
-    _bios_timeofday(_TIME_GETCLOCK, (long *)&tick_count);
-    tick_count *= 55L;  /* convert to milliseconds */
-#else
-    /* assume clock() function returns microseconds */
-    tick_count = (DWORD) (clock() / 1000L);
-#endif
-
-    return (tick_count);
-}
-#endif
-
-#define DELAY_SAMPLES 10
-#define DELAY_CHECK_LOOPS 10000
-
-void calibrate_delay(void)
-{
-#if PORT == WINDOWS || PORT == DOS
-    int sample = 0;
-    int count = 0;
-    DWORD tick_count1 = 0L;
-    DWORD tick_count2 = 0L;
-#endif
-
-    one_ms_delay = 0L;
-
-#if PORT == WINDOWS || PORT == DOS
-    for (sample = 0; sample < DELAY_SAMPLES; ++sample)
-    {
-        count = 0;
-        tick_count1 = get_tick_count();
-        while ((tick_count2 = get_tick_count()) == tick_count1) {};
-        do { delay_loop(DELAY_CHECK_LOOPS); count++; } while
-            ((tick_count1 = get_tick_count()) == tick_count2);
-        one_ms_delay += ((DELAY_CHECK_LOOPS * (DWORD)count) /
-            (tick_count1 - tick_count2));
-    }
-
-    one_ms_delay /= DELAY_SAMPLES;
-#else
-    /* This is system-dependent!  Update this number for target system */
-    one_ms_delay = 1000L;
-#endif
-}
-
-char *error_text[] =
-{
-/* JBIC_SUCCESS            0 */ "success",
-/* JBIC_OUT_OF_MEMORY      1 */ "out of memory",
-/* JBIC_IO_ERROR           2 */ "file access error",
-/* JAMC_SYNTAX_ERROR       3 */ "syntax error",
-/* JBIC_UNEXPECTED_END     4 */ "unexpected end of file",
-/* JBIC_UNDEFINED_SYMBOL   5 */ "undefined symbol",
-/* JAMC_REDEFINED_SYMBOL   6 */ "redefined symbol",
-/* JBIC_INTEGER_OVERFLOW   7 */ "integer overflow",
-/* JBIC_DIVIDE_BY_ZERO     8 */ "divide by zero",
-/* JBIC_CRC_ERROR          9 */ "CRC mismatch",
-/* JBIC_INTERNAL_ERROR    10 */ "internal error",
-/* JBIC_BOUNDS_ERROR      11 */ "bounds error",
-/* JAMC_TYPE_MISMATCH     12 */ "type mismatch",
-/* JAMC_ASSIGN_TO_CONST   13 */ "assignment to constant",
-/* JAMC_NEXT_UNEXPECTED   14 */ "NEXT unexpected",
-/* JAMC_POP_UNEXPECTED    15 */ "POP unexpected",
-/* JAMC_RETURN_UNEXPECTED 16 */ "RETURN unexpected",
-/* JAMC_ILLEGAL_SYMBOL    17 */ "illegal symbol name",
-/* JBIC_VECTOR_MAP_FAILED 18 */ "vector signal name not found",
-/* JBIC_USER_ABORT        19 */ "execution cancelled",
-/* JBIC_STACK_OVERFLOW    20 */ "stack overflow",
-/* JBIC_ILLEGAL_OPCODE    21 */ "illegal instruction code",
-/* JAMC_PHASE_ERROR       22 */ "phase error",
-/* JAMC_SCOPE_ERROR       23 */ "scope error",
-/* JBIC_ACTION_NOT_FOUND  24 */ "action not found",
-};
-
-#define MAX_ERROR_CODE (int)(sizeof(error_text)/sizeof(error_text[0]))
-
-/************************************************************************/
-
-#if 0
-int main(int argc, char **argv)
-{
-    BOOL help = FALSE;
-    BOOL error = FALSE;
-    char *filename = NULL;
-    long offset = 0L;
-    long error_address = 0L;
-    JBI_RETURN_TYPE crc_result = JBIC_SUCCESS;
-    JBI_RETURN_TYPE exec_result = JBIC_SUCCESS;
-    unsigned short expected_crc = 0;
-    unsigned short actual_crc = 0;
-    char key[33] = {0};
-    char value[257] = {0};
-    int exit_status = 0;
-    int arg = 0;
-    int exit_code = 0;
-    int format_version = 0;
-    time_t start_time = 0;
-    time_t end_time = 0;
-    int time_delta = 0;
-    char *workspace = NULL;
-    char *action = NULL;
-    char *init_list[10];
-    int init_count = 0;
-    FILE *fp = NULL;
-    struct stat sbuf;
-    long workspace_size = 0;
-    char *exit_string = NULL;
-    int reset_jtag = 1;
-    int execute_program = 1;
-    int action_count = 0;
-    int procedure_count = 0;
-    int index = 0;
-    char *action_name = NULL;
-    char *description = NULL;
-    JBI_PROCINFO *procedure_list = NULL;
-    JBI_PROCINFO *procptr = NULL;
-
-    verbose = FALSE;
-
-    init_list[0] = NULL;
-
-    /* print out the version string and copyright message */
-    fprintf(stderr, "Jam STAPL ByteCode Player Version 2.2\nCopyright (C) 1998-2001 Altera Corporation\n\n");
-
-    for (arg = 1; arg < argc; arg++)
-    {
-#if PORT == UNIX
-        if (argv[arg][0] == '-')
-#else
-        if ((argv[arg][0] == '-') || (argv[arg][0] == '/'))
-#endif
-        {
-            switch(toupper(argv[arg][1]))
-            {
-            case 'A':               /* set action name */
-                if (action == NULL)
-                {
-                    action = &argv[arg][2];
-                }
-                else
-                {
-                    error = TRUE;
-                }
-                break;
-
-#if PORT == WINDOWS || PORT == DOS
-            case 'C':               /* Use alternative ISP download cable */
-                if(toupper(argv[arg][2]) == 'L')
-                    alternative_cable_l = TRUE;
-                else if(toupper(argv[arg][2]) == 'X')
-                    alternative_cable_x = TRUE;
-                break;
-#endif
-
-            case 'D':               /* initialization list */
-                if (argv[arg][2] == '"')
-                {
-                    init_list[init_count] = &argv[arg][3];
-                }
-                else
-                {
-                    init_list[init_count] = &argv[arg][2];
-                }
-                init_list[++init_count] = NULL;
-                break;
-
-#if PORT == WINDOWS || PORT == DOS
-            case 'P':               /* set LPT port address */
-                specified_lpt_port = TRUE;
-                if (sscanf(&argv[arg][2], "%d", &lpt_port) != 1) error = TRUE;
-                if ((lpt_port < 1) || (lpt_port > 3)) error = TRUE;
-                if (error)
-                {
-                    if (sscanf(&argv[arg][2], "%x", &lpt_port) == 1)
-                    {
-                        if ((lpt_port == 0x3bc) ||
-                            (lpt_port == 0x378) ||
-                            (lpt_port == 0x278))
-                        {
-                            error = FALSE;
-                            specified_lpt_addr = TRUE;
-                            lpt_addr = (WORD) lpt_port;
-                            lpt_port = 1;
-                        }
-                    }
-                }
-                break;
-#endif
-
-            case 'R':       /* don't reset the JTAG chain after use */
-                reset_jtag = 0;
-                break;
-
-            case 'S':               /* set serial port address */
-                serial_port_name = &argv[arg][2];
-                specified_com_port = TRUE;
-                break;
-
-            case 'M':               /* set memory size */
-                if (sscanf(&argv[arg][2], "%ld", &workspace_size) != 1)
-                    error = TRUE;
-                if (workspace_size == 0) error = TRUE;
-                break;
-
-            case 'H':               /* help */
-                help = TRUE;
-                break;
-
-            case 'V':               /* verbose */
-                verbose = TRUE;
-                break;
-
-            case 'I':               /* show info only, do not execute */
-                verbose = TRUE;
-                execute_program = 0;
-                break;
-
-            default:
-                error = TRUE;
-                break;
-            }
-        }
-        else
-        {
-            /* it's a filename */
-            if (filename == NULL)
-            {
-                filename = argv[arg];
-            }
-            else
-            {
-                /* error -- we already found a filename */
-                error = TRUE;
-            }
-        }
-
-        if (error)
-        {
-            fprintf(stderr, "Illegal argument: \"%s\"\n", argv[arg]);
-            help = TRUE;
-            error = FALSE;
-        }
-    }
-
-#if PORT == WINDOWS || PORT == DOS
-    if (specified_lpt_port && specified_com_port)
-    {
-        fprintf(stderr, "Error:  -s and -p options may not be used together\n\n");
-        help = TRUE;
-    }
-#endif
-
-    if (help || (filename == NULL))
-    {
-        fprintf(stderr, "Usage:  jbi [options] <filename>\n");
-        fprintf(stderr, "\nAvailable options:\n");
-        fprintf(stderr, "    -h          : show help message\n");
-        fprintf(stderr, "    -v          : show verbose messages\n");
-        fprintf(stderr, "    -i          : show file info only - does not execute any action\n");
-        fprintf(stderr, "    -a<action>  : specify an action name (Jam STAPL)\n");
-        fprintf(stderr, "    -d<var=val> : initialize variable to specified value (Jam 1.1)\n");
-        fprintf(stderr, "    -d<proc=1>  : enable optional procedure (Jam STAPL)\n");
-        fprintf(stderr, "    -d<proc=0>  : disable recommended procedure (Jam STAPL)\n");
-#if PORT == WINDOWS || PORT == DOS
-        fprintf(stderr, "    -p<port>    : parallel port number or address (for ByteBlaster)\n");
-        fprintf(stderr, "    -c<cable>   : alternative download cable compatibility: -cl or -cx\n");
-#endif
-        fprintf(stderr, "    -s<port>    : serial port name (for BitBlaster)\n");
-        fprintf(stderr, "    -r          : don't reset JTAG TAP after use\n");
-        exit_status = 1;
-    }
-    else if ((workspace_size > 0) &&
-        ((workspace = (char *) jbi_malloc((size_t) workspace_size)) == NULL))
-    {
-        fprintf(stderr, "Error: can't allocate memory (%d Kbytes)\n",
-            (int) (workspace_size / 1024L));
-        exit_status = 1;
-    }
-    else if (access(filename, 0) != 0)
-    {
-        fprintf(stderr, "Error: can't access file \"%s\"\n", filename);
-        exit_status = 1;
-    }
-    else
-    {
-        /* get length of file */
-        if (stat(filename, &sbuf) == 0) file_length = sbuf.st_size;
-
-        if ((fp = fopen(filename, "rb")) == NULL)
-        {
-            fprintf(stderr, "Error: can't open file \"%s\"\n", filename);
-            exit_status = 1;
-        }
-        else
-        {
-            /*
-            *   Read entire file into a buffer
-            */
-#if PORT == DOS
-            int pages = 1 + (int) (file_length >> 14L);
-            int page;
-            file_buffer = (unsigned char **) jbi_malloc(
-                (size_t) (pages * sizeof(char *)));
-
-            for (page = 0; page < pages; ++page)
-            {
-                /* allocate enough 16K blocks to store the file */
-                file_buffer[page] = (unsigned char *) jbi_malloc (0x4000);
-                if (file_buffer[page] == NULL)
-                {
-                    /* flag error and break out of loop */
-                    file_buffer = NULL;
-                    page = pages;
-                }
-            }
-#else
-            file_buffer = (unsigned char *) jbi_malloc((size_t) file_length);
-#endif
-
-            if (file_buffer == NULL)
-            {
-                fprintf(stderr, "Error: can't allocate memory (%d Kbytes)\n",
-                    (int) (file_length / 1024L));
-                exit_status = 1;
-            }
-            else
-            {
-#if PORT == DOS
-                int pages = 1 + (int) (file_length >> 14L);
-                int page;
-                size_t page_size = 0x4000;
-                for (page = 0; (page < pages) && (exit_status == 0); ++page)
-                {
-                    if (page == (pages - 1))
-                    {
-                        /* last page may not be full 16K bytes */
-                        page_size = (size_t) (file_length & 0x3fffL);
-                    }
-                    if (fread(file_buffer[page], 1, page_size, fp) != page_size)
-                    {
-                        fprintf(stderr, "Error reading file \"%s\"\n", filename);
-                        exit_status = 1;
-                    }
-                }
-#else
-                if (fread(file_buffer, 1, (size_t) file_length, fp) !=
-                    (size_t) file_length)
-                {
-                    fprintf(stderr, "Error reading file \"%s\"\n", filename);
-                    exit_status = 1;
-                }
-#endif
-            }
-
-            fclose(fp);
-        }
-
-        if (exit_status == 0)
-        {
-            /*
-            *   Get Operating System type
-            */
-#if PORT == WINDOWS
-            windows_nt = !(GetVersion() & 0x80000000);
-#endif
-
-            /*
-            *   Calibrate the delay loop function
-            */
-            calibrate_delay();
-
-            /*
-            *   Check CRC
-            */
-            crc_result = jbi_check_crc(file_buffer, file_length,
-                &expected_crc, &actual_crc);
-
-            if (verbose || (crc_result == JBIC_CRC_ERROR))
-            {
-                switch (crc_result)
-                {
-                case JBIC_SUCCESS:
-                    printf("CRC matched: CRC value = %04X\n", actual_crc);
-                    break;
-
-                case JBIC_CRC_ERROR:
-                    printf("CRC mismatch: expected %04X, actual %04X\n",
-                        expected_crc, actual_crc);
-                    break;
-
-                case JBIC_UNEXPECTED_END:
-                    printf("Expected CRC not found, actual CRC value = %04X\n",
-                        actual_crc);
-                    break;
-
-                case JBIC_IO_ERROR:
-                    printf("Error: File format is not recognized.\n");
-                    exit(1);
-                    break;
-
-                default:
-                    printf("CRC function returned error code %d\n", crc_result);
-                    break;
-                }
-            }
-
-            if (verbose)
-            {
-                /*
-                *   Display file format version
-                */
-                jbi_get_file_info(file_buffer, file_length,
-                    &format_version, &action_count, &procedure_count);
-
-                printf("File format is %s ByteCode format\n",
-                    (format_version == 2) ? "Jam STAPL" : "pre-standardized Jam 1.1");
-
-                /*
-                *   Dump out NOTE fields
-                */
-                while (jbi_get_note(file_buffer, file_length,
-                    &offset, key, value, 256) == 0)
-                {
-                    printf("NOTE \"%s\" = \"%s\"\n", key, value);
-                }
-
-                /*
-                *   Dump the action table
-                */
-                if ((format_version == 2) && (action_count > 0))
-                {
-                    printf("\nActions available in this file:\n");
-
-                    for (index = 0; index < action_count; ++index)
-                    {
-                        jbi_get_action_info(file_buffer, file_length,
-                            index, &action_name, &description, &procedure_list);
-
-                        if (description == NULL)
-                        {
-                            printf("%s\n", action_name);
-                        }
-                        else
-                        {
-                            printf("%s \"%s\"\n", action_name, description);
-                        }
-
-#if PORT == DOS
-                        if (action_name != NULL) jbi_free(action_name);
-                        if (description != NULL) jbi_free(description);
-#endif
-
-                        procptr = procedure_list;
-                        while (procptr != NULL)
-                        {
-                            if (procptr->attributes != 0)
-                            {
-                                printf("    %s (%s)\n", procptr->name,
-                                    (procptr->attributes == 1) ?
-                                    "optional" : "recommended");
-                            }
-
-#if PORT == DOS
-                            if (procptr->name != NULL) jbi_free(procptr->name);
-#endif
-
-                            procedure_list = procptr->next;
-                            jbi_free(procptr);
-                            procptr = procedure_list;
-                        }
-                    }
-
-                    /* add a blank line before execution messages */
-                    if (execute_program) printf("\n");
-                }
-            }
-
-            if (execute_program)
-            {
-                /*
-                *   Execute the Jam STAPL ByteCode program
-                */
-                time(&start_time);
-                exec_result = jbi_execute(file_buffer, file_length, workspace,
-                    workspace_size, action, init_list, reset_jtag,
-                    &error_address, &exit_code, &format_version);
-                time(&end_time);
-
-                if (exec_result == JBIC_SUCCESS)
-                {
-                    if (format_version == 2)
-                    {
-                        switch (exit_code)
-                        {
-                        case  0: exit_string = "Success"; break;
-                        case  1: exit_string = "Checking chain failure"; break;
-                        case  2: exit_string = "Reading IDCODE failure"; break;
-                        case  3: exit_string = "Reading USERCODE failure"; break;
-                        case  4: exit_string = "Reading UESCODE failure"; break;
-                        case  5: exit_string = "Entering ISP failure"; break;
-                        case  6: exit_string = "Unrecognized device"; break;
-                        case  7: exit_string = "Device revision is not supported"; break;
-                        case  8: exit_string = "Erase failure"; break;
-                        case  9: exit_string = "Device is not blank"; break;
-                        case 10: exit_string = "Device programming failure"; break;
-                        case 11: exit_string = "Device verify failure"; break;
-                        case 12: exit_string = "Read failure"; break;
-                        case 13: exit_string = "Calculating checksum failure"; break;
-                        case 14: exit_string = "Setting security bit failure"; break;
-                        case 15: exit_string = "Querying security bit failure"; break;
-                        case 16: exit_string = "Exiting ISP failure"; break;
-                        case 17: exit_string = "Performing system test failure"; break;
-                        default: exit_string = "Unknown exit code"; break;
-                        }
-                    }
-                    else
-                    {
-                        switch (exit_code)
-                        {
-                        case 0: exit_string = "Success"; break;
-                        case 1: exit_string = "Illegal initialization values"; break;
-                        case 2: exit_string = "Unrecognized device"; break;
-                        case 3: exit_string = "Device revision is not supported"; break;
-                        case 4: exit_string = "Device programming failure"; break;
-                        case 5: exit_string = "Device is not blank"; break;
-                        case 6: exit_string = "Device verify failure"; break;
-                        case 7: exit_string = "SRAM configuration failure"; break;
-                        default: exit_string = "Unknown exit code"; break;
-                        }
-                    }
-
-                    printf("Exit code = %d... %s\n", exit_code, exit_string);
-                }
-                else if ((format_version == 2) &&
-                    (exec_result == JBIC_ACTION_NOT_FOUND))
-                {
-                    if ((action == NULL) || (*action == '\0'))
-                    {
-                        printf("Error: no action specified for Jam STAPL file.\nProgram terminated.\n");
-                    }
-                    else
-                    {
-                        printf("Error: action \"%s\" is not supported for this Jam STAPL file.\nProgram terminated.\n", action);
-                    }
-                }
-                else if (exec_result < MAX_ERROR_CODE)
-                {
-                    printf("Error at address %ld: %s.\nProgram terminated.\n",
-                        error_address, error_text[exec_result]);
-                }
-                else
-                {
-                    printf("Unknown error code %ld\n", exec_result);
-                }
-
-                /*
-                *   Print out elapsed time
-                */
-                if (verbose)
-                {
-                    time_delta = (int) (end_time - start_time);
-                    printf("Elapsed time = %02u:%02u:%02u\n",
-                        time_delta / 3600,          /* hours */
-                        (time_delta % 3600) / 60,   /* minutes */
-                        time_delta % 60);           /* seconds */
-                }
-            }
-        }
-    }
-
-    if (jtag_hardware_initialized) close_jtag_hardware();
-
-    if (workspace != NULL) jbi_free(workspace);
-    if (file_buffer != NULL) jbi_free(file_buffer);
-
-#if defined(MEM_TRACKER)
-    if (verbose)
-    {
-#if defined(USE_STATIC_MEMORY)
-        fprintf(stdout, "Memory Usage Info: static memory size = %ud (%dKB)\n", N_STATIC_MEMORY_BYTES, N_STATIC_MEMORY_KBYTES);
-#endif /* USE_STATIC_MEMORY */
-        fprintf(stdout, "Memory Usage Info: peak memory usage = %ud (%dKB)\n", peak_memory_usage, (peak_memory_usage + 1023) / 1024);
-        fprintf(stdout, "Memory Usage Info: peak allocations = %d\n", peak_allocations);
-#if defined(USE_STATIC_MEMORY)
-        if ((n_bytes_allocated - n_bytes_not_recovered) != 0)
-        {
-            fprintf(stdout, "Memory Usage Info: bytes still allocated = %d (%dKB)\n", (n_bytes_allocated - n_bytes_not_recovered), ((n_bytes_allocated - n_bytes_not_recovered) + 1023) / 1024);
-        }
-#else /* USE_STATIC_MEMORY */
-        if (n_bytes_allocated != 0)
-        {
-            fprintf(stdout, "Memory Usage Info: bytes still allocated = %d (%dKB)\n", n_bytes_allocated, (n_bytes_allocated + 1023) / 1024);
-        }
-#endif /* USE_STATIC_MEMORY */
-        if (n_allocations != 0)
-        {
-            fprintf(stdout, "Memory Usage Info: allocations not freed = %d\n", n_allocations);
-        }
-    }
-#endif /* MEM_TRACKER */
-
-    return (exit_status);
-}
-#endif
-
-#if PORT==WINDOWS
-#ifndef __BORLANDC__
-/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
-*
-*   SEARCH_DYN_DATA
-*
-*   Searches recursively in Windows 95/98 Registry for parallel port info
-*   under HKEY_DYN_DATA registry key.  Called by search_local_machine().
-*/
-void search_dyn_data
-(
-    char *dd_path,
-    char *hardware_key,
-    int lpt
-)
-{
-    DWORD index;
-    DWORD size;
-    DWORD type;
-    LONG result;
-    HKEY key;
-    int length;
-    WORD address;
-    char buffer[1024];
-    FILETIME last_write = {0};
-    WORD *word_ptr;
-    int i;
-
-    length = strlen(dd_path);
-
-    if (RegOpenKeyEx(
-        HKEY_DYN_DATA,
-        dd_path,
-        0L,
-        KEY_READ,
-        &key)
-        == ERROR_SUCCESS)
-    {
-        size = 1023;
-
-        if (RegQueryValueEx(
-            key,
-            "HardWareKey",
-            NULL,
-            &type,
-            (unsigned char *) buffer,
-            &size)
-            == ERROR_SUCCESS)
-        {
-            if ((type == REG_SZ) && (stricmp(buffer, hardware_key) == 0))
-            {
-                size = 1023;
-
-                if (RegQueryValueEx(
-                    key,
-                    "Allocation",
-                    NULL,
-                    &type,
-                    (unsigned char *) buffer,
-                    &size)
-                    == ERROR_SUCCESS)
-                {
-                    /*
-                    *   By "inspection", I have found five cases: size 32, 48,
-                    *   56, 60, and 80 bytes.  The port address seems to be
-                    *   located at different offsets in the buffer for these
-                    *   five cases, as shown below.  If a valid port address
-                    *   is not found, or the size is not one of these known
-                    *   sizes, then I search through the entire buffer and
-                    *   look for a value which is a valid port address.
-                    */
-
-                    word_ptr = (WORD *) buffer;
-
-                    if ((type == REG_BINARY) && (size == 32))
-                    {
-                        address = word_ptr[10];
-                    }
-                    else if ((type == REG_BINARY) && (size == 48))
-                    {
-                        address = word_ptr[18];
-                    }
-                    else if ((type == REG_BINARY) && (size == 56))
-                    {
-                        address = word_ptr[22];
-                    }
-                    else if ((type == REG_BINARY) && (size == 60))
-                    {
-                        address = word_ptr[24];
-                    }
-                    else if ((type == REG_BINARY) && (size == 80))
-                    {
-                        address = word_ptr[24];
-                    }
-                    else address = 0;
-
-                    /* if not found, search through entire buffer */
-                    i = 0;
-                    while ((i < (int) (size / 2)) &&
-                        (address != 0x278) &&
-                        (address != 0x27C) &&
-                        (address != 0x378) &&
-                        (address != 0x37C) &&
-                        (address != 0x3B8) &&
-                        (address != 0x3BC))
-                    {
-                        if ((word_ptr[i] == 0x278) ||
-                            (word_ptr[i] == 0x27C) ||
-                            (word_ptr[i] == 0x378) ||
-                            (word_ptr[i] == 0x37C) ||
-                            (word_ptr[i] == 0x3B8) ||
-                            (word_ptr[i] == 0x3BC))
-                        {
-                            address = word_ptr[i];
-                        }
-                        ++i;
-                    }
-
-                    if ((address == 0x278) ||
-                        (address == 0x27C) ||
-                        (address == 0x378) ||
-                        (address == 0x37C) ||
-                        (address == 0x3B8) ||
-                        (address == 0x3BC))
-                    {
-                        lpt_addresses_from_registry[lpt] = address;
-                    }
-                }
-            }
-        }
-
-        index = 0;
-
-        do
-        {
-            size = 1023;
-
-            result = RegEnumKeyEx(
-                key,
-                index++,
-                buffer,
-                &size,
-                NULL,
-                NULL,
-                NULL,
-                &last_write);
-
-            if (result == ERROR_SUCCESS)
-            {
-                dd_path[length] = '\\';
-                dd_path[length + 1] = '\0';
-                strcpy(&dd_path[length + 1], buffer);
-
-                search_dyn_data(dd_path, hardware_key, lpt);
-
-                dd_path[length] = '\0';
-            }
-        }
-        while (result == ERROR_SUCCESS);
-
-        RegCloseKey(key);
-    }
-}
-
-/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
-*
-*   SEARCH_LOCAL_MACHINE
-*
-*   Searches recursively in Windows 95/98 Registry for parallel port info
-*   under HKEY_LOCAL_MACHINE\Enum.  When parallel port is found, calls
-*   search_dyn_data() to get the port address.
-*/
-void search_local_machine
-(
-    char *lm_path,
-    char *dd_path
-)
-{
-    DWORD index;
-    DWORD size;
-    DWORD type;
-    LONG result;
-    HKEY key;
-    int length;
-    char buffer[1024];
-    FILETIME last_write = {0};
-
-    length = strlen(lm_path);
-
-    if (RegOpenKeyEx(
-        HKEY_LOCAL_MACHINE,
-        lm_path,
-        0L,
-        KEY_READ,
-        &key)
-        == ERROR_SUCCESS)
-    {
-        size = 1023;
-
-        if (RegQueryValueEx(
-            key,
-            "PortName",
-            NULL,
-            &type,
-            (unsigned char *) buffer,
-            &size)
-            == ERROR_SUCCESS)
-        {
-            if ((type == REG_SZ) &&
-                (size == 5) &&
-                (buffer[0] == 'L') &&
-                (buffer[1] == 'P') &&
-                (buffer[2] == 'T') &&
-                (buffer[3] >= '1') &&
-                (buffer[3] <= '4') &&
-                (buffer[4] == '\0'))
-            {
-                /* we found the entry in HKEY_LOCAL_MACHINE, now we need to */
-                /* find the corresponding entry under HKEY_DYN_DATA.  */
-                /* add 5 to lm_path to skip over "Enum" and backslash */
-                search_dyn_data(dd_path, &lm_path[5], (buffer[3] - '1'));
-            }
-        }
-
-        index = 0;
-
-        do
-        {
-            size = 1023;
-
-            result = RegEnumKeyEx(
-                key,
-                index++,
-                buffer,
-                &size,
-                NULL,
-                NULL,
-                NULL,
-                &last_write);
-
-            if (result == ERROR_SUCCESS)
-            {
-                lm_path[length] = '\\';
-                lm_path[length + 1] = '\0';
-                strcpy(&lm_path[length + 1], buffer);
-
-                search_local_machine(lm_path, dd_path);
-
-                lm_path[length] = '\0';
-            }
-        }
-        while (result == ERROR_SUCCESS);
-
-        RegCloseKey(key);
-    }
-}
-
-/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
-*
-*   GET_LPT_ADDRESSES_FROM_REGISTRY
-*
-*   Searches Win95/98 registry recursively to get I/O port addresses for
-*   parallel ports.
-*/
-void get_lpt_addresses_from_registry()
-{
-    char lm_path[1024];
-    char dd_path[1024];
-
-    strcpy(lm_path, "Enum");
-    strcpy(dd_path, "Config Manager");
-    search_local_machine(lm_path, dd_path);
-}
-#endif
-#endif
-
-void initialize_jtag_hardware()
-{
-    if (specified_com_port)
-    {
-        com_port = open(serial_port_name, O_RDWR);
-        if (com_port == -1)
-        {
-            fprintf(stderr, "Error: can't open serial port \"%s\"\n",
-                serial_port_name);
-        }
-        else
-        {
-            int i = 0, result = 0;
-            char data = 0;
-
-            data = 0x7e;
-            write(com_port, &data, 1);
-
-            for (i = 0; (i < 100) && (result != 1); ++i)
-            {
-                result = read(com_port, &data, 1);
-            }
-
-            if (result == 1)
-            {
-                data = 0x70; write(com_port, &data, 1); /* TDO echo off */
-                data = 0x72; write(com_port, &data, 1); /* auto LEDs off */
-                data = 0x74; write(com_port, &data, 1); /* ERROR LED off */
-                data = 0x76; write(com_port, &data, 1); /* DONE LED off */
-                data = 0x60; write(com_port, &data, 1); /* signals low */
-            }
-            else
-            {
-                fprintf(stderr, "Error: BitBlaster is not responding on %s\n",
-                    serial_port_name);
-                close(com_port);
-                com_port = -1;
-            }
-        }
-    }
-    else
-    {
-#if PORT == WINDOWS || PORT == DOS
-
-#if PORT == WINDOWS
-        if (windows_nt)
-        {
-            initialize_nt_driver();
-        }
-        else
-        {
-#ifdef __BORLANDC__
-            fprintf(stderr, "Error: parallel port access is not available\n");
-#else
-            if (!specified_lpt_addr)
-            {
-                get_lpt_addresses_from_registry();
-
-                lpt_addr = 0;
-
-                if (specified_lpt_port)
-                {
-                    lpt_addr = lpt_addresses_from_registry[lpt_port - 1];
-                }
-
-                if (lpt_addr == 0)
-                {
-                    if (lpt_addresses_from_registry[3] != 0)
-                        lpt_addr = lpt_addresses_from_registry[3];
-                    if (lpt_addresses_from_registry[2] != 0)
-                        lpt_addr = lpt_addresses_from_registry[2];
-                    if (lpt_addresses_from_registry[1] != 0)
-                        lpt_addr = lpt_addresses_from_registry[1];
-                    if (lpt_addresses_from_registry[0] != 0)
-                        lpt_addr = lpt_addresses_from_registry[0];
-                }
-
-                if (lpt_addr == 0)
-                {
-                    if (specified_lpt_port)
-                    {
-                        lpt_addr = lpt_addr_table[lpt_port - 1];
-                    }
-                    else
-                    {
-                        lpt_addr = lpt_addr_table[0];
-                    }
-                }
-            }
-            initial_lpt_ctrl = windows_nt ? 0x0c : read_byteblaster(2);
-#endif
-        }
-#endif
-
-#if PORT == DOS
-        /*
-        *   Read word at specific memory address to get the LPT port address
-        */
-        WORD *bios_address = (WORD *) 0x00400008;
-
-        if (!specified_lpt_addr)
-        {
-            lpt_addr = bios_address[lpt_port - 1];
-
-            if ((lpt_addr != 0x278) &&
-                (lpt_addr != 0x27c) &&
-                (lpt_addr != 0x378) &&
-                (lpt_addr != 0x37c) &&
-                (lpt_addr != 0x3b8) &&
-                (lpt_addr != 0x3bc))
-            {
-                lpt_addr = lpt_addr_table[lpt_port - 1];
-            }
-        }
-        initial_lpt_ctrl = read_byteblaster(2);
-#endif
-
-        /* set AUTO-FEED low to enable ByteBlaster (value to port inverted) */
-        /* set DIRECTION low for data output from parallel port */
-        write_byteblaster(2, (initial_lpt_ctrl | 0x02) & 0xDF);
-#endif
-    }
-}
-
-void close_jtag_hardware()
-{
-    if (specified_com_port)
-    {
-        if (com_port != -1) close(com_port);
-    }
-    else
-    {
-#if PORT == WINDOWS || PORT == DOS
-        /* set AUTO-FEED high to disable ByteBlaster */
-        write_byteblaster(2, initial_lpt_ctrl & 0xfd);
-
-#if PORT == WINDOWS
-        if (windows_nt && (nt_device_handle != INVALID_HANDLE_VALUE))
-        {
-            if (port_io_count > 0) flush_ports();
-
-            CloseHandle(nt_device_handle);
-        }
-#endif
-#endif
-    }
-}
-
-#if PORT == WINDOWS
-/**************************************************************************/
-/*                                                                        */
-
-BOOL initialize_nt_driver()
-
-/*                                                                        */
-/*  Uses CreateFile() to open a connection to the Windows NT device       */
-/*  driver.                                                               */
-/*                                                                        */
-/**************************************************************************/
-{
-    BOOL status = FALSE;
-
-    ULONG buffer[1];
-    ULONG returned_length = 0;
-    char nt_lpt_str[] = { '\\', '\\', '.', '\\',
-        'A', 'L', 'T', 'L', 'P', 'T', '1', '\0' };
-
-    nt_lpt_str[10] = (char) ('1' + (lpt_port - 1));
-
-    nt_device_handle = CreateFile(
-        nt_lpt_str,
-        GENERIC_READ | GENERIC_WRITE,
-        0,
-        NULL,
-        OPEN_EXISTING,
-        FILE_ATTRIBUTE_NORMAL,
-        NULL);
-
-    if (nt_device_handle == INVALID_HANDLE_VALUE)
-    {
-        fprintf(stderr,
-            "I/O error:  cannot open device %s\nCheck port number and device driver installation",
-            nt_lpt_str);
-    }
-    else
-    {
-        if (DeviceIoControl(
-            nt_device_handle,           /* Handle to device */
-            PGDC_IOCTL_GET_DEVICE_INFO_PP,  /* IO Control code */
-            (ULONG *)NULL,                  /* Buffer to driver. */
-            0,                              /* Length of buffer in bytes. */
-            &buffer,                        /* Buffer from driver. */
-            sizeof(ULONG),                  /* Length of buffer in bytes. */
-            &returned_length,               /* Bytes placed in data_buffer. */
-            NULL))                          /* Wait for operation to complete */
-        {
-            if (returned_length == sizeof(ULONG))
-            {
-                if (buffer[0] == PGDC_HDLC_NTDRIVER_VERSION)
-                {
-                    status = TRUE;
-                }
-                else
-                {
-                    fprintf(stderr,
-                        "I/O error:  device driver %s is not compatible\n(Driver version is %lu, expected version %lu.\n",
-                        nt_lpt_str,
-                        (unsigned long) buffer[0],
-                        (unsigned long) PGDC_HDLC_NTDRIVER_VERSION);
-                }
-            }
-            else
-            {
-                fprintf(stderr, "I/O error:  device driver %s is not compatible.\n",
-                    nt_lpt_str);
-            }
-        }
-
-        if (!status)
-        {
-            CloseHandle(nt_device_handle);
-            nt_device_handle = INVALID_HANDLE_VALUE;
-        }
-    }
-
-    if (!status)
-    {
-        /* error message already given */
-        exit(1);
-    }
-
-    return (status);
-}
-#endif
-
-#if PORT == WINDOWS || PORT == DOS
-/**************************************************************************/
-/*                                                                        */
-
-void write_byteblaster
-(
-    int port,
-    int data
-)
-
-/*                                                                        */
-/**************************************************************************/
-{
-#if PORT == WINDOWS
-    BOOL status = FALSE;
-
-    int returned_length = 0;
-    int buffer[2];
-
-    if (windows_nt)
-    {
-        /*
-        *   On Windows NT, access hardware through device driver
-        */
-        if (port == 0)
-        {
-            port_io_buffer[port_io_count].data = (USHORT) data;
-            port_io_buffer[port_io_count].command = PGDC_WRITE_PORT;
-            ++port_io_count;
-
-            if (port_io_count >= PORT_IO_BUFFER_SIZE) flush_ports();
-        }
-        else
-        {
-            if (port_io_count > 0) flush_ports();
-
-            buffer[0] = port;
-            buffer[1] = data;
-
-            status = DeviceIoControl(
-                nt_device_handle,           /* Handle to device */
-                PGDC_IOCTL_WRITE_PORT_PP,   /* IO Control code for write */
-                (ULONG *)&buffer,           /* Buffer to driver. */
-                2 * sizeof(int),            /* Length of buffer in bytes. */
-                (ULONG *)NULL,              /* Buffer from driver.  Not used. */
-                0,                          /* Length of buffer in bytes. */
-                (ULONG *)&returned_length,  /* Bytes returned.  Should be zero. */
-                NULL);                      /* Wait for operation to complete */
-
-            if ((!status) || (returned_length != 0))
-            {
-                fprintf(stderr, "I/O error:  Cannot access ByteBlaster hardware\n");
-                CloseHandle(nt_device_handle);
-                exit(1);
-            }
-        }
-    }
-    else
-#endif
-    {
-        /*
-        *   On Windows 95, access hardware directly
-        */
-        outp((WORD)(port + lpt_addr), (WORD)data);
-    }
-}
-
-/**************************************************************************/
-/*                                                                        */
-
-int read_byteblaster
-(
-    int port
-)
-
-/*                                                                        */
-/**************************************************************************/
-{
-    int data = 0;
-
-#if PORT == WINDOWS
-
-    BOOL status = FALSE;
-
-    int returned_length = 0;
-
-    if (windows_nt)
-    {
-        /* flush output cache buffer before reading from device */
-        if (port_io_count > 0) flush_ports();
-
-        /*
-        *   On Windows NT, access hardware through device driver
-        */
-        status = DeviceIoControl(
-            nt_device_handle,           /* Handle to device */
-            PGDC_IOCTL_READ_PORT_PP,    /* IO Control code for Read */
-            (ULONG *)&port,             /* Buffer to driver. */
-            sizeof(int),                /* Length of buffer in bytes. */
-            (ULONG *)&data,             /* Buffer from driver. */
-            sizeof(int),                /* Length of buffer in bytes. */
-            (ULONG *)&returned_length,  /* Bytes placed in data_buffer. */
-            NULL);                      /* Wait for operation to complete */
-
-        if ((!status) || (returned_length != sizeof(int)))
-        {
-            fprintf(stderr, "I/O error:  Cannot access ByteBlaster hardware\n");
-            CloseHandle(nt_device_handle);
-            exit(1);
-        }
-    }
-    else
-#endif
-    {
-        /*
-        *   On Windows 95, access hardware directly
-        */
-        data = inp((WORD)(port + lpt_addr));
-    }
-
-    return (data & 0xff);
-}
-
-#if PORT == WINDOWS
-void flush_ports(void)
-{
-    ULONG n_writes = 0L;
-    BOOL status;
-
-    status = DeviceIoControl(
-        nt_device_handle,           /* handle to device */
-        PGDC_IOCTL_PROCESS_LIST_PP, /* IO control code */
-        (LPVOID)port_io_buffer,     /* IN buffer (list buffer) */
-        port_io_count * sizeof(struct PORT_IO_LIST_STRUCT),/* length of IN buffer in bytes */
-        (LPVOID)port_io_buffer, /* OUT buffer (list buffer) */
-        port_io_count * sizeof(struct PORT_IO_LIST_STRUCT),/* length of OUT buffer in bytes */
-        &n_writes,                  /* number of writes performed */
-        0);                         /* wait for operation to complete */
-
-    if ((!status) || ((port_io_count * sizeof(struct PORT_IO_LIST_STRUCT)) != n_writes))
-    {
-        fprintf(stderr, "I/O error:  Cannot access ByteBlaster hardware\n");
-        CloseHandle(nt_device_handle);
-        exit(1);
-    }
-
-    port_io_count = 0;
-}
-#endif /* PORT == WINDOWS */
-#endif /* PORT == WINDOWS || PORT == DOS */
-
-#if 0
-#if !defined (DEBUG)
-#pragma optimize ("ceglt", off)
-#endif
-#endif
-
-void delay_loop(long count)
-{
-    while (count != 0L) count--;
-}
-
-#if PORT == EMBEDDED
-
-static void jbi_init_mm(void)
-{
-#if defined(USE_STATIC_MEMORY)
-    int i;
-#endif /* USE_STATIC_MEMORY */
-
-#if defined(USE_STATIC_MEMORY) || defined(MEM_TRACKER)
-    n_bytes_allocated = 0;
-#endif /* USE_STATIC_MEMORY || MEM_TRACKER */
-
-#if defined(MEM_TRACKER)
-    peak_memory_usage = 0;
-    peak_allocations = 0;
-    n_allocations = 0;
-#if defined(USE_STATIC_MEMORY)
-    n_bytes_not_recovered = 0;
-#endif /* USE_STATIC_MEMORY */
-#endif /* MEM_TRACKER */
-
-#if defined(USE_STATIC_MEMORY)
-    jbi_dbg(DEBUG_DETAIL, "static_memory_heap:  0x%p(0x%x)\n",
-        static_memory_heap, N_STATIC_MEMORY_BYTES);
-    for (i = 0; i < N_STATIC_MEMORY_BYTES; i++) {
-        static_memory_heap[i] = 0;
-    }
-#endif /* USE_STATIC_MEMORY */
-
-    jbi_delay_us = 0;
-    jbi_delay_count = 0;
-    jbi_peak_us = 0;
-}
-
-static void jbi_exit_mm(void)
-{
-#if defined(USE_STATIC_MEMORY) || defined(MEM_TRACKER)
-    jbi_dbg(DEBUG_DETAIL, "n_bytes_allocated:     %u\n", n_bytes_allocated);
-    n_bytes_allocated = 0;
-#endif /* USE_STATIC_MEMORY || MEM_TRACKER */
-
-#if defined(MEM_TRACKER)
-    jbi_dbg(DEBUG_DETAIL, "peak_memory_usage:     %u\n", peak_memory_usage);
-    jbi_dbg(DEBUG_DETAIL, "peak_allocations:      %u\n", peak_allocations);
-    jbi_dbg(DEBUG_DETAIL, "n_allocations:         %u\n", n_allocations);
-    peak_memory_usage = 0;
-    peak_allocations = 0;
-    n_allocations = 0;
-#if defined(USE_STATIC_MEMORY)
-    jbi_dbg(DEBUG_DETAIL, "n_bytes_not_recovered: %u\n", n_bytes_not_recovered);
-    n_bytes_not_recovered = 0;
-#endif /* USE_STATIC_MEMORY */
-#endif /* MEM_TRACKER */
-
-    jbi_dbg(DEBUG_DETAIL, "jbi_delay: %ld us, %ld count, peak %ld us\n",
-        jbi_delay_us, jbi_delay_count, jbi_peak_us);
-}
-
-static char *get_exit_string(int format_version, int exit_code)
-{
-    char *exit_string = NULL;
-
-    if (format_version == 2){
-        switch (exit_code) {
-        case 0:
-            exit_string = "Success";
-            break;
-        case 1:
-            exit_string = "Checking chain failure";
-            break;
-        case 2:
-            exit_string = "Reading IDCODE failure";
-            break;
-        case 3:
-            exit_string = "Reading USERCODE failure";
-            break;
-        case 4:
-            exit_string = "Reading UESCODE failure";
-            break;
-        case 5:
-            exit_string = "Entering ISP failure";
-            break;
-        case 6:
-            exit_string = "Unrecognized device";
-            break;
-        case 7:
-            exit_string = "Device revision is not supported";
-            break;
-        case 8:
-            exit_string = "Erase failure";
-            break;
-        case 9:
-            exit_string = "Device is not blank";
-            break;
-        case 10:
-            exit_string = "Device programming failure";
-            break;
-        case 11:
-            exit_string = "Device verify failure";
-            break;
-        case 12:
-            exit_string = "Read failure"; break;
-        case 13:
-            exit_string = "Calculating checksum failure";
-            break;
-        case 14:
-            exit_string = "Setting security bit failure";
-            break;
-        case 15:
-            exit_string = "Querying security bit failure";
-            break;
-        case 16:
-            exit_string = "Exiting ISP failure";
-            break;
-        case 17:
-            exit_string = "Performing system test failure";
-            break;
-        default:
-            exit_string = "Unknown exit code";
-            break;
-        }
-    } else {
-        switch (exit_code) {
-        case 0:
-            exit_string = "Success";
-            break;
-        case 1:
-            exit_string = "Illegal initialization values";
-            break;
-        case 2:
-            exit_string = "Unrecognized device";
-            break;
-        case 3:
-            exit_string = "Device revision is not supported";
-            break;
-        case 4:
-            exit_string = "Device programming failure";
-            break;
-        case 5:
-            exit_string = "Device is not blank";
-            break;
-        case 6:
-            exit_string = "Device verify failure";
-            break;
-        case 7:
-            exit_string = "SRAM configuration failure";
-            break;
-        default:
-            exit_string = "Unknown exit code";
-            break;
-        }
-    }
-
-    return exit_string;
-}
-
-static void jbi_help(void)
-{
-    fprintf(stderr, "Usage:  jbi <addr> <size> [options]\n");
-    fprintf(stderr, "\nAvailable options:\n");
-    fprintf(stderr, "    -h          : show help message\n");
-    fprintf(stderr, "    -v          : show verbose messages\n");
-    fprintf(stderr, "    -i          : show file info only - does not execute any action\n");
-    fprintf(stderr, "    -a<action>  : specify an action name (Jam STAPL)\n");
-    fprintf(stderr, "    -d<var=val> : initialize variable to specified value (Jam 1.1)\n");
-    fprintf(stderr, "    -d<proc=1>  : enable optional procedure (Jam STAPL)\n");
-    fprintf(stderr, "    -d<proc=0>  : disable recommended procedure (Jam STAPL)\n");
-    fprintf(stderr, "    -r          : don't reset JTAG TAP after use\n");
-}
-
-int jbi_debug(int level)
-{
-    jbi_debug_level = level;
-
-    return 0;
-}
-
-int jbi_main(unsigned char *addr, unsigned long size, int argc, char * const argv[])
-{
-    BOOL help = FALSE;
-    BOOL error = FALSE;
-    long offset = 0L;
-    long error_address = 0L;
-    JBI_RETURN_TYPE crc_result = JBIC_SUCCESS;
-    JBI_RETURN_TYPE exec_result = JBIC_SUCCESS;
-    unsigned short expected_crc = 0;
-    unsigned short actual_crc = 0;
-    char key[33] = {0};
-    char value[257] = {0};
-    int exit_status = 0;
-    int arg = 0;
-    int exit_code = 0;
-    int format_version = 0;
-    char *workspace = NULL;
-    char *action = NULL;
-    char *init_list[10];
-    int init_count = 0;
-    long workspace_size = 0;
-    char *exit_string = NULL;
-    int reset_jtag = 1;
-    int execute_program = 1;
-    int action_count = 0;
-    int procedure_count = 0;
-    int index = 0;
-    char *action_name = NULL;
-    char *description = NULL;
-    JBI_PROCINFO *procedure_list = NULL;
-    JBI_PROCINFO *procptr = NULL;
-    char *endp = NULL;
-
-    verbose = FALSE;
-
-    init_list[0] = NULL;
-
-    /* print out the version string and copyright message */
-    printf("Jam STAPL ByteCode Player Version 2.2\n");
-    printf("Copyright (C) 1998-2001 Altera Corporation\n\n");
-
-    for (arg = 0; arg < argc; arg++) {
-        if (argv[arg][0] == '-') {
-            switch (toupper(argv[arg][1])) {
-            case 'A':   /* set action name */
-                if (action == NULL) {
-                    action = &argv[arg][2];
-                } else {
-                    error = TRUE;
-                }
-                break;
-            case 'D':   /* initialization list */
-                if (argv[arg][2] == '"') {
-                    init_list[init_count] = &argv[arg][3];
-                } else {
-                    init_list[init_count] = &argv[arg][2];
-                }
-                init_list[++init_count] = NULL;
-                break;
-            case 'R':   /* don't reset the JTAG chain after use */
-                reset_jtag = 0;
-                break;
-            case 'M':   /* set memory size */
-                workspace = (char *) simple_strtoul(&argv[arg][2], &endp, 16);
-                if (workspace == NULL) {
-                    printf("Error workspace\n");
-                    error = TRUE;
-                } else {
-                    if (*endp == '.') {
-                        workspace_size = simple_strtoul(endp + 1, &endp, 16);
-                        if (*endp != '\0') {
-                            printf("Error workspace size end\n");
-                            error = TRUE;
-                        }
-                    } else {
-                        printf("No workspace size\n");
-                        error = TRUE;
-                    }
-                }
-                break;
-            case 'H':               /* help */
-                help = TRUE;
-                break;
-            case 'V':               /* verbose */
-                verbose = TRUE;
-                break;
-            case 'I':               /* show info only, do not execute */
-                verbose = TRUE;
-                execute_program = 0;
-                break;
-            default:
-                error = TRUE;
-                break;
-            }
-        } else {
-            error = TRUE;
-        }
-
-        if (error) {
-            fprintf(stderr, "Illegal argument: \"%s\"\n", argv[arg]);
-            help = TRUE;
-            error = FALSE;
-        }
-    }
-
-    if (help) {
-        jbi_help();
-        return 0;
-    }
-
-    /* Calibrate the delay loop function */
-    calibrate_delay();
-
-    jbi_init_mm();
-
-    /* Check CRC */
-    crc_result = jbi_check_crc(addr, size, &expected_crc, &actual_crc);
-    if (verbose || (crc_result == JBIC_CRC_ERROR)) {
-        switch (crc_result) {
-        case JBIC_SUCCESS:
-            printf("CRC matched: CRC value = %04X\n", actual_crc);
-            break;
-        case JBIC_CRC_ERROR:
-            printf("CRC mismatch: expected %04X, actual %04X\n", expected_crc, actual_crc);
-            return -1;
-        case JBIC_UNEXPECTED_END:
-            printf("Expected CRC not found, actual CRC value = %04X\n", actual_crc);
-            return -1;
-        case JBIC_IO_ERROR:
-            printf("Error: File format is not recognized.\n");
-            return -1;
-        default:
-            printf("CRC function returned error code %d\n", crc_result);
-            return -1;
-        }
-    }
-
-    if (verbose) {
-        /* Display file format version */
-        jbi_get_file_info(addr, size, &format_version,
-            &action_count, &procedure_count);
-
-        printf("File format is %s ByteCode format\n",
-            (format_version == 2) ? "Jam STAPL" : "pre-standardized Jam 1.1");
-
-        /* Dump out NOTE fields */
-        while (jbi_get_note(addr, size, &offset, key, value, 256) == 0) {
-            printf("NOTE \"%s\" = \"%s\"\n", key, value);
-        }
-
-        /* Dump the action table */
-        if ((format_version == 2) && (action_count > 0)) {
-            printf("\nActions available in this file:\n");
-
-            for (index = 0; index < action_count; ++index) {
-                jbi_get_action_info(addr, size,
-                    index, &action_name, &description, &procedure_list);
-
-                if (description == NULL) {
-                    printf("%s\n", action_name);
-                } else {
-                    printf("%s \"%s\"\n", action_name, description);
-                }
-
-                procptr = procedure_list;
-                while (procptr != NULL) {
-                    if (procptr->attributes != 0) {
-                        printf("    %s (%s)\n", procptr->name,
-                            (procptr->attributes == 1) ? "optional" : "recommended");
-                    }
-
-                    procedure_list = procptr->next;
-                    jbi_free(procptr);
-                    procptr = procedure_list;
-                }
-            }
-
-            /* add a blank line before execution messages */
-            if (execute_program)
-                printf("\n");
-        }
-    }
-
-    if (execute_program) {
-        /* Execute the Jam STAPL ByteCode program */
-        exec_result = jbi_execute(addr, size, workspace,
-            workspace_size, action, init_list, reset_jtag,
-            &error_address, &exit_code, &format_version);
-        if (exec_result == JBIC_SUCCESS) {
-            exit_string = get_exit_string(format_version, exit_code);
-            printf("Exit code = %d... %s\n", exit_code, exit_string);
-        } else if ((format_version == 2) && (exec_result == JBIC_ACTION_NOT_FOUND)) {
-            if ((action == NULL) || (*action == '\0')) {
-                printf("Error: no action specified for Jam STAPL file.\n"
-                    "Program terminated.\n");
-            } else {
-                printf("Error: action \"%s\" is not supported for this Jam STAPL file.\n"
-                    "Program terminated.\n", action);
-            }
-        } else if (exec_result < MAX_ERROR_CODE) {
-            printf("Error at address %ld: %s.\nProgram terminated.\n",
-                error_address, error_text[exec_result]);
-        } else {
-            printf("Unknown error code %d\n", exec_result);
-        }
-    }
-
-    if (jtag_hardware_initialized) {
-        close_jtag_hardware();
-        jtag_hardware_initialized = FALSE;
-    }
-
-#if defined(MEM_TRACKER)
-    if (verbose) {
-#if defined(USE_STATIC_MEMORY)
-        fprintf(stdout, "Memory Usage Info: static memory size = %uBytes (%dKB)\n",
-        N_STATIC_MEMORY_BYTES, N_STATIC_MEMORY_KBYTES);
-#endif /* USE_STATIC_MEMORY */
-        fprintf(stdout, "Memory Usage Info: peak memory usage = %uBytes (%dKB)\n",
-            peak_memory_usage, (peak_memory_usage + 1023) / 1024);
-        fprintf(stdout, "Memory Usage Info: peak allocations = %u\n",
-            peak_allocations);
-#if defined(USE_STATIC_MEMORY)
-        if ((n_bytes_allocated - n_bytes_not_recovered) != 0) {
-            fprintf(stdout, "Memory Usage Info: bytes still allocated = %d (%dKB)\n",
-                (n_bytes_allocated - n_bytes_not_recovered),
-                ((n_bytes_allocated - n_bytes_not_recovered) + 1023) / 1024);
-        }
-#else /* USE_STATIC_MEMORY */
-        if (n_bytes_allocated != 0) {
-            fprintf(stdout, "Memory Usage Info: bytes still allocated = %d (%dKB)\n",
-                n_bytes_allocated, (n_bytes_allocated + 1023) / 1024);
-        }
-#endif /* USE_STATIC_MEMORY */
-        if (n_allocations != 0) {
-            fprintf(stdout, "Memory Usage Info: allocations not freed = %d\n", n_allocations);
-        }
-    }
-#endif /* MEM_TRACKER */
-
-    jbi_exit_mm();
-
-    if (exec_result != JBIC_SUCCESS) {
-        return (-exec_result);
-    }
-
-    if (exit_code != 0) {
-        return (exit_code);
-    }
-
-    return (exit_status);
-}
-
-#endif /* PORT == EMBEDDED */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbistub.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbistub.h
deleted file mode 100644
index 5e5c5332f385..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_cpld/jbistub.h
+++ /dev/null
@@ -1,95 +0,0 @@
-#ifndef __JBISTUB_H__
-#define __JBISTUB_H__
-
-#include <linux/types.h>
-#include <linux/ctype.h>
-#include <linux/kernel.h>
-#include <linux/gfp.h>
-#include <linux/mm.h>
-#include <linux/delay.h>
-#include <linux/slab.h>
-
-#ifdef CONFIG_64BIT
-typedef s64 addr_t;
-#else
-typedef s32 addr_t;
-#endif
-/* typedef long addr_t; */
-
-/* #define USE_STATIC_MEMORY   100 */
-/* #define MEM_TRACKER */
-
-/* #define O_RDWR  1 */
-
-#define stdout  (1)
-#define stderr  (2)
-
-#define puts    printk
-#define printf  printk
-
-#define fprintf(std, fmt, arg...)   \
-    do {                            \
-        printf(fmt, ##arg);         \
-    } while (0)
-
-#define DEBUG_NONE      0
-#define DEBUG_ERR       1
-#define DEBUG_DETAIL    2
-#define DEBUG_NOISY     3
-#define DEBUG_MM        4
-
-#define jbi_dbg(level, fmt, arg...)         \
-        do {                                \
-            if (level <= jbi_debug_level) { \
-                printf(fmt, ##arg);         \
-            }                               \
-        } while (0)
-
-extern int jbi_debug_level;
-
-static inline int open(char *path, int flag)
-{
-    return 0;
-}
-
-static inline int close(int fd)
-{
-    return 0;
-}
-
-static inline int read(int fd, char *buf, int count)
-{
-    return 0;
-}
-
-static inline int write(int fd, char *buf, int count)
-{
-    return 0;
-}
-
-static inline int fflush(int fd)
-{
-    return 0;
-}
-
-static inline int clock(void)
-{
-    return 0;
-}
-
-static inline int atoi(const char *nptr)
-{
-    return (int) simple_strtol(nptr, (char **) NULL, 10);
-}
-
-static inline void *malloc(size_t size)
-{
-    return kmalloc(size, GFP_KERNEL);
-}
-
-static inline void free(void *ptr)
-{
-    kfree(ptr);
-}
-
-#endif /* __JBISTUB_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/Makefile
deleted file mode 100644
index caad44948030..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/Makefile
+++ /dev/null
@@ -1,22 +0,0 @@
-#include $(top_srcdir)/debian/rules
-#KERNELDIR := ${KBUILD_OUTPUT}
-
-PWD		= $(shell pwd)
-
-EXTRA_CFLAGS:= -I$(M)/include
-MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
-FIRMWARE_UPGRADE_PATH = $(abspath $(MAKEFILE_FILE_PATH)/../../include)
-EXTRA_CFLAGS+= -I$(FIRMWARE_UPGRADE_PATH)
-EXTRA_CFLAGS+= -Wall
-
-firmware_driver_ispvme-objs := firmware_ispvme.o
-firmware_driver_ispvme-objs += firmware_cpld_ispvme.o firmware_cpld_upgrade_ispvme.o
-
-#ifndef CONFIG_FRM_PRODUCT_FILE
-
-$(warning $(firmware_driver_ispvme-objs))
-obj-m := firmware_driver_ispvme.o
-all:
-	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
-	@if [ ! -d $(common_module_dir) ]; then mkdir -p $(common_module_dir) ;fi
-	cp -p  $(PWD)/*.ko $(common_module_dir)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/firmware_cpld_ispvme.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/firmware_cpld_ispvme.c
deleted file mode 100644
index 9841782290c1..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/firmware_cpld_ispvme.c
+++ /dev/null
@@ -1,450 +0,0 @@
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/kdev_t.h>
-#include <linux/slab.h>
-#include <linux/fs.h>
-#include <linux/of.h>
-#include <linux/uaccess.h>
-#include <firmware_ispvme.h>
-#include <firmware_cpld_ispvme.h>
-#include <firmware_upgrade.h>
-
-static int firmware_cpld_open(struct inode *inode, struct file *file)
-{
-    firmware_device_t *frm_dev;
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Open cpld device.\n");
-    frm_dev = firmware_get_device_by_minor(MINOR(inode->i_rdev));
-    if (frm_dev == NULL) {
-        return -ENXIO;
-    }
-    file->private_data = frm_dev;
-
-    return FIRMWARE_SUCCESS;
-}
-
-static ssize_t firmware_cpld_read (struct file *file, char __user *buf, size_t count,
-                                   loff_t *offset)
-{
-    return 0;
-}
-
-static ssize_t firmware_cpld_write (struct file *file, const char __user *buf, size_t count,
-                                    loff_t *offset)
-{
-    return 0;
-}
-
-static loff_t firmware_cpld_llseek(struct file *file, loff_t offset, int origin)
-{
-    return 0;
-}
-
-/*
- * firmware_cpld_ioctl
- * function: ispvme driver ioctl command parsing function
- * @file: param[in] device file name
- * @cmd:  param[in] command
- * @arg:  param[in] the parameters in the command
- * return value: success-FIRMWARE_SUCCESS; fail:other value
- */
-static long firmware_cpld_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
-{
-    int ret;
-    void __user *argp;
-    firmware_device_t *frm_dev;
-    firmware_cpld_t *cpld_info;
-    char value;
-
-    /* Get device private data */
-    frm_dev = (firmware_device_t *)file->private_data;
-    cpld_info = NULL;
-    if (frm_dev != NULL) {
-        if (frm_dev->priv != NULL) {
-            cpld_info = (firmware_cpld_t *)frm_dev->priv;
-        }
-    }
-    if (cpld_info == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to frm_dev->priv sysfs info.\n");
-        return FIRMWARE_FAILED;
-    }
-    argp = (void __user *)arg;
-
-    switch (cmd) {
-    case FIRMWARE_JTAG_TDI:
-        /* Set the TDI signal */
-        if (copy_from_user(&value, argp, sizeof(value))) {
-            return -EFAULT;
-        }
-        if (fwm_cpld_tdi_op(value) < 0 ) {
-            return -EFAULT;
-        }
-        break;
-    case FIRMWARE_JTAG_TCK:
-        /* Set the TCK signal */
-        if (copy_from_user(&value, argp, sizeof(value))) {
-            return -EFAULT;
-        }
-        if (fwm_cpld_tck_op(value) < 0) {
-            return -EFAULT;
-        }
-        break;
-    case FIRMWARE_JTAG_TMS:
-        /* Set the TMS signal */
-        if (copy_from_user(&value, argp, sizeof(value))) {
-            return -EFAULT;
-        }
-        if (fwm_cpld_tms_op(value) < 0) {
-            return -EFAULT;
-        }
-        break;
-    case FIRMWARE_JTAG_TDO:
-        /* Read the TDO signal */
-        value = fwm_cpld_tdo_op();
-        if (copy_to_user(argp, &value, sizeof(value))) {
-            return -EFAULT;
-        }
-        break;
-    case FIRMWARE_JTAG_INIT:
-        /* The VME upgrade mode initializes the operation */
-        ret=firmware_init_vme(cpld_info);
-        if (ret != FIRMWARE_SUCCESS) {
-           FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to init upgrade.(chain = %d)\n",
-                frm_dev != NULL ? frm_dev->chain : -1);
-           return FIRMWARE_FAILED;
-        }
-        break;
-    case FIRMWARE_JTAG_FINISH:
-        /* The VME upgrade mode completes the operation */
-        ret=firmware_finish_vme(cpld_info);
-        if (ret != FIRMWARE_SUCCESS) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to release upgrade.(chain = %d)\n",
-                frm_dev != NULL ? frm_dev->chain : -1);
-            return FIRMWARE_FAILED;
-        }
-        break;
-    default:
-        FIRMWARE_DRIVER_DEBUG_ERROR("not find cmd: %d\r\n", cmd);
-        return -ENOTTY;
-    } /* End of switch */
-
-    return FIRMWARE_SUCCESS;
-}
-
-static int firmware_cpld_release(struct inode *inode, struct file *file)
-{
-    return 0;
-}
-
-static const struct file_operations cpld_dev_fops = {
-    .owner      = THIS_MODULE,
-    .llseek     = firmware_cpld_llseek,
-    .read       = firmware_cpld_read,
-    .write      = firmware_cpld_write,
-    .unlocked_ioctl = firmware_cpld_ioctl,
-    .open       = firmware_cpld_open,
-    .release    = firmware_cpld_release,
-};
-
-static int of_firmware_upgrade_config_init(struct device *dev, firmware_cpld_t *cpld_info)
-{
-    int ret;
-    char *name;
-    int i;
-    char buf[64];
-    firmware_logic_dev_en_t *firmware_logic_dev_en_point;
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Enter firmware_upgrade_config_init\r\n");
-    if (cpld_info == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("info is null\r\n");
-        return -1;
-    }
-
-    mem_clear(cpld_info, sizeof(firmware_cpld_t));
-    ret = 0;
-    ret += of_property_read_string(dev->of_node, "type", (const char **)&name);
-    ret += of_property_read_u32(dev->of_node, "tdi", &cpld_info->tdi);
-    ret += of_property_read_u32(dev->of_node, "tck", &cpld_info->tck);
-    ret += of_property_read_u32(dev->of_node, "tms", &cpld_info->tms);
-    ret += of_property_read_u32(dev->of_node, "tdo", &cpld_info->tdo);
-
-    ret += of_property_read_u32(dev->of_node, "chain", &cpld_info->chain);
-    ret += of_property_read_u32(dev->of_node, "chip_index", &cpld_info->chip_index);
-
-    if (ret != 0) {
-       FIRMWARE_DRIVER_DEBUG_ERROR("dts config error, ret:%d.\n", ret);
-       return -ENXIO;
-    }
-
-    strncpy(cpld_info->type, name, sizeof(cpld_info->type) - 1);
-
-    ret = of_property_read_u32(dev->of_node, "tck_delay", &cpld_info->tck_delay);
-    if(ret != 0) {
-        cpld_info->tck_delay = 60;
-    }
-
-    cpld_info->gpio_en_info_num = 0;
-    /* Enable through GPIO */
-    for (i = 0; i < FIRMWARE_EN_INFO_MAX; i++) {
-        mem_clear(buf, sizeof(buf));
-        snprintf(buf, sizeof(buf) - 1, "en_gpio_%d", i);
-        ret = of_property_read_u32(dev->of_node, buf, &cpld_info->gpio_en_info[i].en_gpio);
-        if(ret != 0) {
-            break;
-        }
-
-        mem_clear(buf, sizeof(buf));
-        snprintf(buf, sizeof(buf) - 1, "en_level_%d", i);
-        ret = of_property_read_u32(dev->of_node, buf, &cpld_info->gpio_en_info[i].en_level);
-        if(ret != 0) {
-            break;
-        }
-        cpld_info->gpio_en_info_num++;
-    }
-
-    cpld_info->logic_dev_en_num = 0;
-    /* Enable through register */
-    for (i = 0; i < FIRMWARE_EN_INFO_MAX; i++) {
-        firmware_logic_dev_en_point = &cpld_info->logic_dev_en_info[i];
-        mem_clear(buf, sizeof(buf));
-        snprintf(buf, sizeof(buf) - 1, "en_logic_dev_%d", i);
-        ret = 0;
-        ret += of_property_read_string(dev->of_node, buf, (const char **)&name);
-        if(ret != 0) {
-            /* Failure to resolve to EN_LOGIC_DEV means no logical device is enabled. No failure is returned */
-            ret = 0;
-            break;
-        }
-        strncpy(firmware_logic_dev_en_point->dev_name, name, FIRMWARE_DEV_NAME_LEN - 1);
-
-        mem_clear(buf, sizeof(buf));
-        snprintf(buf, sizeof(buf) - 1, "en_logic_addr_%d", i);
-        ret = of_property_read_u32(dev->of_node, buf, &firmware_logic_dev_en_point->addr);
-        if (ret != 0) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to config en en_logic_addr_%d ret =%d.\n", i, ret);
-            break;
-        }
-
-        mem_clear(buf, sizeof(buf));
-        snprintf(buf, sizeof(buf) - 1, "en_logic_mask_%d", i);
-        ret = of_property_read_u32(dev->of_node, buf, &firmware_logic_dev_en_point->mask);
-        if (ret != 0) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to config en en_logic_mask_%d ret =%d.\n", i, ret);
-            break;
-        }
-
-        mem_clear(buf, sizeof(buf));
-        snprintf(buf, sizeof(buf) - 1, "en_logic_en_val_%d", i);
-        ret = of_property_read_u32(dev->of_node, buf, &firmware_logic_dev_en_point->en_val);
-        if (ret != 0) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to config en en_logic_en_val_%d ret =%d.\n", i, ret);
-            break;
-        }
-
-        mem_clear(buf, sizeof(buf));
-        snprintf(buf, sizeof(buf) - 1, "en_logic_dis_val_%d", i);
-        ret = of_property_read_u32(dev->of_node, buf, &firmware_logic_dev_en_point->dis_val);
-        if (ret != 0) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to config en en_logic_dis_val_%d ret =%d.\n", i, ret);
-            break;
-        }
-
-        mem_clear(buf, sizeof(buf));
-        snprintf(buf, sizeof(buf) - 1, "en_logic_width_%d", i);
-        ret = of_property_read_u32(dev->of_node, buf, &firmware_logic_dev_en_point->width);
-        if (ret != 0) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to config en en_logic_width_%d ret =%d.\n", i, ret);
-            break;
-        }
-
-        cpld_info->logic_dev_en_num++;
-    }
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("type:%s, chain:%u, chip_index:%u, gpio_en_info_num:%u logic_dev_en_num:%u\n",
-        cpld_info->type, cpld_info->chain, cpld_info->chip_index, cpld_info->gpio_en_info_num, cpld_info->logic_dev_en_num);
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("tdi:%u, tck:%u, tms:%u, tdo:%u tck_delay:%u.\n",
-        cpld_info->tdi, cpld_info->tck, cpld_info->tms, cpld_info->tdo, cpld_info->tck_delay);
-
-    return 0;
-}
-
-static int firmware_upgrade_config_init(struct device *dev, firmware_cpld_t *cpld_info)
-{
-    int i;
-
-    firmware_logic_dev_en_t *firmware_logic_dev_en_point;
-    firmware_upgrade_device_t *firmware_upgrade_device;
-    firmware_jtag_device_t jtag_upg_device;
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Enter firmware_upgrade_config_init\r\n");
-    if (cpld_info == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("info is null\r\n");
-        return -1;
-    }
-
-    if (dev->platform_data == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("platform data config error.\n");
-        return -1;
-    }
-    firmware_upgrade_device = dev->platform_data;
-    jtag_upg_device = firmware_upgrade_device->upg_type.jtag;
-
-    mem_clear(cpld_info, sizeof(firmware_cpld_t));
-    strncpy(cpld_info->type, firmware_upgrade_device->type, sizeof(cpld_info->type) - 1);
-    cpld_info->tdi = jtag_upg_device.tdi;
-    cpld_info->tck = jtag_upg_device.tck;
-    cpld_info->tms = jtag_upg_device.tms;
-    cpld_info->tdo = jtag_upg_device.tdo;
-    cpld_info->chain = firmware_upgrade_device->chain;
-    cpld_info->chip_index = firmware_upgrade_device->chip_index;
-
-    if (jtag_upg_device.tck_delay == 0) {
-        cpld_info->tck_delay = 60;
-        FIRMWARE_DRIVER_DEBUG_VERBOSE("no config tck_delay, use default value:%u\n", cpld_info->tck_delay);
-    } else {
-        cpld_info->tck_delay = jtag_upg_device.tck_delay;
-    }
-
-    if (firmware_upgrade_device->en_gpio_num > FIRMWARE_EN_INFO_MAX) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("The number of en_gpio_num:%u configurations exceeds the maximum limit:%u.\n",
-            firmware_upgrade_device->en_gpio_num, FIRMWARE_EN_INFO_MAX);
-        return -ENXIO;
-    }
-    cpld_info->gpio_en_info_num = firmware_upgrade_device->en_gpio_num;
-    /* Enable through GPIO */
-    for (i = 0; i < cpld_info->gpio_en_info_num; i++) {
-        cpld_info->gpio_en_info[i].en_gpio = firmware_upgrade_device->en_gpio[i];
-        cpld_info->gpio_en_info[i].en_level = firmware_upgrade_device->en_level[i];
-    }
-
-    if (firmware_upgrade_device->en_logic_num > FIRMWARE_EN_INFO_MAX) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("The number of en_logic_num:%u configurations exceeds the maximum limit:%u.\n",
-            firmware_upgrade_device->en_logic_num, FIRMWARE_EN_INFO_MAX);
-        return -ENXIO;
-    }
-    cpld_info->logic_dev_en_num = firmware_upgrade_device->en_logic_num;
-    /* Enable through register */
-    for (i = 0; i < cpld_info->logic_dev_en_num; i++) {
-        firmware_logic_dev_en_point = &cpld_info->logic_dev_en_info[i];
-        strncpy(firmware_logic_dev_en_point->dev_name, firmware_upgrade_device->en_logic_dev[i],
-            FIRMWARE_DEV_NAME_LEN - 1);
-        firmware_logic_dev_en_point->addr = firmware_upgrade_device->en_logic_addr[i];
-        firmware_logic_dev_en_point->mask = firmware_upgrade_device->en_logic_mask[i];
-        firmware_logic_dev_en_point->en_val = firmware_upgrade_device->en_logic_en_val[i];
-        firmware_logic_dev_en_point->dis_val = firmware_upgrade_device->en_logic_dis_val[i];
-        firmware_logic_dev_en_point->width = firmware_upgrade_device->en_logic_width[i];
-    }
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("type:%s, chain:%u, chip_index:%u, gpio_en_info_num:%u logic_dev_en_num:%u\n",
-        cpld_info->type, cpld_info->chain, cpld_info->chip_index, cpld_info->gpio_en_info_num, cpld_info->logic_dev_en_num);
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("tdi:%u, tck:%u, tms:%u, tdo:%u tck_delay:%u.\n",
-        cpld_info->tdi, cpld_info->tck, cpld_info->tms, cpld_info->tdo, cpld_info->tck_delay);
-
-    return 0;
-}
-
-static int  firmware_cpld_probe(struct platform_device *pdev)
-{
-    int ret;
-    firmware_cpld_t *cpld_info;
-    firmware_device_t *frm_dev;
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Enter firmware_cpld_probe\r\n");
-    /* Gets the information in the device tree */
-    cpld_info = devm_kzalloc(&pdev->dev, sizeof(firmware_cpld_t), GFP_KERNEL);
-    if (cpld_info == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to kzalloc cpld device tree.\n");
-        return -EPERM;
-    }
-
-    if (pdev->dev.of_node) {
-        ret = of_firmware_upgrade_config_init(&pdev->dev, cpld_info);
-    } else {
-        ret = firmware_upgrade_config_init(&pdev->dev, cpld_info);
-    }
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("get config init from dts error.\n");
-        return -EPERM;
-    }
-
-    frm_dev = devm_kzalloc(&pdev->dev, sizeof(firmware_device_t), GFP_KERNEL);
-    if (frm_dev == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to kzalloc firmware device.\n");
-        return -EPERM;
-    }
-
-    /* Based on the link number, determine the name of the device file */
-    frm_dev->chain = cpld_info->chain;
-    snprintf(frm_dev->name, FIRMWARE_NAME_LEN - 1, "firmware_cpld_ispvme%d", frm_dev->chain);
-    strncpy(cpld_info->devname, frm_dev->name, strlen(frm_dev->name) + 1);
-
-    INIT_LIST_HEAD(&frm_dev->list);
-    frm_dev->dev.minor = MISC_DYNAMIC_MINOR;
-    frm_dev->dev.name = frm_dev->name;
-    frm_dev->dev.fops = &cpld_dev_fops;
-    frm_dev->priv = cpld_info;
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Register cpld firmware chain:%d, name:%s.\n", frm_dev->chain, frm_dev->name);
-
-    ret = firmware_device_register(frm_dev);
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to register firmware device.\n");
-        return -EPERM;
-    }
-
-    platform_set_drvdata(pdev, frm_dev);
-    return 0;
-}
-
-static int __exit firmware_cpld_remove(struct platform_device *pdev)
-{
-    firmware_device_t *frm_dev;
-
-    frm_dev = (firmware_device_t *)platform_get_drvdata(pdev);
-    firmware_device_unregister(frm_dev);
-    platform_set_drvdata(pdev, NULL);
-
-    return 0;
-}
-
-static struct of_device_id cpld_match[] = {
-    {
-        .compatible = "firmware_cpld_ispvme",
-    },
-    {},
-};
-
-static struct platform_driver cpld_driver = {
-    .driver = {
-        .name = "firmware_cpld_ispvme",
-        .owner = THIS_MODULE,
-        .of_match_table = cpld_match,
-    },
-    .probe = firmware_cpld_probe,
-    .remove = firmware_cpld_remove,
-};
-
-static firmware_driver_t fmw_drv_cpld = {
-    .name = "firmware_cpld_ispvme",
-    .drv = &cpld_driver,
-};
-
-int firmware_cpld_init(void)
-{
-    int ret;
-
-    INIT_LIST_HEAD(&fmw_drv_cpld.list);
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("ispvme upgrade driver register \n");
-    ret = firmware_driver_register(&fmw_drv_cpld);
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("ispvme upgrade driver register failed\n");
-        return ret;
-    }
-    return 0;
-}
-
-void firmware_cpld_exit(void)
-{
-    firmware_driver_unregister(&fmw_drv_cpld);
-    INIT_LIST_HEAD(&fmw_drv_cpld.list);
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/firmware_cpld_upgrade_ispvme.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/firmware_cpld_upgrade_ispvme.c
deleted file mode 100644
index b8896ed75f38..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/firmware_cpld_upgrade_ispvme.c
+++ /dev/null
@@ -1,691 +0,0 @@
-#include <linux/kernel.h>
-#include <linux/delay.h>
-#include <linux/gpio.h>
-#include <linux/ctype.h>
-#include <linux/slab.h>
-#include <linux/uaccess.h>
-#include <firmware_ispvme.h>
-#include <firmware_cpld_ispvme.h>
-#include <firmware_upgrade.h>
-
-/* TCK clock MAX 16MHz */
-#define    TCK_DELAY                         (current_fmw_cpld->tck_delay)
-
-#if 0
-static firmware_cpld_t default_fmw_cpld;
-#endif
-
-static firmware_cpld_t *current_fmw_cpld;
-
-static int TDI_PULL_UP(void);
-static int TDI_PULL_DOWN(void);
-static int TMS_PULL_UP(void);
-static int TMS_PULL_DOWN(void);
-static int TCK_PULL_UP(void);
-static int TCK_PULL_DOWN(void);
-
-/*
- * set_currrent_cpld_info
- * function: Save the current device information
- * @info: param[in] Information about the device to be updated
- */
-static void set_currrent_cpld_info(firmware_cpld_t *info)
-{
-    current_fmw_cpld = info;
-}
-
-static int firmware_file_read(const char *path, uint32_t addr, uint8_t *val, size_t size)
-{
-    int ret;
-    struct file *filp;
-    loff_t pos;
-
-    filp = filp_open(path, O_RDONLY, 0);
-    if (IS_ERR(filp)) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
-        filp = NULL;
-        goto exit;
-    }
-
-    pos = (loff_t)addr;
-    ret = kernel_read(filp, val, size, &pos);
-    if (ret != size) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("read kernel_read failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, addr, size, ret);
-        goto exit;
-    }
-    filp_close(filp, NULL);
-
-    return ret;
-
-exit:
-    if (filp != NULL) {
-        filp_close(filp, NULL);
-    }
-
-    return -1;
-}
-
-static int firmware_file_write(const char *path, uint32_t addr, uint8_t *val, size_t size)
-{
-    int ret;
-    struct file *filp;
-    loff_t pos;
-
-    filp = filp_open(path, O_RDWR, 777);
-    if (IS_ERR(filp)) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
-        filp = NULL;
-        goto exit;
-    }
-
-    pos = (loff_t)addr;
-    ret = kernel_write(filp, (void*)val, size, &pos);
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("write kernel_write failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, addr, size, ret);
-        goto exit;
-    }
-    vfs_fsync(filp, 1);
-    filp_close(filp, NULL);
-
-    return ret;
-
-exit:
-    if (filp != NULL) {
-        filp_close(filp, NULL);
-    }
-
-    return -1;
-}
-
-/*
- * firmware_file_do_work
- * function: Sets logical register values
- * @path:param[in] Logic device descriptor
- * @addr:param[in] Logic device address
- * @value:param[in] the register value needs to be set
- * @mask:param[in] register mask
- * @width:param[in] register bit width
- * return: 0:success, <0:failed
- */
-static int firmware_file_do_work(char *path, uint32_t addr, uint32_t value, uint32_t mask,
-                    int32_t width)
-{
-    int ret;
-    uint8_t read_value[4], write_value[4];
-    uint8_t tmp_read8, tmp_write8, tmp_mask8;
-    uint32_t tmp_read32, tmp_write32;
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("path=%s, addr=0x%x, value=0x%x mask=0x%x\r\n", path, addr, value, mask);
-    if ((width > 4) || (width < 0)) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("width %d is not support.\r\n", width);
-        return -1;
-    }
-    ret = 0;
-    mem_clear(read_value, sizeof(read_value));
-    mem_clear(write_value, sizeof(write_value));
-    ret = firmware_file_read(path, addr, read_value, width);
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("firmware sysfs read.\r\n");
-        return -1;
-    }
-
-    switch (width) {
-    case 1:
-        tmp_read8 = read_value[0];
-        tmp_mask8 = (uint8_t)(mask) & 0xFF;
-        tmp_write8 = (uint8_t)value & 0xFF;
-        write_value[0] = (tmp_read8 & tmp_mask8) | tmp_write8;
-        FIRMWARE_DRIVER_DEBUG_VERBOSE("1 byte write val[0]:0x%x", write_value[0]);
-        break;
-    case 2:
-        FIRMWARE_DRIVER_DEBUG_ERROR("width %d is not support.\r\n", width);
-        return -1;
-    case 4:
-        memcpy((uint8_t *)&tmp_read32, read_value, 4);
-        tmp_write32 = (tmp_read32 & mask) | value;
-        memcpy(write_value, (uint8_t *)&tmp_write32, 4);
-        FIRMWARE_DRIVER_DEBUG_VERBOSE("4 byte write val[0]:0x%x, val[1]:0x%x, val[2]:0x%x, val[3]:0x%x",
-            write_value[0], write_value[1], write_value[2], write_value[3]);
-        break;
-    default:
-        FIRMWARE_DRIVER_DEBUG_ERROR("width %d is not support.\r\n", width);
-        return -1;
-    }
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("write logic dev[%s] addr[0x%x].\r\n", path, addr);
-    ret = firmware_file_write(path, addr, write_value, width);
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("firmware_file_write %s addr 0x%x failed, ret=%d.\r\n", path, addr, ret);
-        return -1;
-    }
-
-    return 0;
-}
-
-/*
- * firmware_upgrade_en
- * function: Upgrade access enabling switch
- * @flag: !0:enable 0:disable
- */
-static int firmware_upgrade_en(int flag)
-{
-    int i;
-    firmware_logic_dev_en_t *firmware_logic_dev_en_info;
-    int ret, rv;
-    char *dev_name;
-
-    ret = 0;
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("%s en switch: gpio en num %d, logic reg en num %d.\n",
-            flag ? "Open" : "Close", current_fmw_cpld->gpio_en_info_num, current_fmw_cpld->logic_dev_en_num);
-    for (i = 0; i < current_fmw_cpld->gpio_en_info_num; i++) {
-        if (flag) {
-            ret = gpio_request(current_fmw_cpld->gpio_en_info[i].en_gpio, "cpld_ispvme_upgrade");
-            if (ret) {
-                FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_ispvme_upgrade EN[%d] GPIO[%d] failed!\n",
-                        i, current_fmw_cpld->gpio_en_info[i].en_gpio);
-                goto free_gpio;
-            }
-            gpio_direction_output(current_fmw_cpld->gpio_en_info[i].en_gpio, current_fmw_cpld->gpio_en_info[i].en_level);
-            current_fmw_cpld->gpio_en_info[i].flag = 1;
-        } else {
-            gpio_set_value(current_fmw_cpld->gpio_en_info[i].en_gpio, !current_fmw_cpld->gpio_en_info[i].en_level);
-            gpio_free(current_fmw_cpld->gpio_en_info[i].en_gpio);
-            current_fmw_cpld->gpio_en_info[i].flag = 0;
-        }
-    }
-
-    for (i = 0; i < current_fmw_cpld->logic_dev_en_num; i++) {
-        firmware_logic_dev_en_info = &current_fmw_cpld->logic_dev_en_info[i];
-        dev_name = firmware_logic_dev_en_info->dev_name;
-        FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware sysfs [%d] dev_name[%s] addr[0x%x] mask[0x%x]"
-            " en_val[0x%x] dis_val[0x%x] width[%d]\n",
-            i , firmware_logic_dev_en_info->dev_name, firmware_logic_dev_en_info->addr,
-            firmware_logic_dev_en_info->mask, firmware_logic_dev_en_info->en_val,
-            firmware_logic_dev_en_info->dis_val, firmware_logic_dev_en_info->width);
-        if (flag) {
-            ret = firmware_file_do_work(dev_name, firmware_logic_dev_en_info->addr,
-                    firmware_logic_dev_en_info->en_val, firmware_logic_dev_en_info->mask,
-                    firmware_logic_dev_en_info->width);
-            if (ret < 0) {
-                FIRMWARE_DRIVER_DEBUG_ERROR("Open logic register [%d] EN failed, ret %d.\n", i, ret);
-                goto free_logic_dev;
-            } else {
-                firmware_logic_dev_en_info->flag = 1;
-            }
-        } else {
-            rv = firmware_file_do_work(dev_name, firmware_logic_dev_en_info->addr,
-                    firmware_logic_dev_en_info->dis_val, firmware_logic_dev_en_info->mask,
-                    firmware_logic_dev_en_info->width);
-            if (rv < 0) {
-                FIRMWARE_DRIVER_DEBUG_ERROR("Close logic register [%d] EN failed, ret %d.\n", i, rv);
-                ret = -1;
-            }
-            firmware_logic_dev_en_info->flag = 0;
-        }
-    }
-
-    return ret;
-free_logic_dev:
-    for (i = 0; i < current_fmw_cpld->logic_dev_en_num; i++) {
-        firmware_logic_dev_en_info = &current_fmw_cpld->logic_dev_en_info[i];
-        dev_name = firmware_logic_dev_en_info->dev_name;
-        if (firmware_logic_dev_en_info->flag == 1) {
-            ret = firmware_file_do_work(dev_name, firmware_logic_dev_en_info->addr,
-                    firmware_logic_dev_en_info->dis_val, firmware_logic_dev_en_info->mask,
-                    firmware_logic_dev_en_info->width);
-            if (ret < 0) {
-                FIRMWARE_DRIVER_DEBUG_ERROR("Close logic register [%d] EN failed, ret %d.\n", i, ret);
-            }
-            firmware_logic_dev_en_info->flag = 0;
-        } else {
-            break;
-        }
-    }
-free_gpio:
-    for (i = 0; i < current_fmw_cpld->gpio_en_info_num; i++) {
-        if (current_fmw_cpld->gpio_en_info[i].flag == 1) {
-            gpio_set_value(current_fmw_cpld->gpio_en_info[i].en_gpio, !current_fmw_cpld->gpio_en_info[i].en_level);
-            gpio_free(current_fmw_cpld->gpio_en_info[i].en_gpio);
-            current_fmw_cpld->gpio_en_info[i].flag = 0;
-        } else {
-            break;
-        }
-    }
-
-    return -1;
-}
-
-/*
- * init_cpld
- * function:Initialize CPLD
- * return value: 0 success ; -1 fail
- */
-static int init_cpld(void)
-{
-    int ret;
-    if (current_fmw_cpld == NULL) {
-        return -1;
-    }
-    mdelay(10);
-    ret = 0;
-    ret = gpio_request(current_fmw_cpld->tdi, "cpld_ispvme_upgrade");
-    if (ret) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_ispvme_upgrade TDI GPIO failed!\n");
-        return ret;
-    }
-    ret = gpio_request(current_fmw_cpld->tck, "cpld_ispvme_upgrade");
-    if (ret) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_ispvme_upgrade TCK GPIO failed!\n");
-        goto free_tdi;
-    }
-    ret = gpio_request(current_fmw_cpld->tms, "cpld_ispvme_upgrade");
-    if (ret) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_ispvme_upgrade TMS GPIO failed!\n");
-        goto free_tck;
-    }
-    ret = gpio_request(current_fmw_cpld->tdo, "cpld_ispvme_upgrade");
-    if (ret) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_ispvme_upgrade TDO GPIO failed!\n");
-        goto free_tms;
-    }
-
-    gpio_direction_output(current_fmw_cpld->tdi, 1);
-    gpio_direction_output(current_fmw_cpld->tck, 1);
-    gpio_direction_output(current_fmw_cpld->tms, 1);
-
-    gpio_direction_input(current_fmw_cpld->tdo);
-    ret = firmware_upgrade_en(1);
-    if (ret) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: open firmware upgrade en failed, ret %d.\n", ret);
-        goto free_tdo;
-    }
-#if 0
-    /* test GPIO */
-    if (TDI_PULL_UP() < 0 ) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TDI_PULL_UP failed.\n");
-        goto free_tdo;
-    }
-    if (TDI_PULL_DOWN() < 0 ) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TDI_PULL_DOWN failed.\n");
-        goto free_tdo;
-    }
-    if (TMS_PULL_UP() < 0 ) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TMS_PULL_UP failed.\n");
-        goto free_tdo;
-    }
-    if (TMS_PULL_DOWN() < 0 ) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TMS_PULL_DOWN failed.\n");
-        goto free_tdo;
-    }
-    if (TCK_PULL_UP() < 0 ) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TCK_PULL_UP failed.\n");
-        goto free_tdo;
-    }
-    if (TCK_PULL_DOWN() < 0 ) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: TCK_PULL_DOWN failed.\n");
-        goto free_tdo;
-    }
-#endif
-    mdelay(10);
-    return 0;
-
-free_tdo:
-    gpio_free(current_fmw_cpld->tdo);
-free_tms:
-    gpio_free(current_fmw_cpld->tms);
-free_tck:
-    gpio_free(current_fmw_cpld->tck);
-free_tdi:
-    gpio_free(current_fmw_cpld->tdi);
-    return ret;
-}
-
-/*
- * finish_cpld
- * function: finish  CPLD upgrade operation
- * return value: 0 success ; -1 fail
- */
-static int finish_cpld(void)
-{
-    int ret;
-
-    if (current_fmw_cpld == NULL) {
-        return -1;
-    }
-    mdelay(10);
-    ret = firmware_upgrade_en(0);
-    if (ret < 0){
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: close firmware upgrade en failed, ret %d.\r\n", ret);
-    }
-
-    gpio_free(current_fmw_cpld->tdi);
-    gpio_free(current_fmw_cpld->tck);
-    gpio_free(current_fmw_cpld->tms);
-    gpio_free(current_fmw_cpld->tdo);
-    mdelay(10);
-    return 0;
-}
-
-/* Loop waiting for */
-static int pull_wait(int gpio, int value) {
-    int i, j;
-    /* Timeout time is two seconds */
-    for (i = 0; i < 20; i++) {
-        for (j = 0; j < 100; j++) {
-            if (!!gpio_get_value(gpio) == !!value ) {
-                return 0;
-            }
-            /* The first loop does not delay, normally the first loop can immediately return the result */
-            if (i) {
-                mdelay(1);
-            }
-        }
-        /* The CPU is released every 100ms */
-        schedule();
-    }
-    /* timeout */
-    FIRMWARE_DRIVER_DEBUG_ERROR("Error: Wait gpio %d pull to %d failed.\n", gpio, value);
-    return -1;
-}
-
-/* TDI pull-up */
-static int pull_tdi_up(void)
-{
-    if (current_fmw_cpld == NULL) {
-        return -1;
-    }
-    gpio_set_value(current_fmw_cpld->tdi, 1);
-
-    /* Wait for the GPIO value to be set successfully */
-    return pull_wait(current_fmw_cpld->tdi, 1);
-}
-
-/* TDI pull-down */
-static int pull_tdi_down(void)
-{
-    if (current_fmw_cpld == NULL) {
-        return -1;
-    }
-    gpio_set_value(current_fmw_cpld->tdi, 0);
-
-    /* Wait for the GPIO value to be set successfully */
-    return pull_wait(current_fmw_cpld->tdi, 0);
-}
-
-/* TCK pull-up */
-static int pull_tck_up(void)
-{
-    if (current_fmw_cpld == NULL) {
-        return -1;
-    }
-    gpio_set_value(current_fmw_cpld->tck, 1);
-
-    /* Wait for the GPIO value to be set successfully */
-    return pull_wait(current_fmw_cpld->tck, 1);
-}
-
-/* TCK pull-down */
-static int pull_tck_down(void)
-{
-    if (current_fmw_cpld == NULL) {
-        return -1;
-    }
-    gpio_set_value(current_fmw_cpld->tck, 0);
-
-    /* Wait for the GPIO value to be set successfully */
-    return pull_wait(current_fmw_cpld->tck, 0);
-}
-
-/* TMS pull-up */
-static int pull_tms_up(void)
-{
-    if (current_fmw_cpld == NULL) {
-        return -1;
-    }
-    gpio_set_value(current_fmw_cpld->tms, 1);
-
-    /* Wait for the GPIO value to be set successfully */
-    return pull_wait(current_fmw_cpld->tms, 1);
-}
-
-/* TMS pull-down */
-static int pull_tms_down(void)
-{
-    if (current_fmw_cpld == NULL) {
-        return -1;
-    }
-    gpio_set_value(current_fmw_cpld->tms, 0);
-
-    /* Wait for the GPIO value to be set successfully */
-    return pull_wait(current_fmw_cpld->tms, 0);
-}
-
-/* Read TDO */
-static int read_tdo(void)
-{
-    if (current_fmw_cpld == NULL) {
-        return -1;
-    }
-    return gpio_get_value(current_fmw_cpld->tdo);
-}
-
-static firmware_cpld_function_t function_fmw_cpld = {
-      .pull_tdi_up = pull_tdi_up,
-      .pull_tdi_down = pull_tdi_down,
-      .pull_tck_up = pull_tck_up,
-      .pull_tck_down = pull_tck_down,
-      .pull_tms_up = pull_tms_up,
-      .pull_tms_down = pull_tms_down,
-      .read_tdo = read_tdo,
-      .init_cpld = init_cpld,
-      .finish_cpld = finish_cpld,
-};
-
-/*
- * TDI_PULL_DOWN
- * function: Lower TDI
- */
-static int TDI_PULL_DOWN(void)
-{
-    if ( function_fmw_cpld.pull_tdi_down != NULL) {
-        return function_fmw_cpld.pull_tdi_down();
-    } else {
-        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TDI_PULL_DOWN.\n");
-        return -1;
-    }
-}
-
-/*
- * TDI_PULL_UP
- * function: High TDI
- */
-static int TDI_PULL_UP(void)
-{
-    if (function_fmw_cpld.pull_tdi_up != NULL) {
-        return function_fmw_cpld.pull_tdi_up();
-    } else {
-        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TDI_PULL_UP.\n");
-        return -1;
-    }
-}
-
-/*
- * TCK_PULL_DOWN
- * function: Lower TCK
- */
-static int TCK_PULL_DOWN(void)
-{
-    if (function_fmw_cpld.pull_tck_down != NULL) {
-        return function_fmw_cpld.pull_tck_down();
-    } else {
-        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TCK_PULL_DOWN.\n");
-        return -1;
-    }
-}
-
-/*
- * TCK_PULL_UP
- * function: High TCK
- */
-static int TCK_PULL_UP(void)
-{
-    if (function_fmw_cpld.pull_tck_up != NULL) {
-        return function_fmw_cpld.pull_tck_up();
-    } else {
-        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TCK_PULL_UP.\n");
-        return -1;
-    }
-}
-
-/*
- * TMS_PULL_DOWN
- * function: Lower TMS
- */
-static int TMS_PULL_DOWN(void)
-{
-    if (function_fmw_cpld.pull_tms_down != NULL) {
-        return function_fmw_cpld.pull_tms_down();
-    } else {
-        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TMS_PULL_DOWN.\n");
-        return -1;
-    }
-}
-
-/*
- * TMS_PULL_UP
- * function: High TMS
- */
-static int TMS_PULL_UP(void)
-{
-    if (function_fmw_cpld.pull_tms_up != NULL) {
-        return function_fmw_cpld.pull_tms_up();
-    } else {
-        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TMS_PULL_UP.\n");
-        return -1;
-    }
-}
-
-/*
- * TDO_READ
- * function:Read the TDO level
- */
-static int TDO_READ(void)
-{
-    if (function_fmw_cpld.read_tdo != NULL) {
-        return function_fmw_cpld.read_tdo();
-    } else {
-        FIRMWARE_DRIVER_DEBUG_ERROR("NO support TDO_READ.\n");
-        return -1;
-    }
-}
-
-/*
- * cpld_upgrade_init
- * function:Initialize GPIO and CPLD
- * return value: success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-static int cpld_upgrade_init(void)
-{
-    int ret;
-
-    if (function_fmw_cpld.init_cpld != NULL) {
-        ret = function_fmw_cpld.init_cpld();
-        if (ret != FIRMWARE_SUCCESS) {
-            return ret;
-        }
-    }
-
-    return FIRMWARE_SUCCESS;
-}
-
-/*
- * cpld_upgrade_finish
- * function:Release GPIO and CPLD
- * return value: success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-static int cpld_upgrade_finish(void)
-{
-    int ret;
-
-    if (function_fmw_cpld.finish_cpld != NULL) {
-        ret = function_fmw_cpld.finish_cpld();
-        if (ret != FIRMWARE_SUCCESS) {
-            return ret;
-        }
-    }
-
-    return FIRMWARE_SUCCESS;
-}
-
-/**
- * firmware_init_vme
- * function: Initialize GPIO,
- * @cpld_info: param[in] Information about the device to be written to
- */
-int firmware_init_vme(firmware_cpld_t *cpld_info){
-    int ret;
-    set_currrent_cpld_info(cpld_info);
-    /* Initialize GPIO and CPLD */
-    ret = cpld_upgrade_init();
-    return ret;
-}
-
-/**
- * firmware_finish_vme
- * function: Release GPIO
- * @cpld_info: param[in] Information about the device to be written to
- */
-int firmware_finish_vme(firmware_cpld_t *cpld_info){
-    int ret;
-    set_currrent_cpld_info(cpld_info);
-    ret = cpld_upgrade_finish();
-    return ret;
-}
-
-/**
- * fwm_cpld_tdi_op
- * function: Operate TDI
- * @value: param[in] TDI level */
-int fwm_cpld_tdi_op(int value)
-{
-    if (value) {
-        return TDI_PULL_UP();
-    } else {
-        return TDI_PULL_DOWN();
-    }
-}
-
-/**
- * fwm_cpld_tck_op
- * function: Operate TCK
- * @value: param[in] TCK level */
-int fwm_cpld_tck_op(int value)
-{
-    if (value) {
-        return TCK_PULL_UP();
-    } else {
-        return TCK_PULL_DOWN();
-    }
-}
-
-/**
- * fwm_cpld_tms_op
- * function: Operate TMS
- * value: param[in] TMS level */
-int fwm_cpld_tms_op(int value)
-{
-    if (value) {
-        return TMS_PULL_UP();
-    } else {
-        return TMS_PULL_DOWN();
-    }
-}
-
-/**
- * fwm_cpld_tdo_op
- * function: Read TDO
- */
-int fwm_cpld_tdo_op()
-{
-    return TDO_READ();
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/firmware_ispvme.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/firmware_ispvme.c
deleted file mode 100644
index e8f75844ae34..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/firmware_ispvme.c
+++ /dev/null
@@ -1,140 +0,0 @@
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <firmware_ispvme.h>
-
-int g_firmware_driver_debug = 0;
-module_param(g_firmware_driver_debug, int, S_IRUGO | S_IWUSR);
-
-static LIST_HEAD(drv_list);
-static LIST_HEAD(dev_list);
-
-/**
- * firmware_driver_register
- * function:Registered Device Driver
- * @fw_drv:param[in] Driver information
- * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-int firmware_driver_register(firmware_driver_t *fw_drv)
-{
-    int ret;
-
-    if (fw_drv == NULL) {
-        return FIRMWARE_FAILED;
-    }
-
-    ret = platform_driver_register(fw_drv->drv);
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: failed to register firmware upgrade driver \n");
-        return FIRMWARE_FAILED;
-    }
-
-    /* Adds driver information to the driver list */
-    list_add(&fw_drv->list, &drv_list);
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware upgrade driver register sucess \n");
-
-    return FIRMWARE_SUCCESS;
-}
-
-/**
- * firmware_driver_unregister
- * function:unregister Device Driver
- * @fw_drv:param[in] Driver information
- */
-void firmware_driver_unregister(firmware_driver_t *fw_drv)
-{
-    list_del_init(&fw_drv->list);
-    platform_driver_unregister(fw_drv->drv);
-}
-
-/*
- * firmware_get_device_by_minor
- * function: Get device information based on minor
- */
-firmware_device_t *firmware_get_device_by_minor(int minor)
-{
-    firmware_device_t *tmp;
-
-    list_for_each_entry(tmp, &dev_list, list) {
-        if (tmp->dev.minor == minor) {
-            return tmp;
-        }
-    }
-
-    return NULL;
-}
-
-/**
- * firmware_device_register
- * function:Registered Driver Device
- * @fw_dev: param[in] Driver information
- * return value:success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-int firmware_device_register(firmware_device_t *fw_dev)
-{
-    int ret;
-    firmware_device_t *tmp;
-
-    if (fw_dev == NULL) {
-        return FIRMWARE_FAILED;
-    }
-    /* Check whether the device file name already exists in the device linked list */
-    list_for_each_entry(tmp, &dev_list, list) {
-        if (strcmp(tmp->name, fw_dev->name) == 0) {
-            return FIRMWARE_FAILED;
-        }
-    }
-
-    /* Registere device */
-    ret = misc_register(&fw_dev->dev);
-    if (ret < 0) {
-        return FIRMWARE_FAILED;
-    }
-
-    /* Adds a device to the device list */
-    list_add(&fw_dev->list, &dev_list);
-
-    return FIRMWARE_SUCCESS;
-}
-
-/**
- * firmware_device_unregister
- * function: unregister Driver Device
- */
-void firmware_device_unregister(firmware_device_t *fw_dev)
-{
-    list_del(&fw_dev->list);
-    misc_deregister(&fw_dev->dev);
-}
-
-static int __init firmware_driver_init(void)
-{
-    int ret;
-
-    INIT_LIST_HEAD(&drv_list);
-    INIT_LIST_HEAD(&dev_list);
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware driver ispvme init.\n");
-    ret = firmware_cpld_init();
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("firmware driver ispvme init failed.\n");
-        return FIRMWARE_FAILED;
-    }
-
-    return FIRMWARE_SUCCESS;
-}
-
-static void __exit firmware_driver_exit(void)
-{
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware driver ispvme exit.\n");
-    firmware_cpld_exit();
-    INIT_LIST_HEAD(&drv_list);
-    INIT_LIST_HEAD(&dev_list);
-    return;
-}
-
-module_init(firmware_driver_init);
-module_exit(firmware_driver_exit);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("Firmware upgrade ispvme driver");
-MODULE_LICENSE("GPL");
-MODULE_VERSION("1.0");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/include/firmware_cpld_ispvme.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/include/firmware_cpld_ispvme.h
deleted file mode 100644
index eb737d3a56ed..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/include/firmware_cpld_ispvme.h
+++ /dev/null
@@ -1,70 +0,0 @@
-#ifndef __FIRMWARE_CPLD_H__
-#define __FIRMWARE_CPLD_H__
-
-#define FIRMWARE_DEV_NAME_LEN     32
-#define FIRMWARE_MAX_CPLD_NUM     16
-#define FIRMWARE_TYPE_LEN         10
-#define FIRMWARE_EN_INFO_MAX      16
-#define FIRMWARE_EN_INFO_BUF      128
-
-typedef struct firmware_gpio_jtag_en_s {
-    uint32_t en_gpio;                                               /* GPIO enable pin */
-    uint32_t en_level;                                              /* GPIO enable level */
-    int flag;                                                       /* init flag; 1-init 0-not init */
-} firmware_gpio_jtag_en_t;
-
-typedef struct firmware_logic_dev_en_s {
-    char dev_name[FIRMWARE_DEV_NAME_LEN];        /* Logical device name */
-    uint32_t addr;                               /* Enable register address */
-    uint32_t mask;                               /* mask */
-    uint32_t en_val;                             /* Enable value */
-    uint32_t dis_val;                            /* Disable value*/
-    uint32_t width;                              /* width */
-    int flag;                                    /* init flag; 1-init 0-not init */
-} firmware_logic_dev_en_t;
-
-typedef struct firmware_cpld_s {
-    char devname[FIRMWARE_DEV_NAME_LEN];                        /* Device name */
-    char type[FIRMWARE_TYPE_LEN];                               /* interface type */
-    uint32_t tdi;                                               /* TDI signal corresponding to GPIO pin information */
-    uint32_t tck;                                               /* TCK signal corresponding to GPIO pin information */
-    uint32_t tms;                                               /* TMS signal corresponding to GPIO pin information */
-    uint32_t tdo;                                               /* TDO signal corresponding to GPIO pin information */
-    uint32_t chain;                                             /* chain num */
-    uint32_t chip_index;                                        /* chip index */
-    uint32_t tck_delay;                                         /* Delay time */
-    uint32_t gpio_en_info_num;                                  /* GPIO Enable Number */
-    firmware_gpio_jtag_en_t gpio_en_info[FIRMWARE_EN_INFO_MAX]; /* GPIO Enable Information */
-    uint32_t logic_dev_en_num;                                           /* Register Enable Number */
-    firmware_logic_dev_en_t logic_dev_en_info[FIRMWARE_EN_INFO_MAX]; /* Register Enable Information */
-} firmware_cpld_t;
-
-typedef struct firmware_cpld_function_s{
-    int (*pull_tdi_up)(void);                          /* TDI pull-up */
-    int (*pull_tdi_down)(void);                        /* TDI pull-down */
-    int (*pull_tck_up)(void);                          /* TCK pull-up */
-    int (*pull_tck_down)(void);                        /* TCK pull-down */
-    int (*pull_tms_up)(void);                          /* TMS pull-up */
-    int (*pull_tms_down)(void);                        /* TCK pull-down */
-    int (*read_tdo)(void);                             /* Read TDO */
-    int (*init_cpld)(void);                            /* CPLD upgrade initializes the operation */
-    int (*init_chip)(int chain);                       /* chip initializes the operation */
-    int (*finish_chip)(int chain);                     /* chip completes the operation*/
-    int (*finish_cpld)(void);                          /* CPLD upgrade completes the operation */
-    int (*get_version)(int chain, char *ver, int len); /* get version */
-}firmware_cpld_function_t;
-
-/* operate TDI */
-extern int fwm_cpld_tdi_op(int value);
-/* operate TCK */
-extern int fwm_cpld_tck_op(int value);
-/* operate TMS */
-extern int fwm_cpld_tms_op(int value);
-/* operate TDO */
-extern int fwm_cpld_tdo_op(void);
-/* VME upgrade mode completes the operation*/
-extern int firmware_finish_vme(firmware_cpld_t *cpld_info);
-/* VME upgrade mode initializes the operation*/
-extern int firmware_init_vme(firmware_cpld_t *cpld_info);
-
-#endif /* __FIRMWARE_CPLD_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/include/firmware_ispvme.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/include/firmware_ispvme.h
deleted file mode 100644
index 39baf3f30717..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_ispvme/include/firmware_ispvme.h
+++ /dev/null
@@ -1,86 +0,0 @@
-#ifndef __FIRMWARE_H__
-#define __FIRMWARE_H__
-
-#include <linux/miscdevice.h>
-#include <linux/platform_device.h>
-
-#include <asm/ioctl.h>
-
-/* Debug switch level */
-typedef enum {
-    FIRWMARE_VERBOSE,
-    FIRWMARE_WARN,
-    FIRWMARE_ERROR,
-    FIRWMARE_END,
-} firmware_debug_level_t;
-
-#define FIRMWARE_DRIVER_DEBUG_VERBOSE(fmt, args...) do { \
-    if ((g_firmware_driver_debug) & (1U << FIRWMARE_VERBOSE)) { \
-        printk(KERN_INFO "[FIRMWARW_DRIVER_ISPVME][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-#define FIRMWARE_DRIVER_DEBUG_ERROR(fmt, args...) do { \
-    if ((g_firmware_driver_debug) & (1U << FIRWMARE_ERROR)) { \
-        printk(KERN_ERR "[FIRMWARW_DRIVER_ISPVME][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-#define FIRMWARE_NAME_LEN      48
-
-#define FIRMWARE_FAILED              (-1)
-#define FIRMWARE_SUCCESS             0
-
-/* ioctl publi command, the same as "firmware_upgrade\include\firmware_app.h" */
-#define FIRMWARE_COMMON_TYPE 'C'
-#define FIRMWARE_GET_CHIPNAME            _IOR(FIRMWARE_COMMON_TYPE, 0, char)    /* get the chip name */
-#define FIRMWARE_GET_VERSION             _IOR(FIRMWARE_COMMON_TYPE, 2, int)     /* get version */
-
-/* firmware cpld ispvme driver ioctl command, the same as "firmware_upgrade\include\firmware_app.h" */
-#define FIRMWARE_VME_TYPE 'V'
-#define FIRMWARE_JTAG_TDI                _IOR(FIRMWARE_VME_TYPE, 0, char)
-#define FIRMWARE_JTAG_TDO                _IOR(FIRMWARE_VME_TYPE, 1, char)
-#define FIRMWARE_JTAG_TCK                _IOR(FIRMWARE_VME_TYPE, 2, char)
-#define FIRMWARE_JTAG_TMS                _IOR(FIRMWARE_VME_TYPE, 3, char)
-#define FIRMWARE_JTAG_EN                 _IOR(FIRMWARE_VME_TYPE, 4, char)
-#define FIRMWARE_JTAG_INIT               _IOR(FIRMWARE_VME_TYPE, 7, char)   /* enable upgrade access */
-#define FIRMWARE_JTAG_FINISH             _IOR(FIRMWARE_VME_TYPE, 8, char)   /* disable upgrade access */
-
-typedef struct cmd_info_s {
-    uint32_t size;
-    void __user *data;
-} cmd_info_t;
-
-typedef struct firmware_device_s {
-    struct list_head list;             /* device list */
-    uint32_t chain;                    /* chain number */
-    char name[FIRMWARE_NAME_LEN];      /* name */
-    struct miscdevice dev;             /* device */
-    void *priv;                        /* private data */
-} firmware_device_t;
-
-typedef struct firmware_driver_s {
-    struct list_head list;             /* list */
-    char name[FIRMWARE_NAME_LEN];      /* name */
-    struct platform_driver *drv;       /* driver */
-    void *priv;                        /* private data */
-} firmware_driver_t;
-
-extern int g_firmware_driver_debug;
-
-/* Get device information based on minor */
-extern firmware_device_t *firmware_get_device_by_minor(int minor);
-/* Registere device */
-extern int firmware_device_register(firmware_device_t *fw_dev);
-/* Unregister device */
-extern void firmware_device_unregister(firmware_device_t *fw_dev);
-/* Registere driver */
-extern int firmware_driver_register(firmware_driver_t *fw_drv);
-/* Unregister driver */
-extern void firmware_driver_unregister(firmware_driver_t *fw_drv);
-/* CPLD upgrade initialized */
-extern int firmware_cpld_init(void);
-/* CPLD unload function */
-extern void firmware_cpld_exit(void);
-
-#endif /* end of __FIRMWARE_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/Makefile
deleted file mode 100644
index a1d6d2e2ef68..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/Makefile
+++ /dev/null
@@ -1,22 +0,0 @@
-#include $(top_srcdir)/debian/rules
-#KERNELDIR := ${KBUILD_OUTPUT}
-
-PWD		= $(shell pwd)
-
-EXTRA_CFLAGS:= -I$(M)/include
-MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
-FIRMWARE_UPGRADE_PATH = $(abspath $(MAKEFILE_FILE_PATH)/../../include)
-EXTRA_CFLAGS+= -I$(FIRMWARE_UPGRADE_PATH)
-EXTRA_CFLAGS+= -Wall
-
-firmware_driver_sysfs-objs := firmware.o
-firmware_driver_sysfs-objs += firmware_sysfs.o firmware_sysfs_upgrade.o
-
-#ifndef CONFIG_FRM_PRODUCT_FILE
-
-$(warning $(firmware_driver_sysfs-objs))
-obj-m := firmware_driver_sysfs.o
-all:
-	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
-	@if [ ! -d $(common_module_dir) ]; then mkdir -p $(common_module_dir) ;fi
-	cp -p  $(PWD)/*.ko $(common_module_dir)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/firmware.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/firmware.c
deleted file mode 100644
index fec51d6238a6..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/firmware.c
+++ /dev/null
@@ -1,143 +0,0 @@
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <firmware_sysfs.h>
-
-int g_firmware_driver_debug = 0;
-module_param(g_firmware_driver_debug, int, S_IRUGO | S_IWUSR);
-
-static LIST_HEAD(drv_list);
-static LIST_HEAD(dev_list);
-
-/**
- * firmware_driver_register
- * function:Registered Device Driver
- * @fw_drv:param[in] Driver information
- * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-int firmware_driver_register(firmware_driver_t *fw_drv)
-{
-    int ret;
-
-    if (fw_drv == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Parameter error.\n");
-        return FIRMWARE_FAILED;
-    }
-
-    ret = platform_driver_register(fw_drv->drv);
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: failed to register firmware upgrade driver \n");
-        return FIRMWARE_FAILED;
-    }
-
-    /* Adds driver information to the driver list */
-    list_add(&fw_drv->list, &drv_list);
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware upgrade driver register sucess \n");
-
-    return FIRMWARE_SUCCESS;
-}
-
-/**
- * firmware_driver_unregister
- * function:unregister Device Driver
- * @fw_drv:param[in] Driver information
- */
-void firmware_driver_unregister(firmware_driver_t *fw_drv)
-{
-    list_del_init(&fw_drv->list);
-    platform_driver_unregister(fw_drv->drv);
-}
-
-/*
- * firmware_get_device_by_minor
- * function: Get device information based on minor
- */
-firmware_device_t *firmware_get_device_by_minor(int minor)
-{
-    firmware_device_t *tmp;
-
-    list_for_each_entry(tmp, &dev_list, list) {
-        if (tmp->dev.minor == minor) {
-            return tmp;
-        }
-    }
-
-    return NULL;
-}
-
-/**
- * firmware_device_register
- * function:Registered Driver Device
- * @fw_dev: param[in] Driver information
- * return value:success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-int firmware_device_register(firmware_device_t *fw_dev)
-{
-    int ret;
-    firmware_device_t *tmp;
-
-    if (fw_dev == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Parameter error.\n");
-        return FIRMWARE_FAILED;
-    }
-    /* Check whether the device file name already exists in the device linked list */
-    list_for_each_entry(tmp, &dev_list, list) {
-        if (strcmp(tmp->name, fw_dev->name) == 0) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("devie %s already exists.\n", fw_dev->name);
-            return FIRMWARE_FAILED;
-        }
-    }
-
-    ret = misc_register(&fw_dev->dev);
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("register misc error, ret=%d.\n", ret);
-        return FIRMWARE_FAILED;
-    }
-
-    /* Adds driver information to the driver list */
-    list_add(&fw_dev->list, &dev_list);
-
-    return FIRMWARE_SUCCESS;
-}
-
-/**
- * firmware_device_unregister
- * function: unregister Driver Device
- */
-void firmware_device_unregister(firmware_device_t *fw_dev)
-{
-    list_del(&fw_dev->list);
-    misc_deregister(&fw_dev->dev);
-}
-
-static int __init firmware_driver_init(void)
-{
-    int ret;
-
-    INIT_LIST_HEAD(&drv_list);
-    INIT_LIST_HEAD(&dev_list);
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware driver sysfs init.\n");
-    ret = firmware_sysfs_init();
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("firmware driver sysfs init failed.\n");
-        return FIRMWARE_FAILED;
-    }
-
-    return FIRMWARE_SUCCESS;
-}
-
-static void __exit firmware_driver_exit(void)
-{
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware driver sysfs exit.\n");
-    firmware_sysfs_exit();
-    INIT_LIST_HEAD(&drv_list);
-    INIT_LIST_HEAD(&dev_list);
-    return;
-}
-
-module_init(firmware_driver_init);
-module_exit(firmware_driver_exit);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("Firmware upgrade driver");
-MODULE_LICENSE("GPL");
-MODULE_VERSION("1.0");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/firmware_sysfs.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/firmware_sysfs.c
deleted file mode 100644
index fef5b43c9db8..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/firmware_sysfs.c
+++ /dev/null
@@ -1,495 +0,0 @@
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/kdev_t.h>
-#include <linux/slab.h>
-#include <linux/fs.h>
-#include <linux/of.h>
-#include <linux/uaccess.h>
-#include <firmware_sysfs.h>
-#include <firmware_sysfs_upgrade.h>
-#include <firmware_upgrade.h>
-
-static int firmware_sysfs_open(struct inode *inode, struct file *file)
-{
-    firmware_device_t *frm_dev;
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Open device.\n");
-    frm_dev = firmware_get_device_by_minor(MINOR(inode->i_rdev));
-    if (frm_dev == NULL) {
-        return -ENXIO;
-    }
-    file->private_data = frm_dev;
-
-    return FIRMWARE_SUCCESS;
-}
-
-static ssize_t firmware_sysfs_read (struct file *file, char __user *buf, size_t count,
-                                   loff_t *offset)
-{
-    return 0;
-}
-
-static ssize_t firmware_sysfs_write (struct file *file, const char __user *buf, size_t count,
-                                    loff_t *offset)
-{
-    return 0;
-}
-
-static loff_t firmware_sysfs_llseek(struct file *file, loff_t offset, int origin)
-{
-    return 0;
-}
-
-/* firmware_sysfs_ioctl
-* function:ioctl command parsing function
-* @file: param[in] device file name
-* @cmd:  param[in] command
-* @arg:  param[in] the parameters in the command
-* return value: success-FIRMWARE_SUCCESS; fail:other value
-*/
-static long firmware_sysfs_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
-{
-    void __user *argp;
-    firmware_device_t *frm_dev;
-    firmware_sysfs_t *sysfs_info;
-    int ret;
-
-    /* Get device private data */
-    frm_dev = (firmware_device_t *)file->private_data;
-    sysfs_info = NULL;
-    if (frm_dev != NULL) {
-        if (frm_dev->priv != NULL) {
-            sysfs_info = (firmware_sysfs_t *)frm_dev->priv;
-        }
-    }
-    if (sysfs_info == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to frm_dev->priv sysfs info.\n");
-        return FIRMWARE_FAILED;
-    }
-    argp = (void __user *)arg;
-
-    switch (cmd) {
-    case FIRMWARE_SYSFS_INIT:
-        /* enable upgrade access */
-        ret = firmware_init_dev_loc(sysfs_info);
-        if (ret != FIRMWARE_SUCCESS) {
-           FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to init upgrade.(chain = %d)\n",
-                frm_dev != NULL ? frm_dev->chain : -1);
-           return FIRMWARE_FAILED;
-        }
-        break;
-    case FIRMWARE_SYSFS_FINISH:
-        /* disable upgrade access */
-        ret = firmware_finish_dev_loc(sysfs_info);
-        if (ret != FIRMWARE_SUCCESS) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("Error: Failed to release upgrade.(chain = %d)\n",
-                frm_dev != NULL ? frm_dev->chain : -1);
-            return FIRMWARE_FAILED;
-        }
-        break;
-    case FIRMWARE_SYSFS_SPI_INFO:
-        /* Get SPI logic device information */
-        if (copy_to_user(argp, &sysfs_info->info.spi_logic_info, sizeof(firmware_spi_logic_info_t))) {
-            return -EFAULT;
-        }
-        break;
-    case FIRMWARE_SYSFS_DEV_FILE_INFO:
-        /*Get logic device information */
-        if (copy_to_user(argp, &sysfs_info->info.dev_file_info, sizeof(firmware_dev_file_info_t))) {
-            return -EFAULT;
-        }
-        break;
-    case FIRMWARE_SYSFS_MTD_INFO:
-        /*Get logic device information */
-        if (copy_to_user(argp, &sysfs_info->info.mtd_info, sizeof(firmware_mtd_info_t))) {
-            return -EFAULT;
-        }
-        break;
-    default:
-        FIRMWARE_DRIVER_DEBUG_ERROR("not find cmd: %d\r\n", cmd);
-        return -ENOTTY;
-    } /* End of switch */
-
-    return FIRMWARE_SUCCESS;
-}
-
-static int firmware_sysfs_release(struct inode *inode, struct file *file)
-{
-    return 0;
-}
-
-static const struct file_operations sysfs_dev_fops = {
-    .owner      = THIS_MODULE,
-    .llseek     = firmware_sysfs_llseek,
-    .read       = firmware_sysfs_read,
-    .write      = firmware_sysfs_write,
-    .unlocked_ioctl = firmware_sysfs_ioctl,
-    .open       = firmware_sysfs_open,
-    .release    = firmware_sysfs_release,
-};
-
-/* Gets the information in the device tree */
-static int of_firmware_upgrade_config_init(struct device *dev, firmware_sysfs_t *sysfs_info)
-{
-    int ret;
-    char *name;
-    int8_t buf[64];
-    int i;
-    firmware_logic_dev_en_t *firmware_logic_dev_en_point;
-    uint32_t test_base, test_size;
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Enter firmware_dev_loc_config_init\r\n");
-    if (sysfs_info == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("info is null\r\n");
-        return -1;
-    }
-
-    mem_clear(sysfs_info, sizeof(firmware_sysfs_t));
-    ret = 0;
-    ret += of_property_read_string(dev->of_node, "type", (const char **)&name);
-
-    ret += of_property_read_u32(dev->of_node, "chain", &sysfs_info->chain);
-    ret += of_property_read_u32(dev->of_node, "chip_index", &sysfs_info->chip_index);
-    if (ret != 0) {
-       FIRMWARE_DRIVER_DEBUG_ERROR("dts config error, ret:%d.\n", ret);
-       return -ENXIO;
-    }
-    strncpy(sysfs_info->type, name, sizeof(sysfs_info->type) - 1);
-
-    ret = of_property_read_u32(dev->of_node, "test_base", &test_base);
-    if (ret != 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("dts config test_base, ret:%d.\n", ret);
-        test_base = 0;
-    }
-
-    ret = of_property_read_u32(dev->of_node, "test_size", &test_size);
-    if (ret != 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("dts config test_size, ret:%d.\n", ret);
-        test_size = 0;
-    }
-
-    if (strcmp(sysfs_info->type, FIRMWARE_SYSFS_TYPE_SPI_LOGIC) == 0) {
-        ret = of_property_read_string(dev->of_node, "dev_name", (const char **)&name);
-        if (ret != 0) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("dts config dev_name error, ret:%d.\n", ret);
-            return -ENXIO;
-        }
-        strncpy(sysfs_info->info.spi_logic_info.dev_name, name, FIRMWARE_DEV_NAME_LEN - 1);
-
-        ret = of_property_read_u32(dev->of_node, "flash_base", &sysfs_info->info.spi_logic_info.flash_base);
-        if (ret != 0) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("dts config flash_base error, ret:%d.\n", ret);
-            return -ENXIO;
-        }
-
-        ret = of_property_read_u32(dev->of_node, "ctrl_base", &sysfs_info->info.spi_logic_info.ctrl_base);
-        if (ret != 0) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("dts config ctrl_base error, ret:%d.\n", ret);
-            return -ENXIO;
-        }
-        sysfs_info->info.spi_logic_info.test_base = test_base;
-        sysfs_info->info.spi_logic_info.test_size = test_size;
-    } else if (strcmp(sysfs_info->type, FIRMWARE_SYSFS_TYPE_SYSFS) == 0) {
-        ret = of_property_read_string(dev->of_node, "sysfs_name", (const char **)&name);
-        if (ret != 0) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("dts config sysfs_name error, ret:%d.\n", ret);
-            return -ENXIO;
-        }
-        strncpy(sysfs_info->info.dev_file_info.sysfs_name, name, FIRMWARE_DEV_NAME_LEN - 1);
-
-        ret = of_property_read_u32(dev->of_node, "dev_base", &sysfs_info->info.dev_file_info.dev_base);
-        if (ret != 0) {
-            FIRMWARE_DRIVER_DEBUG_VERBOSE("dts don't config dev_base, dev_base is 0.\n");
-            sysfs_info->info.dev_file_info.dev_base = 0;
-        }
-
-        ret = of_property_read_u32(dev->of_node, "per_len", &sysfs_info->info.dev_file_info.per_len);
-        if (ret != 0) {
-            FIRMWARE_DRIVER_DEBUG_VERBOSE("dts don't config per_len, per_len is 0.\n");
-            sysfs_info->info.dev_file_info.per_len = 0;
-        }
-        sysfs_info->info.dev_file_info.test_base = test_base;
-        sysfs_info->info.dev_file_info.test_size = test_size;
-    } else if (strcmp(sysfs_info->type, FIRMWARE_SYSFS_TYPE_MTD) == 0) {
-        ret = of_property_read_string(dev->of_node, "mtd_name", (const char **)&name);
-        if (ret != 0) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("dts config mtd_name error, ret:%d.\n", ret);
-            return -ENXIO;
-        }
-        strncpy(sysfs_info->info.mtd_info.mtd_name, name, FIRMWARE_DEV_NAME_LEN - 1);
-
-        ret = of_property_read_u32(dev->of_node, "flash_base", &sysfs_info->info.mtd_info.flash_base);
-        if (ret != 0) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("dts config flash_base error, ret:%d.\n", ret);
-            return -ENXIO;
-        }
-        sysfs_info->info.mtd_info.test_base = test_base;
-        sysfs_info->info.mtd_info.test_size = test_size;
-    } else {
-        FIRMWARE_DRIVER_DEBUG_ERROR("dts config sysfs type[%s] is not support, ret:%d.\n", sysfs_info->type, ret);
-        return -ENXIO;
-    }
-
-    sysfs_info->gpio_en_info_num = 0;
-    /* Enable through GPIO */
-    for (i = 0; i < FIRMWARE_EN_INFO_MAX; i++) {
-        mem_clear(buf, sizeof(buf));
-        snprintf(buf, sizeof(buf) - 1, "en_gpio_%d", i);
-        ret = of_property_read_u32(dev->of_node, buf, &sysfs_info->gpio_en_info[i].en_gpio);
-        if(ret != 0) {
-            break;
-        }
-
-        mem_clear(buf, sizeof(buf));
-        snprintf(buf, sizeof(buf) - 1, "en_level_%d", i);
-        ret = of_property_read_u32(dev->of_node, buf, &sysfs_info->gpio_en_info[i].en_level);
-        if(ret != 0) {
-            break;
-        }
-        sysfs_info->gpio_en_info_num++;
-    }
-
-    sysfs_info->logic_dev_en_num = 0;
-    /* Enable through register */
-    for (i = 0; i < FIRMWARE_EN_INFO_MAX; i++) {
-        firmware_logic_dev_en_point = &sysfs_info->logic_dev_en_info[i];
-        mem_clear(buf, sizeof(buf));
-        snprintf(buf, sizeof(buf) - 1, "en_logic_dev_%d", i);
-        ret = 0;
-        ret += of_property_read_string(dev->of_node, buf, (const char **)&name);
-        if(ret != 0) {
-            /* Failure to resolve to EN_LOGIC_DEV means no logical device is enabled. No failure is returned */
-            ret = 0;
-            break;
-        }
-        strncpy(firmware_logic_dev_en_point->dev_name, name, FIRMWARE_DEV_NAME_LEN - 1);
-
-        mem_clear(buf, sizeof(buf));
-        snprintf(buf, sizeof(buf) - 1, "en_logic_addr_%d", i);
-        ret = of_property_read_u32(dev->of_node, buf, &firmware_logic_dev_en_point->addr);
-        if (ret != 0) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to config en en_logic_addr_%d ret =%d.\n", i, ret);
-            break;
-        }
-
-        mem_clear(buf, sizeof(buf));
-        snprintf(buf, sizeof(buf) - 1, "en_logic_mask_%d", i);
-        ret = of_property_read_u32(dev->of_node, buf, &firmware_logic_dev_en_point->mask);
-        if (ret != 0) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to config en en_logic_mask_%d ret =%d.\n", i, ret);
-            break;
-        }
-
-        mem_clear(buf, sizeof(buf));
-        snprintf(buf, sizeof(buf) - 1, "en_logic_en_val_%d", i);
-        ret = of_property_read_u32(dev->of_node, buf, &firmware_logic_dev_en_point->en_val);
-        if (ret != 0) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to config en en_logic_en_val_%d ret =%d.\n", i, ret);
-            break;
-        }
-
-        mem_clear(buf, sizeof(buf));
-        snprintf(buf, sizeof(buf) - 1, "en_logic_dis_val_%d", i);
-        ret = of_property_read_u32(dev->of_node, buf, &firmware_logic_dev_en_point->dis_val);
-        if (ret != 0) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to config en en_logic_dis_val_%d ret =%d.\n", i, ret);
-            break;
-        }
-
-        mem_clear(buf, sizeof(buf));
-        snprintf(buf, sizeof(buf) - 1, "en_logic_width_%d", i);
-        ret = of_property_read_u32(dev->of_node, buf, &firmware_logic_dev_en_point->width);
-        if (ret != 0) {
-            FIRMWARE_DRIVER_DEBUG_ERROR("Failed to config en en_logic_width_%d ret =%d.\n", i, ret);
-            break;
-        }
-
-        sysfs_info->logic_dev_en_num++;
-    }
-
-    return ret;
-}
-
-static int firmware_upgrade_config_init(struct device *dev, firmware_sysfs_t *sysfs_info)
-{
-    int i;
-    firmware_logic_dev_en_t *firmware_logic_dev_en_point;
-    firmware_upgrade_device_t *firmware_upgrade_device;
-    firmware_sysfs_device_t sysfs_upg_device;
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Enter firmware_dev_loc_config_init\r\n");
-    if (sysfs_info == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("info is null\r\n");
-        return -1;
-    }
-
-    if (dev->platform_data == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("platform data config error.\n");
-        return -1;
-    }
-    firmware_upgrade_device = dev->platform_data;
-    sysfs_upg_device = firmware_upgrade_device->upg_type.sysfs;
-
-    mem_clear(sysfs_info, sizeof(firmware_sysfs_t));
-    strncpy(sysfs_info->type, firmware_upgrade_device->type, sizeof(sysfs_info->type) - 1);
-    sysfs_info->chain = firmware_upgrade_device->chain;
-    sysfs_info->chip_index = firmware_upgrade_device->chip_index;
-
-    if (strcmp(sysfs_info->type, FIRMWARE_SYSFS_TYPE_SPI_LOGIC) == 0) {
-        strncpy(sysfs_info->info.spi_logic_info.dev_name, sysfs_upg_device.dev_name, FIRMWARE_DEV_NAME_LEN - 1);
-        sysfs_info->info.spi_logic_info.flash_base = sysfs_upg_device.flash_base;
-        sysfs_info->info.spi_logic_info.ctrl_base = sysfs_upg_device.ctrl_base;
-        sysfs_info->info.spi_logic_info.test_base = sysfs_upg_device.test_base;
-        sysfs_info->info.spi_logic_info.test_size = sysfs_upg_device.test_size;
-    } else if (strcmp(sysfs_info->type, FIRMWARE_SYSFS_TYPE_SYSFS) == 0) {
-        strncpy(sysfs_info->info.dev_file_info.sysfs_name, sysfs_upg_device.sysfs_name, FIRMWARE_DEV_NAME_LEN - 1);
-        sysfs_info->info.dev_file_info.dev_base = sysfs_upg_device.dev_base;
-        sysfs_info->info.dev_file_info.per_len = sysfs_upg_device.per_len;
-        sysfs_info->info.dev_file_info.test_base = sysfs_upg_device.test_base;
-        sysfs_info->info.dev_file_info.test_size = sysfs_upg_device.test_size;
-    } else if (strcmp(sysfs_info->type, FIRMWARE_SYSFS_TYPE_MTD) == 0) {
-        strncpy(sysfs_info->info.mtd_info.mtd_name, sysfs_upg_device.mtd_name, FIRMWARE_DEV_NAME_LEN - 1);
-        sysfs_info->info.mtd_info.flash_base = sysfs_upg_device.flash_base;
-        sysfs_info->info.mtd_info.test_base = sysfs_upg_device.test_base;
-        sysfs_info->info.mtd_info.test_size = sysfs_upg_device.test_size;
-    } else {
-        FIRMWARE_DRIVER_DEBUG_ERROR("config sysfs type[%s] is not support.\n", sysfs_info->type);
-        return -ENXIO;
-    }
-
-    if (firmware_upgrade_device->en_gpio_num > FIRMWARE_EN_INFO_MAX) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("The number of en_gpio_num:%u configurations exceeds the maximum limit:%u.\n",
-            firmware_upgrade_device->en_gpio_num, FIRMWARE_EN_INFO_MAX);
-        return -ENXIO;
-    }
-    sysfs_info->gpio_en_info_num = firmware_upgrade_device->en_gpio_num;
-    /* Enable through GPIO */
-    for (i = 0; i < sysfs_info->gpio_en_info_num; i++) {
-        sysfs_info->gpio_en_info[i].en_gpio = firmware_upgrade_device->en_gpio[i];
-        sysfs_info->gpio_en_info[i].en_level = firmware_upgrade_device->en_level[i];
-    }
-
-    if (firmware_upgrade_device->en_logic_num > FIRMWARE_EN_INFO_MAX) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("The number of en_logic_num:%u configurations exceeds the maximum limit:%u.\n",
-            firmware_upgrade_device->en_logic_num, FIRMWARE_EN_INFO_MAX);
-        return -ENXIO;
-    }
-    sysfs_info->logic_dev_en_num = firmware_upgrade_device->en_logic_num;
-    /* Enable through register */
-    for (i = 0; i < sysfs_info->logic_dev_en_num; i++) {
-        firmware_logic_dev_en_point = &sysfs_info->logic_dev_en_info[i];
-        strncpy(firmware_logic_dev_en_point->dev_name, firmware_upgrade_device->en_logic_dev[i], FIRMWARE_DEV_NAME_LEN - 1);
-        firmware_logic_dev_en_point->addr = firmware_upgrade_device->en_logic_addr[i];
-        firmware_logic_dev_en_point->mask = firmware_upgrade_device->en_logic_mask[i];
-        firmware_logic_dev_en_point->en_val = firmware_upgrade_device->en_logic_en_val[i];
-        firmware_logic_dev_en_point->dis_val = firmware_upgrade_device->en_logic_dis_val[i];
-        firmware_logic_dev_en_point->width = firmware_upgrade_device->en_logic_width[i];
-    }
-
-    return 0;
-}
-
-static int firmware_sysfs_probe(struct platform_device *pdev)
-{
-    int ret;
-    firmware_sysfs_t *sysfs_info;
-    firmware_device_t *frm_dev;
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Enter firmware_sysfs_probe\r\n");
-    sysfs_info = devm_kzalloc(&pdev->dev, sizeof(firmware_sysfs_t), GFP_KERNEL);
-    if (sysfs_info == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to kzalloc device tree.\n");
-        return -EPERM;
-    }
-
-    if (pdev->dev.of_node) {
-        ret = of_firmware_upgrade_config_init(&pdev->dev, sysfs_info);
-    } else {
-        ret = firmware_upgrade_config_init(&pdev->dev, sysfs_info);
-    }
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("get config init from dts error.\n");
-        return -EPERM;
-    }
-
-    frm_dev = devm_kzalloc(&pdev->dev, sizeof(firmware_device_t), GFP_KERNEL);
-    if (frm_dev == NULL) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to kzalloc firmware device.\n");
-        return -EPERM;
-    }
-
-    /* Based on the link number, determine the name of the device file */
-    frm_dev->chain = sysfs_info->chain;
-    snprintf(frm_dev->name, FIRMWARE_NAME_LEN - 1, "firmware_sysfs%d", frm_dev->chain);
-    strncpy(sysfs_info->devname, frm_dev->name, strlen(frm_dev->name) + 1);
-
-    INIT_LIST_HEAD(&frm_dev->list);
-    frm_dev->dev.minor = MISC_DYNAMIC_MINOR;
-    frm_dev->dev.name = frm_dev->name;
-    frm_dev->dev.fops = &sysfs_dev_fops;
-    frm_dev->priv = sysfs_info;
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("Register sysfs firmware chain:%d, name:%s.\n", frm_dev->chain, frm_dev->name);
-
-    ret = firmware_device_register(frm_dev);
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("Failed to register firmware device.\n");
-        return -EPERM;
-    }
-
-    platform_set_drvdata(pdev, frm_dev);
-    return 0;
-}
-
-static int __exit firmware_sysfs_remove(struct platform_device *pdev)
-{
-    firmware_device_t *frm_dev;
-
-    frm_dev = (firmware_device_t *)platform_get_drvdata(pdev);
-    firmware_device_unregister(frm_dev);
-    platform_set_drvdata(pdev, NULL);
-
-    return 0;
-}
-
-static struct of_device_id sysfs_match[] = {
-    {
-        .compatible = "firmware_sysfs",
-    },
-    {},
-};
-
-static struct platform_driver sysfs_driver = {
-    .driver = {
-        .name = "firmware_sysfs",
-        .owner = THIS_MODULE,
-        .of_match_table = sysfs_match,
-    },
-    .probe = firmware_sysfs_probe,
-    .remove = firmware_sysfs_remove,
-};
-
-static firmware_driver_t fmw_drv_sysfs = {
-    .name = "firmware_sysfs",
-    .drv = &sysfs_driver,
-};
-
-int firmware_sysfs_init(void)
-{
-    int ret;
-
-    INIT_LIST_HEAD(&fmw_drv_sysfs.list);
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("sysfs upgrade driver register \n");
-    ret = firmware_driver_register(&fmw_drv_sysfs);
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("sysfs upgrade driver register failed\n");
-        return ret;
-    }
-    return 0;
-}
-
-void firmware_sysfs_exit(void)
-{
-    firmware_driver_unregister(&fmw_drv_sysfs);
-    INIT_LIST_HEAD(&fmw_drv_sysfs.list);
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/firmware_sysfs_upgrade.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/firmware_sysfs_upgrade.c
deleted file mode 100644
index 8b883006de53..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/firmware_sysfs_upgrade.c
+++ /dev/null
@@ -1,258 +0,0 @@
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/delay.h>
-#include <linux/gpio.h>
-#include <linux/ctype.h>
-#include <linux/slab.h>
-#include <linux/uaccess.h>
-#include <firmware_sysfs.h>
-#include <firmware_sysfs_upgrade.h>
-#include <firmware_upgrade.h>
-
-static int firmware_file_read(const char *path, uint32_t addr, uint8_t *val, size_t size)
-{
-    int ret;
-    struct file *filp;
-    loff_t pos;
-
-    filp = filp_open(path, O_RDONLY, 0);
-    if (IS_ERR(filp)) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
-        filp = NULL;
-        goto exit;
-    }
-
-    pos = (loff_t)addr;
-    ret = kernel_read(filp, val, size, &pos);
-    if (ret != size) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("read kernel_read failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, addr, size, ret);
-        goto exit;
-    }
-    filp_close(filp, NULL);
-
-    return ret;
-
-exit:
-    if (filp != NULL) {
-        filp_close(filp, NULL);
-    }
-
-    return -1;
-}
-
-static int firmware_file_write(const char *path, uint32_t addr, uint8_t *val, size_t size)
-{
-    int ret;
-    struct file *filp;
-    loff_t pos;
-
-    filp = filp_open(path, O_RDWR, 777);
-    if (IS_ERR(filp)) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
-        filp = NULL;
-        goto exit;
-    }
-
-    pos = (loff_t)addr;
-    ret = kernel_write(filp, (void*)val, size, &pos);
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("write kernel_write failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, addr, size, ret);
-        goto exit;
-    }
-    vfs_fsync(filp, 1);
-    filp_close(filp, NULL);
-
-    return ret;
-
-exit:
-    if (filp != NULL) {
-        filp_close(filp, NULL);
-    }
-
-    return -1;
-}
-
-/*
- * firmware_file_do_work
- * function: Sets logical register values
- * @path:param[in] Logic device descriptor
- * @addr:param[in] Logic device address
- * @value:param[in] the register value needs to be set
- * @mask:param[in] register mask
- * @width:param[in] register bit width
- * return: 0:success, <0:failed
- */
-static int firmware_file_do_work(char *path, uint32_t addr, uint32_t value, uint32_t mask,
-                    int32_t width)
-{
-    int ret;
-    uint8_t read_value[4], write_value[4];
-    uint8_t tmp_read8, tmp_write8, tmp_mask8;
-    uint32_t tmp_read32, tmp_write32;
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("path=%s, addr=0x%x, value=0x%x mask=0x%x\r\n", path, addr, value, mask);
-    if ((width > 4) || (width < 0)) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("width %d is not support.\r\n", width);
-        return -1;
-    }
-    ret = 0;
-    mem_clear(read_value, sizeof(read_value));
-    mem_clear(write_value, sizeof(write_value));
-    ret = firmware_file_read(path, addr, read_value, width);
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("firmware sysfs read.\r\n");
-        return -1;
-    }
-
-    switch (width) {
-    case 1:
-        tmp_read8 = read_value[0];
-        tmp_mask8 = (uint8_t)(mask) & 0xFF;
-        tmp_write8 = (uint8_t)value & 0xFF;
-        write_value[0] = (tmp_read8 & tmp_mask8) | tmp_write8;
-        FIRMWARE_DRIVER_DEBUG_VERBOSE("1 byte write val[0]:0x%x", write_value[0]);
-        break;
-    case 2:
-        FIRMWARE_DRIVER_DEBUG_ERROR("width %d is not support.\r\n", width);
-        return -1;
-    case 4:
-        memcpy((uint8_t *)&tmp_read32, read_value, 4);
-        tmp_write32 = (tmp_read32 & mask) | value;
-        memcpy(write_value, (uint8_t *)&tmp_write32, 4);
-        FIRMWARE_DRIVER_DEBUG_VERBOSE("4 byte write val[0]:0x%x, val[1]:0x%x, val[2]:0x%x, val[3]:0x%x",
-            write_value[0], write_value[1], write_value[2], write_value[3]);
-        break;
-    default:
-        FIRMWARE_DRIVER_DEBUG_ERROR("width %d is not support.\r\n", width);
-        return -1;
-    }
-
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("write logic dev[%s] addr[0x%x].\r\n", path, addr);
-    ret = firmware_file_write(path, addr, write_value, width);
-    if (ret < 0) {
-        FIRMWARE_DRIVER_DEBUG_ERROR("firmware_file_write %s addr 0x%x failed, ret=%d.\r\n", path, addr, ret);
-        return -1;
-    }
-
-    return 0;
-}
-
-/*
- * firmware_upgrade_en
- * function:param[in] Upgrade access enabling switch
- * @flag:param[in] !0:enable 0:disable
- * return: 0:success, <0:failed
- */
-static int firmware_upgrade_en(firmware_sysfs_t *sysfs_info, int flag)
-{
-    int i;
-    firmware_logic_dev_en_t *firmware_logic_dev_en_info;
-    int ret, rv;
-    char *dev_name;
-
-    ret = 0;
-    FIRMWARE_DRIVER_DEBUG_VERBOSE("%s en switch: gpio en num %d, logic reg en num %d.\n",
-            flag ? "Open" : "Close", sysfs_info->gpio_en_info_num, sysfs_info->logic_dev_en_num);
-    for (i = 0; i < sysfs_info->gpio_en_info_num; i++) {
-        FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware sysfs [%d] gpio[%d] en_level[%d]\n",
-                i, sysfs_info->gpio_en_info[i].en_gpio, sysfs_info->gpio_en_info[i].en_level);
-        if (flag) {
-            ret = gpio_request(sysfs_info->gpio_en_info[i].en_gpio, "sysfs_upgrade_gpio_en");
-            if (ret) {
-                FIRMWARE_DRIVER_DEBUG_ERROR("Requesting cpld_ispvme_upgrade EN[%d] GPIO[%d] failed!\n",
-                        i, sysfs_info->gpio_en_info[i].en_gpio);
-                goto free_gpio;
-            }
-            gpio_direction_output(sysfs_info->gpio_en_info[i].en_gpio, sysfs_info->gpio_en_info[i].en_level);
-            sysfs_info->gpio_en_info[i].flag = 1;
-        } else {
-            gpio_set_value(sysfs_info->gpio_en_info[i].en_gpio, !sysfs_info->gpio_en_info[i].en_level);
-            gpio_free(sysfs_info->gpio_en_info[i].en_gpio);
-            sysfs_info->gpio_en_info[i].flag = 0;
-        }
-    }
-
-    for (i = 0; i < sysfs_info->logic_dev_en_num; i++) {
-        firmware_logic_dev_en_info = &sysfs_info->logic_dev_en_info[i];
-        dev_name = firmware_logic_dev_en_info->dev_name;
-        FIRMWARE_DRIVER_DEBUG_VERBOSE("firmware sysfs [%d] dev_name[%s] addr[0x%x] mask[0x%x]"
-            " en_val[0x%x] dis_val[0x%x] width[%d]\n",
-            i , firmware_logic_dev_en_info->dev_name, firmware_logic_dev_en_info->addr,
-            firmware_logic_dev_en_info->mask, firmware_logic_dev_en_info->en_val,
-            firmware_logic_dev_en_info->dis_val, firmware_logic_dev_en_info->width);
-        if (flag) {
-            ret = firmware_file_do_work(dev_name, firmware_logic_dev_en_info->addr,
-                    firmware_logic_dev_en_info->en_val, firmware_logic_dev_en_info->mask,
-                    firmware_logic_dev_en_info->width);
-            if (ret < 0) {
-                FIRMWARE_DRIVER_DEBUG_ERROR("Open logic register [%d] EN failed, ret %d.\n", i, ret);
-                goto free_logic_dev;
-            } else {
-                firmware_logic_dev_en_info->flag = 1;
-            }
-        } else {
-            rv = firmware_file_do_work(dev_name, firmware_logic_dev_en_info->addr,
-                    firmware_logic_dev_en_info->dis_val, firmware_logic_dev_en_info->mask,
-                    firmware_logic_dev_en_info->width);
-            if (rv < 0) {
-                FIRMWARE_DRIVER_DEBUG_ERROR("Close logic register [%d] EN failed, ret %d.\n", i, rv);
-                ret = -1;
-            }
-            firmware_logic_dev_en_info->flag = 0;
-        }
-    }
-
-    return ret;
-free_logic_dev:
-    for (i = 0; i < sysfs_info->logic_dev_en_num; i++) {
-        firmware_logic_dev_en_info = &sysfs_info->logic_dev_en_info[i];
-        dev_name = firmware_logic_dev_en_info->dev_name;
-        if (firmware_logic_dev_en_info->flag == 1) {
-            ret = firmware_file_do_work(dev_name, firmware_logic_dev_en_info->addr,
-                        firmware_logic_dev_en_info->dis_val, firmware_logic_dev_en_info->mask,
-                        firmware_logic_dev_en_info->width);
-            if (ret < 0) {
-                FIRMWARE_DRIVER_DEBUG_ERROR("Close logic register [%d] EN failed, ret %d.\n", i, ret);
-            }
-            firmware_logic_dev_en_info->flag = 0;
-        } else {
-            break;
-        }
-    }
-free_gpio:
-    for (i = 0; i < sysfs_info->gpio_en_info_num; i++) {
-        if (sysfs_info->gpio_en_info[i].flag == 1) {
-            gpio_set_value(sysfs_info->gpio_en_info[i].en_gpio, !sysfs_info->gpio_en_info[i].en_level);
-            gpio_free(sysfs_info->gpio_en_info[i].en_gpio);
-            sysfs_info->gpio_en_info[i].flag = 0;
-        } else {
-            break;
-        }
-    }
-
-    return -1;
-}
-
-/*
- * firmware_init_dev_loc
- * function: init logic device, enable upgrade access
- * return: 0:success, <0:failed
- */
-int firmware_init_dev_loc(firmware_sysfs_t *sysfs_info)
-{
-    int ret;
-
-    ret = firmware_upgrade_en(sysfs_info, 1);
-    return ret;
-}
-
-/*
- * firmware_finish_dev_loc
- * function: finish logic device, disable upgrade access
- * return: 0:success, <0:failed
- */
-int firmware_finish_dev_loc(firmware_sysfs_t *sysfs_info){
-    int ret;
-    ret = firmware_upgrade_en(sysfs_info, 0);
-    return ret;
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/include/firmware_sysfs.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/include/firmware_sysfs.h
deleted file mode 100644
index 9da2303c7c00..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/include/firmware_sysfs.h
+++ /dev/null
@@ -1,88 +0,0 @@
-#ifndef __FIRMWARE_SYSFS_H__
-#define __FIRMWARE_SYSFS_H__
-
-#include <linux/miscdevice.h>
-#include <linux/platform_device.h>
-
-#include <asm/ioctl.h>
-
-/* Debug switch level */
-typedef enum {
-    FIRWMARE_VERBOSE,
-    FIRWMARE_WARN,
-    FIRWMARE_ERROR,
-    FIRWMARE_END,
-} firmware_debug_level_t;
-
-#define FIRMWARE_DRIVER_DEBUG_VERBOSE(fmt, args...) do { \
-    if ((g_firmware_driver_debug) & (1U << FIRWMARE_VERBOSE)) { \
-        printk(KERN_INFO "[FIRMWARW_DRIVER_SYSFS][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-#define FIRMWARE_DRIVER_DEBUG_ERROR(fmt, args...) do { \
-    if ((g_firmware_driver_debug) & (1U << FIRWMARE_ERROR)) { \
-        printk(KERN_ERR "[FIRMWARW_DRIVER_SYSFS][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-#define FIRMWARE_NAME_LEN      48
-
-#define FIRMWARE_FAILED              (-1)
-#define FIRMWARE_SUCCESS             0
-
-/* ioctl publi command, the same as "firmware_upgrade\include\firmware_app.h" */
-#define FIRMWARE_COMMON_TYPE 'C'
-#define FIRMWARE_GET_CHIPNAME            _IOR(FIRMWARE_COMMON_TYPE, 0, char)    /* get the chip name */
-#define FIRMWARE_GET_VERSION             _IOR(FIRMWARE_COMMON_TYPE, 2, int)     /* get version */
-
-/* firmware sysfs driver ioctl command, the same as "firmware_upgrade\include\firmware_app.h" */
-#define FIRMWARE_SYSFS_TYPE 'S'
-#define FIRMWARE_SYSFS_INIT               _IOR(FIRMWARE_SYSFS_TYPE, 0, char)   /* enable upgrade access */
-#define FIRMWARE_SYSFS_FINISH             _IOR(FIRMWARE_SYSFS_TYPE, 1, char)   /* disable upgrade access */
-#define FIRMWARE_SYSFS_SPI_INFO           _IOR(FIRMWARE_SYSFS_TYPE, 2, char)   /* spi flash upgrade */
-#define FIRMWARE_SYSFS_DEV_FILE_INFO      _IOR(FIRMWARE_SYSFS_TYPE, 3, char)   /* sysfs upgrade */
-#define FIRMWARE_SYSFS_MTD_INFO           _IOR(FIRMWARE_SYSFS_TYPE, 4, char)   /* sysfs mtd upgrade */
-
-#define FIRMWARE_SYSFS_TYPE_SPI_LOGIC       "SPI_LOGIC"
-#define FIRMWARE_SYSFS_TYPE_SYSFS           "SYSFS"
-#define FIRMWARE_SYSFS_TYPE_MTD             "MTD_DEV"
-
-typedef struct cmd_info_s {
-    uint32_t size;
-    void __user *data;
-} cmd_info_t;
-
-typedef struct firmware_device_s {
-    struct list_head list;             /* device list */
-    uint32_t chain;                    /* chain number */
-    char name[FIRMWARE_NAME_LEN];      /* name */
-    struct miscdevice dev;             /* device */
-    void *priv;                        /* private data */
-} firmware_device_t;
-
-typedef struct firmware_driver_s {
-    struct list_head list;             /* list */
-    char name[FIRMWARE_NAME_LEN];      /* name */
-    struct platform_driver *drv;       /* driver */
-    void *priv;                        /* private data */
-} firmware_driver_t;
-
-extern int g_firmware_driver_debug;
-
-/* Get device information based on minor */
-extern firmware_device_t *firmware_get_device_by_minor(int minor);
-/* Registere device */
-extern int firmware_device_register(firmware_device_t *fw_dev);
-/* Unregister device */
-extern void firmware_device_unregister(firmware_device_t *fw_dev);
-/* Registere driver */
-extern int firmware_driver_register(firmware_driver_t *fw_drv);
-/* Unregister driver */
-extern void firmware_driver_unregister(firmware_driver_t *fw_drv);
-/* SYSFS upgrade initialized */
-extern int firmware_sysfs_init(void);
-/* SYSFS unload function */
-extern void firmware_sysfs_exit(void);
-
-#endif /* end of __FIRMWARE_SYSFS_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/include/firmware_sysfs_upgrade.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/include/firmware_sysfs_upgrade.h
deleted file mode 100644
index 9c6b970274b1..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/firmware_driver_sysfs/include/firmware_sysfs_upgrade.h
+++ /dev/null
@@ -1,72 +0,0 @@
-#ifndef __FIRMWARE_SYSFS_UPGRADE_H__
-#define __FIRMWARE_SYSFS_UPGRADE_H__
-
-#define FIRMWARE_DEV_NAME_LEN     64    /* the macro definition needs to same as app space define */
-#define FIRMWARE_TYPE_LEN         10
-#define FIRMWARE_EN_INFO_MAX      16
-
-typedef struct firmware_spi_logic_info_s {
-    char dev_name[FIRMWARE_DEV_NAME_LEN];        /* Logical device name */
-    uint32_t flash_base;                         /* Flash Upgrade Address */
-    uint32_t ctrl_base;                          /* SPI upgrade control register base address */
-    uint32_t test_base;                          /* Test flash address */
-    uint32_t test_size;                          /* Test flash size */
-} firmware_spi_logic_info_t;
-
-typedef struct firmware_dev_file_info_s {
-    char sysfs_name[FIRMWARE_DEV_NAME_LEN];         /* sysfs name */
-    uint32_t dev_base;                              /* device upgrade base address */
-    uint32_t per_len;                               /* The length of bytes per operation */
-    uint32_t test_base;                             /* Test flash address */
-    uint32_t test_size;                             /* Test flash size */
-} firmware_dev_file_info_t;
-
-typedef struct firmware_mtd_info_s {
-    char mtd_name[FIRMWARE_DEV_NAME_LEN];         /* sysfs name */
-    uint32_t flash_base;                          /* Flash Upgrade Address */
-    uint32_t test_base;                           /* Test flash address */
-    uint32_t test_size;                           /* Test flash size */
-} firmware_mtd_info_t;
-
-typedef struct firmware_gpio_jtag_en_s {
-    uint32_t en_gpio;                                               /* GPIO enable pin */
-    uint32_t en_level;                                              /* GPIO enable level */
-    int flag;                                                       /* init flag; 1-init 0-not init */
-} firmware_gpio_jtag_en_t;
-
-typedef struct firmware_logic_dev_en_s {
-    char dev_name[FIRMWARE_DEV_NAME_LEN];        /* Logical device name */
-    uint32_t addr;                               /* Enable register address */
-    uint32_t mask;                               /* mask */
-    uint32_t en_val;                             /* Enable value */
-    uint32_t dis_val;                            /* Disable value*/
-    uint32_t width;                              /* width */
-    int flag;                                    /* init flag; 1-init 0-not init */
-} firmware_logic_dev_en_t;
-
-typedef struct firmware_sysfs_s {
-    char devname[FIRMWARE_DEV_NAME_LEN];                        /* Device name */
-    char type[FIRMWARE_TYPE_LEN];                               /* interface type */
-    uint32_t chain;                                             /* chain num */
-    uint32_t chip_index;                                        /* chip index */
-    union {
-        firmware_spi_logic_info_t spi_logic_info;                   /* SPI logic Information */
-        firmware_dev_file_info_t dev_file_info;                     /* device file Information */
-        firmware_mtd_info_t mtd_info;                               /* mtd device Information */
-    } info;
-    uint32_t gpio_en_info_num;                                       /* GPIO Enable Number */
-    firmware_gpio_jtag_en_t gpio_en_info[FIRMWARE_EN_INFO_MAX]; /* GPIO Enable Information */
-    uint32_t logic_dev_en_num;                                       /* Register Enable Number */
-    firmware_logic_dev_en_t logic_dev_en_info[FIRMWARE_EN_INFO_MAX]; /* Register Enable Information */
-} firmware_sysfs_t;
-
-typedef struct firmware_sysfs_function_s{
-    int (*init_dev)(void);                           /* upgrade initializes the operation */
-    int (*finish_dev)(void);                         /* upgrade completes the operation */
-}firmware_sysfs_function_t;
-
-extern void firmware_set_sysfs_info(firmware_sysfs_t *sysfs_info);
-extern int firmware_init_dev_loc(firmware_sysfs_t *sysfs_info);
-extern int firmware_finish_dev_loc(firmware_sysfs_t *sysfs_info);
-
-#endif /* __FIRMWARE_SYSFS_UPGRADE_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/include/firmware_upgrade.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/include/firmware_upgrade.h
deleted file mode 100644
index 600c69646b1b..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_driver/include/firmware_upgrade.h
+++ /dev/null
@@ -1,57 +0,0 @@
-#ifndef __FIRMWARE_UPGRADE_H__
-#define __FIRMWARE_UPGRADE_H__
-
-#include <linux/string.h>
-
-#define TYPE_LEN         (10)
-#define DEV_NAME_LEN     (64)
-#define ENABLE_NUM       (16)
-
-#define mem_clear(data, size) memset((data), 0, (size))
-
-typedef struct firmware_jtag_device_s {
-    uint32_t tdi;
-    uint32_t tck;
-    uint32_t tms;
-    uint32_t tdo;
-    uint32_t tck_delay;
-} firmware_jtag_device_t;
-
-typedef struct firmware_sysfs_device_s {
-    uint32_t test_base;
-    uint32_t test_size;
-    char dev_name[DEV_NAME_LEN];
-    uint32_t flash_base;
-    uint32_t ctrl_base;
-    char sysfs_name[DEV_NAME_LEN];
-    uint32_t dev_base;
-    uint32_t per_len;
-    char mtd_name[DEV_NAME_LEN];
-} firmware_sysfs_device_t;
-
-typedef struct firmware_upgrade_device_s {
-    char type[TYPE_LEN];
-    uint32_t chain;
-    uint32_t chip_index;
-
-    uint32_t en_gpio_num;        /* the number of en_gpio */
-    uint32_t en_gpio[ENABLE_NUM];
-    uint32_t en_level[ENABLE_NUM];
-
-    uint32_t en_logic_num;       /* the number of en_logic */
-    char en_logic_dev[ENABLE_NUM][DEV_NAME_LEN];
-    uint32_t en_logic_addr[ENABLE_NUM];
-    uint32_t en_logic_mask[ENABLE_NUM];
-    uint32_t en_logic_en_val[ENABLE_NUM];
-    uint32_t en_logic_dis_val[ENABLE_NUM];
-    uint32_t en_logic_width[ENABLE_NUM];
-
-    int device_flag;
-    union {
-        firmware_jtag_device_t jtag;
-        firmware_sysfs_device_t sysfs;
-    } upg_type;
-
-} firmware_upgrade_device_t;
-
-#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/COPYING b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/COPYING
deleted file mode 100644
index 3912109b5cd6..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/COPYING
+++ /dev/null
@@ -1,340 +0,0 @@
-		    GNU GENERAL PUBLIC LICENSE
-		       Version 2, June 1991
-
- Copyright (C) 1989, 1991 Free Software Foundation, Inc.
-                       51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
- Everyone is permitted to copy and distribute verbatim copies
- of this license document, but changing it is not allowed.
-
-			    Preamble
-
-  The licenses for most software are designed to take away your
-freedom to share and change it.  By contrast, the GNU General Public
-License is intended to guarantee your freedom to share and change free
-software--to make sure the software is free for all its users.  This
-General Public License applies to most of the Free Software
-Foundation's software and to any other program whose authors commit to
-using it.  (Some other Free Software Foundation software is covered by
-the GNU Library General Public License instead.)  You can apply it to
-your programs, too.
-
-  When we speak of free software, we are referring to freedom, not
-price.  Our General Public Licenses are designed to make sure that you
-have the freedom to distribute copies of free software (and charge for
-this service if you wish), that you receive source code or can get it
-if you want it, that you can change the software or use pieces of it
-in new free programs; and that you know you can do these things.
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-anyone to deny you these rights or to ask you to surrender the rights.
-These restrictions translate to certain responsibilities for you if you
-distribute copies of the software, or if you modify it.
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-  For example, if you distribute copies of such a program, whether
-gratis or for a fee, you must give the recipients all the rights that
-you have.  You must make sure that they, too, receive or can get the
-source code.  And you must show them these terms so they know their
-rights.
-
-  We protect your rights with two steps: (1) copyright the software, and
-(2) offer you this license which gives you legal permission to copy,
-distribute and/or modify the software.
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-that everyone understands that there is no warranty for this free
-software.  If the software is modified by someone else and passed on, we
-want its recipients to know that what they have is not the original, so
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-
-  The precise terms and conditions for copying, distribution and
-modification follow.
-
-		    GNU GENERAL PUBLIC LICENSE
-   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
-
-  0. This License applies to any program or other work which contains
-a notice placed by the copyright holder saying it may be distributed
-under the terms of this General Public License.  The "Program", below,
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-language.  (Hereinafter, translation is included without limitation in
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-Activities other than copying, distribution and modification are not
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-running the Program is not restricted, and the output from the Program
-is covered only if its contents constitute a work based on the
-Program (independent of having been made by running the Program).
-Whether that is true depends on what the Program does.
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-You may charge a fee for the physical act of transferring a copy, and
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-  2. You may modify your copy or copies of the Program or any portion
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-		     END OF TERMS AND CONDITIONS
-
-	    How to Apply These Terms to Your New Programs
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-  `Gnomovision' (which makes passes at compilers) written by James Hacker.
-
-  <signature of Ty Coon>, 1 April 1989
-  Ty Coon, President of Vice
-
-This General Public License does not permit incorporating your program into
-proprietary programs.  If your program is a subroutine library, you may
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-library.  If this is what you want to do, use the GNU Library General
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diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/Makefile
deleted file mode 100644
index 176d44d2abd9..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/Makefile
+++ /dev/null
@@ -1,33 +0,0 @@
-include $(top_srcdir)/Rules.mk
-
-#OBJ = firmware_app.o debug.o hardware.o ispvm_ui.o ivm_core.o crc32.o
-PWD = $(shell pwd)
-SRC :=
-SRC += $(shell find $(PWD) -name '*.c')
-
-OBJ := $(SRC:%.c=%.o)
-LIB += $(BUILD_CFALGS) $(BUILD_LDFLAGS) -lpthread -lreadline -lncurses
-INCLUDE = -Iinclude
-INCLUDE+= -Wall
-APP = firmware_upgrade
-ELF_FILE = $(APP)
-MAP_FILE = $(APP).map.sym
-
-.PHONY: build
-build:$(OBJ)
-	$(CC) $^ -o $(ELF_FILE) $(LINKFLAGS) $(LIB)
-	$(NM) $(ELF_FILE) | grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' \
-		| sort > $(MAP_FILE)
-	cp -p $(ELF_FILE) $(common_out_put_dir)
-
-%.o:%.c
-	$(CC) -c $(CFLAGS) $(INCLUDE) $< -o $@
-
-.PHONY: install
-install:
-	echo "firmware_upgrade install success."
-	cp -p $(ELF_FILE) $(common_out_put_dir)
-
-.PHONY: clean
-clean:
-	rm -rf $(BUILD_DIR)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/crc32.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/crc32.c
deleted file mode 100644
index 5b60b40ad1ba..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/crc32.c
+++ /dev/null
@@ -1,216 +0,0 @@
-/*
- * This file is derived from crc32.c from the zlib-1.1.3 distribution
- * by Jean-loup Gailly and Mark Adler.
- */
-
-/* crc32.c -- compute the CRC-32 of a data stream
- * Copyright (C) 1995-1998 Mark Adler
- * For conditions of distribution and use, see copyright notice in zlib.h
- */
-/* xxxx: by chihl for compile error */
-#if 1
-
-#ifndef FAR
-#define FAR
-#endif
-
-typedef unsigned char  Byte;  /* 8 bits */
-typedef unsigned int   uInt;  /* 16 bits or more */
-typedef unsigned long  uLong; /* 32 bits or more */
-
-typedef Byte FAR Bytef;
-typedef char FAR charf;
-typedef int FAR intf;
-typedef uInt FAR uIntf;
-typedef uLong FAR uLongf;
-
-#ifndef OF /* function prototypes */
-#ifdef STDC
-#define OF(args)  args
-#else
-#define OF(args)  ()
-#endif
-#endif
-
-#endif
-
-#define local static
-#define ZEXPORT /* empty */
-unsigned long crc32 (unsigned long, const unsigned char *, unsigned int);
-
-#define DYNAMIC_CRC_TABLE
-
-#ifdef DYNAMIC_CRC_TABLE
-
-local int crc_table_empty = 1;
-local uLongf crc_table[256];
-local void make_crc_table OF((void));
-
-/*
-  Generate a table for a byte-wise 32-bit CRC calculation on the polynomial:
-  x^32+x^26+x^23+x^22+x^16+x^12+x^11+x^10+x^8+x^7+x^5+x^4+x^2+x+1.
-
-  Polynomials over GF(2) are represented in binary, one bit per coefficient,
-  with the lowest powers in the most significant bit.  Then adding polynomials
-  is just exclusive-or, and multiplying a polynomial by x is a right shift by
-  one.  If we call the above polynomial p, and represent a byte as the
-  polynomial q, also with the lowest power in the most significant bit (so the
-  byte 0xb1 is the polynomial x^7+x^3+x+1), then the CRC is (q*x^32) mod p,
-  where a mod b means the remainder after dividing a by b.
-
-  This calculation is done using the shift-register method of multiplying and
-  taking the remainder.  The register is initialized to zero, and for each
-  incoming bit, x^32 is added mod p to the register if the bit is a one (where
-  x^32 mod p is p+x^32 = x^26+...+1), and the register is multiplied mod p by
-  x (which is shifting right by one and adding x^32 mod p if the bit shifted
-  out is a one).  We start with the highest power (least significant bit) of
-  q and repeat for all eight bits of q.
-
-  The table is simply the CRC of all possible eight bit values.  This is all
-  the information needed to generate CRC's on data a byte at a time for all
-  combinations of CRC register values and incoming bytes.
-*/
-local void make_crc_table()
-{
-  uLong c;
-  int n, k;
-  uLong poly;            /* polynomial exclusive-or pattern */
-  /* terms of polynomial defining this crc (except x^32): */
-  static const Byte p[] = {0,1,2,4,5,7,8,10,11,12,16,22,23,26};
-
-  /* make exclusive-or pattern from polynomial (0xedb88320L) */
-  poly = 0L;
-  for (n = 0; n < sizeof(p)/sizeof(Byte); n++)
-    poly |= 1L << (31 - p[n]);
-
-  for (n = 0; n < 256; n++)
-  {
-    c = (uLong)n;
-    for (k = 0; k < 8; k++)
-      c = c & 1 ? poly ^ (c >> 1) : c >> 1;
-    crc_table[n] = c;
-  }
-  crc_table_empty = 0;
-}
-#else
-/* ========================================================================
- * Table of CRC-32's of all single-byte values (made by make_crc_table)
- */
-local const uLongf crc_table[256] = {
-  0x00000000L, 0x77073096L, 0xee0e612cL, 0x990951baL, 0x076dc419L,
-  0x706af48fL, 0xe963a535L, 0x9e6495a3L, 0x0edb8832L, 0x79dcb8a4L,
-  0xe0d5e91eL, 0x97d2d988L, 0x09b64c2bL, 0x7eb17cbdL, 0xe7b82d07L,
-  0x90bf1d91L, 0x1db71064L, 0x6ab020f2L, 0xf3b97148L, 0x84be41deL,
-  0x1adad47dL, 0x6ddde4ebL, 0xf4d4b551L, 0x83d385c7L, 0x136c9856L,
-  0x646ba8c0L, 0xfd62f97aL, 0x8a65c9ecL, 0x14015c4fL, 0x63066cd9L,
-  0xfa0f3d63L, 0x8d080df5L, 0x3b6e20c8L, 0x4c69105eL, 0xd56041e4L,
-  0xa2677172L, 0x3c03e4d1L, 0x4b04d447L, 0xd20d85fdL, 0xa50ab56bL,
-  0x35b5a8faL, 0x42b2986cL, 0xdbbbc9d6L, 0xacbcf940L, 0x32d86ce3L,
-  0x45df5c75L, 0xdcd60dcfL, 0xabd13d59L, 0x26d930acL, 0x51de003aL,
-  0xc8d75180L, 0xbfd06116L, 0x21b4f4b5L, 0x56b3c423L, 0xcfba9599L,
-  0xb8bda50fL, 0x2802b89eL, 0x5f058808L, 0xc60cd9b2L, 0xb10be924L,
-  0x2f6f7c87L, 0x58684c11L, 0xc1611dabL, 0xb6662d3dL, 0x76dc4190L,
-  0x01db7106L, 0x98d220bcL, 0xefd5102aL, 0x71b18589L, 0x06b6b51fL,
-  0x9fbfe4a5L, 0xe8b8d433L, 0x7807c9a2L, 0x0f00f934L, 0x9609a88eL,
-  0xe10e9818L, 0x7f6a0dbbL, 0x086d3d2dL, 0x91646c97L, 0xe6635c01L,
-  0x6b6b51f4L, 0x1c6c6162L, 0x856530d8L, 0xf262004eL, 0x6c0695edL,
-  0x1b01a57bL, 0x8208f4c1L, 0xf50fc457L, 0x65b0d9c6L, 0x12b7e950L,
-  0x8bbeb8eaL, 0xfcb9887cL, 0x62dd1ddfL, 0x15da2d49L, 0x8cd37cf3L,
-  0xfbd44c65L, 0x4db26158L, 0x3ab551ceL, 0xa3bc0074L, 0xd4bb30e2L,
-  0x4adfa541L, 0x3dd895d7L, 0xa4d1c46dL, 0xd3d6f4fbL, 0x4369e96aL,
-  0x346ed9fcL, 0xad678846L, 0xda60b8d0L, 0x44042d73L, 0x33031de5L,
-  0xaa0a4c5fL, 0xdd0d7cc9L, 0x5005713cL, 0x270241aaL, 0xbe0b1010L,
-  0xc90c2086L, 0x5768b525L, 0x206f85b3L, 0xb966d409L, 0xce61e49fL,
-  0x5edef90eL, 0x29d9c998L, 0xb0d09822L, 0xc7d7a8b4L, 0x59b33d17L,
-  0x2eb40d81L, 0xb7bd5c3bL, 0xc0ba6cadL, 0xedb88320L, 0x9abfb3b6L,
-  0x03b6e20cL, 0x74b1d29aL, 0xead54739L, 0x9dd277afL, 0x04db2615L,
-  0x73dc1683L, 0xe3630b12L, 0x94643b84L, 0x0d6d6a3eL, 0x7a6a5aa8L,
-  0xe40ecf0bL, 0x9309ff9dL, 0x0a00ae27L, 0x7d079eb1L, 0xf00f9344L,
-  0x8708a3d2L, 0x1e01f268L, 0x6906c2feL, 0xf762575dL, 0x806567cbL,
-  0x196c3671L, 0x6e6b06e7L, 0xfed41b76L, 0x89d32be0L, 0x10da7a5aL,
-  0x67dd4accL, 0xf9b9df6fL, 0x8ebeeff9L, 0x17b7be43L, 0x60b08ed5L,
-  0xd6d6a3e8L, 0xa1d1937eL, 0x38d8c2c4L, 0x4fdff252L, 0xd1bb67f1L,
-  0xa6bc5767L, 0x3fb506ddL, 0x48b2364bL, 0xd80d2bdaL, 0xaf0a1b4cL,
-  0x36034af6L, 0x41047a60L, 0xdf60efc3L, 0xa867df55L, 0x316e8eefL,
-  0x4669be79L, 0xcb61b38cL, 0xbc66831aL, 0x256fd2a0L, 0x5268e236L,
-  0xcc0c7795L, 0xbb0b4703L, 0x220216b9L, 0x5505262fL, 0xc5ba3bbeL,
-  0xb2bd0b28L, 0x2bb45a92L, 0x5cb36a04L, 0xc2d7ffa7L, 0xb5d0cf31L,
-  0x2cd99e8bL, 0x5bdeae1dL, 0x9b64c2b0L, 0xec63f226L, 0x756aa39cL,
-  0x026d930aL, 0x9c0906a9L, 0xeb0e363fL, 0x72076785L, 0x05005713L,
-  0x95bf4a82L, 0xe2b87a14L, 0x7bb12baeL, 0x0cb61b38L, 0x92d28e9bL,
-  0xe5d5be0dL, 0x7cdcefb7L, 0x0bdbdf21L, 0x86d3d2d4L, 0xf1d4e242L,
-  0x68ddb3f8L, 0x1fda836eL, 0x81be16cdL, 0xf6b9265bL, 0x6fb077e1L,
-  0x18b74777L, 0x88085ae6L, 0xff0f6a70L, 0x66063bcaL, 0x11010b5cL,
-  0x8f659effL, 0xf862ae69L, 0x616bffd3L, 0x166ccf45L, 0xa00ae278L,
-  0xd70dd2eeL, 0x4e048354L, 0x3903b3c2L, 0xa7672661L, 0xd06016f7L,
-  0x4969474dL, 0x3e6e77dbL, 0xaed16a4aL, 0xd9d65adcL, 0x40df0b66L,
-  0x37d83bf0L, 0xa9bcae53L, 0xdebb9ec5L, 0x47b2cf7fL, 0x30b5ffe9L,
-  0xbdbdf21cL, 0xcabac28aL, 0x53b39330L, 0x24b4a3a6L, 0xbad03605L,
-  0xcdd70693L, 0x54de5729L, 0x23d967bfL, 0xb3667a2eL, 0xc4614ab8L,
-  0x5d681b02L, 0x2a6f2b94L, 0xb40bbe37L, 0xc30c8ea1L, 0x5a05df1bL,
-  0x2d02ef8dL
-};
-#endif
-
-#if 0
-/* =========================================================================
- * This function can be used by asm versions of crc32()
- */
-const uLongf * ZEXPORT get_crc_table()
-{
-#ifdef DYNAMIC_CRC_TABLE
-  if (crc_table_empty) make_crc_table();
-#endif
-  return (const uLongf *)crc_table;
-}
-#endif
-
-/* ========================================================================= */
-#define DO1(buf) crc = crc_table[((int)crc ^ (*buf++)) & 0xff] ^ (crc >> 8);
-#define DO2(buf)  DO1(buf); DO1(buf);
-#define DO4(buf)  DO2(buf); DO2(buf);
-#define DO8(buf)  DO4(buf); DO4(buf);
-
-/* ========================================================================= */
-uLong ZEXPORT crc32(uLong crc, const Bytef *buf, uInt len)
-{
-#ifdef DYNAMIC_CRC_TABLE
-    if (crc_table_empty)
-      make_crc_table();
-#endif
-    crc = crc ^ 0xffffffffL;
-    while (len >= 8)
-    {
-      DO8(buf);
-      len -= 8;
-    }
-    if (len) do {
-      DO1(buf);
-    } while (--len);
-    return crc ^ 0xffffffffL;
-}
-
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2)
-
-/* No ones complement version. JFFS2 (and other things ?)
- * don't use ones compliment in their CRC calculations.
- */
-uLong ZEXPORT crc32_no_comp(uLong crc, const Bytef *buf, uInt len)
-{
-#ifdef DYNAMIC_CRC_TABLE
-    if (crc_table_empty)
-      make_crc_table();
-#endif
-    while (len >= 8)
-    {
-      DO8(buf);
-      len -= 8;
-    }
-    if (len) do {
-      DO1(buf);
-    } while (--len);
-
-    return crc;
-}
-
-#endif  /* CFG_CMD_JFFS2 */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/debug.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/debug.c
deleted file mode 100644
index dc1b1ccfc70a..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/debug.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * debug.c
- * firmware upgrade debug switch control
- */
-
-#include <unistd.h>
-#include <fcntl.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <ctype.h>
-#include <string.h>
-#include <dirent.h>
-#include <ctype.h>
-#include <debug.h>
-
-int is_debug_on = DEBUG_IGNORE;
-
-/*
- * firmware_upgrade_debug
- * function: Debug switch
- * Parses the file "/var/tmp/.firmware_upgrade_debug" and returns the corresponding debug level
- * return:off--DEBUG_OFF,  app debug on---DEBUG_APP_ON, kernel debug on--DEBUG_KERN_ON,
- *        all debug on--DEBUG_ALL_ON, other--DEBUG_IGNORE
- */
-int firmware_upgrade_debug(void)
-{
-    int size;
-    FILE *fp;
-    char debug_info[DEBUG_INFO_LEN];
-
-    fp = fopen(DEBUG_FILE, "r");
-    if (fp == NULL) {
-        return DEBUG_IGNORE;
-    }
-
-    mem_clear(debug_info, DEBUG_INFO_LEN);
-    size = fread(debug_info, DEBUG_INFO_LEN - 1, 1, fp);
-    if (size < 0) {
-        fclose(fp);
-        return DEBUG_IGNORE;
-    }
-
-    if (strncmp(debug_info, DEBUG_ON_INFO, 1) == 0) {
-        fclose(fp);
-        return DEBUG_APP_ON;
-    }
-
-    if (strncmp(debug_info, DEBUG_ON_ALL, 1) == 0) {
-        fclose(fp);
-        return DEBUG_ALL_ON;
-    }
-
-    if (strncmp(debug_info, DEBUG_OFF_INFO, 1) == 0) {
-        fclose(fp);
-        return DEBUG_OFF;
-    }
-
-    fclose(fp);
-    return DEBUG_IGNORE;
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/firmware_app.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/firmware_app.c
deleted file mode 100644
index ecdc37ef350f..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/firmware_app.c
+++ /dev/null
@@ -1,985 +0,0 @@
-#include <sys/stat.h>
-#include <sys/types.h>
-#include <errno.h>
-#include <unistd.h>
-#include <fcntl.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <ctype.h>
-#include <string.h>
-#include <dirent.h>
-#include <linux/version.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <signal.h>
-#include <firmware_app.h>
-
-int header_offset;
-
-static firmware_file_name_t firmware_file_str[] = {
-    {"VME",             FIRMWARE_VME},
-    {"ISC",             FIRMWARE_ISC},
-    {"JBI",             FIRMWARE_JBI},
-    {"SPI-LOGIC-DEV",   FIRMWARE_SPI_LOGIC_DEV},
-    {"SYSFS",           FIRMWARE_SYSFS_DEV},
-    {"MTD",             FIRMWARE_MTD},
-};
-
-/**
- * firmware_error_type
- * function:set error code
- * @action: param[in]  The stage where the error occurs
- * @info: param[in] Upgrade file information
- * return value: error code
- */
-int firmware_error_type(int action, name_info_t *info)
-{
-    if (info == NULL) {
-        return ERR_FW_UPGRADE;
-    }
-
-    if((info->type <= FIRMWARE_UNDEF_TYPE) || (info->type > FIRMWARE_OTHER)) {
-        return ERR_FW_UPGRADE;
-    }
-
-    if (info->type == FIRMWARE_CPLD) {
-        switch (action) {
-        case FIRMWARE_ACTION_CHECK:
-            return ERR_FW_CHECK_CPLD_UPGRADE;
-        case FIRMWARE_ACTION_MATCH:
-            return ERR_FW_MATCH_CPLD_UPGRADE;
-        case FIRMWARE_ACTION_VERCHECK:
-            return ERR_FW_SAMEVER_CPLD_UPGRADE;
-        case FIRMWARE_ACTION_UPGRADE:
-            return ERR_FW_DO_CPLD_UPGRADE;
-        case FIRMWARE_ACTION_SUPPORT:
-            return ERR_FW_DO_UPGRADE_NOT_SUPPORT;
-        default:
-            return ERR_FW_UPGRADE;
-        }
-    } else if (info->type == FIRMWARE_FPGA) {
-        switch (action) {
-        case FIRMWARE_ACTION_CHECK:
-            return ERR_FW_CHECK_FPGA_UPGRADE;
-        case FIRMWARE_ACTION_MATCH:
-            return ERR_FW_MATCH_FPGA_UPGRADE;
-        case FIRMWARE_ACTION_VERCHECK:
-            return ERR_FW_SAMEVER_FPGA_UPGRADE;
-        case FIRMWARE_ACTION_UPGRADE:
-            return ERR_FW_DO_FPGA_UPGRADE;
-        case FIRMWARE_ACTION_SUPPORT:
-            return ERR_FW_DO_UPGRADE_NOT_SUPPORT;
-        default:
-            return ERR_FW_UPGRADE;
-        }
-    } else {
-        switch (action) {
-        case FIRMWARE_ACTION_CHECK:
-            return ERR_FW_CHECK_UPGRADE;
-        case FIRMWARE_ACTION_MATCH:
-            return ERR_FW_MATCH_UPGRADE;
-        case FIRMWARE_ACTION_VERCHECK:
-            return ERR_FW_SAMEVER_UPGRADE;
-        case FIRMWARE_ACTION_UPGRADE:
-            return ERR_FW_DO_UPGRADE;
-        case FIRMWARE_ACTION_SUPPORT:
-            return ERR_FW_DO_UPGRADE_NOT_SUPPORT;
-        default:
-            return ERR_FW_UPGRADE;
-        }
-    }
-
-}
-
-/*
- * firmware_check_file_info
- * function:Check the file information to determine that the file is available for use on the device
- * @info: param[in] Upgrade file information
- * @main_type : param[in] main type
- * @sub_type : param[in] sub type
- * @slot : param[in] 0--main, sub slot starts at 1
- * return value : success--FIRMWARE_SUCCESS, other fail return error code
- */
-static int firmware_check_file_info(name_info_t *info, int main_type, int sub_type, int slot)
-{
-    int i;
-
-    dbg_print(is_debug_on, "Check file info.\n");
-    /* Check the mainboard type */
-    for (i = 0; i < MAX_DEV_NUM; i++) {
-        if (main_type == info->card_type[i]) {
-            dbg_print(is_debug_on, "main type is 0x%x \n", main_type);
-            break;
-        }
-    }
-    if (i == MAX_DEV_NUM) {
-        dbg_print(is_debug_on, "Error: The main type[0x%x] is not matched \n", main_type);
-        return firmware_error_type(FIRMWARE_ACTION_MATCH, info);
-    }
-
-    /* Check the sub board type, if firwmare upgrade sub board, then sub_type must be 0 */
-    for (i = 0; i < MAX_DEV_NUM; i++) {
-        if (sub_type == info->sub_type[i]) {
-            dbg_print(is_debug_on, "sub type is 0x%x \n", sub_type);
-            break;
-        }
-    }
-    if (i == MAX_DEV_NUM) {
-        dbg_print(is_debug_on, "Error: The sub type[0x%x] is not matched \n", sub_type);
-        return firmware_error_type(FIRMWARE_ACTION_MATCH, info);
-    }
-
-    /* if firwmare upgrade main board,  then sub_type must be 0 and slot must be 0
-    * if firwmare upgrade sub board, then sub_type must not be 0 and slot must not be 0 */
-    if (((sub_type != 0) && (slot < 1)) || ((sub_type == 0) && (slot != 0))) {
-        dbg_print(is_debug_on, "Error: The sub type[0x%x] is not match slot %d error.\n", sub_type, slot);
-        return firmware_error_type(FIRMWARE_ACTION_MATCH, info);
-    }
-
-    dbg_print(is_debug_on, "Success check file info.\n");
-
-    return FIRMWARE_SUCCESS;
-}
-
-/*
- * firmware_get_dev_file_name
- * function:Gets the name of the device file
- * @info: param[in] Upgrade file information
- * @len:  param[in] Device file name length
- * @file_name: param[out] Device file name
- */
-static int firmware_get_dev_file_name(name_info_t *info, char *file_name, int len)
-{
-    int ret;
-
-    ret = FIRMWARE_SUCCESS;
-    switch(info->file_type) {
-    case FIRMWARE_VME:
-        snprintf(file_name, len, "/dev/firmware_cpld_ispvme%d", info->chain);
-        break;
-    case FIRMWARE_ISC:
-    case FIRMWARE_JBI:
-        snprintf(file_name, len, "/dev/firmware_cpld%d", info->chain);
-        break;
-    case FIRMWARE_SPI_LOGIC_DEV:
-    case FIRMWARE_SYSFS_DEV:
-    case FIRMWARE_MTD:
-        snprintf(file_name, len, "/dev/firmware_sysfs%d", info->chain);
-        break;
-    default:
-        ret = FIRMWARE_FAILED;
-        break;
-    }
-
-    return ret;
- }
-
-/**
- * firmware_check_chip_verison
- * function: Check chip version
- * @fd:   param[in] Device file descriptor
- * @info: param[in] Upgrade file information
- * return value : success--FIRMWARE_SUCCESS, other fail return error code
- */
-int firmware_check_chip_verison(int fd, name_info_t *info)
-{
-    int ret;
-    cmd_info_t cmd_info;
-    char version[FIRMWARE_NAME_LEN + 1];
-
-    dbg_print(is_debug_on, "Check chip version.\n");
-    mem_clear(version, FIRMWARE_NAME_LEN);
-    cmd_info.size = FIRMWARE_NAME_LEN;
-    cmd_info.data = (void *) version;
-
-    /* Ignore version checking */
-    if (strncmp("v", info->version, 1) == 0) {
-        dbg_print(is_debug_on, "Skip check chip version.\n");
-        return FIRMWARE_SUCCESS;
-    }
-
-    /* Get the program version from the device file */
-    ret = ioctl(fd, FIRMWARE_GET_VERSION, &cmd_info);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Error: Failed to get version(chain %d, version %s).\n",
-                    info->chain, info->version);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, NULL);
-    }
-    dbg_print(is_debug_on, "Chip verion: %s, file chip verion: %s.\n", version, info->version);
-
-    /* The device version is the same and does not upgrade */
-    if (strcmp(version, info->version) == 0) {
-        dbg_print(is_debug_on, "the file program version is same as the firmware version %s \n",
-                    info->version);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-    dbg_print(is_debug_on, "Check version pass.\n");
-
-    return FIRMWARE_SUCCESS;
-}
-
-/*
- * firmware_get_file_size
- * function: Gets the upgrade file size
- * @file_name: param[in]  Upgrade file name
- * @size: param[out] Upgrade file size
- * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-static int firmware_get_file_size(char *file_name, uint32_t *size)
-{
-    int ret;
-    struct stat buf;
-
-    ret = stat(file_name, &buf);
-    if (ret < 0) {
-        return FIRMWARE_FAILED;
-    }
-
-    if (buf.st_size < 0 || buf.st_size - header_offset < 0) {
-        return FIRMWARE_FAILED;
-    }
-    /* Remove the upgrade file header information to actually upgrade the content size */
-    *size = buf.st_size - header_offset;
-
-    return FIRMWARE_SUCCESS;
-}
-
-/*
- * firmware_get_file_info
- * function: Gets the contents of the upgrade file
- * @file_name: param[in]   Upgrade file name
- * @size:  param[in]  Upgrade file size
- * @buf:   param[out] Upgrade the file content
- * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-static int firmware_get_file_info(char *file_name, uint8_t *buf, uint32_t size)
-{
-    FILE *fp;
-    int len;
-    int ret;
-
-    fp = fopen(file_name, "r");
-    if (fp == NULL) {
-        return FIRMWARE_FAILED;
-    }
-    /* Removes the contents of the upgrade file header information */
-    ret = fseek(fp, header_offset, SEEK_SET);
-    if (ret < 0) {
-        fclose(fp);
-        return FIRMWARE_FAILED;
-    }
-
-    len = fread(buf, size, 1, fp);
-    if (len < 0) {
-        fclose(fp);
-        return FIRMWARE_FAILED;
-    }
-    fclose(fp);
-
-    return FIRMWARE_SUCCESS;
-}
-
-/*
-* firmware_upgrade
-* function: firmware upgrade
-* @file_name:   param[in] Upgrade file name
-* @info:        param[in] Upgrade file information
-* return value : success--FIRMWARE_SUCCESS, other fail return error code
-*/
-static int firmware_upgrade(char *file_name, name_info_t *info)
-{
-    int ret;
-    int fd;
-    uint32_t upg_size;
-    uint8_t *upg_buf;
-    char dev_file_name[FIRMWARE_NAME_LEN];
-    unsigned long crc;
-
-    dbg_print(is_debug_on, "Upgrade firmware: %s.\n", file_name);
-    mem_clear(dev_file_name, FIRMWARE_NAME_LEN);
-    ret = firmware_get_dev_file_name(info, dev_file_name, FIRMWARE_NAME_LEN - 1);
-    if (ret != FIRMWARE_SUCCESS) {
-        dbg_print(is_debug_on, "Error: Failed to get dev file name.\n");
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-
-    fd = open(dev_file_name, O_RDWR);
-    if (fd < 0) {
-        dbg_print(is_debug_on, "Error: Failed to open %s.\n", dev_file_name);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-
-#if 0
-    /* check chip name */
-    ret = firmware_check_chip_name(fd, info);
-    if (ret != FIRMWARE_SUCCESS) {
-        dbg_print(is_debug_on, "Error: Failed to check chip name: %s.\n", dev_file_name);
-        close(fd);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-#endif
-
-    /* Check chip version */
-    ret = firmware_check_chip_verison(fd, info);
-    if (ret != FIRMWARE_SUCCESS) {
-        dbg_print(is_debug_on, "Error: Failed to check chip version: %s.\n", dev_file_name);
-        close(fd);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-
-    /* Gets the upgrade file size */
-    ret = firmware_get_file_size(file_name, &upg_size);
-    if (ret != FIRMWARE_SUCCESS) {
-        dbg_print(is_debug_on, "Error: Failed to get file size: %s.\n", file_name);
-        close(fd);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-
-    if (upg_size == 0) {
-        dbg_print(is_debug_on, "Error: The upgrade file is empty \n");
-        close(fd);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-
-    upg_buf = (uint8_t *) malloc(upg_size + 1);
-    if (upg_buf == NULL) {
-        dbg_print(is_debug_on, "Error: Failed to malloc memory for upgrade file info: %s.\n",
-                  dev_file_name);
-        close(fd);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-
-    /* Gets the contents of the upgrade file */
-    mem_clear(upg_buf, upg_size + 1);
-    ret = firmware_get_file_info(file_name, upg_buf, upg_size);
-    if (ret != FIRMWARE_SUCCESS) {
-        dbg_print(is_debug_on, "Error: Failed to read file info: %s.\n", file_name);
-        free(upg_buf);
-        close(fd);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-
-    /* file crc32 check */
-    crc = crc32(0, (const unsigned char *)upg_buf, (unsigned int)upg_size);
-    if (crc != info->crc32) {
-        dbg_print(is_debug_on, "Error: Failed to check file crc: %s.\n", file_name);
-        dbg_print(is_debug_on, "the crc value is : %#08x.\n", (unsigned int)crc);
-        free(upg_buf);
-        close(fd);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-
-    dbg_print(is_debug_on, "Start upgrading firmware, wait...\n");
-
-    /* Start firmware upgrade */
-    switch (info->file_type) {
-    case FIRMWARE_VME:
-        dbg_print(is_debug_on, "start to ispvme upgrade: %s.\n", file_name);
-        ret = firmware_upgrade_ispvme(fd, file_name, info);
-        break;
-    case FIRMWARE_ISC:
-    case FIRMWARE_JBI:
-        dbg_print(is_debug_on, "start to upgrade: %s.\n", file_name);
-        ret = firmware_upgrade_jtag(fd, upg_buf, upg_size, info);
-        break;
-    case FIRMWARE_SPI_LOGIC_DEV:
-        dbg_print(is_debug_on, "start to spi logic dev upgrade: %s.\n", file_name);
-        ret = firmware_upgrade_spi_logic_dev(fd, upg_buf, upg_size, info);
-        break;
-    case FIRMWARE_SYSFS_DEV:
-        dbg_print(is_debug_on, "start to sysfs upgrade: %s.\n", file_name);
-        ret = firmware_upgrade_sysfs(fd, upg_buf, upg_size, info);
-        break;
-    case FIRMWARE_MTD:
-        dbg_print(is_debug_on, "start to mtd device upgrade: %s.\n", file_name);
-        ret = firmware_upgrade_mtd(fd, upg_buf, upg_size, info);
-        break;
-    default:
-        dbg_print(is_debug_on, "Error: file type is not support: %s.\n", file_name);
-        free(upg_buf);
-        close(fd);
-        return firmware_error_type(FIRMWARE_ACTION_UPGRADE, info);
-    }
-
-    dbg_print(is_debug_on, "Completed.\n");
-    if (ret != FIRMWARE_SUCCESS) {
-        dbg_print(is_debug_on, "Error: Failed to upgrade: %s.\n", dev_file_name);
-        free(upg_buf);
-        close(fd);
-        return firmware_error_type(FIRMWARE_ACTION_UPGRADE, info);
-    }
-
-    free(upg_buf);
-    close(fd);
-
-    return FIRMWARE_SUCCESS;
-}
-
-/*
-* firmware_upgrade_test
-* function: firmware upgrade test
-* @file_name:   param[in] Upgrade file name
-* @info:        param[in] Upgrade file information
-* return value : success--FIRMWARE_SUCCESS, other fail return error code
-*/
-static int firmware_upgrade_test(char *file_name, name_info_t *info)
-{
-    int ret;
-    int fd;
-    uint32_t upg_size;
-    uint8_t *upg_buf;
-    char dev_file_name[FIRMWARE_NAME_LEN];
-    unsigned long crc;
-
-    dbg_print(is_debug_on, "Upgrade firmware test: %s.\n", file_name);
-    mem_clear(dev_file_name, FIRMWARE_NAME_LEN);
-    ret = firmware_get_dev_file_name(info, dev_file_name, FIRMWARE_NAME_LEN - 1);
-    if (ret != FIRMWARE_SUCCESS) {
-        dbg_print(is_debug_on, "Error: Failed to get dev file name.\n");
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-
-    fd = open(dev_file_name, O_RDWR);
-    if (fd < 0) {
-        dbg_print(is_debug_on, "Error: Failed to open %s.\n", dev_file_name);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-
-#if 0
-    /* check chip name */
-    ret = firmware_check_chip_name(fd, info);
-    if (ret != FIRMWARE_SUCCESS) {
-        dbg_print(is_debug_on, "Error: Failed to check chip name: %s.\n", dev_file_name);
-        close(fd);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-#endif
-
-    /* Check chip version */
-    ret = firmware_check_chip_verison(fd, info);
-    if (ret != FIRMWARE_SUCCESS) {
-        dbg_print(is_debug_on, "Error: Failed to check chip version: %s.\n", dev_file_name);
-        close(fd);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-
-    /* Gets the upgrade file size */
-    ret = firmware_get_file_size(file_name, &upg_size);
-    if (ret != FIRMWARE_SUCCESS) {
-        dbg_print(is_debug_on, "Error: Failed to get file size: %s.\n", file_name);
-        close(fd);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-
-    upg_buf = (uint8_t *) malloc(upg_size + 1);
-    if (upg_buf == NULL) {
-        dbg_print(is_debug_on, "Error: Failed to malloc memory for upgrade file info: %s.\n",
-                  dev_file_name);
-        close(fd);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-
-    /* Gets the contents of the upgrade file */
-    mem_clear(upg_buf, upg_size + 1);
-    ret = firmware_get_file_info(file_name, upg_buf, upg_size);
-    if (ret != FIRMWARE_SUCCESS) {
-        dbg_print(is_debug_on, "Error: Failed to read file info: %s.\n", file_name);
-        free(upg_buf);
-        close(fd);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-
-    /* file crc32 check */
-    crc = crc32(0, (const unsigned char *)upg_buf, (unsigned int)upg_size);
-    if (crc != info->crc32) {
-        dbg_print(is_debug_on, "Error: Failed to check file crc: %s.\n", file_name);
-        dbg_print(is_debug_on, "the crc value is : %#08x.\n", (unsigned int)crc);
-        free(upg_buf);
-        close(fd);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-
-    dbg_print(is_debug_on, "Start upgrading firmware test, wait...\n");
-
-    /* Start firmware upgrade */
-    switch (info->file_type) {
-    case FIRMWARE_VME:
-        dbg_print(is_debug_on, "start to ispvme upgrade test: %s.\n", file_name);
-        /* WME upgrade link testing is the same as upgrading, using vme test file. */
-        ret = firmware_upgrade_ispvme(fd, file_name, info);
-        break;
-    case FIRMWARE_ISC:
-    case FIRMWARE_JBI:
-        dbg_print(is_debug_on, "start to upgrade test: %s.\n", file_name);
-        ret = firmware_upgrade_jtag_test(fd, upg_buf, upg_size, info);
-        break;
-    case FIRMWARE_SPI_LOGIC_DEV:
-        dbg_print(is_debug_on, "start to spi logic dev upgrade test: %s.\n", file_name);
-        ret = firmware_upgrade_spi_logic_dev_test(fd,info);
-        break;
-    case FIRMWARE_SYSFS_DEV:
-        dbg_print(is_debug_on, "start to sysfs upgrade test: %s.\n", file_name);
-        ret = firmware_upgrade_sysfs_test(fd, info);
-        break;
-    case FIRMWARE_MTD:
-        dbg_print(is_debug_on, "start to mtd device upgrade test: %s.\n", file_name);
-        ret = firmware_upgrade_mtd_test(fd, info);
-        break;
-    default:
-        dbg_print(is_debug_on, "Error: test file type is not support: %s.\n", file_name);
-        free(upg_buf);
-        close(fd);
-        return firmware_error_type(FIRMWARE_ACTION_UPGRADE, info);
-    }
-
-    if (ret != FIRMWARE_SUCCESS) {
-        dbg_print(is_debug_on, "Error: Failed to upgrade test: %s ret=%d.\n", dev_file_name, ret);
-        free(upg_buf);
-        close(fd);
-        if (ret == FIRMWARE_NOT_SUPPORT) {
-            return firmware_error_type(FIRMWARE_ACTION_SUPPORT, info);
-        } else {
-            return firmware_error_type(FIRMWARE_ACTION_UPGRADE, info);
-        }
-    }
-
-    free(upg_buf);
-    close(fd);
-
-    return FIRMWARE_SUCCESS;
-}
-
-/*
- * firmware_upgrade_file_type_map
- * function:Gets the corresponding upgrade file type from the upgrade file type list
- * @value : param[in] file type name
- * return value : file type, firmware_file_type_t
- */
-static firmware_file_type_t firmware_upgrade_file_type_map(char *type_str)
-{
-    int type_num;
-    int i;
-
-    type_num = (sizeof(firmware_file_str) /sizeof(firmware_file_str[0]));
-    for (i = 0; i < type_num; i++) {
-        if (!strncmp(firmware_file_str[i].firmware_file_name_str, type_str,
-                strlen(firmware_file_str[i].firmware_file_name_str))) {
-            return firmware_file_str[i].firmware_file_type;
-        }
-    }
-
-    dbg_print(is_debug_on, "firmware file type unknown\n");
-    return FIRMWARE_NONE;
-}
-
-/*
- * firmware_upgrade_parse_kv
- * function:Parses the header information of the upgrade file based on the key and value
- * @key: param[in] key
- * @value : param[in] value
- * @info : param[out]  Upgrade file information
- * return value : success--FIRMWARE_SUCCESS, other fail return error code
- */
-static int firmware_upgrade_parse_kv(const char *key, const char *value, name_info_t *info)
-{
-    int i;
-    if (key == NULL || value == NULL) {
-        dbg_print(is_debug_on, "Error: failed to get ther key or value.\n");
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    } else if (strcmp(key, FILEHEADER_DEVTYPE) == 0) {
-        /* main board type */
-        for (i = 0; i < MAX_DEV_NUM && info->card_type[i]; i++);
-        if (i == MAX_DEV_NUM) {
-            dbg_print(is_debug_on, "Error: card type is full for %s. \n", value);
-            return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-        }
-        info->card_type[i] = strtoul(value, NULL, 0);
-    } else if (strcmp(key, FILEHEADER_SUBTYPE) == 0) {
-        /* sub board type */
-        for (i = 0; i < MAX_DEV_NUM && info->sub_type[i]; i++);
-        if (i == MAX_DEV_NUM) {
-            dbg_print(is_debug_on, "Error: sub type is full for %s. \n", value);
-            return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-        }
-        info->sub_type[i] = strtoul(value, NULL, 0);
-    } else if (strcmp(key, FILEHEADER_TYPE) == 0) {
-        /* Device type */
-        if (strcmp(value, FIRMWARE_CPLD_NAME) == 0) {
-            info->type = FIRMWARE_CPLD;
-        } else if (strcmp(value, FIRMWARE_FPGA_NAME) == 0) {
-            info->type = FIRMWARE_FPGA;
-        } else {
-            info->type = FIRMWARE_OTHER;
-        }
-    } else if (strcmp(key, FILEHEADER_CHAIN) == 0) {
-        /* link num */
-        info->chain = strtoul(value, NULL, 10);
-    } else if (strcmp(key, FILEHEADER_CHIPNAME) == 0) {
-        /* chip name */
-        if (strlen(value) >= FIRMWARE_NAME_LEN) {
-            dbg_print(is_debug_on, "Error: '%s' is too long for a chipname.\n", value);
-            return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-        }
-        mem_clear(info->chip_name, sizeof(info->chip_name));
-         snprintf(info->chip_name, sizeof(info->chip_name) - 1, "%s", value);
-    } else if (strcmp(key, FILEHEADER_VERSION) == 0) {
-        /* version */
-        if (strlen(value) >= FIRMWARE_NAME_LEN) {
-            dbg_print(is_debug_on, "Error: '%s' is too long for a version.\n", value);
-            return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-        }
-        mem_clear(info->version, sizeof(info->version));
-        snprintf(info->version, sizeof(info->version) - 1, "%s", value);
-    } else if (strcmp(key, FILEHEADER_FILETYPE) == 0) {
-        /* file type */
-        info->file_type = firmware_upgrade_file_type_map((char *)value);
-    } else if (strcmp(key, FILEHEADER_CRC) == 0) {
-        /* file crc32 */
-        info->crc32 = strtoul(value, NULL, 0);
-    } else {
-        dbg_print(is_debug_on, "Warning: key '%s' is unknown. Continue anyway.\n", key);
-        return FIRMWARE_SUCCESS;
-    }
-    dbg_print(is_debug_on, "key %s is matched.\n", key);
-    return FIRMWARE_SUCCESS;
- }
-
-/*
- * firmware_upgrade_parse_check
- * function:Check the results of header parsing
- * @file_name: Upgrade file name
- * @info : Upgrade file information
- * return value : success--FIRMWARE_SUCCESS, other fail return error code
- */
-static int firmware_upgrade_parse_check(char *file_name, name_info_t *info)
-{
-    int i;
-    if (info->card_type[0] == 0) {
-        dbg_print(is_debug_on, "Error: %s card type is missing.\n", file_name);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-    if ((info->type <= FIRMWARE_UNDEF_TYPE) || (info->type > FIRMWARE_OTHER)) {
-        dbg_print(is_debug_on, "Error: %s type is unknown.\n", file_name);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-    if (strlen(info->chip_name) == 0) {
-        dbg_print(is_debug_on, "Error: %s chip_name is empty.\n", file_name);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-    if (strlen(info->version) == 0) {
-        dbg_print(is_debug_on, "Error: %s version is empty.\n", file_name);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-    if ((info->file_type <= FIRMWARE_UNDEF_FILE_TYPE) || (info->file_type > FIRMWARE_NONE)) {
-        dbg_print(is_debug_on, "Error: %s file type is unknown.\n", file_name);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-    dbg_print(is_debug_on, "The file header parse:(%s) \n" , file_name);
-    dbg_print(is_debug_on, "    card type: ");
-    for (i = 0; i < MAX_DEV_NUM && info->card_type[i]; i++){
-        dbg_print(is_debug_on, "0x%x, ", info->card_type[i]);
-     }
-    dbg_print(is_debug_on, "\n"
-                           "    sub type : ");
-    for (i = 0; i < MAX_DEV_NUM && info->sub_type[i]; i++){
-        dbg_print(is_debug_on, "0x%x, ", info->sub_type[i]);
-    }
-    dbg_print(is_debug_on, "\n"
-                           "    type     : %d, \n"
-                           "    chain     : %d, \n"
-                           "    chip name: %s \n"
-                           "    version  : %s \n"
-                           "    file type: %d \n"
-                           "    the crc32 value: %#x \n",
-    info->type, info->chain, info->chip_name, info->version, info->file_type, info->crc32);
-    return FIRMWARE_SUCCESS;
-}
-
-/*
- * firmware_upgrade_read_header
- * function:Read the header information of the upgrade file
- * @file_name: param[in] Upgrade file name
- * @info : param[out]  Upgrade file information
- * return value : success--FIRMWARE_SUCCESS, other fail return error code
- */
-static int firmware_upgrade_read_header( char *file_name, name_info_t *info)
-{
-    FILE *fp;
-    char *charp;
-    char *charn;
-    char header_buffer[MAX_HEADER_SIZE];
-    char header_key[MAX_HEADER_KV_SIZE];
-    char header_var[MAX_HEADER_KV_SIZE];
-    int ret;
-    int len;
-
-    fp = fopen(file_name, "r");
-    if (fp == NULL) {
-        dbg_print(is_debug_on, "Error: Failed to open file: %s. \n", file_name);
-        perror("fopen");
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-
-    mem_clear(header_buffer, sizeof(header_buffer));
-    len = fread(header_buffer, MAX_HEADER_SIZE - 1, 1, fp);
-    fclose(fp);
-    if (len < 0) {
-        dbg_print(is_debug_on, "Error: Failed to read header : %s. \n", file_name);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-    header_buffer[MAX_HEADER_SIZE - 1] = 0;
-
-    charp = strstr(header_buffer, "FILEHEADER(\n");
-    if (charp == NULL) {
-        dbg_print(is_debug_on, "Error: The file format %s is wrong. \n",  file_name);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-    charp += strlen("FILEHEADER(\n");
-
-    dbg_print(is_debug_on, "File parse start.\n");
-    mem_clear(info, sizeof(name_info_t));
-    ret = 0;
-    charn = charp;
-    mem_clear(header_key, sizeof(header_key));
-    while (*charn != ')') {
-        charn = strpbrk(charp, "=,)\n");
-        if (charn == NULL) {
-            dbg_print(is_debug_on, "Error: The parser can't find mark.\n");
-            return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-        }
-        if (charn - charp >= MAX_HEADER_KV_SIZE) {
-            dbg_print(is_debug_on, "Error: The parser find a overflow mark.\n");
-            return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-        }
-        switch (*charn) {
-        case '=':
-            mem_clear(header_key, sizeof(header_key));
-            memcpy(header_key, charp, charn - charp);
-            break;
-        case '\n':
-        case ',':
-            mem_clear(header_var, sizeof(header_var));
-            memcpy(header_var, charp, charn - charp);
-            dbg_print(is_debug_on, "Parser: %s = %s .\n", header_key, header_var);
-            firmware_upgrade_parse_kv(header_key, header_var, info);
-            break;
-        case ')':
-            break;
-        default:
-            dbg_print(is_debug_on, "Error: The parser get unexpected mark '%c(0x%02X)'.\n", *charn, *charn);
-            return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-        }
-        charp = (charn + 1);
-    }
-
-    ret = firmware_upgrade_parse_check(file_name, info);
-    if (ret != FIRMWARE_SUCCESS) {
-        return FIRMWARE_FAILED;
-    }
-
-    header_offset = charp + 1 - header_buffer; /* charp at '\n' */
-    dbg_print(is_debug_on,"the header offset is  %d \n", header_offset);
-    return FIRMWARE_SUCCESS;
-}
-
-/*
- * firmware_upgrade_one_file
- * function: upgrade file
- * @file_name: Upgrade file name
- * @main_type: main board type
- * @sub_type:  sub board type
- * @slot: 0--main, sub slot starts at 1
- * return value : success--FIRMWARE_SUCCESS, other fail return error code
- */
-static int firmware_upgrade_one_file(char *file_name, int main_type, int sub_type, int slot)
-{
-    int ret;
-    name_info_t info;
-
-    if ((slot < 0) || (file_name == NULL)) {
-        dbg_print(is_debug_on, "Failed firmware_upgrade_one_file parameter err.\n");
-        return FIRMWARE_FAILED;
-    }
-
-    dbg_print(is_debug_on, "firmware upgrade %s 0x%x 0x%x %d\n", file_name, main_type, sub_type, slot);
-    /* Read the header information of the upgrade file */
-    ret = firmware_upgrade_read_header(file_name, &info);
-    if (ret != FIRMWARE_SUCCESS) {
-        dbg_print(is_debug_on, "Failed to get file header: %s\n", file_name);
-        return ret;
-    }
-
-    /* Check the file information to determine that the file is available for use on the device */
-    ret = firmware_check_file_info(&info, main_type, sub_type, slot);
-    if (ret != FIRMWARE_SUCCESS) {
-        dbg_print(is_debug_on, "File is not match with the device: %s.\n", file_name);
-        return ret;
-    }
-
-    /* The link number corresponding to the upgrade file is calculated based on the slot number.
-       16 links are reserved for each slot. main boade slot is 0. */
-    info.chain += slot * FIRMWARE_SLOT_MAX_NUM;
-    ret = firmware_upgrade(file_name, &info);
-    if (ret != FIRMWARE_SUCCESS) {
-        dbg_print(is_debug_on, "Failed to upgrade: %s.\n", file_name);
-        return ret;
-    }
-
-    return FIRMWARE_SUCCESS;
-}
-
-/*
- * firmware_upgrade_file_test
- * function: upgrade file
- * @file_name: Upgrade file name
- * @main_type: main board type
- * @sub_type:  sub board type
- * @slot: 0--main, sub slot starts at 1
- * return value : success--FIRMWARE_SUCCESS, other fail return error code
- */
-static int firmware_upgrade_file_test(char *file_name, int main_type, int sub_type, int slot)
-{
-    int ret;
-    name_info_t info;
-
-    if ((slot < 0) || (file_name == NULL)) {
-        dbg_print(is_debug_on, "Failed firmware_upgrade_one_file parameter err.\n");
-        return FIRMWARE_FAILED;
-    }
-
-    dbg_print(is_debug_on, "firmware upgrade %s 0x%x 0x%x %d\n", file_name, main_type, sub_type, slot);
-    /* Read the header information of the upgrade file */
-    ret = firmware_upgrade_read_header(file_name, &info);
-    if (ret != FIRMWARE_SUCCESS) {
-        dbg_print(is_debug_on, "Failed to get file header: %s, ret=%d\n", file_name, ret);
-        return ret;
-    }
-
-    /* Check the file information to determine that the file is available for use on the device */
-    ret = firmware_check_file_info(&info, main_type, sub_type, slot);
-    if (ret != FIRMWARE_SUCCESS) {
-        dbg_print(is_debug_on, "File is not match with the device: %s, ret=%d.\n", file_name, ret);
-        return ret;
-    }
-
-    /* The link number corresponding to the upgrade file is calculated based on the slot number.
-       16 links are reserved for each slot. main boade slot is 0. */
-    info.chain += slot * FIRMWARE_SLOT_MAX_NUM;
-    ret = firmware_upgrade_test(file_name, &info);
-    if (ret != FIRMWARE_SUCCESS) {
-        dbg_print(is_debug_on, "Failed to upgrade: %s, ret=%d\n", file_name, ret);
-        return ret;
-    }
-
-    return FIRMWARE_SUCCESS;
-}
-
-static int firmware_upgrade_data_dump(char *argv[])
-{
-    int ret;
-    uint32_t offset, len;
-
-    /* dump by type */
-    if (strcmp(argv[2], "spi_logic_dev") == 0) {
-        /* usag: firmware_upgrade dump spi_logic_dev dev_path offset size print/record_file_path */
-        offset = strtoul(argv[4], NULL, 0);
-        len = strtoul(argv[5], NULL, 0);
-        /* offset needs align by 256 bytes */
-        if ((offset & 0xff) || (len == 0)) {
-            dbg_print(is_debug_on,"only support offset align by 256 bytes.\n");
-            return FIRMWARE_FAILED;
-        }
-        dbg_print(is_debug_on, "start to dump %s data. offset:0x%x, len:0x%x\n", argv[2], offset, len);
-        ret = firmware_upgrade_spi_logic_dev_dump(argv[3], offset, len, argv[6]);
-    } else {
-        dbg_print(is_debug_on, "Error: %s not support dump data.\n", argv[2]);
-        return FIRMWARE_FAILED;
-    }
-
-    if (ret != FIRMWARE_SUCCESS) {
-        dbg_print(is_debug_on, "Failed to dump %s data. ret:%d\n", argv[3], ret);
-        return FIRMWARE_FAILED;
-    }
-
-    return FIRMWARE_SUCCESS;
-}
-
-int main(int argc, char *argv[])
-{
-    int ret;
-    int main_type, sub_type, slot;
-
-    is_debug_on = firmware_upgrade_debug();
-
-    signal(SIGTERM, SIG_IGN);   /* ignore kill signal */
-    signal(SIGINT, SIG_IGN);    /* ignore ctrl+c signal */
-    signal(SIGTSTP, SIG_IGN);   /* ignore ctrl+z signal */
-
-    if ((argc != 5) && (argc != 6) && (argc != 7)) {
-        printf("Use:\n");
-        printf(" upgrade file : firmware_upgrade file main_type sub_type slot\n");
-        printf(" upgrade test : firmware_upgrade test file main_type sub_type slot\n");
-        printf(" spi_logic_dev dump : firmware_upgrade dump spi_logic_dev dev_path offset size print/record_file_path\n");
-        dbg_print(is_debug_on, "Failed to upgrade the number of argv: %d.\n", argc);
-        return ERR_FW_UPGRADE;
-    }
-
-    if (argc == 5) {
-        main_type = strtoul(argv[2], NULL, 16);
-        sub_type = strtoul(argv[3], NULL, 16);
-        slot = strtoul(argv[4], NULL, 10);
-        printf("+================================+\n");
-        printf("|Begin to upgrade, please wait...|\n");
-        ret = firmware_upgrade_one_file(argv[1], main_type, sub_type, slot);
-        if (ret != FIRMWARE_SUCCESS) {
-            dbg_print(is_debug_on, "Failed to upgrade a firmware file: %s. (%d)\n", argv[1], ret);
-            printf("|           Upgrade failed!      |\n");
-            printf("+================================+\n");
-            return ret;
-        }
-
-        printf("|          Upgrade succeeded!    |\n");
-        printf("+================================+\n");
-        dbg_print(is_debug_on, "Sucess to upgrade a firmware file: %s.\n", argv[1]);
-        return FIRMWARE_SUCCESS;
-    } else if ((argc == 6) && (strcmp(argv[1], "test") == 0)) {
-        main_type = strtoul(argv[3], NULL, 16);
-        sub_type = strtoul(argv[4], NULL, 16);
-        slot = strtoul(argv[5], NULL, 10);
-        printf("+=====================================+\n");
-        printf("|Begin to upgrade test, please wait...|\n");
-        ret = firmware_upgrade_file_test(argv[2], main_type, sub_type, slot);
-        if (ret == FIRMWARE_SUCCESS) {
-            printf("|       Upgrade test succeeded!       |\n");
-            printf("+=====================================+\n");
-            dbg_print(is_debug_on, "Sucess to upgrade test a firmware file: %s.\n", argv[2]);
-            return FIRMWARE_SUCCESS;
-        } else if (ret == ERR_FW_DO_UPGRADE_NOT_SUPPORT) {
-            dbg_print(is_debug_on, "do not support to upgrade test a firmware file: %s. (%d)\n", argv[2], ret);
-            printf("|     Not support to upgrade test!    |\n");
-            printf("+=====================================+\n");
-            return ret;
-        } else {
-            dbg_print(is_debug_on, "Failed to upgrade test a firmware file: %s. (%d)\n", argv[2], ret);
-            printf("|         Upgrade test failed!        |\n");
-            printf("+=====================================+\n");
-            return ret;
-        }
-    } else if (strcmp(argv[1], "dump") == 0) {
-        /* print device data */
-        ret = firmware_upgrade_data_dump(argv);
-        if (ret == FIRMWARE_SUCCESS) {
-            printf("dump data succeeded.\n");
-            return FIRMWARE_SUCCESS;
-        } else {
-            printf("dump data failed. ret:%d\n", ret);
-            return ret;
-        }
-    }
-
-    printf("+=================+\n");
-    printf("|  UPGRADE FAIL!  |\n");
-    printf("+=================+\n");
-
-    return ERR_FW_UPGRADE;
- }
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/COPYING b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/COPYING
deleted file mode 100644
index 3912109b5cd6..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/COPYING
+++ /dev/null
@@ -1,340 +0,0 @@
-		    GNU GENERAL PUBLIC LICENSE
-		       Version 2, June 1991
-
- Copyright (C) 1989, 1991 Free Software Foundation, Inc.
-                       51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
- Everyone is permitted to copy and distribute verbatim copies
- of this license document, but changing it is not allowed.
-
-			    Preamble
-
-  The licenses for most software are designed to take away your
-freedom to share and change it.  By contrast, the GNU General Public
-License is intended to guarantee your freedom to share and change free
-software--to make sure the software is free for all its users.  This
-General Public License applies to most of the Free Software
-Foundation's software and to any other program whose authors commit to
-using it.  (Some other Free Software Foundation software is covered by
-the GNU Library General Public License instead.)  You can apply it to
-your programs, too.
-
-  When we speak of free software, we are referring to freedom, not
-price.  Our General Public Licenses are designed to make sure that you
-have the freedom to distribute copies of free software (and charge for
-this service if you wish), that you receive source code or can get it
-if you want it, that you can change the software or use pieces of it
-in new free programs; and that you know you can do these things.
-
-  To protect your rights, we need to make restrictions that forbid
-anyone to deny you these rights or to ask you to surrender the rights.
-These restrictions translate to certain responsibilities for you if you
-distribute copies of the software, or if you modify it.
-
-  For example, if you distribute copies of such a program, whether
-gratis or for a fee, you must give the recipients all the rights that
-you have.  You must make sure that they, too, receive or can get the
-source code.  And you must show them these terms so they know their
-rights.
-
-  We protect your rights with two steps: (1) copyright the software, and
-(2) offer you this license which gives you legal permission to copy,
-distribute and/or modify the software.
-
-  Also, for each author's protection and ours, we want to make certain
-that everyone understands that there is no warranty for this free
-software.  If the software is modified by someone else and passed on, we
-want its recipients to know that what they have is not the original, so
-that any problems introduced by others will not reflect on the original
-authors' reputations.
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-  Finally, any free program is threatened constantly by software
-patents.  We wish to avoid the danger that redistributors of a free
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-program proprietary.  To prevent this, we have made it clear that any
-patent must be licensed for everyone's free use or not licensed at all.
-
-  The precise terms and conditions for copying, distribution and
-modification follow.
-
-		    GNU GENERAL PUBLIC LICENSE
-   TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION
-
-  0. This License applies to any program or other work which contains
-a notice placed by the copyright holder saying it may be distributed
-under the terms of this General Public License.  The "Program", below,
-refers to any such program or work, and a "work based on the Program"
-means either the Program or any derivative work under copyright law:
-that is to say, a work containing the Program or a portion of it,
-either verbatim or with modifications and/or translated into another
-language.  (Hereinafter, translation is included without limitation in
-the term "modification".)  Each licensee is addressed as "you".
-
-Activities other than copying, distribution and modification are not
-covered by this License; they are outside its scope.  The act of
-running the Program is not restricted, and the output from the Program
-is covered only if its contents constitute a work based on the
-Program (independent of having been made by running the Program).
-Whether that is true depends on what the Program does.
-
-  1. You may copy and distribute verbatim copies of the Program's
-source code as you receive it, in any medium, provided that you
-conspicuously and appropriately publish on each copy an appropriate
-copyright notice and disclaimer of warranty; keep intact all the
-notices that refer to this License and to the absence of any warranty;
-and give any other recipients of the Program a copy of this License
-along with the Program.
-
-You may charge a fee for the physical act of transferring a copy, and
-you may at your option offer warranty protection in exchange for a fee.
-
-  2. You may modify your copy or copies of the Program or any portion
-of it, thus forming a work based on the Program, and copy and
-distribute such modifications or work under the terms of Section 1
-above, provided that you also meet all of these conditions:
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-    stating that you changed the files and the date of any change.
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-    whole or in part contains or is derived from the Program or any
-    part thereof, to be licensed as a whole at no charge to all third
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-
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-identifiable sections of that work are not derived from the Program,
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-distribute the same sections as part of a whole which is a work based
-on the Program, the distribution of the whole must be on the terms of
-this License, whose permissions for other licensees extend to the
-entire whole, and thus to each and every part regardless of who wrote it.
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-Thus, it is not the intent of this section to claim rights or contest
-your rights to work written entirely by you; rather, the intent is to
-exercise the right to control the distribution of derivative or
-collective works based on the Program.
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-In addition, mere aggregation of another work not based on the Program
-with the Program (or with a work based on the Program) on a volume of
-a storage or distribution medium does not bring the other work under
-the scope of this License.
-
-  3. You may copy and distribute the Program (or a work based on it,
-under Section 2) in object code or executable form under the terms of
-Sections 1 and 2 above provided that you also do one of the following:
-
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-    source code, which must be distributed under the terms of Sections
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-    years, to give any third party, for a charge no more than your
-    cost of physically performing source distribution, a complete
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-    allowed only for noncommercial distribution and only if you
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-
-  4. You may not copy, modify, sublicense, or distribute the Program
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-
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-
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-
-    Gnomovision version 69, Copyright (C) year name of author
-    Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
-    This is free software, and you are welcome to redistribute it
-    under certain conditions; type `show c' for details.
-
-The hypothetical commands `show w' and `show c' should show the appropriate
-parts of the General Public License.  Of course, the commands you use may
-be called something other than `show w' and `show c'; they could even be
-mouse-clicks or menu items--whatever suits your program.
-
-You should also get your employer (if you work as a programmer) or your
-school, if any, to sign a "copyright disclaimer" for the program, if
-necessary.  Here is a sample; alter the names:
-
-  Yoyodyne, Inc., hereby disclaims all copyright interest in the program
-  `Gnomovision' (which makes passes at compilers) written by James Hacker.
-
-  <signature of Ty Coon>, 1 April 1989
-  Ty Coon, President of Vice
-
-This General Public License does not permit incorporating your program into
-proprietary programs.  If your program is a subroutine library, you may
-consider it more useful to permit linking proprietary applications with the
-library.  If this is what you want to do, use the GNU Library General
-Public License instead of this License.
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/LICENSE.Lattice b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/LICENSE.Lattice
deleted file mode 100644
index 259613f09129..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/LICENSE.Lattice
+++ /dev/null
@@ -1,28 +0,0 @@
-LATTICE DIAMOND PROGRAMMER EMBEDDED AND ispVM EMBEDDED SOFTWARE
-LICENSE TERMS
-The Lattice Diamond Programmer Embedded Software (and ispVM Embedded Software) is subject to the
-following licensing terms:
-Copyright (c) 2016, Lattice Semiconductor Corporation. All rights reserved.
-Redistribution and use in source and binary forms, with or without modification, are permitted provided
-that the following conditions are met:
-•
-•
-Redistributions of source code must retain the above copyright notice, this list of
-conditions and the following disclaimer.
-Redistributions in binary form must reproduce the above copyright notice, this list of
-conditions and the following disclaimer in the documentation and/or other materials
-provided with the distribution.•
-Neither the name of Lattice Semiconductor Corporation, its affiliates, or the names of its
-contributors may be used to endorse or promote products derived from this software
-without specific prior written permission.
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
-IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
-THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
-PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
-CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
-EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
-PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
-OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
-WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
-OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
-ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/hardware.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/hardware.c
deleted file mode 100644
index c43c9095fda6..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/hardware.c
+++ /dev/null
@@ -1,263 +0,0 @@
-/*********************************************************************************
-* Lattice Semiconductor Corp. Copyright 2000-2008
-*
-* This is the hardware.c of ispVME V12.1 for JTAG programmable devices.
-* All the functions requiring customization are organized into this file for
-* the convinience of porting.
-*********************************************************************************/
-/*********************************************************************************
-* Revision History:
-*
-* 09/11/07 NN Type cast mismatch variables
-* 09/24/07 NN Added calibration function.
-*             Calibration will help to determine the system clock frequency
-*             and the count value for one micro-second delay of the target
-*             specific hardware.
-*             Modified the ispVMDelay function
-*             Removed Delay Percent support
-*             Moved the sclock() function from ivm_core.c to hardware.c
-*********************************************************************************/
-
-#include <stdint.h>
-#include <linux/types.h>
-#include <unistd.h>
-#include <stdio.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <fcntl.h>
-#include <sys/ioctl.h>
-#include <firmware_app.h>
-#include <time.h>
-
-/********************************************************************************
-* Declaration of global variables
-*
-*********************************************************************************/
-
-unsigned char  g_siIspPins        = 0x00;   /*Keeper of JTAG pin state*/
-unsigned short g_usInPort         = 0x379;  /*Address of the TDO pin*/
-unsigned short g_usOutPort        = 0x378;  /*Address of TDI, TMS, TCK pin*/
-unsigned short g_usCpu_Frequency  = 1000;   /*Enter your CPU frequency here, unit in MHz.*/
-
-/*********************************************************************************
-* This is the definition of the bit locations of each respective
-* signal in the global variable g_siIspPins.
-*
-* NOTE: Users must add their own implementation here to define
-*       the bit location of the signal to target their hardware.
-*       The example below is for the Lattice download cable on
-*       on the parallel port.
-*
-*********************************************************************************/
-
-#if 0
-const unsigned char g_ucPinTDI          = JTAG_TDI;    /* Bit address of TDI */
-const unsigned char g_ucPinTCK          = JTAG_TCK;    /* Bit address of TCK */
-const unsigned char g_ucPinTMS          = JTAG_TMS;    /* Bit address of TMS */
-const unsigned char g_ucPinENABLE       = JTAG_ENABLE;    /* Bit address of ENABLE */
-const unsigned char g_ucPinTRST         = JTAG_TRST;    /* Bit address of TRST */
-const unsigned char g_ucPinTDO          = JTAG_TDO;    /* Bit address of TDO*/
-#endif
-int g_file_fd = -1;
-/***************************************************************
-*
-* Functions declared in hardware.c module.
-*
-***************************************************************/
-void writePort(unsigned char a_ucPins, unsigned char a_ucValue);
-unsigned char readPort();
-void sclock();
-void ispVMDelay(unsigned short a_usTimeDelay);
-void calibration(void);
-
-/********************************************************************************
-* writePort
-* To apply the specified value to the pins indicated. This routine will
-* be modified for specific systems.
-* As an example, this code uses the IBM-PC standard Parallel port, along with the
-* schematic shown in Lattice documentation, to apply the signals to the
-* JTAG pins.
-*
-* PC Parallel port pin    Signal name           Port bit address
-*        2                g_ucPinTDI             1
-*        3                g_ucPinTCK             2
-*        4                g_ucPinTMS             4
-*        5                g_ucPinENABLE          8
-*        6                g_ucPinTRST            16
-*        10               g_ucPinTDO             64
-*
-*  Parameters:
-*   - a_ucPins, which is actually a set of bit flags (defined above)
-*     that correspond to the bits of the data port. Each of the I/O port
-*     bits that drives an isp programming pin is assigned a flag
-*     (through a #define) corresponding to the signal it drives. To
-*     change the value of more than one pin at once, the flags are added
-*     together, much like file access flags are.
-*
-*     The bit flags are only set if the pin is to be changed. Bits that
-*     do not have their flags set do not have their levels changed. The
-*     state of the port is always manintained in the static global
-*     variable g_siIspPins, so that each pin can be addressed individually
-*     without disturbing the others.
-*
-*   - a_ucValue, which is either HIGH (0x01 ) or LOW (0x00 ). Only these two
-*     values are valid. Any non-zero number sets the pin(s) high.
-*
-*********************************************************************************/
-
-void writePort(unsigned char a_ucPins, unsigned char a_ucValue)
-{
-    switch (a_ucPins) {
-    case JTAG_TCK:
-        ioctl(g_file_fd, FIRMWARE_JTAG_TCK, &a_ucValue);
-        break;
-    case JTAG_TDI:
-        ioctl(g_file_fd, FIRMWARE_JTAG_TDI, &a_ucValue);
-        break;
-    case JTAG_TMS:
-        ioctl(g_file_fd, FIRMWARE_JTAG_TMS, &a_ucValue);
-        break;
-    case JTAG_ENABLE:
-        ioctl(g_file_fd, FIRMWARE_JTAG_EN, &a_ucValue);
-        break;
-    case JTAG_TRST:
-        //ioctl(g_file_fd, FIRMWARE_JTAG_TRST, &a_ucValue);
-        break;
-    default:
-        break;
-    }
-}
-
-/*********************************************************************************
-*
-* readPort
-*
-* Returns the value of the TDO from the device.
-*
-**********************************************************************************/
-unsigned char readPort()
-{
-    unsigned char ucRet = 0;
-
-    ioctl(g_file_fd, FIRMWARE_JTAG_TDO, &ucRet);
-    return (ucRet);
-}
-
-/*********************************************************************************
-* sclock
-*
-* Apply a pulse to TCK.
-*
-* This function is located here so that users can modify to slow down TCK if
-* it is too fast (> 25MHZ). Users can change the IdleTime assignment from 0 to
-* 1, 2... to effectively slowing down TCK by half, quarter...
-*
-*********************************************************************************/
-void sclock()
-{
-    unsigned short IdleTime    = 0; //change to > 0 if need to slow down TCK
-    unsigned short usIdleIndex = 0;
-    IdleTime++;
-    for (usIdleIndex = 0; usIdleIndex < IdleTime; usIdleIndex++) {
-        writePort(JTAG_TCK, 0x01);
-    }
-    for (usIdleIndex = 0; usIdleIndex < IdleTime; usIdleIndex++) {
-        writePort(JTAG_TCK, 0x00);
-    }
-}
-/********************************************************************************
-*
-* ispVMDelay
-*
-*
-* Users must implement a delay to observe a_usTimeDelay, where
-* bit 15 of the a_usTimeDelay defines the unit.
-*      1 = milliseconds
-*      0 = microseconds
-* Example:
-*      a_usTimeDelay = 0x0001 = 1 microsecond delay.
-*      a_usTimeDelay = 0x8001 = 1 millisecond delay.
-*
-* This subroutine is called upon to provide a delay from 1 millisecond to a few
-* hundreds milliseconds each time.
-* It is understood that due to a_usTimeDelay is defined as unsigned short, a 16 bits
-* integer, this function is restricted to produce a delay to 64000 micro-seconds
-* or 32000 milli-second maximum. The VME file will never pass on to this function
-* a delay time > those maximum number. If it needs more than those maximum, the VME
-* file will launch the delay function several times to realize a larger delay time
-* cummulatively.
-* It is perfectly alright to provide a longer delay than required. It is not
-* acceptable if the delay is shorter.
-*
-* Delay function example--using the machine clock signal of the native CPU------
-* When porting ispVME to a native CPU environment, the speed of CPU or
-* the system clock that drives the CPU is usually known.
-* The speed or the time it takes for the native CPU to execute one for loop
-* then can be calculated as follows:
-*       The for loop usually is compiled into the ASSEMBLY code as shown below:
-*       LOOP: DEC RA;
-*             JNZ LOOP;
-*       If each line of assembly code needs 4 machine cycles to execute,
-*       the total number of machine cycles to execute the loop is 2 x 4 = 8.
-*       Usually system clock = machine clock (the internal CPU clock).
-*       Note: Some CPU has a clock multiplier to double the system clock for
-          the machine clock.
-*
-*       Let the machine clock frequency of the CPU be F, or 1 machine cycle = 1/F.
-*       The time it takes to execute one for loop = (1/F ) x 8.
-*       Or one micro-second = F(MHz)/8;
-*
-* Example: The CPU internal clock is set to 100Mhz, then one micro-second = 100/8 = 12
-*
-* The C code shown below can be used to create the milli-second accuracy.
-* Users only need to enter the speed of the cpu.
-*
-**********************************************************************************/
-void ispVMDelay(unsigned short a_usTimeDelay)
-{
-    struct timespec ts;
-
-    if (a_usTimeDelay & 0x8000) {
-        /* milliseconds */
-        a_usTimeDelay &= 0x7FFF;
-        ts.tv_sec  = (long int) (a_usTimeDelay / 1000);
-        ts.tv_nsec = (long int) (a_usTimeDelay % 1000) * 1000000ul;
-    } else {
-        /* microseconds */
-        ts.tv_sec  = 0;
-        ts.tv_nsec = (long int) a_usTimeDelay * 1000ul;
-    }
-
-    nanosleep(&ts, NULL);
-}
-
-/*********************************************************************************
-*
-* calibration
-*
-* It is important to confirm if the delay function is indeed providing
-* the accuracy required. Also one other important parameter needed
-* checking is the clock frequency.
-* Calibration will help to determine the system clock frequency
-* and the loop_per_micro value for one micro-second delay of the target
-* specific hardware.
-*
-**********************************************************************************/
-void calibration(void)
-{
-    /*Apply 2 pulses to TCK.*/
-    writePort(JTAG_TCK, 0x00);
-    writePort(JTAG_TCK, 0x01);
-    writePort(JTAG_TCK, 0x00);
-    writePort(JTAG_TCK, 0x01);
-    writePort(JTAG_TCK, 0x00);
-
-    /*Delay for 1 millisecond. Pass on 1000 or 0x8001 both = 1ms delay.*/
-    ispVMDelay(0x8001);
-
-    /*Apply 2 pulses to TCK*/
-    writePort(JTAG_TCK, 0x01);
-    writePort(JTAG_TCK, 0x00);
-    writePort(JTAG_TCK, 0x01);
-    writePort(JTAG_TCK, 0x00);
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/ispvm_ui.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/ispvm_ui.c
deleted file mode 100644
index 69a8e53852b5..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/ispvm_ui.c
+++ /dev/null
@@ -1,837 +0,0 @@
-/**************************************************************
-*
-* Lattice Semiconductor Corp. Copyright 2008
-*
-* ispVME Embedded allows programming of Lattice's suite of FPGA
-* devices on embedded systems through the JTAG port.  The software
-* is distributed in source code form and is open to re - distribution
-* and modification where applicable.
-*
-* ispVME Embedded C Source comprised with 3 modules:
-* ispvm_ui.c is the module provides input and output support.
-* ivm_core.c is the module interpret the VME file(s).
-* hardware.c is the module access the JTAG port of the device(s).
-*
-* The optional module cable.c is for supporting Lattice's parallel
-* port ispDOWNLOAD cable on DOS and Windows 95/98 O/S. It can be
-* requested from Lattice's ispVMSupport.
-*
-***************************************************************/
-
-/**************************************************************
-*
-* Revision History of ispvm_ui.c
-*
-* 3/6/07 ht Added functions vme_out_char(),vme_out_hex(),
-*           vme_out_string() to provide output resources.
-*           Consolidate all printf() calls into the added output
-*           functions.
-*
-* 09/11/07 NN Added Global variables initialization
-* 09/24/07 NN Added a switch allowing users to do calibration.
-* Calibration will help to determine the system clock frequency
-* and the count value for one micro-second delay of the target
-* specific hardware.
-* Removed Delay Percent support
-* 11/15/07  NN moved the checking of the File CRC to the end of processing
-* 08/28/08 NN Added Calculate checksum support.
-***************************************************************/
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <ctype.h>
-#include <debug.h>
-#include <vmopcode.h>
-#include <unistd.h>
-#include <firmware_app.h>
-
-/***************************************************************
-*
-* File pointer to the VME file.
-*
-***************************************************************/
-
-FILE *g_pVMEFile = NULL;
-
-/***************************************************************
-*
-* Functions declared in this ispvm_ui.c module
-*
-***************************************************************/
-unsigned char GetByte(void);
-void vme_out_char(unsigned char charOut);
-void vme_out_hex(unsigned char hexOut);
-void vme_out_string(char *stringOut);
-void ispVMMemManager(signed char cTarget, unsigned short usSize);
-void ispVMFreeMem(void);
-void error_handler(short a_siRetCode, char *pszMessage);
-signed char ispVM(const char *a_pszFilename);
-
-/***************************************************************
-*
-* Global variables.
-*
-***************************************************************/
-unsigned short g_usPreviousSize = 0;
-unsigned short g_usExpectedCRC = 0;
-
-/***************************************************************
-*
-* External variables and functions declared in ivm_core.c module.
-*
-***************************************************************/
-extern signed char ispVMCode();
-extern void ispVMCalculateCRC32(unsigned char a_ucData);
-extern void ispVMStart();
-extern void ispVMEnd();
-extern unsigned short g_usCalculatedCRC;
-extern unsigned short g_usDataType;
-extern unsigned char *g_pucOutMaskData,
-*g_pucInData,
-*g_pucOutData,
-*g_pucHIRData,
-*g_pucTIRData,
-*g_pucHDRData,
-*g_pucTDRData,
-*g_pucOutDMaskData,
-*g_pucIntelBuffer;
-extern unsigned char *g_pucHeapMemory;
-extern unsigned short g_iHeapCounter;
-extern unsigned short g_iHEAPSize;
-extern unsigned short g_usIntelDataIndex;
-extern unsigned short g_usIntelBufferSize;
-extern LVDSPair *g_pLVDSList;
-//08/28/08 NN Added Calculate checksum support.
-extern unsigned long g_usChecksum;
-extern unsigned int g_uiChecksumIndex;
-
-/* Added reinit for call ispvme more than once */
-extern void ivm_core_reinit();
-/***************************************************************
-*
-* External variables and functions declared in hardware.c module.
-*
-***************************************************************/
-extern void calibration(void);
-extern unsigned short g_usCpu_Frequency;
-extern int g_file_fd;
-
-/***************************************************************
-*
-* Supported VME versions.
-*
-***************************************************************/
-
-const char *const g_szSupportedVersions[] = { "__VME2.0", "__VME3.0", "____12.0", "____12.1", 0 };
-
-/***************************************************************
-*
-* GetByte
-*
-* Returns a byte to the caller. The returned byte depends on the
-* g_usDataType register. If the HEAP_IN bit is set, then the byte
-* is returned from the HEAP. If the LHEAP_IN bit is set, then
-* the byte is returned from the intelligent buffer. Otherwise,
-* the byte is returned directly from the VME file.
-*
-***************************************************************/
-
-char* strlwr(char *str)
-{
-    char *orig = str;
-// process the string
-    for (; *str != '\0'; str++)
-        *str = tolower(*str);
-    return orig;
-}
-
-unsigned char GetByte()
-{
-    unsigned char ucData = 0;
-
-    if (g_usDataType & HEAP_IN) {
-
-        /***************************************************************
-        *
-        * Get data from repeat buffer.
-        *
-        ***************************************************************/
-
-        if (g_iHeapCounter > g_iHEAPSize) {
-
-            /***************************************************************
-            *
-            * Data over-run.
-            *
-            ***************************************************************/
-
-            return 0xFF;
-        }
-
-        ucData = g_pucHeapMemory[g_iHeapCounter++];
-    }
-    else if ( g_usDataType & LHEAP_IN ) {
-
-        /***************************************************************
-        *
-        * Get data from intel buffer.
-        *
-        ***************************************************************/
-
-        if (g_usIntelDataIndex >= g_usIntelBufferSize) {
-
-            /***************************************************************
-            *
-            * Data over-run.
-            *
-            ***************************************************************/
-
-            return 0xFF;
-        }
-
-        ucData = g_pucIntelBuffer[g_usIntelDataIndex++];
-    }
-    else {
-
-        /***************************************************************
-        *
-        * Get data from file.
-        *
-        ***************************************************************/
-
-        ucData = (unsigned char)fgetc(g_pVMEFile);
-
-        if (feof(g_pVMEFile)) {
-
-            /***************************************************************
-            *
-            * Reached EOF.
-            *
-            ***************************************************************/
-
-            return 0xFF;
-        }
-        /***************************************************************
-        *
-        * Calculate the 32-bit CRC if the expected CRC exist.
-        *
-        ***************************************************************/
-        if( g_usExpectedCRC != 0)
-        {
-            ispVMCalculateCRC32(ucData);
-        }
-    }
-
-    return (ucData);
-}
-
-/***************************************************************
-*
-* vme_out_char
-*
-* Send a character out to the output resource if available.
-* The monitor is the default output resource.
-*
-*
-***************************************************************/
-void vme_out_char(unsigned char charOut)
-{
-    dbg_print(is_debug_on, "%c", charOut);
-}
-/***************************************************************
-*
-* vme_out_hex
-*
-* Send a character out as in hex format to the output resource
-* if available. The monitor is the default output resource.
-*
-*
-***************************************************************/
-void vme_out_hex(unsigned char hexOut)
-{
-    dbg_print(is_debug_on, "%.2X", hexOut);
-}
-/***************************************************************
-*
-* vme_out_string
-*
-* Send a text string out to the output resource if available.
-* The monitor is the default output resource.
-*
-*
-***************************************************************/
-void vme_out_string(char *stringOut)
-{
-    dbg_print(is_debug_on,"%s",stringOut);
-}
-/***************************************************************
-*
-* ispVMMemManager
-*
-* Allocate memory based on cTarget. The memory size is specified
-* by usSize.
-*
-***************************************************************/
-
-void ispVMMemManager(signed char cTarget, unsigned short usSize)
-{
-    switch (cTarget) {
-    case XTDI:
-    case TDI:
-        if (g_pucInData != NULL) {
-            if (g_usPreviousSize == usSize) { /*memory exist*/
-                break;
-            }
-            else {
-                free(g_pucInData);
-                g_pucInData = NULL;
-            }
-        }
-        g_pucInData = (unsigned char *)malloc(usSize / 8 + 2);
-        g_usPreviousSize = usSize;
-    case XTDO:
-    case TDO:
-        if (g_pucOutData != NULL) {
-            if (g_usPreviousSize == usSize) { /*already exist*/
-                break;
-            }
-            else {
-                free(g_pucOutData);
-                g_pucOutData = NULL;
-            }
-        }
-        g_pucOutData = (unsigned char *)malloc(usSize / 8 + 2);
-        g_usPreviousSize = usSize;
-        break;
-    case MASK:
-        if (g_pucOutMaskData != NULL) {
-            if (g_usPreviousSize == usSize) { /*already allocated*/
-                break;
-            }
-            else {
-                free(g_pucOutMaskData);
-                g_pucOutMaskData = NULL;
-            }
-        }
-        g_pucOutMaskData = (unsigned char *)malloc(usSize / 8 + 2);
-        g_usPreviousSize = usSize;
-        break;
-    case HIR:
-        if (g_pucHIRData != NULL) {
-            free(g_pucHIRData);
-            g_pucHIRData = NULL;
-        }
-        g_pucHIRData = (unsigned char *)malloc(usSize / 8 + 2);
-        break;
-    case TIR:
-        if (g_pucTIRData != NULL) {
-            free(g_pucTIRData);
-            g_pucTIRData = NULL;
-        }
-        g_pucTIRData = (unsigned char *)malloc(usSize / 8 + 2);
-        break;
-    case HDR:
-        if (g_pucHDRData != NULL) {
-            free(g_pucHDRData);
-            g_pucHDRData = NULL;
-        }
-        g_pucHDRData = (unsigned char *)malloc(usSize / 8 + 2);
-        break;
-    case TDR:
-        if (g_pucTDRData != NULL) {
-            free(g_pucTDRData);
-            g_pucTDRData = NULL;
-        }
-        g_pucTDRData = (unsigned char *)malloc(usSize / 8 + 2);
-        break;
-    case HEAP:
-        if (g_pucHeapMemory != NULL) {
-            free(g_pucHeapMemory);
-            g_pucHeapMemory = NULL;
-        }
-        g_pucHeapMemory = (unsigned char *)malloc(usSize + 2);
-        break;
-    case DMASK:
-        if (g_pucOutDMaskData != NULL) {
-            if (g_usPreviousSize == usSize) { /*already allocated*/
-                break;
-            }
-            else {
-                free(g_pucOutDMaskData);
-                g_pucOutDMaskData = NULL;
-            }
-        }
-        g_pucOutDMaskData = (unsigned char *)malloc(usSize / 8 + 2);
-        g_usPreviousSize = usSize;
-        break;
-    case LHEAP:
-        if (g_pucIntelBuffer != NULL) {
-            free(g_pucIntelBuffer);
-            g_pucIntelBuffer = NULL;
-        }
-        g_pucIntelBuffer = (unsigned char *)malloc(usSize + 2);
-        break;
-    case LVDS:
-        if (g_pLVDSList != NULL) {
-            free(g_pLVDSList);
-            g_pLVDSList = NULL;
-        }
-        g_pLVDSList = (LVDSPair * )calloc(usSize, sizeof(LVDSPair));
-        break;
-    default:
-        return;
-    }
-}
-
-/***************************************************************
-*
-* ispVMFreeMem
-*
-* Free memory that were dynamically allocated.
-*
-***************************************************************/
-
-void ispVMFreeMem()
-{
-    if (g_pucHeapMemory != NULL) {
-        free(g_pucHeapMemory);
-        g_pucHeapMemory = NULL;
-    }
-
-    if (g_pucOutMaskData != NULL) {
-        free(g_pucOutMaskData);
-        g_pucOutMaskData = NULL;
-    }
-
-    if (g_pucInData != NULL) {
-        free(g_pucInData);
-        g_pucInData = NULL;
-    }
-
-    if (g_pucOutData != NULL) {
-        free(g_pucOutData);
-        g_pucOutData = NULL;
-    }
-
-    if (g_pucHIRData != NULL) {
-        free(g_pucHIRData);
-        g_pucHIRData = NULL;
-    }
-
-    if (g_pucTIRData != NULL) {
-        free(g_pucTIRData);
-        g_pucTIRData = NULL;
-    }
-
-    if (g_pucHDRData != NULL) {
-        free(g_pucHDRData);
-        g_pucHDRData = NULL;
-    }
-
-    if (g_pucTDRData != NULL) {
-        free(g_pucTDRData);
-        g_pucTDRData = NULL;
-    }
-
-    if (g_pucOutDMaskData != NULL) {
-        free(g_pucOutDMaskData);
-        g_pucOutDMaskData = NULL;
-    }
-
-    if (g_pucIntelBuffer != NULL) {
-        free(g_pucIntelBuffer);
-        g_pucIntelBuffer = NULL;
-    }
-
-    if (g_pLVDSList != NULL) {
-        free(g_pLVDSList);
-        g_pLVDSList = NULL;
-    }
-}
-
-/***************************************************************
-*
-* error_handler
-*
-* Reports the error message.
-*
-***************************************************************/
-
-void error_handler(short a_siRetCode, char *pszMessage)
-{
-    const char *pszErrorMessage[] = { "pass",
-        "verification fail",
-        "can't find the file",
-        "wrong file type",
-        "file error",
-        "option error",
-        "crc verification error" };
-
-    strcpy(pszMessage, pszErrorMessage[-a_siRetCode]);
-}
-/***************************************************************
-*
-* ispVM
-*
-* The entry point of the ispVM embedded. If the version and CRC
-* are verified, then the VME will be processed.
-*
-***************************************************************/
-signed char ispVM(const char *a_pszFilename)
-{
-    char szFileVersion[9] = { 0 };
-    signed char cRetCode         = 0;
-    signed char cIndex           = 0;
-    signed char cVersionIndex    = 0;
-    unsigned char ucReadByte     = 0;
-    int ret;
-    /***************************************************************
-    *
-    * Global variables initialization.
-    *
-    * 09/11/07 NN Added
-    ***************************************************************/
-    g_pucHeapMemory     = NULL;
-    g_iHeapCounter      = 0;
-    g_iHEAPSize         = 0;
-    g_usIntelDataIndex  = 0;
-    g_usIntelBufferSize = 0;
-    g_usPreviousSize     = 0;
-
-    /***************************************************************
-    *
-    * Open a file pointer to the VME file.
-    *
-    ***************************************************************/
-
-    if ((g_pVMEFile = fopen(a_pszFilename, "rb")) == NULL) {
-        return VME_FILE_READ_FAILURE;
-    }
-    /* Skip the contents of the file header */
-    ret=fseek(g_pVMEFile, header_offset, SEEK_SET);
-    if (ret < 0) {
-      vme_out_string("Failed to skip header.\n");
-      fclose(g_pVMEFile);
-      g_pVMEFile = NULL;
-      return VME_ARGUMENT_FAILURE;
-    }
-
-    g_usCalculatedCRC = 0;
-    g_usExpectedCRC   = 0;
-    ucReadByte = GetByte();
-    switch (ucReadByte) {
-    case FILE_CRC:
-
-        /***************************************************************
-        *
-        * Read and store the expected CRC to do the comparison at the end.
-        * Only versions 3.0 and higher support CRC protection.
-        *
-        ***************************************************************/
-
-        g_usExpectedCRC = (unsigned char)fgetc(g_pVMEFile);
-        g_usExpectedCRC <<= 8;
-        g_usExpectedCRC |= fgetc(g_pVMEFile);
-
-        /***************************************************************
-        *
-        * Read and store the version of the VME file.
-        *
-        ***************************************************************/
-
-        for (cIndex = 0; cIndex < 8; cIndex++) {
-            szFileVersion[cIndex] = GetByte();
-        }
-        break;
-    default:
-
-        /***************************************************************
-        *
-        * Read and store the version of the VME file.  Must be version 2.0.
-        *
-        ***************************************************************/
-
-        szFileVersion[0] = (signed char)ucReadByte;
-        for (cIndex = 1; cIndex < 8; cIndex++) {
-            szFileVersion[cIndex] = GetByte();
-        }
-
-        break;
-    }
-
-    /***************************************************************
-    *
-    * Compare the VME file version against the supported version.
-    *
-    ***************************************************************/
-    for (cVersionIndex = 0; g_szSupportedVersions[cVersionIndex] != 0; cVersionIndex++) {
-        for (cIndex = 0; cIndex < 8; cIndex++) {
-            if (szFileVersion[cIndex] != g_szSupportedVersions[cVersionIndex][cIndex]) {
-                cRetCode = VME_VERSION_FAILURE;
-                break;
-            }
-            cRetCode = 0;
-        }
-
-        if (cRetCode == 0) {
-
-            /***************************************************************
-            *
-            * Found matching version, break.
-            *
-            ***************************************************************/
-
-            break;
-        }
-    }
-
-    if (cRetCode < 0) {
-
-        /***************************************************************
-        *
-        * VME file version failed to match the supported versions.
-        *
-        ***************************************************************/
-
-        fclose(g_pVMEFile);
-        g_pVMEFile = NULL;
-        return VME_VERSION_FAILURE;
-    }
-
-    /***************************************************************
-    *
-    * Enable the JTAG port to communicate with the device.
-    * Set the JTAG state machine to the Test-Logic/Reset State.
-    *
-    ***************************************************************/
-    ispVMStart();
-
-    /***************************************************************
-    *
-    * Process the VME file.
-    *
-    ***************************************************************/
-
-    cRetCode = ispVMCode();
-
-    /***************************************************************
-    *
-    * Set the JTAG State Machine to Test-Logic/Reset state then disable
-    * the communication with the JTAG port.
-    *
-    ***************************************************************/
-
-    ispVMEnd();
-
-    fclose(g_pVMEFile);
-    g_pVMEFile = NULL;
-
-    ispVMFreeMem();
-
-    /***************************************************************
-    *
-    * Compare the expected CRC versus the calculated CRC.
-    *
-    ***************************************************************/
-
-    if (cRetCode == 0 && g_usExpectedCRC != 0 && (g_usExpectedCRC != g_usCalculatedCRC)) {
-        printf("Expected CRC:   0x%.4X\n", g_usExpectedCRC);
-        printf("Calculated CRC: 0x%.4X\n", g_usCalculatedCRC);
-        return VME_CRC_FAILURE;
-    }
-
-    return (cRetCode);
-}
-
-/***************************************************************
-*
-* ispvme_reinit
-*
-* Reinit ispvm_ui variables.
-*
-***************************************************************/
-static void ispvm_ui_reinit()
-{
-    g_pVMEFile = NULL;
-    g_usPreviousSize = 0;
-    g_usExpectedCRC = 0;
-}
-
-/***************************************************************
-*
-* main
-*
-***************************************************************/
-
-int ispvme_main(int argc, char *argv[], int file_fd, name_info_t *info)
-{
-    unsigned short iCommandLineIndex  = 0;
-    short siRetCode                   = 0;
-    char szExtension[5] = { 0 };
-    char szCommandLineArg[300] = { 0 };
-    short sicalibrate                 = 0;
-
-    ispvm_ui_reinit();
-    ivm_core_reinit();
-
-    //08/28/08 NN Added Calculate checksum support.
-    g_usChecksum = 0;
-    g_uiChecksumIndex = 0;
-
-    if (file_fd < 0) {
-        dbg_print(is_debug_on, "Error:firmware upgrade ispvme dev parameters failed.\r\n");
-        return -1;
-    } else {
-        g_file_fd = file_fd;
-    }
-
-#if 0
-    ret = firmware_check_chip_name(g_file_fd, info);
-    if (ret != FIRMWARE_SUCCESS) {
-        dbg_print(is_debug_on, "Error: Failed to check chip name: %s.\n", file_name);
-        close(g_file_fd);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-
-    ret = firmware_check_chip_verison(g_file_fd, info);
-    if (ret != FIRMWARE_SUCCESS) {
-        dbg_print(is_debug_on, "Error: Failed to check chip version: %s.\n", file_name);
-        close(g_file_fd);
-        return firmware_error_type(FIRMWARE_ACTION_CHECK, info);
-    }
-#endif
-
-    vme_out_string("                 Lattice Semiconductor Corp.\n");
-    vme_out_string("\n             ispVME(tm) V");
-    vme_out_string(VME_VERSION_NUMBER);
-    vme_out_string(" Copyright 1998-2011.\n");
-    vme_out_string("\nFor daisy chain programming of all in-system programmable devices\n\n");
-
-    if (argc < 2) {
-        vme_out_string("\nUsage: vme [option] vme_file [vme_file]\n");
-        vme_out_string("Example: vme vme_file1.vme vme_file2.vme\n");
-        vme_out_string("option   -c:   do the calibration.\n");
-        vme_out_string("Example: vme -c\n");
-        vme_out_string("Example: vme -c vme_file1.vme vme_file2.vme\n");
-        vme_out_string("\n\n");
-        g_file_fd = -1;
-        /* Change return to determine whether the upgrade was successful */
-        return -1;
-    }
-    for (iCommandLineIndex = 1; iCommandLineIndex < argc; iCommandLineIndex++) {
-        strncpy(szCommandLineArg, argv[iCommandLineIndex], sizeof(szCommandLineArg) - 1);
-        if (!strcmp(strlwr(szCommandLineArg), "-c") && (iCommandLineIndex == 1)) {
-            sicalibrate = 1;
-        } else if (!strcmp(strlwr(szCommandLineArg), "-c") && (iCommandLineIndex != 1)) {
-            vme_out_string("Error: calibrate option -c must be the first argument\n\n");
-            g_file_fd = -1;
-            /* Change return to determine whether the upgrade was successful */
-            return -1;
-            //exit(1);
-        } else {
-            strcpy(szExtension, &szCommandLineArg[strlen(szCommandLineArg) - 4]);
-            strlwr(szExtension);
-            if (strcmp(szExtension, ".vme")) {
-                vme_out_string("Error: VME files must end with the extension *.vme\n\n");
-                g_file_fd = -1;
-                /* Change return to determine whether the upgrade was successful */
-                return -1;
-                //exit(1);
-            }
-        }
-    }
-    siRetCode = 0;
-
-    if (sicalibrate) {
-        calibration();
-    }
-    for (iCommandLineIndex = 1; iCommandLineIndex < argc; iCommandLineIndex++) {   /* Process all VME files sequentially */
-        strcpy(szCommandLineArg, argv[iCommandLineIndex]);
-        if (!strcmp(strlwr(szCommandLineArg), "-c") && (iCommandLineIndex == 1)) {
-
-        } else if (!strcmp(strlwr(szCommandLineArg), "-checksum")) {
-
-        } else {
-            vme_out_string("Processing virtual machine file (");
-            vme_out_string(szCommandLineArg);
-            vme_out_string(")......\n\n");
-            siRetCode = ispVM(argv[iCommandLineIndex]);
-            if (siRetCode < 0) {
-                break;
-            }
-        }
-    }
-
-    if (siRetCode < 0) {
-        error_handler(siRetCode, szCommandLineArg);
-        vme_out_string("Failed due to ");
-        vme_out_string(szCommandLineArg);
-        vme_out_string("\n\n");
-        vme_out_string("+=======+\n");
-        vme_out_string("| FAIL! |\n");
-        vme_out_string("+=======+\n\n");
-    } else {
-        vme_out_string("+=======+\n");
-        vme_out_string("| PASS! |\n");
-        vme_out_string("+=======+\n\n");
-        //08/28/08 NN Added Calculate checksum support.
-        if (g_usChecksum != 0) {
-            g_usChecksum &= 0xFFFF;
-            printf("Data Checksum: %.4X\n\n", (unsigned int)g_usChecksum);
-            g_usChecksum = 0;
-        }
-    }
-    g_file_fd = -1;
-    /* Change return to determine whether the upgrade was successful */
-    return siRetCode;
-    //exit(siRetCode);
-}
-
-/*
- * firmware_upgrade_ispvme
- * function: ispvme firmware upgrade
- * @file_fd:   param[in] Upgrade devices fd
- * @upgrade_file_name:   param[in] Upgrade file name
- * @info:        param[in] Upgrade file information
- * return value : success--FIRMWARE_SUCCESS, other fail return error code
- */
-int firmware_upgrade_ispvme(int file_fd, char *upgrade_file_name, name_info_t *info)
-{
-    char *argv[2];
-    int ret, rv, i, retry;
-
-    argv[1] = upgrade_file_name;
-
-    /* Initialize and enable */
-    rv = ioctl(file_fd, FIRMWARE_JTAG_INIT,NULL);
-    if (rv < 0) {
-      vme_out_string("Failed to init GPIO.\n");
-      return VME_ARGUMENT_FAILURE;
-    }
-
-    i = 0;
-    retry = FIRMWARE_UPGRADE_RETRY_CNT;
-
-    ret = 0;
-    while(i < retry) {
-        ret = ispvme_main(2, argv, file_fd, info);
-        if (ret < 0) {
-            i++;
-            dbg_print(is_debug_on, "%d times ispvme upgrade failed. ret %d.\n", i, ret);
-            continue;
-        } else {
-            dbg_print(is_debug_on, "ispvme upgrade success.\n");
-            break;
-        }
-    }
-
-    /* Upgrade completed, release */
-    rv = ioctl(file_fd, FIRMWARE_JTAG_FINISH, NULL);
-    if (rv < 0) {
-      vme_out_string("Failed to release GPIO.\n");
-      return VME_ARGUMENT_FAILURE;
-    }
-
-    return ret;
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/ivm_core.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/ivm_core.c
deleted file mode 100644
index 540be481d35e..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_gpio_vme/ivm_core.c
+++ /dev/null
@@ -1,3097 +0,0 @@
-/***************************************************************
-*
-* Lattice Semiconductor Corp. Copyright 2009
-*
-* ispVME Embedded allows programming of Lattice's suite of FPGA
-* devices on embedded systems through the JTAG port.  The software
-* is distributed in source code form and is open to re - distribution
-* and modification where applicable.
-*
-* Revision History of ivm_core.c module:
-* 4/25/06 ht   Change some variables from unsigned short or int
-*              to long int to make the code compiler independent.
-* 5/24/06 ht   Support using RESET (TRST) pin as a special purpose
-*              control pin such as triggering the loading of known
-*              state exit.
-* 3/6/07 ht added functions to support output to terminals
-*
-* 09/24/07 NN Type cast mismatch variables
-*          Moved the sclock() function to hardware.c
-* 08/28/08 NN Added Calculate checksum support.
-* 4/1/09 Nguyen replaced the recursive function call codes on
-*        the ispVMLCOUNT function
-*
-***************************************************************/
-
-#include <stdio.h>
-#include <string.h>
-#include <vmopcode.h>
-#include <firmware_app.h>
-
-/***************************************************************
-*
-* Global variables used to specify the flow control and data type.
-*
-*   g_usFlowControl:    flow control register. Each bit in the
-*                               register can potentially change the
-*                               personality of the embedded engine.
-*   g_usDataType:       holds the data type of the current row.
-*
-***************************************************************/
-
-unsigned short g_usFlowControl  = 0x0000;
-unsigned short g_usDataType     = 0x0000;
-
-/***************************************************************
-*
-* Global variables used to specify the ENDDR and ENDIR.
-*
-*   g_ucEndDR:      the state that the device goes to after SDR.
-*   g_ucEndIR:      the state that the device goes to after SIR.
-*
-***************************************************************/
-
-unsigned char g_ucEndDR = DRPAUSE;
-unsigned char g_ucEndIR = IRPAUSE;
-
-/***************************************************************
-*
-* Global variables used to support header/trailer.
-*
-*   g_usHeadDR:     the number of lead devices in bypass.
-*   g_usHeadIR:     the sum of IR length of lead devices.
-*   g_usTailDR:     the number of tail devices in bypass.
-*   g_usTailIR:     the sum of IR length of tail devices.
-*
-***************************************************************/
-
-unsigned short g_usHeadDR = 0;
-unsigned short g_usHeadIR = 0;
-unsigned short g_usTailDR = 0;
-unsigned short g_usTailIR = 0;
-
-/***************************************************************
-*
-* Global variable to store the number of bits of data or instruction
-* to be shifted into or out from the device.
-*
-***************************************************************/
-
-unsigned short g_usiDataSize = 0;
-
-/***************************************************************
-*
-* Stores the frequency. Default to 1 MHz.
-*
-***************************************************************/
-
-int g_iFrequency = 1000;
-
-/***************************************************************
-*
-* Stores the maximum amount of ram needed to hold a row of data.
-*
-***************************************************************/
-
-unsigned short g_usMaxSize = 0;
-
-/***************************************************************
-*
-* Stores the LSH or RSH value.
-*
-***************************************************************/
-
-unsigned short g_usShiftValue = 0;
-
-/***************************************************************
-*
-* Stores the current repeat loop value.
-*
-***************************************************************/
-
-unsigned short g_usRepeatLoops = 0;
-
-/***************************************************************
-*
-* Stores the current vendor.
-*
-***************************************************************/
-
-signed char g_cVendor = LATTICE;
-
-/***************************************************************
-*
-* Stores the VME file CRC.
-*
-***************************************************************/
-
-unsigned short g_usCalculatedCRC = 0;
-
-/***************************************************************
-*
-* Stores the Device Checksum.
-*
-***************************************************************/
-//08/28/08 NN Added Calculate checksum support.
-unsigned long g_usChecksum = 0;
-unsigned int g_uiChecksumIndex = 0;
-
-/***************************************************************
-*
-* Stores the current state of the JTAG state machine.
-*
-***************************************************************/
-
-signed char g_cCurrentJTAGState = 0;
-
-/***************************************************************
-*
-* Global variables used to support looping.
-*
-*   g_pucHeapMemory:    holds the entire repeat loop.
-*   g_iHeapCounter:     points to the current byte in the repeat loop.
-*   g_iHEAPSize:        the current size of the repeat in bytes.
-*
-***************************************************************/
-
-unsigned char *g_pucHeapMemory      = NULL;
-unsigned short g_iHeapCounter       = 0;
-unsigned short g_iHEAPSize          = 0;
-
-/***************************************************************
-*
-* Global variables used to support intelligent programming.
-*
-*   g_usIntelDataIndex:     points to the current byte of the
-*                               intelligent buffer.
-*   g_usIntelBufferSize:    holds the size of the intelligent
-*                               buffer.
-*
-***************************************************************/
-
-unsigned short g_usIntelDataIndex   = 0;
-unsigned short g_usIntelBufferSize  = 0;
-
-/****************************************************************************
-*
-* Holds the maximum size of each respective buffer. These variables are used
-* to write the HEX files when converting VME to HEX.
-*
-*****************************************************************************/
-
-unsigned short g_usTDOSize      = 0;
-unsigned short g_usMASKSize     = 0;
-unsigned short g_usTDISize      = 0;
-unsigned short g_usDMASKSize    = 0;
-unsigned short g_usLCOUNTSize   = 0;
-unsigned short g_usHDRSize      = 0;
-unsigned short g_usTDRSize      = 0;
-unsigned short g_usHIRSize      = 0;
-unsigned short g_usTIRSize      = 0;
-unsigned short g_usHeapSize     = 0;
-
-/***************************************************************
-*
-* Global variables used to store data.
-*
-*   g_pucOutMaskData:       local RAM to hold one row of MASK data.
-*   g_pucInData:            local RAM to hold one row of TDI data.
-*   g_pucOutData:           local RAM to hold one row of TDO data.
-*   g_pucHIRData:           local RAM to hold the current SIR header.
-*   g_pucTIRData:           local RAM to hold the current SIR trailer.
-*   g_pucHDRData:           local RAM to hold the current SDR header.
-*   g_pucTDRData:           local RAM to hold the current SDR trailer.
-*   g_pucIntelBuffer:       local RAM to hold the current intelligent buffer.
-*   g_pucOutDMaskData:      local RAM to hold one row of DMASK data.
-*
-***************************************************************/
-
-unsigned char *g_pucOutMaskData = NULL,
-*g_pucInData         = NULL,
-*g_pucOutData       = NULL,
-*g_pucHIRData       = NULL,
-*g_pucTIRData       = NULL,
-*g_pucHDRData       = NULL,
-*g_pucTDRData       = NULL,
-*g_pucIntelBuffer   = NULL,
-*g_pucOutDMaskData  = NULL;
-
-/***************************************************************
-*
-* JTAG state machine transition table.
-*
-***************************************************************/
-
-struct {
-    unsigned char  CurState;  /* From this state */
-    unsigned char  NextState; /* Step to this state */
-    unsigned char  Pattern;   /* The tragetory of TMS */
-    unsigned char  Pulses;    /* The number of steps */
-} g_JTAGTransistions[25] = {
-    { RESET,    RESET,      0xFC, 6 },  /* Transitions from RESET */
-    { RESET,    IDLE,       0x00, 1 },
-    { RESET,    DRPAUSE,    0x50, 5 },
-    { RESET,    IRPAUSE,    0x68, 6 },
-    { IDLE,     RESET,      0xE0, 3 },  /* Transitions from IDLE */
-    { IDLE,     DRPAUSE,    0xA0, 4 },
-    { IDLE,     IRPAUSE,    0xD0, 5 },
-    { DRPAUSE,  RESET,      0xF8, 5 },  /* Transitions from DRPAUSE */
-    { DRPAUSE,  IDLE,       0xC0, 3 },
-    { DRPAUSE,  IRPAUSE,    0xF4, 7 },
-    { DRPAUSE,  DRPAUSE,    0xE8, 6 },  /* 06/14/06 Support POLING STATUS LOOP*/
-    { IRPAUSE,  RESET,      0xF8, 5 },  /* Transitions from IRPAUSE */
-    { IRPAUSE,  IDLE,       0xC0, 3 },
-    { IRPAUSE,  DRPAUSE,    0xE8, 6 },
-    { DRPAUSE,  SHIFTDR,    0x80, 2 },  /* Extra transitions using SHIFTDR */
-    { IRPAUSE,  SHIFTDR,    0xE0, 5 },
-    { SHIFTDR,  DRPAUSE,    0x80, 2 },
-    { SHIFTDR,  IDLE,       0xC0, 3 },
-    { IRPAUSE,  SHIFTIR,    0x80, 2 },  /* Extra transitions using SHIFTIR */
-    { SHIFTIR,  IRPAUSE,    0x80, 2 },
-    { SHIFTIR,  IDLE,       0xC0, 3 },
-    { DRPAUSE,  DRCAPTURE,  0xE0, 4 }, /* 11/15/05 Support DRCAPTURE*/
-    { DRCAPTURE, DRPAUSE,   0x80, 2 },
-    { IDLE,     DRCAPTURE,  0x80, 2 },
-    { IRPAUSE,  DRCAPTURE,  0xE0, 4 }
-};
-
-/***************************************************************
-*
-* List to hold all LVDS pairs.
-*
-***************************************************************/
-
-LVDSPair *g_pLVDSList           = NULL;
-unsigned short g_usLVDSPairCount = 0;
-
-/***************************************************************
-*
-* Function prototypes.
-*
-***************************************************************/
-
-signed char ispVMCode();
-signed char ispVMDataCode();
-long int ispVMDataSize();
-void ispVMData(unsigned char *Data);
-signed char ispVMShift(signed char Code);
-signed char ispVMAmble(signed char Code);
-signed char ispVMLoop(unsigned short a_usLoopCount);
-signed char ispVMBitShift(signed char mode, unsigned short bits);
-void ispVMComment(unsigned short a_usCommentSize);
-void ispVMHeader(unsigned short a_usHeaderSize);
-signed char ispVMLCOUNT(unsigned short a_usCountSize);
-void ispVMClocks(unsigned short Clocks);
-void ispVMBypass(signed char ScanType, unsigned short Bits);
-void ispVMStateMachine(signed char NextState);
-void ispVMStart();
-void ispVMEnd();
-signed char ispVMSend(unsigned short int);
-signed char ispVMRead(unsigned short int);
-signed char ispVMReadandSave(unsigned short int);
-signed char ispVMProcessLVDS(unsigned short a_usLVDSCount);
-
-/***************************************************************
-*
-* External variables and functions in ispvm_ui.c module
-*
-***************************************************************/
-extern void vme_out_char(unsigned char charOut);
-extern void vme_out_hex(unsigned char hexOut);
-extern void vme_out_string(char *stringOut);
-extern unsigned char GetByte();
-extern void ispVMMemManager(signed char types, unsigned short size);
-
-/***************************************************************
-*
-* External variables and functions in hardware.c module
-*
-***************************************************************/
-extern void ispVMDelay(unsigned short int a_usMicroSecondDelay);
-extern unsigned char readPort();
-extern void writePort(unsigned char pins, unsigned char value);
-extern void sclock();
-extern signed char g_cCurrentJTAGState;
-#ifdef VME_DEBUG
-
-/***************************************************************
-*
-* GetState
-*
-* Returns the state as a string based on the opcode. Only used
-* for debugging purposes.
-*
-***************************************************************/
-
-const char* GetState(unsigned char a_ucState)
-{
-    switch (a_ucState) {
-    case RESET:
-        return ("RESET");
-    case IDLE:
-        return ("IDLE");
-    case IRPAUSE:
-        return ("IRPAUSE");
-    case DRPAUSE:
-        return ("DRPAUSE");
-    case SHIFTIR:
-        return ("SHIFTIR");
-    case SHIFTDR:
-        return ("SHIFTDR");
-    case DRCAPTURE: /* 11/15/05 support DRCAPTURE*/
-        return ("DRCAPTURE");
-    default:
-        break;
-    }
-
-    return 0;
-}
-
-/***************************************************************
-*
-* PrintData
-*
-* Prints the data. Only used for debugging purposes.
-*
-***************************************************************/
-
-void PrintData(unsigned short a_iDataSize, unsigned char *a_pucData)
-{
-    //09/11/07 NN added local variables initialization
-    unsigned short usByteSize  = 0;
-    unsigned short usBitIndex  = 0;
-    signed short usByteIndex   = 0;
-    unsigned char ucByte       = 0;
-    unsigned char ucFlipByte   = 0;
-
-    if (a_iDataSize % 8) {
-        //09/11/07 NN Type cast mismatch variables
-        usByteSize = (unsigned short)(a_iDataSize / 8 + 1);
-    } else {
-        //09/11/07 NN Type cast mismatch variables
-        usByteSize = (unsigned short)(a_iDataSize / 8);// 4
-    }
-    printf("(");
-    //09/11/07 NN Type cast mismatch variables
-    for (usByteIndex = (signed short)(usByteSize - 1); usByteIndex >= 0; usByteIndex--) {
-        ucByte = a_pucData[usByteIndex];
-        ucFlipByte = 0x00;
-
-        /***************************************************************
-        *
-        * Flip each byte.
-        *
-        ***************************************************************/
-
-        for (usBitIndex = 0; usBitIndex < 8; usBitIndex++) {
-            ucFlipByte <<= 1;
-            if (ucByte & 0x1) {
-                ucFlipByte |= 0x1;
-            }
-
-            ucByte >>= 1;
-        }
-
-        /***************************************************************
-        *
-        * Print the flipped byte.
-        *
-        ***************************************************************/
-
-        printf("%.02X", ucFlipByte);
-        if ((usByteSize - usByteIndex) % 40 == 39) {
-            printf("\n\t\t");
-        }
-        if (usByteIndex < 0)
-            break;
-    }
-    printf(")");
-}
-#endif //VME_DEBUG
-
-/***************************************************************
-*
-* ispVMDataSize
-*
-* Returns a VME-encoded number, usually used to indicate the
-* bit length of an SIR/SDR command.
-*
-***************************************************************/
-
-long int ispVMDataSize()
-{
-    //09/11/07 NN added local variables initialization
-    long int iSize           = 0;
-    signed char cCurrentByte = 0;
-    signed char cIndex       = 0;
-    cIndex = 0;
-
-    while ((cCurrentByte = GetByte()) & 0x80) {
-        iSize |= ((long int)(cCurrentByte & 0x7F)) << cIndex;
-        cIndex += 7;
-    }
-    iSize |= ((long int)(cCurrentByte & 0x7F)) << cIndex;
-
-    return iSize;
-}
-
-/***************************************************************
-*
-* ispVMCode
-*
-* This is the heart of the embedded engine. All the high-level opcodes
-* are extracted here. Once they have been identified, then it
-* will call other functions to handle the processing.
-*
-***************************************************************/
-
-signed char ispVMCode()
-{
-    //09/11/07 NN added local variables initialization
-    unsigned short iRepeatSize = 0;
-    signed char cOpcode        = 0;
-    signed char cRetCode       = 0;
-    unsigned char ucState      = 0;
-    unsigned short usDelay     = 0;
-    unsigned short usToggle    = 0;
-    unsigned char usByte       = 0;
-
-    /***************************************************************
-    *
-    * Check the compression flag only if this is the first time
-    * this function is entered. Do not check the compression flag if
-    * it is being called recursively from other functions within
-    * the embedded engine.
-    *
-    ***************************************************************/
-
-    if (!(g_usDataType & LHEAP_IN) && !(g_usDataType & HEAP_IN)) {
-        usByte = GetByte();
-        if (usByte == 0xf1) {
-            g_usDataType |= COMPRESS;
-        } else if (usByte == 0xf2) {
-            g_usDataType &= ~COMPRESS;
-        } else {
-            return VME_INVALID_FILE;
-        }
-    }
-
-    /***************************************************************
-    *
-    * Begin looping through all the VME opcodes.
-    *
-    ***************************************************************/
-    while ((cOpcode = GetByte()) >= 0) {
-        switch (cOpcode) {
-        case STATE:
-
-            /***************************************************************
-            *
-            * Step the JTAG state machine.
-            *
-            ***************************************************************/
-
-            ucState = GetByte();
-            /***************************************************************
-            *
-            * Step the JTAG state machine to DRCAPTURE to support Looping.
-            *
-            ***************************************************************/
-
-            if ((g_usDataType & LHEAP_IN) &&
-                (ucState == DRPAUSE) &&
-                (g_cCurrentJTAGState == ucState)) {
-                ispVMStateMachine(DRCAPTURE);
-            }
-
-            ispVMStateMachine(ucState);
-
-#ifdef VME_DEBUG
-            if (g_usDataType & LHEAP_IN) {
-                printf("LDELAY %s ", GetState(ucState));
-            } else {
-                printf("STATE %s;\n", GetState(ucState));
-            }
-#endif //VME_DEBUG
-            break;
-        case SIR:
-        case SDR:
-        case XSDR:
-
-#ifdef VME_DEBUG
-            switch (cOpcode) {
-            case SIR:
-                printf("SIR ");
-                break;
-            case SDR:
-            case XSDR:
-                if (g_usDataType & LHEAP_IN) {
-                    printf("LSDR ");
-                } else {
-                    printf("SDR ");
-                }
-                break;
-            }
-#endif //VME_DEBUG
-            /***************************************************************
-            *
-            * Shift in data into the device.
-            *
-            ***************************************************************/
-            cRetCode = ispVMShift(cOpcode);
-            if (cRetCode != 0) {
-                return (cRetCode);
-            }
-            break;
-        case WAIT:
-
-            /***************************************************************
-            *
-            * Observe delay.
-            *
-            ***************************************************************/
-
-            //09/11/07 NN Type cast mismatch variables
-            usDelay = (unsigned short)ispVMDataSize();
-            ispVMDelay(usDelay);
-
-#ifdef VME_DEBUG
-            if (usDelay & 0x8000) {
-
-                /***************************************************************
-                *
-                * Since MSB is set, the delay time must be decoded to
-                * millisecond. The SVF2VME encodes the MSB to represent
-                * millisecond.
-                *
-                ***************************************************************/
-
-                usDelay &= ~0x8000;
-                if (g_usDataType & LHEAP_IN) {
-                    printf("%.2E SEC;\n", (float)usDelay / 1000);
-                } else {
-                    printf("RUNTEST %.2E SEC;\n", (float)usDelay / 1000);
-                }
-            } else {
-
-                /***************************************************************
-                *
-                * Since MSB is not set, the delay time is given as microseconds.
-                *
-                ***************************************************************/
-
-                if (g_usDataType & LHEAP_IN) {
-                    printf("%.2E SEC;\n", (float)usDelay / 1000000);
-                } else {
-                    printf("RUNTEST %.2E SEC;\n", (float)usDelay / 1000000);
-                }
-            }
-#endif //VME_DEBUG
-            break;
-        case TCK:
-
-            /***************************************************************
-            *
-            * Issue clock toggles.
-            *
-            ***************************************************************/
-
-            //09/11/07 NN Type cast mismatch variables
-            usToggle = (unsigned short)ispVMDataSize();
-            ispVMClocks(usToggle);
-
-#ifdef VME_DEBUG
-            printf("RUNTEST %d TCK;\n", usToggle);
-#endif //VME_DEBUG
-            break;
-        case ENDDR:
-
-            /***************************************************************
-            *
-            * Set the ENDDR.
-            *
-            ***************************************************************/
-
-            g_ucEndDR = GetByte();
-
-#ifdef VME_DEBUG
-            printf("ENDDR %s;\n", GetState(g_ucEndDR));
-#endif //VME_DEBUG
-            break;
-        case ENDIR:
-
-            /***************************************************************
-            *
-            * Set the ENDIR.
-            *
-            ***************************************************************/
-
-            g_ucEndIR = GetByte();
-
-#ifdef VME_DEBUG
-            printf("ENDIR %s;\n", GetState(g_ucEndIR));
-#endif //VME_DEBUG
-            break;
-        case HIR:
-        case TIR:
-        case HDR:
-        case TDR:
-
-#ifdef VME_DEBUG
-            switch (cOpcode) {
-            case HIR:
-                printf("HIR ");
-                break;
-            case TIR:
-                printf("TIR ");
-                break;
-            case HDR:
-                printf("HDR ");
-                break;
-            case TDR:
-                printf("TDR ");
-                break;
-            }
-#endif //VME_DEBUG
-
-            /***************************************************************
-            *
-            * Set the header/trailer of the device in order to bypass
-            * successfully.
-            *
-            ***************************************************************/
-
-            cRetCode = ispVMAmble(cOpcode);
-            if (cRetCode != 0) {
-                return (cRetCode);
-            }
-
-#ifdef VME_DEBUG
-            printf(";\n");
-#endif //VME_DEBUG
-            break;
-        case MEM:
-
-            /***************************************************************
-            *
-            * The maximum RAM required to support processing one row of the
-            * VME file.
-            *
-            ***************************************************************/
-
-            //09/11/07 NN Type cast mismatch variables
-            g_usMaxSize = (unsigned short)ispVMDataSize();
-
-#ifdef VME_DEBUG
-            printf("// MEMSIZE %d\n", g_usMaxSize);
-#endif //VME_DEBUG
-            break;
-        case VENDOR:
-
-            /***************************************************************
-            *
-            * Set the VENDOR type.
-            *
-            ***************************************************************/
-
-            cOpcode = GetByte();
-            switch (cOpcode) {
-            case LATTICE:
-#ifdef VME_DEBUG
-                printf("// VENDOR LATTICE\n");
-#endif //VME_DEBUG
-                g_cVendor = LATTICE;
-                break;
-            case ALTERA:
-#ifdef VME_DEBUG
-                printf("// VENDOR ALTERA\n");
-#endif //VME_DEBUG
-                g_cVendor = ALTERA;
-                break;
-            case XILINX:
-#ifdef VME_DEBUG
-                printf("// VENDOR XILINX\n");
-#endif //VME_DEBUG
-                g_cVendor = XILINX;
-                break;
-            default:
-                break;
-            }
-            break;
-        case SETFLOW:
-
-            /***************************************************************
-            *
-            * Set the flow control. Flow control determines the personality
-            * of the embedded engine.
-            *
-            ***************************************************************/
-
-            //09/11/07 NN Type cast mismatch variables
-            g_usFlowControl |= (unsigned short)ispVMDataSize();
-            break;
-        case RESETFLOW:
-
-            /***************************************************************
-            *
-            * Unset the flow control.
-            *
-            ***************************************************************/
-
-            //09/11/07 NN Type cast mismatch variables
-            g_usFlowControl &= (unsigned short)~(ispVMDataSize());
-            break;
-        case HEAP:
-
-            /***************************************************************
-            *
-            * Allocate heap size to store loops.
-            *
-            ***************************************************************/
-
-            cRetCode = GetByte();
-            if (cRetCode != SECUREHEAP) {
-                return VME_INVALID_FILE;
-            }
-            //09/11/07 NN Type cast mismatch variables
-            g_iHEAPSize = (unsigned short)ispVMDataSize();
-
-            /****************************************************************************
-            *
-            * Store the maximum size of the HEAP buffer. Used to convert VME to HEX.
-            *
-            *****************************************************************************/
-
-            if (g_iHEAPSize > g_usHeapSize) {
-                g_usHeapSize = g_iHEAPSize;
-            }
-
-            ispVMMemManager(HEAP, (unsigned short)g_iHEAPSize);
-            break;
-        case REPEAT:
-
-            /***************************************************************
-            *
-            * Execute loops.
-            *
-            ***************************************************************/
-
-            g_usRepeatLoops = 0;
-
-            //09/11/07 NN Type cast mismatch variables
-            iRepeatSize = (unsigned short)ispVMDataSize();
-
-            cRetCode = ispVMLoop((unsigned short)iRepeatSize);
-            if (cRetCode != 0) {
-                return (cRetCode);
-            }
-            break;
-        case ENDLOOP:
-
-            /***************************************************************
-            *
-            * Exit point from processing loops.
-            *
-            ***************************************************************/
-
-            return (cRetCode);
-        case ENDVME:
-
-            /***************************************************************
-            *
-            * The only valid exit point that indicates end of programming.
-            *
-            ***************************************************************/
-
-            return (cRetCode);
-        case SHR:
-
-            /***************************************************************
-            *
-            * Right-shift address.
-            *
-            ***************************************************************/
-
-            g_usFlowControl |= SHIFTRIGHT;
-
-            //09/11/07 NN Type cast mismatch variables
-            g_usShiftValue = (unsigned short)(g_usRepeatLoops * (unsigned short)GetByte());
-            break;
-        case SHL:
-
-            /***************************************************************
-            *
-            * Left-shift address.
-            *
-            ***************************************************************/
-
-            g_usFlowControl |= SHIFTLEFT;
-
-            //09/11/07 NN Type cast mismatch variables
-            g_usShiftValue = (unsigned short)(g_usRepeatLoops * (unsigned short)GetByte());
-            break;
-        case FREQUENCY:
-
-            /***************************************************************
-            *
-            * Set the frequency.
-            *
-            ***************************************************************/
-
-            //09/11/07 NN Type cast mismatch variables
-            g_iFrequency = (int)(ispVMDataSize());
-            //10/23/08 NN changed to check if the frequency smaller than 1000
-            if (g_iFrequency >= 1000) {
-                g_iFrequency = g_iFrequency / 1000;
-                if (g_iFrequency == 1)
-                    g_iFrequency = 1000;
-#ifdef VME_DEBUG
-                printf("FREQUENCY %.2E HZ;\n", (float)g_iFrequency * 1000);
-#endif //VME_DEBUG
-            } else {
-                if (g_iFrequency == 0)
-                    g_iFrequency = 1000;
-#ifdef VME_DEBUG
-                printf("FREQUENCY %.2E HZ;\n", (float)g_iFrequency);
-#endif //VME_DEBUG
-            }
-            break;
-        case LCOUNT:
-
-            /***************************************************************
-            *
-            * Process LCOUNT command.
-            *
-            ***************************************************************/
-
-            cRetCode = ispVMLCOUNT((unsigned short)ispVMDataSize());
-            if (cRetCode != 0) {
-                return (cRetCode);
-            }
-            break;
-        case VUES:
-
-            /***************************************************************
-            *
-            * Set the flow control to verify USERCODE.
-            *
-            ***************************************************************/
-
-            g_usFlowControl |= VERIFYUES;
-            break;
-        case COMMENT:
-
-            /***************************************************************
-            *
-            * Display comment.
-            *
-            ***************************************************************/
-
-            ispVMComment((unsigned short)ispVMDataSize());
-            break;
-        case LVDS:
-
-            /***************************************************************
-            *
-            * Process LVDS command.
-            *
-            ***************************************************************/
-
-            ispVMProcessLVDS((unsigned short)ispVMDataSize());
-            break;
-        case HEADER:
-
-            /***************************************************************
-            *
-            * Discard header.
-            *
-            ***************************************************************/
-
-            ispVMHeader((unsigned short)ispVMDataSize());
-            break;
-            /* 03/14/06 Support Toggle ispENABLE signal*/
-        case ispEN:
-            ucState = GetByte();
-            if ((ucState == ON) || (ucState == 0x01))
-                writePort(JTAG_ENABLE, 0x01);
-            else
-                writePort(JTAG_ENABLE, 0x00);
-            ispVMDelay(1);
-            break;
-            /* 05/24/06 support Toggle TRST pin*/
-        case TRST:
-            ucState = GetByte();
-            if (ucState == 0x01)
-                writePort(JTAG_TRST, 0x01);
-            else
-                writePort(JTAG_TRST, 0x00);
-            ispVMDelay(1);
-            break;
-        default:
-
-            /***************************************************************
-            *
-            * Invalid opcode encountered.
-            *
-            ***************************************************************/
-
-#ifdef VME_DEBUG
-            printf("\nINVALID OPCODE: 0x%.2X\n", cOpcode);
-#endif //VME_DEBUG
-
-            return VME_INVALID_FILE;
-        }
-    }
-
-    /***************************************************************
-    *
-    * Invalid exit point. Processing the token 'ENDVME' is the only
-    * valid way to exit the embedded engine.
-    *
-    ***************************************************************/
-
-    return (VME_INVALID_FILE);
-}
-
-/***************************************************************
-*
-* ispVMDataCode
-*
-* Processes the TDI/TDO/MASK/DMASK etc of an SIR/SDR command.
-*
-***************************************************************/
-
-signed char ispVMDataCode()
-{
-    //09/11/07 NN added local variables initialization
-    signed char cDataByte    = 0;
-    signed char siDataSource = 0;  /*source of data from file by default*/
-
-    if (g_usDataType & HEAP_IN) {
-        siDataSource = 1;  /*the source of data from memory*/
-    }
-
-    /****************************************************************************
-    *
-    * Clear the data type register.
-    *
-    *****************************************************************************/
-
-    g_usDataType &= ~(MASK_DATA + TDI_DATA + TDO_DATA + DMASK_DATA + CMASK_DATA);
-
-    /****************************************************************************
-    *
-    * Iterate through SIR/SDR command and look for TDI, TDO, MASK, etc.
-    *
-    *****************************************************************************/
-
-    while ((cDataByte = GetByte()) >= 0) {
-
-        ispVMMemManager(cDataByte, g_usMaxSize);
-        switch (cDataByte) {
-        case TDI:
-
-            /****************************************************************************
-            *
-            * Store the maximum size of the TDI buffer. Used to convert VME to HEX.
-            *
-            *****************************************************************************/
-
-            if (g_usiDataSize > g_usTDISize) {
-                g_usTDISize = g_usiDataSize;
-            }
-            /****************************************************************************
-            *
-            * Updated data type register to indicate that TDI data is currently being
-            * used. Process the data in the VME file into the TDI buffer.
-            *
-            *****************************************************************************/
-
-            g_usDataType |= TDI_DATA;
-            ispVMData(g_pucInData);
-            break;
-        case XTDO:
-
-            /****************************************************************************
-            *
-            * Store the maximum size of the TDO buffer. Used to convert VME to HEX.
-            *
-            *****************************************************************************/
-
-            if (g_usiDataSize > g_usTDOSize) {
-                g_usTDOSize = g_usiDataSize;
-            }
-
-            /****************************************************************************
-            *
-            * Updated data type register to indicate that TDO data is currently being
-            * used.
-            *
-            *****************************************************************************/
-
-            g_usDataType |= TDO_DATA;
-            break;
-        case TDO:
-
-            /****************************************************************************
-            *
-            * Store the maximum size of the TDO buffer. Used to convert VME to HEX.
-            *
-            *****************************************************************************/
-
-            if (g_usiDataSize > g_usTDOSize) {
-                g_usTDOSize = g_usiDataSize;
-            }
-
-            /****************************************************************************
-            *
-            * Updated data type register to indicate that TDO data is currently being
-            * used. Process the data in the VME file into the TDO buffer.
-            *
-            *****************************************************************************/
-
-            g_usDataType |= TDO_DATA;
-            ispVMData(g_pucOutData);
-            break;
-        case MASK:
-
-            /****************************************************************************
-            *
-            * Store the maximum size of the MASK buffer. Used to convert VME to HEX.
-            *
-            *****************************************************************************/
-
-            if (g_usiDataSize > g_usMASKSize) {
-                g_usMASKSize = g_usiDataSize;
-            }
-
-            /****************************************************************************
-            *
-            * Updated data type register to indicate that MASK data is currently being
-            * used. Process the data in the VME file into the MASK buffer.
-            *
-            *****************************************************************************/
-
-            g_usDataType |= MASK_DATA;
-            ispVMData(g_pucOutMaskData);
-            break;
-        case DMASK:
-
-            /****************************************************************************
-            *
-            * Store the maximum size of the DMASK buffer. Used to convert VME to HEX.
-            *
-            *****************************************************************************/
-
-            if (g_usiDataSize > g_usDMASKSize) {
-                g_usDMASKSize = g_usiDataSize;
-            }
-
-            /****************************************************************************
-            *
-            * Updated data type register to indicate that DMASK data is currently being
-            * used. Process the data in the VME file into the DMASK buffer.
-            *
-            *****************************************************************************/
-
-            g_usDataType |= DMASK_DATA;
-            ispVMData(g_pucOutDMaskData);
-            break;
-        case CMASK:
-
-            /****************************************************************************
-            *
-            * Updated data type register to indicate that CMASK data is currently being
-            * used. Process the data in the VME file into the CMASK buffer.
-            *
-            *****************************************************************************/
-
-            g_usDataType |= CMASK_DATA;
-            ispVMData(g_pucOutMaskData);
-            break;
-        case CONTINUE:
-            return (0);
-        default:
-
-            /****************************************************************************
-            *
-            * Encountered invalid opcode.
-            *
-            *****************************************************************************/
-
-            return (VME_INVALID_FILE);
-        }
-
-        switch (cDataByte) {
-        case TDI:
-
-            /****************************************************************************
-            *
-            * Left bit shift. Used when performing algorithm looping.
-            *
-            *****************************************************************************/
-
-            if (g_usFlowControl & SHIFTLEFT) {
-                ispVMBitShift(SHL, g_usShiftValue);
-                g_usFlowControl &= ~SHIFTLEFT;
-            }
-
-            /****************************************************************************
-            *
-            * Right bit shift. Used when performing algorithm looping.
-            *
-            *****************************************************************************/
-
-            if (g_usFlowControl & SHIFTRIGHT) {
-                ispVMBitShift(SHR, g_usShiftValue);
-                g_usFlowControl &= ~SHIFTRIGHT;
-            }
-        default:
-            break;
-        }
-
-        if (siDataSource) {
-            g_usDataType |= HEAP_IN;  /*restore data from memory*/
-        }
-    }
-
-    if (siDataSource) {  /*fetch data from heap memory upon return*/
-        g_usDataType |= HEAP_IN;
-    }
-
-    if (cDataByte < 0) {
-
-        /****************************************************************************
-        *
-        * Encountered invalid opcode.
-        *
-        *****************************************************************************/
-
-        return (VME_INVALID_FILE);
-    } else {
-        return (0);
-    }
-}
-
-/***************************************************************
-*
-* ispVMData
-* Extract one row of data operand from the current data type opcode. Perform
-* the decompression if necessary. Extra RAM is not required for the
-* decompression process. The decompression scheme employed in this module
-* is on row by row basis. The format of the data stream:
-* [compression code][compressed data stream]
-* 0x00    --No compression
-* 0x01    --Compress by 0x00.
-*           Example:
-*           Original stream:   0x000000000000000000000001
-*           Compressed stream: 0x01000901
-*           Detail:            0x01 is the code, 0x00 is the key,
-*                              0x09 is the count of 0x00 bytes,
-*                              0x01 is the uncompressed byte.
-* 0x02    --Compress by 0xFF.
-*           Example:
-*           Original stream:   0xFFFFFFFFFFFFFFFFFFFFFF01
-*           Compressed stream: 0x02FF0901
-*           Detail:            0x02 is the code, 0xFF is the key,
-*                              0x09 is the count of 0xFF bytes,
-*                              0x01 is the uncompressed byte.
-* 0x03
-* : :
-* 0xFE   -- Compress by nibble blocks.
-*           Example:
-*           Original stream:   0x84210842108421084210
-*           Compressed stream: 0x0584210
-*           Detail:            0x05 is the code, means 5 nibbles block.
-*                              0x84210 is the 5 nibble blocks.
-*                              The whole row is 80 bits given by g_usiDataSize.
-*                              The number of times the block repeat itself
-*                              is found by g_usiDataSize/(4*0x05) which is 4.
-* 0xFF   -- Compress by the most frequently happen byte.
-*           Example:
-*           Original stream:   0x04020401030904040404
-*           Compressed stream: 0xFF04(0,1,0x02,0,1,0x01,1,0x03,1,0x09,0,0,0)
-*                          or: 0xFF044090181C240
-*           Detail:            0xFF is the code, 0x04 is the key.
-*                              a bit of 0 represent the key shall be put into
-*                              the current bit position and a bit of 1
-*                              represent copying the next of 8 bits of data
-*                              in.
-*
-***************************************************************/
-
-void ispVMData(unsigned char *ByteData)
-{
-    //09/11/07 NN added local variables initialization
-    unsigned short size               = 0;
-    unsigned short i, j, m, getData   = 0;
-    unsigned char cDataByte           = 0;
-    unsigned char compress            = 0;
-    unsigned short FFcount            = 0;
-    unsigned char compr_char          = 0xFF;
-    unsigned short index              = 0;
-    signed char compression           = 0;
-
-    /*convert number in bits to bytes*/
-    if (g_usiDataSize % 8 > 0) {
-        //09/11/07 NN Type cast mismatch variables
-        size = (unsigned short)(g_usiDataSize / 8 + 1);
-    } else {
-        //09/11/07 NN Type cast mismatch variables
-        size = (unsigned short)(g_usiDataSize / 8);
-    }
-
-    /* If there is compression, then check if compress by key of 0x00 or 0xFF
-       or by other keys or by nibble blocks*/
-
-    if (g_usDataType & COMPRESS) {
-        compression = 1;
-        if (((compress = GetByte()) == VAR) && (g_usDataType & HEAP_IN)) {
-            getData = 1;
-            g_usDataType &= ~(HEAP_IN);
-            compress = GetByte();
-        }
-
-        switch (compress) {
-        case 0x00:
-            /* No compression */
-            compression = 0;
-            break;
-        case 0x01:
-            /* Compress by byte 0x00 */
-            compr_char = 0x00;
-            break;
-        case 0x02:
-            /* Compress by byte 0xFF */
-            compr_char = 0xFF;
-            break;
-        case 0xFF:
-            /* Huffman encoding */
-            compr_char = GetByte();
-            i = 8;
-            for (index = 0; index < size; index++) {
-                ByteData[index] = 0x00;
-                if (i > 7) {
-                    cDataByte = GetByte();
-                    i = 0;
-                }
-                if ((cDataByte << i++) & 0x80)
-                    m = 8;
-                else {
-                    ByteData[index] = compr_char;
-                    m = 0;
-                }
-
-                for (j = 0; j < m; j++) {
-                    if (i > 7) {
-                        cDataByte = GetByte();
-                        i = 0;
-                    }
-                    ByteData[index] |= ((cDataByte << i++) & 0x80) >> j;
-                }
-            }
-            size = 0;
-            break;
-        default:
-            for (index = 0; index < size; index++)
-                ByteData[index] = 0x00;
-            for (index = 0; index < compress; index++) {
-                if (index % 2 == 0)
-                    cDataByte = GetByte();
-                for (i = 0; i < size * 2 / compress; i++) {
-                    //09/11/07 NN Type cast mismatch variables
-                    j = (unsigned short)(index + (i * (unsigned short)compress));
-                    /*clear the nibble to zero first*/
-                    if (j % 2) {
-                        if (index % 2)
-                            ByteData[j / 2] |= cDataByte & 0x0F;
-                        else
-                            ByteData[j / 2] |= cDataByte >> 4;
-                    } else {
-                        if (index % 2)
-                            ByteData[j / 2] |= cDataByte << 4;
-                        else
-                            ByteData[j / 2] |= cDataByte & 0xF0;
-                    }
-                }
-            }
-            size = 0;
-            break;
-        }
-    }
-
-    FFcount = 0;
-
-    /* Decompress by byte 0x00 or 0xFF */
-    for (index = 0; index < size; index++) {
-        if (FFcount <= 0) {
-            cDataByte = GetByte();
-            if ((cDataByte == VAR) && (g_usDataType & HEAP_IN) && !getData && !(g_usDataType & COMPRESS)) {
-                getData = 1;
-                g_usDataType &= ~(HEAP_IN);
-                cDataByte = GetByte();
-            }
-            ByteData[index] = cDataByte;
-            if ((compression) && (cDataByte == compr_char)) /*decompression is on*/
-                //09/11/07 NN Type cast mismatch variables
-                FFcount = (unsigned short)ispVMDataSize();     /*The number of 0xFF or 0x00 bytes*/
-        } else {
-            FFcount--; /*Use up the 0xFF chain first*/
-            ByteData[index] = compr_char;
-        }
-    }
-
-    if (getData) {
-        g_usDataType |= HEAP_IN;
-        getData = 0;
-    }
-}
-
-/***************************************************************
-*
-* ispVMShift
-*
-* Processes the SDR/XSDR/SIR commands.
-*
-***************************************************************/
-
-signed char ispVMShift(signed char a_cCode)
-{
-    //09/11/07 NN added local variables initialization
-    unsigned short iDataIndex  = 0;
-    unsigned short iReadLoop   = 0;
-    signed char cRetCode       = 0;
-
-    cRetCode = 0;
-    //09/11/07 NN Type cast mismatch variables
-    g_usiDataSize = (unsigned short)ispVMDataSize();
-
-    g_usDataType &= ~(SIR_DATA + EXPRESS + SDR_DATA);   /*clear the flags first*/
-
-    switch (a_cCode) {
-    case SIR:
-        g_usDataType |= SIR_DATA;
-        /* 1/15/04 If performing cascading, then go directly to SHIFTIR.  Else,
-           go to IRPAUSE before going to SHIFTIR */
-        if (g_usFlowControl & CASCADE) {
-            ispVMStateMachine(SHIFTIR);
-        } else {
-            ispVMStateMachine(IRPAUSE);
-            ispVMStateMachine(SHIFTIR);
-            if (g_usHeadIR > 0) {
-                ispVMBypass(HIR, g_usHeadIR);
-                sclock();
-            }
-        }
-        break;
-    case XSDR:
-        g_usDataType |= EXPRESS; /*mark simultaneous in and out*/
-    case SDR:
-        g_usDataType |= SDR_DATA;
-        /* 1/15/04 If already in SHIFTDR, then do not move state or shift in header.
-           This would imply that the previously shifted frame was a cascaded frame.  */
-        if (g_cCurrentJTAGState != SHIFTDR) {
-            /* 1/15/04 If performing cascading, then go directly to SHIFTDR.  Else,
-               go to DRPAUSE before going to SHIFTDR */
-            if (g_usFlowControl & CASCADE) {
-                if (g_cCurrentJTAGState == DRPAUSE) {
-                    ispVMStateMachine(SHIFTDR);
-                    /* 1/15/04 If cascade flag has been set and the current state is
-                       DRPAUSE, this implies that the first cascaded frame is about to
-                       be shifted in.  The header must be shifted prior to shifting
-                       the first cascaded frame. */
-                    if (g_usHeadDR > 0) {
-                        ispVMBypass(HDR, g_usHeadDR);
-                        sclock();
-                    }
-                } else {
-                    ispVMStateMachine(SHIFTDR);
-                }
-            } else {
-                ispVMStateMachine(DRPAUSE);
-                ispVMStateMachine(SHIFTDR);
-                if (g_usHeadDR > 0) {
-                    ispVMBypass(HDR, g_usHeadDR);
-                    sclock();
-                }
-            }
-        }
-        break;
-    default:
-        return (VME_INVALID_FILE);
-    }
-
-    cRetCode = ispVMDataCode();
-    if (cRetCode != 0) {
-        return (VME_INVALID_FILE);
-    }
-
-#ifdef VME_DEBUG
-    if (g_usDataType & TDI_DATA) {
-        printf("\n\t\tTDI ");
-        PrintData(g_usiDataSize, g_pucInData);
-    }
-
-    if (g_usDataType & TDO_DATA) {
-        printf("\n\t\tTDO ");
-        PrintData(g_usiDataSize, g_pucOutData);
-    }
-
-    if (g_usDataType & MASK_DATA) {
-        printf("\n\t\tMASK ");
-        PrintData(g_usiDataSize, g_pucOutMaskData);
-    }
-
-    if (g_usDataType & DMASK_DATA) {
-        printf("\n\t\tDMASK ");
-        PrintData(g_usiDataSize, g_pucOutDMaskData);
-    }
-
-    printf(";\n");
-#endif //VME_DEBUG
-    if (g_usDataType & TDO_DATA || g_usDataType & DMASK_DATA) {
-        if (g_usDataType & DMASK_DATA) {
-
-            cRetCode = ispVMReadandSave(g_usiDataSize);
-
-            if (!cRetCode) {
-                if (g_usTailDR > 0) {
-                    sclock();
-                    ispVMBypass(TDR, g_usTailDR);
-                }
-                ispVMStateMachine(DRPAUSE);
-                ispVMStateMachine(SHIFTDR);
-                if (g_usHeadDR > 0) {
-                    ispVMBypass(HDR, g_usHeadDR);
-                    sclock();
-                }
-                for (iDataIndex = 0; iDataIndex < g_usiDataSize / 8 + 1; iDataIndex++)
-                    g_pucInData[iDataIndex] = g_pucOutData[iDataIndex];
-                g_usDataType &= ~(TDO_DATA + DMASK_DATA);
-                cRetCode = ispVMSend(g_usiDataSize);
-            }
-        } else {
-
-                 cRetCode = ispVMRead(g_usiDataSize);
-            if (cRetCode == -1 && g_cVendor == XILINX) {
-                for (iReadLoop = 0; iReadLoop < 30; iReadLoop++) {
-                    cRetCode = ispVMRead(g_usiDataSize);
-                    if (!cRetCode) {
-                        break;
-                    } else {
-                        ispVMStateMachine(DRPAUSE); /*Always DRPAUSE*/
-                        /*Bypass other devices when appropriate*/
-                        ispVMBypass(TDR, g_usTailDR);
-                        ispVMStateMachine(g_ucEndDR);
-                        ispVMStateMachine(IDLE);
-                        ispVMDelay(1000);
-                    }
-                }
-            }
-        }
-    } else { /*TDI only*/
-        cRetCode = ispVMSend(g_usiDataSize);
-
-    }
-
-    /*transfer the input data to the output buffer for the next verify*/
-    if ((g_usDataType & EXPRESS) || (a_cCode == SDR)) {
-        if (g_pucOutData) {
-            for (iDataIndex = 0; iDataIndex < g_usiDataSize / 8 + 1; iDataIndex++)
-                g_pucOutData[iDataIndex] = g_pucInData[iDataIndex];
-        }
-    }
-
-    switch (a_cCode) {
-    case SIR:
-        /* 1/15/04 If not performing cascading, then shift ENDIR */
-        if (!(g_usFlowControl & CASCADE)) {
-            if (g_usTailIR > 0) {
-                sclock();
-                ispVMBypass(TIR, g_usTailIR);
-            }
-            ispVMStateMachine(g_ucEndIR);
-        }
-        break;
-    case XSDR:
-    case SDR:
-        /* 1/15/04 If not performing cascading, then shift ENDDR */
-        if (!(g_usFlowControl & CASCADE)) {
-            if (g_usTailDR > 0) {
-                sclock();
-                ispVMBypass(TDR, g_usTailDR);
-            }
-            ispVMStateMachine(g_ucEndDR);
-        }
-        break;
-    default:
-        break;
-    }
-
-    return (cRetCode);
-}
-
-/***************************************************************
-*
-* ispVMAmble
-*
-* This routine is to extract Header and Trailer parameter for SIR and
-* SDR operations.
-*
-* The Header and Trailer parameter are the pre-amble and post-amble bit
-* stream need to be shifted into TDI or out of TDO of the devices. Mostly
-* is for the purpose of bypassing the leading or trailing devices. ispVM
-* supports only shifting data into TDI to bypass the devices.
-*
-* For a single device, the header and trailer parameters are all set to 0
-* as default by ispVM. If it is for multiple devices, the header and trailer
-* value will change as specified by the VME file.
-*
-***************************************************************/
-
-signed char ispVMAmble(signed char Code)
-{
-    signed char compress = 0;
-    //09/11/07 NN Type cast mismatch variables
-    g_usiDataSize = (unsigned short)ispVMDataSize();
-
-#ifdef VME_DEBUG
-    printf("%d", g_usiDataSize);
-#endif //VME_DEBUG
-
-    if (g_usiDataSize) {
-
-        /****************************************************************************
-        *
-        * Discard the TDI byte and set the compression bit in the data type register
-        * to false if compression is set because TDI data after HIR/HDR/TIR/TDR is not
-        * compressed.
-        *
-        *****************************************************************************/
-
-        GetByte();
-        if (g_usDataType & COMPRESS) {
-            g_usDataType &= ~(COMPRESS);
-            compress = 1;
-        }
-    }
-
-    switch (Code) {
-    case HIR:
-
-        /****************************************************************************
-        *
-        * Store the maximum size of the HIR buffer. Used to convert VME to HEX.
-        *
-        *****************************************************************************/
-
-        if (g_usiDataSize > g_usHIRSize) {
-            g_usHIRSize = g_usiDataSize;
-        }
-
-        /****************************************************************************
-        *
-        * Assign the HIR value and allocate memory.
-        *
-        *****************************************************************************/
-
-        g_usHeadIR = g_usiDataSize;
-        if (g_usHeadIR) {
-            ispVMMemManager(HIR, g_usHeadIR);
-            ispVMData(g_pucHIRData);
-
-#ifdef VME_DEBUG
-            printf(" TDI ");
-            PrintData(g_usHeadIR, g_pucHIRData);
-#endif //VME_DEBUG
-        }
-        break;
-    case TIR:
-
-        /****************************************************************************
-        *
-        * Store the maximum size of the TIR buffer. Used to convert VME to HEX.
-        *
-        *****************************************************************************/
-
-        if (g_usiDataSize > g_usTIRSize) {
-            g_usTIRSize = g_usiDataSize;
-        }
-
-        /****************************************************************************
-        *
-        * Assign the TIR value and allocate memory.
-        *
-        *****************************************************************************/
-
-        g_usTailIR = g_usiDataSize;
-        if (g_usTailIR) {
-            ispVMMemManager(TIR, g_usTailIR);
-            ispVMData(g_pucTIRData);
-
-#ifdef VME_DEBUG
-            printf(" TDI ");
-            PrintData(g_usTailIR, g_pucTIRData);
-#endif //VME_DEBUG
-        }
-        break;
-    case HDR:
-
-        /****************************************************************************
-        *
-        * Store the maximum size of the HDR buffer. Used to convert VME to HEX.
-        *
-        *****************************************************************************/
-
-        if (g_usiDataSize > g_usHDRSize) {
-            g_usHDRSize = g_usiDataSize;
-        }
-
-        /****************************************************************************
-        *
-        * Assign the HDR value and allocate memory.
-        *
-        *****************************************************************************/
-
-        g_usHeadDR = g_usiDataSize;
-        if (g_usHeadDR) {
-            ispVMMemManager(HDR, g_usHeadDR);
-            ispVMData(g_pucHDRData);
-
-#ifdef VME_DEBUG
-            printf(" TDI ");
-            PrintData(g_usHeadDR, g_pucHDRData);
-#endif //VME_DEBUG
-        }
-        break;
-    case TDR:
-
-        /****************************************************************************
-        *
-        * Store the maximum size of the TDR buffer. Used to convert VME to HEX.
-        *
-        *****************************************************************************/
-
-        if (g_usiDataSize > g_usTDRSize) {
-            g_usTDRSize = g_usiDataSize;
-        }
-
-        /****************************************************************************
-        *
-        * Assign the TDR value and allocate memory.
-        *
-        *****************************************************************************/
-
-        g_usTailDR = g_usiDataSize;
-        if (g_usTailDR) {
-            ispVMMemManager(TDR, g_usTailDR);
-            ispVMData(g_pucTDRData);
-
-#ifdef VME_DEBUG
-            printf(" TDI ");
-            PrintData(g_usTailDR, g_pucTDRData);
-#endif //VME_DEBUG
-        }
-        break;
-    default:
-        break;
-    }
-
-    /****************************************************************************
-    *
-    * Re-enable compression if it was previously set.
-    *
-    *****************************************************************************/
-
-    if (compress) {
-        g_usDataType |= COMPRESS;
-    }
-
-    if (g_usiDataSize) {
-        Code = GetByte();
-        if (Code == CONTINUE) {
-            return 0;
-        } else {
-
-            /****************************************************************************
-            *
-            * Encountered invalid opcode.
-            *
-            *****************************************************************************/
-
-            return VME_INVALID_FILE;
-        }
-    }
-
-    return 0;
-}
-
-/***************************************************************
-*
-* ispVMLoop
-*
-* Perform the function call upon by the REPEAT opcode.
-* Memory is to be allocated to store the entire loop from REPEAT to ENDLOOP.
-* After the loop is stored then execution begin. The REPEATLOOP flag is set
-* on the g_usFlowControl register to indicate the repeat loop is in session
-* and therefore fetch opcode from the memory instead of from the file.
-*
-***************************************************************/
-
-signed char ispVMLoop(unsigned short a_usLoopCount)
-{
-    //09/11/07 NN added local variables initialization
-    signed char cRetCode      = 0;
-    unsigned short iHeapIndex = 0;
-    unsigned short iLoopIndex = 0;
-
-    g_usShiftValue = 0;
-    for (iHeapIndex = 0; iHeapIndex < g_iHEAPSize; iHeapIndex++) {
-        g_pucHeapMemory[iHeapIndex] = GetByte();
-    }
-
-    if (g_pucHeapMemory[iHeapIndex - 1] != ENDLOOP) {
-        return (VME_INVALID_FILE);
-    }
-
-    g_usFlowControl |= REPEATLOOP;
-    g_usDataType |= HEAP_IN;
-
-    for (iLoopIndex = 0; iLoopIndex < a_usLoopCount; iLoopIndex++) {
-        g_iHeapCounter = 0;
-        cRetCode = ispVMCode();
-        g_usRepeatLoops++;
-        if (cRetCode < 0) {
-            break;
-        }
-    }
-
-    g_usDataType &= ~(HEAP_IN);
-    g_usFlowControl &= ~(REPEATLOOP);
-    return (cRetCode);
-}
-
-/***************************************************************
-*
-* ispVMBitShift
-*
-* Shift the TDI stream left or right by the number of bits. The data in
-* *g_pucInData is of the VME format, so the actual shifting is the reverse of
-* IEEE 1532 or SVF format.
-*
-***************************************************************/
-
-signed char ispVMBitShift(signed char mode, unsigned short bits)
-{
-    //09/11/07 NN added local variables initialization
-    unsigned short i       = 0;
-    unsigned short size    = 0;
-    unsigned short tmpbits = 0;
-
-    if (g_usiDataSize % 8 > 0) {
-        //09/11/07 NN Type cast mismatch variables
-        size = (unsigned short)(g_usiDataSize / 8 + 1);
-    } else {
-        //09/11/07 NN Type cast mismatch variables
-        size = (unsigned short)(g_usiDataSize / 8);
-    }
-
-    switch (mode) {
-    case SHR:
-        for (i = 0; i < size; i++) {
-            if (g_pucInData[i] != 0) {
-                tmpbits = bits;
-                while (tmpbits > 0) {
-                    g_pucInData[i] <<= 1;
-                    if (g_pucInData[i] == 0) {
-                        i--;
-                        g_pucInData[i] = 1;
-                    }
-                    tmpbits--;
-                }
-            }
-        }
-        break;
-    case SHL:
-        for (i = 0; i < size; i++) {
-            if (g_pucInData[i] != 0) {
-                tmpbits = bits;
-                while (tmpbits > 0) {
-                    g_pucInData[i] >>= 1;
-                    if (g_pucInData[i] == 0) {
-                        i--;
-                        g_pucInData[i] = 8;
-                    }
-                    tmpbits--;
-                }
-            }
-        }
-        break;
-    default:
-        return (VME_INVALID_FILE);
-    }
-
-    return (0);
-}
-
-/***************************************************************
-*
-* ispVMComment
-*
-* Displays the SVF comments.
-*
-***************************************************************/
-
-void ispVMComment(unsigned short a_usCommentSize)
-{
-    char cCurByte = 0;
-    for (; a_usCommentSize > 0; a_usCommentSize--) {
-        /****************************************************************************
-        *
-        * Print character to the terminal.
-        *
-        *****************************************************************************/
-        cCurByte = GetByte();
-        vme_out_char(cCurByte);
-    }
-    cCurByte = '\n';
-    vme_out_char(cCurByte);
-}
-
-/***************************************************************
-*
-* ispVMHeader
-*
-* Iterate the length of the header and discard it.
-*
-***************************************************************/
-
-void ispVMHeader(unsigned short a_usHeaderSize)
-{
-    for (; a_usHeaderSize > 0; a_usHeaderSize--) {
-        GetByte();
-    }
-}
-
-/***************************************************************
-*
-* ispVMCalculateCRC32
-*
-* Calculate the 32-bit CRC.
-*
-***************************************************************/
-
-void ispVMCalculateCRC32(unsigned char a_ucData)
-{
-    //09/11/07 NN added local variables initialization
-    unsigned char ucIndex          = 0;
-    unsigned char ucFlipData       = 0;
-    unsigned short usCRCTableEntry = 0;
-    unsigned int crc_table[16] = {
-        0x0000, 0xCC01, 0xD801,
-        0x1400, 0xF001, 0x3C00,
-        0x2800, 0xE401, 0xA001,
-        0x6C00, 0x7800, 0xB401,
-        0x5000, 0x9C01, 0x8801,
-        0x4400
-    };
-
-    for (ucIndex = 0; ucIndex < 8; ucIndex++) {
-        ucFlipData <<= 1;
-        if (a_ucData & 0x01) {
-            ucFlipData |= 0x01;
-        }
-        a_ucData >>= 1;
-    }
-
-    //09/11/07 NN Type cast mismatch variables
-    usCRCTableEntry = (unsigned short)(crc_table[g_usCalculatedCRC & 0xF]);
-    g_usCalculatedCRC = (unsigned short)((g_usCalculatedCRC >> 4) & 0x0FFF);
-    g_usCalculatedCRC = (unsigned short)(g_usCalculatedCRC ^ usCRCTableEntry ^ crc_table[ucFlipData & 0xF]);
-    usCRCTableEntry = (unsigned short)(crc_table[g_usCalculatedCRC & 0xF]);
-    g_usCalculatedCRC = (unsigned short)((g_usCalculatedCRC >> 4) & 0x0FFF);
-    g_usCalculatedCRC = (unsigned short)(g_usCalculatedCRC ^ usCRCTableEntry ^ crc_table[(ucFlipData >> 4) & 0xF]);
-}
-
-/***************************************************************
-*
-* ispVMLCOUNT
-*
-* Process the intelligent programming loops.
-*
-***************************************************************/
-
-signed char ispVMLCOUNT(unsigned short a_usCountSize)
-{
-    unsigned short usContinue         = 1;
-    unsigned short usIntelBufferIndex = 0;
-    unsigned short usCountIndex       = 0;
-    signed char cRetCode              = 0;
-    signed char cRepeatHeap           = 0;
-    signed char cOpcode               = 0;
-    unsigned char ucState             = 0;
-    unsigned short usDelay            = 0;
-    unsigned short usToggle           = 0;
-
-    g_usIntelBufferSize = (unsigned short)ispVMDataSize();
-
-    /****************************************************************************
-    *
-    * Allocate memory for intel buffer.
-    *
-    *****************************************************************************/
-
-    ispVMMemManager(LHEAP, g_usIntelBufferSize);
-
-    /****************************************************************************
-    *
-    * Store the maximum size of the intelligent buffer. Used to convert VME to HEX.
-    *
-    *****************************************************************************/
-
-    if (g_usIntelBufferSize > g_usLCOUNTSize) {
-        g_usLCOUNTSize = g_usIntelBufferSize;
-    }
-
-    /****************************************************************************
-    *
-    * Copy intel data to the buffer.
-    *
-    *****************************************************************************/
-
-    for (usIntelBufferIndex = 0; usIntelBufferIndex < g_usIntelBufferSize; usIntelBufferIndex++) {
-        g_pucIntelBuffer[usIntelBufferIndex] = GetByte();
-    }
-
-    /****************************************************************************
-    *
-    * Set the data type register to get data from the intelligent data buffer.
-    *
-    *****************************************************************************/
-
-    g_usDataType |= LHEAP_IN;
-
-    /****************************************************************************
-    *
-    * If the HEAP_IN flag is set, temporarily unset the flag so data will be
-    * retrieved from the status buffer.
-    *
-    *****************************************************************************/
-
-    if (g_usDataType & HEAP_IN) {
-        g_usDataType &= ~HEAP_IN;
-        cRepeatHeap = 1;
-    }
-
-#ifdef VME_DEBUG
-    printf("LCOUNT %d;\n", a_usCountSize);
-#endif //VME_DEBUG
-
-    /****************************************************************************
-    *
-    * Iterate through the intelligent programming command.
-    *
-    *****************************************************************************/
-
-    for (usCountIndex = 0; usCountIndex < a_usCountSize; usCountIndex++) {
-
-        /****************************************************************************
-        *
-        * Initialize the intel data index to 0 before each iteration.
-        *
-        *****************************************************************************/
-
-        g_usIntelDataIndex = 0;
-        cOpcode            = 0;
-        ucState            = 0;
-        usDelay            = 0;
-        usToggle           = 0;
-        usContinue         = 1;
-
-        /***************************************************************
-        *
-        * Begin looping through all the VME opcodes.
-        *
-        ***************************************************************/
-        /***************************************************************
-        * 4/1/09 Nguyen replaced the recursive function call codes on
-        *        the ispVMLCOUNT function
-        *
-        ***************************************************************/
-        while (usContinue) {
-            cOpcode = GetByte();
-            switch (cOpcode) {
-            case HIR:
-            case TIR:
-            case HDR:
-            case TDR:
-                /***************************************************************
-                *
-                * Set the header/trailer of the device in order to bypass
-                * successfully.
-                *
-                ***************************************************************/
-
-                ispVMAmble(cOpcode);
-                break;
-            case STATE:
-
-                /***************************************************************
-                *
-                * Step the JTAG state machine.
-                *
-                ***************************************************************/
-
-                ucState = GetByte();
-                /***************************************************************
-                *
-                * Step the JTAG state machine to DRCAPTURE to support Looping.
-                *
-                ***************************************************************/
-
-                if ((g_usDataType & LHEAP_IN) &&
-                    (ucState == DRPAUSE) &&
-                    (g_cCurrentJTAGState == ucState)) {
-                    ispVMStateMachine(DRCAPTURE);
-                }
-                ispVMStateMachine(ucState);
-#ifdef VME_DEBUG
-                printf("LDELAY %s ", GetState(ucState));
-#endif //VME_DEBUG
-                break;
-            case SIR:
-#ifdef VME_DEBUG
-                printf("SIR ");
-#endif //VME_DEBUG
-                /***************************************************************
-                *
-                * Shift in data into the device.
-                *
-                ***************************************************************/
-
-                cRetCode = ispVMShift(cOpcode);
-                break;
-            case SDR:
-
-#ifdef VME_DEBUG
-                printf("LSDR ");
-#endif //VME_DEBUG
-                /***************************************************************
-                *
-                * Shift in data into the device.
-                *
-                ***************************************************************/
-
-                cRetCode = ispVMShift(cOpcode);
-                break;
-            case WAIT:
-
-                /***************************************************************
-                *
-                * Observe delay.
-                *
-                ***************************************************************/
-
-                usDelay = (unsigned short)ispVMDataSize();
-                ispVMDelay(usDelay);
-
-#ifdef VME_DEBUG
-                if (usDelay & 0x8000) {
-
-                    /***************************************************************
-                    *
-                    * Since MSB is set, the delay time must be decoded to
-                    * millisecond. The SVF2VME encodes the MSB to represent
-                    * millisecond.
-                    *
-                    ***************************************************************/
-
-                    usDelay &= ~0x8000;
-                    printf("%.2E SEC;\n", (float)usDelay / 1000);
-                } else {
-
-                    /***************************************************************
-                    *
-                    * Since MSB is not set, the delay time is given as microseconds.
-                    *
-                    ***************************************************************/
-
-                    printf("%.2E SEC;\n", (float)usDelay / 1000000);
-                }
-#endif //VME_DEBUG
-                break;
-            case TCK:
-
-                /***************************************************************
-                *
-                * Issue clock toggles.
-                *
-                ***************************************************************/
-
-                usToggle = (unsigned short)ispVMDataSize();
-                ispVMClocks(usToggle);
-
-#ifdef VME_DEBUG
-                printf("RUNTEST %d TCK;\n", usToggle);
-#endif //VME_DEBUG
-                break;
-            case ENDLOOP:
-
-                /***************************************************************
-                *
-                * Exit point from processing loops.
-                *
-                ***************************************************************/
-                usContinue = 0;
-                break;
-
-            case COMMENT:
-
-                /***************************************************************
-                *
-                * Display comment.
-                *
-                ***************************************************************/
-
-                ispVMComment((unsigned short)ispVMDataSize());
-                break;
-            case ispEN:
-                ucState = GetByte();
-                if ((ucState == ON) || (ucState == 0x01))
-                    writePort(JTAG_ENABLE, 0x01);
-                else
-                    writePort(JTAG_ENABLE, 0x00);
-                ispVMDelay(1);
-                break;
-            case TRST:
-                if (GetByte() == 0x01)
-                    writePort(JTAG_TRST, 0x01);
-                else
-                    writePort(JTAG_TRST, 0x00);
-                ispVMDelay(1);
-                break;
-            default:
-
-                /***************************************************************
-                *
-                * Invalid opcode encountered.
-                *
-                ***************************************************************/
-
-#ifdef VME_DEBUG
-                printf("\nINVALID OPCODE: 0x%.2X\n", cOpcode);
-#endif //VME_DEBUG
-
-                return VME_INVALID_FILE;
-            }
-        }
-        if (cRetCode >= 0) {
-            /****************************************************************************
-            *
-            * Break if intelligent programming is successful.
-            *
-            *****************************************************************************/
-
-            break;
-        }
-
-    }
-    /****************************************************************************
-    *
-    * If HEAP_IN flag was temporarily disabled, re-enable it before exiting.
-    *
-    *****************************************************************************/
-
-    if (cRepeatHeap) {
-        g_usDataType |= HEAP_IN;
-    }
-
-    /****************************************************************************
-    *
-    * Set the data type register to not get data from the intelligent data buffer.
-    *
-    *****************************************************************************/
-
-    g_usDataType &= ~LHEAP_IN;
-    return cRetCode;
-}
-
-/***************************************************************
-*
-* ispVMClocks
-*
-* Applies the specified number of pulses to TCK.
-*
-***************************************************************/
-
-void ispVMClocks(unsigned short Clocks)
-{
-    unsigned short iClockIndex = 0;
-    for (iClockIndex = 0; iClockIndex < Clocks; iClockIndex++) {
-        sclock();
-    }
-}
-
-/***************************************************************
-*
-* ispVMBypass
-*
-* This procedure takes care of the HIR, HDR, TIR, TDR for the
-* purpose of putting the other devices into Bypass mode. The
-* current state is checked to find out if it is at DRPAUSE or
-* IRPAUSE. If it is at DRPAUSE, perform bypass register scan.
-* If it is at IRPAUSE, scan into instruction registers the bypass
-* instruction.
-*
-***************************************************************/
-
-void ispVMBypass(signed char ScanType, unsigned short Bits)
-{
-    //09/11/07 NN added local variables initialization
-    unsigned short iIndex       = 0;
-    unsigned short iSourceIndex = 0;
-    unsigned char cBitState     = 0;
-    unsigned char cCurByte      = 0;
-    unsigned char *pcSource    = NULL;
-
-    if (Bits <= 0) {
-        return;
-    }
-
-    switch (ScanType) {
-    case HIR:
-        pcSource = g_pucHIRData;
-        break;
-    case TIR:
-        pcSource = g_pucTIRData;
-        break;
-    case HDR:
-        pcSource = g_pucHDRData;
-        break;
-    case TDR:
-        pcSource = g_pucTDRData;
-        break;
-    default:
-        break;
-    }
-    if (pcSource) {
-        iSourceIndex = 0;
-        cBitState = 0;
-        for (iIndex = 0; iIndex < Bits - 1; iIndex++) {
-            /* Scan instruction or bypass register */
-            if (iIndex % 8 == 0) {
-                cCurByte = pcSource[iSourceIndex++];
-            }
-            cBitState = (unsigned char)(((cCurByte << iIndex % 8) & 0x80) ? 0x01 : 0x00);
-            writePort(JTAG_TDI, cBitState);
-            sclock();
-        }
-
-        if (iIndex % 8 == 0)  {
-            cCurByte = pcSource[iSourceIndex++];
-        }
-
-        cBitState = (unsigned char)(((cCurByte << iIndex % 8) & 0x80) ? 0x01 : 0x00);
-        writePort(JTAG_TDI, cBitState);
-    }
-}
-
-/***************************************************************
-*
-* ispVMStateMachine
-*
-* This procedure steps all devices in the daisy chain from a given
-* JTAG state to the next desirable state. If the next state is TLR,
-* the JTAG state machine is brute forced into TLR by driving TMS
-* high and pulse TCK 6 times.
-*
-***************************************************************/
-
-void ispVMStateMachine(signed char cNextJTAGState)
-{
-    //09/11/07 NN added local variables initialization
-    signed char cPathIndex  = 0;
-    signed char cStateIndex = 0;
-    short int   found       = 0;
-
-    if ((g_cCurrentJTAGState == cNextJTAGState) && (cNextJTAGState != RESET)) {
-        return;
-    }
-
-    for (cStateIndex = 0; cStateIndex < 25; cStateIndex++) {
-        if ((g_cCurrentJTAGState == g_JTAGTransistions[cStateIndex].CurState) && (cNextJTAGState == g_JTAGTransistions[cStateIndex].NextState)) {
-            found = 1;
-            break;
-        }
-    }
-    if (found) {
-        g_cCurrentJTAGState = cNextJTAGState;
-        for (cPathIndex = 0; cPathIndex < g_JTAGTransistions[cStateIndex].Pulses; cPathIndex++) {
-            if ((g_JTAGTransistions[cStateIndex].Pattern << cPathIndex) & 0x80) {
-                writePort(JTAG_TMS, (unsigned char)0x01);
-            } else {
-                writePort(JTAG_TMS, (unsigned char)0x00);
-            }
-            sclock();
-        }
-
-        writePort(JTAG_TDI, 0x00);
-        writePort(JTAG_TMS, 0x00);
-    }
-}
-
-/***************************************************************
-*
-* ispVMStart
-*
-* Enable the port to the device and set the state to RESET (TLR).
-*
-***************************************************************/
-
-void ispVMStart()
-{
-#ifdef VME_DEBUG
-    printf("// ISPVM EMBEDDED ADDED\n");
-    printf("STATE RESET;\n");
-#endif
-
-    ispVMStateMachine(RESET);    /*step devices to RESET state*/
-
-}
-
-/***************************************************************
-*
-* ispVMEnd
-*
-* Set the state of devices to RESET to enable the devices and disable
-* the port.
-*
-***************************************************************/
-
-void ispVMEnd()
-{
-#ifdef VME_DEBUG
-    printf("// ISPVM EMBEDDED ADDED\n");
-    printf("STATE RESET;\n");
-    printf("RUNTEST 1.00E-001 SEC;\n");
-#endif
-
-    ispVMStateMachine(RESET);   /*step devices to RESET state */
-    ispVMDelay(1000);              /*wake up devices*/
-}
-
-/***************************************************************
-*
-* ispVMSend
-*
-* Send the TDI data stream to devices. The data stream can be
-* instructions or data.
-*
-***************************************************************/
-
-signed char ispVMSend(unsigned short a_usiDataSize)
-{
-    //09/11/07 NN added local variables initialization
-    unsigned short iIndex       = 0;
-    unsigned short iInDataIndex = 0;
-    unsigned char cCurByte      = 0;
-    unsigned char cBitState     = 0;
-
-    for (iIndex = 0; iIndex < a_usiDataSize - 1; iIndex++) {
-        if (iIndex % 8 == 0) {
-            cCurByte = g_pucInData[iInDataIndex++];
-        }
-        cBitState = (unsigned char)(((cCurByte << iIndex % 8) & 0x80) ? 0x01 : 0x00);
-        writePort(JTAG_TDI, cBitState);
-        sclock();
-    }
-
-    if (iIndex % 8 == 0) {
-        /* Take care of the last bit */
-        cCurByte = g_pucInData[iInDataIndex];
-    }
-
-    cBitState = (unsigned char)(((cCurByte << iIndex % 8) & 0x80) ? 0x01 : 0x00);
-
-    writePort(JTAG_TDI, cBitState);
-    if (g_usFlowControl & CASCADE) {
-        /* 1/15/04 Clock in last bit for the first n-1 cascaded frames */
-        sclock();
-    }
-
-    return 0;
-}
-
-/***************************************************************
-*
-* ispVMRead
-*
-* Read the data stream from devices and verify.
-*
-***************************************************************/
-
-signed char ispVMRead(unsigned short a_usiDataSize) //32
-{
-    //09/11/07 NN added local variables initialization
-    unsigned short usDataSizeIndex    = 0;
-    unsigned short usErrorCount       = 0;
-    unsigned short usLastBitIndex     = 0;
-    unsigned char cDataByte           = 0;
-    unsigned char cMaskByte           = 0;
-    unsigned char cInDataByte         = 0;
-    unsigned char cCurBit             = 0;
-    unsigned char cByteIndex          = 0;
-    unsigned short usBufferIndex      = 0;
-    unsigned char ucDisplayByte       = 0x00;
-    unsigned char ucDisplayFlag       = 0x01;
-    char StrChecksum[256] = { 0 };
-    unsigned char g_usCalculateChecksum = 0x00;
-
-    //09/11/07 NN Type cast mismatch variables
-    usLastBitIndex = (unsigned short)(a_usiDataSize - 1);
-
-    /****************************************************************************
-    *
-    * If mask is not all zeros, then set the display flag to 0x00, otherwise
-    * it shall be set to 0x01 to indicate that data read from the device shall
-    * be displayed. If VME_DEBUG is defined, always display data.
-    *
-    *****************************************************************************/
-
-    for (usDataSizeIndex = 0; usDataSizeIndex < (a_usiDataSize + 7) / 8; usDataSizeIndex++) {
-
-          if (g_usDataType & MASK_DATA) {
-            if (g_pucOutMaskData[usDataSizeIndex] != 0x00) {
-                ucDisplayFlag = 0x00;
-                break;
-            }
-        } else if (g_usDataType & CMASK_DATA) {
-            g_usCalculateChecksum = 0x01;
-            ucDisplayFlag = 0x00;
-            break;
-        } else {
-            ucDisplayFlag = 0x00;
-            break;
-        }
-    }
-
-    /****************************************************************************
-    *
-    * Begin shifting data in and out of the device.
-    *
-    *****************************************************************************/
-    for (usDataSizeIndex = 0; usDataSizeIndex < a_usiDataSize; usDataSizeIndex++) {
-        if (cByteIndex == 0) {
-
-            /***************************************************************
-            *
-            * Grab byte from TDO buffer.
-            *
-            ***************************************************************/
-
-            if (g_usDataType & TDO_DATA) {
-                cDataByte = g_pucOutData[usBufferIndex];
-            }
-
-            /***************************************************************
-            *
-            * Grab byte from MASK buffer.
-            *
-            ***************************************************************/
-
-            if (g_usDataType & MASK_DATA) {
-                cMaskByte = g_pucOutMaskData[usBufferIndex];
-            } else {
-                cMaskByte = 0xFF;
-            }
-
-            /***************************************************************
-            *
-            * Grab byte from CMASK buffer.
-            *
-            ***************************************************************/
-
-            if (g_usDataType & CMASK_DATA) {
-                cMaskByte = 0x00;
-                g_usCalculateChecksum = 0x01;
-            }
-
-            /***************************************************************
-            *
-            * Grab byte from TDI buffer.
-            *
-            ***************************************************************/
-
-            if (g_usDataType & TDI_DATA) {
-                cInDataByte = g_pucInData[usBufferIndex];
-            }
-
-            usBufferIndex++;
-        }
-
-        cCurBit = readPort();
-
-           if (ucDisplayFlag) {
-            ucDisplayByte <<= 1;
-            ucDisplayByte |= cCurBit;
-        }
-
-        /****************************************************************************
-        *
-        * Check if data read from port matches with expected TDO.
-        *
-        *****************************************************************************/
-
-        if (g_usDataType & TDO_DATA) {
-            //08/28/08 NN Added Calculate checksum support.
-            if (g_usCalculateChecksum) {
-                if (cCurBit == 0x01)
-                    g_usChecksum += (1 << (g_uiChecksumIndex % 8));
-                g_uiChecksumIndex++;
-            } else {
-                if ((((cMaskByte << cByteIndex) & 0x80) ? 0x01 : 0x00)) {
-                    if (cCurBit != (unsigned char)(((cDataByte << cByteIndex) & 0x80) ? 0x01 : 0x00)) {
-                        usErrorCount++;
-                    }
-                }
-            }
-        }
-
-        /****************************************************************************
-        *
-        * Write TDI data to the port.
-        *
-        *****************************************************************************/
-
-        writePort(JTAG_TDI, (unsigned char)(((cInDataByte << cByteIndex) & 0x80) ? 0x01 : 0x00));
-
-        if (usDataSizeIndex < usLastBitIndex) {
-
-            /****************************************************************************
-            *
-            * Clock data out from the data shift register.
-            *
-            *****************************************************************************/
-
-            sclock();
-        } else if (g_usFlowControl & CASCADE) {
-
-            /****************************************************************************
-            *
-            * Clock in last bit for the first N - 1 cascaded frames.
-            *
-            *****************************************************************************/
-
-            sclock();
-        }
-
-        /***************************************************************
-        *
-        * Increment the byte index. If it exceeds 7, then reset it back
-        * to zero.
-        *
-        ***************************************************************/
-
-        cByteIndex++;
-        if (cByteIndex >= 8) {
-            if (ucDisplayFlag) {
-
-                /***************************************************************
-                *
-                * Store displayed data in the TDO buffer. By reusing the TDO
-                * buffer to store displayed data, there is no need to allocate
-                * a buffer simply to hold display data. This will not cause any
-                * false verification errors because the true TDO byte has already
-                * been consumed.
-                *
-                ***************************************************************/
-
-                g_pucOutData[usBufferIndex - 1] = ucDisplayByte;
-                ucDisplayByte = 0;
-            }
-
-            cByteIndex = 0;
-        }
-        //09/12/07 Nguyen changed to display the 1 bit expected data
-        else if (a_usiDataSize == 1) {
-            if (ucDisplayFlag) {
-
-                /***************************************************************
-                *
-                * Store displayed data in the TDO buffer. By reusing the TDO
-                * buffer to store displayed data, there is no need to allocate
-                * a buffer simply to hold display data. This will not cause any
-                * false verification errors because the true TDO byte has already
-                * been consumed.
-                *
-                ***************************************************************/
-
-                /****************************************************************************
-                *
-                * Flip ucDisplayByte and store it in cDataByte.
-                *
-                *****************************************************************************/
-                cDataByte = 0x00;
-                for (usBufferIndex = 0; usBufferIndex < 8; usBufferIndex++) {
-                    cDataByte <<= 1;
-                    if (ucDisplayByte & 0x01) {
-                        cDataByte |= 0x01;
-                    }
-                    ucDisplayByte >>= 1;
-                }
-                g_pucOutData[0] = cDataByte;
-                ucDisplayByte = 0;
-            }
-
-            cByteIndex = 0;
-        }
-    }
-    if (ucDisplayFlag) {
-
-        /****************************************************************************
-        *
-        * Display data read from the device.
-        *
-        *****************************************************************************/
-
-#ifdef VME_DEBUG
-        printf("RECIEVED TDO (");
-#else
-        vme_out_string("Display Data: 0x");
-#endif //VME_DEBUG
-
-        //09/11/07 NN Type cast mismatch variables
-        for (usDataSizeIndex = (unsigned short)((a_usiDataSize + 7) / 8); usDataSizeIndex > 0; usDataSizeIndex--) {
-            cMaskByte = g_pucOutData[usDataSizeIndex - 1];
-            cDataByte = 0x00;
-
-            /****************************************************************************
-            *
-            * Flip cMaskByte and store it in cDataByte.
-            *
-            *****************************************************************************/
-
-            for (usBufferIndex = 0; usBufferIndex < 8; usBufferIndex++) {
-                cDataByte <<= 1;
-                if (cMaskByte & 0x01) {
-                    cDataByte |= 0x01;
-                }
-                cMaskByte >>= 1;
-            }
-#ifdef VME_DEBUG
-            printf("%.2X", cDataByte);
-            if ((((a_usiDataSize + 7) / 8) - usDataSizeIndex) % 40 == 39) {
-                printf("\n\t\t");
-            }
-#else
-            vme_out_hex(cDataByte);
-#endif //VME_DEBUG
-        }
-
-#ifdef VME_DEBUG
-        printf(")\n\n");
-#else
-        vme_out_string("\n\n");
-#endif //VME_DEBUG
-        //09/02/08 Nguyen changed to display the data Checksum
-        vme_out_string("g_usChecksum:");
-        sprintf(StrChecksum, "%.4X\n\n", (unsigned int)g_usChecksum);
-        vme_out_string(StrChecksum);
-        vme_out_string("\n\n");
-        if (g_usChecksum != 0) {
-            g_usChecksum &= 0xFFFF;
-            sprintf(StrChecksum, "Data Checksum: %.4X\n\n", (unsigned int)g_usChecksum);
-            vme_out_string(StrChecksum);
-            g_usChecksum = 0;
-        }
-    }
-
-    if (usErrorCount > 0) {
-
-        if (g_usFlowControl & VERIFYUES) {
-            vme_out_string("USERCODE verification failed.  Continue programming......\n\n");
-            g_usFlowControl &= ~(VERIFYUES);
-            return 0;
-        } else {
-
-#ifdef VME_DEBUG
-            printf("TOTAL ERRORS: %d\n", usErrorCount);
-#endif //VME_DEBUG
-
-            return VME_VERIFICATION_FAILURE;
-        }
-    } else {
-        if (g_usFlowControl & VERIFYUES) {
-            vme_out_string("USERCODE verification passed.  Programming aborted. \n\n");
-            g_usFlowControl &= ~(VERIFYUES);
-            return 1;
-        } else {
-            return 0;
-        }
-    }
-}
-
-/***************************************************************
-*
-* ispVMReadandSave
-*
-* Support dynamic I/O.
-*
-***************************************************************/
-
-signed char ispVMReadandSave(unsigned short int a_usiDataSize)
-{
-    //09/11/07 NN added local variables initialization
-    unsigned short int usDataSizeIndex = 0;
-    unsigned short int usLastBitIndex  = 0;
-    unsigned short int usBufferIndex   = 0;
-    unsigned short int usOutBitIndex   = 0;
-    unsigned short int usLVDSIndex     = 0;
-    unsigned char cDataByte            = 0;
-    unsigned char cDMASKByte           = 0;
-    unsigned char cInDataByte          = 0;
-    unsigned char cCurBit              = 0;
-    unsigned char cByteIndex           = 0;
-    signed char cLVDSByteIndex         = 0;
-
-    //09/11/07 NN Type cast mismatch variables
-    usLastBitIndex = (unsigned short)(a_usiDataSize - 1);
-
-    /***************************************************************
-    *
-    * Iterate through the data bits.
-    *
-    ***************************************************************/
-
-    for (usDataSizeIndex = 0; usDataSizeIndex < a_usiDataSize; usDataSizeIndex++) {
-        if (cByteIndex == 0) {
-
-            /***************************************************************
-            *
-            * Grab byte from DMASK buffer.
-            *
-            ***************************************************************/
-
-            if (g_usDataType & DMASK_DATA) {
-                cDMASKByte = g_pucOutDMaskData[usBufferIndex];
-            } else {
-                cDMASKByte = 0x00;
-            }
-
-            /***************************************************************
-            *
-            * Grab byte from TDI buffer.
-            *
-            ***************************************************************/
-
-            if (g_usDataType & TDI_DATA) {
-                cInDataByte = g_pucInData[usBufferIndex];
-            }
-
-            usBufferIndex++;
-        }
-
-        cCurBit = readPort();
-        cDataByte = (unsigned char)(((cInDataByte << cByteIndex) & 0x80) ? 0x01 : 0x00);
-
-        /***************************************************************
-        *
-        * Initialize the byte to be zero.
-        *
-        ***************************************************************/
-
-        if (usOutBitIndex % 8 == 0) {
-            g_pucOutData[usOutBitIndex / 8] = 0x00;
-        }
-
-        /***************************************************************
-        *
-        * Use TDI, DMASK, and device TDO to create new TDI (actually
-        * stored in g_pucOutData).
-        *
-        ***************************************************************/
-
-        if ((((cDMASKByte << cByteIndex) & 0x80) ? 0x01 : 0x00)) {
-
-            if (g_pLVDSList) {
-                for (usLVDSIndex = 0; usLVDSIndex < g_usLVDSPairCount; usLVDSIndex++) {
-                    if (g_pLVDSList[usLVDSIndex].usNegativeIndex == usDataSizeIndex) {
-                        g_pLVDSList[usLVDSIndex].ucUpdate = 0x01;
-                        break;
-                    }
-                }
-            }
-
-            /***************************************************************
-            *
-            * DMASK bit is 1, use TDI.
-            *
-            ***************************************************************/
-
-            g_pucOutData[usOutBitIndex / 8] |= (unsigned char)(((cDataByte & 0x1) ? 0x01 : 0x00) << (7 - usOutBitIndex % 8));
-        } else {
-
-            /***************************************************************
-            *
-            * DMASK bit is 0, use device TDO.
-            *
-            ***************************************************************/
-
-            g_pucOutData[usOutBitIndex / 8] |= (unsigned char)(((cCurBit & 0x1) ? 0x01 : 0x00) << (7 - usOutBitIndex % 8));
-        }
-
-        /***************************************************************
-        *
-        * Shift in TDI in order to get TDO out.
-        *
-        ***************************************************************/
-
-        usOutBitIndex++;
-        writePort(JTAG_TDI, cDataByte);
-        if (usDataSizeIndex < usLastBitIndex) {
-            sclock();
-        }
-
-        /***************************************************************
-        *
-        * Increment the byte index. If it exceeds 7, then reset it back
-        * to zero.
-        *
-        ***************************************************************/
-
-        cByteIndex++;
-        if (cByteIndex >= 8) {
-            cByteIndex = 0;
-        }
-    }
-
-    /***************************************************************
-    *
-    * If g_pLVDSList exists and pairs need updating, then update
-    * the negative-pair to receive the flipped positive-pair value.
-    *
-    ***************************************************************/
-
-    if (g_pLVDSList) {
-        for (usLVDSIndex = 0; usLVDSIndex < g_usLVDSPairCount; usLVDSIndex++) {
-            if (g_pLVDSList[usLVDSIndex].ucUpdate) {
-
-                /***************************************************************
-                *
-                * Read the positive value and flip it.
-                *
-                ***************************************************************/
-
-                cDataByte = (unsigned char)(((g_pucOutData[g_pLVDSList[usLVDSIndex].usPositiveIndex / 8] << (g_pLVDSList[usLVDSIndex].usPositiveIndex % 8)) & 0x80) ? 0x01 : 0x00);
-                //09/11/07 NN Type cast mismatch variables
-                cDataByte = (unsigned char)(!cDataByte);
-
-                /***************************************************************
-                *
-                * Get the byte that needs modification.
-                *
-                ***************************************************************/
-
-                cInDataByte = g_pucOutData[g_pLVDSList[usLVDSIndex].usNegativeIndex / 8];
-
-                if (cDataByte) {
-
-                    /***************************************************************
-                    *
-                    * Copy over the current byte and set the negative bit to 1.
-                    *
-                    ***************************************************************/
-
-                    cDataByte = 0x00;
-                    for (cLVDSByteIndex = 7; cLVDSByteIndex >= 0; cLVDSByteIndex--) {
-                        cDataByte <<= 1;
-                        if (7 - (g_pLVDSList[usLVDSIndex].usNegativeIndex % 8) == cLVDSByteIndex) {
-
-                            /***************************************************************
-                            *
-                            * Set negative bit to 1.
-                            *
-                            ***************************************************************/
-
-                            cDataByte |= 0x01;
-                        } else if (cInDataByte & 0x80) {
-                            cDataByte |= 0x01;
-                        }
-
-                        cInDataByte <<= 1;
-                    }
-
-                    /***************************************************************
-                    *
-                    * Store the modified byte.
-                    *
-                    ***************************************************************/
-
-                    g_pucOutData[g_pLVDSList[usLVDSIndex].usNegativeIndex / 8] = cDataByte;
-                } else {
-
-                    /***************************************************************
-                    *
-                    * Copy over the current byte and set the negative bit to 0.
-                    *
-                    ***************************************************************/
-
-                    cDataByte = 0x00;
-                    for (cLVDSByteIndex = 7; cLVDSByteIndex >= 0; cLVDSByteIndex--) {
-                        cDataByte <<= 1;
-                        if (7 - (g_pLVDSList[usLVDSIndex].usNegativeIndex % 8) == cLVDSByteIndex) {
-
-                            /***************************************************************
-                            *
-                            * Set negative bit to 0.
-                            *
-                            ***************************************************************/
-
-                            cDataByte |= 0x00;
-                        } else if (cInDataByte & 0x80) {
-                            cDataByte |= 0x01;
-                        }
-
-                        cInDataByte <<= 1;
-                    }
-
-                    /***************************************************************
-                    *
-                    * Store the modified byte.
-                    *
-                    ***************************************************************/
-
-                    g_pucOutData[g_pLVDSList[usLVDSIndex].usNegativeIndex / 8] = cDataByte;
-                }
-
-                break;
-            }
-        }
-    }
-
-    return (0);
-}
-
-signed char ispVMProcessLVDS(unsigned short a_usLVDSCount)
-{
-    unsigned short usLVDSIndex = 0;
-
-    /***************************************************************
-    *
-    * Allocate memory to hold LVDS pairs.
-    *
-    ***************************************************************/
-
-    ispVMMemManager(LVDS, a_usLVDSCount);
-    g_usLVDSPairCount = a_usLVDSCount;
-
-#ifdef VME_DEBUG
-    printf("LVDS %d (", a_usLVDSCount);
-#endif //VME_DEBUG
-
-    /***************************************************************
-    *
-    * Iterate through each given LVDS pair.
-    *
-    ***************************************************************/
-
-    for (usLVDSIndex = 0; usLVDSIndex < g_usLVDSPairCount; usLVDSIndex++) {
-
-        /***************************************************************
-        *
-        * Assign the positive and negative indices of the LVDS pair.
-        *
-        ***************************************************************/
-
-        //09/11/07 NN Type cast mismatch variables
-        g_pLVDSList[usLVDSIndex].usPositiveIndex = (unsigned short)ispVMDataSize();
-        //09/11/07 NN Type cast mismatch variables
-        g_pLVDSList[usLVDSIndex].usNegativeIndex = (unsigned short)ispVMDataSize();
-
-#ifdef VME_DEBUG
-        if (usLVDSIndex < g_usLVDSPairCount - 1) {
-            printf("%d:%d, ", g_pLVDSList[usLVDSIndex].usPositiveIndex, g_pLVDSList[usLVDSIndex].usNegativeIndex);
-        } else {
-            printf("%d:%d", g_pLVDSList[usLVDSIndex].usPositiveIndex, g_pLVDSList[usLVDSIndex].usNegativeIndex);
-        }
-#endif //VME_DEBUG
-
-    }
-
-#ifdef VME_DEBUG
-    printf(") -- %d;\n", a_usLVDSCount);
-#endif //VME_DEBUG
-
-    return (0);
-}
-
-/***************************************************************
-*
-* ivm_core_reinit
-*
-* Reinit ivm_core variables.
-*
-***************************************************************/
-void ivm_core_reinit()
-{
-    g_usFlowControl  = 0x0000;
-    g_usDataType     = 0x0000;
-
-    g_ucEndDR = DRPAUSE;
-    g_ucEndIR = IRPAUSE;
-
-    g_usHeadDR = 0;
-    g_usHeadIR = 0;
-    g_usTailDR = 0;
-    g_usTailIR = 0;
-
-    g_usiDataSize = 0;
-
-    g_iFrequency = 1000;
-
-    g_usMaxSize = 0;
-
-    g_usShiftValue = 0;
-
-    g_usRepeatLoops = 0;
-
-    g_cVendor = LATTICE;
-
-    g_usCalculatedCRC = 0;
-
-    g_usChecksum = 0;
-    g_uiChecksumIndex = 0;
-
-    g_cCurrentJTAGState = 0;
-
-    g_pucHeapMemory      = NULL;
-    g_iHeapCounter       = 0;
-    g_iHEAPSize          = 0;
-
-    g_usIntelDataIndex   = 0;
-    g_usIntelBufferSize  = 0;
-
-    g_usTDOSize      = 0;
-    g_usMASKSize     = 0;
-    g_usTDISize      = 0;
-    g_usDMASKSize    = 0;
-    g_usLCOUNTSize   = 0;
-    g_usHDRSize      = 0;
-    g_usTDRSize      = 0;
-    g_usHIRSize      = 0;
-    g_usTIRSize      = 0;
-    g_usHeapSize     = 0;
-
-    g_pucOutMaskData   = NULL;
-    g_pucInData        = NULL;
-    g_pucOutData       = NULL;
-    g_pucHIRData       = NULL;
-    g_pucTIRData       = NULL;
-    g_pucHDRData       = NULL;
-    g_pucTDRData       = NULL;
-    g_pucIntelBuffer   = NULL;
-    g_pucOutDMaskData  = NULL;
-
-    g_pLVDSList = NULL;
-    g_usLVDSPairCount = 0;
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_isc/firmware_upgrade_isc.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_isc/firmware_upgrade_isc.c
deleted file mode 100644
index c252dfde7c57..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_isc/firmware_upgrade_isc.c
+++ /dev/null
@@ -1,68 +0,0 @@
-#include <sys/stat.h>
-#include <sys/types.h>
-#include <errno.h>
-#include <unistd.h>
-#include <fcntl.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <ctype.h>
-#include <string.h>
-#include <dirent.h>
-#include <linux/version.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <firmware_app.h>
-
-/*
- * firmware_upgrade_jtag
- * function: Determine whether to upgrade ISC or JBI
- * @fd:   param[in] Device file descriptor
- * @buf:  param[in] Upgrade the file content
- * @size: param[in] Upgrade file size
- * @info: param[in] Upgrade file information
- * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-int firmware_upgrade_jtag(int fd, uint8_t *buf, uint32_t size, name_info_t *info)
-{
-    int ret;
-    cmd_info_t cmd_info;
-
-    cmd_info.size = size;
-    cmd_info.data = buf;
-    ret = 0;
-
-    if (info->type == FIRMWARE_CPLD) {
-        /* 0x4A,0x41,0x4D,0x01 is JBI file */
-        if (buf[0] == 0x4A && buf[1] == 0x41 && buf[2] == 0x4D && buf[3] == 0x01) {
-            dbg_print(is_debug_on, "Use jbi file.\n");
-            ret = ioctl(fd, FIRMWARE_PROGRAM_JBI, &cmd_info);
-        } else {
-            dbg_print(is_debug_on, "Use isc file.\n");
-            ret = ioctl(fd, FIRMWARE_PROGRAM, &cmd_info);
-        }
-    }
-
-    if (info->type == FIRMWARE_FPGA) {
-        ret = ioctl(fd, FIRMWARE_PROGRAM, &cmd_info);
-    }
-
-    if (ret < 0) {
-        return FIRMWARE_FAILED;
-    }
-
-    return FIRMWARE_SUCCESS;
-}
-
-/*
- * firmware_upgrade_jtag_test
- * function: Determine whether to upgrade ISC or JBI
- * @fd:   param[in] Device file descriptor
- * @buf:  param[in] Upgrade the file content
- * @size: param[in] Upgrade file size
- * @info: param[in] Upgrade file information
- * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-int firmware_upgrade_jtag_test(int fd, uint8_t *buf, uint32_t size, name_info_t *info)
-{
-    return FIRMWARE_SUCCESS;
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_mtd/firmware_upgrade_mtd.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_mtd/firmware_upgrade_mtd.c
deleted file mode 100644
index 0a7659f0e428..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_mtd/firmware_upgrade_mtd.c
+++ /dev/null
@@ -1,446 +0,0 @@
-#include <sys/stat.h>
-#include <sys/types.h>
-#include <errno.h>
-#include <unistd.h>
-#include <fcntl.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <ctype.h>
-#include <string.h>
-#include <dirent.h>
-#include <linux/version.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <firmware_app.h>
-#include "firmware_upgrade_mtd.h"
-#include "mtd-abi.h"
-
-static int get_mtdnum_from_name(char *name, int *mtdnum)
-{
-    FILE *fp;
-    int ret;
-    char buf[PATH_LEN];
-    char *start;
-    char *end;
-    char *key_w = "mtd";
-
-    if (name == NULL || mtdnum == NULL) {
-        dbg_print(is_debug_on, "Input invalid error.\n");
-        return -EINVAL;
-    }
-    ret = 0;
-    *mtdnum = -1;
-    fp = fopen("/proc/mtd", "r");
-    if (fp == NULL) {
-        dbg_print(is_debug_on, "Not find mtd device.\n");
-        return -FIRWMARE_MTD_PART_INFO_ERR;
-    }
-
-    mem_clear(buf, sizeof(buf));
-    while(fgets(buf, sizeof(buf), fp)) {
-        if (strstr(buf, name) != NULL) {
-            start = strstr(buf, key_w);
-            if (start == NULL) {
-                dbg_print(is_debug_on, "/proc/mtd don't find %s.\n", key_w);
-                ret = -FIRWMARE_MTD_PART_INFO_ERR;
-                goto exit;
-            }
-            start += strlen(key_w);
-            end = strchr(start, ':');
-            if (end == NULL) {
-                dbg_print(is_debug_on, "/proc/mtd don't find %c.\n", ':');
-                ret = -FIRWMARE_MTD_PART_INFO_ERR;
-                goto exit;
-            }
-
-            *end = '\0';
-            *mtdnum = atoi(start);
-            if (*mtdnum < 0) {
-                dbg_print(is_debug_on, "Not get mtd num.\n");
-                ret = -FIRWMARE_MTD_PART_INFO_ERR;
-                goto exit;
-            }
-        }
-    }
-
-    if (*mtdnum == -1) {
-        ret = -FIRWMARE_MTD_PART_INFO_ERR;
-        goto exit;
-    }
-exit:
-    if (fp != NULL) {
-        fclose(fp);
-    }
-
-    return ret;
-}
-
-static int firmware_sysfs_get_dev_info(int fd, firmware_mtd_info_t *dev_info)
-{
-    int ret;
-
-    ret = ioctl(fd, FIRMWARE_SYSFS_MTD_INFO, dev_info);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Failed to get upg device file info.\n");
-        return ret;
-    }
-
-    dbg_print(is_debug_on, "mtd_name=%s flash_base=0x%x test_base=0x%x test_size=%d.\n",
-            dev_info->mtd_name, dev_info->flash_base, dev_info->test_base, dev_info->test_size);
-    return 0;
-}
-
-/*
- * MEMGETINFO
- */
-static int getmeminfo(int fd, struct mtd_info_user *mtd)
-{
-    return ioctl(fd, MEMGETINFO, mtd);
-}
-
-/*
- * MEMERASE
- */
-static int memerase(int fd, struct erase_info_user *erase)
-{
-    return ioctl(fd, MEMERASE, erase);
-}
-
-static int erase_flash(int fd, uint32_t offset, uint32_t bytes)
-{
-    int err;
-    struct erase_info_user erase;
-    erase.start = offset;
-    erase.length = bytes;
-    err = memerase(fd, &erase);
-    if (err < 0) {
-        dbg_print(is_debug_on, "Error: memerase failed, err=%d\n", err);
-        return -FIRWMARE_MTD_MEMERASE;
-    }
-    dbg_print(is_debug_on, "Erased %d bytes from address 0x%.8x in flash\n", bytes, offset);
-    return 0;
-}
-
-/*
- * firmware_upgrade_mtd_block
- * function: upgrade mtd device block
- * @dev_info:   param[in] Device file descriptor
- * @buf:  param[in] Upgrade the file content
- * @size: param[in] Upgrade file size
- * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-static int firmware_upgrade_mtd_block(int mtd_fd, uint32_t offset,
-                uint8_t *buf, uint32_t size, uint32_t erasesize)
-{
-    int ret;
-    int i;
-    uint8_t *reread_buf;
-    uint32_t cmp_retry, reread_len, write_len;
-
-    /* Read back data */
-    reread_buf = (uint8_t *) malloc(size);
-    if (reread_buf == NULL) {
-        dbg_print(is_debug_on, "Error: Failed to malloc memory for read back data buf, size=%d.\n", size);
-        return FIRMWARE_FAILED;
-    }
-
-    for (cmp_retry = 0; cmp_retry < FW_SYSFS_RETRY_TIME; cmp_retry++) {
-        for (i = 0; i < FW_SYSFS_RETRY_TIME; i++) {
-            if (offset != lseek(mtd_fd, offset, SEEK_SET)) {
-                dbg_print(is_debug_on, "Error:lseek mtd offset=%x retrytimes=%d failed.\n", offset, i);
-                usleep(FW_SYSFS_RETRY_SLEEP_TIME);
-                continue;
-            }
-
-            dbg_print(is_debug_on, "erase mtd offset=0x%x erasesize=%d retrytimes=%d.\n",
-                        offset, erasesize, i);
-            ret = erase_flash(mtd_fd, offset, erasesize);
-            if (ret < 0) {
-                dbg_print(is_debug_on, "Error:erase mtd offset=%x size=%d retrytimes=%d failed, ret=%d\n",
-                            offset, size, i, ret);
-                usleep(FW_SYSFS_RETRY_SLEEP_TIME);
-                continue;
-            }
-
-            dbg_print(is_debug_on, "write mtd offset=0x%x size=%d retrytimes=%d.\n",
-                        offset, size, i);
-            write_len = write(mtd_fd, buf, size);
-            if (write_len != size) {
-                dbg_print(is_debug_on, "Error:write mtd offset=0x%x size=%d write_len=%d retrytimes=%d.\n",
-                             offset, size, write_len, i);
-                usleep(FW_SYSFS_RETRY_SLEEP_TIME);
-                continue;
-            }
-            break;
-        }
-        if (i == FW_SYSFS_RETRY_TIME) {
-            dbg_print(is_debug_on, "Error: upgrade mtd fail, offset = 0x%x, size = %d\n", offset, size);
-            free(reread_buf);
-            return FIRMWARE_FAILED;
-        }
-
-        usleep(FW_SYSFS_RETRY_SLEEP_TIME);
-        dbg_print(is_debug_on, "Reread mtd offset=0x%x size=%d\n", offset, size);
-        for (i = 0; i < FW_SYSFS_RETRY_TIME; i++) {
-            if (offset != lseek(mtd_fd, offset, SEEK_SET)) {
-                dbg_print(is_debug_on, "Error:lseek mtd offset=%x retrytimes=%d failed.\n", offset, i);
-                usleep(FW_SYSFS_RETRY_SLEEP_TIME);
-                continue;
-            }
-
-            reread_len = read(mtd_fd, reread_buf, size);
-            if (reread_len != size) {
-                dbg_print(is_debug_on, "Error:reread mtd offset=0x%x size=%d reread_len=%d retrytimes=%d.\n",
-                             offset, size, reread_len, i);
-                usleep(FW_SYSFS_RETRY_SLEEP_TIME);
-                continue;
-            }
-            break;
-        }
-        if (i == FW_SYSFS_RETRY_TIME) {
-            dbg_print(is_debug_on, "Error: reread mtd fail, offset = 0x%x size = %d\n", offset, size);
-            free(reread_buf);
-            return FIRMWARE_FAILED;
-        }
-
-        /* Check data */
-        if (memcmp(reread_buf, buf, size) != 0) {
-            dbg_print(is_debug_on, "memcmp mtd fail,offset = 0x%x retrytimes = %d\n", offset, cmp_retry);
-        } else {
-            break;
-        }
-    }
-    if (cmp_retry >= FW_SYSFS_RETRY_TIME) {
-        dbg_print(is_debug_on, "upgrade mtd fail, offset = 0x%x.\n", offset);
-        dbg_print(is_debug_on, "want to write buf :\n");
-        for (i = 0; i < size; i++) {
-            dbg_print(is_debug_on, "0x%x ", buf[i]);
-            if (((i + 1) % 16) == 0) {
-                dbg_print(is_debug_on, "\n");
-            }
-        }
-        dbg_print(is_debug_on, "\n");
-
-        dbg_print(is_debug_on, "actually reread buf :\n");
-        for (i = 0; i < size; i++) {
-            dbg_print(is_debug_on, "0x%x ", reread_buf[i]);
-            if (((i + 1) % 16) == 0) {
-                dbg_print(is_debug_on, "\n");
-            }
-        }
-        dbg_print(is_debug_on, "\n");
-
-        free(reread_buf);
-        return FIRMWARE_FAILED;
-    }
-
-    free(reread_buf);
-    dbg_print(is_debug_on, "firmware upgrade mtd block offset[0x%.8x] success.\n", offset);
-    return FIRMWARE_SUCCESS;
-}
-
-/*
- * firmware_upgrade_mtd_program
- * function: upgrade mtd device
- * @dev_info:   param[in] Device file descriptor
- * @flash_base: param[in] Upgrade the flash start address
- * @buf:  param[in] Upgrade the file content
- * @size: param[in] Upgrade file size
- * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-static int firmware_upgrade_mtd_program(firmware_mtd_info_t *dev_info,
-                int flash_base, uint8_t *buf, uint32_t size)
-{
-    int ret;
-    int mtdnum;
-    char dev_mtd[PATH_LEN];
-    int mtd_fd;
-    uint32_t offset, len, block_size;
-    struct mtd_info_user mtd_info;
-    uint8_t *data_point;
-
-    ret = get_mtdnum_from_name(dev_info->mtd_name, &mtdnum);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Error:not find %s mtd num.\n", dev_info->mtd_name);
-        return FIRMWARE_FAILED;
-    }
-
-    mem_clear(dev_mtd, sizeof(dev_mtd));
-    snprintf(dev_mtd, sizeof(dev_mtd) - 1, "/dev/mtd%d", mtdnum);
-
-    mtd_fd = open(dev_mtd, O_SYNC | O_RDWR);
-    if (mtd_fd < 0) {
-        dbg_print(is_debug_on, "Error:open %s failed.\n", dev_mtd);
-        goto err;
-    }
-
-    ret = getmeminfo(mtd_fd, &mtd_info);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Error:get mtd info failed, ret=%d.\n", ret);
-        goto failed;
-    }
-
-    offset = flash_base;
-    if (offset >= mtd_info.size) {
-        dbg_print(is_debug_on, "Error: offset[0x%.8x] over size[0x%.8x]\n", offset, size);
-        goto failed;
-    }
-
-    len = size;
-    data_point = buf;
-    while ((offset < mtd_info.size) && (len > 0)) {
-        if (len > mtd_info.erasesize) {
-            block_size = mtd_info.erasesize;
-        } else {
-            block_size = len;
-        }
-        dbg_print(is_debug_on, "upgrade mtd[%s] block offset[0x%.8x] size[%d] relen[%d].\n", dev_mtd, offset, size, len);
-        ret = firmware_upgrade_mtd_block(mtd_fd, offset, data_point, block_size, mtd_info.erasesize);
-        if (ret < 0) {
-            dbg_print(is_debug_on, "Error: mt block offset[0x%.8x] size[0x%.8x] failed.\n", offset, block_size);
-            goto failed;
-        }
-        len -= block_size;
-        data_point += block_size;
-        offset += block_size;
-        usleep(FW_MTD_BLOCK_SLEEP_TIME);
-    }
-
-    if (close(mtd_fd) < 0) {
-        dbg_print(is_debug_on, "Error:close %s failed.\n", dev_mtd);
-    }
-    dbg_print(is_debug_on, "firmware upgrade mtd device success.\n");
-    return FIRMWARE_SUCCESS;
-
-failed:
-    if (close(mtd_fd) < 0) {
-        dbg_print(is_debug_on, "Error:close %s failed.\n", dev_mtd);
-    }
-
-err:
-    dbg_print(is_debug_on, "firmware upgrade mtd device fail.\n");
-    return FIRMWARE_FAILED;
-}
-
-/*
- * firmware_upgrade_mtd
- * function: Determine whether to upgrade ISC or JBI
- * @fd:   param[in] Device file descriptor
- * @buf:  param[in] Upgrade the file content
- * @size: param[in] Upgrade file size
- * @info: param[in] Upgrade file information
- * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-int firmware_upgrade_mtd(int fd, uint8_t *buf, uint32_t size, name_info_t *info)
-{
-    int ret;
-    firmware_mtd_info_t dev_info;
-
-    if ((buf == NULL) || (info == NULL)) {
-        dbg_print(is_debug_on, "Input invalid error.\n");
-        return FIRMWARE_FAILED;
-    }
-
-    /* get sysfs information*/
-    ret = firmware_sysfs_get_dev_info(fd, &dev_info);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "firmware_sysfs_get_dev_info failed, ret %d.\n", ret);
-        return FIRMWARE_FAILED;
-    }
-
-    /* enable upgrade access */
-    ret = ioctl(fd, FIRMWARE_SYSFS_INIT, NULL);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "init dev logic faile\n");
-        return FIRMWARE_FAILED;
-    }
-
-    ret = firmware_upgrade_mtd_program(&dev_info, dev_info.flash_base, buf, size);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Error:mtd device program failed, ret=%d.\n", ret);
-        goto failed;
-    }
-
-    /* disable upgrade access */
-    ret = ioctl(fd, FIRMWARE_SYSFS_FINISH, NULL);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "close dev logic en failed.\n");
-    }
-
-    return FIRMWARE_SUCCESS;
-
-failed:
-    /* disable upgrade access */
-    ret = ioctl(fd, FIRMWARE_SYSFS_FINISH,NULL);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "close dev logic en failed.\n");
-    }
-
-    return FIRMWARE_FAILED;
-}
-
-/*
- * firmware_upgrade_mtd_test
- * function: Determine whether to upgrade ISC or JBI
- * @fd:   param[in] Device file descriptor
- * @info: param[in] Upgrade file information
- * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-int firmware_upgrade_mtd_test(int fd, name_info_t *info)
-{
-    int ret, rv;
-    firmware_mtd_info_t dev_info;
-    uint8_t *data_buf;
-    uint8_t num;
-    int j;
-
-    if (info == NULL) {
-        dbg_print(is_debug_on, "Input invalid error.\n");
-        return FIRMWARE_FAILED;
-    }
-
-    /* get sysfs information*/
-    ret = firmware_sysfs_get_dev_info(fd, &dev_info);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "firmware_sysfs_get_dev_info failed, ret %d.\n", ret);
-        return FIRMWARE_FAILED;
-    }
-
-    if (dev_info.test_size == 0) {
-        dbg_print(is_debug_on, "Error: get flash size:%d, not support.\n", dev_info.test_size);
-        return FIRMWARE_NOT_SUPPORT;
-    }
-
-    data_buf = (uint8_t *) malloc(dev_info.test_size);
-    if (data_buf == NULL) {
-        dbg_print(is_debug_on, "Error: Failed to malloc memory for test data buf, size=%d.\n", dev_info.test_size);
-        return FIRMWARE_FAILED;
-    }
-
-    /* Get random data */
-    for (j = 0; j < dev_info.test_size; j++) {
-        num = (uint8_t) rand() % 256;
-        data_buf[j] = num & 0xff;
-    }
-
-    /* enable upgrade access */
-    ret = ioctl(fd, FIRMWARE_SYSFS_INIT, NULL);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "init dev logic faile\n");
-        free(data_buf);
-        return FIRMWARE_FAILED;
-    }
-
-    ret = firmware_upgrade_mtd_program(&dev_info, dev_info.test_base, data_buf, dev_info.test_size);
-    /* disable upgrade access */
-    rv = ioctl(fd, FIRMWARE_SYSFS_FINISH, NULL);
-    if (rv < 0) {
-        dbg_print(is_debug_on, "close dev logic en failed.\n");
-    }
-    free(data_buf);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Error:mtd device program failed, ret=%d.\n", ret);
-        return FIRMWARE_FAILED;
-    }
-    return FIRMWARE_SUCCESS;
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_mtd/firmware_upgrade_mtd.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_mtd/firmware_upgrade_mtd.h
deleted file mode 100644
index 06e36b3149d5..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_mtd/firmware_upgrade_mtd.h
+++ /dev/null
@@ -1,32 +0,0 @@
-#ifndef __FIRMWARE_UPGRADE_MTD_H__
-#define __FIRMWARE_UPGRADE_MTD_H__
-
-#include <firmware_app.h>
-
-#define FIRMWARE_DEV_NAME_LEN     64    /* the macro definition needs to same as FIRMWARE_DEV_NAME_LEN in firmware_sysfs_upgrade.h */
-#define PATH_LEN    (256)
-#define FW_MTD_BLOCK_SLEEP_TIME        (10000)   /* 10ms */
-#define FW_SYSFS_RETRY_SLEEP_TIME      (10000)   /* 10ms */
-#define FW_SYSFS_RETRY_TIME            (5)  /* retry 5 times, 50ms = FW_SYSFS_RETRY_TIME *FW_SYSFS_RETRY_SLEEP_TIME;  */
-
-/* Debug switch level */
-typedef enum {
-    FIRWMARE_MTD_SUCCESS = 0,
-    FIRWMARE_MTD_PART_INFO_ERR,
-    FIRWMARE_MTD_MEMERASE,
-    FIRWMARE_MTD_MEMGETINFO,
-    FIRWMARE_END,
-} firmware_debug_level_t;
-
-#define debug(fmt, argv...) do {  \
-    dbg_print(is_debug_on, ""fmt , ##argv);\
- } while(0)
-
-typedef struct firmware_mtd_info_s {
-    char mtd_name[FIRMWARE_DEV_NAME_LEN];         /* sysfs name */
-    uint32_t flash_base;                               /* Flash Upgrade Address */
-    uint32_t test_base;                                /* Test flash address */
-    uint32_t test_size;                                /* Test flash size */
-} firmware_mtd_info_t;
-
-#endif /* End of __FIRMWARE_UPGRADE_MTD_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_mtd/mtd-abi.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_mtd/mtd-abi.h
deleted file mode 100644
index f326d23e732e..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_mtd/mtd-abi.h
+++ /dev/null
@@ -1,259 +0,0 @@
-
-#ifndef __MTD_ABI_H__
-#define __MTD_ABI_H__
-
-#include <linux/types.h>
-
-struct erase_info_user {
-	__u32 start;
-	__u32 length;
-};
-
-struct erase_info_user64 {
-	__u64 start;
-	__u64 length;
-};
-
-struct mtd_oob_buf {
-	__u32 start;
-	__u32 length;
-	unsigned char *ptr;
-};
-
-struct mtd_oob_buf64 {
-	__u64 start;
-	__u32 pad;
-	__u32 length;
-	__u64 usr_ptr;
-};
-
-/**
- * MTD operation modes
- *
- * @MTD_OPS_PLACE_OOB:	OOB data are placed at the given offset (default)
- * @MTD_OPS_AUTO_OOB:	OOB data are automatically placed at the free areas
- *			which are defined by the internal ecclayout
- * @MTD_OPS_RAW:	data are transferred as-is, with no error correction;
- *			this mode implies %MTD_OPS_PLACE_OOB
- *
- * These modes can be passed to ioctl(MEMWRITE) and are also used internally.
- * See notes on "MTD file modes" for discussion on %MTD_OPS_RAW vs.
- * %MTD_FILE_MODE_RAW.
- */
-enum {
-	MTD_OPS_PLACE_OOB = 0,
-	MTD_OPS_AUTO_OOB = 1,
-	MTD_OPS_RAW = 2,
-};
-
-/**
- * struct mtd_write_req - data structure for requesting a write operation
- *
- * @start:	start address
- * @len:	length of data buffer
- * @ooblen:	length of OOB buffer
- * @usr_data:	user-provided data buffer
- * @usr_oob:	user-provided OOB buffer
- * @mode:	MTD mode (see "MTD operation modes")
- * @padding:	reserved, must be set to 0
- *
- * This structure supports ioctl(MEMWRITE) operations, allowing data and/or OOB
- * writes in various modes. To write to OOB-only, set @usr_data == NULL, and to
- * write data-only, set @usr_oob == NULL. However, setting both @usr_data and
- * @usr_oob to NULL is not allowed.
- */
-struct mtd_write_req {
-	__u64 start;
-	__u64 len;
-	__u64 ooblen;
-	__u64 usr_data;
-	__u64 usr_oob;
-	__u8 mode;
-	__u8 padding[7];
-};
-
-#define MTD_ABSENT		0
-#define MTD_RAM			1
-#define MTD_ROM			2
-#define MTD_NORFLASH		3
-#define MTD_NANDFLASH		4
-#define MTD_DATAFLASH		6
-#define MTD_UBIVOLUME		7
-#define MTD_MLCNANDFLASH	8
-
-#define MTD_WRITEABLE		0x400	/* Device is writeable */
-#define MTD_BIT_WRITEABLE	0x800	/* Single bits can be flipped */
-#define MTD_NO_ERASE		0x1000	/* No erase necessary */
-#define MTD_POWERUP_LOCK	0x2000	/* Always locked after reset */
-
-/* Some common devices / combinations of capabilities */
-#define MTD_CAP_ROM		0
-#define MTD_CAP_RAM		(MTD_WRITEABLE | MTD_BIT_WRITEABLE | MTD_NO_ERASE)
-#define MTD_CAP_NORFLASH	(MTD_WRITEABLE | MTD_BIT_WRITEABLE)
-#define MTD_CAP_NANDFLASH	(MTD_WRITEABLE)
-
-/* Obsolete ECC byte placement modes (used with obsolete MEMGETOOBSEL) */
-#define MTD_NANDECC_OFF		0	// Switch off ECC (Not recommended)
-#define MTD_NANDECC_PLACE	1	// Use the given placement in the structure (YAFFS1 legacy mode)
-#define MTD_NANDECC_AUTOPLACE	2	// Use the default placement scheme
-#define MTD_NANDECC_PLACEONLY	3	// Use the given placement in the structure (Do not store ecc result on read)
-#define MTD_NANDECC_AUTOPL_USR 	4	// Use the given autoplacement scheme rather than using the default
-
-/* OTP mode selection */
-#define MTD_OTP_OFF		0
-#define MTD_OTP_FACTORY		1
-#define MTD_OTP_USER		2
-
-typedef struct mtd_info_user {
-	__u8 type;
-	__u32 flags;
-	__u32 size;	/* Total size of the MTD */
-	__u32 erasesize;
-	__u32 writesize;
-	__u32 oobsize;	/* Amount of OOB data per block (e.g. 16) */
-	__u64 padding;	/* Old obsolete field; do not use */
-} mtd_info_user_t;
-
-struct region_info_user {
-	__u32 offset;		/* At which this region starts,
-				 * from the beginning of the MTD */
-	__u32 erasesize;	/* For this region */
-	__u32 numblocks;	/* Number of blocks in this region */
-	__u32 regionindex;
-};
-
-struct otp_info {
-	__u32 start;
-	__u32 length;
-	__u32 locked;
-};
-
-/*
- * Note, the following ioctl existed in the past and was removed:
- * #define MEMSETOOBSEL           _IOW('M', 9, struct nand_oobinfo)
- * Try to avoid adding a new ioctl with the same ioctl number.
- */
-
-/* Get basic MTD characteristics info (better to use sysfs) */
-#define MEMGETINFO		_IOR('M', 1, struct mtd_info_user)
-/* Erase segment of MTD */
-#define MEMERASE		_IOW('M', 2, struct erase_info_user)
-/* Write out-of-band data from MTD */
-#define MEMWRITEOOB		_IOWR('M', 3, struct mtd_oob_buf)
-/* Read out-of-band data from MTD */
-#define MEMREADOOB		_IOWR('M', 4, struct mtd_oob_buf)
-/* Lock a chip (for MTD that supports it) */
-#define MEMLOCK			_IOW('M', 5, struct erase_info_user)
-/* Unlock a chip (for MTD that supports it) */
-#define MEMUNLOCK		_IOW('M', 6, struct erase_info_user)
-/* Get the number of different erase regions */
-#define MEMGETREGIONCOUNT	_IOR('M', 7, int)
-/* Get information about the erase region for a specific index */
-#define MEMGETREGIONINFO	_IOWR('M', 8, struct region_info_user)
-/* Get info about OOB modes (e.g., RAW, PLACE, AUTO) - legacy interface */
-#define MEMGETOOBSEL		_IOR('M', 10, struct nand_oobinfo)
-/* Check if an eraseblock is bad */
-#define MEMGETBADBLOCK		_IOW('M', 11, __kernel_loff_t)
-/* Mark an eraseblock as bad */
-#define MEMSETBADBLOCK		_IOW('M', 12, __kernel_loff_t)
-/* Set OTP (One-Time Programmable) mode (factory vs. user) */
-#define OTPSELECT		_IOR('M', 13, int)
-/* Get number of OTP (One-Time Programmable) regions */
-#define OTPGETREGIONCOUNT	_IOW('M', 14, int)
-/* Get all OTP (One-Time Programmable) info about MTD */
-#define OTPGETREGIONINFO	_IOW('M', 15, struct otp_info)
-/* Lock a given range of user data (must be in mode %MTD_FILE_MODE_OTP_USER) */
-#define OTPLOCK			_IOR('M', 16, struct otp_info)
-/* Get ECC layout (deprecated) */
-#define ECCGETLAYOUT		_IOR('M', 17, struct nand_ecclayout_user)
-/* Get statistics about corrected/uncorrected errors */
-#define ECCGETSTATS		_IOR('M', 18, struct mtd_ecc_stats)
-/* Set MTD mode on a per-file-descriptor basis (see "MTD file modes") */
-#define MTDFILEMODE		_IO('M', 19)
-/* Erase segment of MTD (supports 64-bit address) */
-#define MEMERASE64		_IOW('M', 20, struct erase_info_user64)
-/* Write data to OOB (64-bit version) */
-#define MEMWRITEOOB64		_IOWR('M', 21, struct mtd_oob_buf64)
-/* Read data from OOB (64-bit version) */
-#define MEMREADOOB64		_IOWR('M', 22, struct mtd_oob_buf64)
-/* Check if chip is locked (for MTD that supports it) */
-#define MEMISLOCKED		_IOR('M', 23, struct erase_info_user)
-/*
- * Most generic write interface; can write in-band and/or out-of-band in various
- * modes (see "struct mtd_write_req")
- */
-#define MEMWRITE		_IOWR('M', 24, struct mtd_write_req)
-
-/*
- * Obsolete legacy interface. Keep it in order not to break userspace
- * interfaces
- */
-struct nand_oobinfo {
-	__u32 useecc;
-	__u32 eccbytes;
-	__u32 oobfree[8][2];
-	__u32 eccpos[32];
-};
-
-struct nand_oobfree {
-	__u32 offset;
-	__u32 length;
-};
-
-#define MTD_MAX_OOBFREE_ENTRIES	8
-#define MTD_MAX_ECCPOS_ENTRIES	64
-/*
- * OBSOLETE: ECC layout control structure. Exported to user-space via ioctl
- * ECCGETLAYOUT for backwards compatbility and should not be mistaken as a
- * complete set of ECC information. The ioctl truncates the larger internal
- * structure to retain binary compatibility with the static declaration of the
- * ioctl. Note that the "MTD_MAX_..._ENTRIES" macros represent the max size of
- * the user struct, not the MAX size of the internal struct nand_ecclayout.
- */
-struct nand_ecclayout_user {
-	__u32 eccbytes;
-	__u32 eccpos[MTD_MAX_ECCPOS_ENTRIES];
-	__u32 oobavail;
-	struct nand_oobfree oobfree[MTD_MAX_OOBFREE_ENTRIES];
-};
-
-/**
- * struct mtd_ecc_stats - error correction stats
- *
- * @corrected:	number of corrected bits
- * @failed:	number of uncorrectable errors
- * @badblocks:	number of bad blocks in this partition
- * @bbtblocks:	number of blocks reserved for bad block tables
- */
-struct mtd_ecc_stats {
-	__u32 corrected;
-	__u32 failed;
-	__u32 badblocks;
-	__u32 bbtblocks;
-};
-
-/*
- * MTD file modes - for read/write access to MTD
- *
- * @MTD_FILE_MODE_NORMAL:	OTP disabled, ECC enabled
- * @MTD_FILE_MODE_OTP_FACTORY:	OTP enabled in factory mode
- * @MTD_FILE_MODE_OTP_USER:	OTP enabled in user mode
- * @MTD_FILE_MODE_RAW:		OTP disabled, ECC disabled
- *
- * These modes can be set via ioctl(MTDFILEMODE). The mode mode will be retained
- * separately for each open file descriptor.
- *
- * Note: %MTD_FILE_MODE_RAW provides the same functionality as %MTD_OPS_RAW -
- * raw access to the flash, without error correction or autoplacement schemes.
- * Wherever possible, the MTD_OPS_* mode will override the MTD_FILE_MODE_* mode
- * (e.g., when using ioctl(MEMWRITE)), but in some cases, the MTD_FILE_MODE is
- * used out of necessity (e.g., `write()', ioctl(MEMWRITEOOB64)).
- */
-enum mtd_file_modes {
-	MTD_FILE_MODE_NORMAL = MTD_OTP_OFF,
-	MTD_FILE_MODE_OTP_FACTORY = MTD_OTP_FACTORY,
-	MTD_FILE_MODE_OTP_USER = MTD_OTP_USER,
-	MTD_FILE_MODE_RAW,
-};
-
-#endif /* __MTD_ABI_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/firmware_upgrade_sysfs.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/firmware_upgrade_sysfs.c
deleted file mode 100644
index 10a429d93bde..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/firmware_upgrade_sysfs.c
+++ /dev/null
@@ -1,285 +0,0 @@
-#include <sys/stat.h>
-#include <sys/types.h>
-#include <errno.h>
-#include <unistd.h>
-#include <fcntl.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <stdint.h>
-#include <ctype.h>
-#include <string.h>
-#include <dirent.h>
-#include <linux/version.h>
-#include <stdlib.h>
-#include <unistd.h>
-#include <firmware_app.h>
-#include "firmware_upgrade_sysfs.h"
-
-static int firmware_sysfs_get_dev_info(int fd, firmware_dev_file_info_t *dev_info)
-{
-    int ret;
-
-    ret = ioctl(fd, FIRMWARE_SYSFS_DEV_FILE_INFO, dev_info);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Failed to get upg flash dev info.\n");
-        return ret;
-    }
-
-    dbg_print(is_debug_on, "sysfs_name=%s per_len=%u.\n", dev_info->sysfs_name, dev_info->per_len);
-    return 0;
-}
-
-/* sysfs upgrade program function */
-int firmware_upgrade_sysfs_program(firmware_dev_file_info_t *dev_info, uint32_t dev_base,
-        uint8_t *buf, uint32_t size)
-{
-    int ret = 0;
-    uint32_t offset_addr, buf_offset, len;
-    uint32_t write_len, cmp_retry, reread_len;
-    int sysfs_fd;
-    uint8_t *reread_buf;
-    int i;
-
-    if (dev_info->per_len > 0) {
-        if (size % dev_info->per_len) {
-            dbg_print(is_debug_on, "firmware sysfs upgrade size[%u] is width[%u] mismatch, ret %d.\n",
-                    size, dev_info->per_len, ret);
-            return FIRMWARE_FAILED;
-        }
-        len = dev_info->per_len;
-    } else {
-        /* Write to the maximum buffer if the length of each write is not configured */
-        len = size;
-    }
-
-    /* Read back data */
-    reread_buf = (uint8_t *) malloc(len);
-    if (reread_buf == NULL) {
-        dbg_print(is_debug_on, "Error: Failed to malloc memory for read back data buf, len=%u.\n", len);
-        return FIRMWARE_FAILED;
-    }
-
-    sysfs_fd = open(dev_info->sysfs_name, O_RDWR | O_SYNC);
-    if (sysfs_fd < 0) {
-        dbg_print(is_debug_on, "open file[%s] fail.\n", dev_info->sysfs_name);
-        free(reread_buf);
-        return FIRMWARE_FAILED;
-    }
-
-    offset_addr = dev_base;
-    buf_offset = 0;
-    cmp_retry = 0;
-    while (buf_offset < size) {
-        /* Calibrate upgrade data length */
-        if (buf_offset + len > size) {
-            len = size - buf_offset;
-        }
-
-        for (i = 0; i < FW_SYSFS_RETRY_TIME; i++) {
-            ret = lseek(sysfs_fd, offset_addr, SEEK_SET);
-            if (ret < 0) {
-                dbg_print(is_debug_on, "lseek file[%s offset=%u] fail.\n", dev_info->sysfs_name, offset_addr);
-                close(sysfs_fd);
-                free(reread_buf);
-                return FIRMWARE_FAILED;
-            }
-            write_len = write(sysfs_fd, buf + buf_offset, len);
-            if (write_len != len) {
-                dbg_print(is_debug_on, "write file[%s] fail,offset = 0x%x retrytimes = %u len = %u, write_len =%u\n",
-                    dev_info->sysfs_name, offset_addr, i ,len, write_len);
-                usleep(FW_SYSFS_RETRY_SLEEP_TIME);
-                continue;
-            }
-            break;
-        }
-
-        if (i == FW_SYSFS_RETRY_TIME) {
-            dbg_print(is_debug_on, "write file[%s] fail, offset = 0x%x, len = %u, write_len =%u\n",
-                dev_info->sysfs_name, offset_addr, len, write_len);
-            close(sysfs_fd);
-            free(reread_buf);
-            return FIRMWARE_FAILED;
-        }
-
-        mem_clear(reread_buf, len);
-        ret = lseek(sysfs_fd, offset_addr, SEEK_SET);
-        if (ret < 0) {
-            dbg_print(is_debug_on, "reread lseek file[%s offset=%u] fail.\n", dev_info->sysfs_name, offset_addr);
-            close(sysfs_fd);
-            free(reread_buf);
-            return FIRMWARE_FAILED;
-        }
-
-        for (i = 0; i < FW_SYSFS_RETRY_TIME; i++) {
-            reread_len = read(sysfs_fd, reread_buf, len);
-            if (reread_len != len) {
-                dbg_print(is_debug_on, "reread file[%s] fail,offset = 0x%x retrytimes = %u reread_len = %u, len =%u\n",
-                    dev_info->sysfs_name, offset_addr, i ,reread_len, len);
-                usleep(FW_SYSFS_RETRY_SLEEP_TIME);
-                continue;
-            }
-            break;
-        }
-        if (i == FW_SYSFS_RETRY_TIME) {
-            dbg_print(is_debug_on, "reread file[%s] fail, offset = 0x%x, reread_len = %u, len = %u\n",
-                dev_info->sysfs_name, offset_addr, reread_len, len);
-            close(sysfs_fd);
-            free(reread_buf);
-            return FIRMWARE_FAILED;
-        }
-
-        /* Check data */
-        if (memcmp(reread_buf, buf + buf_offset, len) != 0) {
-            if (cmp_retry < FW_SYSFS_RETRY_TIME) {
-                dbg_print(is_debug_on, "memcmp file[%s] fail,offset = 0x%x retrytimes = %u\n",
-                                    dev_info->sysfs_name, offset_addr, cmp_retry);
-                cmp_retry++;
-                continue;
-            }
-
-            dbg_print(is_debug_on, "upgrade file[%s] fail, offset = 0x%x.\n", dev_info->sysfs_name, offset_addr);
-            dbg_print(is_debug_on, "want to write buf :\n");
-            for (i = 0; i < len; i++) {
-                dbg_print(is_debug_on, "0x%x ", buf[buf_offset + i]);
-                if (((i + 1) % 16) == 0) {
-                    dbg_print(is_debug_on, "\n");
-                }
-            }
-            dbg_print(is_debug_on, "\n");
-
-            dbg_print(is_debug_on, "actually reread buf :\n");
-            for (i = 0; i < len; i++) {
-                dbg_print(is_debug_on, "0x%x ", reread_buf[i]);
-                if (((i + 1) % 16) == 0) {
-                    dbg_print(is_debug_on, "\n");
-                }
-            }
-            dbg_print(is_debug_on, "\n");
-
-            close(sysfs_fd);
-            free(reread_buf);
-            return FIRMWARE_FAILED;
-        }
-        offset_addr += len;
-        buf_offset += len;
-        usleep(5000);
-    }
-    free(reread_buf);
-
-    dbg_print(is_debug_on, "firmware upgrade sysfs success.\n");
-    close(sysfs_fd);
-    return FIRMWARE_SUCCESS;
-}
-
-/* sysfs upgrade function */
-int firmware_upgrade_sysfs(int fd, uint8_t *buf, uint32_t size, name_info_t *info)
-{
-    int ret = 0;
-    firmware_dev_file_info_t dev_info;
-
-    if ((buf == NULL) || (info == NULL)) {
-        dbg_print(is_debug_on, "Input invalid error.\n");
-        goto exit;
-    }
-
-    /* get sysfs information*/
-    ret = firmware_sysfs_get_dev_info(fd, &dev_info);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "firmware_sysfs_get_dev_info failed, ret %d.\n", ret);
-        goto exit;
-    }
-
-    /* enable upgrade access */
-    ret = ioctl(fd, FIRMWARE_SYSFS_INIT, NULL);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "init dev logic faile\n");
-        goto exit;
-    }
-
-    ret = firmware_upgrade_sysfs_program(&dev_info, dev_info.dev_base, buf, size);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "init dev logic faile\n");
-        goto fail;
-    }
-
-    dbg_print(is_debug_on, "firmware upgrade sysfs success.\n");
-    /* disable upgrade access */
-    ret = ioctl(fd, FIRMWARE_SYSFS_FINISH,NULL);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "close dev logic en failed.\n");
-    }
-    return FIRMWARE_SUCCESS;
-
-fail:
-    /* disable upgrade access */
-    ret = ioctl(fd, FIRMWARE_SYSFS_FINISH, NULL);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "close dev logic en failed.\n");
-    }
-exit:
-    dbg_print(is_debug_on, "firmware upgrade sysfs fail.\n");
-    return FIRMWARE_FAILED;
-}
-
-/* sysfs upgrade test function */
-int firmware_upgrade_sysfs_test(int fd, name_info_t *info)
-{
-    int ret, rv;
-    firmware_dev_file_info_t dev_info;
-    uint8_t *data_buf;
-    uint8_t num;
-    int j;
-
-    if (info == NULL) {
-        dbg_print(is_debug_on, "Input invalid error.\n");
-        return FIRMWARE_FAILED;
-    }
-
-    /* get sysfs information*/
-    ret = firmware_sysfs_get_dev_info(fd, &dev_info);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "firmware_sysfs_get_dev_info failed, ret %d.\n", ret);
-        return FIRMWARE_FAILED;
-    }
-
-    if (dev_info.test_size == 0) {
-        dbg_print(is_debug_on, "Error: get sysfs test size:%d, not support.\n", dev_info.test_size);
-        return FIRMWARE_NOT_SUPPORT;
-    }
-
-    data_buf = (uint8_t *) malloc(dev_info.test_size);
-    if (data_buf == NULL) {
-        dbg_print(is_debug_on, "Error: Failed to malloc memory for test data buf, size=%d.\n", dev_info.test_size);
-        return FIRMWARE_FAILED;
-    }
-
-    /* Get random data */
-    for (j = 0; j < dev_info.test_size; j++) {
-        num = (uint8_t) rand() % 256;
-        data_buf[j] = num & 0xff;
-    }
-
-    /* enable upgrade access */
-    ret = ioctl(fd, FIRMWARE_SYSFS_INIT, NULL);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "init dev logic faile\n");
-        free(data_buf);
-        return FIRMWARE_FAILED;
-    }
-
-    ret = firmware_upgrade_sysfs_program(&dev_info, dev_info.test_base, data_buf, dev_info.test_size);
-    /* disable upgrade access */
-    rv = ioctl(fd, FIRMWARE_SYSFS_FINISH,NULL);
-    if (rv < 0) {
-        dbg_print(is_debug_on, "close dev logic en failed.\n");
-    }
-    free(data_buf);
-
-    if (ret < 0) {
-        dbg_print(is_debug_on, "init dev logic faile\n");
-        return FIRMWARE_FAILED;
-    }
-
-    dbg_print(is_debug_on, "firmware upgrade sysfs success.\n");
-    return FIRMWARE_SUCCESS;
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/firmware_upgrade_sysfs.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/firmware_upgrade_sysfs.h
deleted file mode 100644
index b69080ea642e..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/firmware_upgrade_sysfs.h
+++ /dev/null
@@ -1,16 +0,0 @@
-#ifndef __FIRMWARE_UPGRADE_SYSFS_H__
-#define __FIRMWARE_UPGRADE_SYSFS_H__
-
-#define FIRMWARE_DEV_NAME_LEN          (64) /* the macro definition needs to same as FIRMWARE_DEV_NAME_LEN in firmware_sysfs_upgrade.h */
-#define FW_SYSFS_RETRY_SLEEP_TIME      (10000)   /* 10ms */
-#define FW_SYSFS_RETRY_TIME            (5)  /* retry 5 times, 50ms = FW_SYSFS_RETRY_TIME *FW_SYSFS_RETRY_SLEEP_TIME;  */
-
-typedef struct firmware_dev_file_info_s {
-    char sysfs_name[FIRMWARE_DEV_NAME_LEN];         /* sysfs name */
-    uint32_t dev_base;                                   /* device upgrade base address */
-    uint32_t per_len;                                    /* The length of bytes per operation */
-    uint32_t test_base;                                  /* Test device address */
-    uint32_t test_size;                                  /* Test flash size */
-} firmware_dev_file_info_t;
-
-#endif /* End of __FIRMWARE_UPGRADE_SYSFS_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/fw_upg_spi_logic_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/fw_upg_spi_logic_dev.c
deleted file mode 100644
index 7db3c1b7b6ec..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/fw_upg_spi_logic_dev.c
+++ /dev/null
@@ -1,1181 +0,0 @@
-#include <sys/stat.h>
-#include <sys/types.h>
-#include <errno.h>
-#include <unistd.h>
-#include <fcntl.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <ctype.h>
-#include <string.h>
-#include <dirent.h>
-#include <linux/version.h>
-#include <asm/byteorder.h>
-#include <stdint.h>
-#include <firmware_app.h>
-#include "fw_upg_spi_logic_dev.h"
-
-#define be32_to_cpus(p)  __be32_to_cpus(p)
-#define le32_to_cpus(p)  __le32_to_cpus(p)
-#define cpu_to_be32s(p)  __cpu_to_be32s(p)
-#define cpu_to_le32s(p)  __cpu_to_le32s(p)
-
-static void firmware_upgrade_printf_reg(uint8_t *buf, int buf_len, uint32_t offset_addr)
-{
-    int i, j, tmp;
-
-    j = offset_addr % 16;
-    tmp = j;
-    offset_addr -= j;
-    printf("\n            ");
-
-    for (i = 0; i < 16; i++) {
-        printf("%2x ", i);
-    }
-
-    for (i = 0; i < buf_len + j; i++) {
-        if ((i % 16) == 0) {
-            printf("\n0x%08x  ", offset_addr);
-            offset_addr = offset_addr + 16;
-        }
-        if (tmp) {
-            printf("   ");
-            tmp--;
-        } else {
-            printf("%02x ", buf[i-j]);
-        }
-    }
-
-    printf("\n");
-    return;
-}
-
-static int firmware_upgrade_get_spi_logic_info(int fd, firmware_spi_logic_upg_t *current_upg_priv)
-{
-    int ret;
-    firmware_spi_logic_info_t syfs_info;
-
-    if (fd < 0) {
-        dbg_print(is_debug_on, "Error: get spi logic info fd %d.\n", fd);
-        return fd;
-    }
-
-    ret = 0;
-    ret = ioctl(fd, FIRMWARE_SYSFS_SPI_INFO, &syfs_info);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Failed to get upg flash dev info, ret=%d\n", ret);
-        return -FW_SPI_FLASH_GET_INFO_ERR;
-    }
-
-    current_upg_priv->flash_base          = syfs_info.flash_base;
-    current_upg_priv->ctrl_base           = syfs_info.ctrl_base;
-    memcpy(current_upg_priv->dev_path, syfs_info.logic_dev_name, FIRMWARE_LOGIC_DEV_NAME_LEN - 1);
-    current_upg_priv->status_reg          = syfs_info.ctrl_base + FPGA_UPG_STATUS_REG;
-    current_upg_priv->spi_ctrl_reg        = syfs_info.ctrl_base + FPGA_UPG_SPI_CTRL_REG;
-    current_upg_priv->wr_flash_status_reg = syfs_info.ctrl_base + FPGA_UPG_WR_FLASH_STATUS_REG;
-    current_upg_priv->rd_flash_status_reg = syfs_info.ctrl_base + FPGA_UPG_RD_FLASH_STATUS_REG;
-    current_upg_priv->instruction_reg     = syfs_info.ctrl_base + FPGA_UPG_INSTRUCTION_REG;
-    current_upg_priv->addr_reg            = syfs_info.ctrl_base + FPGA_UPG_ADDR_REG;
-    current_upg_priv->length_reg          = syfs_info.ctrl_base + FPGA_UPG_LENGTH_REG;
-    current_upg_priv->device_id_reg       = syfs_info.ctrl_base + FPGA_UPG_DEVICE_ID_REG;
-    current_upg_priv->drop_reg_num_reg    = syfs_info.ctrl_base + FPGA_UPG_DROP_REQ_NUM_REG;
-    current_upg_priv->test_base           = syfs_info.test_base;
-    current_upg_priv->test_size           = syfs_info.test_size;
-
-    return 0;
-}
-
-static int firmware_upgrade_spi_logic_init(int fd)
-{
-    int ret;
-
-    ret = 0;
-    ret = ioctl(fd, FIRMWARE_SYSFS_INIT, NULL);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Failed to init spi logic, ret=%d\n", ret);
-        return -1;
-    }
-
-    return 0;
-}
-
-static int firmware_upgrade_spi_logic_finish(int fd)
-{
-    int ret;
-
-    if (fd < 0) {
-        dbg_print(is_debug_on, "Error: get spi logic info fd %d.\n", fd);
-        return -1;
-    }
-
-    ret = 0;
-    ret = ioctl(fd, FIRMWARE_SYSFS_FINISH, NULL);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Failed to release spi logic, ret=%d\n", ret);
-        return -1;
-    }
-
-    return 0;
-}
-
-/**
- * firmware_fpga_file_read -
- * function:Provide FPGA read-register interface (address must be 4-byte aligned)
- * @dev_name: Device file descriptor
- * @offset: device offset
- * @buf:  Read Data Buffer
- * @rd_len:  Read Data Length
- * return: 0--success; other--fail
- */
-int firmware_fpga_file_read(char *dev_name, uint32_t offset, uint8_t *buf, uint32_t rd_len)
-{
-    int ret, fd;
-
-    if ((dev_name == NULL) || (buf == NULL)) {
-        dbg_print(is_debug_on, "upg_priv or read buf is null.\n");
-        return -1;
-    }
-
-    if ((fd = open(dev_name, O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO)) < 0) {
-        dbg_print(is_debug_on, "Error: Could not open file %s. Errno=%d\n", dev_name, errno);
-        return -1;
-    }
-
-    ret = lseek(fd, offset, SEEK_SET);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "read llseek failed, errno: %s\n", strerror(errno));
-        close(fd);
-        return -1;
-    }
-
-    ret = read(fd, buf, rd_len);
-    if (ret  < 0) {
-        dbg_print(is_debug_on, "read failed, err: %s\n", strerror(errno));
-        close(fd);
-        return -1;
-    }
-
-    close(fd);
-    return 0;
-}
-
-static int firmware_fpga_read_word(char *dev_name, uint32_t addr, uint32_t *val)
-{
-    int ret;
-    uint32_t retry;
-
-    if (sizeof(int) < FIRMWARE_FPGA_WORD_LEN) {
-        dbg_print(is_debug_on, "Error:dfd_fpga_read_word buf len %ld support len %d.\n",
-                sizeof(int), FIRMWARE_FPGA_WORD_LEN);
-        return -1;
-    }
-
-    retry = 0;
-    *val = 0;
-    while(retry < FIRMWARE_FPGA_UPG_RETRY_CNT) {
-        ret = firmware_fpga_file_read(dev_name, addr, (uint8_t *)val, FIRMWARE_FPGA_WORD_LEN);
-        if (ret) {
-            retry++;
-            dbg_print(is_debug_on, "firmware_fpga_file_read addr 0x%x retry %u failed ret %d.\n",
-                addr, retry, ret);
-            continue;
-        } else {
-            le32_to_cpus(val);
-            return 0;
-        }
-    }
-
-    dbg_print(is_debug_on, "dfd_fpga_read_word addr 0x%x retry %u failed ret %d.\n", addr, retry, ret);
-    return -1;
-}
-
-static int firmware_fpga_read_buf(char *dev_name, uint32_t addr, uint8_t *buf, uint32_t rd_len)
-{
-    int ret;
-    uint32_t retry;
-
-    retry = 0;
-    while(retry < FIRMWARE_FPGA_UPG_RETRY_CNT) {
-        ret = firmware_fpga_file_read(dev_name, addr, buf, rd_len);
-        if (ret) {
-            retry++;
-            dbg_print(is_debug_on, "firmware_fpga_file_read addr 0x%x rd_len %u i %d failed ret %d.\n",
-                    addr, rd_len, retry, ret);
-            continue;
-        } else {
-            return 0;
-        }
-    }
-
-    dbg_print(is_debug_on, "firmware_fpga_file_read addr 0x%x rd_len %u retry %u failed ret %d.\n",
-            addr, rd_len, retry, ret);
-    return -1;
-}
-
-/**
- * firmware_fpga_file_write -
- * function:Provide FPGA write-register interface (address must be 4-byte aligned)
- * @dev_name: Device file descriptor
- * @offset: device offset
- * @buf:  Write Data Buffer
- * @wr_len:  Write Data Length
- * return: 0--success; other--fail
- */
-int firmware_fpga_file_write(char *dev_name, uint32_t offset, uint8_t *buf, uint32_t wr_len)
-{
-    int ret, fd;
-
-    if ((dev_name == NULL) || (buf == NULL)) {
-        dbg_print(is_debug_on, "dev_name or write buf is null.\n");
-        return -1;
-    }
-
-    if ((fd = open(dev_name, O_RDWR, S_IRWXU | S_IRWXG | S_IRWXO)) < 0) {
-        dbg_print(is_debug_on, "Error: Could not open file %s. Errno=%d\n", dev_name, errno);
-        return -1;
-    }
-
-    ret = lseek(fd, offset, SEEK_SET);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "write llseek failed, err: %s\n", strerror(errno));
-        close(fd);
-        return -1;
-    }
-
-    ret = write(fd, buf, wr_len);
-    if (ret < 0 ) {
-        dbg_print(is_debug_on, "write failed, err: %s\n", strerror(errno));
-        close(fd);
-        return -1;
-    }
-
-    close(fd);
-    return 0;
-}
-
-static int firmware_fpga_write_word(char *dev_name, uint32_t addr, uint32_t val)
-{
-    int ret;
-    uint32_t retry, tmp;
-
-    retry = 0;
-    tmp = val;
-    cpu_to_le32s(&tmp);
-    while(retry < FIRMWARE_FPGA_UPG_RETRY_CNT) {
-        ret = firmware_fpga_file_write(dev_name, addr, (uint8_t *)&tmp, FIRMWARE_FPGA_WORD_LEN);
-        if (ret) {
-            retry++;
-            dbg_print(is_debug_on, "firmware_fpga_file_write addr 0x%x val 0x%x retry %u failed ret %d.\n",
-                addr, val, retry, ret);
-            continue;
-        } else {
-            return 0;
-        }
-    }
-
-    dbg_print(is_debug_on, "firmware_fpga_file_write addr 0x%x val 0x%x retry %u failed ret %d.\n",
-        addr, val, retry, ret);
-    return -1;
-}
-
-static int firmware_fpga_write_buf(char *dev_name, uint32_t addr, uint8_t *buf, uint32_t wr_len)
-{
-    int ret;
-    uint32_t retry;
-
-    retry = 0;
-    while(retry < FIRMWARE_FPGA_UPG_RETRY_CNT) {
-        ret = firmware_fpga_file_write(dev_name, addr, buf, wr_len);
-        if (ret) {
-            retry++;
-            dbg_print(is_debug_on, "firmware_fpga_file_write addr 0x%x wr_len 0x%x retry %u failed ret %d.\n",
-                addr, wr_len, retry, ret);
-            continue;
-        } else {
-            return 0;
-        }
-    }
-
-    dbg_print(is_debug_on, "dfd_fpga_buf_write addr 0x%x wr_len 0x%x retry %u failed ret %d.\n",
-        addr, wr_len, retry, ret);
-
-    return -1;
-}
-
-/* Whether the SPI port is idle, 0--idle, 1--busy */
-static int firmware_fpga_get_status(firmware_spi_logic_upg_t *upg_priv, char *status)
-{
-    int ret;
-    uint32_t addr, val;
-
-    addr = upg_priv->status_reg;
-    ret = firmware_fpga_read_word(upg_priv->dev_path, addr, &val);
-    if (ret) {
-        dbg_print(is_debug_on, "firmware_fpga_get_status addr 0x%x failed ret %d.\n", addr, ret);
-        return -1;
-    }
-
-    *status = val & FPGA_UPG_STATUS_MASK;
-
-    return 0;
-}
-
-/* Wait for the SPI port to become free again */
-static int firmware_fpga_wait_ready(firmware_spi_logic_upg_t *upg_priv)
-{
-    int timeout;
-    char status;
-    int ret;
-
-    timeout = FIRMWARE_UPG_RETRY_TIME_CNT;
-    while (timeout--) {
-        usleep(FIRMWARE_UPG_RETRY_SLEEP_TIME);
-        ret = firmware_fpga_get_status(upg_priv, &status);
-        if (ret) {
-            dbg_print(is_debug_on, "firmware_fpga_get_status failed ret %d.\n", ret);
-            continue;
-        }
-
-        /* Determine if it's idle */
-        if (!status) {
-            return 0;
-        }
-    }
-
-    return -1;
-}
-
-/* Configure access */
-static int firmware_fpga_set_access(firmware_spi_logic_upg_t *upg_priv, uint32_t cmd)
-{
-    int ret;
-    uint32_t addr, val;
-
-    addr = upg_priv->instruction_reg;
-    val = cmd;
-    ret = firmware_fpga_write_word(upg_priv->dev_path, addr, val);
-    if (ret) {
-        dbg_print(is_debug_on, "firmware_fpga_write_word addr 0x%x val 0x%x failed ret %d.\n", addr, val, ret);
-        return -1;
-    }
-
-    addr = upg_priv->spi_ctrl_reg;
-    val = FPGA_UPG_ACCESS_ENABLE;
-    ret = firmware_fpga_write_word(upg_priv->dev_path, addr, val);
-    if (ret) {
-        dbg_print(is_debug_on, "firmware_fpga_write_word addr 0x%x val 0x%x failed ret %d.\n", addr, val, ret);
-        return -1;
-    }
-
-    /* Wait for the SPI port on the FPGA to become free again*/
-    ret = firmware_fpga_wait_ready(upg_priv);
-    if (ret) {
-        dbg_print(is_debug_on,"firmware_fpga_wait_ready failed ret %d.\n", ret);
-        return -FW_SPI_FLASH_BUSY;
-    }
-
-    return 0;
-}
-
-/* Get SPI STATUS register */
-static int firmware_fpga_get_spi_status(firmware_spi_logic_upg_t *upg_priv, char *status)
-{
-    int ret;
-    uint32_t val, addr, cmd;
-
-    cmd = FPGA_UPG_INSTRUTION_RDSR;
-    ret = firmware_fpga_set_access(upg_priv, cmd);
-    if (ret) {
-        dbg_print(is_debug_on, "firmware_fpga_set_access cmd 0x%x failed ret %d.\n", cmd, ret);
-        return -1;
-    }
-
-    addr = upg_priv->rd_flash_status_reg;
-    ret = firmware_fpga_read_word(upg_priv->dev_path, addr, &val);
-    if (ret) {
-        dbg_print(is_debug_on, "firmware_fpga_read_word addr 0x%x failed ret %d.\n", addr, ret);
-        return -1;
-    }
-
-    *status = val & FPGA_UPG_SPI_STATUS_MASK;
-
-    return 0;
-}
-
-/* Wait for the SPI chip operation to complete */
-static int firmware_fpga_wait_spi_ready(firmware_spi_logic_upg_t *upg_priv,
-    uint32_t timeout, uint32_t usleep_time)
-{
-    char status;
-    int ret;
-
-    while (timeout--) {
-        usleep(usleep_time);
-        ret = firmware_fpga_get_spi_status(upg_priv, &status);
-        if (ret) {
-            dbg_print(is_debug_on, "firmware_fpga_get_spi_status failed ret %d.\n", ret);
-            continue;
-        }
-        /* Determine if it's idle */
-        if (!status) {
-            return 0;
-        }
-    }
-
-    return -FW_SPI_FLASH_SPI_BUSY;
-}
-
-/* Configure FPGA upgrade write enable */
-static int firmware_fpga_set_wr_enable(firmware_spi_logic_upg_t *upg_priv)
-{
-    int ret;
-    uint32_t cmd;
-
-    cmd = FPGA_UPG_INSTRUTION_WREN;
-    ret = firmware_fpga_set_access(upg_priv, cmd);
-    if (ret) {
-        dbg_print(is_debug_on, "firmware_fpga_set_access cmd %d failed ret %d.\n", cmd, ret);
-        return -1;
-    }
-
-    return 0;
-}
-
-#if 0
-/* erase all flash */
-static int firmware_fpga_upg_set_erase_all(firmware_spi_logic_upg_t *upg_priv)
-{
-    int ret;
-    int cmd;
-
-    /* Wait for the SPI port on the FPGA to become free */
-    ret = firmware_fpga_wait_ready(upg_priv);
-    if (ret) {
-        dbg_print(is_debug_on, "firmware_fpga_wait_ready failed ret %d.\n", ret);
-        return -1;
-    }
-
-    /* Configure FPGA upgrade write enable */
-    ret = firmware_fpga_set_wr_enable(upg_priv);
-    if (ret) {
-        dbg_print(is_debug_on, "firmware_fpga_set_wr_enable failed ret %d.\n", ret);
-        return -1;
-    }
-
-    cmd = FPGA_UPG_INSTRUTION_BE;
-    ret = firmware_fpga_set_access(upg_priv, cmd);
-    if (ret) {
-        dbg_print(is_debug_on, "firmware_fpga_set_access cmd %d failed ret %d.\n", cmd, ret);
-        return -1;
-    }
-
-    /* Hardware requirements, delay of 1s */
-    sleep(1);
-
-    /* Wait for the SPI chip operation to complete, 1s check status once, max delay 300s */
-    ret = firmware_fpga_wait_spi_ready(upg_priv, 300, (1 * 1000 * 1000));
-    if (ret) {
-        dbg_print(is_debug_on, "dfd_fpga_wait_spi_ready failed ret %d.\n", ret);
-        return -1;
-    }
-
-    dbg_print(is_debug_on, "Success.\n");
-    return 0;
-}
-#endif
-
-/* Erase sectors (256 pages, 64K total) */
-static int firmware_fpga_erase_sector(firmware_spi_logic_upg_t *upg_priv, uint32_t spi_addr)
-{
-    int ret;
-    uint32_t val, addr, cmd;
-
-    /* Wait for the SPI port on the FPGA to become free again */
-    ret = firmware_fpga_wait_ready(upg_priv);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "firmware_fpga_wait_ready failed ret %d.\n", ret);
-        return -FW_SPI_FLASH_BUSY;
-    }
-
-    /* Enable write */
-    ret = firmware_fpga_set_wr_enable(upg_priv);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "firmware_fpga_set_wr_enable failed ret %d.\n", ret);
-        return -FW_SPI_FLASH_WR_ENABLE_ERR;
-    }
-
-    /* Write erase address */
-    val = spi_addr;
-    addr = upg_priv->addr_reg;
-    ret = firmware_fpga_write_word(upg_priv->dev_path, addr, val);
-    if (ret) {
-        dbg_print(is_debug_on, "firmware_fpga_write_word addr 0x%x val 0x%x failed ret %d.\n", addr, val, ret);
-        return -FW_SPI_FLASH_ERASE_ADDR_ERR;
-    }
-
-    /* Enable sector erasure */
-    cmd = FPGA_UPG_INSTRUTION_SE;
-    ret = firmware_fpga_set_access(upg_priv, cmd);
-    if (ret) {
-        dbg_print(is_debug_on, "firmware_fpga_set_access cmd %d failed ret %d.\n", cmd, ret);
-        return -FW_SPI_FLASH_ERASE_SECTOR_ERR;
-    }
-
-    /* Hardware requirements, delay of 0.25s */
-    usleep(250 * 1000);
-
-    /* Wait for the SPI chip operation to complete, 1s check status once, max delay 10s */
-    ret = firmware_fpga_wait_spi_ready(upg_priv, FPGA_UPG_WAIT_SPI_RETRY_CNT, (100 * 1000));
-    if (ret) {
-        dbg_print(is_debug_on, "firmware_fpga_wait_spi_ready failed ret %d.\n", ret);
-        return -FW_SPI_FLASH_SPI_BUSY;
-    }
-
-    return 0;
-}
-
-#if 0
-int firmware_fpga_erase64_sector(firmware_spi_logic_upg_t *upg_priv, int offset)
-{
-    int ret;
-    ret = -1;
-
-    if ((offset % FIRMWARE_SPI_LOGIC_SECTOR_SIZE) == 0) {
-        dbg_print(is_debug_on, "erase 64k area, offset 0x%x.\n", offset);
-        ret = firmware_fpga_erase_sector(upg_priv, offset);
-        if (ret) {
-            dbg_print(is_debug_on, "firmware_fpga_erase_sector offset 0x%x failed ret %d.\n", offset, ret);
-            return ret;
-        }
-    } else {
-        dbg_print(is_debug_on, "Input para invalid, offset 0x%x.\n", offset);
-    }
-
-    return ret;
-}
-#endif
-
-static int firmware_fpga_upg_program(firmware_spi_logic_upg_t *upg_priv,
-    uint32_t spi_addr, uint8_t *buf, uint32_t len)
-{
-    int ret;
-    uint32_t addr, val, cmd, wr_len;
-
-    /* Write data to the Upgrade Content Register */
-    addr = upg_priv->ctrl_base;
-    wr_len = len;
-    ret = firmware_fpga_write_buf(upg_priv->dev_path, addr, (uint8_t*)buf, wr_len);
-    if (ret) {
-        dbg_print(is_debug_on,"firmware_fpga_write_buf addr 0x%x wr_len %d failed ret %d.\n",
-                    addr, len, ret);
-        return -FW_SPI_FLASH_WR_ERR;
-    }
-
-    /* Write length register, FPGA is fixed 256 lengths */
-    val = FFPGA_UPG_DATA_SIZE;
-    addr = upg_priv->length_reg;
-    ret = firmware_fpga_write_word(upg_priv->dev_path, addr, val);
-    if (ret) {
-        dbg_print(is_debug_on,"firmware_fpga_write_word addr 0x%x val 0x%x failed ret %d.\n",
-                addr, val, ret);
-        return -FW_SPI_FLASH_WR_LENGTH_ERR;
-    }
-
-    /* Write address register */
-    val = spi_addr;
-    addr = upg_priv->addr_reg;
-    ret = firmware_fpga_write_word(upg_priv->dev_path, addr, val);
-    if (ret) {
-        dbg_print(is_debug_on,"firmware_fpga_write_word addr 0x%x val 0x%x failed ret %d.\n",
-                addr, val, ret);
-        return -FW_SPI_FLASH_WR_ADDR_ERR;
-    }
-
-    /* Start writing upgrade data to SPI */
-    cmd = FPGA_UPG_INSTRUTION_PP;
-    ret = firmware_fpga_set_access(upg_priv, cmd);
-    if (ret) {
-        dbg_print(is_debug_on,"firmware_fpga_set_access cmd %d failed ret %d.\n", cmd, ret);
-        return -FW_SPI_FLASH_SET_ACCESS_ERR;
-    }
-
-    /* min write wait 0.33ms */
-    usleep(330);
-
-    /* Wait for the SPI chip operation to complete, 100us check status once, max delay 10ms */
-    ret = firmware_fpga_wait_spi_ready(upg_priv, FPGA_UPG_WAIT_SPI_RETRY_CNT, (100));
-    if (ret) {
-        dbg_print(is_debug_on,"firmware_fpga_wait_spi_ready failed ret %d.\n", ret);
-        return -FW_SPI_FLASH_BUSY;
-    }
-
-    return 0;
-}
-
-/**
- * firmware_fpga_upg_write
- * function: write interface provided to the upgrade module
- * @upg_priv: Device information
- * @addr: upgrade addr
- * @buf:  Write Data Buffer
- * @len:  Write Data Length
- * return: 0--success; other--fail
- */
-static int firmware_fpga_upg_write(firmware_spi_logic_upg_t *upg_priv,
-    uint32_t addr, uint8_t *buf, uint32_t len)
-{
-    int ret;
-
-    /* address must be 256 bytes aligned */
-    if ((upg_priv == NULL) || (buf == NULL) || (addr & 0xff) || (len > 256)) {
-        dbg_print(is_debug_on,"Input para invalid upg_priv %p buf %p addr 0x%x len %u.\n",
-                upg_priv, buf, addr, len);
-        return -FW_SPI_FLASH_PARAM_ERR;
-    }
-
-    /* Wait for the SPI port on the FPGA to become free again*/
-    ret = firmware_fpga_wait_ready(upg_priv);
-    if (ret) {
-        dbg_print(is_debug_on,"firmware_fpga_wait_ready failed ret %d.\n", ret);
-        return -FW_SPI_FLASH_BUSY;
-    }
-
-    /* Configure write enable */
-    ret = firmware_fpga_set_wr_enable(upg_priv);
-    if (ret) {
-        dbg_print(is_debug_on,"firmware_fpga_set_wr_enable failed ret %d.\n", ret);
-        return -FW_SPI_FLASH_WR_ENABLE_ERR;
-    }
-
-    /* Write upgrade data */
-    ret = firmware_fpga_upg_program(upg_priv, addr, buf, len);
-    if (ret) {
-        dbg_print(is_debug_on,"dfd_fpga_upg_program addr 0x%x len %u failed ret %d.\n", addr, len, ret);
-        return -FW_SPI_FLASH_UPG_ERR;
-    }
-
-    return 0;
-}
-
-static int firmware_fpga_fast_read(firmware_spi_logic_upg_t *upg_priv,
-    uint32_t spi_addr, uint8_t *buf, uint32_t len)
-{
-    int ret;
-    uint32_t val, addr, cmd;
-
-    /* Clear register value */
-    addr = upg_priv->ctrl_base;
-    ret = firmware_fpga_write_buf(upg_priv->dev_path, addr, buf, len);
-    if (ret) {
-        dbg_print(is_debug_on, "firmware_fpga_write_buf addr 0x%x len %d failed ret %d.\n", addr, len, ret);
-        return -FW_SPI_FLASH_WR_ERR;
-    }
-    /* Write length register */
-    val = FFPGA_UPG_DATA_SIZE;
-    addr = upg_priv->length_reg;
-    ret = firmware_fpga_write_word(upg_priv->dev_path, addr, val);
-    if (ret) {
-        dbg_print(is_debug_on, "firmware_fpga_write_word addr 0x%x val 0x%x failed ret %d.\n",
-                addr, val, ret);
-        return -FW_SPI_FLASH_WR_LENGTH_ERR;
-    }
-
-    /* Write address register */
-    val = spi_addr;
-    addr = upg_priv->addr_reg;
-    ret = firmware_fpga_write_word(upg_priv->dev_path, addr, val);
-    if (ret) {
-        dbg_print(is_debug_on, "firmware_fpga_write_word addr 0x%x val 0x%x failed ret %d.\n",
-                    addr, val, ret);
-        return -FW_SPI_FLASH_WR_ADDR_ERR;
-    }
-
-    /* Start reading SPI data */
-    cmd = FPGA_UPG_INSTRUTION_FR;
-    ret = firmware_fpga_set_access(upg_priv, cmd);
-    if (ret) {
-        dbg_print(is_debug_on, "firmware_fpga_set_access cmd %d failed ret %d.\n", cmd, ret);
-        return -FW_SPI_FLASH_SET_ACCESS_ERR;
-    }
-
-    /* Read the upgraded content register to the buffer,
-     * FPGA only supports 4 bytes of read and write */
-    addr = upg_priv->ctrl_base;
-    ret = firmware_fpga_read_buf(upg_priv->dev_path, addr, (uint8_t*)buf, len);
-    if (ret) {
-        dbg_print(is_debug_on, "firmware_fpga_read_buf addr 0x%x len %d failed ret %d.\n", addr, len, ret);
-        return -FW_SPI_FLASH_RD_ERR;
-    }
-
-    return 0;
-}
-
-/**
- * firmware_fpga_upg_read
- * function: read interface provided to the upgrade module
- * @upg_priv: Device information
- * @addr: upgrade addr
- * @buf:  Read Data Buffer
- * @len:  Read Data Length
- * return: 0--success; other--fail
- */
-static int firmware_fpga_upg_read(firmware_spi_logic_upg_t *upg_priv,
-    uint32_t addr, uint8_t *buf, uint32_t len)
-{
-    int ret;
-
-    /* address must be 256 bytes aligned */
-    if ((upg_priv == NULL) || (buf == NULL) || (addr & 0xff) || (len > 256)) {
-        dbg_print(is_debug_on, "Input para invalid upg_priv %p buf %p addr 0x%x len %u.\n",
-                upg_priv, buf, addr, len);
-        return -FW_SPI_FLASH_PARAM_ERR;
-    }
-
-    /* Wait for the SPI port on the FPGA to become free again */
-    ret = firmware_fpga_wait_ready(upg_priv);
-    if (ret) {
-        dbg_print(is_debug_on, "firmware_fpga_wait_ready failed ret %d.\n", ret);
-        return -FW_SPI_FLASH_BUSY;
-    }
-
-    /* Configure write enable */
-    ret = firmware_fpga_set_wr_enable(upg_priv);
-    if (ret) {
-        dbg_print(is_debug_on, "firmware_fpga_set_wr_enable failed ret %d.\n", ret);
-        return -FW_SPI_FLASH_WR_ENABLE_ERR;
-    }
-
-    /* Read upgrade data */
-    ret = firmware_fpga_fast_read(upg_priv, addr, buf, len);
-    if (ret) {
-        dbg_print(is_debug_on, "firmware_fpga_fast_read addr 0x%x len %u failed ret %d.\n", addr, len, ret);
-        return -FW_SPI_FLASH_RD_ERR;
-    }
-
-    return 0;
-
-}
-
-static int firmware_upgreade_fpga_onetime(firmware_spi_logic_upg_t *upg_priv,
-        uint32_t flash_base, uint8_t *buf, uint32_t size)
-{
-    uint32_t offset, len, flash_addr, retry;
-    int ret, res;
-    uint8_t rbuf[FFPGA_UPG_DATA_SIZE];
-
-    offset = 0;
-    while(offset < size) {
-        flash_addr = flash_base + offset;
-        /* Erases a sector */
-        if ((flash_addr % FIRMWARE_SPI_LOGIC_SECTOR_SIZE) == 0) {
-            ret = firmware_fpga_erase_sector(upg_priv, flash_addr);
-            if (ret < 0) {
-                dbg_print(is_debug_on, "firmware_fpga_erase_sector flash_addr 0x%x failed ret %d.\n",
-                        flash_addr, ret);
-                goto exit;
-            }
-        }
-
-        if (size > FFPGA_UPG_DATA_SIZE) {
-            len = FFPGA_UPG_DATA_SIZE;
-        } else {
-            len = size;
-        }
-
-        /* first, Write data */
-        ret = firmware_fpga_upg_write(upg_priv, flash_addr, buf + offset, len);
-        if (ret) {
-            dbg_print(is_debug_on, "firmware_fpga_upg_write addr 0x%x len 0x%x failed ret %d.\n",
-                    flash_addr, len, ret);
-            ret = -FW_SPI_FLASH_UPG_ERR;
-            goto exit;
-        }
-
-        /* Read back the data and compare the correctness of the data */
-        for (retry = 0; retry < FPGA_UPG_RETRY_TIMES; retry++) { /*retry 3 times*/
-            mem_clear(rbuf, len);
-            ret = firmware_fpga_upg_read(upg_priv, flash_addr, rbuf, len);
-            res = memcmp(rbuf, buf + offset, len);
-            if (ret || res) {
-                usleep(1000);
-                continue;
-            }
-            break;
-        }
-
-         if (ret) {
-            dbg_print(is_debug_on, "firmware fpga read offset 0x%x len 0x%x failed ret %d.\n", flash_addr, len, ret);
-            ret = -FW_SPI_FLASH_RD_ERR;
-            goto exit;
-        }
-
-        if (res) {
-            dbg_print(is_debug_on, "firmware fpga rbuf wbuf not equal, len 0x%x, check failed.\n", len);
-            ret = -FW_SPI_FLASH_DATA_CMP_ERR;
-            goto exit;
-        }
-        offset += len;
-    }
-
-    dbg_print(is_debug_on, "Update success.\n");
-    return FIRMWARE_SUCCESS;
-exit:
-    dbg_print(is_debug_on, "Update failed.\n");
-    return FIRMWARE_FAILED;
-}
-
-static int firmware_upgrade_do_spi_logic(firmware_spi_logic_upg_t *current_upg_priv,
-        unsigned char *buf, uint32_t size)
-{
-    int i, ret;
-    uint32_t retry;
-
-    i = 0;
-    retry = FIRMWARE_SPI_LOGIC_UPG_RETRY_CNT;
-
-    ret = 0;
-    while(i < retry) {
-        ret = firmware_upgreade_fpga_onetime(current_upg_priv, current_upg_priv->flash_base, buf, size);
-        if (ret) {
-            i++;
-            dbg_print(is_debug_on, "firmware_upgreade_fpga_onetime size 0x%x failed ret %d.\n", size, ret);
-            continue;
-        } else {
-            dbg_print(is_debug_on, "firmware_upgreade_fpga_onetime success.\n");
-            return 0;
-        }
-    }
-
-    return ret;
-}
-
-/*
- * firmware_upgrade_spi_logic_dev
- * function: FPGA SPI FLASH Firmware upgrade handler function
- * @fd:   param[in] sysfs device descriptor
- * @buf:  param[in] Update data
- * @size: param[in] Update data size
- * @info: param[in] Upgrade file information
- * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-int firmware_upgrade_spi_logic_dev(int fd, uint8_t *buf, uint32_t size, name_info_t *info)
-{
-    int ret;
-    firmware_spi_logic_upg_t current_upg_priv;
-
-    if ((fd < 0) || (buf == NULL) || (info == NULL)) {
-        dbg_print(is_debug_on, "Error:firmware upgrade spi logic dev parameters failed.\n");
-        return FIRMWARE_FAILED;
-    }
-
-    /* Gets the current logical device information */
-    mem_clear(&current_upg_priv, sizeof(firmware_spi_logic_upg_t));
-    ret = firmware_upgrade_get_spi_logic_info(fd, &current_upg_priv);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Error:firmware_upgrade_get_spi_logic_info failed ret %d.\n", ret);
-        return FIRMWARE_FAILED;
-    }
-
-    dbg_print(is_debug_on, "current_upg_priv dev_path[%s] flash_base[0x%0x] ctrl_base[0x%0x]\n",
-                current_upg_priv.dev_path, current_upg_priv.flash_base,
-                current_upg_priv.ctrl_base);
-
-    /* Enable upgrade access */
-    ret = firmware_upgrade_spi_logic_init(fd);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Error:firmware_upgrade_spi_logic_init failed ret %d.\n", ret);
-        return FIRMWARE_FAILED;
-    }
-
-    /* Upgrade logic device */
-    ret = firmware_upgrade_do_spi_logic(&current_upg_priv, buf, size);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Error:firmware_upgrade_do_spi_logic failed ret %d.\n", ret);
-        goto fail;
-    }
-
-    /* disable upgrade access */
-    ret = firmware_upgrade_spi_logic_finish(fd);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Error:firmware_upgrade_spi_logic_finish failed ret %d.\n", ret);
-    }
-
-    return FIRMWARE_SUCCESS;
-fail:
-    /* disable upgrade access */
-    ret = firmware_upgrade_spi_logic_finish(fd);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Error:firmware_upgrade_spi_logic_finish failed ret %d.\n", ret);
-    }
-
-    return FIRMWARE_FAILED;
-}
-
-int firmware_fpga_upgrade_test(firmware_spi_logic_upg_t *current_upg_priv)
-{
-    int ret, i, j, num;
-    uint8_t *wbuf;
-    uint32_t retry;
-
-    ret = FW_SPI_FLASH_RV_OK;
-    wbuf = (uint8_t *) malloc(current_upg_priv->test_size);
-    if (wbuf == NULL) {
-        dbg_print(is_debug_on, "Error: Failed to malloc memory for test data buf, size=0x%x.\n", current_upg_priv->test_size);
-        ret = -FW_SPI_FLASH_NOT_SUPPORT_TEST;
-        goto exit;
-    }
-    mem_clear(wbuf, current_upg_priv->test_size);
-    /* Get random data */
-    for (j = 0; j < current_upg_priv->test_size; j++) {
-        num = rand() % 256;
-        wbuf[j] = num & 0xff;
-    }
-
-    i = 0;
-    retry = FIRMWARE_SPI_LOGIC_UPG_RETRY_CNT;
-
-    ret = 0;
-    while(i < retry) {
-        ret = firmware_upgreade_fpga_onetime(current_upg_priv, current_upg_priv->test_base, wbuf, current_upg_priv->test_size);
-        if (ret) {
-            i++;
-            dbg_print(is_debug_on, "firmware_upgreade_fpga_onetime test size 0x%x failed ret %d.\n",
-                        current_upg_priv->test_size, ret);
-            continue;
-        } else {
-            dbg_print(is_debug_on, "firmware_upgreade_fpga_onetime test success.\n");
-            break;
-        }
-    }
-    free(wbuf);
-exit:
-    return ret;
-}
-
-/*
- * firmware_upgrade_spi_logic_dev_test
- * function: FPGA SPI FLASH Firmware upgrade test handler function
- * @fd:   param[in] sysfs device descriptor
- * @buf:  param[in] Update data
- * @size: param[in] Update data size
- * @info: param[in] Upgrade file information
- * return value : success--FIRMWARE_SUCCESS; fail--FIRMWARE_FAILED
- */
-int firmware_upgrade_spi_logic_dev_test(int fd, name_info_t *info)
-{
-    int ret;
-    firmware_spi_logic_upg_t current_upg_priv;
-
-    if ((fd < 0) || (info == NULL)) {
-        dbg_print(is_debug_on, "Error:firmware upgrade spi logic dev parameters failed.\n");
-        return FIRMWARE_FAILED;
-    }
-
-    /* Gets the current logical device information */
-    mem_clear(&current_upg_priv, sizeof(firmware_spi_logic_upg_t));
-    ret = firmware_upgrade_get_spi_logic_info(fd, &current_upg_priv);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Error:firmware_upgrade_get_spi_logic_info failed ret %d.\n", ret);
-        return FIRMWARE_FAILED;
-    }
-
-    dbg_print(is_debug_on, "current_upg_priv dev_path[%s] test_base[0x%0x] test_size[0x%x]\n",
-                current_upg_priv.dev_path, current_upg_priv.test_base, current_upg_priv.test_size);
-    if (current_upg_priv.test_size <= 0) {
-        dbg_print(is_debug_on, "Error: don't support flast test.\n");
-        return FIRMWARE_NOT_SUPPORT;
-    }
-
-    /* Enable upgrade access */
-    ret = firmware_upgrade_spi_logic_init(fd);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Error:firmware_upgrade_spi_logic_init failed ret %d.\n", ret);
-        return FIRMWARE_FAILED;
-    }
-
-    /* Upgrade logic device */
-    ret = firmware_fpga_upgrade_test(&current_upg_priv);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Error:firmware_upgrade_do_spi_logic failed ret %d.\n", ret);
-        goto fail;
-    }
-
-    /* disable upgrade access */
-    ret = firmware_upgrade_spi_logic_finish(fd);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Error:firmware_upgrade_spi_logic_finish failed ret %d.\n", ret);
-    }
-
-    return FIRMWARE_SUCCESS;
-fail:
-    /* disable upgrade access */
-    ret = firmware_upgrade_spi_logic_finish(fd);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Error:firmware_upgrade_spi_logic_finish failed ret %d.\n", ret);
-    }
-
-    return FIRMWARE_FAILED;
-}
-
-static int firmware_upgreade_spi_logic_dump(firmware_spi_logic_upg_t *upg_priv,
-        uint32_t offset, uint8_t *buf, uint32_t size)
-{
-    int ret, i;
-    uint32_t addr, buf_page, retry, cnt, rd_len;
-
-    buf_page = FFPGA_UPG_DATA_SIZE;           /* read data by BUF SIZE each time */
-
-    cnt = size / FFPGA_UPG_DATA_SIZE;
-    if (size % FFPGA_UPG_DATA_SIZE) {
-        cnt++;
-    }
-    dbg_print(is_debug_on, "need read number of times:%d.\n", cnt);
-
-    for (i = 0; i < cnt; i++) {
-        addr = offset + i * FFPGA_UPG_DATA_SIZE;
-        if (i == (cnt - 1)) {
-            /* last time read remain size */
-            rd_len = size - buf_page * i;
-        } else {
-            /* each time read buf page size */
-            rd_len = buf_page;
-        }
-
-        for (retry = 0; retry < FPGA_UPG_RETRY_TIMES; retry++) {
-            ret = firmware_fpga_upg_read(upg_priv, addr, buf, rd_len);
-            if (ret < 0) {
-                dbg_print(is_debug_on, "addr:0x%x read %d time failed. ret %d\n", addr, retry, ret);
-                continue;
-            }
-            break;
-        }
-
-        if (ret < 0) {
-            dbg_print(is_debug_on, "finally addr:0x%x read failed ret %d\n", addr, ret);
-            return FIRMWARE_FAILED;
-        }
-
-        buf += rd_len;      /* buf pointer offset rd_len */
-    }
-
-    return FIRMWARE_SUCCESS;
-}
-
-static int firmware_fpga_dump_read(int fd, uint32_t offset, uint8_t *buf, uint32_t len)
-{
-    int ret;
-    firmware_spi_logic_upg_t current_upg_priv;
-
-    if ((fd < 0) || (buf == NULL)) {
-        dbg_print(is_debug_on, "Error:firmware upgrade spi logic dev parameters failed.\n");
-        return FIRMWARE_FAILED;
-    }
-
-    /* Gets the current logical device information */
-    mem_clear(&current_upg_priv, sizeof(firmware_spi_logic_upg_t));
-    ret = firmware_upgrade_get_spi_logic_info(fd, &current_upg_priv);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Error:firmware_upgrade_get_spi_logic_info failed ret %d.\n", ret);
-        return FIRMWARE_FAILED;
-    }
-
-    dbg_print(is_debug_on, "current_upg_priv dev_path[%s] flash_base[0x%0x] ctrl_base[0x%0x]\n",
-                current_upg_priv.dev_path, current_upg_priv.flash_base,
-                current_upg_priv.ctrl_base);
-
-    /* Enable upgrade access */
-    ret = firmware_upgrade_spi_logic_init(fd);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Error:firmware_upgrade_spi_logic_init failed ret %d.\n", ret);
-        return FIRMWARE_FAILED;
-    }
-
-    /* read logic device */
-    ret = firmware_upgreade_spi_logic_dump(&current_upg_priv, offset, buf, len);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Error:firmware_upgrade_do_spi_logic failed ret %d.\n", ret);
-        goto fail;
-    }
-
-    /* disable upgrade access */
-    ret = firmware_upgrade_spi_logic_finish(fd);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Error:firmware_upgrade_spi_logic_finish failed ret %d.\n", ret);
-    }
-
-    return FIRMWARE_SUCCESS;
-
-fail:
-    /* disable upgrade access */
-    ret = firmware_upgrade_spi_logic_finish(fd);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "Error:firmware_upgrade_spi_logic_finish failed ret %d.\n", ret);
-    }
-
-    return FIRMWARE_FAILED;
-}
-
-int firmware_upgrade_spi_logic_dev_dump(char *dev_name, uint32_t offset,
-        uint32_t len, char *record_file)
-{
-    int ret, dev_fd, file_fd;
-    char save_file[FIRMWARE_LOGIC_DEV_NAME_LEN];
-    uint8_t *buf;
-
-    dev_fd = open(dev_name, O_RDWR);
-    if (dev_fd < 0) {
-        dbg_print(is_debug_on, "Error: Failed to open %s, errno:%d.\n", dev_name, errno);
-        return FIRMWARE_FAILED;
-    }
-
-    dbg_print(is_debug_on, "open dev file %s succeeded.\n", dev_name);
-
-    buf = (uint8_t *) malloc(len);
-    if (buf == NULL) {
-        dbg_print(is_debug_on, "Error: Failed to malloc memory read %s data.\n", dev_name);
-        ret = FIRMWARE_FAILED;
-        goto free_dev_fd;
-    }
-
-    mem_clear(buf, len);
-    ret = firmware_fpga_dump_read(dev_fd, offset, buf, len);
-    if (ret < 0) {
-        dbg_print(is_debug_on, "addr 0x%x read 0x%x failed ret:%d\n", offset, len, ret);
-        goto free_data;
-    }
-
-    dbg_print(is_debug_on, "dump data succeeded. offset:0x%x, len:0x%x\n", offset, len);
-
-    if (strcmp(record_file, "print") != 0) {      /* record dump data on 'record_file' */
-        mem_clear(save_file, FIRMWARE_LOGIC_DEV_NAME_LEN);
-        strncpy(save_file, record_file, FIRMWARE_LOGIC_DEV_NAME_LEN - 1);
-        file_fd = open(save_file, O_RDWR|O_CREAT|O_TRUNC, S_IRWXG|S_IRWXU|S_IRWXO);
-        if (file_fd < 0) {
-            dbg_print(is_debug_on, "open file %s fail, errno:%d.\n", save_file, errno);
-            ret = -ENOENT;
-            goto free_data;
-        }
-
-        dbg_print(is_debug_on, "open save file %s succeeded.\n", save_file);
-
-        ret = write(file_fd, buf, len);
-        if (ret < 0) {
-            dbg_print(is_debug_on, "write failed (errno: %d).\n", errno);
-            goto free_file_fd;
-        }
-        dbg_print(is_debug_on, "write save file %s succeeded.\n", save_file);
-        ret = FIRMWARE_SUCCESS;
-    } else {    /* print reg on terminal by format */
-        firmware_upgrade_printf_reg((uint8_t*)buf, len, offset);
-        ret = FIRMWARE_SUCCESS;
-        goto free_data;
-    }
-
-free_file_fd:
-    close(file_fd);
-free_data:
-    free(buf);
-free_dev_fd:
-    close(dev_fd);
-
-    return ret;
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/fw_upg_spi_logic_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/fw_upg_spi_logic_dev.h
deleted file mode 100644
index 32f820161e86..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/fw_upg_sysfs/fw_upg_spi_logic_dev.h
+++ /dev/null
@@ -1,90 +0,0 @@
-#ifndef __FW_UPG_SPI_LOGIC_DEV_H__
-#define __FW_UPG_SPI_LOGIC_DEV_H__
-
-#define FIRMWARE_FPGA_WORD_LEN         (4)
-
-#define FIRMWARE_LOGIC_DEV_NAME_LEN          (64)    /* the macro definition needs to same as FIRMWARE_DEV_NAME_LEN in firmware_sysfs_upgrade.h */
-#define FIRMWARE_SPI_LOGIC_UPG_RETRY_CNT     (10)
-#define FIRMWARE_SPI_LOGIC_UPG_BUFF_SIZE     (256)
-#define FIRMWARE_SPI_LOGIC_SECTOR_SIZE       (0x10000)     /* One sector is 64Kk */
-
-#define FIRMWARE_UPG_RETRY_SLEEP_TIME        (10)   /* 10us */
-#define FIRMWARE_UPG_RETRY_TIME_CNT          (1000)
-#define FPGA_UPG_WAIT_SPI_RETRY_CNT           (100)
-#define FPGA_UPG_WAIT_SPI_RETRY_SLEEP_TIME    (1000 * 10)   /* 10ms */
-
-#define FIRMWARE_FPGA_UPG_RETRY_CNT          (100)
-
-/* FPGA upgrades related instruction definitions */
-#define FPGA_UPG_INSTRUTION_SE                (0xD8)
-#define FPGA_UPG_INSTRUTION_RDSR              (0x05)
-#define FPGA_UPG_INSTRUTION_WREN              (0x06)
-#define FPGA_UPG_INSTRUTION_PP                (0x02)
-#define FPGA_UPG_INSTRUTION_FR                (0x0B)
-#define FPGA_UPG_INSTRUTION_BE                (0xC7)
-#define FPGA_UPG_STATUS_MASK                  (0x1)
-#define FPGA_UPG_ACCESS_ENABLE                (0x3)
-#define FPGA_UPG_SPI_STATUS_MASK              (0x1)
-#define FFPGA_UPG_DATA_SIZE                   (256)
-
-#define FPGA_UPG_RETRY_TIMES                  (3)
-
-/* FPGA upgrades the offset of the associated register */
-#define FPGA_UPG_STATUS_REG                   (0x180)
-#define FPGA_UPG_SPI_CTRL_REG                 (0x184)
-#define FPGA_UPG_WR_FLASH_STATUS_REG          (0x188)
-#define FPGA_UPG_RD_FLASH_STATUS_REG          (0x18C)
-#define FPGA_UPG_INSTRUCTION_REG              (0x190)
-#define FPGA_UPG_ADDR_REG                     (0x194)
-#define FPGA_UPG_LENGTH_REG                   (0x198)
-#define FPGA_UPG_DEVICE_ID_REG                (0x19C)
-#define FPGA_UPG_DROP_REQ_NUM_REG             (0x1A8)
-
-typedef struct firmware_spi_logic_info_s {
-    char logic_dev_name[FIRMWARE_LOGIC_DEV_NAME_LEN]; /* Logical device name */
-    uint32_t flash_base;                                   /* Flash Upgrade Address */
-    uint32_t ctrl_base;                                    /* SPI upgrade control register base address */
-    uint32_t test_base;                                    /* Test flash address */
-    uint32_t test_size;                                    /* Test flash size */
-} firmware_spi_logic_info_t;
-
-typedef struct firmware_spi_logic_upg_s {
-    char dev_path[FIRMWARE_LOGIC_DEV_NAME_LEN];
-    uint32_t flash_base;      /* Flash Upgrade Address */
-    uint32_t ctrl_base;       /* SPI upgrade control register base address */
-    uint32_t status_reg;
-    uint32_t spi_ctrl_reg;
-    uint32_t wr_flash_status_reg;
-    uint32_t rd_flash_status_reg;
-    uint32_t instruction_reg;
-    uint32_t addr_reg;
-    uint32_t length_reg;
-    uint32_t device_id_reg;
-    uint32_t drop_reg_num_reg;
-    uint32_t test_base;          /* Test flash address */
-    uint32_t test_size;          /* Test flash size */
-}firmware_spi_logic_upg_t;
-
-typedef enum firmware_spi_flash_rv_s {
-    FW_SPI_FLASH_RV_OK      = 0,
-    FW_SPI_FLASH_STATUS_ERR,
-    FW_SPI_FLASH_BUSY,
-    FW_SPI_FLASH_SPI_BUSY,
-    FW_SPI_FLASH_WR_ENABLE_ERR,
-    FW_SPI_FLASH_ERASE_ADDR_ERR,
-    FW_SPI_FLASH_ERASE_SECTOR_ERR,
-    FW_SPI_FLASH_WR_ERR,
-    FW_SPI_FLASH_RD_ERR,
-    FW_SPI_FLASH_PARAM_ERR,
-    FW_SPI_FLASH_UPG_ERR,
-    FW_SPI_FLASH_WR_LENGTH_ERR,
-    FW_SPI_FLASH_WR_ADDR_ERR,
-    FW_SPI_FLASH_SET_ACCESS_ERR,
-    FW_SPI_FLASH_DATA_CMP_ERR,
-    FW_SPI_FLASH_GET_INFO_ERR,
-    FW_SPI_FLASH_NOT_SUPPORT_TEST,
-} firmware_spi_flash_rv_t;
-
-int fpga_test_spi_logic_flash(int argc, char *argv[]);
-
-#endif /* End of __FW_UPG_SPI_LOGIC_DEV_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/include/debug.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/include/debug.h
deleted file mode 100644
index 17dd42c3ef77..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/include/debug.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- *
- * debug.h
- * firmware upgrade debug switch control
- */
-
-#ifndef __FIRMWARE_UPGRADE_DEBUG_H__
-#define __FIRMWARE_UPGRADE_DEBUG_H__
-#include <string.h>
-
-#define mem_clear(data, size) memset((data), 0, (size))
-
-#define DEBUG_INFO_LEN  20
-#define DEBUG_FILE      "/tmp/.firmware_upgrade_debug"
-#define DEBUG_ON_ALL    "3"
-#define DEBUG_ON_INFO   "1"
-#define DEBUG_OFF_INFO  "0"
-
-enum debug_s {
-    DEBUG_OFF = 0,                  /* off debug  */
-    DEBUG_APP_ON,                   /* open app debug */
-    DEBUG_ALL_ON,                   /* open all debug */
-    DEBUG_IGNORE,                   /* ignore debug */
-};
-
-#define dbg_print(debug, fmt, arg...)  \
-    if (debug == DEBUG_APP_ON || debug == DEBUG_ALL_ON) \
-        { do{printf(fmt,##arg);} while(0); }
-
-/* firmware upgrade debug switch */
-extern int firmware_upgrade_debug(void);
-extern int is_debug_on;
-
-#endif /* End of __FIRMWARE_UPGRADE_DEBUG_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/include/firmware_app.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/include/firmware_app.h
deleted file mode 100644
index 581b2e969ec9..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/include/firmware_app.h
+++ /dev/null
@@ -1,172 +0,0 @@
-#ifndef __FIRMWARE_APP_H__
-#define __FIRMWARE_APP_H__
-
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <fcntl.h>
-#include <sys/ioctl.h>
-#include <debug.h>
-#include <stdint.h>
-
-#define ERR_FW_CHECK_CPLD_UPGRADE       (-601)   /* File validation error */
-#define ERR_FW_CHECK_FPGA_UPGRADE       (-602)
-#define ERR_FW_MATCH_CPLD_UPGRADE       (-603)   /* No matching upgrade file found */
-#define ERR_FW_MATCH_FPGA_UPGRADE       (-604)
-#define ERR_FW_SAMEVER_CPLD_UPGRADE     (-605)   /* the same version */
-#define ERR_FW_SAMEVER_FPGA_UPGRADE     (-606)
-#define ERR_FW_DO_CPLD_UPGRADE          (-607)   /* upgrade fail */
-#define ERR_FW_DO_FPGA_UPGRADE          (-608)
-#define ERR_FW_UPGRADE                  (-609)   /* other fail */
-#define ERR_FW_CHECK_UPGRADE            (-610)   /* File validation error */
-#define ERR_FW_MATCH_UPGRADE            (-611)   /* No matching upgrade file found */
-#define ERR_FW_SAMEVER_UPGRADE          (-612)   /* the same version */
-#define ERR_FW_DO_UPGRADE               (-613)   /* upgrade fail */
-#define ERR_FW_DO_UPGRADE_NOT_SUPPORT   (-614)   /* upgrade fail */
-
-#define FIRMWARE_NOT_SUPPORT         (-2)
-#define FIRMWARE_FAILED              (-1)
-#define FIRMWARE_SUCCESS             (0)
-
-#define FIRMWARE_ACTION_CHECK        0
-#define FIRMWARE_ACTION_MATCH        1
-#define FIRMWARE_ACTION_VERCHECK     2
-#define FIRMWARE_ACTION_UPGRADE      3
-#define FIRMWARE_ACTION_SUPPORT      4
-
-#define FIRMWARE_UPGRADE_RETRY_CNT   (10)
-#define FIRMWARE_NAME_LEN            (48)
-#define FIRMWARE_SLOT_MAX_NUM        (16)           /* Maximum number of links supported by board cards */
-
-/* Upgrade file headers */
-#define MAX_DEV_NUM                     10           /* Maximum number of devices to which the upgrade file is applicable */
-#define INSMOD_DRIVER                   1            /* insmod driver */
-#define RMMOD_DRIVER                    0            /* rmmod driver */
-#define MAX_HEADER_SIZE                 1000         /* Upgrade the maximum length of file header information */
-#define MAX_HEADER_KV_SIZE              64           /* Upgrade the maximum length of the file header key value */
-
-/* Upgrade file header key values */
-#define FILEHEADER_DEVTYPE                "DEVTYPE"
-#define FILEHEADER_SUBTYPE                "SUBTYPE"
-#define FILEHEADER_TYPE                   "TYPE"
-#define FILEHEADER_CHAIN                  "CHAIN"
-#define FILEHEADER_CHIPNAME               "CHIPNAME"
-#define FILEHEADER_VERSION                "VERSION"
-#define FILEHEADER_FILETYPE               "FILETYPE"
-#define FILEHEADER_CRC                    "CRC"
-
-#define FIRMWARE_CPLD_NAME           "cpld"
-#define FIRMWARE_FPGA_NAME           "fpga"
-
-/* ioctl publi command, the same as driver */
-#define FIRMWARE_COMMON_TYPE 'C'
-#define FIRMWARE_GET_CHIPNAME            _IOR(FIRMWARE_COMMON_TYPE, 0, char)    /* get the chip name */
-#define FIRMWARE_GET_VERSION             _IOR(FIRMWARE_COMMON_TYPE, 2, int)     /* get version */
-#define FIRMWARE_SET_DEBUG_ON            _IOW(FIRMWARE_COMMON_TYPE, 3, int)     /* debug on */
-#define FIRMWARE_SET_DEBUG_OFF           _IOW(FIRMWARE_COMMON_TYPE, 4, int)     /* debug off */
-
-/* firmware cpld driver ioctl command, the same as "firmware_driver\firmware_driver\include\firmware.h" */
-#define FIRMWARE_TYPE 'J'
-#define FIRMWARE_PROGRAM                 _IOW(FIRMWARE_TYPE, 1, char)    /* firmware upgrade ISC */
-#define FIRMWARE_READ_CHIP               _IOR(FIRMWARE_TYPE, 5, int)     /* read the contents of the chip */
-#define FIRMWARE_PROGRAM_JBI             _IOW(FIRMWARE_TYPE, 6, char)    /* firmware upgrade JBI */
-
-/* firmware cpld ispvme driver ioctl command, the same as "firmware_driver\firmware_driver_ispvme\include\firmware_ispvme.h" */
-#define FIRMWARE_VME_TYPE 'V'
-#define FIRMWARE_JTAG_TDI                _IOR(FIRMWARE_VME_TYPE, 0, char)
-#define FIRMWARE_JTAG_TDO                _IOR(FIRMWARE_VME_TYPE, 1, char)
-#define FIRMWARE_JTAG_TCK                _IOR(FIRMWARE_VME_TYPE, 2, char)
-#define FIRMWARE_JTAG_TMS                _IOR(FIRMWARE_VME_TYPE, 3, char)
-#define FIRMWARE_JTAG_EN                 _IOR(FIRMWARE_VME_TYPE, 4, char)
-#define FIRMWARE_JTAG_INIT               _IOR(FIRMWARE_VME_TYPE, 7, char)   /* enable upgrade access */
-#define FIRMWARE_JTAG_FINISH             _IOR(FIRMWARE_VME_TYPE, 8, char)   /* disable upgrade access */
-
-/* firmware sysfs driver ioctl command, the same as "firmware_driver\firmware_driver_sysfs\include\firmware_sysfs.h" */
-#define FIRMWARE_SYSFS_TYPE 'S'
-#define FIRMWARE_SYSFS_INIT               _IOR(FIRMWARE_SYSFS_TYPE, 0, char)   /* enable upgrade access */
-#define FIRMWARE_SYSFS_FINISH             _IOR(FIRMWARE_SYSFS_TYPE, 1, char)   /* disable upgrade access */
-#define FIRMWARE_SYSFS_SPI_INFO           _IOR(FIRMWARE_SYSFS_TYPE, 2, char)   /* spi flash upgrade */
-#define FIRMWARE_SYSFS_DEV_FILE_INFO      _IOR(FIRMWARE_SYSFS_TYPE, 3, char)   /* sysfs upgrade */
-#define FIRMWARE_SYSFS_MTD_INFO           _IOR(FIRMWARE_SYSFS_TYPE, 4, char)   /* sysfs mtd upgrade */
-
-/* VME file, used to distinguish the JTAG signal that needs to operate */
-#define JTAG_TDO         1
-#define JTAG_TCK         2
-#define JTAG_TDI         3
-#define JTAG_TMS         4
-#define JTAG_ENABLE      5
-#define JTAG_TRST        6
-
-typedef struct name_info_s {
-    int card_type[MAX_DEV_NUM];                      /* main board type */
-    int sub_type[MAX_DEV_NUM];                       /* sub board type */
-    int type;                                        /* device type */
-    int chain;                                        /* chain num */
-    char chip_name[FIRMWARE_NAME_LEN];               /* chip name */
-    char version[FIRMWARE_NAME_LEN];                 /* version */
-    int file_type;                                   /* file type */
-    unsigned int crc32;                              /* 4 byte CRC values */
-} name_info_t;
-
-typedef struct cmd_info_s {
-    uint32_t size;
-    void *data;
-} cmd_info_t;
-
-enum firmware_type_s {
-    FIRMWARE_UNDEF_TYPE = 0,
-    FIRMWARE_CPLD,
-    FIRMWARE_FPGA,
-    FIRMWARE_SYSFS,
-    FIRMWARE_OTHER,
-};
-
-typedef enum firmware_file_type_s {
-    FIRMWARE_UNDEF_FILE_TYPE = 0,
-    FIRMWARE_VME,           /* ispvme cpld, GPIO simulates JTAG */
-    FIRMWARE_ISC,           /* cpld, GPIO simulates JTAG */
-    FIRMWARE_JBI,
-    FIRMWARE_SPI_LOGIC_DEV, /* FPGA SPI upgrde register upgrade flash */
-    FIRMWARE_SYSFS_DEV,     /* write file upgrade eeprom */
-    FIRMWARE_MTD,           /* upgrade mtd device */
-    FIRMWARE_NONE,
-} firmware_file_type_t;
-
-typedef struct firmware_file_name_s {
-    char firmware_file_name_str[MAX_HEADER_KV_SIZE];
-    int firmware_file_type;
-} firmware_file_name_t;
-
-extern int header_offset;
-
-/* CRC32 calculation */
-extern unsigned long crc32(unsigned long crc, const unsigned char *buf, unsigned int len);
-/* VME file upgrade */
-extern int firmware_upgrade_ispvme(int file_fd, char *upgrade_file_name, name_info_t *info);
-extern void writePort(unsigned char a_ucPins, unsigned char a_ucValue);
-extern unsigned char readPort();
-extern void sclock();
-extern void ispVMStateMachine(signed char NextState);
-
-/* spi flash upgrade */
-extern int firmware_upgrade_spi_logic_dev(int fd, uint8_t *buf, uint32_t size, name_info_t *info);
-/* spi flash upgrade test*/
-extern int firmware_upgrade_spi_logic_dev_test(int fd, name_info_t *info);
-/* spi flash data print*/
-extern int firmware_upgrade_spi_logic_dev_dump(char *dev_name, uint32_t offset, uint32_t size, char *record_file);
-
-/* sysfs upgrade */
-extern int firmware_upgrade_sysfs(int fd, uint8_t *buf, uint32_t size, name_info_t *info);
-/* sysfs upgrade test*/
-extern int firmware_upgrade_sysfs_test(int fd, name_info_t *info);
-
-/* isc upgrade */
-extern int firmware_upgrade_jtag(int fd, uint8_t *buf, uint32_t size, name_info_t *info);
-/* isc upgrade test */
-extern int firmware_upgrade_jtag_test(int fd, uint8_t *buf, uint32_t size, name_info_t *info);
-
-/* mtd upgrade */
-extern int firmware_upgrade_mtd(int fd, uint8_t *buf, uint32_t size, name_info_t *info);
-/* mtd upgrade test */
-extern int firmware_upgrade_mtd_test(int fd, name_info_t *info);
-
-#endif /* End of __FIRMWARE_APP_H__ */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/include/vmopcode.h b/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/include/vmopcode.h
deleted file mode 100644
index ae9d713ff86c..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/app/firmware_upgrade/firmware_upgrade/include/vmopcode.h
+++ /dev/null
@@ -1,192 +0,0 @@
-/***************************************************************
-*
-* This is the include file for Lattice Semiconductor's ispVM
-* Embedded software application.
-*
-***************************************************************/
-
-/***************************************************************
-*
-* VME version.
-*
-* History:
-*
-***************************************************************/
-
-#define VME_VERSION_NUMBER "12.2"
-
-/***************************************************************
-*
-* Maximum declarations.
-*
-***************************************************************/
-
-#define VMEHEXMAX   60000L  /* The hex file is split 60K per file. */
-#define SCANMAX     64000L  /* The maximum SDR/SIR burst. */
-
-/***************************************************************
-*
-* Supported JTAG state transitions.
-*
-***************************************************************/
-
-#define RESET      0x00
-#define IDLE       0x01
-#define IRPAUSE    0x02
-#define DRPAUSE    0x03
-#define SHIFTIR    0x04
-#define SHIFTDR    0x05
-#define DRCAPTURE  0x06
-
-/***************************************************************
-*
-* Flow control register bit definitions.  A set bit indicates
-* that the register currently exhibits the corresponding mode.
-*
-***************************************************************/
-
-#define INTEL_PRGM 0x0001    /* Intelligent programming is in effect. */
-#define CASCADE    0x0002    /* Currently splitting large SDR. */
-#define REPEATLOOP 0x0008    /* Currently executing a repeat loop. */
-#define SHIFTRIGHT 0x0080    /* The next data stream needs a right shift. */
-#define SHIFTLEFT  0x0100    /* The next data stream needs a left shift. */
-#define VERIFYUES  0x0200    /* Continue if fail is in effect. */
-
-/***************************************************************
-*
-* DataType register bit definitions.  A set bit indicates
-* that the register currently holds the corresponding type of data.
-*
-***************************************************************/
-
-#define EXPRESS    0x0001    /* Simultaneous program and verify. */
-#define SIR_DATA   0x0002    /* SIR is the active SVF command. */
-#define SDR_DATA   0x0004    /* SDR is the active SVF command. */
-#define COMPRESS   0x0008    /* Data is compressed. */
-#define TDI_DATA   0x0010    /* TDI data is present. */
-#define TDO_DATA   0x0020    /* TDO data is present. */
-#define MASK_DATA  0x0040    /* MASK data is present. */
-#define HEAP_IN    0x0080    /* Data is from the heap. */
-#define LHEAP_IN   0x0200    /* Data is from intel data buffer. */
-#define VARIABLE   0x0400    /* Data is from a declared variable. */
-#define CRC_DATA   0x0800    /* CRC data is pressent. */
-#define CMASK_DATA 0x1000    /* CMASK data is pressent. */
-#define RMASK_DATA 0x2000    /* RMASK data is pressent. */
-#define READ_DATA  0x4000    /* READ data is pressent. */
-#define DMASK_DATA 0x8000    /* DMASK data is pressent. */
-
-/***************************************************************
-*
-* Pin opcodes.
-*
-***************************************************************/
-
-#define signalENABLE  0x1C    /* ispENABLE pin. */
-#define signalTMS     0x1D    /* TMS pin. */
-#define signalTCK     0x1E    /* TCK pin. */
-#define signalTDI     0x1F    /* TDI pin. */
-#define signalTRST    0x20    /* TRST pin. */
-
-/***************************************************************
-*
-* Supported vendors.
-*
-***************************************************************/
-
-#define VENDOR      0x56
-#define LATTICE     0x01
-#define ALTERA      0x02
-#define XILINX      0x03
-
-/***************************************************************
-*
-* Opcode definitions.
-*
-* Note: opcodes must be unique.
-*
-***************************************************************/
-
-#define ENDDATA    0x00    /* The end of the current SDR data stream. */
-#define RUNTEST    0x01    /* The duration to stay at the stable state. */
-#define ENDDR      0x02    /* The stable state after SDR. */
-#define ENDIR      0x03    /* The stable state after SIR. */
-#define ENDSTATE   0x04    /* The stable state after RUNTEST. */
-#define TRST       0x05    /* Assert the TRST pin. */
-#define HIR        0x06    /* The sum of the IR bits of the leading devices. */
-#define TIR        0x07    /* The sum of the IR bits of the trailing devices. */
-#define HDR        0x08    /* The number of leading devices. */
-#define TDR        0x09    /* The number of trailing devices. */
-#define ispEN      0x0A    /* Assert the ispEN pin. */
-#define FREQUENCY  0x0B    /* The maximum clock rate to run the JTAG state machine. */
-#define STATE      0x10    /* Move to the next stable state. */
-#define SIR        0x11    /* The instruction stream follows. */
-#define SDR        0x12    /* The data stream follows. */
-#define TDI        0x13    /* The following data stream feeds into the device. */
-#define TDO        0x14    /* The following data stream is compared against the device. */
-#define MASK       0x15    /* The following data stream is used as mask. */
-#define XSDR       0x16    /* The following data stream is for simultaneous program and verify. */
-#define XTDI       0x17    /* The following data stream is for shift in only. It must be stored for the next XSDR. */
-#define XTDO       0x18    /* There is not data stream.  The data stream was stored from the previous XTDI. */
-#define MEM        0x19    /* The maximum memory needed to allocate in order hold one row of data. */
-#define WAIT       0x1A    /* The duration of delay to observe. */
-#define TCK        0x1B    /* The number of TCK pulses. */
-#define SHR        0x23    /* Set the flow control register for right shift. */
-#define SHL        0x24    /* Set the flow control register for left shift. */
-#define HEAP       0x32    /* The memory size needed to hold one loop. */
-#define REPEAT     0x33    /* The beginning of the loop. */
-#define LEFTPAREN  0x35    /* The beginning of data following the loop. */
-#define VAR          0x55      /* Plac holder for loop data. */
-#define SEC        0x1C    /* The delay time in seconds that must be observed. */
-#define SMASK      0x1D    /* The mask for TDI data. */
-#define MAX        0x1E    /* The absolute maximum wait time. */
-#define ON         0x1F    /* Assert the targeted pin. */
-#define OFF        0x20    /* Dis-assert the targeted pin. */
-#define SETFLOW    0x30    /* Change the flow control register. */
-#define RESETFLOW  0x31    /* Clear the flow control register. */
-#define CRC          0x47    /* The following data stream is used for CRC calculation. */
-#define CMASK        0x48      /* The following data stream is used as mask for CRC calculation. */
-#define RMASK      0x49    /* The following data stream is used as mask for read and save. */
-#define READ         0x50    /* The following data stream is used for read and save. */
-#define ENDLOOP    0x59    /* The end of the repeat loop. */
-#define SECUREHEAP 0x60    /* Used to secure the HEAP opcode. */
-#define VUES       0x61    /* Support continue if fail. */
-#define DMASK      0x62    /* The following data stream is used for dynamic I/O. */
-#define COMMENT    0x63    /* Support SVF comments in the VME file. */
-#define HEADER     0x64    /* Support header in VME file. */
-#define FILE_CRC   0x65    /* Support crc-protected VME file. */
-#define LCOUNT     0x66    /* Support intelligent programming. */
-#define LDELAY     0x67    /* Support intelligent programming. */
-#define LSDR       0x68    /* Support intelligent programming. */
-#define LHEAP      0x69    /* Memory needed to hold intelligent data buffer */
-#define CONTINUE   0x70    /* Allow continuation. */
-#define LVDS         0x71      /* Support LVDS. */
-#define ENDVME     0x7F    /* End of the VME file. */
-#define HIGH       0x80    /* Assert the targeted pin. */
-#define LOW        0x81    /* Dis-assert the targeted pin. */
-#define ENDFILE    0xFF    /* End of file. */
-
-/***************************************************************
-*
-* ispVM Embedded Return Codes.
-*
-***************************************************************/
-
-#define VME_VERIFICATION_FAILURE        -1
-#define VME_FILE_READ_FAILURE             -2
-#define VME_VERSION_FAILURE               -3
-#define VME_INVALID_FILE                    -4
-#define VME_ARGUMENT_FAILURE              -5
-#define VME_CRC_FAILURE                     -6
-
-/***************************************************************
-*
-* Type definitions.
-*
-***************************************************************/
-
-/* Support LVDS */
-typedef struct {
-    unsigned short usPositiveIndex;
-    unsigned short usNegativeIndex;
-    unsigned char  ucUpdate;
-} LVDSPair;
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
index a31299039ab4..29375059105a 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
@@ -13,6 +13,7 @@ PLAT_SYSFS_DIR = $(PWD)/plat_sysfs
 INTEL_SPI = $(PWD)/intel_spi
 PHY = $(PWD)/phy
 PINCTRL = $(PWD)/pinctrl
+SDHCI = $(PWD)/sdhci
 
 export PLAT_SYSFS_DIR
 
@@ -49,6 +50,7 @@ all :
 	$(MAKE) -C $(INTEL_SPI)
 	$(MAKE) -C $(PHY)
 	$(MAKE) -C $(PINCTRL)
+	$(MAKE) -C $(SDHCI)
 	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
 	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
 	cp -p  $(PWD)/*.ko $(module_out_put_dir)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/Makefile
index c8e0ac458c14..02d659d6c8b2 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/Makefile
@@ -24,6 +24,7 @@ obj-m += wb_isl68137.o
 obj-m += wb_tps53622.o
 obj-m += wb_ucd9000.o
 obj-m += wb_xdpe12284.o
+obj-m += wb_xdpe132g5c_pmbus.o
 obj-m += wb_i2c_ismt.o
 
 all:
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_ismt.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_ismt.c
index 350d30b83cb6..2015c8ca2e18 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_ismt.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_ismt.c
@@ -69,6 +69,9 @@
 #include <linux/delay.h>
 
 #include <linux/io-64-nonatomic-lo-hi.h>
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
 
 /* PCI Address Constants */
 #define SMBBAR		0
@@ -549,10 +552,10 @@ static int ismt_access(struct i2c_adapter *adap, u16 addr,
 	desc = &priv->hw[priv->head];
 
 	/* Initialize the DMA buffer */
-	memset(priv->buffer, 0, sizeof(priv->buffer));
+	mem_clear(priv->buffer, sizeof(priv->buffer));
 
 	/* Initialize the descriptor */
-	memset(desc, 0, sizeof(struct ismt_desc));
+	mem_clear(desc, sizeof(struct ismt_desc));
 	desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, read_write);
 
 	/* Initialize common control bits */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ucd9000.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ucd9000.c
index 9b967f141a86..5c3d125afb6d 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ucd9000.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ucd9000.c
@@ -591,7 +591,8 @@ static int ucd9000_probe(struct i2c_client *client)
     }
 
     /* The internal temperature sensor is always active */
-    info->func[0] = PMBUS_HAVE_TEMP;
+    /* ucd90160 have no temperature */
+    /* info->func[0] = PMBUS_HAVE_TEMP; */
 
     /* Everything else is configurable */
     ret = wb_i2c_smbus_read_block_data(client, UCD9000_MONITOR_CONFIG,
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c
new file mode 100644
index 000000000000..e6c57073afa5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c
@@ -0,0 +1,281 @@
+/*
+ * Copyright(C) 2020 Ruijie Network. All rights reserved.
+ */
+
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/string.h>
+#include <linux/sysfs.h>
+#include <linux/delay.h>
+#include <linux/mutex.h>
+#include "wb_pmbus.h"
+
+typedef enum {
+    DBG_START,
+    DBG_VERBOSE,
+    DBG_KEY,
+    DBG_WARN,
+    DBG_ERROR,
+    DBG_END,
+} dbg_level_t;
+
+static int debuglevel = 0;
+module_param(debuglevel, int, S_IRUGO);
+
+#define DBG_DEBUG(fmt, arg...)  do { \
+    if ( debuglevel > DBG_START && debuglevel < DBG_ERROR) { \
+          printk(KERN_INFO "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+    } else if ( debuglevel >= DBG_ERROR ) {   \
+        printk(KERN_ERR "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+    } else {    } \
+} while (0)
+
+#define DBG_ERROR(fmt, arg...)  do { \
+     if ( debuglevel > DBG_START) {  \
+        printk(KERN_ERR "[ERROR]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+       } \
+} while (0)
+
+#define BUF_SIZE                    (256)
+#define XDPE132G5C_PAGE_NUM         (2)
+#define XDPE132G5C_PROT_VR12_5MV    (0x01) /* VR12.0 mode, 5-mV DAC */
+#define XDPE132G5C_PROT_VR12_5_10MV (0x02) /* VR12.5 mode, 10-mV DAC */
+#define XDPE132G5C_PROT_IMVP9_10MV  (0x03) /* IMVP9 mode, 10-mV DAC */
+#define XDPE132G5C_PROT_VR13_10MV   (0x04) /* VR13.0 mode, 10-mV DAC */
+#define XDPE132G5C_PROT_IMVP8_5MV   (0x05) /* IMVP8 mode, 5-mV DAC */
+#define XDPE132G5C_PROT_VR13_5MV    (0x07) /* VR13.0 mode, 5-mV DAC */
+#define RETRY_TIME                  (15)
+
+static ssize_t set_xdpe132g5c_avs(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    int ret;
+    unsigned long val;
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    struct i2c_client *client = to_i2c_client(dev);
+    struct pmbus_data *data;
+
+    data = i2c_get_clientdata(client);
+    ret = kstrtoul(buf, 0, &val);
+    if (ret){
+        return ret;
+    }
+    mutex_lock(&data->update_lock);
+    /* set value */
+    ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, (u16)val);
+    if (ret < 0) {
+        DBG_ERROR("set pmbus_vout_command fail\n");
+        goto finish_set;
+    }
+finish_set:
+    wb_pmbus_clear_faults(client);
+    mutex_unlock(&data->update_lock);
+    return (ret < 0) ? ret : count;
+
+}
+
+static ssize_t show_xdpe132g5c_avs(struct device *dev, struct device_attribute *da, char *buf)
+{
+    int val;
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    struct i2c_client *client = to_i2c_client(dev);
+    struct pmbus_data *data;
+
+    data = i2c_get_clientdata(client);
+    mutex_lock(&data->update_lock);
+    val = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
+    if (val < 0) {
+        DBG_ERROR("fail val = %d\n", val);
+        goto finish_show;
+    }
+finish_show:
+    wb_pmbus_clear_faults(client);
+    mutex_unlock(&data->update_lock);
+    return snprintf(buf, BUF_SIZE, "0x%04x\n", val);
+}
+
+static SENSOR_DEVICE_ATTR(avs0_vout_command, S_IRUGO | S_IWUSR, show_xdpe132g5c_avs, set_xdpe132g5c_avs, 0);
+static SENSOR_DEVICE_ATTR(avs1_vout_command, S_IRUGO | S_IWUSR, show_xdpe132g5c_avs, set_xdpe132g5c_avs, 1);
+
+static struct attribute *xdpe132g5c_sysfs_attrs[] = {
+    &sensor_dev_attr_avs0_vout_command.dev_attr.attr,
+    &sensor_dev_attr_avs1_vout_command.dev_attr.attr,
+    NULL,
+};
+
+static const struct attribute_group xdpe132g5c_sysfs_attrs_group = {
+    .attrs = xdpe132g5c_sysfs_attrs,
+};
+
+static int xdpe132g5c_read_word_data(struct i2c_client *client, int page, int phase, int reg)
+{
+    int rv;
+    int retry;
+    int value;
+
+    rv = wb_pmbus_set_page(client, page, 0xff);
+    if (rv < 0) {
+        return rv;
+    }
+
+    retry = 3;
+    while (retry--) {
+        value = i2c_smbus_read_word_data(client, reg);
+        if ((value == 0xffff) || (value < 0)) {
+            continue;
+        }
+    }
+    return value;
+}
+
+static int xdpe132g5c_identify(struct i2c_client *client, struct pmbus_driver_info *info)
+{
+    u8 vout_params;
+    int ret, i, retry;
+
+    /* Read the register with VOUT scaling value.*/
+    for (i = 0; i < XDPE132G5C_PAGE_NUM; i++) {
+        for (retry = 0; retry < RETRY_TIME; retry++) {
+            ret = wb_pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE);
+            if (ret < 0 || ret == 0xff) {
+                msleep(5);
+                continue;
+            } else {
+                break;
+            }
+        }
+        if (ret < 0) {
+            return ret;
+        }
+
+        switch (ret >> 5) {
+        case 0: /* linear mode      */
+            if (info->format[PSC_VOLTAGE_OUT] != linear) {
+                return -ENODEV;
+            }
+            break;
+        case 1: /* VID mode         */
+            if (info->format[PSC_VOLTAGE_OUT] != vid) {
+                return -ENODEV;
+            }
+            vout_params = ret & GENMASK(4, 0);
+            switch (vout_params) {
+            case XDPE132G5C_PROT_VR13_10MV:
+            case XDPE132G5C_PROT_VR12_5_10MV:
+                info->vrm_version[i] = vr13;
+                break;
+            case XDPE132G5C_PROT_VR13_5MV:
+            case XDPE132G5C_PROT_VR12_5MV:
+            case XDPE132G5C_PROT_IMVP8_5MV:
+                info->vrm_version[i] = vr12;
+                break;
+            case XDPE132G5C_PROT_IMVP9_10MV:
+                info->vrm_version[i] = imvp9;
+                break;
+            default:
+                return -EINVAL;
+            }
+            break;
+        case 2: /* direct mode      */
+            if (info->format[PSC_VOLTAGE_OUT] != direct) {
+                return -ENODEV;
+            }
+            break;
+        default:
+            return -ENODEV;
+        }
+    }
+
+    return 0;
+}
+
+static struct pmbus_driver_info xdpe132g5c_info = {
+    .pages = XDPE132G5C_PAGE_NUM,
+    .format[PSC_VOLTAGE_IN] = linear,
+    .format[PSC_VOLTAGE_OUT] = linear,
+    .format[PSC_TEMPERATURE] = linear,
+    .format[PSC_CURRENT_IN] = linear,
+    .format[PSC_CURRENT_OUT] = linear,
+    .format[PSC_POWER] = linear,
+    .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN
+        | PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_TEMP
+        | PMBUS_HAVE_STATUS_TEMP
+        | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
+        | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT,
+    .func[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN
+        | PMBUS_HAVE_STATUS_INPUT
+        | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
+        | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT,
+    .identify = xdpe132g5c_identify,
+    .read_word_data = xdpe132g5c_read_word_data,
+};
+
+static int xdpe132g5c_probe(struct i2c_client *client,
+             const struct i2c_device_id *id)
+{
+    int status;
+    struct pmbus_driver_info *info;
+
+    info = devm_kmemdup(&client->dev, &xdpe132g5c_info, sizeof(*info), GFP_KERNEL);
+    if (!info) {
+        return -ENOMEM;
+    }
+
+    status = wb_pmbus_do_probe(client, &xdpe132g5c_info);
+    if (status != 0) {
+        DBG_ERROR("pmbus probe error %d\n", status);
+        return status;
+    }
+
+    status = sysfs_create_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group);
+    if (status != 0) {
+        DBG_ERROR("sysfs_create_group error %d\n", status);
+        return status;
+    }
+
+    return status;
+}
+
+static int xdpe132g5c_remove(struct i2c_client *client)
+{
+    int ret;
+
+    sysfs_remove_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group);
+    ret = wb_pmbus_do_remove(client);
+    if (ret != 0){
+        DBG_ERROR("fail remove xdpe132g5c %d\n", ret);
+    }
+    return ret;
+}
+
+static const struct i2c_device_id xdpe132g5c_id[] = {
+    {"wb_xdpe132g5c_pmbus", 0},
+    {}
+};
+
+MODULE_DEVICE_TABLE(i2c, xdpe132g5c_id);
+
+static const struct of_device_id __maybe_unused xdpe132g5c_of_match[] = {
+    {.compatible = "infineon,wb_xdpe132g5c_pmbus"},
+    {}
+};
+MODULE_DEVICE_TABLE(of, xdpe132g5c_of_match);
+
+static struct i2c_driver xdpe132g5c_driver = {
+    .driver = {
+        .name = "wb_xdpe132g5c_pmbus",
+        .of_match_table = of_match_ptr(xdpe132g5c_of_match),
+    },
+    .probe = xdpe132g5c_probe,
+    .remove = xdpe132g5c_remove,
+    .id_table = xdpe132g5c_id,
+};
+
+module_i2c_driver(xdpe132g5c_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("PMBus driver for Infineon XDPE132 family");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c
index b0c9e9f6e723..3d05621ef031 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c
@@ -455,6 +455,9 @@ static void dfd_ko_cfg_set_info_ctrl_mem_value(info_ctrl_t *info_ctrl, info_ctrl
     case INFO_CTRL_MEM_INT_EXTRA2:
         dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->int_extra2), line_num);
         break;
+    case INFO_CTRL_MEM_INT_EXTRA3:
+        dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->int_extra3), line_num);
+        break;
     default:
         break;
     }
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c
index f56473d16292..f8d64dcacbe3 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c
@@ -10,10 +10,22 @@
 #include "../../dev_sysfs/include/sysfs_common.h"
 
 #define DFD_HWMON_NAME                                "hwmon"
+/* CPLD_VOLATGE_VALUE_MODE1 */
 #define DFD_GET_CPLD_VOLATGE_CODE_VALUE(value)        ((value >> 4)& 0xfff)
 /* ((code_val * 16 * 33 * k) / ((65536 - 5000) * 10)) = ((code_val * 33 * k) / 37835) */
 #define DFD_GET_CPLD_VOLATGE_REAL_VALUE(code_val, k)  ((code_val * 33 * k) / 37835)
 
+ 
+/* CPLD_VOLATGE_VALUE_MODE2 */
+/* high 8 bit + low 4 bit(bit0-bit3) */
+#define DFD_GET_CPLD_VOLATGE_CODE_VALUE2(value)        (((value & 0xff00) >> 4) + (value & 0xf))
+#define DFD_GET_CPLD_VOLATGE_REAL_VALUE2(code_val, k)  ((code_val * 33 * k) / 40950)
+
+typedef enum cpld_volatge_value_s {
+    CPLD_VOLATGE_VALUE_MODE1,
+    CPLD_VOLATGE_VALUE_MODE2,
+} cpld_volatge_value_t;
+
 char *g_info_ctrl_mem_str[INFO_CTRL_MEM_END] = {
     ".mode",
     ".int_cons",
@@ -27,6 +39,7 @@ char *g_info_ctrl_mem_str[INFO_CTRL_MEM_END] = {
     ".str_cons",
     ".int_extra1",
     ".int_extra2",
+    ".int_extra3",
 };
 
 char *g_info_ctrl_mode_str[INFO_CTRL_MODE_END] = {
@@ -581,24 +594,30 @@ static int dfd_info_get_cpld_voltage(int key, uint32_t *value)
         DBG_DEBUG(DBG_ERROR, "get cpld current voltage error, addr:0x%x, rv = %d\n", info_ctrl->addr, rv);
         return rv;
     }
-    vol_curr_tmp = DFD_GET_CPLD_VOLATGE_CODE_VALUE(vol_curr_tmp);
-    if (info_ctrl->addr == info_ctrl->int_extra1) {
-        vol_curr = DFD_GET_CPLD_VOLATGE_REAL_VALUE(vol_curr_tmp, vol_coefficient);
-        DBG_DEBUG(DBG_VERBOSE, "current voltage is reference voltage, vol_curr_tmp: 0x%x, coefficient: %u, vol_curr: %u\n",
-            vol_curr_tmp, vol_coefficient, vol_curr);
+    if (info_ctrl->int_extra3 == CPLD_VOLATGE_VALUE_MODE2) {
+        vol_curr_tmp = DFD_GET_CPLD_VOLATGE_CODE_VALUE2(vol_curr_tmp);
+        vol_curr = DFD_GET_CPLD_VOLATGE_REAL_VALUE2(vol_curr_tmp, vol_coefficient);
+        DBG_DEBUG(DBG_VERBOSE, "vol_curr_tmp = 0x%x, vol_curr = 0x%x, is same.\n", vol_curr_tmp, vol_curr);
     } else {
-        memcpy(&info_ctrl_tmp, info_ctrl, sizeof(info_ctrl_t));
-        info_ctrl_tmp.addr = info_ctrl->int_extra1;
-        rv = dfd_get_info_value(&info_ctrl_tmp, &vol_ref_tmp, NULL);
-        if (rv < 0) {
-            DBG_DEBUG(DBG_ERROR, "get cpld reference voltage error, addr: 0x%x, rv: %d\n", info_ctrl_tmp.addr, rv);
-            return rv;
-        }
-        vol_ref = DFD_GET_CPLD_VOLATGE_CODE_VALUE(vol_ref_tmp);
-        DBG_DEBUG(DBG_VERBOSE, "vol_ref_tmp: 0x%x, vol_ref: 0x%x\n", vol_ref_tmp, vol_ref);
-        vol_curr = (vol_curr_tmp * vol_coefficient) / vol_ref;
-        DBG_DEBUG(DBG_VERBOSE, "vol_curr_tmp: 0x%x, vol_ref: 0x%x, coefficient: %u, vol_curr: %u\n",
+        vol_curr_tmp = DFD_GET_CPLD_VOLATGE_CODE_VALUE(vol_curr_tmp);
+        if (info_ctrl->addr == info_ctrl->int_extra1) {
+            vol_curr = DFD_GET_CPLD_VOLATGE_REAL_VALUE(vol_curr_tmp, vol_coefficient);
+            DBG_DEBUG(DBG_VERBOSE, "current voltage is reference voltage, vol_curr_tmp: 0x%x, coefficient: %u, vol_curr: %u\n",
+             vol_curr_tmp, vol_coefficient, vol_curr);
+        } else {
+            memcpy(&info_ctrl_tmp, info_ctrl, sizeof(info_ctrl_t));
+            info_ctrl_tmp.addr = info_ctrl->int_extra1;
+            rv = dfd_get_info_value(&info_ctrl_tmp, &vol_ref_tmp, NULL);
+            if (rv < 0) {
+                DBG_DEBUG(DBG_ERROR, "get cpld reference voltage error, addr: 0x%x, rv: %d\n", info_ctrl_tmp.addr, rv);
+                return rv;
+            }
+            vol_ref = DFD_GET_CPLD_VOLATGE_CODE_VALUE(vol_ref_tmp);
+            DBG_DEBUG(DBG_VERBOSE, "vol_ref_tmp: 0x%x, vol_ref: 0x%x\n", vol_ref_tmp, vol_ref);
+            vol_curr = (vol_curr_tmp * vol_coefficient) / vol_ref;
+            DBG_DEBUG(DBG_VERBOSE, "vol_curr_tmp: 0x%x, vol_ref: 0x%x, coefficient: %u, vol_curr: %u\n",
             vol_curr_tmp, vol_ref, vol_coefficient, vol_curr);
+         }
     }
     *value = vol_curr;
     return DFD_RV_OK;
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h
index 2c304e99ca3a..88e8f92c10fe 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/include/dfd_cfg_info.h
@@ -72,6 +72,7 @@ typedef struct info_ctrl_s {
     char str_cons[INFO_STR_CONS_MAX_LEN];
     int32_t int_extra1;
     int32_t int_extra2;
+    int32_t int_extra3;      /* cpld voltage mode */
 } info_ctrl_t;
 
 typedef enum info_ctrl_mem_s {
@@ -87,6 +88,7 @@ typedef enum info_ctrl_mem_s {
     INFO_CTRL_MEM_STR_CONS,
     INFO_CTRL_MEM_INT_EXTRA1,
     INFO_CTRL_MEM_INT_EXTRA2,
+    INFO_CTRL_MEM_INT_EXTRA3,
     INFO_CTRL_MEM_END
 } info_ctrl_mem_t;
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/Makefile
new file mode 100644
index 000000000000..6831a03a60fd
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/Makefile
@@ -0,0 +1,18 @@
+PWD		= $(shell pwd)
+
+EXTRA_CFLAGS:= -I$(M)/include
+EXTRA_CFLAGS+= -Wall
+
+sdhci_pci-objs := sdhci-pci-core.o sdhci-pci-o2micro.o sdhci-pci-arasan.o \
+				   sdhci-pci-dwc-mshc.o sdhci-pci-gli.o
+obj-m += sdhci_pci.o
+
+
+all:
+	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
+	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
+	@if [ -f $(PWD)/*.ko ]; then cp -p $(PWD)/*.ko $(module_out_put_dir);fi
+clean:
+	rm -f $(PWD)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd 
+	rm -f $(PWD)/Module.markers $(PWD)/Module.symvers $(PWD)/modules.order 
+	rm -rf $(PWD)/.tmp_versions  
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/cqhci.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/cqhci.h
new file mode 100644
index 000000000000..89bf6adbce8c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/cqhci.h
@@ -0,0 +1,242 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ */
+#ifndef LINUX_MMC_CQHCI_H
+#define LINUX_MMC_CQHCI_H
+
+#include <linux/compiler.h>
+#include <linux/bitops.h>
+#include <linux/spinlock_types.h>
+#include <linux/types.h>
+#include <linux/completion.h>
+#include <linux/wait.h>
+#include <linux/irqreturn.h>
+#include <asm/io.h>
+
+/* registers */
+/* version */
+#define CQHCI_VER			0x00
+#define CQHCI_VER_MAJOR(x)		(((x) & GENMASK(11, 8)) >> 8)
+#define CQHCI_VER_MINOR1(x)		(((x) & GENMASK(7, 4)) >> 4)
+#define CQHCI_VER_MINOR2(x)		((x) & GENMASK(3, 0))
+
+/* capabilities */
+#define CQHCI_CAP			0x04
+/* configuration */
+#define CQHCI_CFG			0x08
+#define CQHCI_DCMD			0x00001000
+#define CQHCI_TASK_DESC_SZ		0x00000100
+#define CQHCI_ENABLE			0x00000001
+
+/* control */
+#define CQHCI_CTL			0x0C
+#define CQHCI_CLEAR_ALL_TASKS		0x00000100
+#define CQHCI_HALT			0x00000001
+
+/* interrupt status */
+#define CQHCI_IS			0x10
+#define CQHCI_IS_HAC			BIT(0)
+#define CQHCI_IS_TCC			BIT(1)
+#define CQHCI_IS_RED			BIT(2)
+#define CQHCI_IS_TCL			BIT(3)
+
+#define CQHCI_IS_MASK (CQHCI_IS_TCC | CQHCI_IS_RED)
+
+/* interrupt status enable */
+#define CQHCI_ISTE			0x14
+
+/* interrupt signal enable */
+#define CQHCI_ISGE			0x18
+
+/* interrupt coalescing */
+#define CQHCI_IC			0x1C
+#define CQHCI_IC_ENABLE			BIT(31)
+#define CQHCI_IC_RESET			BIT(16)
+#define CQHCI_IC_ICCTHWEN		BIT(15)
+#define CQHCI_IC_ICCTH(x)		(((x) & 0x1F) << 8)
+#define CQHCI_IC_ICTOVALWEN		BIT(7)
+#define CQHCI_IC_ICTOVAL(x)		((x) & 0x7F)
+
+/* task list base address */
+#define CQHCI_TDLBA			0x20
+
+/* task list base address upper */
+#define CQHCI_TDLBAU			0x24
+
+/* door-bell */
+#define CQHCI_TDBR			0x28
+
+/* task completion notification */
+#define CQHCI_TCN			0x2C
+
+/* device queue status */
+#define CQHCI_DQS			0x30
+
+/* device pending tasks */
+#define CQHCI_DPT			0x34
+
+/* task clear */
+#define CQHCI_TCLR			0x38
+
+/* send status config 1 */
+#define CQHCI_SSC1			0x40
+#define CQHCI_SSC1_CBC_MASK		GENMASK(19, 16)
+
+/* send status config 2 */
+#define CQHCI_SSC2			0x44
+
+/* response for dcmd */
+#define CQHCI_CRDCT			0x48
+
+/* response mode error mask */
+#define CQHCI_RMEM			0x50
+
+/* task error info */
+#define CQHCI_TERRI			0x54
+
+#define CQHCI_TERRI_C_INDEX(x)		((x) & GENMASK(5, 0))
+#define CQHCI_TERRI_C_TASK(x)		(((x) & GENMASK(12, 8)) >> 8)
+#define CQHCI_TERRI_C_VALID(x)		((x) & BIT(15))
+#define CQHCI_TERRI_D_INDEX(x)		(((x) & GENMASK(21, 16)) >> 16)
+#define CQHCI_TERRI_D_TASK(x)		(((x) & GENMASK(28, 24)) >> 24)
+#define CQHCI_TERRI_D_VALID(x)		((x) & BIT(31))
+
+/* command response index */
+#define CQHCI_CRI			0x58
+
+/* command response argument */
+#define CQHCI_CRA			0x5C
+
+#define CQHCI_INT_ALL			0xF
+#define CQHCI_IC_DEFAULT_ICCTH		31
+#define CQHCI_IC_DEFAULT_ICTOVAL	1
+
+/* attribute fields */
+#define CQHCI_VALID(x)			(((x) & 1) << 0)
+#define CQHCI_END(x)			(((x) & 1) << 1)
+#define CQHCI_INT(x)			(((x) & 1) << 2)
+#define CQHCI_ACT(x)			(((x) & 0x7) << 3)
+
+/* data command task descriptor fields */
+#define CQHCI_FORCED_PROG(x)		(((x) & 1) << 6)
+#define CQHCI_CONTEXT(x)		(((x) & 0xF) << 7)
+#define CQHCI_DATA_TAG(x)		(((x) & 1) << 11)
+#define CQHCI_DATA_DIR(x)		(((x) & 1) << 12)
+#define CQHCI_PRIORITY(x)		(((x) & 1) << 13)
+#define CQHCI_QBAR(x)			(((x) & 1) << 14)
+#define CQHCI_REL_WRITE(x)		(((x) & 1) << 15)
+#define CQHCI_BLK_COUNT(x)		(((x) & 0xFFFF) << 16)
+#define CQHCI_BLK_ADDR(x)		(((x) & 0xFFFFFFFF) << 32)
+
+/* direct command task descriptor fields */
+#define CQHCI_CMD_INDEX(x)		(((x) & 0x3F) << 16)
+#define CQHCI_CMD_TIMING(x)		(((x) & 1) << 22)
+#define CQHCI_RESP_TYPE(x)		(((x) & 0x3) << 23)
+
+/* transfer descriptor fields */
+#define CQHCI_DAT_LENGTH(x)		(((x) & 0xFFFF) << 16)
+#define CQHCI_DAT_ADDR_LO(x)		(((x) & 0xFFFFFFFF) << 32)
+#define CQHCI_DAT_ADDR_HI(x)		(((x) & 0xFFFFFFFF) << 0)
+
+struct cqhci_host_ops;
+struct mmc_host;
+struct mmc_request;
+struct cqhci_slot;
+
+struct cqhci_host {
+	const struct cqhci_host_ops *ops;
+	void __iomem *mmio;
+	struct mmc_host *mmc;
+
+	spinlock_t lock;
+
+	/* relative card address of device */
+	unsigned int rca;
+
+	/* 64 bit DMA */
+	bool dma64;
+	int num_slots;
+	int qcnt;
+
+	u32 dcmd_slot;
+	u32 caps;
+#define CQHCI_TASK_DESC_SZ_128		0x1
+
+	u32 quirks;
+#define CQHCI_QUIRK_SHORT_TXFR_DESC_SZ	0x1
+
+	bool enabled;
+	bool halted;
+	bool init_done;
+	bool activated;
+	bool waiting_for_idle;
+	bool recovery_halt;
+
+	size_t desc_size;
+	size_t data_size;
+
+	u8 *desc_base;
+
+	/* total descriptor size */
+	u8 slot_sz;
+
+	/* 64/128 bit depends on CQHCI_CFG */
+	u8 task_desc_len;
+
+	/* 64 bit on 32-bit arch, 128 bit on 64-bit */
+	u8 link_desc_len;
+
+	u8 *trans_desc_base;
+	/* same length as transfer descriptor */
+	u8 trans_desc_len;
+
+	dma_addr_t desc_dma_base;
+	dma_addr_t trans_desc_dma_base;
+
+	struct completion halt_comp;
+	wait_queue_head_t wait_queue;
+	struct cqhci_slot *slot;
+};
+
+struct cqhci_host_ops {
+	void (*dumpregs)(struct mmc_host *mmc);
+	void (*write_l)(struct cqhci_host *host, u32 val, int reg);
+	u32 (*read_l)(struct cqhci_host *host, int reg);
+	void (*enable)(struct mmc_host *mmc);
+	void (*disable)(struct mmc_host *mmc, bool recovery);
+	void (*update_dcmd_desc)(struct mmc_host *mmc, struct mmc_request *mrq,
+				 u64 *data);
+	void (*pre_enable)(struct mmc_host *mmc);
+	void (*post_disable)(struct mmc_host *mmc);
+};
+
+static inline void cqhci_writel(struct cqhci_host *host, u32 val, int reg)
+{
+	if (unlikely(host->ops->write_l))
+		host->ops->write_l(host, val, reg);
+	else
+		writel_relaxed(val, host->mmio + reg);
+}
+
+static inline u32 cqhci_readl(struct cqhci_host *host, int reg)
+{
+	if (unlikely(host->ops->read_l))
+		return host->ops->read_l(host, reg);
+	else
+		return readl_relaxed(host->mmio + reg);
+}
+
+struct platform_device;
+
+irqreturn_t cqhci_irq(struct mmc_host *mmc, u32 intmask, int cmd_error,
+		      int data_error);
+int cqhci_init(struct cqhci_host *cq_host, struct mmc_host *mmc, bool dma64);
+struct cqhci_host *cqhci_pltfm_init(struct platform_device *pdev);
+int cqhci_deactivate(struct mmc_host *mmc);
+static inline int cqhci_suspend(struct mmc_host *mmc)
+{
+	return cqhci_deactivate(mmc);
+}
+int cqhci_resume(struct mmc_host *mmc);
+
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-arasan.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-arasan.c
new file mode 100644
index 000000000000..499f3205ec5c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-arasan.c
@@ -0,0 +1,331 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * sdhci-pci-arasan.c - Driver for Arasan PCI Controller with
+ * integrated phy.
+ *
+ * Copyright (C) 2017 Arasan Chip Systems Inc.
+ *
+ * Author: Atul Garg <agarg@arasan.com>
+ */
+
+#include <linux/pci.h>
+#include <linux/delay.h>
+
+#include "sdhci.h"
+#include "sdhci-pci.h"
+
+/* Extra registers for Arasan SD/SDIO/MMC Host Controller with PHY */
+#define PHY_ADDR_REG	0x300
+#define PHY_DAT_REG	0x304
+
+#define PHY_WRITE	BIT(8)
+#define PHY_BUSY	BIT(9)
+#define DATA_MASK	0xFF
+
+/* PHY Specific Registers */
+#define DLL_STATUS	0x00
+#define IPAD_CTRL1	0x01
+#define IPAD_CTRL2	0x02
+#define IPAD_STS	0x03
+#define IOREN_CTRL1	0x06
+#define IOREN_CTRL2	0x07
+#define IOPU_CTRL1	0x08
+#define IOPU_CTRL2	0x09
+#define ITAP_DELAY	0x0C
+#define OTAP_DELAY	0x0D
+#define STRB_SEL	0x0E
+#define CLKBUF_SEL	0x0F
+#define MODE_CTRL	0x11
+#define DLL_TRIM	0x12
+#define CMD_CTRL	0x20
+#define DATA_CTRL	0x21
+#define STRB_CTRL	0x22
+#define CLK_CTRL	0x23
+#define PHY_CTRL	0x24
+
+#define DLL_ENBL	BIT(3)
+#define RTRIM_EN	BIT(1)
+#define PDB_ENBL	BIT(1)
+#define RETB_ENBL	BIT(6)
+#define ODEN_CMD	BIT(1)
+#define ODEN_DAT	0xFF
+#define REN_STRB	BIT(0)
+#define REN_CMND	BIT(1)
+#define REN_DATA	0xFF
+#define PU_CMD		BIT(1)
+#define PU_DAT		0xFF
+#define ITAPDLY_EN	BIT(0)
+#define OTAPDLY_EN	BIT(0)
+#define OD_REL_CMD	BIT(1)
+#define OD_REL_DAT	0xFF
+#define DLLTRM_ICP	0x8
+#define PDB_CMND	BIT(0)
+#define PDB_DATA	0xFF
+#define PDB_STRB	BIT(0)
+#define PDB_CLOCK	BIT(0)
+#define CALDONE_MASK	0x10
+#define DLL_RDY_MASK	0x10
+#define MAX_CLK_BUF	0x7
+
+/* Mode Controls */
+#define ENHSTRB_MODE	BIT(0)
+#define HS400_MODE	BIT(1)
+#define LEGACY_MODE	BIT(2)
+#define DDR50_MODE	BIT(3)
+
+/*
+ * Controller has no specific bits for HS200/HS.
+ * Used BIT(4), BIT(5) for software programming.
+ */
+#define HS200_MODE	BIT(4)
+#define HISPD_MODE	BIT(5)
+
+#define OTAPDLY(x)	(((x) << 1) | OTAPDLY_EN)
+#define ITAPDLY(x)	(((x) << 1) | ITAPDLY_EN)
+#define FREQSEL(x)	(((x) << 5) | DLL_ENBL)
+#define IOPAD(x, y)	((x) | ((y) << 2))
+
+/* Arasan private data */
+struct arasan_host {
+	u32 chg_clk;
+};
+
+static int arasan_phy_addr_poll(struct sdhci_host *host, u32 offset, u32 mask)
+{
+	ktime_t timeout = ktime_add_us(ktime_get(), 100);
+	bool failed;
+	u8 val = 0;
+
+	while (1) {
+		failed = ktime_after(ktime_get(), timeout);
+		val = sdhci_readw(host, PHY_ADDR_REG);
+		if (!(val & mask))
+			return 0;
+		if (failed)
+			return -EBUSY;
+	}
+}
+
+static int arasan_phy_write(struct sdhci_host *host, u8 data, u8 offset)
+{
+	sdhci_writew(host, data, PHY_DAT_REG);
+	sdhci_writew(host, (PHY_WRITE | offset), PHY_ADDR_REG);
+	return arasan_phy_addr_poll(host, PHY_ADDR_REG, PHY_BUSY);
+}
+
+static int arasan_phy_read(struct sdhci_host *host, u8 offset, u8 *data)
+{
+	int ret;
+
+	sdhci_writew(host, 0, PHY_DAT_REG);
+	sdhci_writew(host, offset, PHY_ADDR_REG);
+	ret = arasan_phy_addr_poll(host, PHY_ADDR_REG, PHY_BUSY);
+
+	/* Masking valid data bits */
+	*data = sdhci_readw(host, PHY_DAT_REG) & DATA_MASK;
+	return ret;
+}
+
+static int arasan_phy_sts_poll(struct sdhci_host *host, u32 offset, u32 mask)
+{
+	int ret;
+	ktime_t timeout = ktime_add_us(ktime_get(), 100);
+	bool failed;
+	u8 val = 0;
+
+	while (1) {
+		failed = ktime_after(ktime_get(), timeout);
+		ret = arasan_phy_read(host, offset, &val);
+		if (ret)
+			return -EBUSY;
+		else if (val & mask)
+			return 0;
+		if (failed)
+			return -EBUSY;
+	}
+}
+
+/* Initialize the Arasan PHY */
+static int arasan_phy_init(struct sdhci_host *host)
+{
+	int ret;
+	u8 val;
+
+	/* Program IOPADs and wait for calibration to be done */
+	if (arasan_phy_read(host, IPAD_CTRL1, &val) ||
+	    arasan_phy_write(host, val | RETB_ENBL | PDB_ENBL, IPAD_CTRL1) ||
+	    arasan_phy_read(host, IPAD_CTRL2, &val) ||
+	    arasan_phy_write(host, val | RTRIM_EN, IPAD_CTRL2))
+		return -EBUSY;
+	ret = arasan_phy_sts_poll(host, IPAD_STS, CALDONE_MASK);
+	if (ret)
+		return -EBUSY;
+
+	/* Program CMD/Data lines */
+	if (arasan_phy_read(host, IOREN_CTRL1, &val) ||
+	    arasan_phy_write(host, val | REN_CMND | REN_STRB, IOREN_CTRL1) ||
+	    arasan_phy_read(host, IOPU_CTRL1, &val) ||
+	    arasan_phy_write(host, val | PU_CMD, IOPU_CTRL1) ||
+	    arasan_phy_read(host, CMD_CTRL, &val) ||
+	    arasan_phy_write(host, val | PDB_CMND, CMD_CTRL) ||
+	    arasan_phy_read(host, IOREN_CTRL2, &val) ||
+	    arasan_phy_write(host, val | REN_DATA, IOREN_CTRL2) ||
+	    arasan_phy_read(host, IOPU_CTRL2, &val) ||
+	    arasan_phy_write(host, val | PU_DAT, IOPU_CTRL2) ||
+	    arasan_phy_read(host, DATA_CTRL, &val) ||
+	    arasan_phy_write(host, val | PDB_DATA, DATA_CTRL) ||
+	    arasan_phy_read(host, STRB_CTRL, &val) ||
+	    arasan_phy_write(host, val | PDB_STRB, STRB_CTRL) ||
+	    arasan_phy_read(host, CLK_CTRL, &val) ||
+	    arasan_phy_write(host, val | PDB_CLOCK, CLK_CTRL) ||
+	    arasan_phy_read(host, CLKBUF_SEL, &val) ||
+	    arasan_phy_write(host, val | MAX_CLK_BUF, CLKBUF_SEL) ||
+	    arasan_phy_write(host, LEGACY_MODE, MODE_CTRL))
+		return -EBUSY;
+	return 0;
+}
+
+/* Set Arasan PHY for different modes */
+static int arasan_phy_set(struct sdhci_host *host, u8 mode, u8 otap,
+			  u8 drv_type, u8 itap, u8 trim, u8 clk)
+{
+	u8 val;
+	int ret;
+
+	if (mode == HISPD_MODE || mode == HS200_MODE)
+		ret = arasan_phy_write(host, 0x0, MODE_CTRL);
+	else
+		ret = arasan_phy_write(host, mode, MODE_CTRL);
+	if (ret)
+		return ret;
+	if (mode == HS400_MODE || mode == HS200_MODE) {
+		ret = arasan_phy_read(host, IPAD_CTRL1, &val);
+		if (ret)
+			return ret;
+		ret = arasan_phy_write(host, IOPAD(val, drv_type), IPAD_CTRL1);
+		if (ret)
+			return ret;
+	}
+	if (mode == LEGACY_MODE) {
+		ret = arasan_phy_write(host, 0x0, OTAP_DELAY);
+		if (ret)
+			return ret;
+		ret = arasan_phy_write(host, 0x0, ITAP_DELAY);
+	} else {
+		ret = arasan_phy_write(host, OTAPDLY(otap), OTAP_DELAY);
+		if (ret)
+			return ret;
+		if (mode != HS200_MODE)
+			ret = arasan_phy_write(host, ITAPDLY(itap), ITAP_DELAY);
+		else
+			ret = arasan_phy_write(host, 0x0, ITAP_DELAY);
+	}
+	if (ret)
+		return ret;
+	if (mode != LEGACY_MODE) {
+		ret = arasan_phy_write(host, trim, DLL_TRIM);
+		if (ret)
+			return ret;
+	}
+	ret = arasan_phy_write(host, 0, DLL_STATUS);
+	if (ret)
+		return ret;
+	if (mode != LEGACY_MODE) {
+		ret = arasan_phy_write(host, FREQSEL(clk), DLL_STATUS);
+		if (ret)
+			return ret;
+		ret = arasan_phy_sts_poll(host, DLL_STATUS, DLL_RDY_MASK);
+		if (ret)
+			return -EBUSY;
+	}
+	return 0;
+}
+
+static int arasan_select_phy_clock(struct sdhci_host *host)
+{
+	struct sdhci_pci_slot *slot = sdhci_priv(host);
+	struct arasan_host *arasan_host = sdhci_pci_priv(slot);
+	u8 clk;
+
+	if (arasan_host->chg_clk == host->mmc->ios.clock)
+		return 0;
+
+	arasan_host->chg_clk = host->mmc->ios.clock;
+	if (host->mmc->ios.clock == 200000000)
+		clk = 0x0;
+	else if (host->mmc->ios.clock == 100000000)
+		clk = 0x2;
+	else if (host->mmc->ios.clock == 50000000)
+		clk = 0x1;
+	else
+		clk = 0x0;
+
+	if (host->mmc_host_ops.hs400_enhanced_strobe) {
+		arasan_phy_set(host, ENHSTRB_MODE, 1, 0x0, 0x0,
+			       DLLTRM_ICP, clk);
+	} else {
+		switch (host->mmc->ios.timing) {
+		case MMC_TIMING_LEGACY:
+			arasan_phy_set(host, LEGACY_MODE, 0x0, 0x0, 0x0,
+				       0x0, 0x0);
+			break;
+		case MMC_TIMING_MMC_HS:
+		case MMC_TIMING_SD_HS:
+			arasan_phy_set(host, HISPD_MODE, 0x3, 0x0, 0x2,
+				       DLLTRM_ICP, clk);
+			break;
+		case MMC_TIMING_MMC_HS200:
+		case MMC_TIMING_UHS_SDR104:
+			arasan_phy_set(host, HS200_MODE, 0x2,
+				       host->mmc->ios.drv_type, 0x0,
+				       DLLTRM_ICP, clk);
+			break;
+		case MMC_TIMING_MMC_DDR52:
+		case MMC_TIMING_UHS_DDR50:
+			arasan_phy_set(host, DDR50_MODE, 0x1, 0x0,
+				       0x0, DLLTRM_ICP, clk);
+			break;
+		case MMC_TIMING_MMC_HS400:
+			arasan_phy_set(host, HS400_MODE, 0x1,
+				       host->mmc->ios.drv_type, 0xa,
+				       DLLTRM_ICP, clk);
+			break;
+		default:
+			break;
+		}
+	}
+	return 0;
+}
+
+static int arasan_pci_probe_slot(struct sdhci_pci_slot *slot)
+{
+	int err;
+
+	slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE | MMC_CAP_8_BIT_DATA;
+	err = arasan_phy_init(slot->host);
+	if (err)
+		return -ENODEV;
+	return 0;
+}
+
+static void arasan_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
+{
+	sdhci_set_clock(host, clock);
+
+	/* Change phy settings for the new clock */
+	arasan_select_phy_clock(host);
+}
+
+static const struct sdhci_ops arasan_sdhci_pci_ops = {
+	.set_clock	= arasan_sdhci_set_clock,
+	.enable_dma	= sdhci_pci_enable_dma,
+	.set_bus_width	= sdhci_set_bus_width,
+	.reset		= sdhci_reset,
+	.set_uhs_signaling	= sdhci_set_uhs_signaling,
+};
+
+const struct sdhci_pci_fixes sdhci_arasan = {
+	.probe_slot = arasan_pci_probe_slot,
+	.ops        = &arasan_sdhci_pci_ops,
+	.priv_size  = sizeof(struct arasan_host),
+};
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-core.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-core.c
new file mode 100644
index 000000000000..5fe00b537df6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-core.c
@@ -0,0 +1,2566 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*  linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
+ *
+ *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
+ *
+ * Thanks to the following companies for their support:
+ *
+ *     - JMicron (hardware and technical support)
+ */
+
+#include <linux/bitfield.h>
+#include <linux/string.h>
+#include <linux/delay.h>
+#include <linux/highmem.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/dma-mapping.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+#include <linux/mmc/host.h>
+#include <linux/mmc/mmc.h>
+#include <linux/scatterlist.h>
+#include <linux/io.h>
+#include <linux/iopoll.h>
+#include <linux/gpio.h>
+#include <linux/pm_runtime.h>
+#include <linux/pm_qos.h>
+#include <linux/debugfs.h>
+#include <linux/mmc/slot-gpio.h>
+#include <linux/mmc/sdhci-pci-data.h>
+#include <linux/acpi.h>
+#include <linux/dmi.h>
+#include <linux/init.h>
+
+#ifdef CONFIG_X86
+#include <asm/iosf_mbi.h>
+#endif
+
+#include "cqhci.h"
+
+#include "sdhci.h"
+#include "sdhci-pci.h"
+
+#define mem_clear(data, size) memset((data), 0, (size))
+
+static int wb_sdhci_pci = 0;
+module_param(wb_sdhci_pci, int, S_IRUGO);
+
+static void sdhci_pci_hw_reset(struct sdhci_host *host);
+
+#ifdef CONFIG_PM_SLEEP
+static int sdhci_pci_init_wakeup(struct sdhci_pci_chip *chip)
+{
+	mmc_pm_flag_t pm_flags = 0;
+	bool cap_cd_wake = false;
+	int i;
+
+	for (i = 0; i < chip->num_slots; i++) {
+		struct sdhci_pci_slot *slot = chip->slots[i];
+
+		if (slot) {
+			pm_flags |= slot->host->mmc->pm_flags;
+			if (slot->host->mmc->caps & MMC_CAP_CD_WAKE)
+				cap_cd_wake = true;
+		}
+	}
+
+	if ((pm_flags & MMC_PM_KEEP_POWER) && (pm_flags & MMC_PM_WAKE_SDIO_IRQ))
+		return device_wakeup_enable(&chip->pdev->dev);
+	else if (!cap_cd_wake)
+		return device_wakeup_disable(&chip->pdev->dev);
+
+	return 0;
+}
+
+static int sdhci_pci_suspend_host(struct sdhci_pci_chip *chip)
+{
+	int i, ret;
+
+	sdhci_pci_init_wakeup(chip);
+
+	for (i = 0; i < chip->num_slots; i++) {
+		struct sdhci_pci_slot *slot = chip->slots[i];
+		struct sdhci_host *host;
+
+		if (!slot)
+			continue;
+
+		host = slot->host;
+
+		if (chip->pm_retune && host->tuning_mode != SDHCI_TUNING_MODE_3)
+			mmc_retune_needed(host->mmc);
+
+		ret = sdhci_suspend_host(host);
+		if (ret)
+			goto err_pci_suspend;
+
+		if (device_may_wakeup(&chip->pdev->dev))
+			mmc_gpio_set_cd_wake(host->mmc, true);
+	}
+
+	return 0;
+
+err_pci_suspend:
+	while (--i >= 0)
+		sdhci_resume_host(chip->slots[i]->host);
+	return ret;
+}
+
+int sdhci_pci_resume_host(struct sdhci_pci_chip *chip)
+{
+	struct sdhci_pci_slot *slot;
+	int i, ret;
+
+	for (i = 0; i < chip->num_slots; i++) {
+		slot = chip->slots[i];
+		if (!slot)
+			continue;
+
+		ret = sdhci_resume_host(slot->host);
+		if (ret)
+			return ret;
+
+		mmc_gpio_set_cd_wake(slot->host->mmc, false);
+	}
+
+	return 0;
+}
+
+static int sdhci_cqhci_suspend(struct sdhci_pci_chip *chip)
+{
+	int ret;
+
+	ret = cqhci_suspend(chip->slots[0]->host->mmc);
+	if (ret)
+		return ret;
+
+	return sdhci_pci_suspend_host(chip);
+}
+
+static int sdhci_cqhci_resume(struct sdhci_pci_chip *chip)
+{
+	int ret;
+
+	ret = sdhci_pci_resume_host(chip);
+	if (ret)
+		return ret;
+
+	return cqhci_resume(chip->slots[0]->host->mmc);
+}
+#endif
+
+#ifdef CONFIG_PM
+static int sdhci_pci_runtime_suspend_host(struct sdhci_pci_chip *chip)
+{
+	struct sdhci_pci_slot *slot;
+	struct sdhci_host *host;
+	int i, ret;
+
+	for (i = 0; i < chip->num_slots; i++) {
+		slot = chip->slots[i];
+		if (!slot)
+			continue;
+
+		host = slot->host;
+
+		ret = sdhci_runtime_suspend_host(host);
+		if (ret)
+			goto err_pci_runtime_suspend;
+
+		if (chip->rpm_retune &&
+		    host->tuning_mode != SDHCI_TUNING_MODE_3)
+			mmc_retune_needed(host->mmc);
+	}
+
+	return 0;
+
+err_pci_runtime_suspend:
+	while (--i >= 0)
+		sdhci_runtime_resume_host(chip->slots[i]->host, 0);
+	return ret;
+}
+
+static int sdhci_pci_runtime_resume_host(struct sdhci_pci_chip *chip)
+{
+	struct sdhci_pci_slot *slot;
+	int i, ret;
+
+	for (i = 0; i < chip->num_slots; i++) {
+		slot = chip->slots[i];
+		if (!slot)
+			continue;
+
+		ret = sdhci_runtime_resume_host(slot->host, 0);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int sdhci_cqhci_runtime_suspend(struct sdhci_pci_chip *chip)
+{
+	int ret;
+
+	ret = cqhci_suspend(chip->slots[0]->host->mmc);
+	if (ret)
+		return ret;
+
+	return sdhci_pci_runtime_suspend_host(chip);
+}
+
+static int sdhci_cqhci_runtime_resume(struct sdhci_pci_chip *chip)
+{
+	int ret;
+
+	ret = sdhci_pci_runtime_resume_host(chip);
+	if (ret)
+		return ret;
+
+	return cqhci_resume(chip->slots[0]->host->mmc);
+}
+#endif
+
+static u32 sdhci_cqhci_irq(struct sdhci_host *host, u32 intmask)
+{
+	int cmd_error = 0;
+	int data_error = 0;
+
+	if (!sdhci_cqe_irq(host, intmask, &cmd_error, &data_error))
+		return intmask;
+
+	cqhci_irq(host->mmc, intmask, cmd_error, data_error);
+
+	return 0;
+}
+
+static void sdhci_pci_dumpregs(struct mmc_host *mmc)
+{
+	sdhci_dumpregs(mmc_priv(mmc));
+}
+
+static void sdhci_cqhci_reset(struct sdhci_host *host, u8 mask)
+{
+	if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL) &&
+	    host->mmc->cqe_private)
+		cqhci_deactivate(host->mmc);
+	sdhci_reset(host, mask);
+}
+
+/*****************************************************************************\
+ *                                                                           *
+ * Hardware specific quirk handling                                          *
+ *                                                                           *
+\*****************************************************************************/
+
+static int ricoh_probe(struct sdhci_pci_chip *chip)
+{
+	if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
+	    chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
+		chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
+	return 0;
+}
+
+static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
+{
+	slot->host->caps =
+		FIELD_PREP(SDHCI_TIMEOUT_CLK_MASK, 0x21) |
+		FIELD_PREP(SDHCI_CLOCK_BASE_MASK, 0x21) |
+		SDHCI_TIMEOUT_CLK_UNIT |
+		SDHCI_CAN_VDD_330 |
+		SDHCI_CAN_DO_HISPD |
+		SDHCI_CAN_DO_SDMA;
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
+{
+	/* Apply a delay to allow controller to settle */
+	/* Otherwise it becomes confused if card state changed
+		during suspend */
+	msleep(500);
+	return sdhci_pci_resume_host(chip);
+}
+#endif
+
+static const struct sdhci_pci_fixes sdhci_ricoh = {
+	.probe		= ricoh_probe,
+	.quirks		= SDHCI_QUIRK_32BIT_DMA_ADDR |
+			  SDHCI_QUIRK_FORCE_DMA |
+			  SDHCI_QUIRK_CLOCK_BEFORE_RESET,
+};
+
+static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
+	.probe_slot	= ricoh_mmc_probe_slot,
+#ifdef CONFIG_PM_SLEEP
+	.resume		= ricoh_mmc_resume,
+#endif
+	.quirks		= SDHCI_QUIRK_32BIT_DMA_ADDR |
+			  SDHCI_QUIRK_CLOCK_BEFORE_RESET |
+			  SDHCI_QUIRK_NO_CARD_NO_RESET |
+			  SDHCI_QUIRK_MISSING_CAPS
+};
+
+static const struct sdhci_pci_fixes sdhci_ene_712 = {
+	.quirks		= SDHCI_QUIRK_SINGLE_POWER_WRITE |
+			  SDHCI_QUIRK_BROKEN_DMA,
+};
+
+static const struct sdhci_pci_fixes sdhci_ene_714 = {
+	.quirks		= SDHCI_QUIRK_SINGLE_POWER_WRITE |
+			  SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
+			  SDHCI_QUIRK_BROKEN_DMA,
+};
+
+static const struct sdhci_pci_fixes sdhci_cafe = {
+	.quirks		= SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
+			  SDHCI_QUIRK_NO_BUSY_IRQ |
+			  SDHCI_QUIRK_BROKEN_CARD_DETECTION |
+			  SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
+};
+
+static const struct sdhci_pci_fixes sdhci_intel_qrk = {
+	.quirks		= SDHCI_QUIRK_NO_HISPD_BIT,
+};
+
+static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
+{
+	slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
+	return 0;
+}
+
+/*
+ * ADMA operation is disabled for Moorestown platform due to
+ * hardware bugs.
+ */
+static int mrst_hc_probe(struct sdhci_pci_chip *chip)
+{
+	/*
+	 * slots number is fixed here for MRST as SDIO3/5 are never used and
+	 * have hardware bugs.
+	 */
+	chip->num_slots = 1;
+	return 0;
+}
+
+static int pch_hc_probe_slot(struct sdhci_pci_slot *slot)
+{
+	slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
+	return 0;
+}
+
+#ifdef CONFIG_PM
+
+static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id)
+{
+	struct sdhci_pci_slot *slot = dev_id;
+	struct sdhci_host *host = slot->host;
+
+	mmc_detect_change(host->mmc, msecs_to_jiffies(200));
+	return IRQ_HANDLED;
+}
+
+static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
+{
+	int err, irq, gpio = slot->cd_gpio;
+
+	slot->cd_gpio = -EINVAL;
+	slot->cd_irq = -EINVAL;
+
+	if (!gpio_is_valid(gpio))
+		return;
+
+	err = devm_gpio_request(&slot->chip->pdev->dev, gpio, "sd_cd");
+	if (err < 0)
+		goto out;
+
+	err = gpio_direction_input(gpio);
+	if (err < 0)
+		goto out_free;
+
+	irq = gpio_to_irq(gpio);
+	if (irq < 0)
+		goto out_free;
+
+	err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING |
+			  IRQF_TRIGGER_FALLING, "sd_cd", slot);
+	if (err)
+		goto out_free;
+
+	slot->cd_gpio = gpio;
+	slot->cd_irq = irq;
+
+	return;
+
+out_free:
+	devm_gpio_free(&slot->chip->pdev->dev, gpio);
+out:
+	dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n");
+}
+
+static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
+{
+	if (slot->cd_irq >= 0)
+		free_irq(slot->cd_irq, slot);
+}
+
+#else
+
+static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
+{
+}
+
+static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
+{
+}
+
+#endif
+
+static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
+{
+	slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
+	slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC;
+	return 0;
+}
+
+static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot)
+{
+	slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
+	return 0;
+}
+
+static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
+	.quirks		= SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
+	.probe_slot	= mrst_hc_probe_slot,
+};
+
+static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
+	.quirks		= SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
+	.probe		= mrst_hc_probe,
+};
+
+static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
+	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
+	.allow_runtime_pm = true,
+	.own_cd_for_runtime_pm = true,
+};
+
+static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = {
+	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
+	.quirks2	= SDHCI_QUIRK2_HOST_OFF_CARD_ON,
+	.allow_runtime_pm = true,
+	.probe_slot	= mfd_sdio_probe_slot,
+};
+
+static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = {
+	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
+	.allow_runtime_pm = true,
+	.probe_slot	= mfd_emmc_probe_slot,
+};
+
+static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = {
+	.quirks		= SDHCI_QUIRK_BROKEN_ADMA,
+	.probe_slot	= pch_hc_probe_slot,
+};
+
+#ifdef CONFIG_X86
+
+#define BYT_IOSF_SCCEP			0x63
+#define BYT_IOSF_OCP_NETCTRL0		0x1078
+#define BYT_IOSF_OCP_TIMEOUT_BASE	GENMASK(10, 8)
+
+static void byt_ocp_setting(struct pci_dev *pdev)
+{
+	u32 val = 0;
+
+	if (pdev->device != PCI_DEVICE_ID_INTEL_BYT_EMMC &&
+	    pdev->device != PCI_DEVICE_ID_INTEL_BYT_SDIO &&
+	    pdev->device != PCI_DEVICE_ID_INTEL_BYT_SD &&
+	    pdev->device != PCI_DEVICE_ID_INTEL_BYT_EMMC2)
+		return;
+
+	if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0,
+			  &val)) {
+		dev_err(&pdev->dev, "%s read error\n", __func__);
+		return;
+	}
+
+	if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE))
+		return;
+
+	val &= ~BYT_IOSF_OCP_TIMEOUT_BASE;
+
+	if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0,
+			   val)) {
+		dev_err(&pdev->dev, "%s write error\n", __func__);
+		return;
+	}
+
+	dev_dbg(&pdev->dev, "%s completed\n", __func__);
+}
+
+#else
+
+static inline void byt_ocp_setting(struct pci_dev *pdev)
+{
+}
+
+#endif
+
+enum {
+	INTEL_DSM_FNS		=  0,
+	INTEL_DSM_V18_SWITCH	=  3,
+	INTEL_DSM_V33_SWITCH	=  4,
+	INTEL_DSM_DRV_STRENGTH	=  9,
+	INTEL_DSM_D3_RETUNE	= 10,
+};
+
+struct intel_host {
+	u32	dsm_fns;
+	int	drv_strength;
+	bool	d3_retune;
+	bool	rpm_retune_ok;
+	bool	needs_pwr_off;
+	u32	glk_rx_ctrl1;
+	u32	glk_tun_val;
+	u32	active_ltr;
+	u32	idle_ltr;
+};
+
+static const guid_t intel_dsm_guid =
+	GUID_INIT(0xF6C13EA5, 0x65CD, 0x461F,
+		  0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61);
+
+static int __intel_dsm(struct intel_host *intel_host, struct device *dev,
+		       unsigned int fn, u32 *result)
+{
+	union acpi_object *obj;
+	int err = 0;
+	size_t len;
+
+	obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), &intel_dsm_guid, 0, fn, NULL);
+	if (!obj)
+		return -EOPNOTSUPP;
+
+	if (obj->type != ACPI_TYPE_BUFFER || obj->buffer.length < 1) {
+		err = -EINVAL;
+		goto out;
+	}
+
+	len = min_t(size_t, obj->buffer.length, 4);
+
+	*result = 0;
+	memcpy(result, obj->buffer.pointer, len);
+out:
+	ACPI_FREE(obj);
+
+	return err;
+}
+
+static int intel_dsm(struct intel_host *intel_host, struct device *dev,
+		     unsigned int fn, u32 *result)
+{
+	if (fn > 31 || !(intel_host->dsm_fns & (1 << fn)))
+		return -EOPNOTSUPP;
+
+	return __intel_dsm(intel_host, dev, fn, result);
+}
+
+static void intel_dsm_init(struct intel_host *intel_host, struct device *dev,
+			   struct mmc_host *mmc)
+{
+	int err;
+	u32 val;
+
+	intel_host->d3_retune = true;
+
+	err = __intel_dsm(intel_host, dev, INTEL_DSM_FNS, &intel_host->dsm_fns);
+	if (err) {
+		pr_debug("%s: DSM not supported, error %d\n",
+			 mmc_hostname(mmc), err);
+		return;
+	}
+
+	pr_debug("%s: DSM function mask %#x\n",
+		 mmc_hostname(mmc), intel_host->dsm_fns);
+
+	err = intel_dsm(intel_host, dev, INTEL_DSM_DRV_STRENGTH, &val);
+	intel_host->drv_strength = err ? 0 : val;
+
+	err = intel_dsm(intel_host, dev, INTEL_DSM_D3_RETUNE, &val);
+	intel_host->d3_retune = err ? true : !!val;
+}
+
+static void sdhci_pci_int_hw_reset(struct sdhci_host *host)
+{
+	u8 reg;
+
+	reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
+	reg |= 0x10;
+	sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
+	/* For eMMC, minimum is 1us but give it 9us for good measure */
+	udelay(9);
+	reg &= ~0x10;
+	sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
+	/* For eMMC, minimum is 200us but give it 300us for good measure */
+	usleep_range(300, 1000);
+}
+
+static int intel_select_drive_strength(struct mmc_card *card,
+				       unsigned int max_dtr, int host_drv,
+				       int card_drv, int *drv_type)
+{
+	struct sdhci_host *host = mmc_priv(card->host);
+	struct sdhci_pci_slot *slot = sdhci_priv(host);
+	struct intel_host *intel_host = sdhci_pci_priv(slot);
+
+	if (!(mmc_driver_type_mask(intel_host->drv_strength) & card_drv))
+		return 0;
+
+	return intel_host->drv_strength;
+}
+
+static int bxt_get_cd(struct mmc_host *mmc)
+{
+	int gpio_cd = mmc_gpio_get_cd(mmc);
+	struct sdhci_host *host = mmc_priv(mmc);
+	unsigned long flags;
+	int ret = 0;
+
+	if (!gpio_cd)
+		return 0;
+
+	spin_lock_irqsave(&host->lock, flags);
+
+	if (host->flags & SDHCI_DEVICE_DEAD)
+		goto out;
+
+	ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
+out:
+	spin_unlock_irqrestore(&host->lock, flags);
+
+	return ret;
+}
+
+#define SDHCI_INTEL_PWR_TIMEOUT_CNT	20
+#define SDHCI_INTEL_PWR_TIMEOUT_UDELAY	100
+
+static void sdhci_intel_set_power(struct sdhci_host *host, unsigned char mode,
+				  unsigned short vdd)
+{
+	struct sdhci_pci_slot *slot = sdhci_priv(host);
+	struct intel_host *intel_host = sdhci_pci_priv(slot);
+	int cntr;
+	u8 reg;
+
+	/*
+	 * Bus power may control card power, but a full reset still may not
+	 * reset the power, whereas a direct write to SDHCI_POWER_CONTROL can.
+	 * That might be needed to initialize correctly, if the card was left
+	 * powered on previously.
+	 */
+	if (intel_host->needs_pwr_off) {
+		intel_host->needs_pwr_off = false;
+		if (mode != MMC_POWER_OFF) {
+			sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
+			usleep_range(10000, 12500);
+		}
+	}
+
+	sdhci_set_power(host, mode, vdd);
+
+	if (mode == MMC_POWER_OFF)
+		return;
+
+	/*
+	 * Bus power might not enable after D3 -> D0 transition due to the
+	 * present state not yet having propagated. Retry for up to 2ms.
+	 */
+	for (cntr = 0; cntr < SDHCI_INTEL_PWR_TIMEOUT_CNT; cntr++) {
+		reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
+		if (reg & SDHCI_POWER_ON)
+			break;
+		udelay(SDHCI_INTEL_PWR_TIMEOUT_UDELAY);
+		reg |= SDHCI_POWER_ON;
+		sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
+	}
+}
+
+static void sdhci_intel_set_uhs_signaling(struct sdhci_host *host,
+					  unsigned int timing)
+{
+	/* Set UHS timing to SDR25 for High Speed mode */
+	if (timing == MMC_TIMING_MMC_HS || timing == MMC_TIMING_SD_HS)
+		timing = MMC_TIMING_UHS_SDR25;
+	sdhci_set_uhs_signaling(host, timing);
+}
+
+#define INTEL_HS400_ES_REG 0x78
+#define INTEL_HS400_ES_BIT BIT(0)
+
+static void intel_hs400_enhanced_strobe(struct mmc_host *mmc,
+					struct mmc_ios *ios)
+{
+	struct sdhci_host *host = mmc_priv(mmc);
+	u32 val;
+
+	val = sdhci_readl(host, INTEL_HS400_ES_REG);
+	if (ios->enhanced_strobe)
+		val |= INTEL_HS400_ES_BIT;
+	else
+		val &= ~INTEL_HS400_ES_BIT;
+	sdhci_writel(host, val, INTEL_HS400_ES_REG);
+}
+
+static int intel_start_signal_voltage_switch(struct mmc_host *mmc,
+					     struct mmc_ios *ios)
+{
+	struct device *dev = mmc_dev(mmc);
+	struct sdhci_host *host = mmc_priv(mmc);
+	struct sdhci_pci_slot *slot = sdhci_priv(host);
+	struct intel_host *intel_host = sdhci_pci_priv(slot);
+	unsigned int fn;
+	u32 result = 0;
+	int err;
+
+	err = sdhci_start_signal_voltage_switch(mmc, ios);
+	if (err)
+		return err;
+
+	switch (ios->signal_voltage) {
+	case MMC_SIGNAL_VOLTAGE_330:
+		fn = INTEL_DSM_V33_SWITCH;
+		break;
+	case MMC_SIGNAL_VOLTAGE_180:
+		fn = INTEL_DSM_V18_SWITCH;
+		break;
+	default:
+		return 0;
+	}
+
+	err = intel_dsm(intel_host, dev, fn, &result);
+	pr_debug("%s: %s DSM fn %u error %d result %u\n",
+		 mmc_hostname(mmc), __func__, fn, err, result);
+
+	return 0;
+}
+
+static const struct sdhci_ops sdhci_intel_byt_ops = {
+	.set_clock		= sdhci_set_clock,
+	.set_power		= sdhci_intel_set_power,
+	.enable_dma		= sdhci_pci_enable_dma,
+	.set_bus_width		= sdhci_set_bus_width,
+	.reset			= sdhci_reset,
+	.set_uhs_signaling	= sdhci_intel_set_uhs_signaling,
+	.hw_reset		= sdhci_pci_hw_reset,
+};
+
+static const struct sdhci_ops sdhci_intel_glk_ops = {
+	.set_clock		= sdhci_set_clock,
+	.set_power		= sdhci_intel_set_power,
+	.enable_dma		= sdhci_pci_enable_dma,
+	.set_bus_width		= sdhci_set_bus_width,
+	.reset			= sdhci_cqhci_reset,
+	.set_uhs_signaling	= sdhci_intel_set_uhs_signaling,
+	.hw_reset		= sdhci_pci_hw_reset,
+	.irq			= sdhci_cqhci_irq,
+};
+
+static void byt_read_dsm(struct sdhci_pci_slot *slot)
+{
+	struct intel_host *intel_host = sdhci_pci_priv(slot);
+	struct device *dev = &slot->chip->pdev->dev;
+	struct mmc_host *mmc = slot->host->mmc;
+
+	intel_dsm_init(intel_host, dev, mmc);
+	slot->chip->rpm_retune = intel_host->d3_retune;
+}
+
+static int intel_execute_tuning(struct mmc_host *mmc, u32 opcode)
+{
+	int err = sdhci_execute_tuning(mmc, opcode);
+	struct sdhci_host *host = mmc_priv(mmc);
+
+	if (err)
+		return err;
+
+	/*
+	 * Tuning can leave the IP in an active state (Buffer Read Enable bit
+	 * set) which prevents the entry to low power states (i.e. S0i3). Data
+	 * reset will clear it.
+	 */
+	sdhci_reset(host, SDHCI_RESET_DATA);
+
+	return 0;
+}
+
+#define INTEL_ACTIVELTR		0x804
+#define INTEL_IDLELTR		0x808
+
+#define INTEL_LTR_REQ		BIT(15)
+#define INTEL_LTR_SCALE_MASK	GENMASK(11, 10)
+#define INTEL_LTR_SCALE_1US	(2 << 10)
+#define INTEL_LTR_SCALE_32US	(3 << 10)
+#define INTEL_LTR_VALUE_MASK	GENMASK(9, 0)
+
+static void intel_cache_ltr(struct sdhci_pci_slot *slot)
+{
+	struct intel_host *intel_host = sdhci_pci_priv(slot);
+	struct sdhci_host *host = slot->host;
+
+	intel_host->active_ltr = readl(host->ioaddr + INTEL_ACTIVELTR);
+	intel_host->idle_ltr = readl(host->ioaddr + INTEL_IDLELTR);
+}
+
+static void intel_ltr_set(struct device *dev, s32 val)
+{
+	struct sdhci_pci_chip *chip = dev_get_drvdata(dev);
+	struct sdhci_pci_slot *slot = chip->slots[0];
+	struct intel_host *intel_host = sdhci_pci_priv(slot);
+	struct sdhci_host *host = slot->host;
+	u32 ltr;
+
+	pm_runtime_get_sync(dev);
+
+	/*
+	 * Program latency tolerance (LTR) accordingly what has been asked
+	 * by the PM QoS layer or disable it in case we were passed
+	 * negative value or PM_QOS_LATENCY_ANY.
+	 */
+	ltr = readl(host->ioaddr + INTEL_ACTIVELTR);
+
+	if (val == PM_QOS_LATENCY_ANY || val < 0) {
+		ltr &= ~INTEL_LTR_REQ;
+	} else {
+		ltr |= INTEL_LTR_REQ;
+		ltr &= ~INTEL_LTR_SCALE_MASK;
+		ltr &= ~INTEL_LTR_VALUE_MASK;
+
+		if (val > INTEL_LTR_VALUE_MASK) {
+			val >>= 5;
+			if (val > INTEL_LTR_VALUE_MASK)
+				val = INTEL_LTR_VALUE_MASK;
+			ltr |= INTEL_LTR_SCALE_32US | val;
+		} else {
+			ltr |= INTEL_LTR_SCALE_1US | val;
+		}
+	}
+
+	if (ltr == intel_host->active_ltr)
+		goto out;
+
+	writel(ltr, host->ioaddr + INTEL_ACTIVELTR);
+	writel(ltr, host->ioaddr + INTEL_IDLELTR);
+
+	/* Cache the values into lpss structure */
+	intel_cache_ltr(slot);
+out:
+	pm_runtime_put_autosuspend(dev);
+}
+
+static bool intel_use_ltr(struct sdhci_pci_chip *chip)
+{
+	switch (chip->pdev->device) {
+	case PCI_DEVICE_ID_INTEL_BYT_EMMC:
+	case PCI_DEVICE_ID_INTEL_BYT_EMMC2:
+	case PCI_DEVICE_ID_INTEL_BYT_SDIO:
+	case PCI_DEVICE_ID_INTEL_BYT_SD:
+	case PCI_DEVICE_ID_INTEL_BSW_EMMC:
+	case PCI_DEVICE_ID_INTEL_BSW_SDIO:
+	case PCI_DEVICE_ID_INTEL_BSW_SD:
+		return false;
+	default:
+		return true;
+	}
+}
+
+static void intel_ltr_expose(struct sdhci_pci_chip *chip)
+{
+	struct device *dev = &chip->pdev->dev;
+
+	if (!intel_use_ltr(chip))
+		return;
+
+	dev->power.set_latency_tolerance = intel_ltr_set;
+	dev_pm_qos_expose_latency_tolerance(dev);
+}
+
+static void intel_ltr_hide(struct sdhci_pci_chip *chip)
+{
+	struct device *dev = &chip->pdev->dev;
+
+	if (!intel_use_ltr(chip))
+		return;
+
+	dev_pm_qos_hide_latency_tolerance(dev);
+	dev->power.set_latency_tolerance = NULL;
+}
+
+static void byt_probe_slot(struct sdhci_pci_slot *slot)
+{
+	struct mmc_host_ops *ops = &slot->host->mmc_host_ops;
+	struct device *dev = &slot->chip->pdev->dev;
+	struct mmc_host *mmc = slot->host->mmc;
+
+	byt_read_dsm(slot);
+
+	byt_ocp_setting(slot->chip->pdev);
+
+	ops->execute_tuning = intel_execute_tuning;
+	ops->start_signal_voltage_switch = intel_start_signal_voltage_switch;
+
+	device_property_read_u32(dev, "max-frequency", &mmc->f_max);
+
+	if (!mmc->slotno) {
+		slot->chip->slots[mmc->slotno] = slot;
+		intel_ltr_expose(slot->chip);
+	}
+}
+
+static void byt_add_debugfs(struct sdhci_pci_slot *slot)
+{
+	struct intel_host *intel_host = sdhci_pci_priv(slot);
+	struct mmc_host *mmc = slot->host->mmc;
+	struct dentry *dir = mmc->debugfs_root;
+
+	if (!intel_use_ltr(slot->chip))
+		return;
+
+	debugfs_create_x32("active_ltr", 0444, dir, &intel_host->active_ltr);
+	debugfs_create_x32("idle_ltr", 0444, dir, &intel_host->idle_ltr);
+
+	intel_cache_ltr(slot);
+}
+
+static int byt_add_host(struct sdhci_pci_slot *slot)
+{
+	int ret = sdhci_add_host(slot->host);
+
+	if (!ret)
+		byt_add_debugfs(slot);
+	return ret;
+}
+
+static void byt_remove_slot(struct sdhci_pci_slot *slot, int dead)
+{
+	struct mmc_host *mmc = slot->host->mmc;
+
+	if (!mmc->slotno)
+		intel_ltr_hide(slot->chip);
+}
+
+static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
+{
+	byt_probe_slot(slot);
+	slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
+				 MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
+				 MMC_CAP_CMD_DURING_TFR |
+				 MMC_CAP_WAIT_WHILE_BUSY;
+	slot->hw_reset = sdhci_pci_int_hw_reset;
+	if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BSW_EMMC)
+		slot->host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
+	slot->host->mmc_host_ops.select_drive_strength =
+						intel_select_drive_strength;
+	return 0;
+}
+
+static int dnv_emmc_hs_probe_slot(struct sdhci_pci_slot *slot)
+{
+    /* Remove 1.8V capability, if 1.8V is supported, it will be negotiated to DDR mode */
+	slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
+				 MMC_CAP_HW_RESET |
+				 MMC_CAP_CMD_DURING_TFR |
+				 MMC_CAP_WAIT_WHILE_BUSY;
+	slot->hw_reset = sdhci_pci_int_hw_reset;
+	return 0;
+}
+
+static bool glk_broken_cqhci(struct sdhci_pci_slot *slot)
+{
+	return slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_GLK_EMMC &&
+	       (dmi_match(DMI_BIOS_VENDOR, "LENOVO") ||
+		dmi_match(DMI_SYS_VENDOR, "IRBIS"));
+}
+
+static int glk_emmc_probe_slot(struct sdhci_pci_slot *slot)
+{
+	int ret = byt_emmc_probe_slot(slot);
+
+	if (!glk_broken_cqhci(slot))
+		slot->host->mmc->caps2 |= MMC_CAP2_CQE;
+
+	if (slot->chip->pdev->device != PCI_DEVICE_ID_INTEL_GLK_EMMC) {
+		slot->host->mmc->caps2 |= MMC_CAP2_HS400_ES,
+		slot->host->mmc_host_ops.hs400_enhanced_strobe =
+						intel_hs400_enhanced_strobe;
+		slot->host->mmc->caps2 |= MMC_CAP2_CQE_DCMD;
+	}
+
+	return ret;
+}
+
+static const struct cqhci_host_ops glk_cqhci_ops = {
+	.enable		= sdhci_cqe_enable,
+	.disable	= sdhci_cqe_disable,
+	.dumpregs	= sdhci_pci_dumpregs,
+};
+
+static int glk_emmc_add_host(struct sdhci_pci_slot *slot)
+{
+	struct device *dev = &slot->chip->pdev->dev;
+	struct sdhci_host *host = slot->host;
+	struct cqhci_host *cq_host;
+	bool dma64;
+	int ret;
+
+	ret = sdhci_setup_host(host);
+	if (ret)
+		return ret;
+
+	cq_host = devm_kzalloc(dev, sizeof(*cq_host), GFP_KERNEL);
+	if (!cq_host) {
+		ret = -ENOMEM;
+		goto cleanup;
+	}
+
+	cq_host->mmio = host->ioaddr + 0x200;
+	cq_host->quirks |= CQHCI_QUIRK_SHORT_TXFR_DESC_SZ;
+	cq_host->ops = &glk_cqhci_ops;
+
+	dma64 = host->flags & SDHCI_USE_64_BIT_DMA;
+	if (dma64)
+		cq_host->caps |= CQHCI_TASK_DESC_SZ_128;
+
+	ret = cqhci_init(cq_host, host->mmc, dma64);
+	if (ret)
+		goto cleanup;
+
+	ret = __sdhci_add_host(host);
+	if (ret)
+		goto cleanup;
+
+	byt_add_debugfs(slot);
+
+	return 0;
+
+cleanup:
+	sdhci_cleanup_host(host);
+	return ret;
+}
+
+#ifdef CONFIG_PM
+#define GLK_RX_CTRL1	0x834
+#define GLK_TUN_VAL	0x840
+#define GLK_PATH_PLL	GENMASK(13, 8)
+#define GLK_DLY		GENMASK(6, 0)
+/* Workaround firmware failing to restore the tuning value */
+static void glk_rpm_retune_wa(struct sdhci_pci_chip *chip, bool susp)
+{
+	struct sdhci_pci_slot *slot = chip->slots[0];
+	struct intel_host *intel_host = sdhci_pci_priv(slot);
+	struct sdhci_host *host = slot->host;
+	u32 glk_rx_ctrl1;
+	u32 glk_tun_val;
+	u32 dly;
+
+	if (intel_host->rpm_retune_ok || !mmc_can_retune(host->mmc))
+		return;
+
+	glk_rx_ctrl1 = sdhci_readl(host, GLK_RX_CTRL1);
+	glk_tun_val = sdhci_readl(host, GLK_TUN_VAL);
+
+	if (susp) {
+		intel_host->glk_rx_ctrl1 = glk_rx_ctrl1;
+		intel_host->glk_tun_val = glk_tun_val;
+		return;
+	}
+
+	if (!intel_host->glk_tun_val)
+		return;
+
+	if (glk_rx_ctrl1 != intel_host->glk_rx_ctrl1) {
+		intel_host->rpm_retune_ok = true;
+		return;
+	}
+
+	dly = FIELD_PREP(GLK_DLY, FIELD_GET(GLK_PATH_PLL, glk_rx_ctrl1) +
+				  (intel_host->glk_tun_val << 1));
+	if (dly == FIELD_GET(GLK_DLY, glk_rx_ctrl1))
+		return;
+
+	glk_rx_ctrl1 = (glk_rx_ctrl1 & ~GLK_DLY) | dly;
+	sdhci_writel(host, glk_rx_ctrl1, GLK_RX_CTRL1);
+
+	intel_host->rpm_retune_ok = true;
+	chip->rpm_retune = true;
+	mmc_retune_needed(host->mmc);
+	pr_info("%s: Requiring re-tune after rpm resume", mmc_hostname(host->mmc));
+}
+
+static void glk_rpm_retune_chk(struct sdhci_pci_chip *chip, bool susp)
+{
+	if (chip->pdev->device == PCI_DEVICE_ID_INTEL_GLK_EMMC &&
+	    !chip->rpm_retune)
+		glk_rpm_retune_wa(chip, susp);
+}
+
+static int glk_runtime_suspend(struct sdhci_pci_chip *chip)
+{
+	glk_rpm_retune_chk(chip, true);
+
+	return sdhci_cqhci_runtime_suspend(chip);
+}
+
+static int glk_runtime_resume(struct sdhci_pci_chip *chip)
+{
+	glk_rpm_retune_chk(chip, false);
+
+	return sdhci_cqhci_runtime_resume(chip);
+}
+#endif
+
+#ifdef CONFIG_ACPI
+static int ni_set_max_freq(struct sdhci_pci_slot *slot)
+{
+	acpi_status status;
+	unsigned long long max_freq;
+
+	status = acpi_evaluate_integer(ACPI_HANDLE(&slot->chip->pdev->dev),
+				       "MXFQ", NULL, &max_freq);
+	if (ACPI_FAILURE(status)) {
+		dev_err(&slot->chip->pdev->dev,
+			"MXFQ not found in acpi table\n");
+		return -EINVAL;
+	}
+
+	slot->host->mmc->f_max = max_freq * 1000000;
+
+	return 0;
+}
+#else
+static inline int ni_set_max_freq(struct sdhci_pci_slot *slot)
+{
+	return 0;
+}
+#endif
+
+static int ni_byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
+{
+	int err;
+
+	byt_probe_slot(slot);
+
+	err = ni_set_max_freq(slot);
+	if (err)
+		return err;
+
+	slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE |
+				 MMC_CAP_WAIT_WHILE_BUSY;
+	return 0;
+}
+
+static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
+{
+	byt_probe_slot(slot);
+	slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE |
+				 MMC_CAP_WAIT_WHILE_BUSY;
+	return 0;
+}
+
+static void byt_needs_pwr_off(struct sdhci_pci_slot *slot)
+{
+	struct intel_host *intel_host = sdhci_pci_priv(slot);
+	u8 reg = sdhci_readb(slot->host, SDHCI_POWER_CONTROL);
+
+	intel_host->needs_pwr_off = reg  & SDHCI_POWER_ON;
+}
+
+static int byt_sd_probe_slot(struct sdhci_pci_slot *slot)
+{
+	byt_probe_slot(slot);
+	slot->host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY |
+				 MMC_CAP_AGGRESSIVE_PM | MMC_CAP_CD_WAKE;
+	slot->cd_idx = 0;
+	slot->cd_override_level = true;
+	if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXT_SD ||
+	    slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXTM_SD ||
+	    slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_APL_SD ||
+	    slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_GLK_SD)
+		slot->host->mmc_host_ops.get_cd = bxt_get_cd;
+
+	if (slot->chip->pdev->subsystem_vendor == PCI_VENDOR_ID_NI &&
+	    slot->chip->pdev->subsystem_device == PCI_SUBDEVICE_ID_NI_78E3)
+		slot->host->mmc->caps2 |= MMC_CAP2_AVOID_3_3V;
+
+	byt_needs_pwr_off(slot);
+
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+
+static int byt_resume(struct sdhci_pci_chip *chip)
+{
+	byt_ocp_setting(chip->pdev);
+
+	return sdhci_pci_resume_host(chip);
+}
+
+#endif
+
+#ifdef CONFIG_PM
+
+static int byt_runtime_resume(struct sdhci_pci_chip *chip)
+{
+	byt_ocp_setting(chip->pdev);
+
+	return sdhci_pci_runtime_resume_host(chip);
+}
+
+#endif
+
+static struct sdhci_pci_fixes sdhci_intel_dnv_emmc = {
+#ifdef CONFIG_PM_SLEEP
+	.resume		= byt_resume,
+#endif
+#ifdef CONFIG_PM
+	.runtime_resume	= byt_runtime_resume,
+#endif
+	.allow_runtime_pm = true,
+	.probe_slot	= byt_emmc_probe_slot,
+	.add_host	= byt_add_host,
+	.remove_slot	= byt_remove_slot,
+	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
+			  SDHCI_QUIRK_NO_LED,
+	.quirks2	= SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
+			  SDHCI_QUIRK2_STOP_WITH_TC,
+	.ops		= &sdhci_intel_byt_ops,
+	.priv_size	= sizeof(struct intel_host),
+};
+
+static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = {
+#ifdef CONFIG_PM_SLEEP
+	.resume		= byt_resume,
+#endif
+#ifdef CONFIG_PM
+	.runtime_resume	= byt_runtime_resume,
+#endif
+	.allow_runtime_pm = true,
+	.probe_slot	= byt_emmc_probe_slot,
+	.add_host	= byt_add_host,
+	.remove_slot	= byt_remove_slot,
+	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
+			  SDHCI_QUIRK_NO_LED,
+	.quirks2	= SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
+			  SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 |
+			  SDHCI_QUIRK2_STOP_WITH_TC,
+	.ops		= &sdhci_intel_byt_ops,
+	.priv_size	= sizeof(struct intel_host),
+};
+
+static const struct sdhci_pci_fixes sdhci_intel_glk_emmc = {
+	.allow_runtime_pm	= true,
+	.probe_slot		= glk_emmc_probe_slot,
+	.add_host		= glk_emmc_add_host,
+	.remove_slot		= byt_remove_slot,
+#ifdef CONFIG_PM_SLEEP
+	.suspend		= sdhci_cqhci_suspend,
+	.resume			= sdhci_cqhci_resume,
+#endif
+#ifdef CONFIG_PM
+	.runtime_suspend	= glk_runtime_suspend,
+	.runtime_resume		= glk_runtime_resume,
+#endif
+	.quirks			= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
+				  SDHCI_QUIRK_NO_LED,
+	.quirks2		= SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
+				  SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 |
+				  SDHCI_QUIRK2_STOP_WITH_TC,
+	.ops			= &sdhci_intel_glk_ops,
+	.priv_size		= sizeof(struct intel_host),
+};
+
+static const struct sdhci_pci_fixes sdhci_ni_byt_sdio = {
+#ifdef CONFIG_PM_SLEEP
+	.resume		= byt_resume,
+#endif
+#ifdef CONFIG_PM
+	.runtime_resume	= byt_runtime_resume,
+#endif
+	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
+			  SDHCI_QUIRK_NO_LED,
+	.quirks2	= SDHCI_QUIRK2_HOST_OFF_CARD_ON |
+			  SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
+	.allow_runtime_pm = true,
+	.probe_slot	= ni_byt_sdio_probe_slot,
+	.add_host	= byt_add_host,
+	.remove_slot	= byt_remove_slot,
+	.ops		= &sdhci_intel_byt_ops,
+	.priv_size	= sizeof(struct intel_host),
+};
+
+static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = {
+#ifdef CONFIG_PM_SLEEP
+	.resume		= byt_resume,
+#endif
+#ifdef CONFIG_PM
+	.runtime_resume	= byt_runtime_resume,
+#endif
+	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
+			  SDHCI_QUIRK_NO_LED,
+	.quirks2	= SDHCI_QUIRK2_HOST_OFF_CARD_ON |
+			SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
+	.allow_runtime_pm = true,
+	.probe_slot	= byt_sdio_probe_slot,
+	.add_host	= byt_add_host,
+	.remove_slot	= byt_remove_slot,
+	.ops		= &sdhci_intel_byt_ops,
+	.priv_size	= sizeof(struct intel_host),
+};
+
+static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
+#ifdef CONFIG_PM_SLEEP
+	.resume		= byt_resume,
+#endif
+#ifdef CONFIG_PM
+	.runtime_resume	= byt_runtime_resume,
+#endif
+	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
+			  SDHCI_QUIRK_NO_LED,
+	.quirks2	= SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
+			  SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
+			  SDHCI_QUIRK2_STOP_WITH_TC,
+	.allow_runtime_pm = true,
+	.own_cd_for_runtime_pm = true,
+	.probe_slot	= byt_sd_probe_slot,
+	.add_host	= byt_add_host,
+	.remove_slot	= byt_remove_slot,
+	.ops		= &sdhci_intel_byt_ops,
+	.priv_size	= sizeof(struct intel_host),
+};
+
+/* Define Host controllers for Intel Merrifield platform */
+#define INTEL_MRFLD_EMMC_0	0
+#define INTEL_MRFLD_EMMC_1	1
+#define INTEL_MRFLD_SD		2
+#define INTEL_MRFLD_SDIO	3
+
+#ifdef CONFIG_ACPI
+static void intel_mrfld_mmc_fix_up_power_slot(struct sdhci_pci_slot *slot)
+{
+	struct acpi_device *device, *child;
+
+	device = ACPI_COMPANION(&slot->chip->pdev->dev);
+	if (!device)
+		return;
+
+	acpi_device_fix_up_power(device);
+	list_for_each_entry(child, &device->children, node)
+		if (child->status.present && child->status.enabled)
+			acpi_device_fix_up_power(child);
+}
+#else
+static inline void intel_mrfld_mmc_fix_up_power_slot(struct sdhci_pci_slot *slot) {}
+#endif
+
+static int intel_mrfld_mmc_probe_slot(struct sdhci_pci_slot *slot)
+{
+	unsigned int func = PCI_FUNC(slot->chip->pdev->devfn);
+
+	switch (func) {
+	case INTEL_MRFLD_EMMC_0:
+	case INTEL_MRFLD_EMMC_1:
+		slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE |
+					 MMC_CAP_8_BIT_DATA |
+					 MMC_CAP_1_8V_DDR;
+		break;
+	case INTEL_MRFLD_SD:
+		slot->host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
+		break;
+	case INTEL_MRFLD_SDIO:
+		/* Advertise 2.0v for compatibility with the SDIO card's OCR */
+		slot->host->ocr_mask = MMC_VDD_20_21 | MMC_VDD_165_195;
+		slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE |
+					 MMC_CAP_POWER_OFF_CARD;
+		break;
+	default:
+		return -ENODEV;
+	}
+
+	intel_mrfld_mmc_fix_up_power_slot(slot);
+	return 0;
+}
+
+static const struct sdhci_pci_fixes sdhci_intel_mrfld_mmc = {
+	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
+	.quirks2	= SDHCI_QUIRK2_BROKEN_HS200 |
+			SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
+	.allow_runtime_pm = true,
+	.probe_slot	= intel_mrfld_mmc_probe_slot,
+};
+
+static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
+{
+	u8 scratch;
+	int ret;
+
+	ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
+	if (ret)
+		return ret;
+
+	/*
+	 * Turn PMOS on [bit 0], set over current detection to 2.4 V
+	 * [bit 1:2] and enable over current debouncing [bit 6].
+	 */
+	if (on)
+		scratch |= 0x47;
+	else
+		scratch &= ~0x47;
+
+	return pci_write_config_byte(chip->pdev, 0xAE, scratch);
+}
+
+static int jmicron_probe(struct sdhci_pci_chip *chip)
+{
+	int ret;
+	u16 mmcdev = 0;
+
+	if (chip->pdev->revision == 0) {
+		chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
+			  SDHCI_QUIRK_32BIT_DMA_SIZE |
+			  SDHCI_QUIRK_32BIT_ADMA_SIZE |
+			  SDHCI_QUIRK_RESET_AFTER_REQUEST |
+			  SDHCI_QUIRK_BROKEN_SMALL_PIO;
+	}
+
+	/*
+	 * JMicron chips can have two interfaces to the same hardware
+	 * in order to work around limitations in Microsoft's driver.
+	 * We need to make sure we only bind to one of them.
+	 *
+	 * This code assumes two things:
+	 *
+	 * 1. The PCI code adds subfunctions in order.
+	 *
+	 * 2. The MMC interface has a lower subfunction number
+	 *    than the SD interface.
+	 */
+	if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
+		mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
+	else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
+		mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
+
+	if (mmcdev) {
+		struct pci_dev *sd_dev;
+
+		sd_dev = NULL;
+		while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
+						mmcdev, sd_dev)) != NULL) {
+			if ((PCI_SLOT(chip->pdev->devfn) ==
+				PCI_SLOT(sd_dev->devfn)) &&
+				(chip->pdev->bus == sd_dev->bus))
+				break;
+		}
+
+		if (sd_dev) {
+			pci_dev_put(sd_dev);
+			dev_info(&chip->pdev->dev, "Refusing to bind to "
+				"secondary interface.\n");
+			return -ENODEV;
+		}
+	}
+
+	/*
+	 * JMicron chips need a bit of a nudge to enable the power
+	 * output pins.
+	 */
+	ret = jmicron_pmos(chip, 1);
+	if (ret) {
+		dev_err(&chip->pdev->dev, "Failure enabling card power\n");
+		return ret;
+	}
+
+	/* quirk for unsable RO-detection on JM388 chips */
+	if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
+	    chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
+		chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;
+
+	return 0;
+}
+
+static void jmicron_enable_mmc(struct sdhci_host *host, int on)
+{
+	u8 scratch;
+
+	scratch = readb(host->ioaddr + 0xC0);
+
+	if (on)
+		scratch |= 0x01;
+	else
+		scratch &= ~0x01;
+
+	writeb(scratch, host->ioaddr + 0xC0);
+}
+
+static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
+{
+	if (slot->chip->pdev->revision == 0) {
+		u16 version;
+
+		version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
+		version = (version & SDHCI_VENDOR_VER_MASK) >>
+			SDHCI_VENDOR_VER_SHIFT;
+
+		/*
+		 * Older versions of the chip have lots of nasty glitches
+		 * in the ADMA engine. It's best just to avoid it
+		 * completely.
+		 */
+		if (version < 0xAC)
+			slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
+	}
+
+	/* JM388 MMC doesn't support 1.8V while SD supports it */
+	if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
+		slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
+			MMC_VDD_29_30 | MMC_VDD_30_31 |
+			MMC_VDD_165_195; /* allow 1.8V */
+		slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
+			MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
+	}
+
+	/*
+	 * The secondary interface requires a bit set to get the
+	 * interrupts.
+	 */
+	if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
+	    slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
+		jmicron_enable_mmc(slot->host, 1);
+
+	slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
+
+	return 0;
+}
+
+static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
+{
+	if (dead)
+		return;
+
+	if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
+	    slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
+		jmicron_enable_mmc(slot->host, 0);
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int jmicron_suspend(struct sdhci_pci_chip *chip)
+{
+	int i, ret;
+
+	ret = sdhci_pci_suspend_host(chip);
+	if (ret)
+		return ret;
+
+	if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
+	    chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
+		for (i = 0; i < chip->num_slots; i++)
+			jmicron_enable_mmc(chip->slots[i]->host, 0);
+	}
+
+	return 0;
+}
+
+static int jmicron_resume(struct sdhci_pci_chip *chip)
+{
+	int ret, i;
+
+	if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
+	    chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
+		for (i = 0; i < chip->num_slots; i++)
+			jmicron_enable_mmc(chip->slots[i]->host, 1);
+	}
+
+	ret = jmicron_pmos(chip, 1);
+	if (ret) {
+		dev_err(&chip->pdev->dev, "Failure enabling card power\n");
+		return ret;
+	}
+
+	return sdhci_pci_resume_host(chip);
+}
+#endif
+
+static const struct sdhci_pci_fixes sdhci_jmicron = {
+	.probe		= jmicron_probe,
+
+	.probe_slot	= jmicron_probe_slot,
+	.remove_slot	= jmicron_remove_slot,
+
+#ifdef CONFIG_PM_SLEEP
+	.suspend	= jmicron_suspend,
+	.resume		= jmicron_resume,
+#endif
+};
+
+/* SysKonnect CardBus2SDIO extra registers */
+#define SYSKT_CTRL		0x200
+#define SYSKT_RDFIFO_STAT	0x204
+#define SYSKT_WRFIFO_STAT	0x208
+#define SYSKT_POWER_DATA	0x20c
+#define   SYSKT_POWER_330	0xef
+#define   SYSKT_POWER_300	0xf8
+#define   SYSKT_POWER_184	0xcc
+#define SYSKT_POWER_CMD		0x20d
+#define   SYSKT_POWER_START	(1 << 7)
+#define SYSKT_POWER_STATUS	0x20e
+#define   SYSKT_POWER_STATUS_OK	(1 << 0)
+#define SYSKT_BOARD_REV		0x210
+#define SYSKT_CHIP_REV		0x211
+#define SYSKT_CONF_DATA		0x212
+#define   SYSKT_CONF_DATA_1V8	(1 << 2)
+#define   SYSKT_CONF_DATA_2V5	(1 << 1)
+#define   SYSKT_CONF_DATA_3V3	(1 << 0)
+
+static int syskt_probe(struct sdhci_pci_chip *chip)
+{
+	if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
+		chip->pdev->class &= ~0x0000FF;
+		chip->pdev->class |= PCI_SDHCI_IFDMA;
+	}
+	return 0;
+}
+
+static int syskt_probe_slot(struct sdhci_pci_slot *slot)
+{
+	int tm, ps;
+
+	u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
+	u8  chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
+	dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
+					 "board rev %d.%d, chip rev %d.%d\n",
+					 board_rev >> 4, board_rev & 0xf,
+					 chip_rev >> 4,  chip_rev & 0xf);
+	if (chip_rev >= 0x20)
+		slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
+
+	writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
+	writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
+	udelay(50);
+	tm = 10;  /* Wait max 1 ms */
+	do {
+		ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
+		if (ps & SYSKT_POWER_STATUS_OK)
+			break;
+		udelay(100);
+	} while (--tm);
+	if (!tm) {
+		dev_err(&slot->chip->pdev->dev,
+			"power regulator never stabilized");
+		writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
+		return -ENODEV;
+	}
+
+	return 0;
+}
+
+static const struct sdhci_pci_fixes sdhci_syskt = {
+	.quirks		= SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
+	.probe		= syskt_probe,
+	.probe_slot	= syskt_probe_slot,
+};
+
+static int via_probe(struct sdhci_pci_chip *chip)
+{
+	if (chip->pdev->revision == 0x10)
+		chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
+
+	return 0;
+}
+
+static const struct sdhci_pci_fixes sdhci_via = {
+	.probe		= via_probe,
+};
+
+static int rtsx_probe_slot(struct sdhci_pci_slot *slot)
+{
+	slot->host->mmc->caps2 |= MMC_CAP2_HS200;
+	return 0;
+}
+
+static const struct sdhci_pci_fixes sdhci_rtsx = {
+	.quirks2	= SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
+			SDHCI_QUIRK2_BROKEN_64_BIT_DMA |
+			SDHCI_QUIRK2_BROKEN_DDR50,
+	.probe_slot	= rtsx_probe_slot,
+};
+
+/*AMD chipset generation*/
+enum amd_chipset_gen {
+	AMD_CHIPSET_BEFORE_ML,
+	AMD_CHIPSET_CZ,
+	AMD_CHIPSET_NL,
+	AMD_CHIPSET_UNKNOWN,
+};
+
+/* AMD registers */
+#define AMD_SD_AUTO_PATTERN		0xB8
+#define AMD_MSLEEP_DURATION		4
+#define AMD_SD_MISC_CONTROL		0xD0
+#define AMD_MAX_TUNE_VALUE		0x0B
+#define AMD_AUTO_TUNE_SEL		0x10800
+#define AMD_FIFO_PTR			0x30
+#define AMD_BIT_MASK			0x1F
+
+static void amd_tuning_reset(struct sdhci_host *host)
+{
+	unsigned int val;
+
+	val = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+	val |= SDHCI_CTRL_PRESET_VAL_ENABLE | SDHCI_CTRL_EXEC_TUNING;
+	sdhci_writew(host, val, SDHCI_HOST_CONTROL2);
+
+	val = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+	val &= ~SDHCI_CTRL_EXEC_TUNING;
+	sdhci_writew(host, val, SDHCI_HOST_CONTROL2);
+}
+
+static void amd_config_tuning_phase(struct pci_dev *pdev, u8 phase)
+{
+	unsigned int val;
+
+	pci_read_config_dword(pdev, AMD_SD_AUTO_PATTERN, &val);
+	val &= ~AMD_BIT_MASK;
+	val |= (AMD_AUTO_TUNE_SEL | (phase << 1));
+	pci_write_config_dword(pdev, AMD_SD_AUTO_PATTERN, val);
+}
+
+static void amd_enable_manual_tuning(struct pci_dev *pdev)
+{
+	unsigned int val;
+
+	pci_read_config_dword(pdev, AMD_SD_MISC_CONTROL, &val);
+	val |= AMD_FIFO_PTR;
+	pci_write_config_dword(pdev, AMD_SD_MISC_CONTROL, val);
+}
+
+static int amd_execute_tuning_hs200(struct sdhci_host *host, u32 opcode)
+{
+	struct sdhci_pci_slot *slot = sdhci_priv(host);
+	struct pci_dev *pdev = slot->chip->pdev;
+	u8 valid_win = 0;
+	u8 valid_win_max = 0;
+	u8 valid_win_end = 0;
+	u8 ctrl, tune_around;
+
+	amd_tuning_reset(host);
+
+	for (tune_around = 0; tune_around < 12; tune_around++) {
+		amd_config_tuning_phase(pdev, tune_around);
+
+		if (mmc_send_tuning(host->mmc, opcode, NULL)) {
+			valid_win = 0;
+			msleep(AMD_MSLEEP_DURATION);
+			ctrl = SDHCI_RESET_CMD | SDHCI_RESET_DATA;
+			sdhci_writeb(host, ctrl, SDHCI_SOFTWARE_RESET);
+		} else if (++valid_win > valid_win_max) {
+			valid_win_max = valid_win;
+			valid_win_end = tune_around;
+		}
+	}
+
+	if (!valid_win_max) {
+		dev_err(&pdev->dev, "no tuning point found\n");
+		return -EIO;
+	}
+
+	amd_config_tuning_phase(pdev, valid_win_end - valid_win_max / 2);
+
+	amd_enable_manual_tuning(pdev);
+
+	host->mmc->retune_period = 0;
+
+	return 0;
+}
+
+static int amd_execute_tuning(struct mmc_host *mmc, u32 opcode)
+{
+	struct sdhci_host *host = mmc_priv(mmc);
+
+	/* AMD requires custom HS200 tuning */
+	if (host->timing == MMC_TIMING_MMC_HS200)
+		return amd_execute_tuning_hs200(host, opcode);
+
+	/* Otherwise perform standard SDHCI tuning */
+	return sdhci_execute_tuning(mmc, opcode);
+}
+
+static int amd_probe_slot(struct sdhci_pci_slot *slot)
+{
+	struct mmc_host_ops *ops = &slot->host->mmc_host_ops;
+
+	ops->execute_tuning = amd_execute_tuning;
+
+	return 0;
+}
+
+static int amd_probe(struct sdhci_pci_chip *chip)
+{
+	struct pci_dev	*smbus_dev;
+	enum amd_chipset_gen gen;
+
+	smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
+			PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL);
+	if (smbus_dev) {
+		gen = AMD_CHIPSET_BEFORE_ML;
+	} else {
+		smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
+				PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, NULL);
+		if (smbus_dev) {
+			if (smbus_dev->revision < 0x51)
+				gen = AMD_CHIPSET_CZ;
+			else
+				gen = AMD_CHIPSET_NL;
+		} else {
+			gen = AMD_CHIPSET_UNKNOWN;
+		}
+	}
+
+    if (smbus_dev) {
+        pci_dev_put(smbus_dev);
+    }
+
+	if (gen == AMD_CHIPSET_BEFORE_ML || gen == AMD_CHIPSET_CZ)
+		chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD;
+
+	return 0;
+}
+
+static u32 sdhci_read_present_state(struct sdhci_host *host)
+{
+	return sdhci_readl(host, SDHCI_PRESENT_STATE);
+}
+
+static void amd_sdhci_reset(struct sdhci_host *host, u8 mask)
+{
+	struct sdhci_pci_slot *slot = sdhci_priv(host);
+	struct pci_dev *pdev = slot->chip->pdev;
+	u32 present_state;
+
+	/*
+	 * SDHC 0x7906 requires a hard reset to clear all internal state.
+	 * Otherwise it can get into a bad state where the DATA lines are always
+	 * read as zeros.
+	 */
+	if (pdev->device == 0x7906 && (mask & SDHCI_RESET_ALL)) {
+		pci_clear_master(pdev);
+
+		pci_save_state(pdev);
+
+		pci_set_power_state(pdev, PCI_D3cold);
+		pr_debug("%s: power_state=%u\n", mmc_hostname(host->mmc),
+			pdev->current_state);
+		pci_set_power_state(pdev, PCI_D0);
+
+		pci_restore_state(pdev);
+
+		/*
+		 * SDHCI_RESET_ALL says the card detect logic should not be
+		 * reset, but since we need to reset the entire controller
+		 * we should wait until the card detect logic has stabilized.
+		 *
+		 * This normally takes about 40ms.
+		 */
+		readx_poll_timeout(
+			sdhci_read_present_state,
+			host,
+			present_state,
+			present_state & SDHCI_CD_STABLE,
+			10000,
+			100000
+		);
+	}
+
+	return sdhci_reset(host, mask);
+}
+
+static const struct sdhci_ops amd_sdhci_pci_ops = {
+	.set_clock			= sdhci_set_clock,
+	.enable_dma			= sdhci_pci_enable_dma,
+	.set_bus_width			= sdhci_set_bus_width,
+	.reset				= amd_sdhci_reset,
+	.set_uhs_signaling		= sdhci_set_uhs_signaling,
+};
+
+static const struct sdhci_pci_fixes sdhci_amd = {
+	.probe		= amd_probe,
+	.ops		= &amd_sdhci_pci_ops,
+	.probe_slot	= amd_probe_slot,
+};
+
+static const struct pci_device_id pci_ids[] = {
+	SDHCI_PCI_DEVICE(RICOH, R5C822,  ricoh),
+	SDHCI_PCI_DEVICE(RICOH, R5C843,  ricoh_mmc),
+	SDHCI_PCI_DEVICE(RICOH, R5CE822, ricoh_mmc),
+	SDHCI_PCI_DEVICE(RICOH, R5CE823, ricoh_mmc),
+	SDHCI_PCI_DEVICE(ENE, CB712_SD,   ene_712),
+	SDHCI_PCI_DEVICE(ENE, CB712_SD_2, ene_712),
+	SDHCI_PCI_DEVICE(ENE, CB714_SD,   ene_714),
+	SDHCI_PCI_DEVICE(ENE, CB714_SD_2, ene_714),
+	SDHCI_PCI_DEVICE(MARVELL, 88ALP01_SD, cafe),
+	SDHCI_PCI_DEVICE(JMICRON, JMB38X_SD,  jmicron),
+	SDHCI_PCI_DEVICE(JMICRON, JMB38X_MMC, jmicron),
+	SDHCI_PCI_DEVICE(JMICRON, JMB388_SD,  jmicron),
+	SDHCI_PCI_DEVICE(JMICRON, JMB388_ESD, jmicron),
+	SDHCI_PCI_DEVICE(SYSKONNECT, 8000, syskt),
+	SDHCI_PCI_DEVICE(VIA, 95D0, via),
+	SDHCI_PCI_DEVICE(REALTEK, 5250, rtsx),
+	SDHCI_PCI_DEVICE(INTEL, QRK_SD,    intel_qrk),
+	SDHCI_PCI_DEVICE(INTEL, MRST_SD0,  intel_mrst_hc0),
+	SDHCI_PCI_DEVICE(INTEL, MRST_SD1,  intel_mrst_hc1_hc2),
+	SDHCI_PCI_DEVICE(INTEL, MRST_SD2,  intel_mrst_hc1_hc2),
+	SDHCI_PCI_DEVICE(INTEL, MFD_SD,    intel_mfd_sd),
+	SDHCI_PCI_DEVICE(INTEL, MFD_SDIO1, intel_mfd_sdio),
+	SDHCI_PCI_DEVICE(INTEL, MFD_SDIO2, intel_mfd_sdio),
+	SDHCI_PCI_DEVICE(INTEL, MFD_EMMC0, intel_mfd_emmc),
+	SDHCI_PCI_DEVICE(INTEL, MFD_EMMC1, intel_mfd_emmc),
+	SDHCI_PCI_DEVICE(INTEL, PCH_SDIO0, intel_pch_sdio),
+	SDHCI_PCI_DEVICE(INTEL, PCH_SDIO1, intel_pch_sdio),
+	SDHCI_PCI_DEVICE(INTEL, BYT_EMMC,  intel_byt_emmc),
+	SDHCI_PCI_SUBDEVICE(INTEL, BYT_SDIO, NI, 7884, ni_byt_sdio),
+	SDHCI_PCI_DEVICE(INTEL, BYT_SDIO,  intel_byt_sdio),
+	SDHCI_PCI_DEVICE(INTEL, BYT_SD,    intel_byt_sd),
+	SDHCI_PCI_DEVICE(INTEL, BYT_EMMC2, intel_byt_emmc),
+	SDHCI_PCI_DEVICE(INTEL, BSW_EMMC,  intel_byt_emmc),
+	SDHCI_PCI_DEVICE(INTEL, BSW_SDIO,  intel_byt_sdio),
+	SDHCI_PCI_DEVICE(INTEL, BSW_SD,    intel_byt_sd),
+	SDHCI_PCI_DEVICE(INTEL, CLV_SDIO0, intel_mfd_sd),
+	SDHCI_PCI_DEVICE(INTEL, CLV_SDIO1, intel_mfd_sdio),
+	SDHCI_PCI_DEVICE(INTEL, CLV_SDIO2, intel_mfd_sdio),
+	SDHCI_PCI_DEVICE(INTEL, CLV_EMMC0, intel_mfd_emmc),
+	SDHCI_PCI_DEVICE(INTEL, CLV_EMMC1, intel_mfd_emmc),
+	SDHCI_PCI_DEVICE(INTEL, MRFLD_MMC, intel_mrfld_mmc),
+	SDHCI_PCI_DEVICE(INTEL, SPT_EMMC,  intel_byt_emmc),
+	SDHCI_PCI_DEVICE(INTEL, SPT_SDIO,  intel_byt_sdio),
+	SDHCI_PCI_DEVICE(INTEL, SPT_SD,    intel_byt_sd),
+	SDHCI_PCI_DEVICE(INTEL, DNV_EMMC,  intel_dnv_emmc),
+	SDHCI_PCI_DEVICE(INTEL, CDF_EMMC,  intel_glk_emmc),
+	SDHCI_PCI_DEVICE(INTEL, BXT_EMMC,  intel_byt_emmc),
+	SDHCI_PCI_DEVICE(INTEL, BXT_SDIO,  intel_byt_sdio),
+	SDHCI_PCI_DEVICE(INTEL, BXT_SD,    intel_byt_sd),
+	SDHCI_PCI_DEVICE(INTEL, BXTM_EMMC, intel_byt_emmc),
+	SDHCI_PCI_DEVICE(INTEL, BXTM_SDIO, intel_byt_sdio),
+	SDHCI_PCI_DEVICE(INTEL, BXTM_SD,   intel_byt_sd),
+	SDHCI_PCI_DEVICE(INTEL, APL_EMMC,  intel_byt_emmc),
+	SDHCI_PCI_DEVICE(INTEL, APL_SDIO,  intel_byt_sdio),
+	SDHCI_PCI_DEVICE(INTEL, APL_SD,    intel_byt_sd),
+	SDHCI_PCI_DEVICE(INTEL, GLK_EMMC,  intel_glk_emmc),
+	SDHCI_PCI_DEVICE(INTEL, GLK_SDIO,  intel_byt_sdio),
+	SDHCI_PCI_DEVICE(INTEL, GLK_SD,    intel_byt_sd),
+	SDHCI_PCI_DEVICE(INTEL, CNP_EMMC,  intel_glk_emmc),
+	SDHCI_PCI_DEVICE(INTEL, CNP_SD,    intel_byt_sd),
+	SDHCI_PCI_DEVICE(INTEL, CNPH_SD,   intel_byt_sd),
+	SDHCI_PCI_DEVICE(INTEL, ICP_EMMC,  intel_glk_emmc),
+	SDHCI_PCI_DEVICE(INTEL, ICP_SD,    intel_byt_sd),
+	SDHCI_PCI_DEVICE(INTEL, EHL_EMMC,  intel_glk_emmc),
+	SDHCI_PCI_DEVICE(INTEL, EHL_SD,    intel_byt_sd),
+	SDHCI_PCI_DEVICE(INTEL, CML_EMMC,  intel_glk_emmc),
+	SDHCI_PCI_DEVICE(INTEL, CML_SD,    intel_byt_sd),
+	SDHCI_PCI_DEVICE(INTEL, CMLH_SD,   intel_byt_sd),
+	SDHCI_PCI_DEVICE(INTEL, JSL_EMMC,  intel_glk_emmc),
+	SDHCI_PCI_DEVICE(INTEL, JSL_SD,    intel_byt_sd),
+	SDHCI_PCI_DEVICE(INTEL, LKF_EMMC,  intel_glk_emmc),
+	SDHCI_PCI_DEVICE(INTEL, LKF_SD,    intel_byt_sd),
+	SDHCI_PCI_DEVICE(O2, 8120,     o2),
+	SDHCI_PCI_DEVICE(O2, 8220,     o2),
+	SDHCI_PCI_DEVICE(O2, 8221,     o2),
+	SDHCI_PCI_DEVICE(O2, 8320,     o2),
+	SDHCI_PCI_DEVICE(O2, 8321,     o2),
+	SDHCI_PCI_DEVICE(O2, FUJIN2,   o2),
+	SDHCI_PCI_DEVICE(O2, SDS0,     o2),
+	SDHCI_PCI_DEVICE(O2, SDS1,     o2),
+	SDHCI_PCI_DEVICE(O2, SEABIRD0, o2),
+	SDHCI_PCI_DEVICE(O2, SEABIRD1, o2),
+	SDHCI_PCI_DEVICE(ARASAN, PHY_EMMC, arasan),
+	SDHCI_PCI_DEVICE(SYNOPSYS, DWC_MSHC, snps),
+	SDHCI_PCI_DEVICE(GLI, 9750, gl9750),
+	SDHCI_PCI_DEVICE(GLI, 9755, gl9755),
+	SDHCI_PCI_DEVICE(GLI, 9763E, gl9763e),
+	SDHCI_PCI_DEVICE_CLASS(AMD, SYSTEM_SDHCI, PCI_CLASS_MASK, amd),
+	/* Generic SD host controller */
+	{PCI_DEVICE_CLASS(SYSTEM_SDHCI, PCI_CLASS_MASK)},
+	{ /* end: all zeroes */ },
+};
+
+MODULE_DEVICE_TABLE(pci, pci_ids);
+
+/*****************************************************************************\
+ *                                                                           *
+ * SDHCI core callbacks                                                      *
+ *                                                                           *
+\*****************************************************************************/
+
+int sdhci_pci_enable_dma(struct sdhci_host *host)
+{
+	struct sdhci_pci_slot *slot;
+	struct pci_dev *pdev;
+
+	slot = sdhci_priv(host);
+	pdev = slot->chip->pdev;
+
+	if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
+		((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
+		(host->flags & SDHCI_USE_SDMA)) {
+		dev_warn(&pdev->dev, "Will use DMA mode even though HW "
+			"doesn't fully claim to support it.\n");
+	}
+
+	pci_set_master(pdev);
+
+	return 0;
+}
+
+static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host)
+{
+	struct sdhci_pci_slot *slot = sdhci_priv(host);
+	int rst_n_gpio = slot->rst_n_gpio;
+
+	if (!gpio_is_valid(rst_n_gpio))
+		return;
+	gpio_set_value_cansleep(rst_n_gpio, 0);
+	/* For eMMC, minimum is 1us but give it 10us for good measure */
+	udelay(10);
+	gpio_set_value_cansleep(rst_n_gpio, 1);
+	/* For eMMC, minimum is 200us but give it 300us for good measure */
+	usleep_range(300, 1000);
+}
+
+static void sdhci_pci_hw_reset(struct sdhci_host *host)
+{
+	struct sdhci_pci_slot *slot = sdhci_priv(host);
+
+	if (slot->hw_reset)
+		slot->hw_reset(host);
+}
+
+static const struct sdhci_ops sdhci_pci_ops = {
+	.set_clock	= sdhci_set_clock,
+	.enable_dma	= sdhci_pci_enable_dma,
+	.set_bus_width	= sdhci_set_bus_width,
+	.reset		= sdhci_reset,
+	.set_uhs_signaling = sdhci_set_uhs_signaling,
+	.hw_reset		= sdhci_pci_hw_reset,
+};
+
+/*****************************************************************************\
+ *                                                                           *
+ * Suspend/resume                                                            *
+ *                                                                           *
+\*****************************************************************************/
+
+#ifdef CONFIG_PM_SLEEP
+static int sdhci_pci_suspend(struct device *dev)
+{
+	struct sdhci_pci_chip *chip = dev_get_drvdata(dev);
+
+	if (!chip)
+		return 0;
+
+	if (chip->fixes && chip->fixes->suspend)
+		return chip->fixes->suspend(chip);
+
+	return sdhci_pci_suspend_host(chip);
+}
+
+static int sdhci_pci_resume(struct device *dev)
+{
+	struct sdhci_pci_chip *chip = dev_get_drvdata(dev);
+
+	if (!chip)
+		return 0;
+
+	if (chip->fixes && chip->fixes->resume)
+		return chip->fixes->resume(chip);
+
+	return sdhci_pci_resume_host(chip);
+}
+#endif
+
+#ifdef CONFIG_PM
+static int sdhci_pci_runtime_suspend(struct device *dev)
+{
+	struct sdhci_pci_chip *chip = dev_get_drvdata(dev);
+
+	if (!chip)
+		return 0;
+
+	if (chip->fixes && chip->fixes->runtime_suspend)
+		return chip->fixes->runtime_suspend(chip);
+
+	return sdhci_pci_runtime_suspend_host(chip);
+}
+
+static int sdhci_pci_runtime_resume(struct device *dev)
+{
+	struct sdhci_pci_chip *chip = dev_get_drvdata(dev);
+
+	if (!chip)
+		return 0;
+
+	if (chip->fixes && chip->fixes->runtime_resume)
+		return chip->fixes->runtime_resume(chip);
+
+	return sdhci_pci_runtime_resume_host(chip);
+}
+#endif
+
+static const struct dev_pm_ops sdhci_pci_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(sdhci_pci_suspend, sdhci_pci_resume)
+	SET_RUNTIME_PM_OPS(sdhci_pci_runtime_suspend,
+			sdhci_pci_runtime_resume, NULL)
+};
+
+/*****************************************************************************\
+ *                                                                           *
+ * Device probing/removal                                                    *
+ *                                                                           *
+\*****************************************************************************/
+
+static struct sdhci_pci_slot *sdhci_pci_probe_slot(
+	struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar,
+	int slotno)
+{
+	struct sdhci_pci_slot *slot;
+	struct sdhci_host *host;
+	int ret, bar = first_bar + slotno;
+	size_t priv_size = chip->fixes ? chip->fixes->priv_size : 0;
+
+	if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
+		dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
+		return ERR_PTR(-ENODEV);
+	}
+
+	if (pci_resource_len(pdev, bar) < 0x100) {
+		dev_err(&pdev->dev, "Invalid iomem size. You may "
+			"experience problems.\n");
+	}
+
+	if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
+		dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
+		return ERR_PTR(-ENODEV);
+	}
+
+	if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
+		dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
+		return ERR_PTR(-ENODEV);
+	}
+
+	host = sdhci_alloc_host(&pdev->dev, sizeof(*slot) + priv_size);
+	if (IS_ERR(host)) {
+		dev_err(&pdev->dev, "cannot allocate host\n");
+		return ERR_CAST(host);
+	}
+
+	slot = sdhci_priv(host);
+
+	slot->chip = chip;
+	slot->host = host;
+	slot->rst_n_gpio = -EINVAL;
+	slot->cd_gpio = -EINVAL;
+	slot->cd_idx = -1;
+
+	/* Retrieve platform data if there is any */
+	if (*sdhci_pci_get_data)
+		slot->data = sdhci_pci_get_data(pdev, slotno);
+
+	if (slot->data) {
+		if (slot->data->setup) {
+			ret = slot->data->setup(slot->data);
+			if (ret) {
+				dev_err(&pdev->dev, "platform setup failed\n");
+				goto free;
+			}
+		}
+		slot->rst_n_gpio = slot->data->rst_n_gpio;
+		slot->cd_gpio = slot->data->cd_gpio;
+	}
+
+	host->hw_name = "PCI";
+	host->ops = chip->fixes && chip->fixes->ops ?
+		    chip->fixes->ops :
+		    &sdhci_pci_ops;
+	host->quirks = chip->quirks;
+	host->quirks2 = chip->quirks2;
+
+	host->irq = pdev->irq;
+
+	ret = pcim_iomap_regions(pdev, BIT(bar), mmc_hostname(host->mmc));
+	if (ret) {
+		dev_err(&pdev->dev, "cannot request region\n");
+		goto cleanup;
+	}
+
+	host->ioaddr = pcim_iomap_table(pdev)[bar];
+
+	if (chip->fixes && chip->fixes->probe_slot) {
+		ret = chip->fixes->probe_slot(slot);
+		if (ret)
+			goto cleanup;
+	}
+
+	if (gpio_is_valid(slot->rst_n_gpio)) {
+		if (!devm_gpio_request(&pdev->dev, slot->rst_n_gpio, "eMMC_reset")) {
+			gpio_direction_output(slot->rst_n_gpio, 1);
+			slot->host->mmc->caps |= MMC_CAP_HW_RESET;
+			slot->hw_reset = sdhci_pci_gpio_hw_reset;
+		} else {
+			dev_warn(&pdev->dev, "failed to request rst_n_gpio\n");
+			slot->rst_n_gpio = -EINVAL;
+		}
+	}
+
+	host->mmc->pm_caps = MMC_PM_KEEP_POWER;
+	host->mmc->slotno = slotno;
+	host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
+
+	if (device_can_wakeup(&pdev->dev))
+		host->mmc->pm_caps |= MMC_PM_WAKE_SDIO_IRQ;
+
+	if (host->mmc->caps & MMC_CAP_CD_WAKE)
+		device_init_wakeup(&pdev->dev, true);
+
+	if (slot->cd_idx >= 0) {
+		ret = mmc_gpiod_request_cd(host->mmc, "cd", slot->cd_idx,
+					   slot->cd_override_level, 0);
+		if (ret && ret != -EPROBE_DEFER)
+			ret = mmc_gpiod_request_cd(host->mmc, NULL,
+						   slot->cd_idx,
+						   slot->cd_override_level,
+						   0);
+		if (ret == -EPROBE_DEFER)
+			goto remove;
+
+		if (ret) {
+			dev_warn(&pdev->dev, "failed to setup card detect gpio\n");
+			slot->cd_idx = -1;
+		}
+	}
+
+	if (chip->fixes && chip->fixes->add_host)
+		ret = chip->fixes->add_host(slot);
+	else
+		ret = sdhci_add_host(host);
+	if (ret)
+		goto remove;
+
+	sdhci_pci_add_own_cd(slot);
+
+	/*
+	 * Check if the chip needs a separate GPIO for card detect to wake up
+	 * from runtime suspend.  If it is not there, don't allow runtime PM.
+	 * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure.
+	 */
+	if (chip->fixes && chip->fixes->own_cd_for_runtime_pm &&
+	    !gpio_is_valid(slot->cd_gpio) && slot->cd_idx < 0)
+		chip->allow_runtime_pm = false;
+
+	return slot;
+
+remove:
+	if (chip->fixes && chip->fixes->remove_slot)
+		chip->fixes->remove_slot(slot, 0);
+
+cleanup:
+	if (slot->data && slot->data->cleanup)
+		slot->data->cleanup(slot->data);
+
+free:
+	sdhci_free_host(host);
+
+	return ERR_PTR(ret);
+}
+
+static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
+{
+	int dead;
+	u32 scratch;
+
+	sdhci_pci_remove_own_cd(slot);
+
+	dead = 0;
+	scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
+	if (scratch == (u32)-1)
+		dead = 1;
+
+	sdhci_remove_host(slot->host, dead);
+
+	if (slot->chip->fixes && slot->chip->fixes->remove_slot)
+		slot->chip->fixes->remove_slot(slot, dead);
+
+	if (slot->data && slot->data->cleanup)
+		slot->data->cleanup(slot->data);
+
+	sdhci_free_host(slot->host);
+}
+
+static void sdhci_pci_runtime_pm_allow(struct device *dev)
+{
+	pm_suspend_ignore_children(dev, 1);
+	pm_runtime_set_autosuspend_delay(dev, 50);
+	pm_runtime_use_autosuspend(dev);
+	pm_runtime_allow(dev);
+	/* Stay active until mmc core scans for a card */
+	pm_runtime_put_noidle(dev);
+}
+
+static void sdhci_pci_runtime_pm_forbid(struct device *dev)
+{
+	pm_runtime_forbid(dev);
+	pm_runtime_get_noresume(dev);
+}
+
+/* define by gohi, set in bios acpi dsdt table */
+#define EMMC_DSDT_MODE_HS400    0
+#define EMMC_DSDT_MODE_HS200    1
+#define EMMC_DSDT_MODE_DDR52    2
+#define EMMC_DSDT_MODE_SDR52    3
+
+static int sdhci_set_quirks2_by_dsdt(struct pci_dev *pdev)
+{
+    struct acpi_device *acpi_dev;
+    struct fwnode_handle *pfwnod = pdev->dev.fwnode;
+    u64 mode;
+	int ret;
+
+    /* Find acpi node through pci,
+    * the relationship between pci and acpi devices can be viewed through the /sys/bus file */
+    acpi_dev = container_of(pfwnod, struct acpi_device, fwnode);
+
+    /* DSDT need take node as: "Name (MODE, 0x0-)" */
+   	ret = acpi_evaluate_integer(acpi_dev->handle, "MODE", NULL, &mode);
+	if (ACPI_SUCCESS(ret)) {
+        dev_info(&pdev->dev, "SD controller get bus mode:0x%lld from dsts success.\n", mode);
+        switch(mode) {
+        case EMMC_DSDT_MODE_SDR52:
+            sdhci_intel_dnv_emmc.quirks2 |= SDHCI_QUIRK2_BROKEN_DDR50 | SDHCI_QUIRK2_BROKEN_HS200;
+            sdhci_intel_dnv_emmc.probe_slot = dnv_emmc_hs_probe_slot;
+            dev_info(&pdev->dev, "Configure SDHCI as SDR52 attribute through dsdt.\n");
+            break;
+        case EMMC_DSDT_MODE_DDR52:
+            sdhci_intel_dnv_emmc.quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;
+            dev_info(&pdev->dev, "Configure SDHCI as DDR52 attribute through dsdt.\n");
+            break;
+        case EMMC_DSDT_MODE_HS200:
+            dev_info(&pdev->dev, "Configure SDHCI as HS200 attribute through dsdt.\n");
+            break;
+        case EMMC_DSDT_MODE_HS400:
+            sdhci_intel_dnv_emmc.quirks2 |= SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400;
+            dev_info(&pdev->dev, "Configure SDHCI as HS400 attribute through dsdt.\n");
+            break;
+        default:
+            ret = EINVAL;
+            break;
+        }
+    } else {
+        ret = EINVAL;
+    }
+
+    return ret;
+}
+
+#ifndef COMMAND_LINE_SIZE
+#define COMMAND_LINE_SIZE 1024
+#endif
+
+int sdhci_cmdline_read(char *cmdline)
+{
+    struct file *filp;
+    int ret = 0;
+    loff_t pos;
+
+    /* Basically, the kernel parameters with arch are not exported.
+     * In order to not have too much influence and generalization,
+     * use the proc file to obtain parameter information. */
+    filp = filp_open("/proc/cmdline", O_RDONLY, 0);
+    if (IS_ERR(filp)) {
+        filp = NULL;
+        goto exit;
+    }
+    pos = 0;
+    ret = kernel_read(filp, cmdline, COMMAND_LINE_SIZE, &pos);
+    if (ret < 0) {
+        goto exit;
+    }
+    filp_close(filp, NULL);
+
+    return 0;
+
+exit:
+    if (filp != NULL) {
+        filp_close(filp, NULL);
+    }
+    return -1;
+}
+
+static int sdhci_set_quirks2_by_cmdline(struct pci_dev *pdev)
+{
+    char *option, cmdline[COMMAND_LINE_SIZE];
+    int ret = 0;
+
+    mem_clear(cmdline, COMMAND_LINE_SIZE);
+
+    ret = sdhci_cmdline_read(cmdline);
+    if (ret) {
+        return ret;
+    }
+
+    option = strstr(cmdline, "sdhcimode=");
+    if (option == NULL) {
+        return EINVAL;
+    }
+
+    /* Count, sdhcimode= is it 10 bytes? */
+    option += 10;
+
+    if (!strncmp(option, "sdr52", 5)) {
+        sdhci_intel_dnv_emmc.quirks2 |= SDHCI_QUIRK2_BROKEN_DDR50 | SDHCI_QUIRK2_BROKEN_HS200;
+        /* Remove 1.8V ability */
+        sdhci_intel_dnv_emmc.probe_slot = dnv_emmc_hs_probe_slot;
+        dev_info(&pdev->dev, "Configure SDHCI as SDR52 attribute through cmdline.\n");
+    } else if (!strncmp(option, "ddr52", 5)) {
+        sdhci_intel_dnv_emmc.quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;
+        dev_info(&pdev->dev, "Configure SDHCI as DDR52 attribute through cmdline.\n");
+    } else if (!strncmp(option, "hs200", 5)) {
+        dev_info(&pdev->dev, "Configure SDHCI as HS200 attribute through cmdline.\n");
+        ;
+    } else if (!strncmp(option, "hs400", 5)) {
+        sdhci_intel_dnv_emmc.quirks2 |= SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400;
+        dev_info(&pdev->dev, "Configure SDHCI as HS400 attribute through cmdline.\n");
+    } else {
+        dev_info(&pdev->dev, "CSDHCI: Unknown cmdline option.\n");
+        return EINVAL;
+	}
+
+    return 0;
+}
+
+static int sdhci_pci_probe(struct pci_dev *pdev,
+				     const struct pci_device_id *ent)
+{
+	struct sdhci_pci_chip *chip;
+	struct sdhci_pci_slot *slot;
+
+	u8 slots, first_bar;
+	int ret, i;
+
+	BUG_ON(pdev == NULL);
+	BUG_ON(ent == NULL);
+
+	dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
+		 (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
+
+    /* cmdline setting priority, the kernel parameters can be changed flexibly,
+     *  and Bios upgrades are not convenient or secure. */
+    ret = sdhci_set_quirks2_by_cmdline(pdev);
+    if (ret) {
+        ret = sdhci_set_quirks2_by_dsdt(pdev);
+        if (ret) {
+            sdhci_intel_dnv_emmc.quirks2 |= SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400;
+            dev_info(&pdev->dev, "Configure SDHCI as default[HS400].\n");
+        }
+    }
+
+	ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
+	if (ret)
+		return ret;
+
+	slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
+	dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
+
+	BUG_ON(slots > MAX_SLOTS);
+
+	ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
+	if (ret)
+		return ret;
+
+	first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
+
+	if (first_bar > 5) {
+		dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
+		return -ENODEV;
+	}
+
+	ret = pcim_enable_device(pdev);
+	if (ret)
+		return ret;
+
+	chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
+	if (!chip)
+		return -ENOMEM;
+
+	chip->pdev = pdev;
+	chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
+	if (chip->fixes) {
+		chip->quirks = chip->fixes->quirks;
+		chip->quirks2 = chip->fixes->quirks2;
+		chip->allow_runtime_pm = chip->fixes->allow_runtime_pm;
+	}
+	chip->num_slots = slots;
+	chip->pm_retune = true;
+	chip->rpm_retune = true;
+
+	pci_set_drvdata(pdev, chip);
+
+	if (chip->fixes && chip->fixes->probe) {
+		ret = chip->fixes->probe(chip);
+		if (ret)
+			return ret;
+	}
+
+	slots = chip->num_slots;	/* Quirk may have changed this */
+
+	for (i = 0; i < slots; i++) {
+		slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i);
+		if (IS_ERR(slot)) {
+			for (i--; i >= 0; i--)
+				sdhci_pci_remove_slot(chip->slots[i]);
+			return PTR_ERR(slot);
+		}
+
+		chip->slots[i] = slot;
+	}
+
+	if (chip->allow_runtime_pm)
+		sdhci_pci_runtime_pm_allow(&pdev->dev);
+
+	return 0;
+}
+
+static void sdhci_pci_remove(struct pci_dev *pdev)
+{
+	int i;
+	struct sdhci_pci_chip *chip = pci_get_drvdata(pdev);
+
+	if (chip->allow_runtime_pm)
+		sdhci_pci_runtime_pm_forbid(&pdev->dev);
+
+	for (i = 0; i < chip->num_slots; i++)
+		sdhci_pci_remove_slot(chip->slots[i]);
+}
+
+static struct pci_driver sdhci_driver = {
+	.name =		"sdhci-pci",
+	.id_table =	pci_ids,
+	.probe =	sdhci_pci_probe,
+	.remove =	sdhci_pci_remove,
+	.driver =	{
+		.pm =   &sdhci_pci_pm_ops
+	},
+};
+
+module_pci_driver(sdhci_driver);
+
+MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
+MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
+MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-dwc-mshc.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-dwc-mshc.c
new file mode 100644
index 000000000000..f78d65448d17
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-dwc-mshc.c
@@ -0,0 +1,84 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * SDHCI driver for Synopsys DWC_MSHC controller
+ *
+ * Copyright (C) 2018 Synopsys, Inc. (www.synopsys.com)
+ *
+ * Authors:
+ *	Prabu Thangamuthu <prabu.t@synopsys.com>
+ *	Manjunath M B <manjumb@synopsys.com>
+ */
+
+#include "sdhci.h"
+#include "sdhci-pci.h"
+
+#define SDHCI_VENDOR_PTR_R	0xE8
+
+/* Synopsys vendor specific registers */
+#define SDHC_GPIO_OUT		0x34
+#define SDHC_AT_CTRL_R		0x40
+#define SDHC_SW_TUNE_EN		0x00000010
+
+/* MMCM DRP */
+#define SDHC_MMCM_DIV_REG	0x1020
+#define DIV_REG_100_MHZ		0x1145
+#define DIV_REG_200_MHZ		0x1083
+#define SDHC_MMCM_CLKFBOUT	0x1024
+#define CLKFBOUT_100_MHZ	0x0000
+#define CLKFBOUT_200_MHZ	0x0080
+#define SDHC_CCLK_MMCM_RST	0x00000001
+
+static void sdhci_snps_set_clock(struct sdhci_host *host, unsigned int clock)
+{
+	u16 clk;
+	u32 reg, vendor_ptr;
+
+	vendor_ptr = sdhci_readw(host, SDHCI_VENDOR_PTR_R);
+
+	/* Disable software managed rx tuning */
+	reg = sdhci_readl(host, (SDHC_AT_CTRL_R + vendor_ptr));
+	reg &= ~SDHC_SW_TUNE_EN;
+	sdhci_writel(host, reg, (SDHC_AT_CTRL_R + vendor_ptr));
+
+	if (clock <= 52000000) {
+		sdhci_set_clock(host, clock);
+	} else {
+		/* Assert reset to MMCM */
+		reg = sdhci_readl(host, (SDHC_GPIO_OUT + vendor_ptr));
+		reg |= SDHC_CCLK_MMCM_RST;
+		sdhci_writel(host, reg, (SDHC_GPIO_OUT + vendor_ptr));
+
+		/* Configure MMCM */
+		if (clock == 100000000) {
+			sdhci_writel(host, DIV_REG_100_MHZ, SDHC_MMCM_DIV_REG);
+			sdhci_writel(host, CLKFBOUT_100_MHZ,
+					SDHC_MMCM_CLKFBOUT);
+		} else {
+			sdhci_writel(host, DIV_REG_200_MHZ, SDHC_MMCM_DIV_REG);
+			sdhci_writel(host, CLKFBOUT_200_MHZ,
+					SDHC_MMCM_CLKFBOUT);
+		}
+
+		/* De-assert reset to MMCM */
+		reg = sdhci_readl(host, (SDHC_GPIO_OUT + vendor_ptr));
+		reg &= ~SDHC_CCLK_MMCM_RST;
+		sdhci_writel(host, reg, (SDHC_GPIO_OUT + vendor_ptr));
+
+		/* Enable clock */
+		clk = SDHCI_PROG_CLOCK_MODE | SDHCI_CLOCK_INT_EN |
+			SDHCI_CLOCK_CARD_EN;
+		sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+	}
+}
+
+static const struct sdhci_ops sdhci_snps_ops = {
+	.set_clock	= sdhci_snps_set_clock,
+	.enable_dma	= sdhci_pci_enable_dma,
+	.set_bus_width	= sdhci_set_bus_width,
+	.reset		= sdhci_reset,
+	.set_uhs_signaling = sdhci_set_uhs_signaling,
+};
+
+const struct sdhci_pci_fixes sdhci_snps = {
+	.ops		= &sdhci_snps_ops,
+};
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-gli.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-gli.c
new file mode 100644
index 000000000000..23b89b4cad08
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-gli.c
@@ -0,0 +1,865 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Genesys Logic, Inc.
+ *
+ * Authors: Ben Chuang <ben.chuang@genesyslogic.com.tw>
+ *
+ * Version: v0.9.0 (2019-08-08)
+ */
+
+#include <linux/bitfield.h>
+#include <linux/bits.h>
+#include <linux/pci.h>
+#include <linux/mmc/mmc.h>
+#include <linux/delay.h>
+#include "sdhci.h"
+#include "sdhci-pci.h"
+#include "cqhci.h"
+
+/*  Genesys Logic extra registers */
+#define SDHCI_GLI_9750_WT         0x800
+#define   SDHCI_GLI_9750_WT_EN      BIT(0)
+#define   GLI_9750_WT_EN_ON	    0x1
+#define   GLI_9750_WT_EN_OFF	    0x0
+
+#define SDHCI_GLI_9750_DRIVING      0x860
+#define   SDHCI_GLI_9750_DRIVING_1    GENMASK(11, 0)
+#define   SDHCI_GLI_9750_DRIVING_2    GENMASK(27, 26)
+#define   GLI_9750_DRIVING_1_VALUE    0xFFF
+#define   GLI_9750_DRIVING_2_VALUE    0x3
+#define   SDHCI_GLI_9750_SEL_1        BIT(29)
+#define   SDHCI_GLI_9750_SEL_2        BIT(31)
+#define   SDHCI_GLI_9750_ALL_RST      (BIT(24)|BIT(25)|BIT(28)|BIT(30))
+
+#define SDHCI_GLI_9750_PLL	      0x864
+#define   SDHCI_GLI_9750_PLL_LDIV       GENMASK(9, 0)
+#define   SDHCI_GLI_9750_PLL_PDIV       GENMASK(14, 12)
+#define   SDHCI_GLI_9750_PLL_DIR        BIT(15)
+#define   SDHCI_GLI_9750_PLL_TX2_INV    BIT(23)
+#define   SDHCI_GLI_9750_PLL_TX2_DLY    GENMASK(22, 20)
+#define   GLI_9750_PLL_TX2_INV_VALUE    0x1
+#define   GLI_9750_PLL_TX2_DLY_VALUE    0x0
+#define   SDHCI_GLI_9750_PLLSSC_STEP    GENMASK(28, 24)
+#define   SDHCI_GLI_9750_PLLSSC_EN      BIT(31)
+
+#define SDHCI_GLI_9750_PLLSSC        0x86C
+#define   SDHCI_GLI_9750_PLLSSC_PPM    GENMASK(31, 16)
+
+#define SDHCI_GLI_9750_SW_CTRL      0x874
+#define   SDHCI_GLI_9750_SW_CTRL_4    GENMASK(7, 6)
+#define   GLI_9750_SW_CTRL_4_VALUE    0x3
+
+#define SDHCI_GLI_9750_MISC            0x878
+#define   SDHCI_GLI_9750_MISC_TX1_INV    BIT(2)
+#define   SDHCI_GLI_9750_MISC_RX_INV     BIT(3)
+#define   SDHCI_GLI_9750_MISC_TX1_DLY    GENMASK(6, 4)
+#define   GLI_9750_MISC_TX1_INV_VALUE    0x0
+#define   GLI_9750_MISC_RX_INV_ON        0x1
+#define   GLI_9750_MISC_RX_INV_OFF       0x0
+#define   GLI_9750_MISC_RX_INV_VALUE     GLI_9750_MISC_RX_INV_OFF
+#define   GLI_9750_MISC_TX1_DLY_VALUE    0x5
+
+#define SDHCI_GLI_9750_TUNING_CONTROL	          0x540
+#define   SDHCI_GLI_9750_TUNING_CONTROL_EN          BIT(4)
+#define   GLI_9750_TUNING_CONTROL_EN_ON             0x1
+#define   GLI_9750_TUNING_CONTROL_EN_OFF            0x0
+#define   SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_1    BIT(16)
+#define   SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_2    GENMASK(20, 19)
+#define   GLI_9750_TUNING_CONTROL_GLITCH_1_VALUE    0x1
+#define   GLI_9750_TUNING_CONTROL_GLITCH_2_VALUE    0x2
+
+#define SDHCI_GLI_9750_TUNING_PARAMETERS           0x544
+#define   SDHCI_GLI_9750_TUNING_PARAMETERS_RX_DLY    GENMASK(2, 0)
+#define   GLI_9750_TUNING_PARAMETERS_RX_DLY_VALUE    0x1
+
+#define SDHCI_GLI_9763E_CTRL_HS400  0x7
+
+#define SDHCI_GLI_9763E_HS400_ES_REG      0x52C
+#define   SDHCI_GLI_9763E_HS400_ES_BIT      BIT(8)
+
+#define PCIE_GLI_9763E_VHS	 0x884
+#define   GLI_9763E_VHS_REV	   GENMASK(19, 16)
+#define   GLI_9763E_VHS_REV_R      0x0
+#define   GLI_9763E_VHS_REV_M      0x1
+#define   GLI_9763E_VHS_REV_W      0x2
+#define PCIE_GLI_9763E_MB	 0x888
+#define   GLI_9763E_MB_CMDQ_OFF	   BIT(19)
+#define PCIE_GLI_9763E_SCR	 0x8E0
+#define   GLI_9763E_SCR_AXI_REQ	   BIT(9)
+
+#define SDHCI_GLI_9763E_CQE_BASE_ADDR	 0x200
+#define GLI_9763E_CQE_TRNS_MODE	   (SDHCI_TRNS_MULTI | \
+				    SDHCI_TRNS_BLK_CNT_EN | \
+				    SDHCI_TRNS_DMA)
+
+#define PCI_GLI_9755_WT       0x800
+#define   PCI_GLI_9755_WT_EN    BIT(0)
+#define   GLI_9755_WT_EN_ON     0x1
+#define   GLI_9755_WT_EN_OFF    0x0
+
+#define PCI_GLI_9755_PLL            0x64
+#define   PCI_GLI_9755_PLL_LDIV       GENMASK(9, 0)
+#define   PCI_GLI_9755_PLL_PDIV       GENMASK(14, 12)
+#define   PCI_GLI_9755_PLL_DIR        BIT(15)
+#define   PCI_GLI_9755_PLLSSC_STEP    GENMASK(28, 24)
+#define   PCI_GLI_9755_PLLSSC_EN      BIT(31)
+
+#define PCI_GLI_9755_PLLSSC        0x68
+#define   PCI_GLI_9755_PLLSSC_PPM    GENMASK(15, 0)
+
+#define GLI_MAX_TUNING_LOOP 40
+
+/* Genesys Logic chipset */
+static inline void gl9750_wt_on(struct sdhci_host *host)
+{
+	u32 wt_value;
+	u32 wt_enable;
+
+	wt_value = sdhci_readl(host, SDHCI_GLI_9750_WT);
+	wt_enable = FIELD_GET(SDHCI_GLI_9750_WT_EN, wt_value);
+
+	if (wt_enable == GLI_9750_WT_EN_ON)
+		return;
+
+	wt_value &= ~SDHCI_GLI_9750_WT_EN;
+	wt_value |= FIELD_PREP(SDHCI_GLI_9750_WT_EN, GLI_9750_WT_EN_ON);
+
+	sdhci_writel(host, wt_value, SDHCI_GLI_9750_WT);
+}
+
+static inline void gl9750_wt_off(struct sdhci_host *host)
+{
+	u32 wt_value;
+	u32 wt_enable;
+
+	wt_value = sdhci_readl(host, SDHCI_GLI_9750_WT);
+	wt_enable = FIELD_GET(SDHCI_GLI_9750_WT_EN, wt_value);
+
+	if (wt_enable == GLI_9750_WT_EN_OFF)
+		return;
+
+	wt_value &= ~SDHCI_GLI_9750_WT_EN;
+	wt_value |= FIELD_PREP(SDHCI_GLI_9750_WT_EN, GLI_9750_WT_EN_OFF);
+
+	sdhci_writel(host, wt_value, SDHCI_GLI_9750_WT);
+}
+
+static void gli_set_9750(struct sdhci_host *host)
+{
+	u32 driving_value;
+	u32 pll_value;
+	u32 sw_ctrl_value;
+	u32 misc_value;
+	u32 parameter_value;
+	u32 control_value;
+	u16 ctrl2;
+
+	gl9750_wt_on(host);
+
+	driving_value = sdhci_readl(host, SDHCI_GLI_9750_DRIVING);
+	pll_value = sdhci_readl(host, SDHCI_GLI_9750_PLL);
+	sw_ctrl_value = sdhci_readl(host, SDHCI_GLI_9750_SW_CTRL);
+	misc_value = sdhci_readl(host, SDHCI_GLI_9750_MISC);
+	parameter_value = sdhci_readl(host, SDHCI_GLI_9750_TUNING_PARAMETERS);
+	control_value = sdhci_readl(host, SDHCI_GLI_9750_TUNING_CONTROL);
+
+	driving_value &= ~(SDHCI_GLI_9750_DRIVING_1);
+	driving_value &= ~(SDHCI_GLI_9750_DRIVING_2);
+	driving_value |= FIELD_PREP(SDHCI_GLI_9750_DRIVING_1,
+				    GLI_9750_DRIVING_1_VALUE);
+	driving_value |= FIELD_PREP(SDHCI_GLI_9750_DRIVING_2,
+				    GLI_9750_DRIVING_2_VALUE);
+	driving_value &= ~(SDHCI_GLI_9750_SEL_1|SDHCI_GLI_9750_SEL_2|SDHCI_GLI_9750_ALL_RST);
+	driving_value |= SDHCI_GLI_9750_SEL_2;
+	sdhci_writel(host, driving_value, SDHCI_GLI_9750_DRIVING);
+
+	sw_ctrl_value &= ~SDHCI_GLI_9750_SW_CTRL_4;
+	sw_ctrl_value |= FIELD_PREP(SDHCI_GLI_9750_SW_CTRL_4,
+				    GLI_9750_SW_CTRL_4_VALUE);
+	sdhci_writel(host, sw_ctrl_value, SDHCI_GLI_9750_SW_CTRL);
+
+	/* reset the tuning flow after reinit and before starting tuning */
+	pll_value &= ~SDHCI_GLI_9750_PLL_TX2_INV;
+	pll_value &= ~SDHCI_GLI_9750_PLL_TX2_DLY;
+	pll_value |= FIELD_PREP(SDHCI_GLI_9750_PLL_TX2_INV,
+				GLI_9750_PLL_TX2_INV_VALUE);
+	pll_value |= FIELD_PREP(SDHCI_GLI_9750_PLL_TX2_DLY,
+				GLI_9750_PLL_TX2_DLY_VALUE);
+
+	misc_value &= ~SDHCI_GLI_9750_MISC_TX1_INV;
+	misc_value &= ~SDHCI_GLI_9750_MISC_RX_INV;
+	misc_value &= ~SDHCI_GLI_9750_MISC_TX1_DLY;
+	misc_value |= FIELD_PREP(SDHCI_GLI_9750_MISC_TX1_INV,
+				 GLI_9750_MISC_TX1_INV_VALUE);
+	misc_value |= FIELD_PREP(SDHCI_GLI_9750_MISC_RX_INV,
+				 GLI_9750_MISC_RX_INV_VALUE);
+	misc_value |= FIELD_PREP(SDHCI_GLI_9750_MISC_TX1_DLY,
+				 GLI_9750_MISC_TX1_DLY_VALUE);
+
+	parameter_value &= ~SDHCI_GLI_9750_TUNING_PARAMETERS_RX_DLY;
+	parameter_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_PARAMETERS_RX_DLY,
+				      GLI_9750_TUNING_PARAMETERS_RX_DLY_VALUE);
+
+	control_value &= ~SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_1;
+	control_value &= ~SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_2;
+	control_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_1,
+				    GLI_9750_TUNING_CONTROL_GLITCH_1_VALUE);
+	control_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_2,
+				    GLI_9750_TUNING_CONTROL_GLITCH_2_VALUE);
+
+	sdhci_writel(host, pll_value, SDHCI_GLI_9750_PLL);
+	sdhci_writel(host, misc_value, SDHCI_GLI_9750_MISC);
+
+	/* disable tuned clk */
+	ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+	ctrl2 &= ~SDHCI_CTRL_TUNED_CLK;
+	sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2);
+
+	/* enable tuning parameters control */
+	control_value &= ~SDHCI_GLI_9750_TUNING_CONTROL_EN;
+	control_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_CONTROL_EN,
+				    GLI_9750_TUNING_CONTROL_EN_ON);
+	sdhci_writel(host, control_value, SDHCI_GLI_9750_TUNING_CONTROL);
+
+	/* write tuning parameters */
+	sdhci_writel(host, parameter_value, SDHCI_GLI_9750_TUNING_PARAMETERS);
+
+	/* disable tuning parameters control */
+	control_value &= ~SDHCI_GLI_9750_TUNING_CONTROL_EN;
+	control_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_CONTROL_EN,
+				    GLI_9750_TUNING_CONTROL_EN_OFF);
+	sdhci_writel(host, control_value, SDHCI_GLI_9750_TUNING_CONTROL);
+
+	/* clear tuned clk */
+	ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+	ctrl2 &= ~SDHCI_CTRL_TUNED_CLK;
+	sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2);
+
+	gl9750_wt_off(host);
+}
+
+static void gli_set_9750_rx_inv(struct sdhci_host *host, bool b)
+{
+	u32 misc_value;
+
+	gl9750_wt_on(host);
+
+	misc_value = sdhci_readl(host, SDHCI_GLI_9750_MISC);
+	misc_value &= ~SDHCI_GLI_9750_MISC_RX_INV;
+	if (b) {
+		misc_value |= FIELD_PREP(SDHCI_GLI_9750_MISC_RX_INV,
+					 GLI_9750_MISC_RX_INV_ON);
+	} else {
+		misc_value |= FIELD_PREP(SDHCI_GLI_9750_MISC_RX_INV,
+					 GLI_9750_MISC_RX_INV_OFF);
+	}
+	sdhci_writel(host, misc_value, SDHCI_GLI_9750_MISC);
+
+	gl9750_wt_off(host);
+}
+
+static int __sdhci_execute_tuning_9750(struct sdhci_host *host, u32 opcode)
+{
+	int i;
+	int rx_inv;
+
+	for (rx_inv = 0; rx_inv < 2; rx_inv++) {
+		gli_set_9750_rx_inv(host, !!rx_inv);
+		sdhci_start_tuning(host);
+
+		for (i = 0; i < GLI_MAX_TUNING_LOOP; i++) {
+			u16 ctrl;
+
+			sdhci_send_tuning(host, opcode);
+
+			if (!host->tuning_done) {
+				sdhci_abort_tuning(host, opcode);
+				break;
+			}
+
+			ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+			if (!(ctrl & SDHCI_CTRL_EXEC_TUNING)) {
+				if (ctrl & SDHCI_CTRL_TUNED_CLK)
+					return 0; /* Success! */
+				break;
+			}
+		}
+	}
+	if (!host->tuning_done) {
+		pr_info("%s: Tuning timeout, falling back to fixed sampling clock\n",
+			mmc_hostname(host->mmc));
+		return -ETIMEDOUT;
+	}
+
+	pr_info("%s: Tuning failed, falling back to fixed sampling clock\n",
+		mmc_hostname(host->mmc));
+	sdhci_reset_tuning(host);
+
+	return -EAGAIN;
+}
+
+static int gl9750_execute_tuning(struct sdhci_host *host, u32 opcode)
+{
+	host->mmc->retune_period = 0;
+	if (host->tuning_mode == SDHCI_TUNING_MODE_1)
+		host->mmc->retune_period = host->tuning_count;
+
+	gli_set_9750(host);
+	host->tuning_err = __sdhci_execute_tuning_9750(host, opcode);
+	sdhci_end_tuning(host);
+
+	return 0;
+}
+
+static void gl9750_disable_ssc_pll(struct sdhci_host *host)
+{
+	u32 pll;
+
+	gl9750_wt_on(host);
+	pll = sdhci_readl(host, SDHCI_GLI_9750_PLL);
+	pll &= ~(SDHCI_GLI_9750_PLL_DIR | SDHCI_GLI_9750_PLLSSC_EN);
+	sdhci_writel(host, pll, SDHCI_GLI_9750_PLL);
+	gl9750_wt_off(host);
+}
+
+static void gl9750_set_pll(struct sdhci_host *host, u8 dir, u16 ldiv, u8 pdiv)
+{
+	u32 pll;
+
+	gl9750_wt_on(host);
+	pll = sdhci_readl(host, SDHCI_GLI_9750_PLL);
+	pll &= ~(SDHCI_GLI_9750_PLL_LDIV |
+		 SDHCI_GLI_9750_PLL_PDIV |
+		 SDHCI_GLI_9750_PLL_DIR);
+	pll |= FIELD_PREP(SDHCI_GLI_9750_PLL_LDIV, ldiv) |
+	       FIELD_PREP(SDHCI_GLI_9750_PLL_PDIV, pdiv) |
+	       FIELD_PREP(SDHCI_GLI_9750_PLL_DIR, dir);
+	sdhci_writel(host, pll, SDHCI_GLI_9750_PLL);
+	gl9750_wt_off(host);
+
+	/* wait for pll stable */
+	mdelay(1);
+}
+
+static void gl9750_set_ssc(struct sdhci_host *host, u8 enable, u8 step, u16 ppm)
+{
+	u32 pll;
+	u32 ssc;
+
+	gl9750_wt_on(host);
+	pll = sdhci_readl(host, SDHCI_GLI_9750_PLL);
+	ssc = sdhci_readl(host, SDHCI_GLI_9750_PLLSSC);
+	pll &= ~(SDHCI_GLI_9750_PLLSSC_STEP |
+		 SDHCI_GLI_9750_PLLSSC_EN);
+	ssc &= ~SDHCI_GLI_9750_PLLSSC_PPM;
+	pll |= FIELD_PREP(SDHCI_GLI_9750_PLLSSC_STEP, step) |
+	       FIELD_PREP(SDHCI_GLI_9750_PLLSSC_EN, enable);
+	ssc |= FIELD_PREP(SDHCI_GLI_9750_PLLSSC_PPM, ppm);
+	sdhci_writel(host, ssc, SDHCI_GLI_9750_PLLSSC);
+	sdhci_writel(host, pll, SDHCI_GLI_9750_PLL);
+	gl9750_wt_off(host);
+}
+
+static void gl9750_set_ssc_pll_205mhz(struct sdhci_host *host)
+{
+	/* set pll to 205MHz and enable ssc */
+	gl9750_set_ssc(host, 0x1, 0x1F, 0xFFE7);
+	gl9750_set_pll(host, 0x1, 0x246, 0x0);
+}
+
+static void sdhci_gl9750_set_clock(struct sdhci_host *host, unsigned int clock)
+{
+	struct mmc_ios *ios = &host->mmc->ios;
+	u16 clk;
+
+	host->mmc->actual_clock = 0;
+
+	gl9750_disable_ssc_pll(host);
+	sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
+
+	if (clock == 0)
+		return;
+
+	clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);
+	if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {
+		host->mmc->actual_clock = 205000000;
+		gl9750_set_ssc_pll_205mhz(host);
+	}
+
+	sdhci_enable_clk(host, clk);
+}
+
+static void gli_pcie_enable_msi(struct sdhci_pci_slot *slot)
+{
+	int ret;
+
+	ret = pci_alloc_irq_vectors(slot->chip->pdev, 1, 1,
+				    PCI_IRQ_MSI | PCI_IRQ_MSIX);
+	if (ret < 0) {
+		pr_warn("%s: enable PCI MSI failed, error=%d\n",
+		       mmc_hostname(slot->host->mmc), ret);
+		return;
+	}
+
+	slot->host->irq = pci_irq_vector(slot->chip->pdev, 0);
+}
+
+static inline void gl9755_wt_on(struct pci_dev *pdev)
+{
+	u32 wt_value;
+	u32 wt_enable;
+
+	pci_read_config_dword(pdev, PCI_GLI_9755_WT, &wt_value);
+	wt_enable = FIELD_GET(PCI_GLI_9755_WT_EN, wt_value);
+
+	if (wt_enable == GLI_9755_WT_EN_ON)
+		return;
+
+	wt_value &= ~PCI_GLI_9755_WT_EN;
+	wt_value |= FIELD_PREP(PCI_GLI_9755_WT_EN, GLI_9755_WT_EN_ON);
+
+	pci_write_config_dword(pdev, PCI_GLI_9755_WT, wt_value);
+}
+
+static inline void gl9755_wt_off(struct pci_dev *pdev)
+{
+	u32 wt_value;
+	u32 wt_enable;
+
+	pci_read_config_dword(pdev, PCI_GLI_9755_WT, &wt_value);
+	wt_enable = FIELD_GET(PCI_GLI_9755_WT_EN, wt_value);
+
+	if (wt_enable == GLI_9755_WT_EN_OFF)
+		return;
+
+	wt_value &= ~PCI_GLI_9755_WT_EN;
+	wt_value |= FIELD_PREP(PCI_GLI_9755_WT_EN, GLI_9755_WT_EN_OFF);
+
+	pci_write_config_dword(pdev, PCI_GLI_9755_WT, wt_value);
+}
+
+static void gl9755_disable_ssc_pll(struct pci_dev *pdev)
+{
+	u32 pll;
+
+	gl9755_wt_on(pdev);
+	pci_read_config_dword(pdev, PCI_GLI_9755_PLL, &pll);
+	pll &= ~(PCI_GLI_9755_PLL_DIR | PCI_GLI_9755_PLLSSC_EN);
+	pci_write_config_dword(pdev, PCI_GLI_9755_PLL, pll);
+	gl9755_wt_off(pdev);
+}
+
+static void gl9755_set_pll(struct pci_dev *pdev, u8 dir, u16 ldiv, u8 pdiv)
+{
+	u32 pll;
+
+	gl9755_wt_on(pdev);
+	pci_read_config_dword(pdev, PCI_GLI_9755_PLL, &pll);
+	pll &= ~(PCI_GLI_9755_PLL_LDIV |
+		 PCI_GLI_9755_PLL_PDIV |
+		 PCI_GLI_9755_PLL_DIR);
+	pll |= FIELD_PREP(PCI_GLI_9755_PLL_LDIV, ldiv) |
+	       FIELD_PREP(PCI_GLI_9755_PLL_PDIV, pdiv) |
+	       FIELD_PREP(PCI_GLI_9755_PLL_DIR, dir);
+	pci_write_config_dword(pdev, PCI_GLI_9755_PLL, pll);
+	gl9755_wt_off(pdev);
+
+	/* wait for pll stable */
+	mdelay(1);
+}
+
+static void gl9755_set_ssc(struct pci_dev *pdev, u8 enable, u8 step, u16 ppm)
+{
+	u32 pll;
+	u32 ssc;
+
+	gl9755_wt_on(pdev);
+	pci_read_config_dword(pdev, PCI_GLI_9755_PLL, &pll);
+	pci_read_config_dword(pdev, PCI_GLI_9755_PLLSSC, &ssc);
+	pll &= ~(PCI_GLI_9755_PLLSSC_STEP |
+		 PCI_GLI_9755_PLLSSC_EN);
+	ssc &= ~PCI_GLI_9755_PLLSSC_PPM;
+	pll |= FIELD_PREP(PCI_GLI_9755_PLLSSC_STEP, step) |
+	       FIELD_PREP(PCI_GLI_9755_PLLSSC_EN, enable);
+	ssc |= FIELD_PREP(PCI_GLI_9755_PLLSSC_PPM, ppm);
+	pci_write_config_dword(pdev, PCI_GLI_9755_PLLSSC, ssc);
+	pci_write_config_dword(pdev, PCI_GLI_9755_PLL, pll);
+	gl9755_wt_off(pdev);
+}
+
+static void gl9755_set_ssc_pll_205mhz(struct pci_dev *pdev)
+{
+	/* set pll to 205MHz and enable ssc */
+	gl9755_set_ssc(pdev, 0x1, 0x1F, 0xFFE7);
+	gl9755_set_pll(pdev, 0x1, 0x246, 0x0);
+}
+
+static void sdhci_gl9755_set_clock(struct sdhci_host *host, unsigned int clock)
+{
+	struct sdhci_pci_slot *slot = sdhci_priv(host);
+	struct mmc_ios *ios = &host->mmc->ios;
+	struct pci_dev *pdev;
+	u16 clk;
+
+	pdev = slot->chip->pdev;
+	host->mmc->actual_clock = 0;
+
+	gl9755_disable_ssc_pll(pdev);
+	sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
+
+	if (clock == 0)
+		return;
+
+	clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);
+	if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {
+		host->mmc->actual_clock = 205000000;
+		gl9755_set_ssc_pll_205mhz(pdev);
+	}
+
+	sdhci_enable_clk(host, clk);
+}
+
+static int gli_probe_slot_gl9750(struct sdhci_pci_slot *slot)
+{
+	struct sdhci_host *host = slot->host;
+
+	gli_pcie_enable_msi(slot);
+	slot->host->mmc->caps2 |= MMC_CAP2_NO_SDIO;
+	sdhci_enable_v4_mode(host);
+
+	return 0;
+}
+
+static int gli_probe_slot_gl9755(struct sdhci_pci_slot *slot)
+{
+	struct sdhci_host *host = slot->host;
+
+	gli_pcie_enable_msi(slot);
+	slot->host->mmc->caps2 |= MMC_CAP2_NO_SDIO;
+	sdhci_enable_v4_mode(host);
+
+	return 0;
+}
+
+static void sdhci_gli_voltage_switch(struct sdhci_host *host)
+{
+	/*
+	 * According to Section 3.6.1 signal voltage switch procedure in
+	 * SD Host Controller Simplified Spec. 4.20, steps 6~8 are as
+	 * follows:
+	 * (6) Set 1.8V Signal Enable in the Host Control 2 register.
+	 * (7) Wait 5ms. 1.8V voltage regulator shall be stable within this
+	 *     period.
+	 * (8) If 1.8V Signal Enable is cleared by Host Controller, go to
+	 *     step (12).
+	 *
+	 * Wait 5ms after set 1.8V signal enable in Host Control 2 register
+	 * to ensure 1.8V signal enable bit is set by GL9750/GL9755.
+	 *
+	 * ...however, the controller in the NUC10i3FNK4 (a 9755) requires
+	 * slightly longer than 5ms before the control register reports that
+	 * 1.8V is ready, and far longer still before the card will actually
+	 * work reliably.
+	 */
+	usleep_range(100000, 110000);
+}
+
+static void sdhci_gl9750_reset(struct sdhci_host *host, u8 mask)
+{
+	sdhci_reset(host, mask);
+	gli_set_9750(host);
+}
+
+static u32 sdhci_gl9750_readl(struct sdhci_host *host, int reg)
+{
+	u32 value;
+
+	value = readl(host->ioaddr + reg);
+	if (unlikely(reg == SDHCI_MAX_CURRENT && !(value & 0xff)))
+		value |= 0xc8;
+
+	return value;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int sdhci_pci_gli_resume(struct sdhci_pci_chip *chip)
+{
+	struct sdhci_pci_slot *slot = chip->slots[0];
+
+	pci_free_irq_vectors(slot->chip->pdev);
+	gli_pcie_enable_msi(slot);
+
+	return sdhci_pci_resume_host(chip);
+}
+
+static int sdhci_cqhci_gli_resume(struct sdhci_pci_chip *chip)
+{
+	struct sdhci_pci_slot *slot = chip->slots[0];
+	int ret;
+
+	ret = sdhci_pci_gli_resume(chip);
+	if (ret)
+		return ret;
+
+	return cqhci_resume(slot->host->mmc);
+}
+
+static int sdhci_cqhci_gli_suspend(struct sdhci_pci_chip *chip)
+{
+	struct sdhci_pci_slot *slot = chip->slots[0];
+	int ret;
+
+	ret = cqhci_suspend(slot->host->mmc);
+	if (ret)
+		return ret;
+
+	return sdhci_suspend_host(slot->host);
+}
+#endif
+
+static void gl9763e_hs400_enhanced_strobe(struct mmc_host *mmc,
+					  struct mmc_ios *ios)
+{
+	struct sdhci_host *host = mmc_priv(mmc);
+	u32 val;
+
+	val = sdhci_readl(host, SDHCI_GLI_9763E_HS400_ES_REG);
+	if (ios->enhanced_strobe)
+		val |= SDHCI_GLI_9763E_HS400_ES_BIT;
+	else
+		val &= ~SDHCI_GLI_9763E_HS400_ES_BIT;
+
+	sdhci_writel(host, val, SDHCI_GLI_9763E_HS400_ES_REG);
+}
+
+static void sdhci_set_gl9763e_signaling(struct sdhci_host *host,
+					unsigned int timing)
+{
+	u16 ctrl_2;
+
+	ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+	ctrl_2 &= ~SDHCI_CTRL_UHS_MASK;
+	if (timing == MMC_TIMING_MMC_HS200)
+		ctrl_2 |= SDHCI_CTRL_UHS_SDR104;
+	else if (timing == MMC_TIMING_MMC_HS)
+		ctrl_2 |= SDHCI_CTRL_UHS_SDR25;
+	else if (timing == MMC_TIMING_MMC_DDR52)
+		ctrl_2 |= SDHCI_CTRL_UHS_DDR50;
+	else if (timing == MMC_TIMING_MMC_HS400)
+		ctrl_2 |= SDHCI_GLI_9763E_CTRL_HS400;
+
+	sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
+}
+
+static void sdhci_gl9763e_dumpregs(struct mmc_host *mmc)
+{
+	sdhci_dumpregs(mmc_priv(mmc));
+}
+
+static void sdhci_gl9763e_cqe_pre_enable(struct mmc_host *mmc)
+{
+	struct cqhci_host *cq_host = mmc->cqe_private;
+	u32 value;
+
+	value = cqhci_readl(cq_host, CQHCI_CFG);
+	value |= CQHCI_ENABLE;
+	cqhci_writel(cq_host, value, CQHCI_CFG);
+}
+
+static void sdhci_gl9763e_cqe_enable(struct mmc_host *mmc)
+{
+	struct sdhci_host *host = mmc_priv(mmc);
+
+	sdhci_writew(host, GLI_9763E_CQE_TRNS_MODE, SDHCI_TRANSFER_MODE);
+	sdhci_cqe_enable(mmc);
+}
+
+static u32 sdhci_gl9763e_cqhci_irq(struct sdhci_host *host, u32 intmask)
+{
+	int cmd_error = 0;
+	int data_error = 0;
+
+	if (!sdhci_cqe_irq(host, intmask, &cmd_error, &data_error))
+		return intmask;
+
+	cqhci_irq(host->mmc, intmask, cmd_error, data_error);
+
+	return 0;
+}
+
+static void sdhci_gl9763e_cqe_post_disable(struct mmc_host *mmc)
+{
+	struct sdhci_host *host = mmc_priv(mmc);
+	struct cqhci_host *cq_host = mmc->cqe_private;
+	u32 value;
+
+	value = cqhci_readl(cq_host, CQHCI_CFG);
+	value &= ~CQHCI_ENABLE;
+	cqhci_writel(cq_host, value, CQHCI_CFG);
+	sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE);
+}
+
+static const struct cqhci_host_ops sdhci_gl9763e_cqhci_ops = {
+	.enable         = sdhci_gl9763e_cqe_enable,
+	.disable        = sdhci_cqe_disable,
+	.dumpregs       = sdhci_gl9763e_dumpregs,
+	.pre_enable     = sdhci_gl9763e_cqe_pre_enable,
+	.post_disable   = sdhci_gl9763e_cqe_post_disable,
+};
+
+static int gl9763e_add_host(struct sdhci_pci_slot *slot)
+{
+	struct device *dev = &slot->chip->pdev->dev;
+	struct sdhci_host *host = slot->host;
+	struct cqhci_host *cq_host;
+	bool dma64;
+	int ret;
+
+	ret = sdhci_setup_host(host);
+	if (ret)
+		return ret;
+
+	cq_host = devm_kzalloc(dev, sizeof(*cq_host), GFP_KERNEL);
+	if (!cq_host) {
+		ret = -ENOMEM;
+		goto cleanup;
+	}
+
+	cq_host->mmio = host->ioaddr + SDHCI_GLI_9763E_CQE_BASE_ADDR;
+	cq_host->ops = &sdhci_gl9763e_cqhci_ops;
+
+	dma64 = host->flags & SDHCI_USE_64_BIT_DMA;
+	if (dma64)
+		cq_host->caps |= CQHCI_TASK_DESC_SZ_128;
+
+	ret = cqhci_init(cq_host, host->mmc, dma64);
+	if (ret)
+		goto cleanup;
+
+	ret = __sdhci_add_host(host);
+	if (ret)
+		goto cleanup;
+
+	return 0;
+
+cleanup:
+	sdhci_cleanup_host(host);
+	return ret;
+}
+
+static void sdhci_gl9763e_reset(struct sdhci_host *host, u8 mask)
+{
+	if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL) &&
+	    host->mmc->cqe_private)
+		cqhci_deactivate(host->mmc);
+	sdhci_reset(host, mask);
+}
+
+static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
+{
+	struct pci_dev *pdev = slot->chip->pdev;
+	u32 value;
+
+	pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
+	value &= ~GLI_9763E_VHS_REV;
+	value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_W);
+	pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
+
+	pci_read_config_dword(pdev, PCIE_GLI_9763E_SCR, &value);
+	value |= GLI_9763E_SCR_AXI_REQ;
+	pci_write_config_dword(pdev, PCIE_GLI_9763E_SCR, value);
+
+	pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
+	value &= ~GLI_9763E_VHS_REV;
+	value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_R);
+	pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
+}
+
+static int gli_probe_slot_gl9763e(struct sdhci_pci_slot *slot)
+{
+	struct pci_dev *pdev = slot->chip->pdev;
+	struct sdhci_host *host = slot->host;
+	u32 value;
+
+	host->mmc->caps |= MMC_CAP_8_BIT_DATA |
+			   MMC_CAP_1_8V_DDR |
+			   MMC_CAP_NONREMOVABLE;
+	host->mmc->caps2 |= MMC_CAP2_HS200_1_8V_SDR |
+			    MMC_CAP2_HS400_1_8V |
+			    MMC_CAP2_HS400_ES |
+			    MMC_CAP2_NO_SDIO |
+			    MMC_CAP2_NO_SD;
+
+	pci_read_config_dword(pdev, PCIE_GLI_9763E_MB, &value);
+	if (!(value & GLI_9763E_MB_CMDQ_OFF))
+		host->mmc->caps2 |= MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD;
+
+	gli_pcie_enable_msi(slot);
+	host->mmc_host_ops.hs400_enhanced_strobe =
+					gl9763e_hs400_enhanced_strobe;
+	gli_set_gl9763e(slot);
+	sdhci_enable_v4_mode(host);
+
+	return 0;
+}
+
+static const struct sdhci_ops sdhci_gl9755_ops = {
+	.set_clock		= sdhci_gl9755_set_clock,
+	.enable_dma		= sdhci_pci_enable_dma,
+	.set_bus_width		= sdhci_set_bus_width,
+	.reset			= sdhci_reset,
+	.set_uhs_signaling	= sdhci_set_uhs_signaling,
+	.voltage_switch		= sdhci_gli_voltage_switch,
+};
+
+const struct sdhci_pci_fixes sdhci_gl9755 = {
+	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
+	.quirks2	= SDHCI_QUIRK2_BROKEN_DDR50,
+	.probe_slot	= gli_probe_slot_gl9755,
+	.ops            = &sdhci_gl9755_ops,
+#ifdef CONFIG_PM_SLEEP
+	.resume         = sdhci_pci_gli_resume,
+#endif
+};
+
+static const struct sdhci_ops sdhci_gl9750_ops = {
+	.read_l                 = sdhci_gl9750_readl,
+	.set_clock		= sdhci_gl9750_set_clock,
+	.enable_dma		= sdhci_pci_enable_dma,
+	.set_bus_width		= sdhci_set_bus_width,
+	.reset			= sdhci_gl9750_reset,
+	.set_uhs_signaling	= sdhci_set_uhs_signaling,
+	.voltage_switch		= sdhci_gli_voltage_switch,
+	.platform_execute_tuning = gl9750_execute_tuning,
+};
+
+const struct sdhci_pci_fixes sdhci_gl9750 = {
+	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
+	.quirks2	= SDHCI_QUIRK2_BROKEN_DDR50,
+	.probe_slot	= gli_probe_slot_gl9750,
+	.ops            = &sdhci_gl9750_ops,
+#ifdef CONFIG_PM_SLEEP
+	.resume         = sdhci_pci_gli_resume,
+#endif
+};
+
+static const struct sdhci_ops sdhci_gl9763e_ops = {
+	.set_clock		= sdhci_set_clock,
+	.enable_dma		= sdhci_pci_enable_dma,
+	.set_bus_width		= sdhci_set_bus_width,
+	.reset			= sdhci_gl9763e_reset,
+	.set_uhs_signaling	= sdhci_set_gl9763e_signaling,
+	.voltage_switch		= sdhci_gli_voltage_switch,
+	.irq                    = sdhci_gl9763e_cqhci_irq,
+};
+
+const struct sdhci_pci_fixes sdhci_gl9763e = {
+	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
+	.probe_slot	= gli_probe_slot_gl9763e,
+	.ops            = &sdhci_gl9763e_ops,
+#ifdef CONFIG_PM_SLEEP
+	.resume		= sdhci_cqhci_gli_resume,
+	.suspend	= sdhci_cqhci_gli_suspend,
+#endif
+	.add_host       = gl9763e_add_host,
+};
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-o2micro.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-o2micro.c
new file mode 100644
index 000000000000..94e3f72f6405
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-o2micro.c
@@ -0,0 +1,862 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2013 BayHub Technology Ltd.
+ *
+ * Authors: Peter Guo <peter.guo@bayhubtech.com>
+ *          Adam Lee <adam.lee@canonical.com>
+ *          Ernest Zhang <ernest.zhang@bayhubtech.com>
+ */
+
+#include <linux/pci.h>
+#include <linux/mmc/host.h>
+#include <linux/mmc/mmc.h>
+#include <linux/delay.h>
+#include <linux/iopoll.h>
+
+#include "sdhci.h"
+#include "sdhci-pci.h"
+
+/*
+ * O2Micro device registers
+ */
+
+#define O2_SD_MISC_REG5		0x64
+#define O2_SD_LD0_CTRL		0x68
+#define O2_SD_DEV_CTRL		0x88
+#define O2_SD_LOCK_WP		0xD3
+#define O2_SD_TEST_REG		0xD4
+#define O2_SD_FUNC_REG0		0xDC
+#define O2_SD_MULTI_VCC3V	0xEE
+#define O2_SD_CLKREQ		0xEC
+#define O2_SD_CAPS		0xE0
+#define O2_SD_ADMA1		0xE2
+#define O2_SD_ADMA2		0xE7
+#define O2_SD_INF_MOD		0xF1
+#define O2_SD_MISC_CTRL4	0xFC
+#define O2_SD_MISC_CTRL		0x1C0
+#define O2_SD_PWR_FORCE_L0	0x0002
+#define O2_SD_TUNING_CTRL	0x300
+#define O2_SD_PLL_SETTING	0x304
+#define O2_SD_MISC_SETTING	0x308
+#define O2_SD_CLK_SETTING	0x328
+#define O2_SD_CAP_REG2		0x330
+#define O2_SD_CAP_REG0		0x334
+#define O2_SD_UHS1_CAP_SETTING	0x33C
+#define O2_SD_DELAY_CTRL	0x350
+#define O2_SD_UHS2_L1_CTRL	0x35C
+#define O2_SD_FUNC_REG3		0x3E0
+#define O2_SD_FUNC_REG4		0x3E4
+#define O2_SD_LED_ENABLE	BIT(6)
+#define O2_SD_FREG0_LEDOFF	BIT(13)
+#define O2_SD_FREG4_ENABLE_CLK_SET	BIT(22)
+
+#define O2_SD_VENDOR_SETTING	0x110
+#define O2_SD_VENDOR_SETTING2	0x1C8
+#define O2_SD_HW_TUNING_DISABLE	BIT(4)
+
+#define O2_PLL_DLL_WDT_CONTROL1	0x1CC
+#define  O2_PLL_FORCE_ACTIVE	BIT(18)
+#define  O2_PLL_LOCK_STATUS	BIT(14)
+#define  O2_PLL_SOFT_RESET	BIT(12)
+#define  O2_DLL_LOCK_STATUS	BIT(11)
+
+#define O2_SD_DETECT_SETTING 0x324
+
+static const u32 dmdn_table[] = {0x2B1C0000,
+	0x2C1A0000, 0x371B0000, 0x35100000};
+#define DMDN_SZ ARRAY_SIZE(dmdn_table)
+
+struct o2_host {
+	u8 dll_adjust_count;
+};
+
+static void sdhci_o2_wait_card_detect_stable(struct sdhci_host *host)
+{
+	ktime_t timeout;
+	u32 scratch32;
+
+	/* Wait max 50 ms */
+	timeout = ktime_add_ms(ktime_get(), 50);
+	while (1) {
+		bool timedout = ktime_after(ktime_get(), timeout);
+
+		scratch32 = sdhci_readl(host, SDHCI_PRESENT_STATE);
+		if ((scratch32 & SDHCI_CARD_PRESENT) >> SDHCI_CARD_PRES_SHIFT
+		    == (scratch32 & SDHCI_CD_LVL) >> SDHCI_CD_LVL_SHIFT)
+			break;
+
+		if (timedout) {
+			pr_err("%s: Card Detect debounce never finished.\n",
+			       mmc_hostname(host->mmc));
+			sdhci_dumpregs(host);
+			return;
+		}
+		udelay(10);
+	}
+}
+
+static void sdhci_o2_enable_internal_clock(struct sdhci_host *host)
+{
+	ktime_t timeout;
+	u16 scratch;
+	u32 scratch32;
+
+	/* PLL software reset */
+	scratch32 = sdhci_readl(host, O2_PLL_DLL_WDT_CONTROL1);
+	scratch32 |= O2_PLL_SOFT_RESET;
+	sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1);
+	udelay(1);
+	scratch32 &= ~(O2_PLL_SOFT_RESET);
+	sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1);
+
+	/* PLL force active */
+	scratch32 |= O2_PLL_FORCE_ACTIVE;
+	sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1);
+
+	/* Wait max 20 ms */
+	timeout = ktime_add_ms(ktime_get(), 20);
+	while (1) {
+		bool timedout = ktime_after(ktime_get(), timeout);
+
+		scratch = sdhci_readw(host, O2_PLL_DLL_WDT_CONTROL1);
+		if (scratch & O2_PLL_LOCK_STATUS)
+			break;
+		if (timedout) {
+			pr_err("%s: Internal clock never stabilised.\n",
+			       mmc_hostname(host->mmc));
+			sdhci_dumpregs(host);
+			goto out;
+		}
+		udelay(10);
+	}
+
+	/* Wait for card detect finish */
+	udelay(1);
+	sdhci_o2_wait_card_detect_stable(host);
+
+out:
+	/* Cancel PLL force active */
+	scratch32 = sdhci_readl(host, O2_PLL_DLL_WDT_CONTROL1);
+	scratch32 &= ~O2_PLL_FORCE_ACTIVE;
+	sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1);
+}
+
+static int sdhci_o2_get_cd(struct mmc_host *mmc)
+{
+	struct sdhci_host *host = mmc_priv(mmc);
+
+	if (!(sdhci_readw(host, O2_PLL_DLL_WDT_CONTROL1) & O2_PLL_LOCK_STATUS))
+		sdhci_o2_enable_internal_clock(host);
+
+	return !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
+}
+
+static void o2_pci_set_baseclk(struct sdhci_pci_chip *chip, u32 value)
+{
+	u32 scratch_32;
+
+	pci_read_config_dword(chip->pdev,
+			      O2_SD_PLL_SETTING, &scratch_32);
+
+	scratch_32 &= 0x0000FFFF;
+	scratch_32 |= value;
+
+	pci_write_config_dword(chip->pdev,
+			       O2_SD_PLL_SETTING, scratch_32);
+}
+
+static u32 sdhci_o2_pll_dll_wdt_control(struct sdhci_host *host)
+{
+	return sdhci_readl(host, O2_PLL_DLL_WDT_CONTROL1);
+}
+
+/*
+ * This function is used to detect dll lock status.
+ * Since the dll lock status bit will toggle randomly
+ * with very short interval which needs to be polled
+ * as fast as possible. Set sleep_us as 1 microsecond.
+ */
+static int sdhci_o2_wait_dll_detect_lock(struct sdhci_host *host)
+{
+	u32	scratch32 = 0;
+
+	return readx_poll_timeout(sdhci_o2_pll_dll_wdt_control, host,
+		scratch32, !(scratch32 & O2_DLL_LOCK_STATUS), 1, 1000000);
+}
+
+static void sdhci_o2_set_tuning_mode(struct sdhci_host *host)
+{
+	u16 reg;
+
+	/* enable hardware tuning */
+	reg = sdhci_readw(host, O2_SD_VENDOR_SETTING);
+	reg &= ~O2_SD_HW_TUNING_DISABLE;
+	sdhci_writew(host, reg, O2_SD_VENDOR_SETTING);
+}
+
+static void __sdhci_o2_execute_tuning(struct sdhci_host *host, u32 opcode)
+{
+	int i;
+
+	sdhci_send_tuning(host, opcode);
+
+	for (i = 0; i < 150; i++) {
+		u16 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
+
+		if (!(ctrl & SDHCI_CTRL_EXEC_TUNING)) {
+			if (ctrl & SDHCI_CTRL_TUNED_CLK) {
+				host->tuning_done = true;
+				return;
+			}
+			pr_warn("%s: HW tuning failed !\n",
+				mmc_hostname(host->mmc));
+			break;
+		}
+
+		mdelay(1);
+	}
+
+	pr_info("%s: Tuning failed, falling back to fixed sampling clock\n",
+		mmc_hostname(host->mmc));
+	sdhci_reset_tuning(host);
+}
+
+/*
+ * This function is used to fix o2 dll shift issue.
+ * It isn't necessary to detect card present before recovery.
+ * Firstly, it is used by bht emmc card, which is embedded.
+ * Second, before call recovery card present will be detected
+ * outside of the execute tuning function.
+ */
+static int sdhci_o2_dll_recovery(struct sdhci_host *host)
+{
+	int ret = 0;
+	u8 scratch_8 = 0;
+	u32 scratch_32 = 0;
+	struct sdhci_pci_slot *slot = sdhci_priv(host);
+	struct sdhci_pci_chip *chip = slot->chip;
+	struct o2_host *o2_host = sdhci_pci_priv(slot);
+
+	/* UnLock WP */
+	pci_read_config_byte(chip->pdev,
+			O2_SD_LOCK_WP, &scratch_8);
+	scratch_8 &= 0x7f;
+	pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
+	while (o2_host->dll_adjust_count < DMDN_SZ && !ret) {
+		/* Disable clock */
+		sdhci_writeb(host, 0, SDHCI_CLOCK_CONTROL);
+
+		/* PLL software reset */
+		scratch_32 = sdhci_readl(host, O2_PLL_DLL_WDT_CONTROL1);
+		scratch_32 |= O2_PLL_SOFT_RESET;
+		sdhci_writel(host, scratch_32, O2_PLL_DLL_WDT_CONTROL1);
+
+		pci_read_config_dword(chip->pdev,
+					    O2_SD_FUNC_REG4,
+					    &scratch_32);
+		/* Enable Base Clk setting change */
+		scratch_32 |= O2_SD_FREG4_ENABLE_CLK_SET;
+		pci_write_config_dword(chip->pdev, O2_SD_FUNC_REG4, scratch_32);
+		o2_pci_set_baseclk(chip, dmdn_table[o2_host->dll_adjust_count]);
+
+		/* Enable internal clock */
+		scratch_8 = SDHCI_CLOCK_INT_EN;
+		sdhci_writeb(host, scratch_8, SDHCI_CLOCK_CONTROL);
+
+		if (sdhci_o2_get_cd(host->mmc)) {
+			/*
+			 * need wait at least 5ms for dll status stable,
+			 * after enable internal clock
+			 */
+			usleep_range(5000, 6000);
+			if (sdhci_o2_wait_dll_detect_lock(host)) {
+				scratch_8 |= SDHCI_CLOCK_CARD_EN;
+				sdhci_writeb(host, scratch_8,
+					SDHCI_CLOCK_CONTROL);
+				ret = 1;
+			} else {
+				pr_warn("%s: DLL unlocked when dll_adjust_count is %d.\n",
+					mmc_hostname(host->mmc),
+					o2_host->dll_adjust_count);
+			}
+		} else {
+			pr_err("%s: card present detect failed.\n",
+				mmc_hostname(host->mmc));
+			break;
+		}
+
+		o2_host->dll_adjust_count++;
+	}
+	if (!ret && o2_host->dll_adjust_count == DMDN_SZ)
+		pr_err("%s: DLL adjust over max times\n",
+		mmc_hostname(host->mmc));
+	/* Lock WP */
+	pci_read_config_byte(chip->pdev,
+				   O2_SD_LOCK_WP, &scratch_8);
+	scratch_8 |= 0x80;
+	pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
+	return ret;
+}
+
+static int sdhci_o2_execute_tuning(struct mmc_host *mmc, u32 opcode)
+{
+	struct sdhci_host *host = mmc_priv(mmc);
+	int current_bus_width = 0;
+	u32 scratch32 = 0;
+	u16 scratch = 0;
+
+	/*
+	 * This handler only implements the eMMC tuning that is specific to
+	 * this controller.  Fall back to the standard method for other TIMING.
+	 */
+	if ((host->timing != MMC_TIMING_MMC_HS200) &&
+		(host->timing != MMC_TIMING_UHS_SDR104))
+		return sdhci_execute_tuning(mmc, opcode);
+
+	if (WARN_ON((opcode != MMC_SEND_TUNING_BLOCK_HS200) &&
+			(opcode != MMC_SEND_TUNING_BLOCK)))
+		return -EINVAL;
+
+	/* Force power mode enter L0 */
+	scratch = sdhci_readw(host, O2_SD_MISC_CTRL);
+	scratch |= O2_SD_PWR_FORCE_L0;
+	sdhci_writew(host, scratch, O2_SD_MISC_CTRL);
+
+	/* wait DLL lock, timeout value 5ms */
+	if (readx_poll_timeout(sdhci_o2_pll_dll_wdt_control, host,
+		scratch32, (scratch32 & O2_DLL_LOCK_STATUS), 1, 5000))
+		pr_warn("%s: DLL can't lock in 5ms after force L0 during tuning.\n",
+				mmc_hostname(host->mmc));
+	/*
+	 * Judge the tuning reason, whether caused by dll shift
+	 * If cause by dll shift, should call sdhci_o2_dll_recovery
+	 */
+	if (!sdhci_o2_wait_dll_detect_lock(host))
+		if (!sdhci_o2_dll_recovery(host)) {
+			pr_err("%s: o2 dll recovery failed\n",
+				mmc_hostname(host->mmc));
+			return -EINVAL;
+		}
+	/*
+	 * o2 sdhci host didn't support 8bit emmc tuning
+	 */
+	if (mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
+		current_bus_width = mmc->ios.bus_width;
+		mmc->ios.bus_width = MMC_BUS_WIDTH_4;
+		sdhci_set_bus_width(host, MMC_BUS_WIDTH_4);
+	}
+
+	sdhci_o2_set_tuning_mode(host);
+
+	sdhci_start_tuning(host);
+
+	__sdhci_o2_execute_tuning(host, opcode);
+
+	sdhci_end_tuning(host);
+
+	if (current_bus_width == MMC_BUS_WIDTH_8) {
+		mmc->ios.bus_width = MMC_BUS_WIDTH_8;
+		sdhci_set_bus_width(host, current_bus_width);
+	}
+
+	/* Cancel force power mode enter L0 */
+	scratch = sdhci_readw(host, O2_SD_MISC_CTRL);
+	scratch &= ~(O2_SD_PWR_FORCE_L0);
+	sdhci_writew(host, scratch, O2_SD_MISC_CTRL);
+
+	sdhci_reset(host, SDHCI_RESET_CMD);
+	sdhci_reset(host, SDHCI_RESET_DATA);
+
+	host->flags &= ~SDHCI_HS400_TUNING;
+	return 0;
+}
+
+static void o2_pci_led_enable(struct sdhci_pci_chip *chip)
+{
+	int ret;
+	u32 scratch_32;
+
+	/* Set led of SD host function enable */
+	ret = pci_read_config_dword(chip->pdev,
+				    O2_SD_FUNC_REG0, &scratch_32);
+	if (ret)
+		return;
+
+	scratch_32 &= ~O2_SD_FREG0_LEDOFF;
+	pci_write_config_dword(chip->pdev,
+			       O2_SD_FUNC_REG0, scratch_32);
+
+	ret = pci_read_config_dword(chip->pdev,
+				    O2_SD_TEST_REG, &scratch_32);
+	if (ret)
+		return;
+
+	scratch_32 |= O2_SD_LED_ENABLE;
+	pci_write_config_dword(chip->pdev,
+			       O2_SD_TEST_REG, scratch_32);
+}
+
+static void sdhci_pci_o2_fujin2_pci_init(struct sdhci_pci_chip *chip)
+{
+	u32 scratch_32;
+	int ret;
+	/* Improve write performance for SD3.0 */
+	ret = pci_read_config_dword(chip->pdev, O2_SD_DEV_CTRL, &scratch_32);
+	if (ret)
+		return;
+	scratch_32 &= ~((1 << 12) | (1 << 13) | (1 << 14));
+	pci_write_config_dword(chip->pdev, O2_SD_DEV_CTRL, scratch_32);
+
+	/* Enable Link abnormal reset generating Reset */
+	ret = pci_read_config_dword(chip->pdev, O2_SD_MISC_REG5, &scratch_32);
+	if (ret)
+		return;
+	scratch_32 &= ~((1 << 19) | (1 << 11));
+	scratch_32 |= (1 << 10);
+	pci_write_config_dword(chip->pdev, O2_SD_MISC_REG5, scratch_32);
+
+	/* set card power over current protection */
+	ret = pci_read_config_dword(chip->pdev, O2_SD_TEST_REG, &scratch_32);
+	if (ret)
+		return;
+	scratch_32 |= (1 << 4);
+	pci_write_config_dword(chip->pdev, O2_SD_TEST_REG, scratch_32);
+
+	/* adjust the output delay for SD mode */
+	pci_write_config_dword(chip->pdev, O2_SD_DELAY_CTRL, 0x00002492);
+
+	/* Set the output voltage setting of Aux 1.2v LDO */
+	ret = pci_read_config_dword(chip->pdev, O2_SD_LD0_CTRL, &scratch_32);
+	if (ret)
+		return;
+	scratch_32 &= ~(3 << 12);
+	pci_write_config_dword(chip->pdev, O2_SD_LD0_CTRL, scratch_32);
+
+	/* Set Max power supply capability of SD host */
+	ret = pci_read_config_dword(chip->pdev, O2_SD_CAP_REG0, &scratch_32);
+	if (ret)
+		return;
+	scratch_32 &= ~(0x01FE);
+	scratch_32 |= 0x00CC;
+	pci_write_config_dword(chip->pdev, O2_SD_CAP_REG0, scratch_32);
+	/* Set DLL Tuning Window */
+	ret = pci_read_config_dword(chip->pdev,
+				    O2_SD_TUNING_CTRL, &scratch_32);
+	if (ret)
+		return;
+	scratch_32 &= ~(0x000000FF);
+	scratch_32 |= 0x00000066;
+	pci_write_config_dword(chip->pdev, O2_SD_TUNING_CTRL, scratch_32);
+
+	/* Set UHS2 T_EIDLE */
+	ret = pci_read_config_dword(chip->pdev,
+				    O2_SD_UHS2_L1_CTRL, &scratch_32);
+	if (ret)
+		return;
+	scratch_32 &= ~(0x000000FC);
+	scratch_32 |= 0x00000084;
+	pci_write_config_dword(chip->pdev, O2_SD_UHS2_L1_CTRL, scratch_32);
+
+	/* Set UHS2 Termination */
+	ret = pci_read_config_dword(chip->pdev, O2_SD_FUNC_REG3, &scratch_32);
+	if (ret)
+		return;
+	scratch_32 &= ~((1 << 21) | (1 << 30));
+
+	pci_write_config_dword(chip->pdev, O2_SD_FUNC_REG3, scratch_32);
+
+	/* Set L1 Entrance Timer */
+	ret = pci_read_config_dword(chip->pdev, O2_SD_CAPS, &scratch_32);
+	if (ret)
+		return;
+	scratch_32 &= ~(0xf0000000);
+	scratch_32 |= 0x30000000;
+	pci_write_config_dword(chip->pdev, O2_SD_CAPS, scratch_32);
+
+	ret = pci_read_config_dword(chip->pdev,
+				    O2_SD_MISC_CTRL4, &scratch_32);
+	if (ret)
+		return;
+	scratch_32 &= ~(0x000f0000);
+	scratch_32 |= 0x00080000;
+	pci_write_config_dword(chip->pdev, O2_SD_MISC_CTRL4, scratch_32);
+}
+
+static void sdhci_pci_o2_enable_msi(struct sdhci_pci_chip *chip,
+				    struct sdhci_host *host)
+{
+	int ret;
+
+	ret = pci_find_capability(chip->pdev, PCI_CAP_ID_MSI);
+	if (!ret) {
+		pr_info("%s: unsupport msi, use INTx irq\n",
+			mmc_hostname(host->mmc));
+		return;
+	}
+
+	ret = pci_alloc_irq_vectors(chip->pdev, 1, 1,
+				    PCI_IRQ_MSI | PCI_IRQ_MSIX);
+	if (ret < 0) {
+		pr_err("%s: enable PCI MSI failed, err=%d\n",
+		       mmc_hostname(host->mmc), ret);
+		return;
+	}
+
+	host->irq = pci_irq_vector(chip->pdev, 0);
+}
+
+static void sdhci_o2_enable_clk(struct sdhci_host *host, u16 clk)
+{
+	/* Enable internal clock */
+	clk |= SDHCI_CLOCK_INT_EN;
+	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+
+	sdhci_o2_enable_internal_clock(host);
+	if (sdhci_o2_get_cd(host->mmc)) {
+		clk |= SDHCI_CLOCK_CARD_EN;
+		sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+	}
+}
+
+static void sdhci_pci_o2_set_clock(struct sdhci_host *host, unsigned int clock)
+{
+	u16 clk;
+	u8 scratch;
+	u32 scratch_32;
+	struct sdhci_pci_slot *slot = sdhci_priv(host);
+	struct sdhci_pci_chip *chip = slot->chip;
+
+	host->mmc->actual_clock = 0;
+
+	sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
+
+	if (clock == 0)
+		return;
+
+	if ((host->timing == MMC_TIMING_UHS_SDR104) && (clock == 200000000)) {
+		pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
+
+		scratch &= 0x7f;
+		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
+
+		pci_read_config_dword(chip->pdev, O2_SD_PLL_SETTING, &scratch_32);
+
+		if ((scratch_32 & 0xFFFF0000) != 0x2c280000)
+			o2_pci_set_baseclk(chip, 0x2c280000);
+
+		pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
+
+		scratch |= 0x80;
+		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
+	}
+
+	clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);
+	sdhci_o2_enable_clk(host, clk);
+}
+
+static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot)
+{
+	struct sdhci_pci_chip *chip;
+	struct sdhci_host *host;
+	struct o2_host *o2_host = sdhci_pci_priv(slot);
+	u32 reg, caps;
+	int ret;
+
+	chip = slot->chip;
+	host = slot->host;
+
+	o2_host->dll_adjust_count = 0;
+	caps = sdhci_readl(host, SDHCI_CAPABILITIES);
+
+	/*
+	 * mmc_select_bus_width() will test the bus to determine the actual bus
+	 * width.
+	 */
+	if (caps & SDHCI_CAN_DO_8BIT)
+		host->mmc->caps |= MMC_CAP_8_BIT_DATA;
+
+	switch (chip->pdev->device) {
+	case PCI_DEVICE_ID_O2_SDS0:
+	case PCI_DEVICE_ID_O2_SEABIRD0:
+	case PCI_DEVICE_ID_O2_SEABIRD1:
+	case PCI_DEVICE_ID_O2_SDS1:
+	case PCI_DEVICE_ID_O2_FUJIN2:
+		reg = sdhci_readl(host, O2_SD_VENDOR_SETTING);
+		if (reg & 0x1)
+			host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
+
+		sdhci_pci_o2_enable_msi(chip, host);
+
+		if (chip->pdev->device == PCI_DEVICE_ID_O2_SEABIRD0) {
+			ret = pci_read_config_dword(chip->pdev,
+						    O2_SD_MISC_SETTING, &reg);
+			if (ret)
+				return -EIO;
+			if (reg & (1 << 4)) {
+				pr_info("%s: emmc 1.8v flag is set, force 1.8v signaling voltage\n",
+					mmc_hostname(host->mmc));
+				host->flags &= ~SDHCI_SIGNALING_330;
+				host->flags |= SDHCI_SIGNALING_180;
+				host->mmc->caps2 |= MMC_CAP2_NO_SD;
+				host->mmc->caps2 |= MMC_CAP2_NO_SDIO;
+				pci_write_config_dword(chip->pdev,
+						       O2_SD_DETECT_SETTING, 3);
+			}
+
+			slot->host->mmc_host_ops.get_cd = sdhci_o2_get_cd;
+		}
+
+		if (chip->pdev->device == PCI_DEVICE_ID_O2_SEABIRD1) {
+			slot->host->mmc_host_ops.get_cd = sdhci_o2_get_cd;
+			host->mmc->caps2 |= MMC_CAP2_NO_SDIO;
+			host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
+		}
+
+		host->mmc_host_ops.execute_tuning = sdhci_o2_execute_tuning;
+
+		if (chip->pdev->device != PCI_DEVICE_ID_O2_FUJIN2)
+			break;
+		/* set dll watch dog timer */
+		reg = sdhci_readl(host, O2_SD_VENDOR_SETTING2);
+		reg |= (1 << 12);
+		sdhci_writel(host, reg, O2_SD_VENDOR_SETTING2);
+
+		break;
+	default:
+		break;
+	}
+
+	return 0;
+}
+
+static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
+{
+	int ret;
+	u8 scratch;
+	u32 scratch_32;
+
+	switch (chip->pdev->device) {
+	case PCI_DEVICE_ID_O2_8220:
+	case PCI_DEVICE_ID_O2_8221:
+	case PCI_DEVICE_ID_O2_8320:
+	case PCI_DEVICE_ID_O2_8321:
+		/* This extra setup is required due to broken ADMA. */
+		ret = pci_read_config_byte(chip->pdev,
+				O2_SD_LOCK_WP, &scratch);
+		if (ret)
+			return ret;
+		scratch &= 0x7f;
+		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
+
+		/* Set Multi 3 to VCC3V# */
+		pci_write_config_byte(chip->pdev, O2_SD_MULTI_VCC3V, 0x08);
+
+		/* Disable CLK_REQ# support after media DET */
+		ret = pci_read_config_byte(chip->pdev,
+				O2_SD_CLKREQ, &scratch);
+		if (ret)
+			return ret;
+		scratch |= 0x20;
+		pci_write_config_byte(chip->pdev, O2_SD_CLKREQ, scratch);
+
+		/* Choose capabilities, enable SDMA.  We have to write 0x01
+		 * to the capabilities register first to unlock it.
+		 */
+		ret = pci_read_config_byte(chip->pdev, O2_SD_CAPS, &scratch);
+		if (ret)
+			return ret;
+		scratch |= 0x01;
+		pci_write_config_byte(chip->pdev, O2_SD_CAPS, scratch);
+		pci_write_config_byte(chip->pdev, O2_SD_CAPS, 0x73);
+
+		/* Disable ADMA1/2 */
+		pci_write_config_byte(chip->pdev, O2_SD_ADMA1, 0x39);
+		pci_write_config_byte(chip->pdev, O2_SD_ADMA2, 0x08);
+
+		/* Disable the infinite transfer mode */
+		ret = pci_read_config_byte(chip->pdev,
+				O2_SD_INF_MOD, &scratch);
+		if (ret)
+			return ret;
+		scratch |= 0x08;
+		pci_write_config_byte(chip->pdev, O2_SD_INF_MOD, scratch);
+
+		/* Lock WP */
+		ret = pci_read_config_byte(chip->pdev,
+				O2_SD_LOCK_WP, &scratch);
+		if (ret)
+			return ret;
+		scratch |= 0x80;
+		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
+		break;
+	case PCI_DEVICE_ID_O2_SDS0:
+	case PCI_DEVICE_ID_O2_SDS1:
+	case PCI_DEVICE_ID_O2_FUJIN2:
+		/* UnLock WP */
+		ret = pci_read_config_byte(chip->pdev,
+				O2_SD_LOCK_WP, &scratch);
+		if (ret)
+			return ret;
+
+		scratch &= 0x7f;
+		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
+
+		/* DevId=8520 subId= 0x11 or 0x12  Type Chip support */
+		if (chip->pdev->device == PCI_DEVICE_ID_O2_FUJIN2) {
+			ret = pci_read_config_dword(chip->pdev,
+						    O2_SD_FUNC_REG0,
+						    &scratch_32);
+			scratch_32 = ((scratch_32 & 0xFF000000) >> 24);
+
+			/* Check Whether subId is 0x11 or 0x12 */
+			if ((scratch_32 == 0x11) || (scratch_32 == 0x12)) {
+				scratch_32 = 0x25100000;
+
+				o2_pci_set_baseclk(chip, scratch_32);
+				ret = pci_read_config_dword(chip->pdev,
+							    O2_SD_FUNC_REG4,
+							    &scratch_32);
+
+				/* Enable Base Clk setting change */
+				scratch_32 |= O2_SD_FREG4_ENABLE_CLK_SET;
+				pci_write_config_dword(chip->pdev,
+						       O2_SD_FUNC_REG4,
+						       scratch_32);
+
+				/* Set Tuning Window to 4 */
+				pci_write_config_byte(chip->pdev,
+						      O2_SD_TUNING_CTRL, 0x44);
+
+				break;
+			}
+		}
+
+		/* Enable 8520 led function */
+		o2_pci_led_enable(chip);
+
+		/* Set timeout CLK */
+		ret = pci_read_config_dword(chip->pdev,
+					    O2_SD_CLK_SETTING, &scratch_32);
+		if (ret)
+			return ret;
+
+		scratch_32 &= ~(0xFF00);
+		scratch_32 |= 0x07E0C800;
+		pci_write_config_dword(chip->pdev,
+				       O2_SD_CLK_SETTING, scratch_32);
+
+		ret = pci_read_config_dword(chip->pdev,
+					    O2_SD_CLKREQ, &scratch_32);
+		if (ret)
+			return ret;
+		scratch_32 |= 0x3;
+		pci_write_config_dword(chip->pdev, O2_SD_CLKREQ, scratch_32);
+
+		ret = pci_read_config_dword(chip->pdev,
+					    O2_SD_PLL_SETTING, &scratch_32);
+		if (ret)
+			return ret;
+
+		scratch_32 &= ~(0x1F3F070E);
+		scratch_32 |= 0x18270106;
+		pci_write_config_dword(chip->pdev,
+				       O2_SD_PLL_SETTING, scratch_32);
+
+		/* Disable UHS1 funciton */
+		ret = pci_read_config_dword(chip->pdev,
+					    O2_SD_CAP_REG2, &scratch_32);
+		if (ret)
+			return ret;
+		scratch_32 &= ~(0xE0);
+		pci_write_config_dword(chip->pdev,
+				       O2_SD_CAP_REG2, scratch_32);
+
+		if (chip->pdev->device == PCI_DEVICE_ID_O2_FUJIN2)
+			sdhci_pci_o2_fujin2_pci_init(chip);
+
+		/* Lock WP */
+		ret = pci_read_config_byte(chip->pdev,
+					   O2_SD_LOCK_WP, &scratch);
+		if (ret)
+			return ret;
+		scratch |= 0x80;
+		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
+		break;
+	case PCI_DEVICE_ID_O2_SEABIRD0:
+	case PCI_DEVICE_ID_O2_SEABIRD1:
+		/* UnLock WP */
+		ret = pci_read_config_byte(chip->pdev,
+				O2_SD_LOCK_WP, &scratch);
+		if (ret)
+			return ret;
+
+		scratch &= 0x7f;
+		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
+
+		ret = pci_read_config_dword(chip->pdev,
+					    O2_SD_PLL_SETTING, &scratch_32);
+
+		if ((scratch_32 & 0xff000000) == 0x01000000) {
+			scratch_32 &= 0x0000FFFF;
+			scratch_32 |= 0x1F340000;
+
+			pci_write_config_dword(chip->pdev,
+					       O2_SD_PLL_SETTING, scratch_32);
+		} else {
+			scratch_32 &= 0x0000FFFF;
+			scratch_32 |= 0x25100000;
+
+			pci_write_config_dword(chip->pdev,
+					       O2_SD_PLL_SETTING, scratch_32);
+
+			ret = pci_read_config_dword(chip->pdev,
+						    O2_SD_FUNC_REG4,
+						    &scratch_32);
+			scratch_32 |= (1 << 22);
+			pci_write_config_dword(chip->pdev,
+					       O2_SD_FUNC_REG4, scratch_32);
+		}
+
+		/* Set Tuning Windows to 5 */
+		pci_write_config_byte(chip->pdev,
+				O2_SD_TUNING_CTRL, 0x55);
+		/* Lock WP */
+		ret = pci_read_config_byte(chip->pdev,
+					   O2_SD_LOCK_WP, &scratch);
+		if (ret)
+			return ret;
+		scratch |= 0x80;
+		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
+		break;
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int sdhci_pci_o2_resume(struct sdhci_pci_chip *chip)
+{
+	sdhci_pci_o2_probe(chip);
+	return sdhci_pci_resume_host(chip);
+}
+#endif
+
+static const struct sdhci_ops sdhci_pci_o2_ops = {
+	.set_clock = sdhci_pci_o2_set_clock,
+	.enable_dma = sdhci_pci_enable_dma,
+	.set_bus_width = sdhci_set_bus_width,
+	.reset = sdhci_reset,
+	.set_uhs_signaling = sdhci_set_uhs_signaling,
+};
+
+const struct sdhci_pci_fixes sdhci_o2 = {
+	.probe = sdhci_pci_o2_probe,
+	.quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
+	.quirks2 = SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD,
+	.probe_slot = sdhci_pci_o2_probe_slot,
+#ifdef CONFIG_PM_SLEEP
+	.resume = sdhci_pci_o2_resume,
+#endif
+	.ops = &sdhci_pci_o2_ops,
+	.priv_size = sizeof(struct o2_host),
+};
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci.h
new file mode 100644
index 000000000000..8f90c4163bb5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci.h
@@ -0,0 +1,203 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __SDHCI_PCI_H
+#define __SDHCI_PCI_H
+
+/*
+ * PCI device IDs, sub IDs
+ */
+
+#define PCI_DEVICE_ID_O2_SDS0		0x8420
+#define PCI_DEVICE_ID_O2_SDS1		0x8421
+#define PCI_DEVICE_ID_O2_FUJIN2		0x8520
+#define PCI_DEVICE_ID_O2_SEABIRD0	0x8620
+#define PCI_DEVICE_ID_O2_SEABIRD1	0x8621
+
+#define PCI_DEVICE_ID_INTEL_PCH_SDIO0	0x8809
+#define PCI_DEVICE_ID_INTEL_PCH_SDIO1	0x880a
+#define PCI_DEVICE_ID_INTEL_BYT_EMMC	0x0f14
+#define PCI_DEVICE_ID_INTEL_BYT_SDIO	0x0f15
+#define PCI_DEVICE_ID_INTEL_BYT_SD	0x0f16
+#define PCI_DEVICE_ID_INTEL_BYT_EMMC2	0x0f50
+#define PCI_DEVICE_ID_INTEL_BSW_EMMC	0x2294
+#define PCI_DEVICE_ID_INTEL_BSW_SDIO	0x2295
+#define PCI_DEVICE_ID_INTEL_BSW_SD	0x2296
+#define PCI_DEVICE_ID_INTEL_MRFLD_MMC	0x1190
+#define PCI_DEVICE_ID_INTEL_CLV_SDIO0	0x08f9
+#define PCI_DEVICE_ID_INTEL_CLV_SDIO1	0x08fa
+#define PCI_DEVICE_ID_INTEL_CLV_SDIO2	0x08fb
+#define PCI_DEVICE_ID_INTEL_CLV_EMMC0	0x08e5
+#define PCI_DEVICE_ID_INTEL_CLV_EMMC1	0x08e6
+#define PCI_DEVICE_ID_INTEL_QRK_SD	0x08A7
+#define PCI_DEVICE_ID_INTEL_SPT_EMMC	0x9d2b
+#define PCI_DEVICE_ID_INTEL_SPT_SDIO	0x9d2c
+#define PCI_DEVICE_ID_INTEL_SPT_SD	0x9d2d
+#define PCI_DEVICE_ID_INTEL_DNV_EMMC	0x19db
+#define PCI_DEVICE_ID_INTEL_CDF_EMMC	0x18db
+#define PCI_DEVICE_ID_INTEL_BXT_SD	0x0aca
+#define PCI_DEVICE_ID_INTEL_BXT_EMMC	0x0acc
+#define PCI_DEVICE_ID_INTEL_BXT_SDIO	0x0ad0
+#define PCI_DEVICE_ID_INTEL_BXTM_SD	0x1aca
+#define PCI_DEVICE_ID_INTEL_BXTM_EMMC	0x1acc
+#define PCI_DEVICE_ID_INTEL_BXTM_SDIO	0x1ad0
+#define PCI_DEVICE_ID_INTEL_APL_SD	0x5aca
+#define PCI_DEVICE_ID_INTEL_APL_EMMC	0x5acc
+#define PCI_DEVICE_ID_INTEL_APL_SDIO	0x5ad0
+#define PCI_DEVICE_ID_INTEL_GLK_SD	0x31ca
+#define PCI_DEVICE_ID_INTEL_GLK_EMMC	0x31cc
+#define PCI_DEVICE_ID_INTEL_GLK_SDIO	0x31d0
+#define PCI_DEVICE_ID_INTEL_CNP_EMMC	0x9dc4
+#define PCI_DEVICE_ID_INTEL_CNP_SD	0x9df5
+#define PCI_DEVICE_ID_INTEL_CNPH_SD	0xa375
+#define PCI_DEVICE_ID_INTEL_ICP_EMMC	0x34c4
+#define PCI_DEVICE_ID_INTEL_ICP_SD	0x34f8
+#define PCI_DEVICE_ID_INTEL_EHL_EMMC	0x4b47
+#define PCI_DEVICE_ID_INTEL_EHL_SD	0x4b48
+#define PCI_DEVICE_ID_INTEL_CML_EMMC	0x02c4
+#define PCI_DEVICE_ID_INTEL_CML_SD	0x02f5
+#define PCI_DEVICE_ID_INTEL_CMLH_SD	0x06f5
+#define PCI_DEVICE_ID_INTEL_JSL_EMMC	0x4dc4
+#define PCI_DEVICE_ID_INTEL_JSL_SD	0x4df8
+#define PCI_DEVICE_ID_INTEL_LKF_EMMC	0x98c4
+#define PCI_DEVICE_ID_INTEL_LKF_SD	0x98f8
+
+#define PCI_DEVICE_ID_SYSKONNECT_8000	0x8000
+#define PCI_DEVICE_ID_VIA_95D0		0x95d0
+#define PCI_DEVICE_ID_REALTEK_5250	0x5250
+
+#define PCI_SUBDEVICE_ID_NI_7884	0x7884
+#define PCI_SUBDEVICE_ID_NI_78E3	0x78e3
+
+#define PCI_VENDOR_ID_ARASAN		0x16e6
+#define PCI_DEVICE_ID_ARASAN_PHY_EMMC	0x0670
+
+#define PCI_DEVICE_ID_SYNOPSYS_DWC_MSHC 0xc202
+
+#define PCI_DEVICE_ID_GLI_9755		0x9755
+#define PCI_DEVICE_ID_GLI_9750		0x9750
+#define PCI_DEVICE_ID_GLI_9763E		0xe763
+
+/*
+ * PCI device class and mask
+ */
+
+#define SYSTEM_SDHCI			(PCI_CLASS_SYSTEM_SDHCI << 8)
+#define PCI_CLASS_MASK			0xFFFF00
+
+/*
+ * Macros for PCI device-description
+ */
+
+#define _PCI_VEND(vend) PCI_VENDOR_ID_##vend
+#define _PCI_DEV(vend, dev) PCI_DEVICE_ID_##vend##_##dev
+#define _PCI_SUBDEV(subvend, subdev) PCI_SUBDEVICE_ID_##subvend##_##subdev
+
+#define SDHCI_PCI_DEVICE(vend, dev, cfg) { \
+	.vendor = _PCI_VEND(vend), .device = _PCI_DEV(vend, dev), \
+	.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \
+	.driver_data = (kernel_ulong_t)&(sdhci_##cfg) \
+}
+
+#define SDHCI_PCI_SUBDEVICE(vend, dev, subvend, subdev, cfg) { \
+	.vendor = _PCI_VEND(vend), .device = _PCI_DEV(vend, dev), \
+	.subvendor = _PCI_VEND(subvend), \
+	.subdevice = _PCI_SUBDEV(subvend, subdev), \
+	.driver_data = (kernel_ulong_t)&(sdhci_##cfg) \
+}
+
+#define SDHCI_PCI_DEVICE_CLASS(vend, cl, cl_msk, cfg) { \
+	.vendor = _PCI_VEND(vend), .device = PCI_ANY_ID, \
+	.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \
+	.class = (cl), .class_mask = (cl_msk), \
+	.driver_data = (kernel_ulong_t)&(sdhci_##cfg) \
+}
+
+/*
+ * PCI registers
+ */
+
+#define PCI_SDHCI_IFPIO			0x00
+#define PCI_SDHCI_IFDMA			0x01
+#define PCI_SDHCI_IFVENDOR		0x02
+
+#define PCI_SLOT_INFO			0x40	/* 8 bits */
+#define  PCI_SLOT_INFO_SLOTS(x)		((x >> 4) & 7)
+#define  PCI_SLOT_INFO_FIRST_BAR_MASK	0x07
+
+#define MAX_SLOTS			8
+
+struct sdhci_pci_chip;
+struct sdhci_pci_slot;
+
+struct sdhci_pci_fixes {
+	unsigned int		quirks;
+	unsigned int		quirks2;
+	bool			allow_runtime_pm;
+	bool			own_cd_for_runtime_pm;
+
+	int			(*probe) (struct sdhci_pci_chip *);
+
+	int			(*probe_slot) (struct sdhci_pci_slot *);
+	int			(*add_host) (struct sdhci_pci_slot *);
+	void			(*remove_slot) (struct sdhci_pci_slot *, int);
+
+#ifdef CONFIG_PM_SLEEP
+	int			(*suspend) (struct sdhci_pci_chip *);
+	int			(*resume) (struct sdhci_pci_chip *);
+#endif
+#ifdef CONFIG_PM
+	int			(*runtime_suspend) (struct sdhci_pci_chip *);
+	int			(*runtime_resume) (struct sdhci_pci_chip *);
+#endif
+
+	const struct sdhci_ops	*ops;
+	size_t			priv_size;
+};
+
+struct sdhci_pci_slot {
+	struct sdhci_pci_chip	*chip;
+	struct sdhci_host	*host;
+	struct sdhci_pci_data	*data;
+
+	int			rst_n_gpio;
+	int			cd_gpio;
+	int			cd_irq;
+
+	int			cd_idx;
+	bool			cd_override_level;
+
+	void (*hw_reset)(struct sdhci_host *host);
+	unsigned long		private[] ____cacheline_aligned;
+};
+
+struct sdhci_pci_chip {
+	struct pci_dev		*pdev;
+
+	unsigned int		quirks;
+	unsigned int		quirks2;
+	bool			allow_runtime_pm;
+	bool			pm_retune;
+	bool			rpm_retune;
+	const struct sdhci_pci_fixes *fixes;
+
+	int			num_slots;	/* Slots on controller */
+	struct sdhci_pci_slot	*slots[MAX_SLOTS]; /* Pointers to host slots */
+};
+
+static inline void *sdhci_pci_priv(struct sdhci_pci_slot *slot)
+{
+	return (void *)slot->private;
+}
+
+#ifdef CONFIG_PM_SLEEP
+int sdhci_pci_resume_host(struct sdhci_pci_chip *chip);
+#endif
+int sdhci_pci_enable_dma(struct sdhci_host *host);
+
+extern const struct sdhci_pci_fixes sdhci_arasan;
+extern const struct sdhci_pci_fixes sdhci_snps;
+extern const struct sdhci_pci_fixes sdhci_o2;
+extern const struct sdhci_pci_fixes sdhci_gl9750;
+extern const struct sdhci_pci_fixes sdhci_gl9755;
+extern const struct sdhci_pci_fixes sdhci_gl9763e;
+
+#endif /* __SDHCI_PCI_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci.h
new file mode 100644
index 000000000000..0770c036e2ff
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci.h
@@ -0,0 +1,811 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ *  linux/drivers/mmc/host/sdhci.h - Secure Digital Host Controller Interface driver
+ *
+ * Header file for Host Controller registers and I/O accessors.
+ *
+ *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
+ */
+#ifndef __SDHCI_HW_H
+#define __SDHCI_HW_H
+
+#include <linux/bits.h>
+#include <linux/scatterlist.h>
+#include <linux/compiler.h>
+#include <linux/types.h>
+#include <linux/io.h>
+#include <linux/leds.h>
+#include <linux/interrupt.h>
+
+#include <linux/mmc/host.h>
+
+/*
+ * Controller registers
+ */
+
+#define SDHCI_DMA_ADDRESS	0x00
+#define SDHCI_ARGUMENT2		SDHCI_DMA_ADDRESS
+#define SDHCI_32BIT_BLK_CNT	SDHCI_DMA_ADDRESS
+
+#define SDHCI_BLOCK_SIZE	0x04
+#define  SDHCI_MAKE_BLKSZ(dma, blksz) (((dma & 0x7) << 12) | (blksz & 0xFFF))
+
+#define SDHCI_BLOCK_COUNT	0x06
+
+#define SDHCI_ARGUMENT		0x08
+
+#define SDHCI_TRANSFER_MODE	0x0C
+#define  SDHCI_TRNS_DMA		0x01
+#define  SDHCI_TRNS_BLK_CNT_EN	0x02
+#define  SDHCI_TRNS_AUTO_CMD12	0x04
+#define  SDHCI_TRNS_AUTO_CMD23	0x08
+#define  SDHCI_TRNS_AUTO_SEL	0x0C
+#define  SDHCI_TRNS_READ	0x10
+#define  SDHCI_TRNS_MULTI	0x20
+
+#define SDHCI_COMMAND		0x0E
+#define  SDHCI_CMD_RESP_MASK	0x03
+#define  SDHCI_CMD_CRC		0x08
+#define  SDHCI_CMD_INDEX	0x10
+#define  SDHCI_CMD_DATA		0x20
+#define  SDHCI_CMD_ABORTCMD	0xC0
+
+#define  SDHCI_CMD_RESP_NONE	0x00
+#define  SDHCI_CMD_RESP_LONG	0x01
+#define  SDHCI_CMD_RESP_SHORT	0x02
+#define  SDHCI_CMD_RESP_SHORT_BUSY 0x03
+
+#define SDHCI_MAKE_CMD(c, f) (((c & 0xff) << 8) | (f & 0xff))
+#define SDHCI_GET_CMD(c) ((c>>8) & 0x3f)
+
+#define SDHCI_RESPONSE		0x10
+
+#define SDHCI_BUFFER		0x20
+
+#define SDHCI_PRESENT_STATE	0x24
+#define  SDHCI_CMD_INHIBIT	0x00000001
+#define  SDHCI_DATA_INHIBIT	0x00000002
+#define  SDHCI_DOING_WRITE	0x00000100
+#define  SDHCI_DOING_READ	0x00000200
+#define  SDHCI_SPACE_AVAILABLE	0x00000400
+#define  SDHCI_DATA_AVAILABLE	0x00000800
+#define  SDHCI_CARD_PRESENT	0x00010000
+#define   SDHCI_CARD_PRES_SHIFT	16
+#define  SDHCI_CD_STABLE	0x00020000
+#define  SDHCI_CD_LVL		0x00040000
+#define   SDHCI_CD_LVL_SHIFT	18
+#define  SDHCI_WRITE_PROTECT	0x00080000
+#define  SDHCI_DATA_LVL_MASK	0x00F00000
+#define   SDHCI_DATA_LVL_SHIFT	20
+#define   SDHCI_DATA_0_LVL_MASK	0x00100000
+#define  SDHCI_CMD_LVL		0x01000000
+
+#define SDHCI_HOST_CONTROL	0x28
+#define  SDHCI_CTRL_LED		0x01
+#define  SDHCI_CTRL_4BITBUS	0x02
+#define  SDHCI_CTRL_HISPD	0x04
+#define  SDHCI_CTRL_DMA_MASK	0x18
+#define   SDHCI_CTRL_SDMA	0x00
+#define   SDHCI_CTRL_ADMA1	0x08
+#define   SDHCI_CTRL_ADMA32	0x10
+#define   SDHCI_CTRL_ADMA64	0x18
+#define   SDHCI_CTRL_ADMA3	0x18
+#define  SDHCI_CTRL_8BITBUS	0x20
+#define  SDHCI_CTRL_CDTEST_INS	0x40
+#define  SDHCI_CTRL_CDTEST_EN	0x80
+
+#define SDHCI_POWER_CONTROL	0x29
+#define  SDHCI_POWER_ON		0x01
+#define  SDHCI_POWER_180	0x0A
+#define  SDHCI_POWER_300	0x0C
+#define  SDHCI_POWER_330	0x0E
+
+#define SDHCI_BLOCK_GAP_CONTROL	0x2A
+
+#define SDHCI_WAKE_UP_CONTROL	0x2B
+#define  SDHCI_WAKE_ON_INT	0x01
+#define  SDHCI_WAKE_ON_INSERT	0x02
+#define  SDHCI_WAKE_ON_REMOVE	0x04
+
+#define SDHCI_CLOCK_CONTROL	0x2C
+#define  SDHCI_DIVIDER_SHIFT	8
+#define  SDHCI_DIVIDER_HI_SHIFT	6
+#define  SDHCI_DIV_MASK	0xFF
+#define  SDHCI_DIV_MASK_LEN	8
+#define  SDHCI_DIV_HI_MASK	0x300
+#define  SDHCI_PROG_CLOCK_MODE	0x0020
+#define  SDHCI_CLOCK_CARD_EN	0x0004
+#define  SDHCI_CLOCK_PLL_EN	0x0008
+#define  SDHCI_CLOCK_INT_STABLE	0x0002
+#define  SDHCI_CLOCK_INT_EN	0x0001
+
+#define SDHCI_TIMEOUT_CONTROL	0x2E
+
+#define SDHCI_SOFTWARE_RESET	0x2F
+#define  SDHCI_RESET_ALL	0x01
+#define  SDHCI_RESET_CMD	0x02
+#define  SDHCI_RESET_DATA	0x04
+
+#define SDHCI_INT_STATUS	0x30
+#define SDHCI_INT_ENABLE	0x34
+#define SDHCI_SIGNAL_ENABLE	0x38
+#define  SDHCI_INT_RESPONSE	0x00000001
+#define  SDHCI_INT_DATA_END	0x00000002
+#define  SDHCI_INT_BLK_GAP	0x00000004
+#define  SDHCI_INT_DMA_END	0x00000008
+#define  SDHCI_INT_SPACE_AVAIL	0x00000010
+#define  SDHCI_INT_DATA_AVAIL	0x00000020
+#define  SDHCI_INT_CARD_INSERT	0x00000040
+#define  SDHCI_INT_CARD_REMOVE	0x00000080
+#define  SDHCI_INT_CARD_INT	0x00000100
+#define  SDHCI_INT_RETUNE	0x00001000
+#define  SDHCI_INT_CQE		0x00004000
+#define  SDHCI_INT_ERROR	0x00008000
+#define  SDHCI_INT_TIMEOUT	0x00010000
+#define  SDHCI_INT_CRC		0x00020000
+#define  SDHCI_INT_END_BIT	0x00040000
+#define  SDHCI_INT_INDEX	0x00080000
+#define  SDHCI_INT_DATA_TIMEOUT	0x00100000
+#define  SDHCI_INT_DATA_CRC	0x00200000
+#define  SDHCI_INT_DATA_END_BIT	0x00400000
+#define  SDHCI_INT_BUS_POWER	0x00800000
+#define  SDHCI_INT_AUTO_CMD_ERR	0x01000000
+#define  SDHCI_INT_ADMA_ERROR	0x02000000
+
+#define  SDHCI_INT_NORMAL_MASK	0x00007FFF
+#define  SDHCI_INT_ERROR_MASK	0xFFFF8000
+
+#define  SDHCI_INT_CMD_MASK	(SDHCI_INT_RESPONSE | SDHCI_INT_TIMEOUT | \
+		SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX | \
+		SDHCI_INT_AUTO_CMD_ERR)
+#define  SDHCI_INT_DATA_MASK	(SDHCI_INT_DATA_END | SDHCI_INT_DMA_END | \
+		SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL | \
+		SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_DATA_CRC | \
+		SDHCI_INT_DATA_END_BIT | SDHCI_INT_ADMA_ERROR | \
+		SDHCI_INT_BLK_GAP)
+#define SDHCI_INT_ALL_MASK	((unsigned int)-1)
+
+#define SDHCI_CQE_INT_ERR_MASK ( \
+	SDHCI_INT_ADMA_ERROR | SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | \
+	SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX | \
+	SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT)
+
+#define SDHCI_CQE_INT_MASK (SDHCI_CQE_INT_ERR_MASK | SDHCI_INT_CQE)
+
+#define SDHCI_AUTO_CMD_STATUS	0x3C
+#define  SDHCI_AUTO_CMD_TIMEOUT	0x00000002
+#define  SDHCI_AUTO_CMD_CRC	0x00000004
+#define  SDHCI_AUTO_CMD_END_BIT	0x00000008
+#define  SDHCI_AUTO_CMD_INDEX	0x00000010
+
+#define SDHCI_HOST_CONTROL2		0x3E
+#define  SDHCI_CTRL_UHS_MASK		0x0007
+#define   SDHCI_CTRL_UHS_SDR12		0x0000
+#define   SDHCI_CTRL_UHS_SDR25		0x0001
+#define   SDHCI_CTRL_UHS_SDR50		0x0002
+#define   SDHCI_CTRL_UHS_SDR104		0x0003
+#define   SDHCI_CTRL_UHS_DDR50		0x0004
+#define   SDHCI_CTRL_HS400		0x0005 /* Non-standard */
+#define  SDHCI_CTRL_VDD_180		0x0008
+#define  SDHCI_CTRL_DRV_TYPE_MASK	0x0030
+#define   SDHCI_CTRL_DRV_TYPE_B		0x0000
+#define   SDHCI_CTRL_DRV_TYPE_A		0x0010
+#define   SDHCI_CTRL_DRV_TYPE_C		0x0020
+#define   SDHCI_CTRL_DRV_TYPE_D		0x0030
+#define  SDHCI_CTRL_EXEC_TUNING		0x0040
+#define  SDHCI_CTRL_TUNED_CLK		0x0080
+#define  SDHCI_CMD23_ENABLE		0x0800
+#define  SDHCI_CTRL_V4_MODE		0x1000
+#define  SDHCI_CTRL_64BIT_ADDR		0x2000
+#define  SDHCI_CTRL_PRESET_VAL_ENABLE	0x8000
+
+#define SDHCI_CAPABILITIES	0x40
+#define  SDHCI_TIMEOUT_CLK_MASK		GENMASK(5, 0)
+#define  SDHCI_TIMEOUT_CLK_UNIT	0x00000080
+#define  SDHCI_CLOCK_BASE_MASK		GENMASK(13, 8)
+#define  SDHCI_CLOCK_V3_BASE_MASK	GENMASK(15, 8)
+#define  SDHCI_MAX_BLOCK_MASK	0x00030000
+#define  SDHCI_MAX_BLOCK_SHIFT  16
+#define  SDHCI_CAN_DO_8BIT	0x00040000
+#define  SDHCI_CAN_DO_ADMA2	0x00080000
+#define  SDHCI_CAN_DO_ADMA1	0x00100000
+#define  SDHCI_CAN_DO_HISPD	0x00200000
+#define  SDHCI_CAN_DO_SDMA	0x00400000
+#define  SDHCI_CAN_DO_SUSPEND	0x00800000
+#define  SDHCI_CAN_VDD_330	0x01000000
+#define  SDHCI_CAN_VDD_300	0x02000000
+#define  SDHCI_CAN_VDD_180	0x04000000
+#define  SDHCI_CAN_64BIT_V4	0x08000000
+#define  SDHCI_CAN_64BIT	0x10000000
+
+#define SDHCI_CAPABILITIES_1	0x44
+#define  SDHCI_SUPPORT_SDR50	0x00000001
+#define  SDHCI_SUPPORT_SDR104	0x00000002
+#define  SDHCI_SUPPORT_DDR50	0x00000004
+#define  SDHCI_DRIVER_TYPE_A	0x00000010
+#define  SDHCI_DRIVER_TYPE_C	0x00000020
+#define  SDHCI_DRIVER_TYPE_D	0x00000040
+#define  SDHCI_RETUNING_TIMER_COUNT_MASK	GENMASK(11, 8)
+#define  SDHCI_USE_SDR50_TUNING			0x00002000
+#define  SDHCI_RETUNING_MODE_MASK		GENMASK(15, 14)
+#define  SDHCI_CLOCK_MUL_MASK			GENMASK(23, 16)
+#define  SDHCI_CAN_DO_ADMA3	0x08000000
+#define  SDHCI_SUPPORT_HS400	0x80000000 /* Non-standard */
+
+#define SDHCI_MAX_CURRENT		0x48
+#define  SDHCI_MAX_CURRENT_LIMIT	GENMASK(7, 0)
+#define  SDHCI_MAX_CURRENT_330_MASK	GENMASK(7, 0)
+#define  SDHCI_MAX_CURRENT_300_MASK	GENMASK(15, 8)
+#define  SDHCI_MAX_CURRENT_180_MASK	GENMASK(23, 16)
+#define   SDHCI_MAX_CURRENT_MULTIPLIER	4
+
+/* 4C-4F reserved for more max current */
+
+#define SDHCI_SET_ACMD12_ERROR	0x50
+#define SDHCI_SET_INT_ERROR	0x52
+
+#define SDHCI_ADMA_ERROR	0x54
+
+/* 55-57 reserved */
+
+#define SDHCI_ADMA_ADDRESS	0x58
+#define SDHCI_ADMA_ADDRESS_HI	0x5C
+
+/* 60-FB reserved */
+
+#define SDHCI_PRESET_FOR_SDR12 0x66
+#define SDHCI_PRESET_FOR_SDR25 0x68
+#define SDHCI_PRESET_FOR_SDR50 0x6A
+#define SDHCI_PRESET_FOR_SDR104        0x6C
+#define SDHCI_PRESET_FOR_DDR50 0x6E
+#define SDHCI_PRESET_FOR_HS400 0x74 /* Non-standard */
+#define SDHCI_PRESET_DRV_MASK		GENMASK(15, 14)
+#define SDHCI_PRESET_CLKGEN_SEL		BIT(10)
+#define SDHCI_PRESET_SDCLK_FREQ_MASK	GENMASK(9, 0)
+
+#define SDHCI_SLOT_INT_STATUS	0xFC
+
+#define SDHCI_HOST_VERSION	0xFE
+#define  SDHCI_VENDOR_VER_MASK	0xFF00
+#define  SDHCI_VENDOR_VER_SHIFT	8
+#define  SDHCI_SPEC_VER_MASK	0x00FF
+#define  SDHCI_SPEC_VER_SHIFT	0
+#define   SDHCI_SPEC_100	0
+#define   SDHCI_SPEC_200	1
+#define   SDHCI_SPEC_300	2
+#define   SDHCI_SPEC_400	3
+#define   SDHCI_SPEC_410	4
+#define   SDHCI_SPEC_420	5
+
+/*
+ * End of controller registers.
+ */
+
+#define SDHCI_MAX_DIV_SPEC_200	256
+#define SDHCI_MAX_DIV_SPEC_300	2046
+
+/*
+ * Host SDMA buffer boundary. Valid values from 4K to 512K in powers of 2.
+ */
+#define SDHCI_DEFAULT_BOUNDARY_SIZE  (512 * 1024)
+#define SDHCI_DEFAULT_BOUNDARY_ARG   (ilog2(SDHCI_DEFAULT_BOUNDARY_SIZE) - 12)
+
+/* ADMA2 32-bit DMA descriptor size */
+#define SDHCI_ADMA2_32_DESC_SZ	8
+
+/* ADMA2 32-bit descriptor */
+struct sdhci_adma2_32_desc {
+	__le16	cmd;
+	__le16	len;
+	__le32	addr;
+}  __packed __aligned(4);
+
+/* ADMA2 data alignment */
+#define SDHCI_ADMA2_ALIGN	4
+#define SDHCI_ADMA2_MASK	(SDHCI_ADMA2_ALIGN - 1)
+
+/*
+ * ADMA2 descriptor alignment.  Some controllers (e.g. Intel) require 8 byte
+ * alignment for the descriptor table even in 32-bit DMA mode.  Memory
+ * allocation is at least 8 byte aligned anyway, so just stipulate 8 always.
+ */
+#define SDHCI_ADMA2_DESC_ALIGN	8
+
+/*
+ * ADMA2 64-bit DMA descriptor size
+ * According to SD Host Controller spec v4.10, there are two kinds of
+ * descriptors for 64-bit addressing mode: 96-bit Descriptor and 128-bit
+ * Descriptor, if Host Version 4 Enable is set in the Host Control 2
+ * register, 128-bit Descriptor will be selected.
+ */
+#define SDHCI_ADMA2_64_DESC_SZ(host)	((host)->v4_mode ? 16 : 12)
+
+/*
+ * ADMA2 64-bit descriptor. Note 12-byte descriptor can't always be 8-byte
+ * aligned.
+ */
+struct sdhci_adma2_64_desc {
+	__le16	cmd;
+	__le16	len;
+	__le32	addr_lo;
+	__le32	addr_hi;
+}  __packed __aligned(4);
+
+#define ADMA2_TRAN_VALID	0x21
+#define ADMA2_NOP_END_VALID	0x3
+#define ADMA2_END		0x2
+
+/*
+ * Maximum segments assuming a 512KiB maximum requisition size and a minimum
+ * 4KiB page size.
+ */
+#define SDHCI_MAX_SEGS		128
+
+/* Allow for a a command request and a data request at the same time */
+#define SDHCI_MAX_MRQS		2
+
+/*
+ * 48bit command and 136 bit response in 100KHz clock could take upto 2.48ms.
+ * However since the start time of the command, the time between
+ * command and response, and the time between response and start of data is
+ * not known, set the command transfer time to 10ms.
+ */
+#define MMC_CMD_TRANSFER_TIME	(10 * NSEC_PER_MSEC) /* max 10 ms */
+
+enum sdhci_cookie {
+	COOKIE_UNMAPPED,
+	COOKIE_PRE_MAPPED,	/* mapped by sdhci_pre_req() */
+	COOKIE_MAPPED,		/* mapped by sdhci_prepare_data() */
+};
+
+struct sdhci_host {
+	/* Data set by hardware interface driver */
+	const char *hw_name;	/* Hardware bus name */
+
+	unsigned int quirks;	/* Deviations from spec. */
+
+/* Controller doesn't honor resets unless we touch the clock register */
+#define SDHCI_QUIRK_CLOCK_BEFORE_RESET			(1<<0)
+/* Controller has bad caps bits, but really supports DMA */
+#define SDHCI_QUIRK_FORCE_DMA				(1<<1)
+/* Controller doesn't like to be reset when there is no card inserted. */
+#define SDHCI_QUIRK_NO_CARD_NO_RESET			(1<<2)
+/* Controller doesn't like clearing the power reg before a change */
+#define SDHCI_QUIRK_SINGLE_POWER_WRITE			(1<<3)
+/* Controller has flaky internal state so reset it on each ios change */
+#define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS		(1<<4)
+/* Controller has an unusable DMA engine */
+#define SDHCI_QUIRK_BROKEN_DMA				(1<<5)
+/* Controller has an unusable ADMA engine */
+#define SDHCI_QUIRK_BROKEN_ADMA				(1<<6)
+/* Controller can only DMA from 32-bit aligned addresses */
+#define SDHCI_QUIRK_32BIT_DMA_ADDR			(1<<7)
+/* Controller can only DMA chunk sizes that are a multiple of 32 bits */
+#define SDHCI_QUIRK_32BIT_DMA_SIZE			(1<<8)
+/* Controller can only ADMA chunks that are a multiple of 32 bits */
+#define SDHCI_QUIRK_32BIT_ADMA_SIZE			(1<<9)
+/* Controller needs to be reset after each request to stay stable */
+#define SDHCI_QUIRK_RESET_AFTER_REQUEST			(1<<10)
+/* Controller needs voltage and power writes to happen separately */
+#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER		(1<<11)
+/* Controller provides an incorrect timeout value for transfers */
+#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL			(1<<12)
+/* Controller has an issue with buffer bits for small transfers */
+#define SDHCI_QUIRK_BROKEN_SMALL_PIO			(1<<13)
+/* Controller does not provide transfer-complete interrupt when not busy */
+#define SDHCI_QUIRK_NO_BUSY_IRQ				(1<<14)
+/* Controller has unreliable card detection */
+#define SDHCI_QUIRK_BROKEN_CARD_DETECTION		(1<<15)
+/* Controller reports inverted write-protect state */
+#define SDHCI_QUIRK_INVERTED_WRITE_PROTECT		(1<<16)
+/* Controller has unusable command queue engine */
+#define SDHCI_QUIRK_BROKEN_CQE				(1<<17)
+/* Controller does not like fast PIO transfers */
+#define SDHCI_QUIRK_PIO_NEEDS_DELAY			(1<<18)
+/* Controller does not have a LED */
+#define SDHCI_QUIRK_NO_LED				(1<<19)
+/* Controller has to be forced to use block size of 2048 bytes */
+#define SDHCI_QUIRK_FORCE_BLK_SZ_2048			(1<<20)
+/* Controller cannot do multi-block transfers */
+#define SDHCI_QUIRK_NO_MULTIBLOCK			(1<<21)
+/* Controller can only handle 1-bit data transfers */
+#define SDHCI_QUIRK_FORCE_1_BIT_DATA			(1<<22)
+/* Controller needs 10ms delay between applying power and clock */
+#define SDHCI_QUIRK_DELAY_AFTER_POWER			(1<<23)
+/* Controller uses SDCLK instead of TMCLK for data timeouts */
+#define SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK		(1<<24)
+/* Controller reports wrong base clock capability */
+#define SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN		(1<<25)
+/* Controller cannot support End Attribute in NOP ADMA descriptor */
+#define SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC		(1<<26)
+/* Controller is missing device caps. Use caps provided by host */
+#define SDHCI_QUIRK_MISSING_CAPS			(1<<27)
+/* Controller uses Auto CMD12 command to stop the transfer */
+#define SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12		(1<<28)
+/* Controller doesn't have HISPD bit field in HI-SPEED SD card */
+#define SDHCI_QUIRK_NO_HISPD_BIT			(1<<29)
+/* Controller treats ADMA descriptors with length 0000h incorrectly */
+#define SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC		(1<<30)
+/* The read-only detection via SDHCI_PRESENT_STATE register is unstable */
+#define SDHCI_QUIRK_UNSTABLE_RO_DETECT			(1<<31)
+
+	unsigned int quirks2;	/* More deviations from spec. */
+
+#define SDHCI_QUIRK2_HOST_OFF_CARD_ON			(1<<0)
+#define SDHCI_QUIRK2_HOST_NO_CMD23			(1<<1)
+/* The system physically doesn't support 1.8v, even if the host does */
+#define SDHCI_QUIRK2_NO_1_8_V				(1<<2)
+#define SDHCI_QUIRK2_PRESET_VALUE_BROKEN		(1<<3)
+#define SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON		(1<<4)
+/* Controller has a non-standard host control register */
+#define SDHCI_QUIRK2_BROKEN_HOST_CONTROL		(1<<5)
+/* Controller does not support HS200 */
+#define SDHCI_QUIRK2_BROKEN_HS200			(1<<6)
+/* Controller does not support DDR50 */
+#define SDHCI_QUIRK2_BROKEN_DDR50			(1<<7)
+/* Stop command (CMD12) can set Transfer Complete when not using MMC_RSP_BUSY */
+#define SDHCI_QUIRK2_STOP_WITH_TC			(1<<8)
+/* Controller does not support 64-bit DMA */
+#define SDHCI_QUIRK2_BROKEN_64_BIT_DMA			(1<<9)
+/* need clear transfer mode register before send cmd */
+#define SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD	(1<<10)
+/* Capability register bit-63 indicates HS400 support */
+#define SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400		(1<<11)
+/* forced tuned clock */
+#define SDHCI_QUIRK2_TUNING_WORK_AROUND			(1<<12)
+/* disable the block count for single block transactions */
+#define SDHCI_QUIRK2_SUPPORT_SINGLE			(1<<13)
+/* Controller broken with using ACMD23 */
+#define SDHCI_QUIRK2_ACMD23_BROKEN			(1<<14)
+/* Broken Clock divider zero in controller */
+#define SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN		(1<<15)
+/* Controller has CRC in 136 bit Command Response */
+#define SDHCI_QUIRK2_RSP_136_HAS_CRC			(1<<16)
+/*
+ * Disable HW timeout if the requested timeout is more than the maximum
+ * obtainable timeout.
+ */
+#define SDHCI_QUIRK2_DISABLE_HW_TIMEOUT			(1<<17)
+/*
+ * 32-bit block count may not support eMMC where upper bits of CMD23 are used
+ * for other purposes.  Consequently we support 16-bit block count by default.
+ * Otherwise, SDHCI_QUIRK2_USE_32BIT_BLK_CNT can be selected to use 32-bit
+ * block count.
+ */
+#define SDHCI_QUIRK2_USE_32BIT_BLK_CNT			(1<<18)
+
+	int irq;		/* Device IRQ */
+	void __iomem *ioaddr;	/* Mapped address */
+	phys_addr_t mapbase;	/* physical address base */
+	char *bounce_buffer;	/* For packing SDMA reads/writes */
+	dma_addr_t bounce_addr;
+	unsigned int bounce_buffer_size;
+
+	const struct sdhci_ops *ops;	/* Low level hw interface */
+
+	/* Internal data */
+	struct mmc_host *mmc;	/* MMC structure */
+	struct mmc_host_ops mmc_host_ops;	/* MMC host ops */
+	u64 dma_mask;		/* custom DMA mask */
+
+#if IS_ENABLED(CONFIG_LEDS_CLASS)
+	struct led_classdev led;	/* LED control */
+	char led_name[32];
+#endif
+
+	spinlock_t lock;	/* Mutex */
+
+	int flags;		/* Host attributes */
+#define SDHCI_USE_SDMA		(1<<0)	/* Host is SDMA capable */
+#define SDHCI_USE_ADMA		(1<<1)	/* Host is ADMA capable */
+#define SDHCI_REQ_USE_DMA	(1<<2)	/* Use DMA for this req. */
+#define SDHCI_DEVICE_DEAD	(1<<3)	/* Device unresponsive */
+#define SDHCI_SDR50_NEEDS_TUNING (1<<4)	/* SDR50 needs tuning */
+#define SDHCI_AUTO_CMD12	(1<<6)	/* Auto CMD12 support */
+#define SDHCI_AUTO_CMD23	(1<<7)	/* Auto CMD23 support */
+#define SDHCI_PV_ENABLED	(1<<8)	/* Preset value enabled */
+#define SDHCI_USE_64_BIT_DMA	(1<<12)	/* Use 64-bit DMA */
+#define SDHCI_HS400_TUNING	(1<<13)	/* Tuning for HS400 */
+#define SDHCI_SIGNALING_330	(1<<14)	/* Host is capable of 3.3V signaling */
+#define SDHCI_SIGNALING_180	(1<<15)	/* Host is capable of 1.8V signaling */
+#define SDHCI_SIGNALING_120	(1<<16)	/* Host is capable of 1.2V signaling */
+
+	unsigned int version;	/* SDHCI spec. version */
+
+	unsigned int max_clk;	/* Max possible freq (MHz) */
+	unsigned int timeout_clk;	/* Timeout freq (KHz) */
+	unsigned int clk_mul;	/* Clock Muliplier value */
+
+	unsigned int clock;	/* Current clock (MHz) */
+	u8 pwr;			/* Current voltage */
+
+	bool runtime_suspended;	/* Host is runtime suspended */
+	bool bus_on;		/* Bus power prevents runtime suspend */
+	bool preset_enabled;	/* Preset is enabled */
+	bool pending_reset;	/* Cmd/data reset is pending */
+	bool irq_wake_enabled;	/* IRQ wakeup is enabled */
+	bool v4_mode;		/* Host Version 4 Enable */
+	bool use_external_dma;	/* Host selects to use external DMA */
+	bool always_defer_done;	/* Always defer to complete requests */
+
+	struct mmc_request *mrqs_done[SDHCI_MAX_MRQS];	/* Requests done */
+	struct mmc_command *cmd;	/* Current command */
+	struct mmc_command *data_cmd;	/* Current data command */
+	struct mmc_command *deferred_cmd;	/* Deferred command */
+	struct mmc_data *data;	/* Current data request */
+	unsigned int data_early:1;	/* Data finished before cmd */
+
+	struct sg_mapping_iter sg_miter;	/* SG state for PIO */
+	unsigned int blocks;	/* remaining PIO blocks */
+
+	int sg_count;		/* Mapped sg entries */
+
+	void *adma_table;	/* ADMA descriptor table */
+	void *align_buffer;	/* Bounce buffer */
+
+	size_t adma_table_sz;	/* ADMA descriptor table size */
+	size_t align_buffer_sz;	/* Bounce buffer size */
+
+	dma_addr_t adma_addr;	/* Mapped ADMA descr. table */
+	dma_addr_t align_addr;	/* Mapped bounce buffer */
+
+	unsigned int desc_sz;	/* ADMA current descriptor size */
+	unsigned int alloc_desc_sz;	/* ADMA descr. max size host supports */
+
+	struct workqueue_struct *complete_wq;	/* Request completion wq */
+	struct work_struct	complete_work;	/* Request completion work */
+
+	struct timer_list timer;	/* Timer for timeouts */
+	struct timer_list data_timer;	/* Timer for data timeouts */
+
+#if IS_ENABLED(CONFIG_MMC_SDHCI_EXTERNAL_DMA)
+	struct dma_chan *rx_chan;
+	struct dma_chan *tx_chan;
+#endif
+
+	u32 caps;		/* CAPABILITY_0 */
+	u32 caps1;		/* CAPABILITY_1 */
+	bool read_caps;		/* Capability flags have been read */
+
+	bool sdhci_core_to_disable_vqmmc;  /* sdhci core can disable vqmmc */
+	unsigned int            ocr_avail_sdio;	/* OCR bit masks */
+	unsigned int            ocr_avail_sd;
+	unsigned int            ocr_avail_mmc;
+	u32 ocr_mask;		/* available voltages */
+
+	unsigned		timing;		/* Current timing */
+
+	u32			thread_isr;
+
+	/* cached registers */
+	u32			ier;
+
+	bool			cqe_on;		/* CQE is operating */
+	u32			cqe_ier;	/* CQE interrupt mask */
+	u32			cqe_err_ier;	/* CQE error interrupt mask */
+
+	wait_queue_head_t	buf_ready_int;	/* Waitqueue for Buffer Read Ready interrupt */
+	unsigned int		tuning_done;	/* Condition flag set when CMD19 succeeds */
+
+	unsigned int		tuning_count;	/* Timer count for re-tuning */
+	unsigned int		tuning_mode;	/* Re-tuning mode supported by host */
+	unsigned int		tuning_err;	/* Error code for re-tuning */
+#define SDHCI_TUNING_MODE_1	0
+#define SDHCI_TUNING_MODE_2	1
+#define SDHCI_TUNING_MODE_3	2
+	/* Delay (ms) between tuning commands */
+	int			tuning_delay;
+	int			tuning_loop_count;
+
+	/* Host SDMA buffer boundary. */
+	u32			sdma_boundary;
+
+	/* Host ADMA table count */
+	u32			adma_table_cnt;
+
+	u64			data_timeout;
+
+	unsigned long private[] ____cacheline_aligned;
+};
+
+struct sdhci_ops {
+#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
+	u32		(*read_l)(struct sdhci_host *host, int reg);
+	u16		(*read_w)(struct sdhci_host *host, int reg);
+	u8		(*read_b)(struct sdhci_host *host, int reg);
+	void		(*write_l)(struct sdhci_host *host, u32 val, int reg);
+	void		(*write_w)(struct sdhci_host *host, u16 val, int reg);
+	void		(*write_b)(struct sdhci_host *host, u8 val, int reg);
+#endif
+
+	void	(*set_clock)(struct sdhci_host *host, unsigned int clock);
+	void	(*set_power)(struct sdhci_host *host, unsigned char mode,
+			     unsigned short vdd);
+
+	u32		(*irq)(struct sdhci_host *host, u32 intmask);
+
+	int		(*set_dma_mask)(struct sdhci_host *host);
+	int		(*enable_dma)(struct sdhci_host *host);
+	unsigned int	(*get_max_clock)(struct sdhci_host *host);
+	unsigned int	(*get_min_clock)(struct sdhci_host *host);
+	/* get_timeout_clock should return clk rate in unit of Hz */
+	unsigned int	(*get_timeout_clock)(struct sdhci_host *host);
+	unsigned int	(*get_max_timeout_count)(struct sdhci_host *host);
+	void		(*set_timeout)(struct sdhci_host *host,
+				       struct mmc_command *cmd);
+	void		(*set_bus_width)(struct sdhci_host *host, int width);
+	void (*platform_send_init_74_clocks)(struct sdhci_host *host,
+					     u8 power_mode);
+	unsigned int    (*get_ro)(struct sdhci_host *host);
+	void		(*reset)(struct sdhci_host *host, u8 mask);
+	int	(*platform_execute_tuning)(struct sdhci_host *host, u32 opcode);
+	void	(*set_uhs_signaling)(struct sdhci_host *host, unsigned int uhs);
+	void	(*hw_reset)(struct sdhci_host *host);
+	void    (*adma_workaround)(struct sdhci_host *host, u32 intmask);
+	void    (*card_event)(struct sdhci_host *host);
+	void	(*voltage_switch)(struct sdhci_host *host);
+	void	(*adma_write_desc)(struct sdhci_host *host, void **desc,
+				   dma_addr_t addr, int len, unsigned int cmd);
+	void	(*copy_to_bounce_buffer)(struct sdhci_host *host,
+					 struct mmc_data *data,
+					 unsigned int length);
+	void	(*request_done)(struct sdhci_host *host,
+				struct mmc_request *mrq);
+	void    (*dump_vendor_regs)(struct sdhci_host *host);
+};
+
+#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
+
+static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg)
+{
+	if (unlikely(host->ops->write_l))
+		host->ops->write_l(host, val, reg);
+	else
+		writel(val, host->ioaddr + reg);
+}
+
+static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg)
+{
+	if (unlikely(host->ops->write_w))
+		host->ops->write_w(host, val, reg);
+	else
+		writew(val, host->ioaddr + reg);
+}
+
+static inline void sdhci_writeb(struct sdhci_host *host, u8 val, int reg)
+{
+	if (unlikely(host->ops->write_b))
+		host->ops->write_b(host, val, reg);
+	else
+		writeb(val, host->ioaddr + reg);
+}
+
+static inline u32 sdhci_readl(struct sdhci_host *host, int reg)
+{
+	if (unlikely(host->ops->read_l))
+		return host->ops->read_l(host, reg);
+	else
+		return readl(host->ioaddr + reg);
+}
+
+static inline u16 sdhci_readw(struct sdhci_host *host, int reg)
+{
+	if (unlikely(host->ops->read_w))
+		return host->ops->read_w(host, reg);
+	else
+		return readw(host->ioaddr + reg);
+}
+
+static inline u8 sdhci_readb(struct sdhci_host *host, int reg)
+{
+	if (unlikely(host->ops->read_b))
+		return host->ops->read_b(host, reg);
+	else
+		return readb(host->ioaddr + reg);
+}
+
+#else
+
+static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg)
+{
+	writel(val, host->ioaddr + reg);
+}
+
+static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg)
+{
+	writew(val, host->ioaddr + reg);
+}
+
+static inline void sdhci_writeb(struct sdhci_host *host, u8 val, int reg)
+{
+	writeb(val, host->ioaddr + reg);
+}
+
+static inline u32 sdhci_readl(struct sdhci_host *host, int reg)
+{
+	return readl(host->ioaddr + reg);
+}
+
+static inline u16 sdhci_readw(struct sdhci_host *host, int reg)
+{
+	return readw(host->ioaddr + reg);
+}
+
+static inline u8 sdhci_readb(struct sdhci_host *host, int reg)
+{
+	return readb(host->ioaddr + reg);
+}
+
+#endif /* CONFIG_MMC_SDHCI_IO_ACCESSORS */
+
+struct sdhci_host *sdhci_alloc_host(struct device *dev, size_t priv_size);
+void sdhci_free_host(struct sdhci_host *host);
+
+static inline void *sdhci_priv(struct sdhci_host *host)
+{
+	return host->private;
+}
+
+void sdhci_card_detect(struct sdhci_host *host);
+void __sdhci_read_caps(struct sdhci_host *host, const u16 *ver,
+		       const u32 *caps, const u32 *caps1);
+int sdhci_setup_host(struct sdhci_host *host);
+void sdhci_cleanup_host(struct sdhci_host *host);
+int __sdhci_add_host(struct sdhci_host *host);
+int sdhci_add_host(struct sdhci_host *host);
+void sdhci_remove_host(struct sdhci_host *host, int dead);
+
+static inline void sdhci_read_caps(struct sdhci_host *host)
+{
+	__sdhci_read_caps(host, NULL, NULL, NULL);
+}
+
+u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
+		   unsigned int *actual_clock);
+void sdhci_set_clock(struct sdhci_host *host, unsigned int clock);
+void sdhci_enable_clk(struct sdhci_host *host, u16 clk);
+void sdhci_set_power(struct sdhci_host *host, unsigned char mode,
+		     unsigned short vdd);
+void sdhci_set_power_and_bus_voltage(struct sdhci_host *host,
+				     unsigned char mode,
+				     unsigned short vdd);
+void sdhci_set_power_noreg(struct sdhci_host *host, unsigned char mode,
+			   unsigned short vdd);
+void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq);
+int sdhci_request_atomic(struct mmc_host *mmc, struct mmc_request *mrq);
+void sdhci_set_bus_width(struct sdhci_host *host, int width);
+void sdhci_reset(struct sdhci_host *host, u8 mask);
+void sdhci_set_uhs_signaling(struct sdhci_host *host, unsigned timing);
+int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode);
+void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios);
+int sdhci_start_signal_voltage_switch(struct mmc_host *mmc,
+				      struct mmc_ios *ios);
+void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable);
+void sdhci_adma_write_desc(struct sdhci_host *host, void **desc,
+			   dma_addr_t addr, int len, unsigned int cmd);
+
+#ifdef CONFIG_PM
+int sdhci_suspend_host(struct sdhci_host *host);
+int sdhci_resume_host(struct sdhci_host *host);
+int sdhci_runtime_suspend_host(struct sdhci_host *host);
+int sdhci_runtime_resume_host(struct sdhci_host *host, int soft_reset);
+#endif
+
+void sdhci_cqe_enable(struct mmc_host *mmc);
+void sdhci_cqe_disable(struct mmc_host *mmc, bool recovery);
+bool sdhci_cqe_irq(struct sdhci_host *host, u32 intmask, int *cmd_error,
+		   int *data_error);
+
+void sdhci_dumpregs(struct sdhci_host *host);
+void sdhci_enable_v4_mode(struct sdhci_host *host);
+
+void sdhci_start_tuning(struct sdhci_host *host);
+void sdhci_end_tuning(struct sdhci_host *host);
+void sdhci_reset_tuning(struct sdhci_host *host);
+void sdhci_send_tuning(struct sdhci_host *host, u32 opcode);
+void sdhci_abort_tuning(struct sdhci_host *host, u32 opcode);
+void sdhci_switch_external_dma(struct sdhci_host *host, bool en);
+void sdhci_set_data_timeout_irq(struct sdhci_host *host, bool enable);
+void __sdhci_set_timeout(struct sdhci_host *host, struct mmc_command *cmd);
+
+#endif /* __SDHCI_HW_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio_device.c
index e70c97b1af9d..b073dac08a8a 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio_device.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio_device.c
@@ -44,6 +44,10 @@ module_param(g_wb_spi_gpio_device_error, int, S_IRUGO | S_IWUSR);
 
 static char gpiod_lookup_table_devid[64];
 
+static char *gpio_chip_name = NULL;
+module_param(gpio_chip_name, charp, 0644);
+MODULE_PARM_DESC(str_var, "A string variable for GPIO controller");
+
 #define WB_SPI_GPIO_DEVICE_VERBOSE(fmt, args...) do {                                        \
     if (g_wb_spi_gpio_device_debug) { \
         printk(KERN_INFO "[WB_SPI_GPIO_DEVICE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
@@ -122,6 +126,12 @@ static int __init wb_spi_gpio_device_init(void)
     wb_spi_gpio_table.table[1].chip_hwnum = mosi;
     wb_spi_gpio_table.table[2].chip_hwnum = miso;
     wb_spi_gpio_table.table[3].chip_hwnum = cs;
+    if (gpio_chip_name) {
+        wb_spi_gpio_table.table[0].key = gpio_chip_name;
+        wb_spi_gpio_table.table[1].key = gpio_chip_name;
+        wb_spi_gpio_table.table[2].key = gpio_chip_name;
+        wb_spi_gpio_table.table[3].key = gpio_chip_name;
+    }
     wb_spi_gpio_table_devid_name_set();
     WB_SPI_GPIO_DEVICE_VERBOSE("spi gpi device table bus[%d] dev id[%s]\n", bus, wb_spi_gpio_table.dev_id);
     for (p = &wb_spi_gpio_table.table[0]; p->key; p++) {
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/drv_update.py b/platform/broadcom/sonic-platform-modules-micas/common/script/drv_update.py
new file mode 100755
index 000000000000..9de4911e8023
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/drv_update.py
@@ -0,0 +1,152 @@
+#!/usr/bin/env python
+# -*- coding: UTF-8 -*-
+import syslog
+import os
+import shutil
+from platform_config import DRVIER_UPDATE_CONF
+from platform_util import exec_os_cmd
+
+
+DRV_UPDATE_DEBUG_FILE = "/etc/.drv_update_debug_flag"
+
+DRVUPDATEERROR = 1
+DRVUPDATEDEBUG = 2
+debuglevel = 0
+
+
+def drv_update_debug(s):
+    if DRVUPDATEDEBUG & debuglevel:
+        syslog.openlog("DRV_UPDATE", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_INFO, s)
+
+
+def drv_update_error(s):
+    if DRVUPDATEERROR & debuglevel:
+        syslog.openlog("DRV_UPDATE", syslog.LOG_PID)
+        syslog.syslog(syslog.LOG_ERR, s)
+
+
+def drv_update_info(s):
+    syslog.openlog("DRV_UPDATE", syslog.LOG_PID)
+    syslog.syslog(syslog.LOG_LOCAL1 | syslog.LOG_NOTICE, s)
+
+def debug_init():
+    global debuglevel
+    try:
+        with open(DRV_UPDATE_DEBUG_FILE, "r") as fd:
+            value = fd.read()
+        debuglevel = int(value)
+    except Exception:
+        debuglevel = 0
+
+
+def get_driver_md5sum(drv_path):
+    status, output = exec_os_cmd("md5sum %s" % drv_path)
+    if status or len(output) == 0:
+        return False, output
+    drv_md5 = output.strip().split(" ")[0]
+    return True, drv_md5
+
+
+def do_driver_replace(src_file, target_file):
+    # Backup target file
+    src_file_dir = os.path.dirname(src_file)
+    target_file_name = os.path.basename(target_file)
+    drv_update_debug("src_file: %s, src_file_dir: %s" % (src_file, src_file_dir))
+    drv_update_debug("target_file: %s, target_file_name: %s" % (target_file, target_file_name))
+    try:
+        shutil.copyfile(target_file, "%s/%s.bak" % (src_file_dir, target_file_name))
+        shutil.copyfile(src_file, target_file)
+        return True
+    except Exception as e:
+        drv_update_error("do_driver_replace error, msg: %s" % str(e))
+        return False
+
+
+def doDrvUpdate():
+    reboot_flag = DRVIER_UPDATE_CONF.get("reboot_flag", 0)
+    drv_list = DRVIER_UPDATE_CONF.get("drv_list", [])
+    err_cnt = 0
+    update_initramfs_flag = 0
+    # get kernel version
+    status, output = exec_os_cmd("uname -r")
+    if status or len(output) == 0:
+        drv_update_error("Failed to get kernel version, status: %s, log: %s" % (status, output))
+        return
+    kversion = output.strip()
+    drv_update_debug("kernel version: %s" % kversion)
+    for item in drv_list:
+        try:
+            source_drv = item.get("source")
+            target_drv = item.get("target")
+            judge_flag = item.get("judge_flag")
+            if source_drv is None or target_drv is None or judge_flag is None:
+                drv_update_error("driver update config error, source_drv: %s, target_drv: %s, judge_file: %s" % (source_drv, target_drv, judge_flag))
+                err_cnt += 1
+                continue
+            drv_update_debug("source_drv: %s, target_drv: %s, judge_flag: %s" % (source_drv, target_drv, judge_flag))
+
+            # Check if the current driver is expected
+            if os.path.exists(judge_flag):
+                drv_update_debug("The current driver is expected, do nothing")
+                continue
+
+            # get source driver file path
+            source_drv_path = "/lib/modules/%s/%s" % (kversion, source_drv)
+            drv_update_debug("source driver: %s, file path: %s" % (source_drv, source_drv_path))
+
+            # get target driver file path
+            target_drv_path = "/lib/modules/%s/%s" % (kversion, target_drv)
+            drv_update_debug("target driver: %s, file path: %s" % (target_drv, target_drv_path))
+
+            # get source driver md5sum
+            status, source_drv_md5 = get_driver_md5sum(source_drv_path)
+            if status is False:
+                msg = "get %s md5sum failed msg: %s" % (source_drv_path, source_drv_md5)
+                drv_update_error(msg)
+                err_cnt += 1
+                continue
+            drv_update_debug("source driver file path: %s, md5sum: %s" % (source_drv_path, source_drv_md5))
+
+            # get target driver md5sum
+            status, target_drv_md5 = get_driver_md5sum(target_drv_path)
+            if status is False:
+                msg = "get %s md5sum failed msg: %s" % (target_drv_path, target_drv_md5)
+                drv_update_error(msg)
+                err_cnt += 1
+                continue
+            drv_update_debug("target driver file path: %s, md5sum: %s" % (target_drv_path, target_drv_md5))
+
+            if source_drv_md5 != target_drv_md5:
+                drv_update_debug("source_drv_md5 not equal to target_drv_md5, try to use source driver replace target driver")
+                status = do_driver_replace(source_drv_path, target_drv_path)
+                if status is False:
+                    err_cnt += 1
+                    continue
+            else:
+                drv_update_debug("source_drv_md5 equal to target_drv_md5, do nothing")
+
+            drv_update_debug("Driver replacement completed, set update_initramfs_flag")
+            update_initramfs_flag = 1
+
+        except Exception as e:
+            err_cnt += 1
+            drv_update_error(str(e))
+
+    if update_initramfs_flag == 1:
+        drv_update_debug("starting to update initramfs")
+        os.system("update-initramfs -u")
+        drv_update_debug("update initramfs finish")
+
+    os.system("sync")
+    if update_initramfs_flag == 1 and err_cnt == 0 and reboot_flag == 1:
+        reboot_log = "%DRV_UPDATE-5-REBOOT: Update initramfs is completed, restarting the system to take effect."
+        reboot_log_cmd = "echo '%s' > /dev/ttyS0" % reboot_log
+        exec_os_cmd(reboot_log_cmd)
+        drv_update_info(reboot_log)
+        os.system("/sbin/reboot")
+    return
+
+if __name__ == '__main__':
+    debug_init()
+    doDrvUpdate()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py
index 259a46067f76..35c16728f72c 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_common.py
@@ -26,6 +26,7 @@
     "INIT_PARAM",
     "INIT_COMMAND",
     "SET_MAC_CONF",
+    "DRVIER_UPDATE_CONF",
     "MONITOR_TEMP_MIN",
     "MONITOR_K",
     "MONITOR_MAC_IN",
@@ -132,6 +133,9 @@
 # Set eth mac address parameters
 SET_MAC_CONF = []
 
+# driver update config
+DRVIER_UPDATE_CONF = {}
+
 ################################ fancontrol parameter###################################
 MONITOR_TEMP_MIN = 38
 MONITOR_K = 11
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py
index b53136304928..d6b3151e47cf 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_config.py
@@ -31,6 +31,7 @@
     "GLOBALINITPARAM_PRE",
     "GLOBALINITCOMMAND_PRE",
     "SET_MAC_CONF",
+    "DRVIER_UPDATE_CONF",
     "MONITOR_CONST",
     "PSU_FAN_FOLLOW",
     "MONITOR_SYS_LED",
@@ -136,6 +137,9 @@ def getdeviceplatform():
 # Set eth mac address parameters
 SET_MAC_CONF = module_product.SET_MAC_CONF
 
+# driver update config
+DRVIER_UPDATE_CONF = module_product.DRVIER_UPDATE_CONF
+
 ################################ fancontrol parameter###################################
 
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py
index 61d255823786..f19231bba0a4 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py
@@ -188,6 +188,13 @@ def start_tty_console():
         if len(rets) == 0:
             os.system(cmd)
 
+def startDrvUpdate():
+    if STARTMODULE.get('drv_update', 0) == 1:
+        cmd = "nohup drv_update.py >/dev/null 2>&1 &"
+        rets = getPid("drv_update.py")
+        if len(rets) == 0:
+            os.system(cmd)
+
 
 def stopAvscontrol():
     if STARTMODULE.get('avscontrol', 0) == 1:
@@ -358,6 +365,7 @@ def copy_machineconf():
 def load_apps():
     copy_machineconf()
     otherinit_pre()
+    startDrvUpdate()
     startGenerate_air_flow()
     start_tty_console()
     startRebootCause()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py
index f0563ec1833d..3fc22b4b6618 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/sfp.py
@@ -379,6 +379,8 @@ def get_presence(self):
             return False
         try:
             dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.presence_cpld)
+            if dev_id == -1:
+                return False
             ret, info = platform_reg_read(0, dev_id, offset, 1)
             if (ret is False
                     or info is None):
@@ -394,6 +396,8 @@ def get_reset_status(self):
             return False
         try:
             dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.reset_cpld)
+            if dev_id == -1:
+                return False
             ret, info = platform_reg_read(0, dev_id, offset, 1)
             if (ret is False
                     or info is None):
@@ -413,6 +417,8 @@ def get_tx_disable(self):
         try:
             tx_disable_list = []
             dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.txdis_cpld)
+            if dev_id == -1:
+                return False
             ret, info = platform_reg_read(0, dev_id, offset, 1)
             if (ret is False
                     or info is None):
@@ -477,6 +483,8 @@ def set_reset(self, reset):
         try:
             val = []
             dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.reset_cpld)
+            if dev_id == -1:
+                return False
             ret, info = platform_reg_read(0, dev_id, offset, 1)
             if (ret is False
                     or info is None):
@@ -512,6 +520,8 @@ def set_tx_disable(self, tx_disable):
         try:
             val = []
             dev_id, offset, offset_bit = self._get_sfp_cpld_info(self.txdis_cpld)
+            if dev_id == -1:
+                return False
             ret, info = platform_reg_read(0, dev_id, offset, 1)
             if (ret is False
                     or info is None):
@@ -541,9 +551,9 @@ def set_tx_disable(self, tx_disable):
         return True
 
     def _get_sfp_cpld_info(self, cpld_config):
-        dev_id = 0
-        offset = 0
-        offset_bit = 0
+        dev_id = -1
+        offset = -1
+        offset_bit = -1
         for dev_id_temp in cpld_config["dev_id"]:
             for offset_temp in cpld_config["dev_id"][dev_id_temp]["offset"]:
                 port_range_str = cpld_config["dev_id"][dev_id_temp]["offset"][offset_temp]
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/cpld_test_header.vme b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/cpld_test_header.vme
new file mode 100644
index 0000000000000000000000000000000000000000..083fd78f3ea1919d9d3737fe0d8d0c7b8b2ce881
GIT binary patch
literal 406
zcmaiu!AgWc7{^Cl9GwWZEU4QY>mrW2O9%#{v#rqDVj^@}T%AMUt^?Upr*1u1&(K43
z?FnqO2k^UmA0NNppMS~gYSXfp);#POTEzEsNrQ-{S16)+_OzzH_2yb`frh&jGzynN
zocKiSc%1|*>JQ(XrjPMM;vcLbWx(?lMPV9>2xnduTlc0w*NEL#8!^N-$!~cVJr}!X
zU*U-Hx_RHReT%cEsj*`cOSm-1L@17ejCweGWq851n7EkCz1hsO3AQcUK?q#pT+$Q+
zaP`9Ix{m7r0$EYyqaQexPBa5Reu@nVOwPd9@%QJs+)cP9_xx1wT$jWNHKXIBQctQq
VsrNb@^ic_@K=0eZ|8`^i#~;mYW4-_Y

literal 0
HcmV?d00001

diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/fpga_test_header.bin b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/fpga_test_header.bin
new file mode 100644
index 000000000000..bdf9ae2139e2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/fpga_test_header.bin
@@ -0,0 +1,10 @@
+fpga_test_header.bin
+FILEHEADER(
+DEVTYPE=0x404a
+TYPE=fpga
+CHAIN=3
+CHIPNAME=fpga
+VERSION=v0
+FILETYPE=SPI-LOGIC-DEV
+CRC=0x00000000
+)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile
index 052a5a6a0773..1b84abef410a 100644
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile
@@ -7,6 +7,7 @@ INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)
 INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
 INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages
 INSTALL_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/plat_sysfs_cfg
+INSTALL_UPGRADE_TEST_DIR = $(SUB_BUILD_DIR)/etc/.upgrade_test
 
 all:
 	$(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules
@@ -18,6 +19,8 @@ all:
 	@if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi
 	@if [ ! -d ${INSTALL_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_SYSFS_CFG_DIR} ;fi
 	@if [ -d $(PWD)/plat_sysfs_cfg/ ]; then cp -r $(PWD)/plat_sysfs_cfg/* ${INSTALL_SYSFS_CFG_DIR} ;fi
+	@if [ ! -d ${INSTALL_UPGRADE_TEST_DIR} ]; then mkdir -p ${INSTALL_UPGRADE_TEST_DIR} ;fi
+	@if [ -d $(PWD)/.upgrade_test/ ]; then cp -r $(PWD)/.upgrade_test/* ${INSTALL_UPGRADE_TEST_DIR} ;fi
 clean:
 	rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd
 	rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
index 0ef88cdcd5e2..587e303a62cd 100755
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
@@ -746,10 +746,6 @@
     {"name": "wb_csu550", "delay": 0},
     {"name": "wb_ina3221", "delay": 0},
     {"name": "wb_tps53622", "delay": 0},
-    {"name": "firmware_driver_cpld", "delay": 0},
-    {"name": "firmware_driver_ispvme", "delay": 0},
-    {"name": "firmware_driver_sysfs", "delay": 0},
-    {"name": "wb_firmware_upgrade_device", "delay": 0},
     {"name": "plat_dfd", "delay": 0},
     {"name": "plat_switch", "delay": 0},
     {"name": "plat_fan", "delay": 0},
@@ -990,14 +986,14 @@
 
         "TEST": {
             "cpld": [
-                #{"chain": 1, "file": "/etc/.upgrade_test/cpld_test_header.vme", "display_name": "CPLD"},
+                {"chain": 1, "file": "/etc/.upgrade_test/cpld_test_header.vme", "display_name": "CPLD"},
             ],
             "fpga": [
-                #{
-                #    "chain": 3,
-                #    "file": "/etc/.upgrade_test/fpga_test_header",
-                #    "display_name": "FPGA",
-                #},
+                {
+                    "chain": 3,
+                    "file": "/etc/.upgrade_test/fpga_test_header.bin",
+                    "display_name": "FPGA",
+                },
             ],
         },
     },
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile
index e59ffd7ee67d..2e9c25ae6b7a 100755
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile
@@ -1,10 +1,8 @@
 MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
 MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules)
-FIRMWARE_UPGRADE_PATH = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/app/firmware_upgrade/firmware_driver/include)
 
 EXTRA_CFLAGS+= -I$(MODULES_DIR)
 EXTRA_CFLAGS+= -I$(MODULES_DIR)/linux-5.10
-EXTRA_CFLAGS+= -I$(FIRMWARE_UPGRADE_PATH)
 
 obj-m :=  wb_pcie_dev_device.o
 obj-m += wb_i2c_mux_pca954x_device.o
@@ -12,4 +10,3 @@ obj-m += wb_i2c_ocores_device.o
 obj-m += wb_lpc_drv_device.o
 obj-m += wb_i2c_dev_device.o
 obj-m += wb_io_dev_device.o
-obj-m += wb_firmware_upgrade_device.o
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_firmware_upgrade_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_firmware_upgrade_device.c
deleted file mode 100644
index 6dce748325a2..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_firmware_upgrade_device.c
+++ /dev/null
@@ -1,174 +0,0 @@
-/*
- * wb_firmware_upgrade.c
- *
- * ko for firmware device
- */
-#include <linux/module.h>
-#include <linux/io.h>
-#include <linux/device.h>
-#include <linux/delay.h>
-#include <linux/platform_device.h>
-#include <firmware_upgrade.h>
-
-static int g_wb_firmware_upgrade_debug = 0;
-static int g_wb_firmware_upgrade_error = 0;
-
-module_param(g_wb_firmware_upgrade_debug, int, S_IRUGO | S_IWUSR);
-module_param(g_wb_firmware_upgrade_error, int, S_IRUGO | S_IWUSR);
-
-#define WB_FIRMWARE_UPGRADE_DEBUG_VERBOSE(fmt, args...) do {                                        \
-    if (g_wb_firmware_upgrade_debug) { \
-        printk(KERN_INFO "[WB_FIRMWARE_UPGRADE][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-#define WB_FIRMWARE_UPGRADE_DEBUG_ERROR(fmt, args...) do {                                        \
-    if (g_wb_firmware_upgrade_error) { \
-        printk(KERN_ERR "[WB_FIRMWARE_UPGRADE][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-/* cpld */
-static firmware_upgrade_device_t firmware_upgrade_device_data0 = {
-    .type           = "JTAG",
-    .upg_type.jtag = {
-        .tdi             = 67,
-        .tck             = 65,
-        .tms             = 6,
-        .tdo             = 32,
-    },
-    .en_gpio[0]     = 50,
-    .en_level[0]    = 1,
-    .en_gpio[1]     = 48,
-    .en_level[1]    = 1,
-    .chain          = 1,
-    .chip_index     = 1,
-
-    .en_gpio_num    = 2,
-    .en_logic_num   = 0,
-};
-
-/* fpga */
-static firmware_upgrade_device_t firmware_upgrade_device_data1 = {
-    .type               = "SPI_LOGIC",
-    .chain              = 3,
-    .chip_index         = 1,
-    .upg_type.sysfs = {
-        .dev_name     = "/dev/fpga0",
-        .ctrl_base    = 0xa00,
-        .flash_base   = 0x1A0000,
-        .test_base    = 0x7F0000,
-        .test_size    = 0x10000,
-    },
-    .en_gpio_num        = 0,
-    .en_logic_num       = 0,
-};
-
-static firmware_upgrade_device_t firmware_upgrade_device_data2 = {
-    .type               = "SPI_LOGIC",
-    .chain              = 4,
-    .chip_index         = 1,
-    .upg_type.sysfs = {
-        .dev_name     = "/dev/fpga0",
-        .ctrl_base    = 0xa00,
-        .flash_base   = 0x0,
-        .test_base    = 0x7F0000,
-        .test_size    = 0x10000,
-    },
-    .en_gpio_num        = 0,
-    .en_logic_num       = 0,
-};
-
-/* bios */
-static firmware_upgrade_device_t firmware_upgrade_device_data3 = {
-    .type               = "MTD_DEV",
-    .chain              = 2,
-    .chip_index         = 1,
-    .upg_type.sysfs = {
-        .mtd_name     = "BIOS",
-        .flash_base   = 0x800000,
-    },
-
-    .en_gpio_num        = 0,
-    .en_logic_num       = 0,
-};
-
-static void firmware_device_release(struct device *dev)
-{
-    return;
-}
-
-static struct platform_device firmware_upgrade_device[] = {
-    {
-        .name   = "firmware_cpld_ispvme",
-        .id = 1,
-        .dev    = {
-            .platform_data  = &firmware_upgrade_device_data0,
-            .release = firmware_device_release,
-        },
-    },
-    {
-        .name   = "firmware_sysfs",
-        .id = 2,
-        .dev    = {
-            .platform_data  = &firmware_upgrade_device_data1,
-            .release = firmware_device_release,
-        },
-    },
-    {
-        .name   = "firmware_sysfs",
-        .id = 3,
-        .dev    = {
-            .platform_data  = &firmware_upgrade_device_data2,
-            .release = firmware_device_release,
-        },
-    },
-    {
-        .name   = "firmware_sysfs",
-        .id = 4,
-        .dev    = {
-            .platform_data  = &firmware_upgrade_device_data3,
-            .release = firmware_device_release,
-        },
-    },
- };
-
- static int __init firmware_upgrade_device_init(void)
- {
-     int i;
-     int ret = 0;
-     firmware_upgrade_device_t *firmware_upgrade_device_data;
-
-     WB_FIRMWARE_UPGRADE_DEBUG_VERBOSE("enter!\n");
-     for (i = 0; i < ARRAY_SIZE(firmware_upgrade_device); i++) {
-         firmware_upgrade_device_data = firmware_upgrade_device[i].dev.platform_data;
-         ret = platform_device_register(&firmware_upgrade_device[i]);
-         if (ret < 0) {
-             firmware_upgrade_device_data->device_flag = -1; /* device register failed, set flag -1 */
-             printk(KERN_ERR "firmware_upgrade_device id%d register failed!\n", i + 1);
-         } else {
-             firmware_upgrade_device_data->device_flag = 0; /* device register suucess, set flag 0 */
-         }
-     }
-     return 0;
- }
-
- static void __exit firmware_upgrade_device_exit(void)
- {
-     int i;
-     firmware_upgrade_device_t *firmware_upgrade_device_data;
-
-     WB_FIRMWARE_UPGRADE_DEBUG_VERBOSE("enter!\n");
-     for (i = ARRAY_SIZE(firmware_upgrade_device) - 1; i >= 0; i--) {
-         firmware_upgrade_device_data = firmware_upgrade_device[i].dev.platform_data;
-         if (firmware_upgrade_device_data->device_flag == 0) { /* device register success, need unregister */
-             platform_device_unregister(&firmware_upgrade_device[i]);
-         }
-     }
- }
-
- module_init(firmware_upgrade_device_init);
- module_exit(firmware_upgrade_device_exit);
- MODULE_DESCRIPTION("FIRMWARE UPGRADE Devices");
- MODULE_LICENSE("GPL");
- MODULE_AUTHOR("support");
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_dev_device.c b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_dev_device.c
index efe4ba726921..865e7afea44c 100644
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_dev_device.c
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/wb_i2c_dev_device.c
@@ -7,7 +7,6 @@
 
 #include <wb_i2c_dev.h>
 
-
 static int g_wb_i2c_dev_device_debug = 0;
 static int g_wb_i2c_dev_device_error = 0;
 

From fbdcfc7fc46fbadb1c04b4694ae0b0ac5332cea0 Mon Sep 17 00:00:00 2001
From: Philo <135693886+philo-micas@users.noreply.github.com>
Date: Fri, 10 Nov 2023 16:27:46 +0800
Subject: [PATCH 14/32] Update wb_xdpe132g5c_pmbus.c

---
 .../common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c           | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c
index e6c57073afa5..532695ad5b83 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c
@@ -1,7 +1,3 @@
-/*
- * Copyright(C) 2020 Ruijie Network. All rights reserved.
- */
-
 #include <linux/err.h>
 #include <linux/i2c.h>
 #include <linux/init.h>

From 636143b5304c971b65222c780aeb83c12170a053 Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Fri, 10 Nov 2023 16:59:26 +0800
Subject: [PATCH 15/32] update wb_xdpe132g5c_pmbus.c

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../modules/linux-5.10/wb_xdpe132g5c_pmbus.c  | 554 +++++++++---------
 1 file changed, 277 insertions(+), 277 deletions(-)

diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c
index 532695ad5b83..c0c3d2bc79f9 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c
@@ -1,277 +1,277 @@
-#include <linux/err.h>
-#include <linux/i2c.h>
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/hwmon-sysfs.h>
-#include <linux/string.h>
-#include <linux/sysfs.h>
-#include <linux/delay.h>
-#include <linux/mutex.h>
-#include "wb_pmbus.h"
-
-typedef enum {
-    DBG_START,
-    DBG_VERBOSE,
-    DBG_KEY,
-    DBG_WARN,
-    DBG_ERROR,
-    DBG_END,
-} dbg_level_t;
-
-static int debuglevel = 0;
-module_param(debuglevel, int, S_IRUGO);
-
-#define DBG_DEBUG(fmt, arg...)  do { \
-    if ( debuglevel > DBG_START && debuglevel < DBG_ERROR) { \
-          printk(KERN_INFO "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
-    } else if ( debuglevel >= DBG_ERROR ) {   \
-        printk(KERN_ERR "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
-    } else {    } \
-} while (0)
-
-#define DBG_ERROR(fmt, arg...)  do { \
-     if ( debuglevel > DBG_START) {  \
-        printk(KERN_ERR "[ERROR]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
-       } \
-} while (0)
-
-#define BUF_SIZE                    (256)
-#define XDPE132G5C_PAGE_NUM         (2)
-#define XDPE132G5C_PROT_VR12_5MV    (0x01) /* VR12.0 mode, 5-mV DAC */
-#define XDPE132G5C_PROT_VR12_5_10MV (0x02) /* VR12.5 mode, 10-mV DAC */
-#define XDPE132G5C_PROT_IMVP9_10MV  (0x03) /* IMVP9 mode, 10-mV DAC */
-#define XDPE132G5C_PROT_VR13_10MV   (0x04) /* VR13.0 mode, 10-mV DAC */
-#define XDPE132G5C_PROT_IMVP8_5MV   (0x05) /* IMVP8 mode, 5-mV DAC */
-#define XDPE132G5C_PROT_VR13_5MV    (0x07) /* VR13.0 mode, 5-mV DAC */
-#define RETRY_TIME                  (15)
-
-static ssize_t set_xdpe132g5c_avs(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
-{
-    int ret;
-    unsigned long val;
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    struct i2c_client *client = to_i2c_client(dev);
-    struct pmbus_data *data;
-
-    data = i2c_get_clientdata(client);
-    ret = kstrtoul(buf, 0, &val);
-    if (ret){
-        return ret;
-    }
-    mutex_lock(&data->update_lock);
-    /* set value */
-    ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, (u16)val);
-    if (ret < 0) {
-        DBG_ERROR("set pmbus_vout_command fail\n");
-        goto finish_set;
-    }
-finish_set:
-    wb_pmbus_clear_faults(client);
-    mutex_unlock(&data->update_lock);
-    return (ret < 0) ? ret : count;
-
-}
-
-static ssize_t show_xdpe132g5c_avs(struct device *dev, struct device_attribute *da, char *buf)
-{
-    int val;
-    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
-    struct i2c_client *client = to_i2c_client(dev);
-    struct pmbus_data *data;
-
-    data = i2c_get_clientdata(client);
-    mutex_lock(&data->update_lock);
-    val = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
-    if (val < 0) {
-        DBG_ERROR("fail val = %d\n", val);
-        goto finish_show;
-    }
-finish_show:
-    wb_pmbus_clear_faults(client);
-    mutex_unlock(&data->update_lock);
-    return snprintf(buf, BUF_SIZE, "0x%04x\n", val);
-}
-
-static SENSOR_DEVICE_ATTR(avs0_vout_command, S_IRUGO | S_IWUSR, show_xdpe132g5c_avs, set_xdpe132g5c_avs, 0);
-static SENSOR_DEVICE_ATTR(avs1_vout_command, S_IRUGO | S_IWUSR, show_xdpe132g5c_avs, set_xdpe132g5c_avs, 1);
-
-static struct attribute *xdpe132g5c_sysfs_attrs[] = {
-    &sensor_dev_attr_avs0_vout_command.dev_attr.attr,
-    &sensor_dev_attr_avs1_vout_command.dev_attr.attr,
-    NULL,
-};
-
-static const struct attribute_group xdpe132g5c_sysfs_attrs_group = {
-    .attrs = xdpe132g5c_sysfs_attrs,
-};
-
-static int xdpe132g5c_read_word_data(struct i2c_client *client, int page, int phase, int reg)
-{
-    int rv;
-    int retry;
-    int value;
-
-    rv = wb_pmbus_set_page(client, page, 0xff);
-    if (rv < 0) {
-        return rv;
-    }
-
-    retry = 3;
-    while (retry--) {
-        value = i2c_smbus_read_word_data(client, reg);
-        if ((value == 0xffff) || (value < 0)) {
-            continue;
-        }
-    }
-    return value;
-}
-
-static int xdpe132g5c_identify(struct i2c_client *client, struct pmbus_driver_info *info)
-{
-    u8 vout_params;
-    int ret, i, retry;
-
-    /* Read the register with VOUT scaling value.*/
-    for (i = 0; i < XDPE132G5C_PAGE_NUM; i++) {
-        for (retry = 0; retry < RETRY_TIME; retry++) {
-            ret = wb_pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE);
-            if (ret < 0 || ret == 0xff) {
-                msleep(5);
-                continue;
-            } else {
-                break;
-            }
-        }
-        if (ret < 0) {
-            return ret;
-        }
-
-        switch (ret >> 5) {
-        case 0: /* linear mode      */
-            if (info->format[PSC_VOLTAGE_OUT] != linear) {
-                return -ENODEV;
-            }
-            break;
-        case 1: /* VID mode         */
-            if (info->format[PSC_VOLTAGE_OUT] != vid) {
-                return -ENODEV;
-            }
-            vout_params = ret & GENMASK(4, 0);
-            switch (vout_params) {
-            case XDPE132G5C_PROT_VR13_10MV:
-            case XDPE132G5C_PROT_VR12_5_10MV:
-                info->vrm_version[i] = vr13;
-                break;
-            case XDPE132G5C_PROT_VR13_5MV:
-            case XDPE132G5C_PROT_VR12_5MV:
-            case XDPE132G5C_PROT_IMVP8_5MV:
-                info->vrm_version[i] = vr12;
-                break;
-            case XDPE132G5C_PROT_IMVP9_10MV:
-                info->vrm_version[i] = imvp9;
-                break;
-            default:
-                return -EINVAL;
-            }
-            break;
-        case 2: /* direct mode      */
-            if (info->format[PSC_VOLTAGE_OUT] != direct) {
-                return -ENODEV;
-            }
-            break;
-        default:
-            return -ENODEV;
-        }
-    }
-
-    return 0;
-}
-
-static struct pmbus_driver_info xdpe132g5c_info = {
-    .pages = XDPE132G5C_PAGE_NUM,
-    .format[PSC_VOLTAGE_IN] = linear,
-    .format[PSC_VOLTAGE_OUT] = linear,
-    .format[PSC_TEMPERATURE] = linear,
-    .format[PSC_CURRENT_IN] = linear,
-    .format[PSC_CURRENT_OUT] = linear,
-    .format[PSC_POWER] = linear,
-    .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN
-        | PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_TEMP
-        | PMBUS_HAVE_STATUS_TEMP
-        | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
-        | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT,
-    .func[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN
-        | PMBUS_HAVE_STATUS_INPUT
-        | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
-        | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT,
-    .identify = xdpe132g5c_identify,
-    .read_word_data = xdpe132g5c_read_word_data,
-};
-
-static int xdpe132g5c_probe(struct i2c_client *client,
-             const struct i2c_device_id *id)
-{
-    int status;
-    struct pmbus_driver_info *info;
-
-    info = devm_kmemdup(&client->dev, &xdpe132g5c_info, sizeof(*info), GFP_KERNEL);
-    if (!info) {
-        return -ENOMEM;
-    }
-
-    status = wb_pmbus_do_probe(client, &xdpe132g5c_info);
-    if (status != 0) {
-        DBG_ERROR("pmbus probe error %d\n", status);
-        return status;
-    }
-
-    status = sysfs_create_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group);
-    if (status != 0) {
-        DBG_ERROR("sysfs_create_group error %d\n", status);
-        return status;
-    }
-
-    return status;
-}
-
-static int xdpe132g5c_remove(struct i2c_client *client)
-{
-    int ret;
-
-    sysfs_remove_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group);
-    ret = wb_pmbus_do_remove(client);
-    if (ret != 0){
-        DBG_ERROR("fail remove xdpe132g5c %d\n", ret);
-    }
-    return ret;
-}
-
-static const struct i2c_device_id xdpe132g5c_id[] = {
-    {"wb_xdpe132g5c_pmbus", 0},
-    {}
-};
-
-MODULE_DEVICE_TABLE(i2c, xdpe132g5c_id);
-
-static const struct of_device_id __maybe_unused xdpe132g5c_of_match[] = {
-    {.compatible = "infineon,wb_xdpe132g5c_pmbus"},
-    {}
-};
-MODULE_DEVICE_TABLE(of, xdpe132g5c_of_match);
-
-static struct i2c_driver xdpe132g5c_driver = {
-    .driver = {
-        .name = "wb_xdpe132g5c_pmbus",
-        .of_match_table = of_match_ptr(xdpe132g5c_of_match),
-    },
-    .probe = xdpe132g5c_probe,
-    .remove = xdpe132g5c_remove,
-    .id_table = xdpe132g5c_id,
-};
-
-module_i2c_driver(xdpe132g5c_driver);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("PMBus driver for Infineon XDPE132 family");
-MODULE_LICENSE("GPL");
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/string.h>
+#include <linux/sysfs.h>
+#include <linux/delay.h>
+#include <linux/mutex.h>
+#include "wb_pmbus.h"
+
+typedef enum {
+    DBG_START,
+    DBG_VERBOSE,
+    DBG_KEY,
+    DBG_WARN,
+    DBG_ERROR,
+    DBG_END,
+} dbg_level_t;
+
+static int debuglevel = 0;
+module_param(debuglevel, int, S_IRUGO);
+
+#define DBG_DEBUG(fmt, arg...)  do { \
+    if ( debuglevel > DBG_START && debuglevel < DBG_ERROR) { \
+          printk(KERN_INFO "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+    } else if ( debuglevel >= DBG_ERROR ) {   \
+        printk(KERN_ERR "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+    } else {    } \
+} while (0)
+
+#define DBG_ERROR(fmt, arg...)  do { \
+     if ( debuglevel > DBG_START) {  \
+        printk(KERN_ERR "[ERROR]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
+       } \
+} while (0)
+
+#define BUF_SIZE                    (256)
+#define XDPE132G5C_PAGE_NUM         (2)
+#define XDPE132G5C_PROT_VR12_5MV    (0x01) /* VR12.0 mode, 5-mV DAC */
+#define XDPE132G5C_PROT_VR12_5_10MV (0x02) /* VR12.5 mode, 10-mV DAC */
+#define XDPE132G5C_PROT_IMVP9_10MV  (0x03) /* IMVP9 mode, 10-mV DAC */
+#define XDPE132G5C_PROT_VR13_10MV   (0x04) /* VR13.0 mode, 10-mV DAC */
+#define XDPE132G5C_PROT_IMVP8_5MV   (0x05) /* IMVP8 mode, 5-mV DAC */
+#define XDPE132G5C_PROT_VR13_5MV    (0x07) /* VR13.0 mode, 5-mV DAC */
+#define RETRY_TIME                  (15)
+
+static ssize_t set_xdpe132g5c_avs(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
+{
+    int ret;
+    unsigned long val;
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    struct i2c_client *client = to_i2c_client(dev);
+    struct pmbus_data *data;
+
+    data = i2c_get_clientdata(client);
+    ret = kstrtoul(buf, 0, &val);
+    if (ret){
+        return ret;
+    }
+    mutex_lock(&data->update_lock);
+    /* set value */
+    ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, (u16)val);
+    if (ret < 0) {
+        DBG_ERROR("set pmbus_vout_command fail\n");
+        goto finish_set;
+    }
+finish_set:
+    wb_pmbus_clear_faults(client);
+    mutex_unlock(&data->update_lock);
+    return (ret < 0) ? ret : count;
+
+}
+
+static ssize_t show_xdpe132g5c_avs(struct device *dev, struct device_attribute *da, char *buf)
+{
+    int val;
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
+    struct i2c_client *client = to_i2c_client(dev);
+    struct pmbus_data *data;
+
+    data = i2c_get_clientdata(client);
+    mutex_lock(&data->update_lock);
+    val = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
+    if (val < 0) {
+        DBG_ERROR("fail val = %d\n", val);
+        goto finish_show;
+    }
+finish_show:
+    wb_pmbus_clear_faults(client);
+    mutex_unlock(&data->update_lock);
+    return snprintf(buf, BUF_SIZE, "0x%04x\n", val);
+}
+
+static SENSOR_DEVICE_ATTR(avs0_vout_command, S_IRUGO | S_IWUSR, show_xdpe132g5c_avs, set_xdpe132g5c_avs, 0);
+static SENSOR_DEVICE_ATTR(avs1_vout_command, S_IRUGO | S_IWUSR, show_xdpe132g5c_avs, set_xdpe132g5c_avs, 1);
+
+static struct attribute *xdpe132g5c_sysfs_attrs[] = {
+    &sensor_dev_attr_avs0_vout_command.dev_attr.attr,
+    &sensor_dev_attr_avs1_vout_command.dev_attr.attr,
+    NULL,
+};
+
+static const struct attribute_group xdpe132g5c_sysfs_attrs_group = {
+    .attrs = xdpe132g5c_sysfs_attrs,
+};
+
+static int xdpe132g5c_read_word_data(struct i2c_client *client, int page, int phase, int reg)
+{
+    int rv;
+    int retry;
+    int value;
+
+    rv = wb_pmbus_set_page(client, page, 0xff);
+    if (rv < 0) {
+        return rv;
+    }
+
+    retry = 3;
+    while (retry--) {
+        value = i2c_smbus_read_word_data(client, reg);
+        if ((value == 0xffff) || (value < 0)) {
+            continue;
+        }
+    }
+    return value;
+}
+
+static int xdpe132g5c_identify(struct i2c_client *client, struct pmbus_driver_info *info)
+{
+    u8 vout_params;
+    int ret, i, retry;
+
+    /* Read the register with VOUT scaling value.*/
+    for (i = 0; i < XDPE132G5C_PAGE_NUM; i++) {
+        for (retry = 0; retry < RETRY_TIME; retry++) {
+            ret = wb_pmbus_read_byte_data(client, i, PMBUS_VOUT_MODE);
+            if (ret < 0 || ret == 0xff) {
+                msleep(5);
+                continue;
+            } else {
+                break;
+            }
+        }
+        if (ret < 0) {
+            return ret;
+        }
+
+        switch (ret >> 5) {
+        case 0: /* linear mode      */
+            if (info->format[PSC_VOLTAGE_OUT] != linear) {
+                return -ENODEV;
+            }
+            break;
+        case 1: /* VID mode         */
+            if (info->format[PSC_VOLTAGE_OUT] != vid) {
+                return -ENODEV;
+            }
+            vout_params = ret & GENMASK(4, 0);
+            switch (vout_params) {
+            case XDPE132G5C_PROT_VR13_10MV:
+            case XDPE132G5C_PROT_VR12_5_10MV:
+                info->vrm_version[i] = vr13;
+                break;
+            case XDPE132G5C_PROT_VR13_5MV:
+            case XDPE132G5C_PROT_VR12_5MV:
+            case XDPE132G5C_PROT_IMVP8_5MV:
+                info->vrm_version[i] = vr12;
+                break;
+            case XDPE132G5C_PROT_IMVP9_10MV:
+                info->vrm_version[i] = imvp9;
+                break;
+            default:
+                return -EINVAL;
+            }
+            break;
+        case 2: /* direct mode      */
+            if (info->format[PSC_VOLTAGE_OUT] != direct) {
+                return -ENODEV;
+            }
+            break;
+        default:
+            return -ENODEV;
+        }
+    }
+
+    return 0;
+}
+
+static struct pmbus_driver_info xdpe132g5c_info = {
+    .pages = XDPE132G5C_PAGE_NUM,
+    .format[PSC_VOLTAGE_IN] = linear,
+    .format[PSC_VOLTAGE_OUT] = linear,
+    .format[PSC_TEMPERATURE] = linear,
+    .format[PSC_CURRENT_IN] = linear,
+    .format[PSC_CURRENT_OUT] = linear,
+    .format[PSC_POWER] = linear,
+    .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN
+        | PMBUS_HAVE_STATUS_INPUT | PMBUS_HAVE_TEMP
+        | PMBUS_HAVE_STATUS_TEMP
+        | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
+        | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT,
+    .func[1] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_PIN
+        | PMBUS_HAVE_STATUS_INPUT
+        | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
+        | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT,
+    .identify = xdpe132g5c_identify,
+    .read_word_data = xdpe132g5c_read_word_data,
+};
+
+static int xdpe132g5c_probe(struct i2c_client *client,
+             const struct i2c_device_id *id)
+{
+    int status;
+    struct pmbus_driver_info *info;
+
+    info = devm_kmemdup(&client->dev, &xdpe132g5c_info, sizeof(*info), GFP_KERNEL);
+    if (!info) {
+        return -ENOMEM;
+    }
+
+    status = wb_pmbus_do_probe(client, &xdpe132g5c_info);
+    if (status != 0) {
+        DBG_ERROR("pmbus probe error %d\n", status);
+        return status;
+    }
+
+    status = sysfs_create_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group);
+    if (status != 0) {
+        DBG_ERROR("sysfs_create_group error %d\n", status);
+        return status;
+    }
+
+    return status;
+}
+
+static int xdpe132g5c_remove(struct i2c_client *client)
+{
+    int ret;
+
+    sysfs_remove_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group);
+    ret = wb_pmbus_do_remove(client);
+    if (ret != 0){
+        DBG_ERROR("fail remove xdpe132g5c %d\n", ret);
+    }
+    return ret;
+}
+
+static const struct i2c_device_id xdpe132g5c_id[] = {
+    {"wb_xdpe132g5c_pmbus", 0},
+    {}
+};
+
+MODULE_DEVICE_TABLE(i2c, xdpe132g5c_id);
+
+static const struct of_device_id __maybe_unused xdpe132g5c_of_match[] = {
+    {.compatible = "infineon,wb_xdpe132g5c_pmbus"},
+    {}
+};
+MODULE_DEVICE_TABLE(of, xdpe132g5c_of_match);
+
+static struct i2c_driver xdpe132g5c_driver = {
+    .driver = {
+        .name = "wb_xdpe132g5c_pmbus",
+        .of_match_table = of_match_ptr(xdpe132g5c_of_match),
+    },
+    .probe = xdpe132g5c_probe,
+    .remove = xdpe132g5c_remove,
+    .id_table = xdpe132g5c_id,
+};
+
+module_i2c_driver(xdpe132g5c_driver);
+
+MODULE_AUTHOR("support");
+MODULE_DESCRIPTION("PMBus driver for Infineon XDPE132 family");
+MODULE_LICENSE("GPL");

From 5bcaf451de7fb62c326f5d3228df7824d6106885 Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Sat, 23 Dec 2023 22:03:22 +0800
Subject: [PATCH 16/32] Adapted for Linux kernel version 6.1.38

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../common/lib/algorithm/openloop.py          |   6 +
 .../common/lib/algorithm/pid.py               |   3 +
 .../common/lib/plat_hal/fan.py                |   4 +-
 .../common/lib/plat_hal/psu.py                |   2 +-
 .../common/lib/plat_hal/rotor.py              |   2 +-
 .../common/modules/Makefile                   |   4 +-
 .../modules/intel_spi/include/intel_spi.h     |   2 +-
 .../common/modules/intel_spi/intel_spi.c      |   2 +-
 .../common/modules/linux-5.10/wb_at24.c       |   4 +-
 .../common/modules/linux-5.10/wb_i2c_ismt.c   | 227 ++++---------
 .../modules/linux-5.10/wb_i2c_mux_pca954x.c   |  27 +-
 .../modules/linux-5.10/wb_i2c_mux_pca9641.c   |  28 +-
 .../common/modules/linux-5.10/wb_ina3221.c    |   4 +-
 .../common/modules/linux-5.10/wb_pmbus.h      |   2 +-
 .../common/modules/linux-5.10/wb_pmbus_core.c |   4 +-
 .../modules/linux-5.10/wb_xdpe132g5c_pmbus.c  |  11 +-
 .../common/modules/phy/mdio_bitbang.c         |   4 +-
 .../plat_sysfs/dev_cfg/cfg/dfd_cfg_adapter.c  |  11 +-
 .../plat_sysfs/dev_cfg/cfg/dfd_cfg_file.c     |  10 +-
 .../plat_sysfs/dev_sysfs/plat_switch.c        |   1 -
 .../common/modules/sdhci/cqhci.h              |  84 ++++-
 .../common/modules/sdhci/sdhci-pci-core.c     | 208 ++++--------
 .../common/modules/sdhci/sdhci-pci-gli.c      | 304 +++++++++++++++++-
 .../common/modules/sdhci/sdhci-pci-o2micro.c  |  88 ++++-
 .../common/modules/sdhci/sdhci-pci.h          |   6 +-
 .../common/modules/sdhci/sdhci.h              |  19 +-
 .../common/modules/wb_eeprom_93xx46.c         |   4 +-
 .../common/modules/wb_fpga_i2c_bus_drv.c      |  23 +-
 .../common/modules/wb_fpga_pca954x_drv.c      |  16 +-
 .../common/modules/wb_i2c_dev.c               |  44 ++-
 .../common/modules/wb_i2c_ocores.c            |  25 +-
 .../common/modules/wb_io_dev.c                |  39 ++-
 .../common/modules/wb_mac_bsc.c               |  50 ++-
 .../common/modules/wb_optoe.c                 |   4 +-
 .../common/modules/wb_pcie_dev.c              |  39 ++-
 .../common/modules/wb_spi_dev.c               |  43 ++-
 .../common/modules/wb_spi_ocores.c            |  24 +-
 .../common/modules/wb_wdt.c                   |  23 +-
 .../common/modules/wb_xdpe132g5c.c            |   4 +-
 .../common/script/hal_fanctrl.py              |  79 ++++-
 .../common/sonic_platform/fan.py              |   2 +-
 41 files changed, 1003 insertions(+), 483 deletions(-)

diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/openloop.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/openloop.py
index 6ff731fa7eb2..3bb46b286998 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/openloop.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/openloop.py
@@ -56,6 +56,9 @@ def linear_cacl(self, temp):
         pwm_max = openloop_para["pwm_max"]
         flag = openloop_para["flag"]
 
+        openloop_debug("linear openloop: flag: %s, k: %s, tin_min: %s, pwm_min: 0x%x, pwm_max: 0x%x"
+            % (flag, K, tin_min, pwm_min, pwm_max))
+
         if flag != 1:
             openloop_debug("linear openloop: flag == 0")
             return None
@@ -87,6 +90,9 @@ def curve_cacl(self, temp):
         pwm_max = openloop_para["pwm_max"]
         flag = openloop_para["flag"]
 
+        openloop_debug("curve openloop: flag: %s, a: %s, b: %s, c: %s, tin_min: %s, pwm_min: 0x%x, pwm_max: 0x%x"
+            % (flag, a, b, c, tin_min, pwm_min, pwm_max))
+
         if flag != 1:
             openloop_debug("curve openloop: flag == 0")
             return None
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/pid.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/pid.py
index c33c1df33b4e..25c2069fea66 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/pid.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/algorithm/pid.py
@@ -76,6 +76,9 @@ def cacl(self, last_pwm, name, current_temp):
         pwm_max = pid_para["pwm_max"]
         flag = pid_para["flag"]
 
+        pid_debug("%s pid para: flag: %s, speed_type: %s, Kp: %s, Ki: %s, Kd: %s, target: %s, pwm_min: 0x%x, pwm_max: 0x%x"
+            % (name, flag, speed_type, Kp, Ki, Kd, target, pwm_min, pwm_max))
+
         if flag != 1:
             pid_debug("%s pid flag == 0" % name)
             return None
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/fan.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/fan.py
index 1424c14a4a94..5b33af02527c 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/fan.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/fan.py
@@ -256,8 +256,8 @@ def get_rotor_byname(self, rotor_index):
 
     def get_presence(self):
         ret, val = self.get_value(self.present)
-        if ret is False or val is None:
-            return -1
+        if ret is False or val is None or val == "no_support":
+            return False
         if isinstance(val, str):
             value = int(val, 16)
         else:
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py
index a5fc3bf77098..a7fc90e0fe23 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/psu.py
@@ -428,7 +428,7 @@ def psu_not_present_pwm(self, val):
     @property
     def present(self):
         ret, val = self.get_value(self.__presentconfig)
-        if ret is False or val is None:
+        if ret is False or val is None or val == "no_support":
             return False
         mask = self.__presentconfig.get("mask")
         if isinstance(val, str):
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/rotor.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/rotor.py
index 2b4e4ffd5f0e..ff120cb474b2 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/rotor.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/rotor.py
@@ -32,7 +32,7 @@ def __init__(self, conf=None):
 
     def getRunning(self):
         ret, val = self.get_value(self.rotor_run_conf)
-        if ret is False or val is None:
+        if ret is False or val is None or val == "no_support":
             return False
         if isinstance(val, str):
             value = int(val, 16)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
index 29375059105a..b828da5be8b8 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
@@ -29,7 +29,7 @@ obj-m += wb_i2c_dev.o
 obj-m += wb_platform_i2c_dev.o
 obj-m += wb_io_dev.o
 obj-m += wb_eeprom_93xx46.o
-obj-m += wb_spi_93xx46.o
+#obj-m += wb_spi_93xx46.o
 obj-m += wb_gpio_d1500.o
 obj-m += wb_gpio_device.o
 obj-m += wb_i2c_ocores.o
@@ -39,7 +39,7 @@ obj-m += wb_wdt.o
 obj-m += wb_optoe.o
 obj-m += wb_spi_gpio.o
 obj-m += wb_spi_gpio_device.o
-obj-m += wb_spi_nor_device.o
+#obj-m += wb_spi_nor_device.o
 obj-m += wb_xdpe132g5c.o
 obj-m += wb_uio_irq.o
 obj-m += hw_test.o
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/include/intel_spi.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/include/intel_spi.h
index d0a570b1f3b0..718b299402b8 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/include/intel_spi.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/include/intel_spi.h
@@ -9,7 +9,7 @@
 #ifndef INTEL_SPI_H
 #define INTEL_SPI_H
 
-#include <linux/platform_data/intel-spi.h>
+#include <linux/platform_data/x86/spi-intel.h>
 #include <linux/string.h>
 
 #define mem_clear(data, size) memset((data), 0, (size))
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi.c
index a111d52211e4..2adc1f10b471 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi.c
@@ -15,7 +15,7 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/spi-nor.h>
-#include <linux/platform_data/intel-spi.h>
+#include <linux/platform_data/x86/spi-intel.h>
 
 #include "intel_spi.h"
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_at24.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_at24.c
index 1075e6ef18de..5ec39c9d7dcb 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_at24.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_at24.c
@@ -792,7 +792,7 @@ static int at24_probe(struct i2c_client *client)
 	return 0;
 }
 
-static int at24_remove(struct i2c_client *client)
+static void at24_remove(struct i2c_client *client)
 {
 	struct at24_data *at24 = i2c_get_clientdata(client);
 
@@ -801,7 +801,7 @@ static int at24_remove(struct i2c_client *client)
 		regulator_disable(at24->vcc_reg);
 	pm_runtime_set_suspended(&client->dev);
 
-	return 0;
+	return;
 }
 
 static int __maybe_unused at24_suspend(struct device *dev)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_ismt.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_ismt.c
index 2015c8ca2e18..a10ed02708cf 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_ismt.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_ismt.c
@@ -53,7 +53,7 @@
  *  Features supported by this driver:
  *  Hardware PEC                     yes
  *  Block buffer                     yes
- *  Block process call transaction   no
+ *  Block process call transaction   yes
  *  Slave mode                       no
  */
 
@@ -66,24 +66,12 @@
 #include <linux/i2c.h>
 #include <linux/acpi.h>
 #include <linux/interrupt.h>
-#include <linux/delay.h>
 
 #include <linux/io-64-nonatomic-lo-hi.h>
-#include <linux/string.h>
-
-#define mem_clear(data, size) memset((data), 0, (size))
 
 /* PCI Address Constants */
 #define SMBBAR		0
 
-#define ISMT_DBCTRL		0x388	/* ISMT PIN Control Register */
-#define ISMT_DBSTS		0X38C	/* ISMT PIN Status Register */
-
-#define ISMT_DBSTS_CLK_STS	(1<<9)	/* bit9 SMBCLK_CUR_STS */
-#define ISMT_DBSTS_SDA_STS	(1<<8)	/* bit8 SMBDATA_CUR_STS */
-#define ISMT_DBCTRL_CLK_CTL	(1<<1)	/* bit1 SMBCLK_CTL */
-#define ISMT_DBCTRL_ENABLE	(1<<31)	/* bit31 EN */
-
 /* PCI DIDs for the Intel SMBus Message Transport (SMT) Devices */
 #define PCI_DEVICE_ID_INTEL_S1200_SMT0	0x0c59
 #define PCI_DEVICE_ID_INTEL_S1200_SMT1	0x0c5a
@@ -94,6 +82,7 @@
 
 #define ISMT_DESC_ENTRIES	2	/* number of descriptor entries */
 #define ISMT_MAX_RETRIES	3	/* number of SMBus retries to attempt */
+#define ISMT_LOG_ENTRIES	3	/* number of interrupt cause log entries */
 
 /* Hardware Descriptor Constants - Control Field */
 #define ISMT_DESC_CWRL	0x01	/* Command/Write Length */
@@ -157,8 +146,9 @@
 #define ISMT_SPGT_SPD_MASK	0xc0000000	/* SMBus Speed mask */
 #define ISMT_SPGT_SPD_80K	0x00		/* 80 kHz */
 #define ISMT_SPGT_SPD_100K	(0x1 << 30)	/* 100 kHz */
-#define ISMT_SPGT_SPD_400K	(0x2 << 30)	/* 400 kHz */
-#define ISMT_SPGT_SPD_1M	(0x3 << 30)	/* 1 MHz */
+#define ISMT_SPGT_SPD_400K	(0x2U << 30)	/* 400 kHz */
+#define ISMT_SPGT_SPD_1M	(0x3U << 30)	/* 1 MHz */
+
 
 /* MSI Control Register (MSICTL) bit definitions */
 #define ISMT_MSICTL_MSIE	0x01	/* MSI Enable */
@@ -186,6 +176,8 @@ struct ismt_priv {
 	u8 head;				/* ring buffer head pointer */
 	struct completion cmp;			/* interrupt completion */
 	u8 buffer[I2C_SMBUS_BLOCK_MAX + 16];	/* temp R/W data buffer */
+	dma_addr_t log_dma;
+	u32 *log;
 };
 
 static const struct pci_device_id ismt_ids[] = {
@@ -201,17 +193,9 @@ static const struct pci_device_id ismt_ids[] = {
 MODULE_DEVICE_TABLE(pci, ismt_ids);
 
 /* Bus speed control bits for slow debuggers - refer to the docs for usage */
-static unsigned int bus_speed = 100;
-static unsigned int delay = 1000;
+static unsigned int bus_speed;
 module_param(bus_speed, uint, S_IRUGO);
-MODULE_PARM_DESC(bus_speed, "Bus Speed in kHz (100 by default)");
-module_param(delay, uint, S_IRUGO);
-MODULE_PARM_DESC(delay, "Delay in microsecs before access (1000 by default)");
-
-static unsigned int dma_reset_timeout = 1000;
-module_param(dma_reset_timeout, uint, S_IRUGO);
-
-static void ismt_hw_init(struct ismt_priv *priv);
+MODULE_PARM_DESC(bus_speed, "Bus Speed in kHz (0 = BIOS default)");
 
 /**
  * __ismt_desc_dump() - dump the contents of a specific descriptor
@@ -246,39 +230,6 @@ static void ismt_desc_dump(struct ismt_priv *priv)
 	__ismt_desc_dump(dev, desc);
 }
 
-static void ismt_reset_dma(struct ismt_priv *priv)
-{
-    uint val;
-    u16 ctrl;
-    struct pci_dev *pdev;
-    u32 addr_lo, addr_hi;
-
-    /* save msiaddr */
-    pdev = priv->pci_dev;
-    pci_read_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_LO, &addr_lo);
-    pci_read_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, &addr_hi);
-
-    /* Clear the start bit */
-    val = readl(priv->smba + ISMT_MSTR_MCTRL);
-    val &= ~ISMT_MCTRL_SS;
-    writel(val, priv->smba + ISMT_MSTR_MCTRL);
-
-    val = readl(priv->smba + ISMT_GR_GCTRL);
-    writel(val | ISMT_GCTRL_KILL | ISMT_GCTRL_TRST | ISMT_GCTRL_SRST, priv->smba + ISMT_GR_GCTRL);
-
-    if (dma_reset_timeout > 0) {
-        usleep_range(dma_reset_timeout, dma_reset_timeout + 1);
-    }
-
-    ismt_hw_init(priv);
-    pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_LO, addr_lo);
-    pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, addr_hi);
-    /* enable msi */
-    pci_read_config_word(pdev, pdev->msi_cap + PCI_MSI_FLAGS, &ctrl);
-    ctrl |= PCI_MSI_FLAGS_ENABLE;
-    pci_write_config_word(pdev, pdev->msi_cap + PCI_MSI_FLAGS, ctrl);
-}
-
 /**
  * ismt_gen_reg_dump() - dump the iSMT General Registers
  * @priv: iSMT private data
@@ -384,7 +335,8 @@ static int ismt_process_desc(const struct ismt_desc *desc,
 
 	if (desc->status & ISMT_DESC_SCS) {
 		if (read_write == I2C_SMBUS_WRITE &&
-		    size != I2C_SMBUS_PROC_CALL)
+		    size != I2C_SMBUS_PROC_CALL &&
+		    size != I2C_SMBUS_BLOCK_PROC_CALL)
 			return 0;
 
 		switch (size) {
@@ -397,6 +349,7 @@ static int ismt_process_desc(const struct ismt_desc *desc,
 			data->word = dma_buffer[0] | (dma_buffer[1] << 8);
 			break;
 		case I2C_SMBUS_BLOCK_DATA:
+		case I2C_SMBUS_BLOCK_PROC_CALL:
 			if (desc->rxbytes != dma_buffer[0] + 1)
 				return -EMSGSIZE;
 
@@ -428,94 +381,6 @@ static int ismt_process_desc(const struct ismt_desc *desc,
 	return -EIO;
 }
 
-static void ismt_setscl(struct ismt_priv *priv, unsigned int level)
-{
-    int pin_status;
-
-    pin_status = readl(priv->smba + ISMT_DBCTRL);
-    if (level == 0) {
-        pin_status &= (~ISMT_DBCTRL_CLK_CTL);
-    } else {
-        pin_status |= ISMT_DBCTRL_CLK_CTL;
-    }
-    writel(pin_status, priv->smba + ISMT_DBCTRL);
-    pin_status = readl(priv->smba + ISMT_DBCTRL);
-    dev_dbg(&priv->pci_dev->dev, "dbctrl status = 0x%04x\r\n", pin_status);
-    return;
-}
-
-static void ismt_i2c_unblock(struct ismt_priv *priv)
-{
-    int i;
-    int pin_status, ori_status;
-
-    pin_status = readl(priv->smba + ISMT_DBCTRL);
-    ori_status = pin_status;
-    if ((pin_status & ISMT_DBCTRL_ENABLE) == 0) {
-        pin_status |= ISMT_DBCTRL_ENABLE;
-        writel(pin_status, priv->smba + ISMT_DBCTRL);
-        pin_status = readl(priv->smba + ISMT_DBCTRL);
-        dev_dbg(&priv->pci_dev->dev, "enable dbctrl pin status = 0x%04x\r\n", pin_status);
-    }
-
-    for (i = 0; i < 10; i++) {
-        ismt_setscl(priv, 0);
-        udelay(5);
-        ismt_setscl(priv, 1);
-        udelay(5);
-    }
-
-    pin_status = readl(priv->smba + ISMT_DBCTRL);
-    if (pin_status != ori_status) {
-        writel(ori_status, priv->smba + ISMT_DBCTRL);
-        pin_status = readl(priv->smba + ISMT_DBCTRL);
-        dev_dbg(&priv->pci_dev->dev, "reback dbctrl pin status = 0x%04x\r\n", pin_status);
-    }
-
-    return;
-}
-
-static int ismt_check_i2c_unblock(struct ismt_priv *priv)
-{
-    int pin_status;
-
-    pin_status = readl(priv->smba + ISMT_DBSTS);
-
-    if ( (!(pin_status & ISMT_DBSTS_SDA_STS) ) && (pin_status & ISMT_DBSTS_CLK_STS) ) {
-        dev_dbg(&priv->pci_dev->dev, "SDA is low, send 9 clock to device!\n");
-        ismt_i2c_unblock(priv);
-    }
-    return 0;
-}
-
-static int ismt_check_i2c_scl(struct ismt_priv *priv)
-{
-    int pin_status;
-
-    pin_status = readl(priv->smba + ISMT_DBSTS);
-
-    if ( (pin_status & ISMT_DBSTS_SDA_STS) && (pin_status & ISMT_DBSTS_CLK_STS) ) {
-        return 0;
-    }
-
-    dev_warn(&priv->pci_dev->dev, "SDA or SCL is low.pin_status:0x%x\n", pin_status);
-    return -1;
-}
-
-/* Make sure the SMBus host is ready to start transmitting.
-   Return 0 if it is, -EIO if it is not. */
-static int ismt_check_pre(struct ismt_priv *priv)
-{
-    ismt_check_i2c_unblock(priv);
-
-    /* SDA or SCL is low, return -EIO */
-    if (ismt_check_i2c_scl(priv)) {
-        return -EIO;
-    }
-
-    return 0;
-}
-
 /**
  * ismt_access() - process an SMBus command
  * @adap: the i2c host adapter
@@ -540,24 +405,18 @@ static int ismt_access(struct i2c_adapter *adap, u16 addr,
 	struct device *dev = &priv->pci_dev->dev;
 	u8 *dma_buffer = PTR_ALIGN(&priv->buffer[0], 16);
 
-	if (delay > 0) {
-        usleep_range(delay, delay + 1);
-    }
-
-	ret = ismt_check_pre(priv);
-	if (ret < 0) {
-		return ret;
-	}
-
 	desc = &priv->hw[priv->head];
 
 	/* Initialize the DMA buffer */
-	mem_clear(priv->buffer, sizeof(priv->buffer));
+	memset(priv->buffer, 0, sizeof(priv->buffer));
 
 	/* Initialize the descriptor */
-	mem_clear(desc, sizeof(struct ismt_desc));
+	memset(desc, 0, sizeof(struct ismt_desc));
 	desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, read_write);
 
+	/* Always clear the log entries */
+	memset(priv->log, 0, ISMT_LOG_ENTRIES * sizeof(u32));
+
 	/* Initialize common control bits */
 	if (likely(pci_dev_msi_enabled(priv->pci_dev)))
 		desc->control = ISMT_DESC_INT | ISMT_DESC_FAIR;
@@ -650,6 +509,9 @@ static int ismt_access(struct i2c_adapter *adap, u16 addr,
 		if (read_write == I2C_SMBUS_WRITE) {
 			/* Block Write */
 			dev_dbg(dev, "I2C_SMBUS_BLOCK_DATA:  WRITE\n");
+			if (data->block[0] < 1 || data->block[0] > I2C_SMBUS_BLOCK_MAX)
+				return -EINVAL;
+
 			dma_size = data->block[0] + 1;
 			dma_direction = DMA_TO_DEVICE;
 			desc->wr_len_cmd = dma_size;
@@ -667,6 +529,21 @@ static int ismt_access(struct i2c_adapter *adap, u16 addr,
 		}
 		break;
 
+	case I2C_SMBUS_BLOCK_PROC_CALL:
+		dev_dbg(dev, "I2C_SMBUS_BLOCK_PROC_CALL\n");
+		if (data->block[0] > I2C_SMBUS_BLOCK_MAX)
+			return -EINVAL;
+
+		dma_size = I2C_SMBUS_BLOCK_MAX;
+		desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, 1);
+		desc->wr_len_cmd = data->block[0] + 1;
+		desc->rd_len = dma_size;
+		desc->control |= ISMT_DESC_BLK;
+		dma_direction = DMA_BIDIRECTIONAL;
+		dma_buffer[0] = command;
+		memcpy(&dma_buffer[1], &data->block[1], data->block[0]);
+		break;
+
 	case I2C_SMBUS_I2C_BLOCK_DATA:
 		/* Make sure the length is valid */
 		if (data->block[0] < 1)
@@ -746,16 +623,15 @@ static int ismt_access(struct i2c_adapter *adap, u16 addr,
 		dma_unmap_single(dev, dma_addr, dma_size, dma_direction);
 
 	if (unlikely(!time_left)) {
-		dev_warn(dev, "completion wait timed out:addr[%d-0x%x], read_write[%d], command[0x%x], size[%d]\n",
-					adap->nr, addr, read_write, command, size);
-		ismt_reset_dma(priv);
+		dev_err(dev, "completion wait timed out\n");
 		ret = -ETIMEDOUT;
-		priv->head = 0;
-		return ret;
+		goto out;
 	}
 
 	/* do any post processing of the descriptor here */
 	ret = ismt_process_desc(desc, data, priv, size, read_write);
+
+out:
 	/* Update the ring pointer */
 	priv->head++;
 	priv->head %= ISMT_DESC_ENTRIES;
@@ -774,6 +650,7 @@ static u32 ismt_func(struct i2c_adapter *adap)
 	       I2C_FUNC_SMBUS_BYTE_DATA		|
 	       I2C_FUNC_SMBUS_WORD_DATA		|
 	       I2C_FUNC_SMBUS_PROC_CALL		|
+	       I2C_FUNC_SMBUS_BLOCK_PROC_CALL	|
 	       I2C_FUNC_SMBUS_BLOCK_DATA	|
 	       I2C_FUNC_SMBUS_I2C_BLOCK		|
 	       I2C_FUNC_SMBUS_PEC;
@@ -795,6 +672,7 @@ static irqreturn_t ismt_handle_isr(struct ismt_priv *priv)
 	return IRQ_HANDLED;
 }
 
+
 /**
  * ismt_do_interrupt() - IRQ interrupt handler
  * @vec: interrupt vector
@@ -842,6 +720,8 @@ static void ismt_hw_init(struct ismt_priv *priv)
 	/* initialize the Master Descriptor Base Address (MDBA) */
 	writeq(priv->io_rng_dma, priv->smba + ISMT_MSTR_MDBA);
 
+	writeq(priv->log_dma, priv->smba + ISMT_GR_SMTICL);
+
 	/* initialize the Master Control Register (MCTRL) */
 	writel(ISMT_MCTRL_MEIE, priv->smba + ISMT_MSTR_MCTRL);
 
@@ -908,7 +788,7 @@ static void ismt_hw_init(struct ismt_priv *priv)
 		bus_speed = 1000;
 		break;
 	}
-	dev_info(dev, "SMBus clock is running at %d kHz with delay %d us\n", bus_speed, delay);
+	dev_dbg(dev, "SMBus clock is running at %d kHz\n", bus_speed);
 }
 
 /**
@@ -929,6 +809,12 @@ static int ismt_dev_init(struct ismt_priv *priv)
 	priv->head = 0;
 	init_completion(&priv->cmp);
 
+	priv->log = dmam_alloc_coherent(&priv->pci_dev->dev,
+					ISMT_LOG_ENTRIES * sizeof(u32),
+					&priv->log_dma, GFP_KERNEL);
+	if (!priv->log)
+		return -ENOMEM;
+
 	return 0;
 }
 
@@ -1052,15 +938,10 @@ ismt_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 		return -ENODEV;
 	}
 
-	if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) ||
-	    (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0)) {
-		if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
-		    (pci_set_consistent_dma_mask(pdev,
-						 DMA_BIT_MASK(32)) != 0)) {
-			dev_err(&pdev->dev, "pci_set_dma_mask fail %p\n",
-				pdev);
-			return -ENODEV;
-		}
+	err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
+	if (err) {
+		dev_err(&pdev->dev, "dma_set_mask fail\n");
+		return -ENODEV;
 	}
 
 	err = ismt_dev_init(priv);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.c
index f318234ae90f..81cecfa02e12 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.c
@@ -54,6 +54,7 @@
 #include <linux/i2c-smbus.h>
 #include <linux/fs.h>
 #include <linux/uaccess.h>
+#include <linux/uio.h>
 
 #include "wb_i2c_mux_pca954x.h"
 
@@ -318,6 +319,12 @@ static int pca954x_reset_file_read(const char *path, uint32_t pos, uint8_t *val,
     struct file *filp;
     loff_t tmp_pos;
 
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
     filp = filp_open(path, O_RDONLY, 0);
     if (IS_ERR(filp)) {
         PCA954X_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
@@ -326,9 +333,10 @@ static int pca954x_reset_file_read(const char *path, uint32_t pos, uint8_t *val,
     }
 
     tmp_pos = (loff_t)pos;
-    ret = kernel_read(filp, val, size, &tmp_pos);
+    iov_iter_kvec(&iter, ITER_DEST, &iov, 1, iov.iov_len);
+    ret = vfs_iter_read(filp, &iter, &tmp_pos, 0);
     if (ret < 0) {
-        PCA954X_ERROR("kernel_read failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        PCA954X_ERROR("vfs_iter_read failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
         goto exit;
     }
 
@@ -350,6 +358,12 @@ static int pca954x_reset_file_write(const char *path, uint32_t pos, uint8_t *val
     struct file *filp;
     loff_t tmp_pos;
 
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
     filp = filp_open(path, O_RDWR, 777);
     if (IS_ERR(filp)) {
         PCA954X_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
@@ -358,9 +372,10 @@ static int pca954x_reset_file_write(const char *path, uint32_t pos, uint8_t *val
     }
 
     tmp_pos = (loff_t)pos;
-    ret = kernel_write(filp, val, size, &tmp_pos);
+    iov_iter_kvec(&iter, ITER_SOURCE, &iov, 1, iov.iov_len);
+    ret = vfs_iter_write(filp, &iter, &tmp_pos, 0);
     if (ret < 0) {
-        PCA954X_ERROR("kernel_write failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        PCA954X_ERROR("vfs_iter_write failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
         goto exit;
     }
 
@@ -1282,7 +1297,7 @@ static int pca954x_probe(struct i2c_client *client,
     return ret;
 }
 
-static int pca954x_remove(struct i2c_client *client)
+static void pca954x_remove(struct i2c_client *client)
 {
     struct i2c_mux_core *muxc = i2c_get_clientdata(client);
     struct pca954x *data = i2c_mux_priv(muxc);
@@ -1297,7 +1312,7 @@ static int pca954x_remove(struct i2c_client *client)
     }
 
     i2c_mux_del_adapters(muxc);
-    return 0;
+    return;
 }
 
 #ifdef CONFIG_PM_SLEEP
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca9641.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca9641.c
index c5b6a835ac9f..a3ae9f4b2431 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca9641.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca9641.c
@@ -28,6 +28,7 @@
 #include <linux/gpio.h>
 #include <linux/fs.h>
 #include <linux/uaccess.h>
+#include <linux/uio.h>
 
 #include "wb_i2c_mux_pca9641.h"
 
@@ -227,6 +228,12 @@ static int pca9641_reset_file_read(const char *path, uint32_t pos, uint8_t *val,
     struct file *filp;
     loff_t tmp_pos;
 
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
     filp = filp_open(path, O_RDONLY, 0);
     if (IS_ERR(filp)) {
         PCA_DEBUG_ERR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
@@ -235,9 +242,10 @@ static int pca9641_reset_file_read(const char *path, uint32_t pos, uint8_t *val,
     }
 
     tmp_pos = (loff_t)pos;
-    ret = kernel_read(filp, val, size, &tmp_pos);
+    iov_iter_kvec(&iter, ITER_DEST, &iov, 1, iov.iov_len);
+    ret = vfs_iter_read(filp, &iter, &tmp_pos, 0);
     if (ret < 0) {
-        PCA_DEBUG_ERR("kernel_read failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        PCA_DEBUG_ERR("vfs_iter_read failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
         goto exit;
     }
 
@@ -255,11 +263,16 @@ static int pca9641_reset_file_read(const char *path, uint32_t pos, uint8_t *val,
 
 static int pca9641_reset_file_write(const char *path, uint32_t pos, uint8_t *val, size_t size)
 {
-
     int ret;
     struct file *filp;
     loff_t tmp_pos;
 
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
     filp = filp_open(path, O_RDWR, 777);
     if (IS_ERR(filp)) {
         PCA_DEBUG_ERR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
@@ -268,9 +281,10 @@ static int pca9641_reset_file_write(const char *path, uint32_t pos, uint8_t *val
     }
 
     tmp_pos = (loff_t)pos;
-    ret = kernel_write(filp, val, size, &tmp_pos);
+    iov_iter_kvec(&iter, ITER_SOURCE, &iov, 1, iov.iov_len);
+    ret = vfs_iter_write(filp, &iter, &tmp_pos, 0);
     if (ret < 0) {
-        PCA_DEBUG_ERR("kernel_write failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        PCA_DEBUG_ERR("vfs_iter_write failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
         goto exit;
     }
 
@@ -1372,12 +1386,12 @@ static int pca9541_probe(struct i2c_client *client, const struct i2c_device_id *
     return 0;
 }
 
-static int pca9541_remove(struct i2c_client *client)
+static void pca9541_remove(struct i2c_client *client)
 {
 	struct i2c_mux_core *muxc = i2c_get_clientdata(client);
 
 	i2c_mux_del_adapters(muxc);
-	return 0;
+	return;
 }
 
 static struct i2c_driver pca9641_driver = {
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ina3221.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ina3221.c
index fba2c4e3a68e..05b6da0284c0 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ina3221.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ina3221.c
@@ -913,7 +913,7 @@ static int ina3221_probe(struct i2c_client *client)
     return ret;
 }
 
-static int ina3221_remove(struct i2c_client *client)
+static void ina3221_remove(struct i2c_client *client)
 {
     struct ina3221_data *ina = dev_get_drvdata(&client->dev);
     int i;
@@ -927,7 +927,7 @@ static int ina3221_remove(struct i2c_client *client)
 
     mutex_destroy(&ina->lock);
 
-    return 0;
+    return;
 }
 
 static int __maybe_unused ina3221_suspend(struct device *dev)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus.h
index 9fb2c9017ae6..781f2ee07198 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus.h
@@ -521,7 +521,7 @@ void wb_pmbus_clear_faults(struct i2c_client *client);
 bool wb_pmbus_check_byte_register(struct i2c_client *client, int page, int reg);
 bool wb_pmbus_check_word_register(struct i2c_client *client, int page, int reg);
 int wb_pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info);
-int wb_pmbus_do_remove(struct i2c_client *client);
+void wb_pmbus_do_remove(struct i2c_client *client);
 const struct pmbus_driver_info *wb_pmbus_get_driver_info(struct i2c_client
                               *client);
 int wb_pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id,
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus_core.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus_core.c
index 343aea446b9f..7ede09a56986 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus_core.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus_core.c
@@ -2740,13 +2740,13 @@ int wb_pmbus_do_probe(struct i2c_client *client, struct pmbus_driver_info *info)
 }
 EXPORT_SYMBOL_GPL(wb_pmbus_do_probe);
 
-int wb_pmbus_do_remove(struct i2c_client *client)
+void wb_pmbus_do_remove(struct i2c_client *client)
 {
     struct pmbus_data *data = i2c_get_clientdata(client);
 
     debugfs_remove_recursive(data->debugfs);
 
-    return 0;
+    return;
 }
 EXPORT_SYMBOL_GPL(wb_pmbus_do_remove);
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c
index c0c3d2bc79f9..873f13e6ae2b 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c
@@ -235,16 +235,11 @@ static int xdpe132g5c_probe(struct i2c_client *client,
     return status;
 }
 
-static int xdpe132g5c_remove(struct i2c_client *client)
+static void xdpe132g5c_remove(struct i2c_client *client)
 {
-    int ret;
-
     sysfs_remove_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group);
-    ret = wb_pmbus_do_remove(client);
-    if (ret != 0){
-        DBG_ERROR("fail remove xdpe132g5c %d\n", ret);
-    }
-    return ret;
+    wb_pmbus_do_remove(client);
+    return;
 }
 
 static const struct i2c_device_id xdpe132g5c_id[] = {
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/mdio_bitbang.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/mdio_bitbang.c
index 5136275c8e73..9c5515f320be 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/mdio_bitbang.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/mdio_bitbang.c
@@ -149,7 +149,7 @@ static int mdiobb_cmd_addr(struct mdiobb_ctrl *ctrl, int phy, u32 addr)
 	return dev_addr;
 }
 
-static int mdiobb_read(struct mii_bus *bus, int phy, int reg)
+int mdiobb_read(struct mii_bus *bus, int phy, int reg)
 {
 	struct mdiobb_ctrl *ctrl = bus->priv;
 	int ret, i;
@@ -181,7 +181,7 @@ static int mdiobb_read(struct mii_bus *bus, int phy, int reg)
 	return ret;
 }
 
-static int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val)
+int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val)
 {
 	struct mdiobb_ctrl *ctrl = bus->priv;
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_adapter.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_adapter.c
index 1d5ca7072f8f..9c8dc6aa098e 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_adapter.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_adapter.c
@@ -328,6 +328,12 @@ int32_t dfd_ko_read_file(char *fpath, int32_t addr, uint8_t *val, int32_t read_b
     struct file *filp;
     loff_t pos;
 
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, read_bytes, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
     if ((fpath == NULL) || (val == NULL) || (addr < 0) || (read_bytes < 0)) {
         DBG_DEBUG(DBG_ERROR, "input arguments error, addr=%d read_bytes=%d\n", addr, read_bytes);
         return -DFD_RV_INDEX_INVALID;
@@ -340,9 +346,10 @@ int32_t dfd_ko_read_file(char *fpath, int32_t addr, uint8_t *val, int32_t read_b
     }
 
     pos = addr;
-    ret = kernel_read(filp, val, read_bytes, &pos);
+    iov_iter_kvec(&iter, ITER_DEST, &iov, 1, iov.iov_len);
+    ret = vfs_iter_read(filp, &iter, &pos, 0);
     if (ret < 0) {
-        DBG_DEBUG(DBG_ERROR, "kernel_read failed, path=%s, addr=%d, size=%d, ret=%d\n", fpath, addr, read_bytes, ret);
+        DBG_DEBUG(DBG_ERROR, "vfs_iter_read failed, path=%s, addr=%d, size=%d, ret=%d\n", fpath, addr, read_bytes, ret);
         ret = -DFD_RV_DEV_FAIL;
     }
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_file.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_file.c
index 8d77759ba7e0..ac1c22ff1c51 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_file.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_file.c
@@ -140,24 +140,24 @@ int kfile_read(int32_t addr, char *buf, int buf_size, kfile_ctrl_t *kfile_ctrl)
     return i;
 }
 
-static int kfile_filldir_one(struct dir_context *ctx, const char * name, int len,
+static bool kfile_filldir_one(struct dir_context *ctx, const char * name, int len,
             loff_t pos, u64 ino, unsigned int d_type)
 {
     struct getdents_callback *buf ;
-    int result;
+    bool result;
     buf = container_of(ctx, struct getdents_callback, ctx);
-    result = 0;
+    result = 1;
     if (strncmp(buf->obj_name, name, strlen(buf->obj_name)) == 0) {
         if (buf->dir_len < len) {
             DBG_DEBUG(DBG_ERROR, "match ok. dir name:%s, but buf_len %d small than dir len %d.\n",
                 name, buf->dir_len, len);
             buf->found = 0;
-            return -1;
+            return 0;
         }
         mem_clear(buf->match_name, buf->dir_len);
         memcpy(buf->match_name, name, len);
         buf->found = 1;
-        result = -1;
+        result = 0;
     }
     return result;
 }
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_switch.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_switch.c
index 9563260f32b4..fea008b41bfe 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_switch.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_sysfs/plat_switch.c
@@ -60,7 +60,6 @@ static void switch_obj_release(struct kobject *kobj)
 static struct kobj_type switch_ktype = {
     .sysfs_ops = &switch_sysfs_ops,
     .release = switch_obj_release,
-    .default_attrs = NULL,
 };
 
 static struct kset *switch_kset;
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/cqhci.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/cqhci.h
index 89bf6adbce8c..ba9387ed90eb 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/cqhci.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/cqhci.h
@@ -22,10 +22,13 @@
 
 /* capabilities */
 #define CQHCI_CAP			0x04
+#define CQHCI_CAP_CS			0x10000000 /* Crypto Support */
+
 /* configuration */
 #define CQHCI_CFG			0x08
 #define CQHCI_DCMD			0x00001000
 #define CQHCI_TASK_DESC_SZ		0x00000100
+#define CQHCI_CRYPTO_GENERAL_ENABLE	0x00000002
 #define CQHCI_ENABLE			0x00000001
 
 /* control */
@@ -39,8 +42,11 @@
 #define CQHCI_IS_TCC			BIT(1)
 #define CQHCI_IS_RED			BIT(2)
 #define CQHCI_IS_TCL			BIT(3)
+#define CQHCI_IS_GCE			BIT(4) /* General Crypto Error */
+#define CQHCI_IS_ICCE			BIT(5) /* Invalid Crypto Config Error */
 
-#define CQHCI_IS_MASK (CQHCI_IS_TCC | CQHCI_IS_RED)
+#define CQHCI_IS_MASK (CQHCI_IS_TCC | CQHCI_IS_RED | \
+		       CQHCI_IS_GCE | CQHCI_IS_ICCE)
 
 /* interrupt status enable */
 #define CQHCI_ISTE			0x14
@@ -78,6 +84,9 @@
 /* task clear */
 #define CQHCI_TCLR			0x38
 
+/* task descriptor processing error */
+#define CQHCI_TDPE			0x3c
+
 /* send status config 1 */
 #define CQHCI_SSC1			0x40
 #define CQHCI_SSC1_CBC_MASK		GENMASK(19, 16)
@@ -107,6 +116,10 @@
 /* command response argument */
 #define CQHCI_CRA			0x5C
 
+/* crypto capabilities */
+#define CQHCI_CCAP			0x100
+#define CQHCI_CRYPTOCAP			0x104
+
 #define CQHCI_INT_ALL			0xF
 #define CQHCI_IC_DEFAULT_ICCTH		31
 #define CQHCI_IC_DEFAULT_ICTOVAL	1
@@ -133,11 +146,70 @@
 #define CQHCI_CMD_TIMING(x)		(((x) & 1) << 22)
 #define CQHCI_RESP_TYPE(x)		(((x) & 0x3) << 23)
 
+/* crypto task descriptor fields (for bits 64-127 of task descriptor) */
+#define CQHCI_CRYPTO_ENABLE_BIT		(1ULL << 47)
+#define CQHCI_CRYPTO_KEYSLOT(x)		((u64)(x) << 32)
+
 /* transfer descriptor fields */
 #define CQHCI_DAT_LENGTH(x)		(((x) & 0xFFFF) << 16)
 #define CQHCI_DAT_ADDR_LO(x)		(((x) & 0xFFFFFFFF) << 32)
 #define CQHCI_DAT_ADDR_HI(x)		(((x) & 0xFFFFFFFF) << 0)
 
+/* CCAP - Crypto Capability 100h */
+union cqhci_crypto_capabilities {
+	__le32 reg_val;
+	struct {
+		u8 num_crypto_cap;
+		u8 config_count;
+		u8 reserved;
+		u8 config_array_ptr;
+	};
+};
+
+enum cqhci_crypto_key_size {
+	CQHCI_CRYPTO_KEY_SIZE_INVALID	= 0,
+	CQHCI_CRYPTO_KEY_SIZE_128	= 1,
+	CQHCI_CRYPTO_KEY_SIZE_192	= 2,
+	CQHCI_CRYPTO_KEY_SIZE_256	= 3,
+	CQHCI_CRYPTO_KEY_SIZE_512	= 4,
+};
+
+enum cqhci_crypto_alg {
+	CQHCI_CRYPTO_ALG_AES_XTS		= 0,
+	CQHCI_CRYPTO_ALG_BITLOCKER_AES_CBC	= 1,
+	CQHCI_CRYPTO_ALG_AES_ECB		= 2,
+	CQHCI_CRYPTO_ALG_ESSIV_AES_CBC		= 3,
+};
+
+/* x-CRYPTOCAP - Crypto Capability X */
+union cqhci_crypto_cap_entry {
+	__le32 reg_val;
+	struct {
+		u8 algorithm_id;
+		u8 sdus_mask; /* Supported data unit size mask */
+		u8 key_size;
+		u8 reserved;
+	};
+};
+
+#define CQHCI_CRYPTO_CONFIGURATION_ENABLE (1 << 7)
+#define CQHCI_CRYPTO_KEY_MAX_SIZE 64
+/* x-CRYPTOCFG - Crypto Configuration X */
+union cqhci_crypto_cfg_entry {
+	__le32 reg_val[32];
+	struct {
+		u8 crypto_key[CQHCI_CRYPTO_KEY_MAX_SIZE];
+		u8 data_unit_size;
+		u8 crypto_cap_idx;
+		u8 reserved_1;
+		u8 config_enable;
+		u8 reserved_multi_host;
+		u8 reserved_2;
+		u8 vsb[2];
+		u8 reserved_3[56];
+	};
+};
+
 struct cqhci_host_ops;
 struct mmc_host;
 struct mmc_request;
@@ -196,6 +268,12 @@ struct cqhci_host {
 	struct completion halt_comp;
 	wait_queue_head_t wait_queue;
 	struct cqhci_slot *slot;
+
+#ifdef CONFIG_MMC_CRYPTO
+	union cqhci_crypto_capabilities crypto_capabilities;
+	union cqhci_crypto_cap_entry *crypto_cap_array;
+	u32 crypto_cfg_register;
+#endif
 };
 
 struct cqhci_host_ops {
@@ -208,6 +286,10 @@ struct cqhci_host_ops {
 				 u64 *data);
 	void (*pre_enable)(struct mmc_host *mmc);
 	void (*post_disable)(struct mmc_host *mmc);
+#ifdef CONFIG_MMC_CRYPTO
+	int (*program_key)(struct cqhci_host *cq_host,
+			   const union cqhci_crypto_cfg_entry *cfg, int slot);
+#endif
 };
 
 static inline void cqhci_writel(struct cqhci_host *host, u32 val, int reg)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-core.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-core.c
index 5fe00b537df6..e9c31674613e 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-core.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-core.c
@@ -17,8 +17,6 @@
 #include <linux/dma-mapping.h>
 #include <linux/slab.h>
 #include <linux/device.h>
-#include <linux/mmc/host.h>
-#include <linux/mmc/mmc.h>
 #include <linux/scatterlist.h>
 #include <linux/io.h>
 #include <linux/iopoll.h>
@@ -26,12 +24,14 @@
 #include <linux/pm_runtime.h>
 #include <linux/pm_qos.h>
 #include <linux/debugfs.h>
-#include <linux/mmc/slot-gpio.h>
-#include <linux/mmc/sdhci-pci-data.h>
 #include <linux/acpi.h>
 #include <linux/dmi.h>
 #include <linux/init.h>
 
+#include <linux/mmc/host.h>
+#include <linux/mmc/mmc.h>
+#include <linux/mmc/slot-gpio.h>
+
 #ifdef CONFIG_X86
 #include <asm/iosf_mbi.h>
 #endif
@@ -303,6 +303,27 @@ static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
 			  SDHCI_QUIRK_MISSING_CAPS
 };
 
+static void ene_714_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
+{
+	struct sdhci_host *host = mmc_priv(mmc);
+
+	sdhci_set_ios(mmc, ios);
+
+	/*
+	 * Some (ENE) controllers misbehave on some ios operations,
+	 * signalling timeout and CRC errors even on CMD0. Resetting
+	 * it on each ios seems to solve the problem.
+	 */
+	if (!(host->flags & SDHCI_DEVICE_DEAD))
+		sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
+}
+
+static int ene_714_probe_slot(struct sdhci_pci_slot *slot)
+{
+	slot->host->mmc_host_ops.set_ios = ene_714_set_ios;
+	return 0;
+}
+
 static const struct sdhci_pci_fixes sdhci_ene_712 = {
 	.quirks		= SDHCI_QUIRK_SINGLE_POWER_WRITE |
 			  SDHCI_QUIRK_BROKEN_DMA,
@@ -310,8 +331,8 @@ static const struct sdhci_pci_fixes sdhci_ene_712 = {
 
 static const struct sdhci_pci_fixes sdhci_ene_714 = {
 	.quirks		= SDHCI_QUIRK_SINGLE_POWER_WRITE |
-			  SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
 			  SDHCI_QUIRK_BROKEN_DMA,
+	.probe_slot	= ene_714_probe_slot,
 };
 
 static const struct sdhci_pci_fixes sdhci_cafe = {
@@ -351,73 +372,6 @@ static int pch_hc_probe_slot(struct sdhci_pci_slot *slot)
 	return 0;
 }
 
-#ifdef CONFIG_PM
-
-static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id)
-{
-	struct sdhci_pci_slot *slot = dev_id;
-	struct sdhci_host *host = slot->host;
-
-	mmc_detect_change(host->mmc, msecs_to_jiffies(200));
-	return IRQ_HANDLED;
-}
-
-static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
-{
-	int err, irq, gpio = slot->cd_gpio;
-
-	slot->cd_gpio = -EINVAL;
-	slot->cd_irq = -EINVAL;
-
-	if (!gpio_is_valid(gpio))
-		return;
-
-	err = devm_gpio_request(&slot->chip->pdev->dev, gpio, "sd_cd");
-	if (err < 0)
-		goto out;
-
-	err = gpio_direction_input(gpio);
-	if (err < 0)
-		goto out_free;
-
-	irq = gpio_to_irq(gpio);
-	if (irq < 0)
-		goto out_free;
-
-	err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING |
-			  IRQF_TRIGGER_FALLING, "sd_cd", slot);
-	if (err)
-		goto out_free;
-
-	slot->cd_gpio = gpio;
-	slot->cd_irq = irq;
-
-	return;
-
-out_free:
-	devm_gpio_free(&slot->chip->pdev->dev, gpio);
-out:
-	dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n");
-}
-
-static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
-{
-	if (slot->cd_irq >= 0)
-		free_irq(slot->cd_irq, slot);
-}
-
-#else
-
-static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
-{
-}
-
-static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
-{
-}
-
-#endif
-
 static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
 {
 	slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
@@ -625,23 +579,16 @@ static int intel_select_drive_strength(struct mmc_card *card,
 static int bxt_get_cd(struct mmc_host *mmc)
 {
 	int gpio_cd = mmc_gpio_get_cd(mmc);
-	struct sdhci_host *host = mmc_priv(mmc);
-	unsigned long flags;
-	int ret = 0;
 
 	if (!gpio_cd)
 		return 0;
 
-	spin_lock_irqsave(&host->lock, flags);
-
-	if (host->flags & SDHCI_DEVICE_DEAD)
-		goto out;
-
-	ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
-out:
-	spin_unlock_irqrestore(&host->lock, flags);
+	return sdhci_get_cd_nogpio(mmc);
+}
 
-	return ret;
+static int mrfld_get_cd(struct mmc_host *mmc)
+{
+	return sdhci_get_cd_nogpio(mmc);
 }
 
 #define SDHCI_INTEL_PWR_TIMEOUT_CNT	20
@@ -984,6 +931,12 @@ static bool glk_broken_cqhci(struct sdhci_pci_slot *slot)
 		dmi_match(DMI_SYS_VENDOR, "IRBIS"));
 }
 
+static bool jsl_broken_hs400es(struct sdhci_pci_slot *slot)
+{
+	return slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_JSL_EMMC &&
+			dmi_match(DMI_BIOS_VENDOR, "ASUSTeK COMPUTER INC.");
+}
+
 static int glk_emmc_probe_slot(struct sdhci_pci_slot *slot)
 {
 	int ret = byt_emmc_probe_slot(slot);
@@ -992,9 +945,11 @@ static int glk_emmc_probe_slot(struct sdhci_pci_slot *slot)
 		slot->host->mmc->caps2 |= MMC_CAP2_CQE;
 
 	if (slot->chip->pdev->device != PCI_DEVICE_ID_INTEL_GLK_EMMC) {
-		slot->host->mmc->caps2 |= MMC_CAP2_HS400_ES,
-		slot->host->mmc_host_ops.hs400_enhanced_strobe =
-						intel_hs400_enhanced_strobe;
+		if (!jsl_broken_hs400es(slot)) {
+			slot->host->mmc->caps2 |= MMC_CAP2_HS400_ES;
+			slot->host->mmc_host_ops.hs400_enhanced_strobe =
+							intel_hs400_enhanced_strobe;
+		}
 		slot->host->mmc->caps2 |= MMC_CAP2_CQE_DCMD;
 	}
 
@@ -1350,16 +1305,11 @@ static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
 #ifdef CONFIG_ACPI
 static void intel_mrfld_mmc_fix_up_power_slot(struct sdhci_pci_slot *slot)
 {
-	struct acpi_device *device, *child;
+	struct acpi_device *device;
 
 	device = ACPI_COMPANION(&slot->chip->pdev->dev);
-	if (!device)
-		return;
-
-	acpi_device_fix_up_power(device);
-	list_for_each_entry(child, &device->children, node)
-		if (child->status.present && child->status.enabled)
-			acpi_device_fix_up_power(child);
+	if (device)
+		acpi_device_fix_up_power_extended(device);
 }
 #else
 static inline void intel_mrfld_mmc_fix_up_power_slot(struct sdhci_pci_slot *slot) {}
@@ -1377,6 +1327,14 @@ static int intel_mrfld_mmc_probe_slot(struct sdhci_pci_slot *slot)
 					 MMC_CAP_1_8V_DDR;
 		break;
 	case INTEL_MRFLD_SD:
+		slot->cd_idx = 0;
+		slot->cd_override_level = true;
+		/*
+		 * There are two PCB designs of SD card slot with the opposite
+		 * card detection sense. Quirk this out by ignoring GPIO state
+		 * completely in the custom ->get_cd() callback.
+		 */
+		slot->host->mmc_host_ops.get_cd = mrfld_get_cd;
 		slot->host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
 		break;
 	case INTEL_MRFLD_SDIO:
@@ -1972,6 +1930,7 @@ static const struct pci_device_id pci_ids[] = {
 	SDHCI_PCI_DEVICE(INTEL, JSL_SD,    intel_byt_sd),
 	SDHCI_PCI_DEVICE(INTEL, LKF_EMMC,  intel_glk_emmc),
 	SDHCI_PCI_DEVICE(INTEL, LKF_SD,    intel_byt_sd),
+	SDHCI_PCI_DEVICE(INTEL, ADL_EMMC,  intel_glk_emmc),
 	SDHCI_PCI_DEVICE(O2, 8120,     o2),
 	SDHCI_PCI_DEVICE(O2, 8220,     o2),
 	SDHCI_PCI_DEVICE(O2, 8221,     o2),
@@ -2021,21 +1980,6 @@ int sdhci_pci_enable_dma(struct sdhci_host *host)
 	return 0;
 }
 
-static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host)
-{
-	struct sdhci_pci_slot *slot = sdhci_priv(host);
-	int rst_n_gpio = slot->rst_n_gpio;
-
-	if (!gpio_is_valid(rst_n_gpio))
-		return;
-	gpio_set_value_cansleep(rst_n_gpio, 0);
-	/* For eMMC, minimum is 1us but give it 10us for good measure */
-	udelay(10);
-	gpio_set_value_cansleep(rst_n_gpio, 1);
-	/* For eMMC, minimum is 200us but give it 300us for good measure */
-	usleep_range(300, 1000);
-}
-
 static void sdhci_pci_hw_reset(struct sdhci_host *host)
 {
 	struct sdhci_pci_slot *slot = sdhci_priv(host);
@@ -2166,26 +2110,8 @@ static struct sdhci_pci_slot *sdhci_pci_probe_slot(
 
 	slot->chip = chip;
 	slot->host = host;
-	slot->rst_n_gpio = -EINVAL;
-	slot->cd_gpio = -EINVAL;
 	slot->cd_idx = -1;
 
-	/* Retrieve platform data if there is any */
-	if (*sdhci_pci_get_data)
-		slot->data = sdhci_pci_get_data(pdev, slotno);
-
-	if (slot->data) {
-		if (slot->data->setup) {
-			ret = slot->data->setup(slot->data);
-			if (ret) {
-				dev_err(&pdev->dev, "platform setup failed\n");
-				goto free;
-			}
-		}
-		slot->rst_n_gpio = slot->data->rst_n_gpio;
-		slot->cd_gpio = slot->data->cd_gpio;
-	}
-
 	host->hw_name = "PCI";
 	host->ops = chip->fixes && chip->fixes->ops ?
 		    chip->fixes->ops :
@@ -2209,17 +2135,6 @@ static struct sdhci_pci_slot *sdhci_pci_probe_slot(
 			goto cleanup;
 	}
 
-	if (gpio_is_valid(slot->rst_n_gpio)) {
-		if (!devm_gpio_request(&pdev->dev, slot->rst_n_gpio, "eMMC_reset")) {
-			gpio_direction_output(slot->rst_n_gpio, 1);
-			slot->host->mmc->caps |= MMC_CAP_HW_RESET;
-			slot->hw_reset = sdhci_pci_gpio_hw_reset;
-		} else {
-			dev_warn(&pdev->dev, "failed to request rst_n_gpio\n");
-			slot->rst_n_gpio = -EINVAL;
-		}
-	}
-
 	host->mmc->pm_caps = MMC_PM_KEEP_POWER;
 	host->mmc->slotno = slotno;
 	host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
@@ -2254,15 +2169,11 @@ static struct sdhci_pci_slot *sdhci_pci_probe_slot(
 	if (ret)
 		goto remove;
 
-	sdhci_pci_add_own_cd(slot);
-
 	/*
 	 * Check if the chip needs a separate GPIO for card detect to wake up
 	 * from runtime suspend.  If it is not there, don't allow runtime PM.
-	 * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure.
 	 */
-	if (chip->fixes && chip->fixes->own_cd_for_runtime_pm &&
-	    !gpio_is_valid(slot->cd_gpio) && slot->cd_idx < 0)
+	if (chip->fixes && chip->fixes->own_cd_for_runtime_pm && slot->cd_idx < 0)
 		chip->allow_runtime_pm = false;
 
 	return slot;
@@ -2272,10 +2183,6 @@ static struct sdhci_pci_slot *sdhci_pci_probe_slot(
 		chip->fixes->remove_slot(slot, 0);
 
 cleanup:
-	if (slot->data && slot->data->cleanup)
-		slot->data->cleanup(slot->data);
-
-free:
 	sdhci_free_host(host);
 
 	return ERR_PTR(ret);
@@ -2286,8 +2193,6 @@ static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
 	int dead;
 	u32 scratch;
 
-	sdhci_pci_remove_own_cd(slot);
-
 	dead = 0;
 	scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
 	if (scratch == (u32)-1)
@@ -2298,9 +2203,6 @@ static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
 	if (slot->chip->fixes && slot->chip->fixes->remove_slot)
 		slot->chip->fixes->remove_slot(slot, dead);
 
-	if (slot->data && slot->data->cleanup)
-		slot->data->cleanup(slot->data);
-
 	sdhci_free_host(slot->host);
 }
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-gli.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-gli.c
index 23b89b4cad08..4d509f656188 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-gli.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-gli.c
@@ -12,6 +12,8 @@
 #include <linux/pci.h>
 #include <linux/mmc/mmc.h>
 #include <linux/delay.h>
+#include <linux/of.h>
+#include <linux/iopoll.h>
 #include "sdhci.h"
 #include "sdhci-pci.h"
 #include "cqhci.h"
@@ -22,6 +24,10 @@
 #define   GLI_9750_WT_EN_ON	    0x1
 #define   GLI_9750_WT_EN_OFF	    0x0
 
+#define SDHCI_GLI_9750_CFG2          0x848
+#define   SDHCI_GLI_9750_CFG2_L1DLY    GENMASK(28, 24)
+#define   GLI_9750_CFG2_L1DLY_VALUE    0x1F
+
 #define SDHCI_GLI_9750_DRIVING      0x860
 #define   SDHCI_GLI_9750_DRIVING_1    GENMASK(11, 0)
 #define   SDHCI_GLI_9750_DRIVING_2    GENMASK(27, 26)
@@ -58,6 +64,7 @@
 #define   GLI_9750_MISC_RX_INV_OFF       0x0
 #define   GLI_9750_MISC_RX_INV_VALUE     GLI_9750_MISC_RX_INV_OFF
 #define   GLI_9750_MISC_TX1_DLY_VALUE    0x5
+#define   SDHCI_GLI_9750_MISC_SSC_OFF    BIT(26)
 
 #define SDHCI_GLI_9750_TUNING_CONTROL	          0x540
 #define   SDHCI_GLI_9750_TUNING_CONTROL_EN          BIT(4)
@@ -84,9 +91,24 @@
 #define   GLI_9763E_VHS_REV_W      0x2
 #define PCIE_GLI_9763E_MB	 0x888
 #define   GLI_9763E_MB_CMDQ_OFF	   BIT(19)
+#define   GLI_9763E_MB_ERP_ON      BIT(7)
 #define PCIE_GLI_9763E_SCR	 0x8E0
 #define   GLI_9763E_SCR_AXI_REQ	   BIT(9)
 
+#define PCIE_GLI_9763E_CFG       0x8A0
+#define   GLI_9763E_CFG_LPSN_DIS   BIT(12)
+
+#define PCIE_GLI_9763E_CFG2      0x8A4
+#define   GLI_9763E_CFG2_L1DLY     GENMASK(28, 19)
+#define   GLI_9763E_CFG2_L1DLY_MID 0x54
+
+#define PCIE_GLI_9763E_MMC_CTRL  0x960
+#define   GLI_9763E_HS400_SLOW     BIT(3)
+
+#define PCIE_GLI_9763E_CLKRXDLY  0x934
+#define   GLI_9763E_HS400_RXDLY    GENMASK(31, 28)
+#define   GLI_9763E_HS400_RXDLY_5  0x5
+
 #define SDHCI_GLI_9763E_CQE_BASE_ADDR	 0x200
 #define GLI_9763E_CQE_TRNS_MODE	   (SDHCI_TRNS_MULTI | \
 				    SDHCI_TRNS_BLK_CNT_EN | \
@@ -97,6 +119,16 @@
 #define   GLI_9755_WT_EN_ON     0x1
 #define   GLI_9755_WT_EN_OFF    0x0
 
+#define PCI_GLI_9755_PECONF   0x44
+#define   PCI_GLI_9755_LFCLK    GENMASK(14, 12)
+#define   PCI_GLI_9755_DMACLK   BIT(29)
+#define   PCI_GLI_9755_INVERT_CD  BIT(30)
+#define   PCI_GLI_9755_INVERT_WP  BIT(31)
+
+#define PCI_GLI_9755_CFG2          0x48
+#define   PCI_GLI_9755_CFG2_L1DLY    GENMASK(28, 24)
+#define   GLI_9755_CFG2_L1DLY_VALUE  0x1F
+
 #define PCI_GLI_9755_PLL            0x64
 #define   PCI_GLI_9755_PLL_LDIV       GENMASK(9, 0)
 #define   PCI_GLI_9755_PLL_PDIV       GENMASK(14, 12)
@@ -107,6 +139,15 @@
 #define PCI_GLI_9755_PLLSSC        0x68
 #define   PCI_GLI_9755_PLLSSC_PPM    GENMASK(15, 0)
 
+#define PCI_GLI_9755_SerDes  0x70
+#define PCI_GLI_9755_SCP_DIS   BIT(19)
+
+#define PCI_GLI_9755_MISC	    0x78
+#define   PCI_GLI_9755_MISC_SSC_OFF    BIT(26)
+
+#define PCI_GLI_9755_PM_CTRL     0xFC
+#define   PCI_GLI_9755_PM_STATE    GENMASK(1, 0)
+
 #define GLI_MAX_TUNING_LOOP 40
 
 /* Genesys Logic chipset */
@@ -341,6 +382,19 @@ static void gl9750_set_pll(struct sdhci_host *host, u8 dir, u16 ldiv, u8 pdiv)
 	mdelay(1);
 }
 
+static bool gl9750_ssc_enable(struct sdhci_host *host)
+{
+	u32 misc;
+	u8 off;
+
+	gl9750_wt_on(host);
+	misc = sdhci_readl(host, SDHCI_GLI_9750_MISC);
+	off = FIELD_GET(SDHCI_GLI_9750_MISC_SSC_OFF, misc);
+	gl9750_wt_off(host);
+
+	return !off;
+}
+
 static void gl9750_set_ssc(struct sdhci_host *host, u8 enable, u8 step, u16 ppm)
 {
 	u32 pll;
@@ -362,11 +416,31 @@ static void gl9750_set_ssc(struct sdhci_host *host, u8 enable, u8 step, u16 ppm)
 
 static void gl9750_set_ssc_pll_205mhz(struct sdhci_host *host)
 {
-	/* set pll to 205MHz and enable ssc */
-	gl9750_set_ssc(host, 0x1, 0x1F, 0xFFE7);
+	bool enable = gl9750_ssc_enable(host);
+
+	/* set pll to 205MHz and ssc */
+	gl9750_set_ssc(host, enable, 0xF, 0x5A1D);
 	gl9750_set_pll(host, 0x1, 0x246, 0x0);
 }
 
+static void gl9750_set_ssc_pll_100mhz(struct sdhci_host *host)
+{
+	bool enable = gl9750_ssc_enable(host);
+
+	/* set pll to 100MHz and ssc */
+	gl9750_set_ssc(host, enable, 0xE, 0x51EC);
+	gl9750_set_pll(host, 0x1, 0x244, 0x1);
+}
+
+static void gl9750_set_ssc_pll_50mhz(struct sdhci_host *host)
+{
+	bool enable = gl9750_ssc_enable(host);
+
+	/* set pll to 50MHz and ssc */
+	gl9750_set_ssc(host, enable, 0xE, 0x51EC);
+	gl9750_set_pll(host, 0x1, 0x244, 0x3);
+}
+
 static void sdhci_gl9750_set_clock(struct sdhci_host *host, unsigned int clock)
 {
 	struct mmc_ios *ios = &host->mmc->ios;
@@ -384,11 +458,31 @@ static void sdhci_gl9750_set_clock(struct sdhci_host *host, unsigned int clock)
 	if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {
 		host->mmc->actual_clock = 205000000;
 		gl9750_set_ssc_pll_205mhz(host);
+	} else if (clock == 100000000) {
+		gl9750_set_ssc_pll_100mhz(host);
+	} else if (clock == 50000000) {
+		gl9750_set_ssc_pll_50mhz(host);
 	}
 
 	sdhci_enable_clk(host, clk);
 }
 
+static void gl9750_hw_setting(struct sdhci_host *host)
+{
+	u32 value;
+
+	gl9750_wt_on(host);
+
+	value = sdhci_readl(host, SDHCI_GLI_9750_CFG2);
+	value &= ~SDHCI_GLI_9750_CFG2_L1DLY;
+	/* set ASPM L1 entry delay to 7.9us */
+	value |= FIELD_PREP(SDHCI_GLI_9750_CFG2_L1DLY,
+			    GLI_9750_CFG2_L1DLY_VALUE);
+	sdhci_writel(host, value, SDHCI_GLI_9750_CFG2);
+
+	gl9750_wt_off(host);
+}
+
 static void gli_pcie_enable_msi(struct sdhci_pci_slot *slot)
 {
 	int ret;
@@ -468,6 +562,19 @@ static void gl9755_set_pll(struct pci_dev *pdev, u8 dir, u16 ldiv, u8 pdiv)
 	mdelay(1);
 }
 
+static bool gl9755_ssc_enable(struct pci_dev *pdev)
+{
+	u32 misc;
+	u8 off;
+
+	gl9755_wt_on(pdev);
+	pci_read_config_dword(pdev, PCI_GLI_9755_MISC, &misc);
+	off = FIELD_GET(PCI_GLI_9755_MISC_SSC_OFF, misc);
+	gl9755_wt_off(pdev);
+
+	return !off;
+}
+
 static void gl9755_set_ssc(struct pci_dev *pdev, u8 enable, u8 step, u16 ppm)
 {
 	u32 pll;
@@ -489,11 +596,31 @@ static void gl9755_set_ssc(struct pci_dev *pdev, u8 enable, u8 step, u16 ppm)
 
 static void gl9755_set_ssc_pll_205mhz(struct pci_dev *pdev)
 {
-	/* set pll to 205MHz and enable ssc */
-	gl9755_set_ssc(pdev, 0x1, 0x1F, 0xFFE7);
+	bool enable = gl9755_ssc_enable(pdev);
+
+	/* set pll to 205MHz and ssc */
+	gl9755_set_ssc(pdev, enable, 0xF, 0x5A1D);
 	gl9755_set_pll(pdev, 0x1, 0x246, 0x0);
 }
 
+static void gl9755_set_ssc_pll_100mhz(struct pci_dev *pdev)
+{
+	bool enable = gl9755_ssc_enable(pdev);
+
+	/* set pll to 100MHz and ssc */
+	gl9755_set_ssc(pdev, enable, 0xE, 0x51EC);
+	gl9755_set_pll(pdev, 0x1, 0x244, 0x1);
+}
+
+static void gl9755_set_ssc_pll_50mhz(struct pci_dev *pdev)
+{
+	bool enable = gl9755_ssc_enable(pdev);
+
+	/* set pll to 50MHz and ssc */
+	gl9755_set_ssc(pdev, enable, 0xE, 0x51EC);
+	gl9755_set_pll(pdev, 0x1, 0x244, 0x3);
+}
+
 static void sdhci_gl9755_set_clock(struct sdhci_host *host, unsigned int clock)
 {
 	struct sdhci_pci_slot *slot = sdhci_priv(host);
@@ -514,15 +641,62 @@ static void sdhci_gl9755_set_clock(struct sdhci_host *host, unsigned int clock)
 	if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {
 		host->mmc->actual_clock = 205000000;
 		gl9755_set_ssc_pll_205mhz(pdev);
+	} else if (clock == 100000000) {
+		gl9755_set_ssc_pll_100mhz(pdev);
+	} else if (clock == 50000000) {
+		gl9755_set_ssc_pll_50mhz(pdev);
 	}
 
 	sdhci_enable_clk(host, clk);
 }
 
+static void gl9755_hw_setting(struct sdhci_pci_slot *slot)
+{
+	struct pci_dev *pdev = slot->chip->pdev;
+	u32 value;
+
+	gl9755_wt_on(pdev);
+
+	pci_read_config_dword(pdev, PCI_GLI_9755_PECONF, &value);
+	/*
+	 * Apple ARM64 platforms using these chips may have
+	 * inverted CD/WP detection.
+	 */
+	if (of_property_read_bool(pdev->dev.of_node, "cd-inverted"))
+		value |= PCI_GLI_9755_INVERT_CD;
+	if (of_property_read_bool(pdev->dev.of_node, "wp-inverted"))
+		value |= PCI_GLI_9755_INVERT_WP;
+	value &= ~PCI_GLI_9755_LFCLK;
+	value &= ~PCI_GLI_9755_DMACLK;
+	pci_write_config_dword(pdev, PCI_GLI_9755_PECONF, value);
+
+	/* enable short circuit protection */
+	pci_read_config_dword(pdev, PCI_GLI_9755_SerDes, &value);
+	value &= ~PCI_GLI_9755_SCP_DIS;
+	pci_write_config_dword(pdev, PCI_GLI_9755_SerDes, value);
+
+	pci_read_config_dword(pdev, PCI_GLI_9755_CFG2, &value);
+	value &= ~PCI_GLI_9755_CFG2_L1DLY;
+	/* set ASPM L1 entry delay to 7.9us */
+	value |= FIELD_PREP(PCI_GLI_9755_CFG2_L1DLY,
+			    GLI_9755_CFG2_L1DLY_VALUE);
+	pci_write_config_dword(pdev, PCI_GLI_9755_CFG2, value);
+
+	/* toggle PM state to allow GL9755 to enter ASPM L1.2 */
+	pci_read_config_dword(pdev, PCI_GLI_9755_PM_CTRL, &value);
+	value |= PCI_GLI_9755_PM_STATE;
+	pci_write_config_dword(pdev, PCI_GLI_9755_PM_CTRL, value);
+	value &= ~PCI_GLI_9755_PM_STATE;
+	pci_write_config_dword(pdev, PCI_GLI_9755_PM_CTRL, value);
+
+	gl9755_wt_off(pdev);
+}
+
 static int gli_probe_slot_gl9750(struct sdhci_pci_slot *slot)
 {
 	struct sdhci_host *host = slot->host;
 
+	gl9750_hw_setting(host);
 	gli_pcie_enable_msi(slot);
 	slot->host->mmc->caps2 |= MMC_CAP2_NO_SDIO;
 	sdhci_enable_v4_mode(host);
@@ -534,6 +708,7 @@ static int gli_probe_slot_gl9755(struct sdhci_pci_slot *slot)
 {
 	struct sdhci_host *host = slot->host;
 
+	gl9755_hw_setting(slot);
 	gli_pcie_enable_msi(slot);
 	slot->host->mmc->caps2 |= MMC_CAP2_NO_SDIO;
 	sdhci_enable_v4_mode(host);
@@ -769,12 +944,102 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
 	value |= GLI_9763E_SCR_AXI_REQ;
 	pci_write_config_dword(pdev, PCIE_GLI_9763E_SCR, value);
 
+	pci_read_config_dword(pdev, PCIE_GLI_9763E_MMC_CTRL, &value);
+	value &= ~GLI_9763E_HS400_SLOW;
+	pci_write_config_dword(pdev, PCIE_GLI_9763E_MMC_CTRL, value);
+
+	pci_read_config_dword(pdev, PCIE_GLI_9763E_CFG2, &value);
+	value &= ~GLI_9763E_CFG2_L1DLY;
+	/* set ASPM L1 entry delay to 21us */
+	value |= FIELD_PREP(GLI_9763E_CFG2_L1DLY, GLI_9763E_CFG2_L1DLY_MID);
+	pci_write_config_dword(pdev, PCIE_GLI_9763E_CFG2, value);
+
+	pci_read_config_dword(pdev, PCIE_GLI_9763E_CLKRXDLY, &value);
+	value &= ~GLI_9763E_HS400_RXDLY;
+	value |= FIELD_PREP(GLI_9763E_HS400_RXDLY, GLI_9763E_HS400_RXDLY_5);
+	pci_write_config_dword(pdev, PCIE_GLI_9763E_CLKRXDLY, value);
+
+	pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
+	value &= ~GLI_9763E_VHS_REV;
+	value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_R);
+	pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
+}
+
+#ifdef CONFIG_PM
+static void gl9763e_set_low_power_negotiation(struct sdhci_pci_slot *slot, bool enable)
+{
+	struct pci_dev *pdev = slot->chip->pdev;
+	u32 value;
+
+	pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
+	value &= ~GLI_9763E_VHS_REV;
+	value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_W);
+	pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
+
+	pci_read_config_dword(pdev, PCIE_GLI_9763E_CFG, &value);
+
+	if (enable)
+		value &= ~GLI_9763E_CFG_LPSN_DIS;
+	else
+		value |= GLI_9763E_CFG_LPSN_DIS;
+
+	pci_write_config_dword(pdev, PCIE_GLI_9763E_CFG, value);
+
 	pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
 	value &= ~GLI_9763E_VHS_REV;
 	value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_R);
 	pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
 }
 
+static int gl9763e_runtime_suspend(struct sdhci_pci_chip *chip)
+{
+	struct sdhci_pci_slot *slot = chip->slots[0];
+	struct sdhci_host *host = slot->host;
+	u16 clock;
+
+	/* Enable LPM negotiation to allow entering L1 state */
+	gl9763e_set_low_power_negotiation(slot, true);
+
+	clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
+	clock &= ~(SDHCI_CLOCK_PLL_EN | SDHCI_CLOCK_CARD_EN);
+	sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
+
+	return 0;
+}
+
+static int gl9763e_runtime_resume(struct sdhci_pci_chip *chip)
+{
+	struct sdhci_pci_slot *slot = chip->slots[0];
+	struct sdhci_host *host = slot->host;
+	u16 clock;
+
+	if (host->mmc->ios.power_mode != MMC_POWER_ON)
+		return 0;
+
+	clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
+
+	clock |= SDHCI_CLOCK_PLL_EN;
+	clock &= ~SDHCI_CLOCK_INT_STABLE;
+	sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
+
+	/* Wait max 150 ms */
+	if (read_poll_timeout(sdhci_readw, clock, (clock & SDHCI_CLOCK_INT_STABLE),
+			      1000, 150000, false, host, SDHCI_CLOCK_CONTROL)) {
+		pr_err("%s: PLL clock never stabilised.\n",
+		       mmc_hostname(host->mmc));
+		sdhci_dumpregs(host);
+	}
+
+	clock |= SDHCI_CLOCK_CARD_EN;
+	sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
+
+	/* Disable LPM negotiation to avoid entering L1 state. */
+	gl9763e_set_low_power_negotiation(slot, false);
+
+	return 0;
+}
+#endif
+
 static int gli_probe_slot_gl9763e(struct sdhci_pci_slot *slot)
 {
 	struct pci_dev *pdev = slot->chip->pdev;
@@ -792,7 +1057,8 @@ static int gli_probe_slot_gl9763e(struct sdhci_pci_slot *slot)
 
 	pci_read_config_dword(pdev, PCIE_GLI_9763E_MB, &value);
 	if (!(value & GLI_9763E_MB_CMDQ_OFF))
-		host->mmc->caps2 |= MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD;
+		if (value & GLI_9763E_MB_ERP_ON)
+			host->mmc->caps2 |= MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD;
 
 	gli_pcie_enable_msi(slot);
 	host->mmc_host_ops.hs400_enhanced_strobe =
@@ -803,7 +1069,28 @@ static int gli_probe_slot_gl9763e(struct sdhci_pci_slot *slot)
 	return 0;
 }
 
+#define REG_OFFSET_IN_BITS(reg) ((reg) << 3 & 0x18)
+
+static u16 sdhci_gli_readw(struct sdhci_host *host, int reg)
+{
+	u32 val = readl(host->ioaddr + (reg & ~3));
+	u16 word;
+
+	word = (val >> REG_OFFSET_IN_BITS(reg)) & 0xffff;
+	return word;
+}
+
+static u8 sdhci_gli_readb(struct sdhci_host *host, int reg)
+{
+	u32 val = readl(host->ioaddr + (reg & ~3));
+	u8 byte = (val >> REG_OFFSET_IN_BITS(reg)) & 0xff;
+
+	return byte;
+}
+
 static const struct sdhci_ops sdhci_gl9755_ops = {
+	.read_w			= sdhci_gli_readw,
+	.read_b			= sdhci_gli_readb,
 	.set_clock		= sdhci_gl9755_set_clock,
 	.enable_dma		= sdhci_pci_enable_dma,
 	.set_bus_width		= sdhci_set_bus_width,
@@ -823,6 +1110,8 @@ const struct sdhci_pci_fixes sdhci_gl9755 = {
 };
 
 static const struct sdhci_ops sdhci_gl9750_ops = {
+	.read_w			= sdhci_gli_readw,
+	.read_b			= sdhci_gli_readb,
 	.read_l                 = sdhci_gl9750_readl,
 	.set_clock		= sdhci_gl9750_set_clock,
 	.enable_dma		= sdhci_pci_enable_dma,
@@ -860,6 +1149,11 @@ const struct sdhci_pci_fixes sdhci_gl9763e = {
 #ifdef CONFIG_PM_SLEEP
 	.resume		= sdhci_cqhci_gli_resume,
 	.suspend	= sdhci_cqhci_gli_suspend,
+#endif
+#ifdef CONFIG_PM
+	.runtime_suspend = gl9763e_runtime_suspend,
+	.runtime_resume  = gl9763e_runtime_resume,
+	.allow_runtime_pm = true,
 #endif
 	.add_host       = gl9763e_add_host,
 };
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-o2micro.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-o2micro.c
index 94e3f72f6405..bca1d095b759 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-o2micro.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-o2micro.c
@@ -12,6 +12,7 @@
 #include <linux/mmc/mmc.h>
 #include <linux/delay.h>
 #include <linux/iopoll.h>
+#include <linux/bitfield.h>
 
 #include "sdhci.h"
 #include "sdhci-pci.h"
@@ -31,6 +32,7 @@
 #define O2_SD_CAPS		0xE0
 #define O2_SD_ADMA1		0xE2
 #define O2_SD_ADMA2		0xE7
+#define O2_SD_MISC_CTRL2	0xF0
 #define O2_SD_INF_MOD		0xF1
 #define O2_SD_MISC_CTRL4	0xFC
 #define O2_SD_MISC_CTRL		0x1C0
@@ -43,12 +45,16 @@
 #define O2_SD_CAP_REG0		0x334
 #define O2_SD_UHS1_CAP_SETTING	0x33C
 #define O2_SD_DELAY_CTRL	0x350
+#define O2_SD_OUTPUT_CLK_SOURCE_SWITCH	0x354
 #define O2_SD_UHS2_L1_CTRL	0x35C
 #define O2_SD_FUNC_REG3		0x3E0
 #define O2_SD_FUNC_REG4		0x3E4
 #define O2_SD_LED_ENABLE	BIT(6)
 #define O2_SD_FREG0_LEDOFF	BIT(13)
+#define O2_SD_SEL_DLL		BIT(16)
 #define O2_SD_FREG4_ENABLE_CLK_SET	BIT(22)
+#define O2_SD_PHASE_MASK	GENMASK(23, 20)
+#define O2_SD_FIX_PHASE		FIELD_PREP(O2_SD_PHASE_MASK, 0x9)
 
 #define O2_SD_VENDOR_SETTING	0x110
 #define O2_SD_VENDOR_SETTING2	0x1C8
@@ -147,6 +153,8 @@ static int sdhci_o2_get_cd(struct mmc_host *mmc)
 
 	if (!(sdhci_readw(host, O2_PLL_DLL_WDT_CONTROL1) & O2_PLL_LOCK_STATUS))
 		sdhci_o2_enable_internal_clock(host);
+	else
+		sdhci_o2_wait_card_detect_stable(host);
 
 	return !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
 }
@@ -301,16 +309,21 @@ static int sdhci_o2_dll_recovery(struct sdhci_host *host)
 static int sdhci_o2_execute_tuning(struct mmc_host *mmc, u32 opcode)
 {
 	struct sdhci_host *host = mmc_priv(mmc);
+	struct sdhci_pci_slot *slot = sdhci_priv(host);
+	struct sdhci_pci_chip *chip = slot->chip;
 	int current_bus_width = 0;
 	u32 scratch32 = 0;
 	u16 scratch = 0;
+	u8  scratch_8 = 0;
+	u32 reg_val;
 
 	/*
-	 * This handler only implements the eMMC tuning that is specific to
+	 * This handler implements the hardware tuning that is specific to
 	 * this controller.  Fall back to the standard method for other TIMING.
 	 */
 	if ((host->timing != MMC_TIMING_MMC_HS200) &&
-		(host->timing != MMC_TIMING_UHS_SDR104))
+		(host->timing != MMC_TIMING_UHS_SDR104) &&
+		(host->timing != MMC_TIMING_UHS_SDR50))
 		return sdhci_execute_tuning(mmc, opcode);
 
 	if (WARN_ON((opcode != MMC_SEND_TUNING_BLOCK_HS200) &&
@@ -322,6 +335,32 @@ static int sdhci_o2_execute_tuning(struct mmc_host *mmc, u32 opcode)
 	scratch |= O2_SD_PWR_FORCE_L0;
 	sdhci_writew(host, scratch, O2_SD_MISC_CTRL);
 
+	/* Stop clk */
+	reg_val = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
+	reg_val &= ~SDHCI_CLOCK_CARD_EN;
+	sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL);
+
+	/* UnLock WP */
+	pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);
+	scratch_8 &= 0x7f;
+	pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
+
+	/* Set pcr 0x354[16] to choose dll clock, and set the default phase */
+	pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &reg_val);
+	reg_val &= ~(O2_SD_SEL_DLL | O2_SD_PHASE_MASK);
+	reg_val |= (O2_SD_SEL_DLL | O2_SD_FIX_PHASE);
+	pci_write_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, reg_val);
+
+	/* Lock WP */
+	pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);
+	scratch_8 |= 0x80;
+	pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
+
+	/* Start clk */
+	reg_val = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
+	reg_val |= SDHCI_CLOCK_CARD_EN;
+	sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL);
+
 	/* wait DLL lock, timeout value 5ms */
 	if (readx_poll_timeout(sdhci_o2_pll_dll_wdt_control, host,
 		scratch32, (scratch32 & O2_DLL_LOCK_STATUS), 1, 5000))
@@ -489,7 +528,7 @@ static void sdhci_pci_o2_enable_msi(struct sdhci_pci_chip *chip,
 
 	ret = pci_find_capability(chip->pdev, PCI_CAP_ID_MSI);
 	if (!ret) {
-		pr_info("%s: unsupport msi, use INTx irq\n",
+		pr_info("%s: unsupported MSI, use INTx irq\n",
 			mmc_hostname(host->mmc));
 		return;
 	}
@@ -533,23 +572,32 @@ static void sdhci_pci_o2_set_clock(struct sdhci_host *host, unsigned int clock)
 	if (clock == 0)
 		return;
 
-	if ((host->timing == MMC_TIMING_UHS_SDR104) && (clock == 200000000)) {
-		pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
-
-		scratch &= 0x7f;
-		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
+	/* UnLock WP */
+	pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
+	scratch &= 0x7f;
+	pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
 
+	if ((host->timing == MMC_TIMING_UHS_SDR104) && (clock == 200000000)) {
 		pci_read_config_dword(chip->pdev, O2_SD_PLL_SETTING, &scratch_32);
 
 		if ((scratch_32 & 0xFFFF0000) != 0x2c280000)
 			o2_pci_set_baseclk(chip, 0x2c280000);
+	} else {
+		pci_read_config_dword(chip->pdev, O2_SD_PLL_SETTING, &scratch_32);
 
-		pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
-
-		scratch |= 0x80;
-		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
+		if ((scratch_32 & 0xFFFF0000) != 0x25100000)
+			o2_pci_set_baseclk(chip, 0x25100000);
 	}
 
+	pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &scratch_32);
+	scratch_32 &= ~(O2_SD_SEL_DLL | O2_SD_PHASE_MASK);
+	pci_write_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, scratch_32);
+
+	/* Lock WP */
+	pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
+	scratch |= 0x80;
+	pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
+
 	clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);
 	sdhci_o2_enable_clk(host, clk);
 }
@@ -585,6 +633,8 @@ static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot)
 		if (reg & 0x1)
 			host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
 
+		host->quirks2 |= SDHCI_QUIRK2_BROKEN_DDR50;
+
 		sdhci_pci_o2_enable_msi(chip, host);
 
 		if (chip->pdev->device == PCI_DEVICE_ID_O2_SEABIRD0) {
@@ -706,6 +756,8 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
 			ret = pci_read_config_dword(chip->pdev,
 						    O2_SD_FUNC_REG0,
 						    &scratch_32);
+			if (ret)
+				return ret;
 			scratch_32 = ((scratch_32 & 0xFF000000) >> 24);
 
 			/* Check Whether subId is 0x11 or 0x12 */
@@ -716,6 +768,8 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
 				ret = pci_read_config_dword(chip->pdev,
 							    O2_SD_FUNC_REG4,
 							    &scratch_32);
+				if (ret)
+					return ret;
 
 				/* Enable Base Clk setting change */
 				scratch_32 |= O2_SD_FREG4_ENABLE_CLK_SET;
@@ -795,6 +849,8 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
 
 		ret = pci_read_config_dword(chip->pdev,
 					    O2_SD_PLL_SETTING, &scratch_32);
+		if (ret)
+			return ret;
 
 		if ((scratch_32 & 0xff000000) == 0x01000000) {
 			scratch_32 &= 0x0000FFFF;
@@ -812,6 +868,8 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
 			ret = pci_read_config_dword(chip->pdev,
 						    O2_SD_FUNC_REG4,
 						    &scratch_32);
+			if (ret)
+				return ret;
 			scratch_32 |= (1 << 22);
 			pci_write_config_dword(chip->pdev,
 					       O2_SD_FUNC_REG4, scratch_32);
@@ -820,6 +878,12 @@ static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
 		/* Set Tuning Windows to 5 */
 		pci_write_config_byte(chip->pdev,
 				O2_SD_TUNING_CTRL, 0x55);
+		//Adjust 1st and 2nd CD debounce time
+		pci_read_config_dword(chip->pdev, O2_SD_MISC_CTRL2, &scratch_32);
+		scratch_32 &= 0xFFE7FFFF;
+		scratch_32 |= 0x00180000;
+		pci_write_config_dword(chip->pdev, O2_SD_MISC_CTRL2, scratch_32);
+		pci_write_config_dword(chip->pdev, O2_SD_DETECT_SETTING, 1);
 		/* Lock WP */
 		ret = pci_read_config_byte(chip->pdev,
 					   O2_SD_LOCK_WP, &scratch);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci.h
index 8f90c4163bb5..3661a224fb04 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci.h
@@ -59,6 +59,7 @@
 #define PCI_DEVICE_ID_INTEL_JSL_SD	0x4df8
 #define PCI_DEVICE_ID_INTEL_LKF_EMMC	0x98c4
 #define PCI_DEVICE_ID_INTEL_LKF_SD	0x98f8
+#define PCI_DEVICE_ID_INTEL_ADL_EMMC	0x54c4
 
 #define PCI_DEVICE_ID_SYSKONNECT_8000	0x8000
 #define PCI_DEVICE_ID_VIA_95D0		0x95d0
@@ -156,11 +157,6 @@ struct sdhci_pci_fixes {
 struct sdhci_pci_slot {
 	struct sdhci_pci_chip	*chip;
 	struct sdhci_host	*host;
-	struct sdhci_pci_data	*data;
-
-	int			rst_n_gpio;
-	int			cd_gpio;
-	int			cd_irq;
 
 	int			cd_idx;
 	bool			cd_override_level;
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci.h
index 0770c036e2ff..5ce7cdcc192f 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci.h
@@ -201,8 +201,10 @@
 
 #define SDHCI_CAPABILITIES	0x40
 #define  SDHCI_TIMEOUT_CLK_MASK		GENMASK(5, 0)
+#define  SDHCI_TIMEOUT_CLK_SHIFT 0
 #define  SDHCI_TIMEOUT_CLK_UNIT	0x00000080
 #define  SDHCI_CLOCK_BASE_MASK		GENMASK(13, 8)
+#define  SDHCI_CLOCK_BASE_SHIFT	8
 #define  SDHCI_CLOCK_V3_BASE_MASK	GENMASK(15, 8)
 #define  SDHCI_MAX_BLOCK_MASK	0x00030000
 #define  SDHCI_MAX_BLOCK_SHIFT  16
@@ -253,6 +255,7 @@
 
 /* 60-FB reserved */
 
+#define SDHCI_PRESET_FOR_HIGH_SPEED	0x64
 #define SDHCI_PRESET_FOR_SDR12 0x66
 #define SDHCI_PRESET_FOR_SDR25 0x68
 #define SDHCI_PRESET_FOR_SDR50 0x6A
@@ -337,7 +340,8 @@ struct sdhci_adma2_64_desc {
 
 /*
  * Maximum segments assuming a 512KiB maximum requisition size and a minimum
- * 4KiB page size.
+ * 4KiB page size. Note this also allows enough for multiple descriptors in
+ * case of PAGE_SIZE >= 64KiB.
  */
 #define SDHCI_MAX_SEGS		128
 
@@ -352,6 +356,9 @@ struct sdhci_adma2_64_desc {
  */
 #define MMC_CMD_TRANSFER_TIME	(10 * NSEC_PER_MSEC) /* max 10 ms */
 
+#define sdhci_err_stats_inc(host, err_name) \
+	mmc_debugfs_err_stats_inc((host)->mmc, MMC_ERR_##err_name)
+
 enum sdhci_cookie {
 	COOKIE_UNMAPPED,
 	COOKIE_PRE_MAPPED,	/* mapped by sdhci_pre_req() */
@@ -372,8 +379,6 @@ struct sdhci_host {
 #define SDHCI_QUIRK_NO_CARD_NO_RESET			(1<<2)
 /* Controller doesn't like clearing the power reg before a change */
 #define SDHCI_QUIRK_SINGLE_POWER_WRITE			(1<<3)
-/* Controller has flaky internal state so reset it on each ios change */
-#define SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS		(1<<4)
 /* Controller has an unusable DMA engine */
 #define SDHCI_QUIRK_BROKEN_DMA				(1<<5)
 /* Controller has an unusable ADMA engine */
@@ -473,6 +478,8 @@ struct sdhci_host {
  * block count.
  */
 #define SDHCI_QUIRK2_USE_32BIT_BLK_CNT			(1<<18)
+/* Issue CMD and DATA reset together */
+#define SDHCI_QUIRK2_ISSUE_CMD_DAT_RESET_TOGETHER	(1<<19)
 
 	int irq;		/* Device IRQ */
 	void __iomem *ioaddr;	/* Mapped address */
@@ -514,10 +521,13 @@ struct sdhci_host {
 
 	unsigned int max_clk;	/* Max possible freq (MHz) */
 	unsigned int timeout_clk;	/* Timeout freq (KHz) */
+	u8 max_timeout_count;	/* Vendor specific max timeout count */
 	unsigned int clk_mul;	/* Clock Muliplier value */
 
 	unsigned int clock;	/* Current clock (MHz) */
 	u8 pwr;			/* Current voltage */
+	u8 drv_type;		/* Current UHS-I driver type */
+	bool reinit_uhs;	/* Force UHS-related re-initialization */
 
 	bool runtime_suspended;	/* Host is runtime suspended */
 	bool bus_on;		/* Bus power prevents runtime suspend */
@@ -539,6 +549,7 @@ struct sdhci_host {
 	unsigned int blocks;	/* remaining PIO blocks */
 
 	int sg_count;		/* Mapped sg entries */
+	int max_adma;		/* Max. length in ADMA descriptor */
 
 	void *adma_table;	/* ADMA descriptor table */
 	void *align_buffer;	/* Bounce buffer */
@@ -746,7 +757,6 @@ static inline void *sdhci_priv(struct sdhci_host *host)
 	return host->private;
 }
 
-void sdhci_card_detect(struct sdhci_host *host);
 void __sdhci_read_caps(struct sdhci_host *host, const u16 *ver,
 		       const u32 *caps, const u32 *caps1);
 int sdhci_setup_host(struct sdhci_host *host);
@@ -771,6 +781,7 @@ void sdhci_set_power_and_bus_voltage(struct sdhci_host *host,
 				     unsigned short vdd);
 void sdhci_set_power_noreg(struct sdhci_host *host, unsigned char mode,
 			   unsigned short vdd);
+int sdhci_get_cd_nogpio(struct mmc_host *mmc);
 void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq);
 int sdhci_request_atomic(struct mmc_host *mmc, struct mmc_request *mrq);
 void sdhci_set_bus_width(struct sdhci_host *host, int width);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_eeprom_93xx46.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_eeprom_93xx46.c
index 2ba7e7912ed5..0f65d26774b3 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_eeprom_93xx46.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_eeprom_93xx46.c
@@ -528,7 +528,7 @@ static int eeprom_93xx46_probe(struct spi_device *spi)
 	return err;
 }
 
-static int eeprom_93xx46_remove(struct spi_device *spi)
+static void eeprom_93xx46_remove(struct spi_device *spi)
 {
 	struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
 
@@ -538,7 +538,7 @@ static int eeprom_93xx46_remove(struct spi_device *spi)
 		device_remove_file(&spi->dev, &dev_attr_erase);
 
 	kfree(edev);
-	return 0;
+	return;
 }
 
 static struct spi_driver wb_eeprom_93xx46_driver = {
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_i2c_bus_drv.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_i2c_bus_drv.c
index 3932cb26cd77..22cd9e16de08 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_i2c_bus_drv.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_i2c_bus_drv.c
@@ -20,6 +20,7 @@
 
 #include <linux/fs.h>
 #include <linux/uaccess.h>
+#include <linux/uio.h>
 
 #define DRV_NAME                      "wb-fpga-i2c"
 #define DRV_VERSION                   "1.0"
@@ -77,6 +78,12 @@ static int fpga_file_read(const char *path, uint32_t pos, uint8_t *val, size_t s
     struct file *filp;
     loff_t tmp_pos;
 
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
     filp = filp_open(path, O_RDONLY, 0);
     if (IS_ERR(filp)) {
         FPGA_I2C_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
@@ -85,9 +92,10 @@ static int fpga_file_read(const char *path, uint32_t pos, uint8_t *val, size_t s
     }
 
     tmp_pos = (loff_t)pos;
-    ret = kernel_read(filp, val, size, &tmp_pos);
+    iov_iter_kvec(&iter, ITER_DEST, &iov, 1, iov.iov_len);
+    ret = vfs_iter_read(filp, &iter, &tmp_pos, 0);
     if (ret < 0) {
-        FPGA_I2C_ERROR("kernel_read failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        FPGA_I2C_ERROR("vfs_iter_read failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
         goto exit;
     }
 
@@ -109,6 +117,12 @@ static int fpga_file_write(const char *path, uint32_t pos, uint8_t *val, size_t
     struct file *filp;
     loff_t tmp_pos;
 
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
     filp = filp_open(path, O_RDWR, 777);
     if (IS_ERR(filp)) {
         FPGA_I2C_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
@@ -117,9 +131,10 @@ static int fpga_file_write(const char *path, uint32_t pos, uint8_t *val, size_t
     }
 
     tmp_pos = (loff_t)pos;
-    ret = kernel_write(filp, val, size, &tmp_pos);
+    iov_iter_kvec(&iter, ITER_SOURCE, &iov, 1, iov.iov_len);
+    ret = vfs_iter_write(filp, &iter, &tmp_pos, 0);
     if (ret < 0) {
-        FPGA_I2C_ERROR("kernel_write failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        FPGA_I2C_ERROR("vfs_iter_write failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
         goto exit;
     }
     vfs_fsync(filp, 1);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pca954x_drv.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pca954x_drv.c
index 8fd9e4f0f1b4..25f2d60b9334 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pca954x_drv.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pca954x_drv.c
@@ -10,6 +10,7 @@
 #include <linux/of.h>
 #include <linux/fs.h>
 #include <linux/uaccess.h>
+#include <linux/uio.h>
 #include "fpga_i2c.h"
 
 extern int i2c_device_func_write(const char *path, uint32_t pos, uint8_t *val, size_t size);
@@ -133,6 +134,12 @@ static int fpga_file_write(const char *path, int pos, unsigned char *val, size_t
     struct file *filp;
     loff_t tmp_pos;
 
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
     filp = filp_open(path, O_RDWR, 777);
     if (IS_ERR(filp)) {
         FPGA_PCA954X_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
@@ -141,9 +148,10 @@ static int fpga_file_write(const char *path, int pos, unsigned char *val, size_t
     }
 
     tmp_pos = (loff_t)pos;
-    ret = kernel_write(filp, val, size, &tmp_pos);
+    iov_iter_kvec(&iter, ITER_SOURCE, &iov, 1, iov.iov_len);
+    ret = vfs_iter_write(filp, &iter, &tmp_pos, 0);
     if (ret < 0) {
-        FPGA_PCA954X_ERROR("kernel_write failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        FPGA_PCA954X_ERROR("vfs_iter_write failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, pos, size, ret);
         goto exit;
     }
 
@@ -481,7 +489,7 @@ static int fpga_i2c_pca954x_probe(struct i2c_client *client, const struct i2c_de
     return ret;
 }
 
-static int fpga_i2c_pca954x_remove(struct i2c_client *client)
+static void fpga_i2c_pca954x_remove(struct i2c_client *client)
 {
 #if LINUX_VERSION_CODE <= KERNEL_VERSION(4,6,7)
     struct pca954x *data = i2c_get_clientdata(client);
@@ -501,7 +509,7 @@ static int fpga_i2c_pca954x_remove(struct i2c_client *client)
     i2c_mux_del_adapters(muxc);
 #endif
 
-    return 0;
+    return;
 }
 
 static struct i2c_driver fpga_i2c_pca954x_driver = {
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c
index 4abdccabeda9..59cee0b1e1c0 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_dev.c
@@ -27,6 +27,9 @@
 #define WIDTH_2Byte          (2)
 #define WIDTH_4Byte          (4)
 
+#define KERNEL_SPASE         (0)
+#define USER_SPASE           (1)
+
 static int g_i2c_dev_debug = 0;
 static int g_i2c_dev_error = 0;
 
@@ -433,7 +436,7 @@ static int device_write(struct i2c_dev_info *i2c_dev, uint32_t offset, uint8_t *
     return count;
 }
 
-static ssize_t i2c_dev_read(struct file *file, char __user *buf, size_t count, loff_t *offset)
+static ssize_t i2c_dev_read(struct file *file, char __user *buf, size_t count, loff_t *offset, int flag)
 {
     u8 val[FPGA_MAX_LEN];
     int ret, read_len;
@@ -463,7 +466,8 @@ static ssize_t i2c_dev_read(struct file *file, char __user *buf, size_t count, l
         return read_len;
     }
 
-    if (access_ok(buf, read_len)) {
+    /* check flag is user spase or kernel spase */
+    if (flag == USER_SPASE) {
         I2C_DEV_DEBUG_DMESG("user space read, buf: %p, offset: %lld, read count %lu.\n",
             buf, *offset, count);
         if (copy_to_user(buf, val, read_len)) {
@@ -481,17 +485,27 @@ static ssize_t i2c_dev_read(struct file *file, char __user *buf, size_t count, l
     return ret;
 }
 
+static ssize_t i2c_dev_read_user(struct file *file, char __user *buf, size_t count, loff_t *offset)
+{
+    int ret;
+
+    I2C_DEV_DEBUG_DMESG("i2c_dev_read_user, file: %p, count: %lu, offset: %lld\n",
+        file, count, *offset);
+    ret = i2c_dev_read(file, buf, count, offset, USER_SPASE);
+    return ret;
+}
+
 static ssize_t i2c_dev_read_iter(struct kiocb *iocb, struct iov_iter *to)
 {
     int ret;
 
     I2C_DEV_DEBUG_DMESG("i2c_dev_read_iter, file: %p, count: %lu, offset: %lld\n",
         iocb->ki_filp, to->count, iocb->ki_pos);
-    ret = i2c_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos);
+    ret = i2c_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos, KERNEL_SPASE);
     return ret;
 }
 
-static ssize_t i2c_dev_write(struct file *file, const char __user *buf, size_t count, loff_t *offset)
+static ssize_t i2c_dev_write(struct file *file, const char __user *buf, size_t count, loff_t *offset, int flag)
 {
     u8 val[FPGA_MAX_LEN];
     int write_len;
@@ -514,7 +528,9 @@ static ssize_t i2c_dev_write(struct file *file, const char __user *buf, size_t c
     }
 
     mem_clear(val, sizeof(val));
-    if (access_ok(buf, count)) {
+
+    /* check flag is user spase or kernel spase */
+    if (flag == USER_SPASE) {
         I2C_DEV_DEBUG_DMESG("user space write, buf: %p, offset: %lld, write count %lu.\n",
             buf, *offset, count);
         if (copy_from_user(val, buf, count)) {
@@ -538,13 +554,23 @@ static ssize_t i2c_dev_write(struct file *file, const char __user *buf, size_t c
     return write_len;
 }
 
+static ssize_t i2c_dev_write_user(struct file *file, const char __user *buf, size_t count, loff_t *offset)
+{
+    int ret;
+
+    I2C_DEV_DEBUG_DMESG("i2c_dev_write_user, file: %p, count: %lu, offset: %lld\n",
+        file, count, *offset);
+    ret = i2c_dev_write(file, buf, count, offset, USER_SPASE);
+    return ret;
+}
+
 static ssize_t i2c_dev_write_iter(struct kiocb *iocb, struct iov_iter *from)
 {
     int ret;
 
     I2C_DEV_DEBUG_DMESG("i2c_dev_write_iter, file: %p, count: %lu, offset: %lld\n",
         iocb->ki_filp, from->count, iocb->ki_pos);
-    ret = i2c_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos);
+    ret = i2c_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos, KERNEL_SPASE);
     return ret;
 }
 
@@ -596,6 +622,8 @@ static loff_t i2c_dev_llseek(struct file *file, loff_t offset, int origin)
 static const struct file_operations i2c_dev_fops = {
     .owner      = THIS_MODULE,
     .llseek     = i2c_dev_llseek,
+    .read       = i2c_dev_read_user,
+    .write      = i2c_dev_write_user,
     .read_iter     = i2c_dev_read_iter,
     .write_iter    = i2c_dev_write_iter,
     .unlocked_ioctl = i2c_dev_ioctl,
@@ -775,7 +803,7 @@ static int i2c_dev_probe(struct i2c_client *client, const struct i2c_device_id *
     return 0;
 }
 
-static int i2c_dev_remove(struct i2c_client *client)
+static void i2c_dev_remove(struct i2c_client *client)
 {
     int i;
     for (i = 0; i < MAX_I2C_DEV_NUM; i++) {
@@ -784,7 +812,7 @@ static int i2c_dev_remove(struct i2c_client *client)
             i2c_dev_arry[i] = NULL;
         }
     }
-    return 0;
+    return;
 }
 
 static const struct i2c_device_id i2c_dev_id[] = {
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c
index 1f69d96bad0b..df786c1a9452 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c
@@ -27,6 +27,7 @@
 #include <linux/pci.h>
 #include <linux/fs.h>
 #include <linux/uaccess.h>
+#include <linux/uio.h>
 
 #include "wb_i2c_ocores.h"
 
@@ -193,6 +194,12 @@ static int ocores_i2c_file_read(const char *path, uint32_t pos, uint8_t *val, si
     struct file *filp;
     loff_t tmp_pos;
 
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
     filp = filp_open(path, O_RDONLY, 0);
     if (IS_ERR(filp)) {
         OCORES_I2C_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
@@ -201,14 +208,14 @@ static int ocores_i2c_file_read(const char *path, uint32_t pos, uint8_t *val, si
     }
 
     tmp_pos = (loff_t)pos;
-    ret = kernel_read(filp, val, size, &tmp_pos);
+    iov_iter_kvec(&iter, ITER_DEST, &iov, 1, iov.iov_len);
+    ret = vfs_iter_read(filp, &iter, &tmp_pos, 0);
     if (ret < 0) {
-        OCORES_I2C_ERROR("kernel_read failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        OCORES_I2C_ERROR("vfs_iter_read failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, pos, size, ret);
         goto exit;
     }
 
     filp_close(filp, NULL);
-
     return ret;
 
 exit:
@@ -226,6 +233,12 @@ static int ocores_i2c_file_write(const char *path, uint32_t pos, uint8_t *val, s
     struct file *filp;
     loff_t tmp_pos;
 
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
     filp = filp_open(path, O_RDWR, 777);
     if (IS_ERR(filp)) {
         OCORES_I2C_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
@@ -234,15 +247,15 @@ static int ocores_i2c_file_write(const char *path, uint32_t pos, uint8_t *val, s
     }
 
     tmp_pos = (loff_t)pos;
-    ret = kernel_write(filp, val, size, &tmp_pos);
+    iov_iter_kvec(&iter, ITER_SOURCE, &iov, 1, iov.iov_len);
+    ret = vfs_iter_write(filp, &iter, &tmp_pos, 0);
     if (ret < 0) {
-        OCORES_I2C_ERROR("kernel_write failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        OCORES_I2C_ERROR("vfs_iter_write failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, pos, size, ret);
         goto exit;
     }
 
     vfs_fsync(filp, 1);
     filp_close(filp, NULL);
-
     return ret;
 
 exit:
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.c
index b1f5294b85ab..03571871014b 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_io_dev.c
@@ -27,6 +27,9 @@
 #define IO_INDIRECT_OP_WRITE               (0x2)
 #define IO_INDIRECT_OP_READ                (0X3)
 
+#define KERNEL_SPASE         (0)
+#define USER_SPASE           (1)
+
 static int g_io_dev_debug = 0;
 static int g_io_dev_error = 0;
 
@@ -138,7 +141,7 @@ static int io_dev_read_tmp(wb_io_dev_t *wb_io_dev, uint32_t offset, uint8_t *buf
     return count;
 }
 
-static ssize_t io_dev_read(struct file *file, char __user *buf, size_t count, loff_t *offset)
+static ssize_t io_dev_read(struct file *file, char __user *buf, size_t count, loff_t *offset, int flag)
 {
     wb_io_dev_t *wb_io_dev;
     int ret, read_len;
@@ -167,7 +170,8 @@ static ssize_t io_dev_read(struct file *file, char __user *buf, size_t count, lo
         return read_len;
     }
 
-    if (access_ok(buf, read_len)) {
+    /* check flag is user spase or kernel spase */
+    if (flag == USER_SPASE) {
         IO_DEV_DEBUG_VERBOSE("user space read, buf: %p, offset: %lld, read count %lu.\n",
             buf, *offset, count);
         if (copy_to_user(buf, buf_tmp, read_len)) {
@@ -184,13 +188,23 @@ static ssize_t io_dev_read(struct file *file, char __user *buf, size_t count, lo
     return ret;
 }
 
+static ssize_t io_dev_read_user(struct file *file, char __user *buf, size_t count, loff_t *offset)
+{
+    int ret;
+
+    IO_DEV_DEBUG_VERBOSE("io_dev_read_user, file: %p, count: %lu, offset: %lld\n",
+        file, count, *offset);
+    ret = io_dev_read(file, buf, count, offset, USER_SPASE);
+    return ret;
+}
+
 static ssize_t io_dev_read_iter(struct kiocb *iocb, struct iov_iter *to)
 {
     int ret;
 
     IO_DEV_DEBUG_VERBOSE("io_dev_read_iter, file: %p, count: %lu, offset: %lld\n",
         iocb->ki_filp, to->count, iocb->ki_pos);
-    ret = io_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos);
+    ret = io_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos, KERNEL_SPASE);
     return ret;
 }
 
@@ -245,7 +259,7 @@ static int io_dev_write_tmp(wb_io_dev_t *wb_io_dev, uint32_t offset, uint8_t *bu
     return count;
 }
 
-static ssize_t io_dev_write(struct file *file, const char __user *buf, size_t count, loff_t *offset)
+static ssize_t io_dev_write(struct file *file, const char __user *buf, size_t count, loff_t *offset, int flag)
 {
     wb_io_dev_t *wb_io_dev;
     int write_len;
@@ -268,7 +282,8 @@ static ssize_t io_dev_write(struct file *file, const char __user *buf, size_t co
     }
 
     mem_clear(buf_tmp, sizeof(buf_tmp));
-    if (access_ok(buf, count)) {
+    /* check flag is user spase or kernel spase */
+    if (flag == USER_SPASE) {
         IO_DEV_DEBUG_VERBOSE("user space write, buf: %p, offset: %lld, write count %lu.\n",
             buf, *offset, count);
         if (copy_from_user(buf_tmp, buf, count)) {
@@ -291,13 +306,23 @@ static ssize_t io_dev_write(struct file *file, const char __user *buf, size_t co
     return write_len;
 }
 
+static ssize_t io_dev_write_user(struct file *file, const char __user *buf, size_t count, loff_t *offset)
+{
+    int ret;
+
+    IO_DEV_DEBUG_VERBOSE("io_dev_write_user, file: %p, count: %lu, offset: %lld\n",
+        file, count, *offset);
+    ret = io_dev_write(file, buf, count, offset, USER_SPASE);
+    return ret;
+}
+
 static ssize_t io_dev_write_iter(struct kiocb *iocb, struct iov_iter *from)
 {
     int ret;
 
     IO_DEV_DEBUG_VERBOSE("io_dev_write_iter, file: %p, count: %lu, offset: %lld\n",
         iocb->ki_filp, from->count, iocb->ki_pos);
-    ret = io_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos);
+    ret = io_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos, KERNEL_SPASE);
     return ret;
 }
 
@@ -354,6 +379,8 @@ static long io_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
 static const struct file_operations io_dev_fops = {
     .owner      = THIS_MODULE,
     .llseek     = io_dev_llseek,
+    .read       = io_dev_read_user,
+    .write      = io_dev_write_user,
     .read_iter  = io_dev_read_iter,
     .write_iter = io_dev_write_iter,
     .unlocked_ioctl = io_dev_ioctl,
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c
index d72e91ace060..a94ae020a4b7 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mac_bsc.c
@@ -27,6 +27,7 @@
 #include <linux/err.h>
 #include <linux/mutex.h>
 #include <linux/string.h>
+#include <linux/delay.h>
 
 #define mem_clear(data, size) memset((data), 0, (size))
 
@@ -39,6 +40,9 @@
 #define MAC_BSC_MAX_READ_REG_STEP (6)
 #define MAC_BSC_MAX_SETUP_NUM (1)
 
+#define MAC_BSC_MAX_RETRY (3)
+#define MAC_BSC_RETRY_SLEEP_TIME   (10000)   /* 10ms */
+
 static int g_wb_mac_bsc_debug = 0;
 static int g_wb_mac_bsc_error = 0;
 
@@ -416,25 +420,43 @@ static int bsc_i2c_write(struct i2c_client *client, uint32_t reg_addr, uint32_t
     return 0;
 }
 
-static int handle_operation(struct i2c_client *client, i2c_op_t *operation)
+static int handle_operation_write(struct i2c_client *client, i2c_op_t *operation)
 {
     int ret;
     uint32_t rd_back_val;
 
+    ret = bsc_i2c_write(client, operation->reg_addr, operation->reg_val);
+    WB_MAC_BSC_DEBUG("bsc_i2c_write reg_addr: 0x%x, set val: 0x%x, ret: %d\n",
+        operation->reg_addr, operation->reg_val, ret);
+    if (operation->read_back) {
+        ret = bsc_i2c_read(client, operation->reg_addr, &rd_back_val);
+        if (rd_back_val != operation->reg_val) {
+            WB_MAC_BSC_ERROR("bsc_i2c_write failed, reg_addr: 0x%x, set val: 0x%x, read back valu: 0x%x\n",
+                operation->reg_addr, operation->reg_val, rd_back_val);
+            return -1;
+        }
+         WB_MAC_BSC_DEBUG("bsc_i2c_write success, reg_addr: 0x%x, set val: 0x%x, read_back val: 0x%x\n",
+             operation->reg_addr, operation->reg_val, rd_back_val);
+    }
+    return 0;
+}
+
+static int handle_operation(struct i2c_client *client, i2c_op_t *operation)
+{
+    int ret, i;
+
     if (operation->op == I2C_WRITE) {
-        ret = bsc_i2c_write(client, operation->reg_addr, operation->reg_val);
-        WB_MAC_BSC_DEBUG("bsc_i2c_write reg_addr: 0x%x, set val: 0x%x, ret: %d\n",
-            operation->reg_addr, operation->reg_val, ret);
-        if (operation->read_back) {
-            ret = bsc_i2c_read(client, operation->reg_addr, &rd_back_val);
-            if (rd_back_val != operation->reg_val) {
-                WB_MAC_BSC_ERROR("bsc_i2c_write failed, reg_addr: 0x%x, set val: 0x%x, read back valu: 0x%x\n",
-                    operation->reg_addr, operation->reg_val, rd_back_val);
-                return -1;
+        for (i = 0; i < MAC_BSC_MAX_RETRY; i++) {
+            ret = handle_operation_write(client, operation);
+            if (ret == 0) {
+                WB_MAC_BSC_DEBUG("handle_operation_write success, retry: %d\n", i);
+                return 0;
+            }
+            if ((i + 1) < MAC_BSC_MAX_RETRY) {
+                usleep_range(MAC_BSC_RETRY_SLEEP_TIME, MAC_BSC_RETRY_SLEEP_TIME + 1);
             }
-             WB_MAC_BSC_DEBUG("bsc_i2c_write success, reg_addr: 0x%x, set val: 0x%x, read_back val: 0x%x\n",
-                 operation->reg_addr, operation->reg_val, rd_back_val);
         }
+        WB_MAC_BSC_DEBUG("handle_operation_write retry: %d failed, ret: %d, ignore it\n", i, ret);
         return 0;
     }
 
@@ -811,12 +833,12 @@ static int mac_probe(struct i2c_client *client, const struct i2c_device_id *id)
     return 0;
 }
 
-static int mac_remove(struct i2c_client *client)
+static void mac_remove(struct i2c_client *client)
 {
     struct mac_data *data = i2c_get_clientdata(client);
 
     hwmon_device_unregister(data->hwmon_dev);
-    return 0;
+    return;
 }
 
 static const struct i2c_device_id mac_id_table[] = {
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_optoe.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_optoe.c
index c09162368ad0..9a55fcdec97e 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_optoe.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_optoe.c
@@ -792,7 +792,7 @@ static ssize_t optoe_bin_write(struct file *filp, struct kobject *kobj,
 	return optoe_read_write(optoe, buf, off, count, OPTOE_WRITE_OP);
 }
 
-static int optoe_remove(struct i2c_client *client)
+static void optoe_remove(struct i2c_client *client)
 {
 	struct optoe_data *optoe;
 	int i;
@@ -810,7 +810,7 @@ static int optoe_remove(struct i2c_client *client)
 
 	kfree(optoe->writebuf);
 	kfree(optoe);
-	return 0;
+	return;
 }
 
 static ssize_t show_dev_class(struct device *dev,
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c
index 757c100e4738..cd62b7d7ee40 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c
@@ -25,6 +25,9 @@
 #define PCIE_BUS_WIDTH_2         (2)
 #define PCIE_BUS_WIDTH_4         (4)
 
+#define KERNEL_SPASE         (0)
+#define USER_SPASE           (1)
+
 static int g_pcie_dev_debug = 0;
 static int g_pcie_dev_error = 0;
 
@@ -216,7 +219,7 @@ static int pci_dev_read_tmp(wb_pci_dev_t *wb_pci_dev, uint32_t offset, uint8_t *
     return count;
 }
 
-static ssize_t pci_dev_read(struct file *file, char __user *buf, size_t count, loff_t *offset)
+static ssize_t pci_dev_read(struct file *file, char __user *buf, size_t count, loff_t *offset, int flag)
 {
     wb_pci_dev_t *wb_pci_dev;
     int ret, read_len;
@@ -244,7 +247,8 @@ static ssize_t pci_dev_read(struct file *file, char __user *buf, size_t count, l
         PCIE_DEV_DEBUG_ERROR("pci_dev_read_tmp failed, ret:%d.\n", read_len);
         return read_len;
     }
-    if (access_ok(buf, read_len)) {
+    /* check flag is user spase or kernel spase */
+    if (flag == USER_SPASE) {
         PCIE_DEV_DEBUG_VERBOSE("user space read, buf: %p, offset: %lld, read count %lu.\n",
             buf, *offset, count);
         if (copy_to_user(buf, buf_tmp, read_len)) {
@@ -261,13 +265,23 @@ static ssize_t pci_dev_read(struct file *file, char __user *buf, size_t count, l
     return ret;
 }
 
+static ssize_t pci_dev_read_user(struct file *file, char __user *buf, size_t count, loff_t *offset)
+{
+    int ret;
+
+    PCIE_DEV_DEBUG_VERBOSE("pci_dev_read_user, file: %p, count: %lu, offset: %lld\n",
+        file, count, *offset);
+    ret = pci_dev_read(file, buf, count, offset, USER_SPASE);
+    return ret;
+}
+
 static ssize_t pci_dev_read_iter(struct kiocb *iocb, struct iov_iter *to)
 {
     int ret;
 
     PCIE_DEV_DEBUG_VERBOSE("pci_dev_read_iter, file: %p, count: %lu, offset: %lld\n",
         iocb->ki_filp, to->count, iocb->ki_pos);
-    ret = pci_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos);
+    ret = pci_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos, KERNEL_SPASE);
     return ret;
 }
 
@@ -307,7 +321,7 @@ static int pci_dev_write_tmp(wb_pci_dev_t *wb_pci_dev, uint32_t offset, uint8_t
 }
 
 static ssize_t pci_dev_write(struct file *file, const char __user *buf, size_t count,
-                   loff_t *offset)
+                   loff_t *offset, int flag)
 {
     wb_pci_dev_t *wb_pci_dev;
     u8 buf_tmp[PCI_RDWR_MAX_LEN];
@@ -330,7 +344,8 @@ static ssize_t pci_dev_write(struct file *file, const char __user *buf, size_t c
     }
 
     mem_clear(buf_tmp, sizeof(buf_tmp));
-    if (access_ok(buf, count)) {
+    /* check flag is user spase or kernel spase */
+    if (flag == USER_SPASE) {
         PCIE_DEV_DEBUG_VERBOSE("user space write, buf: %p, offset: %lld, write count %lu.\n",
             buf, *offset, count);
         if (copy_from_user(buf_tmp, buf, count)) {
@@ -353,13 +368,23 @@ static ssize_t pci_dev_write(struct file *file, const char __user *buf, size_t c
     return write_len;
 }
 
+static ssize_t pci_dev_write_user(struct file *file, const char __user *buf, size_t count, loff_t *offset)
+{
+    int ret;
+
+    PCIE_DEV_DEBUG_VERBOSE("pci_dev_write_user, file: %p, count: %lu, offset: %lld\n",
+        file, count, *offset);
+    ret = pci_dev_write(file, buf, count, offset, USER_SPASE);
+    return ret;
+}
+
 static ssize_t pci_dev_write_iter(struct kiocb *iocb, struct iov_iter *from)
 {
     int ret;
 
     PCIE_DEV_DEBUG_VERBOSE("pci_dev_write_iter, file: %p, count: %lu, offset: %lld\n",
         iocb->ki_filp, from->count, iocb->ki_pos);
-    ret = pci_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos);
+    ret = pci_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos, KERNEL_SPASE);
     return ret;
 }
 
@@ -464,6 +489,8 @@ static long pci_dev_ioctl(struct file *file, unsigned int cmd, unsigned long arg
 static const struct file_operations pcie_dev_fops = {
     .owner      = THIS_MODULE,
     .llseek     = pci_dev_llseek,
+    .read       = pci_dev_read_user,
+    .write      = pci_dev_write_user,
     .read_iter  = pci_dev_read_iter,
     .write_iter = pci_dev_write_iter,
     .unlocked_ioctl = pci_dev_ioctl,
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.c
index b569ace32526..d70424afb0e7 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_dev.c
@@ -32,6 +32,9 @@
 #define OP_READ             (0x3)
 #define OP_WRITE            (0x2)
 
+#define KERNEL_SPASE         (0)
+#define USER_SPASE           (1)
+
 static int g_spi_dev_debug = 0;
 static int g_spi_dev_error = 0;
 
@@ -312,7 +315,7 @@ static int device_write(struct spi_dev_info *spi_dev, uint32_t offset, uint8_t *
     return count;
 }
 
-static ssize_t spi_dev_read(struct file *file, char __user *buf, size_t count, loff_t *offset)
+static ssize_t spi_dev_read(struct file *file, char __user *buf, size_t count, loff_t *offset, int flag)
 {
     u8 val[MAX_RW_LEN];
     int ret, read_len;
@@ -342,7 +345,8 @@ static ssize_t spi_dev_read(struct file *file, char __user *buf, size_t count, l
         return read_len;
     }
 
-    if (access_ok(buf, read_len)) {
+    /* check flag is user spase or kernel spase */
+    if (flag == USER_SPASE) {
         SPI_DEV_DEBUG("user space read, buf: %p, offset: %lld, read count %lu.\n",
             buf, *offset, count);
         if (copy_to_user(buf, val, read_len)) {
@@ -360,18 +364,28 @@ static ssize_t spi_dev_read(struct file *file, char __user *buf, size_t count, l
     return ret;
 }
 
+static ssize_t spi_dev_read_user(struct file *file, char __user *buf, size_t count, loff_t *offset)
+{
+    int ret;
+
+    SPI_DEV_DEBUG("spi_dev_read_user, file: %p, count: %lu, offset: %lld\n",
+        file, count, *offset);
+    ret = spi_dev_read(file, buf, count, offset, USER_SPASE);
+    return ret;
+}
+
 static ssize_t spi_dev_read_iter(struct kiocb *iocb, struct iov_iter *to)
 {
     int ret;
 
     SPI_DEV_DEBUG("spi_dev_read_iter, file: %p, count: %lu, offset: %lld\n",
         iocb->ki_filp, to->count, iocb->ki_pos);
-    ret = spi_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos);
+    ret = spi_dev_read(iocb->ki_filp, to->kvec->iov_base, to->count, &iocb->ki_pos, KERNEL_SPASE);
     return ret;
 }
 
 static ssize_t spi_dev_write(struct file *file, const char __user *buf,
-                   size_t count, loff_t *offset)
+                   size_t count, loff_t *offset, int flag)
 {
     u8 val[MAX_RW_LEN];
     int write_len;
@@ -394,7 +408,8 @@ static ssize_t spi_dev_write(struct file *file, const char __user *buf,
     }
 
     mem_clear(val, sizeof(val));
-    if (access_ok(buf, count)) {
+    /* check flag is user spase or kernel spase */
+    if (flag == USER_SPASE) {
         SPI_DEV_DEBUG("user space write, buf: %p, offset: %lld, write count %lu.\n",
             buf, *offset, count);
         if (copy_from_user(val, buf, count)) {
@@ -418,13 +433,23 @@ static ssize_t spi_dev_write(struct file *file, const char __user *buf,
     return write_len;
 }
 
+static ssize_t spi_dev_write_user(struct file *file, const char __user *buf, size_t count, loff_t *offset)
+{
+    int ret;
+
+    SPI_DEV_DEBUG("spi_dev_write_user, file: %p, count: %lu, offset: %lld\n",
+        file, count, *offset);
+    ret = spi_dev_write(file, buf, count, offset, USER_SPASE);
+    return ret;
+}
+
 static ssize_t spi_dev_write_iter(struct kiocb *iocb, struct iov_iter *from)
 {
     int ret;
 
     SPI_DEV_DEBUG("spi_dev_write_iter, file: %p, count: %lu, offset: %lld\n",
         iocb->ki_filp, from->count, iocb->ki_pos);
-    ret = spi_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos);
+    ret = spi_dev_write(iocb->ki_filp, from->kvec->iov_base, from->count, &iocb->ki_pos, KERNEL_SPASE);
     return ret;
 }
 
@@ -474,6 +499,8 @@ static loff_t spi_dev_llseek(struct file *file, loff_t offset, int origin)
 static const struct file_operations spi_dev_fops = {
     .owner          = THIS_MODULE,
     .llseek         = spi_dev_llseek,
+    .read           = spi_dev_read_user,
+    .write          = spi_dev_write_user,
     .read_iter      = spi_dev_read_iter,
     .write_iter     = spi_dev_write_iter,
     .unlocked_ioctl = spi_dev_ioctl,
@@ -648,7 +675,7 @@ static int spi_dev_probe(struct spi_device *spi)
     return 0;
 }
 
-static int spi_dev_remove(struct spi_device *spi)
+static void spi_dev_remove(struct spi_device *spi)
 {
     int i;
 
@@ -658,7 +685,7 @@ static int spi_dev_remove(struct spi_device *spi)
             spi_dev_arry[i] = NULL;
         }
     }
-    return 0;
+    return;
 }
 
 static const struct of_device_id spi_dev_of_match[] = {
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.c
index a709427c5b73..5cf3538d88fa 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_ocores.c
@@ -18,6 +18,7 @@
 #include <linux/of.h>
 #include <linux/fs.h>
 #include <linux/uaccess.h>
+#include <linux/uio.h>
 
 #include "wb_spi_ocores.h"
 
@@ -125,6 +126,12 @@ static int oc_spi_file_read(const char *path, uint32_t pos, uint8_t *val, size_t
     struct file *filp;
     loff_t tmp_pos;
 
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
     filp = filp_open(path, O_RDONLY, 0);
     if (IS_ERR(filp)) {
         SPI_OC_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
@@ -133,9 +140,10 @@ static int oc_spi_file_read(const char *path, uint32_t pos, uint8_t *val, size_t
     }
 
     tmp_pos = (loff_t)pos;
-    ret = kernel_read(filp, val, size, &tmp_pos);
+    iov_iter_kvec(&iter, ITER_DEST, &iov, 1, iov.iov_len);
+    ret = vfs_iter_read(filp, &iter, &tmp_pos, 0);
     if (ret < 0) {
-        SPI_OC_ERROR("kernel_read failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        SPI_OC_ERROR("vfs_iter_read failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, pos, size, ret);
         goto exit;
     }
 
@@ -153,11 +161,16 @@ static int oc_spi_file_read(const char *path, uint32_t pos, uint8_t *val, size_t
 
 static int oc_spi_file_write(const char *path, uint32_t pos, uint8_t *val, size_t size)
 {
-
     int ret;
     struct file *filp;
     loff_t tmp_pos;
 
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
     filp = filp_open(path, O_RDWR, 777);
     if (IS_ERR(filp)) {
         SPI_OC_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
@@ -166,9 +179,10 @@ static int oc_spi_file_write(const char *path, uint32_t pos, uint8_t *val, size_
     }
 
     tmp_pos = (loff_t)pos;
-    ret = kernel_write(filp, val, size, &tmp_pos);
+    iov_iter_kvec(&iter, ITER_SOURCE, &iov, 1, iov.iov_len);
+    ret = vfs_iter_write(filp, &iter, &tmp_pos, 0);
     if (ret < 0) {
-        SPI_OC_ERROR("kernel_write failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        SPI_OC_ERROR("vfs_iter_write failed, path=%s, addr=%d, size=%ld, ret=%d\r\n", path, pos, size, ret);
         goto exit;
     }
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c
index c97288944061..aa50ef848dde 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_wdt.c
@@ -14,6 +14,7 @@
 #include <linux/kthread.h>
 #include <linux/mutex.h>
 #include <linux/hwmon-sysfs.h>
+#include <linux/uio.h>
 
 #include "wb_wdt.h"
 
@@ -111,6 +112,12 @@ static int wdt_file_read(const char *path, uint32_t pos, uint8_t *val, size_t si
     struct file *filp;
     loff_t tmp_pos;
 
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
     filp = filp_open(path, O_RDONLY, 0);
     if (IS_ERR(filp)) {
         WDT_ERROR("read open failed errno = %ld\r\n", -PTR_ERR(filp));
@@ -119,9 +126,10 @@ static int wdt_file_read(const char *path, uint32_t pos, uint8_t *val, size_t si
     }
 
     tmp_pos = (loff_t)pos;
-    ret = kernel_read(filp, val, size, &tmp_pos);
+    iov_iter_kvec(&iter, ITER_DEST, &iov, 1, iov.iov_len);
+    ret = vfs_iter_read(filp, &iter, &tmp_pos, 0);
     if (ret < 0) {
-        WDT_ERROR("kernel_read failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        WDT_ERROR("vfs_iter_read failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
         goto exit;
     }
 
@@ -143,6 +151,12 @@ static int wdt_file_write(const char *path, uint32_t pos, uint8_t *val, size_t s
     struct file *filp;
     loff_t tmp_pos;
 
+    struct kvec iov = {
+        .iov_base = val,
+        .iov_len = min_t(size_t, size, MAX_RW_COUNT),
+    };
+    struct iov_iter iter;
+
     filp = filp_open(path, O_RDWR, 777);
     if (IS_ERR(filp)) {
         WDT_ERROR("write open failed errno = %ld\r\n", -PTR_ERR(filp));
@@ -151,9 +165,10 @@ static int wdt_file_write(const char *path, uint32_t pos, uint8_t *val, size_t s
     }
 
     tmp_pos = (loff_t)pos;
-    ret = kernel_write(filp, val, size, &tmp_pos);
+    iov_iter_kvec(&iter, ITER_SOURCE, &iov, 1, iov.iov_len);
+    ret = vfs_iter_write(filp, &iter, &tmp_pos, 0);
     if (ret < 0) {
-        WDT_ERROR("kernel_write failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
+        WDT_ERROR("vfs_iter_write failed, path=%s, addr=0x%x, size=%ld, ret=%d\r\n", path, pos, size, ret);
         goto exit;
     }
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c
index edc12d34b6e2..602428a55859 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c
@@ -534,7 +534,7 @@ static int xdpe132g5c_probe(struct i2c_client *client, const struct i2c_device_i
     return 0;
 }
 
-static int xdpe132g5c_remove(struct i2c_client *client)
+static void xdpe132g5c_remove(struct i2c_client *client)
 {
     struct xdpe_data *data;
 
@@ -542,7 +542,7 @@ static int xdpe132g5c_remove(struct i2c_client *client)
     data = i2c_get_clientdata(client);
     hwmon_device_unregister(data->hwmon_dev);
     sysfs_remove_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group);
-    return 0;
+    return;
 }
 
 static const struct i2c_device_id xdpe132g5c_id[] = {
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py
index 7722b111f944..63acf84b7f3e 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py
@@ -260,6 +260,14 @@ def __init__(self):
         self.__deal_fan_error_conf = self.__fancontrol_para.get("deal_fan_error_conf", {})
         self.__deal_fan_error_default_countdown = self.__deal_fan_error_conf.get("countdown", 0)
 
+        self.__deal_all_fan_error_method_flag = self.__fancontrol_para.get("deal_all_fan_error_method_flag", 0)
+        if self.__deal_all_fan_error_method_flag:
+            self.__all_fan_error_switch_temp_critical_temp = self.__fancontrol_para.get("all_fan_error_switch_temp_critical_temp", 100)
+            self.__all_fan_error_recover_log = self.__fancontrol_para.get("all_fan_error_recover_log", "Reboot the system.")
+            self.__all_fan_error_recover_cmd = self.__fancontrol_para.get("all_fan_error_recover_cmd", "/sbin/reboot")
+            self.__all_fan_error_check_crit_reboot_num = self.__fancontrol_para.get("all_fan_error_check_crit_reboot_num", 3)
+            self.__all_fan_error_check_crit_sleep_time = self.__fancontrol_para.get("all_fan_error_check_crit_sleep_time", 20)
+
         self.__warning_countdown = 0  # temp warning flag for normal fancontrol
         self.__critical_countdown = 0  # temp critical flag for normal fancontrol
         self.__emergency_countdown = 0  # temp emergency flag for normal fancontrol
@@ -574,6 +582,46 @@ def checkEmergReboot(self):
             fancontrol_error("%%policy: checkEmergReboot failed")
             fancontrol_error(str(e))
 
+    def all_fan_error_checkTempRebootCrit(self):
+        try:
+            temp_dict = dict(self.__temps_threshold_config)
+            tmp = temp_dict.get(SWITCH_TEMP)
+            switch_temp_value = tmp['temp']
+            if switch_temp_value >= self.__all_fan_error_switch_temp_critical_temp:
+                fancontrol_debug("all fan error, switch temp[%d] is over critical[%d]."
+                    % (switch_temp_value, self.__all_fan_error_switch_temp_critical_temp))
+                return True
+        except Exception as e:
+            fancontrol_error("%%policy: all_fan_error_checkTempRebootCrit failed")
+            fancontrol_error(str(e))
+        return False
+
+    def all_fan_error_checkCritReboot(self):
+        try:
+            reboot_flag = self.all_fan_error_checkTempRebootCrit()
+            if reboot_flag > 0:
+                self.set_all_fan_speed_pwm(self.__max_pwm)
+                for i in range(self.__all_fan_error_check_crit_reboot_num):
+                    time.sleep(self.__all_fan_error_check_crit_sleep_time)
+                    self.get_monitor_temp()
+                    reboot_flag = self.all_fan_error_checkTempRebootCrit()
+                    if reboot_flag > 0:
+                        fancontrol_emerg("%%FANCONTROL-0-TEMP_EMERG: The temperature of device over reboot critical value lasts for %d seconds." %
+                                         (self.__all_fan_error_check_crit_sleep_time * (i + 1)))
+                        continue
+                    else:
+                        fancontrol_debug("The temperature of device is not over reboot critical value.")
+                        break
+                if reboot_flag > 0:
+                    fancontrol_emerg("%%FANCONTROL-0-TEMP_EMERG: The temperature of device over reboot critical value.")
+                    fancontrol_emerg(self.__all_fan_error_recover_log)
+                    exec_os_cmd("sync")
+                    time.sleep(3)
+                    exec_os_cmd(self.__all_fan_error_recover_cmd)
+        except Exception as e:
+            fancontrol_error("%%policy: all_fan_error_checkCritReboot failed")
+            fancontrol_error(str(e))
+
     def get_fan_total_number(self):
         return self.int_case.get_fan_total_number()
 
@@ -706,6 +754,25 @@ def abnormal_check(self):
         pwm_min = self.__min_pwm
         pwm_list.append(pwm_min)
 
+        self.__fan_absent_num = self.checkFanPresence()
+        if self.__fan_absent_num >= self.__fan_absent_fullspeed_num:
+            fan_absent_pwm = self.__max_pwm
+            pwm_list.append(fan_absent_pwm)
+            fancontrol_debug("fan_absent_pwm = 0x%x" % fan_absent_pwm)
+
+        rotor_err_num = self.checkFanRotorStatus()
+        if rotor_err_num >= self.__rotor_error_fullspeed_num:
+            rotor_err_pwm = self.__max_pwm
+            pwm_list.append(rotor_err_pwm)
+            fancontrol_debug("rotor_err_pwm = 0x%x" % rotor_err_pwm)
+
+        if self.__deal_all_fan_error_method_flag:
+            fan_num = self.get_fan_total_number()
+            # all fan absent or fail
+            if (self.__fan_absent_num == fan_num) or (self.__fan_nok_num == fan_num):
+                fancontrol_debug("All fan error or absent.")
+                self.all_fan_error_checkCritReboot()
+
         if self.__check_temp_emergency == 1:
             status = self.checkTempEmergency()
             if status is True:
@@ -751,18 +818,6 @@ def abnormal_check(self):
                     fancontrol_debug("TempWarningCountdown: %d, over_warn_countdown_pwm = 0x%x" %
                                      (self.__warning_countdown, over_warn_countdown_pwm))
 
-        self.__fan_absent_num = self.checkFanPresence()
-        if self.__fan_absent_num >= self.__fan_absent_fullspeed_num:
-            fan_absent_pwm = self.__max_pwm
-            pwm_list.append(fan_absent_pwm)
-            fancontrol_debug("fan_absent_pwm = 0x%x" % fan_absent_pwm)
-
-        rotor_err_num = self.checkFanRotorStatus()
-        if rotor_err_num >= self.__rotor_error_fullspeed_num:
-            rotor_err_pwm = self.__max_pwm
-            pwm_list.append(rotor_err_pwm)
-            fancontrol_debug("rotor_err_pwm = 0x%x" % rotor_err_pwm)
-
         psu_absent_num = self.checkPsuPresence()
         if psu_absent_num >= self.__psu_absent_fullspeed_num:
             psu_absent_pwm = self.__max_pwm
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py
index be1c8ce8f4fd..f8d4bbebe1a9 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py
@@ -298,7 +298,7 @@ def get_vendor(self):
             string: Vendor name of fan
         """
         if not self.is_psu_fan:
-            return "WB"
+            return "Micas"
         return 'N/A'
 
     def get_revision(self):

From 1f7de06980053329ae0c9067397903aed07f98f4 Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Fri, 5 Jan 2024 15:44:32 +0800
Subject: [PATCH 17/32] Update sonic-linux-kernel to use 6.1.38

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../default_sku                               |     2 +-
 .../installer.conf                            |     2 +-
 .../platform_components.json                  |    37 -
 .../common/Makefile                           |     1 +
 .../common/lib/plat_hal/interface.py          |     5 +
 .../common/lib/restful_util/__init__.py       |     0
 .../common/lib/restful_util/restful_api.py    |    96 +
 .../kernel_drivers_blacklist.conf             |     6 +-
 .../common/modules/Makefile                   |     5 +-
 .../common/modules/intel_spi/Makefile         |    22 -
 .../modules/intel_spi/include/intel_spi.h     |    23 -
 .../common/modules/intel_spi/intel_spi.c      |   966 -
 .../common/modules/intel_spi/intel_spi_pci.c  |   106 -
 .../modules/intel_spi/intel_spi_platform.c    |   168 -
 .../common/modules/linux-5.10/wb_i2c_ismt.c   |   157 +-
 .../modules/linux-5.10/wb_i2c_mux_pca954x.c   |    92 +-
 .../modules/linux-5.10/wb_i2c_mux_pca954x.h   |     1 +
 .../common/modules/linux-5.10/wb_isl68137.c   |     5 +
 .../common/modules/linux-5.10/wb_ucd9000.c    |    50 +-
 .../common/modules/linux-5.10/wb_xdpe12284.c  |     6 +-
 .../modules/linux-5.10/wb_xdpe132g5c_pmbus.c  |   338 +-
 .../plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c     |     7 +-
 .../common/modules/r8168/Makefile             |   195 +
 .../common/modules/r8168/r8168.h              |  2394 ++
 .../common/modules/r8168/r8168_asf.c          |   416 +
 .../common/modules/r8168/r8168_asf.h          |   295 +
 .../common/modules/r8168/r8168_dash.h         |   256 +
 .../common/modules/r8168/r8168_fiber.h        |    75 +
 .../common/modules/r8168/r8168_firmware.c     |   264 +
 .../common/modules/r8168/r8168_firmware.h     |    68 +
 .../common/modules/r8168/r8168_n.c            | 32206 ++++++++++++++++
 .../common/modules/r8168/r8168_realwow.h      |   118 +
 .../common/modules/r8168/r8168_rss.c          |   439 +
 .../common/modules/r8168/r8168_rss.h          |    66 +
 .../common/modules/r8168/rtl_eeprom.c         |   289 +
 .../common/modules/r8168/rtl_eeprom.h         |    56 +
 .../common/modules/r8168/rtltool.c            |   232 +
 .../common/modules/r8168/rtltool.h            |    86 +
 .../common/modules/wb_fpga_pcie.c             |    17 +-
 .../common/modules/wb_i2c_ocores.c            |    29 +-
 .../common/modules/wb_i2c_ocores.h            |     2 +
 .../common/modules/wb_pcie_dev.c              |    24 +-
 .../common/modules/wb_pcie_dev.h              |     2 +
 .../common/modules/wb_xdpe132g5c.c            |     7 +-
 .../common/script/avscontrol.py               |     2 +-
 .../common/script/platform_sensors.py         |    14 +-
 .../common/script/subnetwork.py               |    59 +
 .../common/service/subnetwork.service         |    13 +
 .../common/sonic_platform/fan.py              |     6 +-
 .../sonic-platform-modules-micas/debian/rules |    10 +-
 .../x86_64_micas_m2_w6510_48v8c_r0_config.py  |     8 +-
 51 files changed, 38300 insertions(+), 1443 deletions(-)
 delete mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_components.json
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/__init__.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/restful_api.py
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/Makefile
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/include/intel_spi.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi_pci.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi_platform.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/Makefile
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_asf.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_asf.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_dash.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_fiber.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_firmware.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_firmware.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_n.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_realwow.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_rss.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_rss.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtl_eeprom.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtl_eeprom.h
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtltool.c
 create mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtltool.h
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/script/subnetwork.py
 create mode 100755 platform/broadcom/sonic-platform-modules-micas/common/service/subnetwork.service

diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/default_sku b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/default_sku
index 921c511b10c6..2135020186ac 100644
--- a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/default_sku
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/default_sku
@@ -1 +1 @@
-M2-W6510-48V8C t1
+M2-W6510-48V8C l2
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/installer.conf b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/installer.conf
index 7a9fec8cc99c..2a5d7d83f102 100644
--- a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/installer.conf
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/installer.conf
@@ -1,2 +1,2 @@
 CONSOLE_SPEED=115200
-ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll"
\ No newline at end of file
+ONIE_PLATFORM_EXTRA_CMDLINE_LINUX="intel_idle.max_cstate=0 idle=poll modprobe.blacklist=spi_intel,spi_intel_platform,spi_intel_pci"
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_components.json
deleted file mode 100644
index 7986fe321313..000000000000
--- a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_components.json
+++ /dev/null
@@ -1,37 +0,0 @@
-{
-    "chassis": {
-        "M2-W6510-48V8C": {
-            "component": {
-                "CPU_CPLD": {
-                    "firmware": "",
-                    "version": "27190516"
-                },
-                "CONNECT_CPLD": {
-                    "firmware": "",
-                    "version": "49191230"
-                },
-                "CONNECT_CPLD-FAN": {
-                    "firmware": "",
-                    "version": "49191230"
-                },
-                "MAC_CPLD1": {
-                    "firmware" : "",
-                    "version" : "16190108"
-                },
-                "MAC_CPLD2": {
-                    "firmware" : "",
-                    "version" : "17200110"
-                },
-                "FPGA": {
-                    "firmware": "",
-                    "version": "7a150016"
-                },
-                "BIOS": {
-                    "firmware" : "",
-                    "version" : "5.11(3BARB029)"
-                }
-            }
-        }
-    }
-}
-
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/Makefile
index 385dae0884fb..578d65b3bf3e 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/common/Makefile
@@ -30,6 +30,7 @@ all:
 	@if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi
 	@if [ -d $(PWD)/lib/ ]; then cp -r $(PWD)/lib/* ${INSTALL_LIB_DIR} ;fi
 	@if [ -d $(PWD)/sonic_platform/ ]; then cp -rf $(PWD)/sonic_platform ${INSTALL_LIB_DIR} ;fi
+	cp -r $(app_build_dir)/module/*.ko $(INSTALL_MODULE_DIR)
 	cp -r $(modules_build_dir)/*.ko $(INSTALL_MODULE_DIR)
 	cp -r $(app_dir)/build/app/*  $(INSTALL_SCRIPT_DIR)
 	cp -r $(SCRIPT_DIR)/*  $(INSTALL_SCRIPT_DIR)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py
index 7092f555c496..88873a029b64 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/interface.py
@@ -864,8 +864,13 @@ def get_dcdc_all_info(self):
             tmp = dcdc.sensor.Value
             if tmp is not None:
                 dicttmp['Value'] = tmp
+                if tmp > dicttmp['Max'] or tmp < dicttmp['Min']:
+                    dicttmp["Status"] = "NOT OK"
+                else:
+                    dicttmp["Status"] = "OK"
             else:
                 dicttmp['Value'] = self.error_ret
+                dicttmp["Status"] = "NOT OK"
             dicttmp['Unit'] = dcdc.sensor.Unit
             val_list[sensorname] = dicttmp
         return val_list
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/__init__.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/__init__.py
new file mode 100755
index 000000000000..e69de29bb2d1
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/restful_api.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/restful_api.py
new file mode 100755
index 000000000000..6caba07d915e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/restful_api.py
@@ -0,0 +1,96 @@
+#!/usr/bin/env python3
+# -*- coding: utf-8 -*-
+
+import os
+import syslog
+
+import requests
+
+
+class RestfulApiClient():
+    Debug_file = "/tmp/restful_api_debug"
+    BmcBaseUrl = 'http://240.1.1.2:8080'
+    NetworkUrl = '/api/v1.0/network'
+    PowerUrl = '/api/v1.0/power'
+    HostnameUrl = '/api/v1.0/hostname'
+    EventsUrl = '/api/v1.0/events'
+    SensorsUrl = '/api/v1.0/sys_switch/sensors'
+    SyseepromUrl = '/api/v1.0/syseeprom'
+    FansUrl = '/api/v1.0/sys_switch/fans'
+    # FanUrl = '/api/v1.0/sys_switch/fan/fan1'
+    FanUrl = '/api/v1.0/sys_switch/fan/'
+    PsusUrl = '/api/v1.0/sys_switch/psus'
+    # PsuUrl = '/api/v1.0/sys_switch/psu/psu1'
+    PsuUrl = '/api/v1.0/sys_switch/psu/'
+    LEDsUrl = '/api/v1.0/sys_switch/leds'
+    FirmwaresUrl = '/api/v1.0/sys_switch/firmwares'
+    WatchdogsUrl = '/api/v1.0/watchdog-lambda-os'
+    UsersUrl = '/api/v1.0/users'
+    TimeUrl = '/api/v1.0/time'
+    TimezoneUrl = '/api/v1.0/timezone'
+    NtpUrl = '/api/v1.0/ntp'
+    PowerUrl = '/api/v1.0/power'
+
+    def restful_api_error_log(self, msg):
+        syslog.openlog("restful_api")
+        syslog.syslog(syslog.LOG_ERR, msg)
+        syslog.closelog()
+
+    def restful_api_debug_log(self, msg):
+        if os.path.exists(self.Debug_file):
+            syslog.openlog("restful_api")
+            syslog.syslog(syslog.LOG_DEBUG, msg)
+            syslog.closelog()
+
+    def get_request(self, url, time_out=(30, 30)):
+        try:
+            full_url = self.BmcBaseUrl + url
+            self.restful_api_debug_log("GET: %s" % full_url)
+            response = requests.get(full_url, timeout=time_out)
+            self.restful_api_debug_log("RET: %s" % str(response.json()))
+            return response.json()
+        except Exception as e:
+            self.restful_api_error_log(str(e))
+            return None
+
+    def post_request(self, url, data, time_out=(30, 30)):
+        try:
+            full_url = self.BmcBaseUrl + url
+            self.restful_api_debug_log("POST: %s -d %s" % (full_url, str(data)))
+            response = requests.post(full_url, json=data, timeout=time_out)
+            # 检查响应状态码
+            if response.status_code == 200:
+                self.restful_api_debug_log("RET: %s" % str(response.json()))
+                return response.json()
+            else:
+                self.restful_api_error_log("Post request failed. Status code {}".format(response.status_code))
+                return None
+        except Exception as e:
+            self.restful_api_error_log(str(e))
+            return None
+'''
+if __name__ == '__main__':
+    client = RestfulApiClient()
+
+    # 发送 GET 请求
+    time_data = client.get_request(client.TimeUrl)
+    print("Current time:", time_data)
+
+    # 获取fans
+    fans = client.get_request(client.FansUrl)
+    print("Current fans:", fans)
+
+    # 发送 POST 请求
+    new_time = "2023-08-31 14:41:28 +0800"
+    response = client.post_request(client.TimeUrl, {"time": new_time})
+    print("Time set successfully:", response)
+
+    # 发送 POST 请求
+    cmd = "bmc reset cold"
+    response = client.post_request(client.PowerUrl, {"cmd": cmd})
+    print("Time set successfully:", response)
+
+    # 发送 GET 请求
+    #sensors = client.get_request(client.SensorsUrl)
+    #print("sensors:", sensors)
+'''
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf b/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf
index 39d56582bd1d..fea9ac508aaf 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf
@@ -1,7 +1,7 @@
 blacklist wb_fpga_pcie
 blacklist wb_i2c_i801
 blacklist wb_spi_gpio
-blacklist intel_spi
-blacklist intel_spi_platform
+blacklist spi_intel
+blacklist spi_intel_platform
 blacklist wb_i2c_ismt
-blacklist intel_spi_pci
+blacklist spi_intel_pci
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
index b828da5be8b8..63c4238836e7 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
@@ -10,10 +10,10 @@ export module_out_put_dir
 KERNEL_MODULES_SRC = $(PWD)/linux-5.10
 
 PLAT_SYSFS_DIR = $(PWD)/plat_sysfs
-INTEL_SPI = $(PWD)/intel_spi
 PHY = $(PWD)/phy
 PINCTRL = $(PWD)/pinctrl
 SDHCI = $(PWD)/sdhci
+RTL_DRIVER_PATH = r8168
 
 export PLAT_SYSFS_DIR
 
@@ -43,17 +43,18 @@ obj-m += wb_spi_gpio_device.o
 obj-m += wb_xdpe132g5c.o
 obj-m += wb_uio_irq.o
 obj-m += hw_test.o
+obj-y += r8168/
 
 all :
 	$(MAKE) -C $(KERNEL_MODULES_SRC)
 	$(MAKE) -C $(PLAT_SYSFS_DIR)
-	$(MAKE) -C $(INTEL_SPI)
 	$(MAKE) -C $(PHY)
 	$(MAKE) -C $(PINCTRL)
 	$(MAKE) -C $(SDHCI)
 	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
 	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
 	cp -p  $(PWD)/*.ko $(module_out_put_dir)
+	cp -p  $(PWD)/$(RTL_DRIVER_PATH)/*.ko $(module_out_put_dir)
 
 clean :
 	rm  -rf $(module_out_put_dir)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/Makefile
deleted file mode 100644
index b84963167b0b..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/Makefile
+++ /dev/null
@@ -1,22 +0,0 @@
-PWD		= $(shell pwd)
-
-EXTRA_CFLAGS:= -I$(M)/include
-EXTRA_CFLAGS+= -Wall
-#ifdef ENABLE_GCOV
-#ifeq ($(ENABLE_GCOV), y)
-#EXTRA_CFLAGS+= -fprofile-arcs -ftest-coverage -lgcov
-#endif
-#endif # ENABLE_GCOV
-
-obj-m := intel_spi.o
-obj-m += intel_spi_platform.o
-obj-m += intel_spi_pci.o
-
-all:
-	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
-	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
-	cp -p  $(PWD)/*.ko $(module_out_put_dir)
-clean:
-	rm -f $(PWD)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd
-	rm -f $(PWD)/Module.markers $(PWD)/Module.symvers $(PWD)/modules.order
-	rm -rf $(PWD)/.tmp_versions
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/include/intel_spi.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/include/intel_spi.h
deleted file mode 100644
index 718b299402b8..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/include/intel_spi.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
- * Intel PCH/PCU SPI flash driver.
- *
- * Copyright (C) 2016, Intel Corporation
- * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
- */
-
-#ifndef INTEL_SPI_H
-#define INTEL_SPI_H
-
-#include <linux/platform_data/x86/spi-intel.h>
-#include <linux/string.h>
-
-#define mem_clear(data, size) memset((data), 0, (size))
-struct intel_spi;
-struct resource;
-
-struct intel_spi *intel_spi_probe(struct device *dev,
-	struct resource *mem, const struct intel_spi_boardinfo *info);
-int intel_spi_remove(struct intel_spi *ispi);
-
-#endif /* INTEL_SPI_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi.c
deleted file mode 100644
index 2adc1f10b471..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi.c
+++ /dev/null
@@ -1,966 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Intel PCH/PCU SPI flash driver.
- *
- * Copyright (C) 2016, Intel Corporation
- * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
- */
-
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/iopoll.h>
-#include <linux/module.h>
-#include <linux/sched.h>
-#include <linux/sizes.h>
-#include <linux/mtd/mtd.h>
-#include <linux/mtd/partitions.h>
-#include <linux/mtd/spi-nor.h>
-#include <linux/platform_data/x86/spi-intel.h>
-
-#include "intel_spi.h"
-
-/* Offsets are from @ispi->base */
-#define BFPREG				0x00
-
-#define HSFSTS_CTL			0x04
-#define HSFSTS_CTL_FSMIE		BIT(31)
-#define HSFSTS_CTL_FDBC_SHIFT		24
-#define HSFSTS_CTL_FDBC_MASK		(0x3f << HSFSTS_CTL_FDBC_SHIFT)
-
-#define HSFSTS_CTL_FCYCLE_SHIFT		17
-#define HSFSTS_CTL_FCYCLE_MASK		(0x0f << HSFSTS_CTL_FCYCLE_SHIFT)
-/* HW sequencer opcodes */
-#define HSFSTS_CTL_FCYCLE_READ		(0x00 << HSFSTS_CTL_FCYCLE_SHIFT)
-#define HSFSTS_CTL_FCYCLE_WRITE		(0x02 << HSFSTS_CTL_FCYCLE_SHIFT)
-#define HSFSTS_CTL_FCYCLE_ERASE		(0x03 << HSFSTS_CTL_FCYCLE_SHIFT)
-#define HSFSTS_CTL_FCYCLE_ERASE_64K	(0x04 << HSFSTS_CTL_FCYCLE_SHIFT)
-#define HSFSTS_CTL_FCYCLE_RDID		(0x06 << HSFSTS_CTL_FCYCLE_SHIFT)
-#define HSFSTS_CTL_FCYCLE_WRSR		(0x07 << HSFSTS_CTL_FCYCLE_SHIFT)
-#define HSFSTS_CTL_FCYCLE_RDSR		(0x08 << HSFSTS_CTL_FCYCLE_SHIFT)
-
-#define HSFSTS_CTL_FGO			BIT(16)
-#define HSFSTS_CTL_FLOCKDN		BIT(15)
-#define HSFSTS_CTL_FDV			BIT(14)
-#define HSFSTS_CTL_SCIP			BIT(5)
-#define HSFSTS_CTL_AEL			BIT(2)
-#define HSFSTS_CTL_FCERR		BIT(1)
-#define HSFSTS_CTL_FDONE		BIT(0)
-
-#define FADDR				0x08
-#define DLOCK				0x0c
-#define FDATA(n)			(0x10 + ((n) * 4))
-
-#define FRACC				0x50
-
-#define FREG(n)				(0x54 + ((n) * 4))
-#define FREG_BASE_MASK			GENMASK(14, 0)
-#define FREG_LIMIT_SHIFT		16
-#define FREG_LIMIT_MASK			GENMASK(30, 16)
-
-/* Offset is from @ispi->pregs */
-#define PR(n)				((n) * 4)
-#define PR_WPE				BIT(31)
-#define PR_LIMIT_SHIFT			16
-#define PR_LIMIT_MASK			GENMASK(30, 16)
-#define PR_RPE				BIT(15)
-#define PR_BASE_MASK			GENMASK(14, 0)
-
-/* Offsets are from @ispi->sregs */
-#define SSFSTS_CTL			0x00
-#define SSFSTS_CTL_FSMIE		BIT(23)
-#define SSFSTS_CTL_DS			BIT(22)
-#define SSFSTS_CTL_DBC_SHIFT		16
-#define SSFSTS_CTL_SPOP			BIT(11)
-#define SSFSTS_CTL_ACS			BIT(10)
-#define SSFSTS_CTL_SCGO			BIT(9)
-#define SSFSTS_CTL_COP_SHIFT		12
-#define SSFSTS_CTL_FRS			BIT(7)
-#define SSFSTS_CTL_DOFRS		BIT(6)
-#define SSFSTS_CTL_AEL			BIT(4)
-#define SSFSTS_CTL_FCERR		BIT(3)
-#define SSFSTS_CTL_FDONE		BIT(2)
-#define SSFSTS_CTL_SCIP			BIT(0)
-
-#define PREOP_OPTYPE			0x04
-#define OPMENU0				0x08
-#define OPMENU1				0x0c
-
-#define OPTYPE_READ_NO_ADDR		0
-#define OPTYPE_WRITE_NO_ADDR		1
-#define OPTYPE_READ_WITH_ADDR		2
-#define OPTYPE_WRITE_WITH_ADDR		3
-
-/* CPU specifics */
-#define BYT_PR				0x74
-#define BYT_SSFSTS_CTL			0x90
-#define BYT_BCR				0xfc
-#define BYT_BCR_WPD			BIT(0)
-#define BYT_FREG_NUM			5
-#define BYT_PR_NUM			5
-
-#define LPT_PR				0x74
-#define LPT_SSFSTS_CTL			0x90
-#define LPT_FREG_NUM			5
-#define LPT_PR_NUM			5
-
-#define BXT_PR				0x84
-#define BXT_SSFSTS_CTL			0xa0
-#define BXT_FREG_NUM			12
-#define BXT_PR_NUM			6
-
-#define CNL_PR				0x84
-#define CNL_FREG_NUM			6
-#define CNL_PR_NUM			5
-
-#define LVSCC				0xc4
-#define UVSCC				0xc8
-#define ERASE_OPCODE_SHIFT		8
-#define ERASE_OPCODE_MASK		(0xff << ERASE_OPCODE_SHIFT)
-#define ERASE_64K_OPCODE_SHIFT		16
-#define ERASE_64K_OPCODE_MASK		(0xff << ERASE_64K_OPCODE_SHIFT)
-
-#define INTEL_SPI_TIMEOUT		5000 /* ms */
-#define INTEL_SPI_FIFO_SZ		64
-
-/**
- * struct intel_spi - Driver private data
- * @dev: Device pointer
- * @info: Pointer to board specific info
- * @nor: SPI NOR layer structure
- * @base: Beginning of MMIO space
- * @pregs: Start of protection registers
- * @sregs: Start of software sequencer registers
- * @nregions: Maximum number of regions
- * @pr_num: Maximum number of protected range registers
- * @locked: Is SPI setting locked
- * @swseq_reg: Use SW sequencer in register reads/writes
- * @swseq_erase: Use SW sequencer in erase operation
- * @erase_64k: 64k erase supported
- * @atomic_preopcode: Holds preopcode when atomic sequence is requested
- * @opcodes: Opcodes which are supported. This are programmed by BIOS
- *           before it locks down the controller.
- */
-struct intel_spi {
-	struct device *dev;
-	const struct intel_spi_boardinfo *info;
-	struct spi_nor nor;
-	void __iomem *base;
-	void __iomem *pregs;
-	void __iomem *sregs;
-	size_t nregions;
-	size_t pr_num;
-	bool locked;
-	bool swseq_reg;
-	bool swseq_erase;
-	bool erase_64k;
-	u8 atomic_preopcode;
-	u8 opcodes[8];
-};
-
-static bool writeable;
-module_param(writeable, bool, 0);
-MODULE_PARM_DESC(writeable, "Enable write access to SPI flash chip (default=0)");
-
-static void intel_spi_dump_regs(struct intel_spi *ispi)
-{
-	u32 value;
-	int i;
-
-	dev_dbg(ispi->dev, "BFPREG=0x%08x\n", readl(ispi->base + BFPREG));
-
-	value = readl(ispi->base + HSFSTS_CTL);
-	dev_dbg(ispi->dev, "HSFSTS_CTL=0x%08x\n", value);
-	if (value & HSFSTS_CTL_FLOCKDN)
-		dev_dbg(ispi->dev, "-> Locked\n");
-
-	dev_dbg(ispi->dev, "FADDR=0x%08x\n", readl(ispi->base + FADDR));
-	dev_dbg(ispi->dev, "DLOCK=0x%08x\n", readl(ispi->base + DLOCK));
-
-	for (i = 0; i < 16; i++)
-		dev_dbg(ispi->dev, "FDATA(%d)=0x%08x\n",
-			i, readl(ispi->base + FDATA(i)));
-
-	dev_dbg(ispi->dev, "FRACC=0x%08x\n", readl(ispi->base + FRACC));
-
-	for (i = 0; i < ispi->nregions; i++)
-		dev_dbg(ispi->dev, "FREG(%d)=0x%08x\n", i,
-			readl(ispi->base + FREG(i)));
-	for (i = 0; i < ispi->pr_num; i++)
-		dev_dbg(ispi->dev, "PR(%d)=0x%08x\n", i,
-			readl(ispi->pregs + PR(i)));
-
-	if (ispi->sregs) {
-		value = readl(ispi->sregs + SSFSTS_CTL);
-		dev_dbg(ispi->dev, "SSFSTS_CTL=0x%08x\n", value);
-		dev_dbg(ispi->dev, "PREOP_OPTYPE=0x%08x\n",
-			readl(ispi->sregs + PREOP_OPTYPE));
-		dev_dbg(ispi->dev, "OPMENU0=0x%08x\n",
-			readl(ispi->sregs + OPMENU0));
-		dev_dbg(ispi->dev, "OPMENU1=0x%08x\n",
-			readl(ispi->sregs + OPMENU1));
-	}
-
-	if (ispi->info->type == INTEL_SPI_BYT)
-		dev_dbg(ispi->dev, "BCR=0x%08x\n", readl(ispi->base + BYT_BCR));
-
-	dev_dbg(ispi->dev, "LVSCC=0x%08x\n", readl(ispi->base + LVSCC));
-	dev_dbg(ispi->dev, "UVSCC=0x%08x\n", readl(ispi->base + UVSCC));
-
-	dev_dbg(ispi->dev, "Protected regions:\n");
-	for (i = 0; i < ispi->pr_num; i++) {
-		u32 base, limit;
-
-		value = readl(ispi->pregs + PR(i));
-		if (!(value & (PR_WPE | PR_RPE)))
-			continue;
-
-		limit = (value & PR_LIMIT_MASK) >> PR_LIMIT_SHIFT;
-		base = value & PR_BASE_MASK;
-
-		dev_dbg(ispi->dev, " %02d base: 0x%08x limit: 0x%08x [%c%c]\n",
-			 i, base << 12, (limit << 12) | 0xfff,
-			 value & PR_WPE ? 'W' : '.',
-			 value & PR_RPE ? 'R' : '.');
-	}
-
-	dev_dbg(ispi->dev, "Flash regions:\n");
-	for (i = 0; i < ispi->nregions; i++) {
-		u32 region, base, limit;
-
-		region = readl(ispi->base + FREG(i));
-		base = region & FREG_BASE_MASK;
-		limit = (region & FREG_LIMIT_MASK) >> FREG_LIMIT_SHIFT;
-
-		if (base >= limit || (i > 0 && limit == 0))
-			dev_dbg(ispi->dev, " %02d disabled\n", i);
-		else
-			dev_dbg(ispi->dev, " %02d base: 0x%08x limit: 0x%08x\n",
-				 i, base << 12, (limit << 12) | 0xfff);
-	}
-
-	dev_dbg(ispi->dev, "Using %cW sequencer for register access\n",
-		ispi->swseq_reg ? 'S' : 'H');
-	dev_dbg(ispi->dev, "Using %cW sequencer for erase operation\n",
-		ispi->swseq_erase ? 'S' : 'H');
-}
-
-/* Reads max INTEL_SPI_FIFO_SZ bytes from the device fifo */
-static int intel_spi_read_block(struct intel_spi *ispi, void *buf, size_t size)
-{
-	size_t bytes;
-	int i = 0;
-
-	if (size > INTEL_SPI_FIFO_SZ)
-		return -EINVAL;
-
-	while (size > 0) {
-		bytes = min_t(size_t, size, 4);
-		memcpy_fromio(buf, ispi->base + FDATA(i), bytes);
-		size -= bytes;
-		buf += bytes;
-		i++;
-	}
-
-	return 0;
-}
-
-/* Writes max INTEL_SPI_FIFO_SZ bytes to the device fifo */
-static int intel_spi_write_block(struct intel_spi *ispi, const void *buf,
-				 size_t size)
-{
-	size_t bytes;
-	int i = 0;
-
-	if (size > INTEL_SPI_FIFO_SZ)
-		return -EINVAL;
-
-	while (size > 0) {
-		bytes = min_t(size_t, size, 4);
-		memcpy_toio(ispi->base + FDATA(i), buf, bytes);
-		size -= bytes;
-		buf += bytes;
-		i++;
-	}
-
-	return 0;
-}
-
-static int intel_spi_wait_hw_busy(struct intel_spi *ispi)
-{
-	u32 val;
-
-	return readl_poll_timeout(ispi->base + HSFSTS_CTL, val,
-				  !(val & HSFSTS_CTL_SCIP), 0,
-				  INTEL_SPI_TIMEOUT * 1000);
-}
-
-static int intel_spi_wait_sw_busy(struct intel_spi *ispi)
-{
-	u32 val;
-
-	return readl_poll_timeout(ispi->sregs + SSFSTS_CTL, val,
-				  !(val & SSFSTS_CTL_SCIP), 0,
-				  INTEL_SPI_TIMEOUT * 1000);
-}
-
-static bool intel_spi_set_writeable(struct intel_spi *ispi)
-{
-	if (!ispi->info->set_writeable)
-		return false;
-
-	return ispi->info->set_writeable(ispi->base, ispi->info->data);
-}
-
-static int intel_spi_init(struct intel_spi *ispi)
-{
-	u32 opmenu0, opmenu1, lvscc, uvscc, val;
-	int i;
-
-	switch (ispi->info->type) {
-	case INTEL_SPI_BYT:
-		ispi->sregs = ispi->base + BYT_SSFSTS_CTL;
-		ispi->pregs = ispi->base + BYT_PR;
-		ispi->nregions = BYT_FREG_NUM;
-		ispi->pr_num = BYT_PR_NUM;
-		ispi->swseq_reg = true;
-		break;
-
-	case INTEL_SPI_LPT:
-		ispi->sregs = ispi->base + LPT_SSFSTS_CTL;
-		ispi->pregs = ispi->base + LPT_PR;
-		ispi->nregions = LPT_FREG_NUM;
-		ispi->pr_num = LPT_PR_NUM;
-		ispi->swseq_reg = true;
-		break;
-
-	case INTEL_SPI_BXT:
-		ispi->sregs = ispi->base + BXT_SSFSTS_CTL;
-		ispi->pregs = ispi->base + BXT_PR;
-		ispi->nregions = BXT_FREG_NUM;
-		ispi->pr_num = BXT_PR_NUM;
-		ispi->erase_64k = true;
-		break;
-
-	case INTEL_SPI_CNL:
-		ispi->sregs = NULL;
-		ispi->pregs = ispi->base + CNL_PR;
-		ispi->nregions = CNL_FREG_NUM;
-		ispi->pr_num = CNL_PR_NUM;
-		break;
-
-	default:
-		return -EINVAL;
-	}
-
-	/* Try to disable write protection if user asked to do so */
-	if (writeable && !intel_spi_set_writeable(ispi)) {
-		dev_warn(ispi->dev, "can't disable chip write protection\n");
-		writeable = false;
-	}
-
-	/* Disable #SMI generation from HW sequencer */
-	val = readl(ispi->base + HSFSTS_CTL);
-	val &= ~HSFSTS_CTL_FSMIE;
-	writel(val, ispi->base + HSFSTS_CTL);
-
-	/*
-	 * Determine whether erase operation should use HW or SW sequencer.
-	 *
-	 * The HW sequencer has a predefined list of opcodes, with only the
-	 * erase opcode being programmable in LVSCC and UVSCC registers.
-	 * If these registers don't contain a valid erase opcode, erase
-	 * cannot be done using HW sequencer.
-	 */
-	lvscc = readl(ispi->base + LVSCC);
-	uvscc = readl(ispi->base + UVSCC);
-	if (!(lvscc & ERASE_OPCODE_MASK) || !(uvscc & ERASE_OPCODE_MASK))
-		ispi->swseq_erase = true;
-	/* SPI controller on Intel BXT supports 64K erase opcode */
-	if (ispi->info->type == INTEL_SPI_BXT && !ispi->swseq_erase)
-		if (!(lvscc & ERASE_64K_OPCODE_MASK) ||
-		    !(uvscc & ERASE_64K_OPCODE_MASK))
-			ispi->erase_64k = false;
-
-	if (ispi->sregs == NULL && (ispi->swseq_reg || ispi->swseq_erase)) {
-		dev_err(ispi->dev, "software sequencer not supported, but required\n");
-		return -EINVAL;
-	}
-
-	/*
-	 * Some controllers can only do basic operations using hardware
-	 * sequencer. All other operations are supposed to be carried out
-	 * using software sequencer.
-	 */
-	if (ispi->swseq_reg) {
-		/* Disable #SMI generation from SW sequencer */
-		val = readl(ispi->sregs + SSFSTS_CTL);
-		val &= ~SSFSTS_CTL_FSMIE;
-		writel(val, ispi->sregs + SSFSTS_CTL);
-	}
-
-	/* Check controller's lock status */
-	val = readl(ispi->base + HSFSTS_CTL);
-	ispi->locked = !!(val & HSFSTS_CTL_FLOCKDN);
-
-	if (ispi->locked && ispi->sregs) {
-		/*
-		 * BIOS programs allowed opcodes and then locks down the
-		 * register. So read back what opcodes it decided to support.
-		 * That's the set we are going to support as well.
-		 */
-		opmenu0 = readl(ispi->sregs + OPMENU0);
-		opmenu1 = readl(ispi->sregs + OPMENU1);
-
-		if (opmenu0 && opmenu1) {
-			for (i = 0; i < ARRAY_SIZE(ispi->opcodes) / 2; i++) {
-				ispi->opcodes[i] = opmenu0 >> i * 8;
-				ispi->opcodes[i + 4] = opmenu1 >> i * 8;
-			}
-		}
-	}
-
-	intel_spi_dump_regs(ispi);
-
-	return 0;
-}
-
-static int intel_spi_opcode_index(struct intel_spi *ispi, u8 opcode, int optype)
-{
-	int i;
-	int preop;
-
-	if (ispi->locked) {
-		for (i = 0; i < ARRAY_SIZE(ispi->opcodes); i++)
-			if (ispi->opcodes[i] == opcode)
-				return i;
-
-		return -EINVAL;
-	}
-
-	/* The lock is off, so just use index 0 */
-	writel(opcode, ispi->sregs + OPMENU0);
-	preop = readw(ispi->sregs + PREOP_OPTYPE);
-	writel(optype << 16 | preop, ispi->sregs + PREOP_OPTYPE);
-
-	return 0;
-}
-
-static int intel_spi_hw_cycle(struct intel_spi *ispi, u8 opcode, size_t len)
-{
-	u32 val, status;
-	int ret;
-
-	val = readl(ispi->base + HSFSTS_CTL);
-	val &= ~(HSFSTS_CTL_FCYCLE_MASK | HSFSTS_CTL_FDBC_MASK);
-
-	switch (opcode) {
-	case SPINOR_OP_RDID:
-		val |= HSFSTS_CTL_FCYCLE_RDID;
-		break;
-	case SPINOR_OP_WRSR:
-		val |= HSFSTS_CTL_FCYCLE_WRSR;
-		break;
-	case SPINOR_OP_RDSR:
-		val |= HSFSTS_CTL_FCYCLE_RDSR;
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	if (len > INTEL_SPI_FIFO_SZ)
-		return -EINVAL;
-
-	val |= (len - 1) << HSFSTS_CTL_FDBC_SHIFT;
-	val |= HSFSTS_CTL_FCERR | HSFSTS_CTL_FDONE;
-	val |= HSFSTS_CTL_FGO;
-	writel(val, ispi->base + HSFSTS_CTL);
-
-	ret = intel_spi_wait_hw_busy(ispi);
-	if (ret)
-		return ret;
-
-	status = readl(ispi->base + HSFSTS_CTL);
-	if (status & HSFSTS_CTL_FCERR)
-		return -EIO;
-	else if (status & HSFSTS_CTL_AEL)
-		return -EACCES;
-
-	return 0;
-}
-
-static int intel_spi_sw_cycle(struct intel_spi *ispi, u8 opcode, size_t len,
-			      int optype)
-{
-	u32 val = 0, status;
-	u8 atomic_preopcode;
-	int ret;
-
-	ret = intel_spi_opcode_index(ispi, opcode, optype);
-	if (ret < 0)
-		return ret;
-
-	if (len > INTEL_SPI_FIFO_SZ)
-		return -EINVAL;
-
-	/*
-	 * Always clear it after each SW sequencer operation regardless
-	 * of whether it is successful or not.
-	 */
-	atomic_preopcode = ispi->atomic_preopcode;
-	ispi->atomic_preopcode = 0;
-
-	/* Only mark 'Data Cycle' bit when there is data to be transferred */
-	if (len > 0)
-		val = ((len - 1) << SSFSTS_CTL_DBC_SHIFT) | SSFSTS_CTL_DS;
-	val |= ret << SSFSTS_CTL_COP_SHIFT;
-	val |= SSFSTS_CTL_FCERR | SSFSTS_CTL_FDONE;
-	val |= SSFSTS_CTL_SCGO;
-	if (atomic_preopcode) {
-		u16 preop;
-
-		switch (optype) {
-		case OPTYPE_WRITE_NO_ADDR:
-		case OPTYPE_WRITE_WITH_ADDR:
-			/* Pick matching preopcode for the atomic sequence */
-			preop = readw(ispi->sregs + PREOP_OPTYPE);
-			if ((preop & 0xff) == atomic_preopcode)
-				; /* Do nothing */
-			else if ((preop >> 8) == atomic_preopcode)
-				val |= SSFSTS_CTL_SPOP;
-			else
-				return -EINVAL;
-
-			/* Enable atomic sequence */
-			val |= SSFSTS_CTL_ACS;
-			break;
-
-		default:
-			return -EINVAL;
-		}
-
-	}
-	writel(val, ispi->sregs + SSFSTS_CTL);
-
-	ret = intel_spi_wait_sw_busy(ispi);
-	if (ret)
-		return ret;
-
-	status = readl(ispi->sregs + SSFSTS_CTL);
-	if (status & SSFSTS_CTL_FCERR)
-		return -EIO;
-	else if (status & SSFSTS_CTL_AEL)
-		return -EACCES;
-
-	return 0;
-}
-
-static int intel_spi_read_reg(struct spi_nor *nor, u8 opcode, u8 *buf,
-			      size_t len)
-{
-	struct intel_spi *ispi = nor->priv;
-	int ret;
-
-	/* Address of the first chip */
-	writel(0, ispi->base + FADDR);
-
-	if (ispi->swseq_reg)
-		ret = intel_spi_sw_cycle(ispi, opcode, len,
-					 OPTYPE_READ_NO_ADDR);
-	else
-		ret = intel_spi_hw_cycle(ispi, opcode, len);
-
-	if (ret)
-		return ret;
-
-	return intel_spi_read_block(ispi, buf, len);
-}
-
-static int intel_spi_write_reg(struct spi_nor *nor, u8 opcode, const u8 *buf,
-			       size_t len)
-{
-	struct intel_spi *ispi = nor->priv;
-	int ret;
-
-	/*
-	 * This is handled with atomic operation and preop code in Intel
-	 * controller so we only verify that it is available. If the
-	 * controller is not locked, program the opcode to the PREOP
-	 * register for later use.
-	 *
-	 * When hardware sequencer is used there is no need to program
-	 * any opcodes (it handles them automatically as part of a command).
-	 */
-	if (opcode == SPINOR_OP_WREN) {
-		u16 preop;
-
-		if (!ispi->swseq_reg)
-			return 0;
-
-		preop = readw(ispi->sregs + PREOP_OPTYPE);
-		if ((preop & 0xff) != opcode && (preop >> 8) != opcode) {
-			if (ispi->locked)
-				return -EINVAL;
-			writel(opcode, ispi->sregs + PREOP_OPTYPE);
-		}
-
-		/*
-		 * This enables atomic sequence on next SW sycle. Will
-		 * be cleared after next operation.
-		 */
-		ispi->atomic_preopcode = opcode;
-		return 0;
-	}
-
-	/*
-	 * We hope that HW sequencer will do the right thing automatically and
-	 * with the SW sequencer we cannot use preopcode anyway, so just ignore
-	 * the Write Disable operation and pretend it was completed
-	 * successfully.
-	 */
-	if (opcode == SPINOR_OP_WRDI)
-		return 0;
-
-	writel(0, ispi->base + FADDR);
-
-	/* Write the value beforehand */
-	ret = intel_spi_write_block(ispi, buf, len);
-	if (ret)
-		return ret;
-
-	if (ispi->swseq_reg)
-		return intel_spi_sw_cycle(ispi, opcode, len,
-					  OPTYPE_WRITE_NO_ADDR);
-	return intel_spi_hw_cycle(ispi, opcode, len);
-}
-
-static ssize_t intel_spi_read(struct spi_nor *nor, loff_t from, size_t len,
-			      u_char *read_buf)
-{
-	struct intel_spi *ispi = nor->priv;
-	size_t block_size, retlen = 0;
-	u32 val, status;
-	ssize_t ret;
-
-	/*
-	 * Atomic sequence is not expected with HW sequencer reads. Make
-	 * sure it is cleared regardless.
-	 */
-	if (WARN_ON_ONCE(ispi->atomic_preopcode))
-		ispi->atomic_preopcode = 0;
-
-	switch (nor->read_opcode) {
-	case SPINOR_OP_READ:
-	case SPINOR_OP_READ_FAST:
-	case SPINOR_OP_READ_4B:
-	case SPINOR_OP_READ_FAST_4B:
-		break;
-	default:
-		return -EINVAL;
-	}
-
-	while (len > 0) {
-		block_size = min_t(size_t, len, INTEL_SPI_FIFO_SZ);
-
-		/* Read cannot cross 4K boundary */
-		block_size = min_t(loff_t, from + block_size,
-				   round_up(from + 1, SZ_4K)) - from;
-
-		writel(from, ispi->base + FADDR);
-
-		val = readl(ispi->base + HSFSTS_CTL);
-		val &= ~(HSFSTS_CTL_FDBC_MASK | HSFSTS_CTL_FCYCLE_MASK);
-		val |= HSFSTS_CTL_AEL | HSFSTS_CTL_FCERR | HSFSTS_CTL_FDONE;
-		val |= (block_size - 1) << HSFSTS_CTL_FDBC_SHIFT;
-		val |= HSFSTS_CTL_FCYCLE_READ;
-		val |= HSFSTS_CTL_FGO;
-		writel(val, ispi->base + HSFSTS_CTL);
-
-		ret = intel_spi_wait_hw_busy(ispi);
-		if (ret)
-			return ret;
-
-		status = readl(ispi->base + HSFSTS_CTL);
-		if (status & HSFSTS_CTL_FCERR)
-			ret = -EIO;
-		else if (status & HSFSTS_CTL_AEL)
-			ret = -EACCES;
-
-		if (ret < 0) {
-			dev_err(ispi->dev, "read error: %llx: %#x\n", from,
-				status);
-			return ret;
-		}
-
-		ret = intel_spi_read_block(ispi, read_buf, block_size);
-		if (ret)
-			return ret;
-
-		len -= block_size;
-		from += block_size;
-		retlen += block_size;
-		read_buf += block_size;
-	}
-
-	return retlen;
-}
-
-static ssize_t intel_spi_write(struct spi_nor *nor, loff_t to, size_t len,
-			       const u_char *write_buf)
-{
-	struct intel_spi *ispi = nor->priv;
-	size_t block_size, retlen = 0;
-	u32 val, status;
-	ssize_t ret;
-
-	/* Not needed with HW sequencer write, make sure it is cleared */
-	ispi->atomic_preopcode = 0;
-
-	while (len > 0) {
-		block_size = min_t(size_t, len, INTEL_SPI_FIFO_SZ);
-
-		/* Write cannot cross 4K boundary */
-		block_size = min_t(loff_t, to + block_size,
-				   round_up(to + 1, SZ_4K)) - to;
-
-		writel(to, ispi->base + FADDR);
-
-		val = readl(ispi->base + HSFSTS_CTL);
-		val &= ~(HSFSTS_CTL_FDBC_MASK | HSFSTS_CTL_FCYCLE_MASK);
-		val |= HSFSTS_CTL_AEL | HSFSTS_CTL_FCERR | HSFSTS_CTL_FDONE;
-		val |= (block_size - 1) << HSFSTS_CTL_FDBC_SHIFT;
-		val |= HSFSTS_CTL_FCYCLE_WRITE;
-
-		ret = intel_spi_write_block(ispi, write_buf, block_size);
-		if (ret) {
-			dev_err(ispi->dev, "failed to write block\n");
-			return ret;
-		}
-
-		/* Start the write now */
-		val |= HSFSTS_CTL_FGO;
-		writel(val, ispi->base + HSFSTS_CTL);
-
-		ret = intel_spi_wait_hw_busy(ispi);
-		if (ret) {
-			dev_err(ispi->dev, "timeout\n");
-			return ret;
-		}
-
-		status = readl(ispi->base + HSFSTS_CTL);
-		if (status & HSFSTS_CTL_FCERR)
-			ret = -EIO;
-		else if (status & HSFSTS_CTL_AEL)
-			ret = -EACCES;
-
-		if (ret < 0) {
-			dev_err(ispi->dev, "write error: %llx: %#x\n", to,
-				status);
-			return ret;
-		}
-
-		len -= block_size;
-		to += block_size;
-		retlen += block_size;
-		write_buf += block_size;
-	}
-
-	return retlen;
-}
-
-static int intel_spi_erase(struct spi_nor *nor, loff_t offs)
-{
-	size_t erase_size, len = nor->mtd.erasesize;
-	struct intel_spi *ispi = nor->priv;
-	u32 val, status, cmd;
-	int ret;
-
-	/* If the hardware can do 64k erase use that when possible */
-	if (len >= SZ_64K && ispi->erase_64k) {
-		cmd = HSFSTS_CTL_FCYCLE_ERASE_64K;
-		erase_size = SZ_64K;
-	} else {
-		cmd = HSFSTS_CTL_FCYCLE_ERASE;
-		erase_size = SZ_4K;
-	}
-
-	if (ispi->swseq_erase) {
-		while (len > 0) {
-			writel(offs, ispi->base + FADDR);
-
-			ret = intel_spi_sw_cycle(ispi, nor->erase_opcode,
-						 0, OPTYPE_WRITE_WITH_ADDR);
-			if (ret)
-				return ret;
-
-			offs += erase_size;
-			len -= erase_size;
-		}
-
-		return 0;
-	}
-
-	/* Not needed with HW sequencer erase, make sure it is cleared */
-	ispi->atomic_preopcode = 0;
-
-	while (len > 0) {
-		writel(offs, ispi->base + FADDR);
-
-		val = readl(ispi->base + HSFSTS_CTL);
-		val &= ~(HSFSTS_CTL_FDBC_MASK | HSFSTS_CTL_FCYCLE_MASK);
-		val |= HSFSTS_CTL_AEL | HSFSTS_CTL_FCERR | HSFSTS_CTL_FDONE;
-		val |= cmd;
-		val |= HSFSTS_CTL_FGO;
-		writel(val, ispi->base + HSFSTS_CTL);
-
-		ret = intel_spi_wait_hw_busy(ispi);
-		if (ret)
-			return ret;
-
-		status = readl(ispi->base + HSFSTS_CTL);
-		if (status & HSFSTS_CTL_FCERR)
-			return -EIO;
-		else if (status & HSFSTS_CTL_AEL)
-			return -EACCES;
-
-		offs += erase_size;
-		len -= erase_size;
-	}
-
-	return 0;
-}
-
-static bool intel_spi_is_protected(const struct intel_spi *ispi,
-				   unsigned int base, unsigned int limit)
-{
-	int i;
-
-	for (i = 0; i < ispi->pr_num; i++) {
-		u32 pr_base, pr_limit, pr_value;
-
-		pr_value = readl(ispi->pregs + PR(i));
-		if (!(pr_value & (PR_WPE | PR_RPE)))
-			continue;
-
-		pr_limit = (pr_value & PR_LIMIT_MASK) >> PR_LIMIT_SHIFT;
-		pr_base = pr_value & PR_BASE_MASK;
-
-		if (pr_base >= base && pr_limit <= limit)
-			return true;
-	}
-
-	return false;
-}
-
-/*
- * There will be a single partition holding all enabled flash regions. We
- * call this "BIOS".
- */
-static void intel_spi_fill_partition(struct intel_spi *ispi,
-				     struct mtd_partition *part)
-{
-	u64 end;
-	int i;
-
-	mem_clear(part, sizeof(*part));
-
-	/* Start from the mandatory descriptor region */
-	part->size = 4096;
-	part->name = "BIOS";
-
-	/*
-	 * Now try to find where this partition ends based on the flash
-	 * region registers.
-	 */
-	for (i = 1; i < ispi->nregions; i++) {
-		u32 region, base, limit;
-
-		region = readl(ispi->base + FREG(i));
-		base = region & FREG_BASE_MASK;
-		limit = (region & FREG_LIMIT_MASK) >> FREG_LIMIT_SHIFT;
-
-		if (base >= limit || limit == 0)
-			continue;
-
-		/*
-		 * If any of the regions have protection bits set, make the
-		 * whole partition read-only to be on the safe side.
-		 *
-		 * Also if the user did not ask the chip to be writeable
-		 * mask the bit too.
-		 */
-		if (!writeable || intel_spi_is_protected(ispi, base, limit))
-			part->mask_flags |= MTD_WRITEABLE;
-
-		end = (limit << 12) + 4096;
-		if (end > part->size)
-			part->size = end;
-	}
-}
-
-static const struct spi_nor_controller_ops intel_spi_controller_ops = {
-	.read_reg = intel_spi_read_reg,
-	.write_reg = intel_spi_write_reg,
-	.read = intel_spi_read,
-	.write = intel_spi_write,
-	.erase = intel_spi_erase,
-};
-
-struct intel_spi *intel_spi_probe(struct device *dev,
-	struct resource *mem, const struct intel_spi_boardinfo *info)
-{
-	const struct spi_nor_hwcaps hwcaps = {
-		.mask = SNOR_HWCAPS_READ |
-			SNOR_HWCAPS_READ_FAST |
-			SNOR_HWCAPS_PP,
-	};
-	struct mtd_partition part;
-	struct intel_spi *ispi;
-	int ret;
-
-	if (!info || !mem)
-		return ERR_PTR(-EINVAL);
-
-	ispi = devm_kzalloc(dev, sizeof(*ispi), GFP_KERNEL);
-	if (!ispi)
-		return ERR_PTR(-ENOMEM);
-
-	ispi->base = devm_ioremap_resource(dev, mem);
-	if (IS_ERR(ispi->base))
-		return ERR_CAST(ispi->base);
-
-	ispi->dev = dev;
-	ispi->info = info;
-
-	ret = intel_spi_init(ispi);
-	if (ret)
-		return ERR_PTR(ret);
-
-	ispi->nor.dev = ispi->dev;
-	ispi->nor.priv = ispi;
-	ispi->nor.controller_ops = &intel_spi_controller_ops;
-
-	ret = spi_nor_scan(&ispi->nor, NULL, &hwcaps);
-	if (ret) {
-		dev_info(dev, "failed to locate the chip\n");
-		return ERR_PTR(ret);
-	}
-
-	intel_spi_fill_partition(ispi, &part);
-
-	ret = mtd_device_register(&ispi->nor.mtd, &part, 1);
-	if (ret)
-		return ERR_PTR(ret);
-
-	return ispi;
-}
-EXPORT_SYMBOL_GPL(intel_spi_probe);
-
-int intel_spi_remove(struct intel_spi *ispi)
-{
-	return mtd_device_unregister(&ispi->nor.mtd);
-}
-EXPORT_SYMBOL_GPL(intel_spi_remove);
-
-MODULE_DESCRIPTION("Intel PCH/PCU SPI flash core driver");
-MODULE_AUTHOR("support");
-MODULE_LICENSE("GPL v2");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi_pci.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi_pci.c
deleted file mode 100644
index a89050b8a525..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi_pci.c
+++ /dev/null
@@ -1,106 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Intel PCH/PCU SPI flash PCI driver.
- *
- * Copyright (C) 2016, Intel Corporation
- * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
- */
-
-#include <linux/ioport.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/pci.h>
-
-#include "intel_spi.h"
-
-#define BCR		0xdc
-#define BCR_WPD		BIT(0)
-
-static bool intel_spi_pci_set_writeable(void __iomem *base, void *data)
-{
-	struct pci_dev *pdev = data;
-	u32 bcr;
-
-	/* Try to make the chip read/write */
-	pci_read_config_dword(pdev, BCR, &bcr);
-	if (!(bcr & BCR_WPD)) {
-		bcr |= BCR_WPD;
-		pci_write_config_dword(pdev, BCR, bcr);
-		pci_read_config_dword(pdev, BCR, &bcr);
-	}
-
-	return bcr & BCR_WPD;
-}
-
-static const struct intel_spi_boardinfo bxt_info = {
-	.type = INTEL_SPI_BXT,
-	.set_writeable = intel_spi_pci_set_writeable,
-};
-
-static const struct intel_spi_boardinfo cnl_info = {
-	.type = INTEL_SPI_CNL,
-	.set_writeable = intel_spi_pci_set_writeable,
-};
-
-static int intel_spi_pci_probe(struct pci_dev *pdev,
-			       const struct pci_device_id *id)
-{
-	struct intel_spi_boardinfo *info;
-	struct intel_spi *ispi;
-	int ret;
-
-	ret = pcim_enable_device(pdev);
-	if (ret)
-		return ret;
-
-	info = devm_kmemdup(&pdev->dev, (void *)id->driver_data, sizeof(*info),
-			    GFP_KERNEL);
-	if (!info)
-		return -ENOMEM;
-
-	info->data = pdev;
-	ispi = intel_spi_probe(&pdev->dev, &pdev->resource[0], info);
-	if (IS_ERR(ispi))
-		return PTR_ERR(ispi);
-
-	pci_set_drvdata(pdev, ispi);
-	return 0;
-}
-
-static void intel_spi_pci_remove(struct pci_dev *pdev)
-{
-	intel_spi_remove(pci_get_drvdata(pdev));
-}
-
-static const struct pci_device_id intel_spi_pci_ids[] = {
-	{ PCI_VDEVICE(INTEL, 0x02a4), (unsigned long)&bxt_info },
-	{ PCI_VDEVICE(INTEL, 0x06a4), (unsigned long)&bxt_info },
-	{ PCI_VDEVICE(INTEL, 0x18e0), (unsigned long)&bxt_info },
-	{ PCI_VDEVICE(INTEL, 0x19e0), (unsigned long)&bxt_info },
-	{ PCI_VDEVICE(INTEL, 0x1bca), (unsigned long)&bxt_info },
-	{ PCI_VDEVICE(INTEL, 0x34a4), (unsigned long)&bxt_info },
-	{ PCI_VDEVICE(INTEL, 0x43a4), (unsigned long)&cnl_info },
-	{ PCI_VDEVICE(INTEL, 0x4b24), (unsigned long)&bxt_info },
-	{ PCI_VDEVICE(INTEL, 0x4da4), (unsigned long)&bxt_info },
-	{ PCI_VDEVICE(INTEL, 0x7aa4), (unsigned long)&cnl_info },
-	{ PCI_VDEVICE(INTEL, 0xa0a4), (unsigned long)&bxt_info },
-	{ PCI_VDEVICE(INTEL, 0xa1a4), (unsigned long)&bxt_info },
-	{ PCI_VDEVICE(INTEL, 0xa224), (unsigned long)&bxt_info },
-	{ PCI_VDEVICE(INTEL, 0xa324), (unsigned long)&cnl_info },
-	{ PCI_VDEVICE(INTEL, 0xa3a4), (unsigned long)&bxt_info },
-	{ },
-};
-MODULE_DEVICE_TABLE(pci, intel_spi_pci_ids);
-
-static struct pci_driver intel_spi_pci_driver = {
-	.name = "intel-spi",
-	.id_table = intel_spi_pci_ids,
-	.probe = intel_spi_pci_probe,
-	.remove = intel_spi_pci_remove,
-};
-
-module_pci_driver(intel_spi_pci_driver);
-
-MODULE_DESCRIPTION("Intel PCH/PCU SPI flash PCI driver");
-MODULE_AUTHOR("support");
-MODULE_LICENSE("GPL v2");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi_platform.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi_platform.c
deleted file mode 100644
index 489716d4d545..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/intel_spi/intel_spi_platform.c
+++ /dev/null
@@ -1,168 +0,0 @@
-/*
- * Intel PCH/PCU SPI flash platform driver.
- *
- * Copyright (C) 2016, Intel Corporation
- * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/ioport.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/pci.h>
-
-#include "intel_spi.h"
-
-#define PCI_VENDOR_ID_D1527_LPC             (0x8c54)
-
-#define BIOS_CNTL             (0xdc)
-#define BIOS_CNTL_SRC_SHIFT    2
-#define BIOS_CNTL_WN          BIT(0)
-#define BIOS_CNTL_BLE         BIT(1)
-#define BIOS_CNTL_SMM_BMP     BIT(5)
-
-#define RCBABASE		0xf0
-
-int intel_spi_platform_debug = 0;
-module_param(intel_spi_platform_debug, int, S_IRUGO | S_IWUSR);
-int intel_spi_platform_error = 0;
-module_param(intel_spi_platform_error, int, S_IRUGO | S_IWUSR);
-
-static bool writeable;
-module_param(writeable, bool, 0);
-MODULE_PARM_DESC(writeable, "Enable write access to BIOS (default=0)");
-
-#define INTEL_SPI_PLATFORM_VERBOSE(fmt, args...) do {                                        \
-        if (intel_spi_platform_debug) { \
-            printk(KERN_INFO "[INTEL_SPI_PLATFORM][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-        } \
-    } while (0)
-
-#define INTEL_SPI_PLATFORM_ERROR(fmt, args...) do {                                        \
-        if (intel_spi_platform_error) { \
-            printk(KERN_ERR "[INTEL_SPI_PLATFORM][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-        } \
-    } while (0)
-
-static void intel_spi_enable_bios_write(struct pci_dev *pci_dev, struct intel_spi_boardinfo *info, int *writeable_flag)
-{
-    u8 bios_cntl, value, want, new;
-
-    if (writeable) {
-        pci_read_config_byte(pci_dev, BIOS_CNTL, &bios_cntl);
-        want = bios_cntl;
-        value = (bios_cntl >> BIOS_CNTL_SRC_SHIFT) & 0x3 ;
-        if (value == 0x3) {
-            INTEL_SPI_PLATFORM_VERBOSE("invalid prefetching/caching settings, ");
-        } else {
-            INTEL_SPI_PLATFORM_VERBOSE("prefetching %sabled, caching %sabled, ",
-                (value & 0x2) ? "en" : "dis",
-                (value & 0x1) ? "dis" : "en");
-        }
-
-        /* writeable regardless */
-        want &= ~BIOS_CNTL_SMM_BMP;
-        /* write enable */
-        want |= BIOS_CNTL_WN;
-        /* BIOS lock disabled */
-        want &= ~BIOS_CNTL_BLE;
-        INTEL_SPI_PLATFORM_VERBOSE("bios cntl is:0x%x, want is:0x%x\n", bios_cntl, want);
-        pci_write_config_byte(pci_dev, BIOS_CNTL, want);
-        pci_read_config_byte(pci_dev, BIOS_CNTL, &new);
-        INTEL_SPI_PLATFORM_VERBOSE("\nBIOS_CNTL = 0x%02x: ", new);
-        INTEL_SPI_PLATFORM_VERBOSE("BIOS Lock Enable: %sabled, ", (new & BIOS_CNTL_BLE) ? "en" : "dis");
-        INTEL_SPI_PLATFORM_VERBOSE("BIOS Write Enable: %sabled\n", (new & BIOS_CNTL_WN) ? "en" : "dis");
-
-        if (new & BIOS_CNTL_SMM_BMP) {
-            INTEL_SPI_PLATFORM_VERBOSE("BIOS region SMM protection is enabled!\n");
-        }
-
-        if (new != want) {
-            INTEL_SPI_PLATFORM_VERBOSE("Warning: Setting Bios Control at 0x%x from 0x%02x to 0x%02x failed.\n"
-                "New value is 0x%02x.\n", BIOS_CNTL, value, want, new);
-        } else {
-            *writeable_flag = !!(new & BIOS_CNTL_WN);
-        }
-        INTEL_SPI_PLATFORM_VERBOSE("Bios Control is 0x%x\n", new);
-    } else {
-        INTEL_SPI_PLATFORM_VERBOSE("Bios don't write\n");
-    }
-
-    return ;
-}
-
-static int intel_spi_platform_probe(struct platform_device *pdev)
-{
-	struct intel_spi_boardinfo *info;
-	struct intel_spi *ispi;
-	struct resource *mem;
-    struct pci_dev *pci_dev = NULL;
-    u32 rcba;
-    int writeable_flag = 0;
-
-	info = dev_get_platdata(&pdev->dev);
-	if (!info)
-		return -EINVAL;
-
-    pci_dev = pci_get_device(PCI_VENDOR_ID_INTEL, PCI_VENDOR_ID_D1527_LPC, pci_dev);
-    if (!pci_dev) {
-        INTEL_SPI_PLATFORM_ERROR("pci_get_device(0x8086, 0x8c54) failed!\n");
-        return -1;
-    }
-
-    switch (info->type) {
-    case INTEL_SPI_LPT:
-        pci_read_config_dword(pci_dev, RCBABASE, &rcba);
-        if (rcba & 1) {
-            intel_spi_enable_bios_write(pci_dev, info, &writeable_flag);
-        }
-        break;
-    default:
-        INTEL_SPI_PLATFORM_ERROR("info type[%d] not need set writeable.\n",info->type);
-        break;
-    }
-    INTEL_SPI_PLATFORM_VERBOSE("intel spi boardinfo writeable is %sabled\n",
-            writeable_flag ? "en" : "dis");
-
-	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	ispi = intel_spi_probe(&pdev->dev, mem, info);
-	if (IS_ERR(ispi))
-		return PTR_ERR(ispi);
-
-	platform_set_drvdata(pdev, ispi);
-	return 0;
-}
-
-static int intel_spi_platform_remove(struct platform_device *pdev)
-{
-	struct intel_spi *ispi = platform_get_drvdata(pdev);
-
-	return intel_spi_remove(ispi);
-}
-
-static struct of_device_id intel_spi_match[] = {
-    {
-        .compatible = "spi-c224",
-    },
-    {},
-};
-MODULE_DEVICE_TABLE(of, intel_spi_match);
-
-static struct platform_driver intel_spi_platform_driver = {
-	.probe = intel_spi_platform_probe,
-	.remove = intel_spi_platform_remove,
-	.driver = {
-		.name = "intel-spi",
-		.of_match_table = intel_spi_match,
-	},
-};
-
-module_platform_driver(intel_spi_platform_driver);
-
-MODULE_DESCRIPTION("Intel PCH/PCU SPI flash platform driver");
-MODULE_AUTHOR("support");
-MODULE_LICENSE("GPL v2");
-MODULE_ALIAS("platform:intel-spi");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_ismt.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_ismt.c
index a10ed02708cf..94a3ed827209 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_ismt.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_ismt.c
@@ -66,12 +66,24 @@
 #include <linux/i2c.h>
 #include <linux/acpi.h>
 #include <linux/interrupt.h>
+#include <linux/delay.h>
 
 #include <linux/io-64-nonatomic-lo-hi.h>
+#include <linux/string.h>
+
+#define mem_clear(data, size) memset((data), 0, (size))
 
 /* PCI Address Constants */
 #define SMBBAR		0
 
+#define ISMT_DBCTRL		0x388	/* ISMT PIN Control Register */
+#define ISMT_DBSTS		0X38C	/* ISMT PIN Status Register */
+
+#define ISMT_DBSTS_CLK_STS	(1<<9)	/* bit9 SMBCLK_CUR_STS */
+#define ISMT_DBSTS_SDA_STS	(1<<8)	/* bit8 SMBDATA_CUR_STS */
+#define ISMT_DBCTRL_CLK_CTL	(1<<1)	/* bit1 SMBCLK_CTL */
+#define ISMT_DBCTRL_ENABLE	(1<<31)	/* bit31 EN */
+
 /* PCI DIDs for the Intel SMBus Message Transport (SMT) Devices */
 #define PCI_DEVICE_ID_INTEL_S1200_SMT0	0x0c59
 #define PCI_DEVICE_ID_INTEL_S1200_SMT1	0x0c5a
@@ -197,6 +209,11 @@ static unsigned int bus_speed;
 module_param(bus_speed, uint, S_IRUGO);
 MODULE_PARM_DESC(bus_speed, "Bus Speed in kHz (0 = BIOS default)");
 
+static unsigned int dma_reset_timeout = 1000;
+module_param(dma_reset_timeout, uint, S_IRUGO);
+
+static void ismt_hw_init(struct ismt_priv *priv);
+
 /**
  * __ismt_desc_dump() - dump the contents of a specific descriptor
  * @dev: the iSMT device
@@ -230,6 +247,39 @@ static void ismt_desc_dump(struct ismt_priv *priv)
 	__ismt_desc_dump(dev, desc);
 }
 
+static void ismt_reset_dma(struct ismt_priv *priv)
+{
+    uint val;
+    u16 ctrl;
+    struct pci_dev *pdev;
+    u32 addr_lo, addr_hi;
+
+    /* save msiaddr */
+    pdev = priv->pci_dev;
+    pci_read_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_LO, &addr_lo);
+    pci_read_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, &addr_hi);
+
+    /* Clear the start bit */
+    val = readl(priv->smba + ISMT_MSTR_MCTRL);
+    val &= ~ISMT_MCTRL_SS;
+    writel(val, priv->smba + ISMT_MSTR_MCTRL);
+
+    val = readl(priv->smba + ISMT_GR_GCTRL);
+    writel(val | ISMT_GCTRL_KILL | ISMT_GCTRL_TRST | ISMT_GCTRL_SRST, priv->smba + ISMT_GR_GCTRL);
+
+    if (dma_reset_timeout > 0) {
+        usleep_range(dma_reset_timeout, dma_reset_timeout + 1);
+    }
+
+    ismt_hw_init(priv);
+    pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_LO, addr_lo);
+    pci_write_config_dword(pdev, pdev->msi_cap + PCI_MSI_ADDRESS_HI, addr_hi);
+    /* enable msi */
+    pci_read_config_word(pdev, pdev->msi_cap + PCI_MSI_FLAGS, &ctrl);
+    ctrl |= PCI_MSI_FLAGS_ENABLE;
+    pci_write_config_word(pdev, pdev->msi_cap + PCI_MSI_FLAGS, ctrl);
+}
+
 /**
  * ismt_gen_reg_dump() - dump the iSMT General Registers
  * @priv: iSMT private data
@@ -381,6 +431,94 @@ static int ismt_process_desc(const struct ismt_desc *desc,
 	return -EIO;
 }
 
+static void ismt_setscl(struct ismt_priv *priv, unsigned int level)
+{
+    int pin_status;
+
+    pin_status = readl(priv->smba + ISMT_DBCTRL);
+    if (level == 0) {
+        pin_status &= (~ISMT_DBCTRL_CLK_CTL);
+    } else {
+        pin_status |= ISMT_DBCTRL_CLK_CTL;
+    }
+    writel(pin_status, priv->smba + ISMT_DBCTRL);
+    pin_status = readl(priv->smba + ISMT_DBCTRL);
+    dev_dbg(&priv->pci_dev->dev, "dbctrl status = 0x%04x\r\n", pin_status);
+    return;
+}
+
+static void ismt_i2c_unblock(struct ismt_priv *priv)
+{
+    int i;
+    int pin_status, ori_status;
+
+    pin_status = readl(priv->smba + ISMT_DBCTRL);
+    ori_status = pin_status;
+    if ((pin_status & ISMT_DBCTRL_ENABLE) == 0) {
+        pin_status |= ISMT_DBCTRL_ENABLE;
+        writel(pin_status, priv->smba + ISMT_DBCTRL);
+        pin_status = readl(priv->smba + ISMT_DBCTRL);
+        dev_dbg(&priv->pci_dev->dev, "enable dbctrl pin status = 0x%04x\r\n", pin_status);
+    }
+
+    for (i = 0; i < 10; i++) {
+        ismt_setscl(priv, 0);
+        udelay(5);
+        ismt_setscl(priv, 1);
+        udelay(5);
+    }
+
+    pin_status = readl(priv->smba + ISMT_DBCTRL);
+    if (pin_status != ori_status) {
+        writel(ori_status, priv->smba + ISMT_DBCTRL);
+        pin_status = readl(priv->smba + ISMT_DBCTRL);
+        dev_dbg(&priv->pci_dev->dev, "reback dbctrl pin status = 0x%04x\r\n", pin_status);
+    }
+
+    return;
+}
+
+static int ismt_check_i2c_unblock(struct ismt_priv *priv)
+{
+    int pin_status;
+
+    pin_status = readl(priv->smba + ISMT_DBSTS);
+
+    if ( (!(pin_status & ISMT_DBSTS_SDA_STS) ) && (pin_status & ISMT_DBSTS_CLK_STS) ) {
+        dev_dbg(&priv->pci_dev->dev, "SDA is low, send 9 clock to device!\n");
+        ismt_i2c_unblock(priv);
+    }
+    return 0;
+}
+
+static int ismt_check_i2c_scl(struct ismt_priv *priv)
+{
+    int pin_status;
+
+    pin_status = readl(priv->smba + ISMT_DBSTS);
+
+    if ( (pin_status & ISMT_DBSTS_SDA_STS) && (pin_status & ISMT_DBSTS_CLK_STS) ) {
+        return 0;
+    }
+
+    dev_warn(&priv->pci_dev->dev, "SDA or SCL is low.pin_status:0x%x\n", pin_status);
+    return -1;
+}
+
+/* Make sure the SMBus host is ready to start transmitting.
+   Return 0 if it is, -EIO if it is not. */
+static int ismt_check_pre(struct ismt_priv *priv)
+{
+    ismt_check_i2c_unblock(priv);
+
+    /* SDA or SCL is low, return -EIO */
+    if (ismt_check_i2c_scl(priv)) {
+        return -EIO;
+    }
+
+    return 0;
+}
+
 /**
  * ismt_access() - process an SMBus command
  * @adap: the i2c host adapter
@@ -405,17 +543,22 @@ static int ismt_access(struct i2c_adapter *adap, u16 addr,
 	struct device *dev = &priv->pci_dev->dev;
 	u8 *dma_buffer = PTR_ALIGN(&priv->buffer[0], 16);
 
+	ret = ismt_check_pre(priv);
+	if (ret < 0) {
+		return ret;
+	}
+
 	desc = &priv->hw[priv->head];
 
 	/* Initialize the DMA buffer */
-	memset(priv->buffer, 0, sizeof(priv->buffer));
+	mem_clear(priv->buffer, sizeof(priv->buffer));
 
 	/* Initialize the descriptor */
-	memset(desc, 0, sizeof(struct ismt_desc));
+	mem_clear(desc, sizeof(struct ismt_desc));
 	desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, read_write);
 
 	/* Always clear the log entries */
-	memset(priv->log, 0, ISMT_LOG_ENTRIES * sizeof(u32));
+	mem_clear(priv->log, ISMT_LOG_ENTRIES * sizeof(u32));
 
 	/* Initialize common control bits */
 	if (likely(pci_dev_msi_enabled(priv->pci_dev)))
@@ -623,15 +766,17 @@ static int ismt_access(struct i2c_adapter *adap, u16 addr,
 		dma_unmap_single(dev, dma_addr, dma_size, dma_direction);
 
 	if (unlikely(!time_left)) {
-		dev_err(dev, "completion wait timed out\n");
+		dev_warn(dev, "completion wait timed out:addr[%d-0x%x], read_write[%d], command[0x%x], size[%d]\n",
+					adap->nr, addr, read_write, command, size);
+		ismt_reset_dma(priv);
 		ret = -ETIMEDOUT;
-		goto out;
+		priv->head = 0;
+		return ret;
 	}
 
 	/* do any post processing of the descriptor here */
 	ret = ismt_process_desc(desc, data, priv, size, read_write);
 
-out:
 	/* Update the ring pointer */
 	priv->head++;
 	priv->head %= ISMT_DESC_ENTRIES;
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.c
index 81cecfa02e12..854675d9fa99 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.c
@@ -64,6 +64,9 @@
 #define I2C_RETRY_TIMES         5
 #define I2C_RETRY_WAIT_TIMES    10      /*delay 10ms*/
 
+#define WIDTH_1Byte          (1)
+#define WIDTH_4Byte          (4)
+
 typedef struct pca9548_cfg_info_s {
     uint32_t pca9548_base_nr;
     uint32_t pca9548_reset_type;
@@ -473,8 +476,11 @@ static int pca954x_do_file_reset(struct i2c_mux_core *muxc)
     struct pca954x *data;
     pca9548_cfg_info_t *reset_cfg;
     file_attr_t *file_attr;
-    u8 val;
     int udelay_cnt;
+    uint8_t read_value[4], write_reset_on_value[4], write_reset_off_value[4];
+    uint8_t tmp_read8;
+    uint32_t tmp_read32, tmp_write32;
+
 
     data = i2c_mux_priv(muxc);
     reset_cfg = &data->pca9548_cfg_info;
@@ -483,21 +489,41 @@ static int pca954x_do_file_reset(struct i2c_mux_core *muxc)
 
     PCA954X_DEBUG("rst_delay_b:%u, rst_delay:%u, rst_delay_a:%u.\n",
         reset_cfg->rst_delay_b, reset_cfg->rst_delay, reset_cfg->rst_delay_a);
-    PCA954X_DEBUG("dev_name:%s, offset:0x%x, mask:0x%x, on:0x%x, off:0x%x.\n",
+    PCA954X_DEBUG("dev_name:%s, offset:0x%x, mask:0x%x, on:0x%x, off:0x%x, width: %u\n",
         file_attr->dev_name, file_attr->offset, file_attr->mask,
-        file_attr->reset_on, file_attr->reset_off);
+        file_attr->reset_on, file_attr->reset_off, file_attr->width);
 
     if (reset_cfg->rst_delay_b) {
         usleep_range(reset_cfg->rst_delay_b, reset_cfg->rst_delay_b + 1);
     }
 
-    err = pca954x_reset_file_read(file_attr->dev_name, file_attr->offset, &val, sizeof(val));
+    mem_clear(read_value, sizeof(read_value));
+    mem_clear(write_reset_on_value, sizeof(write_reset_on_value));
+    mem_clear(write_reset_off_value, sizeof(write_reset_off_value));
+    err = pca954x_reset_file_read(file_attr->dev_name, file_attr->offset, read_value, file_attr->width);
     if (err < 0) {
         goto out;
     }
-    val &= ~(file_attr->mask);
-    val |= file_attr->reset_on;
-    err = pca954x_reset_file_write(file_attr->dev_name, file_attr->offset, &val, sizeof(val));
+
+    if (file_attr->width == WIDTH_1Byte) {
+        tmp_read8 = read_value[0];
+        write_reset_on_value[0] = ((tmp_read8 & (~file_attr->mask)) | file_attr->reset_on) & 0xFF;
+        write_reset_off_value[0] = ((tmp_read8 & (~file_attr->mask)) | file_attr->reset_off) & 0xFF;
+        PCA954X_DEBUG("1 byte write reset on val[0]: 0x%x, write reset off valu[0]: 0x%x\n",
+            write_reset_on_value[0], write_reset_off_value[0]);
+    } else {
+        memcpy((uint8_t *)&tmp_read32, read_value, 4);
+        tmp_write32 = (tmp_read32 & (~file_attr->mask)) | file_attr->reset_on;
+        memcpy(write_reset_on_value, (uint8_t *)&tmp_write32, 4);
+        tmp_write32 = (tmp_read32 & (~file_attr->mask)) | file_attr->reset_off;
+        memcpy(write_reset_off_value, (uint8_t *)&tmp_write32, 4);
+        PCA954X_DEBUG("4 byte write reset on val[0]:0x%x, val[1]:0x%x, val[2]:0x%x, val[3]:0x%x",
+            write_reset_on_value[0], write_reset_on_value[1], write_reset_on_value[2], write_reset_on_value[3]);
+        PCA954X_DEBUG("4 byte write reset off val[0]:0x%x, val[1]:0x%x, val[2]:0x%x, val[3]:0x%x",
+            write_reset_off_value[0], write_reset_off_value[1], write_reset_off_value[2], write_reset_off_value[3]);
+    }
+
+    err = pca954x_reset_file_write(file_attr->dev_name, file_attr->offset, write_reset_on_value, file_attr->width);
     if (err < 0) {
         goto out;
     }
@@ -506,9 +532,7 @@ static int pca954x_do_file_reset(struct i2c_mux_core *muxc)
         usleep_range(reset_cfg->rst_delay, reset_cfg->rst_delay + 1);
     }
 
-    val &= ~(file_attr->mask);
-    val |= file_attr->reset_off;
-    err = pca954x_reset_file_write(file_attr->dev_name, file_attr->offset, &val, sizeof(val));
+    err = pca954x_reset_file_write(file_attr->dev_name, file_attr->offset, write_reset_off_value, file_attr->width);
     if (err < 0) {
         goto out;
     }
@@ -517,12 +541,17 @@ static int pca954x_do_file_reset(struct i2c_mux_core *muxc)
     timeout = reset_cfg->rst_delay_a;
     while (timeout > 0) {
         usleep_range(1, 2);
-        err = pca954x_reset_file_read(file_attr->dev_name, file_attr->offset, &val, sizeof(val));
+        err = pca954x_reset_file_read(file_attr->dev_name, file_attr->offset, read_value, file_attr->width);
         if (err < 0) {
             goto out;
         }
-        val &= (file_attr->mask);
-        if (val == file_attr->reset_off) {
+        if (file_attr->width == WIDTH_1Byte) {
+            tmp_read32 = read_value[0];
+        } else {
+            memcpy((uint8_t *)&tmp_read32, read_value, 4);
+        }
+        tmp_read32 &= (file_attr->mask);
+        if (tmp_read32 == file_attr->reset_off) {
             ret = 0;
             PCA954X_DEBUG("pca954x_do_file_reset success.\n");
             break;
@@ -968,7 +997,7 @@ static int pca954x_irq_setup(struct i2c_mux_core *muxc)
 
 static int of_pca954x_reset_data_init(struct pca954x *data)
 {
-    int err;
+    int err, rv;
     struct device *dev = &data->client->dev;
     pca9548_cfg_info_t *reset_cfg;
 
@@ -1002,7 +1031,6 @@ static int of_pca954x_reset_data_init(struct pca954x *data)
         reset_cfg->rst_delay, reset_cfg->rst_delay_a);
 
     if (reset_cfg->pca9548_reset_type == PCA9548_RESET_I2C) {
-
         PCA954X_DEBUG("reset by i2c.\n");
         err = of_property_read_u32(dev->of_node, "i2c_bus", &reset_cfg->attr.i2c_attr.i2c_bus);
         err |=of_property_read_u32(dev->of_node, "i2c_addr", &reset_cfg->attr.i2c_attr.i2c_addr);
@@ -1018,7 +1046,6 @@ static int of_pca954x_reset_data_init(struct pca954x *data)
             reset_cfg->attr.i2c_attr.reg_offset, reset_cfg->attr.i2c_attr.mask,
             reset_cfg->attr.i2c_attr.reset_on, reset_cfg->attr.i2c_attr.reset_off);
     } else if (reset_cfg->pca9548_reset_type == PCA9548_RESET_GPIO) {
-
         PCA954X_DEBUG("reset by gpio.\n");
         err = of_property_read_u32(dev->of_node, "gpio", &reset_cfg->attr.gpio_attr.gpio);
         err |=of_property_read_u32(dev->of_node, "reset_on", &reset_cfg->attr.gpio_attr.reset_on);
@@ -1031,7 +1058,6 @@ static int of_pca954x_reset_data_init(struct pca954x *data)
             reset_cfg->attr.gpio_attr.reset_off);
         reset_cfg->attr.gpio_attr.gpio_init = 0;
     } else if (reset_cfg->pca9548_reset_type == PCA9548_RESET_IO) {
-
         PCA954X_DEBUG("reset by io.\n");
         err = of_property_read_u32(dev->of_node, "io_addr", &reset_cfg->attr.io_attr.io_addr);
         err |=of_property_read_u32(dev->of_node, "mask", &reset_cfg->attr.io_attr.mask);
@@ -1044,7 +1070,6 @@ static int of_pca954x_reset_data_init(struct pca954x *data)
             reset_cfg->attr.io_attr.io_addr, reset_cfg->attr.io_attr.mask,
             reset_cfg->attr.io_attr.reset_on, reset_cfg->attr.io_attr.reset_off);
     } else if (reset_cfg->pca9548_reset_type == PCA9548_RESET_FILE) {
-
         PCA954X_DEBUG("reset by file.\n");
         err = of_property_read_string(dev->of_node, "dev_name", &reset_cfg->attr.file_attr.dev_name);
         err |=of_property_read_u32(dev->of_node, "offset", &reset_cfg->attr.file_attr.offset);
@@ -1054,9 +1079,18 @@ static int of_pca954x_reset_data_init(struct pca954x *data)
         if (err) {
             goto dts_config_err;
         }
-        PCA954X_DEBUG("dev_name:%s, mask:0x%x, reset_on:0x%x, reset_off:0x%x.\n",
+        rv = of_property_read_u32(dev->of_node, "width", &reset_cfg->attr.file_attr.width);
+        if (rv == 0) {
+            if ((reset_cfg->attr.file_attr.width != WIDTH_1Byte) && (reset_cfg->attr.file_attr.width != WIDTH_4Byte)) {
+                PCA954X_ERROR("9548 reset config error, witdh: %u not support.\n", reset_cfg->attr.file_attr.width);
+                return -EINVAL;
+            }
+        } else {
+            reset_cfg->attr.file_attr.width = 1;
+        }
+        PCA954X_DEBUG("dev_name:%s, mask:0x%x, reset_on:0x%x, reset_off:0x%x, width: %u\n",
             reset_cfg->attr.file_attr.dev_name, reset_cfg->attr.file_attr.mask,
-            reset_cfg->attr.file_attr.reset_on, reset_cfg->attr.file_attr.reset_off);
+            reset_cfg->attr.file_attr.reset_on, reset_cfg->attr.file_attr.reset_off, reset_cfg->attr.file_attr.width);
     } else {
         PCA954X_ERROR("Unsupport reset type:%d.\n", reset_cfg->pca9548_reset_type);
         goto dts_config_err;
@@ -1097,7 +1131,6 @@ static int pca954x_reset_data_init(struct pca954x *data)
         reset_cfg->rst_delay, reset_cfg->rst_delay_a);
 
     if (reset_cfg->pca9548_reset_type == PCA9548_RESET_I2C) {
-
         PCA954X_DEBUG("reset by i2c.\n");
         reset_cfg->attr.i2c_attr.i2c_bus = i2c_mux_pca954x_device->attr.i2c_attr.i2c_bus;
         reset_cfg->attr.i2c_attr.i2c_addr = i2c_mux_pca954x_device->attr.i2c_attr.i2c_addr;
@@ -1110,7 +1143,6 @@ static int pca954x_reset_data_init(struct pca954x *data)
             reset_cfg->attr.i2c_attr.reg_offset, reset_cfg->attr.i2c_attr.mask,
             reset_cfg->attr.i2c_attr.reset_on, reset_cfg->attr.i2c_attr.reset_off);
     } else if (reset_cfg->pca9548_reset_type == PCA9548_RESET_GPIO) {
-
         PCA954X_DEBUG("reset by gpio.\n");
         reset_cfg->attr.gpio_attr.gpio = i2c_mux_pca954x_device->attr.gpio_attr.gpio;
         reset_cfg->attr.gpio_attr.reset_on = i2c_mux_pca954x_device->attr.gpio_attr.reset_on;
@@ -1120,7 +1152,6 @@ static int pca954x_reset_data_init(struct pca954x *data)
             reset_cfg->attr.gpio_attr.reset_off);
         reset_cfg->attr.gpio_attr.gpio_init = 0;
     } else if (reset_cfg->pca9548_reset_type == PCA9548_RESET_IO) {
-
         PCA954X_DEBUG("reset by io.\n");
         reset_cfg->attr.io_attr.io_addr = i2c_mux_pca954x_device->attr.io_attr.io_addr;
         reset_cfg->attr.io_attr.mask = i2c_mux_pca954x_device->attr.io_attr.mask;
@@ -1130,15 +1161,24 @@ static int pca954x_reset_data_init(struct pca954x *data)
             reset_cfg->attr.io_attr.io_addr, reset_cfg->attr.io_attr.mask,
             reset_cfg->attr.io_attr.reset_on, reset_cfg->attr.io_attr.reset_off);
     } else if (reset_cfg->pca9548_reset_type == PCA9548_RESET_FILE) {
-
+        PCA954X_DEBUG("reset by file.\n");
         reset_cfg->attr.file_attr.dev_name = i2c_mux_pca954x_device->attr.file_attr.dev_name;
         reset_cfg->attr.file_attr.offset = i2c_mux_pca954x_device->attr.file_attr.offset;
         reset_cfg->attr.file_attr.mask = i2c_mux_pca954x_device->attr.file_attr.mask;
         reset_cfg->attr.file_attr.reset_on = i2c_mux_pca954x_device->attr.file_attr.reset_on;
         reset_cfg->attr.file_attr.reset_off = i2c_mux_pca954x_device->attr.file_attr.reset_off;
-        PCA954X_DEBUG("dev_name:%s, mask:0x%x, reset_on:0x%x, reset_off:0x%x.\n",
+        reset_cfg->attr.file_attr.width = i2c_mux_pca954x_device->attr.file_attr.width;
+        if (reset_cfg->attr.file_attr.width > 0) {
+            if ((reset_cfg->attr.file_attr.width != WIDTH_1Byte) && (reset_cfg->attr.file_attr.width != WIDTH_4Byte)) {
+                PCA954X_ERROR("9548 reset config error, witdh: %u not support.\n", reset_cfg->attr.file_attr.width);
+                return -EINVAL;
+            }
+        } else {
+            reset_cfg->attr.file_attr.width = 1;
+        }
+        PCA954X_DEBUG("dev_name:%s, mask:0x%x, reset_on:0x%x, reset_off:0x%x, width: %u\n",
             reset_cfg->attr.file_attr.dev_name, reset_cfg->attr.file_attr.mask,
-            reset_cfg->attr.file_attr.reset_on, reset_cfg->attr.file_attr.reset_off);
+            reset_cfg->attr.file_attr.reset_on, reset_cfg->attr.file_attr.reset_off, reset_cfg->attr.file_attr.width);
     } else {
         PCA954X_ERROR("Unsupport reset type:%d.\n", reset_cfg->pca9548_reset_type);
         return -EINVAL;
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.h
index 9cbe162782c5..beed9b2f94ac 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.h
@@ -35,6 +35,7 @@ typedef struct file_attr_s {
     uint32_t mask;
     uint32_t reset_on;
     uint32_t reset_off;
+    uint32_t width;
 } file_attr_t;
 
 typedef struct gpio_attr_s {
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_isl68137.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_isl68137.c
index 5b3b54d92180..648020435311 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_isl68137.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_isl68137.c
@@ -206,6 +206,11 @@ static ssize_t isl68137_avs_vout_store(struct device *dev, struct device_attribu
         return -EINVAL;
     }
 
+    if (vout <= 0) {
+        WB_ISL68137_ERROR("%d-%04x: invalid value: %d \n", client->adapter->nr, client->addr, vout);
+        return -EINVAL;
+    }
+
     vout_max = data->vout_max[attr->index];
     vout_min = data->vout_min[attr->index];
     if ((vout > vout_max) || (vout < vout_min)) {
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ucd9000.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ucd9000.c
index 5c3d125afb6d..c451105050b3 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ucd9000.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ucd9000.c
@@ -96,18 +96,61 @@ struct ucd9000_debugfs_entry {
     u8 index;
 };
 
+static int wb_i2c_smbus_read_block_data_tmp(const struct i2c_client *client, u8 command, u8 *values)
+{
+
+    struct i2c_msg msg[2];
+    int status;
+    u8 read_buf[I2C_SMBUS_BLOCK_MAX + 1];
+    int read_len, val_len;
+
+    val_len = i2c_smbus_read_byte_data(client, command);
+    if (val_len < 0) {
+        WB_UDC9000_ERROR("read byte failed. nr:%d, addr:0x%x, reg:0x%x, ret:%d.\n",
+            client->adapter->nr, client->addr, command, val_len);
+        return -ENXIO;
+    }
+    read_len = val_len + 1;
+    if (read_len > sizeof(read_buf)) {
+        WB_UDC9000_ERROR("Out of memory, val_len: %d, read length: %d, read buf len: %lu.\n",
+            val_len, read_len, sizeof(read_buf));
+        return -ENOMEM;
+    }
+
+    memset(msg, 0, sizeof(msg));
+    msg[0].addr = client->addr;
+    msg[0].buf = &command;
+    msg[0].len = 1;
+
+    msg[1].addr = client->addr;
+    msg[1].flags = I2C_M_RD;
+    msg[1].buf = read_buf;
+    msg[1].len = read_len;
+
+    status = i2c_transfer(client->adapter, msg, 2);
+    if (status != 2) {
+        WB_UDC9000_ERROR("i2c_transfer failed. nr:%d, addr:0x%x, reg:0x%x, read len:%d, status:%d.\n",
+            client->adapter->nr, client->addr, command, read_len, status);
+        return -EIO;
+    }
+    WB_UDC9000_VERBOSE("read_block_data success. nr:%d, addr:0x%x, reg:0x%x, read len:%d",
+        client->adapter->nr, client->addr, command, read_len);
+    memcpy(values, &read_buf[1], val_len);
+    return val_len;
+}
+
 static int wb_i2c_smbus_read_block_data(const struct i2c_client *client, u8 command, u8 *values)
 {
     int rv, i;
 
     for(i = 0; i < UCD9000_RETRY_TIME; i++) {
-        rv = i2c_smbus_read_block_data(client, command, values);
+        rv = wb_i2c_smbus_read_block_data_tmp(client, command, values);
         if(rv >= 0){
             return rv;
         }
         usleep_range(UCD9000_RETRY_SLEEP_TIME, UCD9000_RETRY_SLEEP_TIME + 1);
     }
-    WB_UDC9000_ERROR("read_block_data failed. nr:%d, addr:0x%x, reg:0x%x, rv:%d.",
+    WB_UDC9000_ERROR("read_block_data failed. nr:  %d, addr: 0x%x, reg: 0x%x, rv: %d\n",
         client->adapter->nr, client->addr, command, rv);
     return rv;
 }
@@ -537,8 +580,7 @@ static int ucd9000_probe(struct i2c_client *client)
     int i, ret;
 
     if (!i2c_check_functionality(client->adapter,
-                     I2C_FUNC_SMBUS_BYTE_DATA |
-                     I2C_FUNC_SMBUS_BLOCK_DATA))
+                     I2C_FUNC_SMBUS_BYTE_DATA))
         return -ENODEV;
 
     ret = wb_i2c_smbus_read_block_data(client, UCD9000_DEVICE_ID,
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe12284.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe12284.c
index 404c349f51f0..f45d683e3464 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe12284.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe12284.c
@@ -77,7 +77,6 @@ static int xdpe122_data2reg_vid(struct pmbus_data *data, int page, long val)
     return 0;
 }
 
-
 /*
  * Convert VID sensor values to milli- or micro-units
  * depending on sensor type.
@@ -164,6 +163,11 @@ static ssize_t xdpe122_avs_vout_store(struct device *dev, struct device_attribut
         return -EINVAL;
     }
 
+    if (vout <= 0) {
+        WB_XDPE122_ERROR("%d-%04x: invalid value: %d \n", client->adapter->nr, client->addr, vout);
+        return -EINVAL;
+    }
+
     vout_max = data->vout_max[attr->index];
     vout_min = data->vout_min[attr->index];
     if ((vout > vout_max) || (vout < vout_min)) {
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c
index 873f13e6ae2b..dd7a97afb9ec 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c
@@ -10,30 +10,22 @@
 #include <linux/mutex.h>
 #include "wb_pmbus.h"
 
-typedef enum {
-    DBG_START,
-    DBG_VERBOSE,
-    DBG_KEY,
-    DBG_WARN,
-    DBG_ERROR,
-    DBG_END,
-} dbg_level_t;
-
-static int debuglevel = 0;
-module_param(debuglevel, int, S_IRUGO);
-
-#define DBG_DEBUG(fmt, arg...)  do { \
-    if ( debuglevel > DBG_START && debuglevel < DBG_ERROR) { \
-          printk(KERN_INFO "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
-    } else if ( debuglevel >= DBG_ERROR ) {   \
-        printk(KERN_ERR "[DEBUG]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
-    } else {    } \
+static int g_wb_xdpe132g5_pmbus_debug = 0;
+static int g_wb_xdpe132g5_pmbus_error = 0;
+
+module_param(g_wb_xdpe132g5_pmbus_debug, int, S_IRUGO | S_IWUSR);
+module_param(g_wb_xdpe132g5_pmbus_error, int, S_IRUGO | S_IWUSR);
+
+#define WB_XDPE132G5_PMBUS_DEBUG(fmt, args...) do {                                        \
+    if (g_wb_xdpe132g5_pmbus_debug) { \
+        printk(KERN_INFO "[WB_XDPE132G5_PMBUS][INFO][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
 } while (0)
 
-#define DBG_ERROR(fmt, arg...)  do { \
-     if ( debuglevel > DBG_START) {  \
-        printk(KERN_ERR "[ERROR]:<%s, %d>:"fmt, __FUNCTION__, __LINE__, ##arg); \
-       } \
+#define WB_XDPE132G5_PMBUS_ERROR(fmt, args...) do {                                        \
+    if (g_wb_xdpe132g5_pmbus_error) { \
+        printk(KERN_ERR "[WB_XDPE132G5_PMBUS][ERR][func:%s line:%d]\n"fmt, __func__, __LINE__, ## args); \
+    } \
 } while (0)
 
 #define BUF_SIZE                    (256)
@@ -46,6 +38,19 @@ module_param(debuglevel, int, S_IRUGO);
 #define XDPE132G5C_PROT_VR13_5MV    (0x07) /* VR13.0 mode, 5-mV DAC */
 #define RETRY_TIME                  (15)
 
+typedef struct xdpe_vout_data_s {
+    u8 vout_mode;
+    int vout_precision;
+} xdpe_vout_data_t;
+
+static xdpe_vout_data_t g_xdpe_vout_group[] = {
+    {.vout_mode = 0x18, .vout_precision = 256},
+    {.vout_mode = 0x17, .vout_precision = 512},
+    {.vout_mode = 0x16, .vout_precision = 1024},
+    {.vout_mode = 0x15, .vout_precision = 2048},
+    {.vout_mode = 0x14, .vout_precision = 4096},
+};
+
 static ssize_t set_xdpe132g5c_avs(struct device *dev, struct device_attribute *da, const char *buf, size_t count)
 {
     int ret;
@@ -63,7 +68,7 @@ static ssize_t set_xdpe132g5c_avs(struct device *dev, struct device_attribute *d
     /* set value */
     ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, (u16)val);
     if (ret < 0) {
-        DBG_ERROR("set pmbus_vout_command fail\n");
+        WB_XDPE132G5_PMBUS_ERROR("set pmbus_vout_command fail\n");
         goto finish_set;
     }
 finish_set:
@@ -84,7 +89,7 @@ static ssize_t show_xdpe132g5c_avs(struct device *dev, struct device_attribute *
     mutex_lock(&data->update_lock);
     val = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
     if (val < 0) {
-        DBG_ERROR("fail val = %d\n", val);
+        WB_XDPE132G5_PMBUS_ERROR("fail val = %d\n", val);
         goto finish_show;
     }
 finish_show:
@@ -93,6 +98,262 @@ static ssize_t show_xdpe132g5c_avs(struct device *dev, struct device_attribute *
     return snprintf(buf, BUF_SIZE, "0x%04x\n", val);
 }
 
+static int xdpe_get_vout_precision(struct i2c_client *client, int page, int *vout_precision)
+{
+    int i, vout_mode, a_size;
+
+    vout_mode = wb_pmbus_read_byte_data(client, page, PMBUS_VOUT_MODE);
+    if (vout_mode < 0) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: read xdpe page%d vout mode reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, page, PMBUS_VOUT_MODE, vout_mode);
+        return vout_mode;
+    }
+
+    a_size = ARRAY_SIZE(g_xdpe_vout_group);
+    for (i = 0; i < a_size; i++) {
+        if (g_xdpe_vout_group[i].vout_mode == vout_mode) {
+            *vout_precision = g_xdpe_vout_group[i].vout_precision;
+            WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: match, page%d, vout mode: 0x%x, precision: %d\n",
+                client->adapter->nr, client->addr, page, vout_mode, *vout_precision);
+            break;
+        }
+    }
+    if (i == a_size) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid, page%d, vout mode: 0x%x\n",client->adapter->nr, client->addr,
+            page, vout_mode);
+        return -EINVAL;
+    }
+    return 0;
+}
+
+static ssize_t xdpe132g5_avs_vout_show(struct device *dev, struct device_attribute *devattr,
+                   char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int vout_cmd, ret, vout_precision;
+    long vout;
+
+    mutex_lock(&data->update_lock);
+    ret = xdpe_get_vout_precision(client, attr->index, &vout_precision);
+    if (ret < 0) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: get xdpe avs%d vout precision failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, ret);
+        mutex_unlock(&data->update_lock);
+        return ret;
+    }
+
+    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
+    if (vout_cmd < 0) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: read page%d, vout command reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd);
+        mutex_unlock(&data->update_lock);
+        return vout_cmd;
+    }
+
+    mutex_unlock(&data->update_lock);
+    vout = vout_cmd * 1000L * 1000L / vout_precision;
+    WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: page%d vout: %ld, vout_cmd: 0x%x, precision: %d\n", client->adapter->nr,
+        client->addr, attr->index, vout, vout_cmd, vout_precision);
+    return snprintf(buf, PAGE_SIZE, "%ld\n", vout);
+}
+
+static ssize_t xdpe132g5_avs_vout_store(struct device *dev, struct device_attribute *devattr,
+                   const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int vout_max, vout_min;
+    int ret, vout_cmd, vout_cmd_set;
+    int vout_precision;
+    long vout;
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    ret = kstrtol(buf, 0, &vout);
+    if (ret) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+
+    if (vout <= 0) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid value: %ld \n", client->adapter->nr, client->addr, vout);
+        return -EINVAL;
+    }
+
+    vout_max = data->vout_max[attr->index];
+    vout_min = data->vout_min[attr->index];
+    if ((vout > vout_max) || (vout < vout_min)) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: vout value: %ld, out of range [%d, %d] \n", client->adapter->nr,
+            client->addr, vout, vout_min, vout_max);
+        return -EINVAL;
+    }
+
+    mutex_lock(&data->update_lock);
+    ret = xdpe_get_vout_precision(client, attr->index, &vout_precision);
+    if (ret < 0) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: get xdpe avs%d vout precision failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, ret);
+        mutex_unlock(&data->update_lock);
+        return ret;
+    }
+
+    vout_cmd_set = (vout * vout_precision) / (1000L * 1000L);
+    if (vout_cmd_set > 0xffff) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid value, page%d, vout: %ld, vout_precision: %d, vout_cmd_set: 0x%x\n",
+            client->adapter->nr, client->addr, attr->index, vout, vout_precision, vout_cmd_set);
+        mutex_unlock(&data->update_lock);
+        return -EINVAL;
+    }
+
+    /* set VOUT_COMMAND */
+    ret = wb_pmbus_write_word_data(client, attr->index, PMBUS_VOUT_COMMAND, (u16)vout_cmd_set);
+    if (ret < 0) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: set xdpe page%d vout cmd reg: 0x%x, value: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd_set, ret);
+        mutex_unlock(&data->update_lock);
+        return ret;
+    }
+
+    /* read back VOUT_COMMAND */
+    vout_cmd = wb_pmbus_read_word_data(client, attr->index, 0xff, PMBUS_VOUT_COMMAND);
+    if (vout_cmd < 0) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: read page%d, vout command reg: 0x%x failed, ret: %d\n",
+            client->adapter->nr, client->addr, attr->index, PMBUS_VOUT_COMMAND, vout_cmd);
+        mutex_unlock(&data->update_lock);
+        return vout_cmd;
+    }
+
+    if (vout_cmd != vout_cmd_set) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: page%d vout cmd value check error, vout cmd read: 0x%x, vout cmd set: 0x%x\n",
+            client->adapter->nr, client->addr, attr->index, vout_cmd, vout_cmd_set);
+        mutex_unlock(&data->update_lock);
+        return -EIO;
+    }
+    mutex_unlock(&data->update_lock);
+    WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: set page%d vout cmd success, vout: %ld uV, vout_cmd_set: 0x%x\n",
+        client->adapter->nr, client->addr, attr->index, vout, vout_cmd_set);
+    return count;
+}
+
+static ssize_t xdpe132g5_avs_vout_max_store(struct device *dev,
+                   struct device_attribute *devattr, const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int ret, vout_threshold;
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    ret = kstrtoint(buf, 0, &vout_threshold);
+    if (ret) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+
+    WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: vout%d max threshold: %d", client->adapter->nr, client->addr,
+        attr->index, vout_threshold);
+
+    data->vout_max[attr->index] = vout_threshold;
+    return count;
+}
+
+static ssize_t xdpe132g5_avs_vout_max_show(struct device *dev,
+                   struct device_attribute *devattr, char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_max[attr->index]);
+}
+
+static ssize_t xdpe132g5_avs_vout_min_store(struct device *dev,
+                   struct device_attribute *devattr, const char *buf, size_t count)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+    int ret, vout_threshold;
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    ret = kstrtoint(buf, 0, &vout_threshold);
+    if (ret) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
+        return -EINVAL;
+    }
+
+    WB_XDPE132G5_PMBUS_DEBUG("%d-%04x: vout%d min threshold: %d", client->adapter->nr, client->addr,
+        attr->index, vout_threshold);
+
+    data->vout_min[attr->index] = vout_threshold;
+    return count;
+}
+
+static ssize_t xdpe132g5_avs_vout_min_show(struct device *dev,
+                   struct device_attribute *devattr, char *buf)
+{
+    struct i2c_client *client = to_i2c_client(dev->parent);
+    struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
+    struct pmbus_data *data = i2c_get_clientdata(client);
+
+    if ((attr->index < 0) || (attr->index >= PMBUS_PAGES)) {
+        WB_XDPE132G5_PMBUS_ERROR("%d-%04x: invalid index: %d \n", client->adapter->nr, client->addr,
+            attr->index);
+        return -EINVAL;
+    }
+
+    return snprintf(buf, PAGE_SIZE, "%d\n", data->vout_min[attr->index]);
+}
+
+static SENSOR_DEVICE_ATTR_RW(avs0_vout, xdpe132g5_avs_vout, 0);
+static SENSOR_DEVICE_ATTR_RW(avs1_vout, xdpe132g5_avs_vout, 1);
+static SENSOR_DEVICE_ATTR_RW(avs0_vout_max, xdpe132g5_avs_vout_max, 0);
+static SENSOR_DEVICE_ATTR_RW(avs0_vout_min, xdpe132g5_avs_vout_min, 0);
+static SENSOR_DEVICE_ATTR_RW(avs1_vout_max, xdpe132g5_avs_vout_max, 1);
+static SENSOR_DEVICE_ATTR_RW(avs1_vout_min, xdpe132g5_avs_vout_min, 1);
+
+static struct attribute *avs_ctrl_attrs[] = {
+    &sensor_dev_attr_avs0_vout.dev_attr.attr,
+    &sensor_dev_attr_avs1_vout.dev_attr.attr,
+    &sensor_dev_attr_avs0_vout_max.dev_attr.attr,
+    &sensor_dev_attr_avs0_vout_min.dev_attr.attr,
+    &sensor_dev_attr_avs1_vout_max.dev_attr.attr,
+    &sensor_dev_attr_avs1_vout_min.dev_attr.attr,
+    NULL,
+};
+
+static const struct attribute_group avs_ctrl_group = {
+    .attrs = avs_ctrl_attrs,
+};
+
+static const struct attribute_group *xdpe132g5_attribute_groups[] = {
+    &avs_ctrl_group,
+    NULL,
+};
+
 static SENSOR_DEVICE_ATTR(avs0_vout_command, S_IRUGO | S_IWUSR, show_xdpe132g5c_avs, set_xdpe132g5c_avs, 0);
 static SENSOR_DEVICE_ATTR(avs1_vout_command, S_IRUGO | S_IWUSR, show_xdpe132g5c_avs, set_xdpe132g5c_avs, 1);
 
@@ -106,27 +367,6 @@ static const struct attribute_group xdpe132g5c_sysfs_attrs_group = {
     .attrs = xdpe132g5c_sysfs_attrs,
 };
 
-static int xdpe132g5c_read_word_data(struct i2c_client *client, int page, int phase, int reg)
-{
-    int rv;
-    int retry;
-    int value;
-
-    rv = wb_pmbus_set_page(client, page, 0xff);
-    if (rv < 0) {
-        return rv;
-    }
-
-    retry = 3;
-    while (retry--) {
-        value = i2c_smbus_read_word_data(client, reg);
-        if ((value == 0xffff) || (value < 0)) {
-            continue;
-        }
-    }
-    return value;
-}
-
 static int xdpe132g5c_identify(struct i2c_client *client, struct pmbus_driver_info *info)
 {
     u8 vout_params;
@@ -205,8 +445,8 @@ static struct pmbus_driver_info xdpe132g5c_info = {
         | PMBUS_HAVE_STATUS_INPUT
         | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
         | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT | PMBUS_HAVE_POUT,
+    .groups = xdpe132g5_attribute_groups,
     .identify = xdpe132g5c_identify,
-    .read_word_data = xdpe132g5c_read_word_data,
 };
 
 static int xdpe132g5c_probe(struct i2c_client *client,
@@ -222,13 +462,13 @@ static int xdpe132g5c_probe(struct i2c_client *client,
 
     status = wb_pmbus_do_probe(client, &xdpe132g5c_info);
     if (status != 0) {
-        DBG_ERROR("pmbus probe error %d\n", status);
+        WB_XDPE132G5_PMBUS_ERROR("pmbus probe error %d\n", status);
         return status;
     }
 
     status = sysfs_create_group(&client->dev.kobj, &xdpe132g5c_sysfs_attrs_group);
     if (status != 0) {
-        DBG_ERROR("sysfs_create_group error %d\n", status);
+        WB_XDPE132G5_PMBUS_ERROR("sysfs_create_group error %d\n", status);
         return status;
     }
 
@@ -268,5 +508,5 @@ static struct i2c_driver xdpe132g5c_driver = {
 module_i2c_driver(xdpe132g5c_driver);
 
 MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("PMBus driver for Infineon XDPE132 family");
+MODULE_DESCRIPTION("PMBus driver for Infineon XDPE132g5 family");
 MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c
index f8d64dcacbe3..c1ad958bc8bb 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg_info.c
@@ -74,6 +74,8 @@ char *g_info_pola_str[INFO_POLA_END] = {
     "negative",
 };
 
+#define MAC_TEMP_INVALID    (99999999)
+
 static int dfd_read_info_from_cpld(int32_t addr, int read_bytes, uint8_t *val)
 {
     int i, rv;
@@ -661,8 +663,11 @@ static int dfd_info_get_cpld_temperature(int key, int *value)
         rv = DFD_RV_OK;
         break;
     }
-    
+
     DBG_DEBUG(DBG_VERBOSE, "calc temp:%d \n", temp_value);
+    if ((temp_value < -40000) || (temp_value > 120000)) {
+        temp_value = -MAC_TEMP_INVALID;
+    }
     *value = temp_value;
 
     return rv;
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/Makefile
new file mode 100644
index 000000000000..81413626b8f5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/Makefile
@@ -0,0 +1,195 @@
+# SPDX-License-Identifier: GPL-2.0-only
+################################################################################
+#
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see <http://www.gnu.org/licenses/>.
+#
+# Author:
+# Realtek NIC software team <nicfae@realtek.com>
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+
+################################################################################
+#  This product is covered by one or more of the following patents:
+#  US6,570,884, US6,115,776, and US6,327,625.
+################################################################################
+
+CONFIG_SOC_LAN = n
+ENABLE_FIBER_SUPPORT = n
+ENABLE_REALWOW_SUPPORT = n
+ENABLE_DASH_SUPPORT = n
+ENABLE_DASH_PRINTER_SUPPORT = n
+CONFIG_DOWN_SPEED_100 = n
+CONFIG_ASPM = y
+ENABLE_S5WOL = y
+ENABLE_S5_KEEP_CURR_MAC = n
+ENABLE_EEE = n
+ENABLE_S0_MAGIC_PACKET = n
+CONFIG_DYNAMIC_ASPM = y
+ENABLE_USE_FIRMWARE_FILE = n
+CONFIG_CTAP_SHORT_OFF = n
+ENABLE_MULTIPLE_TX_QUEUE = n
+ENABLE_RSS_SUPPORT = n
+ENABLE_LIB_SUPPORT = n
+DISABLE_WOL_SUPPORT = n
+
+ifneq ($(KERNELRELEASE),)
+	obj-m := r8168.o
+	r8168-objs := r8168_n.o r8168_asf.o rtl_eeprom.o rtltool.o
+	ifeq ($(CONFIG_SOC_LAN), y)
+		EXTRA_CFLAGS += -DCONFIG_SOC_LAN
+	endif
+	ifeq ($(ENABLE_FIBER_SUPPORT), y)
+	    r8168-objs += r8168_fiber.o
+		EXTRA_CFLAGS += -DENABLE_FIBER_SUPPORT
+	endif
+	ifeq ($(ENABLE_REALWOW_SUPPORT), y)
+	    r8168-objs += r8168_realwow.o
+		EXTRA_CFLAGS += -DENABLE_REALWOW_SUPPORT
+	endif
+	ifeq ($(ENABLE_DASH_SUPPORT), y)
+	    r8168-objs += r8168_dash.o
+		EXTRA_CFLAGS += -DENABLE_DASH_SUPPORT
+	endif
+	ifeq ($(ENABLE_DASH_PRINTER_SUPPORT), y)
+	    r8168-objs += r8168_dash.o
+		EXTRA_CFLAGS += -DENABLE_DASH_SUPPORT -DENABLE_DASH_PRINTER_SUPPORT
+	endif
+	ifneq ($(ENABLE_RSS_SUPPORT), y)
+		EXTRA_CFLAGS += -DCONFIG_R8168_NAPI
+	endif
+	EXTRA_CFLAGS += -DCONFIG_R8168_VLAN
+	ifeq ($(CONFIG_DOWN_SPEED_100), y)
+		EXTRA_CFLAGS += -DCONFIG_DOWN_SPEED_100
+	endif
+	ifeq ($(CONFIG_ASPM), y)
+		EXTRA_CFLAGS += -DCONFIG_ASPM
+	endif
+	ifeq ($(ENABLE_S5WOL), y)
+		EXTRA_CFLAGS += -DENABLE_S5WOL
+	endif
+	ifeq ($(ENABLE_S5_KEEP_CURR_MAC), y)
+		EXTRA_CFLAGS += -DENABLE_S5_KEEP_CURR_MAC
+	endif
+	ifeq ($(ENABLE_EEE), y)
+		EXTRA_CFLAGS += -DENABLE_EEE
+	endif
+	ifeq ($(ENABLE_S0_MAGIC_PACKET), y)
+		EXTRA_CFLAGS += -DENABLE_S0_MAGIC_PACKET
+	endif
+	ifeq ($(CONFIG_DYNAMIC_ASPM), y)
+		EXTRA_CFLAGS += -DCONFIG_DYNAMIC_ASPM
+	endif
+	ifeq ($(ENABLE_USE_FIRMWARE_FILE), y)
+		r8168-objs += r8168_firmware.o
+		EXTRA_CFLAGS += -DENABLE_USE_FIRMWARE_FILE
+	endif
+	ifeq ($(CONFIG_CTAP_SHORT_OFF), y)
+		EXTRA_CFLAGS += -DCONFIG_CTAP_SHORT_OFF
+	endif
+	ifeq ($(ENABLE_MULTIPLE_TX_QUEUE), y)
+		EXTRA_CFLAGS += -DENABLE_MULTIPLE_TX_QUEUE
+	endif
+	ifeq ($(ENABLE_RSS_SUPPORT), y)
+		r8168-objs += r8168_rss.o
+		EXTRA_CFLAGS += -DENABLE_RSS_SUPPORT
+	endif
+	ifeq ($(ENABLE_LIB_SUPPORT), y)
+		r8168-objs += r8168_lib.o
+		EXTRA_CFLAGS += -DENABLE_LIB_SUPPORT
+	endif
+	ifeq ($(DISABLE_WOL_SUPPORT), y)
+		EXTRA_CFLAGS += -DDISABLE_WOL_SUPPORT
+	endif
+else
+	BASEDIR := /lib/modules/$(shell uname -r)
+	KERNELDIR ?= $(BASEDIR)/build
+	PWD :=$(shell pwd)
+	DRIVERDIR := $(shell find $(BASEDIR)/kernel/drivers/net/ethernet -name realtek -type d)
+	ifeq ($(DRIVERDIR),)
+		DRIVERDIR := $(shell find $(BASEDIR)/kernel/drivers/net -name realtek -type d)
+	endif
+	ifeq ($(DRIVERDIR),)
+		DRIVERDIR := $(BASEDIR)/kernel/drivers/net
+	endif
+	RTKDIR := $(subst $(BASEDIR)/,,$(DRIVERDIR))
+
+	KERNEL_GCC_VERSION := $(shell cat /proc/version | sed -n 's/.*gcc version \([[:digit:]]\.[[:digit:]]\.[[:digit:]]\).*/\1/p')
+	CCVERSION = $(shell $(CC) -dumpversion)
+
+	KVER = $(shell uname -r)
+	KMAJ = $(shell echo $(KVER) | \
+	sed -e 's/^\([0-9][0-9]*\)\.[0-9][0-9]*\.[0-9][0-9]*.*/\1/')
+	KMIN = $(shell echo $(KVER) | \
+	sed -e 's/^[0-9][0-9]*\.\([0-9][0-9]*\)\.[0-9][0-9]*.*/\1/')
+	KREV = $(shell echo $(KVER) | \
+	sed -e 's/^[0-9][0-9]*\.[0-9][0-9]*\.\([0-9][0-9]*\).*/\1/')
+
+	kver_ge = $(shell \
+	echo test | awk '{if($(KMAJ) < $(1)) {print 0} else { \
+	if($(KMAJ) > $(1)) {print 1} else { \
+	if($(KMIN) < $(2)) {print 0} else { \
+	if($(KMIN) > $(2)) {print 1} else { \
+	if($(KREV) < $(3)) {print 0} else { print 1 } \
+	}}}}}' \
+	)
+
+.PHONY: all
+all: print_vars clean modules install
+
+print_vars:
+	@echo
+	@echo "CC: " $(CC)
+	@echo "CCVERSION: " $(CCVERSION)
+	@echo "KERNEL_GCC_VERSION: " $(KERNEL_GCC_VERSION)
+	@echo "KVER: " $(KVER)
+	@echo "KMAJ: " $(KMAJ)
+	@echo "KMIN: " $(KMIN)
+	@echo "KREV: " $(KREV)
+	@echo "BASEDIR: " $(BASEDIR)
+	@echo "DRIVERDIR: " $(DRIVERDIR)
+	@echo "PWD: " $(PWD)
+	@echo "RTKDIR: " $(RTKDIR)
+	@echo
+
+.PHONY:modules
+modules:
+#ifeq ($(call kver_ge,5,0,0),1)
+	$(MAKE) -C $(KERNELDIR) M=$(PWD) modules
+#else
+#	$(MAKE) -C $(KERNELDIR) SUBDIRS=$(PWD) modules
+#endif
+
+.PHONY:clean
+clean:
+#ifeq ($(call kver_ge,5,0,0),1)
+	$(MAKE) -C $(KERNELDIR) M=$(PWD) clean
+#else
+#	$(MAKE) -C $(KERNELDIR) SUBDIRS=$(PWD) clean
+#endif
+
+.PHONY:install
+install:
+#ifeq ($(call kver_ge,5,0,0),1)
+	$(MAKE) -C $(KERNELDIR) M=$(PWD) INSTALL_MOD_DIR=$(RTKDIR) modules_install
+#else
+#	$(MAKE) -C $(KERNELDIR) SUBDIRS=$(PWD) INSTALL_MOD_DIR=$(RTKDIR) modules_install
+#endif
+
+endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168.h
new file mode 100644
index 000000000000..f3b798985b92
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168.h
@@ -0,0 +1,2394 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+################################################################################
+#
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see <http://www.gnu.org/licenses/>.
+#
+# Author:
+# Realtek NIC software team <nicfae@realtek.com>
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ *  This product is covered by one or more of the following patents:
+ *  US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+#include <linux/ethtool.h>
+#include <linux/interrupt.h>
+#include <linux/version.h>
+#include "r8168_dash.h"
+#include "r8168_realwow.h"
+#include "r8168_fiber.h"
+#include "r8168_rss.h"
+#ifdef ENABLE_LIB_SUPPORT
+#include "r8168_lib.h"
+#endif
+
+/*
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0)&& !defined(ENABLE_LIB_SUPPORT)
+#define RTL_USE_NEW_INTR_API
+#endif
+*/
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32)
+typedef int netdev_tx_t;
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
+#define skb_transport_offset(skb) (skb->h.raw - skb->data)
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)
+#define device_set_wakeup_enable(dev, val)	do {} while (0)
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0)
+static inline void ether_addr_copy(u8 *dst, const u8 *src)
+{
+        u16 *a = (u16 *)dst;
+        const u16 *b = (const u16 *)src;
+
+        a[0] = b[0];
+        a[1] = b[1];
+        a[2] = b[2];
+}
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0)
+#define IS_ERR_OR_NULL(ptr)			(!ptr)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0)
+#define reinit_completion(x)			((x)->done = 0)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)
+#define pm_runtime_mark_last_busy(x)
+#define pm_runtime_put_autosuspend(x)		pm_runtime_put(x)
+#define pm_runtime_put_sync_autosuspend(x)	pm_runtime_put_sync(x)
+
+static inline bool pm_runtime_suspended(struct device *dev)
+{
+        return dev->power.runtime_status == RPM_SUSPENDED
+               && !dev->power.disable_depth;
+}
+
+static inline bool pm_runtime_active(struct device *dev)
+{
+        return dev->power.runtime_status == RPM_ACTIVE
+               || dev->power.disable_depth;
+}
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)
+#define queue_delayed_work(long_wq, work, delay)	schedule_delayed_work(work, delay)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
+#define netif_printk(priv, type, level, netdev, fmt, args...)	\
+	do {								\
+		if (netif_msg_##type(priv))				\
+			printk(level "%s: " fmt,(netdev)->name , ##args); \
+	} while (0)
+
+#define netif_emerg(priv, type, netdev, fmt, args...)		\
+		netif_printk(priv, type, KERN_EMERG, netdev, fmt, ##args)
+#define netif_alert(priv, type, netdev, fmt, args...)		\
+		netif_printk(priv, type, KERN_ALERT, netdev, fmt, ##args)
+#define netif_crit(priv, type, netdev, fmt, args...)		\
+		netif_printk(priv, type, KERN_CRIT, netdev, fmt, ##args)
+#define netif_err(priv, type, netdev, fmt, args...)		\
+		netif_printk(priv, type, KERN_ERR, netdev, fmt, ##args)
+#define netif_warn(priv, type, netdev, fmt, args...)		\
+		netif_printk(priv, type, KERN_WARNING, netdev, fmt, ##args)
+#define netif_notice(priv, type, netdev, fmt, args...)		\
+		netif_printk(priv, type, KERN_NOTICE, netdev, fmt, ##args)
+#define netif_info(priv, type, netdev, fmt, args...)		\
+		netif_printk(priv, type, KERN_INFO, (netdev), fmt, ##args)
+#endif
+#endif
+#endif
+#endif
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15)
+#define setup_timer(_timer, _function, _data) \
+do { \
+	(_timer)->function = _function; \
+	(_timer)->data = _data; \
+	init_timer(_timer); \
+} while (0)
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15)
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0)
+#if defined(skb_vlan_tag_present) && !defined(vlan_tx_tag_present)
+#define vlan_tx_tag_present skb_vlan_tag_present
+#endif
+#if defined(skb_vlan_tag_get) && !defined(vlan_tx_tag_get)
+#define vlan_tx_tag_get skb_vlan_tag_get
+#endif
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0)
+
+#define RTL_ALLOC_SKB_INTR(napi, length) dev_alloc_skb(length)
+#define R8168_USE_NAPI_ALLOC_SKB 0
+#ifdef CONFIG_R8168_NAPI
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,19,0)
+#undef RTL_ALLOC_SKB_INTR
+#define RTL_ALLOC_SKB_INTR(napi, length) napi_alloc_skb(napi, length)
+#undef R8168_USE_NAPI_ALLOC_SKB
+#define R8168_USE_NAPI_ALLOC_SKB 1
+#endif
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)
+#define eth_random_addr(addr) random_ether_addr(addr)
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)
+#define netdev_features_t  u32
+#endif
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,5,0)
+#define NETIF_F_ALL_CSUM        NETIF_F_CSUM_MASK
+#else
+#ifndef NETIF_F_ALL_CSUM
+#define NETIF_F_ALL_CSUM        NETIF_F_CSUM_MASK
+#endif
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37)
+#define ENABLE_R8168_PROCFS
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
+#define NETIF_F_HW_VLAN_RX	NETIF_F_HW_VLAN_CTAG_RX
+#define NETIF_F_HW_VLAN_TX	NETIF_F_HW_VLAN_CTAG_TX
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0)
+#define __devinit
+#define __devexit
+#define __devexit_p(func)   func
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+#define CHECKSUM_PARTIAL CHECKSUM_HW
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+#define irqreturn_t void
+#define IRQ_HANDLED    1
+#define IRQ_NONE   0
+#define IRQ_RETVAL(x)
+#endif
+
+#ifndef NETIF_F_RXALL
+#define NETIF_F_RXALL  0
+#endif
+
+#ifndef NETIF_F_RXFCS
+#define NETIF_F_RXFCS  0
+#endif
+
+#if !defined(HAVE_FREE_NETDEV) && (LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0))
+#define free_netdev(x)  kfree(x)
+#endif
+
+#ifndef SET_NETDEV_DEV
+#define SET_NETDEV_DEV(net, pdev)
+#endif
+
+#ifndef SET_MODULE_OWNER
+#define SET_MODULE_OWNER(dev)
+#endif
+
+#ifndef SA_SHIRQ
+#define SA_SHIRQ IRQF_SHARED
+#endif
+
+#ifndef NETIF_F_GSO
+#define gso_size    tso_size
+#define gso_segs    tso_segs
+#endif
+
+#ifndef PCI_VENDOR_ID_DLINK
+#define PCI_VENDOR_ID_DLINK 0x1186
+#endif
+
+#ifndef dma_mapping_error
+#define dma_mapping_error(a,b) 0
+#endif
+
+#ifndef netif_err
+#define netif_err(a,b,c,d)
+#endif
+
+#ifndef AUTONEG_DISABLE
+#define AUTONEG_DISABLE   0x00
+#endif
+
+#ifndef AUTONEG_ENABLE
+#define AUTONEG_ENABLE    0x01
+#endif
+
+#ifndef BMCR_SPEED1000
+#define BMCR_SPEED1000  0x0040
+#endif
+
+#ifndef BMCR_SPEED100
+#define BMCR_SPEED100   0x2000
+#endif
+
+#ifndef BMCR_SPEED10
+#define BMCR_SPEED10    0x0000
+#endif
+
+#ifndef SPEED_UNKNOWN
+#define SPEED_UNKNOWN   -1
+#endif
+
+#ifndef DUPLEX_UNKNOWN
+#define DUPLEX_UNKNOWN  0xff
+#endif
+
+#ifndef SUPPORTED_Pause
+#define SUPPORTED_Pause  (1 << 13)
+#endif
+
+#ifndef SUPPORTED_Asym_Pause
+#define SUPPORTED_Asym_Pause  (1 << 14)
+#endif
+
+#ifndef  MDIO_EEE_100TX
+#define  MDIO_EEE_100TX  0x0002
+#endif
+
+#ifndef  MDIO_EEE_1000T
+#define  MDIO_EEE_1000T  0x0004
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
+#ifdef CONFIG_NET_POLL_CONTROLLER
+#define RTL_NET_POLL_CONTROLLER dev->poll_controller=rtl8168_netpoll
+#else
+#define RTL_NET_POLL_CONTROLLER
+#endif
+
+#ifdef CONFIG_R8168_VLAN
+#define RTL_SET_VLAN dev->vlan_rx_register=rtl8168_vlan_rx_register
+#else
+#define RTL_SET_VLAN
+#endif
+
+#define RTL_NET_DEVICE_OPS(ops) dev->open=rtl8168_open; \
+                    dev->hard_start_xmit=rtl8168_start_xmit; \
+                    dev->get_stats=rtl8168_get_stats; \
+                    dev->stop=rtl8168_close; \
+                    dev->tx_timeout=rtl8168_tx_timeout; \
+                    dev->set_multicast_list=rtl8168_set_rx_mode; \
+                    dev->change_mtu=rtl8168_change_mtu; \
+                    dev->set_mac_address=rtl8168_set_mac_address; \
+                    dev->do_ioctl=rtl8168_do_ioctl; \
+                    RTL_NET_POLL_CONTROLLER; \
+                    RTL_SET_VLAN;
+#else
+#define RTL_NET_DEVICE_OPS(ops) dev->netdev_ops=&ops
+#endif
+
+#ifndef FALSE
+#define FALSE 0
+#endif
+
+#ifndef TRUE
+#define TRUE  1
+#endif
+
+#ifndef false
+#define false 0
+#endif
+
+#ifndef true
+#define true  1
+#endif
+
+//Hardware will continue interrupt 10 times after interrupt finished.
+#define RTK_KEEP_INTERRUPT_COUNT (10)
+
+//Due to the hardware design of RTL8111B, the low 32 bit address of receive
+//buffer must be 8-byte alignment.
+#ifndef NET_IP_ALIGN
+#define NET_IP_ALIGN        2
+#endif
+#define RTK_RX_ALIGN        NET_IP_ALIGN
+
+#ifdef CONFIG_R8168_NAPI
+#define NAPI_SUFFIX "-NAPI"
+#else
+#define NAPI_SUFFIX ""
+#endif
+#ifdef ENABLE_FIBER_SUPPORT
+#define FIBER_SUFFIX "-FIBER"
+#else
+#define FIBER_SUFFIX ""
+#endif
+#ifdef ENABLE_REALWOW_SUPPORT
+#define REALWOW_SUFFIX "-REALWOW"
+#else
+#define REALWOW_SUFFIX ""
+#endif
+#if defined(ENABLE_DASH_PRINTER_SUPPORT)
+#define DASH_SUFFIX "-PRINTER"
+#elif defined(ENABLE_DASH_SUPPORT)
+#define DASH_SUFFIX "-DASH"
+#else
+#define DASH_SUFFIX ""
+#endif
+#if defined(ENABLE_RSS_SUPPORT)
+#define RSS_SUFFIX "-RSS"
+#else
+#define RSS_SUFFIX ""
+#endif
+
+#define RTL8168_VERSION "8.052.01" NAPI_SUFFIX FIBER_SUFFIX REALWOW_SUFFIX DASH_SUFFIX RSS_SUFFIX
+#define MODULENAME "r8168"
+#define PFX MODULENAME ": "
+
+#define GPL_CLAIM "\
+r8168  Copyright (C) 2023 Realtek NIC software team <nicfae@realtek.com> \n \
+This program comes with ABSOLUTELY NO WARRANTY; for details, please see <http://www.gnu.org/licenses/>. \n \
+This is free software, and you are welcome to redistribute it under certain conditions; see <http://www.gnu.org/licenses/>. \n"
+
+#ifdef RTL8168_DEBUG
+#define assert(expr) \
+        if(!(expr)) {                   \
+            printk( "Assertion failed! %s,%s,%s,line=%d\n", \
+            #expr,__FILE__,__FUNCTION__,__LINE__);      \
+        }
+#define dprintk(fmt, args...)   do { printk(PFX fmt, ## args); } while (0)
+#else
+#define assert(expr) do {} while (0)
+#define dprintk(fmt, args...)   do {} while (0)
+#endif /* RTL8168_DEBUG */
+
+#define R8168_MSG_DEFAULT \
+    (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
+
+#ifdef CONFIG_R8168_NAPI
+#define rtl8168_rx_hwaccel_skb      vlan_hwaccel_receive_skb
+#define rtl8168_rx_quota(count, quota)  min(count, quota)
+#else
+#define rtl8168_rx_hwaccel_skb      vlan_hwaccel_rx
+#define rtl8168_rx_quota(count, quota)  count
+#endif
+
+/* MAC address length */
+#ifndef MAC_ADDR_LEN
+#define MAC_ADDR_LEN    6
+#endif
+
+#ifndef MAC_PROTOCOL_LEN
+#define MAC_PROTOCOL_LEN    2
+#endif
+
+#ifndef ETH_FCS_LEN
+#define ETH_FCS_LEN	  4
+#endif
+
+#ifndef NETIF_F_TSO6
+#define NETIF_F_TSO6  0
+#endif
+
+#define Reserved2_data  7
+#define RX_DMA_BURST    7   /* Maximum PCI burst, '6' is 1024 */
+#define TX_DMA_BURST_unlimited  7
+#define TX_DMA_BURST_1024   6
+#define TX_DMA_BURST_512    5
+#define TX_DMA_BURST_256    4
+#define TX_DMA_BURST_128    3
+#define TX_DMA_BURST_64     2
+#define TX_DMA_BURST_32     1
+#define TX_DMA_BURST_16     0
+#define Reserved1_data  0x3F
+#define RxPacketMaxSize 0x3FE8  /* 16K - 1 - ETH_HLEN - VLAN - CRC... */
+#define Jumbo_Frame_1k  ETH_DATA_LEN
+#define Jumbo_Frame_2k  (2*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
+#define Jumbo_Frame_3k  (3*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
+#define Jumbo_Frame_4k  (4*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
+#define Jumbo_Frame_5k  (5*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
+#define Jumbo_Frame_6k  (6*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
+#define Jumbo_Frame_7k  (7*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
+#define Jumbo_Frame_8k  (8*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
+#define Jumbo_Frame_9k  (9*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
+#define InterFrameGap   0x03    /* 3 means InterFrameGap = the shortest one */
+#define RxEarly_off_V1 (0x07 << 11)
+#define RxEarly_off_V2 (1 << 11)
+#define Rx_Single_fetch_V2 (1 << 14)
+
+#define R8168_REGS_SIZE     (256)
+#define R8168_MAC_REGS_SIZE     (256)
+#define R8168_PHY_REGS_SIZE     (16*2)
+#define R8168_EPHY_REGS_SIZE  	(31*2)
+#define R8168_ERI_REGS_SIZE  	(0x100)
+#define R8168_REGS_DUMP_SIZE     (0x400)
+#define R8168_PCI_REGS_SIZE  	(0x100)
+#define R8168_NAPI_WEIGHT   64
+
+#define R8168_MAX_MSIX_VEC   4
+
+#define RTL8168_TX_TIMEOUT  (6 * HZ)
+#define RTL8168_LINK_TIMEOUT    (1 * HZ)
+#define RTL8168_ESD_TIMEOUT (2 * HZ)
+
+#define MAX_NUM_TX_DESC 1024    /* Maximum number of Tx descriptor registers */
+#define MAX_NUM_RX_DESC 1024    /* Maximum number of Rx descriptor registers */
+
+#define MIN_NUM_TX_DESC 32    /* Minimum number of Tx descriptor registers */
+#define MIN_NUM_RX_DESC 32    /* Minimum number of Rx descriptor registers */
+
+#define NUM_TX_DESC 1024    /* Number of Tx descriptor registers */
+#define NUM_RX_DESC 1024    /* Number of Rx descriptor registers */
+
+#define RX_BUF_SIZE 0x05F2  /* 0x05F2 = 1522bye */
+#define R8168_MAX_TX_QUEUES (2)
+#define R8168_MAX_RX_QUEUES (4)
+#define R8168_MAX_QUEUES R8168_MAX_RX_QUEUES
+#define R8168_MULTI_TX_Q(tp) (rtl8168_tot_tx_rings(tp) > 1)
+#define R8168_MULTI_RX_Q(tp) (rtl8168_tot_rx_rings(tp) > 1)
+#define R8168_MULTI_RX_4Q(tp) (rtl8168_tot_rx_rings(tp) > 3)
+#define R8168_MULTI_RSS_4Q(tp) (tp->num_hw_tot_en_rx_rings > 3)
+
+#define OCP_STD_PHY_BASE	0xa400
+
+//Channel Wait Count
+#define R8168_CHANNEL_WAIT_COUNT (20000)
+#define R8168_CHANNEL_WAIT_TIME (1)  // 1us
+#define R8168_CHANNEL_EXIT_DELAY_TIME (20)  //20us
+
+#define NODE_ADDRESS_SIZE 6
+
+#define SHORT_PACKET_PADDING_BUF_SIZE 256
+
+#define RTK_MAGIC_DEBUG_VALUE 0x0badbeef
+
+/* write/read MMIO register */
+#define RTL_W8(tp, reg, val8)	writeb((val8), tp->mmio_addr + (reg))
+#define RTL_W16(tp, reg, val16)	writew((val16), tp->mmio_addr + (reg))
+#define RTL_W32(tp, reg, val32)	writel((val32), tp->mmio_addr + (reg))
+#define RTL_R8(tp, reg)		readb(tp->mmio_addr + (reg))
+#define RTL_R16(tp, reg)		readw(tp->mmio_addr + (reg))
+#define RTL_R32(tp, reg)		((unsigned long) readl(tp->mmio_addr + (reg)))
+
+#ifndef DMA_64BIT_MASK
+#define DMA_64BIT_MASK  0xffffffffffffffffULL
+#endif
+
+#ifndef DMA_32BIT_MASK
+#define DMA_32BIT_MASK  0x00000000ffffffffULL
+#endif
+
+#ifndef NETDEV_TX_OK
+#define NETDEV_TX_OK 0      /* driver took care of packet */
+#endif
+
+#ifndef NETDEV_TX_BUSY
+#define NETDEV_TX_BUSY 1    /* driver tx path was busy*/
+#endif
+
+#ifndef NETDEV_TX_LOCKED
+#define NETDEV_TX_LOCKED -1 /* driver tx lock was already taken */
+#endif
+
+#ifndef ADVERTISED_Pause
+#define ADVERTISED_Pause    (1 << 13)
+#endif
+
+#ifndef ADVERTISED_Asym_Pause
+#define ADVERTISED_Asym_Pause   (1 << 14)
+#endif
+
+#ifndef ADVERTISE_PAUSE_CAP
+#define ADVERTISE_PAUSE_CAP 0x400
+#endif
+
+#ifndef ADVERTISE_PAUSE_ASYM
+#define ADVERTISE_PAUSE_ASYM    0x800
+#endif
+
+#ifndef MII_CTRL1000
+#define MII_CTRL1000        0x09
+#endif
+
+#ifndef ADVERTISE_1000FULL
+#define ADVERTISE_1000FULL  0x200
+#endif
+
+#ifndef ADVERTISE_1000HALF
+#define ADVERTISE_1000HALF  0x100
+#endif
+
+#ifndef ETH_MIN_MTU
+#define ETH_MIN_MTU  68
+#endif
+
+/*****************************************************************************/
+
+//#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3)
+#if (( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,27) ) || \
+     (( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) ) && \
+      ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3) )))
+/* copied from linux kernel 2.6.20 include/linux/netdev.h */
+#define NETDEV_ALIGN        32
+#define NETDEV_ALIGN_CONST  (NETDEV_ALIGN - 1)
+
+static inline void *netdev_priv(struct net_device *dev)
+{
+        return (char *)dev + ((sizeof(struct net_device)
+                               + NETDEV_ALIGN_CONST)
+                              & ~NETDEV_ALIGN_CONST);
+}
+#endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3)
+
+/*****************************************************************************/
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
+#define RTLDEV  tp
+#else
+#define RTLDEV  dev
+#endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
+/*****************************************************************************/
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+typedef struct net_device *napi_ptr;
+typedef int *napi_budget;
+
+#define napi dev
+#define RTL_NAPI_CONFIG(ndev, priv, function, weig) ndev->poll=function;    \
+                                ndev->weight=weig;
+#define RTL_NAPI_QUOTA(budget, ndev)            min(*budget, ndev->quota)
+#define RTL_GET_PRIV(stuct_ptr, priv_struct)        netdev_priv(stuct_ptr)
+#define RTL_GET_NETDEV(priv_ptr)
+#define RTL_RX_QUOTA(budget)          *budget
+#define RTL_NAPI_QUOTA_UPDATE(ndev, work_done, budget)  *budget -= work_done;   \
+                                ndev->quota -= work_done;
+#define RTL_NETIF_RX_COMPLETE(dev, napi, work_done)        netif_rx_complete(dev)
+#define RTL_NETIF_RX_SCHEDULE_PREP(dev, napi)       netif_rx_schedule_prep(dev)
+#define __RTL_NETIF_RX_SCHEDULE(dev, napi)      __netif_rx_schedule(dev)
+#define RTL_NAPI_RETURN_VALUE               work_done >= work_to_do
+#define RTL_NAPI_ENABLE(dev, napi)          netif_poll_enable(dev)
+#define RTL_NAPI_DISABLE(dev, napi)         netif_poll_disable(dev)
+#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
+#else
+typedef struct napi_struct *napi_ptr;
+typedef int napi_budget;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,1,0)
+#define RTL_NAPI_CONFIG(ndev, priv, function, weight)   netif_napi_add_weight(ndev, &priv->napi, function, weight)
+#else
+#define RTL_NAPI_CONFIG(ndev, priv, function, weight)   netif_napi_add(ndev, &priv->napi, function, weight)
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(6,1,0)
+#define RTL_NAPI_QUOTA(budget, ndev)            min(budget, budget)
+#define RTL_GET_PRIV(stuct_ptr, priv_struct)        container_of(stuct_ptr, priv_struct, stuct_ptr)
+#define RTL_GET_NETDEV(priv_ptr)            struct net_device *dev = priv_ptr->dev;
+#define RTL_RX_QUOTA(budget)          budget
+#define RTL_NAPI_QUOTA_UPDATE(ndev, work_done, budget)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
+#define RTL_NETIF_RX_COMPLETE(dev, napi, work_done)        netif_rx_complete(dev, napi)
+#define RTL_NETIF_RX_SCHEDULE_PREP(dev, napi)       netif_rx_schedule_prep(dev, napi)
+#define __RTL_NETIF_RX_SCHEDULE(dev, napi)      __netif_rx_schedule(dev, napi)
+#endif
+#if LINUX_VERSION_CODE == KERNEL_VERSION(2,6,29)
+#define RTL_NETIF_RX_COMPLETE(dev, napi, work_done)        netif_rx_complete(napi)
+#define RTL_NETIF_RX_SCHEDULE_PREP(dev, napi)       netif_rx_schedule_prep(napi)
+#define __RTL_NETIF_RX_SCHEDULE(dev, napi)      __netif_rx_schedule(napi)
+#endif
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,29)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,19,0)
+#define RTL_NETIF_RX_COMPLETE(dev, napi, work_done)        napi_complete_done(napi, work_done)
+#else
+#define RTL_NETIF_RX_COMPLETE(dev, napi, work_done)        napi_complete(napi)
+#endif
+#define RTL_NETIF_RX_SCHEDULE_PREP(dev, napi)       napi_schedule_prep(napi)
+#define __RTL_NETIF_RX_SCHEDULE(dev, napi)      __napi_schedule(napi)
+#endif
+#define RTL_NAPI_RETURN_VALUE work_done
+#define RTL_NAPI_ENABLE(dev, napi)          napi_enable(napi)
+#define RTL_NAPI_DISABLE(dev, napi)         napi_disable(napi)
+#endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)
+#define RTL_NAPI_DEL(priv)
+#else
+#define RTL_NAPI_DEL(priv)   netif_napi_del(&priv->napi)
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)
+
+/*****************************************************************************/
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9)
+#ifdef __CHECKER__
+#define __iomem __attribute__((noderef, address_space(2)))
+extern void __chk_io_ptr(void __iomem *);
+#define __bitwise __attribute__((bitwise))
+#else
+#define __iomem
+#define __chk_io_ptr(x) (void)0
+#define __bitwise
+#endif
+#endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9)
+
+/*****************************************************************************/
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,8)
+#ifdef __CHECKER__
+#define __force __attribute__((force))
+#else
+#define __force
+#endif
+#endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,8)
+
+#ifndef module_param
+#define module_param(v,t,p) MODULE_PARM(v, "i");
+#endif
+
+#ifndef PCI_DEVICE
+#define PCI_DEVICE(vend,dev) \
+    .vendor = (vend), .device = (dev), \
+    .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
+#endif
+
+/*****************************************************************************/
+/* 2.5.28 => 2.4.23 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,5,28) )
+
+static inline void _kc_synchronize_irq(void)
+{
+        synchronize_irq();
+}
+#undef synchronize_irq
+#define synchronize_irq(X) _kc_synchronize_irq()
+
+#include <linux/tqueue.h>
+#define work_struct tq_struct
+#undef INIT_WORK
+#define INIT_WORK(a,b,c) INIT_TQUEUE(a,(void (*)(void *))b,c)
+#undef container_of
+#define container_of list_entry
+#define schedule_work schedule_task
+#define flush_scheduled_work flush_scheduled_tasks
+#endif /* 2.5.28 => 2.4.17 */
+
+/*****************************************************************************/
+/* 2.6.4 => 2.6.0 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,4) )
+#define MODULE_VERSION(_version) MODULE_INFO(version, _version)
+#endif /* 2.6.4 => 2.6.0 */
+/*****************************************************************************/
+/* 2.6.0 => 2.5.28 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) )
+#define MODULE_INFO(version, _version)
+#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
+#define CONFIG_E1000_DISABLE_PACKET_SPLIT 1
+#endif
+
+#define pci_set_consistent_dma_mask(dev,mask) 1
+
+#undef dev_put
+#define dev_put(dev) __dev_put(dev)
+
+#ifndef skb_fill_page_desc
+#define skb_fill_page_desc _kc_skb_fill_page_desc
+extern void _kc_skb_fill_page_desc(struct sk_buff *skb, int i, struct page *page, int off, int size);
+#endif
+
+#ifndef pci_dma_mapping_error
+#define pci_dma_mapping_error _kc_pci_dma_mapping_error
+static inline int _kc_pci_dma_mapping_error(dma_addr_t dma_addr)
+{
+        return dma_addr == 0;
+}
+#endif
+
+#undef ALIGN
+#define ALIGN(x,a) (((x)+(a)-1)&~((a)-1))
+
+#endif /* 2.6.0 => 2.5.28 */
+
+/*****************************************************************************/
+/* 2.4.22 => 2.4.17 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,22) )
+#define pci_name(x) ((x)->slot_name)
+#endif /* 2.4.22 => 2.4.17 */
+
+/*****************************************************************************/
+/* 2.6.5 => 2.6.0 */
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5) )
+#define pci_dma_sync_single_for_cpu pci_dma_sync_single
+#define pci_dma_sync_single_for_device  pci_dma_sync_single_for_cpu
+#endif /* 2.6.5 => 2.6.0 */
+
+/*****************************************************************************/
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+/*
+ * initialize a work-struct's func and data pointers:
+ */
+#define PREPARE_WORK(_work, _func, _data)           \
+    do {                            \
+        (_work)->func = _func;              \
+        (_work)->data = _data;              \
+    } while (0)
+
+#endif
+/*****************************************************************************/
+/* 2.6.4 => 2.6.0 */
+#if ((LINUX_VERSION_CODE < KERNEL_VERSION(2,4,25) && \
+     LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)) || \
+    (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) && \
+      LINUX_VERSION_CODE < KERNEL_VERSION(2,6,4)))
+#define ETHTOOL_OPS_COMPAT
+#endif /* 2.6.4 => 2.6.0 */
+
+/*****************************************************************************/
+/* Installations with ethtool version without eeprom, adapter id, or statistics
+ * support */
+
+#ifndef ETH_GSTRING_LEN
+#define ETH_GSTRING_LEN 32
+#endif
+
+#ifndef ETHTOOL_GSTATS
+#define ETHTOOL_GSTATS 0x1d
+#undef ethtool_drvinfo
+#define ethtool_drvinfo k_ethtool_drvinfo
+struct k_ethtool_drvinfo {
+        u32 cmd;
+        char driver[32];
+        char version[32];
+        char fw_version[32];
+        char bus_info[32];
+        char reserved1[32];
+        char reserved2[16];
+        u32 n_stats;
+        u32 testinfo_len;
+        u32 eedump_len;
+        u32 regdump_len;
+};
+
+struct ethtool_stats {
+        u32 cmd;
+        u32 n_stats;
+        u64 data[0];
+};
+#endif /* ETHTOOL_GSTATS */
+
+#ifndef ETHTOOL_PHYS_ID
+#define ETHTOOL_PHYS_ID 0x1c
+#endif /* ETHTOOL_PHYS_ID */
+
+#ifndef ETHTOOL_GSTRINGS
+#define ETHTOOL_GSTRINGS 0x1b
+enum ethtool_stringset {
+        ETH_SS_TEST             = 0,
+        ETH_SS_STATS,
+};
+struct ethtool_gstrings {
+        u32 cmd;            /* ETHTOOL_GSTRINGS */
+        u32 string_set;     /* string set id e.c. ETH_SS_TEST, etc*/
+        u32 len;            /* number of strings in the string set */
+        u8 data[0];
+};
+#endif /* ETHTOOL_GSTRINGS */
+
+#ifndef ETHTOOL_TEST
+#define ETHTOOL_TEST 0x1a
+enum ethtool_test_flags {
+        ETH_TEST_FL_OFFLINE = (1 << 0),
+        ETH_TEST_FL_FAILED  = (1 << 1),
+};
+struct ethtool_test {
+        u32 cmd;
+        u32 flags;
+        u32 reserved;
+        u32 len;
+        u64 data[0];
+};
+#endif /* ETHTOOL_TEST */
+
+#ifndef ETHTOOL_GEEPROM
+#define ETHTOOL_GEEPROM 0xb
+#undef ETHTOOL_GREGS
+struct ethtool_eeprom {
+        u32 cmd;
+        u32 magic;
+        u32 offset;
+        u32 len;
+        u8 data[0];
+};
+
+struct ethtool_value {
+        u32 cmd;
+        u32 data;
+};
+#endif /* ETHTOOL_GEEPROM */
+
+#ifndef ETHTOOL_GLINK
+#define ETHTOOL_GLINK 0xa
+#endif /* ETHTOOL_GLINK */
+
+#ifndef ETHTOOL_GREGS
+#define ETHTOOL_GREGS       0x00000004 /* Get NIC registers */
+#define ethtool_regs _kc_ethtool_regs
+/* for passing big chunks of data */
+struct _kc_ethtool_regs {
+        u32 cmd;
+        u32 version; /* driver-specific, indicates different chips/revs */
+        u32 len; /* bytes */
+        u8 data[0];
+};
+#endif /* ETHTOOL_GREGS */
+
+#ifndef ETHTOOL_GMSGLVL
+#define ETHTOOL_GMSGLVL     0x00000007 /* Get driver message level */
+#endif
+#ifndef ETHTOOL_SMSGLVL
+#define ETHTOOL_SMSGLVL     0x00000008 /* Set driver msg level, priv. */
+#endif
+#ifndef ETHTOOL_NWAY_RST
+#define ETHTOOL_NWAY_RST    0x00000009 /* Restart autonegotiation, priv */
+#endif
+#ifndef ETHTOOL_GLINK
+#define ETHTOOL_GLINK       0x0000000a /* Get link status */
+#endif
+#ifndef ETHTOOL_GEEPROM
+#define ETHTOOL_GEEPROM     0x0000000b /* Get EEPROM data */
+#endif
+#ifndef ETHTOOL_SEEPROM
+#define ETHTOOL_SEEPROM     0x0000000c /* Set EEPROM data */
+#endif
+#ifndef ETHTOOL_GCOALESCE
+#define ETHTOOL_GCOALESCE   0x0000000e /* Get coalesce config */
+/* for configuring coalescing parameters of chip */
+#define ethtool_coalesce _kc_ethtool_coalesce
+struct _kc_ethtool_coalesce {
+        u32 cmd;    /* ETHTOOL_{G,S}COALESCE */
+
+        /* How many usecs to delay an RX interrupt after
+         * a packet arrives.  If 0, only rx_max_coalesced_frames
+         * is used.
+         */
+        u32 rx_coalesce_usecs;
+
+        /* How many packets to delay an RX interrupt after
+         * a packet arrives.  If 0, only rx_coalesce_usecs is
+         * used.  It is illegal to set both usecs and max frames
+         * to zero as this would cause RX interrupts to never be
+         * generated.
+         */
+        u32 rx_max_coalesced_frames;
+
+        /* Same as above two parameters, except that these values
+         * apply while an IRQ is being serviced by the host.  Not
+         * all cards support this feature and the values are ignored
+         * in that case.
+         */
+        u32 rx_coalesce_usecs_irq;
+        u32 rx_max_coalesced_frames_irq;
+
+        /* How many usecs to delay a TX interrupt after
+         * a packet is sent.  If 0, only tx_max_coalesced_frames
+         * is used.
+         */
+        u32 tx_coalesce_usecs;
+
+        /* How many packets to delay a TX interrupt after
+         * a packet is sent.  If 0, only tx_coalesce_usecs is
+         * used.  It is illegal to set both usecs and max frames
+         * to zero as this would cause TX interrupts to never be
+         * generated.
+         */
+        u32 tx_max_coalesced_frames;
+
+        /* Same as above two parameters, except that these values
+         * apply while an IRQ is being serviced by the host.  Not
+         * all cards support this feature and the values are ignored
+         * in that case.
+         */
+        u32 tx_coalesce_usecs_irq;
+        u32 tx_max_coalesced_frames_irq;
+
+        /* How many usecs to delay in-memory statistics
+         * block updates.  Some drivers do not have an in-memory
+         * statistic block, and in such cases this value is ignored.
+         * This value must not be zero.
+         */
+        u32 stats_block_coalesce_usecs;
+
+        /* Adaptive RX/TX coalescing is an algorithm implemented by
+         * some drivers to improve latency under low packet rates and
+         * improve throughput under high packet rates.  Some drivers
+         * only implement one of RX or TX adaptive coalescing.  Anything
+         * not implemented by the driver causes these values to be
+         * silently ignored.
+         */
+        u32 use_adaptive_rx_coalesce;
+        u32 use_adaptive_tx_coalesce;
+
+        /* When the packet rate (measured in packets per second)
+         * is below pkt_rate_low, the {rx,tx}_*_low parameters are
+         * used.
+         */
+        u32 pkt_rate_low;
+        u32 rx_coalesce_usecs_low;
+        u32 rx_max_coalesced_frames_low;
+        u32 tx_coalesce_usecs_low;
+        u32 tx_max_coalesced_frames_low;
+
+        /* When the packet rate is below pkt_rate_high but above
+         * pkt_rate_low (both measured in packets per second) the
+         * normal {rx,tx}_* coalescing parameters are used.
+         */
+
+        /* When the packet rate is (measured in packets per second)
+         * is above pkt_rate_high, the {rx,tx}_*_high parameters are
+         * used.
+         */
+        u32 pkt_rate_high;
+        u32 rx_coalesce_usecs_high;
+        u32 rx_max_coalesced_frames_high;
+        u32 tx_coalesce_usecs_high;
+        u32 tx_max_coalesced_frames_high;
+
+        /* How often to do adaptive coalescing packet rate sampling,
+         * measured in seconds.  Must not be zero.
+         */
+        u32 rate_sample_interval;
+};
+#endif /* ETHTOOL_GCOALESCE */
+
+#ifndef ETHTOOL_SCOALESCE
+#define ETHTOOL_SCOALESCE   0x0000000f /* Set coalesce config. */
+#endif
+#ifndef ETHTOOL_GRINGPARAM
+#define ETHTOOL_GRINGPARAM  0x00000010 /* Get ring parameters */
+/* for configuring RX/TX ring parameters */
+#define ethtool_ringparam _kc_ethtool_ringparam
+struct _kc_ethtool_ringparam {
+        u32 cmd;    /* ETHTOOL_{G,S}RINGPARAM */
+
+        /* Read only attributes.  These indicate the maximum number
+         * of pending RX/TX ring entries the driver will allow the
+         * user to set.
+         */
+        u32 rx_max_pending;
+        u32 rx_mini_max_pending;
+        u32 rx_jumbo_max_pending;
+        u32 tx_max_pending;
+
+        /* Values changeable by the user.  The valid values are
+         * in the range 1 to the "*_max_pending" counterpart above.
+         */
+        u32 rx_pending;
+        u32 rx_mini_pending;
+        u32 rx_jumbo_pending;
+        u32 tx_pending;
+};
+#endif /* ETHTOOL_GRINGPARAM */
+
+#ifndef ETHTOOL_SRINGPARAM
+#define ETHTOOL_SRINGPARAM  0x00000011 /* Set ring parameters, priv. */
+#endif
+#ifndef ETHTOOL_GPAUSEPARAM
+#define ETHTOOL_GPAUSEPARAM 0x00000012 /* Get pause parameters */
+/* for configuring link flow control parameters */
+#define ethtool_pauseparam _kc_ethtool_pauseparam
+struct _kc_ethtool_pauseparam {
+        u32 cmd;    /* ETHTOOL_{G,S}PAUSEPARAM */
+
+        /* If the link is being auto-negotiated (via ethtool_cmd.autoneg
+         * being true) the user may set 'autonet' here non-zero to have the
+         * pause parameters be auto-negotiated too.  In such a case, the
+         * {rx,tx}_pause values below determine what capabilities are
+         * advertised.
+         *
+         * If 'autoneg' is zero or the link is not being auto-negotiated,
+         * then {rx,tx}_pause force the driver to use/not-use pause
+         * flow control.
+         */
+        u32 autoneg;
+        u32 rx_pause;
+        u32 tx_pause;
+};
+#endif /* ETHTOOL_GPAUSEPARAM */
+
+#ifndef ETHTOOL_SPAUSEPARAM
+#define ETHTOOL_SPAUSEPARAM 0x00000013 /* Set pause parameters. */
+#endif
+#ifndef ETHTOOL_GRXCSUM
+#define ETHTOOL_GRXCSUM     0x00000014 /* Get RX hw csum enable (ethtool_value) */
+#endif
+#ifndef ETHTOOL_SRXCSUM
+#define ETHTOOL_SRXCSUM     0x00000015 /* Set RX hw csum enable (ethtool_value) */
+#endif
+#ifndef ETHTOOL_GTXCSUM
+#define ETHTOOL_GTXCSUM     0x00000016 /* Get TX hw csum enable (ethtool_value) */
+#endif
+#ifndef ETHTOOL_STXCSUM
+#define ETHTOOL_STXCSUM     0x00000017 /* Set TX hw csum enable (ethtool_value) */
+#endif
+#ifndef ETHTOOL_GSG
+#define ETHTOOL_GSG     0x00000018 /* Get scatter-gather enable
+* (ethtool_value) */
+#endif
+#ifndef ETHTOOL_SSG
+#define ETHTOOL_SSG     0x00000019 /* Set scatter-gather enable
+* (ethtool_value). */
+#endif
+#ifndef ETHTOOL_TEST
+#define ETHTOOL_TEST        0x0000001a /* execute NIC self-test, priv. */
+#endif
+#ifndef ETHTOOL_GSTRINGS
+#define ETHTOOL_GSTRINGS    0x0000001b /* get specified string set */
+#endif
+#ifndef ETHTOOL_PHYS_ID
+#define ETHTOOL_PHYS_ID     0x0000001c /* identify the NIC */
+#endif
+#ifndef ETHTOOL_GSTATS
+#define ETHTOOL_GSTATS      0x0000001d /* get NIC-specific statistics */
+#endif
+#ifndef ETHTOOL_GTSO
+#define ETHTOOL_GTSO        0x0000001e /* Get TSO enable (ethtool_value) */
+#endif
+#ifndef ETHTOOL_STSO
+#define ETHTOOL_STSO        0x0000001f /* Set TSO enable (ethtool_value) */
+#endif
+
+#ifndef ETHTOOL_BUSINFO_LEN
+#define ETHTOOL_BUSINFO_LEN 32
+#endif
+
+/*****************************************************************************/
+
+enum RTL8168_DSM_STATE {
+        DSM_MAC_INIT = 1,
+        DSM_NIC_GOTO_D3 = 2,
+        DSM_IF_DOWN = 3,
+        DSM_NIC_RESUME_D3 = 4,
+        DSM_IF_UP = 5,
+};
+
+enum RTL8168_registers {
+        MAC0            = 0x00,     /* Ethernet hardware address. */
+        MAC4            = 0x04,
+        MAR0            = 0x08,     /* Multicast filter. */
+        CounterAddrLow      = 0x10,
+        CounterAddrHigh     = 0x14,
+        CustomLED       = 0x18,
+        TxDescStartAddrLow  = 0x20,
+        TxDescStartAddrHigh = 0x24,
+        TxHDescStartAddrLow = 0x28,
+        TxHDescStartAddrHigh    = 0x2c,
+        FLASH           = 0x30,
+        ERSR            = 0x36,
+        ChipCmd         = 0x37,
+        TxPoll          = 0x38,
+        IntrMask        = 0x3C,
+        IntrStatus      = 0x3E,
+        TxConfig        = 0x40,
+        RxConfig        = 0x44,
+        TCTR            = 0x48,
+        Cfg9346         = 0x50,
+        Config0         = 0x51,
+        Config1         = 0x52,
+        Config2         = 0x53,
+        Config3         = 0x54,
+        Config4         = 0x55,
+        Config5         = 0x56,
+        TDFNR           = 0x57,
+        TimeInt0        = 0x58,
+        TimeInt1        = 0x5C,
+        PHYAR           = 0x60,
+        CSIDR           = 0x64,
+        CSIAR           = 0x68,
+        PHYstatus       = 0x6C,
+        MACDBG          = 0x6D,
+        GPIO            = 0x6E,
+        PMCH            = 0x6F,
+        ERIDR           = 0x70,
+        ERIAR           = 0x74,
+        EPHY_RXER_NUM   = 0x7C,
+        EPHYAR          = 0x80,
+        IntrMask1       = 0x84,
+        IntrMask2       = 0x85,
+        IntrStatus1     = 0x86,
+        IntrStatus2     = 0x87,
+        TimeInt2        = 0x8C,
+        Rss_indir_tbl   = 0x90,
+        OCPDR           = 0xB0,
+        MACOCP          = 0xB0,
+        OCPAR           = 0xB4,
+        SecMAC0         = 0xB4,
+        SecMAC4         = 0xB8,
+        PHYOCP          = 0xB8,
+        IntrMask3       = 0xC0,
+        IntrStatus3     = 0xC1,
+        DBG_reg         = 0xD1,
+        TwiCmdReg       = 0xD2,
+        MCUCmd_reg      = 0xD3,
+        RxMaxSize       = 0xDA,
+        EFUSEAR         = 0xDC,
+        CPlusCmd        = 0xE0,
+        IntrMitigate    = 0xE2,
+        RxDescAddrLow   = 0xE4,
+        RxDescAddrHigh  = 0xE8,
+        MTPS            = 0xEC,
+        FuncEvent       = 0xF0,
+        PPSW            = 0xF2,
+        FuncEventMask   = 0xF4,
+        TimeInt3        = 0xF4,
+        FuncPresetState = 0xF8,
+        CMAC_IBCR0      = 0xF8,
+        CMAC_IBCR2      = 0xF9,
+        CMAC_IBIMR0     = 0xFA,
+        CMAC_IBISR0     = 0xFB,
+        FuncForceEvent  = 0xFC,
+
+        /* ERI */
+        RSS_KEY_8168    = 0x90,
+        RSS_CTRL_8168   = 0xB8,
+        Q_NUM_CTRL_8168 = 0xC0,
+
+        /* MAC OCP */
+        EEE_TXIDLE_TIMER_8168   = 0xe048,
+};
+
+enum RTL8168_register_content {
+        /* InterruptStatusBits */
+        SYSErr      = 0x8000,
+        PCSTimeout  = 0x4000,
+        SWInt       = 0x0100,
+        TxDescUnavail   = 0x0080,
+        RxFIFOOver  = 0x0040,
+        LinkChg     = 0x0020,
+        RxDescUnavail   = 0x0010,
+        TxErr       = 0x0008,
+        TxOK        = 0x0004,
+        RxErr       = 0x0002,
+        RxOK        = 0x0001,
+        RxDU1       = 0x0002,
+        RxOK1       = 0x0001,
+
+        /* RxStatusDesc */
+        RxRWT = (1 << 22),
+        RxRES = (1 << 21),
+        RxRUNT = (1 << 20),
+        RxCRC = (1 << 19),
+
+        /* ChipCmdBits */
+        StopReq  = 0x80,
+        CmdReset = 0x10,
+        CmdRxEnb = 0x08,
+        CmdTxEnb = 0x04,
+        RxBufEmpty = 0x01,
+
+        /* Cfg9346Bits */
+        Cfg9346_Lock = 0x00,
+        Cfg9346_Unlock = 0xC0,
+        Cfg9346_EEDO = (1 << 0),
+        Cfg9346_EEDI = (1 << 1),
+        Cfg9346_EESK = (1 << 2),
+        Cfg9346_EECS = (1 << 3),
+        Cfg9346_EEM0 = (1 << 6),
+        Cfg9346_EEM1 = (1 << 7),
+
+        /* rx_mode_bits */
+        AcceptErr = 0x20,
+        AcceptRunt = 0x10,
+        AcceptBroadcast = 0x08,
+        AcceptMulticast = 0x04,
+        AcceptMyPhys = 0x02,
+        AcceptAllPhys = 0x01,
+
+        /* Transmit Priority Polling*/
+        HPQ = 0x80,
+        NPQ = 0x40,
+        FSWInt = 0x01,
+
+        /* RxConfigBits */
+        Reserved2_shift = 13,
+        RxCfgDMAShift = 8,
+        RxCfg_128_int_en = (1 << 15),
+        RxCfg_fet_multi_en = (1 << 14),
+        RxCfg_half_refetch = (1 << 13),
+        RxCfg_9356SEL = (1 << 6),
+        RxCfg_rx_desc_v2_en = (1 << 24),
+
+        /* TxConfigBits */
+        TxInterFrameGapShift = 24,
+        TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
+        TxMACLoopBack = (1 << 17),  /* MAC loopback */
+
+        /* Config1 register */
+        LEDS1       = (1 << 7),
+        LEDS0       = (1 << 6),
+        Speed_down  = (1 << 4),
+        MEMMAP      = (1 << 3),
+        IOMAP       = (1 << 2),
+        VPD         = (1 << 1),
+        PMEnable    = (1 << 0), /* Power Management Enable */
+
+        /* Config2 register */
+        ClkReqEn	= (1 << 7),	/* Clock Request Enable */
+        PMSTS_En    = (1 << 5),
+
+        /* Config3 register */
+        Isolate_en  = (1 << 12), /* Isolate enable */
+        MagicPacket = (1 << 5), /* Wake up when receives a Magic Packet */
+        LinkUp      = (1 << 4), /* This bit is reserved in RTL8168B.*/
+        /* Wake up when the cable connection is re-established */
+        ECRCEN      = (1 << 3), /* This bit is reserved in RTL8168B*/
+        Jumbo_En0   = (1 << 2), /* This bit is reserved in RTL8168B*/
+        RDY_TO_L23  = (1 << 1), /* This bit is reserved in RTL8168B*/
+        Beacon_en   = (1 << 0), /* This bit is reserved in RTL8168B*/
+
+        /* Config4 register */
+        Jumbo_En1   = (1 << 1), /* This bit is reserved in RTL8168B*/
+
+        /* Config5 register */
+        BWF     = (1 << 6), /* Accept Broadcast wakeup frame */
+        MWF     = (1 << 5), /* Accept Multicast wakeup frame */
+        UWF     = (1 << 4), /* Accept Unicast wakeup frame */
+        LanWake     = (1 << 1), /* LanWake enable/disable */
+        PMEStatus   = (1 << 0), /* PME status can be reset by PCI RST# */
+        ASPM_en	    = (1 << 0),	/* ASPM enable */
+
+        /* CPlusCmd */
+        EnableBist  = (1 << 15),
+        Macdbgo_oe  = (1 << 14),
+        Normal_mode = (1 << 13),
+        Force_halfdup   = (1 << 12),
+        Force_rxflow_en = (1 << 11),
+        Force_txflow_en = (1 << 10),
+        Cxpl_dbg_sel    = (1 << 9),//This bit is reserved in RTL8168B
+        ASF     = (1 << 8),//This bit is reserved in RTL8168C
+        PktCntrDisable  = (1 << 7),
+        RxVlan      = (1 << 6),
+        RxChkSum    = (1 << 5),
+        Macdbgo_sel = 0x001C,
+        INTT_0      = 0x0000,
+        INTT_1      = 0x0001,
+        INTT_2      = 0x0002,
+        INTT_3      = 0x0003,
+
+        /* rtl8168_PHYstatus */
+        PowerSaveStatus = 0x80,
+        TxFlowCtrl = 0x40,
+        RxFlowCtrl = 0x20,
+        _1000bpsF = 0x10,
+        _100bps = 0x08,
+        _10bps = 0x04,
+        LinkStatus = 0x02,
+        FullDup = 0x01,
+
+        /* DBG_reg */
+        Fix_Nak_1 = (1 << 4),
+        Fix_Nak_2 = (1 << 3),
+        DBGPIN_E2 = (1 << 0),
+
+        /* ResetCounterCommand */
+        CounterReset = 0x1,
+        /* DumpCounterCommand */
+        CounterDump = 0x8,
+
+        /* PHY access */
+        PHYAR_Flag = 0x80000000,
+        PHYAR_Write = 0x80000000,
+        PHYAR_Read = 0x00000000,
+        PHYAR_Reg_Mask = 0x1f,
+        PHYAR_Reg_shift = 16,
+        PHYAR_Data_Mask = 0xffff,
+
+        /* EPHY access */
+        EPHYAR_Flag = 0x80000000,
+        EPHYAR_Write = 0x80000000,
+        EPHYAR_Read = 0x00000000,
+        EPHYAR_Reg_Mask = 0x3f,
+        EPHYAR_Reg_shift = 16,
+        EPHYAR_Data_Mask = 0xffff,
+
+        /* CSI access */
+        CSIAR_Flag = 0x80000000,
+        CSIAR_Write = 0x80000000,
+        CSIAR_Read = 0x00000000,
+        CSIAR_ByteEn = 0x0f,
+        CSIAR_ByteEn_shift = 12,
+        CSIAR_Addr_Mask = 0x0fff,
+
+        /* ERI access */
+        ERIAR_Flag = 0x80000000,
+        ERIAR_Write = 0x80000000,
+        ERIAR_Read = 0x00000000,
+        ERIAR_Addr_Align = 4, /* ERI access register address must be 4 byte alignment */
+        ERIAR_ExGMAC = 0,
+        ERIAR_MSIX = 1,
+        ERIAR_ASF = 2,
+        ERIAR_OOB = 2,
+        ERIAR_Type_shift = 16,
+        ERIAR_ByteEn = 0x0f,
+        ERIAR_ByteEn_shift = 12,
+
+        /* OCP GPHY access */
+        OCPDR_Write = 0x80000000,
+        OCPDR_Read = 0x00000000,
+        OCPDR_Reg_Mask = 0xFF,
+        OCPDR_Data_Mask = 0xFFFF,
+        OCPDR_GPHY_Reg_shift = 16,
+        OCPAR_Flag = 0x80000000,
+        OCPAR_GPHY_Write = 0x8000F060,
+        OCPAR_GPHY_Read = 0x0000F060,
+        OCPR_Write = 0x80000000,
+        OCPR_Read = 0x00000000,
+        OCPR_Addr_Reg_shift = 16,
+        OCPR_Flag = 0x80000000,
+        OCP_STD_PHY_BASE_PAGE = 0x0A40,
+
+        /* MCU Command */
+        Now_is_oob = (1 << 7),
+        Txfifo_empty = (1 << 5),
+        Rxfifo_empty = (1 << 4),
+
+        /* E-FUSE access */
+        EFUSE_WRITE = 0x80000000,
+        EFUSE_WRITE_OK  = 0x00000000,
+        EFUSE_READ  = 0x00000000,
+        EFUSE_READ_OK   = 0x80000000,
+        EFUSE_WRITE_V3 = 0x40000000,
+        EFUSE_WRITE_OK_V3  = 0x00000000,
+        EFUSE_READ_V3  = 0x80000000,
+        EFUSE_READ_OK_V3   = 0x00000000,
+        EFUSE_Reg_Mask  = 0x03FF,
+        EFUSE_Reg_Shift = 8,
+        EFUSE_Check_Cnt = 300,
+        EFUSE_READ_FAIL = 0xFF,
+        EFUSE_Data_Mask = 0x000000FF,
+
+        /* GPIO */
+        GPIO_en = (1 << 0),
+
+};
+
+enum _DescStatusBit {
+        DescOwn     = (1 << 31), /* Descriptor is owned by NIC */
+        RingEnd     = (1 << 30), /* End of descriptor ring */
+        FirstFrag   = (1 << 29), /* First segment of a packet */
+        LastFrag    = (1 << 28), /* Final segment of a packet */
+
+        /* Tx private */
+        /*------ offset 0 of tx descriptor ------*/
+        LargeSend   = (1 << 27), /* TCP Large Send Offload (TSO) */
+        GiantSendv4 = (1 << 26), /* TCP Giant Send Offload V4 (GSOv4) */
+        GiantSendv6 = (1 << 25), /* TCP Giant Send Offload V6 (GSOv6) */
+        LargeSend_DP = (1 << 16), /* TCP Large Send Offload (TSO) */
+        MSSShift    = 16,        /* MSS value position */
+        MSSMask     = 0x7FFU,    /* MSS value 11 bits */
+        TxIPCS      = (1 << 18), /* Calculate IP checksum */
+        TxUDPCS     = (1 << 17), /* Calculate UDP/IP checksum */
+        TxTCPCS     = (1 << 16), /* Calculate TCP/IP checksum */
+        TxVlanTag   = (1 << 17), /* Add VLAN tag */
+
+        /*@@@@@@ offset 4 of tx descriptor => bits for RTL8168C/CP only     begin @@@@@@*/
+        TxUDPCS_C   = (1 << 31), /* Calculate UDP/IP checksum */
+        TxTCPCS_C   = (1 << 30), /* Calculate TCP/IP checksum */
+        TxIPCS_C    = (1 << 29), /* Calculate IP checksum */
+        TxIPV6F_C   = (1 << 28), /* Indicate it is an IPv6 packet */
+        /*@@@@@@ offset 4 of tx descriptor => bits for RTL8168C/CP only     end @@@@@@*/
+
+
+        /* Rx private */
+        /*------ offset 0 of rx descriptor ------*/
+        PID1        = (1 << 18), /* Protocol ID bit 1/2 */
+        PID0        = (1 << 17), /* Protocol ID bit 2/2 */
+
+#define RxProtoUDP  (PID1)
+#define RxProtoTCP  (PID0)
+#define RxProtoIP   (PID1 | PID0)
+#define RxProtoMask RxProtoIP
+
+        RxIPF       = (1 << 16), /* IP checksum failed */
+        RxUDPF      = (1 << 15), /* UDP/IP checksum failed */
+        RxTCPF      = (1 << 14), /* TCP/IP checksum failed */
+        RxVlanTag   = (1 << 16), /* VLAN tag available */
+
+        /*@@@@@@ offset 0 of rx descriptor => bits for RTL8168C/CP only     begin @@@@@@*/
+        RxUDPT      = (1 << 18),
+        RxTCPT      = (1 << 17),
+        /*@@@@@@ offset 0 of rx descriptor => bits for RTL8168C/CP only     end @@@@@@*/
+
+        /*@@@@@@ offset 4 of rx descriptor => bits for RTL8168C/CP only     begin @@@@@@*/
+        RxV6F       = (1 << 31),
+        RxV4F       = (1 << 30),
+        /*@@@@@@ offset 4 of rx descriptor => bits for RTL8168C/CP only     end @@@@@@*/
+};
+
+enum features {
+//  RTL_FEATURE_WOL = (1 << 0),
+        RTL_FEATURE_MSI = (1 << 1),
+        RTL_FEATURE_MSIX = (1 << 2),
+};
+
+enum wol_capability {
+        WOL_DISABLED = 0,
+        WOL_ENABLED = 1
+};
+
+enum bits {
+        BIT_0 = (1 << 0),
+        BIT_1 = (1 << 1),
+        BIT_2 = (1 << 2),
+        BIT_3 = (1 << 3),
+        BIT_4 = (1 << 4),
+        BIT_5 = (1 << 5),
+        BIT_6 = (1 << 6),
+        BIT_7 = (1 << 7),
+        BIT_8 = (1 << 8),
+        BIT_9 = (1 << 9),
+        BIT_10 = (1 << 10),
+        BIT_11 = (1 << 11),
+        BIT_12 = (1 << 12),
+        BIT_13 = (1 << 13),
+        BIT_14 = (1 << 14),
+        BIT_15 = (1 << 15),
+        BIT_16 = (1 << 16),
+        BIT_17 = (1 << 17),
+        BIT_18 = (1 << 18),
+        BIT_19 = (1 << 19),
+        BIT_20 = (1 << 20),
+        BIT_21 = (1 << 21),
+        BIT_22 = (1 << 22),
+        BIT_23 = (1 << 23),
+        BIT_24 = (1 << 24),
+        BIT_25 = (1 << 25),
+        BIT_26 = (1 << 26),
+        BIT_27 = (1 << 27),
+        BIT_28 = (1 << 28),
+        BIT_29 = (1 << 29),
+        BIT_30 = (1 << 30),
+        BIT_31 = (1 << 31)
+};
+
+#define RTL8168_CP_NUM 4
+#define RTL8168_MAX_SUPPORT_cp_len 110
+
+enum rtl8168_cp_status {
+        rtl8168_cp_normal = 0,
+        rtl8168_cp_short,
+        rtl8168_cp_open,
+        rtl8168_cp_mismatch,
+        rtl8168_cp_unknown
+};
+
+enum effuse {
+        EFUSE_NOT_SUPPORT = 0,
+        EFUSE_SUPPORT_V1,
+        EFUSE_SUPPORT_V2,
+        EFUSE_SUPPORT_V3,
+};
+#define RsvdMask    0x3fffc000
+
+struct TxDesc {
+        u32 opts1;
+        u32 opts2;
+        u64 addr;
+};
+
+struct RxDesc {
+        u32 opts1;
+        u32 opts2;
+        u64 addr;
+};
+
+struct RxDescV2 {
+        u32 opts1;
+        u32 opts2;
+        u64 addr;
+        u32 rsvd1;
+        u32 RSSResult;
+        u64 rsvd2;
+};
+
+//Rx Desc Type
+enum rx_desc_ring_type {
+        RX_DESC_RING_TYPE_UNKNOWN=0,
+        RX_DESC_RING_TYPE_1,
+        RX_DESC_RING_TYPE_2,
+        RX_DESC_RING_TYPE_3,
+        RX_DESC_RING_TYPE_MAX
+};
+
+enum rx_desc_len {
+        RX_DESC_LEN_TYPE_1 = (sizeof(struct RxDesc)),
+        RX_DESC_LEN_TYPE_2 = (sizeof(struct RxDescV2))
+};
+
+struct ring_info {
+        struct sk_buff  *skb;
+        u32     len;
+        u8      __pad[sizeof(void *) - sizeof(u32)];
+};
+
+struct pci_resource {
+        u8  cmd;
+        u8  cls;
+        u16 io_base_h;
+        u16 io_base_l;
+        u16 mem_base_h;
+        u16 mem_base_l;
+        u8  ilr;
+        u16 resv_0x1c_h;
+        u16 resv_0x1c_l;
+        u16 resv_0x20_h;
+        u16 resv_0x20_l;
+        u16 resv_0x24_h;
+        u16 resv_0x24_l;
+        u16 resv_0x2c_h;
+        u16 resv_0x2c_l;
+        u32 pci_sn_l;
+        u32 pci_sn_h;
+};
+
+enum r8168_flag {
+        R8168_FLAG_DOWN = 0,
+        R8168_FLAG_TASK_RESET_PENDING,
+        R8168_FLAG_TASK_ESD_CHECK_PENDING,
+        R8168_FLAG_TASK_LINKCHG_CHECK_PENDING,
+        R8168_FLAG_MAX
+};
+
+/* Flow Control Settings */
+enum rtl8168_fc_mode {
+        rtl8168_fc_none = 0,
+        rtl8168_fc_rx_pause,
+        rtl8168_fc_tx_pause,
+        rtl8168_fc_full,
+        rtl8168_fc_default
+};
+
+struct rtl8168_tx_ring {
+        void* priv;
+        u32 index;
+        u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
+        u32 dirty_tx;
+        u32 num_tx_desc; /* Number of Tx descriptor registers */
+        u32 tdu; /* Tx descriptor unavailable count */
+        struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */
+        dma_addr_t TxPhyAddr;
+        u32 TxDescAllocSize;
+        struct ring_info tx_skb[NUM_TX_DESC]; /* Tx data buffers */
+
+        u16 tdsar_reg; /* Transmit Descriptor Start Address */
+};
+
+struct rtl8168_rx_ring {
+        void* priv;
+        u32 index;
+        u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
+        u32 dirty_rx;
+        u32 rdu; /* Rx descriptor unavailable count */
+        //struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
+        //u32 RxDescAllocSize;
+        u64 RxDescPhyAddr[MAX_NUM_RX_DESC]; /* Rx desc physical address*/
+        //dma_addr_t RxPhyAddr;
+        struct sk_buff *Rx_skbuff[MAX_NUM_RX_DESC]; /* Rx data buffers */
+
+        //u16 rdsar_reg; /* Receive Descriptor Start Address */
+};
+
+struct r8168_napi {
+#ifdef CONFIG_R8168_NAPI
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
+        struct napi_struct napi;
+#endif
+#endif
+        void* priv;
+        int index;
+};
+
+struct r8168_irq {
+        irq_handler_t	handler;
+        unsigned int	vector;
+        u8		requested;
+        char		name[IFNAMSIZ + 10];
+};
+
+#pragma pack(1)
+struct rtl8168_regs {
+        //00
+        u8 mac_id[6];
+        u16 reg_06;
+        u8 mar[8];
+        //10
+        u64 dtccr;
+        u16 ledsel0;
+        u16 legreg;
+        u32 tctr3;
+        //20
+        u32 txq0_dsc_st_addr_0;
+        u32 txq0_dsc_st_addr_2;
+        u64 reg_28;
+        //30
+        u16 rit;
+        u16 ritc;
+        u16 reg_34;
+        u8 reg_36;
+        u8 command;
+        u32 imr0;
+        u32 isr0;
+        //40
+        u32 tcr;
+        u32 rcr;
+        u32 tctr0;
+        u32 tctr1;
+        //50
+        u8 cr93c46;
+        u8 config0;
+        u8 config1;
+        u8 config2;
+        u8 config3;
+        u8 config4;
+        u8 config5;
+        u8 tdfnr;
+        u32 timer_int0;
+        u32 timer_int1;
+        //60
+        u32 gphy_mdcmdio;
+        u32 csidr;
+        u32 csiar;
+        u16 phy_status;
+        u8 config6;
+        u8 pmch;
+        //70
+        u32 eridr;
+        u32 eriar;
+        u16 config7;
+        u16 reg_7a;
+        u32 ephy_rxerr_cnt;
+        //80
+        u32 ephy_mdcmdio;
+        u16 ledsel2;
+        u16 ledsel1;
+        u32 tctr2;
+        u32 timer_int2;
+        //90
+        u8 tppoll0;
+        u8 reg_91;
+        u16 reg_92;
+        u16 led_feature;
+        u16 ledsel3;
+        u16 eee_led_config;
+        u16 reg_9a;
+        u32 reg_9c;
+        //a0
+        u32 reg_a0;
+        u32 reg_a4;
+        u32 reg_a8;
+        u32 reg_ac;
+        //b0
+        u32 patch_dbg;
+        u32 reg_b4;
+        u32 gphy_ocp;
+        u32 reg_bc;
+        //c0
+        u32 reg_c0;
+        u32 reg_c4;
+        u32 reg_c8;
+        u16 otp_cmd;
+        u16 otp_pg_config;
+        //d0
+        u16 phy_pwr;
+        u8 twsi_ctrl;
+        u8 oob_ctrl;
+        u16 mac_dbgo;
+        u16 mac_dbg;
+        u16 reg_d8;
+        u16 rms;
+        u32 efuse_data;
+        //e0
+        u16 cplus_cmd;
+        u16 reg_e2;
+        u32 rxq0_dsc_st_addr_0;
+        u32 rxq0_dsc_st_addr_2;
+        u16 reg_ec;
+        u16 tx10midle_cnt;
+        //f0
+        u16 misc0;
+        u16 misc1;
+        u32 timer_int3;
+        u32 cmac_ib;
+        u16 reg_fc;
+        u16 sw_rst;
+};
+#pragma pack()
+
+struct rtl8168_regs_save {
+        union {
+                u8 mac_io[R8168_MAC_REGS_SIZE];
+
+                struct rtl8168_regs mac_reg;
+        };
+        u16 pcie_phy[R8168_EPHY_REGS_SIZE/2];
+        u16 eth_phy[R8168_PHY_REGS_SIZE/2];
+        u32 eri_reg[R8168_ERI_REGS_SIZE/4];
+        u32 pci_reg[R8168_PCI_REGS_SIZE/4];
+
+        //ktime_t begin_ktime;
+        //ktime_t end_ktime;
+        //u64 duration_ns;
+
+
+        u16 int_miti_rxq0;
+
+        u8 int_config;
+        u32 imr_new;
+        u32 isr_new;
+
+        u8 tdu_status;
+        u16 rdu_status;
+
+        u32 rss_ctrl;
+        u8 rss_key[RTL8168_RSS_KEY_SIZE];
+        u8 rss_i_table[RTL8168_MAX_INDIRECTION_TABLE_ENTRIES];
+        u16 rss_queue_num_sel_r;
+};
+
+struct rtl8168_counters {
+        /* legacy */
+        u64 tx_packets;
+        u64 rx_packets;
+        u64 tx_errors;
+        u32 rx_errors;
+        u16 rx_missed;
+        u16 align_errors;
+        u32 tx_one_collision;
+        u32 tx_multi_collision;
+        u64 rx_unicast;
+        u64 rx_broadcast;
+        u32 rx_multicast;
+        u16 tx_aborted;
+        u16 tx_underrun;
+};
+
+struct rtl8168_private {
+        void __iomem *mmio_addr;    /* memory map physical address */
+        struct pci_dev *pci_dev;    /* Index of PCI device */
+        struct pci_dev *pdev_cmac;  /* Index of PCI device */
+        struct net_device *dev;
+        struct r8168_napi r8168napi[R8168_MAX_MSIX_VEC];
+        struct r8168_irq irq_tbl[R8168_MAX_MSIX_VEC];
+        unsigned int irq_nvecs;
+        unsigned int max_irq_nvecs;
+        unsigned int min_irq_nvecs;
+        unsigned int hw_supp_irq_nvecs;
+        struct net_device_stats stats;  /* statistics of net device */
+        u32 msg_enable;
+        u32 tx_tcp_csum_cmd;
+        u32 tx_udp_csum_cmd;
+        u32 tx_ip_csum_cmd;
+        u32 tx_ipv6_csum_cmd;
+        int max_jumbo_frame_size;
+        int chipset;
+        u32 mcfg;
+        //u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
+        // u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
+        //u32 dirty_rx;
+        //u32 dirty_tx;
+        u32 num_rx_desc; /* Number of Rx descriptor registers */
+        //u32 num_tx_desc; /* Number of Tx descriptor registers */
+        //struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */
+        struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
+        //dma_addr_t TxPhyAddr;
+        dma_addr_t RxPhyAddr;
+        //u32 TxDescAllocSize;
+        u32 RxDescAllocSize;
+        //struct sk_buff *Rx_skbuff[MAX_NUM_RX_DESC]; /* Rx data buffers */
+        //struct ring_info tx_skb[MAX_NUM_TX_DESC];   /* Tx data buffers */
+        unsigned rx_buf_sz;
+        u16 HwSuppNumTxQueues; // Number of tx ring that hardware can support
+        u16 HwSuppNumRxQueues; // Number of rx ring that hardware can support
+        unsigned int num_tx_rings; // Number of tx ring that non-ring-lib driver used
+        unsigned int num_rx_rings; // Number of rx ring that non-ring-lib driver used
+        struct rtl8168_tx_ring tx_ring[R8168_MAX_TX_QUEUES]; // non-ring-lib tx ring
+        struct rtl8168_rx_ring rx_ring[R8168_MAX_RX_QUEUES]; // non-ring-lib rx ring
+#ifdef ENABLE_LIB_SUPPORT
+        struct blocking_notifier_head lib_nh;
+        struct rtl8168_ring lib_tx_ring[R8168_MAX_TX_QUEUES]; // ring-lib tx ring
+        struct rtl8168_ring lib_rx_ring[R8168_MAX_RX_QUEUES]; // ring-lib rx ring
+#endif
+        u16 num_hw_tot_en_rx_rings; // Number of rx ring that hardware enabled
+        //struct timer_list esd_timer;
+        //struct timer_list link_timer;
+        struct pci_resource pci_cfg_space;
+        unsigned int esd_flag;
+        unsigned int pci_cfg_is_read;
+        unsigned int rtl8168_rx_config;
+        u16 cp_cmd;
+        u16 intr_mask;
+        u16 timer_intr_mask;
+        u16 isr_reg[R8168_MAX_MSIX_VEC];
+        u16 imr_reg[R8168_MAX_MSIX_VEC];
+        int phy_auto_nego_reg;
+        int phy_1000_ctrl_reg;
+        u8 org_mac_addr[NODE_ADDRESS_SIZE];
+        struct rtl8168_counters *tally_vaddr;
+        dma_addr_t tally_paddr;
+
+#ifdef CONFIG_R8168_VLAN
+        struct vlan_group *vlgrp;
+#endif
+        u8  wol_enabled;
+        u32 wol_opts;
+        u8  efuse_ver;
+        u8  eeprom_type;
+        u8  autoneg;
+        u8  duplex;
+        u32 speed;
+        u32 advertising;
+        enum rtl8168_fc_mode fcpause;
+        u16 eeprom_len;
+        u16 cur_page;
+        u32 bios_setting;
+
+        int (*set_speed)(struct net_device *, u8 autoneg, u32 speed, u8 duplex, u32 adv);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
+        void (*get_settings)(struct net_device *, struct ethtool_cmd *);
+#else
+        void (*get_settings)(struct net_device *, struct ethtool_link_ksettings *);
+#endif
+        void (*phy_reset_enable)(struct net_device *);
+        unsigned int (*phy_reset_pending)(struct net_device *);
+        unsigned int (*link_ok)(struct net_device *);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
+        struct work_struct reset_task;
+        struct work_struct esd_task;
+        struct work_struct linkchg_task;
+#else
+        struct delayed_work reset_task;
+        struct delayed_work esd_task;
+        struct delayed_work linkchg_task;
+#endif
+        DECLARE_BITMAP(task_flags, R8168_FLAG_MAX);
+        unsigned features;
+
+        u8 org_pci_offset_99;
+        u8 org_pci_offset_180;
+        u8 issue_offset_99_event;
+
+        u8 org_pci_offset_80;
+        u8 org_pci_offset_81;
+        u8 use_timer_interrrupt;
+
+        u32 keep_intr_cnt;
+
+        u8  HwIcVerUnknown;
+        u8  NotWrRamCodeToMicroP;
+        u8  NotWrMcuPatchCode;
+        u8  HwHasWrRamCodeToMicroP;
+
+        u16 sw_ram_code_ver;
+        u16 hw_ram_code_ver;
+
+        u8 rtk_enable_diag;
+
+        u8 ShortPacketSwChecksum;
+
+        u8 UseSwPaddingShortPkt;
+
+        u8 RequireAdcBiasPatch;
+        u16 AdcBiasPatchIoffset;
+
+        u8 RequireAdjustUpsTxLinkPulseTiming;
+        u16 SwrCnt1msIni;
+
+        u8 HwSuppNowIsOobVer;
+
+        u8 RequiredSecLanDonglePatch;
+
+        u32 HwFiberModeVer;
+        u32 HwFiberStat;
+        u8 HwFiberLedMode;
+        u8 HwSwitchMdiToFiber;
+
+        u8 HwSuppSerDesPhyVer;
+
+        u8 HwSuppPhyOcpVer;
+
+        u8 HwSuppAspmClkIntrLock;
+
+        u16 NicCustLedValue;
+
+        u8 HwSuppUpsVer;
+
+        u8 HwSuppMagicPktVer;
+
+        u8 HwSuppCheckPhyDisableModeVer;
+
+        u8 random_mac;
+
+        u16 phy_reg_aner;
+        u16 phy_reg_anlpar;
+        u16 phy_reg_gbsr;
+
+        u32 HwPcieSNOffset;
+
+        u8 HwSuppEsdVer;
+        u8 TestPhyOcpReg;
+        u16 BackupPhyFuseDout_15_0;
+        u16 BackupPhyFuseDout_31_16;
+        u16 BackupPhyFuseDout_47_32;
+        u16 BackupPhyFuseDout_63_48;
+
+        u8 ring_lib_enabled;
+
+        const char *fw_name;
+        struct rtl8168_fw *rtl_fw;
+        u32 ocp_base;
+
+        //Dash+++++++++++++++++
+        u8 HwSuppDashVer;
+        u8 DASH;
+        u8 dash_printer_enabled;
+        u8 HwPkgDet;
+        void __iomem *cmac_ioaddr; /* cmac memory map physical address */
+
+#ifdef ENABLE_DASH_SUPPORT
+        u16 AfterRecvFromFwBufLen;
+        u8 AfterRecvFromFwBuf[RECV_FROM_FW_BUF_SIZE];
+        u16 AfterSendToFwBufLen;
+        u8 AfterSendToFwBuf[SEND_TO_FW_BUF_SIZE];
+        u16 SendToFwBufferLen;
+        u32 SizeOfSendToFwBuffer ;
+        u32 SizeOfSendToFwBufferMemAlloc ;
+        u32 NumOfSendToFwBuffer ;
+
+        u8 OobReq;
+        u8 OobAck;
+        u32 OobReqComplete;
+        u32 OobAckComplete;
+
+        u8 RcvFwReqSysOkEvt;
+        u8 RcvFwDashOkEvt;
+        u8 SendFwHostOkEvt;
+
+        u8 DashFwDisableRx;
+
+        void *SendToFwBuffer ;
+        dma_addr_t SendToFwBufferPhy ;
+        u8 SendingToFw;
+        PTX_DASH_SEND_FW_DESC TxDashSendFwDesc;
+        dma_addr_t TxDashSendFwDescPhy;
+        u32 SizeOfTxDashSendFwDescMemAlloc;
+        u32 SizeOfTxDashSendFwDesc ;
+        u32 NumTxDashSendFwDesc ;
+        u32 CurrNumTxDashSendFwDesc ;
+        u32 LastSendNumTxDashSendFwDesc ;
+
+        u32 NumRecvFromFwBuffer ;
+        u32 SizeOfRecvFromFwBuffer ;
+        u32 SizeOfRecvFromFwBufferMemAlloc ;
+        void *RecvFromFwBuffer ;
+        dma_addr_t RecvFromFwBufferPhy ;
+
+        PRX_DASH_FROM_FW_DESC RxDashRecvFwDesc;
+        dma_addr_t RxDashRecvFwDescPhy;
+        u32 SizeOfRxDashRecvFwDescMemAlloc;
+        u32 SizeOfRxDashRecvFwDesc ;
+        u32 NumRxDashRecvFwDesc ;
+        u32 CurrNumRxDashRecvFwDesc ;
+        u8 DashReqRegValue;
+        u16 HostReqValue;
+
+        u32 CmacResetIsrCounter;
+        u8 CmacResetIntr ;
+        u8 CmacResetting ;
+        u8 CmacOobIssueCmacReset ;
+        u32 CmacResetbyFwCnt;
+
+#if defined(ENABLE_DASH_PRINTER_SUPPORT)
+        struct completion fw_ack;
+        struct completion fw_req;
+        struct completion fw_host_ok;
+#endif
+        //Dash-----------------
+#endif //ENABLE_DASH_SUPPORT
+
+        //Realwow++++++++++++++
+        u8 HwSuppKCPOffloadVer;
+
+        u8 EnableDhcpTimeoutWake;
+        u8 EnableTeredoOffload;
+        u8 EnableKCPOffload;
+#ifdef ENABLE_REALWOW_SUPPORT
+        u32 DhcpTimeout;
+        MP_KCP_INFO MpKCPInfo;
+        //Realwow--------------
+#endif //ENABLE_REALWOW_SUPPORT
+
+        struct ethtool_eee eee;
+
+        u32 dynamic_aspm_packet_count;
+
+#ifdef ENABLE_R8168_PROCFS
+        //Procfs support
+        struct proc_dir_entry *proc_dir;
+#endif
+        u8 HwSuppRxDescType;
+        u8 InitRxDescType;
+        u16 RxDescLength; //V1 16 Byte V2 32 Bytes
+
+        u8 HwSuppRssVer;
+        u8 EnableRss;
+        u16 HwSuppIndirTblEntries;
+#ifdef ENABLE_RSS_SUPPORT
+        u32 rss_flags;
+        /* Receive Side Scaling settings */
+#define RTL8168_RSS_KEY_SIZE     40  /* size of RSS Hash Key in bytes */
+        u8 rss_key[RTL8168_RSS_KEY_SIZE];
+#define RTL8168_MAX_INDIRECTION_TABLE_ENTRIES 128
+        u8 rss_indir_tbl[RTL8168_MAX_INDIRECTION_TABLE_ENTRIES];
+        u32 rss_options;
+#endif
+        u32 rx_fifo_of; /* Rx fifo overflow count */
+};
+
+#ifdef ENABLE_LIB_SUPPORT
+static inline unsigned int
+rtl8168_num_lib_tx_rings(struct rtl8168_private *tp)
+{
+        int count, i;
+
+        for (count = 0, i = tp->num_tx_rings; i < tp->HwSuppNumTxQueues; i++)
+                if(tp->lib_tx_ring[i].enabled)
+                        count++;
+
+        return count;
+}
+
+static inline unsigned int
+rtl8168_num_lib_rx_rings(struct rtl8168_private *tp)
+{
+        int count, i;
+
+        for (count = 0, i = tp->num_rx_rings; i < tp->HwSuppNumRxQueues; i++)
+                if(tp->lib_rx_ring[i].enabled)
+                        count++;
+
+        return count;
+}
+
+static inline bool
+rtl8168_lib_tx_ring_released(struct rtl8168_private *tp)
+{
+        int i;
+        bool released = 0;
+
+        for (i = tp->num_tx_rings; i < tp->HwSuppNumTxQueues; i++) {
+                struct rtl8168_ring *ring = &tp->lib_tx_ring[i];
+                if (ring->allocated)
+                        goto exit;
+        }
+
+        released = 1;
+
+exit:
+        return released;
+}
+
+static inline bool
+rtl8168_lib_rx_ring_released(struct rtl8168_private *tp)
+{
+        int i;
+        bool released = 0;
+
+        for (i = tp->num_rx_rings; i < tp->HwSuppNumRxQueues; i++) {
+                struct rtl8168_ring *ring = &tp->lib_rx_ring[i];
+                if (ring->allocated)
+                        goto exit;
+        }
+
+        released = 1;
+
+exit:
+        return released;
+}
+
+#else
+
+static inline unsigned int
+rtl8168_num_lib_tx_rings(struct rtl8168_private *tp)
+{
+        return 0;
+}
+
+static inline unsigned int
+rtl8168_num_lib_rx_rings(struct rtl8168_private *tp)
+{
+        return 0;
+}
+
+static inline bool
+rtl8168_lib_tx_ring_released(struct rtl8168_private *tp)
+{
+        return 1;
+}
+
+static inline bool
+rtl8168_lib_rx_ring_released(struct rtl8168_private *tp)
+{
+        return 1;
+}
+#endif
+
+static inline unsigned int
+rtl8168_tot_tx_rings(struct rtl8168_private *tp)
+{
+        return tp->num_tx_rings + rtl8168_num_lib_tx_rings(tp);
+}
+
+static inline unsigned int
+rtl8168_tot_rx_rings(struct rtl8168_private *tp)
+{
+        return tp->num_rx_rings + rtl8168_num_lib_rx_rings(tp);
+}
+
+static inline bool
+rtl8168_lib_all_ring_released(struct rtl8168_private *tp)
+{
+        return (rtl8168_lib_tx_ring_released(tp) &&
+                rtl8168_lib_rx_ring_released(tp));
+}
+
+enum eetype {
+        EEPROM_TYPE_NONE=0,
+        EEPROM_TYPE_93C46,
+        EEPROM_TYPE_93C56,
+        EEPROM_TWSI
+};
+
+enum mcfg {
+        CFG_METHOD_1=0,
+        CFG_METHOD_2,
+        CFG_METHOD_3,
+        CFG_METHOD_4,
+        CFG_METHOD_5,
+        CFG_METHOD_6,
+        CFG_METHOD_7,
+        CFG_METHOD_8,
+        CFG_METHOD_9 ,
+        CFG_METHOD_10,
+        CFG_METHOD_11,
+        CFG_METHOD_12,
+        CFG_METHOD_13,
+        CFG_METHOD_14,
+        CFG_METHOD_15,
+        CFG_METHOD_16,
+        CFG_METHOD_17,
+        CFG_METHOD_18,
+        CFG_METHOD_19,
+        CFG_METHOD_20,
+        CFG_METHOD_21,
+        CFG_METHOD_22,
+        CFG_METHOD_23,
+        CFG_METHOD_24,
+        CFG_METHOD_25,
+        CFG_METHOD_26,
+        CFG_METHOD_27,
+        CFG_METHOD_28,
+        CFG_METHOD_29,
+        CFG_METHOD_30,
+        CFG_METHOD_31,
+        CFG_METHOD_32,
+        CFG_METHOD_33,
+        CFG_METHOD_34,
+        CFG_METHOD_35,
+        CFG_METHOD_36,
+        CFG_METHOD_37,
+        CFG_METHOD_MAX,
+        CFG_METHOD_DEFAULT = 0xFF
+};
+
+#define LSO_32K 32000
+#define LSO_64K 64000
+
+#define NIC_MIN_PHYS_BUF_COUNT          (2)
+#define NIC_MAX_PHYS_BUF_COUNT_LSO_64K  (24)
+#define NIC_MAX_PHYS_BUF_COUNT_LSO2     (16*4)
+
+#define GTTCPHO_SHIFT                   18
+#define GTTCPHO_MAX                     0x70U
+#define GTPKTSIZE_MAX                   0x3ffffU
+#define TCPHO_SHIFT                     18
+#define TCPHO_MAX                       0x3ffU
+#define LSOPKTSIZE_MAX                  0xffffU
+#define MSS_MAX                         0x07ffu /* MSS value */
+
+#define OOB_CMD_RESET       0x00
+#define OOB_CMD_DRIVER_START    0x05
+#define OOB_CMD_DRIVER_STOP 0x06
+#define OOB_CMD_SET_IPMAC   0x41
+
+#define WAKEUP_MAGIC_PACKET_NOT_SUPPORT (0)
+#define WAKEUP_MAGIC_PACKET_V1 (1)
+#define WAKEUP_MAGIC_PACKET_V2 (2)
+
+//Ram Code Version
+#define NIC_RAMCODE_VERSION_CFG_METHOD_14 (0x0057)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_16 (0x0055)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_18 (0x0052)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_20 (0x0044)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_21 (0x0042)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_24 (0x0001)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_23 (0x0015)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_26 (0x0012)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_28 (0x0019)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_29 (0x0083)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_31 (0x0003)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_35 (0x0027)
+#define NIC_RAMCODE_VERSION_CFG_METHOD_36 (0x0000)
+
+//hwoptimize
+#define HW_PATCH_SOC_LAN (BIT_0)
+#define HW_PATCH_SAMSUNG_LAN_DONGLE (BIT_2)
+
+static const u8 other_q_intr_mask = (RxOK1 | RxDU1);
+
+#define HW_PHY_STATUS_INI       1
+#define HW_PHY_STATUS_EXT_INI   2
+#define HW_PHY_STATUS_LAN_ON    3
+
+void rtl8168_mdio_write(struct rtl8168_private *tp, u16 RegAddr, u16 value);
+void rtl8168_mdio_prot_write(struct rtl8168_private *tp, u32 RegAddr, u32 value);
+void rtl8168_mdio_prot_direct_write_phy_ocp(struct rtl8168_private *tp, u32 RegAddr, u32 value);
+u32 rtl8168_mdio_read(struct rtl8168_private *tp, u16 RegAddr);
+u32 rtl8168_mdio_prot_read(struct rtl8168_private *tp, u32 RegAddr);
+u32 rtl8168_mdio_prot_direct_read_phy_ocp(struct rtl8168_private *tp, u32 RegAddr);
+void rtl8168_ephy_write(struct rtl8168_private *tp, int RegAddr, int value);
+void rtl8168_mac_ocp_write(struct rtl8168_private *tp, u16 reg_addr, u16 value);
+u16 rtl8168_mac_ocp_read(struct rtl8168_private *tp, u16 reg_addr);
+void rtl8168_clear_eth_phy_bit(struct rtl8168_private *tp, u8 addr, u16 mask);
+void rtl8168_set_eth_phy_bit(struct rtl8168_private *tp,  u8  addr, u16  mask);
+void rtl8168_ocp_write(struct rtl8168_private *tp, u16 addr, u8 len, u32 data);
+void rtl8168_oob_notify(struct rtl8168_private *tp, u8 cmd);
+void rtl8168_init_ring_indexes(struct rtl8168_private *tp);
+int rtl8168_eri_write(struct rtl8168_private *tp, int addr, int len, u32 value, int type);
+void rtl8168_oob_mutex_lock(struct rtl8168_private *tp);
+u32 rtl8168_ocp_read(struct rtl8168_private *tp, u16 addr, u8 len);
+u32 rtl8168_ocp_read_with_oob_base_address(struct rtl8168_private *tp, u16 addr, u8 len, u32 base_address);
+u32 rtl8168_ocp_write_with_oob_base_address(struct rtl8168_private *tp, u16 addr, u8 len, u32 value, u32 base_address);
+u32 rtl8168_eri_read(struct rtl8168_private *tp, int addr, int len, int type);
+u32 rtl8168_eri_read_with_oob_base_address(struct rtl8168_private *tp, int addr, int len, int type, u32 base_address);
+int rtl8168_eri_write_with_oob_base_address(struct rtl8168_private *tp, int addr, int len, u32 value, int type, u32 base_address);
+u16 rtl8168_ephy_read(struct rtl8168_private *tp, int RegAddr);
+void rtl8168_wait_txrx_fifo_empty(struct net_device *dev);
+void rtl8168_wait_ll_share_fifo_ready(struct net_device *dev);
+void rtl8168_enable_now_is_oob(struct rtl8168_private *tp);
+void rtl8168_disable_now_is_oob(struct rtl8168_private *tp);
+void rtl8168_oob_mutex_unlock(struct rtl8168_private *tp);
+void rtl8168_dash2_disable_tx(struct rtl8168_private *tp);
+void rtl8168_dash2_enable_tx(struct rtl8168_private *tp);
+void rtl8168_dash2_disable_rx(struct rtl8168_private *tp);
+void rtl8168_dash2_enable_rx(struct rtl8168_private *tp);
+void rtl8168_hw_disable_mac_mcu_bps(struct net_device *dev);
+void rtl8168_mark_to_asic(struct RxDesc *desc, u32 rx_buf_sz);
+
+static inline struct RxDesc*
+rtl8168_get_rxdesc(struct rtl8168_private *tp, struct RxDesc *RxDescBase, u32 const cur_rx, u32 const q_num)
+{
+        u8 *desc = (u8*)RxDescBase;
+        u32 offset;
+
+        WARN_ON_ONCE(q_num >= tp->num_hw_tot_en_rx_rings);
+
+        if (tp->InitRxDescType == RX_DESC_RING_TYPE_2)
+                offset = (cur_rx * tp->num_hw_tot_en_rx_rings) + q_num;
+        else
+                offset = cur_rx;
+
+        offset *= tp->RxDescLength;
+        desc += offset;
+
+        return (struct RxDesc*)desc;
+}
+
+static inline void
+rtl8168_disable_interrupt_by_vector(struct rtl8168_private *tp,
+                                    u32 message_id)
+{
+        if (message_id >= R8168_MAX_MSIX_VEC)
+                return;
+
+        if (message_id == 0) {
+                RTL_W16(tp, tp->imr_reg[0], 0x0000);
+#ifdef ENABLE_DASH_SUPPORT
+                if (tp->DASH)
+                        rtl8168_disable_dash2_interrupt(tp);
+#endif
+        } else
+                RTL_W8(tp, tp->imr_reg[message_id], 0x00);
+}
+
+static inline void
+rtl8168_enable_interrupt_by_vector(struct rtl8168_private *tp,
+                                   u32 message_id)
+{
+        if (message_id >= R8168_MAX_MSIX_VEC)
+                return;
+
+        if (message_id == 0) {
+                RTL_W16(tp, tp->imr_reg[0], tp->intr_mask);
+#ifdef ENABLE_DASH_SUPPORT
+                if (tp->DASH)
+                        rtl8168_enable_dash2_interrupt(tp);
+#endif
+        } else {
+                RTL_W8(tp, tp->imr_reg[message_id], other_q_intr_mask);
+        }
+}
+
+int rtl8168_open(struct net_device *dev);
+int rtl8168_close(struct net_device *dev);
+void rtl8168_hw_config(struct net_device *dev);
+void rtl8168_hw_start(struct net_device *dev);
+void rtl8168_hw_reset(struct net_device *dev);
+void rtl8168_tx_clear(struct rtl8168_private *tp);
+void rtl8168_rx_clear(struct rtl8168_private *tp);
+int rtl8168_init_ring(struct net_device *dev);
+int rtl8168_dump_tally_counter(struct rtl8168_private *tp, dma_addr_t paddr);
+void rtl8168_enable_napi(struct rtl8168_private *tp);
+void _rtl8168_wait_for_quiescence(struct net_device *dev);
+
+#ifndef ENABLE_LIB_SUPPORT
+static inline void rtl8168_lib_reset_prepare(struct rtl8168_private *tp) { }
+static inline void rtl8168_lib_reset_complete(struct rtl8168_private *tp) { }
+#endif
+
+#define HW_SUPPORT_CHECK_PHY_DISABLE_MODE(_M)        ((_M)->HwSuppCheckPhyDisableModeVer > 0 )
+#define HW_SUPP_SERDES_PHY(_M)        ((_M)->HwSuppSerDesPhyVer > 0)
+#define HW_HAS_WRITE_PHY_MCU_RAM_CODE(_M)        (((_M)->HwHasWrRamCodeToMicroP == TRUE) ? 1 : 0)
+#define HW_SUPPORT_UPS_MODE(_M)        ((_M)->HwSuppUpsVer > 0)
+#define HW_RSS_SUPPORT_RSS(_M)        ((_M)->HwSuppRssVer > 0)
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
+#define netdev_mc_count(dev) ((dev)->mc_count)
+#define netdev_mc_empty(dev) (netdev_mc_count(dev) == 0)
+#define netdev_for_each_mc_addr(mclist, dev) \
+    for (mclist = dev->mc_list; mclist; mclist = mclist->next)
+#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_asf.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_asf.c
new file mode 100644
index 000000000000..c11d32bbb9df
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_asf.c
@@ -0,0 +1,416 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+################################################################################
+#
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see <http://www.gnu.org/licenses/>.
+#
+# Author:
+# Realtek NIC software team <nicfae@realtek.com>
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ *  This product is covered by one or more of the following patents:
+ *  US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/pci.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/delay.h>
+#include <linux/ethtool.h>
+#include <linux/mii.h>
+#include <linux/if_vlan.h>
+#include <linux/crc32.h>
+#include <linux/in.h>
+#include <linux/ip.h>
+#include <linux/tcp.h>
+#include <linux/init.h>
+#include <linux/rtnetlink.h>
+
+#include <asm/uaccess.h>
+
+#include "r8168.h"
+#include "r8168_asf.h"
+#include "rtl_eeprom.h"
+
+int rtl8168_asf_ioctl(struct net_device *dev,
+                      struct ifreq *ifr)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        void *user_data = ifr->ifr_data;
+        struct asf_ioctl_struct asf_usrdata;
+
+        if (tp->mcfg != CFG_METHOD_7 && tp->mcfg != CFG_METHOD_8)
+                return -EOPNOTSUPP;
+
+        if (copy_from_user(&asf_usrdata, user_data, sizeof(struct asf_ioctl_struct)))
+                return -EFAULT;
+
+        switch (asf_usrdata.offset) {
+        case HBPeriod:
+                rtl8168_asf_hbperiod(tp, asf_usrdata.arg, asf_usrdata.u.data);
+                break;
+        case WD8Timer:
+                break;
+        case WD16Rst:
+                rtl8168_asf_wd16rst(tp, asf_usrdata.arg, asf_usrdata.u.data);
+                break;
+        case WD8Rst:
+                rtl8168_asf_time_period(tp, asf_usrdata.arg, WD8Rst, asf_usrdata.u.data);
+                break;
+        case LSnsrPollCycle:
+                rtl8168_asf_time_period(tp, asf_usrdata.arg, LSnsrPollCycle, asf_usrdata.u.data);
+                break;
+        case ASFSnsrPollPrd:
+                rtl8168_asf_time_period(tp, asf_usrdata.arg, ASFSnsrPollPrd, asf_usrdata.u.data);
+                break;
+        case AlertReSendItvl:
+                rtl8168_asf_time_period(tp, asf_usrdata.arg, AlertReSendItvl, asf_usrdata.u.data);
+                break;
+        case SMBAddr:
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, SMBAddr, RW_ONE_BYTE, asf_usrdata.u.data);
+                break;
+        case ASFConfigR0:
+                rtl8168_asf_config_regs(tp, asf_usrdata.arg, ASFConfigR0, asf_usrdata.u.data);
+                break;
+        case ASFConfigR1:
+                rtl8168_asf_config_regs(tp, asf_usrdata.arg, ASFConfigR1, asf_usrdata.u.data);
+                break;
+        case ConsoleMA:
+                rtl8168_asf_console_mac(tp, asf_usrdata.arg, asf_usrdata.u.data);
+                break;
+        case ConsoleIP:
+                rtl8168_asf_ip_address(tp, asf_usrdata.arg, ConsoleIP, asf_usrdata.u.data);
+                break;
+        case IPAddr:
+                rtl8168_asf_ip_address(tp, asf_usrdata.arg, IPAddr, asf_usrdata.u.data);
+                break;
+        case UUID:
+                rtl8168_asf_rw_uuid(tp, asf_usrdata.arg, asf_usrdata.u.data);
+                break;
+        case IANA:
+                rtl8168_asf_rw_iana(tp, asf_usrdata.arg, asf_usrdata.u.data);
+                break;
+        case SysID:
+                rtl8168_asf_rw_systemid(tp, asf_usrdata.arg, asf_usrdata.u.data);
+                break;
+        case Community:
+                rtl8168_asf_community_string(tp, asf_usrdata.arg, asf_usrdata.u.string);
+                break;
+        case StringLength:
+                rtl8168_asf_community_string_len(tp, asf_usrdata.arg, asf_usrdata.u.data);
+                break;
+        case FmCapMsk:
+                rtl8168_asf_capability_masks(tp, asf_usrdata.arg, FmCapMsk, asf_usrdata.u.data);
+                break;
+        case SpCMDMsk:
+                rtl8168_asf_capability_masks(tp, asf_usrdata.arg, SpCMDMsk, asf_usrdata.u.data);
+                break;
+        case SysCapMsk:
+                rtl8168_asf_capability_masks(tp, asf_usrdata.arg, SysCapMsk, asf_usrdata.u.data);
+                break;
+        case RmtRstAddr:
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtRstAddr, RW_ONE_BYTE, asf_usrdata.u.data);
+                break;
+        case RmtRstCmd:
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtRstCmd, RW_ONE_BYTE, asf_usrdata.u.data);
+                break;
+        case RmtRstData:
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtRstData, RW_ONE_BYTE, asf_usrdata.u.data);
+                break;
+        case RmtPwrOffAddr:
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPwrOffAddr, RW_ONE_BYTE, asf_usrdata.u.data);
+                break;
+        case RmtPwrOffCmd:
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPwrOffCmd, RW_ONE_BYTE, asf_usrdata.u.data);
+                break;
+        case RmtPwrOffData:
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPwrOffData, RW_ONE_BYTE, asf_usrdata.u.data);
+                break;
+        case RmtPwrOnAddr:
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPwrOnAddr, RW_ONE_BYTE, asf_usrdata.u.data);
+                break;
+        case RmtPwrOnCmd:
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPwrOnCmd, RW_ONE_BYTE, asf_usrdata.u.data);
+                break;
+        case RmtPwrOnData:
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPwrOnData, RW_ONE_BYTE, asf_usrdata.u.data);
+                break;
+        case RmtPCRAddr:
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPCRAddr, RW_ONE_BYTE, asf_usrdata.u.data);
+                break;
+        case RmtPCRCmd:
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPCRCmd, RW_ONE_BYTE, asf_usrdata.u.data);
+                break;
+        case RmtPCRData:
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPCRData, RW_ONE_BYTE, asf_usrdata.u.data);
+                break;
+        case ASFSnsr0Addr:
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, ASFSnsr0Addr, RW_ONE_BYTE, asf_usrdata.u.data);
+                break;
+        case LSnsrAddr0:
+                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, LSnsrAddr0, RW_ONE_BYTE, asf_usrdata.u.data);
+                break;
+        case KO:
+                /* Get/Set Key Operation */
+                rtl8168_asf_key_access(tp, asf_usrdata.arg, KO, asf_usrdata.u.data);
+                break;
+        case KA:
+                /* Get/Set Key Administrator */
+                rtl8168_asf_key_access(tp, asf_usrdata.arg, KA, asf_usrdata.u.data);
+                break;
+        case KG:
+                /* Get/Set Key Generation */
+                rtl8168_asf_key_access(tp, asf_usrdata.arg, KG, asf_usrdata.u.data);
+                break;
+        case KR:
+                /* Get/Set Key Random */
+                rtl8168_asf_key_access(tp, asf_usrdata.arg, KR, asf_usrdata.u.data);
+                break;
+        default:
+                return -EOPNOTSUPP;
+        }
+
+        if (copy_to_user(user_data, &asf_usrdata, sizeof(struct asf_ioctl_struct)))
+                return -EFAULT;
+
+        return 0;
+}
+
+void rtl8168_asf_hbperiod(struct rtl8168_private *tp, int arg, unsigned int *data)
+{
+        if (arg == ASF_GET)
+                data[ASFHBPERIOD] = rtl8168_eri_read(tp, HBPeriod, RW_TWO_BYTES, ERIAR_ASF);
+        else if (arg == ASF_SET) {
+                rtl8168_eri_write(tp, HBPeriod, RW_TWO_BYTES, data[ASFHBPERIOD], ERIAR_ASF);
+                rtl8168_eri_write(tp, 0x1EC, RW_ONE_BYTE, 0x07, ERIAR_ASF);
+        }
+}
+
+void rtl8168_asf_wd16rst(struct rtl8168_private *tp, int arg, unsigned int *data)
+{
+        data[ASFWD16RST] = rtl8168_eri_read(tp, WD16Rst, RW_TWO_BYTES, ERIAR_ASF);
+}
+
+void rtl8168_asf_console_mac(struct rtl8168_private *tp, int arg, unsigned int *data)
+{
+        int i;
+
+        if (arg == ASF_GET) {
+                for (i = 0; i < 6; i++)
+                        data[i] = rtl8168_eri_read(tp, ConsoleMA + i, RW_ONE_BYTE, ERIAR_ASF);
+        } else if (arg == ASF_SET) {
+                for (i = 0; i < 6; i++)
+                        rtl8168_eri_write(tp, ConsoleMA + i, RW_ONE_BYTE, data[i], ERIAR_ASF);
+
+                /* write the new console MAC address to EEPROM */
+                rtl8168_eeprom_write_sc(tp, 70, (data[1] << 8) | data[0]);
+                rtl8168_eeprom_write_sc(tp, 71, (data[3] << 8) | data[2]);
+                rtl8168_eeprom_write_sc(tp, 72, (data[5] << 8) | data[4]);
+        }
+}
+
+void rtl8168_asf_ip_address(struct rtl8168_private *tp, int arg, int offset, unsigned int *data)
+{
+        int i;
+        int eeprom_off = 0;
+
+        if (arg == ASF_GET) {
+                for (i = 0; i < 4; i++)
+                        data[i] = rtl8168_eri_read(tp, offset + i, RW_ONE_BYTE, ERIAR_ASF);
+        } else if (arg == ASF_SET) {
+                for (i = 0; i < 4; i++)
+                        rtl8168_eri_write(tp, offset + i, RW_ONE_BYTE, data[i], ERIAR_ASF);
+
+                if (offset == ConsoleIP)
+                        eeprom_off = 73;
+                else if (offset == IPAddr)
+                        eeprom_off = 75;
+
+                /* write the new IP address to EEPROM */
+                rtl8168_eeprom_write_sc(tp, eeprom_off, (data[1] << 8) | data[0]);
+                rtl8168_eeprom_write_sc(tp, eeprom_off + 1, (data[3] << 8) | data[2]);
+
+        }
+}
+
+void rtl8168_asf_config_regs(struct rtl8168_private *tp, int arg, int offset, unsigned int *data)
+{
+        unsigned int value;
+
+        if (arg == ASF_GET) {
+                data[ASFCAPABILITY] = (rtl8168_eri_read(tp, offset, RW_ONE_BYTE, ERIAR_ASF) & data[ASFCONFIG]) ? FUNCTION_ENABLE : FUNCTION_DISABLE;
+        } else if (arg == ASF_SET) {
+                value = rtl8168_eri_read(tp, offset, RW_ONE_BYTE, ERIAR_ASF);
+
+                if (data[ASFCAPABILITY] == FUNCTION_ENABLE)
+                        value |= data[ASFCONFIG];
+                else if (data[ASFCAPABILITY] == FUNCTION_DISABLE)
+                        value &= ~data[ASFCONFIG];
+
+                rtl8168_eri_write(tp, offset, RW_ONE_BYTE, value, ERIAR_ASF);
+        }
+}
+
+void rtl8168_asf_capability_masks(struct rtl8168_private *tp, int arg, int offset, unsigned int *data)
+{
+        unsigned int len, bit_mask;
+
+        bit_mask = DISABLE_MASK;
+
+        if (offset == FmCapMsk) {
+                /* System firmware capabilities */
+                len = RW_FOUR_BYTES;
+                if (data[ASFCAPMASK] == FUNCTION_ENABLE)
+                        bit_mask = FMW_CAP_MASK;
+        } else if (offset == SpCMDMsk) {
+                /* Special commands */
+                len = RW_TWO_BYTES;
+                if (data[ASFCAPMASK] == FUNCTION_ENABLE)
+                        bit_mask = SPC_CMD_MASK;
+        } else {
+                /* System capability (offset == SysCapMsk)*/
+                len = RW_ONE_BYTE;
+                if (data[ASFCAPMASK] == FUNCTION_ENABLE)
+                        bit_mask = SYS_CAP_MASK;
+        }
+
+        if (arg == ASF_GET)
+                data[ASFCAPMASK] = rtl8168_eri_read(tp, offset, len, ERIAR_ASF) ? FUNCTION_ENABLE : FUNCTION_DISABLE;
+        else /* arg == ASF_SET */
+                rtl8168_eri_write(tp, offset, len, bit_mask, ERIAR_ASF);
+}
+
+void rtl8168_asf_community_string(struct rtl8168_private *tp, int arg, char *string)
+{
+        int i;
+
+        if (arg == ASF_GET) {
+                for (i = 0; i < COMMU_STR_MAX_LEN; i++)
+                        string[i] = rtl8168_eri_read(tp, Community + i, RW_ONE_BYTE, ERIAR_ASF);
+        } else { /* arg == ASF_SET */
+                for (i = 0; i < COMMU_STR_MAX_LEN; i++)
+                        rtl8168_eri_write(tp, Community + i, RW_ONE_BYTE, string[i], ERIAR_ASF);
+        }
+}
+
+void rtl8168_asf_community_string_len(struct rtl8168_private *tp, int arg, unsigned int *data)
+{
+        if (arg == ASF_GET)
+                data[ASFCOMMULEN] = rtl8168_eri_read(tp, StringLength, RW_ONE_BYTE, ERIAR_ASF);
+        else /* arg == ASF_SET */
+                rtl8168_eri_write(tp, StringLength, RW_ONE_BYTE, data[ASFCOMMULEN], ERIAR_ASF);
+}
+
+void rtl8168_asf_time_period(struct rtl8168_private *tp, int arg, int offset, unsigned int *data)
+{
+        int pos = 0;
+
+        if (offset == WD8Rst)
+                pos = ASFWD8RESET;
+        else if (offset == LSnsrPollCycle)
+                pos = ASFLSNRPOLLCYC;
+        else if (offset == ASFSnsrPollPrd)
+                pos = ASFSNRPOLLCYC;
+        else if (offset == AlertReSendItvl)
+                pos = ASFALERTRESND;
+
+        if (arg == ASF_GET)
+                data[pos] = rtl8168_eri_read(tp, offset, RW_ONE_BYTE, ERIAR_ASF);
+        else /* arg == ASF_SET */
+                rtl8168_eri_write(tp, offset, RW_ONE_BYTE, data[pos], ERIAR_ASF);
+
+}
+
+void rtl8168_asf_key_access(struct rtl8168_private *tp, int arg, int offset, unsigned int *data)
+{
+        int i, j;
+        int key_off = 0;
+
+        if (arg == ASF_GET) {
+                for (i = 0; i < KEY_LEN; i++)
+                        data[i] = rtl8168_eri_read(tp, offset + KEY_LEN - (i + 1), RW_ONE_BYTE, ERIAR_ASF);
+        } else {
+                if (offset == KO)
+                        key_off = 162;
+                else if (offset == KA)
+                        key_off = 172;
+                else if (offset == KG)
+                        key_off = 182;
+                else if (offset == KR)
+                        key_off = 192;
+
+                /* arg == ASF_SET */
+                for (i = 0; i < KEY_LEN; i++)
+                        rtl8168_eri_write(tp, offset + KEY_LEN - (i + 1), RW_ONE_BYTE, data[i], ERIAR_ASF);
+
+                /* write the new key to EEPROM */
+                for (i = 0, j = 19; i < 10; i++, j = j - 2)
+                        rtl8168_eeprom_write_sc(tp, key_off + i, (data[j - 1] << 8) | data[j]);
+        }
+}
+
+void rtl8168_asf_rw_hexadecimal(struct rtl8168_private *tp, int arg, int offset, int len, unsigned int *data)
+{
+        if (arg == ASF_GET)
+                data[ASFRWHEXNUM] = rtl8168_eri_read(tp, offset, len, ERIAR_ASF);
+        else /* arg == ASF_SET */
+                rtl8168_eri_write(tp, offset, len, data[ASFRWHEXNUM], ERIAR_ASF);
+}
+
+void rtl8168_asf_rw_systemid(struct rtl8168_private *tp, int arg, unsigned int *data)
+{
+        int i;
+
+        if (arg == ASF_GET)
+                for (i = 0; i < SYSID_LEN ; i++)
+                        data[i] = rtl8168_eri_read(tp, SysID + i, RW_ONE_BYTE, ERIAR_ASF);
+        else /* arg == ASF_SET */
+                for (i = 0; i < SYSID_LEN ; i++)
+                        rtl8168_eri_write(tp, SysID + i, RW_ONE_BYTE, data[i], ERIAR_ASF);
+}
+
+void rtl8168_asf_rw_iana(struct rtl8168_private *tp, int arg, unsigned int *data)
+{
+        int i;
+
+        if (arg == ASF_GET)
+                for (i = 0; i < RW_FOUR_BYTES; i++)
+                        data[i] = rtl8168_eri_read(tp, IANA + i, RW_ONE_BYTE, ERIAR_ASF);
+        else /* arg == ASF_SET */
+                for (i = 0; i < RW_FOUR_BYTES; i++)
+                        rtl8168_eri_write(tp, IANA + i, RW_ONE_BYTE, data[i], ERIAR_ASF);
+}
+
+void rtl8168_asf_rw_uuid(struct rtl8168_private *tp, int arg, unsigned int *data)
+{
+        int i, j;
+
+        if (arg == ASF_GET)
+                for (i = UUID_LEN - 1, j = 0; i >= 0 ; i--, j++)
+                        data[j] = rtl8168_eri_read(tp, UUID + i, RW_ONE_BYTE, ERIAR_ASF);
+        else /* arg == ASF_SET */
+                for (i = UUID_LEN - 1, j = 0; i >= 0 ; i--, j++)
+                        rtl8168_eri_write(tp, UUID + i, RW_ONE_BYTE, data[j], ERIAR_ASF);
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_asf.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_asf.h
new file mode 100644
index 000000000000..bb4b4596bfc2
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_asf.h
@@ -0,0 +1,295 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+################################################################################
+#
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see <http://www.gnu.org/licenses/>.
+#
+# Author:
+# Realtek NIC software team <nicfae@realtek.com>
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ *  This product is covered by one or more of the following patents:
+ *  US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+#define SIOCDEVPRIVATE_RTLASF   SIOCDEVPRIVATE
+
+#define FUNCTION_ENABLE		1
+#define FUNCTION_DISABLE	0
+
+#define ASFCONFIG	0
+#define ASFCAPABILITY	1
+#define ASFCOMMULEN	0
+#define ASFHBPERIOD	0
+#define ASFWD16RST	0
+#define ASFCAPMASK	0
+#define ASFALERTRESND	0
+#define ASFLSNRPOLLCYC	0
+#define ASFSNRPOLLCYC	0
+#define ASFWD8RESET	0
+#define ASFRWHEXNUM	0
+
+#define FMW_CAP_MASK	0x0000F867
+#define SPC_CMD_MASK	0x1F00
+#define SYS_CAP_MASK	0xFF
+#define DISABLE_MASK	0x00
+
+#define MAX_DATA_LEN	200
+#define MAX_STR_LEN	200
+
+#define COMMU_STR_MAX_LEN	23
+
+#define KEY_LEN		20
+#define UUID_LEN	16
+#define SYSID_LEN	2
+
+#define RW_ONE_BYTE	1
+#define RW_TWO_BYTES	2
+#define RW_FOUR_BYTES	4
+
+enum asf_registers {
+        HBPeriod	= 0x0000,
+        WD8Rst		= 0x0002,
+        WD8Timer	= 0x0003,
+        WD16Rst		= 0x0004,
+        LSnsrPollCycle	= 0x0006,
+        ASFSnsrPollPrd	= 0x0007,
+        AlertReSendCnt	= 0x0008,
+        AlertReSendItvl	= 0x0009,
+        SMBAddr		= 0x000A,
+        SMBCap		= 0x000B,
+        ASFConfigR0	= 0x000C,
+        ASFConfigR1	= 0x000D,
+        WD16Timer	= 0x000E,
+        ConsoleMA	= 0x0010,
+        ConsoleIP	= 0x0016,
+        IPAddr		= 0x001A,
+
+        UUID		= 0x0020,
+        IANA		= 0x0030,
+        SysID		= 0x0034,
+        Community	= 0x0036,
+        StringLength	= 0x004D,
+        LC		= 0x004E,
+        EntityInst	= 0x004F,
+        FmCapMsk	= 0x0050,
+        SpCMDMsk	= 0x0054,
+        SysCapMsk	= 0x0056,
+        WDSysSt		= 0x0057,
+        RxMsgType	= 0x0058,
+        RxSpCMD		= 0x0059,
+        RxSpCMDPa	= 0x005A,
+        RxBtOpMsk	= 0x005C,
+        RmtRstAddr	= 0x005E,
+        RmtRstCmd	= 0x005F,
+        RmtRstData	= 0x0060,
+        RmtPwrOffAddr	= 0x0061,
+        RmtPwrOffCmd	= 0x0062,
+        RmtPwrOffData	= 0x0063,
+        RmtPwrOnAddr	= 0x0064,
+        RmtPwrOnCmd	= 0x0065,
+        RmtPwrOnData	= 0x0066,
+        RmtPCRAddr	= 0x0067,
+        RmtPCRCmd	= 0x0068,
+        RmtPCRData	= 0x0069,
+        RMCP_IANA	= 0x006A,
+        RMCP_OEM	= 0x006E,
+        ASFSnsr0Addr	= 0x0070,
+
+        ASFSnsrEvSt	= 0x0073,
+        ASFSnsrEvAlert	= 0x0081,
+
+        LSnsrNo		= 0x00AD,
+        AssrtEvntMsk	= 0x00AE,
+        DeAssrtEvntMsk	= 0x00AF,
+
+        LSnsrAddr0	= 0x00B0,
+        LAlertCMD0	= 0x00B1,
+        LAlertDataMsk0	= 0x00B2,
+        LAlertCmp0	= 0x00B3,
+        LAlertESnsrT0	= 0x00B4,
+        LAlertET0	= 0x00B5,
+        LAlertEOffset0	= 0x00B6,
+        LAlertES0	= 0x00B7,
+        LAlertSN0	= 0x00B8,
+        LAlertEntity0	= 0x00B9,
+        LAlertEI0	= 0x00BA,
+        LSnsrState0	= 0x00BB,
+
+        LSnsrAddr1	= 0x00BD,
+        LAlertCMD1	= 0x00BE,
+        LAlertDataMsk1	= 0x00BF,
+        LAlertCmp1	= 0x00C0,
+        LAlertESnsrT1	= 0x00C1,
+        LAlertET1	= 0x00C2,
+        LAlertEOffset1	= 0x00C3,
+        LAlertES1	= 0x00C4,
+        LAlertSN1	= 0x00C5,
+        LAlertEntity1	= 0x00C6,
+        LAlertEI1	= 0x00C7,
+        LSnsrState1	= 0x00C8,
+
+        LSnsrAddr2	= 0x00CA,
+        LAlertCMD2	= 0x00CB,
+        LAlertDataMsk2	= 0x00CC,
+        LAlertCmp2	= 0x00CD,
+        LAlertESnsrT2	= 0x00CE,
+        LAlertET2	= 0x00CF,
+        LAlertEOffset2	= 0x00D0,
+        LAlertES2	= 0x00D1,
+        LAlertSN2	= 0x00D2,
+        LAlertEntity2	= 0x00D3,
+        LAlertEI2	= 0x00D4,
+        LSnsrState2	= 0x00D5,
+
+        LSnsrAddr3	= 0x00D7,
+        LAlertCMD3	= 0x00D8,
+        LAlertDataMsk3	= 0x00D9,
+        LAlertCmp3	= 0x00DA,
+        LAlertESnsrT3	= 0x00DB,
+        LAlertET3	= 0x00DC,
+        LAlertEOffset3	= 0x00DD,
+        LAlertES3	= 0x00DE,
+        LAlertSN3	= 0x00DF,
+        LAlertEntity3	= 0x00E0,
+        LAlertEI3	= 0x00E1,
+        LSnsrState3	= 0x00E2,
+
+        LSnsrAddr4	= 0x00E4,
+        LAlertCMD4	= 0x00E5,
+        LAlertDataMsk4	= 0x00E6,
+        LAlertCmp4	= 0x00E7,
+        LAlertESnsrT4	= 0x00E8,
+        LAlertET4	= 0x00E9,
+        LAlertEOffset4	= 0x00EA,
+        LAlertES4	= 0x00EB,
+        LAlertSN4	= 0x00EC,
+        LAlertEntity4	= 0x00ED,
+        LAlertEI4	= 0x00EE,
+        LSnsrState4	= 0x00EF,
+
+        LSnsrAddr5	= 0x00F1,
+        LAlertCMD5	= 0x00F2,
+        LAlertDataMsk5	= 0x00F3,
+        LAlertCmp5	= 0x00F4,
+        LAlertESnsrT5	= 0x00F5,
+        LAlertET5	= 0x00F6,
+        LAlertEOffset5	= 0x00F7,
+        LAlertES5	= 0x00F8,
+        LAlertSN5	= 0x00F9,
+        LAlertEntity5	= 0x00FA,
+        LAlertEI5	= 0x00FB,
+        LSnsrState5	= 0x00FC,
+
+        LSnsrAddr6	= 0x00FE,
+        LAlertCMD6	= 0x00FF,
+        LAlertDataMsk6	= 0x0100,
+        LAlertCmp6	= 0x0101,
+        LAlertESnsrT6	= 0x0102,
+        LAlertET6	= 0x0103,
+        LAlertEOffset6	= 0x0104,
+        LAlertES6	= 0x0105,
+        LAlertSN6	= 0x0106,
+        LAlertEntity6	= 0x0107,
+        LAlertEI6	= 0x0108,
+        LSnsrState6	= 0x0109,
+
+        LSnsrAddr7	= 0x010B,
+        LAlertCMD7	= 0x010C,
+        LAlertDataMsk7	= 0x010D,
+        LAlertCmp7	= 0x010E,
+        LAlertESnsrT7	= 0x010F,
+        LAlertET7	= 0x0110,
+        LAlertEOffset7	= 0x0111,
+        LAlertES7	= 0x0112,
+        LAlertSN7	= 0x0113,
+        LAlertEntity7	= 0x0114,
+        LAlertEI7	= 0x0115,
+        LSnsrState7	= 0x0116,
+        LAssert		= 0x0117,
+        LDAssert	= 0x0118,
+        IPServiceType	= 0x0119,
+        IPIdfr		= 0x011A,
+        FlagFOffset	= 0x011C,
+        TTL		= 0x011E,
+        HbtEI		= 0x011F,
+        MgtConSID1	= 0x0120,
+        MgtConSID2	= 0x0124,
+        MgdCltSID	= 0x0128,
+        StCd		= 0x012C,
+        MgtConUR	= 0x012D,
+        MgtConUNL	= 0x012E,
+
+        AuthPd		= 0x0130,
+        IntyPd		= 0x0138,
+        MgtConRN	= 0x0140,
+        MgdCtlRN	= 0x0150,
+        MgtConUN	= 0x0160,
+        Rakp2IntCk	= 0x0170,
+        KO		= 0x017C,
+        KA		= 0x0190,
+        KG		= 0x01A4,
+        KR		= 0x01B8,
+        CP		= 0x01CC,
+        CQ		= 0x01D0,
+        KC		= 0x01D4,
+        ConsoleSid	= 0x01E8,
+
+        SIK1		= 0x01FC,
+        SIK2		= 0x0210,
+        Udpsrc_port	= 0x0224,
+        Udpdes_port	= 0x0226,
+        Asf_debug_mux	= 0x0228
+};
+
+enum asf_cmdln_opt {
+        ASF_GET,
+        ASF_SET,
+        ASF_HELP
+};
+
+struct asf_ioctl_struct {
+        unsigned int arg;
+        unsigned int offset;
+        union {
+                unsigned int data[MAX_DATA_LEN];
+                char string[MAX_STR_LEN];
+        } u;
+};
+
+int rtl8168_asf_ioctl(struct net_device *dev, struct ifreq *ifr);
+void rtl8168_asf_hbperiod(struct rtl8168_private *tp, int arg, unsigned int *data);
+void rtl8168_asf_wd16rst(struct rtl8168_private *tp, int arg, unsigned int *data);
+void rtl8168_asf_console_mac(struct rtl8168_private *, int arg, unsigned int *data);
+void rtl8168_asf_ip_address(struct rtl8168_private *, int arg, int offset, unsigned int *data);
+void rtl8168_asf_config_regs(struct rtl8168_private *tp, int arg, int offset, unsigned int *data);
+void rtl8168_asf_capability_masks(struct rtl8168_private *tp, int arg, int offset, unsigned int *data);
+void rtl8168_asf_community_string(struct rtl8168_private *tp, int arg, char *string);
+void rtl8168_asf_community_string_len(struct rtl8168_private *tp, int arg, unsigned int *data);
+void rtl8168_asf_alert_resend_interval(struct rtl8168_private *tp, int arg, unsigned int *data);
+void rtl8168_asf_time_period(struct rtl8168_private *tp, int arg, int offset, unsigned int *data);
+void rtl8168_asf_key_access(struct rtl8168_private *, int arg, int offset, unsigned int *data);
+void rtl8168_asf_rw_hexadecimal(struct rtl8168_private *tp, int arg, int offset, int len, unsigned int *data);
+void rtl8168_asf_rw_iana(struct rtl8168_private *tp, int arg, unsigned int *data);
+void rtl8168_asf_rw_uuid(struct rtl8168_private *tp, int arg, unsigned int *data);
+void rtl8168_asf_rw_systemid(struct rtl8168_private *tp, int arg, unsigned int *data);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_dash.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_dash.h
new file mode 100644
index 000000000000..dcd3e70e2f88
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_dash.h
@@ -0,0 +1,256 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+################################################################################
+#
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see <http://www.gnu.org/licenses/>.
+#
+# Author:
+# Realtek NIC software team <nicfae@realtek.com>
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ *  This product is covered by one or more of the following patents:
+ *  US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+#ifndef _LINUX_R8168_DASH_H
+#define _LINUX_R8168_DASH_H
+
+#define SIOCDEVPRIVATE_RTLDASH   SIOCDEVPRIVATE+2
+
+enum rtl_dash_cmd {
+        RTL_DASH_ARP_NS_OFFLOAD = 0,
+        RTL_DASH_SET_OOB_IPMAC,
+        RTL_DASH_NOTIFY_OOB,
+
+        RTL_DASH_SEND_BUFFER_DATA_TO_DASH_FW,
+        RTL_DASH_CHECK_SEND_BUFFER_TO_DASH_FW_COMPLETE,
+        RTL_DASH_GET_RCV_FROM_FW_BUFFER_DATA,
+        RTL_DASH_OOB_REQ,
+        RTL_DASH_OOB_ACK,
+        RTL_DASH_DETACH_OOB_REQ,
+        RTL_DASH_DETACH_OOB_ACK,
+
+        RTL_FW_SET_IPV4 = 0x10,
+        RTL_FW_GET_IPV4,
+        RTL_FW_SET_IPV6,
+        RTL_FW_GET_IPV6,
+        RTL_FW_SET_EXT_SNMP,
+        RTL_FW_GET_EXT_SNMP,
+        RTL_FW_SET_WAKEUP_PATTERN,
+        RTL_FW_GET_WAKEUP_PATTERN,
+        RTL_FW_DEL_WAKEUP_PATTERN,
+
+        RTLT_DASH_COMMAND_INVALID,
+};
+
+struct rtl_dash_ip_mac {
+        struct sockaddr ifru_addr;
+        struct sockaddr ifru_netmask;
+        struct sockaddr ifru_hwaddr;
+};
+
+struct rtl_dash_ioctl_struct {
+        __u32	cmd;
+        __u32	offset;
+        __u32	len;
+        union {
+                __u32	data;
+                void *data_buffer;
+        };
+};
+
+struct settings_ipv4 {
+        __u32	IPv4addr;
+        __u32	IPv4mask;
+        __u32	IPv4Gateway;
+};
+
+struct settings_ipv6 {
+        __u32	reserved;
+        __u32	prefixLen;
+        __u16	IPv6addr[8];
+        __u16	IPv6Gateway[8];
+};
+
+struct settings_ext_snmp {
+        __u16	index;
+        __u16	oid_get_len;
+        __u8	oid_for_get[24];
+        __u8	reserved0[26];
+        __u16	value_len;
+        __u8	value[256];
+        __u8	supported;
+        __u8	reserved1[27];
+};
+
+struct wakeup_pattern {
+        __u8	index;
+        __u8	valid;
+        __u8	start;
+        __u8	length;
+        __u8	name[36];
+        __u8	mask[16];
+        __u8	pattern[128];
+        __u32	reserved[2];
+};
+
+typedef struct _RX_DASH_FROM_FW_DESC {
+        __le16 length;
+        __le16 status;
+        __le32 resv;
+        __le64 BufferAddress;
+}
+RX_DASH_FROM_FW_DESC, *PRX_DASH_FROM_FW_DESC;
+
+typedef struct _TX_DASH_SEND_FW_DESC {
+        __le16 length;
+        __le16 status;
+        __le32 resv;
+        __le64 BufferAddress;
+}
+TX_DASH_SEND_FW_DESC, *PTX_DASH_SEND_FW_DESC;
+
+typedef struct _OSOOBHdr {
+        __le32 len;
+        u8 type;
+        u8 flag;
+        u8 hostReqV;
+        u8 res;
+}
+OSOOBHdr, *POSOOBHdr;
+
+typedef struct _RX_DASH_BUFFER_TYPE_2 {
+        OSOOBHdr oobhdr;
+        u8 RxDataBuffer[0];
+}
+RX_DASH_BUFFER_TYPE_2, *PRX_DASH_BUFFER_TYPE_2;
+
+#define ALIGN_8                 (0x7)
+#define ALIGN_16                (0xf)
+#define ALIGN_32                (0x1f)
+#define ALIGN_64                (0x3f)
+#define ALIGN_256               (0xff)
+#define ALIGN_4096              (0xfff)
+
+#define OCP_REG_CONFIG0 (0x10)
+#define OCP_REG_CONFIG0_REV_F (0xB8)
+#define OCP_REG_DASH_POLL (0x30)
+#define OCP_REG_HOST_REQ (0x34)
+#define OCP_REG_DASH_REQ (0x35)
+#define OCP_REG_CR (0x36)
+#define OCP_REG_DMEMSTA (0x38)
+#define OCP_REG_GPHYAR (0x60)
+
+
+#define OCP_REG_CONFIG0_DASHEN           BIT_15
+#define OCP_REG_CONFIG0_OOBRESET         BIT_14
+#define OCP_REG_CONFIG0_APRDY            BIT_13
+#define OCP_REG_CONFIG0_FIRMWARERDY      BIT_12
+#define OCP_REG_CONFIG0_DRIVERRDY        BIT_11
+#define OCP_REG_CONFIG0_OOB_WDT          BIT_9
+#define OCP_REG_CONFIG0_DRV_WAIT_OOB     BIT_8
+#define OCP_REG_CONFIG0_TLSEN            BIT_7
+
+#define HW_DASH_SUPPORT_DASH(_M)        ((_M)->HwSuppDashVer > 0)
+#define HW_DASH_SUPPORT_TYPE_1(_M)        ((_M)->HwSuppDashVer == 1)
+#define HW_DASH_SUPPORT_TYPE_2(_M)        ((_M)->HwSuppDashVer == 2)
+#define HW_DASH_SUPPORT_TYPE_3(_M)        ((_M)->HwSuppDashVer == 3)
+
+#define RECV_FROM_FW_BUF_SIZE (2048)
+#define SEND_TO_FW_BUF_SIZE (2048)
+
+#define RX_DASH_FROM_FW_OWN BIT_15
+#define TX_DASH_SEND_FW_OWN BIT_15
+
+#define TXS_CC3_0       (BIT_0|BIT_1|BIT_2|BIT_3)
+#define TXS_EXC         BIT_4
+#define TXS_LNKF        BIT_5
+#define TXS_OWC         BIT_6
+#define TXS_TES         BIT_7
+#define TXS_UNF         BIT_9
+#define TXS_LGSEN       BIT_11
+#define TXS_LS          BIT_12
+#define TXS_FS          BIT_13
+#define TXS_EOR         BIT_14
+#define TXS_OWN         BIT_15
+
+#define TPPool_HRDY     0x20
+
+#define HostReqReg (0xC0)
+#define SystemMasterDescStartAddrLow (0xF0)
+#define SystemMasterDescStartAddrHigh (0xF4)
+#define SystemSlaveDescStartAddrLow (0xF8)
+#define SystemSlaveDescStartAddrHigh (0xFC)
+
+//DASH Request Type
+#define WSMANREG 0x01
+#define OSPUSHDATA 0x02
+
+#define RXS_OWN      BIT_15
+#define RXS_EOR      BIT_14
+#define RXS_FS       BIT_13
+#define RXS_LS       BIT_12
+
+#define ISRIMR_DP_DASH_OK BIT_15
+#define ISRIMR_DP_HOST_OK BIT_13
+#define ISRIMR_DP_REQSYS_OK BIT_11
+
+#define ISRIMR_DASH_INTR_EN BIT_12
+#define ISRIMR_DASH_INTR_CMAC_RESET BIT_15
+
+#define ISRIMR_DASH_TYPE2_ROK BIT_0
+#define ISRIMR_DASH_TYPE2_RDU BIT_1
+#define ISRIMR_DASH_TYPE2_TOK BIT_2
+#define ISRIMR_DASH_TYPE2_TDU BIT_3
+#define ISRIMR_DASH_TYPE2_TX_FIFO_FULL BIT_4
+#define ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE BIT_5
+#define ISRIMR_DASH_TYPE2_RX_DISABLE_IDLE BIT_6
+
+#define CMAC_OOB_STOP 0x25
+#define CMAC_OOB_INIT 0x26
+#define CMAC_OOB_RESET 0x2a
+
+#define NO_BASE_ADDRESS 0x00000000
+#define RTL8168FP_OOBMAC_BASE 0xBAF70000
+#define RTL8168FP_CMAC_IOBASE 0xBAF20000
+#define RTL8168FP_KVM_BASE 0xBAF80400
+#define CMAC_SYNC_REG 0x20
+#define CMAC_RXDESC_OFFSET 0x90    //RX: 0x90 - 0x98
+#define CMAC_TXDESC_OFFSET 0x98    //TX: 0x98 - 0x9F
+
+/* cmac write/read MMIO register */
+#define RTL_CMAC_W8(tp, reg, val8)   writeb ((val8), tp->cmac_ioaddr + (reg))
+#define RTL_CMAC_W16(tp, reg, val16) writew ((val16), tp->cmac_ioaddr + (reg))
+#define RTL_CMAC_W32(tp, reg, val32) writel ((val32), tp->cmac_ioaddr + (reg))
+#define RTL_CMAC_R8(tp, reg)     readb (tp->cmac_ioaddr + (reg))
+#define RTL_CMAC_R16(tp, reg)        readw (tp->cmac_ioaddr + (reg))
+#define RTL_CMAC_R32(tp, reg)        ((unsigned long) readl (tp->cmac_ioaddr + (reg)))
+
+int rtl8168_dash_ioctl(struct net_device *dev, struct ifreq *ifr);
+void HandleDashInterrupt(struct net_device *dev);
+int AllocateDashShareMemory(struct net_device *dev);
+void FreeAllocatedDashShareMemory(struct net_device *dev);
+void DashHwInit(struct net_device *dev);
+
+
+#endif /* _LINUX_R8168_DASH_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_fiber.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_fiber.h
new file mode 100644
index 000000000000..325790541465
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_fiber.h
@@ -0,0 +1,75 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+################################################################################
+#
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see <http://www.gnu.org/licenses/>.
+#
+# Author:
+# Realtek NIC software team <nicfae@realtek.com>
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ *  This product is covered by one or more of the following patents:
+ *  US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+#ifndef _LINUX_R8168_FIBER_H
+#define _LINUX_R8168_FIBER_H
+
+enum {
+        FIBER_MODE_NIC_ONLY = 0,
+        FIBER_MODE_RTL8168H_RTL8211FS,
+        FIBER_MODE_RTL8168H_MDI_SWITCH_RTL8211FS,
+        FIBER_MODE_MAX
+};
+
+enum {
+        FIBER_STAT_NOT_CHECKED = 0,
+        FIBER_STAT_CONNECT_EEPROM,
+        FIBER_STAT_DISCONNECT,
+        FIBER_STAT_CONNECT_GPO,
+        FIBER_STAT_MAX
+};
+
+enum {
+        FIBER_LED_MODE_DEFAULT = 0,
+        FIBER_LED_MODE_1,
+        FIBER_LED_MODE_MAX
+};
+
+#define HW_FIBER_MODE_ENABLED(_M)        ((_M)->HwFiberModeVer > 0)
+#define HW_FIBER_STATUS_CONNECTED(_M)        (((_M)->HwFiberStat == FIBER_STAT_CONNECT_EEPROM) || ((_M)->HwFiberStat == FIBER_STAT_CONNECT_GPO))
+#define HW_FIBER_STATUS_DISCONNECTED(_M)        ((_M)->HwFiberStat == FIBER_STAT_DISCONNECT)
+
+struct rtl8168_private;
+
+void rtl8168_hw_init_fiber_nic(struct rtl8168_private *tp);
+void rtl8168_hw_fiber_nic_d3_para(struct rtl8168_private *tp);
+void rtl8168_hw_fiber_phy_config(struct rtl8168_private *tp);
+void rtl8168_hw_switch_mdi_to_fiber(struct rtl8168_private *tp);
+void rtl8168_hw_switch_mdi_to_nic(struct rtl8168_private *tp);
+unsigned int rtl8168_hw_fiber_link_ok(struct rtl8168_private *tp);
+void rtl8168_check_fiber_link_status(struct rtl8168_private *tp);
+void rtl8168_check_hw_fiber_mode_support(struct rtl8168_private *tp);
+void rtl8168_set_fiber_mode_software_variable(struct rtl8168_private *tp);
+
+#endif /* _LINUX_R8168_FIBER_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_firmware.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_firmware.c
new file mode 100644
index 000000000000..d7f061aed2c7
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_firmware.c
@@ -0,0 +1,264 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+################################################################################
+#
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see <http://www.gnu.org/licenses/>.
+#
+# Author:
+# Realtek NIC software team <nicfae@realtek.com>
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ *  This product is covered by one or more of the following patents:
+ *  US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+#include <linux/version.h>
+#include <linux/delay.h>
+#include <linux/firmware.h>
+
+#include "r8168_firmware.h"
+
+enum rtl_fw_opcode {
+        PHY_READ		= 0x0,
+        PHY_DATA_OR		= 0x1,
+        PHY_DATA_AND		= 0x2,
+        PHY_BJMPN		= 0x3,
+        PHY_MDIO_CHG		= 0x4,
+        PHY_CLEAR_READCOUNT	= 0x7,
+        PHY_WRITE		= 0x8,
+        PHY_READCOUNT_EQ_SKIP	= 0x9,
+        PHY_COMP_EQ_SKIPN	= 0xa,
+        PHY_COMP_NEQ_SKIPN	= 0xb,
+        PHY_WRITE_PREVIOUS	= 0xc,
+        PHY_SKIPN		= 0xd,
+        PHY_DELAY_MS		= 0xe,
+};
+
+struct fw_info {
+        u32	magic;
+        char	version[RTL8168_VER_SIZE];
+        __le32	fw_start;
+        __le32	fw_len;
+        u8	chksum;
+} __packed;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,16,0)
+#define sizeof_field(TYPE, MEMBER) sizeof((((TYPE *)0)->MEMBER))
+#endif
+#define FW_OPCODE_SIZE sizeof_field(struct rtl8168_fw_phy_action, code[0])
+
+static bool rtl8168_fw_format_ok(struct rtl8168_fw *rtl_fw)
+{
+        const struct firmware *fw = rtl_fw->fw;
+        struct fw_info *fw_info = (struct fw_info *)fw->data;
+        struct rtl8168_fw_phy_action *pa = &rtl_fw->phy_action;
+
+        if (fw->size < FW_OPCODE_SIZE)
+                return false;
+
+        if (!fw_info->magic) {
+                size_t i, size, start;
+                u8 checksum = 0;
+
+                if (fw->size < sizeof(*fw_info))
+                        return false;
+
+                for (i = 0; i < fw->size; i++)
+                        checksum += fw->data[i];
+                if (checksum != 0)
+                        return false;
+
+                start = le32_to_cpu(fw_info->fw_start);
+                if (start > fw->size)
+                        return false;
+
+                size = le32_to_cpu(fw_info->fw_len);
+                if (size > (fw->size - start) / FW_OPCODE_SIZE)
+                        return false;
+
+                strscpy(rtl_fw->version, fw_info->version, RTL8168_VER_SIZE);
+
+                pa->code = (__le32 *)(fw->data + start);
+                pa->size = size;
+        } else {
+                if (fw->size % FW_OPCODE_SIZE)
+                        return false;
+
+                strscpy(rtl_fw->version, rtl_fw->fw_name, RTL8168_VER_SIZE);
+
+                pa->code = (__le32 *)fw->data;
+                pa->size = fw->size / FW_OPCODE_SIZE;
+        }
+
+        return true;
+}
+
+static bool rtl8168_fw_data_ok(struct rtl8168_fw *rtl_fw)
+{
+        struct rtl8168_fw_phy_action *pa = &rtl_fw->phy_action;
+        size_t index;
+
+        for (index = 0; index < pa->size; index++) {
+                u32 action = le32_to_cpu(pa->code[index]);
+                u32 val = action & 0x0000ffff;
+                u32 regno = (action & 0x0fff0000) >> 16;
+
+                switch (action >> 28) {
+                case PHY_READ:
+                case PHY_DATA_OR:
+                case PHY_DATA_AND:
+                case PHY_CLEAR_READCOUNT:
+                case PHY_WRITE:
+                case PHY_WRITE_PREVIOUS:
+                case PHY_DELAY_MS:
+                        break;
+
+                case PHY_MDIO_CHG:
+                        if (val > 1)
+                                goto out;
+                        break;
+
+                case PHY_BJMPN:
+                        if (regno > index)
+                                goto out;
+                        break;
+                case PHY_READCOUNT_EQ_SKIP:
+                        if (index + 2 >= pa->size)
+                                goto out;
+                        break;
+                case PHY_COMP_EQ_SKIPN:
+                case PHY_COMP_NEQ_SKIPN:
+                case PHY_SKIPN:
+                        if (index + 1 + regno >= pa->size)
+                                goto out;
+                        break;
+
+                default:
+                        dev_err(rtl_fw->dev, "Invalid action 0x%08x\n", action);
+                        return false;
+                }
+        }
+
+        return true;
+out:
+        dev_err(rtl_fw->dev, "Out of range of firmware\n");
+        return false;
+}
+
+void rtl8168_fw_write_firmware(struct rtl8168_private *tp, struct rtl8168_fw *rtl_fw)
+{
+        struct rtl8168_fw_phy_action *pa = &rtl_fw->phy_action;
+        rtl8168_fw_write_t fw_write = rtl_fw->phy_write;
+        rtl8168_fw_read_t fw_read = rtl_fw->phy_read;
+        int predata = 0, count = 0;
+        size_t index;
+
+        for (index = 0; index < pa->size; index++) {
+                u32 action = le32_to_cpu(pa->code[index]);
+                u32 data = action & 0x0000ffff;
+                u32 regno = (action & 0x0fff0000) >> 16;
+                enum rtl_fw_opcode opcode = action >> 28;
+
+                if (!action)
+                        break;
+
+                switch (opcode) {
+                case PHY_READ:
+                        predata = fw_read(tp, regno);
+                        count++;
+                        break;
+                case PHY_DATA_OR:
+                        predata |= data;
+                        break;
+                case PHY_DATA_AND:
+                        predata &= data;
+                        break;
+                case PHY_BJMPN:
+                        index -= (regno + 1);
+                        break;
+                case PHY_MDIO_CHG:
+                        if (data) {
+                                fw_write = rtl_fw->mac_mcu_write;
+                                fw_read = rtl_fw->mac_mcu_read;
+                        } else {
+                                fw_write = rtl_fw->phy_write;
+                                fw_read = rtl_fw->phy_read;
+                        }
+
+                        break;
+                case PHY_CLEAR_READCOUNT:
+                        count = 0;
+                        break;
+                case PHY_WRITE:
+                        fw_write(tp, regno, data);
+                        break;
+                case PHY_READCOUNT_EQ_SKIP:
+                        if (count == data)
+                                index++;
+                        break;
+                case PHY_COMP_EQ_SKIPN:
+                        if (predata == data)
+                                index += regno;
+                        break;
+                case PHY_COMP_NEQ_SKIPN:
+                        if (predata != data)
+                                index += regno;
+                        break;
+                case PHY_WRITE_PREVIOUS:
+                        fw_write(tp, regno, predata);
+                        break;
+                case PHY_SKIPN:
+                        index += regno;
+                        break;
+                case PHY_DELAY_MS:
+                        mdelay(data);
+                        break;
+                }
+        }
+}
+
+void rtl8168_fw_release_firmware(struct rtl8168_fw *rtl_fw)
+{
+        release_firmware(rtl_fw->fw);
+}
+
+int rtl8168_fw_request_firmware(struct rtl8168_fw *rtl_fw)
+{
+        int rc;
+
+        rc = request_firmware(&rtl_fw->fw, rtl_fw->fw_name, rtl_fw->dev);
+        if (rc < 0)
+                goto out;
+
+        if (!rtl8168_fw_format_ok(rtl_fw) || !rtl8168_fw_data_ok(rtl_fw)) {
+                release_firmware(rtl_fw->fw);
+                rc = -EINVAL;
+                goto out;
+        }
+
+        return 0;
+out:
+        dev_err(rtl_fw->dev, "Unable to load firmware %s (%d)\n",
+                rtl_fw->fw_name, rc);
+        return rc;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_firmware.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_firmware.h
new file mode 100644
index 000000000000..814ff8e7b561
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_firmware.h
@@ -0,0 +1,68 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+################################################################################
+#
+# r8168 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see <http://www.gnu.org/licenses/>.
+#
+# Author:
+# Realtek NIC software team <nicfae@realtek.com>
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ *  This product is covered by one or more of the following patents:
+ *  US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+#ifndef _LINUX_RTL8168_FIRMWARE_H
+#define _LINUX_RTL8168_FIRMWARE_H
+
+#include <linux/device.h>
+#include <linux/firmware.h>
+
+struct rtl8168_private;
+typedef void (*rtl8168_fw_write_t)(struct rtl8168_private *tp, u16 reg, u16 val);
+typedef u32 (*rtl8168_fw_read_t)(struct rtl8168_private *tp, u16 reg);
+
+#define RTL8168_VER_SIZE		32
+
+struct rtl8168_fw {
+        rtl8168_fw_write_t phy_write;
+        rtl8168_fw_read_t phy_read;
+        rtl8168_fw_write_t mac_mcu_write;
+        rtl8168_fw_read_t mac_mcu_read;
+        const struct firmware *fw;
+        const char *fw_name;
+        struct device *dev;
+
+        char version[RTL8168_VER_SIZE];
+
+        struct rtl8168_fw_phy_action {
+                __le32 *code;
+                size_t size;
+        } phy_action;
+};
+
+int rtl8168_fw_request_firmware(struct rtl8168_fw *rtl_fw);
+void rtl8168_fw_release_firmware(struct rtl8168_fw *rtl_fw);
+void rtl8168_fw_write_firmware(struct rtl8168_private *tp, struct rtl8168_fw *rtl_fw);
+
+#endif /* _LINUX_RTL8168_FIRMWARE_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_n.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_n.c
new file mode 100644
index 000000000000..19ae62bec6e6
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_n.c
@@ -0,0 +1,32206 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+################################################################################
+#
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see <http://www.gnu.org/licenses/>.
+#
+# Author:
+# Realtek NIC software team <nicfae@realtek.com>
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ *  This product is covered by one or more of the following patents:
+ *  US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+/*
+ * This driver is modified from r8169.c in Linux kernel 2.6.18
+ */
+
+/* In Linux 5.4 asm_inline was introduced, but it's not supported by clang.
+ * Redefine it to just asm to enable successful compilation.
+ */
+
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/pci.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/delay.h>
+#include <linux/mii.h>
+#include <linux/if_vlan.h>
+#include <linux/crc32.h>
+#include <linux/interrupt.h>
+#include <linux/in.h>
+#include <linux/ip.h>
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
+#include <linux/ipv6.h>
+#include <net/ip6_checksum.h>
+#endif
+#include <linux/tcp.h>
+#include <linux/init.h>
+#include <linux/rtnetlink.h>
+#include <linux/completion.h>
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0)
+#include <linux/pci-aspm.h>
+#endif
+#endif
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37)
+#include <linux/prefetch.h>
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+#define dev_printk(A,B,fmt,args...) printk(A fmt,##args)
+#else
+#include <linux/dma-mapping.h>
+#include <linux/moduleparam.h>
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31)
+#include <linux/mdio.h>
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,4,10)
+#include <net/gso.h>
+#endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(6,4,10) */
+
+#include <asm/io.h>
+#include <asm/irq.h>
+
+#include "r8168.h"
+#include "r8168_asf.h"
+#include "rtl_eeprom.h"
+#include "rtltool.h"
+#include "r8168_firmware.h"
+
+#ifdef ENABLE_R8168_PROCFS
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#endif
+
+#define FIRMWARE_8168D_1    "rtl_nic/rtl8168d-1.fw"
+#define FIRMWARE_8168D_2    "rtl_nic/rtl8168d-2.fw"
+#define FIRMWARE_8168E_1    "rtl_nic/rtl8168e-1.fw"
+#define FIRMWARE_8168E_2    "rtl_nic/rtl8168e-2.fw"
+#define FIRMWARE_8168E_3    "rtl_nic/rtl8168e-3.fw"
+#define FIRMWARE_8168E_4    "rtl_nic/rtl8168e-4.fw"
+#define FIRMWARE_8168F_1    "rtl_nic/rtl8168f-1.fw"
+#define FIRMWARE_8168F_2    "rtl_nic/rtl8168f-2.fw"
+#define FIRMWARE_8411_1     "rtl_nic/rtl8411-1.fw"
+#define FIRMWARE_8411_2     "rtl_nic/rtl8411-2.fw"
+#define FIRMWARE_8168G_2    "rtl_nic/rtl8168g-2.fw"
+#define FIRMWARE_8168G_3    "rtl_nic/rtl8168g-3.fw"
+#define FIRMWARE_8168EP_1   "rtl_nic/rtl8168ep-1.fw"
+#define FIRMWARE_8168EP_2   "rtl_nic/rtl8168ep-2.fw"
+#define FIRMWARE_8168EP_3   "rtl_nic/rtl8168ep-3.fw"
+#define FIRMWARE_8168H_1    "rtl_nic/rtl8168h-1.fw"
+#define FIRMWARE_8168H_2    "rtl_nic/rtl8168h-2.fw"
+#define FIRMWARE_8168H_3    "rtl_nic/rtl8168h-3.fw"
+#define FIRMWARE_8168H_4    "rtl_nic/rtl8168h-4.fw"
+#define FIRMWARE_8168FP_3   "rtl_nic/rtl8168fp-3.fw"
+#define FIRMWARE_8168FP_4   "rtl_nic/rtl8168fp-4.fw"
+
+/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
+   The RTL chips use a 64 element hash table based on the Ethernet CRC. */
+static const int multicast_filter_limit = 32;
+
+static const struct {
+        const char *name;
+        const char *fw_name;
+} rtl_chip_fw_infos[] = {
+        /* PCI-E devices. */
+        [CFG_METHOD_1] = {"RTL8168B/8111",          },
+        [CFG_METHOD_2] = {"RTL8168B/8111",          },
+        [CFG_METHOD_3] = {"RTL8168B/8111",          },
+        [CFG_METHOD_4] = {"RTL8168C/8111C",         },
+        [CFG_METHOD_5] = {"RTL8168C/8111C",         },
+        [CFG_METHOD_6] = {"RTL8168C/8111C",         },
+        [CFG_METHOD_7] = {"RTL8168CP/8111CP",       },
+        [CFG_METHOD_8] = {"RTL8168CP/8111CP",       },
+        [CFG_METHOD_9] = {"RTL8168D/8111D",         FIRMWARE_8168D_1},
+        [CFG_METHOD_10] = {"RTL8168D/8111D",        FIRMWARE_8168D_2},
+        [CFG_METHOD_11] = {"RTL8168DP/8111DP",      },
+        [CFG_METHOD_12] = {"RTL8168DP/8111DP",      },
+        [CFG_METHOD_13] = {"RTL8168DP/8111DP",      },
+        [CFG_METHOD_14] = {"RTL8168E/8111E",        FIRMWARE_8168E_1},
+        [CFG_METHOD_15] = {"RTL8168E/8111E",        FIRMWARE_8168E_2},
+        [CFG_METHOD_16] = {"RTL8168E-VL/8111E-VL",  FIRMWARE_8168E_3},
+        [CFG_METHOD_17] = {"RTL8168E-VL/8111E-VL",  FIRMWARE_8168E_4},
+        [CFG_METHOD_18] = {"RTL8168F/8111F",        FIRMWARE_8168F_1},
+        [CFG_METHOD_19] = {"RTL8168F/8111F",        FIRMWARE_8168F_2},
+        [CFG_METHOD_20] = {"RTL8411",               FIRMWARE_8411_1},
+        [CFG_METHOD_21] = {"RTL8168G/8111G",        FIRMWARE_8168G_2},
+        [CFG_METHOD_22] = {"RTL8168G/8111G",        },
+        [CFG_METHOD_23] = {"RTL8168EP/8111EP",      FIRMWARE_8168EP_1},
+        [CFG_METHOD_24] = {"RTL8168GU/8111GU",      },
+        [CFG_METHOD_25] = {"RTL8168GU/8111GU",      FIRMWARE_8168G_3},
+        [CFG_METHOD_26] = {"8411B",                 FIRMWARE_8411_2},
+        [CFG_METHOD_27] = {"RTL8168EP/8111EP",      FIRMWARE_8168EP_2},
+        [CFG_METHOD_28] = {"RTL8168EP/8111EP",      FIRMWARE_8168EP_3},
+        [CFG_METHOD_29] = {"RTL8168H/8111H",        FIRMWARE_8168H_1},
+        [CFG_METHOD_30] = {"RTL8168H/8111H",        FIRMWARE_8168H_2},
+        [CFG_METHOD_31] = {"RTL8168FP/8111FP",      },
+        [CFG_METHOD_32] = {"RTL8168FP/8111FP",      FIRMWARE_8168FP_3},
+        [CFG_METHOD_33] = {"RTL8168FP/8111FP",      FIRMWARE_8168FP_4},
+        [CFG_METHOD_34] = {"RTL8168FP/8111FP",      FIRMWARE_8168FP_4},
+        [CFG_METHOD_35] = {"RTL8168H/8111H",        FIRMWARE_8168H_3},
+        [CFG_METHOD_36] = {"RTL8168H/8111H",        FIRMWARE_8168H_4},
+        [CFG_METHOD_37] = {"RTL8168M/8111M",        FIRMWARE_8168H_2},
+        [CFG_METHOD_DEFAULT] = {"Unknown",          },
+};
+
+#define _R(NAME,MAC,RCR,MASK, JumFrameSz) \
+    { .name = NAME, .mcfg = MAC, .RCR_Cfg = RCR, .RxConfigMask = MASK, .jumbo_frame_sz = JumFrameSz }
+
+static const struct {
+        const char *name;
+        u8 mcfg;
+        u32 RCR_Cfg;
+        u32 RxConfigMask;   /* Clears the bits supported by this chip */
+        u32 jumbo_frame_sz;
+} rtl_chip_info[] = {
+        _R("RTL8168B/8111B",
+        CFG_METHOD_1,
+        (Reserved2_data << Reserved2_shift) | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e1880,
+        Jumbo_Frame_4k),
+
+        _R("RTL8168B/8111B",
+        CFG_METHOD_2,
+        (Reserved2_data << Reserved2_shift) | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e1880,
+        Jumbo_Frame_4k),
+
+        _R("RTL8168B/8111B",
+        CFG_METHOD_3,
+        (Reserved2_data << Reserved2_shift) | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e1880,
+        Jumbo_Frame_4k),
+
+        _R("RTL8168C/8111C",
+        CFG_METHOD_4,
+        RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e1880,
+        Jumbo_Frame_6k),
+
+        _R("RTL8168C/8111C",
+        CFG_METHOD_5,
+        RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e1880,
+        Jumbo_Frame_6k),
+
+        _R("RTL8168C/8111C",
+        CFG_METHOD_6,
+        RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e1880,
+        Jumbo_Frame_6k),
+
+        _R("RTL8168CP/8111CP",
+        CFG_METHOD_7,
+        RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e1880,
+        Jumbo_Frame_6k),
+
+        _R("RTL8168CP/8111CP",
+        CFG_METHOD_8,
+        RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e1880,
+        Jumbo_Frame_6k),
+
+        _R("RTL8168D/8111D",
+        CFG_METHOD_9,
+        RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e1880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168D/8111D",
+        CFG_METHOD_10,
+        RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e1880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168DP/8111DP",
+        CFG_METHOD_11,
+        RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e1880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168DP/8111DP",
+        CFG_METHOD_12,
+        RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e1880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168DP/8111DP",
+        CFG_METHOD_13,
+        RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e1880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168E/8111E",
+        CFG_METHOD_14,
+        RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e1880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168E/8111E",
+        CFG_METHOD_15,
+        RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e1880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168E-VL/8111E-VL",
+        CFG_METHOD_16,
+        RxCfg_128_int_en | RxEarly_off_V1 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e0080,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168E-VL/8111E-VL",
+        CFG_METHOD_17,
+        RxCfg_128_int_en | RxEarly_off_V1 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e1880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168F/8111F",
+        CFG_METHOD_18,
+        RxCfg_128_int_en | RxEarly_off_V1 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e1880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168F/8111F",
+        CFG_METHOD_19,
+        RxCfg_128_int_en | RxEarly_off_V1 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e1880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8411",
+        CFG_METHOD_20,
+        RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e1880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168G/8111G",
+        CFG_METHOD_21,
+        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168G/8111G",
+        CFG_METHOD_22,
+        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168EP/8111EP",
+        CFG_METHOD_23,
+        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168GU/8111GU",
+        CFG_METHOD_24,
+        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168GU/8111GU",
+        CFG_METHOD_25,
+        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
+        _R("8411B",
+        CFG_METHOD_26,
+        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168EP/8111EP",
+        CFG_METHOD_27,
+        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168EP/8111EP",
+        CFG_METHOD_28,
+        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168H/8111H",
+        CFG_METHOD_29,
+        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168H/8111H",
+        CFG_METHOD_30,
+        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168FP/8111FP",
+        CFG_METHOD_31,
+        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168FP/8111FP",
+        CFG_METHOD_32,
+        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168FP/8111FP",
+        CFG_METHOD_33,
+        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168FP/8111FP",
+        CFG_METHOD_34,
+        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168H/8111H",
+        CFG_METHOD_35,
+        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168H/8111H",
+        CFG_METHOD_36,
+        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
+        _R("RTL8168M/8111M",
+        CFG_METHOD_37,
+        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_9k),
+
+        _R("Unknown",
+        CFG_METHOD_DEFAULT,
+        (RX_DMA_BURST << RxCfgDMAShift),
+        0xff7e5880,
+        Jumbo_Frame_1k)
+};
+#undef _R
+
+#ifndef PCI_VENDOR_ID_DLINK
+#define PCI_VENDOR_ID_DLINK 0x1186
+#endif
+
+static struct pci_device_id rtl8168_pci_tbl[] = {
+        { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8168), },
+        { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8161), },
+        { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x2502), },
+        { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x2600), },
+        { PCI_VENDOR_ID_DLINK, 0x4300, 0x1186, 0x4b10,},
+        {0,},
+};
+
+MODULE_DEVICE_TABLE(pci, rtl8168_pci_tbl);
+
+static int use_dac = 1;
+static int timer_count = 0x2600;
+static int dynamic_aspm_packet_threshold = 10;
+
+static struct {
+        u32 msg_enable;
+} debug = { -1 };
+
+static unsigned int speed_mode = SPEED_1000;
+static unsigned int duplex_mode = DUPLEX_FULL;
+static unsigned int autoneg_mode = AUTONEG_ENABLE;
+static unsigned int advertising_mode =  ADVERTISED_10baseT_Half |
+                                        ADVERTISED_10baseT_Full |
+                                        ADVERTISED_100baseT_Half |
+                                        ADVERTISED_100baseT_Full |
+                                        ADVERTISED_1000baseT_Half |
+                                        ADVERTISED_1000baseT_Full;
+#ifdef CONFIG_ASPM
+static int aspm = 1;
+#else
+static int aspm = 0;
+#endif
+#ifdef CONFIG_DYNAMIC_ASPM
+static int dynamic_aspm = 1;
+#else
+static int dynamic_aspm = 0;
+#endif
+#ifdef ENABLE_S5WOL
+static int s5wol = 1;
+#else
+static int s5wol = 0;
+#endif
+#ifdef ENABLE_S5_KEEP_CURR_MAC
+static int s5_keep_curr_mac = 1;
+#else
+static int s5_keep_curr_mac = 0;
+#endif
+#ifdef ENABLE_EEE
+static int eee_enable = 1;
+#else
+static int eee_enable = 0;
+#endif
+#ifdef CONFIG_SOC_LAN
+static ulong hwoptimize = HW_PATCH_SOC_LAN;
+#else
+static ulong hwoptimize = 0;
+#endif
+#ifdef ENABLE_S0_MAGIC_PACKET
+static int s0_magic_packet = 1;
+#else
+static int s0_magic_packet = 0;
+#endif
+#ifdef DISABLE_WOL_SUPPORT
+static int disable_wol_support = 1;
+#else
+static int disable_wol_support = 0;
+#endif
+
+MODULE_AUTHOR("Realtek and the Linux r8168 crew <netdev@vger.kernel.org>");
+MODULE_DESCRIPTION("RealTek RTL-8168 Gigabit Ethernet driver");
+
+module_param(speed_mode, uint, 0);
+MODULE_PARM_DESC(speed_mode, "force phy operation. Deprecated by ethtool (8).");
+
+module_param(duplex_mode, uint, 0);
+MODULE_PARM_DESC(duplex_mode, "force phy operation. Deprecated by ethtool (8).");
+
+module_param(autoneg_mode, uint, 0);
+MODULE_PARM_DESC(autoneg_mode, "force phy operation. Deprecated by ethtool (8).");
+
+module_param(advertising_mode, uint, 0);
+MODULE_PARM_DESC(advertising_mode, "force phy operation. Deprecated by ethtool (8).");
+
+module_param(aspm, int, 0);
+MODULE_PARM_DESC(aspm, "Enable ASPM.");
+
+module_param(dynamic_aspm, int, 0);
+MODULE_PARM_DESC(aspm, "Enable Software Dynamic ASPM.");
+
+module_param(s5wol, int, 0);
+MODULE_PARM_DESC(s5wol, "Enable Shutdown Wake On Lan.");
+
+module_param(s5_keep_curr_mac, int, 0);
+MODULE_PARM_DESC(s5_keep_curr_mac, "Enable Shutdown Keep Current MAC Address.");
+
+module_param(use_dac, int, 0);
+MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
+
+module_param(timer_count, int, 0);
+MODULE_PARM_DESC(timer_count, "Timer Interrupt Interval.");
+
+module_param(eee_enable, int, 0);
+MODULE_PARM_DESC(eee_enable, "Enable Energy Efficient Ethernet.");
+
+module_param(hwoptimize, ulong, 0);
+MODULE_PARM_DESC(hwoptimize, "Enable HW optimization function.");
+
+module_param(s0_magic_packet, int, 0);
+MODULE_PARM_DESC(s0_magic_packet, "Enable S0 Magic Packet.");
+
+module_param(dynamic_aspm_packet_threshold, int, 0);
+MODULE_PARM_DESC(dynamic_aspm_packet_threshold, "Dynamic ASPM packet threshold.");
+
+module_param(disable_wol_support, int, 0);
+MODULE_PARM_DESC(disable_wol_support, "Disable PM support.");
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+module_param_named(debug, debug.msg_enable, int, 0);
+MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
+#endif//LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+
+MODULE_LICENSE("GPL");
+#ifdef ENABLE_USE_FIRMWARE_FILE
+MODULE_FIRMWARE(FIRMWARE_8168D_1);
+MODULE_FIRMWARE(FIRMWARE_8168D_2);
+MODULE_FIRMWARE(FIRMWARE_8168E_1);
+MODULE_FIRMWARE(FIRMWARE_8168E_2);
+MODULE_FIRMWARE(FIRMWARE_8168E_3);
+MODULE_FIRMWARE(FIRMWARE_8168E_4);
+MODULE_FIRMWARE(FIRMWARE_8168F_1);
+MODULE_FIRMWARE(FIRMWARE_8168F_2);
+MODULE_FIRMWARE(FIRMWARE_8411_1);
+MODULE_FIRMWARE(FIRMWARE_8411_2);
+MODULE_FIRMWARE(FIRMWARE_8168G_2);
+MODULE_FIRMWARE(FIRMWARE_8168G_3);
+MODULE_FIRMWARE(FIRMWARE_8168EP_1);
+MODULE_FIRMWARE(FIRMWARE_8168EP_2);
+MODULE_FIRMWARE(FIRMWARE_8168EP_3);
+MODULE_FIRMWARE(FIRMWARE_8168H_1);
+MODULE_FIRMWARE(FIRMWARE_8168H_2);
+MODULE_FIRMWARE(FIRMWARE_8168H_3);
+MODULE_FIRMWARE(FIRMWARE_8168H_4);
+MODULE_FIRMWARE(FIRMWARE_8168FP_3);
+MODULE_FIRMWARE(FIRMWARE_8168FP_4);
+#endif
+
+MODULE_VERSION(RTL8168_VERSION);
+
+static void rtl8168_sleep_rx_enable(struct net_device *dev);
+static void rtl8168_dsm(struct net_device *dev, int dev_state);
+
+/*
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
+static void rtl8168_esd_timer(unsigned long __opaque);
+#else
+static void rtl8168_esd_timer(struct timer_list *t);
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
+static void rtl8168_link_timer(unsigned long __opaque);
+#else
+static void rtl8168_link_timer(struct timer_list *t);
+#endif
+*/
+
+static netdev_tx_t rtl8168_start_xmit(struct sk_buff *skb, struct net_device *dev);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+static irqreturn_t rtl8168_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
+#else
+static irqreturn_t rtl8168_interrupt(int irq, void *dev_instance);
+#endif
+static void rtl8168_rx_desc_offset0_init(struct rtl8168_private *, int);
+static void rtl8168_set_rx_mode(struct net_device *dev);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0)
+static void rtl8168_tx_timeout(struct net_device *dev, unsigned int txqueue);
+#else
+static void rtl8168_tx_timeout(struct net_device *dev);
+#endif
+static struct net_device_stats *rtl8168_get_stats(struct net_device *dev);
+static int rtl8168_rx_interrupt(struct net_device *, struct rtl8168_private *, struct rtl8168_rx_ring *, napi_budget);
+#ifdef CONFIG_R8168_NAPI
+static int rtl8168_poll_msix_ring(napi_ptr napi, napi_budget budget);
+static int rtl8168_poll_msix_rx(napi_ptr napi, napi_budget budget);
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+static irqreturn_t rtl8168_interrupt_msix(int irq, void *dev_instance, struct pt_regs *regs);
+#else
+static irqreturn_t rtl8168_interrupt_msix(int irq, void *dev_instance);
+#endif
+static void rtl8168_wait_for_quiescence(struct net_device *dev);
+static int rtl8168_change_mtu(struct net_device *dev, int new_mtu);
+static void rtl8168_down(struct net_device *dev);
+
+static int rtl8168_set_mac_address(struct net_device *dev, void *p);
+void rtl8168_rar_set(struct rtl8168_private *tp, const u8 *addr);
+static void rtl8168_desc_addr_fill(struct rtl8168_private *);
+static void rtl8168_tx_desc_init(struct rtl8168_private *tp);
+static void rtl8168_rx_desc_init(struct rtl8168_private *tp);
+
+static u16 rtl8168_get_hw_phy_mcu_code_ver(struct rtl8168_private *tp);
+
+static void rtl8168_phy_power_up(struct net_device *dev);
+static void rtl8168_phy_power_down(struct net_device *dev);
+static int rtl8168_set_speed(struct net_device *dev, u8 autoneg, u32 speed, u8 duplex, u32 adv);
+
+static int rtl8168_set_phy_mcu_patch_request(struct rtl8168_private *tp);
+static int rtl8168_clear_phy_mcu_patch_request(struct rtl8168_private *tp);
+
+#ifdef CONFIG_R8168_NAPI
+static int rtl8168_poll(napi_ptr napi, napi_budget budget);
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
+static void rtl8168_reset_task(void *_data);
+static void rtl8168_esd_task(void *_data);
+static void rtl8168_linkchg_task(void *_data);
+#else
+static void rtl8168_reset_task(struct work_struct *work);
+static void rtl8168_esd_task(struct work_struct *work);
+static void rtl8168_linkchg_task(struct work_struct *work);
+#endif
+static void rtl8168_schedule_reset_work(struct rtl8168_private *tp);
+static void rtl8168_schedule_esd_work(struct rtl8168_private *tp);
+static void rtl8168_schedule_linkchg_work(struct rtl8168_private *tp);
+static void rtl8168_init_all_schedule_work(struct rtl8168_private *tp);
+static void rtl8168_cancel_all_schedule_work(struct rtl8168_private *tp);
+
+static inline struct device *tp_to_dev(struct rtl8168_private *tp)
+{
+        return &tp->pci_dev->dev;
+}
+
+#if ((LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) && \
+     LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,00)))
+void ethtool_convert_legacy_u32_to_link_mode(unsigned long *dst,
+                u32 legacy_u32)
+{
+        bitmap_zero(dst, __ETHTOOL_LINK_MODE_MASK_NBITS);
+        dst[0] = legacy_u32;
+}
+
+bool ethtool_convert_link_mode_to_legacy_u32(u32 *legacy_u32,
+                const unsigned long *src)
+{
+        bool retval = true;
+
+        /* TODO: following test will soon always be true */
+        if (__ETHTOOL_LINK_MODE_MASK_NBITS > 32) {
+                __ETHTOOL_DECLARE_LINK_MODE_MASK(ext);
+
+                bitmap_zero(ext, __ETHTOOL_LINK_MODE_MASK_NBITS);
+                bitmap_fill(ext, 32);
+                bitmap_complement(ext, ext, __ETHTOOL_LINK_MODE_MASK_NBITS);
+                if (bitmap_intersects(ext, src,
+                                      __ETHTOOL_LINK_MODE_MASK_NBITS)) {
+                        /* src mask goes beyond bit 31 */
+                        retval = false;
+                }
+        }
+        *legacy_u32 = src[0];
+        return retval;
+}
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
+
+#ifndef LPA_1000FULL
+#define LPA_1000FULL            0x0800
+#endif
+
+#ifndef LPA_1000HALF
+#define LPA_1000HALF            0x0400
+#endif
+
+static inline u32 mii_adv_to_ethtool_adv_t(u32 adv)
+{
+        u32 result = 0;
+
+        if (adv & ADVERTISE_10HALF)
+                result |= ADVERTISED_10baseT_Half;
+        if (adv & ADVERTISE_10FULL)
+                result |= ADVERTISED_10baseT_Full;
+        if (adv & ADVERTISE_100HALF)
+                result |= ADVERTISED_100baseT_Half;
+        if (adv & ADVERTISE_100FULL)
+                result |= ADVERTISED_100baseT_Full;
+        if (adv & ADVERTISE_PAUSE_CAP)
+                result |= ADVERTISED_Pause;
+        if (adv & ADVERTISE_PAUSE_ASYM)
+                result |= ADVERTISED_Asym_Pause;
+
+        return result;
+}
+
+static inline u32 mii_lpa_to_ethtool_lpa_t(u32 lpa)
+{
+        u32 result = 0;
+
+        if (lpa & LPA_LPACK)
+                result |= ADVERTISED_Autoneg;
+
+        return result | mii_adv_to_ethtool_adv_t(lpa);
+}
+
+static inline u32 mii_stat1000_to_ethtool_lpa_t(u32 lpa)
+{
+        u32 result = 0;
+
+        if (lpa & LPA_1000HALF)
+                result |= ADVERTISED_1000baseT_Half;
+        if (lpa & LPA_1000FULL)
+                result |= ADVERTISED_1000baseT_Full;
+
+        return result;
+}
+
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)
+static inline void eth_hw_addr_random(struct net_device *dev)
+{
+        random_ether_addr(dev->dev_addr);
+}
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+#undef ethtool_ops
+#define ethtool_ops _kc_ethtool_ops
+
+struct _kc_ethtool_ops {
+        int  (*get_settings)(struct net_device *, struct ethtool_cmd *);
+        int  (*set_settings)(struct net_device *, struct ethtool_cmd *);
+        void (*get_drvinfo)(struct net_device *, struct ethtool_drvinfo *);
+        int  (*get_regs_len)(struct net_device *);
+        void (*get_regs)(struct net_device *, struct ethtool_regs *, void *);
+        void (*get_wol)(struct net_device *, struct ethtool_wolinfo *);
+        int  (*set_wol)(struct net_device *, struct ethtool_wolinfo *);
+        u32  (*get_msglevel)(struct net_device *);
+        void (*set_msglevel)(struct net_device *, u32);
+        int  (*nway_reset)(struct net_device *);
+        u32  (*get_link)(struct net_device *);
+        int  (*get_eeprom_len)(struct net_device *);
+        int  (*get_eeprom)(struct net_device *, struct ethtool_eeprom *, u8 *);
+        int  (*set_eeprom)(struct net_device *, struct ethtool_eeprom *, u8 *);
+        int  (*get_coalesce)(struct net_device *, struct ethtool_coalesce *);
+        int  (*set_coalesce)(struct net_device *, struct ethtool_coalesce *);
+        void (*get_ringparam)(struct net_device *, struct ethtool_ringparam *);
+        int  (*set_ringparam)(struct net_device *, struct ethtool_ringparam *);
+        void (*get_pauseparam)(struct net_device *,
+                               struct ethtool_pauseparam*);
+        int  (*set_pauseparam)(struct net_device *,
+                               struct ethtool_pauseparam*);
+        u32  (*get_rx_csum)(struct net_device *);
+        int  (*set_rx_csum)(struct net_device *, u32);
+        u32  (*get_tx_csum)(struct net_device *);
+        int  (*set_tx_csum)(struct net_device *, u32);
+        u32  (*get_sg)(struct net_device *);
+        int  (*set_sg)(struct net_device *, u32);
+        u32  (*get_tso)(struct net_device *);
+        int  (*set_tso)(struct net_device *, u32);
+        int  (*self_test_count)(struct net_device *);
+        void (*self_test)(struct net_device *, struct ethtool_test *, u64 *);
+        void (*get_strings)(struct net_device *, u32 stringset, u8 *);
+        int  (*phys_id)(struct net_device *, u32);
+        int  (*get_stats_count)(struct net_device *);
+        void (*get_ethtool_stats)(struct net_device *, struct ethtool_stats *,
+                                  u64 *);
+} *ethtool_ops = NULL;
+
+#undef SET_ETHTOOL_OPS
+#define SET_ETHTOOL_OPS(netdev, ops) (ethtool_ops = (ops))
+
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,16,0)
+#ifndef SET_ETHTOOL_OPS
+#define SET_ETHTOOL_OPS(netdev,ops) \
+         ( (netdev)->ethtool_ops = (ops) )
+#endif //SET_ETHTOOL_OPS
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,16,0)
+
+//#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5)
+#ifndef netif_msg_init
+#define netif_msg_init _kc_netif_msg_init
+/* copied from linux kernel 2.6.20 include/linux/netdevice.h */
+static inline u32 netif_msg_init(int debug_value, int default_msg_enable_bits)
+{
+        /* use default */
+        if (debug_value < 0 || debug_value >= (sizeof(u32) * 8))
+                return default_msg_enable_bits;
+        if (debug_value == 0)   /* no output */
+                return 0;
+        /* set low N bits */
+        return (1 << debug_value) - 1;
+}
+
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5)
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22)
+static inline void eth_copy_and_sum (struct sk_buff *dest,
+                                     const unsigned char *src,
+                                     int len, int base)
+{
+        memcpy (dest->data, src, len);
+}
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22)
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7)
+/* copied from linux kernel 2.6.20 /include/linux/time.h */
+/* Parameters used to convert the timespec values: */
+#define MSEC_PER_SEC    1000L
+
+/* copied from linux kernel 2.6.20 /include/linux/jiffies.h */
+/*
+ * Change timeval to jiffies, trying to avoid the
+ * most obvious overflows..
+ *
+ * And some not so obvious.
+ *
+ * Note that we don't want to return MAX_LONG, because
+ * for various timeout reasons we often end up having
+ * to wait "jiffies+1" in order to guarantee that we wait
+ * at _least_ "jiffies" - so "jiffies+1" had better still
+ * be positive.
+ */
+#define MAX_JIFFY_OFFSET ((~0UL >> 1)-1)
+
+/*
+ * Convert jiffies to milliseconds and back.
+ *
+ * Avoid unnecessary multiplications/divisions in the
+ * two most common HZ cases:
+ */
+static inline unsigned int _kc_jiffies_to_msecs(const unsigned long j)
+{
+#if HZ <= MSEC_PER_SEC && !(MSEC_PER_SEC % HZ)
+        return (MSEC_PER_SEC / HZ) * j;
+#elif HZ > MSEC_PER_SEC && !(HZ % MSEC_PER_SEC)
+        return (j + (HZ / MSEC_PER_SEC) - 1)/(HZ / MSEC_PER_SEC);
+#else
+        return (j * MSEC_PER_SEC) / HZ;
+#endif
+}
+
+static inline unsigned long _kc_msecs_to_jiffies(const unsigned int m)
+{
+        if (m > _kc_jiffies_to_msecs(MAX_JIFFY_OFFSET))
+                return MAX_JIFFY_OFFSET;
+#if HZ <= MSEC_PER_SEC && !(MSEC_PER_SEC % HZ)
+        return (m + (MSEC_PER_SEC / HZ) - 1) / (MSEC_PER_SEC / HZ);
+#elif HZ > MSEC_PER_SEC && !(HZ % MSEC_PER_SEC)
+        return m * (HZ / MSEC_PER_SEC);
+#else
+        return (m * HZ + MSEC_PER_SEC - 1) / MSEC_PER_SEC;
+#endif
+}
+#endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7)
+
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11)
+
+/* copied from linux kernel 2.6.12.6 /include/linux/pm.h */
+typedef int __bitwise pci_power_t;
+
+/* copied from linux kernel 2.6.12.6 /include/linux/pci.h */
+typedef u32 __bitwise pm_message_t;
+
+#define PCI_D0  ((pci_power_t __force) 0)
+#define PCI_D1  ((pci_power_t __force) 1)
+#define PCI_D2  ((pci_power_t __force) 2)
+#define PCI_D3hot   ((pci_power_t __force) 3)
+#define PCI_D3cold  ((pci_power_t __force) 4)
+#define PCI_POWER_ERROR ((pci_power_t __force) -1)
+
+/* copied from linux kernel 2.6.12.6 /drivers/pci/pci.c */
+/**
+ * pci_choose_state - Choose the power state of a PCI device
+ * @dev: PCI device to be suspended
+ * @state: target sleep state for the whole system. This is the value
+ *  that is passed to suspend() function.
+ *
+ * Returns PCI power state suitable for given device and given system
+ * message.
+ */
+
+pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state)
+{
+        if (!pci_find_capability(dev, PCI_CAP_ID_PM))
+                return PCI_D0;
+
+        switch (state) {
+        case 0:
+                return PCI_D0;
+        case 3:
+                return PCI_D3hot;
+        default:
+                printk("They asked me for state %d\n", state);
+//      BUG();
+        }
+        return PCI_D0;
+}
+#endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11)
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9)
+/**
+ * msleep_interruptible - sleep waiting for waitqueue interruptions
+ * @msecs: Time in milliseconds to sleep for
+ */
+#define msleep_interruptible _kc_msleep_interruptible
+unsigned long _kc_msleep_interruptible(unsigned int msecs)
+{
+        unsigned long timeout = _kc_msecs_to_jiffies(msecs);
+
+        while (timeout && !signal_pending(current)) {
+                set_current_state(TASK_INTERRUPTIBLE);
+                timeout = schedule_timeout(timeout);
+        }
+        return _kc_jiffies_to_msecs(timeout);
+}
+#endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9)
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7)
+/* copied from linux kernel 2.6.20 include/linux/sched.h */
+#ifndef __sched
+#define __sched     __attribute__((__section__(".sched.text")))
+#endif
+
+/* copied from linux kernel 2.6.20 kernel/timer.c */
+signed long __sched schedule_timeout_uninterruptible(signed long timeout)
+{
+        __set_current_state(TASK_UNINTERRUPTIBLE);
+        return schedule_timeout(timeout);
+}
+
+/* copied from linux kernel 2.6.20 include/linux/mii.h */
+#undef if_mii
+#define if_mii _kc_if_mii
+static inline struct mii_ioctl_data *if_mii(struct ifreq *rq)
+{
+        return (struct mii_ioctl_data *) &rq->ifr_ifru;
+}
+#endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7)
+
+int rtl8168_dump_tally_counter(struct rtl8168_private *tp, dma_addr_t paddr)
+{
+        u32 cmd;
+        u32 WaitCnt;
+        int retval = -1;
+
+        RTL_W32(tp, CounterAddrHigh, (u64)paddr >> 32);
+        cmd = (u64)paddr & DMA_BIT_MASK(32);
+        RTL_W32(tp, CounterAddrLow, cmd);
+        RTL_W32(tp, CounterAddrLow, cmd | CounterDump);
+
+        WaitCnt = 0;
+        while (RTL_R32(tp, CounterAddrLow) & CounterDump) {
+                udelay(10);
+
+                WaitCnt++;
+                if (WaitCnt > 20)
+                        break;
+        }
+
+        if (WaitCnt <= 20)
+                retval = 0;
+
+        return retval;
+}
+
+static u32 rtl8168_convert_link_speed(u16 status)
+{
+        u32 speed = SPEED_UNKNOWN;
+
+        if (status & LinkStatus) {
+                if (status & _1000bpsF)
+                        speed = SPEED_1000;
+                else if (status & _100bps)
+                        speed = SPEED_100;
+                else if (status & _10bps)
+                        speed = SPEED_10;
+        }
+
+        return speed;
+}
+
+static int rtl8168_vcd_test(struct rtl8168_private *tp)
+{
+        u16 val;
+        u32 wait_cnt;
+        int ret = -1;
+
+        rtl8168_mdio_write(tp, 0x1f, 0x0a43);
+        rtl8168_mdio_write(tp, 0x13, 0x8169);
+        rtl8168_mdio_write(tp, 0x14, 0x18c1);
+        rtl8168_mdio_write(tp, 0x13, 0x816b);
+        rtl8168_mdio_write(tp, 0x14, 0xc7b0);
+        rtl8168_mdio_write(tp, 0x13, 0x816d);
+        rtl8168_mdio_write(tp, 0x14, 0x5933);
+        rtl8168_mdio_write(tp, 0x13, 0x816f);
+        rtl8168_mdio_write(tp, 0x14, 0xb920);
+        rtl8168_mdio_write(tp, 0x13, 0x8171);
+        rtl8168_mdio_write(tp, 0x14, 0xee07);
+        rtl8168_mdio_write(tp, 0x13, 0x8162);
+        rtl8168_mdio_write(tp, 0x14, 0x1800);
+        rtl8168_mdio_write(tp, 0x13, 0x8173);
+        rtl8168_mdio_write(tp, 0x14, 0x0304);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+        rtl8168_mdio_write(tp, 0x1f, 0x0a42);
+        rtl8168_clear_eth_phy_bit(tp, 0x11, BIT(0));
+        rtl8168_set_eth_phy_bit(tp, 0x11, 0x00f0);
+        rtl8168_set_eth_phy_bit(tp, 0x11, BIT(0));
+
+        wait_cnt = 0;
+        do {
+                mdelay(1);
+                val = rtl8168_mdio_read(tp, 0x11);
+                wait_cnt++;
+        } while (!(val & BIT_15) && (wait_cnt < 5000));
+
+        if (wait_cnt == 5000)
+                goto exit;
+
+        ret = 0;
+
+exit:
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+        return ret;
+}
+
+static void rtl8168_get_cp_len(struct rtl8168_private *tp,
+                               u16 cp_len[RTL8168_CP_NUM])
+{
+        int i;
+        u16 status;
+        u16 tmp_cp_len = 0;
+
+        status = RTL_R8(tp, PHYstatus);
+        if (status & LinkStatus) {
+                if (status & _10bps) {
+                        tmp_cp_len = 0;
+                } else if (status & _1000bpsF) {
+                        rtl8168_mdio_write(tp, 0x1f, 0x0a88);
+                        tmp_cp_len = rtl8168_mdio_read(tp, 0x10);
+                } else
+                        goto exit;
+        } else
+                goto exit;
+
+        tmp_cp_len &= 0xff;
+        for (i=0; i<RTL8168_CP_NUM; i++)
+                cp_len[i] = tmp_cp_len;
+
+exit:
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+        for (i=0; i<RTL8168_CP_NUM; i++)
+                if (cp_len[i] > RTL8168_MAX_SUPPORT_cp_len)
+                        cp_len[i] = RTL8168_MAX_SUPPORT_cp_len;
+
+        return;
+}
+
+static int __rtl8168_get_cp_status(u16 val)
+{
+        switch (val) {
+        case 0x0060:
+                return rtl8168_cp_normal;
+        case 0x0048:
+                return rtl8168_cp_open;
+        case 0x0050:
+                return rtl8168_cp_short;
+        case 0x0042:
+        case 0x0044:
+                return rtl8168_cp_mismatch;
+        default:
+                return rtl8168_cp_normal;
+        }
+}
+
+static int _rtl8168_get_cp_status(struct rtl8168_private *tp, u8 pair_num)
+{
+        u16 val;
+        int cp_status = rtl8168_cp_unknown;
+
+        if (pair_num > 3)
+                goto exit;
+
+        rtl8168_mdio_write(tp, 0x1f, 0x0a43);
+        rtl8168_mdio_write(tp, 0x13, 0x802b + 4 * pair_num);
+        val = rtl8168_mdio_read(tp, 0x14);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+        cp_status = __rtl8168_get_cp_status(val);
+
+exit:
+        return cp_status;
+}
+
+static const char * rtl8168_get_cp_status_string(int cp_status)
+{
+        switch(cp_status) {
+        case rtl8168_cp_normal:
+                return "normal  ";
+        case rtl8168_cp_short:
+                return "short   ";
+        case rtl8168_cp_open:
+                return "open    ";
+        case rtl8168_cp_mismatch:
+                return "mismatch";
+        default:
+                return "unknown ";
+        }
+}
+
+static u16 rtl8168_get_cp_pp(struct rtl8168_private *tp, u8 pair_num)
+{
+        u16 pp = 0;
+
+        if (pair_num > 3)
+                goto exit;
+
+        rtl8168_mdio_write(tp, 0x1f, 0x0a43);
+        rtl8168_mdio_write(tp, 0x13, 0x802d + 4 * pair_num);
+        pp = rtl8168_mdio_read(tp, 0x14);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+        pp &= 0x3fff;
+        pp /= 80;
+
+exit:
+        return pp;
+}
+
+static void rtl8168_get_cp_status(struct rtl8168_private *tp,
+                                  int cp_status[RTL8168_CP_NUM])
+{
+        int i;
+
+        for (i =0; i<RTL8168_CP_NUM; i++)
+                cp_status[i] = _rtl8168_get_cp_status(tp, i);
+}
+
+#ifdef ENABLE_R8168_PROCFS
+/****************************************************************************
+*   -----------------------------PROCFS STUFF-------------------------
+*****************************************************************************
+*/
+
+static struct proc_dir_entry *rtl8168_proc;
+static int proc_init_num = 0;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
+static int proc_get_driver_variable(struct seq_file *m, void *v)
+{
+        struct net_device *dev = m->private;
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        seq_puts(m, "\nDump Driver Variable\n");
+
+        rtnl_lock();
+
+        seq_puts(m, "Variable\tValue\n----------\t-----\n");
+        seq_printf(m, "MODULENAME\t%s\n", MODULENAME);
+        seq_printf(m, "driver version\t%s\n", RTL8168_VERSION);
+        seq_printf(m, "chipset\t%d\n", tp->chipset);
+        seq_printf(m, "chipset_name\t%s\n", rtl_chip_info[tp->chipset].name);
+        seq_printf(m, "mtu\t%d\n", dev->mtu);
+        seq_printf(m, "num_rx_desc\t0x%x\n", tp->num_rx_desc);
+        seq_printf(m, "cur_rx0\t0x%x\n", tp->rx_ring[0].cur_rx);
+        seq_printf(m, "dirty_rx0\t0x%x\n", tp->rx_ring[0].dirty_rx);
+        seq_printf(m, "rdu0\t0x%x\n", tp->rx_ring[0].rdu);
+        seq_printf(m, "cur_rx1\t0x%x\n", tp->rx_ring[1].cur_rx);
+        seq_printf(m, "dirty_rx1\t0x%x\n", tp->rx_ring[1].dirty_rx);
+        seq_printf(m, "rdu1\t0x%x\n", tp->rx_ring[1].rdu);
+        seq_printf(m, "cur_rx2\t0x%x\n", tp->rx_ring[2].cur_rx);
+        seq_printf(m, "dirty_rx2\t0x%x\n", tp->rx_ring[2].dirty_rx);
+        seq_printf(m, "rdu2\t0x%x\n", tp->rx_ring[2].rdu);
+        seq_printf(m, "cur_rx3\t0x%x\n", tp->rx_ring[3].cur_rx);
+        seq_printf(m, "dirty_rx3\t0x%x\n", tp->rx_ring[3].dirty_rx);
+        seq_printf(m, "rdu3\t0x%x\n", tp->rx_ring[3].rdu);
+        seq_printf(m, "rx_fifo_of\t0x%x\n", tp->rx_fifo_of);
+        seq_printf(m, "num_tx_desc\t0x%x\n", tp->tx_ring[0].num_tx_desc);
+        seq_printf(m, "cur_tx0\t0x%x\n", tp->tx_ring[0].cur_tx);
+        seq_printf(m, "dirty_tx0\t0x%x\n", tp->tx_ring[0].dirty_tx);
+        seq_printf(m, "tdu0\t0x%x\n", tp->tx_ring[0].tdu);
+        seq_printf(m, "cur_tx1\t0x%x\n", tp->tx_ring[1].cur_tx);
+        seq_printf(m, "dirty_tx1\t0x%x\n", tp->tx_ring[1].dirty_tx);
+        seq_printf(m, "tdu1\t0x%x\n", tp->tx_ring[1].tdu);
+        seq_printf(m, "rx_buf_sz\t0x%x\n", tp->rx_buf_sz);
+        seq_printf(m, "esd_flag\t0x%x\n", tp->esd_flag);
+        seq_printf(m, "pci_cfg_is_read\t0x%x\n", tp->pci_cfg_is_read);
+        seq_printf(m, "rtl8168_rx_config\t0x%x\n", tp->rtl8168_rx_config);
+        seq_printf(m, "cp_cmd\t0x%x\n", tp->cp_cmd);
+        seq_printf(m, "intr_mask\t0x%x\n", tp->intr_mask);
+        seq_printf(m, "timer_intr_mask\t0x%x\n", tp->timer_intr_mask);
+        seq_printf(m, "wol_enabled\t0x%x\n", tp->wol_enabled);
+        seq_printf(m, "wol_opts\t0x%x\n", tp->wol_opts);
+        seq_printf(m, "efuse_ver\t0x%x\n", tp->efuse_ver);
+        seq_printf(m, "eeprom_type\t0x%x\n", tp->eeprom_type);
+        seq_printf(m, "autoneg\t0x%x\n", tp->autoneg);
+        seq_printf(m, "duplex\t0x%x\n", tp->duplex);
+        seq_printf(m, "speed\t%d\n", tp->speed);
+        seq_printf(m, "advertising\t0x%x\n", tp->advertising);
+        seq_printf(m, "eeprom_len\t0x%x\n", tp->eeprom_len);
+        seq_printf(m, "cur_page\t0x%x\n", tp->cur_page);
+        seq_printf(m, "bios_setting\t0x%x\n", tp->bios_setting);
+        seq_printf(m, "features\t0x%x\n", tp->features);
+        seq_printf(m, "org_pci_offset_99\t0x%x\n", tp->org_pci_offset_99);
+        seq_printf(m, "org_pci_offset_180\t0x%x\n", tp->org_pci_offset_180);
+        seq_printf(m, "issue_offset_99_event\t0x%x\n", tp->issue_offset_99_event);
+        seq_printf(m, "org_pci_offset_80\t0x%x\n", tp->org_pci_offset_80);
+        seq_printf(m, "org_pci_offset_81\t0x%x\n", tp->org_pci_offset_81);
+        seq_printf(m, "use_timer_interrrupt\t0x%x\n", tp->use_timer_interrrupt);
+        seq_printf(m, "HwIcVerUnknown\t0x%x\n", tp->HwIcVerUnknown);
+        seq_printf(m, "NotWrRamCodeToMicroP\t0x%x\n", tp->NotWrRamCodeToMicroP);
+        seq_printf(m, "NotWrMcuPatchCode\t0x%x\n", tp->NotWrMcuPatchCode);
+        seq_printf(m, "HwHasWrRamCodeToMicroP\t0x%x\n", tp->HwHasWrRamCodeToMicroP);
+        seq_printf(m, "sw_ram_code_ver\t0x%x\n", tp->sw_ram_code_ver);
+        seq_printf(m, "hw_ram_code_ver\t0x%x\n", tp->hw_ram_code_ver);
+        seq_printf(m, "rtk_enable_diag\t0x%x\n", tp->rtk_enable_diag);
+        seq_printf(m, "ShortPacketSwChecksum\t0x%x\n", tp->ShortPacketSwChecksum);
+        seq_printf(m, "UseSwPaddingShortPkt\t0x%x\n", tp->UseSwPaddingShortPkt);
+        seq_printf(m, "RequireAdcBiasPatch\t0x%x\n", tp->RequireAdcBiasPatch);
+        seq_printf(m, "AdcBiasPatchIoffset\t0x%x\n", tp->AdcBiasPatchIoffset);
+        seq_printf(m, "RequireAdjustUpsTxLinkPulseTiming\t0x%x\n", tp->RequireAdjustUpsTxLinkPulseTiming);
+        seq_printf(m, "SwrCnt1msIni\t0x%x\n", tp->SwrCnt1msIni);
+        seq_printf(m, "HwSuppNowIsOobVer\t0x%x\n", tp->HwSuppNowIsOobVer);
+        seq_printf(m, "HwFiberModeVer\t0x%x\n", tp->HwFiberModeVer);
+        seq_printf(m, "HwFiberStat\t0x%x\n", tp->HwFiberStat);
+        seq_printf(m, "HwSwitchMdiToFiber\t0x%x\n", tp->HwSwitchMdiToFiber);
+        seq_printf(m, "HwSuppSerDesPhyVer\t0x%x\n", tp->HwSuppSerDesPhyVer);
+        seq_printf(m, "NicCustLedValue\t0x%x\n", tp->NicCustLedValue);
+        seq_printf(m, "RequiredSecLanDonglePatch\t0x%x\n", tp->RequiredSecLanDonglePatch);
+        seq_printf(m, "HwSuppDashVer\t0x%x\n", tp->HwSuppDashVer);
+        seq_printf(m, "DASH\t0x%x\n", tp->DASH);
+        seq_printf(m, "dash_printer_enabled\t0x%x\n", tp->dash_printer_enabled);
+        seq_printf(m, "HwSuppKCPOffloadVer\t0x%x\n", tp->HwSuppKCPOffloadVer);
+        seq_printf(m, "speed_mode\t0x%x\n", speed_mode);
+        seq_printf(m, "duplex_mode\t0x%x\n", duplex_mode);
+        seq_printf(m, "autoneg_mode\t0x%x\n", autoneg_mode);
+        seq_printf(m, "advertising_mode\t0x%x\n", advertising_mode);
+        seq_printf(m, "aspm\t0x%x\n", aspm);
+        seq_printf(m, "s5wol\t0x%x\n", s5wol);
+        seq_printf(m, "s5_keep_curr_mac\t0x%x\n", s5_keep_curr_mac);
+        seq_printf(m, "eee_enable\t0x%x\n", tp->eee.eee_enabled);
+        seq_printf(m, "hwoptimize\t0x%lx\n", hwoptimize);
+        seq_printf(m, "proc_init_num\t0x%x\n", proc_init_num);
+        seq_printf(m, "s0_magic_packet\t0x%x\n", s0_magic_packet);
+        seq_printf(m, "disable_wol_support\t0x%x\n", disable_wol_support);
+        seq_printf(m, "HwSuppMagicPktVer\t0x%x\n", tp->HwSuppMagicPktVer);
+        seq_printf(m, "HwSuppUpsVer\t0x%x\n", tp->HwSuppUpsVer);
+        seq_printf(m, "HwSuppEsdVer\t0x%x\n", tp->HwSuppEsdVer);
+        seq_printf(m, "HwSuppCheckPhyDisableModeVer\t0x%x\n", tp->HwSuppCheckPhyDisableModeVer);
+        seq_printf(m, "HwPkgDet\t0x%x\n", tp->HwPkgDet);
+        seq_printf(m, "InitRxDescType\t0x%x\n", tp->InitRxDescType);
+        seq_printf(m, "RxDescLength\t0x%x\n", tp->RxDescLength);
+        seq_printf(m, "num_rx_rings\t0x%x\n", tp->num_rx_rings);
+        seq_printf(m, "num_tx_rings\t0x%x\n", tp->num_tx_rings);
+        seq_printf(m, "tot_rx_rings\t0x%x\n", rtl8168_tot_rx_rings(tp));
+        seq_printf(m, "tot_tx_rings\t0x%x\n", rtl8168_tot_tx_rings(tp));
+        seq_printf(m, "HwSuppNumTxQueues\t0x%x\n", tp->HwSuppNumTxQueues);
+        seq_printf(m, "HwSuppNumRxQueues\t0x%x\n", tp->HwSuppNumRxQueues);
+        seq_printf(m, "num_hw_tot_en_rx_rings\t0x%x\n", tp->num_hw_tot_en_rx_rings);
+        seq_printf(m, "EnableRss\t0x%x\n", tp->EnableRss);
+        seq_printf(m, "min_irq_nvecs\t0x%x\n", tp->min_irq_nvecs);
+        seq_printf(m, "max_irq_nvecs\t0x%x\n", tp->max_irq_nvecs);
+        seq_printf(m, "irq_nvecs\t0x%x\n", tp->irq_nvecs);
+        seq_printf(m, "hw_supp_irq_nvecs\t0x%x\n", tp->hw_supp_irq_nvecs);
+        seq_printf(m, "ring_lib_enabled\t0x%x\n", tp->ring_lib_enabled);
+        seq_printf(m, "random_mac\t0x%x\n", tp->random_mac);
+        seq_printf(m, "org_mac_addr\t%pM\n", tp->org_mac_addr);
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
+        seq_printf(m, "perm_addr\t%pM\n", dev->perm_addr);
+#endif
+        seq_printf(m, "dev_addr\t%pM\n", dev->dev_addr);
+
+        rtnl_unlock();
+
+        seq_putc(m, '\n');
+        return 0;
+}
+
+static int proc_get_tally_counter(struct seq_file *m, void *v)
+{
+        struct net_device *dev = m->private;
+        struct rtl8168_private *tp = netdev_priv(dev);
+        struct rtl8168_counters *counters;
+        dma_addr_t paddr;
+
+        seq_puts(m, "\nDump Tally Counter\n");
+
+        rtnl_lock();
+
+        counters = tp->tally_vaddr;
+        paddr = tp->tally_paddr;
+        if (!counters) {
+                seq_puts(m, "\nDump Tally Counter Fail\n");
+                goto out_unlock;
+        }
+
+        rtl8168_dump_tally_counter(tp, paddr);
+
+        seq_puts(m, "Statistics\tValue\n----------\t-----\n");
+        seq_printf(m, "tx_packets\t%lld\n", le64_to_cpu(counters->tx_packets));
+        seq_printf(m, "rx_packets\t%lld\n", le64_to_cpu(counters->rx_packets));
+        seq_printf(m, "tx_errors\t%lld\n", le64_to_cpu(counters->tx_errors));
+        seq_printf(m, "rx_errors\t%d\n", le32_to_cpu(counters->rx_errors));
+        seq_printf(m, "rx_missed\t%d\n", le16_to_cpu(counters->rx_missed));
+        seq_printf(m, "align_errors\t%d\n", le16_to_cpu(counters->align_errors));
+        seq_printf(m, "tx_one_collision\t%d\n", le32_to_cpu(counters->tx_one_collision));
+        seq_printf(m, "tx_multi_collision\t%d\n", le32_to_cpu(counters->tx_multi_collision));
+        seq_printf(m, "rx_unicast\t%lld\n", le64_to_cpu(counters->rx_unicast));
+        seq_printf(m, "rx_broadcast\t%lld\n", le64_to_cpu(counters->rx_broadcast));
+        seq_printf(m, "rx_multicast\t%d\n", le32_to_cpu(counters->rx_multicast));
+        seq_printf(m, "tx_aborted\t%d\n", le16_to_cpu(counters->tx_aborted));
+        seq_printf(m, "tx_underrun\t%d\n", le16_to_cpu(counters->tx_underrun));
+
+out_unlock:
+        rtnl_unlock();
+
+        seq_putc(m, '\n');
+        return 0;
+}
+
+static int proc_get_registers(struct seq_file *m, void *v)
+{
+        struct net_device *dev = m->private;
+        int i, n, max = R8168_MAC_REGS_SIZE;
+        u8 byte_rd;
+        struct rtl8168_private *tp = netdev_priv(dev);
+        void __iomem *ioaddr = tp->mmio_addr;
+
+        seq_puts(m, "\nDump MAC Registers\n");
+        seq_puts(m, "Offset\tValue\n------\t-----\n");
+
+        rtnl_lock();
+
+        for (n = 0; n < max;) {
+                seq_printf(m, "\n0x%02x:\t", n);
+
+                for (i = 0; i < 16 && n < max; i++, n++) {
+                        byte_rd = readb(ioaddr + n);
+                        seq_printf(m, "%02x ", byte_rd);
+                }
+        }
+
+        rtnl_unlock();
+
+        seq_putc(m, '\n');
+        return 0;
+}
+
+static int proc_get_pcie_phy(struct seq_file *m, void *v)
+{
+        struct net_device *dev = m->private;
+        int i, n, max = R8168_EPHY_REGS_SIZE/2;
+        u16 word_rd;
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        seq_puts(m, "\nDump PCIE PHY\n");
+        seq_puts(m, "\nOffset\tValue\n------\t-----\n ");
+
+        rtnl_lock();
+
+        for (n = 0; n < max;) {
+                seq_printf(m, "\n0x%02x:\t", n);
+
+                for (i = 0; i < 8 && n < max; i++, n++) {
+                        word_rd = rtl8168_ephy_read(tp, n);
+                        seq_printf(m, "%04x ", word_rd);
+                }
+        }
+
+        rtnl_unlock();
+
+        seq_putc(m, '\n');
+        return 0;
+}
+
+static int proc_get_eth_phy(struct seq_file *m, void *v)
+{
+        struct net_device *dev = m->private;
+        int i, n, max = R8168_PHY_REGS_SIZE/2;
+        u16 word_rd;
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        seq_puts(m, "\nDump Ethernet PHY\n");
+        seq_puts(m, "\nOffset\tValue\n------\t-----\n ");
+
+        rtnl_lock();
+
+        seq_puts(m, "\n####################page 0##################\n ");
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        for (n = 0; n < max;) {
+                seq_printf(m, "\n0x%02x:\t", n);
+
+                for (i = 0; i < 8 && n < max; i++, n++) {
+                        word_rd = rtl8168_mdio_read(tp, n);
+                        seq_printf(m, "%04x ", word_rd);
+                }
+        }
+
+        rtnl_unlock();
+
+        seq_putc(m, '\n');
+        return 0;
+}
+
+static int proc_get_extended_registers(struct seq_file *m, void *v)
+{
+        struct net_device *dev = m->private;
+        int i, n, max = R8168_ERI_REGS_SIZE;
+        u32 dword_rd;
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_1:
+        case CFG_METHOD_2:
+        case CFG_METHOD_3:
+                /* RTL8168B does not support Extend GMAC */
+                seq_puts(m, "\nNot Support Dump Extended Registers\n");
+                return 0;
+        }
+
+        seq_puts(m, "\nDump Extended Registers\n");
+        seq_puts(m, "\nOffset\tValue\n------\t-----\n ");
+
+        rtnl_lock();
+
+        for (n = 0; n < max;) {
+                seq_printf(m, "\n0x%02x:\t", n);
+
+                for (i = 0; i < 4 && n < max; i++, n+=4) {
+                        dword_rd = rtl8168_eri_read(tp, n, 4, ERIAR_ExGMAC);
+                        seq_printf(m, "%08x ", dword_rd);
+                }
+        }
+
+        rtnl_unlock();
+
+        seq_putc(m, '\n');
+        return 0;
+}
+
+static int proc_get_pci_registers(struct seq_file *m, void *v)
+{
+        struct net_device *dev = m->private;
+        int i, n, max = R8168_PCI_REGS_SIZE;
+        u32 dword_rd;
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        seq_puts(m, "\nDump PCI Registers\n");
+        seq_puts(m, "\nOffset\tValue\n------\t-----\n ");
+
+        rtnl_lock();
+
+        for (n = 0; n < max;) {
+                seq_printf(m, "\n0x%03x:\t", n);
+
+                for (i = 0; i < 4 && n < max; i++, n+=4) {
+                        pci_read_config_dword(tp->pci_dev, n, &dword_rd);
+                        seq_printf(m, "%08x ", dword_rd);
+                }
+        }
+
+        n = 0x110;
+        pci_read_config_dword(tp->pci_dev, n, &dword_rd);
+        seq_printf(m, "\n0x%03x:\t%08x ", n, dword_rd);
+        n = 0x70c;
+        pci_read_config_dword(tp->pci_dev, n, &dword_rd);
+        seq_printf(m, "\n0x%03x:\t%08x ", n, dword_rd);
+
+        rtnl_unlock();
+
+        seq_putc(m, '\n');
+        return 0;
+}
+
+static int proc_get_cable_info(struct seq_file *m, void *v)
+{
+        int i;
+        u16 status;
+        int cp_status[RTL8168_CP_NUM] = {0};
+        u16 cp_len[RTL8168_CP_NUM] = {0};
+        struct net_device *dev = m->private;
+        struct rtl8168_private *tp = netdev_priv(dev);
+        const char *pair_str[RTL8168_CP_NUM] = {"1-2", "3-6", "4-5", "7-8"};
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_30:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                /* support */
+                break;
+        default:
+                return -EOPNOTSUPP;
+        }
+
+        rtnl_lock();
+
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        if (rtl8168_mdio_read(tp, MII_BMCR) & BMCR_PDOWN) {
+                rtnl_unlock();
+                return -EIO;
+        }
+
+        status = RTL_R8(tp, PHYstatus);
+        if (status & LinkStatus)
+                seq_printf(m, "\nlink speed:%d",
+                           rtl8168_convert_link_speed(status));
+        else
+                seq_puts(m, "\nlink status:off");
+
+        rtl8168_get_cp_len(tp, cp_len);
+
+        rtl8168_vcd_test(tp);
+
+        rtl8168_get_cp_status(tp, cp_status);
+
+        seq_puts(m, "\npair\tlength\tstatus   \tpp\n");
+
+        for (i =0; i<RTL8168_CP_NUM; i++) {
+                seq_printf(m, "%s\t%d\t%s\t",
+                           pair_str[i], cp_len[i],
+                           rtl8168_get_cp_status_string(cp_status[i]));
+                if (cp_status[i] == rtl8168_cp_normal)
+                        seq_printf(m, "none\n");
+                else
+                        seq_printf(m, "%dm\n", rtl8168_get_cp_pp(tp, i));
+        }
+
+        tp->phy_reset_enable(dev);
+
+        rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
+
+        rtnl_unlock();
+
+        seq_putc(m, '\n');
+        return 0;
+}
+
+static int proc_dump_rx_desc(struct seq_file *m, void *v)
+{
+        int i;
+        u32 *pdword;
+        struct net_device *dev = m->private;
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        if (!tp->RxDescArray)
+                return -EOPNOTSUPP;
+
+        rtnl_lock();
+
+        seq_printf(m, "\ndump rx desc:%d\n", tp->num_rx_desc);
+
+        pdword = (u32*)tp->RxDescArray;
+        for (i=0; i<(tp->RxDescAllocSize/4); i++) {
+                if (!(i % 4))
+                        seq_printf(m, "\n%04x ", i);
+                seq_printf(m, "%08x ", pdword[i]);
+        }
+
+        rtnl_unlock();
+
+        seq_putc(m, '\n');
+        return 0;
+}
+
+static int proc_dump_rx_desc_2(struct seq_file *m, void *v)
+{
+        int i, j, k;
+        u32 *pdword;
+        struct net_device *dev = m->private;
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        if (!tp->RxDescArray)
+                return -EOPNOTSUPP;
+
+        rtnl_lock();
+
+        for (k=0; k<tp->num_hw_tot_en_rx_rings; k++) {
+                seq_printf(m, "\ndump Q%d rx desc:%d\n", k, tp->num_rx_desc);
+                for (j=0; j<tp->num_rx_desc; j++) {
+                        pdword = (u32*)rtl8168_get_rxdesc(tp,
+                                                          tp->RxDescArray,
+                                                          j, k);
+                        for (i=0; i<(tp->RxDescLength/4); i++) {
+                                if (!(i % 4))
+                                        seq_printf(m, "\n%04llx ",
+                                                   ((u64)pdword + (i * 4) -
+                                                    (u64)tp->RxDescArray));
+                                seq_printf(m, "%08x ", pdword[i]);
+                        }
+                }
+
+                seq_putc(m, '\n');
+        }
+
+        rtnl_unlock();
+
+        seq_putc(m, '\n');
+        return 0;
+}
+
+void _proc_dump_tx_desc(struct seq_file *m, struct TxDesc *desc_base,
+                        u32 alloc_size, u32 num_desc)
+{
+        int i;
+        u32 *pdword;
+
+        if (desc_base == NULL ||
+            alloc_size == 0 ||
+            num_desc == 0)
+                return;
+
+        pdword = (u32*)desc_base;
+        for (i=0; i<(alloc_size/4); i++) {
+                if (!(i % 4))
+                        seq_printf(m, "\n%04x ", i);
+                seq_printf(m, "%08x ", pdword[i]);
+        }
+
+        seq_putc(m, '\n');
+        return;
+}
+
+static int proc_dump_tx_desc(struct seq_file *m, void *v)
+{
+        int i;
+        struct net_device *dev = m->private;
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        rtnl_lock();
+
+        for (i=0; i<tp->HwSuppNumTxQueues; i++) {
+                struct rtl8168_tx_ring *ring = &tp->tx_ring[i];
+                if (!ring->TxDescArray)
+                        continue;
+                seq_printf(m, "\ndump Q%d tx desc:%d\n", i, ring->num_tx_desc);
+                _proc_dump_tx_desc(m, ring->TxDescArray,
+                                   ring->TxDescAllocSize,
+                                   ring->num_tx_desc);
+        }
+
+#ifdef ENABLE_LIB_SUPPORT
+        for (i=0; i<tp->HwSuppNumTxQueues; i++) {
+                struct rtl8168_ring *ring = &tp->lib_tx_ring[i];
+                if (!ring->desc_addr)
+                        continue;
+                seq_printf(m, "\ndump lib Q%d tx desc:%d\n", i, ring->ring_size);
+                _proc_dump_tx_desc(m, ring->desc_addr,
+                                   ring->desc_size,
+                                   ring->ring_size);
+        }
+#endif //ENABLE_LIB_SUPPORT
+
+        rtnl_unlock();
+
+        seq_putc(m, '\n');
+        return 0;
+}
+
+static int proc_dump_msix_tbl(struct seq_file *m, void *v)
+{
+        int i, j;
+        struct net_device *dev = m->private;
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_1 ... CFG_METHOD_8:
+                return -EOPNOTSUPP;
+        default:
+                break;
+        }
+
+        rtnl_lock();
+
+        seq_printf(m, "\ndump MSI-X Table. Total Entry %d. \n",
+                   tp->hw_supp_irq_nvecs);
+
+        for (i=0; i<tp->hw_supp_irq_nvecs; i++) {
+                seq_printf(m, "\n%04x ", i);
+                for (j=0; j<4; j++)
+                        seq_printf(m, "%08x ",
+                                   rtl8168_eri_read(
+                                           tp, i*0x10 + 4 * j, 4,
+                                           ERIAR_MSIX));
+        }
+
+        rtnl_unlock();
+
+        seq_putc(m, '\n');
+        return 0;
+}
+#else
+
+static int proc_get_driver_variable(char *page, char **start,
+                                    off_t offset, int count,
+                                    int *eof, void *data)
+{
+        struct net_device *dev = data;
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int len = 0;
+
+        len += snprintf(page + len, count - len,
+                        "\nDump Driver Driver\n");
+
+        rtnl_lock();
+
+        len += snprintf(page + len, count - len,
+                        "Variable\tValue\n----------\t-----\n");
+
+        len += snprintf(page + len, count - len,
+                        "MODULENAME\t%s\n"
+                        "driver version\t%s\n"
+                        "chipset\t%d\n"
+                        "chipset_name\t%s\n"
+                        "mtu\t%d\n"
+                        "num_rx_desc\t0x%x\n"
+                        "cur_rx0\t0x%x\n"
+                        "dirty_rx0\t0x%x\n"
+                        "rdu0\t0x%x\n"
+                        "cur_rx1\t0x%x\n"
+                        "dirty_rx1\t0x%x\n"
+                        "rdu1\t0x%x\n"
+                        "cur_rx2\t0x%x\n"
+                        "dirty_rx2\t0x%x\n"
+                        "rdu2\t0x%x\n"
+                        "cur_rx3\t0x%x\n"
+                        "dirty_rx3\t0x%x\n"
+                        "rdu3\t0x%x\n"
+                        "rx_fifo_of\t0x%x\n"
+                        "num_tx_desc\t0x%x\n"
+                        "cur_tx0\t0x%x\n"
+                        "dirty_tx0\t0x%x\n"
+                        "tdu0\t0x%x\n"
+                        "cur_tx1\t0x%x\n"
+                        "dirty_tx1\t0x%x\n"
+                        "tdu0\t1x%x\n"
+                        "rx_buf_sz\t0x%x\n"
+                        "esd_flag\t0x%x\n"
+                        "pci_cfg_is_read\t0x%x\n"
+                        "rtl8168_rx_config\t0x%x\n"
+                        "cp_cmd\t0x%x\n"
+                        "intr_mask\t0x%x\n"
+                        "timer_intr_mask\t0x%x\n"
+                        "wol_enabled\t0x%x\n"
+                        "wol_opts\t0x%x\n"
+                        "efuse_ver\t0x%x\n"
+                        "eeprom_type\t0x%x\n"
+                        "autoneg\t0x%x\n"
+                        "duplex\t0x%x\n"
+                        "speed\t%d\n"
+                        "advertising\t0x%x\n"
+                        "eeprom_len\t0x%x\n"
+                        "cur_page\t0x%x\n"
+                        "bios_setting\t0x%x\n"
+                        "features\t0x%x\n"
+                        "org_pci_offset_99\t0x%x\n"
+                        "org_pci_offset_180\t0x%x\n"
+                        "issue_offset_99_event\t0x%x\n"
+                        "org_pci_offset_80\t0x%x\n"
+                        "org_pci_offset_81\t0x%x\n"
+                        "use_timer_interrrupt\t0x%x\n"
+                        "HwIcVerUnknown\t0x%x\n"
+                        "NotWrRamCodeToMicroP\t0x%x\n"
+                        "NotWrMcuPatchCode\t0x%x\n"
+                        "HwHasWrRamCodeToMicroP\t0x%x\n"
+                        "sw_ram_code_ver\t0x%x\n"
+                        "hw_ram_code_ver\t0x%x\n"
+                        "rtk_enable_diag\t0x%x\n"
+                        "ShortPacketSwChecksum\t0x%x\n"
+                        "UseSwPaddingShortPkt\t0x%x\n"
+                        "RequireAdcBiasPatch\t0x%x\n"
+                        "AdcBiasPatchIoffset\t0x%x\n"
+                        "RequireAdjustUpsTxLinkPulseTiming\t0x%x\n"
+                        "SwrCnt1msIni\t0x%x\n"
+                        "HwSuppNowIsOobVer\t0x%x\n"
+                        "HwFiberModeVer\t0x%x\n"
+                        "HwFiberStat\t0x%x\n"
+                        "HwSwitchMdiToFiber\t0x%x\n"
+                        "HwSuppSerDesPhyVer\t0x%x\n"
+                        "NicCustLedValue\t0x%x\n"
+                        "RequiredSecLanDonglePatch\t0x%x\n"
+                        "HwSuppDashVer\t0x%x\n"
+                        "DASH\t0x%x\n"
+                        "dash_printer_enabled\t0x%x\n"
+                        "HwSuppKCPOffloadVer\t0x%x\n"
+                        "speed_mode\t0x%x\n"
+                        "duplex_mode\t0x%x\n"
+                        "autoneg_mode\t0x%x\n"
+                        "advertising_mode\t0x%x\n"
+                        "aspm\t0x%x\n"
+                        "s5wol\t0x%x\n"
+                        "s5_keep_curr_mac\t0x%x\n"
+                        "eee_enable\t0x%x\n"
+                        "hwoptimize\t0x%lx\n"
+                        "proc_init_num\t0x%x\n"
+                        "s0_magic_packet\t0x%x\n"
+                        "disable_wol_support\t0x%x\n"
+                        "HwSuppMagicPktVer\t0x%x\n"
+                        "HwSuppUpsVer\t0x%x\n"
+                        "HwSuppEsdVer\t0x%x\n"
+                        "HwSuppCheckPhyDisableModeVer\t0x%x\n"
+                        "HwPkgDet\t0x%x\n"
+                        "InitRxDescType\t0x%x\n"
+                        "RxDescLength\t0x%x\n"
+                        "num_rx_rings\t0x%x\n"
+                        "num_tx_rings\t0x%x\n"
+                        "tot_rx_rings\t0x%x\n"
+                        "tot_tx_rings\t0x%x\n"
+                        "tot_rx_desc_rings\t0x%x\n"
+                        "HwSuppNumTxQueues\t0x%x\n"
+                        "HwSuppNumRxQueues\t0x%x\n"
+                        "num_hw_tot_en_rx_rings\t0x%x\n"
+                        "EnableRss\t0x%x\n"
+                        "min_irq_nvecs\t0x%x\n"
+                        "max_irq_nvecs\t0x%x\n"
+                        "irq_nvecs\t0x%x\n"
+                        "hw_supp_irq_nvecs\t0x%x\n"
+                        "ring_lib_enabled\t0x%x\n"
+                        "random_mac\t0x%x\n"
+                        "org_mac_addr\t%pM\n"
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
+                        "perm_addr\t%pM\n"
+#endif
+                        "dev_addr\t%pM\n",
+                        MODULENAME,
+                        RTL8168_VERSION,
+                        tp->chipset,
+                        rtl_chip_info[tp->chipset].name,
+                        dev->mtu,
+                        tp->num_rx_desc,
+                        tp->rx_ring[0].cur_rx,
+                        tp->rx_ring[0].dirty_rx,
+                        tp->rx_ring[0].rdu,
+                        tp->rx_ring[1].cur_rx,
+                        tp->rx_ring[1].dirty_rx,
+                        tp->rx_ring[1].rdu,
+                        tp->rx_ring[2].cur_rx,
+                        tp->rx_ring[2].dirty_rx,
+                        tp->rx_ring[2].rdu,
+                        tp->rx_ring[3].cur_rx,
+                        tp->rx_ring[3].dirty_rx,
+                        tp->rx_ring[3].rdu,
+                        tp->rx_fifo_of,
+                        tp->tx_ring[0].num_tx_desc,
+                        tp->tx_ring[0].cur_tx,
+                        tp->tx_ring[0].dirty_tx,
+                        tp->tx_ring[0].tdu,
+                        tp->tx_ring[1].cur_tx,
+                        tp->tx_ring[1].dirty_tx,
+                        tp->tx_ring[1].tdu,
+                        tp->rx_buf_sz,
+                        tp->esd_flag,
+                        tp->pci_cfg_is_read,
+                        tp->rtl8168_rx_config,
+                        tp->cp_cmd,
+                        tp->intr_mask,
+                        tp->timer_intr_mask,
+                        tp->wol_enabled,
+                        tp->wol_opts,
+                        tp->efuse_ver,
+                        tp->eeprom_type,
+                        tp->autoneg,
+                        tp->duplex,
+                        tp->speed,
+                        tp->advertising,
+                        tp->eeprom_len,
+                        tp->cur_page,
+                        tp->bios_setting,
+                        tp->features,
+                        tp->org_pci_offset_99,
+                        tp->org_pci_offset_180,
+                        tp->issue_offset_99_event,
+                        tp->org_pci_offset_80,
+                        tp->org_pci_offset_81,
+                        tp->use_timer_interrrupt,
+                        tp->HwIcVerUnknown,
+                        tp->NotWrRamCodeToMicroP,
+                        tp->NotWrMcuPatchCode,
+                        tp->HwHasWrRamCodeToMicroP,
+                        tp->sw_ram_code_ver,
+                        tp->hw_ram_code_ver,
+                        tp->rtk_enable_diag,
+                        tp->ShortPacketSwChecksum,
+                        tp->UseSwPaddingShortPkt,
+                        tp->RequireAdcBiasPatch,
+                        tp->AdcBiasPatchIoffset,
+                        tp->RequireAdjustUpsTxLinkPulseTiming,
+                        tp->SwrCnt1msIni,
+                        tp->HwSuppNowIsOobVer,
+                        tp->HwFiberModeVer,
+                        tp->HwFiberStat,
+                        tp->HwSwitchMdiToFiber,
+                        tp->HwSuppSerDesPhyVer,
+                        tp->NicCustLedValue,
+                        tp->RequiredSecLanDonglePatch,
+                        tp->HwSuppDashVer,
+                        tp->DASH,
+                        tp->dash_printer_enabled,
+                        tp->HwSuppKCPOffloadVer,
+                        speed_mode,
+                        duplex_mode,
+                        autoneg_mode,
+                        advertising_mode,
+                        aspm,
+                        s5wol,
+                        s5_keep_curr_mac,
+                        tp->eee.eee_enabled,
+                        hwoptimize,
+                        proc_init_num,
+                        s0_magic_packet,
+                        disable_wol_support,
+                        tp->HwSuppMagicPktVer,
+                        tp->HwSuppUpsVer,
+                        tp->HwSuppEsdVer,
+                        tp->HwSuppCheckPhyDisableModeVer,
+                        tp->HwPkgDet,
+                        tp->InitRxDescType,
+                        tp->RxDescLength,
+                        tp->num_rx_rings,
+                        tp->num_tx_rings,
+                        rtl8168_tot_rx_rings(tp),
+                        rtl8168_tot_tx_rings(tp),
+                        tp->HwSuppNumTxQueues,
+                        tp->HwSuppNumRxQueues,
+                        tp->num_hw_tot_en_rx_rings,
+                        tp->EnableRss,
+                        tp->min_irq_nvecs,
+                        tp->max_irq_nvecs,
+                        tp->irq_nvecs,
+                        tp->hw_supp_irq_nvecs,
+                        tp->ring_lib_enabled,
+                        tp->random_mac,
+                        tp->org_mac_addr,
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
+                        dev->perm_addr,
+#endif
+                        dev->dev_addr
+                       );
+
+        rtnl_unlock();
+
+        len += snprintf(page + len, count - len, "\n");
+
+        *eof = 1;
+        return len;
+}
+
+static int proc_get_tally_counter(char *page, char **start,
+                                  off_t offset, int count,
+                                  int *eof, void *data)
+{
+        struct net_device *dev = data;
+        struct rtl8168_private *tp = netdev_priv(dev);
+        struct rtl8168_counters *counters;
+        dma_addr_t paddr;
+        u32 cmd;
+        u32 WaitCnt;
+        int len = 0;
+
+        len += snprintf(page + len, count - len,
+                        "\nDump Tally Counter\n");
+
+        rtnl_lock();
+
+        counters = tp->tally_vaddr;
+        paddr = tp->tally_paddr;
+        if (!counters) {
+                len += snprintf(page + len, count - len,
+                                "\nDump Tally Counter Fail\n");
+                goto out_unlock;
+        }
+
+        rtl8168_dump_tally_counter(tp, paddr);
+
+        len += snprintf(page + len, count - len,
+                        "Statistics\tValue\n----------\t-----\n");
+
+        len += snprintf(page + len, count - len,
+                        "tx_packets\t%lld\n"
+                        "rx_packets\t%lld\n"
+                        "tx_errors\t%lld\n"
+                        "rx_errors\t%d\n"
+                        "rx_missed\t%d\n"
+                        "align_errors\t%d\n"
+                        "tx_one_collision\t%d\n"
+                        "tx_multi_collision\t%d\n"
+                        "rx_unicast\t%lld\n"
+                        "rx_broadcast\t%lld\n"
+                        "rx_multicast\t%d\n"
+                        "tx_aborted\t%d\n"
+                        "tx_underrun\t%d\n",
+                        le64_to_cpu(counters->tx_packets),
+                        le64_to_cpu(counters->rx_packets),
+                        le64_to_cpu(counters->tx_errors),
+                        le32_to_cpu(counters->rx_errors),
+                        le16_to_cpu(counters->rx_missed),
+                        le16_to_cpu(counters->align_errors),
+                        le32_to_cpu(counters->tx_one_collision),
+                        le32_to_cpu(counters->tx_multi_collision),
+                        le64_to_cpu(counters->rx_unicast),
+                        le64_to_cpu(counters->rx_broadcast),
+                        le32_to_cpu(counters->rx_multicast),
+                        le16_to_cpu(counters->tx_aborted),
+                        le16_to_cpu(counters->tx_underrun)
+                       );
+
+        len += snprintf(page + len, count - len, "\n");
+out_unlock:
+        rtnl_unlock();
+
+        *eof = 1;
+        return len;
+}
+
+static int proc_get_registers(char *page, char **start,
+                              off_t offset, int count,
+                              int *eof, void *data)
+{
+        struct net_device *dev = data;
+        int i, n, max = R8168_MAC_REGS_SIZE;
+        u8 byte_rd;
+        struct rtl8168_private *tp = netdev_priv(dev);
+        void __iomem *ioaddr = tp->mmio_addr;
+        int len = 0;
+
+        len += snprintf(page + len, count - len,
+                        "\nDump MAC Registers\n"
+                        "Offset\tValue\n------\t-----\n");
+
+        rtnl_lock();
+
+        for (n = 0; n < max;) {
+                len += snprintf(page + len, count - len,
+                                "\n0x%02x:\t",
+                                n);
+
+                for (i = 0; i < 16 && n < max; i++, n++) {
+                        byte_rd = readb(ioaddr + n);
+                        len += snprintf(page + len, count - len,
+                                        "%02x ",
+                                        byte_rd);
+                }
+        }
+
+        rtnl_unlock();
+
+        len += snprintf(page + len, count - len, "\n");
+
+        *eof = 1;
+        return len;
+}
+
+static int proc_get_pcie_phy(char *page, char **start,
+                             off_t offset, int count,
+                             int *eof, void *data)
+{
+        struct net_device *dev = data;
+        int i, n, max = R8168_EPHY_REGS_SIZE/2;
+        u16 word_rd;
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int len = 0;
+
+        len += snprintf(page + len, count - len,
+                        "\nDump PCIE PHY\n"
+                        "Offset\tValue\n------\t-----\n");
+
+        rtnl_lock();
+
+        for (n = 0; n < max;) {
+                len += snprintf(page + len, count - len,
+                                "\n0x%02x:\t",
+                                n);
+
+                for (i = 0; i < 8 && n < max; i++, n++) {
+                        word_rd = rtl8168_ephy_read(tp, n);
+                        len += snprintf(page + len, count - len,
+                                        "%04x ",
+                                        word_rd);
+                }
+        }
+
+        rtnl_unlock();
+
+        len += snprintf(page + len, count - len, "\n");
+
+        *eof = 1;
+        return len;
+}
+
+static int proc_get_eth_phy(char *page, char **start,
+                            off_t offset, int count,
+                            int *eof, void *data)
+{
+        struct net_device *dev = data;
+        int i, n, max = R8168_PHY_REGS_SIZE/2;
+        u16 word_rd;
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int len = 0;
+
+        len += snprintf(page + len, count - len,
+                        "\nDump Ethernet PHY\n"
+                        "Offset\tValue\n------\t-----\n");
+
+        rtnl_lock();
+
+        len += snprintf(page + len, count - len,
+                        "\n####################page 0##################\n");
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        for (n = 0; n < max;) {
+                len += snprintf(page + len, count - len,
+                                "\n0x%02x:\t",
+                                n);
+
+                for (i = 0; i < 8 && n < max; i++, n++) {
+                        word_rd = rtl8168_mdio_read(tp, n);
+                        len += snprintf(page + len, count - len,
+                                        "%04x ",
+                                        word_rd);
+                }
+        }
+
+        rtnl_unlock();
+
+        len += snprintf(page + len, count - len, "\n");
+
+        *eof = 1;
+        return len;
+}
+
+static int proc_get_extended_registers(char *page, char **start,
+                                       off_t offset, int count,
+                                       int *eof, void *data)
+{
+        struct net_device *dev = data;
+        int i, n, max = R8168_ERI_REGS_SIZE;
+        u32 dword_rd;
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int len = 0;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_1:
+        case CFG_METHOD_2:
+        case CFG_METHOD_3:
+                /* RTL8168B does not support Extend GMAC */
+                len += snprintf(page + len, count - len,
+                                "\nNot Support Dump Extended Registers\n");
+
+                goto out;
+        }
+
+        len += snprintf(page + len, count - len,
+                        "\nDump Extended Registers\n"
+                        "Offset\tValue\n------\t-----\n");
+
+        rtnl_lock();
+
+        for (n = 0; n < max;) {
+                len += snprintf(page + len, count - len,
+                                "\n0x%02x:\t",
+                                n);
+
+                for (i = 0; i < 4 && n < max; i++, n+=4) {
+                        dword_rd = rtl8168_eri_read(tp, n, 4, ERIAR_ExGMAC);
+                        len += snprintf(page + len, count - len,
+                                        "%08x ",
+                                        dword_rd);
+                }
+        }
+
+        rtnl_unlock();
+
+        len += snprintf(page + len, count - len, "\n");
+out:
+        *eof = 1;
+        return len;
+}
+
+static int proc_get_pci_registers(char *page, char **start,
+                                  off_t offset, int count,
+                                  int *eof, void *data)
+{
+        struct net_device *dev = data;
+        int i, n, max = R8168_PCI_REGS_SIZE;
+        u32 dword_rd;
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int len = 0;
+
+        len += snprintf(page + len, count - len,
+                        "\nDump PCI Registers\n"
+                        "Offset\tValue\n------\t-----\n");
+
+        rtnl_lock();
+
+        for (n = 0; n < max;) {
+                len += snprintf(page + len, count - len,
+                                "\n0x%03x:\t",
+                                n);
+
+                for (i = 0; i < 4 && n < max; i++, n+=4) {
+                        pci_read_config_dword(tp->pci_dev, n, &dword_rd);
+                        len += snprintf(page + len, count - len,
+                                        "%08x ",
+                                        dword_rd);
+                }
+        }
+
+        n = 0x110;
+        pci_read_config_dword(tp->pci_dev, n, &dword_rd);
+        len += snprintf(page + len, count - len,
+                        "\n0x%03x:\t%08x ",
+                        n,
+                        dword_rd);
+        n = 0x70c;
+        pci_read_config_dword(tp->pci_dev, n, &dword_rd);
+        len += snprintf(page + len, count - len,
+                        "\n0x%03x:\t%08x ",
+                        n,
+                        dword_rd);
+
+        rtnl_unlock();
+
+        len += snprintf(page + len, count - len, "\n");
+
+        *eof = 1;
+        return len;
+}
+
+static int proc_get_cable_info(char *page, char **start,
+                               off_t offset, int count,
+                               int *eof, void *data)
+{
+        int i;
+        u16 status;
+        int len = 0;
+        struct net_device *dev = data;
+        int cp_status[RTL8168_CP_NUM] = {0};
+        u16 cp_len[RTL8168_CP_NUM] = {0};
+        struct rtl8168_private *tp = netdev_priv(dev);
+        const char *pair_str[RTL8168_CP_NUM] = {"1-2", "3-6", "4-5", "7-8"};
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_30:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                /* support */
+                break;
+        default:
+                return -EOPNOTSUPP;
+        }
+
+        rtnl_lock();
+
+        status = RTL_R8(tp, PHYstatus);
+        if (status & LinkStatus)
+                len += snprintf(page + len, count - len,
+                                "\nlink speed:%d",
+                                rtl8168_convert_link_speed(status));
+        else
+                len += snprintf(page + len, count - len,
+                                "\nlink status:off");
+
+        rtl8168_get_cp(tp, cp_len, cp_status);
+
+        len += snprintf(page + len, count - len,
+                        "\npair\tlength\tstatus   \tpp\n");
+
+        for (i =0; i<RTL8168_CP_NUM; i++) {
+                len += snprintf(page + len, count - len,
+                                "%s\t%d\t%s\t",
+                                pair_str[i], cp_len[i],
+                                rtl8168_get_cp_status_string(cp_status[i]));
+                if (cp_status[i] == rtl8168_cp_normal)
+                        len += snprintf(page + len, count - len, "none\n");
+                else
+                        len += snprintf(page + len, count - len, "%dm\n",
+                                        rtl8168_get_cp_pp(tp, i));
+        }
+
+        rtnl_unlock();
+
+        len += snprintf(page + len, count - len, "\n");
+
+        *eof = 1;
+        return len;
+}
+
+static int proc_dump_rx_desc(char *page, char **start,
+                             off_t offset, int count,
+                             int *eof, void *data)
+{
+        int i;
+        int len = 0;
+        u32 *pdword;
+        struct net_device *dev = data;
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        if (!tp->RxDescArray)
+                return -EOPNOTSUPP;
+
+        rtnl_lock();
+
+        len += snprintf(page + len, count - len,
+                        "\ndump rx desc:%d",
+                        tp->num_rx_desc);
+
+        pdword = (u32*)tp->RxDescArray;
+        for (i=0; i<(tp->RxDescAllocSize/4); i++) {
+                if (!(i % 4))
+                        len += snprintf(page + len, count - len,
+                                        "\n%04x ",
+                                        i);
+                len += snprintf(page + len, count - len,
+                                "%08x ",
+                                pdword[i]);
+        }
+
+        rtnl_unlock();
+
+        len += snprintf(page + len, count - len, "\n");
+
+        *eof = 1;
+
+        return len;
+}
+
+static int proc_dump_rx_desc_2(char *page, char **start,
+                               off_t offset, int count,
+                               int *eof, void *data)
+{
+        int i, j, k;
+        int len = 0;
+        u32 *pdword;
+        struct net_device *dev = data;
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        if (!tp->RxDescArray)
+                return -EOPNOTSUPP;
+
+        rtnl_lock();
+
+        for (k=0; k<tp->num_hw_tot_en_rx_rings; k++) {
+                len += snprintf(page + len, count - len,
+                                "\ndump Q%d rx desc:%d",
+                                k,
+                                tp->num_rx_desc);
+                for (j=0; j<tp->num_rx_desc; j++) {
+                        pdword = (u32*)rtl8168_get_rxdesc(tp,
+                                                          tp->RxDescArray,
+                                                          j, k);
+                        for (i=0; i<(tp->RxDescLength/4); i++) {
+                                if (!(i % 4))
+                                        len += snprintf(page + len, count - len,
+                                                        "\n%04llx ",
+                                                        ((u64)pdword + (i * 4) -
+                                                         (u64)tp->RxDescArray));
+                                len += snprintf(page + len, count - len,
+                                                "%08x ",
+                                                pdword[i]);
+                        }
+                }
+
+                len += snprintf(page + len, count - len, "\n");
+        }
+
+        rtnl_unlock();
+
+        len += snprintf(page + len, count - len, "\n");
+
+        *eof = 1;
+
+        return len;
+}
+
+void _proc_dump_tx_desc(char *page, int *page_len, int *count,
+                        struct TxDesc *desc_base,
+                        u32 alloc_size, u32 num_desc)
+{
+        int i;
+        int len = 0;
+        u32 *pdword;
+
+        if (desc_base == NULL ||
+            alloc_size == 0 ||
+            num_desc == 0)
+                return;
+
+        len = *page_len;
+        pdword = (u32*)desc_base;
+        for (i=0; i<(alloc_size/4); i++) {
+                if (!(i % 4))
+                        len += snprintf(page + len, *count - len,
+                                        "\n%04x ",
+                                        i);
+                len += snprintf(page + len, *count - len,
+                                "%08x ",
+                                pdword[i]);
+        }
+
+        len += snprintf(page + len, count - len, "\n");
+
+        *page_len = len;
+        return;
+}
+
+static int proc_dump_tx_desc(char *page, char **start,
+                             off_t offset, int count,
+                             int *eof, void *data)
+{
+        int i;
+        int len = 0;
+        u32 *pdword;
+        struct net_device *dev = data;
+        struct rtl8168_private *tp = netdev_priv(dev);
+        struct rtl8168_tx_ring *ring = &tp->tx_ring[0];
+
+        if (!ring->TxDescArray)
+                return -EOPNOTSUPP;
+
+        rtnl_lock();
+
+        for (i=0; i<tp->HwSuppNumTxQueues; i++) {
+                struct rtl8168_tx_ring *ring = &tp->tx_ring[i];
+                if (!ring->TxDescArray)
+                        continue;
+                len += snprintf(page + len, count - len,
+                                "\ndump Q%d tx desc:%d",
+                                i,
+                                ring->num_tx_desc);
+                _proc_dump_tx_desc(page, &len, &count,
+                                   ring->TxDescArray,
+                                   ring->TxDescAllocSize,
+                                   ring->num_tx_desc);
+        }
+
+#ifdef ENABLE_LIB_SUPPORT
+        for (i=0; i<tp->HwSuppNumTxQueues; i++) {
+                struct rtl8168_ring *ring = &tp->lib_tx_ring[i];
+                if (!ring->desc_addr)
+                        continue;
+                len += snprintf(page + len, count - len,
+                                "\ndump lib Q%d tx desc:%d",
+                                i,
+                                ring->ring_size);
+                _proc_dump_tx_desc(page, &len, ring->desc_addr,
+                                   ring->desc_size,
+                                   ring->ring_size);
+        }
+#endif //ENABLE_LIB_SUPPORT
+
+        rtnl_unlock();
+
+        len += snprintf(page + len, count - len, "\n");
+
+        *eof = 1;
+
+        return len;
+}
+
+static int proc_dump_tx_desc(char *page, char **start,
+                             off_t offset, int count,
+                             int *eof, void *data)
+{
+        int i;
+        struct net_device *dev = m->private;
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_1 ... CFG_METHOD_8:
+                return -EOPNOTSUPP;
+        default:
+                break;
+        }
+
+        rtnl_lock();
+
+        len += snprintf(page + len, count - len,
+                        "\ndump MSI-X Table. Total Entry %d. \n",
+                        R8168_MAX_MSIX_VEC);
+
+        for (i=0; i<R8168_MAX_MSIX_VEC; i++) {
+                len += snprintf(page + len, count - len,
+                                "\n%04x ",
+                                i);
+                len += snprintf(page + len, count - len,
+                                "%08x ",
+                                rtl8168_eri_read(tp, i*0x10, 4,
+                                                 ERIAR_MSIX));
+                len += snprintf(page + len, count - len,
+                                "%08x ",
+                                rtl8168_eri_read(tp, i*0x10 + 4, 4,
+                                                 ERIAR_MSIX));
+                len += snprintf(page + len, count - len,
+                                "%08x ",
+                                rtl8168_eri_read(tp, i*0x10 + 8, 4,
+                                                 ERIAR_MSIX));
+                len += snprintf(page + len, count - len,
+                                "%08x ",
+                                rtl8168_eri_read(tp, i*0x10 + 12, 4,
+                                                 ERIAR_MSIX));
+        }
+
+        rtnl_unlock();
+
+        len += snprintf(page + len, count - len, "\n");
+
+        *eof = 1;
+
+        return len;
+}
+
+static int proc_dump_msix_tbl(char *page, char **start,
+                              off_t offset, int count,
+                              int *eof, void *data)
+{
+        int i, j;
+        int len = 0;
+        struct net_device *dev = data;
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        rtnl_lock();
+
+        len += snprintf(page + len, count - len,
+                        "\ndump MSI-X Table. Total Entry %d. \n",
+                        tp->hw_supp_irq_nvecs);
+
+        for (i=0; i<tp->hw_supp_irq_nvecs; i++) {
+                len += snprintf(page + len, count - len,
+                                "\n%04x ", i);
+                for (j=0; j<4; j++)
+                        len += snprintf(page + len, count - len, "%08x ",
+                                        rtl8168_eri_read(tp, i*0x10 + 4*j, 4,
+                                                         ERIAR_MSIX));
+        }
+
+        rtnl_unlock();
+
+        len += snprintf(page + len, count - len, "\n");
+
+        *eof = 1;
+        return 0;
+}
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
+
+static void rtl8168_proc_module_init(void)
+{
+        //create /proc/net/r8168
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)
+        rtl8168_proc = proc_mkdir(MODULENAME, init_net.proc_net);
+#else
+        rtl8168_proc = proc_mkdir(MODULENAME, proc_net);
+#endif
+        if (!rtl8168_proc)
+                dprintk("cannot create %s proc entry \n", MODULENAME);
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
+/*
+ * seq_file wrappers for procfile show routines.
+ */
+static int rtl8168_proc_open(struct inode *inode, struct file *file)
+{
+        struct net_device *dev = proc_get_parent_data(inode);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+        int (*show)(struct seq_file *, void *) = pde_data(inode);
+#else
+        int (*show)(struct seq_file *, void *) = PDE_DATA(inode);
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+
+        return single_open(file, show, dev);
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0)
+static const struct proc_ops rtl8168_proc_fops = {
+        .proc_open           = rtl8168_proc_open,
+        .proc_read           = seq_read,
+        .proc_lseek          = seq_lseek,
+        .proc_release        = single_release,
+};
+#else
+static const struct file_operations rtl8168_proc_fops = {
+        .open           = rtl8168_proc_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+#endif
+
+#endif
+
+/*
+ * Table of proc files we need to create.
+ */
+struct rtl8168_proc_file {
+        char name[12];
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
+        int (*show)(struct seq_file *, void *);
+#else
+        int (*show)(char *, char **, off_t, int, int *, void *);
+#endif
+};
+
+static const struct rtl8168_proc_file rtl8168_proc_files[] = {
+        { "driver_var", &proc_get_driver_variable },
+        { "tally", &proc_get_tally_counter },
+        { "registers", &proc_get_registers },
+        { "pcie_phy", &proc_get_pcie_phy },
+        { "eth_phy", &proc_get_eth_phy },
+        { "ext_regs", &proc_get_extended_registers },
+        { "pci_regs", &proc_get_pci_registers },
+        { "cdt", &proc_get_cable_info },
+        { "tx_desc", &proc_dump_tx_desc },
+        { "rx_desc", &proc_dump_rx_desc },
+        { "rx_desc_2", &proc_dump_rx_desc_2 },
+        { "msix_tbl", &proc_dump_msix_tbl },
+        { "" }
+};
+
+static void rtl8168_proc_init(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        const struct rtl8168_proc_file *f;
+        struct proc_dir_entry *dir;
+
+        if (rtl8168_proc && !tp->proc_dir) {
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
+                dir = proc_mkdir_data(dev->name, 0, rtl8168_proc, dev);
+                if (!dir) {
+                        printk("Unable to initialize /proc/net/%s/%s\n",
+                               MODULENAME, dev->name);
+                        return;
+                }
+
+                tp->proc_dir = dir;
+                proc_init_num++;
+
+                for (f = rtl8168_proc_files; f->name[0]; f++) {
+                        if (!proc_create_data(f->name, S_IFREG | S_IRUGO, dir,
+                                              &rtl8168_proc_fops, f->show)) {
+                                printk("Unable to initialize "
+                                       "/proc/net/%s/%s/%s\n",
+                                       MODULENAME, dev->name, f->name);
+                                return;
+                        }
+                }
+#else
+                dir = proc_mkdir(dev->name, rtl8168_proc);
+                if (!dir) {
+                        printk("Unable to initialize /proc/net/%s/%s\n",
+                               MODULENAME, dev->name);
+                        return;
+                }
+
+                tp->proc_dir = dir;
+                proc_init_num++;
+
+                for (f = rtl8168_proc_files; f->name[0]; f++) {
+                        if (!create_proc_read_entry(f->name, S_IFREG | S_IRUGO,
+                                                    dir, f->show, dev)) {
+                                printk("Unable to initialize "
+                                       "/proc/net/%s/%s/%s\n",
+                                       MODULENAME, dev->name, f->name);
+                                return;
+                        }
+                }
+#endif
+        }
+}
+
+static void rtl8168_proc_remove(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        if (tp->proc_dir) {
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
+                remove_proc_subtree(dev->name, rtl8168_proc);
+                proc_init_num--;
+
+#else
+                const struct rtl8168_proc_file *f;
+                struct rtl8168_private *tp = netdev_priv(dev);
+
+                for (f = rtl8168_proc_files; f->name[0]; f++)
+                        remove_proc_entry(f->name, tp->proc_dir);
+
+                remove_proc_entry(dev->name, rtl8168_proc);
+                proc_init_num--;
+#endif
+                tp->proc_dir = NULL;
+        }
+}
+
+#endif //ENABLE_R8168_PROCFS
+
+static inline u16 map_phy_ocp_addr(u16 PageNum, u8 RegNum)
+{
+        u16 OcpPageNum = 0;
+        u8 OcpRegNum = 0;
+        u16 OcpPhyAddress = 0;
+
+        if ( PageNum == 0 ) {
+                OcpPageNum = OCP_STD_PHY_BASE_PAGE + ( RegNum / 8 );
+                OcpRegNum = 0x10 + ( RegNum % 8 );
+        } else {
+                OcpPageNum = PageNum;
+                OcpRegNum = RegNum;
+        }
+
+        OcpPageNum <<= 4;
+
+        if ( OcpRegNum < 16 ) {
+                OcpPhyAddress = 0;
+        } else {
+                OcpRegNum -= 16;
+                OcpRegNum <<= 1;
+
+                OcpPhyAddress = OcpPageNum + OcpRegNum;
+        }
+
+
+        return OcpPhyAddress;
+}
+
+static void mdio_real_direct_write_phy_ocp(struct rtl8168_private *tp,
+                u32 RegAddr,
+                u32 value)
+{
+        u32 data32;
+        int i;
+
+        if (tp->HwSuppPhyOcpVer == 0)
+                goto out;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
+        WARN_ON_ONCE(RegAddr % 2);
+#endif
+        data32 = RegAddr/2;
+        data32 <<= OCPR_Addr_Reg_shift;
+        data32 |= OCPR_Write | value;
+
+        RTL_W32(tp, PHYOCP, data32);
+        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
+                udelay(R8168_CHANNEL_WAIT_TIME);
+
+                if (!(RTL_R32(tp, PHYOCP) & OCPR_Flag))
+                        break;
+        }
+out:
+        return;
+}
+
+static void mdio_direct_write_phy_ocp(struct rtl8168_private *tp,
+                                      u16 RegAddr,
+                                      u16 value)
+{
+        if (tp->rtk_enable_diag)
+                return;
+
+        mdio_real_direct_write_phy_ocp(tp, RegAddr, value);
+}
+
+static void rtl8168_mdio_write_phy_ocp(struct rtl8168_private *tp,
+                                       u16 PageNum,
+                                       u32 RegAddr,
+                                       u32 value)
+{
+        u16 ocp_addr;
+
+        if (tp->rtk_enable_diag)
+                return;
+
+        ocp_addr = map_phy_ocp_addr(PageNum, RegAddr);
+
+        mdio_direct_write_phy_ocp(tp, ocp_addr, value);
+}
+
+static void rtl8168_mdio_real_write_phy_ocp(struct rtl8168_private *tp,
+                u16 PageNum,
+                u32 RegAddr,
+                u32 value)
+{
+        u16 ocp_addr;
+
+        ocp_addr = map_phy_ocp_addr(PageNum, RegAddr);
+
+        mdio_real_direct_write_phy_ocp(tp, ocp_addr, value);
+}
+
+static void mdio_real_write(struct rtl8168_private *tp,
+                            u32 RegAddr,
+                            u32 value)
+{
+        int i;
+
+        if (RegAddr == 0x1F) {
+                tp->cur_page = value;
+        }
+
+        if (tp->mcfg == CFG_METHOD_11) {
+                RTL_W32(tp, OCPDR, OCPDR_Write |
+                        (RegAddr & OCPDR_Reg_Mask) << OCPDR_GPHY_Reg_shift |
+                        (value & OCPDR_Data_Mask));
+                RTL_W32(tp, OCPAR, OCPAR_GPHY_Write);
+                RTL_W32(tp, EPHY_RXER_NUM, 0);
+
+                for (i = 0; i < 100; i++) {
+                        mdelay(1);
+                        if (!(RTL_R32(tp, OCPAR) & OCPAR_Flag))
+                                break;
+                }
+        } else {
+                if (tp->HwSuppPhyOcpVer > 0) {
+                        if (RegAddr == 0x1F) {
+                                return;
+                        }
+                        rtl8168_mdio_real_write_phy_ocp(tp, tp->cur_page, RegAddr, value);
+                } else {
+                        if (tp->mcfg == CFG_METHOD_12 || tp->mcfg == CFG_METHOD_13)
+                                RTL_W32(tp, 0xD0, RTL_R32(tp, 0xD0) & ~0x00020000);
+
+                        RTL_W32(tp, PHYAR, PHYAR_Write |
+                                (RegAddr & PHYAR_Reg_Mask) << PHYAR_Reg_shift |
+                                (value & PHYAR_Data_Mask));
+
+                        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
+                                udelay(R8168_CHANNEL_WAIT_TIME);
+
+                                /* Check if the RTL8168 has completed writing to the specified MII register */
+                                if (!(RTL_R32(tp, PHYAR) & PHYAR_Flag)) {
+                                        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
+                                        break;
+                                }
+                        }
+
+                        if (tp->mcfg == CFG_METHOD_12 || tp->mcfg == CFG_METHOD_13)
+                                RTL_W32(tp, 0xD0, RTL_R32(tp, 0xD0) | 0x00020000);
+                }
+        }
+}
+
+void rtl8168_mdio_write(struct rtl8168_private *tp,
+                        u16 RegAddr,
+                        u16 value)
+{
+        if (tp->rtk_enable_diag)
+                return;
+
+        mdio_real_write(tp, RegAddr, value);
+}
+
+void rtl8168_mdio_prot_write(struct rtl8168_private *tp,
+                             u32 RegAddr,
+                             u32 value)
+{
+        mdio_real_write(tp, RegAddr, value);
+}
+
+void rtl8168_mdio_prot_direct_write_phy_ocp(struct rtl8168_private *tp,
+                u32 RegAddr,
+                u32 value)
+{
+        mdio_real_direct_write_phy_ocp(tp, RegAddr, value);
+}
+
+static u32 mdio_real_direct_read_phy_ocp(struct rtl8168_private *tp,
+                u32 RegAddr)
+{
+        u32 data32;
+        int i, value = 0;
+
+        if (tp->HwSuppPhyOcpVer == 0)
+                goto out;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
+        WARN_ON_ONCE(RegAddr % 2);
+#endif
+        data32 = RegAddr/2;
+        data32 <<= OCPR_Addr_Reg_shift;
+
+        RTL_W32(tp, PHYOCP, data32);
+        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
+                udelay(R8168_CHANNEL_WAIT_TIME);
+
+                if (RTL_R32(tp, PHYOCP) & OCPR_Flag)
+                        break;
+        }
+        value = RTL_R32(tp, PHYOCP) & OCPDR_Data_Mask;
+
+out:
+        return value;
+}
+
+static u32 mdio_direct_read_phy_ocp(struct rtl8168_private *tp,
+                                    u16 RegAddr)
+{
+        if (tp->rtk_enable_diag)
+                return 0xffffffff;
+
+        return mdio_real_direct_read_phy_ocp(tp, RegAddr);
+}
+
+static u32 rtl8168_mdio_read_phy_ocp(struct rtl8168_private *tp,
+                                     u16 PageNum,
+                                     u32 RegAddr)
+{
+        u16 ocp_addr;
+
+        if (tp->rtk_enable_diag)
+                return 0xffffffff;
+
+        ocp_addr = map_phy_ocp_addr(PageNum, RegAddr);
+
+        return mdio_direct_read_phy_ocp(tp, ocp_addr);
+}
+
+static u32 rtl8168_mdio_real_read_phy_ocp(struct rtl8168_private *tp,
+                u16 PageNum,
+                u32 RegAddr)
+{
+        u16 ocp_addr;
+
+        ocp_addr = map_phy_ocp_addr(PageNum, RegAddr);
+
+        return mdio_real_direct_read_phy_ocp(tp, ocp_addr);
+}
+
+u32 mdio_real_read(struct rtl8168_private *tp,
+                   u32 RegAddr)
+{
+        int i, value = 0;
+
+        if (tp->mcfg==CFG_METHOD_11) {
+                RTL_W32(tp, OCPDR, OCPDR_Read |
+                        (RegAddr & OCPDR_Reg_Mask) << OCPDR_GPHY_Reg_shift);
+                RTL_W32(tp, OCPAR, OCPAR_GPHY_Write);
+                RTL_W32(tp, EPHY_RXER_NUM, 0);
+
+                for (i = 0; i < 100; i++) {
+                        mdelay(1);
+                        if (!(RTL_R32(tp, OCPAR) & OCPAR_Flag))
+                                break;
+                }
+
+                mdelay(1);
+                RTL_W32(tp, OCPAR, OCPAR_GPHY_Read);
+                RTL_W32(tp, EPHY_RXER_NUM, 0);
+
+                for (i = 0; i < 100; i++) {
+                        mdelay(1);
+                        if (RTL_R32(tp, OCPAR) & OCPAR_Flag)
+                                break;
+                }
+
+                value = RTL_R32(tp, OCPDR) & OCPDR_Data_Mask;
+        } else {
+                if (tp->HwSuppPhyOcpVer > 0) {
+                        value = rtl8168_mdio_real_read_phy_ocp(tp, tp->cur_page, RegAddr);
+                } else {
+                        if (tp->mcfg == CFG_METHOD_12 || tp->mcfg == CFG_METHOD_13)
+                                RTL_W32(tp, 0xD0, RTL_R32(tp, 0xD0) & ~0x00020000);
+
+                        RTL_W32(tp, PHYAR,
+                                PHYAR_Read | (RegAddr & PHYAR_Reg_Mask) << PHYAR_Reg_shift);
+
+                        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
+                                udelay(R8168_CHANNEL_WAIT_TIME);
+
+                                /* Check if the RTL8168 has completed retrieving data from the specified MII register */
+                                if (RTL_R32(tp, PHYAR) & PHYAR_Flag) {
+                                        value = RTL_R32(tp, PHYAR) & PHYAR_Data_Mask;
+                                        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
+                                        break;
+                                }
+                        }
+
+                        if (tp->mcfg == CFG_METHOD_12 || tp->mcfg == CFG_METHOD_13)
+                                RTL_W32(tp, 0xD0, RTL_R32(tp, 0xD0) | 0x00020000);
+                }
+        }
+
+        return value;
+}
+
+u32 rtl8168_mdio_read(struct rtl8168_private *tp,
+                      u16 RegAddr)
+{
+        if (tp->rtk_enable_diag)
+                return 0xffffffff;
+
+        return mdio_real_read(tp, RegAddr);
+}
+
+u32 rtl8168_mdio_prot_read(struct rtl8168_private *tp,
+                           u32 RegAddr)
+{
+        return mdio_real_read(tp, RegAddr);
+}
+
+u32 rtl8168_mdio_prot_direct_read_phy_ocp(struct rtl8168_private *tp,
+                u32 RegAddr)
+{
+        return mdio_real_direct_read_phy_ocp(tp, RegAddr);
+}
+
+static void ClearAndSetEthPhyBit(struct rtl8168_private *tp, u8  addr, u16 clearmask, u16 setmask)
+{
+        u16 PhyRegValue;
+
+
+        PhyRegValue = rtl8168_mdio_read(tp, addr);
+        PhyRegValue &= ~clearmask;
+        PhyRegValue |= setmask;
+        rtl8168_mdio_write(tp, addr, PhyRegValue);
+}
+
+void rtl8168_clear_eth_phy_bit(struct rtl8168_private *tp, u8 addr, u16 mask)
+{
+        ClearAndSetEthPhyBit(tp,
+                             addr,
+                             mask,
+                             0
+                            );
+}
+
+void rtl8168_set_eth_phy_bit(struct rtl8168_private *tp, u8  addr, u16  mask)
+{
+        ClearAndSetEthPhyBit(tp,
+                             addr,
+                             0,
+                             mask
+                            );
+}
+
+void rtl8168_mac_ocp_write(struct rtl8168_private *tp, u16 reg_addr, u16 value)
+{
+        u32 data32;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
+        WARN_ON_ONCE(reg_addr % 2);
+#endif
+
+        data32 = reg_addr/2;
+        data32 <<= OCPR_Addr_Reg_shift;
+        data32 += value;
+        data32 |= OCPR_Write;
+
+        RTL_W32(tp, MACOCP, data32);
+}
+
+u16 rtl8168_mac_ocp_read(struct rtl8168_private *tp, u16 reg_addr)
+{
+        u32 data32;
+        u16 data16 = 0;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
+        WARN_ON_ONCE(reg_addr % 2);
+#endif
+
+        data32 = reg_addr/2;
+        data32 <<= OCPR_Addr_Reg_shift;
+
+        RTL_W32(tp, MACOCP, data32);
+        data16 = (u16)RTL_R32(tp, MACOCP);
+
+        return data16;
+}
+
+#ifdef ENABLE_USE_FIRMWARE_FILE
+static void mac_mcu_write(struct rtl8168_private *tp, u16 reg, u16 value)
+{
+        if (reg == 0x1f) {
+                tp->ocp_base = value << 4;
+                return;
+        }
+
+        rtl8168_mac_ocp_write(tp, tp->ocp_base + reg, value);
+}
+
+static u32 mac_mcu_read(struct rtl8168_private *tp, u16 reg)
+{
+        return rtl8168_mac_ocp_read(tp, tp->ocp_base + reg);
+}
+#endif
+
+static void
+rtl8168_clear_and_set_mcu_ocp_bit(
+        struct rtl8168_private *tp,
+        u16   addr,
+        u16   clearmask,
+        u16   setmask
+)
+{
+        u16 RegValue;
+
+        RegValue = rtl8168_mac_ocp_read(tp, addr);
+        RegValue &= ~clearmask;
+        RegValue |= setmask;
+        rtl8168_mac_ocp_write(tp, addr, RegValue);
+}
+
+static void
+rtl8168_clear_mcu_ocp_bit(
+        struct rtl8168_private *tp,
+        u16   addr,
+        u16   mask
+)
+{
+        rtl8168_clear_and_set_mcu_ocp_bit(tp,
+                                          addr,
+                                          mask,
+                                          0
+                                         );
+}
+
+static void
+rtl8168_set_mcu_ocp_bit(
+        struct rtl8168_private *tp,
+        u16   addr,
+        u16   mask
+)
+{
+        rtl8168_clear_and_set_mcu_ocp_bit(tp,
+                                          addr,
+                                          0,
+                                          mask
+                                         );
+}
+
+static u32 real_ocp_read(struct rtl8168_private *tp, u16 addr, u8 len)
+{
+        int i, val_shift, shift = 0;
+        u32 value1 = 0, value2 = 0, mask;
+
+        if (len > 4 || len <= 0)
+                return -1;
+
+        while (len > 0) {
+                val_shift = addr % 4;
+                addr = addr & ~0x3;
+
+                RTL_W32(tp, OCPAR, (0x0F<<12) | (addr&0xFFF));
+
+                for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
+                        udelay(R8168_CHANNEL_WAIT_TIME);
+                        if (RTL_R32(tp, OCPAR) & OCPAR_Flag)
+                                break;
+                }
+
+                if (len == 1)       mask = (0xFF << (val_shift * 8)) & 0xFFFFFFFF;
+                else if (len == 2)  mask = (0xFFFF << (val_shift * 8)) & 0xFFFFFFFF;
+                else if (len == 3)  mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
+                else            mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
+
+                value1 = RTL_R32(tp, OCPDR) & mask;
+                value2 |= (value1 >> val_shift * 8) << shift * 8;
+
+                if (len <= 4 - val_shift) {
+                        len = 0;
+                } else {
+                        len -= (4 - val_shift);
+                        shift = 4 - val_shift;
+                        addr += 4;
+                }
+        }
+
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
+
+        return value2;
+}
+
+u32 rtl8168_ocp_read_with_oob_base_address(struct rtl8168_private *tp, u16 addr, u8 len, const u32 base_address)
+{
+        return rtl8168_eri_read_with_oob_base_address(tp, addr, len, ERIAR_OOB, base_address);
+}
+
+u32 rtl8168_ocp_read(struct rtl8168_private *tp, u16 addr, u8 len)
+{
+        u32 value = 0;
+
+        if (HW_DASH_SUPPORT_TYPE_2(tp))
+                value = rtl8168_ocp_read_with_oob_base_address(tp, addr, len, NO_BASE_ADDRESS);
+        else if (HW_DASH_SUPPORT_TYPE_3(tp))
+                value = rtl8168_ocp_read_with_oob_base_address(tp, addr, len, RTL8168FP_OOBMAC_BASE);
+        else
+                value = real_ocp_read(tp, addr, len);
+
+        return value;
+}
+
+static int real_ocp_write(struct rtl8168_private *tp, u16 addr, u8 len, u32 value)
+{
+        int i, val_shift, shift = 0;
+        u32 value1 = 0, mask;
+
+        if (len > 4 || len <= 0)
+                return -1;
+
+        while (len > 0) {
+                val_shift = addr % 4;
+                addr = addr & ~0x3;
+
+                if (len == 1)       mask = (0xFF << (val_shift * 8)) & 0xFFFFFFFF;
+                else if (len == 2)  mask = (0xFFFF << (val_shift * 8)) & 0xFFFFFFFF;
+                else if (len == 3)  mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
+                else            mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
+
+                value1 = rtl8168_ocp_read(tp, addr, 4) & ~mask;
+                value1 |= ((value << val_shift * 8) >> shift * 8);
+
+                RTL_W32(tp, OCPDR, value1);
+                RTL_W32(tp, OCPAR, OCPAR_Flag | (0x0F<<12) | (addr&0xFFF));
+
+                for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
+                        udelay(R8168_CHANNEL_WAIT_TIME);
+
+                        /* Check if the RTL8168 has completed ERI write */
+                        if (!(RTL_R32(tp, OCPAR) & OCPAR_Flag))
+                                break;
+                }
+
+                if (len <= 4 - val_shift) {
+                        len = 0;
+                } else {
+                        len -= (4 - val_shift);
+                        shift = 4 - val_shift;
+                        addr += 4;
+                }
+        }
+
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
+
+        return 0;
+}
+
+u32 rtl8168_ocp_write_with_oob_base_address(struct rtl8168_private *tp, u16 addr, u8 len, u32 value, const u32 base_address)
+{
+        return rtl8168_eri_write_with_oob_base_address(tp, addr, len, value, ERIAR_OOB, base_address);
+}
+
+void rtl8168_ocp_write(struct rtl8168_private *tp, u16 addr, u8 len, u32 value)
+{
+        if (HW_DASH_SUPPORT_TYPE_2(tp))
+                rtl8168_ocp_write_with_oob_base_address(tp, addr, len, value, NO_BASE_ADDRESS);
+        else if (HW_DASH_SUPPORT_TYPE_3(tp))
+                rtl8168_ocp_write_with_oob_base_address(tp, addr, len, value, RTL8168FP_OOBMAC_BASE);
+        else
+                real_ocp_write(tp, addr, len, value);
+}
+
+void rtl8168_oob_mutex_lock(struct rtl8168_private *tp)
+{
+        u8 reg_16, reg_a0;
+        u32 wait_cnt_0, wait_Cnt_1;
+        u16 ocp_reg_mutex_ib;
+        u16 ocp_reg_mutex_oob;
+        u16 ocp_reg_mutex_prio;
+
+        if (!tp->DASH)
+                return;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_11:
+        case CFG_METHOD_12:
+                ocp_reg_mutex_oob = 0x16;
+                ocp_reg_mutex_ib = 0x17;
+                ocp_reg_mutex_prio = 0x9C;
+                break;
+        case CFG_METHOD_13:
+                ocp_reg_mutex_oob = 0x06;
+                ocp_reg_mutex_ib = 0x07;
+                ocp_reg_mutex_prio = 0x9C;
+                break;
+        case CFG_METHOD_23:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        default:
+                ocp_reg_mutex_oob = 0x110;
+                ocp_reg_mutex_ib = 0x114;
+                ocp_reg_mutex_prio = 0x11C;
+                break;
+        }
+
+        rtl8168_ocp_write(tp, ocp_reg_mutex_ib, 1, BIT_0);
+        reg_16 = rtl8168_ocp_read(tp, ocp_reg_mutex_oob, 1);
+        wait_cnt_0 = 0;
+        while(reg_16) {
+                reg_a0 = rtl8168_ocp_read(tp, ocp_reg_mutex_prio, 1);
+                if (reg_a0) {
+                        rtl8168_ocp_write(tp, ocp_reg_mutex_ib, 1, 0x00);
+                        reg_a0 = rtl8168_ocp_read(tp, ocp_reg_mutex_prio, 1);
+                        wait_Cnt_1 = 0;
+                        while(reg_a0) {
+                                reg_a0 = rtl8168_ocp_read(tp, ocp_reg_mutex_prio, 1);
+
+                                wait_Cnt_1++;
+
+                                if (wait_Cnt_1 > 2000)
+                                        break;
+                        };
+                        rtl8168_ocp_write(tp, ocp_reg_mutex_ib, 1, BIT_0);
+
+                }
+                reg_16 = rtl8168_ocp_read(tp, ocp_reg_mutex_oob, 1);
+
+                wait_cnt_0++;
+
+                if (wait_cnt_0 > 2000)
+                        break;
+        };
+}
+
+void rtl8168_oob_mutex_unlock(struct rtl8168_private *tp)
+{
+        u16 ocp_reg_mutex_ib;
+        u16 ocp_reg_mutex_oob;
+        u16 ocp_reg_mutex_prio;
+
+        if (!tp->DASH)
+                return;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_11:
+        case CFG_METHOD_12:
+                ocp_reg_mutex_oob = 0x16;
+                ocp_reg_mutex_ib = 0x17;
+                ocp_reg_mutex_prio = 0x9C;
+                break;
+        case CFG_METHOD_13:
+                ocp_reg_mutex_oob = 0x06;
+                ocp_reg_mutex_ib = 0x07;
+                ocp_reg_mutex_prio = 0x9C;
+                break;
+        case CFG_METHOD_23:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        default:
+                ocp_reg_mutex_oob = 0x110;
+                ocp_reg_mutex_ib = 0x114;
+                ocp_reg_mutex_prio = 0x11C;
+                break;
+        }
+
+        rtl8168_ocp_write(tp, ocp_reg_mutex_prio, 1, BIT_0);
+        rtl8168_ocp_write(tp, ocp_reg_mutex_ib, 1, 0x00);
+}
+
+void rtl8168_oob_notify(struct rtl8168_private *tp, u8 cmd)
+{
+        rtl8168_eri_write(tp, 0xE8, 1, cmd, ERIAR_ExGMAC);
+
+        rtl8168_ocp_write(tp, 0x30, 1, 0x01);
+}
+
+static int rtl8168_check_dash(struct rtl8168_private *tp)
+{
+        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
+                if (rtl8168_ocp_read(tp, 0x128, 1) & BIT_0)
+                        return 1;
+                else
+                        return 0;
+        } else {
+                u32 reg;
+
+                if (tp->mcfg == CFG_METHOD_13)
+                        reg = 0xb8;
+                else
+                        reg = 0x10;
+
+                if (rtl8168_ocp_read(tp, reg, 2) & 0x00008000)
+                        return 1;
+                else
+                        return 0;
+        }
+}
+
+void rtl8168_dash2_disable_tx(struct rtl8168_private *tp)
+{
+        if (!tp->DASH)
+                return;
+
+        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
+                u16 WaitCnt;
+                u8 TmpUchar;
+
+                //Disable oob Tx
+                RTL_CMAC_W8(tp, CMAC_IBCR2, RTL_CMAC_R8(tp, CMAC_IBCR2) & ~( BIT_0 ));
+                WaitCnt = 0;
+
+                //wait oob tx disable
+                do {
+                        TmpUchar = RTL_CMAC_R8(tp, CMAC_IBISR0);
+
+                        if ( TmpUchar & ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE ) {
+                                break;
+                        }
+
+                        udelay( 50 );
+                        WaitCnt++;
+                } while(WaitCnt < 2000);
+
+                //Clear ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE
+                RTL_CMAC_W8(tp, CMAC_IBISR0, RTL_CMAC_R8(tp, CMAC_IBISR0) | ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE);
+        }
+}
+
+void rtl8168_dash2_enable_tx(struct rtl8168_private *tp)
+{
+        if (!tp->DASH)
+                return;
+
+        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
+                RTL_CMAC_W8(tp, CMAC_IBCR2, RTL_CMAC_R8(tp, CMAC_IBCR2) | BIT_0);
+        }
+}
+
+void rtl8168_dash2_disable_rx(struct rtl8168_private *tp)
+{
+        if (!tp->DASH)
+                return;
+
+        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
+                RTL_CMAC_W8(tp, CMAC_IBCR0, RTL_CMAC_R8(tp, CMAC_IBCR0) & ~( BIT_0 ));
+        }
+}
+
+void rtl8168_dash2_enable_rx(struct rtl8168_private *tp)
+{
+        if (!tp->DASH)
+                return;
+
+        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
+                RTL_CMAC_W8(tp, CMAC_IBCR0, RTL_CMAC_R8(tp, CMAC_IBCR0) | BIT_0);
+        }
+}
+
+static void rtl8168_dash2_disable_txrx(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
+                rtl8168_dash2_disable_tx( tp );
+                rtl8168_dash2_disable_rx( tp );
+        }
+}
+
+static u8 rtl8168_check_ephy_addr(struct rtl8168_private *tp, int addr)
+{
+        if (tp->mcfg != CFG_METHOD_35 && tp->mcfg != CFG_METHOD_36)
+                goto exit;
+
+        if (addr & (BIT_6 | BIT_5))
+                rtl8168_clear_and_set_mcu_ocp_bit(tp, 0xDE28,
+                                                  (BIT_1 | BIT_0),
+                                                  (addr >> 5) & (BIT_1 | BIT_0));
+
+        addr &= 0x1F;
+
+exit:
+        return addr;
+}
+
+static void _rtl8168_ephy_write(struct rtl8168_private *tp, int addr, int value)
+{
+        int i;
+
+        RTL_W32(tp, EPHYAR,
+                EPHYAR_Write |
+                (addr & EPHYAR_Reg_Mask) << EPHYAR_Reg_shift |
+                (value & EPHYAR_Data_Mask));
+
+        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
+                udelay(R8168_CHANNEL_WAIT_TIME);
+
+                /* Check if the RTL8168 has completed EPHY write */
+                if (!(RTL_R32(tp, EPHYAR) & EPHYAR_Flag))
+                        break;
+        }
+
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
+}
+
+void rtl8168_ephy_write(struct rtl8168_private *tp, int addr, int value)
+{
+        _rtl8168_ephy_write(tp, rtl8168_check_ephy_addr(tp, addr), value);
+}
+
+static u16 _rtl8168_ephy_read(struct rtl8168_private *tp, int addr)
+{
+        int i;
+        u16 value = 0xffff;
+
+        RTL_W32(tp, EPHYAR,
+                EPHYAR_Read | (addr & EPHYAR_Reg_Mask) << EPHYAR_Reg_shift);
+
+        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
+                udelay(R8168_CHANNEL_WAIT_TIME);
+
+                /* Check if the RTL8168 has completed EPHY read */
+                if (RTL_R32(tp, EPHYAR) & EPHYAR_Flag) {
+                        value = (u16) (RTL_R32(tp, EPHYAR) & EPHYAR_Data_Mask);
+                        break;
+                }
+        }
+
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
+
+        return value;
+}
+
+u16 rtl8168_ephy_read(struct rtl8168_private *tp, int addr)
+{
+        return _rtl8168_ephy_read(tp, rtl8168_check_ephy_addr(tp, addr));
+}
+
+static void ClearAndSetPCIePhyBit(struct rtl8168_private *tp, u8 addr, u16 clearmask, u16 setmask)
+{
+        u16 EphyValue;
+
+        EphyValue = rtl8168_ephy_read(tp, addr);
+        EphyValue &= ~clearmask;
+        EphyValue |= setmask;
+        rtl8168_ephy_write(tp, addr, EphyValue);
+}
+
+static void ClearPCIePhyBit(struct rtl8168_private *tp, u8 addr, u16 mask)
+{
+        ClearAndSetPCIePhyBit( tp,
+                               addr,
+                               mask,
+                               0
+                             );
+}
+
+static void SetPCIePhyBit( struct rtl8168_private *tp, u8 addr, u16 mask)
+{
+        ClearAndSetPCIePhyBit( tp,
+                               addr,
+                               0,
+                               mask
+                             );
+}
+
+static u32
+rtl8168_csi_other_fun_read(struct rtl8168_private *tp,
+                           u8 multi_fun_sel_bit,
+                           u32 addr)
+{
+        u32 cmd;
+        int i;
+        u32 value = 0;
+
+        cmd = CSIAR_Read | CSIAR_ByteEn << CSIAR_ByteEn_shift | (addr & CSIAR_Addr_Mask);
+
+        if (tp->mcfg != CFG_METHOD_20 && tp->mcfg != CFG_METHOD_23 &&
+            tp->mcfg != CFG_METHOD_26 && tp->mcfg != CFG_METHOD_27 &&
+            tp->mcfg != CFG_METHOD_28 && tp->mcfg != CFG_METHOD_31 &&
+            tp->mcfg != CFG_METHOD_32 && tp->mcfg != CFG_METHOD_33 &&
+            tp->mcfg != CFG_METHOD_34) {
+                multi_fun_sel_bit = 0;
+        }
+
+        if ( multi_fun_sel_bit > 7 ) {
+                return 0xffffffff;
+        }
+
+        cmd |= multi_fun_sel_bit << 16;
+
+        RTL_W32(tp, CSIAR, cmd);
+
+        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
+                udelay(R8168_CHANNEL_WAIT_TIME);
+
+                /* Check if the RTL8168 has completed CSI read */
+                if (RTL_R32(tp, CSIAR) & CSIAR_Flag) {
+                        value = (u32)RTL_R32(tp, CSIDR);
+                        break;
+                }
+        }
+
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
+
+        return value;
+}
+
+static void
+rtl8168_csi_other_fun_write(struct rtl8168_private *tp,
+                            u8 multi_fun_sel_bit,
+                            u32 addr,
+                            u32 value)
+{
+        u32 cmd;
+        int i;
+
+        RTL_W32(tp, CSIDR, value);
+        cmd = CSIAR_Write | CSIAR_ByteEn << CSIAR_ByteEn_shift | (addr & CSIAR_Addr_Mask);
+        if (tp->mcfg != CFG_METHOD_20 && tp->mcfg != CFG_METHOD_23 &&
+            tp->mcfg != CFG_METHOD_26 && tp->mcfg != CFG_METHOD_27 &&
+            tp->mcfg != CFG_METHOD_28 && tp->mcfg != CFG_METHOD_31 &&
+            tp->mcfg != CFG_METHOD_32 && tp->mcfg != CFG_METHOD_33 &&
+            tp->mcfg != CFG_METHOD_34) {
+                multi_fun_sel_bit = 0;
+        }
+
+        if ( multi_fun_sel_bit > 7 ) {
+                return;
+        }
+
+        cmd |= multi_fun_sel_bit << 16;
+
+        RTL_W32(tp, CSIAR, cmd);
+
+        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
+                udelay(R8168_CHANNEL_WAIT_TIME);
+
+                /* Check if the RTL8168 has completed CSI write */
+                if (!(RTL_R32(tp, CSIAR) & CSIAR_Flag))
+                        break;
+        }
+
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
+}
+
+static u32
+rtl8168_csi_read(struct rtl8168_private *tp,
+                 u32 addr)
+{
+        u8 multi_fun_sel_bit;
+
+        if (tp->mcfg == CFG_METHOD_20)
+                multi_fun_sel_bit = 2;
+        else if (tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_31 ||
+                 tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33 ||
+                 tp->mcfg == CFG_METHOD_34)
+                multi_fun_sel_bit = 1;
+        else
+                multi_fun_sel_bit = 0;
+
+        return rtl8168_csi_other_fun_read(tp, multi_fun_sel_bit, addr);
+}
+
+static void
+rtl8168_csi_write(struct rtl8168_private *tp,
+                  u32 addr,
+                  u32 value)
+{
+        u8 multi_fun_sel_bit;
+
+        if (tp->mcfg == CFG_METHOD_20)
+                multi_fun_sel_bit = 2;
+        else if (tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_31 ||
+                 tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33 ||
+                 tp->mcfg == CFG_METHOD_34)
+                multi_fun_sel_bit = 1;
+        else
+                multi_fun_sel_bit = 0;
+
+        rtl8168_csi_other_fun_write(tp, multi_fun_sel_bit, addr, value);
+}
+
+static u8
+rtl8168_csi_fun0_read_byte(struct rtl8168_private *tp,
+                           u32 addr)
+{
+        u8 RetVal = 0;
+
+        if (tp->mcfg == CFG_METHOD_20 || tp->mcfg == CFG_METHOD_26 ||
+            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) {
+                u32 TmpUlong;
+                u16 RegAlignAddr;
+                u8 ShiftByte;
+
+                RegAlignAddr = addr & ~(0x3);
+                ShiftByte = addr & (0x3);
+                TmpUlong = rtl8168_csi_other_fun_read(tp, 0, RegAlignAddr);
+                TmpUlong >>= (8*ShiftByte);
+                RetVal = (u8)TmpUlong;
+        } else {
+                struct pci_dev *pdev = tp->pci_dev;
+
+                pci_read_config_byte(pdev, addr, &RetVal);
+        }
+
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
+
+        return RetVal;
+}
+
+static void
+rtl8168_csi_fun0_write_byte(struct rtl8168_private *tp,
+                            u32 addr,
+                            u8 value)
+{
+        if (tp->mcfg == CFG_METHOD_20 || tp->mcfg == CFG_METHOD_26 ||
+            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) {
+                u32 TmpUlong;
+                u16 RegAlignAddr;
+                u8 ShiftByte;
+
+                RegAlignAddr = addr & ~(0x3);
+                ShiftByte = addr & (0x3);
+                TmpUlong = rtl8168_csi_other_fun_read(tp, 0, RegAlignAddr);
+                TmpUlong &= ~(0xFF << (8*ShiftByte));
+                TmpUlong |= (value << (8*ShiftByte));
+                rtl8168_csi_other_fun_write( tp, 0, RegAlignAddr, TmpUlong );
+        } else {
+                struct pci_dev *pdev = tp->pci_dev;
+
+                pci_write_config_byte(pdev, addr, value);
+        }
+
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
+}
+
+static void
+rtl8168_clear_and_set_other_fun_pci_bit(struct rtl8168_private *tp,
+                                        u8 multi_fun_sel_bit,
+                                        u32 addr,
+                                        u32 clearmask,
+                                        u32 setmask)
+{
+        u32 TmpUlong;
+
+        TmpUlong = rtl8168_csi_other_fun_read(tp, multi_fun_sel_bit, addr);
+        TmpUlong &= ~clearmask;
+        TmpUlong |= setmask;
+        rtl8168_csi_other_fun_write(tp, multi_fun_sel_bit, addr, TmpUlong);
+}
+
+static void
+rtl8168_other_fun_dev_pci_setting(struct rtl8168_private *tp,
+                                  u32 addr,
+                                  u32 clearmask,
+                                  u32 setmask,
+                                  u8 multi_fun_sel_bit)
+{
+        u32 TmpUlong;
+        u8 i;
+        u8 FunBit;
+
+        for (i = 0; i < 8; i++) {
+                FunBit = (1 << i);
+                if (FunBit & multi_fun_sel_bit) {
+                        u8 set_other_fun = TRUE;
+
+                        switch(tp->mcfg) {
+                        case CFG_METHOD_23:
+                        case CFG_METHOD_27:
+                        case CFG_METHOD_28:
+                                //0: UMAC, 1: TCR1, 2: TCR2, 3: KCS, 4: EHCI(Control by EHCI Driver)
+                                if (i < 5) {
+                                        TmpUlong = rtl8168_csi_other_fun_read(tp, i, 0x00);
+                                        if (TmpUlong == 0xFFFFFFFF)
+                                                set_other_fun = TRUE;
+                                        else
+                                                set_other_fun = FALSE;
+                                }
+                                break;
+                        case CFG_METHOD_31:
+                        case CFG_METHOD_32:
+                        case CFG_METHOD_33:
+                        case CFG_METHOD_34:
+                                //0: BMC, 1: NIC, 2: TCR, 3: VGA/PCIE_TO_USB, 4: EHCI, 5: WIFI, 6: WIFI, 7: KCS
+                                if (i == 5 || i == 6) {
+                                        if (tp->DASH) {
+                                                TmpUlong = rtl8168_ocp_read(tp, 0x184, 4);
+                                                if (TmpUlong & BIT_26)
+                                                        set_other_fun = FALSE;
+                                                else
+                                                        set_other_fun = TRUE;
+                                        }
+                                } else { //function 0/1/2/3/4/7
+                                        TmpUlong = rtl8168_csi_other_fun_read(tp, i, 0x00);
+                                        if (TmpUlong == 0xFFFFFFFF)
+                                                set_other_fun = TRUE;
+                                        else
+                                                set_other_fun = FALSE;
+                                }
+                                break;
+                        default:
+                                return;
+                        }
+
+                        if (set_other_fun)
+                                rtl8168_clear_and_set_other_fun_pci_bit(tp, i, addr, clearmask, setmask);
+                }
+        }
+}
+
+static void
+rtl8168_set_dash_other_fun_dev_state_change(struct rtl8168_private *tp,
+                u8 dev_state,
+                u8 multi_fun_sel_bit)
+{
+        u32 clearmask;
+        u32 setmask;
+
+        if (dev_state == 0) {
+                //
+                // goto D0
+                //
+                clearmask = (BIT_0 | BIT_1);
+                setmask = 0;
+
+                rtl8168_other_fun_dev_pci_setting(tp, 0x44, clearmask, setmask, multi_fun_sel_bit);
+        } else {
+                //
+                // goto D3
+                //
+                clearmask = 0;
+                setmask = (BIT_0 | BIT_1);
+
+                rtl8168_other_fun_dev_pci_setting(tp, 0x44, clearmask, setmask, multi_fun_sel_bit);
+        }
+}
+
+static void
+rtl8168_set_dash_other_fun_dev_aspm_clkreq(struct rtl8168_private *tp,
+                u8 aspm_val,
+                u8 clkreq_en,
+                u8 multi_fun_sel_bit)
+{
+        u32 clearmask;
+        u32 setmask;
+
+        aspm_val &= (BIT_0 | BIT_1);
+        clearmask = (BIT_0 | BIT_1 | BIT_8);
+        setmask = aspm_val;
+        if (clkreq_en)
+                setmask |= BIT_8;
+
+        rtl8168_other_fun_dev_pci_setting(tp, 0x80, clearmask, setmask, multi_fun_sel_bit);
+}
+
+/*
+static void
+rtl8168_set_dash_other_fun_dev_pci_cmd_register(struct rtl8168_private *tp,
+                u8 pci_cmd_reg,
+                u8 multi_fun_sel_bit)
+{
+        u32 clearmask;
+        u32 setmask;
+
+        pci_cmd_reg &= (BIT_0 | BIT_1 | BIT_2);
+
+        clearmask = (BIT_0 | BIT_1 | BIT_2);
+        setmask = pci_cmd_reg;
+
+        rtl8168_other_fun_dev_pci_setting(tp, 0x04, clearmask, setmask, multi_fun_sel_bit);
+}
+*/
+
+u32 rtl8168_eri_read_with_oob_base_address(struct rtl8168_private *tp, int addr, int len, int type, const u32 base_address)
+{
+        int i, val_shift, shift = 0;
+        u32 value1 = 0, value2 = 0, mask;
+        u32 eri_cmd;
+        const u32 transformed_base_address = ((base_address & 0x00FFF000) << 6) | (base_address & 0x000FFF);
+
+        if (len > 4 || len <= 0)
+                return -1;
+
+        while (len > 0) {
+                val_shift = addr % ERIAR_Addr_Align;
+                addr = addr & ~0x3;
+
+                eri_cmd = ERIAR_Read |
+                          transformed_base_address |
+                          type << ERIAR_Type_shift |
+                          ERIAR_ByteEn << ERIAR_ByteEn_shift |
+                          (addr & 0x0FFF);
+                if (addr & 0xF000) {
+                        u32 tmp;
+
+                        tmp = addr & 0xF000;
+                        tmp >>= 12;
+                        eri_cmd |= (tmp << 20) & 0x00F00000;
+                }
+
+                RTL_W32(tp, ERIAR, eri_cmd);
+
+                for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
+                        udelay(R8168_CHANNEL_WAIT_TIME);
+
+                        /* Check if the RTL8168 has completed ERI read */
+                        if (RTL_R32(tp, ERIAR) & ERIAR_Flag)
+                                break;
+                }
+
+                if (len == 1)       mask = (0xFF << (val_shift * 8)) & 0xFFFFFFFF;
+                else if (len == 2)  mask = (0xFFFF << (val_shift * 8)) & 0xFFFFFFFF;
+                else if (len == 3)  mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
+                else            mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
+
+                value1 = RTL_R32(tp, ERIDR) & mask;
+                value2 |= (value1 >> val_shift * 8) << shift * 8;
+
+                if (len <= 4 - val_shift) {
+                        len = 0;
+                } else {
+                        len -= (4 - val_shift);
+                        shift = 4 - val_shift;
+                        addr += 4;
+                }
+        }
+
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
+
+        return value2;
+}
+
+u32 rtl8168_eri_read(struct rtl8168_private *tp, int addr, int len, int type)
+{
+        return rtl8168_eri_read_with_oob_base_address(tp, addr, len, type, 0);
+}
+
+int rtl8168_eri_write_with_oob_base_address(struct rtl8168_private *tp, int addr, int len, u32 value, int type, const u32 base_address)
+{
+        int i, val_shift, shift = 0;
+        u32 value1 = 0, mask;
+        u32 eri_cmd;
+        const u32 transformed_base_address = ((base_address & 0x00FFF000) << 6) | (base_address & 0x000FFF);
+
+        if (len > 4 || len <= 0)
+                return -1;
+
+        while (len > 0) {
+                val_shift = addr % ERIAR_Addr_Align;
+                addr = addr & ~0x3;
+
+                if (len == 1)       mask = (0xFF << (val_shift * 8)) & 0xFFFFFFFF;
+                else if (len == 2)  mask = (0xFFFF << (val_shift * 8)) & 0xFFFFFFFF;
+                else if (len == 3)  mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
+                else            mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
+
+                value1 = rtl8168_eri_read_with_oob_base_address(tp, addr, 4, type, base_address) & ~mask;
+                value1 |= ((value << val_shift * 8) >> shift * 8);
+
+                RTL_W32(tp, ERIDR, value1);
+
+                eri_cmd = ERIAR_Write |
+                          transformed_base_address |
+                          type << ERIAR_Type_shift |
+                          ERIAR_ByteEn << ERIAR_ByteEn_shift |
+                          (addr & 0x0FFF);
+                if (addr & 0xF000) {
+                        u32 tmp;
+
+                        tmp = addr & 0xF000;
+                        tmp >>= 12;
+                        eri_cmd |= (tmp << 20) & 0x00F00000;
+                }
+
+                RTL_W32(tp, ERIAR, eri_cmd);
+
+                for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
+                        udelay(R8168_CHANNEL_WAIT_TIME);
+
+                        /* Check if the RTL8168 has completed ERI write */
+                        if (!(RTL_R32(tp, ERIAR) & ERIAR_Flag))
+                                break;
+                }
+
+                if (len <= 4 - val_shift) {
+                        len = 0;
+                } else {
+                        len -= (4 - val_shift);
+                        shift = 4 - val_shift;
+                        addr += 4;
+                }
+        }
+
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
+
+        return 0;
+}
+
+int rtl8168_eri_write(struct rtl8168_private *tp, int addr, int len, u32 value, int type)
+{
+        return rtl8168_eri_write_with_oob_base_address(tp, addr, len, value, type, NO_BASE_ADDRESS);
+}
+
+static void
+rtl8168_enable_rxdvgate(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_3);
+                mdelay(2);
+                break;
+        }
+}
+
+static void
+rtl8168_disable_rxdvgate(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_3);
+                mdelay(2);
+                break;
+        }
+}
+
+static u8
+rtl8168_is_gpio_low(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u8 gpio_low = FALSE;
+
+        switch (tp->HwSuppCheckPhyDisableModeVer) {
+        case 1:
+        case 2:
+                if (!(rtl8168_mac_ocp_read(tp, 0xDC04) & BIT_9))
+                        gpio_low = TRUE;
+                break;
+        case 3:
+                if (!(rtl8168_mac_ocp_read(tp, 0xDC04) & BIT_13))
+                        gpio_low = TRUE;
+                break;
+        }
+
+        if (gpio_low)
+                dprintk("gpio is low.\n");
+
+        return gpio_low;
+}
+
+static u8
+rtl8168_is_phy_disable_mode_enabled(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u8 phy_disable_mode_enabled = FALSE;
+
+        switch (tp->HwSuppCheckPhyDisableModeVer) {
+        case 1:
+                if (rtl8168_mac_ocp_read(tp, 0xDC20) & BIT_1)
+                        phy_disable_mode_enabled = TRUE;
+                break;
+        case 2:
+        case 3:
+                if (RTL_R8(tp, 0xF2) & BIT_5)
+                        phy_disable_mode_enabled = TRUE;
+                break;
+        }
+
+        if (phy_disable_mode_enabled)
+                dprintk("phy disable mode enabled.\n");
+
+        return phy_disable_mode_enabled;
+}
+
+static u8
+rtl8168_is_in_phy_disable_mode(struct net_device *dev)
+{
+        u8 in_phy_disable_mode = FALSE;
+
+        if (rtl8168_is_phy_disable_mode_enabled(dev) && rtl8168_is_gpio_low(dev))
+                in_phy_disable_mode = TRUE;
+
+        if (in_phy_disable_mode)
+                dprintk("Hardware is in phy disable mode.\n");
+
+        return in_phy_disable_mode;
+}
+
+void
+rtl8168_wait_txrx_fifo_empty(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int i;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                for (i = 0; i < 10; i++) {
+                        udelay(100);
+                        if (RTL_R32(tp, TxConfig) & BIT_11)
+                                break;
+                }
+
+                for (i = 0; i < 10; i++) {
+                        udelay(100);
+                        if ((RTL_R8(tp, MCUCmd_reg) & (Txfifo_empty | Rxfifo_empty)) == (Txfifo_empty | Rxfifo_empty))
+                                break;
+                }
+
+                mdelay(1);
+                break;
+        }
+}
+
+static int rtl8168_wait_dash_fw_ready(struct rtl8168_private *tp)
+{
+        int rc = -1;
+
+        if (!HW_DASH_SUPPORT_DASH(tp))
+                goto out;
+
+        if (!tp->DASH)
+                goto out;
+
+        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
+                int timeout;
+
+                for (timeout = 0; timeout < 10; timeout++) {
+                        mdelay(10);
+                        if (rtl8168_ocp_read(tp, 0x124, 1) & BIT_0) {
+                                rc = 1;
+                                goto out;
+                        }
+                }
+        } else {
+                u32 reg;
+                int timeout;
+
+                if (tp->mcfg == CFG_METHOD_13)
+                        reg = 0xB8;
+                else
+                        reg = 0x10;
+
+                for (timeout = 0; timeout < 10; timeout++) {
+                        mdelay(10);
+                        if (rtl8168_ocp_read(tp, reg, 2) & BIT_11) {
+                                rc = 1;
+                                goto out;
+                        }
+                }
+        }
+
+        rc = 0;
+
+out:
+        return rc;
+}
+
+static void rtl8168_driver_start(struct rtl8168_private *tp)
+{
+        //change other device state to D0.
+        switch (tp->mcfg) {
+        case CFG_METHOD_23:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+                rtl8168_set_dash_other_fun_dev_aspm_clkreq(tp, 3, 1, 0x1E);
+                rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0x1E);
+                break;
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+                rtl8168_set_dash_other_fun_dev_aspm_clkreq(tp, 3, 1, 0xFC);
+                rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0xFC);
+                break;
+        }
+
+        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
+                u32 tmp_value;
+
+                rtl8168_ocp_write(tp, 0x180, 1, OOB_CMD_DRIVER_START);
+                tmp_value = rtl8168_ocp_read(tp, 0x30, 1);
+                tmp_value |= BIT_0;
+                rtl8168_ocp_write(tp, 0x30, 1, tmp_value);
+
+                rtl8168_wait_dash_fw_ready(tp);
+        } else {
+
+                if (tp->mcfg == CFG_METHOD_13)
+                        RTL_W8(tp, TwiCmdReg, RTL_R8(tp, TwiCmdReg) | ( BIT_7 ));
+
+                rtl8168_oob_notify(tp, OOB_CMD_DRIVER_START);
+
+                rtl8168_wait_dash_fw_ready(tp);
+        }
+}
+
+static void rtl8168_driver_stop(struct rtl8168_private *tp)
+{
+        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
+                struct net_device *dev = tp->dev;
+                u32 tmp_value;
+
+                rtl8168_dash2_disable_txrx(dev);
+
+                rtl8168_ocp_write(tp, 0x180, 1, OOB_CMD_DRIVER_STOP);
+                tmp_value = rtl8168_ocp_read(tp, 0x30, 1);
+                tmp_value |= BIT_0;
+                rtl8168_ocp_write(tp, 0x30, 1, tmp_value);
+
+                rtl8168_wait_dash_fw_ready(tp);
+        } else {
+                rtl8168_oob_notify(tp, OOB_CMD_DRIVER_STOP);
+
+                rtl8168_wait_dash_fw_ready(tp);
+
+                if (tp->mcfg == CFG_METHOD_13)
+                        RTL_W8(tp, TwiCmdReg, RTL_R8(tp, TwiCmdReg) & ~( BIT_7 ));
+        }
+
+        //change other device state to D3.
+        switch (tp->mcfg) {
+        case CFG_METHOD_23:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+                rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0x0E);
+                break;
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+                rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0xFD);
+                break;
+        }
+}
+
+
+static inline u16 rtl8168_get_isr_by_vector(struct rtl8168_private *tp,
+                u32 message_id)
+{
+        if (message_id >= R8168_MAX_MSIX_VEC)
+                return 0;
+
+        if (message_id == 0)
+                return RTL_R16(tp, tp->isr_reg[0]);
+        else
+                return RTL_R8(tp, tp->isr_reg[message_id]);
+}
+
+static inline void rtl8168_clear_isr_by_vector(struct rtl8168_private *tp,
+                u32 message_id, u16 val)
+{
+        if (message_id >= R8168_MAX_MSIX_VEC)
+                return;
+
+        if (message_id == 0) {
+                RTL_W16(tp, tp->isr_reg[0], val);
+
+                if (val & RxDescUnavail)
+                        tp->rx_ring[message_id].rdu++;
+                if (val & TxDescUnavail)
+                        tp->tx_ring[message_id].tdu++;
+        } else {
+                RTL_W8(tp, tp->isr_reg[message_id], val);
+
+                if (val & RxDU1)
+                        tp->rx_ring[message_id].rdu++;
+        }
+}
+
+static inline void rtl8168_self_clear_isr_by_vector(struct rtl8168_private *tp,
+                u32 message_id)
+{
+        u16 val;
+
+        if (message_id >= R8168_MAX_MSIX_VEC)
+                return;
+
+        val = rtl8168_get_isr_by_vector(tp, message_id);
+        if ((message_id == 0) && (val & RxFIFOOver))
+                tp->rx_fifo_of++;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_9 ... CFG_METHOD_37:
+                /* RX_OVERFLOW RE-START mechanism now HW handles it automatically*/
+                if (message_id == 0)
+                        val &= ~RxFIFOOver;
+                break;
+        default:
+                break;
+        }
+        rtl8168_clear_isr_by_vector(tp, message_id, val);
+}
+
+#ifdef ENABLE_DASH_SUPPORT
+
+inline void
+rtl8168_enable_dash2_interrupt(struct rtl8168_private *tp)
+{
+        if (!tp->DASH)
+                return;
+
+        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
+                RTL_CMAC_W8(tp, CMAC_IBIMR0, ( ISRIMR_DASH_TYPE2_ROK | ISRIMR_DASH_TYPE2_TOK | ISRIMR_DASH_TYPE2_TDU | ISRIMR_DASH_TYPE2_RDU | ISRIMR_DASH_TYPE2_RX_DISABLE_IDLE ));
+        }
+}
+
+static inline void
+rtl8168_disable_dash2_interrupt(struct rtl8168_private *tp)
+{
+        if (!tp->DASH)
+                return;
+
+        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
+                RTL_CMAC_W8(tp, CMAC_IBIMR0, 0);
+        }
+}
+#endif
+
+static inline void
+rtl8168_enable_interrupt(struct rtl8168_private *tp)
+{
+        int i;
+        for (i=0; i<tp->num_rx_rings; i++)
+                rtl8168_enable_interrupt_by_vector(tp, i);
+}
+
+static inline void
+rtl8168_enable_lib_interrupt(struct rtl8168_private *tp)
+{
+        int i;
+
+        for (i=1; i<rtl8168_tot_rx_rings(tp); i++)
+                rtl8168_enable_interrupt_by_vector(tp, i);
+}
+
+static inline void
+rtl8168_disable_interrupt(struct rtl8168_private *tp)
+{
+        int i;
+
+        for (i=0; i<tp->num_rx_rings; i++)
+                rtl8168_disable_interrupt_by_vector(tp, i);
+}
+
+static inline void
+rtl8168_disable_lib_interrupt(struct rtl8168_private *tp)
+{
+        int i;
+
+        for (i=1; i<rtl8168_tot_rx_rings(tp); i++)
+                rtl8168_disable_interrupt_by_vector(tp, i);
+}
+
+static inline void
+rtl8168_disable_all_interrupt(struct rtl8168_private *tp)
+{
+        int i;
+
+        for (i=0; i<tp->hw_supp_irq_nvecs; i++)
+                rtl8168_disable_interrupt_by_vector(tp, i);
+}
+
+static inline void
+rtl8168_switch_to_hw_interrupt(struct rtl8168_private *tp)
+{
+        RTL_W32(tp, TimeInt0, 0x0000);
+
+        rtl8168_enable_interrupt(tp);
+
+        rtl8168_enable_lib_interrupt(tp);
+}
+
+static inline void
+rtl8168_switch_to_timer_interrupt(struct rtl8168_private *tp)
+{
+        if (tp->use_timer_interrrupt) {
+                RTL_W32(tp, TimeInt0, timer_count);
+                RTL_W32(tp, TCTR, timer_count);
+                RTL_W16(tp, tp->imr_reg[0], tp->timer_intr_mask);
+
+#ifdef ENABLE_DASH_SUPPORT
+                if (tp->DASH)
+                        rtl8168_enable_dash2_interrupt(tp);
+#endif
+        } else {
+                rtl8168_switch_to_hw_interrupt(tp);
+        }
+}
+
+static void
+rtl8168_irq_mask_and_ack(struct rtl8168_private *tp)
+{
+        rtl8168_disable_all_interrupt(tp);
+#ifdef ENABLE_DASH_SUPPORT
+        if (tp->DASH) {
+                if (tp->dash_printer_enabled) {
+                        rtl8168_clear_isr_by_vector(tp, 0,
+                                                    rtl8168_get_hw_isr_by_vector(tp, 0) &
+                                                    ~(ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET));
+                } else {
+                        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
+                                RTL_CMAC_W8(tp, CMAC_IBISR0, RTL_CMAC_R8(tp, CMAC_IBISR0));
+                        }
+                }
+        } else {
+                rtl8168_self_clear_isr_by_vector(tp, 0);
+        }
+#else
+        rtl8168_self_clear_isr_by_vector(tp, 0);
+#endif
+        if (tp->hw_supp_irq_nvecs > 1) {
+                int i;
+                for (i=1; i<tp->hw_supp_irq_nvecs; i++)
+                        rtl8168_self_clear_isr_by_vector(tp, i);
+        }
+}
+
+static void
+rtl8168_disable_rx_packet_filter(struct rtl8168_private *tp)
+{
+
+        RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) &
+                ~(AcceptErr | AcceptRunt |AcceptBroadcast | AcceptMulticast |
+                  AcceptMyPhys |  AcceptAllPhys));
+}
+
+static void
+rtl8168_nic_reset(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int i;
+
+        rtl8168_disable_rx_packet_filter(tp);
+
+        rtl8168_enable_rxdvgate(dev);
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_1:
+        case CFG_METHOD_2:
+        case CFG_METHOD_3:
+                mdelay(10);
+                break;
+        case CFG_METHOD_4:
+        case CFG_METHOD_5:
+        case CFG_METHOD_6:
+        case CFG_METHOD_7:
+        case CFG_METHOD_8:
+        case CFG_METHOD_9:
+        case CFG_METHOD_10:
+        case CFG_METHOD_14:
+        case CFG_METHOD_15:
+                RTL_W8(tp, ChipCmd, StopReq | CmdRxEnb | CmdTxEnb);
+                udelay(100);
+                break;
+        case CFG_METHOD_11:
+        case CFG_METHOD_12:
+        case CFG_METHOD_13:
+                for (i = 0; i < 2000; i++) {
+                        if (!(RTL_R8(tp, TxPoll) & NPQ)) break;
+                        udelay(100);
+                }
+                break;
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                mdelay(2);
+                break;
+        default:
+                mdelay(10);
+                break;
+        }
+
+        rtl8168_wait_txrx_fifo_empty(dev);
+
+        /* Soft reset the chip. */
+        RTL_W8(tp, ChipCmd, CmdReset);
+
+        /* Check that the chip has finished the reset. */
+        for (i = 100; i > 0; i--) {
+                udelay(100);
+                if ((RTL_R8(tp, ChipCmd) & CmdReset) == 0)
+                        break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_11:
+                rtl8168_oob_mutex_lock(tp);
+                rtl8168_ocp_write(tp, 0x10, 2, rtl8168_ocp_read(tp, 0x010, 2)&~0x00004000);
+                rtl8168_oob_mutex_unlock(tp);
+
+                rtl8168_oob_notify(tp, OOB_CMD_RESET);
+
+                for (i = 0; i < 10; i++) {
+                        mdelay(10);
+                        if (rtl8168_ocp_read(tp, 0x010, 2)&0x00004000)
+                                break;
+                }
+
+                for (i = 0; i < 5; i++) {
+                        if ( rtl8168_ocp_read(tp, 0x034, 1) == 0)
+                                break;
+                }
+                break;
+        }
+}
+
+static void
+rtl8168_hw_clear_timer_int(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        RTL_W32(tp, TimeInt0, 0x0000);
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_4:
+        case CFG_METHOD_5:
+        case CFG_METHOD_6:
+        case CFG_METHOD_7:
+        case CFG_METHOD_8:
+                RTL_W32(tp, TimeInt1, 0x0000);
+                break;
+        case CFG_METHOD_9:
+        case CFG_METHOD_10:
+        case CFG_METHOD_11:
+        case CFG_METHOD_12:
+        case CFG_METHOD_13:
+        case CFG_METHOD_14:
+        case CFG_METHOD_15:
+        case CFG_METHOD_16:
+        case CFG_METHOD_17:
+        case CFG_METHOD_18:
+        case CFG_METHOD_19:
+        case CFG_METHOD_20:
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                RTL_W32(tp, TimeInt1, 0x0000);
+                RTL_W32(tp, TimeInt2, 0x0000);
+                RTL_W32(tp, TimeInt3, 0x0000);
+                break;
+        }
+}
+
+void
+rtl8168_hw_reset(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        rtl8168_lib_reset_prepare(tp);
+
+        /* Disable interrupts */
+        rtl8168_irq_mask_and_ack(tp);
+
+        rtl8168_hw_clear_timer_int(dev);
+
+        rtl8168_nic_reset(dev);
+}
+
+static void rtl8168_doorbell(struct rtl8168_tx_ring *ring)
+{
+        struct rtl8168_private *tp = ring->priv;
+
+        if (ring->index > 0)
+                RTL_W8(tp, TxPoll, HPQ);
+        else
+                RTL_W8(tp, TxPoll, NPQ);
+}
+
+static void rtl8168_mac_loopback_test(struct rtl8168_private *tp)
+{
+        struct rtl8168_tx_ring *tx_ring = &tp->tx_ring[0];
+        struct rtl8168_rx_ring *rx_ring = &tp->rx_ring[0];
+        struct pci_dev *pdev = tp->pci_dev;
+        struct net_device *dev = tp->dev;
+        struct sk_buff *skb, *rx_skb;
+        dma_addr_t mapping;
+        struct TxDesc *txd;
+        struct RxDesc *rxd;
+        void *tmpAddr;
+        u32 len, rx_len, rx_cmd = 0;
+        u16 type;
+        u8 pattern;
+        int i;
+
+        if (tp->DASH)
+                return;
+
+        pattern = 0x5A;
+        len = 60;
+        type = htons(ETH_P_IP);
+        txd = tx_ring->TxDescArray;
+        rxd = rtl8168_get_rxdesc(tp, tp->RxDescArray, 0, rx_ring->index);
+        rx_skb = rx_ring->Rx_skbuff[0];
+        RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) & ~0x00060000) | 0x00020000);
+
+        do {
+                skb = dev_alloc_skb(len + RTK_RX_ALIGN);
+                if (unlikely(!skb))
+                        dev_printk(KERN_NOTICE, tp_to_dev(tp), "-ENOMEM;\n");
+        } while (unlikely(skb == NULL));
+        skb_reserve(skb, RTK_RX_ALIGN);
+
+        memcpy(skb_put(skb, dev->addr_len), dev->dev_addr, dev->addr_len);
+        memcpy(skb_put(skb, dev->addr_len), dev->dev_addr, dev->addr_len);
+        memcpy(skb_put(skb, sizeof(type)), &type, sizeof(type));
+        tmpAddr = skb_put(skb, len - 14);
+
+        mapping = dma_map_single(tp_to_dev(tp), skb->data, len, DMA_TO_DEVICE);
+        dma_sync_single_for_cpu(tp_to_dev(tp), le64_to_cpu(mapping),
+                                len, DMA_TO_DEVICE);
+        txd->addr = cpu_to_le64(mapping);
+        txd->opts2 = 0;
+        while (1) {
+                memset(tmpAddr, pattern++, len - 14);
+                dma_sync_single_for_device(&tp->pci_dev->dev,
+                                           le64_to_cpu(mapping),
+                                           len, DMA_TO_DEVICE);
+                txd->opts1 = cpu_to_le32(DescOwn | FirstFrag | LastFrag | len);
+
+                RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig)  | AcceptMyPhys);
+
+                smp_wmb();
+                rtl8168_doorbell(tx_ring);    /* set polling bit */
+
+                for (i = 0; i < 50; i++) {
+                        udelay(200);
+                        rx_cmd = le32_to_cpu(rxd->opts1);
+                        if ((rx_cmd & DescOwn) == 0)
+                                break;
+                }
+
+                RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) & ~(AcceptErr | AcceptRunt | AcceptBroadcast | AcceptMulticast | AcceptMyPhys |  AcceptAllPhys));
+
+                rx_len = rx_cmd & 0x3FFF;
+                rx_len -= 4;
+                rxd->opts1 = cpu_to_le32(DescOwn | tp->rx_buf_sz);
+
+                dma_sync_single_for_cpu(tp_to_dev(tp), le64_to_cpu(mapping), len, DMA_TO_DEVICE);
+
+                if (rx_len == len) {
+                        dma_sync_single_for_cpu(tp_to_dev(tp), le64_to_cpu(rxd->addr), tp->rx_buf_sz, DMA_FROM_DEVICE);
+                        i = memcmp(skb->data, rx_skb->data, rx_len);
+                        dma_sync_single_for_device(&tp->pci_dev->dev, le64_to_cpu(rxd->addr), tp->rx_buf_sz, DMA_FROM_DEVICE);
+                        if (i == 0) {
+//              dev_printk(KERN_INFO, tp_to_dev(tp), "loopback test finished\n",rx_len,len);
+                                break;
+                        }
+                }
+
+                rtl8168_hw_reset(dev);
+                rtl8168_disable_rxdvgate(dev);
+                RTL_W8(tp, ChipCmd, CmdTxEnb | CmdRxEnb);
+        }
+        tx_ring->dirty_tx++;
+        rx_ring->dirty_rx++;
+        tx_ring->cur_tx++;
+        rx_ring->cur_rx++;
+        dma_unmap_single(&pdev->dev, le64_to_cpu(mapping),
+                         len, DMA_TO_DEVICE);
+        RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) & ~0x00060000);
+        dev_kfree_skb_any(skb);
+        rtl8168_clear_isr_by_vector(tp, 0, 0xFFBF);
+}
+
+static unsigned int
+rtl8168_xmii_reset_pending(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        unsigned int retval;
+
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        retval = rtl8168_mdio_read(tp, MII_BMCR) & BMCR_RESET;
+
+        return retval;
+}
+
+static unsigned int
+rtl8168_xmii_link_ok(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u8 status;
+
+        status = RTL_R8(tp, PHYstatus);
+        if (status == 0xff)
+                return 0;
+
+        return (status & LinkStatus) ? 1 : 0;
+}
+
+static int
+rtl8168_wait_phy_reset_complete(struct rtl8168_private *tp)
+{
+        int i, val;
+
+        for (i = 0; i < 2500; i++) {
+                val = rtl8168_mdio_read(tp, MII_BMCR) & BMCR_RESET;
+                if (!val)
+                        return 0;
+
+                mdelay(1);
+        }
+
+        return -1;
+}
+
+static void
+rtl8168_xmii_reset_enable(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        if (rtl8168_is_in_phy_disable_mode(dev))
+                return;
+
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, MII_ADVERTISE, rtl8168_mdio_read(tp, MII_ADVERTISE) &
+                           ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
+                             ADVERTISE_100HALF | ADVERTISE_100FULL));
+        rtl8168_mdio_write(tp, MII_CTRL1000, rtl8168_mdio_read(tp, MII_CTRL1000) &
+                           ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL));
+        rtl8168_mdio_write(tp, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
+
+        if (rtl8168_wait_phy_reset_complete(tp) == 0)
+                return;
+
+        if (netif_msg_link(tp))
+                printk(KERN_ERR "%s: PHY reset failed.\n", dev->name);
+}
+
+static void
+rtl8168dp_10mbps_gphy_para(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u8 status = RTL_R8(tp, PHYstatus);
+
+        if ((status & LinkStatus) && (status & _10bps)) {
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                rtl8168_mdio_write(tp, 0x10, 0x04EE);
+        } else {
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                rtl8168_mdio_write(tp, 0x10, 0x01EE);
+        }
+}
+
+void rtl8168_init_ring_indexes(struct rtl8168_private *tp)
+{
+        int i;
+
+        for (i = 0; i < tp->HwSuppNumTxQueues; i++) {
+                struct rtl8168_tx_ring *ring = &tp->tx_ring[i];
+                ring->dirty_tx = ring->cur_tx = 0;
+                ring->index = i;
+                ring->priv = tp;
+        }
+
+        for (i = 0; i < tp->HwSuppNumRxQueues; i++) {
+                struct rtl8168_rx_ring *ring = &tp->rx_ring[i];
+                ring->dirty_rx = ring->cur_rx = 0;
+                ring->index = i;
+                ring->priv = tp;
+        }
+
+#ifdef ENABLE_LIB_SUPPORT
+        for (i = 0; i < tp->HwSuppNumTxQueues; i++) {
+                struct rtl8168_ring *ring = &tp->lib_tx_ring[i];
+                ring->direction = RTL8168_CH_DIR_TX;
+                ring->queue_num = i;
+                ring->private = tp;
+        }
+
+        for (i = 0; i < tp->HwSuppNumRxQueues; i++) {
+                struct rtl8168_ring *ring = &tp->lib_rx_ring[i];
+                ring->direction = RTL8168_CH_DIR_RX;
+                ring->queue_num = i;
+                ring->private = tp;
+        }
+#endif
+}
+
+static void
+rtl8168_issue_offset_99_event(struct rtl8168_private *tp)
+{
+        u32 csi_tmp;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+                if (tp->mcfg == CFG_METHOD_24 || tp->mcfg == CFG_METHOD_25 ||
+                    tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28) {
+                        rtl8168_eri_write(tp, 0x3FC, 4, 0x00000000, ERIAR_ExGMAC);
+                } else {
+                        rtl8168_eri_write(tp, 0x3FC, 4, 0x083C083C, ERIAR_ExGMAC);
+                }
+                csi_tmp = rtl8168_eri_read(tp, 0x3F8, 1, ERIAR_ExGMAC);
+                csi_tmp |= BIT_0;
+                rtl8168_eri_write(tp, 0x3F8, 1, csi_tmp, ERIAR_ExGMAC);
+                break;
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                csi_tmp = rtl8168_eri_read(tp, 0x1EA, 1, ERIAR_ExGMAC);
+                csi_tmp |= BIT_0;
+                rtl8168_eri_write(tp, 0x1EA, 1, csi_tmp, ERIAR_ExGMAC);
+                break;
+        }
+}
+
+static void
+rtl8168_enable_cfg9346_write(struct rtl8168_private *tp)
+{
+        RTL_W8(tp, Cfg9346, RTL_R8(tp, Cfg9346) | Cfg9346_Unlock);
+}
+
+static void
+rtl8168_disable_cfg9346_write(struct rtl8168_private *tp)
+{
+        RTL_W8(tp, Cfg9346, RTL_R8(tp, Cfg9346) & ~Cfg9346_Unlock);
+}
+
+static void
+rtl8168_enable_exit_l1_mask(struct rtl8168_private *tp)
+{
+        u32 csi_tmp;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_16:
+        case CFG_METHOD_17:
+        case CFG_METHOD_18:
+        case CFG_METHOD_19:
+                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
+                csi_tmp |= (BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
+                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
+                break;
+        case CFG_METHOD_20:
+                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
+                csi_tmp |= (BIT_10 | BIT_11);
+                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
+                break;
+        case CFG_METHOD_21 ... CFG_METHOD_37:
+                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
+                csi_tmp |= (BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
+                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
+                break;
+        }
+}
+
+static void
+rtl8168_disable_exit_l1_mask(struct rtl8168_private *tp)
+{
+        u32 csi_tmp;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_16:
+        case CFG_METHOD_17:
+        case CFG_METHOD_18:
+        case CFG_METHOD_19:
+                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
+                csi_tmp &= ~(BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
+                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
+                break;
+        case CFG_METHOD_20:
+                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
+                csi_tmp &= ~(BIT_10 | BIT_11);
+                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
+                break;
+        case CFG_METHOD_21 ... CFG_METHOD_37:
+                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
+                csi_tmp &= ~(BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
+                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
+                break;
+        }
+}
+
+static void
+rtl8168_hw_aspm_clkreq_enable(struct rtl8168_private *tp, bool enable)
+{
+        if (!tp->HwSuppAspmClkIntrLock)
+                return;
+
+        if (enable && aspm) {
+                RTL_W8(tp, Config5, RTL_R8(tp, Config5) | ASPM_en);
+                RTL_W8(tp, Config2, RTL_R8(tp, Config2) | ClkReqEn);
+        } else {
+                RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~ClkReqEn);
+                RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~ASPM_en);
+        }
+
+        udelay(10);
+}
+
+#ifdef ENABLE_DASH_SUPPORT
+static void
+NICChkTypeEnableDashInterrupt(struct rtl8168_private *tp)
+{
+        if (tp->DASH) {
+                //
+                // even disconnected, enable 3 dash interrupt mask bits for in-band/out-band communication
+                //
+                if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
+                        rtl8168_enable_dash2_interrupt(tp);
+                        RTL_W16(tp, tp->imr_reg[0], (ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET));
+                } else {
+                        RTL_W16(tp, tp->imr_reg[0], (ISRIMR_DP_DASH_OK | ISRIMR_DP_HOST_OK | ISRIMR_DP_REQSYS_OK));
+                }
+        }
+}
+#endif
+
+static void
+rtl8168_link_on_patch(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        rtl8168_hw_config(dev);
+
+        if (tp->mcfg == CFG_METHOD_18 || tp->mcfg == CFG_METHOD_19 || tp->mcfg == CFG_METHOD_20) {
+                if (RTL_R8(tp, PHYstatus) & _1000bpsF) {
+                        rtl8168_eri_write(tp, 0x1bc, 4, 0x00000011, ERIAR_ExGMAC);
+                        rtl8168_eri_write(tp, 0x1dc, 4, 0x0000001f, ERIAR_ExGMAC);
+                } else if (RTL_R8(tp, PHYstatus) & _100bps) {
+                        rtl8168_eri_write(tp, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
+                        rtl8168_eri_write(tp, 0x1dc, 4, 0x0000001f, ERIAR_ExGMAC);
+                } else {
+                        rtl8168_eri_write(tp, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
+                        rtl8168_eri_write(tp, 0x1dc, 4, 0x0000002d, ERIAR_ExGMAC);
+                }
+        } else if ((tp->mcfg == CFG_METHOD_16 || tp->mcfg == CFG_METHOD_17) && netif_running(dev)) {
+                if (tp->mcfg == CFG_METHOD_16 && (RTL_R8(tp, PHYstatus) & _10bps)) {
+                        RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) | AcceptAllPhys);
+                } else if (tp->mcfg == CFG_METHOD_17) {
+                        if (RTL_R8(tp, PHYstatus) & _1000bpsF) {
+                                rtl8168_eri_write(tp, 0x1bc, 4, 0x00000011, ERIAR_ExGMAC);
+                                rtl8168_eri_write(tp, 0x1dc, 4, 0x00000005, ERIAR_ExGMAC);
+                        } else if (RTL_R8(tp, PHYstatus) & _100bps) {
+                                rtl8168_eri_write(tp, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
+                                rtl8168_eri_write(tp, 0x1dc, 4, 0x00000005, ERIAR_ExGMAC);
+                        } else {
+                                rtl8168_eri_write(tp, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
+                                rtl8168_eri_write(tp, 0x1dc, 4, 0x0000003f, ERIAR_ExGMAC);
+                        }
+                }
+        } else if ((tp->mcfg == CFG_METHOD_14 || tp->mcfg == CFG_METHOD_15) && tp->eee.eee_enabled == 1) {
+                /*Full -Duplex  mode*/
+                if (RTL_R8(tp, PHYstatus)&FullDup) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0006);
+                        rtl8168_mdio_write(tp, 0x00, 0x5a30);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                        if (RTL_R8(tp, PHYstatus) & (_10bps | _100bps))
+                                RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) & ~BIT_19) | BIT_25);
+
+                } else {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0006);
+                        rtl8168_mdio_write(tp, 0x00, 0x5a00);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                        if (RTL_R8(tp, PHYstatus) & (_10bps | _100bps))
+                                RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) & ~BIT_19) | (InterFrameGap << TxInterFrameGapShift));
+                }
+        } else if ((tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
+                    tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_24 ||
+                    tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
+                    tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
+                    tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+                    tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+                    tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+                    tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
+                    tp->mcfg == CFG_METHOD_37) && netif_running(dev)) {
+                if (RTL_R8(tp, PHYstatus)&FullDup)
+                        RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) | (BIT_24 | BIT_25)) & ~BIT_19);
+                else
+                        RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) | BIT_25) & ~(BIT_19 | BIT_24));
+        }
+
+        if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
+            tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
+            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) {
+                /*half mode*/
+                if (!(RTL_R8(tp, PHYstatus)&FullDup)) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                        rtl8168_mdio_write(tp, MII_ADVERTISE, rtl8168_mdio_read(tp, MII_ADVERTISE)&~(ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM));
+                }
+        }
+
+        if ((tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+             tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) &&
+            (RTL_R8(tp, PHYstatus) & _10bps)) {
+                u32 csi_tmp;
+
+                csi_tmp = rtl8168_eri_read(tp, 0x1D0, 1, ERIAR_ExGMAC);
+                csi_tmp |= BIT_1;
+                rtl8168_eri_write(tp, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
+        }
+
+        rtl8168_hw_start(dev);
+
+        netif_carrier_on(dev);
+
+        netif_tx_wake_all_queues(dev);
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        tp->phy_reg_aner = rtl8168_mdio_read(tp, MII_EXPANSION);
+        tp->phy_reg_anlpar = rtl8168_mdio_read(tp, MII_LPA);
+        tp->phy_reg_gbsr = rtl8168_mdio_read(tp, MII_STAT1000);
+}
+
+static void
+rtl8168_link_down_patch(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        tp->phy_reg_aner = 0;
+        tp->phy_reg_anlpar = 0;
+        tp->phy_reg_gbsr = 0;
+
+        netif_carrier_off(dev);
+
+        netif_tx_disable(dev);
+
+        rtl8168_hw_reset(dev);
+
+        rtl8168_tx_clear(tp);
+
+        rtl8168_rx_clear(tp);
+
+        rtl8168_init_ring(dev);
+
+        if (dynamic_aspm) {
+                rtl8168_enable_cfg9346_write(tp);
+                rtl8168_hw_aspm_clkreq_enable(tp, true);
+                rtl8168_disable_cfg9346_write(tp);
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+                if (tp->org_pci_offset_99 & BIT_2)
+                        tp->issue_offset_99_event = TRUE;
+                break;
+        }
+
+#ifdef ENABLE_DASH_SUPPORT
+        if (tp->DASH) {
+                NICChkTypeEnableDashInterrupt(tp);
+        }
+#endif
+}
+
+static void
+rtl8168_check_link_status(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int link_status_on;
+
+#ifdef ENABLE_FIBER_SUPPORT
+        rtl8168_check_fiber_link_status(tp);
+#endif //ENABLE_FIBER_SUPPORT
+
+        link_status_on = tp->link_ok(dev);
+
+        if (tp->mcfg == CFG_METHOD_11)
+                rtl8168dp_10mbps_gphy_para(dev);
+
+        if (netif_carrier_ok(dev) != link_status_on) {
+                if (link_status_on) {
+                        rtl8168_link_on_patch(dev);
+
+                        if (netif_msg_ifup(tp))
+                                printk(KERN_INFO PFX "%s: link up\n", dev->name);
+                } else {
+                        if (netif_msg_ifdown(tp))
+                                printk(KERN_INFO PFX "%s: link down\n", dev->name);
+
+                        rtl8168_link_down_patch(dev);
+                }
+        }
+
+        if (!link_status_on) {
+                switch (tp->mcfg) {
+                case CFG_METHOD_21:
+                case CFG_METHOD_22:
+                case CFG_METHOD_23:
+                case CFG_METHOD_24:
+                case CFG_METHOD_25:
+                case CFG_METHOD_27:
+                case CFG_METHOD_28:
+                case CFG_METHOD_31:
+                case CFG_METHOD_32:
+                case CFG_METHOD_33:
+                case CFG_METHOD_34:
+                        if (tp->issue_offset_99_event) {
+                                if (!(RTL_R8(tp, PHYstatus) & PowerSaveStatus)) {
+                                        tp->issue_offset_99_event = FALSE;
+                                        rtl8168_issue_offset_99_event(tp);
+                                }
+                        }
+                        break;
+                }
+        } else {
+                if (dynamic_aspm) {
+                        bool enable_hw_aspm_clkreq = true;
+                        if (tp->dynamic_aspm_packet_count > dynamic_aspm_packet_threshold)
+                                enable_hw_aspm_clkreq = false;
+
+                        rtl8168_enable_cfg9346_write(tp);
+                        rtl8168_hw_aspm_clkreq_enable(tp, enable_hw_aspm_clkreq);
+                        rtl8168_disable_cfg9346_write(tp);
+                }
+                tp->dynamic_aspm_packet_count = 0;
+        }
+}
+
+static void
+rtl8168_link_option(u8 *aut,
+                    u32 *spd,
+                    u8 *dup,
+                    u32 *adv)
+{
+        if ((*spd != SPEED_1000) && (*spd != SPEED_100) && (*spd != SPEED_10))
+                *spd = SPEED_1000;
+
+        if ((*dup != DUPLEX_FULL) && (*dup != DUPLEX_HALF))
+                *dup = DUPLEX_FULL;
+
+        if ((*aut != AUTONEG_ENABLE) && (*aut != AUTONEG_DISABLE))
+                *aut = AUTONEG_ENABLE;
+
+        *adv &= (ADVERTISED_10baseT_Half |
+                 ADVERTISED_10baseT_Full |
+                 ADVERTISED_100baseT_Half |
+                 ADVERTISED_100baseT_Full |
+                 ADVERTISED_1000baseT_Half |
+                 ADVERTISED_1000baseT_Full);
+        if (*adv == 0)
+                *adv = (ADVERTISED_10baseT_Half |
+                        ADVERTISED_10baseT_Full |
+                        ADVERTISED_100baseT_Half |
+                        ADVERTISED_100baseT_Full |
+                        ADVERTISED_1000baseT_Half |
+                        ADVERTISED_1000baseT_Full);
+}
+
+static void
+rtl8168_enable_ocp_phy_power_saving(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u16 val;
+
+        if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
+            tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
+            tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+            tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
+            tp->mcfg == CFG_METHOD_37) {
+                val = rtl8168_mdio_read_phy_ocp(tp, 0x0C41, 0x13);
+                if (val != 0x0050) {
+                        rtl8168_set_phy_mcu_patch_request(tp);
+                        rtl8168_mdio_write_phy_ocp(tp, 0x0C41, 0x13, 0x0000);
+                        rtl8168_mdio_write_phy_ocp(tp, 0x0C41, 0x13, 0x0050);
+                        rtl8168_clear_phy_mcu_patch_request(tp);
+                }
+        }
+}
+
+static void
+rtl8168_disable_ocp_phy_power_saving(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u16 val;
+
+        if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
+            tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
+            tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+            tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
+            tp->mcfg == CFG_METHOD_37) {
+                val = rtl8168_mdio_read_phy_ocp(tp, 0x0C41, 0x13);
+                if (val != 0x0500) {
+                        rtl8168_set_phy_mcu_patch_request(tp);
+                        rtl8168_mdio_write_phy_ocp(tp, 0x0C41, 0x13, 0x0000);
+                        rtl8168_mdio_write_phy_ocp(tp, 0x0C41, 0x13, 0x0500);
+                        rtl8168_clear_phy_mcu_patch_request(tp);
+                }
+        }
+}
+
+void
+rtl8168_wait_ll_share_fifo_ready(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int i;
+
+        for (i = 0; i < 10; i++) {
+                udelay(100);
+                if (RTL_R16(tp, 0xD2) & BIT_9)
+                        break;
+        }
+}
+
+static void
+rtl8168_disable_pci_offset_99(struct rtl8168_private *tp)
+{
+        u32 csi_tmp;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                csi_tmp = rtl8168_eri_read(tp, 0x3F2, 2, ERIAR_ExGMAC);
+                csi_tmp &= ~(BIT_0 | BIT_1);
+                rtl8168_eri_write(tp, 0x3F2, 2, csi_tmp, ERIAR_ExGMAC);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_26:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                rtl8168_csi_fun0_write_byte(tp, 0x99, 0x00);
+                break;
+        }
+}
+
+static void
+rtl8168_enable_pci_offset_99(struct rtl8168_private *tp)
+{
+        u32 csi_tmp;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_26:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                rtl8168_csi_fun0_write_byte(tp, 0x99, tp->org_pci_offset_99);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                csi_tmp = rtl8168_eri_read(tp, 0x3F2, 2, ERIAR_ExGMAC);
+                csi_tmp &= ~(BIT_0 | BIT_1);
+                if (tp->org_pci_offset_99 & (BIT_5 | BIT_6))
+                        csi_tmp |= BIT_1;
+                if (tp->org_pci_offset_99 & BIT_2)
+                        csi_tmp |= BIT_0;
+                rtl8168_eri_write(tp, 0x3F2, 2, csi_tmp, ERIAR_ExGMAC);
+                break;
+        }
+}
+
+static void
+rtl8168_init_pci_offset_99(struct rtl8168_private *tp)
+{
+        u32 csi_tmp;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_26:
+                if (tp->org_pci_offset_99 & BIT_2) {
+                        csi_tmp = rtl8168_eri_read(tp, 0x5C2, 1, ERIAR_ExGMAC);
+                        csi_tmp &= ~BIT_1;
+                        rtl8168_eri_write(tp, 0x5C2, 1, csi_tmp, ERIAR_ExGMAC);
+                }
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                csi_tmp = rtl8168_eri_read(tp, 0x3F2, 2, ERIAR_ExGMAC);
+                csi_tmp &= ~( BIT_8 | BIT_9  | BIT_10 | BIT_11  | BIT_12  | BIT_13  | BIT_14 | BIT_15 );
+                csi_tmp |= ( BIT_9 | BIT_10 | BIT_13  | BIT_14 | BIT_15 );
+                rtl8168_eri_write(tp, 0x3F2, 2, csi_tmp, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x3F5, 1, ERIAR_ExGMAC);
+                csi_tmp |= BIT_6 | BIT_7;
+                rtl8168_eri_write(tp, 0x3F5, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_mac_ocp_write(tp, 0xE02C, 0x1880);
+                rtl8168_mac_ocp_write(tp, 0xE02E, 0x4880);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_26:
+                rtl8168_eri_write(tp, 0x5C0, 1, 0xFA, ERIAR_ExGMAC);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_26:
+                if (tp->org_pci_offset_99 & BIT_2) {
+                        csi_tmp = rtl8168_eri_read(tp, 0x5C8, 1, ERIAR_ExGMAC);
+                        csi_tmp |= BIT_0;
+                        rtl8168_eri_write(tp, 0x5C8, 1, csi_tmp, ERIAR_ExGMAC);
+                }
+                break;
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                if (tp->org_pci_offset_99 & BIT_2)
+                        rtl8168_mac_ocp_write(tp, 0xE0A2, rtl8168_mac_ocp_read(tp, 0xE0A2) | BIT_0);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_23:
+                rtl8168_eri_write(tp, 0x2E8, 2, 0x883C, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2EA, 2, 0x8C12, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2EC, 2, 0x9003, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2E2, 2, 0x883C, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2E4, 2, 0x8C12, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2E6, 2, 0x9003, ERIAR_ExGMAC);
+                break;
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                rtl8168_eri_write(tp, 0x2E8, 2, 0x9003, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2EA, 2, 0x9003, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2EC, 2, 0x9003, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2E2, 2, 0x883C, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2E4, 2, 0x8C12, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x2E6, 2, 0x9003, ERIAR_ExGMAC);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+                csi_tmp = rtl8168_eri_read(tp, 0x3FA, 2, ERIAR_ExGMAC);
+                csi_tmp |= BIT_14;
+                rtl8168_eri_write(tp, 0x3FA, 2, csi_tmp, ERIAR_ExGMAC);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_26:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                if (tp->org_pci_offset_99 & BIT_2)
+                        RTL_W8(tp, 0xB6, RTL_R8(tp, 0xB6) | BIT_0);
+                break;
+        }
+
+        rtl8168_enable_pci_offset_99(tp);
+}
+
+static void
+rtl8168_disable_pci_offset_180(struct rtl8168_private *tp)
+{
+        u32 csi_tmp;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                csi_tmp = rtl8168_eri_read(tp, 0x1E2, 1, ERIAR_ExGMAC);
+                csi_tmp &= ~BIT_2;
+                rtl8168_eri_write(tp, 0x1E2, 1, csi_tmp, ERIAR_ExGMAC);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_26:
+                rtl8168_eri_write(tp, 0x1E9, 1, 0x0A, ERIAR_ExGMAC);
+                break;
+        }
+}
+
+static void
+rtl8168_enable_pci_offset_180(struct rtl8168_private *tp)
+{
+        u32 csi_tmp;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_25:
+        case CFG_METHOD_28:
+                csi_tmp = rtl8168_eri_read(tp, 0x1E8, 4, ERIAR_ExGMAC);
+                csi_tmp &= ~(0x0000FF00);
+                csi_tmp |= (0x00006400);
+                rtl8168_eri_write(tp, 0x1E8, 4, csi_tmp, ERIAR_ExGMAC);
+
+                csi_tmp = rtl8168_eri_read(tp, 0x1E4, 4, ERIAR_ExGMAC);
+                csi_tmp &= ~(0x0000FF00);
+                rtl8168_eri_write(tp, 0x1E4, 4, csi_tmp, ERIAR_ExGMAC);
+                break;
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+                csi_tmp = rtl8168_eri_read(tp, 0x1E8, 4, ERIAR_ExGMAC);
+                csi_tmp &= ~(0x0000FFF0);
+                csi_tmp |= (0x00000640);
+                rtl8168_eri_write(tp, 0x1E8, 4, csi_tmp, ERIAR_ExGMAC);
+
+                csi_tmp = rtl8168_eri_read(tp, 0x1E4, 4, ERIAR_ExGMAC);
+                csi_tmp &= ~(0x0000FF00);
+                rtl8168_eri_write(tp, 0x1E4, 4, csi_tmp, ERIAR_ExGMAC);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+                csi_tmp = rtl8168_eri_read(tp, 0x1E8, 2, ERIAR_ExGMAC);
+                csi_tmp &= ~(0xFFF0);
+                csi_tmp |= 0x0640;
+                rtl8168_eri_write(tp,0x1E8, 2, csi_tmp, ERIAR_ExGMAC);
+
+                csi_tmp = rtl8168_eri_read(tp, 0x1E4, 2, ERIAR_ExGMAC);
+                csi_tmp &= ~(0xFF00);
+                rtl8168_eri_write(tp, 0x1E4, 2, csi_tmp, ERIAR_ExGMAC);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                csi_tmp = rtl8168_eri_read(tp, 0x1E2, 1, ERIAR_ExGMAC);
+                csi_tmp |= BIT_2;
+                rtl8168_eri_write(tp, 0x1E2, 1, csi_tmp, ERIAR_ExGMAC);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_26:
+                rtl8168_eri_write(tp, 0x1E9, 1, 0x64, ERIAR_ExGMAC);
+                break;
+        }
+
+        rtl8168_mac_ocp_write(tp, 0xE094, 0x0000);
+}
+
+static void
+rtl8168_init_pci_offset_180(struct rtl8168_private *tp)
+{
+        rtl8168_enable_pci_offset_180(tp);
+}
+
+static void
+rtl8168_set_pci_99_180_exit_driver_para(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                if (tp->org_pci_offset_99 & BIT_2)
+                        rtl8168_issue_offset_99_event(tp);
+                rtl8168_disable_pci_offset_99(tp);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                rtl8168_disable_pci_offset_180(tp);
+                break;
+        }
+}
+
+static void
+rtl8168_set_rx_q_num(struct rtl8168_private *tp,
+                     unsigned int num_rx_queues)
+{
+        u16 q_ctrl;
+        u16 rx_q_num;
+
+        if (tp->HwSuppRxDescType != RX_DESC_RING_TYPE_2)
+                return;
+
+        if (num_rx_queues > tp->HwSuppNumRxQueues ||
+            num_rx_queues < 1)
+                num_rx_queues = 1;
+
+        rx_q_num = (u16)ilog2(num_rx_queues);
+        rx_q_num &= (BIT_0 | BIT_1 | BIT_2);
+        rx_q_num <<= 2;
+        q_ctrl = rtl8168_eri_read(tp, Q_NUM_CTRL_8168, 2, ERIAR_ExGMAC);
+        q_ctrl &= ~(BIT_2 | BIT_3 | BIT_4);
+        q_ctrl |= rx_q_num;
+        rtl8168_eri_write(tp, Q_NUM_CTRL_8168, 2, q_ctrl, ERIAR_ExGMAC);
+}
+
+void
+rtl8168_set_rx_vlan_filter(struct rtl8168_private *tp)
+{
+        int i;
+
+        if (tp->HwSuppRxDescType != RX_DESC_RING_TYPE_2)
+                return;
+
+        for (i = 1; i < 16; i++) {
+                rtl8168_eri_write(tp, 0xf0 + 8*i, 4, 0xffff0000, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xf4 + 8*i, 4, 0xffffffff, ERIAR_ExGMAC);
+        }
+}
+
+static void
+rtl8168_hw_d3_para(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_1 ... CFG_METHOD_26:
+                RTL_W16(tp, RxMaxSize, RX_BUF_SIZE + 1);
+                break;
+        default:
+                RTL_W16(tp, RxMaxSize, RX_BUF_SIZE);
+                break;
+        }
+
+        if (tp->HwSuppAspmClkIntrLock) {
+                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7);
+                rtl8168_enable_cfg9346_write(tp);
+                rtl8168_hw_aspm_clkreq_enable(tp, false);
+                rtl8168_disable_cfg9346_write(tp);
+        }
+
+        rtl8168_disable_exit_l1_mask(tp);
+
+#ifdef ENABLE_REALWOW_SUPPORT
+        rtl8168_set_realwow_d3_para(dev);
+#endif
+        rtl8168_set_rx_q_num(tp, 1);
+
+        if (tp->mcfg == CFG_METHOD_18 || tp->mcfg == CFG_METHOD_19 || tp->mcfg == CFG_METHOD_20) {
+                rtl8168_eri_write(tp, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1dc, 4, 0x0000002d, ERIAR_ExGMAC);
+        } else if (tp->mcfg == CFG_METHOD_16) {
+                rtl8168_eri_write(tp, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0x1dc, 4, 0x0000003f, ERIAR_ExGMAC);
+        }
+
+        if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
+            tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_24 ||
+            tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
+            tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28)
+                rtl8168_eri_write(tp, 0x2F8, 2, 0x0064, ERIAR_ExGMAC);
+
+        if (tp->bios_setting & BIT_28) {
+                if (tp->mcfg == CFG_METHOD_18 || tp->mcfg == CFG_METHOD_19 ||
+                    tp->mcfg == CFG_METHOD_20) {
+                        u32 gphy_val;
+
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                        rtl8168_mdio_write(tp, 0x04, 0x0061);
+                        rtl8168_mdio_write(tp, 0x09, 0x0000);
+                        rtl8168_mdio_write(tp, 0x00, 0x9200);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                        rtl8168_mdio_write(tp, 0x05, 0x8B80);
+                        gphy_val = rtl8168_mdio_read(tp, 0x06);
+                        gphy_val &= ~BIT_7;
+                        rtl8168_mdio_write(tp, 0x06, gphy_val);
+                        mdelay(1);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                        rtl8168_mdio_write(tp, 0x1E, 0x002C);
+                        gphy_val = rtl8168_mdio_read(tp, 0x16);
+                        gphy_val &= ~BIT_10;
+                        rtl8168_mdio_write(tp, 0x16, gphy_val);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                }
+        }
+
+        rtl8168_set_pci_99_180_exit_driver_para(dev);
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+                rtl8168_set_mcu_ocp_bit(tp, 0xD438, BIT_3);
+                rtl8168_set_mcu_ocp_bit(tp, 0xD438, BIT_2);
+                rtl8168_clear_mcu_ocp_bit(tp, 0xDE28, (BIT_1 | BIT_0));
+                rtl8168_set_mcu_ocp_bit(tp, 0xD438, (BIT_1 | BIT_0));
+                break;
+        }
+
+        /*disable ocp phy power saving*/
+        if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
+            tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
+            tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+            tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
+            tp->mcfg == CFG_METHOD_37)
+                if (!tp->dash_printer_enabled)
+                        rtl8168_disable_ocp_phy_power_saving(dev);
+
+        rtl8168_disable_rxdvgate(dev);
+}
+
+static void
+rtl8168_enable_magic_packet(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u32 csi_tmp;
+
+        switch (tp->HwSuppMagicPktVer) {
+        case WAKEUP_MAGIC_PACKET_V1:
+                rtl8168_enable_cfg9346_write(tp);
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) | MagicPacket);
+                rtl8168_disable_cfg9346_write(tp);
+                break;
+        case WAKEUP_MAGIC_PACKET_V2:
+                csi_tmp = rtl8168_eri_read(tp, 0xDE, 1, ERIAR_ExGMAC);
+                csi_tmp |= BIT_0;
+                rtl8168_eri_write(tp, 0xDE, 1, csi_tmp, ERIAR_ExGMAC);
+                break;
+        }
+}
+static void
+rtl8168_disable_magic_packet(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u32 csi_tmp;
+
+        switch (tp->HwSuppMagicPktVer) {
+        case WAKEUP_MAGIC_PACKET_V1:
+                rtl8168_enable_cfg9346_write(tp);
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~MagicPacket);
+                rtl8168_disable_cfg9346_write(tp);
+                break;
+        case WAKEUP_MAGIC_PACKET_V2:
+                csi_tmp = rtl8168_eri_read(tp, 0xDE, 1, ERIAR_ExGMAC);
+                csi_tmp &= ~BIT_0;
+                rtl8168_eri_write(tp, 0xDE, 1, csi_tmp, ERIAR_ExGMAC);
+                break;
+        }
+}
+
+#define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
+
+static void
+rtl8168_get_hw_wol(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u8 options;
+        u32 csi_tmp;
+
+        if (disable_wol_support)
+                goto out;
+
+        tp->wol_opts = 0;
+        options = RTL_R8(tp, Config1);
+        if (!(options & PMEnable))
+                goto out;
+
+        options = RTL_R8(tp, Config3);
+        if (options & LinkUp)
+                tp->wol_opts |= WAKE_PHY;
+
+        switch (tp->HwSuppMagicPktVer) {
+        case WAKEUP_MAGIC_PACKET_V2:
+                csi_tmp = rtl8168_eri_read(tp, 0xDE, 1, ERIAR_ExGMAC);
+                if (csi_tmp & BIT_0)
+                        tp->wol_opts |= WAKE_MAGIC;
+                break;
+        default:
+                if (options & MagicPacket)
+                        tp->wol_opts |= WAKE_MAGIC;
+                break;
+        }
+
+        options = RTL_R8(tp, Config5);
+        if (options & UWF)
+                tp->wol_opts |= WAKE_UCAST;
+        if (options & BWF)
+                tp->wol_opts |= WAKE_BCAST;
+        if (options & MWF)
+                tp->wol_opts |= WAKE_MCAST;
+
+out:
+        tp->wol_enabled = (tp->wol_opts || tp->dash_printer_enabled) ? WOL_ENABLED : WOL_DISABLED;
+}
+
+static void
+rtl8168_set_hw_wol(struct net_device *dev, u32 wolopts)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int i,tmp;
+        static struct {
+                u32 opt;
+                u16 reg;
+                u8  mask;
+        } cfg[] = {
+                { WAKE_PHY,   Config3, LinkUp },
+                { WAKE_UCAST, Config5, UWF },
+                { WAKE_BCAST, Config5, BWF },
+                { WAKE_MCAST, Config5, MWF },
+                { WAKE_ANY,   Config5, LanWake },
+                { WAKE_MAGIC, Config3, MagicPacket },
+        };
+
+        switch (tp->HwSuppMagicPktVer) {
+        case WAKEUP_MAGIC_PACKET_V2:
+                tmp = ARRAY_SIZE(cfg) - 1;
+
+                if (wolopts & WAKE_MAGIC)
+                        rtl8168_enable_magic_packet(dev);
+                else
+                        rtl8168_disable_magic_packet(dev);
+                break;
+        default:
+                tmp = ARRAY_SIZE(cfg);
+                break;
+        }
+
+        rtl8168_enable_cfg9346_write(tp);
+
+        for (i = 0; i < tmp; i++) {
+                u8 options = RTL_R8(tp, cfg[i].reg) & ~cfg[i].mask;
+                if (wolopts & cfg[i].opt)
+                        options |= cfg[i].mask;
+                RTL_W8(tp, cfg[i].reg, options);
+        }
+
+        if (tp->dash_printer_enabled)
+                RTL_W8(tp, Config5, RTL_R8(tp, Config5) | LanWake);
+
+        rtl8168_disable_cfg9346_write(tp);
+}
+
+static void
+rtl8168_phy_restart_nway(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        if (rtl8168_is_in_phy_disable_mode(dev))
+                return;
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        rtl8168_mdio_write(tp, MII_BMCR, BMCR_RESET | BMCR_ANENABLE | BMCR_ANRESTART);
+}
+
+static void
+rtl8168_phy_setup_force_mode(struct net_device *dev, u32 speed, u8 duplex)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u16 bmcr_true_force = 0;
+
+        if (rtl8168_is_in_phy_disable_mode(dev))
+                return;
+
+        if ((speed == SPEED_10) && (duplex == DUPLEX_HALF)) {
+                bmcr_true_force = BMCR_SPEED10;
+        } else if ((speed == SPEED_10) && (duplex == DUPLEX_FULL)) {
+                bmcr_true_force = BMCR_SPEED10 | BMCR_FULLDPLX;
+        } else if ((speed == SPEED_100) && (duplex == DUPLEX_HALF)) {
+                bmcr_true_force = BMCR_SPEED100;
+        } else if ((speed == SPEED_100) && (duplex == DUPLEX_FULL)) {
+                bmcr_true_force = BMCR_SPEED100 | BMCR_FULLDPLX;
+        } else {
+                netif_err(tp, drv, dev, "Failed to set phy force mode!\n");
+                return;
+        }
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        rtl8168_mdio_write(tp, MII_BMCR, bmcr_true_force);
+}
+
+static void
+rtl8168_set_pci_pme(struct rtl8168_private *tp, int set)
+{
+        struct pci_dev *pdev = tp->pci_dev;
+        u16 pmc;
+
+        if (!pdev->pm_cap)
+                return;
+
+        pci_read_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, &pmc);
+        pmc |= PCI_PM_CTRL_PME_STATUS;
+        if (set)
+                pmc |= PCI_PM_CTRL_PME_ENABLE;
+        else
+                pmc &= ~PCI_PM_CTRL_PME_ENABLE;
+        pci_write_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, pmc);
+}
+
+static void
+rtl8168_set_wol_link_speed(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int auto_nego;
+        int giga_ctrl;
+        u32 adv;
+        u16 anlpar;
+        u16 gbsr;
+        u16 aner;
+
+        if (tp->autoneg != AUTONEG_ENABLE)
+                goto exit;
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+        auto_nego = rtl8168_mdio_read(tp, MII_ADVERTISE);
+        auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL
+                       | ADVERTISE_100HALF | ADVERTISE_100FULL);
+
+        giga_ctrl = rtl8168_mdio_read(tp, MII_CTRL1000);
+        giga_ctrl &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL);
+
+        aner = tp->phy_reg_aner;
+        anlpar = tp->phy_reg_anlpar;
+        gbsr = tp->phy_reg_gbsr;
+        if (tp->link_ok(dev)) {
+                aner = rtl8168_mdio_read(tp, MII_EXPANSION);
+                anlpar = rtl8168_mdio_read(tp, MII_LPA);
+                gbsr = rtl8168_mdio_read(tp, MII_STAT1000);
+        }
+
+        adv = tp->advertising;
+        if ((aner | anlpar | gbsr) == 0) {
+                int auto_nego_tmp = 0;
+
+                if (adv & ADVERTISED_10baseT_Half)
+                        auto_nego_tmp |= ADVERTISE_10HALF;
+                if (adv & ADVERTISED_10baseT_Full)
+                        auto_nego_tmp |= ADVERTISE_10FULL;
+                if (adv & ADVERTISED_100baseT_Half)
+                        auto_nego_tmp |= ADVERTISE_100HALF;
+                if (adv & ADVERTISED_100baseT_Full)
+                        auto_nego_tmp |= ADVERTISE_100FULL;
+
+                if (auto_nego_tmp == 0)
+                        goto exit;
+
+                auto_nego |= auto_nego_tmp;
+                goto skip_check_lpa;
+        }
+        if (!(aner & EXPANSION_NWAY))
+                goto exit;
+
+        if ((adv & ADVERTISED_10baseT_Half) && (anlpar & LPA_10HALF))
+                auto_nego |= ADVERTISE_10HALF;
+        else if ((adv & ADVERTISED_10baseT_Full) && (anlpar & LPA_10FULL))
+                auto_nego |= ADVERTISE_10FULL;
+        else if ((adv & ADVERTISED_100baseT_Half) && (anlpar & LPA_100HALF))
+                auto_nego |= ADVERTISE_100HALF;
+        else if ((adv & ADVERTISED_100baseT_Full) && (anlpar & LPA_100FULL))
+                auto_nego |= ADVERTISE_100FULL;
+        else if (adv & ADVERTISED_1000baseT_Half && (gbsr & LPA_1000HALF))
+                giga_ctrl |= ADVERTISE_1000HALF;
+        else if (adv & ADVERTISED_1000baseT_Full && (gbsr & LPA_1000FULL))
+                giga_ctrl |= ADVERTISE_1000FULL;
+        else
+                goto exit;
+
+skip_check_lpa:
+        if (tp->DASH)
+                auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL);
+
+        if (((tp->mcfg == CFG_METHOD_7) || (tp->mcfg == CFG_METHOD_8)) && (RTL_R16(tp, CPlusCmd) & ASF))
+                auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL);
+
+#ifdef CONFIG_DOWN_SPEED_100
+        auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL);
+#endif
+
+        rtl8168_mdio_write(tp, MII_ADVERTISE, auto_nego);
+        rtl8168_mdio_write(tp, MII_CTRL1000, giga_ctrl);
+
+        rtl8168_phy_restart_nway(dev);
+
+exit:
+        return;
+}
+
+static void
+rtl8168_powerdown_pll(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        if (tp->wol_enabled == WOL_ENABLED || tp->DASH || tp->EnableKCPOffload) {
+                rtl8168_set_hw_wol(dev, tp->wol_opts);
+
+                if (tp->mcfg == CFG_METHOD_16 || tp->mcfg == CFG_METHOD_17 ||
+                    tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
+                    tp->mcfg == CFG_METHOD_24 || tp->mcfg == CFG_METHOD_25 ||
+                    tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_23 ||
+                    tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
+                    tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+                    tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+                    tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+                    tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36) {
+                        rtl8168_enable_cfg9346_write(tp);
+                        RTL_W8(tp, Config2, RTL_R8(tp, Config2) | PMSTS_En);
+                        rtl8168_disable_cfg9346_write(tp);
+                }
+
+                /* Enable the PME and clear the status */
+                rtl8168_set_pci_pme(tp, 1);
+
+#ifdef ENABLE_FIBER_SUPPORT
+                if (HW_FIBER_MODE_ENABLED(tp))
+                        return;
+#endif //ENABLE_FIBER_SUPPORT
+
+                if (HW_SUPP_SERDES_PHY(tp))
+                        return;
+
+                rtl8168_set_wol_link_speed(dev);
+
+                RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) | AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
+
+                return;
+        }
+
+        rtl8168_set_hw_wol(dev, 0);
+
+#ifdef ENABLE_FIBER_SUPPORT
+        if (HW_FIBER_MODE_ENABLED(tp))
+                return;
+#endif //ENABLE_FIBER_SUPPORT
+
+        if (tp->DASH)
+                return;
+
+        if (((tp->mcfg == CFG_METHOD_7) || (tp->mcfg == CFG_METHOD_8)) && (RTL_R16(tp, CPlusCmd) & ASF))
+                return;
+
+        rtl8168_phy_power_down(dev);
+
+        if (!tp->HwIcVerUnknown) {
+                switch (tp->mcfg) {
+                case CFG_METHOD_9:
+                case CFG_METHOD_10:
+                //case CFG_METHOD_11:
+                case CFG_METHOD_12:
+                case CFG_METHOD_13:
+                case CFG_METHOD_14:
+                case CFG_METHOD_15:
+                case CFG_METHOD_17:
+                case CFG_METHOD_18:
+                case CFG_METHOD_19:
+                case CFG_METHOD_21:
+                case CFG_METHOD_22:
+                case CFG_METHOD_24:
+                case CFG_METHOD_25:
+                case CFG_METHOD_26:
+                case CFG_METHOD_27:
+                case CFG_METHOD_28:
+                case CFG_METHOD_29:
+                case CFG_METHOD_30:
+                case CFG_METHOD_31:
+                case CFG_METHOD_32:
+                case CFG_METHOD_33:
+                case CFG_METHOD_34:
+                case CFG_METHOD_35:
+                case CFG_METHOD_36:
+                        RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~BIT_7);
+                        break;
+                }
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_14 ... CFG_METHOD_15:
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_6);
+                break;
+        case CFG_METHOD_16 ... CFG_METHOD_36:
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_6);
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_6);
+                break;
+        }
+}
+
+static void rtl8168_powerup_pll(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_9:
+        case CFG_METHOD_10:
+        case CFG_METHOD_11:
+        case CFG_METHOD_12:
+        case CFG_METHOD_13:
+        case CFG_METHOD_14:
+        case CFG_METHOD_15:
+        case CFG_METHOD_17:
+        case CFG_METHOD_18:
+        case CFG_METHOD_19:
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+                RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | BIT_7 | BIT_6);
+                break;
+        }
+
+        rtl8168_phy_power_up(dev);
+}
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
+static void
+rtl8168_get_wol(struct net_device *dev,
+                struct ethtool_wolinfo *wol)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u8 options;
+
+        wol->wolopts = wol->supported = 0;
+
+        if (disable_wol_support)
+                return;
+
+        wol->supported = WAKE_ANY;
+
+        options = RTL_R8(tp, Config1);
+        if (!(options & PMEnable))
+                return;
+
+        wol->wolopts = tp->wol_opts;
+}
+
+static int
+rtl8168_set_wol(struct net_device *dev,
+                struct ethtool_wolinfo *wol)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        if (disable_wol_support)
+                return -EOPNOTSUPP;
+
+        tp->wol_opts = wol->wolopts;
+
+        tp->wol_enabled = (tp->wol_opts || tp->dash_printer_enabled) ? WOL_ENABLED : WOL_DISABLED;
+
+        device_set_wakeup_enable(tp_to_dev(tp), tp->wol_enabled);
+
+        return 0;
+}
+
+static void
+rtl8168_get_drvinfo(struct net_device *dev,
+                    struct ethtool_drvinfo *info)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        struct rtl8168_fw *rtl_fw = tp->rtl_fw;
+
+        strcpy(info->driver, MODULENAME);
+        strcpy(info->version, RTL8168_VERSION);
+        strncpy(info->bus_info, pci_name(tp->pci_dev), sizeof(info->bus_info) - 1);
+        info->regdump_len = R8168_REGS_DUMP_SIZE;
+        info->eedump_len = tp->eeprom_len;
+        BUILD_BUG_ON(sizeof(info->fw_version) < sizeof(rtl_fw->version));
+        if (rtl_fw)
+                strlcpy(info->fw_version, rtl_fw->version,
+                        sizeof(info->fw_version));
+}
+
+static int
+rtl8168_get_regs_len(struct net_device *dev)
+{
+        return R8168_REGS_DUMP_SIZE;
+}
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
+
+static int
+rtl8168_set_speed_xmii(struct net_device *dev,
+                       u8 autoneg,
+                       u32 speed,
+                       u8 duplex,
+                       u32 adv)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int auto_nego = 0;
+        int giga_ctrl = 0;
+        int rc = -EINVAL;
+
+        if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+            tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36) {
+                //Disable Giga Lite
+                rtl8168_mdio_write(tp, 0x1F, 0x0A42);
+                rtl8168_clear_eth_phy_bit(tp, 0x14, BIT_9);
+                if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+                    tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34)
+                        rtl8168_clear_eth_phy_bit(tp, 0x14, BIT_7);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A40);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        }
+
+        if ((speed != SPEED_1000) &&
+            (speed != SPEED_100) &&
+            (speed != SPEED_10)) {
+                speed = SPEED_1000;
+                duplex = DUPLEX_FULL;
+        }
+
+        giga_ctrl = rtl8168_mdio_read(tp, MII_CTRL1000);
+        giga_ctrl &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL);
+
+        if (autoneg == AUTONEG_ENABLE) {
+                /*n-way force*/
+                auto_nego = rtl8168_mdio_read(tp, MII_ADVERTISE);
+                auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
+                               ADVERTISE_100HALF | ADVERTISE_100FULL |
+                               ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
+
+                if (adv & ADVERTISED_10baseT_Half)
+                        auto_nego |= ADVERTISE_10HALF;
+                if (adv & ADVERTISED_10baseT_Full)
+                        auto_nego |= ADVERTISE_10FULL;
+                if (adv & ADVERTISED_100baseT_Half)
+                        auto_nego |= ADVERTISE_100HALF;
+                if (adv & ADVERTISED_100baseT_Full)
+                        auto_nego |= ADVERTISE_100FULL;
+                if (adv & ADVERTISED_1000baseT_Half)
+                        giga_ctrl |= ADVERTISE_1000HALF;
+                if (adv & ADVERTISED_1000baseT_Full)
+                        giga_ctrl |= ADVERTISE_1000FULL;
+
+                //flow control
+                switch (tp->mcfg) {
+                case CFG_METHOD_1 ... CFG_METHOD_20:
+                        if (dev->mtu <= ETH_DATA_LEN && tp->fcpause == rtl8168_fc_full)
+                                auto_nego |= ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM;
+                        break;
+                default:
+                        if (tp->fcpause == rtl8168_fc_full)
+                                auto_nego |= ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM;
+                        break;
+                }
+
+                tp->phy_auto_nego_reg = auto_nego;
+                tp->phy_1000_ctrl_reg = giga_ctrl;
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                rtl8168_mdio_write(tp, MII_ADVERTISE, auto_nego);
+                rtl8168_mdio_write(tp, MII_CTRL1000, giga_ctrl);
+                rtl8168_phy_restart_nway(dev);
+                mdelay(20);
+        } else {
+                /*true force*/
+                if (speed == SPEED_10 || speed == SPEED_100)
+                        rtl8168_phy_setup_force_mode(dev, speed, duplex);
+                else
+                        goto out;
+        }
+
+        tp->autoneg = autoneg;
+        tp->speed = speed;
+        tp->duplex = duplex;
+        tp->advertising = adv;
+
+        if (tp->mcfg == CFG_METHOD_11)
+                rtl8168dp_10mbps_gphy_para(dev);
+
+        rc = 0;
+out:
+        return rc;
+}
+
+static int
+rtl8168_set_speed(struct net_device *dev,
+                  u8 autoneg,
+                  u32 speed,
+                  u8 duplex,
+                  u32 adv)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int ret;
+
+        ret = tp->set_speed(dev, autoneg, speed, duplex, adv);
+
+        return ret;
+}
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
+static int
+rtl8168_set_settings(struct net_device *dev,
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
+                     struct ethtool_cmd *cmd
+#else
+                     const struct ethtool_link_ksettings *cmd
+#endif
+                    )
+{
+        int ret;
+        u8 autoneg;
+        u32 speed;
+        u8 duplex;
+        u32 supported, advertising;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
+        autoneg = cmd->autoneg;
+        speed = cmd->speed;
+        duplex = cmd->duplex;
+        supported = cmd->supported;
+        advertising = cmd->advertising;
+#else
+        const struct ethtool_link_settings *base = &cmd->base;
+        autoneg = base->autoneg;
+        speed = base->speed;
+        duplex = base->duplex;
+        ethtool_convert_link_mode_to_legacy_u32(&supported,
+                                                cmd->link_modes.supported);
+        ethtool_convert_link_mode_to_legacy_u32(&advertising,
+                                                cmd->link_modes.advertising);
+#endif
+        if (advertising & ~supported)
+                return -EINVAL;
+
+        ret = rtl8168_set_speed(dev, autoneg, speed, duplex, advertising);
+
+        return ret;
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
+static u32
+rtl8168_get_tx_csum(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u32 ret;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+        ret = ((dev->features & NETIF_F_IP_CSUM) != 0);
+#else
+        ret = ((dev->features & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)) != 0);
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+
+        return ret;
+}
+
+static u32
+rtl8168_get_rx_csum(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u32 ret;
+
+        ret = tp->cp_cmd & RxChkSum;
+
+        return ret;
+}
+
+static int
+rtl8168_set_tx_csum(struct net_device *dev,
+                    u32 data)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        if (tp->mcfg == CFG_METHOD_DEFAULT)
+                return -EOPNOTSUPP;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+        if (data)
+                dev->features |= NETIF_F_IP_CSUM;
+        else
+                dev->features &= ~NETIF_F_IP_CSUM;
+#else
+        if (data)
+                if ((tp->mcfg == CFG_METHOD_1) || (tp->mcfg == CFG_METHOD_2) || (tp->mcfg == CFG_METHOD_3))
+                        dev->features |= NETIF_F_IP_CSUM;
+                else
+                        dev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
+        else
+                dev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+
+        return 0;
+}
+
+static int
+rtl8168_set_rx_csum(struct net_device *dev,
+                    u32 data)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        if (tp->mcfg == CFG_METHOD_DEFAULT)
+                return -EOPNOTSUPP;
+
+        if (data)
+                tp->cp_cmd |= RxChkSum;
+        else
+                tp->cp_cmd &= ~RxChkSum;
+
+        RTL_W16(tp, CPlusCmd, tp->cp_cmd);
+
+        return 0;
+}
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
+
+#ifdef CONFIG_R8168_VLAN
+
+static inline u32
+rtl8168_tx_vlan_tag(struct rtl8168_private *tp,
+                    struct sk_buff *skb)
+{
+        u32 tag;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+        tag = (tp->vlgrp && vlan_tx_tag_present(skb)) ?
+              TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
+#elif LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0)
+        tag = (vlan_tx_tag_present(skb)) ?
+              TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
+#else
+        tag = (skb_vlan_tag_present(skb)) ?
+              TxVlanTag | swab16(skb_vlan_tag_get(skb)) : 0x00;
+#endif
+
+        return tag;
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+
+static void
+rtl8168_vlan_rx_register(struct net_device *dev,
+                         struct vlan_group *grp)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        tp->vlgrp = grp;
+        if (tp->vlgrp)
+                tp->cp_cmd |= RxVlan;
+        else
+                tp->cp_cmd &= ~RxVlan;
+        RTL_W16(tp, CPlusCmd, tp->cp_cmd);
+        RTL_R16(tp, CPlusCmd);
+}
+
+#endif
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
+static void
+rtl8168_vlan_rx_kill_vid(struct net_device *dev,
+                         unsigned short vid)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)
+        if (tp->vlgrp)
+                tp->vlgrp->vlan_devices[vid] = NULL;
+#else
+        vlan_group_set_device(tp->vlgrp, vid, NULL);
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)
+}
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
+
+static int
+rtl8168_rx_vlan_skb(struct rtl8168_private *tp,
+                    struct RxDesc *desc,
+                    struct sk_buff *skb)
+{
+        u32 opts2 = le32_to_cpu(desc->opts2);
+        int ret = -1;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+        if (tp->vlgrp && (opts2 & RxVlanTag)) {
+                rtl8168_rx_hwaccel_skb(skb, tp->vlgrp,
+                                       swab16(opts2 & 0xffff));
+                ret = 0;
+        }
+#elif LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0)
+        if (opts2 & RxVlanTag)
+                __vlan_hwaccel_put_tag(skb, swab16(opts2 & 0xffff));
+#else
+        if (opts2 & RxVlanTag)
+                __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), swab16(opts2 & 0xffff));
+#endif
+
+        desc->opts2 = 0;
+        return ret;
+}
+
+#else /* !CONFIG_R8168_VLAN */
+
+static inline u32
+rtl8168_tx_vlan_tag(struct rtl8168_private *tp,
+                    struct sk_buff *skb)
+{
+        return 0;
+}
+
+static int
+rtl8168_rx_vlan_skb(struct rtl8168_private *tp,
+                    struct RxDesc *desc,
+                    struct sk_buff *skb)
+{
+        return -1;
+}
+
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)
+
+static netdev_features_t rtl8168_fix_features(struct net_device *dev,
+                netdev_features_t features)
+{
+        if (dev->mtu > MSS_MAX)
+                features &= ~NETIF_F_ALL_TSO;
+        if (dev->mtu > ETH_DATA_LEN) {
+                features &= ~NETIF_F_ALL_TSO;
+                features &= ~NETIF_F_ALL_CSUM;
+        }
+
+        return features;
+}
+
+static int rtl8168_hw_set_features(struct net_device *dev,
+                                   netdev_features_t features)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u32 rx_config;
+
+        rx_config = RTL_R32(tp, RxConfig);
+        if (features & NETIF_F_RXALL)
+                rx_config |= (AcceptErr | AcceptRunt);
+        else
+                rx_config &= ~(AcceptErr | AcceptRunt);
+
+        RTL_W32(tp, RxConfig, rx_config);
+
+        if (features & NETIF_F_RXCSUM)
+                tp->cp_cmd |= RxChkSum;
+        else
+                tp->cp_cmd &= ~RxChkSum;
+
+        if (features & NETIF_F_HW_VLAN_RX)
+                tp->cp_cmd |= RxVlan;
+        else
+                tp->cp_cmd &= ~RxVlan;
+
+        RTL_W16(tp, CPlusCmd, tp->cp_cmd);
+        RTL_R16(tp, CPlusCmd);
+
+        return 0;
+}
+
+static int rtl8168_set_features(struct net_device *dev,
+                                netdev_features_t features)
+{
+        features &= NETIF_F_RXALL | NETIF_F_RXCSUM | NETIF_F_HW_VLAN_RX;
+
+        if (features ^ dev->features)
+                rtl8168_hw_set_features(dev, features);
+
+        return 0;
+}
+
+#endif
+
+static void rtl8168_gset_xmii(struct net_device *dev,
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
+                              struct ethtool_cmd *cmd
+#else
+                              struct ethtool_link_ksettings *cmd
+#endif
+                             )
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u8 status;
+        u8 autoneg, duplex;
+        u32 speed = 0;
+        u16 bmcr, bmsr, anlpar, ctrl1000 = 0, stat1000 = 0;
+        u32 supported, advertising, lp_advertising;
+
+        supported = SUPPORTED_10baseT_Half |
+                    SUPPORTED_10baseT_Full |
+                    SUPPORTED_100baseT_Half |
+                    SUPPORTED_100baseT_Full |
+                    SUPPORTED_1000baseT_Full |
+                    SUPPORTED_Autoneg |
+                    SUPPORTED_TP |
+                    SUPPORTED_Pause |
+                    SUPPORTED_Asym_Pause;
+
+        advertising = ADVERTISED_TP;
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        bmcr = rtl8168_mdio_read(tp, MII_BMCR);
+        bmsr = rtl8168_mdio_read(tp, MII_BMSR);
+        anlpar = rtl8168_mdio_read(tp, MII_LPA);
+        ctrl1000 = rtl8168_mdio_read(tp, MII_CTRL1000);
+        stat1000 = rtl8168_mdio_read(tp, MII_STAT1000);
+
+        if (bmcr & BMCR_ANENABLE) {
+                advertising |= ADVERTISED_Autoneg;
+                autoneg = AUTONEG_ENABLE;
+
+                if (bmsr & BMSR_ANEGCOMPLETE) {
+                        lp_advertising = mii_lpa_to_ethtool_lpa_t(anlpar);
+                        lp_advertising |=
+                                mii_stat1000_to_ethtool_lpa_t(stat1000);
+                } else {
+                        lp_advertising = 0;
+                }
+
+                if (tp->phy_auto_nego_reg & ADVERTISE_10HALF)
+                        advertising |= ADVERTISED_10baseT_Half;
+                if (tp->phy_auto_nego_reg & ADVERTISE_10FULL)
+                        advertising |= ADVERTISED_10baseT_Full;
+                if (tp->phy_auto_nego_reg & ADVERTISE_100HALF)
+                        advertising |= ADVERTISED_100baseT_Half;
+                if (tp->phy_auto_nego_reg & ADVERTISE_100FULL)
+                        advertising |= ADVERTISED_100baseT_Full;
+                if (tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL)
+                        advertising |= ADVERTISED_1000baseT_Full;
+        } else {
+                autoneg = AUTONEG_DISABLE;
+                lp_advertising = 0;
+        }
+
+        status = RTL_R8(tp, PHYstatus);
+
+        if (status & LinkStatus) {
+                /*link on*/
+                if (status & _1000bpsF)
+                        speed = SPEED_1000;
+                else if (status & _100bps)
+                        speed = SPEED_100;
+                else if (status & _10bps)
+                        speed = SPEED_10;
+
+                if (status & TxFlowCtrl)
+                        advertising |= ADVERTISED_Asym_Pause;
+
+                if (status & RxFlowCtrl)
+                        advertising |= ADVERTISED_Pause;
+
+                duplex = ((status & _1000bpsF) || (status & FullDup)) ?
+                         DUPLEX_FULL : DUPLEX_HALF;
+        } else {
+                /*link down*/
+                speed = SPEED_UNKNOWN;
+                duplex = DUPLEX_UNKNOWN;
+        }
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
+        cmd->supported = supported;
+        cmd->advertising = advertising;
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,30)
+        cmd->lp_advertising = lp_advertising;
+#endif
+        cmd->autoneg = autoneg;
+        cmd->speed = speed;
+        cmd->duplex = duplex;
+        cmd->port = PORT_TP;
+#else
+        ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
+                                                supported);
+        ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
+                                                advertising);
+        ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.lp_advertising,
+                                                lp_advertising);
+        cmd->base.autoneg = autoneg;
+        cmd->base.speed = speed;
+        cmd->base.duplex = duplex;
+        cmd->base.port = PORT_TP;
+#endif
+}
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
+static int
+rtl8168_get_settings(struct net_device *dev,
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
+                     struct ethtool_cmd *cmd
+#else
+                     struct ethtool_link_ksettings *cmd
+#endif
+                    )
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        tp->get_settings(dev, cmd);
+
+        return 0;
+}
+
+static void rtl8168_get_regs(struct net_device *dev, struct ethtool_regs *regs,
+                             void *p)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        void __iomem *ioaddr = tp->mmio_addr;
+        unsigned int i;
+        u8 *data = p;
+
+        if (regs->len < R8168_REGS_DUMP_SIZE)
+                return /* -EINVAL */;
+
+        memset(p, 0, regs->len);
+
+        for (i = 0; i < R8168_MAC_REGS_SIZE; i++)
+                *data++ = readb(ioaddr + i);
+        data = (u8*)p + 256;
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        for (i = 0; i < R8168_PHY_REGS_SIZE/2; i++) {
+                *(u16*)data = rtl8168_mdio_read(tp, i);
+                data += 2;
+        }
+        data = (u8*)p + 256 * 2;
+
+        for (i = 0; i < R8168_EPHY_REGS_SIZE/2; i++) {
+                *(u16*)data = rtl8168_ephy_read(tp, i);
+                data += 2;
+        }
+        data = (u8*)p + 256 * 3;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_1:
+        case CFG_METHOD_2:
+        case CFG_METHOD_3:
+                /* RTL8168B does not support Extend GMAC */
+                break;
+        default:
+                for (i = 0; i < R8168_ERI_REGS_SIZE; i+=4) {
+                        *(u32*)data = rtl8168_eri_read(tp, i , 4, ERIAR_ExGMAC);
+                        data += 4;
+                }
+                break;
+        }
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+static void rtl8168_get_pauseparam(struct net_device *dev,
+                                   struct ethtool_pauseparam *pause)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        pause->autoneg = (tp->autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
+        if (tp->fcpause == rtl8168_fc_rx_pause)
+                pause->rx_pause = 1;
+        else if (tp->fcpause == rtl8168_fc_tx_pause)
+                pause->tx_pause = 1;
+        else if (tp->fcpause == rtl8168_fc_full) {
+                pause->rx_pause = 1;
+                pause->tx_pause = 1;
+        }
+}
+
+static int rtl8168_set_pauseparam(struct net_device *dev,
+                                  struct ethtool_pauseparam *pause)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        enum rtl8168_fc_mode newfc;
+
+        if (pause->tx_pause || pause->rx_pause)
+                newfc = rtl8168_fc_full;
+        else
+                newfc = rtl8168_fc_none;
+
+        if (tp->fcpause != newfc) {
+                tp->fcpause = newfc;
+
+                rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
+        }
+
+        return 0;
+
+}
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+
+static u32
+rtl8168_get_msglevel(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        return tp->msg_enable;
+}
+
+static void
+rtl8168_set_msglevel(struct net_device *dev,
+                     u32 value)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        tp->msg_enable = value;
+}
+
+static const char rtl8168_gstrings[][ETH_GSTRING_LEN] = {
+        "tx_packets",
+        "rx_packets",
+        "tx_errors",
+        "rx_errors",
+        "rx_missed",
+        "align_errors",
+        "tx_single_collisions",
+        "tx_multi_collisions",
+        "unicast",
+        "broadcast",
+        "multicast",
+        "tx_aborted",
+        "tx_underrun",
+};
+#endif //#LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
+static int rtl8168_get_stats_count(struct net_device *dev)
+{
+        return ARRAY_SIZE(rtl8168_gstrings);
+}
+#endif //#LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
+#else
+static int rtl8168_get_sset_count(struct net_device *dev, int sset)
+{
+        switch (sset) {
+        case ETH_SS_STATS:
+                return ARRAY_SIZE(rtl8168_gstrings);
+        default:
+                return -EOPNOTSUPP;
+        }
+}
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
+
+static void
+rtl8168_set_ring_size(struct rtl8168_private *tp, u32 rx, u32 tx)
+{
+        int i;
+
+        tp->num_rx_desc = rx;
+
+        for (i = 0; i < tp->num_tx_rings; i++)
+                tp->tx_ring[i].num_tx_desc = tx;
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+static void rtl8168_get_ringparam(struct net_device *dev,
+                                  struct ethtool_ringparam *ring,
+                                  struct kernel_ethtool_ringparam *kernel_ring,
+                                  struct netlink_ext_ack *extack)
+#else
+static void rtl8168_get_ringparam(struct net_device *dev,
+                                  struct ethtool_ringparam *ring)
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        ring->rx_max_pending = MAX_NUM_TX_DESC;
+        ring->tx_max_pending = MAX_NUM_RX_DESC;
+        ring->rx_pending = tp->num_rx_desc;
+        ring->tx_pending = tp->tx_ring[0].num_tx_desc;
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+static int rtl8168_set_ringparam(struct net_device *dev,
+                                 struct ethtool_ringparam *ring,
+                                 struct kernel_ethtool_ringparam *kernel_ring,
+                                 struct netlink_ext_ack *extack)
+#else
+static int rtl8168_set_ringparam(struct net_device *dev,
+                                 struct ethtool_ringparam *ring)
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u32 new_rx_count, new_tx_count;
+        int rc = 0;
+
+        if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
+                return -EINVAL;
+
+        new_tx_count = clamp_t(u32, ring->tx_pending,
+                               MIN_NUM_TX_DESC, MAX_NUM_TX_DESC);
+
+        new_rx_count = clamp_t(u32, ring->rx_pending,
+                               MIN_NUM_RX_DESC, MAX_NUM_RX_DESC);
+
+        if ((new_rx_count == tp->num_rx_desc) &&
+            (new_tx_count == tp->tx_ring[0].num_tx_desc)) {
+                /* nothing to do */
+                return 0;
+        }
+
+        if (netif_running(dev)) {
+                rtl8168_wait_for_quiescence(dev);
+                rtl8168_close(dev);
+        }
+
+        rtl8168_set_ring_size(tp, new_rx_count, new_tx_count);
+
+        if (netif_running(dev))
+                rc = rtl8168_open(dev);
+
+        return rc;
+}
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
+static void
+rtl8168_get_ethtool_stats(struct net_device *dev,
+                          struct ethtool_stats *stats,
+                          u64 *data)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        struct rtl8168_counters *counters;
+        dma_addr_t paddr;
+
+        ASSERT_RTNL();
+
+        counters = tp->tally_vaddr;
+        paddr = tp->tally_paddr;
+        if (!counters)
+                return;
+
+        rtl8168_dump_tally_counter(tp, paddr);
+
+        data[0] = le64_to_cpu(counters->tx_packets);
+        data[1] = le64_to_cpu(counters->rx_packets);
+        data[2] = le64_to_cpu(counters->tx_errors);
+        data[3] = le32_to_cpu(counters->rx_errors);
+        data[4] = le16_to_cpu(counters->rx_missed);
+        data[5] = le16_to_cpu(counters->align_errors);
+        data[6] = le32_to_cpu(counters->tx_one_collision);
+        data[7] = le32_to_cpu(counters->tx_multi_collision);
+        data[8] = le64_to_cpu(counters->rx_unicast);
+        data[9] = le64_to_cpu(counters->rx_broadcast);
+        data[10] = le32_to_cpu(counters->rx_multicast);
+        data[11] = le16_to_cpu(counters->tx_aborted);
+        data[12] = le16_to_cpu(counters->tx_underrun);
+}
+
+static void
+rtl8168_get_strings(struct net_device *dev,
+                    u32 stringset,
+                    u8 *data)
+{
+        switch (stringset) {
+        case ETH_SS_STATS:
+                memcpy(data, rtl8168_gstrings, sizeof(rtl8168_gstrings));
+                break;
+        }
+}
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
+
+static int rtl_get_eeprom_len(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        return tp->eeprom_len;
+}
+
+static int rtl_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *buf)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int i,j,ret;
+        int start_w, end_w;
+        int VPD_addr, VPD_data;
+        u32 *eeprom_buff;
+        u16 tmp;
+
+        if (tp->eeprom_type == EEPROM_TYPE_NONE) {
+                dev_printk(KERN_DEBUG, tp_to_dev(tp), "Detect none EEPROM\n");
+                return -EOPNOTSUPP;
+        } else if (eeprom->len == 0 || (eeprom->offset+eeprom->len) > tp->eeprom_len) {
+                dev_printk(KERN_DEBUG, tp_to_dev(tp), "Invalid parameter\n");
+                return -EINVAL;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_9:
+        case CFG_METHOD_10:
+                VPD_addr = 0xCE;
+                VPD_data = 0xD0;
+                break;
+
+        case CFG_METHOD_1:
+        case CFG_METHOD_2:
+        case CFG_METHOD_3:
+        case CFG_METHOD_11:
+        case CFG_METHOD_12:
+        case CFG_METHOD_13:
+                return -EOPNOTSUPP;
+        default:
+                VPD_addr = 0xD2;
+                VPD_data = 0xD4;
+                break;
+        }
+
+        start_w = eeprom->offset >> 2;
+        end_w = (eeprom->offset + eeprom->len - 1) >> 2;
+
+        eeprom_buff = kmalloc(sizeof(u32)*(end_w - start_w + 1), GFP_KERNEL);
+        if (!eeprom_buff)
+                return -ENOMEM;
+
+        rtl8168_enable_cfg9346_write(tp);
+        ret = -EFAULT;
+        for (i=start_w; i<=end_w; i++) {
+                pci_write_config_word(tp->pci_dev, VPD_addr, (u16)i*4);
+                ret = -EFAULT;
+                for (j = 0; j < 10; j++) {
+                        udelay(400);
+                        pci_read_config_word(tp->pci_dev, VPD_addr, &tmp);
+                        if (tmp&0x8000) {
+                                ret = 0;
+                                break;
+                        }
+                }
+
+                if (ret)
+                        break;
+
+                pci_read_config_dword(tp->pci_dev, VPD_data, &eeprom_buff[i-start_w]);
+        }
+        rtl8168_disable_cfg9346_write(tp);
+
+        if (!ret)
+                memcpy(buf, (u8 *)eeprom_buff + (eeprom->offset & 3), eeprom->len);
+
+        kfree(eeprom_buff);
+
+        return ret;
+}
+
+#undef ethtool_op_get_link
+#define ethtool_op_get_link _kc_ethtool_op_get_link
+static u32 _kc_ethtool_op_get_link(struct net_device *dev)
+{
+        return netif_carrier_ok(dev) ? 1 : 0;
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
+#undef ethtool_op_get_sg
+#define ethtool_op_get_sg _kc_ethtool_op_get_sg
+static u32 _kc_ethtool_op_get_sg(struct net_device *dev)
+{
+#ifdef NETIF_F_SG
+        return (dev->features & NETIF_F_SG) != 0;
+#else
+        return 0;
+#endif
+}
+
+#undef ethtool_op_set_sg
+#define ethtool_op_set_sg _kc_ethtool_op_set_sg
+static int _kc_ethtool_op_set_sg(struct net_device *dev, u32 data)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        if (tp->mcfg == CFG_METHOD_DEFAULT)
+                return -EOPNOTSUPP;
+
+#ifdef NETIF_F_SG
+        if (data)
+                dev->features |= NETIF_F_SG;
+        else
+                dev->features &= ~NETIF_F_SG;
+#endif
+
+        return 0;
+}
+#endif
+
+static void
+rtl8168_set_eee_lpi_timer(struct rtl8168_private *tp)
+{
+        u16 dev_lpi_timer;
+
+        dev_lpi_timer = tp->eee.tx_lpi_timer;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                rtl8168_mac_ocp_write(tp, EEE_TXIDLE_TIMER_8168, dev_lpi_timer);
+                break;
+        default:
+                break;
+        }
+}
+
+static int rtl8168_enable_eee(struct rtl8168_private *tp)
+{
+        int ret;
+        u16 data;
+        u32 csi_tmp;
+        struct ethtool_eee *eee = &tp->eee;
+        u16 eee_adv_t = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
+
+        ret = 0;
+        switch (tp->mcfg) {
+        case CFG_METHOD_14:
+        case CFG_METHOD_15:
+                rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                rtl8168_mdio_write(tp, 0x1E, 0x0020);
+                data = rtl8168_mdio_read(tp, 0x15) | 0x0100;
+                rtl8168_mdio_write(tp, 0x15, data);
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B85);
+                data = rtl8168_mdio_read(tp, 0x06) | 0x2000;
+                rtl8168_mdio_write(tp, 0x06, data);
+                rtl8168_mdio_write(tp, 0x1F, 0x0006);
+                rtl8168_mdio_write(tp, 0x00, 0x5A30);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                rtl8168_mdio_write(tp, 0x0D, 0x0007);
+                rtl8168_mdio_write(tp, 0x0E, 0x003C);
+                rtl8168_mdio_write(tp, 0x0D, 0x4007);
+                rtl8168_mdio_write(tp, 0x0E, 0x0006);
+                rtl8168_mdio_write(tp, 0x0D, 0x0000);
+                if ((RTL_R8(tp, Config4)&0x40) && (RTL_R8(tp, 0x6D) & BIT_7)) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                        rtl8168_mdio_write(tp, 0x05, 0x8AC8);
+                        rtl8168_mdio_write(tp, 0x06, RTL_R16(tp, tp->NicCustLedValue));
+                        rtl8168_mdio_write(tp, 0x05, 0x8B82);
+                        data = rtl8168_mdio_read(tp, 0x06) | 0x0010;
+                        rtl8168_mdio_write(tp, 0x05, 0x8B82);
+                        rtl8168_mdio_write(tp, 0x06, data);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                }
+                break;
+
+        case CFG_METHOD_16:
+        case CFG_METHOD_17:
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC) | 0x0003;
+                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_mdio_write(tp,0x1F , 0x0004);
+                rtl8168_mdio_write(tp,0x1F , 0x0007);
+                rtl8168_mdio_write(tp,0x1E , 0x0020);
+                data = rtl8168_mdio_read(tp, 0x15)|0x0100;
+                rtl8168_mdio_write(tp,0x15 , data);
+                rtl8168_mdio_write(tp,0x1F , 0x0002);
+                rtl8168_mdio_write(tp,0x1F , 0x0005);
+                rtl8168_mdio_write(tp,0x05 , 0x8B85);
+                data = rtl8168_mdio_read(tp, 0x06)|0x2000;
+                rtl8168_mdio_write(tp,0x06 , data);
+                rtl8168_mdio_write(tp,0x1F , 0x0000);
+                rtl8168_mdio_write(tp,0x0D , 0x0007);
+                rtl8168_mdio_write(tp,0x0E , 0x003C);
+                rtl8168_mdio_write(tp,0x0D , 0x4007);
+                rtl8168_mdio_write(tp,0x0E , 0x0006);
+                rtl8168_mdio_write(tp,0x0D , 0x0000);
+                break;
+
+        case CFG_METHOD_18:
+        case CFG_METHOD_19:
+        case CFG_METHOD_20:
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
+                csi_tmp |= BIT_1 | BIT_0;
+                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                rtl8168_mdio_write(tp, 0x1e, 0x0020);
+                data = rtl8168_mdio_read(tp, 0x15);
+                data |= BIT_8;
+                rtl8168_mdio_write(tp, 0x15, data);
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B85);
+                data = rtl8168_mdio_read(tp, 0x06);
+                data |= BIT_13;
+                rtl8168_mdio_write(tp, 0x06, data);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                rtl8168_mdio_write(tp, 0x0D, 0x0007);
+                rtl8168_mdio_write(tp, 0x0E, 0x003C);
+                rtl8168_mdio_write(tp, 0x0D, 0x4007);
+                rtl8168_mdio_write(tp, 0x0E, 0x0006);
+                rtl8168_mdio_write(tp, 0x0D, 0x0000);
+                break;
+
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
+                csi_tmp |= BIT_1 | BIT_0;
+                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                data = rtl8168_mdio_read(tp, 0x11);
+                rtl8168_mdio_write(tp, 0x11, data | BIT_4);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A5D);
+                rtl8168_mdio_write(tp, 0x10, eee_adv_t);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                break;
+
+        default:
+//      dev_printk(KERN_DEBUG, tp_to_dev(tp), "Not Support EEE\n");
+                ret = -EOPNOTSUPP;
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+                rtl8168_mdio_write(tp, 0x1F, 0x0A4A);
+                rtl8168_set_eth_phy_bit(tp, 0x11, BIT_9);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A42);
+                rtl8168_set_eth_phy_bit(tp, 0x14, BIT_7);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                break;
+        }
+
+        /*Advanced EEE*/
+        switch (tp->mcfg) {
+        case CFG_METHOD_23:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+                rtl8168_oob_mutex_lock(tp);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+                rtl8168_set_phy_mcu_patch_request(tp);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_25:
+                rtl8168_eri_write(tp, 0x1EA, 1, 0xFA, ERIAR_ExGMAC);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                data = rtl8168_mdio_read(tp, 0x10);
+                if (data & BIT_10) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0A42);
+                        data = rtl8168_mdio_read(tp, 0x16);
+                        data &= ~(BIT_1);
+                        rtl8168_mdio_write(tp, 0x16, data);
+                } else {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0A42);
+                        data = rtl8168_mdio_read(tp, 0x16);
+                        data |= BIT_1;
+                        rtl8168_mdio_write(tp, 0x16, data);
+                }
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                break;
+        case CFG_METHOD_26:
+                data = rtl8168_mac_ocp_read(tp, 0xE052);
+                data |= BIT_0;
+                rtl8168_mac_ocp_write(tp, 0xE052, data);
+                data = rtl8168_mac_ocp_read(tp, 0xE056);
+                data &= 0xFF0F;
+                data |= (BIT_4 | BIT_5 | BIT_6);
+                rtl8168_mac_ocp_write(tp, 0xE056, data);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                data = rtl8168_mdio_read(tp, 0x10);
+                if (data & BIT_10) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0A42);
+                        data = rtl8168_mdio_read(tp, 0x16);
+                        data &= ~(BIT_1);
+                        rtl8168_mdio_write(tp, 0x16, data);
+                } else {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0A42);
+                        data = rtl8168_mdio_read(tp, 0x16);
+                        data |= BIT_1;
+                        rtl8168_mdio_write(tp, 0x16, data);
+                }
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                break;
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+                data = rtl8168_mac_ocp_read(tp, 0xE052);
+                data &= ~BIT_0;
+                rtl8168_mac_ocp_write(tp, 0xE052, data);
+                data = rtl8168_mac_ocp_read(tp, 0xE056);
+                data &= 0xFF0F;
+                data |= (BIT_4 | BIT_5 | BIT_6);
+                rtl8168_mac_ocp_write(tp, 0xE056, data);
+                break;
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+                data = rtl8168_mac_ocp_read(tp, 0xE052);
+                data &= ~(BIT_0);
+                rtl8168_mac_ocp_write(tp, 0xE052, data);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                data = rtl8168_mdio_read(tp, 0x10) | BIT_15;
+                rtl8168_mdio_write(tp, 0x10, data);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
+                data = rtl8168_mdio_read(tp, 0x11) | BIT_13 | BIT_14;
+                data &= ~(BIT_12);
+                rtl8168_mdio_write(tp, 0x11, data);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                break;
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+                data = rtl8168_mac_ocp_read(tp, 0xE052);
+                data &= ~(BIT_0);
+                if (tp->HwPkgDet == 0x0F)
+                        data |= BIT_0;
+                rtl8168_mac_ocp_write(tp, 0xE052, data);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                data = rtl8168_mdio_read(tp, 0x10) | BIT_15;
+                rtl8168_mdio_write(tp, 0x10, data);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
+                data = rtl8168_mdio_read(tp, 0x11) | BIT_13 | BIT_14;
+                data &= ~(BIT_12);
+                rtl8168_mdio_write(tp, 0x11, data);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+                rtl8168_clear_phy_mcu_patch_request(tp);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_23:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+                rtl8168_oob_mutex_unlock(tp);
+                break;
+        }
+
+        return ret;
+}
+
+static int rtl8168_disable_eee(struct rtl8168_private *tp)
+{
+        int ret;
+        u16 data;
+        u32 csi_tmp;
+
+        ret = 0;
+        switch (tp->mcfg) {
+        case CFG_METHOD_14:
+        case CFG_METHOD_15:
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B85);
+                data = rtl8168_mdio_read(tp, 0x06) & ~0x2000;
+                rtl8168_mdio_write(tp, 0x06, data);
+                rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                rtl8168_mdio_write(tp, 0x1E, 0x0020);
+                data = rtl8168_mdio_read(tp, 0x15) & ~0x0100;
+                rtl8168_mdio_write(tp, 0x15, data);
+                rtl8168_mdio_write(tp, 0x1F, 0x0006);
+                rtl8168_mdio_write(tp, 0x00, 0x5A00);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                rtl8168_mdio_write(tp, 0x0D, 0x0007);
+                rtl8168_mdio_write(tp, 0x0E, 0x003C);
+                rtl8168_mdio_write(tp, 0x0D, 0x4007);
+                rtl8168_mdio_write(tp, 0x0E, 0x0000);
+                rtl8168_mdio_write(tp, 0x0D, 0x0000);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                if (RTL_R8(tp, Config4) & 0x40) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                        rtl8168_mdio_write(tp, 0x05, 0x8B82);
+                        data = rtl8168_mdio_read(tp, 0x06) & ~0x0010;
+                        rtl8168_mdio_write(tp, 0x05, 0x8B82);
+                        rtl8168_mdio_write(tp, 0x06, data);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                }
+                break;
+
+        case CFG_METHOD_16:
+        case CFG_METHOD_17:
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0,4, ERIAR_ExGMAC)& ~0x0003;
+                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B85);
+                data = rtl8168_mdio_read(tp, 0x06) & ~0x2000;
+                rtl8168_mdio_write(tp, 0x06, data);
+                rtl8168_mdio_write(tp, 0x1F, 0x0004);
+                rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                rtl8168_mdio_write(tp, 0x1E, 0x0020);
+                data = rtl8168_mdio_read(tp, 0x15) & ~0x0100;
+                rtl8168_mdio_write(tp,0x15 , data);
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                rtl8168_mdio_write(tp, 0x0D, 0x0007);
+                rtl8168_mdio_write(tp, 0x0E, 0x003C);
+                rtl8168_mdio_write(tp, 0x0D, 0x4007);
+                rtl8168_mdio_write(tp, 0x0E, 0x0000);
+                rtl8168_mdio_write(tp, 0x0D, 0x0000);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                break;
+
+        case CFG_METHOD_18:
+        case CFG_METHOD_19:
+        case CFG_METHOD_20:
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
+                csi_tmp &= ~(BIT_1 | BIT_0);
+                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B85);
+                data = rtl8168_mdio_read(tp, 0x06);
+                data &= ~BIT_13;
+                rtl8168_mdio_write(tp, 0x06, data);
+                rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                rtl8168_mdio_write(tp, 0x1e, 0x0020);
+                data = rtl8168_mdio_read(tp, 0x15);
+                data &= ~BIT_8;
+                rtl8168_mdio_write(tp, 0x15, data);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                rtl8168_mdio_write(tp, 0x0D, 0x0007);
+                rtl8168_mdio_write(tp, 0x0E, 0x003C);
+                rtl8168_mdio_write(tp, 0x0D, 0x4007);
+                rtl8168_mdio_write(tp, 0x0E, 0x0000);
+                rtl8168_mdio_write(tp, 0x0D, 0x0000);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                break;
+
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
+                csi_tmp &= ~(BIT_1 | BIT_0);
+                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                data = rtl8168_mdio_read(tp, 0x11);
+                if (tp->mcfg == CFG_METHOD_36)
+                        rtl8168_mdio_write(tp, 0x11, data | BIT_4);
+                else
+                        rtl8168_mdio_write(tp, 0x11, data & ~BIT_4);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A5D);
+                rtl8168_mdio_write(tp, 0x10, 0x0000);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                break;
+
+        default:
+//      dev_printk(KERN_DEBUG, tp_to_dev(tp), "Not Support EEE\n");
+                ret = -EOPNOTSUPP;
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+                rtl8168_mdio_write(tp, 0x1F, 0x0A42);
+                rtl8168_clear_eth_phy_bit(tp, 0x14, BIT_7);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A4A);
+                rtl8168_clear_eth_phy_bit(tp, 0x11, BIT_9);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                break;
+        }
+
+        /*Advanced EEE*/
+        switch (tp->mcfg) {
+        case CFG_METHOD_23:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+                rtl8168_oob_mutex_lock(tp);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+                rtl8168_set_phy_mcu_patch_request(tp);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_25:
+                rtl8168_eri_write(tp, 0x1EA, 1, 0x00, ERIAR_ExGMAC);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A42);
+                data = rtl8168_mdio_read(tp, 0x16);
+                data &= ~(BIT_1);
+                rtl8168_mdio_write(tp, 0x16, data);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                break;
+        case CFG_METHOD_26:
+                data = rtl8168_mac_ocp_read(tp, 0xE052);
+                data &= ~(BIT_0);
+                rtl8168_mac_ocp_write(tp, 0xE052, data);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A42);
+                data = rtl8168_mdio_read(tp, 0x16);
+                data &= ~(BIT_1);
+                rtl8168_mdio_write(tp, 0x16, data);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                break;
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+                data = rtl8168_mac_ocp_read(tp, 0xE052);
+                data &= ~(BIT_0);
+                rtl8168_mac_ocp_write(tp, 0xE052, data);
+                break;
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+                data = rtl8168_mac_ocp_read(tp, 0xE052);
+                data &= ~(BIT_0);
+                rtl8168_mac_ocp_write(tp, 0xE052, data);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                data = rtl8168_mdio_read(tp, 0x10) & ~(BIT_15);
+                rtl8168_mdio_write(tp, 0x10, data);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
+                data = rtl8168_mdio_read(tp, 0x11) & ~(BIT_12 | BIT_13 | BIT_14);
+                rtl8168_mdio_write(tp, 0x11, data);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+                rtl8168_clear_phy_mcu_patch_request(tp);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_23:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+                rtl8168_oob_mutex_unlock(tp);
+                break;
+        }
+
+        return ret;
+}
+
+static int rtl_nway_reset(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int ret, bmcr;
+
+        if (unlikely(tp->rtk_enable_diag))
+                return -EBUSY;
+
+        /* if autoneg is off, it's an error */
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        bmcr = rtl8168_mdio_read(tp, MII_BMCR);
+
+        if (bmcr & BMCR_ANENABLE) {
+                bmcr |= BMCR_ANRESTART;
+                rtl8168_mdio_write(tp, MII_BMCR, bmcr);
+                ret = 0;
+        } else {
+                ret = -EINVAL;
+        }
+
+        return ret;
+}
+static bool
+rtl8168_support_eee(struct rtl8168_private *tp)
+{
+        switch (tp->mcfg) {
+        case CFG_METHOD_21 ... CFG_METHOD_36:
+                return 1;
+        default:
+                return 0;
+        }
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)
+static u32
+rtl8168_device_lpi_t_to_ethtool_lpi_t(struct rtl8168_private *tp , u32 lpi_timer)
+{
+        u32 to_us;
+        u8 status;
+
+        //Giga: lpi_timer * 8ns
+        //100M : lpi_timer * 80ns
+        to_us = 0;
+        status = RTL_R8(tp, PHYstatus);
+        if (status & LinkStatus) {
+                /*link on*/
+                if (status & _1000bpsF)
+                        to_us = lpi_timer * 8;
+                else if (status & _100bps)
+                        to_us = lpi_timer * 80;
+        }
+
+        //ns to us
+        to_us /= 1000;
+
+        return to_us;
+}
+
+static int
+rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
+{
+        struct rtl8168_private *tp = netdev_priv(net);
+        struct ethtool_eee *eee = &tp->eee;
+        u32 lp, adv, tx_lpi_timer, supported = 0;
+        u16 val;
+
+        if (!rtl8168_support_eee(tp))
+                return -EOPNOTSUPP;
+
+        if (unlikely(tp->rtk_enable_diag))
+                return -EBUSY;
+
+        /* Get Supported EEE */
+        supported = eee->supported;
+
+        /* Get advertisement EEE */
+        adv = eee->advertised;
+
+        /* Get LP advertisement EEE */
+        rtl8168_mdio_write(tp, 0x1F, 0x0A5D);
+        val = rtl8168_mdio_read(tp, 0x11);
+        lp = mmd_eee_adv_to_ethtool_adv_t(val);
+
+        /* Get EEE Tx LPI timer*/
+        tx_lpi_timer = rtl8168_device_lpi_t_to_ethtool_lpi_t(tp, eee->tx_lpi_timer);
+
+        val = rtl8168_eri_read(tp, 0x1B0, 2, ERIAR_ExGMAC);
+        val &= BIT_1 | BIT_0;
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+        edata->eee_enabled = !!val;
+        edata->eee_active = !!(supported & adv & lp);
+        edata->supported = supported;
+        edata->advertised = adv;
+        edata->lp_advertised = lp;
+        edata->tx_lpi_enabled = edata->eee_enabled;
+        edata->tx_lpi_timer = tx_lpi_timer;
+
+        return 0;
+}
+
+static int
+rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
+{
+        struct rtl8168_private *tp = netdev_priv(net);
+        struct ethtool_eee *eee = &tp->eee;
+        u32 advertising;
+        int rc = 0;
+
+        if (!rtl8168_support_eee(tp))
+                return -EOPNOTSUPP;
+
+        if (HW_SUPP_SERDES_PHY(tp) ||
+            !HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp) ||
+            tp->DASH)
+                return -EOPNOTSUPP;
+
+        if (unlikely(tp->rtk_enable_diag)) {
+                dev_printk(KERN_WARNING, tp_to_dev(tp), "Diag Enabled\n");
+                rc = -EBUSY;
+                goto out;
+        }
+
+        if (tp->autoneg != AUTONEG_ENABLE) {
+                dev_printk(KERN_WARNING, tp_to_dev(tp), "EEE requires autoneg\n");
+                rc = -EINVAL;
+                goto out;
+        }
+
+        advertising = tp->advertising;
+        if (!edata->advertised) {
+                edata->advertised = advertising & eee->supported;
+        } else if (edata->advertised & ~advertising) {
+                dev_printk(KERN_WARNING, tp_to_dev(tp), "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
+                           edata->advertised, advertising);
+                rc = -EINVAL;
+                goto out;
+        }
+
+        if (edata->advertised & ~eee->supported) {
+                dev_printk(KERN_WARNING, tp_to_dev(tp), "EEE advertised %x must be a subset of support %x\n",
+                           edata->advertised, eee->supported);
+                rc = -EINVAL;
+                goto out;
+        }
+
+        eee->advertised = edata->advertised;
+        eee->eee_enabled = edata->eee_enabled;
+
+        if (eee->eee_enabled)
+                rtl8168_enable_eee(tp);
+        else
+                rtl8168_disable_eee(tp);
+
+        rtl_nway_reset(net);
+
+        return rc;
+
+out:
+
+        return rc;
+}
+#endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0) */
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
+static const struct ethtool_ops rtl8168_ethtool_ops = {
+        .get_drvinfo        = rtl8168_get_drvinfo,
+        .get_regs_len       = rtl8168_get_regs_len,
+        .get_link           = ethtool_op_get_link,
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+        .get_ringparam      = rtl8168_get_ringparam,
+        .set_ringparam      = rtl8168_set_ringparam,
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
+        .get_settings       = rtl8168_get_settings,
+        .set_settings       = rtl8168_set_settings,
+#else
+        .get_link_ksettings       = rtl8168_get_settings,
+        .set_link_ksettings       = rtl8168_set_settings,
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+        .get_pauseparam     = rtl8168_get_pauseparam,
+        .set_pauseparam     = rtl8168_set_pauseparam,
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
+        .get_msglevel       = rtl8168_get_msglevel,
+        .set_msglevel       = rtl8168_set_msglevel,
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
+        .get_rx_csum        = rtl8168_get_rx_csum,
+        .set_rx_csum        = rtl8168_set_rx_csum,
+        .get_tx_csum        = rtl8168_get_tx_csum,
+        .set_tx_csum        = rtl8168_set_tx_csum,
+        .get_sg         = ethtool_op_get_sg,
+        .set_sg         = ethtool_op_set_sg,
+#ifdef NETIF_F_TSO
+        .get_tso        = ethtool_op_get_tso,
+        .set_tso        = ethtool_op_set_tso,
+#endif //NETIF_F_TSO
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
+        .get_regs       = rtl8168_get_regs,
+        .get_wol        = rtl8168_get_wol,
+        .set_wol        = rtl8168_set_wol,
+        .get_strings        = rtl8168_get_strings,
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
+        .get_stats_count    = rtl8168_get_stats_count,
+#else
+        .get_sset_count     = rtl8168_get_sset_count,
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
+        .get_ethtool_stats  = rtl8168_get_ethtool_stats,
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
+#ifdef ETHTOOL_GPERMADDR
+        .get_perm_addr      = ethtool_op_get_perm_addr,
+#endif
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
+        .get_eeprom     = rtl_get_eeprom,
+        .get_eeprom_len     = rtl_get_eeprom_len,
+#ifdef ENABLE_RSS_SUPPORT
+        .get_rxnfc		= rtl8168_get_rxnfc,
+        .set_rxnfc		= rtl8168_set_rxnfc,
+        .get_rxfh_indir_size	= rtl8168_rss_indir_size,
+        .get_rxfh_key_size	= rtl8168_get_rxfh_key_size,
+        .get_rxfh		= rtl8168_get_rxfh,
+        .set_rxfh		= rtl8168_set_rxfh,
+#endif
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0)
+        .get_ts_info        = ethtool_op_get_ts_info,
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0)
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)
+        .get_eee = rtl_ethtool_get_eee,
+        .set_eee = rtl_ethtool_set_eee,
+#endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0) */
+        .nway_reset = rtl_nway_reset,
+};
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
+
+static void rtl8168_get_mac_version(struct rtl8168_private *tp)
+{
+        u32 reg,val32;
+        u32 ICVerID;
+
+        val32 = RTL_R32(tp, TxConfig);
+        reg = val32 & 0x7c800000;
+        ICVerID = val32 & 0x00700000;
+
+        switch (reg) {
+        case 0x30000000:
+                tp->mcfg = CFG_METHOD_1;
+                tp->efuse_ver = EFUSE_NOT_SUPPORT;
+                break;
+        case 0x38000000:
+                if (ICVerID == 0x00000000) {
+                        tp->mcfg = CFG_METHOD_2;
+                } else if (ICVerID == 0x00500000) {
+                        tp->mcfg = CFG_METHOD_3;
+                } else {
+                        tp->mcfg = CFG_METHOD_3;
+                        tp->HwIcVerUnknown = TRUE;
+                }
+                tp->efuse_ver = EFUSE_NOT_SUPPORT;
+                break;
+        case 0x3C000000:
+                if (ICVerID == 0x00000000) {
+                        tp->mcfg = CFG_METHOD_4;
+                } else if (ICVerID == 0x00200000) {
+                        tp->mcfg = CFG_METHOD_5;
+                } else if (ICVerID == 0x00400000) {
+                        tp->mcfg = CFG_METHOD_6;
+                } else {
+                        tp->mcfg = CFG_METHOD_6;
+                        tp->HwIcVerUnknown = TRUE;
+                }
+                tp->efuse_ver = EFUSE_NOT_SUPPORT;
+                break;
+        case 0x3C800000:
+                if (ICVerID == 0x00100000) {
+                        tp->mcfg = CFG_METHOD_7;
+                } else if (ICVerID == 0x00300000) {
+                        tp->mcfg = CFG_METHOD_8;
+                } else {
+                        tp->mcfg = CFG_METHOD_8;
+                        tp->HwIcVerUnknown = TRUE;
+                }
+                tp->efuse_ver = EFUSE_NOT_SUPPORT;
+                break;
+        case 0x28000000:
+                if (ICVerID == 0x00100000) {
+                        tp->mcfg = CFG_METHOD_9;
+                } else if (ICVerID == 0x00300000) {
+                        tp->mcfg = CFG_METHOD_10;
+                } else {
+                        tp->mcfg = CFG_METHOD_10;
+                        tp->HwIcVerUnknown = TRUE;
+                }
+                tp->efuse_ver = EFUSE_SUPPORT_V1;
+                break;
+        case 0x28800000:
+                if (ICVerID == 0x00000000) {
+                        tp->mcfg = CFG_METHOD_11;
+                } else if (ICVerID == 0x00200000) {
+                        tp->mcfg = CFG_METHOD_12;
+                        RTL_W32(tp, 0xD0, RTL_R32(tp, 0xD0) | 0x00020000);
+                } else if (ICVerID == 0x00300000) {
+                        tp->mcfg = CFG_METHOD_13;
+                } else {
+                        tp->mcfg = CFG_METHOD_13;
+                        tp->HwIcVerUnknown = TRUE;
+                }
+                tp->efuse_ver = EFUSE_SUPPORT_V1;
+                break;
+        case 0x2C000000:
+                if (ICVerID == 0x00100000) {
+                        tp->mcfg = CFG_METHOD_14;
+                } else if (ICVerID == 0x00200000) {
+                        tp->mcfg = CFG_METHOD_15;
+                } else {
+                        tp->mcfg = CFG_METHOD_15;
+                        tp->HwIcVerUnknown = TRUE;
+                }
+                tp->efuse_ver = EFUSE_SUPPORT_V2;
+                break;
+        case 0x2C800000:
+                if (ICVerID == 0x00000000) {
+                        tp->mcfg = CFG_METHOD_16;
+                } else if (ICVerID == 0x00100000) {
+                        tp->mcfg = CFG_METHOD_17;
+                } else {
+                        tp->mcfg = CFG_METHOD_17;
+                        tp->HwIcVerUnknown = TRUE;
+                }
+                tp->efuse_ver = EFUSE_SUPPORT_V3;
+                break;
+        case 0x48000000:
+                if (ICVerID == 0x00000000) {
+                        tp->mcfg = CFG_METHOD_18;
+                } else if (ICVerID == 0x00100000) {
+                        tp->mcfg = CFG_METHOD_19;
+                } else {
+                        tp->mcfg = CFG_METHOD_19;
+                        tp->HwIcVerUnknown = TRUE;
+                }
+                tp->efuse_ver = EFUSE_SUPPORT_V3;
+                break;
+        case 0x48800000:
+                if (ICVerID == 0x00000000) {
+                        tp->mcfg = CFG_METHOD_20;
+                } else {
+                        tp->mcfg = CFG_METHOD_20;
+                        tp->HwIcVerUnknown = TRUE;
+                }
+
+                tp->efuse_ver = EFUSE_SUPPORT_V3;
+                break;
+        case 0x4C000000:
+                if (ICVerID == 0x00000000) {
+                        tp->mcfg = CFG_METHOD_21;
+                } else if (ICVerID == 0x00100000) {
+                        tp->mcfg = CFG_METHOD_22;
+                } else {
+                        tp->mcfg = CFG_METHOD_22;
+                        tp->HwIcVerUnknown = TRUE;
+                }
+                tp->efuse_ver = EFUSE_SUPPORT_V3;
+                break;
+        case 0x50000000:
+                if (ICVerID == 0x00000000) {
+                        tp->mcfg = CFG_METHOD_23;
+                } else if (ICVerID == 0x00100000) {
+                        tp->mcfg = CFG_METHOD_27;
+                } else if (ICVerID == 0x00200000) {
+                        tp->mcfg = CFG_METHOD_28;
+                } else {
+                        tp->mcfg = CFG_METHOD_28;
+                        tp->HwIcVerUnknown = TRUE;
+                }
+                tp->efuse_ver = EFUSE_SUPPORT_V3;
+                break;
+        case 0x50800000:
+                if (ICVerID == 0x00000000) {
+                        tp->mcfg = CFG_METHOD_24;
+                } else if (ICVerID == 0x00100000) {
+                        tp->mcfg = CFG_METHOD_25;
+                } else {
+                        tp->mcfg = CFG_METHOD_25;
+                        tp->HwIcVerUnknown = TRUE;
+                }
+                tp->efuse_ver = EFUSE_SUPPORT_V3;
+                break;
+        case 0x5C800000:
+                if (ICVerID == 0x00000000) {
+                        tp->mcfg = CFG_METHOD_26;
+                } else {
+                        tp->mcfg = CFG_METHOD_26;
+                        tp->HwIcVerUnknown = TRUE;
+                }
+
+                tp->efuse_ver = EFUSE_SUPPORT_V3;
+                break;
+        case 0x54000000:
+                if (ICVerID == 0x00000000) {
+                        tp->mcfg = CFG_METHOD_29;
+                } else if (ICVerID == 0x00100000) {
+                        tp->mcfg = CFG_METHOD_30;
+                } else {
+                        tp->mcfg = CFG_METHOD_30;
+                        tp->HwIcVerUnknown = TRUE;
+                }
+
+                if (tp->mcfg == CFG_METHOD_30) {
+                        if ((rtl8168_mac_ocp_read(tp, 0xD006) & 0xFF00) ==
+                            0x0100)
+                                tp->mcfg = CFG_METHOD_35;
+                        else if ((rtl8168_mac_ocp_read(tp, 0xD006) & 0xFF00) ==
+                                 0x0300)
+                                tp->mcfg = CFG_METHOD_36;
+                }
+
+                tp->efuse_ver = EFUSE_SUPPORT_V3;
+                break;
+        case 0x6C000000:
+                if (ICVerID == 0x00000000) {
+                        tp->mcfg = CFG_METHOD_37;
+                } else {
+                        tp->mcfg = CFG_METHOD_37;
+                        tp->HwIcVerUnknown = TRUE;
+                }
+
+                tp->efuse_ver = EFUSE_SUPPORT_V3;
+                break;
+        case 0x54800000:
+                if (ICVerID == 0x00100000) {
+                        tp->mcfg = CFG_METHOD_31;
+                } else if (ICVerID == 0x00200000) {
+                        tp->mcfg = CFG_METHOD_32;
+                } else if (ICVerID == 0x00300000) {
+                        tp->mcfg = CFG_METHOD_33;
+                } else if (ICVerID == 0x00400000) {
+                        tp->mcfg = CFG_METHOD_34;
+                } else {
+                        tp->mcfg = CFG_METHOD_34;
+                        tp->HwIcVerUnknown = TRUE;
+                }
+
+                tp->efuse_ver = EFUSE_SUPPORT_V3;
+                break;
+        default:
+                printk("unknown chip version (%x)\n",reg);
+                tp->mcfg = CFG_METHOD_DEFAULT;
+                tp->HwIcVerUnknown = TRUE;
+                tp->efuse_ver = EFUSE_NOT_SUPPORT;
+                break;
+        }
+}
+
+static void
+rtl8168_print_mac_version(struct rtl8168_private *tp)
+{
+        int i;
+        for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) {
+                if (tp->mcfg == rtl_chip_info[i].mcfg) {
+                        dprintk("Realtek PCIe GbE Family Controller mcfg = %04d\n",
+                                rtl_chip_info[i].mcfg);
+                        return;
+                }
+        }
+
+        dprintk("mac_version == Unknown\n");
+}
+
+static u8 rtl8168_calc_efuse_dummy_bit(u16 reg)
+{
+        int s,a,b;
+        u8 dummyBitPos = 0;
+
+
+        s=reg% 32;
+        a=s % 16;
+        b=s/16;
+
+        if (s/16) {
+                dummyBitPos = (u8)(16-a);
+        } else {
+                dummyBitPos = (u8)a;
+        }
+
+        return dummyBitPos;
+}
+
+static u32 rtl8168_decode_efuse_cmd(struct rtl8168_private *tp, u32 DwCmd)
+{
+        u16 reg = (u16)((DwCmd & 0x00FE0000) >> 17);
+        u32 DummyPos = rtl8168_calc_efuse_dummy_bit(reg);
+        u32 DeCodeDwCmd;
+        u32 Dw17BitData;
+
+        if (tp->efuse_ver < 3) {
+                DeCodeDwCmd = (DwCmd>>(DummyPos+1))<<DummyPos;
+                if (DummyPos > 0) {
+                        DeCodeDwCmd |= ((DwCmd<<(32-DummyPos))>>(32-DummyPos));
+                }
+        } else {
+                reg = (u16)((DwCmd & 0x007F0000) >> 16);
+                DummyPos = rtl8168_calc_efuse_dummy_bit(reg);
+                Dw17BitData = ((DwCmd & BIT_23) >> 23);
+                Dw17BitData <<= 16;
+                Dw17BitData |= (DwCmd & 0x0000FFFF);
+                DeCodeDwCmd = (Dw17BitData>>(DummyPos+1))<<DummyPos;
+                if (DummyPos > 0) {
+                        DeCodeDwCmd |= ((Dw17BitData<<(32-DummyPos))>>(32-DummyPos));
+                }
+        }
+
+        return DeCodeDwCmd;
+}
+
+static u8 rtl8168_efuse_read(struct rtl8168_private *tp, u16 reg)
+{
+        u8 efuse_data = 0;
+        u32 temp;
+        int cnt;
+
+        if (tp->efuse_ver == EFUSE_NOT_SUPPORT)
+                return EFUSE_READ_FAIL;
+
+        if (tp->efuse_ver == EFUSE_SUPPORT_V1) {
+                temp = EFUSE_READ | ((reg & EFUSE_Reg_Mask) << EFUSE_Reg_Shift);
+                RTL_W32(tp, EFUSEAR, temp);
+
+                cnt = 0;
+                do {
+                        udelay(100);
+                        temp = RTL_R32(tp, EFUSEAR);
+                        cnt++;
+                } while (!(temp & EFUSE_READ_OK) && (cnt < EFUSE_Check_Cnt));
+
+                if (cnt == EFUSE_Check_Cnt)
+                        efuse_data = EFUSE_READ_FAIL;
+                else
+                        efuse_data = (u8)(RTL_R32(tp, EFUSEAR) & EFUSE_Data_Mask);
+        } else  if (tp->efuse_ver == EFUSE_SUPPORT_V2) {
+                temp = (reg/2) & 0x03ff;
+                temp <<= 17;
+                temp |= EFUSE_READ;
+                RTL_W32(tp, EFUSEAR, temp);
+
+                cnt = 0;
+                do {
+                        udelay(100);
+                        temp = RTL_R32(tp, EFUSEAR);
+                        cnt++;
+                } while (!(temp & EFUSE_READ_OK) && (cnt < EFUSE_Check_Cnt));
+
+                if (cnt == EFUSE_Check_Cnt) {
+                        efuse_data = EFUSE_READ_FAIL;
+                } else {
+                        temp = RTL_R32(tp, EFUSEAR);
+                        temp = rtl8168_decode_efuse_cmd(tp, temp);
+
+                        if (reg%2) {
+                                temp >>= 8;
+                                efuse_data = (u8)temp;
+                        } else {
+                                efuse_data = (u8)temp;
+                        }
+                }
+        } else  if (tp->efuse_ver == EFUSE_SUPPORT_V3) {
+                temp = (reg/2) & 0x03ff;
+                temp <<= 16;
+                temp |= EFUSE_READ_V3;
+                RTL_W32(tp, EFUSEAR, temp);
+
+                cnt = 0;
+                do {
+                        udelay(100);
+                        temp = RTL_R32(tp, EFUSEAR);
+                        cnt++;
+                } while ((temp & BIT_31) && (cnt < EFUSE_Check_Cnt));
+
+                if (cnt == EFUSE_Check_Cnt) {
+                        efuse_data = EFUSE_READ_FAIL;
+                } else {
+                        temp = RTL_R32(tp, EFUSEAR);
+                        temp = rtl8168_decode_efuse_cmd(tp, temp);
+
+                        if (reg%2) {
+                                temp >>= 8;
+                                efuse_data = (u8)temp;
+                        } else {
+                                efuse_data = (u8)temp;
+                        }
+                }
+        }
+
+        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
+
+        return efuse_data;
+}
+
+static void
+rtl8168_tally_counter_addr_fill(struct rtl8168_private *tp)
+{
+        if (!tp->tally_paddr)
+                return;
+
+        RTL_W32(tp, CounterAddrHigh, (u64)tp->tally_paddr >> 32);
+        RTL_W32(tp, CounterAddrLow, (u64)tp->tally_paddr & (DMA_BIT_MASK(32)));
+}
+
+static void
+rtl8168_tally_counter_clear(struct rtl8168_private *tp)
+{
+        if (tp->mcfg == CFG_METHOD_1 || tp->mcfg == CFG_METHOD_2 ||
+            tp->mcfg == CFG_METHOD_3 )
+                return;
+
+        if (!tp->tally_paddr)
+                return;
+
+        RTL_W32(tp, CounterAddrHigh, (u64)tp->tally_paddr >> 32);
+        RTL_W32(tp, CounterAddrLow, ((u64)tp->tally_paddr & (DMA_BIT_MASK(32))) | CounterReset);
+}
+
+static
+u16
+rtl8168_get_phy_state(struct rtl8168_private *tp)
+{
+        u16 PhyState = 0xFF;
+
+        if (HW_SUPPORT_UPS_MODE(tp) == FALSE)
+                goto exit;
+
+        switch (tp->HwSuppUpsVer) {
+        case 1:
+                PhyState = rtl8168_mdio_read_phy_ocp(tp, 0x0A42, 0x10);
+                PhyState &= 0x7;  //bit[2:0]
+                break;
+        }
+
+exit:
+        return PhyState;
+}
+
+static
+bool
+rtl8168_wait_phy_state_ready(struct rtl8168_private *tp,
+                             u16 PhyState,
+                             u32 MicroSecondTimeout
+                            )
+{
+        u16 TmpPhyState;
+        u32 WaitCount;
+        u32 i = 0;
+        bool PhyStateReady = TRUE;
+
+        if (HW_SUPPORT_UPS_MODE(tp) == FALSE)
+                goto exit;
+
+        WaitCount = MicroSecondTimeout / 1000;
+        if (WaitCount == 0) WaitCount = 100;
+
+        do {
+                TmpPhyState = rtl8168_get_phy_state(tp);
+                mdelay(1);
+                i++;
+        } while ((i < WaitCount) && (TmpPhyState != PhyState));
+
+        PhyStateReady = (i == WaitCount && TmpPhyState != PhyState) ? FALSE : TRUE;
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
+        WARN_ON_ONCE(i == WaitCount);
+#endif
+
+exit:
+        return PhyStateReady;
+}
+
+static
+bool
+rtl8168_test_phy_ocp_v2(struct rtl8168_private *tp)
+{
+        bool RestorePhyOcpReg = FALSE;
+
+        u16 PhyRegValue;
+        u8 ResetPhyType = 0;
+
+        if (HW_PHY_STATUS_INI == rtl8168_get_phy_state(tp)) {
+                ResetPhyType = 1;
+        } else {
+                rtl8168_mdio_write(tp, 0x1F, 0x0C40);
+                PhyRegValue = rtl8168_mdio_read(tp, 0x12);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                if ((PhyRegValue & 0x03) != 0x00) {
+                        ResetPhyType = 2;
+                }
+        }
+
+        if (ResetPhyType == 0)
+                goto exit;
+
+        netif_err(tp, drv, tp->dev, "test_phy_ocp ResetPhyType = 0x%02x\n.\n",
+                  ResetPhyType);
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0C41);
+        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        mdelay(24); //24ms
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
+        PhyRegValue = rtl8168_mdio_read(tp, 0x12);
+        if ((PhyRegValue & 0x03) != 0x00) {
+                u32 WaitCnt = 0;
+                while ((PhyRegValue & 0x03) != 0x00 && WaitCnt < 5) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
+                        rtl8168_set_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
+                        rtl8168_clear_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
+                        mdelay(100);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
+                        PhyRegValue = rtl8168_mdio_read(tp, 0x12);
+                        WaitCnt++;
+                }
+        }
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
+        rtl8168_mdio_write(tp, 0x10, tp->BackupPhyFuseDout_15_0);
+        rtl8168_mdio_write(tp, 0x12, tp->BackupPhyFuseDout_47_32);
+        rtl8168_mdio_write(tp, 0x13, tp->BackupPhyFuseDout_63_48);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_INI, 5000000);
+        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
+        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_LAN_ON, 500000);
+
+        tp->HwHasWrRamCodeToMicroP = FALSE;
+
+        RestorePhyOcpReg = TRUE;
+
+exit:
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+        return RestorePhyOcpReg;
+}
+
+static
+bool
+rtl8168_test_phy_ocp_v3(struct rtl8168_private *tp)
+{
+        bool RestorePhyOcpReg = FALSE;
+
+        u16 PhyRegValue;
+        u8 ResetPhyType = 0;
+        u8 watch_dog = 0;
+        u8 uc_response;
+        u8 nctl_pc_range_fail;
+        u8 nctl_pc_stuck_fail;
+
+        if (FALSE == HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp))
+                goto exit;
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0B82);
+        uc_response = !!(rtl8168_mdio_read(tp, 0x10) & BIT_5);
+        rtl8168_mdio_write(tp, 0x1F, 0x0B84);
+        nctl_pc_range_fail = !!(rtl8168_mdio_read(tp, 0x11) & BIT_1);
+        nctl_pc_stuck_fail = !!(rtl8168_mdio_read(tp, 0x11) & BIT_2);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+        if (uc_response || nctl_pc_range_fail || nctl_pc_stuck_fail) {
+                ResetPhyType = 3;
+        } else {
+                rtl8168_mdio_write(tp, 0x1F, 0x0C40);
+                PhyRegValue = rtl8168_mdio_read(tp, 0x12);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                if ((PhyRegValue & 0x03) != 0x00) {
+                        watch_dog = (u8)(PhyRegValue & 0x03);
+                        ResetPhyType = 2;
+                }
+        }
+
+        if (ResetPhyType == 0)
+                goto exit;
+
+        netif_err(tp, drv, tp->dev, "test_phy_ocp ResetPhyType = 0x%02x\n.\n",
+                  ResetPhyType);
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0C41);
+        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        mdelay(24000); //24ms
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
+        PhyRegValue = rtl8168_mdio_read(tp, 0x12);
+        if ((PhyRegValue & 0x03) != 0x00) {
+                u32 WaitCnt = 0;
+                while ((PhyRegValue & 0x03) != 0x00 && WaitCnt < 5) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
+                        rtl8168_set_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
+                        rtl8168_clear_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
+                        mdelay(100000);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
+                        PhyRegValue = rtl8168_mdio_read(tp, 0x12);
+                        WaitCnt++;
+                }
+        }
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+        //issue9
+        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
+        rtl8168_mdio_write(tp, 0x10, tp->BackupPhyFuseDout_15_0);
+        rtl8168_mdio_write(tp, 0x11, tp->BackupPhyFuseDout_31_16);
+        rtl8168_mdio_write(tp, 0x12, tp->BackupPhyFuseDout_47_32);
+        rtl8168_mdio_write(tp, 0x13, tp->BackupPhyFuseDout_63_48);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_INI, 5000000);
+        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
+        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_LAN_ON, 500000);
+
+        //record fail case
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x801C);
+        PhyRegValue = watch_dog & 0x03;
+        PhyRegValue <<= 14;
+        if (uc_response) PhyRegValue |= BIT_13;
+        if (nctl_pc_range_fail) PhyRegValue |= BIT_12;
+        if (nctl_pc_stuck_fail) PhyRegValue |= BIT_11;
+        ClearAndSetEthPhyBit(tp,
+                             0x14,
+                             0xF800,
+                             PhyRegValue);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+        tp->HwHasWrRamCodeToMicroP = FALSE;
+
+        RestorePhyOcpReg = TRUE;
+
+exit:
+        //set uc_response to 1 and gphy should auto clear it.
+        rtl8168_mdio_write(tp, 0x1F, 0x0B82);
+        rtl8168_set_eth_phy_bit(tp, 0x10, BIT_5);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+        return RestorePhyOcpReg;
+}
+
+static
+bool
+rtl8168_test_phy_ocp(struct rtl8168_private *tp)
+{
+        bool RestorePhyOcpReg = FALSE;
+
+        if (tp->TestPhyOcpReg == FALSE)
+                goto exit;
+
+        switch (tp->HwSuppEsdVer) {
+        case 2:
+                RestorePhyOcpReg = rtl8168_test_phy_ocp_v2(tp);
+                break;
+        case 3:
+                RestorePhyOcpReg = rtl8168_test_phy_ocp_v3(tp);
+                break;
+        default:
+                break;
+        }
+
+exit:
+        return RestorePhyOcpReg;
+}
+
+static int
+rtl8168_is_ups_resume(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        return (rtl8168_mac_ocp_read(tp, 0xD408) & BIT_0);
+}
+
+static void
+rtl8168_clear_ups_resume_bit(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        rtl8168_mac_ocp_write(tp, 0xD408, rtl8168_mac_ocp_read(tp, 0xD408) & ~(BIT_0));
+}
+
+static void
+rtl8168_wait_phy_ups_resume(struct net_device *dev, u16 PhyState)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u16 TmpPhyState;
+        int i = 0;
+
+        do {
+                TmpPhyState = rtl8168_mdio_read_phy_ocp(tp, 0x0A42, 0x10);
+                TmpPhyState &= 0x7;
+                mdelay(1);
+                i++;
+        } while ((i < 100) && (TmpPhyState != PhyState));
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
+        WARN_ON_ONCE(i == 100);
+#endif
+}
+
+void
+rtl8168_enable_now_is_oob(struct rtl8168_private *tp)
+{
+        if ( tp->HwSuppNowIsOobVer == 1 ) {
+                RTL_W8(tp, MCUCmd_reg, RTL_R8(tp, MCUCmd_reg) | Now_is_oob);
+        }
+}
+
+void
+rtl8168_disable_now_is_oob(struct rtl8168_private *tp)
+{
+        if ( tp->HwSuppNowIsOobVer == 1 ) {
+                RTL_W8(tp, MCUCmd_reg, RTL_R8(tp, MCUCmd_reg) & ~Now_is_oob);
+        }
+}
+
+static void
+rtl8168_switch_to_sgmii_mode(
+        struct rtl8168_private *tp
+)
+{
+        if (FALSE == HW_SUPP_SERDES_PHY(tp))
+                return;
+
+        switch (tp->HwSuppSerDesPhyVer) {
+        case 1:
+                rtl8168_mac_ocp_write(tp, 0xEB00, 0x2);
+                rtl8168_set_mcu_ocp_bit(tp, 0xEB16, BIT_1);
+                break;
+        }
+}
+
+static void
+rtl8168_exit_oob(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u16 data16;
+
+        rtl8168_disable_rx_packet_filter(tp);
+
+        if (HW_SUPP_SERDES_PHY(tp)) {
+                if (tp->HwSuppSerDesPhyVer == 1) {
+                        rtl8168_switch_to_sgmii_mode(tp);
+                }
+        }
+
+        if (HW_DASH_SUPPORT_DASH(tp)) {
+                rtl8168_driver_start(tp);
+                rtl8168_dash2_disable_txrx(dev);
+#ifdef ENABLE_DASH_SUPPORT
+                DashHwInit(dev);
+#endif
+        }
+
+        //Disable realwow  function
+        switch (tp->mcfg) {
+        case CFG_METHOD_18:
+        case CFG_METHOD_19:
+                RTL_W32(tp, MACOCP, 0xE5A90000);
+                RTL_W32(tp, MACOCP, 0xF2100010);
+                break;
+        case CFG_METHOD_20:
+                RTL_W32(tp, MACOCP, 0xE5A90000);
+                RTL_W32(tp, MACOCP, 0xE4640000);
+                RTL_W32(tp, MACOCP, 0xF2100010);
+                break;
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+                RTL_W32(tp, MACOCP, 0x605E0000);
+                RTL_W32(tp, MACOCP, (0xE05E << 16) | (RTL_R32(tp, MACOCP) & 0xFFFE));
+                RTL_W32(tp, MACOCP, 0xE9720000);
+                RTL_W32(tp, MACOCP, 0xF2140010);
+                break;
+        case CFG_METHOD_26:
+                RTL_W32(tp, MACOCP, 0xE05E00FF);
+                RTL_W32(tp, MACOCP, 0xE9720000);
+                rtl8168_mac_ocp_write(tp, 0xE428, 0x0010);
+                break;
+        }
+
+#ifdef ENABLE_REALWOW_SUPPORT
+        rtl8168_realwow_hw_init(dev);
+#else
+        switch (tp->mcfg) {
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+                rtl8168_eri_write(tp, 0x174, 2, 0x0000, ERIAR_ExGMAC);
+                rtl8168_mac_ocp_write(tp, 0xE428, 0x0010);
+                break;
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_28:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+                rtl8168_eri_write(tp, 0x174, 2, 0x00FF, ERIAR_ExGMAC);
+                rtl8168_mac_ocp_write(tp, 0xE428, 0x0010);
+                break;
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37: {
+                u32 csi_tmp;
+                csi_tmp = rtl8168_eri_read(tp, 0x174, 2, ERIAR_ExGMAC);
+                csi_tmp &= ~(BIT_8);
+                csi_tmp |= (BIT_15);
+                rtl8168_eri_write(tp, 0x174, 2, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_mac_ocp_write(tp, 0xE428, 0x0010);
+        }
+        break;
+        }
+#endif //ENABLE_REALWOW_SUPPORT
+
+        rtl8168_nic_reset(dev);
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_20:
+                rtl8168_wait_ll_share_fifo_ready(dev);
+
+                data16 = rtl8168_mac_ocp_read(tp, 0xD4DE) | BIT_15;
+                rtl8168_mac_ocp_write(tp, 0xD4DE, data16);
+
+                rtl8168_wait_ll_share_fifo_ready(dev);
+                break;
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                rtl8168_disable_now_is_oob(tp);
+
+                data16 = rtl8168_mac_ocp_read(tp, 0xE8DE) & ~BIT_14;
+                rtl8168_mac_ocp_write(tp, 0xE8DE, data16);
+                rtl8168_wait_ll_share_fifo_ready(dev);
+
+                data16 = rtl8168_mac_ocp_read(tp, 0xE8DE) | BIT_15;
+                rtl8168_mac_ocp_write(tp, 0xE8DE, data16);
+
+                rtl8168_wait_ll_share_fifo_ready(dev);
+                break;
+        }
+
+        //wait ups resume (phy state 2)
+        if (HW_SUPPORT_UPS_MODE(tp))
+                if (rtl8168_is_ups_resume(dev)) {
+                        rtl8168_wait_phy_ups_resume(dev, HW_PHY_STATUS_EXT_INI);
+                        rtl8168_clear_ups_resume_bit(dev);
+                }
+
+#ifdef ENABLE_FIBER_SUPPORT
+        if (HW_FIBER_MODE_ENABLED(tp))
+                rtl8168_hw_init_fiber_nic(tp);
+#endif //ENABLE_FIBER_SUPPORT
+}
+
+void
+rtl8168_hw_disable_mac_mcu_bps(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        if (tp->HwSuppAspmClkIntrLock) {
+                rtl8168_enable_cfg9346_write(tp);
+                rtl8168_hw_aspm_clkreq_enable(tp, false);
+                rtl8168_disable_cfg9346_write(tp);
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                rtl8168_mac_ocp_write(tp, 0xFC38, 0x0000);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                rtl8168_mac_ocp_write(tp, 0xFC28, 0x0000);
+                rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0000);
+                rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0000);
+                rtl8168_mac_ocp_write(tp, 0xFC2E, 0x0000);
+                rtl8168_mac_ocp_write(tp, 0xFC30, 0x0000);
+                rtl8168_mac_ocp_write(tp, 0xFC32, 0x0000);
+                rtl8168_mac_ocp_write(tp, 0xFC34, 0x0000);
+                rtl8168_mac_ocp_write(tp, 0xFC36, 0x0000);
+                mdelay(3);
+                rtl8168_mac_ocp_write(tp, 0xFC26, 0x0000);
+                break;
+        }
+}
+
+#ifndef ENABLE_USE_FIRMWARE_FILE
+static void
+rtl8168_set_mac_mcu_8168g_1(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        rtl8168_mac_ocp_write(tp, 0xE43C, 0x0000);
+        rtl8168_mac_ocp_write(tp, 0xE43E, 0x0000);
+
+        rtl8168_mac_ocp_write(tp, 0xE434, 0x0004);
+        rtl8168_mac_ocp_write(tp, 0xE43C, 0x0004);
+
+        rtl8168_hw_disable_mac_mcu_bps(dev);
+
+        rtl8168_mac_ocp_write( tp, 0xF800, 0xE008 );
+        rtl8168_mac_ocp_write( tp, 0xF802, 0xE01B );
+        rtl8168_mac_ocp_write( tp, 0xF804, 0xE022 );
+        rtl8168_mac_ocp_write( tp, 0xF806, 0xE094 );
+        rtl8168_mac_ocp_write( tp, 0xF808, 0xE097 );
+        rtl8168_mac_ocp_write( tp, 0xF80A, 0xE09A );
+        rtl8168_mac_ocp_write( tp, 0xF80C, 0xE0B3 );
+        rtl8168_mac_ocp_write( tp, 0xF80E, 0xE0BA );
+        rtl8168_mac_ocp_write( tp, 0xF810, 0x49D2 );
+        rtl8168_mac_ocp_write( tp, 0xF812, 0xF10D );
+        rtl8168_mac_ocp_write( tp, 0xF814, 0x766C );
+        rtl8168_mac_ocp_write( tp, 0xF816, 0x49E2 );
+        rtl8168_mac_ocp_write( tp, 0xF818, 0xF00A );
+        rtl8168_mac_ocp_write( tp, 0xF81A, 0x1EC0 );
+        rtl8168_mac_ocp_write( tp, 0xF81C, 0x8EE1 );
+        rtl8168_mac_ocp_write( tp, 0xF81E, 0xC60A );
+        rtl8168_mac_ocp_write( tp, 0xF820, 0x77C0 );
+        rtl8168_mac_ocp_write( tp, 0xF822, 0x4870 );
+        rtl8168_mac_ocp_write( tp, 0xF824, 0x9FC0 );
+        rtl8168_mac_ocp_write( tp, 0xF826, 0x1EA0 );
+        rtl8168_mac_ocp_write( tp, 0xF828, 0xC707 );
+        rtl8168_mac_ocp_write( tp, 0xF82A, 0x8EE1 );
+        rtl8168_mac_ocp_write( tp, 0xF82C, 0x9D6C );
+        rtl8168_mac_ocp_write( tp, 0xF82E, 0xC603 );
+        rtl8168_mac_ocp_write( tp, 0xF830, 0xBE00 );
+        rtl8168_mac_ocp_write( tp, 0xF832, 0xB416 );
+        rtl8168_mac_ocp_write( tp, 0xF834, 0x0076 );
+        rtl8168_mac_ocp_write( tp, 0xF836, 0xE86C );
+        rtl8168_mac_ocp_write( tp, 0xF838, 0xC406 );
+        rtl8168_mac_ocp_write( tp, 0xF83A, 0x7580 );
+        rtl8168_mac_ocp_write( tp, 0xF83C, 0x4852 );
+        rtl8168_mac_ocp_write( tp, 0xF83E, 0x8D80 );
+        rtl8168_mac_ocp_write( tp, 0xF840, 0xC403 );
+        rtl8168_mac_ocp_write( tp, 0xF842, 0xBC00 );
+        rtl8168_mac_ocp_write( tp, 0xF844, 0xD3E0 );
+        rtl8168_mac_ocp_write( tp, 0xF846, 0x02C8 );
+        rtl8168_mac_ocp_write( tp, 0xF848, 0x8918 );
+        rtl8168_mac_ocp_write( tp, 0xF84A, 0xE815 );
+        rtl8168_mac_ocp_write( tp, 0xF84C, 0x1100 );
+        rtl8168_mac_ocp_write( tp, 0xF84E, 0xF011 );
+        rtl8168_mac_ocp_write( tp, 0xF850, 0xE812 );
+        rtl8168_mac_ocp_write( tp, 0xF852, 0x4990 );
+        rtl8168_mac_ocp_write( tp, 0xF854, 0xF002 );
+        rtl8168_mac_ocp_write( tp, 0xF856, 0xE817 );
+        rtl8168_mac_ocp_write( tp, 0xF858, 0xE80E );
+        rtl8168_mac_ocp_write( tp, 0xF85A, 0x4992 );
+        rtl8168_mac_ocp_write( tp, 0xF85C, 0xF002 );
+        rtl8168_mac_ocp_write( tp, 0xF85E, 0xE80E );
+        rtl8168_mac_ocp_write( tp, 0xF860, 0xE80A );
+        rtl8168_mac_ocp_write( tp, 0xF862, 0x4993 );
+        rtl8168_mac_ocp_write( tp, 0xF864, 0xF002 );
+        rtl8168_mac_ocp_write( tp, 0xF866, 0xE818 );
+        rtl8168_mac_ocp_write( tp, 0xF868, 0xE806 );
+        rtl8168_mac_ocp_write( tp, 0xF86A, 0x4991 );
+        rtl8168_mac_ocp_write( tp, 0xF86C, 0xF002 );
+        rtl8168_mac_ocp_write( tp, 0xF86E, 0xE838 );
+        rtl8168_mac_ocp_write( tp, 0xF870, 0xC25E );
+        rtl8168_mac_ocp_write( tp, 0xF872, 0xBA00 );
+        rtl8168_mac_ocp_write( tp, 0xF874, 0xC056 );
+        rtl8168_mac_ocp_write( tp, 0xF876, 0x7100 );
+        rtl8168_mac_ocp_write( tp, 0xF878, 0xFF80 );
+        rtl8168_mac_ocp_write( tp, 0xF87A, 0x7100 );
+        rtl8168_mac_ocp_write( tp, 0xF87C, 0x4892 );
+        rtl8168_mac_ocp_write( tp, 0xF87E, 0x4813 );
+        rtl8168_mac_ocp_write( tp, 0xF880, 0x8900 );
+        rtl8168_mac_ocp_write( tp, 0xF882, 0xE00A );
+        rtl8168_mac_ocp_write( tp, 0xF884, 0x7100 );
+        rtl8168_mac_ocp_write( tp, 0xF886, 0x4890 );
+        rtl8168_mac_ocp_write( tp, 0xF888, 0x4813 );
+        rtl8168_mac_ocp_write( tp, 0xF88A, 0x8900 );
+        rtl8168_mac_ocp_write( tp, 0xF88C, 0xC74B );
+        rtl8168_mac_ocp_write( tp, 0xF88E, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xF890, 0x48C2 );
+        rtl8168_mac_ocp_write( tp, 0xF892, 0x4841 );
+        rtl8168_mac_ocp_write( tp, 0xF894, 0x8CF8 );
+        rtl8168_mac_ocp_write( tp, 0xF896, 0xC746 );
+        rtl8168_mac_ocp_write( tp, 0xF898, 0x74FC );
+        rtl8168_mac_ocp_write( tp, 0xF89A, 0x49C0 );
+        rtl8168_mac_ocp_write( tp, 0xF89C, 0xF120 );
+        rtl8168_mac_ocp_write( tp, 0xF89E, 0x49C1 );
+        rtl8168_mac_ocp_write( tp, 0xF8A0, 0xF11E );
+        rtl8168_mac_ocp_write( tp, 0xF8A2, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xF8A4, 0x49C0 );
+        rtl8168_mac_ocp_write( tp, 0xF8A6, 0xF01B );
+        rtl8168_mac_ocp_write( tp, 0xF8A8, 0x49C6 );
+        rtl8168_mac_ocp_write( tp, 0xF8AA, 0xF119 );
+        rtl8168_mac_ocp_write( tp, 0xF8AC, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xF8AE, 0x49C4 );
+        rtl8168_mac_ocp_write( tp, 0xF8B0, 0xF013 );
+        rtl8168_mac_ocp_write( tp, 0xF8B2, 0xC536 );
+        rtl8168_mac_ocp_write( tp, 0xF8B4, 0x74B0 );
+        rtl8168_mac_ocp_write( tp, 0xF8B6, 0x49C1 );
+        rtl8168_mac_ocp_write( tp, 0xF8B8, 0xF1FD );
+        rtl8168_mac_ocp_write( tp, 0xF8BA, 0xC537 );
+        rtl8168_mac_ocp_write( tp, 0xF8BC, 0xC434 );
+        rtl8168_mac_ocp_write( tp, 0xF8BE, 0x9CA0 );
+        rtl8168_mac_ocp_write( tp, 0xF8C0, 0xC435 );
+        rtl8168_mac_ocp_write( tp, 0xF8C2, 0x1C13 );
+        rtl8168_mac_ocp_write( tp, 0xF8C4, 0x484F );
+        rtl8168_mac_ocp_write( tp, 0xF8C6, 0x9CA2 );
+        rtl8168_mac_ocp_write( tp, 0xF8C8, 0xC52B );
+        rtl8168_mac_ocp_write( tp, 0xF8CA, 0x74B0 );
+        rtl8168_mac_ocp_write( tp, 0xF8CC, 0x49C1 );
+        rtl8168_mac_ocp_write( tp, 0xF8CE, 0xF1FD );
+        rtl8168_mac_ocp_write( tp, 0xF8D0, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xF8D2, 0x48C4 );
+        rtl8168_mac_ocp_write( tp, 0xF8D4, 0x8CF8 );
+        rtl8168_mac_ocp_write( tp, 0xF8D6, 0x7100 );
+        rtl8168_mac_ocp_write( tp, 0xF8D8, 0x4893 );
+        rtl8168_mac_ocp_write( tp, 0xF8DA, 0x8900 );
+        rtl8168_mac_ocp_write( tp, 0xF8DC, 0xFF80 );
+        rtl8168_mac_ocp_write( tp, 0xF8DE, 0xC520 );
+        rtl8168_mac_ocp_write( tp, 0xF8E0, 0x74B0 );
+        rtl8168_mac_ocp_write( tp, 0xF8E2, 0x49C1 );
+        rtl8168_mac_ocp_write( tp, 0xF8E4, 0xF11C );
+        rtl8168_mac_ocp_write( tp, 0xF8E6, 0xC71E );
+        rtl8168_mac_ocp_write( tp, 0xF8E8, 0x74FC );
+        rtl8168_mac_ocp_write( tp, 0xF8EA, 0x49C1 );
+        rtl8168_mac_ocp_write( tp, 0xF8EC, 0xF118 );
+        rtl8168_mac_ocp_write( tp, 0xF8EE, 0x49C0 );
+        rtl8168_mac_ocp_write( tp, 0xF8F0, 0xF116 );
+        rtl8168_mac_ocp_write( tp, 0xF8F2, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xF8F4, 0x49C0 );
+        rtl8168_mac_ocp_write( tp, 0xF8F6, 0xF013 );
+        rtl8168_mac_ocp_write( tp, 0xF8F8, 0x48C3 );
+        rtl8168_mac_ocp_write( tp, 0xF8FA, 0x8CF8 );
+        rtl8168_mac_ocp_write( tp, 0xF8FC, 0xC516 );
+        rtl8168_mac_ocp_write( tp, 0xF8FE, 0x74A2 );
+        rtl8168_mac_ocp_write( tp, 0xF900, 0x49CE );
+        rtl8168_mac_ocp_write( tp, 0xF902, 0xF1FE );
+        rtl8168_mac_ocp_write( tp, 0xF904, 0xC411 );
+        rtl8168_mac_ocp_write( tp, 0xF906, 0x9CA0 );
+        rtl8168_mac_ocp_write( tp, 0xF908, 0xC411 );
+        rtl8168_mac_ocp_write( tp, 0xF90A, 0x1C13 );
+        rtl8168_mac_ocp_write( tp, 0xF90C, 0x484F );
+        rtl8168_mac_ocp_write( tp, 0xF90E, 0x9CA2 );
+        rtl8168_mac_ocp_write( tp, 0xF910, 0x74A2 );
+        rtl8168_mac_ocp_write( tp, 0xF912, 0x49CF );
+        rtl8168_mac_ocp_write( tp, 0xF914, 0xF1FE );
+        rtl8168_mac_ocp_write( tp, 0xF916, 0x7100 );
+        rtl8168_mac_ocp_write( tp, 0xF918, 0x4891 );
+        rtl8168_mac_ocp_write( tp, 0xF91A, 0x8900 );
+        rtl8168_mac_ocp_write( tp, 0xF91C, 0xFF80 );
+        rtl8168_mac_ocp_write( tp, 0xF91E, 0xE400 );
+        rtl8168_mac_ocp_write( tp, 0xF920, 0xD3E0 );
+        rtl8168_mac_ocp_write( tp, 0xF922, 0xE000 );
+        rtl8168_mac_ocp_write( tp, 0xF924, 0x0481 );
+        rtl8168_mac_ocp_write( tp, 0xF926, 0x0C81 );
+        rtl8168_mac_ocp_write( tp, 0xF928, 0xDE20 );
+        rtl8168_mac_ocp_write( tp, 0xF92A, 0x0000 );
+        rtl8168_mac_ocp_write( tp, 0xF92C, 0x0992 );
+        rtl8168_mac_ocp_write( tp, 0xF92E, 0x1B76 );
+        rtl8168_mac_ocp_write( tp, 0xF930, 0xC602 );
+        rtl8168_mac_ocp_write( tp, 0xF932, 0xBE00 );
+        rtl8168_mac_ocp_write( tp, 0xF934, 0x059C );
+        rtl8168_mac_ocp_write( tp, 0xF936, 0x1B76 );
+        rtl8168_mac_ocp_write( tp, 0xF938, 0xC602 );
+        rtl8168_mac_ocp_write( tp, 0xF93A, 0xBE00 );
+        rtl8168_mac_ocp_write( tp, 0xF93C, 0x065A );
+        rtl8168_mac_ocp_write( tp, 0xF93E, 0xB400 );
+        rtl8168_mac_ocp_write( tp, 0xF940, 0x18DE );
+        rtl8168_mac_ocp_write( tp, 0xF942, 0x2008 );
+        rtl8168_mac_ocp_write( tp, 0xF944, 0x4001 );
+        rtl8168_mac_ocp_write( tp, 0xF946, 0xF10F );
+        rtl8168_mac_ocp_write( tp, 0xF948, 0x7342 );
+        rtl8168_mac_ocp_write( tp, 0xF94A, 0x1880 );
+        rtl8168_mac_ocp_write( tp, 0xF94C, 0x2008 );
+        rtl8168_mac_ocp_write( tp, 0xF94E, 0x0009 );
+        rtl8168_mac_ocp_write( tp, 0xF950, 0x4018 );
+        rtl8168_mac_ocp_write( tp, 0xF952, 0xF109 );
+        rtl8168_mac_ocp_write( tp, 0xF954, 0x7340 );
+        rtl8168_mac_ocp_write( tp, 0xF956, 0x25BC );
+        rtl8168_mac_ocp_write( tp, 0xF958, 0x130F );
+        rtl8168_mac_ocp_write( tp, 0xF95A, 0xF105 );
+        rtl8168_mac_ocp_write( tp, 0xF95C, 0xC00A );
+        rtl8168_mac_ocp_write( tp, 0xF95E, 0x7300 );
+        rtl8168_mac_ocp_write( tp, 0xF960, 0x4831 );
+        rtl8168_mac_ocp_write( tp, 0xF962, 0x9B00 );
+        rtl8168_mac_ocp_write( tp, 0xF964, 0xB000 );
+        rtl8168_mac_ocp_write( tp, 0xF966, 0x7340 );
+        rtl8168_mac_ocp_write( tp, 0xF968, 0x8320 );
+        rtl8168_mac_ocp_write( tp, 0xF96A, 0xC302 );
+        rtl8168_mac_ocp_write( tp, 0xF96C, 0xBB00 );
+        rtl8168_mac_ocp_write( tp, 0xF96E, 0x0C12 );
+        rtl8168_mac_ocp_write( tp, 0xF970, 0xE860 );
+        rtl8168_mac_ocp_write( tp, 0xF972, 0xC406 );
+        rtl8168_mac_ocp_write( tp, 0xF974, 0x7580 );
+        rtl8168_mac_ocp_write( tp, 0xF976, 0x4851 );
+        rtl8168_mac_ocp_write( tp, 0xF978, 0x8D80 );
+        rtl8168_mac_ocp_write( tp, 0xF97A, 0xC403 );
+        rtl8168_mac_ocp_write( tp, 0xF97C, 0xBC00 );
+        rtl8168_mac_ocp_write( tp, 0xF97E, 0xD3E0 );
+        rtl8168_mac_ocp_write( tp, 0xF980, 0x02C8 );
+        rtl8168_mac_ocp_write( tp, 0xF982, 0xC406 );
+        rtl8168_mac_ocp_write( tp, 0xF984, 0x7580 );
+        rtl8168_mac_ocp_write( tp, 0xF986, 0x4850 );
+        rtl8168_mac_ocp_write( tp, 0xF988, 0x8D80 );
+        rtl8168_mac_ocp_write( tp, 0xF98A, 0xC403 );
+        rtl8168_mac_ocp_write( tp, 0xF98C, 0xBC00 );
+        rtl8168_mac_ocp_write( tp, 0xF98E, 0xD3E0 );
+        rtl8168_mac_ocp_write( tp, 0xF990, 0x0298 );
+
+        rtl8168_mac_ocp_write( tp, 0xDE30, 0x0080 );
+
+        rtl8168_mac_ocp_write( tp, 0xFC26, 0x8000 );
+
+        rtl8168_mac_ocp_write( tp, 0xFC28, 0x0075 );
+        rtl8168_mac_ocp_write( tp, 0xFC2A, 0x02B1 );
+        rtl8168_mac_ocp_write( tp, 0xFC2C, 0x0991 );
+        rtl8168_mac_ocp_write( tp, 0xFC2E, 0x059B );
+        rtl8168_mac_ocp_write( tp, 0xFC30, 0x0659 );
+        rtl8168_mac_ocp_write( tp, 0xFC32, 0x0000 );
+        rtl8168_mac_ocp_write( tp, 0xFC34, 0x02C7 );
+        rtl8168_mac_ocp_write( tp, 0xFC36, 0x0279 );
+}
+
+static void
+rtl8168_set_mac_mcu_8168gu_1(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        rtl8168_hw_disable_mac_mcu_bps(dev);
+
+        rtl8168_mac_ocp_write( tp, 0xF800, 0xE008 );
+        rtl8168_mac_ocp_write( tp, 0xF802, 0xE011 );
+        rtl8168_mac_ocp_write( tp, 0xF804, 0xE015 );
+        rtl8168_mac_ocp_write( tp, 0xF806, 0xE018 );
+        rtl8168_mac_ocp_write( tp, 0xF808, 0xE01B );
+        rtl8168_mac_ocp_write( tp, 0xF80A, 0xE027 );
+        rtl8168_mac_ocp_write( tp, 0xF80C, 0xE043 );
+        rtl8168_mac_ocp_write( tp, 0xF80E, 0xE065 );
+        rtl8168_mac_ocp_write( tp, 0xF810, 0x49E2 );
+        rtl8168_mac_ocp_write( tp, 0xF812, 0xF005 );
+        rtl8168_mac_ocp_write( tp, 0xF814, 0x49EA );
+        rtl8168_mac_ocp_write( tp, 0xF816, 0xF003 );
+        rtl8168_mac_ocp_write( tp, 0xF818, 0xC404 );
+        rtl8168_mac_ocp_write( tp, 0xF81A, 0xBC00 );
+        rtl8168_mac_ocp_write( tp, 0xF81C, 0xC403 );
+        rtl8168_mac_ocp_write( tp, 0xF81E, 0xBC00 );
+        rtl8168_mac_ocp_write( tp, 0xF820, 0x0496 );
+        rtl8168_mac_ocp_write( tp, 0xF822, 0x051A );
+        rtl8168_mac_ocp_write( tp, 0xF824, 0x1D01 );
+        rtl8168_mac_ocp_write( tp, 0xF826, 0x8DE8 );
+        rtl8168_mac_ocp_write( tp, 0xF828, 0xC602 );
+        rtl8168_mac_ocp_write( tp, 0xF82A, 0xBE00 );
+        rtl8168_mac_ocp_write( tp, 0xF82C, 0x0206 );
+        rtl8168_mac_ocp_write( tp, 0xF82E, 0x1B76 );
+        rtl8168_mac_ocp_write( tp, 0xF830, 0xC202 );
+        rtl8168_mac_ocp_write( tp, 0xF832, 0xBA00 );
+        rtl8168_mac_ocp_write( tp, 0xF834, 0x058A );
+        rtl8168_mac_ocp_write( tp, 0xF836, 0x1B76 );
+        rtl8168_mac_ocp_write( tp, 0xF838, 0xC602 );
+        rtl8168_mac_ocp_write( tp, 0xF83A, 0xBE00 );
+        rtl8168_mac_ocp_write( tp, 0xF83C, 0x0648 );
+        rtl8168_mac_ocp_write( tp, 0xF83E, 0x74E6 );
+        rtl8168_mac_ocp_write( tp, 0xF840, 0x1B78 );
+        rtl8168_mac_ocp_write( tp, 0xF842, 0x46DC );
+        rtl8168_mac_ocp_write( tp, 0xF844, 0x1300 );
+        rtl8168_mac_ocp_write( tp, 0xF846, 0xF005 );
+        rtl8168_mac_ocp_write( tp, 0xF848, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xF84A, 0x48C3 );
+        rtl8168_mac_ocp_write( tp, 0xF84C, 0x48C4 );
+        rtl8168_mac_ocp_write( tp, 0xF84E, 0x8CF8 );
+        rtl8168_mac_ocp_write( tp, 0xF850, 0x64E7 );
+        rtl8168_mac_ocp_write( tp, 0xF852, 0xC302 );
+        rtl8168_mac_ocp_write( tp, 0xF854, 0xBB00 );
+        rtl8168_mac_ocp_write( tp, 0xF856, 0x068E );
+        rtl8168_mac_ocp_write( tp, 0xF858, 0x74E4 );
+        rtl8168_mac_ocp_write( tp, 0xF85A, 0x49C5 );
+        rtl8168_mac_ocp_write( tp, 0xF85C, 0xF106 );
+        rtl8168_mac_ocp_write( tp, 0xF85E, 0x49C6 );
+        rtl8168_mac_ocp_write( tp, 0xF860, 0xF107 );
+        rtl8168_mac_ocp_write( tp, 0xF862, 0x48C8 );
+        rtl8168_mac_ocp_write( tp, 0xF864, 0x48C9 );
+        rtl8168_mac_ocp_write( tp, 0xF866, 0xE011 );
+        rtl8168_mac_ocp_write( tp, 0xF868, 0x48C9 );
+        rtl8168_mac_ocp_write( tp, 0xF86A, 0x4848 );
+        rtl8168_mac_ocp_write( tp, 0xF86C, 0xE00E );
+        rtl8168_mac_ocp_write( tp, 0xF86E, 0x4848 );
+        rtl8168_mac_ocp_write( tp, 0xF870, 0x49C7 );
+        rtl8168_mac_ocp_write( tp, 0xF872, 0xF00A );
+        rtl8168_mac_ocp_write( tp, 0xF874, 0x48C9 );
+        rtl8168_mac_ocp_write( tp, 0xF876, 0xC60D );
+        rtl8168_mac_ocp_write( tp, 0xF878, 0x1D1F );
+        rtl8168_mac_ocp_write( tp, 0xF87A, 0x8DC2 );
+        rtl8168_mac_ocp_write( tp, 0xF87C, 0x1D00 );
+        rtl8168_mac_ocp_write( tp, 0xF87E, 0x8DC3 );
+        rtl8168_mac_ocp_write( tp, 0xF880, 0x1D11 );
+        rtl8168_mac_ocp_write( tp, 0xF882, 0x8DC0 );
+        rtl8168_mac_ocp_write( tp, 0xF884, 0xE002 );
+        rtl8168_mac_ocp_write( tp, 0xF886, 0x4849 );
+        rtl8168_mac_ocp_write( tp, 0xF888, 0x94E5 );
+        rtl8168_mac_ocp_write( tp, 0xF88A, 0xC602 );
+        rtl8168_mac_ocp_write( tp, 0xF88C, 0xBE00 );
+        rtl8168_mac_ocp_write( tp, 0xF88E, 0x0238 );
+        rtl8168_mac_ocp_write( tp, 0xF890, 0xE434 );
+        rtl8168_mac_ocp_write( tp, 0xF892, 0x49D9 );
+        rtl8168_mac_ocp_write( tp, 0xF894, 0xF01B );
+        rtl8168_mac_ocp_write( tp, 0xF896, 0xC31E );
+        rtl8168_mac_ocp_write( tp, 0xF898, 0x7464 );
+        rtl8168_mac_ocp_write( tp, 0xF89A, 0x49C4 );
+        rtl8168_mac_ocp_write( tp, 0xF89C, 0xF114 );
+        rtl8168_mac_ocp_write( tp, 0xF89E, 0xC31B );
+        rtl8168_mac_ocp_write( tp, 0xF8A0, 0x6460 );
+        rtl8168_mac_ocp_write( tp, 0xF8A2, 0x14FA );
+        rtl8168_mac_ocp_write( tp, 0xF8A4, 0xFA02 );
+        rtl8168_mac_ocp_write( tp, 0xF8A6, 0xE00F );
+        rtl8168_mac_ocp_write( tp, 0xF8A8, 0xC317 );
+        rtl8168_mac_ocp_write( tp, 0xF8AA, 0x7460 );
+        rtl8168_mac_ocp_write( tp, 0xF8AC, 0x49C0 );
+        rtl8168_mac_ocp_write( tp, 0xF8AE, 0xF10B );
+        rtl8168_mac_ocp_write( tp, 0xF8B0, 0xC311 );
+        rtl8168_mac_ocp_write( tp, 0xF8B2, 0x7462 );
+        rtl8168_mac_ocp_write( tp, 0xF8B4, 0x48C1 );
+        rtl8168_mac_ocp_write( tp, 0xF8B6, 0x9C62 );
+        rtl8168_mac_ocp_write( tp, 0xF8B8, 0x4841 );
+        rtl8168_mac_ocp_write( tp, 0xF8BA, 0x9C62 );
+        rtl8168_mac_ocp_write( tp, 0xF8BC, 0xC30A );
+        rtl8168_mac_ocp_write( tp, 0xF8BE, 0x1C04 );
+        rtl8168_mac_ocp_write( tp, 0xF8C0, 0x8C60 );
+        rtl8168_mac_ocp_write( tp, 0xF8C2, 0xE004 );
+        rtl8168_mac_ocp_write( tp, 0xF8C4, 0x1C15 );
+        rtl8168_mac_ocp_write( tp, 0xF8C6, 0xC305 );
+        rtl8168_mac_ocp_write( tp, 0xF8C8, 0x8C60 );
+        rtl8168_mac_ocp_write( tp, 0xF8CA, 0xC602 );
+        rtl8168_mac_ocp_write( tp, 0xF8CC, 0xBE00 );
+        rtl8168_mac_ocp_write( tp, 0xF8CE, 0x0374 );
+        rtl8168_mac_ocp_write( tp, 0xF8D0, 0xE434 );
+        rtl8168_mac_ocp_write( tp, 0xF8D2, 0xE030 );
+        rtl8168_mac_ocp_write( tp, 0xF8D4, 0xE61C );
+        rtl8168_mac_ocp_write( tp, 0xF8D6, 0xE906 );
+        rtl8168_mac_ocp_write( tp, 0xF8D8, 0xC602 );
+        rtl8168_mac_ocp_write( tp, 0xF8DA, 0xBE00 );
+        rtl8168_mac_ocp_write( tp, 0xF8DC, 0x0000 );
+
+        rtl8168_mac_ocp_write( tp, 0xFC26, 0x8000 );
+
+        rtl8168_mac_ocp_write( tp, 0xFC28, 0x0493 );
+        rtl8168_mac_ocp_write( tp, 0xFC2A, 0x0205 );
+        rtl8168_mac_ocp_write( tp, 0xFC2C, 0x0589 );
+        rtl8168_mac_ocp_write( tp, 0xFC2E, 0x0647 );
+        rtl8168_mac_ocp_write( tp, 0xFC30, 0x0000 );
+        rtl8168_mac_ocp_write( tp, 0xFC32, 0x0215 );
+        rtl8168_mac_ocp_write( tp, 0xFC34, 0x0285 );
+}
+
+static void
+rtl8168_set_mac_mcu_8168gu_2(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        rtl8168_hw_disable_mac_mcu_bps(dev);
+
+        rtl8168_mac_ocp_write( tp, 0xF800, 0xE008 );
+        rtl8168_mac_ocp_write( tp, 0xF802, 0xE00A );
+        rtl8168_mac_ocp_write( tp, 0xF804, 0xE00D );
+        rtl8168_mac_ocp_write( tp, 0xF806, 0xE02F );
+        rtl8168_mac_ocp_write( tp, 0xF808, 0xE031 );
+        rtl8168_mac_ocp_write( tp, 0xF80A, 0xE038 );
+        rtl8168_mac_ocp_write( tp, 0xF80C, 0xE03A );
+        rtl8168_mac_ocp_write( tp, 0xF80E, 0xE051 );
+        rtl8168_mac_ocp_write( tp, 0xF810, 0xC202 );
+        rtl8168_mac_ocp_write( tp, 0xF812, 0xBA00 );
+        rtl8168_mac_ocp_write( tp, 0xF814, 0x0DFC );
+        rtl8168_mac_ocp_write( tp, 0xF816, 0x7444 );
+        rtl8168_mac_ocp_write( tp, 0xF818, 0xC502 );
+        rtl8168_mac_ocp_write( tp, 0xF81A, 0xBD00 );
+        rtl8168_mac_ocp_write( tp, 0xF81C, 0x0A30 );
+        rtl8168_mac_ocp_write( tp, 0xF81E, 0x49D9 );
+        rtl8168_mac_ocp_write( tp, 0xF820, 0xF019 );
+        rtl8168_mac_ocp_write( tp, 0xF822, 0xC520 );
+        rtl8168_mac_ocp_write( tp, 0xF824, 0x64A5 );
+        rtl8168_mac_ocp_write( tp, 0xF826, 0x1400 );
+        rtl8168_mac_ocp_write( tp, 0xF828, 0xF007 );
+        rtl8168_mac_ocp_write( tp, 0xF82A, 0x0C01 );
+        rtl8168_mac_ocp_write( tp, 0xF82C, 0x8CA5 );
+        rtl8168_mac_ocp_write( tp, 0xF82E, 0x1C15 );
+        rtl8168_mac_ocp_write( tp, 0xF830, 0xC515 );
+        rtl8168_mac_ocp_write( tp, 0xF832, 0x9CA0 );
+        rtl8168_mac_ocp_write( tp, 0xF834, 0xE00F );
+        rtl8168_mac_ocp_write( tp, 0xF836, 0xC513 );
+        rtl8168_mac_ocp_write( tp, 0xF838, 0x74A0 );
+        rtl8168_mac_ocp_write( tp, 0xF83A, 0x48C8 );
+        rtl8168_mac_ocp_write( tp, 0xF83C, 0x48CA );
+        rtl8168_mac_ocp_write( tp, 0xF83E, 0x9CA0 );
+        rtl8168_mac_ocp_write( tp, 0xF840, 0xC510 );
+        rtl8168_mac_ocp_write( tp, 0xF842, 0x1B00 );
+        rtl8168_mac_ocp_write( tp, 0xF844, 0x9BA0 );
+        rtl8168_mac_ocp_write( tp, 0xF846, 0x1B1C );
+        rtl8168_mac_ocp_write( tp, 0xF848, 0x483F );
+        rtl8168_mac_ocp_write( tp, 0xF84A, 0x9BA2 );
+        rtl8168_mac_ocp_write( tp, 0xF84C, 0x1B04 );
+        rtl8168_mac_ocp_write( tp, 0xF84E, 0xC506 );
+        rtl8168_mac_ocp_write( tp, 0xF850, 0x9BA0 );
+        rtl8168_mac_ocp_write( tp, 0xF852, 0xC603 );
+        rtl8168_mac_ocp_write( tp, 0xF854, 0xBE00 );
+        rtl8168_mac_ocp_write( tp, 0xF856, 0x0298 );
+        rtl8168_mac_ocp_write( tp, 0xF858, 0x03DE );
+        rtl8168_mac_ocp_write( tp, 0xF85A, 0xE434 );
+        rtl8168_mac_ocp_write( tp, 0xF85C, 0xE096 );
+        rtl8168_mac_ocp_write( tp, 0xF85E, 0xE860 );
+        rtl8168_mac_ocp_write( tp, 0xF860, 0xDE20 );
+        rtl8168_mac_ocp_write( tp, 0xF862, 0xD3C0 );
+        rtl8168_mac_ocp_write( tp, 0xF864, 0xC602 );
+        rtl8168_mac_ocp_write( tp, 0xF866, 0xBE00 );
+        rtl8168_mac_ocp_write( tp, 0xF868, 0x0A64 );
+        rtl8168_mac_ocp_write( tp, 0xF86A, 0xC707 );
+        rtl8168_mac_ocp_write( tp, 0xF86C, 0x1D00 );
+        rtl8168_mac_ocp_write( tp, 0xF86E, 0x8DE2 );
+        rtl8168_mac_ocp_write( tp, 0xF870, 0x48C1 );
+        rtl8168_mac_ocp_write( tp, 0xF872, 0xC502 );
+        rtl8168_mac_ocp_write( tp, 0xF874, 0xBD00 );
+        rtl8168_mac_ocp_write( tp, 0xF876, 0x00AA );
+        rtl8168_mac_ocp_write( tp, 0xF878, 0xE0C0 );
+        rtl8168_mac_ocp_write( tp, 0xF87A, 0xC502 );
+        rtl8168_mac_ocp_write( tp, 0xF87C, 0xBD00 );
+        rtl8168_mac_ocp_write( tp, 0xF87E, 0x0132 );
+        rtl8168_mac_ocp_write( tp, 0xF880, 0xC50C );
+        rtl8168_mac_ocp_write( tp, 0xF882, 0x74A2 );
+        rtl8168_mac_ocp_write( tp, 0xF884, 0x49CE );
+        rtl8168_mac_ocp_write( tp, 0xF886, 0xF1FE );
+        rtl8168_mac_ocp_write( tp, 0xF888, 0x1C00 );
+        rtl8168_mac_ocp_write( tp, 0xF88A, 0x9EA0 );
+        rtl8168_mac_ocp_write( tp, 0xF88C, 0x1C1C );
+        rtl8168_mac_ocp_write( tp, 0xF88E, 0x484F );
+        rtl8168_mac_ocp_write( tp, 0xF890, 0x9CA2 );
+        rtl8168_mac_ocp_write( tp, 0xF892, 0xC402 );
+        rtl8168_mac_ocp_write( tp, 0xF894, 0xBC00 );
+        rtl8168_mac_ocp_write( tp, 0xF896, 0x0AFA );
+        rtl8168_mac_ocp_write( tp, 0xF898, 0xDE20 );
+        rtl8168_mac_ocp_write( tp, 0xF89A, 0xE000 );
+        rtl8168_mac_ocp_write( tp, 0xF89C, 0xE092 );
+        rtl8168_mac_ocp_write( tp, 0xF89E, 0xE430 );
+        rtl8168_mac_ocp_write( tp, 0xF8A0, 0xDE20 );
+        rtl8168_mac_ocp_write( tp, 0xF8A2, 0xE0C0 );
+        rtl8168_mac_ocp_write( tp, 0xF8A4, 0xE860 );
+        rtl8168_mac_ocp_write( tp, 0xF8A6, 0xE84C );
+        rtl8168_mac_ocp_write( tp, 0xF8A8, 0xB400 );
+        rtl8168_mac_ocp_write( tp, 0xF8AA, 0xB430 );
+        rtl8168_mac_ocp_write( tp, 0xF8AC, 0xE410 );
+        rtl8168_mac_ocp_write( tp, 0xF8AE, 0xC0AE );
+        rtl8168_mac_ocp_write( tp, 0xF8B0, 0xB407 );
+        rtl8168_mac_ocp_write( tp, 0xF8B2, 0xB406 );
+        rtl8168_mac_ocp_write( tp, 0xF8B4, 0xB405 );
+        rtl8168_mac_ocp_write( tp, 0xF8B6, 0xB404 );
+        rtl8168_mac_ocp_write( tp, 0xF8B8, 0xB403 );
+        rtl8168_mac_ocp_write( tp, 0xF8BA, 0xB402 );
+        rtl8168_mac_ocp_write( tp, 0xF8BC, 0xB401 );
+        rtl8168_mac_ocp_write( tp, 0xF8BE, 0xC7EE );
+        rtl8168_mac_ocp_write( tp, 0xF8C0, 0x76F4 );
+        rtl8168_mac_ocp_write( tp, 0xF8C2, 0xC2ED );
+        rtl8168_mac_ocp_write( tp, 0xF8C4, 0xC3ED );
+        rtl8168_mac_ocp_write( tp, 0xF8C6, 0xC1EF );
+        rtl8168_mac_ocp_write( tp, 0xF8C8, 0xC5F3 );
+        rtl8168_mac_ocp_write( tp, 0xF8CA, 0x74A0 );
+        rtl8168_mac_ocp_write( tp, 0xF8CC, 0x49CD );
+        rtl8168_mac_ocp_write( tp, 0xF8CE, 0xF001 );
+        rtl8168_mac_ocp_write( tp, 0xF8D0, 0xC5EE );
+        rtl8168_mac_ocp_write( tp, 0xF8D2, 0x74A0 );
+        rtl8168_mac_ocp_write( tp, 0xF8D4, 0x49C1 );
+        rtl8168_mac_ocp_write( tp, 0xF8D6, 0xF105 );
+        rtl8168_mac_ocp_write( tp, 0xF8D8, 0xC5E4 );
+        rtl8168_mac_ocp_write( tp, 0xF8DA, 0x74A2 );
+        rtl8168_mac_ocp_write( tp, 0xF8DC, 0x49CE );
+        rtl8168_mac_ocp_write( tp, 0xF8DE, 0xF00B );
+        rtl8168_mac_ocp_write( tp, 0xF8E0, 0x7444 );
+        rtl8168_mac_ocp_write( tp, 0xF8E2, 0x484B );
+        rtl8168_mac_ocp_write( tp, 0xF8E4, 0x9C44 );
+        rtl8168_mac_ocp_write( tp, 0xF8E6, 0x1C10 );
+        rtl8168_mac_ocp_write( tp, 0xF8E8, 0x9C62 );
+        rtl8168_mac_ocp_write( tp, 0xF8EA, 0x1C11 );
+        rtl8168_mac_ocp_write( tp, 0xF8EC, 0x8C60 );
+        rtl8168_mac_ocp_write( tp, 0xF8EE, 0x1C00 );
+        rtl8168_mac_ocp_write( tp, 0xF8F0, 0x9CF6 );
+        rtl8168_mac_ocp_write( tp, 0xF8F2, 0xE0EC );
+        rtl8168_mac_ocp_write( tp, 0xF8F4, 0x49E7 );
+        rtl8168_mac_ocp_write( tp, 0xF8F6, 0xF016 );
+        rtl8168_mac_ocp_write( tp, 0xF8F8, 0x1D80 );
+        rtl8168_mac_ocp_write( tp, 0xF8FA, 0x8DF4 );
+        rtl8168_mac_ocp_write( tp, 0xF8FC, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xF8FE, 0x4843 );
+        rtl8168_mac_ocp_write( tp, 0xF900, 0x8CF8 );
+        rtl8168_mac_ocp_write( tp, 0xF902, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xF904, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xF906, 0x7444 );
+        rtl8168_mac_ocp_write( tp, 0xF908, 0x48C8 );
+        rtl8168_mac_ocp_write( tp, 0xF90A, 0x48C9 );
+        rtl8168_mac_ocp_write( tp, 0xF90C, 0x48CA );
+        rtl8168_mac_ocp_write( tp, 0xF90E, 0x9C44 );
+        rtl8168_mac_ocp_write( tp, 0xF910, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xF912, 0x4844 );
+        rtl8168_mac_ocp_write( tp, 0xF914, 0x8CF8 );
+        rtl8168_mac_ocp_write( tp, 0xF916, 0x1E01 );
+        rtl8168_mac_ocp_write( tp, 0xF918, 0xE8DB );
+        rtl8168_mac_ocp_write( tp, 0xF91A, 0x7420 );
+        rtl8168_mac_ocp_write( tp, 0xF91C, 0x48C1 );
+        rtl8168_mac_ocp_write( tp, 0xF91E, 0x9C20 );
+        rtl8168_mac_ocp_write( tp, 0xF920, 0xE0D5 );
+        rtl8168_mac_ocp_write( tp, 0xF922, 0x49E6 );
+        rtl8168_mac_ocp_write( tp, 0xF924, 0xF02A );
+        rtl8168_mac_ocp_write( tp, 0xF926, 0x1D40 );
+        rtl8168_mac_ocp_write( tp, 0xF928, 0x8DF4 );
+        rtl8168_mac_ocp_write( tp, 0xF92A, 0x74FC );
+        rtl8168_mac_ocp_write( tp, 0xF92C, 0x49C0 );
+        rtl8168_mac_ocp_write( tp, 0xF92E, 0xF124 );
+        rtl8168_mac_ocp_write( tp, 0xF930, 0x49C1 );
+        rtl8168_mac_ocp_write( tp, 0xF932, 0xF122 );
+        rtl8168_mac_ocp_write( tp, 0xF934, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xF936, 0x49C0 );
+        rtl8168_mac_ocp_write( tp, 0xF938, 0xF01F );
+        rtl8168_mac_ocp_write( tp, 0xF93A, 0xE8D3 );
+        rtl8168_mac_ocp_write( tp, 0xF93C, 0x48C4 );
+        rtl8168_mac_ocp_write( tp, 0xF93E, 0x8CF8 );
+        rtl8168_mac_ocp_write( tp, 0xF940, 0x1E00 );
+        rtl8168_mac_ocp_write( tp, 0xF942, 0xE8C6 );
+        rtl8168_mac_ocp_write( tp, 0xF944, 0xC5B1 );
+        rtl8168_mac_ocp_write( tp, 0xF946, 0x74A0 );
+        rtl8168_mac_ocp_write( tp, 0xF948, 0x49C3 );
+        rtl8168_mac_ocp_write( tp, 0xF94A, 0xF016 );
+        rtl8168_mac_ocp_write( tp, 0xF94C, 0xC5AF );
+        rtl8168_mac_ocp_write( tp, 0xF94E, 0x74A4 );
+        rtl8168_mac_ocp_write( tp, 0xF950, 0x49C2 );
+        rtl8168_mac_ocp_write( tp, 0xF952, 0xF005 );
+        rtl8168_mac_ocp_write( tp, 0xF954, 0xC5AA );
+        rtl8168_mac_ocp_write( tp, 0xF956, 0x74B2 );
+        rtl8168_mac_ocp_write( tp, 0xF958, 0x49C9 );
+        rtl8168_mac_ocp_write( tp, 0xF95A, 0xF10E );
+        rtl8168_mac_ocp_write( tp, 0xF95C, 0xC5A6 );
+        rtl8168_mac_ocp_write( tp, 0xF95E, 0x74A8 );
+        rtl8168_mac_ocp_write( tp, 0xF960, 0x4845 );
+        rtl8168_mac_ocp_write( tp, 0xF962, 0x4846 );
+        rtl8168_mac_ocp_write( tp, 0xF964, 0x4847 );
+        rtl8168_mac_ocp_write( tp, 0xF966, 0x4848 );
+        rtl8168_mac_ocp_write( tp, 0xF968, 0x9CA8 );
+        rtl8168_mac_ocp_write( tp, 0xF96A, 0x74B2 );
+        rtl8168_mac_ocp_write( tp, 0xF96C, 0x4849 );
+        rtl8168_mac_ocp_write( tp, 0xF96E, 0x9CB2 );
+        rtl8168_mac_ocp_write( tp, 0xF970, 0x74A0 );
+        rtl8168_mac_ocp_write( tp, 0xF972, 0x484F );
+        rtl8168_mac_ocp_write( tp, 0xF974, 0x9CA0 );
+        rtl8168_mac_ocp_write( tp, 0xF976, 0xE0AA );
+        rtl8168_mac_ocp_write( tp, 0xF978, 0x49E4 );
+        rtl8168_mac_ocp_write( tp, 0xF97A, 0xF018 );
+        rtl8168_mac_ocp_write( tp, 0xF97C, 0x1D10 );
+        rtl8168_mac_ocp_write( tp, 0xF97E, 0x8DF4 );
+        rtl8168_mac_ocp_write( tp, 0xF980, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xF982, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xF984, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xF986, 0x4843 );
+        rtl8168_mac_ocp_write( tp, 0xF988, 0x8CF8 );
+        rtl8168_mac_ocp_write( tp, 0xF98A, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xF98C, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xF98E, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xF990, 0x4844 );
+        rtl8168_mac_ocp_write( tp, 0xF992, 0x4842 );
+        rtl8168_mac_ocp_write( tp, 0xF994, 0x4841 );
+        rtl8168_mac_ocp_write( tp, 0xF996, 0x8CF8 );
+        rtl8168_mac_ocp_write( tp, 0xF998, 0x1E01 );
+        rtl8168_mac_ocp_write( tp, 0xF99A, 0xE89A );
+        rtl8168_mac_ocp_write( tp, 0xF99C, 0x7420 );
+        rtl8168_mac_ocp_write( tp, 0xF99E, 0x4841 );
+        rtl8168_mac_ocp_write( tp, 0xF9A0, 0x9C20 );
+        rtl8168_mac_ocp_write( tp, 0xF9A2, 0x7444 );
+        rtl8168_mac_ocp_write( tp, 0xF9A4, 0x4848 );
+        rtl8168_mac_ocp_write( tp, 0xF9A6, 0x9C44 );
+        rtl8168_mac_ocp_write( tp, 0xF9A8, 0xE091 );
+        rtl8168_mac_ocp_write( tp, 0xF9AA, 0x49E5 );
+        rtl8168_mac_ocp_write( tp, 0xF9AC, 0xF03E );
+        rtl8168_mac_ocp_write( tp, 0xF9AE, 0x1D20 );
+        rtl8168_mac_ocp_write( tp, 0xF9B0, 0x8DF4 );
+        rtl8168_mac_ocp_write( tp, 0xF9B2, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xF9B4, 0x48C2 );
+        rtl8168_mac_ocp_write( tp, 0xF9B6, 0x4841 );
+        rtl8168_mac_ocp_write( tp, 0xF9B8, 0x8CF8 );
+        rtl8168_mac_ocp_write( tp, 0xF9BA, 0x1E01 );
+        rtl8168_mac_ocp_write( tp, 0xF9BC, 0x7444 );
+        rtl8168_mac_ocp_write( tp, 0xF9BE, 0x49CA );
+        rtl8168_mac_ocp_write( tp, 0xF9C0, 0xF103 );
+        rtl8168_mac_ocp_write( tp, 0xF9C2, 0x49C2 );
+        rtl8168_mac_ocp_write( tp, 0xF9C4, 0xF00C );
+        rtl8168_mac_ocp_write( tp, 0xF9C6, 0x49C1 );
+        rtl8168_mac_ocp_write( tp, 0xF9C8, 0xF004 );
+        rtl8168_mac_ocp_write( tp, 0xF9CA, 0x6447 );
+        rtl8168_mac_ocp_write( tp, 0xF9CC, 0x2244 );
+        rtl8168_mac_ocp_write( tp, 0xF9CE, 0xE002 );
+        rtl8168_mac_ocp_write( tp, 0xF9D0, 0x1C01 );
+        rtl8168_mac_ocp_write( tp, 0xF9D2, 0x9C62 );
+        rtl8168_mac_ocp_write( tp, 0xF9D4, 0x1C11 );
+        rtl8168_mac_ocp_write( tp, 0xF9D6, 0x8C60 );
+        rtl8168_mac_ocp_write( tp, 0xF9D8, 0x1C00 );
+        rtl8168_mac_ocp_write( tp, 0xF9DA, 0x9CF6 );
+        rtl8168_mac_ocp_write( tp, 0xF9DC, 0x7444 );
+        rtl8168_mac_ocp_write( tp, 0xF9DE, 0x49C8 );
+        rtl8168_mac_ocp_write( tp, 0xF9E0, 0xF01D );
+        rtl8168_mac_ocp_write( tp, 0xF9E2, 0x74FC );
+        rtl8168_mac_ocp_write( tp, 0xF9E4, 0x49C0 );
+        rtl8168_mac_ocp_write( tp, 0xF9E6, 0xF11A );
+        rtl8168_mac_ocp_write( tp, 0xF9E8, 0x49C1 );
+        rtl8168_mac_ocp_write( tp, 0xF9EA, 0xF118 );
+        rtl8168_mac_ocp_write( tp, 0xF9EC, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xF9EE, 0x49C0 );
+        rtl8168_mac_ocp_write( tp, 0xF9F0, 0xF015 );
+        rtl8168_mac_ocp_write( tp, 0xF9F2, 0x49C6 );
+        rtl8168_mac_ocp_write( tp, 0xF9F4, 0xF113 );
+        rtl8168_mac_ocp_write( tp, 0xF9F6, 0xE875 );
+        rtl8168_mac_ocp_write( tp, 0xF9F8, 0x48C4 );
+        rtl8168_mac_ocp_write( tp, 0xF9FA, 0x8CF8 );
+        rtl8168_mac_ocp_write( tp, 0xF9FC, 0x7420 );
+        rtl8168_mac_ocp_write( tp, 0xF9FE, 0x48C1 );
+        rtl8168_mac_ocp_write( tp, 0xFA00, 0x9C20 );
+        rtl8168_mac_ocp_write( tp, 0xFA02, 0xC50A );
+        rtl8168_mac_ocp_write( tp, 0xFA04, 0x74A2 );
+        rtl8168_mac_ocp_write( tp, 0xFA06, 0x8CA5 );
+        rtl8168_mac_ocp_write( tp, 0xFA08, 0x74A0 );
+        rtl8168_mac_ocp_write( tp, 0xFA0A, 0xC505 );
+        rtl8168_mac_ocp_write( tp, 0xFA0C, 0x9CA2 );
+        rtl8168_mac_ocp_write( tp, 0xFA0E, 0x1C11 );
+        rtl8168_mac_ocp_write( tp, 0xFA10, 0x9CA0 );
+        rtl8168_mac_ocp_write( tp, 0xFA12, 0xE00A );
+        rtl8168_mac_ocp_write( tp, 0xFA14, 0xE434 );
+        rtl8168_mac_ocp_write( tp, 0xFA16, 0xD3C0 );
+        rtl8168_mac_ocp_write( tp, 0xFA18, 0xDC00 );
+        rtl8168_mac_ocp_write( tp, 0xFA1A, 0x7444 );
+        rtl8168_mac_ocp_write( tp, 0xFA1C, 0x49CA );
+        rtl8168_mac_ocp_write( tp, 0xFA1E, 0xF004 );
+        rtl8168_mac_ocp_write( tp, 0xFA20, 0x48CA );
+        rtl8168_mac_ocp_write( tp, 0xFA22, 0x9C44 );
+        rtl8168_mac_ocp_write( tp, 0xFA24, 0xE855 );
+        rtl8168_mac_ocp_write( tp, 0xFA26, 0xE052 );
+        rtl8168_mac_ocp_write( tp, 0xFA28, 0x49E8 );
+        rtl8168_mac_ocp_write( tp, 0xFA2A, 0xF024 );
+        rtl8168_mac_ocp_write( tp, 0xFA2C, 0x1D01 );
+        rtl8168_mac_ocp_write( tp, 0xFA2E, 0x8DF5 );
+        rtl8168_mac_ocp_write( tp, 0xFA30, 0x7440 );
+        rtl8168_mac_ocp_write( tp, 0xFA32, 0x49C0 );
+        rtl8168_mac_ocp_write( tp, 0xFA34, 0xF11E );
+        rtl8168_mac_ocp_write( tp, 0xFA36, 0x7444 );
+        rtl8168_mac_ocp_write( tp, 0xFA38, 0x49C8 );
+        rtl8168_mac_ocp_write( tp, 0xFA3A, 0xF01B );
+        rtl8168_mac_ocp_write( tp, 0xFA3C, 0x49CA );
+        rtl8168_mac_ocp_write( tp, 0xFA3E, 0xF119 );
+        rtl8168_mac_ocp_write( tp, 0xFA40, 0xC5EC );
+        rtl8168_mac_ocp_write( tp, 0xFA42, 0x76A4 );
+        rtl8168_mac_ocp_write( tp, 0xFA44, 0x49E3 );
+        rtl8168_mac_ocp_write( tp, 0xFA46, 0xF015 );
+        rtl8168_mac_ocp_write( tp, 0xFA48, 0x49C0 );
+        rtl8168_mac_ocp_write( tp, 0xFA4A, 0xF103 );
+        rtl8168_mac_ocp_write( tp, 0xFA4C, 0x49C1 );
+        rtl8168_mac_ocp_write( tp, 0xFA4E, 0xF011 );
+        rtl8168_mac_ocp_write( tp, 0xFA50, 0x4849 );
+        rtl8168_mac_ocp_write( tp, 0xFA52, 0x9C44 );
+        rtl8168_mac_ocp_write( tp, 0xFA54, 0x1C00 );
+        rtl8168_mac_ocp_write( tp, 0xFA56, 0x9CF6 );
+        rtl8168_mac_ocp_write( tp, 0xFA58, 0x7444 );
+        rtl8168_mac_ocp_write( tp, 0xFA5A, 0x49C1 );
+        rtl8168_mac_ocp_write( tp, 0xFA5C, 0xF004 );
+        rtl8168_mac_ocp_write( tp, 0xFA5E, 0x6446 );
+        rtl8168_mac_ocp_write( tp, 0xFA60, 0x1E07 );
+        rtl8168_mac_ocp_write( tp, 0xFA62, 0xE003 );
+        rtl8168_mac_ocp_write( tp, 0xFA64, 0x1C01 );
+        rtl8168_mac_ocp_write( tp, 0xFA66, 0x1E03 );
+        rtl8168_mac_ocp_write( tp, 0xFA68, 0x9C62 );
+        rtl8168_mac_ocp_write( tp, 0xFA6A, 0x1C11 );
+        rtl8168_mac_ocp_write( tp, 0xFA6C, 0x8C60 );
+        rtl8168_mac_ocp_write( tp, 0xFA6E, 0xE830 );
+        rtl8168_mac_ocp_write( tp, 0xFA70, 0xE02D );
+        rtl8168_mac_ocp_write( tp, 0xFA72, 0x49E9 );
+        rtl8168_mac_ocp_write( tp, 0xFA74, 0xF004 );
+        rtl8168_mac_ocp_write( tp, 0xFA76, 0x1D02 );
+        rtl8168_mac_ocp_write( tp, 0xFA78, 0x8DF5 );
+        rtl8168_mac_ocp_write( tp, 0xFA7A, 0xE79C );
+        rtl8168_mac_ocp_write( tp, 0xFA7C, 0x49E3 );
+        rtl8168_mac_ocp_write( tp, 0xFA7E, 0xF006 );
+        rtl8168_mac_ocp_write( tp, 0xFA80, 0x1D08 );
+        rtl8168_mac_ocp_write( tp, 0xFA82, 0x8DF4 );
+        rtl8168_mac_ocp_write( tp, 0xFA84, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xFA86, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xFA88, 0xE73A );
+        rtl8168_mac_ocp_write( tp, 0xFA8A, 0x49E1 );
+        rtl8168_mac_ocp_write( tp, 0xFA8C, 0xF007 );
+        rtl8168_mac_ocp_write( tp, 0xFA8E, 0x1D02 );
+        rtl8168_mac_ocp_write( tp, 0xFA90, 0x8DF4 );
+        rtl8168_mac_ocp_write( tp, 0xFA92, 0x1E01 );
+        rtl8168_mac_ocp_write( tp, 0xFA94, 0xE7A7 );
+        rtl8168_mac_ocp_write( tp, 0xFA96, 0xDE20 );
+        rtl8168_mac_ocp_write( tp, 0xFA98, 0xE410 );
+        rtl8168_mac_ocp_write( tp, 0xFA9A, 0x49E0 );
+        rtl8168_mac_ocp_write( tp, 0xFA9C, 0xF017 );
+        rtl8168_mac_ocp_write( tp, 0xFA9E, 0x1D01 );
+        rtl8168_mac_ocp_write( tp, 0xFAA0, 0x8DF4 );
+        rtl8168_mac_ocp_write( tp, 0xFAA2, 0xC5FA );
+        rtl8168_mac_ocp_write( tp, 0xFAA4, 0x1C00 );
+        rtl8168_mac_ocp_write( tp, 0xFAA6, 0x8CA0 );
+        rtl8168_mac_ocp_write( tp, 0xFAA8, 0x1C1B );
+        rtl8168_mac_ocp_write( tp, 0xFAAA, 0x9CA2 );
+        rtl8168_mac_ocp_write( tp, 0xFAAC, 0x74A2 );
+        rtl8168_mac_ocp_write( tp, 0xFAAE, 0x49CF );
+        rtl8168_mac_ocp_write( tp, 0xFAB0, 0xF0FE );
+        rtl8168_mac_ocp_write( tp, 0xFAB2, 0xC5F3 );
+        rtl8168_mac_ocp_write( tp, 0xFAB4, 0x74A0 );
+        rtl8168_mac_ocp_write( tp, 0xFAB6, 0x4849 );
+        rtl8168_mac_ocp_write( tp, 0xFAB8, 0x9CA0 );
+        rtl8168_mac_ocp_write( tp, 0xFABA, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xFABC, 0x49C0 );
+        rtl8168_mac_ocp_write( tp, 0xFABE, 0xF006 );
+        rtl8168_mac_ocp_write( tp, 0xFAC0, 0x48C3 );
+        rtl8168_mac_ocp_write( tp, 0xFAC2, 0x8CF8 );
+        rtl8168_mac_ocp_write( tp, 0xFAC4, 0xE820 );
+        rtl8168_mac_ocp_write( tp, 0xFAC6, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xFAC8, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xFACA, 0xC432 );
+        rtl8168_mac_ocp_write( tp, 0xFACC, 0xBC00 );
+        rtl8168_mac_ocp_write( tp, 0xFACE, 0xC5E4 );
+        rtl8168_mac_ocp_write( tp, 0xFAD0, 0x74A2 );
+        rtl8168_mac_ocp_write( tp, 0xFAD2, 0x49CE );
+        rtl8168_mac_ocp_write( tp, 0xFAD4, 0xF1FE );
+        rtl8168_mac_ocp_write( tp, 0xFAD6, 0x9EA0 );
+        rtl8168_mac_ocp_write( tp, 0xFAD8, 0x1C1C );
+        rtl8168_mac_ocp_write( tp, 0xFADA, 0x484F );
+        rtl8168_mac_ocp_write( tp, 0xFADC, 0x9CA2 );
+        rtl8168_mac_ocp_write( tp, 0xFADE, 0xFF80 );
+        rtl8168_mac_ocp_write( tp, 0xFAE0, 0xB404 );
+        rtl8168_mac_ocp_write( tp, 0xFAE2, 0xB405 );
+        rtl8168_mac_ocp_write( tp, 0xFAE4, 0xC5D9 );
+        rtl8168_mac_ocp_write( tp, 0xFAE6, 0x74A2 );
+        rtl8168_mac_ocp_write( tp, 0xFAE8, 0x49CE );
+        rtl8168_mac_ocp_write( tp, 0xFAEA, 0xF1FE );
+        rtl8168_mac_ocp_write( tp, 0xFAEC, 0xC41F );
+        rtl8168_mac_ocp_write( tp, 0xFAEE, 0x9CA0 );
+        rtl8168_mac_ocp_write( tp, 0xFAF0, 0xC41C );
+        rtl8168_mac_ocp_write( tp, 0xFAF2, 0x1C13 );
+        rtl8168_mac_ocp_write( tp, 0xFAF4, 0x484F );
+        rtl8168_mac_ocp_write( tp, 0xFAF6, 0x9CA2 );
+        rtl8168_mac_ocp_write( tp, 0xFAF8, 0x74A2 );
+        rtl8168_mac_ocp_write( tp, 0xFAFA, 0x49CF );
+        rtl8168_mac_ocp_write( tp, 0xFAFC, 0xF1FE );
+        rtl8168_mac_ocp_write( tp, 0xFAFE, 0xB005 );
+        rtl8168_mac_ocp_write( tp, 0xFB00, 0xB004 );
+        rtl8168_mac_ocp_write( tp, 0xFB02, 0xFF80 );
+        rtl8168_mac_ocp_write( tp, 0xFB04, 0xB404 );
+        rtl8168_mac_ocp_write( tp, 0xFB06, 0xB405 );
+        rtl8168_mac_ocp_write( tp, 0xFB08, 0xC5C7 );
+        rtl8168_mac_ocp_write( tp, 0xFB0A, 0x74A2 );
+        rtl8168_mac_ocp_write( tp, 0xFB0C, 0x49CE );
+        rtl8168_mac_ocp_write( tp, 0xFB0E, 0xF1FE );
+        rtl8168_mac_ocp_write( tp, 0xFB10, 0xC40E );
+        rtl8168_mac_ocp_write( tp, 0xFB12, 0x9CA0 );
+        rtl8168_mac_ocp_write( tp, 0xFB14, 0xC40A );
+        rtl8168_mac_ocp_write( tp, 0xFB16, 0x1C13 );
+        rtl8168_mac_ocp_write( tp, 0xFB18, 0x484F );
+        rtl8168_mac_ocp_write( tp, 0xFB1A, 0x9CA2 );
+        rtl8168_mac_ocp_write( tp, 0xFB1C, 0x74A2 );
+        rtl8168_mac_ocp_write( tp, 0xFB1E, 0x49CF );
+        rtl8168_mac_ocp_write( tp, 0xFB20, 0xF1FE );
+        rtl8168_mac_ocp_write( tp, 0xFB22, 0xB005 );
+        rtl8168_mac_ocp_write( tp, 0xFB24, 0xB004 );
+        rtl8168_mac_ocp_write( tp, 0xFB26, 0xFF80 );
+        rtl8168_mac_ocp_write( tp, 0xFB28, 0x0000 );
+        rtl8168_mac_ocp_write( tp, 0xFB2A, 0x0481 );
+        rtl8168_mac_ocp_write( tp, 0xFB2C, 0x0C81 );
+        rtl8168_mac_ocp_write( tp, 0xFB2E, 0x0AE0 );
+
+
+        rtl8168_mac_ocp_write( tp, 0xFC26, 0x8000 );
+
+        rtl8168_mac_ocp_write( tp, 0xFC28, 0x0000 );
+        rtl8168_mac_ocp_write( tp, 0xFC2A, 0x0000 );
+        rtl8168_mac_ocp_write( tp, 0xFC2C, 0x0297 );
+        rtl8168_mac_ocp_write( tp, 0xFC2E, 0x0000 );
+        rtl8168_mac_ocp_write( tp, 0xFC30, 0x00A9 );
+        rtl8168_mac_ocp_write( tp, 0xFC32, 0x012D );
+        rtl8168_mac_ocp_write( tp, 0xFC34, 0x0000 );
+        rtl8168_mac_ocp_write( tp, 0xFC36, 0x08DF );
+}
+
+static void
+rtl8168_set_mac_mcu_8411b_1(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        rtl8168_hw_disable_mac_mcu_bps(dev);
+
+        rtl8168_mac_ocp_write( tp, 0xF800, 0xE008 );
+        rtl8168_mac_ocp_write( tp, 0xF802, 0xE00A );
+        rtl8168_mac_ocp_write( tp, 0xF804, 0xE00C );
+        rtl8168_mac_ocp_write( tp, 0xF806, 0xE00E );
+        rtl8168_mac_ocp_write( tp, 0xF808, 0xE027 );
+        rtl8168_mac_ocp_write( tp, 0xF80A, 0xE04F );
+        rtl8168_mac_ocp_write( tp, 0xF80C, 0xE05E );
+        rtl8168_mac_ocp_write( tp, 0xF80E, 0xE065 );
+        rtl8168_mac_ocp_write( tp, 0xF810, 0xC602 );
+        rtl8168_mac_ocp_write( tp, 0xF812, 0xBE00 );
+        rtl8168_mac_ocp_write( tp, 0xF814, 0x0000 );
+        rtl8168_mac_ocp_write( tp, 0xF816, 0xC502 );
+        rtl8168_mac_ocp_write( tp, 0xF818, 0xBD00 );
+        rtl8168_mac_ocp_write( tp, 0xF81A, 0x074C );
+        rtl8168_mac_ocp_write( tp, 0xF81C, 0xC302 );
+        rtl8168_mac_ocp_write( tp, 0xF81E, 0xBB00 );
+        rtl8168_mac_ocp_write( tp, 0xF820, 0x080A );
+        rtl8168_mac_ocp_write( tp, 0xF822, 0x6420 );
+        rtl8168_mac_ocp_write( tp, 0xF824, 0x48C2 );
+        rtl8168_mac_ocp_write( tp, 0xF826, 0x8C20 );
+        rtl8168_mac_ocp_write( tp, 0xF828, 0xC516 );
+        rtl8168_mac_ocp_write( tp, 0xF82A, 0x64A4 );
+        rtl8168_mac_ocp_write( tp, 0xF82C, 0x49C0 );
+        rtl8168_mac_ocp_write( tp, 0xF82E, 0xF009 );
+        rtl8168_mac_ocp_write( tp, 0xF830, 0x74A2 );
+        rtl8168_mac_ocp_write( tp, 0xF832, 0x8CA5 );
+        rtl8168_mac_ocp_write( tp, 0xF834, 0x74A0 );
+        rtl8168_mac_ocp_write( tp, 0xF836, 0xC50E );
+        rtl8168_mac_ocp_write( tp, 0xF838, 0x9CA2 );
+        rtl8168_mac_ocp_write( tp, 0xF83A, 0x1C11 );
+        rtl8168_mac_ocp_write( tp, 0xF83C, 0x9CA0 );
+        rtl8168_mac_ocp_write( tp, 0xF83E, 0xE006 );
+        rtl8168_mac_ocp_write( tp, 0xF840, 0x74F8 );
+        rtl8168_mac_ocp_write( tp, 0xF842, 0x48C4 );
+        rtl8168_mac_ocp_write( tp, 0xF844, 0x8CF8 );
+        rtl8168_mac_ocp_write( tp, 0xF846, 0xC404 );
+        rtl8168_mac_ocp_write( tp, 0xF848, 0xBC00 );
+        rtl8168_mac_ocp_write( tp, 0xF84A, 0xC403 );
+        rtl8168_mac_ocp_write( tp, 0xF84C, 0xBC00 );
+        rtl8168_mac_ocp_write( tp, 0xF84E, 0x0BF2 );
+        rtl8168_mac_ocp_write( tp, 0xF850, 0x0C0A );
+        rtl8168_mac_ocp_write( tp, 0xF852, 0xE434 );
+        rtl8168_mac_ocp_write( tp, 0xF854, 0xD3C0 );
+        rtl8168_mac_ocp_write( tp, 0xF856, 0x49D9 );
+        rtl8168_mac_ocp_write( tp, 0xF858, 0xF01F );
+        rtl8168_mac_ocp_write( tp, 0xF85A, 0xC526 );
+        rtl8168_mac_ocp_write( tp, 0xF85C, 0x64A5 );
+        rtl8168_mac_ocp_write( tp, 0xF85E, 0x1400 );
+        rtl8168_mac_ocp_write( tp, 0xF860, 0xF007 );
+        rtl8168_mac_ocp_write( tp, 0xF862, 0x0C01 );
+        rtl8168_mac_ocp_write( tp, 0xF864, 0x8CA5 );
+        rtl8168_mac_ocp_write( tp, 0xF866, 0x1C15 );
+        rtl8168_mac_ocp_write( tp, 0xF868, 0xC51B );
+        rtl8168_mac_ocp_write( tp, 0xF86A, 0x9CA0 );
+        rtl8168_mac_ocp_write( tp, 0xF86C, 0xE013 );
+        rtl8168_mac_ocp_write( tp, 0xF86E, 0xC519 );
+        rtl8168_mac_ocp_write( tp, 0xF870, 0x74A0 );
+        rtl8168_mac_ocp_write( tp, 0xF872, 0x48C4 );
+        rtl8168_mac_ocp_write( tp, 0xF874, 0x8CA0 );
+        rtl8168_mac_ocp_write( tp, 0xF876, 0xC516 );
+        rtl8168_mac_ocp_write( tp, 0xF878, 0x74A4 );
+        rtl8168_mac_ocp_write( tp, 0xF87A, 0x48C8 );
+        rtl8168_mac_ocp_write( tp, 0xF87C, 0x48CA );
+        rtl8168_mac_ocp_write( tp, 0xF87E, 0x9CA4 );
+        rtl8168_mac_ocp_write( tp, 0xF880, 0xC512 );
+        rtl8168_mac_ocp_write( tp, 0xF882, 0x1B00 );
+        rtl8168_mac_ocp_write( tp, 0xF884, 0x9BA0 );
+        rtl8168_mac_ocp_write( tp, 0xF886, 0x1B1C );
+        rtl8168_mac_ocp_write( tp, 0xF888, 0x483F );
+        rtl8168_mac_ocp_write( tp, 0xF88A, 0x9BA2 );
+        rtl8168_mac_ocp_write( tp, 0xF88C, 0x1B04 );
+        rtl8168_mac_ocp_write( tp, 0xF88E, 0xC508 );
+        rtl8168_mac_ocp_write( tp, 0xF890, 0x9BA0 );
+        rtl8168_mac_ocp_write( tp, 0xF892, 0xC505 );
+        rtl8168_mac_ocp_write( tp, 0xF894, 0xBD00 );
+        rtl8168_mac_ocp_write( tp, 0xF896, 0xC502 );
+        rtl8168_mac_ocp_write( tp, 0xF898, 0xBD00 );
+        rtl8168_mac_ocp_write( tp, 0xF89A, 0x0300 );
+        rtl8168_mac_ocp_write( tp, 0xF89C, 0x051E );
+        rtl8168_mac_ocp_write( tp, 0xF89E, 0xE434 );
+        rtl8168_mac_ocp_write( tp, 0xF8A0, 0xE018 );
+        rtl8168_mac_ocp_write( tp, 0xF8A2, 0xE092 );
+        rtl8168_mac_ocp_write( tp, 0xF8A4, 0xDE20 );
+        rtl8168_mac_ocp_write( tp, 0xF8A6, 0xD3C0 );
+        rtl8168_mac_ocp_write( tp, 0xF8A8, 0xC50F );
+        rtl8168_mac_ocp_write( tp, 0xF8AA, 0x76A4 );
+        rtl8168_mac_ocp_write( tp, 0xF8AC, 0x49E3 );
+        rtl8168_mac_ocp_write( tp, 0xF8AE, 0xF007 );
+        rtl8168_mac_ocp_write( tp, 0xF8B0, 0x49C0 );
+        rtl8168_mac_ocp_write( tp, 0xF8B2, 0xF103 );
+        rtl8168_mac_ocp_write( tp, 0xF8B4, 0xC607 );
+        rtl8168_mac_ocp_write( tp, 0xF8B6, 0xBE00 );
+        rtl8168_mac_ocp_write( tp, 0xF8B8, 0xC606 );
+        rtl8168_mac_ocp_write( tp, 0xF8BA, 0xBE00 );
+        rtl8168_mac_ocp_write( tp, 0xF8BC, 0xC602 );
+        rtl8168_mac_ocp_write( tp, 0xF8BE, 0xBE00 );
+        rtl8168_mac_ocp_write( tp, 0xF8C0, 0x0C4C );
+        rtl8168_mac_ocp_write( tp, 0xF8C2, 0x0C28 );
+        rtl8168_mac_ocp_write( tp, 0xF8C4, 0x0C2C );
+        rtl8168_mac_ocp_write( tp, 0xF8C6, 0xDC00 );
+        rtl8168_mac_ocp_write( tp, 0xF8C8, 0xC707 );
+        rtl8168_mac_ocp_write( tp, 0xF8CA, 0x1D00 );
+        rtl8168_mac_ocp_write( tp, 0xF8CC, 0x8DE2 );
+        rtl8168_mac_ocp_write( tp, 0xF8CE, 0x48C1 );
+        rtl8168_mac_ocp_write( tp, 0xF8D0, 0xC502 );
+        rtl8168_mac_ocp_write( tp, 0xF8D2, 0xBD00 );
+        rtl8168_mac_ocp_write( tp, 0xF8D4, 0x00AA );
+        rtl8168_mac_ocp_write( tp, 0xF8D6, 0xE0C0 );
+        rtl8168_mac_ocp_write( tp, 0xF8D8, 0xC502 );
+        rtl8168_mac_ocp_write( tp, 0xF8DA, 0xBD00 );
+        rtl8168_mac_ocp_write( tp, 0xF8DC, 0x0132 );
+
+        rtl8168_mac_ocp_write( tp, 0xFC26, 0x8000 );
+
+        rtl8168_mac_ocp_write( tp, 0xFC2A, 0x0743 );
+        rtl8168_mac_ocp_write( tp, 0xFC2C, 0x0801 );
+        rtl8168_mac_ocp_write( tp, 0xFC2E, 0x0BE9 );
+        rtl8168_mac_ocp_write( tp, 0xFC30, 0x02FD );
+        rtl8168_mac_ocp_write( tp, 0xFC32, 0x0C25 );
+        rtl8168_mac_ocp_write( tp, 0xFC34, 0x00A9 );
+        rtl8168_mac_ocp_write( tp, 0xFC36, 0x012D );
+}
+
+static void
+rtl8168_set_mac_mcu_8168ep_1(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u16 i;
+        static const u16 mcu_patch_code_8168ep_1[] = {
+                0xE008, 0xE0D3, 0xE0D6, 0xE0D9, 0xE0DB, 0xE0DD, 0xE0DF, 0xE0E1, 0xC251,
+                0x7340, 0x49B1, 0xF010, 0x1D02, 0x8D40, 0xC202, 0xBA00, 0x2C3A, 0xC0F0,
+                0xE8DE, 0x2000, 0x8000, 0xC0B6, 0x268C, 0x752C, 0x49D4, 0xF112, 0xE025,
+                0xC2F6, 0x7146, 0xC2F5, 0x7340, 0x49BE, 0xF103, 0xC7F2, 0xE002, 0xC7F1,
+                0x304F, 0x6226, 0x49A1, 0xF1F0, 0x7222, 0x49A0, 0xF1ED, 0x2525, 0x1F28,
+                0x3097, 0x3091, 0x9A36, 0x752C, 0x21DC, 0x25BC, 0xC6E2, 0x77C0, 0x1304,
+                0xF014, 0x1303, 0xF014, 0x1302, 0xF014, 0x1301, 0xF014, 0x49D4, 0xF103,
+                0xC3D7, 0xBB00, 0xC618, 0x67C6, 0x752E, 0x22D7, 0x26DD, 0x1505, 0xF013,
+                0xC60A, 0xBE00, 0xC309, 0xBB00, 0xC308, 0xBB00, 0xC307, 0xBB00, 0xC306,
+                0xBB00, 0x25C8, 0x25A6, 0x25AC, 0x25B2, 0x25B8, 0xCD08, 0x0000, 0xC0BC,
+                0xC2FF, 0x7340, 0x49B0, 0xF04E, 0x1F46, 0x308F, 0xC3F7, 0x1C04, 0xE84D,
+                0x1401, 0xF147, 0x7226, 0x49A7, 0xF044, 0x7222, 0x2525, 0x1F30, 0x3097,
+                0x3091, 0x7340, 0xC4EA, 0x401C, 0xF006, 0xC6E8, 0x75C0, 0x49D7, 0xF105,
+                0xE036, 0x1D08, 0x8DC1, 0x0208, 0x6640, 0x2764, 0x1606, 0xF12F, 0x6346,
+                0x133B, 0xF12C, 0x9B34, 0x1B18, 0x3093, 0xC32A, 0x1C10, 0xE82A, 0x1401,
+                0xF124, 0x1A36, 0x308A, 0x7322, 0x25B5, 0x0B0E, 0x1C00, 0xE82C, 0xC71F,
+                0x4027, 0xF11A, 0xE838, 0x1F42, 0x308F, 0x1B08, 0xE824, 0x7236, 0x7746,
+                0x1700, 0xF00D, 0xC313, 0x401F, 0xF103, 0x1F00, 0x9F46, 0x7744, 0x449F,
+                0x445F, 0xE817, 0xC70A, 0x4027, 0xF105, 0xC302, 0xBB00, 0x2E08, 0x2DC2,
+                0xC7FF, 0xBF00, 0xCDB8, 0xFFFF, 0x0C02, 0xA554, 0xA5DC, 0x402F, 0xF105,
+                0x1400, 0xF1FA, 0x1C01, 0xE002, 0x1C00, 0xFF80, 0x49B0, 0xF004, 0x0B01,
+                0xA1D3, 0xE003, 0x0B02, 0xA5D3, 0x3127, 0x3720, 0x0B02, 0xA5D3, 0x3127,
+                0x3720, 0x1300, 0xF1FB, 0xFF80, 0x7322, 0x25B5, 0x1E28, 0x30DE, 0x30D9,
+                0x7264, 0x1E11, 0x2368, 0x3116, 0xFF80, 0x1B7E, 0xC602, 0xBE00, 0x06A6,
+                0x1B7E, 0xC602, 0xBE00, 0x0764, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
+                0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
+                0x0000
+        };
+
+        rtl8168_hw_disable_mac_mcu_bps(dev);
+
+        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168ep_1); i++) {
+                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168ep_1[i]);
+        }
+
+        rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
+
+        rtl8168_mac_ocp_write(tp, 0xFC28, 0x2549);
+        rtl8168_mac_ocp_write(tp, 0xFC2A, 0x06A5);
+        rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0763);
+}
+
+static bool
+rtl8168_check_dash_other_fun_present(struct rtl8168_private *tp)
+{
+        //check if func 2 exist
+        if (rtl8168_csi_other_fun_read(tp, 2, 0x00) != 0xffffffff)
+                return true;
+
+        return false;
+}
+
+static void
+rtl8168_set_mac_mcu_8168ep_2(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u16 i;
+        static const u16 mcu_patch_code_8168ep_2[] = {
+                0xE008, 0xE017, 0xE052, 0xE056, 0xE058, 0xE05A, 0xE05C, 0xE05E, 0xC50F,
+                0x76A4, 0x49E3, 0xF007, 0x49C0, 0xF103, 0xC607, 0xBE00, 0xC606, 0xBE00,
+                0xC602, 0xBE00, 0x0BDA, 0x0BB6, 0x0BBA, 0xDC00, 0xB400, 0xB401, 0xB402,
+                0xB403, 0xB404, 0xC02E, 0x7206, 0x49AE, 0xF1FE, 0xC12B, 0x9904, 0xC12A,
+                0x9906, 0x7206, 0x49AE, 0xF1FE, 0x7200, 0x49A0, 0xF117, 0xC123, 0xC223,
+                0xC323, 0xE808, 0xC322, 0xE806, 0xC321, 0xE804, 0xC320, 0xE802, 0xE00C,
+                0x740E, 0x49CE, 0xF1FE, 0x9908, 0x990A, 0x9A0C, 0x9B0E, 0x740E, 0x49CE,
+                0xF1FE, 0xFF80, 0xB004, 0xB003, 0xB002, 0xB001, 0xB000, 0xC604, 0xC002,
+                0xB800, 0x1FC8, 0xE000, 0xE8E0, 0xF128, 0x0002, 0xFFFF, 0xF000, 0x8001,
+                0x8002, 0x8003, 0x8004, 0x48C1, 0x48C2, 0xC502, 0xBD00, 0x0490, 0xC602,
+                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
+                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
+        };
+
+        rtl8168_hw_disable_mac_mcu_bps(dev);
+
+        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168ep_2); i++) {
+                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168ep_2[i]);
+        }
+
+        rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
+
+        rtl8168_mac_ocp_write(tp, 0xFC28, 0x0BB3);
+        if (false == rtl8168_check_dash_other_fun_present(tp))
+                rtl8168_mac_ocp_write(tp, 0xFC2A, 0x1FC7);
+        //rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0485);
+}
+
+static void
+rtl8168_set_mac_mcu_8168h_1(struct net_device *dev)
+{
+        rtl8168_hw_disable_mac_mcu_bps(dev);
+}
+
+static void
+rtl8168_set_mac_mcu_8168h_2(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u16 i;
+        static const u16 mcu_patch_code_8168h_1[] = {
+                0xE008, 0xE00F, 0xE011, 0xE047, 0xE049, 0xE073, 0xE075, 0xE07A, 0xC707,
+                0x1D00, 0x8DE2, 0x48C1, 0xC502, 0xBD00, 0x00E4, 0xE0C0, 0xC502, 0xBD00,
+                0x0216, 0xC634, 0x75C0, 0x49D3, 0xF027, 0xC631, 0x75C0, 0x49D3, 0xF123,
+                0xC627, 0x75C0, 0xB405, 0xC525, 0x9DC0, 0xC621, 0x75C8, 0x49D5, 0xF00A,
+                0x49D6, 0xF008, 0x49D7, 0xF006, 0x49D8, 0xF004, 0x75D2, 0x49D9, 0xF111,
+                0xC517, 0x9DC8, 0xC516, 0x9DD2, 0xC618, 0x75C0, 0x49D4, 0xF003, 0x49D0,
+                0xF104, 0xC60A, 0xC50E, 0x9DC0, 0xB005, 0xC607, 0x9DC0, 0xB007, 0xC602,
+                0xBE00, 0x1A06, 0xB400, 0xE86C, 0xA000, 0x01E1, 0x0200, 0x9200, 0xE84C,
+                0xE004, 0xE908, 0xC502, 0xBD00, 0x0B58, 0xB407, 0xB404, 0x2195, 0x25BD,
+                0x9BE0, 0x1C1C, 0x484F, 0x9CE2, 0x72E2, 0x49AE, 0xF1FE, 0x0B00, 0xF116,
+                0xC71C, 0xC419, 0x9CE0, 0x1C13, 0x484F, 0x9CE2, 0x74E2, 0x49CE, 0xF1FE,
+                0xC412, 0x9CE0, 0x1C13, 0x484F, 0x9CE2, 0x74E2, 0x49CE, 0xF1FE, 0xC70C,
+                0x74F8, 0x48C3, 0x8CF8, 0xB004, 0xB007, 0xC502, 0xBD00, 0x0F24, 0x0481,
+                0x0C81, 0xDE24, 0xE000, 0xC602, 0xBE00, 0x0CA4, 0x48C1, 0x48C2, 0x9C46,
+                0xC402, 0xBC00, 0x0578, 0xC602, 0xBE00, 0x0000
+        };
+
+        rtl8168_hw_disable_mac_mcu_bps(dev);
+
+        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168h_1); i++) {
+                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168h_1[i]);
+        }
+
+        rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
+
+        rtl8168_mac_ocp_write(tp, 0xFC28, 0x00E2);
+        rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0210);
+        rtl8168_mac_ocp_write(tp, 0xFC2C, 0x1A04);
+        rtl8168_mac_ocp_write(tp, 0xFC2E, 0x0B26);
+        rtl8168_mac_ocp_write(tp, 0xFC30, 0x0F02);
+        rtl8168_mac_ocp_write(tp, 0xFC32, 0x0CA0);
+        //rtl8168_mac_ocp_write(tp, 0xFC34, 0x056C);
+
+        rtl8168_mac_ocp_write(tp, 0xFC38, 0x003F);
+}
+
+static void
+rtl8168_set_mac_mcu_8168h_3(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u16 i;
+        static const u16 mcu_patch_code_8168h_3[] = {
+                0xE008, 0xE00A, 0xE00C, 0xE00E, 0xE010, 0xE03E, 0xE040, 0xE069, 0xC602,
+                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC002, 0xB800, 0x0000, 0xC602,
+                0xBE00, 0x0000, 0xC72B, 0x76E2, 0x49EE, 0xF1FD, 0x1E00, 0x9EE0, 0x1E1C,
+                0x9EE2, 0x76E2, 0x49EE, 0xF1FE, 0xC621, 0x9EE0, 0x1E1D, 0x486F, 0x9EE2,
+                0x76E2, 0x49EE, 0xF1FE, 0xC71A, 0x76E0, 0x48E8, 0x48E9, 0x48EA, 0x48EB,
+                0x48EC, 0x9EE0, 0xC70D, 0xC60D, 0x9EF4, 0xC60C, 0x9EF6, 0xC70E, 0x76E0,
+                0x4863, 0x9EE0, 0xB007, 0xC602, 0xBE00, 0x0ACC, 0xE000, 0x03BF, 0x07FF,
+                0xDE24, 0x3200, 0xE096, 0xD438, 0xC602, 0xBE00, 0x0000, 0x8EE6, 0xC726,
+                0x76E2, 0x49EE, 0xF1FD, 0x1E00, 0x8EE0, 0x1E1C, 0x8EE2, 0x76E2, 0x49EE,
+                0xF1FE, 0xC61C, 0x8EE0, 0x1E1D, 0x486F, 0x8EE2, 0x76E2, 0x49EE, 0xF1FE,
+                0xC715, 0x76E0, 0x48E8, 0x48E9, 0x48EA, 0x48EB, 0x48EC, 0x9EE0, 0xC708,
+                0xC608, 0x9EF4, 0xC607, 0x9EF6, 0xC602, 0xBE00, 0x0ABE, 0xE000, 0x03BF,
+                0x07FF, 0xDE24, 0x3200, 0xE096, 0xC602, 0xBE00, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
+                0x0000, 0x0000, 0x0000, 0x0000, 0x6838, 0x0A17, 0x0613, 0x0D26
+        };
+
+        rtl8168_hw_disable_mac_mcu_bps(dev);
+
+        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168h_3); i++) {
+                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168h_3[i]);
+        }
+
+        rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
+
+        rtl8168_mac_ocp_write(tp, 0xFC30, 0x0ACA);
+
+        rtl8168_clear_mcu_ocp_bit(tp, 0xD438, BIT_3);
+
+        rtl8168_mac_ocp_write(tp, 0xFC38, 0x0010);
+}
+
+static void
+rtl8168_set_mac_mcu_8168h_4(struct net_device *dev)
+{
+        rtl8168_hw_disable_mac_mcu_bps(dev);
+}
+
+static void
+rtl8168_set_mac_mcu_8168fp_1(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u16 i;
+        u16 breakPointEnabled = 0;
+
+        rtl8168_hw_disable_mac_mcu_bps(dev);
+
+        if(tp->HwPkgDet == 0x00 || tp->HwPkgDet == 0x0F) {
+                static const u16 mcu_patch_code_8168fp_1_1[] = {
+                        0xE00A, 0xE0C1, 0xE104, 0xE108, 0xE10D, 0xE112, 0xE11C, 0xE121, 0xE000,
+                        0xE0C8, 0xB400, 0xC1FE, 0x49E2, 0xF04C, 0x49EA, 0xF04A, 0x74E6, 0xC246,
+                        0x7542, 0x73EC, 0x1800, 0x49C0, 0xF10D, 0x49C1, 0xF10B, 0x49C2, 0xF109,
+                        0x49B0, 0xF107, 0x49B1, 0xF105, 0x7220, 0x49A2, 0xF102, 0xE002, 0x4800,
+                        0x49D0, 0xF10A, 0x49D1, 0xF108, 0x49D2, 0xF106, 0x49D3, 0xF104, 0x49DF,
+                        0xF102, 0xE00C, 0x4801, 0x72E4, 0x49AD, 0xF108, 0xC225, 0x6741, 0x48F0,
+                        0x8F41, 0x4870, 0x8F41, 0xC7CF, 0x49B5, 0xF01F, 0x49B2, 0xF00B, 0x4980,
+                        0xF003, 0x484E, 0x94E7, 0x4981, 0xF004, 0x485E, 0xC212, 0x9543, 0xE071,
+                        0x49B6, 0xF003, 0x49B3, 0xF10F, 0x4980, 0xF003, 0x484E, 0x94E7, 0x4981,
+                        0xF004, 0x485E, 0xC204, 0x9543, 0xE005, 0xE000, 0xE0FC, 0xE0FA, 0xE065,
+                        0x49B7, 0xF007, 0x4980, 0xF005, 0x1A38, 0x46D4, 0x1200, 0xF109, 0x4981,
+                        0xF055, 0x49C3, 0xF105, 0x1A30, 0x46D5, 0x1200, 0xF04F, 0x7220, 0x49A2,
+                        0xF130, 0x49C1, 0xF12E, 0x49B0, 0xF12C, 0xC2E6, 0x7240, 0x49A8, 0xF003,
+                        0x49D0, 0xF126, 0x49A9, 0xF003, 0x49D1, 0xF122, 0x49AA, 0xF003, 0x49D2,
+                        0xF11E, 0x49AB, 0xF003, 0x49DF, 0xF11A, 0x49AC, 0xF003, 0x49D3, 0xF116,
+                        0x4980, 0xF003, 0x49C7, 0xF105, 0x4981, 0xF02C, 0x49D7, 0xF02A, 0x49C0,
+                        0xF00C, 0xC721, 0x62F4, 0x49A0, 0xF008, 0x49A4, 0xF106, 0x4824, 0x8AF4,
+                        0xC71A, 0x1A40, 0x9AE0, 0x49B6, 0xF017, 0x200E, 0xC7B8, 0x72E0, 0x4710,
+                        0x92E1, 0xC70E, 0x77E0, 0x49F0, 0xF112, 0xC70B, 0x77E0, 0x27FE, 0x1AFA,
+                        0x4317, 0xC705, 0x9AE2, 0x1A11, 0x8AE0, 0xE008, 0xE41C, 0xC0AE, 0xD23A,
+                        0xC7A2, 0x74E6, 0x484F, 0x94E7, 0xC79E, 0x8CE6, 0x8BEC, 0xC29C, 0x8D42,
+                        0x7220, 0xB000, 0xC502, 0xBD00, 0x0932, 0xB400, 0xC240, 0xC340, 0x7060,
+                        0x498F, 0xF014, 0x488F, 0x9061, 0x744C, 0x49C3, 0xF004, 0x7562, 0x485E,
+                        0x9563, 0x7446, 0x49C3, 0xF106, 0x7562, 0x1C30, 0x46E5, 0x1200, 0xF004,
+                        0x7446, 0x484F, 0x9447, 0xC32A, 0x7466, 0x49C0, 0xF00F, 0x48C0, 0x9C66,
+                        0x7446, 0x4840, 0x4841, 0x4842, 0x9C46, 0x744C, 0x4840, 0x9C4C, 0x744A,
+                        0x484A, 0x9C4A, 0xE013, 0x498E, 0xF011, 0x488E, 0x9061, 0x744C, 0x49C3,
+                        0xF004, 0x7446, 0x484E, 0x9447, 0x7446, 0x1D38, 0x46EC, 0x1500, 0xF004,
+                        0x7446, 0x484F, 0x9447, 0xB000, 0xC502, 0xBD00, 0x074C, 0xE000, 0xE0FC,
+                        0xE0C0, 0x4830, 0x4837, 0xC502, 0xBD00, 0x0978, 0x63E2, 0x4830, 0x4837,
+                        0xC502, 0xBD00, 0x09FE, 0x73E2, 0x4830, 0x8BE2, 0xC302, 0xBB00, 0x0A12,
+                        0x73E2, 0x48B0, 0x48B3, 0x48B4, 0x48B5, 0x48B6, 0x48B7, 0x8BE2, 0xC302,
+                        0xBB00, 0x0A5A, 0x73E2, 0x4830, 0x8BE2, 0xC302, 0xBB00, 0x0A6C, 0x73E2,
+                        0x4830, 0x4837, 0xC502, 0xBD00, 0x0A86
+                };
+
+                for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_1_1); i++) {
+                        rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168fp_1_1[i]);
+                }
+
+                rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
+
+                rtl8168_mac_ocp_write(tp, 0xFC28, 0x0890);
+                rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0712);
+                rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0974);
+                rtl8168_mac_ocp_write(tp, 0xFC2E, 0x09FC);
+                rtl8168_mac_ocp_write(tp, 0xFC30, 0x0A0E);
+                rtl8168_mac_ocp_write(tp, 0xFC32, 0x0A56);
+                rtl8168_mac_ocp_write(tp, 0xFC34, 0x0A68);
+                rtl8168_mac_ocp_write(tp, 0xFC36, 0x0A84);
+
+        } else if (tp->HwPkgDet == 0x05 || tp->HwPkgDet == 0x06) {
+                static const u16 mcu_patch_code_8168fp_1_2[] = {
+                        0xE008, 0xE00A, 0xE031, 0xE033, 0xE035, 0xE144, 0xE166, 0xE168, 0xC502,
+                        0xBD00, 0x0000, 0xC725, 0x75E0, 0x48D0, 0x9DE0, 0xC722, 0x75E0, 0x1C78,
+                        0x416C, 0x1530, 0xF111, 0xC71D, 0x75F6, 0x49D1, 0xF00D, 0x75E0, 0x1C1F,
+                        0x416C, 0x1502, 0xF108, 0x75FA, 0x49D3, 0xF005, 0x75EC, 0x9DE4, 0x4853,
+                        0x9DFA, 0xC70B, 0x75E0, 0x4852, 0x4850, 0x9DE0, 0xC602, 0xBE00, 0x04B8,
+                        0xE420, 0xE000, 0xE0FC, 0xE43C, 0xDC00, 0xEB00, 0xC202, 0xBA00, 0x0000,
+                        0xC002, 0xB800, 0x0000, 0xB401, 0xB402, 0xB403, 0xB404, 0xB405, 0xB406,
+                        0xC44D, 0xC54D, 0x1867, 0xE8A2, 0x2318, 0x276E, 0x1601, 0xF106, 0x1A07,
+                        0xE861, 0xE86B, 0xE873, 0xE037, 0x231E, 0x276E, 0x1602, 0xF10B, 0x1A07,
+                        0xE858, 0xE862, 0xC247, 0xC344, 0xE8E3, 0xC73B, 0x66E0, 0xE8B5, 0xE029,
+                        0x231A, 0x276C, 0xC733, 0x9EE0, 0x1866, 0xE885, 0x251C, 0x120F, 0xF011,
+                        0x1209, 0xF011, 0x2014, 0x240E, 0x1000, 0xF007, 0x120C, 0xF00D, 0x1203,
+                        0xF00D, 0x1200, 0xF00D, 0x120C, 0xF00D, 0x1203, 0xF00D, 0x1A03, 0xE00C,
+                        0x1A07, 0xE00A, 0x1A00, 0xE008, 0x1A01, 0xE006, 0x1A02, 0xE004, 0x1A04,
+                        0xE002, 0x1A05, 0xE829, 0xE833, 0xB006, 0xB005, 0xB004, 0xB003, 0xB002,
+                        0xB001, 0x60C4, 0xC702, 0xBF00, 0x2786, 0xDD00, 0xD030, 0xE0C4, 0xE0F8,
+                        0xDC42, 0xD3F0, 0x0000, 0x0004, 0x0007, 0x0014, 0x0090, 0x1000, 0x0F00,
+                        0x1004, 0x1008, 0x3000, 0x3004, 0x3008, 0x4000, 0x7777, 0x8000, 0x8001,
+                        0x8008, 0x8003, 0x8004, 0xC000, 0xC004, 0xF004, 0xFFFF, 0xB406, 0xB407,
+                        0xC6E5, 0x77C0, 0x27F3, 0x23F3, 0x47FA, 0x9FC0, 0xB007, 0xB006, 0xFF80,
+                        0xB405, 0xB407, 0xC7D8, 0x75E0, 0x48D0, 0x9DE0, 0xB007, 0xB005, 0xFF80,
+                        0xB401, 0xC0EA, 0xC2DC, 0xC3D8, 0xE865, 0xC0D3, 0xC1E0, 0xC2E3, 0xE861,
+                        0xE817, 0xC0CD, 0xC2CF, 0xE85D, 0xC0C9, 0xC1D6, 0xC2DB, 0xE859, 0xE80F,
+                        0xC1C7, 0xC2CE, 0xE855, 0xC0C0, 0xC1D1, 0xC2D3, 0xE851, 0xE807, 0xC0BE,
+                        0xC2C2, 0xE84D, 0xE803, 0xB001, 0xFF80, 0xB402, 0xC2C6, 0xE859, 0x499F,
+                        0xF1FE, 0xB002, 0xFF80, 0xB402, 0xB403, 0xB407, 0xE821, 0x8882, 0x1980,
+                        0x8983, 0xE81D, 0x7180, 0x218B, 0x25BB, 0x1310, 0xF014, 0x1310, 0xFB03,
+                        0x1F20, 0x38FB, 0x3288, 0x434B, 0x2491, 0x430B, 0x1F0F, 0x38FB, 0x4313,
+                        0x2121, 0x4353, 0x2521, 0x418A, 0x6282, 0x2527, 0x212F, 0x418A, 0xB007,
+                        0xB003, 0xB002, 0xFF80, 0x6183, 0x2496, 0x1100, 0xF1FD, 0xFF80, 0x4800,
+                        0x4801, 0xC213, 0xC313, 0xE815, 0x4860, 0x8EE0, 0xC210, 0xC310, 0xE822,
+                        0x481E, 0xC20C, 0xC30C, 0xE80C, 0xC206, 0x7358, 0x483A, 0x9B58, 0xFF80,
+                        0xE8E0, 0xE000, 0x1008, 0x0F00, 0x800C, 0x0F00, 0xB407, 0xB406, 0xB403,
+                        0xC7F7, 0x98E0, 0x99E2, 0x9AE4, 0x21B2, 0x4831, 0x483F, 0x9BE6, 0x66E7,
+                        0x49E6, 0xF1FE, 0xB003, 0xB006, 0xB007, 0xFF80, 0xB407, 0xB406, 0xB403,
+                        0xC7E5, 0x9AE4, 0x21B2, 0x4831, 0x9BE6, 0x66E7, 0x49E6, 0xF1FE, 0x70E0,
+                        0x71E2, 0xB003, 0xB006, 0xB007, 0xFF80, 0x4882, 0xB406, 0xB405, 0xC71E,
+                        0x76E0, 0x1D78, 0x4175, 0x1630, 0xF10C, 0xC715, 0x76E0, 0x4861, 0x9EE0,
+                        0xC713, 0x1EFF, 0x9EE2, 0x75E0, 0x4850, 0x9DE0, 0xE005, 0xC70B, 0x76E0,
+                        0x4865, 0x9EE0, 0xB005, 0xB006, 0xC708, 0xC102, 0xB900, 0x279E, 0xEB16,
+                        0xEB00, 0xE43C, 0xDC00, 0xD3EC, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
+                        0x0000
+                };
+
+                for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_1_2); i++) {
+                        rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168fp_1_2[i]);
+                }
+
+                rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
+
+                rtl8168_mac_ocp_write(tp, 0xFC28, 0x0000);
+                rtl8168_mac_ocp_write(tp, 0xFC2A, 0x04b4);
+                rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0000);
+                rtl8168_mac_ocp_write(tp, 0xFC2E, 0x0000);
+                rtl8168_mac_ocp_write(tp, 0xFC30, 0x0000);
+                rtl8168_mac_ocp_write(tp, 0xFC32, 0x279C);
+                rtl8168_mac_ocp_write(tp, 0xFC34, 0x0000);
+                rtl8168_mac_ocp_write(tp, 0xFC36, 0x0000);
+        }
+
+        if (tp->HwPkgDet == 0x00)
+                breakPointEnabled = 0x00FC;
+        else if (tp->HwPkgDet == 0x0F)
+                breakPointEnabled = 0x00FF;
+        else if (tp->HwPkgDet == 0x05 || tp->HwPkgDet == 0x06)
+                breakPointEnabled = 0x0022;
+
+        rtl8168_mac_ocp_write(tp, 0xFC38, breakPointEnabled);
+}
+
+static void
+rtl8168_set_mac_mcu_8168fp_8116as_2(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u16 i;
+        static const u16 mcu_patch_code_8168fp_8116as_2[] = {
+                0xE008, 0xE00A, 0xE00F, 0xE014, 0xE016, 0xE018, 0xE01A, 0xE01C, 0xC602,
+                0xBE00, 0x2AB2, 0x1BC0, 0x46EB, 0x1BFE, 0xC102, 0xB900, 0x0B1A, 0x1BC0,
+                0x46EB, 0x1B7E, 0xC102, 0xB900, 0x0BEA, 0xC602, 0xBE00, 0x0000, 0xC602,
+                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
+                0xBE00, 0x0000
+        };
+
+        rtl8168_hw_disable_mac_mcu_bps(dev);
+
+        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_8116as_2); i++) {
+                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168fp_8116as_2[i]);
+        }
+
+        rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
+
+        rtl8168_mac_ocp_write(tp, 0xFC28, 0x2AAC);
+        rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0B14);
+        rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0BE4);
+
+        rtl8168_mac_ocp_write(tp, 0xFC38, 0x0007);
+}
+
+static void
+_rtl8168_set_mac_mcu_8168fp_2(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u16 i;
+        static const u16 mcu_patch_code_8168fp_2[] = {
+                0xE008, 0xE00A, 0xE00F, 0xE014, 0xE05F, 0xE064, 0xE066, 0xE068, 0xC602,
+                0xBE00, 0x0000, 0x1BC0, 0x46EB, 0x1BFE, 0xC102, 0xB900, 0x0B1A, 0x1BC0,
+                0x46EB, 0x1B7E, 0xC102, 0xB900, 0x0BEA, 0xB400, 0xB401, 0xB402, 0xB403,
+                0xB404, 0xB405, 0xC03A, 0x7206, 0x49AE, 0xF1FE, 0xC137, 0x9904, 0xC136,
+                0x9906, 0x7206, 0x49AE, 0xF1FE, 0x7200, 0x49A0, 0xF10B, 0xC52F, 0xC12E,
+                0xC232, 0xC332, 0xE812, 0xC331, 0xE810, 0xC330, 0xE80E, 0xE018, 0xC126,
+                0xC229, 0xC525, 0xC328, 0xE808, 0xC523, 0xC326, 0xE805, 0xC521, 0xC324,
+                0xE802, 0xE00C, 0x740E, 0x49CE, 0xF1FE, 0x9908, 0x9D0A, 0x9A0C, 0x9B0E,
+                0x740E, 0x49CE, 0xF1FE, 0xFF80, 0xB005, 0xB004, 0xB003, 0xB002, 0xB001,
+                0xB000, 0xC604, 0xC002, 0xB800, 0x2A5E, 0xE000, 0xE8E0, 0xF128, 0x3DC2,
+                0xFFFF, 0x10EC, 0x816A, 0x816D, 0x816C, 0xF000, 0x8002, 0x8004, 0x8007,
+                0x48C1, 0x48C2, 0x9C46, 0xC402, 0xBC00, 0x07BC, 0xC602, 0xBE00, 0x0000,
+                0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
+        };
+
+        rtl8168_hw_disable_mac_mcu_bps(dev);
+
+        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_2); i++) {
+                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168fp_2[i]);
+        }
+
+        rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
+
+        rtl8168_mac_ocp_write(tp, 0xFC28, 0x2AAC);
+        rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0B14);
+        rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0BE4);
+        rtl8168_mac_ocp_write(tp, 0xFC2E, 0x2A5C);
+        //rtl8168_mac_ocp_write(tp, 0xFC30, 0x07B0);
+
+        if (true == rtl8168_check_dash_other_fun_present(tp))
+                rtl8168_mac_ocp_write(tp, 0xFC38, 0x0006);
+        else
+                rtl8168_mac_ocp_write(tp, 0xFC38, 0x000E);
+}
+
+static void
+rtl8168_set_mac_mcu_8168fp_2(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        if (tp->HwSuppSerDesPhyVer == 1)
+                rtl8168_set_mac_mcu_8168fp_8116as_2(dev);
+        else
+                _rtl8168_set_mac_mcu_8168fp_2(dev);
+}
+
+static void
+rtl8168_set_mac_mcu_8168fp_3(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u16 i;
+        static const u16 mcu_patch_code_8168fp_3[] = {
+                0xE008, 0xE053, 0xE058, 0xE05A, 0xE05C, 0xE05E, 0xE060, 0xE062, 0xB400,
+                0xB401, 0xB402, 0xB403, 0xB404, 0xB405, 0xC03A, 0x7206, 0x49AE, 0xF1FE,
+                0xC137, 0x9904, 0xC136, 0x9906, 0x7206, 0x49AE, 0xF1FE, 0x7200, 0x49A0,
+                0xF10B, 0xC52F, 0xC12E, 0xC232, 0xC332, 0xE812, 0xC331, 0xE810, 0xC330,
+                0xE80E, 0xE018, 0xC126, 0xC229, 0xC525, 0xC328, 0xE808, 0xC523, 0xC326,
+                0xE805, 0xC521, 0xC324, 0xE802, 0xE00C, 0x740E, 0x49CE, 0xF1FE, 0x9908,
+                0x9D0A, 0x9A0C, 0x9B0E, 0x740E, 0x49CE, 0xF1FE, 0xFF80, 0xB005, 0xB004,
+                0xB003, 0xB002, 0xB001, 0xB000, 0xC604, 0xC002, 0xB800, 0x2B16, 0xE000,
+                0xE8E0, 0xF128, 0x3DC2, 0xFFFF, 0x10EC, 0x816A, 0x816D, 0x816C, 0xF000,
+                0x8002, 0x8004, 0x8007, 0x48C1, 0x48C2, 0x9C46, 0xC402, 0xBC00, 0x07BC,
+                0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000,
+                0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
+        };
+
+        rtl8168_hw_disable_mac_mcu_bps(dev);
+
+        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_3); i++) {
+                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168fp_3[i]);
+        }
+
+        rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
+
+        rtl8168_mac_ocp_write(tp, 0xFC28, 0x2B14);
+        //rtl8168_mac_ocp_write(tp, 0xFC2A, 0x07B0);
+
+        if (true == rtl8168_check_dash_other_fun_present(tp))
+                rtl8168_mac_ocp_write(tp, 0xFC38, 0x0000);
+        else
+                rtl8168_mac_ocp_write(tp, 0xFC38, 0x0001);
+}
+
+static void
+rtl8168_hw_mac_mcu_config(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        if (tp->NotWrMcuPatchCode == TRUE)
+                return;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_21:
+                rtl8168_set_mac_mcu_8168g_1(dev);
+                break;
+        case CFG_METHOD_24:
+                rtl8168_set_mac_mcu_8168gu_1(dev);
+                break;
+        case CFG_METHOD_25:
+                rtl8168_set_mac_mcu_8168gu_2(dev);
+                break;
+        case CFG_METHOD_26:
+                rtl8168_set_mac_mcu_8411b_1(dev);
+                break;
+        case CFG_METHOD_27:
+                rtl8168_set_mac_mcu_8168ep_1(dev);
+                break;
+        case CFG_METHOD_28:
+                rtl8168_set_mac_mcu_8168ep_2(dev);
+                break;
+        case CFG_METHOD_29:
+                rtl8168_set_mac_mcu_8168h_1(dev);
+                break;
+        case CFG_METHOD_30:
+        case CFG_METHOD_37:
+                rtl8168_set_mac_mcu_8168h_2(dev);
+                break;
+        case CFG_METHOD_31:
+                rtl8168_set_mac_mcu_8168fp_1(dev);
+                break;
+        case CFG_METHOD_32:
+                rtl8168_set_mac_mcu_8168fp_2(dev);
+                break;
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+                rtl8168_set_mac_mcu_8168fp_3(dev);
+                break;
+        case CFG_METHOD_35:
+                rtl8168_set_mac_mcu_8168h_3(dev);
+                break;
+        case CFG_METHOD_36:
+                rtl8168_set_mac_mcu_8168h_4(dev);
+                break;
+        }
+}
+#endif
+
+#ifdef ENABLE_USE_FIRMWARE_FILE
+static void rtl8168_release_firmware(struct rtl8168_private *tp)
+{
+        if (tp->rtl_fw) {
+                rtl8168_fw_release_firmware(tp->rtl_fw);
+                kfree(tp->rtl_fw);
+                tp->rtl_fw = NULL;
+        }
+}
+
+void rtl8168_apply_firmware(struct rtl8168_private *tp)
+{
+        /* TODO: release firmware if rtl_fw_write_firmware signals failure. */
+        if (tp->rtl_fw) {
+                rtl8168_fw_write_firmware(tp, tp->rtl_fw);
+                /* At least one firmware doesn't reset tp->ocp_base. */
+                tp->ocp_base = OCP_STD_PHY_BASE;
+
+                /* PHY soft reset may still be in progress */
+                //phy_read_poll_timeout(tp->phydev, MII_BMCR, val,
+                //		      !(val & BMCR_RESET),
+                //		      50000, 600000, true);
+                rtl8168_wait_phy_reset_complete(tp);
+
+                tp->hw_ram_code_ver = rtl8168_get_hw_phy_mcu_code_ver(tp);
+                tp->sw_ram_code_ver = tp->hw_ram_code_ver;
+                tp->HwHasWrRamCodeToMicroP = TRUE;
+        }
+}
+#endif
+
+static void
+rtl8168_hw_init(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u32 csi_tmp;
+
+        if (tp->HwSuppAspmClkIntrLock) {
+                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7);
+                rtl8168_enable_cfg9346_write(tp);
+                rtl8168_hw_aspm_clkreq_enable(tp, false);
+                rtl8168_disable_cfg9346_write(tp);
+        }
+
+        //Disable UPS
+        if (HW_SUPPORT_UPS_MODE(tp))
+                rtl8168_mac_ocp_write(tp, 0xD400, rtl8168_mac_ocp_read( tp, 0xD400) & ~(BIT_0));
+
+        //Disable DMA Aggregation
+        switch (tp->mcfg) {
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                rtl8168_mac_ocp_write(tp, 0xE63E, rtl8168_mac_ocp_read( tp, 0xE63E) & ~(BIT_3 | BIT_2 | BIT_1));
+                rtl8168_mac_ocp_write(tp, 0xE63E, rtl8168_mac_ocp_read( tp, 0xE63E) | (BIT_0));
+                rtl8168_mac_ocp_write(tp, 0xE63E, rtl8168_mac_ocp_read( tp, 0xE63E) & ~(BIT_0));
+                rtl8168_mac_ocp_write(tp, 0xC094, 0x0);
+                rtl8168_mac_ocp_write(tp, 0xC09E, 0x0);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_9:
+        case CFG_METHOD_10:
+                RTL_W8(tp, DBG_reg, RTL_R8(tp, DBG_reg) | BIT_1 | BIT_7);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_14:
+        case CFG_METHOD_15:
+        case CFG_METHOD_16:
+        case CFG_METHOD_17:
+        case CFG_METHOD_18:
+        case CFG_METHOD_19:
+                RTL_W8(tp, 0xF2, (RTL_R8(tp, 0xF2) & ~(BIT_2 | BIT_1 | BIT_0)));
+                break;
+        }
+
+        if (tp->mcfg == CFG_METHOD_10 || tp->mcfg == CFG_METHOD_14 || tp->mcfg == CFG_METHOD_15)
+                RTL_W8(tp, 0xF3, RTL_R8(tp, 0xF3) | BIT_2);
+
+#ifndef ENABLE_USE_FIRMWARE_FILE
+        if (!tp->rtl_fw)
+                rtl8168_hw_mac_mcu_config(dev);
+#endif
+
+        /*disable ocp phy power saving*/
+        if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
+            tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
+            tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+            tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
+            tp->mcfg == CFG_METHOD_37)
+                if (!tp->dash_printer_enabled)
+                        rtl8168_disable_ocp_phy_power_saving(dev);
+
+        //Set PCIE uncorrectable error status mask pcie 0x108
+        csi_tmp = rtl8168_csi_read(tp, 0x108);
+        csi_tmp |= BIT_20;
+        rtl8168_csi_write(tp, 0x108, csi_tmp);
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+                csi_tmp = rtl8168_eri_read(tp, 0x1AB, 1, ERIAR_ExGMAC);
+                csi_tmp |= ( BIT_2 | BIT_3 | BIT_4 | BIT_5 | BIT_6 | BIT_7 );
+                rtl8168_eri_write(tp, 0x1AB, 1, csi_tmp, ERIAR_ExGMAC);
+                break;
+        }
+
+        rtl8168_set_pci_pme(tp, 0);
+
+        if (s0_magic_packet == 1)
+                rtl8168_enable_magic_packet(dev);
+        else
+                rtl8168_disable_magic_packet(dev);
+
+#ifdef ENABLE_USE_FIRMWARE_FILE
+        if (tp->rtl_fw &&
+            !(HW_DASH_SUPPORT_TYPE_3(tp) &&
+              tp->HwPkgDet == 0x06))
+                rtl8168_apply_firmware(tp);
+#endif
+}
+
+static void
+rtl8168_hw_ephy_config(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u16 ephy_data;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_4:
+                /*Set EPHY registers    begin*/
+                /*Set EPHY register offset 0x02 bit 11 to 0 and bit 12 to 1*/
+                ephy_data = rtl8168_ephy_read(tp, 0x02);
+                ephy_data &= ~BIT_11;
+                ephy_data |= BIT_12;
+                rtl8168_ephy_write(tp, 0x02, ephy_data);
+
+                /*Set EPHY register offset 0x03 bit 1 to 1*/
+                ephy_data = rtl8168_ephy_read(tp, 0x03);
+                ephy_data |= (1 << 1);
+                rtl8168_ephy_write(tp, 0x03, ephy_data);
+
+                /*Set EPHY register offset 0x06 bit 7 to 0*/
+                ephy_data = rtl8168_ephy_read(tp, 0x06);
+                ephy_data &= ~(1 << 7);
+                rtl8168_ephy_write(tp, 0x06, ephy_data);
+                /*Set EPHY registers    end*/
+
+                break;
+        case CFG_METHOD_5:
+                /* set EPHY registers */
+                SetPCIePhyBit(tp, 0x01, BIT_0);
+
+                ClearAndSetPCIePhyBit(tp,
+                                      0x03,
+                                      BIT_10,
+                                      BIT_5
+                                     );
+
+                break;
+        case CFG_METHOD_9:
+                /* set EPHY registers */
+                rtl8168_ephy_write(tp, 0x01, 0x7C7F);
+                rtl8168_ephy_write(tp, 0x02, 0x011F);
+                if (tp->eeprom_type != EEPROM_TYPE_NONE) {
+                        ClearAndSetPCIePhyBit(tp,
+                                              0x03,
+                                              0xFFB0,
+                                              0x05B0
+                                             );
+                } else {
+                        ClearAndSetPCIePhyBit(tp,
+                                              0x03,
+                                              0xFFF0,
+                                              0x05F0
+                                             );
+                }
+                rtl8168_ephy_write(tp, 0x06, 0xB271);
+                rtl8168_ephy_write(tp, 0x07, 0xCE00);
+
+                break;
+        case CFG_METHOD_10:
+                /* set EPHY registers */
+                rtl8168_ephy_write(tp, 0x01, 0x6C7F);
+                rtl8168_ephy_write(tp, 0x02, 0x011F);
+                ClearAndSetPCIePhyBit(tp,
+                                      0x03,
+                                      0xFFF0,
+                                      0x01B0
+                                     );
+                rtl8168_ephy_write(tp, 0x1A, 0x0546);
+                rtl8168_ephy_write(tp, 0x1C, 0x80C4);
+                rtl8168_ephy_write(tp, 0x1D, 0x78E5);
+                rtl8168_ephy_write(tp, 0x0A, 0x8100);
+
+                break;
+        case CFG_METHOD_12:
+        case CFG_METHOD_13:
+                ephy_data = rtl8168_ephy_read(tp, 0x0B);
+                rtl8168_ephy_write(tp, 0x0B, ephy_data|0x48);
+                ephy_data = rtl8168_ephy_read(tp, 0x19);
+                ephy_data &= ~0x20;
+                rtl8168_ephy_write(tp, 0x19, ephy_data|0x50);
+                ephy_data = rtl8168_ephy_read(tp, 0x0C);
+                ephy_data &= ~0x100;
+                rtl8168_ephy_write(tp, 0x0C, ephy_data|0x20);
+                ephy_data = rtl8168_ephy_read(tp, 0x10);
+                ephy_data &= ~0x04;
+                rtl8168_ephy_write(tp, 0x10, ephy_data);
+
+                break;
+        case CFG_METHOD_14:
+        case CFG_METHOD_15:
+                /* set EPHY registers */
+                ephy_data = rtl8168_ephy_read(tp, 0x00) & ~0x0200;
+                ephy_data |= 0x0100;
+                rtl8168_ephy_write(tp, 0x00, ephy_data);
+
+                ephy_data = rtl8168_ephy_read(tp, 0x00);
+                ephy_data |= 0x0004;
+                rtl8168_ephy_write(tp, 0x00, ephy_data);
+
+                ephy_data = rtl8168_ephy_read(tp, 0x06) & ~0x0002;
+                ephy_data |= 0x0001;
+                rtl8168_ephy_write(tp, 0x06, ephy_data);
+
+                ephy_data = rtl8168_ephy_read(tp, 0x06);
+                ephy_data |= 0x0030;
+                rtl8168_ephy_write(tp, 0x06, ephy_data);
+
+                ephy_data = rtl8168_ephy_read(tp, 0x07);
+                ephy_data |= 0x2000;
+                rtl8168_ephy_write(tp, 0x07, ephy_data);
+
+                ephy_data = rtl8168_ephy_read(tp, 0x00);
+                ephy_data |= 0x0020;
+                rtl8168_ephy_write(tp, 0x00, ephy_data);
+
+                ephy_data = rtl8168_ephy_read(tp, 0x03) & ~0x5800;
+                ephy_data |= 0x2000;
+                rtl8168_ephy_write(tp, 0x03, ephy_data);
+
+                ephy_data = rtl8168_ephy_read(tp, 0x03);
+                ephy_data |= 0x0001;
+                rtl8168_ephy_write(tp, 0x03, ephy_data);
+
+                ephy_data = rtl8168_ephy_read(tp, 0x01) & ~0x0800;
+                ephy_data |= 0x1000;
+                rtl8168_ephy_write(tp, 0x01, ephy_data);
+
+                ephy_data = rtl8168_ephy_read(tp, 0x07);
+                ephy_data |= 0x4000;
+                rtl8168_ephy_write(tp, 0x07, ephy_data);
+
+                ephy_data = rtl8168_ephy_read(tp, 0x1E);
+                ephy_data |= 0x2000;
+                rtl8168_ephy_write(tp, 0x1E, ephy_data);
+
+                rtl8168_ephy_write(tp, 0x19, 0xFE6C);
+
+                ephy_data = rtl8168_ephy_read(tp, 0x0A);
+                ephy_data |= 0x0040;
+                rtl8168_ephy_write(tp, 0x0A, ephy_data);
+
+                break;
+        case CFG_METHOD_16:
+        case CFG_METHOD_17:
+                if (tp->mcfg == CFG_METHOD_16) {
+                        rtl8168_ephy_write(tp, 0x06, 0xF020);
+                        rtl8168_ephy_write(tp, 0x07, 0x01FF);
+                        rtl8168_ephy_write(tp, 0x00, 0x5027);
+                        rtl8168_ephy_write(tp, 0x01, 0x0003);
+                        rtl8168_ephy_write(tp, 0x02, 0x2D16);
+                        rtl8168_ephy_write(tp, 0x03, 0x6D49);
+                        rtl8168_ephy_write(tp, 0x08, 0x0006);
+                        rtl8168_ephy_write(tp, 0x0A, 0x00C8);
+                }
+
+                ephy_data = rtl8168_ephy_read(tp, 0x09);
+                ephy_data |= BIT_7;
+                rtl8168_ephy_write(tp, 0x09, ephy_data);
+
+                ephy_data = rtl8168_ephy_read(tp, 0x19);
+                ephy_data |= (BIT_2 | BIT_5 | BIT_9);
+                rtl8168_ephy_write(tp, 0x19, ephy_data);
+
+                ephy_data = rtl8168_ephy_read(tp, 0x00);
+                ephy_data |= BIT_3;
+                rtl8168_ephy_write(tp, 0x00, ephy_data);
+                ephy_data = rtl8168_ephy_read(tp, 0x0C);
+                ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4);
+                ephy_data |= BIT_9;
+                rtl8168_ephy_write(tp, 0x0C, ephy_data);
+
+                break;
+        case CFG_METHOD_18:
+        case CFG_METHOD_19:
+                if (tp->mcfg == CFG_METHOD_18) {
+                        ephy_data = rtl8168_ephy_read(tp, 0x06);
+                        ephy_data |= BIT_5;
+                        ephy_data &= ~(BIT_7 | BIT_6);
+                        rtl8168_ephy_write(tp, 0x06, ephy_data);
+
+                        ephy_data = rtl8168_ephy_read(tp, 0x08);
+                        ephy_data |= BIT_1;
+                        ephy_data &= ~BIT_0;
+                        rtl8168_ephy_write(tp, 0x08, ephy_data);
+                }
+
+                ephy_data = rtl8168_ephy_read(tp, 0x09);
+                ephy_data |= BIT_7;
+                rtl8168_ephy_write(tp, 0x09, ephy_data);
+
+                ephy_data = rtl8168_ephy_read(tp, 0x19);
+                ephy_data |= (BIT_2 | BIT_5 | BIT_9);
+                rtl8168_ephy_write(tp, 0x19, ephy_data);
+
+                ephy_data = rtl8168_ephy_read(tp, 0x00);
+                ephy_data |= BIT_3;
+                rtl8168_ephy_write(tp, 0x00, ephy_data);
+                ephy_data = rtl8168_ephy_read(tp, 0x0C);
+                ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4);
+                ephy_data |= BIT_9;
+                rtl8168_ephy_write(tp, 0x0C, ephy_data);
+
+                break;
+        case CFG_METHOD_20:
+                ephy_data = rtl8168_ephy_read(tp, 0x06);
+                ephy_data |= BIT_5;
+                ephy_data &= ~(BIT_7 | BIT_6);
+                rtl8168_ephy_write(tp, 0x06, ephy_data);
+
+                rtl8168_ephy_write(tp, 0x0f, 0x5200);
+
+                ephy_data = rtl8168_ephy_read(tp, 0x19);
+                ephy_data |= (BIT_2 | BIT_5 | BIT_9);
+                rtl8168_ephy_write(tp, 0x19, ephy_data);
+
+                ephy_data = rtl8168_ephy_read(tp, 0x00);
+                ephy_data |= BIT_3;
+                rtl8168_ephy_write(tp, 0x00, ephy_data);
+                ephy_data = rtl8168_ephy_read(tp, 0x0C);
+                ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4);
+                ephy_data |= BIT_9;
+                rtl8168_ephy_write(tp, 0x0C, ephy_data);
+
+                break;
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+
+                ephy_data = rtl8168_ephy_read(tp, 0x00);
+                ephy_data &= ~(BIT_3);
+                rtl8168_ephy_write(tp, 0x00, ephy_data);
+                ephy_data = rtl8168_ephy_read(tp, 0x0C);
+                ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4);
+                ephy_data |= (BIT_5 | BIT_11);
+                rtl8168_ephy_write(tp, 0x0C, ephy_data);
+
+                ephy_data = rtl8168_ephy_read(tp, 0x1E);
+                ephy_data |= (BIT_0);
+                rtl8168_ephy_write(tp, 0x1E, ephy_data);
+
+                ephy_data = rtl8168_ephy_read(tp, 0x19);
+                ephy_data &= ~(BIT_15);
+                rtl8168_ephy_write(tp, 0x19, ephy_data);
+
+                break;
+        case CFG_METHOD_25:
+                ephy_data = rtl8168_ephy_read(tp, 0x00);
+                ephy_data &= ~BIT_3;
+                rtl8168_ephy_write(tp, 0x00, ephy_data);
+                ephy_data = rtl8168_ephy_read(tp, 0x0C);
+                ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10| BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4);
+                ephy_data |= (BIT_5 | BIT_11);
+                rtl8168_ephy_write(tp, 0x0C, ephy_data);
+
+                rtl8168_ephy_write(tp, 0x19, 0x7C00);
+                rtl8168_ephy_write(tp, 0x1E, 0x20EB);
+                rtl8168_ephy_write(tp, 0x0D, 0x1666);
+                rtl8168_ephy_write(tp, 0x00, 0x10A3);
+                rtl8168_ephy_write(tp, 0x06, 0xF050);
+
+                SetPCIePhyBit(tp, 0x04, BIT_4);
+                ClearPCIePhyBit(tp, 0x1D, BIT_14);
+
+                break;
+        case CFG_METHOD_26:
+                ClearPCIePhyBit(tp, 0x00, BIT_3);
+                ClearAndSetPCIePhyBit( tp,
+                                       0x0C,
+                                       (BIT_13 | BIT_12 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_4),
+                                       (BIT_5 | BIT_11)
+                                     );
+                SetPCIePhyBit(tp, 0x1E, BIT_0);
+                ClearPCIePhyBit(tp, 0x19, BIT_15);
+
+                ClearPCIePhyBit(tp, 0x19, (BIT_5 | BIT_0));
+
+                SetPCIePhyBit(tp, 0x1E, BIT_13);
+                ClearPCIePhyBit(tp, 0x0D, BIT_8);
+                SetPCIePhyBit(tp, 0x0D, BIT_9);
+                SetPCIePhyBit(tp, 0x00, BIT_7);
+
+                SetPCIePhyBit(tp, 0x06, BIT_4);
+
+                SetPCIePhyBit(tp, 0x04, BIT_4);
+                SetPCIePhyBit(tp, 0x1D, BIT_14);
+
+                break;
+        case CFG_METHOD_23:
+                rtl8168_ephy_write(tp, 0x00, 0x10AB);
+                rtl8168_ephy_write(tp, 0x06, 0xf030);
+                rtl8168_ephy_write(tp, 0x08, 0x2006);
+                rtl8168_ephy_write(tp, 0x0D, 0x1666);
+
+                ephy_data = rtl8168_ephy_read(tp, 0x0C);
+                ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4);
+                rtl8168_ephy_write(tp, 0x0C, ephy_data);
+
+                break;
+        case CFG_METHOD_27:
+                rtl8168_ephy_write(tp, 0x00, 0x10A3);
+                rtl8168_ephy_write(tp, 0x19, 0xFC00);
+                rtl8168_ephy_write(tp, 0x1E, 0x20EA);
+
+                break;
+        case CFG_METHOD_28:
+                rtl8168_ephy_write(tp, 0x00, 0x10AB);
+                rtl8168_ephy_write(tp, 0x19, 0xFC00);
+                rtl8168_ephy_write(tp, 0x1E, 0x20EB);
+                rtl8168_ephy_write(tp, 0x0D, 0x1666);
+                ClearPCIePhyBit(tp, 0x0B, BIT_0);
+                SetPCIePhyBit(tp, 0x1D, BIT_14);
+                ClearAndSetPCIePhyBit(tp,
+                                      0x0C,
+                                      BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_8 | BIT_7 | BIT_6 | BIT_5,
+                                      BIT_9 | BIT_4
+                                     );
+
+                break;
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_37:
+                ClearPCIePhyBit(tp, 0x1E, BIT_11);
+
+                SetPCIePhyBit(tp, 0x1E, BIT_0);
+                SetPCIePhyBit(tp, 0x1D, BIT_11);
+
+                rtl8168_ephy_write(tp, 0x05, 0x2089);
+                rtl8168_ephy_write(tp, 0x06, 0x5881);
+
+                rtl8168_ephy_write(tp, 0x04, 0x854A);
+                rtl8168_ephy_write(tp, 0x01, 0x068B);
+
+                break;
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+                ClearAndSetPCIePhyBit(tp,
+                                      0x19,
+                                      BIT_6,
+                                      (BIT_12| BIT_8)
+                                     );
+                ClearAndSetPCIePhyBit(tp,
+                                      0x59,
+                                      BIT_6,
+                                      (BIT_12| BIT_8)
+                                     );
+
+                ClearPCIePhyBit(tp, 0x0C, BIT_4);
+                ClearPCIePhyBit(tp, 0x4C, BIT_4);
+                ClearPCIePhyBit(tp, 0x0B, BIT_0);
+
+                break;
+        case CFG_METHOD_35:
+                rtl8168_clear_mcu_ocp_bit(tp, 0xD438, BIT_2);
+
+                ClearPCIePhyBit(tp, 0x24, BIT_9);
+
+                rtl8168_clear_mcu_ocp_bit(tp, 0xDE28, (BIT_1 | BIT_0));
+
+                rtl8168_set_mcu_ocp_bit(tp, 0xD438, BIT_2);
+
+                break;
+        case CFG_METHOD_36:
+                rtl8168_clear_mcu_ocp_bit(tp, 0xD438, BIT_2);
+
+                rtl8168_clear_mcu_ocp_bit(tp, 0xDE28, (BIT_1 | BIT_0));
+
+                rtl8168_set_mcu_ocp_bit(tp, 0xD438, BIT_2);
+
+                break;
+        }
+}
+
+static int
+rtl8168_set_phy_mcu_patch_request(struct rtl8168_private *tp)
+{
+        u16 PhyRegValue;
+        u32 WaitCnt;
+        int retval = TRUE;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_21 ... CFG_METHOD_37:
+                rtl8168_mdio_write(tp,0x1f, 0x0B82);
+                rtl8168_set_eth_phy_bit(tp, 0x10, BIT_4);
+
+                rtl8168_mdio_write(tp,0x1f, 0x0B80);
+                WaitCnt = 0;
+                do {
+                        PhyRegValue = rtl8168_mdio_read(tp, 0x10);
+                        udelay(100);
+                        WaitCnt++;
+                }  while (!(PhyRegValue & BIT_6) && (WaitCnt < 1000));
+
+                if (!(PhyRegValue & BIT_6) && (WaitCnt == 1000))
+                        retval = FALSE;
+
+                rtl8168_mdio_write(tp,0x1f, 0x0000);
+                break;
+        }
+
+        return retval;
+}
+
+static int
+rtl8168_clear_phy_mcu_patch_request(struct rtl8168_private *tp)
+{
+        u16 PhyRegValue;
+        u32 WaitCnt;
+        int retval = TRUE;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_21 ... CFG_METHOD_37:
+                rtl8168_mdio_write(tp, 0x1f, 0x0B82);
+                rtl8168_clear_eth_phy_bit(tp, 0x10, BIT_4);
+
+                rtl8168_mdio_write(tp,0x1f, 0x0B80);
+                WaitCnt = 0;
+                do {
+                        PhyRegValue = rtl8168_mdio_read(tp, 0x10);
+                        udelay(100);
+                        WaitCnt++;
+                } while ((PhyRegValue & BIT_6) && (WaitCnt < 1000));
+
+                if ((PhyRegValue & BIT_6) && (WaitCnt == 1000))
+                        retval = FALSE;
+
+                rtl8168_mdio_write(tp,0x1f, 0x0000);
+                break;
+        }
+
+        return retval;
+}
+
+static u16
+rtl8168_get_hw_phy_mcu_code_ver(struct rtl8168_private *tp)
+{
+        u16 hw_ram_code_ver = ~0;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_14:
+        case CFG_METHOD_15:
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B60);
+                hw_ram_code_ver = rtl8168_mdio_read(tp, 0x06);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                break;
+        case CFG_METHOD_16:
+        case CFG_METHOD_17:
+        case CFG_METHOD_18:
+        case CFG_METHOD_19:
+        case CFG_METHOD_20:
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B30);
+                hw_ram_code_ver = rtl8168_mdio_read(tp, 0x06);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                break;
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x801E);
+                hw_ram_code_ver = rtl8168_mdio_read(tp, 0x14);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                break;
+        default:
+                tp->hw_ram_code_ver = ~0;
+                break;
+        }
+
+        return hw_ram_code_ver;
+}
+
+#ifndef ENABLE_USE_FIRMWARE_FILE
+static void
+rtl8168_enable_phy_disable_mode(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        switch (tp->HwSuppCheckPhyDisableModeVer) {
+        case 1:
+                rtl8168_mac_ocp_write(tp, 0xDC20, rtl8168_mac_ocp_read(tp, 0xDC20) | BIT_1);
+                break;
+        case 2:
+        case 3:
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_5);
+                break;
+        }
+
+        dprintk("enable phy disable mode.\n");
+}
+
+static void
+rtl8168_disable_phy_disable_mode(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        switch (tp->HwSuppCheckPhyDisableModeVer) {
+        case 1:
+                rtl8168_mac_ocp_write(tp, 0xDC20, rtl8168_mac_ocp_read(tp, 0xDC20) & ~BIT_1);
+                break;
+        case 2:
+        case 3:
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_5);
+                break;
+        }
+
+        mdelay(1);
+
+        dprintk("disable phy disable mode.\n");
+}
+
+static int
+rtl8168_check_hw_phy_mcu_code_ver(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int ram_code_ver_match = 0;
+
+        tp->hw_ram_code_ver = rtl8168_get_hw_phy_mcu_code_ver(tp);
+
+        if ( tp->hw_ram_code_ver == tp->sw_ram_code_ver) {
+                ram_code_ver_match = 1;
+                tp->HwHasWrRamCodeToMicroP = TRUE;
+        }
+
+        return ram_code_ver_match;
+}
+
+static void
+rtl8168_write_hw_phy_mcu_code_ver(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_14:
+        case CFG_METHOD_15:
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B60);
+                rtl8168_mdio_write(tp, 0x06, tp->sw_ram_code_ver);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                tp->hw_ram_code_ver = tp->sw_ram_code_ver;
+                break;
+        case CFG_METHOD_16:
+        case CFG_METHOD_17:
+        case CFG_METHOD_18:
+        case CFG_METHOD_19:
+        case CFG_METHOD_20:
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B30);
+                rtl8168_mdio_write(tp, 0x06, tp->sw_ram_code_ver);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                tp->hw_ram_code_ver = tp->sw_ram_code_ver;
+                break;
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x801E);
+                rtl8168_mdio_write(tp, 0x14, tp->sw_ram_code_ver);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                tp->hw_ram_code_ver = tp->sw_ram_code_ver;
+                break;
+        }
+}
+static int
+rtl8168_phy_ram_code_check(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u16 PhyRegValue;
+        int retval = TRUE;
+
+        switch(tp->mcfg) {
+        case CFG_METHOD_21:
+                rtl8168_mdio_write(tp, 0x1f, 0x0A40);
+                PhyRegValue = rtl8168_mdio_read(tp, 0x10);
+                PhyRegValue &= ~(BIT_11);
+                rtl8168_mdio_write(tp, 0x10, PhyRegValue);
+
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0A00);
+                PhyRegValue = rtl8168_mdio_read(tp, 0x10);
+                PhyRegValue &= ~(BIT_12 | BIT_13 | BIT_14 | BIT_15);
+                rtl8168_mdio_write(tp, 0x10, PhyRegValue);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8010);
+                PhyRegValue = rtl8168_mdio_read(tp, 0x14);
+                PhyRegValue &= ~(BIT_11);
+                rtl8168_mdio_write(tp, 0x14, PhyRegValue);
+
+                rtl8168_set_phy_mcu_patch_request(tp);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0A40);
+                rtl8168_mdio_write(tp, 0x10, 0x0140);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0A4A);
+                PhyRegValue = rtl8168_mdio_read(tp, 0x13);
+                PhyRegValue &= ~(BIT_6);
+                PhyRegValue |= (BIT_7);
+                rtl8168_mdio_write(tp, 0x13, PhyRegValue);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0A44);
+                PhyRegValue = rtl8168_mdio_read(tp, 0x14);
+                PhyRegValue |= (BIT_2);
+                rtl8168_mdio_write(tp, 0x14, PhyRegValue);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0A50);
+                PhyRegValue = rtl8168_mdio_read(tp, 0x11);
+                PhyRegValue |= (BIT_11|BIT_12);
+                rtl8168_mdio_write(tp, 0x11, PhyRegValue);
+
+                rtl8168_clear_phy_mcu_patch_request(tp);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0A40);
+                rtl8168_mdio_write(tp, 0x10, 0x1040);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0A4A);
+                PhyRegValue = rtl8168_mdio_read(tp, 0x13);
+                PhyRegValue &= ~(BIT_6|BIT_7);
+                rtl8168_mdio_write(tp, 0x13, PhyRegValue);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0A44);
+                PhyRegValue = rtl8168_mdio_read(tp, 0x14);
+                PhyRegValue &= ~(BIT_2);
+                rtl8168_mdio_write(tp, 0x14, PhyRegValue);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0A50);
+                PhyRegValue = rtl8168_mdio_read(tp, 0x11);
+                PhyRegValue &= ~(BIT_11|BIT_12);
+                rtl8168_mdio_write(tp, 0x11, PhyRegValue);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8010);
+                PhyRegValue = rtl8168_mdio_read(tp, 0x14);
+                PhyRegValue |= (BIT_11);
+                rtl8168_mdio_write(tp, 0x14, PhyRegValue);
+
+                rtl8168_set_phy_mcu_patch_request(tp);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0A20);
+                PhyRegValue = rtl8168_mdio_read(tp, 0x13);
+                if (PhyRegValue & BIT_11) {
+                        if (PhyRegValue & BIT_10) {
+                                retval = FALSE;
+                        }
+                }
+
+                rtl8168_clear_phy_mcu_patch_request(tp);
+
+                mdelay(2);
+                break;
+        default:
+                break;
+        }
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+        return retval;
+}
+
+static void
+rtl8168_set_phy_ram_code_check_fail_flag(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u16 TmpUshort;
+
+        switch(tp->mcfg) {
+        case CFG_METHOD_21:
+                TmpUshort = rtl8168_mac_ocp_read(tp, 0xD3C0);
+                TmpUshort |= BIT_0;
+                rtl8168_mac_ocp_write(tp, 0xD3C0, TmpUshort);
+                break;
+        }
+}
+
+static void
+rtl8168_set_phy_mcu_8168e_1(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        unsigned int gphy_val,i;
+
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x00, 0x1800);
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1e, 0x0023);
+        rtl8168_mdio_write(tp, 0x17, 0x0117);
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1E, 0x002C);
+        rtl8168_mdio_write(tp, 0x1B, 0x5000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x16, 0x4104);
+        for (i = 0; i < 200; i++) {
+                udelay(100);
+                gphy_val = rtl8168_mdio_read(tp, 0x1E);
+                gphy_val &= 0x03FF;
+                if (gphy_val == 0x000C)
+                        break;
+        }
+        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+        for (i = 0; i < 200; i++) {
+                udelay(100);
+                gphy_val = rtl8168_mdio_read(tp, 0x07);
+                if ((gphy_val & BIT_5) == 0)
+                        break;
+        }
+        gphy_val = rtl8168_mdio_read(tp, 0x07);
+        if (gphy_val & BIT_5) {
+                rtl8168_mdio_write(tp, 0x1f, 0x0007);
+                rtl8168_mdio_write(tp, 0x1e, 0x00a1);
+                rtl8168_mdio_write(tp, 0x17, 0x1000);
+                rtl8168_mdio_write(tp, 0x17, 0x0000);
+                rtl8168_mdio_write(tp, 0x17, 0x2000);
+                rtl8168_mdio_write(tp, 0x1e, 0x002f);
+                rtl8168_mdio_write(tp, 0x18, 0x9bfb);
+                rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                rtl8168_mdio_write(tp, 0x07, 0x0000);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        }
+        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+        rtl8168_mdio_write(tp, 0x05, 0xfff6);
+        rtl8168_mdio_write(tp, 0x06, 0x0080);
+        gphy_val = rtl8168_mdio_read(tp, 0x00);
+        gphy_val &= ~(BIT_7);
+        rtl8168_mdio_write(tp, 0x00, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0002);
+        gphy_val = rtl8168_mdio_read(tp, 0x08);
+        gphy_val &= ~(BIT_7);
+        rtl8168_mdio_write(tp, 0x08, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1e, 0x0023);
+        rtl8168_mdio_write(tp, 0x16, 0x0306);
+        rtl8168_mdio_write(tp, 0x16, 0x0307);
+        rtl8168_mdio_write(tp, 0x15, 0x000e);
+        rtl8168_mdio_write(tp, 0x19, 0x000a);
+        rtl8168_mdio_write(tp, 0x15, 0x0010);
+        rtl8168_mdio_write(tp, 0x19, 0x0008);
+        rtl8168_mdio_write(tp, 0x15, 0x0018);
+        rtl8168_mdio_write(tp, 0x19, 0x4801);
+        rtl8168_mdio_write(tp, 0x15, 0x0019);
+        rtl8168_mdio_write(tp, 0x19, 0x6801);
+        rtl8168_mdio_write(tp, 0x15, 0x001a);
+        rtl8168_mdio_write(tp, 0x19, 0x66a1);
+        rtl8168_mdio_write(tp, 0x15, 0x001f);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0020);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0021);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0022);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0023);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0024);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0025);
+        rtl8168_mdio_write(tp, 0x19, 0x64a1);
+        rtl8168_mdio_write(tp, 0x15, 0x0026);
+        rtl8168_mdio_write(tp, 0x19, 0x40ea);
+        rtl8168_mdio_write(tp, 0x15, 0x0027);
+        rtl8168_mdio_write(tp, 0x19, 0x4503);
+        rtl8168_mdio_write(tp, 0x15, 0x0028);
+        rtl8168_mdio_write(tp, 0x19, 0x9f00);
+        rtl8168_mdio_write(tp, 0x15, 0x0029);
+        rtl8168_mdio_write(tp, 0x19, 0xa631);
+        rtl8168_mdio_write(tp, 0x15, 0x002a);
+        rtl8168_mdio_write(tp, 0x19, 0x9717);
+        rtl8168_mdio_write(tp, 0x15, 0x002b);
+        rtl8168_mdio_write(tp, 0x19, 0x302c);
+        rtl8168_mdio_write(tp, 0x15, 0x002c);
+        rtl8168_mdio_write(tp, 0x19, 0x4802);
+        rtl8168_mdio_write(tp, 0x15, 0x002d);
+        rtl8168_mdio_write(tp, 0x19, 0x58da);
+        rtl8168_mdio_write(tp, 0x15, 0x002e);
+        rtl8168_mdio_write(tp, 0x19, 0x400d);
+        rtl8168_mdio_write(tp, 0x15, 0x002f);
+        rtl8168_mdio_write(tp, 0x19, 0x4488);
+        rtl8168_mdio_write(tp, 0x15, 0x0030);
+        rtl8168_mdio_write(tp, 0x19, 0x9e00);
+        rtl8168_mdio_write(tp, 0x15, 0x0031);
+        rtl8168_mdio_write(tp, 0x19, 0x63c8);
+        rtl8168_mdio_write(tp, 0x15, 0x0032);
+        rtl8168_mdio_write(tp, 0x19, 0x6481);
+        rtl8168_mdio_write(tp, 0x15, 0x0033);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0034);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0035);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0036);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0037);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0038);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0039);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x003a);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x003b);
+        rtl8168_mdio_write(tp, 0x19, 0x63e8);
+        rtl8168_mdio_write(tp, 0x15, 0x003c);
+        rtl8168_mdio_write(tp, 0x19, 0x7d00);
+        rtl8168_mdio_write(tp, 0x15, 0x003d);
+        rtl8168_mdio_write(tp, 0x19, 0x59d4);
+        rtl8168_mdio_write(tp, 0x15, 0x003e);
+        rtl8168_mdio_write(tp, 0x19, 0x63f8);
+        rtl8168_mdio_write(tp, 0x15, 0x0040);
+        rtl8168_mdio_write(tp, 0x19, 0x64a1);
+        rtl8168_mdio_write(tp, 0x15, 0x0041);
+        rtl8168_mdio_write(tp, 0x19, 0x30de);
+        rtl8168_mdio_write(tp, 0x15, 0x0044);
+        rtl8168_mdio_write(tp, 0x19, 0x480f);
+        rtl8168_mdio_write(tp, 0x15, 0x0045);
+        rtl8168_mdio_write(tp, 0x19, 0x6800);
+        rtl8168_mdio_write(tp, 0x15, 0x0046);
+        rtl8168_mdio_write(tp, 0x19, 0x6680);
+        rtl8168_mdio_write(tp, 0x15, 0x0047);
+        rtl8168_mdio_write(tp, 0x19, 0x7c10);
+        rtl8168_mdio_write(tp, 0x15, 0x0048);
+        rtl8168_mdio_write(tp, 0x19, 0x63c8);
+        rtl8168_mdio_write(tp, 0x15, 0x0049);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x004a);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x004b);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x004c);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x004d);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x004e);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x004f);
+        rtl8168_mdio_write(tp, 0x19, 0x40ea);
+        rtl8168_mdio_write(tp, 0x15, 0x0050);
+        rtl8168_mdio_write(tp, 0x19, 0x4503);
+        rtl8168_mdio_write(tp, 0x15, 0x0051);
+        rtl8168_mdio_write(tp, 0x19, 0x58ca);
+        rtl8168_mdio_write(tp, 0x15, 0x0052);
+        rtl8168_mdio_write(tp, 0x19, 0x63c8);
+        rtl8168_mdio_write(tp, 0x15, 0x0053);
+        rtl8168_mdio_write(tp, 0x19, 0x63d8);
+        rtl8168_mdio_write(tp, 0x15, 0x0054);
+        rtl8168_mdio_write(tp, 0x19, 0x66a0);
+        rtl8168_mdio_write(tp, 0x15, 0x0055);
+        rtl8168_mdio_write(tp, 0x19, 0x9f00);
+        rtl8168_mdio_write(tp, 0x15, 0x0056);
+        rtl8168_mdio_write(tp, 0x19, 0x3000);
+        rtl8168_mdio_write(tp, 0x15, 0x006E);
+        rtl8168_mdio_write(tp, 0x19, 0x9afa);
+        rtl8168_mdio_write(tp, 0x15, 0x00a1);
+        rtl8168_mdio_write(tp, 0x19, 0x3044);
+        rtl8168_mdio_write(tp, 0x15, 0x00ab);
+        rtl8168_mdio_write(tp, 0x19, 0x5820);
+        rtl8168_mdio_write(tp, 0x15, 0x00ac);
+        rtl8168_mdio_write(tp, 0x19, 0x5e04);
+        rtl8168_mdio_write(tp, 0x15, 0x00ad);
+        rtl8168_mdio_write(tp, 0x19, 0xb60c);
+        rtl8168_mdio_write(tp, 0x15, 0x00af);
+        rtl8168_mdio_write(tp, 0x19, 0x000a);
+        rtl8168_mdio_write(tp, 0x15, 0x00b2);
+        rtl8168_mdio_write(tp, 0x19, 0x30b9);
+        rtl8168_mdio_write(tp, 0x15, 0x00b9);
+        rtl8168_mdio_write(tp, 0x19, 0x4408);
+        rtl8168_mdio_write(tp, 0x15, 0x00ba);
+        rtl8168_mdio_write(tp, 0x19, 0x480b);
+        rtl8168_mdio_write(tp, 0x15, 0x00bb);
+        rtl8168_mdio_write(tp, 0x19, 0x5e00);
+        rtl8168_mdio_write(tp, 0x15, 0x00bc);
+        rtl8168_mdio_write(tp, 0x19, 0x405f);
+        rtl8168_mdio_write(tp, 0x15, 0x00bd);
+        rtl8168_mdio_write(tp, 0x19, 0x4448);
+        rtl8168_mdio_write(tp, 0x15, 0x00be);
+        rtl8168_mdio_write(tp, 0x19, 0x4020);
+        rtl8168_mdio_write(tp, 0x15, 0x00bf);
+        rtl8168_mdio_write(tp, 0x19, 0x4468);
+        rtl8168_mdio_write(tp, 0x15, 0x00c0);
+        rtl8168_mdio_write(tp, 0x19, 0x9c02);
+        rtl8168_mdio_write(tp, 0x15, 0x00c1);
+        rtl8168_mdio_write(tp, 0x19, 0x58a0);
+        rtl8168_mdio_write(tp, 0x15, 0x00c2);
+        rtl8168_mdio_write(tp, 0x19, 0xb605);
+        rtl8168_mdio_write(tp, 0x15, 0x00c3);
+        rtl8168_mdio_write(tp, 0x19, 0xc0d3);
+        rtl8168_mdio_write(tp, 0x15, 0x00c4);
+        rtl8168_mdio_write(tp, 0x19, 0x00e6);
+        rtl8168_mdio_write(tp, 0x15, 0x00c5);
+        rtl8168_mdio_write(tp, 0x19, 0xdaec);
+        rtl8168_mdio_write(tp, 0x15, 0x00c6);
+        rtl8168_mdio_write(tp, 0x19, 0x00fa);
+        rtl8168_mdio_write(tp, 0x15, 0x00c7);
+        rtl8168_mdio_write(tp, 0x19, 0x9df9);
+        rtl8168_mdio_write(tp, 0x15, 0x00c8);
+        rtl8168_mdio_write(tp, 0x19, 0x307a);
+        rtl8168_mdio_write(tp, 0x15, 0x0112);
+        rtl8168_mdio_write(tp, 0x19, 0x6421);
+        rtl8168_mdio_write(tp, 0x15, 0x0113);
+        rtl8168_mdio_write(tp, 0x19, 0x7c08);
+        rtl8168_mdio_write(tp, 0x15, 0x0114);
+        rtl8168_mdio_write(tp, 0x19, 0x63f0);
+        rtl8168_mdio_write(tp, 0x15, 0x0115);
+        rtl8168_mdio_write(tp, 0x19, 0x4003);
+        rtl8168_mdio_write(tp, 0x15, 0x0116);
+        rtl8168_mdio_write(tp, 0x19, 0x4418);
+        rtl8168_mdio_write(tp, 0x15, 0x0117);
+        rtl8168_mdio_write(tp, 0x19, 0x9b00);
+        rtl8168_mdio_write(tp, 0x15, 0x0118);
+        rtl8168_mdio_write(tp, 0x19, 0x6461);
+        rtl8168_mdio_write(tp, 0x15, 0x0119);
+        rtl8168_mdio_write(tp, 0x19, 0x64e1);
+        rtl8168_mdio_write(tp, 0x15, 0x011a);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0150);
+        rtl8168_mdio_write(tp, 0x19, 0x7c80);
+        rtl8168_mdio_write(tp, 0x15, 0x0151);
+        rtl8168_mdio_write(tp, 0x19, 0x6461);
+        rtl8168_mdio_write(tp, 0x15, 0x0152);
+        rtl8168_mdio_write(tp, 0x19, 0x4003);
+        rtl8168_mdio_write(tp, 0x15, 0x0153);
+        rtl8168_mdio_write(tp, 0x19, 0x4540);
+        rtl8168_mdio_write(tp, 0x15, 0x0154);
+        rtl8168_mdio_write(tp, 0x19, 0x9f00);
+        rtl8168_mdio_write(tp, 0x15, 0x0155);
+        rtl8168_mdio_write(tp, 0x19, 0x9d00);
+        rtl8168_mdio_write(tp, 0x15, 0x0156);
+        rtl8168_mdio_write(tp, 0x19, 0x7c40);
+        rtl8168_mdio_write(tp, 0x15, 0x0157);
+        rtl8168_mdio_write(tp, 0x19, 0x6421);
+        rtl8168_mdio_write(tp, 0x15, 0x0158);
+        rtl8168_mdio_write(tp, 0x19, 0x7c80);
+        rtl8168_mdio_write(tp, 0x15, 0x0159);
+        rtl8168_mdio_write(tp, 0x19, 0x64a1);
+        rtl8168_mdio_write(tp, 0x15, 0x015a);
+        rtl8168_mdio_write(tp, 0x19, 0x30fe);
+        rtl8168_mdio_write(tp, 0x15, 0x021e);
+        rtl8168_mdio_write(tp, 0x19, 0x5410);
+        rtl8168_mdio_write(tp, 0x15, 0x0225);
+        rtl8168_mdio_write(tp, 0x19, 0x5400);
+        rtl8168_mdio_write(tp, 0x15, 0x023D);
+        rtl8168_mdio_write(tp, 0x19, 0x4050);
+        rtl8168_mdio_write(tp, 0x15, 0x0295);
+        rtl8168_mdio_write(tp, 0x19, 0x6c08);
+        rtl8168_mdio_write(tp, 0x15, 0x02bd);
+        rtl8168_mdio_write(tp, 0x19, 0xa523);
+        rtl8168_mdio_write(tp, 0x15, 0x02be);
+        rtl8168_mdio_write(tp, 0x19, 0x32ca);
+        rtl8168_mdio_write(tp, 0x15, 0x02ca);
+        rtl8168_mdio_write(tp, 0x19, 0x48b3);
+        rtl8168_mdio_write(tp, 0x15, 0x02cb);
+        rtl8168_mdio_write(tp, 0x19, 0x4020);
+        rtl8168_mdio_write(tp, 0x15, 0x02cc);
+        rtl8168_mdio_write(tp, 0x19, 0x4823);
+        rtl8168_mdio_write(tp, 0x15, 0x02cd);
+        rtl8168_mdio_write(tp, 0x19, 0x4510);
+        rtl8168_mdio_write(tp, 0x15, 0x02ce);
+        rtl8168_mdio_write(tp, 0x19, 0xb63a);
+        rtl8168_mdio_write(tp, 0x15, 0x02cf);
+        rtl8168_mdio_write(tp, 0x19, 0x7dc8);
+        rtl8168_mdio_write(tp, 0x15, 0x02d6);
+        rtl8168_mdio_write(tp, 0x19, 0x9bf8);
+        rtl8168_mdio_write(tp, 0x15, 0x02d8);
+        rtl8168_mdio_write(tp, 0x19, 0x85f6);
+        rtl8168_mdio_write(tp, 0x15, 0x02d9);
+        rtl8168_mdio_write(tp, 0x19, 0x32e0);
+        rtl8168_mdio_write(tp, 0x15, 0x02e0);
+        rtl8168_mdio_write(tp, 0x19, 0x4834);
+        rtl8168_mdio_write(tp, 0x15, 0x02e1);
+        rtl8168_mdio_write(tp, 0x19, 0x6c08);
+        rtl8168_mdio_write(tp, 0x15, 0x02e2);
+        rtl8168_mdio_write(tp, 0x19, 0x4020);
+        rtl8168_mdio_write(tp, 0x15, 0x02e3);
+        rtl8168_mdio_write(tp, 0x19, 0x4824);
+        rtl8168_mdio_write(tp, 0x15, 0x02e4);
+        rtl8168_mdio_write(tp, 0x19, 0x4520);
+        rtl8168_mdio_write(tp, 0x15, 0x02e5);
+        rtl8168_mdio_write(tp, 0x19, 0x4008);
+        rtl8168_mdio_write(tp, 0x15, 0x02e6);
+        rtl8168_mdio_write(tp, 0x19, 0x4560);
+        rtl8168_mdio_write(tp, 0x15, 0x02e7);
+        rtl8168_mdio_write(tp, 0x19, 0x9d04);
+        rtl8168_mdio_write(tp, 0x15, 0x02e8);
+        rtl8168_mdio_write(tp, 0x19, 0x48c4);
+        rtl8168_mdio_write(tp, 0x15, 0x02e9);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02ea);
+        rtl8168_mdio_write(tp, 0x19, 0x4844);
+        rtl8168_mdio_write(tp, 0x15, 0x02eb);
+        rtl8168_mdio_write(tp, 0x19, 0x7dc8);
+        rtl8168_mdio_write(tp, 0x15, 0x02f0);
+        rtl8168_mdio_write(tp, 0x19, 0x9cf7);
+        rtl8168_mdio_write(tp, 0x15, 0x02f1);
+        rtl8168_mdio_write(tp, 0x19, 0xdf94);
+        rtl8168_mdio_write(tp, 0x15, 0x02f2);
+        rtl8168_mdio_write(tp, 0x19, 0x0002);
+        rtl8168_mdio_write(tp, 0x15, 0x02f3);
+        rtl8168_mdio_write(tp, 0x19, 0x6810);
+        rtl8168_mdio_write(tp, 0x15, 0x02f4);
+        rtl8168_mdio_write(tp, 0x19, 0xb614);
+        rtl8168_mdio_write(tp, 0x15, 0x02f5);
+        rtl8168_mdio_write(tp, 0x19, 0xc42b);
+        rtl8168_mdio_write(tp, 0x15, 0x02f6);
+        rtl8168_mdio_write(tp, 0x19, 0x00d4);
+        rtl8168_mdio_write(tp, 0x15, 0x02f7);
+        rtl8168_mdio_write(tp, 0x19, 0xc455);
+        rtl8168_mdio_write(tp, 0x15, 0x02f8);
+        rtl8168_mdio_write(tp, 0x19, 0x0093);
+        rtl8168_mdio_write(tp, 0x15, 0x02f9);
+        rtl8168_mdio_write(tp, 0x19, 0x92ee);
+        rtl8168_mdio_write(tp, 0x15, 0x02fa);
+        rtl8168_mdio_write(tp, 0x19, 0xefed);
+        rtl8168_mdio_write(tp, 0x15, 0x02fb);
+        rtl8168_mdio_write(tp, 0x19, 0x3312);
+        rtl8168_mdio_write(tp, 0x15, 0x0312);
+        rtl8168_mdio_write(tp, 0x19, 0x49b5);
+        rtl8168_mdio_write(tp, 0x15, 0x0313);
+        rtl8168_mdio_write(tp, 0x19, 0x7d00);
+        rtl8168_mdio_write(tp, 0x15, 0x0314);
+        rtl8168_mdio_write(tp, 0x19, 0x4d00);
+        rtl8168_mdio_write(tp, 0x15, 0x0315);
+        rtl8168_mdio_write(tp, 0x19, 0x6810);
+        rtl8168_mdio_write(tp, 0x15, 0x031e);
+        rtl8168_mdio_write(tp, 0x19, 0x404f);
+        rtl8168_mdio_write(tp, 0x15, 0x031f);
+        rtl8168_mdio_write(tp, 0x19, 0x44c8);
+        rtl8168_mdio_write(tp, 0x15, 0x0320);
+        rtl8168_mdio_write(tp, 0x19, 0xd64f);
+        rtl8168_mdio_write(tp, 0x15, 0x0321);
+        rtl8168_mdio_write(tp, 0x19, 0x00e7);
+        rtl8168_mdio_write(tp, 0x15, 0x0322);
+        rtl8168_mdio_write(tp, 0x19, 0x7c08);
+        rtl8168_mdio_write(tp, 0x15, 0x0323);
+        rtl8168_mdio_write(tp, 0x19, 0x8203);
+        rtl8168_mdio_write(tp, 0x15, 0x0324);
+        rtl8168_mdio_write(tp, 0x19, 0x4d48);
+        rtl8168_mdio_write(tp, 0x15, 0x0325);
+        rtl8168_mdio_write(tp, 0x19, 0x3327);
+        rtl8168_mdio_write(tp, 0x15, 0x0326);
+        rtl8168_mdio_write(tp, 0x19, 0x4d40);
+        rtl8168_mdio_write(tp, 0x15, 0x0327);
+        rtl8168_mdio_write(tp, 0x19, 0xc8d7);
+        rtl8168_mdio_write(tp, 0x15, 0x0328);
+        rtl8168_mdio_write(tp, 0x19, 0x0003);
+        rtl8168_mdio_write(tp, 0x15, 0x0329);
+        rtl8168_mdio_write(tp, 0x19, 0x7c20);
+        rtl8168_mdio_write(tp, 0x15, 0x032a);
+        rtl8168_mdio_write(tp, 0x19, 0x4c20);
+        rtl8168_mdio_write(tp, 0x15, 0x032b);
+        rtl8168_mdio_write(tp, 0x19, 0xc8ed);
+        rtl8168_mdio_write(tp, 0x15, 0x032c);
+        rtl8168_mdio_write(tp, 0x19, 0x00f4);
+        rtl8168_mdio_write(tp, 0x15, 0x032d);
+        rtl8168_mdio_write(tp, 0x19, 0x82b3);
+        rtl8168_mdio_write(tp, 0x15, 0x032e);
+        rtl8168_mdio_write(tp, 0x19, 0xd11d);
+        rtl8168_mdio_write(tp, 0x15, 0x032f);
+        rtl8168_mdio_write(tp, 0x19, 0x00b1);
+        rtl8168_mdio_write(tp, 0x15, 0x0330);
+        rtl8168_mdio_write(tp, 0x19, 0xde18);
+        rtl8168_mdio_write(tp, 0x15, 0x0331);
+        rtl8168_mdio_write(tp, 0x19, 0x0008);
+        rtl8168_mdio_write(tp, 0x15, 0x0332);
+        rtl8168_mdio_write(tp, 0x19, 0x91ee);
+        rtl8168_mdio_write(tp, 0x15, 0x0333);
+        rtl8168_mdio_write(tp, 0x19, 0x3339);
+        rtl8168_mdio_write(tp, 0x15, 0x033a);
+        rtl8168_mdio_write(tp, 0x19, 0x4064);
+        rtl8168_mdio_write(tp, 0x15, 0x0340);
+        rtl8168_mdio_write(tp, 0x19, 0x9e06);
+        rtl8168_mdio_write(tp, 0x15, 0x0341);
+        rtl8168_mdio_write(tp, 0x19, 0x7c08);
+        rtl8168_mdio_write(tp, 0x15, 0x0342);
+        rtl8168_mdio_write(tp, 0x19, 0x8203);
+        rtl8168_mdio_write(tp, 0x15, 0x0343);
+        rtl8168_mdio_write(tp, 0x19, 0x4d48);
+        rtl8168_mdio_write(tp, 0x15, 0x0344);
+        rtl8168_mdio_write(tp, 0x19, 0x3346);
+        rtl8168_mdio_write(tp, 0x15, 0x0345);
+        rtl8168_mdio_write(tp, 0x19, 0x4d40);
+        rtl8168_mdio_write(tp, 0x15, 0x0346);
+        rtl8168_mdio_write(tp, 0x19, 0xd11d);
+        rtl8168_mdio_write(tp, 0x15, 0x0347);
+        rtl8168_mdio_write(tp, 0x19, 0x0099);
+        rtl8168_mdio_write(tp, 0x15, 0x0348);
+        rtl8168_mdio_write(tp, 0x19, 0xbb17);
+        rtl8168_mdio_write(tp, 0x15, 0x0349);
+        rtl8168_mdio_write(tp, 0x19, 0x8102);
+        rtl8168_mdio_write(tp, 0x15, 0x034a);
+        rtl8168_mdio_write(tp, 0x19, 0x334d);
+        rtl8168_mdio_write(tp, 0x15, 0x034b);
+        rtl8168_mdio_write(tp, 0x19, 0xa22c);
+        rtl8168_mdio_write(tp, 0x15, 0x034c);
+        rtl8168_mdio_write(tp, 0x19, 0x3397);
+        rtl8168_mdio_write(tp, 0x15, 0x034d);
+        rtl8168_mdio_write(tp, 0x19, 0x91f2);
+        rtl8168_mdio_write(tp, 0x15, 0x034e);
+        rtl8168_mdio_write(tp, 0x19, 0xc218);
+        rtl8168_mdio_write(tp, 0x15, 0x034f);
+        rtl8168_mdio_write(tp, 0x19, 0x00f0);
+        rtl8168_mdio_write(tp, 0x15, 0x0350);
+        rtl8168_mdio_write(tp, 0x19, 0x3397);
+        rtl8168_mdio_write(tp, 0x15, 0x0351);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0364);
+        rtl8168_mdio_write(tp, 0x19, 0xbc05);
+        rtl8168_mdio_write(tp, 0x15, 0x0367);
+        rtl8168_mdio_write(tp, 0x19, 0xa1fc);
+        rtl8168_mdio_write(tp, 0x15, 0x0368);
+        rtl8168_mdio_write(tp, 0x19, 0x3377);
+        rtl8168_mdio_write(tp, 0x15, 0x0369);
+        rtl8168_mdio_write(tp, 0x19, 0x328b);
+        rtl8168_mdio_write(tp, 0x15, 0x036a);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0377);
+        rtl8168_mdio_write(tp, 0x19, 0x4b97);
+        rtl8168_mdio_write(tp, 0x15, 0x0378);
+        rtl8168_mdio_write(tp, 0x19, 0x6818);
+        rtl8168_mdio_write(tp, 0x15, 0x0379);
+        rtl8168_mdio_write(tp, 0x19, 0x4b07);
+        rtl8168_mdio_write(tp, 0x15, 0x037a);
+        rtl8168_mdio_write(tp, 0x19, 0x40ac);
+        rtl8168_mdio_write(tp, 0x15, 0x037b);
+        rtl8168_mdio_write(tp, 0x19, 0x4445);
+        rtl8168_mdio_write(tp, 0x15, 0x037c);
+        rtl8168_mdio_write(tp, 0x19, 0x404e);
+        rtl8168_mdio_write(tp, 0x15, 0x037d);
+        rtl8168_mdio_write(tp, 0x19, 0x4461);
+        rtl8168_mdio_write(tp, 0x15, 0x037e);
+        rtl8168_mdio_write(tp, 0x19, 0x9c09);
+        rtl8168_mdio_write(tp, 0x15, 0x037f);
+        rtl8168_mdio_write(tp, 0x19, 0x63da);
+        rtl8168_mdio_write(tp, 0x15, 0x0380);
+        rtl8168_mdio_write(tp, 0x19, 0x5440);
+        rtl8168_mdio_write(tp, 0x15, 0x0381);
+        rtl8168_mdio_write(tp, 0x19, 0x4b98);
+        rtl8168_mdio_write(tp, 0x15, 0x0382);
+        rtl8168_mdio_write(tp, 0x19, 0x7c60);
+        rtl8168_mdio_write(tp, 0x15, 0x0383);
+        rtl8168_mdio_write(tp, 0x19, 0x4c00);
+        rtl8168_mdio_write(tp, 0x15, 0x0384);
+        rtl8168_mdio_write(tp, 0x19, 0x4b08);
+        rtl8168_mdio_write(tp, 0x15, 0x0385);
+        rtl8168_mdio_write(tp, 0x19, 0x63d8);
+        rtl8168_mdio_write(tp, 0x15, 0x0386);
+        rtl8168_mdio_write(tp, 0x19, 0x338d);
+        rtl8168_mdio_write(tp, 0x15, 0x0387);
+        rtl8168_mdio_write(tp, 0x19, 0xd64f);
+        rtl8168_mdio_write(tp, 0x15, 0x0388);
+        rtl8168_mdio_write(tp, 0x19, 0x0080);
+        rtl8168_mdio_write(tp, 0x15, 0x0389);
+        rtl8168_mdio_write(tp, 0x19, 0x820c);
+        rtl8168_mdio_write(tp, 0x15, 0x038a);
+        rtl8168_mdio_write(tp, 0x19, 0xa10b);
+        rtl8168_mdio_write(tp, 0x15, 0x038b);
+        rtl8168_mdio_write(tp, 0x19, 0x9df3);
+        rtl8168_mdio_write(tp, 0x15, 0x038c);
+        rtl8168_mdio_write(tp, 0x19, 0x3395);
+        rtl8168_mdio_write(tp, 0x15, 0x038d);
+        rtl8168_mdio_write(tp, 0x19, 0xd64f);
+        rtl8168_mdio_write(tp, 0x15, 0x038e);
+        rtl8168_mdio_write(tp, 0x19, 0x00f9);
+        rtl8168_mdio_write(tp, 0x15, 0x038f);
+        rtl8168_mdio_write(tp, 0x19, 0xc017);
+        rtl8168_mdio_write(tp, 0x15, 0x0390);
+        rtl8168_mdio_write(tp, 0x19, 0x0005);
+        rtl8168_mdio_write(tp, 0x15, 0x0391);
+        rtl8168_mdio_write(tp, 0x19, 0x6c0b);
+        rtl8168_mdio_write(tp, 0x15, 0x0392);
+        rtl8168_mdio_write(tp, 0x19, 0xa103);
+        rtl8168_mdio_write(tp, 0x15, 0x0393);
+        rtl8168_mdio_write(tp, 0x19, 0x6c08);
+        rtl8168_mdio_write(tp, 0x15, 0x0394);
+        rtl8168_mdio_write(tp, 0x19, 0x9df9);
+        rtl8168_mdio_write(tp, 0x15, 0x0395);
+        rtl8168_mdio_write(tp, 0x19, 0x6c08);
+        rtl8168_mdio_write(tp, 0x15, 0x0396);
+        rtl8168_mdio_write(tp, 0x19, 0x3397);
+        rtl8168_mdio_write(tp, 0x15, 0x0399);
+        rtl8168_mdio_write(tp, 0x19, 0x6810);
+        rtl8168_mdio_write(tp, 0x15, 0x03a4);
+        rtl8168_mdio_write(tp, 0x19, 0x7c08);
+        rtl8168_mdio_write(tp, 0x15, 0x03a5);
+        rtl8168_mdio_write(tp, 0x19, 0x8203);
+        rtl8168_mdio_write(tp, 0x15, 0x03a6);
+        rtl8168_mdio_write(tp, 0x19, 0x4d08);
+        rtl8168_mdio_write(tp, 0x15, 0x03a7);
+        rtl8168_mdio_write(tp, 0x19, 0x33a9);
+        rtl8168_mdio_write(tp, 0x15, 0x03a8);
+        rtl8168_mdio_write(tp, 0x19, 0x4d00);
+        rtl8168_mdio_write(tp, 0x15, 0x03a9);
+        rtl8168_mdio_write(tp, 0x19, 0x9bfa);
+        rtl8168_mdio_write(tp, 0x15, 0x03aa);
+        rtl8168_mdio_write(tp, 0x19, 0x33b6);
+        rtl8168_mdio_write(tp, 0x15, 0x03bb);
+        rtl8168_mdio_write(tp, 0x19, 0x4056);
+        rtl8168_mdio_write(tp, 0x15, 0x03bc);
+        rtl8168_mdio_write(tp, 0x19, 0x44e9);
+        rtl8168_mdio_write(tp, 0x15, 0x03bd);
+        rtl8168_mdio_write(tp, 0x19, 0x405e);
+        rtl8168_mdio_write(tp, 0x15, 0x03be);
+        rtl8168_mdio_write(tp, 0x19, 0x44f8);
+        rtl8168_mdio_write(tp, 0x15, 0x03bf);
+        rtl8168_mdio_write(tp, 0x19, 0xd64f);
+        rtl8168_mdio_write(tp, 0x15, 0x03c0);
+        rtl8168_mdio_write(tp, 0x19, 0x0037);
+        rtl8168_mdio_write(tp, 0x15, 0x03c1);
+        rtl8168_mdio_write(tp, 0x19, 0xbd37);
+        rtl8168_mdio_write(tp, 0x15, 0x03c2);
+        rtl8168_mdio_write(tp, 0x19, 0x9cfd);
+        rtl8168_mdio_write(tp, 0x15, 0x03c3);
+        rtl8168_mdio_write(tp, 0x19, 0xc639);
+        rtl8168_mdio_write(tp, 0x15, 0x03c4);
+        rtl8168_mdio_write(tp, 0x19, 0x0011);
+        rtl8168_mdio_write(tp, 0x15, 0x03c5);
+        rtl8168_mdio_write(tp, 0x19, 0x9b03);
+        rtl8168_mdio_write(tp, 0x15, 0x03c6);
+        rtl8168_mdio_write(tp, 0x19, 0x7c01);
+        rtl8168_mdio_write(tp, 0x15, 0x03c7);
+        rtl8168_mdio_write(tp, 0x19, 0x4c01);
+        rtl8168_mdio_write(tp, 0x15, 0x03c8);
+        rtl8168_mdio_write(tp, 0x19, 0x9e03);
+        rtl8168_mdio_write(tp, 0x15, 0x03c9);
+        rtl8168_mdio_write(tp, 0x19, 0x7c20);
+        rtl8168_mdio_write(tp, 0x15, 0x03ca);
+        rtl8168_mdio_write(tp, 0x19, 0x4c20);
+        rtl8168_mdio_write(tp, 0x15, 0x03cb);
+        rtl8168_mdio_write(tp, 0x19, 0x9af4);
+        rtl8168_mdio_write(tp, 0x15, 0x03cc);
+        rtl8168_mdio_write(tp, 0x19, 0x7c12);
+        rtl8168_mdio_write(tp, 0x15, 0x03cd);
+        rtl8168_mdio_write(tp, 0x19, 0x4c52);
+        rtl8168_mdio_write(tp, 0x15, 0x03ce);
+        rtl8168_mdio_write(tp, 0x19, 0x4470);
+        rtl8168_mdio_write(tp, 0x15, 0x03cf);
+        rtl8168_mdio_write(tp, 0x19, 0x7c12);
+        rtl8168_mdio_write(tp, 0x15, 0x03d0);
+        rtl8168_mdio_write(tp, 0x19, 0x4c40);
+        rtl8168_mdio_write(tp, 0x15, 0x03d1);
+        rtl8168_mdio_write(tp, 0x19, 0x33bf);
+        rtl8168_mdio_write(tp, 0x15, 0x03d6);
+        rtl8168_mdio_write(tp, 0x19, 0x4047);
+        rtl8168_mdio_write(tp, 0x15, 0x03d7);
+        rtl8168_mdio_write(tp, 0x19, 0x4469);
+        rtl8168_mdio_write(tp, 0x15, 0x03d8);
+        rtl8168_mdio_write(tp, 0x19, 0x492b);
+        rtl8168_mdio_write(tp, 0x15, 0x03d9);
+        rtl8168_mdio_write(tp, 0x19, 0x4479);
+        rtl8168_mdio_write(tp, 0x15, 0x03da);
+        rtl8168_mdio_write(tp, 0x19, 0x7c09);
+        rtl8168_mdio_write(tp, 0x15, 0x03db);
+        rtl8168_mdio_write(tp, 0x19, 0x8203);
+        rtl8168_mdio_write(tp, 0x15, 0x03dc);
+        rtl8168_mdio_write(tp, 0x19, 0x4d48);
+        rtl8168_mdio_write(tp, 0x15, 0x03dd);
+        rtl8168_mdio_write(tp, 0x19, 0x33df);
+        rtl8168_mdio_write(tp, 0x15, 0x03de);
+        rtl8168_mdio_write(tp, 0x19, 0x4d40);
+        rtl8168_mdio_write(tp, 0x15, 0x03df);
+        rtl8168_mdio_write(tp, 0x19, 0xd64f);
+        rtl8168_mdio_write(tp, 0x15, 0x03e0);
+        rtl8168_mdio_write(tp, 0x19, 0x0017);
+        rtl8168_mdio_write(tp, 0x15, 0x03e1);
+        rtl8168_mdio_write(tp, 0x19, 0xbd17);
+        rtl8168_mdio_write(tp, 0x15, 0x03e2);
+        rtl8168_mdio_write(tp, 0x19, 0x9b03);
+        rtl8168_mdio_write(tp, 0x15, 0x03e3);
+        rtl8168_mdio_write(tp, 0x19, 0x7c20);
+        rtl8168_mdio_write(tp, 0x15, 0x03e4);
+        rtl8168_mdio_write(tp, 0x19, 0x4c20);
+        rtl8168_mdio_write(tp, 0x15, 0x03e5);
+        rtl8168_mdio_write(tp, 0x19, 0x88f5);
+        rtl8168_mdio_write(tp, 0x15, 0x03e6);
+        rtl8168_mdio_write(tp, 0x19, 0xc428);
+        rtl8168_mdio_write(tp, 0x15, 0x03e7);
+        rtl8168_mdio_write(tp, 0x19, 0x0008);
+        rtl8168_mdio_write(tp, 0x15, 0x03e8);
+        rtl8168_mdio_write(tp, 0x19, 0x9af2);
+        rtl8168_mdio_write(tp, 0x15, 0x03e9);
+        rtl8168_mdio_write(tp, 0x19, 0x7c12);
+        rtl8168_mdio_write(tp, 0x15, 0x03ea);
+        rtl8168_mdio_write(tp, 0x19, 0x4c52);
+        rtl8168_mdio_write(tp, 0x15, 0x03eb);
+        rtl8168_mdio_write(tp, 0x19, 0x4470);
+        rtl8168_mdio_write(tp, 0x15, 0x03ec);
+        rtl8168_mdio_write(tp, 0x19, 0x7c12);
+        rtl8168_mdio_write(tp, 0x15, 0x03ed);
+        rtl8168_mdio_write(tp, 0x19, 0x4c40);
+        rtl8168_mdio_write(tp, 0x15, 0x03ee);
+        rtl8168_mdio_write(tp, 0x19, 0x33da);
+        rtl8168_mdio_write(tp, 0x15, 0x03ef);
+        rtl8168_mdio_write(tp, 0x19, 0x3312);
+        rtl8168_mdio_write(tp, 0x16, 0x0306);
+        rtl8168_mdio_write(tp, 0x16, 0x0300);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x17, 0x2179);
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1e, 0x0040);
+        rtl8168_mdio_write(tp, 0x18, 0x0645);
+        rtl8168_mdio_write(tp, 0x19, 0xe200);
+        rtl8168_mdio_write(tp, 0x18, 0x0655);
+        rtl8168_mdio_write(tp, 0x19, 0x9000);
+        rtl8168_mdio_write(tp, 0x18, 0x0d05);
+        rtl8168_mdio_write(tp, 0x19, 0xbe00);
+        rtl8168_mdio_write(tp, 0x18, 0x0d15);
+        rtl8168_mdio_write(tp, 0x19, 0xd300);
+        rtl8168_mdio_write(tp, 0x18, 0x0d25);
+        rtl8168_mdio_write(tp, 0x19, 0xfe00);
+        rtl8168_mdio_write(tp, 0x18, 0x0d35);
+        rtl8168_mdio_write(tp, 0x19, 0x4000);
+        rtl8168_mdio_write(tp, 0x18, 0x0d45);
+        rtl8168_mdio_write(tp, 0x19, 0x7f00);
+        rtl8168_mdio_write(tp, 0x18, 0x0d55);
+        rtl8168_mdio_write(tp, 0x19, 0x1000);
+        rtl8168_mdio_write(tp, 0x18, 0x0d65);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x18, 0x0d75);
+        rtl8168_mdio_write(tp, 0x19, 0x8200);
+        rtl8168_mdio_write(tp, 0x18, 0x0d85);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x18, 0x0d95);
+        rtl8168_mdio_write(tp, 0x19, 0x7000);
+        rtl8168_mdio_write(tp, 0x18, 0x0da5);
+        rtl8168_mdio_write(tp, 0x19, 0x0f00);
+        rtl8168_mdio_write(tp, 0x18, 0x0db5);
+        rtl8168_mdio_write(tp, 0x19, 0x0100);
+        rtl8168_mdio_write(tp, 0x18, 0x0dc5);
+        rtl8168_mdio_write(tp, 0x19, 0x9b00);
+        rtl8168_mdio_write(tp, 0x18, 0x0dd5);
+        rtl8168_mdio_write(tp, 0x19, 0x7f00);
+        rtl8168_mdio_write(tp, 0x18, 0x0de5);
+        rtl8168_mdio_write(tp, 0x19, 0xe000);
+        rtl8168_mdio_write(tp, 0x18, 0x0df5);
+        rtl8168_mdio_write(tp, 0x19, 0xef00);
+        rtl8168_mdio_write(tp, 0x18, 0x16d5);
+        rtl8168_mdio_write(tp, 0x19, 0xe200);
+        rtl8168_mdio_write(tp, 0x18, 0x16e5);
+        rtl8168_mdio_write(tp, 0x19, 0xab00);
+        rtl8168_mdio_write(tp, 0x18, 0x2904);
+        rtl8168_mdio_write(tp, 0x19, 0x4000);
+        rtl8168_mdio_write(tp, 0x18, 0x2914);
+        rtl8168_mdio_write(tp, 0x19, 0x7f00);
+        rtl8168_mdio_write(tp, 0x18, 0x2924);
+        rtl8168_mdio_write(tp, 0x19, 0x0100);
+        rtl8168_mdio_write(tp, 0x18, 0x2934);
+        rtl8168_mdio_write(tp, 0x19, 0x2000);
+        rtl8168_mdio_write(tp, 0x18, 0x2944);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x18, 0x2954);
+        rtl8168_mdio_write(tp, 0x19, 0x4600);
+        rtl8168_mdio_write(tp, 0x18, 0x2964);
+        rtl8168_mdio_write(tp, 0x19, 0xfc00);
+        rtl8168_mdio_write(tp, 0x18, 0x2974);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x18, 0x2984);
+        rtl8168_mdio_write(tp, 0x19, 0x5000);
+        rtl8168_mdio_write(tp, 0x18, 0x2994);
+        rtl8168_mdio_write(tp, 0x19, 0x9d00);
+        rtl8168_mdio_write(tp, 0x18, 0x29a4);
+        rtl8168_mdio_write(tp, 0x19, 0xff00);
+        rtl8168_mdio_write(tp, 0x18, 0x29b4);
+        rtl8168_mdio_write(tp, 0x19, 0x4000);
+        rtl8168_mdio_write(tp, 0x18, 0x29c4);
+        rtl8168_mdio_write(tp, 0x19, 0x7f00);
+        rtl8168_mdio_write(tp, 0x18, 0x29d4);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x18, 0x29e4);
+        rtl8168_mdio_write(tp, 0x19, 0x2000);
+        rtl8168_mdio_write(tp, 0x18, 0x29f4);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x18, 0x2a04);
+        rtl8168_mdio_write(tp, 0x19, 0xe600);
+        rtl8168_mdio_write(tp, 0x18, 0x2a14);
+        rtl8168_mdio_write(tp, 0x19, 0xff00);
+        rtl8168_mdio_write(tp, 0x18, 0x2a24);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x18, 0x2a34);
+        rtl8168_mdio_write(tp, 0x19, 0x5000);
+        rtl8168_mdio_write(tp, 0x18, 0x2a44);
+        rtl8168_mdio_write(tp, 0x19, 0x8500);
+        rtl8168_mdio_write(tp, 0x18, 0x2a54);
+        rtl8168_mdio_write(tp, 0x19, 0x7f00);
+        rtl8168_mdio_write(tp, 0x18, 0x2a64);
+        rtl8168_mdio_write(tp, 0x19, 0xac00);
+        rtl8168_mdio_write(tp, 0x18, 0x2a74);
+        rtl8168_mdio_write(tp, 0x19, 0x0800);
+        rtl8168_mdio_write(tp, 0x18, 0x2a84);
+        rtl8168_mdio_write(tp, 0x19, 0xfc00);
+        rtl8168_mdio_write(tp, 0x18, 0x2a94);
+        rtl8168_mdio_write(tp, 0x19, 0xe000);
+        rtl8168_mdio_write(tp, 0x18, 0x2aa4);
+        rtl8168_mdio_write(tp, 0x19, 0x7400);
+        rtl8168_mdio_write(tp, 0x18, 0x2ab4);
+        rtl8168_mdio_write(tp, 0x19, 0x4000);
+        rtl8168_mdio_write(tp, 0x18, 0x2ac4);
+        rtl8168_mdio_write(tp, 0x19, 0x7f00);
+        rtl8168_mdio_write(tp, 0x18, 0x2ad4);
+        rtl8168_mdio_write(tp, 0x19, 0x0100);
+        rtl8168_mdio_write(tp, 0x18, 0x2ae4);
+        rtl8168_mdio_write(tp, 0x19, 0xff00);
+        rtl8168_mdio_write(tp, 0x18, 0x2af4);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x18, 0x2b04);
+        rtl8168_mdio_write(tp, 0x19, 0x4400);
+        rtl8168_mdio_write(tp, 0x18, 0x2b14);
+        rtl8168_mdio_write(tp, 0x19, 0xfc00);
+        rtl8168_mdio_write(tp, 0x18, 0x2b24);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x18, 0x2b34);
+        rtl8168_mdio_write(tp, 0x19, 0x4000);
+        rtl8168_mdio_write(tp, 0x18, 0x2b44);
+        rtl8168_mdio_write(tp, 0x19, 0x9d00);
+        rtl8168_mdio_write(tp, 0x18, 0x2b54);
+        rtl8168_mdio_write(tp, 0x19, 0xff00);
+        rtl8168_mdio_write(tp, 0x18, 0x2b64);
+        rtl8168_mdio_write(tp, 0x19, 0x4000);
+        rtl8168_mdio_write(tp, 0x18, 0x2b74);
+        rtl8168_mdio_write(tp, 0x19, 0x7f00);
+        rtl8168_mdio_write(tp, 0x18, 0x2b84);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x18, 0x2b94);
+        rtl8168_mdio_write(tp, 0x19, 0xff00);
+        rtl8168_mdio_write(tp, 0x18, 0x2ba4);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x18, 0x2bb4);
+        rtl8168_mdio_write(tp, 0x19, 0xfc00);
+        rtl8168_mdio_write(tp, 0x18, 0x2bc4);
+        rtl8168_mdio_write(tp, 0x19, 0xff00);
+        rtl8168_mdio_write(tp, 0x18, 0x2bd4);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x18, 0x2be4);
+        rtl8168_mdio_write(tp, 0x19, 0x4000);
+        rtl8168_mdio_write(tp, 0x18, 0x2bf4);
+        rtl8168_mdio_write(tp, 0x19, 0x8900);
+        rtl8168_mdio_write(tp, 0x18, 0x2c04);
+        rtl8168_mdio_write(tp, 0x19, 0x8300);
+        rtl8168_mdio_write(tp, 0x18, 0x2c14);
+        rtl8168_mdio_write(tp, 0x19, 0xe000);
+        rtl8168_mdio_write(tp, 0x18, 0x2c24);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x18, 0x2c34);
+        rtl8168_mdio_write(tp, 0x19, 0xac00);
+        rtl8168_mdio_write(tp, 0x18, 0x2c44);
+        rtl8168_mdio_write(tp, 0x19, 0x0800);
+        rtl8168_mdio_write(tp, 0x18, 0x2c54);
+        rtl8168_mdio_write(tp, 0x19, 0xfa00);
+        rtl8168_mdio_write(tp, 0x18, 0x2c64);
+        rtl8168_mdio_write(tp, 0x19, 0xe100);
+        rtl8168_mdio_write(tp, 0x18, 0x2c74);
+        rtl8168_mdio_write(tp, 0x19, 0x7f00);
+        rtl8168_mdio_write(tp, 0x18, 0x0001);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x17, 0x2100);
+        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+        rtl8168_mdio_write(tp, 0x05, 0xfff6);
+        rtl8168_mdio_write(tp, 0x06, 0x0080);
+        rtl8168_mdio_write(tp, 0x05, 0x8b88);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x05, 0x8000);
+        rtl8168_mdio_write(tp, 0x06, 0xd480);
+        rtl8168_mdio_write(tp, 0x06, 0xc1e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b9a);
+        rtl8168_mdio_write(tp, 0x06, 0xe58b);
+        rtl8168_mdio_write(tp, 0x06, 0x9bee);
+        rtl8168_mdio_write(tp, 0x06, 0x8b83);
+        rtl8168_mdio_write(tp, 0x06, 0x41bf);
+        rtl8168_mdio_write(tp, 0x06, 0x8b88);
+        rtl8168_mdio_write(tp, 0x06, 0xec00);
+        rtl8168_mdio_write(tp, 0x06, 0x19a9);
+        rtl8168_mdio_write(tp, 0x06, 0x8b90);
+        rtl8168_mdio_write(tp, 0x06, 0xf9ee);
+        rtl8168_mdio_write(tp, 0x06, 0xfff6);
+        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+        rtl8168_mdio_write(tp, 0x06, 0xfff7);
+        rtl8168_mdio_write(tp, 0x06, 0xffe0);
+        rtl8168_mdio_write(tp, 0x06, 0xe140);
+        rtl8168_mdio_write(tp, 0x06, 0xe1e1);
+        rtl8168_mdio_write(tp, 0x06, 0x41f7);
+        rtl8168_mdio_write(tp, 0x06, 0x2ff6);
+        rtl8168_mdio_write(tp, 0x06, 0x28e4);
+        rtl8168_mdio_write(tp, 0x06, 0xe140);
+        rtl8168_mdio_write(tp, 0x06, 0xe5e1);
+        rtl8168_mdio_write(tp, 0x06, 0x41f7);
+        rtl8168_mdio_write(tp, 0x06, 0x0002);
+        rtl8168_mdio_write(tp, 0x06, 0x020c);
+        rtl8168_mdio_write(tp, 0x06, 0x0202);
+        rtl8168_mdio_write(tp, 0x06, 0x1d02);
+        rtl8168_mdio_write(tp, 0x06, 0x0230);
+        rtl8168_mdio_write(tp, 0x06, 0x0202);
+        rtl8168_mdio_write(tp, 0x06, 0x4002);
+        rtl8168_mdio_write(tp, 0x06, 0x028b);
+        rtl8168_mdio_write(tp, 0x06, 0x0280);
+        rtl8168_mdio_write(tp, 0x06, 0x6c02);
+        rtl8168_mdio_write(tp, 0x06, 0x8085);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x88e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b89);
+        rtl8168_mdio_write(tp, 0x06, 0x1e01);
+        rtl8168_mdio_write(tp, 0x06, 0xe18b);
+        rtl8168_mdio_write(tp, 0x06, 0x8a1e);
+        rtl8168_mdio_write(tp, 0x06, 0x01e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8b);
+        rtl8168_mdio_write(tp, 0x06, 0x1e01);
+        rtl8168_mdio_write(tp, 0x06, 0xe18b);
+        rtl8168_mdio_write(tp, 0x06, 0x8c1e);
+        rtl8168_mdio_write(tp, 0x06, 0x01e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
+        rtl8168_mdio_write(tp, 0x06, 0x1e01);
+        rtl8168_mdio_write(tp, 0x06, 0xe18b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e1e);
+        rtl8168_mdio_write(tp, 0x06, 0x01a0);
+        rtl8168_mdio_write(tp, 0x06, 0x00c7);
+        rtl8168_mdio_write(tp, 0x06, 0xaec3);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
+        rtl8168_mdio_write(tp, 0x06, 0xad20);
+        rtl8168_mdio_write(tp, 0x06, 0x10ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
+        rtl8168_mdio_write(tp, 0x06, 0x0002);
+        rtl8168_mdio_write(tp, 0x06, 0x1310);
+        rtl8168_mdio_write(tp, 0x06, 0x021f);
+        rtl8168_mdio_write(tp, 0x06, 0x9d02);
+        rtl8168_mdio_write(tp, 0x06, 0x1f0c);
+        rtl8168_mdio_write(tp, 0x06, 0x0227);
+        rtl8168_mdio_write(tp, 0x06, 0x49fc);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ead);
+        rtl8168_mdio_write(tp, 0x06, 0x200b);
+        rtl8168_mdio_write(tp, 0x06, 0xf620);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e02);
+        rtl8168_mdio_write(tp, 0x06, 0x830e);
+        rtl8168_mdio_write(tp, 0x06, 0x021b);
+        rtl8168_mdio_write(tp, 0x06, 0x67ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2211);
+        rtl8168_mdio_write(tp, 0x06, 0xf622);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e02);
+        rtl8168_mdio_write(tp, 0x06, 0x2ba5);
+        rtl8168_mdio_write(tp, 0x06, 0x022a);
+        rtl8168_mdio_write(tp, 0x06, 0x2402);
+        rtl8168_mdio_write(tp, 0x06, 0x80c6);
+        rtl8168_mdio_write(tp, 0x06, 0x022a);
+        rtl8168_mdio_write(tp, 0x06, 0xf0ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2511);
+        rtl8168_mdio_write(tp, 0x06, 0xf625);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e02);
+        rtl8168_mdio_write(tp, 0x06, 0x8226);
+        rtl8168_mdio_write(tp, 0x06, 0x0204);
+        rtl8168_mdio_write(tp, 0x06, 0x0302);
+        rtl8168_mdio_write(tp, 0x06, 0x19cc);
+        rtl8168_mdio_write(tp, 0x06, 0x022b);
+        rtl8168_mdio_write(tp, 0x06, 0x5bfc);
+        rtl8168_mdio_write(tp, 0x06, 0x04ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
+        rtl8168_mdio_write(tp, 0x06, 0x0105);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b83);
+        rtl8168_mdio_write(tp, 0x06, 0xad24);
+        rtl8168_mdio_write(tp, 0x06, 0x44e0);
+        rtl8168_mdio_write(tp, 0x06, 0xe022);
+        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+        rtl8168_mdio_write(tp, 0x06, 0x23ad);
+        rtl8168_mdio_write(tp, 0x06, 0x223b);
+        rtl8168_mdio_write(tp, 0x06, 0xe08a);
+        rtl8168_mdio_write(tp, 0x06, 0xbea0);
+        rtl8168_mdio_write(tp, 0x06, 0x0005);
+        rtl8168_mdio_write(tp, 0x06, 0x0228);
+        rtl8168_mdio_write(tp, 0x06, 0xdeae);
+        rtl8168_mdio_write(tp, 0x06, 0x42a0);
+        rtl8168_mdio_write(tp, 0x06, 0x0105);
+        rtl8168_mdio_write(tp, 0x06, 0x0228);
+        rtl8168_mdio_write(tp, 0x06, 0xf1ae);
+        rtl8168_mdio_write(tp, 0x06, 0x3aa0);
+        rtl8168_mdio_write(tp, 0x06, 0x0205);
+        rtl8168_mdio_write(tp, 0x06, 0x0281);
+        rtl8168_mdio_write(tp, 0x06, 0x25ae);
+        rtl8168_mdio_write(tp, 0x06, 0x32a0);
+        rtl8168_mdio_write(tp, 0x06, 0x0305);
+        rtl8168_mdio_write(tp, 0x06, 0x0229);
+        rtl8168_mdio_write(tp, 0x06, 0x9aae);
+        rtl8168_mdio_write(tp, 0x06, 0x2aa0);
+        rtl8168_mdio_write(tp, 0x06, 0x0405);
+        rtl8168_mdio_write(tp, 0x06, 0x0229);
+        rtl8168_mdio_write(tp, 0x06, 0xaeae);
+        rtl8168_mdio_write(tp, 0x06, 0x22a0);
+        rtl8168_mdio_write(tp, 0x06, 0x0505);
+        rtl8168_mdio_write(tp, 0x06, 0x0229);
+        rtl8168_mdio_write(tp, 0x06, 0xd7ae);
+        rtl8168_mdio_write(tp, 0x06, 0x1aa0);
+        rtl8168_mdio_write(tp, 0x06, 0x0605);
+        rtl8168_mdio_write(tp, 0x06, 0x0229);
+        rtl8168_mdio_write(tp, 0x06, 0xfeae);
+        rtl8168_mdio_write(tp, 0x06, 0x12ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac0);
+        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac1);
+        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac6);
+        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8abe);
+        rtl8168_mdio_write(tp, 0x06, 0x00ae);
+        rtl8168_mdio_write(tp, 0x06, 0x00fc);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0x022a);
+        rtl8168_mdio_write(tp, 0x06, 0x67e0);
+        rtl8168_mdio_write(tp, 0x06, 0xe022);
+        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+        rtl8168_mdio_write(tp, 0x06, 0x230d);
+        rtl8168_mdio_write(tp, 0x06, 0x0658);
+        rtl8168_mdio_write(tp, 0x06, 0x03a0);
+        rtl8168_mdio_write(tp, 0x06, 0x0202);
+        rtl8168_mdio_write(tp, 0x06, 0xae2d);
+        rtl8168_mdio_write(tp, 0x06, 0xa001);
+        rtl8168_mdio_write(tp, 0x06, 0x02ae);
+        rtl8168_mdio_write(tp, 0x06, 0x2da0);
+        rtl8168_mdio_write(tp, 0x06, 0x004d);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e2);
+        rtl8168_mdio_write(tp, 0x06, 0x00e1);
+        rtl8168_mdio_write(tp, 0x06, 0xe201);
+        rtl8168_mdio_write(tp, 0x06, 0xad24);
+        rtl8168_mdio_write(tp, 0x06, 0x44e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac2);
+        rtl8168_mdio_write(tp, 0x06, 0xe48a);
+        rtl8168_mdio_write(tp, 0x06, 0xc4e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac3);
+        rtl8168_mdio_write(tp, 0x06, 0xe48a);
+        rtl8168_mdio_write(tp, 0x06, 0xc5ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8abe);
+        rtl8168_mdio_write(tp, 0x06, 0x03e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b83);
+        rtl8168_mdio_write(tp, 0x06, 0xad25);
+        rtl8168_mdio_write(tp, 0x06, 0x3aee);
+        rtl8168_mdio_write(tp, 0x06, 0x8abe);
+        rtl8168_mdio_write(tp, 0x06, 0x05ae);
+        rtl8168_mdio_write(tp, 0x06, 0x34e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8ace);
+        rtl8168_mdio_write(tp, 0x06, 0xae03);
+        rtl8168_mdio_write(tp, 0x06, 0xe08a);
+        rtl8168_mdio_write(tp, 0x06, 0xcfe1);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac2);
+        rtl8168_mdio_write(tp, 0x06, 0x4905);
+        rtl8168_mdio_write(tp, 0x06, 0xe58a);
+        rtl8168_mdio_write(tp, 0x06, 0xc4e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac3);
+        rtl8168_mdio_write(tp, 0x06, 0x4905);
+        rtl8168_mdio_write(tp, 0x06, 0xe58a);
+        rtl8168_mdio_write(tp, 0x06, 0xc5ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8abe);
+        rtl8168_mdio_write(tp, 0x06, 0x0502);
+        rtl8168_mdio_write(tp, 0x06, 0x2ab6);
+        rtl8168_mdio_write(tp, 0x06, 0xac20);
+        rtl8168_mdio_write(tp, 0x06, 0x1202);
+        rtl8168_mdio_write(tp, 0x06, 0x819b);
+        rtl8168_mdio_write(tp, 0x06, 0xac20);
+        rtl8168_mdio_write(tp, 0x06, 0x0cee);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac1);
+        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac6);
+        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8abe);
+        rtl8168_mdio_write(tp, 0x06, 0x02fc);
+        rtl8168_mdio_write(tp, 0x06, 0x04d0);
+        rtl8168_mdio_write(tp, 0x06, 0x0002);
+        rtl8168_mdio_write(tp, 0x06, 0x81ad);
+        rtl8168_mdio_write(tp, 0x06, 0x590f);
+        rtl8168_mdio_write(tp, 0x06, 0x3902);
+        rtl8168_mdio_write(tp, 0x06, 0xaa04);
+        rtl8168_mdio_write(tp, 0x06, 0xd001);
+        rtl8168_mdio_write(tp, 0x06, 0xae02);
+        rtl8168_mdio_write(tp, 0x06, 0xd000);
+        rtl8168_mdio_write(tp, 0x06, 0x04f9);
+        rtl8168_mdio_write(tp, 0x06, 0xfae2);
+        rtl8168_mdio_write(tp, 0x06, 0xe2d2);
+        rtl8168_mdio_write(tp, 0x06, 0xe3e2);
+        rtl8168_mdio_write(tp, 0x06, 0xd3f9);
+        rtl8168_mdio_write(tp, 0x06, 0x5af7);
+        rtl8168_mdio_write(tp, 0x06, 0xe6e2);
+        rtl8168_mdio_write(tp, 0x06, 0xd2e7);
+        rtl8168_mdio_write(tp, 0x06, 0xe2d3);
+        rtl8168_mdio_write(tp, 0x06, 0xe2e0);
+        rtl8168_mdio_write(tp, 0x06, 0x2ce3);
+        rtl8168_mdio_write(tp, 0x06, 0xe02d);
+        rtl8168_mdio_write(tp, 0x06, 0xf95b);
+        rtl8168_mdio_write(tp, 0x06, 0xe01e);
+        rtl8168_mdio_write(tp, 0x06, 0x30e6);
+        rtl8168_mdio_write(tp, 0x06, 0xe02c);
+        rtl8168_mdio_write(tp, 0x06, 0xe7e0);
+        rtl8168_mdio_write(tp, 0x06, 0x2de2);
+        rtl8168_mdio_write(tp, 0x06, 0xe2cc);
+        rtl8168_mdio_write(tp, 0x06, 0xe3e2);
+        rtl8168_mdio_write(tp, 0x06, 0xcdf9);
+        rtl8168_mdio_write(tp, 0x06, 0x5a0f);
+        rtl8168_mdio_write(tp, 0x06, 0x6a50);
+        rtl8168_mdio_write(tp, 0x06, 0xe6e2);
+        rtl8168_mdio_write(tp, 0x06, 0xcce7);
+        rtl8168_mdio_write(tp, 0x06, 0xe2cd);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+        rtl8168_mdio_write(tp, 0x06, 0x3ce1);
+        rtl8168_mdio_write(tp, 0x06, 0xe03d);
+        rtl8168_mdio_write(tp, 0x06, 0xef64);
+        rtl8168_mdio_write(tp, 0x06, 0xfde0);
+        rtl8168_mdio_write(tp, 0x06, 0xe2cc);
+        rtl8168_mdio_write(tp, 0x06, 0xe1e2);
+        rtl8168_mdio_write(tp, 0x06, 0xcd58);
+        rtl8168_mdio_write(tp, 0x06, 0x0f5a);
+        rtl8168_mdio_write(tp, 0x06, 0xf01e);
+        rtl8168_mdio_write(tp, 0x06, 0x02e4);
+        rtl8168_mdio_write(tp, 0x06, 0xe2cc);
+        rtl8168_mdio_write(tp, 0x06, 0xe5e2);
+        rtl8168_mdio_write(tp, 0x06, 0xcdfd);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+        rtl8168_mdio_write(tp, 0x06, 0x2ce1);
+        rtl8168_mdio_write(tp, 0x06, 0xe02d);
+        rtl8168_mdio_write(tp, 0x06, 0x59e0);
+        rtl8168_mdio_write(tp, 0x06, 0x5b1f);
+        rtl8168_mdio_write(tp, 0x06, 0x1e13);
+        rtl8168_mdio_write(tp, 0x06, 0xe4e0);
+        rtl8168_mdio_write(tp, 0x06, 0x2ce5);
+        rtl8168_mdio_write(tp, 0x06, 0xe02d);
+        rtl8168_mdio_write(tp, 0x06, 0xfde0);
+        rtl8168_mdio_write(tp, 0x06, 0xe2d2);
+        rtl8168_mdio_write(tp, 0x06, 0xe1e2);
+        rtl8168_mdio_write(tp, 0x06, 0xd358);
+        rtl8168_mdio_write(tp, 0x06, 0xf75a);
+        rtl8168_mdio_write(tp, 0x06, 0x081e);
+        rtl8168_mdio_write(tp, 0x06, 0x02e4);
+        rtl8168_mdio_write(tp, 0x06, 0xe2d2);
+        rtl8168_mdio_write(tp, 0x06, 0xe5e2);
+        rtl8168_mdio_write(tp, 0x06, 0xd3ef);
+        rtl8168_mdio_write(tp, 0x06, 0x46fe);
+        rtl8168_mdio_write(tp, 0x06, 0xfd04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x06, 0xfaef);
+        rtl8168_mdio_write(tp, 0x06, 0x69e0);
+        rtl8168_mdio_write(tp, 0x06, 0xe022);
+        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+        rtl8168_mdio_write(tp, 0x06, 0x2358);
+        rtl8168_mdio_write(tp, 0x06, 0xc4e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b6e);
+        rtl8168_mdio_write(tp, 0x06, 0x1f10);
+        rtl8168_mdio_write(tp, 0x06, 0x9e58);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x6ead);
+        rtl8168_mdio_write(tp, 0x06, 0x2222);
+        rtl8168_mdio_write(tp, 0x06, 0xac27);
+        rtl8168_mdio_write(tp, 0x06, 0x55ac);
+        rtl8168_mdio_write(tp, 0x06, 0x2602);
+        rtl8168_mdio_write(tp, 0x06, 0xae1a);
+        rtl8168_mdio_write(tp, 0x06, 0xd106);
+        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
+        rtl8168_mdio_write(tp, 0x06, 0xba02);
+        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
+        rtl8168_mdio_write(tp, 0x06, 0xd107);
+        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
+        rtl8168_mdio_write(tp, 0x06, 0xbd02);
+        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
+        rtl8168_mdio_write(tp, 0x06, 0xd107);
+        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
+        rtl8168_mdio_write(tp, 0x06, 0xc002);
+        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
+        rtl8168_mdio_write(tp, 0x06, 0xae30);
+        rtl8168_mdio_write(tp, 0x06, 0xd103);
+        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
+        rtl8168_mdio_write(tp, 0x06, 0xc302);
+        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
+        rtl8168_mdio_write(tp, 0x06, 0xd100);
+        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
+        rtl8168_mdio_write(tp, 0x06, 0xc602);
+        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
+        rtl8168_mdio_write(tp, 0x06, 0xd100);
+        rtl8168_mdio_write(tp, 0x06, 0xbf82);
+        rtl8168_mdio_write(tp, 0x06, 0xca02);
+        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
+        rtl8168_mdio_write(tp, 0x06, 0xd10f);
+        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
+        rtl8168_mdio_write(tp, 0x06, 0xba02);
+        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
+        rtl8168_mdio_write(tp, 0x06, 0xd101);
+        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
+        rtl8168_mdio_write(tp, 0x06, 0xbd02);
+        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
+        rtl8168_mdio_write(tp, 0x06, 0xd101);
+        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
+        rtl8168_mdio_write(tp, 0x06, 0xc002);
+        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
+        rtl8168_mdio_write(tp, 0x06, 0xef96);
+        rtl8168_mdio_write(tp, 0x06, 0xfefd);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xd100);
+        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
+        rtl8168_mdio_write(tp, 0x06, 0xc302);
+        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
+        rtl8168_mdio_write(tp, 0x06, 0xd011);
+        rtl8168_mdio_write(tp, 0x06, 0x022b);
+        rtl8168_mdio_write(tp, 0x06, 0xfb59);
+        rtl8168_mdio_write(tp, 0x06, 0x03ef);
+        rtl8168_mdio_write(tp, 0x06, 0x01d1);
+        rtl8168_mdio_write(tp, 0x06, 0x00a0);
+        rtl8168_mdio_write(tp, 0x06, 0x0002);
+        rtl8168_mdio_write(tp, 0x06, 0xd101);
+        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
+        rtl8168_mdio_write(tp, 0x06, 0xc602);
+        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
+        rtl8168_mdio_write(tp, 0x06, 0xd111);
+        rtl8168_mdio_write(tp, 0x06, 0xad20);
+        rtl8168_mdio_write(tp, 0x06, 0x020c);
+        rtl8168_mdio_write(tp, 0x06, 0x11ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2102);
+        rtl8168_mdio_write(tp, 0x06, 0x0c12);
+        rtl8168_mdio_write(tp, 0x06, 0xbf82);
+        rtl8168_mdio_write(tp, 0x06, 0xca02);
+        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
+        rtl8168_mdio_write(tp, 0x06, 0xaec8);
+        rtl8168_mdio_write(tp, 0x06, 0x70e4);
+        rtl8168_mdio_write(tp, 0x06, 0x2602);
+        rtl8168_mdio_write(tp, 0x06, 0x82d1);
+        rtl8168_mdio_write(tp, 0x06, 0x05f8);
+        rtl8168_mdio_write(tp, 0x06, 0xfaef);
+        rtl8168_mdio_write(tp, 0x06, 0x69e0);
+        rtl8168_mdio_write(tp, 0x06, 0xe2fe);
+        rtl8168_mdio_write(tp, 0x06, 0xe1e2);
+        rtl8168_mdio_write(tp, 0x06, 0xffad);
+        rtl8168_mdio_write(tp, 0x06, 0x2d1a);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e1);
+        rtl8168_mdio_write(tp, 0x06, 0x4ee1);
+        rtl8168_mdio_write(tp, 0x06, 0xe14f);
+        rtl8168_mdio_write(tp, 0x06, 0xac2d);
+        rtl8168_mdio_write(tp, 0x06, 0x22f6);
+        rtl8168_mdio_write(tp, 0x06, 0x0302);
+        rtl8168_mdio_write(tp, 0x06, 0x033b);
+        rtl8168_mdio_write(tp, 0x06, 0xf703);
+        rtl8168_mdio_write(tp, 0x06, 0xf706);
+        rtl8168_mdio_write(tp, 0x06, 0xbf84);
+        rtl8168_mdio_write(tp, 0x06, 0x4402);
+        rtl8168_mdio_write(tp, 0x06, 0x2d21);
+        rtl8168_mdio_write(tp, 0x06, 0xae11);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e1);
+        rtl8168_mdio_write(tp, 0x06, 0x4ee1);
+        rtl8168_mdio_write(tp, 0x06, 0xe14f);
+        rtl8168_mdio_write(tp, 0x06, 0xad2d);
+        rtl8168_mdio_write(tp, 0x06, 0x08bf);
+        rtl8168_mdio_write(tp, 0x06, 0x844f);
+        rtl8168_mdio_write(tp, 0x06, 0x022d);
+        rtl8168_mdio_write(tp, 0x06, 0x21f6);
+        rtl8168_mdio_write(tp, 0x06, 0x06ef);
+        rtl8168_mdio_write(tp, 0x06, 0x96fe);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8fa);
+        rtl8168_mdio_write(tp, 0x06, 0xef69);
+        rtl8168_mdio_write(tp, 0x06, 0x0283);
+        rtl8168_mdio_write(tp, 0x06, 0x4502);
+        rtl8168_mdio_write(tp, 0x06, 0x83a2);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+        rtl8168_mdio_write(tp, 0x06, 0x00e1);
+        rtl8168_mdio_write(tp, 0x06, 0xe001);
+        rtl8168_mdio_write(tp, 0x06, 0xad27);
+        rtl8168_mdio_write(tp, 0x06, 0x1fd1);
+        rtl8168_mdio_write(tp, 0x06, 0x01bf);
+        rtl8168_mdio_write(tp, 0x06, 0x843b);
+        rtl8168_mdio_write(tp, 0x06, 0x022d);
+        rtl8168_mdio_write(tp, 0x06, 0xc1e0);
+        rtl8168_mdio_write(tp, 0x06, 0xe020);
+        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+        rtl8168_mdio_write(tp, 0x06, 0x21ad);
+        rtl8168_mdio_write(tp, 0x06, 0x200e);
+        rtl8168_mdio_write(tp, 0x06, 0xd100);
+        rtl8168_mdio_write(tp, 0x06, 0xbf84);
+        rtl8168_mdio_write(tp, 0x06, 0x3b02);
+        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
+        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
+        rtl8168_mdio_write(tp, 0x06, 0x9602);
+        rtl8168_mdio_write(tp, 0x06, 0x2d21);
+        rtl8168_mdio_write(tp, 0x06, 0xef96);
+        rtl8168_mdio_write(tp, 0x06, 0xfefc);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xf9fa);
+        rtl8168_mdio_write(tp, 0x06, 0xef69);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x87ad);
+        rtl8168_mdio_write(tp, 0x06, 0x204c);
+        rtl8168_mdio_write(tp, 0x06, 0xd200);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e2);
+        rtl8168_mdio_write(tp, 0x06, 0x0058);
+        rtl8168_mdio_write(tp, 0x06, 0x010c);
+        rtl8168_mdio_write(tp, 0x06, 0x021e);
+        rtl8168_mdio_write(tp, 0x06, 0x20e0);
+        rtl8168_mdio_write(tp, 0x06, 0xe000);
+        rtl8168_mdio_write(tp, 0x06, 0x5810);
+        rtl8168_mdio_write(tp, 0x06, 0x1e20);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+        rtl8168_mdio_write(tp, 0x06, 0x3658);
+        rtl8168_mdio_write(tp, 0x06, 0x031e);
+        rtl8168_mdio_write(tp, 0x06, 0x20e0);
+        rtl8168_mdio_write(tp, 0x06, 0xe022);
+        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+        rtl8168_mdio_write(tp, 0x06, 0x2358);
+        rtl8168_mdio_write(tp, 0x06, 0xe01e);
+        rtl8168_mdio_write(tp, 0x06, 0x20e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b64);
+        rtl8168_mdio_write(tp, 0x06, 0x1f02);
+        rtl8168_mdio_write(tp, 0x06, 0x9e22);
+        rtl8168_mdio_write(tp, 0x06, 0xe68b);
+        rtl8168_mdio_write(tp, 0x06, 0x64ad);
+        rtl8168_mdio_write(tp, 0x06, 0x3214);
+        rtl8168_mdio_write(tp, 0x06, 0xad34);
+        rtl8168_mdio_write(tp, 0x06, 0x11ef);
+        rtl8168_mdio_write(tp, 0x06, 0x0258);
+        rtl8168_mdio_write(tp, 0x06, 0x039e);
+        rtl8168_mdio_write(tp, 0x06, 0x07ad);
+        rtl8168_mdio_write(tp, 0x06, 0x3508);
+        rtl8168_mdio_write(tp, 0x06, 0x5ac0);
+        rtl8168_mdio_write(tp, 0x06, 0x9f04);
+        rtl8168_mdio_write(tp, 0x06, 0xd101);
+        rtl8168_mdio_write(tp, 0x06, 0xae02);
+        rtl8168_mdio_write(tp, 0x06, 0xd100);
+        rtl8168_mdio_write(tp, 0x06, 0xbf84);
+        rtl8168_mdio_write(tp, 0x06, 0x3e02);
+        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
+        rtl8168_mdio_write(tp, 0x06, 0xef96);
+        rtl8168_mdio_write(tp, 0x06, 0xfefd);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x06, 0xfbe0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b85);
+        rtl8168_mdio_write(tp, 0x06, 0xad25);
+        rtl8168_mdio_write(tp, 0x06, 0x22e0);
+        rtl8168_mdio_write(tp, 0x06, 0xe022);
+        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+        rtl8168_mdio_write(tp, 0x06, 0x23e2);
+        rtl8168_mdio_write(tp, 0x06, 0xe036);
+        rtl8168_mdio_write(tp, 0x06, 0xe3e0);
+        rtl8168_mdio_write(tp, 0x06, 0x375a);
+        rtl8168_mdio_write(tp, 0x06, 0xc40d);
+        rtl8168_mdio_write(tp, 0x06, 0x0158);
+        rtl8168_mdio_write(tp, 0x06, 0x021e);
+        rtl8168_mdio_write(tp, 0x06, 0x20e3);
+        rtl8168_mdio_write(tp, 0x06, 0x8ae7);
+        rtl8168_mdio_write(tp, 0x06, 0xac31);
+        rtl8168_mdio_write(tp, 0x06, 0x60ac);
+        rtl8168_mdio_write(tp, 0x06, 0x3a08);
+        rtl8168_mdio_write(tp, 0x06, 0xac3e);
+        rtl8168_mdio_write(tp, 0x06, 0x26ae);
+        rtl8168_mdio_write(tp, 0x06, 0x67af);
+        rtl8168_mdio_write(tp, 0x06, 0x8437);
+        rtl8168_mdio_write(tp, 0x06, 0xad37);
+        rtl8168_mdio_write(tp, 0x06, 0x61e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8ae8);
+        rtl8168_mdio_write(tp, 0x06, 0x10e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8ae8);
+        rtl8168_mdio_write(tp, 0x06, 0xe18a);
+        rtl8168_mdio_write(tp, 0x06, 0xe91b);
+        rtl8168_mdio_write(tp, 0x06, 0x109e);
+        rtl8168_mdio_write(tp, 0x06, 0x02ae);
+        rtl8168_mdio_write(tp, 0x06, 0x51d1);
+        rtl8168_mdio_write(tp, 0x06, 0x00bf);
+        rtl8168_mdio_write(tp, 0x06, 0x8441);
+        rtl8168_mdio_write(tp, 0x06, 0x022d);
+        rtl8168_mdio_write(tp, 0x06, 0xc1ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8ae8);
+        rtl8168_mdio_write(tp, 0x06, 0x00ae);
+        rtl8168_mdio_write(tp, 0x06, 0x43ad);
+        rtl8168_mdio_write(tp, 0x06, 0x3627);
+        rtl8168_mdio_write(tp, 0x06, 0xe08a);
+        rtl8168_mdio_write(tp, 0x06, 0xeee1);
+        rtl8168_mdio_write(tp, 0x06, 0x8aef);
+        rtl8168_mdio_write(tp, 0x06, 0xef74);
+        rtl8168_mdio_write(tp, 0x06, 0xe08a);
+        rtl8168_mdio_write(tp, 0x06, 0xeae1);
+        rtl8168_mdio_write(tp, 0x06, 0x8aeb);
+        rtl8168_mdio_write(tp, 0x06, 0x1b74);
+        rtl8168_mdio_write(tp, 0x06, 0x9e2e);
+        rtl8168_mdio_write(tp, 0x06, 0x14e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8aea);
+        rtl8168_mdio_write(tp, 0x06, 0xe58a);
+        rtl8168_mdio_write(tp, 0x06, 0xebef);
+        rtl8168_mdio_write(tp, 0x06, 0x74e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8aee);
+        rtl8168_mdio_write(tp, 0x06, 0xe18a);
+        rtl8168_mdio_write(tp, 0x06, 0xef1b);
+        rtl8168_mdio_write(tp, 0x06, 0x479e);
+        rtl8168_mdio_write(tp, 0x06, 0x0fae);
+        rtl8168_mdio_write(tp, 0x06, 0x19ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8aea);
+        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8aeb);
+        rtl8168_mdio_write(tp, 0x06, 0x00ae);
+        rtl8168_mdio_write(tp, 0x06, 0x0fac);
+        rtl8168_mdio_write(tp, 0x06, 0x390c);
+        rtl8168_mdio_write(tp, 0x06, 0xd101);
+        rtl8168_mdio_write(tp, 0x06, 0xbf84);
+        rtl8168_mdio_write(tp, 0x06, 0x4102);
+        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
+        rtl8168_mdio_write(tp, 0x06, 0xee8a);
+        rtl8168_mdio_write(tp, 0x06, 0xe800);
+        rtl8168_mdio_write(tp, 0x06, 0xe68a);
+        rtl8168_mdio_write(tp, 0x06, 0xe7ff);
+        rtl8168_mdio_write(tp, 0x06, 0xfdfc);
+        rtl8168_mdio_write(tp, 0x06, 0x0400);
+        rtl8168_mdio_write(tp, 0x06, 0xe234);
+        rtl8168_mdio_write(tp, 0x06, 0xcce2);
+        rtl8168_mdio_write(tp, 0x06, 0x0088);
+        rtl8168_mdio_write(tp, 0x06, 0xe200);
+        rtl8168_mdio_write(tp, 0x06, 0xa725);
+        rtl8168_mdio_write(tp, 0x06, 0xe50a);
+        rtl8168_mdio_write(tp, 0x06, 0x1de5);
+        rtl8168_mdio_write(tp, 0x06, 0x0a2c);
+        rtl8168_mdio_write(tp, 0x06, 0xe50a);
+        rtl8168_mdio_write(tp, 0x06, 0x6de5);
+        rtl8168_mdio_write(tp, 0x06, 0x0a1d);
+        rtl8168_mdio_write(tp, 0x06, 0xe50a);
+        rtl8168_mdio_write(tp, 0x06, 0x1ce5);
+        rtl8168_mdio_write(tp, 0x06, 0x0a2d);
+        rtl8168_mdio_write(tp, 0x06, 0xa755);
+        rtl8168_mdio_write(tp, 0x05, 0x8b64);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x05, 0x8b94);
+        rtl8168_mdio_write(tp, 0x06, 0x82cd);
+        rtl8168_mdio_write(tp, 0x05, 0x8b85);
+        rtl8168_mdio_write(tp, 0x06, 0x2000);
+        rtl8168_mdio_write(tp, 0x05, 0x8aee);
+        rtl8168_mdio_write(tp, 0x06, 0x03b8);
+        rtl8168_mdio_write(tp, 0x05, 0x8ae8);
+        rtl8168_mdio_write(tp, 0x06, 0x0002);
+        gphy_val = rtl8168_mdio_read(tp, 0x01);
+        gphy_val |= BIT_0;
+        rtl8168_mdio_write(tp, 0x01, gphy_val);
+        gphy_val = rtl8168_mdio_read(tp, 0x00);
+        gphy_val |= BIT_0;
+        rtl8168_mdio_write(tp, 0x00, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+        for (i = 0; i < 200; i++) {
+                udelay(100);
+                gphy_val = rtl8168_mdio_read(tp, 0x00);
+                if (gphy_val & BIT_7)
+                        break;
+        }
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1e, 0x0023);
+        gphy_val = rtl8168_mdio_read(tp, 0x17);
+        gphy_val &= ~(BIT_0);
+        if (tp->RequiredSecLanDonglePatch)
+                gphy_val &= ~(BIT_2);
+        rtl8168_mdio_write(tp, 0x17, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1e, 0x0028);
+        rtl8168_mdio_write(tp, 0x15, 0x0010);
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1e, 0x0041);
+        rtl8168_mdio_write(tp, 0x15, 0x0802);
+        rtl8168_mdio_write(tp, 0x16, 0x2185);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+}
+
+static void
+rtl8168_set_phy_mcu_8168e_2(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        unsigned int gphy_val,i;
+
+        if (rtl8168_efuse_read(tp, 0x22) == 0x0c) {
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                rtl8168_mdio_write(tp, 0x00, 0x1800);
+                rtl8168_mdio_write(tp, 0x1f, 0x0007);
+                rtl8168_mdio_write(tp, 0x1e, 0x0023);
+                rtl8168_mdio_write(tp, 0x17, 0x0117);
+                rtl8168_mdio_write(tp, 0x1f, 0x0007);
+                rtl8168_mdio_write(tp, 0x1E, 0x002C);
+                rtl8168_mdio_write(tp, 0x1B, 0x5000);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                rtl8168_mdio_write(tp, 0x16, 0x4104);
+                for (i = 0; i < 200; i++) {
+                        udelay(100);
+                        gphy_val = rtl8168_mdio_read(tp, 0x1E);
+                        gphy_val &= 0x03FF;
+                        if (gphy_val==0x000C)
+                                break;
+                }
+                rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                for (i = 0; i < 200; i++) {
+                        udelay(100);
+                        gphy_val = rtl8168_mdio_read(tp, 0x07);
+                        if ((gphy_val & BIT_5) == 0)
+                                break;
+                }
+                gphy_val = rtl8168_mdio_read(tp, 0x07);
+                if (gphy_val & BIT_5) {
+                        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+                        rtl8168_mdio_write(tp, 0x1e, 0x00a1);
+                        rtl8168_mdio_write(tp, 0x17, 0x1000);
+                        rtl8168_mdio_write(tp, 0x17, 0x0000);
+                        rtl8168_mdio_write(tp, 0x17, 0x2000);
+                        rtl8168_mdio_write(tp, 0x1e, 0x002f);
+                        rtl8168_mdio_write(tp, 0x18, 0x9bfb);
+                        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                        rtl8168_mdio_write(tp, 0x07, 0x0000);
+                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                }
+                rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0xfff6);
+                rtl8168_mdio_write(tp, 0x06, 0x0080);
+                gphy_val = rtl8168_mdio_read(tp, 0x00);
+                gphy_val &= ~(BIT_7);
+                rtl8168_mdio_write(tp, 0x00, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0002);
+                gphy_val = rtl8168_mdio_read(tp, 0x08);
+                gphy_val &= ~(BIT_7);
+                rtl8168_mdio_write(tp, 0x08, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0007);
+                rtl8168_mdio_write(tp, 0x1e, 0x0023);
+                rtl8168_mdio_write(tp, 0x16, 0x0306);
+                rtl8168_mdio_write(tp, 0x16, 0x0307);
+                rtl8168_mdio_write(tp, 0x15, 0x000e);
+                rtl8168_mdio_write(tp, 0x19, 0x000a);
+                rtl8168_mdio_write(tp, 0x15, 0x0010);
+                rtl8168_mdio_write(tp, 0x19, 0x0008);
+                rtl8168_mdio_write(tp, 0x15, 0x0018);
+                rtl8168_mdio_write(tp, 0x19, 0x4801);
+                rtl8168_mdio_write(tp, 0x15, 0x0019);
+                rtl8168_mdio_write(tp, 0x19, 0x6801);
+                rtl8168_mdio_write(tp, 0x15, 0x001a);
+                rtl8168_mdio_write(tp, 0x19, 0x66a1);
+                rtl8168_mdio_write(tp, 0x15, 0x001f);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0020);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0021);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0022);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0023);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0024);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0025);
+                rtl8168_mdio_write(tp, 0x19, 0x64a1);
+                rtl8168_mdio_write(tp, 0x15, 0x0026);
+                rtl8168_mdio_write(tp, 0x19, 0x40ea);
+                rtl8168_mdio_write(tp, 0x15, 0x0027);
+                rtl8168_mdio_write(tp, 0x19, 0x4503);
+                rtl8168_mdio_write(tp, 0x15, 0x0028);
+                rtl8168_mdio_write(tp, 0x19, 0x9f00);
+                rtl8168_mdio_write(tp, 0x15, 0x0029);
+                rtl8168_mdio_write(tp, 0x19, 0xa631);
+                rtl8168_mdio_write(tp, 0x15, 0x002a);
+                rtl8168_mdio_write(tp, 0x19, 0x9717);
+                rtl8168_mdio_write(tp, 0x15, 0x002b);
+                rtl8168_mdio_write(tp, 0x19, 0x302c);
+                rtl8168_mdio_write(tp, 0x15, 0x002c);
+                rtl8168_mdio_write(tp, 0x19, 0x4802);
+                rtl8168_mdio_write(tp, 0x15, 0x002d);
+                rtl8168_mdio_write(tp, 0x19, 0x58da);
+                rtl8168_mdio_write(tp, 0x15, 0x002e);
+                rtl8168_mdio_write(tp, 0x19, 0x400d);
+                rtl8168_mdio_write(tp, 0x15, 0x002f);
+                rtl8168_mdio_write(tp, 0x19, 0x4488);
+                rtl8168_mdio_write(tp, 0x15, 0x0030);
+                rtl8168_mdio_write(tp, 0x19, 0x9e00);
+                rtl8168_mdio_write(tp, 0x15, 0x0031);
+                rtl8168_mdio_write(tp, 0x19, 0x63c8);
+                rtl8168_mdio_write(tp, 0x15, 0x0032);
+                rtl8168_mdio_write(tp, 0x19, 0x6481);
+                rtl8168_mdio_write(tp, 0x15, 0x0033);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0034);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0035);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0036);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0037);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0038);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0039);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x003a);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x003b);
+                rtl8168_mdio_write(tp, 0x19, 0x63e8);
+                rtl8168_mdio_write(tp, 0x15, 0x003c);
+                rtl8168_mdio_write(tp, 0x19, 0x7d00);
+                rtl8168_mdio_write(tp, 0x15, 0x003d);
+                rtl8168_mdio_write(tp, 0x19, 0x59d4);
+                rtl8168_mdio_write(tp, 0x15, 0x003e);
+                rtl8168_mdio_write(tp, 0x19, 0x63f8);
+                rtl8168_mdio_write(tp, 0x15, 0x0040);
+                rtl8168_mdio_write(tp, 0x19, 0x64a1);
+                rtl8168_mdio_write(tp, 0x15, 0x0041);
+                rtl8168_mdio_write(tp, 0x19, 0x30de);
+                rtl8168_mdio_write(tp, 0x15, 0x0044);
+                rtl8168_mdio_write(tp, 0x19, 0x480f);
+                rtl8168_mdio_write(tp, 0x15, 0x0045);
+                rtl8168_mdio_write(tp, 0x19, 0x6800);
+                rtl8168_mdio_write(tp, 0x15, 0x0046);
+                rtl8168_mdio_write(tp, 0x19, 0x6680);
+                rtl8168_mdio_write(tp, 0x15, 0x0047);
+                rtl8168_mdio_write(tp, 0x19, 0x7c10);
+                rtl8168_mdio_write(tp, 0x15, 0x0048);
+                rtl8168_mdio_write(tp, 0x19, 0x63c8);
+                rtl8168_mdio_write(tp, 0x15, 0x0049);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x004a);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x004b);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x004c);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x004d);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x004e);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x004f);
+                rtl8168_mdio_write(tp, 0x19, 0x40ea);
+                rtl8168_mdio_write(tp, 0x15, 0x0050);
+                rtl8168_mdio_write(tp, 0x19, 0x4503);
+                rtl8168_mdio_write(tp, 0x15, 0x0051);
+                rtl8168_mdio_write(tp, 0x19, 0x58ca);
+                rtl8168_mdio_write(tp, 0x15, 0x0052);
+                rtl8168_mdio_write(tp, 0x19, 0x63c8);
+                rtl8168_mdio_write(tp, 0x15, 0x0053);
+                rtl8168_mdio_write(tp, 0x19, 0x63d8);
+                rtl8168_mdio_write(tp, 0x15, 0x0054);
+                rtl8168_mdio_write(tp, 0x19, 0x66a0);
+                rtl8168_mdio_write(tp, 0x15, 0x0055);
+                rtl8168_mdio_write(tp, 0x19, 0x9f00);
+                rtl8168_mdio_write(tp, 0x15, 0x0056);
+                rtl8168_mdio_write(tp, 0x19, 0x3000);
+                rtl8168_mdio_write(tp, 0x15, 0x00a1);
+                rtl8168_mdio_write(tp, 0x19, 0x3044);
+                rtl8168_mdio_write(tp, 0x15, 0x00ab);
+                rtl8168_mdio_write(tp, 0x19, 0x5820);
+                rtl8168_mdio_write(tp, 0x15, 0x00ac);
+                rtl8168_mdio_write(tp, 0x19, 0x5e04);
+                rtl8168_mdio_write(tp, 0x15, 0x00ad);
+                rtl8168_mdio_write(tp, 0x19, 0xb60c);
+                rtl8168_mdio_write(tp, 0x15, 0x00af);
+                rtl8168_mdio_write(tp, 0x19, 0x000a);
+                rtl8168_mdio_write(tp, 0x15, 0x00b2);
+                rtl8168_mdio_write(tp, 0x19, 0x30b9);
+                rtl8168_mdio_write(tp, 0x15, 0x00b9);
+                rtl8168_mdio_write(tp, 0x19, 0x4408);
+                rtl8168_mdio_write(tp, 0x15, 0x00ba);
+                rtl8168_mdio_write(tp, 0x19, 0x480b);
+                rtl8168_mdio_write(tp, 0x15, 0x00bb);
+                rtl8168_mdio_write(tp, 0x19, 0x5e00);
+                rtl8168_mdio_write(tp, 0x15, 0x00bc);
+                rtl8168_mdio_write(tp, 0x19, 0x405f);
+                rtl8168_mdio_write(tp, 0x15, 0x00bd);
+                rtl8168_mdio_write(tp, 0x19, 0x4448);
+                rtl8168_mdio_write(tp, 0x15, 0x00be);
+                rtl8168_mdio_write(tp, 0x19, 0x4020);
+                rtl8168_mdio_write(tp, 0x15, 0x00bf);
+                rtl8168_mdio_write(tp, 0x19, 0x4468);
+                rtl8168_mdio_write(tp, 0x15, 0x00c0);
+                rtl8168_mdio_write(tp, 0x19, 0x9c02);
+                rtl8168_mdio_write(tp, 0x15, 0x00c1);
+                rtl8168_mdio_write(tp, 0x19, 0x58a0);
+                rtl8168_mdio_write(tp, 0x15, 0x00c2);
+                rtl8168_mdio_write(tp, 0x19, 0xb605);
+                rtl8168_mdio_write(tp, 0x15, 0x00c3);
+                rtl8168_mdio_write(tp, 0x19, 0xc0d3);
+                rtl8168_mdio_write(tp, 0x15, 0x00c4);
+                rtl8168_mdio_write(tp, 0x19, 0x00e6);
+                rtl8168_mdio_write(tp, 0x15, 0x00c5);
+                rtl8168_mdio_write(tp, 0x19, 0xdaec);
+                rtl8168_mdio_write(tp, 0x15, 0x00c6);
+                rtl8168_mdio_write(tp, 0x19, 0x00fa);
+                rtl8168_mdio_write(tp, 0x15, 0x00c7);
+                rtl8168_mdio_write(tp, 0x19, 0x9df9);
+                rtl8168_mdio_write(tp, 0x15, 0x0112);
+                rtl8168_mdio_write(tp, 0x19, 0x6421);
+                rtl8168_mdio_write(tp, 0x15, 0x0113);
+                rtl8168_mdio_write(tp, 0x19, 0x7c08);
+                rtl8168_mdio_write(tp, 0x15, 0x0114);
+                rtl8168_mdio_write(tp, 0x19, 0x63f0);
+                rtl8168_mdio_write(tp, 0x15, 0x0115);
+                rtl8168_mdio_write(tp, 0x19, 0x4003);
+                rtl8168_mdio_write(tp, 0x15, 0x0116);
+                rtl8168_mdio_write(tp, 0x19, 0x4418);
+                rtl8168_mdio_write(tp, 0x15, 0x0117);
+                rtl8168_mdio_write(tp, 0x19, 0x9b00);
+                rtl8168_mdio_write(tp, 0x15, 0x0118);
+                rtl8168_mdio_write(tp, 0x19, 0x6461);
+                rtl8168_mdio_write(tp, 0x15, 0x0119);
+                rtl8168_mdio_write(tp, 0x19, 0x64e1);
+                rtl8168_mdio_write(tp, 0x15, 0x011a);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0150);
+                rtl8168_mdio_write(tp, 0x19, 0x7c80);
+                rtl8168_mdio_write(tp, 0x15, 0x0151);
+                rtl8168_mdio_write(tp, 0x19, 0x6461);
+                rtl8168_mdio_write(tp, 0x15, 0x0152);
+                rtl8168_mdio_write(tp, 0x19, 0x4003);
+                rtl8168_mdio_write(tp, 0x15, 0x0153);
+                rtl8168_mdio_write(tp, 0x19, 0x4540);
+                rtl8168_mdio_write(tp, 0x15, 0x0154);
+                rtl8168_mdio_write(tp, 0x19, 0x9f00);
+                rtl8168_mdio_write(tp, 0x15, 0x0155);
+                rtl8168_mdio_write(tp, 0x19, 0x9d00);
+                rtl8168_mdio_write(tp, 0x15, 0x0156);
+                rtl8168_mdio_write(tp, 0x19, 0x7c40);
+                rtl8168_mdio_write(tp, 0x15, 0x0157);
+                rtl8168_mdio_write(tp, 0x19, 0x6421);
+                rtl8168_mdio_write(tp, 0x15, 0x0158);
+                rtl8168_mdio_write(tp, 0x19, 0x7c80);
+                rtl8168_mdio_write(tp, 0x15, 0x0159);
+                rtl8168_mdio_write(tp, 0x19, 0x64a1);
+                rtl8168_mdio_write(tp, 0x15, 0x015a);
+                rtl8168_mdio_write(tp, 0x19, 0x30fe);
+                rtl8168_mdio_write(tp, 0x15, 0x029c);
+                rtl8168_mdio_write(tp, 0x19, 0x0070);
+                rtl8168_mdio_write(tp, 0x15, 0x02b2);
+                rtl8168_mdio_write(tp, 0x19, 0x005a);
+                rtl8168_mdio_write(tp, 0x15, 0x02bd);
+                rtl8168_mdio_write(tp, 0x19, 0xa522);
+                rtl8168_mdio_write(tp, 0x15, 0x02ce);
+                rtl8168_mdio_write(tp, 0x19, 0xb63e);
+                rtl8168_mdio_write(tp, 0x15, 0x02d9);
+                rtl8168_mdio_write(tp, 0x19, 0x32df);
+                rtl8168_mdio_write(tp, 0x15, 0x02df);
+                rtl8168_mdio_write(tp, 0x19, 0x4500);
+                rtl8168_mdio_write(tp, 0x15, 0x02e7);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x02f4);
+                rtl8168_mdio_write(tp, 0x19, 0xb618);
+                rtl8168_mdio_write(tp, 0x15, 0x02fb);
+                rtl8168_mdio_write(tp, 0x19, 0xb900);
+                rtl8168_mdio_write(tp, 0x15, 0x02fc);
+                rtl8168_mdio_write(tp, 0x19, 0x49b5);
+                rtl8168_mdio_write(tp, 0x15, 0x02fd);
+                rtl8168_mdio_write(tp, 0x19, 0x6812);
+                rtl8168_mdio_write(tp, 0x15, 0x02fe);
+                rtl8168_mdio_write(tp, 0x19, 0x66a0);
+                rtl8168_mdio_write(tp, 0x15, 0x02ff);
+                rtl8168_mdio_write(tp, 0x19, 0x9900);
+                rtl8168_mdio_write(tp, 0x15, 0x0300);
+                rtl8168_mdio_write(tp, 0x19, 0x64a0);
+                rtl8168_mdio_write(tp, 0x15, 0x0301);
+                rtl8168_mdio_write(tp, 0x19, 0x3316);
+                rtl8168_mdio_write(tp, 0x15, 0x0308);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x030c);
+                rtl8168_mdio_write(tp, 0x19, 0x3000);
+                rtl8168_mdio_write(tp, 0x15, 0x0312);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0313);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0314);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0315);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0316);
+                rtl8168_mdio_write(tp, 0x19, 0x49b5);
+                rtl8168_mdio_write(tp, 0x15, 0x0317);
+                rtl8168_mdio_write(tp, 0x19, 0x7d00);
+                rtl8168_mdio_write(tp, 0x15, 0x0318);
+                rtl8168_mdio_write(tp, 0x19, 0x4d00);
+                rtl8168_mdio_write(tp, 0x15, 0x0319);
+                rtl8168_mdio_write(tp, 0x19, 0x6810);
+                rtl8168_mdio_write(tp, 0x15, 0x031a);
+                rtl8168_mdio_write(tp, 0x19, 0x6c08);
+                rtl8168_mdio_write(tp, 0x15, 0x031b);
+                rtl8168_mdio_write(tp, 0x19, 0x4925);
+                rtl8168_mdio_write(tp, 0x15, 0x031c);
+                rtl8168_mdio_write(tp, 0x19, 0x403b);
+                rtl8168_mdio_write(tp, 0x15, 0x031d);
+                rtl8168_mdio_write(tp, 0x19, 0xa602);
+                rtl8168_mdio_write(tp, 0x15, 0x031e);
+                rtl8168_mdio_write(tp, 0x19, 0x402f);
+                rtl8168_mdio_write(tp, 0x15, 0x031f);
+                rtl8168_mdio_write(tp, 0x19, 0x4484);
+                rtl8168_mdio_write(tp, 0x15, 0x0320);
+                rtl8168_mdio_write(tp, 0x19, 0x40c8);
+                rtl8168_mdio_write(tp, 0x15, 0x0321);
+                rtl8168_mdio_write(tp, 0x19, 0x44c4);
+                rtl8168_mdio_write(tp, 0x15, 0x0322);
+                rtl8168_mdio_write(tp, 0x19, 0x404f);
+                rtl8168_mdio_write(tp, 0x15, 0x0323);
+                rtl8168_mdio_write(tp, 0x19, 0x44c8);
+                rtl8168_mdio_write(tp, 0x15, 0x0324);
+                rtl8168_mdio_write(tp, 0x19, 0xd64f);
+                rtl8168_mdio_write(tp, 0x15, 0x0325);
+                rtl8168_mdio_write(tp, 0x19, 0x00e7);
+                rtl8168_mdio_write(tp, 0x15, 0x0326);
+                rtl8168_mdio_write(tp, 0x19, 0x7c08);
+                rtl8168_mdio_write(tp, 0x15, 0x0327);
+                rtl8168_mdio_write(tp, 0x19, 0x8203);
+                rtl8168_mdio_write(tp, 0x15, 0x0328);
+                rtl8168_mdio_write(tp, 0x19, 0x4d48);
+                rtl8168_mdio_write(tp, 0x15, 0x0329);
+                rtl8168_mdio_write(tp, 0x19, 0x332b);
+                rtl8168_mdio_write(tp, 0x15, 0x032a);
+                rtl8168_mdio_write(tp, 0x19, 0x4d40);
+                rtl8168_mdio_write(tp, 0x15, 0x032c);
+                rtl8168_mdio_write(tp, 0x19, 0x00f8);
+                rtl8168_mdio_write(tp, 0x15, 0x032d);
+                rtl8168_mdio_write(tp, 0x19, 0x82b2);
+                rtl8168_mdio_write(tp, 0x15, 0x032f);
+                rtl8168_mdio_write(tp, 0x19, 0x00b0);
+                rtl8168_mdio_write(tp, 0x15, 0x0332);
+                rtl8168_mdio_write(tp, 0x19, 0x91f2);
+                rtl8168_mdio_write(tp, 0x15, 0x033f);
+                rtl8168_mdio_write(tp, 0x19, 0xb6cd);
+                rtl8168_mdio_write(tp, 0x15, 0x0340);
+                rtl8168_mdio_write(tp, 0x19, 0x9e01);
+                rtl8168_mdio_write(tp, 0x15, 0x0341);
+                rtl8168_mdio_write(tp, 0x19, 0xd11d);
+                rtl8168_mdio_write(tp, 0x15, 0x0342);
+                rtl8168_mdio_write(tp, 0x19, 0x009d);
+                rtl8168_mdio_write(tp, 0x15, 0x0343);
+                rtl8168_mdio_write(tp, 0x19, 0xbb1c);
+                rtl8168_mdio_write(tp, 0x15, 0x0344);
+                rtl8168_mdio_write(tp, 0x19, 0x8102);
+                rtl8168_mdio_write(tp, 0x15, 0x0345);
+                rtl8168_mdio_write(tp, 0x19, 0x3348);
+                rtl8168_mdio_write(tp, 0x15, 0x0346);
+                rtl8168_mdio_write(tp, 0x19, 0xa231);
+                rtl8168_mdio_write(tp, 0x15, 0x0347);
+                rtl8168_mdio_write(tp, 0x19, 0x335b);
+                rtl8168_mdio_write(tp, 0x15, 0x0348);
+                rtl8168_mdio_write(tp, 0x19, 0x91f7);
+                rtl8168_mdio_write(tp, 0x15, 0x0349);
+                rtl8168_mdio_write(tp, 0x19, 0xc218);
+                rtl8168_mdio_write(tp, 0x15, 0x034a);
+                rtl8168_mdio_write(tp, 0x19, 0x00f5);
+                rtl8168_mdio_write(tp, 0x15, 0x034b);
+                rtl8168_mdio_write(tp, 0x19, 0x335b);
+                rtl8168_mdio_write(tp, 0x15, 0x034c);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x034d);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x034e);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x034f);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0350);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x035b);
+                rtl8168_mdio_write(tp, 0x19, 0xa23c);
+                rtl8168_mdio_write(tp, 0x15, 0x035c);
+                rtl8168_mdio_write(tp, 0x19, 0x7c08);
+                rtl8168_mdio_write(tp, 0x15, 0x035d);
+                rtl8168_mdio_write(tp, 0x19, 0x4c00);
+                rtl8168_mdio_write(tp, 0x15, 0x035e);
+                rtl8168_mdio_write(tp, 0x19, 0x3397);
+                rtl8168_mdio_write(tp, 0x15, 0x0363);
+                rtl8168_mdio_write(tp, 0x19, 0xb6a9);
+                rtl8168_mdio_write(tp, 0x15, 0x0366);
+                rtl8168_mdio_write(tp, 0x19, 0x00f5);
+                rtl8168_mdio_write(tp, 0x15, 0x0382);
+                rtl8168_mdio_write(tp, 0x19, 0x7c40);
+                rtl8168_mdio_write(tp, 0x15, 0x0388);
+                rtl8168_mdio_write(tp, 0x19, 0x0084);
+                rtl8168_mdio_write(tp, 0x15, 0x0389);
+                rtl8168_mdio_write(tp, 0x19, 0xdd17);
+                rtl8168_mdio_write(tp, 0x15, 0x038a);
+                rtl8168_mdio_write(tp, 0x19, 0x000b);
+                rtl8168_mdio_write(tp, 0x15, 0x038b);
+                rtl8168_mdio_write(tp, 0x19, 0xa10a);
+                rtl8168_mdio_write(tp, 0x15, 0x038c);
+                rtl8168_mdio_write(tp, 0x19, 0x337e);
+                rtl8168_mdio_write(tp, 0x15, 0x038d);
+                rtl8168_mdio_write(tp, 0x19, 0x6c0b);
+                rtl8168_mdio_write(tp, 0x15, 0x038e);
+                rtl8168_mdio_write(tp, 0x19, 0xa107);
+                rtl8168_mdio_write(tp, 0x15, 0x038f);
+                rtl8168_mdio_write(tp, 0x19, 0x6c08);
+                rtl8168_mdio_write(tp, 0x15, 0x0390);
+                rtl8168_mdio_write(tp, 0x19, 0xc017);
+                rtl8168_mdio_write(tp, 0x15, 0x0391);
+                rtl8168_mdio_write(tp, 0x19, 0x0004);
+                rtl8168_mdio_write(tp, 0x15, 0x0392);
+                rtl8168_mdio_write(tp, 0x19, 0xd64f);
+                rtl8168_mdio_write(tp, 0x15, 0x0393);
+                rtl8168_mdio_write(tp, 0x19, 0x00f4);
+                rtl8168_mdio_write(tp, 0x15, 0x0397);
+                rtl8168_mdio_write(tp, 0x19, 0x4098);
+                rtl8168_mdio_write(tp, 0x15, 0x0398);
+                rtl8168_mdio_write(tp, 0x19, 0x4408);
+                rtl8168_mdio_write(tp, 0x15, 0x0399);
+                rtl8168_mdio_write(tp, 0x19, 0x55bf);
+                rtl8168_mdio_write(tp, 0x15, 0x039a);
+                rtl8168_mdio_write(tp, 0x19, 0x4bb9);
+                rtl8168_mdio_write(tp, 0x15, 0x039b);
+                rtl8168_mdio_write(tp, 0x19, 0x6810);
+                rtl8168_mdio_write(tp, 0x15, 0x039c);
+                rtl8168_mdio_write(tp, 0x19, 0x4b29);
+                rtl8168_mdio_write(tp, 0x15, 0x039d);
+                rtl8168_mdio_write(tp, 0x19, 0x4041);
+                rtl8168_mdio_write(tp, 0x15, 0x039e);
+                rtl8168_mdio_write(tp, 0x19, 0x442a);
+                rtl8168_mdio_write(tp, 0x15, 0x039f);
+                rtl8168_mdio_write(tp, 0x19, 0x4029);
+                rtl8168_mdio_write(tp, 0x15, 0x03aa);
+                rtl8168_mdio_write(tp, 0x19, 0x33b8);
+                rtl8168_mdio_write(tp, 0x15, 0x03b6);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03b7);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03b8);
+                rtl8168_mdio_write(tp, 0x19, 0x543f);
+                rtl8168_mdio_write(tp, 0x15, 0x03b9);
+                rtl8168_mdio_write(tp, 0x19, 0x499a);
+                rtl8168_mdio_write(tp, 0x15, 0x03ba);
+                rtl8168_mdio_write(tp, 0x19, 0x7c40);
+                rtl8168_mdio_write(tp, 0x15, 0x03bb);
+                rtl8168_mdio_write(tp, 0x19, 0x4c40);
+                rtl8168_mdio_write(tp, 0x15, 0x03bc);
+                rtl8168_mdio_write(tp, 0x19, 0x490a);
+                rtl8168_mdio_write(tp, 0x15, 0x03bd);
+                rtl8168_mdio_write(tp, 0x19, 0x405e);
+                rtl8168_mdio_write(tp, 0x15, 0x03c2);
+                rtl8168_mdio_write(tp, 0x19, 0x9a03);
+                rtl8168_mdio_write(tp, 0x15, 0x03c4);
+                rtl8168_mdio_write(tp, 0x19, 0x0015);
+                rtl8168_mdio_write(tp, 0x15, 0x03c5);
+                rtl8168_mdio_write(tp, 0x19, 0x9e03);
+                rtl8168_mdio_write(tp, 0x15, 0x03c8);
+                rtl8168_mdio_write(tp, 0x19, 0x9cf7);
+                rtl8168_mdio_write(tp, 0x15, 0x03c9);
+                rtl8168_mdio_write(tp, 0x19, 0x7c12);
+                rtl8168_mdio_write(tp, 0x15, 0x03ca);
+                rtl8168_mdio_write(tp, 0x19, 0x4c52);
+                rtl8168_mdio_write(tp, 0x15, 0x03cb);
+                rtl8168_mdio_write(tp, 0x19, 0x4458);
+                rtl8168_mdio_write(tp, 0x15, 0x03cd);
+                rtl8168_mdio_write(tp, 0x19, 0x4c40);
+                rtl8168_mdio_write(tp, 0x15, 0x03ce);
+                rtl8168_mdio_write(tp, 0x19, 0x33bf);
+                rtl8168_mdio_write(tp, 0x15, 0x03cf);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03d0);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03d1);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03d5);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03d6);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03d7);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03d8);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03d9);
+                rtl8168_mdio_write(tp, 0x19, 0x49bb);
+                rtl8168_mdio_write(tp, 0x15, 0x03da);
+                rtl8168_mdio_write(tp, 0x19, 0x4478);
+                rtl8168_mdio_write(tp, 0x15, 0x03db);
+                rtl8168_mdio_write(tp, 0x19, 0x492b);
+                rtl8168_mdio_write(tp, 0x15, 0x03dc);
+                rtl8168_mdio_write(tp, 0x19, 0x7c01);
+                rtl8168_mdio_write(tp, 0x15, 0x03dd);
+                rtl8168_mdio_write(tp, 0x19, 0x4c00);
+                rtl8168_mdio_write(tp, 0x15, 0x03de);
+                rtl8168_mdio_write(tp, 0x19, 0xbd1a);
+                rtl8168_mdio_write(tp, 0x15, 0x03df);
+                rtl8168_mdio_write(tp, 0x19, 0xc428);
+                rtl8168_mdio_write(tp, 0x15, 0x03e0);
+                rtl8168_mdio_write(tp, 0x19, 0x0008);
+                rtl8168_mdio_write(tp, 0x15, 0x03e1);
+                rtl8168_mdio_write(tp, 0x19, 0x9cfd);
+                rtl8168_mdio_write(tp, 0x15, 0x03e2);
+                rtl8168_mdio_write(tp, 0x19, 0x7c12);
+                rtl8168_mdio_write(tp, 0x15, 0x03e3);
+                rtl8168_mdio_write(tp, 0x19, 0x4c52);
+                rtl8168_mdio_write(tp, 0x15, 0x03e4);
+                rtl8168_mdio_write(tp, 0x19, 0x4458);
+                rtl8168_mdio_write(tp, 0x15, 0x03e5);
+                rtl8168_mdio_write(tp, 0x19, 0x7c12);
+                rtl8168_mdio_write(tp, 0x15, 0x03e6);
+                rtl8168_mdio_write(tp, 0x19, 0x4c40);
+                rtl8168_mdio_write(tp, 0x15, 0x03e7);
+                rtl8168_mdio_write(tp, 0x19, 0x33de);
+                rtl8168_mdio_write(tp, 0x15, 0x03e8);
+                rtl8168_mdio_write(tp, 0x19, 0xc218);
+                rtl8168_mdio_write(tp, 0x15, 0x03e9);
+                rtl8168_mdio_write(tp, 0x19, 0x0002);
+                rtl8168_mdio_write(tp, 0x15, 0x03ea);
+                rtl8168_mdio_write(tp, 0x19, 0x32df);
+                rtl8168_mdio_write(tp, 0x15, 0x03eb);
+                rtl8168_mdio_write(tp, 0x19, 0x3316);
+                rtl8168_mdio_write(tp, 0x15, 0x03ec);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03ed);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03ee);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03ef);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03f7);
+                rtl8168_mdio_write(tp, 0x19, 0x330c);
+                rtl8168_mdio_write(tp, 0x16, 0x0306);
+                rtl8168_mdio_write(tp, 0x16, 0x0300);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0xfff6);
+                rtl8168_mdio_write(tp, 0x06, 0x0080);
+                rtl8168_mdio_write(tp, 0x05, 0x8000);
+                rtl8168_mdio_write(tp, 0x06, 0x0280);
+                rtl8168_mdio_write(tp, 0x06, 0x48f7);
+                rtl8168_mdio_write(tp, 0x06, 0x00e0);
+                rtl8168_mdio_write(tp, 0x06, 0xfff7);
+                rtl8168_mdio_write(tp, 0x06, 0xa080);
+                rtl8168_mdio_write(tp, 0x06, 0x02ae);
+                rtl8168_mdio_write(tp, 0x06, 0xf602);
+                rtl8168_mdio_write(tp, 0x06, 0x0200);
+                rtl8168_mdio_write(tp, 0x06, 0x0280);
+                rtl8168_mdio_write(tp, 0x06, 0x9002);
+                rtl8168_mdio_write(tp, 0x06, 0x0224);
+                rtl8168_mdio_write(tp, 0x06, 0x0202);
+                rtl8168_mdio_write(tp, 0x06, 0x3402);
+                rtl8168_mdio_write(tp, 0x06, 0x027f);
+                rtl8168_mdio_write(tp, 0x06, 0x0280);
+                rtl8168_mdio_write(tp, 0x06, 0xa602);
+                rtl8168_mdio_write(tp, 0x06, 0x80bf);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x88e1);
+                rtl8168_mdio_write(tp, 0x06, 0x8b89);
+                rtl8168_mdio_write(tp, 0x06, 0x1e01);
+                rtl8168_mdio_write(tp, 0x06, 0xe18b);
+                rtl8168_mdio_write(tp, 0x06, 0x8a1e);
+                rtl8168_mdio_write(tp, 0x06, 0x01e1);
+                rtl8168_mdio_write(tp, 0x06, 0x8b8b);
+                rtl8168_mdio_write(tp, 0x06, 0x1e01);
+                rtl8168_mdio_write(tp, 0x06, 0xe18b);
+                rtl8168_mdio_write(tp, 0x06, 0x8c1e);
+                rtl8168_mdio_write(tp, 0x06, 0x01e1);
+                rtl8168_mdio_write(tp, 0x06, 0x8b8d);
+                rtl8168_mdio_write(tp, 0x06, 0x1e01);
+                rtl8168_mdio_write(tp, 0x06, 0xe18b);
+                rtl8168_mdio_write(tp, 0x06, 0x8e1e);
+                rtl8168_mdio_write(tp, 0x06, 0x01a0);
+                rtl8168_mdio_write(tp, 0x06, 0x00c7);
+                rtl8168_mdio_write(tp, 0x06, 0xaebb);
+                rtl8168_mdio_write(tp, 0x06, 0xee8a);
+                rtl8168_mdio_write(tp, 0x06, 0xe600);
+                rtl8168_mdio_write(tp, 0x06, 0xee8a);
+                rtl8168_mdio_write(tp, 0x06, 0xee03);
+                rtl8168_mdio_write(tp, 0x06, 0xee8a);
+                rtl8168_mdio_write(tp, 0x06, 0xefb8);
+                rtl8168_mdio_write(tp, 0x06, 0xee8a);
+                rtl8168_mdio_write(tp, 0x06, 0xe902);
+                rtl8168_mdio_write(tp, 0x06, 0xee8b);
+                rtl8168_mdio_write(tp, 0x06, 0x8285);
+                rtl8168_mdio_write(tp, 0x06, 0xee8b);
+                rtl8168_mdio_write(tp, 0x06, 0x8520);
+                rtl8168_mdio_write(tp, 0x06, 0xee8b);
+                rtl8168_mdio_write(tp, 0x06, 0x8701);
+                rtl8168_mdio_write(tp, 0x06, 0xd481);
+                rtl8168_mdio_write(tp, 0x06, 0x35e4);
+                rtl8168_mdio_write(tp, 0x06, 0x8b94);
+                rtl8168_mdio_write(tp, 0x06, 0xe58b);
+                rtl8168_mdio_write(tp, 0x06, 0x95bf);
+                rtl8168_mdio_write(tp, 0x06, 0x8b88);
+                rtl8168_mdio_write(tp, 0x06, 0xec00);
+                rtl8168_mdio_write(tp, 0x06, 0x19a9);
+                rtl8168_mdio_write(tp, 0x06, 0x8b90);
+                rtl8168_mdio_write(tp, 0x06, 0xf9ee);
+                rtl8168_mdio_write(tp, 0x06, 0xfff6);
+                rtl8168_mdio_write(tp, 0x06, 0x00ee);
+                rtl8168_mdio_write(tp, 0x06, 0xfff7);
+                rtl8168_mdio_write(tp, 0x06, 0xffe0);
+                rtl8168_mdio_write(tp, 0x06, 0xe140);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e1);
+                rtl8168_mdio_write(tp, 0x06, 0x41f7);
+                rtl8168_mdio_write(tp, 0x06, 0x2ff6);
+                rtl8168_mdio_write(tp, 0x06, 0x28e4);
+                rtl8168_mdio_write(tp, 0x06, 0xe140);
+                rtl8168_mdio_write(tp, 0x06, 0xe5e1);
+                rtl8168_mdio_write(tp, 0x06, 0x4104);
+                rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b89);
+                rtl8168_mdio_write(tp, 0x06, 0xad20);
+                rtl8168_mdio_write(tp, 0x06, 0x0dee);
+                rtl8168_mdio_write(tp, 0x06, 0x8b89);
+                rtl8168_mdio_write(tp, 0x06, 0x0002);
+                rtl8168_mdio_write(tp, 0x06, 0x82f4);
+                rtl8168_mdio_write(tp, 0x06, 0x021f);
+                rtl8168_mdio_write(tp, 0x06, 0x4102);
+                rtl8168_mdio_write(tp, 0x06, 0x2812);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b8d);
+                rtl8168_mdio_write(tp, 0x06, 0xad20);
+                rtl8168_mdio_write(tp, 0x06, 0x10ee);
+                rtl8168_mdio_write(tp, 0x06, 0x8b8d);
+                rtl8168_mdio_write(tp, 0x06, 0x0002);
+                rtl8168_mdio_write(tp, 0x06, 0x139d);
+                rtl8168_mdio_write(tp, 0x06, 0x0281);
+                rtl8168_mdio_write(tp, 0x06, 0xd602);
+                rtl8168_mdio_write(tp, 0x06, 0x1f99);
+                rtl8168_mdio_write(tp, 0x06, 0x0227);
+                rtl8168_mdio_write(tp, 0x06, 0xeafc);
+                rtl8168_mdio_write(tp, 0x06, 0x04f8);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x8ead);
+                rtl8168_mdio_write(tp, 0x06, 0x2014);
+                rtl8168_mdio_write(tp, 0x06, 0xf620);
+                rtl8168_mdio_write(tp, 0x06, 0xe48b);
+                rtl8168_mdio_write(tp, 0x06, 0x8e02);
+                rtl8168_mdio_write(tp, 0x06, 0x8104);
+                rtl8168_mdio_write(tp, 0x06, 0x021b);
+                rtl8168_mdio_write(tp, 0x06, 0xf402);
+                rtl8168_mdio_write(tp, 0x06, 0x2c9c);
+                rtl8168_mdio_write(tp, 0x06, 0x0281);
+                rtl8168_mdio_write(tp, 0x06, 0x7902);
+                rtl8168_mdio_write(tp, 0x06, 0x8443);
+                rtl8168_mdio_write(tp, 0x06, 0xad22);
+                rtl8168_mdio_write(tp, 0x06, 0x11f6);
+                rtl8168_mdio_write(tp, 0x06, 0x22e4);
+                rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+                rtl8168_mdio_write(tp, 0x06, 0x022c);
+                rtl8168_mdio_write(tp, 0x06, 0x4602);
+                rtl8168_mdio_write(tp, 0x06, 0x2ac5);
+                rtl8168_mdio_write(tp, 0x06, 0x0229);
+                rtl8168_mdio_write(tp, 0x06, 0x2002);
+                rtl8168_mdio_write(tp, 0x06, 0x2b91);
+                rtl8168_mdio_write(tp, 0x06, 0xad25);
+                rtl8168_mdio_write(tp, 0x06, 0x11f6);
+                rtl8168_mdio_write(tp, 0x06, 0x25e4);
+                rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+                rtl8168_mdio_write(tp, 0x06, 0x0284);
+                rtl8168_mdio_write(tp, 0x06, 0xe202);
+                rtl8168_mdio_write(tp, 0x06, 0x043a);
+                rtl8168_mdio_write(tp, 0x06, 0x021a);
+                rtl8168_mdio_write(tp, 0x06, 0x5902);
+                rtl8168_mdio_write(tp, 0x06, 0x2bfc);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xf8fa);
+                rtl8168_mdio_write(tp, 0x06, 0xef69);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+                rtl8168_mdio_write(tp, 0x06, 0x00e1);
+                rtl8168_mdio_write(tp, 0x06, 0xe001);
+                rtl8168_mdio_write(tp, 0x06, 0xad27);
+                rtl8168_mdio_write(tp, 0x06, 0x1fd1);
+                rtl8168_mdio_write(tp, 0x06, 0x01bf);
+                rtl8168_mdio_write(tp, 0x06, 0x8638);
+                rtl8168_mdio_write(tp, 0x06, 0x022f);
+                rtl8168_mdio_write(tp, 0x06, 0x50e0);
+                rtl8168_mdio_write(tp, 0x06, 0xe020);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+                rtl8168_mdio_write(tp, 0x06, 0x21ad);
+                rtl8168_mdio_write(tp, 0x06, 0x200e);
+                rtl8168_mdio_write(tp, 0x06, 0xd100);
+                rtl8168_mdio_write(tp, 0x06, 0xbf86);
+                rtl8168_mdio_write(tp, 0x06, 0x3802);
+                rtl8168_mdio_write(tp, 0x06, 0x2f50);
+                rtl8168_mdio_write(tp, 0x06, 0xbf3d);
+                rtl8168_mdio_write(tp, 0x06, 0x3902);
+                rtl8168_mdio_write(tp, 0x06, 0x2eb0);
+                rtl8168_mdio_write(tp, 0x06, 0xef96);
+                rtl8168_mdio_write(tp, 0x06, 0xfefc);
+                rtl8168_mdio_write(tp, 0x06, 0x0402);
+                rtl8168_mdio_write(tp, 0x06, 0x8591);
+                rtl8168_mdio_write(tp, 0x06, 0x0281);
+                rtl8168_mdio_write(tp, 0x06, 0x3c05);
+                rtl8168_mdio_write(tp, 0x06, 0xf8fa);
+                rtl8168_mdio_write(tp, 0x06, 0xef69);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
+                rtl8168_mdio_write(tp, 0x06, 0xfee1);
+                rtl8168_mdio_write(tp, 0x06, 0xe2ff);
+                rtl8168_mdio_write(tp, 0x06, 0xad2d);
+                rtl8168_mdio_write(tp, 0x06, 0x1ae0);
+                rtl8168_mdio_write(tp, 0x06, 0xe14e);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e1);
+                rtl8168_mdio_write(tp, 0x06, 0x4fac);
+                rtl8168_mdio_write(tp, 0x06, 0x2d22);
+                rtl8168_mdio_write(tp, 0x06, 0xf603);
+                rtl8168_mdio_write(tp, 0x06, 0x0203);
+                rtl8168_mdio_write(tp, 0x06, 0x36f7);
+                rtl8168_mdio_write(tp, 0x06, 0x03f7);
+                rtl8168_mdio_write(tp, 0x06, 0x06bf);
+                rtl8168_mdio_write(tp, 0x06, 0x8622);
+                rtl8168_mdio_write(tp, 0x06, 0x022e);
+                rtl8168_mdio_write(tp, 0x06, 0xb0ae);
+                rtl8168_mdio_write(tp, 0x06, 0x11e0);
+                rtl8168_mdio_write(tp, 0x06, 0xe14e);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e1);
+                rtl8168_mdio_write(tp, 0x06, 0x4fad);
+                rtl8168_mdio_write(tp, 0x06, 0x2d08);
+                rtl8168_mdio_write(tp, 0x06, 0xbf86);
+                rtl8168_mdio_write(tp, 0x06, 0x2d02);
+                rtl8168_mdio_write(tp, 0x06, 0x2eb0);
+                rtl8168_mdio_write(tp, 0x06, 0xf606);
+                rtl8168_mdio_write(tp, 0x06, 0xef96);
+                rtl8168_mdio_write(tp, 0x06, 0xfefc);
+                rtl8168_mdio_write(tp, 0x06, 0x04f8);
+                rtl8168_mdio_write(tp, 0x06, 0xf9fa);
+                rtl8168_mdio_write(tp, 0x06, 0xef69);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x87ad);
+                rtl8168_mdio_write(tp, 0x06, 0x204c);
+                rtl8168_mdio_write(tp, 0x06, 0xd200);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
+                rtl8168_mdio_write(tp, 0x06, 0x0058);
+                rtl8168_mdio_write(tp, 0x06, 0x010c);
+                rtl8168_mdio_write(tp, 0x06, 0x021e);
+                rtl8168_mdio_write(tp, 0x06, 0x20e0);
+                rtl8168_mdio_write(tp, 0x06, 0xe000);
+                rtl8168_mdio_write(tp, 0x06, 0x5810);
+                rtl8168_mdio_write(tp, 0x06, 0x1e20);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+                rtl8168_mdio_write(tp, 0x06, 0x3658);
+                rtl8168_mdio_write(tp, 0x06, 0x031e);
+                rtl8168_mdio_write(tp, 0x06, 0x20e0);
+                rtl8168_mdio_write(tp, 0x06, 0xe022);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+                rtl8168_mdio_write(tp, 0x06, 0x2358);
+                rtl8168_mdio_write(tp, 0x06, 0xe01e);
+                rtl8168_mdio_write(tp, 0x06, 0x20e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8ae6);
+                rtl8168_mdio_write(tp, 0x06, 0x1f02);
+                rtl8168_mdio_write(tp, 0x06, 0x9e22);
+                rtl8168_mdio_write(tp, 0x06, 0xe68a);
+                rtl8168_mdio_write(tp, 0x06, 0xe6ad);
+                rtl8168_mdio_write(tp, 0x06, 0x3214);
+                rtl8168_mdio_write(tp, 0x06, 0xad34);
+                rtl8168_mdio_write(tp, 0x06, 0x11ef);
+                rtl8168_mdio_write(tp, 0x06, 0x0258);
+                rtl8168_mdio_write(tp, 0x06, 0x039e);
+                rtl8168_mdio_write(tp, 0x06, 0x07ad);
+                rtl8168_mdio_write(tp, 0x06, 0x3508);
+                rtl8168_mdio_write(tp, 0x06, 0x5ac0);
+                rtl8168_mdio_write(tp, 0x06, 0x9f04);
+                rtl8168_mdio_write(tp, 0x06, 0xd101);
+                rtl8168_mdio_write(tp, 0x06, 0xae02);
+                rtl8168_mdio_write(tp, 0x06, 0xd100);
+                rtl8168_mdio_write(tp, 0x06, 0xbf86);
+                rtl8168_mdio_write(tp, 0x06, 0x3e02);
+                rtl8168_mdio_write(tp, 0x06, 0x2f50);
+                rtl8168_mdio_write(tp, 0x06, 0xef96);
+                rtl8168_mdio_write(tp, 0x06, 0xfefd);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xf8f9);
+                rtl8168_mdio_write(tp, 0x06, 0xfae0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b81);
+                rtl8168_mdio_write(tp, 0x06, 0xac26);
+                rtl8168_mdio_write(tp, 0x06, 0x0ee0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b81);
+                rtl8168_mdio_write(tp, 0x06, 0xac21);
+                rtl8168_mdio_write(tp, 0x06, 0x08e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b87);
+                rtl8168_mdio_write(tp, 0x06, 0xac24);
+                rtl8168_mdio_write(tp, 0x06, 0x02ae);
+                rtl8168_mdio_write(tp, 0x06, 0x6bee);
+                rtl8168_mdio_write(tp, 0x06, 0xe0ea);
+                rtl8168_mdio_write(tp, 0x06, 0x00ee);
+                rtl8168_mdio_write(tp, 0x06, 0xe0eb);
+                rtl8168_mdio_write(tp, 0x06, 0x00e2);
+                rtl8168_mdio_write(tp, 0x06, 0xe07c);
+                rtl8168_mdio_write(tp, 0x06, 0xe3e0);
+                rtl8168_mdio_write(tp, 0x06, 0x7da5);
+                rtl8168_mdio_write(tp, 0x06, 0x1111);
+                rtl8168_mdio_write(tp, 0x06, 0x15d2);
+                rtl8168_mdio_write(tp, 0x06, 0x60d6);
+                rtl8168_mdio_write(tp, 0x06, 0x6666);
+                rtl8168_mdio_write(tp, 0x06, 0x0207);
+                rtl8168_mdio_write(tp, 0x06, 0xf9d2);
+                rtl8168_mdio_write(tp, 0x06, 0xa0d6);
+                rtl8168_mdio_write(tp, 0x06, 0xaaaa);
+                rtl8168_mdio_write(tp, 0x06, 0x0207);
+                rtl8168_mdio_write(tp, 0x06, 0xf902);
+                rtl8168_mdio_write(tp, 0x06, 0x825c);
+                rtl8168_mdio_write(tp, 0x06, 0xae44);
+                rtl8168_mdio_write(tp, 0x06, 0xa566);
+                rtl8168_mdio_write(tp, 0x06, 0x6602);
+                rtl8168_mdio_write(tp, 0x06, 0xae38);
+                rtl8168_mdio_write(tp, 0x06, 0xa5aa);
+                rtl8168_mdio_write(tp, 0x06, 0xaa02);
+                rtl8168_mdio_write(tp, 0x06, 0xae32);
+                rtl8168_mdio_write(tp, 0x06, 0xeee0);
+                rtl8168_mdio_write(tp, 0x06, 0xea04);
+                rtl8168_mdio_write(tp, 0x06, 0xeee0);
+                rtl8168_mdio_write(tp, 0x06, 0xeb06);
+                rtl8168_mdio_write(tp, 0x06, 0xe2e0);
+                rtl8168_mdio_write(tp, 0x06, 0x7ce3);
+                rtl8168_mdio_write(tp, 0x06, 0xe07d);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+                rtl8168_mdio_write(tp, 0x06, 0x38e1);
+                rtl8168_mdio_write(tp, 0x06, 0xe039);
+                rtl8168_mdio_write(tp, 0x06, 0xad2e);
+                rtl8168_mdio_write(tp, 0x06, 0x21ad);
+                rtl8168_mdio_write(tp, 0x06, 0x3f13);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e4);
+                rtl8168_mdio_write(tp, 0x06, 0x14e1);
+                rtl8168_mdio_write(tp, 0x06, 0xe415);
+                rtl8168_mdio_write(tp, 0x06, 0x6880);
+                rtl8168_mdio_write(tp, 0x06, 0xe4e4);
+                rtl8168_mdio_write(tp, 0x06, 0x14e5);
+                rtl8168_mdio_write(tp, 0x06, 0xe415);
+                rtl8168_mdio_write(tp, 0x06, 0x0282);
+                rtl8168_mdio_write(tp, 0x06, 0x5cae);
+                rtl8168_mdio_write(tp, 0x06, 0x0bac);
+                rtl8168_mdio_write(tp, 0x06, 0x3e02);
+                rtl8168_mdio_write(tp, 0x06, 0xae06);
+                rtl8168_mdio_write(tp, 0x06, 0x0282);
+                rtl8168_mdio_write(tp, 0x06, 0x8602);
+                rtl8168_mdio_write(tp, 0x06, 0x82b0);
+                rtl8168_mdio_write(tp, 0x06, 0xfefd);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xf8e1);
+                rtl8168_mdio_write(tp, 0x06, 0x8b2e);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x81ad);
+                rtl8168_mdio_write(tp, 0x06, 0x2605);
+                rtl8168_mdio_write(tp, 0x06, 0x0221);
+                rtl8168_mdio_write(tp, 0x06, 0xf3f7);
+                rtl8168_mdio_write(tp, 0x06, 0x28e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b81);
+                rtl8168_mdio_write(tp, 0x06, 0xad21);
+                rtl8168_mdio_write(tp, 0x06, 0x0502);
+                rtl8168_mdio_write(tp, 0x06, 0x22f8);
+                rtl8168_mdio_write(tp, 0x06, 0xf729);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x87ad);
+                rtl8168_mdio_write(tp, 0x06, 0x2405);
+                rtl8168_mdio_write(tp, 0x06, 0x0282);
+                rtl8168_mdio_write(tp, 0x06, 0xebf7);
+                rtl8168_mdio_write(tp, 0x06, 0x2ae5);
+                rtl8168_mdio_write(tp, 0x06, 0x8b2e);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b81);
+                rtl8168_mdio_write(tp, 0x06, 0xad26);
+                rtl8168_mdio_write(tp, 0x06, 0x0302);
+                rtl8168_mdio_write(tp, 0x06, 0x2134);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x81ad);
+                rtl8168_mdio_write(tp, 0x06, 0x2109);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x2eac);
+                rtl8168_mdio_write(tp, 0x06, 0x2003);
+                rtl8168_mdio_write(tp, 0x06, 0x0283);
+                rtl8168_mdio_write(tp, 0x06, 0x52e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b87);
+                rtl8168_mdio_write(tp, 0x06, 0xad24);
+                rtl8168_mdio_write(tp, 0x06, 0x09e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b2e);
+                rtl8168_mdio_write(tp, 0x06, 0xac21);
+                rtl8168_mdio_write(tp, 0x06, 0x0302);
+                rtl8168_mdio_write(tp, 0x06, 0x8337);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xf8e1);
+                rtl8168_mdio_write(tp, 0x06, 0x8b2e);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x81ad);
+                rtl8168_mdio_write(tp, 0x06, 0x2608);
+                rtl8168_mdio_write(tp, 0x06, 0xe085);
+                rtl8168_mdio_write(tp, 0x06, 0xd2ad);
+                rtl8168_mdio_write(tp, 0x06, 0x2502);
+                rtl8168_mdio_write(tp, 0x06, 0xf628);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x81ad);
+                rtl8168_mdio_write(tp, 0x06, 0x210a);
+                rtl8168_mdio_write(tp, 0x06, 0xe086);
+                rtl8168_mdio_write(tp, 0x06, 0x0af6);
+                rtl8168_mdio_write(tp, 0x06, 0x27a0);
+                rtl8168_mdio_write(tp, 0x06, 0x0502);
+                rtl8168_mdio_write(tp, 0x06, 0xf629);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x87ad);
+                rtl8168_mdio_write(tp, 0x06, 0x2408);
+                rtl8168_mdio_write(tp, 0x06, 0xe08a);
+                rtl8168_mdio_write(tp, 0x06, 0xedad);
+                rtl8168_mdio_write(tp, 0x06, 0x2002);
+                rtl8168_mdio_write(tp, 0x06, 0xf62a);
+                rtl8168_mdio_write(tp, 0x06, 0xe58b);
+                rtl8168_mdio_write(tp, 0x06, 0x2ea1);
+                rtl8168_mdio_write(tp, 0x06, 0x0003);
+                rtl8168_mdio_write(tp, 0x06, 0x0221);
+                rtl8168_mdio_write(tp, 0x06, 0x11fc);
+                rtl8168_mdio_write(tp, 0x06, 0x04ee);
+                rtl8168_mdio_write(tp, 0x06, 0x8aed);
+                rtl8168_mdio_write(tp, 0x06, 0x00ee);
+                rtl8168_mdio_write(tp, 0x06, 0x8aec);
+                rtl8168_mdio_write(tp, 0x06, 0x0004);
+                rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b87);
+                rtl8168_mdio_write(tp, 0x06, 0xad24);
+                rtl8168_mdio_write(tp, 0x06, 0x3ae0);
+                rtl8168_mdio_write(tp, 0x06, 0xe0ea);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+                rtl8168_mdio_write(tp, 0x06, 0xeb58);
+                rtl8168_mdio_write(tp, 0x06, 0xf8d1);
+                rtl8168_mdio_write(tp, 0x06, 0x01e4);
+                rtl8168_mdio_write(tp, 0x06, 0xe0ea);
+                rtl8168_mdio_write(tp, 0x06, 0xe5e0);
+                rtl8168_mdio_write(tp, 0x06, 0xebe0);
+                rtl8168_mdio_write(tp, 0x06, 0xe07c);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+                rtl8168_mdio_write(tp, 0x06, 0x7d5c);
+                rtl8168_mdio_write(tp, 0x06, 0x00ff);
+                rtl8168_mdio_write(tp, 0x06, 0x3c00);
+                rtl8168_mdio_write(tp, 0x06, 0x1eab);
+                rtl8168_mdio_write(tp, 0x06, 0x1ce0);
+                rtl8168_mdio_write(tp, 0x06, 0xe04c);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+                rtl8168_mdio_write(tp, 0x06, 0x4d58);
+                rtl8168_mdio_write(tp, 0x06, 0xc1e4);
+                rtl8168_mdio_write(tp, 0x06, 0xe04c);
+                rtl8168_mdio_write(tp, 0x06, 0xe5e0);
+                rtl8168_mdio_write(tp, 0x06, 0x4de0);
+                rtl8168_mdio_write(tp, 0x06, 0xe0ee);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+                rtl8168_mdio_write(tp, 0x06, 0xef69);
+                rtl8168_mdio_write(tp, 0x06, 0x3ce4);
+                rtl8168_mdio_write(tp, 0x06, 0xe0ee);
+                rtl8168_mdio_write(tp, 0x06, 0xe5e0);
+                rtl8168_mdio_write(tp, 0x06, 0xeffc);
+                rtl8168_mdio_write(tp, 0x06, 0x04f8);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x87ad);
+                rtl8168_mdio_write(tp, 0x06, 0x2412);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+                rtl8168_mdio_write(tp, 0x06, 0xeee1);
+                rtl8168_mdio_write(tp, 0x06, 0xe0ef);
+                rtl8168_mdio_write(tp, 0x06, 0x59c3);
+                rtl8168_mdio_write(tp, 0x06, 0xe4e0);
+                rtl8168_mdio_write(tp, 0x06, 0xeee5);
+                rtl8168_mdio_write(tp, 0x06, 0xe0ef);
+                rtl8168_mdio_write(tp, 0x06, 0xee8a);
+                rtl8168_mdio_write(tp, 0x06, 0xed01);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b81);
+                rtl8168_mdio_write(tp, 0x06, 0xac25);
+                rtl8168_mdio_write(tp, 0x06, 0x0502);
+                rtl8168_mdio_write(tp, 0x06, 0x8363);
+                rtl8168_mdio_write(tp, 0x06, 0xae03);
+                rtl8168_mdio_write(tp, 0x06, 0x0225);
+                rtl8168_mdio_write(tp, 0x06, 0x16fc);
+                rtl8168_mdio_write(tp, 0x06, 0x04f8);
+                rtl8168_mdio_write(tp, 0x06, 0xf9fa);
+                rtl8168_mdio_write(tp, 0x06, 0xef69);
+                rtl8168_mdio_write(tp, 0x06, 0xfae0);
+                rtl8168_mdio_write(tp, 0x06, 0x860a);
+                rtl8168_mdio_write(tp, 0x06, 0xa000);
+                rtl8168_mdio_write(tp, 0x06, 0x19e0);
+                rtl8168_mdio_write(tp, 0x06, 0x860b);
+                rtl8168_mdio_write(tp, 0x06, 0xe18b);
+                rtl8168_mdio_write(tp, 0x06, 0x331b);
+                rtl8168_mdio_write(tp, 0x06, 0x109e);
+                rtl8168_mdio_write(tp, 0x06, 0x04aa);
+                rtl8168_mdio_write(tp, 0x06, 0x02ae);
+                rtl8168_mdio_write(tp, 0x06, 0x06ee);
+                rtl8168_mdio_write(tp, 0x06, 0x860a);
+                rtl8168_mdio_write(tp, 0x06, 0x01ae);
+                rtl8168_mdio_write(tp, 0x06, 0xe602);
+                rtl8168_mdio_write(tp, 0x06, 0x241e);
+                rtl8168_mdio_write(tp, 0x06, 0xae14);
+                rtl8168_mdio_write(tp, 0x06, 0xa001);
+                rtl8168_mdio_write(tp, 0x06, 0x1402);
+                rtl8168_mdio_write(tp, 0x06, 0x2426);
+                rtl8168_mdio_write(tp, 0x06, 0xbf26);
+                rtl8168_mdio_write(tp, 0x06, 0x6d02);
+                rtl8168_mdio_write(tp, 0x06, 0x2eb0);
+                rtl8168_mdio_write(tp, 0x06, 0xee86);
+                rtl8168_mdio_write(tp, 0x06, 0x0b00);
+                rtl8168_mdio_write(tp, 0x06, 0xee86);
+                rtl8168_mdio_write(tp, 0x06, 0x0a02);
+                rtl8168_mdio_write(tp, 0x06, 0xaf84);
+                rtl8168_mdio_write(tp, 0x06, 0x3ca0);
+                rtl8168_mdio_write(tp, 0x06, 0x0252);
+                rtl8168_mdio_write(tp, 0x06, 0xee86);
+                rtl8168_mdio_write(tp, 0x06, 0x0400);
+                rtl8168_mdio_write(tp, 0x06, 0xee86);
+                rtl8168_mdio_write(tp, 0x06, 0x0500);
+                rtl8168_mdio_write(tp, 0x06, 0xe086);
+                rtl8168_mdio_write(tp, 0x06, 0x0be1);
+                rtl8168_mdio_write(tp, 0x06, 0x8b32);
+                rtl8168_mdio_write(tp, 0x06, 0x1b10);
+                rtl8168_mdio_write(tp, 0x06, 0x9e04);
+                rtl8168_mdio_write(tp, 0x06, 0xaa02);
+                rtl8168_mdio_write(tp, 0x06, 0xaecb);
+                rtl8168_mdio_write(tp, 0x06, 0xee86);
+                rtl8168_mdio_write(tp, 0x06, 0x0b00);
+                rtl8168_mdio_write(tp, 0x06, 0x0224);
+                rtl8168_mdio_write(tp, 0x06, 0x3ae2);
+                rtl8168_mdio_write(tp, 0x06, 0x8604);
+                rtl8168_mdio_write(tp, 0x06, 0xe386);
+                rtl8168_mdio_write(tp, 0x06, 0x05ef);
+                rtl8168_mdio_write(tp, 0x06, 0x65e2);
+                rtl8168_mdio_write(tp, 0x06, 0x8606);
+                rtl8168_mdio_write(tp, 0x06, 0xe386);
+                rtl8168_mdio_write(tp, 0x06, 0x071b);
+                rtl8168_mdio_write(tp, 0x06, 0x56aa);
+                rtl8168_mdio_write(tp, 0x06, 0x0eef);
+                rtl8168_mdio_write(tp, 0x06, 0x56e6);
+                rtl8168_mdio_write(tp, 0x06, 0x8606);
+                rtl8168_mdio_write(tp, 0x06, 0xe786);
+                rtl8168_mdio_write(tp, 0x06, 0x07e2);
+                rtl8168_mdio_write(tp, 0x06, 0x8609);
+                rtl8168_mdio_write(tp, 0x06, 0xe686);
+                rtl8168_mdio_write(tp, 0x06, 0x08e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8609);
+                rtl8168_mdio_write(tp, 0x06, 0xa000);
+                rtl8168_mdio_write(tp, 0x06, 0x07ee);
+                rtl8168_mdio_write(tp, 0x06, 0x860a);
+                rtl8168_mdio_write(tp, 0x06, 0x03af);
+                rtl8168_mdio_write(tp, 0x06, 0x8369);
+                rtl8168_mdio_write(tp, 0x06, 0x0224);
+                rtl8168_mdio_write(tp, 0x06, 0x8e02);
+                rtl8168_mdio_write(tp, 0x06, 0x2426);
+                rtl8168_mdio_write(tp, 0x06, 0xae48);
+                rtl8168_mdio_write(tp, 0x06, 0xa003);
+                rtl8168_mdio_write(tp, 0x06, 0x21e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8608);
+                rtl8168_mdio_write(tp, 0x06, 0xe186);
+                rtl8168_mdio_write(tp, 0x06, 0x091b);
+                rtl8168_mdio_write(tp, 0x06, 0x019e);
+                rtl8168_mdio_write(tp, 0x06, 0x0caa);
+                rtl8168_mdio_write(tp, 0x06, 0x0502);
+                rtl8168_mdio_write(tp, 0x06, 0x249d);
+                rtl8168_mdio_write(tp, 0x06, 0xaee7);
+                rtl8168_mdio_write(tp, 0x06, 0x0224);
+                rtl8168_mdio_write(tp, 0x06, 0x8eae);
+                rtl8168_mdio_write(tp, 0x06, 0xe2ee);
+                rtl8168_mdio_write(tp, 0x06, 0x860a);
+                rtl8168_mdio_write(tp, 0x06, 0x04ee);
+                rtl8168_mdio_write(tp, 0x06, 0x860b);
+                rtl8168_mdio_write(tp, 0x06, 0x00af);
+                rtl8168_mdio_write(tp, 0x06, 0x8369);
+                rtl8168_mdio_write(tp, 0x06, 0xa004);
+                rtl8168_mdio_write(tp, 0x06, 0x15e0);
+                rtl8168_mdio_write(tp, 0x06, 0x860b);
+                rtl8168_mdio_write(tp, 0x06, 0xe18b);
+                rtl8168_mdio_write(tp, 0x06, 0x341b);
+                rtl8168_mdio_write(tp, 0x06, 0x109e);
+                rtl8168_mdio_write(tp, 0x06, 0x05aa);
+                rtl8168_mdio_write(tp, 0x06, 0x03af);
+                rtl8168_mdio_write(tp, 0x06, 0x8383);
+                rtl8168_mdio_write(tp, 0x06, 0xee86);
+                rtl8168_mdio_write(tp, 0x06, 0x0a05);
+                rtl8168_mdio_write(tp, 0x06, 0xae0c);
+                rtl8168_mdio_write(tp, 0x06, 0xa005);
+                rtl8168_mdio_write(tp, 0x06, 0x02ae);
+                rtl8168_mdio_write(tp, 0x06, 0x0702);
+                rtl8168_mdio_write(tp, 0x06, 0x2309);
+                rtl8168_mdio_write(tp, 0x06, 0xee86);
+                rtl8168_mdio_write(tp, 0x06, 0x0a00);
+                rtl8168_mdio_write(tp, 0x06, 0xfeef);
+                rtl8168_mdio_write(tp, 0x06, 0x96fe);
+                rtl8168_mdio_write(tp, 0x06, 0xfdfc);
+                rtl8168_mdio_write(tp, 0x06, 0x04f8);
+                rtl8168_mdio_write(tp, 0x06, 0xf9fa);
+                rtl8168_mdio_write(tp, 0x06, 0xef69);
+                rtl8168_mdio_write(tp, 0x06, 0xfbe0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b85);
+                rtl8168_mdio_write(tp, 0x06, 0xad25);
+                rtl8168_mdio_write(tp, 0x06, 0x22e0);
+                rtl8168_mdio_write(tp, 0x06, 0xe022);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+                rtl8168_mdio_write(tp, 0x06, 0x23e2);
+                rtl8168_mdio_write(tp, 0x06, 0xe036);
+                rtl8168_mdio_write(tp, 0x06, 0xe3e0);
+                rtl8168_mdio_write(tp, 0x06, 0x375a);
+                rtl8168_mdio_write(tp, 0x06, 0xc40d);
+                rtl8168_mdio_write(tp, 0x06, 0x0158);
+                rtl8168_mdio_write(tp, 0x06, 0x021e);
+                rtl8168_mdio_write(tp, 0x06, 0x20e3);
+                rtl8168_mdio_write(tp, 0x06, 0x8ae7);
+                rtl8168_mdio_write(tp, 0x06, 0xac31);
+                rtl8168_mdio_write(tp, 0x06, 0x60ac);
+                rtl8168_mdio_write(tp, 0x06, 0x3a08);
+                rtl8168_mdio_write(tp, 0x06, 0xac3e);
+                rtl8168_mdio_write(tp, 0x06, 0x26ae);
+                rtl8168_mdio_write(tp, 0x06, 0x67af);
+                rtl8168_mdio_write(tp, 0x06, 0x84db);
+                rtl8168_mdio_write(tp, 0x06, 0xad37);
+                rtl8168_mdio_write(tp, 0x06, 0x61e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8ae8);
+                rtl8168_mdio_write(tp, 0x06, 0x10e4);
+                rtl8168_mdio_write(tp, 0x06, 0x8ae8);
+                rtl8168_mdio_write(tp, 0x06, 0xe18a);
+                rtl8168_mdio_write(tp, 0x06, 0xe91b);
+                rtl8168_mdio_write(tp, 0x06, 0x109e);
+                rtl8168_mdio_write(tp, 0x06, 0x02ae);
+                rtl8168_mdio_write(tp, 0x06, 0x51d1);
+                rtl8168_mdio_write(tp, 0x06, 0x00bf);
+                rtl8168_mdio_write(tp, 0x06, 0x863b);
+                rtl8168_mdio_write(tp, 0x06, 0x022f);
+                rtl8168_mdio_write(tp, 0x06, 0x50ee);
+                rtl8168_mdio_write(tp, 0x06, 0x8ae8);
+                rtl8168_mdio_write(tp, 0x06, 0x00ae);
+                rtl8168_mdio_write(tp, 0x06, 0x43ad);
+                rtl8168_mdio_write(tp, 0x06, 0x3627);
+                rtl8168_mdio_write(tp, 0x06, 0xe08a);
+                rtl8168_mdio_write(tp, 0x06, 0xeee1);
+                rtl8168_mdio_write(tp, 0x06, 0x8aef);
+                rtl8168_mdio_write(tp, 0x06, 0xef74);
+                rtl8168_mdio_write(tp, 0x06, 0xe08a);
+                rtl8168_mdio_write(tp, 0x06, 0xeae1);
+                rtl8168_mdio_write(tp, 0x06, 0x8aeb);
+                rtl8168_mdio_write(tp, 0x06, 0x1b74);
+                rtl8168_mdio_write(tp, 0x06, 0x9e2e);
+                rtl8168_mdio_write(tp, 0x06, 0x14e4);
+                rtl8168_mdio_write(tp, 0x06, 0x8aea);
+                rtl8168_mdio_write(tp, 0x06, 0xe58a);
+                rtl8168_mdio_write(tp, 0x06, 0xebef);
+                rtl8168_mdio_write(tp, 0x06, 0x74e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8aee);
+                rtl8168_mdio_write(tp, 0x06, 0xe18a);
+                rtl8168_mdio_write(tp, 0x06, 0xef1b);
+                rtl8168_mdio_write(tp, 0x06, 0x479e);
+                rtl8168_mdio_write(tp, 0x06, 0x0fae);
+                rtl8168_mdio_write(tp, 0x06, 0x19ee);
+                rtl8168_mdio_write(tp, 0x06, 0x8aea);
+                rtl8168_mdio_write(tp, 0x06, 0x00ee);
+                rtl8168_mdio_write(tp, 0x06, 0x8aeb);
+                rtl8168_mdio_write(tp, 0x06, 0x00ae);
+                rtl8168_mdio_write(tp, 0x06, 0x0fac);
+                rtl8168_mdio_write(tp, 0x06, 0x390c);
+                rtl8168_mdio_write(tp, 0x06, 0xd101);
+                rtl8168_mdio_write(tp, 0x06, 0xbf86);
+                rtl8168_mdio_write(tp, 0x06, 0x3b02);
+                rtl8168_mdio_write(tp, 0x06, 0x2f50);
+                rtl8168_mdio_write(tp, 0x06, 0xee8a);
+                rtl8168_mdio_write(tp, 0x06, 0xe800);
+                rtl8168_mdio_write(tp, 0x06, 0xe68a);
+                rtl8168_mdio_write(tp, 0x06, 0xe7ff);
+                rtl8168_mdio_write(tp, 0x06, 0xef96);
+                rtl8168_mdio_write(tp, 0x06, 0xfefd);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xf8f9);
+                rtl8168_mdio_write(tp, 0x06, 0xfaef);
+                rtl8168_mdio_write(tp, 0x06, 0x69e0);
+                rtl8168_mdio_write(tp, 0x06, 0xe022);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+                rtl8168_mdio_write(tp, 0x06, 0x2358);
+                rtl8168_mdio_write(tp, 0x06, 0xc4e1);
+                rtl8168_mdio_write(tp, 0x06, 0x8b6e);
+                rtl8168_mdio_write(tp, 0x06, 0x1f10);
+                rtl8168_mdio_write(tp, 0x06, 0x9e24);
+                rtl8168_mdio_write(tp, 0x06, 0xe48b);
+                rtl8168_mdio_write(tp, 0x06, 0x6ead);
+                rtl8168_mdio_write(tp, 0x06, 0x2218);
+                rtl8168_mdio_write(tp, 0x06, 0xac27);
+                rtl8168_mdio_write(tp, 0x06, 0x0dac);
+                rtl8168_mdio_write(tp, 0x06, 0x2605);
+                rtl8168_mdio_write(tp, 0x06, 0x0203);
+                rtl8168_mdio_write(tp, 0x06, 0x8fae);
+                rtl8168_mdio_write(tp, 0x06, 0x1302);
+                rtl8168_mdio_write(tp, 0x06, 0x03c8);
+                rtl8168_mdio_write(tp, 0x06, 0xae0e);
+                rtl8168_mdio_write(tp, 0x06, 0x0203);
+                rtl8168_mdio_write(tp, 0x06, 0xe102);
+                rtl8168_mdio_write(tp, 0x06, 0x8520);
+                rtl8168_mdio_write(tp, 0x06, 0xae06);
+                rtl8168_mdio_write(tp, 0x06, 0x0203);
+                rtl8168_mdio_write(tp, 0x06, 0x8f02);
+                rtl8168_mdio_write(tp, 0x06, 0x8566);
+                rtl8168_mdio_write(tp, 0x06, 0xef96);
+                rtl8168_mdio_write(tp, 0x06, 0xfefd);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xf8fa);
+                rtl8168_mdio_write(tp, 0x06, 0xef69);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x82ad);
+                rtl8168_mdio_write(tp, 0x06, 0x2737);
+                rtl8168_mdio_write(tp, 0x06, 0xbf86);
+                rtl8168_mdio_write(tp, 0x06, 0x4402);
+                rtl8168_mdio_write(tp, 0x06, 0x2f23);
+                rtl8168_mdio_write(tp, 0x06, 0xac28);
+                rtl8168_mdio_write(tp, 0x06, 0x2ed1);
+                rtl8168_mdio_write(tp, 0x06, 0x01bf);
+                rtl8168_mdio_write(tp, 0x06, 0x8647);
+                rtl8168_mdio_write(tp, 0x06, 0x022f);
+                rtl8168_mdio_write(tp, 0x06, 0x50bf);
+                rtl8168_mdio_write(tp, 0x06, 0x8641);
+                rtl8168_mdio_write(tp, 0x06, 0x022f);
+                rtl8168_mdio_write(tp, 0x06, 0x23e5);
+                rtl8168_mdio_write(tp, 0x06, 0x8af0);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+                rtl8168_mdio_write(tp, 0x06, 0x22e1);
+                rtl8168_mdio_write(tp, 0x06, 0xe023);
+                rtl8168_mdio_write(tp, 0x06, 0xac2e);
+                rtl8168_mdio_write(tp, 0x06, 0x04d1);
+                rtl8168_mdio_write(tp, 0x06, 0x01ae);
+                rtl8168_mdio_write(tp, 0x06, 0x02d1);
+                rtl8168_mdio_write(tp, 0x06, 0x00bf);
+                rtl8168_mdio_write(tp, 0x06, 0x8641);
+                rtl8168_mdio_write(tp, 0x06, 0x022f);
+                rtl8168_mdio_write(tp, 0x06, 0x50d1);
+                rtl8168_mdio_write(tp, 0x06, 0x01bf);
+                rtl8168_mdio_write(tp, 0x06, 0x8644);
+                rtl8168_mdio_write(tp, 0x06, 0x022f);
+                rtl8168_mdio_write(tp, 0x06, 0x50ef);
+                rtl8168_mdio_write(tp, 0x06, 0x96fe);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xf8fa);
+                rtl8168_mdio_write(tp, 0x06, 0xef69);
+                rtl8168_mdio_write(tp, 0x06, 0xbf86);
+                rtl8168_mdio_write(tp, 0x06, 0x4702);
+                rtl8168_mdio_write(tp, 0x06, 0x2f23);
+                rtl8168_mdio_write(tp, 0x06, 0xad28);
+                rtl8168_mdio_write(tp, 0x06, 0x19d1);
+                rtl8168_mdio_write(tp, 0x06, 0x00bf);
+                rtl8168_mdio_write(tp, 0x06, 0x8644);
+                rtl8168_mdio_write(tp, 0x06, 0x022f);
+                rtl8168_mdio_write(tp, 0x06, 0x50e1);
+                rtl8168_mdio_write(tp, 0x06, 0x8af0);
+                rtl8168_mdio_write(tp, 0x06, 0xbf86);
+                rtl8168_mdio_write(tp, 0x06, 0x4102);
+                rtl8168_mdio_write(tp, 0x06, 0x2f50);
+                rtl8168_mdio_write(tp, 0x06, 0xd100);
+                rtl8168_mdio_write(tp, 0x06, 0xbf86);
+                rtl8168_mdio_write(tp, 0x06, 0x4702);
+                rtl8168_mdio_write(tp, 0x06, 0x2f50);
+                rtl8168_mdio_write(tp, 0x06, 0xef96);
+                rtl8168_mdio_write(tp, 0x06, 0xfefc);
+                rtl8168_mdio_write(tp, 0x06, 0x04f8);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
+                rtl8168_mdio_write(tp, 0x06, 0xfee1);
+                rtl8168_mdio_write(tp, 0x06, 0xe2ff);
+                rtl8168_mdio_write(tp, 0x06, 0xad2e);
+                rtl8168_mdio_write(tp, 0x06, 0x63e0);
+                rtl8168_mdio_write(tp, 0x06, 0xe038);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+                rtl8168_mdio_write(tp, 0x06, 0x39ad);
+                rtl8168_mdio_write(tp, 0x06, 0x2f10);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+                rtl8168_mdio_write(tp, 0x06, 0x34e1);
+                rtl8168_mdio_write(tp, 0x06, 0xe035);
+                rtl8168_mdio_write(tp, 0x06, 0xf726);
+                rtl8168_mdio_write(tp, 0x06, 0xe4e0);
+                rtl8168_mdio_write(tp, 0x06, 0x34e5);
+                rtl8168_mdio_write(tp, 0x06, 0xe035);
+                rtl8168_mdio_write(tp, 0x06, 0xae0e);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
+                rtl8168_mdio_write(tp, 0x06, 0xd6e1);
+                rtl8168_mdio_write(tp, 0x06, 0xe2d7);
+                rtl8168_mdio_write(tp, 0x06, 0xf728);
+                rtl8168_mdio_write(tp, 0x06, 0xe4e2);
+                rtl8168_mdio_write(tp, 0x06, 0xd6e5);
+                rtl8168_mdio_write(tp, 0x06, 0xe2d7);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
+                rtl8168_mdio_write(tp, 0x06, 0x34e1);
+                rtl8168_mdio_write(tp, 0x06, 0xe235);
+                rtl8168_mdio_write(tp, 0x06, 0xf72b);
+                rtl8168_mdio_write(tp, 0x06, 0xe4e2);
+                rtl8168_mdio_write(tp, 0x06, 0x34e5);
+                rtl8168_mdio_write(tp, 0x06, 0xe235);
+                rtl8168_mdio_write(tp, 0x06, 0xd07d);
+                rtl8168_mdio_write(tp, 0x06, 0xb0fe);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
+                rtl8168_mdio_write(tp, 0x06, 0x34e1);
+                rtl8168_mdio_write(tp, 0x06, 0xe235);
+                rtl8168_mdio_write(tp, 0x06, 0xf62b);
+                rtl8168_mdio_write(tp, 0x06, 0xe4e2);
+                rtl8168_mdio_write(tp, 0x06, 0x34e5);
+                rtl8168_mdio_write(tp, 0x06, 0xe235);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+                rtl8168_mdio_write(tp, 0x06, 0x34e1);
+                rtl8168_mdio_write(tp, 0x06, 0xe035);
+                rtl8168_mdio_write(tp, 0x06, 0xf626);
+                rtl8168_mdio_write(tp, 0x06, 0xe4e0);
+                rtl8168_mdio_write(tp, 0x06, 0x34e5);
+                rtl8168_mdio_write(tp, 0x06, 0xe035);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
+                rtl8168_mdio_write(tp, 0x06, 0xd6e1);
+                rtl8168_mdio_write(tp, 0x06, 0xe2d7);
+                rtl8168_mdio_write(tp, 0x06, 0xf628);
+                rtl8168_mdio_write(tp, 0x06, 0xe4e2);
+                rtl8168_mdio_write(tp, 0x06, 0xd6e5);
+                rtl8168_mdio_write(tp, 0x06, 0xe2d7);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xae20);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0xa725);
+                rtl8168_mdio_write(tp, 0x06, 0xe50a);
+                rtl8168_mdio_write(tp, 0x06, 0x1de5);
+                rtl8168_mdio_write(tp, 0x06, 0x0a2c);
+                rtl8168_mdio_write(tp, 0x06, 0xe50a);
+                rtl8168_mdio_write(tp, 0x06, 0x6de5);
+                rtl8168_mdio_write(tp, 0x06, 0x0a1d);
+                rtl8168_mdio_write(tp, 0x06, 0xe50a);
+                rtl8168_mdio_write(tp, 0x06, 0x1ce5);
+                rtl8168_mdio_write(tp, 0x06, 0x0a2d);
+                rtl8168_mdio_write(tp, 0x06, 0xa755);
+                rtl8168_mdio_write(tp, 0x06, 0x00e2);
+                rtl8168_mdio_write(tp, 0x06, 0x3488);
+                rtl8168_mdio_write(tp, 0x06, 0xe200);
+                rtl8168_mdio_write(tp, 0x06, 0xcce2);
+                rtl8168_mdio_write(tp, 0x06, 0x0055);
+                rtl8168_mdio_write(tp, 0x06, 0xe020);
+                rtl8168_mdio_write(tp, 0x06, 0x55e2);
+                rtl8168_mdio_write(tp, 0x06, 0xd600);
+                rtl8168_mdio_write(tp, 0x06, 0xe24a);
+                gphy_val = rtl8168_mdio_read(tp, 0x01);
+                gphy_val |= BIT_0;
+                rtl8168_mdio_write(tp, 0x01, gphy_val);
+                gphy_val = rtl8168_mdio_read(tp, 0x00);
+                gphy_val |= BIT_0;
+                rtl8168_mdio_write(tp, 0x00, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                rtl8168_mdio_write(tp, 0x17, 0x2179);
+                rtl8168_mdio_write(tp, 0x1f, 0x0001);
+                rtl8168_mdio_write(tp, 0x10, 0xf274);
+                rtl8168_mdio_write(tp, 0x1f, 0x0007);
+                rtl8168_mdio_write(tp, 0x1e, 0x0042);
+                rtl8168_mdio_write(tp, 0x15, 0x0f00);
+                rtl8168_mdio_write(tp, 0x15, 0x0f00);
+                rtl8168_mdio_write(tp, 0x16, 0x7408);
+                rtl8168_mdio_write(tp, 0x15, 0x0e00);
+                rtl8168_mdio_write(tp, 0x15, 0x0f00);
+                rtl8168_mdio_write(tp, 0x15, 0x0f01);
+                rtl8168_mdio_write(tp, 0x16, 0x4000);
+                rtl8168_mdio_write(tp, 0x15, 0x0e01);
+                rtl8168_mdio_write(tp, 0x15, 0x0f01);
+                rtl8168_mdio_write(tp, 0x15, 0x0f02);
+                rtl8168_mdio_write(tp, 0x16, 0x9400);
+                rtl8168_mdio_write(tp, 0x15, 0x0e02);
+                rtl8168_mdio_write(tp, 0x15, 0x0f02);
+                rtl8168_mdio_write(tp, 0x15, 0x0f03);
+                rtl8168_mdio_write(tp, 0x16, 0x7408);
+                rtl8168_mdio_write(tp, 0x15, 0x0e03);
+                rtl8168_mdio_write(tp, 0x15, 0x0f03);
+                rtl8168_mdio_write(tp, 0x15, 0x0f04);
+                rtl8168_mdio_write(tp, 0x16, 0x4008);
+                rtl8168_mdio_write(tp, 0x15, 0x0e04);
+                rtl8168_mdio_write(tp, 0x15, 0x0f04);
+                rtl8168_mdio_write(tp, 0x15, 0x0f05);
+                rtl8168_mdio_write(tp, 0x16, 0x9400);
+                rtl8168_mdio_write(tp, 0x15, 0x0e05);
+                rtl8168_mdio_write(tp, 0x15, 0x0f05);
+                rtl8168_mdio_write(tp, 0x15, 0x0f06);
+                rtl8168_mdio_write(tp, 0x16, 0x0803);
+                rtl8168_mdio_write(tp, 0x15, 0x0e06);
+                rtl8168_mdio_write(tp, 0x15, 0x0f06);
+                rtl8168_mdio_write(tp, 0x15, 0x0d00);
+                rtl8168_mdio_write(tp, 0x15, 0x0100);
+                rtl8168_mdio_write(tp, 0x1f, 0x0001);
+                rtl8168_mdio_write(tp, 0x10, 0xf074);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                rtl8168_mdio_write(tp, 0x17, 0x2149);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                for (i = 0; i < 200; i++) {
+                        udelay(100);
+                        gphy_val = rtl8168_mdio_read(tp, 0x00);
+                        if (gphy_val & BIT_7)
+                                break;
+                }
+                rtl8168_mdio_write(tp, 0x1f, 0x0007);
+                rtl8168_mdio_write(tp, 0x1e, 0x0023);
+                gphy_val = rtl8168_mdio_read(tp, 0x17);
+                gphy_val &= ~(BIT_0);
+                if (tp->RequiredSecLanDonglePatch)
+                        gphy_val &= ~(BIT_2);
+                rtl8168_mdio_write(tp, 0x17, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                rtl8168_mdio_write(tp, 0x1f, 0x0007);
+                rtl8168_mdio_write(tp, 0x1e, 0x0023);
+                gphy_val = rtl8168_mdio_read(tp, 0x17);
+                gphy_val |= BIT_14;
+                rtl8168_mdio_write(tp, 0x17, gphy_val);
+                rtl8168_mdio_write(tp, 0x1e, 0x0020);
+                gphy_val = rtl8168_mdio_read(tp, 0x1b);
+                gphy_val |= BIT_7;
+                rtl8168_mdio_write(tp, 0x1b, gphy_val);
+                rtl8168_mdio_write(tp, 0x1e, 0x0041);
+                rtl8168_mdio_write(tp, 0x15, 0x0e02);
+                rtl8168_mdio_write(tp, 0x1e, 0x0028);
+                gphy_val = rtl8168_mdio_read(tp, 0x19);
+                gphy_val |= BIT_15;
+                rtl8168_mdio_write(tp, 0x19, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        } else {
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                rtl8168_mdio_write(tp, 0x00, 0x1800);
+                rtl8168_mdio_write(tp, 0x1f, 0x0007);
+                rtl8168_mdio_write(tp, 0x1e, 0x0023);
+                rtl8168_mdio_write(tp, 0x17, 0x0117);
+                rtl8168_mdio_write(tp, 0x1f, 0x0007);
+                rtl8168_mdio_write(tp, 0x1E, 0x002C);
+                rtl8168_mdio_write(tp, 0x1B, 0x5000);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                rtl8168_mdio_write(tp, 0x16, 0x4104);
+                for (i = 0; i < 200; i++) {
+                        udelay(100);
+                        gphy_val = rtl8168_mdio_read(tp, 0x1E);
+                        gphy_val &= 0x03FF;
+                        if (gphy_val==0x000C)
+                                break;
+                }
+                rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                for (i = 0; i < 200; i++) {
+                        udelay(100);
+                        gphy_val = rtl8168_mdio_read(tp, 0x07);
+                        if ((gphy_val & BIT_5) == 0)
+                                break;
+                }
+                gphy_val = rtl8168_mdio_read(tp, 0x07);
+                if (gphy_val & BIT_5) {
+                        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+                        rtl8168_mdio_write(tp, 0x1e, 0x00a1);
+                        rtl8168_mdio_write(tp, 0x17, 0x1000);
+                        rtl8168_mdio_write(tp, 0x17, 0x0000);
+                        rtl8168_mdio_write(tp, 0x17, 0x2000);
+                        rtl8168_mdio_write(tp, 0x1e, 0x002f);
+                        rtl8168_mdio_write(tp, 0x18, 0x9bfb);
+                        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                        rtl8168_mdio_write(tp, 0x07, 0x0000);
+                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                }
+                rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0xfff6);
+                rtl8168_mdio_write(tp, 0x06, 0x0080);
+                gphy_val = rtl8168_mdio_read(tp, 0x00);
+                gphy_val &= ~(BIT_7);
+                rtl8168_mdio_write(tp, 0x00, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0002);
+                gphy_val = rtl8168_mdio_read(tp, 0x08);
+                gphy_val &= ~(BIT_7);
+                rtl8168_mdio_write(tp, 0x08, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0007);
+                rtl8168_mdio_write(tp, 0x1e, 0x0023);
+                rtl8168_mdio_write(tp, 0x16, 0x0306);
+                rtl8168_mdio_write(tp, 0x16, 0x0307);
+                rtl8168_mdio_write(tp, 0x15, 0x000e);
+                rtl8168_mdio_write(tp, 0x19, 0x000a);
+                rtl8168_mdio_write(tp, 0x15, 0x0010);
+                rtl8168_mdio_write(tp, 0x19, 0x0008);
+                rtl8168_mdio_write(tp, 0x15, 0x0018);
+                rtl8168_mdio_write(tp, 0x19, 0x4801);
+                rtl8168_mdio_write(tp, 0x15, 0x0019);
+                rtl8168_mdio_write(tp, 0x19, 0x6801);
+                rtl8168_mdio_write(tp, 0x15, 0x001a);
+                rtl8168_mdio_write(tp, 0x19, 0x66a1);
+                rtl8168_mdio_write(tp, 0x15, 0x001f);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0020);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0021);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0022);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0023);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0024);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0025);
+                rtl8168_mdio_write(tp, 0x19, 0x64a1);
+                rtl8168_mdio_write(tp, 0x15, 0x0026);
+                rtl8168_mdio_write(tp, 0x19, 0x40ea);
+                rtl8168_mdio_write(tp, 0x15, 0x0027);
+                rtl8168_mdio_write(tp, 0x19, 0x4503);
+                rtl8168_mdio_write(tp, 0x15, 0x0028);
+                rtl8168_mdio_write(tp, 0x19, 0x9f00);
+                rtl8168_mdio_write(tp, 0x15, 0x0029);
+                rtl8168_mdio_write(tp, 0x19, 0xa631);
+                rtl8168_mdio_write(tp, 0x15, 0x002a);
+                rtl8168_mdio_write(tp, 0x19, 0x9717);
+                rtl8168_mdio_write(tp, 0x15, 0x002b);
+                rtl8168_mdio_write(tp, 0x19, 0x302c);
+                rtl8168_mdio_write(tp, 0x15, 0x002c);
+                rtl8168_mdio_write(tp, 0x19, 0x4802);
+                rtl8168_mdio_write(tp, 0x15, 0x002d);
+                rtl8168_mdio_write(tp, 0x19, 0x58da);
+                rtl8168_mdio_write(tp, 0x15, 0x002e);
+                rtl8168_mdio_write(tp, 0x19, 0x400d);
+                rtl8168_mdio_write(tp, 0x15, 0x002f);
+                rtl8168_mdio_write(tp, 0x19, 0x4488);
+                rtl8168_mdio_write(tp, 0x15, 0x0030);
+                rtl8168_mdio_write(tp, 0x19, 0x9e00);
+                rtl8168_mdio_write(tp, 0x15, 0x0031);
+                rtl8168_mdio_write(tp, 0x19, 0x63c8);
+                rtl8168_mdio_write(tp, 0x15, 0x0032);
+                rtl8168_mdio_write(tp, 0x19, 0x6481);
+                rtl8168_mdio_write(tp, 0x15, 0x0033);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0034);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0035);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0036);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0037);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0038);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0039);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x003a);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x003b);
+                rtl8168_mdio_write(tp, 0x19, 0x63e8);
+                rtl8168_mdio_write(tp, 0x15, 0x003c);
+                rtl8168_mdio_write(tp, 0x19, 0x7d00);
+                rtl8168_mdio_write(tp, 0x15, 0x003d);
+                rtl8168_mdio_write(tp, 0x19, 0x59d4);
+                rtl8168_mdio_write(tp, 0x15, 0x003e);
+                rtl8168_mdio_write(tp, 0x19, 0x63f8);
+                rtl8168_mdio_write(tp, 0x15, 0x0040);
+                rtl8168_mdio_write(tp, 0x19, 0x64a1);
+                rtl8168_mdio_write(tp, 0x15, 0x0041);
+                rtl8168_mdio_write(tp, 0x19, 0x30de);
+                rtl8168_mdio_write(tp, 0x15, 0x0044);
+                rtl8168_mdio_write(tp, 0x19, 0x480f);
+                rtl8168_mdio_write(tp, 0x15, 0x0045);
+                rtl8168_mdio_write(tp, 0x19, 0x6800);
+                rtl8168_mdio_write(tp, 0x15, 0x0046);
+                rtl8168_mdio_write(tp, 0x19, 0x6680);
+                rtl8168_mdio_write(tp, 0x15, 0x0047);
+                rtl8168_mdio_write(tp, 0x19, 0x7c10);
+                rtl8168_mdio_write(tp, 0x15, 0x0048);
+                rtl8168_mdio_write(tp, 0x19, 0x63c8);
+                rtl8168_mdio_write(tp, 0x15, 0x0049);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x004a);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x004b);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x004c);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x004d);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x004e);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x004f);
+                rtl8168_mdio_write(tp, 0x19, 0x40ea);
+                rtl8168_mdio_write(tp, 0x15, 0x0050);
+                rtl8168_mdio_write(tp, 0x19, 0x4503);
+                rtl8168_mdio_write(tp, 0x15, 0x0051);
+                rtl8168_mdio_write(tp, 0x19, 0x58ca);
+                rtl8168_mdio_write(tp, 0x15, 0x0052);
+                rtl8168_mdio_write(tp, 0x19, 0x63c8);
+                rtl8168_mdio_write(tp, 0x15, 0x0053);
+                rtl8168_mdio_write(tp, 0x19, 0x63d8);
+                rtl8168_mdio_write(tp, 0x15, 0x0054);
+                rtl8168_mdio_write(tp, 0x19, 0x66a0);
+                rtl8168_mdio_write(tp, 0x15, 0x0055);
+                rtl8168_mdio_write(tp, 0x19, 0x9f00);
+                rtl8168_mdio_write(tp, 0x15, 0x0056);
+                rtl8168_mdio_write(tp, 0x19, 0x3000);
+                rtl8168_mdio_write(tp, 0x15, 0x00a1);
+                rtl8168_mdio_write(tp, 0x19, 0x3044);
+                rtl8168_mdio_write(tp, 0x15, 0x00ab);
+                rtl8168_mdio_write(tp, 0x19, 0x5820);
+                rtl8168_mdio_write(tp, 0x15, 0x00ac);
+                rtl8168_mdio_write(tp, 0x19, 0x5e04);
+                rtl8168_mdio_write(tp, 0x15, 0x00ad);
+                rtl8168_mdio_write(tp, 0x19, 0xb60c);
+                rtl8168_mdio_write(tp, 0x15, 0x00af);
+                rtl8168_mdio_write(tp, 0x19, 0x000a);
+                rtl8168_mdio_write(tp, 0x15, 0x00b2);
+                rtl8168_mdio_write(tp, 0x19, 0x30b9);
+                rtl8168_mdio_write(tp, 0x15, 0x00b9);
+                rtl8168_mdio_write(tp, 0x19, 0x4408);
+                rtl8168_mdio_write(tp, 0x15, 0x00ba);
+                rtl8168_mdio_write(tp, 0x19, 0x480b);
+                rtl8168_mdio_write(tp, 0x15, 0x00bb);
+                rtl8168_mdio_write(tp, 0x19, 0x5e00);
+                rtl8168_mdio_write(tp, 0x15, 0x00bc);
+                rtl8168_mdio_write(tp, 0x19, 0x405f);
+                rtl8168_mdio_write(tp, 0x15, 0x00bd);
+                rtl8168_mdio_write(tp, 0x19, 0x4448);
+                rtl8168_mdio_write(tp, 0x15, 0x00be);
+                rtl8168_mdio_write(tp, 0x19, 0x4020);
+                rtl8168_mdio_write(tp, 0x15, 0x00bf);
+                rtl8168_mdio_write(tp, 0x19, 0x4468);
+                rtl8168_mdio_write(tp, 0x15, 0x00c0);
+                rtl8168_mdio_write(tp, 0x19, 0x9c02);
+                rtl8168_mdio_write(tp, 0x15, 0x00c1);
+                rtl8168_mdio_write(tp, 0x19, 0x58a0);
+                rtl8168_mdio_write(tp, 0x15, 0x00c2);
+                rtl8168_mdio_write(tp, 0x19, 0xb605);
+                rtl8168_mdio_write(tp, 0x15, 0x00c3);
+                rtl8168_mdio_write(tp, 0x19, 0xc0d3);
+                rtl8168_mdio_write(tp, 0x15, 0x00c4);
+                rtl8168_mdio_write(tp, 0x19, 0x00e6);
+                rtl8168_mdio_write(tp, 0x15, 0x00c5);
+                rtl8168_mdio_write(tp, 0x19, 0xdaec);
+                rtl8168_mdio_write(tp, 0x15, 0x00c6);
+                rtl8168_mdio_write(tp, 0x19, 0x00fa);
+                rtl8168_mdio_write(tp, 0x15, 0x00c7);
+                rtl8168_mdio_write(tp, 0x19, 0x9df9);
+                rtl8168_mdio_write(tp, 0x15, 0x0112);
+                rtl8168_mdio_write(tp, 0x19, 0x6421);
+                rtl8168_mdio_write(tp, 0x15, 0x0113);
+                rtl8168_mdio_write(tp, 0x19, 0x7c08);
+                rtl8168_mdio_write(tp, 0x15, 0x0114);
+                rtl8168_mdio_write(tp, 0x19, 0x63f0);
+                rtl8168_mdio_write(tp, 0x15, 0x0115);
+                rtl8168_mdio_write(tp, 0x19, 0x4003);
+                rtl8168_mdio_write(tp, 0x15, 0x0116);
+                rtl8168_mdio_write(tp, 0x19, 0x4418);
+                rtl8168_mdio_write(tp, 0x15, 0x0117);
+                rtl8168_mdio_write(tp, 0x19, 0x9b00);
+                rtl8168_mdio_write(tp, 0x15, 0x0118);
+                rtl8168_mdio_write(tp, 0x19, 0x6461);
+                rtl8168_mdio_write(tp, 0x15, 0x0119);
+                rtl8168_mdio_write(tp, 0x19, 0x64e1);
+                rtl8168_mdio_write(tp, 0x15, 0x011a);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0150);
+                rtl8168_mdio_write(tp, 0x19, 0x7c80);
+                rtl8168_mdio_write(tp, 0x15, 0x0151);
+                rtl8168_mdio_write(tp, 0x19, 0x6461);
+                rtl8168_mdio_write(tp, 0x15, 0x0152);
+                rtl8168_mdio_write(tp, 0x19, 0x4003);
+                rtl8168_mdio_write(tp, 0x15, 0x0153);
+                rtl8168_mdio_write(tp, 0x19, 0x4540);
+                rtl8168_mdio_write(tp, 0x15, 0x0154);
+                rtl8168_mdio_write(tp, 0x19, 0x9f00);
+                rtl8168_mdio_write(tp, 0x15, 0x0155);
+                rtl8168_mdio_write(tp, 0x19, 0x9d00);
+                rtl8168_mdio_write(tp, 0x15, 0x0156);
+                rtl8168_mdio_write(tp, 0x19, 0x7c40);
+                rtl8168_mdio_write(tp, 0x15, 0x0157);
+                rtl8168_mdio_write(tp, 0x19, 0x6421);
+                rtl8168_mdio_write(tp, 0x15, 0x0158);
+                rtl8168_mdio_write(tp, 0x19, 0x7c80);
+                rtl8168_mdio_write(tp, 0x15, 0x0159);
+                rtl8168_mdio_write(tp, 0x19, 0x64a1);
+                rtl8168_mdio_write(tp, 0x15, 0x015a);
+                rtl8168_mdio_write(tp, 0x19, 0x30fe);
+                rtl8168_mdio_write(tp, 0x15, 0x029c);
+                rtl8168_mdio_write(tp, 0x19, 0x0070);
+                rtl8168_mdio_write(tp, 0x15, 0x02b2);
+                rtl8168_mdio_write(tp, 0x19, 0x005a);
+                rtl8168_mdio_write(tp, 0x15, 0x02bd);
+                rtl8168_mdio_write(tp, 0x19, 0xa522);
+                rtl8168_mdio_write(tp, 0x15, 0x02ce);
+                rtl8168_mdio_write(tp, 0x19, 0xb63e);
+                rtl8168_mdio_write(tp, 0x15, 0x02d9);
+                rtl8168_mdio_write(tp, 0x19, 0x32df);
+                rtl8168_mdio_write(tp, 0x15, 0x02df);
+                rtl8168_mdio_write(tp, 0x19, 0x4500);
+                rtl8168_mdio_write(tp, 0x15, 0x02f4);
+                rtl8168_mdio_write(tp, 0x19, 0xb618);
+                rtl8168_mdio_write(tp, 0x15, 0x02fb);
+                rtl8168_mdio_write(tp, 0x19, 0xb900);
+                rtl8168_mdio_write(tp, 0x15, 0x02fc);
+                rtl8168_mdio_write(tp, 0x19, 0x49b5);
+                rtl8168_mdio_write(tp, 0x15, 0x02fd);
+                rtl8168_mdio_write(tp, 0x19, 0x6812);
+                rtl8168_mdio_write(tp, 0x15, 0x02fe);
+                rtl8168_mdio_write(tp, 0x19, 0x66a0);
+                rtl8168_mdio_write(tp, 0x15, 0x02ff);
+                rtl8168_mdio_write(tp, 0x19, 0x9900);
+                rtl8168_mdio_write(tp, 0x15, 0x0300);
+                rtl8168_mdio_write(tp, 0x19, 0x64a0);
+                rtl8168_mdio_write(tp, 0x15, 0x0301);
+                rtl8168_mdio_write(tp, 0x19, 0x3316);
+                rtl8168_mdio_write(tp, 0x15, 0x0308);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x030c);
+                rtl8168_mdio_write(tp, 0x19, 0x3000);
+                rtl8168_mdio_write(tp, 0x15, 0x0312);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0313);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0314);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0315);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0316);
+                rtl8168_mdio_write(tp, 0x19, 0x49b5);
+                rtl8168_mdio_write(tp, 0x15, 0x0317);
+                rtl8168_mdio_write(tp, 0x19, 0x7d00);
+                rtl8168_mdio_write(tp, 0x15, 0x0318);
+                rtl8168_mdio_write(tp, 0x19, 0x4d00);
+                rtl8168_mdio_write(tp, 0x15, 0x0319);
+                rtl8168_mdio_write(tp, 0x19, 0x6810);
+                rtl8168_mdio_write(tp, 0x15, 0x031a);
+                rtl8168_mdio_write(tp, 0x19, 0x6c08);
+                rtl8168_mdio_write(tp, 0x15, 0x031b);
+                rtl8168_mdio_write(tp, 0x19, 0x4925);
+                rtl8168_mdio_write(tp, 0x15, 0x031c);
+                rtl8168_mdio_write(tp, 0x19, 0x403b);
+                rtl8168_mdio_write(tp, 0x15, 0x031d);
+                rtl8168_mdio_write(tp, 0x19, 0xa602);
+                rtl8168_mdio_write(tp, 0x15, 0x031e);
+                rtl8168_mdio_write(tp, 0x19, 0x402f);
+                rtl8168_mdio_write(tp, 0x15, 0x031f);
+                rtl8168_mdio_write(tp, 0x19, 0x4484);
+                rtl8168_mdio_write(tp, 0x15, 0x0320);
+                rtl8168_mdio_write(tp, 0x19, 0x40c8);
+                rtl8168_mdio_write(tp, 0x15, 0x0321);
+                rtl8168_mdio_write(tp, 0x19, 0x44c4);
+                rtl8168_mdio_write(tp, 0x15, 0x0322);
+                rtl8168_mdio_write(tp, 0x19, 0x404f);
+                rtl8168_mdio_write(tp, 0x15, 0x0323);
+                rtl8168_mdio_write(tp, 0x19, 0x44c8);
+                rtl8168_mdio_write(tp, 0x15, 0x0324);
+                rtl8168_mdio_write(tp, 0x19, 0xd64f);
+                rtl8168_mdio_write(tp, 0x15, 0x0325);
+                rtl8168_mdio_write(tp, 0x19, 0x00e7);
+                rtl8168_mdio_write(tp, 0x15, 0x0326);
+                rtl8168_mdio_write(tp, 0x19, 0x7c08);
+                rtl8168_mdio_write(tp, 0x15, 0x0327);
+                rtl8168_mdio_write(tp, 0x19, 0x8203);
+                rtl8168_mdio_write(tp, 0x15, 0x0328);
+                rtl8168_mdio_write(tp, 0x19, 0x4d48);
+                rtl8168_mdio_write(tp, 0x15, 0x0329);
+                rtl8168_mdio_write(tp, 0x19, 0x332b);
+                rtl8168_mdio_write(tp, 0x15, 0x032a);
+                rtl8168_mdio_write(tp, 0x19, 0x4d40);
+                rtl8168_mdio_write(tp, 0x15, 0x032c);
+                rtl8168_mdio_write(tp, 0x19, 0x00f8);
+                rtl8168_mdio_write(tp, 0x15, 0x032d);
+                rtl8168_mdio_write(tp, 0x19, 0x82b2);
+                rtl8168_mdio_write(tp, 0x15, 0x032f);
+                rtl8168_mdio_write(tp, 0x19, 0x00b0);
+                rtl8168_mdio_write(tp, 0x15, 0x0332);
+                rtl8168_mdio_write(tp, 0x19, 0x91f2);
+                rtl8168_mdio_write(tp, 0x15, 0x033f);
+                rtl8168_mdio_write(tp, 0x19, 0xb6cd);
+                rtl8168_mdio_write(tp, 0x15, 0x0340);
+                rtl8168_mdio_write(tp, 0x19, 0x9e01);
+                rtl8168_mdio_write(tp, 0x15, 0x0341);
+                rtl8168_mdio_write(tp, 0x19, 0xd11d);
+                rtl8168_mdio_write(tp, 0x15, 0x0342);
+                rtl8168_mdio_write(tp, 0x19, 0x009d);
+                rtl8168_mdio_write(tp, 0x15, 0x0343);
+                rtl8168_mdio_write(tp, 0x19, 0xbb1c);
+                rtl8168_mdio_write(tp, 0x15, 0x0344);
+                rtl8168_mdio_write(tp, 0x19, 0x8102);
+                rtl8168_mdio_write(tp, 0x15, 0x0345);
+                rtl8168_mdio_write(tp, 0x19, 0x3348);
+                rtl8168_mdio_write(tp, 0x15, 0x0346);
+                rtl8168_mdio_write(tp, 0x19, 0xa231);
+                rtl8168_mdio_write(tp, 0x15, 0x0347);
+                rtl8168_mdio_write(tp, 0x19, 0x335b);
+                rtl8168_mdio_write(tp, 0x15, 0x0348);
+                rtl8168_mdio_write(tp, 0x19, 0x91f7);
+                rtl8168_mdio_write(tp, 0x15, 0x0349);
+                rtl8168_mdio_write(tp, 0x19, 0xc218);
+                rtl8168_mdio_write(tp, 0x15, 0x034a);
+                rtl8168_mdio_write(tp, 0x19, 0x00f5);
+                rtl8168_mdio_write(tp, 0x15, 0x034b);
+                rtl8168_mdio_write(tp, 0x19, 0x335b);
+                rtl8168_mdio_write(tp, 0x15, 0x034c);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x034d);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x034e);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x034f);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x0350);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x035b);
+                rtl8168_mdio_write(tp, 0x19, 0xa23c);
+                rtl8168_mdio_write(tp, 0x15, 0x035c);
+                rtl8168_mdio_write(tp, 0x19, 0x7c08);
+                rtl8168_mdio_write(tp, 0x15, 0x035d);
+                rtl8168_mdio_write(tp, 0x19, 0x4c00);
+                rtl8168_mdio_write(tp, 0x15, 0x035e);
+                rtl8168_mdio_write(tp, 0x19, 0x3397);
+                rtl8168_mdio_write(tp, 0x15, 0x0363);
+                rtl8168_mdio_write(tp, 0x19, 0xb6a9);
+                rtl8168_mdio_write(tp, 0x15, 0x0366);
+                rtl8168_mdio_write(tp, 0x19, 0x00f5);
+                rtl8168_mdio_write(tp, 0x15, 0x0382);
+                rtl8168_mdio_write(tp, 0x19, 0x7c40);
+                rtl8168_mdio_write(tp, 0x15, 0x0388);
+                rtl8168_mdio_write(tp, 0x19, 0x0084);
+                rtl8168_mdio_write(tp, 0x15, 0x0389);
+                rtl8168_mdio_write(tp, 0x19, 0xdd17);
+                rtl8168_mdio_write(tp, 0x15, 0x038a);
+                rtl8168_mdio_write(tp, 0x19, 0x000b);
+                rtl8168_mdio_write(tp, 0x15, 0x038b);
+                rtl8168_mdio_write(tp, 0x19, 0xa10a);
+                rtl8168_mdio_write(tp, 0x15, 0x038c);
+                rtl8168_mdio_write(tp, 0x19, 0x337e);
+                rtl8168_mdio_write(tp, 0x15, 0x038d);
+                rtl8168_mdio_write(tp, 0x19, 0x6c0b);
+                rtl8168_mdio_write(tp, 0x15, 0x038e);
+                rtl8168_mdio_write(tp, 0x19, 0xa107);
+                rtl8168_mdio_write(tp, 0x15, 0x038f);
+                rtl8168_mdio_write(tp, 0x19, 0x6c08);
+                rtl8168_mdio_write(tp, 0x15, 0x0390);
+                rtl8168_mdio_write(tp, 0x19, 0xc017);
+                rtl8168_mdio_write(tp, 0x15, 0x0391);
+                rtl8168_mdio_write(tp, 0x19, 0x0004);
+                rtl8168_mdio_write(tp, 0x15, 0x0392);
+                rtl8168_mdio_write(tp, 0x19, 0xd64f);
+                rtl8168_mdio_write(tp, 0x15, 0x0393);
+                rtl8168_mdio_write(tp, 0x19, 0x00f4);
+                rtl8168_mdio_write(tp, 0x15, 0x0397);
+                rtl8168_mdio_write(tp, 0x19, 0x4098);
+                rtl8168_mdio_write(tp, 0x15, 0x0398);
+                rtl8168_mdio_write(tp, 0x19, 0x4408);
+                rtl8168_mdio_write(tp, 0x15, 0x0399);
+                rtl8168_mdio_write(tp, 0x19, 0x55bf);
+                rtl8168_mdio_write(tp, 0x15, 0x039a);
+                rtl8168_mdio_write(tp, 0x19, 0x4bb9);
+                rtl8168_mdio_write(tp, 0x15, 0x039b);
+                rtl8168_mdio_write(tp, 0x19, 0x6810);
+                rtl8168_mdio_write(tp, 0x15, 0x039c);
+                rtl8168_mdio_write(tp, 0x19, 0x4b29);
+                rtl8168_mdio_write(tp, 0x15, 0x039d);
+                rtl8168_mdio_write(tp, 0x19, 0x4041);
+                rtl8168_mdio_write(tp, 0x15, 0x039e);
+                rtl8168_mdio_write(tp, 0x19, 0x442a);
+                rtl8168_mdio_write(tp, 0x15, 0x039f);
+                rtl8168_mdio_write(tp, 0x19, 0x4029);
+                rtl8168_mdio_write(tp, 0x15, 0x03aa);
+                rtl8168_mdio_write(tp, 0x19, 0x33b8);
+                rtl8168_mdio_write(tp, 0x15, 0x03b6);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03b7);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03b8);
+                rtl8168_mdio_write(tp, 0x19, 0x543f);
+                rtl8168_mdio_write(tp, 0x15, 0x03b9);
+                rtl8168_mdio_write(tp, 0x19, 0x499a);
+                rtl8168_mdio_write(tp, 0x15, 0x03ba);
+                rtl8168_mdio_write(tp, 0x19, 0x7c40);
+                rtl8168_mdio_write(tp, 0x15, 0x03bb);
+                rtl8168_mdio_write(tp, 0x19, 0x4c40);
+                rtl8168_mdio_write(tp, 0x15, 0x03bc);
+                rtl8168_mdio_write(tp, 0x19, 0x490a);
+                rtl8168_mdio_write(tp, 0x15, 0x03bd);
+                rtl8168_mdio_write(tp, 0x19, 0x405e);
+                rtl8168_mdio_write(tp, 0x15, 0x03c2);
+                rtl8168_mdio_write(tp, 0x19, 0x9a03);
+                rtl8168_mdio_write(tp, 0x15, 0x03c4);
+                rtl8168_mdio_write(tp, 0x19, 0x0015);
+                rtl8168_mdio_write(tp, 0x15, 0x03c5);
+                rtl8168_mdio_write(tp, 0x19, 0x9e03);
+                rtl8168_mdio_write(tp, 0x15, 0x03c8);
+                rtl8168_mdio_write(tp, 0x19, 0x9cf7);
+                rtl8168_mdio_write(tp, 0x15, 0x03c9);
+                rtl8168_mdio_write(tp, 0x19, 0x7c12);
+                rtl8168_mdio_write(tp, 0x15, 0x03ca);
+                rtl8168_mdio_write(tp, 0x19, 0x4c52);
+                rtl8168_mdio_write(tp, 0x15, 0x03cb);
+                rtl8168_mdio_write(tp, 0x19, 0x4458);
+                rtl8168_mdio_write(tp, 0x15, 0x03cd);
+                rtl8168_mdio_write(tp, 0x19, 0x4c40);
+                rtl8168_mdio_write(tp, 0x15, 0x03ce);
+                rtl8168_mdio_write(tp, 0x19, 0x33bf);
+                rtl8168_mdio_write(tp, 0x15, 0x03cf);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03d0);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03d1);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03d5);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03d6);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03d7);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03d8);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03d9);
+                rtl8168_mdio_write(tp, 0x19, 0x49bb);
+                rtl8168_mdio_write(tp, 0x15, 0x03da);
+                rtl8168_mdio_write(tp, 0x19, 0x4478);
+                rtl8168_mdio_write(tp, 0x15, 0x03db);
+                rtl8168_mdio_write(tp, 0x19, 0x492b);
+                rtl8168_mdio_write(tp, 0x15, 0x03dc);
+                rtl8168_mdio_write(tp, 0x19, 0x7c01);
+                rtl8168_mdio_write(tp, 0x15, 0x03dd);
+                rtl8168_mdio_write(tp, 0x19, 0x4c00);
+                rtl8168_mdio_write(tp, 0x15, 0x03de);
+                rtl8168_mdio_write(tp, 0x19, 0xbd1a);
+                rtl8168_mdio_write(tp, 0x15, 0x03df);
+                rtl8168_mdio_write(tp, 0x19, 0xc428);
+                rtl8168_mdio_write(tp, 0x15, 0x03e0);
+                rtl8168_mdio_write(tp, 0x19, 0x0008);
+                rtl8168_mdio_write(tp, 0x15, 0x03e1);
+                rtl8168_mdio_write(tp, 0x19, 0x9cfd);
+                rtl8168_mdio_write(tp, 0x15, 0x03e2);
+                rtl8168_mdio_write(tp, 0x19, 0x7c12);
+                rtl8168_mdio_write(tp, 0x15, 0x03e3);
+                rtl8168_mdio_write(tp, 0x19, 0x4c52);
+                rtl8168_mdio_write(tp, 0x15, 0x03e4);
+                rtl8168_mdio_write(tp, 0x19, 0x4458);
+                rtl8168_mdio_write(tp, 0x15, 0x03e5);
+                rtl8168_mdio_write(tp, 0x19, 0x7c12);
+                rtl8168_mdio_write(tp, 0x15, 0x03e6);
+                rtl8168_mdio_write(tp, 0x19, 0x4c40);
+                rtl8168_mdio_write(tp, 0x15, 0x03e7);
+                rtl8168_mdio_write(tp, 0x19, 0x33de);
+                rtl8168_mdio_write(tp, 0x15, 0x03e8);
+                rtl8168_mdio_write(tp, 0x19, 0xc218);
+                rtl8168_mdio_write(tp, 0x15, 0x03e9);
+                rtl8168_mdio_write(tp, 0x19, 0x0002);
+                rtl8168_mdio_write(tp, 0x15, 0x03ea);
+                rtl8168_mdio_write(tp, 0x19, 0x32df);
+                rtl8168_mdio_write(tp, 0x15, 0x03eb);
+                rtl8168_mdio_write(tp, 0x19, 0x3316);
+                rtl8168_mdio_write(tp, 0x15, 0x03ec);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03ed);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03ee);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03ef);
+                rtl8168_mdio_write(tp, 0x19, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x03f7);
+                rtl8168_mdio_write(tp, 0x19, 0x330c);
+                rtl8168_mdio_write(tp, 0x16, 0x0306);
+                rtl8168_mdio_write(tp, 0x16, 0x0300);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0xfff6);
+                rtl8168_mdio_write(tp, 0x06, 0x0080);
+                rtl8168_mdio_write(tp, 0x05, 0x8000);
+                rtl8168_mdio_write(tp, 0x06, 0x0280);
+                rtl8168_mdio_write(tp, 0x06, 0x48f7);
+                rtl8168_mdio_write(tp, 0x06, 0x00e0);
+                rtl8168_mdio_write(tp, 0x06, 0xfff7);
+                rtl8168_mdio_write(tp, 0x06, 0xa080);
+                rtl8168_mdio_write(tp, 0x06, 0x02ae);
+                rtl8168_mdio_write(tp, 0x06, 0xf602);
+                rtl8168_mdio_write(tp, 0x06, 0x0200);
+                rtl8168_mdio_write(tp, 0x06, 0x0280);
+                rtl8168_mdio_write(tp, 0x06, 0x9002);
+                rtl8168_mdio_write(tp, 0x06, 0x0224);
+                rtl8168_mdio_write(tp, 0x06, 0x0202);
+                rtl8168_mdio_write(tp, 0x06, 0x3402);
+                rtl8168_mdio_write(tp, 0x06, 0x027f);
+                rtl8168_mdio_write(tp, 0x06, 0x0280);
+                rtl8168_mdio_write(tp, 0x06, 0xa602);
+                rtl8168_mdio_write(tp, 0x06, 0x80bf);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x88e1);
+                rtl8168_mdio_write(tp, 0x06, 0x8b89);
+                rtl8168_mdio_write(tp, 0x06, 0x1e01);
+                rtl8168_mdio_write(tp, 0x06, 0xe18b);
+                rtl8168_mdio_write(tp, 0x06, 0x8a1e);
+                rtl8168_mdio_write(tp, 0x06, 0x01e1);
+                rtl8168_mdio_write(tp, 0x06, 0x8b8b);
+                rtl8168_mdio_write(tp, 0x06, 0x1e01);
+                rtl8168_mdio_write(tp, 0x06, 0xe18b);
+                rtl8168_mdio_write(tp, 0x06, 0x8c1e);
+                rtl8168_mdio_write(tp, 0x06, 0x01e1);
+                rtl8168_mdio_write(tp, 0x06, 0x8b8d);
+                rtl8168_mdio_write(tp, 0x06, 0x1e01);
+                rtl8168_mdio_write(tp, 0x06, 0xe18b);
+                rtl8168_mdio_write(tp, 0x06, 0x8e1e);
+                rtl8168_mdio_write(tp, 0x06, 0x01a0);
+                rtl8168_mdio_write(tp, 0x06, 0x00c7);
+                rtl8168_mdio_write(tp, 0x06, 0xaebb);
+                rtl8168_mdio_write(tp, 0x06, 0xee8a);
+                rtl8168_mdio_write(tp, 0x06, 0xe600);
+                rtl8168_mdio_write(tp, 0x06, 0xee8a);
+                rtl8168_mdio_write(tp, 0x06, 0xee03);
+                rtl8168_mdio_write(tp, 0x06, 0xee8a);
+                rtl8168_mdio_write(tp, 0x06, 0xefb8);
+                rtl8168_mdio_write(tp, 0x06, 0xee8a);
+                rtl8168_mdio_write(tp, 0x06, 0xe902);
+                rtl8168_mdio_write(tp, 0x06, 0xee8b);
+                rtl8168_mdio_write(tp, 0x06, 0x8285);
+                rtl8168_mdio_write(tp, 0x06, 0xee8b);
+                rtl8168_mdio_write(tp, 0x06, 0x8520);
+                rtl8168_mdio_write(tp, 0x06, 0xee8b);
+                rtl8168_mdio_write(tp, 0x06, 0x8701);
+                rtl8168_mdio_write(tp, 0x06, 0xd481);
+                rtl8168_mdio_write(tp, 0x06, 0x35e4);
+                rtl8168_mdio_write(tp, 0x06, 0x8b94);
+                rtl8168_mdio_write(tp, 0x06, 0xe58b);
+                rtl8168_mdio_write(tp, 0x06, 0x95bf);
+                rtl8168_mdio_write(tp, 0x06, 0x8b88);
+                rtl8168_mdio_write(tp, 0x06, 0xec00);
+                rtl8168_mdio_write(tp, 0x06, 0x19a9);
+                rtl8168_mdio_write(tp, 0x06, 0x8b90);
+                rtl8168_mdio_write(tp, 0x06, 0xf9ee);
+                rtl8168_mdio_write(tp, 0x06, 0xfff6);
+                rtl8168_mdio_write(tp, 0x06, 0x00ee);
+                rtl8168_mdio_write(tp, 0x06, 0xfff7);
+                rtl8168_mdio_write(tp, 0x06, 0xffe0);
+                rtl8168_mdio_write(tp, 0x06, 0xe140);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e1);
+                rtl8168_mdio_write(tp, 0x06, 0x41f7);
+                rtl8168_mdio_write(tp, 0x06, 0x2ff6);
+                rtl8168_mdio_write(tp, 0x06, 0x28e4);
+                rtl8168_mdio_write(tp, 0x06, 0xe140);
+                rtl8168_mdio_write(tp, 0x06, 0xe5e1);
+                rtl8168_mdio_write(tp, 0x06, 0x4104);
+                rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b89);
+                rtl8168_mdio_write(tp, 0x06, 0xad20);
+                rtl8168_mdio_write(tp, 0x06, 0x0dee);
+                rtl8168_mdio_write(tp, 0x06, 0x8b89);
+                rtl8168_mdio_write(tp, 0x06, 0x0002);
+                rtl8168_mdio_write(tp, 0x06, 0x82f4);
+                rtl8168_mdio_write(tp, 0x06, 0x021f);
+                rtl8168_mdio_write(tp, 0x06, 0x4102);
+                rtl8168_mdio_write(tp, 0x06, 0x2812);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b8d);
+                rtl8168_mdio_write(tp, 0x06, 0xad20);
+                rtl8168_mdio_write(tp, 0x06, 0x10ee);
+                rtl8168_mdio_write(tp, 0x06, 0x8b8d);
+                rtl8168_mdio_write(tp, 0x06, 0x0002);
+                rtl8168_mdio_write(tp, 0x06, 0x139d);
+                rtl8168_mdio_write(tp, 0x06, 0x0281);
+                rtl8168_mdio_write(tp, 0x06, 0xd602);
+                rtl8168_mdio_write(tp, 0x06, 0x1f99);
+                rtl8168_mdio_write(tp, 0x06, 0x0227);
+                rtl8168_mdio_write(tp, 0x06, 0xeafc);
+                rtl8168_mdio_write(tp, 0x06, 0x04f8);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x8ead);
+                rtl8168_mdio_write(tp, 0x06, 0x2014);
+                rtl8168_mdio_write(tp, 0x06, 0xf620);
+                rtl8168_mdio_write(tp, 0x06, 0xe48b);
+                rtl8168_mdio_write(tp, 0x06, 0x8e02);
+                rtl8168_mdio_write(tp, 0x06, 0x8104);
+                rtl8168_mdio_write(tp, 0x06, 0x021b);
+                rtl8168_mdio_write(tp, 0x06, 0xf402);
+                rtl8168_mdio_write(tp, 0x06, 0x2c9c);
+                rtl8168_mdio_write(tp, 0x06, 0x0281);
+                rtl8168_mdio_write(tp, 0x06, 0x7902);
+                rtl8168_mdio_write(tp, 0x06, 0x8443);
+                rtl8168_mdio_write(tp, 0x06, 0xad22);
+                rtl8168_mdio_write(tp, 0x06, 0x11f6);
+                rtl8168_mdio_write(tp, 0x06, 0x22e4);
+                rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+                rtl8168_mdio_write(tp, 0x06, 0x022c);
+                rtl8168_mdio_write(tp, 0x06, 0x4602);
+                rtl8168_mdio_write(tp, 0x06, 0x2ac5);
+                rtl8168_mdio_write(tp, 0x06, 0x0229);
+                rtl8168_mdio_write(tp, 0x06, 0x2002);
+                rtl8168_mdio_write(tp, 0x06, 0x2b91);
+                rtl8168_mdio_write(tp, 0x06, 0xad25);
+                rtl8168_mdio_write(tp, 0x06, 0x11f6);
+                rtl8168_mdio_write(tp, 0x06, 0x25e4);
+                rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+                rtl8168_mdio_write(tp, 0x06, 0x0284);
+                rtl8168_mdio_write(tp, 0x06, 0xe202);
+                rtl8168_mdio_write(tp, 0x06, 0x043a);
+                rtl8168_mdio_write(tp, 0x06, 0x021a);
+                rtl8168_mdio_write(tp, 0x06, 0x5902);
+                rtl8168_mdio_write(tp, 0x06, 0x2bfc);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xf8fa);
+                rtl8168_mdio_write(tp, 0x06, 0xef69);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+                rtl8168_mdio_write(tp, 0x06, 0x00e1);
+                rtl8168_mdio_write(tp, 0x06, 0xe001);
+                rtl8168_mdio_write(tp, 0x06, 0xad27);
+                rtl8168_mdio_write(tp, 0x06, 0x1fd1);
+                rtl8168_mdio_write(tp, 0x06, 0x01bf);
+                rtl8168_mdio_write(tp, 0x06, 0x8638);
+                rtl8168_mdio_write(tp, 0x06, 0x022f);
+                rtl8168_mdio_write(tp, 0x06, 0x50e0);
+                rtl8168_mdio_write(tp, 0x06, 0xe020);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+                rtl8168_mdio_write(tp, 0x06, 0x21ad);
+                rtl8168_mdio_write(tp, 0x06, 0x200e);
+                rtl8168_mdio_write(tp, 0x06, 0xd100);
+                rtl8168_mdio_write(tp, 0x06, 0xbf86);
+                rtl8168_mdio_write(tp, 0x06, 0x3802);
+                rtl8168_mdio_write(tp, 0x06, 0x2f50);
+                rtl8168_mdio_write(tp, 0x06, 0xbf3d);
+                rtl8168_mdio_write(tp, 0x06, 0x3902);
+                rtl8168_mdio_write(tp, 0x06, 0x2eb0);
+                rtl8168_mdio_write(tp, 0x06, 0xef96);
+                rtl8168_mdio_write(tp, 0x06, 0xfefc);
+                rtl8168_mdio_write(tp, 0x06, 0x0402);
+                rtl8168_mdio_write(tp, 0x06, 0x8591);
+                rtl8168_mdio_write(tp, 0x06, 0x0281);
+                rtl8168_mdio_write(tp, 0x06, 0x3c05);
+                rtl8168_mdio_write(tp, 0x06, 0xf8fa);
+                rtl8168_mdio_write(tp, 0x06, 0xef69);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
+                rtl8168_mdio_write(tp, 0x06, 0xfee1);
+                rtl8168_mdio_write(tp, 0x06, 0xe2ff);
+                rtl8168_mdio_write(tp, 0x06, 0xad2d);
+                rtl8168_mdio_write(tp, 0x06, 0x1ae0);
+                rtl8168_mdio_write(tp, 0x06, 0xe14e);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e1);
+                rtl8168_mdio_write(tp, 0x06, 0x4fac);
+                rtl8168_mdio_write(tp, 0x06, 0x2d22);
+                rtl8168_mdio_write(tp, 0x06, 0xf603);
+                rtl8168_mdio_write(tp, 0x06, 0x0203);
+                rtl8168_mdio_write(tp, 0x06, 0x36f7);
+                rtl8168_mdio_write(tp, 0x06, 0x03f7);
+                rtl8168_mdio_write(tp, 0x06, 0x06bf);
+                rtl8168_mdio_write(tp, 0x06, 0x8622);
+                rtl8168_mdio_write(tp, 0x06, 0x022e);
+                rtl8168_mdio_write(tp, 0x06, 0xb0ae);
+                rtl8168_mdio_write(tp, 0x06, 0x11e0);
+                rtl8168_mdio_write(tp, 0x06, 0xe14e);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e1);
+                rtl8168_mdio_write(tp, 0x06, 0x4fad);
+                rtl8168_mdio_write(tp, 0x06, 0x2d08);
+                rtl8168_mdio_write(tp, 0x06, 0xbf86);
+                rtl8168_mdio_write(tp, 0x06, 0x2d02);
+                rtl8168_mdio_write(tp, 0x06, 0x2eb0);
+                rtl8168_mdio_write(tp, 0x06, 0xf606);
+                rtl8168_mdio_write(tp, 0x06, 0xef96);
+                rtl8168_mdio_write(tp, 0x06, 0xfefc);
+                rtl8168_mdio_write(tp, 0x06, 0x04f8);
+                rtl8168_mdio_write(tp, 0x06, 0xf9fa);
+                rtl8168_mdio_write(tp, 0x06, 0xef69);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x87ad);
+                rtl8168_mdio_write(tp, 0x06, 0x204c);
+                rtl8168_mdio_write(tp, 0x06, 0xd200);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
+                rtl8168_mdio_write(tp, 0x06, 0x0058);
+                rtl8168_mdio_write(tp, 0x06, 0x010c);
+                rtl8168_mdio_write(tp, 0x06, 0x021e);
+                rtl8168_mdio_write(tp, 0x06, 0x20e0);
+                rtl8168_mdio_write(tp, 0x06, 0xe000);
+                rtl8168_mdio_write(tp, 0x06, 0x5810);
+                rtl8168_mdio_write(tp, 0x06, 0x1e20);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+                rtl8168_mdio_write(tp, 0x06, 0x3658);
+                rtl8168_mdio_write(tp, 0x06, 0x031e);
+                rtl8168_mdio_write(tp, 0x06, 0x20e0);
+                rtl8168_mdio_write(tp, 0x06, 0xe022);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+                rtl8168_mdio_write(tp, 0x06, 0x2358);
+                rtl8168_mdio_write(tp, 0x06, 0xe01e);
+                rtl8168_mdio_write(tp, 0x06, 0x20e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8ae6);
+                rtl8168_mdio_write(tp, 0x06, 0x1f02);
+                rtl8168_mdio_write(tp, 0x06, 0x9e22);
+                rtl8168_mdio_write(tp, 0x06, 0xe68a);
+                rtl8168_mdio_write(tp, 0x06, 0xe6ad);
+                rtl8168_mdio_write(tp, 0x06, 0x3214);
+                rtl8168_mdio_write(tp, 0x06, 0xad34);
+                rtl8168_mdio_write(tp, 0x06, 0x11ef);
+                rtl8168_mdio_write(tp, 0x06, 0x0258);
+                rtl8168_mdio_write(tp, 0x06, 0x039e);
+                rtl8168_mdio_write(tp, 0x06, 0x07ad);
+                rtl8168_mdio_write(tp, 0x06, 0x3508);
+                rtl8168_mdio_write(tp, 0x06, 0x5ac0);
+                rtl8168_mdio_write(tp, 0x06, 0x9f04);
+                rtl8168_mdio_write(tp, 0x06, 0xd101);
+                rtl8168_mdio_write(tp, 0x06, 0xae02);
+                rtl8168_mdio_write(tp, 0x06, 0xd100);
+                rtl8168_mdio_write(tp, 0x06, 0xbf86);
+                rtl8168_mdio_write(tp, 0x06, 0x3e02);
+                rtl8168_mdio_write(tp, 0x06, 0x2f50);
+                rtl8168_mdio_write(tp, 0x06, 0xef96);
+                rtl8168_mdio_write(tp, 0x06, 0xfefd);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xf8f9);
+                rtl8168_mdio_write(tp, 0x06, 0xfae0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b81);
+                rtl8168_mdio_write(tp, 0x06, 0xac26);
+                rtl8168_mdio_write(tp, 0x06, 0x0ee0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b81);
+                rtl8168_mdio_write(tp, 0x06, 0xac21);
+                rtl8168_mdio_write(tp, 0x06, 0x08e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b87);
+                rtl8168_mdio_write(tp, 0x06, 0xac24);
+                rtl8168_mdio_write(tp, 0x06, 0x02ae);
+                rtl8168_mdio_write(tp, 0x06, 0x6bee);
+                rtl8168_mdio_write(tp, 0x06, 0xe0ea);
+                rtl8168_mdio_write(tp, 0x06, 0x00ee);
+                rtl8168_mdio_write(tp, 0x06, 0xe0eb);
+                rtl8168_mdio_write(tp, 0x06, 0x00e2);
+                rtl8168_mdio_write(tp, 0x06, 0xe07c);
+                rtl8168_mdio_write(tp, 0x06, 0xe3e0);
+                rtl8168_mdio_write(tp, 0x06, 0x7da5);
+                rtl8168_mdio_write(tp, 0x06, 0x1111);
+                rtl8168_mdio_write(tp, 0x06, 0x15d2);
+                rtl8168_mdio_write(tp, 0x06, 0x60d6);
+                rtl8168_mdio_write(tp, 0x06, 0x6666);
+                rtl8168_mdio_write(tp, 0x06, 0x0207);
+                rtl8168_mdio_write(tp, 0x06, 0xf9d2);
+                rtl8168_mdio_write(tp, 0x06, 0xa0d6);
+                rtl8168_mdio_write(tp, 0x06, 0xaaaa);
+                rtl8168_mdio_write(tp, 0x06, 0x0207);
+                rtl8168_mdio_write(tp, 0x06, 0xf902);
+                rtl8168_mdio_write(tp, 0x06, 0x825c);
+                rtl8168_mdio_write(tp, 0x06, 0xae44);
+                rtl8168_mdio_write(tp, 0x06, 0xa566);
+                rtl8168_mdio_write(tp, 0x06, 0x6602);
+                rtl8168_mdio_write(tp, 0x06, 0xae38);
+                rtl8168_mdio_write(tp, 0x06, 0xa5aa);
+                rtl8168_mdio_write(tp, 0x06, 0xaa02);
+                rtl8168_mdio_write(tp, 0x06, 0xae32);
+                rtl8168_mdio_write(tp, 0x06, 0xeee0);
+                rtl8168_mdio_write(tp, 0x06, 0xea04);
+                rtl8168_mdio_write(tp, 0x06, 0xeee0);
+                rtl8168_mdio_write(tp, 0x06, 0xeb06);
+                rtl8168_mdio_write(tp, 0x06, 0xe2e0);
+                rtl8168_mdio_write(tp, 0x06, 0x7ce3);
+                rtl8168_mdio_write(tp, 0x06, 0xe07d);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+                rtl8168_mdio_write(tp, 0x06, 0x38e1);
+                rtl8168_mdio_write(tp, 0x06, 0xe039);
+                rtl8168_mdio_write(tp, 0x06, 0xad2e);
+                rtl8168_mdio_write(tp, 0x06, 0x21ad);
+                rtl8168_mdio_write(tp, 0x06, 0x3f13);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e4);
+                rtl8168_mdio_write(tp, 0x06, 0x14e1);
+                rtl8168_mdio_write(tp, 0x06, 0xe415);
+                rtl8168_mdio_write(tp, 0x06, 0x6880);
+                rtl8168_mdio_write(tp, 0x06, 0xe4e4);
+                rtl8168_mdio_write(tp, 0x06, 0x14e5);
+                rtl8168_mdio_write(tp, 0x06, 0xe415);
+                rtl8168_mdio_write(tp, 0x06, 0x0282);
+                rtl8168_mdio_write(tp, 0x06, 0x5cae);
+                rtl8168_mdio_write(tp, 0x06, 0x0bac);
+                rtl8168_mdio_write(tp, 0x06, 0x3e02);
+                rtl8168_mdio_write(tp, 0x06, 0xae06);
+                rtl8168_mdio_write(tp, 0x06, 0x0282);
+                rtl8168_mdio_write(tp, 0x06, 0x8602);
+                rtl8168_mdio_write(tp, 0x06, 0x82b0);
+                rtl8168_mdio_write(tp, 0x06, 0xfefd);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xf8e1);
+                rtl8168_mdio_write(tp, 0x06, 0x8b2e);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x81ad);
+                rtl8168_mdio_write(tp, 0x06, 0x2605);
+                rtl8168_mdio_write(tp, 0x06, 0x0221);
+                rtl8168_mdio_write(tp, 0x06, 0xf3f7);
+                rtl8168_mdio_write(tp, 0x06, 0x28e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b81);
+                rtl8168_mdio_write(tp, 0x06, 0xad21);
+                rtl8168_mdio_write(tp, 0x06, 0x0502);
+                rtl8168_mdio_write(tp, 0x06, 0x22f8);
+                rtl8168_mdio_write(tp, 0x06, 0xf729);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x87ad);
+                rtl8168_mdio_write(tp, 0x06, 0x2405);
+                rtl8168_mdio_write(tp, 0x06, 0x0282);
+                rtl8168_mdio_write(tp, 0x06, 0xebf7);
+                rtl8168_mdio_write(tp, 0x06, 0x2ae5);
+                rtl8168_mdio_write(tp, 0x06, 0x8b2e);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b81);
+                rtl8168_mdio_write(tp, 0x06, 0xad26);
+                rtl8168_mdio_write(tp, 0x06, 0x0302);
+                rtl8168_mdio_write(tp, 0x06, 0x2134);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x81ad);
+                rtl8168_mdio_write(tp, 0x06, 0x2109);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x2eac);
+                rtl8168_mdio_write(tp, 0x06, 0x2003);
+                rtl8168_mdio_write(tp, 0x06, 0x0283);
+                rtl8168_mdio_write(tp, 0x06, 0x52e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b87);
+                rtl8168_mdio_write(tp, 0x06, 0xad24);
+                rtl8168_mdio_write(tp, 0x06, 0x09e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b2e);
+                rtl8168_mdio_write(tp, 0x06, 0xac21);
+                rtl8168_mdio_write(tp, 0x06, 0x0302);
+                rtl8168_mdio_write(tp, 0x06, 0x8337);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xf8e1);
+                rtl8168_mdio_write(tp, 0x06, 0x8b2e);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x81ad);
+                rtl8168_mdio_write(tp, 0x06, 0x2608);
+                rtl8168_mdio_write(tp, 0x06, 0xe085);
+                rtl8168_mdio_write(tp, 0x06, 0xd2ad);
+                rtl8168_mdio_write(tp, 0x06, 0x2502);
+                rtl8168_mdio_write(tp, 0x06, 0xf628);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x81ad);
+                rtl8168_mdio_write(tp, 0x06, 0x210a);
+                rtl8168_mdio_write(tp, 0x06, 0xe086);
+                rtl8168_mdio_write(tp, 0x06, 0x0af6);
+                rtl8168_mdio_write(tp, 0x06, 0x27a0);
+                rtl8168_mdio_write(tp, 0x06, 0x0502);
+                rtl8168_mdio_write(tp, 0x06, 0xf629);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x87ad);
+                rtl8168_mdio_write(tp, 0x06, 0x2408);
+                rtl8168_mdio_write(tp, 0x06, 0xe08a);
+                rtl8168_mdio_write(tp, 0x06, 0xedad);
+                rtl8168_mdio_write(tp, 0x06, 0x2002);
+                rtl8168_mdio_write(tp, 0x06, 0xf62a);
+                rtl8168_mdio_write(tp, 0x06, 0xe58b);
+                rtl8168_mdio_write(tp, 0x06, 0x2ea1);
+                rtl8168_mdio_write(tp, 0x06, 0x0003);
+                rtl8168_mdio_write(tp, 0x06, 0x0221);
+                rtl8168_mdio_write(tp, 0x06, 0x11fc);
+                rtl8168_mdio_write(tp, 0x06, 0x04ee);
+                rtl8168_mdio_write(tp, 0x06, 0x8aed);
+                rtl8168_mdio_write(tp, 0x06, 0x00ee);
+                rtl8168_mdio_write(tp, 0x06, 0x8aec);
+                rtl8168_mdio_write(tp, 0x06, 0x0004);
+                rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b87);
+                rtl8168_mdio_write(tp, 0x06, 0xad24);
+                rtl8168_mdio_write(tp, 0x06, 0x3ae0);
+                rtl8168_mdio_write(tp, 0x06, 0xe0ea);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+                rtl8168_mdio_write(tp, 0x06, 0xeb58);
+                rtl8168_mdio_write(tp, 0x06, 0xf8d1);
+                rtl8168_mdio_write(tp, 0x06, 0x01e4);
+                rtl8168_mdio_write(tp, 0x06, 0xe0ea);
+                rtl8168_mdio_write(tp, 0x06, 0xe5e0);
+                rtl8168_mdio_write(tp, 0x06, 0xebe0);
+                rtl8168_mdio_write(tp, 0x06, 0xe07c);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+                rtl8168_mdio_write(tp, 0x06, 0x7d5c);
+                rtl8168_mdio_write(tp, 0x06, 0x00ff);
+                rtl8168_mdio_write(tp, 0x06, 0x3c00);
+                rtl8168_mdio_write(tp, 0x06, 0x1eab);
+                rtl8168_mdio_write(tp, 0x06, 0x1ce0);
+                rtl8168_mdio_write(tp, 0x06, 0xe04c);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+                rtl8168_mdio_write(tp, 0x06, 0x4d58);
+                rtl8168_mdio_write(tp, 0x06, 0xc1e4);
+                rtl8168_mdio_write(tp, 0x06, 0xe04c);
+                rtl8168_mdio_write(tp, 0x06, 0xe5e0);
+                rtl8168_mdio_write(tp, 0x06, 0x4de0);
+                rtl8168_mdio_write(tp, 0x06, 0xe0ee);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+                rtl8168_mdio_write(tp, 0x06, 0xef69);
+                rtl8168_mdio_write(tp, 0x06, 0x3ce4);
+                rtl8168_mdio_write(tp, 0x06, 0xe0ee);
+                rtl8168_mdio_write(tp, 0x06, 0xe5e0);
+                rtl8168_mdio_write(tp, 0x06, 0xeffc);
+                rtl8168_mdio_write(tp, 0x06, 0x04f8);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x87ad);
+                rtl8168_mdio_write(tp, 0x06, 0x2412);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+                rtl8168_mdio_write(tp, 0x06, 0xeee1);
+                rtl8168_mdio_write(tp, 0x06, 0xe0ef);
+                rtl8168_mdio_write(tp, 0x06, 0x59c3);
+                rtl8168_mdio_write(tp, 0x06, 0xe4e0);
+                rtl8168_mdio_write(tp, 0x06, 0xeee5);
+                rtl8168_mdio_write(tp, 0x06, 0xe0ef);
+                rtl8168_mdio_write(tp, 0x06, 0xee8a);
+                rtl8168_mdio_write(tp, 0x06, 0xed01);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b81);
+                rtl8168_mdio_write(tp, 0x06, 0xac25);
+                rtl8168_mdio_write(tp, 0x06, 0x0502);
+                rtl8168_mdio_write(tp, 0x06, 0x8363);
+                rtl8168_mdio_write(tp, 0x06, 0xae03);
+                rtl8168_mdio_write(tp, 0x06, 0x0225);
+                rtl8168_mdio_write(tp, 0x06, 0x16fc);
+                rtl8168_mdio_write(tp, 0x06, 0x04f8);
+                rtl8168_mdio_write(tp, 0x06, 0xf9fa);
+                rtl8168_mdio_write(tp, 0x06, 0xef69);
+                rtl8168_mdio_write(tp, 0x06, 0xfae0);
+                rtl8168_mdio_write(tp, 0x06, 0x860a);
+                rtl8168_mdio_write(tp, 0x06, 0xa000);
+                rtl8168_mdio_write(tp, 0x06, 0x19e0);
+                rtl8168_mdio_write(tp, 0x06, 0x860b);
+                rtl8168_mdio_write(tp, 0x06, 0xe18b);
+                rtl8168_mdio_write(tp, 0x06, 0x331b);
+                rtl8168_mdio_write(tp, 0x06, 0x109e);
+                rtl8168_mdio_write(tp, 0x06, 0x04aa);
+                rtl8168_mdio_write(tp, 0x06, 0x02ae);
+                rtl8168_mdio_write(tp, 0x06, 0x06ee);
+                rtl8168_mdio_write(tp, 0x06, 0x860a);
+                rtl8168_mdio_write(tp, 0x06, 0x01ae);
+                rtl8168_mdio_write(tp, 0x06, 0xe602);
+                rtl8168_mdio_write(tp, 0x06, 0x241e);
+                rtl8168_mdio_write(tp, 0x06, 0xae14);
+                rtl8168_mdio_write(tp, 0x06, 0xa001);
+                rtl8168_mdio_write(tp, 0x06, 0x1402);
+                rtl8168_mdio_write(tp, 0x06, 0x2426);
+                rtl8168_mdio_write(tp, 0x06, 0xbf26);
+                rtl8168_mdio_write(tp, 0x06, 0x6d02);
+                rtl8168_mdio_write(tp, 0x06, 0x2eb0);
+                rtl8168_mdio_write(tp, 0x06, 0xee86);
+                rtl8168_mdio_write(tp, 0x06, 0x0b00);
+                rtl8168_mdio_write(tp, 0x06, 0xee86);
+                rtl8168_mdio_write(tp, 0x06, 0x0a02);
+                rtl8168_mdio_write(tp, 0x06, 0xaf84);
+                rtl8168_mdio_write(tp, 0x06, 0x3ca0);
+                rtl8168_mdio_write(tp, 0x06, 0x0252);
+                rtl8168_mdio_write(tp, 0x06, 0xee86);
+                rtl8168_mdio_write(tp, 0x06, 0x0400);
+                rtl8168_mdio_write(tp, 0x06, 0xee86);
+                rtl8168_mdio_write(tp, 0x06, 0x0500);
+                rtl8168_mdio_write(tp, 0x06, 0xe086);
+                rtl8168_mdio_write(tp, 0x06, 0x0be1);
+                rtl8168_mdio_write(tp, 0x06, 0x8b32);
+                rtl8168_mdio_write(tp, 0x06, 0x1b10);
+                rtl8168_mdio_write(tp, 0x06, 0x9e04);
+                rtl8168_mdio_write(tp, 0x06, 0xaa02);
+                rtl8168_mdio_write(tp, 0x06, 0xaecb);
+                rtl8168_mdio_write(tp, 0x06, 0xee86);
+                rtl8168_mdio_write(tp, 0x06, 0x0b00);
+                rtl8168_mdio_write(tp, 0x06, 0x0224);
+                rtl8168_mdio_write(tp, 0x06, 0x3ae2);
+                rtl8168_mdio_write(tp, 0x06, 0x8604);
+                rtl8168_mdio_write(tp, 0x06, 0xe386);
+                rtl8168_mdio_write(tp, 0x06, 0x05ef);
+                rtl8168_mdio_write(tp, 0x06, 0x65e2);
+                rtl8168_mdio_write(tp, 0x06, 0x8606);
+                rtl8168_mdio_write(tp, 0x06, 0xe386);
+                rtl8168_mdio_write(tp, 0x06, 0x071b);
+                rtl8168_mdio_write(tp, 0x06, 0x56aa);
+                rtl8168_mdio_write(tp, 0x06, 0x0eef);
+                rtl8168_mdio_write(tp, 0x06, 0x56e6);
+                rtl8168_mdio_write(tp, 0x06, 0x8606);
+                rtl8168_mdio_write(tp, 0x06, 0xe786);
+                rtl8168_mdio_write(tp, 0x06, 0x07e2);
+                rtl8168_mdio_write(tp, 0x06, 0x8609);
+                rtl8168_mdio_write(tp, 0x06, 0xe686);
+                rtl8168_mdio_write(tp, 0x06, 0x08e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8609);
+                rtl8168_mdio_write(tp, 0x06, 0xa000);
+                rtl8168_mdio_write(tp, 0x06, 0x07ee);
+                rtl8168_mdio_write(tp, 0x06, 0x860a);
+                rtl8168_mdio_write(tp, 0x06, 0x03af);
+                rtl8168_mdio_write(tp, 0x06, 0x8369);
+                rtl8168_mdio_write(tp, 0x06, 0x0224);
+                rtl8168_mdio_write(tp, 0x06, 0x8e02);
+                rtl8168_mdio_write(tp, 0x06, 0x2426);
+                rtl8168_mdio_write(tp, 0x06, 0xae48);
+                rtl8168_mdio_write(tp, 0x06, 0xa003);
+                rtl8168_mdio_write(tp, 0x06, 0x21e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8608);
+                rtl8168_mdio_write(tp, 0x06, 0xe186);
+                rtl8168_mdio_write(tp, 0x06, 0x091b);
+                rtl8168_mdio_write(tp, 0x06, 0x019e);
+                rtl8168_mdio_write(tp, 0x06, 0x0caa);
+                rtl8168_mdio_write(tp, 0x06, 0x0502);
+                rtl8168_mdio_write(tp, 0x06, 0x249d);
+                rtl8168_mdio_write(tp, 0x06, 0xaee7);
+                rtl8168_mdio_write(tp, 0x06, 0x0224);
+                rtl8168_mdio_write(tp, 0x06, 0x8eae);
+                rtl8168_mdio_write(tp, 0x06, 0xe2ee);
+                rtl8168_mdio_write(tp, 0x06, 0x860a);
+                rtl8168_mdio_write(tp, 0x06, 0x04ee);
+                rtl8168_mdio_write(tp, 0x06, 0x860b);
+                rtl8168_mdio_write(tp, 0x06, 0x00af);
+                rtl8168_mdio_write(tp, 0x06, 0x8369);
+                rtl8168_mdio_write(tp, 0x06, 0xa004);
+                rtl8168_mdio_write(tp, 0x06, 0x15e0);
+                rtl8168_mdio_write(tp, 0x06, 0x860b);
+                rtl8168_mdio_write(tp, 0x06, 0xe18b);
+                rtl8168_mdio_write(tp, 0x06, 0x341b);
+                rtl8168_mdio_write(tp, 0x06, 0x109e);
+                rtl8168_mdio_write(tp, 0x06, 0x05aa);
+                rtl8168_mdio_write(tp, 0x06, 0x03af);
+                rtl8168_mdio_write(tp, 0x06, 0x8383);
+                rtl8168_mdio_write(tp, 0x06, 0xee86);
+                rtl8168_mdio_write(tp, 0x06, 0x0a05);
+                rtl8168_mdio_write(tp, 0x06, 0xae0c);
+                rtl8168_mdio_write(tp, 0x06, 0xa005);
+                rtl8168_mdio_write(tp, 0x06, 0x02ae);
+                rtl8168_mdio_write(tp, 0x06, 0x0702);
+                rtl8168_mdio_write(tp, 0x06, 0x2309);
+                rtl8168_mdio_write(tp, 0x06, 0xee86);
+                rtl8168_mdio_write(tp, 0x06, 0x0a00);
+                rtl8168_mdio_write(tp, 0x06, 0xfeef);
+                rtl8168_mdio_write(tp, 0x06, 0x96fe);
+                rtl8168_mdio_write(tp, 0x06, 0xfdfc);
+                rtl8168_mdio_write(tp, 0x06, 0x04f8);
+                rtl8168_mdio_write(tp, 0x06, 0xf9fa);
+                rtl8168_mdio_write(tp, 0x06, 0xef69);
+                rtl8168_mdio_write(tp, 0x06, 0xfbe0);
+                rtl8168_mdio_write(tp, 0x06, 0x8b85);
+                rtl8168_mdio_write(tp, 0x06, 0xad25);
+                rtl8168_mdio_write(tp, 0x06, 0x22e0);
+                rtl8168_mdio_write(tp, 0x06, 0xe022);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+                rtl8168_mdio_write(tp, 0x06, 0x23e2);
+                rtl8168_mdio_write(tp, 0x06, 0xe036);
+                rtl8168_mdio_write(tp, 0x06, 0xe3e0);
+                rtl8168_mdio_write(tp, 0x06, 0x375a);
+                rtl8168_mdio_write(tp, 0x06, 0xc40d);
+                rtl8168_mdio_write(tp, 0x06, 0x0158);
+                rtl8168_mdio_write(tp, 0x06, 0x021e);
+                rtl8168_mdio_write(tp, 0x06, 0x20e3);
+                rtl8168_mdio_write(tp, 0x06, 0x8ae7);
+                rtl8168_mdio_write(tp, 0x06, 0xac31);
+                rtl8168_mdio_write(tp, 0x06, 0x60ac);
+                rtl8168_mdio_write(tp, 0x06, 0x3a08);
+                rtl8168_mdio_write(tp, 0x06, 0xac3e);
+                rtl8168_mdio_write(tp, 0x06, 0x26ae);
+                rtl8168_mdio_write(tp, 0x06, 0x67af);
+                rtl8168_mdio_write(tp, 0x06, 0x84db);
+                rtl8168_mdio_write(tp, 0x06, 0xad37);
+                rtl8168_mdio_write(tp, 0x06, 0x61e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8ae8);
+                rtl8168_mdio_write(tp, 0x06, 0x10e4);
+                rtl8168_mdio_write(tp, 0x06, 0x8ae8);
+                rtl8168_mdio_write(tp, 0x06, 0xe18a);
+                rtl8168_mdio_write(tp, 0x06, 0xe91b);
+                rtl8168_mdio_write(tp, 0x06, 0x109e);
+                rtl8168_mdio_write(tp, 0x06, 0x02ae);
+                rtl8168_mdio_write(tp, 0x06, 0x51d1);
+                rtl8168_mdio_write(tp, 0x06, 0x00bf);
+                rtl8168_mdio_write(tp, 0x06, 0x863b);
+                rtl8168_mdio_write(tp, 0x06, 0x022f);
+                rtl8168_mdio_write(tp, 0x06, 0x50ee);
+                rtl8168_mdio_write(tp, 0x06, 0x8ae8);
+                rtl8168_mdio_write(tp, 0x06, 0x00ae);
+                rtl8168_mdio_write(tp, 0x06, 0x43ad);
+                rtl8168_mdio_write(tp, 0x06, 0x3627);
+                rtl8168_mdio_write(tp, 0x06, 0xe08a);
+                rtl8168_mdio_write(tp, 0x06, 0xeee1);
+                rtl8168_mdio_write(tp, 0x06, 0x8aef);
+                rtl8168_mdio_write(tp, 0x06, 0xef74);
+                rtl8168_mdio_write(tp, 0x06, 0xe08a);
+                rtl8168_mdio_write(tp, 0x06, 0xeae1);
+                rtl8168_mdio_write(tp, 0x06, 0x8aeb);
+                rtl8168_mdio_write(tp, 0x06, 0x1b74);
+                rtl8168_mdio_write(tp, 0x06, 0x9e2e);
+                rtl8168_mdio_write(tp, 0x06, 0x14e4);
+                rtl8168_mdio_write(tp, 0x06, 0x8aea);
+                rtl8168_mdio_write(tp, 0x06, 0xe58a);
+                rtl8168_mdio_write(tp, 0x06, 0xebef);
+                rtl8168_mdio_write(tp, 0x06, 0x74e0);
+                rtl8168_mdio_write(tp, 0x06, 0x8aee);
+                rtl8168_mdio_write(tp, 0x06, 0xe18a);
+                rtl8168_mdio_write(tp, 0x06, 0xef1b);
+                rtl8168_mdio_write(tp, 0x06, 0x479e);
+                rtl8168_mdio_write(tp, 0x06, 0x0fae);
+                rtl8168_mdio_write(tp, 0x06, 0x19ee);
+                rtl8168_mdio_write(tp, 0x06, 0x8aea);
+                rtl8168_mdio_write(tp, 0x06, 0x00ee);
+                rtl8168_mdio_write(tp, 0x06, 0x8aeb);
+                rtl8168_mdio_write(tp, 0x06, 0x00ae);
+                rtl8168_mdio_write(tp, 0x06, 0x0fac);
+                rtl8168_mdio_write(tp, 0x06, 0x390c);
+                rtl8168_mdio_write(tp, 0x06, 0xd101);
+                rtl8168_mdio_write(tp, 0x06, 0xbf86);
+                rtl8168_mdio_write(tp, 0x06, 0x3b02);
+                rtl8168_mdio_write(tp, 0x06, 0x2f50);
+                rtl8168_mdio_write(tp, 0x06, 0xee8a);
+                rtl8168_mdio_write(tp, 0x06, 0xe800);
+                rtl8168_mdio_write(tp, 0x06, 0xe68a);
+                rtl8168_mdio_write(tp, 0x06, 0xe7ff);
+                rtl8168_mdio_write(tp, 0x06, 0xef96);
+                rtl8168_mdio_write(tp, 0x06, 0xfefd);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xf8f9);
+                rtl8168_mdio_write(tp, 0x06, 0xfaef);
+                rtl8168_mdio_write(tp, 0x06, 0x69e0);
+                rtl8168_mdio_write(tp, 0x06, 0xe022);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+                rtl8168_mdio_write(tp, 0x06, 0x2358);
+                rtl8168_mdio_write(tp, 0x06, 0xc4e1);
+                rtl8168_mdio_write(tp, 0x06, 0x8b6e);
+                rtl8168_mdio_write(tp, 0x06, 0x1f10);
+                rtl8168_mdio_write(tp, 0x06, 0x9e24);
+                rtl8168_mdio_write(tp, 0x06, 0xe48b);
+                rtl8168_mdio_write(tp, 0x06, 0x6ead);
+                rtl8168_mdio_write(tp, 0x06, 0x2218);
+                rtl8168_mdio_write(tp, 0x06, 0xac27);
+                rtl8168_mdio_write(tp, 0x06, 0x0dac);
+                rtl8168_mdio_write(tp, 0x06, 0x2605);
+                rtl8168_mdio_write(tp, 0x06, 0x0203);
+                rtl8168_mdio_write(tp, 0x06, 0x8fae);
+                rtl8168_mdio_write(tp, 0x06, 0x1302);
+                rtl8168_mdio_write(tp, 0x06, 0x03c8);
+                rtl8168_mdio_write(tp, 0x06, 0xae0e);
+                rtl8168_mdio_write(tp, 0x06, 0x0203);
+                rtl8168_mdio_write(tp, 0x06, 0xe102);
+                rtl8168_mdio_write(tp, 0x06, 0x8520);
+                rtl8168_mdio_write(tp, 0x06, 0xae06);
+                rtl8168_mdio_write(tp, 0x06, 0x0203);
+                rtl8168_mdio_write(tp, 0x06, 0x8f02);
+                rtl8168_mdio_write(tp, 0x06, 0x8566);
+                rtl8168_mdio_write(tp, 0x06, 0xef96);
+                rtl8168_mdio_write(tp, 0x06, 0xfefd);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xf8fa);
+                rtl8168_mdio_write(tp, 0x06, 0xef69);
+                rtl8168_mdio_write(tp, 0x06, 0xe08b);
+                rtl8168_mdio_write(tp, 0x06, 0x82ad);
+                rtl8168_mdio_write(tp, 0x06, 0x2737);
+                rtl8168_mdio_write(tp, 0x06, 0xbf86);
+                rtl8168_mdio_write(tp, 0x06, 0x4402);
+                rtl8168_mdio_write(tp, 0x06, 0x2f23);
+                rtl8168_mdio_write(tp, 0x06, 0xac28);
+                rtl8168_mdio_write(tp, 0x06, 0x2ed1);
+                rtl8168_mdio_write(tp, 0x06, 0x01bf);
+                rtl8168_mdio_write(tp, 0x06, 0x8647);
+                rtl8168_mdio_write(tp, 0x06, 0x022f);
+                rtl8168_mdio_write(tp, 0x06, 0x50bf);
+                rtl8168_mdio_write(tp, 0x06, 0x8641);
+                rtl8168_mdio_write(tp, 0x06, 0x022f);
+                rtl8168_mdio_write(tp, 0x06, 0x23e5);
+                rtl8168_mdio_write(tp, 0x06, 0x8af0);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+                rtl8168_mdio_write(tp, 0x06, 0x22e1);
+                rtl8168_mdio_write(tp, 0x06, 0xe023);
+                rtl8168_mdio_write(tp, 0x06, 0xac2e);
+                rtl8168_mdio_write(tp, 0x06, 0x04d1);
+                rtl8168_mdio_write(tp, 0x06, 0x01ae);
+                rtl8168_mdio_write(tp, 0x06, 0x02d1);
+                rtl8168_mdio_write(tp, 0x06, 0x00bf);
+                rtl8168_mdio_write(tp, 0x06, 0x8641);
+                rtl8168_mdio_write(tp, 0x06, 0x022f);
+                rtl8168_mdio_write(tp, 0x06, 0x50d1);
+                rtl8168_mdio_write(tp, 0x06, 0x01bf);
+                rtl8168_mdio_write(tp, 0x06, 0x8644);
+                rtl8168_mdio_write(tp, 0x06, 0x022f);
+                rtl8168_mdio_write(tp, 0x06, 0x50ef);
+                rtl8168_mdio_write(tp, 0x06, 0x96fe);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xf8fa);
+                rtl8168_mdio_write(tp, 0x06, 0xef69);
+                rtl8168_mdio_write(tp, 0x06, 0xbf86);
+                rtl8168_mdio_write(tp, 0x06, 0x4702);
+                rtl8168_mdio_write(tp, 0x06, 0x2f23);
+                rtl8168_mdio_write(tp, 0x06, 0xad28);
+                rtl8168_mdio_write(tp, 0x06, 0x19d1);
+                rtl8168_mdio_write(tp, 0x06, 0x00bf);
+                rtl8168_mdio_write(tp, 0x06, 0x8644);
+                rtl8168_mdio_write(tp, 0x06, 0x022f);
+                rtl8168_mdio_write(tp, 0x06, 0x50e1);
+                rtl8168_mdio_write(tp, 0x06, 0x8af0);
+                rtl8168_mdio_write(tp, 0x06, 0xbf86);
+                rtl8168_mdio_write(tp, 0x06, 0x4102);
+                rtl8168_mdio_write(tp, 0x06, 0x2f50);
+                rtl8168_mdio_write(tp, 0x06, 0xd100);
+                rtl8168_mdio_write(tp, 0x06, 0xbf86);
+                rtl8168_mdio_write(tp, 0x06, 0x4702);
+                rtl8168_mdio_write(tp, 0x06, 0x2f50);
+                rtl8168_mdio_write(tp, 0x06, 0xef96);
+                rtl8168_mdio_write(tp, 0x06, 0xfefc);
+                rtl8168_mdio_write(tp, 0x06, 0x04f8);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
+                rtl8168_mdio_write(tp, 0x06, 0xfee1);
+                rtl8168_mdio_write(tp, 0x06, 0xe2ff);
+                rtl8168_mdio_write(tp, 0x06, 0xad2e);
+                rtl8168_mdio_write(tp, 0x06, 0x63e0);
+                rtl8168_mdio_write(tp, 0x06, 0xe038);
+                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+                rtl8168_mdio_write(tp, 0x06, 0x39ad);
+                rtl8168_mdio_write(tp, 0x06, 0x2f10);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+                rtl8168_mdio_write(tp, 0x06, 0x34e1);
+                rtl8168_mdio_write(tp, 0x06, 0xe035);
+                rtl8168_mdio_write(tp, 0x06, 0xf726);
+                rtl8168_mdio_write(tp, 0x06, 0xe4e0);
+                rtl8168_mdio_write(tp, 0x06, 0x34e5);
+                rtl8168_mdio_write(tp, 0x06, 0xe035);
+                rtl8168_mdio_write(tp, 0x06, 0xae0e);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
+                rtl8168_mdio_write(tp, 0x06, 0xd6e1);
+                rtl8168_mdio_write(tp, 0x06, 0xe2d7);
+                rtl8168_mdio_write(tp, 0x06, 0xf728);
+                rtl8168_mdio_write(tp, 0x06, 0xe4e2);
+                rtl8168_mdio_write(tp, 0x06, 0xd6e5);
+                rtl8168_mdio_write(tp, 0x06, 0xe2d7);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
+                rtl8168_mdio_write(tp, 0x06, 0x34e1);
+                rtl8168_mdio_write(tp, 0x06, 0xe235);
+                rtl8168_mdio_write(tp, 0x06, 0xf72b);
+                rtl8168_mdio_write(tp, 0x06, 0xe4e2);
+                rtl8168_mdio_write(tp, 0x06, 0x34e5);
+                rtl8168_mdio_write(tp, 0x06, 0xe235);
+                rtl8168_mdio_write(tp, 0x06, 0xd07d);
+                rtl8168_mdio_write(tp, 0x06, 0xb0fe);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
+                rtl8168_mdio_write(tp, 0x06, 0x34e1);
+                rtl8168_mdio_write(tp, 0x06, 0xe235);
+                rtl8168_mdio_write(tp, 0x06, 0xf62b);
+                rtl8168_mdio_write(tp, 0x06, 0xe4e2);
+                rtl8168_mdio_write(tp, 0x06, 0x34e5);
+                rtl8168_mdio_write(tp, 0x06, 0xe235);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+                rtl8168_mdio_write(tp, 0x06, 0x34e1);
+                rtl8168_mdio_write(tp, 0x06, 0xe035);
+                rtl8168_mdio_write(tp, 0x06, 0xf626);
+                rtl8168_mdio_write(tp, 0x06, 0xe4e0);
+                rtl8168_mdio_write(tp, 0x06, 0x34e5);
+                rtl8168_mdio_write(tp, 0x06, 0xe035);
+                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
+                rtl8168_mdio_write(tp, 0x06, 0xd6e1);
+                rtl8168_mdio_write(tp, 0x06, 0xe2d7);
+                rtl8168_mdio_write(tp, 0x06, 0xf628);
+                rtl8168_mdio_write(tp, 0x06, 0xe4e2);
+                rtl8168_mdio_write(tp, 0x06, 0xd6e5);
+                rtl8168_mdio_write(tp, 0x06, 0xe2d7);
+                rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                rtl8168_mdio_write(tp, 0x06, 0xae20);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x06, 0xa725);
+                rtl8168_mdio_write(tp, 0x06, 0xe50a);
+                rtl8168_mdio_write(tp, 0x06, 0x1de5);
+                rtl8168_mdio_write(tp, 0x06, 0x0a2c);
+                rtl8168_mdio_write(tp, 0x06, 0xe50a);
+                rtl8168_mdio_write(tp, 0x06, 0x6de5);
+                rtl8168_mdio_write(tp, 0x06, 0x0a1d);
+                rtl8168_mdio_write(tp, 0x06, 0xe50a);
+                rtl8168_mdio_write(tp, 0x06, 0x1ce5);
+                rtl8168_mdio_write(tp, 0x06, 0x0a2d);
+                rtl8168_mdio_write(tp, 0x06, 0xa755);
+                rtl8168_mdio_write(tp, 0x06, 0x00e2);
+                rtl8168_mdio_write(tp, 0x06, 0x3488);
+                rtl8168_mdio_write(tp, 0x06, 0xe200);
+                rtl8168_mdio_write(tp, 0x06, 0xcce2);
+                rtl8168_mdio_write(tp, 0x06, 0x0055);
+                rtl8168_mdio_write(tp, 0x06, 0xe020);
+                rtl8168_mdio_write(tp, 0x06, 0x55e2);
+                rtl8168_mdio_write(tp, 0x06, 0xd600);
+                rtl8168_mdio_write(tp, 0x06, 0xe24a);
+                gphy_val = rtl8168_mdio_read(tp, 0x01);
+                gphy_val |= BIT_0;
+                rtl8168_mdio_write(tp, 0x01, gphy_val);
+                gphy_val = rtl8168_mdio_read(tp, 0x00);
+                gphy_val |= BIT_0;
+                rtl8168_mdio_write(tp, 0x00, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                for (i = 0; i < 200; i++) {
+                        udelay(100);
+                        gphy_val = rtl8168_mdio_read(tp, 0x00);
+                        if (gphy_val & BIT_7)
+                                break;
+                }
+                rtl8168_mdio_write(tp, 0x1f, 0x0007);
+                rtl8168_mdio_write(tp, 0x1e, 0x0023);
+                gphy_val = rtl8168_mdio_read(tp, 0x17);
+                gphy_val &= ~(BIT_0);
+                if (tp->RequiredSecLanDonglePatch)
+                        gphy_val &= ~(BIT_2);
+                rtl8168_mdio_write(tp, 0x17, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        }
+}
+
+static void
+rtl8168_set_phy_mcu_8168evl_1(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        unsigned int gphy_val,i;
+
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x00, 0x1800);
+        gphy_val = rtl8168_mdio_read(tp, 0x15);
+        gphy_val &= ~(BIT_12);
+        rtl8168_mdio_write(tp, 0x15, gphy_val);
+        mdelay(20);
+        rtl8168_mdio_write(tp, 0x1f, 0x0004);
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1e, 0x0023);
+        gphy_val = rtl8168_mdio_read(tp, 0x17);
+        if ((gphy_val & BIT_11) == 0x0000) {
+                gphy_val |= BIT_0;
+                rtl8168_mdio_write(tp, 0x17, gphy_val);
+                for (i = 0; i < 200; i++) {
+                        udelay(100);
+                        gphy_val = rtl8168_mdio_read(tp, 0x17);
+                        if (gphy_val & BIT_11)
+                                break;
+                }
+        }
+        gphy_val = rtl8168_mdio_read(tp, 0x17);
+        gphy_val |= BIT_0;
+        rtl8168_mdio_write(tp, 0x17, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0004);
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1E, 0x002C);
+        rtl8168_mdio_write(tp, 0x1B, 0x5000);
+        rtl8168_mdio_write(tp, 0x1E, 0x002d);
+        rtl8168_mdio_write(tp, 0x19, 0x0004);
+        rtl8168_mdio_write(tp, 0x1f, 0x0002);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        for (i = 0; i < 200; i++) {
+                udelay(100);
+                gphy_val = rtl8168_mdio_read(tp, 0x1E);
+                if ((gphy_val & 0x03FF) == 0x0014)
+                        break;
+        }
+        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+        for (i = 0; i < 200; i++) {
+                udelay(100);
+                gphy_val = rtl8168_mdio_read(tp, 0x07);
+                if ((gphy_val & BIT_5) == 0)
+                        break;
+        }
+        gphy_val = rtl8168_mdio_read(tp, 0x07);
+        if (gphy_val & BIT_5) {
+                rtl8168_mdio_write(tp, 0x1f, 0x0004);
+                rtl8168_mdio_write(tp, 0x1f, 0x0007);
+                rtl8168_mdio_write(tp, 0x1e, 0x00a1);
+                rtl8168_mdio_write(tp, 0x17, 0x1000);
+                rtl8168_mdio_write(tp, 0x17, 0x0000);
+                rtl8168_mdio_write(tp, 0x17, 0x2000);
+                rtl8168_mdio_write(tp, 0x1e, 0x002f);
+                rtl8168_mdio_write(tp, 0x18, 0x9bfb);
+                rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                rtl8168_mdio_write(tp, 0x07, 0x0000);
+                rtl8168_mdio_write(tp, 0x1f, 0x0002);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        }
+        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+        rtl8168_mdio_write(tp, 0x05, 0xfff6);
+        rtl8168_mdio_write(tp, 0x06, 0x0080);
+        gphy_val = rtl8168_mdio_read(tp, 0x00);
+        gphy_val &= ~(BIT_7);
+        rtl8168_mdio_write(tp, 0x00, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0004);
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1e, 0x0023);
+        rtl8168_mdio_write(tp, 0x16, 0x0306);
+        rtl8168_mdio_write(tp, 0x16, 0x0307);
+        rtl8168_mdio_write(tp, 0x15, 0x0000);
+        rtl8168_mdio_write(tp, 0x19, 0x407d);
+        rtl8168_mdio_write(tp, 0x15, 0x0001);
+        rtl8168_mdio_write(tp, 0x19, 0x440f);
+        rtl8168_mdio_write(tp, 0x15, 0x0002);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x0003);
+        rtl8168_mdio_write(tp, 0x19, 0x6c03);
+        rtl8168_mdio_write(tp, 0x15, 0x0004);
+        rtl8168_mdio_write(tp, 0x19, 0xc4d5);
+        rtl8168_mdio_write(tp, 0x15, 0x0005);
+        rtl8168_mdio_write(tp, 0x19, 0x00ff);
+        rtl8168_mdio_write(tp, 0x15, 0x0006);
+        rtl8168_mdio_write(tp, 0x19, 0x74f0);
+        rtl8168_mdio_write(tp, 0x15, 0x0007);
+        rtl8168_mdio_write(tp, 0x19, 0x4880);
+        rtl8168_mdio_write(tp, 0x15, 0x0008);
+        rtl8168_mdio_write(tp, 0x19, 0x4c00);
+        rtl8168_mdio_write(tp, 0x15, 0x0009);
+        rtl8168_mdio_write(tp, 0x19, 0x4800);
+        rtl8168_mdio_write(tp, 0x15, 0x000a);
+        rtl8168_mdio_write(tp, 0x19, 0x5000);
+        rtl8168_mdio_write(tp, 0x15, 0x000b);
+        rtl8168_mdio_write(tp, 0x19, 0x4400);
+        rtl8168_mdio_write(tp, 0x15, 0x000c);
+        rtl8168_mdio_write(tp, 0x19, 0x7801);
+        rtl8168_mdio_write(tp, 0x15, 0x000d);
+        rtl8168_mdio_write(tp, 0x19, 0x4000);
+        rtl8168_mdio_write(tp, 0x15, 0x000e);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x000f);
+        rtl8168_mdio_write(tp, 0x19, 0x7010);
+        rtl8168_mdio_write(tp, 0x15, 0x0010);
+        rtl8168_mdio_write(tp, 0x19, 0x6804);
+        rtl8168_mdio_write(tp, 0x15, 0x0011);
+        rtl8168_mdio_write(tp, 0x19, 0x64a0);
+        rtl8168_mdio_write(tp, 0x15, 0x0012);
+        rtl8168_mdio_write(tp, 0x19, 0x63da);
+        rtl8168_mdio_write(tp, 0x15, 0x0013);
+        rtl8168_mdio_write(tp, 0x19, 0x63d8);
+        rtl8168_mdio_write(tp, 0x15, 0x0014);
+        rtl8168_mdio_write(tp, 0x19, 0x6f05);
+        rtl8168_mdio_write(tp, 0x15, 0x0015);
+        rtl8168_mdio_write(tp, 0x19, 0x5420);
+        rtl8168_mdio_write(tp, 0x15, 0x0016);
+        rtl8168_mdio_write(tp, 0x19, 0x58ce);
+        rtl8168_mdio_write(tp, 0x15, 0x0017);
+        rtl8168_mdio_write(tp, 0x19, 0x5cf3);
+        rtl8168_mdio_write(tp, 0x15, 0x0018);
+        rtl8168_mdio_write(tp, 0x19, 0xb600);
+        rtl8168_mdio_write(tp, 0x15, 0x0019);
+        rtl8168_mdio_write(tp, 0x19, 0xc659);
+        rtl8168_mdio_write(tp, 0x15, 0x001a);
+        rtl8168_mdio_write(tp, 0x19, 0x0018);
+        rtl8168_mdio_write(tp, 0x15, 0x001b);
+        rtl8168_mdio_write(tp, 0x19, 0xc403);
+        rtl8168_mdio_write(tp, 0x15, 0x001c);
+        rtl8168_mdio_write(tp, 0x19, 0x0016);
+        rtl8168_mdio_write(tp, 0x15, 0x001d);
+        rtl8168_mdio_write(tp, 0x19, 0xaa05);
+        rtl8168_mdio_write(tp, 0x15, 0x001e);
+        rtl8168_mdio_write(tp, 0x19, 0xc503);
+        rtl8168_mdio_write(tp, 0x15, 0x001f);
+        rtl8168_mdio_write(tp, 0x19, 0x0003);
+        rtl8168_mdio_write(tp, 0x15, 0x0020);
+        rtl8168_mdio_write(tp, 0x19, 0x89f8);
+        rtl8168_mdio_write(tp, 0x15, 0x0021);
+        rtl8168_mdio_write(tp, 0x19, 0x32ae);
+        rtl8168_mdio_write(tp, 0x15, 0x0022);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x0023);
+        rtl8168_mdio_write(tp, 0x19, 0x6c03);
+        rtl8168_mdio_write(tp, 0x15, 0x0024);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x0025);
+        rtl8168_mdio_write(tp, 0x19, 0x6801);
+        rtl8168_mdio_write(tp, 0x15, 0x0026);
+        rtl8168_mdio_write(tp, 0x19, 0x66a0);
+        rtl8168_mdio_write(tp, 0x15, 0x0027);
+        rtl8168_mdio_write(tp, 0x19, 0xa300);
+        rtl8168_mdio_write(tp, 0x15, 0x0028);
+        rtl8168_mdio_write(tp, 0x19, 0x64a0);
+        rtl8168_mdio_write(tp, 0x15, 0x0029);
+        rtl8168_mdio_write(tp, 0x19, 0x76f0);
+        rtl8168_mdio_write(tp, 0x15, 0x002a);
+        rtl8168_mdio_write(tp, 0x19, 0x7670);
+        rtl8168_mdio_write(tp, 0x15, 0x002b);
+        rtl8168_mdio_write(tp, 0x19, 0x7630);
+        rtl8168_mdio_write(tp, 0x15, 0x002c);
+        rtl8168_mdio_write(tp, 0x19, 0x31a6);
+        rtl8168_mdio_write(tp, 0x15, 0x002d);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x002e);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x002f);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0030);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0031);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0032);
+        rtl8168_mdio_write(tp, 0x19, 0x4801);
+        rtl8168_mdio_write(tp, 0x15, 0x0033);
+        rtl8168_mdio_write(tp, 0x19, 0x6803);
+        rtl8168_mdio_write(tp, 0x15, 0x0034);
+        rtl8168_mdio_write(tp, 0x19, 0x66a1);
+        rtl8168_mdio_write(tp, 0x15, 0x0035);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x0036);
+        rtl8168_mdio_write(tp, 0x19, 0x6c03);
+        rtl8168_mdio_write(tp, 0x15, 0x0037);
+        rtl8168_mdio_write(tp, 0x19, 0xa300);
+        rtl8168_mdio_write(tp, 0x15, 0x0038);
+        rtl8168_mdio_write(tp, 0x19, 0x64a1);
+        rtl8168_mdio_write(tp, 0x15, 0x0039);
+        rtl8168_mdio_write(tp, 0x19, 0x7c08);
+        rtl8168_mdio_write(tp, 0x15, 0x003a);
+        rtl8168_mdio_write(tp, 0x19, 0x74f8);
+        rtl8168_mdio_write(tp, 0x15, 0x003b);
+        rtl8168_mdio_write(tp, 0x19, 0x63d0);
+        rtl8168_mdio_write(tp, 0x15, 0x003c);
+        rtl8168_mdio_write(tp, 0x19, 0x7ff0);
+        rtl8168_mdio_write(tp, 0x15, 0x003d);
+        rtl8168_mdio_write(tp, 0x19, 0x77f0);
+        rtl8168_mdio_write(tp, 0x15, 0x003e);
+        rtl8168_mdio_write(tp, 0x19, 0x7ff0);
+        rtl8168_mdio_write(tp, 0x15, 0x003f);
+        rtl8168_mdio_write(tp, 0x19, 0x7750);
+        rtl8168_mdio_write(tp, 0x15, 0x0040);
+        rtl8168_mdio_write(tp, 0x19, 0x63d8);
+        rtl8168_mdio_write(tp, 0x15, 0x0041);
+        rtl8168_mdio_write(tp, 0x19, 0x7cf0);
+        rtl8168_mdio_write(tp, 0x15, 0x0042);
+        rtl8168_mdio_write(tp, 0x19, 0x7708);
+        rtl8168_mdio_write(tp, 0x15, 0x0043);
+        rtl8168_mdio_write(tp, 0x19, 0xa654);
+        rtl8168_mdio_write(tp, 0x15, 0x0044);
+        rtl8168_mdio_write(tp, 0x19, 0x304a);
+        rtl8168_mdio_write(tp, 0x15, 0x0045);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0046);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0047);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0048);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0049);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x004a);
+        rtl8168_mdio_write(tp, 0x19, 0x4802);
+        rtl8168_mdio_write(tp, 0x15, 0x004b);
+        rtl8168_mdio_write(tp, 0x19, 0x4003);
+        rtl8168_mdio_write(tp, 0x15, 0x004c);
+        rtl8168_mdio_write(tp, 0x19, 0x4440);
+        rtl8168_mdio_write(tp, 0x15, 0x004d);
+        rtl8168_mdio_write(tp, 0x19, 0x63c8);
+        rtl8168_mdio_write(tp, 0x15, 0x004e);
+        rtl8168_mdio_write(tp, 0x19, 0x6481);
+        rtl8168_mdio_write(tp, 0x15, 0x004f);
+        rtl8168_mdio_write(tp, 0x19, 0x9d00);
+        rtl8168_mdio_write(tp, 0x15, 0x0050);
+        rtl8168_mdio_write(tp, 0x19, 0x63e8);
+        rtl8168_mdio_write(tp, 0x15, 0x0051);
+        rtl8168_mdio_write(tp, 0x19, 0x7d00);
+        rtl8168_mdio_write(tp, 0x15, 0x0052);
+        rtl8168_mdio_write(tp, 0x19, 0x5900);
+        rtl8168_mdio_write(tp, 0x15, 0x0053);
+        rtl8168_mdio_write(tp, 0x19, 0x63f8);
+        rtl8168_mdio_write(tp, 0x15, 0x0054);
+        rtl8168_mdio_write(tp, 0x19, 0x64a1);
+        rtl8168_mdio_write(tp, 0x15, 0x0055);
+        rtl8168_mdio_write(tp, 0x19, 0x3116);
+        rtl8168_mdio_write(tp, 0x15, 0x0056);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0057);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0058);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0059);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x005a);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x005b);
+        rtl8168_mdio_write(tp, 0x19, 0x6c03);
+        rtl8168_mdio_write(tp, 0x15, 0x005c);
+        rtl8168_mdio_write(tp, 0x19, 0x7c08);
+        rtl8168_mdio_write(tp, 0x15, 0x005d);
+        rtl8168_mdio_write(tp, 0x19, 0x6000);
+        rtl8168_mdio_write(tp, 0x15, 0x005e);
+        rtl8168_mdio_write(tp, 0x19, 0x59ce);
+        rtl8168_mdio_write(tp, 0x15, 0x005f);
+        rtl8168_mdio_write(tp, 0x19, 0x4400);
+        rtl8168_mdio_write(tp, 0x15, 0x0060);
+        rtl8168_mdio_write(tp, 0x19, 0x7d00);
+        rtl8168_mdio_write(tp, 0x15, 0x0061);
+        rtl8168_mdio_write(tp, 0x19, 0x72b0);
+        rtl8168_mdio_write(tp, 0x15, 0x0062);
+        rtl8168_mdio_write(tp, 0x19, 0x400e);
+        rtl8168_mdio_write(tp, 0x15, 0x0063);
+        rtl8168_mdio_write(tp, 0x19, 0x4440);
+        rtl8168_mdio_write(tp, 0x15, 0x0064);
+        rtl8168_mdio_write(tp, 0x19, 0x9d00);
+        rtl8168_mdio_write(tp, 0x15, 0x0065);
+        rtl8168_mdio_write(tp, 0x19, 0x7f00);
+        rtl8168_mdio_write(tp, 0x15, 0x0066);
+        rtl8168_mdio_write(tp, 0x19, 0x70b0);
+        rtl8168_mdio_write(tp, 0x15, 0x0067);
+        rtl8168_mdio_write(tp, 0x19, 0x7c08);
+        rtl8168_mdio_write(tp, 0x15, 0x0068);
+        rtl8168_mdio_write(tp, 0x19, 0x6008);
+        rtl8168_mdio_write(tp, 0x15, 0x0069);
+        rtl8168_mdio_write(tp, 0x19, 0x7cf0);
+        rtl8168_mdio_write(tp, 0x15, 0x006a);
+        rtl8168_mdio_write(tp, 0x19, 0x7750);
+        rtl8168_mdio_write(tp, 0x15, 0x006b);
+        rtl8168_mdio_write(tp, 0x19, 0x4007);
+        rtl8168_mdio_write(tp, 0x15, 0x006c);
+        rtl8168_mdio_write(tp, 0x19, 0x4500);
+        rtl8168_mdio_write(tp, 0x15, 0x006d);
+        rtl8168_mdio_write(tp, 0x19, 0x4023);
+        rtl8168_mdio_write(tp, 0x15, 0x006e);
+        rtl8168_mdio_write(tp, 0x19, 0x4580);
+        rtl8168_mdio_write(tp, 0x15, 0x006f);
+        rtl8168_mdio_write(tp, 0x19, 0x9f00);
+        rtl8168_mdio_write(tp, 0x15, 0x0070);
+        rtl8168_mdio_write(tp, 0x19, 0xcd78);
+        rtl8168_mdio_write(tp, 0x15, 0x0071);
+        rtl8168_mdio_write(tp, 0x19, 0x0003);
+        rtl8168_mdio_write(tp, 0x15, 0x0072);
+        rtl8168_mdio_write(tp, 0x19, 0xbe02);
+        rtl8168_mdio_write(tp, 0x15, 0x0073);
+        rtl8168_mdio_write(tp, 0x19, 0x3070);
+        rtl8168_mdio_write(tp, 0x15, 0x0074);
+        rtl8168_mdio_write(tp, 0x19, 0x7cf0);
+        rtl8168_mdio_write(tp, 0x15, 0x0075);
+        rtl8168_mdio_write(tp, 0x19, 0x77f0);
+        rtl8168_mdio_write(tp, 0x15, 0x0076);
+        rtl8168_mdio_write(tp, 0x19, 0x4400);
+        rtl8168_mdio_write(tp, 0x15, 0x0077);
+        rtl8168_mdio_write(tp, 0x19, 0x4007);
+        rtl8168_mdio_write(tp, 0x15, 0x0078);
+        rtl8168_mdio_write(tp, 0x19, 0x4500);
+        rtl8168_mdio_write(tp, 0x15, 0x0079);
+        rtl8168_mdio_write(tp, 0x19, 0x4023);
+        rtl8168_mdio_write(tp, 0x15, 0x007a);
+        rtl8168_mdio_write(tp, 0x19, 0x4580);
+        rtl8168_mdio_write(tp, 0x15, 0x007b);
+        rtl8168_mdio_write(tp, 0x19, 0x9f00);
+        rtl8168_mdio_write(tp, 0x15, 0x007c);
+        rtl8168_mdio_write(tp, 0x19, 0xce80);
+        rtl8168_mdio_write(tp, 0x15, 0x007d);
+        rtl8168_mdio_write(tp, 0x19, 0x0004);
+        rtl8168_mdio_write(tp, 0x15, 0x007e);
+        rtl8168_mdio_write(tp, 0x19, 0xce80);
+        rtl8168_mdio_write(tp, 0x15, 0x007f);
+        rtl8168_mdio_write(tp, 0x19, 0x0002);
+        rtl8168_mdio_write(tp, 0x15, 0x0080);
+        rtl8168_mdio_write(tp, 0x19, 0x307c);
+        rtl8168_mdio_write(tp, 0x15, 0x0081);
+        rtl8168_mdio_write(tp, 0x19, 0x4400);
+        rtl8168_mdio_write(tp, 0x15, 0x0082);
+        rtl8168_mdio_write(tp, 0x19, 0x480f);
+        rtl8168_mdio_write(tp, 0x15, 0x0083);
+        rtl8168_mdio_write(tp, 0x19, 0x6802);
+        rtl8168_mdio_write(tp, 0x15, 0x0084);
+        rtl8168_mdio_write(tp, 0x19, 0x6680);
+        rtl8168_mdio_write(tp, 0x15, 0x0085);
+        rtl8168_mdio_write(tp, 0x19, 0x7c10);
+        rtl8168_mdio_write(tp, 0x15, 0x0086);
+        rtl8168_mdio_write(tp, 0x19, 0x6010);
+        rtl8168_mdio_write(tp, 0x15, 0x0087);
+        rtl8168_mdio_write(tp, 0x19, 0x400a);
+        rtl8168_mdio_write(tp, 0x15, 0x0088);
+        rtl8168_mdio_write(tp, 0x19, 0x4580);
+        rtl8168_mdio_write(tp, 0x15, 0x0089);
+        rtl8168_mdio_write(tp, 0x19, 0x9e00);
+        rtl8168_mdio_write(tp, 0x15, 0x008a);
+        rtl8168_mdio_write(tp, 0x19, 0x7d00);
+        rtl8168_mdio_write(tp, 0x15, 0x008b);
+        rtl8168_mdio_write(tp, 0x19, 0x5800);
+        rtl8168_mdio_write(tp, 0x15, 0x008c);
+        rtl8168_mdio_write(tp, 0x19, 0x63c8);
+        rtl8168_mdio_write(tp, 0x15, 0x008d);
+        rtl8168_mdio_write(tp, 0x19, 0x63d8);
+        rtl8168_mdio_write(tp, 0x15, 0x008e);
+        rtl8168_mdio_write(tp, 0x19, 0x66a0);
+        rtl8168_mdio_write(tp, 0x15, 0x008f);
+        rtl8168_mdio_write(tp, 0x19, 0x8300);
+        rtl8168_mdio_write(tp, 0x15, 0x0090);
+        rtl8168_mdio_write(tp, 0x19, 0x7ff0);
+        rtl8168_mdio_write(tp, 0x15, 0x0091);
+        rtl8168_mdio_write(tp, 0x19, 0x74f0);
+        rtl8168_mdio_write(tp, 0x15, 0x0092);
+        rtl8168_mdio_write(tp, 0x19, 0x3006);
+        rtl8168_mdio_write(tp, 0x15, 0x0093);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0094);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0095);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0096);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0097);
+        rtl8168_mdio_write(tp, 0x19, 0x4803);
+        rtl8168_mdio_write(tp, 0x15, 0x0098);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x0099);
+        rtl8168_mdio_write(tp, 0x19, 0x6c03);
+        rtl8168_mdio_write(tp, 0x15, 0x009a);
+        rtl8168_mdio_write(tp, 0x19, 0xa203);
+        rtl8168_mdio_write(tp, 0x15, 0x009b);
+        rtl8168_mdio_write(tp, 0x19, 0x64b1);
+        rtl8168_mdio_write(tp, 0x15, 0x009c);
+        rtl8168_mdio_write(tp, 0x19, 0x309e);
+        rtl8168_mdio_write(tp, 0x15, 0x009d);
+        rtl8168_mdio_write(tp, 0x19, 0x64b3);
+        rtl8168_mdio_write(tp, 0x15, 0x009e);
+        rtl8168_mdio_write(tp, 0x19, 0x4030);
+        rtl8168_mdio_write(tp, 0x15, 0x009f);
+        rtl8168_mdio_write(tp, 0x19, 0x440e);
+        rtl8168_mdio_write(tp, 0x15, 0x00a0);
+        rtl8168_mdio_write(tp, 0x19, 0x4020);
+        rtl8168_mdio_write(tp, 0x15, 0x00a1);
+        rtl8168_mdio_write(tp, 0x19, 0x4419);
+        rtl8168_mdio_write(tp, 0x15, 0x00a2);
+        rtl8168_mdio_write(tp, 0x19, 0x7801);
+        rtl8168_mdio_write(tp, 0x15, 0x00a3);
+        rtl8168_mdio_write(tp, 0x19, 0xc520);
+        rtl8168_mdio_write(tp, 0x15, 0x00a4);
+        rtl8168_mdio_write(tp, 0x19, 0x000b);
+        rtl8168_mdio_write(tp, 0x15, 0x00a5);
+        rtl8168_mdio_write(tp, 0x19, 0x4020);
+        rtl8168_mdio_write(tp, 0x15, 0x00a6);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x00a7);
+        rtl8168_mdio_write(tp, 0x19, 0x58a4);
+        rtl8168_mdio_write(tp, 0x15, 0x00a8);
+        rtl8168_mdio_write(tp, 0x19, 0x63da);
+        rtl8168_mdio_write(tp, 0x15, 0x00a9);
+        rtl8168_mdio_write(tp, 0x19, 0x5cb0);
+        rtl8168_mdio_write(tp, 0x15, 0x00aa);
+        rtl8168_mdio_write(tp, 0x19, 0x7d00);
+        rtl8168_mdio_write(tp, 0x15, 0x00ab);
+        rtl8168_mdio_write(tp, 0x19, 0x72b0);
+        rtl8168_mdio_write(tp, 0x15, 0x00ac);
+        rtl8168_mdio_write(tp, 0x19, 0x7f00);
+        rtl8168_mdio_write(tp, 0x15, 0x00ad);
+        rtl8168_mdio_write(tp, 0x19, 0x70b0);
+        rtl8168_mdio_write(tp, 0x15, 0x00ae);
+        rtl8168_mdio_write(tp, 0x19, 0x30b8);
+        rtl8168_mdio_write(tp, 0x15, 0x00AF);
+        rtl8168_mdio_write(tp, 0x19, 0x4060);
+        rtl8168_mdio_write(tp, 0x15, 0x00B0);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x00B1);
+        rtl8168_mdio_write(tp, 0x19, 0x7e00);
+        rtl8168_mdio_write(tp, 0x15, 0x00B2);
+        rtl8168_mdio_write(tp, 0x19, 0x72B0);
+        rtl8168_mdio_write(tp, 0x15, 0x00B3);
+        rtl8168_mdio_write(tp, 0x19, 0x7F00);
+        rtl8168_mdio_write(tp, 0x15, 0x00B4);
+        rtl8168_mdio_write(tp, 0x19, 0x73B0);
+        rtl8168_mdio_write(tp, 0x15, 0x00b5);
+        rtl8168_mdio_write(tp, 0x19, 0x58a0);
+        rtl8168_mdio_write(tp, 0x15, 0x00b6);
+        rtl8168_mdio_write(tp, 0x19, 0x63d2);
+        rtl8168_mdio_write(tp, 0x15, 0x00b7);
+        rtl8168_mdio_write(tp, 0x19, 0x5c00);
+        rtl8168_mdio_write(tp, 0x15, 0x00b8);
+        rtl8168_mdio_write(tp, 0x19, 0x5780);
+        rtl8168_mdio_write(tp, 0x15, 0x00b9);
+        rtl8168_mdio_write(tp, 0x19, 0xb60d);
+        rtl8168_mdio_write(tp, 0x15, 0x00ba);
+        rtl8168_mdio_write(tp, 0x19, 0x9bff);
+        rtl8168_mdio_write(tp, 0x15, 0x00bb);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x00bc);
+        rtl8168_mdio_write(tp, 0x19, 0x6001);
+        rtl8168_mdio_write(tp, 0x15, 0x00bd);
+        rtl8168_mdio_write(tp, 0x19, 0xc020);
+        rtl8168_mdio_write(tp, 0x15, 0x00be);
+        rtl8168_mdio_write(tp, 0x19, 0x002b);
+        rtl8168_mdio_write(tp, 0x15, 0x00bf);
+        rtl8168_mdio_write(tp, 0x19, 0xc137);
+        rtl8168_mdio_write(tp, 0x15, 0x00c0);
+        rtl8168_mdio_write(tp, 0x19, 0x0006);
+        rtl8168_mdio_write(tp, 0x15, 0x00c1);
+        rtl8168_mdio_write(tp, 0x19, 0x9af8);
+        rtl8168_mdio_write(tp, 0x15, 0x00c2);
+        rtl8168_mdio_write(tp, 0x19, 0x30c6);
+        rtl8168_mdio_write(tp, 0x15, 0x00c3);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x00c4);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x00c5);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x00c6);
+        rtl8168_mdio_write(tp, 0x19, 0x7d00);
+        rtl8168_mdio_write(tp, 0x15, 0x00c7);
+        rtl8168_mdio_write(tp, 0x19, 0x70b0);
+        rtl8168_mdio_write(tp, 0x15, 0x00c8);
+        rtl8168_mdio_write(tp, 0x19, 0x4400);
+        rtl8168_mdio_write(tp, 0x15, 0x00c9);
+        rtl8168_mdio_write(tp, 0x19, 0x4804);
+        rtl8168_mdio_write(tp, 0x15, 0x00ca);
+        rtl8168_mdio_write(tp, 0x19, 0x7c80);
+        rtl8168_mdio_write(tp, 0x15, 0x00cb);
+        rtl8168_mdio_write(tp, 0x19, 0x5c80);
+        rtl8168_mdio_write(tp, 0x15, 0x00cc);
+        rtl8168_mdio_write(tp, 0x19, 0x4010);
+        rtl8168_mdio_write(tp, 0x15, 0x00cd);
+        rtl8168_mdio_write(tp, 0x19, 0x4415);
+        rtl8168_mdio_write(tp, 0x15, 0x00ce);
+        rtl8168_mdio_write(tp, 0x19, 0x9b00);
+        rtl8168_mdio_write(tp, 0x15, 0x00cf);
+        rtl8168_mdio_write(tp, 0x19, 0x7f00);
+        rtl8168_mdio_write(tp, 0x15, 0x00d0);
+        rtl8168_mdio_write(tp, 0x19, 0x70b0);
+        rtl8168_mdio_write(tp, 0x15, 0x00d1);
+        rtl8168_mdio_write(tp, 0x19, 0x3177);
+        rtl8168_mdio_write(tp, 0x15, 0x00d2);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x00d3);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x00d4);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x00d5);
+        rtl8168_mdio_write(tp, 0x19, 0x4808);
+        rtl8168_mdio_write(tp, 0x15, 0x00d6);
+        rtl8168_mdio_write(tp, 0x19, 0x4007);
+        rtl8168_mdio_write(tp, 0x15, 0x00d7);
+        rtl8168_mdio_write(tp, 0x19, 0x4420);
+        rtl8168_mdio_write(tp, 0x15, 0x00d8);
+        rtl8168_mdio_write(tp, 0x19, 0x63d8);
+        rtl8168_mdio_write(tp, 0x15, 0x00d9);
+        rtl8168_mdio_write(tp, 0x19, 0xb608);
+        rtl8168_mdio_write(tp, 0x15, 0x00da);
+        rtl8168_mdio_write(tp, 0x19, 0xbcbd);
+        rtl8168_mdio_write(tp, 0x15, 0x00db);
+        rtl8168_mdio_write(tp, 0x19, 0xc60b);
+        rtl8168_mdio_write(tp, 0x15, 0x00dc);
+        rtl8168_mdio_write(tp, 0x19, 0x00fd);
+        rtl8168_mdio_write(tp, 0x15, 0x00dd);
+        rtl8168_mdio_write(tp, 0x19, 0x30e1);
+        rtl8168_mdio_write(tp, 0x15, 0x00de);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x00df);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x00e0);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x00e1);
+        rtl8168_mdio_write(tp, 0x19, 0x4809);
+        rtl8168_mdio_write(tp, 0x15, 0x00e2);
+        rtl8168_mdio_write(tp, 0x19, 0x7e40);
+        rtl8168_mdio_write(tp, 0x15, 0x00e3);
+        rtl8168_mdio_write(tp, 0x19, 0x5a40);
+        rtl8168_mdio_write(tp, 0x15, 0x00e4);
+        rtl8168_mdio_write(tp, 0x19, 0x305a);
+        rtl8168_mdio_write(tp, 0x15, 0x00e5);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x00e6);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x00e7);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x00e8);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x00e9);
+        rtl8168_mdio_write(tp, 0x19, 0x480a);
+        rtl8168_mdio_write(tp, 0x15, 0x00ea);
+        rtl8168_mdio_write(tp, 0x19, 0x5820);
+        rtl8168_mdio_write(tp, 0x15, 0x00eb);
+        rtl8168_mdio_write(tp, 0x19, 0x6c03);
+        rtl8168_mdio_write(tp, 0x15, 0x00ec);
+        rtl8168_mdio_write(tp, 0x19, 0xb60a);
+        rtl8168_mdio_write(tp, 0x15, 0x00ed);
+        rtl8168_mdio_write(tp, 0x19, 0xda07);
+        rtl8168_mdio_write(tp, 0x15, 0x00ee);
+        rtl8168_mdio_write(tp, 0x19, 0x0008);
+        rtl8168_mdio_write(tp, 0x15, 0x00ef);
+        rtl8168_mdio_write(tp, 0x19, 0xc60b);
+        rtl8168_mdio_write(tp, 0x15, 0x00f0);
+        rtl8168_mdio_write(tp, 0x19, 0x00fc);
+        rtl8168_mdio_write(tp, 0x15, 0x00f1);
+        rtl8168_mdio_write(tp, 0x19, 0x30f6);
+        rtl8168_mdio_write(tp, 0x15, 0x00f2);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x00f3);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x00f4);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x00f5);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x00f6);
+        rtl8168_mdio_write(tp, 0x19, 0x4408);
+        rtl8168_mdio_write(tp, 0x15, 0x00f7);
+        rtl8168_mdio_write(tp, 0x19, 0x480b);
+        rtl8168_mdio_write(tp, 0x15, 0x00f8);
+        rtl8168_mdio_write(tp, 0x19, 0x6f03);
+        rtl8168_mdio_write(tp, 0x15, 0x00f9);
+        rtl8168_mdio_write(tp, 0x19, 0x405f);
+        rtl8168_mdio_write(tp, 0x15, 0x00fa);
+        rtl8168_mdio_write(tp, 0x19, 0x4448);
+        rtl8168_mdio_write(tp, 0x15, 0x00fb);
+        rtl8168_mdio_write(tp, 0x19, 0x4020);
+        rtl8168_mdio_write(tp, 0x15, 0x00fc);
+        rtl8168_mdio_write(tp, 0x19, 0x4468);
+        rtl8168_mdio_write(tp, 0x15, 0x00fd);
+        rtl8168_mdio_write(tp, 0x19, 0x9c03);
+        rtl8168_mdio_write(tp, 0x15, 0x00fe);
+        rtl8168_mdio_write(tp, 0x19, 0x6f07);
+        rtl8168_mdio_write(tp, 0x15, 0x00ff);
+        rtl8168_mdio_write(tp, 0x19, 0x58a0);
+        rtl8168_mdio_write(tp, 0x15, 0x0100);
+        rtl8168_mdio_write(tp, 0x19, 0xd6d1);
+        rtl8168_mdio_write(tp, 0x15, 0x0101);
+        rtl8168_mdio_write(tp, 0x19, 0x0004);
+        rtl8168_mdio_write(tp, 0x15, 0x0102);
+        rtl8168_mdio_write(tp, 0x19, 0xc137);
+        rtl8168_mdio_write(tp, 0x15, 0x0103);
+        rtl8168_mdio_write(tp, 0x19, 0x0002);
+        rtl8168_mdio_write(tp, 0x15, 0x0104);
+        rtl8168_mdio_write(tp, 0x19, 0xa0e5);
+        rtl8168_mdio_write(tp, 0x15, 0x0105);
+        rtl8168_mdio_write(tp, 0x19, 0x9df8);
+        rtl8168_mdio_write(tp, 0x15, 0x0106);
+        rtl8168_mdio_write(tp, 0x19, 0x30c6);
+        rtl8168_mdio_write(tp, 0x15, 0x0107);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0108);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0109);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x010a);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x010b);
+        rtl8168_mdio_write(tp, 0x19, 0x4808);
+        rtl8168_mdio_write(tp, 0x15, 0x010c);
+        rtl8168_mdio_write(tp, 0x19, 0xc32d);
+        rtl8168_mdio_write(tp, 0x15, 0x010d);
+        rtl8168_mdio_write(tp, 0x19, 0x0003);
+        rtl8168_mdio_write(tp, 0x15, 0x010e);
+        rtl8168_mdio_write(tp, 0x19, 0xc8b3);
+        rtl8168_mdio_write(tp, 0x15, 0x010f);
+        rtl8168_mdio_write(tp, 0x19, 0x00fc);
+        rtl8168_mdio_write(tp, 0x15, 0x0110);
+        rtl8168_mdio_write(tp, 0x19, 0x4400);
+        rtl8168_mdio_write(tp, 0x15, 0x0111);
+        rtl8168_mdio_write(tp, 0x19, 0x3116);
+        rtl8168_mdio_write(tp, 0x15, 0x0112);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0113);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0114);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0115);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0116);
+        rtl8168_mdio_write(tp, 0x19, 0x4803);
+        rtl8168_mdio_write(tp, 0x15, 0x0117);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x0118);
+        rtl8168_mdio_write(tp, 0x19, 0x6c02);
+        rtl8168_mdio_write(tp, 0x15, 0x0119);
+        rtl8168_mdio_write(tp, 0x19, 0x7c04);
+        rtl8168_mdio_write(tp, 0x15, 0x011a);
+        rtl8168_mdio_write(tp, 0x19, 0x6000);
+        rtl8168_mdio_write(tp, 0x15, 0x011b);
+        rtl8168_mdio_write(tp, 0x19, 0x5cf7);
+        rtl8168_mdio_write(tp, 0x15, 0x011c);
+        rtl8168_mdio_write(tp, 0x19, 0x7c2a);
+        rtl8168_mdio_write(tp, 0x15, 0x011d);
+        rtl8168_mdio_write(tp, 0x19, 0x5800);
+        rtl8168_mdio_write(tp, 0x15, 0x011e);
+        rtl8168_mdio_write(tp, 0x19, 0x5400);
+        rtl8168_mdio_write(tp, 0x15, 0x011f);
+        rtl8168_mdio_write(tp, 0x19, 0x7c08);
+        rtl8168_mdio_write(tp, 0x15, 0x0120);
+        rtl8168_mdio_write(tp, 0x19, 0x74f0);
+        rtl8168_mdio_write(tp, 0x15, 0x0121);
+        rtl8168_mdio_write(tp, 0x19, 0x4019);
+        rtl8168_mdio_write(tp, 0x15, 0x0122);
+        rtl8168_mdio_write(tp, 0x19, 0x440d);
+        rtl8168_mdio_write(tp, 0x15, 0x0123);
+        rtl8168_mdio_write(tp, 0x19, 0xb6c1);
+        rtl8168_mdio_write(tp, 0x15, 0x0124);
+        rtl8168_mdio_write(tp, 0x19, 0xc05b);
+        rtl8168_mdio_write(tp, 0x15, 0x0125);
+        rtl8168_mdio_write(tp, 0x19, 0x00bf);
+        rtl8168_mdio_write(tp, 0x15, 0x0126);
+        rtl8168_mdio_write(tp, 0x19, 0xc025);
+        rtl8168_mdio_write(tp, 0x15, 0x0127);
+        rtl8168_mdio_write(tp, 0x19, 0x00bd);
+        rtl8168_mdio_write(tp, 0x15, 0x0128);
+        rtl8168_mdio_write(tp, 0x19, 0xc603);
+        rtl8168_mdio_write(tp, 0x15, 0x0129);
+        rtl8168_mdio_write(tp, 0x19, 0x00bb);
+        rtl8168_mdio_write(tp, 0x15, 0x012a);
+        rtl8168_mdio_write(tp, 0x19, 0x8805);
+        rtl8168_mdio_write(tp, 0x15, 0x012b);
+        rtl8168_mdio_write(tp, 0x19, 0x7801);
+        rtl8168_mdio_write(tp, 0x15, 0x012c);
+        rtl8168_mdio_write(tp, 0x19, 0x4001);
+        rtl8168_mdio_write(tp, 0x15, 0x012d);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x012e);
+        rtl8168_mdio_write(tp, 0x19, 0xa3dd);
+        rtl8168_mdio_write(tp, 0x15, 0x012f);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x0130);
+        rtl8168_mdio_write(tp, 0x19, 0x6c03);
+        rtl8168_mdio_write(tp, 0x15, 0x0131);
+        rtl8168_mdio_write(tp, 0x19, 0x8407);
+        rtl8168_mdio_write(tp, 0x15, 0x0132);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x0133);
+        rtl8168_mdio_write(tp, 0x19, 0x6c02);
+        rtl8168_mdio_write(tp, 0x15, 0x0134);
+        rtl8168_mdio_write(tp, 0x19, 0xd9b8);
+        rtl8168_mdio_write(tp, 0x15, 0x0135);
+        rtl8168_mdio_write(tp, 0x19, 0x0003);
+        rtl8168_mdio_write(tp, 0x15, 0x0136);
+        rtl8168_mdio_write(tp, 0x19, 0xc240);
+        rtl8168_mdio_write(tp, 0x15, 0x0137);
+        rtl8168_mdio_write(tp, 0x19, 0x0015);
+        rtl8168_mdio_write(tp, 0x15, 0x0138);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x0139);
+        rtl8168_mdio_write(tp, 0x19, 0x6c02);
+        rtl8168_mdio_write(tp, 0x15, 0x013a);
+        rtl8168_mdio_write(tp, 0x19, 0x9ae9);
+        rtl8168_mdio_write(tp, 0x15, 0x013b);
+        rtl8168_mdio_write(tp, 0x19, 0x3140);
+        rtl8168_mdio_write(tp, 0x15, 0x013c);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x013d);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x013e);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x013f);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0140);
+        rtl8168_mdio_write(tp, 0x19, 0x4807);
+        rtl8168_mdio_write(tp, 0x15, 0x0141);
+        rtl8168_mdio_write(tp, 0x19, 0x4004);
+        rtl8168_mdio_write(tp, 0x15, 0x0142);
+        rtl8168_mdio_write(tp, 0x19, 0x4410);
+        rtl8168_mdio_write(tp, 0x15, 0x0143);
+        rtl8168_mdio_write(tp, 0x19, 0x7c0c);
+        rtl8168_mdio_write(tp, 0x15, 0x0144);
+        rtl8168_mdio_write(tp, 0x19, 0x600c);
+        rtl8168_mdio_write(tp, 0x15, 0x0145);
+        rtl8168_mdio_write(tp, 0x19, 0x9b00);
+        rtl8168_mdio_write(tp, 0x15, 0x0146);
+        rtl8168_mdio_write(tp, 0x19, 0xa68f);
+        rtl8168_mdio_write(tp, 0x15, 0x0147);
+        rtl8168_mdio_write(tp, 0x19, 0x3116);
+        rtl8168_mdio_write(tp, 0x15, 0x0148);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0149);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x014a);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x014b);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x014c);
+        rtl8168_mdio_write(tp, 0x19, 0x4804);
+        rtl8168_mdio_write(tp, 0x15, 0x014d);
+        rtl8168_mdio_write(tp, 0x19, 0x54c0);
+        rtl8168_mdio_write(tp, 0x15, 0x014e);
+        rtl8168_mdio_write(tp, 0x19, 0xb703);
+        rtl8168_mdio_write(tp, 0x15, 0x014f);
+        rtl8168_mdio_write(tp, 0x19, 0x5cff);
+        rtl8168_mdio_write(tp, 0x15, 0x0150);
+        rtl8168_mdio_write(tp, 0x19, 0x315f);
+        rtl8168_mdio_write(tp, 0x15, 0x0151);
+        rtl8168_mdio_write(tp, 0x19, 0x7c08);
+        rtl8168_mdio_write(tp, 0x15, 0x0152);
+        rtl8168_mdio_write(tp, 0x19, 0x74f8);
+        rtl8168_mdio_write(tp, 0x15, 0x0153);
+        rtl8168_mdio_write(tp, 0x19, 0x6421);
+        rtl8168_mdio_write(tp, 0x15, 0x0154);
+        rtl8168_mdio_write(tp, 0x19, 0x7c08);
+        rtl8168_mdio_write(tp, 0x15, 0x0155);
+        rtl8168_mdio_write(tp, 0x19, 0x6000);
+        rtl8168_mdio_write(tp, 0x15, 0x0156);
+        rtl8168_mdio_write(tp, 0x19, 0x4003);
+        rtl8168_mdio_write(tp, 0x15, 0x0157);
+        rtl8168_mdio_write(tp, 0x19, 0x4418);
+        rtl8168_mdio_write(tp, 0x15, 0x0158);
+        rtl8168_mdio_write(tp, 0x19, 0x9b00);
+        rtl8168_mdio_write(tp, 0x15, 0x0159);
+        rtl8168_mdio_write(tp, 0x19, 0x6461);
+        rtl8168_mdio_write(tp, 0x15, 0x015a);
+        rtl8168_mdio_write(tp, 0x19, 0x64e1);
+        rtl8168_mdio_write(tp, 0x15, 0x015b);
+        rtl8168_mdio_write(tp, 0x19, 0x7c20);
+        rtl8168_mdio_write(tp, 0x15, 0x015c);
+        rtl8168_mdio_write(tp, 0x19, 0x5820);
+        rtl8168_mdio_write(tp, 0x15, 0x015d);
+        rtl8168_mdio_write(tp, 0x19, 0x5ccf);
+        rtl8168_mdio_write(tp, 0x15, 0x015e);
+        rtl8168_mdio_write(tp, 0x19, 0x7050);
+        rtl8168_mdio_write(tp, 0x15, 0x015f);
+        rtl8168_mdio_write(tp, 0x19, 0xd9b8);
+        rtl8168_mdio_write(tp, 0x15, 0x0160);
+        rtl8168_mdio_write(tp, 0x19, 0x0008);
+        rtl8168_mdio_write(tp, 0x15, 0x0161);
+        rtl8168_mdio_write(tp, 0x19, 0xdab1);
+        rtl8168_mdio_write(tp, 0x15, 0x0162);
+        rtl8168_mdio_write(tp, 0x19, 0x0015);
+        rtl8168_mdio_write(tp, 0x15, 0x0163);
+        rtl8168_mdio_write(tp, 0x19, 0xc244);
+        rtl8168_mdio_write(tp, 0x15, 0x0164);
+        rtl8168_mdio_write(tp, 0x19, 0x0013);
+        rtl8168_mdio_write(tp, 0x15, 0x0165);
+        rtl8168_mdio_write(tp, 0x19, 0xc021);
+        rtl8168_mdio_write(tp, 0x15, 0x0166);
+        rtl8168_mdio_write(tp, 0x19, 0x00f9);
+        rtl8168_mdio_write(tp, 0x15, 0x0167);
+        rtl8168_mdio_write(tp, 0x19, 0x3177);
+        rtl8168_mdio_write(tp, 0x15, 0x0168);
+        rtl8168_mdio_write(tp, 0x19, 0x5cf7);
+        rtl8168_mdio_write(tp, 0x15, 0x0169);
+        rtl8168_mdio_write(tp, 0x19, 0x4010);
+        rtl8168_mdio_write(tp, 0x15, 0x016a);
+        rtl8168_mdio_write(tp, 0x19, 0x4428);
+        rtl8168_mdio_write(tp, 0x15, 0x016b);
+        rtl8168_mdio_write(tp, 0x19, 0x9c00);
+        rtl8168_mdio_write(tp, 0x15, 0x016c);
+        rtl8168_mdio_write(tp, 0x19, 0x7c08);
+        rtl8168_mdio_write(tp, 0x15, 0x016d);
+        rtl8168_mdio_write(tp, 0x19, 0x6008);
+        rtl8168_mdio_write(tp, 0x15, 0x016e);
+        rtl8168_mdio_write(tp, 0x19, 0x7c08);
+        rtl8168_mdio_write(tp, 0x15, 0x016f);
+        rtl8168_mdio_write(tp, 0x19, 0x74f0);
+        rtl8168_mdio_write(tp, 0x15, 0x0170);
+        rtl8168_mdio_write(tp, 0x19, 0x6461);
+        rtl8168_mdio_write(tp, 0x15, 0x0171);
+        rtl8168_mdio_write(tp, 0x19, 0x6421);
+        rtl8168_mdio_write(tp, 0x15, 0x0172);
+        rtl8168_mdio_write(tp, 0x19, 0x64a1);
+        rtl8168_mdio_write(tp, 0x15, 0x0173);
+        rtl8168_mdio_write(tp, 0x19, 0x3116);
+        rtl8168_mdio_write(tp, 0x15, 0x0174);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0175);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0176);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0177);
+        rtl8168_mdio_write(tp, 0x19, 0x4805);
+        rtl8168_mdio_write(tp, 0x15, 0x0178);
+        rtl8168_mdio_write(tp, 0x19, 0xa103);
+        rtl8168_mdio_write(tp, 0x15, 0x0179);
+        rtl8168_mdio_write(tp, 0x19, 0x7c02);
+        rtl8168_mdio_write(tp, 0x15, 0x017a);
+        rtl8168_mdio_write(tp, 0x19, 0x6002);
+        rtl8168_mdio_write(tp, 0x15, 0x017b);
+        rtl8168_mdio_write(tp, 0x19, 0x7e00);
+        rtl8168_mdio_write(tp, 0x15, 0x017c);
+        rtl8168_mdio_write(tp, 0x19, 0x5400);
+        rtl8168_mdio_write(tp, 0x15, 0x017d);
+        rtl8168_mdio_write(tp, 0x19, 0x7c6b);
+        rtl8168_mdio_write(tp, 0x15, 0x017e);
+        rtl8168_mdio_write(tp, 0x19, 0x5c63);
+        rtl8168_mdio_write(tp, 0x15, 0x017f);
+        rtl8168_mdio_write(tp, 0x19, 0x407d);
+        rtl8168_mdio_write(tp, 0x15, 0x0180);
+        rtl8168_mdio_write(tp, 0x19, 0xa602);
+        rtl8168_mdio_write(tp, 0x15, 0x0181);
+        rtl8168_mdio_write(tp, 0x19, 0x4001);
+        rtl8168_mdio_write(tp, 0x15, 0x0182);
+        rtl8168_mdio_write(tp, 0x19, 0x4420);
+        rtl8168_mdio_write(tp, 0x15, 0x0183);
+        rtl8168_mdio_write(tp, 0x19, 0x4020);
+        rtl8168_mdio_write(tp, 0x15, 0x0184);
+        rtl8168_mdio_write(tp, 0x19, 0x44a1);
+        rtl8168_mdio_write(tp, 0x15, 0x0185);
+        rtl8168_mdio_write(tp, 0x19, 0xd6e0);
+        rtl8168_mdio_write(tp, 0x15, 0x0186);
+        rtl8168_mdio_write(tp, 0x19, 0x0009);
+        rtl8168_mdio_write(tp, 0x15, 0x0187);
+        rtl8168_mdio_write(tp, 0x19, 0x9efe);
+        rtl8168_mdio_write(tp, 0x15, 0x0188);
+        rtl8168_mdio_write(tp, 0x19, 0x7c02);
+        rtl8168_mdio_write(tp, 0x15, 0x0189);
+        rtl8168_mdio_write(tp, 0x19, 0x6000);
+        rtl8168_mdio_write(tp, 0x15, 0x018a);
+        rtl8168_mdio_write(tp, 0x19, 0x9c00);
+        rtl8168_mdio_write(tp, 0x15, 0x018b);
+        rtl8168_mdio_write(tp, 0x19, 0x318f);
+        rtl8168_mdio_write(tp, 0x15, 0x018c);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x018d);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x018e);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x018f);
+        rtl8168_mdio_write(tp, 0x19, 0x4806);
+        rtl8168_mdio_write(tp, 0x15, 0x0190);
+        rtl8168_mdio_write(tp, 0x19, 0x7c10);
+        rtl8168_mdio_write(tp, 0x15, 0x0191);
+        rtl8168_mdio_write(tp, 0x19, 0x5c10);
+        rtl8168_mdio_write(tp, 0x15, 0x0192);
+        rtl8168_mdio_write(tp, 0x19, 0x40fa);
+        rtl8168_mdio_write(tp, 0x15, 0x0193);
+        rtl8168_mdio_write(tp, 0x19, 0xa602);
+        rtl8168_mdio_write(tp, 0x15, 0x0194);
+        rtl8168_mdio_write(tp, 0x19, 0x4010);
+        rtl8168_mdio_write(tp, 0x15, 0x0195);
+        rtl8168_mdio_write(tp, 0x19, 0x4440);
+        rtl8168_mdio_write(tp, 0x15, 0x0196);
+        rtl8168_mdio_write(tp, 0x19, 0x9d00);
+        rtl8168_mdio_write(tp, 0x15, 0x0197);
+        rtl8168_mdio_write(tp, 0x19, 0x7c80);
+        rtl8168_mdio_write(tp, 0x15, 0x0198);
+        rtl8168_mdio_write(tp, 0x19, 0x6400);
+        rtl8168_mdio_write(tp, 0x15, 0x0199);
+        rtl8168_mdio_write(tp, 0x19, 0x4003);
+        rtl8168_mdio_write(tp, 0x15, 0x019a);
+        rtl8168_mdio_write(tp, 0x19, 0x4540);
+        rtl8168_mdio_write(tp, 0x15, 0x019b);
+        rtl8168_mdio_write(tp, 0x19, 0x7c08);
+        rtl8168_mdio_write(tp, 0x15, 0x019c);
+        rtl8168_mdio_write(tp, 0x19, 0x6008);
+        rtl8168_mdio_write(tp, 0x15, 0x019d);
+        rtl8168_mdio_write(tp, 0x19, 0x9f00);
+        rtl8168_mdio_write(tp, 0x15, 0x019e);
+        rtl8168_mdio_write(tp, 0x19, 0x7c40);
+        rtl8168_mdio_write(tp, 0x15, 0x019f);
+        rtl8168_mdio_write(tp, 0x19, 0x6400);
+        rtl8168_mdio_write(tp, 0x15, 0x01a0);
+        rtl8168_mdio_write(tp, 0x19, 0x7c80);
+        rtl8168_mdio_write(tp, 0x15, 0x01a1);
+        rtl8168_mdio_write(tp, 0x19, 0x6480);
+        rtl8168_mdio_write(tp, 0x15, 0x01a2);
+        rtl8168_mdio_write(tp, 0x19, 0x3140);
+        rtl8168_mdio_write(tp, 0x15, 0x01a3);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x01a4);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x01a5);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x01a6);
+        rtl8168_mdio_write(tp, 0x19, 0x4400);
+        rtl8168_mdio_write(tp, 0x15, 0x01a7);
+        rtl8168_mdio_write(tp, 0x19, 0x7c0b);
+        rtl8168_mdio_write(tp, 0x15, 0x01a8);
+        rtl8168_mdio_write(tp, 0x19, 0x6c01);
+        rtl8168_mdio_write(tp, 0x15, 0x01a9);
+        rtl8168_mdio_write(tp, 0x19, 0x64a8);
+        rtl8168_mdio_write(tp, 0x15, 0x01aa);
+        rtl8168_mdio_write(tp, 0x19, 0x6800);
+        rtl8168_mdio_write(tp, 0x15, 0x01ab);
+        rtl8168_mdio_write(tp, 0x19, 0x5cf0);
+        rtl8168_mdio_write(tp, 0x15, 0x01ac);
+        rtl8168_mdio_write(tp, 0x19, 0x588f);
+        rtl8168_mdio_write(tp, 0x15, 0x01ad);
+        rtl8168_mdio_write(tp, 0x19, 0xb628);
+        rtl8168_mdio_write(tp, 0x15, 0x01ae);
+        rtl8168_mdio_write(tp, 0x19, 0xc053);
+        rtl8168_mdio_write(tp, 0x15, 0x01af);
+        rtl8168_mdio_write(tp, 0x19, 0x0026);
+        rtl8168_mdio_write(tp, 0x15, 0x01b0);
+        rtl8168_mdio_write(tp, 0x19, 0xc02d);
+        rtl8168_mdio_write(tp, 0x15, 0x01b1);
+        rtl8168_mdio_write(tp, 0x19, 0x0024);
+        rtl8168_mdio_write(tp, 0x15, 0x01b2);
+        rtl8168_mdio_write(tp, 0x19, 0xc603);
+        rtl8168_mdio_write(tp, 0x15, 0x01b3);
+        rtl8168_mdio_write(tp, 0x19, 0x0022);
+        rtl8168_mdio_write(tp, 0x15, 0x01b4);
+        rtl8168_mdio_write(tp, 0x19, 0x8cf9);
+        rtl8168_mdio_write(tp, 0x15, 0x01b5);
+        rtl8168_mdio_write(tp, 0x19, 0x31ba);
+        rtl8168_mdio_write(tp, 0x15, 0x01b6);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x01b7);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x01b8);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x01b9);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x01ba);
+        rtl8168_mdio_write(tp, 0x19, 0x4400);
+        rtl8168_mdio_write(tp, 0x15, 0x01bb);
+        rtl8168_mdio_write(tp, 0x19, 0x5420);
+        rtl8168_mdio_write(tp, 0x15, 0x01bc);
+        rtl8168_mdio_write(tp, 0x19, 0x4811);
+        rtl8168_mdio_write(tp, 0x15, 0x01bd);
+        rtl8168_mdio_write(tp, 0x19, 0x5000);
+        rtl8168_mdio_write(tp, 0x15, 0x01be);
+        rtl8168_mdio_write(tp, 0x19, 0x4801);
+        rtl8168_mdio_write(tp, 0x15, 0x01bf);
+        rtl8168_mdio_write(tp, 0x19, 0x6800);
+        rtl8168_mdio_write(tp, 0x15, 0x01c0);
+        rtl8168_mdio_write(tp, 0x19, 0x31f5);
+        rtl8168_mdio_write(tp, 0x15, 0x01c1);
+        rtl8168_mdio_write(tp, 0x19, 0xb614);
+        rtl8168_mdio_write(tp, 0x15, 0x01c2);
+        rtl8168_mdio_write(tp, 0x19, 0x8ce4);
+        rtl8168_mdio_write(tp, 0x15, 0x01c3);
+        rtl8168_mdio_write(tp, 0x19, 0xb30c);
+        rtl8168_mdio_write(tp, 0x15, 0x01c4);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x01c5);
+        rtl8168_mdio_write(tp, 0x19, 0x6c02);
+        rtl8168_mdio_write(tp, 0x15, 0x01c6);
+        rtl8168_mdio_write(tp, 0x19, 0x8206);
+        rtl8168_mdio_write(tp, 0x15, 0x01c7);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x01c8);
+        rtl8168_mdio_write(tp, 0x19, 0x6c00);
+        rtl8168_mdio_write(tp, 0x15, 0x01c9);
+        rtl8168_mdio_write(tp, 0x19, 0x7c04);
+        rtl8168_mdio_write(tp, 0x15, 0x01ca);
+        rtl8168_mdio_write(tp, 0x19, 0x7404);
+        rtl8168_mdio_write(tp, 0x15, 0x01cb);
+        rtl8168_mdio_write(tp, 0x19, 0x31c0);
+        rtl8168_mdio_write(tp, 0x15, 0x01cc);
+        rtl8168_mdio_write(tp, 0x19, 0x7c04);
+        rtl8168_mdio_write(tp, 0x15, 0x01cd);
+        rtl8168_mdio_write(tp, 0x19, 0x7400);
+        rtl8168_mdio_write(tp, 0x15, 0x01ce);
+        rtl8168_mdio_write(tp, 0x19, 0x31c0);
+        rtl8168_mdio_write(tp, 0x15, 0x01cf);
+        rtl8168_mdio_write(tp, 0x19, 0x8df1);
+        rtl8168_mdio_write(tp, 0x15, 0x01d0);
+        rtl8168_mdio_write(tp, 0x19, 0x3248);
+        rtl8168_mdio_write(tp, 0x15, 0x01d1);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x01d2);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x01d3);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x01d4);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x01d5);
+        rtl8168_mdio_write(tp, 0x19, 0x4400);
+        rtl8168_mdio_write(tp, 0x15, 0x01d6);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x01d7);
+        rtl8168_mdio_write(tp, 0x19, 0x6c03);
+        rtl8168_mdio_write(tp, 0x15, 0x01d8);
+        rtl8168_mdio_write(tp, 0x19, 0x7670);
+        rtl8168_mdio_write(tp, 0x15, 0x01d9);
+        rtl8168_mdio_write(tp, 0x19, 0x4023);
+        rtl8168_mdio_write(tp, 0x15, 0x01da);
+        rtl8168_mdio_write(tp, 0x19, 0x4500);
+        rtl8168_mdio_write(tp, 0x15, 0x01db);
+        rtl8168_mdio_write(tp, 0x19, 0x4069);
+        rtl8168_mdio_write(tp, 0x15, 0x01dc);
+        rtl8168_mdio_write(tp, 0x19, 0x4580);
+        rtl8168_mdio_write(tp, 0x15, 0x01dd);
+        rtl8168_mdio_write(tp, 0x19, 0x9f00);
+        rtl8168_mdio_write(tp, 0x15, 0x01de);
+        rtl8168_mdio_write(tp, 0x19, 0xcff5);
+        rtl8168_mdio_write(tp, 0x15, 0x01df);
+        rtl8168_mdio_write(tp, 0x19, 0x00ff);
+        rtl8168_mdio_write(tp, 0x15, 0x01e0);
+        rtl8168_mdio_write(tp, 0x19, 0x76f0);
+        rtl8168_mdio_write(tp, 0x15, 0x01e1);
+        rtl8168_mdio_write(tp, 0x19, 0x4400);
+        rtl8168_mdio_write(tp, 0x15, 0x01e2);
+        rtl8168_mdio_write(tp, 0x19, 0x4023);
+        rtl8168_mdio_write(tp, 0x15, 0x01e3);
+        rtl8168_mdio_write(tp, 0x19, 0x4500);
+        rtl8168_mdio_write(tp, 0x15, 0x01e4);
+        rtl8168_mdio_write(tp, 0x19, 0x4069);
+        rtl8168_mdio_write(tp, 0x15, 0x01e5);
+        rtl8168_mdio_write(tp, 0x19, 0x4580);
+        rtl8168_mdio_write(tp, 0x15, 0x01e6);
+        rtl8168_mdio_write(tp, 0x19, 0x9f00);
+        rtl8168_mdio_write(tp, 0x15, 0x01e7);
+        rtl8168_mdio_write(tp, 0x19, 0xd0f5);
+        rtl8168_mdio_write(tp, 0x15, 0x01e8);
+        rtl8168_mdio_write(tp, 0x19, 0x00ff);
+        rtl8168_mdio_write(tp, 0x15, 0x01e9);
+        rtl8168_mdio_write(tp, 0x19, 0x4400);
+        rtl8168_mdio_write(tp, 0x15, 0x01ea);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x01eb);
+        rtl8168_mdio_write(tp, 0x19, 0x6800);
+        rtl8168_mdio_write(tp, 0x15, 0x01ec);
+        rtl8168_mdio_write(tp, 0x19, 0x66a0);
+        rtl8168_mdio_write(tp, 0x15, 0x01ed);
+        rtl8168_mdio_write(tp, 0x19, 0x8300);
+        rtl8168_mdio_write(tp, 0x15, 0x01ee);
+        rtl8168_mdio_write(tp, 0x19, 0x74f0);
+        rtl8168_mdio_write(tp, 0x15, 0x01ef);
+        rtl8168_mdio_write(tp, 0x19, 0x3006);
+        rtl8168_mdio_write(tp, 0x15, 0x01f0);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x01f1);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x01f2);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x01f3);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x01f4);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x01f5);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x01f6);
+        rtl8168_mdio_write(tp, 0x19, 0x6c02);
+        rtl8168_mdio_write(tp, 0x15, 0x01f7);
+        rtl8168_mdio_write(tp, 0x19, 0x409d);
+        rtl8168_mdio_write(tp, 0x15, 0x01f8);
+        rtl8168_mdio_write(tp, 0x19, 0x7c87);
+        rtl8168_mdio_write(tp, 0x15, 0x01f9);
+        rtl8168_mdio_write(tp, 0x19, 0xae14);
+        rtl8168_mdio_write(tp, 0x15, 0x01fa);
+        rtl8168_mdio_write(tp, 0x19, 0x4400);
+        rtl8168_mdio_write(tp, 0x15, 0x01fb);
+        rtl8168_mdio_write(tp, 0x19, 0x7c40);
+        rtl8168_mdio_write(tp, 0x15, 0x01fc);
+        rtl8168_mdio_write(tp, 0x19, 0x6800);
+        rtl8168_mdio_write(tp, 0x15, 0x01fd);
+        rtl8168_mdio_write(tp, 0x19, 0x7801);
+        rtl8168_mdio_write(tp, 0x15, 0x01fe);
+        rtl8168_mdio_write(tp, 0x19, 0x980e);
+        rtl8168_mdio_write(tp, 0x15, 0x01ff);
+        rtl8168_mdio_write(tp, 0x19, 0x930c);
+        rtl8168_mdio_write(tp, 0x15, 0x0200);
+        rtl8168_mdio_write(tp, 0x19, 0x9206);
+        rtl8168_mdio_write(tp, 0x15, 0x0201);
+        rtl8168_mdio_write(tp, 0x19, 0x4002);
+        rtl8168_mdio_write(tp, 0x15, 0x0202);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x0203);
+        rtl8168_mdio_write(tp, 0x19, 0x588f);
+        rtl8168_mdio_write(tp, 0x15, 0x0204);
+        rtl8168_mdio_write(tp, 0x19, 0x5520);
+        rtl8168_mdio_write(tp, 0x15, 0x0205);
+        rtl8168_mdio_write(tp, 0x19, 0x320c);
+        rtl8168_mdio_write(tp, 0x15, 0x0206);
+        rtl8168_mdio_write(tp, 0x19, 0x4000);
+        rtl8168_mdio_write(tp, 0x15, 0x0207);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x0208);
+        rtl8168_mdio_write(tp, 0x19, 0x588d);
+        rtl8168_mdio_write(tp, 0x15, 0x0209);
+        rtl8168_mdio_write(tp, 0x19, 0x5500);
+        rtl8168_mdio_write(tp, 0x15, 0x020a);
+        rtl8168_mdio_write(tp, 0x19, 0x320c);
+        rtl8168_mdio_write(tp, 0x15, 0x020b);
+        rtl8168_mdio_write(tp, 0x19, 0x4002);
+        rtl8168_mdio_write(tp, 0x15, 0x020c);
+        rtl8168_mdio_write(tp, 0x19, 0x3220);
+        rtl8168_mdio_write(tp, 0x15, 0x020d);
+        rtl8168_mdio_write(tp, 0x19, 0x4480);
+        rtl8168_mdio_write(tp, 0x15, 0x020e);
+        rtl8168_mdio_write(tp, 0x19, 0x9e03);
+        rtl8168_mdio_write(tp, 0x15, 0x020f);
+        rtl8168_mdio_write(tp, 0x19, 0x7c40);
+        rtl8168_mdio_write(tp, 0x15, 0x0210);
+        rtl8168_mdio_write(tp, 0x19, 0x6840);
+        rtl8168_mdio_write(tp, 0x15, 0x0211);
+        rtl8168_mdio_write(tp, 0x19, 0x7801);
+        rtl8168_mdio_write(tp, 0x15, 0x0212);
+        rtl8168_mdio_write(tp, 0x19, 0x980e);
+        rtl8168_mdio_write(tp, 0x15, 0x0213);
+        rtl8168_mdio_write(tp, 0x19, 0x930c);
+        rtl8168_mdio_write(tp, 0x15, 0x0214);
+        rtl8168_mdio_write(tp, 0x19, 0x9206);
+        rtl8168_mdio_write(tp, 0x15, 0x0215);
+        rtl8168_mdio_write(tp, 0x19, 0x4000);
+        rtl8168_mdio_write(tp, 0x15, 0x0216);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x0217);
+        rtl8168_mdio_write(tp, 0x19, 0x588f);
+        rtl8168_mdio_write(tp, 0x15, 0x0218);
+        rtl8168_mdio_write(tp, 0x19, 0x5520);
+        rtl8168_mdio_write(tp, 0x15, 0x0219);
+        rtl8168_mdio_write(tp, 0x19, 0x3220);
+        rtl8168_mdio_write(tp, 0x15, 0x021a);
+        rtl8168_mdio_write(tp, 0x19, 0x4002);
+        rtl8168_mdio_write(tp, 0x15, 0x021b);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x021c);
+        rtl8168_mdio_write(tp, 0x19, 0x588d);
+        rtl8168_mdio_write(tp, 0x15, 0x021d);
+        rtl8168_mdio_write(tp, 0x19, 0x5540);
+        rtl8168_mdio_write(tp, 0x15, 0x021e);
+        rtl8168_mdio_write(tp, 0x19, 0x3220);
+        rtl8168_mdio_write(tp, 0x15, 0x021f);
+        rtl8168_mdio_write(tp, 0x19, 0x4000);
+        rtl8168_mdio_write(tp, 0x15, 0x0220);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x0221);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x0222);
+        rtl8168_mdio_write(tp, 0x19, 0x6c00);
+        rtl8168_mdio_write(tp, 0x15, 0x0223);
+        rtl8168_mdio_write(tp, 0x19, 0x3231);
+        rtl8168_mdio_write(tp, 0x15, 0x0224);
+        rtl8168_mdio_write(tp, 0x19, 0xab06);
+        rtl8168_mdio_write(tp, 0x15, 0x0225);
+        rtl8168_mdio_write(tp, 0x19, 0xbf08);
+        rtl8168_mdio_write(tp, 0x15, 0x0226);
+        rtl8168_mdio_write(tp, 0x19, 0x4076);
+        rtl8168_mdio_write(tp, 0x15, 0x0227);
+        rtl8168_mdio_write(tp, 0x19, 0x7d07);
+        rtl8168_mdio_write(tp, 0x15, 0x0228);
+        rtl8168_mdio_write(tp, 0x19, 0x4502);
+        rtl8168_mdio_write(tp, 0x15, 0x0229);
+        rtl8168_mdio_write(tp, 0x19, 0x3231);
+        rtl8168_mdio_write(tp, 0x15, 0x022a);
+        rtl8168_mdio_write(tp, 0x19, 0x7d80);
+        rtl8168_mdio_write(tp, 0x15, 0x022b);
+        rtl8168_mdio_write(tp, 0x19, 0x5180);
+        rtl8168_mdio_write(tp, 0x15, 0x022c);
+        rtl8168_mdio_write(tp, 0x19, 0x322f);
+        rtl8168_mdio_write(tp, 0x15, 0x022d);
+        rtl8168_mdio_write(tp, 0x19, 0x7d80);
+        rtl8168_mdio_write(tp, 0x15, 0x022e);
+        rtl8168_mdio_write(tp, 0x19, 0x5000);
+        rtl8168_mdio_write(tp, 0x15, 0x022f);
+        rtl8168_mdio_write(tp, 0x19, 0x7d07);
+        rtl8168_mdio_write(tp, 0x15, 0x0230);
+        rtl8168_mdio_write(tp, 0x19, 0x4402);
+        rtl8168_mdio_write(tp, 0x15, 0x0231);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x0232);
+        rtl8168_mdio_write(tp, 0x19, 0x6c02);
+        rtl8168_mdio_write(tp, 0x15, 0x0233);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x0234);
+        rtl8168_mdio_write(tp, 0x19, 0xb309);
+        rtl8168_mdio_write(tp, 0x15, 0x0235);
+        rtl8168_mdio_write(tp, 0x19, 0xb204);
+        rtl8168_mdio_write(tp, 0x15, 0x0236);
+        rtl8168_mdio_write(tp, 0x19, 0xb105);
+        rtl8168_mdio_write(tp, 0x15, 0x0237);
+        rtl8168_mdio_write(tp, 0x19, 0x6c00);
+        rtl8168_mdio_write(tp, 0x15, 0x0238);
+        rtl8168_mdio_write(tp, 0x19, 0x31c1);
+        rtl8168_mdio_write(tp, 0x15, 0x0239);
+        rtl8168_mdio_write(tp, 0x19, 0x6c00);
+        rtl8168_mdio_write(tp, 0x15, 0x023a);
+        rtl8168_mdio_write(tp, 0x19, 0x3261);
+        rtl8168_mdio_write(tp, 0x15, 0x023b);
+        rtl8168_mdio_write(tp, 0x19, 0x6c00);
+        rtl8168_mdio_write(tp, 0x15, 0x023c);
+        rtl8168_mdio_write(tp, 0x19, 0x3250);
+        rtl8168_mdio_write(tp, 0x15, 0x023d);
+        rtl8168_mdio_write(tp, 0x19, 0xb203);
+        rtl8168_mdio_write(tp, 0x15, 0x023e);
+        rtl8168_mdio_write(tp, 0x19, 0x6c00);
+        rtl8168_mdio_write(tp, 0x15, 0x023f);
+        rtl8168_mdio_write(tp, 0x19, 0x327a);
+        rtl8168_mdio_write(tp, 0x15, 0x0240);
+        rtl8168_mdio_write(tp, 0x19, 0x6c00);
+        rtl8168_mdio_write(tp, 0x15, 0x0241);
+        rtl8168_mdio_write(tp, 0x19, 0x3293);
+        rtl8168_mdio_write(tp, 0x15, 0x0242);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0243);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0244);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0245);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0246);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0247);
+        rtl8168_mdio_write(tp, 0x19, 0x32a3);
+        rtl8168_mdio_write(tp, 0x15, 0x0248);
+        rtl8168_mdio_write(tp, 0x19, 0x5520);
+        rtl8168_mdio_write(tp, 0x15, 0x0249);
+        rtl8168_mdio_write(tp, 0x19, 0x403d);
+        rtl8168_mdio_write(tp, 0x15, 0x024a);
+        rtl8168_mdio_write(tp, 0x19, 0x440c);
+        rtl8168_mdio_write(tp, 0x15, 0x024b);
+        rtl8168_mdio_write(tp, 0x19, 0x4812);
+        rtl8168_mdio_write(tp, 0x15, 0x024c);
+        rtl8168_mdio_write(tp, 0x19, 0x5001);
+        rtl8168_mdio_write(tp, 0x15, 0x024d);
+        rtl8168_mdio_write(tp, 0x19, 0x4802);
+        rtl8168_mdio_write(tp, 0x15, 0x024e);
+        rtl8168_mdio_write(tp, 0x19, 0x6880);
+        rtl8168_mdio_write(tp, 0x15, 0x024f);
+        rtl8168_mdio_write(tp, 0x19, 0x31f5);
+        rtl8168_mdio_write(tp, 0x15, 0x0250);
+        rtl8168_mdio_write(tp, 0x19, 0xb685);
+        rtl8168_mdio_write(tp, 0x15, 0x0251);
+        rtl8168_mdio_write(tp, 0x19, 0x801c);
+        rtl8168_mdio_write(tp, 0x15, 0x0252);
+        rtl8168_mdio_write(tp, 0x19, 0xbaf5);
+        rtl8168_mdio_write(tp, 0x15, 0x0253);
+        rtl8168_mdio_write(tp, 0x19, 0xc07c);
+        rtl8168_mdio_write(tp, 0x15, 0x0254);
+        rtl8168_mdio_write(tp, 0x19, 0x00fb);
+        rtl8168_mdio_write(tp, 0x15, 0x0255);
+        rtl8168_mdio_write(tp, 0x19, 0x325a);
+        rtl8168_mdio_write(tp, 0x15, 0x0256);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0257);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0258);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0259);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x025a);
+        rtl8168_mdio_write(tp, 0x19, 0x481a);
+        rtl8168_mdio_write(tp, 0x15, 0x025b);
+        rtl8168_mdio_write(tp, 0x19, 0x5001);
+        rtl8168_mdio_write(tp, 0x15, 0x025c);
+        rtl8168_mdio_write(tp, 0x19, 0x401b);
+        rtl8168_mdio_write(tp, 0x15, 0x025d);
+        rtl8168_mdio_write(tp, 0x19, 0x480a);
+        rtl8168_mdio_write(tp, 0x15, 0x025e);
+        rtl8168_mdio_write(tp, 0x19, 0x4418);
+        rtl8168_mdio_write(tp, 0x15, 0x025f);
+        rtl8168_mdio_write(tp, 0x19, 0x6900);
+        rtl8168_mdio_write(tp, 0x15, 0x0260);
+        rtl8168_mdio_write(tp, 0x19, 0x31f5);
+        rtl8168_mdio_write(tp, 0x15, 0x0261);
+        rtl8168_mdio_write(tp, 0x19, 0xb64b);
+        rtl8168_mdio_write(tp, 0x15, 0x0262);
+        rtl8168_mdio_write(tp, 0x19, 0xdb00);
+        rtl8168_mdio_write(tp, 0x15, 0x0263);
+        rtl8168_mdio_write(tp, 0x19, 0x0048);
+        rtl8168_mdio_write(tp, 0x15, 0x0264);
+        rtl8168_mdio_write(tp, 0x19, 0xdb7d);
+        rtl8168_mdio_write(tp, 0x15, 0x0265);
+        rtl8168_mdio_write(tp, 0x19, 0x0002);
+        rtl8168_mdio_write(tp, 0x15, 0x0266);
+        rtl8168_mdio_write(tp, 0x19, 0xa0fa);
+        rtl8168_mdio_write(tp, 0x15, 0x0267);
+        rtl8168_mdio_write(tp, 0x19, 0x4408);
+        rtl8168_mdio_write(tp, 0x15, 0x0268);
+        rtl8168_mdio_write(tp, 0x19, 0x3248);
+        rtl8168_mdio_write(tp, 0x15, 0x0269);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x026a);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x026b);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x026c);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x026d);
+        rtl8168_mdio_write(tp, 0x19, 0xb806);
+        rtl8168_mdio_write(tp, 0x15, 0x026e);
+        rtl8168_mdio_write(tp, 0x19, 0x588d);
+        rtl8168_mdio_write(tp, 0x15, 0x026f);
+        rtl8168_mdio_write(tp, 0x19, 0x5500);
+        rtl8168_mdio_write(tp, 0x15, 0x0270);
+        rtl8168_mdio_write(tp, 0x19, 0x7801);
+        rtl8168_mdio_write(tp, 0x15, 0x0271);
+        rtl8168_mdio_write(tp, 0x19, 0x4002);
+        rtl8168_mdio_write(tp, 0x15, 0x0272);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x0273);
+        rtl8168_mdio_write(tp, 0x19, 0x4814);
+        rtl8168_mdio_write(tp, 0x15, 0x0274);
+        rtl8168_mdio_write(tp, 0x19, 0x500b);
+        rtl8168_mdio_write(tp, 0x15, 0x0275);
+        rtl8168_mdio_write(tp, 0x19, 0x4804);
+        rtl8168_mdio_write(tp, 0x15, 0x0276);
+        rtl8168_mdio_write(tp, 0x19, 0x40c4);
+        rtl8168_mdio_write(tp, 0x15, 0x0277);
+        rtl8168_mdio_write(tp, 0x19, 0x4425);
+        rtl8168_mdio_write(tp, 0x15, 0x0278);
+        rtl8168_mdio_write(tp, 0x19, 0x6a00);
+        rtl8168_mdio_write(tp, 0x15, 0x0279);
+        rtl8168_mdio_write(tp, 0x19, 0x31f5);
+        rtl8168_mdio_write(tp, 0x15, 0x027a);
+        rtl8168_mdio_write(tp, 0x19, 0xb632);
+        rtl8168_mdio_write(tp, 0x15, 0x027b);
+        rtl8168_mdio_write(tp, 0x19, 0xdc03);
+        rtl8168_mdio_write(tp, 0x15, 0x027c);
+        rtl8168_mdio_write(tp, 0x19, 0x0027);
+        rtl8168_mdio_write(tp, 0x15, 0x027d);
+        rtl8168_mdio_write(tp, 0x19, 0x80fc);
+        rtl8168_mdio_write(tp, 0x15, 0x027e);
+        rtl8168_mdio_write(tp, 0x19, 0x3283);
+        rtl8168_mdio_write(tp, 0x15, 0x027f);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0280);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0281);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0282);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0283);
+        rtl8168_mdio_write(tp, 0x19, 0xb806);
+        rtl8168_mdio_write(tp, 0x15, 0x0284);
+        rtl8168_mdio_write(tp, 0x19, 0x588f);
+        rtl8168_mdio_write(tp, 0x15, 0x0285);
+        rtl8168_mdio_write(tp, 0x19, 0x5520);
+        rtl8168_mdio_write(tp, 0x15, 0x0286);
+        rtl8168_mdio_write(tp, 0x19, 0x7801);
+        rtl8168_mdio_write(tp, 0x15, 0x0287);
+        rtl8168_mdio_write(tp, 0x19, 0x4000);
+        rtl8168_mdio_write(tp, 0x15, 0x0288);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x0289);
+        rtl8168_mdio_write(tp, 0x19, 0x4818);
+        rtl8168_mdio_write(tp, 0x15, 0x028a);
+        rtl8168_mdio_write(tp, 0x19, 0x5051);
+        rtl8168_mdio_write(tp, 0x15, 0x028b);
+        rtl8168_mdio_write(tp, 0x19, 0x4808);
+        rtl8168_mdio_write(tp, 0x15, 0x028c);
+        rtl8168_mdio_write(tp, 0x19, 0x4050);
+        rtl8168_mdio_write(tp, 0x15, 0x028d);
+        rtl8168_mdio_write(tp, 0x19, 0x4462);
+        rtl8168_mdio_write(tp, 0x15, 0x028e);
+        rtl8168_mdio_write(tp, 0x19, 0x40c4);
+        rtl8168_mdio_write(tp, 0x15, 0x028f);
+        rtl8168_mdio_write(tp, 0x19, 0x4473);
+        rtl8168_mdio_write(tp, 0x15, 0x0290);
+        rtl8168_mdio_write(tp, 0x19, 0x5041);
+        rtl8168_mdio_write(tp, 0x15, 0x0291);
+        rtl8168_mdio_write(tp, 0x19, 0x6b00);
+        rtl8168_mdio_write(tp, 0x15, 0x0292);
+        rtl8168_mdio_write(tp, 0x19, 0x31f5);
+        rtl8168_mdio_write(tp, 0x15, 0x0293);
+        rtl8168_mdio_write(tp, 0x19, 0xb619);
+        rtl8168_mdio_write(tp, 0x15, 0x0294);
+        rtl8168_mdio_write(tp, 0x19, 0x80d9);
+        rtl8168_mdio_write(tp, 0x15, 0x0295);
+        rtl8168_mdio_write(tp, 0x19, 0xbd06);
+        rtl8168_mdio_write(tp, 0x15, 0x0296);
+        rtl8168_mdio_write(tp, 0x19, 0xbb0d);
+        rtl8168_mdio_write(tp, 0x15, 0x0297);
+        rtl8168_mdio_write(tp, 0x19, 0xaf14);
+        rtl8168_mdio_write(tp, 0x15, 0x0298);
+        rtl8168_mdio_write(tp, 0x19, 0x8efa);
+        rtl8168_mdio_write(tp, 0x15, 0x0299);
+        rtl8168_mdio_write(tp, 0x19, 0x5049);
+        rtl8168_mdio_write(tp, 0x15, 0x029a);
+        rtl8168_mdio_write(tp, 0x19, 0x3248);
+        rtl8168_mdio_write(tp, 0x15, 0x029b);
+        rtl8168_mdio_write(tp, 0x19, 0x4c10);
+        rtl8168_mdio_write(tp, 0x15, 0x029c);
+        rtl8168_mdio_write(tp, 0x19, 0x44b0);
+        rtl8168_mdio_write(tp, 0x15, 0x029d);
+        rtl8168_mdio_write(tp, 0x19, 0x4c00);
+        rtl8168_mdio_write(tp, 0x15, 0x029e);
+        rtl8168_mdio_write(tp, 0x19, 0x3292);
+        rtl8168_mdio_write(tp, 0x15, 0x029f);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02a0);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02a1);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02a2);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02a3);
+        rtl8168_mdio_write(tp, 0x19, 0x481f);
+        rtl8168_mdio_write(tp, 0x15, 0x02a4);
+        rtl8168_mdio_write(tp, 0x19, 0x5005);
+        rtl8168_mdio_write(tp, 0x15, 0x02a5);
+        rtl8168_mdio_write(tp, 0x19, 0x480f);
+        rtl8168_mdio_write(tp, 0x15, 0x02a6);
+        rtl8168_mdio_write(tp, 0x19, 0xac00);
+        rtl8168_mdio_write(tp, 0x15, 0x02a7);
+        rtl8168_mdio_write(tp, 0x19, 0x31a6);
+        rtl8168_mdio_write(tp, 0x15, 0x02a8);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02a9);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02aa);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02ab);
+        rtl8168_mdio_write(tp, 0x19, 0x31ba);
+        rtl8168_mdio_write(tp, 0x15, 0x02ac);
+        rtl8168_mdio_write(tp, 0x19, 0x31d5);
+        rtl8168_mdio_write(tp, 0x15, 0x02ad);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02ae);
+        rtl8168_mdio_write(tp, 0x19, 0x5cf0);
+        rtl8168_mdio_write(tp, 0x15, 0x02af);
+        rtl8168_mdio_write(tp, 0x19, 0x588c);
+        rtl8168_mdio_write(tp, 0x15, 0x02b0);
+        rtl8168_mdio_write(tp, 0x19, 0x542f);
+        rtl8168_mdio_write(tp, 0x15, 0x02b1);
+        rtl8168_mdio_write(tp, 0x19, 0x7ffb);
+        rtl8168_mdio_write(tp, 0x15, 0x02b2);
+        rtl8168_mdio_write(tp, 0x19, 0x6ff8);
+        rtl8168_mdio_write(tp, 0x15, 0x02b3);
+        rtl8168_mdio_write(tp, 0x19, 0x64a4);
+        rtl8168_mdio_write(tp, 0x15, 0x02b4);
+        rtl8168_mdio_write(tp, 0x19, 0x64a0);
+        rtl8168_mdio_write(tp, 0x15, 0x02b5);
+        rtl8168_mdio_write(tp, 0x19, 0x6800);
+        rtl8168_mdio_write(tp, 0x15, 0x02b6);
+        rtl8168_mdio_write(tp, 0x19, 0x4400);
+        rtl8168_mdio_write(tp, 0x15, 0x02b7);
+        rtl8168_mdio_write(tp, 0x19, 0x4020);
+        rtl8168_mdio_write(tp, 0x15, 0x02b8);
+        rtl8168_mdio_write(tp, 0x19, 0x4480);
+        rtl8168_mdio_write(tp, 0x15, 0x02b9);
+        rtl8168_mdio_write(tp, 0x19, 0x9e00);
+        rtl8168_mdio_write(tp, 0x15, 0x02ba);
+        rtl8168_mdio_write(tp, 0x19, 0x4891);
+        rtl8168_mdio_write(tp, 0x15, 0x02bb);
+        rtl8168_mdio_write(tp, 0x19, 0x4cc0);
+        rtl8168_mdio_write(tp, 0x15, 0x02bc);
+        rtl8168_mdio_write(tp, 0x19, 0x4801);
+        rtl8168_mdio_write(tp, 0x15, 0x02bd);
+        rtl8168_mdio_write(tp, 0x19, 0xa609);
+        rtl8168_mdio_write(tp, 0x15, 0x02be);
+        rtl8168_mdio_write(tp, 0x19, 0xd64f);
+        rtl8168_mdio_write(tp, 0x15, 0x02bf);
+        rtl8168_mdio_write(tp, 0x19, 0x004e);
+        rtl8168_mdio_write(tp, 0x15, 0x02c0);
+        rtl8168_mdio_write(tp, 0x19, 0x87fe);
+        rtl8168_mdio_write(tp, 0x15, 0x02c1);
+        rtl8168_mdio_write(tp, 0x19, 0x32c6);
+        rtl8168_mdio_write(tp, 0x15, 0x02c2);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02c3);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02c4);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02c5);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02c6);
+        rtl8168_mdio_write(tp, 0x19, 0x48b2);
+        rtl8168_mdio_write(tp, 0x15, 0x02c7);
+        rtl8168_mdio_write(tp, 0x19, 0x4020);
+        rtl8168_mdio_write(tp, 0x15, 0x02c8);
+        rtl8168_mdio_write(tp, 0x19, 0x4822);
+        rtl8168_mdio_write(tp, 0x15, 0x02c9);
+        rtl8168_mdio_write(tp, 0x19, 0x4488);
+        rtl8168_mdio_write(tp, 0x15, 0x02ca);
+        rtl8168_mdio_write(tp, 0x19, 0xd64f);
+        rtl8168_mdio_write(tp, 0x15, 0x02cb);
+        rtl8168_mdio_write(tp, 0x19, 0x0042);
+        rtl8168_mdio_write(tp, 0x15, 0x02cc);
+        rtl8168_mdio_write(tp, 0x19, 0x8203);
+        rtl8168_mdio_write(tp, 0x15, 0x02cd);
+        rtl8168_mdio_write(tp, 0x19, 0x4cc8);
+        rtl8168_mdio_write(tp, 0x15, 0x02ce);
+        rtl8168_mdio_write(tp, 0x19, 0x32d0);
+        rtl8168_mdio_write(tp, 0x15, 0x02cf);
+        rtl8168_mdio_write(tp, 0x19, 0x4cc0);
+        rtl8168_mdio_write(tp, 0x15, 0x02d0);
+        rtl8168_mdio_write(tp, 0x19, 0xc4d4);
+        rtl8168_mdio_write(tp, 0x15, 0x02d1);
+        rtl8168_mdio_write(tp, 0x19, 0x00f9);
+        rtl8168_mdio_write(tp, 0x15, 0x02d2);
+        rtl8168_mdio_write(tp, 0x19, 0xa51a);
+        rtl8168_mdio_write(tp, 0x15, 0x02d3);
+        rtl8168_mdio_write(tp, 0x19, 0x32d9);
+        rtl8168_mdio_write(tp, 0x15, 0x02d4);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02d5);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02d6);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02d7);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02d8);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02d9);
+        rtl8168_mdio_write(tp, 0x19, 0x48b3);
+        rtl8168_mdio_write(tp, 0x15, 0x02da);
+        rtl8168_mdio_write(tp, 0x19, 0x4020);
+        rtl8168_mdio_write(tp, 0x15, 0x02db);
+        rtl8168_mdio_write(tp, 0x19, 0x4823);
+        rtl8168_mdio_write(tp, 0x15, 0x02dc);
+        rtl8168_mdio_write(tp, 0x19, 0x4410);
+        rtl8168_mdio_write(tp, 0x15, 0x02dd);
+        rtl8168_mdio_write(tp, 0x19, 0xb630);
+        rtl8168_mdio_write(tp, 0x15, 0x02de);
+        rtl8168_mdio_write(tp, 0x19, 0x7dc8);
+        rtl8168_mdio_write(tp, 0x15, 0x02df);
+        rtl8168_mdio_write(tp, 0x19, 0x8203);
+        rtl8168_mdio_write(tp, 0x15, 0x02e0);
+        rtl8168_mdio_write(tp, 0x19, 0x4c48);
+        rtl8168_mdio_write(tp, 0x15, 0x02e1);
+        rtl8168_mdio_write(tp, 0x19, 0x32e3);
+        rtl8168_mdio_write(tp, 0x15, 0x02e2);
+        rtl8168_mdio_write(tp, 0x19, 0x4c40);
+        rtl8168_mdio_write(tp, 0x15, 0x02e3);
+        rtl8168_mdio_write(tp, 0x19, 0x9bfa);
+        rtl8168_mdio_write(tp, 0x15, 0x02e4);
+        rtl8168_mdio_write(tp, 0x19, 0x84ca);
+        rtl8168_mdio_write(tp, 0x15, 0x02e5);
+        rtl8168_mdio_write(tp, 0x19, 0x85f8);
+        rtl8168_mdio_write(tp, 0x15, 0x02e6);
+        rtl8168_mdio_write(tp, 0x19, 0x32ec);
+        rtl8168_mdio_write(tp, 0x15, 0x02e7);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02e8);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02e9);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02ea);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02eb);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x02ec);
+        rtl8168_mdio_write(tp, 0x19, 0x48d4);
+        rtl8168_mdio_write(tp, 0x15, 0x02ed);
+        rtl8168_mdio_write(tp, 0x19, 0x4020);
+        rtl8168_mdio_write(tp, 0x15, 0x02ee);
+        rtl8168_mdio_write(tp, 0x19, 0x4844);
+        rtl8168_mdio_write(tp, 0x15, 0x02ef);
+        rtl8168_mdio_write(tp, 0x19, 0x4420);
+        rtl8168_mdio_write(tp, 0x15, 0x02f0);
+        rtl8168_mdio_write(tp, 0x19, 0x6800);
+        rtl8168_mdio_write(tp, 0x15, 0x02f1);
+        rtl8168_mdio_write(tp, 0x19, 0x7dc0);
+        rtl8168_mdio_write(tp, 0x15, 0x02f2);
+        rtl8168_mdio_write(tp, 0x19, 0x4c40);
+        rtl8168_mdio_write(tp, 0x15, 0x02f3);
+        rtl8168_mdio_write(tp, 0x19, 0x7c0b);
+        rtl8168_mdio_write(tp, 0x15, 0x02f4);
+        rtl8168_mdio_write(tp, 0x19, 0x6c08);
+        rtl8168_mdio_write(tp, 0x15, 0x02f5);
+        rtl8168_mdio_write(tp, 0x19, 0x3311);
+        rtl8168_mdio_write(tp, 0x15, 0x02f6);
+        rtl8168_mdio_write(tp, 0x19, 0x9cfd);
+        rtl8168_mdio_write(tp, 0x15, 0x02f7);
+        rtl8168_mdio_write(tp, 0x19, 0xb616);
+        rtl8168_mdio_write(tp, 0x15, 0x02f8);
+        rtl8168_mdio_write(tp, 0x19, 0xc42b);
+        rtl8168_mdio_write(tp, 0x15, 0x02f9);
+        rtl8168_mdio_write(tp, 0x19, 0x00e0);
+        rtl8168_mdio_write(tp, 0x15, 0x02fa);
+        rtl8168_mdio_write(tp, 0x19, 0xc455);
+        rtl8168_mdio_write(tp, 0x15, 0x02fb);
+        rtl8168_mdio_write(tp, 0x19, 0x00b3);
+        rtl8168_mdio_write(tp, 0x15, 0x02fc);
+        rtl8168_mdio_write(tp, 0x19, 0xb20a);
+        rtl8168_mdio_write(tp, 0x15, 0x02fd);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x02fe);
+        rtl8168_mdio_write(tp, 0x19, 0x6c02);
+        rtl8168_mdio_write(tp, 0x15, 0x02ff);
+        rtl8168_mdio_write(tp, 0x19, 0x8204);
+        rtl8168_mdio_write(tp, 0x15, 0x0300);
+        rtl8168_mdio_write(tp, 0x19, 0x7c04);
+        rtl8168_mdio_write(tp, 0x15, 0x0301);
+        rtl8168_mdio_write(tp, 0x19, 0x7404);
+        rtl8168_mdio_write(tp, 0x15, 0x0302);
+        rtl8168_mdio_write(tp, 0x19, 0x32f3);
+        rtl8168_mdio_write(tp, 0x15, 0x0303);
+        rtl8168_mdio_write(tp, 0x19, 0x7c04);
+        rtl8168_mdio_write(tp, 0x15, 0x0304);
+        rtl8168_mdio_write(tp, 0x19, 0x7400);
+        rtl8168_mdio_write(tp, 0x15, 0x0305);
+        rtl8168_mdio_write(tp, 0x19, 0x32f3);
+        rtl8168_mdio_write(tp, 0x15, 0x0306);
+        rtl8168_mdio_write(tp, 0x19, 0xefed);
+        rtl8168_mdio_write(tp, 0x15, 0x0307);
+        rtl8168_mdio_write(tp, 0x19, 0x3342);
+        rtl8168_mdio_write(tp, 0x15, 0x0308);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0309);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x030a);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x030b);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x030c);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x030d);
+        rtl8168_mdio_write(tp, 0x19, 0x3006);
+        rtl8168_mdio_write(tp, 0x15, 0x030e);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x030f);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0310);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0311);
+        rtl8168_mdio_write(tp, 0x19, 0x7c08);
+        rtl8168_mdio_write(tp, 0x15, 0x0312);
+        rtl8168_mdio_write(tp, 0x19, 0xa207);
+        rtl8168_mdio_write(tp, 0x15, 0x0313);
+        rtl8168_mdio_write(tp, 0x19, 0x4c00);
+        rtl8168_mdio_write(tp, 0x15, 0x0314);
+        rtl8168_mdio_write(tp, 0x19, 0x3322);
+        rtl8168_mdio_write(tp, 0x15, 0x0315);
+        rtl8168_mdio_write(tp, 0x19, 0x4041);
+        rtl8168_mdio_write(tp, 0x15, 0x0316);
+        rtl8168_mdio_write(tp, 0x19, 0x7d07);
+        rtl8168_mdio_write(tp, 0x15, 0x0317);
+        rtl8168_mdio_write(tp, 0x19, 0x4502);
+        rtl8168_mdio_write(tp, 0x15, 0x0318);
+        rtl8168_mdio_write(tp, 0x19, 0x3322);
+        rtl8168_mdio_write(tp, 0x15, 0x0319);
+        rtl8168_mdio_write(tp, 0x19, 0x4c08);
+        rtl8168_mdio_write(tp, 0x15, 0x031a);
+        rtl8168_mdio_write(tp, 0x19, 0x3322);
+        rtl8168_mdio_write(tp, 0x15, 0x031b);
+        rtl8168_mdio_write(tp, 0x19, 0x7d80);
+        rtl8168_mdio_write(tp, 0x15, 0x031c);
+        rtl8168_mdio_write(tp, 0x19, 0x5180);
+        rtl8168_mdio_write(tp, 0x15, 0x031d);
+        rtl8168_mdio_write(tp, 0x19, 0x3320);
+        rtl8168_mdio_write(tp, 0x15, 0x031e);
+        rtl8168_mdio_write(tp, 0x19, 0x7d80);
+        rtl8168_mdio_write(tp, 0x15, 0x031f);
+        rtl8168_mdio_write(tp, 0x19, 0x5000);
+        rtl8168_mdio_write(tp, 0x15, 0x0320);
+        rtl8168_mdio_write(tp, 0x19, 0x7d07);
+        rtl8168_mdio_write(tp, 0x15, 0x0321);
+        rtl8168_mdio_write(tp, 0x19, 0x4402);
+        rtl8168_mdio_write(tp, 0x15, 0x0322);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x0323);
+        rtl8168_mdio_write(tp, 0x19, 0x6c02);
+        rtl8168_mdio_write(tp, 0x15, 0x0324);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x0325);
+        rtl8168_mdio_write(tp, 0x19, 0xb30c);
+        rtl8168_mdio_write(tp, 0x15, 0x0326);
+        rtl8168_mdio_write(tp, 0x19, 0xb206);
+        rtl8168_mdio_write(tp, 0x15, 0x0327);
+        rtl8168_mdio_write(tp, 0x19, 0xb103);
+        rtl8168_mdio_write(tp, 0x15, 0x0328);
+        rtl8168_mdio_write(tp, 0x19, 0x6c00);
+        rtl8168_mdio_write(tp, 0x15, 0x0329);
+        rtl8168_mdio_write(tp, 0x19, 0x32f6);
+        rtl8168_mdio_write(tp, 0x15, 0x032a);
+        rtl8168_mdio_write(tp, 0x19, 0x6c00);
+        rtl8168_mdio_write(tp, 0x15, 0x032b);
+        rtl8168_mdio_write(tp, 0x19, 0x3352);
+        rtl8168_mdio_write(tp, 0x15, 0x032c);
+        rtl8168_mdio_write(tp, 0x19, 0xb103);
+        rtl8168_mdio_write(tp, 0x15, 0x032d);
+        rtl8168_mdio_write(tp, 0x19, 0x6c00);
+        rtl8168_mdio_write(tp, 0x15, 0x032e);
+        rtl8168_mdio_write(tp, 0x19, 0x336a);
+        rtl8168_mdio_write(tp, 0x15, 0x032f);
+        rtl8168_mdio_write(tp, 0x19, 0x6c00);
+        rtl8168_mdio_write(tp, 0x15, 0x0330);
+        rtl8168_mdio_write(tp, 0x19, 0x3382);
+        rtl8168_mdio_write(tp, 0x15, 0x0331);
+        rtl8168_mdio_write(tp, 0x19, 0xb206);
+        rtl8168_mdio_write(tp, 0x15, 0x0332);
+        rtl8168_mdio_write(tp, 0x19, 0xb103);
+        rtl8168_mdio_write(tp, 0x15, 0x0333);
+        rtl8168_mdio_write(tp, 0x19, 0x6c00);
+        rtl8168_mdio_write(tp, 0x15, 0x0334);
+        rtl8168_mdio_write(tp, 0x19, 0x3395);
+        rtl8168_mdio_write(tp, 0x15, 0x0335);
+        rtl8168_mdio_write(tp, 0x19, 0x6c00);
+        rtl8168_mdio_write(tp, 0x15, 0x0336);
+        rtl8168_mdio_write(tp, 0x19, 0x33c6);
+        rtl8168_mdio_write(tp, 0x15, 0x0337);
+        rtl8168_mdio_write(tp, 0x19, 0xb103);
+        rtl8168_mdio_write(tp, 0x15, 0x0338);
+        rtl8168_mdio_write(tp, 0x19, 0x6c00);
+        rtl8168_mdio_write(tp, 0x15, 0x0339);
+        rtl8168_mdio_write(tp, 0x19, 0x33d7);
+        rtl8168_mdio_write(tp, 0x15, 0x033a);
+        rtl8168_mdio_write(tp, 0x19, 0x6c00);
+        rtl8168_mdio_write(tp, 0x15, 0x033b);
+        rtl8168_mdio_write(tp, 0x19, 0x33f2);
+        rtl8168_mdio_write(tp, 0x15, 0x033c);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x033d);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x033e);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x033f);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0340);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0341);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0342);
+        rtl8168_mdio_write(tp, 0x19, 0x49b5);
+        rtl8168_mdio_write(tp, 0x15, 0x0343);
+        rtl8168_mdio_write(tp, 0x19, 0x7d00);
+        rtl8168_mdio_write(tp, 0x15, 0x0344);
+        rtl8168_mdio_write(tp, 0x19, 0x4d00);
+        rtl8168_mdio_write(tp, 0x15, 0x0345);
+        rtl8168_mdio_write(tp, 0x19, 0x6880);
+        rtl8168_mdio_write(tp, 0x15, 0x0346);
+        rtl8168_mdio_write(tp, 0x19, 0x7c08);
+        rtl8168_mdio_write(tp, 0x15, 0x0347);
+        rtl8168_mdio_write(tp, 0x19, 0x6c08);
+        rtl8168_mdio_write(tp, 0x15, 0x0348);
+        rtl8168_mdio_write(tp, 0x19, 0x4925);
+        rtl8168_mdio_write(tp, 0x15, 0x0349);
+        rtl8168_mdio_write(tp, 0x19, 0x403b);
+        rtl8168_mdio_write(tp, 0x15, 0x034a);
+        rtl8168_mdio_write(tp, 0x19, 0xa602);
+        rtl8168_mdio_write(tp, 0x15, 0x034b);
+        rtl8168_mdio_write(tp, 0x19, 0x402f);
+        rtl8168_mdio_write(tp, 0x15, 0x034c);
+        rtl8168_mdio_write(tp, 0x19, 0x4484);
+        rtl8168_mdio_write(tp, 0x15, 0x034d);
+        rtl8168_mdio_write(tp, 0x19, 0x40c8);
+        rtl8168_mdio_write(tp, 0x15, 0x034e);
+        rtl8168_mdio_write(tp, 0x19, 0x44c4);
+        rtl8168_mdio_write(tp, 0x15, 0x034f);
+        rtl8168_mdio_write(tp, 0x19, 0xd64f);
+        rtl8168_mdio_write(tp, 0x15, 0x0350);
+        rtl8168_mdio_write(tp, 0x19, 0x00bd);
+        rtl8168_mdio_write(tp, 0x15, 0x0351);
+        rtl8168_mdio_write(tp, 0x19, 0x3311);
+        rtl8168_mdio_write(tp, 0x15, 0x0352);
+        rtl8168_mdio_write(tp, 0x19, 0xc8ed);
+        rtl8168_mdio_write(tp, 0x15, 0x0353);
+        rtl8168_mdio_write(tp, 0x19, 0x00fc);
+        rtl8168_mdio_write(tp, 0x15, 0x0354);
+        rtl8168_mdio_write(tp, 0x19, 0x8221);
+        rtl8168_mdio_write(tp, 0x15, 0x0355);
+        rtl8168_mdio_write(tp, 0x19, 0xd11d);
+        rtl8168_mdio_write(tp, 0x15, 0x0356);
+        rtl8168_mdio_write(tp, 0x19, 0x001f);
+        rtl8168_mdio_write(tp, 0x15, 0x0357);
+        rtl8168_mdio_write(tp, 0x19, 0xde18);
+        rtl8168_mdio_write(tp, 0x15, 0x0358);
+        rtl8168_mdio_write(tp, 0x19, 0x0008);
+        rtl8168_mdio_write(tp, 0x15, 0x0359);
+        rtl8168_mdio_write(tp, 0x19, 0x91f6);
+        rtl8168_mdio_write(tp, 0x15, 0x035a);
+        rtl8168_mdio_write(tp, 0x19, 0x3360);
+        rtl8168_mdio_write(tp, 0x15, 0x035b);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x035c);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x035d);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x035e);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x035f);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0360);
+        rtl8168_mdio_write(tp, 0x19, 0x4bb6);
+        rtl8168_mdio_write(tp, 0x15, 0x0361);
+        rtl8168_mdio_write(tp, 0x19, 0x4064);
+        rtl8168_mdio_write(tp, 0x15, 0x0362);
+        rtl8168_mdio_write(tp, 0x19, 0x4b26);
+        rtl8168_mdio_write(tp, 0x15, 0x0363);
+        rtl8168_mdio_write(tp, 0x19, 0x4410);
+        rtl8168_mdio_write(tp, 0x15, 0x0364);
+        rtl8168_mdio_write(tp, 0x19, 0x4006);
+        rtl8168_mdio_write(tp, 0x15, 0x0365);
+        rtl8168_mdio_write(tp, 0x19, 0x4490);
+        rtl8168_mdio_write(tp, 0x15, 0x0366);
+        rtl8168_mdio_write(tp, 0x19, 0x6900);
+        rtl8168_mdio_write(tp, 0x15, 0x0367);
+        rtl8168_mdio_write(tp, 0x19, 0xb6a6);
+        rtl8168_mdio_write(tp, 0x15, 0x0368);
+        rtl8168_mdio_write(tp, 0x19, 0x9e02);
+        rtl8168_mdio_write(tp, 0x15, 0x0369);
+        rtl8168_mdio_write(tp, 0x19, 0x3311);
+        rtl8168_mdio_write(tp, 0x15, 0x036a);
+        rtl8168_mdio_write(tp, 0x19, 0xd11d);
+        rtl8168_mdio_write(tp, 0x15, 0x036b);
+        rtl8168_mdio_write(tp, 0x19, 0x000a);
+        rtl8168_mdio_write(tp, 0x15, 0x036c);
+        rtl8168_mdio_write(tp, 0x19, 0xbb0f);
+        rtl8168_mdio_write(tp, 0x15, 0x036d);
+        rtl8168_mdio_write(tp, 0x19, 0x8102);
+        rtl8168_mdio_write(tp, 0x15, 0x036e);
+        rtl8168_mdio_write(tp, 0x19, 0x3371);
+        rtl8168_mdio_write(tp, 0x15, 0x036f);
+        rtl8168_mdio_write(tp, 0x19, 0xa21e);
+        rtl8168_mdio_write(tp, 0x15, 0x0370);
+        rtl8168_mdio_write(tp, 0x19, 0x33b6);
+        rtl8168_mdio_write(tp, 0x15, 0x0371);
+        rtl8168_mdio_write(tp, 0x19, 0x91f6);
+        rtl8168_mdio_write(tp, 0x15, 0x0372);
+        rtl8168_mdio_write(tp, 0x19, 0xc218);
+        rtl8168_mdio_write(tp, 0x15, 0x0373);
+        rtl8168_mdio_write(tp, 0x19, 0x00f4);
+        rtl8168_mdio_write(tp, 0x15, 0x0374);
+        rtl8168_mdio_write(tp, 0x19, 0x33b6);
+        rtl8168_mdio_write(tp, 0x15, 0x0375);
+        rtl8168_mdio_write(tp, 0x19, 0x32ec);
+        rtl8168_mdio_write(tp, 0x15, 0x0376);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0377);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0378);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x0379);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x037a);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x037b);
+        rtl8168_mdio_write(tp, 0x19, 0x4b97);
+        rtl8168_mdio_write(tp, 0x15, 0x037c);
+        rtl8168_mdio_write(tp, 0x19, 0x402b);
+        rtl8168_mdio_write(tp, 0x15, 0x037d);
+        rtl8168_mdio_write(tp, 0x19, 0x4b07);
+        rtl8168_mdio_write(tp, 0x15, 0x037e);
+        rtl8168_mdio_write(tp, 0x19, 0x4422);
+        rtl8168_mdio_write(tp, 0x15, 0x037f);
+        rtl8168_mdio_write(tp, 0x19, 0x6980);
+        rtl8168_mdio_write(tp, 0x15, 0x0380);
+        rtl8168_mdio_write(tp, 0x19, 0xb608);
+        rtl8168_mdio_write(tp, 0x15, 0x0381);
+        rtl8168_mdio_write(tp, 0x19, 0x3311);
+        rtl8168_mdio_write(tp, 0x15, 0x0382);
+        rtl8168_mdio_write(tp, 0x19, 0xbc05);
+        rtl8168_mdio_write(tp, 0x15, 0x0383);
+        rtl8168_mdio_write(tp, 0x19, 0xc21c);
+        rtl8168_mdio_write(tp, 0x15, 0x0384);
+        rtl8168_mdio_write(tp, 0x19, 0x0032);
+        rtl8168_mdio_write(tp, 0x15, 0x0385);
+        rtl8168_mdio_write(tp, 0x19, 0xa1fb);
+        rtl8168_mdio_write(tp, 0x15, 0x0386);
+        rtl8168_mdio_write(tp, 0x19, 0x338d);
+        rtl8168_mdio_write(tp, 0x15, 0x0387);
+        rtl8168_mdio_write(tp, 0x19, 0x32ae);
+        rtl8168_mdio_write(tp, 0x15, 0x0388);
+        rtl8168_mdio_write(tp, 0x19, 0x330d);
+        rtl8168_mdio_write(tp, 0x15, 0x0389);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x038a);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x038b);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x038c);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x038d);
+        rtl8168_mdio_write(tp, 0x19, 0x4b97);
+        rtl8168_mdio_write(tp, 0x15, 0x038e);
+        rtl8168_mdio_write(tp, 0x19, 0x6a08);
+        rtl8168_mdio_write(tp, 0x15, 0x038f);
+        rtl8168_mdio_write(tp, 0x19, 0x4b07);
+        rtl8168_mdio_write(tp, 0x15, 0x0390);
+        rtl8168_mdio_write(tp, 0x19, 0x40ac);
+        rtl8168_mdio_write(tp, 0x15, 0x0391);
+        rtl8168_mdio_write(tp, 0x19, 0x4445);
+        rtl8168_mdio_write(tp, 0x15, 0x0392);
+        rtl8168_mdio_write(tp, 0x19, 0x404e);
+        rtl8168_mdio_write(tp, 0x15, 0x0393);
+        rtl8168_mdio_write(tp, 0x19, 0x4461);
+        rtl8168_mdio_write(tp, 0x15, 0x0394);
+        rtl8168_mdio_write(tp, 0x19, 0x3311);
+        rtl8168_mdio_write(tp, 0x15, 0x0395);
+        rtl8168_mdio_write(tp, 0x19, 0x9c0a);
+        rtl8168_mdio_write(tp, 0x15, 0x0396);
+        rtl8168_mdio_write(tp, 0x19, 0x63da);
+        rtl8168_mdio_write(tp, 0x15, 0x0397);
+        rtl8168_mdio_write(tp, 0x19, 0x6f0c);
+        rtl8168_mdio_write(tp, 0x15, 0x0398);
+        rtl8168_mdio_write(tp, 0x19, 0x5440);
+        rtl8168_mdio_write(tp, 0x15, 0x0399);
+        rtl8168_mdio_write(tp, 0x19, 0x4b98);
+        rtl8168_mdio_write(tp, 0x15, 0x039a);
+        rtl8168_mdio_write(tp, 0x19, 0x7c40);
+        rtl8168_mdio_write(tp, 0x15, 0x039b);
+        rtl8168_mdio_write(tp, 0x19, 0x4c00);
+        rtl8168_mdio_write(tp, 0x15, 0x039c);
+        rtl8168_mdio_write(tp, 0x19, 0x4b08);
+        rtl8168_mdio_write(tp, 0x15, 0x039d);
+        rtl8168_mdio_write(tp, 0x19, 0x63d8);
+        rtl8168_mdio_write(tp, 0x15, 0x039e);
+        rtl8168_mdio_write(tp, 0x19, 0x33a5);
+        rtl8168_mdio_write(tp, 0x15, 0x039f);
+        rtl8168_mdio_write(tp, 0x19, 0xd64f);
+        rtl8168_mdio_write(tp, 0x15, 0x03a0);
+        rtl8168_mdio_write(tp, 0x19, 0x00e8);
+        rtl8168_mdio_write(tp, 0x15, 0x03a1);
+        rtl8168_mdio_write(tp, 0x19, 0x820e);
+        rtl8168_mdio_write(tp, 0x15, 0x03a2);
+        rtl8168_mdio_write(tp, 0x19, 0xa10d);
+        rtl8168_mdio_write(tp, 0x15, 0x03a3);
+        rtl8168_mdio_write(tp, 0x19, 0x9df1);
+        rtl8168_mdio_write(tp, 0x15, 0x03a4);
+        rtl8168_mdio_write(tp, 0x19, 0x33af);
+        rtl8168_mdio_write(tp, 0x15, 0x03a5);
+        rtl8168_mdio_write(tp, 0x19, 0xd64f);
+        rtl8168_mdio_write(tp, 0x15, 0x03a6);
+        rtl8168_mdio_write(tp, 0x19, 0x00f9);
+        rtl8168_mdio_write(tp, 0x15, 0x03a7);
+        rtl8168_mdio_write(tp, 0x19, 0xc017);
+        rtl8168_mdio_write(tp, 0x15, 0x03a8);
+        rtl8168_mdio_write(tp, 0x19, 0x0007);
+        rtl8168_mdio_write(tp, 0x15, 0x03a9);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x03aa);
+        rtl8168_mdio_write(tp, 0x19, 0x6c03);
+        rtl8168_mdio_write(tp, 0x15, 0x03ab);
+        rtl8168_mdio_write(tp, 0x19, 0xa104);
+        rtl8168_mdio_write(tp, 0x15, 0x03ac);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x03ad);
+        rtl8168_mdio_write(tp, 0x19, 0x6c00);
+        rtl8168_mdio_write(tp, 0x15, 0x03ae);
+        rtl8168_mdio_write(tp, 0x19, 0x9df7);
+        rtl8168_mdio_write(tp, 0x15, 0x03af);
+        rtl8168_mdio_write(tp, 0x19, 0x7c03);
+        rtl8168_mdio_write(tp, 0x15, 0x03b0);
+        rtl8168_mdio_write(tp, 0x19, 0x6c08);
+        rtl8168_mdio_write(tp, 0x15, 0x03b1);
+        rtl8168_mdio_write(tp, 0x19, 0x33b6);
+        rtl8168_mdio_write(tp, 0x15, 0x03b2);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x03b3);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x03b4);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x03b5);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x03b6);
+        rtl8168_mdio_write(tp, 0x19, 0x55af);
+        rtl8168_mdio_write(tp, 0x15, 0x03b7);
+        rtl8168_mdio_write(tp, 0x19, 0x7ff0);
+        rtl8168_mdio_write(tp, 0x15, 0x03b8);
+        rtl8168_mdio_write(tp, 0x19, 0x6ff0);
+        rtl8168_mdio_write(tp, 0x15, 0x03b9);
+        rtl8168_mdio_write(tp, 0x19, 0x4bb9);
+        rtl8168_mdio_write(tp, 0x15, 0x03ba);
+        rtl8168_mdio_write(tp, 0x19, 0x6a80);
+        rtl8168_mdio_write(tp, 0x15, 0x03bb);
+        rtl8168_mdio_write(tp, 0x19, 0x4b29);
+        rtl8168_mdio_write(tp, 0x15, 0x03bc);
+        rtl8168_mdio_write(tp, 0x19, 0x4041);
+        rtl8168_mdio_write(tp, 0x15, 0x03bd);
+        rtl8168_mdio_write(tp, 0x19, 0x440a);
+        rtl8168_mdio_write(tp, 0x15, 0x03be);
+        rtl8168_mdio_write(tp, 0x19, 0x4029);
+        rtl8168_mdio_write(tp, 0x15, 0x03bf);
+        rtl8168_mdio_write(tp, 0x19, 0x4418);
+        rtl8168_mdio_write(tp, 0x15, 0x03c0);
+        rtl8168_mdio_write(tp, 0x19, 0x4090);
+        rtl8168_mdio_write(tp, 0x15, 0x03c1);
+        rtl8168_mdio_write(tp, 0x19, 0x4438);
+        rtl8168_mdio_write(tp, 0x15, 0x03c2);
+        rtl8168_mdio_write(tp, 0x19, 0x40c4);
+        rtl8168_mdio_write(tp, 0x15, 0x03c3);
+        rtl8168_mdio_write(tp, 0x19, 0x447b);
+        rtl8168_mdio_write(tp, 0x15, 0x03c4);
+        rtl8168_mdio_write(tp, 0x19, 0xb6c4);
+        rtl8168_mdio_write(tp, 0x15, 0x03c5);
+        rtl8168_mdio_write(tp, 0x19, 0x3311);
+        rtl8168_mdio_write(tp, 0x15, 0x03c6);
+        rtl8168_mdio_write(tp, 0x19, 0x9bfe);
+        rtl8168_mdio_write(tp, 0x15, 0x03c7);
+        rtl8168_mdio_write(tp, 0x19, 0x33cc);
+        rtl8168_mdio_write(tp, 0x15, 0x03c8);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x03c9);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x03ca);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x03cb);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x03cc);
+        rtl8168_mdio_write(tp, 0x19, 0x542f);
+        rtl8168_mdio_write(tp, 0x15, 0x03cd);
+        rtl8168_mdio_write(tp, 0x19, 0x499a);
+        rtl8168_mdio_write(tp, 0x15, 0x03ce);
+        rtl8168_mdio_write(tp, 0x19, 0x7c40);
+        rtl8168_mdio_write(tp, 0x15, 0x03cf);
+        rtl8168_mdio_write(tp, 0x19, 0x4c40);
+        rtl8168_mdio_write(tp, 0x15, 0x03d0);
+        rtl8168_mdio_write(tp, 0x19, 0x490a);
+        rtl8168_mdio_write(tp, 0x15, 0x03d1);
+        rtl8168_mdio_write(tp, 0x19, 0x405e);
+        rtl8168_mdio_write(tp, 0x15, 0x03d2);
+        rtl8168_mdio_write(tp, 0x19, 0x44f8);
+        rtl8168_mdio_write(tp, 0x15, 0x03d3);
+        rtl8168_mdio_write(tp, 0x19, 0x6b00);
+        rtl8168_mdio_write(tp, 0x15, 0x03d4);
+        rtl8168_mdio_write(tp, 0x19, 0xd64f);
+        rtl8168_mdio_write(tp, 0x15, 0x03d5);
+        rtl8168_mdio_write(tp, 0x19, 0x0028);
+        rtl8168_mdio_write(tp, 0x15, 0x03d6);
+        rtl8168_mdio_write(tp, 0x19, 0x3311);
+        rtl8168_mdio_write(tp, 0x15, 0x03d7);
+        rtl8168_mdio_write(tp, 0x19, 0xbd27);
+        rtl8168_mdio_write(tp, 0x15, 0x03d8);
+        rtl8168_mdio_write(tp, 0x19, 0x9cfc);
+        rtl8168_mdio_write(tp, 0x15, 0x03d9);
+        rtl8168_mdio_write(tp, 0x19, 0xc639);
+        rtl8168_mdio_write(tp, 0x15, 0x03da);
+        rtl8168_mdio_write(tp, 0x19, 0x000f);
+        rtl8168_mdio_write(tp, 0x15, 0x03db);
+        rtl8168_mdio_write(tp, 0x19, 0x9e03);
+        rtl8168_mdio_write(tp, 0x15, 0x03dc);
+        rtl8168_mdio_write(tp, 0x19, 0x7c01);
+        rtl8168_mdio_write(tp, 0x15, 0x03dd);
+        rtl8168_mdio_write(tp, 0x19, 0x4c01);
+        rtl8168_mdio_write(tp, 0x15, 0x03de);
+        rtl8168_mdio_write(tp, 0x19, 0x9af6);
+        rtl8168_mdio_write(tp, 0x15, 0x03df);
+        rtl8168_mdio_write(tp, 0x19, 0x7c12);
+        rtl8168_mdio_write(tp, 0x15, 0x03e0);
+        rtl8168_mdio_write(tp, 0x19, 0x4c52);
+        rtl8168_mdio_write(tp, 0x15, 0x03e1);
+        rtl8168_mdio_write(tp, 0x19, 0x4470);
+        rtl8168_mdio_write(tp, 0x15, 0x03e2);
+        rtl8168_mdio_write(tp, 0x19, 0x7c12);
+        rtl8168_mdio_write(tp, 0x15, 0x03e3);
+        rtl8168_mdio_write(tp, 0x19, 0x4c40);
+        rtl8168_mdio_write(tp, 0x15, 0x03e4);
+        rtl8168_mdio_write(tp, 0x19, 0x33d4);
+        rtl8168_mdio_write(tp, 0x15, 0x03e5);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x03e6);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x03e7);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x03e8);
+        rtl8168_mdio_write(tp, 0x19, 0x0000);
+        rtl8168_mdio_write(tp, 0x15, 0x03e9);
+        rtl8168_mdio_write(tp, 0x19, 0x49bb);
+        rtl8168_mdio_write(tp, 0x15, 0x03ea);
+        rtl8168_mdio_write(tp, 0x19, 0x4478);
+        rtl8168_mdio_write(tp, 0x15, 0x03eb);
+        rtl8168_mdio_write(tp, 0x19, 0x492b);
+        rtl8168_mdio_write(tp, 0x15, 0x03ec);
+        rtl8168_mdio_write(tp, 0x19, 0x6b80);
+        rtl8168_mdio_write(tp, 0x15, 0x03ed);
+        rtl8168_mdio_write(tp, 0x19, 0x7c01);
+        rtl8168_mdio_write(tp, 0x15, 0x03ee);
+        rtl8168_mdio_write(tp, 0x19, 0x4c00);
+        rtl8168_mdio_write(tp, 0x15, 0x03ef);
+        rtl8168_mdio_write(tp, 0x19, 0xd64f);
+        rtl8168_mdio_write(tp, 0x15, 0x03f0);
+        rtl8168_mdio_write(tp, 0x19, 0x000d);
+        rtl8168_mdio_write(tp, 0x15, 0x03f1);
+        rtl8168_mdio_write(tp, 0x19, 0x3311);
+        rtl8168_mdio_write(tp, 0x15, 0x03f2);
+        rtl8168_mdio_write(tp, 0x19, 0xbd0c);
+        rtl8168_mdio_write(tp, 0x15, 0x03f3);
+        rtl8168_mdio_write(tp, 0x19, 0xc428);
+        rtl8168_mdio_write(tp, 0x15, 0x03f4);
+        rtl8168_mdio_write(tp, 0x19, 0x0008);
+        rtl8168_mdio_write(tp, 0x15, 0x03f5);
+        rtl8168_mdio_write(tp, 0x19, 0x9afa);
+        rtl8168_mdio_write(tp, 0x15, 0x03f6);
+        rtl8168_mdio_write(tp, 0x19, 0x7c12);
+        rtl8168_mdio_write(tp, 0x15, 0x03f7);
+        rtl8168_mdio_write(tp, 0x19, 0x4c52);
+        rtl8168_mdio_write(tp, 0x15, 0x03f8);
+        rtl8168_mdio_write(tp, 0x19, 0x4470);
+        rtl8168_mdio_write(tp, 0x15, 0x03f9);
+        rtl8168_mdio_write(tp, 0x19, 0x7c12);
+        rtl8168_mdio_write(tp, 0x15, 0x03fa);
+        rtl8168_mdio_write(tp, 0x19, 0x4c40);
+        rtl8168_mdio_write(tp, 0x15, 0x03fb);
+        rtl8168_mdio_write(tp, 0x19, 0x33ef);
+        rtl8168_mdio_write(tp, 0x15, 0x03fc);
+        rtl8168_mdio_write(tp, 0x19, 0x3342);
+        rtl8168_mdio_write(tp, 0x15, 0x03fd);
+        rtl8168_mdio_write(tp, 0x19, 0x330d);
+        rtl8168_mdio_write(tp, 0x15, 0x03fe);
+        rtl8168_mdio_write(tp, 0x19, 0x32ae);
+        rtl8168_mdio_write(tp, 0x15, 0x0000);
+        rtl8168_mdio_write(tp, 0x16, 0x0306);
+        rtl8168_mdio_write(tp, 0x16, 0x0300);
+        rtl8168_mdio_write(tp, 0x1f, 0x0002);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+        rtl8168_mdio_write(tp, 0x05, 0xfff6);
+        rtl8168_mdio_write(tp, 0x06, 0x0080);
+        rtl8168_mdio_write(tp, 0x05, 0x8000);
+        rtl8168_mdio_write(tp, 0x06, 0x0280);
+        rtl8168_mdio_write(tp, 0x06, 0x48f7);
+        rtl8168_mdio_write(tp, 0x06, 0x00e0);
+        rtl8168_mdio_write(tp, 0x06, 0xfff7);
+        rtl8168_mdio_write(tp, 0x06, 0xa080);
+        rtl8168_mdio_write(tp, 0x06, 0x02ae);
+        rtl8168_mdio_write(tp, 0x06, 0xf602);
+        rtl8168_mdio_write(tp, 0x06, 0x0112);
+        rtl8168_mdio_write(tp, 0x06, 0x0201);
+        rtl8168_mdio_write(tp, 0x06, 0x1f02);
+        rtl8168_mdio_write(tp, 0x06, 0x012c);
+        rtl8168_mdio_write(tp, 0x06, 0x0201);
+        rtl8168_mdio_write(tp, 0x06, 0x3c02);
+        rtl8168_mdio_write(tp, 0x06, 0x0156);
+        rtl8168_mdio_write(tp, 0x06, 0x0201);
+        rtl8168_mdio_write(tp, 0x06, 0x6d02);
+        rtl8168_mdio_write(tp, 0x06, 0x809d);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x88e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b89);
+        rtl8168_mdio_write(tp, 0x06, 0x1e01);
+        rtl8168_mdio_write(tp, 0x06, 0xe18b);
+        rtl8168_mdio_write(tp, 0x06, 0x8a1e);
+        rtl8168_mdio_write(tp, 0x06, 0x01e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8b);
+        rtl8168_mdio_write(tp, 0x06, 0x1e01);
+        rtl8168_mdio_write(tp, 0x06, 0xe18b);
+        rtl8168_mdio_write(tp, 0x06, 0x8c1e);
+        rtl8168_mdio_write(tp, 0x06, 0x01e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
+        rtl8168_mdio_write(tp, 0x06, 0x1e01);
+        rtl8168_mdio_write(tp, 0x06, 0xe18b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e1e);
+        rtl8168_mdio_write(tp, 0x06, 0x01a0);
+        rtl8168_mdio_write(tp, 0x06, 0x00c7);
+        rtl8168_mdio_write(tp, 0x06, 0xaebb);
+        rtl8168_mdio_write(tp, 0x06, 0xd100);
+        rtl8168_mdio_write(tp, 0x06, 0xbf82);
+        rtl8168_mdio_write(tp, 0x06, 0xc702);
+        rtl8168_mdio_write(tp, 0x06, 0x320a);
+        rtl8168_mdio_write(tp, 0x06, 0xd105);
+        rtl8168_mdio_write(tp, 0x06, 0xbf82);
+        rtl8168_mdio_write(tp, 0x06, 0xcd02);
+        rtl8168_mdio_write(tp, 0x06, 0x320a);
+        rtl8168_mdio_write(tp, 0x06, 0xd100);
+        rtl8168_mdio_write(tp, 0x06, 0xbf82);
+        rtl8168_mdio_write(tp, 0x06, 0xca02);
+        rtl8168_mdio_write(tp, 0x06, 0x320a);
+        rtl8168_mdio_write(tp, 0x06, 0xd105);
+        rtl8168_mdio_write(tp, 0x06, 0xbf82);
+        rtl8168_mdio_write(tp, 0x06, 0xd002);
+        rtl8168_mdio_write(tp, 0x06, 0x320a);
+        rtl8168_mdio_write(tp, 0x06, 0xd481);
+        rtl8168_mdio_write(tp, 0x06, 0xc9e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b90);
+        rtl8168_mdio_write(tp, 0x06, 0xe58b);
+        rtl8168_mdio_write(tp, 0x06, 0x91d4);
+        rtl8168_mdio_write(tp, 0x06, 0x81b8);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x92e5);
+        rtl8168_mdio_write(tp, 0x06, 0x8b93);
+        rtl8168_mdio_write(tp, 0x06, 0xbf8b);
+        rtl8168_mdio_write(tp, 0x06, 0x88ec);
+        rtl8168_mdio_write(tp, 0x06, 0x0019);
+        rtl8168_mdio_write(tp, 0x06, 0xa98b);
+        rtl8168_mdio_write(tp, 0x06, 0x90f9);
+        rtl8168_mdio_write(tp, 0x06, 0xeeff);
+        rtl8168_mdio_write(tp, 0x06, 0xf600);
+        rtl8168_mdio_write(tp, 0x06, 0xeeff);
+        rtl8168_mdio_write(tp, 0x06, 0xf7fc);
+        rtl8168_mdio_write(tp, 0x06, 0xd100);
+        rtl8168_mdio_write(tp, 0x06, 0xbf82);
+        rtl8168_mdio_write(tp, 0x06, 0xc102);
+        rtl8168_mdio_write(tp, 0x06, 0x320a);
+        rtl8168_mdio_write(tp, 0x06, 0xd101);
+        rtl8168_mdio_write(tp, 0x06, 0xbf82);
+        rtl8168_mdio_write(tp, 0x06, 0xc402);
+        rtl8168_mdio_write(tp, 0x06, 0x320a);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ead);
+        rtl8168_mdio_write(tp, 0x06, 0x201a);
+        rtl8168_mdio_write(tp, 0x06, 0xf620);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e02);
+        rtl8168_mdio_write(tp, 0x06, 0x824b);
+        rtl8168_mdio_write(tp, 0x06, 0x0281);
+        rtl8168_mdio_write(tp, 0x06, 0x1902);
+        rtl8168_mdio_write(tp, 0x06, 0x2c9d);
+        rtl8168_mdio_write(tp, 0x06, 0x0203);
+        rtl8168_mdio_write(tp, 0x06, 0x9602);
+        rtl8168_mdio_write(tp, 0x06, 0x0473);
+        rtl8168_mdio_write(tp, 0x06, 0x022e);
+        rtl8168_mdio_write(tp, 0x06, 0x3902);
+        rtl8168_mdio_write(tp, 0x06, 0x044d);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ead);
+        rtl8168_mdio_write(tp, 0x06, 0x210b);
+        rtl8168_mdio_write(tp, 0x06, 0xf621);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e02);
+        rtl8168_mdio_write(tp, 0x06, 0x0416);
+        rtl8168_mdio_write(tp, 0x06, 0x021b);
+        rtl8168_mdio_write(tp, 0x06, 0xa4e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xad22);
+        rtl8168_mdio_write(tp, 0x06, 0x05f6);
+        rtl8168_mdio_write(tp, 0x06, 0x22e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ead);
+        rtl8168_mdio_write(tp, 0x06, 0x2305);
+        rtl8168_mdio_write(tp, 0x06, 0xf623);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ee0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xad24);
+        rtl8168_mdio_write(tp, 0x06, 0x05f6);
+        rtl8168_mdio_write(tp, 0x06, 0x24e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ead);
+        rtl8168_mdio_write(tp, 0x06, 0x2505);
+        rtl8168_mdio_write(tp, 0x06, 0xf625);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ee0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xad26);
+        rtl8168_mdio_write(tp, 0x06, 0x08f6);
+        rtl8168_mdio_write(tp, 0x06, 0x26e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0x0281);
+        rtl8168_mdio_write(tp, 0x06, 0xdae0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xad27);
+        rtl8168_mdio_write(tp, 0x06, 0x05f6);
+        rtl8168_mdio_write(tp, 0x06, 0x27e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0x0203);
+        rtl8168_mdio_write(tp, 0x06, 0x5cfc);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xfaef);
+        rtl8168_mdio_write(tp, 0x06, 0x69e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b85);
+        rtl8168_mdio_write(tp, 0x06, 0xad21);
+        rtl8168_mdio_write(tp, 0x06, 0x57e0);
+        rtl8168_mdio_write(tp, 0x06, 0xe022);
+        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+        rtl8168_mdio_write(tp, 0x06, 0x2358);
+        rtl8168_mdio_write(tp, 0x06, 0xc059);
+        rtl8168_mdio_write(tp, 0x06, 0x021e);
+        rtl8168_mdio_write(tp, 0x06, 0x01e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b3c);
+        rtl8168_mdio_write(tp, 0x06, 0x1f10);
+        rtl8168_mdio_write(tp, 0x06, 0x9e44);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x3cad);
+        rtl8168_mdio_write(tp, 0x06, 0x211d);
+        rtl8168_mdio_write(tp, 0x06, 0xe18b);
+        rtl8168_mdio_write(tp, 0x06, 0x84f7);
+        rtl8168_mdio_write(tp, 0x06, 0x29e5);
+        rtl8168_mdio_write(tp, 0x06, 0x8b84);
+        rtl8168_mdio_write(tp, 0x06, 0xac27);
+        rtl8168_mdio_write(tp, 0x06, 0x0dac);
+        rtl8168_mdio_write(tp, 0x06, 0x2605);
+        rtl8168_mdio_write(tp, 0x06, 0x0281);
+        rtl8168_mdio_write(tp, 0x06, 0x7fae);
+        rtl8168_mdio_write(tp, 0x06, 0x2b02);
+        rtl8168_mdio_write(tp, 0x06, 0x2c23);
+        rtl8168_mdio_write(tp, 0x06, 0xae26);
+        rtl8168_mdio_write(tp, 0x06, 0x022c);
+        rtl8168_mdio_write(tp, 0x06, 0x41ae);
+        rtl8168_mdio_write(tp, 0x06, 0x21e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b87);
+        rtl8168_mdio_write(tp, 0x06, 0xad22);
+        rtl8168_mdio_write(tp, 0x06, 0x18e0);
+        rtl8168_mdio_write(tp, 0x06, 0xfff7);
+        rtl8168_mdio_write(tp, 0x06, 0x58fc);
+        rtl8168_mdio_write(tp, 0x06, 0xe4ff);
+        rtl8168_mdio_write(tp, 0x06, 0xf7d1);
+        rtl8168_mdio_write(tp, 0x06, 0x00bf);
+        rtl8168_mdio_write(tp, 0x06, 0x2eee);
+        rtl8168_mdio_write(tp, 0x06, 0x0232);
+        rtl8168_mdio_write(tp, 0x06, 0x0ad1);
+        rtl8168_mdio_write(tp, 0x06, 0x00bf);
+        rtl8168_mdio_write(tp, 0x06, 0x82e8);
+        rtl8168_mdio_write(tp, 0x06, 0x0232);
+        rtl8168_mdio_write(tp, 0x06, 0x0a02);
+        rtl8168_mdio_write(tp, 0x06, 0x2bdf);
+        rtl8168_mdio_write(tp, 0x06, 0xef96);
+        rtl8168_mdio_write(tp, 0x06, 0xfefc);
+        rtl8168_mdio_write(tp, 0x06, 0x04d0);
+        rtl8168_mdio_write(tp, 0x06, 0x0202);
+        rtl8168_mdio_write(tp, 0x06, 0x1e97);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x87ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2228);
+        rtl8168_mdio_write(tp, 0x06, 0xd100);
+        rtl8168_mdio_write(tp, 0x06, 0xbf82);
+        rtl8168_mdio_write(tp, 0x06, 0xd302);
+        rtl8168_mdio_write(tp, 0x06, 0x320a);
+        rtl8168_mdio_write(tp, 0x06, 0xd10c);
+        rtl8168_mdio_write(tp, 0x06, 0xbf82);
+        rtl8168_mdio_write(tp, 0x06, 0xd602);
+        rtl8168_mdio_write(tp, 0x06, 0x320a);
+        rtl8168_mdio_write(tp, 0x06, 0xd104);
+        rtl8168_mdio_write(tp, 0x06, 0xbf82);
+        rtl8168_mdio_write(tp, 0x06, 0xd902);
+        rtl8168_mdio_write(tp, 0x06, 0x320a);
+        rtl8168_mdio_write(tp, 0x06, 0xd101);
+        rtl8168_mdio_write(tp, 0x06, 0xbf82);
+        rtl8168_mdio_write(tp, 0x06, 0xe802);
+        rtl8168_mdio_write(tp, 0x06, 0x320a);
+        rtl8168_mdio_write(tp, 0x06, 0xe0ff);
+        rtl8168_mdio_write(tp, 0x06, 0xf768);
+        rtl8168_mdio_write(tp, 0x06, 0x03e4);
+        rtl8168_mdio_write(tp, 0x06, 0xfff7);
+        rtl8168_mdio_write(tp, 0x06, 0xd004);
+        rtl8168_mdio_write(tp, 0x06, 0x0228);
+        rtl8168_mdio_write(tp, 0x06, 0x7a04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+        rtl8168_mdio_write(tp, 0x06, 0xe234);
+        rtl8168_mdio_write(tp, 0x06, 0xe1e2);
+        rtl8168_mdio_write(tp, 0x06, 0x35f6);
+        rtl8168_mdio_write(tp, 0x06, 0x2be4);
+        rtl8168_mdio_write(tp, 0x06, 0xe234);
+        rtl8168_mdio_write(tp, 0x06, 0xe5e2);
+        rtl8168_mdio_write(tp, 0x06, 0x35fc);
+        rtl8168_mdio_write(tp, 0x06, 0x05f8);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e2);
+        rtl8168_mdio_write(tp, 0x06, 0x34e1);
+        rtl8168_mdio_write(tp, 0x06, 0xe235);
+        rtl8168_mdio_write(tp, 0x06, 0xf72b);
+        rtl8168_mdio_write(tp, 0x06, 0xe4e2);
+        rtl8168_mdio_write(tp, 0x06, 0x34e5);
+        rtl8168_mdio_write(tp, 0x06, 0xe235);
+        rtl8168_mdio_write(tp, 0x06, 0xfc05);
+        rtl8168_mdio_write(tp, 0x06, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x06, 0xfaef);
+        rtl8168_mdio_write(tp, 0x06, 0x69ac);
+        rtl8168_mdio_write(tp, 0x06, 0x1b4c);
+        rtl8168_mdio_write(tp, 0x06, 0xbf2e);
+        rtl8168_mdio_write(tp, 0x06, 0x3002);
+        rtl8168_mdio_write(tp, 0x06, 0x31dd);
+        rtl8168_mdio_write(tp, 0x06, 0xef01);
+        rtl8168_mdio_write(tp, 0x06, 0xe28a);
+        rtl8168_mdio_write(tp, 0x06, 0x76e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8a76);
+        rtl8168_mdio_write(tp, 0x06, 0x1f12);
+        rtl8168_mdio_write(tp, 0x06, 0x9e3a);
+        rtl8168_mdio_write(tp, 0x06, 0xef12);
+        rtl8168_mdio_write(tp, 0x06, 0x5907);
+        rtl8168_mdio_write(tp, 0x06, 0x9f12);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b40);
+        rtl8168_mdio_write(tp, 0x06, 0xf721);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x40d0);
+        rtl8168_mdio_write(tp, 0x06, 0x0302);
+        rtl8168_mdio_write(tp, 0x06, 0x287a);
+        rtl8168_mdio_write(tp, 0x06, 0x0282);
+        rtl8168_mdio_write(tp, 0x06, 0x34fc);
+        rtl8168_mdio_write(tp, 0x06, 0xa000);
+        rtl8168_mdio_write(tp, 0x06, 0x1002);
+        rtl8168_mdio_write(tp, 0x06, 0x2dc3);
+        rtl8168_mdio_write(tp, 0x06, 0x022e);
+        rtl8168_mdio_write(tp, 0x06, 0x21e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b40);
+        rtl8168_mdio_write(tp, 0x06, 0xf621);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x40ae);
+        rtl8168_mdio_write(tp, 0x06, 0x0fbf);
+        rtl8168_mdio_write(tp, 0x06, 0x3fa5);
+        rtl8168_mdio_write(tp, 0x06, 0x0231);
+        rtl8168_mdio_write(tp, 0x06, 0x6cbf);
+        rtl8168_mdio_write(tp, 0x06, 0x3fa2);
+        rtl8168_mdio_write(tp, 0x06, 0x0231);
+        rtl8168_mdio_write(tp, 0x06, 0x6c02);
+        rtl8168_mdio_write(tp, 0x06, 0x2dc3);
+        rtl8168_mdio_write(tp, 0x06, 0xef96);
+        rtl8168_mdio_write(tp, 0x06, 0xfefd);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+        rtl8168_mdio_write(tp, 0x06, 0xe2f4);
+        rtl8168_mdio_write(tp, 0x06, 0xe1e2);
+        rtl8168_mdio_write(tp, 0x06, 0xf5e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8a78);
+        rtl8168_mdio_write(tp, 0x06, 0xe58a);
+        rtl8168_mdio_write(tp, 0x06, 0x79ee);
+        rtl8168_mdio_write(tp, 0x06, 0xe2f4);
+        rtl8168_mdio_write(tp, 0x06, 0xd8ee);
+        rtl8168_mdio_write(tp, 0x06, 0xe2f5);
+        rtl8168_mdio_write(tp, 0x06, 0x20fc);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xf9fa);
+        rtl8168_mdio_write(tp, 0x06, 0xef69);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x87ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2065);
+        rtl8168_mdio_write(tp, 0x06, 0xd200);
+        rtl8168_mdio_write(tp, 0x06, 0xbf2e);
+        rtl8168_mdio_write(tp, 0x06, 0xe802);
+        rtl8168_mdio_write(tp, 0x06, 0x31dd);
+        rtl8168_mdio_write(tp, 0x06, 0x1e21);
+        rtl8168_mdio_write(tp, 0x06, 0xbf82);
+        rtl8168_mdio_write(tp, 0x06, 0xdf02);
+        rtl8168_mdio_write(tp, 0x06, 0x31dd);
+        rtl8168_mdio_write(tp, 0x06, 0x0c11);
+        rtl8168_mdio_write(tp, 0x06, 0x1e21);
+        rtl8168_mdio_write(tp, 0x06, 0xbf82);
+        rtl8168_mdio_write(tp, 0x06, 0xe202);
+        rtl8168_mdio_write(tp, 0x06, 0x31dd);
+        rtl8168_mdio_write(tp, 0x06, 0x0c12);
+        rtl8168_mdio_write(tp, 0x06, 0x1e21);
+        rtl8168_mdio_write(tp, 0x06, 0xbf82);
+        rtl8168_mdio_write(tp, 0x06, 0xe502);
+        rtl8168_mdio_write(tp, 0x06, 0x31dd);
+        rtl8168_mdio_write(tp, 0x06, 0x0c13);
+        rtl8168_mdio_write(tp, 0x06, 0x1e21);
+        rtl8168_mdio_write(tp, 0x06, 0xbf1f);
+        rtl8168_mdio_write(tp, 0x06, 0x5302);
+        rtl8168_mdio_write(tp, 0x06, 0x31dd);
+        rtl8168_mdio_write(tp, 0x06, 0x0c14);
+        rtl8168_mdio_write(tp, 0x06, 0x1e21);
+        rtl8168_mdio_write(tp, 0x06, 0xbf82);
+        rtl8168_mdio_write(tp, 0x06, 0xeb02);
+        rtl8168_mdio_write(tp, 0x06, 0x31dd);
+        rtl8168_mdio_write(tp, 0x06, 0x0c16);
+        rtl8168_mdio_write(tp, 0x06, 0x1e21);
+        rtl8168_mdio_write(tp, 0x06, 0xe083);
+        rtl8168_mdio_write(tp, 0x06, 0xe01f);
+        rtl8168_mdio_write(tp, 0x06, 0x029e);
+        rtl8168_mdio_write(tp, 0x06, 0x22e6);
+        rtl8168_mdio_write(tp, 0x06, 0x83e0);
+        rtl8168_mdio_write(tp, 0x06, 0xad31);
+        rtl8168_mdio_write(tp, 0x06, 0x14ad);
+        rtl8168_mdio_write(tp, 0x06, 0x3011);
+        rtl8168_mdio_write(tp, 0x06, 0xef02);
+        rtl8168_mdio_write(tp, 0x06, 0x580c);
+        rtl8168_mdio_write(tp, 0x06, 0x9e07);
+        rtl8168_mdio_write(tp, 0x06, 0xad36);
+        rtl8168_mdio_write(tp, 0x06, 0x085a);
+        rtl8168_mdio_write(tp, 0x06, 0x309f);
+        rtl8168_mdio_write(tp, 0x06, 0x04d1);
+        rtl8168_mdio_write(tp, 0x06, 0x01ae);
+        rtl8168_mdio_write(tp, 0x06, 0x02d1);
+        rtl8168_mdio_write(tp, 0x06, 0x00bf);
+        rtl8168_mdio_write(tp, 0x06, 0x82dc);
+        rtl8168_mdio_write(tp, 0x06, 0x0232);
+        rtl8168_mdio_write(tp, 0x06, 0x0aef);
+        rtl8168_mdio_write(tp, 0x06, 0x96fe);
+        rtl8168_mdio_write(tp, 0x06, 0xfdfc);
+        rtl8168_mdio_write(tp, 0x06, 0x0400);
+        rtl8168_mdio_write(tp, 0x06, 0xe140);
+        rtl8168_mdio_write(tp, 0x06, 0x77e1);
+        rtl8168_mdio_write(tp, 0x06, 0x4010);
+        rtl8168_mdio_write(tp, 0x06, 0xe150);
+        rtl8168_mdio_write(tp, 0x06, 0x32e1);
+        rtl8168_mdio_write(tp, 0x06, 0x5030);
+        rtl8168_mdio_write(tp, 0x06, 0xe144);
+        rtl8168_mdio_write(tp, 0x06, 0x74e1);
+        rtl8168_mdio_write(tp, 0x06, 0x44bb);
+        rtl8168_mdio_write(tp, 0x06, 0xe2d2);
+        rtl8168_mdio_write(tp, 0x06, 0x40e0);
+        rtl8168_mdio_write(tp, 0x06, 0x2cfc);
+        rtl8168_mdio_write(tp, 0x06, 0xe2cc);
+        rtl8168_mdio_write(tp, 0x06, 0xcce2);
+        rtl8168_mdio_write(tp, 0x06, 0x00cc);
+        rtl8168_mdio_write(tp, 0x06, 0xe000);
+        rtl8168_mdio_write(tp, 0x06, 0x99e0);
+        rtl8168_mdio_write(tp, 0x06, 0x3688);
+        rtl8168_mdio_write(tp, 0x06, 0xe036);
+        rtl8168_mdio_write(tp, 0x06, 0x99e1);
+        rtl8168_mdio_write(tp, 0x06, 0x40dd);
+        rtl8168_mdio_write(tp, 0x06, 0xe022);
+        rtl8168_mdio_write(tp, 0x05, 0xe142);
+        gphy_val = rtl8168_mdio_read(tp, 0x06);
+        gphy_val |= BIT_0;
+        rtl8168_mdio_write(tp, 0x06, gphy_val);
+        rtl8168_mdio_write(tp, 0x05, 0xe140);
+        gphy_val = rtl8168_mdio_read(tp, 0x06);
+        gphy_val |= BIT_0;
+        rtl8168_mdio_write(tp, 0x06, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+        for (i = 0; i < 200; i++) {
+                udelay(100);
+                gphy_val = rtl8168_mdio_read(tp, 0x00);
+                if (gphy_val & BIT_7)
+                        break;
+        }
+        rtl8168_mdio_write(tp, 0x1f, 0x0004);
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1e, 0x0023);
+        gphy_val = rtl8168_mdio_read(tp, 0x17);
+        gphy_val &= ~(BIT_0);
+        gphy_val |= BIT_2;
+        rtl8168_mdio_write(tp, 0x17, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0002);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+}
+
+static void
+rtl8168_set_phy_mcu_8168evl_2(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        struct pci_dev *pdev = tp->pci_dev;
+        unsigned int gphy_val,i;
+
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x00, 0x1800);
+        gphy_val = rtl8168_mdio_read(tp, 0x15);
+        gphy_val &= ~(BIT_12);
+        rtl8168_mdio_write(tp, 0x15, gphy_val);
+        rtl8168_mdio_write(tp, 0x00, 0x4800);
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1e, 0x002f);
+        for (i = 0; i < 1000; i++) {
+                udelay(100);
+                gphy_val = rtl8168_mdio_read(tp, 0x1c);
+                if ((gphy_val & 0x0080) == 0x0080)
+                        break;
+        }
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x00, 0x1800);
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1e, 0x0023);
+        for (i = 0; i < 200; i++) {
+                udelay(100);
+                gphy_val = rtl8168_mdio_read(tp, 0x17);
+                if (!(gphy_val & 0x0001))
+                        break;
+        }
+        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+        rtl8168_mdio_write(tp, 0x05, 0xfff6);
+        rtl8168_mdio_write(tp, 0x06, 0x0080);
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1e, 0x0023);
+        rtl8168_mdio_write(tp, 0x16, 0x0306);
+        rtl8168_mdio_write(tp, 0x16, 0x0307);
+        rtl8168_mdio_write(tp, 0x15, 0x00AF);
+        rtl8168_mdio_write(tp, 0x19, 0x4060);
+        rtl8168_mdio_write(tp, 0x15, 0x00B0);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x00B1);
+        rtl8168_mdio_write(tp, 0x19, 0x7e00);
+        rtl8168_mdio_write(tp, 0x15, 0x00B2);
+        rtl8168_mdio_write(tp, 0x19, 0x72B0);
+        rtl8168_mdio_write(tp, 0x15, 0x00B3);
+        rtl8168_mdio_write(tp, 0x19, 0x7F00);
+        rtl8168_mdio_write(tp, 0x15, 0x00B4);
+        rtl8168_mdio_write(tp, 0x19, 0x73B0);
+        rtl8168_mdio_write(tp, 0x15, 0x0101);
+        rtl8168_mdio_write(tp, 0x19, 0x0005);
+        rtl8168_mdio_write(tp, 0x15, 0x0103);
+        rtl8168_mdio_write(tp, 0x19, 0x0003);
+        rtl8168_mdio_write(tp, 0x15, 0x0105);
+        rtl8168_mdio_write(tp, 0x19, 0x30FD);
+        rtl8168_mdio_write(tp, 0x15, 0x0106);
+        rtl8168_mdio_write(tp, 0x19, 0x9DF7);
+        rtl8168_mdio_write(tp, 0x15, 0x0107);
+        rtl8168_mdio_write(tp, 0x19, 0x30C6);
+        rtl8168_mdio_write(tp, 0x15, 0x0098);
+        rtl8168_mdio_write(tp, 0x19, 0x7c0b);
+        rtl8168_mdio_write(tp, 0x15, 0x0099);
+        rtl8168_mdio_write(tp, 0x19, 0x6c0b);
+        rtl8168_mdio_write(tp, 0x15, 0x00eb);
+        rtl8168_mdio_write(tp, 0x19, 0x6c0b);
+        rtl8168_mdio_write(tp, 0x15, 0x00f8);
+        rtl8168_mdio_write(tp, 0x19, 0x6f0b);
+        rtl8168_mdio_write(tp, 0x15, 0x00fe);
+        rtl8168_mdio_write(tp, 0x19, 0x6f0f);
+        rtl8168_mdio_write(tp, 0x15, 0x00db);
+        rtl8168_mdio_write(tp, 0x19, 0x6f09);
+        rtl8168_mdio_write(tp, 0x15, 0x00dc);
+        rtl8168_mdio_write(tp, 0x19, 0xaefd);
+        rtl8168_mdio_write(tp, 0x15, 0x00dd);
+        rtl8168_mdio_write(tp, 0x19, 0x6f0b);
+        rtl8168_mdio_write(tp, 0x15, 0x00de);
+        rtl8168_mdio_write(tp, 0x19, 0xc60b);
+        rtl8168_mdio_write(tp, 0x15, 0x00df);
+        rtl8168_mdio_write(tp, 0x19, 0x00fa);
+        rtl8168_mdio_write(tp, 0x15, 0x00e0);
+        rtl8168_mdio_write(tp, 0x19, 0x30e1);
+        rtl8168_mdio_write(tp, 0x15, 0x020c);
+        rtl8168_mdio_write(tp, 0x19, 0x3224);
+        rtl8168_mdio_write(tp, 0x15, 0x020e);
+        rtl8168_mdio_write(tp, 0x19, 0x9813);
+        rtl8168_mdio_write(tp, 0x15, 0x020f);
+        rtl8168_mdio_write(tp, 0x19, 0x7801);
+        rtl8168_mdio_write(tp, 0x15, 0x0210);
+        rtl8168_mdio_write(tp, 0x19, 0x930f);
+        rtl8168_mdio_write(tp, 0x15, 0x0211);
+        rtl8168_mdio_write(tp, 0x19, 0x9206);
+        rtl8168_mdio_write(tp, 0x15, 0x0212);
+        rtl8168_mdio_write(tp, 0x19, 0x4002);
+        rtl8168_mdio_write(tp, 0x15, 0x0213);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x0214);
+        rtl8168_mdio_write(tp, 0x19, 0x588f);
+        rtl8168_mdio_write(tp, 0x15, 0x0215);
+        rtl8168_mdio_write(tp, 0x19, 0x5520);
+        rtl8168_mdio_write(tp, 0x15, 0x0216);
+        rtl8168_mdio_write(tp, 0x19, 0x3224);
+        rtl8168_mdio_write(tp, 0x15, 0x0217);
+        rtl8168_mdio_write(tp, 0x19, 0x4002);
+        rtl8168_mdio_write(tp, 0x15, 0x0218);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x0219);
+        rtl8168_mdio_write(tp, 0x19, 0x588d);
+        rtl8168_mdio_write(tp, 0x15, 0x021a);
+        rtl8168_mdio_write(tp, 0x19, 0x5540);
+        rtl8168_mdio_write(tp, 0x15, 0x021b);
+        rtl8168_mdio_write(tp, 0x19, 0x9e03);
+        rtl8168_mdio_write(tp, 0x15, 0x021c);
+        rtl8168_mdio_write(tp, 0x19, 0x7c40);
+        rtl8168_mdio_write(tp, 0x15, 0x021d);
+        rtl8168_mdio_write(tp, 0x19, 0x6840);
+        rtl8168_mdio_write(tp, 0x15, 0x021e);
+        rtl8168_mdio_write(tp, 0x19, 0x3224);
+        rtl8168_mdio_write(tp, 0x15, 0x021f);
+        rtl8168_mdio_write(tp, 0x19, 0x4002);
+        rtl8168_mdio_write(tp, 0x15, 0x0220);
+        rtl8168_mdio_write(tp, 0x19, 0x3224);
+        rtl8168_mdio_write(tp, 0x15, 0x0221);
+        rtl8168_mdio_write(tp, 0x19, 0x9e03);
+        rtl8168_mdio_write(tp, 0x15, 0x0222);
+        rtl8168_mdio_write(tp, 0x19, 0x7c40);
+        rtl8168_mdio_write(tp, 0x15, 0x0223);
+        rtl8168_mdio_write(tp, 0x19, 0x6840);
+        rtl8168_mdio_write(tp, 0x15, 0x0224);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x0225);
+        rtl8168_mdio_write(tp, 0x19, 0x3231);
+        rtl8168_mdio_write(tp, 0x15, 0x0000);
+        rtl8168_mdio_write(tp, 0x16, 0x0306);
+        rtl8168_mdio_write(tp, 0x16, 0x0300);
+        rtl8168_mdio_write(tp, 0x1f, 0x0002);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x17, 0x2160);
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1e, 0x0040);
+        rtl8168_mdio_write(tp, 0x18, 0x0004);
+        if (pdev->subsystem_vendor == 0x144d &&
+            pdev->subsystem_device == 0xc0a6) {
+                rtl8168_mdio_write(tp, 0x18, 0x0724);
+                rtl8168_mdio_write(tp, 0x19, 0xfe00);
+                rtl8168_mdio_write(tp, 0x18, 0x0734);
+                rtl8168_mdio_write(tp, 0x19, 0xfd00);
+                rtl8168_mdio_write(tp, 0x18, 0x1824);
+                rtl8168_mdio_write(tp, 0x19, 0xfc00);
+                rtl8168_mdio_write(tp, 0x18, 0x1834);
+                rtl8168_mdio_write(tp, 0x19, 0xfd00);
+        }
+        rtl8168_mdio_write(tp, 0x18, 0x09d4);
+        rtl8168_mdio_write(tp, 0x19, 0x4000);
+        rtl8168_mdio_write(tp, 0x18, 0x09e4);
+        rtl8168_mdio_write(tp, 0x19, 0x0800);
+        rtl8168_mdio_write(tp, 0x18, 0x09f4);
+        rtl8168_mdio_write(tp, 0x19, 0xff00);
+        rtl8168_mdio_write(tp, 0x18, 0x0a04);
+        rtl8168_mdio_write(tp, 0x19, 0x4000);
+        rtl8168_mdio_write(tp, 0x18, 0x0a14);
+        rtl8168_mdio_write(tp, 0x19, 0x0c00);
+        rtl8168_mdio_write(tp, 0x18, 0x0a24);
+        rtl8168_mdio_write(tp, 0x19, 0xff00);
+        rtl8168_mdio_write(tp, 0x18, 0x0a74);
+        rtl8168_mdio_write(tp, 0x19, 0xf600);
+        rtl8168_mdio_write(tp, 0x18, 0x1a24);
+        rtl8168_mdio_write(tp, 0x19, 0x7d00);
+        rtl8168_mdio_write(tp, 0x18, 0x1a64);
+        rtl8168_mdio_write(tp, 0x19, 0x0500);
+        rtl8168_mdio_write(tp, 0x18, 0x1a74);
+        rtl8168_mdio_write(tp, 0x19, 0x9500);
+        rtl8168_mdio_write(tp, 0x18, 0x1a84);
+        rtl8168_mdio_write(tp, 0x19, 0x8000);
+        rtl8168_mdio_write(tp, 0x18, 0x1a94);
+        rtl8168_mdio_write(tp, 0x19, 0x7d00);
+        rtl8168_mdio_write(tp, 0x18, 0x1aa4);
+        rtl8168_mdio_write(tp, 0x19, 0x9600);
+        rtl8168_mdio_write(tp, 0x18, 0x1ac4);
+        rtl8168_mdio_write(tp, 0x19, 0x4000);
+        rtl8168_mdio_write(tp, 0x18, 0x1ad4);
+        rtl8168_mdio_write(tp, 0x19, 0x0800);
+        rtl8168_mdio_write(tp, 0x18, 0x1af4);
+        rtl8168_mdio_write(tp, 0x19, 0xc400);
+        rtl8168_mdio_write(tp, 0x18, 0x1b04);
+        rtl8168_mdio_write(tp, 0x19, 0x4000);
+        rtl8168_mdio_write(tp, 0x18, 0x1b14);
+        rtl8168_mdio_write(tp, 0x19, 0x0800);
+        rtl8168_mdio_write(tp, 0x18, 0x1b24);
+        rtl8168_mdio_write(tp, 0x19, 0xfd00);
+        rtl8168_mdio_write(tp, 0x18, 0x1b34);
+        rtl8168_mdio_write(tp, 0x19, 0x4000);
+        rtl8168_mdio_write(tp, 0x18, 0x1b44);
+        rtl8168_mdio_write(tp, 0x19, 0x0400);
+        rtl8168_mdio_write(tp, 0x18, 0x1b94);
+        rtl8168_mdio_write(tp, 0x19, 0xf100);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x17, 0x2100);
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1e, 0x0040);
+        rtl8168_mdio_write(tp, 0x18, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+        rtl8168_mdio_write(tp, 0x05, 0xfff6);
+        rtl8168_mdio_write(tp, 0x06, 0x0080);
+        rtl8168_mdio_write(tp, 0x05, 0x8000);
+        rtl8168_mdio_write(tp, 0x06, 0x0280);
+        rtl8168_mdio_write(tp, 0x06, 0x48f7);
+        rtl8168_mdio_write(tp, 0x06, 0x00e0);
+        rtl8168_mdio_write(tp, 0x06, 0xfff7);
+        rtl8168_mdio_write(tp, 0x06, 0xa080);
+        rtl8168_mdio_write(tp, 0x06, 0x02ae);
+        rtl8168_mdio_write(tp, 0x06, 0xf602);
+        rtl8168_mdio_write(tp, 0x06, 0x0115);
+        rtl8168_mdio_write(tp, 0x06, 0x0201);
+        rtl8168_mdio_write(tp, 0x06, 0x2202);
+        rtl8168_mdio_write(tp, 0x06, 0x80a0);
+        rtl8168_mdio_write(tp, 0x06, 0x0201);
+        rtl8168_mdio_write(tp, 0x06, 0x3f02);
+        rtl8168_mdio_write(tp, 0x06, 0x0159);
+        rtl8168_mdio_write(tp, 0x06, 0x0280);
+        rtl8168_mdio_write(tp, 0x06, 0xbd02);
+        rtl8168_mdio_write(tp, 0x06, 0x80da);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x88e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b89);
+        rtl8168_mdio_write(tp, 0x06, 0x1e01);
+        rtl8168_mdio_write(tp, 0x06, 0xe18b);
+        rtl8168_mdio_write(tp, 0x06, 0x8a1e);
+        rtl8168_mdio_write(tp, 0x06, 0x01e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8b);
+        rtl8168_mdio_write(tp, 0x06, 0x1e01);
+        rtl8168_mdio_write(tp, 0x06, 0xe18b);
+        rtl8168_mdio_write(tp, 0x06, 0x8c1e);
+        rtl8168_mdio_write(tp, 0x06, 0x01e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
+        rtl8168_mdio_write(tp, 0x06, 0x1e01);
+        rtl8168_mdio_write(tp, 0x06, 0xe18b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e1e);
+        rtl8168_mdio_write(tp, 0x06, 0x01a0);
+        rtl8168_mdio_write(tp, 0x06, 0x00c7);
+        rtl8168_mdio_write(tp, 0x06, 0xaebb);
+        rtl8168_mdio_write(tp, 0x06, 0xd481);
+        rtl8168_mdio_write(tp, 0x06, 0xd2e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b92);
+        rtl8168_mdio_write(tp, 0x06, 0xe58b);
+        rtl8168_mdio_write(tp, 0x06, 0x93d1);
+        rtl8168_mdio_write(tp, 0x06, 0x03bf);
+        rtl8168_mdio_write(tp, 0x06, 0x859e);
+        rtl8168_mdio_write(tp, 0x06, 0x0237);
+        rtl8168_mdio_write(tp, 0x06, 0x23d1);
+        rtl8168_mdio_write(tp, 0x06, 0x02bf);
+        rtl8168_mdio_write(tp, 0x06, 0x85a1);
+        rtl8168_mdio_write(tp, 0x06, 0x0237);
+        rtl8168_mdio_write(tp, 0x06, 0x23ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8608);
+        rtl8168_mdio_write(tp, 0x06, 0x03ee);
+        rtl8168_mdio_write(tp, 0x06, 0x860a);
+        rtl8168_mdio_write(tp, 0x06, 0x60ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8610);
+        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8611);
+        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8abe);
+        rtl8168_mdio_write(tp, 0x06, 0x07ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8abf);
+        rtl8168_mdio_write(tp, 0x06, 0x73ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8a95);
+        rtl8168_mdio_write(tp, 0x06, 0x02bf);
+        rtl8168_mdio_write(tp, 0x06, 0x8b88);
+        rtl8168_mdio_write(tp, 0x06, 0xec00);
+        rtl8168_mdio_write(tp, 0x06, 0x19a9);
+        rtl8168_mdio_write(tp, 0x06, 0x8b90);
+        rtl8168_mdio_write(tp, 0x06, 0xf9ee);
+        rtl8168_mdio_write(tp, 0x06, 0xfff6);
+        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+        rtl8168_mdio_write(tp, 0x06, 0xfff7);
+        rtl8168_mdio_write(tp, 0x06, 0xfed1);
+        rtl8168_mdio_write(tp, 0x06, 0x00bf);
+        rtl8168_mdio_write(tp, 0x06, 0x8595);
+        rtl8168_mdio_write(tp, 0x06, 0x0237);
+        rtl8168_mdio_write(tp, 0x06, 0x23d1);
+        rtl8168_mdio_write(tp, 0x06, 0x01bf);
+        rtl8168_mdio_write(tp, 0x06, 0x8598);
+        rtl8168_mdio_write(tp, 0x06, 0x0237);
+        rtl8168_mdio_write(tp, 0x06, 0x2304);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8a);
+        rtl8168_mdio_write(tp, 0x06, 0xad20);
+        rtl8168_mdio_write(tp, 0x06, 0x14ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8a);
+        rtl8168_mdio_write(tp, 0x06, 0x0002);
+        rtl8168_mdio_write(tp, 0x06, 0x1f9a);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e4);
+        rtl8168_mdio_write(tp, 0x06, 0x26e1);
+        rtl8168_mdio_write(tp, 0x06, 0xe427);
+        rtl8168_mdio_write(tp, 0x06, 0xeee4);
+        rtl8168_mdio_write(tp, 0x06, 0x2623);
+        rtl8168_mdio_write(tp, 0x06, 0xe5e4);
+        rtl8168_mdio_write(tp, 0x06, 0x27fc);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8dad);
+        rtl8168_mdio_write(tp, 0x06, 0x2014);
+        rtl8168_mdio_write(tp, 0x06, 0xee8b);
+        rtl8168_mdio_write(tp, 0x06, 0x8d00);
+        rtl8168_mdio_write(tp, 0x06, 0xe08a);
+        rtl8168_mdio_write(tp, 0x06, 0x5a78);
+        rtl8168_mdio_write(tp, 0x06, 0x039e);
+        rtl8168_mdio_write(tp, 0x06, 0x0902);
+        rtl8168_mdio_write(tp, 0x06, 0x05db);
+        rtl8168_mdio_write(tp, 0x06, 0x0282);
+        rtl8168_mdio_write(tp, 0x06, 0x7b02);
+        rtl8168_mdio_write(tp, 0x06, 0x3231);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xad20);
+        rtl8168_mdio_write(tp, 0x06, 0x1df6);
+        rtl8168_mdio_write(tp, 0x06, 0x20e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0x0281);
+        rtl8168_mdio_write(tp, 0x06, 0x5c02);
+        rtl8168_mdio_write(tp, 0x06, 0x2bcb);
+        rtl8168_mdio_write(tp, 0x06, 0x022d);
+        rtl8168_mdio_write(tp, 0x06, 0x2902);
+        rtl8168_mdio_write(tp, 0x06, 0x03b4);
+        rtl8168_mdio_write(tp, 0x06, 0x0285);
+        rtl8168_mdio_write(tp, 0x06, 0x6402);
+        rtl8168_mdio_write(tp, 0x06, 0x2eca);
+        rtl8168_mdio_write(tp, 0x06, 0x0284);
+        rtl8168_mdio_write(tp, 0x06, 0xcd02);
+        rtl8168_mdio_write(tp, 0x06, 0x046f);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ead);
+        rtl8168_mdio_write(tp, 0x06, 0x210b);
+        rtl8168_mdio_write(tp, 0x06, 0xf621);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e02);
+        rtl8168_mdio_write(tp, 0x06, 0x8520);
+        rtl8168_mdio_write(tp, 0x06, 0x021b);
+        rtl8168_mdio_write(tp, 0x06, 0xe8e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xad22);
+        rtl8168_mdio_write(tp, 0x06, 0x05f6);
+        rtl8168_mdio_write(tp, 0x06, 0x22e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ead);
+        rtl8168_mdio_write(tp, 0x06, 0x2308);
+        rtl8168_mdio_write(tp, 0x06, 0xf623);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e02);
+        rtl8168_mdio_write(tp, 0x06, 0x311c);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ead);
+        rtl8168_mdio_write(tp, 0x06, 0x2405);
+        rtl8168_mdio_write(tp, 0x06, 0xf624);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ee0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xad25);
+        rtl8168_mdio_write(tp, 0x06, 0x05f6);
+        rtl8168_mdio_write(tp, 0x06, 0x25e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ead);
+        rtl8168_mdio_write(tp, 0x06, 0x2608);
+        rtl8168_mdio_write(tp, 0x06, 0xf626);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e02);
+        rtl8168_mdio_write(tp, 0x06, 0x2df5);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ead);
+        rtl8168_mdio_write(tp, 0x06, 0x2705);
+        rtl8168_mdio_write(tp, 0x06, 0xf627);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e02);
+        rtl8168_mdio_write(tp, 0x06, 0x037a);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x06, 0xfaef);
+        rtl8168_mdio_write(tp, 0x06, 0x69e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b87);
+        rtl8168_mdio_write(tp, 0x06, 0xad20);
+        rtl8168_mdio_write(tp, 0x06, 0x65d2);
+        rtl8168_mdio_write(tp, 0x06, 0x00bf);
+        rtl8168_mdio_write(tp, 0x06, 0x2fe9);
+        rtl8168_mdio_write(tp, 0x06, 0x0236);
+        rtl8168_mdio_write(tp, 0x06, 0xf61e);
+        rtl8168_mdio_write(tp, 0x06, 0x21bf);
+        rtl8168_mdio_write(tp, 0x06, 0x2ff5);
+        rtl8168_mdio_write(tp, 0x06, 0x0236);
+        rtl8168_mdio_write(tp, 0x06, 0xf60c);
+        rtl8168_mdio_write(tp, 0x06, 0x111e);
+        rtl8168_mdio_write(tp, 0x06, 0x21bf);
+        rtl8168_mdio_write(tp, 0x06, 0x2ff8);
+        rtl8168_mdio_write(tp, 0x06, 0x0236);
+        rtl8168_mdio_write(tp, 0x06, 0xf60c);
+        rtl8168_mdio_write(tp, 0x06, 0x121e);
+        rtl8168_mdio_write(tp, 0x06, 0x21bf);
+        rtl8168_mdio_write(tp, 0x06, 0x2ffb);
+        rtl8168_mdio_write(tp, 0x06, 0x0236);
+        rtl8168_mdio_write(tp, 0x06, 0xf60c);
+        rtl8168_mdio_write(tp, 0x06, 0x131e);
+        rtl8168_mdio_write(tp, 0x06, 0x21bf);
+        rtl8168_mdio_write(tp, 0x06, 0x1f97);
+        rtl8168_mdio_write(tp, 0x06, 0x0236);
+        rtl8168_mdio_write(tp, 0x06, 0xf60c);
+        rtl8168_mdio_write(tp, 0x06, 0x141e);
+        rtl8168_mdio_write(tp, 0x06, 0x21bf);
+        rtl8168_mdio_write(tp, 0x06, 0x859b);
+        rtl8168_mdio_write(tp, 0x06, 0x0236);
+        rtl8168_mdio_write(tp, 0x06, 0xf60c);
+        rtl8168_mdio_write(tp, 0x06, 0x161e);
+        rtl8168_mdio_write(tp, 0x06, 0x21e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8a8c);
+        rtl8168_mdio_write(tp, 0x06, 0x1f02);
+        rtl8168_mdio_write(tp, 0x06, 0x9e22);
+        rtl8168_mdio_write(tp, 0x06, 0xe68a);
+        rtl8168_mdio_write(tp, 0x06, 0x8cad);
+        rtl8168_mdio_write(tp, 0x06, 0x3114);
+        rtl8168_mdio_write(tp, 0x06, 0xad30);
+        rtl8168_mdio_write(tp, 0x06, 0x11ef);
+        rtl8168_mdio_write(tp, 0x06, 0x0258);
+        rtl8168_mdio_write(tp, 0x06, 0x0c9e);
+        rtl8168_mdio_write(tp, 0x06, 0x07ad);
+        rtl8168_mdio_write(tp, 0x06, 0x3608);
+        rtl8168_mdio_write(tp, 0x06, 0x5a30);
+        rtl8168_mdio_write(tp, 0x06, 0x9f04);
+        rtl8168_mdio_write(tp, 0x06, 0xd101);
+        rtl8168_mdio_write(tp, 0x06, 0xae02);
+        rtl8168_mdio_write(tp, 0x06, 0xd100);
+        rtl8168_mdio_write(tp, 0x06, 0xbf2f);
+        rtl8168_mdio_write(tp, 0x06, 0xf202);
+        rtl8168_mdio_write(tp, 0x06, 0x3723);
+        rtl8168_mdio_write(tp, 0x06, 0xef96);
+        rtl8168_mdio_write(tp, 0x06, 0xfefd);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x06, 0xface);
+        rtl8168_mdio_write(tp, 0x06, 0xfaef);
+        rtl8168_mdio_write(tp, 0x06, 0x69fa);
+        rtl8168_mdio_write(tp, 0x06, 0xd401);
+        rtl8168_mdio_write(tp, 0x06, 0x55b4);
+        rtl8168_mdio_write(tp, 0x06, 0xfebf);
+        rtl8168_mdio_write(tp, 0x06, 0x85a7);
+        rtl8168_mdio_write(tp, 0x06, 0x0236);
+        rtl8168_mdio_write(tp, 0x06, 0xf6ac);
+        rtl8168_mdio_write(tp, 0x06, 0x280b);
+        rtl8168_mdio_write(tp, 0x06, 0xbf85);
+        rtl8168_mdio_write(tp, 0x06, 0xa402);
+        rtl8168_mdio_write(tp, 0x06, 0x36f6);
+        rtl8168_mdio_write(tp, 0x06, 0xac28);
+        rtl8168_mdio_write(tp, 0x06, 0x49ae);
+        rtl8168_mdio_write(tp, 0x06, 0x64bf);
+        rtl8168_mdio_write(tp, 0x06, 0x85a4);
+        rtl8168_mdio_write(tp, 0x06, 0x0236);
+        rtl8168_mdio_write(tp, 0x06, 0xf6ac);
+        rtl8168_mdio_write(tp, 0x06, 0x285b);
+        rtl8168_mdio_write(tp, 0x06, 0xd000);
+        rtl8168_mdio_write(tp, 0x06, 0x0282);
+        rtl8168_mdio_write(tp, 0x06, 0x60ac);
+        rtl8168_mdio_write(tp, 0x06, 0x2105);
+        rtl8168_mdio_write(tp, 0x06, 0xac22);
+        rtl8168_mdio_write(tp, 0x06, 0x02ae);
+        rtl8168_mdio_write(tp, 0x06, 0x4ebf);
+        rtl8168_mdio_write(tp, 0x06, 0xe0c4);
+        rtl8168_mdio_write(tp, 0x06, 0xbe86);
+        rtl8168_mdio_write(tp, 0x06, 0x14d2);
+        rtl8168_mdio_write(tp, 0x06, 0x04d8);
+        rtl8168_mdio_write(tp, 0x06, 0x19d9);
+        rtl8168_mdio_write(tp, 0x06, 0x1907);
+        rtl8168_mdio_write(tp, 0x06, 0xdc19);
+        rtl8168_mdio_write(tp, 0x06, 0xdd19);
+        rtl8168_mdio_write(tp, 0x06, 0x0789);
+        rtl8168_mdio_write(tp, 0x06, 0x89ef);
+        rtl8168_mdio_write(tp, 0x06, 0x645e);
+        rtl8168_mdio_write(tp, 0x06, 0x07ff);
+        rtl8168_mdio_write(tp, 0x06, 0x0d65);
+        rtl8168_mdio_write(tp, 0x06, 0x5cf8);
+        rtl8168_mdio_write(tp, 0x06, 0x001e);
+        rtl8168_mdio_write(tp, 0x06, 0x46dc);
+        rtl8168_mdio_write(tp, 0x06, 0x19dd);
+        rtl8168_mdio_write(tp, 0x06, 0x19b2);
+        rtl8168_mdio_write(tp, 0x06, 0xe2d4);
+        rtl8168_mdio_write(tp, 0x06, 0x0001);
+        rtl8168_mdio_write(tp, 0x06, 0xbf85);
+        rtl8168_mdio_write(tp, 0x06, 0xa402);
+        rtl8168_mdio_write(tp, 0x06, 0x3723);
+        rtl8168_mdio_write(tp, 0x06, 0xae1d);
+        rtl8168_mdio_write(tp, 0x06, 0xbee0);
+        rtl8168_mdio_write(tp, 0x06, 0xc4bf);
+        rtl8168_mdio_write(tp, 0x06, 0x8614);
+        rtl8168_mdio_write(tp, 0x06, 0xd204);
+        rtl8168_mdio_write(tp, 0x06, 0xd819);
+        rtl8168_mdio_write(tp, 0x06, 0xd919);
+        rtl8168_mdio_write(tp, 0x06, 0x07dc);
+        rtl8168_mdio_write(tp, 0x06, 0x19dd);
+        rtl8168_mdio_write(tp, 0x06, 0x1907);
+        rtl8168_mdio_write(tp, 0x06, 0xb2f4);
+        rtl8168_mdio_write(tp, 0x06, 0xd400);
+        rtl8168_mdio_write(tp, 0x06, 0x00bf);
+        rtl8168_mdio_write(tp, 0x06, 0x85a4);
+        rtl8168_mdio_write(tp, 0x06, 0x0237);
+        rtl8168_mdio_write(tp, 0x06, 0x23fe);
+        rtl8168_mdio_write(tp, 0x06, 0xef96);
+        rtl8168_mdio_write(tp, 0x06, 0xfec6);
+        rtl8168_mdio_write(tp, 0x06, 0xfefd);
+        rtl8168_mdio_write(tp, 0x06, 0xfc05);
+        rtl8168_mdio_write(tp, 0x06, 0xf9e2);
+        rtl8168_mdio_write(tp, 0x06, 0xe0ea);
+        rtl8168_mdio_write(tp, 0x06, 0xe3e0);
+        rtl8168_mdio_write(tp, 0x06, 0xeb5a);
+        rtl8168_mdio_write(tp, 0x06, 0x070c);
+        rtl8168_mdio_write(tp, 0x06, 0x031e);
+        rtl8168_mdio_write(tp, 0x06, 0x20e6);
+        rtl8168_mdio_write(tp, 0x06, 0xe0ea);
+        rtl8168_mdio_write(tp, 0x06, 0xe7e0);
+        rtl8168_mdio_write(tp, 0x06, 0xebe0);
+        rtl8168_mdio_write(tp, 0x06, 0xe0fc);
+        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+        rtl8168_mdio_write(tp, 0x06, 0xfdfd);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xf9e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b81);
+        rtl8168_mdio_write(tp, 0x06, 0xac26);
+        rtl8168_mdio_write(tp, 0x06, 0x1ae0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b81);
+        rtl8168_mdio_write(tp, 0x06, 0xac21);
+        rtl8168_mdio_write(tp, 0x06, 0x14e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b85);
+        rtl8168_mdio_write(tp, 0x06, 0xac20);
+        rtl8168_mdio_write(tp, 0x06, 0x0ee0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b85);
+        rtl8168_mdio_write(tp, 0x06, 0xac23);
+        rtl8168_mdio_write(tp, 0x06, 0x08e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b87);
+        rtl8168_mdio_write(tp, 0x06, 0xac24);
+        rtl8168_mdio_write(tp, 0x06, 0x02ae);
+        rtl8168_mdio_write(tp, 0x06, 0x3802);
+        rtl8168_mdio_write(tp, 0x06, 0x1ab5);
+        rtl8168_mdio_write(tp, 0x06, 0xeee4);
+        rtl8168_mdio_write(tp, 0x06, 0x1c04);
+        rtl8168_mdio_write(tp, 0x06, 0xeee4);
+        rtl8168_mdio_write(tp, 0x06, 0x1d04);
+        rtl8168_mdio_write(tp, 0x06, 0xe2e0);
+        rtl8168_mdio_write(tp, 0x06, 0x7ce3);
+        rtl8168_mdio_write(tp, 0x06, 0xe07d);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+        rtl8168_mdio_write(tp, 0x06, 0x38e1);
+        rtl8168_mdio_write(tp, 0x06, 0xe039);
+        rtl8168_mdio_write(tp, 0x06, 0xad2e);
+        rtl8168_mdio_write(tp, 0x06, 0x1bad);
+        rtl8168_mdio_write(tp, 0x06, 0x390d);
+        rtl8168_mdio_write(tp, 0x06, 0xd101);
+        rtl8168_mdio_write(tp, 0x06, 0xbf21);
+        rtl8168_mdio_write(tp, 0x06, 0xd502);
+        rtl8168_mdio_write(tp, 0x06, 0x3723);
+        rtl8168_mdio_write(tp, 0x06, 0x0282);
+        rtl8168_mdio_write(tp, 0x06, 0xd8ae);
+        rtl8168_mdio_write(tp, 0x06, 0x0bac);
+        rtl8168_mdio_write(tp, 0x06, 0x3802);
+        rtl8168_mdio_write(tp, 0x06, 0xae06);
+        rtl8168_mdio_write(tp, 0x06, 0x0283);
+        rtl8168_mdio_write(tp, 0x06, 0x1802);
+        rtl8168_mdio_write(tp, 0x06, 0x8360);
+        rtl8168_mdio_write(tp, 0x06, 0x021a);
+        rtl8168_mdio_write(tp, 0x06, 0xc6fd);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8af4);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x81ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2605);
+        rtl8168_mdio_write(tp, 0x06, 0x0222);
+        rtl8168_mdio_write(tp, 0x06, 0xa4f7);
+        rtl8168_mdio_write(tp, 0x06, 0x28e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b81);
+        rtl8168_mdio_write(tp, 0x06, 0xad21);
+        rtl8168_mdio_write(tp, 0x06, 0x0502);
+        rtl8168_mdio_write(tp, 0x06, 0x23a9);
+        rtl8168_mdio_write(tp, 0x06, 0xf729);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x85ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2005);
+        rtl8168_mdio_write(tp, 0x06, 0x0214);
+        rtl8168_mdio_write(tp, 0x06, 0xabf7);
+        rtl8168_mdio_write(tp, 0x06, 0x2ae0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b85);
+        rtl8168_mdio_write(tp, 0x06, 0xad23);
+        rtl8168_mdio_write(tp, 0x06, 0x0502);
+        rtl8168_mdio_write(tp, 0x06, 0x12e7);
+        rtl8168_mdio_write(tp, 0x06, 0xf72b);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x87ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2405);
+        rtl8168_mdio_write(tp, 0x06, 0x0283);
+        rtl8168_mdio_write(tp, 0x06, 0xbcf7);
+        rtl8168_mdio_write(tp, 0x06, 0x2ce5);
+        rtl8168_mdio_write(tp, 0x06, 0x8af4);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b81);
+        rtl8168_mdio_write(tp, 0x06, 0xad26);
+        rtl8168_mdio_write(tp, 0x06, 0x0302);
+        rtl8168_mdio_write(tp, 0x06, 0x21e5);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x81ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2109);
+        rtl8168_mdio_write(tp, 0x06, 0xe08a);
+        rtl8168_mdio_write(tp, 0x06, 0xf4ac);
+        rtl8168_mdio_write(tp, 0x06, 0x2003);
+        rtl8168_mdio_write(tp, 0x06, 0x0223);
+        rtl8168_mdio_write(tp, 0x06, 0x98e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b85);
+        rtl8168_mdio_write(tp, 0x06, 0xad20);
+        rtl8168_mdio_write(tp, 0x06, 0x09e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8af4);
+        rtl8168_mdio_write(tp, 0x06, 0xac21);
+        rtl8168_mdio_write(tp, 0x06, 0x0302);
+        rtl8168_mdio_write(tp, 0x06, 0x13fb);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x85ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2309);
+        rtl8168_mdio_write(tp, 0x06, 0xe08a);
+        rtl8168_mdio_write(tp, 0x06, 0xf4ac);
+        rtl8168_mdio_write(tp, 0x06, 0x2203);
+        rtl8168_mdio_write(tp, 0x06, 0x0212);
+        rtl8168_mdio_write(tp, 0x06, 0xfae0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b87);
+        rtl8168_mdio_write(tp, 0x06, 0xad24);
+        rtl8168_mdio_write(tp, 0x06, 0x09e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8af4);
+        rtl8168_mdio_write(tp, 0x06, 0xac23);
+        rtl8168_mdio_write(tp, 0x06, 0x0302);
+        rtl8168_mdio_write(tp, 0x06, 0x83c1);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8af4);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x81ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2608);
+        rtl8168_mdio_write(tp, 0x06, 0xe083);
+        rtl8168_mdio_write(tp, 0x06, 0xd2ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2502);
+        rtl8168_mdio_write(tp, 0x06, 0xf628);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x81ad);
+        rtl8168_mdio_write(tp, 0x06, 0x210a);
+        rtl8168_mdio_write(tp, 0x06, 0xe084);
+        rtl8168_mdio_write(tp, 0x06, 0x0af6);
+        rtl8168_mdio_write(tp, 0x06, 0x27a0);
+        rtl8168_mdio_write(tp, 0x06, 0x0502);
+        rtl8168_mdio_write(tp, 0x06, 0xf629);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x85ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2008);
+        rtl8168_mdio_write(tp, 0x06, 0xe08a);
+        rtl8168_mdio_write(tp, 0x06, 0xe8ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2102);
+        rtl8168_mdio_write(tp, 0x06, 0xf62a);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x85ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2308);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x20a0);
+        rtl8168_mdio_write(tp, 0x06, 0x0302);
+        rtl8168_mdio_write(tp, 0x06, 0xf62b);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x87ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2408);
+        rtl8168_mdio_write(tp, 0x06, 0xe086);
+        rtl8168_mdio_write(tp, 0x06, 0x02a0);
+        rtl8168_mdio_write(tp, 0x06, 0x0302);
+        rtl8168_mdio_write(tp, 0x06, 0xf62c);
+        rtl8168_mdio_write(tp, 0x06, 0xe58a);
+        rtl8168_mdio_write(tp, 0x06, 0xf4a1);
+        rtl8168_mdio_write(tp, 0x06, 0x0008);
+        rtl8168_mdio_write(tp, 0x06, 0xd100);
+        rtl8168_mdio_write(tp, 0x06, 0xbf21);
+        rtl8168_mdio_write(tp, 0x06, 0xd502);
+        rtl8168_mdio_write(tp, 0x06, 0x3723);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xee86);
+        rtl8168_mdio_write(tp, 0x06, 0x0200);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x87ad);
+        rtl8168_mdio_write(tp, 0x06, 0x241e);
+        rtl8168_mdio_write(tp, 0x06, 0xe086);
+        rtl8168_mdio_write(tp, 0x06, 0x02a0);
+        rtl8168_mdio_write(tp, 0x06, 0x0005);
+        rtl8168_mdio_write(tp, 0x06, 0x0283);
+        rtl8168_mdio_write(tp, 0x06, 0xe8ae);
+        rtl8168_mdio_write(tp, 0x06, 0xf5a0);
+        rtl8168_mdio_write(tp, 0x06, 0x0105);
+        rtl8168_mdio_write(tp, 0x06, 0x0283);
+        rtl8168_mdio_write(tp, 0x06, 0xf8ae);
+        rtl8168_mdio_write(tp, 0x06, 0x0ba0);
+        rtl8168_mdio_write(tp, 0x06, 0x0205);
+        rtl8168_mdio_write(tp, 0x06, 0x0284);
+        rtl8168_mdio_write(tp, 0x06, 0x14ae);
+        rtl8168_mdio_write(tp, 0x06, 0x03a0);
+        rtl8168_mdio_write(tp, 0x06, 0x0300);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8fa);
+        rtl8168_mdio_write(tp, 0x06, 0xef69);
+        rtl8168_mdio_write(tp, 0x06, 0x0284);
+        rtl8168_mdio_write(tp, 0x06, 0x2bee);
+        rtl8168_mdio_write(tp, 0x06, 0x8602);
+        rtl8168_mdio_write(tp, 0x06, 0x01ef);
+        rtl8168_mdio_write(tp, 0x06, 0x96fe);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8609);
+        rtl8168_mdio_write(tp, 0x06, 0x0002);
+        rtl8168_mdio_write(tp, 0x06, 0x8461);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xae10);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8608);
+        rtl8168_mdio_write(tp, 0x06, 0xe186);
+        rtl8168_mdio_write(tp, 0x06, 0x091f);
+        rtl8168_mdio_write(tp, 0x06, 0x019e);
+        rtl8168_mdio_write(tp, 0x06, 0x0611);
+        rtl8168_mdio_write(tp, 0x06, 0xe586);
+        rtl8168_mdio_write(tp, 0x06, 0x09ae);
+        rtl8168_mdio_write(tp, 0x06, 0x04ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8602);
+        rtl8168_mdio_write(tp, 0x06, 0x01fc);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xf9fa);
+        rtl8168_mdio_write(tp, 0x06, 0xef69);
+        rtl8168_mdio_write(tp, 0x06, 0xfbbf);
+        rtl8168_mdio_write(tp, 0x06, 0x8604);
+        rtl8168_mdio_write(tp, 0x06, 0xef79);
+        rtl8168_mdio_write(tp, 0x06, 0xd200);
+        rtl8168_mdio_write(tp, 0x06, 0xd400);
+        rtl8168_mdio_write(tp, 0x06, 0x221e);
+        rtl8168_mdio_write(tp, 0x06, 0x02bf);
+        rtl8168_mdio_write(tp, 0x06, 0x2fec);
+        rtl8168_mdio_write(tp, 0x06, 0x0237);
+        rtl8168_mdio_write(tp, 0x06, 0x23bf);
+        rtl8168_mdio_write(tp, 0x06, 0x13f2);
+        rtl8168_mdio_write(tp, 0x06, 0x0236);
+        rtl8168_mdio_write(tp, 0x06, 0xf60d);
+        rtl8168_mdio_write(tp, 0x06, 0x4559);
+        rtl8168_mdio_write(tp, 0x06, 0x1fef);
+        rtl8168_mdio_write(tp, 0x06, 0x97dd);
+        rtl8168_mdio_write(tp, 0x06, 0xd308);
+        rtl8168_mdio_write(tp, 0x06, 0x1a93);
+        rtl8168_mdio_write(tp, 0x06, 0xdd12);
+        rtl8168_mdio_write(tp, 0x06, 0x17a2);
+        rtl8168_mdio_write(tp, 0x06, 0x04de);
+        rtl8168_mdio_write(tp, 0x06, 0xffef);
+        rtl8168_mdio_write(tp, 0x06, 0x96fe);
+        rtl8168_mdio_write(tp, 0x06, 0xfdfc);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xf9fa);
+        rtl8168_mdio_write(tp, 0x06, 0xef69);
+        rtl8168_mdio_write(tp, 0x06, 0xfbee);
+        rtl8168_mdio_write(tp, 0x06, 0x8602);
+        rtl8168_mdio_write(tp, 0x06, 0x03d5);
+        rtl8168_mdio_write(tp, 0x06, 0x0080);
+        rtl8168_mdio_write(tp, 0x06, 0xbf86);
+        rtl8168_mdio_write(tp, 0x06, 0x04ef);
+        rtl8168_mdio_write(tp, 0x06, 0x79ef);
+        rtl8168_mdio_write(tp, 0x06, 0x45bf);
+        rtl8168_mdio_write(tp, 0x06, 0x2fec);
+        rtl8168_mdio_write(tp, 0x06, 0x0237);
+        rtl8168_mdio_write(tp, 0x06, 0x23bf);
+        rtl8168_mdio_write(tp, 0x06, 0x13f2);
+        rtl8168_mdio_write(tp, 0x06, 0x0236);
+        rtl8168_mdio_write(tp, 0x06, 0xf6ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2702);
+        rtl8168_mdio_write(tp, 0x06, 0x78ff);
+        rtl8168_mdio_write(tp, 0x06, 0xe186);
+        rtl8168_mdio_write(tp, 0x06, 0x0a1b);
+        rtl8168_mdio_write(tp, 0x06, 0x01aa);
+        rtl8168_mdio_write(tp, 0x06, 0x2eef);
+        rtl8168_mdio_write(tp, 0x06, 0x97d9);
+        rtl8168_mdio_write(tp, 0x06, 0x7900);
+        rtl8168_mdio_write(tp, 0x06, 0x9e2b);
+        rtl8168_mdio_write(tp, 0x06, 0x81dd);
+        rtl8168_mdio_write(tp, 0x06, 0xbf85);
+        rtl8168_mdio_write(tp, 0x06, 0xad02);
+        rtl8168_mdio_write(tp, 0x06, 0x3723);
+        rtl8168_mdio_write(tp, 0x06, 0xd101);
+        rtl8168_mdio_write(tp, 0x06, 0xef02);
+        rtl8168_mdio_write(tp, 0x06, 0x100c);
+        rtl8168_mdio_write(tp, 0x06, 0x11b0);
+        rtl8168_mdio_write(tp, 0x06, 0xfc0d);
+        rtl8168_mdio_write(tp, 0x06, 0x11bf);
+        rtl8168_mdio_write(tp, 0x06, 0x85aa);
+        rtl8168_mdio_write(tp, 0x06, 0x0237);
+        rtl8168_mdio_write(tp, 0x06, 0x23d1);
+        rtl8168_mdio_write(tp, 0x06, 0x00bf);
+        rtl8168_mdio_write(tp, 0x06, 0x85aa);
+        rtl8168_mdio_write(tp, 0x06, 0x0237);
+        rtl8168_mdio_write(tp, 0x06, 0x23ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8602);
+        rtl8168_mdio_write(tp, 0x06, 0x02ae);
+        rtl8168_mdio_write(tp, 0x06, 0x0413);
+        rtl8168_mdio_write(tp, 0x06, 0xa38b);
+        rtl8168_mdio_write(tp, 0x06, 0xb4d3);
+        rtl8168_mdio_write(tp, 0x06, 0x8012);
+        rtl8168_mdio_write(tp, 0x06, 0x17a2);
+        rtl8168_mdio_write(tp, 0x06, 0x04ad);
+        rtl8168_mdio_write(tp, 0x06, 0xffef);
+        rtl8168_mdio_write(tp, 0x06, 0x96fe);
+        rtl8168_mdio_write(tp, 0x06, 0xfdfc);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xf9e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b85);
+        rtl8168_mdio_write(tp, 0x06, 0xad25);
+        rtl8168_mdio_write(tp, 0x06, 0x48e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8a96);
+        rtl8168_mdio_write(tp, 0x06, 0xe18a);
+        rtl8168_mdio_write(tp, 0x06, 0x977c);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x9e35);
+        rtl8168_mdio_write(tp, 0x06, 0xee8a);
+        rtl8168_mdio_write(tp, 0x06, 0x9600);
+        rtl8168_mdio_write(tp, 0x06, 0xee8a);
+        rtl8168_mdio_write(tp, 0x06, 0x9700);
+        rtl8168_mdio_write(tp, 0x06, 0xe08a);
+        rtl8168_mdio_write(tp, 0x06, 0xbee1);
+        rtl8168_mdio_write(tp, 0x06, 0x8abf);
+        rtl8168_mdio_write(tp, 0x06, 0xe286);
+        rtl8168_mdio_write(tp, 0x06, 0x10e3);
+        rtl8168_mdio_write(tp, 0x06, 0x8611);
+        rtl8168_mdio_write(tp, 0x06, 0x0236);
+        rtl8168_mdio_write(tp, 0x06, 0x1aad);
+        rtl8168_mdio_write(tp, 0x06, 0x2012);
+        rtl8168_mdio_write(tp, 0x06, 0xee8a);
+        rtl8168_mdio_write(tp, 0x06, 0x9603);
+        rtl8168_mdio_write(tp, 0x06, 0xee8a);
+        rtl8168_mdio_write(tp, 0x06, 0x97b7);
+        rtl8168_mdio_write(tp, 0x06, 0xee86);
+        rtl8168_mdio_write(tp, 0x06, 0x1000);
+        rtl8168_mdio_write(tp, 0x06, 0xee86);
+        rtl8168_mdio_write(tp, 0x06, 0x1100);
+        rtl8168_mdio_write(tp, 0x06, 0xae11);
+        rtl8168_mdio_write(tp, 0x06, 0x15e6);
+        rtl8168_mdio_write(tp, 0x06, 0x8610);
+        rtl8168_mdio_write(tp, 0x06, 0xe786);
+        rtl8168_mdio_write(tp, 0x06, 0x11ae);
+        rtl8168_mdio_write(tp, 0x06, 0x08ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8610);
+        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8611);
+        rtl8168_mdio_write(tp, 0x06, 0x00fd);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8fa);
+        rtl8168_mdio_write(tp, 0x06, 0xef69);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+        rtl8168_mdio_write(tp, 0x06, 0x00e1);
+        rtl8168_mdio_write(tp, 0x06, 0xe001);
+        rtl8168_mdio_write(tp, 0x06, 0xad27);
+        rtl8168_mdio_write(tp, 0x06, 0x32e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b40);
+        rtl8168_mdio_write(tp, 0x06, 0xf720);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x40bf);
+        rtl8168_mdio_write(tp, 0x06, 0x31f5);
+        rtl8168_mdio_write(tp, 0x06, 0x0236);
+        rtl8168_mdio_write(tp, 0x06, 0xf6ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2821);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+        rtl8168_mdio_write(tp, 0x06, 0x20e1);
+        rtl8168_mdio_write(tp, 0x06, 0xe021);
+        rtl8168_mdio_write(tp, 0x06, 0xad20);
+        rtl8168_mdio_write(tp, 0x06, 0x18e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b40);
+        rtl8168_mdio_write(tp, 0x06, 0xf620);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x40ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8b3b);
+        rtl8168_mdio_write(tp, 0x06, 0xffe0);
+        rtl8168_mdio_write(tp, 0x06, 0x8a8a);
+        rtl8168_mdio_write(tp, 0x06, 0xe18a);
+        rtl8168_mdio_write(tp, 0x06, 0x8be4);
+        rtl8168_mdio_write(tp, 0x06, 0xe000);
+        rtl8168_mdio_write(tp, 0x06, 0xe5e0);
+        rtl8168_mdio_write(tp, 0x06, 0x01ef);
+        rtl8168_mdio_write(tp, 0x06, 0x96fe);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8fa);
+        rtl8168_mdio_write(tp, 0x06, 0xef69);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x80ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2722);
+        rtl8168_mdio_write(tp, 0x06, 0xbf44);
+        rtl8168_mdio_write(tp, 0x06, 0xfc02);
+        rtl8168_mdio_write(tp, 0x06, 0x36f6);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x441f);
+        rtl8168_mdio_write(tp, 0x06, 0x019e);
+        rtl8168_mdio_write(tp, 0x06, 0x15e5);
+        rtl8168_mdio_write(tp, 0x06, 0x8b44);
+        rtl8168_mdio_write(tp, 0x06, 0xad29);
+        rtl8168_mdio_write(tp, 0x06, 0x07ac);
+        rtl8168_mdio_write(tp, 0x06, 0x2804);
+        rtl8168_mdio_write(tp, 0x06, 0xd101);
+        rtl8168_mdio_write(tp, 0x06, 0xae02);
+        rtl8168_mdio_write(tp, 0x06, 0xd100);
+        rtl8168_mdio_write(tp, 0x06, 0xbf85);
+        rtl8168_mdio_write(tp, 0x06, 0xb002);
+        rtl8168_mdio_write(tp, 0x06, 0x3723);
+        rtl8168_mdio_write(tp, 0x06, 0xef96);
+        rtl8168_mdio_write(tp, 0x06, 0xfefc);
+        rtl8168_mdio_write(tp, 0x06, 0x0400);
+        rtl8168_mdio_write(tp, 0x06, 0xe140);
+        rtl8168_mdio_write(tp, 0x06, 0x77e1);
+        rtl8168_mdio_write(tp, 0x06, 0x40dd);
+        rtl8168_mdio_write(tp, 0x06, 0xe022);
+        rtl8168_mdio_write(tp, 0x06, 0x32e1);
+        rtl8168_mdio_write(tp, 0x06, 0x5074);
+        rtl8168_mdio_write(tp, 0x06, 0xe144);
+        rtl8168_mdio_write(tp, 0x06, 0xffe0);
+        rtl8168_mdio_write(tp, 0x06, 0xdaff);
+        rtl8168_mdio_write(tp, 0x06, 0xe0c0);
+        rtl8168_mdio_write(tp, 0x06, 0x52e0);
+        rtl8168_mdio_write(tp, 0x06, 0xeed9);
+        rtl8168_mdio_write(tp, 0x06, 0xe04c);
+        rtl8168_mdio_write(tp, 0x06, 0xbbe0);
+        rtl8168_mdio_write(tp, 0x06, 0x2a00);
+        rtl8168_mdio_write(tp, 0x05, 0xe142);
+        gphy_val = rtl8168_mdio_read(tp, 0x06);
+        gphy_val |= BIT_0;
+        rtl8168_mdio_write(tp, 0x06, gphy_val);
+        rtl8168_mdio_write(tp, 0x05, 0xe140);
+        gphy_val = rtl8168_mdio_read(tp, 0x06);
+        gphy_val |= BIT_0;
+        rtl8168_mdio_write(tp, 0x06, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+        for (i = 0; i < 200; i++) {
+                udelay(100);
+                gphy_val = rtl8168_mdio_read(tp, 0x00);
+                if (gphy_val & BIT_7)
+                        break;
+        }
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1e, 0x0042);
+        rtl8168_mdio_write(tp, 0x18, 0x2300);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1e, 0x0023);
+        if (tp->RequiredSecLanDonglePatch) {
+                gphy_val = rtl8168_mdio_read(tp, 0x17);
+                gphy_val &= ~BIT_2;
+                rtl8168_mdio_write(tp, 0x17, gphy_val);
+        }
+
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x00, 0x9200);
+}
+
+static void
+rtl8168_set_phy_mcu_8168f_1(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        unsigned int gphy_val,i;
+
+        rtl8168_mdio_write(tp,0x1f, 0x0000);
+        rtl8168_mdio_write(tp,0x00, 0x1800);
+        gphy_val = rtl8168_mdio_read(tp, 0x15);
+        gphy_val &= ~(BIT_12);
+        rtl8168_mdio_write(tp,0x15, gphy_val);
+        rtl8168_mdio_write(tp,0x00, 0x4800);
+        rtl8168_mdio_write(tp,0x1f, 0x0007);
+        rtl8168_mdio_write(tp,0x1e, 0x002f);
+        for (i = 0; i < 1000; i++) {
+                udelay(100);
+                gphy_val = rtl8168_mdio_read(tp, 0x1c);
+                if (gphy_val & 0x0080)
+                        break;
+        }
+        rtl8168_mdio_write(tp,0x1f, 0x0000);
+        rtl8168_mdio_write(tp,0x00, 0x1800);
+        rtl8168_mdio_write(tp,0x1f, 0x0007);
+        rtl8168_mdio_write(tp,0x1e, 0x0023);
+        for (i = 0; i < 200; i++) {
+                udelay(100);
+                gphy_val = rtl8168_mdio_read(tp, 0x18);
+                if (!(gphy_val & 0x0001))
+                        break;
+        }
+        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+        rtl8168_mdio_write(tp, 0x05, 0xfff6);
+        rtl8168_mdio_write(tp, 0x06, 0x0080);
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1e, 0x0023);
+        rtl8168_mdio_write(tp, 0x16, 0x0306);
+        rtl8168_mdio_write(tp, 0x16, 0x0307);
+        rtl8168_mdio_write(tp, 0x15, 0x0194);
+        rtl8168_mdio_write(tp, 0x19, 0x407D);
+        rtl8168_mdio_write(tp, 0x15, 0x0098);
+        rtl8168_mdio_write(tp, 0x19, 0x7c0b);
+        rtl8168_mdio_write(tp, 0x15, 0x0099);
+        rtl8168_mdio_write(tp, 0x19, 0x6c0b);
+        rtl8168_mdio_write(tp, 0x15, 0x00eb);
+        rtl8168_mdio_write(tp, 0x19, 0x6c0b);
+        rtl8168_mdio_write(tp, 0x15, 0x00f8);
+        rtl8168_mdio_write(tp, 0x19, 0x6f0b);
+        rtl8168_mdio_write(tp, 0x15, 0x00fe);
+        rtl8168_mdio_write(tp, 0x19, 0x6f0f);
+        rtl8168_mdio_write(tp, 0x15, 0x00db);
+        rtl8168_mdio_write(tp, 0x19, 0x6f09);
+        rtl8168_mdio_write(tp, 0x15, 0x00dc);
+        rtl8168_mdio_write(tp, 0x19, 0xaefd);
+        rtl8168_mdio_write(tp, 0x15, 0x00dd);
+        rtl8168_mdio_write(tp, 0x19, 0x6f0b);
+        rtl8168_mdio_write(tp, 0x15, 0x00de);
+        rtl8168_mdio_write(tp, 0x19, 0xc60b);
+        rtl8168_mdio_write(tp, 0x15, 0x00df);
+        rtl8168_mdio_write(tp, 0x19, 0x00fa);
+        rtl8168_mdio_write(tp, 0x15, 0x00e0);
+        rtl8168_mdio_write(tp, 0x19, 0x30e1);
+        rtl8168_mdio_write(tp, 0x15, 0x020c);
+        rtl8168_mdio_write(tp, 0x19, 0x3224);
+        rtl8168_mdio_write(tp, 0x15, 0x020e);
+        rtl8168_mdio_write(tp, 0x19, 0x9813);
+        rtl8168_mdio_write(tp, 0x15, 0x020f);
+        rtl8168_mdio_write(tp, 0x19, 0x7801);
+        rtl8168_mdio_write(tp, 0x15, 0x0210);
+        rtl8168_mdio_write(tp, 0x19, 0x930f);
+        rtl8168_mdio_write(tp, 0x15, 0x0211);
+        rtl8168_mdio_write(tp, 0x19, 0x9206);
+        rtl8168_mdio_write(tp, 0x15, 0x0212);
+        rtl8168_mdio_write(tp, 0x19, 0x4002);
+        rtl8168_mdio_write(tp, 0x15, 0x0213);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x0214);
+        rtl8168_mdio_write(tp, 0x19, 0x588f);
+        rtl8168_mdio_write(tp, 0x15, 0x0215);
+        rtl8168_mdio_write(tp, 0x19, 0x5520);
+        rtl8168_mdio_write(tp, 0x15, 0x0216);
+        rtl8168_mdio_write(tp, 0x19, 0x3224);
+        rtl8168_mdio_write(tp, 0x15, 0x0217);
+        rtl8168_mdio_write(tp, 0x19, 0x4002);
+        rtl8168_mdio_write(tp, 0x15, 0x0218);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x0219);
+        rtl8168_mdio_write(tp, 0x19, 0x588d);
+        rtl8168_mdio_write(tp, 0x15, 0x021a);
+        rtl8168_mdio_write(tp, 0x19, 0x5540);
+        rtl8168_mdio_write(tp, 0x15, 0x021b);
+        rtl8168_mdio_write(tp, 0x19, 0x9e03);
+        rtl8168_mdio_write(tp, 0x15, 0x021c);
+        rtl8168_mdio_write(tp, 0x19, 0x7c40);
+        rtl8168_mdio_write(tp, 0x15, 0x021d);
+        rtl8168_mdio_write(tp, 0x19, 0x6840);
+        rtl8168_mdio_write(tp, 0x15, 0x021e);
+        rtl8168_mdio_write(tp, 0x19, 0x3224);
+        rtl8168_mdio_write(tp, 0x15, 0x021f);
+        rtl8168_mdio_write(tp, 0x19, 0x4002);
+        rtl8168_mdio_write(tp, 0x15, 0x0220);
+        rtl8168_mdio_write(tp, 0x19, 0x3224);
+        rtl8168_mdio_write(tp, 0x15, 0x0221);
+        rtl8168_mdio_write(tp, 0x19, 0x9e03);
+        rtl8168_mdio_write(tp, 0x15, 0x0222);
+        rtl8168_mdio_write(tp, 0x19, 0x7c40);
+        rtl8168_mdio_write(tp, 0x15, 0x0223);
+        rtl8168_mdio_write(tp, 0x19, 0x6840);
+        rtl8168_mdio_write(tp, 0x15, 0x0224);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x0225);
+        rtl8168_mdio_write(tp, 0x19, 0x3231);
+        rtl8168_mdio_write(tp, 0x15, 0x0000);
+        rtl8168_mdio_write(tp, 0x16, 0x0306);
+        rtl8168_mdio_write(tp, 0x16, 0x0300);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+        rtl8168_mdio_write(tp, 0x05, 0xfff6);
+        rtl8168_mdio_write(tp, 0x06, 0x0080);
+        rtl8168_mdio_write(tp, 0x05, 0x8000);
+        rtl8168_mdio_write(tp, 0x06, 0x0280);
+        rtl8168_mdio_write(tp, 0x06, 0x48f7);
+        rtl8168_mdio_write(tp, 0x06, 0x00e0);
+        rtl8168_mdio_write(tp, 0x06, 0xfff7);
+        rtl8168_mdio_write(tp, 0x06, 0xa080);
+        rtl8168_mdio_write(tp, 0x06, 0x02ae);
+        rtl8168_mdio_write(tp, 0x06, 0xf602);
+        rtl8168_mdio_write(tp, 0x06, 0x0118);
+        rtl8168_mdio_write(tp, 0x06, 0x0201);
+        rtl8168_mdio_write(tp, 0x06, 0x2502);
+        rtl8168_mdio_write(tp, 0x06, 0x8090);
+        rtl8168_mdio_write(tp, 0x06, 0x0201);
+        rtl8168_mdio_write(tp, 0x06, 0x4202);
+        rtl8168_mdio_write(tp, 0x06, 0x015c);
+        rtl8168_mdio_write(tp, 0x06, 0x0280);
+        rtl8168_mdio_write(tp, 0x06, 0xad02);
+        rtl8168_mdio_write(tp, 0x06, 0x80ca);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x88e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b89);
+        rtl8168_mdio_write(tp, 0x06, 0x1e01);
+        rtl8168_mdio_write(tp, 0x06, 0xe18b);
+        rtl8168_mdio_write(tp, 0x06, 0x8a1e);
+        rtl8168_mdio_write(tp, 0x06, 0x01e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8b);
+        rtl8168_mdio_write(tp, 0x06, 0x1e01);
+        rtl8168_mdio_write(tp, 0x06, 0xe18b);
+        rtl8168_mdio_write(tp, 0x06, 0x8c1e);
+        rtl8168_mdio_write(tp, 0x06, 0x01e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
+        rtl8168_mdio_write(tp, 0x06, 0x1e01);
+        rtl8168_mdio_write(tp, 0x06, 0xe18b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e1e);
+        rtl8168_mdio_write(tp, 0x06, 0x01a0);
+        rtl8168_mdio_write(tp, 0x06, 0x00c7);
+        rtl8168_mdio_write(tp, 0x06, 0xaebb);
+        rtl8168_mdio_write(tp, 0x06, 0xd484);
+        rtl8168_mdio_write(tp, 0x06, 0x3ce4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b92);
+        rtl8168_mdio_write(tp, 0x06, 0xe58b);
+        rtl8168_mdio_write(tp, 0x06, 0x93ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac8);
+        rtl8168_mdio_write(tp, 0x06, 0x03ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8aca);
+        rtl8168_mdio_write(tp, 0x06, 0x60ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac0);
+        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac1);
+        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8abe);
+        rtl8168_mdio_write(tp, 0x06, 0x07ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8abf);
+        rtl8168_mdio_write(tp, 0x06, 0x73ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8a95);
+        rtl8168_mdio_write(tp, 0x06, 0x02bf);
+        rtl8168_mdio_write(tp, 0x06, 0x8b88);
+        rtl8168_mdio_write(tp, 0x06, 0xec00);
+        rtl8168_mdio_write(tp, 0x06, 0x19a9);
+        rtl8168_mdio_write(tp, 0x06, 0x8b90);
+        rtl8168_mdio_write(tp, 0x06, 0xf9ee);
+        rtl8168_mdio_write(tp, 0x06, 0xfff6);
+        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+        rtl8168_mdio_write(tp, 0x06, 0xfff7);
+        rtl8168_mdio_write(tp, 0x06, 0xfed1);
+        rtl8168_mdio_write(tp, 0x06, 0x00bf);
+        rtl8168_mdio_write(tp, 0x06, 0x85a4);
+        rtl8168_mdio_write(tp, 0x06, 0x0238);
+        rtl8168_mdio_write(tp, 0x06, 0x7dd1);
+        rtl8168_mdio_write(tp, 0x06, 0x01bf);
+        rtl8168_mdio_write(tp, 0x06, 0x85a7);
+        rtl8168_mdio_write(tp, 0x06, 0x0238);
+        rtl8168_mdio_write(tp, 0x06, 0x7d04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8a);
+        rtl8168_mdio_write(tp, 0x06, 0xad20);
+        rtl8168_mdio_write(tp, 0x06, 0x14ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8a);
+        rtl8168_mdio_write(tp, 0x06, 0x0002);
+        rtl8168_mdio_write(tp, 0x06, 0x204b);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e4);
+        rtl8168_mdio_write(tp, 0x06, 0x26e1);
+        rtl8168_mdio_write(tp, 0x06, 0xe427);
+        rtl8168_mdio_write(tp, 0x06, 0xeee4);
+        rtl8168_mdio_write(tp, 0x06, 0x2623);
+        rtl8168_mdio_write(tp, 0x06, 0xe5e4);
+        rtl8168_mdio_write(tp, 0x06, 0x27fc);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8dad);
+        rtl8168_mdio_write(tp, 0x06, 0x2014);
+        rtl8168_mdio_write(tp, 0x06, 0xee8b);
+        rtl8168_mdio_write(tp, 0x06, 0x8d00);
+        rtl8168_mdio_write(tp, 0x06, 0xe08a);
+        rtl8168_mdio_write(tp, 0x06, 0x5a78);
+        rtl8168_mdio_write(tp, 0x06, 0x039e);
+        rtl8168_mdio_write(tp, 0x06, 0x0902);
+        rtl8168_mdio_write(tp, 0x06, 0x05e8);
+        rtl8168_mdio_write(tp, 0x06, 0x0281);
+        rtl8168_mdio_write(tp, 0x06, 0x4f02);
+        rtl8168_mdio_write(tp, 0x06, 0x326c);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xad20);
+        rtl8168_mdio_write(tp, 0x06, 0x1df6);
+        rtl8168_mdio_write(tp, 0x06, 0x20e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0x022f);
+        rtl8168_mdio_write(tp, 0x06, 0x0902);
+        rtl8168_mdio_write(tp, 0x06, 0x2ab0);
+        rtl8168_mdio_write(tp, 0x06, 0x0285);
+        rtl8168_mdio_write(tp, 0x06, 0x1602);
+        rtl8168_mdio_write(tp, 0x06, 0x03ba);
+        rtl8168_mdio_write(tp, 0x06, 0x0284);
+        rtl8168_mdio_write(tp, 0x06, 0xe502);
+        rtl8168_mdio_write(tp, 0x06, 0x2df1);
+        rtl8168_mdio_write(tp, 0x06, 0x0283);
+        rtl8168_mdio_write(tp, 0x06, 0x8302);
+        rtl8168_mdio_write(tp, 0x06, 0x0475);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ead);
+        rtl8168_mdio_write(tp, 0x06, 0x210b);
+        rtl8168_mdio_write(tp, 0x06, 0xf621);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e02);
+        rtl8168_mdio_write(tp, 0x06, 0x83f8);
+        rtl8168_mdio_write(tp, 0x06, 0x021c);
+        rtl8168_mdio_write(tp, 0x06, 0x99e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xad22);
+        rtl8168_mdio_write(tp, 0x06, 0x08f6);
+        rtl8168_mdio_write(tp, 0x06, 0x22e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0x0235);
+        rtl8168_mdio_write(tp, 0x06, 0x63e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xad23);
+        rtl8168_mdio_write(tp, 0x06, 0x08f6);
+        rtl8168_mdio_write(tp, 0x06, 0x23e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0x0231);
+        rtl8168_mdio_write(tp, 0x06, 0x57e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xad24);
+        rtl8168_mdio_write(tp, 0x06, 0x05f6);
+        rtl8168_mdio_write(tp, 0x06, 0x24e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ead);
+        rtl8168_mdio_write(tp, 0x06, 0x2505);
+        rtl8168_mdio_write(tp, 0x06, 0xf625);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ee0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xad26);
+        rtl8168_mdio_write(tp, 0x06, 0x08f6);
+        rtl8168_mdio_write(tp, 0x06, 0x26e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0x022d);
+        rtl8168_mdio_write(tp, 0x06, 0x1ce0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xad27);
+        rtl8168_mdio_write(tp, 0x06, 0x05f6);
+        rtl8168_mdio_write(tp, 0x06, 0x27e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0x0203);
+        rtl8168_mdio_write(tp, 0x06, 0x80fc);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xf9e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b81);
+        rtl8168_mdio_write(tp, 0x06, 0xac26);
+        rtl8168_mdio_write(tp, 0x06, 0x1ae0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b81);
+        rtl8168_mdio_write(tp, 0x06, 0xac21);
+        rtl8168_mdio_write(tp, 0x06, 0x14e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b85);
+        rtl8168_mdio_write(tp, 0x06, 0xac20);
+        rtl8168_mdio_write(tp, 0x06, 0x0ee0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b85);
+        rtl8168_mdio_write(tp, 0x06, 0xac23);
+        rtl8168_mdio_write(tp, 0x06, 0x08e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b87);
+        rtl8168_mdio_write(tp, 0x06, 0xac24);
+        rtl8168_mdio_write(tp, 0x06, 0x02ae);
+        rtl8168_mdio_write(tp, 0x06, 0x3802);
+        rtl8168_mdio_write(tp, 0x06, 0x1ac2);
+        rtl8168_mdio_write(tp, 0x06, 0xeee4);
+        rtl8168_mdio_write(tp, 0x06, 0x1c04);
+        rtl8168_mdio_write(tp, 0x06, 0xeee4);
+        rtl8168_mdio_write(tp, 0x06, 0x1d04);
+        rtl8168_mdio_write(tp, 0x06, 0xe2e0);
+        rtl8168_mdio_write(tp, 0x06, 0x7ce3);
+        rtl8168_mdio_write(tp, 0x06, 0xe07d);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+        rtl8168_mdio_write(tp, 0x06, 0x38e1);
+        rtl8168_mdio_write(tp, 0x06, 0xe039);
+        rtl8168_mdio_write(tp, 0x06, 0xad2e);
+        rtl8168_mdio_write(tp, 0x06, 0x1bad);
+        rtl8168_mdio_write(tp, 0x06, 0x390d);
+        rtl8168_mdio_write(tp, 0x06, 0xd101);
+        rtl8168_mdio_write(tp, 0x06, 0xbf22);
+        rtl8168_mdio_write(tp, 0x06, 0x7a02);
+        rtl8168_mdio_write(tp, 0x06, 0x387d);
+        rtl8168_mdio_write(tp, 0x06, 0x0281);
+        rtl8168_mdio_write(tp, 0x06, 0xacae);
+        rtl8168_mdio_write(tp, 0x06, 0x0bac);
+        rtl8168_mdio_write(tp, 0x06, 0x3802);
+        rtl8168_mdio_write(tp, 0x06, 0xae06);
+        rtl8168_mdio_write(tp, 0x06, 0x0281);
+        rtl8168_mdio_write(tp, 0x06, 0xe902);
+        rtl8168_mdio_write(tp, 0x06, 0x822e);
+        rtl8168_mdio_write(tp, 0x06, 0x021a);
+        rtl8168_mdio_write(tp, 0x06, 0xd3fd);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8af4);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x81ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2602);
+        rtl8168_mdio_write(tp, 0x06, 0xf728);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x81ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2105);
+        rtl8168_mdio_write(tp, 0x06, 0x0222);
+        rtl8168_mdio_write(tp, 0x06, 0x8ef7);
+        rtl8168_mdio_write(tp, 0x06, 0x29e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b85);
+        rtl8168_mdio_write(tp, 0x06, 0xad20);
+        rtl8168_mdio_write(tp, 0x06, 0x0502);
+        rtl8168_mdio_write(tp, 0x06, 0x14b8);
+        rtl8168_mdio_write(tp, 0x06, 0xf72a);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x85ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2305);
+        rtl8168_mdio_write(tp, 0x06, 0x0212);
+        rtl8168_mdio_write(tp, 0x06, 0xf4f7);
+        rtl8168_mdio_write(tp, 0x06, 0x2be0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b87);
+        rtl8168_mdio_write(tp, 0x06, 0xad24);
+        rtl8168_mdio_write(tp, 0x06, 0x0502);
+        rtl8168_mdio_write(tp, 0x06, 0x8284);
+        rtl8168_mdio_write(tp, 0x06, 0xf72c);
+        rtl8168_mdio_write(tp, 0x06, 0xe58a);
+        rtl8168_mdio_write(tp, 0x06, 0xf4fc);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x81ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2600);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x81ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2109);
+        rtl8168_mdio_write(tp, 0x06, 0xe08a);
+        rtl8168_mdio_write(tp, 0x06, 0xf4ac);
+        rtl8168_mdio_write(tp, 0x06, 0x2003);
+        rtl8168_mdio_write(tp, 0x06, 0x0222);
+        rtl8168_mdio_write(tp, 0x06, 0x7de0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b85);
+        rtl8168_mdio_write(tp, 0x06, 0xad20);
+        rtl8168_mdio_write(tp, 0x06, 0x09e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8af4);
+        rtl8168_mdio_write(tp, 0x06, 0xac21);
+        rtl8168_mdio_write(tp, 0x06, 0x0302);
+        rtl8168_mdio_write(tp, 0x06, 0x1408);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x85ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2309);
+        rtl8168_mdio_write(tp, 0x06, 0xe08a);
+        rtl8168_mdio_write(tp, 0x06, 0xf4ac);
+        rtl8168_mdio_write(tp, 0x06, 0x2203);
+        rtl8168_mdio_write(tp, 0x06, 0x0213);
+        rtl8168_mdio_write(tp, 0x06, 0x07e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b87);
+        rtl8168_mdio_write(tp, 0x06, 0xad24);
+        rtl8168_mdio_write(tp, 0x06, 0x09e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8af4);
+        rtl8168_mdio_write(tp, 0x06, 0xac23);
+        rtl8168_mdio_write(tp, 0x06, 0x0302);
+        rtl8168_mdio_write(tp, 0x06, 0x8289);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8af4);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x81ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2602);
+        rtl8168_mdio_write(tp, 0x06, 0xf628);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x81ad);
+        rtl8168_mdio_write(tp, 0x06, 0x210a);
+        rtl8168_mdio_write(tp, 0x06, 0xe083);
+        rtl8168_mdio_write(tp, 0x06, 0xecf6);
+        rtl8168_mdio_write(tp, 0x06, 0x27a0);
+        rtl8168_mdio_write(tp, 0x06, 0x0502);
+        rtl8168_mdio_write(tp, 0x06, 0xf629);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x85ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2008);
+        rtl8168_mdio_write(tp, 0x06, 0xe08a);
+        rtl8168_mdio_write(tp, 0x06, 0xe8ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2102);
+        rtl8168_mdio_write(tp, 0x06, 0xf62a);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x85ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2308);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x20a0);
+        rtl8168_mdio_write(tp, 0x06, 0x0302);
+        rtl8168_mdio_write(tp, 0x06, 0xf62b);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x87ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2408);
+        rtl8168_mdio_write(tp, 0x06, 0xe08a);
+        rtl8168_mdio_write(tp, 0x06, 0xc2a0);
+        rtl8168_mdio_write(tp, 0x06, 0x0302);
+        rtl8168_mdio_write(tp, 0x06, 0xf62c);
+        rtl8168_mdio_write(tp, 0x06, 0xe58a);
+        rtl8168_mdio_write(tp, 0x06, 0xf4a1);
+        rtl8168_mdio_write(tp, 0x06, 0x0008);
+        rtl8168_mdio_write(tp, 0x06, 0xd100);
+        rtl8168_mdio_write(tp, 0x06, 0xbf22);
+        rtl8168_mdio_write(tp, 0x06, 0x7a02);
+        rtl8168_mdio_write(tp, 0x06, 0x387d);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xee8a);
+        rtl8168_mdio_write(tp, 0x06, 0xc200);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x87ad);
+        rtl8168_mdio_write(tp, 0x06, 0x241e);
+        rtl8168_mdio_write(tp, 0x06, 0xe08a);
+        rtl8168_mdio_write(tp, 0x06, 0xc2a0);
+        rtl8168_mdio_write(tp, 0x06, 0x0005);
+        rtl8168_mdio_write(tp, 0x06, 0x0282);
+        rtl8168_mdio_write(tp, 0x06, 0xb0ae);
+        rtl8168_mdio_write(tp, 0x06, 0xf5a0);
+        rtl8168_mdio_write(tp, 0x06, 0x0105);
+        rtl8168_mdio_write(tp, 0x06, 0x0282);
+        rtl8168_mdio_write(tp, 0x06, 0xc0ae);
+        rtl8168_mdio_write(tp, 0x06, 0x0ba0);
+        rtl8168_mdio_write(tp, 0x06, 0x0205);
+        rtl8168_mdio_write(tp, 0x06, 0x0282);
+        rtl8168_mdio_write(tp, 0x06, 0xcaae);
+        rtl8168_mdio_write(tp, 0x06, 0x03a0);
+        rtl8168_mdio_write(tp, 0x06, 0x0300);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8fa);
+        rtl8168_mdio_write(tp, 0x06, 0xef69);
+        rtl8168_mdio_write(tp, 0x06, 0x0282);
+        rtl8168_mdio_write(tp, 0x06, 0xe1ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac2);
+        rtl8168_mdio_write(tp, 0x06, 0x01ef);
+        rtl8168_mdio_write(tp, 0x06, 0x96fe);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac9);
+        rtl8168_mdio_write(tp, 0x06, 0x0002);
+        rtl8168_mdio_write(tp, 0x06, 0x8317);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac8);
+        rtl8168_mdio_write(tp, 0x06, 0xe18a);
+        rtl8168_mdio_write(tp, 0x06, 0xc91f);
+        rtl8168_mdio_write(tp, 0x06, 0x019e);
+        rtl8168_mdio_write(tp, 0x06, 0x0611);
+        rtl8168_mdio_write(tp, 0x06, 0xe58a);
+        rtl8168_mdio_write(tp, 0x06, 0xc9ae);
+        rtl8168_mdio_write(tp, 0x06, 0x04ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac2);
+        rtl8168_mdio_write(tp, 0x06, 0x01fc);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xf9fa);
+        rtl8168_mdio_write(tp, 0x06, 0xef69);
+        rtl8168_mdio_write(tp, 0x06, 0xfbbf);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac4);
+        rtl8168_mdio_write(tp, 0x06, 0xef79);
+        rtl8168_mdio_write(tp, 0x06, 0xd200);
+        rtl8168_mdio_write(tp, 0x06, 0xd400);
+        rtl8168_mdio_write(tp, 0x06, 0x221e);
+        rtl8168_mdio_write(tp, 0x06, 0x02bf);
+        rtl8168_mdio_write(tp, 0x06, 0x3024);
+        rtl8168_mdio_write(tp, 0x06, 0x0238);
+        rtl8168_mdio_write(tp, 0x06, 0x7dbf);
+        rtl8168_mdio_write(tp, 0x06, 0x13ff);
+        rtl8168_mdio_write(tp, 0x06, 0x0238);
+        rtl8168_mdio_write(tp, 0x06, 0x500d);
+        rtl8168_mdio_write(tp, 0x06, 0x4559);
+        rtl8168_mdio_write(tp, 0x06, 0x1fef);
+        rtl8168_mdio_write(tp, 0x06, 0x97dd);
+        rtl8168_mdio_write(tp, 0x06, 0xd308);
+        rtl8168_mdio_write(tp, 0x06, 0x1a93);
+        rtl8168_mdio_write(tp, 0x06, 0xdd12);
+        rtl8168_mdio_write(tp, 0x06, 0x17a2);
+        rtl8168_mdio_write(tp, 0x06, 0x04de);
+        rtl8168_mdio_write(tp, 0x06, 0xffef);
+        rtl8168_mdio_write(tp, 0x06, 0x96fe);
+        rtl8168_mdio_write(tp, 0x06, 0xfdfc);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xf9fa);
+        rtl8168_mdio_write(tp, 0x06, 0xef69);
+        rtl8168_mdio_write(tp, 0x06, 0xfbee);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac2);
+        rtl8168_mdio_write(tp, 0x06, 0x03d5);
+        rtl8168_mdio_write(tp, 0x06, 0x0080);
+        rtl8168_mdio_write(tp, 0x06, 0xbf8a);
+        rtl8168_mdio_write(tp, 0x06, 0xc4ef);
+        rtl8168_mdio_write(tp, 0x06, 0x79ef);
+        rtl8168_mdio_write(tp, 0x06, 0x45bf);
+        rtl8168_mdio_write(tp, 0x06, 0x3024);
+        rtl8168_mdio_write(tp, 0x06, 0x0238);
+        rtl8168_mdio_write(tp, 0x06, 0x7dbf);
+        rtl8168_mdio_write(tp, 0x06, 0x13ff);
+        rtl8168_mdio_write(tp, 0x06, 0x0238);
+        rtl8168_mdio_write(tp, 0x06, 0x50ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2702);
+        rtl8168_mdio_write(tp, 0x06, 0x78ff);
+        rtl8168_mdio_write(tp, 0x06, 0xe18a);
+        rtl8168_mdio_write(tp, 0x06, 0xca1b);
+        rtl8168_mdio_write(tp, 0x06, 0x01aa);
+        rtl8168_mdio_write(tp, 0x06, 0x2eef);
+        rtl8168_mdio_write(tp, 0x06, 0x97d9);
+        rtl8168_mdio_write(tp, 0x06, 0x7900);
+        rtl8168_mdio_write(tp, 0x06, 0x9e2b);
+        rtl8168_mdio_write(tp, 0x06, 0x81dd);
+        rtl8168_mdio_write(tp, 0x06, 0xbf85);
+        rtl8168_mdio_write(tp, 0x06, 0xad02);
+        rtl8168_mdio_write(tp, 0x06, 0x387d);
+        rtl8168_mdio_write(tp, 0x06, 0xd101);
+        rtl8168_mdio_write(tp, 0x06, 0xef02);
+        rtl8168_mdio_write(tp, 0x06, 0x100c);
+        rtl8168_mdio_write(tp, 0x06, 0x11b0);
+        rtl8168_mdio_write(tp, 0x06, 0xfc0d);
+        rtl8168_mdio_write(tp, 0x06, 0x11bf);
+        rtl8168_mdio_write(tp, 0x06, 0x85aa);
+        rtl8168_mdio_write(tp, 0x06, 0x0238);
+        rtl8168_mdio_write(tp, 0x06, 0x7dd1);
+        rtl8168_mdio_write(tp, 0x06, 0x00bf);
+        rtl8168_mdio_write(tp, 0x06, 0x85aa);
+        rtl8168_mdio_write(tp, 0x06, 0x0238);
+        rtl8168_mdio_write(tp, 0x06, 0x7dee);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac2);
+        rtl8168_mdio_write(tp, 0x06, 0x02ae);
+        rtl8168_mdio_write(tp, 0x06, 0x0413);
+        rtl8168_mdio_write(tp, 0x06, 0xa38b);
+        rtl8168_mdio_write(tp, 0x06, 0xb4d3);
+        rtl8168_mdio_write(tp, 0x06, 0x8012);
+        rtl8168_mdio_write(tp, 0x06, 0x17a2);
+        rtl8168_mdio_write(tp, 0x06, 0x04ad);
+        rtl8168_mdio_write(tp, 0x06, 0xffef);
+        rtl8168_mdio_write(tp, 0x06, 0x96fe);
+        rtl8168_mdio_write(tp, 0x06, 0xfdfc);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xf9e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b85);
+        rtl8168_mdio_write(tp, 0x06, 0xad25);
+        rtl8168_mdio_write(tp, 0x06, 0x48e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8a96);
+        rtl8168_mdio_write(tp, 0x06, 0xe18a);
+        rtl8168_mdio_write(tp, 0x06, 0x977c);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x9e35);
+        rtl8168_mdio_write(tp, 0x06, 0xee8a);
+        rtl8168_mdio_write(tp, 0x06, 0x9600);
+        rtl8168_mdio_write(tp, 0x06, 0xee8a);
+        rtl8168_mdio_write(tp, 0x06, 0x9700);
+        rtl8168_mdio_write(tp, 0x06, 0xe08a);
+        rtl8168_mdio_write(tp, 0x06, 0xbee1);
+        rtl8168_mdio_write(tp, 0x06, 0x8abf);
+        rtl8168_mdio_write(tp, 0x06, 0xe28a);
+        rtl8168_mdio_write(tp, 0x06, 0xc0e3);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac1);
+        rtl8168_mdio_write(tp, 0x06, 0x0237);
+        rtl8168_mdio_write(tp, 0x06, 0x74ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2012);
+        rtl8168_mdio_write(tp, 0x06, 0xee8a);
+        rtl8168_mdio_write(tp, 0x06, 0x9603);
+        rtl8168_mdio_write(tp, 0x06, 0xee8a);
+        rtl8168_mdio_write(tp, 0x06, 0x97b7);
+        rtl8168_mdio_write(tp, 0x06, 0xee8a);
+        rtl8168_mdio_write(tp, 0x06, 0xc000);
+        rtl8168_mdio_write(tp, 0x06, 0xee8a);
+        rtl8168_mdio_write(tp, 0x06, 0xc100);
+        rtl8168_mdio_write(tp, 0x06, 0xae11);
+        rtl8168_mdio_write(tp, 0x06, 0x15e6);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac0);
+        rtl8168_mdio_write(tp, 0x06, 0xe78a);
+        rtl8168_mdio_write(tp, 0x06, 0xc1ae);
+        rtl8168_mdio_write(tp, 0x06, 0x08ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac0);
+        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8ac1);
+        rtl8168_mdio_write(tp, 0x06, 0x00fd);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xae20);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0x0000);
+        rtl8168_mdio_write(tp, 0x06, 0xf8fa);
+        rtl8168_mdio_write(tp, 0x06, 0xef69);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+        rtl8168_mdio_write(tp, 0x06, 0x00e1);
+        rtl8168_mdio_write(tp, 0x06, 0xe001);
+        rtl8168_mdio_write(tp, 0x06, 0xad27);
+        rtl8168_mdio_write(tp, 0x06, 0x32e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b40);
+        rtl8168_mdio_write(tp, 0x06, 0xf720);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x40bf);
+        rtl8168_mdio_write(tp, 0x06, 0x3230);
+        rtl8168_mdio_write(tp, 0x06, 0x0238);
+        rtl8168_mdio_write(tp, 0x06, 0x50ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2821);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+        rtl8168_mdio_write(tp, 0x06, 0x20e1);
+        rtl8168_mdio_write(tp, 0x06, 0xe021);
+        rtl8168_mdio_write(tp, 0x06, 0xad20);
+        rtl8168_mdio_write(tp, 0x06, 0x18e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b40);
+        rtl8168_mdio_write(tp, 0x06, 0xf620);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x40ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8b3b);
+        rtl8168_mdio_write(tp, 0x06, 0xffe0);
+        rtl8168_mdio_write(tp, 0x06, 0x8a8a);
+        rtl8168_mdio_write(tp, 0x06, 0xe18a);
+        rtl8168_mdio_write(tp, 0x06, 0x8be4);
+        rtl8168_mdio_write(tp, 0x06, 0xe000);
+        rtl8168_mdio_write(tp, 0x06, 0xe5e0);
+        rtl8168_mdio_write(tp, 0x06, 0x01ef);
+        rtl8168_mdio_write(tp, 0x06, 0x96fe);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x06, 0xface);
+        rtl8168_mdio_write(tp, 0x06, 0xfaef);
+        rtl8168_mdio_write(tp, 0x06, 0x69fa);
+        rtl8168_mdio_write(tp, 0x06, 0xd401);
+        rtl8168_mdio_write(tp, 0x06, 0x55b4);
+        rtl8168_mdio_write(tp, 0x06, 0xfebf);
+        rtl8168_mdio_write(tp, 0x06, 0x1c1e);
+        rtl8168_mdio_write(tp, 0x06, 0x0238);
+        rtl8168_mdio_write(tp, 0x06, 0x50ac);
+        rtl8168_mdio_write(tp, 0x06, 0x280b);
+        rtl8168_mdio_write(tp, 0x06, 0xbf1c);
+        rtl8168_mdio_write(tp, 0x06, 0x1b02);
+        rtl8168_mdio_write(tp, 0x06, 0x3850);
+        rtl8168_mdio_write(tp, 0x06, 0xac28);
+        rtl8168_mdio_write(tp, 0x06, 0x49ae);
+        rtl8168_mdio_write(tp, 0x06, 0x64bf);
+        rtl8168_mdio_write(tp, 0x06, 0x1c1b);
+        rtl8168_mdio_write(tp, 0x06, 0x0238);
+        rtl8168_mdio_write(tp, 0x06, 0x50ac);
+        rtl8168_mdio_write(tp, 0x06, 0x285b);
+        rtl8168_mdio_write(tp, 0x06, 0xd000);
+        rtl8168_mdio_write(tp, 0x06, 0x0284);
+        rtl8168_mdio_write(tp, 0x06, 0xcaac);
+        rtl8168_mdio_write(tp, 0x06, 0x2105);
+        rtl8168_mdio_write(tp, 0x06, 0xac22);
+        rtl8168_mdio_write(tp, 0x06, 0x02ae);
+        rtl8168_mdio_write(tp, 0x06, 0x4ebf);
+        rtl8168_mdio_write(tp, 0x06, 0xe0c4);
+        rtl8168_mdio_write(tp, 0x06, 0xbe85);
+        rtl8168_mdio_write(tp, 0x06, 0xf6d2);
+        rtl8168_mdio_write(tp, 0x06, 0x04d8);
+        rtl8168_mdio_write(tp, 0x06, 0x19d9);
+        rtl8168_mdio_write(tp, 0x06, 0x1907);
+        rtl8168_mdio_write(tp, 0x06, 0xdc19);
+        rtl8168_mdio_write(tp, 0x06, 0xdd19);
+        rtl8168_mdio_write(tp, 0x06, 0x0789);
+        rtl8168_mdio_write(tp, 0x06, 0x89ef);
+        rtl8168_mdio_write(tp, 0x06, 0x645e);
+        rtl8168_mdio_write(tp, 0x06, 0x07ff);
+        rtl8168_mdio_write(tp, 0x06, 0x0d65);
+        rtl8168_mdio_write(tp, 0x06, 0x5cf8);
+        rtl8168_mdio_write(tp, 0x06, 0x001e);
+        rtl8168_mdio_write(tp, 0x06, 0x46dc);
+        rtl8168_mdio_write(tp, 0x06, 0x19dd);
+        rtl8168_mdio_write(tp, 0x06, 0x19b2);
+        rtl8168_mdio_write(tp, 0x06, 0xe2d4);
+        rtl8168_mdio_write(tp, 0x06, 0x0001);
+        rtl8168_mdio_write(tp, 0x06, 0xbf1c);
+        rtl8168_mdio_write(tp, 0x06, 0x1b02);
+        rtl8168_mdio_write(tp, 0x06, 0x387d);
+        rtl8168_mdio_write(tp, 0x06, 0xae1d);
+        rtl8168_mdio_write(tp, 0x06, 0xbee0);
+        rtl8168_mdio_write(tp, 0x06, 0xc4bf);
+        rtl8168_mdio_write(tp, 0x06, 0x85f6);
+        rtl8168_mdio_write(tp, 0x06, 0xd204);
+        rtl8168_mdio_write(tp, 0x06, 0xd819);
+        rtl8168_mdio_write(tp, 0x06, 0xd919);
+        rtl8168_mdio_write(tp, 0x06, 0x07dc);
+        rtl8168_mdio_write(tp, 0x06, 0x19dd);
+        rtl8168_mdio_write(tp, 0x06, 0x1907);
+        rtl8168_mdio_write(tp, 0x06, 0xb2f4);
+        rtl8168_mdio_write(tp, 0x06, 0xd400);
+        rtl8168_mdio_write(tp, 0x06, 0x00bf);
+        rtl8168_mdio_write(tp, 0x06, 0x1c1b);
+        rtl8168_mdio_write(tp, 0x06, 0x0238);
+        rtl8168_mdio_write(tp, 0x06, 0x7dfe);
+        rtl8168_mdio_write(tp, 0x06, 0xef96);
+        rtl8168_mdio_write(tp, 0x06, 0xfec6);
+        rtl8168_mdio_write(tp, 0x06, 0xfefd);
+        rtl8168_mdio_write(tp, 0x06, 0xfc05);
+        rtl8168_mdio_write(tp, 0x06, 0xf9e2);
+        rtl8168_mdio_write(tp, 0x06, 0xe0ea);
+        rtl8168_mdio_write(tp, 0x06, 0xe3e0);
+        rtl8168_mdio_write(tp, 0x06, 0xeb5a);
+        rtl8168_mdio_write(tp, 0x06, 0x070c);
+        rtl8168_mdio_write(tp, 0x06, 0x031e);
+        rtl8168_mdio_write(tp, 0x06, 0x20e6);
+        rtl8168_mdio_write(tp, 0x06, 0xe0ea);
+        rtl8168_mdio_write(tp, 0x06, 0xe7e0);
+        rtl8168_mdio_write(tp, 0x06, 0xebe0);
+        rtl8168_mdio_write(tp, 0x06, 0xe0fc);
+        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+        rtl8168_mdio_write(tp, 0x06, 0xfdfd);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xfaef);
+        rtl8168_mdio_write(tp, 0x06, 0x69e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b80);
+        rtl8168_mdio_write(tp, 0x06, 0xad27);
+        rtl8168_mdio_write(tp, 0x06, 0x22bf);
+        rtl8168_mdio_write(tp, 0x06, 0x4616);
+        rtl8168_mdio_write(tp, 0x06, 0x0238);
+        rtl8168_mdio_write(tp, 0x06, 0x50e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b44);
+        rtl8168_mdio_write(tp, 0x06, 0x1f01);
+        rtl8168_mdio_write(tp, 0x06, 0x9e15);
+        rtl8168_mdio_write(tp, 0x06, 0xe58b);
+        rtl8168_mdio_write(tp, 0x06, 0x44ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2907);
+        rtl8168_mdio_write(tp, 0x06, 0xac28);
+        rtl8168_mdio_write(tp, 0x06, 0x04d1);
+        rtl8168_mdio_write(tp, 0x06, 0x01ae);
+        rtl8168_mdio_write(tp, 0x06, 0x02d1);
+        rtl8168_mdio_write(tp, 0x06, 0x00bf);
+        rtl8168_mdio_write(tp, 0x06, 0x85b0);
+        rtl8168_mdio_write(tp, 0x06, 0x0238);
+        rtl8168_mdio_write(tp, 0x06, 0x7def);
+        rtl8168_mdio_write(tp, 0x06, 0x96fe);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b85);
+        rtl8168_mdio_write(tp, 0x06, 0xad26);
+        rtl8168_mdio_write(tp, 0x06, 0x30e0);
+        rtl8168_mdio_write(tp, 0x06, 0xe036);
+        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+        rtl8168_mdio_write(tp, 0x06, 0x37e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b3f);
+        rtl8168_mdio_write(tp, 0x06, 0x1f10);
+        rtl8168_mdio_write(tp, 0x06, 0x9e23);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x3fac);
+        rtl8168_mdio_write(tp, 0x06, 0x200b);
+        rtl8168_mdio_write(tp, 0x06, 0xac21);
+        rtl8168_mdio_write(tp, 0x06, 0x0dac);
+        rtl8168_mdio_write(tp, 0x06, 0x250f);
+        rtl8168_mdio_write(tp, 0x06, 0xac27);
+        rtl8168_mdio_write(tp, 0x06, 0x11ae);
+        rtl8168_mdio_write(tp, 0x06, 0x1202);
+        rtl8168_mdio_write(tp, 0x06, 0x2c47);
+        rtl8168_mdio_write(tp, 0x06, 0xae0d);
+        rtl8168_mdio_write(tp, 0x06, 0x0285);
+        rtl8168_mdio_write(tp, 0x06, 0x4fae);
+        rtl8168_mdio_write(tp, 0x06, 0x0802);
+        rtl8168_mdio_write(tp, 0x06, 0x2c69);
+        rtl8168_mdio_write(tp, 0x06, 0xae03);
+        rtl8168_mdio_write(tp, 0x06, 0x022c);
+        rtl8168_mdio_write(tp, 0x06, 0x7cfc);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xfaef);
+        rtl8168_mdio_write(tp, 0x06, 0x6902);
+        rtl8168_mdio_write(tp, 0x06, 0x856c);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+        rtl8168_mdio_write(tp, 0x06, 0x14e1);
+        rtl8168_mdio_write(tp, 0x06, 0xe015);
+        rtl8168_mdio_write(tp, 0x06, 0xad26);
+        rtl8168_mdio_write(tp, 0x06, 0x08d1);
+        rtl8168_mdio_write(tp, 0x06, 0x1ebf);
+        rtl8168_mdio_write(tp, 0x06, 0x2cd9);
+        rtl8168_mdio_write(tp, 0x06, 0x0238);
+        rtl8168_mdio_write(tp, 0x06, 0x7def);
+        rtl8168_mdio_write(tp, 0x06, 0x96fe);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b85);
+        rtl8168_mdio_write(tp, 0x06, 0xad27);
+        rtl8168_mdio_write(tp, 0x06, 0x2fd0);
+        rtl8168_mdio_write(tp, 0x06, 0x0b02);
+        rtl8168_mdio_write(tp, 0x06, 0x3682);
+        rtl8168_mdio_write(tp, 0x06, 0x5882);
+        rtl8168_mdio_write(tp, 0x06, 0x7882);
+        rtl8168_mdio_write(tp, 0x06, 0x9f24);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x32e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b33);
+        rtl8168_mdio_write(tp, 0x06, 0x1f10);
+        rtl8168_mdio_write(tp, 0x06, 0x9e1a);
+        rtl8168_mdio_write(tp, 0x06, 0x10e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b32);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+        rtl8168_mdio_write(tp, 0x06, 0x28e1);
+        rtl8168_mdio_write(tp, 0x06, 0xe029);
+        rtl8168_mdio_write(tp, 0x06, 0xf72c);
+        rtl8168_mdio_write(tp, 0x06, 0xe4e0);
+        rtl8168_mdio_write(tp, 0x06, 0x28e5);
+        rtl8168_mdio_write(tp, 0x06, 0xe029);
+        rtl8168_mdio_write(tp, 0x06, 0xf62c);
+        rtl8168_mdio_write(tp, 0x06, 0xe4e0);
+        rtl8168_mdio_write(tp, 0x06, 0x28e5);
+        rtl8168_mdio_write(tp, 0x06, 0xe029);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0x00e1);
+        rtl8168_mdio_write(tp, 0x06, 0x4077);
+        rtl8168_mdio_write(tp, 0x06, 0xe140);
+        rtl8168_mdio_write(tp, 0x06, 0x52e0);
+        rtl8168_mdio_write(tp, 0x06, 0xeed9);
+        rtl8168_mdio_write(tp, 0x06, 0xe04c);
+        rtl8168_mdio_write(tp, 0x06, 0xbbe0);
+        rtl8168_mdio_write(tp, 0x06, 0x2a00);
+        rtl8168_mdio_write(tp, 0x05, 0xe142);
+        gphy_val = rtl8168_mdio_read(tp, 0x06);
+        gphy_val |= BIT_0;
+        rtl8168_mdio_write(tp,0x06, gphy_val);
+        rtl8168_mdio_write(tp, 0x05, 0xe140);
+        gphy_val = rtl8168_mdio_read(tp, 0x06);
+        gphy_val |= BIT_0;
+        rtl8168_mdio_write(tp,0x06, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp,0x1f, 0x0005);
+        for (i = 0; i < 200; i++) {
+                udelay(100);
+                gphy_val = rtl8168_mdio_read(tp, 0x00);
+                if (gphy_val & BIT_7)
+                        break;
+        }
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1e, 0x0023);
+        gphy_val = rtl8168_mdio_read(tp, 0x17);
+        gphy_val |= BIT_1;
+        if (tp->RequiredSecLanDonglePatch)
+                gphy_val &= ~BIT_2;
+        rtl8168_mdio_write(tp, 0x17, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0003);
+        rtl8168_mdio_write(tp, 0x09, 0xA20F);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0003);
+        rtl8168_mdio_write(tp, 0x01, 0x328A);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x00, 0x9200);
+}
+
+static void
+rtl8168_set_phy_mcu_8168f_2(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        unsigned int gphy_val,i;
+
+        rtl8168_mdio_write(tp,0x1f, 0x0000);
+        rtl8168_mdio_write(tp,0x00, 0x1800);
+        gphy_val = rtl8168_mdio_read(tp, 0x15);
+        gphy_val &= ~(BIT_12);
+        rtl8168_mdio_write(tp,0x15, gphy_val);
+        rtl8168_mdio_write(tp,0x00, 0x4800);
+        rtl8168_mdio_write(tp,0x1f, 0x0007);
+        rtl8168_mdio_write(tp,0x1e, 0x002f);
+        for (i = 0; i < 1000; i++) {
+                udelay(100);
+                gphy_val = rtl8168_mdio_read(tp, 0x1c);
+                if (gphy_val & 0x0080)
+                        break;
+        }
+        rtl8168_mdio_write(tp,0x1f, 0x0000);
+        rtl8168_mdio_write(tp,0x00, 0x1800);
+        rtl8168_mdio_write(tp,0x1f, 0x0007);
+        rtl8168_mdio_write(tp,0x1e, 0x0023);
+        for (i = 0; i < 200; i++) {
+                udelay(100);
+                gphy_val = rtl8168_mdio_read(tp, 0x18);
+                if (!(gphy_val & 0x0001))
+                        break;
+        }
+        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+        rtl8168_mdio_write(tp, 0x05, 0xfff6);
+        rtl8168_mdio_write(tp, 0x06, 0x0080);
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1e, 0x0023);
+        rtl8168_mdio_write(tp, 0x16, 0x0306);
+        rtl8168_mdio_write(tp, 0x16, 0x0307);
+        rtl8168_mdio_write(tp, 0x15, 0x0098);
+        rtl8168_mdio_write(tp, 0x19, 0x7c0b);
+        rtl8168_mdio_write(tp, 0x15, 0x0099);
+        rtl8168_mdio_write(tp, 0x19, 0x6c0b);
+        rtl8168_mdio_write(tp, 0x15, 0x00eb);
+        rtl8168_mdio_write(tp, 0x19, 0x6c0b);
+        rtl8168_mdio_write(tp, 0x15, 0x00f8);
+        rtl8168_mdio_write(tp, 0x19, 0x6f0b);
+        rtl8168_mdio_write(tp, 0x15, 0x00fe);
+        rtl8168_mdio_write(tp, 0x19, 0x6f0f);
+        rtl8168_mdio_write(tp, 0x15, 0x00db);
+        rtl8168_mdio_write(tp, 0x19, 0x6f09);
+        rtl8168_mdio_write(tp, 0x15, 0x00dc);
+        rtl8168_mdio_write(tp, 0x19, 0xaefd);
+        rtl8168_mdio_write(tp, 0x15, 0x00dd);
+        rtl8168_mdio_write(tp, 0x19, 0x6f0b);
+        rtl8168_mdio_write(tp, 0x15, 0x00de);
+        rtl8168_mdio_write(tp, 0x19, 0xc60b);
+        rtl8168_mdio_write(tp, 0x15, 0x00df);
+        rtl8168_mdio_write(tp, 0x19, 0x00fa);
+        rtl8168_mdio_write(tp, 0x15, 0x00e0);
+        rtl8168_mdio_write(tp, 0x19, 0x30e1);
+        rtl8168_mdio_write(tp, 0x15, 0x020c);
+        rtl8168_mdio_write(tp, 0x19, 0x3224);
+        rtl8168_mdio_write(tp, 0x15, 0x020e);
+        rtl8168_mdio_write(tp, 0x19, 0x9813);
+        rtl8168_mdio_write(tp, 0x15, 0x020f);
+        rtl8168_mdio_write(tp, 0x19, 0x7801);
+        rtl8168_mdio_write(tp, 0x15, 0x0210);
+        rtl8168_mdio_write(tp, 0x19, 0x930f);
+        rtl8168_mdio_write(tp, 0x15, 0x0211);
+        rtl8168_mdio_write(tp, 0x19, 0x9206);
+        rtl8168_mdio_write(tp, 0x15, 0x0212);
+        rtl8168_mdio_write(tp, 0x19, 0x4002);
+        rtl8168_mdio_write(tp, 0x15, 0x0213);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x0214);
+        rtl8168_mdio_write(tp, 0x19, 0x588f);
+        rtl8168_mdio_write(tp, 0x15, 0x0215);
+        rtl8168_mdio_write(tp, 0x19, 0x5520);
+        rtl8168_mdio_write(tp, 0x15, 0x0216);
+        rtl8168_mdio_write(tp, 0x19, 0x3224);
+        rtl8168_mdio_write(tp, 0x15, 0x0217);
+        rtl8168_mdio_write(tp, 0x19, 0x4002);
+        rtl8168_mdio_write(tp, 0x15, 0x0218);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x0219);
+        rtl8168_mdio_write(tp, 0x19, 0x588d);
+        rtl8168_mdio_write(tp, 0x15, 0x021a);
+        rtl8168_mdio_write(tp, 0x19, 0x5540);
+        rtl8168_mdio_write(tp, 0x15, 0x021b);
+        rtl8168_mdio_write(tp, 0x19, 0x9e03);
+        rtl8168_mdio_write(tp, 0x15, 0x021c);
+        rtl8168_mdio_write(tp, 0x19, 0x7c40);
+        rtl8168_mdio_write(tp, 0x15, 0x021d);
+        rtl8168_mdio_write(tp, 0x19, 0x6840);
+        rtl8168_mdio_write(tp, 0x15, 0x021e);
+        rtl8168_mdio_write(tp, 0x19, 0x3224);
+        rtl8168_mdio_write(tp, 0x15, 0x021f);
+        rtl8168_mdio_write(tp, 0x19, 0x4002);
+        rtl8168_mdio_write(tp, 0x15, 0x0220);
+        rtl8168_mdio_write(tp, 0x19, 0x3224);
+        rtl8168_mdio_write(tp, 0x15, 0x0221);
+        rtl8168_mdio_write(tp, 0x19, 0x9e03);
+        rtl8168_mdio_write(tp, 0x15, 0x0222);
+        rtl8168_mdio_write(tp, 0x19, 0x7c40);
+        rtl8168_mdio_write(tp, 0x15, 0x0223);
+        rtl8168_mdio_write(tp, 0x19, 0x6840);
+        rtl8168_mdio_write(tp, 0x15, 0x0224);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x0225);
+        rtl8168_mdio_write(tp, 0x19, 0x3231);
+        rtl8168_mdio_write(tp, 0x15, 0x0000);
+        rtl8168_mdio_write(tp, 0x16, 0x0306);
+        rtl8168_mdio_write(tp, 0x16, 0x0300);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+        rtl8168_mdio_write(tp, 0x05, 0xfff6);
+        rtl8168_mdio_write(tp, 0x06, 0x0080);
+        rtl8168_mdio_write(tp, 0x05, 0x8000);
+        rtl8168_mdio_write(tp, 0x06, 0x0280);
+        rtl8168_mdio_write(tp, 0x06, 0x48f7);
+        rtl8168_mdio_write(tp, 0x06, 0x00e0);
+        rtl8168_mdio_write(tp, 0x06, 0xfff7);
+        rtl8168_mdio_write(tp, 0x06, 0xa080);
+        rtl8168_mdio_write(tp, 0x06, 0x02ae);
+        rtl8168_mdio_write(tp, 0x06, 0xf602);
+        rtl8168_mdio_write(tp, 0x06, 0x011b);
+        rtl8168_mdio_write(tp, 0x06, 0x0201);
+        rtl8168_mdio_write(tp, 0x06, 0x2802);
+        rtl8168_mdio_write(tp, 0x06, 0x0135);
+        rtl8168_mdio_write(tp, 0x06, 0x0201);
+        rtl8168_mdio_write(tp, 0x06, 0x4502);
+        rtl8168_mdio_write(tp, 0x06, 0x015f);
+        rtl8168_mdio_write(tp, 0x06, 0x0280);
+        rtl8168_mdio_write(tp, 0x06, 0x6b02);
+        rtl8168_mdio_write(tp, 0x06, 0x80e5);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x88e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b89);
+        rtl8168_mdio_write(tp, 0x06, 0x1e01);
+        rtl8168_mdio_write(tp, 0x06, 0xe18b);
+        rtl8168_mdio_write(tp, 0x06, 0x8a1e);
+        rtl8168_mdio_write(tp, 0x06, 0x01e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8b);
+        rtl8168_mdio_write(tp, 0x06, 0x1e01);
+        rtl8168_mdio_write(tp, 0x06, 0xe18b);
+        rtl8168_mdio_write(tp, 0x06, 0x8c1e);
+        rtl8168_mdio_write(tp, 0x06, 0x01e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
+        rtl8168_mdio_write(tp, 0x06, 0x1e01);
+        rtl8168_mdio_write(tp, 0x06, 0xe18b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e1e);
+        rtl8168_mdio_write(tp, 0x06, 0x01a0);
+        rtl8168_mdio_write(tp, 0x06, 0x00c7);
+        rtl8168_mdio_write(tp, 0x06, 0xaebb);
+        rtl8168_mdio_write(tp, 0x06, 0xbf8b);
+        rtl8168_mdio_write(tp, 0x06, 0x88ec);
+        rtl8168_mdio_write(tp, 0x06, 0x0019);
+        rtl8168_mdio_write(tp, 0x06, 0xa98b);
+        rtl8168_mdio_write(tp, 0x06, 0x90f9);
+        rtl8168_mdio_write(tp, 0x06, 0xeeff);
+        rtl8168_mdio_write(tp, 0x06, 0xf600);
+        rtl8168_mdio_write(tp, 0x06, 0xeeff);
+        rtl8168_mdio_write(tp, 0x06, 0xf7fe);
+        rtl8168_mdio_write(tp, 0x06, 0xd100);
+        rtl8168_mdio_write(tp, 0x06, 0xbf81);
+        rtl8168_mdio_write(tp, 0x06, 0x9802);
+        rtl8168_mdio_write(tp, 0x06, 0x39f3);
+        rtl8168_mdio_write(tp, 0x06, 0xd101);
+        rtl8168_mdio_write(tp, 0x06, 0xbf81);
+        rtl8168_mdio_write(tp, 0x06, 0x9b02);
+        rtl8168_mdio_write(tp, 0x06, 0x39f3);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8dad);
+        rtl8168_mdio_write(tp, 0x06, 0x2014);
+        rtl8168_mdio_write(tp, 0x06, 0xee8b);
+        rtl8168_mdio_write(tp, 0x06, 0x8d00);
+        rtl8168_mdio_write(tp, 0x06, 0xe08a);
+        rtl8168_mdio_write(tp, 0x06, 0x5a78);
+        rtl8168_mdio_write(tp, 0x06, 0x039e);
+        rtl8168_mdio_write(tp, 0x06, 0x0902);
+        rtl8168_mdio_write(tp, 0x06, 0x05fc);
+        rtl8168_mdio_write(tp, 0x06, 0x0280);
+        rtl8168_mdio_write(tp, 0x06, 0x8802);
+        rtl8168_mdio_write(tp, 0x06, 0x32dd);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x81ac);
+        rtl8168_mdio_write(tp, 0x06, 0x261a);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x81ac);
+        rtl8168_mdio_write(tp, 0x06, 0x2114);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x85ac);
+        rtl8168_mdio_write(tp, 0x06, 0x200e);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x85ac);
+        rtl8168_mdio_write(tp, 0x06, 0x2308);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x87ac);
+        rtl8168_mdio_write(tp, 0x06, 0x2402);
+        rtl8168_mdio_write(tp, 0x06, 0xae38);
+        rtl8168_mdio_write(tp, 0x06, 0x021a);
+        rtl8168_mdio_write(tp, 0x06, 0xd6ee);
+        rtl8168_mdio_write(tp, 0x06, 0xe41c);
+        rtl8168_mdio_write(tp, 0x06, 0x04ee);
+        rtl8168_mdio_write(tp, 0x06, 0xe41d);
+        rtl8168_mdio_write(tp, 0x06, 0x04e2);
+        rtl8168_mdio_write(tp, 0x06, 0xe07c);
+        rtl8168_mdio_write(tp, 0x06, 0xe3e0);
+        rtl8168_mdio_write(tp, 0x06, 0x7de0);
+        rtl8168_mdio_write(tp, 0x06, 0xe038);
+        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+        rtl8168_mdio_write(tp, 0x06, 0x39ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2e1b);
+        rtl8168_mdio_write(tp, 0x06, 0xad39);
+        rtl8168_mdio_write(tp, 0x06, 0x0dd1);
+        rtl8168_mdio_write(tp, 0x06, 0x01bf);
+        rtl8168_mdio_write(tp, 0x06, 0x22c8);
+        rtl8168_mdio_write(tp, 0x06, 0x0239);
+        rtl8168_mdio_write(tp, 0x06, 0xf302);
+        rtl8168_mdio_write(tp, 0x06, 0x21f0);
+        rtl8168_mdio_write(tp, 0x06, 0xae0b);
+        rtl8168_mdio_write(tp, 0x06, 0xac38);
+        rtl8168_mdio_write(tp, 0x06, 0x02ae);
+        rtl8168_mdio_write(tp, 0x06, 0x0602);
+        rtl8168_mdio_write(tp, 0x06, 0x222d);
+        rtl8168_mdio_write(tp, 0x06, 0x0222);
+        rtl8168_mdio_write(tp, 0x06, 0x7202);
+        rtl8168_mdio_write(tp, 0x06, 0x1ae7);
+        rtl8168_mdio_write(tp, 0x06, 0xfdfc);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ead);
+        rtl8168_mdio_write(tp, 0x06, 0x201a);
+        rtl8168_mdio_write(tp, 0x06, 0xf620);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e02);
+        rtl8168_mdio_write(tp, 0x06, 0x2afe);
+        rtl8168_mdio_write(tp, 0x06, 0x022c);
+        rtl8168_mdio_write(tp, 0x06, 0x5c02);
+        rtl8168_mdio_write(tp, 0x06, 0x03c5);
+        rtl8168_mdio_write(tp, 0x06, 0x0281);
+        rtl8168_mdio_write(tp, 0x06, 0x6702);
+        rtl8168_mdio_write(tp, 0x06, 0x2e4f);
+        rtl8168_mdio_write(tp, 0x06, 0x0204);
+        rtl8168_mdio_write(tp, 0x06, 0x8902);
+        rtl8168_mdio_write(tp, 0x06, 0x2f7a);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ead);
+        rtl8168_mdio_write(tp, 0x06, 0x210b);
+        rtl8168_mdio_write(tp, 0x06, 0xf621);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e02);
+        rtl8168_mdio_write(tp, 0x06, 0x0445);
+        rtl8168_mdio_write(tp, 0x06, 0x021c);
+        rtl8168_mdio_write(tp, 0x06, 0xb8e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xad22);
+        rtl8168_mdio_write(tp, 0x06, 0x08f6);
+        rtl8168_mdio_write(tp, 0x06, 0x22e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0x0235);
+        rtl8168_mdio_write(tp, 0x06, 0xd4e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xad23);
+        rtl8168_mdio_write(tp, 0x06, 0x08f6);
+        rtl8168_mdio_write(tp, 0x06, 0x23e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0x0231);
+        rtl8168_mdio_write(tp, 0x06, 0xc8e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xad24);
+        rtl8168_mdio_write(tp, 0x06, 0x05f6);
+        rtl8168_mdio_write(tp, 0x06, 0x24e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ead);
+        rtl8168_mdio_write(tp, 0x06, 0x2505);
+        rtl8168_mdio_write(tp, 0x06, 0xf625);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ee0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xad26);
+        rtl8168_mdio_write(tp, 0x06, 0x08f6);
+        rtl8168_mdio_write(tp, 0x06, 0x26e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0x022d);
+        rtl8168_mdio_write(tp, 0x06, 0x6ae0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xad27);
+        rtl8168_mdio_write(tp, 0x06, 0x05f6);
+        rtl8168_mdio_write(tp, 0x06, 0x27e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0x0203);
+        rtl8168_mdio_write(tp, 0x06, 0x8bfc);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xfaef);
+        rtl8168_mdio_write(tp, 0x06, 0x69e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b80);
+        rtl8168_mdio_write(tp, 0x06, 0xad27);
+        rtl8168_mdio_write(tp, 0x06, 0x22bf);
+        rtl8168_mdio_write(tp, 0x06, 0x479a);
+        rtl8168_mdio_write(tp, 0x06, 0x0239);
+        rtl8168_mdio_write(tp, 0x06, 0xc6e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b44);
+        rtl8168_mdio_write(tp, 0x06, 0x1f01);
+        rtl8168_mdio_write(tp, 0x06, 0x9e15);
+        rtl8168_mdio_write(tp, 0x06, 0xe58b);
+        rtl8168_mdio_write(tp, 0x06, 0x44ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2907);
+        rtl8168_mdio_write(tp, 0x06, 0xac28);
+        rtl8168_mdio_write(tp, 0x06, 0x04d1);
+        rtl8168_mdio_write(tp, 0x06, 0x01ae);
+        rtl8168_mdio_write(tp, 0x06, 0x02d1);
+        rtl8168_mdio_write(tp, 0x06, 0x00bf);
+        rtl8168_mdio_write(tp, 0x06, 0x819e);
+        rtl8168_mdio_write(tp, 0x06, 0x0239);
+        rtl8168_mdio_write(tp, 0x06, 0xf3ef);
+        rtl8168_mdio_write(tp, 0x06, 0x96fe);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0x00e1);
+        rtl8168_mdio_write(tp, 0x06, 0x4077);
+        rtl8168_mdio_write(tp, 0x06, 0xe140);
+        rtl8168_mdio_write(tp, 0x06, 0xbbe0);
+        rtl8168_mdio_write(tp, 0x06, 0x2a00);
+        rtl8168_mdio_write(tp, 0x05, 0xe142);
+        gphy_val = rtl8168_mdio_read(tp, 0x06);
+        gphy_val |= BIT_0;
+        rtl8168_mdio_write(tp, 0x06, gphy_val);
+        rtl8168_mdio_write(tp, 0x05, 0xe140);
+        gphy_val = rtl8168_mdio_read(tp, 0x06);
+        gphy_val |= BIT_0;
+        rtl8168_mdio_write(tp, 0x06, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp,0x1f, 0x0005);
+        for (i = 0; i < 200; i++) {
+                udelay(100);
+                gphy_val = rtl8168_mdio_read(tp, 0x00);
+                if (gphy_val & BIT_7)
+                        break;
+        }
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1e, 0x0023);
+        gphy_val = rtl8168_mdio_read(tp, 0x17);
+        gphy_val |= BIT_1;
+        if (tp->RequiredSecLanDonglePatch)
+                gphy_val &= ~BIT_2;
+        rtl8168_mdio_write(tp, 0x17, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x00, 0x9200);
+}
+
+static void
+rtl8168_set_phy_mcu_8411_1(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        unsigned int gphy_val,i;
+
+        rtl8168_mdio_write(tp,0x1f, 0x0000);
+        rtl8168_mdio_write(tp,0x00, 0x1800);
+        gphy_val = rtl8168_mdio_read(tp, 0x15);
+        gphy_val &= ~(BIT_12);
+        rtl8168_mdio_write(tp,0x15, gphy_val);
+        rtl8168_mdio_write(tp,0x00, 0x4800);
+        rtl8168_mdio_write(tp,0x1f, 0x0007);
+        rtl8168_mdio_write(tp,0x1e, 0x002f);
+        for (i = 0; i < 1000; i++) {
+                udelay(100);
+                gphy_val = rtl8168_mdio_read(tp, 0x1c);
+                if (gphy_val & 0x0080)
+                        break;
+        }
+        rtl8168_mdio_write(tp,0x1f, 0x0000);
+        rtl8168_mdio_write(tp,0x00, 0x1800);
+        rtl8168_mdio_write(tp,0x1f, 0x0007);
+        rtl8168_mdio_write(tp,0x1e, 0x0023);
+        for (i = 0; i < 200; i++) {
+                udelay(100);
+                gphy_val = rtl8168_mdio_read(tp, 0x18);
+                if (!(gphy_val & 0x0001))
+                        break;
+        }
+        rtl8168_mdio_write(tp,0x1f, 0x0005);
+        rtl8168_mdio_write(tp,0x05, 0xfff6);
+        rtl8168_mdio_write(tp,0x06, 0x0080);
+        rtl8168_mdio_write(tp, 0x1f, 0x0007);
+        rtl8168_mdio_write(tp, 0x1e, 0x0023);
+        rtl8168_mdio_write(tp, 0x16, 0x0306);
+        rtl8168_mdio_write(tp, 0x16, 0x0307);
+        rtl8168_mdio_write(tp, 0x15, 0x0098);
+        rtl8168_mdio_write(tp, 0x19, 0x7c0b);
+        rtl8168_mdio_write(tp, 0x15, 0x0099);
+        rtl8168_mdio_write(tp, 0x19, 0x6c0b);
+        rtl8168_mdio_write(tp, 0x15, 0x00eb);
+        rtl8168_mdio_write(tp, 0x19, 0x6c0b);
+        rtl8168_mdio_write(tp, 0x15, 0x00f8);
+        rtl8168_mdio_write(tp, 0x19, 0x6f0b);
+        rtl8168_mdio_write(tp, 0x15, 0x00fe);
+        rtl8168_mdio_write(tp, 0x19, 0x6f0f);
+        rtl8168_mdio_write(tp, 0x15, 0x00db);
+        rtl8168_mdio_write(tp, 0x19, 0x6f09);
+        rtl8168_mdio_write(tp, 0x15, 0x00dc);
+        rtl8168_mdio_write(tp, 0x19, 0xaefd);
+        rtl8168_mdio_write(tp, 0x15, 0x00dd);
+        rtl8168_mdio_write(tp, 0x19, 0x6f0b);
+        rtl8168_mdio_write(tp, 0x15, 0x00de);
+        rtl8168_mdio_write(tp, 0x19, 0xc60b);
+        rtl8168_mdio_write(tp, 0x15, 0x00df);
+        rtl8168_mdio_write(tp, 0x19, 0x00fa);
+        rtl8168_mdio_write(tp, 0x15, 0x00e0);
+        rtl8168_mdio_write(tp, 0x19, 0x30e1);
+        rtl8168_mdio_write(tp, 0x15, 0x020c);
+        rtl8168_mdio_write(tp, 0x19, 0x3224);
+        rtl8168_mdio_write(tp, 0x15, 0x020e);
+        rtl8168_mdio_write(tp, 0x19, 0x9813);
+        rtl8168_mdio_write(tp, 0x15, 0x020f);
+        rtl8168_mdio_write(tp, 0x19, 0x7801);
+        rtl8168_mdio_write(tp, 0x15, 0x0210);
+        rtl8168_mdio_write(tp, 0x19, 0x930f);
+        rtl8168_mdio_write(tp, 0x15, 0x0211);
+        rtl8168_mdio_write(tp, 0x19, 0x9206);
+        rtl8168_mdio_write(tp, 0x15, 0x0212);
+        rtl8168_mdio_write(tp, 0x19, 0x4002);
+        rtl8168_mdio_write(tp, 0x15, 0x0213);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x0214);
+        rtl8168_mdio_write(tp, 0x19, 0x588f);
+        rtl8168_mdio_write(tp, 0x15, 0x0215);
+        rtl8168_mdio_write(tp, 0x19, 0x5520);
+        rtl8168_mdio_write(tp, 0x15, 0x0216);
+        rtl8168_mdio_write(tp, 0x19, 0x3224);
+        rtl8168_mdio_write(tp, 0x15, 0x0217);
+        rtl8168_mdio_write(tp, 0x19, 0x4002);
+        rtl8168_mdio_write(tp, 0x15, 0x0218);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x0219);
+        rtl8168_mdio_write(tp, 0x19, 0x588d);
+        rtl8168_mdio_write(tp, 0x15, 0x021a);
+        rtl8168_mdio_write(tp, 0x19, 0x5540);
+        rtl8168_mdio_write(tp, 0x15, 0x021b);
+        rtl8168_mdio_write(tp, 0x19, 0x9e03);
+        rtl8168_mdio_write(tp, 0x15, 0x021c);
+        rtl8168_mdio_write(tp, 0x19, 0x7c40);
+        rtl8168_mdio_write(tp, 0x15, 0x021d);
+        rtl8168_mdio_write(tp, 0x19, 0x6840);
+        rtl8168_mdio_write(tp, 0x15, 0x021e);
+        rtl8168_mdio_write(tp, 0x19, 0x3224);
+        rtl8168_mdio_write(tp, 0x15, 0x021f);
+        rtl8168_mdio_write(tp, 0x19, 0x4002);
+        rtl8168_mdio_write(tp, 0x15, 0x0220);
+        rtl8168_mdio_write(tp, 0x19, 0x3224);
+        rtl8168_mdio_write(tp, 0x15, 0x0221);
+        rtl8168_mdio_write(tp, 0x19, 0x9e03);
+        rtl8168_mdio_write(tp, 0x15, 0x0222);
+        rtl8168_mdio_write(tp, 0x19, 0x7c40);
+        rtl8168_mdio_write(tp, 0x15, 0x0223);
+        rtl8168_mdio_write(tp, 0x19, 0x6840);
+        rtl8168_mdio_write(tp, 0x15, 0x0224);
+        rtl8168_mdio_write(tp, 0x19, 0x7800);
+        rtl8168_mdio_write(tp, 0x15, 0x0225);
+        rtl8168_mdio_write(tp, 0x19, 0x3231);
+        rtl8168_mdio_write(tp, 0x15, 0x0000);
+        rtl8168_mdio_write(tp, 0x16, 0x0306);
+        rtl8168_mdio_write(tp, 0x16, 0x0300);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+        rtl8168_mdio_write(tp, 0x05, 0xfff6);
+        rtl8168_mdio_write(tp, 0x06, 0x0080);
+        rtl8168_mdio_write(tp, 0x05, 0x8000);
+        rtl8168_mdio_write(tp, 0x06, 0x0280);
+        rtl8168_mdio_write(tp, 0x06, 0x48f7);
+        rtl8168_mdio_write(tp, 0x06, 0x00e0);
+        rtl8168_mdio_write(tp, 0x06, 0xfff7);
+        rtl8168_mdio_write(tp, 0x06, 0xa080);
+        rtl8168_mdio_write(tp, 0x06, 0x02ae);
+        rtl8168_mdio_write(tp, 0x06, 0xf602);
+        rtl8168_mdio_write(tp, 0x06, 0x011e);
+        rtl8168_mdio_write(tp, 0x06, 0x0201);
+        rtl8168_mdio_write(tp, 0x06, 0x2b02);
+        rtl8168_mdio_write(tp, 0x06, 0x8077);
+        rtl8168_mdio_write(tp, 0x06, 0x0201);
+        rtl8168_mdio_write(tp, 0x06, 0x4802);
+        rtl8168_mdio_write(tp, 0x06, 0x0162);
+        rtl8168_mdio_write(tp, 0x06, 0x0280);
+        rtl8168_mdio_write(tp, 0x06, 0x9402);
+        rtl8168_mdio_write(tp, 0x06, 0x810e);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x88e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b89);
+        rtl8168_mdio_write(tp, 0x06, 0x1e01);
+        rtl8168_mdio_write(tp, 0x06, 0xe18b);
+        rtl8168_mdio_write(tp, 0x06, 0x8a1e);
+        rtl8168_mdio_write(tp, 0x06, 0x01e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8b);
+        rtl8168_mdio_write(tp, 0x06, 0x1e01);
+        rtl8168_mdio_write(tp, 0x06, 0xe18b);
+        rtl8168_mdio_write(tp, 0x06, 0x8c1e);
+        rtl8168_mdio_write(tp, 0x06, 0x01e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
+        rtl8168_mdio_write(tp, 0x06, 0x1e01);
+        rtl8168_mdio_write(tp, 0x06, 0xe18b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e1e);
+        rtl8168_mdio_write(tp, 0x06, 0x01a0);
+        rtl8168_mdio_write(tp, 0x06, 0x00c7);
+        rtl8168_mdio_write(tp, 0x06, 0xaebb);
+        rtl8168_mdio_write(tp, 0x06, 0xd481);
+        rtl8168_mdio_write(tp, 0x06, 0xd4e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b92);
+        rtl8168_mdio_write(tp, 0x06, 0xe58b);
+        rtl8168_mdio_write(tp, 0x06, 0x9302);
+        rtl8168_mdio_write(tp, 0x06, 0x2e5a);
+        rtl8168_mdio_write(tp, 0x06, 0xbf8b);
+        rtl8168_mdio_write(tp, 0x06, 0x88ec);
+        rtl8168_mdio_write(tp, 0x06, 0x0019);
+        rtl8168_mdio_write(tp, 0x06, 0xa98b);
+        rtl8168_mdio_write(tp, 0x06, 0x90f9);
+        rtl8168_mdio_write(tp, 0x06, 0xeeff);
+        rtl8168_mdio_write(tp, 0x06, 0xf600);
+        rtl8168_mdio_write(tp, 0x06, 0xeeff);
+        rtl8168_mdio_write(tp, 0x06, 0xf7fc);
+        rtl8168_mdio_write(tp, 0x06, 0xd100);
+        rtl8168_mdio_write(tp, 0x06, 0xbf83);
+        rtl8168_mdio_write(tp, 0x06, 0x3c02);
+        rtl8168_mdio_write(tp, 0x06, 0x3a21);
+        rtl8168_mdio_write(tp, 0x06, 0xd101);
+        rtl8168_mdio_write(tp, 0x06, 0xbf83);
+        rtl8168_mdio_write(tp, 0x06, 0x3f02);
+        rtl8168_mdio_write(tp, 0x06, 0x3a21);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8aad);
+        rtl8168_mdio_write(tp, 0x06, 0x2014);
+        rtl8168_mdio_write(tp, 0x06, 0xee8b);
+        rtl8168_mdio_write(tp, 0x06, 0x8a00);
+        rtl8168_mdio_write(tp, 0x06, 0x0220);
+        rtl8168_mdio_write(tp, 0x06, 0x8be0);
+        rtl8168_mdio_write(tp, 0x06, 0xe426);
+        rtl8168_mdio_write(tp, 0x06, 0xe1e4);
+        rtl8168_mdio_write(tp, 0x06, 0x27ee);
+        rtl8168_mdio_write(tp, 0x06, 0xe426);
+        rtl8168_mdio_write(tp, 0x06, 0x23e5);
+        rtl8168_mdio_write(tp, 0x06, 0xe427);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
+        rtl8168_mdio_write(tp, 0x06, 0xad20);
+        rtl8168_mdio_write(tp, 0x06, 0x14ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
+        rtl8168_mdio_write(tp, 0x06, 0x00e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8a5a);
+        rtl8168_mdio_write(tp, 0x06, 0x7803);
+        rtl8168_mdio_write(tp, 0x06, 0x9e09);
+        rtl8168_mdio_write(tp, 0x06, 0x0206);
+        rtl8168_mdio_write(tp, 0x06, 0x2802);
+        rtl8168_mdio_write(tp, 0x06, 0x80b1);
+        rtl8168_mdio_write(tp, 0x06, 0x0232);
+        rtl8168_mdio_write(tp, 0x06, 0xfdfc);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xf9e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b81);
+        rtl8168_mdio_write(tp, 0x06, 0xac26);
+        rtl8168_mdio_write(tp, 0x06, 0x1ae0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b81);
+        rtl8168_mdio_write(tp, 0x06, 0xac21);
+        rtl8168_mdio_write(tp, 0x06, 0x14e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b85);
+        rtl8168_mdio_write(tp, 0x06, 0xac20);
+        rtl8168_mdio_write(tp, 0x06, 0x0ee0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b85);
+        rtl8168_mdio_write(tp, 0x06, 0xac23);
+        rtl8168_mdio_write(tp, 0x06, 0x08e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b87);
+        rtl8168_mdio_write(tp, 0x06, 0xac24);
+        rtl8168_mdio_write(tp, 0x06, 0x02ae);
+        rtl8168_mdio_write(tp, 0x06, 0x3802);
+        rtl8168_mdio_write(tp, 0x06, 0x1b02);
+        rtl8168_mdio_write(tp, 0x06, 0xeee4);
+        rtl8168_mdio_write(tp, 0x06, 0x1c04);
+        rtl8168_mdio_write(tp, 0x06, 0xeee4);
+        rtl8168_mdio_write(tp, 0x06, 0x1d04);
+        rtl8168_mdio_write(tp, 0x06, 0xe2e0);
+        rtl8168_mdio_write(tp, 0x06, 0x7ce3);
+        rtl8168_mdio_write(tp, 0x06, 0xe07d);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+        rtl8168_mdio_write(tp, 0x06, 0x38e1);
+        rtl8168_mdio_write(tp, 0x06, 0xe039);
+        rtl8168_mdio_write(tp, 0x06, 0xad2e);
+        rtl8168_mdio_write(tp, 0x06, 0x1bad);
+        rtl8168_mdio_write(tp, 0x06, 0x390d);
+        rtl8168_mdio_write(tp, 0x06, 0xd101);
+        rtl8168_mdio_write(tp, 0x06, 0xbf22);
+        rtl8168_mdio_write(tp, 0x06, 0xe802);
+        rtl8168_mdio_write(tp, 0x06, 0x3a21);
+        rtl8168_mdio_write(tp, 0x06, 0x0222);
+        rtl8168_mdio_write(tp, 0x06, 0x10ae);
+        rtl8168_mdio_write(tp, 0x06, 0x0bac);
+        rtl8168_mdio_write(tp, 0x06, 0x3802);
+        rtl8168_mdio_write(tp, 0x06, 0xae06);
+        rtl8168_mdio_write(tp, 0x06, 0x0222);
+        rtl8168_mdio_write(tp, 0x06, 0x4d02);
+        rtl8168_mdio_write(tp, 0x06, 0x2292);
+        rtl8168_mdio_write(tp, 0x06, 0x021b);
+        rtl8168_mdio_write(tp, 0x06, 0x13fd);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xad20);
+        rtl8168_mdio_write(tp, 0x06, 0x1af6);
+        rtl8168_mdio_write(tp, 0x06, 0x20e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0x022b);
+        rtl8168_mdio_write(tp, 0x06, 0x1e02);
+        rtl8168_mdio_write(tp, 0x06, 0x82ae);
+        rtl8168_mdio_write(tp, 0x06, 0x0203);
+        rtl8168_mdio_write(tp, 0x06, 0xc002);
+        rtl8168_mdio_write(tp, 0x06, 0x827d);
+        rtl8168_mdio_write(tp, 0x06, 0x022e);
+        rtl8168_mdio_write(tp, 0x06, 0x6f02);
+        rtl8168_mdio_write(tp, 0x06, 0x047b);
+        rtl8168_mdio_write(tp, 0x06, 0x022f);
+        rtl8168_mdio_write(tp, 0x06, 0x9ae0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xad21);
+        rtl8168_mdio_write(tp, 0x06, 0x0bf6);
+        rtl8168_mdio_write(tp, 0x06, 0x21e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0x0281);
+        rtl8168_mdio_write(tp, 0x06, 0x9002);
+        rtl8168_mdio_write(tp, 0x06, 0x1cd9);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ead);
+        rtl8168_mdio_write(tp, 0x06, 0x2208);
+        rtl8168_mdio_write(tp, 0x06, 0xf622);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e02);
+        rtl8168_mdio_write(tp, 0x06, 0x35f4);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ead);
+        rtl8168_mdio_write(tp, 0x06, 0x2308);
+        rtl8168_mdio_write(tp, 0x06, 0xf623);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e02);
+        rtl8168_mdio_write(tp, 0x06, 0x31e8);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ead);
+        rtl8168_mdio_write(tp, 0x06, 0x2405);
+        rtl8168_mdio_write(tp, 0x06, 0xf624);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ee0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xad25);
+        rtl8168_mdio_write(tp, 0x06, 0x05f6);
+        rtl8168_mdio_write(tp, 0x06, 0x25e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ead);
+        rtl8168_mdio_write(tp, 0x06, 0x2608);
+        rtl8168_mdio_write(tp, 0x06, 0xf626);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e02);
+        rtl8168_mdio_write(tp, 0x06, 0x2d8a);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x8ead);
+        rtl8168_mdio_write(tp, 0x06, 0x2705);
+        rtl8168_mdio_write(tp, 0x06, 0xf627);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x8e02);
+        rtl8168_mdio_write(tp, 0x06, 0x0386);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8fa);
+        rtl8168_mdio_write(tp, 0x06, 0xef69);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+        rtl8168_mdio_write(tp, 0x06, 0x00e1);
+        rtl8168_mdio_write(tp, 0x06, 0xe001);
+        rtl8168_mdio_write(tp, 0x06, 0xad27);
+        rtl8168_mdio_write(tp, 0x06, 0x32e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b40);
+        rtl8168_mdio_write(tp, 0x06, 0xf720);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x40bf);
+        rtl8168_mdio_write(tp, 0x06, 0x32c1);
+        rtl8168_mdio_write(tp, 0x06, 0x0239);
+        rtl8168_mdio_write(tp, 0x06, 0xf4ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2821);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+        rtl8168_mdio_write(tp, 0x06, 0x20e1);
+        rtl8168_mdio_write(tp, 0x06, 0xe021);
+        rtl8168_mdio_write(tp, 0x06, 0xad20);
+        rtl8168_mdio_write(tp, 0x06, 0x18e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b40);
+        rtl8168_mdio_write(tp, 0x06, 0xf620);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x40ee);
+        rtl8168_mdio_write(tp, 0x06, 0x8b3b);
+        rtl8168_mdio_write(tp, 0x06, 0xffe0);
+        rtl8168_mdio_write(tp, 0x06, 0x8a8a);
+        rtl8168_mdio_write(tp, 0x06, 0xe18a);
+        rtl8168_mdio_write(tp, 0x06, 0x8be4);
+        rtl8168_mdio_write(tp, 0x06, 0xe000);
+        rtl8168_mdio_write(tp, 0x06, 0xe5e0);
+        rtl8168_mdio_write(tp, 0x06, 0x01ef);
+        rtl8168_mdio_write(tp, 0x06, 0x96fe);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x06, 0xface);
+        rtl8168_mdio_write(tp, 0x06, 0xfaef);
+        rtl8168_mdio_write(tp, 0x06, 0x69fa);
+        rtl8168_mdio_write(tp, 0x06, 0xd401);
+        rtl8168_mdio_write(tp, 0x06, 0x55b4);
+        rtl8168_mdio_write(tp, 0x06, 0xfebf);
+        rtl8168_mdio_write(tp, 0x06, 0x1c5e);
+        rtl8168_mdio_write(tp, 0x06, 0x0239);
+        rtl8168_mdio_write(tp, 0x06, 0xf4ac);
+        rtl8168_mdio_write(tp, 0x06, 0x280b);
+        rtl8168_mdio_write(tp, 0x06, 0xbf1c);
+        rtl8168_mdio_write(tp, 0x06, 0x5b02);
+        rtl8168_mdio_write(tp, 0x06, 0x39f4);
+        rtl8168_mdio_write(tp, 0x06, 0xac28);
+        rtl8168_mdio_write(tp, 0x06, 0x49ae);
+        rtl8168_mdio_write(tp, 0x06, 0x64bf);
+        rtl8168_mdio_write(tp, 0x06, 0x1c5b);
+        rtl8168_mdio_write(tp, 0x06, 0x0239);
+        rtl8168_mdio_write(tp, 0x06, 0xf4ac);
+        rtl8168_mdio_write(tp, 0x06, 0x285b);
+        rtl8168_mdio_write(tp, 0x06, 0xd000);
+        rtl8168_mdio_write(tp, 0x06, 0x0282);
+        rtl8168_mdio_write(tp, 0x06, 0x62ac);
+        rtl8168_mdio_write(tp, 0x06, 0x2105);
+        rtl8168_mdio_write(tp, 0x06, 0xac22);
+        rtl8168_mdio_write(tp, 0x06, 0x02ae);
+        rtl8168_mdio_write(tp, 0x06, 0x4ebf);
+        rtl8168_mdio_write(tp, 0x06, 0xe0c4);
+        rtl8168_mdio_write(tp, 0x06, 0xbe85);
+        rtl8168_mdio_write(tp, 0x06, 0xecd2);
+        rtl8168_mdio_write(tp, 0x06, 0x04d8);
+        rtl8168_mdio_write(tp, 0x06, 0x19d9);
+        rtl8168_mdio_write(tp, 0x06, 0x1907);
+        rtl8168_mdio_write(tp, 0x06, 0xdc19);
+        rtl8168_mdio_write(tp, 0x06, 0xdd19);
+        rtl8168_mdio_write(tp, 0x06, 0x0789);
+        rtl8168_mdio_write(tp, 0x06, 0x89ef);
+        rtl8168_mdio_write(tp, 0x06, 0x645e);
+        rtl8168_mdio_write(tp, 0x06, 0x07ff);
+        rtl8168_mdio_write(tp, 0x06, 0x0d65);
+        rtl8168_mdio_write(tp, 0x06, 0x5cf8);
+        rtl8168_mdio_write(tp, 0x06, 0x001e);
+        rtl8168_mdio_write(tp, 0x06, 0x46dc);
+        rtl8168_mdio_write(tp, 0x06, 0x19dd);
+        rtl8168_mdio_write(tp, 0x06, 0x19b2);
+        rtl8168_mdio_write(tp, 0x06, 0xe2d4);
+        rtl8168_mdio_write(tp, 0x06, 0x0001);
+        rtl8168_mdio_write(tp, 0x06, 0xbf1c);
+        rtl8168_mdio_write(tp, 0x06, 0x5b02);
+        rtl8168_mdio_write(tp, 0x06, 0x3a21);
+        rtl8168_mdio_write(tp, 0x06, 0xae1d);
+        rtl8168_mdio_write(tp, 0x06, 0xbee0);
+        rtl8168_mdio_write(tp, 0x06, 0xc4bf);
+        rtl8168_mdio_write(tp, 0x06, 0x85ec);
+        rtl8168_mdio_write(tp, 0x06, 0xd204);
+        rtl8168_mdio_write(tp, 0x06, 0xd819);
+        rtl8168_mdio_write(tp, 0x06, 0xd919);
+        rtl8168_mdio_write(tp, 0x06, 0x07dc);
+        rtl8168_mdio_write(tp, 0x06, 0x19dd);
+        rtl8168_mdio_write(tp, 0x06, 0x1907);
+        rtl8168_mdio_write(tp, 0x06, 0xb2f4);
+        rtl8168_mdio_write(tp, 0x06, 0xd400);
+        rtl8168_mdio_write(tp, 0x06, 0x00bf);
+        rtl8168_mdio_write(tp, 0x06, 0x1c5b);
+        rtl8168_mdio_write(tp, 0x06, 0x023a);
+        rtl8168_mdio_write(tp, 0x06, 0x21fe);
+        rtl8168_mdio_write(tp, 0x06, 0xef96);
+        rtl8168_mdio_write(tp, 0x06, 0xfec6);
+        rtl8168_mdio_write(tp, 0x06, 0xfefd);
+        rtl8168_mdio_write(tp, 0x06, 0xfc05);
+        rtl8168_mdio_write(tp, 0x06, 0xf9e2);
+        rtl8168_mdio_write(tp, 0x06, 0xe0ea);
+        rtl8168_mdio_write(tp, 0x06, 0xe3e0);
+        rtl8168_mdio_write(tp, 0x06, 0xeb5a);
+        rtl8168_mdio_write(tp, 0x06, 0x070c);
+        rtl8168_mdio_write(tp, 0x06, 0x031e);
+        rtl8168_mdio_write(tp, 0x06, 0x20e6);
+        rtl8168_mdio_write(tp, 0x06, 0xe0ea);
+        rtl8168_mdio_write(tp, 0x06, 0xe7e0);
+        rtl8168_mdio_write(tp, 0x06, 0xebe0);
+        rtl8168_mdio_write(tp, 0x06, 0xe0fc);
+        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+        rtl8168_mdio_write(tp, 0x06, 0xfdfd);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xfaef);
+        rtl8168_mdio_write(tp, 0x06, 0x69e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b80);
+        rtl8168_mdio_write(tp, 0x06, 0xad27);
+        rtl8168_mdio_write(tp, 0x06, 0x22bf);
+        rtl8168_mdio_write(tp, 0x06, 0x47ba);
+        rtl8168_mdio_write(tp, 0x06, 0x0239);
+        rtl8168_mdio_write(tp, 0x06, 0xf4e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b44);
+        rtl8168_mdio_write(tp, 0x06, 0x1f01);
+        rtl8168_mdio_write(tp, 0x06, 0x9e15);
+        rtl8168_mdio_write(tp, 0x06, 0xe58b);
+        rtl8168_mdio_write(tp, 0x06, 0x44ad);
+        rtl8168_mdio_write(tp, 0x06, 0x2907);
+        rtl8168_mdio_write(tp, 0x06, 0xac28);
+        rtl8168_mdio_write(tp, 0x06, 0x04d1);
+        rtl8168_mdio_write(tp, 0x06, 0x01ae);
+        rtl8168_mdio_write(tp, 0x06, 0x02d1);
+        rtl8168_mdio_write(tp, 0x06, 0x00bf);
+        rtl8168_mdio_write(tp, 0x06, 0x8342);
+        rtl8168_mdio_write(tp, 0x06, 0x023a);
+        rtl8168_mdio_write(tp, 0x06, 0x21ef);
+        rtl8168_mdio_write(tp, 0x06, 0x96fe);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b85);
+        rtl8168_mdio_write(tp, 0x06, 0xad26);
+        rtl8168_mdio_write(tp, 0x06, 0x30e0);
+        rtl8168_mdio_write(tp, 0x06, 0xe036);
+        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
+        rtl8168_mdio_write(tp, 0x06, 0x37e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b3f);
+        rtl8168_mdio_write(tp, 0x06, 0x1f10);
+        rtl8168_mdio_write(tp, 0x06, 0x9e23);
+        rtl8168_mdio_write(tp, 0x06, 0xe48b);
+        rtl8168_mdio_write(tp, 0x06, 0x3fac);
+        rtl8168_mdio_write(tp, 0x06, 0x200b);
+        rtl8168_mdio_write(tp, 0x06, 0xac21);
+        rtl8168_mdio_write(tp, 0x06, 0x0dac);
+        rtl8168_mdio_write(tp, 0x06, 0x250f);
+        rtl8168_mdio_write(tp, 0x06, 0xac27);
+        rtl8168_mdio_write(tp, 0x06, 0x11ae);
+        rtl8168_mdio_write(tp, 0x06, 0x1202);
+        rtl8168_mdio_write(tp, 0x06, 0x2cb5);
+        rtl8168_mdio_write(tp, 0x06, 0xae0d);
+        rtl8168_mdio_write(tp, 0x06, 0x0282);
+        rtl8168_mdio_write(tp, 0x06, 0xe7ae);
+        rtl8168_mdio_write(tp, 0x06, 0x0802);
+        rtl8168_mdio_write(tp, 0x06, 0x2cd7);
+        rtl8168_mdio_write(tp, 0x06, 0xae03);
+        rtl8168_mdio_write(tp, 0x06, 0x022c);
+        rtl8168_mdio_write(tp, 0x06, 0xeafc);
+        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+        rtl8168_mdio_write(tp, 0x06, 0xfaef);
+        rtl8168_mdio_write(tp, 0x06, 0x6902);
+        rtl8168_mdio_write(tp, 0x06, 0x8304);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+        rtl8168_mdio_write(tp, 0x06, 0x14e1);
+        rtl8168_mdio_write(tp, 0x06, 0xe015);
+        rtl8168_mdio_write(tp, 0x06, 0xad26);
+        rtl8168_mdio_write(tp, 0x06, 0x08d1);
+        rtl8168_mdio_write(tp, 0x06, 0x1ebf);
+        rtl8168_mdio_write(tp, 0x06, 0x2d47);
+        rtl8168_mdio_write(tp, 0x06, 0x023a);
+        rtl8168_mdio_write(tp, 0x06, 0x21ef);
+        rtl8168_mdio_write(tp, 0x06, 0x96fe);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+        rtl8168_mdio_write(tp, 0x06, 0x8b85);
+        rtl8168_mdio_write(tp, 0x06, 0xad27);
+        rtl8168_mdio_write(tp, 0x06, 0x2fd0);
+        rtl8168_mdio_write(tp, 0x06, 0x0b02);
+        rtl8168_mdio_write(tp, 0x06, 0x3826);
+        rtl8168_mdio_write(tp, 0x06, 0x5882);
+        rtl8168_mdio_write(tp, 0x06, 0x7882);
+        rtl8168_mdio_write(tp, 0x06, 0x9f24);
+        rtl8168_mdio_write(tp, 0x06, 0xe08b);
+        rtl8168_mdio_write(tp, 0x06, 0x32e1);
+        rtl8168_mdio_write(tp, 0x06, 0x8b33);
+        rtl8168_mdio_write(tp, 0x06, 0x1f10);
+        rtl8168_mdio_write(tp, 0x06, 0x9e1a);
+        rtl8168_mdio_write(tp, 0x06, 0x10e4);
+        rtl8168_mdio_write(tp, 0x06, 0x8b32);
+        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
+        rtl8168_mdio_write(tp, 0x06, 0x28e1);
+        rtl8168_mdio_write(tp, 0x06, 0xe029);
+        rtl8168_mdio_write(tp, 0x06, 0xf72c);
+        rtl8168_mdio_write(tp, 0x06, 0xe4e0);
+        rtl8168_mdio_write(tp, 0x06, 0x28e5);
+        rtl8168_mdio_write(tp, 0x06, 0xe029);
+        rtl8168_mdio_write(tp, 0x06, 0xf62c);
+        rtl8168_mdio_write(tp, 0x06, 0xe4e0);
+        rtl8168_mdio_write(tp, 0x06, 0x28e5);
+        rtl8168_mdio_write(tp, 0x06, 0xe029);
+        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+        rtl8168_mdio_write(tp, 0x06, 0x00e1);
+        rtl8168_mdio_write(tp, 0x06, 0x4077);
+        rtl8168_mdio_write(tp, 0x06, 0xe140);
+        rtl8168_mdio_write(tp, 0x06, 0xbbe0);
+        rtl8168_mdio_write(tp, 0x06, 0x2a00);
+        rtl8168_mdio_write(tp, 0x05, 0xe142);
+        gphy_val = rtl8168_mdio_read(tp, 0x06);
+        gphy_val |= BIT_0;
+        rtl8168_mdio_write(tp,0x06, gphy_val);
+        rtl8168_mdio_write(tp, 0x05, 0xe140);
+        gphy_val = rtl8168_mdio_read(tp, 0x06);
+        gphy_val |= BIT_0;
+        rtl8168_mdio_write(tp,0x06, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        rtl8168_mdio_write(tp,0x1f, 0x0005);
+        for (i = 0; i < 200; i++) {
+                udelay(100);
+                gphy_val = rtl8168_mdio_read(tp, 0x00);
+                if (gphy_val & BIT_7)
+                        break;
+        }
+        rtl8168_mdio_write(tp,0x1f, 0x0007);
+        rtl8168_mdio_write(tp,0x1e, 0x0023);
+        gphy_val = rtl8168_mdio_read(tp, 0x17);
+        gphy_val |= BIT_1;
+        if (tp->RequiredSecLanDonglePatch)
+                gphy_val &= ~BIT_2;
+        rtl8168_mdio_write(tp,0x17, gphy_val);
+        rtl8168_mdio_write(tp,0x1f, 0x0000);
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0003);
+        rtl8168_mdio_write(tp, 0x09, 0xA20F);
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0003);
+        rtl8168_mdio_write(tp, 0x01, 0x328A);
+        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+        rtl8168_mdio_write(tp,0x1f, 0x0000);
+        rtl8168_mdio_write(tp,0x00, 0x9200);
+}
+
+static void
+rtl8168_set_phy_mcu_8168g_1(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        unsigned int gphy_val;
+
+        rtl8168_set_phy_mcu_patch_request(tp);
+        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x8146);
+        rtl8168_mdio_write(tp, 0x14, 0x2300);
+        rtl8168_mdio_write(tp, 0x13, 0xB820);
+        rtl8168_mdio_write(tp, 0x14, 0x0210);
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0xB820);
+        rtl8168_mdio_write(tp, 0x14, 0x0290);
+        rtl8168_mdio_write(tp, 0x13, 0xA012);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x13, 0xA014);
+        rtl8168_mdio_write(tp, 0x14, 0x2c04);
+        rtl8168_mdio_write(tp, 0x14, 0x2c0c);
+        rtl8168_mdio_write(tp, 0x14, 0x2c6c);
+        rtl8168_mdio_write(tp, 0x14, 0x2d0d);
+        rtl8168_mdio_write(tp, 0x14, 0x31ce);
+        rtl8168_mdio_write(tp, 0x14, 0x506d);
+        rtl8168_mdio_write(tp, 0x14, 0xd708);
+        rtl8168_mdio_write(tp, 0x14, 0x3108);
+        rtl8168_mdio_write(tp, 0x14, 0x106d);
+        rtl8168_mdio_write(tp, 0x14, 0x1560);
+        rtl8168_mdio_write(tp, 0x14, 0x15a9);
+        rtl8168_mdio_write(tp, 0x14, 0x206e);
+        rtl8168_mdio_write(tp, 0x14, 0x175b);
+        rtl8168_mdio_write(tp, 0x14, 0x6062);
+        rtl8168_mdio_write(tp, 0x14, 0xd700);
+        rtl8168_mdio_write(tp, 0x14, 0x5fae);
+        rtl8168_mdio_write(tp, 0x14, 0xd708);
+        rtl8168_mdio_write(tp, 0x14, 0x3107);
+        rtl8168_mdio_write(tp, 0x14, 0x4c1e);
+        rtl8168_mdio_write(tp, 0x14, 0x4169);
+        rtl8168_mdio_write(tp, 0x14, 0x316a);
+        rtl8168_mdio_write(tp, 0x14, 0x0c19);
+        rtl8168_mdio_write(tp, 0x14, 0x31aa);
+        rtl8168_mdio_write(tp, 0x14, 0x0c19);
+        rtl8168_mdio_write(tp, 0x14, 0x2c1b);
+        rtl8168_mdio_write(tp, 0x14, 0x5e62);
+        rtl8168_mdio_write(tp, 0x14, 0x26b5);
+        rtl8168_mdio_write(tp, 0x14, 0x31ab);
+        rtl8168_mdio_write(tp, 0x14, 0x5c1e);
+        rtl8168_mdio_write(tp, 0x14, 0x2c0c);
+        rtl8168_mdio_write(tp, 0x14, 0xc040);
+        rtl8168_mdio_write(tp, 0x14, 0x8808);
+        rtl8168_mdio_write(tp, 0x14, 0xc520);
+        rtl8168_mdio_write(tp, 0x14, 0xc421);
+        rtl8168_mdio_write(tp, 0x14, 0xd05a);
+        rtl8168_mdio_write(tp, 0x14, 0xd19a);
+        rtl8168_mdio_write(tp, 0x14, 0xd709);
+        rtl8168_mdio_write(tp, 0x14, 0x608f);
+        rtl8168_mdio_write(tp, 0x14, 0xd06b);
+        rtl8168_mdio_write(tp, 0x14, 0xd18a);
+        rtl8168_mdio_write(tp, 0x14, 0x2c2c);
+        rtl8168_mdio_write(tp, 0x14, 0xd0be);
+        rtl8168_mdio_write(tp, 0x14, 0xd188);
+        rtl8168_mdio_write(tp, 0x14, 0x2c2c);
+        rtl8168_mdio_write(tp, 0x14, 0xd708);
+        rtl8168_mdio_write(tp, 0x14, 0x4072);
+        rtl8168_mdio_write(tp, 0x14, 0xc104);
+        rtl8168_mdio_write(tp, 0x14, 0x2c3e);
+        rtl8168_mdio_write(tp, 0x14, 0x4076);
+        rtl8168_mdio_write(tp, 0x14, 0xc110);
+        rtl8168_mdio_write(tp, 0x14, 0x2c3e);
+        rtl8168_mdio_write(tp, 0x14, 0x4071);
+        rtl8168_mdio_write(tp, 0x14, 0xc102);
+        rtl8168_mdio_write(tp, 0x14, 0x2c3e);
+        rtl8168_mdio_write(tp, 0x14, 0x4070);
+        rtl8168_mdio_write(tp, 0x14, 0xc101);
+        rtl8168_mdio_write(tp, 0x14, 0x2c3e);
+        rtl8168_mdio_write(tp, 0x14, 0x175b);
+        rtl8168_mdio_write(tp, 0x14, 0xd709);
+        rtl8168_mdio_write(tp, 0x14, 0x3390);
+        rtl8168_mdio_write(tp, 0x14, 0x5c39);
+        rtl8168_mdio_write(tp, 0x14, 0x2c4e);
+        rtl8168_mdio_write(tp, 0x14, 0x175b);
+        rtl8168_mdio_write(tp, 0x14, 0xd708);
+        rtl8168_mdio_write(tp, 0x14, 0x6193);
+        rtl8168_mdio_write(tp, 0x14, 0xd709);
+        rtl8168_mdio_write(tp, 0x14, 0x5f9d);
+        rtl8168_mdio_write(tp, 0x14, 0x408b);
+        rtl8168_mdio_write(tp, 0x14, 0xd71e);
+        rtl8168_mdio_write(tp, 0x14, 0x6042);
+        rtl8168_mdio_write(tp, 0x14, 0xb401);
+        rtl8168_mdio_write(tp, 0x14, 0x175b);
+        rtl8168_mdio_write(tp, 0x14, 0xd708);
+        rtl8168_mdio_write(tp, 0x14, 0x6073);
+        rtl8168_mdio_write(tp, 0x14, 0x5fbc);
+        rtl8168_mdio_write(tp, 0x14, 0x2c4d);
+        rtl8168_mdio_write(tp, 0x14, 0x26ed);
+        rtl8168_mdio_write(tp, 0x14, 0xb280);
+        rtl8168_mdio_write(tp, 0x14, 0xa841);
+        rtl8168_mdio_write(tp, 0x14, 0x9420);
+        rtl8168_mdio_write(tp, 0x14, 0x8710);
+        rtl8168_mdio_write(tp, 0x14, 0xd709);
+        rtl8168_mdio_write(tp, 0x14, 0x42ec);
+        rtl8168_mdio_write(tp, 0x14, 0x606d);
+        rtl8168_mdio_write(tp, 0x14, 0xd207);
+        rtl8168_mdio_write(tp, 0x14, 0x2c57);
+        rtl8168_mdio_write(tp, 0x14, 0xd203);
+        rtl8168_mdio_write(tp, 0x14, 0x33ff);
+        rtl8168_mdio_write(tp, 0x14, 0x563b);
+        rtl8168_mdio_write(tp, 0x14, 0x3275);
+        rtl8168_mdio_write(tp, 0x14, 0x7c5e);
+        rtl8168_mdio_write(tp, 0x14, 0xb240);
+        rtl8168_mdio_write(tp, 0x14, 0xb402);
+        rtl8168_mdio_write(tp, 0x14, 0x263b);
+        rtl8168_mdio_write(tp, 0x14, 0x6096);
+        rtl8168_mdio_write(tp, 0x14, 0xb240);
+        rtl8168_mdio_write(tp, 0x14, 0xb406);
+        rtl8168_mdio_write(tp, 0x14, 0x263b);
+        rtl8168_mdio_write(tp, 0x14, 0x31d7);
+        rtl8168_mdio_write(tp, 0x14, 0x7c67);
+        rtl8168_mdio_write(tp, 0x14, 0xb240);
+        rtl8168_mdio_write(tp, 0x14, 0xb40e);
+        rtl8168_mdio_write(tp, 0x14, 0x263b);
+        rtl8168_mdio_write(tp, 0x14, 0xb410);
+        rtl8168_mdio_write(tp, 0x14, 0x8802);
+        rtl8168_mdio_write(tp, 0x14, 0xb240);
+        rtl8168_mdio_write(tp, 0x14, 0x940e);
+        rtl8168_mdio_write(tp, 0x14, 0x263b);
+        rtl8168_mdio_write(tp, 0x14, 0xba04);
+        rtl8168_mdio_write(tp, 0x14, 0x1cd6);
+        rtl8168_mdio_write(tp, 0x14, 0xa902);
+        rtl8168_mdio_write(tp, 0x14, 0xd711);
+        rtl8168_mdio_write(tp, 0x14, 0x4045);
+        rtl8168_mdio_write(tp, 0x14, 0xa980);
+        rtl8168_mdio_write(tp, 0x14, 0x3003);
+        rtl8168_mdio_write(tp, 0x14, 0x59b1);
+        rtl8168_mdio_write(tp, 0x14, 0xa540);
+        rtl8168_mdio_write(tp, 0x14, 0xa601);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x4043);
+        rtl8168_mdio_write(tp, 0x14, 0xa910);
+        rtl8168_mdio_write(tp, 0x14, 0xd711);
+        rtl8168_mdio_write(tp, 0x14, 0x60a0);
+        rtl8168_mdio_write(tp, 0x14, 0xca33);
+        rtl8168_mdio_write(tp, 0x14, 0xcb33);
+        rtl8168_mdio_write(tp, 0x14, 0xa941);
+        rtl8168_mdio_write(tp, 0x14, 0x2c82);
+        rtl8168_mdio_write(tp, 0x14, 0xcaff);
+        rtl8168_mdio_write(tp, 0x14, 0xcbff);
+        rtl8168_mdio_write(tp, 0x14, 0xa921);
+        rtl8168_mdio_write(tp, 0x14, 0xce02);
+        rtl8168_mdio_write(tp, 0x14, 0xe070);
+        rtl8168_mdio_write(tp, 0x14, 0x0f10);
+        rtl8168_mdio_write(tp, 0x14, 0xaf01);
+        rtl8168_mdio_write(tp, 0x14, 0x8f01);
+        rtl8168_mdio_write(tp, 0x14, 0x1766);
+        rtl8168_mdio_write(tp, 0x14, 0x8e02);
+        rtl8168_mdio_write(tp, 0x14, 0x1787);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x609c);
+        rtl8168_mdio_write(tp, 0x14, 0xd71e);
+        rtl8168_mdio_write(tp, 0x14, 0x7fa4);
+        rtl8168_mdio_write(tp, 0x14, 0x2cd4);
+        rtl8168_mdio_write(tp, 0x14, 0x1ce9);
+        rtl8168_mdio_write(tp, 0x14, 0xce04);
+        rtl8168_mdio_write(tp, 0x14, 0xe070);
+        rtl8168_mdio_write(tp, 0x14, 0x0f20);
+        rtl8168_mdio_write(tp, 0x14, 0xaf01);
+        rtl8168_mdio_write(tp, 0x14, 0x8f01);
+        rtl8168_mdio_write(tp, 0x14, 0x1766);
+        rtl8168_mdio_write(tp, 0x14, 0x8e04);
+        rtl8168_mdio_write(tp, 0x14, 0x6044);
+        rtl8168_mdio_write(tp, 0x14, 0x2cd4);
+        rtl8168_mdio_write(tp, 0x14, 0xa520);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x4043);
+        rtl8168_mdio_write(tp, 0x14, 0x2cc1);
+        rtl8168_mdio_write(tp, 0x14, 0xe00f);
+        rtl8168_mdio_write(tp, 0x14, 0x0501);
+        rtl8168_mdio_write(tp, 0x14, 0x1cef);
+        rtl8168_mdio_write(tp, 0x14, 0xb801);
+        rtl8168_mdio_write(tp, 0x14, 0xd71e);
+        rtl8168_mdio_write(tp, 0x14, 0x4060);
+        rtl8168_mdio_write(tp, 0x14, 0x7fc4);
+        rtl8168_mdio_write(tp, 0x14, 0x2cd4);
+        rtl8168_mdio_write(tp, 0x14, 0x1cf5);
+        rtl8168_mdio_write(tp, 0x14, 0xe00f);
+        rtl8168_mdio_write(tp, 0x14, 0x0502);
+        rtl8168_mdio_write(tp, 0x14, 0x1cef);
+        rtl8168_mdio_write(tp, 0x14, 0xb802);
+        rtl8168_mdio_write(tp, 0x14, 0xd71e);
+        rtl8168_mdio_write(tp, 0x14, 0x4061);
+        rtl8168_mdio_write(tp, 0x14, 0x7fc4);
+        rtl8168_mdio_write(tp, 0x14, 0x2cd4);
+        rtl8168_mdio_write(tp, 0x14, 0x1cf5);
+        rtl8168_mdio_write(tp, 0x14, 0xe00f);
+        rtl8168_mdio_write(tp, 0x14, 0x0504);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x6099);
+        rtl8168_mdio_write(tp, 0x14, 0xd71e);
+        rtl8168_mdio_write(tp, 0x14, 0x7fa4);
+        rtl8168_mdio_write(tp, 0x14, 0x2cd4);
+        rtl8168_mdio_write(tp, 0x14, 0xc17f);
+        rtl8168_mdio_write(tp, 0x14, 0xc200);
+        rtl8168_mdio_write(tp, 0x14, 0xc43f);
+        rtl8168_mdio_write(tp, 0x14, 0xcc03);
+        rtl8168_mdio_write(tp, 0x14, 0xa701);
+        rtl8168_mdio_write(tp, 0x14, 0xa510);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x4018);
+        rtl8168_mdio_write(tp, 0x14, 0x9910);
+        rtl8168_mdio_write(tp, 0x14, 0x8510);
+        rtl8168_mdio_write(tp, 0x14, 0x2860);
+        rtl8168_mdio_write(tp, 0x14, 0xe00f);
+        rtl8168_mdio_write(tp, 0x14, 0x0504);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x6099);
+        rtl8168_mdio_write(tp, 0x14, 0xd71e);
+        rtl8168_mdio_write(tp, 0x14, 0x7fa4);
+        rtl8168_mdio_write(tp, 0x14, 0x2cd4);
+        rtl8168_mdio_write(tp, 0x14, 0xa608);
+        rtl8168_mdio_write(tp, 0x14, 0xc17d);
+        rtl8168_mdio_write(tp, 0x14, 0xc200);
+        rtl8168_mdio_write(tp, 0x14, 0xc43f);
+        rtl8168_mdio_write(tp, 0x14, 0xcc03);
+        rtl8168_mdio_write(tp, 0x14, 0xa701);
+        rtl8168_mdio_write(tp, 0x14, 0xa510);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x4018);
+        rtl8168_mdio_write(tp, 0x14, 0x9910);
+        rtl8168_mdio_write(tp, 0x14, 0x8510);
+        rtl8168_mdio_write(tp, 0x14, 0x2926);
+        rtl8168_mdio_write(tp, 0x14, 0x1792);
+        rtl8168_mdio_write(tp, 0x14, 0x27db);
+        rtl8168_mdio_write(tp, 0x14, 0xc000);
+        rtl8168_mdio_write(tp, 0x14, 0xc100);
+        rtl8168_mdio_write(tp, 0x14, 0xc200);
+        rtl8168_mdio_write(tp, 0x14, 0xc300);
+        rtl8168_mdio_write(tp, 0x14, 0xc400);
+        rtl8168_mdio_write(tp, 0x14, 0xc500);
+        rtl8168_mdio_write(tp, 0x14, 0xc600);
+        rtl8168_mdio_write(tp, 0x14, 0xc7c1);
+        rtl8168_mdio_write(tp, 0x14, 0xc800);
+        rtl8168_mdio_write(tp, 0x14, 0xcc00);
+        rtl8168_mdio_write(tp, 0x14, 0x0800);
+        rtl8168_mdio_write(tp, 0x14, 0xca0f);
+        rtl8168_mdio_write(tp, 0x14, 0xcbff);
+        rtl8168_mdio_write(tp, 0x14, 0xa901);
+        rtl8168_mdio_write(tp, 0x14, 0x8902);
+        rtl8168_mdio_write(tp, 0x14, 0xc900);
+        rtl8168_mdio_write(tp, 0x14, 0xca00);
+        rtl8168_mdio_write(tp, 0x14, 0xcb00);
+        rtl8168_mdio_write(tp, 0x14, 0x0800);
+        rtl8168_mdio_write(tp, 0x14, 0xb804);
+        rtl8168_mdio_write(tp, 0x14, 0x0800);
+        rtl8168_mdio_write(tp, 0x14, 0xd71e);
+        rtl8168_mdio_write(tp, 0x14, 0x6044);
+        rtl8168_mdio_write(tp, 0x14, 0x9804);
+        rtl8168_mdio_write(tp, 0x14, 0x0800);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x6099);
+        rtl8168_mdio_write(tp, 0x14, 0xd71e);
+        rtl8168_mdio_write(tp, 0x14, 0x7fa4);
+        rtl8168_mdio_write(tp, 0x14, 0x2cd4);
+        rtl8168_mdio_write(tp, 0x14, 0x0800);
+        rtl8168_mdio_write(tp, 0x14, 0xa510);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x6098);
+        rtl8168_mdio_write(tp, 0x14, 0xd71e);
+        rtl8168_mdio_write(tp, 0x14, 0x7fa4);
+        rtl8168_mdio_write(tp, 0x14, 0x2cd4);
+        rtl8168_mdio_write(tp, 0x14, 0x8510);
+        rtl8168_mdio_write(tp, 0x14, 0x0800);
+        rtl8168_mdio_write(tp, 0x14, 0xd711);
+        rtl8168_mdio_write(tp, 0x14, 0x3003);
+        rtl8168_mdio_write(tp, 0x14, 0x1d01);
+        rtl8168_mdio_write(tp, 0x14, 0x2d0b);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x60be);
+        rtl8168_mdio_write(tp, 0x14, 0xe060);
+        rtl8168_mdio_write(tp, 0x14, 0x0920);
+        rtl8168_mdio_write(tp, 0x14, 0x1cd6);
+        rtl8168_mdio_write(tp, 0x14, 0x2c89);
+        rtl8168_mdio_write(tp, 0x14, 0xd71e);
+        rtl8168_mdio_write(tp, 0x14, 0x3063);
+        rtl8168_mdio_write(tp, 0x14, 0x1948);
+        rtl8168_mdio_write(tp, 0x14, 0x288a);
+        rtl8168_mdio_write(tp, 0x14, 0x1cd6);
+        rtl8168_mdio_write(tp, 0x14, 0x29bd);
+        rtl8168_mdio_write(tp, 0x14, 0xa802);
+        rtl8168_mdio_write(tp, 0x14, 0xa303);
+        rtl8168_mdio_write(tp, 0x14, 0x843f);
+        rtl8168_mdio_write(tp, 0x14, 0x81ff);
+        rtl8168_mdio_write(tp, 0x14, 0x8208);
+        rtl8168_mdio_write(tp, 0x14, 0xa201);
+        rtl8168_mdio_write(tp, 0x14, 0xc001);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x30a0);
+        rtl8168_mdio_write(tp, 0x14, 0x0d1c);
+        rtl8168_mdio_write(tp, 0x14, 0x30a0);
+        rtl8168_mdio_write(tp, 0x14, 0x3d13);
+        rtl8168_mdio_write(tp, 0x14, 0xd71e);
+        rtl8168_mdio_write(tp, 0x14, 0x7f4c);
+        rtl8168_mdio_write(tp, 0x14, 0x2ab6);
+        rtl8168_mdio_write(tp, 0x14, 0xe003);
+        rtl8168_mdio_write(tp, 0x14, 0x0202);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x6090);
+        rtl8168_mdio_write(tp, 0x14, 0xd71e);
+        rtl8168_mdio_write(tp, 0x14, 0x7fac);
+        rtl8168_mdio_write(tp, 0x14, 0x2ab6);
+        rtl8168_mdio_write(tp, 0x14, 0xa20c);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x6091);
+        rtl8168_mdio_write(tp, 0x14, 0xd71e);
+        rtl8168_mdio_write(tp, 0x14, 0x7fac);
+        rtl8168_mdio_write(tp, 0x14, 0x2ab6);
+        rtl8168_mdio_write(tp, 0x14, 0x820e);
+        rtl8168_mdio_write(tp, 0x14, 0xa3e0);
+        rtl8168_mdio_write(tp, 0x14, 0xa520);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x609d);
+        rtl8168_mdio_write(tp, 0x14, 0xd71e);
+        rtl8168_mdio_write(tp, 0x14, 0x7fac);
+        rtl8168_mdio_write(tp, 0x14, 0x2ab6);
+        rtl8168_mdio_write(tp, 0x14, 0x8520);
+        rtl8168_mdio_write(tp, 0x14, 0x6703);
+        rtl8168_mdio_write(tp, 0x14, 0x2d34);
+        rtl8168_mdio_write(tp, 0x14, 0xa13e);
+        rtl8168_mdio_write(tp, 0x14, 0xc001);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x4000);
+        rtl8168_mdio_write(tp, 0x14, 0x6046);
+        rtl8168_mdio_write(tp, 0x14, 0x2d0d);
+        rtl8168_mdio_write(tp, 0x14, 0xa43f);
+        rtl8168_mdio_write(tp, 0x14, 0xa101);
+        rtl8168_mdio_write(tp, 0x14, 0xc020);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x3121);
+        rtl8168_mdio_write(tp, 0x14, 0x0d45);
+        rtl8168_mdio_write(tp, 0x14, 0x30c0);
+        rtl8168_mdio_write(tp, 0x14, 0x3d0d);
+        rtl8168_mdio_write(tp, 0x14, 0xd71e);
+        rtl8168_mdio_write(tp, 0x14, 0x7f4c);
+        rtl8168_mdio_write(tp, 0x14, 0x2ab6);
+        rtl8168_mdio_write(tp, 0x14, 0xa540);
+        rtl8168_mdio_write(tp, 0x14, 0xc001);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x4001);
+        rtl8168_mdio_write(tp, 0x14, 0xe00f);
+        rtl8168_mdio_write(tp, 0x14, 0x0501);
+        rtl8168_mdio_write(tp, 0x14, 0x1dac);
+        rtl8168_mdio_write(tp, 0x14, 0xc1c4);
+        rtl8168_mdio_write(tp, 0x14, 0xa268);
+        rtl8168_mdio_write(tp, 0x14, 0xa303);
+        rtl8168_mdio_write(tp, 0x14, 0x8420);
+        rtl8168_mdio_write(tp, 0x14, 0xe00f);
+        rtl8168_mdio_write(tp, 0x14, 0x0502);
+        rtl8168_mdio_write(tp, 0x14, 0x1dac);
+        rtl8168_mdio_write(tp, 0x14, 0xc002);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x4000);
+        rtl8168_mdio_write(tp, 0x14, 0x8208);
+        rtl8168_mdio_write(tp, 0x14, 0x8410);
+        rtl8168_mdio_write(tp, 0x14, 0xa121);
+        rtl8168_mdio_write(tp, 0x14, 0xc002);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x4000);
+        rtl8168_mdio_write(tp, 0x14, 0x8120);
+        rtl8168_mdio_write(tp, 0x14, 0x8180);
+        rtl8168_mdio_write(tp, 0x14, 0x1d97);
+        rtl8168_mdio_write(tp, 0x14, 0xa180);
+        rtl8168_mdio_write(tp, 0x14, 0xa13a);
+        rtl8168_mdio_write(tp, 0x14, 0x8240);
+        rtl8168_mdio_write(tp, 0x14, 0xa430);
+        rtl8168_mdio_write(tp, 0x14, 0xc010);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x30e1);
+        rtl8168_mdio_write(tp, 0x14, 0x0abc);
+        rtl8168_mdio_write(tp, 0x14, 0xd71e);
+        rtl8168_mdio_write(tp, 0x14, 0x7f8c);
+        rtl8168_mdio_write(tp, 0x14, 0x2ab6);
+        rtl8168_mdio_write(tp, 0x14, 0xa480);
+        rtl8168_mdio_write(tp, 0x14, 0xa230);
+        rtl8168_mdio_write(tp, 0x14, 0xa303);
+        rtl8168_mdio_write(tp, 0x14, 0xc001);
+        rtl8168_mdio_write(tp, 0x14, 0xd70c);
+        rtl8168_mdio_write(tp, 0x14, 0x4124);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x6120);
+        rtl8168_mdio_write(tp, 0x14, 0xd711);
+        rtl8168_mdio_write(tp, 0x14, 0x3128);
+        rtl8168_mdio_write(tp, 0x14, 0x3d76);
+        rtl8168_mdio_write(tp, 0x14, 0x2d70);
+        rtl8168_mdio_write(tp, 0x14, 0xa801);
+        rtl8168_mdio_write(tp, 0x14, 0x2d6c);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x4000);
+        rtl8168_mdio_write(tp, 0x14, 0xe018);
+        rtl8168_mdio_write(tp, 0x14, 0x0208);
+        rtl8168_mdio_write(tp, 0x14, 0xa1f8);
+        rtl8168_mdio_write(tp, 0x14, 0x8480);
+        rtl8168_mdio_write(tp, 0x14, 0xc004);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x4000);
+        rtl8168_mdio_write(tp, 0x14, 0x6046);
+        rtl8168_mdio_write(tp, 0x14, 0x2d0d);
+        rtl8168_mdio_write(tp, 0x14, 0xa43f);
+        rtl8168_mdio_write(tp, 0x14, 0xa105);
+        rtl8168_mdio_write(tp, 0x14, 0x8228);
+        rtl8168_mdio_write(tp, 0x14, 0xc004);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x4000);
+        rtl8168_mdio_write(tp, 0x14, 0x81bc);
+        rtl8168_mdio_write(tp, 0x14, 0xa220);
+        rtl8168_mdio_write(tp, 0x14, 0x1d97);
+        rtl8168_mdio_write(tp, 0x14, 0x8220);
+        rtl8168_mdio_write(tp, 0x14, 0xa1bc);
+        rtl8168_mdio_write(tp, 0x14, 0xc040);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x30e1);
+        rtl8168_mdio_write(tp, 0x14, 0x0abc);
+        rtl8168_mdio_write(tp, 0x14, 0x30e1);
+        rtl8168_mdio_write(tp, 0x14, 0x3d0d);
+        rtl8168_mdio_write(tp, 0x14, 0xd71e);
+        rtl8168_mdio_write(tp, 0x14, 0x7f4c);
+        rtl8168_mdio_write(tp, 0x14, 0x2ab6);
+        rtl8168_mdio_write(tp, 0x14, 0xa802);
+        rtl8168_mdio_write(tp, 0x14, 0xd70c);
+        rtl8168_mdio_write(tp, 0x14, 0x4244);
+        rtl8168_mdio_write(tp, 0x14, 0xa301);
+        rtl8168_mdio_write(tp, 0x14, 0xc004);
+        rtl8168_mdio_write(tp, 0x14, 0xd711);
+        rtl8168_mdio_write(tp, 0x14, 0x3128);
+        rtl8168_mdio_write(tp, 0x14, 0x3da5);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x5f80);
+        rtl8168_mdio_write(tp, 0x14, 0xd711);
+        rtl8168_mdio_write(tp, 0x14, 0x3109);
+        rtl8168_mdio_write(tp, 0x14, 0x3da7);
+        rtl8168_mdio_write(tp, 0x14, 0x2dab);
+        rtl8168_mdio_write(tp, 0x14, 0xa801);
+        rtl8168_mdio_write(tp, 0x14, 0x2d9a);
+        rtl8168_mdio_write(tp, 0x14, 0xa802);
+        rtl8168_mdio_write(tp, 0x14, 0xc004);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x4000);
+        rtl8168_mdio_write(tp, 0x14, 0x0800);
+        rtl8168_mdio_write(tp, 0x14, 0xa510);
+        rtl8168_mdio_write(tp, 0x14, 0xd710);
+        rtl8168_mdio_write(tp, 0x14, 0x609a);
+        rtl8168_mdio_write(tp, 0x14, 0xd71e);
+        rtl8168_mdio_write(tp, 0x14, 0x7fac);
+        rtl8168_mdio_write(tp, 0x14, 0x2ab6);
+        rtl8168_mdio_write(tp, 0x14, 0x8510);
+        rtl8168_mdio_write(tp, 0x14, 0x0800);
+        rtl8168_mdio_write(tp, 0x13, 0xA01A);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x13, 0xA006);
+        rtl8168_mdio_write(tp, 0x14, 0x0ad6);
+        rtl8168_mdio_write(tp, 0x13, 0xA004);
+        rtl8168_mdio_write(tp, 0x14, 0x07f5);
+        rtl8168_mdio_write(tp, 0x13, 0xA002);
+        rtl8168_mdio_write(tp, 0x14, 0x06a9);
+        rtl8168_mdio_write(tp, 0x13, 0xA000);
+        rtl8168_mdio_write(tp, 0x14, 0xf069);
+        rtl8168_mdio_write(tp, 0x13, 0xB820);
+        rtl8168_mdio_write(tp, 0x14, 0x0210);
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x83a0);
+        rtl8168_mdio_write(tp, 0x14, 0xaf83);
+        rtl8168_mdio_write(tp, 0x14, 0xacaf);
+        rtl8168_mdio_write(tp, 0x14, 0x83b8);
+        rtl8168_mdio_write(tp, 0x14, 0xaf83);
+        rtl8168_mdio_write(tp, 0x14, 0xcdaf);
+        rtl8168_mdio_write(tp, 0x14, 0x83d3);
+        rtl8168_mdio_write(tp, 0x14, 0x0204);
+        rtl8168_mdio_write(tp, 0x14, 0x9a02);
+        rtl8168_mdio_write(tp, 0x14, 0x09a9);
+        rtl8168_mdio_write(tp, 0x14, 0x0284);
+        rtl8168_mdio_write(tp, 0x14, 0x61af);
+        rtl8168_mdio_write(tp, 0x14, 0x02fc);
+        rtl8168_mdio_write(tp, 0x14, 0xad20);
+        rtl8168_mdio_write(tp, 0x14, 0x0302);
+        rtl8168_mdio_write(tp, 0x14, 0x867c);
+        rtl8168_mdio_write(tp, 0x14, 0xad21);
+        rtl8168_mdio_write(tp, 0x14, 0x0302);
+        rtl8168_mdio_write(tp, 0x14, 0x85c9);
+        rtl8168_mdio_write(tp, 0x14, 0xad22);
+        rtl8168_mdio_write(tp, 0x14, 0x0302);
+        rtl8168_mdio_write(tp, 0x14, 0x1bc0);
+        rtl8168_mdio_write(tp, 0x14, 0xaf17);
+        rtl8168_mdio_write(tp, 0x14, 0xe302);
+        rtl8168_mdio_write(tp, 0x14, 0x8703);
+        rtl8168_mdio_write(tp, 0x14, 0xaf18);
+        rtl8168_mdio_write(tp, 0x14, 0x6201);
+        rtl8168_mdio_write(tp, 0x14, 0x06e0);
+        rtl8168_mdio_write(tp, 0x14, 0x8148);
+        rtl8168_mdio_write(tp, 0x14, 0xaf3c);
+        rtl8168_mdio_write(tp, 0x14, 0x69f8);
+        rtl8168_mdio_write(tp, 0x14, 0xf9fa);
+        rtl8168_mdio_write(tp, 0x14, 0xef69);
+        rtl8168_mdio_write(tp, 0x14, 0xee80);
+        rtl8168_mdio_write(tp, 0x14, 0x10f7);
+        rtl8168_mdio_write(tp, 0x14, 0xee80);
+        rtl8168_mdio_write(tp, 0x14, 0x131f);
+        rtl8168_mdio_write(tp, 0x14, 0xd104);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0xf302);
+        rtl8168_mdio_write(tp, 0x14, 0x4259);
+        rtl8168_mdio_write(tp, 0x14, 0x0287);
+        rtl8168_mdio_write(tp, 0x14, 0x88bf);
+        rtl8168_mdio_write(tp, 0x14, 0x87cf);
+        rtl8168_mdio_write(tp, 0x14, 0xd7b8);
+        rtl8168_mdio_write(tp, 0x14, 0x22d0);
+        rtl8168_mdio_write(tp, 0x14, 0x0c02);
+        rtl8168_mdio_write(tp, 0x14, 0x4252);
+        rtl8168_mdio_write(tp, 0x14, 0xee80);
+        rtl8168_mdio_write(tp, 0x14, 0xcda0);
+        rtl8168_mdio_write(tp, 0x14, 0xee80);
+        rtl8168_mdio_write(tp, 0x14, 0xce8b);
+        rtl8168_mdio_write(tp, 0x14, 0xee80);
+        rtl8168_mdio_write(tp, 0x14, 0xd1f5);
+        rtl8168_mdio_write(tp, 0x14, 0xee80);
+        rtl8168_mdio_write(tp, 0x14, 0xd2a9);
+        rtl8168_mdio_write(tp, 0x14, 0xee80);
+        rtl8168_mdio_write(tp, 0x14, 0xd30a);
+        rtl8168_mdio_write(tp, 0x14, 0xee80);
+        rtl8168_mdio_write(tp, 0x14, 0xf010);
+        rtl8168_mdio_write(tp, 0x14, 0xee80);
+        rtl8168_mdio_write(tp, 0x14, 0xf38f);
+        rtl8168_mdio_write(tp, 0x14, 0xee81);
+        rtl8168_mdio_write(tp, 0x14, 0x011e);
+        rtl8168_mdio_write(tp, 0x14, 0xee81);
+        rtl8168_mdio_write(tp, 0x14, 0x0b4a);
+        rtl8168_mdio_write(tp, 0x14, 0xee81);
+        rtl8168_mdio_write(tp, 0x14, 0x0c7c);
+        rtl8168_mdio_write(tp, 0x14, 0xee81);
+        rtl8168_mdio_write(tp, 0x14, 0x127f);
+        rtl8168_mdio_write(tp, 0x14, 0xd100);
+        rtl8168_mdio_write(tp, 0x14, 0x0210);
+        rtl8168_mdio_write(tp, 0x14, 0xb5ee);
+        rtl8168_mdio_write(tp, 0x14, 0x8088);
+        rtl8168_mdio_write(tp, 0x14, 0xa4ee);
+        rtl8168_mdio_write(tp, 0x14, 0x8089);
+        rtl8168_mdio_write(tp, 0x14, 0x44ee);
+        rtl8168_mdio_write(tp, 0x14, 0x809a);
+        rtl8168_mdio_write(tp, 0x14, 0xa4ee);
+        rtl8168_mdio_write(tp, 0x14, 0x809b);
+        rtl8168_mdio_write(tp, 0x14, 0x44ee);
+        rtl8168_mdio_write(tp, 0x14, 0x809c);
+        rtl8168_mdio_write(tp, 0x14, 0xa7ee);
+        rtl8168_mdio_write(tp, 0x14, 0x80a5);
+        rtl8168_mdio_write(tp, 0x14, 0xa7d2);
+        rtl8168_mdio_write(tp, 0x14, 0x0002);
+        rtl8168_mdio_write(tp, 0x14, 0x0e66);
+        rtl8168_mdio_write(tp, 0x14, 0x0285);
+        rtl8168_mdio_write(tp, 0x14, 0xc0ee);
+        rtl8168_mdio_write(tp, 0x14, 0x87fc);
+        rtl8168_mdio_write(tp, 0x14, 0x00e0);
+        rtl8168_mdio_write(tp, 0x14, 0x8245);
+        rtl8168_mdio_write(tp, 0x14, 0xf622);
+        rtl8168_mdio_write(tp, 0x14, 0xe482);
+        rtl8168_mdio_write(tp, 0x14, 0x45ef);
+        rtl8168_mdio_write(tp, 0x14, 0x96fe);
+        rtl8168_mdio_write(tp, 0x14, 0xfdfc);
+        rtl8168_mdio_write(tp, 0x14, 0x0402);
+        rtl8168_mdio_write(tp, 0x14, 0x847a);
+        rtl8168_mdio_write(tp, 0x14, 0x0284);
+        rtl8168_mdio_write(tp, 0x14, 0xb302);
+        rtl8168_mdio_write(tp, 0x14, 0x0cab);
+        rtl8168_mdio_write(tp, 0x14, 0x020c);
+        rtl8168_mdio_write(tp, 0x14, 0xc402);
+        rtl8168_mdio_write(tp, 0x14, 0x0cef);
+        rtl8168_mdio_write(tp, 0x14, 0x020d);
+        rtl8168_mdio_write(tp, 0x14, 0x0802);
+        rtl8168_mdio_write(tp, 0x14, 0x0d33);
+        rtl8168_mdio_write(tp, 0x14, 0x020c);
+        rtl8168_mdio_write(tp, 0x14, 0x3d04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8fa);
+        rtl8168_mdio_write(tp, 0x14, 0xef69);
+        rtl8168_mdio_write(tp, 0x14, 0xe182);
+        rtl8168_mdio_write(tp, 0x14, 0x2fac);
+        rtl8168_mdio_write(tp, 0x14, 0x291a);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x24ac);
+        rtl8168_mdio_write(tp, 0x14, 0x2102);
+        rtl8168_mdio_write(tp, 0x14, 0xae22);
+        rtl8168_mdio_write(tp, 0x14, 0x0210);
+        rtl8168_mdio_write(tp, 0x14, 0x57f6);
+        rtl8168_mdio_write(tp, 0x14, 0x21e4);
+        rtl8168_mdio_write(tp, 0x14, 0x8224);
+        rtl8168_mdio_write(tp, 0x14, 0xd101);
+        rtl8168_mdio_write(tp, 0x14, 0xbf44);
+        rtl8168_mdio_write(tp, 0x14, 0xd202);
+        rtl8168_mdio_write(tp, 0x14, 0x4259);
+        rtl8168_mdio_write(tp, 0x14, 0xae10);
+        rtl8168_mdio_write(tp, 0x14, 0x0212);
+        rtl8168_mdio_write(tp, 0x14, 0x4cf6);
+        rtl8168_mdio_write(tp, 0x14, 0x29e5);
+        rtl8168_mdio_write(tp, 0x14, 0x822f);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x24f6);
+        rtl8168_mdio_write(tp, 0x14, 0x21e4);
+        rtl8168_mdio_write(tp, 0x14, 0x8224);
+        rtl8168_mdio_write(tp, 0x14, 0xef96);
+        rtl8168_mdio_write(tp, 0x14, 0xfefc);
+        rtl8168_mdio_write(tp, 0x14, 0x04f8);
+        rtl8168_mdio_write(tp, 0x14, 0xe182);
+        rtl8168_mdio_write(tp, 0x14, 0x2fac);
+        rtl8168_mdio_write(tp, 0x14, 0x2a18);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x24ac);
+        rtl8168_mdio_write(tp, 0x14, 0x2202);
+        rtl8168_mdio_write(tp, 0x14, 0xae26);
+        rtl8168_mdio_write(tp, 0x14, 0x0284);
+        rtl8168_mdio_write(tp, 0x14, 0xf802);
+        rtl8168_mdio_write(tp, 0x14, 0x8565);
+        rtl8168_mdio_write(tp, 0x14, 0xd101);
+        rtl8168_mdio_write(tp, 0x14, 0xbf44);
+        rtl8168_mdio_write(tp, 0x14, 0xd502);
+        rtl8168_mdio_write(tp, 0x14, 0x4259);
+        rtl8168_mdio_write(tp, 0x14, 0xae0e);
+        rtl8168_mdio_write(tp, 0x14, 0x0284);
+        rtl8168_mdio_write(tp, 0x14, 0xea02);
+        rtl8168_mdio_write(tp, 0x14, 0x85a9);
+        rtl8168_mdio_write(tp, 0x14, 0xe182);
+        rtl8168_mdio_write(tp, 0x14, 0x2ff6);
+        rtl8168_mdio_write(tp, 0x14, 0x2ae5);
+        rtl8168_mdio_write(tp, 0x14, 0x822f);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x24f6);
+        rtl8168_mdio_write(tp, 0x14, 0x22e4);
+        rtl8168_mdio_write(tp, 0x14, 0x8224);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf9e2);
+        rtl8168_mdio_write(tp, 0x14, 0x8011);
+        rtl8168_mdio_write(tp, 0x14, 0xad31);
+        rtl8168_mdio_write(tp, 0x14, 0x05d2);
+        rtl8168_mdio_write(tp, 0x14, 0x0002);
+        rtl8168_mdio_write(tp, 0x14, 0x0e66);
+        rtl8168_mdio_write(tp, 0x14, 0xfd04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x14, 0xfaef);
+        rtl8168_mdio_write(tp, 0x14, 0x69e0);
+        rtl8168_mdio_write(tp, 0x14, 0x8011);
+        rtl8168_mdio_write(tp, 0x14, 0xad21);
+        rtl8168_mdio_write(tp, 0x14, 0x5cbf);
+        rtl8168_mdio_write(tp, 0x14, 0x43be);
+        rtl8168_mdio_write(tp, 0x14, 0x0242);
+        rtl8168_mdio_write(tp, 0x14, 0x97ac);
+        rtl8168_mdio_write(tp, 0x14, 0x281b);
+        rtl8168_mdio_write(tp, 0x14, 0xbf43);
+        rtl8168_mdio_write(tp, 0x14, 0xc102);
+        rtl8168_mdio_write(tp, 0x14, 0x4297);
+        rtl8168_mdio_write(tp, 0x14, 0xac28);
+        rtl8168_mdio_write(tp, 0x14, 0x12bf);
+        rtl8168_mdio_write(tp, 0x14, 0x43c7);
+        rtl8168_mdio_write(tp, 0x14, 0x0242);
+        rtl8168_mdio_write(tp, 0x14, 0x97ac);
+        rtl8168_mdio_write(tp, 0x14, 0x2804);
+        rtl8168_mdio_write(tp, 0x14, 0xd300);
+        rtl8168_mdio_write(tp, 0x14, 0xae07);
+        rtl8168_mdio_write(tp, 0x14, 0xd306);
+        rtl8168_mdio_write(tp, 0x14, 0xaf85);
+        rtl8168_mdio_write(tp, 0x14, 0x56d3);
+        rtl8168_mdio_write(tp, 0x14, 0x03e0);
+        rtl8168_mdio_write(tp, 0x14, 0x8011);
+        rtl8168_mdio_write(tp, 0x14, 0xad26);
+        rtl8168_mdio_write(tp, 0x14, 0x25bf);
+        rtl8168_mdio_write(tp, 0x14, 0x4559);
+        rtl8168_mdio_write(tp, 0x14, 0x0242);
+        rtl8168_mdio_write(tp, 0x14, 0x97e2);
+        rtl8168_mdio_write(tp, 0x14, 0x8073);
+        rtl8168_mdio_write(tp, 0x14, 0x0d21);
+        rtl8168_mdio_write(tp, 0x14, 0xf637);
+        rtl8168_mdio_write(tp, 0x14, 0x0d11);
+        rtl8168_mdio_write(tp, 0x14, 0xf62f);
+        rtl8168_mdio_write(tp, 0x14, 0x1b21);
+        rtl8168_mdio_write(tp, 0x14, 0xaa02);
+        rtl8168_mdio_write(tp, 0x14, 0xae10);
+        rtl8168_mdio_write(tp, 0x14, 0xe280);
+        rtl8168_mdio_write(tp, 0x14, 0x740d);
+        rtl8168_mdio_write(tp, 0x14, 0x21f6);
+        rtl8168_mdio_write(tp, 0x14, 0x371b);
+        rtl8168_mdio_write(tp, 0x14, 0x21aa);
+        rtl8168_mdio_write(tp, 0x14, 0x0313);
+        rtl8168_mdio_write(tp, 0x14, 0xae02);
+        rtl8168_mdio_write(tp, 0x14, 0x2b02);
+        rtl8168_mdio_write(tp, 0x14, 0x020e);
+        rtl8168_mdio_write(tp, 0x14, 0x5102);
+        rtl8168_mdio_write(tp, 0x14, 0x0e66);
+        rtl8168_mdio_write(tp, 0x14, 0x020f);
+        rtl8168_mdio_write(tp, 0x14, 0xa3ef);
+        rtl8168_mdio_write(tp, 0x14, 0x96fe);
+        rtl8168_mdio_write(tp, 0x14, 0xfdfc);
+        rtl8168_mdio_write(tp, 0x14, 0x04f8);
+        rtl8168_mdio_write(tp, 0x14, 0xf9fa);
+        rtl8168_mdio_write(tp, 0x14, 0xef69);
+        rtl8168_mdio_write(tp, 0x14, 0xe080);
+        rtl8168_mdio_write(tp, 0x14, 0x12ad);
+        rtl8168_mdio_write(tp, 0x14, 0x2733);
+        rtl8168_mdio_write(tp, 0x14, 0xbf43);
+        rtl8168_mdio_write(tp, 0x14, 0xbe02);
+        rtl8168_mdio_write(tp, 0x14, 0x4297);
+        rtl8168_mdio_write(tp, 0x14, 0xac28);
+        rtl8168_mdio_write(tp, 0x14, 0x09bf);
+        rtl8168_mdio_write(tp, 0x14, 0x43c1);
+        rtl8168_mdio_write(tp, 0x14, 0x0242);
+        rtl8168_mdio_write(tp, 0x14, 0x97ad);
+        rtl8168_mdio_write(tp, 0x14, 0x2821);
+        rtl8168_mdio_write(tp, 0x14, 0xbf45);
+        rtl8168_mdio_write(tp, 0x14, 0x5902);
+        rtl8168_mdio_write(tp, 0x14, 0x4297);
+        rtl8168_mdio_write(tp, 0x14, 0xe387);
+        rtl8168_mdio_write(tp, 0x14, 0xffd2);
+        rtl8168_mdio_write(tp, 0x14, 0x001b);
+        rtl8168_mdio_write(tp, 0x14, 0x45ac);
+        rtl8168_mdio_write(tp, 0x14, 0x2711);
+        rtl8168_mdio_write(tp, 0x14, 0xe187);
+        rtl8168_mdio_write(tp, 0x14, 0xfebf);
+        rtl8168_mdio_write(tp, 0x14, 0x87e4);
+        rtl8168_mdio_write(tp, 0x14, 0x0242);
+        rtl8168_mdio_write(tp, 0x14, 0x590d);
+        rtl8168_mdio_write(tp, 0x14, 0x11bf);
+        rtl8168_mdio_write(tp, 0x14, 0x87e7);
+        rtl8168_mdio_write(tp, 0x14, 0x0242);
+        rtl8168_mdio_write(tp, 0x14, 0x59ef);
+        rtl8168_mdio_write(tp, 0x14, 0x96fe);
+        rtl8168_mdio_write(tp, 0x14, 0xfdfc);
+        rtl8168_mdio_write(tp, 0x14, 0x04f8);
+        rtl8168_mdio_write(tp, 0x14, 0xfaef);
+        rtl8168_mdio_write(tp, 0x14, 0x69d1);
+        rtl8168_mdio_write(tp, 0x14, 0x00bf);
+        rtl8168_mdio_write(tp, 0x14, 0x87e4);
+        rtl8168_mdio_write(tp, 0x14, 0x0242);
+        rtl8168_mdio_write(tp, 0x14, 0x59bf);
+        rtl8168_mdio_write(tp, 0x14, 0x87e7);
+        rtl8168_mdio_write(tp, 0x14, 0x0242);
+        rtl8168_mdio_write(tp, 0x14, 0x59ef);
+        rtl8168_mdio_write(tp, 0x14, 0x96fe);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xee87);
+        rtl8168_mdio_write(tp, 0x14, 0xff46);
+        rtl8168_mdio_write(tp, 0x14, 0xee87);
+        rtl8168_mdio_write(tp, 0x14, 0xfe01);
+        rtl8168_mdio_write(tp, 0x14, 0x04f8);
+        rtl8168_mdio_write(tp, 0x14, 0xfaef);
+        rtl8168_mdio_write(tp, 0x14, 0x69e0);
+        rtl8168_mdio_write(tp, 0x14, 0x8241);
+        rtl8168_mdio_write(tp, 0x14, 0xa000);
+        rtl8168_mdio_write(tp, 0x14, 0x0502);
+        rtl8168_mdio_write(tp, 0x14, 0x85eb);
+        rtl8168_mdio_write(tp, 0x14, 0xae0e);
+        rtl8168_mdio_write(tp, 0x14, 0xa001);
+        rtl8168_mdio_write(tp, 0x14, 0x0502);
+        rtl8168_mdio_write(tp, 0x14, 0x1a5a);
+        rtl8168_mdio_write(tp, 0x14, 0xae06);
+        rtl8168_mdio_write(tp, 0x14, 0xa002);
+        rtl8168_mdio_write(tp, 0x14, 0x0302);
+        rtl8168_mdio_write(tp, 0x14, 0x1ae6);
+        rtl8168_mdio_write(tp, 0x14, 0xef96);
+        rtl8168_mdio_write(tp, 0x14, 0xfefc);
+        rtl8168_mdio_write(tp, 0x14, 0x04f8);
+        rtl8168_mdio_write(tp, 0x14, 0xf9fa);
+        rtl8168_mdio_write(tp, 0x14, 0xef69);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x29f6);
+        rtl8168_mdio_write(tp, 0x14, 0x21e4);
+        rtl8168_mdio_write(tp, 0x14, 0x8229);
+        rtl8168_mdio_write(tp, 0x14, 0xe080);
+        rtl8168_mdio_write(tp, 0x14, 0x10ac);
+        rtl8168_mdio_write(tp, 0x14, 0x2202);
+        rtl8168_mdio_write(tp, 0x14, 0xae76);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x27f7);
+        rtl8168_mdio_write(tp, 0x14, 0x21e4);
+        rtl8168_mdio_write(tp, 0x14, 0x8227);
+        rtl8168_mdio_write(tp, 0x14, 0xbf43);
+        rtl8168_mdio_write(tp, 0x14, 0x1302);
+        rtl8168_mdio_write(tp, 0x14, 0x4297);
+        rtl8168_mdio_write(tp, 0x14, 0xef21);
+        rtl8168_mdio_write(tp, 0x14, 0xbf43);
+        rtl8168_mdio_write(tp, 0x14, 0x1602);
+        rtl8168_mdio_write(tp, 0x14, 0x4297);
+        rtl8168_mdio_write(tp, 0x14, 0x0c11);
+        rtl8168_mdio_write(tp, 0x14, 0x1e21);
+        rtl8168_mdio_write(tp, 0x14, 0xbf43);
+        rtl8168_mdio_write(tp, 0x14, 0x1902);
+        rtl8168_mdio_write(tp, 0x14, 0x4297);
+        rtl8168_mdio_write(tp, 0x14, 0x0c12);
+        rtl8168_mdio_write(tp, 0x14, 0x1e21);
+        rtl8168_mdio_write(tp, 0x14, 0xe682);
+        rtl8168_mdio_write(tp, 0x14, 0x43a2);
+        rtl8168_mdio_write(tp, 0x14, 0x000a);
+        rtl8168_mdio_write(tp, 0x14, 0xe182);
+        rtl8168_mdio_write(tp, 0x14, 0x27f6);
+        rtl8168_mdio_write(tp, 0x14, 0x29e5);
+        rtl8168_mdio_write(tp, 0x14, 0x8227);
+        rtl8168_mdio_write(tp, 0x14, 0xae42);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x44f7);
+        rtl8168_mdio_write(tp, 0x14, 0x21e4);
+        rtl8168_mdio_write(tp, 0x14, 0x8244);
+        rtl8168_mdio_write(tp, 0x14, 0x0246);
+        rtl8168_mdio_write(tp, 0x14, 0xaebf);
+        rtl8168_mdio_write(tp, 0x14, 0x4325);
+        rtl8168_mdio_write(tp, 0x14, 0x0242);
+        rtl8168_mdio_write(tp, 0x14, 0x97ef);
+        rtl8168_mdio_write(tp, 0x14, 0x21bf);
+        rtl8168_mdio_write(tp, 0x14, 0x431c);
+        rtl8168_mdio_write(tp, 0x14, 0x0242);
+        rtl8168_mdio_write(tp, 0x14, 0x970c);
+        rtl8168_mdio_write(tp, 0x14, 0x121e);
+        rtl8168_mdio_write(tp, 0x14, 0x21bf);
+        rtl8168_mdio_write(tp, 0x14, 0x431f);
+        rtl8168_mdio_write(tp, 0x14, 0x0242);
+        rtl8168_mdio_write(tp, 0x14, 0x970c);
+        rtl8168_mdio_write(tp, 0x14, 0x131e);
+        rtl8168_mdio_write(tp, 0x14, 0x21bf);
+        rtl8168_mdio_write(tp, 0x14, 0x4328);
+        rtl8168_mdio_write(tp, 0x14, 0x0242);
+        rtl8168_mdio_write(tp, 0x14, 0x970c);
+        rtl8168_mdio_write(tp, 0x14, 0x141e);
+        rtl8168_mdio_write(tp, 0x14, 0x21bf);
+        rtl8168_mdio_write(tp, 0x14, 0x44b1);
+        rtl8168_mdio_write(tp, 0x14, 0x0242);
+        rtl8168_mdio_write(tp, 0x14, 0x970c);
+        rtl8168_mdio_write(tp, 0x14, 0x161e);
+        rtl8168_mdio_write(tp, 0x14, 0x21e6);
+        rtl8168_mdio_write(tp, 0x14, 0x8242);
+        rtl8168_mdio_write(tp, 0x14, 0xee82);
+        rtl8168_mdio_write(tp, 0x14, 0x4101);
+        rtl8168_mdio_write(tp, 0x14, 0xef96);
+        rtl8168_mdio_write(tp, 0x14, 0xfefd);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8fa);
+        rtl8168_mdio_write(tp, 0x14, 0xef69);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x46a0);
+        rtl8168_mdio_write(tp, 0x14, 0x0005);
+        rtl8168_mdio_write(tp, 0x14, 0x0286);
+        rtl8168_mdio_write(tp, 0x14, 0x96ae);
+        rtl8168_mdio_write(tp, 0x14, 0x06a0);
+        rtl8168_mdio_write(tp, 0x14, 0x0103);
+        rtl8168_mdio_write(tp, 0x14, 0x0219);
+        rtl8168_mdio_write(tp, 0x14, 0x19ef);
+        rtl8168_mdio_write(tp, 0x14, 0x96fe);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8fa);
+        rtl8168_mdio_write(tp, 0x14, 0xef69);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x29f6);
+        rtl8168_mdio_write(tp, 0x14, 0x20e4);
+        rtl8168_mdio_write(tp, 0x14, 0x8229);
+        rtl8168_mdio_write(tp, 0x14, 0xe080);
+        rtl8168_mdio_write(tp, 0x14, 0x10ac);
+        rtl8168_mdio_write(tp, 0x14, 0x2102);
+        rtl8168_mdio_write(tp, 0x14, 0xae54);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x27f7);
+        rtl8168_mdio_write(tp, 0x14, 0x20e4);
+        rtl8168_mdio_write(tp, 0x14, 0x8227);
+        rtl8168_mdio_write(tp, 0x14, 0xbf42);
+        rtl8168_mdio_write(tp, 0x14, 0xe602);
+        rtl8168_mdio_write(tp, 0x14, 0x4297);
+        rtl8168_mdio_write(tp, 0x14, 0xac28);
+        rtl8168_mdio_write(tp, 0x14, 0x22bf);
+        rtl8168_mdio_write(tp, 0x14, 0x430d);
+        rtl8168_mdio_write(tp, 0x14, 0x0242);
+        rtl8168_mdio_write(tp, 0x14, 0x97e5);
+        rtl8168_mdio_write(tp, 0x14, 0x8247);
+        rtl8168_mdio_write(tp, 0x14, 0xac28);
+        rtl8168_mdio_write(tp, 0x14, 0x20d1);
+        rtl8168_mdio_write(tp, 0x14, 0x03bf);
+        rtl8168_mdio_write(tp, 0x14, 0x4307);
+        rtl8168_mdio_write(tp, 0x14, 0x0242);
+        rtl8168_mdio_write(tp, 0x14, 0x59ee);
+        rtl8168_mdio_write(tp, 0x14, 0x8246);
+        rtl8168_mdio_write(tp, 0x14, 0x00e1);
+        rtl8168_mdio_write(tp, 0x14, 0x8227);
+        rtl8168_mdio_write(tp, 0x14, 0xf628);
+        rtl8168_mdio_write(tp, 0x14, 0xe582);
+        rtl8168_mdio_write(tp, 0x14, 0x27ae);
+        rtl8168_mdio_write(tp, 0x14, 0x21d1);
+        rtl8168_mdio_write(tp, 0x14, 0x04bf);
+        rtl8168_mdio_write(tp, 0x14, 0x4307);
+        rtl8168_mdio_write(tp, 0x14, 0x0242);
+        rtl8168_mdio_write(tp, 0x14, 0x59ae);
+        rtl8168_mdio_write(tp, 0x14, 0x08d1);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x4307);
+        rtl8168_mdio_write(tp, 0x14, 0x0242);
+        rtl8168_mdio_write(tp, 0x14, 0x59e0);
+        rtl8168_mdio_write(tp, 0x14, 0x8244);
+        rtl8168_mdio_write(tp, 0x14, 0xf720);
+        rtl8168_mdio_write(tp, 0x14, 0xe482);
+        rtl8168_mdio_write(tp, 0x14, 0x4402);
+        rtl8168_mdio_write(tp, 0x14, 0x46ae);
+        rtl8168_mdio_write(tp, 0x14, 0xee82);
+        rtl8168_mdio_write(tp, 0x14, 0x4601);
+        rtl8168_mdio_write(tp, 0x14, 0xef96);
+        rtl8168_mdio_write(tp, 0x14, 0xfefc);
+        rtl8168_mdio_write(tp, 0x14, 0x04f8);
+        rtl8168_mdio_write(tp, 0x14, 0xfaef);
+        rtl8168_mdio_write(tp, 0x14, 0x69e0);
+        rtl8168_mdio_write(tp, 0x14, 0x8013);
+        rtl8168_mdio_write(tp, 0x14, 0xad24);
+        rtl8168_mdio_write(tp, 0x14, 0x1cbf);
+        rtl8168_mdio_write(tp, 0x14, 0x87f0);
+        rtl8168_mdio_write(tp, 0x14, 0x0242);
+        rtl8168_mdio_write(tp, 0x14, 0x97ad);
+        rtl8168_mdio_write(tp, 0x14, 0x2813);
+        rtl8168_mdio_write(tp, 0x14, 0xe087);
+        rtl8168_mdio_write(tp, 0x14, 0xfca0);
+        rtl8168_mdio_write(tp, 0x14, 0x0005);
+        rtl8168_mdio_write(tp, 0x14, 0x0287);
+        rtl8168_mdio_write(tp, 0x14, 0x36ae);
+        rtl8168_mdio_write(tp, 0x14, 0x10a0);
+        rtl8168_mdio_write(tp, 0x14, 0x0105);
+        rtl8168_mdio_write(tp, 0x14, 0x0287);
+        rtl8168_mdio_write(tp, 0x14, 0x48ae);
+        rtl8168_mdio_write(tp, 0x14, 0x08e0);
+        rtl8168_mdio_write(tp, 0x14, 0x8230);
+        rtl8168_mdio_write(tp, 0x14, 0xf626);
+        rtl8168_mdio_write(tp, 0x14, 0xe482);
+        rtl8168_mdio_write(tp, 0x14, 0x30ef);
+        rtl8168_mdio_write(tp, 0x14, 0x96fe);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8e0);
+        rtl8168_mdio_write(tp, 0x14, 0x8245);
+        rtl8168_mdio_write(tp, 0x14, 0xf722);
+        rtl8168_mdio_write(tp, 0x14, 0xe482);
+        rtl8168_mdio_write(tp, 0x14, 0x4502);
+        rtl8168_mdio_write(tp, 0x14, 0x46ae);
+        rtl8168_mdio_write(tp, 0x14, 0xee87);
+        rtl8168_mdio_write(tp, 0x14, 0xfc01);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8fa);
+        rtl8168_mdio_write(tp, 0x14, 0xef69);
+        rtl8168_mdio_write(tp, 0x14, 0xfb02);
+        rtl8168_mdio_write(tp, 0x14, 0x46d3);
+        rtl8168_mdio_write(tp, 0x14, 0xad50);
+        rtl8168_mdio_write(tp, 0x14, 0x2fbf);
+        rtl8168_mdio_write(tp, 0x14, 0x87ed);
+        rtl8168_mdio_write(tp, 0x14, 0xd101);
+        rtl8168_mdio_write(tp, 0x14, 0x0242);
+        rtl8168_mdio_write(tp, 0x14, 0x59bf);
+        rtl8168_mdio_write(tp, 0x14, 0x87ed);
+        rtl8168_mdio_write(tp, 0x14, 0xd100);
+        rtl8168_mdio_write(tp, 0x14, 0x0242);
+        rtl8168_mdio_write(tp, 0x14, 0x59e0);
+        rtl8168_mdio_write(tp, 0x14, 0x8245);
+        rtl8168_mdio_write(tp, 0x14, 0xf622);
+        rtl8168_mdio_write(tp, 0x14, 0xe482);
+        rtl8168_mdio_write(tp, 0x14, 0x4502);
+        rtl8168_mdio_write(tp, 0x14, 0x46ae);
+        rtl8168_mdio_write(tp, 0x14, 0xd100);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0xf002);
+        rtl8168_mdio_write(tp, 0x14, 0x4259);
+        rtl8168_mdio_write(tp, 0x14, 0xee87);
+        rtl8168_mdio_write(tp, 0x14, 0xfc00);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x30f6);
+        rtl8168_mdio_write(tp, 0x14, 0x26e4);
+        rtl8168_mdio_write(tp, 0x14, 0x8230);
+        rtl8168_mdio_write(tp, 0x14, 0xffef);
+        rtl8168_mdio_write(tp, 0x14, 0x96fe);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x14, 0xface);
+        rtl8168_mdio_write(tp, 0x14, 0xfaef);
+        rtl8168_mdio_write(tp, 0x14, 0x69fb);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0xb3d7);
+        rtl8168_mdio_write(tp, 0x14, 0x001c);
+        rtl8168_mdio_write(tp, 0x14, 0xd819);
+        rtl8168_mdio_write(tp, 0x14, 0xd919);
+        rtl8168_mdio_write(tp, 0x14, 0xda19);
+        rtl8168_mdio_write(tp, 0x14, 0xdb19);
+        rtl8168_mdio_write(tp, 0x14, 0x07ef);
+        rtl8168_mdio_write(tp, 0x14, 0x9502);
+        rtl8168_mdio_write(tp, 0x14, 0x4259);
+        rtl8168_mdio_write(tp, 0x14, 0x073f);
+        rtl8168_mdio_write(tp, 0x14, 0x0004);
+        rtl8168_mdio_write(tp, 0x14, 0x9fec);
+        rtl8168_mdio_write(tp, 0x14, 0xffef);
+        rtl8168_mdio_write(tp, 0x14, 0x96fe);
+        rtl8168_mdio_write(tp, 0x14, 0xc6fe);
+        rtl8168_mdio_write(tp, 0x14, 0xfdfc);
+        rtl8168_mdio_write(tp, 0x14, 0x0400);
+        rtl8168_mdio_write(tp, 0x14, 0x0145);
+        rtl8168_mdio_write(tp, 0x14, 0x7d00);
+        rtl8168_mdio_write(tp, 0x14, 0x0345);
+        rtl8168_mdio_write(tp, 0x14, 0x5c00);
+        rtl8168_mdio_write(tp, 0x14, 0x0143);
+        rtl8168_mdio_write(tp, 0x14, 0x4f00);
+        rtl8168_mdio_write(tp, 0x14, 0x0387);
+        rtl8168_mdio_write(tp, 0x14, 0xdb00);
+        rtl8168_mdio_write(tp, 0x14, 0x0987);
+        rtl8168_mdio_write(tp, 0x14, 0xde00);
+        rtl8168_mdio_write(tp, 0x14, 0x0987);
+        rtl8168_mdio_write(tp, 0x14, 0xe100);
+        rtl8168_mdio_write(tp, 0x14, 0x0087);
+        rtl8168_mdio_write(tp, 0x14, 0xeaa4);
+        rtl8168_mdio_write(tp, 0x14, 0x00b8);
+        rtl8168_mdio_write(tp, 0x14, 0x20c4);
+        rtl8168_mdio_write(tp, 0x14, 0x1600);
+        rtl8168_mdio_write(tp, 0x14, 0x000f);
+        rtl8168_mdio_write(tp, 0x14, 0xf800);
+        rtl8168_mdio_write(tp, 0x14, 0x7098);
+        rtl8168_mdio_write(tp, 0x14, 0xa58a);
+        rtl8168_mdio_write(tp, 0x14, 0xb6a8);
+        rtl8168_mdio_write(tp, 0x14, 0x3e50);
+        rtl8168_mdio_write(tp, 0x14, 0xa83e);
+        rtl8168_mdio_write(tp, 0x14, 0x33bc);
+        rtl8168_mdio_write(tp, 0x14, 0xc622);
+        rtl8168_mdio_write(tp, 0x14, 0xbcc6);
+        rtl8168_mdio_write(tp, 0x14, 0xaaa4);
+        rtl8168_mdio_write(tp, 0x14, 0x42ff);
+        rtl8168_mdio_write(tp, 0x14, 0xc408);
+        rtl8168_mdio_write(tp, 0x14, 0x00c4);
+        rtl8168_mdio_write(tp, 0x14, 0x16a8);
+        rtl8168_mdio_write(tp, 0x14, 0xbcc0);
+        rtl8168_mdio_write(tp, 0x13, 0xb818);
+        rtl8168_mdio_write(tp, 0x14, 0x02f3);
+        rtl8168_mdio_write(tp, 0x13, 0xb81a);
+        rtl8168_mdio_write(tp, 0x14, 0x17d1);
+        rtl8168_mdio_write(tp, 0x13, 0xb81c);
+        rtl8168_mdio_write(tp, 0x14, 0x185a);
+        rtl8168_mdio_write(tp, 0x13, 0xb81e);
+        rtl8168_mdio_write(tp, 0x14, 0x3c66);
+        rtl8168_mdio_write(tp, 0x13, 0xb820);
+        rtl8168_mdio_write(tp, 0x14, 0x021f);
+        rtl8168_mdio_write(tp, 0x13, 0xc416);
+        rtl8168_mdio_write(tp, 0x14, 0x0500);
+        rtl8168_mdio_write(tp, 0x13, 0xb82e);
+        rtl8168_mdio_write(tp, 0x14, 0xfffc);
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x0000);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0B82);
+        gphy_val = rtl8168_mdio_read(tp, 0x10);
+        gphy_val &= ~(BIT_9);
+        rtl8168_mdio_write(tp, 0x10, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x8146);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+
+        rtl8168_clear_phy_mcu_patch_request(tp);
+}
+
+static void
+rtl8168_set_phy_mcu_8168gu_2(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        unsigned int gphy_val;
+
+        rtl8168_set_phy_mcu_patch_request(tp);
+        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x8146);
+        rtl8168_mdio_write(tp, 0x14, 0x0300);
+        rtl8168_mdio_write(tp, 0x13, 0xB82E);
+        rtl8168_mdio_write(tp, 0x14, 0x0001);
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0xb820);
+        rtl8168_mdio_write(tp, 0x14, 0x0290);
+        rtl8168_mdio_write(tp, 0x13, 0xa012);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x13, 0xa014);
+        rtl8168_mdio_write(tp, 0x14, 0x2c04);
+        rtl8168_mdio_write(tp, 0x14, 0x2c07);
+        rtl8168_mdio_write(tp, 0x14, 0x2c07);
+        rtl8168_mdio_write(tp, 0x14, 0x2c07);
+        rtl8168_mdio_write(tp, 0x14, 0xa304);
+        rtl8168_mdio_write(tp, 0x14, 0xa301);
+        rtl8168_mdio_write(tp, 0x14, 0x207e);
+        rtl8168_mdio_write(tp, 0x13, 0xa01a);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x13, 0xa006);
+        rtl8168_mdio_write(tp, 0x14, 0x0fff);
+        rtl8168_mdio_write(tp, 0x13, 0xa004);
+        rtl8168_mdio_write(tp, 0x14, 0x0fff);
+        rtl8168_mdio_write(tp, 0x13, 0xa002);
+        rtl8168_mdio_write(tp, 0x14, 0x0fff);
+        rtl8168_mdio_write(tp, 0x13, 0xa000);
+        rtl8168_mdio_write(tp, 0x14, 0x107c);
+        rtl8168_mdio_write(tp, 0x13, 0xb820);
+        rtl8168_mdio_write(tp, 0x14, 0x0210);
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x0000);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0B82);
+        gphy_val = rtl8168_mdio_read(tp, 0x17);
+        gphy_val &= ~(BIT_0);
+        rtl8168_mdio_write(tp, 0x17, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x8146);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+
+        rtl8168_clear_phy_mcu_patch_request(tp);
+}
+
+static void
+rtl8168_set_phy_mcu_8411b_1(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        unsigned int gphy_val;
+
+        rtl8168_set_phy_mcu_patch_request(tp);
+
+        rtl8168_mdio_write(tp,0x1f, 0x0A43);
+        rtl8168_mdio_write(tp,0x13, 0x8146);
+        rtl8168_mdio_write(tp,0x14, 0x0100);
+        rtl8168_mdio_write(tp,0x13, 0xB82E);
+        rtl8168_mdio_write(tp,0x14, 0x0001);
+
+
+        rtl8168_mdio_write(tp,0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0xb820);
+        rtl8168_mdio_write(tp, 0x14, 0x0290);
+        rtl8168_mdio_write(tp, 0x13, 0xa012);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x13, 0xa014);
+        rtl8168_mdio_write(tp, 0x14, 0x2c04);
+        rtl8168_mdio_write(tp, 0x14, 0x2c07);
+        rtl8168_mdio_write(tp, 0x14, 0x2c07);
+        rtl8168_mdio_write(tp, 0x14, 0x2c07);
+        rtl8168_mdio_write(tp, 0x14, 0xa304);
+        rtl8168_mdio_write(tp, 0x14, 0xa301);
+        rtl8168_mdio_write(tp, 0x14, 0x207e);
+        rtl8168_mdio_write(tp, 0x13, 0xa01a);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x13, 0xa006);
+        rtl8168_mdio_write(tp, 0x14, 0x0fff);
+        rtl8168_mdio_write(tp, 0x13, 0xa004);
+        rtl8168_mdio_write(tp, 0x14, 0x0fff);
+        rtl8168_mdio_write(tp, 0x13, 0xa002);
+        rtl8168_mdio_write(tp, 0x14, 0x0fff);
+        rtl8168_mdio_write(tp, 0x13, 0xa000);
+        rtl8168_mdio_write(tp, 0x14, 0x107c);
+        rtl8168_mdio_write(tp, 0x13, 0xb820);
+        rtl8168_mdio_write(tp, 0x14, 0x0210);
+
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x0000);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0B82);
+        gphy_val = rtl8168_mdio_read(tp, 0x17);
+        gphy_val &= ~(BIT_0);
+        rtl8168_mdio_write(tp, 0x17, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x8146);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+
+        rtl8168_clear_phy_mcu_patch_request(tp);
+}
+
+static void
+rtl8168_set_phy_mcu_8168ep_2(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        unsigned int gphy_val;
+
+        rtl8168_set_phy_mcu_patch_request(tp);
+
+        rtl8168_mdio_write(tp,0x1f, 0x0A43);
+        rtl8168_mdio_write(tp,0x13, 0x8146);
+        rtl8168_mdio_write(tp,0x14, 0x8700);
+        rtl8168_mdio_write(tp,0x13, 0xB82E);
+        rtl8168_mdio_write(tp,0x14, 0x0001);
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+
+        rtl8168_mdio_write(tp, 0x13, 0x83DD);
+        rtl8168_mdio_write(tp, 0x14, 0xAF83);
+        rtl8168_mdio_write(tp, 0x14, 0xE9AF);
+        rtl8168_mdio_write(tp, 0x14, 0x83EE);
+        rtl8168_mdio_write(tp, 0x14, 0xAF83);
+        rtl8168_mdio_write(tp, 0x14, 0xF1A1);
+        rtl8168_mdio_write(tp, 0x14, 0x83F4);
+        rtl8168_mdio_write(tp, 0x14, 0xD149);
+        rtl8168_mdio_write(tp, 0x14, 0xAF06);
+        rtl8168_mdio_write(tp, 0x14, 0x47AF);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x14, 0xAF00);
+        rtl8168_mdio_write(tp, 0x14, 0x00AF);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+
+        rtl8168_mdio_write(tp, 0x13, 0xB818);
+        rtl8168_mdio_write(tp, 0x14, 0x0645);
+
+        rtl8168_mdio_write(tp, 0x13, 0xB81A);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+
+        rtl8168_mdio_write(tp, 0x13, 0xB81C);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+
+        rtl8168_mdio_write(tp, 0x13, 0xB81E);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+
+        rtl8168_mdio_write(tp, 0x13, 0xB832);
+        rtl8168_mdio_write(tp, 0x14, 0x0001);
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x0000);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0B82);
+        gphy_val = rtl8168_mdio_read(tp, 0x17);
+        gphy_val &= ~(BIT_0);
+        rtl8168_mdio_write(tp, 0x17, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x8146);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+
+        rtl8168_clear_phy_mcu_patch_request(tp);
+}
+
+static void
+rtl8168_set_phy_mcu_8168h_1(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        unsigned int gphy_val;
+
+        rtl8168_set_phy_mcu_patch_request(tp);
+
+        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x8028);
+        rtl8168_mdio_write(tp, 0x14, 0x6200);
+        rtl8168_mdio_write(tp, 0x13, 0xB82E);
+        rtl8168_mdio_write(tp, 0x14, 0x0001);
+
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0xB820);
+        rtl8168_mdio_write(tp, 0x14, 0x0290);
+        rtl8168_mdio_write(tp, 0x13, 0xA012);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x13, 0xA014);
+        rtl8168_mdio_write(tp, 0x14, 0x2c04);
+        rtl8168_mdio_write(tp, 0x14, 0x2c10);
+        rtl8168_mdio_write(tp, 0x14, 0x2c10);
+        rtl8168_mdio_write(tp, 0x14, 0x2c10);
+        rtl8168_mdio_write(tp, 0x14, 0xa210);
+        rtl8168_mdio_write(tp, 0x14, 0xa101);
+        rtl8168_mdio_write(tp, 0x14, 0xce10);
+        rtl8168_mdio_write(tp, 0x14, 0xe070);
+        rtl8168_mdio_write(tp, 0x14, 0x0f40);
+        rtl8168_mdio_write(tp, 0x14, 0xaf01);
+        rtl8168_mdio_write(tp, 0x14, 0x8f01);
+        rtl8168_mdio_write(tp, 0x14, 0x183e);
+        rtl8168_mdio_write(tp, 0x14, 0x8e10);
+        rtl8168_mdio_write(tp, 0x14, 0x8101);
+        rtl8168_mdio_write(tp, 0x14, 0x8210);
+        rtl8168_mdio_write(tp, 0x14, 0x28da);
+        rtl8168_mdio_write(tp, 0x13, 0xA01A);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x13, 0xA006);
+        rtl8168_mdio_write(tp, 0x14, 0x0017);
+        rtl8168_mdio_write(tp, 0x13, 0xA004);
+        rtl8168_mdio_write(tp, 0x14, 0x0015);
+        rtl8168_mdio_write(tp, 0x13, 0xA002);
+        rtl8168_mdio_write(tp, 0x14, 0x0013);
+        rtl8168_mdio_write(tp, 0x13, 0xA000);
+        rtl8168_mdio_write(tp, 0x14, 0x18d1);
+        rtl8168_mdio_write(tp, 0x13, 0xB820);
+        rtl8168_mdio_write(tp, 0x14, 0x0210);
+
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x0000);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0B82);
+        gphy_val = rtl8168_mdio_read(tp, 0x17);
+        gphy_val &= ~(BIT_0);
+        rtl8168_mdio_write(tp, 0x17, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x8028);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+
+        rtl8168_clear_phy_mcu_patch_request(tp);
+}
+
+static void
+rtl8168_set_phy_mcu_8168h_2(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        unsigned int gphy_val;
+
+        rtl8168_set_phy_mcu_patch_request(tp);
+
+        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x8028);
+        rtl8168_mdio_write(tp, 0x14, 0x6201);
+        rtl8168_mdio_write(tp, 0x13, 0xB82E);
+        rtl8168_mdio_write(tp, 0x14, 0x0001);
+
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0xB820);
+        rtl8168_mdio_write(tp, 0x14, 0x0290);
+        rtl8168_mdio_write(tp, 0x13, 0xA012);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x13, 0xA014);
+        rtl8168_mdio_write(tp, 0x14, 0x2c04);
+        rtl8168_mdio_write(tp, 0x14, 0x2c09);
+        rtl8168_mdio_write(tp, 0x14, 0x2c0d);
+        rtl8168_mdio_write(tp, 0x14, 0x2c12);
+        rtl8168_mdio_write(tp, 0x14, 0xad01);
+        rtl8168_mdio_write(tp, 0x14, 0xad01);
+        rtl8168_mdio_write(tp, 0x14, 0xad01);
+        rtl8168_mdio_write(tp, 0x14, 0xad01);
+        rtl8168_mdio_write(tp, 0x14, 0x236c);
+        rtl8168_mdio_write(tp, 0x14, 0xd03c);
+        rtl8168_mdio_write(tp, 0x14, 0xd1aa);
+        rtl8168_mdio_write(tp, 0x14, 0xc010);
+        rtl8168_mdio_write(tp, 0x14, 0x2745);
+        rtl8168_mdio_write(tp, 0x14, 0x33de);
+        rtl8168_mdio_write(tp, 0x14, 0x16ba);
+        rtl8168_mdio_write(tp, 0x14, 0x31ee);
+        rtl8168_mdio_write(tp, 0x14, 0x2712);
+        rtl8168_mdio_write(tp, 0x14, 0x274e);
+        rtl8168_mdio_write(tp, 0x14, 0xc2bb);
+        rtl8168_mdio_write(tp, 0x14, 0xd500);
+        rtl8168_mdio_write(tp, 0x14, 0xc426);
+        rtl8168_mdio_write(tp, 0x14, 0xd01d);
+        rtl8168_mdio_write(tp, 0x14, 0xd1c3);
+        rtl8168_mdio_write(tp, 0x14, 0x401c);
+        rtl8168_mdio_write(tp, 0x14, 0xd501);
+        rtl8168_mdio_write(tp, 0x14, 0xc2b3);
+        rtl8168_mdio_write(tp, 0x14, 0xd500);
+        rtl8168_mdio_write(tp, 0x14, 0xd00b);
+        rtl8168_mdio_write(tp, 0x14, 0xd1c3);
+        rtl8168_mdio_write(tp, 0x14, 0x401c);
+        rtl8168_mdio_write(tp, 0x14, 0x241a);
+        rtl8168_mdio_write(tp, 0x13, 0xA01A);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x13, 0xA006);
+        rtl8168_mdio_write(tp, 0x14, 0x0414);
+        rtl8168_mdio_write(tp, 0x13, 0xA004);
+        rtl8168_mdio_write(tp, 0x14, 0x074c);
+        rtl8168_mdio_write(tp, 0x13, 0xA002);
+        rtl8168_mdio_write(tp, 0x14, 0x0744);
+        rtl8168_mdio_write(tp, 0x13, 0xA000);
+        rtl8168_mdio_write(tp, 0x14, 0xf36b);
+        rtl8168_mdio_write(tp, 0x13, 0xB820);
+        rtl8168_mdio_write(tp, 0x14, 0x0210);
+
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x8323);
+        rtl8168_mdio_write(tp, 0x14, 0xaf83);
+        rtl8168_mdio_write(tp, 0x14, 0x2faf);
+        rtl8168_mdio_write(tp, 0x14, 0x853d);
+        rtl8168_mdio_write(tp, 0x14, 0xaf85);
+        rtl8168_mdio_write(tp, 0x14, 0x3daf);
+        rtl8168_mdio_write(tp, 0x14, 0x853d);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x45ad);
+        rtl8168_mdio_write(tp, 0x14, 0x2052);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x7ae3);
+        rtl8168_mdio_write(tp, 0x14, 0x85fe);
+        rtl8168_mdio_write(tp, 0x14, 0x1a03);
+        rtl8168_mdio_write(tp, 0x14, 0x10e4);
+        rtl8168_mdio_write(tp, 0x14, 0x85f6);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x7a1b);
+        rtl8168_mdio_write(tp, 0x14, 0x03e4);
+        rtl8168_mdio_write(tp, 0x14, 0x85fa);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x7be3);
+        rtl8168_mdio_write(tp, 0x14, 0x85fe);
+        rtl8168_mdio_write(tp, 0x14, 0x1a03);
+        rtl8168_mdio_write(tp, 0x14, 0x10e4);
+        rtl8168_mdio_write(tp, 0x14, 0x85f7);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x7b1b);
+        rtl8168_mdio_write(tp, 0x14, 0x03e4);
+        rtl8168_mdio_write(tp, 0x14, 0x85fb);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x7ce3);
+        rtl8168_mdio_write(tp, 0x14, 0x85fe);
+        rtl8168_mdio_write(tp, 0x14, 0x1a03);
+        rtl8168_mdio_write(tp, 0x14, 0x10e4);
+        rtl8168_mdio_write(tp, 0x14, 0x85f8);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x7c1b);
+        rtl8168_mdio_write(tp, 0x14, 0x03e4);
+        rtl8168_mdio_write(tp, 0x14, 0x85fc);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x7de3);
+        rtl8168_mdio_write(tp, 0x14, 0x85fe);
+        rtl8168_mdio_write(tp, 0x14, 0x1a03);
+        rtl8168_mdio_write(tp, 0x14, 0x10e4);
+        rtl8168_mdio_write(tp, 0x14, 0x85f9);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x7d1b);
+        rtl8168_mdio_write(tp, 0x14, 0x03e4);
+        rtl8168_mdio_write(tp, 0x14, 0x85fd);
+        rtl8168_mdio_write(tp, 0x14, 0xae50);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x7ee3);
+        rtl8168_mdio_write(tp, 0x14, 0x85ff);
+        rtl8168_mdio_write(tp, 0x14, 0x1a03);
+        rtl8168_mdio_write(tp, 0x14, 0x10e4);
+        rtl8168_mdio_write(tp, 0x14, 0x85f6);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x7e1b);
+        rtl8168_mdio_write(tp, 0x14, 0x03e4);
+        rtl8168_mdio_write(tp, 0x14, 0x85fa);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x7fe3);
+        rtl8168_mdio_write(tp, 0x14, 0x85ff);
+        rtl8168_mdio_write(tp, 0x14, 0x1a03);
+        rtl8168_mdio_write(tp, 0x14, 0x10e4);
+        rtl8168_mdio_write(tp, 0x14, 0x85f7);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x7f1b);
+        rtl8168_mdio_write(tp, 0x14, 0x03e4);
+        rtl8168_mdio_write(tp, 0x14, 0x85fb);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x80e3);
+        rtl8168_mdio_write(tp, 0x14, 0x85ff);
+        rtl8168_mdio_write(tp, 0x14, 0x1a03);
+        rtl8168_mdio_write(tp, 0x14, 0x10e4);
+        rtl8168_mdio_write(tp, 0x14, 0x85f8);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x801b);
+        rtl8168_mdio_write(tp, 0x14, 0x03e4);
+        rtl8168_mdio_write(tp, 0x14, 0x85fc);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x81e3);
+        rtl8168_mdio_write(tp, 0x14, 0x85ff);
+        rtl8168_mdio_write(tp, 0x14, 0x1a03);
+        rtl8168_mdio_write(tp, 0x14, 0x10e4);
+        rtl8168_mdio_write(tp, 0x14, 0x85f9);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x811b);
+        rtl8168_mdio_write(tp, 0x14, 0x03e4);
+        rtl8168_mdio_write(tp, 0x14, 0x85fd);
+        rtl8168_mdio_write(tp, 0x14, 0xe085);
+        rtl8168_mdio_write(tp, 0x14, 0xf6ad);
+        rtl8168_mdio_write(tp, 0x14, 0x2404);
+        rtl8168_mdio_write(tp, 0x14, 0xee85);
+        rtl8168_mdio_write(tp, 0x14, 0xf610);
+        rtl8168_mdio_write(tp, 0x14, 0xe085);
+        rtl8168_mdio_write(tp, 0x14, 0xf7ad);
+        rtl8168_mdio_write(tp, 0x14, 0x2404);
+        rtl8168_mdio_write(tp, 0x14, 0xee85);
+        rtl8168_mdio_write(tp, 0x14, 0xf710);
+        rtl8168_mdio_write(tp, 0x14, 0xe085);
+        rtl8168_mdio_write(tp, 0x14, 0xf8ad);
+        rtl8168_mdio_write(tp, 0x14, 0x2404);
+        rtl8168_mdio_write(tp, 0x14, 0xee85);
+        rtl8168_mdio_write(tp, 0x14, 0xf810);
+        rtl8168_mdio_write(tp, 0x14, 0xe085);
+        rtl8168_mdio_write(tp, 0x14, 0xf9ad);
+        rtl8168_mdio_write(tp, 0x14, 0x2404);
+        rtl8168_mdio_write(tp, 0x14, 0xee85);
+        rtl8168_mdio_write(tp, 0x14, 0xf910);
+        rtl8168_mdio_write(tp, 0x14, 0xe085);
+        rtl8168_mdio_write(tp, 0x14, 0xfaad);
+        rtl8168_mdio_write(tp, 0x14, 0x2704);
+        rtl8168_mdio_write(tp, 0x14, 0xee85);
+        rtl8168_mdio_write(tp, 0x14, 0xfa00);
+        rtl8168_mdio_write(tp, 0x14, 0xe085);
+        rtl8168_mdio_write(tp, 0x14, 0xfbad);
+        rtl8168_mdio_write(tp, 0x14, 0x2704);
+        rtl8168_mdio_write(tp, 0x14, 0xee85);
+        rtl8168_mdio_write(tp, 0x14, 0xfb00);
+        rtl8168_mdio_write(tp, 0x14, 0xe085);
+        rtl8168_mdio_write(tp, 0x14, 0xfcad);
+        rtl8168_mdio_write(tp, 0x14, 0x2704);
+        rtl8168_mdio_write(tp, 0x14, 0xee85);
+        rtl8168_mdio_write(tp, 0x14, 0xfc00);
+        rtl8168_mdio_write(tp, 0x14, 0xe085);
+        rtl8168_mdio_write(tp, 0x14, 0xfdad);
+        rtl8168_mdio_write(tp, 0x14, 0x2704);
+        rtl8168_mdio_write(tp, 0x14, 0xee85);
+        rtl8168_mdio_write(tp, 0x14, 0xfd00);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x44ad);
+        rtl8168_mdio_write(tp, 0x14, 0x203f);
+        rtl8168_mdio_write(tp, 0x14, 0xe085);
+        rtl8168_mdio_write(tp, 0x14, 0xf6e4);
+        rtl8168_mdio_write(tp, 0x14, 0x8288);
+        rtl8168_mdio_write(tp, 0x14, 0xe085);
+        rtl8168_mdio_write(tp, 0x14, 0xfae4);
+        rtl8168_mdio_write(tp, 0x14, 0x8289);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x440d);
+        rtl8168_mdio_write(tp, 0x14, 0x0458);
+        rtl8168_mdio_write(tp, 0x14, 0x01bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8264);
+        rtl8168_mdio_write(tp, 0x14, 0x0215);
+        rtl8168_mdio_write(tp, 0x14, 0x38bf);
+        rtl8168_mdio_write(tp, 0x14, 0x824e);
+        rtl8168_mdio_write(tp, 0x14, 0x0213);
+        rtl8168_mdio_write(tp, 0x14, 0x06a0);
+        rtl8168_mdio_write(tp, 0x14, 0x010f);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x44f6);
+        rtl8168_mdio_write(tp, 0x14, 0x20e4);
+        rtl8168_mdio_write(tp, 0x14, 0x8244);
+        rtl8168_mdio_write(tp, 0x14, 0x580f);
+        rtl8168_mdio_write(tp, 0x14, 0xe582);
+        rtl8168_mdio_write(tp, 0x14, 0x5aae);
+        rtl8168_mdio_write(tp, 0x14, 0x0ebf);
+        rtl8168_mdio_write(tp, 0x14, 0x825e);
+        rtl8168_mdio_write(tp, 0x14, 0xe382);
+        rtl8168_mdio_write(tp, 0x14, 0x44f7);
+        rtl8168_mdio_write(tp, 0x14, 0x3ce7);
+        rtl8168_mdio_write(tp, 0x14, 0x8244);
+        rtl8168_mdio_write(tp, 0x14, 0x0212);
+        rtl8168_mdio_write(tp, 0x14, 0xf0ad);
+        rtl8168_mdio_write(tp, 0x14, 0x213f);
+        rtl8168_mdio_write(tp, 0x14, 0xe085);
+        rtl8168_mdio_write(tp, 0x14, 0xf7e4);
+        rtl8168_mdio_write(tp, 0x14, 0x8288);
+        rtl8168_mdio_write(tp, 0x14, 0xe085);
+        rtl8168_mdio_write(tp, 0x14, 0xfbe4);
+        rtl8168_mdio_write(tp, 0x14, 0x8289);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x440d);
+        rtl8168_mdio_write(tp, 0x14, 0x0558);
+        rtl8168_mdio_write(tp, 0x14, 0x01bf);
+        rtl8168_mdio_write(tp, 0x14, 0x826b);
+        rtl8168_mdio_write(tp, 0x14, 0x0215);
+        rtl8168_mdio_write(tp, 0x14, 0x38bf);
+        rtl8168_mdio_write(tp, 0x14, 0x824f);
+        rtl8168_mdio_write(tp, 0x14, 0x0213);
+        rtl8168_mdio_write(tp, 0x14, 0x06a0);
+        rtl8168_mdio_write(tp, 0x14, 0x010f);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x44f6);
+        rtl8168_mdio_write(tp, 0x14, 0x21e4);
+        rtl8168_mdio_write(tp, 0x14, 0x8244);
+        rtl8168_mdio_write(tp, 0x14, 0x580f);
+        rtl8168_mdio_write(tp, 0x14, 0xe582);
+        rtl8168_mdio_write(tp, 0x14, 0x5bae);
+        rtl8168_mdio_write(tp, 0x14, 0x0ebf);
+        rtl8168_mdio_write(tp, 0x14, 0x8265);
+        rtl8168_mdio_write(tp, 0x14, 0xe382);
+        rtl8168_mdio_write(tp, 0x14, 0x44f7);
+        rtl8168_mdio_write(tp, 0x14, 0x3de7);
+        rtl8168_mdio_write(tp, 0x14, 0x8244);
+        rtl8168_mdio_write(tp, 0x14, 0x0212);
+        rtl8168_mdio_write(tp, 0x14, 0xf0ad);
+        rtl8168_mdio_write(tp, 0x14, 0x223f);
+        rtl8168_mdio_write(tp, 0x14, 0xe085);
+        rtl8168_mdio_write(tp, 0x14, 0xf8e4);
+        rtl8168_mdio_write(tp, 0x14, 0x8288);
+        rtl8168_mdio_write(tp, 0x14, 0xe085);
+        rtl8168_mdio_write(tp, 0x14, 0xfce4);
+        rtl8168_mdio_write(tp, 0x14, 0x8289);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x440d);
+        rtl8168_mdio_write(tp, 0x14, 0x0658);
+        rtl8168_mdio_write(tp, 0x14, 0x01bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8272);
+        rtl8168_mdio_write(tp, 0x14, 0x0215);
+        rtl8168_mdio_write(tp, 0x14, 0x38bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8250);
+        rtl8168_mdio_write(tp, 0x14, 0x0213);
+        rtl8168_mdio_write(tp, 0x14, 0x06a0);
+        rtl8168_mdio_write(tp, 0x14, 0x010f);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x44f6);
+        rtl8168_mdio_write(tp, 0x14, 0x22e4);
+        rtl8168_mdio_write(tp, 0x14, 0x8244);
+        rtl8168_mdio_write(tp, 0x14, 0x580f);
+        rtl8168_mdio_write(tp, 0x14, 0xe582);
+        rtl8168_mdio_write(tp, 0x14, 0x5cae);
+        rtl8168_mdio_write(tp, 0x14, 0x0ebf);
+        rtl8168_mdio_write(tp, 0x14, 0x826c);
+        rtl8168_mdio_write(tp, 0x14, 0xe382);
+        rtl8168_mdio_write(tp, 0x14, 0x44f7);
+        rtl8168_mdio_write(tp, 0x14, 0x3ee7);
+        rtl8168_mdio_write(tp, 0x14, 0x8244);
+        rtl8168_mdio_write(tp, 0x14, 0x0212);
+        rtl8168_mdio_write(tp, 0x14, 0xf0ad);
+        rtl8168_mdio_write(tp, 0x14, 0x233f);
+        rtl8168_mdio_write(tp, 0x14, 0xe085);
+        rtl8168_mdio_write(tp, 0x14, 0xf9e4);
+        rtl8168_mdio_write(tp, 0x14, 0x8288);
+        rtl8168_mdio_write(tp, 0x14, 0xe085);
+        rtl8168_mdio_write(tp, 0x14, 0xfde4);
+        rtl8168_mdio_write(tp, 0x14, 0x8289);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x440d);
+        rtl8168_mdio_write(tp, 0x14, 0x0758);
+        rtl8168_mdio_write(tp, 0x14, 0x01bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8279);
+        rtl8168_mdio_write(tp, 0x14, 0x0215);
+        rtl8168_mdio_write(tp, 0x14, 0x38bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8251);
+        rtl8168_mdio_write(tp, 0x14, 0x0213);
+        rtl8168_mdio_write(tp, 0x14, 0x06a0);
+        rtl8168_mdio_write(tp, 0x14, 0x010f);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0x44f6);
+        rtl8168_mdio_write(tp, 0x14, 0x23e4);
+        rtl8168_mdio_write(tp, 0x14, 0x8244);
+        rtl8168_mdio_write(tp, 0x14, 0x580f);
+        rtl8168_mdio_write(tp, 0x14, 0xe582);
+        rtl8168_mdio_write(tp, 0x14, 0x5dae);
+        rtl8168_mdio_write(tp, 0x14, 0x0ebf);
+        rtl8168_mdio_write(tp, 0x14, 0x8273);
+        rtl8168_mdio_write(tp, 0x14, 0xe382);
+        rtl8168_mdio_write(tp, 0x14, 0x44f7);
+        rtl8168_mdio_write(tp, 0x14, 0x3fe7);
+        rtl8168_mdio_write(tp, 0x14, 0x8244);
+        rtl8168_mdio_write(tp, 0x14, 0x0212);
+        rtl8168_mdio_write(tp, 0x14, 0xf0ee);
+        rtl8168_mdio_write(tp, 0x14, 0x8288);
+        rtl8168_mdio_write(tp, 0x14, 0x10ee);
+        rtl8168_mdio_write(tp, 0x14, 0x8289);
+        rtl8168_mdio_write(tp, 0x14, 0x00af);
+        rtl8168_mdio_write(tp, 0x14, 0x14aa);
+        rtl8168_mdio_write(tp, 0x13, 0xb818);
+        rtl8168_mdio_write(tp, 0x14, 0x13cf);
+        rtl8168_mdio_write(tp, 0x13, 0xb81a);
+        rtl8168_mdio_write(tp, 0x14, 0xfffd);
+        rtl8168_mdio_write(tp, 0x13, 0xb81c);
+        rtl8168_mdio_write(tp, 0x14, 0xfffd);
+        rtl8168_mdio_write(tp, 0x13, 0xb81e);
+        rtl8168_mdio_write(tp, 0x14, 0xfffd);
+        rtl8168_mdio_write(tp, 0x13, 0xb832);
+        rtl8168_mdio_write(tp, 0x14, 0x0001);
+
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x0000);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0B82);
+        gphy_val = rtl8168_mdio_read(tp, 0x17);
+        gphy_val &= ~(BIT_0);
+        rtl8168_mdio_write(tp, 0x17, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x8028);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+
+        rtl8168_clear_phy_mcu_patch_request(tp);
+
+        if (tp->RequiredSecLanDonglePatch) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                gphy_val = rtl8168_mdio_read(tp, 0x11);
+                gphy_val &= ~BIT_6;
+                rtl8168_mdio_write(tp, 0x11, gphy_val);
+        }
+}
+
+static void
+rtl8168_set_phy_mcu_8168h_3(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        unsigned int gphy_val;
+
+        rtl8168_set_phy_mcu_patch_request(tp);
+
+
+        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x8042);
+        rtl8168_mdio_write(tp, 0x14, 0x3800);
+        rtl8168_mdio_write(tp, 0x13, 0xB82E);
+        rtl8168_mdio_write(tp, 0x14, 0x0001);
+
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0xB820);
+        rtl8168_mdio_write(tp, 0x14, 0x0090);
+        rtl8168_mdio_write(tp, 0x13, 0xA016);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x13, 0xA012);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x13, 0xA014);
+        rtl8168_mdio_write(tp, 0x14, 0x1800);
+        rtl8168_mdio_write(tp, 0x14, 0x8010);
+        rtl8168_mdio_write(tp, 0x14, 0x1800);
+        rtl8168_mdio_write(tp, 0x14, 0x8014);
+        rtl8168_mdio_write(tp, 0x14, 0x1800);
+        rtl8168_mdio_write(tp, 0x14, 0x8022);
+        rtl8168_mdio_write(tp, 0x14, 0x1800);
+        rtl8168_mdio_write(tp, 0x14, 0x8022);
+        rtl8168_mdio_write(tp, 0x14, 0x1800);
+        rtl8168_mdio_write(tp, 0x14, 0x8022);
+        rtl8168_mdio_write(tp, 0x14, 0x1800);
+        rtl8168_mdio_write(tp, 0x14, 0x8022);
+        rtl8168_mdio_write(tp, 0x14, 0x1800);
+        rtl8168_mdio_write(tp, 0x14, 0x8022);
+        rtl8168_mdio_write(tp, 0x14, 0x1800);
+        rtl8168_mdio_write(tp, 0x14, 0x8022);
+        rtl8168_mdio_write(tp, 0x14, 0x2b5d);
+        rtl8168_mdio_write(tp, 0x14, 0x0c68);
+        rtl8168_mdio_write(tp, 0x14, 0x1800);
+        rtl8168_mdio_write(tp, 0x14, 0x0b3c);
+        rtl8168_mdio_write(tp, 0x14, 0xc2bb);
+        rtl8168_mdio_write(tp, 0x14, 0xd500);
+        rtl8168_mdio_write(tp, 0x14, 0xc426);
+        rtl8168_mdio_write(tp, 0x14, 0xd01d);
+        rtl8168_mdio_write(tp, 0x14, 0xd1c3);
+        rtl8168_mdio_write(tp, 0x14, 0x401c);
+        rtl8168_mdio_write(tp, 0x14, 0xd501);
+        rtl8168_mdio_write(tp, 0x14, 0xc2b3);
+        rtl8168_mdio_write(tp, 0x14, 0xd500);
+        rtl8168_mdio_write(tp, 0x14, 0xd00b);
+        rtl8168_mdio_write(tp, 0x14, 0xd1c3);
+        rtl8168_mdio_write(tp, 0x14, 0x401c);
+        rtl8168_mdio_write(tp, 0x14, 0x1800);
+        rtl8168_mdio_write(tp, 0x14, 0x0478);
+        rtl8168_mdio_write(tp, 0x13, 0xA026);
+        rtl8168_mdio_write(tp, 0x14, 0x0fff);
+        rtl8168_mdio_write(tp, 0x13, 0xA024);
+        rtl8168_mdio_write(tp, 0x14, 0x0fff);
+        rtl8168_mdio_write(tp, 0x13, 0xA022);
+        rtl8168_mdio_write(tp, 0x14, 0x0fff);
+        rtl8168_mdio_write(tp, 0x13, 0xA020);
+        rtl8168_mdio_write(tp, 0x14, 0x0fff);
+        rtl8168_mdio_write(tp, 0x13, 0xA006);
+        rtl8168_mdio_write(tp, 0x14, 0x0fff);
+        rtl8168_mdio_write(tp, 0x13, 0xA004);
+        rtl8168_mdio_write(tp, 0x14, 0x0fff);
+        rtl8168_mdio_write(tp, 0x13, 0xA002);
+        rtl8168_mdio_write(tp, 0x14, 0x0472);
+        rtl8168_mdio_write(tp, 0x13, 0xA000);
+        rtl8168_mdio_write(tp, 0x14, 0x0b3a);
+        rtl8168_mdio_write(tp, 0x13, 0xA008);
+        rtl8168_mdio_write(tp, 0x14, 0x0300);
+        rtl8168_mdio_write(tp, 0x13, 0xB820);
+        rtl8168_mdio_write(tp, 0x14, 0x0010);
+
+
+        rtl8168_mdio_write(tp, 0x13, 0x83f3);
+        rtl8168_mdio_write(tp, 0x14, 0xaf84);
+        rtl8168_mdio_write(tp, 0x14, 0x0baf);
+        rtl8168_mdio_write(tp, 0x14, 0x8466);
+        rtl8168_mdio_write(tp, 0x14, 0xaf84);
+        rtl8168_mdio_write(tp, 0x14, 0xcdaf);
+        rtl8168_mdio_write(tp, 0x14, 0x873c);
+        rtl8168_mdio_write(tp, 0x14, 0xaf87);
+        rtl8168_mdio_write(tp, 0x14, 0x3faf);
+        rtl8168_mdio_write(tp, 0x14, 0x8760);
+        rtl8168_mdio_write(tp, 0x14, 0xaf87);
+        rtl8168_mdio_write(tp, 0x14, 0x60af);
+        rtl8168_mdio_write(tp, 0x14, 0x8760);
+        rtl8168_mdio_write(tp, 0x14, 0xef79);
+        rtl8168_mdio_write(tp, 0x14, 0xfb89);
+        rtl8168_mdio_write(tp, 0x14, 0xe987);
+        rtl8168_mdio_write(tp, 0x14, 0xffd7);
+        rtl8168_mdio_write(tp, 0x14, 0x0017);
+        rtl8168_mdio_write(tp, 0x14, 0xd400);
+        rtl8168_mdio_write(tp, 0x14, 0x051c);
+        rtl8168_mdio_write(tp, 0x14, 0x421a);
+        rtl8168_mdio_write(tp, 0x14, 0x741b);
+        rtl8168_mdio_write(tp, 0x14, 0x97e9);
+        rtl8168_mdio_write(tp, 0x14, 0x87fe);
+        rtl8168_mdio_write(tp, 0x14, 0xffef);
+        rtl8168_mdio_write(tp, 0x14, 0x97e0);
+        rtl8168_mdio_write(tp, 0x14, 0x82aa);
+        rtl8168_mdio_write(tp, 0x14, 0xa000);
+        rtl8168_mdio_write(tp, 0x14, 0x08ef);
+        rtl8168_mdio_write(tp, 0x14, 0x46dc);
+        rtl8168_mdio_write(tp, 0x14, 0x19dd);
+        rtl8168_mdio_write(tp, 0x14, 0xaf1a);
+        rtl8168_mdio_write(tp, 0x14, 0x37a0);
+        rtl8168_mdio_write(tp, 0x14, 0x012d);
+        rtl8168_mdio_write(tp, 0x14, 0xe082);
+        rtl8168_mdio_write(tp, 0x14, 0xa7ac);
+        rtl8168_mdio_write(tp, 0x14, 0x2013);
+        rtl8168_mdio_write(tp, 0x14, 0xe087);
+        rtl8168_mdio_write(tp, 0x14, 0xffe1);
+        rtl8168_mdio_write(tp, 0x14, 0x87fe);
+        rtl8168_mdio_write(tp, 0x14, 0xac27);
+        rtl8168_mdio_write(tp, 0x14, 0x05a1);
+        rtl8168_mdio_write(tp, 0x14, 0x0807);
+        rtl8168_mdio_write(tp, 0x14, 0xae0f);
+        rtl8168_mdio_write(tp, 0x14, 0xa107);
+        rtl8168_mdio_write(tp, 0x14, 0x02ae);
+        rtl8168_mdio_write(tp, 0x14, 0x0aef);
+        rtl8168_mdio_write(tp, 0x14, 0x4619);
+        rtl8168_mdio_write(tp, 0x14, 0x19dc);
+        rtl8168_mdio_write(tp, 0x14, 0x19dd);
+        rtl8168_mdio_write(tp, 0x14, 0xaf1a);
+        rtl8168_mdio_write(tp, 0x14, 0x37d8);
+        rtl8168_mdio_write(tp, 0x14, 0x19d9);
+        rtl8168_mdio_write(tp, 0x14, 0x19dc);
+        rtl8168_mdio_write(tp, 0x14, 0x19dd);
+        rtl8168_mdio_write(tp, 0x14, 0xaf1a);
+        rtl8168_mdio_write(tp, 0x14, 0x3719);
+        rtl8168_mdio_write(tp, 0x14, 0x19ae);
+        rtl8168_mdio_write(tp, 0x14, 0xcfbf);
+        rtl8168_mdio_write(tp, 0x14, 0x878a);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdc3c);
+        rtl8168_mdio_write(tp, 0x14, 0x0005);
+        rtl8168_mdio_write(tp, 0x14, 0xaaf5);
+        rtl8168_mdio_write(tp, 0x14, 0x0249);
+        rtl8168_mdio_write(tp, 0x14, 0xcaef);
+        rtl8168_mdio_write(tp, 0x14, 0x67d7);
+        rtl8168_mdio_write(tp, 0x14, 0x0014);
+        rtl8168_mdio_write(tp, 0x14, 0x0249);
+        rtl8168_mdio_write(tp, 0x14, 0xe5ad);
+        rtl8168_mdio_write(tp, 0x14, 0x50f7);
+        rtl8168_mdio_write(tp, 0x14, 0xd400);
+        rtl8168_mdio_write(tp, 0x14, 0x01bf);
+        rtl8168_mdio_write(tp, 0x14, 0x46a7);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0x98bf);
+        rtl8168_mdio_write(tp, 0x14, 0x465c);
+        rtl8168_mdio_write(tp, 0x14, 0x024a);
+        rtl8168_mdio_write(tp, 0x14, 0x5fd4);
+        rtl8168_mdio_write(tp, 0x14, 0x0003);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x9c02);
+        rtl8168_mdio_write(tp, 0x14, 0x4498);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x9902);
+        rtl8168_mdio_write(tp, 0x14, 0x4a5f);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x8d02);
+        rtl8168_mdio_write(tp, 0x14, 0x4a5f);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x9002);
+        rtl8168_mdio_write(tp, 0x14, 0x44dc);
+        rtl8168_mdio_write(tp, 0x14, 0xad28);
+        rtl8168_mdio_write(tp, 0x14, 0xf7bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8796);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdcad);
+        rtl8168_mdio_write(tp, 0x14, 0x28f7);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x9302);
+        rtl8168_mdio_write(tp, 0x14, 0x4a5f);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x9302);
+        rtl8168_mdio_write(tp, 0x14, 0x4a56);
+        rtl8168_mdio_write(tp, 0x14, 0xbf46);
+        rtl8168_mdio_write(tp, 0x14, 0x5c02);
+        rtl8168_mdio_write(tp, 0x14, 0x4a56);
+        rtl8168_mdio_write(tp, 0x14, 0xbf45);
+        rtl8168_mdio_write(tp, 0x14, 0x21af);
+        rtl8168_mdio_write(tp, 0x14, 0x020e);
+        rtl8168_mdio_write(tp, 0x14, 0xee82);
+        rtl8168_mdio_write(tp, 0x14, 0x5000);
+        rtl8168_mdio_write(tp, 0x14, 0x0284);
+        rtl8168_mdio_write(tp, 0x14, 0xdd02);
+        rtl8168_mdio_write(tp, 0x14, 0x8521);
+        rtl8168_mdio_write(tp, 0x14, 0x0285);
+        rtl8168_mdio_write(tp, 0x14, 0x36af);
+        rtl8168_mdio_write(tp, 0x14, 0x03d2);
+        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x14, 0xfafb);
+        rtl8168_mdio_write(tp, 0x14, 0xef59);
+        rtl8168_mdio_write(tp, 0x14, 0xbf45);
+        rtl8168_mdio_write(tp, 0x14, 0x3002);
+        rtl8168_mdio_write(tp, 0x14, 0x44dc);
+        rtl8168_mdio_write(tp, 0x14, 0x3c00);
+        rtl8168_mdio_write(tp, 0x14, 0x03aa);
+        rtl8168_mdio_write(tp, 0x14, 0x2cbf);
+        rtl8168_mdio_write(tp, 0x14, 0x8790);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdcad);
+        rtl8168_mdio_write(tp, 0x14, 0x2823);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x9602);
+        rtl8168_mdio_write(tp, 0x14, 0x44dc);
+        rtl8168_mdio_write(tp, 0x14, 0xad28);
+        rtl8168_mdio_write(tp, 0x14, 0x1a02);
+        rtl8168_mdio_write(tp, 0x14, 0x49ca);
+        rtl8168_mdio_write(tp, 0x14, 0xef67);
+        rtl8168_mdio_write(tp, 0x14, 0xd700);
+        rtl8168_mdio_write(tp, 0x14, 0x0202);
+        rtl8168_mdio_write(tp, 0x14, 0x49e5);
+        rtl8168_mdio_write(tp, 0x14, 0xad50);
+        rtl8168_mdio_write(tp, 0x14, 0xf7bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8793);
+        rtl8168_mdio_write(tp, 0x14, 0x024a);
+        rtl8168_mdio_write(tp, 0x14, 0x5fbf);
+        rtl8168_mdio_write(tp, 0x14, 0x8793);
+        rtl8168_mdio_write(tp, 0x14, 0x024a);
+        rtl8168_mdio_write(tp, 0x14, 0x56ef);
+        rtl8168_mdio_write(tp, 0x14, 0x95ff);
+        rtl8168_mdio_write(tp, 0x14, 0xfefd);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8fa);
+        rtl8168_mdio_write(tp, 0x14, 0xef69);
+        rtl8168_mdio_write(tp, 0x14, 0xe080);
+        rtl8168_mdio_write(tp, 0x14, 0x15ad);
+        rtl8168_mdio_write(tp, 0x14, 0x2406);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x8702);
+        rtl8168_mdio_write(tp, 0x14, 0x4a56);
+        rtl8168_mdio_write(tp, 0x14, 0xef96);
+        rtl8168_mdio_write(tp, 0x14, 0xfefc);
+        rtl8168_mdio_write(tp, 0x14, 0x04f8);
+        rtl8168_mdio_write(tp, 0x14, 0xe087);
+        rtl8168_mdio_write(tp, 0x14, 0xf9e1);
+        rtl8168_mdio_write(tp, 0x14, 0x87fa);
+        rtl8168_mdio_write(tp, 0x14, 0x1b10);
+        rtl8168_mdio_write(tp, 0x14, 0x9f1e);
+        rtl8168_mdio_write(tp, 0x14, 0xee87);
+        rtl8168_mdio_write(tp, 0x14, 0xf900);
+        rtl8168_mdio_write(tp, 0x14, 0xe080);
+        rtl8168_mdio_write(tp, 0x14, 0x15ac);
+        rtl8168_mdio_write(tp, 0x14, 0x2606);
+        rtl8168_mdio_write(tp, 0x14, 0xee87);
+        rtl8168_mdio_write(tp, 0x14, 0xf700);
+        rtl8168_mdio_write(tp, 0x14, 0xae12);
+        rtl8168_mdio_write(tp, 0x14, 0x0286);
+        rtl8168_mdio_write(tp, 0x14, 0x9d02);
+        rtl8168_mdio_write(tp, 0x14, 0x8565);
+        rtl8168_mdio_write(tp, 0x14, 0x0285);
+        rtl8168_mdio_write(tp, 0x14, 0x9d02);
+        rtl8168_mdio_write(tp, 0x14, 0x8660);
+        rtl8168_mdio_write(tp, 0x14, 0xae04);
+        rtl8168_mdio_write(tp, 0x14, 0x10e4);
+        rtl8168_mdio_write(tp, 0x14, 0x87f9);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x14, 0xfaef);
+        rtl8168_mdio_write(tp, 0x14, 0x69fa);
+        rtl8168_mdio_write(tp, 0x14, 0xbf45);
+        rtl8168_mdio_write(tp, 0x14, 0x3002);
+        rtl8168_mdio_write(tp, 0x14, 0x44dc);
+        rtl8168_mdio_write(tp, 0x14, 0xa103);
+        rtl8168_mdio_write(tp, 0x14, 0x22e0);
+        rtl8168_mdio_write(tp, 0x14, 0x87eb);
+        rtl8168_mdio_write(tp, 0x14, 0xe187);
+        rtl8168_mdio_write(tp, 0x14, 0xecef);
+        rtl8168_mdio_write(tp, 0x14, 0x64bf);
+        rtl8168_mdio_write(tp, 0x14, 0x876f);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdc1b);
+        rtl8168_mdio_write(tp, 0x14, 0x46aa);
+        rtl8168_mdio_write(tp, 0x14, 0x0abf);
+        rtl8168_mdio_write(tp, 0x14, 0x8772);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdc1b);
+        rtl8168_mdio_write(tp, 0x14, 0x46ab);
+        rtl8168_mdio_write(tp, 0x14, 0x06bf);
+        rtl8168_mdio_write(tp, 0x14, 0x876c);
+        rtl8168_mdio_write(tp, 0x14, 0x024a);
+        rtl8168_mdio_write(tp, 0x14, 0x5ffe);
+        rtl8168_mdio_write(tp, 0x14, 0xef96);
+        rtl8168_mdio_write(tp, 0x14, 0xfefd);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x14, 0xef59);
+        rtl8168_mdio_write(tp, 0x14, 0xf9bf);
+        rtl8168_mdio_write(tp, 0x14, 0x4530);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdca1);
+        rtl8168_mdio_write(tp, 0x14, 0x0310);
+        rtl8168_mdio_write(tp, 0x14, 0xe087);
+        rtl8168_mdio_write(tp, 0x14, 0xf7ac);
+        rtl8168_mdio_write(tp, 0x14, 0x2605);
+        rtl8168_mdio_write(tp, 0x14, 0x0285);
+        rtl8168_mdio_write(tp, 0x14, 0xc9ae);
+        rtl8168_mdio_write(tp, 0x14, 0x0d02);
+        rtl8168_mdio_write(tp, 0x14, 0x8613);
+        rtl8168_mdio_write(tp, 0x14, 0xae08);
+        rtl8168_mdio_write(tp, 0x14, 0xe287);
+        rtl8168_mdio_write(tp, 0x14, 0xf7f6);
+        rtl8168_mdio_write(tp, 0x14, 0x36e6);
+        rtl8168_mdio_write(tp, 0x14, 0x87f7);
+        rtl8168_mdio_write(tp, 0x14, 0xfdef);
+        rtl8168_mdio_write(tp, 0x14, 0x95fd);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x14, 0xfafb);
+        rtl8168_mdio_write(tp, 0x14, 0xef79);
+        rtl8168_mdio_write(tp, 0x14, 0xfbbf);
+        rtl8168_mdio_write(tp, 0x14, 0x876f);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdcef);
+        rtl8168_mdio_write(tp, 0x14, 0x64e2);
+        rtl8168_mdio_write(tp, 0x14, 0x87e9);
+        rtl8168_mdio_write(tp, 0x14, 0xe387);
+        rtl8168_mdio_write(tp, 0x14, 0xea1b);
+        rtl8168_mdio_write(tp, 0x14, 0x659e);
+        rtl8168_mdio_write(tp, 0x14, 0x10e4);
+        rtl8168_mdio_write(tp, 0x14, 0x87e9);
+        rtl8168_mdio_write(tp, 0x14, 0xe587);
+        rtl8168_mdio_write(tp, 0x14, 0xeae2);
+        rtl8168_mdio_write(tp, 0x14, 0x87f7);
+        rtl8168_mdio_write(tp, 0x14, 0xf636);
+        rtl8168_mdio_write(tp, 0x14, 0xe687);
+        rtl8168_mdio_write(tp, 0x14, 0xf7ae);
+        rtl8168_mdio_write(tp, 0x14, 0x19e2);
+        rtl8168_mdio_write(tp, 0x14, 0x87f7);
+        rtl8168_mdio_write(tp, 0x14, 0xf736);
+        rtl8168_mdio_write(tp, 0x14, 0xe687);
+        rtl8168_mdio_write(tp, 0x14, 0xf700);
+        rtl8168_mdio_write(tp, 0x14, 0x00ae);
+        rtl8168_mdio_write(tp, 0x14, 0x0200);
+        rtl8168_mdio_write(tp, 0x14, 0x0002);
+        rtl8168_mdio_write(tp, 0x14, 0x49ca);
+        rtl8168_mdio_write(tp, 0x14, 0xef57);
+        rtl8168_mdio_write(tp, 0x14, 0xe687);
+        rtl8168_mdio_write(tp, 0x14, 0xe7e7);
+        rtl8168_mdio_write(tp, 0x14, 0x87e8);
+        rtl8168_mdio_write(tp, 0x14, 0xffef);
+        rtl8168_mdio_write(tp, 0x14, 0x97ff);
+        rtl8168_mdio_write(tp, 0x14, 0xfefd);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x14, 0xfafb);
+        rtl8168_mdio_write(tp, 0x14, 0xef79);
+        rtl8168_mdio_write(tp, 0x14, 0xfbe2);
+        rtl8168_mdio_write(tp, 0x14, 0x87e7);
+        rtl8168_mdio_write(tp, 0x14, 0xe387);
+        rtl8168_mdio_write(tp, 0x14, 0xe8ef);
+        rtl8168_mdio_write(tp, 0x14, 0x65e2);
+        rtl8168_mdio_write(tp, 0x14, 0x87fb);
+        rtl8168_mdio_write(tp, 0x14, 0xe387);
+        rtl8168_mdio_write(tp, 0x14, 0xfcef);
+        rtl8168_mdio_write(tp, 0x14, 0x7502);
+        rtl8168_mdio_write(tp, 0x14, 0x49e5);
+        rtl8168_mdio_write(tp, 0x14, 0xac50);
+        rtl8168_mdio_write(tp, 0x14, 0x1abf);
+        rtl8168_mdio_write(tp, 0x14, 0x876f);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdcef);
+        rtl8168_mdio_write(tp, 0x14, 0x64e2);
+        rtl8168_mdio_write(tp, 0x14, 0x87e9);
+        rtl8168_mdio_write(tp, 0x14, 0xe387);
+        rtl8168_mdio_write(tp, 0x14, 0xea1b);
+        rtl8168_mdio_write(tp, 0x14, 0x659e);
+        rtl8168_mdio_write(tp, 0x14, 0x16e4);
+        rtl8168_mdio_write(tp, 0x14, 0x87e9);
+        rtl8168_mdio_write(tp, 0x14, 0xe587);
+        rtl8168_mdio_write(tp, 0x14, 0xeaae);
+        rtl8168_mdio_write(tp, 0x14, 0x06bf);
+        rtl8168_mdio_write(tp, 0x14, 0x876c);
+        rtl8168_mdio_write(tp, 0x14, 0x024a);
+        rtl8168_mdio_write(tp, 0x14, 0x5fe2);
+        rtl8168_mdio_write(tp, 0x14, 0x87f7);
+        rtl8168_mdio_write(tp, 0x14, 0xf636);
+        rtl8168_mdio_write(tp, 0x14, 0xe687);
+        rtl8168_mdio_write(tp, 0x14, 0xf7ff);
+        rtl8168_mdio_write(tp, 0x14, 0xef97);
+        rtl8168_mdio_write(tp, 0x14, 0xfffe);
+        rtl8168_mdio_write(tp, 0x14, 0xfdfc);
+        rtl8168_mdio_write(tp, 0x14, 0x04f8);
+        rtl8168_mdio_write(tp, 0x14, 0xf9fa);
+        rtl8168_mdio_write(tp, 0x14, 0xef69);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x6602);
+        rtl8168_mdio_write(tp, 0x14, 0x44dc);
+        rtl8168_mdio_write(tp, 0x14, 0xad28);
+        rtl8168_mdio_write(tp, 0x14, 0x29bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8763);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdcef);
+        rtl8168_mdio_write(tp, 0x14, 0x54bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8760);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdcac);
+        rtl8168_mdio_write(tp, 0x14, 0x290d);
+        rtl8168_mdio_write(tp, 0x14, 0xac28);
+        rtl8168_mdio_write(tp, 0x14, 0x05a3);
+        rtl8168_mdio_write(tp, 0x14, 0x020c);
+        rtl8168_mdio_write(tp, 0x14, 0xae10);
+        rtl8168_mdio_write(tp, 0x14, 0xa303);
+        rtl8168_mdio_write(tp, 0x14, 0x07ae);
+        rtl8168_mdio_write(tp, 0x14, 0x0ba3);
+        rtl8168_mdio_write(tp, 0x14, 0x0402);
+        rtl8168_mdio_write(tp, 0x14, 0xae06);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x6c02);
+        rtl8168_mdio_write(tp, 0x14, 0x4a5f);
+        rtl8168_mdio_write(tp, 0x14, 0xef96);
+        rtl8168_mdio_write(tp, 0x14, 0xfefd);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
+        rtl8168_mdio_write(tp, 0x14, 0xfafb);
+        rtl8168_mdio_write(tp, 0x14, 0xef69);
+        rtl8168_mdio_write(tp, 0x14, 0xfae0);
+        rtl8168_mdio_write(tp, 0x14, 0x8015);
+        rtl8168_mdio_write(tp, 0x14, 0xad25);
+        rtl8168_mdio_write(tp, 0x14, 0x41d2);
+        rtl8168_mdio_write(tp, 0x14, 0x0002);
+        rtl8168_mdio_write(tp, 0x14, 0x86f3);
+        rtl8168_mdio_write(tp, 0x14, 0xe087);
+        rtl8168_mdio_write(tp, 0x14, 0xebe1);
+        rtl8168_mdio_write(tp, 0x14, 0x87ec);
+        rtl8168_mdio_write(tp, 0x14, 0x1b46);
+        rtl8168_mdio_write(tp, 0x14, 0xab26);
+        rtl8168_mdio_write(tp, 0x14, 0xd40b);
+        rtl8168_mdio_write(tp, 0x14, 0xff1b);
+        rtl8168_mdio_write(tp, 0x14, 0x46aa);
+        rtl8168_mdio_write(tp, 0x14, 0x1fac);
+        rtl8168_mdio_write(tp, 0x14, 0x3204);
+        rtl8168_mdio_write(tp, 0x14, 0xef32);
+        rtl8168_mdio_write(tp, 0x14, 0xae02);
+        rtl8168_mdio_write(tp, 0x14, 0xd304);
+        rtl8168_mdio_write(tp, 0x14, 0x0c31);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0xeb1a);
+        rtl8168_mdio_write(tp, 0x14, 0x93d8);
+        rtl8168_mdio_write(tp, 0x14, 0x19d9);
+        rtl8168_mdio_write(tp, 0x14, 0x1b46);
+        rtl8168_mdio_write(tp, 0x14, 0xab0e);
+        rtl8168_mdio_write(tp, 0x14, 0x19d8);
+        rtl8168_mdio_write(tp, 0x14, 0x19d9);
+        rtl8168_mdio_write(tp, 0x14, 0x1b46);
+        rtl8168_mdio_write(tp, 0x14, 0xaa06);
+        rtl8168_mdio_write(tp, 0x14, 0x12a2);
+        rtl8168_mdio_write(tp, 0x14, 0x08c9);
+        rtl8168_mdio_write(tp, 0x14, 0xae06);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x6902);
+        rtl8168_mdio_write(tp, 0x14, 0x4a5f);
+        rtl8168_mdio_write(tp, 0x14, 0xfeef);
+        rtl8168_mdio_write(tp, 0x14, 0x96ff);
+        rtl8168_mdio_write(tp, 0x14, 0xfefd);
+        rtl8168_mdio_write(tp, 0x14, 0xfc04);
+        rtl8168_mdio_write(tp, 0x14, 0xf8fb);
+        rtl8168_mdio_write(tp, 0x14, 0xef79);
+        rtl8168_mdio_write(tp, 0x14, 0xa200);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x876f);
+        rtl8168_mdio_write(tp, 0x14, 0xae33);
+        rtl8168_mdio_write(tp, 0x14, 0xa201);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8772);
+        rtl8168_mdio_write(tp, 0x14, 0xae2b);
+        rtl8168_mdio_write(tp, 0x14, 0xa202);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8775);
+        rtl8168_mdio_write(tp, 0x14, 0xae23);
+        rtl8168_mdio_write(tp, 0x14, 0xa203);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8778);
+        rtl8168_mdio_write(tp, 0x14, 0xae1b);
+        rtl8168_mdio_write(tp, 0x14, 0xa204);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x877b);
+        rtl8168_mdio_write(tp, 0x14, 0xae13);
+        rtl8168_mdio_write(tp, 0x14, 0xa205);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x877e);
+        rtl8168_mdio_write(tp, 0x14, 0xae0b);
+        rtl8168_mdio_write(tp, 0x14, 0xa206);
+        rtl8168_mdio_write(tp, 0x14, 0x05bf);
+        rtl8168_mdio_write(tp, 0x14, 0x8781);
+        rtl8168_mdio_write(tp, 0x14, 0xae03);
+        rtl8168_mdio_write(tp, 0x14, 0xbf87);
+        rtl8168_mdio_write(tp, 0x14, 0x8402);
+        rtl8168_mdio_write(tp, 0x14, 0x44dc);
+        rtl8168_mdio_write(tp, 0x14, 0xef64);
+        rtl8168_mdio_write(tp, 0x14, 0xef97);
+        rtl8168_mdio_write(tp, 0x14, 0xfffc);
+        rtl8168_mdio_write(tp, 0x14, 0x04af);
+        rtl8168_mdio_write(tp, 0x14, 0x00ed);
+        rtl8168_mdio_write(tp, 0x14, 0x0220);
+        rtl8168_mdio_write(tp, 0x14, 0xa5f8);
+        rtl8168_mdio_write(tp, 0x14, 0xfaef);
+        rtl8168_mdio_write(tp, 0x14, 0x69bf);
+        rtl8168_mdio_write(tp, 0x14, 0x4554);
+        rtl8168_mdio_write(tp, 0x14, 0x0244);
+        rtl8168_mdio_write(tp, 0x14, 0xdce0);
+        rtl8168_mdio_write(tp, 0x14, 0x87ff);
+        rtl8168_mdio_write(tp, 0x14, 0x1f01);
+        rtl8168_mdio_write(tp, 0x14, 0x9e06);
+        rtl8168_mdio_write(tp, 0x14, 0xe587);
+        rtl8168_mdio_write(tp, 0x14, 0xff02);
+        rtl8168_mdio_write(tp, 0x14, 0x4b05);
+        rtl8168_mdio_write(tp, 0x14, 0xef96);
+        rtl8168_mdio_write(tp, 0x14, 0xfefc);
+        rtl8168_mdio_write(tp, 0x14, 0xaf03);
+        rtl8168_mdio_write(tp, 0x14, 0x8c54);
+        rtl8168_mdio_write(tp, 0x14, 0xa434);
+        rtl8168_mdio_write(tp, 0x14, 0x74a6);
+        rtl8168_mdio_write(tp, 0x14, 0x0022);
+        rtl8168_mdio_write(tp, 0x14, 0xa434);
+        rtl8168_mdio_write(tp, 0x14, 0x11b8);
+        rtl8168_mdio_write(tp, 0x14, 0x4222);
+        rtl8168_mdio_write(tp, 0x14, 0xb842);
+        rtl8168_mdio_write(tp, 0x14, 0xf0a2);
+        rtl8168_mdio_write(tp, 0x14, 0x00f0);
+        rtl8168_mdio_write(tp, 0x14, 0xa202);
+        rtl8168_mdio_write(tp, 0x14, 0xf0a2);
+        rtl8168_mdio_write(tp, 0x14, 0x04f0);
+        rtl8168_mdio_write(tp, 0x14, 0xa206);
+        rtl8168_mdio_write(tp, 0x14, 0xf0a2);
+        rtl8168_mdio_write(tp, 0x14, 0x08f0);
+        rtl8168_mdio_write(tp, 0x14, 0xa20a);
+        rtl8168_mdio_write(tp, 0x14, 0xf0a2);
+        rtl8168_mdio_write(tp, 0x14, 0x0cf0);
+        rtl8168_mdio_write(tp, 0x14, 0xa20e);
+        rtl8168_mdio_write(tp, 0x14, 0x55b8);
+        rtl8168_mdio_write(tp, 0x14, 0x20d9);
+        rtl8168_mdio_write(tp, 0x14, 0xc608);
+        rtl8168_mdio_write(tp, 0x14, 0xaac4);
+        rtl8168_mdio_write(tp, 0x14, 0x3000);
+        rtl8168_mdio_write(tp, 0x14, 0xc614);
+        rtl8168_mdio_write(tp, 0x14, 0x33c4);
+        rtl8168_mdio_write(tp, 0x14, 0x1a88);
+        rtl8168_mdio_write(tp, 0x14, 0xc42e);
+        rtl8168_mdio_write(tp, 0x14, 0x22c4);
+        rtl8168_mdio_write(tp, 0x14, 0x2e54);
+        rtl8168_mdio_write(tp, 0x14, 0xc41a);
+        rtl8168_mdio_write(tp, 0x13, 0xb818);
+        rtl8168_mdio_write(tp, 0x14, 0x1a01);
+        rtl8168_mdio_write(tp, 0x13, 0xb81a);
+        rtl8168_mdio_write(tp, 0x14, 0x020b);
+        rtl8168_mdio_write(tp, 0x13, 0xb81c);
+        rtl8168_mdio_write(tp, 0x14, 0x03ce);
+        rtl8168_mdio_write(tp, 0x13, 0xb81e);
+        rtl8168_mdio_write(tp, 0x14, 0x00e7);
+        rtl8168_mdio_write(tp, 0x13, 0xb846);
+        rtl8168_mdio_write(tp, 0x14, 0x0389);
+        rtl8168_mdio_write(tp, 0x13, 0xb848);
+        rtl8168_mdio_write(tp, 0x14, 0xffff);
+        rtl8168_mdio_write(tp, 0x13, 0xb84a);
+        rtl8168_mdio_write(tp, 0x14, 0xffff);
+        rtl8168_mdio_write(tp, 0x13, 0xb84c);
+        rtl8168_mdio_write(tp, 0x14, 0xffff);
+        rtl8168_mdio_write(tp, 0x13, 0xb832);
+        rtl8168_mdio_write(tp, 0x14, 0x001f);
+
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x0000);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+        rtl8168_mdio_write(tp, 0x1f, 0x0B82);
+        gphy_val = rtl8168_mdio_read(tp, 0x17);
+        gphy_val &= ~(BIT_0);
+        rtl8168_mdio_write(tp, 0x17, gphy_val);
+        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
+        rtl8168_mdio_write(tp, 0x13, 0x8042);
+        rtl8168_mdio_write(tp, 0x14, 0x0000);
+
+
+        rtl8168_clear_phy_mcu_patch_request(tp);
+
+        if (tp->RequiredSecLanDonglePatch) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                gphy_val = rtl8168_mdio_read(tp, 0x11);
+                gphy_val &= ~BIT_6;
+                rtl8168_mdio_write(tp, 0x11, gphy_val);
+        }
+}
+
+static void
+rtl8168_init_hw_phy_mcu(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u8 require_disable_phy_disable_mode = FALSE;
+
+        if (tp->NotWrRamCodeToMicroP == TRUE)
+                return;
+        if (rtl8168_check_hw_phy_mcu_code_ver(dev))
+                return;
+
+        if (FALSE == rtl8168_phy_ram_code_check(dev)) {
+                rtl8168_set_phy_ram_code_check_fail_flag(dev);
+                return;
+        }
+
+        if (HW_SUPPORT_CHECK_PHY_DISABLE_MODE(tp) && rtl8168_is_in_phy_disable_mode(dev))
+                require_disable_phy_disable_mode = TRUE;
+
+        if (require_disable_phy_disable_mode)
+                rtl8168_disable_phy_disable_mode(dev);
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_14:
+                rtl8168_set_phy_mcu_8168e_1(dev);
+                break;
+        case CFG_METHOD_15:
+                rtl8168_set_phy_mcu_8168e_2(dev);
+                break;
+        case CFG_METHOD_16:
+                rtl8168_set_phy_mcu_8168evl_1(dev);
+                break;
+        case CFG_METHOD_17:
+                rtl8168_set_phy_mcu_8168evl_2(dev);
+                break;
+        case CFG_METHOD_18:
+                rtl8168_set_phy_mcu_8168f_1(dev);
+                break;
+        case CFG_METHOD_19:
+                rtl8168_set_phy_mcu_8168f_2(dev);
+                break;
+        case CFG_METHOD_20:
+                rtl8168_set_phy_mcu_8411_1(dev);
+                break;
+        case CFG_METHOD_21:
+                rtl8168_set_phy_mcu_8168g_1(dev);
+                break;
+        case CFG_METHOD_25:
+                rtl8168_set_phy_mcu_8168gu_2(dev);
+                break;
+        case CFG_METHOD_26:
+                rtl8168_set_phy_mcu_8411b_1(dev);
+                break;
+        case CFG_METHOD_28:
+                rtl8168_set_phy_mcu_8168ep_2(dev);
+                break;
+        case CFG_METHOD_29:
+                rtl8168_set_phy_mcu_8168h_1(dev);
+                break;
+        case CFG_METHOD_30:
+        case CFG_METHOD_37:
+                rtl8168_set_phy_mcu_8168h_2(dev);
+                break;
+        case CFG_METHOD_35:
+                rtl8168_set_phy_mcu_8168h_3(dev);
+                break;
+        case CFG_METHOD_36:
+                break;
+        }
+
+        if (require_disable_phy_disable_mode)
+                rtl8168_enable_phy_disable_mode(dev);
+
+        rtl8168_write_hw_phy_mcu_code_ver(dev);
+
+        rtl8168_mdio_write(tp,0x1F, 0x0000);
+
+        tp->HwHasWrRamCodeToMicroP = TRUE;
+}
+#endif
+
+static void
+rtl8168_hw_phy_config(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        struct pci_dev *pdev = tp->pci_dev;
+        u16 gphy_val;
+        unsigned int i;
+
+        tp->phy_reset_enable(dev);
+
+        if (HW_DASH_SUPPORT_TYPE_3(tp) && tp->HwPkgDet == 0x06)
+                return;
+
+#ifndef ENABLE_USE_FIRMWARE_FILE
+        if (!tp->rtl_fw) {
+                rtl8168_init_hw_phy_mcu(dev);
+        }
+#endif
+
+        if (tp->mcfg == CFG_METHOD_1) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x0B, 0x94B0);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x12, 0x6096);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x0D, 0xF8A0);
+        } else if (tp->mcfg == CFG_METHOD_2) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x0B, 0x94B0);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x12, 0x6096);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        } else if (tp->mcfg == CFG_METHOD_3) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x0B, 0x94B0);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x12, 0x6096);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        } else if (tp->mcfg == CFG_METHOD_4) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x12, 0x2300);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x16, 0x000A);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x12, 0xC096);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x00, 0x88DE);
+                rtl8168_mdio_write(tp, 0x01, 0x82B1);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x08, 0x9E30);
+                rtl8168_mdio_write(tp, 0x09, 0x01F0);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x0A, 0x5500);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x03, 0x7002);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x0C, 0x00C8);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) | (1 << 5));
+                rtl8168_mdio_write(tp, 0x0D, rtl8168_mdio_read(tp, 0x0D) & ~(1 << 5));
+        } else if (tp->mcfg == CFG_METHOD_5) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x12, 0x2300);
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x16, 0x0F0A);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x00, 0x88DE);
+                rtl8168_mdio_write(tp, 0x01, 0x82B1);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x0C, 0x7EB8);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x06, 0x0761);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x03, 0x802F);
+                rtl8168_mdio_write(tp, 0x02, 0x4F02);
+                rtl8168_mdio_write(tp, 0x01, 0x0409);
+                rtl8168_mdio_write(tp, 0x00, 0xF099);
+                rtl8168_mdio_write(tp, 0x04, 0x9800);
+                rtl8168_mdio_write(tp, 0x04, 0x9000);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                rtl8168_mdio_write(tp, 0x16, rtl8168_mdio_read(tp, 0x16) | (1 << 0));
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) | (1 << 5));
+                rtl8168_mdio_write(tp, 0x0D, rtl8168_mdio_read(tp, 0x0D) & ~(1 << 5));
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x1D, 0x3D98);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x17, 0x0CC0);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        } else if (tp->mcfg == CFG_METHOD_6) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x12, 0x2300);
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x16, 0x0F0A);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x00, 0x88DE);
+                rtl8168_mdio_write(tp, 0x01, 0x82B1);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x0C, 0x7EB8);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x06, 0x5461);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x06, 0x5461);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                rtl8168_mdio_write(tp, 0x16, rtl8168_mdio_read(tp, 0x16) | (1 << 0));
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) | (1 << 5));
+                rtl8168_mdio_write(tp, 0x0D, rtl8168_mdio_read(tp, 0x0D) & ~(1 << 5));
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x1D, 0x3D98);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0001);
+                rtl8168_mdio_write(tp, 0x17, 0x0CC0);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        } else if (tp->mcfg == CFG_METHOD_7) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) | (1 << 5));
+                rtl8168_mdio_write(tp, 0x0D, rtl8168_mdio_read(tp, 0x0D) & ~(1 << 5));
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x1D, 0x3D98);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x14, 0xCAA3);
+                rtl8168_mdio_write(tp, 0x1C, 0x000A);
+                rtl8168_mdio_write(tp, 0x18, 0x65D0);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x17, 0xB580);
+                rtl8168_mdio_write(tp, 0x18, 0xFF54);
+                rtl8168_mdio_write(tp, 0x19, 0x3954);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x0D, 0x310C);
+                rtl8168_mdio_write(tp, 0x0E, 0x310C);
+                rtl8168_mdio_write(tp, 0x0F, 0x311C);
+                rtl8168_mdio_write(tp, 0x06, 0x0761);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x18, 0xFF55);
+                rtl8168_mdio_write(tp, 0x19, 0x3955);
+                rtl8168_mdio_write(tp, 0x18, 0xFF54);
+                rtl8168_mdio_write(tp, 0x19, 0x3954);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x17, 0x0CC0);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        } else if (tp->mcfg == CFG_METHOD_8) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) | (1 << 5));
+                rtl8168_mdio_write(tp, 0x0D, rtl8168_mdio_read(tp, 0x0D) & ~(1 << 5));
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x14, 0xCAA3);
+                rtl8168_mdio_write(tp, 0x1C, 0x000A);
+                rtl8168_mdio_write(tp, 0x18, 0x65D0);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x17, 0xB580);
+                rtl8168_mdio_write(tp, 0x18, 0xFF54);
+                rtl8168_mdio_write(tp, 0x19, 0x3954);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x0D, 0x310C);
+                rtl8168_mdio_write(tp, 0x0E, 0x310C);
+                rtl8168_mdio_write(tp, 0x0F, 0x311C);
+                rtl8168_mdio_write(tp, 0x06, 0x0761);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x18, 0xFF55);
+                rtl8168_mdio_write(tp, 0x19, 0x3955);
+                rtl8168_mdio_write(tp, 0x18, 0xFF54);
+                rtl8168_mdio_write(tp, 0x19, 0x3954);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x17, 0x0CC0);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                rtl8168_mdio_write(tp, 0x16, rtl8168_mdio_read(tp, 0x16) | (1 << 0));
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        } else if (tp->mcfg == CFG_METHOD_9) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x06, 0x4064);
+                rtl8168_mdio_write(tp, 0x07, 0x2863);
+                rtl8168_mdio_write(tp, 0x08, 0x059C);
+                rtl8168_mdio_write(tp, 0x09, 0x26B4);
+                rtl8168_mdio_write(tp, 0x0A, 0x6A19);
+                rtl8168_mdio_write(tp, 0x0B, 0xDCC8);
+                rtl8168_mdio_write(tp, 0x10, 0xF06D);
+                rtl8168_mdio_write(tp, 0x14, 0x7F68);
+                rtl8168_mdio_write(tp, 0x18, 0x7FD9);
+                rtl8168_mdio_write(tp, 0x1C, 0xF0FF);
+                rtl8168_mdio_write(tp, 0x1D, 0x3D9C);
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x12, 0xF49F);
+                rtl8168_mdio_write(tp, 0x13, 0x070B);
+                rtl8168_mdio_write(tp, 0x1A, 0x05AD);
+                rtl8168_mdio_write(tp, 0x14, 0x94C0);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                gphy_val = rtl8168_mdio_read(tp, 0x0B) & 0xFF00;
+                gphy_val |= 0x10;
+                rtl8168_mdio_write(tp, 0x0B, gphy_val);
+                gphy_val = rtl8168_mdio_read(tp, 0x0C) & 0x00FF;
+                gphy_val |= 0xA200;
+                rtl8168_mdio_write(tp, 0x0C, gphy_val);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x06, 0x5561);
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8332);
+                rtl8168_mdio_write(tp, 0x06, 0x5561);
+
+                if (rtl8168_efuse_read(tp, 0x01) == 0xb1) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                        rtl8168_mdio_write(tp, 0x05, 0x669A);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                        rtl8168_mdio_write(tp, 0x05, 0x8330);
+                        rtl8168_mdio_write(tp, 0x06, 0x669A);
+
+                        rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                        gphy_val = rtl8168_mdio_read(tp, 0x0D);
+                        if ((gphy_val & 0x00FF) != 0x006C) {
+                                gphy_val &= 0xFF00;
+                                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x0065);
+                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x0066);
+                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x0067);
+                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x0068);
+                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x0069);
+                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x006A);
+                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x006B);
+                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x006C);
+                        }
+                } else {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                        rtl8168_mdio_write(tp, 0x05, 0x6662);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                        rtl8168_mdio_write(tp, 0x05, 0x8330);
+                        rtl8168_mdio_write(tp, 0x06, 0x6662);
+                }
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                gphy_val = rtl8168_mdio_read(tp, 0x0D);
+                gphy_val |= BIT_9;
+                gphy_val |= BIT_8;
+                rtl8168_mdio_write(tp, 0x0D, gphy_val);
+                gphy_val = rtl8168_mdio_read(tp, 0x0F);
+                gphy_val |= BIT_4;
+                rtl8168_mdio_write(tp, 0x0F, gphy_val);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                gphy_val = rtl8168_mdio_read(tp, 0x02);
+                gphy_val &= ~BIT_10;
+                gphy_val &= ~BIT_9;
+                gphy_val |= BIT_8;
+                rtl8168_mdio_write(tp, 0x02, gphy_val);
+                gphy_val = rtl8168_mdio_read(tp, 0x03);
+                gphy_val &= ~BIT_15;
+                gphy_val &= ~BIT_14;
+                gphy_val &= ~BIT_13;
+                rtl8168_mdio_write(tp, 0x03, gphy_val);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x17, 0x0CC0);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x001B);
+                if (rtl8168_mdio_read(tp, 0x06) == 0xBF00) {
+                        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                        rtl8168_mdio_write(tp, 0x05, 0xfff6);
+                        rtl8168_mdio_write(tp, 0x06, 0x0080);
+                        rtl8168_mdio_write(tp, 0x05, 0x8000);
+                        rtl8168_mdio_write(tp, 0x06, 0xf8f9);
+                        rtl8168_mdio_write(tp, 0x06, 0xfaef);
+                        rtl8168_mdio_write(tp, 0x06, 0x59ee);
+                        rtl8168_mdio_write(tp, 0x06, 0xf8ea);
+                        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+                        rtl8168_mdio_write(tp, 0x06, 0xf8eb);
+                        rtl8168_mdio_write(tp, 0x06, 0x00e0);
+                        rtl8168_mdio_write(tp, 0x06, 0xf87c);
+                        rtl8168_mdio_write(tp, 0x06, 0xe1f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x7d59);
+                        rtl8168_mdio_write(tp, 0x06, 0x0fef);
+                        rtl8168_mdio_write(tp, 0x06, 0x0139);
+                        rtl8168_mdio_write(tp, 0x06, 0x029e);
+                        rtl8168_mdio_write(tp, 0x06, 0x06ef);
+                        rtl8168_mdio_write(tp, 0x06, 0x1039);
+                        rtl8168_mdio_write(tp, 0x06, 0x089f);
+                        rtl8168_mdio_write(tp, 0x06, 0x2aee);
+                        rtl8168_mdio_write(tp, 0x06, 0xf8ea);
+                        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+                        rtl8168_mdio_write(tp, 0x06, 0xf8eb);
+                        rtl8168_mdio_write(tp, 0x06, 0x01e0);
+                        rtl8168_mdio_write(tp, 0x06, 0xf87c);
+                        rtl8168_mdio_write(tp, 0x06, 0xe1f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x7d58);
+                        rtl8168_mdio_write(tp, 0x06, 0x409e);
+                        rtl8168_mdio_write(tp, 0x06, 0x0f39);
+                        rtl8168_mdio_write(tp, 0x06, 0x46aa);
+                        rtl8168_mdio_write(tp, 0x06, 0x0bbf);
+                        rtl8168_mdio_write(tp, 0x06, 0x8290);
+                        rtl8168_mdio_write(tp, 0x06, 0xd682);
+                        rtl8168_mdio_write(tp, 0x06, 0x9802);
+                        rtl8168_mdio_write(tp, 0x06, 0x014f);
+                        rtl8168_mdio_write(tp, 0x06, 0xae09);
+                        rtl8168_mdio_write(tp, 0x06, 0xbf82);
+                        rtl8168_mdio_write(tp, 0x06, 0x98d6);
+                        rtl8168_mdio_write(tp, 0x06, 0x82a0);
+                        rtl8168_mdio_write(tp, 0x06, 0x0201);
+                        rtl8168_mdio_write(tp, 0x06, 0x4fef);
+                        rtl8168_mdio_write(tp, 0x06, 0x95fe);
+                        rtl8168_mdio_write(tp, 0x06, 0xfdfc);
+                        rtl8168_mdio_write(tp, 0x06, 0x05f8);
+                        rtl8168_mdio_write(tp, 0x06, 0xf9fa);
+                        rtl8168_mdio_write(tp, 0x06, 0xeef8);
+                        rtl8168_mdio_write(tp, 0x06, 0xea00);
+                        rtl8168_mdio_write(tp, 0x06, 0xeef8);
+                        rtl8168_mdio_write(tp, 0x06, 0xeb00);
+                        rtl8168_mdio_write(tp, 0x06, 0xe2f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x7ce3);
+                        rtl8168_mdio_write(tp, 0x06, 0xf87d);
+                        rtl8168_mdio_write(tp, 0x06, 0xa511);
+                        rtl8168_mdio_write(tp, 0x06, 0x1112);
+                        rtl8168_mdio_write(tp, 0x06, 0xd240);
+                        rtl8168_mdio_write(tp, 0x06, 0xd644);
+                        rtl8168_mdio_write(tp, 0x06, 0x4402);
+                        rtl8168_mdio_write(tp, 0x06, 0x8217);
+                        rtl8168_mdio_write(tp, 0x06, 0xd2a0);
+                        rtl8168_mdio_write(tp, 0x06, 0xd6aa);
+                        rtl8168_mdio_write(tp, 0x06, 0xaa02);
+                        rtl8168_mdio_write(tp, 0x06, 0x8217);
+                        rtl8168_mdio_write(tp, 0x06, 0xae0f);
+                        rtl8168_mdio_write(tp, 0x06, 0xa544);
+                        rtl8168_mdio_write(tp, 0x06, 0x4402);
+                        rtl8168_mdio_write(tp, 0x06, 0xae4d);
+                        rtl8168_mdio_write(tp, 0x06, 0xa5aa);
+                        rtl8168_mdio_write(tp, 0x06, 0xaa02);
+                        rtl8168_mdio_write(tp, 0x06, 0xae47);
+                        rtl8168_mdio_write(tp, 0x06, 0xaf82);
+                        rtl8168_mdio_write(tp, 0x06, 0x13ee);
+                        rtl8168_mdio_write(tp, 0x06, 0x834e);
+                        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+                        rtl8168_mdio_write(tp, 0x06, 0x834d);
+                        rtl8168_mdio_write(tp, 0x06, 0x0fee);
+                        rtl8168_mdio_write(tp, 0x06, 0x834c);
+                        rtl8168_mdio_write(tp, 0x06, 0x0fee);
+                        rtl8168_mdio_write(tp, 0x06, 0x834f);
+                        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+                        rtl8168_mdio_write(tp, 0x06, 0x8351);
+                        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+                        rtl8168_mdio_write(tp, 0x06, 0x834a);
+                        rtl8168_mdio_write(tp, 0x06, 0xffee);
+                        rtl8168_mdio_write(tp, 0x06, 0x834b);
+                        rtl8168_mdio_write(tp, 0x06, 0xffe0);
+                        rtl8168_mdio_write(tp, 0x06, 0x8330);
+                        rtl8168_mdio_write(tp, 0x06, 0xe183);
+                        rtl8168_mdio_write(tp, 0x06, 0x3158);
+                        rtl8168_mdio_write(tp, 0x06, 0xfee4);
+                        rtl8168_mdio_write(tp, 0x06, 0xf88a);
+                        rtl8168_mdio_write(tp, 0x06, 0xe5f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x8be0);
+                        rtl8168_mdio_write(tp, 0x06, 0x8332);
+                        rtl8168_mdio_write(tp, 0x06, 0xe183);
+                        rtl8168_mdio_write(tp, 0x06, 0x3359);
+                        rtl8168_mdio_write(tp, 0x06, 0x0fe2);
+                        rtl8168_mdio_write(tp, 0x06, 0x834d);
+                        rtl8168_mdio_write(tp, 0x06, 0x0c24);
+                        rtl8168_mdio_write(tp, 0x06, 0x5af0);
+                        rtl8168_mdio_write(tp, 0x06, 0x1e12);
+                        rtl8168_mdio_write(tp, 0x06, 0xe4f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x8ce5);
+                        rtl8168_mdio_write(tp, 0x06, 0xf88d);
+                        rtl8168_mdio_write(tp, 0x06, 0xaf82);
+                        rtl8168_mdio_write(tp, 0x06, 0x13e0);
+                        rtl8168_mdio_write(tp, 0x06, 0x834f);
+                        rtl8168_mdio_write(tp, 0x06, 0x10e4);
+                        rtl8168_mdio_write(tp, 0x06, 0x834f);
+                        rtl8168_mdio_write(tp, 0x06, 0xe083);
+                        rtl8168_mdio_write(tp, 0x06, 0x4e78);
+                        rtl8168_mdio_write(tp, 0x06, 0x009f);
+                        rtl8168_mdio_write(tp, 0x06, 0x0ae0);
+                        rtl8168_mdio_write(tp, 0x06, 0x834f);
+                        rtl8168_mdio_write(tp, 0x06, 0xa010);
+                        rtl8168_mdio_write(tp, 0x06, 0xa5ee);
+                        rtl8168_mdio_write(tp, 0x06, 0x834e);
+                        rtl8168_mdio_write(tp, 0x06, 0x01e0);
+                        rtl8168_mdio_write(tp, 0x06, 0x834e);
+                        rtl8168_mdio_write(tp, 0x06, 0x7805);
+                        rtl8168_mdio_write(tp, 0x06, 0x9e9a);
+                        rtl8168_mdio_write(tp, 0x06, 0xe083);
+                        rtl8168_mdio_write(tp, 0x06, 0x4e78);
+                        rtl8168_mdio_write(tp, 0x06, 0x049e);
+                        rtl8168_mdio_write(tp, 0x06, 0x10e0);
+                        rtl8168_mdio_write(tp, 0x06, 0x834e);
+                        rtl8168_mdio_write(tp, 0x06, 0x7803);
+                        rtl8168_mdio_write(tp, 0x06, 0x9e0f);
+                        rtl8168_mdio_write(tp, 0x06, 0xe083);
+                        rtl8168_mdio_write(tp, 0x06, 0x4e78);
+                        rtl8168_mdio_write(tp, 0x06, 0x019e);
+                        rtl8168_mdio_write(tp, 0x06, 0x05ae);
+                        rtl8168_mdio_write(tp, 0x06, 0x0caf);
+                        rtl8168_mdio_write(tp, 0x06, 0x81f8);
+                        rtl8168_mdio_write(tp, 0x06, 0xaf81);
+                        rtl8168_mdio_write(tp, 0x06, 0xa3af);
+                        rtl8168_mdio_write(tp, 0x06, 0x81dc);
+                        rtl8168_mdio_write(tp, 0x06, 0xaf82);
+                        rtl8168_mdio_write(tp, 0x06, 0x13ee);
+                        rtl8168_mdio_write(tp, 0x06, 0x8348);
+                        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+                        rtl8168_mdio_write(tp, 0x06, 0x8349);
+                        rtl8168_mdio_write(tp, 0x06, 0x00e0);
+                        rtl8168_mdio_write(tp, 0x06, 0x8351);
+                        rtl8168_mdio_write(tp, 0x06, 0x10e4);
+                        rtl8168_mdio_write(tp, 0x06, 0x8351);
+                        rtl8168_mdio_write(tp, 0x06, 0x5801);
+                        rtl8168_mdio_write(tp, 0x06, 0x9fea);
+                        rtl8168_mdio_write(tp, 0x06, 0xd000);
+                        rtl8168_mdio_write(tp, 0x06, 0xd180);
+                        rtl8168_mdio_write(tp, 0x06, 0x1f66);
+                        rtl8168_mdio_write(tp, 0x06, 0xe2f8);
+                        rtl8168_mdio_write(tp, 0x06, 0xeae3);
+                        rtl8168_mdio_write(tp, 0x06, 0xf8eb);
+                        rtl8168_mdio_write(tp, 0x06, 0x5af8);
+                        rtl8168_mdio_write(tp, 0x06, 0x1e20);
+                        rtl8168_mdio_write(tp, 0x06, 0xe6f8);
+                        rtl8168_mdio_write(tp, 0x06, 0xeae5);
+                        rtl8168_mdio_write(tp, 0x06, 0xf8eb);
+                        rtl8168_mdio_write(tp, 0x06, 0xd302);
+                        rtl8168_mdio_write(tp, 0x06, 0xb3fe);
+                        rtl8168_mdio_write(tp, 0x06, 0xe2f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x7cef);
+                        rtl8168_mdio_write(tp, 0x06, 0x325b);
+                        rtl8168_mdio_write(tp, 0x06, 0x80e3);
+                        rtl8168_mdio_write(tp, 0x06, 0xf87d);
+                        rtl8168_mdio_write(tp, 0x06, 0x9e03);
+                        rtl8168_mdio_write(tp, 0x06, 0x7dff);
+                        rtl8168_mdio_write(tp, 0x06, 0xff0d);
+                        rtl8168_mdio_write(tp, 0x06, 0x581c);
+                        rtl8168_mdio_write(tp, 0x06, 0x551a);
+                        rtl8168_mdio_write(tp, 0x06, 0x6511);
+                        rtl8168_mdio_write(tp, 0x06, 0xa190);
+                        rtl8168_mdio_write(tp, 0x06, 0xd3e2);
+                        rtl8168_mdio_write(tp, 0x06, 0x8348);
+                        rtl8168_mdio_write(tp, 0x06, 0xe383);
+                        rtl8168_mdio_write(tp, 0x06, 0x491b);
+                        rtl8168_mdio_write(tp, 0x06, 0x56ab);
+                        rtl8168_mdio_write(tp, 0x06, 0x08ef);
+                        rtl8168_mdio_write(tp, 0x06, 0x56e6);
+                        rtl8168_mdio_write(tp, 0x06, 0x8348);
+                        rtl8168_mdio_write(tp, 0x06, 0xe783);
+                        rtl8168_mdio_write(tp, 0x06, 0x4910);
+                        rtl8168_mdio_write(tp, 0x06, 0xd180);
+                        rtl8168_mdio_write(tp, 0x06, 0x1f66);
+                        rtl8168_mdio_write(tp, 0x06, 0xa004);
+                        rtl8168_mdio_write(tp, 0x06, 0xb9e2);
+                        rtl8168_mdio_write(tp, 0x06, 0x8348);
+                        rtl8168_mdio_write(tp, 0x06, 0xe383);
+                        rtl8168_mdio_write(tp, 0x06, 0x49ef);
+                        rtl8168_mdio_write(tp, 0x06, 0x65e2);
+                        rtl8168_mdio_write(tp, 0x06, 0x834a);
+                        rtl8168_mdio_write(tp, 0x06, 0xe383);
+                        rtl8168_mdio_write(tp, 0x06, 0x4b1b);
+                        rtl8168_mdio_write(tp, 0x06, 0x56aa);
+                        rtl8168_mdio_write(tp, 0x06, 0x0eef);
+                        rtl8168_mdio_write(tp, 0x06, 0x56e6);
+                        rtl8168_mdio_write(tp, 0x06, 0x834a);
+                        rtl8168_mdio_write(tp, 0x06, 0xe783);
+                        rtl8168_mdio_write(tp, 0x06, 0x4be2);
+                        rtl8168_mdio_write(tp, 0x06, 0x834d);
+                        rtl8168_mdio_write(tp, 0x06, 0xe683);
+                        rtl8168_mdio_write(tp, 0x06, 0x4ce0);
+                        rtl8168_mdio_write(tp, 0x06, 0x834d);
+                        rtl8168_mdio_write(tp, 0x06, 0xa000);
+                        rtl8168_mdio_write(tp, 0x06, 0x0caf);
+                        rtl8168_mdio_write(tp, 0x06, 0x81dc);
+                        rtl8168_mdio_write(tp, 0x06, 0xe083);
+                        rtl8168_mdio_write(tp, 0x06, 0x4d10);
+                        rtl8168_mdio_write(tp, 0x06, 0xe483);
+                        rtl8168_mdio_write(tp, 0x06, 0x4dae);
+                        rtl8168_mdio_write(tp, 0x06, 0x0480);
+                        rtl8168_mdio_write(tp, 0x06, 0xe483);
+                        rtl8168_mdio_write(tp, 0x06, 0x4de0);
+                        rtl8168_mdio_write(tp, 0x06, 0x834e);
+                        rtl8168_mdio_write(tp, 0x06, 0x7803);
+                        rtl8168_mdio_write(tp, 0x06, 0x9e0b);
+                        rtl8168_mdio_write(tp, 0x06, 0xe083);
+                        rtl8168_mdio_write(tp, 0x06, 0x4e78);
+                        rtl8168_mdio_write(tp, 0x06, 0x049e);
+                        rtl8168_mdio_write(tp, 0x06, 0x04ee);
+                        rtl8168_mdio_write(tp, 0x06, 0x834e);
+                        rtl8168_mdio_write(tp, 0x06, 0x02e0);
+                        rtl8168_mdio_write(tp, 0x06, 0x8332);
+                        rtl8168_mdio_write(tp, 0x06, 0xe183);
+                        rtl8168_mdio_write(tp, 0x06, 0x3359);
+                        rtl8168_mdio_write(tp, 0x06, 0x0fe2);
+                        rtl8168_mdio_write(tp, 0x06, 0x834d);
+                        rtl8168_mdio_write(tp, 0x06, 0x0c24);
+                        rtl8168_mdio_write(tp, 0x06, 0x5af0);
+                        rtl8168_mdio_write(tp, 0x06, 0x1e12);
+                        rtl8168_mdio_write(tp, 0x06, 0xe4f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x8ce5);
+                        rtl8168_mdio_write(tp, 0x06, 0xf88d);
+                        rtl8168_mdio_write(tp, 0x06, 0xe083);
+                        rtl8168_mdio_write(tp, 0x06, 0x30e1);
+                        rtl8168_mdio_write(tp, 0x06, 0x8331);
+                        rtl8168_mdio_write(tp, 0x06, 0x6801);
+                        rtl8168_mdio_write(tp, 0x06, 0xe4f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x8ae5);
+                        rtl8168_mdio_write(tp, 0x06, 0xf88b);
+                        rtl8168_mdio_write(tp, 0x06, 0xae37);
+                        rtl8168_mdio_write(tp, 0x06, 0xee83);
+                        rtl8168_mdio_write(tp, 0x06, 0x4e03);
+                        rtl8168_mdio_write(tp, 0x06, 0xe083);
+                        rtl8168_mdio_write(tp, 0x06, 0x4ce1);
+                        rtl8168_mdio_write(tp, 0x06, 0x834d);
+                        rtl8168_mdio_write(tp, 0x06, 0x1b01);
+                        rtl8168_mdio_write(tp, 0x06, 0x9e04);
+                        rtl8168_mdio_write(tp, 0x06, 0xaaa1);
+                        rtl8168_mdio_write(tp, 0x06, 0xaea8);
+                        rtl8168_mdio_write(tp, 0x06, 0xee83);
+                        rtl8168_mdio_write(tp, 0x06, 0x4e04);
+                        rtl8168_mdio_write(tp, 0x06, 0xee83);
+                        rtl8168_mdio_write(tp, 0x06, 0x4f00);
+                        rtl8168_mdio_write(tp, 0x06, 0xaeab);
+                        rtl8168_mdio_write(tp, 0x06, 0xe083);
+                        rtl8168_mdio_write(tp, 0x06, 0x4f78);
+                        rtl8168_mdio_write(tp, 0x06, 0x039f);
+                        rtl8168_mdio_write(tp, 0x06, 0x14ee);
+                        rtl8168_mdio_write(tp, 0x06, 0x834e);
+                        rtl8168_mdio_write(tp, 0x06, 0x05d2);
+                        rtl8168_mdio_write(tp, 0x06, 0x40d6);
+                        rtl8168_mdio_write(tp, 0x06, 0x5554);
+                        rtl8168_mdio_write(tp, 0x06, 0x0282);
+                        rtl8168_mdio_write(tp, 0x06, 0x17d2);
+                        rtl8168_mdio_write(tp, 0x06, 0xa0d6);
+                        rtl8168_mdio_write(tp, 0x06, 0xba00);
+                        rtl8168_mdio_write(tp, 0x06, 0x0282);
+                        rtl8168_mdio_write(tp, 0x06, 0x17fe);
+                        rtl8168_mdio_write(tp, 0x06, 0xfdfc);
+                        rtl8168_mdio_write(tp, 0x06, 0x05f8);
+                        rtl8168_mdio_write(tp, 0x06, 0xe0f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x60e1);
+                        rtl8168_mdio_write(tp, 0x06, 0xf861);
+                        rtl8168_mdio_write(tp, 0x06, 0x6802);
+                        rtl8168_mdio_write(tp, 0x06, 0xe4f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x60e5);
+                        rtl8168_mdio_write(tp, 0x06, 0xf861);
+                        rtl8168_mdio_write(tp, 0x06, 0xe0f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x48e1);
+                        rtl8168_mdio_write(tp, 0x06, 0xf849);
+                        rtl8168_mdio_write(tp, 0x06, 0x580f);
+                        rtl8168_mdio_write(tp, 0x06, 0x1e02);
+                        rtl8168_mdio_write(tp, 0x06, 0xe4f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x48e5);
+                        rtl8168_mdio_write(tp, 0x06, 0xf849);
+                        rtl8168_mdio_write(tp, 0x06, 0xd000);
+                        rtl8168_mdio_write(tp, 0x06, 0x0282);
+                        rtl8168_mdio_write(tp, 0x06, 0x5bbf);
+                        rtl8168_mdio_write(tp, 0x06, 0x8350);
+                        rtl8168_mdio_write(tp, 0x06, 0xef46);
+                        rtl8168_mdio_write(tp, 0x06, 0xdc19);
+                        rtl8168_mdio_write(tp, 0x06, 0xddd0);
+                        rtl8168_mdio_write(tp, 0x06, 0x0102);
+                        rtl8168_mdio_write(tp, 0x06, 0x825b);
+                        rtl8168_mdio_write(tp, 0x06, 0x0282);
+                        rtl8168_mdio_write(tp, 0x06, 0x77e0);
+                        rtl8168_mdio_write(tp, 0x06, 0xf860);
+                        rtl8168_mdio_write(tp, 0x06, 0xe1f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x6158);
+                        rtl8168_mdio_write(tp, 0x06, 0xfde4);
+                        rtl8168_mdio_write(tp, 0x06, 0xf860);
+                        rtl8168_mdio_write(tp, 0x06, 0xe5f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x61fc);
+                        rtl8168_mdio_write(tp, 0x06, 0x04f9);
+                        rtl8168_mdio_write(tp, 0x06, 0xfafb);
+                        rtl8168_mdio_write(tp, 0x06, 0xc6bf);
+                        rtl8168_mdio_write(tp, 0x06, 0xf840);
+                        rtl8168_mdio_write(tp, 0x06, 0xbe83);
+                        rtl8168_mdio_write(tp, 0x06, 0x50a0);
+                        rtl8168_mdio_write(tp, 0x06, 0x0101);
+                        rtl8168_mdio_write(tp, 0x06, 0x071b);
+                        rtl8168_mdio_write(tp, 0x06, 0x89cf);
+                        rtl8168_mdio_write(tp, 0x06, 0xd208);
+                        rtl8168_mdio_write(tp, 0x06, 0xebdb);
+                        rtl8168_mdio_write(tp, 0x06, 0x19b2);
+                        rtl8168_mdio_write(tp, 0x06, 0xfbff);
+                        rtl8168_mdio_write(tp, 0x06, 0xfefd);
+                        rtl8168_mdio_write(tp, 0x06, 0x04f8);
+                        rtl8168_mdio_write(tp, 0x06, 0xe0f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x48e1);
+                        rtl8168_mdio_write(tp, 0x06, 0xf849);
+                        rtl8168_mdio_write(tp, 0x06, 0x6808);
+                        rtl8168_mdio_write(tp, 0x06, 0xe4f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x48e5);
+                        rtl8168_mdio_write(tp, 0x06, 0xf849);
+                        rtl8168_mdio_write(tp, 0x06, 0x58f7);
+                        rtl8168_mdio_write(tp, 0x06, 0xe4f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x48e5);
+                        rtl8168_mdio_write(tp, 0x06, 0xf849);
+                        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                        rtl8168_mdio_write(tp, 0x06, 0x4d20);
+                        rtl8168_mdio_write(tp, 0x06, 0x0002);
+                        rtl8168_mdio_write(tp, 0x06, 0x4e22);
+                        rtl8168_mdio_write(tp, 0x06, 0x0002);
+                        rtl8168_mdio_write(tp, 0x06, 0x4ddf);
+                        rtl8168_mdio_write(tp, 0x06, 0xff01);
+                        rtl8168_mdio_write(tp, 0x06, 0x4edd);
+                        rtl8168_mdio_write(tp, 0x06, 0xff01);
+                        rtl8168_mdio_write(tp, 0x06, 0xf8fa);
+                        rtl8168_mdio_write(tp, 0x06, 0xfbef);
+                        rtl8168_mdio_write(tp, 0x06, 0x79bf);
+                        rtl8168_mdio_write(tp, 0x06, 0xf822);
+                        rtl8168_mdio_write(tp, 0x06, 0xd819);
+                        rtl8168_mdio_write(tp, 0x06, 0xd958);
+                        rtl8168_mdio_write(tp, 0x06, 0x849f);
+                        rtl8168_mdio_write(tp, 0x06, 0x09bf);
+                        rtl8168_mdio_write(tp, 0x06, 0x82be);
+                        rtl8168_mdio_write(tp, 0x06, 0xd682);
+                        rtl8168_mdio_write(tp, 0x06, 0xc602);
+                        rtl8168_mdio_write(tp, 0x06, 0x014f);
+                        rtl8168_mdio_write(tp, 0x06, 0xef97);
+                        rtl8168_mdio_write(tp, 0x06, 0xfffe);
+                        rtl8168_mdio_write(tp, 0x06, 0xfc05);
+                        rtl8168_mdio_write(tp, 0x06, 0x17ff);
+                        rtl8168_mdio_write(tp, 0x06, 0xfe01);
+                        rtl8168_mdio_write(tp, 0x06, 0x1700);
+                        rtl8168_mdio_write(tp, 0x06, 0x0102);
+                        rtl8168_mdio_write(tp, 0x05, 0x83d8);
+                        rtl8168_mdio_write(tp, 0x06, 0x8051);
+                        rtl8168_mdio_write(tp, 0x05, 0x83d6);
+                        rtl8168_mdio_write(tp, 0x06, 0x82a0);
+                        rtl8168_mdio_write(tp, 0x05, 0x83d4);
+                        rtl8168_mdio_write(tp, 0x06, 0x8000);
+                        rtl8168_mdio_write(tp, 0x02, 0x2010);
+                        rtl8168_mdio_write(tp, 0x03, 0xdc00);
+                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                        rtl8168_mdio_write(tp, 0x0b, 0x0600);
+                        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                        rtl8168_mdio_write(tp, 0x05, 0xfff6);
+                        rtl8168_mdio_write(tp, 0x06, 0x00fc);
+                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                }
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                rtl8168_mdio_write(tp, 0x0D, 0xF880);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        } else if (tp->mcfg == CFG_METHOD_10) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x06, 0x4064);
+                rtl8168_mdio_write(tp, 0x07, 0x2863);
+                rtl8168_mdio_write(tp, 0x08, 0x059C);
+                rtl8168_mdio_write(tp, 0x09, 0x26B4);
+                rtl8168_mdio_write(tp, 0x0A, 0x6A19);
+                rtl8168_mdio_write(tp, 0x0B, 0xDCC8);
+                rtl8168_mdio_write(tp, 0x10, 0xF06D);
+                rtl8168_mdio_write(tp, 0x14, 0x7F68);
+                rtl8168_mdio_write(tp, 0x18, 0x7FD9);
+                rtl8168_mdio_write(tp, 0x1C, 0xF0FF);
+                rtl8168_mdio_write(tp, 0x1D, 0x3D9C);
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x12, 0xF49F);
+                rtl8168_mdio_write(tp, 0x13, 0x070B);
+                rtl8168_mdio_write(tp, 0x1A, 0x05AD);
+                rtl8168_mdio_write(tp, 0x14, 0x94C0);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x06, 0x5561);
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8332);
+                rtl8168_mdio_write(tp, 0x06, 0x5561);
+
+                if (rtl8168_efuse_read(tp, 0x01) == 0xb1) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                        rtl8168_mdio_write(tp, 0x05, 0x669A);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                        rtl8168_mdio_write(tp, 0x05, 0x8330);
+                        rtl8168_mdio_write(tp, 0x06, 0x669A);
+
+                        rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                        gphy_val = rtl8168_mdio_read(tp, 0x0D);
+                        if ((gphy_val & 0x00FF) != 0x006C) {
+                                gphy_val &= 0xFF00;
+                                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x0065);
+                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x0066);
+                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x0067);
+                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x0068);
+                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x0069);
+                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x006A);
+                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x006B);
+                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x006C);
+                        }
+                } else {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                        rtl8168_mdio_write(tp, 0x05, 0x2642);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                        rtl8168_mdio_write(tp, 0x05, 0x8330);
+                        rtl8168_mdio_write(tp, 0x06, 0x2642);
+                }
+
+                if (rtl8168_efuse_read(tp, 0x30) == 0x98) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                        rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) & ~BIT_1);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                        rtl8168_mdio_write(tp, 0x01, rtl8168_mdio_read(tp, 0x01) | BIT_9);
+                } else if (rtl8168_efuse_read(tp, 0x30) == 0x90) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                        rtl8168_mdio_write(tp, 0x01, rtl8168_mdio_read(tp, 0x01) & ~BIT_9);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                        rtl8168_mdio_write(tp, 0x16, 0x5101);
+                }
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                gphy_val = rtl8168_mdio_read(tp, 0x02);
+                gphy_val &= ~BIT_10;
+                gphy_val &= ~BIT_9;
+                gphy_val |= BIT_8;
+                rtl8168_mdio_write(tp, 0x02, gphy_val);
+                gphy_val = rtl8168_mdio_read(tp, 0x03);
+                gphy_val &= ~BIT_15;
+                gphy_val &= ~BIT_14;
+                gphy_val &= ~BIT_13;
+                rtl8168_mdio_write(tp, 0x03, gphy_val);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x17, 0x0CC0);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                gphy_val = rtl8168_mdio_read(tp, 0x0F);
+                gphy_val |= BIT_4;
+                gphy_val |= BIT_2;
+                gphy_val |= BIT_1;
+                gphy_val |= BIT_0;
+                rtl8168_mdio_write(tp, 0x0F, gphy_val);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x001B);
+                if (rtl8168_mdio_read(tp, 0x06) == 0xB300) {
+                        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                        rtl8168_mdio_write(tp, 0x05, 0xfff6);
+                        rtl8168_mdio_write(tp, 0x06, 0x0080);
+                        rtl8168_mdio_write(tp, 0x05, 0x8000);
+                        rtl8168_mdio_write(tp, 0x06, 0xf8f9);
+                        rtl8168_mdio_write(tp, 0x06, 0xfaee);
+                        rtl8168_mdio_write(tp, 0x06, 0xf8ea);
+                        rtl8168_mdio_write(tp, 0x06, 0x00ee);
+                        rtl8168_mdio_write(tp, 0x06, 0xf8eb);
+                        rtl8168_mdio_write(tp, 0x06, 0x00e2);
+                        rtl8168_mdio_write(tp, 0x06, 0xf87c);
+                        rtl8168_mdio_write(tp, 0x06, 0xe3f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x7da5);
+                        rtl8168_mdio_write(tp, 0x06, 0x1111);
+                        rtl8168_mdio_write(tp, 0x06, 0x12d2);
+                        rtl8168_mdio_write(tp, 0x06, 0x40d6);
+                        rtl8168_mdio_write(tp, 0x06, 0x4444);
+                        rtl8168_mdio_write(tp, 0x06, 0x0281);
+                        rtl8168_mdio_write(tp, 0x06, 0xc6d2);
+                        rtl8168_mdio_write(tp, 0x06, 0xa0d6);
+                        rtl8168_mdio_write(tp, 0x06, 0xaaaa);
+                        rtl8168_mdio_write(tp, 0x06, 0x0281);
+                        rtl8168_mdio_write(tp, 0x06, 0xc6ae);
+                        rtl8168_mdio_write(tp, 0x06, 0x0fa5);
+                        rtl8168_mdio_write(tp, 0x06, 0x4444);
+                        rtl8168_mdio_write(tp, 0x06, 0x02ae);
+                        rtl8168_mdio_write(tp, 0x06, 0x4da5);
+                        rtl8168_mdio_write(tp, 0x06, 0xaaaa);
+                        rtl8168_mdio_write(tp, 0x06, 0x02ae);
+                        rtl8168_mdio_write(tp, 0x06, 0x47af);
+                        rtl8168_mdio_write(tp, 0x06, 0x81c2);
+                        rtl8168_mdio_write(tp, 0x06, 0xee83);
+                        rtl8168_mdio_write(tp, 0x06, 0x4e00);
+                        rtl8168_mdio_write(tp, 0x06, 0xee83);
+                        rtl8168_mdio_write(tp, 0x06, 0x4d0f);
+                        rtl8168_mdio_write(tp, 0x06, 0xee83);
+                        rtl8168_mdio_write(tp, 0x06, 0x4c0f);
+                        rtl8168_mdio_write(tp, 0x06, 0xee83);
+                        rtl8168_mdio_write(tp, 0x06, 0x4f00);
+                        rtl8168_mdio_write(tp, 0x06, 0xee83);
+                        rtl8168_mdio_write(tp, 0x06, 0x5100);
+                        rtl8168_mdio_write(tp, 0x06, 0xee83);
+                        rtl8168_mdio_write(tp, 0x06, 0x4aff);
+                        rtl8168_mdio_write(tp, 0x06, 0xee83);
+                        rtl8168_mdio_write(tp, 0x06, 0x4bff);
+                        rtl8168_mdio_write(tp, 0x06, 0xe083);
+                        rtl8168_mdio_write(tp, 0x06, 0x30e1);
+                        rtl8168_mdio_write(tp, 0x06, 0x8331);
+                        rtl8168_mdio_write(tp, 0x06, 0x58fe);
+                        rtl8168_mdio_write(tp, 0x06, 0xe4f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x8ae5);
+                        rtl8168_mdio_write(tp, 0x06, 0xf88b);
+                        rtl8168_mdio_write(tp, 0x06, 0xe083);
+                        rtl8168_mdio_write(tp, 0x06, 0x32e1);
+                        rtl8168_mdio_write(tp, 0x06, 0x8333);
+                        rtl8168_mdio_write(tp, 0x06, 0x590f);
+                        rtl8168_mdio_write(tp, 0x06, 0xe283);
+                        rtl8168_mdio_write(tp, 0x06, 0x4d0c);
+                        rtl8168_mdio_write(tp, 0x06, 0x245a);
+                        rtl8168_mdio_write(tp, 0x06, 0xf01e);
+                        rtl8168_mdio_write(tp, 0x06, 0x12e4);
+                        rtl8168_mdio_write(tp, 0x06, 0xf88c);
+                        rtl8168_mdio_write(tp, 0x06, 0xe5f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x8daf);
+                        rtl8168_mdio_write(tp, 0x06, 0x81c2);
+                        rtl8168_mdio_write(tp, 0x06, 0xe083);
+                        rtl8168_mdio_write(tp, 0x06, 0x4f10);
+                        rtl8168_mdio_write(tp, 0x06, 0xe483);
+                        rtl8168_mdio_write(tp, 0x06, 0x4fe0);
+                        rtl8168_mdio_write(tp, 0x06, 0x834e);
+                        rtl8168_mdio_write(tp, 0x06, 0x7800);
+                        rtl8168_mdio_write(tp, 0x06, 0x9f0a);
+                        rtl8168_mdio_write(tp, 0x06, 0xe083);
+                        rtl8168_mdio_write(tp, 0x06, 0x4fa0);
+                        rtl8168_mdio_write(tp, 0x06, 0x10a5);
+                        rtl8168_mdio_write(tp, 0x06, 0xee83);
+                        rtl8168_mdio_write(tp, 0x06, 0x4e01);
+                        rtl8168_mdio_write(tp, 0x06, 0xe083);
+                        rtl8168_mdio_write(tp, 0x06, 0x4e78);
+                        rtl8168_mdio_write(tp, 0x06, 0x059e);
+                        rtl8168_mdio_write(tp, 0x06, 0x9ae0);
+                        rtl8168_mdio_write(tp, 0x06, 0x834e);
+                        rtl8168_mdio_write(tp, 0x06, 0x7804);
+                        rtl8168_mdio_write(tp, 0x06, 0x9e10);
+                        rtl8168_mdio_write(tp, 0x06, 0xe083);
+                        rtl8168_mdio_write(tp, 0x06, 0x4e78);
+                        rtl8168_mdio_write(tp, 0x06, 0x039e);
+                        rtl8168_mdio_write(tp, 0x06, 0x0fe0);
+                        rtl8168_mdio_write(tp, 0x06, 0x834e);
+                        rtl8168_mdio_write(tp, 0x06, 0x7801);
+                        rtl8168_mdio_write(tp, 0x06, 0x9e05);
+                        rtl8168_mdio_write(tp, 0x06, 0xae0c);
+                        rtl8168_mdio_write(tp, 0x06, 0xaf81);
+                        rtl8168_mdio_write(tp, 0x06, 0xa7af);
+                        rtl8168_mdio_write(tp, 0x06, 0x8152);
+                        rtl8168_mdio_write(tp, 0x06, 0xaf81);
+                        rtl8168_mdio_write(tp, 0x06, 0x8baf);
+                        rtl8168_mdio_write(tp, 0x06, 0x81c2);
+                        rtl8168_mdio_write(tp, 0x06, 0xee83);
+                        rtl8168_mdio_write(tp, 0x06, 0x4800);
+                        rtl8168_mdio_write(tp, 0x06, 0xee83);
+                        rtl8168_mdio_write(tp, 0x06, 0x4900);
+                        rtl8168_mdio_write(tp, 0x06, 0xe083);
+                        rtl8168_mdio_write(tp, 0x06, 0x5110);
+                        rtl8168_mdio_write(tp, 0x06, 0xe483);
+                        rtl8168_mdio_write(tp, 0x06, 0x5158);
+                        rtl8168_mdio_write(tp, 0x06, 0x019f);
+                        rtl8168_mdio_write(tp, 0x06, 0xead0);
+                        rtl8168_mdio_write(tp, 0x06, 0x00d1);
+                        rtl8168_mdio_write(tp, 0x06, 0x801f);
+                        rtl8168_mdio_write(tp, 0x06, 0x66e2);
+                        rtl8168_mdio_write(tp, 0x06, 0xf8ea);
+                        rtl8168_mdio_write(tp, 0x06, 0xe3f8);
+                        rtl8168_mdio_write(tp, 0x06, 0xeb5a);
+                        rtl8168_mdio_write(tp, 0x06, 0xf81e);
+                        rtl8168_mdio_write(tp, 0x06, 0x20e6);
+                        rtl8168_mdio_write(tp, 0x06, 0xf8ea);
+                        rtl8168_mdio_write(tp, 0x06, 0xe5f8);
+                        rtl8168_mdio_write(tp, 0x06, 0xebd3);
+                        rtl8168_mdio_write(tp, 0x06, 0x02b3);
+                        rtl8168_mdio_write(tp, 0x06, 0xfee2);
+                        rtl8168_mdio_write(tp, 0x06, 0xf87c);
+                        rtl8168_mdio_write(tp, 0x06, 0xef32);
+                        rtl8168_mdio_write(tp, 0x06, 0x5b80);
+                        rtl8168_mdio_write(tp, 0x06, 0xe3f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x7d9e);
+                        rtl8168_mdio_write(tp, 0x06, 0x037d);
+                        rtl8168_mdio_write(tp, 0x06, 0xffff);
+                        rtl8168_mdio_write(tp, 0x06, 0x0d58);
+                        rtl8168_mdio_write(tp, 0x06, 0x1c55);
+                        rtl8168_mdio_write(tp, 0x06, 0x1a65);
+                        rtl8168_mdio_write(tp, 0x06, 0x11a1);
+                        rtl8168_mdio_write(tp, 0x06, 0x90d3);
+                        rtl8168_mdio_write(tp, 0x06, 0xe283);
+                        rtl8168_mdio_write(tp, 0x06, 0x48e3);
+                        rtl8168_mdio_write(tp, 0x06, 0x8349);
+                        rtl8168_mdio_write(tp, 0x06, 0x1b56);
+                        rtl8168_mdio_write(tp, 0x06, 0xab08);
+                        rtl8168_mdio_write(tp, 0x06, 0xef56);
+                        rtl8168_mdio_write(tp, 0x06, 0xe683);
+                        rtl8168_mdio_write(tp, 0x06, 0x48e7);
+                        rtl8168_mdio_write(tp, 0x06, 0x8349);
+                        rtl8168_mdio_write(tp, 0x06, 0x10d1);
+                        rtl8168_mdio_write(tp, 0x06, 0x801f);
+                        rtl8168_mdio_write(tp, 0x06, 0x66a0);
+                        rtl8168_mdio_write(tp, 0x06, 0x04b9);
+                        rtl8168_mdio_write(tp, 0x06, 0xe283);
+                        rtl8168_mdio_write(tp, 0x06, 0x48e3);
+                        rtl8168_mdio_write(tp, 0x06, 0x8349);
+                        rtl8168_mdio_write(tp, 0x06, 0xef65);
+                        rtl8168_mdio_write(tp, 0x06, 0xe283);
+                        rtl8168_mdio_write(tp, 0x06, 0x4ae3);
+                        rtl8168_mdio_write(tp, 0x06, 0x834b);
+                        rtl8168_mdio_write(tp, 0x06, 0x1b56);
+                        rtl8168_mdio_write(tp, 0x06, 0xaa0e);
+                        rtl8168_mdio_write(tp, 0x06, 0xef56);
+                        rtl8168_mdio_write(tp, 0x06, 0xe683);
+                        rtl8168_mdio_write(tp, 0x06, 0x4ae7);
+                        rtl8168_mdio_write(tp, 0x06, 0x834b);
+                        rtl8168_mdio_write(tp, 0x06, 0xe283);
+                        rtl8168_mdio_write(tp, 0x06, 0x4de6);
+                        rtl8168_mdio_write(tp, 0x06, 0x834c);
+                        rtl8168_mdio_write(tp, 0x06, 0xe083);
+                        rtl8168_mdio_write(tp, 0x06, 0x4da0);
+                        rtl8168_mdio_write(tp, 0x06, 0x000c);
+                        rtl8168_mdio_write(tp, 0x06, 0xaf81);
+                        rtl8168_mdio_write(tp, 0x06, 0x8be0);
+                        rtl8168_mdio_write(tp, 0x06, 0x834d);
+                        rtl8168_mdio_write(tp, 0x06, 0x10e4);
+                        rtl8168_mdio_write(tp, 0x06, 0x834d);
+                        rtl8168_mdio_write(tp, 0x06, 0xae04);
+                        rtl8168_mdio_write(tp, 0x06, 0x80e4);
+                        rtl8168_mdio_write(tp, 0x06, 0x834d);
+                        rtl8168_mdio_write(tp, 0x06, 0xe083);
+                        rtl8168_mdio_write(tp, 0x06, 0x4e78);
+                        rtl8168_mdio_write(tp, 0x06, 0x039e);
+                        rtl8168_mdio_write(tp, 0x06, 0x0be0);
+                        rtl8168_mdio_write(tp, 0x06, 0x834e);
+                        rtl8168_mdio_write(tp, 0x06, 0x7804);
+                        rtl8168_mdio_write(tp, 0x06, 0x9e04);
+                        rtl8168_mdio_write(tp, 0x06, 0xee83);
+                        rtl8168_mdio_write(tp, 0x06, 0x4e02);
+                        rtl8168_mdio_write(tp, 0x06, 0xe083);
+                        rtl8168_mdio_write(tp, 0x06, 0x32e1);
+                        rtl8168_mdio_write(tp, 0x06, 0x8333);
+                        rtl8168_mdio_write(tp, 0x06, 0x590f);
+                        rtl8168_mdio_write(tp, 0x06, 0xe283);
+                        rtl8168_mdio_write(tp, 0x06, 0x4d0c);
+                        rtl8168_mdio_write(tp, 0x06, 0x245a);
+                        rtl8168_mdio_write(tp, 0x06, 0xf01e);
+                        rtl8168_mdio_write(tp, 0x06, 0x12e4);
+                        rtl8168_mdio_write(tp, 0x06, 0xf88c);
+                        rtl8168_mdio_write(tp, 0x06, 0xe5f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x8de0);
+                        rtl8168_mdio_write(tp, 0x06, 0x8330);
+                        rtl8168_mdio_write(tp, 0x06, 0xe183);
+                        rtl8168_mdio_write(tp, 0x06, 0x3168);
+                        rtl8168_mdio_write(tp, 0x06, 0x01e4);
+                        rtl8168_mdio_write(tp, 0x06, 0xf88a);
+                        rtl8168_mdio_write(tp, 0x06, 0xe5f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x8bae);
+                        rtl8168_mdio_write(tp, 0x06, 0x37ee);
+                        rtl8168_mdio_write(tp, 0x06, 0x834e);
+                        rtl8168_mdio_write(tp, 0x06, 0x03e0);
+                        rtl8168_mdio_write(tp, 0x06, 0x834c);
+                        rtl8168_mdio_write(tp, 0x06, 0xe183);
+                        rtl8168_mdio_write(tp, 0x06, 0x4d1b);
+                        rtl8168_mdio_write(tp, 0x06, 0x019e);
+                        rtl8168_mdio_write(tp, 0x06, 0x04aa);
+                        rtl8168_mdio_write(tp, 0x06, 0xa1ae);
+                        rtl8168_mdio_write(tp, 0x06, 0xa8ee);
+                        rtl8168_mdio_write(tp, 0x06, 0x834e);
+                        rtl8168_mdio_write(tp, 0x06, 0x04ee);
+                        rtl8168_mdio_write(tp, 0x06, 0x834f);
+                        rtl8168_mdio_write(tp, 0x06, 0x00ae);
+                        rtl8168_mdio_write(tp, 0x06, 0xabe0);
+                        rtl8168_mdio_write(tp, 0x06, 0x834f);
+                        rtl8168_mdio_write(tp, 0x06, 0x7803);
+                        rtl8168_mdio_write(tp, 0x06, 0x9f14);
+                        rtl8168_mdio_write(tp, 0x06, 0xee83);
+                        rtl8168_mdio_write(tp, 0x06, 0x4e05);
+                        rtl8168_mdio_write(tp, 0x06, 0xd240);
+                        rtl8168_mdio_write(tp, 0x06, 0xd655);
+                        rtl8168_mdio_write(tp, 0x06, 0x5402);
+                        rtl8168_mdio_write(tp, 0x06, 0x81c6);
+                        rtl8168_mdio_write(tp, 0x06, 0xd2a0);
+                        rtl8168_mdio_write(tp, 0x06, 0xd6ba);
+                        rtl8168_mdio_write(tp, 0x06, 0x0002);
+                        rtl8168_mdio_write(tp, 0x06, 0x81c6);
+                        rtl8168_mdio_write(tp, 0x06, 0xfefd);
+                        rtl8168_mdio_write(tp, 0x06, 0xfc05);
+                        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+                        rtl8168_mdio_write(tp, 0x06, 0xf860);
+                        rtl8168_mdio_write(tp, 0x06, 0xe1f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x6168);
+                        rtl8168_mdio_write(tp, 0x06, 0x02e4);
+                        rtl8168_mdio_write(tp, 0x06, 0xf860);
+                        rtl8168_mdio_write(tp, 0x06, 0xe5f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x61e0);
+                        rtl8168_mdio_write(tp, 0x06, 0xf848);
+                        rtl8168_mdio_write(tp, 0x06, 0xe1f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x4958);
+                        rtl8168_mdio_write(tp, 0x06, 0x0f1e);
+                        rtl8168_mdio_write(tp, 0x06, 0x02e4);
+                        rtl8168_mdio_write(tp, 0x06, 0xf848);
+                        rtl8168_mdio_write(tp, 0x06, 0xe5f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x49d0);
+                        rtl8168_mdio_write(tp, 0x06, 0x0002);
+                        rtl8168_mdio_write(tp, 0x06, 0x820a);
+                        rtl8168_mdio_write(tp, 0x06, 0xbf83);
+                        rtl8168_mdio_write(tp, 0x06, 0x50ef);
+                        rtl8168_mdio_write(tp, 0x06, 0x46dc);
+                        rtl8168_mdio_write(tp, 0x06, 0x19dd);
+                        rtl8168_mdio_write(tp, 0x06, 0xd001);
+                        rtl8168_mdio_write(tp, 0x06, 0x0282);
+                        rtl8168_mdio_write(tp, 0x06, 0x0a02);
+                        rtl8168_mdio_write(tp, 0x06, 0x8226);
+                        rtl8168_mdio_write(tp, 0x06, 0xe0f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x60e1);
+                        rtl8168_mdio_write(tp, 0x06, 0xf861);
+                        rtl8168_mdio_write(tp, 0x06, 0x58fd);
+                        rtl8168_mdio_write(tp, 0x06, 0xe4f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x60e5);
+                        rtl8168_mdio_write(tp, 0x06, 0xf861);
+                        rtl8168_mdio_write(tp, 0x06, 0xfc04);
+                        rtl8168_mdio_write(tp, 0x06, 0xf9fa);
+                        rtl8168_mdio_write(tp, 0x06, 0xfbc6);
+                        rtl8168_mdio_write(tp, 0x06, 0xbff8);
+                        rtl8168_mdio_write(tp, 0x06, 0x40be);
+                        rtl8168_mdio_write(tp, 0x06, 0x8350);
+                        rtl8168_mdio_write(tp, 0x06, 0xa001);
+                        rtl8168_mdio_write(tp, 0x06, 0x0107);
+                        rtl8168_mdio_write(tp, 0x06, 0x1b89);
+                        rtl8168_mdio_write(tp, 0x06, 0xcfd2);
+                        rtl8168_mdio_write(tp, 0x06, 0x08eb);
+                        rtl8168_mdio_write(tp, 0x06, 0xdb19);
+                        rtl8168_mdio_write(tp, 0x06, 0xb2fb);
+                        rtl8168_mdio_write(tp, 0x06, 0xfffe);
+                        rtl8168_mdio_write(tp, 0x06, 0xfd04);
+                        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
+                        rtl8168_mdio_write(tp, 0x06, 0xf848);
+                        rtl8168_mdio_write(tp, 0x06, 0xe1f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x4968);
+                        rtl8168_mdio_write(tp, 0x06, 0x08e4);
+                        rtl8168_mdio_write(tp, 0x06, 0xf848);
+                        rtl8168_mdio_write(tp, 0x06, 0xe5f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x4958);
+                        rtl8168_mdio_write(tp, 0x06, 0xf7e4);
+                        rtl8168_mdio_write(tp, 0x06, 0xf848);
+                        rtl8168_mdio_write(tp, 0x06, 0xe5f8);
+                        rtl8168_mdio_write(tp, 0x06, 0x49fc);
+                        rtl8168_mdio_write(tp, 0x06, 0x044d);
+                        rtl8168_mdio_write(tp, 0x06, 0x2000);
+                        rtl8168_mdio_write(tp, 0x06, 0x024e);
+                        rtl8168_mdio_write(tp, 0x06, 0x2200);
+                        rtl8168_mdio_write(tp, 0x06, 0x024d);
+                        rtl8168_mdio_write(tp, 0x06, 0xdfff);
+                        rtl8168_mdio_write(tp, 0x06, 0x014e);
+                        rtl8168_mdio_write(tp, 0x06, 0xddff);
+                        rtl8168_mdio_write(tp, 0x06, 0x01f8);
+                        rtl8168_mdio_write(tp, 0x06, 0xfafb);
+                        rtl8168_mdio_write(tp, 0x06, 0xef79);
+                        rtl8168_mdio_write(tp, 0x06, 0xbff8);
+                        rtl8168_mdio_write(tp, 0x06, 0x22d8);
+                        rtl8168_mdio_write(tp, 0x06, 0x19d9);
+                        rtl8168_mdio_write(tp, 0x06, 0x5884);
+                        rtl8168_mdio_write(tp, 0x06, 0x9f09);
+                        rtl8168_mdio_write(tp, 0x06, 0xbf82);
+                        rtl8168_mdio_write(tp, 0x06, 0x6dd6);
+                        rtl8168_mdio_write(tp, 0x06, 0x8275);
+                        rtl8168_mdio_write(tp, 0x06, 0x0201);
+                        rtl8168_mdio_write(tp, 0x06, 0x4fef);
+                        rtl8168_mdio_write(tp, 0x06, 0x97ff);
+                        rtl8168_mdio_write(tp, 0x06, 0xfefc);
+                        rtl8168_mdio_write(tp, 0x06, 0x0517);
+                        rtl8168_mdio_write(tp, 0x06, 0xfffe);
+                        rtl8168_mdio_write(tp, 0x06, 0x0117);
+                        rtl8168_mdio_write(tp, 0x06, 0x0001);
+                        rtl8168_mdio_write(tp, 0x06, 0x0200);
+                        rtl8168_mdio_write(tp, 0x05, 0x83d8);
+                        rtl8168_mdio_write(tp, 0x06, 0x8000);
+                        rtl8168_mdio_write(tp, 0x05, 0x83d6);
+                        rtl8168_mdio_write(tp, 0x06, 0x824f);
+                        rtl8168_mdio_write(tp, 0x02, 0x2010);
+                        rtl8168_mdio_write(tp, 0x03, 0xdc00);
+                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                        rtl8168_mdio_write(tp, 0x0b, 0x0600);
+                        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                        rtl8168_mdio_write(tp, 0x05, 0xfff6);
+                        rtl8168_mdio_write(tp, 0x06, 0x00fc);
+                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                }
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                rtl8168_mdio_write(tp, 0x0D, 0xF880);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        } else if (tp->mcfg == CFG_METHOD_11) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x10, 0x0008);
+                rtl8168_mdio_write(tp, 0x0D, 0x006C);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x17, 0x0CC0);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x0B, 0xA4D8);
+                rtl8168_mdio_write(tp, 0x09, 0x281C);
+                rtl8168_mdio_write(tp, 0x07, 0x2883);
+                rtl8168_mdio_write(tp, 0x0A, 0x6B35);
+                rtl8168_mdio_write(tp, 0x1D, 0x3DA4);
+                rtl8168_mdio_write(tp, 0x1C, 0xEFFD);
+                rtl8168_mdio_write(tp, 0x14, 0x7F52);
+                rtl8168_mdio_write(tp, 0x18, 0x7FC6);
+                rtl8168_mdio_write(tp, 0x08, 0x0601);
+                rtl8168_mdio_write(tp, 0x06, 0x4063);
+                rtl8168_mdio_write(tp, 0x10, 0xF074);
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x13, 0x0789);
+                rtl8168_mdio_write(tp, 0x12, 0xF4BD);
+                rtl8168_mdio_write(tp, 0x1A, 0x04FD);
+                rtl8168_mdio_write(tp, 0x14, 0x84B0);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                rtl8168_mdio_write(tp, 0x00, 0x9200);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x01, 0x0340);
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x04, 0x4000);
+                rtl8168_mdio_write(tp, 0x03, 0x1D21);
+                rtl8168_mdio_write(tp, 0x02, 0x0C32);
+                rtl8168_mdio_write(tp, 0x01, 0x0200);
+                rtl8168_mdio_write(tp, 0x00, 0x5554);
+                rtl8168_mdio_write(tp, 0x04, 0x4800);
+                rtl8168_mdio_write(tp, 0x04, 0x4000);
+                rtl8168_mdio_write(tp, 0x04, 0xF000);
+                rtl8168_mdio_write(tp, 0x03, 0xDF01);
+                rtl8168_mdio_write(tp, 0x02, 0xDF20);
+                rtl8168_mdio_write(tp, 0x01, 0x101A);
+                rtl8168_mdio_write(tp, 0x00, 0xA0FF);
+                rtl8168_mdio_write(tp, 0x04, 0xF800);
+                rtl8168_mdio_write(tp, 0x04, 0xF000);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                rtl8168_mdio_write(tp, 0x1E, 0x0023);
+                rtl8168_mdio_write(tp, 0x16, 0x0000);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                gphy_val = rtl8168_mdio_read(tp, 0x0D);
+                gphy_val |= BIT_5;
+                rtl8168_mdio_write(tp, 0x0D, gphy_val);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                gphy_val = rtl8168_mdio_read(tp, 0x0C);
+                gphy_val |= BIT_10;
+                rtl8168_mdio_write(tp, 0x0C, gphy_val);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        } else if (tp->mcfg == CFG_METHOD_12) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x17, 0x0CC0);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                gphy_val = rtl8168_mdio_read(tp, 0x0D);
+                gphy_val |= BIT_5;
+                rtl8168_mdio_write(tp, 0x0D, gphy_val);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                gphy_val = rtl8168_mdio_read(tp, 0x0C);
+                gphy_val |= BIT_10;
+                rtl8168_mdio_write(tp, 0x0C, gphy_val);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                rtl8168_mdio_write(tp, 0x1E, 0x002C);
+                rtl8168_mdio_write(tp, 0x15, 0x035D);
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x01, 0x0300);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        } else if (tp->mcfg == CFG_METHOD_13) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                gphy_val = rtl8168_mdio_read(tp, 0x0D);
+                gphy_val |= BIT_5;
+                rtl8168_mdio_write(tp, 0x0D, gphy_val);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                gphy_val = rtl8168_mdio_read(tp, 0x0C);
+                gphy_val |= BIT_10;
+                rtl8168_mdio_write(tp, 0x0C, gphy_val);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        } else if (tp->mcfg == CFG_METHOD_14 || tp->mcfg == CFG_METHOD_15) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                rtl8168_mdio_write(tp, 0x1E, 0x0023);
+                gphy_val = rtl8168_mdio_read(tp, 0x17) | BIT_1;
+                if (tp->RequiredSecLanDonglePatch)
+                        gphy_val &= ~(BIT_2);
+                else
+                        gphy_val |= (BIT_2);
+                rtl8168_mdio_write(tp, 0x17, gphy_val);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8b80);
+                rtl8168_mdio_write(tp, 0x06, 0xc896);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x0B, 0x6C20);
+                rtl8168_mdio_write(tp, 0x07, 0x2872);
+                rtl8168_mdio_write(tp, 0x1C, 0xEFFF);
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x14, 0x6420);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                gphy_val = rtl8168_mdio_read(tp, 0x08) & 0x00FF;
+                rtl8168_mdio_write(tp, 0x08, gphy_val | 0x8000);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                rtl8168_mdio_write(tp, 0x1E, 0x002D);
+                gphy_val = rtl8168_mdio_read(tp, 0x18);
+                rtl8168_mdio_write(tp, 0x18, gphy_val | 0x0010);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                gphy_val = rtl8168_mdio_read(tp, 0x14);
+                rtl8168_mdio_write(tp, 0x14, gphy_val | 0x8000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x00, 0x080B);
+                rtl8168_mdio_write(tp, 0x0B, 0x09D7);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                if (aspm) {
+                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                                rtl8168_mdio_write(tp, 0x15, 0x1006);
+                        }
+                }
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x19, 0x7F46);
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8AD2);
+                rtl8168_mdio_write(tp, 0x06, 0x6810);
+                rtl8168_mdio_write(tp, 0x05, 0x8AD4);
+                rtl8168_mdio_write(tp, 0x06, 0x8002);
+                rtl8168_mdio_write(tp, 0x05, 0x8ADE);
+                rtl8168_mdio_write(tp, 0x06, 0x8025);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                rtl8168_mdio_write(tp, 0x1E, 0x002F);
+                rtl8168_mdio_write(tp, 0x15, 0x1919);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                rtl8168_mdio_write(tp, 0x1E, 0x002D);
+                gphy_val = rtl8168_mdio_read(tp, 0x18);
+                rtl8168_mdio_write(tp, 0x18, gphy_val | 0x0040);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B86);
+                gphy_val = rtl8168_mdio_read(tp, 0x06);
+                rtl8168_mdio_write(tp, 0x06, gphy_val | 0x0001);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                rtl8168_mdio_write(tp, 0x1E, 0x00AC);
+                rtl8168_mdio_write(tp, 0x18, 0x0006);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        } else if (tp->mcfg == CFG_METHOD_16) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B80);
+                gphy_val = rtl8168_mdio_read(tp, 0x06);
+                gphy_val |= BIT_2 | BIT_1;
+                rtl8168_mdio_write(tp, 0x06, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0004);
+                rtl8168_mdio_write(tp, 0x1f, 0x0007);
+                rtl8168_mdio_write(tp, 0x1e, 0x002D);
+                gphy_val = rtl8168_mdio_read(tp, 0x18);
+                gphy_val |= BIT_4;
+                rtl8168_mdio_write(tp, 0x18, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0002);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                gphy_val = rtl8168_mdio_read(tp, 0x14);
+                gphy_val |= BIT_15;
+                rtl8168_mdio_write(tp, 0x14, gphy_val);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                rtl8168_mdio_write(tp, 0x15, 0x1006);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B86);
+                gphy_val = rtl8168_mdio_read(tp, 0x06);
+                gphy_val |= BIT_0;
+                rtl8168_mdio_write(tp, 0x06, gphy_val);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                rtl8168_mdio_write(tp, 0x0B, 0x6C14);
+                rtl8168_mdio_write(tp, 0x14, 0x7F3D);
+                rtl8168_mdio_write(tp, 0x1C, 0xFAFE);
+                rtl8168_mdio_write(tp, 0x08, 0x07C5);
+                rtl8168_mdio_write(tp, 0x10, 0xF090);
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x14, 0x641A);
+                rtl8168_mdio_write(tp, 0x1A, 0x0606);
+                rtl8168_mdio_write(tp, 0x12, 0xF480);
+                rtl8168_mdio_write(tp, 0x13, 0x0747);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0004);
+                rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                rtl8168_mdio_write(tp, 0x1E, 0x0078);
+                rtl8168_mdio_write(tp, 0x15, 0xA408);
+                rtl8168_mdio_write(tp, 0x17, 0x5100);
+                rtl8168_mdio_write(tp, 0x19, 0x0008);
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x0D, 0x0207);
+                rtl8168_mdio_write(tp, 0x02, 0x5FD0);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0004);
+                rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                rtl8168_mdio_write(tp, 0x1E, 0x00A1);
+                gphy_val = rtl8168_mdio_read(tp, 0x1A);
+                gphy_val &= ~BIT_2;
+                rtl8168_mdio_write(tp, 0x1A, gphy_val);
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0004);
+                rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                rtl8168_mdio_write(tp, 0x1E, 0x002D);
+                gphy_val = rtl8168_mdio_read(tp, 0x16);
+                gphy_val |= BIT_5;
+                rtl8168_mdio_write(tp, 0x16, gphy_val);
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0004);
+                rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                rtl8168_mdio_write(tp, 0x1E, 0x00AC);
+                rtl8168_mdio_write(tp, 0x18, 0x0006);
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x09, 0xA20F);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B5B);
+                rtl8168_mdio_write(tp, 0x06, 0x9222);
+                rtl8168_mdio_write(tp, 0x05, 0x8B6D);
+                rtl8168_mdio_write(tp, 0x06, 0x8000);
+                rtl8168_mdio_write(tp, 0x05, 0x8B76);
+                rtl8168_mdio_write(tp, 0x06, 0x8000);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                if (pdev->subsystem_vendor == 0x1043 &&
+                    pdev->subsystem_device == 0x13F7) {
+
+                        static const u16 evl_phy_value[] = {
+                                0x8B56, 0x8B5F, 0x8B68, 0x8B71,
+                                0x8B7A, 0x8A7B, 0x8A7E, 0x8A81,
+                                0x8A84, 0x8A87
+                        };
+
+                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                        for (i = 0; i < ARRAY_SIZE(evl_phy_value); i++) {
+                                rtl8168_mdio_write(tp, 0x05, evl_phy_value[i]);
+                                gphy_val = (0xAA << 8) | (rtl8168_mdio_read(tp, 0x06) & 0xFF);
+                                rtl8168_mdio_write(tp, 0x06, gphy_val);
+                        }
+                        rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                        rtl8168_mdio_write(tp, 0x1E, 0x0078);
+                        rtl8168_mdio_write(tp, 0x17, 0x51AA);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                }
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B54);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_11);
+                rtl8168_mdio_write(tp, 0x05, 0x8B5D);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_11);
+                rtl8168_mdio_write(tp, 0x05, 0x8A7C);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x05, 0x8A7F);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) | BIT_8);
+                rtl8168_mdio_write(tp, 0x05, 0x8A82);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x05, 0x8A85);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x05, 0x8A88);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B85);
+                gphy_val = rtl8168_mdio_read(tp, 0x06) | BIT_14 | BIT_15;
+                rtl8168_mdio_write(tp, 0x06, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+        } else if (tp->mcfg == CFG_METHOD_17) {
+                if (pdev->subsystem_vendor == 0x144d &&
+                    pdev->subsystem_device == 0xc0a6) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0001);
+                        rtl8168_mdio_write(tp, 0x0e, 0x6b7f);
+                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                        rtl8168_mdio_write(tp, 0x05, 0x8B86);
+                        gphy_val = rtl8168_mdio_read(tp, 0x06);
+                        gphy_val |= BIT_4;
+                        rtl8168_mdio_write(tp, 0x06, gphy_val);
+                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                } else {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                        rtl8168_mdio_write(tp, 0x05, 0x8B80);
+                        gphy_val = rtl8168_mdio_read(tp, 0x06);
+                        gphy_val |= BIT_2 | BIT_1;
+                        rtl8168_mdio_write(tp, 0x06, gphy_val);
+                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                        rtl8168_mdio_write(tp, 0x05, 0x8B86);
+                        gphy_val = rtl8168_mdio_read(tp, 0x06);
+                        gphy_val &= ~BIT_4;
+                        rtl8168_mdio_write(tp, 0x06, gphy_val);
+                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                }
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0004);
+                rtl8168_mdio_write(tp, 0x1f, 0x0007);
+                rtl8168_mdio_write(tp, 0x1e, 0x002D);
+                gphy_val = rtl8168_mdio_read(tp, 0x18);
+                gphy_val |= BIT_4;
+                rtl8168_mdio_write(tp, 0x18, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0002);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                gphy_val = rtl8168_mdio_read(tp, 0x14);
+                gphy_val |= BIT_15;
+                rtl8168_mdio_write(tp, 0x14, gphy_val);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B86);
+                gphy_val = rtl8168_mdio_read(tp, 0x06);
+                gphy_val |= BIT_0;
+                rtl8168_mdio_write(tp, 0x06, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0004);
+                rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                rtl8168_mdio_write(tp, 0x1E, 0x00AC);
+                rtl8168_mdio_write(tp, 0x18, 0x0006);
+                rtl8168_mdio_write(tp, 0x1F, 0x0002);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x09, 0xA20F);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B85);
+                gphy_val = rtl8168_mdio_read(tp, 0x06) | BIT_14 | BIT_15;
+                rtl8168_mdio_write(tp, 0x06, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B5B);
+                rtl8168_mdio_write(tp, 0x06, 0x9222);
+                rtl8168_mdio_write(tp, 0x05, 0x8B6D);
+                rtl8168_mdio_write(tp, 0x06, 0x8000);
+                rtl8168_mdio_write(tp, 0x05, 0x8B76);
+                rtl8168_mdio_write(tp, 0x06, 0x8000);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                if (pdev->subsystem_vendor == 0x1043 &&
+                    pdev->subsystem_device == 0x13F7) {
+
+                        static const u16 evl_phy_value[] = {
+                                0x8B56, 0x8B5F, 0x8B68, 0x8B71,
+                                0x8B7A, 0x8A7B, 0x8A7E, 0x8A81,
+                                0x8A84, 0x8A87
+                        };
+
+                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                        for (i = 0; i < ARRAY_SIZE(evl_phy_value); i++) {
+                                rtl8168_mdio_write(tp, 0x05, evl_phy_value[i]);
+                                gphy_val = (0xAA << 8) | (rtl8168_mdio_read(tp, 0x06) & 0xFF);
+                                rtl8168_mdio_write(tp, 0x06, gphy_val);
+                        }
+                        rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                        rtl8168_mdio_write(tp, 0x1E, 0x0078);
+                        rtl8168_mdio_write(tp, 0x17, 0x51AA);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                }
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B54);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_11);
+                rtl8168_mdio_write(tp, 0x05, 0x8B5D);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_11);
+                rtl8168_mdio_write(tp, 0x05, 0x8A7C);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x05, 0x8A7F);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) | BIT_8);
+                rtl8168_mdio_write(tp, 0x05, 0x8A82);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x05, 0x8A85);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x05, 0x8A88);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+                if (aspm) {
+                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                                gphy_val = rtl8168_mdio_read(tp, 0x15);
+                                gphy_val |= BIT_12;
+                                rtl8168_mdio_write(tp, 0x15, gphy_val);
+                        }
+                }
+        } else if (tp->mcfg == CFG_METHOD_18) {
+                if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                        rtl8168_mdio_write(tp, 0x05, 0x8b80);
+                        gphy_val = rtl8168_mdio_read(tp, 0x06);
+                        gphy_val |= BIT_2 | BIT_1;
+                        rtl8168_mdio_write(tp, 0x06, gphy_val);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                }
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0007);
+                rtl8168_mdio_write(tp, 0x1e, 0x002D);
+                gphy_val = rtl8168_mdio_read(tp, 0x18);
+                gphy_val |= BIT_4;
+                rtl8168_mdio_write(tp, 0x18, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                gphy_val = rtl8168_mdio_read(tp, 0x14);
+                gphy_val |= BIT_15;
+                rtl8168_mdio_write(tp, 0x14, gphy_val);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B86);
+                gphy_val = rtl8168_mdio_read(tp, 0x06);
+                gphy_val |= BIT_0;
+                rtl8168_mdio_write(tp, 0x06, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B85);
+                gphy_val = rtl8168_mdio_read(tp, 0x06);
+                gphy_val |= BIT_14;
+                rtl8168_mdio_write(tp, 0x06, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x09, 0xA20F);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B55);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x05, 0x8B5E);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x05, 0x8B67);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x05, 0x8B70);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                rtl8168_mdio_write(tp, 0x1E, 0x0078);
+                rtl8168_mdio_write(tp, 0x17, 0x0000);
+                rtl8168_mdio_write(tp, 0x19, 0x00FB);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B79);
+                rtl8168_mdio_write(tp, 0x06, 0xAA00);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0003);
+                rtl8168_mdio_write(tp, 0x01, 0x328A);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B54);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_11);
+                rtl8168_mdio_write(tp, 0x05, 0x8B5D);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_11);
+                rtl8168_mdio_write(tp, 0x05, 0x8A7C);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x05, 0x8A7F);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) | BIT_8);
+                rtl8168_mdio_write(tp, 0x05, 0x8A82);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x05, 0x8A85);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x05, 0x8A88);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+                if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                        rtl8168_mdio_write(tp, 0x05, 0x8b85);
+                        rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) | BIT_15);
+                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                }
+
+                if (aspm) {
+                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                                gphy_val = rtl8168_mdio_read(tp, 0x15);
+                                gphy_val |= BIT_12;
+                                rtl8168_mdio_write(tp, 0x15, gphy_val);
+                        }
+                }
+        } else if (tp->mcfg == CFG_METHOD_19) {
+                if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                        rtl8168_mdio_write(tp, 0x05, 0x8b80);
+                        gphy_val = rtl8168_mdio_read(tp, 0x06);
+                        gphy_val |= BIT_2 | BIT_1;
+                        rtl8168_mdio_write(tp, 0x06, gphy_val);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                }
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0007);
+                rtl8168_mdio_write(tp, 0x1e, 0x002D);
+                gphy_val = rtl8168_mdio_read(tp, 0x18);
+                gphy_val |= BIT_4;
+                rtl8168_mdio_write(tp, 0x18, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                gphy_val = rtl8168_mdio_read(tp, 0x14);
+                gphy_val |= BIT_15;
+                rtl8168_mdio_write(tp, 0x14, gphy_val);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B86);
+                gphy_val = rtl8168_mdio_read(tp, 0x06);
+                gphy_val |= BIT_0;
+                rtl8168_mdio_write(tp, 0x06, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B54);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_11);
+                rtl8168_mdio_write(tp, 0x05, 0x8B5D);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_11);
+                rtl8168_mdio_write(tp, 0x05, 0x8A7C);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x05, 0x8A7F);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) | BIT_8);
+                rtl8168_mdio_write(tp, 0x05, 0x8A82);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x05, 0x8A85);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x05, 0x8A88);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                rtl8168_mdio_write(tp, 0x1E, 0x0023);
+                rtl8168_clear_eth_phy_bit(tp, 0x17, BIT_1);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+
+                if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                        rtl8168_mdio_write(tp, 0x05, 0x8b85);
+                        rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) | BIT_15);
+                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                }
+
+                if (aspm) {
+                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                                gphy_val = rtl8168_mdio_read(tp, 0x15);
+                                gphy_val |= BIT_12;
+                                rtl8168_mdio_write(tp, 0x15, gphy_val);
+                        }
+                }
+        } else if (tp->mcfg == CFG_METHOD_20) {
+
+                if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                        rtl8168_mdio_write(tp, 0x05, 0x8b80);
+                        gphy_val = rtl8168_mdio_read(tp, 0x06);
+                        gphy_val |= BIT_2 | BIT_1;
+                        rtl8168_mdio_write(tp, 0x06, gphy_val);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                }
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0007);
+                rtl8168_mdio_write(tp, 0x1e, 0x002D);
+                gphy_val = rtl8168_mdio_read(tp, 0x18);
+                gphy_val |= BIT_4;
+                rtl8168_mdio_write(tp, 0x18, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                gphy_val = rtl8168_mdio_read(tp, 0x14);
+                gphy_val |= BIT_15;
+                rtl8168_mdio_write(tp, 0x14, gphy_val);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B86);
+                gphy_val = rtl8168_mdio_read(tp, 0x06);
+                gphy_val |= BIT_0;
+                rtl8168_mdio_write(tp, 0x06, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B85);
+                gphy_val = rtl8168_mdio_read(tp, 0x06);
+                gphy_val |= BIT_14;
+                rtl8168_mdio_write(tp, 0x06, gphy_val);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0003);
+                rtl8168_mdio_write(tp, 0x09, 0xA20F);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B55);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x05, 0x8B5E);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x05, 0x8B67);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x05, 0x8B70);
+                rtl8168_mdio_write(tp, 0x06, 0x0000);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                rtl8168_mdio_write(tp, 0x1E, 0x0078);
+                rtl8168_mdio_write(tp, 0x17, 0x0000);
+                rtl8168_mdio_write(tp, 0x19, 0x00FB);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B79);
+                rtl8168_mdio_write(tp, 0x06, 0xAA00);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                rtl8168_mdio_write(tp, 0x05, 0x8B54);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_11);
+                rtl8168_mdio_write(tp, 0x05, 0x8B5D);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_11);
+                rtl8168_mdio_write(tp, 0x05, 0x8A7C);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x05, 0x8A7F);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) | BIT_8);
+                rtl8168_mdio_write(tp, 0x05, 0x8A82);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x05, 0x8A85);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x05, 0x8A88);
+                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+
+                if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                        rtl8168_mdio_write(tp, 0x1f, 0x0005);
+                        rtl8168_mdio_write(tp, 0x05, 0x8b85);
+                        rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) | BIT_15);
+                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                }
+
+                if (aspm) {
+                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                                rtl8168_mdio_write(tp, 0x1f, 0x0000);
+                                gphy_val = rtl8168_mdio_read(tp, 0x15);
+                                gphy_val |= BIT_12;
+                                rtl8168_mdio_write(tp, 0x15, gphy_val);
+                        }
+                }
+        } else if (tp->mcfg == CFG_METHOD_21) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0A46);
+                gphy_val = rtl8168_mdio_read(tp, 0x10);
+                rtl8168_mdio_write(tp, 0x1F, 0x0BCC);
+                if (gphy_val & BIT_8)
+                        rtl8168_clear_eth_phy_bit(tp, 0x12, BIT_15);
+                else
+                        rtl8168_set_eth_phy_bit(tp, 0x12, BIT_15);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A46);
+                gphy_val = rtl8168_mdio_read(tp, 0x13);
+                rtl8168_mdio_write(tp, 0x1F, 0x0C41);
+                if (gphy_val & BIT_8)
+                        rtl8168_set_eth_phy_bit(tp, 0x15, BIT_1);
+                else
+                        rtl8168_clear_eth_phy_bit(tp, 0x15, BIT_1);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
+                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_2 | BIT_3);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0BCC);
+                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
+                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_7);
+                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_6);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8084);
+                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) & ~(BIT_14 | BIT_13));
+                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_12);
+                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_1);
+                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_0);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A4B);
+                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_2);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8012);
+                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) | BIT_15);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0C42);
+                gphy_val = rtl8168_mdio_read(tp, 0x11);
+                gphy_val |= BIT_14;
+                gphy_val &= ~BIT_13;
+                rtl8168_mdio_write(tp, 0x11, gphy_val);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x809A);
+                rtl8168_mdio_write(tp, 0x14, 0x8022);
+                rtl8168_mdio_write(tp, 0x13, 0x80A0);
+                gphy_val = rtl8168_mdio_read(tp, 0x14) & 0x00FF;
+                gphy_val |= 0x1000;
+                rtl8168_mdio_write(tp, 0x14, gphy_val);
+                rtl8168_mdio_write(tp, 0x13, 0x8088);
+                rtl8168_mdio_write(tp, 0x14, 0x9222);
+
+                if (aspm) {
+                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_2);
+                        }
+                }
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        } else if (tp->mcfg == CFG_METHOD_22) {
+                //do nothing
+        } else if (tp->mcfg == CFG_METHOD_23) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
+                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | (BIT_3 | BIT_2));
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0BCC);
+                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
+                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_7);
+                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_6);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8084);
+                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) & ~(BIT_14 | BIT_13));
+                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_12);
+                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_1);
+                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_0);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A4B);
+                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_2);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8012);
+                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) | BIT_15);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0C42);
+                ClearAndSetEthPhyBit(tp,
+                                     0x11,
+                                     BIT_13,
+                                     BIT_14
+                                    );
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                if (aspm) {
+                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_2);
+                        }
+                }
+        } else if (tp->mcfg == CFG_METHOD_24) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0BCC);
+                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
+                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_7);
+                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_6);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8084);
+                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) & ~(BIT_14 | BIT_13));
+                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_12);
+                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_1);
+                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_0);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8012);
+                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) | BIT_15);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0C42);
+                gphy_val = rtl8168_mdio_read(tp, 0x11);
+                gphy_val |= BIT_14;
+                gphy_val &= ~BIT_13;
+                rtl8168_mdio_write(tp, 0x11, gphy_val);
+
+                if (aspm) {
+                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_2);
+                        }
+                }
+        } else if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0BCC);
+                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
+                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_7);
+                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_6);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8084);
+                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) & ~(BIT_14 | BIT_13));
+                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_12);
+                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_1);
+                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_0);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8012);
+                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) | BIT_15);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0BCE);
+                rtl8168_mdio_write(tp, 0x12, 0x8860);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x80F3);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x8B00);
+                rtl8168_mdio_write(tp, 0x13, 0x80F0);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x3A00);
+                rtl8168_mdio_write(tp, 0x13, 0x80EF);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x0500);
+                rtl8168_mdio_write(tp, 0x13, 0x80F6);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x6E00);
+                rtl8168_mdio_write(tp, 0x13, 0x80EC);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x6800);
+                rtl8168_mdio_write(tp, 0x13, 0x80ED);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x7C00);
+                rtl8168_mdio_write(tp, 0x13, 0x80F2);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0xF400);
+                rtl8168_mdio_write(tp, 0x13, 0x80F4);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x8500);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8110);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0xA800);
+                rtl8168_mdio_write(tp, 0x13, 0x810F);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x1D00);
+                rtl8168_mdio_write(tp, 0x13, 0x8111);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0xF500);
+                rtl8168_mdio_write(tp, 0x13, 0x8113);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x6100);
+                rtl8168_mdio_write(tp, 0x13, 0x8115);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x9200);
+                rtl8168_mdio_write(tp, 0x13, 0x810E);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x0400);
+                rtl8168_mdio_write(tp, 0x13, 0x810C);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x7C00);
+                rtl8168_mdio_write(tp, 0x13, 0x810B);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x5A00);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x80D1);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0xFF00);
+                rtl8168_mdio_write(tp, 0x13, 0x80CD);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x9E00);
+                rtl8168_mdio_write(tp, 0x13, 0x80D3);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x0E00);
+                rtl8168_mdio_write(tp, 0x13, 0x80D5);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0xCA00);
+                rtl8168_mdio_write(tp, 0x13, 0x80D7);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x8400);
+
+                if (aspm) {
+                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_2);
+                        }
+                }
+        } else if (tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0BCC);
+                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) & ~BIT_8);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
+                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_7);
+                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_6);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8084);
+                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) & ~(BIT_14 | BIT_13));
+                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_12);
+                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_1);
+                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_0);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8012);
+                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) | BIT_15);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0C42);
+                rtl8168_mdio_write(tp, 0x11, (rtl8168_mdio_read(tp, 0x11) & ~BIT_13) | BIT_14);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x80F3);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x8B00);
+                rtl8168_mdio_write(tp, 0x13, 0x80F0);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x3A00);
+                rtl8168_mdio_write(tp, 0x13, 0x80EF);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x0500);
+                rtl8168_mdio_write(tp, 0x13, 0x80F6);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x6E00);
+                rtl8168_mdio_write(tp, 0x13, 0x80EC);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x6800);
+                rtl8168_mdio_write(tp, 0x13, 0x80ED);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x7C00);
+                rtl8168_mdio_write(tp, 0x13, 0x80F2);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0xF400);
+                rtl8168_mdio_write(tp, 0x13, 0x80F4);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x8500);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8110);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0xA800);
+                rtl8168_mdio_write(tp, 0x13, 0x810F);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x1D00);
+                rtl8168_mdio_write(tp, 0x13, 0x8111);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0xF500);
+                rtl8168_mdio_write(tp, 0x13, 0x8113);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x6100);
+                rtl8168_mdio_write(tp, 0x13, 0x8115);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x9200);
+                rtl8168_mdio_write(tp, 0x13, 0x810E);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x0400);
+                rtl8168_mdio_write(tp, 0x13, 0x810C);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x7C00);
+                rtl8168_mdio_write(tp, 0x13, 0x810B);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x5A00);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x80D1);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0xFF00);
+                rtl8168_mdio_write(tp, 0x13, 0x80CD);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x9E00);
+                rtl8168_mdio_write(tp, 0x13, 0x80D3);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x0E00);
+                rtl8168_mdio_write(tp, 0x13, 0x80D5);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0xCA00);
+                rtl8168_mdio_write(tp, 0x13, 0x80D7);
+                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x8400);
+
+                if (aspm) {
+                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_2);
+                        }
+                }
+        } else if (tp->mcfg == CFG_METHOD_29) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x809b);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xF800 ,
+                                      0x8000
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x80A2);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xFF00 ,
+                                      0x8000
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x80A4);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xFF00 ,
+                                      0x8500
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x809C);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xFF00 ,
+                                      0xbd00
+                                    );
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x80AD);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xF800 ,
+                                      0x7000
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x80B4);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xFF00 ,
+                                      0x5000
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x80AC);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xFF00 ,
+                                      0x4000
+                                    );
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x808E);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xFF00 ,
+                                      0x1200
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x8090);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xFF00 ,
+                                      0xE500
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x8092);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xFF00 ,
+                                      0x9F00
+                                    );
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                        u16 dout_tapbin;
+
+                        dout_tapbin = 0x0000;
+                        rtl8168_mdio_write( tp, 0x1F, 0x0A46 );
+                        gphy_val = rtl8168_mdio_read( tp, 0x13 );
+                        gphy_val &= (BIT_1|BIT_0);
+                        gphy_val <<= 2;
+                        dout_tapbin |= gphy_val;
+
+                        gphy_val = rtl8168_mdio_read( tp, 0x12 );
+                        gphy_val &= (BIT_15|BIT_14);
+                        gphy_val >>= 14;
+                        dout_tapbin |= gphy_val;
+
+                        dout_tapbin = ~( dout_tapbin^BIT_3 );
+                        dout_tapbin <<= 12;
+                        dout_tapbin &= 0xF000;
+
+                        rtl8168_mdio_write( tp, 0x1F, 0x0A43 );
+
+                        rtl8168_mdio_write( tp, 0x13, 0x827A );
+                        ClearAndSetEthPhyBit( tp,
+                                              0x14,
+                                              BIT_15|BIT_14|BIT_13|BIT_12,
+                                              dout_tapbin
+                                            );
+
+
+                        rtl8168_mdio_write( tp, 0x13, 0x827B );
+                        ClearAndSetEthPhyBit( tp,
+                                              0x14,
+                                              BIT_15|BIT_14|BIT_13|BIT_12,
+                                              dout_tapbin
+                                            );
+
+
+                        rtl8168_mdio_write( tp, 0x13, 0x827C );
+                        ClearAndSetEthPhyBit( tp,
+                                              0x14,
+                                              BIT_15|BIT_14|BIT_13|BIT_12,
+                                              dout_tapbin
+                                            );
+
+
+                        rtl8168_mdio_write( tp, 0x13, 0x827D );
+                        ClearAndSetEthPhyBit( tp,
+                                              0x14,
+                                              BIT_15|BIT_14|BIT_13|BIT_12,
+                                              dout_tapbin
+                                            );
+
+                        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                        rtl8168_mdio_write(tp, 0x13, 0x8011);
+                        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_11);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0A42);
+                        rtl8168_set_eth_phy_bit(tp, 0x16, BIT_1);
+                }
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
+                rtl8168_set_eth_phy_bit( tp, 0x11, BIT_11 );
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0BCA);
+                ClearAndSetEthPhyBit( tp,
+                                      0x17,
+                                      (BIT_13 | BIT_12) ,
+                                      BIT_14
+                                    );
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x803F);
+                rtl8168_clear_eth_phy_bit( tp, 0x14, (BIT_13 | BIT_12));
+                rtl8168_mdio_write(tp, 0x13, 0x8047);
+                rtl8168_clear_eth_phy_bit( tp, 0x14, (BIT_13 | BIT_12));
+                rtl8168_mdio_write(tp, 0x13, 0x804F);
+                rtl8168_clear_eth_phy_bit( tp, 0x14, (BIT_13 | BIT_12));
+                rtl8168_mdio_write(tp, 0x13, 0x8057);
+                rtl8168_clear_eth_phy_bit( tp, 0x14, (BIT_13 | BIT_12));
+                rtl8168_mdio_write(tp, 0x13, 0x805F);
+                rtl8168_clear_eth_phy_bit( tp, 0x14, (BIT_13 | BIT_12));
+                rtl8168_mdio_write(tp, 0x13, 0x8067 );
+                rtl8168_clear_eth_phy_bit( tp, 0x14, (BIT_13 | BIT_12));
+                rtl8168_mdio_write(tp, 0x13, 0x806F );
+                rtl8168_clear_eth_phy_bit( tp, 0x14, (BIT_13 | BIT_12));
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                if (aspm) {
+                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                                rtl8168_set_eth_phy_bit( tp, 0x10, BIT_2 );
+                                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                        }
+                }
+        } else if (tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_37) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x808A);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0,
+                                      0x0A );
+
+                if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                        rtl8168_mdio_write(tp, 0x13, 0x8011);
+                        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_11);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0A42);
+                        rtl8168_set_eth_phy_bit(tp, 0x16, BIT_1);
+                }
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
+                rtl8168_set_eth_phy_bit( tp, 0x11, BIT_11 );
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                if (tp->RequireAdcBiasPatch) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0BCF);
+                        rtl8168_mdio_write(tp, 0x16, tp->AdcBiasPatchIoffset);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                }
+
+                {
+                        u16 rlen;
+
+                        rtl8168_mdio_write(tp, 0x1F, 0x0BCD);
+                        gphy_val = rtl8168_mdio_read( tp, 0x16 );
+                        gphy_val &= 0x000F;
+
+                        if ( gphy_val > 3 ) {
+                                rlen = gphy_val - 3;
+                        } else {
+                                rlen = 0;
+                        }
+
+                        gphy_val = rlen | (rlen<<4) | (rlen<<8) | (rlen<<12);
+
+                        rtl8168_mdio_write(tp, 0x1F, 0x0BCD);
+                        rtl8168_mdio_write(tp, 0x17, gphy_val);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                }
+
+                if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                        rtl8168_mdio_write(tp, 0x13, 0x85FE);
+                        ClearAndSetEthPhyBit(
+                                tp,
+                                0x14,
+                                BIT_15|BIT_14|BIT_13|BIT_12|BIT_11|BIT_10|BIT_8,
+                                BIT_9);
+                        rtl8168_mdio_write(tp, 0x13, 0x85FF);
+                        ClearAndSetEthPhyBit(
+                                tp,
+                                0x14,
+                                BIT_15|BIT_14|BIT_13|BIT_12,
+                                BIT_11|BIT_10|BIT_9|BIT_8);
+                        rtl8168_mdio_write(tp, 0x13, 0x814B);
+                        ClearAndSetEthPhyBit(
+                                tp,
+                                0x14,
+                                BIT_15|BIT_14|BIT_13|BIT_11|BIT_10|BIT_9|BIT_8,
+                                BIT_12);
+                }
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0C41);
+                rtl8168_clear_eth_phy_bit(tp, 0x15, BIT_1);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_set_eth_phy_bit(tp, 0x10, BIT_0);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+
+                if (aspm) {
+                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                                rtl8168_set_eth_phy_bit( tp, 0x10, BIT_2 );
+                                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                        }
+                }
+        } else if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+                   tp->mcfg == CFG_METHOD_33 ||  tp->mcfg == CFG_METHOD_34) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x808E);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xFF00 ,
+                                      0x4800
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x8090);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xFF00 ,
+                                      0xCC00
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x8092);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xFF00 ,
+                                      0xB000
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x8088);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xFF00 ,
+                                      0x6000
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x808B);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0x3F00 ,
+                                      0x0B00
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x808D);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0x1F00 ,
+                                      0x0600
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x808C);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xFF00 ,
+                                      0xB000
+                                    );
+
+                rtl8168_mdio_write(tp, 0x13, 0x80A0);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xFF00 ,
+                                      0x2800
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x80A2);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xFF00 ,
+                                      0x5000
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x809B);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xF800 ,
+                                      0xB000
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x809A);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xFF00 ,
+                                      0x4B00
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x809D);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0x3F00 ,
+                                      0x0800
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x80A1);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xFF00 ,
+                                      0x7000
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x809F);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0x1F00 ,
+                                      0x0300
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x809E);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xFF00 ,
+                                      0x8800
+                                    );
+
+                rtl8168_mdio_write(tp, 0x13, 0x80B2);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xFF00 ,
+                                      0x2200
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x80AD);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xF800 ,
+                                      0x9800
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x80AF);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0x3F00 ,
+                                      0x0800
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x80B3);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xFF00 ,
+                                      0x6F00
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x80B1);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0x1F00 ,
+                                      0x0300
+                                    );
+                rtl8168_mdio_write(tp, 0x13, 0x80B0);
+                ClearAndSetEthPhyBit( tp,
+                                      0x14,
+                                      0xFF00 ,
+                                      0x9300
+                                    );
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8011);
+                rtl8168_clear_eth_phy_bit(tp, 0x14, BIT_11);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
+                rtl8168_set_eth_phy_bit(tp, 0x11, BIT_11);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8016);
+                rtl8168_set_eth_phy_bit(tp, 0x14, BIT_10);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                if (aspm) {
+                        if (!HW_SUPP_SERDES_PHY(tp) &&
+                            HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                                rtl8168_set_eth_phy_bit( tp, 0x10, BIT_2 );
+                                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                        }
+                }
+        } else if (tp->mcfg == CFG_METHOD_35) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
+                rtl8168_set_eth_phy_bit(tp, 0x11, BIT_11);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A4C);
+                rtl8168_clear_eth_phy_bit(tp, 0x15, (BIT_14 | BIT_13));
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x81B9);
+                rtl8168_mdio_write(tp, 0x14, 0x2000);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x81D4);
+                ClearAndSetEthPhyBit(tp,
+                                     0x14,
+                                     0xFF00,
+                                     0x6600);
+                rtl8168_mdio_write(tp, 0x13, 0x81CB);
+                ClearAndSetEthPhyBit(tp,
+                                     0x14,
+                                     0xFF00,
+                                     0x3500);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A80);
+                ClearAndSetEthPhyBit(tp,
+                                     0x16,
+                                     0x000F,
+                                     0x0005);
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8016);
+                rtl8168_set_eth_phy_bit(tp, 0x14, BIT_13);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x811E);
+                rtl8168_mdio_write(tp, 0x14, 0xDECA);
+
+                rtl8168_mdio_write(tp, 0x13, 0x811C);
+                rtl8168_mdio_write(tp, 0x14, 0x8008);
+                rtl8168_mdio_write(tp, 0x13, 0x8118);
+                rtl8168_mdio_write(tp, 0x14, 0xF8B4);
+                rtl8168_mdio_write(tp, 0x13, 0x811A);
+                rtl8168_mdio_write(tp, 0x14, 0x1A04);
+
+                rtl8168_mdio_write(tp, 0x13, 0x8134);
+                rtl8168_mdio_write(tp, 0x14, 0xDECA);
+                rtl8168_mdio_write(tp, 0x13, 0x8132);
+                rtl8168_mdio_write(tp, 0x14, 0xA008);
+                rtl8168_mdio_write(tp, 0x13, 0x812E);
+                rtl8168_mdio_write(tp, 0x14, 0x00B5);
+                rtl8168_mdio_write(tp, 0x13, 0x8130);
+                rtl8168_mdio_write(tp, 0x14, 0x1A04);
+
+                rtl8168_mdio_write(tp, 0x13, 0x8112);
+                ClearAndSetEthPhyBit(tp,
+                                     0x14,
+                                     0xFF00,
+                                     0x7300);
+                rtl8168_mdio_write(tp, 0x13, 0x8106);
+                rtl8168_mdio_write(tp, 0x14, 0xA209);
+                rtl8168_mdio_write(tp, 0x13, 0x8108);
+                rtl8168_mdio_write(tp, 0x14, 0x13B0);
+                rtl8168_mdio_write(tp, 0x13, 0x8103);
+                ClearAndSetEthPhyBit(tp,
+                                     0x14,
+                                     0xF800,
+                                     0xB800);
+                rtl8168_mdio_write(tp, 0x13, 0x8105);
+                ClearAndSetEthPhyBit(tp,
+                                     0x14,
+                                     0xFF00,
+                                     0x0A00);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x87EB);
+                rtl8168_mdio_write(tp, 0x14, 0x0018);
+                rtl8168_mdio_write(tp, 0x13, 0x87EB);
+                rtl8168_mdio_write(tp, 0x14, 0x0018);
+                rtl8168_mdio_write(tp, 0x13, 0x87ED);
+                rtl8168_mdio_write(tp, 0x14, 0x0733);
+                rtl8168_mdio_write(tp, 0x13, 0x87EF);
+                rtl8168_mdio_write(tp, 0x14, 0x08DC);
+                rtl8168_mdio_write(tp, 0x13, 0x87F1);
+                rtl8168_mdio_write(tp, 0x14, 0x08DF);
+                rtl8168_mdio_write(tp, 0x13, 0x87F3);
+                rtl8168_mdio_write(tp, 0x14, 0x0C79);
+                rtl8168_mdio_write(tp, 0x13, 0x87F5);
+                rtl8168_mdio_write(tp, 0x14, 0x0D93);
+                rtl8168_mdio_write(tp, 0x13, 0x87F9);
+                rtl8168_mdio_write(tp, 0x14, 0x0010);
+                rtl8168_mdio_write(tp, 0x13, 0x87FB);
+                rtl8168_mdio_write(tp, 0x14, 0x0800);
+                rtl8168_mdio_write(tp, 0x13, 0x8015);
+                ClearAndSetEthPhyBit(tp,
+                                     0x14,
+                                     0x7000,
+                                     0x7000);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                rtl8168_mdio_write(tp, 0x13, 0x8111);
+                ClearAndSetEthPhyBit(tp,
+                                     0x14,
+                                     0xFF00,
+                                     0x7C00);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                if (aspm) {
+                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                                rtl8168_set_eth_phy_bit( tp, 0x10, BIT_2 );
+                                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                        }
+                }
+        } else if (tp->mcfg == CFG_METHOD_36) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
+                rtl8168_set_eth_phy_bit(tp, 0x11, BIT_11);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0C41);
+                rtl8168_clear_eth_phy_bit(tp, 0x15, BIT_1);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+
+                if (aspm) {
+                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
+                                rtl8168_set_eth_phy_bit( tp, 0x10, BIT_2 );
+                                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                        }
+                }
+        }
+
+#ifdef ENABLE_FIBER_SUPPORT
+        if (HW_FIBER_MODE_ENABLED(tp))
+                rtl8168_hw_fiber_phy_config(tp);
+#endif //ENABLE_FIBER_SUPPORT
+
+        //EthPhyPPSW
+        if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
+            tp->mcfg == CFG_METHOD_24 || tp->mcfg == CFG_METHOD_25 ||
+            tp->mcfg == CFG_METHOD_26) {
+                //disable EthPhyPPSW
+                rtl8168_mdio_write(tp, 0x1F, 0x0BCD);
+                rtl8168_mdio_write(tp, 0x14, 0x5065);
+                rtl8168_mdio_write(tp, 0x14, 0xD065);
+                rtl8168_mdio_write(tp, 0x1F, 0x0BC8);
+                rtl8168_mdio_write(tp, 0x11, 0x5655);
+                rtl8168_mdio_write(tp, 0x1F, 0x0BCD);
+                rtl8168_mdio_write(tp, 0x14, 0x1065);
+                rtl8168_mdio_write(tp, 0x14, 0x9065);
+                rtl8168_mdio_write(tp, 0x14, 0x1065);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+                   tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+                   tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+                   tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36) {
+                //enable EthPhyPPSW
+                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
+                rtl8168_set_eth_phy_bit( tp, 0x11, BIT_7 );
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        }
+
+        /*ocp phy power saving*/
+        if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
+            tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
+            tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
+            tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
+            tp->mcfg == CFG_METHOD_37) {
+                if (aspm)
+                        rtl8168_enable_ocp_phy_power_saving(dev);
+        }
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
+                if (tp->eee.eee_enabled)
+                        rtl8168_enable_eee(tp);
+                else
+                        rtl8168_disable_eee(tp);
+        }
+}
+
+/*
+static inline void rtl8168_delete_esd_timer(struct net_device *dev, struct timer_list *timer)
+{
+        del_timer_sync(timer);
+}
+
+static inline void rtl8168_request_esd_timer(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        struct timer_list *timer = &tp->esd_timer;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
+        setup_timer(timer, rtl8168_esd_timer, (unsigned long)dev);
+#else
+        timer_setup(timer, rtl8168_esd_timer, 0);
+#endif
+        mod_timer(timer, jiffies + RTL8168_ESD_TIMEOUT);
+}
+
+static inline void rtl8168_delete_link_timer(struct net_device *dev, struct timer_list *timer)
+{
+        del_timer_sync(timer);
+}
+
+static inline void rtl8168_request_link_timer(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        struct timer_list *timer = &tp->link_timer;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
+        setup_timer(timer, rtl8168_link_timer, (unsigned long)dev);
+#else
+        timer_setup(timer, rtl8168_link_timer, 0);
+#endif
+        mod_timer(timer, jiffies + RTL8168_LINK_TIMEOUT);
+}
+*/
+
+#ifdef CONFIG_NET_POLL_CONTROLLER
+/*
+ * Polling 'interrupt' - used by things like netconsole to send skbs
+ * without having to re-enable interrupts. It's not called while
+ * the interrupt routine is executing.
+ */
+static void
+rtl8168_netpoll(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int i;
+        for (i = 0; i < tp->irq_nvecs; i++) {
+                struct r8168_irq *irq = &tp->irq_tbl[i];
+                struct r8168_napi *r8168napi = &tp->r8168napi[i];
+
+                disable_irq(irq->vector);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0)
+                irq->handler(irq->vector, r8168napi);
+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+                irq->handler(irq->vector, r8168napi, NULL);
+#else
+                irq->handler(irq->vector, r8168napi);
+#endif
+                enable_irq(irq->vector);
+        }
+}
+
+#endif //CONFIG_NET_POLL_CONTROLLER
+
+static void
+rtl8168_get_bios_setting(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_9:
+        case CFG_METHOD_10:
+        case CFG_METHOD_11:
+        case CFG_METHOD_12:
+        case CFG_METHOD_13:
+        case CFG_METHOD_14:
+        case CFG_METHOD_15:
+        case CFG_METHOD_16:
+        case CFG_METHOD_17:
+        case CFG_METHOD_18:
+        case CFG_METHOD_19:
+        case CFG_METHOD_20:
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                tp->bios_setting = RTL_R32(tp, 0x8c);
+                break;
+        }
+}
+
+static void
+rtl8168_set_bios_setting(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_9:
+        case CFG_METHOD_10:
+        case CFG_METHOD_11:
+        case CFG_METHOD_12:
+        case CFG_METHOD_13:
+        case CFG_METHOD_14:
+        case CFG_METHOD_15:
+        case CFG_METHOD_16:
+        case CFG_METHOD_17:
+        case CFG_METHOD_18:
+        case CFG_METHOD_19:
+        case CFG_METHOD_20:
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                RTL_W32(tp, 0x8C, tp->bios_setting);
+                break;
+        }
+}
+
+static void
+rtl8168_setup_mqs_reg(struct rtl8168_private *tp)
+{
+        //tx
+        tp->tx_ring[0].tdsar_reg = TxDescStartAddrLow;
+        tp->tx_ring[1].tdsar_reg = TxHDescStartAddrLow;
+
+        tp->isr_reg[0] = IntrStatus;
+        tp->isr_reg[1] = IntrStatus1;
+        tp->isr_reg[2] = IntrStatus2;
+        tp->isr_reg[3] = IntrStatus3;
+
+        tp->imr_reg[0] = IntrMask;
+        tp->imr_reg[1] = IntrMask1;
+        tp->imr_reg[2] = IntrMask2;
+        tp->imr_reg[3] = IntrMask3;
+}
+
+static void
+rtl8168_init_software_variable(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        struct pci_dev *pdev = tp->pci_dev;
+
+        rtl8168_get_bios_setting(dev);
+
+#ifdef ENABLE_LIB_SUPPORT
+        tp->ring_lib_enabled = 1;
+#endif
+
+        if (tp->mcfg == CFG_METHOD_DEFAULT)
+                disable_wol_support = 1;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_11:
+        case CFG_METHOD_12:
+        case CFG_METHOD_13:
+                tp->HwSuppDashVer = 1;
+                break;
+        case CFG_METHOD_23:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+                tp->HwSuppDashVer = 2;
+                break;
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+                tp->HwSuppDashVer = 3;
+                break;
+        default:
+                tp->HwSuppDashVer = 0;
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+                tp->HwPkgDet = rtl8168_mac_ocp_read(tp, 0xDC00);
+                tp->HwPkgDet = (tp->HwPkgDet >> 3) & 0x0F;
+                break;
+        }
+
+        if (HW_SUPP_SERDES_PHY(tp))
+                eee_enable = 0;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                tp->HwSuppNowIsOobVer = 1;
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                tp->HwSuppPhyOcpVer = 1;
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+                tp->HwSuppUpsVer = 1;
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+                tp->HwPcieSNOffset = 0x16C;
+                break;
+        case CFG_METHOD_DEFAULT:
+                tp->HwPcieSNOffset = 0;
+                break;
+        default:
+                tp->HwPcieSNOffset = 0x164;
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_14:
+        case CFG_METHOD_15:
+        case CFG_METHOD_16:
+        case CFG_METHOD_17:
+        case CFG_METHOD_18:
+        case CFG_METHOD_19:
+        case CFG_METHOD_20:
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                tp->HwSuppAspmClkIntrLock = 1;
+                break;
+        }
+
+        if (!aspm || !tp->HwSuppAspmClkIntrLock)
+                dynamic_aspm = 0;
+
+#ifdef ENABLE_REALWOW_SUPPORT
+        rtl8168_get_realwow_hw_version(dev);
+#endif //ENABLE_REALWOW_SUPPORT
+
+        if (HW_DASH_SUPPORT_DASH(tp) && rtl8168_check_dash(tp))
+                tp->DASH = 1;
+        else
+                tp->DASH = 0;
+
+        if (tp->DASH) {
+                if (HW_DASH_SUPPORT_TYPE_3(tp)) {
+                        u64 CmacMemPhysAddress;
+                        void __iomem *cmac_ioaddr = NULL;
+                        struct pci_dev *pdev_cmac;
+                        int ret;
+
+                        pdev_cmac = pci_get_slot(pdev->bus, PCI_DEVFN(PCI_SLOT(pdev->devfn), 0));
+                        ret = pci_enable_device(pdev_cmac);
+                        if (ret < 0) {
+                                dev_err(&pdev_cmac->dev, "eable device fail %d\n", ret);
+                                goto err1;
+                        }
+
+                        ret = pci_request_regions(pdev_cmac, MODULENAME);
+                        if (ret < 0) {
+                                dev_err(&pdev_cmac->dev, "could not request regions %d\n", ret);
+                                goto err2;
+                        }
+
+                        //map CMAC IO space
+                        CmacMemPhysAddress = pci_resource_start(pdev_cmac, 2);
+
+                        /* ioremap MMIO region */
+                        cmac_ioaddr = ioremap(CmacMemPhysAddress, R8168_REGS_SIZE);
+
+                        if (cmac_ioaddr == NULL) {
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+                                if (netif_msg_probe(tp))
+                                        dev_err(&pdev->dev, "cannot remap CMAC MMIO, aborting\n");
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+                                pci_release_regions(pdev_cmac);
+err2:
+                                pci_disable_device(pdev_cmac);
+err1:
+                                tp->DASH = 0;
+                        } else {
+                                pci_set_master(pdev_cmac);
+                                tp->cmac_ioaddr = cmac_ioaddr;
+                                tp->pdev_cmac = pdev_cmac;
+                        }
+                }
+
+                eee_enable = 0;
+        }
+
+#ifdef ENABLE_DASH_SUPPORT
+#ifdef ENABLE_DASH_PRINTER_SUPPORT
+        if (tp->DASH) {
+                if (HW_DASH_SUPPORT_TYPE_3(tp) && tp->HwPkgDet == 0x0F)
+                        tp->dash_printer_enabled = 1;
+                else if (HW_DASH_SUPPORT_TYPE_2(tp))
+                        tp->dash_printer_enabled = 1;
+        }
+#endif //ENABLE_DASH_PRINTER_SUPPORT
+#endif //ENABLE_DASH_SUPPORT
+
+        if (HW_DASH_SUPPORT_TYPE_2(tp))
+                tp->cmac_ioaddr = tp->mmio_addr;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_1:
+                tp->intr_mask = RxDescUnavail | RxFIFOOver | TxDescUnavail | TxOK | RxOK | SWInt;
+                tp->timer_intr_mask = PCSTimeout | RxFIFOOver;
+                break;
+        case CFG_METHOD_2:
+        case CFG_METHOD_3:
+        case CFG_METHOD_4:
+                tp->intr_mask = RxDescUnavail | TxDescUnavail | TxOK | RxOK | SWInt;
+                tp->timer_intr_mask = PCSTimeout;
+                break;
+        default:
+                tp->intr_mask = RxDescUnavail | TxOK | RxOK | SWInt;
+                tp->timer_intr_mask = PCSTimeout;
+                break;
+        }
+
+#ifdef ENABLE_DASH_SUPPORT
+        if (tp->DASH) {
+                if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
+                        tp->timer_intr_mask |= ( ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET);
+                        tp->intr_mask |= ( ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET);
+                } else {
+                        tp->timer_intr_mask |= ( ISRIMR_DP_DASH_OK | ISRIMR_DP_HOST_OK | ISRIMR_DP_REQSYS_OK );
+                        tp->intr_mask |= ( ISRIMR_DP_DASH_OK | ISRIMR_DP_HOST_OK | ISRIMR_DP_REQSYS_OK );
+                }
+        }
+#endif
+        if (aspm) {
+                switch (tp->mcfg) {
+                case CFG_METHOD_21:
+                case CFG_METHOD_22:
+                case CFG_METHOD_23:
+                case CFG_METHOD_24:
+                case CFG_METHOD_25:
+                case CFG_METHOD_26:
+                case CFG_METHOD_27:
+                case CFG_METHOD_28:
+                case CFG_METHOD_29:
+                case CFG_METHOD_30:
+                case CFG_METHOD_31:
+                case CFG_METHOD_32:
+                case CFG_METHOD_33:
+                case CFG_METHOD_34:
+                case CFG_METHOD_35:
+                case CFG_METHOD_36:
+                case CFG_METHOD_37:
+                        tp->org_pci_offset_99 = rtl8168_csi_fun0_read_byte(tp, 0x99);
+                        tp->org_pci_offset_99 &= ~(BIT_5|BIT_6);
+                        break;
+                }
+                switch (tp->mcfg) {
+                case CFG_METHOD_24:
+                case CFG_METHOD_25:
+                case CFG_METHOD_26:
+                case CFG_METHOD_27:
+                case CFG_METHOD_28:
+                case CFG_METHOD_29:
+                case CFG_METHOD_30:
+                case CFG_METHOD_35:
+                case CFG_METHOD_36:
+                case CFG_METHOD_37:
+                        tp->org_pci_offset_180 = rtl8168_csi_fun0_read_byte(tp, 0x180);
+                        break;
+                case CFG_METHOD_31:
+                case CFG_METHOD_32:
+                case CFG_METHOD_33:
+                case CFG_METHOD_34:
+                        tp->org_pci_offset_180 = rtl8168_csi_fun0_read_byte(tp, 0x214);
+                        break;
+                }
+
+                switch (tp->mcfg) {
+                case CFG_METHOD_21:
+                case CFG_METHOD_22:
+                case CFG_METHOD_23:
+                case CFG_METHOD_24:
+                case CFG_METHOD_25:
+                case CFG_METHOD_27:
+                case CFG_METHOD_28:
+                case CFG_METHOD_31:
+                case CFG_METHOD_32:
+                case CFG_METHOD_33:
+                case CFG_METHOD_34:
+                        if (tp->org_pci_offset_99 & BIT_2)
+                                tp->issue_offset_99_event = TRUE;
+                        break;
+                }
+        }
+
+        pci_read_config_byte(pdev, 0x80, &tp->org_pci_offset_80);
+        pci_read_config_byte(pdev, 0x81, &tp->org_pci_offset_81);
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_16:
+        case CFG_METHOD_17:
+        case CFG_METHOD_18:
+        case CFG_METHOD_19:
+        case CFG_METHOD_20:
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+                if ((tp->features & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX)) &&
+                    (tp->org_pci_offset_80 & BIT_1))
+                        tp->use_timer_interrrupt = FALSE;
+                else
+                        tp->use_timer_interrrupt = TRUE;
+                break;
+        default:
+                tp->use_timer_interrrupt = TRUE;
+                break;
+        }
+
+        if (timer_count == 0 || tp->mcfg == CFG_METHOD_DEFAULT ||
+            (tp->features & RTL_FEATURE_MSIX))
+                tp->use_timer_interrrupt = FALSE;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_1:
+        case CFG_METHOD_2:
+        case CFG_METHOD_3:
+                tp->ShortPacketSwChecksum = TRUE;
+                break;
+        case CFG_METHOD_16:
+        case CFG_METHOD_17:
+                tp->ShortPacketSwChecksum = TRUE;
+                tp->UseSwPaddingShortPkt = TRUE;
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_30:
+        case CFG_METHOD_37: {
+                u16 ioffset_p3, ioffset_p2, ioffset_p1, ioffset_p0;
+                u16 TmpUshort;
+
+                rtl8168_mac_ocp_write( tp, 0xDD02, 0x807D);
+                TmpUshort = rtl8168_mac_ocp_read( tp, 0xDD02 );
+                ioffset_p3 = ( (TmpUshort & BIT_7) >>7 );
+                ioffset_p3 <<= 3;
+                TmpUshort = rtl8168_mac_ocp_read( tp, 0xDD00 );
+
+                ioffset_p3 |= ((TmpUshort & (BIT_15 | BIT_14 | BIT_13))>>13);
+
+                ioffset_p2 = ((TmpUshort & (BIT_12|BIT_11|BIT_10|BIT_9))>>9);
+                ioffset_p1 = ((TmpUshort & (BIT_8|BIT_7|BIT_6|BIT_5))>>5);
+
+                ioffset_p0 = ( (TmpUshort & BIT_4) >>4 );
+                ioffset_p0 <<= 3;
+                ioffset_p0 |= (TmpUshort & (BIT_2| BIT_1 | BIT_0));
+
+                if ((ioffset_p3 == 0x0F) && (ioffset_p2 == 0x0F) && (ioffset_p1 == 0x0F) && (ioffset_p0 == 0x0F)) {
+                        tp->RequireAdcBiasPatch = FALSE;
+                } else {
+                        tp->RequireAdcBiasPatch = TRUE;
+                        tp->AdcBiasPatchIoffset = (ioffset_p3<<12)|(ioffset_p2<<8)|(ioffset_p1<<4)|(ioffset_p0);
+                }
+        }
+        break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37: {
+                u16 rg_saw_cnt;
+
+                rtl8168_mdio_write(tp, 0x1F, 0x0C42);
+                rg_saw_cnt = rtl8168_mdio_read(tp, 0x13);
+                rg_saw_cnt &= ~(BIT_15|BIT_14);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                if (rg_saw_cnt > 0) {
+                        tp->SwrCnt1msIni = 16000000/rg_saw_cnt;
+                        tp->SwrCnt1msIni &= 0x0FFF;
+
+                        tp->RequireAdjustUpsTxLinkPulseTiming = TRUE;
+                }
+        }
+        break;
+        }
+
+#ifdef ENABLE_FIBER_SUPPORT
+        rtl8168_check_hw_fiber_mode_support(tp);
+#endif //ENABLE_FIBER_SUPPORT
+
+        switch(tp->mcfg) {
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+                if (tp->HwPkgDet == 0x06) {
+                        u8 tmpUchar = rtl8168_eri_read(tp, 0xE6, 1, ERIAR_ExGMAC);
+                        if (tmpUchar == 0x02)
+                                tp->HwSuppSerDesPhyVer = 1;
+                        else if (tmpUchar == 0x00)
+                                tp->HwSuppSerDesPhyVer = 2;
+                }
+                break;
+        }
+
+        if (pdev->subsystem_vendor == 0x144d) {
+                if (pdev->subsystem_device == 0xc098 ||
+                    pdev->subsystem_device == 0xc0b1 ||
+                    pdev->subsystem_device == 0xc0b8)
+                        hwoptimize |= HW_PATCH_SAMSUNG_LAN_DONGLE;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_18:
+        case CFG_METHOD_19:
+                if (pdev->subsystem_vendor == 0x13fe) {
+                        if (pdev->subsystem_device == 0x00ec)
+                                hwoptimize |= HW_PATCH_SAMSUNG_LAN_DONGLE;
+                }
+                break;
+        }
+
+#ifdef CONFIG_CTAP_SHORT_OFF
+        hwoptimize |= HW_PATCH_SAMSUNG_LAN_DONGLE;
+#endif //CONFIG_CTAP_SHORT_OFF
+
+        if (hwoptimize & HW_PATCH_SAMSUNG_LAN_DONGLE) {
+                switch (tp->mcfg) {
+                case CFG_METHOD_14:
+                case CFG_METHOD_15:
+                case CFG_METHOD_16:
+                case CFG_METHOD_17:
+                case CFG_METHOD_18:
+                case CFG_METHOD_19:
+                case CFG_METHOD_20:
+                case CFG_METHOD_30:
+                case CFG_METHOD_37:
+                        tp->RequiredSecLanDonglePatch = TRUE;
+                        break;
+                }
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_16:
+        case CFG_METHOD_17:
+        case CFG_METHOD_18:
+        case CFG_METHOD_19:
+        case CFG_METHOD_20:
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                tp->HwSuppMagicPktVer = WAKEUP_MAGIC_PACKET_V2;
+                break;
+        case CFG_METHOD_DEFAULT:
+                tp->HwSuppMagicPktVer = WAKEUP_MAGIC_PACKET_NOT_SUPPORT;
+                break;
+        default:
+                tp->HwSuppMagicPktVer = WAKEUP_MAGIC_PACKET_V1;
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+                tp->HwSuppEsdVer = 2;
+                break;
+        case CFG_METHOD_35:
+                tp->HwSuppEsdVer = 3;
+                break;
+        default:
+                tp->HwSuppEsdVer = 1;
+                break;
+        }
+
+        if (tp->HwSuppEsdVer == 2 ||
+            tp->HwSuppEsdVer == 3) {
+                rtl8168_mdio_write(tp, 0x1F, 0x0A46);
+                tp->BackupPhyFuseDout_15_0 = rtl8168_mdio_read(tp, 0x10);
+                tp->BackupPhyFuseDout_31_16 = rtl8168_mdio_read(tp, 0x11);
+                tp->BackupPhyFuseDout_47_32 = rtl8168_mdio_read(tp, 0x12);
+                tp->BackupPhyFuseDout_63_48 = rtl8168_mdio_read(tp, 0x13);
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+
+                tp->TestPhyOcpReg = TRUE;
+#ifdef ENABLE_USE_FIRMWARE_FILE
+                if (tp->HwSuppEsdVer == 3)
+                        tp->TestPhyOcpReg = FALSE;
+#endif
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_16:
+        case CFG_METHOD_17:
+                tp->HwSuppCheckPhyDisableModeVer = 1;
+                break;
+        case CFG_METHOD_18:
+        case CFG_METHOD_19:
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                tp->HwSuppCheckPhyDisableModeVer = 2;
+                break;
+        case CFG_METHOD_23:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+                tp->HwSuppCheckPhyDisableModeVer = 3;
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_14:
+        case CFG_METHOD_15:
+                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_14;
+                break;
+        case CFG_METHOD_16:
+        case CFG_METHOD_17:
+                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_16;
+                break;
+        case CFG_METHOD_18:
+        case CFG_METHOD_19:
+                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_18;
+                break;
+        case CFG_METHOD_20:
+                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_20;
+                break;
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_21;
+                break;
+        case CFG_METHOD_23:
+        case CFG_METHOD_27:
+                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_23;
+                break;
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_24;
+                break;
+        case CFG_METHOD_26:
+                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_26;
+                break;
+        case CFG_METHOD_28:
+                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_28;
+                break;
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_37:
+                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_29;
+                break;
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_31;
+                break;
+        case CFG_METHOD_35:
+                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_35;
+                break;
+        case CFG_METHOD_36:
+                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_36;
+                break;
+        }
+
+        if (tp->HwIcVerUnknown) {
+                tp->NotWrRamCodeToMicroP = TRUE;
+                tp->NotWrMcuPatchCode = TRUE;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_16 ... CFG_METHOD_37:
+                tp->HwSuppRxDescType = RX_DESC_RING_TYPE_2;
+                break;
+        default:
+                tp->HwSuppRxDescType = RX_DESC_RING_TYPE_1;
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                tp->HwSuppNumTxQueues = 2;
+                tp->HwSuppNumRxQueues = 4;
+                break;
+        default:
+                tp->HwSuppNumTxQueues = 1;
+                tp->HwSuppNumRxQueues = 1;
+                break;
+        }
+
+        tp->num_tx_rings = 1;
+#ifdef ENABLE_MULTIPLE_TX_QUEUE
+#ifndef ENABLE_LIB_SUPPORT
+        tp->num_tx_rings = tp->HwSuppNumTxQueues;
+#endif
+#endif
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                tp->HwSuppRssVer = 2;
+                tp->HwSuppIndirTblEntries = RTL8168_MAX_INDIRECTION_TABLE_ENTRIES;
+                break;
+        }
+
+        tp->num_rx_rings = 1;
+#ifdef ENABLE_RSS_SUPPORT
+        if (HW_RSS_SUPPORT_RSS(tp)) {
+#ifdef ENABLE_LIB_SUPPORT
+                tp->EnableRss = 1;
+#else
+                u8 rss_queue_num = netif_get_num_default_rss_queues();
+                tp->num_rx_rings = (tp->HwSuppNumRxQueues > rss_queue_num)?
+                                   rss_queue_num : tp->HwSuppNumRxQueues;
+                if (tp->num_rx_rings >= 2)
+                        tp->EnableRss = 1;
+#endif
+        }
+#endif
+        if (!tp->EnableRss || tp->num_rx_rings < 1)
+                tp->num_rx_rings = 1;
+
+#ifdef ENABLE_LIB_SUPPORT
+        tp->num_hw_tot_en_rx_rings = 2;
+#else
+        tp->num_hw_tot_en_rx_rings = tp->num_rx_rings;
+#endif //ENABLE_LIB_SUPPORT
+
+        rtl8168_setup_mqs_reg(tp);
+
+        rtl8168_set_ring_size(tp, NUM_RX_DESC, NUM_TX_DESC);
+
+        tp->InitRxDescType = RX_DESC_RING_TYPE_1;
+        if (tp->EnableRss)
+                tp->InitRxDescType = RX_DESC_RING_TYPE_2;
+
+        tp->RxDescLength = RX_DESC_LEN_TYPE_1;
+        if (tp->InitRxDescType == RX_DESC_RING_TYPE_2)
+                tp->RxDescLength = RX_DESC_LEN_TYPE_2;
+
+        tp->NicCustLedValue = RTL_R16(tp, CustomLED);
+
+        rtl8168_get_hw_wol(dev);
+
+        rtl8168_link_option((u8*)&autoneg_mode, (u32*)&speed_mode, (u8*)&duplex_mode, (u32*)&advertising_mode);
+
+        tp->autoneg = autoneg_mode;
+        tp->speed = speed_mode;
+        tp->duplex = duplex_mode;
+        tp->advertising = advertising_mode;
+        tp->fcpause = rtl8168_fc_full;
+
+        tp->max_jumbo_frame_size = rtl_chip_info[tp->chipset].jumbo_frame_sz;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0)
+        /* MTU range: 60 - hw-specific max */
+        dev->min_mtu = ETH_MIN_MTU;
+        dev->max_mtu = tp->max_jumbo_frame_size;
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0)
+
+        if (rtl8168_support_eee(tp)) {
+                struct ethtool_eee *eee = &tp->eee;
+
+                eee->eee_enabled = eee_enable;
+                eee->supported  = SUPPORTED_100baseT_Full |
+                                  SUPPORTED_1000baseT_Full;
+                eee->advertised = mmd_eee_adv_to_ethtool_adv_t(MDIO_EEE_1000T | MDIO_EEE_100TX);
+                eee->tx_lpi_enabled = eee_enable;
+                eee->tx_lpi_timer = dev->mtu + ETH_HLEN + 0x20;
+        }
+
+#ifdef ENABLE_FIBER_SUPPORT
+        if (HW_FIBER_MODE_ENABLED(tp))
+                rtl8168_set_fiber_mode_software_variable(tp);
+#endif //ENABLE_FIBER_SUPPORT
+
+#ifdef ENABLE_RSS_SUPPORT
+        if (tp->EnableRss)
+                rtl8168_init_rss(tp);
+#endif
+}
+
+static void
+rtl8168_release_board(struct pci_dev *pdev,
+                      struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        void __iomem *ioaddr = tp->mmio_addr;
+
+        rtl8168_set_bios_setting(dev);
+        rtl8168_rar_set(tp, tp->org_mac_addr);
+        tp->wol_enabled = WOL_DISABLED;
+
+        if (!tp->DASH)
+                rtl8168_phy_power_down(dev);
+
+#ifdef ENABLE_DASH_SUPPORT
+        if (tp->DASH)
+                FreeAllocatedDashShareMemory(dev);
+#endif
+
+        if (tp->pdev_cmac) {
+                iounmap(tp->cmac_ioaddr);
+                pci_clear_master(tp->pdev_cmac);
+                pci_release_regions(tp->pdev_cmac);
+                pci_disable_device(tp->pdev_cmac);
+                tp->pdev_cmac = NULL;
+        }
+
+        iounmap(ioaddr);
+        pci_release_regions(pdev);
+        pci_clear_mwi(pdev);
+        pci_disable_device(pdev);
+        free_netdev(dev);
+}
+
+static void
+rtl8168_hw_address_set(struct net_device *dev, u8 mac_addr[MAC_ADDR_LEN])
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+        eth_hw_addr_set(dev, mac_addr);
+#else
+        memcpy(dev->dev_addr, mac_addr, MAC_ADDR_LEN);
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
+}
+
+static int
+rtl8168_get_mac_address(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int i;
+        u8 mac_addr[MAC_ADDR_LEN];
+
+        for (i = 0; i < MAC_ADDR_LEN; i++)
+                mac_addr[i] = RTL_R8(tp, MAC0 + i);
+
+        if (tp->mcfg == CFG_METHOD_18 ||
+            tp->mcfg == CFG_METHOD_19 ||
+            tp->mcfg == CFG_METHOD_20 ||
+            tp->mcfg == CFG_METHOD_21 ||
+            tp->mcfg == CFG_METHOD_22 ||
+            tp->mcfg == CFG_METHOD_23 ||
+            tp->mcfg == CFG_METHOD_24 ||
+            tp->mcfg == CFG_METHOD_25 ||
+            tp->mcfg == CFG_METHOD_26 ||
+            tp->mcfg == CFG_METHOD_27 ||
+            tp->mcfg == CFG_METHOD_28 ||
+            tp->mcfg == CFG_METHOD_29 ||
+            tp->mcfg == CFG_METHOD_30 ||
+            tp->mcfg == CFG_METHOD_31 ||
+            tp->mcfg == CFG_METHOD_32 ||
+            tp->mcfg == CFG_METHOD_33 ||
+            tp->mcfg == CFG_METHOD_34 ||
+            tp->mcfg == CFG_METHOD_35 ||
+            tp->mcfg == CFG_METHOD_36 ||
+            tp->mcfg == CFG_METHOD_37) {
+                *(u32*)&mac_addr[0] = rtl8168_eri_read(tp, 0xE0, 4, ERIAR_ExGMAC);
+                *(u16*)&mac_addr[4] = rtl8168_eri_read(tp, 0xE4, 2, ERIAR_ExGMAC);
+        } else {
+                if (tp->eeprom_type != EEPROM_TYPE_NONE) {
+                        u16 *pUshort = (u16*)mac_addr;
+                        /* Get MAC address from EEPROM */
+                        if (tp->mcfg == CFG_METHOD_16 ||
+                            tp->mcfg == CFG_METHOD_17 ||
+                            tp->mcfg == CFG_METHOD_18 ||
+                            tp->mcfg == CFG_METHOD_19 ||
+                            tp->mcfg == CFG_METHOD_20 ||
+                            tp->mcfg == CFG_METHOD_21 ||
+                            tp->mcfg == CFG_METHOD_22 ||
+                            tp->mcfg == CFG_METHOD_23 ||
+                            tp->mcfg == CFG_METHOD_24 ||
+                            tp->mcfg == CFG_METHOD_25 ||
+                            tp->mcfg == CFG_METHOD_26 ||
+                            tp->mcfg == CFG_METHOD_27 ||
+                            tp->mcfg == CFG_METHOD_28 ||
+                            tp->mcfg == CFG_METHOD_29 ||
+                            tp->mcfg == CFG_METHOD_30 ||
+                            tp->mcfg == CFG_METHOD_31 ||
+                            tp->mcfg == CFG_METHOD_32 ||
+                            tp->mcfg == CFG_METHOD_33 ||
+                            tp->mcfg == CFG_METHOD_34 ||
+                            tp->mcfg == CFG_METHOD_35 ||
+                            tp->mcfg == CFG_METHOD_36 ||
+                            tp->mcfg == CFG_METHOD_37) {
+                                *pUshort++ = rtl8168_eeprom_read_sc(tp, 1);
+                                *pUshort++ = rtl8168_eeprom_read_sc(tp, 2);
+                                *pUshort = rtl8168_eeprom_read_sc(tp, 3);
+                        } else {
+                                *pUshort++ = rtl8168_eeprom_read_sc(tp, 7);
+                                *pUshort++ = rtl8168_eeprom_read_sc(tp, 8);
+                                *pUshort = rtl8168_eeprom_read_sc(tp, 9);
+                        }
+                }
+        }
+
+        if (!is_valid_ether_addr(mac_addr)) {
+                netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
+                          mac_addr);
+                eth_random_addr(mac_addr);
+                dev->addr_assign_type = NET_ADDR_RANDOM;
+                netif_info(tp, probe, dev, "Random ether addr %pM\n",
+                           mac_addr);
+                tp->random_mac = 1;
+        }
+
+        rtl8168_hw_address_set(dev, mac_addr);
+        rtl8168_rar_set(tp, mac_addr);
+
+        /* keep the original MAC address */
+        memcpy(tp->org_mac_addr, dev->dev_addr, MAC_ADDR_LEN);
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
+        memcpy(dev->perm_addr, dev->dev_addr, MAC_ADDR_LEN);
+#endif
+        return 0;
+}
+
+/**
+ * rtl8168_set_mac_address - Change the Ethernet Address of the NIC
+ * @dev: network interface device structure
+ * @p:   pointer to an address structure
+ *
+ * Return 0 on success, negative on failure
+ **/
+static int
+rtl8168_set_mac_address(struct net_device *dev,
+                        void *p)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        struct sockaddr *addr = p;
+
+        if (!is_valid_ether_addr(addr->sa_data))
+                return -EADDRNOTAVAIL;
+
+        rtl8168_hw_address_set(dev, addr->sa_data);
+
+        rtl8168_rar_set(tp, dev->dev_addr);
+
+        return 0;
+}
+
+/******************************************************************************
+ * rtl8168_rar_set - Puts an ethernet address into a receive address register.
+ *
+ * tp - The private data structure for driver
+ * addr - Address to put into receive address register
+ *****************************************************************************/
+void
+rtl8168_rar_set(struct rtl8168_private *tp,
+                const u8 *addr)
+{
+        uint32_t rar_low = 0;
+        uint32_t rar_high = 0;
+
+        rar_low = ((uint32_t) addr[0] |
+                   ((uint32_t) addr[1] << 8) |
+                   ((uint32_t) addr[2] << 16) |
+                   ((uint32_t) addr[3] << 24));
+
+        rar_high = ((uint32_t) addr[4] |
+                    ((uint32_t) addr[5] << 8));
+
+        rtl8168_enable_cfg9346_write(tp);
+        RTL_W32(tp, MAC0, rar_low);
+        RTL_W32(tp, MAC4, rar_high);
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_14:
+        case CFG_METHOD_15:
+                RTL_W32(tp, SecMAC0, rar_low);
+                RTL_W16(tp, SecMAC4, (uint16_t)rar_high);
+                break;
+        }
+
+        if (tp->mcfg == CFG_METHOD_17) {
+                rtl8168_eri_write(tp, 0xf0, 4, rar_low << 16, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xf4, 4, rar_low >> 16 | rar_high << 16, ERIAR_ExGMAC);
+        }
+
+        rtl8168_disable_cfg9346_write(tp);
+}
+
+#ifdef ETHTOOL_OPS_COMPAT
+static int ethtool_get_settings(struct net_device *dev, void *useraddr)
+{
+        struct ethtool_cmd cmd = { ETHTOOL_GSET };
+        int err;
+
+        if (!ethtool_ops->get_settings)
+                return -EOPNOTSUPP;
+
+        err = ethtool_ops->get_settings(dev, &cmd);
+        if (err < 0)
+                return err;
+
+        if (copy_to_user(useraddr, &cmd, sizeof(cmd)))
+                return -EFAULT;
+        return 0;
+}
+
+static int ethtool_set_settings(struct net_device *dev, void *useraddr)
+{
+        struct ethtool_cmd cmd;
+
+        if (!ethtool_ops->set_settings)
+                return -EOPNOTSUPP;
+
+        if (copy_from_user(&cmd, useraddr, sizeof(cmd)))
+                return -EFAULT;
+
+        return ethtool_ops->set_settings(dev, &cmd);
+}
+
+static int ethtool_get_drvinfo(struct net_device *dev, void *useraddr)
+{
+        struct ethtool_drvinfo info;
+        struct ethtool_ops *ops = ethtool_ops;
+
+        if (!ops->get_drvinfo)
+                return -EOPNOTSUPP;
+
+        memset(&info, 0, sizeof(info));
+        info.cmd = ETHTOOL_GDRVINFO;
+        ops->get_drvinfo(dev, &info);
+
+        if (ops->self_test_count)
+                info.testinfo_len = ops->self_test_count(dev);
+        if (ops->get_stats_count)
+                info.n_stats = ops->get_stats_count(dev);
+        if (ops->get_regs_len)
+                info.regdump_len = ops->get_regs_len(dev);
+        if (ops->get_eeprom_len)
+                info.eedump_len = ops->get_eeprom_len(dev);
+
+        if (copy_to_user(useraddr, &info, sizeof(info)))
+                return -EFAULT;
+        return 0;
+}
+
+static int ethtool_get_regs(struct net_device *dev, char *useraddr)
+{
+        struct ethtool_regs regs;
+        struct ethtool_ops *ops = ethtool_ops;
+        void *regbuf;
+        int reglen, ret;
+
+        if (!ops->get_regs || !ops->get_regs_len)
+                return -EOPNOTSUPP;
+
+        if (copy_from_user(&regs, useraddr, sizeof(regs)))
+                return -EFAULT;
+
+        reglen = ops->get_regs_len(dev);
+        if (regs.len > reglen)
+                regs.len = reglen;
+
+        regbuf = kmalloc(reglen, GFP_USER);
+        if (!regbuf)
+                return -ENOMEM;
+
+        ops->get_regs(dev, &regs, regbuf);
+
+        ret = -EFAULT;
+        if (copy_to_user(useraddr, &regs, sizeof(regs)))
+                goto out;
+        useraddr += offsetof(struct ethtool_regs, data);
+        if (copy_to_user(useraddr, regbuf, reglen))
+                goto out;
+        ret = 0;
+
+out:
+        kfree(regbuf);
+        return ret;
+}
+
+static int ethtool_get_wol(struct net_device *dev, char *useraddr)
+{
+        struct ethtool_wolinfo wol = { ETHTOOL_GWOL };
+
+        if (!ethtool_ops->get_wol)
+                return -EOPNOTSUPP;
+
+        ethtool_ops->get_wol(dev, &wol);
+
+        if (copy_to_user(useraddr, &wol, sizeof(wol)))
+                return -EFAULT;
+        return 0;
+}
+
+static int ethtool_set_wol(struct net_device *dev, char *useraddr)
+{
+        struct ethtool_wolinfo wol;
+
+        if (!ethtool_ops->set_wol)
+                return -EOPNOTSUPP;
+
+        if (copy_from_user(&wol, useraddr, sizeof(wol)))
+                return -EFAULT;
+
+        return ethtool_ops->set_wol(dev, &wol);
+}
+
+static int ethtool_get_msglevel(struct net_device *dev, char *useraddr)
+{
+        struct ethtool_value edata = { ETHTOOL_GMSGLVL };
+
+        if (!ethtool_ops->get_msglevel)
+                return -EOPNOTSUPP;
+
+        edata.data = ethtool_ops->get_msglevel(dev);
+
+        if (copy_to_user(useraddr, &edata, sizeof(edata)))
+                return -EFAULT;
+        return 0;
+}
+
+static int ethtool_set_msglevel(struct net_device *dev, char *useraddr)
+{
+        struct ethtool_value edata;
+
+        if (!ethtool_ops->set_msglevel)
+                return -EOPNOTSUPP;
+
+        if (copy_from_user(&edata, useraddr, sizeof(edata)))
+                return -EFAULT;
+
+        ethtool_ops->set_msglevel(dev, edata.data);
+        return 0;
+}
+
+static int ethtool_nway_reset(struct net_device *dev)
+{
+        if (!ethtool_ops->nway_reset)
+                return -EOPNOTSUPP;
+
+        return ethtool_ops->nway_reset(dev);
+}
+
+static int ethtool_get_link(struct net_device *dev, void *useraddr)
+{
+        struct ethtool_value edata = { ETHTOOL_GLINK };
+
+        if (!ethtool_ops->get_link)
+                return -EOPNOTSUPP;
+
+        edata.data = ethtool_ops->get_link(dev);
+
+        if (copy_to_user(useraddr, &edata, sizeof(edata)))
+                return -EFAULT;
+        return 0;
+}
+
+static int ethtool_get_eeprom(struct net_device *dev, void *useraddr)
+{
+        struct ethtool_eeprom eeprom;
+        struct ethtool_ops *ops = ethtool_ops;
+        u8 *data;
+        int ret;
+
+        if (!ops->get_eeprom || !ops->get_eeprom_len)
+                return -EOPNOTSUPP;
+
+        if (copy_from_user(&eeprom, useraddr, sizeof(eeprom)))
+                return -EFAULT;
+
+        /* Check for wrap and zero */
+        if (eeprom.offset + eeprom.len <= eeprom.offset)
+                return -EINVAL;
+
+        /* Check for exceeding total eeprom len */
+        if (eeprom.offset + eeprom.len > ops->get_eeprom_len(dev))
+                return -EINVAL;
+
+        data = kmalloc(eeprom.len, GFP_USER);
+        if (!data)
+                return -ENOMEM;
+
+        ret = -EFAULT;
+        if (copy_from_user(data, useraddr + sizeof(eeprom), eeprom.len))
+                goto out;
+
+        ret = ops->get_eeprom(dev, &eeprom, data);
+        if (ret)
+                goto out;
+
+        ret = -EFAULT;
+        if (copy_to_user(useraddr, &eeprom, sizeof(eeprom)))
+                goto out;
+        if (copy_to_user(useraddr + sizeof(eeprom), data, eeprom.len))
+                goto out;
+        ret = 0;
+
+out:
+        kfree(data);
+        return ret;
+}
+
+static int ethtool_set_eeprom(struct net_device *dev, void *useraddr)
+{
+        struct ethtool_eeprom eeprom;
+        struct ethtool_ops *ops = ethtool_ops;
+        u8 *data;
+        int ret;
+
+        if (!ops->set_eeprom || !ops->get_eeprom_len)
+                return -EOPNOTSUPP;
+
+        if (copy_from_user(&eeprom, useraddr, sizeof(eeprom)))
+                return -EFAULT;
+
+        /* Check for wrap and zero */
+        if (eeprom.offset + eeprom.len <= eeprom.offset)
+                return -EINVAL;
+
+        /* Check for exceeding total eeprom len */
+        if (eeprom.offset + eeprom.len > ops->get_eeprom_len(dev))
+                return -EINVAL;
+
+        data = kmalloc(eeprom.len, GFP_USER);
+        if (!data)
+                return -ENOMEM;
+
+        ret = -EFAULT;
+        if (copy_from_user(data, useraddr + sizeof(eeprom), eeprom.len))
+                goto out;
+
+        ret = ops->set_eeprom(dev, &eeprom, data);
+        if (ret)
+                goto out;
+
+        if (copy_to_user(useraddr + sizeof(eeprom), data, eeprom.len))
+                ret = -EFAULT;
+
+out:
+        kfree(data);
+        return ret;
+}
+
+static int ethtool_get_coalesce(struct net_device *dev, void *useraddr)
+{
+        struct ethtool_coalesce coalesce = { ETHTOOL_GCOALESCE };
+
+        if (!ethtool_ops->get_coalesce)
+                return -EOPNOTSUPP;
+
+        ethtool_ops->get_coalesce(dev, &coalesce);
+
+        if (copy_to_user(useraddr, &coalesce, sizeof(coalesce)))
+                return -EFAULT;
+        return 0;
+}
+
+static int ethtool_set_coalesce(struct net_device *dev, void *useraddr)
+{
+        struct ethtool_coalesce coalesce;
+
+        if (!ethtool_ops->get_coalesce)
+                return -EOPNOTSUPP;
+
+        if (copy_from_user(&coalesce, useraddr, sizeof(coalesce)))
+                return -EFAULT;
+
+        return ethtool_ops->set_coalesce(dev, &coalesce);
+}
+
+static int ethtool_get_ringparam(struct net_device *dev, void *useraddr)
+{
+        struct ethtool_ringparam ringparam = { ETHTOOL_GRINGPARAM };
+
+        if (!ethtool_ops->get_ringparam)
+                return -EOPNOTSUPP;
+
+        ethtool_ops->get_ringparam(dev, &ringparam);
+
+        if (copy_to_user(useraddr, &ringparam, sizeof(ringparam)))
+                return -EFAULT;
+        return 0;
+}
+
+static int ethtool_set_ringparam(struct net_device *dev, void *useraddr)
+{
+        struct ethtool_ringparam ringparam;
+
+        if (!ethtool_ops->get_ringparam)
+                return -EOPNOTSUPP;
+
+        if (copy_from_user(&ringparam, useraddr, sizeof(ringparam)))
+                return -EFAULT;
+
+        return ethtool_ops->set_ringparam(dev, &ringparam);
+}
+
+static int ethtool_get_pauseparam(struct net_device *dev, void *useraddr)
+{
+        struct ethtool_pauseparam pauseparam = { ETHTOOL_GPAUSEPARAM };
+
+        if (!ethtool_ops->get_pauseparam)
+                return -EOPNOTSUPP;
+
+        ethtool_ops->get_pauseparam(dev, &pauseparam);
+
+        if (copy_to_user(useraddr, &pauseparam, sizeof(pauseparam)))
+                return -EFAULT;
+        return 0;
+}
+
+static int ethtool_set_pauseparam(struct net_device *dev, void *useraddr)
+{
+        struct ethtool_pauseparam pauseparam;
+
+        if (!ethtool_ops->get_pauseparam)
+                return -EOPNOTSUPP;
+
+        if (copy_from_user(&pauseparam, useraddr, sizeof(pauseparam)))
+                return -EFAULT;
+
+        return ethtool_ops->set_pauseparam(dev, &pauseparam);
+}
+
+static int ethtool_get_rx_csum(struct net_device *dev, char *useraddr)
+{
+        struct ethtool_value edata = { ETHTOOL_GRXCSUM };
+
+        if (!ethtool_ops->get_rx_csum)
+                return -EOPNOTSUPP;
+
+        edata.data = ethtool_ops->get_rx_csum(dev);
+
+        if (copy_to_user(useraddr, &edata, sizeof(edata)))
+                return -EFAULT;
+        return 0;
+}
+
+static int ethtool_set_rx_csum(struct net_device *dev, char *useraddr)
+{
+        struct ethtool_value edata;
+
+        if (!ethtool_ops->set_rx_csum)
+                return -EOPNOTSUPP;
+
+        if (copy_from_user(&edata, useraddr, sizeof(edata)))
+                return -EFAULT;
+
+        ethtool_ops->set_rx_csum(dev, edata.data);
+        return 0;
+}
+
+static int ethtool_get_tx_csum(struct net_device *dev, char *useraddr)
+{
+        struct ethtool_value edata = { ETHTOOL_GTXCSUM };
+
+        if (!ethtool_ops->get_tx_csum)
+                return -EOPNOTSUPP;
+
+        edata.data = ethtool_ops->get_tx_csum(dev);
+
+        if (copy_to_user(useraddr, &edata, sizeof(edata)))
+                return -EFAULT;
+        return 0;
+}
+
+static int ethtool_set_tx_csum(struct net_device *dev, char *useraddr)
+{
+        struct ethtool_value edata;
+
+        if (!ethtool_ops->set_tx_csum)
+                return -EOPNOTSUPP;
+
+        if (copy_from_user(&edata, useraddr, sizeof(edata)))
+                return -EFAULT;
+
+        return ethtool_ops->set_tx_csum(dev, edata.data);
+}
+
+static int ethtool_get_sg(struct net_device *dev, char *useraddr)
+{
+        struct ethtool_value edata = { ETHTOOL_GSG };
+
+        if (!ethtool_ops->get_sg)
+                return -EOPNOTSUPP;
+
+        edata.data = ethtool_ops->get_sg(dev);
+
+        if (copy_to_user(useraddr, &edata, sizeof(edata)))
+                return -EFAULT;
+        return 0;
+}
+
+static int ethtool_set_sg(struct net_device *dev, char *useraddr)
+{
+        struct ethtool_value edata;
+
+        if (!ethtool_ops->set_sg)
+                return -EOPNOTSUPP;
+
+        if (copy_from_user(&edata, useraddr, sizeof(edata)))
+                return -EFAULT;
+
+        return ethtool_ops->set_sg(dev, edata.data);
+}
+
+static int ethtool_get_tso(struct net_device *dev, char *useraddr)
+{
+        struct ethtool_value edata = { ETHTOOL_GTSO };
+
+        if (!ethtool_ops->get_tso)
+                return -EOPNOTSUPP;
+
+        edata.data = ethtool_ops->get_tso(dev);
+
+        if (copy_to_user(useraddr, &edata, sizeof(edata)))
+                return -EFAULT;
+        return 0;
+}
+
+static int ethtool_set_tso(struct net_device *dev, char *useraddr)
+{
+        struct ethtool_value edata;
+
+        if (!ethtool_ops->set_tso)
+                return -EOPNOTSUPP;
+
+        if (copy_from_user(&edata, useraddr, sizeof(edata)))
+                return -EFAULT;
+
+        return ethtool_ops->set_tso(dev, edata.data);
+}
+
+static int ethtool_self_test(struct net_device *dev, char *useraddr)
+{
+        struct ethtool_test test;
+        struct ethtool_ops *ops = ethtool_ops;
+        u64 *data;
+        int ret;
+
+        if (!ops->self_test || !ops->self_test_count)
+                return -EOPNOTSUPP;
+
+        if (copy_from_user(&test, useraddr, sizeof(test)))
+                return -EFAULT;
+
+        test.len = ops->self_test_count(dev);
+        data = kmalloc(test.len * sizeof(u64), GFP_USER);
+        if (!data)
+                return -ENOMEM;
+
+        ops->self_test(dev, &test, data);
+
+        ret = -EFAULT;
+        if (copy_to_user(useraddr, &test, sizeof(test)))
+                goto out;
+        useraddr += sizeof(test);
+        if (copy_to_user(useraddr, data, test.len * sizeof(u64)))
+                goto out;
+        ret = 0;
+
+out:
+        kfree(data);
+        return ret;
+}
+
+static int ethtool_get_strings(struct net_device *dev, void *useraddr)
+{
+        struct ethtool_gstrings gstrings;
+        struct ethtool_ops *ops = ethtool_ops;
+        u8 *data;
+        int ret;
+
+        if (!ops->get_strings)
+                return -EOPNOTSUPP;
+
+        if (copy_from_user(&gstrings, useraddr, sizeof(gstrings)))
+                return -EFAULT;
+
+        switch (gstrings.string_set) {
+        case ETH_SS_TEST:
+                if (!ops->self_test_count)
+                        return -EOPNOTSUPP;
+                gstrings.len = ops->self_test_count(dev);
+                break;
+        case ETH_SS_STATS:
+                if (!ops->get_stats_count)
+                        return -EOPNOTSUPP;
+                gstrings.len = ops->get_stats_count(dev);
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        data = kmalloc(gstrings.len * ETH_GSTRING_LEN, GFP_USER);
+        if (!data)
+                return -ENOMEM;
+
+        ops->get_strings(dev, gstrings.string_set, data);
+
+        ret = -EFAULT;
+        if (copy_to_user(useraddr, &gstrings, sizeof(gstrings)))
+                goto out;
+        useraddr += sizeof(gstrings);
+        if (copy_to_user(useraddr, data, gstrings.len * ETH_GSTRING_LEN))
+                goto out;
+        ret = 0;
+
+out:
+        kfree(data);
+        return ret;
+}
+
+static int ethtool_phys_id(struct net_device *dev, void *useraddr)
+{
+        struct ethtool_value id;
+
+        if (!ethtool_ops->phys_id)
+                return -EOPNOTSUPP;
+
+        if (copy_from_user(&id, useraddr, sizeof(id)))
+                return -EFAULT;
+
+        return ethtool_ops->phys_id(dev, id.data);
+}
+
+static int ethtool_get_stats(struct net_device *dev, void *useraddr)
+{
+        struct ethtool_stats stats;
+        struct ethtool_ops *ops = ethtool_ops;
+        u64 *data;
+        int ret;
+
+        if (!ops->get_ethtool_stats || !ops->get_stats_count)
+                return -EOPNOTSUPP;
+
+        if (copy_from_user(&stats, useraddr, sizeof(stats)))
+                return -EFAULT;
+
+        stats.n_stats = ops->get_stats_count(dev);
+        data = kmalloc(stats.n_stats * sizeof(u64), GFP_USER);
+        if (!data)
+                return -ENOMEM;
+
+        ops->get_ethtool_stats(dev, &stats, data);
+
+        ret = -EFAULT;
+        if (copy_to_user(useraddr, &stats, sizeof(stats)))
+                goto out;
+        useraddr += sizeof(stats);
+        if (copy_to_user(useraddr, data, stats.n_stats * sizeof(u64)))
+                goto out;
+        ret = 0;
+
+out:
+        kfree(data);
+        return ret;
+}
+
+static int ethtool_ioctl(struct ifreq *ifr)
+{
+        struct net_device *dev = __dev_get_by_name(ifr->ifr_name);
+        void *useraddr = (void *) ifr->ifr_data;
+        u32 ethcmd;
+
+        /*
+         * XXX: This can be pushed down into the ethtool_* handlers that
+         * need it.  Keep existing behaviour for the moment.
+         */
+        if (!capable(CAP_NET_ADMIN))
+                return -EPERM;
+
+        if (!dev || !netif_device_present(dev))
+                return -ENODEV;
+
+        if (copy_from_user(&ethcmd, useraddr, sizeof (ethcmd)))
+                return -EFAULT;
+
+        switch (ethcmd) {
+        case ETHTOOL_GSET:
+                return ethtool_get_settings(dev, useraddr);
+        case ETHTOOL_SSET:
+                return ethtool_set_settings(dev, useraddr);
+        case ETHTOOL_GDRVINFO:
+                return ethtool_get_drvinfo(dev, useraddr);
+        case ETHTOOL_GREGS:
+                return ethtool_get_regs(dev, useraddr);
+        case ETHTOOL_GWOL:
+                return ethtool_get_wol(dev, useraddr);
+        case ETHTOOL_SWOL:
+                return ethtool_set_wol(dev, useraddr);
+        case ETHTOOL_GMSGLVL:
+                return ethtool_get_msglevel(dev, useraddr);
+        case ETHTOOL_SMSGLVL:
+                return ethtool_set_msglevel(dev, useraddr);
+        case ETHTOOL_NWAY_RST:
+                return ethtool_nway_reset(dev);
+        case ETHTOOL_GLINK:
+                return ethtool_get_link(dev, useraddr);
+        case ETHTOOL_GEEPROM:
+                return ethtool_get_eeprom(dev, useraddr);
+        case ETHTOOL_SEEPROM:
+                return ethtool_set_eeprom(dev, useraddr);
+        case ETHTOOL_GCOALESCE:
+                return ethtool_get_coalesce(dev, useraddr);
+        case ETHTOOL_SCOALESCE:
+                return ethtool_set_coalesce(dev, useraddr);
+        case ETHTOOL_GRINGPARAM:
+                return ethtool_get_ringparam(dev, useraddr);
+        case ETHTOOL_SRINGPARAM:
+                return ethtool_set_ringparam(dev, useraddr);
+        case ETHTOOL_GPAUSEPARAM:
+                return ethtool_get_pauseparam(dev, useraddr);
+        case ETHTOOL_SPAUSEPARAM:
+                return ethtool_set_pauseparam(dev, useraddr);
+        case ETHTOOL_GRXCSUM:
+                return ethtool_get_rx_csum(dev, useraddr);
+        case ETHTOOL_SRXCSUM:
+                return ethtool_set_rx_csum(dev, useraddr);
+        case ETHTOOL_GTXCSUM:
+                return ethtool_get_tx_csum(dev, useraddr);
+        case ETHTOOL_STXCSUM:
+                return ethtool_set_tx_csum(dev, useraddr);
+        case ETHTOOL_GSG:
+                return ethtool_get_sg(dev, useraddr);
+        case ETHTOOL_SSG:
+                return ethtool_set_sg(dev, useraddr);
+        case ETHTOOL_GTSO:
+                return ethtool_get_tso(dev, useraddr);
+        case ETHTOOL_STSO:
+                return ethtool_set_tso(dev, useraddr);
+        case ETHTOOL_TEST:
+                return ethtool_self_test(dev, useraddr);
+        case ETHTOOL_GSTRINGS:
+                return ethtool_get_strings(dev, useraddr);
+        case ETHTOOL_PHYS_ID:
+                return ethtool_phys_id(dev, useraddr);
+        case ETHTOOL_GSTATS:
+                return ethtool_get_stats(dev, useraddr);
+        default:
+                return -EOPNOTSUPP;
+        }
+
+        return -EOPNOTSUPP;
+}
+#endif //ETHTOOL_OPS_COMPAT
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)
+static int rtl8168_siocdevprivate(struct net_device *dev, struct ifreq *ifr,
+                                  void __user *data, int cmd)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int ret = 0;
+
+        switch (cmd) {
+        case SIOCDEVPRIVATE_RTLASF:
+                if (!netif_running(dev)) {
+                        ret = -ENODEV;
+                        break;
+                }
+
+                ret = rtl8168_asf_ioctl(dev, ifr);
+                break;
+
+#ifdef ENABLE_DASH_SUPPORT
+        case SIOCDEVPRIVATE_RTLDASH:
+                if (!netif_running(dev)) {
+                        ret = -ENODEV;
+                        break;
+                }
+
+                if (!capable(CAP_NET_ADMIN)) {
+                        ret = -EPERM;
+                        break;
+                }
+
+                ret = rtl8168_dash_ioctl(dev, ifr);
+                break;
+#endif
+
+#ifdef ENABLE_REALWOW_SUPPORT
+        case SIOCDEVPRIVATE_RTLREALWOW:
+                if (!netif_running(dev)) {
+                        ret = -ENODEV;
+                        break;
+                }
+
+                if (!capable(CAP_NET_ADMIN)) {
+                        ret = -EPERM;
+                        break;
+                }
+
+                ret = rtl8168_realwow_ioctl(dev, ifr);
+                break;
+#endif
+
+        case SIOCRTLTOOL:
+                if (!capable(CAP_NET_ADMIN)) {
+                        ret = -EPERM;
+                        break;
+                }
+
+                ret = rtl8168_tool_ioctl(tp, ifr);
+                break;
+
+        default:
+                ret = -EOPNOTSUPP;
+        }
+
+        return ret;
+}
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)
+
+static int
+rtl8168_do_ioctl(struct net_device *dev,
+                 struct ifreq *ifr,
+                 int cmd)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        struct mii_ioctl_data *data = if_mii(ifr);
+        int ret;
+
+        ret = 0;
+        switch (cmd) {
+        case SIOCGMIIPHY:
+                data->phy_id = 32; /* Internal PHY */
+                break;
+
+        case SIOCGMIIREG:
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                data->val_out = rtl8168_mdio_read(tp, data->reg_num);
+                break;
+
+        case SIOCSMIIREG:
+                if (!capable(CAP_NET_ADMIN))
+                        return -EPERM;
+                rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                rtl8168_mdio_write(tp, data->reg_num, data->val_in);
+                break;
+
+#ifdef ETHTOOL_OPS_COMPAT
+        case SIOCETHTOOL:
+                ret = ethtool_ioctl(ifr);
+                break;
+#endif
+        case SIOCDEVPRIVATE_RTLASF:
+                if (!netif_running(dev)) {
+                        ret = -ENODEV;
+                        break;
+                }
+
+                ret = rtl8168_asf_ioctl(dev, ifr);
+                break;
+
+#ifdef ENABLE_DASH_SUPPORT
+        case SIOCDEVPRIVATE_RTLDASH:
+                if (!netif_running(dev)) {
+                        ret = -ENODEV;
+                        break;
+                }
+                if (!capable(CAP_NET_ADMIN)) {
+                        ret = -EPERM;
+                        break;
+                }
+
+                ret = rtl8168_dash_ioctl(dev, ifr);
+                break;
+#endif
+
+#ifdef ENABLE_REALWOW_SUPPORT
+        case SIOCDEVPRIVATE_RTLREALWOW:
+                if (!netif_running(dev)) {
+                        ret = -ENODEV;
+                        break;
+                }
+
+                if (!capable(CAP_NET_ADMIN)) {
+                        ret = -EPERM;
+                        break;
+                }
+
+                ret = rtl8168_realwow_ioctl(dev, ifr);
+                break;
+#endif
+
+        case SIOCRTLTOOL:
+                if (!capable(CAP_NET_ADMIN)) {
+                        ret = -EPERM;
+                        break;
+                }
+
+                ret = rtl8168_tool_ioctl(tp, ifr);
+                break;
+
+        default:
+                ret = -EOPNOTSUPP;
+                break;
+        }
+
+        return ret;
+}
+
+static void
+rtl8168_phy_power_up(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        if (rtl8168_is_in_phy_disable_mode(dev))
+                return;
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        switch (tp->mcfg) {
+        case CFG_METHOD_1:
+        case CFG_METHOD_2:
+        case CFG_METHOD_3:
+        case CFG_METHOD_4:
+        case CFG_METHOD_5:
+        case CFG_METHOD_6:
+        case CFG_METHOD_7:
+        case CFG_METHOD_8:
+        case CFG_METHOD_9:
+        case CFG_METHOD_10:
+        case CFG_METHOD_11:
+        case CFG_METHOD_12:
+        case CFG_METHOD_13:
+                rtl8168_mdio_write(tp, 0x0E, 0x0000);
+                break;
+        }
+        rtl8168_mdio_write(tp, MII_BMCR, BMCR_ANENABLE);
+
+        //wait mdc/mdio ready
+        switch (tp->mcfg) {
+        case CFG_METHOD_23:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+                mdelay(10);
+                break;
+        }
+
+        //wait ups resume (phy state 3)
+        if (HW_SUPPORT_UPS_MODE(tp))
+                rtl8168_wait_phy_ups_resume(dev, HW_PHY_STATUS_LAN_ON);
+}
+
+static void
+rtl8168_phy_power_down(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u32 csi_tmp;
+
+#ifdef ENABLE_FIBER_SUPPORT
+        if (HW_FIBER_MODE_ENABLED(tp))
+                return;
+#endif //ENABLE_FIBER_SUPPORT
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+                csi_tmp = rtl8168_eri_read(tp, 0x1AB, 1, ERIAR_ExGMAC);
+                csi_tmp &= ~( BIT_2 | BIT_3 | BIT_4 | BIT_5 | BIT_6 | BIT_7 );
+                rtl8168_eri_write(tp, 0x1AB, 1, csi_tmp, ERIAR_ExGMAC);
+                break;
+        }
+
+        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+        switch (tp->mcfg) {
+        case CFG_METHOD_1:
+        case CFG_METHOD_2:
+        case CFG_METHOD_3:
+        case CFG_METHOD_4:
+        case CFG_METHOD_5:
+        case CFG_METHOD_6:
+        case CFG_METHOD_7:
+        case CFG_METHOD_8:
+        case CFG_METHOD_9:
+        case CFG_METHOD_10:
+        case CFG_METHOD_11:
+        case CFG_METHOD_12:
+        case CFG_METHOD_13:
+                rtl8168_mdio_write(tp, 0x0E, 0x0200);
+                rtl8168_mdio_write(tp, MII_BMCR, BMCR_PDOWN);
+                break;
+        case CFG_METHOD_14:
+        case CFG_METHOD_15:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                rtl8168_mdio_write(tp, MII_BMCR, BMCR_ANENABLE | BMCR_PDOWN);
+                break;
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+                rtl8168_mdio_write(tp, MII_BMCR, BMCR_ANENABLE | BMCR_PDOWN);
+                break;
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+                rtl8168_mdio_write(tp, MII_BMCR, BMCR_ANENABLE | BMCR_PDOWN);
+                break;
+        default:
+                rtl8168_mdio_write(tp, MII_BMCR, BMCR_PDOWN);
+                break;
+        }
+}
+
+static int __devinit
+rtl8168_init_board(struct pci_dev *pdev,
+                   struct net_device **dev_out,
+                   void __iomem **ioaddr_out)
+{
+        void __iomem *ioaddr;
+        struct net_device *dev;
+        struct rtl8168_private *tp;
+        int rc = -ENOMEM, i, pm_cap;
+
+        assert(ioaddr_out != NULL);
+
+        /* dev zeroed in alloc_etherdev */
+        dev = alloc_etherdev_mq(sizeof (*tp), R8168_MAX_QUEUES);
+        if (dev == NULL) {
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+                if (netif_msg_drv(&debug))
+                        dev_err(&pdev->dev, "unable to alloc new ethernet\n");
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+                goto err_out;
+        }
+
+        SET_MODULE_OWNER(dev);
+        SET_NETDEV_DEV(dev, &pdev->dev);
+        tp = netdev_priv(dev);
+        tp->dev = dev;
+        tp->pci_dev = pdev;
+        tp->msg_enable = netif_msg_init(debug.msg_enable, R8168_MSG_DEFAULT);
+
+        if (!aspm || tp->mcfg == CFG_METHOD_9) {
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
+                pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
+                                       PCIE_LINK_STATE_CLKPM);
+#endif
+        }
+
+        /* enable device (incl. PCI PM wakeup and hotplug setup) */
+        rc = pci_enable_device(pdev);
+        if (rc < 0) {
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+                if (netif_msg_probe(tp))
+                        dev_err(&pdev->dev, "enable failure\n");
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+                goto err_out_free_dev;
+        }
+
+        if (pci_set_mwi(pdev) < 0) {
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+                if (netif_msg_drv(&debug))
+                        dev_info(&pdev->dev, "Mem-Wr-Inval unavailable.\n");
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+        }
+
+        /* save power state before pci_enable_device overwrites it */
+        pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
+        if (pm_cap) {
+                u16 pwr_command;
+
+                pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pwr_command);
+        } else {
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+                if (netif_msg_probe(tp)) {
+                        dev_err(&pdev->dev, "PowerManagement capability not found.\n");
+                }
+#else
+                printk("PowerManagement capability not found.\n");
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+
+        }
+
+        /* make sure PCI base addr 1 is MMIO */
+        if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+                if (netif_msg_probe(tp))
+                        dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n");
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+                rc = -ENODEV;
+                goto err_out_mwi;
+        }
+        /* check for weird/broken PCI region reporting */
+        if (pci_resource_len(pdev, 2) < R8168_REGS_SIZE) {
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+                if (netif_msg_probe(tp))
+                        dev_err(&pdev->dev, "Invalid PCI region size(s), aborting\n");
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+                rc = -ENODEV;
+                goto err_out_mwi;
+        }
+
+        rc = pci_request_regions(pdev, MODULENAME);
+        if (rc < 0) {
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+                if (netif_msg_probe(tp))
+                        dev_err(&pdev->dev, "could not request regions.\n");
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+                goto err_out_mwi;
+        }
+
+        if ((sizeof(dma_addr_t) > 4) &&
+            use_dac &&
+            !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
+            !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
+                dev->features |= NETIF_F_HIGHDMA;
+        } else {
+                rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
+                if (rc < 0) {
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+                        if (netif_msg_probe(tp))
+                                dev_err(&pdev->dev, "DMA configuration failed.\n");
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+                        goto err_out_free_res;
+                }
+        }
+
+        /* ioremap MMIO region */
+        ioaddr = ioremap(pci_resource_start(pdev, 2), R8168_REGS_SIZE);
+        if (ioaddr == NULL) {
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+                if (netif_msg_probe(tp))
+                        dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+                rc = -EIO;
+                goto err_out_free_res;
+        }
+
+        tp->mmio_addr = ioaddr;
+
+        /* Identify chip attached to board */
+        rtl8168_get_mac_version(tp);
+
+        rtl8168_print_mac_version(tp);
+
+        for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) {
+                if (tp->mcfg == rtl_chip_info[i].mcfg)
+                        break;
+        }
+
+        if (i < 0) {
+                /* Unknown chip: assume array element #0, original RTL-8168 */
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+                if (netif_msg_probe(tp))
+                        dev_printk(KERN_DEBUG, &pdev->dev, "unknown chip version, assuming %s\n", rtl_chip_info[0].name);
+#else
+                printk("Realtek unknown chip version, assuming %s\n", rtl_chip_info[0].name);
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
+                i++;
+        }
+
+        tp->chipset = i;
+
+        *ioaddr_out = ioaddr;
+        *dev_out = dev;
+out:
+        return rc;
+
+err_out_free_res:
+        pci_release_regions(pdev);
+err_out_mwi:
+        pci_clear_mwi(pdev);
+        pci_disable_device(pdev);
+err_out_free_dev:
+        free_netdev(dev);
+err_out:
+        *ioaddr_out = NULL;
+        *dev_out = NULL;
+        goto out;
+}
+
+static void
+rtl8168_esd_checker(struct rtl8168_private *tp)
+{
+        struct net_device *dev = tp->dev;
+        struct pci_dev *pdev = tp->pci_dev;
+        u8 cmd;
+        u16 io_base_l;
+        u16 mem_base_l;
+        u16 mem_base_h;
+        u8 ilr;
+        u16 resv_0x1c_h;
+        u16 resv_0x1c_l;
+        u16 resv_0x20_l;
+        u16 resv_0x20_h;
+        u16 resv_0x24_l;
+        u16 resv_0x24_h;
+        u16 resv_0x2c_h;
+        u16 resv_0x2c_l;
+        u32 pci_sn_l;
+        u32 pci_sn_h;
+
+        if (unlikely(tp->rtk_enable_diag))
+                goto exit;
+
+        tp->esd_flag = 0;
+
+        pci_read_config_byte(pdev, PCI_COMMAND, &cmd);
+        if (cmd != tp->pci_cfg_space.cmd) {
+                printk(KERN_ERR "%s: cmd = 0x%02x, should be 0x%02x \n.", dev->name, cmd, tp->pci_cfg_space.cmd);
+                pci_write_config_byte(pdev, PCI_COMMAND, tp->pci_cfg_space.cmd);
+                tp->esd_flag |= BIT_0;
+
+                pci_read_config_byte(pdev, PCI_COMMAND, &cmd);
+                if (cmd == 0xff) {
+                        printk(KERN_ERR "%s: pci link is down \n.", dev->name);
+                        goto exit;
+                }
+        }
+
+        pci_read_config_word(pdev, PCI_BASE_ADDRESS_0, &io_base_l);
+        if (io_base_l != tp->pci_cfg_space.io_base_l) {
+                printk(KERN_ERR "%s: io_base_l = 0x%04x, should be 0x%04x \n.", dev->name, io_base_l, tp->pci_cfg_space.io_base_l);
+                pci_write_config_word(pdev, PCI_BASE_ADDRESS_0, tp->pci_cfg_space.io_base_l);
+                tp->esd_flag |= BIT_1;
+        }
+
+        pci_read_config_word(pdev, PCI_BASE_ADDRESS_2, &mem_base_l);
+        if (mem_base_l != tp->pci_cfg_space.mem_base_l) {
+                printk(KERN_ERR "%s: mem_base_l = 0x%04x, should be 0x%04x \n.", dev->name, mem_base_l, tp->pci_cfg_space.mem_base_l);
+                pci_write_config_word(pdev, PCI_BASE_ADDRESS_2, tp->pci_cfg_space.mem_base_l);
+                tp->esd_flag |= BIT_2;
+        }
+
+        pci_read_config_word(pdev, PCI_BASE_ADDRESS_2 + 2, &mem_base_h);
+        if (mem_base_h!= tp->pci_cfg_space.mem_base_h) {
+                printk(KERN_ERR "%s: mem_base_h = 0x%04x, should be 0x%04x \n.", dev->name, mem_base_h, tp->pci_cfg_space.mem_base_h);
+                pci_write_config_word(pdev, PCI_BASE_ADDRESS_2 + 2, tp->pci_cfg_space.mem_base_h);
+                tp->esd_flag |= BIT_3;
+        }
+
+        pci_read_config_word(pdev, PCI_BASE_ADDRESS_3, &resv_0x1c_l);
+        if (resv_0x1c_l != tp->pci_cfg_space.resv_0x1c_l) {
+                printk(KERN_ERR "%s: resv_0x1c_l = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x1c_l, tp->pci_cfg_space.resv_0x1c_l);
+                pci_write_config_word(pdev, PCI_BASE_ADDRESS_3, tp->pci_cfg_space.resv_0x1c_l);
+                tp->esd_flag |= BIT_4;
+        }
+
+        pci_read_config_word(pdev, PCI_BASE_ADDRESS_3 + 2, &resv_0x1c_h);
+        if (resv_0x1c_h != tp->pci_cfg_space.resv_0x1c_h) {
+                printk(KERN_ERR "%s: resv_0x1c_h = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x1c_h, tp->pci_cfg_space.resv_0x1c_h);
+                pci_write_config_word(pdev, PCI_BASE_ADDRESS_3 + 2, tp->pci_cfg_space.resv_0x1c_h);
+                tp->esd_flag |= BIT_5;
+        }
+
+        pci_read_config_word(pdev, PCI_BASE_ADDRESS_4, &resv_0x20_l);
+        if (resv_0x20_l != tp->pci_cfg_space.resv_0x20_l) {
+                printk(KERN_ERR "%s: resv_0x20_l = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x20_l, tp->pci_cfg_space.resv_0x20_l);
+                pci_write_config_word(pdev, PCI_BASE_ADDRESS_4, tp->pci_cfg_space.resv_0x20_l);
+                tp->esd_flag |= BIT_6;
+        }
+
+        pci_read_config_word(pdev, PCI_BASE_ADDRESS_4 + 2, &resv_0x20_h);
+        if (resv_0x20_h != tp->pci_cfg_space.resv_0x20_h) {
+                printk(KERN_ERR "%s: resv_0x20_h = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x20_h, tp->pci_cfg_space.resv_0x20_h);
+                pci_write_config_word(pdev, PCI_BASE_ADDRESS_4 + 2, tp->pci_cfg_space.resv_0x20_h);
+                tp->esd_flag |= BIT_7;
+        }
+
+        pci_read_config_word(pdev, PCI_BASE_ADDRESS_5, &resv_0x24_l);
+        if (resv_0x24_l != tp->pci_cfg_space.resv_0x24_l) {
+                printk(KERN_ERR "%s: resv_0x24_l = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x24_l, tp->pci_cfg_space.resv_0x24_l);
+                pci_write_config_word(pdev, PCI_BASE_ADDRESS_5, tp->pci_cfg_space.resv_0x24_l);
+                tp->esd_flag |= BIT_8;
+        }
+
+        pci_read_config_word(pdev, PCI_BASE_ADDRESS_5 + 2, &resv_0x24_h);
+        if (resv_0x24_h != tp->pci_cfg_space.resv_0x24_h) {
+                printk(KERN_ERR "%s: resv_0x24_h = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x24_h, tp->pci_cfg_space.resv_0x24_h);
+                pci_write_config_word(pdev, PCI_BASE_ADDRESS_5 + 2, tp->pci_cfg_space.resv_0x24_h);
+                tp->esd_flag |= BIT_9;
+        }
+
+        pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ilr);
+        if (ilr != tp->pci_cfg_space.ilr) {
+                printk(KERN_ERR "%s: ilr = 0x%02x, should be 0x%02x \n.", dev->name, ilr, tp->pci_cfg_space.ilr);
+                pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, tp->pci_cfg_space.ilr);
+                tp->esd_flag |= BIT_10;
+        }
+
+        pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &resv_0x2c_l);
+        if (resv_0x2c_l != tp->pci_cfg_space.resv_0x2c_l) {
+                printk(KERN_ERR "%s: resv_0x2c_l = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x2c_l, tp->pci_cfg_space.resv_0x2c_l);
+                pci_write_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, tp->pci_cfg_space.resv_0x2c_l);
+                tp->esd_flag |= BIT_11;
+        }
+
+        pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID + 2, &resv_0x2c_h);
+        if (resv_0x2c_h != tp->pci_cfg_space.resv_0x2c_h) {
+                printk(KERN_ERR "%s: resv_0x2c_h = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x2c_h, tp->pci_cfg_space.resv_0x2c_h);
+                pci_write_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID + 2, tp->pci_cfg_space.resv_0x2c_h);
+                tp->esd_flag |= BIT_12;
+        }
+
+        if (tp->HwPcieSNOffset > 0) {
+                pci_sn_l = rtl8168_csi_read(tp, tp->HwPcieSNOffset);
+                if (pci_sn_l != tp->pci_cfg_space.pci_sn_l) {
+                        printk(KERN_ERR "%s: pci_sn_l = 0x%08x, should be 0x%08x \n.", dev->name, pci_sn_l, tp->pci_cfg_space.pci_sn_l);
+                        rtl8168_csi_write(tp, tp->HwPcieSNOffset, tp->pci_cfg_space.pci_sn_l);
+                        tp->esd_flag |= BIT_13;
+                }
+
+                pci_sn_h = rtl8168_csi_read(tp, tp->HwPcieSNOffset + 4);
+                if (pci_sn_h != tp->pci_cfg_space.pci_sn_h) {
+                        printk(KERN_ERR "%s: pci_sn_h = 0x%08x, should be 0x%08x \n.", dev->name, pci_sn_h, tp->pci_cfg_space.pci_sn_h);
+                        rtl8168_csi_write(tp, tp->HwPcieSNOffset + 4, tp->pci_cfg_space.pci_sn_h);
+                        tp->esd_flag |= BIT_14;
+                }
+        }
+
+        if (tp->TestPhyOcpReg && rtl8168_test_phy_ocp(tp))
+                tp->esd_flag |= BIT_15;
+
+        if (tp->esd_flag != 0) {
+                printk(KERN_ERR "%s: esd_flag = 0x%04x\n.\n", dev->name, tp->esd_flag);
+                netif_carrier_off(dev);
+                netif_tx_disable(dev);
+                rtl8168_hw_reset(dev);
+                rtl8168_tx_clear(tp);
+                rtl8168_rx_clear(tp);
+                rtl8168_init_ring(dev);
+                rtl8168_hw_init(dev);
+                rtl8168_powerup_pll(dev);
+                rtl8168_hw_ephy_config(dev);
+                rtl8168_hw_phy_config(dev);
+                rtl8168_hw_config(dev);
+                rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
+                tp->esd_flag = 0;
+        }
+
+exit:
+        return;
+}
+
+/*
+static void
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
+rtl8168_esd_timer(unsigned long __opaque)
+#else
+rtl8168_esd_timer(struct timer_list *t)
+#endif
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
+        struct net_device *dev = (struct net_device *)__opaque;
+        struct rtl8168_private *tp = netdev_priv(dev);
+        struct timer_list *timer = &tp->esd_timer;
+#else
+        struct rtl8168_private *tp = from_timer(tp, t, esd_timer);
+        //struct net_device *dev = tp->dev;
+        struct timer_list *timer = t;
+#endif
+        rtl8168_esd_checker(tp);
+
+        mod_timer(timer, jiffies + timeout);
+}
+*/
+
+/*
+static void
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
+rtl8168_link_timer(unsigned long __opaque)
+#else
+rtl8168_link_timer(struct timer_list *t)
+#endif
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
+        struct net_device *dev = (struct net_device *)__opaque;
+        struct rtl8168_private *tp = netdev_priv(dev);
+        struct timer_list *timer = &tp->link_timer;
+#else
+        struct rtl8168_private *tp = from_timer(tp, t, link_timer);
+        struct net_device *dev = tp->dev;
+        struct timer_list *timer = t;
+#endif
+        rtl8168_check_link_status(dev);
+
+        mod_timer(timer, jiffies + RTL8168_LINK_TIMEOUT);
+}
+*/
+
+int rtl8168_enable_msix(struct rtl8168_private *tp)
+{
+        int i, nvecs = 0;
+        struct msix_entry msix_ent[R8168_MAX_MSIX_VEC];
+        //struct net_device *dev = tp->dev;
+        //const int len = sizeof(tp->irq_tbl[0].name);
+
+        for (i = 0; i < R8168_MAX_MSIX_VEC; i++) {
+                msix_ent[i].entry = i;
+                msix_ent[i].vector = 0;
+        }
+
+        nvecs = pci_enable_msix_range(tp->pci_dev, msix_ent,
+                                      tp->min_irq_nvecs, tp->max_irq_nvecs);
+        if (nvecs < 0)
+                goto out;
+
+        for (i = 0; i < nvecs; i++) {
+                struct r8168_irq *irq = &tp->irq_tbl[i];
+                irq->vector = msix_ent[i].vector;
+                //snprintf(irq->name, len, "%s-%d", dev->name, i);
+                //irq->handler = rtl8168_interrupt_msix;
+        }
+
+out:
+        return nvecs;
+}
+
+/* Cfg9346_Unlock assumed. */
+static int rtl8168_try_msi(struct rtl8168_private *tp)
+{
+        struct pci_dev *pdev = tp->pci_dev;
+        unsigned int hw_supp_irq_nvecs;
+        unsigned msi = 0;
+        int nvecs = 1;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_4 ... CFG_METHOD_8:
+                hw_supp_irq_nvecs = 2;
+                break;
+        case CFG_METHOD_9 ... CFG_METHOD_37:
+                hw_supp_irq_nvecs = 4;
+                break;
+        default:
+                hw_supp_irq_nvecs = 1;
+                break;
+        }
+        tp->hw_supp_irq_nvecs = clamp_val(hw_supp_irq_nvecs, 1,
+                                          R8168_MAX_MSIX_VEC);
+
+        tp->max_irq_nvecs = 1;
+        tp->min_irq_nvecs = 1;
+
+#ifdef ENABLE_RSS_SUPPORT
+        if (!pci_enable_msi(pdev))
+                msi |= RTL_FEATURE_MSI;
+        else
+                dev_info(&pdev->dev, "Default use INTx.\n");
+#else
+        switch (tp->mcfg) {
+        case CFG_METHOD_1:
+        case CFG_METHOD_2:
+        case CFG_METHOD_3:
+        case CFG_METHOD_4:
+        case CFG_METHOD_5:
+        case CFG_METHOD_6:
+        case CFG_METHOD_7:
+        case CFG_METHOD_8:
+                dev_info(&pdev->dev, "Default use INTx.\n");
+                break;
+        default:
+#if defined(RTL_USE_NEW_INTR_API)
+                if ((nvecs = pci_alloc_irq_vectors(pdev, tp->min_irq_nvecs, tp->max_irq_nvecs, PCI_IRQ_MSIX)) > 0)
+                        msi |= RTL_FEATURE_MSIX;
+                else if ((nvecs = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES)) > 0 &&
+                         pci_dev_msi_enabled(pdev))
+                        msi |= RTL_FEATURE_MSI;
+#elif LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
+                if ((nvecs = rtl8168_enable_msix(tp)) > 0)
+                        msi |= RTL_FEATURE_MSIX;
+                else if (!pci_enable_msi(pdev))
+                        msi |= RTL_FEATURE_MSI;
+#endif
+                break;
+        }
+#endif //ENABLE_RSS_SUPPORT
+        if (!(msi & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX)))
+                dev_info(&pdev->dev, "no MSI. Back to INTx.\n");
+
+        if (!(msi & RTL_FEATURE_MSIX) || nvecs < 1)
+                nvecs = 1;
+
+        tp->irq_nvecs = nvecs;
+
+        tp->features |= msi;
+
+        return nvecs;
+}
+
+static void rtl8168_disable_msi(struct pci_dev *pdev, struct rtl8168_private *tp)
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0)
+        if (tp->features & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX))
+                pci_free_irq_vectors(pdev);
+#elif LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
+        if (tp->features & (RTL_FEATURE_MSIX))
+                pci_disable_msix(pdev);
+        else if (tp->features & (RTL_FEATURE_MSI))
+                pci_disable_msi(pdev);
+#endif
+        tp->features &= ~(RTL_FEATURE_MSI | RTL_FEATURE_MSIX);
+}
+
+static int rtl8168_get_irq(struct pci_dev *pdev)
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0)
+        return pci_irq_vector(pdev, 0);
+#else
+        return pdev->irq;
+#endif
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
+static const struct net_device_ops rtl8168_netdev_ops = {
+        .ndo_open       = rtl8168_open,
+        .ndo_stop       = rtl8168_close,
+        .ndo_get_stats      = rtl8168_get_stats,
+        .ndo_start_xmit     = rtl8168_start_xmit,
+        .ndo_tx_timeout     = rtl8168_tx_timeout,
+        .ndo_change_mtu     = rtl8168_change_mtu,
+        .ndo_set_mac_address    = rtl8168_set_mac_address,
+#if LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)
+        .ndo_do_ioctl       = rtl8168_do_ioctl,
+#else
+        .ndo_siocdevprivate = rtl8168_siocdevprivate,
+        .ndo_eth_ioctl      = rtl8168_do_ioctl,
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)
+        .ndo_set_multicast_list = rtl8168_set_rx_mode,
+#else
+        .ndo_set_rx_mode    = rtl8168_set_rx_mode,
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+#ifdef CONFIG_R8168_VLAN
+        .ndo_vlan_rx_register   = rtl8168_vlan_rx_register,
+#endif
+#else
+        .ndo_fix_features   = rtl8168_fix_features,
+        .ndo_set_features   = rtl8168_set_features,
+#endif
+#ifdef CONFIG_NET_POLL_CONTROLLER
+        .ndo_poll_controller    = rtl8168_netpoll,
+#endif
+};
+#endif
+
+#ifdef  CONFIG_R8168_NAPI
+
+void rtl8168_enable_napi(struct rtl8168_private *tp)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+        int i;
+
+        for (i = 0; i < tp->irq_nvecs; i++)
+                RTL_NAPI_ENABLE(tp->dev, &tp->r8168napi[i].napi);
+#endif
+}
+
+static void rtl8168_disable_napi(struct rtl8168_private *tp)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+        int i;
+
+        for (i = 0; i < tp->irq_nvecs; i++)
+                RTL_NAPI_DISABLE(tp->dev, &tp->r8168napi[i].napi);
+#endif
+}
+
+static void rtl8168_del_napi(struct rtl8168_private *tp)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+        int i;
+
+        for (i = 0; i < tp->irq_nvecs; i++)
+                RTL_NAPI_DEL((&tp->r8168napi[i]));
+#endif
+}
+#endif //CONFIG_R8168_NAPI
+
+static void rtl8168_init_napi(struct rtl8168_private *tp)
+{
+        int i;
+
+        for (i=0; i<tp->irq_nvecs; i++) {
+                struct r8168_napi *r8168napi = &tp->r8168napi[i];
+#ifdef CONFIG_R8168_NAPI
+                int (*poll)(struct napi_struct *, int);
+
+                if (tp->features & RTL_FEATURE_MSIX) {
+                        if (i == 0)
+                                poll = rtl8168_poll_msix_ring;
+                        else
+                                poll = rtl8168_poll_msix_rx;
+                } else {
+                        poll = rtl8168_poll;
+                }
+
+                RTL_NAPI_CONFIG(tp->dev, r8168napi, poll, R8168_NAPI_WEIGHT);
+#endif
+
+                r8168napi->priv = tp;
+                r8168napi->index = i;
+        }
+}
+
+static int
+rtl8168_set_real_num_queue(struct rtl8168_private *tp)
+{
+        int retval = 0;
+
+        retval = netif_set_real_num_tx_queues(tp->dev, tp->num_tx_rings);
+        if (retval < 0)
+                goto exit;
+
+        retval = netif_set_real_num_rx_queues(tp->dev, tp->num_rx_rings);
+        if (retval < 0)
+                goto exit;
+
+exit:
+        return retval;
+}
+
+static int __devinit
+rtl8168_init_one(struct pci_dev *pdev,
+                 const struct pci_device_id *ent)
+{
+        struct net_device *dev = NULL;
+        struct rtl8168_private *tp;
+        void __iomem *ioaddr = NULL;
+        static int board_idx = -1;
+
+        int rc;
+
+        assert(pdev != NULL);
+        assert(ent != NULL);
+
+        board_idx++;
+
+        if (netif_msg_drv(&debug))
+                printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n",
+                       MODULENAME, RTL8168_VERSION);
+
+        rc = rtl8168_init_board(pdev, &dev, &ioaddr);
+        if (rc)
+                goto out;
+
+        tp = netdev_priv(dev);
+        assert(ioaddr != NULL);
+
+        tp->set_speed = rtl8168_set_speed_xmii;
+        tp->get_settings = rtl8168_gset_xmii;
+        tp->phy_reset_enable = rtl8168_xmii_reset_enable;
+        tp->phy_reset_pending = rtl8168_xmii_reset_pending;
+        tp->link_ok = rtl8168_xmii_link_ok;
+
+        rc = rtl8168_try_msi(tp);
+        if (rc < 0) {
+                dev_err(&pdev->dev, "Can't allocate interrupt\n");
+                goto err_out_1;
+        }
+
+        rtl8168_init_software_variable(dev);
+
+        RTL_NET_DEVICE_OPS(rtl8168_netdev_ops);
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
+        SET_ETHTOOL_OPS(dev, &rtl8168_ethtool_ops);
+#endif
+
+        dev->watchdog_timeo = RTL8168_TX_TIMEOUT;
+        dev->irq = rtl8168_get_irq(pdev);
+        dev->base_addr = (unsigned long) ioaddr;
+
+        rtl8168_init_napi(tp);
+
+#ifdef CONFIG_R8168_VLAN
+        if (tp->mcfg != CFG_METHOD_DEFAULT) {
+                dev->features |= NETIF_F_HW_VLAN_TX;
+#ifndef ENABLE_LIB_SUPPORT
+                dev->features |= NETIF_F_HW_VLAN_RX;
+#endif //!ENABLE_LIB_SUPPORT
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
+                dev->vlan_rx_kill_vid = rtl8168_vlan_rx_kill_vid;
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
+        }
+#endif
+
+        /* There has been a number of reports that using SG/TSO results in
+         * tx timeouts. However for a lot of people SG/TSO works fine.
+         * Therefore disable both features by default, but allow users to
+         * enable them. Use at own risk!
+         */
+        tp->cp_cmd |= RTL_R16(tp, CPlusCmd);
+        if (tp->mcfg != CFG_METHOD_DEFAULT) {
+                dev->features |= NETIF_F_IP_CSUM;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+                tp->cp_cmd |= RxChkSum;
+#else
+                dev->features |= NETIF_F_RXCSUM;
+                dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM |
+                                   NETIF_F_RXCSUM | NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
+                dev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM |
+                                     NETIF_F_HIGHDMA;
+                if ((tp->mcfg != CFG_METHOD_16) && (tp->mcfg != CFG_METHOD_17)) {
+                        dev->hw_features |= NETIF_F_TSO;
+                        dev->vlan_features |= NETIF_F_TSO;
+                        switch (tp->mcfg) {
+                        case CFG_METHOD_1 ... CFG_METHOD_26:
+                                /* nothing to do */
+                                break;
+                        default:
+                                dev->features |= NETIF_F_SG | NETIF_F_TSO;
+                                break;
+                        };
+                }
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,15,0)
+                dev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,15,0)
+                dev->hw_features |= NETIF_F_RXALL;
+                dev->hw_features |= NETIF_F_RXFCS;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
+                if ((tp->mcfg == CFG_METHOD_1) || (tp->mcfg == CFG_METHOD_2) || (tp->mcfg == CFG_METHOD_3)) {
+                        dev->hw_features &= ~NETIF_F_IPV6_CSUM;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0)
+                        netif_set_tso_max_size(dev, LSO_64K);
+                        netif_set_tso_max_segs(dev, NIC_MAX_PHYS_BUF_COUNT_LSO2);
+#else //LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0)
+                        netif_set_gso_max_size(dev, LSO_32K);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,0)
+                        dev->gso_max_segs = NIC_MAX_PHYS_BUF_COUNT_LSO_64K;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0)
+                        dev->gso_min_segs = NIC_MIN_PHYS_BUF_COUNT;
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0)
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,0)
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0)
+                } else {
+                        dev->hw_features |= NETIF_F_IPV6_CSUM;
+                        dev->features |=  NETIF_F_IPV6_CSUM;
+                        if ((tp->mcfg != CFG_METHOD_16) && (tp->mcfg != CFG_METHOD_17)) {
+                                dev->hw_features |= NETIF_F_TSO6;
+                                switch (tp->mcfg) {
+                                case CFG_METHOD_1 ... CFG_METHOD_26:
+                                        /* nothing to do */
+                                        break;
+                                default:
+                                        dev->features |=  NETIF_F_TSO6;
+                                        break;
+                                };
+                        }
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0)
+                        netif_set_tso_max_size(dev, LSO_64K);
+                        netif_set_tso_max_segs(dev, NIC_MAX_PHYS_BUF_COUNT_LSO2);
+#else //LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0)
+                        netif_set_gso_max_size(dev, LSO_64K);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,0)
+                        dev->gso_max_segs = NIC_MAX_PHYS_BUF_COUNT_LSO2;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0)
+                        dev->gso_min_segs = NIC_MIN_PHYS_BUF_COUNT;
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0)
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,0)
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0)
+                }
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+        }
+
+#ifdef ENABLE_RSS_SUPPORT
+        if (tp->EnableRss) {
+                dev->hw_features |= NETIF_F_RXHASH;
+                dev->features |=  NETIF_F_RXHASH;
+        }
+#endif
+
+#ifdef ENABLE_DASH_SUPPORT
+        if (tp->DASH)
+                AllocateDashShareMemory(dev);
+#endif
+
+#ifdef ENABLE_LIB_SUPPORT
+        BLOCKING_INIT_NOTIFIER_HEAD(&tp->lib_nh);
+#endif
+        rtl8168_init_all_schedule_work(tp);
+
+        rc = rtl8168_set_real_num_queue(tp);
+        if (rc < 0)
+                goto err_out;
+
+        rtl8168_exit_oob(dev);
+
+        rtl8168_hw_init(dev);
+
+        rtl8168_hw_reset(dev);
+
+        /* Get production from EEPROM */
+        if (((tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
+              tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_29 ||
+              tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_35 ||
+              tp->mcfg == CFG_METHOD_36 || tp->mcfg == CFG_METHOD_37) &&
+             (rtl8168_mac_ocp_read(tp, 0xDC00) & BIT_3)) ||
+            ((tp->mcfg == CFG_METHOD_26) && (rtl8168_mac_ocp_read(tp, 0xDC00) & BIT_4)))
+                tp->eeprom_type = EEPROM_TYPE_NONE;
+        else
+                rtl8168_eeprom_type(tp);
+
+        if (tp->eeprom_type == EEPROM_TYPE_93C46 || tp->eeprom_type == EEPROM_TYPE_93C56)
+                rtl8168_set_eeprom_sel_low(tp);
+
+        rtl8168_get_mac_address(dev);
+
+        tp->fw_name = rtl_chip_fw_infos[tp->mcfg].fw_name;
+
+#if defined(ENABLE_DASH_PRINTER_SUPPORT)
+        init_completion(&tp->fw_host_ok);
+        init_completion(&tp->fw_ack);
+        init_completion(&tp->fw_req);
+#endif
+
+        tp->tally_vaddr = dma_alloc_coherent(&pdev->dev, sizeof(*tp->tally_vaddr),
+                                             &tp->tally_paddr, GFP_KERNEL);
+        if (!tp->tally_vaddr) {
+                rc = -ENOMEM;
+                goto err_out;
+        }
+
+        rtl8168_tally_counter_clear(tp);
+
+        pci_set_drvdata(pdev, dev);
+
+        rc = register_netdev(dev);
+        if (rc)
+                goto err_out;
+
+        printk(KERN_INFO "%s: This product is covered by one or more of the following patents: US6,570,884, US6,115,776, and US6,327,625.\n", MODULENAME);
+
+        rtl8168_disable_rxdvgate(dev);
+
+        device_set_wakeup_enable(&pdev->dev, tp->wol_enabled);
+
+        netif_carrier_off(dev);
+
+        printk("%s", GPL_CLAIM);
+
+out:
+        return rc;
+
+err_out:
+        if (tp->tally_vaddr != NULL) {
+                dma_free_coherent(&pdev->dev, sizeof(*tp->tally_vaddr), tp->tally_vaddr,
+                                  tp->tally_paddr);
+
+                tp->tally_vaddr = NULL;
+        }
+#ifdef  CONFIG_R8168_NAPI
+        rtl8168_del_napi(tp);
+#endif
+        rtl8168_disable_msi(pdev, tp);
+
+err_out_1:
+        rtl8168_release_board(pdev, dev);
+
+        goto out;
+}
+
+static void __devexit
+rtl8168_remove_one(struct pci_dev *pdev)
+{
+        struct net_device *dev = pci_get_drvdata(pdev);
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        assert(dev != NULL);
+        assert(tp != NULL);
+
+        set_bit(R8168_FLAG_DOWN, tp->task_flags);
+
+        rtl8168_cancel_all_schedule_work(tp);
+
+#ifdef  CONFIG_R8168_NAPI
+        rtl8168_del_napi(tp);
+#endif
+        if (HW_DASH_SUPPORT_DASH(tp))
+                rtl8168_driver_stop(tp);
+
+        unregister_netdev(dev);
+        rtl8168_disable_msi(pdev, tp);
+#ifdef ENABLE_R8168_PROCFS
+        rtl8168_proc_remove(dev);
+#endif
+        if (tp->tally_vaddr != NULL) {
+                dma_free_coherent(&pdev->dev, sizeof(*tp->tally_vaddr), tp->tally_vaddr, tp->tally_paddr);
+                tp->tally_vaddr = NULL;
+        }
+
+        rtl8168_release_board(pdev, dev);
+
+#ifdef ENABLE_USE_FIRMWARE_FILE
+        rtl8168_release_firmware(tp);
+#endif
+
+        pci_set_drvdata(pdev, NULL);
+}
+
+static void rtl8168_free_irq(struct rtl8168_private *tp)
+{
+        int i;
+
+        for (i=0; i<tp->irq_nvecs; i++) {
+                struct r8168_irq *irq = &tp->irq_tbl[i];
+                struct r8168_napi *r8168napi = &tp->r8168napi[i];
+
+                if (irq->requested) {
+                        irq->requested = 0;
+#if defined(RTL_USE_NEW_INTR_API)
+                        pci_free_irq(tp->pci_dev, i, r8168napi);
+#else
+                        free_irq(irq->vector, r8168napi);
+#endif
+                }
+        }
+}
+
+static int rtl8168_alloc_irq(struct rtl8168_private *tp)
+{
+        struct net_device *dev = tp->dev;
+        int rc = 0;
+        struct r8168_irq *irq;
+        struct r8168_napi *r8168napi;
+        int i = 0;
+        const int len = sizeof(tp->irq_tbl[0].name);
+
+#if defined(RTL_USE_NEW_INTR_API)
+        for (i=0; i<tp->irq_nvecs; i++) {
+                irq = &tp->irq_tbl[i];
+                if (tp->features & RTL_FEATURE_MSIX)
+                        irq->handler = rtl8168_interrupt_msix;
+                else
+                        irq->handler = rtl8168_interrupt;
+
+                r8168napi = &tp->r8168napi[i];
+                snprintf(irq->name, len, "%s-%d", dev->name, i);
+                rc = pci_request_irq(tp->pci_dev, i, irq->handler, NULL, r8168napi,
+                                     irq->name);
+                if (rc)
+                        break;
+
+                irq->vector = pci_irq_vector(tp->pci_dev, i);
+                irq->requested = 1;
+        }
+#else
+        unsigned long irq_flags = 0;
+#ifdef ENABLE_LIB_SUPPORT
+        if (tp->features & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX))
+                irq_flags |= IRQF_NO_SUSPEND;
+#endif //ENABLE_LIB_SUPPORT
+        if (tp->features & RTL_FEATURE_MSIX) {
+                for (i=0; i<tp->irq_nvecs; i++) {
+                        irq = &tp->irq_tbl[i];
+                        irq->handler = rtl8168_interrupt_msix;
+                        r8168napi = &tp->r8168napi[i];
+                        snprintf(irq->name, len, "%s-%d", dev->name, i);
+                        rc = request_irq(irq->vector, irq->handler, irq_flags, irq->name, r8168napi);
+
+                        if (rc)
+                                break;
+
+                        irq->requested = 1;
+                }
+        } else {
+                irq = &tp->irq_tbl[0];
+                irq->handler = rtl8168_interrupt;
+                r8168napi = &tp->r8168napi[0];
+                snprintf(irq->name, len, "%s-0", dev->name);
+                irq->vector = dev->irq;
+                irq_flags |= (tp->features & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX)) ? 0 : SA_SHIRQ;
+                rc = request_irq(irq->vector, irq->handler, irq_flags, irq->name, r8168napi);
+
+                if (rc == 0)
+                        irq->requested = 1;
+        }
+#endif
+        if (rc)
+                rtl8168_free_irq(tp);
+
+        return rc;
+}
+
+static void
+rtl8168_set_rxbufsize(struct rtl8168_private *tp,
+                      struct net_device *dev)
+{
+        unsigned int mtu = dev->mtu;
+
+        tp->rx_buf_sz = (mtu > ETH_DATA_LEN) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE;
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_1 ... CFG_METHOD_26:
+                tp->rx_buf_sz += 1;
+                break;
+        default:
+                break;
+        }
+}
+
+static int rtl8168_alloc_tx_desc(struct rtl8168_private *tp)
+{
+        struct pci_dev *pdev = tp->pci_dev;
+        struct rtl8168_tx_ring *ring;
+        int i;
+
+        for (i = 0; i < tp->num_tx_rings; i++) {
+                ring = &tp->tx_ring[i];
+                ring->TxDescAllocSize = (ring->num_tx_desc + 1) * sizeof(struct TxDesc);
+                ring->TxDescArray = dma_alloc_coherent(&pdev->dev,
+                                                       ring->TxDescAllocSize,
+                                                       &ring->TxPhyAddr,
+                                                       GFP_KERNEL);
+
+                if (!ring->TxDescArray)
+                        return -1;
+        }
+
+        return 0;
+}
+
+static int rtl8168_alloc_rx_desc(struct rtl8168_private *tp)
+{
+        struct pci_dev *pdev = tp->pci_dev;
+
+        if (tp->InitRxDescType == RX_DESC_RING_TYPE_2)
+                tp->RxDescAllocSize = ((tp->num_rx_desc + 1) * tp->num_hw_tot_en_rx_rings)
+                                      * tp->RxDescLength;
+        else
+                tp->RxDescAllocSize = (tp->num_rx_desc + 1) * tp->RxDescLength;
+
+        tp->RxDescArray = dma_alloc_coherent(&pdev->dev, tp->RxDescAllocSize,
+                                             &tp->RxPhyAddr, GFP_KERNEL);
+        if (!tp->RxDescArray)
+                return -1;
+
+        return 0;
+}
+
+static void rtl8168_free_tx_desc(struct rtl8168_private *tp)
+{
+        struct rtl8168_tx_ring *ring;
+        struct pci_dev *pdev = tp->pci_dev;
+        int i;
+
+        for (i = 0; i < tp->num_tx_rings; i++) {
+                ring = &tp->tx_ring[i];
+                if (ring->TxDescArray) {
+                        dma_free_coherent(&pdev->dev,
+                                          ring->TxDescAllocSize,
+                                          ring->TxDescArray,
+                                          ring->TxPhyAddr);
+                        ring->TxDescArray = NULL;
+                }
+        }
+}
+
+static void rtl8168_free_rx_desc(struct rtl8168_private *tp)
+{
+        struct pci_dev *pdev = tp->pci_dev;
+
+        if (tp->RxDescArray) {
+                dma_free_coherent(&pdev->dev, tp->RxDescAllocSize, tp->RxDescArray,
+                                  tp->RxPhyAddr);
+                tp->RxDescArray = NULL;
+        }
+}
+
+static void rtl8168_free_alloc_resources(struct rtl8168_private *tp)
+{
+        rtl8168_free_rx_desc(tp);
+
+        rtl8168_free_tx_desc(tp);
+}
+
+#ifdef ENABLE_USE_FIRMWARE_FILE
+static void rtl8168_request_firmware(struct rtl8168_private *tp)
+{
+        struct rtl8168_fw *rtl_fw;
+
+        /* firmware loaded already or no firmware available */
+        if (tp->rtl_fw || !tp->fw_name)
+                return;
+
+        rtl_fw = kzalloc(sizeof(*rtl_fw), GFP_KERNEL);
+        if (!rtl_fw)
+                return;
+
+        rtl_fw->phy_write = rtl8168_mdio_write;
+        rtl_fw->phy_read = rtl8168_mdio_read;
+        rtl_fw->mac_mcu_write = mac_mcu_write;
+        rtl_fw->mac_mcu_read = mac_mcu_read;
+        rtl_fw->fw_name = tp->fw_name;
+        rtl_fw->dev = tp_to_dev(tp);
+
+        if (rtl8168_fw_request_firmware(rtl_fw))
+                kfree(rtl_fw);
+        else
+                tp->rtl_fw = rtl_fw;
+}
+#endif
+
+int rtl8168_open(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        struct pci_dev *pdev = tp->pci_dev;
+        int retval;
+
+        retval = -ENOMEM;
+
+#ifdef ENABLE_R8168_PROCFS
+        rtl8168_proc_init(dev);
+#endif
+        rtl8168_set_rxbufsize(tp, dev);
+        /*
+        * Rx and Tx descriptors needs 256 bytes alignment.
+        * pci_alloc_consistent provides more.
+        */
+        if (rtl8168_alloc_tx_desc(tp) < 0 || rtl8168_alloc_rx_desc(tp) < 0)
+                goto err_free_all_allocated_mem;
+
+        retval = rtl8168_init_ring(dev);
+        if (retval < 0)
+                goto err_free_all_allocated_mem;
+
+        retval = rtl8168_alloc_irq(tp);
+        if (retval<0)
+                goto err_free_all_allocated_mem;
+
+        if (netif_msg_probe(tp)) {
+                printk(KERN_INFO "%s: 0x%lx, "
+                       "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
+                       "IRQ %d\n",
+                       dev->name,
+                       dev->base_addr,
+                       dev->dev_addr[0], dev->dev_addr[1],
+                       dev->dev_addr[2], dev->dev_addr[3],
+                       dev->dev_addr[4], dev->dev_addr[5], dev->irq);
+        }
+
+#ifdef ENABLE_USE_FIRMWARE_FILE
+        rtl8168_request_firmware(tp);
+#endif
+        /*
+        #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
+                INIT_WORK(&tp->task, rtl8168_reset_task, dev);
+        #else
+                INIT_DELAYED_WORK(&tp->task, rtl8168_reset_task);
+        #endif
+        */
+        pci_set_master(pdev);
+
+#ifdef  CONFIG_R8168_NAPI
+        rtl8168_enable_napi(tp);
+#endif
+        rtl8168_exit_oob(dev);
+
+        rtl8168_hw_init(dev);
+
+        rtl8168_hw_reset(dev);
+
+        rtl8168_powerup_pll(dev);
+
+        rtl8168_hw_ephy_config(dev);
+
+        rtl8168_hw_phy_config(dev);
+
+        rtl8168_hw_config(dev);
+
+        rtl8168_dsm(dev, DSM_IF_UP);
+
+        clear_bit(R8168_FLAG_DOWN, tp->task_flags);
+
+        rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
+
+        if (tp->esd_flag == 0) {
+                //rtl8168_request_esd_timer(dev);
+                rtl8168_schedule_esd_work(tp);
+        }
+
+        //rtl8168_request_link_timer(dev);
+        rtl8168_schedule_linkchg_work(tp);
+
+out:
+
+        return retval;
+
+err_free_all_allocated_mem:
+        rtl8168_free_alloc_resources(tp);
+
+        goto out;
+}
+
+static void
+rtl8168_dsm(struct net_device *dev, int dev_state)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        switch (dev_state) {
+        case DSM_MAC_INIT:
+                if ((tp->mcfg == CFG_METHOD_5) || (tp->mcfg == CFG_METHOD_6)) {
+                        if (RTL_R8(tp, MACDBG) & 0x80)
+                                RTL_W8(tp, GPIO, RTL_R8(tp, GPIO) | GPIO_en);
+                        else
+                                RTL_W8(tp, GPIO, RTL_R8(tp, GPIO) & ~GPIO_en);
+                }
+
+                break;
+        case DSM_NIC_GOTO_D3:
+        case DSM_IF_DOWN:
+                if ((tp->mcfg == CFG_METHOD_5) || (tp->mcfg == CFG_METHOD_6)) {
+                        if (RTL_R8(tp, MACDBG) & 0x80)
+                                RTL_W8(tp, GPIO, RTL_R8(tp, GPIO) & ~GPIO_en);
+                }
+                break;
+
+        case DSM_NIC_RESUME_D3:
+        case DSM_IF_UP:
+                if ((tp->mcfg == CFG_METHOD_5) || (tp->mcfg == CFG_METHOD_6)) {
+                        if (RTL_R8(tp, MACDBG) & 0x80)
+                                RTL_W8(tp, GPIO, RTL_R8(tp, GPIO) | GPIO_en);
+                }
+
+                break;
+        }
+}
+
+static void
+set_offset70F(struct rtl8168_private *tp, u8 setting)
+{
+        u32 csi_tmp;
+        u32 temp = (u32)setting;
+        temp = temp << 24;
+        /*set PCI configuration space offset 0x70F to setting*/
+        /*When the register offset of PCI configuration space larger than 0xff, use CSI to access it.*/
+
+        csi_tmp = rtl8168_csi_read(tp, 0x70c) & 0x00ffffff;
+        rtl8168_csi_write(tp, 0x70c, csi_tmp | temp);
+}
+
+static void
+set_offset79(struct rtl8168_private *tp, u8 setting)
+{
+        //Set PCI configuration space offset 0x79 to setting
+
+        struct pci_dev *pdev = tp->pci_dev;
+        u8 device_control;
+
+        if (hwoptimize & HW_PATCH_SOC_LAN)
+                return;
+
+        pci_read_config_byte(pdev, 0x79, &device_control);
+        device_control &= ~0x70;
+        device_control |= setting;
+        pci_write_config_byte(pdev, 0x79, device_control);
+}
+
+static void
+set_offset711(struct rtl8168_private *tp, u8 setting)
+{
+        u32 csi_tmp;
+        u32 temp = (u32)setting;
+        temp &= 0x0f;
+        temp = temp << 12;
+        /*set PCI configuration space offset 0x711 to setting*/
+
+        csi_tmp = rtl8168_csi_read(tp, 0x710) & 0xffff0fff;
+        rtl8168_csi_write(tp, 0x710, csi_tmp | temp);
+}
+
+static void
+rtl8168_hw_set_rx_packet_filter(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u32 mc_filter[2];   /* Multicast hash filter */
+        int rx_mode;
+        u32 tmp = 0;
+
+        if (dev->flags & IFF_PROMISC) {
+                /* Unconditionally log net taps. */
+                if (netif_msg_link(tp))
+                        printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n",
+                               dev->name);
+
+                rx_mode =
+                        AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
+                        AcceptAllPhys;
+                mc_filter[1] = mc_filter[0] = 0xffffffff;
+        } else if ((netdev_mc_count(dev) > multicast_filter_limit)
+                   || (dev->flags & IFF_ALLMULTI)) {
+                /* Too many to filter perfectly -- accept all multicasts. */
+                rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
+                mc_filter[1] = mc_filter[0] = 0xffffffff;
+        } else {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35)
+                struct dev_mc_list *mclist;
+                unsigned int i;
+
+                rx_mode = AcceptBroadcast | AcceptMyPhys;
+                mc_filter[1] = mc_filter[0] = 0;
+                for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
+                     i++, mclist = mclist->next) {
+                        int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
+                        mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
+                        rx_mode |= AcceptMulticast;
+                }
+#else
+                struct netdev_hw_addr *ha;
+
+                rx_mode = AcceptBroadcast | AcceptMyPhys;
+                mc_filter[1] = mc_filter[0] = 0;
+                netdev_for_each_mc_addr(ha, dev) {
+                        int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
+                        mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
+                        rx_mode |= AcceptMulticast;
+                }
+#endif
+        }
+
+        if (dev->features & NETIF_F_RXALL)
+                rx_mode |= (AcceptErr | AcceptRunt);
+
+        tmp = mc_filter[0];
+        mc_filter[0] = swab32(mc_filter[1]);
+        mc_filter[1] = swab32(tmp);
+
+        tp->rtl8168_rx_config = rtl_chip_info[tp->chipset].RCR_Cfg;
+        switch (tp->mcfg) {
+        case CFG_METHOD_21 ... CFG_METHOD_35:
+                if (tp->EnableRss)
+                        tp->rtl8168_rx_config &= ~Rx_Single_fetch_V2;
+                else
+                        tp->rtl8168_rx_config |= Rx_Single_fetch_V2;
+                break;
+        default:
+                break;
+        }
+        if (tp->InitRxDescType == RX_DESC_RING_TYPE_2)
+                tp->rtl8168_rx_config |= RxCfg_rx_desc_v2_en;
+        tmp = tp->rtl8168_rx_config | rx_mode | (RTL_R32(tp, RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
+
+        RTL_W32(tp, RxConfig, tmp);
+        RTL_W32(tp, MAR0 + 0, mc_filter[0]);
+        RTL_W32(tp, MAR0 + 4, mc_filter[1]);
+}
+
+static void
+rtl8168_set_rx_mode(struct net_device *dev)
+{
+        rtl8168_hw_set_rx_packet_filter(dev);
+}
+
+void
+rtl8168_hw_config(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        struct pci_dev *pdev = tp->pci_dev;
+        u8 device_control;
+        u16 mac_ocp_data;
+        u32 csi_tmp;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+        if (dev->mtu > ETH_DATA_LEN) {
+                dev->features &= ~(NETIF_F_IP_CSUM);
+        } else {
+                dev->features |= NETIF_F_IP_CSUM;
+        }
+#endif
+        rtl8168_disable_rx_packet_filter(tp);
+
+        rtl8168_hw_reset(dev);
+
+        rtl8168_enable_cfg9346_write(tp);
+        if (tp->HwSuppAspmClkIntrLock) {
+                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7);
+                rtl8168_hw_aspm_clkreq_enable(tp, false);
+        }
+
+        rtl8168_set_eee_lpi_timer(tp);
+
+        //clear io_rdy_l23
+        switch (tp->mcfg) {
+        case CFG_METHOD_20:
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~BIT_1);
+                break;
+        }
+
+        //keep magic packet only
+        switch (tp->mcfg) {
+        case CFG_METHOD_16:
+        case CFG_METHOD_17:
+        case CFG_METHOD_18:
+        case CFG_METHOD_19:
+        case CFG_METHOD_20:
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                csi_tmp = rtl8168_eri_read(tp, 0xDE, 1, ERIAR_ExGMAC);
+                csi_tmp &= BIT_0;
+                rtl8168_eri_write(tp, 0xDE, 1, csi_tmp, ERIAR_ExGMAC);
+                break;
+        }
+
+        RTL_W8(tp, MTPS, Reserved1_data);
+
+        tp->cp_cmd |= INTT_1;
+        if (tp->use_timer_interrrupt)
+                tp->cp_cmd |= PktCntrDisable;
+        else
+                tp->cp_cmd &= ~PktCntrDisable;
+
+        RTL_W16(tp, IntrMitigate, 0x5f51);
+
+        rtl8168_tally_counter_addr_fill(tp);
+
+        rtl8168_desc_addr_fill(tp);
+
+        /* Set DMA burst size and Interframe Gap Time */
+        if (tp->mcfg == CFG_METHOD_1)
+                RTL_W32(tp, TxConfig, (TX_DMA_BURST_512 << TxDMAShift) |
+                        (InterFrameGap << TxInterFrameGapShift));
+        else
+                RTL_W32(tp, TxConfig, (TX_DMA_BURST_unlimited << TxDMAShift) |
+                        (InterFrameGap << TxInterFrameGapShift));
+
+        if (tp->mcfg == CFG_METHOD_4) {
+                set_offset70F(tp, 0x27);
+
+                RTL_W8(tp, DBG_reg, (0x0E << 4) | Fix_Nak_1 | Fix_Nak_2);
+
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
+
+                //disable clock request.
+                pci_write_config_byte(pdev, 0x81, 0x00);
+
+                if (dev->mtu > ETH_DATA_LEN) {
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
+
+                        set_offset79(tp, 0x20);
+                } else {
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
+
+                        set_offset79(tp, 0x50);
+                }
+
+                //rx checksum offload enable
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+                tp->cp_cmd |= RxChkSum;
+#else
+                dev->features |= NETIF_F_RXCSUM;
+#endif
+
+                tp->cp_cmd &= ~(EnableBist | Macdbgo_oe | Force_halfdup |
+                                Force_rxflow_en | Force_txflow_en | Cxpl_dbg_sel |
+                                ASF | PktCntrDisable | Macdbgo_sel);
+        } else if (tp->mcfg == CFG_METHOD_5) {
+
+                set_offset70F(tp, 0x27);
+
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
+
+                //disable clock request.
+                pci_write_config_byte(pdev, 0x81, 0x00);
+
+                if (dev->mtu > ETH_DATA_LEN) {
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
+
+                        set_offset79(tp, 0x20);
+                } else {
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
+
+                        set_offset79(tp, 0x50);
+                }
+
+                //rx checksum offload enable
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+                tp->cp_cmd |= RxChkSum;
+#else
+                dev->features |= NETIF_F_RXCSUM;
+#endif
+        } else if (tp->mcfg == CFG_METHOD_6) {
+                set_offset70F(tp, 0x27);
+
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
+
+                //disable clock request.
+                pci_write_config_byte(pdev, 0x81, 0x00);
+
+                if (dev->mtu > ETH_DATA_LEN) {
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
+
+                        set_offset79(tp, 0x20);
+                } else {
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
+
+                        set_offset79(tp, 0x50);
+                }
+
+                //rx checksum offload enable
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+                tp->cp_cmd |= RxChkSum;
+#else
+                dev->features |= NETIF_F_RXCSUM;
+#endif
+        } else if (tp->mcfg == CFG_METHOD_7) {
+                set_offset70F(tp, 0x27);
+
+                rtl8168_eri_write(tp, 0x1EC, 1, 0x07, ERIAR_ASF);
+
+                //disable clock request.
+                pci_write_config_byte(pdev, 0x81, 0x00);
+
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
+
+                if (dev->mtu > ETH_DATA_LEN) {
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
+
+                        set_offset79(tp, 0x20);
+                } else {
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
+
+
+                        set_offset79(tp, 0x50);
+                }
+        } else if (tp->mcfg == CFG_METHOD_8) {
+
+                set_offset70F(tp, 0x27);
+
+                rtl8168_eri_write(tp, 0x1EC, 1, 0x07, ERIAR_ASF);
+
+                //disable clock request.
+                pci_write_config_byte(pdev, 0x81, 0x00);
+
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
+
+                RTL_W8(tp, 0xD1, 0x20);
+
+                if (dev->mtu > ETH_DATA_LEN) {
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
+
+                        set_offset79(tp, 0x20);
+                } else {
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
+
+                        set_offset79(tp, 0x50);
+                }
+        } else if (tp->mcfg == CFG_METHOD_9) {
+                set_offset70F(tp, 0x27);
+
+                /* disable clock request. */
+                pci_write_config_byte(pdev, 0x81, 0x00);
+
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~BIT_4);
+                RTL_W8(tp, DBG_reg, RTL_R8(tp, DBG_reg) | BIT_7 | BIT_1);
+
+                if (dev->mtu > ETH_DATA_LEN) {
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
+
+                        set_offset79(tp, 0x20);
+                } else {
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
+
+                        set_offset79(tp, 0x50);
+                }
+
+                RTL_W8(tp, TDFNR, 0x8);
+
+        } else if (tp->mcfg == CFG_METHOD_10) {
+                set_offset70F(tp, 0x27);
+
+                RTL_W8(tp, DBG_reg, RTL_R8(tp, DBG_reg) | BIT_7 | BIT_1);
+
+                if (dev->mtu > ETH_DATA_LEN) {
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
+
+                        set_offset79(tp, 0x20);
+                } else {
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
+
+                        set_offset79(tp, 0x50);
+                }
+
+                RTL_W8(tp, TDFNR, 0x8);
+
+                RTL_W8(tp, Config1, RTL_R8(tp, Config1) | 0x10);
+
+                /* disable clock request. */
+                pci_write_config_byte(pdev, 0x81, 0x00);
+        } else if (tp->mcfg == CFG_METHOD_11 || tp->mcfg == CFG_METHOD_13) {
+                set_offset70F(tp, 0x27);
+                set_offset79(tp, 0x50);
+
+                if (dev->mtu > ETH_DATA_LEN)
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+                else
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+
+                pci_write_config_byte(pdev, 0x81, 0x00);
+
+                RTL_W8(tp, Config1, RTL_R8(tp, Config1) | 0x10);
+
+        } else if (tp->mcfg == CFG_METHOD_12) {
+                set_offset70F(tp, 0x27);
+                set_offset79(tp, 0x50);
+
+                if (dev->mtu > ETH_DATA_LEN)
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+                else
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+
+                pci_write_config_byte(pdev, 0x81, 0x01);
+
+                RTL_W8(tp, Config1, RTL_R8(tp, Config1) | 0x10);
+
+        } else if (tp->mcfg == CFG_METHOD_14 || tp->mcfg == CFG_METHOD_15) {
+
+                set_offset70F(tp, 0x27);
+                set_offset79(tp, 0x50);
+
+                if (dev->mtu > ETH_DATA_LEN) {
+                        RTL_W8(tp, MTPS, 0x24);
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | 0x01);
+                } else {
+                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~0x01);
+                }
+
+                RTL_W8(tp, 0xF3, RTL_R8(tp, 0xF3) | BIT_5);
+                RTL_W8(tp, 0xF3, RTL_R8(tp, 0xF3) & ~BIT_5);
+
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_7 | BIT_6);
+
+                RTL_W8(tp, 0xD1, RTL_R8(tp, 0xD1) | BIT_2 | BIT_3);
+
+                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_6 | BIT_5 | BIT_4 | BIT_2 | BIT_1);
+
+                RTL_W8(tp, TDFNR, 0x8);
+
+                /*
+                if (aspm)
+                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
+                */
+
+                RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_3);
+
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
+
+                RTL_W8(tp, Config1, RTL_R8(tp, Config1) & ~0x10);
+        } else if (tp->mcfg == CFG_METHOD_16 || tp->mcfg == CFG_METHOD_17) {
+                set_offset70F(tp, 0x27);
+                set_offset79(tp, 0x50);
+
+                rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xC8, 4, 0x00100002, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1D0, 4, ERIAR_ExGMAC);
+                csi_tmp |= BIT_1;
+                rtl8168_eri_write(tp, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
+
+                csi_tmp = rtl8168_eri_read(tp, 0xDC, 1, ERIAR_ExGMAC);
+                csi_tmp &= ~BIT_0;
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+                csi_tmp |= BIT_0;
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+
+                RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) | BIT_7);
+                RTL_W8(tp, 0xD3, RTL_R8(tp, 0xD3) & ~BIT_7);
+                RTL_W8(tp, 0x1B, RTL_R8(tp, 0x1B) & ~0x07);
+
+                if (tp->mcfg == CFG_METHOD_16) {
+                        RTL_W32(tp, 0xB0, 0xEE480010);
+                        RTL_W8(tp, 0x1A, RTL_R8(tp, 0x1A) & ~(BIT_2|BIT_3));
+                        rtl8168_eri_write(tp, 0x1DC, 1, 0x64, ERIAR_ExGMAC);
+                } else {
+                        csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
+                        csi_tmp |= BIT_4;
+                        rtl8168_eri_write(tp, 0x1B0, 1, csi_tmp, ERIAR_ExGMAC);
+                        rtl8168_eri_write(tp, 0xCC, 4, 0x00000050, ERIAR_ExGMAC);
+                        rtl8168_eri_write(tp, 0xD0, 4, 0x07ff0060, ERIAR_ExGMAC);
+                }
+
+                RTL_W8(tp, TDFNR, 0x8);
+
+                RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~PMSTS_En);
+
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_6);
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_6);
+
+                if (dev->mtu > ETH_DATA_LEN)
+                        RTL_W8(tp, MTPS, 0x27);
+
+                /* disable clock request. */
+                pci_write_config_byte(pdev, 0x81, 0x00);
+
+        } else if (tp->mcfg == CFG_METHOD_18 || tp->mcfg == CFG_METHOD_19) {
+                set_offset70F(tp, 0x27);
+                set_offset79(tp, 0x50);
+
+                rtl8168_eri_write(tp, 0xC8, 4, 0x00100002, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
+                RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) | BIT_7);
+                RTL_W8(tp, 0xD3, RTL_R8(tp, 0xD3) & ~BIT_7);
+                csi_tmp = rtl8168_eri_read(tp, 0xDC, 1, ERIAR_ExGMAC);
+                csi_tmp &= ~BIT_0;
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+                csi_tmp |= BIT_0;
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+
+                /*
+                if (aspm)
+                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
+                */
+
+                if (dev->mtu > ETH_DATA_LEN)
+                        RTL_W8(tp, MTPS, 0x27);
+
+                RTL_W8(tp, TDFNR, 0x8);
+
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_6);
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_6);
+
+                rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
+                RTL_W8(tp, 0x1B,RTL_R8(tp, 0x1B) & ~0x07);
+
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 1, ERIAR_ExGMAC);
+                csi_tmp |= BIT_4;
+                rtl8168_eri_write(tp, 0x1B0, 1, csi_tmp, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1d0, 1, ERIAR_ExGMAC);
+                csi_tmp |= BIT_4 | BIT_1;
+                rtl8168_eri_write(tp, 0x1d0, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xCC, 4, 0x00000050, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xd0, 4, 0x00000060, ERIAR_ExGMAC);
+        } else if (tp->mcfg == CFG_METHOD_20) {
+                set_offset70F(tp, 0x27);
+                set_offset79(tp, 0x50);
+
+                rtl8168_eri_write(tp, 0xC8, 4, 0x00100002, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
+                RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) | BIT_7);
+                RTL_W8(tp, 0xD3, RTL_R8(tp, 0xD3) & ~BIT_7);
+                csi_tmp = rtl8168_eri_read(tp, 0xDC, 1, ERIAR_ExGMAC);
+                csi_tmp &= ~BIT_0;
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+                csi_tmp |= BIT_0;
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+
+                /*
+                if (aspm)
+                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
+                */
+
+                if (dev->mtu > ETH_DATA_LEN)
+                        RTL_W8(tp, MTPS, 0x27);
+
+                RTL_W8(tp, TDFNR, 0x8);
+
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_6);
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_6);
+                rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
+
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 1, ERIAR_ExGMAC);
+                csi_tmp |= BIT_4;
+                rtl8168_eri_write(tp, 0x1B0, 1, csi_tmp, ERIAR_ExGMAC);
+                csi_tmp = rtl8168_eri_read(tp, 0x1d0, 1, ERIAR_ExGMAC);
+                csi_tmp |= BIT_4 | BIT_1;
+                rtl8168_eri_write(tp, 0x1d0, 1, csi_tmp, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xCC, 4, 0x00000050, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xd0, 4, 0x00000060, ERIAR_ExGMAC);
+        } else if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
+                   tp->mcfg == CFG_METHOD_24 || tp->mcfg == CFG_METHOD_25 ||
+                   tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_29 ||
+                   tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_35 ||
+                   tp->mcfg == CFG_METHOD_36 || tp->mcfg == CFG_METHOD_37) {
+                set_offset70F(tp, 0x27);
+                set_offset79(tp, 0x50);
+                if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22)
+                        set_offset711(tp, 0x04);
+
+                rtl8168_eri_write(tp, 0xC8, 4, 0x00080002, ERIAR_ExGMAC);
+#ifdef ENABLE_LIB_SUPPORT
+                rtl8168_eri_write(tp, 0xCC, 1, 0x60, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xD0, 1, 0x70, ERIAR_ExGMAC);
+#else
+                rtl8168_eri_write(tp, 0xCC, 1, 0x38, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xD0, 1, 0x48, ERIAR_ExGMAC);
+#endif //ENABLE_LIB_SUPPORT
+                rtl8168_eri_write(tp, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
+
+                RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) | BIT_7);
+
+                csi_tmp = rtl8168_eri_read(tp, 0xDC, 1, ERIAR_ExGMAC);
+                csi_tmp &= ~BIT_0;
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+                csi_tmp |= BIT_0;
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+
+                if (tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36)
+                        rtl8168_set_mcu_ocp_bit(tp, 0xD438, (BIT_1 | BIT_0));
+
+                if (tp->mcfg == CFG_METHOD_26) {
+                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3C0);
+                        mac_ocp_data &= ~(BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
+                        mac_ocp_data |= 0x0FFF;
+                        rtl8168_mac_ocp_write(tp, 0xD3C0, mac_ocp_data);
+                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3C2);
+                        mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
+                        rtl8168_mac_ocp_write(tp, 0xD3C2, mac_ocp_data);
+                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3C4);
+                        mac_ocp_data |= BIT_0;
+                        rtl8168_mac_ocp_write(tp, 0xD3C4, mac_ocp_data);
+                } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+                           tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
+                           tp->mcfg == CFG_METHOD_37) {
+
+                        if (tp->RequireAdjustUpsTxLinkPulseTiming) {
+                                mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD412);
+                                mac_ocp_data &= ~(0x0FFF);
+                                mac_ocp_data |= tp->SwrCnt1msIni;
+                                rtl8168_mac_ocp_write(tp, 0xD412, mac_ocp_data);
+                        }
+
+                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE056);
+                        mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4);
+                        //mac_ocp_data |= (BIT_6 | BIT_5 | BIT_4);
+                        rtl8168_mac_ocp_write(tp, 0xE056, mac_ocp_data);
+
+                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE052);
+                        mac_ocp_data &= ~(BIT_15 | BIT_14 | BIT_13 | BIT_3);
+                        mac_ocp_data |= BIT_15;
+                        //mac_ocp_data |= BIT_3;
+                        rtl8168_mac_ocp_write(tp, 0xE052, mac_ocp_data);
+
+                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD420);
+                        mac_ocp_data &= ~(BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
+                        mac_ocp_data |= 0x45F;
+                        rtl8168_mac_ocp_write(tp, 0xD420, mac_ocp_data);
+
+                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE0D6);
+                        mac_ocp_data &= ~(BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
+                        mac_ocp_data |= 0x17F;
+                        rtl8168_mac_ocp_write(tp, 0xE0D6, mac_ocp_data);
+                }
+
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
+
+                RTL_W8(tp, 0x1B, RTL_R8(tp, 0x1B) & ~0x07);
+
+                RTL_W8(tp, TDFNR, 0x4);
+
+                RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~PMSTS_En);
+
+                /*
+                if (aspm)
+                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
+                */
+
+                if (dev->mtu > ETH_DATA_LEN)
+                        RTL_W8(tp, MTPS, 0x27);
+
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_6);
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_6);
+
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_7);
+
+                rtl8168_eri_write(tp, RSS_CTRL_8168, 4, 0x00000000, ERIAR_ExGMAC);
+
+                if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+                    tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
+                    tp->mcfg == CFG_METHOD_37) {
+                        rtl8168_mac_ocp_write(tp, 0xE054, 0x0000);
+
+                        rtl8168_eri_write(tp, 0x5F0, 2, 0x4000, ERIAR_ExGMAC);
+                } else {
+                        rtl8168_eri_write(tp, 0x5F0, 2, 0x4F87, ERIAR_ExGMAC);
+                }
+
+                if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+                    tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
+                    tp->mcfg == CFG_METHOD_37) {
+                        csi_tmp = rtl8168_eri_read(tp, 0xDC, 4, ERIAR_ExGMAC);
+                        csi_tmp |= (BIT_2 | BIT_3 | BIT_4);
+                        rtl8168_eri_write(tp, 0xDC, 4, csi_tmp, ERIAR_ExGMAC);
+                }
+
+                if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
+                    tp->mcfg == CFG_METHOD_24 || tp->mcfg == CFG_METHOD_25) {
+                        rtl8168_mac_ocp_write(tp, 0xC140, 0xFFFF);
+                } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+                           tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
+                           tp->mcfg == CFG_METHOD_37) {
+                        rtl8168_mac_ocp_write(tp, 0xC140, 0xFFFF);
+                        rtl8168_mac_ocp_write(tp, 0xC142, 0xFFFF);
+                }
+
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
+                csi_tmp &= ~BIT_12;
+                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
+
+                if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
+                    tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
+                    tp->mcfg == CFG_METHOD_37) {
+                        csi_tmp = rtl8168_eri_read(tp, 0x2FC, 1, ERIAR_ExGMAC);
+                        csi_tmp &= ~(BIT_2);
+                        rtl8168_eri_write(tp, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
+                } else {
+                        csi_tmp = rtl8168_eri_read(tp, 0x2FC, 1, ERIAR_ExGMAC);
+                        csi_tmp &= ~(BIT_0 | BIT_1 | BIT_2);
+                        csi_tmp |= BIT_0;
+                        rtl8168_eri_write(tp, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
+                }
+
+                if (tp->mcfg != CFG_METHOD_37) {
+                        csi_tmp = rtl8168_eri_read(tp, 0x1D0, 1, ERIAR_ExGMAC);
+                        csi_tmp |= BIT_1;
+                        rtl8168_eri_write(tp, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
+                }
+        } else if (tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_27 ||
+                   tp->mcfg == CFG_METHOD_28) {
+                set_offset70F(tp, 0x27);
+                set_offset79(tp, 0x50);
+
+                rtl8168_eri_write(tp, 0xC8, 4, 0x00080002, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xCC, 1, 0x2F, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xD0, 1, 0x5F, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
+
+                RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) | BIT_7);
+
+                csi_tmp = rtl8168_eri_read(tp, 0xDC, 1, ERIAR_ExGMAC);
+                csi_tmp &= ~BIT_0;
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+                csi_tmp |= BIT_0;
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
+
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_6);
+                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_6);
+
+                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_7);
+
+                rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
+                RTL_W8(tp, 0x1B, RTL_R8(tp, 0x1B) & ~0x07);
+
+                RTL_W8(tp, TDFNR, 0x4);
+
+                /*
+                if (aspm)
+                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
+                */
+
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
+                csi_tmp &= ~BIT_12;
+                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
+
+                csi_tmp = rtl8168_eri_read(tp, 0x2FC, 1, ERIAR_ExGMAC);
+                csi_tmp &= ~(BIT_0 | BIT_1 | BIT_2);
+                csi_tmp |= (BIT_0 | BIT_1);
+                rtl8168_eri_write(tp, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
+
+                csi_tmp = rtl8168_eri_read(tp, 0x1D0, 1, ERIAR_ExGMAC);
+                csi_tmp |= BIT_1;
+                rtl8168_eri_write(tp, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
+
+                if (dev->mtu > ETH_DATA_LEN)
+                        RTL_W8(tp, MTPS, 0x27);
+
+                if (tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28) {
+                        rtl8168_oob_mutex_lock(tp);
+                        rtl8168_eri_write(tp, 0x5F0, 2, 0x4F87, ERIAR_ExGMAC);
+                        rtl8168_oob_mutex_unlock(tp);
+                }
+
+                rtl8168_mac_ocp_write(tp, 0xC140, 0xFFFF);
+                rtl8168_mac_ocp_write(tp, 0xC142, 0xFFFF);
+
+                if (tp->mcfg == CFG_METHOD_28) {
+                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3E2);
+                        mac_ocp_data &= 0xF000;
+                        mac_ocp_data |= 0xAFD;
+                        rtl8168_mac_ocp_write(tp, 0xD3E2, mac_ocp_data);
+
+                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3E4);
+                        mac_ocp_data &= 0xFF00;
+                        rtl8168_mac_ocp_write(tp, 0xD3E4, mac_ocp_data);
+
+                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE860);
+                        mac_ocp_data |= BIT_7;
+                        rtl8168_mac_ocp_write(tp, 0xE860, mac_ocp_data);
+                }
+        } else if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
+                   tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) {
+                set_offset70F(tp, 0x27);
+                set_offset79(tp, 0x50);
+
+                rtl8168_eri_write(tp, 0xC8, 4, 0x00080002, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xCC, 1, 0x2F, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xD0, 1, 0x5F, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
+
+                RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) | BIT_7);
+
+                csi_tmp = rtl8168_eri_read(tp, 0xDC, 1, ERIAR_ExGMAC);
+                csi_tmp &= ~BIT_0;
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+                csi_tmp |= BIT_0;
+                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
+
+                if (tp->RequireAdjustUpsTxLinkPulseTiming) {
+                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD412);
+                        mac_ocp_data &= ~(0x0FFF);
+                        mac_ocp_data |= tp->SwrCnt1msIni;
+                        rtl8168_mac_ocp_write(tp, 0xD412, mac_ocp_data);
+                }
+
+                mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE056);
+                mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4);
+                if (tp->HwPkgDet == 0x0F)
+                        mac_ocp_data |= (BIT_6 | BIT_5 | BIT_4);
+                rtl8168_mac_ocp_write(tp, 0xE056, mac_ocp_data);
+                if (tp->HwPkgDet == 0x0F)
+                        rtl8168_mac_ocp_write(tp, 0xEA80, 0x0003);
+                else
+                        rtl8168_mac_ocp_write(tp, 0xEA80, 0x0000);
+
+                rtl8168_oob_mutex_lock(tp);
+                mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE052);
+                mac_ocp_data &= ~(BIT_3 | BIT_0);
+                if (tp->HwPkgDet == 0x0F)
+                        mac_ocp_data |= BIT_0;
+                rtl8168_mac_ocp_write(tp, 0xE052, mac_ocp_data);
+                rtl8168_oob_mutex_unlock(tp);
+
+                mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD420);
+                mac_ocp_data &= ~(BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
+                mac_ocp_data |= 0x45F;
+                rtl8168_mac_ocp_write(tp, 0xD420, mac_ocp_data);
+
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
+
+                RTL_W8(tp, 0x1B, RTL_R8(tp, 0x1B) & ~0x07);
+
+                RTL_W8(tp, TDFNR, 0x4);
+
+                RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~PMSTS_En);
+
+                /*
+                if (aspm)
+                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
+                */
+
+                if (dev->mtu > ETH_DATA_LEN)
+                        RTL_W8(tp, MTPS, 0x27);
+
+                if (FALSE == HW_SUPP_SERDES_PHY(tp)) {
+                        RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_6);
+                        RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_6);
+                        RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_7);
+                } else {
+                        RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_6);
+                        RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_6);
+                        RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_7);
+                }
+
+                rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
+                rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
+
+                rtl8168_oob_mutex_lock(tp);
+                if (tp->HwPkgDet == 0x0F)
+                        rtl8168_eri_write(tp, 0x5F0, 2, 0x4F00, ERIAR_ExGMAC);
+                else
+                        rtl8168_eri_write(tp, 0x5F0, 2, 0x4000, ERIAR_ExGMAC);
+                rtl8168_oob_mutex_unlock(tp);
+
+                csi_tmp = rtl8168_eri_read(tp, 0xDC, 4, ERIAR_ExGMAC);
+                csi_tmp |= (BIT_2 | BIT_3);
+                rtl8168_eri_write(tp, 0xDC, 4, csi_tmp, ERIAR_ExGMAC);
+
+                if (tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33 ||
+                    tp->mcfg == CFG_METHOD_34) {
+                        csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
+                        csi_tmp |= BIT_4;
+                        rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
+                }
+
+                rtl8168_mac_ocp_write(tp, 0xC140, 0xFFFF);
+                rtl8168_mac_ocp_write(tp, 0xC142, 0xFFFF);
+
+                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
+                csi_tmp &= ~BIT_12;
+                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
+
+                csi_tmp = rtl8168_eri_read(tp, 0x2FC, 1, ERIAR_ExGMAC);
+                csi_tmp &= ~(BIT_0 | BIT_1);
+                csi_tmp |= BIT_0;
+                rtl8168_eri_write(tp, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
+
+                csi_tmp = rtl8168_eri_read(tp, 0x1D0, 1, ERIAR_ExGMAC);
+                csi_tmp &= ~BIT_1;
+                rtl8168_eri_write(tp, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
+        } else if (tp->mcfg == CFG_METHOD_1) {
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
+
+                if (dev->mtu > ETH_DATA_LEN) {
+                        pci_read_config_byte(pdev, 0x69, &device_control);
+                        device_control &= ~0x70;
+                        device_control |= 0x28;
+                        pci_write_config_byte(pdev, 0x69, device_control);
+                } else {
+                        pci_read_config_byte(pdev, 0x69, &device_control);
+                        device_control &= ~0x70;
+                        device_control |= 0x58;
+                        pci_write_config_byte(pdev, 0x69, device_control);
+                }
+        } else if (tp->mcfg == CFG_METHOD_2) {
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
+
+                if (dev->mtu > ETH_DATA_LEN) {
+                        pci_read_config_byte(pdev, 0x69, &device_control);
+                        device_control &= ~0x70;
+                        device_control |= 0x28;
+                        pci_write_config_byte(pdev, 0x69, device_control);
+
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | (1 << 0));
+                } else {
+                        pci_read_config_byte(pdev, 0x69, &device_control);
+                        device_control &= ~0x70;
+                        device_control |= 0x58;
+                        pci_write_config_byte(pdev, 0x69, device_control);
+
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~(1 << 0));
+                }
+        } else if (tp->mcfg == CFG_METHOD_3) {
+                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
+
+                if (dev->mtu > ETH_DATA_LEN) {
+                        pci_read_config_byte(pdev, 0x69, &device_control);
+                        device_control &= ~0x70;
+                        device_control |= 0x28;
+                        pci_write_config_byte(pdev, 0x69, device_control);
+
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | (1 << 0));
+                } else {
+                        pci_read_config_byte(pdev, 0x69, &device_control);
+                        device_control &= ~0x70;
+                        device_control |= 0x58;
+                        pci_write_config_byte(pdev, 0x69, device_control);
+
+                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~(1 << 0));
+                }
+        }
+
+        if ((tp->mcfg == CFG_METHOD_1) || (tp->mcfg == CFG_METHOD_2) || (tp->mcfg == CFG_METHOD_3)) {
+                /* csum offload command for RTL8168B/8111B */
+                tp->tx_tcp_csum_cmd = TxTCPCS;
+                tp->tx_udp_csum_cmd = TxUDPCS;
+                tp->tx_ip_csum_cmd = TxIPCS;
+                tp->tx_ipv6_csum_cmd = 0;
+        } else {
+                /* csum offload command for RTL8168C/8111C and RTL8168CP/8111CP */
+                tp->tx_tcp_csum_cmd = TxTCPCS_C;
+                tp->tx_udp_csum_cmd = TxUDPCS_C;
+                tp->tx_ip_csum_cmd = TxIPCS_C;
+                tp->tx_ipv6_csum_cmd = TxIPV6F_C;
+        }
+
+
+        //other hw parameters
+        if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
+            tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_24 ||
+            tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
+            tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28)
+                rtl8168_eri_write(tp, 0x2F8, 2, 0x1D8F, ERIAR_ExGMAC);
+
+        if (tp->bios_setting & BIT_28) {
+                if (tp->mcfg == CFG_METHOD_18 || tp->mcfg == CFG_METHOD_19 ||
+                    tp->mcfg == CFG_METHOD_20) {
+                        u32 gphy_val;
+
+                        rtl8168_mdio_write(tp, 0x1F, 0x0007);
+                        rtl8168_mdio_write(tp, 0x1E, 0x002C);
+                        gphy_val = rtl8168_mdio_read(tp, 0x16);
+                        gphy_val |= BIT_10;
+                        rtl8168_mdio_write(tp, 0x16, gphy_val);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
+                        rtl8168_mdio_write(tp, 0x05, 0x8B80);
+                        gphy_val = rtl8168_mdio_read(tp, 0x06);
+                        gphy_val |= BIT_7;
+                        rtl8168_mdio_write(tp, 0x06, gphy_val);
+                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
+                }
+        }
+
+        rtl8168_set_rx_q_num(tp, tp->num_hw_tot_en_rx_rings);
+
+        rtl8168_set_rx_vlan_filter(tp);
+#ifdef ENABLE_RSS_SUPPORT
+#ifdef ENABLE_LIB_SUPPORT
+        /* if lib queue not exist, default use rx queue 0 */
+        if (rtl8168_num_lib_rx_rings(tp) == 0)
+                memset(tp->rss_indir_tbl, 0x0, sizeof(tp->rss_indir_tbl));
+#endif //ENABLE_LIB_SUPPORT
+        rtl8168_config_rss(tp);
+#endif //ENABLE_RSS_SUPPORT
+        rtl8168_hw_clear_timer_int(dev);
+
+        rtl8168_enable_exit_l1_mask(tp);
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_25:
+                rtl8168_mac_ocp_write(tp, 0xD3C0, 0x0B00);
+                rtl8168_mac_ocp_write(tp, 0xD3C2, 0x0000);
+                break;
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                rtl8168_mac_ocp_write(tp, 0xE098, 0x0AA2);
+                break;
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+                rtl8168_mac_ocp_write(tp, 0xE098, 0xC302);
+                break;
+        }
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_23:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                rtl8168_disable_pci_offset_99(tp);
+                if (aspm) {
+                        if (tp->org_pci_offset_99 & (BIT_2 | BIT_5 | BIT_6))
+                                rtl8168_init_pci_offset_99(tp);
+                }
+                break;
+        }
+        switch (tp->mcfg) {
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26:
+        case CFG_METHOD_27:
+        case CFG_METHOD_28:
+        case CFG_METHOD_29:
+        case CFG_METHOD_30:
+        case CFG_METHOD_31:
+        case CFG_METHOD_32:
+        case CFG_METHOD_33:
+        case CFG_METHOD_34:
+        case CFG_METHOD_35:
+        case CFG_METHOD_36:
+        case CFG_METHOD_37:
+                rtl8168_disable_pci_offset_180(tp);
+                if (aspm) {
+                        if (tp->org_pci_offset_180 & (BIT_0|BIT_1))
+                                rtl8168_init_pci_offset_180(tp);
+                }
+                break;
+        }
+
+        tp->cp_cmd &= ~(EnableBist | Macdbgo_oe | Force_halfdup |
+                        Force_rxflow_en | Force_txflow_en | Cxpl_dbg_sel |
+                        ASF | Macdbgo_sel);
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
+        RTL_W16(tp, CPlusCmd, tp->cp_cmd);
+#else
+        rtl8168_hw_set_features(dev, dev->features);
+#endif
+
+        switch (tp->mcfg) {
+        case CFG_METHOD_16:
+        case CFG_METHOD_17:
+        case CFG_METHOD_18:
+        case CFG_METHOD_19:
+        case CFG_METHOD_20:
+        case CFG_METHOD_21:
+        case CFG_METHOD_22:
+        case CFG_METHOD_24:
+        case CFG_METHOD_25:
+        case CFG_METHOD_26: {
+                int timeout;
+                for (timeout = 0; timeout < 10; timeout++) {
+                        if ((rtl8168_eri_read(tp, 0x1AE, 2, ERIAR_ExGMAC) & BIT_13)==0)
+                                break;
+                        mdelay(1);
+                }
+        }
+        break;
+        }
+
+        RTL_W16(tp, RxMaxSize, tp->rx_buf_sz);
+
+        rtl8168_disable_rxdvgate(dev);
+
+        if (tp->mcfg == CFG_METHOD_11 || tp->mcfg == CFG_METHOD_12)
+                rtl8168_mac_loopback_test(tp);
+
+        if (!tp->pci_cfg_is_read) {
+                pci_read_config_byte(pdev, PCI_COMMAND, &tp->pci_cfg_space.cmd);
+                pci_read_config_word(pdev, PCI_BASE_ADDRESS_0, &tp->pci_cfg_space.io_base_l);
+                pci_read_config_word(pdev, PCI_BASE_ADDRESS_0 + 2, &tp->pci_cfg_space.io_base_h);
+                pci_read_config_word(pdev, PCI_BASE_ADDRESS_2, &tp->pci_cfg_space.mem_base_l);
+                pci_read_config_word(pdev, PCI_BASE_ADDRESS_2 + 2, &tp->pci_cfg_space.mem_base_h);
+                pci_read_config_word(pdev, PCI_BASE_ADDRESS_3, &tp->pci_cfg_space.resv_0x1c_l);
+                pci_read_config_word(pdev, PCI_BASE_ADDRESS_3 + 2, &tp->pci_cfg_space.resv_0x1c_h);
+                pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &tp->pci_cfg_space.ilr);
+                pci_read_config_word(pdev, PCI_BASE_ADDRESS_4, &tp->pci_cfg_space.resv_0x20_l);
+                pci_read_config_word(pdev, PCI_BASE_ADDRESS_4 + 2, &tp->pci_cfg_space.resv_0x20_h);
+                pci_read_config_word(pdev, PCI_BASE_ADDRESS_5, &tp->pci_cfg_space.resv_0x24_l);
+                pci_read_config_word(pdev, PCI_BASE_ADDRESS_5 + 2, &tp->pci_cfg_space.resv_0x24_h);
+                pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &tp->pci_cfg_space.resv_0x2c_l);
+                pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID + 2, &tp->pci_cfg_space.resv_0x2c_h);
+                if (tp->HwPcieSNOffset > 0) {
+                        tp->pci_cfg_space.pci_sn_l = rtl8168_csi_read(tp, tp->HwPcieSNOffset);
+                        tp->pci_cfg_space.pci_sn_h = rtl8168_csi_read(tp, tp->HwPcieSNOffset + 4);
+                }
+
+                tp->pci_cfg_is_read = 1;
+        }
+
+        rtl8168_dsm(dev, DSM_MAC_INIT);
+
+        /* Set Rx packet filter */
+        rtl8168_hw_set_rx_packet_filter(dev);
+
+#ifdef ENABLE_DASH_SUPPORT
+        if (tp->DASH && !tp->dash_printer_enabled)
+                NICChkTypeEnableDashInterrupt(tp);
+#endif
+
+        if (tp->HwSuppAspmClkIntrLock)
+                rtl8168_hw_aspm_clkreq_enable(tp, true);
+
+        rtl8168_disable_cfg9346_write(tp);
+
+        udelay(10);
+}
+
+void
+rtl8168_hw_start(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+#ifdef ENABLE_LIB_SUPPORT
+        rtl8168_init_lib_ring(tp);
+#endif
+
+        RTL_W8(tp, ChipCmd, CmdTxEnb | CmdRxEnb);
+
+        rtl8168_enable_interrupt(tp);
+
+        rtl8168_lib_reset_complete(tp);
+}
+
+static int
+rtl8168_change_mtu(struct net_device *dev,
+                   int new_mtu)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int ret = 0;
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0)
+        if (new_mtu < ETH_MIN_MTU)
+                return -EINVAL;
+        else if (new_mtu > tp->max_jumbo_frame_size)
+                new_mtu = tp->max_jumbo_frame_size;
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0)
+
+        dev->mtu = new_mtu;
+
+        tp->eee.tx_lpi_timer = dev->mtu + ETH_HLEN + 0x20;
+
+        if (!netif_running(dev))
+                goto out;
+
+        rtl8168_down(dev);
+
+        rtl8168_set_rxbufsize(tp, dev);
+
+        ret = rtl8168_init_ring(dev);
+
+        if (ret < 0)
+                goto err_out;
+
+#ifdef CONFIG_R8168_NAPI
+        rtl8168_enable_napi(tp);
+#endif//CONFIG_R8168_NAPI
+
+        if (tp->link_ok(dev))
+                rtl8168_link_on_patch(dev);
+        else
+                rtl8168_link_down_patch(dev);
+
+        //mod_timer(&tp->esd_timer, jiffies + RTL8168_ESD_TIMEOUT);
+        //mod_timer(&tp->link_timer, jiffies + RTL8168_LINK_TIMEOUT);
+out:
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)
+        netdev_update_features(dev);
+#endif
+
+err_out:
+        return ret;
+}
+
+static inline void
+rtl8168_make_unusable_by_asic(struct RxDesc *desc)
+{
+        desc->addr = 0x0badbadbadbadbadull;
+        desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
+}
+
+static void
+rtl8168_free_rx_skb(struct rtl8168_private *tp,
+                    struct rtl8168_rx_ring *ring,
+                    struct sk_buff **sk_buff,
+                    struct RxDesc *desc,
+                    const u32 cur_rx)
+{
+        struct pci_dev *pdev = tp->pci_dev;
+
+        dma_unmap_single(&pdev->dev, ring->RxDescPhyAddr[cur_rx], tp->rx_buf_sz,
+                         DMA_FROM_DEVICE);
+        dev_kfree_skb(*sk_buff);
+        *sk_buff = NULL;
+        rtl8168_make_unusable_by_asic(desc);
+}
+
+void
+rtl8168_mark_to_asic(struct RxDesc *desc,
+                     u32 rx_buf_sz)
+{
+        u32 eor = le32_to_cpu(desc->opts1) & RingEnd;
+
+        WRITE_ONCE(desc->opts1, cpu_to_le32(DescOwn | eor | rx_buf_sz));
+}
+
+static inline void
+rtl8168_map_to_asic(struct RxDesc *desc,
+                    struct rtl8168_rx_ring *ring,
+                    dma_addr_t mapping,
+                    u32 rx_buf_sz,
+                    const u32 cur_rx)
+{
+        ring->RxDescPhyAddr[cur_rx] = mapping;
+        desc->addr = cpu_to_le64(mapping);
+        wmb();
+        rtl8168_mark_to_asic(desc, rx_buf_sz);
+}
+
+static int
+rtl8168_alloc_rx_skb(struct rtl8168_private *tp,
+                     struct rtl8168_rx_ring *ring,
+                     struct sk_buff **sk_buff,
+                     struct RxDesc *desc,
+                     int rx_buf_sz,
+                     const u32 cur_rx,
+                     u8 in_intr)
+{
+        struct sk_buff *skb;
+        dma_addr_t mapping;
+        int ret = 0;
+
+        if (in_intr)
+                skb = RTL_ALLOC_SKB_INTR(&tp->r8168napi[ring->index].napi,
+                                         rx_buf_sz + RTK_RX_ALIGN);
+        else
+                skb = dev_alloc_skb(rx_buf_sz + RTK_RX_ALIGN);
+
+        if (unlikely(!skb))
+                goto err_out;
+
+        if (!in_intr || !R8168_USE_NAPI_ALLOC_SKB)
+                skb_reserve(skb, RTK_RX_ALIGN);
+
+        mapping = dma_map_single(tp_to_dev(tp), skb->data, rx_buf_sz,
+                                 DMA_FROM_DEVICE);
+        if (unlikely(dma_mapping_error(tp_to_dev(tp), mapping))) {
+                if (unlikely(net_ratelimit()))
+                        netif_err(tp, drv, tp->dev, "Failed to map RX DMA!\n");
+                goto err_out;
+        }
+
+        *sk_buff = skb;
+        rtl8168_map_to_asic(desc, ring, mapping, rx_buf_sz, cur_rx);
+out:
+        return ret;
+
+err_out:
+        if (skb)
+                dev_kfree_skb(skb);
+        ret = -ENOMEM;
+        rtl8168_make_unusable_by_asic(desc);
+        goto out;
+}
+
+static void
+_rtl8168_rx_clear(struct rtl8168_private *tp, struct rtl8168_rx_ring *ring)
+{
+        int i;
+
+        for (i = 0; i < tp->num_rx_desc; i++) {
+                if (ring->Rx_skbuff[i]) {
+                        rtl8168_free_rx_skb(tp,
+                                            ring,
+                                            ring->Rx_skbuff + i,
+                                            rtl8168_get_rxdesc(tp,
+                                                               tp->RxDescArray,
+                                                               i,
+                                                               ring->index),
+                                            i);
+                        ring->Rx_skbuff[i] = NULL;
+                }
+        }
+}
+
+void
+rtl8168_rx_clear(struct rtl8168_private *tp)
+{
+        int i;
+
+        for (i = 0; i < tp->num_rx_rings; i++)
+                _rtl8168_rx_clear(tp, &tp->rx_ring[i]);
+}
+
+static u32
+rtl8168_rx_fill(struct rtl8168_private *tp,
+                struct rtl8168_rx_ring *ring,
+                struct net_device *dev,
+                u32 start,
+                u32 end,
+                u8 in_intr)
+{
+        u32 cur;
+
+        for (cur = start; end - cur > 0; cur++) {
+                int ret, i = cur % tp->num_rx_desc;
+
+                if (ring->Rx_skbuff[i])
+                        continue;
+
+                ret = rtl8168_alloc_rx_skb(tp,
+                                           ring,
+                                           ring->Rx_skbuff + i,
+                                           rtl8168_get_rxdesc(tp,
+                                                           tp->RxDescArray,
+                                                           i, ring->index),
+                                           tp->rx_buf_sz,
+                                           i,
+                                           in_intr);
+                if (ret < 0)
+                        break;
+        }
+        return cur - start;
+}
+
+static inline void
+rtl8168_mark_as_last_descriptor(struct RxDesc *desc)
+{
+        desc->opts1 |= cpu_to_le32(RingEnd);
+}
+
+static void
+rtl8168_desc_addr_fill(struct rtl8168_private *tp)
+{
+        int i;
+
+        for (i = 0; i < tp->num_tx_rings; i++) {
+                struct rtl8168_tx_ring *ring = &tp->tx_ring[i];
+                RTL_W32(tp, ring->tdsar_reg, ((u64)ring->TxPhyAddr & DMA_BIT_MASK(32)));
+                RTL_W32(tp, ring->tdsar_reg + 4, ((u64)ring->TxPhyAddr >> 32));
+        }
+
+#ifdef ENABLE_LIB_SUPPORT
+        /*
+         * The lib tx q1 polling may be set after tx is disabled. If lib tx q1
+         * is released, after enable tx, device will try to access invalid tx q1
+         * desc base address. Set tx q1 desc base address to tx q0 desc base
+         * address to let device to access the valid address and clear tx q1
+         * polling bit after enable tx.
+         */
+        if (rtl8168_lib_tx_ring_released(tp)) {
+                struct rtl8168_tx_ring *ring = &tp->tx_ring[0];
+                u16 tdsar_reg = TxHDescStartAddrLow;
+                RTL_W32(tp, tdsar_reg, ((u64)ring->TxPhyAddr & DMA_BIT_MASK(32)));
+                RTL_W32(tp, tdsar_reg + 4, ((u64)ring->TxPhyAddr >> 32));
+        }
+#endif
+
+        RTL_W32(tp, RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_BIT_MASK(32)));
+        RTL_W32(tp, RxDescAddrLow + 4, ((u64) tp->RxPhyAddr >> 32));
+}
+
+static void
+rtl8168_tx_desc_init(struct rtl8168_private *tp)
+{
+        int i;
+
+        for (i = 0; i < tp->num_tx_rings; i++) {
+                struct rtl8168_tx_ring *ring = &tp->tx_ring[i];
+                memset(ring->TxDescArray, 0x0, ring->TxDescAllocSize);
+
+                ring->TxDescArray[ring->num_tx_desc - 1].opts1 = cpu_to_le32(RingEnd);
+        }
+}
+
+static void
+rtl8168_rx_desc_offset0_init(struct rtl8168_private *tp, int own)
+{
+        struct rtl8168_rx_ring *ring = &tp->rx_ring[0];
+        struct RxDesc *desc;
+        int ownbit = 0;
+        int i;
+
+        if (tp->RxDescArray == NULL)
+                return;
+
+        if (own)
+                ownbit = DescOwn;
+
+        for (i = 0; i < tp->num_rx_desc; i++) {
+                desc = rtl8168_get_rxdesc(tp, tp->RxDescArray, i,
+                                          ring->index);
+                if (i == (tp->num_rx_desc - 1))
+                        desc->opts1 = cpu_to_le32((ownbit | RingEnd) | (unsigned long)tp->rx_buf_sz);
+                else
+                        desc->opts1 = cpu_to_le32(ownbit | (unsigned long)tp->rx_buf_sz);
+        }
+}
+
+static void
+rtl8168_rx_desc_init(struct rtl8168_private *tp)
+{
+        if (!tp->RxDescArray)
+                return;
+
+        if (rtl8168_num_lib_rx_rings(tp) > 0)
+                return;
+
+        memset(tp->RxDescArray, 0x0, tp->RxDescAllocSize);
+}
+
+int
+rtl8168_init_ring(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int i;
+
+        rtl8168_init_ring_indexes(tp);
+
+        rtl8168_tx_desc_init(tp);
+        rtl8168_rx_desc_init(tp);
+
+        for (i = 0; i < tp->num_tx_rings; i++) {
+                struct rtl8168_tx_ring *ring = &tp->tx_ring[i];
+                memset(ring->tx_skb, 0x0, sizeof(ring->tx_skb));
+        }
+
+        for (i = 0; i < tp->num_rx_rings; i++) {
+                struct rtl8168_rx_ring *ring = &tp->rx_ring[i];
+
+                memset(ring->Rx_skbuff, 0x0, sizeof(ring->Rx_skbuff));
+                if (rtl8168_rx_fill(tp, ring, dev, 0, tp->num_rx_desc, 0) != tp->num_rx_desc)
+                        goto err_out;
+
+                rtl8168_mark_as_last_descriptor(rtl8168_get_rxdesc(tp,
+                                                tp->RxDescArray,
+                                                tp->num_rx_desc - 1,
+                                                ring->index));
+        }
+
+
+        return 0;
+
+err_out:
+        rtl8168_rx_clear(tp);
+        return -ENOMEM;
+}
+
+static void
+rtl8168_unmap_tx_skb(struct pci_dev *pdev,
+                     struct ring_info *tx_skb,
+                     struct TxDesc *desc)
+{
+        unsigned int len = tx_skb->len;
+
+        dma_unmap_single(&pdev->dev, le64_to_cpu(desc->addr), len, DMA_TO_DEVICE);
+
+        desc->opts1 = cpu_to_le32(RTK_MAGIC_DEBUG_VALUE);
+        desc->opts2 = 0x00;
+        desc->addr = 0x00;
+        tx_skb->len = 0;
+}
+
+static void
+rtl8168_tx_clear_range(struct rtl8168_private *tp,
+                       struct rtl8168_tx_ring *ring,
+                       u32 start,
+                       unsigned int n)
+{
+        unsigned int i;
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
+        struct net_device *dev = tp->dev;
+#endif
+
+        for (i = 0; i < n; i++) {
+                unsigned int entry = (start + i) % ring->num_tx_desc;
+                struct ring_info *tx_skb = ring->tx_skb + entry;
+                unsigned int len = tx_skb->len;
+
+                if (len) {
+                        struct sk_buff *skb = tx_skb->skb;
+
+                        rtl8168_unmap_tx_skb(tp->pci_dev, tx_skb,
+                                             ring->TxDescArray + entry);
+                        if (skb) {
+                                RTLDEV->stats.tx_dropped++;
+                                dev_kfree_skb_any(skb);
+                                tx_skb->skb = NULL;
+                        }
+                }
+        }
+}
+
+void
+rtl8168_tx_clear(struct rtl8168_private *tp)
+{
+        int i;
+
+        for (i = 0; i < tp->num_tx_rings; i++) {
+                struct rtl8168_tx_ring *ring = &tp->tx_ring[i];
+                rtl8168_tx_clear_range(tp, ring, ring->dirty_tx, ring->num_tx_desc);
+                ring->cur_tx = ring->dirty_tx = 0;
+        }
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
+static void rtl8168_schedule_reset_work(struct rtl8168_private *tp)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+        set_bit(R8168_FLAG_TASK_RESET_PENDING, tp->task_flags);
+        schedule_delayed_work(&tp->reset_task, 4);
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+}
+
+static void rtl8168_schedule_esd_work(struct rtl8168_private *tp)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+        set_bit(R8168_FLAG_TASK_ESD_CHECK_PENDING, tp->task_flags);
+        schedule_delayed_work(&tp->esd_task, RTL8168_ESD_TIMEOUT);
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+}
+
+static void rtl8168_schedule_linkchg_work(struct rtl8168_private *tp)
+{
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+        set_bit(R8168_FLAG_TASK_LINKCHG_CHECK_PENDING, tp->task_flags);
+        schedule_delayed_work(&tp->linkchg_task, RTL8168_LINK_TIMEOUT);
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+}
+
+#define rtl8168_cancel_schedule_reset_work(a)
+#define rtl8168_cancel_schedule_esd_work(a)
+#define rtl8168_cancel_schedule_linkchg_work(a)
+
+#else
+static void rtl8168_schedule_reset_work(struct rtl8168_private *tp)
+{
+        set_bit(R8168_FLAG_TASK_RESET_PENDING, tp->task_flags);
+        schedule_delayed_work(&tp->reset_task, 4);
+}
+
+static void rtl8168_cancel_schedule_reset_work(struct rtl8168_private *tp)
+{
+        struct work_struct *work = &tp->reset_task.work;
+
+        if (!work->func) return;
+
+        cancel_delayed_work_sync(&tp->reset_task);
+}
+
+static void rtl8168_schedule_esd_work(struct rtl8168_private *tp)
+{
+        set_bit(R8168_FLAG_TASK_ESD_CHECK_PENDING, tp->task_flags);
+        schedule_delayed_work(&tp->esd_task, RTL8168_ESD_TIMEOUT);
+}
+
+static void rtl8168_cancel_schedule_esd_work(struct rtl8168_private *tp)
+{
+        struct work_struct *work = &tp->esd_task.work;
+
+        if (!work->func) return;
+
+        cancel_delayed_work_sync(&tp->esd_task);
+}
+
+static void rtl8168_schedule_linkchg_work(struct rtl8168_private *tp)
+{
+        set_bit(R8168_FLAG_TASK_LINKCHG_CHECK_PENDING, tp->task_flags);
+        schedule_delayed_work(&tp->linkchg_task, RTL8168_LINK_TIMEOUT);
+}
+
+static void rtl8168_cancel_schedule_linkchg_work(struct rtl8168_private *tp)
+{
+        struct work_struct *work = &tp->linkchg_task.work;
+
+        if (!work->func) return;
+
+        cancel_delayed_work_sync(&tp->linkchg_task);
+}
+#endif
+
+static void rtl8168_init_all_schedule_work(struct rtl8168_private *tp)
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
+        INIT_WORK(&tp->reset_task, rtl8168_reset_task, dev);
+        INIT_WORK(&tp->esd_task, rtl8168_esd_task, dev);
+        INIT_WORK(&tp->linkchg_task, rtl8168_linkchg_task, dev);
+#else
+        INIT_DELAYED_WORK(&tp->reset_task, rtl8168_reset_task);
+        INIT_DELAYED_WORK(&tp->esd_task, rtl8168_esd_task);
+        INIT_DELAYED_WORK(&tp->linkchg_task, rtl8168_linkchg_task);
+#endif
+}
+
+static void rtl8168_cancel_all_schedule_work(struct rtl8168_private *tp)
+{
+        rtl8168_cancel_schedule_reset_work(tp);
+        rtl8168_cancel_schedule_esd_work(tp);
+        rtl8168_cancel_schedule_linkchg_work(tp);
+}
+
+static void
+rtl8168_wait_for_irq_complete(struct rtl8168_private *tp)
+{
+        if (tp->features & RTL_FEATURE_MSIX) {
+                int i;
+                for (i = 0; i < tp->irq_nvecs; i++)
+                        synchronize_irq(tp->irq_tbl[i].vector);
+        } else {
+                synchronize_irq(tp->dev->irq);
+        }
+}
+
+void
+_rtl8168_wait_for_quiescence(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        /* Wait for any pending NAPI task to complete */
+#ifdef CONFIG_R8168_NAPI
+        rtl8168_disable_napi(tp);
+#endif//CONFIG_R8168_NAPI
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,67)
+        /* Give a racing hard_start_xmit a few cycles to complete. */
+        synchronize_net();
+#endif
+        rtl8168_irq_mask_and_ack(tp);
+
+        rtl8168_wait_for_irq_complete(tp);
+}
+
+static void
+rtl8168_wait_for_quiescence(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        //suppress unused variable
+        (void)(tp);
+
+        _rtl8168_wait_for_quiescence(dev);
+
+#ifdef CONFIG_R8168_NAPI
+        rtl8168_enable_napi(tp);
+#endif //CONFIG_R8168_NAPI
+}
+
+static int rtl8168_rx_nostuck(struct rtl8168_private *tp)
+{
+        int i, ret = 1;
+        for (i = 0; i < tp->num_rx_rings; i++)
+                ret &= (tp->rx_ring[i].dirty_rx == tp->rx_ring[i].cur_rx);
+        return ret;
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
+static void rtl8168_reset_task(void *_data)
+{
+        struct net_device *dev = _data;
+        struct rtl8168_private *tp = netdev_priv(dev);
+#else
+static void rtl8168_reset_task(struct work_struct *work)
+{
+        struct rtl8168_private *tp =
+                container_of(work, struct rtl8168_private, reset_task.work);
+        struct net_device *dev = tp->dev;
+#endif
+        u32 budget = ~(u32)0;
+        int i;
+
+        rtnl_lock();
+
+        if (!netif_running(dev) ||
+            test_bit(R8168_FLAG_DOWN, tp->task_flags) ||
+            !test_and_clear_bit(R8168_FLAG_TASK_RESET_PENDING, tp->task_flags))
+                goto out_unlock;
+
+        rtl8168_wait_for_quiescence(dev);
+
+        for (i = 0; i < tp->num_rx_rings; i++) {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+                rtl8168_rx_interrupt(dev, tp, &tp->rx_ring[i], &budget);
+#else
+                rtl8168_rx_interrupt(dev, tp, &tp->rx_ring[i], budget);
+#endif	//LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+        }
+
+        netif_carrier_off(dev);
+        netif_tx_disable(dev);
+        rtl8168_hw_reset(dev);
+
+        rtl8168_tx_clear(tp);
+
+        if (rtl8168_rx_nostuck(tp)) {
+                rtl8168_rx_clear(tp);
+                rtl8168_init_ring(dev);
+                rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
+        } else {
+                if (unlikely(net_ratelimit())) {
+                        struct rtl8168_private *tp = netdev_priv(dev);
+
+                        if (netif_msg_intr(tp)) {
+                                printk(PFX KERN_EMERG
+                                       "%s: Rx buffers shortage\n", dev->name);
+                        }
+                }
+                rtl8168_schedule_reset_work(tp);
+        }
+
+out_unlock:
+        rtnl_unlock();
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
+static void rtl8168_esd_task(void *_data)
+{
+        struct net_device *dev = _data;
+        struct rtl8168_private *tp = netdev_priv(dev);
+#else
+static void rtl8168_esd_task(struct work_struct *work)
+{
+        struct rtl8168_private *tp =
+                container_of(work, struct rtl8168_private, esd_task.work);
+        struct net_device *dev = tp->dev;
+#endif
+        rtnl_lock();
+
+        if (!netif_running(dev) ||
+            test_bit(R8168_FLAG_DOWN, tp->task_flags) ||
+            !test_and_clear_bit(R8168_FLAG_TASK_ESD_CHECK_PENDING, tp->task_flags))
+                goto out_unlock;
+
+        rtl8168_esd_checker(tp);
+
+        rtl8168_schedule_esd_work(tp);
+
+out_unlock:
+        rtnl_unlock();
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
+static void rtl8168_linkchg_task(void *_data)
+{
+        struct net_device *dev = _data;
+        //struct rtl8168_private *tp = netdev_priv(dev);
+#else
+static void rtl8168_linkchg_task(struct work_struct *work)
+{
+        struct rtl8168_private *tp =
+                container_of(work, struct rtl8168_private, linkchg_task.work);
+        struct net_device *dev = tp->dev;
+#endif
+        rtnl_lock();
+
+        if (!netif_running(dev) ||
+            test_bit(R8168_FLAG_DOWN, tp->task_flags) ||
+            !test_and_clear_bit(R8168_FLAG_TASK_LINKCHG_CHECK_PENDING, tp->task_flags))
+                goto out_unlock;
+
+        rtl8168_check_link_status(dev);
+
+        rtl8168_schedule_linkchg_work(tp);
+
+out_unlock:
+        rtnl_unlock();
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0)
+static void
+rtl8168_tx_timeout(struct net_device *dev, unsigned int txqueue)
+#else
+static void
+rtl8168_tx_timeout(struct net_device *dev)
+#endif
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        /* Let's wait a bit while any (async) irq lands on */
+        rtl8168_schedule_reset_work(tp);
+}
+
+static u32
+rtl8168_get_txd_opts1(struct rtl8168_tx_ring *ring,
+                      u32 opts1,
+                      u32 len,
+                      unsigned int entry)
+{
+        u32 status = opts1 | len;
+
+        if (entry == ring->num_tx_desc - 1)
+                status |= RingEnd;
+
+        return status;
+}
+
+static int
+rtl8168_xmit_frags(struct rtl8168_private *tp,
+                   struct rtl8168_tx_ring *ring,
+                   struct sk_buff *skb,
+                   const u32 *opts)
+{
+        struct skb_shared_info *info = skb_shinfo(skb);
+        unsigned int cur_frag, entry;
+        struct TxDesc *txd = NULL;
+        const unsigned char nr_frags = info->nr_frags;
+
+        entry = ring->cur_tx;
+        for (cur_frag = 0; cur_frag < nr_frags; cur_frag++) {
+                skb_frag_t *frag = info->frags + cur_frag;
+                dma_addr_t mapping;
+                u32 status, len;
+                void *addr;
+
+                entry = (entry + 1) % ring->num_tx_desc;
+
+                txd = ring->TxDescArray + entry;
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0)
+                len = frag->size;
+                addr = ((void *) page_address(frag->page)) + frag->page_offset;
+#else
+                len = skb_frag_size(frag);
+                addr = skb_frag_address(frag);
+#endif
+                mapping = dma_map_single(tp_to_dev(tp), addr, len, DMA_TO_DEVICE);
+
+                if (unlikely(dma_mapping_error(tp_to_dev(tp), mapping))) {
+                        if (unlikely(net_ratelimit()))
+                                netif_err(tp, drv, tp->dev,
+                                          "Failed to map TX fragments DMA!\n");
+                        goto err_out;
+                }
+
+                /* anti gcc 2.95.3 bugware (sic) */
+                status = rtl8168_get_txd_opts1(ring, opts[0], len, entry);
+                if (cur_frag == (nr_frags - 1)) {
+                        ring->tx_skb[entry].skb = skb;
+                        status |= LastFrag;
+                }
+
+                txd->addr = cpu_to_le64(mapping);
+
+                ring->tx_skb[entry].len = len;
+
+                txd->opts2 = cpu_to_le32(opts[1]);
+                wmb();
+                txd->opts1 = cpu_to_le32(status);
+        }
+
+        return cur_frag;
+
+err_out:
+        rtl8168_tx_clear_range(tp, ring, ring->cur_tx + 1, cur_frag);
+        return -EIO;
+}
+
+static inline
+__be16 get_protocol(struct sk_buff *skb)
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)
+        return vlan_get_protocol(skb);
+#else
+        __be16 protocol;
+
+        if (skb->protocol == htons(ETH_P_8021Q))
+                protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
+        else
+                protocol = skb->protocol;
+
+        return protocol;
+#endif
+}
+
+static bool rtl8168_skb_pad(struct sk_buff *skb)
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,19,0)
+        if (skb_padto(skb, ETH_ZLEN))
+                return false;
+        skb_put(skb, ETH_ZLEN - skb->len);
+        return true;
+#else
+        return !eth_skb_pad(skb);
+#endif
+}
+
+static inline bool
+rtl8168_tx_csum(struct sk_buff *skb,
+                struct net_device *dev,
+                u32 *opts)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u32 csum_cmd = 0;
+        u8 sw_calc_csum = FALSE;
+
+        if (skb->ip_summed == CHECKSUM_PARTIAL) {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
+                const struct iphdr *ip = skb->nh.iph;
+
+                if (dev->features & NETIF_F_IP_CSUM) {
+                        if (ip->protocol == IPPROTO_TCP)
+                                csum_cmd = tp->tx_ip_csum_cmd | tp->tx_tcp_csum_cmd;
+                        else if (ip->protocol == IPPROTO_UDP)
+                                csum_cmd = tp->tx_ip_csum_cmd | tp->tx_udp_csum_cmd;
+                        else if (ip->protocol == IPPROTO_IP)
+                                csum_cmd = tp->tx_ip_csum_cmd;
+                }
+#else
+                u8 ip_protocol = IPPROTO_RAW;
+
+                switch (get_protocol(skb)) {
+                case  __constant_htons(ETH_P_IP):
+                        if (dev->features & NETIF_F_IP_CSUM) {
+                                ip_protocol = ip_hdr(skb)->protocol;
+                                csum_cmd = tp->tx_ip_csum_cmd;
+                        }
+                        break;
+                case  __constant_htons(ETH_P_IPV6):
+                        if (dev->features & NETIF_F_IPV6_CSUM) {
+                                if (skb_transport_offset(skb) > 0 && skb_transport_offset(skb) <= TCPHO_MAX) {
+                                        ip_protocol = ipv6_hdr(skb)->nexthdr;
+                                        csum_cmd = tp->tx_ipv6_csum_cmd;
+                                        csum_cmd |= skb_transport_offset(skb) << TCPHO_SHIFT;
+                                }
+                        }
+                        break;
+                default:
+                        if (unlikely(net_ratelimit()))
+                                dprintk("checksum_partial proto=%x!\n", skb->protocol);
+                        break;
+                }
+
+                if (ip_protocol == IPPROTO_TCP)
+                        csum_cmd |= tp->tx_tcp_csum_cmd;
+                else if (ip_protocol == IPPROTO_UDP)
+                        csum_cmd |= tp->tx_udp_csum_cmd;
+#endif
+                if (csum_cmd == 0) {
+                        sw_calc_csum = TRUE;
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+                        WARN_ON(1); /* we need a WARN() */
+#endif
+                }
+        }
+
+        if (csum_cmd != 0) {
+                if (tp->ShortPacketSwChecksum && skb->len < ETH_ZLEN) {
+                        sw_calc_csum = TRUE;
+                        if (!rtl8168_skb_pad(skb))
+                                return false;
+                } else {
+                        if ((tp->mcfg == CFG_METHOD_1) || (tp->mcfg == CFG_METHOD_2) || (tp->mcfg == CFG_METHOD_3))
+                                opts[0] |= csum_cmd;
+                        else
+                                opts[1] |= csum_cmd;
+                }
+        }
+
+        if (tp->UseSwPaddingShortPkt && skb->len < ETH_ZLEN)
+                if (!rtl8168_skb_pad(skb))
+                        return false;
+
+        if (sw_calc_csum) {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) && LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,7)
+                skb_checksum_help(&skb, 0);
+#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) && LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
+                skb_checksum_help(skb, 0);
+#else
+                skb_checksum_help(skb);
+#endif
+        }
+
+        return true;
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)
+/* r8169_csum_workaround()
+ * The hw limits the value the transport offset. When the offset is out of the
+ * range, calculate the checksum by sw.
+ */
+static void r8168_csum_workaround(struct rtl8168_private *tp,
+                                  struct sk_buff *skb)
+{
+        if (skb_shinfo(skb)->gso_size) {
+                netdev_features_t features = tp->dev->features;
+                struct sk_buff *segs, *nskb;
+
+                features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
+                segs = skb_gso_segment(skb, features);
+                if (IS_ERR(segs) || !segs)
+                        goto drop;
+
+                do {
+                        nskb = segs;
+                        segs = segs->next;
+                        nskb->next = NULL;
+                        rtl8168_start_xmit(nskb, tp->dev);
+                } while (segs);
+
+                dev_consume_skb_any(skb);
+        } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
+                if (skb_checksum_help(skb) < 0)
+                        goto drop;
+
+                rtl8168_start_xmit(skb, tp->dev);
+        } else {
+                struct net_device_stats *stats;
+
+drop:
+                stats = &tp->dev->stats;
+                stats->tx_dropped++;
+                dev_kfree_skb_any(skb);
+        }
+}
+
+/* msdn_giant_send_check()
+ * According to the document of microsoft, the TCP Pseudo Header excludes the
+ * packet length for IPv6 TCP large packets.
+ */
+static int msdn_giant_send_check(struct sk_buff *skb)
+{
+        const struct ipv6hdr *ipv6h;
+        struct tcphdr *th;
+        int ret;
+
+        ret = skb_cow_head(skb, 0);
+        if (ret)
+                return ret;
+
+        ipv6h = ipv6_hdr(skb);
+        th = tcp_hdr(skb);
+
+        th->check = 0;
+        th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
+
+        return ret;
+}
+#endif
+
+static bool rtl8168_tx_slots_avail(struct rtl8168_private *tp,
+                                   struct rtl8168_tx_ring *ring)
+{
+        unsigned int slots_avail = READ_ONCE(ring->dirty_tx) + ring->num_tx_desc
+                                   - READ_ONCE(ring->cur_tx);
+
+        /* A skbuff with nr_frags needs nr_frags+1 entries in the tx queue */
+        return slots_avail > MAX_SKB_FRAGS;
+}
+
+static netdev_tx_t
+rtl8168_start_xmit(struct sk_buff *skb,
+                   struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        unsigned int entry;
+        struct TxDesc *txd;
+        dma_addr_t mapping;
+        u32 len;
+        u32 opts[2];
+        netdev_tx_t ret = NETDEV_TX_OK;
+        unsigned long large_send;
+        int frags;
+        const u16 queue_mapping = skb_get_queue_mapping(skb);
+        struct rtl8168_tx_ring *ring;
+        bool stop_queue;
+
+        assert(queue_mapping < tp->num_tx_rings);
+
+        ring = &tp->tx_ring[queue_mapping];
+
+        if (unlikely(!rtl8168_tx_slots_avail(tp, ring))) {
+                if (netif_msg_drv(tp)) {
+                        printk(KERN_ERR
+                               "%s: BUG! Tx Ring full when queue awake!\n",
+                               dev->name);
+                }
+                goto err_stop;
+        }
+
+        entry = ring->cur_tx % ring->num_tx_desc;
+        txd = ring->TxDescArray + entry;
+
+        if (unlikely(le32_to_cpu(txd->opts1) & DescOwn)) {
+                if (netif_msg_drv(tp)) {
+                        printk(KERN_ERR
+                               "%s: BUG! Tx Desc is own by hardware!\n",
+                               dev->name);
+                }
+                goto err_stop;
+        }
+
+        opts[0] = DescOwn;
+        opts[1] = rtl8168_tx_vlan_tag(tp, skb);
+
+        large_send = 0;
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+        if (dev->features & (NETIF_F_TSO | NETIF_F_TSO6)) {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
+                u32 mss = skb_shinfo(skb)->tso_size;
+#else
+                u32 mss = skb_shinfo(skb)->gso_size;
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
+
+                /* TCP Segmentation Offload (or TCP Large Send) */
+                if (mss) {
+                        if ((tp->mcfg == CFG_METHOD_1) ||
+                            (tp->mcfg == CFG_METHOD_2) ||
+                            (tp->mcfg == CFG_METHOD_3)) {
+                                opts[0] |= LargeSend | (min(mss, MSS_MAX) << 16);
+                                large_send = 1;
+                        } else {
+                                switch (get_protocol(skb)) {
+                                case __constant_htons(ETH_P_IP):
+                                        if (skb_transport_offset(skb) <= GTTCPHO_MAX) {
+                                                opts[0] |= GiantSendv4;
+                                                opts[0] |= skb_transport_offset(skb) << GTTCPHO_SHIFT;
+                                                opts[1] |= min(mss, MSS_MAX) << 18;
+                                                large_send = 1;
+                                        }
+                                        break;
+                                case __constant_htons(ETH_P_IPV6):
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)
+                                        if (msdn_giant_send_check(skb)) {
+                                                r8168_csum_workaround(tp, skb);
+                                                goto out;
+                                        }
+#endif
+                                        if (skb_transport_offset(skb) <= GTTCPHO_MAX) {
+                                                opts[0] |= GiantSendv6;
+                                                opts[0] |= skb_transport_offset(skb) << GTTCPHO_SHIFT;
+                                                opts[1] |= min(mss, MSS_MAX) << 18;
+                                                large_send = 1;
+                                        }
+                                        break;
+                                default:
+                                        if (unlikely(net_ratelimit()))
+                                                dprintk("tso proto=%x!\n", skb->protocol);
+                                        break;
+                                }
+                        }
+
+                        if (large_send == 0)
+                                goto err_dma_0;
+                }
+        }
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+
+        if (large_send == 0) {
+                if (unlikely(!rtl8168_tx_csum(skb, dev, opts)))
+                        goto err_dma_0;
+        }
+
+        frags = rtl8168_xmit_frags(tp, ring, skb, opts);
+        if (unlikely(frags < 0))
+                goto err_dma_0;
+        if (frags) {
+                len = skb_headlen(skb);
+                opts[0] |= FirstFrag;
+        } else {
+                len = skb->len;
+
+                ring->tx_skb[entry].skb = skb;
+
+                opts[0] |= FirstFrag | LastFrag;
+        }
+
+        opts[0] = rtl8168_get_txd_opts1(ring, opts[0], len, entry);
+        mapping = dma_map_single(tp_to_dev(tp), skb->data, len, DMA_TO_DEVICE);
+        if (unlikely(dma_mapping_error(tp_to_dev(tp), mapping))) {
+                if (unlikely(net_ratelimit()))
+                        netif_err(tp, drv, dev, "Failed to map TX DMA!\n");
+                goto err_dma_1;
+        }
+        ring->tx_skb[entry].len = len;
+        txd->addr = cpu_to_le64(mapping);
+        txd->opts2 = cpu_to_le32(opts[1]);
+        wmb();
+        txd->opts1 = cpu_to_le32(opts[0]);
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0)
+        dev->trans_start = jiffies;
+#else
+        skb_tx_timestamp(skb);
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0)
+
+        /* rtl_tx needs to see descriptor changes before updated ring->cur_tx */
+        smp_wmb();
+
+        WRITE_ONCE(ring->cur_tx, ring->cur_tx + frags + 1);
+
+        stop_queue = !rtl8168_tx_slots_avail(tp, ring);
+        if (unlikely(stop_queue)) {
+                /* Avoid wrongly optimistic queue wake-up: rtl_tx thread must
+                 * not miss a ring update when it notices a stopped queue.
+                 */
+                smp_wmb();
+                netif_stop_subqueue(dev, queue_mapping);
+        }
+
+        rtl8168_doorbell(ring);    /* set polling bit */
+
+        if (unlikely(stop_queue)) {
+                /* Sync with rtl_tx:
+                 * - publish queue status and cur_tx ring index (write barrier)
+                 * - refresh dirty_tx ring index (read barrier).
+                 * May the current thread have a pessimistic view of the ring
+                 * status and forget to wake up queue, a racing rtl_tx thread
+                 * can't.
+                 */
+                smp_mb();
+                if (rtl8168_tx_slots_avail(tp, ring))
+                        netif_start_subqueue(dev, queue_mapping);
+        }
+
+out:
+        return ret;
+err_dma_1:
+        ring->tx_skb[entry].skb = NULL;
+        rtl8168_tx_clear_range(tp, ring, ring->cur_tx + 1, frags);
+err_dma_0:
+        RTLDEV->stats.tx_dropped++;
+        dev_kfree_skb_any(skb);
+        ret = NETDEV_TX_OK;
+        goto out;
+err_stop:
+        netif_tx_disable(dev);
+        ret = NETDEV_TX_BUSY;
+        RTLDEV->stats.tx_dropped++;
+        goto out;
+}
+
+static void
+rtl8168_tx_interrupt(struct rtl8168_tx_ring *ring)
+{
+        struct rtl8168_private *tp = ring->priv;
+        struct net_device *dev = tp->dev;
+        unsigned int dirty_tx, tx_left;
+
+        assert(dev != NULL);
+        assert(tp != NULL);
+
+#ifdef ENABLE_LIB_SUPPORT
+        if (ring->index > 0) {
+                rtl8168_lib_tx_interrupt(tp);
+                return;
+        }
+#endif
+        dirty_tx = ring->dirty_tx;
+        smp_rmb();
+        tx_left = READ_ONCE(ring->cur_tx) - dirty_tx;
+        tp->dynamic_aspm_packet_count += tx_left;
+
+        while (tx_left > 0) {
+                unsigned int entry = dirty_tx % ring->num_tx_desc;
+                struct ring_info *tx_skb = ring->tx_skb + entry;
+                u32 len = tx_skb->len;
+                u32 status;
+
+                rmb();
+                status = le32_to_cpu(ring->TxDescArray[entry].opts1);
+                if (status & DescOwn)
+                        break;
+
+                RTLDEV->stats.tx_bytes += len;
+                RTLDEV->stats.tx_packets++;
+
+                rtl8168_unmap_tx_skb(tp->pci_dev,
+                                     tx_skb,
+                                     ring->TxDescArray + entry);
+
+                if (tx_skb->skb!=NULL) {
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)
+                        dev_consume_skb_any(tx_skb->skb);
+#else
+                        dev_kfree_skb_any(tx_skb->skb);
+#endif
+                        tx_skb->skb = NULL;
+                }
+                dirty_tx++;
+                tx_left--;
+        }
+
+        tp->dynamic_aspm_packet_count -= tx_left;
+
+        if (ring->dirty_tx != dirty_tx) {
+                WRITE_ONCE(ring->dirty_tx, dirty_tx);
+                smp_wmb();
+                if (netif_queue_stopped(dev) &&
+                    (rtl8168_tx_slots_avail(tp, ring))) {
+                        netif_start_subqueue(dev, ring->index);
+                }
+                smp_rmb();
+                if (ring->cur_tx != dirty_tx)
+                        rtl8168_doorbell(ring);
+        }
+}
+
+static void
+rtl8168_tx_all_interrupt(struct rtl8168_private *tp)
+{
+        int i;
+
+        for (i = 0; i < rtl8168_tot_tx_rings(tp); i++)
+                rtl8168_tx_interrupt(&tp->tx_ring[i]);
+}
+
+static inline int
+rtl8168_fragmented_frame(u32 status)
+{
+        return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag);
+}
+
+static inline void
+rtl8168_rx_csum(struct rtl8168_private *tp,
+                struct sk_buff *skb,
+                struct RxDesc *desc)
+{
+        u32 opts1 = le32_to_cpu(desc->opts1);
+        u32 opts2 = le32_to_cpu(desc->opts2);
+
+        if ((tp->mcfg == CFG_METHOD_1) ||
+            (tp->mcfg == CFG_METHOD_2) ||
+            (tp->mcfg == CFG_METHOD_3)) {
+                u32 status = opts1 & RxProtoMask;
+
+                /* rx csum offload for RTL8168B/8111B */
+                if (((status == RxProtoTCP) && !(opts1 & (RxTCPF | RxIPF))) ||
+                    ((status == RxProtoUDP) && !(opts1 & (RxUDPF | RxIPF))))
+                        skb->ip_summed = CHECKSUM_UNNECESSARY;
+                else
+                        skb->ip_summed = CHECKSUM_NONE;
+        } else {
+                /* rx csum offload for RTL8168C/8111C and RTL8168CP/8111CP */
+                if (((opts2 & RxV4F) && !(opts1 & RxIPF)) || (opts2 & RxV6F)) {
+                        if (((opts1 & RxTCPT) && !(opts1 & RxTCPF)) ||
+                            ((opts1 & RxUDPT) && !(opts1 & RxUDPF)))
+                                skb->ip_summed = CHECKSUM_UNNECESSARY;
+                        else
+                                skb->ip_summed = CHECKSUM_NONE;
+                } else
+                        skb->ip_summed = CHECKSUM_NONE;
+        }
+}
+
+/*
+static inline int
+rtl8168_try_rx_copy(struct rtl8168_private *tp,
+                    struct rtl8168_rx_ring *ring,
+                    struct sk_buff **sk_buff,
+                    int pkt_size,
+                    struct RxDesc *desc,
+                    int rx_buf_sz)
+{
+        int ret = -1;
+
+        struct sk_buff *skb;
+
+        skb = RTL_ALLOC_SKB_INTR(&tp->r8168napi[ring->index].napi,
+                                 pkt_size + RTK_RX_ALIGN);
+        if (skb) {
+                u8 *data;
+
+                data = sk_buff[0]->data;
+                skb_reserve(skb, RTK_RX_ALIGN);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37)
+                prefetch(data - RTK_RX_ALIGN);
+#endif
+                eth_copy_and_sum(skb, data, pkt_size, 0);
+                *sk_buff = skb;
+                rtl8168_mark_to_asic(desc, rx_buf_sz);
+                ret = 0;
+        }
+
+        return ret;
+}
+*/
+
+static inline void
+rtl8168_rx_skb(struct rtl8168_private *tp,
+               struct sk_buff *skb,
+               u32 ring_index)
+{
+#ifdef CONFIG_R8168_NAPI
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
+        netif_receive_skb(skb);
+#else
+        napi_gro_receive(&tp->r8168napi[ring_index].napi, skb);
+#endif
+#else
+        netif_rx(skb);
+#endif
+}
+
+static int
+rtl8168_rx_interrupt(struct net_device *dev,
+                     struct rtl8168_private *tp,
+                     struct rtl8168_rx_ring *ring,
+                     napi_budget budget)
+{
+        unsigned int cur_rx, rx_left;
+        unsigned int count = 0;
+        u32 ring_index = ring->index;
+        unsigned int entry;
+        struct RxDesc *desc;
+        u32 status;
+        u32 rx_quota;
+        u64 rx_buf_phy_addr;
+
+        assert(dev != NULL);
+        assert(tp != NULL);
+
+        if (!tp->RxDescArray)
+                goto rx_out;
+
+#ifdef ENABLE_LIB_SUPPORT
+        if (ring->index > 0) {
+                rtl8168_lib_rx_interrupt(tp);
+                goto rx_out;
+        }
+#endif
+        rx_quota = RTL_RX_QUOTA(budget);
+        cur_rx = ring->cur_rx;
+        rx_left = tp->num_rx_desc + ring->dirty_rx - cur_rx;
+        rx_left = rtl8168_rx_quota(rx_left, (u32)rx_quota);
+
+        for (; rx_left > 0; rx_left--, cur_rx++) {
+                int pkt_size;
+                const void *rx_buf;
+                struct sk_buff *skb;
+
+                entry = cur_rx % tp->num_rx_desc;
+                desc = rtl8168_get_rxdesc(tp, tp->RxDescArray, entry, ring_index);
+                status = le32_to_cpu(desc->opts1);
+                if (status & DescOwn)
+                        break;
+
+                rmb();
+
+                if (unlikely(status & RxRES)) {
+                        if (netif_msg_rx_err(tp)) {
+                                printk(KERN_INFO
+                                       "%s: Rx ERROR. status = %08x\n",
+                                       dev->name, status);
+                        }
+
+                        RTLDEV->stats.rx_errors++;
+
+                        if (status & (RxRWT | RxRUNT))
+                                RTLDEV->stats.rx_length_errors++;
+                        if (status & RxCRC)
+                                RTLDEV->stats.rx_crc_errors++;
+
+                        if (!(dev->features & NETIF_F_RXALL))
+                                goto release_descriptor;
+                }
+
+                pkt_size = status & 0x00003fff;
+                if (likely(!(dev->features & NETIF_F_RXFCS)))
+                        pkt_size -= ETH_FCS_LEN;
+
+                /*
+                 * The driver does not support incoming fragmented
+                 * frames. They are seen as a symptom of over-mtu
+                 * sized frames.
+                 */
+                if (unlikely(rtl8168_fragmented_frame(status)) ||
+                    unlikely(pkt_size > tp->rx_buf_sz)) {
+                        RTLDEV->stats.rx_dropped++;
+                        RTLDEV->stats.rx_length_errors++;
+                        goto release_descriptor;
+                }
+
+                skb = RTL_ALLOC_SKB_INTR(&tp->r8168napi[ring_index].napi, pkt_size + RTK_RX_ALIGN);
+                if (!skb) {
+                        RTLDEV->stats.rx_dropped++;
+                        RTLDEV->stats.rx_length_errors++;
+                        //netdev_err(tp->dev, "Failed to allocate RX skb!\n");
+                        goto release_descriptor;
+                }
+
+                rx_buf_phy_addr = ring->RxDescPhyAddr[entry];
+                dma_sync_single_for_cpu(tp_to_dev(tp),
+                                        rx_buf_phy_addr, tp->rx_buf_sz,
+                                        DMA_FROM_DEVICE);
+
+                rx_buf = ring->Rx_skbuff[entry]->data;
+                if (!R8168_USE_NAPI_ALLOC_SKB)
+                        skb_reserve(skb, RTK_RX_ALIGN);
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37)
+                prefetch(rx_buf);
+#endif
+                eth_copy_and_sum(skb, rx_buf, pkt_size, 0);
+
+                dma_sync_single_for_device(tp_to_dev(tp), rx_buf_phy_addr,
+                                           tp->rx_buf_sz, DMA_FROM_DEVICE);
+
+#ifdef ENABLE_RSS_SUPPORT
+                rtl8168_rx_hash(tp, (struct RxDescV2 *)desc, skb);
+#endif
+                if (tp->cp_cmd & RxChkSum)
+                        rtl8168_rx_csum(tp, skb, desc);
+
+                skb->dev = dev;
+                skb_put(skb, pkt_size);
+                skb->protocol = eth_type_trans(skb, dev);
+
+                if (skb->pkt_type == PACKET_MULTICAST)
+                        RTLDEV->stats.multicast++;
+
+                if (rtl8168_rx_vlan_skb(tp, desc, skb) < 0)
+                        rtl8168_rx_skb(tp, skb, ring_index);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,11,0)
+                dev->last_rx = jiffies;
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,11,0)
+                RTLDEV->stats.rx_bytes += pkt_size;
+                RTLDEV->stats.rx_packets++;
+
+release_descriptor:
+                rtl8168_mark_to_asic(desc, tp->rx_buf_sz);
+        }
+
+        count = cur_rx - ring->cur_rx;
+        ring->cur_rx = cur_rx;
+        ring->dirty_rx += count;
+
+        tp->dynamic_aspm_packet_count += count;
+
+rx_out:
+        return count;
+}
+
+/*
+ *The interrupt handler does all of the Rx thread work and cleans up after
+ *the Tx thread.
+ */
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+static irqreturn_t rtl8168_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
+#else
+static irqreturn_t rtl8168_interrupt(int irq, void *dev_instance)
+#endif
+{
+        struct r8168_napi *r8168napi = dev_instance;
+        struct rtl8168_private *tp = r8168napi->priv;
+        struct net_device *dev = tp->dev;
+        u8 other_q_status = 0;
+        int handled = 0;
+        int status;
+        int i;
+
+        do {
+                status = RTL_R16(tp, tp->isr_reg[0]);
+#ifdef ENABLE_RSS_SUPPORT
+                if (R8168_MULTI_RX_Q(tp)) {
+                        for (i=1; i<rtl8168_tot_rx_rings(tp); i++)
+                                other_q_status |= RTL_R8(tp, tp->isr_reg[i]);
+                }
+#endif
+                if (!(tp->features & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX))) {
+                        /* hotplug/major error/no more work/shared irq */
+                        if ((status == 0xFFFF) || (!status && !other_q_status))
+                                break;
+
+                        if (!(status & (tp->intr_mask | tp->timer_intr_mask)) &&
+                            !(other_q_status & other_q_intr_mask))
+                                break;
+                }
+
+                handled = 1;
+
+                rtl8168_disable_interrupt(tp);
+                rtl8168_disable_lib_interrupt(tp);
+
+                switch (tp->mcfg) {
+                case CFG_METHOD_9 ... CFG_METHOD_37:
+                        /* RX_OVERFLOW RE-START mechanism now HW handles it automatically*/
+                        rtl8168_clear_isr_by_vector(tp, 0, status&~RxFIFOOver);
+                        break;
+                default:
+                        rtl8168_clear_isr_by_vector(tp, 0, status);
+                        break;
+                }
+
+                //Work around for rx fifo overflow
+                if (unlikely(status & RxFIFOOver)) {
+                        if (tp->mcfg == CFG_METHOD_1) {
+                                netif_tx_disable(dev);
+                                udelay(300);
+                                rtl8168_hw_reset(dev);
+                                rtl8168_tx_clear(tp);
+                                rtl8168_rx_clear(tp);
+                                rtl8168_init_ring(dev);
+                                rtl8168_hw_config(dev);
+                                rtl8168_hw_start(dev);
+                                netif_tx_wake_all_queues(dev);
+                        }
+                        tp->rx_fifo_of++;
+                }
+
+                if (other_q_status) {
+                        for (i=1; i<rtl8168_tot_rx_rings(tp); i++)
+                                rtl8168_clear_isr_by_vector(tp, i, other_q_status);
+                }
+
+#ifdef ENABLE_DASH_SUPPORT
+                if ( tp->DASH ) {
+                        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
+                                u8 DashIntType2Status;
+
+                                if (status & ISRIMR_DASH_INTR_CMAC_RESET)
+                                        tp->CmacResetIntr = TRUE;
+
+                                DashIntType2Status = RTL_CMAC_R8(tp, CMAC_IBISR0);
+                                if (DashIntType2Status & ISRIMR_DASH_TYPE2_ROK) {
+                                        tp->RcvFwDashOkEvt = TRUE;
+                                }
+                                if (DashIntType2Status & ISRIMR_DASH_TYPE2_TOK) {
+                                        tp->SendFwHostOkEvt = TRUE;
+                                }
+                                if (DashIntType2Status & ISRIMR_DASH_TYPE2_RX_DISABLE_IDLE) {
+                                        tp->DashFwDisableRx = TRUE;
+                                }
+
+                                RTL_CMAC_W8(tp, CMAC_IBISR0, DashIntType2Status);
+                        } else {
+                                if (status & ISRIMR_DP_REQSYS_OK) {
+                                        tp->RcvFwReqSysOkEvt = TRUE;
+                                }
+                                if (status & ISRIMR_DP_DASH_OK) {
+                                        tp->RcvFwDashOkEvt = TRUE;
+                                }
+                                if (status & ISRIMR_DP_HOST_OK) {
+                                        tp->SendFwHostOkEvt = TRUE;
+                                }
+                        }
+                }
+#endif
+
+#ifdef CONFIG_R8168_NAPI
+                if ((status & tp->intr_mask) ||
+                    (other_q_status & other_q_intr_mask) ||
+                    tp->keep_intr_cnt-- > 0) {
+                        if ((status & tp->intr_mask) ||
+                            (other_q_status & other_q_intr_mask))
+                                tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT;
+
+                        if (likely(RTL_NETIF_RX_SCHEDULE_PREP(dev, &tp->r8168napi[0].napi)))
+                                __RTL_NETIF_RX_SCHEDULE(dev, &tp->r8168napi[0].napi);
+                        else if (netif_msg_intr(tp))
+                                printk(KERN_INFO "%s: interrupt %04x in poll\n",
+                                       dev->name, status);
+                } else {
+                        tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT;
+                        rtl8168_switch_to_hw_interrupt(tp);
+                }
+#else
+                if ((status & tp->intr_mask) ||
+                    (other_q_status & other_q_intr_mask) ||
+                    tp->keep_intr_cnt-- > 0) {
+                        u32 const max_rx_queue =
+                                (other_q_status & other_q_intr_mask) > 0 ?
+                                rtl8168_tot_rx_rings(tp) : 1;
+                        u32 budget = ~(u32)0;
+
+                        if ((status & tp->intr_mask) ||
+                            (other_q_status & other_q_intr_mask))
+                                tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT;
+
+                        rtl8168_tx_all_interrupt(tp);
+
+                        for (i = 0; i < max_rx_queue; i++) {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+                                rtl8168_rx_interrupt(dev, tp, &tp->rx_ring[i], &budget);
+#else
+                                rtl8168_rx_interrupt(dev, tp, &tp->rx_ring[i], budget);
+#endif	//LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+                        }
+
+#ifdef ENABLE_DASH_SUPPORT
+                        if ( tp->DASH ) {
+                                struct net_device *dev = tp->dev;
+
+                                HandleDashInterrupt(dev);
+                        }
+#endif
+
+                        rtl8168_switch_to_timer_interrupt(tp);
+                } else {
+                        tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT;
+                        rtl8168_switch_to_hw_interrupt(tp);
+                }
+#endif
+
+        } while (false);
+
+        return IRQ_RETVAL(handled);
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
+static irqreturn_t rtl8168_interrupt_msix(int irq, void *dev_instance, struct pt_regs *regs)
+#else
+static irqreturn_t rtl8168_interrupt_msix(int irq, void *dev_instance)
+#endif
+{
+        struct r8168_napi *r8168napi = dev_instance;
+        struct rtl8168_private *tp = r8168napi->priv;
+        struct net_device *dev = tp->dev;
+        int message_id = r8168napi->index;
+#ifndef CONFIG_R8168_NAPI
+        u32 budget = ~(u32)0;
+#endif
+
+        do {
+#if defined(RTL_USE_NEW_INTR_API)
+                if (!tp->irq_tbl[message_id].requested)
+                        break;
+#endif
+                /*
+                 * Other rx queue may incur interrupt due to rdu.
+                 * Skip its interrupt here or its queue will be initialized
+                 * incorrectly.
+                 */
+                if (message_id >= tp->num_rx_rings)
+                        break;
+
+#ifdef CONFIG_R8168_NAPI
+                if (likely(RTL_NETIF_RX_SCHEDULE_PREP(dev, &r8168napi->napi))) {
+                        rtl8168_disable_interrupt_by_vector(tp, message_id);
+                        __RTL_NETIF_RX_SCHEDULE(dev, &r8168napi->napi);
+                } else if (netif_msg_intr(tp))
+                        printk(KERN_INFO "%s: interrupt message id %d in poll_msix\n",
+                               dev->name, message_id);
+                rtl8168_self_clear_isr_by_vector(tp, message_id);
+#else
+                if (message_id == 0)
+                        rtl8168_tx_all_interrupt(tp);
+
+                if (message_id < tp->num_rx_rings) {
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+                        rtl8168_rx_interrupt(dev, tp, &tp->rx_ring[message_id], &budget);
+#else
+                        rtl8168_rx_interrupt(dev, tp, &tp->rx_ring[message_id], budget);
+#endif	//LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
+                }
+
+                rtl8168_enable_interrupt_by_vector(tp, message_id);
+#endif
+
+        } while (false);
+
+        return IRQ_HANDLED;
+}
+
+#ifdef CONFIG_R8168_NAPI
+static int rtl8168_poll_vector(napi_ptr napi, napi_budget budget, bool all_rx_q)
+{
+        struct r8168_napi *r8168napi = RTL_GET_PRIV(napi, struct r8168_napi);
+        struct rtl8168_private *tp = r8168napi->priv;
+        const int message_id = r8168napi->index;
+        RTL_GET_NETDEV(tp)
+        unsigned int work_to_do = RTL_NAPI_QUOTA(budget, dev);
+        unsigned int work_done = 0;
+        int i;
+
+        if (message_id == 0)
+                rtl8168_tx_all_interrupt(tp);
+
+        if (all_rx_q)
+                for (i = 0; i < tp->num_rx_rings; i++)
+                        work_done += rtl8168_rx_interrupt(dev, tp, &tp->rx_ring[i], budget);
+        else
+                work_done += rtl8168_rx_interrupt(dev, tp, &tp->rx_ring[message_id], budget);
+
+        RTL_NAPI_QUOTA_UPDATE(dev, work_done, budget);
+
+        if (work_done < work_to_do) {
+#ifdef ENABLE_DASH_SUPPORT
+                if (message_id == 0) {
+                        if ( tp->DASH ) {
+                                struct net_device *dev = tp->dev;
+
+                                HandleDashInterrupt(dev);
+                        }
+                }
+#endif
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0)
+                if (RTL_NETIF_RX_COMPLETE(dev, napi, work_done) == FALSE)
+                        return RTL_NAPI_RETURN_VALUE;
+#else
+                RTL_NETIF_RX_COMPLETE(dev, napi, work_done);
+#endif
+                /*
+                 * 20040426: the barrier is not strictly required but the
+                 * behavior of the irq handler could be less predictable
+                 * without it. Btw, the lack of flush for the posted pci
+                 * write is safe - FR
+                 */
+                smp_wmb();
+                //if (message_id == 0)
+                //        rtl8168_switch_to_timer_interrupt(tp);
+                //else
+                rtl8168_enable_interrupt_by_vector(tp, message_id);
+        }
+
+        return RTL_NAPI_RETURN_VALUE;
+}
+
+static int rtl8168_poll(napi_ptr napi, napi_budget budget)
+{
+        return rtl8168_poll_vector(napi, budget, 1);
+}
+
+static int rtl8168_poll_msix_ring(napi_ptr napi, napi_budget budget)
+{
+        return rtl8168_poll_vector(napi, budget, 0);
+}
+static int rtl8168_poll_msix_rx(napi_ptr napi, napi_budget budget)
+{
+        struct r8168_napi *r8168napi = RTL_GET_PRIV(napi, struct r8168_napi);
+        struct rtl8168_private *tp = r8168napi->priv;
+        const int message_id = r8168napi->index;
+        RTL_GET_NETDEV(tp)
+        unsigned int work_to_do = RTL_NAPI_QUOTA(budget, dev);
+        unsigned int work_done = 0;
+
+        work_done += rtl8168_rx_interrupt(dev, tp, &tp->rx_ring[message_id], budget);
+
+        RTL_NAPI_QUOTA_UPDATE(dev, work_done, budget);
+
+        if (work_done < work_to_do) {
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0)
+                if (RTL_NETIF_RX_COMPLETE(dev, napi, work_done) == FALSE)
+                        return RTL_NAPI_RETURN_VALUE;
+#else
+                RTL_NETIF_RX_COMPLETE(dev, napi, work_done);
+#endif
+                /*
+                 * 20040426: the barrier is not strictly required but the
+                 * behavior of the irq handler could be less predictable
+                 * without it. Btw, the lack of flush for the posted pci
+                 * write is safe - FR
+                 */
+                smp_wmb();
+                //if (message_id == 0)
+                //        rtl8168_switch_to_timer_interrupt(tp);
+                //else
+                rtl8168_enable_interrupt_by_vector(tp, message_id);
+        }
+
+        return RTL_NAPI_RETURN_VALUE;
+}
+#endif//CONFIG_R8168_NAPI
+
+static void rtl8168_sleep_rx_enable(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        if (tp->wol_enabled != WOL_ENABLED)
+                return;
+
+        if ((tp->mcfg == CFG_METHOD_1) || (tp->mcfg == CFG_METHOD_2)) {
+                RTL_W8(tp, ChipCmd, CmdReset);
+                rtl8168_rx_desc_offset0_init(tp, 0);
+                RTL_W8(tp, ChipCmd, CmdRxEnb);
+        } else if (tp->mcfg == CFG_METHOD_14 || tp->mcfg == CFG_METHOD_15) {
+                rtl8168_ephy_write(tp, 0x19, 0xFF64);
+                RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) | AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
+        }
+}
+
+static void rtl8168_down(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        //rtl8168_delete_esd_timer(dev, &tp->esd_timer);
+        //rtl8168_delete_link_timer(dev, &tp->link_timer);
+
+        netif_carrier_off(dev);
+
+        netif_tx_disable(dev);
+
+        _rtl8168_wait_for_quiescence(dev);
+
+        rtl8168_dsm(dev, DSM_IF_DOWN);
+
+        rtl8168_hw_reset(dev);
+
+        rtl8168_tx_clear(tp);
+
+        rtl8168_rx_clear(tp);
+}
+
+static int rtl8168_resource_freed(struct rtl8168_private *tp)
+{
+        int i;
+
+        for (i = 0; i < tp->num_tx_rings; i++)
+                if (tp->tx_ring[i].TxDescArray) return 0;
+
+        if (tp->RxDescArray)
+                return 0;
+
+        return 1;
+}
+
+int rtl8168_close(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        if (!rtl8168_resource_freed(tp)) {
+                set_bit(R8168_FLAG_DOWN, tp->task_flags);
+
+                rtl8168_down(dev);
+
+                pci_clear_master(tp->pci_dev);
+
+                rtl8168_hw_d3_para(dev);
+
+                rtl8168_powerdown_pll(dev);
+
+                rtl8168_sleep_rx_enable(dev);
+
+                rtl8168_free_irq(tp);
+
+                rtl8168_free_alloc_resources(tp);
+        } else {
+                rtl8168_hw_d3_para(dev);
+
+                rtl8168_powerdown_pll(dev);
+        }
+
+        return 0;
+}
+
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,11)
+static void rtl8168_shutdown(struct pci_dev *pdev)
+{
+        struct net_device *dev = pci_get_drvdata(pdev);
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        rtnl_lock();
+
+        if (HW_DASH_SUPPORT_DASH(tp))
+                rtl8168_driver_stop(tp);
+
+        rtl8168_set_bios_setting(dev);
+        if (s5_keep_curr_mac == 0 && tp->random_mac == 0)
+                rtl8168_rar_set(tp, tp->org_mac_addr);
+
+#ifdef ENABLE_FIBER_SUPPORT
+        rtl8168_hw_fiber_nic_d3_para(tp);
+#endif  //ENABLE_FIBER_SUPPORT
+
+        if (s5wol == 0)
+                tp->wol_enabled = WOL_DISABLED;
+
+        rtl8168_close(dev);
+        rtl8168_disable_msi(pdev, tp);
+
+        rtnl_unlock();
+
+        if (system_state == SYSTEM_POWER_OFF) {
+                pci_clear_master(tp->pci_dev);
+                rtl8168_sleep_rx_enable(dev);
+                pci_wake_from_d3(pdev, tp->wol_enabled);
+                pci_set_power_state(pdev, PCI_D3hot);
+        }
+}
+#endif
+
+/**
+ *  rtl8168_get_stats - Get rtl8168 read/write statistics
+ *  @dev: The Ethernet Device to get statistics for
+ *
+ *  Get TX/RX statistics for rtl8168
+ */
+static struct
+net_device_stats *rtl8168_get_stats(struct net_device *dev)
+{
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
+        struct rtl8168_private *tp = netdev_priv(dev);
+#endif
+        return &RTLDEV->stats;
+}
+
+#ifdef CONFIG_PM
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11)
+static int
+rtl8168_suspend(struct pci_dev *pdev, u32 state)
+#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
+static int
+rtl8168_suspend(struct device *device)
+#else
+static int
+rtl8168_suspend(struct pci_dev *pdev, pm_message_t state)
+#endif
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
+        struct pci_dev *pdev = to_pci_dev(device);
+#endif
+        struct net_device *dev = pci_get_drvdata(pdev);
+        struct rtl8168_private *tp = netdev_priv(dev);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
+        u32 pci_pm_state = pci_choose_state(pdev, state);
+#endif
+        if (!netif_running(dev))
+                goto out;
+
+        //rtl8168_cancel_schedule_work(dev);
+
+        //rtl8168_delete_esd_timer(dev, &tp->esd_timer);
+
+        //rtl8168_delete_link_timer(dev, &tp->link_timer);
+
+        rtnl_lock();
+
+        set_bit(R8168_FLAG_DOWN, tp->task_flags);
+
+        netif_carrier_off(dev);
+
+        netif_tx_disable(dev);
+
+        netif_device_detach(dev);
+
+        rtl8168_dsm(dev, DSM_NIC_GOTO_D3);
+
+        rtl8168_hw_reset(dev);
+
+        pci_clear_master(pdev);
+
+        rtl8168_hw_d3_para(dev);
+
+#ifdef ENABLE_FIBER_SUPPORT
+        rtl8168_hw_fiber_nic_d3_para(tp);
+#endif  //ENABLE_FIBER_SUPPORT
+
+        rtl8168_powerdown_pll(dev);
+
+        rtl8168_sleep_rx_enable(dev);
+
+        rtnl_unlock();
+
+out:
+        if (HW_DASH_SUPPORT_DASH(tp))
+                rtl8168_driver_stop(tp);
+
+        pci_disable_device(pdev);
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
+        pci_save_state(pdev, &pci_pm_state);
+#else
+        pci_save_state(pdev);
+#endif
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
+        pci_enable_wake(pdev, pci_choose_state(pdev, state), tp->wol_enabled);
+#endif
+
+        pci_prepare_to_sleep(pdev);
+
+        return 0;
+}
+
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
+static int
+rtl8168_resume(struct pci_dev *pdev)
+#else
+static int
+rtl8168_resume(struct device *device)
+#endif
+{
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
+        struct pci_dev *pdev = to_pci_dev(device);
+#endif
+        struct net_device *dev = pci_get_drvdata(pdev);
+        struct rtl8168_private *tp = netdev_priv(dev);
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
+        u32 pci_pm_state = PCI_D0;
+#endif
+        int err;
+
+        rtnl_lock();
+
+        err = pci_enable_device(pdev);
+        if (err) {
+                dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
+                goto out_unlock;
+        }
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
+        pci_restore_state(pdev, &pci_pm_state);
+#else
+        pci_restore_state(pdev);
+#endif
+        pci_enable_wake(pdev, PCI_D0, 0);
+
+        /* restore last modified mac address */
+        rtl8168_rar_set(tp, dev->dev_addr);
+
+        if (!netif_running(dev)) {
+                if (HW_DASH_SUPPORT_DASH(tp)) {
+                        rtl8168_driver_start(tp);
+                }
+                goto out_unlock;
+        }
+
+        pci_set_master(pdev);
+
+        rtl8168_exit_oob(dev);
+
+        rtl8168_dsm(dev, DSM_NIC_RESUME_D3);
+
+        rtl8168_hw_init(dev);
+
+        rtl8168_powerup_pll(dev);
+
+        rtl8168_hw_ephy_config(dev);
+
+        rtl8168_hw_phy_config(dev);
+
+        rtl8168_hw_config(dev);
+
+        clear_bit(R8168_FLAG_DOWN, tp->task_flags);
+
+        rtl8168_schedule_reset_work(tp);
+
+        rtl8168_schedule_esd_work(tp);
+
+        rtl8168_schedule_linkchg_work(tp);
+
+        //mod_timer(&tp->esd_timer, jiffies + RTL8168_ESD_TIMEOUT);
+        //mod_timer(&tp->link_timer, jiffies + RTL8168_LINK_TIMEOUT);
+out_unlock:
+        netif_device_attach(dev);
+
+        rtnl_unlock();
+
+        return err;
+}
+
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
+
+static struct dev_pm_ops rtl8168_pm_ops = {
+        .suspend = rtl8168_suspend,
+        .resume = rtl8168_resume,
+        .freeze = rtl8168_suspend,
+        .thaw = rtl8168_resume,
+        .poweroff = rtl8168_suspend,
+        .restore = rtl8168_resume,
+};
+
+#define RTL8168_PM_OPS (&rtl8168_pm_ops)
+
+#endif
+
+#else /* !CONFIG_PM */
+
+#define RTL8168_PM_OPS NULL
+
+#endif /* CONFIG_PM */
+
+static struct pci_driver rtl8168_pci_driver = {
+        .name       = MODULENAME,
+        .id_table   = rtl8168_pci_tbl,
+        .probe      = rtl8168_init_one,
+        .remove     = __devexit_p(rtl8168_remove_one),
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,11)
+        .shutdown   = rtl8168_shutdown,
+#endif
+#ifdef CONFIG_PM
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
+        .suspend    = rtl8168_suspend,
+        .resume     = rtl8168_resume,
+#else /* CONFIG_PM */
+        .driver.pm  = RTL8168_PM_OPS,
+#endif
+#endif /* CONFIG_PM */
+};
+
+static int __init
+rtl8168_init_module(void)
+{
+#ifdef ENABLE_R8168_PROCFS
+        rtl8168_proc_module_init();
+#endif
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
+        return pci_register_driver(&rtl8168_pci_driver);
+#else
+        return pci_module_init(&rtl8168_pci_driver);
+#endif
+}
+
+static void __exit
+rtl8168_cleanup_module(void)
+{
+        pci_unregister_driver(&rtl8168_pci_driver);
+#ifdef ENABLE_R8168_PROCFS
+        if (rtl8168_proc) {
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
+                remove_proc_subtree(MODULENAME, init_net.proc_net);
+#else
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)
+                remove_proc_entry(MODULENAME, init_net.proc_net);
+#else
+                remove_proc_entry(MODULENAME, proc_net);
+#endif  //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)
+#endif  //LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
+                rtl8168_proc = NULL;
+        }
+#endif
+}
+
+module_init(rtl8168_init_module);
+module_exit(rtl8168_cleanup_module);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_realwow.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_realwow.h
new file mode 100644
index 000000000000..d3fb2e7143ac
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_realwow.h
@@ -0,0 +1,118 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+################################################################################
+#
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see <http://www.gnu.org/licenses/>.
+#
+# Author:
+# Realtek NIC software team <nicfae@realtek.com>
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ *  This product is covered by one or more of the following patents:
+ *  US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+#ifndef _LINUX_R8168_REALWOW_H
+#define _LINUX_R8168_REALWOW_H
+
+#define SIOCDEVPRIVATE_RTLREALWOW   SIOCDEVPRIVATE+3
+
+#define MAX_RealWoW_KCP_SIZE (100)
+#define MAX_RealWoW_Payload (64)
+
+#define KA_TX_PACKET_SIZE (100)
+#define KA_WAKEUP_PATTERN_SIZE (120)
+
+//HwSuppKeepAliveOffloadVer
+#define HW_SUPPORT_KCP_OFFLOAD(_M)        ((_M)->HwSuppKCPOffloadVer > 0)
+
+enum rtl_realwow_cmd {
+
+        RTL_REALWOW_SET_KCP_DISABLE=0,
+        RTL_REALWOW_SET_KCP_INFO,
+        RTL_REALWOW_SET_KCP_CONTENT,
+
+        RTL_REALWOW_SET_KCP_ACKPKTINFO,
+        RTL_REALWOW_SET_KCP_WPINFO,
+        RTL_REALWOW_SET_KCPDHCP_TIMEOUT,
+
+        RTLT_REALWOW_COMMAND_INVALID
+};
+
+struct rtl_realwow_ioctl_struct {
+        __u32	cmd;
+        __u32	offset;
+        __u32	len;
+        union {
+                __u32	data;
+                void *data_buffer;
+        };
+};
+
+typedef struct _MP_KCPInfo {
+        u8 DIPv4[4];
+        u8 MacID[6];
+        u16 UdpPort[2];
+        u8 PKTLEN[2];
+
+        u16 ackLostCnt;
+        u8 KCP_WakePattern[MAX_RealWoW_Payload];
+        u8 KCP_AckPacket[MAX_RealWoW_Payload];
+        u32 KCP_interval;
+        u8 KCP_WakePattern_Len;
+        u8 KCP_AckPacket_Len;
+        u8 KCP_TxPacket[2][KA_TX_PACKET_SIZE];
+} MP_KCP_INFO, *PMP_KCP_INFO;
+
+typedef struct _KCPInfo {
+        u32 nId; // = id
+        u8 DIPv4[4];
+        u8 MacID[6];
+        u16 UdpPort;
+        u16 PKTLEN;
+} KCPInfo, *PKCPInfo;
+
+typedef struct _KCPContent {
+        u32 id; // = id
+        u32 mSec; // = msec
+        u32 size; // =size
+        u8 bPacket[MAX_RealWoW_KCP_SIZE]; // put packet here
+} KCPContent, *PKCPContent;
+
+typedef struct _RealWoWAckPktInfo {
+        u16 ackLostCnt;
+        u16 patterntSize;
+        u8 pattern[MAX_RealWoW_Payload];
+} RealWoWAckPktInfo,*PRealWoWAckPktInfo;
+
+typedef struct _RealWoWWPInfo {
+        u16 patterntSize;
+        u8 pattern[MAX_RealWoW_Payload];
+} RealWoWWPInfo,*PRealWoWWPInfo;
+
+int rtl8168_realwow_ioctl(struct net_device *dev, struct ifreq *ifr);
+void rtl8168_realwow_hw_init(struct net_device *dev);
+void rtl8168_get_realwow_hw_version(struct net_device *dev);
+void rtl8168_set_realwow_d3_para(struct net_device *dev);
+
+#endif /* _LINUX_R8168_REALWOW_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_rss.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_rss.c
new file mode 100644
index 000000000000..bf44a15c734e
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_rss.c
@@ -0,0 +1,439 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+################################################################################
+#
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see <http://www.gnu.org/licenses/>.
+#
+# Author:
+# Realtek NIC software team <nicfae@realtek.com>
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ *  This product is covered by one or more of the following patents:
+ *  US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+#include <linux/version.h>
+#include "r8168.h"
+
+enum rtl8168_rss_register_content {
+        /* RSS */
+        RSS_CTRL_TCP_IPV4_SUPP = (1 << 0),
+        RSS_CTRL_IPV4_SUPP  = (1 << 1),
+        RSS_CTRL_TCP_IPV6_SUPP  = (1 << 2),
+        RSS_CTRL_IPV6_SUPP  = (1 << 3),
+        RSS_CTRL_IPV6_EXT_SUPP  = (1 << 4),
+        RSS_CTRL_TCP_IPV6_EXT_SUPP  = (1 << 5),
+        RSS_HALF_SUPP  = (1 << 7),
+        RSS_QUAD_CPU_EN  = (1 << 16),
+        RSS_HQ_Q_SUP_R  = (1 << 31),
+};
+
+static int rtl8168_get_rss_hash_opts(struct rtl8168_private *tp,
+                                     struct ethtool_rxnfc *cmd)
+{
+        cmd->data = 0;
+
+        /* Report default options for RSS */
+        switch (cmd->flow_type) {
+        case TCP_V4_FLOW:
+                cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
+        /* fallthrough */
+        case IPV4_FLOW:
+                cmd->data |= RXH_IP_SRC | RXH_IP_DST;
+                break;
+        case TCP_V6_FLOW:
+                cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
+        /* fallthrough */
+        case IPV6_FLOW:
+                cmd->data |= RXH_IP_SRC | RXH_IP_DST;
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
+int rtl8168_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
+                      u32 *rule_locs)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int ret = -EOPNOTSUPP;
+
+        netif_info(tp, drv, tp->dev, "rss get rxnfc\n");
+
+        if (!(dev->features & NETIF_F_RXHASH))
+                return ret;
+
+        switch (cmd->cmd) {
+        case ETHTOOL_GRXRINGS:
+                cmd->data = rtl8168_tot_rx_rings(tp);
+                ret = 0;
+                break;
+        case ETHTOOL_GRXFH:
+                ret = rtl8168_get_rss_hash_opts(tp, cmd);
+                break;
+        default:
+                break;
+        }
+
+        return ret;
+}
+
+u32 rtl8168_rss_indir_tbl_entries(struct rtl8168_private *tp)
+{
+        return tp->HwSuppIndirTblEntries;
+}
+
+#define RSS_MASK_BITS_OFFSET (8)
+static int _rtl8168_set_rss_hash_opt(struct rtl8168_private *tp)
+{
+        u32 hash_mask_len;
+        u32 rss_ctrl;
+
+        /* Perform hash on these packet types */
+        rss_ctrl = RSS_CTRL_TCP_IPV4_SUPP
+                   | RSS_CTRL_IPV4_SUPP
+                   | RSS_CTRL_IPV6_SUPP
+                   | RSS_CTRL_IPV6_EXT_SUPP
+                   | RSS_CTRL_TCP_IPV6_SUPP
+                   | RSS_CTRL_TCP_IPV6_EXT_SUPP;
+
+        if (R8168_MULTI_RSS_4Q(tp))
+                rss_ctrl |= RSS_QUAD_CPU_EN;
+
+        hash_mask_len = ilog2(rtl8168_rss_indir_tbl_entries(tp));
+        hash_mask_len &= (BIT_0 | BIT_1 | BIT_2);
+        rss_ctrl |= hash_mask_len << RSS_MASK_BITS_OFFSET;
+
+        rtl8168_eri_write(tp, RSS_CTRL_8168, 4, rss_ctrl, ERIAR_ExGMAC);
+
+        return 0;
+}
+
+static int rtl8168_set_rss_hash_opt(struct rtl8168_private *tp,
+                                    struct ethtool_rxnfc *nfc)
+{
+        u32 rss_flags = tp->rss_flags;
+
+        netif_info(tp, drv, tp->dev, "rss set hash\n");
+
+        /*
+         * RSS does not support anything other than hashing
+         * to queues on src and dst IPs and ports
+         */
+        if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
+                          RXH_L4_B_0_1 | RXH_L4_B_2_3))
+                return -EINVAL;
+
+        switch (nfc->flow_type) {
+        case TCP_V4_FLOW:
+        case TCP_V6_FLOW:
+                if (!(nfc->data & RXH_IP_SRC) ||
+                    !(nfc->data & RXH_IP_DST) ||
+                    !(nfc->data & RXH_L4_B_0_1) ||
+                    !(nfc->data & RXH_L4_B_2_3))
+                        return -EINVAL;
+                break;
+        case SCTP_V4_FLOW:
+        case AH_ESP_V4_FLOW:
+        case AH_V4_FLOW:
+        case ESP_V4_FLOW:
+        case SCTP_V6_FLOW:
+        case AH_ESP_V6_FLOW:
+        case AH_V6_FLOW:
+        case ESP_V6_FLOW:
+        case IP_USER_FLOW:
+        case ETHER_FLOW:
+                /* RSS is not supported for these protocols */
+                if (nfc->data) {
+                        netif_err(tp, drv, tp->dev, "Command parameters not supported\n");
+                        return -EINVAL;
+                }
+                return 0;
+        default:
+                return -EINVAL;
+        }
+
+        /* if we changed something we need to update flags */
+        if (rss_flags != tp->rss_flags) {
+                u32 rss_ctrl = rtl8168_eri_read(tp, RSS_CTRL_8168, 4, ERIAR_ExGMAC);
+
+                tp->rss_flags = rss_flags;
+
+                /* Perform hash on these packet types */
+                rss_ctrl |= RSS_CTRL_TCP_IPV4_SUPP
+                            | RSS_CTRL_IPV4_SUPP
+                            | RSS_CTRL_IPV6_SUPP
+                            | RSS_CTRL_IPV6_EXT_SUPP
+                            | RSS_CTRL_TCP_IPV6_SUPP
+                            | RSS_CTRL_TCP_IPV6_EXT_SUPP;
+
+                if (R8168_MULTI_RSS_4Q(tp))
+                        rss_ctrl |= RSS_QUAD_CPU_EN;
+                else
+                        rss_ctrl &= ~RSS_QUAD_CPU_EN;
+
+                rtl8168_eri_write(tp, RSS_CTRL_8168, 4, rss_ctrl, ERIAR_ExGMAC);
+        }
+
+        return 0;
+}
+
+int rtl8168_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        int ret = -EOPNOTSUPP;
+
+        netif_info(tp, drv, tp->dev, "rss set rxnfc\n");
+
+        if (!(dev->features & NETIF_F_RXHASH))
+                return ret;
+
+        switch (cmd->cmd) {
+        case ETHTOOL_SRXFH:
+                ret = rtl8168_set_rss_hash_opt(tp, cmd);
+                break;
+        default:
+                break;
+        }
+
+        return ret;
+}
+
+static u32 _rtl8168_get_rxfh_key_size(struct rtl8168_private *tp)
+{
+        return sizeof(tp->rss_key);
+}
+
+u32 rtl8168_get_rxfh_key_size(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        netif_info(tp, drv, tp->dev, "rss get key size\n");
+
+        if (!(dev->features & NETIF_F_RXHASH))
+                return 0;
+
+        return _rtl8168_get_rxfh_key_size(tp);
+}
+
+u32 rtl8168_rss_indir_size(struct net_device *dev)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        netif_info(tp, drv, tp->dev, "rss get indir tbl size\n");
+
+        if (!(dev->features & NETIF_F_RXHASH))
+                return 0;
+
+        return rtl8168_rss_indir_tbl_entries(tp);
+}
+
+static void rtl8168_get_reta(struct rtl8168_private *tp, u32 *indir)
+{
+        int i, reta_size = rtl8168_rss_indir_tbl_entries(tp);
+
+        for (i = 0; i < reta_size; i++)
+                indir[i] = tp->rss_indir_tbl[i];
+}
+
+int rtl8168_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
+                     u8 *hfunc)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+
+        netif_info(tp, drv, tp->dev, "rss get rxfh\n");
+
+        if (!(dev->features & NETIF_F_RXHASH))
+                return -EOPNOTSUPP;
+
+        if (hfunc)
+                *hfunc = ETH_RSS_HASH_TOP;
+
+        if (indir)
+                rtl8168_get_reta(tp, indir);
+
+        if (key)
+                memcpy(key, tp->rss_key, RTL8168_RSS_KEY_SIZE);
+
+        return 0;
+}
+
+static u32 rtl8168_rss_key_reg(struct rtl8168_private *tp)
+{
+        return RSS_KEY_8168;
+}
+
+static u32 rtl8168_rss_indir_tbl_reg(struct rtl8168_private *tp)
+{
+        return Rss_indir_tbl;
+}
+
+static void rtl8168_store_reta(struct rtl8168_private *tp)
+{
+        u32 reta_entries = rtl8168_rss_indir_tbl_entries(tp);
+        u16 indir_tbl_reg = rtl8168_rss_indir_tbl_reg(tp);
+        u32 hw_indir[RTL8168_RSS_INDIR_TBL_SIZE] = {0};
+        u8 *indir = tp->rss_indir_tbl;
+        u32 bit_on_cnt = 0x00000001;
+        u32 i, j;
+
+        /* Mapping redirection table to HW */
+        for (i = 0, j = 0; i < reta_entries; i++) {
+                if ((indir[i] & 2) && R8168_MULTI_RSS_4Q(tp))
+                        hw_indir[j + 4] |= bit_on_cnt;
+                if (indir[i] & 1)
+                        hw_indir[j] |= bit_on_cnt;
+
+                if (bit_on_cnt == 0x80000000) {
+                        bit_on_cnt = 0x00000001;
+                        j++;
+                        continue;
+                }
+                bit_on_cnt <<= 1;
+        }
+
+        /* Write redirection table to HW */
+        for (i = 0; i < RTL8168_RSS_INDIR_TBL_SIZE; i++)
+                RTL_W32(tp, indir_tbl_reg + i*4, hw_indir[i]);
+}
+
+static void rtl8168_store_rss_key(struct rtl8168_private *tp)
+{
+        const u16 rss_key_reg = rtl8168_rss_key_reg(tp);
+        u32 i, rss_key_size = _rtl8168_get_rxfh_key_size(tp);
+        u32 *rss_key = (u32*)tp->rss_key;
+
+        /* Write redirection table to HW */
+        for (i = 0; i < rss_key_size; i+=4)
+                rtl8168_eri_write(tp, rss_key_reg + i, 4, *rss_key++, ERIAR_ExGMAC);
+}
+
+int rtl8168_set_rxfh(struct net_device *dev, const u32 *indir,
+                     const u8 *key, const u8 hfunc)
+{
+        struct rtl8168_private *tp = netdev_priv(dev);
+        u32 reta_entries = rtl8168_rss_indir_tbl_entries(tp);
+        int i;
+
+        netif_info(tp, drv, tp->dev, "rss set rxfh\n");
+
+        /* We require at least one supported parameter to be changed and no
+         * change in any of the unsupported parameters
+         */
+        if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
+                return -EOPNOTSUPP;
+
+        /* Fill out the redirection table */
+        if (indir) {
+                int max_queues = tp->num_rx_rings;
+
+                /* Verify user input. */
+                for (i = 0; i < reta_entries; i++)
+                        if (indir[i] >= max_queues)
+                                return -EINVAL;
+
+                for (i = 0; i < reta_entries; i++)
+                        tp->rss_indir_tbl[i] = indir[i];
+        }
+
+        /* Fill out the rss hash key */
+        if (key)
+                memcpy(tp->rss_key, key, RTL8168_RSS_KEY_SIZE);
+
+        rtl8168_store_reta(tp);
+
+        rtl8168_store_rss_key(tp);
+
+        return 0;
+}
+
+static u32 rtl8168_get_rx_desc_hash(struct rtl8168_private *tp,
+                                    struct RxDescV2 *desc)
+{
+        if (!desc->RSSResult)
+                udelay(1);
+        return le32_to_cpu(desc->RSSResult);
+}
+
+#define RXS_8168_RSS_IPV4 BIT(17)
+#define RXS_8168_RSS_IPV6 BIT(18)
+#define RXS_8168_RSS_TCP BIT(19)
+#define RTL8168_RXS_RSS_L3_TYPE_MASK (RXS_8168_RSS_IPV4 | RXS_8168_RSS_IPV6)
+#define RTL8168_RXS_RSS_L4_TYPE_MASK (RXS_8168_RSS_TCP)
+void rtl8168_rx_hash(struct rtl8168_private *tp,
+                     struct RxDescV2 *desc,
+                     struct sk_buff *skb)
+{
+        u32 rss_header_info;
+
+        if (!(tp->dev->features & NETIF_F_RXHASH))
+                return;
+
+        rss_header_info = le32_to_cpu(desc->opts2);
+
+        if (!(rss_header_info & RTL8168_RXS_RSS_L3_TYPE_MASK))
+                return;
+
+        skb_set_hash(skb, rtl8168_get_rx_desc_hash(tp, desc),
+                     (RTL8168_RXS_RSS_L4_TYPE_MASK & rss_header_info) ?
+                     PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
+}
+
+void rtl8168_disable_rss(struct rtl8168_private *tp)
+{
+        rtl8168_eri_write(tp, RSS_CTRL_8168, 4, 0x00000000, ERIAR_ExGMAC);
+}
+
+void _rtl8168_config_rss(struct rtl8168_private *tp)
+{
+        _rtl8168_set_rss_hash_opt(tp);
+
+        rtl8168_store_reta(tp);
+
+        rtl8168_store_rss_key(tp);
+}
+
+void rtl8168_config_rss(struct rtl8168_private *tp)
+{
+        if (!HW_RSS_SUPPORT_RSS(tp))
+                return;
+
+        if (!tp->EnableRss) {
+                rtl8168_disable_rss(tp);
+                return;
+        }
+
+        _rtl8168_config_rss(tp);
+}
+
+void rtl8168_init_rss(struct rtl8168_private *tp)
+{
+        int i;
+
+        for (i = 0; i < rtl8168_rss_indir_tbl_entries(tp); i++)
+                tp->rss_indir_tbl[i] = ethtool_rxfh_indir_default(i, tp->num_rx_rings);
+
+        netdev_rss_key_fill(tp->rss_key, RTL8168_RSS_KEY_SIZE);
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_rss.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_rss.h
new file mode 100644
index 000000000000..77c8320412c5
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_rss.h
@@ -0,0 +1,66 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+################################################################################
+#
+# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see <http://www.gnu.org/licenses/>.
+#
+# Author:
+# Realtek NIC software team <nicfae@realtek.com>
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ *  This product is covered by one or more of the following patents:
+ *  US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+#ifndef _LINUX_RTL8168_RSS_H
+#define _LINUX_RTL8168_RSS_H
+
+#include <linux/netdevice.h>
+#include <linux/types.h>
+
+#define RTL8168_RSS_INDIR_TBL_SIZE 8
+#define RTL8168_RSS_KEY_SIZE     40  /* size of RSS Hash Key in bytes */
+#define RTL8168_MAX_INDIRECTION_TABLE_ENTRIES 128
+
+struct rtl8168_private;
+struct RxDescV2;
+
+int rtl8168_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
+                      u32 *rule_locs);
+int rtl8168_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd);
+u32 rtl8168_get_rxfh_key_size(struct net_device *netdev);
+u32 rtl8168_rss_indir_size(struct net_device *netdev);
+int rtl8168_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
+                     u8 *hfunc);
+int rtl8168_set_rxfh(struct net_device *netdev, const u32 *indir,
+                     const u8 *key, const u8 hfunc);
+void rtl8168_rx_hash(struct rtl8168_private *tp,
+                     struct RxDescV2 *desc,
+                     struct sk_buff *skb);
+void _rtl8168_config_rss(struct rtl8168_private *tp);
+void rtl8168_config_rss(struct rtl8168_private *tp);
+void rtl8168_init_rss(struct rtl8168_private *tp);
+u32 rtl8168_rss_indir_tbl_entries(struct rtl8168_private *tp);
+void rtl8168_disable_rss(struct rtl8168_private *tp);
+
+#endif /* _LINUX_RTL8168_RSS_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtl_eeprom.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtl_eeprom.c
new file mode 100644
index 000000000000..1f361a15af01
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtl_eeprom.c
@@ -0,0 +1,289 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+################################################################################
+#
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see <http://www.gnu.org/licenses/>.
+#
+# Author:
+# Realtek NIC software team <nicfae@realtek.com>
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ *  This product is covered by one or more of the following patents:
+ *  US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/ethtool.h>
+#include <linux/netdevice.h>
+#include <linux/delay.h>
+
+#include <asm/io.h>
+
+#include "r8168.h"
+#include "rtl_eeprom.h"
+
+//-------------------------------------------------------------------
+//rtl8168_eeprom_type():
+//  tell the eeprom type
+//return value:
+//  0: the eeprom type is 93C46
+//  1: the eeprom type is 93C56 or 93C66
+//-------------------------------------------------------------------
+void rtl8168_eeprom_type(struct rtl8168_private *tp)
+{
+        u16 magic = 0;
+
+        if (tp->mcfg == CFG_METHOD_DEFAULT)
+                goto out_no_eeprom;
+
+        if(RTL_R8(tp, 0xD2)&0x04) {
+                //not support
+                //tp->eeprom_type = EEPROM_TWSI;
+                //tp->eeprom_len = 256;
+                goto out_no_eeprom;
+        } else if(RTL_R32(tp, RxConfig) & RxCfg_9356SEL) {
+                tp->eeprom_type = EEPROM_TYPE_93C56;
+                tp->eeprom_len = 256;
+        } else {
+                tp->eeprom_type = EEPROM_TYPE_93C46;
+                tp->eeprom_len = 128;
+        }
+
+        magic = rtl8168_eeprom_read_sc(tp, 0);
+
+out_no_eeprom:
+        if ((magic != 0x8129) && (magic != 0x8128)) {
+                tp->eeprom_type = EEPROM_TYPE_NONE;
+                tp->eeprom_len = 0;
+        }
+}
+
+void rtl8168_eeprom_cleanup(struct rtl8168_private *tp)
+{
+        u8 x;
+
+        x = RTL_R8(tp, Cfg9346);
+        x &= ~(Cfg9346_EEDI | Cfg9346_EECS);
+
+        RTL_W8(tp, Cfg9346, x);
+
+        rtl8168_raise_clock(tp, &x);
+        rtl8168_lower_clock(tp, &x);
+}
+
+int rtl8168_eeprom_cmd_done(struct rtl8168_private *tp)
+{
+        u8 x;
+        int i;
+
+        rtl8168_stand_by(tp);
+
+        for (i = 0; i < 50000; i++) {
+                x = RTL_R8(tp, Cfg9346);
+
+                if (x & Cfg9346_EEDO) {
+                        udelay(RTL_CLOCK_RATE * 2 * 3);
+                        return 0;
+                }
+                udelay(1);
+        }
+
+        return -1;
+}
+
+//-------------------------------------------------------------------
+//rtl8168_eeprom_read_sc():
+//  read one word from eeprom
+//-------------------------------------------------------------------
+u16 rtl8168_eeprom_read_sc(struct rtl8168_private *tp, u16 reg)
+{
+        int addr_sz = 6;
+        u8 x;
+        u16 data;
+
+        if(tp->eeprom_type == EEPROM_TYPE_NONE) {
+                return -1;
+        }
+
+        if (tp->eeprom_type==EEPROM_TYPE_93C46)
+                addr_sz = 6;
+        else if (tp->eeprom_type==EEPROM_TYPE_93C56)
+                addr_sz = 8;
+
+        x = Cfg9346_EEM1 | Cfg9346_EECS;
+        RTL_W8(tp, Cfg9346, x);
+
+        rtl8168_shift_out_bits(tp, RTL_EEPROM_READ_OPCODE, 3);
+        rtl8168_shift_out_bits(tp, reg, addr_sz);
+
+        data = rtl8168_shift_in_bits(tp);
+
+        rtl8168_eeprom_cleanup(tp);
+
+        RTL_W8(tp, Cfg9346, 0);
+
+        return data;
+}
+
+//-------------------------------------------------------------------
+//rtl8168_eeprom_write_sc():
+//  write one word to a specific address in the eeprom
+//-------------------------------------------------------------------
+void rtl8168_eeprom_write_sc(struct rtl8168_private *tp, u16 reg, u16 data)
+{
+        u8 x;
+        int addr_sz = 6;
+        int w_dummy_addr = 4;
+
+        if(tp->eeprom_type == EEPROM_TYPE_NONE) {
+                return ;
+        }
+
+        if (tp->eeprom_type==EEPROM_TYPE_93C46) {
+                addr_sz = 6;
+                w_dummy_addr = 4;
+        } else if (tp->eeprom_type==EEPROM_TYPE_93C56) {
+                addr_sz = 8;
+                w_dummy_addr = 6;
+        }
+
+        x = Cfg9346_EEM1 | Cfg9346_EECS;
+        RTL_W8(tp, Cfg9346, x);
+
+        rtl8168_shift_out_bits(tp, RTL_EEPROM_EWEN_OPCODE, 5);
+        rtl8168_shift_out_bits(tp, reg, w_dummy_addr);
+        rtl8168_stand_by(tp);
+
+        rtl8168_shift_out_bits(tp, RTL_EEPROM_ERASE_OPCODE, 3);
+        rtl8168_shift_out_bits(tp, reg, addr_sz);
+        if (rtl8168_eeprom_cmd_done(tp) < 0) {
+                return;
+        }
+        rtl8168_stand_by(tp);
+
+        rtl8168_shift_out_bits(tp, RTL_EEPROM_WRITE_OPCODE, 3);
+        rtl8168_shift_out_bits(tp, reg, addr_sz);
+        rtl8168_shift_out_bits(tp, data, 16);
+        if (rtl8168_eeprom_cmd_done(tp) < 0) {
+                return;
+        }
+        rtl8168_stand_by(tp);
+
+        rtl8168_shift_out_bits(tp, RTL_EEPROM_EWDS_OPCODE, 5);
+        rtl8168_shift_out_bits(tp, reg, w_dummy_addr);
+
+        rtl8168_eeprom_cleanup(tp);
+        RTL_W8(tp, Cfg9346, 0);
+}
+
+void rtl8168_raise_clock(struct rtl8168_private *tp, u8 *x)
+{
+        *x = *x | Cfg9346_EESK;
+        RTL_W8(tp, Cfg9346, *x);
+        udelay(RTL_CLOCK_RATE);
+}
+
+void rtl8168_lower_clock(struct rtl8168_private *tp, u8 *x)
+{
+
+        *x = *x & ~Cfg9346_EESK;
+        RTL_W8(tp, Cfg9346, *x);
+        udelay(RTL_CLOCK_RATE);
+}
+
+void rtl8168_shift_out_bits(struct rtl8168_private *tp, int data, int count)
+{
+        u8 x;
+        int  mask;
+
+        mask = 0x01 << (count - 1);
+        x = RTL_R8(tp, Cfg9346);
+        x &= ~(Cfg9346_EEDI | Cfg9346_EEDO);
+
+        do {
+                if (data & mask)
+                        x |= Cfg9346_EEDI;
+                else
+                        x &= ~Cfg9346_EEDI;
+
+                RTL_W8(tp, Cfg9346, x);
+                udelay(RTL_CLOCK_RATE);
+                rtl8168_raise_clock(tp, &x);
+                rtl8168_lower_clock(tp, &x);
+                mask = mask >> 1;
+        } while(mask);
+
+        x &= ~Cfg9346_EEDI;
+        RTL_W8(tp, Cfg9346, x);
+}
+
+u16 rtl8168_shift_in_bits(struct rtl8168_private *tp)
+{
+        u8 x;
+        u16 d, i;
+
+        x = RTL_R8(tp, Cfg9346);
+        x &= ~(Cfg9346_EEDI | Cfg9346_EEDO);
+
+        d = 0;
+
+        for (i = 0; i < 16; i++) {
+                d = d << 1;
+                rtl8168_raise_clock(tp, &x);
+
+                x = RTL_R8(tp, Cfg9346);
+                x &= ~Cfg9346_EEDI;
+
+                if (x & Cfg9346_EEDO)
+                        d |= 1;
+
+                rtl8168_lower_clock(tp, &x);
+        }
+
+        return d;
+}
+
+void rtl8168_stand_by(struct rtl8168_private *tp)
+{
+        u8 x;
+
+        x = RTL_R8(tp, Cfg9346);
+        x &= ~(Cfg9346_EECS | Cfg9346_EESK);
+        RTL_W8(tp, Cfg9346, x);
+        udelay(RTL_CLOCK_RATE);
+
+        x |= Cfg9346_EECS;
+        RTL_W8(tp, Cfg9346, x);
+}
+
+void rtl8168_set_eeprom_sel_low(struct rtl8168_private *tp)
+{
+        RTL_W8(tp, Cfg9346, Cfg9346_EEM1);
+        RTL_W8(tp, Cfg9346, Cfg9346_EEM1 | Cfg9346_EESK);
+
+        udelay(20);
+
+        RTL_W8(tp, Cfg9346, Cfg9346_EEM1);
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtl_eeprom.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtl_eeprom.h
new file mode 100644
index 000000000000..cf42fb60855c
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtl_eeprom.h
@@ -0,0 +1,56 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+################################################################################
+#
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see <http://www.gnu.org/licenses/>.
+#
+# Author:
+# Realtek NIC software team <nicfae@realtek.com>
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ *  This product is covered by one or more of the following patents:
+ *  US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+//EEPROM opcodes
+#define RTL_EEPROM_READ_OPCODE      06
+#define RTL_EEPROM_WRITE_OPCODE     05
+#define RTL_EEPROM_ERASE_OPCODE     07
+#define RTL_EEPROM_EWEN_OPCODE      19
+#define RTL_EEPROM_EWDS_OPCODE      16
+
+#define RTL_CLOCK_RATE  3
+
+void rtl8168_eeprom_type(struct rtl8168_private *tp);
+void rtl8168_eeprom_cleanup(struct rtl8168_private *tp);
+u16 rtl8168_eeprom_read_sc(struct rtl8168_private *tp, u16 reg);
+void rtl8168_eeprom_write_sc(struct rtl8168_private *tp, u16 reg, u16 data);
+void rtl8168_shift_out_bits(struct rtl8168_private *tp, int data, int count);
+u16 rtl8168_shift_in_bits(struct rtl8168_private *tp);
+void rtl8168_raise_clock(struct rtl8168_private *tp, u8 *x);
+void rtl8168_lower_clock(struct rtl8168_private *tp, u8 *x);
+void rtl8168_stand_by(struct rtl8168_private *tp);
+void rtl8168_set_eeprom_sel_low(struct rtl8168_private *tp);
+
+
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtltool.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtltool.c
new file mode 100644
index 000000000000..a6a98c83163b
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtltool.c
@@ -0,0 +1,232 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+################################################################################
+#
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see <http://www.gnu.org/licenses/>.
+#
+# Author:
+# Realtek NIC software team <nicfae@realtek.com>
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ *  This product is covered by one or more of the following patents:
+ *  US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/pci.h>
+#include <linux/netdevice.h>
+#include <linux/delay.h>
+#include <linux/in.h>
+#include <linux/ethtool.h>
+#include <asm/uaccess.h>
+#include "r8168.h"
+#include "rtl_eeprom.h"
+#include "rtltool.h"
+
+int rtl8168_tool_ioctl(struct rtl8168_private *tp, struct ifreq *ifr)
+{
+        struct rtltool_cmd my_cmd;
+        int ret;
+
+        if (copy_from_user(&my_cmd, ifr->ifr_data, sizeof(my_cmd)))
+                return -EFAULT;
+
+        ret = 0;
+        switch (my_cmd.cmd) {
+        case RTLTOOL_READ_MAC:
+                if (my_cmd.len==1)
+                        my_cmd.data = readb(tp->mmio_addr+my_cmd.offset);
+                else if (my_cmd.len==2)
+                        my_cmd.data = readw(tp->mmio_addr+(my_cmd.offset&~1));
+                else if (my_cmd.len==4)
+                        my_cmd.data = readl(tp->mmio_addr+(my_cmd.offset&~3));
+                else {
+                        ret = -EOPNOTSUPP;
+                        break;
+                }
+
+                if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
+                        ret = -EFAULT;
+                        break;
+                }
+                break;
+        case RTLTOOL_WRITE_MAC:
+                if (my_cmd.len==1)
+                        writeb(my_cmd.data, tp->mmio_addr+my_cmd.offset);
+                else if (my_cmd.len==2)
+                        writew(my_cmd.data, tp->mmio_addr+(my_cmd.offset&~1));
+                else if (my_cmd.len==4)
+                        writel(my_cmd.data, tp->mmio_addr+(my_cmd.offset&~3));
+                else {
+                        ret = -EOPNOTSUPP;
+                        break;
+                }
+                break;
+        case RTLTOOL_READ_PHY:
+                my_cmd.data = rtl8168_mdio_prot_read(tp, my_cmd.offset);
+                if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
+                        ret = -EFAULT;
+                        break;
+                }
+                break;
+        case RTLTOOL_WRITE_PHY:
+                rtl8168_mdio_prot_write(tp, my_cmd.offset, my_cmd.data);
+                break;
+        case RTLTOOL_READ_EPHY:
+                my_cmd.data = rtl8168_ephy_read(tp, my_cmd.offset);
+                if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
+                        ret = -EFAULT;
+                        break;
+                }
+                break;
+        case RTLTOOL_WRITE_EPHY:
+                rtl8168_ephy_write(tp, my_cmd.offset, my_cmd.data);
+                break;
+        case RTLTOOL_READ_ERI:
+                my_cmd.data = 0;
+                if (my_cmd.len==1 || my_cmd.len==2 || my_cmd.len==4) {
+                        my_cmd.data = rtl8168_eri_read(tp, my_cmd.offset, my_cmd.len, ERIAR_ExGMAC);
+                } else {
+                        ret = -EOPNOTSUPP;
+                        break;
+                }
+
+                if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
+                        ret = -EFAULT;
+                        break;
+                }
+                break;
+        case RTLTOOL_WRITE_ERI:
+                if (my_cmd.len==1 || my_cmd.len==2 || my_cmd.len==4) {
+                        rtl8168_eri_write(tp, my_cmd.offset, my_cmd.len, my_cmd.data, ERIAR_ExGMAC);
+                } else {
+                        ret = -EOPNOTSUPP;
+                        break;
+                }
+                break;
+        case RTLTOOL_READ_PCI:
+                my_cmd.data = 0;
+                if (my_cmd.len==1)
+                        pci_read_config_byte(tp->pci_dev, my_cmd.offset,
+                                             (u8 *)&my_cmd.data);
+                else if (my_cmd.len==2)
+                        pci_read_config_word(tp->pci_dev, my_cmd.offset,
+                                             (u16 *)&my_cmd.data);
+                else if (my_cmd.len==4)
+                        pci_read_config_dword(tp->pci_dev, my_cmd.offset,
+                                              &my_cmd.data);
+                else {
+                        ret = -EOPNOTSUPP;
+                        break;
+                }
+
+                if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
+                        ret = -EFAULT;
+                        break;
+                }
+                break;
+        case RTLTOOL_WRITE_PCI:
+                if (my_cmd.len==1)
+                        pci_write_config_byte(tp->pci_dev, my_cmd.offset,
+                                              my_cmd.data);
+                else if (my_cmd.len==2)
+                        pci_write_config_word(tp->pci_dev, my_cmd.offset,
+                                              my_cmd.data);
+                else if (my_cmd.len==4)
+                        pci_write_config_dword(tp->pci_dev, my_cmd.offset,
+                                               my_cmd.data);
+                else {
+                        ret = -EOPNOTSUPP;
+                        break;
+                }
+                break;
+        case RTLTOOL_READ_EEPROM:
+                my_cmd.data = rtl8168_eeprom_read_sc(tp, my_cmd.offset);
+                if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
+                        ret = -EFAULT;
+                        break;
+                }
+                break;
+        case RTLTOOL_WRITE_EEPROM:
+                rtl8168_eeprom_write_sc(tp, my_cmd.offset, my_cmd.data);
+                break;
+        case RTL_READ_OOB_MAC:
+                rtl8168_oob_mutex_lock(tp);
+                my_cmd.data = rtl8168_ocp_read(tp, my_cmd.offset, 4);
+                rtl8168_oob_mutex_unlock(tp);
+
+                if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
+                        ret = -EFAULT;
+                        break;
+                }
+                break;
+        case RTL_WRITE_OOB_MAC:
+                if (my_cmd.len == 0 || my_cmd.len > 4)
+                        return -EOPNOTSUPP;
+
+                rtl8168_oob_mutex_lock(tp);
+                rtl8168_ocp_write(tp, my_cmd.offset, my_cmd.len, my_cmd.data);
+                rtl8168_oob_mutex_unlock(tp);
+                break;
+        case RTL_ENABLE_PCI_DIAG:
+                tp->rtk_enable_diag = 1;
+                dprintk("enable rtk diag\n");
+                break;
+        case RTL_DISABLE_PCI_DIAG:
+                tp->rtk_enable_diag = 0;
+                dprintk("disable rtk diag\n");
+                break;
+        case RTL_READ_MAC_OCP:
+                if (my_cmd.offset % 2)
+                        return -EOPNOTSUPP;
+
+                my_cmd.data = rtl8168_mac_ocp_read(tp, my_cmd.offset);
+                if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
+                        ret = -EFAULT;
+                        break;
+                }
+                break;
+        case RTL_WRITE_MAC_OCP:
+                if ((my_cmd.offset % 2) || (my_cmd.len != 2))
+                        return -EOPNOTSUPP;
+
+                rtl8168_mac_ocp_write(tp, my_cmd.offset, (u16)my_cmd.data);
+                break;
+        case RTL_DIRECT_READ_PHY_OCP:
+                my_cmd.data = rtl8168_mdio_prot_direct_read_phy_ocp(tp, my_cmd.offset);
+                if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
+                        ret = -EFAULT;
+                        break;
+                }
+                break;
+        case RTL_DIRECT_WRITE_PHY_OCP:
+                rtl8168_mdio_prot_direct_write_phy_ocp(tp, my_cmd.offset, my_cmd.data);
+                break;
+        default:
+                ret = -EOPNOTSUPP;
+                break;
+        }
+
+        return ret;
+}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtltool.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtltool.h
new file mode 100644
index 000000000000..7988810acd29
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtltool.h
@@ -0,0 +1,86 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+################################################################################
+#
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
+# controllers with PCI-Express interface.
+#
+# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option)
+# any later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+# more details.
+#
+# You should have received a copy of the GNU General Public License along with
+# this program; if not, see <http://www.gnu.org/licenses/>.
+#
+# Author:
+# Realtek NIC software team <nicfae@realtek.com>
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
+#
+################################################################################
+*/
+
+/************************************************************************************
+ *  This product is covered by one or more of the following patents:
+ *  US6,570,884, US6,115,776, and US6,327,625.
+ ***********************************************************************************/
+
+#ifndef _LINUX_RTLTOOL_H
+#define _LINUX_RTLTOOL_H
+
+#define SIOCRTLTOOL		SIOCDEVPRIVATE+1
+
+enum rtl_cmd {
+        RTLTOOL_READ_MAC=0,
+        RTLTOOL_WRITE_MAC,
+        RTLTOOL_READ_PHY,
+        RTLTOOL_WRITE_PHY,
+        RTLTOOL_READ_EPHY,
+        RTLTOOL_WRITE_EPHY,
+        RTLTOOL_READ_ERI,
+        RTLTOOL_WRITE_ERI,
+        RTLTOOL_READ_PCI,
+        RTLTOOL_WRITE_PCI,
+        RTLTOOL_READ_EEPROM,
+        RTLTOOL_WRITE_EEPROM,
+
+        RTL_READ_OOB_MAC,
+        RTL_WRITE_OOB_MAC,
+
+        RTL_ENABLE_PCI_DIAG,
+        RTL_DISABLE_PCI_DIAG,
+
+        RTL_READ_MAC_OCP,
+        RTL_WRITE_MAC_OCP,
+
+        RTL_DIRECT_READ_PHY_OCP,
+        RTL_DIRECT_WRITE_PHY_OCP,
+
+        RTLTOOL_INVALID
+};
+
+struct rtltool_cmd {
+        __u32	cmd;
+        __u32	offset;
+        __u32	len;
+        __u32	data;
+};
+
+enum mode_access {
+        MODE_NONE=0,
+        MODE_READ,
+        MODE_WRITE
+};
+
+#ifdef __KERNEL__
+int rtl8168_tool_ioctl(struct rtl8168_private *tp, struct ifreq *ifr);
+#endif
+
+#endif /* _LINUX_RTLTOOL_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pcie.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pcie.c
index aedcc78dab90..baabfb5cd4d0 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pcie.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_fpga_pcie.c
@@ -8,8 +8,9 @@
 #include <linux/device.h>
 #include <linux/pci.h>
 
-#define FPGA_MSI_IRQ_NUM            (14)
 #define FPGA_MSI_IRQ_BEGIN          (0)
+#define FPGA_MSI_IRQ_MAX            (32)
+#define FPGA_MSI_IRQ_MIN            (16)
 #define XILINX_FPGA_USE_MSI         (0)
 #define XILINX_FPGA_NUSE_MSI        (1)
 
@@ -68,7 +69,7 @@ static int fpga_pcie_probe(struct pci_dev *pdev, const struct pci_device_id *id)
     int err;
     wb_fpga_pcie_t *wb_fpga_pcie;
 
-    FPGA_PCIE_DEV_VERBOSE("Enter vendor 0x%x, subsystem_vendor 0x%x.\n", pdev->vendor, pdev->subsystem_vendor);
+    FPGA_PCIE_DEV_VERBOSE("Enter vendor 0x%x, device 0x%x.\n", pdev->vendor, pdev->device);
 
     wb_fpga_pcie = devm_kzalloc(&pdev->dev, sizeof(wb_fpga_pcie_t), GFP_KERNEL);
     if (!wb_fpga_pcie) {
@@ -96,17 +97,18 @@ static int fpga_pcie_probe(struct pci_dev *pdev, const struct pci_device_id *id)
     if (wb_fpga_pcie->driver_data == XILINX_FPGA_USE_MSI) {
         FPGA_PCIE_DEV_VERBOSE("start pci_enable_msi_range!\n");
 #if LINUX_VERSION_CODE < KERNEL_VERSION(4,19,152)
-        err = pci_enable_msi_range(pdev, FPGA_MSI_IRQ_BEGIN + 1, FPGA_MSI_IRQ_NUM);
+        err = pci_enable_msi_range(pdev, FPGA_MSI_IRQ_BEGIN + 1, FPGA_MSI_IRQ_MAX);
 #else
         err = pci_alloc_irq_vectors_affinity(pdev, FPGA_MSI_IRQ_BEGIN + 1,
-                FPGA_MSI_IRQ_NUM, PCI_IRQ_MSI, NULL);
+                FPGA_MSI_IRQ_MAX, PCI_IRQ_MSI, NULL);
 #endif
-        if (err != FPGA_MSI_IRQ_NUM) {
+        if ((err > FPGA_MSI_IRQ_MAX) || (err < FPGA_MSI_IRQ_MIN)) {
             FPGA_PCIE_DEV_ERROR("pci_enable_msi_block err %d FPGA_MSI_IRQ_NUM %d.\n", err,
-                FPGA_MSI_IRQ_NUM);
+                FPGA_MSI_IRQ_MAX);
             dev_err(&pdev->dev, "Failed to enable pci msi, ret:%d.\n", err);
             return -EINVAL;
         }
+        FPGA_PCIE_DEV_VERBOSE("pci_enable_msi success, ret: %d\n", err);
     }
 
     dev_info(&pdev->dev, "fpga pci device init success.\n");
@@ -132,6 +134,9 @@ static void fpga_pcie_remove(struct pci_dev *pdev)
 static const struct pci_device_id fpga_pci_ids[] = {
         { PCI_DEVICE(0x10ee, 0x7022), .driver_data = XILINX_FPGA_USE_MSI},
         { PCI_DEVICE(0x10ee, 0x7011), .driver_data = XILINX_FPGA_NUSE_MSI},
+        { PCI_DEVICE(0x1ded, 0x7022), .driver_data = XILINX_FPGA_USE_MSI},
+        { PCI_DEVICE(0x1ded, 0x7021), .driver_data = XILINX_FPGA_USE_MSI},
+        { PCI_DEVICE(0x1ded, 0x5220), .driver_data = XILINX_FPGA_USE_MSI},
         {0}
 };
 MODULE_DEVICE_TABLE(pci, fpga_pci_ids);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c
index df786c1a9452..20f8954cce83 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.c
@@ -82,6 +82,8 @@ typedef struct wb_pci_dev_s {
     uint32_t bus;
     uint32_t slot;
     uint32_t fn;
+    uint32_t check_pci_id;
+    uint32_t pci_id;
 } wb_pci_dev_t;
 
 /*
@@ -886,6 +888,7 @@ MODULE_DEVICE_TABLE(of, ocores_i2c_match);
 static int fpga_ocores_i2c_get_irq(struct ocores_i2c *i2c)
 {
     int devfn, irq;
+    uint32_t pci_id;
     struct device *dev;
     wb_pci_dev_t *wb_pci_dev;
     struct pci_dev *pci_dev;
@@ -907,6 +910,14 @@ static int fpga_ocores_i2c_get_irq(struct ocores_i2c *i2c)
             ret = -EINVAL;
             return ret;
         }
+        ret = of_property_read_u32(dev->of_node, "check_pci_id", &wb_pci_dev->check_pci_id);
+        if (ret == 0) {
+            ret = of_property_read_u32(dev->of_node, "pci_id", &wb_pci_dev->pci_id);
+            if (ret != 0) {
+                OCORES_I2C_ERROR("need to check pci id, but pci id not config.\n");
+                return -EINVAL;
+            }
+        }
     } else {
         if (i2c->dev->platform_data == NULL) {
             OCORES_I2C_ERROR("Failed to get platform data config.\n");
@@ -918,6 +929,8 @@ static int fpga_ocores_i2c_get_irq(struct ocores_i2c *i2c)
         wb_pci_dev->bus = i2c_ocores_device->pci_bus;
         wb_pci_dev->slot = i2c_ocores_device->pci_slot;
         wb_pci_dev->fn = i2c_ocores_device->pci_fn;
+        wb_pci_dev->check_pci_id = i2c_ocores_device->check_pci_id;
+        wb_pci_dev->pci_id = i2c_ocores_device->pci_id;
     }
 
     OCORES_I2C_VERBOSE("pci_domain:0x%x, pci_bus:0x%x, pci_slot:0x%x, pci_fn:0x%x.\n",
@@ -930,8 +943,18 @@ static int fpga_ocores_i2c_get_irq(struct ocores_i2c *i2c)
             wb_pci_dev->domain, wb_pci_dev->bus, devfn);
         return -ENODEV;
     }
+    if (wb_pci_dev->check_pci_id == 1) {
+        pci_id = (pci_dev->vendor << 16) | pci_dev->device;
+        if (wb_pci_dev->pci_id != pci_id) {
+            OCORES_I2C_ERROR("Failed to check pci id, except: 0x%x, really: 0x%x\n",
+                wb_pci_dev->pci_id, pci_id);
+            return -ENXIO;
+        }
+        OCORES_I2C_VERBOSE("pci id check ok, pci_id: 0x%x", pci_id);
+    }
+
     irq = pci_dev->irq + i2c->irq_offset;
-    OCORES_I2C_VERBOSE("get irq no:%d.\n", irq);
+    OCORES_I2C_VERBOSE("get irq no: %d.\n", irq);
     return irq;
 }
 
@@ -1073,10 +1096,10 @@ static int ocores_i2c_probe(struct platform_device *pdev)
 
                 i2c->flags |= OCORES_FLAG_POLL;
             } else {
-
+                i2c->irq_offset = i2c_ocores_device->irq_offset;
                 irq = fpga_ocores_i2c_get_irq(i2c);
                 if (irq < 0 ) {
-                    dev_err(i2c->dev, "Failed to get  ocores i2c irq number, ret: %d.\n", irq);
+                    dev_err(i2c->dev, "Failed to get ocores i2c irq number, ret: %d.\n", irq);
                     ret = irq;
                     goto out;
                 }
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.h
index acd2710a92f0..d413ebb3ad44 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_i2c_ocores.h
@@ -22,6 +22,8 @@ typedef struct i2c_ocores_device_s {
     uint32_t pci_bus;
     uint32_t pci_slot;
     uint32_t pci_fn;
+    uint32_t check_pci_id;
+    uint32_t pci_id;
     int device_flag;
 } i2c_ocores_device_t;
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c
index cd62b7d7ee40..093d070fd429 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.c
@@ -63,6 +63,8 @@ typedef struct wb_pci_dev_s {
     uint32_t bar_len;
     uint32_t bar_flag;
     uint32_t bus_width;
+    uint32_t check_pci_id;
+    uint32_t pci_id;
     struct miscdevice misc;
     void (*setreg)(struct wb_pci_dev_s *wb_pci_dev, int reg, u32 value);
     u32 (*getreg)(struct wb_pci_dev_s *wb_pci_dev, int reg);
@@ -614,6 +616,7 @@ static int pci_setup_bars(wb_pci_dev_t *wb_pci_dev, struct pci_dev *dev)
 static int pci_dev_probe(struct platform_device *pdev)
 {
     int ret, devfn;
+    uint32_t pci_id;
     wb_pci_dev_t *wb_pci_dev;
     struct pci_dev *pci_dev;
     struct miscdevice *misc;
@@ -649,12 +652,20 @@ static int pci_dev_probe(struct platform_device *pdev)
         ret += of_property_read_u32(pdev->dev.of_node, "upg_flash_base", &firmware_upg->upg_flash_base);
         if (ret != 0) {
             PCIE_DEV_DEBUG_VERBOSE("dts don't adaptive fpga upg related, ret:%d.\n", ret);
-            firmware_upg->upg_ctrl_base  = -1;
+            firmware_upg->upg_ctrl_base = -1;
             firmware_upg->upg_flash_base = -1;
         } else {
             PCIE_DEV_DEBUG_VERBOSE("upg_ctrl_base:0x%04x, upg_flash_base:0x%02x.\n",
                 firmware_upg->upg_ctrl_base, firmware_upg->upg_flash_base);
         }
+        ret = of_property_read_u32(pdev->dev.of_node, "check_pci_id", &wb_pci_dev->check_pci_id);
+        if (ret == 0) {
+            ret = of_property_read_u32(pdev->dev.of_node, "pci_id", &wb_pci_dev->pci_id);
+            if (ret != 0) {
+                dev_err(&pdev->dev, "Failed to get pci_id, ret:%d.\n", ret);
+                return -ENXIO;
+            }
+        }
     } else {
         if (pdev->dev.platform_data == NULL) {
             dev_err(&pdev->dev, "Failed to get platform data config.\n");
@@ -668,6 +679,8 @@ static int pci_dev_probe(struct platform_device *pdev)
         wb_pci_dev->fn = pci_dev_device->pci_fn;
         wb_pci_dev->bar = pci_dev_device->pci_bar;
         wb_pci_dev->bus_width = pci_dev_device->bus_width;
+        wb_pci_dev->check_pci_id = pci_dev_device->check_pci_id;
+        wb_pci_dev->pci_id = pci_dev_device->pci_id;
         firmware_upg->upg_ctrl_base = pci_dev_device->upg_ctrl_base;
         firmware_upg->upg_flash_base = pci_dev_device->upg_flash_base;
         PCIE_DEV_DEBUG_VERBOSE("upg_ctrl_base:0x%04x, upg_flash_base:0x%02x.\n",
@@ -685,6 +698,15 @@ static int pci_dev_probe(struct platform_device *pdev)
             wb_pci_dev->domain, wb_pci_dev->bus, devfn);
         return -ENXIO;
     }
+    if (wb_pci_dev->check_pci_id == 1) {
+        pci_id = (pci_dev->vendor << 16) | pci_dev->device;
+        if (wb_pci_dev->pci_id != pci_id) {
+            dev_err(&pdev->dev, "Failed to check pci id, except: 0x%x, really: 0x%x\n",
+                wb_pci_dev->pci_id, pci_id);
+            return -ENXIO;
+        }
+        PCIE_DEV_DEBUG_VERBOSE("pci id check ok, pci_id: 0x%x", pci_id);
+    }
     ret = pci_setup_bars(wb_pci_dev, pci_dev);
     if (ret != 0) {
         dev_err(&pdev->dev, "Failed to get pci bar address.\n");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.h
index 9ba0f3b457ea..33da8d475f91 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.h
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_pcie_dev.h
@@ -18,6 +18,8 @@ typedef struct pci_dev_device_s {
     int pci_fn;
     int pci_bar;
     int bus_width;
+    uint32_t check_pci_id;
+    uint32_t pci_id;
     int upg_ctrl_base;
     int upg_flash_base;
     int device_flag;
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c
index 602428a55859..51c5b4143df8 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_xdpe132g5c.c
@@ -325,12 +325,17 @@ static ssize_t xdpe_avs_vout_store(struct device *dev, struct device_attribute *
     long vout, vout_max, vout_min;
 
     client = to_i2c_client(dev);
-    ret = kstrtol(buf, 10, &vout);
+    ret = kstrtol(buf, 0, &vout);
     if (ret) {
         WB_XDPE_ERROR("%d-%04x: invalid value: %s \n", client->adapter->nr, client->addr, buf);
         return -EINVAL;
     }
 
+    if (vout <= 0) {
+        WB_XDPE_ERROR("%d-%04x: invalid value: %ld \n", client->adapter->nr, client->addr, vout);
+        return -EINVAL;
+    }
+
     data = i2c_get_clientdata(client);
     vout_max = data->vout_max;
     vout_min = data->vout_min;
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/avscontrol.py b/platform/broadcom/sonic-platform-modules-micas/common/script/avscontrol.py
index a0a2ccaac938..1f367133a89b 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/avscontrol.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/avscontrol.py
@@ -164,7 +164,7 @@ def doAvsCtrol(avs_conf):
         ret, log = doAvsCtrol_single(avs_conf)
         if ret is True:
             return True, log
-        time.sleep(1)
+        time.sleep(10)
     return False, log
 
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py
index d5b72f48f51b..bd25231d9273 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py
@@ -91,7 +91,7 @@ def print_cputemp_sensors():
         print_info_str += toptile + '\n'
         for item in val_ret:
             print_info_str += formatstr.format(**item) + '\n'
-    print_console(print_info_str)
+        print_console(print_info_str)
 
 
 def print_boardtemp():
@@ -106,7 +106,7 @@ def print_boardtemp():
         for item in val_ret:
             realformat = formatstr if item.get('errcode', 0) == 0 else errformat
             print_info_str += realformat.format(**item) + '\n'
-    print_console(print_info_str)
+        print_console(print_info_str)
 
 
 def print_mactemp_sensors():
@@ -167,7 +167,7 @@ def print_fan_sensor():
             else:
                 realformat = fan_signle_rotor_format if item.get('errcode', 0) == 0 else errformat
             print_info_str += realformat.format(**item)
-    print_console(print_info_str)
+        print_console(print_info_str)
 
 
 def print_psu_sensor():
@@ -237,11 +237,17 @@ def print_boarddcdc():
     print_info_str = ""
     toptile = "Onboard DCDC Sensors:"
     errformat = "    {id:<26} : {errmsg}"
-    formatstr = "    {id:<26} : {dcdc_input:<6} {dcdc_unit:<1} (Min = {dcdc_min:<6} {dcdc_unit:<1}, Max = {dcdc_max:<6} {dcdc_unit:<1})"
+    ok_formatstr = "    {id:<26} : {dcdc_input:<6} {dcdc_unit:<1} (Min = {dcdc_min:<6} {dcdc_unit:<1}, Max = {dcdc_max:<6} {dcdc_unit:<1})"
+    nok_formatstr = "    {id:<26} : {dcdc_input:<6} {dcdc_unit:<1} (Min = {dcdc_min:<6} {dcdc_unit:<1}, Max = {dcdc_max:<6} {dcdc_unit:<1}) ({dcdc_status:<6})"
 
     if len(val_ret) != 0:
         print_info_str += toptile + '\n'
         for item in val_ret:
+            if float(item["dcdc_input"]) > float(item["dcdc_max"]) or float(item["dcdc_input"]) < float(item["dcdc_min"]):
+                item["dcdc_status"] = "NOT OK"
+                formatstr = nok_formatstr
+            else:
+                formatstr = ok_formatstr
             realformat = formatstr if item.get('errcode', 0) == 0 else errformat
             print_info_str += realformat.format(**item) + '\n'
         print_console(print_info_str)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/subnetwork.py b/platform/broadcom/sonic-platform-modules-micas/common/script/subnetwork.py
new file mode 100755
index 000000000000..5f9df14c8696
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/subnetwork.py
@@ -0,0 +1,59 @@
+#!/usr/bin/env python3
+# -*- coding: UTF-8 -*-
+import os
+import re
+import subprocess
+import sys
+import time
+
+
+def start():
+    subnet_path = "/sys/class/net/eth0.4088"
+    retry_count = 10
+    subnet_cmds = []
+    subnet_cmds.append("ip link add link eth0 name eth0.4088 type vlan id 4088")
+    subnet_cmds.append("ip addr add 240.1.1.1/30 brd 240.1.1.3 dev eth0.4088")
+    subnet_cmds.append("ip link set dev eth0.4088 up")
+
+    retry = 0
+    while not os.path.exists(subnet_path) and retry < retry_count:
+        try:
+            for cmd in subnet_cmds:
+                subprocess.run(cmd.split(), check=True)
+        except subprocess.CalledProcessError as e:
+            print("Start subnetwork Failed, retrying: %d, cmd: %s, returncode: %d" % (retry, cmd, e.returncode))
+        retry = retry + 1
+        time.sleep(5)
+
+    if os.path.exists(subnet_path):
+        print("Start subnetwork Success.")
+
+
+def stop():
+    subnet_path = "/sys/class/net/eth0.4088"
+    subnet_cmds = []
+    subnet_cmds.append("ip link set dev eth0.4088 down")
+    subnet_cmds.append("ip link del eth0.4088")
+
+    try:
+        for cmd in subnet_cmds:
+            subprocess.run(cmd.split(), check=True)
+    except subprocess.CalledProcessError as e:
+        print("Stop subnetwork Failed, returncode: " + e.returncode)
+
+    if not os.path.exists(subnet_path):
+        print("Stop subnetwork Success.")
+
+
+def main():
+    print(sys.argv[1])
+    if sys.argv[1] == 'start':
+        start()
+    elif sys.argv[1] == 'stop':
+        stop()
+    else:
+        print("Error parameter!\nRequired parameters : start or stop.")
+
+
+if __name__ == '__main__':
+    main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/service/subnetwork.service b/platform/broadcom/sonic-platform-modules-micas/common/service/subnetwork.service
new file mode 100755
index 000000000000..666046592116
--- /dev/null
+++ b/platform/broadcom/sonic-platform-modules-micas/common/service/subnetwork.service
@@ -0,0 +1,13 @@
+[Unit]
+Description=Configuration eth0.4088 subnetwork
+After=network.target
+DefaultDependencies=no
+
+[Service]
+Type=oneshot
+ExecStart=/usr/local/bin/subnetwork.py start
+ExecStop=/usr/local/bin/subnetwork.py stop
+RemainAfterExit=yes
+
+[Install]
+WantedBy=multi-user.target
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py
index f8d4bbebe1a9..c693ad9f0ac5 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/fan.py
@@ -281,11 +281,7 @@ def get_target_speed(self):
             # get fan rotor pwm
             pwm = int(self.int_case.get_fan_speed_pwm(self.name, self.fan_index))
         else:
-            psu_status_dict = self.int_case.get_psu_status(self.name)
-            if psu_status_dict["InputStatus"] is False:
-                pwm = 0
-            else:
-                pwm = self.get_speed()  # target equal to real pwm, to avoid alarm
+            pwm = self.get_speed()  # target equal to real pwm, to avoid alarm
         if pwm is None:
             return None
         return int(pwm)
diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/rules b/platform/broadcom/sonic-platform-modules-micas/debian/rules
index e801ef47f459..bfb787932816 100755
--- a/platform/broadcom/sonic-platform-modules-micas/debian/rules
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/rules
@@ -45,7 +45,10 @@ COMPILE_WHL: $(COMPILE_DIRS)
 		cp -r $(MOD_SRC_DIR)/common/lib/plat_hal $(MOD_SRC_DIR)/$${mod}/; \
 		cp -r $(MOD_SRC_DIR)/common/lib/wbutil $(MOD_SRC_DIR)/$${mod}/; \
 		cp -r $(MOD_SRC_DIR)/common/lib/eepromutil $(MOD_SRC_DIR)/$${mod}/; \
-		cp -r $(MOD_SRC_DIR)/common/sonic_platform $(MOD_SRC_DIR)/$${mod}/; \
+		cp -r $(MOD_SRC_DIR)/common/lib/restful_util $(MOD_SRC_DIR)/$${mod}/; \
+		if [ $$mod != "m2-w6940-128qc" ]; then \
+			cp -r $(MOD_SRC_DIR)/common/sonic_platform $(MOD_SRC_DIR)/$${mod}/; \
+		fi; \
 		cp $(MOD_SRC_DIR)/common/script/hal_pltfm.py $(MOD_SRC_DIR)/$${mod}/hal_pltfm.py; \
 		cp $(MOD_SRC_DIR)/common/script/platform_util.py $(MOD_SRC_DIR)/$${mod}/platform_util.py; \
 		cp $(MOD_SRC_DIR)/common/script/platform_intf.py $(MOD_SRC_DIR)/$${mod}/platform_intf.py; \
@@ -53,7 +56,10 @@ COMPILE_WHL: $(COMPILE_DIRS)
 		rm -rf $(MOD_SRC_DIR)/$${mod}/plat_hal; \
 		rm -rf $(MOD_SRC_DIR)/$${mod}/wbutil; \
 		rm -rf $(MOD_SRC_DIR)/$${mod}/eepromutil; \
-		rm -rf $(MOD_SRC_DIR)/$${mod}/sonic_platform; \
+		rm -rf $(MOD_SRC_DIR)/$${mod}/restful_util; \
+		if [ $$mod != "m2-w6940-128qc" ]; then \
+			rm -rf $(MOD_SRC_DIR)/$${mod}/sonic_platform; \
+		fi; \
 		rm -rf $(MOD_SRC_DIR)/$${mod}/hal_pltfm.py; \
 		rm -rf $(MOD_SRC_DIR)/$${mod}/platform_intf.py; \
 		rm -rf $(MOD_SRC_DIR)/$${mod}/platform_util.py; \
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
index 587e303a62cd..126337656139 100755
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
@@ -971,12 +971,12 @@
                     {"cmd": "modprobe mtd", "gettype": "cmd"},
                     {"cmd": "modprobe spi_nor", "gettype": "cmd"},
                     {"cmd": "modprobe ofpart", "gettype": "cmd"},
-                    {"cmd": "modprobe intel_spi writeable=1", "gettype": "cmd"},
-                    {"cmd": "modprobe intel_spi_platform writeable=1", "gettype": "cmd"},
+                    {"cmd": "modprobe spi_intel writeable=1", "gettype": "cmd"},
+                    {"cmd": "modprobe spi_intel_platform", "gettype": "cmd"},
                 ],
                 "finish_cmd": [
-                    {"cmd": "rmmod intel_spi_platform", "gettype": "cmd"},
-                    {"cmd": "rmmod intel_spi", "gettype": "cmd"},
+                    {"cmd": "rmmod spi_intel_platform", "gettype": "cmd"},
+                    {"cmd": "rmmod spi_intel", "gettype": "cmd"},
                     {"cmd": "rmmod ofpart", "gettype": "cmd"},
                     {"cmd": "rmmod spi_nor", "gettype": "cmd"},
                     {"cmd": "rmmod mtd", "gettype": "cmd"},

From 31a18d63a40bf24642418ce24749c29eabbf6f1a Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Fri, 5 Jan 2024 17:27:19 +0800
Subject: [PATCH 18/32] fix semgrep error

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../common/modules/linux-5.10/wb_ucd9000.c     |  4 +++-
 .../common/modules/r8168/r8168_n.c             | 18 ++++++++++--------
 2 files changed, 13 insertions(+), 9 deletions(-)

diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ucd9000.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ucd9000.c
index c451105050b3..6d60b9d876c2 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ucd9000.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ucd9000.c
@@ -19,6 +19,8 @@
 #include <linux/delay.h>
 #include "wb_pmbus.h"
 
+#define mem_clear(data, size) memset((data), 0, (size))
+
 enum chips { ucd9000, ucd90120, ucd90124, ucd90160, ucd90320, ucd9090,
          ucd90910 };
 
@@ -117,7 +119,7 @@ static int wb_i2c_smbus_read_block_data_tmp(const struct i2c_client *client, u8
         return -ENOMEM;
     }
 
-    memset(msg, 0, sizeof(msg));
+    mem_clear(msg, sizeof(msg));
     msg[0].addr = client->addr;
     msg[0].buf = &command;
     msg[0].len = 1;
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_n.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_n.c
index 19ae62bec6e6..f57d3d6d8ec6 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_n.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_n.c
@@ -121,6 +121,8 @@
 #define FIRMWARE_8168FP_3   "rtl_nic/rtl8168fp-3.fw"
 #define FIRMWARE_8168FP_4   "rtl_nic/rtl8168fp-4.fw"
 
+#define mem_clear(data, size) memset((data), 0, (size))
+
 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
    The RTL chips use a 64 element hash table based on the Ethernet CRC. */
 static const int multicast_filter_limit = 32;
@@ -4700,7 +4702,7 @@ static void rtl8168_mac_loopback_test(struct rtl8168_private *tp)
         txd->addr = cpu_to_le64(mapping);
         txd->opts2 = 0;
         while (1) {
-                memset(tmpAddr, pattern++, len - 14);
+                mem_clear(tmpAddr, len - 14);
                 dma_sync_single_for_device(&tp->pci_dev->dev,
                                            le64_to_cpu(mapping),
                                            len, DMA_TO_DEVICE);
@@ -6829,7 +6831,7 @@ static void rtl8168_get_regs(struct net_device *dev, struct ethtool_regs *regs,
         if (regs->len < R8168_REGS_DUMP_SIZE)
                 return /* -EINVAL */;
 
-        memset(p, 0, regs->len);
+        mem_clear(p, regs->len);
 
         for (i = 0; i < R8168_MAC_REGS_SIZE; i++)
                 *data++ = readb(ioaddr + i);
@@ -26826,7 +26828,7 @@ static int ethtool_get_drvinfo(struct net_device *dev, void *useraddr)
         if (!ops->get_drvinfo)
                 return -EOPNOTSUPP;
 
-        memset(&info, 0, sizeof(info));
+        mem_clear(&info, sizeof(info));
         info.cmd = ETHTOOL_GDRVINFO;
         ops->get_drvinfo(dev, &info);
 
@@ -29946,7 +29948,7 @@ rtl8168_hw_config(struct net_device *dev)
 #ifdef ENABLE_LIB_SUPPORT
         /* if lib queue not exist, default use rx queue 0 */
         if (rtl8168_num_lib_rx_rings(tp) == 0)
-                memset(tp->rss_indir_tbl, 0x0, sizeof(tp->rss_indir_tbl));
+                mem_clear(tp->rss_indir_tbl, sizeof(tp->rss_indir_tbl));
 #endif //ENABLE_LIB_SUPPORT
         rtl8168_config_rss(tp);
 #endif //ENABLE_RSS_SUPPORT
@@ -30362,7 +30364,7 @@ rtl8168_tx_desc_init(struct rtl8168_private *tp)
 
         for (i = 0; i < tp->num_tx_rings; i++) {
                 struct rtl8168_tx_ring *ring = &tp->tx_ring[i];
-                memset(ring->TxDescArray, 0x0, ring->TxDescAllocSize);
+                mem_clear(ring->TxDescArray, ring->TxDescAllocSize);
 
                 ring->TxDescArray[ring->num_tx_desc - 1].opts1 = cpu_to_le32(RingEnd);
         }
@@ -30401,7 +30403,7 @@ rtl8168_rx_desc_init(struct rtl8168_private *tp)
         if (rtl8168_num_lib_rx_rings(tp) > 0)
                 return;
 
-        memset(tp->RxDescArray, 0x0, tp->RxDescAllocSize);
+        mem_clear(tp->RxDescArray, tp->RxDescAllocSize);
 }
 
 int
@@ -30417,13 +30419,13 @@ rtl8168_init_ring(struct net_device *dev)
 
         for (i = 0; i < tp->num_tx_rings; i++) {
                 struct rtl8168_tx_ring *ring = &tp->tx_ring[i];
-                memset(ring->tx_skb, 0x0, sizeof(ring->tx_skb));
+                mem_clear(ring->tx_skb, sizeof(ring->tx_skb));
         }
 
         for (i = 0; i < tp->num_rx_rings; i++) {
                 struct rtl8168_rx_ring *ring = &tp->rx_ring[i];
 
-                memset(ring->Rx_skbuff, 0x0, sizeof(ring->Rx_skbuff));
+                mem_clear(ring->Rx_skbuff, sizeof(ring->Rx_skbuff));
                 if (rtl8168_rx_fill(tp, ring, dev, 0, tp->num_rx_desc, 0) != tp->num_rx_desc)
                         goto err_out;
 

From d22d139d8a5f71b97beb8fc2c74a8c93aa184a60 Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Sat, 6 Jan 2024 09:35:31 +0800
Subject: [PATCH 19/32] fix compilation error

Signed-off-by: philo <philo@micasnetworks.com>
---
 device/micas/x86_64-micas_m2-w6510-48v8c-r0/default_sku        | 2 +-
 platform/broadcom/sonic-platform-modules-micas/common/Makefile | 1 -
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/default_sku b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/default_sku
index 2135020186ac..921c511b10c6 100644
--- a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/default_sku
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/default_sku
@@ -1 +1 @@
-M2-W6510-48V8C l2
+M2-W6510-48V8C t1
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/Makefile
index 578d65b3bf3e..385dae0884fb 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/common/Makefile
@@ -30,7 +30,6 @@ all:
 	@if [ ! -d ${INSTALL_LIB_DIR} ]; then mkdir -p ${INSTALL_LIB_DIR} ;fi
 	@if [ -d $(PWD)/lib/ ]; then cp -r $(PWD)/lib/* ${INSTALL_LIB_DIR} ;fi
 	@if [ -d $(PWD)/sonic_platform/ ]; then cp -rf $(PWD)/sonic_platform ${INSTALL_LIB_DIR} ;fi
-	cp -r $(app_build_dir)/module/*.ko $(INSTALL_MODULE_DIR)
 	cp -r $(modules_build_dir)/*.ko $(INSTALL_MODULE_DIR)
 	cp -r $(app_dir)/build/app/*  $(INSTALL_SCRIPT_DIR)
 	cp -r $(SCRIPT_DIR)/*  $(INSTALL_SCRIPT_DIR)

From 11a1aee7f60392b2d195f059c290b58b1c177e36 Mon Sep 17 00:00:00 2001
From: Philo <135693886+philo-micas@users.noreply.github.com>
Date: Wed, 10 Jan 2024 16:32:10 +0800
Subject: [PATCH 20/32] Update rules.mk

---
 platform/broadcom/rules.mk | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/platform/broadcom/rules.mk b/platform/broadcom/rules.mk
index 7bcba5ccd1f2..15073c3d89a0 100755
--- a/platform/broadcom/rules.mk
+++ b/platform/broadcom/rules.mk
@@ -21,9 +21,8 @@ include $(PLATFORM_PATH)/platform-modules-quanta.mk
 #include $(PLATFORM_PATH)/platform-modules-ruijie.mk
 #include $(PLATFORM_PATH)/platform-modules-ragile.mk
 #include $(PLATFORM_PATH)/platform-modules-tencent.mk
-include $(PLATFORM_PATH)/platform-modules-ufispace.mk
-include $(PLATFORM_PATH)/platform-modules-micas.mk
 #include $(PLATFORM_PATH)/platform-modules-ufispace.mk
+include $(PLATFORM_PATH)/platform-modules-micas.mk
 include $(PLATFORM_PATH)/docker-syncd-brcm.mk
 include $(PLATFORM_PATH)/docker-syncd-brcm-rpc.mk
 include $(PLATFORM_PATH)/docker-saiserver-brcm.mk

From d0d13cc17a9b7ab3d45314d4596deee4a4df540c Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Fri, 23 Feb 2024 10:49:47 +0800
Subject: [PATCH 21/32] update device files

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../platform_components.json                     | 16 ++++++++++++++++
 .../plugins/ssd_util.py                          | 13 ++++++++++---
 2 files changed, 26 insertions(+), 3 deletions(-)
 create mode 100644 device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_components.json

diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_components.json b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_components.json
new file mode 100644
index 000000000000..8040c1a267e2
--- /dev/null
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/platform_components.json
@@ -0,0 +1,16 @@
+{
+    "chassis": {
+        "M2-W6510-48V8C": {
+            "component": {
+                "CPU_CPLD": { },
+                "CONNECT_CPLD": { },
+                "CONNECT_CPLD-FAN": { },
+                "MAC_CPLD1": { },
+                "MAC_CPLD2": { },
+                "FPGA": { },
+                "BIOS": { }
+            }
+        }
+    }
+}
+
diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/plugins/ssd_util.py b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/plugins/ssd_util.py
index 89d3ccd770bd..932867b34ff7 100755
--- a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/plugins/ssd_util.py
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/plugins/ssd_util.py
@@ -67,7 +67,8 @@ def __init__(self, diskdev):
              "SSDSCK"       : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n233\s+(.+?)\n" },
              "SM619GXC"     : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n169\s+(.+?)\n" },
              "MZNLH"        : { "temperature" : "\n190\s+(.+?)\n", "remainingLife" : "\n245\s+(.+?)\n" },
-             "IM2S3134N"    : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n231\s+(.+?)\n" }
+             "IM2S3134N"    : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n231\s+(.+?)\n" },
+             "MTFDDAV240TCB-1AR1ZABAA"    : { "temperature" : "\n194\s+(.+?)\n", "remainingLife" : "\n202\s+(.+?)\n" }
         }
 
         self.key_list = list(self.model_attr.keys())
@@ -203,7 +204,10 @@ def get_health(self):
             A float number of current ssd health
             e.g. 83.5
         """
-        return float(self.health)
+        if self.health == 'N/A':
+            return "NA"
+        else:
+            return float(self.health)
 
     def get_temperature(self):
         """
@@ -213,7 +217,10 @@ def get_temperature(self):
             A float number of current temperature in Celsius
             e.g. 40.1
         """
-        return float(self.temperature)
+        if self.temperature == 'N/A':
+            return 'NA'
+        else:
+            return float(self.temperature)
 
     def get_model(self):
         """

From 05fa49f3919eac6ed32740f808ad2b1644908b06 Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Fri, 15 Mar 2024 18:42:30 +0800
Subject: [PATCH 22/32] triggle rebuld

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../.upgrade_test/cpld_test_header.vme            | Bin 406 -> 0 bytes
 .../.upgrade_test/fpga_test_header.bin            |  10 ----------
 .../m2-w6510-48v8c/Makefile                       |   3 ---
 3 files changed, 13 deletions(-)
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/cpld_test_header.vme
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/fpga_test_header.bin

diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/cpld_test_header.vme b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/cpld_test_header.vme
deleted file mode 100644
index 083fd78f3ea1919d9d3737fe0d8d0c7b8b2ce881..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

literal 406
zcmaiu!AgWc7{^Cl9GwWZEU4QY>mrW2O9%#{v#rqDVj^@}T%AMUt^?Upr*1u1&(K43
z?FnqO2k^UmA0NNppMS~gYSXfp);#POTEzEsNrQ-{S16)+_OzzH_2yb`frh&jGzynN
zocKiSc%1|*>JQ(XrjPMM;vcLbWx(?lMPV9>2xnduTlc0w*NEL#8!^N-$!~cVJr}!X
zU*U-Hx_RHReT%cEsj*`cOSm-1L@17ejCweGWq851n7EkCz1hsO3AQcUK?q#pT+$Q+
zaP`9Ix{m7r0$EYyqaQexPBa5Reu@nVOwPd9@%QJs+)cP9_xx1wT$jWNHKXIBQctQq
VsrNb@^ic_@K=0eZ|8`^i#~;mYW4-_Y

diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/fpga_test_header.bin b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/fpga_test_header.bin
deleted file mode 100644
index bdf9ae2139e2..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/.upgrade_test/fpga_test_header.bin
+++ /dev/null
@@ -1,10 +0,0 @@
-fpga_test_header.bin
-FILEHEADER(
-DEVTYPE=0x404a
-TYPE=fpga
-CHAIN=3
-CHIPNAME=fpga
-VERSION=v0
-FILETYPE=SPI-LOGIC-DEV
-CRC=0x00000000
-)
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile
index 1b84abef410a..052a5a6a0773 100644
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile
@@ -7,7 +7,6 @@ INSTALL_DIR = $(SUB_BUILD_DIR)/$(KERNEL_SRC)/$(INSTALL_MOD_DIR)
 INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
 INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages
 INSTALL_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/plat_sysfs_cfg
-INSTALL_UPGRADE_TEST_DIR = $(SUB_BUILD_DIR)/etc/.upgrade_test
 
 all:
 	$(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules
@@ -19,8 +18,6 @@ all:
 	@if [ -d $(PWD)/hal-config/ ]; then cp -r $(PWD)/hal-config/* ${INSTALL_LIB_DIR} ;fi
 	@if [ ! -d ${INSTALL_SYSFS_CFG_DIR} ]; then mkdir -p ${INSTALL_SYSFS_CFG_DIR} ;fi
 	@if [ -d $(PWD)/plat_sysfs_cfg/ ]; then cp -r $(PWD)/plat_sysfs_cfg/* ${INSTALL_SYSFS_CFG_DIR} ;fi
-	@if [ ! -d ${INSTALL_UPGRADE_TEST_DIR} ]; then mkdir -p ${INSTALL_UPGRADE_TEST_DIR} ;fi
-	@if [ -d $(PWD)/.upgrade_test/ ]; then cp -r $(PWD)/.upgrade_test/* ${INSTALL_UPGRADE_TEST_DIR} ;fi
 clean:
 	rm -f ${DIR_KERNEL_SRC}/*.o ${DIR_KERNEL_SRC}/*.ko ${DIR_KERNEL_SRC}/*.mod.c ${DIR_KERNEL_SRC}/.*.cmd
 	rm -f ${DIR_KERNEL_SRC}/Module.markers ${DIR_KERNEL_SRC}/Module.symvers ${DIR_KERNEL_SRC}/modules.order

From bbe949baa2557c757d63ea57a245427145509b20 Mon Sep 17 00:00:00 2001
From: Philo <135693886+philo-micas@users.noreply.github.com>
Date: Thu, 21 Mar 2024 09:01:25 +0800
Subject: [PATCH 23/32] trigger rebuild

---
 platform/broadcom/sonic-platform-modules-micas/debian/rules | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sonic-platform-modules-micas/debian/rules b/platform/broadcom/sonic-platform-modules-micas/debian/rules
index bfb787932816..baa92b2338e4 100755
--- a/platform/broadcom/sonic-platform-modules-micas/debian/rules
+++ b/platform/broadcom/sonic-platform-modules-micas/debian/rules
@@ -13,7 +13,7 @@ export  INSTALL_MOD_DIR top_srcdir KVERSION  KERNEL_SRC CC  KBUILD_OUTPUT CUSTOM
 
 include $(CUSTOM_RULES_DIR)/rule.mk
 
-#all product need common
+#all products need common
 COMPILE_DIRS = $(MODULE_DIRS)
 
 clean_dirs = $(MODULE_DIRS)

From 31f08e1cdd0b66a3292e66c2896e73dda2e71245 Mon Sep 17 00:00:00 2001
From: Philo <135693886+philo-micas@users.noreply.github.com>
Date: Wed, 24 Apr 2024 08:58:26 +0800
Subject: [PATCH 24/32] Update restful_api.py

---
 .../common/lib/restful_util/restful_api.py                | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/restful_api.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/restful_api.py
index 6caba07d915e..c1e9dd7738b9 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/restful_api.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/restful_api.py
@@ -58,7 +58,6 @@ def post_request(self, url, data, time_out=(30, 30)):
             full_url = self.BmcBaseUrl + url
             self.restful_api_debug_log("POST: %s -d %s" % (full_url, str(data)))
             response = requests.post(full_url, json=data, timeout=time_out)
-            # 检查响应状态码
             if response.status_code == 200:
                 self.restful_api_debug_log("RET: %s" % str(response.json()))
                 return response.json()
@@ -72,25 +71,20 @@ def post_request(self, url, data, time_out=(30, 30)):
 if __name__ == '__main__':
     client = RestfulApiClient()
 
-    # 发送 GET 请求
     time_data = client.get_request(client.TimeUrl)
     print("Current time:", time_data)
 
-    # 获取fans
     fans = client.get_request(client.FansUrl)
     print("Current fans:", fans)
 
-    # 发送 POST 请求
     new_time = "2023-08-31 14:41:28 +0800"
     response = client.post_request(client.TimeUrl, {"time": new_time})
     print("Time set successfully:", response)
 
-    # 发送 POST 请求
     cmd = "bmc reset cold"
     response = client.post_request(client.PowerUrl, {"cmd": cmd})
     print("Time set successfully:", response)
 
-    # 发送 GET 请求
     #sensors = client.get_request(client.SensorsUrl)
     #print("sensors:", sensors)
-'''
\ No newline at end of file
+'''

From 20fe35e45471a1a979a3250a5f0a8b9bb7b43ac8 Mon Sep 17 00:00:00 2001
From: Philo <135693886+philo-micas@users.noreply.github.com>
Date: Sun, 28 Apr 2024 16:26:30 +0800
Subject: [PATCH 25/32] Update restful_api.py

---
 .../common/lib/restful_util/restful_api.py                       | 1 -
 1 file changed, 1 deletion(-)

diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/restful_api.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/restful_api.py
index c1e9dd7738b9..2cb7f5273a44 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/restful_api.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/restful_util/restful_api.py
@@ -6,7 +6,6 @@
 
 import requests
 
-
 class RestfulApiClient():
     Debug_file = "/tmp/restful_api_debug"
     BmcBaseUrl = 'http://240.1.1.2:8080'

From 7101e1218667599fb4d137f80d128ef788ee177a Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Fri, 10 May 2024 15:05:30 +0800
Subject: [PATCH 26/32] Revised according to PR comments

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../common/lib/plat_hal/baseutil.py           |   13 +-
 .../common/modules/Makefile                   |    3 +-
 .../common/modules/linux-5.10/wb_at24.c       |  861 ------------
 .../modules/{linux-5.10 => linux}/Makefile    |    1 -
 .../modules/{linux-5.10 => linux}/wb_csu550.c |    0
 .../{linux-5.10 => linux}/wb_i2c_algo_bit.c   |    0
 .../{linux-5.10 => linux}/wb_i2c_gpio.c       |    0
 .../wb_i2c_gpio_device.c                      |    0
 .../{linux-5.10 => linux}/wb_i2c_i801.c       |    0
 .../{linux-5.10 => linux}/wb_i2c_ismt.c       |    0
 .../wb_i2c_mux_pca954x.c                      |    0
 .../wb_i2c_mux_pca954x.h                      |    0
 .../wb_i2c_mux_pca9641.c                      |    0
 .../wb_i2c_mux_pca9641.h                      |    0
 .../{linux-5.10 => linux}/wb_ina3221.c        |    0
 .../{linux-5.10 => linux}/wb_isl68137.c       |    0
 .../modules/{linux-5.10 => linux}/wb_lm75.c   |    0
 .../modules/{linux-5.10 => linux}/wb_lm75.h   |    0
 .../modules/{linux-5.10 => linux}/wb_pmbus.h  |    0
 .../{linux-5.10 => linux}/wb_pmbus_core.c     |    0
 .../modules/{linux-5.10 => linux}/wb_tmp401.c |    0
 .../{linux-5.10 => linux}/wb_tps53622.c       |    0
 .../{linux-5.10 => linux}/wb_ucd9000.c        |    0
 .../{linux-5.10 => linux}/wb_xdpe12284.c      |    0
 .../wb_xdpe132g5c_pmbus.c                     |    0
 .../common/modules/wb_optoe.c                 | 1192 -----------------
 .../common/script/dev_monitor.py              |    6 +-
 .../common/script/drv_update.py               |    6 +-
 .../common/script/generate_airflow.py         |    8 +-
 .../common/script/hal_fanctrl.py              |    4 +-
 .../script/intelligent_monitor/monitor_fan.py |    5 +-
 .../common/script/platform_driver.py          |    2 +-
 .../common/script/platform_e2.py              |    5 +
 .../common/script/platform_intf.py            |   11 +-
 .../common/script/platform_process.py         |   58 +-
 .../common/script/platform_sensors.py         |    3 +
 .../common/script/platform_util.py            |    2 +-
 .../common/script/set_eth_mac.py              |    6 +-
 .../common/sonic_platform/psu.py              |   29 +
 .../x86_64_micas_m2_w6510_48v8c_r0_config.py  |   28 +-
 40 files changed, 118 insertions(+), 2125 deletions(-)
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_at24.c
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/Makefile (98%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/wb_csu550.c (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/wb_i2c_algo_bit.c (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/wb_i2c_gpio.c (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/wb_i2c_gpio_device.c (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/wb_i2c_i801.c (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/wb_i2c_ismt.c (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/wb_i2c_mux_pca954x.c (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/wb_i2c_mux_pca954x.h (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/wb_i2c_mux_pca9641.c (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/wb_i2c_mux_pca9641.h (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/wb_ina3221.c (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/wb_isl68137.c (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/wb_lm75.c (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/wb_lm75.h (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/wb_pmbus.h (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/wb_pmbus_core.c (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/wb_tmp401.c (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/wb_tps53622.c (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/wb_ucd9000.c (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/wb_xdpe12284.c (100%)
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{linux-5.10 => linux}/wb_xdpe132g5c_pmbus.c (100%)
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_optoe.c

diff --git a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/baseutil.py b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/baseutil.py
index 5260107c91be..abf0ecf97d6b 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/baseutil.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/lib/plat_hal/baseutil.py
@@ -9,6 +9,8 @@
 import os
 import syslog
 import json
+import subprocess
+import glob
 from plat_hal.osutil import osutil
 
 SYSLOG_IDENTIFIER = "HAL"
@@ -52,7 +54,7 @@ def getboardairflow():
 def getplatform_config_db():
     if not os.path.isfile(CONFIG_DB_PATH):
         return ""
-    val = os.popen("sonic-cfggen -j %s -v DEVICE_METADATA.localhost.platform" % CONFIG_DB_PATH).read().strip()
+    val = subprocess.check_output(["sonic-cfggen", "-j", CONFIG_DB_PATH, "-v", "DEVICE_METADATA.localhost.platform"]).decode().strip()
     if len(val) <= 0:
         return ""
     return val
@@ -72,10 +74,8 @@ def getplatform_name():
 
 
 CONFIG_FILE_PATH_LIST = [
-    "/usr/local/bin/",
     "/usr/lib/python3/dist-packages/",
-    "/usr/local/lib/python3.7/dist-packages/hal-config/",
-    "/usr/local/lib/python3.9/dist-packages/hal-config/"
+    "/usr/local/lib/*/dist-packages/hal-config/"
 ]
 
 
@@ -105,6 +105,11 @@ class baseutil:
     def get_config():
         real_path = None
         for configfile_path in CONFIG_FILE_PATH_LIST:
+            if "/*/" in configfile_path:
+                filepath = glob.glob(configfile_path)
+                if len(filepath) == 0:
+                    continue
+                configfile_path = filepath[0]
             for config_file in DEVICE_CONFIG_FILE_LIST:
                 file = configfile_path + config_file
                 if os.path.exists(file):
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
index 63c4238836e7..caff12ec3c20 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
@@ -7,7 +7,7 @@ KERNEL_SRC ?=  /lib/modules/$(KVERSION)
 module_out_put_dir := $(PWD)/build
 export module_out_put_dir
 
-KERNEL_MODULES_SRC = $(PWD)/linux-5.10
+KERNEL_MODULES_SRC = $(PWD)/linux
 
 PLAT_SYSFS_DIR = $(PWD)/plat_sysfs
 PHY = $(PWD)/phy
@@ -36,7 +36,6 @@ obj-m += wb_i2c_ocores.o
 obj-m += wb_spi_ocores.o
 obj-m += wb_spi_dev.o
 obj-m += wb_wdt.o
-obj-m += wb_optoe.o
 obj-m += wb_spi_gpio.o
 obj-m += wb_spi_gpio_device.o
 #obj-m += wb_spi_nor_device.o
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_at24.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_at24.c
deleted file mode 100644
index 5ec39c9d7dcb..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_at24.c
+++ /dev/null
@@ -1,861 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * at24.c - handle most I2C EEPROMs
- *
- * Copyright (C) 2005-2007 David Brownell
- * Copyright (C) 2008 Wolfram Sang, Pengutronix
- */
-
-#include <linux/acpi.h>
-#include <linux/bitops.h>
-#include <linux/capability.h>
-#include <linux/delay.h>
-#include <linux/i2c.h>
-#include <linux/init.h>
-#include <linux/jiffies.h>
-#include <linux/kernel.h>
-#include <linux/mod_devicetable.h>
-#include <linux/module.h>
-#include <linux/mutex.h>
-#include <linux/nvmem-provider.h>
-#include <linux/of_device.h>
-#include <linux/pm_runtime.h>
-#include <linux/property.h>
-#include <linux/regmap.h>
-#include <linux/regulator/consumer.h>
-#include <linux/slab.h>
-
-/* Address pointer is 16 bit. */
-#define AT24_FLAG_ADDR16	BIT(7)
-/* sysfs-entry will be read-only. */
-#define AT24_FLAG_READONLY	BIT(6)
-/* sysfs-entry will be world-readable. */
-#define AT24_FLAG_IRUGO		BIT(5)
-/* Take always 8 addresses (24c00). */
-#define AT24_FLAG_TAKE8ADDR	BIT(4)
-/* Factory-programmed serial number. */
-#define AT24_FLAG_SERIAL	BIT(3)
-/* Factory-programmed mac address. */
-#define AT24_FLAG_MAC		BIT(2)
-/* Does not auto-rollover reads to the next slave address. */
-#define AT24_FLAG_NO_RDROL	BIT(1)
-
-/*
- * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
- * Differences between different vendor product lines (like Atmel AT24C or
- * MicroChip 24LC, etc) won't much matter for typical read/write access.
- * There are also I2C RAM chips, likewise interchangeable. One example
- * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
- *
- * However, misconfiguration can lose data. "Set 16-bit memory address"
- * to a part with 8-bit addressing will overwrite data. Writing with too
- * big a page size also loses data. And it's not safe to assume that the
- * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
- * uses 0x51, for just one example.
- *
- * Accordingly, explicit board-specific configuration data should be used
- * in almost all cases. (One partial exception is an SMBus used to access
- * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
- *
- * So this driver uses "new style" I2C driver binding, expecting to be
- * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
- * similar kernel-resident tables; or, configuration data coming from
- * a bootloader.
- *
- * Other than binding model, current differences from "eeprom" driver are
- * that this one handles write access and isn't restricted to 24c02 devices.
- * It also handles larger devices (32 kbit and up) with two-byte addresses,
- * which won't work on pure SMBus systems.
- */
-
-struct at24_client {
-	struct i2c_client *client;
-	struct regmap *regmap;
-};
-
-struct at24_data {
-	/*
-	 * Lock protects against activities from other Linux tasks,
-	 * but not from changes by other I2C masters.
-	 */
-	struct mutex lock;
-
-	unsigned int write_max;
-	unsigned int num_addresses;
-	unsigned int offset_adj;
-
-	u32 byte_len;
-	u16 page_size;
-	u8 flags;
-
-	struct nvmem_device *nvmem;
-	struct regulator *vcc_reg;
-	void (*read_post)(unsigned int off, char *buf, size_t count);
-
-	/*
-	 * Some chips tie up multiple I2C addresses; dummy devices reserve
-	 * them for us, and we'll use them with SMBus calls.
-	 */
-	struct at24_client client[];
-};
-
-/*
- * This parameter is to help this driver avoid blocking other drivers out
- * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
- * clock, one 256 byte read takes about 1/43 second which is excessive;
- * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
- * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
- *
- * This value is forced to be a power of two so that writes align on pages.
- */
-static unsigned int at24_io_limit = 128;
-module_param_named(io_limit, at24_io_limit, uint, 0);
-MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)");
-
-/*
- * Specs often allow 5 msec for a page write, sometimes 20 msec;
- * it's important to recover from write timeouts.
- */
-static unsigned int at24_write_timeout = 25;
-module_param_named(write_timeout, at24_write_timeout, uint, 0);
-MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)");
-
-struct at24_chip_data {
-	u32 byte_len;
-	u8 flags;
-	void (*read_post)(unsigned int off, char *buf, size_t count);
-};
-
-#define AT24_CHIP_DATA(_name, _len, _flags)				\
-	static const struct at24_chip_data _name = {			\
-		.byte_len = _len, .flags = _flags,			\
-	}
-
-#define AT24_CHIP_DATA_CB(_name, _len, _flags, _read_post)		\
-	static const struct at24_chip_data _name = {			\
-		.byte_len = _len, .flags = _flags,			\
-		.read_post = _read_post,				\
-	}
-
-static void at24_read_post_vaio(unsigned int off, char *buf, size_t count)
-{
-	int i;
-
-	if (capable(CAP_SYS_ADMIN))
-		return;
-
-	/*
-	 * Hide VAIO private settings to regular users:
-	 * - BIOS passwords: bytes 0x00 to 0x0f
-	 * - UUID: bytes 0x10 to 0x1f
-	 * - Serial number: 0xc0 to 0xdf
-	 */
-	for (i = 0; i < count; i++) {
-		if ((off + i <= 0x1f) ||
-		    (off + i >= 0xc0 && off + i <= 0xdf))
-			buf[i] = 0;
-	}
-}
-
-/* needs 8 addresses as A0-A2 are ignored */
-AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR);
-/* old variants can't be handled with this generic entry! */
-AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0);
-AT24_CHIP_DATA(at24_data_24cs01, 16,
-	AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
-AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, AT24_FLAG_IRUGO);
-AT24_CHIP_DATA(at24_data_24cs02, 16,
-	AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
-AT24_CHIP_DATA(at24_data_24mac402, 48 / 8,
-	AT24_FLAG_MAC | AT24_FLAG_READONLY);
-AT24_CHIP_DATA(at24_data_24mac602, 64 / 8,
-	AT24_FLAG_MAC | AT24_FLAG_READONLY);
-/* spd is a 24c02 in memory DIMMs */
-AT24_CHIP_DATA(at24_data_spd, 2048 / 8,
-	AT24_FLAG_READONLY | AT24_FLAG_IRUGO);
-/* 24c02_vaio is a 24c02 on some Sony laptops */
-AT24_CHIP_DATA_CB(at24_data_24c02_vaio, 2048 / 8,
-	AT24_FLAG_READONLY | AT24_FLAG_IRUGO,
-	at24_read_post_vaio);
-AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0);
-AT24_CHIP_DATA(at24_data_24cs04, 16,
-	AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
-/* 24rf08 quirk is handled at i2c-core */
-AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0);
-AT24_CHIP_DATA(at24_data_24cs08, 16,
-	AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
-AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0);
-AT24_CHIP_DATA(at24_data_24cs16, 16,
-	AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
-AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16);
-AT24_CHIP_DATA(at24_data_24cs32, 16,
-	AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
-AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16 | AT24_FLAG_IRUGO);
-AT24_CHIP_DATA(at24_data_24cs64, 16,
-	AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
-AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16);
-AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16);
-AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16);
-AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16);
-AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16);
-/* identical to 24c08 ? */
-AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0);
-
-static const struct i2c_device_id at24_ids[] = {
-	{ "wb_24c00",	(kernel_ulong_t)&at24_data_24c00 },
-	{ "wb_24c01",	(kernel_ulong_t)&at24_data_24c01 },
-	{ "wb_24cs01",	(kernel_ulong_t)&at24_data_24cs01 },
-	{ "wb_24c02",	(kernel_ulong_t)&at24_data_24c02 },
-	{ "wb_24cs02",	(kernel_ulong_t)&at24_data_24cs02 },
-	{ "wb_24mac402",	(kernel_ulong_t)&at24_data_24mac402 },
-	{ "wb_24mac602",	(kernel_ulong_t)&at24_data_24mac602 },
-	{ "wb_spd",	(kernel_ulong_t)&at24_data_spd },
-	{ "wb_24c02-vaio",	(kernel_ulong_t)&at24_data_24c02_vaio },
-	{ "wb_24c04",	(kernel_ulong_t)&at24_data_24c04 },
-	{ "wb_24cs04",	(kernel_ulong_t)&at24_data_24cs04 },
-	{ "wb_24c08",	(kernel_ulong_t)&at24_data_24c08 },
-	{ "wb_24cs08",	(kernel_ulong_t)&at24_data_24cs08 },
-	{ "wb_24c16",	(kernel_ulong_t)&at24_data_24c16 },
-	{ "wb_24cs16",	(kernel_ulong_t)&at24_data_24cs16 },
-	{ "wb_24c32",	(kernel_ulong_t)&at24_data_24c32 },
-	{ "wb_24cs32",	(kernel_ulong_t)&at24_data_24cs32 },
-	{ "wb_24c64",	(kernel_ulong_t)&at24_data_24c64 },
-	{ "wb_24cs64",	(kernel_ulong_t)&at24_data_24cs64 },
-	{ "wb_24c128",	(kernel_ulong_t)&at24_data_24c128 },
-	{ "wb_24c256",	(kernel_ulong_t)&at24_data_24c256 },
-	{ "wb_24c512",	(kernel_ulong_t)&at24_data_24c512 },
-	{ "wb_24c1024",	(kernel_ulong_t)&at24_data_24c1024 },
-	{ "wb_24c2048",    (kernel_ulong_t)&at24_data_24c2048 },
-	{ "wb_at24",	0 },
-	{ /* END OF LIST */ }
-};
-MODULE_DEVICE_TABLE(i2c, at24_ids);
-
-static const struct of_device_id at24_of_match[] = {
-	{ .compatible = "atmel,24c00",		.data = &at24_data_24c00 },
-	{ .compatible = "atmel,24c01",		.data = &at24_data_24c01 },
-	{ .compatible = "atmel,24cs01",		.data = &at24_data_24cs01 },
-	{ .compatible = "atmel,24c02",		.data = &at24_data_24c02 },
-	{ .compatible = "atmel,24cs02",		.data = &at24_data_24cs02 },
-	{ .compatible = "atmel,24mac402",	.data = &at24_data_24mac402 },
-	{ .compatible = "atmel,24mac602",	.data = &at24_data_24mac602 },
-	{ .compatible = "atmel,spd",		.data = &at24_data_spd },
-	{ .compatible = "atmel,24c04",		.data = &at24_data_24c04 },
-	{ .compatible = "atmel,24cs04",		.data = &at24_data_24cs04 },
-	{ .compatible = "atmel,24c08",		.data = &at24_data_24c08 },
-	{ .compatible = "atmel,24cs08",		.data = &at24_data_24cs08 },
-	{ .compatible = "atmel,24c16",		.data = &at24_data_24c16 },
-	{ .compatible = "atmel,24cs16",		.data = &at24_data_24cs16 },
-	{ .compatible = "atmel,24c32",		.data = &at24_data_24c32 },
-	{ .compatible = "atmel,24cs32",		.data = &at24_data_24cs32 },
-	{ .compatible = "atmel,24c64",		.data = &at24_data_24c64 },
-	{ .compatible = "atmel,24cs64",		.data = &at24_data_24cs64 },
-	{ .compatible = "atmel,24c128",		.data = &at24_data_24c128 },
-	{ .compatible = "atmel,24c256",		.data = &at24_data_24c256 },
-	{ .compatible = "atmel,24c512",		.data = &at24_data_24c512 },
-	{ .compatible = "atmel,24c1024",	.data = &at24_data_24c1024 },
-	{ .compatible = "atmel,24c2048",	.data = &at24_data_24c2048 },
-	{ /* END OF LIST */ },
-};
-MODULE_DEVICE_TABLE(of, at24_of_match);
-
-static const struct acpi_device_id __maybe_unused at24_acpi_ids[] = {
-	{ "INT3499",	(kernel_ulong_t)&at24_data_INT3499 },
-	{ "TPF0001",	(kernel_ulong_t)&at24_data_24c1024 },
-	{ /* END OF LIST */ }
-};
-MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
-
-/*
- * This routine supports chips which consume multiple I2C addresses. It
- * computes the addressing information to be used for a given r/w request.
- * Assumes that sanity checks for offset happened at sysfs-layer.
- *
- * Slave address and byte offset derive from the offset. Always
- * set the byte address; on a multi-master board, another master
- * may have changed the chip's "current" address pointer.
- */
-static struct at24_client *at24_translate_offset(struct at24_data *at24,
-						 unsigned int *offset)
-{
-	unsigned int i;
-
-	if (at24->flags & AT24_FLAG_ADDR16) {
-		i = *offset >> 16;
-		*offset &= 0xffff;
-	} else {
-		i = *offset >> 8;
-		*offset &= 0xff;
-	}
-
-	return &at24->client[i];
-}
-
-static struct device *at24_base_client_dev(struct at24_data *at24)
-{
-	return &at24->client[0].client->dev;
-}
-
-static size_t at24_adjust_read_count(struct at24_data *at24,
-				      unsigned int offset, size_t count)
-{
-	unsigned int bits;
-	size_t remainder;
-
-	/*
-	 * In case of multi-address chips that don't rollover reads to
-	 * the next slave address: truncate the count to the slave boundary,
-	 * so that the read never straddles slaves.
-	 */
-	if (at24->flags & AT24_FLAG_NO_RDROL) {
-		bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8;
-		remainder = BIT(bits) - offset;
-		if (count > remainder)
-			count = remainder;
-	}
-
-	if (count > at24_io_limit)
-		count = at24_io_limit;
-
-	return count;
-}
-
-static ssize_t at24_regmap_read(struct at24_data *at24, char *buf,
-				unsigned int offset, size_t count)
-{
-	unsigned long timeout, read_time;
-	struct at24_client *at24_client;
-	struct i2c_client *client;
-	struct regmap *regmap;
-	int ret;
-
-	at24_client = at24_translate_offset(at24, &offset);
-	regmap = at24_client->regmap;
-	client = at24_client->client;
-	count = at24_adjust_read_count(at24, offset, count);
-
-	/* adjust offset for mac and serial read ops */
-	offset += at24->offset_adj;
-
-	timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
-	do {
-		/*
-		 * The timestamp shall be taken before the actual operation
-		 * to avoid a premature timeout in case of high CPU load.
-		 */
-		read_time = jiffies;
-
-		ret = regmap_bulk_read(regmap, offset, buf, count);
-		dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
-			count, offset, ret, jiffies);
-		if (!ret)
-			return count;
-
-		usleep_range(1000, 1500);
-	} while (time_before(read_time, timeout));
-
-	return -ETIMEDOUT;
-}
-
-/*
- * Note that if the hardware write-protect pin is pulled high, the whole
- * chip is normally write protected. But there are plenty of product
- * variants here, including OTP fuses and partial chip protect.
- *
- * We only use page mode writes; the alternative is sloooow. These routines
- * write at most one page.
- */
-
-static size_t at24_adjust_write_count(struct at24_data *at24,
-				      unsigned int offset, size_t count)
-{
-	unsigned int next_page;
-
-	/* write_max is at most a page */
-	if (count > at24->write_max)
-		count = at24->write_max;
-
-	/* Never roll over backwards, to the start of this page */
-	next_page = roundup(offset + 1, at24->page_size);
-	if (offset + count > next_page)
-		count = next_page - offset;
-
-	return count;
-}
-
-static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf,
-				 unsigned int offset, size_t count)
-{
-	unsigned long timeout, write_time;
-	struct at24_client *at24_client;
-	struct i2c_client *client;
-	struct regmap *regmap;
-	int ret;
-
-	at24_client = at24_translate_offset(at24, &offset);
-	regmap = at24_client->regmap;
-	client = at24_client->client;
-	count = at24_adjust_write_count(at24, offset, count);
-	timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
-
-	do {
-		/*
-		 * The timestamp shall be taken before the actual operation
-		 * to avoid a premature timeout in case of high CPU load.
-		 */
-		write_time = jiffies;
-
-		ret = regmap_bulk_write(regmap, offset, buf, count);
-		dev_dbg(&client->dev, "write %zu@%d --> %d (%ld)\n",
-			count, offset, ret, jiffies);
-		if (!ret)
-			return count;
-
-		usleep_range(1000, 1500);
-	} while (time_before(write_time, timeout));
-
-	return -ETIMEDOUT;
-}
-
-static int at24_read(void *priv, unsigned int off, void *val, size_t count)
-{
-	struct at24_data *at24;
-	struct device *dev;
-	char *buf = val;
-	int i, ret;
-
-	at24 = priv;
-	dev = at24_base_client_dev(at24);
-
-	if (unlikely(!count))
-		return count;
-
-	if (off + count > at24->byte_len)
-		return -EINVAL;
-
-	ret = pm_runtime_get_sync(dev);
-	if (ret < 0) {
-		pm_runtime_put_noidle(dev);
-		return ret;
-	}
-
-	/*
-	 * Read data from chip, protecting against concurrent updates
-	 * from this host, but not from other I2C masters.
-	 */
-	mutex_lock(&at24->lock);
-
-	for (i = 0; count; i += ret, count -= ret) {
-		ret = at24_regmap_read(at24, buf + i, off + i, count);
-		if (ret < 0) {
-			mutex_unlock(&at24->lock);
-			pm_runtime_put(dev);
-			return ret;
-		}
-	}
-
-	mutex_unlock(&at24->lock);
-
-	pm_runtime_put(dev);
-
-	if (unlikely(at24->read_post))
-		at24->read_post(off, buf, i);
-
-	return 0;
-}
-
-static int at24_write(void *priv, unsigned int off, void *val, size_t count)
-{
-	struct at24_data *at24;
-	struct device *dev;
-	char *buf = val;
-	int ret;
-
-	at24 = priv;
-	dev = at24_base_client_dev(at24);
-
-	if (unlikely(!count))
-		return -EINVAL;
-
-	if (off + count > at24->byte_len)
-		return -EINVAL;
-
-	ret = pm_runtime_get_sync(dev);
-	if (ret < 0) {
-		pm_runtime_put_noidle(dev);
-		return ret;
-	}
-
-	/*
-	 * Write data to chip, protecting against concurrent updates
-	 * from this host, but not from other I2C masters.
-	 */
-	mutex_lock(&at24->lock);
-
-	while (count) {
-		ret = at24_regmap_write(at24, buf, off, count);
-		if (ret < 0) {
-			mutex_unlock(&at24->lock);
-			pm_runtime_put(dev);
-			return ret;
-		}
-		buf += ret;
-		off += ret;
-		count -= ret;
-	}
-
-	mutex_unlock(&at24->lock);
-
-	pm_runtime_put(dev);
-
-	return 0;
-}
-
-static const struct at24_chip_data *at24_get_chip_data(struct device *dev)
-{
-	struct device_node *of_node = dev->of_node;
-	const struct at24_chip_data *cdata;
-	const struct i2c_device_id *id;
-
-	id = i2c_match_id(at24_ids, to_i2c_client(dev));
-
-	/*
-	 * The I2C core allows OF nodes compatibles to match against the
-	 * I2C device ID table as a fallback, so check not only if an OF
-	 * node is present but also if it matches an OF device ID entry.
-	 */
-	if (of_node && of_match_device(at24_of_match, dev))
-		cdata = of_device_get_match_data(dev);
-	else if (id)
-		cdata = (void *)id->driver_data;
-	else
-		cdata = acpi_device_get_match_data(dev);
-
-	if (!cdata)
-		return ERR_PTR(-ENODEV);
-
-	return cdata;
-}
-
-static int at24_make_dummy_client(struct at24_data *at24, unsigned int index,
-				  struct regmap_config *regmap_config)
-{
-	struct i2c_client *base_client, *dummy_client;
-	struct regmap *regmap;
-	struct device *dev;
-
-	base_client = at24->client[0].client;
-	dev = &base_client->dev;
-
-	dummy_client = devm_i2c_new_dummy_device(dev, base_client->adapter,
-						 base_client->addr + index);
-	if (IS_ERR(dummy_client))
-		return PTR_ERR(dummy_client);
-
-	regmap = devm_regmap_init_i2c(dummy_client, regmap_config);
-	if (IS_ERR(regmap))
-		return PTR_ERR(regmap);
-
-	at24->client[index].client = dummy_client;
-	at24->client[index].regmap = regmap;
-
-	return 0;
-}
-
-static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len)
-{
-	if (flags & AT24_FLAG_MAC) {
-		/* EUI-48 starts from 0x9a, EUI-64 from 0x98 */
-		return 0xa0 - byte_len;
-	} else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) {
-		/*
-		 * For 16 bit address pointers, the word address must contain
-		 * a '10' sequence in bits 11 and 10 regardless of the
-		 * intended position of the address pointer.
-		 */
-		return 0x0800;
-	} else if (flags & AT24_FLAG_SERIAL) {
-		/*
-		 * Otherwise the word address must begin with a '10' sequence,
-		 * regardless of the intended address.
-		 */
-		return 0x0080;
-	} else {
-		return 0;
-	}
-}
-
-static int at24_probe(struct i2c_client *client)
-{
-	struct regmap_config regmap_config = { };
-	struct nvmem_config nvmem_config = { };
-	u32 byte_len, page_size, flags, addrw;
-	const struct at24_chip_data *cdata;
-	struct device *dev = &client->dev;
-	bool i2c_fn_i2c, i2c_fn_block;
-	unsigned int i, num_addresses;
-	struct at24_data *at24;
-	struct regmap *regmap;
-	bool writable;
-	u8 test_byte;
-	int err;
-
-	i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C);
-	i2c_fn_block = i2c_check_functionality(client->adapter,
-					       I2C_FUNC_SMBUS_WRITE_I2C_BLOCK);
-
-	cdata = at24_get_chip_data(dev);
-	if (IS_ERR(cdata))
-		return PTR_ERR(cdata);
-
-	err = device_property_read_u32(dev, "pagesize", &page_size);
-	if (err)
-		/*
-		 * This is slow, but we can't know all eeproms, so we better
-		 * play safe. Specifying custom eeprom-types via device tree
-		 * or properties is recommended anyhow.
-		 */
-		page_size = 1;
-
-	flags = cdata->flags;
-	if (device_property_present(dev, "read-only"))
-		flags |= AT24_FLAG_READONLY;
-	if (device_property_present(dev, "no-read-rollover"))
-		flags |= AT24_FLAG_NO_RDROL;
-
-	err = device_property_read_u32(dev, "address-width", &addrw);
-	if (!err) {
-		switch (addrw) {
-		case 8:
-			if (flags & AT24_FLAG_ADDR16)
-				dev_warn(dev,
-					 "Override address width to be 8, while default is 16\n");
-			flags &= ~AT24_FLAG_ADDR16;
-			break;
-		case 16:
-			flags |= AT24_FLAG_ADDR16;
-			break;
-		default:
-			dev_warn(dev, "Bad \"address-width\" property: %u\n",
-				 addrw);
-		}
-	}
-
-	err = device_property_read_u32(dev, "size", &byte_len);
-	if (err)
-		byte_len = cdata->byte_len;
-
-	if (!i2c_fn_i2c && !i2c_fn_block)
-		page_size = 1;
-
-	if (!page_size) {
-		dev_err(dev, "page_size must not be 0!\n");
-		return -EINVAL;
-	}
-
-	if (!is_power_of_2(page_size))
-		dev_warn(dev, "page_size looks suspicious (no power of 2)!\n");
-
-	err = device_property_read_u32(dev, "num-addresses", &num_addresses);
-	if (err) {
-		if (flags & AT24_FLAG_TAKE8ADDR)
-			num_addresses = 8;
-		else
-			num_addresses =	DIV_ROUND_UP(byte_len,
-				(flags & AT24_FLAG_ADDR16) ? 65536 : 256);
-	}
-
-	if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) {
-		dev_err(dev,
-			"invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
-		return -EINVAL;
-	}
-
-	regmap_config.val_bits = 8;
-	regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8;
-	regmap_config.disable_locking = true;
-
-	regmap = devm_regmap_init_i2c(client, &regmap_config);
-	if (IS_ERR(regmap))
-		return PTR_ERR(regmap);
-
-	at24 = devm_kzalloc(dev, struct_size(at24, client, num_addresses),
-			    GFP_KERNEL);
-	if (!at24)
-		return -ENOMEM;
-
-	mutex_init(&at24->lock);
-	at24->byte_len = byte_len;
-	at24->page_size = page_size;
-	at24->flags = flags;
-	at24->read_post = cdata->read_post;
-	at24->num_addresses = num_addresses;
-	at24->offset_adj = at24_get_offset_adj(flags, byte_len);
-	at24->client[0].client = client;
-	at24->client[0].regmap = regmap;
-
-	at24->vcc_reg = devm_regulator_get(dev, "vcc");
-	if (IS_ERR(at24->vcc_reg))
-		return PTR_ERR(at24->vcc_reg);
-
-	writable = !(flags & AT24_FLAG_READONLY);
-	if (writable) {
-		at24->write_max = min_t(unsigned int,
-					page_size, at24_io_limit);
-		if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX)
-			at24->write_max = I2C_SMBUS_BLOCK_MAX;
-	}
-
-	/* use dummy devices for multiple-address chips */
-	for (i = 1; i < num_addresses; i++) {
-		err = at24_make_dummy_client(at24, i, &regmap_config);
-		if (err)
-			return err;
-	}
-
-	/*
-	 * If the 'label' property is not present for the AT24 EEPROM,
-	 * then nvmem_config.id is initialised to NVMEM_DEVID_AUTO,
-	 * and this will append the 'devid' to the name of the NVMEM
-	 * device. This is purely legacy and the AT24 driver has always
-	 * defaulted to this. However, if the 'label' property is
-	 * present then this means that the name is specified by the
-	 * firmware and this name should be used verbatim and so it is
-	 * not necessary to append the 'devid'.
-	 */
-	if (device_property_present(dev, "label")) {
-		nvmem_config.id = NVMEM_DEVID_NONE;
-		err = device_property_read_string(dev, "label",
-						  &nvmem_config.name);
-		if (err)
-			return err;
-	} else {
-		nvmem_config.id = NVMEM_DEVID_AUTO;
-		nvmem_config.name = dev_name(dev);
-	}
-
-	nvmem_config.type = NVMEM_TYPE_EEPROM;
-	nvmem_config.dev = dev;
-	nvmem_config.read_only = !writable;
-	nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO);
-	nvmem_config.owner = THIS_MODULE;
-	nvmem_config.compat = true;
-	nvmem_config.base_dev = dev;
-	nvmem_config.reg_read = at24_read;
-	nvmem_config.reg_write = at24_write;
-	nvmem_config.priv = at24;
-	nvmem_config.stride = 1;
-	nvmem_config.word_size = 1;
-	nvmem_config.size = byte_len;
-
-	i2c_set_clientdata(client, at24);
-
-	err = regulator_enable(at24->vcc_reg);
-	if (err) {
-		dev_err(dev, "Failed to enable vcc regulator\n");
-		return err;
-	}
-
-	/* enable runtime pm */
-	pm_runtime_set_active(dev);
-	pm_runtime_enable(dev);
-
-	at24->nvmem = devm_nvmem_register(dev, &nvmem_config);
-	if (IS_ERR(at24->nvmem)) {
-		pm_runtime_disable(dev);
-		if (!pm_runtime_status_suspended(dev))
-			regulator_disable(at24->vcc_reg);
-		return PTR_ERR(at24->nvmem);
-	}
-
-	/*
-	 * Perform a one-byte test read to verify that the
-	 * chip is functional.
-	 */
-	err = at24_read(at24, 0, &test_byte, 1);
-	if (err) {
-		pm_runtime_disable(dev);
-		if (!pm_runtime_status_suspended(dev))
-			regulator_disable(at24->vcc_reg);
-		return -ENODEV;
-	}
-
-	pm_runtime_idle(dev);
-
-	if (writable)
-		dev_info(dev, "%u byte %s EEPROM, writable, %u bytes/write\n",
-			 byte_len, client->name, at24->write_max);
-	else
-		dev_info(dev, "%u byte %s EEPROM, read-only\n",
-			 byte_len, client->name);
-
-	return 0;
-}
-
-static void at24_remove(struct i2c_client *client)
-{
-	struct at24_data *at24 = i2c_get_clientdata(client);
-
-	pm_runtime_disable(&client->dev);
-	if (!pm_runtime_status_suspended(&client->dev))
-		regulator_disable(at24->vcc_reg);
-	pm_runtime_set_suspended(&client->dev);
-
-	return;
-}
-
-static int __maybe_unused at24_suspend(struct device *dev)
-{
-	struct i2c_client *client = to_i2c_client(dev);
-	struct at24_data *at24 = i2c_get_clientdata(client);
-
-	return regulator_disable(at24->vcc_reg);
-}
-
-static int __maybe_unused at24_resume(struct device *dev)
-{
-	struct i2c_client *client = to_i2c_client(dev);
-	struct at24_data *at24 = i2c_get_clientdata(client);
-
-	return regulator_enable(at24->vcc_reg);
-}
-
-static const struct dev_pm_ops at24_pm_ops = {
-	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
-				pm_runtime_force_resume)
-	SET_RUNTIME_PM_OPS(at24_suspend, at24_resume, NULL)
-};
-
-static struct i2c_driver at24_driver = {
-	.driver = {
-		.name = "wb_at24",
-		.pm = &at24_pm_ops,
-		.of_match_table = at24_of_match,
-		.acpi_match_table = ACPI_PTR(at24_acpi_ids),
-	},
-	.probe_new = at24_probe,
-	.remove = at24_remove,
-	.id_table = at24_ids,
-};
-
-static int __init at24_init(void)
-{
-	if (!at24_io_limit) {
-		pr_err("at24: at24_io_limit must not be 0!\n");
-		return -EINVAL;
-	}
-
-	at24_io_limit = rounddown_pow_of_two(at24_io_limit);
-	return i2c_add_driver(&at24_driver);
-}
-module_init(at24_init);
-
-static void __exit at24_exit(void)
-{
-	i2c_del_driver(&at24_driver);
-}
-module_exit(at24_exit);
-
-MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
-MODULE_AUTHOR("support");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/Makefile
similarity index 98%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/Makefile
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/Makefile
index 02d659d6c8b2..a3da5aadf5ab 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/Makefile
@@ -16,7 +16,6 @@ obj-m += wb_i2c_i801.o
 obj-m += wb_i2c_algo_bit.o
 obj-m += wb_i2c_gpio.o
 obj-m += wb_i2c_gpio_device.o
-obj-m += wb_at24.o
 obj-m += wb_pmbus_core.o
 obj-m += wb_csu550.o
 obj-m += wb_ina3221.o
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_csu550.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_csu550.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_csu550.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_csu550.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_algo_bit.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_algo_bit.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_algo_bit.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_algo_bit.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_gpio.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_gpio.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_gpio_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio_device.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_gpio_device.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_gpio_device.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_i801.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_i801.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_i801.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_i801.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_ismt.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_ismt.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_ismt.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_ismt.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.h
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca954x.h
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca954x.h
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca9641.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca9641.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca9641.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.h
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_i2c_mux_pca9641.h
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_i2c_mux_pca9641.h
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ina3221.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ina3221.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ina3221.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ina3221.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_isl68137.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_isl68137.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_isl68137.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_isl68137.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_lm75.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_lm75.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_lm75.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.h
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_lm75.h
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_lm75.h
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus.h
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus.h
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus.h
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus_core.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus_core.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_pmbus_core.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus_core.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_tmp401.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tmp401.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_tmp401.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tmp401.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_tps53622.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tps53622.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_tps53622.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_tps53622.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ucd9000.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ucd9000.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_ucd9000.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_ucd9000.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe12284.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe12284.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe12284.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe12284.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe132g5c_pmbus.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/linux-5.10/wb_xdpe132g5c_pmbus.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_xdpe132g5c_pmbus.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_optoe.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_optoe.c
deleted file mode 100644
index 9a55fcdec97e..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_optoe.c
+++ /dev/null
@@ -1,1192 +0,0 @@
-/*
- * optoe.c - A driver to read and write the EEPROM on optical transceivers
- * (SFP, QSFP and similar I2C based devices)
- *
- * Copyright (C) 2014 Cumulus networks Inc.
- * Copyright (C) 2017 Finisar Corp.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Freeoftware Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-/*
- *	Description:
- *	a) Optical transceiver EEPROM read/write transactions are just like
- *		the at24 eeproms managed by the at24.c i2c driver
- *	b) The register/memory layout is up to 256 128 byte pages defined by
- *		a "pages valid" register and switched via a "page select"
- *		register as explained in below diagram.
- *	c) 256 bytes are mapped at a time. 'Lower page 00h' is the first 128
- *	        bytes of address space, and always references the same
- *	        location, independent of the page select register.
- *	        All mapped pages are mapped into the upper 128 bytes
- *	        (offset 128-255) of the i2c address.
- *	d) Devices with one I2C address (eg QSFP) use I2C address 0x50
- *		(A0h in the spec), and map all pages in the upper 128 bytes
- *		of that address.
- *	e) Devices with two I2C addresses (eg SFP) have 256 bytes of data
- *		at I2C address 0x50, and 256 bytes of data at I2C address
- *		0x51 (A2h in the spec).  Page selection and paged access
- *		only apply to this second I2C address (0x51).
- *	e) The address space is presented, by the driver, as a linear
- *	        address space.  For devices with one I2C client at address
- *	        0x50 (eg QSFP), offset 0-127 are in the lower
- *	        half of address 50/A0h/client[0].  Offset 128-255 are in
- *	        page 0, 256-383 are page 1, etc.  More generally, offset
- *	        'n' resides in page (n/128)-1.  ('page -1' is the lower
- *	        half, offset 0-127).
- *	f) For devices with two I2C clients at address 0x50 and 0x51 (eg SFP),
- *		the address space places offset 0-127 in the lower
- *	        half of 50/A0/client[0], offset 128-255 in the upper
- *	        half.  Offset 256-383 is in the lower half of 51/A2/client[1].
- *	        Offset 384-511 is in page 0, in the upper half of 51/A2/...
- *	        Offset 512-639 is in page 1, in the upper half of 51/A2/...
- *	        Offset 'n' is in page (n/128)-3 (for n > 383)
- *
- *	                    One I2c addressed (eg QSFP) Memory Map
- *
- *	                    2-Wire Serial Address: 1010000x
- *
- *	                    Lower Page 00h (128 bytes)
- *	                    =====================
- *	                   |                     |
- *	                   |                     |
- *	                   |                     |
- *	                   |                     |
- *	                   |                     |
- *	                   |                     |
- *	                   |                     |
- *	                   |                     |
- *	                   |                     |
- *	                   |                     |
- *	                   |Page Select Byte(127)|
- *	                    =====================
- *	                              |
- *	                              |
- *	                              |
- *	                              |
- *	                              V
- *	     ------------------------------------------------------------
- *	    |                 |                  |                       |
- *	    |                 |                  |                       |
- *	    |                 |                  |                       |
- *	    |                 |                  |                       |
- *	    |                 |                  |                       |
- *	    |                 |                  |                       |
- *	    |                 |                  |                       |
- *	    |                 |                  |                       |
- *	    |                 |                  |                       |
- *	    V                 V                  V                       V
- *	 ------------   --------------      ---------------     --------------
- *	|            | |              |    |               |   |              |
- *	|   Upper    | |     Upper    |    |     Upper     |   |    Upper     |
- *	|  Page 00h  | |    Page 01h  |    |    Page 02h   |   |   Page 03h   |
- *	|            | |   (Optional) |    |   (Optional)  |   |  (Optional   |
- *	|            | |              |    |               |   |   for Cable  |
- *	|            | |              |    |               |   |  Assemblies) |
- *	|    ID      | |     AST      |    |      User     |   |              |
- *	|  Fields    | |    Table     |    |   EEPROM Data |   |              |
- *	|            | |              |    |               |   |              |
- *	|            | |              |    |               |   |              |
- *	|            | |              |    |               |   |              |
- *	 ------------   --------------      ---------------     --------------
- *
- * The SFF 8436 (QSFP) spec only defines the 4 pages described above.
- * In anticipation of future applications and devices, this driver
- * supports access to the full architected range, 256 pages.
- *
- * The CMIS (Common Management Interface Specification) defines use of
- * considerably more pages (at least to page 0xAF), which this driver
- * supports.
- *
- * NOTE: This version of the driver ONLY SUPPORTS BANK 0 PAGES on CMIS
- * devices.
- *
- **/
-
-/* #define DEBUG 1 */
-
-#undef EEPROM_CLASS
-#ifdef CONFIG_EEPROM_CLASS
-#define EEPROM_CLASS
-#endif
-#ifdef CONFIG_EEPROM_CLASS_MODULE
-#define EEPROM_CLASS
-#endif
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/slab.h>
-#include <linux/delay.h>
-#include <linux/mutex.h>
-#include <linux/sysfs.h>
-#include <linux/jiffies.h>
-#include <linux/i2c.h>
-#include <linux/string.h>
-
-#define mem_clear(data, size) memset((data), 0, (size))
-#ifdef EEPROM_CLASS
-#include <linux/eeprom_class.h>
-#endif
-
-#include <linux/types.h>
-
-/* The maximum length of a port name */
-#define MAX_PORT_NAME_LEN 20
-
-struct optoe_platform_data {
-	u32		byte_len;		/* size (sum of all addr) */
-	u16		page_size;		/* for writes */
-	u8		flags;
-	void		*dummy1;		/* backward compatibility */
-	void		*dummy2;		/* backward compatibility */
-
-#ifdef EEPROM_CLASS
-	struct eeprom_platform_data *eeprom_data;
-#endif
-	char port_name[MAX_PORT_NAME_LEN];
-};
-
-/* fundamental unit of addressing for EEPROM */
-#define OPTOE_PAGE_SIZE 128
-/*
- * Single address devices (eg QSFP) have 256 pages, plus the unpaged
- * low 128 bytes.  If the device does not support paging, it is
- * only 2 'pages' long.
- */
-#define OPTOE_ARCH_PAGES 256
-#define ONE_ADDR_EEPROM_SIZE ((1 + OPTOE_ARCH_PAGES) * OPTOE_PAGE_SIZE)
-#define ONE_ADDR_EEPROM_UNPAGED_SIZE (2 * OPTOE_PAGE_SIZE)
-/*
- * Dual address devices (eg SFP) have 256 pages, plus the unpaged
- * low 128 bytes, plus 256 bytes at 0x50.  If the device does not
- * support paging, it is 4 'pages' long.
- */
-#define TWO_ADDR_EEPROM_SIZE ((3 + OPTOE_ARCH_PAGES) * OPTOE_PAGE_SIZE)
-#define TWO_ADDR_EEPROM_UNPAGED_SIZE (4 * OPTOE_PAGE_SIZE)
-#define TWO_ADDR_NO_0X51_SIZE (2 * OPTOE_PAGE_SIZE)
-
-/* a few constants to find our way around the EEPROM */
-#define OPTOE_PAGE_SELECT_REG   0x7F
-#define ONE_ADDR_PAGEABLE_REG 0x02
-#define QSFP_NOT_PAGEABLE (1<<2)
-#define CMIS_NOT_PAGEABLE (1<<7)
-#define TWO_ADDR_PAGEABLE_REG 0x40
-#define TWO_ADDR_PAGEABLE (1<<4)
-#define TWO_ADDR_0X51_REG 92
-#define TWO_ADDR_0X51_SUPP (1<<6)
-#define OPTOE_ID_REG 0
-#define OPTOE_READ_OP 0
-#define OPTOE_WRITE_OP 1
-#define OPTOE_EOF 0  /* used for access beyond end of device */
-
-struct optoe_data {
-	struct optoe_platform_data chip;
-	int use_smbus;
-	char port_name[MAX_PORT_NAME_LEN];
-
-	/*
-	 * Lock protects against activities from other Linux tasks,
-	 * but not from changes by other I2C masters.
-	 */
-	struct mutex lock;
-	struct bin_attribute bin;
-	struct attribute_group attr_group;
-
-	u8 *writebuf;
-	unsigned int write_max;
-
-	unsigned int num_addresses;
-
-#ifdef EEPROM_CLASS
-	struct eeprom_device *eeprom_dev;
-#endif
-
-	/* dev_class: ONE_ADDR (QSFP) or TWO_ADDR (SFP) */
-	int dev_class;
-
-	struct i2c_client *client[];
-};
-
-/*
- * This parameter is to help this driver avoid blocking other drivers out
- * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
- * clock, one 256 byte read takes about 1/43 second which is excessive;
- * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
- * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
- *
- * This value is forced to be a power of two so that writes align on pages.
- */
-static unsigned int io_limit = OPTOE_PAGE_SIZE;
-
-/*
- * specs often allow 5 msec for a page write, sometimes 20 msec;
- * it's important to recover from write timeouts.
- */
-static unsigned int write_timeout = 50;
-
-/*
- * flags to distinguish one-address (QSFP family) from two-address (SFP family)
- * If the family is not known, figure it out when the device is accessed
- */
-#define ONE_ADDR 1
-#define TWO_ADDR 2
-#define CMIS_ADDR 3
-
-static const struct i2c_device_id optoe_ids[] = {
-	{ "wb_optoe1", ONE_ADDR },
-	{ "wb_optoe2", TWO_ADDR },
-	{ "wb_optoe3", CMIS_ADDR },
-	{ "wb_sff8436", ONE_ADDR },
-	{ "wb_24c04", TWO_ADDR },
-	{ /* END OF LIST */ }
-};
-MODULE_DEVICE_TABLE(i2c, optoe_ids);
-
-/*-------------------------------------------------------------------------*/
-/*
- * This routine computes the addressing information to be used for
- * a given r/w request.
- *
- * Task is to calculate the client (0 = i2c addr 50, 1 = i2c addr 51),
- * the page, and the offset.
- *
- * Handles both single address (eg QSFP) and two address (eg SFP).
- *     For SFP, offset 0-255 are on client[0], >255 is on client[1]
- *     Offset 256-383 are on the lower half of client[1]
- *     Pages are accessible on the upper half of client[1].
- *     Offset >383 are in 128 byte pages mapped into the upper half
- *
- *     For QSFP, all offsets are on client[0]
- *     offset 0-127 are on the lower half of client[0] (no paging)
- *     Pages are accessible on the upper half of client[1].
- *     Offset >127 are in 128 byte pages mapped into the upper half
- *
- *     Callers must not read/write beyond the end of a client or a page
- *     without recomputing the client/page.  Hence offset (within page)
- *     plus length must be less than or equal to 128.  (Note that this
- *     routine does not have access to the length of the call, hence
- *     cannot do the validity check.)
- *
- * Offset within Lower Page 00h and Upper Page 00h are not recomputed
- */
-
-static uint8_t optoe_translate_offset(struct optoe_data *optoe,
-		loff_t *offset, struct i2c_client **client)
-{
-	unsigned int page = 0;
-
-	*client = optoe->client[0];
-
-	/* if SFP style, offset > 255, shift to i2c addr 0x51 */
-	if (optoe->dev_class == TWO_ADDR) {
-		if (*offset > 255) {
-			/* like QSFP, but shifted to client[1] */
-			*client = optoe->client[1];
-			*offset -= 256;
-		}
-	}
-
-	/*
-	 * if offset is in the range 0-128...
-	 * page doesn't matter (using lower half), return 0.
-	 * offset is already correct (don't add 128 to get to paged area)
-	 */
-	if (*offset < OPTOE_PAGE_SIZE)
-		return page;
-
-	/* note, page will always be positive since *offset >= 128 */
-	page = (*offset >> 7)-1;
-	/* 0x80 places the offset in the top half, offset is last 7 bits */
-	*offset = OPTOE_PAGE_SIZE + (*offset & 0x7f);
-
-	return page;  /* note also returning client and offset */
-}
-
-static ssize_t optoe_eeprom_read(struct optoe_data *optoe,
-		    struct i2c_client *client,
-		    char *buf, unsigned int offset, size_t count)
-{
-	struct i2c_msg msg[2];
-	u8 msgbuf[2];
-	unsigned long timeout, read_time;
-	int status, i;
-
-	mem_clear(msg, sizeof(msg));
-
-	switch (optoe->use_smbus) {
-	case I2C_SMBUS_I2C_BLOCK_DATA:
-		/*smaller eeproms can work given some SMBus extension calls */
-		if (count > I2C_SMBUS_BLOCK_MAX)
-			count = I2C_SMBUS_BLOCK_MAX;
-		break;
-	case I2C_SMBUS_WORD_DATA:
-		/* Check for odd length transaction */
-		count = (count == 1) ? 1 : 2;
-		break;
-	case I2C_SMBUS_BYTE_DATA:
-		count = 1;
-		break;
-	default:
-		/*
-		 * When we have a better choice than SMBus calls, use a
-		 * combined I2C message. Write address; then read up to
-		 * io_limit data bytes.  msgbuf is u8 and will cast to our
-		 * needs.
-		 */
-		i = 0;
-		msgbuf[i++] = offset;
-
-		msg[0].addr = client->addr;
-		msg[0].buf = msgbuf;
-		msg[0].len = i;
-
-		msg[1].addr = client->addr;
-		msg[1].flags = I2C_M_RD;
-		msg[1].buf = buf;
-		msg[1].len = count;
-	}
-
-	/*
-	 * Reads fail if the previous write didn't complete yet. We may
-	 * loop a few times until this one succeeds, waiting at least
-	 * long enough for one entire page write to work.
-	 */
-	timeout = jiffies + msecs_to_jiffies(write_timeout);
-	do {
-		read_time = jiffies;
-
-		switch (optoe->use_smbus) {
-		case I2C_SMBUS_I2C_BLOCK_DATA:
-			status = i2c_smbus_read_i2c_block_data(client, offset,
-					count, buf);
-			break;
-		case I2C_SMBUS_WORD_DATA:
-			status = i2c_smbus_read_word_data(client, offset);
-			if (status >= 0) {
-				buf[0] = status & 0xff;
-				if (count == 2)
-					buf[1] = status >> 8;
-				status = count;
-			}
-			break;
-		case I2C_SMBUS_BYTE_DATA:
-			status = i2c_smbus_read_byte_data(client, offset);
-			if (status >= 0) {
-				buf[0] = status;
-				status = count;
-			}
-			break;
-		default:
-			status = i2c_transfer(client->adapter, msg, 2);
-			if (status == 2)
-				status = count;
-		}
-
-		dev_dbg(&client->dev, "eeprom read %zu@%d --> %d (%ld)\n",
-				count, offset, status, jiffies);
-
-		if (status == count)  /* happy path */
-			return count;
-
-		/* REVISIT: at HZ=100, this is sloooow */
-		usleep_range(1000, 2000);
-	} while (time_before(read_time, timeout));
-
-	return -ETIMEDOUT;
-}
-
-static ssize_t optoe_eeprom_write(struct optoe_data *optoe,
-				struct i2c_client *client,
-				const char *buf,
-				unsigned int offset, size_t count)
-{
-	struct i2c_msg msg;
-	ssize_t status;
-	unsigned long timeout, write_time;
-	unsigned int next_page_start;
-	int i = 0;
-
-	/* write max is at most a page
-	 * (In this driver, write_max is actually one byte!)
-	 */
-	if (count > optoe->write_max)
-		count = optoe->write_max;
-
-	/* shorten count if necessary to avoid crossing page boundary */
-	next_page_start = roundup(offset + 1, OPTOE_PAGE_SIZE);
-	if (offset + count > next_page_start)
-		count = next_page_start - offset;
-
-	switch (optoe->use_smbus) {
-	case I2C_SMBUS_I2C_BLOCK_DATA:
-		/*smaller eeproms can work given some SMBus extension calls */
-		if (count > I2C_SMBUS_BLOCK_MAX)
-			count = I2C_SMBUS_BLOCK_MAX;
-		break;
-	case I2C_SMBUS_WORD_DATA:
-		/* Check for odd length transaction */
-		count = (count == 1) ? 1 : 2;
-		break;
-	case I2C_SMBUS_BYTE_DATA:
-		count = 1;
-		break;
-	default:
-		/* If we'll use I2C calls for I/O, set up the message */
-		msg.addr = client->addr;
-		msg.flags = 0;
-
-		/* msg.buf is u8 and casts will mask the values */
-		msg.buf = optoe->writebuf;
-
-		msg.buf[i++] = offset;
-		memcpy(&msg.buf[i], buf, count);
-		msg.len = i + count;
-		break;
-	}
-
-	/*
-	 * Reads fail if the previous write didn't complete yet. We may
-	 * loop a few times until this one succeeds, waiting at least
-	 * long enough for one entire page write to work.
-	 */
-	timeout = jiffies + msecs_to_jiffies(write_timeout);
-	do {
-		write_time = jiffies;
-
-		switch (optoe->use_smbus) {
-		case I2C_SMBUS_I2C_BLOCK_DATA:
-			status = i2c_smbus_write_i2c_block_data(client,
-						offset, count, buf);
-			if (status == 0)
-				status = count;
-			break;
-		case I2C_SMBUS_WORD_DATA:
-			if (count == 2) {
-				status = i2c_smbus_write_word_data(client,
-					offset, (u16)((buf[0])|(buf[1] << 8)));
-			} else {
-				/* count = 1 */
-				status = i2c_smbus_write_byte_data(client,
-					offset, buf[0]);
-			}
-			if (status == 0)
-				status = count;
-			break;
-		case I2C_SMBUS_BYTE_DATA:
-			status = i2c_smbus_write_byte_data(client, offset,
-						buf[0]);
-			if (status == 0)
-				status = count;
-			break;
-		default:
-			status = i2c_transfer(client->adapter, &msg, 1);
-			if (status == 1)
-				status = count;
-			break;
-		}
-
-		dev_dbg(&client->dev, "eeprom write %zu@%d --> %ld (%lu)\n",
-				count, offset, (long int) status, jiffies);
-
-		if (status == count)
-			return count;
-
-		/* REVISIT: at HZ=100, this is sloooow */
-		usleep_range(1000, 2000);
-	} while (time_before(write_time, timeout));
-
-	return -ETIMEDOUT;
-}
-
-static ssize_t optoe_eeprom_update_client(struct optoe_data *optoe,
-				char *buf, loff_t off,
-				size_t count, int opcode)
-{
-	struct i2c_client *client;
-	ssize_t retval = 0;
-	uint8_t page = 0;
-    uint8_t loc;
-	loff_t phy_offset = off;
-	int ret = 0;
-
-	page = optoe_translate_offset(optoe, &phy_offset, &client);
-	dev_dbg(&client->dev,
-		"%s off %lld  page:%d phy_offset:%lld, count:%ld, opcode:%d\n",
-		__func__, off, page, phy_offset, (long int) count, opcode);
-
-    ret = optoe_eeprom_read(optoe, client, &loc, OPTOE_PAGE_SELECT_REG, 1);
-    if (ret < 0) {
-        dev_dbg(&client->dev, "Read page register for get now location page failed. ret:%d\n", ret);
-        return ret;
-    }
-
-    /* Only when read and now location page is inconsistent, will doing switch page */
-    if (loc != page) {
-        ret = optoe_eeprom_write(optoe, client, &page,
-            OPTOE_PAGE_SELECT_REG, 1);
-        if (ret < 0) {
-            dev_dbg(&client->dev,
-                "Write page register for page %d failed ret:%d!\n",
-                    page, ret);
-            return ret;
-        }
-    }
-
-	while (count) {
-		ssize_t	status;
-
-		if (opcode == OPTOE_READ_OP) {
-			status =  optoe_eeprom_read(optoe, client,
-				buf, phy_offset, count);
-		} else {
-			status =  optoe_eeprom_write(optoe, client,
-				buf, phy_offset, count);
-		}
-		if (status <= 0) {
-			if (retval == 0)
-				retval = status;
-			break;
-		}
-		buf += status;
-		phy_offset += status;
-		count -= status;
-		retval += status;
-	}
-
-	return retval;
-}
-
-/*
- * Figure out if this access is within the range of supported pages.
- * Note this is called on every access because we don't know if the
- * module has been replaced since the last call.
- * If/when modules support more pages, this is the routine to update
- * to validate and allow access to additional pages.
- *
- * Returns updated len for this access:
- *     - entire access is legal, original len is returned.
- *     - access begins legal but is too long, len is truncated to fit.
- *     - initial offset exceeds supported pages, return OPTOE_EOF (zero)
- */
-static ssize_t optoe_page_legal(struct optoe_data *optoe,
-		loff_t off, size_t len)
-{
-	struct i2c_client *client = optoe->client[0];
-	u8 regval;
-	int not_pageable;
-	int status;
-	size_t maxlen;
-
-	if (off < 0)
-		return -EINVAL;
-	if (optoe->dev_class == TWO_ADDR) {
-		/* SFP case */
-		/* if only using addr 0x50 (first 256 bytes) we're good */
-		if ((off + len) <= TWO_ADDR_NO_0X51_SIZE)
-			return len;
-		/* if offset exceeds possible pages, we're not good */
-		if (off >= TWO_ADDR_EEPROM_SIZE)
-			return OPTOE_EOF;
-		/* in between, are pages supported? */
-		status = optoe_eeprom_read(optoe, client, &regval,
-				TWO_ADDR_PAGEABLE_REG, 1);
-		if (status < 0)
-			return status;  /* error out (no module?) */
-		if (regval & TWO_ADDR_PAGEABLE) {
-			/* Pages supported, trim len to the end of pages */
-			maxlen = TWO_ADDR_EEPROM_SIZE - off;
-		} else {
-			/* pages not supported, trim len to unpaged size */
-			if (off >= TWO_ADDR_EEPROM_UNPAGED_SIZE)
-				return OPTOE_EOF;
-
-			/* will be accessing addr 0x51, is that supported? */
-			/* byte 92, bit 6 implies DDM support, 0x51 support */
-			status = optoe_eeprom_read(optoe, client, &regval,
-						TWO_ADDR_0X51_REG, 1);
-			if (status < 0)
-				return status;
-			if (regval & TWO_ADDR_0X51_SUPP) {
-				/* addr 0x51 is OK */
-				maxlen = TWO_ADDR_EEPROM_UNPAGED_SIZE - off;
-			} else {
-				/* addr 0x51 NOT supported, trim to 256 max */
-				if (off >= TWO_ADDR_NO_0X51_SIZE)
-					return OPTOE_EOF;
-				maxlen = TWO_ADDR_NO_0X51_SIZE - off;
-			}
-		}
-		len = (len > maxlen) ? maxlen : len;
-		dev_dbg(&client->dev,
-			"page_legal, SFP, off %lld len %ld\n",
-			off, (long int) len);
-	} else {
-		/* QSFP case, CMIS case */
-		/* if no pages needed, we're good */
-		if ((off + len) <= ONE_ADDR_EEPROM_UNPAGED_SIZE)
-			return len;
-		/* if offset exceeds possible pages, we're not good */
-		if (off >= ONE_ADDR_EEPROM_SIZE)
-			return OPTOE_EOF;
-		/* in between, are pages supported? */
-		status = optoe_eeprom_read(optoe, client, &regval,
-				ONE_ADDR_PAGEABLE_REG, 1);
-		if (status < 0)
-			return status;  /* error out (no module?) */
-
-		if (optoe->dev_class == ONE_ADDR) {
-			not_pageable = QSFP_NOT_PAGEABLE;
-		} else {
-			not_pageable = CMIS_NOT_PAGEABLE;
-		}
-		dev_dbg(&client->dev,
-			"Paging Register: 0x%x; not_pageable mask: 0x%x\n",
-			regval, not_pageable);
-
-		if (regval & not_pageable) {
-			/* pages not supported, trim len to unpaged size */
-			if (off >= ONE_ADDR_EEPROM_UNPAGED_SIZE)
-				return OPTOE_EOF;
-			maxlen = ONE_ADDR_EEPROM_UNPAGED_SIZE - off;
-		} else {
-			/* Pages supported, trim len to the end of pages */
-			maxlen = ONE_ADDR_EEPROM_SIZE - off;
-		}
-		len = (len > maxlen) ? maxlen : len;
-		dev_dbg(&client->dev,
-			"page_legal, QSFP, off %lld len %ld\n",
-			off, (long int) len);
-	}
-	return len;
-}
-
-static ssize_t optoe_read_write(struct optoe_data *optoe,
-		char *buf, loff_t off, size_t len, int opcode)
-{
-	struct i2c_client *client = optoe->client[0];
-	int chunk;
-	int status = 0;
-	ssize_t retval;
-	size_t pending_len = 0, chunk_len = 0;
-	loff_t chunk_offset = 0, chunk_start_offset = 0;
-	loff_t chunk_end_offset = 0;
-
-	dev_dbg(&client->dev,
-		"%s: off %lld  len:%ld, opcode:%s\n",
-		__func__, off, (long int) len,
-		(opcode == OPTOE_READ_OP) ? "r" : "w");
-	if (unlikely(!len))
-		return len;
-
-	/*
-	 * Read data from chip, protecting against concurrent updates
-	 * from this host, but not from other I2C masters.
-	 */
-	mutex_lock(&optoe->lock);
-
-	/*
-	 * Confirm this access fits within the device suppored addr range
-	 */
-	status = optoe_page_legal(optoe, off, len);
-	if ((status == OPTOE_EOF) || (status < 0)) {
-		mutex_unlock(&optoe->lock);
-		return status;
-	}
-	len = status;
-
-	/*
-	 * For each (128 byte) chunk involved in this request, issue a
-	 * separate call to sff_eeprom_update_client(), to
-	 * ensure that each access recalculates the client/page
-	 * and writes the page register as needed.
-	 * Note that chunk to page mapping is confusing, is different for
-	 * QSFP and SFP, and never needs to be done.  Don't try!
-	 */
-	pending_len = len; /* amount remaining to transfer */
-	retval = 0;  /* amount transferred */
-	for (chunk = off >> 7; chunk <= (off + len - 1) >> 7; chunk++) {
-
-		/*
-		 * Compute the offset and number of bytes to be read/write
-		 *
-		 * 1. start at an offset not equal to 0 (within the chunk)
-		 *    and read/write less than the rest of the chunk
-		 * 2. start at an offset not equal to 0 and read/write the rest
-		 *    of the chunk
-		 * 3. start at offset 0 (within the chunk) and read/write less
-		 *    than entire chunk
-		 * 4. start at offset 0 (within the chunk), and read/write
-		 *    the entire chunk
-		 */
-		chunk_start_offset = chunk * OPTOE_PAGE_SIZE;
-		chunk_end_offset = chunk_start_offset + OPTOE_PAGE_SIZE;
-
-		if (chunk_start_offset < off) {
-			chunk_offset = off;
-			if ((off + pending_len) < chunk_end_offset)
-				chunk_len = pending_len;
-			else
-				chunk_len = chunk_end_offset - off;
-		} else {
-			chunk_offset = chunk_start_offset;
-			if (pending_len < OPTOE_PAGE_SIZE)
-				chunk_len = pending_len;
-			else
-				chunk_len = OPTOE_PAGE_SIZE;
-		}
-
-		dev_dbg(&client->dev,
-			"sff_r/w: off %lld, len %ld, chunk_start_offset %lld, chunk_offset %lld, chunk_len %ld, pending_len %ld\n",
-			off, (long int) len, chunk_start_offset, chunk_offset,
-			(long int) chunk_len, (long int) pending_len);
-
-		/*
-		 * note: chunk_offset is from the start of the EEPROM,
-		 * not the start of the chunk
-		 */
-		status = optoe_eeprom_update_client(optoe, buf,
-				chunk_offset, chunk_len, opcode);
-		if (status != chunk_len) {
-			/* This is another 'no device present' path */
-			dev_dbg(&client->dev,
-			"o_u_c: chunk %d c_offset %lld c_len %ld failed %d!\n",
-			chunk, chunk_offset, (long int) chunk_len, status);
-			if (status > 0)
-				retval += status;
-			if (retval == 0)
-				retval = status;
-			break;
-		}
-		buf += status;
-		pending_len -= status;
-		retval += status;
-	}
-	mutex_unlock(&optoe->lock);
-
-	return retval;
-}
-
-static ssize_t optoe_bin_read(struct file *filp, struct kobject *kobj,
-		struct bin_attribute *attr,
-		char *buf, loff_t off, size_t count)
-{
-	struct i2c_client *client = to_i2c_client(container_of(kobj,
-				struct device, kobj));
-	struct optoe_data *optoe = i2c_get_clientdata(client);
-
-	return optoe_read_write(optoe, buf, off, count, OPTOE_READ_OP);
-}
-
-static ssize_t optoe_bin_write(struct file *filp, struct kobject *kobj,
-		struct bin_attribute *attr,
-		char *buf, loff_t off, size_t count)
-{
-	struct i2c_client *client = to_i2c_client(container_of(kobj,
-				struct device, kobj));
-	struct optoe_data *optoe = i2c_get_clientdata(client);
-
-	return optoe_read_write(optoe, buf, off, count, OPTOE_WRITE_OP);
-}
-
-static void optoe_remove(struct i2c_client *client)
-{
-	struct optoe_data *optoe;
-	int i;
-
-	optoe = i2c_get_clientdata(client);
-	sysfs_remove_group(&client->dev.kobj, &optoe->attr_group);
-	sysfs_remove_bin_file(&client->dev.kobj, &optoe->bin);
-
-	for (i = 1; i < optoe->num_addresses; i++)
-		i2c_unregister_device(optoe->client[i]);
-
-#ifdef EEPROM_CLASS
-	eeprom_device_unregister(optoe->eeprom_dev);
-#endif
-
-	kfree(optoe->writebuf);
-	kfree(optoe);
-	return;
-}
-
-static ssize_t show_dev_class(struct device *dev,
-			struct device_attribute *dattr, char *buf)
-{
-	struct i2c_client *client = to_i2c_client(dev);
-	struct optoe_data *optoe = i2c_get_clientdata(client);
-	ssize_t count;
-
-	mutex_lock(&optoe->lock);
-	count = sprintf(buf, "%d\n", optoe->dev_class);
-	mutex_unlock(&optoe->lock);
-
-	return count;
-}
-
-static ssize_t set_dev_class(struct device *dev,
-			struct device_attribute *attr,
-			const char *buf, size_t count)
-{
-	struct i2c_client *client = to_i2c_client(dev);
-	struct optoe_data *optoe = i2c_get_clientdata(client);
-	int dev_class;
-
-	/*
-	 * dev_class is actually the number of i2c addresses used, thus
-	 * legal values are "1" (QSFP class) and "2" (SFP class)
-	 * And...  CMIS spec is 1 i2c address, but puts the pageable
-	 * bit in a different location, so CMIS devices are "3"
-	 */
-
-	if (kstrtoint(buf, 0, &dev_class) != 0 ||
-		dev_class < 1 || dev_class > 3)
-		return -EINVAL;
-
-	mutex_lock(&optoe->lock);
-	if (dev_class == TWO_ADDR) {
-		/* SFP family */
-		/* if it doesn't exist, create 0x51 i2c address */
-		if (!optoe->client[1]) {
-			optoe->client[1] = i2c_new_dummy_device(client->adapter, 0x51);
-			if (!optoe->client[1]) {
-				dev_err(&client->dev,
-					"address 0x51 unavailable\n");
-				mutex_unlock(&optoe->lock);
-				return -EADDRINUSE;
-			}
-		}
-		optoe->bin.size = TWO_ADDR_EEPROM_SIZE;
-		optoe->num_addresses = 2;
-	} else {
-		/* one-address (eg QSFP) and CMIS family */
-		/* if it exists, remove 0x51 i2c address */
-		if (optoe->client[1]) {
-			i2c_unregister_device(optoe->client[1]);
-			optoe->client[1] = NULL;
-		}
-		optoe->bin.size = ONE_ADDR_EEPROM_SIZE;
-		optoe->num_addresses = 1;
-	}
-	optoe->dev_class = dev_class;
-	mutex_unlock(&optoe->lock);
-
-	return count;
-}
-
-/*
- * if using the EEPROM CLASS driver, we don't report a port_name,
- * the EEPROM CLASS drive handles that.  Hence all this code is
- * only compiled if we are NOT using the EEPROM CLASS driver.
- */
-#ifndef EEPROM_CLASS
-
-static ssize_t show_port_name(struct device *dev,
-			struct device_attribute *dattr, char *buf)
-{
-	struct i2c_client *client = to_i2c_client(dev);
-	struct optoe_data *optoe = i2c_get_clientdata(client);
-	ssize_t count;
-
-	mutex_lock(&optoe->lock);
-	count = sprintf(buf, "%s\n", optoe->port_name);
-	mutex_unlock(&optoe->lock);
-
-	return count;
-}
-
-static ssize_t set_port_name(struct device *dev,
-			struct device_attribute *attr,
-			const char *buf, size_t count)
-{
-	struct i2c_client *client = to_i2c_client(dev);
-	struct optoe_data *optoe = i2c_get_clientdata(client);
-	char port_name[MAX_PORT_NAME_LEN];
-
-	/* no checking, this value is not used except by show_port_name */
-
-	if (sscanf(buf, "%19s", port_name) != 1)
-		return -EINVAL;
-
-	mutex_lock(&optoe->lock);
-	strcpy(optoe->port_name, port_name);
-	mutex_unlock(&optoe->lock);
-
-	return count;
-}
-
-static DEVICE_ATTR(port_name,  0644, show_port_name, set_port_name);
-#endif  /* if NOT defined EEPROM_CLASS, the common case */
-
-static DEVICE_ATTR(dev_class,  0644, show_dev_class, set_dev_class);
-
-static struct attribute *optoe_attrs[] = {
-#ifndef EEPROM_CLASS
-	&dev_attr_port_name.attr,
-#endif
-	&dev_attr_dev_class.attr,
-	NULL,
-};
-
-static struct attribute_group optoe_attr_group = {
-	.attrs = optoe_attrs,
-};
-
-static int optoe_probe(struct i2c_client *client,
-			const struct i2c_device_id *id)
-{
-	int err;
-	int use_smbus = 0;
-	struct optoe_platform_data chip;
-	struct optoe_data *optoe;
-	int num_addresses = 0;
-	char port_name[MAX_PORT_NAME_LEN];
-
-	if (client->addr != 0x50) {
-		dev_dbg(&client->dev, "probe, bad i2c addr: 0x%x\n",
-				      client->addr);
-		err = -EINVAL;
-		goto exit;
-	}
-
-	if (client->dev.platform_data) {
-		chip = *(struct optoe_platform_data *)client->dev.platform_data;
-		/* take the port name from the supplied platform data */
-#ifdef EEPROM_CLASS
-		strncpy(port_name, chip.eeprom_data->label, MAX_PORT_NAME_LEN);
-#else
-		memcpy(port_name, chip.port_name, MAX_PORT_NAME_LEN);
-#endif
-		dev_dbg(&client->dev,
-			"probe, chip provided, flags:0x%x; name: %s\n",
-			chip.flags, client->name);
-	} else {
-		if (!id->driver_data) {
-			err = -ENODEV;
-			goto exit;
-		}
-		dev_dbg(&client->dev, "probe, building chip\n");
-		strcpy(port_name, "unitialized");
-		chip.flags = 0;
-#ifdef EEPROM_CLASS
-		chip.eeprom_data = NULL;
-#endif
-	}
-
-	/* Use I2C operations unless we're stuck with SMBus extensions. */
-	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
-		if (i2c_check_functionality(client->adapter,
-				I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
-			use_smbus = I2C_SMBUS_I2C_BLOCK_DATA;
-		} else if (i2c_check_functionality(client->adapter,
-				I2C_FUNC_SMBUS_READ_WORD_DATA)) {
-			use_smbus = I2C_SMBUS_WORD_DATA;
-		} else if (i2c_check_functionality(client->adapter,
-				I2C_FUNC_SMBUS_READ_BYTE_DATA)) {
-			use_smbus = I2C_SMBUS_BYTE_DATA;
-		} else {
-			err = -EPFNOSUPPORT;
-			goto exit;
-		}
-	}
-
-	/*
-	 * Make room for two i2c clients
-	 */
-	num_addresses = 2;
-
-	optoe = kzalloc(sizeof(struct optoe_data) +
-			num_addresses * sizeof(struct i2c_client *),
-			GFP_KERNEL);
-	if (!optoe) {
-		err = -ENOMEM;
-		goto exit;
-	}
-
-	mutex_init(&optoe->lock);
-
-	/* determine whether this is a one-address or two-address module */
-	if ((strcmp(client->name, "wb_optoe1") == 0) ||
-	    (strcmp(client->name, "wb_sff8436") == 0)) {
-		/* one-address (eg QSFP) family */
-		optoe->dev_class = ONE_ADDR;
-		chip.byte_len = ONE_ADDR_EEPROM_SIZE;
-		num_addresses = 1;
-	} else if ((strcmp(client->name, "wb_optoe2") == 0) ||
-		   (strcmp(client->name, "wb_24c04") == 0)) {
-		/* SFP family */
-		optoe->dev_class = TWO_ADDR;
-		chip.byte_len = TWO_ADDR_EEPROM_SIZE;
-		num_addresses = 2;
-	} else if (strcmp(client->name, "wb_optoe3") == 0) {
-		/* CMIS spec */
-		optoe->dev_class = CMIS_ADDR;
-		chip.byte_len = ONE_ADDR_EEPROM_SIZE;
-		num_addresses = 1;
-	} else {     /* those were the only choices */
-		err = -EINVAL;
-		goto exit;
-	}
-
-	dev_dbg(&client->dev, "dev_class: %d\n", optoe->dev_class);
-	optoe->use_smbus = use_smbus;
-	optoe->chip = chip;
-	optoe->num_addresses = num_addresses;
-	memcpy(optoe->port_name, port_name, MAX_PORT_NAME_LEN);
-
-	/*
-	 * Export the EEPROM bytes through sysfs, since that's convenient.
-	 * By default, only root should see the data (maybe passwords etc)
-	 */
-	sysfs_bin_attr_init(&optoe->bin);
-	optoe->bin.attr.name = "eeprom";
-	optoe->bin.attr.mode = 0444;
-	optoe->bin.read = optoe_bin_read;
-	optoe->bin.size = chip.byte_len;
-
-	if (!use_smbus ||
-			(i2c_check_functionality(client->adapter,
-				I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) ||
-			i2c_check_functionality(client->adapter,
-				I2C_FUNC_SMBUS_WRITE_WORD_DATA) ||
-			i2c_check_functionality(client->adapter,
-				I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) {
-		/*
-		 * NOTE: AN-2079
-		 * Finisar recommends that the host implement 1 byte writes
-		 * only since this module only supports 32 byte page boundaries.
-		 * 2 byte writes are acceptable for PE and Vout changes per
-		 * Application Note AN-2071.
-		 */
-		unsigned int write_max = 1;
-
-		optoe->bin.write = optoe_bin_write;
-		optoe->bin.attr.mode |= 0200;
-
-		if (write_max > io_limit)
-			write_max = io_limit;
-		if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX)
-			write_max = I2C_SMBUS_BLOCK_MAX;
-		optoe->write_max = write_max;
-
-		/* buffer (data + address at the beginning) */
-		optoe->writebuf = kmalloc(write_max + 2, GFP_KERNEL);
-		if (!optoe->writebuf) {
-			err = -ENOMEM;
-			goto exit_kfree;
-		}
-	} else {
-		dev_warn(&client->dev,
-			"cannot write due to controller restrictions.");
-	}
-
-	optoe->client[0] = client;
-
-	/* SFF-8472 spec requires that the second I2C address be 0x51 */
-	if (num_addresses == 2) {
-		optoe->client[1] = i2c_new_dummy_device(client->adapter, 0x51);
-		if (!optoe->client[1]) {
-			dev_err(&client->dev, "address 0x51 unavailable\n");
-			err = -EADDRINUSE;
-			goto err_struct;
-		}
-	}
-
-	/* create the sysfs eeprom file */
-	err = sysfs_create_bin_file(&client->dev.kobj, &optoe->bin);
-	if (err)
-		goto err_struct;
-
-	optoe->attr_group = optoe_attr_group;
-
-	err = sysfs_create_group(&client->dev.kobj, &optoe->attr_group);
-	if (err) {
-		dev_err(&client->dev, "failed to create sysfs attribute group.\n");
-		goto err_struct;
-	}
-
-#ifdef EEPROM_CLASS
-	optoe->eeprom_dev = eeprom_device_register(&client->dev,
-							chip.eeprom_data);
-	if (IS_ERR(optoe->eeprom_dev)) {
-		dev_err(&client->dev, "error registering eeprom device.\n");
-		err = PTR_ERR(optoe->eeprom_dev);
-		goto err_sysfs_cleanup;
-	}
-#endif
-
-	i2c_set_clientdata(client, optoe);
-
-	dev_info(&client->dev, "%zu byte %s EEPROM, %s\n",
-		optoe->bin.size, client->name,
-		optoe->bin.write ? "read/write" : "read-only");
-
-	if (use_smbus == I2C_SMBUS_WORD_DATA ||
-	    use_smbus == I2C_SMBUS_BYTE_DATA) {
-		dev_notice(&client->dev,
-			"Falling back to %s reads, performance will suffer\n",
-			use_smbus == I2C_SMBUS_WORD_DATA ? "word" : "byte");
-	}
-
-	return 0;
-
-#ifdef EEPROM_CLASS
-err_sysfs_cleanup:
-	sysfs_remove_group(&client->dev.kobj, &optoe->attr_group);
-	sysfs_remove_bin_file(&client->dev.kobj, &optoe->bin);
-#endif
-
-err_struct:
-	if (num_addresses == 2) {
-		if (optoe->client[1]) {
-			i2c_unregister_device(optoe->client[1]);
-			optoe->client[1] = NULL;
-		}
-	}
-
-	kfree(optoe->writebuf);
-exit_kfree:
-	kfree(optoe);
-exit:
-	dev_dbg(&client->dev, "probe error %d\n", err);
-
-	return err;
-}
-
-/*-------------------------------------------------------------------------*/
-
-static struct i2c_driver optoe_driver = {
-	.driver = {
-		.name = "wb_optoe",
-		.owner = THIS_MODULE,
-	},
-	.probe = optoe_probe,
-	.remove = optoe_remove,
-	.id_table = optoe_ids,
-};
-
-static int __init optoe_init(void)
-{
-
-	if (!io_limit) {
-		pr_err("optoe: io_limit must not be 0!\n");
-		return -EINVAL;
-	}
-
-	io_limit = rounddown_pow_of_two(io_limit);
-	return i2c_add_driver(&optoe_driver);
-}
-module_init(optoe_init);
-
-static void __exit optoe_exit(void)
-{
-	i2c_del_driver(&optoe_driver);
-}
-module_exit(optoe_exit);
-
-MODULE_DESCRIPTION("Driver for optical transceiver (SFP, QSFP, ...) EEPROMs");
-MODULE_AUTHOR("support");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/dev_monitor.py b/platform/broadcom/sonic-platform-modules-micas/common/script/dev_monitor.py
index e13377b80fe9..8ce06db061bf 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/dev_monitor.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/dev_monitor.py
@@ -6,7 +6,7 @@
 import traceback
 import click
 from platform_config import DEV_MONITOR_PARAM
-from platform_util import io_rd, wbi2cget
+from platform_util import io_rd, wbi2cget, exec_os_cmd
 
 
 CONTEXT_SETTINGS = {"help_option_names": ['-h', '--help']}
@@ -111,7 +111,7 @@ def removeDev(self, bus, loc):
         cmd = "echo  0x%02x > /sys/bus/i2c/devices/i2c-%d/delete_device" % (loc, bus)
         devpath = "/sys/bus/i2c/devices/%d-%04x" % (bus, loc)
         if os.path.exists(devpath):
-            os.system(cmd)
+            exec_os_cmd(cmd)
 
     def addDev(self, name, bus, loc):
         if name == "lm75":
@@ -119,7 +119,7 @@ def addDev(self, name, bus, loc):
         cmd = "echo  %s 0x%02x > /sys/bus/i2c/devices/i2c-%d/new_device" % (name, loc, bus)
         devpath = "/sys/bus/i2c/devices/%d-%04x" % (bus, loc)
         if os.path.exists(devpath) is False:
-            os.system(cmd)
+            exec_os_cmd(cmd)
 
     def checkattr(self, bus, loc, attr):
         try:
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/drv_update.py b/platform/broadcom/sonic-platform-modules-micas/common/script/drv_update.py
index 9de4911e8023..ac7c189f1b8f 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/drv_update.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/drv_update.py
@@ -135,16 +135,16 @@ def doDrvUpdate():
 
     if update_initramfs_flag == 1:
         drv_update_debug("starting to update initramfs")
-        os.system("update-initramfs -u")
+        exec_os_cmd("update-initramfs -u")
         drv_update_debug("update initramfs finish")
 
-    os.system("sync")
+    exec_os_cmd("sync")
     if update_initramfs_flag == 1 and err_cnt == 0 and reboot_flag == 1:
         reboot_log = "%DRV_UPDATE-5-REBOOT: Update initramfs is completed, restarting the system to take effect."
         reboot_log_cmd = "echo '%s' > /dev/ttyS0" % reboot_log
         exec_os_cmd(reboot_log_cmd)
         drv_update_info(reboot_log)
-        os.system("/sbin/reboot")
+        exec_os_cmd("/sbin/reboot")
     return
 
 if __name__ == '__main__':
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/generate_airflow.py b/platform/broadcom/sonic-platform-modules-micas/common/script/generate_airflow.py
index 89d3e72335ff..ff4fed46fa13 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/generate_airflow.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/generate_airflow.py
@@ -19,7 +19,7 @@
 import syslog
 import json
 from platform_config import AIR_FLOW_CONF, AIRFLOW_RESULT_FILE
-from platform_util import dev_file_read, byteTostr
+from platform_util import dev_file_read, byteTostr, exec_os_cmd
 from eepromutil.fru import ipmifru
 from eepromutil.cust_fru import CustFru
 from eepromutil.fantlv import fan_tlv
@@ -241,11 +241,11 @@ def generate_airflow():
     out_file_dir = os.path.dirname(AIRFLOW_RESULT_FILE)
     if len(out_file_dir) != 0:
         cmd = "mkdir -p %s" % out_file_dir
-        os.system(cmd)
-        os.system("sync")
+        exec_os_cmd(cmd)
+        exec_os_cmd("sync")
     with open(AIRFLOW_RESULT_FILE, "w") as fd:
         fd.write(ret_json)
-    os.system("sync")
+    exec_os_cmd("sync")
 
 
 if __name__ == '__main__':
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py
index 63acf84b7f3e..5a12b88ac463 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/hal_fanctrl.py
@@ -525,7 +525,7 @@ def checkCritReboot(self):
                     exec_os_cmd(create_judge_file)
                     exec_os_cmd("sync")
                     time.sleep(3)
-                    os.system("/sbin/reboot")
+                    exec_os_cmd("/sbin/reboot")
         except Exception as e:
             fancontrol_error("%%policy: checkCritReboot failed")
             fancontrol_error(str(e))
@@ -577,7 +577,7 @@ def checkEmergReboot(self):
                     exec_os_cmd(create_judge_file)
                     exec_os_cmd("sync")
                     time.sleep(3)
-                    os.system("/sbin/reboot")
+                    exec_os_cmd("/sbin/reboot")
         except Exception as e:
             fancontrol_error("%%policy: checkEmergReboot failed")
             fancontrol_error(str(e))
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor/monitor_fan.py b/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor/monitor_fan.py
index c84319f3b798..bb596a94cc94 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor/monitor_fan.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/intelligent_monitor/monitor_fan.py
@@ -8,6 +8,7 @@
 
 from plat_hal.interface import interface
 from plat_hal.baseutil import baseutil
+from platform_util import exec_os_cmd
 
 
 DEBUG_FILE = "/etc/.monitor_fan_debug_flag"
@@ -19,8 +20,8 @@
 
 def _init_logger():
     if not os.path.exists(LOG_FILE):
-        os.system("mkdir -p %s" % os.path.dirname(LOG_FILE))
-        os.system("sync")
+        exec_os_cmd("mkdir -p %s" % os.path.dirname(LOG_FILE))
+        exec_os_cmd("sync")
     handler = RotatingFileHandler(filename=LOG_FILE, maxBytes=5 * 1024 * 1024, backupCount=1)
     formatter = logging.Formatter("%(asctime)s %(levelname)s %(filename)s[%(funcName)s][%(lineno)s]: %(message)s")
     handler.setFormatter(formatter)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_driver.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_driver.py
index 6d2c6de653d9..e27d461bab81 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_driver.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_driver.py
@@ -75,7 +75,7 @@ def addDev(name, bus, loc):
     cmd = "echo  %s 0x%02x > /sys/bus/i2c/devices/i2c-%d/new_device" % (name, loc, bus)
     devpath = "/sys/bus/i2c/devices/%d-%04x" % (bus, loc)
     if os.path.exists(devpath) is False:
-        os.system(cmd)
+        log_os_system(cmd)
 
 
 def removeOPTOE(startbus, endbus):
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py
index 152dd16a25a6..4dafde2701cb 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_e2.py
@@ -1,6 +1,8 @@
 #!/usr/bin/env python3
 # -*- coding: UTF-8 -*-
 import click
+import os
+import sys
 
 from eepromutil.fru import ipmifru
 from eepromutil.cust_fru import CustFru
@@ -436,4 +438,7 @@ def onie_tlv(e2_path, e2_size):
 
 
 if __name__ == '__main__':
+    if os.geteuid() != 0:
+        print("Root privileges are required for this operation")
+        sys.exit(1)
     main()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_intf.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_intf.py
index 43f36f040d6a..ef27c2392eb4 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_intf.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_intf.py
@@ -1,6 +1,7 @@
 #!/usr/bin/env python3
 import os
 import syslog
+import glob
 import importlib.machinery
 from platform_util import getplatform_name, dev_file_read, dev_file_write, write_sysfs, read_sysfs
 
@@ -29,9 +30,8 @@
 
 CONFIG_FILE_LIST = [
     "/usr/local/bin/",
-    "/usr/local/lib/python3/dist-packages/config/",
-    "/usr/local/lib/python3.7/dist-packages/config/",
-    "/usr/local/lib/python3.9/dist-packages/config/"]
+    "/usr/local/lib/*/dist-packages/config/"
+]
 
 
 def platform_intf_debug(s):
@@ -54,6 +54,11 @@ def __init__(self):
         real_path = None
         platform_name = (getplatform_name()).replace("-", "_")
         for configfile_path in CONFIG_FILE_LIST:
+            if "/*/" in configfile_path:
+                filepath = glob.glob(configfile_path)
+                if len(filepath) == 0:
+                    continue
+                configfile_path = filepath[0]
             configfile = configfile_path + platform_name + "_port_config.py"
             if os.path.exists(configfile):
                 real_path = configfile
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py
index f19231bba0a4..6013c5d65853 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_process.py
@@ -70,7 +70,7 @@ def startAvscontrol():
         cmd = "nohup avscontrol.py start >/dev/null 2>&1 &"
         rets = getPid("avscontrol.py")
         if len(rets) == 0:
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def startFanctrol():
@@ -78,7 +78,7 @@ def startFanctrol():
         cmd = "nohup fancontrol.py start >/dev/null 2>&1 &"
         rets = getPid("fancontrol.py")
         if len(rets) == 0:
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def starthal_fanctrl():
@@ -86,7 +86,7 @@ def starthal_fanctrl():
         cmd = "nohup hal_fanctrl.py start >/dev/null 2>&1 &"
         rets = getPid("hal_fanctrl.py")
         if len(rets) == 0:
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def starthal_ledctrl():
@@ -94,7 +94,7 @@ def starthal_ledctrl():
         cmd = "nohup hal_ledctrl.py start >/dev/null 2>&1 &"
         rets = getPid("hal_ledctrl.py")
         if len(rets) == 0:
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def startDevmonitor():
@@ -102,7 +102,7 @@ def startDevmonitor():
         cmd = "nohup dev_monitor.py start >/dev/null 2>&1 &"
         rets = getPid("dev_monitor.py")
         if len(rets) == 0:
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def startSlotmonitor():
@@ -110,7 +110,7 @@ def startSlotmonitor():
         cmd = "nohup slot_monitor.py start >/dev/null 2>&1 &"
         rets = getPid("slot_monitor.py")
         if len(rets) == 0:
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def startIntelligentmonitor():
@@ -118,7 +118,7 @@ def startIntelligentmonitor():
         cmd = "nohup intelligent_monitor.py >/dev/null 2>&1 &"
         rets = getPid("intelligent_monitor.py")
         if len(rets) == 0:
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def startSignalmonitor():
@@ -126,7 +126,7 @@ def startSignalmonitor():
         cmd = "nohup signal_monitor.py start >/dev/null 2>&1 &"
         rets = getPid("signal_monitor.py")
         if len(rets) == 0:
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def startSff_temp_polling():
@@ -134,7 +134,7 @@ def startSff_temp_polling():
         cmd = "nohup sfp_highest_temperatue.py >/dev/null 2>&1 &"
         rets = getPid("sfp_highest_temperatue.py")
         if len(rets) == 0:
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def startRebootCause():
@@ -142,7 +142,7 @@ def startRebootCause():
         cmd = "nohup reboot_cause.py >/dev/null 2>&1 &"
         rets = getPid("reboot_cause.py")
         if len(rets) == 0:
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def startPMON_sys():
@@ -150,7 +150,7 @@ def startPMON_sys():
         cmd = "nohup pmon_syslog.py >/dev/null 2>&1 &"
         rets = getPid("pmon_syslog.py")
         if len(rets) == 0:
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def startSff_polling():
@@ -158,14 +158,14 @@ def startSff_polling():
         cmd = "nohup sff_polling.py start > /dev/null 2>&1 &"
         rets = getPid("sff_polling.py")
         if len(rets) == 0:
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def generate_air_flow():
     cmd = "nohup generate_airflow.py > /dev/null 2>&1 &"
     rets = getPid("generate_airflow.py")
     if len(rets) == 0:
-        os.system(cmd)
+        log_os_system(cmd)
         time.sleep(1)
 
 
@@ -186,14 +186,14 @@ def start_tty_console():
         cmd = "nohup tty_console.py > /dev/null 2>&1 &"
         rets = getPid("tty_console.py")
         if len(rets) == 0:
-            os.system(cmd)
+            log_os_system(cmd)
 
 def startDrvUpdate():
     if STARTMODULE.get('drv_update', 0) == 1:
         cmd = "nohup drv_update.py >/dev/null 2>&1 &"
         rets = getPid("drv_update.py")
         if len(rets) == 0:
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def stopAvscontrol():
@@ -201,7 +201,7 @@ def stopAvscontrol():
         rets = getPid("avscontrol.py")
         for ret in rets:
             cmd = "kill " + ret
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def stopFanctrol():
@@ -209,7 +209,7 @@ def stopFanctrol():
         rets = getPid("fancontrol.py")  #
         for ret in rets:
             cmd = "kill " + ret
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def stophal_fanctrl():
@@ -217,7 +217,7 @@ def stophal_fanctrl():
         rets = getPid("hal_fanctrl.py")
         for ret in rets:
             cmd = "kill " + ret
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def stophal_ledctrl():
@@ -225,7 +225,7 @@ def stophal_ledctrl():
         rets = getPid("hal_ledctrl.py")
         for ret in rets:
             cmd = "kill " + ret
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def stopDevmonitor():
@@ -233,7 +233,7 @@ def stopDevmonitor():
         rets = getPid("dev_monitor.py")  #
         for ret in rets:
             cmd = "kill " + ret
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def stopSlotmonitor():
@@ -241,7 +241,7 @@ def stopSlotmonitor():
         rets = getPid("slot_monitor.py")  #
         for ret in rets:
             cmd = "kill " + ret
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def stopIntelligentmonitor():
@@ -249,7 +249,7 @@ def stopIntelligentmonitor():
         rets = getPid("intelligent_monitor.py")
         for ret in rets:
             cmd = "kill " + ret
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def stopSignalmonitor():
@@ -257,7 +257,7 @@ def stopSignalmonitor():
         rets = getPid("signal_monitor.py")  #
         for ret in rets:
             cmd = "kill " + ret
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def stopSff_temp_polling():
@@ -265,7 +265,7 @@ def stopSff_temp_polling():
         rets = getPid("sfp_highest_temperatue.py")
         for ret in rets:
             cmd = "kill " + ret
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def stopPMON_sys():
@@ -273,7 +273,7 @@ def stopPMON_sys():
         rets = getPid("pmon_syslog.py")
         for ret in rets:
             cmd = "kill " + ret
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def stopRebootCause():
@@ -281,7 +281,7 @@ def stopRebootCause():
         rets = getPid("reboot_cause.py")
         for ret in rets:
             cmd = "kill " + ret
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def stopSff_polling():
@@ -289,7 +289,7 @@ def stopSff_polling():
         rets = getPid("sff_polling.py")
         for ret in rets:
             cmd = "kill " + ret
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def stopGenerate_air_flow():
@@ -297,7 +297,7 @@ def stopGenerate_air_flow():
         rets = getPid("generate_airflow.py")
         for ret in rets:
             cmd = "kill " + ret
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def stop_tty_console():
@@ -305,7 +305,7 @@ def stop_tty_console():
         rets = getPid("tty_console.py")
         for ret in rets:
             cmd = "kill " + ret
-            os.system(cmd)
+            log_os_system(cmd)
 
 
 def otherinit():
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py
index bd25231d9273..63d69f102b7a 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py
@@ -275,4 +275,7 @@ def getsensors():
 
 
 if __name__ == "__main__":
+    if os.geteuid() != 0:
+        print("Root privileges are required for this operation")
+        sys.exit(1)
     getsensors()
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_util.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_util.py
index 71a97e5a236d..fe4d564ad604 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_util.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_util.py
@@ -214,7 +214,7 @@ def getonieplatform(path):
 def getplatform_config_db():
     if not os.path.isfile(CONFIG_DB_PATH):
         return ""
-    val = os.popen("sonic-cfggen -j %s -v DEVICE_METADATA.localhost.platform" % CONFIG_DB_PATH).read().strip()
+    val = subprocess.check_output(["sonic-cfggen", "-j", CONFIG_DB_PATH, "-v", "DEVICE_METADATA.localhost.platform"]).decode().strip()
     if len(val) <= 0:
         return ""
     return val
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/set_eth_mac.py b/platform/broadcom/sonic-platform-modules-micas/common/script/set_eth_mac.py
index 3e445a3ac73c..f4727d802753 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/set_eth_mac.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/set_eth_mac.py
@@ -185,13 +185,13 @@ def set_e2_mac_to_config_file(eth_name, mac, ifcfg):
         if not os.path.exists(cfg_file_dir):
             cmd = "mkdir -p %s" % cfg_file_dir
             setmac_info("Create interfaces config directory: %s" % cfg_file_dir)
-            os.system(cmd)
-            os.system("sync")
+            exec_os_cmd(cmd)
+            exec_os_cmd("sync")
         wr_val = cfg_prefix + " %s\n" % eth_name
         wr_val += "    %s %s\n" % (mac_prefix, mac)
         with open(ifcfg_file_path, "w") as fd:
             fd.write(wr_val)
-        os.system("sync")
+        exec_os_cmd("sync")
         setmac_info("Create interfaces config: %s with mac address: %s" % (ifcfg_file_path, mac))
         return True
     except Exception as e:
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py
index 2a634ca6b0a8..de661dacdff6 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/sonic_platform/psu.py
@@ -357,3 +357,32 @@ def get_thermal(self, index):
             An object dervied from ThermalBase representing the specified thermal
         """
         return False
+
+    def get_psu_power_warning_suppress_threshold(self):
+        """
+        Retrieve the warning suppress threshold of the power on this PSU
+        The value can be volatile, so the caller should call the API each time it is used.
+    
+        Returns:
+            A float number, the warning suppress threshold of the PSU in watts.
+        """
+        self.psu_power_dict_update()
+        value = self.psu_power_dict["Outputs"]["Power"]["HighAlarm"]
+        if value is None:
+            return None
+        return round(float(value), 1)
+    
+    def get_psu_power_critical_threshold(self):
+        """
+        Retrieve the critical threshold of the power on this PSU
+        The value can be volatile, so the caller should call the API each time it is used.
+    
+        Returns:
+            A float number, the critical threshold of the PSU in watts.
+        """
+        self.psu_power_dict_update()
+        value = self.psu_power_dict["Outputs"]["Power"]["HighAlarm"]
+        if value is None:
+            return None
+        return round(float(value), 1)
+
diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
index 126337656139..546e125314ff 100755
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/config/x86_64_micas_m2_w6510_48v8c_r0_config.py
@@ -738,8 +738,8 @@
     {"name": "wb_i2c_mux_pca954x_device", "delay": 0},
     {"name": "wb_i2c_dev_device", "delay": 0},
     {"name": "wb_lm75", "delay": 0},
-    {"name": "wb_optoe", "delay": 0},
-    {"name": "wb_at24", "delay": 0},
+    {"name": "optoe", "delay": 0},
+    {"name": "at24", "delay": 0},
     {"name": "wb_mac_bsc", "delay": 0},
     {"name": "wb_pmbus_core", "delay": 0},
     {"name": "wb_isl68137", "delay": 0},
@@ -754,17 +754,17 @@
 ]
 
 DEVICE = [
-    {"name": "wb_24c02", "bus": 0, "loc": 0x56},
+    {"name": "24c02", "bus": 0, "loc": 0x56},
     {"name": "wb_mac_bsc_td3", "bus": 3, "loc": 0x44},
     # fan
-    {"name": "wb_24c02", "bus": 16, "loc": 0x50},
-    {"name": "wb_24c02", "bus": 17, "loc": 0x50},
-    {"name": "wb_24c02", "bus": 18, "loc": 0x50},
-    {"name": "wb_24c02", "bus": 19, "loc": 0x50},
+    {"name": "24c02", "bus": 16, "loc": 0x50},
+    {"name": "24c02", "bus": 17, "loc": 0x50},
+    {"name": "24c02", "bus": 18, "loc": 0x50},
+    {"name": "24c02", "bus": 19, "loc": 0x50},
     # psu
-    {"name": "wb_24c02", "bus": 24, "loc": 0x50},
+    {"name": "24c02", "bus": 24, "loc": 0x50},
     {"name": "wb_dps550", "bus": 24, "loc": 0x58},
-    {"name": "wb_24c02", "bus": 25, "loc": 0x50},
+    {"name": "24c02", "bus": 25, "loc": 0x50},
     {"name": "wb_dps550", "bus": 25, "loc": 0x58},
     # temp
     {"name": "wb_lm75", "bus": 3, "loc": 0x48},
@@ -783,8 +783,8 @@
 ]
 
 OPTOE = [
-    {"name": "wb_optoe2", "startbus": 32, "endbus": 79},
-    {"name": "wb_optoe1", "startbus": 80, "endbus": 87},
+    {"name": "optoe2", "startbus": 32, "endbus": 79},
+    {"name": "optoe1", "startbus": 80, "endbus": 87},
 ]
 
 DEV_MONITOR_PARAM = {
@@ -795,7 +795,7 @@
             "present": {"gettype": "i2c", "bus": 6, "loc": 0x0d, "offset": 0x51, "presentbit": 0, "okval": 0},
             "device": [
                 {"id": "psu1pmbus", "name": "wb_dps550", "bus": 24, "loc": 0x58, "attr": "hwmon"},
-                {"id": "psu1frue2", "name": "wb_24c02", "bus": 24, "loc": 0x50, "attr": "eeprom"},
+                {"id": "psu1frue2", "name": "24c02", "bus": 24, "loc": 0x50, "attr": "eeprom"},
             ],
         },
         {
@@ -803,7 +803,7 @@
             "present": {"gettype": "i2c", "bus": 6, "loc": 0x0d, "offset": 0x51, "presentbit": 4, "okval": 0},
             "device": [
                 {"id": "psu2pmbus", "name": "wb_dps550", "bus": 25, "loc": 0x58, "attr": "hwmon"},
-                {"id": "psu2frue2", "name": "wb_24c02", "bus": 25, "loc": 0x50, "attr": "eeprom"},
+                {"id": "psu2frue2", "name": "24c02", "bus": 25, "loc": 0x50, "attr": "eeprom"},
             ],
         },
     ],
@@ -841,7 +841,7 @@
         {
             "name": "eeprom",
             "device": [
-                {"id": "eeprom_1", "name": "wb_24c02", "bus": 0, "loc": 0x56, "attr": "eeprom"},
+                {"id": "eeprom_1", "name": "24c02", "bus": 0, "loc": 0x56, "attr": "eeprom"},
             ],
         },
         {

From 759d665b666134e3262c8edd2c4f81754329cfe5 Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Fri, 10 May 2024 19:42:11 +0800
Subject: [PATCH 27/32] update
 platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../m2-w6510-48v8c/modules/driver/Makefile                      | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile
index 2e9c25ae6b7a..5573a18f0fcc 100755
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/modules/driver/Makefile
@@ -2,7 +2,7 @@ MAKEFILE_FILE_PATH = $(abspath $(lastword $(MAKEFILE_LIST)))
 MODULES_DIR = $(abspath $(MAKEFILE_FILE_PATH)/../../../../common/modules)
 
 EXTRA_CFLAGS+= -I$(MODULES_DIR)
-EXTRA_CFLAGS+= -I$(MODULES_DIR)/linux-5.10
+EXTRA_CFLAGS+= -I$(MODULES_DIR)/linux
 
 obj-m :=  wb_pcie_dev_device.o
 obj-m += wb_i2c_mux_pca954x_device.o

From db247e2d1933af17a3aafb18975321e98a094271 Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Sat, 11 May 2024 17:46:15 +0800
Subject: [PATCH 28/32] fix review comments about kernel driver

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../kernel_drivers_blacklist.conf             |     4 -
 .../common/modules/Makefile                   |    12 +-
 .../common/modules/phy/Makefile               |    23 -
 .../common/modules/phy/mdio_bitbang.c         |   232 -
 .../common/modules/phy/mdio_gpio.c            |   217 -
 .../common/modules/r8168/Makefile             |   195 -
 .../common/modules/r8168/r8168.h              |  2394 --
 .../common/modules/r8168/r8168_asf.c          |   416 -
 .../common/modules/r8168/r8168_asf.h          |   295 -
 .../common/modules/r8168/r8168_dash.h         |   256 -
 .../common/modules/r8168/r8168_fiber.h        |    75 -
 .../common/modules/r8168/r8168_firmware.c     |   264 -
 .../common/modules/r8168/r8168_firmware.h     |    68 -
 .../common/modules/r8168/r8168_n.c            | 32208 ----------------
 .../common/modules/r8168/r8168_realwow.h      |   118 -
 .../common/modules/r8168/r8168_rss.c          |   439 -
 .../common/modules/r8168/r8168_rss.h          |    66 -
 .../common/modules/r8168/rtl_eeprom.c         |   289 -
 .../common/modules/r8168/rtl_eeprom.h         |    56 -
 .../common/modules/r8168/rtltool.c            |   232 -
 .../common/modules/r8168/rtltool.h            |    86 -
 .../common/modules/sdhci/Makefile             |    18 -
 .../common/modules/sdhci/cqhci.h              |   324 -
 .../common/modules/sdhci/sdhci-pci-arasan.c   |   331 -
 .../common/modules/sdhci/sdhci-pci-core.c     |  2468 --
 .../common/modules/sdhci/sdhci-pci-dwc-mshc.c |    84 -
 .../common/modules/sdhci/sdhci-pci-gli.c      |  1159 -
 .../common/modules/sdhci/sdhci-pci-o2micro.c  |   926 -
 .../common/modules/sdhci/sdhci-pci.h          |   199 -
 .../common/modules/sdhci/sdhci.h              |   822 -
 .../common/modules/spi-bitbang-txrx.h         |   107 -
 .../common/modules/wb_eeprom_93xx46.c         |   558 -
 .../modules/{phy => }/wb_mdio_gpio_device.c   |     0
 .../common/modules/wb_spi_93xx46.c            |   111 -
 .../common/modules/wb_spi_gpio.c              |   477 -
 .../common/modules/wb_spi_nor_device.c        |    87 -
 .../common/script/platform_sensors.py         |    12 +-
 .../common/service/subnetwork.service         |     0
 38 files changed, 8 insertions(+), 45620 deletions(-)
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/phy/Makefile
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/phy/mdio_bitbang.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/phy/mdio_gpio.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/Makefile
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_asf.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_asf.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_dash.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_fiber.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_firmware.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_firmware.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_n.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_realwow.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_rss.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_rss.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtl_eeprom.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtl_eeprom.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtltool.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtltool.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/Makefile
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/cqhci.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-arasan.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-core.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-dwc-mshc.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-gli.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-o2micro.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/spi-bitbang-txrx.h
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_eeprom_93xx46.c
 rename platform/broadcom/sonic-platform-modules-micas/common/modules/{phy => }/wb_mdio_gpio_device.c (100%)
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_93xx46.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio.c
 delete mode 100644 platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_nor_device.c
 mode change 100755 => 100644 platform/broadcom/sonic-platform-modules-micas/common/service/subnetwork.service

diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf b/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf
index fea9ac508aaf..a49166ab6207 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modprobe_conf/kernel_drivers_blacklist.conf
@@ -1,7 +1,3 @@
 blacklist wb_fpga_pcie
 blacklist wb_i2c_i801
-blacklist wb_spi_gpio
-blacklist spi_intel
-blacklist spi_intel_platform
 blacklist wb_i2c_ismt
-blacklist spi_intel_pci
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
index caff12ec3c20..bacb3839e834 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/Makefile
@@ -10,10 +10,7 @@ export module_out_put_dir
 KERNEL_MODULES_SRC = $(PWD)/linux
 
 PLAT_SYSFS_DIR = $(PWD)/plat_sysfs
-PHY = $(PWD)/phy
 PINCTRL = $(PWD)/pinctrl
-SDHCI = $(PWD)/sdhci
-RTL_DRIVER_PATH = r8168
 
 export PLAT_SYSFS_DIR
 
@@ -28,32 +25,25 @@ obj-m += wb_lpc_drv.o
 obj-m += wb_i2c_dev.o
 obj-m += wb_platform_i2c_dev.o
 obj-m += wb_io_dev.o
-obj-m += wb_eeprom_93xx46.o
-#obj-m += wb_spi_93xx46.o
 obj-m += wb_gpio_d1500.o
 obj-m += wb_gpio_device.o
 obj-m += wb_i2c_ocores.o
 obj-m += wb_spi_ocores.o
 obj-m += wb_spi_dev.o
 obj-m += wb_wdt.o
-obj-m += wb_spi_gpio.o
 obj-m += wb_spi_gpio_device.o
-#obj-m += wb_spi_nor_device.o
 obj-m += wb_xdpe132g5c.o
 obj-m += wb_uio_irq.o
 obj-m += hw_test.o
-obj-y += r8168/
+obj-m += wb_mdio_gpio_device.o
 
 all :
 	$(MAKE) -C $(KERNEL_MODULES_SRC)
 	$(MAKE) -C $(PLAT_SYSFS_DIR)
-	$(MAKE) -C $(PHY)
 	$(MAKE) -C $(PINCTRL)
-	$(MAKE) -C $(SDHCI)
 	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
 	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
 	cp -p  $(PWD)/*.ko $(module_out_put_dir)
-	cp -p  $(PWD)/$(RTL_DRIVER_PATH)/*.ko $(module_out_put_dir)
 
 clean :
 	rm  -rf $(module_out_put_dir)
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/Makefile
deleted file mode 100644
index 4d5f8d5358d9..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/Makefile
+++ /dev/null
@@ -1,23 +0,0 @@
-PWD		= $(shell pwd)
-
-EXTRA_CFLAGS:= -I$(M)/include
-EXTRA_CFLAGS+= -Wall
-
-ifndef CONFIG_MDIO_BITBANG
-obj-m += mdio_bitbang.o
-endif
-
-ifndef CONFIG_MDIO_GPIO
-obj-m += mdio_gpio.o
-endif
-
-obj-m += wb_mdio_gpio_device.o
-
-all:
-	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
-	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
-	cp -p  $(PWD)/*.ko $(module_out_put_dir)
-clean:
-	rm -f $(PWD)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd $(PWD)/*.mod
-	rm -f $(PWD)/Module.markers $(PWD)/Module.symvers $(PWD)/modules.order
-	rm -rf $(PWD)/.tmp_versions
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/mdio_bitbang.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/mdio_bitbang.c
deleted file mode 100644
index 9c5515f320be..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/mdio_bitbang.c
+++ /dev/null
@@ -1,232 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Bitbanged MDIO support.
- *
- * Author: Scott Wood <scottwood@freescale.com>
- * Copyright (c) 2007 Freescale Semiconductor
- *
- * Based on CPM2 MDIO code which is:
- *
- * Copyright (c) 2003 Intracom S.A.
- *  by Pantelis Antoniou <panto@intracom.gr>
- *
- * 2005 (c) MontaVista Software, Inc.
- * Vitaly Bordug <vbordug@ru.mvista.com>
- */
-
-#include <linux/module.h>
-#include <linux/mdio-bitbang.h>
-#include <linux/types.h>
-#include <linux/delay.h>
-
-#define MDIO_READ 2
-#define MDIO_WRITE 1
-
-#define MDIO_C45 (1<<15)
-#define MDIO_C45_ADDR (MDIO_C45 | 0)
-#define MDIO_C45_READ (MDIO_C45 | 3)
-#define MDIO_C45_WRITE (MDIO_C45 | 1)
-
-#define MDIO_SETUP_TIME 10
-#define MDIO_HOLD_TIME 10
-
-/* Minimum MDC period is 400 ns, plus some margin for error.  MDIO_DELAY
- * is done twice per period.
- */
-#define MDIO_DELAY 250
-
-/* The PHY may take up to 300 ns to produce data, plus some margin
- * for error.
- */
-#define MDIO_READ_DELAY 350
-
-/* MDIO must already be configured as output. */
-static void mdiobb_send_bit(struct mdiobb_ctrl *ctrl, int val)
-{
-	const struct mdiobb_ops *ops = ctrl->ops;
-
-	ops->set_mdio_data(ctrl, val);
-	ndelay(MDIO_DELAY);
-	ops->set_mdc(ctrl, 1);
-	ndelay(MDIO_DELAY);
-	ops->set_mdc(ctrl, 0);
-}
-
-/* MDIO must already be configured as input. */
-static int mdiobb_get_bit(struct mdiobb_ctrl *ctrl)
-{
-	const struct mdiobb_ops *ops = ctrl->ops;
-
-	ndelay(MDIO_DELAY);
-	ops->set_mdc(ctrl, 1);
-	ndelay(MDIO_READ_DELAY);
-	ops->set_mdc(ctrl, 0);
-
-	return ops->get_mdio_data(ctrl);
-}
-
-/* MDIO must already be configured as output. */
-static void mdiobb_send_num(struct mdiobb_ctrl *ctrl, u16 val, int bits)
-{
-	int i;
-
-	for (i = bits - 1; i >= 0; i--)
-		mdiobb_send_bit(ctrl, (val >> i) & 1);
-}
-
-/* MDIO must already be configured as input. */
-static u16 mdiobb_get_num(struct mdiobb_ctrl *ctrl, int bits)
-{
-	int i;
-	u16 ret = 0;
-
-	for (i = bits - 1; i >= 0; i--) {
-		ret <<= 1;
-		ret |= mdiobb_get_bit(ctrl);
-	}
-
-	return ret;
-}
-
-/* Utility to send the preamble, address, and
- * register (common to read and write).
- */
-static void mdiobb_cmd(struct mdiobb_ctrl *ctrl, int op, u8 phy, u8 reg)
-{
-	const struct mdiobb_ops *ops = ctrl->ops;
-	int i;
-
-	ops->set_mdio_dir(ctrl, 1);
-
-	/*
-	 * Send a 32 bit preamble ('1's) with an extra '1' bit for good
-	 * measure.  The IEEE spec says this is a PHY optional
-	 * requirement.  The AMD 79C874 requires one after power up and
-	 * one after a MII communications error.  This means that we are
-	 * doing more preambles than we need, but it is safer and will be
-	 * much more robust.
-	 */
-
-	for (i = 0; i < 32; i++)
-		mdiobb_send_bit(ctrl, 1);
-
-	/* send the start bit (01) and the read opcode (10) or write (01).
-	   Clause 45 operation uses 00 for the start and 11, 10 for
-	   read/write */
-	mdiobb_send_bit(ctrl, 0);
-	if (op & MDIO_C45)
-		mdiobb_send_bit(ctrl, 0);
-	else
-		mdiobb_send_bit(ctrl, 1);
-	mdiobb_send_bit(ctrl, (op >> 1) & 1);
-	mdiobb_send_bit(ctrl, (op >> 0) & 1);
-
-	mdiobb_send_num(ctrl, phy, 5);
-	mdiobb_send_num(ctrl, reg, 5);
-}
-
-/* In clause 45 mode all commands are prefixed by MDIO_ADDR to specify the
-   lower 16 bits of the 21 bit address. This transfer is done identically to a
-   MDIO_WRITE except for a different code. To enable clause 45 mode or
-   MII_ADDR_C45 into the address. Theoretically clause 45 and normal devices
-   can exist on the same bus. Normal devices should ignore the MDIO_ADDR
-   phase. */
-static int mdiobb_cmd_addr(struct mdiobb_ctrl *ctrl, int phy, u32 addr)
-{
-	unsigned int dev_addr = (addr >> 16) & 0x1F;
-	unsigned int reg = addr & 0xFFFF;
-	mdiobb_cmd(ctrl, MDIO_C45_ADDR, phy, dev_addr);
-
-	/* send the turnaround (10) */
-	mdiobb_send_bit(ctrl, 1);
-	mdiobb_send_bit(ctrl, 0);
-
-	mdiobb_send_num(ctrl, reg, 16);
-
-	ctrl->ops->set_mdio_dir(ctrl, 0);
-	mdiobb_get_bit(ctrl);
-
-	return dev_addr;
-}
-
-int mdiobb_read(struct mii_bus *bus, int phy, int reg)
-{
-	struct mdiobb_ctrl *ctrl = bus->priv;
-	int ret, i;
-
-	if (reg & MII_ADDR_C45) {
-		reg = mdiobb_cmd_addr(ctrl, phy, reg);
-		mdiobb_cmd(ctrl, MDIO_C45_READ, phy, reg);
-	} else
-		mdiobb_cmd(ctrl, MDIO_READ, phy, reg);
-
-	ctrl->ops->set_mdio_dir(ctrl, 0);
-
-	/* check the turnaround bit: the PHY should be driving it to zero, if this
-	 * PHY is listed in phy_ignore_ta_mask as having broken TA, skip that
-	 */
-	if (mdiobb_get_bit(ctrl) != 0 &&
-	    !(bus->phy_ignore_ta_mask & (1 << phy))) {
-		/* PHY didn't drive TA low -- flush any bits it
-		 * may be trying to send.
-		 */
-		for (i = 0; i < 32; i++)
-			mdiobb_get_bit(ctrl);
-
-		return 0xffff;
-	}
-
-	ret = mdiobb_get_num(ctrl, 16);
-	mdiobb_get_bit(ctrl);
-	return ret;
-}
-
-int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val)
-{
-	struct mdiobb_ctrl *ctrl = bus->priv;
-
-	if (reg & MII_ADDR_C45) {
-		reg = mdiobb_cmd_addr(ctrl, phy, reg);
-		mdiobb_cmd(ctrl, MDIO_C45_WRITE, phy, reg);
-	} else
-		mdiobb_cmd(ctrl, MDIO_WRITE, phy, reg);
-
-	/* send the turnaround (10) */
-	mdiobb_send_bit(ctrl, 1);
-	mdiobb_send_bit(ctrl, 0);
-
-	mdiobb_send_num(ctrl, val, 16);
-
-	ctrl->ops->set_mdio_dir(ctrl, 0);
-	mdiobb_get_bit(ctrl);
-	return 0;
-}
-
-struct mii_bus *alloc_mdio_bitbang(struct mdiobb_ctrl *ctrl)
-{
-	struct mii_bus *bus;
-
-	bus = mdiobus_alloc();
-	if (!bus)
-		return NULL;
-
-	__module_get(ctrl->ops->owner);
-
-	bus->read = mdiobb_read;
-	bus->write = mdiobb_write;
-	bus->priv = ctrl;
-
-	return bus;
-}
-EXPORT_SYMBOL(alloc_mdio_bitbang);
-
-void free_mdio_bitbang(struct mii_bus *bus)
-{
-	struct mdiobb_ctrl *ctrl = bus->priv;
-
-	module_put(ctrl->ops->owner);
-	mdiobus_free(bus);
-}
-EXPORT_SYMBOL(free_mdio_bitbang);
-
-MODULE_LICENSE("GPL v2");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/mdio_gpio.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/mdio_gpio.c
deleted file mode 100644
index 1b00235d7dc5..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/mdio_gpio.c
+++ /dev/null
@@ -1,217 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * GPIO based MDIO bitbang driver.
- * Supports OpenFirmware.
- *
- * Copyright (c) 2008 CSE Semaphore Belgium.
- *  by Laurent Pinchart <laurentp@cse-semaphore.com>
- *
- * Copyright (C) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
- *
- * Based on earlier work by
- *
- * Copyright (c) 2003 Intracom S.A.
- *  by Pantelis Antoniou <panto@intracom.gr>
- *
- * 2005 (c) MontaVista Software, Inc.
- * Vitaly Bordug <vbordug@ru.mvista.com>
- */
-
-#include <linux/module.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/platform_device.h>
-#include <linux/platform_data/mdio-gpio.h>
-#include <linux/mdio-bitbang.h>
-#include <linux/mdio-gpio.h>
-#include <linux/gpio/consumer.h>
-#include <linux/of_mdio.h>
-
-struct mdio_gpio_info {
-	struct mdiobb_ctrl ctrl;
-	struct gpio_desc *mdc, *mdio, *mdo;
-};
-
-static int mdio_gpio_get_data(struct device *dev,
-			      struct mdio_gpio_info *bitbang)
-{
-	bitbang->mdc = devm_gpiod_get_index(dev, NULL, MDIO_GPIO_MDC,
-					    GPIOD_OUT_LOW);
-	if (IS_ERR(bitbang->mdc))
-		return PTR_ERR(bitbang->mdc);
-
-	bitbang->mdio = devm_gpiod_get_index(dev, NULL, MDIO_GPIO_MDIO,
-					     GPIOD_IN);
-	if (IS_ERR(bitbang->mdio))
-		return PTR_ERR(bitbang->mdio);
-
-	bitbang->mdo = devm_gpiod_get_index_optional(dev, NULL, MDIO_GPIO_MDO,
-						     GPIOD_OUT_LOW);
-	return PTR_ERR_OR_ZERO(bitbang->mdo);
-}
-
-static void mdio_dir(struct mdiobb_ctrl *ctrl, int dir)
-{
-	struct mdio_gpio_info *bitbang =
-		container_of(ctrl, struct mdio_gpio_info, ctrl);
-
-	if (bitbang->mdo) {
-		/* Separate output pin. Always set its value to high
-		 * when changing direction. If direction is input,
-		 * assume the pin serves as pull-up. If direction is
-		 * output, the default value is high.
-		 */
-		gpiod_set_value_cansleep(bitbang->mdo, 1);
-		return;
-	}
-
-	if (dir)
-		gpiod_direction_output(bitbang->mdio, 1);
-	else
-		gpiod_direction_input(bitbang->mdio);
-}
-
-static int mdio_get(struct mdiobb_ctrl *ctrl)
-{
-	struct mdio_gpio_info *bitbang =
-		container_of(ctrl, struct mdio_gpio_info, ctrl);
-
-	return gpiod_get_value_cansleep(bitbang->mdio);
-}
-
-static void mdio_set(struct mdiobb_ctrl *ctrl, int what)
-{
-	struct mdio_gpio_info *bitbang =
-		container_of(ctrl, struct mdio_gpio_info, ctrl);
-
-	if (bitbang->mdo)
-		gpiod_set_value_cansleep(bitbang->mdo, what);
-	else
-		gpiod_set_value_cansleep(bitbang->mdio, what);
-}
-
-static void mdc_set(struct mdiobb_ctrl *ctrl, int what)
-{
-	struct mdio_gpio_info *bitbang =
-		container_of(ctrl, struct mdio_gpio_info, ctrl);
-
-	gpiod_set_value_cansleep(bitbang->mdc, what);
-}
-
-static const struct mdiobb_ops mdio_gpio_ops = {
-	.owner = THIS_MODULE,
-	.set_mdc = mdc_set,
-	.set_mdio_dir = mdio_dir,
-	.set_mdio_data = mdio_set,
-	.get_mdio_data = mdio_get,
-};
-
-static struct mii_bus *mdio_gpio_bus_init(struct device *dev,
-					  struct mdio_gpio_info *bitbang,
-					  int bus_id)
-{
-	struct mdio_gpio_platform_data *pdata = dev_get_platdata(dev);
-	struct mii_bus *new_bus;
-
-	bitbang->ctrl.ops = &mdio_gpio_ops;
-
-	new_bus = alloc_mdio_bitbang(&bitbang->ctrl);
-	if (!new_bus)
-		return NULL;
-
-	new_bus->name = "GPIO Bitbanged MDIO";
-	new_bus->parent = dev;
-
-	if (bus_id != -1)
-		snprintf(new_bus->id, MII_BUS_ID_SIZE, "gpio-%x", bus_id);
-	else
-		strncpy(new_bus->id, "gpio", MII_BUS_ID_SIZE);
-
-	if (pdata) {
-		new_bus->phy_mask = pdata->phy_mask;
-		new_bus->phy_ignore_ta_mask = pdata->phy_ignore_ta_mask;
-	}
-
-	dev_set_drvdata(dev, new_bus);
-
-	return new_bus;
-}
-
-static void mdio_gpio_bus_deinit(struct device *dev)
-{
-	struct mii_bus *bus = dev_get_drvdata(dev);
-
-	free_mdio_bitbang(bus);
-}
-
-static void mdio_gpio_bus_destroy(struct device *dev)
-{
-	struct mii_bus *bus = dev_get_drvdata(dev);
-
-	mdiobus_unregister(bus);
-	mdio_gpio_bus_deinit(dev);
-}
-
-static int mdio_gpio_probe(struct platform_device *pdev)
-{
-	struct mdio_gpio_info *bitbang;
-	struct mii_bus *new_bus;
-	int ret, bus_id;
-
-	bitbang = devm_kzalloc(&pdev->dev, sizeof(*bitbang), GFP_KERNEL);
-	if (!bitbang)
-		return -ENOMEM;
-
-	ret = mdio_gpio_get_data(&pdev->dev, bitbang);
-	if (ret)
-		return ret;
-
-	if (pdev->dev.of_node) {
-		bus_id = of_alias_get_id(pdev->dev.of_node, "mdio-gpio");
-		if (bus_id < 0) {
-			dev_warn(&pdev->dev, "failed to get alias id\n");
-			bus_id = 0;
-		}
-	} else {
-		bus_id = pdev->id;
-	}
-
-	new_bus = mdio_gpio_bus_init(&pdev->dev, bitbang, bus_id);
-	if (!new_bus)
-		return -ENODEV;
-
-	ret = of_mdiobus_register(new_bus, pdev->dev.of_node);
-	if (ret)
-		mdio_gpio_bus_deinit(&pdev->dev);
-
-	return ret;
-}
-
-static int mdio_gpio_remove(struct platform_device *pdev)
-{
-	mdio_gpio_bus_destroy(&pdev->dev);
-
-	return 0;
-}
-
-static const struct of_device_id mdio_gpio_of_match[] = {
-	{ .compatible = "virtual,mdio-gpio", },
-	{ /* sentinel */ }
-};
-MODULE_DEVICE_TABLE(of, mdio_gpio_of_match);
-
-static struct platform_driver mdio_gpio_driver = {
-	.probe = mdio_gpio_probe,
-	.remove = mdio_gpio_remove,
-	.driver		= {
-		.name	= "mdio-gpio",
-		.of_match_table = mdio_gpio_of_match,
-	},
-};
-
-module_platform_driver(mdio_gpio_driver);
-
-MODULE_ALIAS("platform:mdio-gpio");
-MODULE_AUTHOR("Laurent Pinchart, Paulius Zaleckas");
-MODULE_LICENSE("GPL v2");
-MODULE_DESCRIPTION("Generic driver for MDIO bus emulation using GPIO");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/Makefile
deleted file mode 100644
index 81413626b8f5..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/Makefile
+++ /dev/null
@@ -1,195 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-################################################################################
-#
-# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
-# controllers with PCI-Express interface.
-#
-# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License as published by the Free
-# Software Foundation; either version 2 of the License, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-# more details.
-#
-# You should have received a copy of the GNU General Public License along with
-# this program; if not, see <http://www.gnu.org/licenses/>.
-#
-# Author:
-# Realtek NIC software team <nicfae@realtek.com>
-# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
-#
-################################################################################
-
-################################################################################
-#  This product is covered by one or more of the following patents:
-#  US6,570,884, US6,115,776, and US6,327,625.
-################################################################################
-
-CONFIG_SOC_LAN = n
-ENABLE_FIBER_SUPPORT = n
-ENABLE_REALWOW_SUPPORT = n
-ENABLE_DASH_SUPPORT = n
-ENABLE_DASH_PRINTER_SUPPORT = n
-CONFIG_DOWN_SPEED_100 = n
-CONFIG_ASPM = y
-ENABLE_S5WOL = y
-ENABLE_S5_KEEP_CURR_MAC = n
-ENABLE_EEE = n
-ENABLE_S0_MAGIC_PACKET = n
-CONFIG_DYNAMIC_ASPM = y
-ENABLE_USE_FIRMWARE_FILE = n
-CONFIG_CTAP_SHORT_OFF = n
-ENABLE_MULTIPLE_TX_QUEUE = n
-ENABLE_RSS_SUPPORT = n
-ENABLE_LIB_SUPPORT = n
-DISABLE_WOL_SUPPORT = n
-
-ifneq ($(KERNELRELEASE),)
-	obj-m := r8168.o
-	r8168-objs := r8168_n.o r8168_asf.o rtl_eeprom.o rtltool.o
-	ifeq ($(CONFIG_SOC_LAN), y)
-		EXTRA_CFLAGS += -DCONFIG_SOC_LAN
-	endif
-	ifeq ($(ENABLE_FIBER_SUPPORT), y)
-	    r8168-objs += r8168_fiber.o
-		EXTRA_CFLAGS += -DENABLE_FIBER_SUPPORT
-	endif
-	ifeq ($(ENABLE_REALWOW_SUPPORT), y)
-	    r8168-objs += r8168_realwow.o
-		EXTRA_CFLAGS += -DENABLE_REALWOW_SUPPORT
-	endif
-	ifeq ($(ENABLE_DASH_SUPPORT), y)
-	    r8168-objs += r8168_dash.o
-		EXTRA_CFLAGS += -DENABLE_DASH_SUPPORT
-	endif
-	ifeq ($(ENABLE_DASH_PRINTER_SUPPORT), y)
-	    r8168-objs += r8168_dash.o
-		EXTRA_CFLAGS += -DENABLE_DASH_SUPPORT -DENABLE_DASH_PRINTER_SUPPORT
-	endif
-	ifneq ($(ENABLE_RSS_SUPPORT), y)
-		EXTRA_CFLAGS += -DCONFIG_R8168_NAPI
-	endif
-	EXTRA_CFLAGS += -DCONFIG_R8168_VLAN
-	ifeq ($(CONFIG_DOWN_SPEED_100), y)
-		EXTRA_CFLAGS += -DCONFIG_DOWN_SPEED_100
-	endif
-	ifeq ($(CONFIG_ASPM), y)
-		EXTRA_CFLAGS += -DCONFIG_ASPM
-	endif
-	ifeq ($(ENABLE_S5WOL), y)
-		EXTRA_CFLAGS += -DENABLE_S5WOL
-	endif
-	ifeq ($(ENABLE_S5_KEEP_CURR_MAC), y)
-		EXTRA_CFLAGS += -DENABLE_S5_KEEP_CURR_MAC
-	endif
-	ifeq ($(ENABLE_EEE), y)
-		EXTRA_CFLAGS += -DENABLE_EEE
-	endif
-	ifeq ($(ENABLE_S0_MAGIC_PACKET), y)
-		EXTRA_CFLAGS += -DENABLE_S0_MAGIC_PACKET
-	endif
-	ifeq ($(CONFIG_DYNAMIC_ASPM), y)
-		EXTRA_CFLAGS += -DCONFIG_DYNAMIC_ASPM
-	endif
-	ifeq ($(ENABLE_USE_FIRMWARE_FILE), y)
-		r8168-objs += r8168_firmware.o
-		EXTRA_CFLAGS += -DENABLE_USE_FIRMWARE_FILE
-	endif
-	ifeq ($(CONFIG_CTAP_SHORT_OFF), y)
-		EXTRA_CFLAGS += -DCONFIG_CTAP_SHORT_OFF
-	endif
-	ifeq ($(ENABLE_MULTIPLE_TX_QUEUE), y)
-		EXTRA_CFLAGS += -DENABLE_MULTIPLE_TX_QUEUE
-	endif
-	ifeq ($(ENABLE_RSS_SUPPORT), y)
-		r8168-objs += r8168_rss.o
-		EXTRA_CFLAGS += -DENABLE_RSS_SUPPORT
-	endif
-	ifeq ($(ENABLE_LIB_SUPPORT), y)
-		r8168-objs += r8168_lib.o
-		EXTRA_CFLAGS += -DENABLE_LIB_SUPPORT
-	endif
-	ifeq ($(DISABLE_WOL_SUPPORT), y)
-		EXTRA_CFLAGS += -DDISABLE_WOL_SUPPORT
-	endif
-else
-	BASEDIR := /lib/modules/$(shell uname -r)
-	KERNELDIR ?= $(BASEDIR)/build
-	PWD :=$(shell pwd)
-	DRIVERDIR := $(shell find $(BASEDIR)/kernel/drivers/net/ethernet -name realtek -type d)
-	ifeq ($(DRIVERDIR),)
-		DRIVERDIR := $(shell find $(BASEDIR)/kernel/drivers/net -name realtek -type d)
-	endif
-	ifeq ($(DRIVERDIR),)
-		DRIVERDIR := $(BASEDIR)/kernel/drivers/net
-	endif
-	RTKDIR := $(subst $(BASEDIR)/,,$(DRIVERDIR))
-
-	KERNEL_GCC_VERSION := $(shell cat /proc/version | sed -n 's/.*gcc version \([[:digit:]]\.[[:digit:]]\.[[:digit:]]\).*/\1/p')
-	CCVERSION = $(shell $(CC) -dumpversion)
-
-	KVER = $(shell uname -r)
-	KMAJ = $(shell echo $(KVER) | \
-	sed -e 's/^\([0-9][0-9]*\)\.[0-9][0-9]*\.[0-9][0-9]*.*/\1/')
-	KMIN = $(shell echo $(KVER) | \
-	sed -e 's/^[0-9][0-9]*\.\([0-9][0-9]*\)\.[0-9][0-9]*.*/\1/')
-	KREV = $(shell echo $(KVER) | \
-	sed -e 's/^[0-9][0-9]*\.[0-9][0-9]*\.\([0-9][0-9]*\).*/\1/')
-
-	kver_ge = $(shell \
-	echo test | awk '{if($(KMAJ) < $(1)) {print 0} else { \
-	if($(KMAJ) > $(1)) {print 1} else { \
-	if($(KMIN) < $(2)) {print 0} else { \
-	if($(KMIN) > $(2)) {print 1} else { \
-	if($(KREV) < $(3)) {print 0} else { print 1 } \
-	}}}}}' \
-	)
-
-.PHONY: all
-all: print_vars clean modules install
-
-print_vars:
-	@echo
-	@echo "CC: " $(CC)
-	@echo "CCVERSION: " $(CCVERSION)
-	@echo "KERNEL_GCC_VERSION: " $(KERNEL_GCC_VERSION)
-	@echo "KVER: " $(KVER)
-	@echo "KMAJ: " $(KMAJ)
-	@echo "KMIN: " $(KMIN)
-	@echo "KREV: " $(KREV)
-	@echo "BASEDIR: " $(BASEDIR)
-	@echo "DRIVERDIR: " $(DRIVERDIR)
-	@echo "PWD: " $(PWD)
-	@echo "RTKDIR: " $(RTKDIR)
-	@echo
-
-.PHONY:modules
-modules:
-#ifeq ($(call kver_ge,5,0,0),1)
-	$(MAKE) -C $(KERNELDIR) M=$(PWD) modules
-#else
-#	$(MAKE) -C $(KERNELDIR) SUBDIRS=$(PWD) modules
-#endif
-
-.PHONY:clean
-clean:
-#ifeq ($(call kver_ge,5,0,0),1)
-	$(MAKE) -C $(KERNELDIR) M=$(PWD) clean
-#else
-#	$(MAKE) -C $(KERNELDIR) SUBDIRS=$(PWD) clean
-#endif
-
-.PHONY:install
-install:
-#ifeq ($(call kver_ge,5,0,0),1)
-	$(MAKE) -C $(KERNELDIR) M=$(PWD) INSTALL_MOD_DIR=$(RTKDIR) modules_install
-#else
-#	$(MAKE) -C $(KERNELDIR) SUBDIRS=$(PWD) INSTALL_MOD_DIR=$(RTKDIR) modules_install
-#endif
-
-endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168.h
deleted file mode 100644
index f3b798985b92..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168.h
+++ /dev/null
@@ -1,2394 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
-################################################################################
-#
-# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
-# controllers with PCI-Express interface.
-#
-# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License as published by the Free
-# Software Foundation; either version 2 of the License, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-# more details.
-#
-# You should have received a copy of the GNU General Public License along with
-# this program; if not, see <http://www.gnu.org/licenses/>.
-#
-# Author:
-# Realtek NIC software team <nicfae@realtek.com>
-# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
-#
-################################################################################
-*/
-
-/************************************************************************************
- *  This product is covered by one or more of the following patents:
- *  US6,570,884, US6,115,776, and US6,327,625.
- ***********************************************************************************/
-
-#include <linux/ethtool.h>
-#include <linux/interrupt.h>
-#include <linux/version.h>
-#include "r8168_dash.h"
-#include "r8168_realwow.h"
-#include "r8168_fiber.h"
-#include "r8168_rss.h"
-#ifdef ENABLE_LIB_SUPPORT
-#include "r8168_lib.h"
-#endif
-
-/*
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0)&& !defined(ENABLE_LIB_SUPPORT)
-#define RTL_USE_NEW_INTR_API
-#endif
-*/
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32)
-typedef int netdev_tx_t;
-#endif
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
-#define skb_transport_offset(skb) (skb->h.raw - skb->data)
-#endif
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)
-#define device_set_wakeup_enable(dev, val)	do {} while (0)
-#endif
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0)
-static inline void ether_addr_copy(u8 *dst, const u8 *src)
-{
-        u16 *a = (u16 *)dst;
-        const u16 *b = (const u16 *)src;
-
-        a[0] = b[0];
-        a[1] = b[1];
-        a[2] = b[2];
-}
-#endif
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0)
-#define IS_ERR_OR_NULL(ptr)			(!ptr)
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0)
-#define reinit_completion(x)			((x)->done = 0)
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39)
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)
-#define pm_runtime_mark_last_busy(x)
-#define pm_runtime_put_autosuspend(x)		pm_runtime_put(x)
-#define pm_runtime_put_sync_autosuspend(x)	pm_runtime_put_sync(x)
-
-static inline bool pm_runtime_suspended(struct device *dev)
-{
-        return dev->power.runtime_status == RPM_SUSPENDED
-               && !dev->power.disable_depth;
-}
-
-static inline bool pm_runtime_active(struct device *dev)
-{
-        return dev->power.runtime_status == RPM_ACTIVE
-               || dev->power.disable_depth;
-}
-#endif
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36)
-#define queue_delayed_work(long_wq, work, delay)	schedule_delayed_work(work, delay)
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
-#define netif_printk(priv, type, level, netdev, fmt, args...)	\
-	do {								\
-		if (netif_msg_##type(priv))				\
-			printk(level "%s: " fmt,(netdev)->name , ##args); \
-	} while (0)
-
-#define netif_emerg(priv, type, netdev, fmt, args...)		\
-		netif_printk(priv, type, KERN_EMERG, netdev, fmt, ##args)
-#define netif_alert(priv, type, netdev, fmt, args...)		\
-		netif_printk(priv, type, KERN_ALERT, netdev, fmt, ##args)
-#define netif_crit(priv, type, netdev, fmt, args...)		\
-		netif_printk(priv, type, KERN_CRIT, netdev, fmt, ##args)
-#define netif_err(priv, type, netdev, fmt, args...)		\
-		netif_printk(priv, type, KERN_ERR, netdev, fmt, ##args)
-#define netif_warn(priv, type, netdev, fmt, args...)		\
-		netif_printk(priv, type, KERN_WARNING, netdev, fmt, ##args)
-#define netif_notice(priv, type, netdev, fmt, args...)		\
-		netif_printk(priv, type, KERN_NOTICE, netdev, fmt, ##args)
-#define netif_info(priv, type, netdev, fmt, args...)		\
-		netif_printk(priv, type, KERN_INFO, (netdev), fmt, ##args)
-#endif
-#endif
-#endif
-#endif
-#endif
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15)
-#define setup_timer(_timer, _function, _data) \
-do { \
-	(_timer)->function = _function; \
-	(_timer)->data = _data; \
-	init_timer(_timer); \
-} while (0)
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15)
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0)
-#if defined(skb_vlan_tag_present) && !defined(vlan_tx_tag_present)
-#define vlan_tx_tag_present skb_vlan_tag_present
-#endif
-#if defined(skb_vlan_tag_get) && !defined(vlan_tx_tag_get)
-#define vlan_tx_tag_get skb_vlan_tag_get
-#endif
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0)
-
-#define RTL_ALLOC_SKB_INTR(napi, length) dev_alloc_skb(length)
-#define R8168_USE_NAPI_ALLOC_SKB 0
-#ifdef CONFIG_R8168_NAPI
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,19,0)
-#undef RTL_ALLOC_SKB_INTR
-#define RTL_ALLOC_SKB_INTR(napi, length) napi_alloc_skb(napi, length)
-#undef R8168_USE_NAPI_ALLOC_SKB
-#define R8168_USE_NAPI_ALLOC_SKB 1
-#endif
-#endif
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)
-#define eth_random_addr(addr) random_ether_addr(addr)
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0)
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)
-#define netdev_features_t  u32
-#endif
-#endif
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,5,0)
-#define NETIF_F_ALL_CSUM        NETIF_F_CSUM_MASK
-#else
-#ifndef NETIF_F_ALL_CSUM
-#define NETIF_F_ALL_CSUM        NETIF_F_CSUM_MASK
-#endif
-#endif
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37)
-#define ENABLE_R8168_PROCFS
-#endif
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
-#define NETIF_F_HW_VLAN_RX	NETIF_F_HW_VLAN_CTAG_RX
-#define NETIF_F_HW_VLAN_TX	NETIF_F_HW_VLAN_CTAG_TX
-#endif
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0)
-#define __devinit
-#define __devexit
-#define __devexit_p(func)   func
-#endif
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
-#define CHECKSUM_PARTIAL CHECKSUM_HW
-#endif
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-#define irqreturn_t void
-#define IRQ_HANDLED    1
-#define IRQ_NONE   0
-#define IRQ_RETVAL(x)
-#endif
-
-#ifndef NETIF_F_RXALL
-#define NETIF_F_RXALL  0
-#endif
-
-#ifndef NETIF_F_RXFCS
-#define NETIF_F_RXFCS  0
-#endif
-
-#if !defined(HAVE_FREE_NETDEV) && (LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0))
-#define free_netdev(x)  kfree(x)
-#endif
-
-#ifndef SET_NETDEV_DEV
-#define SET_NETDEV_DEV(net, pdev)
-#endif
-
-#ifndef SET_MODULE_OWNER
-#define SET_MODULE_OWNER(dev)
-#endif
-
-#ifndef SA_SHIRQ
-#define SA_SHIRQ IRQF_SHARED
-#endif
-
-#ifndef NETIF_F_GSO
-#define gso_size    tso_size
-#define gso_segs    tso_segs
-#endif
-
-#ifndef PCI_VENDOR_ID_DLINK
-#define PCI_VENDOR_ID_DLINK 0x1186
-#endif
-
-#ifndef dma_mapping_error
-#define dma_mapping_error(a,b) 0
-#endif
-
-#ifndef netif_err
-#define netif_err(a,b,c,d)
-#endif
-
-#ifndef AUTONEG_DISABLE
-#define AUTONEG_DISABLE   0x00
-#endif
-
-#ifndef AUTONEG_ENABLE
-#define AUTONEG_ENABLE    0x01
-#endif
-
-#ifndef BMCR_SPEED1000
-#define BMCR_SPEED1000  0x0040
-#endif
-
-#ifndef BMCR_SPEED100
-#define BMCR_SPEED100   0x2000
-#endif
-
-#ifndef BMCR_SPEED10
-#define BMCR_SPEED10    0x0000
-#endif
-
-#ifndef SPEED_UNKNOWN
-#define SPEED_UNKNOWN   -1
-#endif
-
-#ifndef DUPLEX_UNKNOWN
-#define DUPLEX_UNKNOWN  0xff
-#endif
-
-#ifndef SUPPORTED_Pause
-#define SUPPORTED_Pause  (1 << 13)
-#endif
-
-#ifndef SUPPORTED_Asym_Pause
-#define SUPPORTED_Asym_Pause  (1 << 14)
-#endif
-
-#ifndef  MDIO_EEE_100TX
-#define  MDIO_EEE_100TX  0x0002
-#endif
-
-#ifndef  MDIO_EEE_1000T
-#define  MDIO_EEE_1000T  0x0004
-#endif
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
-#ifdef CONFIG_NET_POLL_CONTROLLER
-#define RTL_NET_POLL_CONTROLLER dev->poll_controller=rtl8168_netpoll
-#else
-#define RTL_NET_POLL_CONTROLLER
-#endif
-
-#ifdef CONFIG_R8168_VLAN
-#define RTL_SET_VLAN dev->vlan_rx_register=rtl8168_vlan_rx_register
-#else
-#define RTL_SET_VLAN
-#endif
-
-#define RTL_NET_DEVICE_OPS(ops) dev->open=rtl8168_open; \
-                    dev->hard_start_xmit=rtl8168_start_xmit; \
-                    dev->get_stats=rtl8168_get_stats; \
-                    dev->stop=rtl8168_close; \
-                    dev->tx_timeout=rtl8168_tx_timeout; \
-                    dev->set_multicast_list=rtl8168_set_rx_mode; \
-                    dev->change_mtu=rtl8168_change_mtu; \
-                    dev->set_mac_address=rtl8168_set_mac_address; \
-                    dev->do_ioctl=rtl8168_do_ioctl; \
-                    RTL_NET_POLL_CONTROLLER; \
-                    RTL_SET_VLAN;
-#else
-#define RTL_NET_DEVICE_OPS(ops) dev->netdev_ops=&ops
-#endif
-
-#ifndef FALSE
-#define FALSE 0
-#endif
-
-#ifndef TRUE
-#define TRUE  1
-#endif
-
-#ifndef false
-#define false 0
-#endif
-
-#ifndef true
-#define true  1
-#endif
-
-//Hardware will continue interrupt 10 times after interrupt finished.
-#define RTK_KEEP_INTERRUPT_COUNT (10)
-
-//Due to the hardware design of RTL8111B, the low 32 bit address of receive
-//buffer must be 8-byte alignment.
-#ifndef NET_IP_ALIGN
-#define NET_IP_ALIGN        2
-#endif
-#define RTK_RX_ALIGN        NET_IP_ALIGN
-
-#ifdef CONFIG_R8168_NAPI
-#define NAPI_SUFFIX "-NAPI"
-#else
-#define NAPI_SUFFIX ""
-#endif
-#ifdef ENABLE_FIBER_SUPPORT
-#define FIBER_SUFFIX "-FIBER"
-#else
-#define FIBER_SUFFIX ""
-#endif
-#ifdef ENABLE_REALWOW_SUPPORT
-#define REALWOW_SUFFIX "-REALWOW"
-#else
-#define REALWOW_SUFFIX ""
-#endif
-#if defined(ENABLE_DASH_PRINTER_SUPPORT)
-#define DASH_SUFFIX "-PRINTER"
-#elif defined(ENABLE_DASH_SUPPORT)
-#define DASH_SUFFIX "-DASH"
-#else
-#define DASH_SUFFIX ""
-#endif
-#if defined(ENABLE_RSS_SUPPORT)
-#define RSS_SUFFIX "-RSS"
-#else
-#define RSS_SUFFIX ""
-#endif
-
-#define RTL8168_VERSION "8.052.01" NAPI_SUFFIX FIBER_SUFFIX REALWOW_SUFFIX DASH_SUFFIX RSS_SUFFIX
-#define MODULENAME "r8168"
-#define PFX MODULENAME ": "
-
-#define GPL_CLAIM "\
-r8168  Copyright (C) 2023 Realtek NIC software team <nicfae@realtek.com> \n \
-This program comes with ABSOLUTELY NO WARRANTY; for details, please see <http://www.gnu.org/licenses/>. \n \
-This is free software, and you are welcome to redistribute it under certain conditions; see <http://www.gnu.org/licenses/>. \n"
-
-#ifdef RTL8168_DEBUG
-#define assert(expr) \
-        if(!(expr)) {                   \
-            printk( "Assertion failed! %s,%s,%s,line=%d\n", \
-            #expr,__FILE__,__FUNCTION__,__LINE__);      \
-        }
-#define dprintk(fmt, args...)   do { printk(PFX fmt, ## args); } while (0)
-#else
-#define assert(expr) do {} while (0)
-#define dprintk(fmt, args...)   do {} while (0)
-#endif /* RTL8168_DEBUG */
-
-#define R8168_MSG_DEFAULT \
-    (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN)
-
-#ifdef CONFIG_R8168_NAPI
-#define rtl8168_rx_hwaccel_skb      vlan_hwaccel_receive_skb
-#define rtl8168_rx_quota(count, quota)  min(count, quota)
-#else
-#define rtl8168_rx_hwaccel_skb      vlan_hwaccel_rx
-#define rtl8168_rx_quota(count, quota)  count
-#endif
-
-/* MAC address length */
-#ifndef MAC_ADDR_LEN
-#define MAC_ADDR_LEN    6
-#endif
-
-#ifndef MAC_PROTOCOL_LEN
-#define MAC_PROTOCOL_LEN    2
-#endif
-
-#ifndef ETH_FCS_LEN
-#define ETH_FCS_LEN	  4
-#endif
-
-#ifndef NETIF_F_TSO6
-#define NETIF_F_TSO6  0
-#endif
-
-#define Reserved2_data  7
-#define RX_DMA_BURST    7   /* Maximum PCI burst, '6' is 1024 */
-#define TX_DMA_BURST_unlimited  7
-#define TX_DMA_BURST_1024   6
-#define TX_DMA_BURST_512    5
-#define TX_DMA_BURST_256    4
-#define TX_DMA_BURST_128    3
-#define TX_DMA_BURST_64     2
-#define TX_DMA_BURST_32     1
-#define TX_DMA_BURST_16     0
-#define Reserved1_data  0x3F
-#define RxPacketMaxSize 0x3FE8  /* 16K - 1 - ETH_HLEN - VLAN - CRC... */
-#define Jumbo_Frame_1k  ETH_DATA_LEN
-#define Jumbo_Frame_2k  (2*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
-#define Jumbo_Frame_3k  (3*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
-#define Jumbo_Frame_4k  (4*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
-#define Jumbo_Frame_5k  (5*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
-#define Jumbo_Frame_6k  (6*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
-#define Jumbo_Frame_7k  (7*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
-#define Jumbo_Frame_8k  (8*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
-#define Jumbo_Frame_9k  (9*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN)
-#define InterFrameGap   0x03    /* 3 means InterFrameGap = the shortest one */
-#define RxEarly_off_V1 (0x07 << 11)
-#define RxEarly_off_V2 (1 << 11)
-#define Rx_Single_fetch_V2 (1 << 14)
-
-#define R8168_REGS_SIZE     (256)
-#define R8168_MAC_REGS_SIZE     (256)
-#define R8168_PHY_REGS_SIZE     (16*2)
-#define R8168_EPHY_REGS_SIZE  	(31*2)
-#define R8168_ERI_REGS_SIZE  	(0x100)
-#define R8168_REGS_DUMP_SIZE     (0x400)
-#define R8168_PCI_REGS_SIZE  	(0x100)
-#define R8168_NAPI_WEIGHT   64
-
-#define R8168_MAX_MSIX_VEC   4
-
-#define RTL8168_TX_TIMEOUT  (6 * HZ)
-#define RTL8168_LINK_TIMEOUT    (1 * HZ)
-#define RTL8168_ESD_TIMEOUT (2 * HZ)
-
-#define MAX_NUM_TX_DESC 1024    /* Maximum number of Tx descriptor registers */
-#define MAX_NUM_RX_DESC 1024    /* Maximum number of Rx descriptor registers */
-
-#define MIN_NUM_TX_DESC 32    /* Minimum number of Tx descriptor registers */
-#define MIN_NUM_RX_DESC 32    /* Minimum number of Rx descriptor registers */
-
-#define NUM_TX_DESC 1024    /* Number of Tx descriptor registers */
-#define NUM_RX_DESC 1024    /* Number of Rx descriptor registers */
-
-#define RX_BUF_SIZE 0x05F2  /* 0x05F2 = 1522bye */
-#define R8168_MAX_TX_QUEUES (2)
-#define R8168_MAX_RX_QUEUES (4)
-#define R8168_MAX_QUEUES R8168_MAX_RX_QUEUES
-#define R8168_MULTI_TX_Q(tp) (rtl8168_tot_tx_rings(tp) > 1)
-#define R8168_MULTI_RX_Q(tp) (rtl8168_tot_rx_rings(tp) > 1)
-#define R8168_MULTI_RX_4Q(tp) (rtl8168_tot_rx_rings(tp) > 3)
-#define R8168_MULTI_RSS_4Q(tp) (tp->num_hw_tot_en_rx_rings > 3)
-
-#define OCP_STD_PHY_BASE	0xa400
-
-//Channel Wait Count
-#define R8168_CHANNEL_WAIT_COUNT (20000)
-#define R8168_CHANNEL_WAIT_TIME (1)  // 1us
-#define R8168_CHANNEL_EXIT_DELAY_TIME (20)  //20us
-
-#define NODE_ADDRESS_SIZE 6
-
-#define SHORT_PACKET_PADDING_BUF_SIZE 256
-
-#define RTK_MAGIC_DEBUG_VALUE 0x0badbeef
-
-/* write/read MMIO register */
-#define RTL_W8(tp, reg, val8)	writeb((val8), tp->mmio_addr + (reg))
-#define RTL_W16(tp, reg, val16)	writew((val16), tp->mmio_addr + (reg))
-#define RTL_W32(tp, reg, val32)	writel((val32), tp->mmio_addr + (reg))
-#define RTL_R8(tp, reg)		readb(tp->mmio_addr + (reg))
-#define RTL_R16(tp, reg)		readw(tp->mmio_addr + (reg))
-#define RTL_R32(tp, reg)		((unsigned long) readl(tp->mmio_addr + (reg)))
-
-#ifndef DMA_64BIT_MASK
-#define DMA_64BIT_MASK  0xffffffffffffffffULL
-#endif
-
-#ifndef DMA_32BIT_MASK
-#define DMA_32BIT_MASK  0x00000000ffffffffULL
-#endif
-
-#ifndef NETDEV_TX_OK
-#define NETDEV_TX_OK 0      /* driver took care of packet */
-#endif
-
-#ifndef NETDEV_TX_BUSY
-#define NETDEV_TX_BUSY 1    /* driver tx path was busy*/
-#endif
-
-#ifndef NETDEV_TX_LOCKED
-#define NETDEV_TX_LOCKED -1 /* driver tx lock was already taken */
-#endif
-
-#ifndef ADVERTISED_Pause
-#define ADVERTISED_Pause    (1 << 13)
-#endif
-
-#ifndef ADVERTISED_Asym_Pause
-#define ADVERTISED_Asym_Pause   (1 << 14)
-#endif
-
-#ifndef ADVERTISE_PAUSE_CAP
-#define ADVERTISE_PAUSE_CAP 0x400
-#endif
-
-#ifndef ADVERTISE_PAUSE_ASYM
-#define ADVERTISE_PAUSE_ASYM    0x800
-#endif
-
-#ifndef MII_CTRL1000
-#define MII_CTRL1000        0x09
-#endif
-
-#ifndef ADVERTISE_1000FULL
-#define ADVERTISE_1000FULL  0x200
-#endif
-
-#ifndef ADVERTISE_1000HALF
-#define ADVERTISE_1000HALF  0x100
-#endif
-
-#ifndef ETH_MIN_MTU
-#define ETH_MIN_MTU  68
-#endif
-
-/*****************************************************************************/
-
-//#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3)
-#if (( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,27) ) || \
-     (( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) ) && \
-      ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3) )))
-/* copied from linux kernel 2.6.20 include/linux/netdev.h */
-#define NETDEV_ALIGN        32
-#define NETDEV_ALIGN_CONST  (NETDEV_ALIGN - 1)
-
-static inline void *netdev_priv(struct net_device *dev)
-{
-        return (char *)dev + ((sizeof(struct net_device)
-                               + NETDEV_ALIGN_CONST)
-                              & ~NETDEV_ALIGN_CONST);
-}
-#endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3)
-
-/*****************************************************************************/
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
-#define RTLDEV  tp
-#else
-#define RTLDEV  dev
-#endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
-/*****************************************************************************/
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
-typedef struct net_device *napi_ptr;
-typedef int *napi_budget;
-
-#define napi dev
-#define RTL_NAPI_CONFIG(ndev, priv, function, weig) ndev->poll=function;    \
-                                ndev->weight=weig;
-#define RTL_NAPI_QUOTA(budget, ndev)            min(*budget, ndev->quota)
-#define RTL_GET_PRIV(stuct_ptr, priv_struct)        netdev_priv(stuct_ptr)
-#define RTL_GET_NETDEV(priv_ptr)
-#define RTL_RX_QUOTA(budget)          *budget
-#define RTL_NAPI_QUOTA_UPDATE(ndev, work_done, budget)  *budget -= work_done;   \
-                                ndev->quota -= work_done;
-#define RTL_NETIF_RX_COMPLETE(dev, napi, work_done)        netif_rx_complete(dev)
-#define RTL_NETIF_RX_SCHEDULE_PREP(dev, napi)       netif_rx_schedule_prep(dev)
-#define __RTL_NETIF_RX_SCHEDULE(dev, napi)      __netif_rx_schedule(dev)
-#define RTL_NAPI_RETURN_VALUE               work_done >= work_to_do
-#define RTL_NAPI_ENABLE(dev, napi)          netif_poll_enable(dev)
-#define RTL_NAPI_DISABLE(dev, napi)         netif_poll_disable(dev)
-#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
-#else
-typedef struct napi_struct *napi_ptr;
-typedef int napi_budget;
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,1,0)
-#define RTL_NAPI_CONFIG(ndev, priv, function, weight)   netif_napi_add_weight(ndev, &priv->napi, function, weight)
-#else
-#define RTL_NAPI_CONFIG(ndev, priv, function, weight)   netif_napi_add(ndev, &priv->napi, function, weight)
-#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(6,1,0)
-#define RTL_NAPI_QUOTA(budget, ndev)            min(budget, budget)
-#define RTL_GET_PRIV(stuct_ptr, priv_struct)        container_of(stuct_ptr, priv_struct, stuct_ptr)
-#define RTL_GET_NETDEV(priv_ptr)            struct net_device *dev = priv_ptr->dev;
-#define RTL_RX_QUOTA(budget)          budget
-#define RTL_NAPI_QUOTA_UPDATE(ndev, work_done, budget)
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
-#define RTL_NETIF_RX_COMPLETE(dev, napi, work_done)        netif_rx_complete(dev, napi)
-#define RTL_NETIF_RX_SCHEDULE_PREP(dev, napi)       netif_rx_schedule_prep(dev, napi)
-#define __RTL_NETIF_RX_SCHEDULE(dev, napi)      __netif_rx_schedule(dev, napi)
-#endif
-#if LINUX_VERSION_CODE == KERNEL_VERSION(2,6,29)
-#define RTL_NETIF_RX_COMPLETE(dev, napi, work_done)        netif_rx_complete(napi)
-#define RTL_NETIF_RX_SCHEDULE_PREP(dev, napi)       netif_rx_schedule_prep(napi)
-#define __RTL_NETIF_RX_SCHEDULE(dev, napi)      __netif_rx_schedule(napi)
-#endif
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,29)
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,19,0)
-#define RTL_NETIF_RX_COMPLETE(dev, napi, work_done)        napi_complete_done(napi, work_done)
-#else
-#define RTL_NETIF_RX_COMPLETE(dev, napi, work_done)        napi_complete(napi)
-#endif
-#define RTL_NETIF_RX_SCHEDULE_PREP(dev, napi)       napi_schedule_prep(napi)
-#define __RTL_NETIF_RX_SCHEDULE(dev, napi)      __napi_schedule(napi)
-#endif
-#define RTL_NAPI_RETURN_VALUE work_done
-#define RTL_NAPI_ENABLE(dev, napi)          napi_enable(napi)
-#define RTL_NAPI_DISABLE(dev, napi)         napi_disable(napi)
-#endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)
-#define RTL_NAPI_DEL(priv)
-#else
-#define RTL_NAPI_DEL(priv)   netif_napi_del(&priv->napi)
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)
-
-/*****************************************************************************/
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9)
-#ifdef __CHECKER__
-#define __iomem __attribute__((noderef, address_space(2)))
-extern void __chk_io_ptr(void __iomem *);
-#define __bitwise __attribute__((bitwise))
-#else
-#define __iomem
-#define __chk_io_ptr(x) (void)0
-#define __bitwise
-#endif
-#endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9)
-
-/*****************************************************************************/
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,8)
-#ifdef __CHECKER__
-#define __force __attribute__((force))
-#else
-#define __force
-#endif
-#endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,8)
-
-#ifndef module_param
-#define module_param(v,t,p) MODULE_PARM(v, "i");
-#endif
-
-#ifndef PCI_DEVICE
-#define PCI_DEVICE(vend,dev) \
-    .vendor = (vend), .device = (dev), \
-    .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
-#endif
-
-/*****************************************************************************/
-/* 2.5.28 => 2.4.23 */
-#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,5,28) )
-
-static inline void _kc_synchronize_irq(void)
-{
-        synchronize_irq();
-}
-#undef synchronize_irq
-#define synchronize_irq(X) _kc_synchronize_irq()
-
-#include <linux/tqueue.h>
-#define work_struct tq_struct
-#undef INIT_WORK
-#define INIT_WORK(a,b,c) INIT_TQUEUE(a,(void (*)(void *))b,c)
-#undef container_of
-#define container_of list_entry
-#define schedule_work schedule_task
-#define flush_scheduled_work flush_scheduled_tasks
-#endif /* 2.5.28 => 2.4.17 */
-
-/*****************************************************************************/
-/* 2.6.4 => 2.6.0 */
-#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,4) )
-#define MODULE_VERSION(_version) MODULE_INFO(version, _version)
-#endif /* 2.6.4 => 2.6.0 */
-/*****************************************************************************/
-/* 2.6.0 => 2.5.28 */
-#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) )
-#define MODULE_INFO(version, _version)
-#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
-#define CONFIG_E1000_DISABLE_PACKET_SPLIT 1
-#endif
-
-#define pci_set_consistent_dma_mask(dev,mask) 1
-
-#undef dev_put
-#define dev_put(dev) __dev_put(dev)
-
-#ifndef skb_fill_page_desc
-#define skb_fill_page_desc _kc_skb_fill_page_desc
-extern void _kc_skb_fill_page_desc(struct sk_buff *skb, int i, struct page *page, int off, int size);
-#endif
-
-#ifndef pci_dma_mapping_error
-#define pci_dma_mapping_error _kc_pci_dma_mapping_error
-static inline int _kc_pci_dma_mapping_error(dma_addr_t dma_addr)
-{
-        return dma_addr == 0;
-}
-#endif
-
-#undef ALIGN
-#define ALIGN(x,a) (((x)+(a)-1)&~((a)-1))
-
-#endif /* 2.6.0 => 2.5.28 */
-
-/*****************************************************************************/
-/* 2.4.22 => 2.4.17 */
-#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,22) )
-#define pci_name(x) ((x)->slot_name)
-#endif /* 2.4.22 => 2.4.17 */
-
-/*****************************************************************************/
-/* 2.6.5 => 2.6.0 */
-#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5) )
-#define pci_dma_sync_single_for_cpu pci_dma_sync_single
-#define pci_dma_sync_single_for_device  pci_dma_sync_single_for_cpu
-#endif /* 2.6.5 => 2.6.0 */
-
-/*****************************************************************************/
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-/*
- * initialize a work-struct's func and data pointers:
- */
-#define PREPARE_WORK(_work, _func, _data)           \
-    do {                            \
-        (_work)->func = _func;              \
-        (_work)->data = _data;              \
-    } while (0)
-
-#endif
-/*****************************************************************************/
-/* 2.6.4 => 2.6.0 */
-#if ((LINUX_VERSION_CODE < KERNEL_VERSION(2,4,25) && \
-     LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)) || \
-    (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) && \
-      LINUX_VERSION_CODE < KERNEL_VERSION(2,6,4)))
-#define ETHTOOL_OPS_COMPAT
-#endif /* 2.6.4 => 2.6.0 */
-
-/*****************************************************************************/
-/* Installations with ethtool version without eeprom, adapter id, or statistics
- * support */
-
-#ifndef ETH_GSTRING_LEN
-#define ETH_GSTRING_LEN 32
-#endif
-
-#ifndef ETHTOOL_GSTATS
-#define ETHTOOL_GSTATS 0x1d
-#undef ethtool_drvinfo
-#define ethtool_drvinfo k_ethtool_drvinfo
-struct k_ethtool_drvinfo {
-        u32 cmd;
-        char driver[32];
-        char version[32];
-        char fw_version[32];
-        char bus_info[32];
-        char reserved1[32];
-        char reserved2[16];
-        u32 n_stats;
-        u32 testinfo_len;
-        u32 eedump_len;
-        u32 regdump_len;
-};
-
-struct ethtool_stats {
-        u32 cmd;
-        u32 n_stats;
-        u64 data[0];
-};
-#endif /* ETHTOOL_GSTATS */
-
-#ifndef ETHTOOL_PHYS_ID
-#define ETHTOOL_PHYS_ID 0x1c
-#endif /* ETHTOOL_PHYS_ID */
-
-#ifndef ETHTOOL_GSTRINGS
-#define ETHTOOL_GSTRINGS 0x1b
-enum ethtool_stringset {
-        ETH_SS_TEST             = 0,
-        ETH_SS_STATS,
-};
-struct ethtool_gstrings {
-        u32 cmd;            /* ETHTOOL_GSTRINGS */
-        u32 string_set;     /* string set id e.c. ETH_SS_TEST, etc*/
-        u32 len;            /* number of strings in the string set */
-        u8 data[0];
-};
-#endif /* ETHTOOL_GSTRINGS */
-
-#ifndef ETHTOOL_TEST
-#define ETHTOOL_TEST 0x1a
-enum ethtool_test_flags {
-        ETH_TEST_FL_OFFLINE = (1 << 0),
-        ETH_TEST_FL_FAILED  = (1 << 1),
-};
-struct ethtool_test {
-        u32 cmd;
-        u32 flags;
-        u32 reserved;
-        u32 len;
-        u64 data[0];
-};
-#endif /* ETHTOOL_TEST */
-
-#ifndef ETHTOOL_GEEPROM
-#define ETHTOOL_GEEPROM 0xb
-#undef ETHTOOL_GREGS
-struct ethtool_eeprom {
-        u32 cmd;
-        u32 magic;
-        u32 offset;
-        u32 len;
-        u8 data[0];
-};
-
-struct ethtool_value {
-        u32 cmd;
-        u32 data;
-};
-#endif /* ETHTOOL_GEEPROM */
-
-#ifndef ETHTOOL_GLINK
-#define ETHTOOL_GLINK 0xa
-#endif /* ETHTOOL_GLINK */
-
-#ifndef ETHTOOL_GREGS
-#define ETHTOOL_GREGS       0x00000004 /* Get NIC registers */
-#define ethtool_regs _kc_ethtool_regs
-/* for passing big chunks of data */
-struct _kc_ethtool_regs {
-        u32 cmd;
-        u32 version; /* driver-specific, indicates different chips/revs */
-        u32 len; /* bytes */
-        u8 data[0];
-};
-#endif /* ETHTOOL_GREGS */
-
-#ifndef ETHTOOL_GMSGLVL
-#define ETHTOOL_GMSGLVL     0x00000007 /* Get driver message level */
-#endif
-#ifndef ETHTOOL_SMSGLVL
-#define ETHTOOL_SMSGLVL     0x00000008 /* Set driver msg level, priv. */
-#endif
-#ifndef ETHTOOL_NWAY_RST
-#define ETHTOOL_NWAY_RST    0x00000009 /* Restart autonegotiation, priv */
-#endif
-#ifndef ETHTOOL_GLINK
-#define ETHTOOL_GLINK       0x0000000a /* Get link status */
-#endif
-#ifndef ETHTOOL_GEEPROM
-#define ETHTOOL_GEEPROM     0x0000000b /* Get EEPROM data */
-#endif
-#ifndef ETHTOOL_SEEPROM
-#define ETHTOOL_SEEPROM     0x0000000c /* Set EEPROM data */
-#endif
-#ifndef ETHTOOL_GCOALESCE
-#define ETHTOOL_GCOALESCE   0x0000000e /* Get coalesce config */
-/* for configuring coalescing parameters of chip */
-#define ethtool_coalesce _kc_ethtool_coalesce
-struct _kc_ethtool_coalesce {
-        u32 cmd;    /* ETHTOOL_{G,S}COALESCE */
-
-        /* How many usecs to delay an RX interrupt after
-         * a packet arrives.  If 0, only rx_max_coalesced_frames
-         * is used.
-         */
-        u32 rx_coalesce_usecs;
-
-        /* How many packets to delay an RX interrupt after
-         * a packet arrives.  If 0, only rx_coalesce_usecs is
-         * used.  It is illegal to set both usecs and max frames
-         * to zero as this would cause RX interrupts to never be
-         * generated.
-         */
-        u32 rx_max_coalesced_frames;
-
-        /* Same as above two parameters, except that these values
-         * apply while an IRQ is being serviced by the host.  Not
-         * all cards support this feature and the values are ignored
-         * in that case.
-         */
-        u32 rx_coalesce_usecs_irq;
-        u32 rx_max_coalesced_frames_irq;
-
-        /* How many usecs to delay a TX interrupt after
-         * a packet is sent.  If 0, only tx_max_coalesced_frames
-         * is used.
-         */
-        u32 tx_coalesce_usecs;
-
-        /* How many packets to delay a TX interrupt after
-         * a packet is sent.  If 0, only tx_coalesce_usecs is
-         * used.  It is illegal to set both usecs and max frames
-         * to zero as this would cause TX interrupts to never be
-         * generated.
-         */
-        u32 tx_max_coalesced_frames;
-
-        /* Same as above two parameters, except that these values
-         * apply while an IRQ is being serviced by the host.  Not
-         * all cards support this feature and the values are ignored
-         * in that case.
-         */
-        u32 tx_coalesce_usecs_irq;
-        u32 tx_max_coalesced_frames_irq;
-
-        /* How many usecs to delay in-memory statistics
-         * block updates.  Some drivers do not have an in-memory
-         * statistic block, and in such cases this value is ignored.
-         * This value must not be zero.
-         */
-        u32 stats_block_coalesce_usecs;
-
-        /* Adaptive RX/TX coalescing is an algorithm implemented by
-         * some drivers to improve latency under low packet rates and
-         * improve throughput under high packet rates.  Some drivers
-         * only implement one of RX or TX adaptive coalescing.  Anything
-         * not implemented by the driver causes these values to be
-         * silently ignored.
-         */
-        u32 use_adaptive_rx_coalesce;
-        u32 use_adaptive_tx_coalesce;
-
-        /* When the packet rate (measured in packets per second)
-         * is below pkt_rate_low, the {rx,tx}_*_low parameters are
-         * used.
-         */
-        u32 pkt_rate_low;
-        u32 rx_coalesce_usecs_low;
-        u32 rx_max_coalesced_frames_low;
-        u32 tx_coalesce_usecs_low;
-        u32 tx_max_coalesced_frames_low;
-
-        /* When the packet rate is below pkt_rate_high but above
-         * pkt_rate_low (both measured in packets per second) the
-         * normal {rx,tx}_* coalescing parameters are used.
-         */
-
-        /* When the packet rate is (measured in packets per second)
-         * is above pkt_rate_high, the {rx,tx}_*_high parameters are
-         * used.
-         */
-        u32 pkt_rate_high;
-        u32 rx_coalesce_usecs_high;
-        u32 rx_max_coalesced_frames_high;
-        u32 tx_coalesce_usecs_high;
-        u32 tx_max_coalesced_frames_high;
-
-        /* How often to do adaptive coalescing packet rate sampling,
-         * measured in seconds.  Must not be zero.
-         */
-        u32 rate_sample_interval;
-};
-#endif /* ETHTOOL_GCOALESCE */
-
-#ifndef ETHTOOL_SCOALESCE
-#define ETHTOOL_SCOALESCE   0x0000000f /* Set coalesce config. */
-#endif
-#ifndef ETHTOOL_GRINGPARAM
-#define ETHTOOL_GRINGPARAM  0x00000010 /* Get ring parameters */
-/* for configuring RX/TX ring parameters */
-#define ethtool_ringparam _kc_ethtool_ringparam
-struct _kc_ethtool_ringparam {
-        u32 cmd;    /* ETHTOOL_{G,S}RINGPARAM */
-
-        /* Read only attributes.  These indicate the maximum number
-         * of pending RX/TX ring entries the driver will allow the
-         * user to set.
-         */
-        u32 rx_max_pending;
-        u32 rx_mini_max_pending;
-        u32 rx_jumbo_max_pending;
-        u32 tx_max_pending;
-
-        /* Values changeable by the user.  The valid values are
-         * in the range 1 to the "*_max_pending" counterpart above.
-         */
-        u32 rx_pending;
-        u32 rx_mini_pending;
-        u32 rx_jumbo_pending;
-        u32 tx_pending;
-};
-#endif /* ETHTOOL_GRINGPARAM */
-
-#ifndef ETHTOOL_SRINGPARAM
-#define ETHTOOL_SRINGPARAM  0x00000011 /* Set ring parameters, priv. */
-#endif
-#ifndef ETHTOOL_GPAUSEPARAM
-#define ETHTOOL_GPAUSEPARAM 0x00000012 /* Get pause parameters */
-/* for configuring link flow control parameters */
-#define ethtool_pauseparam _kc_ethtool_pauseparam
-struct _kc_ethtool_pauseparam {
-        u32 cmd;    /* ETHTOOL_{G,S}PAUSEPARAM */
-
-        /* If the link is being auto-negotiated (via ethtool_cmd.autoneg
-         * being true) the user may set 'autonet' here non-zero to have the
-         * pause parameters be auto-negotiated too.  In such a case, the
-         * {rx,tx}_pause values below determine what capabilities are
-         * advertised.
-         *
-         * If 'autoneg' is zero or the link is not being auto-negotiated,
-         * then {rx,tx}_pause force the driver to use/not-use pause
-         * flow control.
-         */
-        u32 autoneg;
-        u32 rx_pause;
-        u32 tx_pause;
-};
-#endif /* ETHTOOL_GPAUSEPARAM */
-
-#ifndef ETHTOOL_SPAUSEPARAM
-#define ETHTOOL_SPAUSEPARAM 0x00000013 /* Set pause parameters. */
-#endif
-#ifndef ETHTOOL_GRXCSUM
-#define ETHTOOL_GRXCSUM     0x00000014 /* Get RX hw csum enable (ethtool_value) */
-#endif
-#ifndef ETHTOOL_SRXCSUM
-#define ETHTOOL_SRXCSUM     0x00000015 /* Set RX hw csum enable (ethtool_value) */
-#endif
-#ifndef ETHTOOL_GTXCSUM
-#define ETHTOOL_GTXCSUM     0x00000016 /* Get TX hw csum enable (ethtool_value) */
-#endif
-#ifndef ETHTOOL_STXCSUM
-#define ETHTOOL_STXCSUM     0x00000017 /* Set TX hw csum enable (ethtool_value) */
-#endif
-#ifndef ETHTOOL_GSG
-#define ETHTOOL_GSG     0x00000018 /* Get scatter-gather enable
-* (ethtool_value) */
-#endif
-#ifndef ETHTOOL_SSG
-#define ETHTOOL_SSG     0x00000019 /* Set scatter-gather enable
-* (ethtool_value). */
-#endif
-#ifndef ETHTOOL_TEST
-#define ETHTOOL_TEST        0x0000001a /* execute NIC self-test, priv. */
-#endif
-#ifndef ETHTOOL_GSTRINGS
-#define ETHTOOL_GSTRINGS    0x0000001b /* get specified string set */
-#endif
-#ifndef ETHTOOL_PHYS_ID
-#define ETHTOOL_PHYS_ID     0x0000001c /* identify the NIC */
-#endif
-#ifndef ETHTOOL_GSTATS
-#define ETHTOOL_GSTATS      0x0000001d /* get NIC-specific statistics */
-#endif
-#ifndef ETHTOOL_GTSO
-#define ETHTOOL_GTSO        0x0000001e /* Get TSO enable (ethtool_value) */
-#endif
-#ifndef ETHTOOL_STSO
-#define ETHTOOL_STSO        0x0000001f /* Set TSO enable (ethtool_value) */
-#endif
-
-#ifndef ETHTOOL_BUSINFO_LEN
-#define ETHTOOL_BUSINFO_LEN 32
-#endif
-
-/*****************************************************************************/
-
-enum RTL8168_DSM_STATE {
-        DSM_MAC_INIT = 1,
-        DSM_NIC_GOTO_D3 = 2,
-        DSM_IF_DOWN = 3,
-        DSM_NIC_RESUME_D3 = 4,
-        DSM_IF_UP = 5,
-};
-
-enum RTL8168_registers {
-        MAC0            = 0x00,     /* Ethernet hardware address. */
-        MAC4            = 0x04,
-        MAR0            = 0x08,     /* Multicast filter. */
-        CounterAddrLow      = 0x10,
-        CounterAddrHigh     = 0x14,
-        CustomLED       = 0x18,
-        TxDescStartAddrLow  = 0x20,
-        TxDescStartAddrHigh = 0x24,
-        TxHDescStartAddrLow = 0x28,
-        TxHDescStartAddrHigh    = 0x2c,
-        FLASH           = 0x30,
-        ERSR            = 0x36,
-        ChipCmd         = 0x37,
-        TxPoll          = 0x38,
-        IntrMask        = 0x3C,
-        IntrStatus      = 0x3E,
-        TxConfig        = 0x40,
-        RxConfig        = 0x44,
-        TCTR            = 0x48,
-        Cfg9346         = 0x50,
-        Config0         = 0x51,
-        Config1         = 0x52,
-        Config2         = 0x53,
-        Config3         = 0x54,
-        Config4         = 0x55,
-        Config5         = 0x56,
-        TDFNR           = 0x57,
-        TimeInt0        = 0x58,
-        TimeInt1        = 0x5C,
-        PHYAR           = 0x60,
-        CSIDR           = 0x64,
-        CSIAR           = 0x68,
-        PHYstatus       = 0x6C,
-        MACDBG          = 0x6D,
-        GPIO            = 0x6E,
-        PMCH            = 0x6F,
-        ERIDR           = 0x70,
-        ERIAR           = 0x74,
-        EPHY_RXER_NUM   = 0x7C,
-        EPHYAR          = 0x80,
-        IntrMask1       = 0x84,
-        IntrMask2       = 0x85,
-        IntrStatus1     = 0x86,
-        IntrStatus2     = 0x87,
-        TimeInt2        = 0x8C,
-        Rss_indir_tbl   = 0x90,
-        OCPDR           = 0xB0,
-        MACOCP          = 0xB0,
-        OCPAR           = 0xB4,
-        SecMAC0         = 0xB4,
-        SecMAC4         = 0xB8,
-        PHYOCP          = 0xB8,
-        IntrMask3       = 0xC0,
-        IntrStatus3     = 0xC1,
-        DBG_reg         = 0xD1,
-        TwiCmdReg       = 0xD2,
-        MCUCmd_reg      = 0xD3,
-        RxMaxSize       = 0xDA,
-        EFUSEAR         = 0xDC,
-        CPlusCmd        = 0xE0,
-        IntrMitigate    = 0xE2,
-        RxDescAddrLow   = 0xE4,
-        RxDescAddrHigh  = 0xE8,
-        MTPS            = 0xEC,
-        FuncEvent       = 0xF0,
-        PPSW            = 0xF2,
-        FuncEventMask   = 0xF4,
-        TimeInt3        = 0xF4,
-        FuncPresetState = 0xF8,
-        CMAC_IBCR0      = 0xF8,
-        CMAC_IBCR2      = 0xF9,
-        CMAC_IBIMR0     = 0xFA,
-        CMAC_IBISR0     = 0xFB,
-        FuncForceEvent  = 0xFC,
-
-        /* ERI */
-        RSS_KEY_8168    = 0x90,
-        RSS_CTRL_8168   = 0xB8,
-        Q_NUM_CTRL_8168 = 0xC0,
-
-        /* MAC OCP */
-        EEE_TXIDLE_TIMER_8168   = 0xe048,
-};
-
-enum RTL8168_register_content {
-        /* InterruptStatusBits */
-        SYSErr      = 0x8000,
-        PCSTimeout  = 0x4000,
-        SWInt       = 0x0100,
-        TxDescUnavail   = 0x0080,
-        RxFIFOOver  = 0x0040,
-        LinkChg     = 0x0020,
-        RxDescUnavail   = 0x0010,
-        TxErr       = 0x0008,
-        TxOK        = 0x0004,
-        RxErr       = 0x0002,
-        RxOK        = 0x0001,
-        RxDU1       = 0x0002,
-        RxOK1       = 0x0001,
-
-        /* RxStatusDesc */
-        RxRWT = (1 << 22),
-        RxRES = (1 << 21),
-        RxRUNT = (1 << 20),
-        RxCRC = (1 << 19),
-
-        /* ChipCmdBits */
-        StopReq  = 0x80,
-        CmdReset = 0x10,
-        CmdRxEnb = 0x08,
-        CmdTxEnb = 0x04,
-        RxBufEmpty = 0x01,
-
-        /* Cfg9346Bits */
-        Cfg9346_Lock = 0x00,
-        Cfg9346_Unlock = 0xC0,
-        Cfg9346_EEDO = (1 << 0),
-        Cfg9346_EEDI = (1 << 1),
-        Cfg9346_EESK = (1 << 2),
-        Cfg9346_EECS = (1 << 3),
-        Cfg9346_EEM0 = (1 << 6),
-        Cfg9346_EEM1 = (1 << 7),
-
-        /* rx_mode_bits */
-        AcceptErr = 0x20,
-        AcceptRunt = 0x10,
-        AcceptBroadcast = 0x08,
-        AcceptMulticast = 0x04,
-        AcceptMyPhys = 0x02,
-        AcceptAllPhys = 0x01,
-
-        /* Transmit Priority Polling*/
-        HPQ = 0x80,
-        NPQ = 0x40,
-        FSWInt = 0x01,
-
-        /* RxConfigBits */
-        Reserved2_shift = 13,
-        RxCfgDMAShift = 8,
-        RxCfg_128_int_en = (1 << 15),
-        RxCfg_fet_multi_en = (1 << 14),
-        RxCfg_half_refetch = (1 << 13),
-        RxCfg_9356SEL = (1 << 6),
-        RxCfg_rx_desc_v2_en = (1 << 24),
-
-        /* TxConfigBits */
-        TxInterFrameGapShift = 24,
-        TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
-        TxMACLoopBack = (1 << 17),  /* MAC loopback */
-
-        /* Config1 register */
-        LEDS1       = (1 << 7),
-        LEDS0       = (1 << 6),
-        Speed_down  = (1 << 4),
-        MEMMAP      = (1 << 3),
-        IOMAP       = (1 << 2),
-        VPD         = (1 << 1),
-        PMEnable    = (1 << 0), /* Power Management Enable */
-
-        /* Config2 register */
-        ClkReqEn	= (1 << 7),	/* Clock Request Enable */
-        PMSTS_En    = (1 << 5),
-
-        /* Config3 register */
-        Isolate_en  = (1 << 12), /* Isolate enable */
-        MagicPacket = (1 << 5), /* Wake up when receives a Magic Packet */
-        LinkUp      = (1 << 4), /* This bit is reserved in RTL8168B.*/
-        /* Wake up when the cable connection is re-established */
-        ECRCEN      = (1 << 3), /* This bit is reserved in RTL8168B*/
-        Jumbo_En0   = (1 << 2), /* This bit is reserved in RTL8168B*/
-        RDY_TO_L23  = (1 << 1), /* This bit is reserved in RTL8168B*/
-        Beacon_en   = (1 << 0), /* This bit is reserved in RTL8168B*/
-
-        /* Config4 register */
-        Jumbo_En1   = (1 << 1), /* This bit is reserved in RTL8168B*/
-
-        /* Config5 register */
-        BWF     = (1 << 6), /* Accept Broadcast wakeup frame */
-        MWF     = (1 << 5), /* Accept Multicast wakeup frame */
-        UWF     = (1 << 4), /* Accept Unicast wakeup frame */
-        LanWake     = (1 << 1), /* LanWake enable/disable */
-        PMEStatus   = (1 << 0), /* PME status can be reset by PCI RST# */
-        ASPM_en	    = (1 << 0),	/* ASPM enable */
-
-        /* CPlusCmd */
-        EnableBist  = (1 << 15),
-        Macdbgo_oe  = (1 << 14),
-        Normal_mode = (1 << 13),
-        Force_halfdup   = (1 << 12),
-        Force_rxflow_en = (1 << 11),
-        Force_txflow_en = (1 << 10),
-        Cxpl_dbg_sel    = (1 << 9),//This bit is reserved in RTL8168B
-        ASF     = (1 << 8),//This bit is reserved in RTL8168C
-        PktCntrDisable  = (1 << 7),
-        RxVlan      = (1 << 6),
-        RxChkSum    = (1 << 5),
-        Macdbgo_sel = 0x001C,
-        INTT_0      = 0x0000,
-        INTT_1      = 0x0001,
-        INTT_2      = 0x0002,
-        INTT_3      = 0x0003,
-
-        /* rtl8168_PHYstatus */
-        PowerSaveStatus = 0x80,
-        TxFlowCtrl = 0x40,
-        RxFlowCtrl = 0x20,
-        _1000bpsF = 0x10,
-        _100bps = 0x08,
-        _10bps = 0x04,
-        LinkStatus = 0x02,
-        FullDup = 0x01,
-
-        /* DBG_reg */
-        Fix_Nak_1 = (1 << 4),
-        Fix_Nak_2 = (1 << 3),
-        DBGPIN_E2 = (1 << 0),
-
-        /* ResetCounterCommand */
-        CounterReset = 0x1,
-        /* DumpCounterCommand */
-        CounterDump = 0x8,
-
-        /* PHY access */
-        PHYAR_Flag = 0x80000000,
-        PHYAR_Write = 0x80000000,
-        PHYAR_Read = 0x00000000,
-        PHYAR_Reg_Mask = 0x1f,
-        PHYAR_Reg_shift = 16,
-        PHYAR_Data_Mask = 0xffff,
-
-        /* EPHY access */
-        EPHYAR_Flag = 0x80000000,
-        EPHYAR_Write = 0x80000000,
-        EPHYAR_Read = 0x00000000,
-        EPHYAR_Reg_Mask = 0x3f,
-        EPHYAR_Reg_shift = 16,
-        EPHYAR_Data_Mask = 0xffff,
-
-        /* CSI access */
-        CSIAR_Flag = 0x80000000,
-        CSIAR_Write = 0x80000000,
-        CSIAR_Read = 0x00000000,
-        CSIAR_ByteEn = 0x0f,
-        CSIAR_ByteEn_shift = 12,
-        CSIAR_Addr_Mask = 0x0fff,
-
-        /* ERI access */
-        ERIAR_Flag = 0x80000000,
-        ERIAR_Write = 0x80000000,
-        ERIAR_Read = 0x00000000,
-        ERIAR_Addr_Align = 4, /* ERI access register address must be 4 byte alignment */
-        ERIAR_ExGMAC = 0,
-        ERIAR_MSIX = 1,
-        ERIAR_ASF = 2,
-        ERIAR_OOB = 2,
-        ERIAR_Type_shift = 16,
-        ERIAR_ByteEn = 0x0f,
-        ERIAR_ByteEn_shift = 12,
-
-        /* OCP GPHY access */
-        OCPDR_Write = 0x80000000,
-        OCPDR_Read = 0x00000000,
-        OCPDR_Reg_Mask = 0xFF,
-        OCPDR_Data_Mask = 0xFFFF,
-        OCPDR_GPHY_Reg_shift = 16,
-        OCPAR_Flag = 0x80000000,
-        OCPAR_GPHY_Write = 0x8000F060,
-        OCPAR_GPHY_Read = 0x0000F060,
-        OCPR_Write = 0x80000000,
-        OCPR_Read = 0x00000000,
-        OCPR_Addr_Reg_shift = 16,
-        OCPR_Flag = 0x80000000,
-        OCP_STD_PHY_BASE_PAGE = 0x0A40,
-
-        /* MCU Command */
-        Now_is_oob = (1 << 7),
-        Txfifo_empty = (1 << 5),
-        Rxfifo_empty = (1 << 4),
-
-        /* E-FUSE access */
-        EFUSE_WRITE = 0x80000000,
-        EFUSE_WRITE_OK  = 0x00000000,
-        EFUSE_READ  = 0x00000000,
-        EFUSE_READ_OK   = 0x80000000,
-        EFUSE_WRITE_V3 = 0x40000000,
-        EFUSE_WRITE_OK_V3  = 0x00000000,
-        EFUSE_READ_V3  = 0x80000000,
-        EFUSE_READ_OK_V3   = 0x00000000,
-        EFUSE_Reg_Mask  = 0x03FF,
-        EFUSE_Reg_Shift = 8,
-        EFUSE_Check_Cnt = 300,
-        EFUSE_READ_FAIL = 0xFF,
-        EFUSE_Data_Mask = 0x000000FF,
-
-        /* GPIO */
-        GPIO_en = (1 << 0),
-
-};
-
-enum _DescStatusBit {
-        DescOwn     = (1 << 31), /* Descriptor is owned by NIC */
-        RingEnd     = (1 << 30), /* End of descriptor ring */
-        FirstFrag   = (1 << 29), /* First segment of a packet */
-        LastFrag    = (1 << 28), /* Final segment of a packet */
-
-        /* Tx private */
-        /*------ offset 0 of tx descriptor ------*/
-        LargeSend   = (1 << 27), /* TCP Large Send Offload (TSO) */
-        GiantSendv4 = (1 << 26), /* TCP Giant Send Offload V4 (GSOv4) */
-        GiantSendv6 = (1 << 25), /* TCP Giant Send Offload V6 (GSOv6) */
-        LargeSend_DP = (1 << 16), /* TCP Large Send Offload (TSO) */
-        MSSShift    = 16,        /* MSS value position */
-        MSSMask     = 0x7FFU,    /* MSS value 11 bits */
-        TxIPCS      = (1 << 18), /* Calculate IP checksum */
-        TxUDPCS     = (1 << 17), /* Calculate UDP/IP checksum */
-        TxTCPCS     = (1 << 16), /* Calculate TCP/IP checksum */
-        TxVlanTag   = (1 << 17), /* Add VLAN tag */
-
-        /*@@@@@@ offset 4 of tx descriptor => bits for RTL8168C/CP only     begin @@@@@@*/
-        TxUDPCS_C   = (1 << 31), /* Calculate UDP/IP checksum */
-        TxTCPCS_C   = (1 << 30), /* Calculate TCP/IP checksum */
-        TxIPCS_C    = (1 << 29), /* Calculate IP checksum */
-        TxIPV6F_C   = (1 << 28), /* Indicate it is an IPv6 packet */
-        /*@@@@@@ offset 4 of tx descriptor => bits for RTL8168C/CP only     end @@@@@@*/
-
-
-        /* Rx private */
-        /*------ offset 0 of rx descriptor ------*/
-        PID1        = (1 << 18), /* Protocol ID bit 1/2 */
-        PID0        = (1 << 17), /* Protocol ID bit 2/2 */
-
-#define RxProtoUDP  (PID1)
-#define RxProtoTCP  (PID0)
-#define RxProtoIP   (PID1 | PID0)
-#define RxProtoMask RxProtoIP
-
-        RxIPF       = (1 << 16), /* IP checksum failed */
-        RxUDPF      = (1 << 15), /* UDP/IP checksum failed */
-        RxTCPF      = (1 << 14), /* TCP/IP checksum failed */
-        RxVlanTag   = (1 << 16), /* VLAN tag available */
-
-        /*@@@@@@ offset 0 of rx descriptor => bits for RTL8168C/CP only     begin @@@@@@*/
-        RxUDPT      = (1 << 18),
-        RxTCPT      = (1 << 17),
-        /*@@@@@@ offset 0 of rx descriptor => bits for RTL8168C/CP only     end @@@@@@*/
-
-        /*@@@@@@ offset 4 of rx descriptor => bits for RTL8168C/CP only     begin @@@@@@*/
-        RxV6F       = (1 << 31),
-        RxV4F       = (1 << 30),
-        /*@@@@@@ offset 4 of rx descriptor => bits for RTL8168C/CP only     end @@@@@@*/
-};
-
-enum features {
-//  RTL_FEATURE_WOL = (1 << 0),
-        RTL_FEATURE_MSI = (1 << 1),
-        RTL_FEATURE_MSIX = (1 << 2),
-};
-
-enum wol_capability {
-        WOL_DISABLED = 0,
-        WOL_ENABLED = 1
-};
-
-enum bits {
-        BIT_0 = (1 << 0),
-        BIT_1 = (1 << 1),
-        BIT_2 = (1 << 2),
-        BIT_3 = (1 << 3),
-        BIT_4 = (1 << 4),
-        BIT_5 = (1 << 5),
-        BIT_6 = (1 << 6),
-        BIT_7 = (1 << 7),
-        BIT_8 = (1 << 8),
-        BIT_9 = (1 << 9),
-        BIT_10 = (1 << 10),
-        BIT_11 = (1 << 11),
-        BIT_12 = (1 << 12),
-        BIT_13 = (1 << 13),
-        BIT_14 = (1 << 14),
-        BIT_15 = (1 << 15),
-        BIT_16 = (1 << 16),
-        BIT_17 = (1 << 17),
-        BIT_18 = (1 << 18),
-        BIT_19 = (1 << 19),
-        BIT_20 = (1 << 20),
-        BIT_21 = (1 << 21),
-        BIT_22 = (1 << 22),
-        BIT_23 = (1 << 23),
-        BIT_24 = (1 << 24),
-        BIT_25 = (1 << 25),
-        BIT_26 = (1 << 26),
-        BIT_27 = (1 << 27),
-        BIT_28 = (1 << 28),
-        BIT_29 = (1 << 29),
-        BIT_30 = (1 << 30),
-        BIT_31 = (1 << 31)
-};
-
-#define RTL8168_CP_NUM 4
-#define RTL8168_MAX_SUPPORT_cp_len 110
-
-enum rtl8168_cp_status {
-        rtl8168_cp_normal = 0,
-        rtl8168_cp_short,
-        rtl8168_cp_open,
-        rtl8168_cp_mismatch,
-        rtl8168_cp_unknown
-};
-
-enum effuse {
-        EFUSE_NOT_SUPPORT = 0,
-        EFUSE_SUPPORT_V1,
-        EFUSE_SUPPORT_V2,
-        EFUSE_SUPPORT_V3,
-};
-#define RsvdMask    0x3fffc000
-
-struct TxDesc {
-        u32 opts1;
-        u32 opts2;
-        u64 addr;
-};
-
-struct RxDesc {
-        u32 opts1;
-        u32 opts2;
-        u64 addr;
-};
-
-struct RxDescV2 {
-        u32 opts1;
-        u32 opts2;
-        u64 addr;
-        u32 rsvd1;
-        u32 RSSResult;
-        u64 rsvd2;
-};
-
-//Rx Desc Type
-enum rx_desc_ring_type {
-        RX_DESC_RING_TYPE_UNKNOWN=0,
-        RX_DESC_RING_TYPE_1,
-        RX_DESC_RING_TYPE_2,
-        RX_DESC_RING_TYPE_3,
-        RX_DESC_RING_TYPE_MAX
-};
-
-enum rx_desc_len {
-        RX_DESC_LEN_TYPE_1 = (sizeof(struct RxDesc)),
-        RX_DESC_LEN_TYPE_2 = (sizeof(struct RxDescV2))
-};
-
-struct ring_info {
-        struct sk_buff  *skb;
-        u32     len;
-        u8      __pad[sizeof(void *) - sizeof(u32)];
-};
-
-struct pci_resource {
-        u8  cmd;
-        u8  cls;
-        u16 io_base_h;
-        u16 io_base_l;
-        u16 mem_base_h;
-        u16 mem_base_l;
-        u8  ilr;
-        u16 resv_0x1c_h;
-        u16 resv_0x1c_l;
-        u16 resv_0x20_h;
-        u16 resv_0x20_l;
-        u16 resv_0x24_h;
-        u16 resv_0x24_l;
-        u16 resv_0x2c_h;
-        u16 resv_0x2c_l;
-        u32 pci_sn_l;
-        u32 pci_sn_h;
-};
-
-enum r8168_flag {
-        R8168_FLAG_DOWN = 0,
-        R8168_FLAG_TASK_RESET_PENDING,
-        R8168_FLAG_TASK_ESD_CHECK_PENDING,
-        R8168_FLAG_TASK_LINKCHG_CHECK_PENDING,
-        R8168_FLAG_MAX
-};
-
-/* Flow Control Settings */
-enum rtl8168_fc_mode {
-        rtl8168_fc_none = 0,
-        rtl8168_fc_rx_pause,
-        rtl8168_fc_tx_pause,
-        rtl8168_fc_full,
-        rtl8168_fc_default
-};
-
-struct rtl8168_tx_ring {
-        void* priv;
-        u32 index;
-        u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
-        u32 dirty_tx;
-        u32 num_tx_desc; /* Number of Tx descriptor registers */
-        u32 tdu; /* Tx descriptor unavailable count */
-        struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */
-        dma_addr_t TxPhyAddr;
-        u32 TxDescAllocSize;
-        struct ring_info tx_skb[NUM_TX_DESC]; /* Tx data buffers */
-
-        u16 tdsar_reg; /* Transmit Descriptor Start Address */
-};
-
-struct rtl8168_rx_ring {
-        void* priv;
-        u32 index;
-        u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
-        u32 dirty_rx;
-        u32 rdu; /* Rx descriptor unavailable count */
-        //struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
-        //u32 RxDescAllocSize;
-        u64 RxDescPhyAddr[MAX_NUM_RX_DESC]; /* Rx desc physical address*/
-        //dma_addr_t RxPhyAddr;
-        struct sk_buff *Rx_skbuff[MAX_NUM_RX_DESC]; /* Rx data buffers */
-
-        //u16 rdsar_reg; /* Receive Descriptor Start Address */
-};
-
-struct r8168_napi {
-#ifdef CONFIG_R8168_NAPI
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
-        struct napi_struct napi;
-#endif
-#endif
-        void* priv;
-        int index;
-};
-
-struct r8168_irq {
-        irq_handler_t	handler;
-        unsigned int	vector;
-        u8		requested;
-        char		name[IFNAMSIZ + 10];
-};
-
-#pragma pack(1)
-struct rtl8168_regs {
-        //00
-        u8 mac_id[6];
-        u16 reg_06;
-        u8 mar[8];
-        //10
-        u64 dtccr;
-        u16 ledsel0;
-        u16 legreg;
-        u32 tctr3;
-        //20
-        u32 txq0_dsc_st_addr_0;
-        u32 txq0_dsc_st_addr_2;
-        u64 reg_28;
-        //30
-        u16 rit;
-        u16 ritc;
-        u16 reg_34;
-        u8 reg_36;
-        u8 command;
-        u32 imr0;
-        u32 isr0;
-        //40
-        u32 tcr;
-        u32 rcr;
-        u32 tctr0;
-        u32 tctr1;
-        //50
-        u8 cr93c46;
-        u8 config0;
-        u8 config1;
-        u8 config2;
-        u8 config3;
-        u8 config4;
-        u8 config5;
-        u8 tdfnr;
-        u32 timer_int0;
-        u32 timer_int1;
-        //60
-        u32 gphy_mdcmdio;
-        u32 csidr;
-        u32 csiar;
-        u16 phy_status;
-        u8 config6;
-        u8 pmch;
-        //70
-        u32 eridr;
-        u32 eriar;
-        u16 config7;
-        u16 reg_7a;
-        u32 ephy_rxerr_cnt;
-        //80
-        u32 ephy_mdcmdio;
-        u16 ledsel2;
-        u16 ledsel1;
-        u32 tctr2;
-        u32 timer_int2;
-        //90
-        u8 tppoll0;
-        u8 reg_91;
-        u16 reg_92;
-        u16 led_feature;
-        u16 ledsel3;
-        u16 eee_led_config;
-        u16 reg_9a;
-        u32 reg_9c;
-        //a0
-        u32 reg_a0;
-        u32 reg_a4;
-        u32 reg_a8;
-        u32 reg_ac;
-        //b0
-        u32 patch_dbg;
-        u32 reg_b4;
-        u32 gphy_ocp;
-        u32 reg_bc;
-        //c0
-        u32 reg_c0;
-        u32 reg_c4;
-        u32 reg_c8;
-        u16 otp_cmd;
-        u16 otp_pg_config;
-        //d0
-        u16 phy_pwr;
-        u8 twsi_ctrl;
-        u8 oob_ctrl;
-        u16 mac_dbgo;
-        u16 mac_dbg;
-        u16 reg_d8;
-        u16 rms;
-        u32 efuse_data;
-        //e0
-        u16 cplus_cmd;
-        u16 reg_e2;
-        u32 rxq0_dsc_st_addr_0;
-        u32 rxq0_dsc_st_addr_2;
-        u16 reg_ec;
-        u16 tx10midle_cnt;
-        //f0
-        u16 misc0;
-        u16 misc1;
-        u32 timer_int3;
-        u32 cmac_ib;
-        u16 reg_fc;
-        u16 sw_rst;
-};
-#pragma pack()
-
-struct rtl8168_regs_save {
-        union {
-                u8 mac_io[R8168_MAC_REGS_SIZE];
-
-                struct rtl8168_regs mac_reg;
-        };
-        u16 pcie_phy[R8168_EPHY_REGS_SIZE/2];
-        u16 eth_phy[R8168_PHY_REGS_SIZE/2];
-        u32 eri_reg[R8168_ERI_REGS_SIZE/4];
-        u32 pci_reg[R8168_PCI_REGS_SIZE/4];
-
-        //ktime_t begin_ktime;
-        //ktime_t end_ktime;
-        //u64 duration_ns;
-
-
-        u16 int_miti_rxq0;
-
-        u8 int_config;
-        u32 imr_new;
-        u32 isr_new;
-
-        u8 tdu_status;
-        u16 rdu_status;
-
-        u32 rss_ctrl;
-        u8 rss_key[RTL8168_RSS_KEY_SIZE];
-        u8 rss_i_table[RTL8168_MAX_INDIRECTION_TABLE_ENTRIES];
-        u16 rss_queue_num_sel_r;
-};
-
-struct rtl8168_counters {
-        /* legacy */
-        u64 tx_packets;
-        u64 rx_packets;
-        u64 tx_errors;
-        u32 rx_errors;
-        u16 rx_missed;
-        u16 align_errors;
-        u32 tx_one_collision;
-        u32 tx_multi_collision;
-        u64 rx_unicast;
-        u64 rx_broadcast;
-        u32 rx_multicast;
-        u16 tx_aborted;
-        u16 tx_underrun;
-};
-
-struct rtl8168_private {
-        void __iomem *mmio_addr;    /* memory map physical address */
-        struct pci_dev *pci_dev;    /* Index of PCI device */
-        struct pci_dev *pdev_cmac;  /* Index of PCI device */
-        struct net_device *dev;
-        struct r8168_napi r8168napi[R8168_MAX_MSIX_VEC];
-        struct r8168_irq irq_tbl[R8168_MAX_MSIX_VEC];
-        unsigned int irq_nvecs;
-        unsigned int max_irq_nvecs;
-        unsigned int min_irq_nvecs;
-        unsigned int hw_supp_irq_nvecs;
-        struct net_device_stats stats;  /* statistics of net device */
-        u32 msg_enable;
-        u32 tx_tcp_csum_cmd;
-        u32 tx_udp_csum_cmd;
-        u32 tx_ip_csum_cmd;
-        u32 tx_ipv6_csum_cmd;
-        int max_jumbo_frame_size;
-        int chipset;
-        u32 mcfg;
-        //u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */
-        // u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */
-        //u32 dirty_rx;
-        //u32 dirty_tx;
-        u32 num_rx_desc; /* Number of Rx descriptor registers */
-        //u32 num_tx_desc; /* Number of Tx descriptor registers */
-        //struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */
-        struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */
-        //dma_addr_t TxPhyAddr;
-        dma_addr_t RxPhyAddr;
-        //u32 TxDescAllocSize;
-        u32 RxDescAllocSize;
-        //struct sk_buff *Rx_skbuff[MAX_NUM_RX_DESC]; /* Rx data buffers */
-        //struct ring_info tx_skb[MAX_NUM_TX_DESC];   /* Tx data buffers */
-        unsigned rx_buf_sz;
-        u16 HwSuppNumTxQueues; // Number of tx ring that hardware can support
-        u16 HwSuppNumRxQueues; // Number of rx ring that hardware can support
-        unsigned int num_tx_rings; // Number of tx ring that non-ring-lib driver used
-        unsigned int num_rx_rings; // Number of rx ring that non-ring-lib driver used
-        struct rtl8168_tx_ring tx_ring[R8168_MAX_TX_QUEUES]; // non-ring-lib tx ring
-        struct rtl8168_rx_ring rx_ring[R8168_MAX_RX_QUEUES]; // non-ring-lib rx ring
-#ifdef ENABLE_LIB_SUPPORT
-        struct blocking_notifier_head lib_nh;
-        struct rtl8168_ring lib_tx_ring[R8168_MAX_TX_QUEUES]; // ring-lib tx ring
-        struct rtl8168_ring lib_rx_ring[R8168_MAX_RX_QUEUES]; // ring-lib rx ring
-#endif
-        u16 num_hw_tot_en_rx_rings; // Number of rx ring that hardware enabled
-        //struct timer_list esd_timer;
-        //struct timer_list link_timer;
-        struct pci_resource pci_cfg_space;
-        unsigned int esd_flag;
-        unsigned int pci_cfg_is_read;
-        unsigned int rtl8168_rx_config;
-        u16 cp_cmd;
-        u16 intr_mask;
-        u16 timer_intr_mask;
-        u16 isr_reg[R8168_MAX_MSIX_VEC];
-        u16 imr_reg[R8168_MAX_MSIX_VEC];
-        int phy_auto_nego_reg;
-        int phy_1000_ctrl_reg;
-        u8 org_mac_addr[NODE_ADDRESS_SIZE];
-        struct rtl8168_counters *tally_vaddr;
-        dma_addr_t tally_paddr;
-
-#ifdef CONFIG_R8168_VLAN
-        struct vlan_group *vlgrp;
-#endif
-        u8  wol_enabled;
-        u32 wol_opts;
-        u8  efuse_ver;
-        u8  eeprom_type;
-        u8  autoneg;
-        u8  duplex;
-        u32 speed;
-        u32 advertising;
-        enum rtl8168_fc_mode fcpause;
-        u16 eeprom_len;
-        u16 cur_page;
-        u32 bios_setting;
-
-        int (*set_speed)(struct net_device *, u8 autoneg, u32 speed, u8 duplex, u32 adv);
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
-        void (*get_settings)(struct net_device *, struct ethtool_cmd *);
-#else
-        void (*get_settings)(struct net_device *, struct ethtool_link_ksettings *);
-#endif
-        void (*phy_reset_enable)(struct net_device *);
-        unsigned int (*phy_reset_pending)(struct net_device *);
-        unsigned int (*link_ok)(struct net_device *);
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
-        struct work_struct reset_task;
-        struct work_struct esd_task;
-        struct work_struct linkchg_task;
-#else
-        struct delayed_work reset_task;
-        struct delayed_work esd_task;
-        struct delayed_work linkchg_task;
-#endif
-        DECLARE_BITMAP(task_flags, R8168_FLAG_MAX);
-        unsigned features;
-
-        u8 org_pci_offset_99;
-        u8 org_pci_offset_180;
-        u8 issue_offset_99_event;
-
-        u8 org_pci_offset_80;
-        u8 org_pci_offset_81;
-        u8 use_timer_interrrupt;
-
-        u32 keep_intr_cnt;
-
-        u8  HwIcVerUnknown;
-        u8  NotWrRamCodeToMicroP;
-        u8  NotWrMcuPatchCode;
-        u8  HwHasWrRamCodeToMicroP;
-
-        u16 sw_ram_code_ver;
-        u16 hw_ram_code_ver;
-
-        u8 rtk_enable_diag;
-
-        u8 ShortPacketSwChecksum;
-
-        u8 UseSwPaddingShortPkt;
-
-        u8 RequireAdcBiasPatch;
-        u16 AdcBiasPatchIoffset;
-
-        u8 RequireAdjustUpsTxLinkPulseTiming;
-        u16 SwrCnt1msIni;
-
-        u8 HwSuppNowIsOobVer;
-
-        u8 RequiredSecLanDonglePatch;
-
-        u32 HwFiberModeVer;
-        u32 HwFiberStat;
-        u8 HwFiberLedMode;
-        u8 HwSwitchMdiToFiber;
-
-        u8 HwSuppSerDesPhyVer;
-
-        u8 HwSuppPhyOcpVer;
-
-        u8 HwSuppAspmClkIntrLock;
-
-        u16 NicCustLedValue;
-
-        u8 HwSuppUpsVer;
-
-        u8 HwSuppMagicPktVer;
-
-        u8 HwSuppCheckPhyDisableModeVer;
-
-        u8 random_mac;
-
-        u16 phy_reg_aner;
-        u16 phy_reg_anlpar;
-        u16 phy_reg_gbsr;
-
-        u32 HwPcieSNOffset;
-
-        u8 HwSuppEsdVer;
-        u8 TestPhyOcpReg;
-        u16 BackupPhyFuseDout_15_0;
-        u16 BackupPhyFuseDout_31_16;
-        u16 BackupPhyFuseDout_47_32;
-        u16 BackupPhyFuseDout_63_48;
-
-        u8 ring_lib_enabled;
-
-        const char *fw_name;
-        struct rtl8168_fw *rtl_fw;
-        u32 ocp_base;
-
-        //Dash+++++++++++++++++
-        u8 HwSuppDashVer;
-        u8 DASH;
-        u8 dash_printer_enabled;
-        u8 HwPkgDet;
-        void __iomem *cmac_ioaddr; /* cmac memory map physical address */
-
-#ifdef ENABLE_DASH_SUPPORT
-        u16 AfterRecvFromFwBufLen;
-        u8 AfterRecvFromFwBuf[RECV_FROM_FW_BUF_SIZE];
-        u16 AfterSendToFwBufLen;
-        u8 AfterSendToFwBuf[SEND_TO_FW_BUF_SIZE];
-        u16 SendToFwBufferLen;
-        u32 SizeOfSendToFwBuffer ;
-        u32 SizeOfSendToFwBufferMemAlloc ;
-        u32 NumOfSendToFwBuffer ;
-
-        u8 OobReq;
-        u8 OobAck;
-        u32 OobReqComplete;
-        u32 OobAckComplete;
-
-        u8 RcvFwReqSysOkEvt;
-        u8 RcvFwDashOkEvt;
-        u8 SendFwHostOkEvt;
-
-        u8 DashFwDisableRx;
-
-        void *SendToFwBuffer ;
-        dma_addr_t SendToFwBufferPhy ;
-        u8 SendingToFw;
-        PTX_DASH_SEND_FW_DESC TxDashSendFwDesc;
-        dma_addr_t TxDashSendFwDescPhy;
-        u32 SizeOfTxDashSendFwDescMemAlloc;
-        u32 SizeOfTxDashSendFwDesc ;
-        u32 NumTxDashSendFwDesc ;
-        u32 CurrNumTxDashSendFwDesc ;
-        u32 LastSendNumTxDashSendFwDesc ;
-
-        u32 NumRecvFromFwBuffer ;
-        u32 SizeOfRecvFromFwBuffer ;
-        u32 SizeOfRecvFromFwBufferMemAlloc ;
-        void *RecvFromFwBuffer ;
-        dma_addr_t RecvFromFwBufferPhy ;
-
-        PRX_DASH_FROM_FW_DESC RxDashRecvFwDesc;
-        dma_addr_t RxDashRecvFwDescPhy;
-        u32 SizeOfRxDashRecvFwDescMemAlloc;
-        u32 SizeOfRxDashRecvFwDesc ;
-        u32 NumRxDashRecvFwDesc ;
-        u32 CurrNumRxDashRecvFwDesc ;
-        u8 DashReqRegValue;
-        u16 HostReqValue;
-
-        u32 CmacResetIsrCounter;
-        u8 CmacResetIntr ;
-        u8 CmacResetting ;
-        u8 CmacOobIssueCmacReset ;
-        u32 CmacResetbyFwCnt;
-
-#if defined(ENABLE_DASH_PRINTER_SUPPORT)
-        struct completion fw_ack;
-        struct completion fw_req;
-        struct completion fw_host_ok;
-#endif
-        //Dash-----------------
-#endif //ENABLE_DASH_SUPPORT
-
-        //Realwow++++++++++++++
-        u8 HwSuppKCPOffloadVer;
-
-        u8 EnableDhcpTimeoutWake;
-        u8 EnableTeredoOffload;
-        u8 EnableKCPOffload;
-#ifdef ENABLE_REALWOW_SUPPORT
-        u32 DhcpTimeout;
-        MP_KCP_INFO MpKCPInfo;
-        //Realwow--------------
-#endif //ENABLE_REALWOW_SUPPORT
-
-        struct ethtool_eee eee;
-
-        u32 dynamic_aspm_packet_count;
-
-#ifdef ENABLE_R8168_PROCFS
-        //Procfs support
-        struct proc_dir_entry *proc_dir;
-#endif
-        u8 HwSuppRxDescType;
-        u8 InitRxDescType;
-        u16 RxDescLength; //V1 16 Byte V2 32 Bytes
-
-        u8 HwSuppRssVer;
-        u8 EnableRss;
-        u16 HwSuppIndirTblEntries;
-#ifdef ENABLE_RSS_SUPPORT
-        u32 rss_flags;
-        /* Receive Side Scaling settings */
-#define RTL8168_RSS_KEY_SIZE     40  /* size of RSS Hash Key in bytes */
-        u8 rss_key[RTL8168_RSS_KEY_SIZE];
-#define RTL8168_MAX_INDIRECTION_TABLE_ENTRIES 128
-        u8 rss_indir_tbl[RTL8168_MAX_INDIRECTION_TABLE_ENTRIES];
-        u32 rss_options;
-#endif
-        u32 rx_fifo_of; /* Rx fifo overflow count */
-};
-
-#ifdef ENABLE_LIB_SUPPORT
-static inline unsigned int
-rtl8168_num_lib_tx_rings(struct rtl8168_private *tp)
-{
-        int count, i;
-
-        for (count = 0, i = tp->num_tx_rings; i < tp->HwSuppNumTxQueues; i++)
-                if(tp->lib_tx_ring[i].enabled)
-                        count++;
-
-        return count;
-}
-
-static inline unsigned int
-rtl8168_num_lib_rx_rings(struct rtl8168_private *tp)
-{
-        int count, i;
-
-        for (count = 0, i = tp->num_rx_rings; i < tp->HwSuppNumRxQueues; i++)
-                if(tp->lib_rx_ring[i].enabled)
-                        count++;
-
-        return count;
-}
-
-static inline bool
-rtl8168_lib_tx_ring_released(struct rtl8168_private *tp)
-{
-        int i;
-        bool released = 0;
-
-        for (i = tp->num_tx_rings; i < tp->HwSuppNumTxQueues; i++) {
-                struct rtl8168_ring *ring = &tp->lib_tx_ring[i];
-                if (ring->allocated)
-                        goto exit;
-        }
-
-        released = 1;
-
-exit:
-        return released;
-}
-
-static inline bool
-rtl8168_lib_rx_ring_released(struct rtl8168_private *tp)
-{
-        int i;
-        bool released = 0;
-
-        for (i = tp->num_rx_rings; i < tp->HwSuppNumRxQueues; i++) {
-                struct rtl8168_ring *ring = &tp->lib_rx_ring[i];
-                if (ring->allocated)
-                        goto exit;
-        }
-
-        released = 1;
-
-exit:
-        return released;
-}
-
-#else
-
-static inline unsigned int
-rtl8168_num_lib_tx_rings(struct rtl8168_private *tp)
-{
-        return 0;
-}
-
-static inline unsigned int
-rtl8168_num_lib_rx_rings(struct rtl8168_private *tp)
-{
-        return 0;
-}
-
-static inline bool
-rtl8168_lib_tx_ring_released(struct rtl8168_private *tp)
-{
-        return 1;
-}
-
-static inline bool
-rtl8168_lib_rx_ring_released(struct rtl8168_private *tp)
-{
-        return 1;
-}
-#endif
-
-static inline unsigned int
-rtl8168_tot_tx_rings(struct rtl8168_private *tp)
-{
-        return tp->num_tx_rings + rtl8168_num_lib_tx_rings(tp);
-}
-
-static inline unsigned int
-rtl8168_tot_rx_rings(struct rtl8168_private *tp)
-{
-        return tp->num_rx_rings + rtl8168_num_lib_rx_rings(tp);
-}
-
-static inline bool
-rtl8168_lib_all_ring_released(struct rtl8168_private *tp)
-{
-        return (rtl8168_lib_tx_ring_released(tp) &&
-                rtl8168_lib_rx_ring_released(tp));
-}
-
-enum eetype {
-        EEPROM_TYPE_NONE=0,
-        EEPROM_TYPE_93C46,
-        EEPROM_TYPE_93C56,
-        EEPROM_TWSI
-};
-
-enum mcfg {
-        CFG_METHOD_1=0,
-        CFG_METHOD_2,
-        CFG_METHOD_3,
-        CFG_METHOD_4,
-        CFG_METHOD_5,
-        CFG_METHOD_6,
-        CFG_METHOD_7,
-        CFG_METHOD_8,
-        CFG_METHOD_9 ,
-        CFG_METHOD_10,
-        CFG_METHOD_11,
-        CFG_METHOD_12,
-        CFG_METHOD_13,
-        CFG_METHOD_14,
-        CFG_METHOD_15,
-        CFG_METHOD_16,
-        CFG_METHOD_17,
-        CFG_METHOD_18,
-        CFG_METHOD_19,
-        CFG_METHOD_20,
-        CFG_METHOD_21,
-        CFG_METHOD_22,
-        CFG_METHOD_23,
-        CFG_METHOD_24,
-        CFG_METHOD_25,
-        CFG_METHOD_26,
-        CFG_METHOD_27,
-        CFG_METHOD_28,
-        CFG_METHOD_29,
-        CFG_METHOD_30,
-        CFG_METHOD_31,
-        CFG_METHOD_32,
-        CFG_METHOD_33,
-        CFG_METHOD_34,
-        CFG_METHOD_35,
-        CFG_METHOD_36,
-        CFG_METHOD_37,
-        CFG_METHOD_MAX,
-        CFG_METHOD_DEFAULT = 0xFF
-};
-
-#define LSO_32K 32000
-#define LSO_64K 64000
-
-#define NIC_MIN_PHYS_BUF_COUNT          (2)
-#define NIC_MAX_PHYS_BUF_COUNT_LSO_64K  (24)
-#define NIC_MAX_PHYS_BUF_COUNT_LSO2     (16*4)
-
-#define GTTCPHO_SHIFT                   18
-#define GTTCPHO_MAX                     0x70U
-#define GTPKTSIZE_MAX                   0x3ffffU
-#define TCPHO_SHIFT                     18
-#define TCPHO_MAX                       0x3ffU
-#define LSOPKTSIZE_MAX                  0xffffU
-#define MSS_MAX                         0x07ffu /* MSS value */
-
-#define OOB_CMD_RESET       0x00
-#define OOB_CMD_DRIVER_START    0x05
-#define OOB_CMD_DRIVER_STOP 0x06
-#define OOB_CMD_SET_IPMAC   0x41
-
-#define WAKEUP_MAGIC_PACKET_NOT_SUPPORT (0)
-#define WAKEUP_MAGIC_PACKET_V1 (1)
-#define WAKEUP_MAGIC_PACKET_V2 (2)
-
-//Ram Code Version
-#define NIC_RAMCODE_VERSION_CFG_METHOD_14 (0x0057)
-#define NIC_RAMCODE_VERSION_CFG_METHOD_16 (0x0055)
-#define NIC_RAMCODE_VERSION_CFG_METHOD_18 (0x0052)
-#define NIC_RAMCODE_VERSION_CFG_METHOD_20 (0x0044)
-#define NIC_RAMCODE_VERSION_CFG_METHOD_21 (0x0042)
-#define NIC_RAMCODE_VERSION_CFG_METHOD_24 (0x0001)
-#define NIC_RAMCODE_VERSION_CFG_METHOD_23 (0x0015)
-#define NIC_RAMCODE_VERSION_CFG_METHOD_26 (0x0012)
-#define NIC_RAMCODE_VERSION_CFG_METHOD_28 (0x0019)
-#define NIC_RAMCODE_VERSION_CFG_METHOD_29 (0x0083)
-#define NIC_RAMCODE_VERSION_CFG_METHOD_31 (0x0003)
-#define NIC_RAMCODE_VERSION_CFG_METHOD_35 (0x0027)
-#define NIC_RAMCODE_VERSION_CFG_METHOD_36 (0x0000)
-
-//hwoptimize
-#define HW_PATCH_SOC_LAN (BIT_0)
-#define HW_PATCH_SAMSUNG_LAN_DONGLE (BIT_2)
-
-static const u8 other_q_intr_mask = (RxOK1 | RxDU1);
-
-#define HW_PHY_STATUS_INI       1
-#define HW_PHY_STATUS_EXT_INI   2
-#define HW_PHY_STATUS_LAN_ON    3
-
-void rtl8168_mdio_write(struct rtl8168_private *tp, u16 RegAddr, u16 value);
-void rtl8168_mdio_prot_write(struct rtl8168_private *tp, u32 RegAddr, u32 value);
-void rtl8168_mdio_prot_direct_write_phy_ocp(struct rtl8168_private *tp, u32 RegAddr, u32 value);
-u32 rtl8168_mdio_read(struct rtl8168_private *tp, u16 RegAddr);
-u32 rtl8168_mdio_prot_read(struct rtl8168_private *tp, u32 RegAddr);
-u32 rtl8168_mdio_prot_direct_read_phy_ocp(struct rtl8168_private *tp, u32 RegAddr);
-void rtl8168_ephy_write(struct rtl8168_private *tp, int RegAddr, int value);
-void rtl8168_mac_ocp_write(struct rtl8168_private *tp, u16 reg_addr, u16 value);
-u16 rtl8168_mac_ocp_read(struct rtl8168_private *tp, u16 reg_addr);
-void rtl8168_clear_eth_phy_bit(struct rtl8168_private *tp, u8 addr, u16 mask);
-void rtl8168_set_eth_phy_bit(struct rtl8168_private *tp,  u8  addr, u16  mask);
-void rtl8168_ocp_write(struct rtl8168_private *tp, u16 addr, u8 len, u32 data);
-void rtl8168_oob_notify(struct rtl8168_private *tp, u8 cmd);
-void rtl8168_init_ring_indexes(struct rtl8168_private *tp);
-int rtl8168_eri_write(struct rtl8168_private *tp, int addr, int len, u32 value, int type);
-void rtl8168_oob_mutex_lock(struct rtl8168_private *tp);
-u32 rtl8168_ocp_read(struct rtl8168_private *tp, u16 addr, u8 len);
-u32 rtl8168_ocp_read_with_oob_base_address(struct rtl8168_private *tp, u16 addr, u8 len, u32 base_address);
-u32 rtl8168_ocp_write_with_oob_base_address(struct rtl8168_private *tp, u16 addr, u8 len, u32 value, u32 base_address);
-u32 rtl8168_eri_read(struct rtl8168_private *tp, int addr, int len, int type);
-u32 rtl8168_eri_read_with_oob_base_address(struct rtl8168_private *tp, int addr, int len, int type, u32 base_address);
-int rtl8168_eri_write_with_oob_base_address(struct rtl8168_private *tp, int addr, int len, u32 value, int type, u32 base_address);
-u16 rtl8168_ephy_read(struct rtl8168_private *tp, int RegAddr);
-void rtl8168_wait_txrx_fifo_empty(struct net_device *dev);
-void rtl8168_wait_ll_share_fifo_ready(struct net_device *dev);
-void rtl8168_enable_now_is_oob(struct rtl8168_private *tp);
-void rtl8168_disable_now_is_oob(struct rtl8168_private *tp);
-void rtl8168_oob_mutex_unlock(struct rtl8168_private *tp);
-void rtl8168_dash2_disable_tx(struct rtl8168_private *tp);
-void rtl8168_dash2_enable_tx(struct rtl8168_private *tp);
-void rtl8168_dash2_disable_rx(struct rtl8168_private *tp);
-void rtl8168_dash2_enable_rx(struct rtl8168_private *tp);
-void rtl8168_hw_disable_mac_mcu_bps(struct net_device *dev);
-void rtl8168_mark_to_asic(struct RxDesc *desc, u32 rx_buf_sz);
-
-static inline struct RxDesc*
-rtl8168_get_rxdesc(struct rtl8168_private *tp, struct RxDesc *RxDescBase, u32 const cur_rx, u32 const q_num)
-{
-        u8 *desc = (u8*)RxDescBase;
-        u32 offset;
-
-        WARN_ON_ONCE(q_num >= tp->num_hw_tot_en_rx_rings);
-
-        if (tp->InitRxDescType == RX_DESC_RING_TYPE_2)
-                offset = (cur_rx * tp->num_hw_tot_en_rx_rings) + q_num;
-        else
-                offset = cur_rx;
-
-        offset *= tp->RxDescLength;
-        desc += offset;
-
-        return (struct RxDesc*)desc;
-}
-
-static inline void
-rtl8168_disable_interrupt_by_vector(struct rtl8168_private *tp,
-                                    u32 message_id)
-{
-        if (message_id >= R8168_MAX_MSIX_VEC)
-                return;
-
-        if (message_id == 0) {
-                RTL_W16(tp, tp->imr_reg[0], 0x0000);
-#ifdef ENABLE_DASH_SUPPORT
-                if (tp->DASH)
-                        rtl8168_disable_dash2_interrupt(tp);
-#endif
-        } else
-                RTL_W8(tp, tp->imr_reg[message_id], 0x00);
-}
-
-static inline void
-rtl8168_enable_interrupt_by_vector(struct rtl8168_private *tp,
-                                   u32 message_id)
-{
-        if (message_id >= R8168_MAX_MSIX_VEC)
-                return;
-
-        if (message_id == 0) {
-                RTL_W16(tp, tp->imr_reg[0], tp->intr_mask);
-#ifdef ENABLE_DASH_SUPPORT
-                if (tp->DASH)
-                        rtl8168_enable_dash2_interrupt(tp);
-#endif
-        } else {
-                RTL_W8(tp, tp->imr_reg[message_id], other_q_intr_mask);
-        }
-}
-
-int rtl8168_open(struct net_device *dev);
-int rtl8168_close(struct net_device *dev);
-void rtl8168_hw_config(struct net_device *dev);
-void rtl8168_hw_start(struct net_device *dev);
-void rtl8168_hw_reset(struct net_device *dev);
-void rtl8168_tx_clear(struct rtl8168_private *tp);
-void rtl8168_rx_clear(struct rtl8168_private *tp);
-int rtl8168_init_ring(struct net_device *dev);
-int rtl8168_dump_tally_counter(struct rtl8168_private *tp, dma_addr_t paddr);
-void rtl8168_enable_napi(struct rtl8168_private *tp);
-void _rtl8168_wait_for_quiescence(struct net_device *dev);
-
-#ifndef ENABLE_LIB_SUPPORT
-static inline void rtl8168_lib_reset_prepare(struct rtl8168_private *tp) { }
-static inline void rtl8168_lib_reset_complete(struct rtl8168_private *tp) { }
-#endif
-
-#define HW_SUPPORT_CHECK_PHY_DISABLE_MODE(_M)        ((_M)->HwSuppCheckPhyDisableModeVer > 0 )
-#define HW_SUPP_SERDES_PHY(_M)        ((_M)->HwSuppSerDesPhyVer > 0)
-#define HW_HAS_WRITE_PHY_MCU_RAM_CODE(_M)        (((_M)->HwHasWrRamCodeToMicroP == TRUE) ? 1 : 0)
-#define HW_SUPPORT_UPS_MODE(_M)        ((_M)->HwSuppUpsVer > 0)
-#define HW_RSS_SUPPORT_RSS(_M)        ((_M)->HwSuppRssVer > 0)
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
-#define netdev_mc_count(dev) ((dev)->mc_count)
-#define netdev_mc_empty(dev) (netdev_mc_count(dev) == 0)
-#define netdev_for_each_mc_addr(mclist, dev) \
-    for (mclist = dev->mc_list; mclist; mclist = mclist->next)
-#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_asf.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_asf.c
deleted file mode 100644
index c11d32bbb9df..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_asf.c
+++ /dev/null
@@ -1,416 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
-################################################################################
-#
-# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
-# controllers with PCI-Express interface.
-#
-# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License as published by the Free
-# Software Foundation; either version 2 of the License, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-# more details.
-#
-# You should have received a copy of the GNU General Public License along with
-# this program; if not, see <http://www.gnu.org/licenses/>.
-#
-# Author:
-# Realtek NIC software team <nicfae@realtek.com>
-# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
-#
-################################################################################
-*/
-
-/************************************************************************************
- *  This product is covered by one or more of the following patents:
- *  US6,570,884, US6,115,776, and US6,327,625.
- ***********************************************************************************/
-
-#include <linux/module.h>
-#include <linux/version.h>
-#include <linux/pci.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/delay.h>
-#include <linux/ethtool.h>
-#include <linux/mii.h>
-#include <linux/if_vlan.h>
-#include <linux/crc32.h>
-#include <linux/in.h>
-#include <linux/ip.h>
-#include <linux/tcp.h>
-#include <linux/init.h>
-#include <linux/rtnetlink.h>
-
-#include <asm/uaccess.h>
-
-#include "r8168.h"
-#include "r8168_asf.h"
-#include "rtl_eeprom.h"
-
-int rtl8168_asf_ioctl(struct net_device *dev,
-                      struct ifreq *ifr)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        void *user_data = ifr->ifr_data;
-        struct asf_ioctl_struct asf_usrdata;
-
-        if (tp->mcfg != CFG_METHOD_7 && tp->mcfg != CFG_METHOD_8)
-                return -EOPNOTSUPP;
-
-        if (copy_from_user(&asf_usrdata, user_data, sizeof(struct asf_ioctl_struct)))
-                return -EFAULT;
-
-        switch (asf_usrdata.offset) {
-        case HBPeriod:
-                rtl8168_asf_hbperiod(tp, asf_usrdata.arg, asf_usrdata.u.data);
-                break;
-        case WD8Timer:
-                break;
-        case WD16Rst:
-                rtl8168_asf_wd16rst(tp, asf_usrdata.arg, asf_usrdata.u.data);
-                break;
-        case WD8Rst:
-                rtl8168_asf_time_period(tp, asf_usrdata.arg, WD8Rst, asf_usrdata.u.data);
-                break;
-        case LSnsrPollCycle:
-                rtl8168_asf_time_period(tp, asf_usrdata.arg, LSnsrPollCycle, asf_usrdata.u.data);
-                break;
-        case ASFSnsrPollPrd:
-                rtl8168_asf_time_period(tp, asf_usrdata.arg, ASFSnsrPollPrd, asf_usrdata.u.data);
-                break;
-        case AlertReSendItvl:
-                rtl8168_asf_time_period(tp, asf_usrdata.arg, AlertReSendItvl, asf_usrdata.u.data);
-                break;
-        case SMBAddr:
-                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, SMBAddr, RW_ONE_BYTE, asf_usrdata.u.data);
-                break;
-        case ASFConfigR0:
-                rtl8168_asf_config_regs(tp, asf_usrdata.arg, ASFConfigR0, asf_usrdata.u.data);
-                break;
-        case ASFConfigR1:
-                rtl8168_asf_config_regs(tp, asf_usrdata.arg, ASFConfigR1, asf_usrdata.u.data);
-                break;
-        case ConsoleMA:
-                rtl8168_asf_console_mac(tp, asf_usrdata.arg, asf_usrdata.u.data);
-                break;
-        case ConsoleIP:
-                rtl8168_asf_ip_address(tp, asf_usrdata.arg, ConsoleIP, asf_usrdata.u.data);
-                break;
-        case IPAddr:
-                rtl8168_asf_ip_address(tp, asf_usrdata.arg, IPAddr, asf_usrdata.u.data);
-                break;
-        case UUID:
-                rtl8168_asf_rw_uuid(tp, asf_usrdata.arg, asf_usrdata.u.data);
-                break;
-        case IANA:
-                rtl8168_asf_rw_iana(tp, asf_usrdata.arg, asf_usrdata.u.data);
-                break;
-        case SysID:
-                rtl8168_asf_rw_systemid(tp, asf_usrdata.arg, asf_usrdata.u.data);
-                break;
-        case Community:
-                rtl8168_asf_community_string(tp, asf_usrdata.arg, asf_usrdata.u.string);
-                break;
-        case StringLength:
-                rtl8168_asf_community_string_len(tp, asf_usrdata.arg, asf_usrdata.u.data);
-                break;
-        case FmCapMsk:
-                rtl8168_asf_capability_masks(tp, asf_usrdata.arg, FmCapMsk, asf_usrdata.u.data);
-                break;
-        case SpCMDMsk:
-                rtl8168_asf_capability_masks(tp, asf_usrdata.arg, SpCMDMsk, asf_usrdata.u.data);
-                break;
-        case SysCapMsk:
-                rtl8168_asf_capability_masks(tp, asf_usrdata.arg, SysCapMsk, asf_usrdata.u.data);
-                break;
-        case RmtRstAddr:
-                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtRstAddr, RW_ONE_BYTE, asf_usrdata.u.data);
-                break;
-        case RmtRstCmd:
-                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtRstCmd, RW_ONE_BYTE, asf_usrdata.u.data);
-                break;
-        case RmtRstData:
-                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtRstData, RW_ONE_BYTE, asf_usrdata.u.data);
-                break;
-        case RmtPwrOffAddr:
-                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPwrOffAddr, RW_ONE_BYTE, asf_usrdata.u.data);
-                break;
-        case RmtPwrOffCmd:
-                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPwrOffCmd, RW_ONE_BYTE, asf_usrdata.u.data);
-                break;
-        case RmtPwrOffData:
-                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPwrOffData, RW_ONE_BYTE, asf_usrdata.u.data);
-                break;
-        case RmtPwrOnAddr:
-                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPwrOnAddr, RW_ONE_BYTE, asf_usrdata.u.data);
-                break;
-        case RmtPwrOnCmd:
-                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPwrOnCmd, RW_ONE_BYTE, asf_usrdata.u.data);
-                break;
-        case RmtPwrOnData:
-                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPwrOnData, RW_ONE_BYTE, asf_usrdata.u.data);
-                break;
-        case RmtPCRAddr:
-                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPCRAddr, RW_ONE_BYTE, asf_usrdata.u.data);
-                break;
-        case RmtPCRCmd:
-                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPCRCmd, RW_ONE_BYTE, asf_usrdata.u.data);
-                break;
-        case RmtPCRData:
-                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, RmtPCRData, RW_ONE_BYTE, asf_usrdata.u.data);
-                break;
-        case ASFSnsr0Addr:
-                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, ASFSnsr0Addr, RW_ONE_BYTE, asf_usrdata.u.data);
-                break;
-        case LSnsrAddr0:
-                rtl8168_asf_rw_hexadecimal(tp, asf_usrdata.arg, LSnsrAddr0, RW_ONE_BYTE, asf_usrdata.u.data);
-                break;
-        case KO:
-                /* Get/Set Key Operation */
-                rtl8168_asf_key_access(tp, asf_usrdata.arg, KO, asf_usrdata.u.data);
-                break;
-        case KA:
-                /* Get/Set Key Administrator */
-                rtl8168_asf_key_access(tp, asf_usrdata.arg, KA, asf_usrdata.u.data);
-                break;
-        case KG:
-                /* Get/Set Key Generation */
-                rtl8168_asf_key_access(tp, asf_usrdata.arg, KG, asf_usrdata.u.data);
-                break;
-        case KR:
-                /* Get/Set Key Random */
-                rtl8168_asf_key_access(tp, asf_usrdata.arg, KR, asf_usrdata.u.data);
-                break;
-        default:
-                return -EOPNOTSUPP;
-        }
-
-        if (copy_to_user(user_data, &asf_usrdata, sizeof(struct asf_ioctl_struct)))
-                return -EFAULT;
-
-        return 0;
-}
-
-void rtl8168_asf_hbperiod(struct rtl8168_private *tp, int arg, unsigned int *data)
-{
-        if (arg == ASF_GET)
-                data[ASFHBPERIOD] = rtl8168_eri_read(tp, HBPeriod, RW_TWO_BYTES, ERIAR_ASF);
-        else if (arg == ASF_SET) {
-                rtl8168_eri_write(tp, HBPeriod, RW_TWO_BYTES, data[ASFHBPERIOD], ERIAR_ASF);
-                rtl8168_eri_write(tp, 0x1EC, RW_ONE_BYTE, 0x07, ERIAR_ASF);
-        }
-}
-
-void rtl8168_asf_wd16rst(struct rtl8168_private *tp, int arg, unsigned int *data)
-{
-        data[ASFWD16RST] = rtl8168_eri_read(tp, WD16Rst, RW_TWO_BYTES, ERIAR_ASF);
-}
-
-void rtl8168_asf_console_mac(struct rtl8168_private *tp, int arg, unsigned int *data)
-{
-        int i;
-
-        if (arg == ASF_GET) {
-                for (i = 0; i < 6; i++)
-                        data[i] = rtl8168_eri_read(tp, ConsoleMA + i, RW_ONE_BYTE, ERIAR_ASF);
-        } else if (arg == ASF_SET) {
-                for (i = 0; i < 6; i++)
-                        rtl8168_eri_write(tp, ConsoleMA + i, RW_ONE_BYTE, data[i], ERIAR_ASF);
-
-                /* write the new console MAC address to EEPROM */
-                rtl8168_eeprom_write_sc(tp, 70, (data[1] << 8) | data[0]);
-                rtl8168_eeprom_write_sc(tp, 71, (data[3] << 8) | data[2]);
-                rtl8168_eeprom_write_sc(tp, 72, (data[5] << 8) | data[4]);
-        }
-}
-
-void rtl8168_asf_ip_address(struct rtl8168_private *tp, int arg, int offset, unsigned int *data)
-{
-        int i;
-        int eeprom_off = 0;
-
-        if (arg == ASF_GET) {
-                for (i = 0; i < 4; i++)
-                        data[i] = rtl8168_eri_read(tp, offset + i, RW_ONE_BYTE, ERIAR_ASF);
-        } else if (arg == ASF_SET) {
-                for (i = 0; i < 4; i++)
-                        rtl8168_eri_write(tp, offset + i, RW_ONE_BYTE, data[i], ERIAR_ASF);
-
-                if (offset == ConsoleIP)
-                        eeprom_off = 73;
-                else if (offset == IPAddr)
-                        eeprom_off = 75;
-
-                /* write the new IP address to EEPROM */
-                rtl8168_eeprom_write_sc(tp, eeprom_off, (data[1] << 8) | data[0]);
-                rtl8168_eeprom_write_sc(tp, eeprom_off + 1, (data[3] << 8) | data[2]);
-
-        }
-}
-
-void rtl8168_asf_config_regs(struct rtl8168_private *tp, int arg, int offset, unsigned int *data)
-{
-        unsigned int value;
-
-        if (arg == ASF_GET) {
-                data[ASFCAPABILITY] = (rtl8168_eri_read(tp, offset, RW_ONE_BYTE, ERIAR_ASF) & data[ASFCONFIG]) ? FUNCTION_ENABLE : FUNCTION_DISABLE;
-        } else if (arg == ASF_SET) {
-                value = rtl8168_eri_read(tp, offset, RW_ONE_BYTE, ERIAR_ASF);
-
-                if (data[ASFCAPABILITY] == FUNCTION_ENABLE)
-                        value |= data[ASFCONFIG];
-                else if (data[ASFCAPABILITY] == FUNCTION_DISABLE)
-                        value &= ~data[ASFCONFIG];
-
-                rtl8168_eri_write(tp, offset, RW_ONE_BYTE, value, ERIAR_ASF);
-        }
-}
-
-void rtl8168_asf_capability_masks(struct rtl8168_private *tp, int arg, int offset, unsigned int *data)
-{
-        unsigned int len, bit_mask;
-
-        bit_mask = DISABLE_MASK;
-
-        if (offset == FmCapMsk) {
-                /* System firmware capabilities */
-                len = RW_FOUR_BYTES;
-                if (data[ASFCAPMASK] == FUNCTION_ENABLE)
-                        bit_mask = FMW_CAP_MASK;
-        } else if (offset == SpCMDMsk) {
-                /* Special commands */
-                len = RW_TWO_BYTES;
-                if (data[ASFCAPMASK] == FUNCTION_ENABLE)
-                        bit_mask = SPC_CMD_MASK;
-        } else {
-                /* System capability (offset == SysCapMsk)*/
-                len = RW_ONE_BYTE;
-                if (data[ASFCAPMASK] == FUNCTION_ENABLE)
-                        bit_mask = SYS_CAP_MASK;
-        }
-
-        if (arg == ASF_GET)
-                data[ASFCAPMASK] = rtl8168_eri_read(tp, offset, len, ERIAR_ASF) ? FUNCTION_ENABLE : FUNCTION_DISABLE;
-        else /* arg == ASF_SET */
-                rtl8168_eri_write(tp, offset, len, bit_mask, ERIAR_ASF);
-}
-
-void rtl8168_asf_community_string(struct rtl8168_private *tp, int arg, char *string)
-{
-        int i;
-
-        if (arg == ASF_GET) {
-                for (i = 0; i < COMMU_STR_MAX_LEN; i++)
-                        string[i] = rtl8168_eri_read(tp, Community + i, RW_ONE_BYTE, ERIAR_ASF);
-        } else { /* arg == ASF_SET */
-                for (i = 0; i < COMMU_STR_MAX_LEN; i++)
-                        rtl8168_eri_write(tp, Community + i, RW_ONE_BYTE, string[i], ERIAR_ASF);
-        }
-}
-
-void rtl8168_asf_community_string_len(struct rtl8168_private *tp, int arg, unsigned int *data)
-{
-        if (arg == ASF_GET)
-                data[ASFCOMMULEN] = rtl8168_eri_read(tp, StringLength, RW_ONE_BYTE, ERIAR_ASF);
-        else /* arg == ASF_SET */
-                rtl8168_eri_write(tp, StringLength, RW_ONE_BYTE, data[ASFCOMMULEN], ERIAR_ASF);
-}
-
-void rtl8168_asf_time_period(struct rtl8168_private *tp, int arg, int offset, unsigned int *data)
-{
-        int pos = 0;
-
-        if (offset == WD8Rst)
-                pos = ASFWD8RESET;
-        else if (offset == LSnsrPollCycle)
-                pos = ASFLSNRPOLLCYC;
-        else if (offset == ASFSnsrPollPrd)
-                pos = ASFSNRPOLLCYC;
-        else if (offset == AlertReSendItvl)
-                pos = ASFALERTRESND;
-
-        if (arg == ASF_GET)
-                data[pos] = rtl8168_eri_read(tp, offset, RW_ONE_BYTE, ERIAR_ASF);
-        else /* arg == ASF_SET */
-                rtl8168_eri_write(tp, offset, RW_ONE_BYTE, data[pos], ERIAR_ASF);
-
-}
-
-void rtl8168_asf_key_access(struct rtl8168_private *tp, int arg, int offset, unsigned int *data)
-{
-        int i, j;
-        int key_off = 0;
-
-        if (arg == ASF_GET) {
-                for (i = 0; i < KEY_LEN; i++)
-                        data[i] = rtl8168_eri_read(tp, offset + KEY_LEN - (i + 1), RW_ONE_BYTE, ERIAR_ASF);
-        } else {
-                if (offset == KO)
-                        key_off = 162;
-                else if (offset == KA)
-                        key_off = 172;
-                else if (offset == KG)
-                        key_off = 182;
-                else if (offset == KR)
-                        key_off = 192;
-
-                /* arg == ASF_SET */
-                for (i = 0; i < KEY_LEN; i++)
-                        rtl8168_eri_write(tp, offset + KEY_LEN - (i + 1), RW_ONE_BYTE, data[i], ERIAR_ASF);
-
-                /* write the new key to EEPROM */
-                for (i = 0, j = 19; i < 10; i++, j = j - 2)
-                        rtl8168_eeprom_write_sc(tp, key_off + i, (data[j - 1] << 8) | data[j]);
-        }
-}
-
-void rtl8168_asf_rw_hexadecimal(struct rtl8168_private *tp, int arg, int offset, int len, unsigned int *data)
-{
-        if (arg == ASF_GET)
-                data[ASFRWHEXNUM] = rtl8168_eri_read(tp, offset, len, ERIAR_ASF);
-        else /* arg == ASF_SET */
-                rtl8168_eri_write(tp, offset, len, data[ASFRWHEXNUM], ERIAR_ASF);
-}
-
-void rtl8168_asf_rw_systemid(struct rtl8168_private *tp, int arg, unsigned int *data)
-{
-        int i;
-
-        if (arg == ASF_GET)
-                for (i = 0; i < SYSID_LEN ; i++)
-                        data[i] = rtl8168_eri_read(tp, SysID + i, RW_ONE_BYTE, ERIAR_ASF);
-        else /* arg == ASF_SET */
-                for (i = 0; i < SYSID_LEN ; i++)
-                        rtl8168_eri_write(tp, SysID + i, RW_ONE_BYTE, data[i], ERIAR_ASF);
-}
-
-void rtl8168_asf_rw_iana(struct rtl8168_private *tp, int arg, unsigned int *data)
-{
-        int i;
-
-        if (arg == ASF_GET)
-                for (i = 0; i < RW_FOUR_BYTES; i++)
-                        data[i] = rtl8168_eri_read(tp, IANA + i, RW_ONE_BYTE, ERIAR_ASF);
-        else /* arg == ASF_SET */
-                for (i = 0; i < RW_FOUR_BYTES; i++)
-                        rtl8168_eri_write(tp, IANA + i, RW_ONE_BYTE, data[i], ERIAR_ASF);
-}
-
-void rtl8168_asf_rw_uuid(struct rtl8168_private *tp, int arg, unsigned int *data)
-{
-        int i, j;
-
-        if (arg == ASF_GET)
-                for (i = UUID_LEN - 1, j = 0; i >= 0 ; i--, j++)
-                        data[j] = rtl8168_eri_read(tp, UUID + i, RW_ONE_BYTE, ERIAR_ASF);
-        else /* arg == ASF_SET */
-                for (i = UUID_LEN - 1, j = 0; i >= 0 ; i--, j++)
-                        rtl8168_eri_write(tp, UUID + i, RW_ONE_BYTE, data[j], ERIAR_ASF);
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_asf.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_asf.h
deleted file mode 100644
index bb4b4596bfc2..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_asf.h
+++ /dev/null
@@ -1,295 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
-################################################################################
-#
-# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
-# controllers with PCI-Express interface.
-#
-# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License as published by the Free
-# Software Foundation; either version 2 of the License, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-# more details.
-#
-# You should have received a copy of the GNU General Public License along with
-# this program; if not, see <http://www.gnu.org/licenses/>.
-#
-# Author:
-# Realtek NIC software team <nicfae@realtek.com>
-# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
-#
-################################################################################
-*/
-
-/************************************************************************************
- *  This product is covered by one or more of the following patents:
- *  US6,570,884, US6,115,776, and US6,327,625.
- ***********************************************************************************/
-
-#define SIOCDEVPRIVATE_RTLASF   SIOCDEVPRIVATE
-
-#define FUNCTION_ENABLE		1
-#define FUNCTION_DISABLE	0
-
-#define ASFCONFIG	0
-#define ASFCAPABILITY	1
-#define ASFCOMMULEN	0
-#define ASFHBPERIOD	0
-#define ASFWD16RST	0
-#define ASFCAPMASK	0
-#define ASFALERTRESND	0
-#define ASFLSNRPOLLCYC	0
-#define ASFSNRPOLLCYC	0
-#define ASFWD8RESET	0
-#define ASFRWHEXNUM	0
-
-#define FMW_CAP_MASK	0x0000F867
-#define SPC_CMD_MASK	0x1F00
-#define SYS_CAP_MASK	0xFF
-#define DISABLE_MASK	0x00
-
-#define MAX_DATA_LEN	200
-#define MAX_STR_LEN	200
-
-#define COMMU_STR_MAX_LEN	23
-
-#define KEY_LEN		20
-#define UUID_LEN	16
-#define SYSID_LEN	2
-
-#define RW_ONE_BYTE	1
-#define RW_TWO_BYTES	2
-#define RW_FOUR_BYTES	4
-
-enum asf_registers {
-        HBPeriod	= 0x0000,
-        WD8Rst		= 0x0002,
-        WD8Timer	= 0x0003,
-        WD16Rst		= 0x0004,
-        LSnsrPollCycle	= 0x0006,
-        ASFSnsrPollPrd	= 0x0007,
-        AlertReSendCnt	= 0x0008,
-        AlertReSendItvl	= 0x0009,
-        SMBAddr		= 0x000A,
-        SMBCap		= 0x000B,
-        ASFConfigR0	= 0x000C,
-        ASFConfigR1	= 0x000D,
-        WD16Timer	= 0x000E,
-        ConsoleMA	= 0x0010,
-        ConsoleIP	= 0x0016,
-        IPAddr		= 0x001A,
-
-        UUID		= 0x0020,
-        IANA		= 0x0030,
-        SysID		= 0x0034,
-        Community	= 0x0036,
-        StringLength	= 0x004D,
-        LC		= 0x004E,
-        EntityInst	= 0x004F,
-        FmCapMsk	= 0x0050,
-        SpCMDMsk	= 0x0054,
-        SysCapMsk	= 0x0056,
-        WDSysSt		= 0x0057,
-        RxMsgType	= 0x0058,
-        RxSpCMD		= 0x0059,
-        RxSpCMDPa	= 0x005A,
-        RxBtOpMsk	= 0x005C,
-        RmtRstAddr	= 0x005E,
-        RmtRstCmd	= 0x005F,
-        RmtRstData	= 0x0060,
-        RmtPwrOffAddr	= 0x0061,
-        RmtPwrOffCmd	= 0x0062,
-        RmtPwrOffData	= 0x0063,
-        RmtPwrOnAddr	= 0x0064,
-        RmtPwrOnCmd	= 0x0065,
-        RmtPwrOnData	= 0x0066,
-        RmtPCRAddr	= 0x0067,
-        RmtPCRCmd	= 0x0068,
-        RmtPCRData	= 0x0069,
-        RMCP_IANA	= 0x006A,
-        RMCP_OEM	= 0x006E,
-        ASFSnsr0Addr	= 0x0070,
-
-        ASFSnsrEvSt	= 0x0073,
-        ASFSnsrEvAlert	= 0x0081,
-
-        LSnsrNo		= 0x00AD,
-        AssrtEvntMsk	= 0x00AE,
-        DeAssrtEvntMsk	= 0x00AF,
-
-        LSnsrAddr0	= 0x00B0,
-        LAlertCMD0	= 0x00B1,
-        LAlertDataMsk0	= 0x00B2,
-        LAlertCmp0	= 0x00B3,
-        LAlertESnsrT0	= 0x00B4,
-        LAlertET0	= 0x00B5,
-        LAlertEOffset0	= 0x00B6,
-        LAlertES0	= 0x00B7,
-        LAlertSN0	= 0x00B8,
-        LAlertEntity0	= 0x00B9,
-        LAlertEI0	= 0x00BA,
-        LSnsrState0	= 0x00BB,
-
-        LSnsrAddr1	= 0x00BD,
-        LAlertCMD1	= 0x00BE,
-        LAlertDataMsk1	= 0x00BF,
-        LAlertCmp1	= 0x00C0,
-        LAlertESnsrT1	= 0x00C1,
-        LAlertET1	= 0x00C2,
-        LAlertEOffset1	= 0x00C3,
-        LAlertES1	= 0x00C4,
-        LAlertSN1	= 0x00C5,
-        LAlertEntity1	= 0x00C6,
-        LAlertEI1	= 0x00C7,
-        LSnsrState1	= 0x00C8,
-
-        LSnsrAddr2	= 0x00CA,
-        LAlertCMD2	= 0x00CB,
-        LAlertDataMsk2	= 0x00CC,
-        LAlertCmp2	= 0x00CD,
-        LAlertESnsrT2	= 0x00CE,
-        LAlertET2	= 0x00CF,
-        LAlertEOffset2	= 0x00D0,
-        LAlertES2	= 0x00D1,
-        LAlertSN2	= 0x00D2,
-        LAlertEntity2	= 0x00D3,
-        LAlertEI2	= 0x00D4,
-        LSnsrState2	= 0x00D5,
-
-        LSnsrAddr3	= 0x00D7,
-        LAlertCMD3	= 0x00D8,
-        LAlertDataMsk3	= 0x00D9,
-        LAlertCmp3	= 0x00DA,
-        LAlertESnsrT3	= 0x00DB,
-        LAlertET3	= 0x00DC,
-        LAlertEOffset3	= 0x00DD,
-        LAlertES3	= 0x00DE,
-        LAlertSN3	= 0x00DF,
-        LAlertEntity3	= 0x00E0,
-        LAlertEI3	= 0x00E1,
-        LSnsrState3	= 0x00E2,
-
-        LSnsrAddr4	= 0x00E4,
-        LAlertCMD4	= 0x00E5,
-        LAlertDataMsk4	= 0x00E6,
-        LAlertCmp4	= 0x00E7,
-        LAlertESnsrT4	= 0x00E8,
-        LAlertET4	= 0x00E9,
-        LAlertEOffset4	= 0x00EA,
-        LAlertES4	= 0x00EB,
-        LAlertSN4	= 0x00EC,
-        LAlertEntity4	= 0x00ED,
-        LAlertEI4	= 0x00EE,
-        LSnsrState4	= 0x00EF,
-
-        LSnsrAddr5	= 0x00F1,
-        LAlertCMD5	= 0x00F2,
-        LAlertDataMsk5	= 0x00F3,
-        LAlertCmp5	= 0x00F4,
-        LAlertESnsrT5	= 0x00F5,
-        LAlertET5	= 0x00F6,
-        LAlertEOffset5	= 0x00F7,
-        LAlertES5	= 0x00F8,
-        LAlertSN5	= 0x00F9,
-        LAlertEntity5	= 0x00FA,
-        LAlertEI5	= 0x00FB,
-        LSnsrState5	= 0x00FC,
-
-        LSnsrAddr6	= 0x00FE,
-        LAlertCMD6	= 0x00FF,
-        LAlertDataMsk6	= 0x0100,
-        LAlertCmp6	= 0x0101,
-        LAlertESnsrT6	= 0x0102,
-        LAlertET6	= 0x0103,
-        LAlertEOffset6	= 0x0104,
-        LAlertES6	= 0x0105,
-        LAlertSN6	= 0x0106,
-        LAlertEntity6	= 0x0107,
-        LAlertEI6	= 0x0108,
-        LSnsrState6	= 0x0109,
-
-        LSnsrAddr7	= 0x010B,
-        LAlertCMD7	= 0x010C,
-        LAlertDataMsk7	= 0x010D,
-        LAlertCmp7	= 0x010E,
-        LAlertESnsrT7	= 0x010F,
-        LAlertET7	= 0x0110,
-        LAlertEOffset7	= 0x0111,
-        LAlertES7	= 0x0112,
-        LAlertSN7	= 0x0113,
-        LAlertEntity7	= 0x0114,
-        LAlertEI7	= 0x0115,
-        LSnsrState7	= 0x0116,
-        LAssert		= 0x0117,
-        LDAssert	= 0x0118,
-        IPServiceType	= 0x0119,
-        IPIdfr		= 0x011A,
-        FlagFOffset	= 0x011C,
-        TTL		= 0x011E,
-        HbtEI		= 0x011F,
-        MgtConSID1	= 0x0120,
-        MgtConSID2	= 0x0124,
-        MgdCltSID	= 0x0128,
-        StCd		= 0x012C,
-        MgtConUR	= 0x012D,
-        MgtConUNL	= 0x012E,
-
-        AuthPd		= 0x0130,
-        IntyPd		= 0x0138,
-        MgtConRN	= 0x0140,
-        MgdCtlRN	= 0x0150,
-        MgtConUN	= 0x0160,
-        Rakp2IntCk	= 0x0170,
-        KO		= 0x017C,
-        KA		= 0x0190,
-        KG		= 0x01A4,
-        KR		= 0x01B8,
-        CP		= 0x01CC,
-        CQ		= 0x01D0,
-        KC		= 0x01D4,
-        ConsoleSid	= 0x01E8,
-
-        SIK1		= 0x01FC,
-        SIK2		= 0x0210,
-        Udpsrc_port	= 0x0224,
-        Udpdes_port	= 0x0226,
-        Asf_debug_mux	= 0x0228
-};
-
-enum asf_cmdln_opt {
-        ASF_GET,
-        ASF_SET,
-        ASF_HELP
-};
-
-struct asf_ioctl_struct {
-        unsigned int arg;
-        unsigned int offset;
-        union {
-                unsigned int data[MAX_DATA_LEN];
-                char string[MAX_STR_LEN];
-        } u;
-};
-
-int rtl8168_asf_ioctl(struct net_device *dev, struct ifreq *ifr);
-void rtl8168_asf_hbperiod(struct rtl8168_private *tp, int arg, unsigned int *data);
-void rtl8168_asf_wd16rst(struct rtl8168_private *tp, int arg, unsigned int *data);
-void rtl8168_asf_console_mac(struct rtl8168_private *, int arg, unsigned int *data);
-void rtl8168_asf_ip_address(struct rtl8168_private *, int arg, int offset, unsigned int *data);
-void rtl8168_asf_config_regs(struct rtl8168_private *tp, int arg, int offset, unsigned int *data);
-void rtl8168_asf_capability_masks(struct rtl8168_private *tp, int arg, int offset, unsigned int *data);
-void rtl8168_asf_community_string(struct rtl8168_private *tp, int arg, char *string);
-void rtl8168_asf_community_string_len(struct rtl8168_private *tp, int arg, unsigned int *data);
-void rtl8168_asf_alert_resend_interval(struct rtl8168_private *tp, int arg, unsigned int *data);
-void rtl8168_asf_time_period(struct rtl8168_private *tp, int arg, int offset, unsigned int *data);
-void rtl8168_asf_key_access(struct rtl8168_private *, int arg, int offset, unsigned int *data);
-void rtl8168_asf_rw_hexadecimal(struct rtl8168_private *tp, int arg, int offset, int len, unsigned int *data);
-void rtl8168_asf_rw_iana(struct rtl8168_private *tp, int arg, unsigned int *data);
-void rtl8168_asf_rw_uuid(struct rtl8168_private *tp, int arg, unsigned int *data);
-void rtl8168_asf_rw_systemid(struct rtl8168_private *tp, int arg, unsigned int *data);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_dash.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_dash.h
deleted file mode 100644
index dcd3e70e2f88..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_dash.h
+++ /dev/null
@@ -1,256 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
-################################################################################
-#
-# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
-# controllers with PCI-Express interface.
-#
-# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License as published by the Free
-# Software Foundation; either version 2 of the License, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-# more details.
-#
-# You should have received a copy of the GNU General Public License along with
-# this program; if not, see <http://www.gnu.org/licenses/>.
-#
-# Author:
-# Realtek NIC software team <nicfae@realtek.com>
-# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
-#
-################################################################################
-*/
-
-/************************************************************************************
- *  This product is covered by one or more of the following patents:
- *  US6,570,884, US6,115,776, and US6,327,625.
- ***********************************************************************************/
-
-#ifndef _LINUX_R8168_DASH_H
-#define _LINUX_R8168_DASH_H
-
-#define SIOCDEVPRIVATE_RTLDASH   SIOCDEVPRIVATE+2
-
-enum rtl_dash_cmd {
-        RTL_DASH_ARP_NS_OFFLOAD = 0,
-        RTL_DASH_SET_OOB_IPMAC,
-        RTL_DASH_NOTIFY_OOB,
-
-        RTL_DASH_SEND_BUFFER_DATA_TO_DASH_FW,
-        RTL_DASH_CHECK_SEND_BUFFER_TO_DASH_FW_COMPLETE,
-        RTL_DASH_GET_RCV_FROM_FW_BUFFER_DATA,
-        RTL_DASH_OOB_REQ,
-        RTL_DASH_OOB_ACK,
-        RTL_DASH_DETACH_OOB_REQ,
-        RTL_DASH_DETACH_OOB_ACK,
-
-        RTL_FW_SET_IPV4 = 0x10,
-        RTL_FW_GET_IPV4,
-        RTL_FW_SET_IPV6,
-        RTL_FW_GET_IPV6,
-        RTL_FW_SET_EXT_SNMP,
-        RTL_FW_GET_EXT_SNMP,
-        RTL_FW_SET_WAKEUP_PATTERN,
-        RTL_FW_GET_WAKEUP_PATTERN,
-        RTL_FW_DEL_WAKEUP_PATTERN,
-
-        RTLT_DASH_COMMAND_INVALID,
-};
-
-struct rtl_dash_ip_mac {
-        struct sockaddr ifru_addr;
-        struct sockaddr ifru_netmask;
-        struct sockaddr ifru_hwaddr;
-};
-
-struct rtl_dash_ioctl_struct {
-        __u32	cmd;
-        __u32	offset;
-        __u32	len;
-        union {
-                __u32	data;
-                void *data_buffer;
-        };
-};
-
-struct settings_ipv4 {
-        __u32	IPv4addr;
-        __u32	IPv4mask;
-        __u32	IPv4Gateway;
-};
-
-struct settings_ipv6 {
-        __u32	reserved;
-        __u32	prefixLen;
-        __u16	IPv6addr[8];
-        __u16	IPv6Gateway[8];
-};
-
-struct settings_ext_snmp {
-        __u16	index;
-        __u16	oid_get_len;
-        __u8	oid_for_get[24];
-        __u8	reserved0[26];
-        __u16	value_len;
-        __u8	value[256];
-        __u8	supported;
-        __u8	reserved1[27];
-};
-
-struct wakeup_pattern {
-        __u8	index;
-        __u8	valid;
-        __u8	start;
-        __u8	length;
-        __u8	name[36];
-        __u8	mask[16];
-        __u8	pattern[128];
-        __u32	reserved[2];
-};
-
-typedef struct _RX_DASH_FROM_FW_DESC {
-        __le16 length;
-        __le16 status;
-        __le32 resv;
-        __le64 BufferAddress;
-}
-RX_DASH_FROM_FW_DESC, *PRX_DASH_FROM_FW_DESC;
-
-typedef struct _TX_DASH_SEND_FW_DESC {
-        __le16 length;
-        __le16 status;
-        __le32 resv;
-        __le64 BufferAddress;
-}
-TX_DASH_SEND_FW_DESC, *PTX_DASH_SEND_FW_DESC;
-
-typedef struct _OSOOBHdr {
-        __le32 len;
-        u8 type;
-        u8 flag;
-        u8 hostReqV;
-        u8 res;
-}
-OSOOBHdr, *POSOOBHdr;
-
-typedef struct _RX_DASH_BUFFER_TYPE_2 {
-        OSOOBHdr oobhdr;
-        u8 RxDataBuffer[0];
-}
-RX_DASH_BUFFER_TYPE_2, *PRX_DASH_BUFFER_TYPE_2;
-
-#define ALIGN_8                 (0x7)
-#define ALIGN_16                (0xf)
-#define ALIGN_32                (0x1f)
-#define ALIGN_64                (0x3f)
-#define ALIGN_256               (0xff)
-#define ALIGN_4096              (0xfff)
-
-#define OCP_REG_CONFIG0 (0x10)
-#define OCP_REG_CONFIG0_REV_F (0xB8)
-#define OCP_REG_DASH_POLL (0x30)
-#define OCP_REG_HOST_REQ (0x34)
-#define OCP_REG_DASH_REQ (0x35)
-#define OCP_REG_CR (0x36)
-#define OCP_REG_DMEMSTA (0x38)
-#define OCP_REG_GPHYAR (0x60)
-
-
-#define OCP_REG_CONFIG0_DASHEN           BIT_15
-#define OCP_REG_CONFIG0_OOBRESET         BIT_14
-#define OCP_REG_CONFIG0_APRDY            BIT_13
-#define OCP_REG_CONFIG0_FIRMWARERDY      BIT_12
-#define OCP_REG_CONFIG0_DRIVERRDY        BIT_11
-#define OCP_REG_CONFIG0_OOB_WDT          BIT_9
-#define OCP_REG_CONFIG0_DRV_WAIT_OOB     BIT_8
-#define OCP_REG_CONFIG0_TLSEN            BIT_7
-
-#define HW_DASH_SUPPORT_DASH(_M)        ((_M)->HwSuppDashVer > 0)
-#define HW_DASH_SUPPORT_TYPE_1(_M)        ((_M)->HwSuppDashVer == 1)
-#define HW_DASH_SUPPORT_TYPE_2(_M)        ((_M)->HwSuppDashVer == 2)
-#define HW_DASH_SUPPORT_TYPE_3(_M)        ((_M)->HwSuppDashVer == 3)
-
-#define RECV_FROM_FW_BUF_SIZE (2048)
-#define SEND_TO_FW_BUF_SIZE (2048)
-
-#define RX_DASH_FROM_FW_OWN BIT_15
-#define TX_DASH_SEND_FW_OWN BIT_15
-
-#define TXS_CC3_0       (BIT_0|BIT_1|BIT_2|BIT_3)
-#define TXS_EXC         BIT_4
-#define TXS_LNKF        BIT_5
-#define TXS_OWC         BIT_6
-#define TXS_TES         BIT_7
-#define TXS_UNF         BIT_9
-#define TXS_LGSEN       BIT_11
-#define TXS_LS          BIT_12
-#define TXS_FS          BIT_13
-#define TXS_EOR         BIT_14
-#define TXS_OWN         BIT_15
-
-#define TPPool_HRDY     0x20
-
-#define HostReqReg (0xC0)
-#define SystemMasterDescStartAddrLow (0xF0)
-#define SystemMasterDescStartAddrHigh (0xF4)
-#define SystemSlaveDescStartAddrLow (0xF8)
-#define SystemSlaveDescStartAddrHigh (0xFC)
-
-//DASH Request Type
-#define WSMANREG 0x01
-#define OSPUSHDATA 0x02
-
-#define RXS_OWN      BIT_15
-#define RXS_EOR      BIT_14
-#define RXS_FS       BIT_13
-#define RXS_LS       BIT_12
-
-#define ISRIMR_DP_DASH_OK BIT_15
-#define ISRIMR_DP_HOST_OK BIT_13
-#define ISRIMR_DP_REQSYS_OK BIT_11
-
-#define ISRIMR_DASH_INTR_EN BIT_12
-#define ISRIMR_DASH_INTR_CMAC_RESET BIT_15
-
-#define ISRIMR_DASH_TYPE2_ROK BIT_0
-#define ISRIMR_DASH_TYPE2_RDU BIT_1
-#define ISRIMR_DASH_TYPE2_TOK BIT_2
-#define ISRIMR_DASH_TYPE2_TDU BIT_3
-#define ISRIMR_DASH_TYPE2_TX_FIFO_FULL BIT_4
-#define ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE BIT_5
-#define ISRIMR_DASH_TYPE2_RX_DISABLE_IDLE BIT_6
-
-#define CMAC_OOB_STOP 0x25
-#define CMAC_OOB_INIT 0x26
-#define CMAC_OOB_RESET 0x2a
-
-#define NO_BASE_ADDRESS 0x00000000
-#define RTL8168FP_OOBMAC_BASE 0xBAF70000
-#define RTL8168FP_CMAC_IOBASE 0xBAF20000
-#define RTL8168FP_KVM_BASE 0xBAF80400
-#define CMAC_SYNC_REG 0x20
-#define CMAC_RXDESC_OFFSET 0x90    //RX: 0x90 - 0x98
-#define CMAC_TXDESC_OFFSET 0x98    //TX: 0x98 - 0x9F
-
-/* cmac write/read MMIO register */
-#define RTL_CMAC_W8(tp, reg, val8)   writeb ((val8), tp->cmac_ioaddr + (reg))
-#define RTL_CMAC_W16(tp, reg, val16) writew ((val16), tp->cmac_ioaddr + (reg))
-#define RTL_CMAC_W32(tp, reg, val32) writel ((val32), tp->cmac_ioaddr + (reg))
-#define RTL_CMAC_R8(tp, reg)     readb (tp->cmac_ioaddr + (reg))
-#define RTL_CMAC_R16(tp, reg)        readw (tp->cmac_ioaddr + (reg))
-#define RTL_CMAC_R32(tp, reg)        ((unsigned long) readl (tp->cmac_ioaddr + (reg)))
-
-int rtl8168_dash_ioctl(struct net_device *dev, struct ifreq *ifr);
-void HandleDashInterrupt(struct net_device *dev);
-int AllocateDashShareMemory(struct net_device *dev);
-void FreeAllocatedDashShareMemory(struct net_device *dev);
-void DashHwInit(struct net_device *dev);
-
-
-#endif /* _LINUX_R8168_DASH_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_fiber.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_fiber.h
deleted file mode 100644
index 325790541465..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_fiber.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
-################################################################################
-#
-# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
-# controllers with PCI-Express interface.
-#
-# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License as published by the Free
-# Software Foundation; either version 2 of the License, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-# more details.
-#
-# You should have received a copy of the GNU General Public License along with
-# this program; if not, see <http://www.gnu.org/licenses/>.
-#
-# Author:
-# Realtek NIC software team <nicfae@realtek.com>
-# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
-#
-################################################################################
-*/
-
-/************************************************************************************
- *  This product is covered by one or more of the following patents:
- *  US6,570,884, US6,115,776, and US6,327,625.
- ***********************************************************************************/
-
-#ifndef _LINUX_R8168_FIBER_H
-#define _LINUX_R8168_FIBER_H
-
-enum {
-        FIBER_MODE_NIC_ONLY = 0,
-        FIBER_MODE_RTL8168H_RTL8211FS,
-        FIBER_MODE_RTL8168H_MDI_SWITCH_RTL8211FS,
-        FIBER_MODE_MAX
-};
-
-enum {
-        FIBER_STAT_NOT_CHECKED = 0,
-        FIBER_STAT_CONNECT_EEPROM,
-        FIBER_STAT_DISCONNECT,
-        FIBER_STAT_CONNECT_GPO,
-        FIBER_STAT_MAX
-};
-
-enum {
-        FIBER_LED_MODE_DEFAULT = 0,
-        FIBER_LED_MODE_1,
-        FIBER_LED_MODE_MAX
-};
-
-#define HW_FIBER_MODE_ENABLED(_M)        ((_M)->HwFiberModeVer > 0)
-#define HW_FIBER_STATUS_CONNECTED(_M)        (((_M)->HwFiberStat == FIBER_STAT_CONNECT_EEPROM) || ((_M)->HwFiberStat == FIBER_STAT_CONNECT_GPO))
-#define HW_FIBER_STATUS_DISCONNECTED(_M)        ((_M)->HwFiberStat == FIBER_STAT_DISCONNECT)
-
-struct rtl8168_private;
-
-void rtl8168_hw_init_fiber_nic(struct rtl8168_private *tp);
-void rtl8168_hw_fiber_nic_d3_para(struct rtl8168_private *tp);
-void rtl8168_hw_fiber_phy_config(struct rtl8168_private *tp);
-void rtl8168_hw_switch_mdi_to_fiber(struct rtl8168_private *tp);
-void rtl8168_hw_switch_mdi_to_nic(struct rtl8168_private *tp);
-unsigned int rtl8168_hw_fiber_link_ok(struct rtl8168_private *tp);
-void rtl8168_check_fiber_link_status(struct rtl8168_private *tp);
-void rtl8168_check_hw_fiber_mode_support(struct rtl8168_private *tp);
-void rtl8168_set_fiber_mode_software_variable(struct rtl8168_private *tp);
-
-#endif /* _LINUX_R8168_FIBER_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_firmware.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_firmware.c
deleted file mode 100644
index d7f061aed2c7..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_firmware.c
+++ /dev/null
@@ -1,264 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
-################################################################################
-#
-# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
-# controllers with PCI-Express interface.
-#
-# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License as published by the Free
-# Software Foundation; either version 2 of the License, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-# more details.
-#
-# You should have received a copy of the GNU General Public License along with
-# this program; if not, see <http://www.gnu.org/licenses/>.
-#
-# Author:
-# Realtek NIC software team <nicfae@realtek.com>
-# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
-#
-################################################################################
-*/
-
-/************************************************************************************
- *  This product is covered by one or more of the following patents:
- *  US6,570,884, US6,115,776, and US6,327,625.
- ***********************************************************************************/
-
-#include <linux/version.h>
-#include <linux/delay.h>
-#include <linux/firmware.h>
-
-#include "r8168_firmware.h"
-
-enum rtl_fw_opcode {
-        PHY_READ		= 0x0,
-        PHY_DATA_OR		= 0x1,
-        PHY_DATA_AND		= 0x2,
-        PHY_BJMPN		= 0x3,
-        PHY_MDIO_CHG		= 0x4,
-        PHY_CLEAR_READCOUNT	= 0x7,
-        PHY_WRITE		= 0x8,
-        PHY_READCOUNT_EQ_SKIP	= 0x9,
-        PHY_COMP_EQ_SKIPN	= 0xa,
-        PHY_COMP_NEQ_SKIPN	= 0xb,
-        PHY_WRITE_PREVIOUS	= 0xc,
-        PHY_SKIPN		= 0xd,
-        PHY_DELAY_MS		= 0xe,
-};
-
-struct fw_info {
-        u32	magic;
-        char	version[RTL8168_VER_SIZE];
-        __le32	fw_start;
-        __le32	fw_len;
-        u8	chksum;
-} __packed;
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,16,0)
-#define sizeof_field(TYPE, MEMBER) sizeof((((TYPE *)0)->MEMBER))
-#endif
-#define FW_OPCODE_SIZE sizeof_field(struct rtl8168_fw_phy_action, code[0])
-
-static bool rtl8168_fw_format_ok(struct rtl8168_fw *rtl_fw)
-{
-        const struct firmware *fw = rtl_fw->fw;
-        struct fw_info *fw_info = (struct fw_info *)fw->data;
-        struct rtl8168_fw_phy_action *pa = &rtl_fw->phy_action;
-
-        if (fw->size < FW_OPCODE_SIZE)
-                return false;
-
-        if (!fw_info->magic) {
-                size_t i, size, start;
-                u8 checksum = 0;
-
-                if (fw->size < sizeof(*fw_info))
-                        return false;
-
-                for (i = 0; i < fw->size; i++)
-                        checksum += fw->data[i];
-                if (checksum != 0)
-                        return false;
-
-                start = le32_to_cpu(fw_info->fw_start);
-                if (start > fw->size)
-                        return false;
-
-                size = le32_to_cpu(fw_info->fw_len);
-                if (size > (fw->size - start) / FW_OPCODE_SIZE)
-                        return false;
-
-                strscpy(rtl_fw->version, fw_info->version, RTL8168_VER_SIZE);
-
-                pa->code = (__le32 *)(fw->data + start);
-                pa->size = size;
-        } else {
-                if (fw->size % FW_OPCODE_SIZE)
-                        return false;
-
-                strscpy(rtl_fw->version, rtl_fw->fw_name, RTL8168_VER_SIZE);
-
-                pa->code = (__le32 *)fw->data;
-                pa->size = fw->size / FW_OPCODE_SIZE;
-        }
-
-        return true;
-}
-
-static bool rtl8168_fw_data_ok(struct rtl8168_fw *rtl_fw)
-{
-        struct rtl8168_fw_phy_action *pa = &rtl_fw->phy_action;
-        size_t index;
-
-        for (index = 0; index < pa->size; index++) {
-                u32 action = le32_to_cpu(pa->code[index]);
-                u32 val = action & 0x0000ffff;
-                u32 regno = (action & 0x0fff0000) >> 16;
-
-                switch (action >> 28) {
-                case PHY_READ:
-                case PHY_DATA_OR:
-                case PHY_DATA_AND:
-                case PHY_CLEAR_READCOUNT:
-                case PHY_WRITE:
-                case PHY_WRITE_PREVIOUS:
-                case PHY_DELAY_MS:
-                        break;
-
-                case PHY_MDIO_CHG:
-                        if (val > 1)
-                                goto out;
-                        break;
-
-                case PHY_BJMPN:
-                        if (regno > index)
-                                goto out;
-                        break;
-                case PHY_READCOUNT_EQ_SKIP:
-                        if (index + 2 >= pa->size)
-                                goto out;
-                        break;
-                case PHY_COMP_EQ_SKIPN:
-                case PHY_COMP_NEQ_SKIPN:
-                case PHY_SKIPN:
-                        if (index + 1 + regno >= pa->size)
-                                goto out;
-                        break;
-
-                default:
-                        dev_err(rtl_fw->dev, "Invalid action 0x%08x\n", action);
-                        return false;
-                }
-        }
-
-        return true;
-out:
-        dev_err(rtl_fw->dev, "Out of range of firmware\n");
-        return false;
-}
-
-void rtl8168_fw_write_firmware(struct rtl8168_private *tp, struct rtl8168_fw *rtl_fw)
-{
-        struct rtl8168_fw_phy_action *pa = &rtl_fw->phy_action;
-        rtl8168_fw_write_t fw_write = rtl_fw->phy_write;
-        rtl8168_fw_read_t fw_read = rtl_fw->phy_read;
-        int predata = 0, count = 0;
-        size_t index;
-
-        for (index = 0; index < pa->size; index++) {
-                u32 action = le32_to_cpu(pa->code[index]);
-                u32 data = action & 0x0000ffff;
-                u32 regno = (action & 0x0fff0000) >> 16;
-                enum rtl_fw_opcode opcode = action >> 28;
-
-                if (!action)
-                        break;
-
-                switch (opcode) {
-                case PHY_READ:
-                        predata = fw_read(tp, regno);
-                        count++;
-                        break;
-                case PHY_DATA_OR:
-                        predata |= data;
-                        break;
-                case PHY_DATA_AND:
-                        predata &= data;
-                        break;
-                case PHY_BJMPN:
-                        index -= (regno + 1);
-                        break;
-                case PHY_MDIO_CHG:
-                        if (data) {
-                                fw_write = rtl_fw->mac_mcu_write;
-                                fw_read = rtl_fw->mac_mcu_read;
-                        } else {
-                                fw_write = rtl_fw->phy_write;
-                                fw_read = rtl_fw->phy_read;
-                        }
-
-                        break;
-                case PHY_CLEAR_READCOUNT:
-                        count = 0;
-                        break;
-                case PHY_WRITE:
-                        fw_write(tp, regno, data);
-                        break;
-                case PHY_READCOUNT_EQ_SKIP:
-                        if (count == data)
-                                index++;
-                        break;
-                case PHY_COMP_EQ_SKIPN:
-                        if (predata == data)
-                                index += regno;
-                        break;
-                case PHY_COMP_NEQ_SKIPN:
-                        if (predata != data)
-                                index += regno;
-                        break;
-                case PHY_WRITE_PREVIOUS:
-                        fw_write(tp, regno, predata);
-                        break;
-                case PHY_SKIPN:
-                        index += regno;
-                        break;
-                case PHY_DELAY_MS:
-                        mdelay(data);
-                        break;
-                }
-        }
-}
-
-void rtl8168_fw_release_firmware(struct rtl8168_fw *rtl_fw)
-{
-        release_firmware(rtl_fw->fw);
-}
-
-int rtl8168_fw_request_firmware(struct rtl8168_fw *rtl_fw)
-{
-        int rc;
-
-        rc = request_firmware(&rtl_fw->fw, rtl_fw->fw_name, rtl_fw->dev);
-        if (rc < 0)
-                goto out;
-
-        if (!rtl8168_fw_format_ok(rtl_fw) || !rtl8168_fw_data_ok(rtl_fw)) {
-                release_firmware(rtl_fw->fw);
-                rc = -EINVAL;
-                goto out;
-        }
-
-        return 0;
-out:
-        dev_err(rtl_fw->dev, "Unable to load firmware %s (%d)\n",
-                rtl_fw->fw_name, rc);
-        return rc;
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_firmware.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_firmware.h
deleted file mode 100644
index 814ff8e7b561..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_firmware.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
-################################################################################
-#
-# r8168 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
-# controllers with PCI-Express interface.
-#
-# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License as published by the Free
-# Software Foundation; either version 2 of the License, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-# more details.
-#
-# You should have received a copy of the GNU General Public License along with
-# this program; if not, see <http://www.gnu.org/licenses/>.
-#
-# Author:
-# Realtek NIC software team <nicfae@realtek.com>
-# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
-#
-################################################################################
-*/
-
-/************************************************************************************
- *  This product is covered by one or more of the following patents:
- *  US6,570,884, US6,115,776, and US6,327,625.
- ***********************************************************************************/
-
-#ifndef _LINUX_RTL8168_FIRMWARE_H
-#define _LINUX_RTL8168_FIRMWARE_H
-
-#include <linux/device.h>
-#include <linux/firmware.h>
-
-struct rtl8168_private;
-typedef void (*rtl8168_fw_write_t)(struct rtl8168_private *tp, u16 reg, u16 val);
-typedef u32 (*rtl8168_fw_read_t)(struct rtl8168_private *tp, u16 reg);
-
-#define RTL8168_VER_SIZE		32
-
-struct rtl8168_fw {
-        rtl8168_fw_write_t phy_write;
-        rtl8168_fw_read_t phy_read;
-        rtl8168_fw_write_t mac_mcu_write;
-        rtl8168_fw_read_t mac_mcu_read;
-        const struct firmware *fw;
-        const char *fw_name;
-        struct device *dev;
-
-        char version[RTL8168_VER_SIZE];
-
-        struct rtl8168_fw_phy_action {
-                __le32 *code;
-                size_t size;
-        } phy_action;
-};
-
-int rtl8168_fw_request_firmware(struct rtl8168_fw *rtl_fw);
-void rtl8168_fw_release_firmware(struct rtl8168_fw *rtl_fw);
-void rtl8168_fw_write_firmware(struct rtl8168_private *tp, struct rtl8168_fw *rtl_fw);
-
-#endif /* _LINUX_RTL8168_FIRMWARE_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_n.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_n.c
deleted file mode 100644
index f57d3d6d8ec6..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_n.c
+++ /dev/null
@@ -1,32208 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
-################################################################################
-#
-# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
-# controllers with PCI-Express interface.
-#
-# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License as published by the Free
-# Software Foundation; either version 2 of the License, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-# more details.
-#
-# You should have received a copy of the GNU General Public License along with
-# this program; if not, see <http://www.gnu.org/licenses/>.
-#
-# Author:
-# Realtek NIC software team <nicfae@realtek.com>
-# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
-#
-################################################################################
-*/
-
-/************************************************************************************
- *  This product is covered by one or more of the following patents:
- *  US6,570,884, US6,115,776, and US6,327,625.
- ***********************************************************************************/
-
-/*
- * This driver is modified from r8169.c in Linux kernel 2.6.18
- */
-
-/* In Linux 5.4 asm_inline was introduced, but it's not supported by clang.
- * Redefine it to just asm to enable successful compilation.
- */
-
-#include <linux/module.h>
-#include <linux/version.h>
-#include <linux/pci.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/delay.h>
-#include <linux/mii.h>
-#include <linux/if_vlan.h>
-#include <linux/crc32.h>
-#include <linux/interrupt.h>
-#include <linux/in.h>
-#include <linux/ip.h>
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
-#include <linux/ipv6.h>
-#include <net/ip6_checksum.h>
-#endif
-#include <linux/tcp.h>
-#include <linux/init.h>
-#include <linux/rtnetlink.h>
-#include <linux/completion.h>
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
-#if LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0)
-#include <linux/pci-aspm.h>
-#endif
-#endif
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37)
-#include <linux/prefetch.h>
-#endif
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-#define dev_printk(A,B,fmt,args...) printk(A fmt,##args)
-#else
-#include <linux/dma-mapping.h>
-#include <linux/moduleparam.h>
-#endif
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31)
-#include <linux/mdio.h>
-#endif
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,4,10)
-#include <net/gso.h>
-#endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(6,4,10) */
-
-#include <asm/io.h>
-#include <asm/irq.h>
-
-#include "r8168.h"
-#include "r8168_asf.h"
-#include "rtl_eeprom.h"
-#include "rtltool.h"
-#include "r8168_firmware.h"
-
-#ifdef ENABLE_R8168_PROCFS
-#include <linux/proc_fs.h>
-#include <linux/seq_file.h>
-#endif
-
-#define FIRMWARE_8168D_1    "rtl_nic/rtl8168d-1.fw"
-#define FIRMWARE_8168D_2    "rtl_nic/rtl8168d-2.fw"
-#define FIRMWARE_8168E_1    "rtl_nic/rtl8168e-1.fw"
-#define FIRMWARE_8168E_2    "rtl_nic/rtl8168e-2.fw"
-#define FIRMWARE_8168E_3    "rtl_nic/rtl8168e-3.fw"
-#define FIRMWARE_8168E_4    "rtl_nic/rtl8168e-4.fw"
-#define FIRMWARE_8168F_1    "rtl_nic/rtl8168f-1.fw"
-#define FIRMWARE_8168F_2    "rtl_nic/rtl8168f-2.fw"
-#define FIRMWARE_8411_1     "rtl_nic/rtl8411-1.fw"
-#define FIRMWARE_8411_2     "rtl_nic/rtl8411-2.fw"
-#define FIRMWARE_8168G_2    "rtl_nic/rtl8168g-2.fw"
-#define FIRMWARE_8168G_3    "rtl_nic/rtl8168g-3.fw"
-#define FIRMWARE_8168EP_1   "rtl_nic/rtl8168ep-1.fw"
-#define FIRMWARE_8168EP_2   "rtl_nic/rtl8168ep-2.fw"
-#define FIRMWARE_8168EP_3   "rtl_nic/rtl8168ep-3.fw"
-#define FIRMWARE_8168H_1    "rtl_nic/rtl8168h-1.fw"
-#define FIRMWARE_8168H_2    "rtl_nic/rtl8168h-2.fw"
-#define FIRMWARE_8168H_3    "rtl_nic/rtl8168h-3.fw"
-#define FIRMWARE_8168H_4    "rtl_nic/rtl8168h-4.fw"
-#define FIRMWARE_8168FP_3   "rtl_nic/rtl8168fp-3.fw"
-#define FIRMWARE_8168FP_4   "rtl_nic/rtl8168fp-4.fw"
-
-#define mem_clear(data, size) memset((data), 0, (size))
-
-/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
-   The RTL chips use a 64 element hash table based on the Ethernet CRC. */
-static const int multicast_filter_limit = 32;
-
-static const struct {
-        const char *name;
-        const char *fw_name;
-} rtl_chip_fw_infos[] = {
-        /* PCI-E devices. */
-        [CFG_METHOD_1] = {"RTL8168B/8111",          },
-        [CFG_METHOD_2] = {"RTL8168B/8111",          },
-        [CFG_METHOD_3] = {"RTL8168B/8111",          },
-        [CFG_METHOD_4] = {"RTL8168C/8111C",         },
-        [CFG_METHOD_5] = {"RTL8168C/8111C",         },
-        [CFG_METHOD_6] = {"RTL8168C/8111C",         },
-        [CFG_METHOD_7] = {"RTL8168CP/8111CP",       },
-        [CFG_METHOD_8] = {"RTL8168CP/8111CP",       },
-        [CFG_METHOD_9] = {"RTL8168D/8111D",         FIRMWARE_8168D_1},
-        [CFG_METHOD_10] = {"RTL8168D/8111D",        FIRMWARE_8168D_2},
-        [CFG_METHOD_11] = {"RTL8168DP/8111DP",      },
-        [CFG_METHOD_12] = {"RTL8168DP/8111DP",      },
-        [CFG_METHOD_13] = {"RTL8168DP/8111DP",      },
-        [CFG_METHOD_14] = {"RTL8168E/8111E",        FIRMWARE_8168E_1},
-        [CFG_METHOD_15] = {"RTL8168E/8111E",        FIRMWARE_8168E_2},
-        [CFG_METHOD_16] = {"RTL8168E-VL/8111E-VL",  FIRMWARE_8168E_3},
-        [CFG_METHOD_17] = {"RTL8168E-VL/8111E-VL",  FIRMWARE_8168E_4},
-        [CFG_METHOD_18] = {"RTL8168F/8111F",        FIRMWARE_8168F_1},
-        [CFG_METHOD_19] = {"RTL8168F/8111F",        FIRMWARE_8168F_2},
-        [CFG_METHOD_20] = {"RTL8411",               FIRMWARE_8411_1},
-        [CFG_METHOD_21] = {"RTL8168G/8111G",        FIRMWARE_8168G_2},
-        [CFG_METHOD_22] = {"RTL8168G/8111G",        },
-        [CFG_METHOD_23] = {"RTL8168EP/8111EP",      FIRMWARE_8168EP_1},
-        [CFG_METHOD_24] = {"RTL8168GU/8111GU",      },
-        [CFG_METHOD_25] = {"RTL8168GU/8111GU",      FIRMWARE_8168G_3},
-        [CFG_METHOD_26] = {"8411B",                 FIRMWARE_8411_2},
-        [CFG_METHOD_27] = {"RTL8168EP/8111EP",      FIRMWARE_8168EP_2},
-        [CFG_METHOD_28] = {"RTL8168EP/8111EP",      FIRMWARE_8168EP_3},
-        [CFG_METHOD_29] = {"RTL8168H/8111H",        FIRMWARE_8168H_1},
-        [CFG_METHOD_30] = {"RTL8168H/8111H",        FIRMWARE_8168H_2},
-        [CFG_METHOD_31] = {"RTL8168FP/8111FP",      },
-        [CFG_METHOD_32] = {"RTL8168FP/8111FP",      FIRMWARE_8168FP_3},
-        [CFG_METHOD_33] = {"RTL8168FP/8111FP",      FIRMWARE_8168FP_4},
-        [CFG_METHOD_34] = {"RTL8168FP/8111FP",      FIRMWARE_8168FP_4},
-        [CFG_METHOD_35] = {"RTL8168H/8111H",        FIRMWARE_8168H_3},
-        [CFG_METHOD_36] = {"RTL8168H/8111H",        FIRMWARE_8168H_4},
-        [CFG_METHOD_37] = {"RTL8168M/8111M",        FIRMWARE_8168H_2},
-        [CFG_METHOD_DEFAULT] = {"Unknown",          },
-};
-
-#define _R(NAME,MAC,RCR,MASK, JumFrameSz) \
-    { .name = NAME, .mcfg = MAC, .RCR_Cfg = RCR, .RxConfigMask = MASK, .jumbo_frame_sz = JumFrameSz }
-
-static const struct {
-        const char *name;
-        u8 mcfg;
-        u32 RCR_Cfg;
-        u32 RxConfigMask;   /* Clears the bits supported by this chip */
-        u32 jumbo_frame_sz;
-} rtl_chip_info[] = {
-        _R("RTL8168B/8111B",
-        CFG_METHOD_1,
-        (Reserved2_data << Reserved2_shift) | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e1880,
-        Jumbo_Frame_4k),
-
-        _R("RTL8168B/8111B",
-        CFG_METHOD_2,
-        (Reserved2_data << Reserved2_shift) | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e1880,
-        Jumbo_Frame_4k),
-
-        _R("RTL8168B/8111B",
-        CFG_METHOD_3,
-        (Reserved2_data << Reserved2_shift) | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e1880,
-        Jumbo_Frame_4k),
-
-        _R("RTL8168C/8111C",
-        CFG_METHOD_4,
-        RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e1880,
-        Jumbo_Frame_6k),
-
-        _R("RTL8168C/8111C",
-        CFG_METHOD_5,
-        RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e1880,
-        Jumbo_Frame_6k),
-
-        _R("RTL8168C/8111C",
-        CFG_METHOD_6,
-        RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e1880,
-        Jumbo_Frame_6k),
-
-        _R("RTL8168CP/8111CP",
-        CFG_METHOD_7,
-        RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e1880,
-        Jumbo_Frame_6k),
-
-        _R("RTL8168CP/8111CP",
-        CFG_METHOD_8,
-        RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e1880,
-        Jumbo_Frame_6k),
-
-        _R("RTL8168D/8111D",
-        CFG_METHOD_9,
-        RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e1880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168D/8111D",
-        CFG_METHOD_10,
-        RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e1880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168DP/8111DP",
-        CFG_METHOD_11,
-        RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e1880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168DP/8111DP",
-        CFG_METHOD_12,
-        RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e1880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168DP/8111DP",
-        CFG_METHOD_13,
-        RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e1880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168E/8111E",
-        CFG_METHOD_14,
-        RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e1880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168E/8111E",
-        CFG_METHOD_15,
-        RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e1880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168E-VL/8111E-VL",
-        CFG_METHOD_16,
-        RxCfg_128_int_en | RxEarly_off_V1 | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e0080,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168E-VL/8111E-VL",
-        CFG_METHOD_17,
-        RxCfg_128_int_en | RxEarly_off_V1 | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e1880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168F/8111F",
-        CFG_METHOD_18,
-        RxCfg_128_int_en | RxEarly_off_V1 | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e1880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168F/8111F",
-        CFG_METHOD_19,
-        RxCfg_128_int_en | RxEarly_off_V1 | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e1880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8411",
-        CFG_METHOD_20,
-        RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e1880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168G/8111G",
-        CFG_METHOD_21,
-        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e5880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168G/8111G",
-        CFG_METHOD_22,
-        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e5880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168EP/8111EP",
-        CFG_METHOD_23,
-        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e5880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168GU/8111GU",
-        CFG_METHOD_24,
-        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e5880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168GU/8111GU",
-        CFG_METHOD_25,
-        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e5880,
-        Jumbo_Frame_9k),
-
-        _R("8411B",
-        CFG_METHOD_26,
-        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e5880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168EP/8111EP",
-        CFG_METHOD_27,
-        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e5880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168EP/8111EP",
-        CFG_METHOD_28,
-        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e5880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168H/8111H",
-        CFG_METHOD_29,
-        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e5880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168H/8111H",
-        CFG_METHOD_30,
-        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e5880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168FP/8111FP",
-        CFG_METHOD_31,
-        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e5880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168FP/8111FP",
-        CFG_METHOD_32,
-        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e5880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168FP/8111FP",
-        CFG_METHOD_33,
-        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e5880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168FP/8111FP",
-        CFG_METHOD_34,
-        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e5880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168H/8111H",
-        CFG_METHOD_35,
-        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e5880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168H/8111H",
-        CFG_METHOD_36,
-        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e5880,
-        Jumbo_Frame_9k),
-
-        _R("RTL8168M/8111M",
-        CFG_METHOD_37,
-        RxCfg_128_int_en | RxEarly_off_V2 | (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e5880,
-        Jumbo_Frame_9k),
-
-        _R("Unknown",
-        CFG_METHOD_DEFAULT,
-        (RX_DMA_BURST << RxCfgDMAShift),
-        0xff7e5880,
-        Jumbo_Frame_1k)
-};
-#undef _R
-
-#ifndef PCI_VENDOR_ID_DLINK
-#define PCI_VENDOR_ID_DLINK 0x1186
-#endif
-
-static struct pci_device_id rtl8168_pci_tbl[] = {
-        { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8168), },
-        { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8161), },
-        { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x2502), },
-        { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x2600), },
-        { PCI_VENDOR_ID_DLINK, 0x4300, 0x1186, 0x4b10,},
-        {0,},
-};
-
-MODULE_DEVICE_TABLE(pci, rtl8168_pci_tbl);
-
-static int use_dac = 1;
-static int timer_count = 0x2600;
-static int dynamic_aspm_packet_threshold = 10;
-
-static struct {
-        u32 msg_enable;
-} debug = { -1 };
-
-static unsigned int speed_mode = SPEED_1000;
-static unsigned int duplex_mode = DUPLEX_FULL;
-static unsigned int autoneg_mode = AUTONEG_ENABLE;
-static unsigned int advertising_mode =  ADVERTISED_10baseT_Half |
-                                        ADVERTISED_10baseT_Full |
-                                        ADVERTISED_100baseT_Half |
-                                        ADVERTISED_100baseT_Full |
-                                        ADVERTISED_1000baseT_Half |
-                                        ADVERTISED_1000baseT_Full;
-#ifdef CONFIG_ASPM
-static int aspm = 1;
-#else
-static int aspm = 0;
-#endif
-#ifdef CONFIG_DYNAMIC_ASPM
-static int dynamic_aspm = 1;
-#else
-static int dynamic_aspm = 0;
-#endif
-#ifdef ENABLE_S5WOL
-static int s5wol = 1;
-#else
-static int s5wol = 0;
-#endif
-#ifdef ENABLE_S5_KEEP_CURR_MAC
-static int s5_keep_curr_mac = 1;
-#else
-static int s5_keep_curr_mac = 0;
-#endif
-#ifdef ENABLE_EEE
-static int eee_enable = 1;
-#else
-static int eee_enable = 0;
-#endif
-#ifdef CONFIG_SOC_LAN
-static ulong hwoptimize = HW_PATCH_SOC_LAN;
-#else
-static ulong hwoptimize = 0;
-#endif
-#ifdef ENABLE_S0_MAGIC_PACKET
-static int s0_magic_packet = 1;
-#else
-static int s0_magic_packet = 0;
-#endif
-#ifdef DISABLE_WOL_SUPPORT
-static int disable_wol_support = 1;
-#else
-static int disable_wol_support = 0;
-#endif
-
-MODULE_AUTHOR("Realtek and the Linux r8168 crew <netdev@vger.kernel.org>");
-MODULE_DESCRIPTION("RealTek RTL-8168 Gigabit Ethernet driver");
-
-module_param(speed_mode, uint, 0);
-MODULE_PARM_DESC(speed_mode, "force phy operation. Deprecated by ethtool (8).");
-
-module_param(duplex_mode, uint, 0);
-MODULE_PARM_DESC(duplex_mode, "force phy operation. Deprecated by ethtool (8).");
-
-module_param(autoneg_mode, uint, 0);
-MODULE_PARM_DESC(autoneg_mode, "force phy operation. Deprecated by ethtool (8).");
-
-module_param(advertising_mode, uint, 0);
-MODULE_PARM_DESC(advertising_mode, "force phy operation. Deprecated by ethtool (8).");
-
-module_param(aspm, int, 0);
-MODULE_PARM_DESC(aspm, "Enable ASPM.");
-
-module_param(dynamic_aspm, int, 0);
-MODULE_PARM_DESC(aspm, "Enable Software Dynamic ASPM.");
-
-module_param(s5wol, int, 0);
-MODULE_PARM_DESC(s5wol, "Enable Shutdown Wake On Lan.");
-
-module_param(s5_keep_curr_mac, int, 0);
-MODULE_PARM_DESC(s5_keep_curr_mac, "Enable Shutdown Keep Current MAC Address.");
-
-module_param(use_dac, int, 0);
-MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot.");
-
-module_param(timer_count, int, 0);
-MODULE_PARM_DESC(timer_count, "Timer Interrupt Interval.");
-
-module_param(eee_enable, int, 0);
-MODULE_PARM_DESC(eee_enable, "Enable Energy Efficient Ethernet.");
-
-module_param(hwoptimize, ulong, 0);
-MODULE_PARM_DESC(hwoptimize, "Enable HW optimization function.");
-
-module_param(s0_magic_packet, int, 0);
-MODULE_PARM_DESC(s0_magic_packet, "Enable S0 Magic Packet.");
-
-module_param(dynamic_aspm_packet_threshold, int, 0);
-MODULE_PARM_DESC(dynamic_aspm_packet_threshold, "Dynamic ASPM packet threshold.");
-
-module_param(disable_wol_support, int, 0);
-MODULE_PARM_DESC(disable_wol_support, "Disable PM support.");
-
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-module_param_named(debug, debug.msg_enable, int, 0);
-MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)");
-#endif//LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-
-MODULE_LICENSE("GPL");
-#ifdef ENABLE_USE_FIRMWARE_FILE
-MODULE_FIRMWARE(FIRMWARE_8168D_1);
-MODULE_FIRMWARE(FIRMWARE_8168D_2);
-MODULE_FIRMWARE(FIRMWARE_8168E_1);
-MODULE_FIRMWARE(FIRMWARE_8168E_2);
-MODULE_FIRMWARE(FIRMWARE_8168E_3);
-MODULE_FIRMWARE(FIRMWARE_8168E_4);
-MODULE_FIRMWARE(FIRMWARE_8168F_1);
-MODULE_FIRMWARE(FIRMWARE_8168F_2);
-MODULE_FIRMWARE(FIRMWARE_8411_1);
-MODULE_FIRMWARE(FIRMWARE_8411_2);
-MODULE_FIRMWARE(FIRMWARE_8168G_2);
-MODULE_FIRMWARE(FIRMWARE_8168G_3);
-MODULE_FIRMWARE(FIRMWARE_8168EP_1);
-MODULE_FIRMWARE(FIRMWARE_8168EP_2);
-MODULE_FIRMWARE(FIRMWARE_8168EP_3);
-MODULE_FIRMWARE(FIRMWARE_8168H_1);
-MODULE_FIRMWARE(FIRMWARE_8168H_2);
-MODULE_FIRMWARE(FIRMWARE_8168H_3);
-MODULE_FIRMWARE(FIRMWARE_8168H_4);
-MODULE_FIRMWARE(FIRMWARE_8168FP_3);
-MODULE_FIRMWARE(FIRMWARE_8168FP_4);
-#endif
-
-MODULE_VERSION(RTL8168_VERSION);
-
-static void rtl8168_sleep_rx_enable(struct net_device *dev);
-static void rtl8168_dsm(struct net_device *dev, int dev_state);
-
-/*
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
-static void rtl8168_esd_timer(unsigned long __opaque);
-#else
-static void rtl8168_esd_timer(struct timer_list *t);
-#endif
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
-static void rtl8168_link_timer(unsigned long __opaque);
-#else
-static void rtl8168_link_timer(struct timer_list *t);
-#endif
-*/
-
-static netdev_tx_t rtl8168_start_xmit(struct sk_buff *skb, struct net_device *dev);
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
-static irqreturn_t rtl8168_interrupt(int irq, void *dev_instance, struct pt_regs *regs);
-#else
-static irqreturn_t rtl8168_interrupt(int irq, void *dev_instance);
-#endif
-static void rtl8168_rx_desc_offset0_init(struct rtl8168_private *, int);
-static void rtl8168_set_rx_mode(struct net_device *dev);
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0)
-static void rtl8168_tx_timeout(struct net_device *dev, unsigned int txqueue);
-#else
-static void rtl8168_tx_timeout(struct net_device *dev);
-#endif
-static struct net_device_stats *rtl8168_get_stats(struct net_device *dev);
-static int rtl8168_rx_interrupt(struct net_device *, struct rtl8168_private *, struct rtl8168_rx_ring *, napi_budget);
-#ifdef CONFIG_R8168_NAPI
-static int rtl8168_poll_msix_ring(napi_ptr napi, napi_budget budget);
-static int rtl8168_poll_msix_rx(napi_ptr napi, napi_budget budget);
-#endif
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
-static irqreturn_t rtl8168_interrupt_msix(int irq, void *dev_instance, struct pt_regs *regs);
-#else
-static irqreturn_t rtl8168_interrupt_msix(int irq, void *dev_instance);
-#endif
-static void rtl8168_wait_for_quiescence(struct net_device *dev);
-static int rtl8168_change_mtu(struct net_device *dev, int new_mtu);
-static void rtl8168_down(struct net_device *dev);
-
-static int rtl8168_set_mac_address(struct net_device *dev, void *p);
-void rtl8168_rar_set(struct rtl8168_private *tp, const u8 *addr);
-static void rtl8168_desc_addr_fill(struct rtl8168_private *);
-static void rtl8168_tx_desc_init(struct rtl8168_private *tp);
-static void rtl8168_rx_desc_init(struct rtl8168_private *tp);
-
-static u16 rtl8168_get_hw_phy_mcu_code_ver(struct rtl8168_private *tp);
-
-static void rtl8168_phy_power_up(struct net_device *dev);
-static void rtl8168_phy_power_down(struct net_device *dev);
-static int rtl8168_set_speed(struct net_device *dev, u8 autoneg, u32 speed, u8 duplex, u32 adv);
-
-static int rtl8168_set_phy_mcu_patch_request(struct rtl8168_private *tp);
-static int rtl8168_clear_phy_mcu_patch_request(struct rtl8168_private *tp);
-
-#ifdef CONFIG_R8168_NAPI
-static int rtl8168_poll(napi_ptr napi, napi_budget budget);
-#endif
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
-static void rtl8168_reset_task(void *_data);
-static void rtl8168_esd_task(void *_data);
-static void rtl8168_linkchg_task(void *_data);
-#else
-static void rtl8168_reset_task(struct work_struct *work);
-static void rtl8168_esd_task(struct work_struct *work);
-static void rtl8168_linkchg_task(struct work_struct *work);
-#endif
-static void rtl8168_schedule_reset_work(struct rtl8168_private *tp);
-static void rtl8168_schedule_esd_work(struct rtl8168_private *tp);
-static void rtl8168_schedule_linkchg_work(struct rtl8168_private *tp);
-static void rtl8168_init_all_schedule_work(struct rtl8168_private *tp);
-static void rtl8168_cancel_all_schedule_work(struct rtl8168_private *tp);
-
-static inline struct device *tp_to_dev(struct rtl8168_private *tp)
-{
-        return &tp->pci_dev->dev;
-}
-
-#if ((LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) && \
-     LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,00)))
-void ethtool_convert_legacy_u32_to_link_mode(unsigned long *dst,
-                u32 legacy_u32)
-{
-        bitmap_zero(dst, __ETHTOOL_LINK_MODE_MASK_NBITS);
-        dst[0] = legacy_u32;
-}
-
-bool ethtool_convert_link_mode_to_legacy_u32(u32 *legacy_u32,
-                const unsigned long *src)
-{
-        bool retval = true;
-
-        /* TODO: following test will soon always be true */
-        if (__ETHTOOL_LINK_MODE_MASK_NBITS > 32) {
-                __ETHTOOL_DECLARE_LINK_MODE_MASK(ext);
-
-                bitmap_zero(ext, __ETHTOOL_LINK_MODE_MASK_NBITS);
-                bitmap_fill(ext, 32);
-                bitmap_complement(ext, ext, __ETHTOOL_LINK_MODE_MASK_NBITS);
-                if (bitmap_intersects(ext, src,
-                                      __ETHTOOL_LINK_MODE_MASK_NBITS)) {
-                        /* src mask goes beyond bit 31 */
-                        retval = false;
-                }
-        }
-        *legacy_u32 = src[0];
-        return retval;
-}
-#endif
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
-
-#ifndef LPA_1000FULL
-#define LPA_1000FULL            0x0800
-#endif
-
-#ifndef LPA_1000HALF
-#define LPA_1000HALF            0x0400
-#endif
-
-static inline u32 mii_adv_to_ethtool_adv_t(u32 adv)
-{
-        u32 result = 0;
-
-        if (adv & ADVERTISE_10HALF)
-                result |= ADVERTISED_10baseT_Half;
-        if (adv & ADVERTISE_10FULL)
-                result |= ADVERTISED_10baseT_Full;
-        if (adv & ADVERTISE_100HALF)
-                result |= ADVERTISED_100baseT_Half;
-        if (adv & ADVERTISE_100FULL)
-                result |= ADVERTISED_100baseT_Full;
-        if (adv & ADVERTISE_PAUSE_CAP)
-                result |= ADVERTISED_Pause;
-        if (adv & ADVERTISE_PAUSE_ASYM)
-                result |= ADVERTISED_Asym_Pause;
-
-        return result;
-}
-
-static inline u32 mii_lpa_to_ethtool_lpa_t(u32 lpa)
-{
-        u32 result = 0;
-
-        if (lpa & LPA_LPACK)
-                result |= ADVERTISED_Autoneg;
-
-        return result | mii_adv_to_ethtool_adv_t(lpa);
-}
-
-static inline u32 mii_stat1000_to_ethtool_lpa_t(u32 lpa)
-{
-        u32 result = 0;
-
-        if (lpa & LPA_1000HALF)
-                result |= ADVERTISED_1000baseT_Half;
-        if (lpa & LPA_1000FULL)
-                result |= ADVERTISED_1000baseT_Full;
-
-        return result;
-}
-
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0)
-static inline void eth_hw_addr_random(struct net_device *dev)
-{
-        random_ether_addr(dev->dev_addr);
-}
-#endif
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-#undef ethtool_ops
-#define ethtool_ops _kc_ethtool_ops
-
-struct _kc_ethtool_ops {
-        int  (*get_settings)(struct net_device *, struct ethtool_cmd *);
-        int  (*set_settings)(struct net_device *, struct ethtool_cmd *);
-        void (*get_drvinfo)(struct net_device *, struct ethtool_drvinfo *);
-        int  (*get_regs_len)(struct net_device *);
-        void (*get_regs)(struct net_device *, struct ethtool_regs *, void *);
-        void (*get_wol)(struct net_device *, struct ethtool_wolinfo *);
-        int  (*set_wol)(struct net_device *, struct ethtool_wolinfo *);
-        u32  (*get_msglevel)(struct net_device *);
-        void (*set_msglevel)(struct net_device *, u32);
-        int  (*nway_reset)(struct net_device *);
-        u32  (*get_link)(struct net_device *);
-        int  (*get_eeprom_len)(struct net_device *);
-        int  (*get_eeprom)(struct net_device *, struct ethtool_eeprom *, u8 *);
-        int  (*set_eeprom)(struct net_device *, struct ethtool_eeprom *, u8 *);
-        int  (*get_coalesce)(struct net_device *, struct ethtool_coalesce *);
-        int  (*set_coalesce)(struct net_device *, struct ethtool_coalesce *);
-        void (*get_ringparam)(struct net_device *, struct ethtool_ringparam *);
-        int  (*set_ringparam)(struct net_device *, struct ethtool_ringparam *);
-        void (*get_pauseparam)(struct net_device *,
-                               struct ethtool_pauseparam*);
-        int  (*set_pauseparam)(struct net_device *,
-                               struct ethtool_pauseparam*);
-        u32  (*get_rx_csum)(struct net_device *);
-        int  (*set_rx_csum)(struct net_device *, u32);
-        u32  (*get_tx_csum)(struct net_device *);
-        int  (*set_tx_csum)(struct net_device *, u32);
-        u32  (*get_sg)(struct net_device *);
-        int  (*set_sg)(struct net_device *, u32);
-        u32  (*get_tso)(struct net_device *);
-        int  (*set_tso)(struct net_device *, u32);
-        int  (*self_test_count)(struct net_device *);
-        void (*self_test)(struct net_device *, struct ethtool_test *, u64 *);
-        void (*get_strings)(struct net_device *, u32 stringset, u8 *);
-        int  (*phys_id)(struct net_device *, u32);
-        int  (*get_stats_count)(struct net_device *);
-        void (*get_ethtool_stats)(struct net_device *, struct ethtool_stats *,
-                                  u64 *);
-} *ethtool_ops = NULL;
-
-#undef SET_ETHTOOL_OPS
-#define SET_ETHTOOL_OPS(netdev, ops) (ethtool_ops = (ops))
-
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,16,0)
-#ifndef SET_ETHTOOL_OPS
-#define SET_ETHTOOL_OPS(netdev,ops) \
-         ( (netdev)->ethtool_ops = (ops) )
-#endif //SET_ETHTOOL_OPS
-#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,16,0)
-
-//#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5)
-#ifndef netif_msg_init
-#define netif_msg_init _kc_netif_msg_init
-/* copied from linux kernel 2.6.20 include/linux/netdevice.h */
-static inline u32 netif_msg_init(int debug_value, int default_msg_enable_bits)
-{
-        /* use default */
-        if (debug_value < 0 || debug_value >= (sizeof(u32) * 8))
-                return default_msg_enable_bits;
-        if (debug_value == 0)   /* no output */
-                return 0;
-        /* set low N bits */
-        return (1 << debug_value) - 1;
-}
-
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5)
-
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22)
-static inline void eth_copy_and_sum (struct sk_buff *dest,
-                                     const unsigned char *src,
-                                     int len, int base)
-{
-        memcpy (dest->data, src, len);
-}
-#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22)
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7)
-/* copied from linux kernel 2.6.20 /include/linux/time.h */
-/* Parameters used to convert the timespec values: */
-#define MSEC_PER_SEC    1000L
-
-/* copied from linux kernel 2.6.20 /include/linux/jiffies.h */
-/*
- * Change timeval to jiffies, trying to avoid the
- * most obvious overflows..
- *
- * And some not so obvious.
- *
- * Note that we don't want to return MAX_LONG, because
- * for various timeout reasons we often end up having
- * to wait "jiffies+1" in order to guarantee that we wait
- * at _least_ "jiffies" - so "jiffies+1" had better still
- * be positive.
- */
-#define MAX_JIFFY_OFFSET ((~0UL >> 1)-1)
-
-/*
- * Convert jiffies to milliseconds and back.
- *
- * Avoid unnecessary multiplications/divisions in the
- * two most common HZ cases:
- */
-static inline unsigned int _kc_jiffies_to_msecs(const unsigned long j)
-{
-#if HZ <= MSEC_PER_SEC && !(MSEC_PER_SEC % HZ)
-        return (MSEC_PER_SEC / HZ) * j;
-#elif HZ > MSEC_PER_SEC && !(HZ % MSEC_PER_SEC)
-        return (j + (HZ / MSEC_PER_SEC) - 1)/(HZ / MSEC_PER_SEC);
-#else
-        return (j * MSEC_PER_SEC) / HZ;
-#endif
-}
-
-static inline unsigned long _kc_msecs_to_jiffies(const unsigned int m)
-{
-        if (m > _kc_jiffies_to_msecs(MAX_JIFFY_OFFSET))
-                return MAX_JIFFY_OFFSET;
-#if HZ <= MSEC_PER_SEC && !(MSEC_PER_SEC % HZ)
-        return (m + (MSEC_PER_SEC / HZ) - 1) / (MSEC_PER_SEC / HZ);
-#elif HZ > MSEC_PER_SEC && !(HZ % MSEC_PER_SEC)
-        return m * (HZ / MSEC_PER_SEC);
-#else
-        return (m * HZ + MSEC_PER_SEC - 1) / MSEC_PER_SEC;
-#endif
-}
-#endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7)
-
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11)
-
-/* copied from linux kernel 2.6.12.6 /include/linux/pm.h */
-typedef int __bitwise pci_power_t;
-
-/* copied from linux kernel 2.6.12.6 /include/linux/pci.h */
-typedef u32 __bitwise pm_message_t;
-
-#define PCI_D0  ((pci_power_t __force) 0)
-#define PCI_D1  ((pci_power_t __force) 1)
-#define PCI_D2  ((pci_power_t __force) 2)
-#define PCI_D3hot   ((pci_power_t __force) 3)
-#define PCI_D3cold  ((pci_power_t __force) 4)
-#define PCI_POWER_ERROR ((pci_power_t __force) -1)
-
-/* copied from linux kernel 2.6.12.6 /drivers/pci/pci.c */
-/**
- * pci_choose_state - Choose the power state of a PCI device
- * @dev: PCI device to be suspended
- * @state: target sleep state for the whole system. This is the value
- *  that is passed to suspend() function.
- *
- * Returns PCI power state suitable for given device and given system
- * message.
- */
-
-pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state)
-{
-        if (!pci_find_capability(dev, PCI_CAP_ID_PM))
-                return PCI_D0;
-
-        switch (state) {
-        case 0:
-                return PCI_D0;
-        case 3:
-                return PCI_D3hot;
-        default:
-                printk("They asked me for state %d\n", state);
-//      BUG();
-        }
-        return PCI_D0;
-}
-#endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11)
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9)
-/**
- * msleep_interruptible - sleep waiting for waitqueue interruptions
- * @msecs: Time in milliseconds to sleep for
- */
-#define msleep_interruptible _kc_msleep_interruptible
-unsigned long _kc_msleep_interruptible(unsigned int msecs)
-{
-        unsigned long timeout = _kc_msecs_to_jiffies(msecs);
-
-        while (timeout && !signal_pending(current)) {
-                set_current_state(TASK_INTERRUPTIBLE);
-                timeout = schedule_timeout(timeout);
-        }
-        return _kc_jiffies_to_msecs(timeout);
-}
-#endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9)
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7)
-/* copied from linux kernel 2.6.20 include/linux/sched.h */
-#ifndef __sched
-#define __sched     __attribute__((__section__(".sched.text")))
-#endif
-
-/* copied from linux kernel 2.6.20 kernel/timer.c */
-signed long __sched schedule_timeout_uninterruptible(signed long timeout)
-{
-        __set_current_state(TASK_UNINTERRUPTIBLE);
-        return schedule_timeout(timeout);
-}
-
-/* copied from linux kernel 2.6.20 include/linux/mii.h */
-#undef if_mii
-#define if_mii _kc_if_mii
-static inline struct mii_ioctl_data *if_mii(struct ifreq *rq)
-{
-        return (struct mii_ioctl_data *) &rq->ifr_ifru;
-}
-#endif  //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7)
-
-int rtl8168_dump_tally_counter(struct rtl8168_private *tp, dma_addr_t paddr)
-{
-        u32 cmd;
-        u32 WaitCnt;
-        int retval = -1;
-
-        RTL_W32(tp, CounterAddrHigh, (u64)paddr >> 32);
-        cmd = (u64)paddr & DMA_BIT_MASK(32);
-        RTL_W32(tp, CounterAddrLow, cmd);
-        RTL_W32(tp, CounterAddrLow, cmd | CounterDump);
-
-        WaitCnt = 0;
-        while (RTL_R32(tp, CounterAddrLow) & CounterDump) {
-                udelay(10);
-
-                WaitCnt++;
-                if (WaitCnt > 20)
-                        break;
-        }
-
-        if (WaitCnt <= 20)
-                retval = 0;
-
-        return retval;
-}
-
-static u32 rtl8168_convert_link_speed(u16 status)
-{
-        u32 speed = SPEED_UNKNOWN;
-
-        if (status & LinkStatus) {
-                if (status & _1000bpsF)
-                        speed = SPEED_1000;
-                else if (status & _100bps)
-                        speed = SPEED_100;
-                else if (status & _10bps)
-                        speed = SPEED_10;
-        }
-
-        return speed;
-}
-
-static int rtl8168_vcd_test(struct rtl8168_private *tp)
-{
-        u16 val;
-        u32 wait_cnt;
-        int ret = -1;
-
-        rtl8168_mdio_write(tp, 0x1f, 0x0a43);
-        rtl8168_mdio_write(tp, 0x13, 0x8169);
-        rtl8168_mdio_write(tp, 0x14, 0x18c1);
-        rtl8168_mdio_write(tp, 0x13, 0x816b);
-        rtl8168_mdio_write(tp, 0x14, 0xc7b0);
-        rtl8168_mdio_write(tp, 0x13, 0x816d);
-        rtl8168_mdio_write(tp, 0x14, 0x5933);
-        rtl8168_mdio_write(tp, 0x13, 0x816f);
-        rtl8168_mdio_write(tp, 0x14, 0xb920);
-        rtl8168_mdio_write(tp, 0x13, 0x8171);
-        rtl8168_mdio_write(tp, 0x14, 0xee07);
-        rtl8168_mdio_write(tp, 0x13, 0x8162);
-        rtl8168_mdio_write(tp, 0x14, 0x1800);
-        rtl8168_mdio_write(tp, 0x13, 0x8173);
-        rtl8168_mdio_write(tp, 0x14, 0x0304);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-        rtl8168_mdio_write(tp, 0x1f, 0x0a42);
-        rtl8168_clear_eth_phy_bit(tp, 0x11, BIT(0));
-        rtl8168_set_eth_phy_bit(tp, 0x11, 0x00f0);
-        rtl8168_set_eth_phy_bit(tp, 0x11, BIT(0));
-
-        wait_cnt = 0;
-        do {
-                mdelay(1);
-                val = rtl8168_mdio_read(tp, 0x11);
-                wait_cnt++;
-        } while (!(val & BIT_15) && (wait_cnt < 5000));
-
-        if (wait_cnt == 5000)
-                goto exit;
-
-        ret = 0;
-
-exit:
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-        return ret;
-}
-
-static void rtl8168_get_cp_len(struct rtl8168_private *tp,
-                               u16 cp_len[RTL8168_CP_NUM])
-{
-        int i;
-        u16 status;
-        u16 tmp_cp_len = 0;
-
-        status = RTL_R8(tp, PHYstatus);
-        if (status & LinkStatus) {
-                if (status & _10bps) {
-                        tmp_cp_len = 0;
-                } else if (status & _1000bpsF) {
-                        rtl8168_mdio_write(tp, 0x1f, 0x0a88);
-                        tmp_cp_len = rtl8168_mdio_read(tp, 0x10);
-                } else
-                        goto exit;
-        } else
-                goto exit;
-
-        tmp_cp_len &= 0xff;
-        for (i=0; i<RTL8168_CP_NUM; i++)
-                cp_len[i] = tmp_cp_len;
-
-exit:
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-        for (i=0; i<RTL8168_CP_NUM; i++)
-                if (cp_len[i] > RTL8168_MAX_SUPPORT_cp_len)
-                        cp_len[i] = RTL8168_MAX_SUPPORT_cp_len;
-
-        return;
-}
-
-static int __rtl8168_get_cp_status(u16 val)
-{
-        switch (val) {
-        case 0x0060:
-                return rtl8168_cp_normal;
-        case 0x0048:
-                return rtl8168_cp_open;
-        case 0x0050:
-                return rtl8168_cp_short;
-        case 0x0042:
-        case 0x0044:
-                return rtl8168_cp_mismatch;
-        default:
-                return rtl8168_cp_normal;
-        }
-}
-
-static int _rtl8168_get_cp_status(struct rtl8168_private *tp, u8 pair_num)
-{
-        u16 val;
-        int cp_status = rtl8168_cp_unknown;
-
-        if (pair_num > 3)
-                goto exit;
-
-        rtl8168_mdio_write(tp, 0x1f, 0x0a43);
-        rtl8168_mdio_write(tp, 0x13, 0x802b + 4 * pair_num);
-        val = rtl8168_mdio_read(tp, 0x14);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-        cp_status = __rtl8168_get_cp_status(val);
-
-exit:
-        return cp_status;
-}
-
-static const char * rtl8168_get_cp_status_string(int cp_status)
-{
-        switch(cp_status) {
-        case rtl8168_cp_normal:
-                return "normal  ";
-        case rtl8168_cp_short:
-                return "short   ";
-        case rtl8168_cp_open:
-                return "open    ";
-        case rtl8168_cp_mismatch:
-                return "mismatch";
-        default:
-                return "unknown ";
-        }
-}
-
-static u16 rtl8168_get_cp_pp(struct rtl8168_private *tp, u8 pair_num)
-{
-        u16 pp = 0;
-
-        if (pair_num > 3)
-                goto exit;
-
-        rtl8168_mdio_write(tp, 0x1f, 0x0a43);
-        rtl8168_mdio_write(tp, 0x13, 0x802d + 4 * pair_num);
-        pp = rtl8168_mdio_read(tp, 0x14);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-        pp &= 0x3fff;
-        pp /= 80;
-
-exit:
-        return pp;
-}
-
-static void rtl8168_get_cp_status(struct rtl8168_private *tp,
-                                  int cp_status[RTL8168_CP_NUM])
-{
-        int i;
-
-        for (i =0; i<RTL8168_CP_NUM; i++)
-                cp_status[i] = _rtl8168_get_cp_status(tp, i);
-}
-
-#ifdef ENABLE_R8168_PROCFS
-/****************************************************************************
-*   -----------------------------PROCFS STUFF-------------------------
-*****************************************************************************
-*/
-
-static struct proc_dir_entry *rtl8168_proc;
-static int proc_init_num = 0;
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
-static int proc_get_driver_variable(struct seq_file *m, void *v)
-{
-        struct net_device *dev = m->private;
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        seq_puts(m, "\nDump Driver Variable\n");
-
-        rtnl_lock();
-
-        seq_puts(m, "Variable\tValue\n----------\t-----\n");
-        seq_printf(m, "MODULENAME\t%s\n", MODULENAME);
-        seq_printf(m, "driver version\t%s\n", RTL8168_VERSION);
-        seq_printf(m, "chipset\t%d\n", tp->chipset);
-        seq_printf(m, "chipset_name\t%s\n", rtl_chip_info[tp->chipset].name);
-        seq_printf(m, "mtu\t%d\n", dev->mtu);
-        seq_printf(m, "num_rx_desc\t0x%x\n", tp->num_rx_desc);
-        seq_printf(m, "cur_rx0\t0x%x\n", tp->rx_ring[0].cur_rx);
-        seq_printf(m, "dirty_rx0\t0x%x\n", tp->rx_ring[0].dirty_rx);
-        seq_printf(m, "rdu0\t0x%x\n", tp->rx_ring[0].rdu);
-        seq_printf(m, "cur_rx1\t0x%x\n", tp->rx_ring[1].cur_rx);
-        seq_printf(m, "dirty_rx1\t0x%x\n", tp->rx_ring[1].dirty_rx);
-        seq_printf(m, "rdu1\t0x%x\n", tp->rx_ring[1].rdu);
-        seq_printf(m, "cur_rx2\t0x%x\n", tp->rx_ring[2].cur_rx);
-        seq_printf(m, "dirty_rx2\t0x%x\n", tp->rx_ring[2].dirty_rx);
-        seq_printf(m, "rdu2\t0x%x\n", tp->rx_ring[2].rdu);
-        seq_printf(m, "cur_rx3\t0x%x\n", tp->rx_ring[3].cur_rx);
-        seq_printf(m, "dirty_rx3\t0x%x\n", tp->rx_ring[3].dirty_rx);
-        seq_printf(m, "rdu3\t0x%x\n", tp->rx_ring[3].rdu);
-        seq_printf(m, "rx_fifo_of\t0x%x\n", tp->rx_fifo_of);
-        seq_printf(m, "num_tx_desc\t0x%x\n", tp->tx_ring[0].num_tx_desc);
-        seq_printf(m, "cur_tx0\t0x%x\n", tp->tx_ring[0].cur_tx);
-        seq_printf(m, "dirty_tx0\t0x%x\n", tp->tx_ring[0].dirty_tx);
-        seq_printf(m, "tdu0\t0x%x\n", tp->tx_ring[0].tdu);
-        seq_printf(m, "cur_tx1\t0x%x\n", tp->tx_ring[1].cur_tx);
-        seq_printf(m, "dirty_tx1\t0x%x\n", tp->tx_ring[1].dirty_tx);
-        seq_printf(m, "tdu1\t0x%x\n", tp->tx_ring[1].tdu);
-        seq_printf(m, "rx_buf_sz\t0x%x\n", tp->rx_buf_sz);
-        seq_printf(m, "esd_flag\t0x%x\n", tp->esd_flag);
-        seq_printf(m, "pci_cfg_is_read\t0x%x\n", tp->pci_cfg_is_read);
-        seq_printf(m, "rtl8168_rx_config\t0x%x\n", tp->rtl8168_rx_config);
-        seq_printf(m, "cp_cmd\t0x%x\n", tp->cp_cmd);
-        seq_printf(m, "intr_mask\t0x%x\n", tp->intr_mask);
-        seq_printf(m, "timer_intr_mask\t0x%x\n", tp->timer_intr_mask);
-        seq_printf(m, "wol_enabled\t0x%x\n", tp->wol_enabled);
-        seq_printf(m, "wol_opts\t0x%x\n", tp->wol_opts);
-        seq_printf(m, "efuse_ver\t0x%x\n", tp->efuse_ver);
-        seq_printf(m, "eeprom_type\t0x%x\n", tp->eeprom_type);
-        seq_printf(m, "autoneg\t0x%x\n", tp->autoneg);
-        seq_printf(m, "duplex\t0x%x\n", tp->duplex);
-        seq_printf(m, "speed\t%d\n", tp->speed);
-        seq_printf(m, "advertising\t0x%x\n", tp->advertising);
-        seq_printf(m, "eeprom_len\t0x%x\n", tp->eeprom_len);
-        seq_printf(m, "cur_page\t0x%x\n", tp->cur_page);
-        seq_printf(m, "bios_setting\t0x%x\n", tp->bios_setting);
-        seq_printf(m, "features\t0x%x\n", tp->features);
-        seq_printf(m, "org_pci_offset_99\t0x%x\n", tp->org_pci_offset_99);
-        seq_printf(m, "org_pci_offset_180\t0x%x\n", tp->org_pci_offset_180);
-        seq_printf(m, "issue_offset_99_event\t0x%x\n", tp->issue_offset_99_event);
-        seq_printf(m, "org_pci_offset_80\t0x%x\n", tp->org_pci_offset_80);
-        seq_printf(m, "org_pci_offset_81\t0x%x\n", tp->org_pci_offset_81);
-        seq_printf(m, "use_timer_interrrupt\t0x%x\n", tp->use_timer_interrrupt);
-        seq_printf(m, "HwIcVerUnknown\t0x%x\n", tp->HwIcVerUnknown);
-        seq_printf(m, "NotWrRamCodeToMicroP\t0x%x\n", tp->NotWrRamCodeToMicroP);
-        seq_printf(m, "NotWrMcuPatchCode\t0x%x\n", tp->NotWrMcuPatchCode);
-        seq_printf(m, "HwHasWrRamCodeToMicroP\t0x%x\n", tp->HwHasWrRamCodeToMicroP);
-        seq_printf(m, "sw_ram_code_ver\t0x%x\n", tp->sw_ram_code_ver);
-        seq_printf(m, "hw_ram_code_ver\t0x%x\n", tp->hw_ram_code_ver);
-        seq_printf(m, "rtk_enable_diag\t0x%x\n", tp->rtk_enable_diag);
-        seq_printf(m, "ShortPacketSwChecksum\t0x%x\n", tp->ShortPacketSwChecksum);
-        seq_printf(m, "UseSwPaddingShortPkt\t0x%x\n", tp->UseSwPaddingShortPkt);
-        seq_printf(m, "RequireAdcBiasPatch\t0x%x\n", tp->RequireAdcBiasPatch);
-        seq_printf(m, "AdcBiasPatchIoffset\t0x%x\n", tp->AdcBiasPatchIoffset);
-        seq_printf(m, "RequireAdjustUpsTxLinkPulseTiming\t0x%x\n", tp->RequireAdjustUpsTxLinkPulseTiming);
-        seq_printf(m, "SwrCnt1msIni\t0x%x\n", tp->SwrCnt1msIni);
-        seq_printf(m, "HwSuppNowIsOobVer\t0x%x\n", tp->HwSuppNowIsOobVer);
-        seq_printf(m, "HwFiberModeVer\t0x%x\n", tp->HwFiberModeVer);
-        seq_printf(m, "HwFiberStat\t0x%x\n", tp->HwFiberStat);
-        seq_printf(m, "HwSwitchMdiToFiber\t0x%x\n", tp->HwSwitchMdiToFiber);
-        seq_printf(m, "HwSuppSerDesPhyVer\t0x%x\n", tp->HwSuppSerDesPhyVer);
-        seq_printf(m, "NicCustLedValue\t0x%x\n", tp->NicCustLedValue);
-        seq_printf(m, "RequiredSecLanDonglePatch\t0x%x\n", tp->RequiredSecLanDonglePatch);
-        seq_printf(m, "HwSuppDashVer\t0x%x\n", tp->HwSuppDashVer);
-        seq_printf(m, "DASH\t0x%x\n", tp->DASH);
-        seq_printf(m, "dash_printer_enabled\t0x%x\n", tp->dash_printer_enabled);
-        seq_printf(m, "HwSuppKCPOffloadVer\t0x%x\n", tp->HwSuppKCPOffloadVer);
-        seq_printf(m, "speed_mode\t0x%x\n", speed_mode);
-        seq_printf(m, "duplex_mode\t0x%x\n", duplex_mode);
-        seq_printf(m, "autoneg_mode\t0x%x\n", autoneg_mode);
-        seq_printf(m, "advertising_mode\t0x%x\n", advertising_mode);
-        seq_printf(m, "aspm\t0x%x\n", aspm);
-        seq_printf(m, "s5wol\t0x%x\n", s5wol);
-        seq_printf(m, "s5_keep_curr_mac\t0x%x\n", s5_keep_curr_mac);
-        seq_printf(m, "eee_enable\t0x%x\n", tp->eee.eee_enabled);
-        seq_printf(m, "hwoptimize\t0x%lx\n", hwoptimize);
-        seq_printf(m, "proc_init_num\t0x%x\n", proc_init_num);
-        seq_printf(m, "s0_magic_packet\t0x%x\n", s0_magic_packet);
-        seq_printf(m, "disable_wol_support\t0x%x\n", disable_wol_support);
-        seq_printf(m, "HwSuppMagicPktVer\t0x%x\n", tp->HwSuppMagicPktVer);
-        seq_printf(m, "HwSuppUpsVer\t0x%x\n", tp->HwSuppUpsVer);
-        seq_printf(m, "HwSuppEsdVer\t0x%x\n", tp->HwSuppEsdVer);
-        seq_printf(m, "HwSuppCheckPhyDisableModeVer\t0x%x\n", tp->HwSuppCheckPhyDisableModeVer);
-        seq_printf(m, "HwPkgDet\t0x%x\n", tp->HwPkgDet);
-        seq_printf(m, "InitRxDescType\t0x%x\n", tp->InitRxDescType);
-        seq_printf(m, "RxDescLength\t0x%x\n", tp->RxDescLength);
-        seq_printf(m, "num_rx_rings\t0x%x\n", tp->num_rx_rings);
-        seq_printf(m, "num_tx_rings\t0x%x\n", tp->num_tx_rings);
-        seq_printf(m, "tot_rx_rings\t0x%x\n", rtl8168_tot_rx_rings(tp));
-        seq_printf(m, "tot_tx_rings\t0x%x\n", rtl8168_tot_tx_rings(tp));
-        seq_printf(m, "HwSuppNumTxQueues\t0x%x\n", tp->HwSuppNumTxQueues);
-        seq_printf(m, "HwSuppNumRxQueues\t0x%x\n", tp->HwSuppNumRxQueues);
-        seq_printf(m, "num_hw_tot_en_rx_rings\t0x%x\n", tp->num_hw_tot_en_rx_rings);
-        seq_printf(m, "EnableRss\t0x%x\n", tp->EnableRss);
-        seq_printf(m, "min_irq_nvecs\t0x%x\n", tp->min_irq_nvecs);
-        seq_printf(m, "max_irq_nvecs\t0x%x\n", tp->max_irq_nvecs);
-        seq_printf(m, "irq_nvecs\t0x%x\n", tp->irq_nvecs);
-        seq_printf(m, "hw_supp_irq_nvecs\t0x%x\n", tp->hw_supp_irq_nvecs);
-        seq_printf(m, "ring_lib_enabled\t0x%x\n", tp->ring_lib_enabled);
-        seq_printf(m, "random_mac\t0x%x\n", tp->random_mac);
-        seq_printf(m, "org_mac_addr\t%pM\n", tp->org_mac_addr);
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
-        seq_printf(m, "perm_addr\t%pM\n", dev->perm_addr);
-#endif
-        seq_printf(m, "dev_addr\t%pM\n", dev->dev_addr);
-
-        rtnl_unlock();
-
-        seq_putc(m, '\n');
-        return 0;
-}
-
-static int proc_get_tally_counter(struct seq_file *m, void *v)
-{
-        struct net_device *dev = m->private;
-        struct rtl8168_private *tp = netdev_priv(dev);
-        struct rtl8168_counters *counters;
-        dma_addr_t paddr;
-
-        seq_puts(m, "\nDump Tally Counter\n");
-
-        rtnl_lock();
-
-        counters = tp->tally_vaddr;
-        paddr = tp->tally_paddr;
-        if (!counters) {
-                seq_puts(m, "\nDump Tally Counter Fail\n");
-                goto out_unlock;
-        }
-
-        rtl8168_dump_tally_counter(tp, paddr);
-
-        seq_puts(m, "Statistics\tValue\n----------\t-----\n");
-        seq_printf(m, "tx_packets\t%lld\n", le64_to_cpu(counters->tx_packets));
-        seq_printf(m, "rx_packets\t%lld\n", le64_to_cpu(counters->rx_packets));
-        seq_printf(m, "tx_errors\t%lld\n", le64_to_cpu(counters->tx_errors));
-        seq_printf(m, "rx_errors\t%d\n", le32_to_cpu(counters->rx_errors));
-        seq_printf(m, "rx_missed\t%d\n", le16_to_cpu(counters->rx_missed));
-        seq_printf(m, "align_errors\t%d\n", le16_to_cpu(counters->align_errors));
-        seq_printf(m, "tx_one_collision\t%d\n", le32_to_cpu(counters->tx_one_collision));
-        seq_printf(m, "tx_multi_collision\t%d\n", le32_to_cpu(counters->tx_multi_collision));
-        seq_printf(m, "rx_unicast\t%lld\n", le64_to_cpu(counters->rx_unicast));
-        seq_printf(m, "rx_broadcast\t%lld\n", le64_to_cpu(counters->rx_broadcast));
-        seq_printf(m, "rx_multicast\t%d\n", le32_to_cpu(counters->rx_multicast));
-        seq_printf(m, "tx_aborted\t%d\n", le16_to_cpu(counters->tx_aborted));
-        seq_printf(m, "tx_underrun\t%d\n", le16_to_cpu(counters->tx_underrun));
-
-out_unlock:
-        rtnl_unlock();
-
-        seq_putc(m, '\n');
-        return 0;
-}
-
-static int proc_get_registers(struct seq_file *m, void *v)
-{
-        struct net_device *dev = m->private;
-        int i, n, max = R8168_MAC_REGS_SIZE;
-        u8 byte_rd;
-        struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
-
-        seq_puts(m, "\nDump MAC Registers\n");
-        seq_puts(m, "Offset\tValue\n------\t-----\n");
-
-        rtnl_lock();
-
-        for (n = 0; n < max;) {
-                seq_printf(m, "\n0x%02x:\t", n);
-
-                for (i = 0; i < 16 && n < max; i++, n++) {
-                        byte_rd = readb(ioaddr + n);
-                        seq_printf(m, "%02x ", byte_rd);
-                }
-        }
-
-        rtnl_unlock();
-
-        seq_putc(m, '\n');
-        return 0;
-}
-
-static int proc_get_pcie_phy(struct seq_file *m, void *v)
-{
-        struct net_device *dev = m->private;
-        int i, n, max = R8168_EPHY_REGS_SIZE/2;
-        u16 word_rd;
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        seq_puts(m, "\nDump PCIE PHY\n");
-        seq_puts(m, "\nOffset\tValue\n------\t-----\n ");
-
-        rtnl_lock();
-
-        for (n = 0; n < max;) {
-                seq_printf(m, "\n0x%02x:\t", n);
-
-                for (i = 0; i < 8 && n < max; i++, n++) {
-                        word_rd = rtl8168_ephy_read(tp, n);
-                        seq_printf(m, "%04x ", word_rd);
-                }
-        }
-
-        rtnl_unlock();
-
-        seq_putc(m, '\n');
-        return 0;
-}
-
-static int proc_get_eth_phy(struct seq_file *m, void *v)
-{
-        struct net_device *dev = m->private;
-        int i, n, max = R8168_PHY_REGS_SIZE/2;
-        u16 word_rd;
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        seq_puts(m, "\nDump Ethernet PHY\n");
-        seq_puts(m, "\nOffset\tValue\n------\t-----\n ");
-
-        rtnl_lock();
-
-        seq_puts(m, "\n####################page 0##################\n ");
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        for (n = 0; n < max;) {
-                seq_printf(m, "\n0x%02x:\t", n);
-
-                for (i = 0; i < 8 && n < max; i++, n++) {
-                        word_rd = rtl8168_mdio_read(tp, n);
-                        seq_printf(m, "%04x ", word_rd);
-                }
-        }
-
-        rtnl_unlock();
-
-        seq_putc(m, '\n');
-        return 0;
-}
-
-static int proc_get_extended_registers(struct seq_file *m, void *v)
-{
-        struct net_device *dev = m->private;
-        int i, n, max = R8168_ERI_REGS_SIZE;
-        u32 dword_rd;
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_1:
-        case CFG_METHOD_2:
-        case CFG_METHOD_3:
-                /* RTL8168B does not support Extend GMAC */
-                seq_puts(m, "\nNot Support Dump Extended Registers\n");
-                return 0;
-        }
-
-        seq_puts(m, "\nDump Extended Registers\n");
-        seq_puts(m, "\nOffset\tValue\n------\t-----\n ");
-
-        rtnl_lock();
-
-        for (n = 0; n < max;) {
-                seq_printf(m, "\n0x%02x:\t", n);
-
-                for (i = 0; i < 4 && n < max; i++, n+=4) {
-                        dword_rd = rtl8168_eri_read(tp, n, 4, ERIAR_ExGMAC);
-                        seq_printf(m, "%08x ", dword_rd);
-                }
-        }
-
-        rtnl_unlock();
-
-        seq_putc(m, '\n');
-        return 0;
-}
-
-static int proc_get_pci_registers(struct seq_file *m, void *v)
-{
-        struct net_device *dev = m->private;
-        int i, n, max = R8168_PCI_REGS_SIZE;
-        u32 dword_rd;
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        seq_puts(m, "\nDump PCI Registers\n");
-        seq_puts(m, "\nOffset\tValue\n------\t-----\n ");
-
-        rtnl_lock();
-
-        for (n = 0; n < max;) {
-                seq_printf(m, "\n0x%03x:\t", n);
-
-                for (i = 0; i < 4 && n < max; i++, n+=4) {
-                        pci_read_config_dword(tp->pci_dev, n, &dword_rd);
-                        seq_printf(m, "%08x ", dword_rd);
-                }
-        }
-
-        n = 0x110;
-        pci_read_config_dword(tp->pci_dev, n, &dword_rd);
-        seq_printf(m, "\n0x%03x:\t%08x ", n, dword_rd);
-        n = 0x70c;
-        pci_read_config_dword(tp->pci_dev, n, &dword_rd);
-        seq_printf(m, "\n0x%03x:\t%08x ", n, dword_rd);
-
-        rtnl_unlock();
-
-        seq_putc(m, '\n');
-        return 0;
-}
-
-static int proc_get_cable_info(struct seq_file *m, void *v)
-{
-        int i;
-        u16 status;
-        int cp_status[RTL8168_CP_NUM] = {0};
-        u16 cp_len[RTL8168_CP_NUM] = {0};
-        struct net_device *dev = m->private;
-        struct rtl8168_private *tp = netdev_priv(dev);
-        const char *pair_str[RTL8168_CP_NUM] = {"1-2", "3-6", "4-5", "7-8"};
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_30:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                /* support */
-                break;
-        default:
-                return -EOPNOTSUPP;
-        }
-
-        rtnl_lock();
-
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        if (rtl8168_mdio_read(tp, MII_BMCR) & BMCR_PDOWN) {
-                rtnl_unlock();
-                return -EIO;
-        }
-
-        status = RTL_R8(tp, PHYstatus);
-        if (status & LinkStatus)
-                seq_printf(m, "\nlink speed:%d",
-                           rtl8168_convert_link_speed(status));
-        else
-                seq_puts(m, "\nlink status:off");
-
-        rtl8168_get_cp_len(tp, cp_len);
-
-        rtl8168_vcd_test(tp);
-
-        rtl8168_get_cp_status(tp, cp_status);
-
-        seq_puts(m, "\npair\tlength\tstatus   \tpp\n");
-
-        for (i =0; i<RTL8168_CP_NUM; i++) {
-                seq_printf(m, "%s\t%d\t%s\t",
-                           pair_str[i], cp_len[i],
-                           rtl8168_get_cp_status_string(cp_status[i]));
-                if (cp_status[i] == rtl8168_cp_normal)
-                        seq_printf(m, "none\n");
-                else
-                        seq_printf(m, "%dm\n", rtl8168_get_cp_pp(tp, i));
-        }
-
-        tp->phy_reset_enable(dev);
-
-        rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
-
-        rtnl_unlock();
-
-        seq_putc(m, '\n');
-        return 0;
-}
-
-static int proc_dump_rx_desc(struct seq_file *m, void *v)
-{
-        int i;
-        u32 *pdword;
-        struct net_device *dev = m->private;
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        if (!tp->RxDescArray)
-                return -EOPNOTSUPP;
-
-        rtnl_lock();
-
-        seq_printf(m, "\ndump rx desc:%d\n", tp->num_rx_desc);
-
-        pdword = (u32*)tp->RxDescArray;
-        for (i=0; i<(tp->RxDescAllocSize/4); i++) {
-                if (!(i % 4))
-                        seq_printf(m, "\n%04x ", i);
-                seq_printf(m, "%08x ", pdword[i]);
-        }
-
-        rtnl_unlock();
-
-        seq_putc(m, '\n');
-        return 0;
-}
-
-static int proc_dump_rx_desc_2(struct seq_file *m, void *v)
-{
-        int i, j, k;
-        u32 *pdword;
-        struct net_device *dev = m->private;
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        if (!tp->RxDescArray)
-                return -EOPNOTSUPP;
-
-        rtnl_lock();
-
-        for (k=0; k<tp->num_hw_tot_en_rx_rings; k++) {
-                seq_printf(m, "\ndump Q%d rx desc:%d\n", k, tp->num_rx_desc);
-                for (j=0; j<tp->num_rx_desc; j++) {
-                        pdword = (u32*)rtl8168_get_rxdesc(tp,
-                                                          tp->RxDescArray,
-                                                          j, k);
-                        for (i=0; i<(tp->RxDescLength/4); i++) {
-                                if (!(i % 4))
-                                        seq_printf(m, "\n%04llx ",
-                                                   ((u64)pdword + (i * 4) -
-                                                    (u64)tp->RxDescArray));
-                                seq_printf(m, "%08x ", pdword[i]);
-                        }
-                }
-
-                seq_putc(m, '\n');
-        }
-
-        rtnl_unlock();
-
-        seq_putc(m, '\n');
-        return 0;
-}
-
-void _proc_dump_tx_desc(struct seq_file *m, struct TxDesc *desc_base,
-                        u32 alloc_size, u32 num_desc)
-{
-        int i;
-        u32 *pdword;
-
-        if (desc_base == NULL ||
-            alloc_size == 0 ||
-            num_desc == 0)
-                return;
-
-        pdword = (u32*)desc_base;
-        for (i=0; i<(alloc_size/4); i++) {
-                if (!(i % 4))
-                        seq_printf(m, "\n%04x ", i);
-                seq_printf(m, "%08x ", pdword[i]);
-        }
-
-        seq_putc(m, '\n');
-        return;
-}
-
-static int proc_dump_tx_desc(struct seq_file *m, void *v)
-{
-        int i;
-        struct net_device *dev = m->private;
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        rtnl_lock();
-
-        for (i=0; i<tp->HwSuppNumTxQueues; i++) {
-                struct rtl8168_tx_ring *ring = &tp->tx_ring[i];
-                if (!ring->TxDescArray)
-                        continue;
-                seq_printf(m, "\ndump Q%d tx desc:%d\n", i, ring->num_tx_desc);
-                _proc_dump_tx_desc(m, ring->TxDescArray,
-                                   ring->TxDescAllocSize,
-                                   ring->num_tx_desc);
-        }
-
-#ifdef ENABLE_LIB_SUPPORT
-        for (i=0; i<tp->HwSuppNumTxQueues; i++) {
-                struct rtl8168_ring *ring = &tp->lib_tx_ring[i];
-                if (!ring->desc_addr)
-                        continue;
-                seq_printf(m, "\ndump lib Q%d tx desc:%d\n", i, ring->ring_size);
-                _proc_dump_tx_desc(m, ring->desc_addr,
-                                   ring->desc_size,
-                                   ring->ring_size);
-        }
-#endif //ENABLE_LIB_SUPPORT
-
-        rtnl_unlock();
-
-        seq_putc(m, '\n');
-        return 0;
-}
-
-static int proc_dump_msix_tbl(struct seq_file *m, void *v)
-{
-        int i, j;
-        struct net_device *dev = m->private;
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_1 ... CFG_METHOD_8:
-                return -EOPNOTSUPP;
-        default:
-                break;
-        }
-
-        rtnl_lock();
-
-        seq_printf(m, "\ndump MSI-X Table. Total Entry %d. \n",
-                   tp->hw_supp_irq_nvecs);
-
-        for (i=0; i<tp->hw_supp_irq_nvecs; i++) {
-                seq_printf(m, "\n%04x ", i);
-                for (j=0; j<4; j++)
-                        seq_printf(m, "%08x ",
-                                   rtl8168_eri_read(
-                                           tp, i*0x10 + 4 * j, 4,
-                                           ERIAR_MSIX));
-        }
-
-        rtnl_unlock();
-
-        seq_putc(m, '\n');
-        return 0;
-}
-#else
-
-static int proc_get_driver_variable(char *page, char **start,
-                                    off_t offset, int count,
-                                    int *eof, void *data)
-{
-        struct net_device *dev = data;
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int len = 0;
-
-        len += snprintf(page + len, count - len,
-                        "\nDump Driver Driver\n");
-
-        rtnl_lock();
-
-        len += snprintf(page + len, count - len,
-                        "Variable\tValue\n----------\t-----\n");
-
-        len += snprintf(page + len, count - len,
-                        "MODULENAME\t%s\n"
-                        "driver version\t%s\n"
-                        "chipset\t%d\n"
-                        "chipset_name\t%s\n"
-                        "mtu\t%d\n"
-                        "num_rx_desc\t0x%x\n"
-                        "cur_rx0\t0x%x\n"
-                        "dirty_rx0\t0x%x\n"
-                        "rdu0\t0x%x\n"
-                        "cur_rx1\t0x%x\n"
-                        "dirty_rx1\t0x%x\n"
-                        "rdu1\t0x%x\n"
-                        "cur_rx2\t0x%x\n"
-                        "dirty_rx2\t0x%x\n"
-                        "rdu2\t0x%x\n"
-                        "cur_rx3\t0x%x\n"
-                        "dirty_rx3\t0x%x\n"
-                        "rdu3\t0x%x\n"
-                        "rx_fifo_of\t0x%x\n"
-                        "num_tx_desc\t0x%x\n"
-                        "cur_tx0\t0x%x\n"
-                        "dirty_tx0\t0x%x\n"
-                        "tdu0\t0x%x\n"
-                        "cur_tx1\t0x%x\n"
-                        "dirty_tx1\t0x%x\n"
-                        "tdu0\t1x%x\n"
-                        "rx_buf_sz\t0x%x\n"
-                        "esd_flag\t0x%x\n"
-                        "pci_cfg_is_read\t0x%x\n"
-                        "rtl8168_rx_config\t0x%x\n"
-                        "cp_cmd\t0x%x\n"
-                        "intr_mask\t0x%x\n"
-                        "timer_intr_mask\t0x%x\n"
-                        "wol_enabled\t0x%x\n"
-                        "wol_opts\t0x%x\n"
-                        "efuse_ver\t0x%x\n"
-                        "eeprom_type\t0x%x\n"
-                        "autoneg\t0x%x\n"
-                        "duplex\t0x%x\n"
-                        "speed\t%d\n"
-                        "advertising\t0x%x\n"
-                        "eeprom_len\t0x%x\n"
-                        "cur_page\t0x%x\n"
-                        "bios_setting\t0x%x\n"
-                        "features\t0x%x\n"
-                        "org_pci_offset_99\t0x%x\n"
-                        "org_pci_offset_180\t0x%x\n"
-                        "issue_offset_99_event\t0x%x\n"
-                        "org_pci_offset_80\t0x%x\n"
-                        "org_pci_offset_81\t0x%x\n"
-                        "use_timer_interrrupt\t0x%x\n"
-                        "HwIcVerUnknown\t0x%x\n"
-                        "NotWrRamCodeToMicroP\t0x%x\n"
-                        "NotWrMcuPatchCode\t0x%x\n"
-                        "HwHasWrRamCodeToMicroP\t0x%x\n"
-                        "sw_ram_code_ver\t0x%x\n"
-                        "hw_ram_code_ver\t0x%x\n"
-                        "rtk_enable_diag\t0x%x\n"
-                        "ShortPacketSwChecksum\t0x%x\n"
-                        "UseSwPaddingShortPkt\t0x%x\n"
-                        "RequireAdcBiasPatch\t0x%x\n"
-                        "AdcBiasPatchIoffset\t0x%x\n"
-                        "RequireAdjustUpsTxLinkPulseTiming\t0x%x\n"
-                        "SwrCnt1msIni\t0x%x\n"
-                        "HwSuppNowIsOobVer\t0x%x\n"
-                        "HwFiberModeVer\t0x%x\n"
-                        "HwFiberStat\t0x%x\n"
-                        "HwSwitchMdiToFiber\t0x%x\n"
-                        "HwSuppSerDesPhyVer\t0x%x\n"
-                        "NicCustLedValue\t0x%x\n"
-                        "RequiredSecLanDonglePatch\t0x%x\n"
-                        "HwSuppDashVer\t0x%x\n"
-                        "DASH\t0x%x\n"
-                        "dash_printer_enabled\t0x%x\n"
-                        "HwSuppKCPOffloadVer\t0x%x\n"
-                        "speed_mode\t0x%x\n"
-                        "duplex_mode\t0x%x\n"
-                        "autoneg_mode\t0x%x\n"
-                        "advertising_mode\t0x%x\n"
-                        "aspm\t0x%x\n"
-                        "s5wol\t0x%x\n"
-                        "s5_keep_curr_mac\t0x%x\n"
-                        "eee_enable\t0x%x\n"
-                        "hwoptimize\t0x%lx\n"
-                        "proc_init_num\t0x%x\n"
-                        "s0_magic_packet\t0x%x\n"
-                        "disable_wol_support\t0x%x\n"
-                        "HwSuppMagicPktVer\t0x%x\n"
-                        "HwSuppUpsVer\t0x%x\n"
-                        "HwSuppEsdVer\t0x%x\n"
-                        "HwSuppCheckPhyDisableModeVer\t0x%x\n"
-                        "HwPkgDet\t0x%x\n"
-                        "InitRxDescType\t0x%x\n"
-                        "RxDescLength\t0x%x\n"
-                        "num_rx_rings\t0x%x\n"
-                        "num_tx_rings\t0x%x\n"
-                        "tot_rx_rings\t0x%x\n"
-                        "tot_tx_rings\t0x%x\n"
-                        "tot_rx_desc_rings\t0x%x\n"
-                        "HwSuppNumTxQueues\t0x%x\n"
-                        "HwSuppNumRxQueues\t0x%x\n"
-                        "num_hw_tot_en_rx_rings\t0x%x\n"
-                        "EnableRss\t0x%x\n"
-                        "min_irq_nvecs\t0x%x\n"
-                        "max_irq_nvecs\t0x%x\n"
-                        "irq_nvecs\t0x%x\n"
-                        "hw_supp_irq_nvecs\t0x%x\n"
-                        "ring_lib_enabled\t0x%x\n"
-                        "random_mac\t0x%x\n"
-                        "org_mac_addr\t%pM\n"
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
-                        "perm_addr\t%pM\n"
-#endif
-                        "dev_addr\t%pM\n",
-                        MODULENAME,
-                        RTL8168_VERSION,
-                        tp->chipset,
-                        rtl_chip_info[tp->chipset].name,
-                        dev->mtu,
-                        tp->num_rx_desc,
-                        tp->rx_ring[0].cur_rx,
-                        tp->rx_ring[0].dirty_rx,
-                        tp->rx_ring[0].rdu,
-                        tp->rx_ring[1].cur_rx,
-                        tp->rx_ring[1].dirty_rx,
-                        tp->rx_ring[1].rdu,
-                        tp->rx_ring[2].cur_rx,
-                        tp->rx_ring[2].dirty_rx,
-                        tp->rx_ring[2].rdu,
-                        tp->rx_ring[3].cur_rx,
-                        tp->rx_ring[3].dirty_rx,
-                        tp->rx_ring[3].rdu,
-                        tp->rx_fifo_of,
-                        tp->tx_ring[0].num_tx_desc,
-                        tp->tx_ring[0].cur_tx,
-                        tp->tx_ring[0].dirty_tx,
-                        tp->tx_ring[0].tdu,
-                        tp->tx_ring[1].cur_tx,
-                        tp->tx_ring[1].dirty_tx,
-                        tp->tx_ring[1].tdu,
-                        tp->rx_buf_sz,
-                        tp->esd_flag,
-                        tp->pci_cfg_is_read,
-                        tp->rtl8168_rx_config,
-                        tp->cp_cmd,
-                        tp->intr_mask,
-                        tp->timer_intr_mask,
-                        tp->wol_enabled,
-                        tp->wol_opts,
-                        tp->efuse_ver,
-                        tp->eeprom_type,
-                        tp->autoneg,
-                        tp->duplex,
-                        tp->speed,
-                        tp->advertising,
-                        tp->eeprom_len,
-                        tp->cur_page,
-                        tp->bios_setting,
-                        tp->features,
-                        tp->org_pci_offset_99,
-                        tp->org_pci_offset_180,
-                        tp->issue_offset_99_event,
-                        tp->org_pci_offset_80,
-                        tp->org_pci_offset_81,
-                        tp->use_timer_interrrupt,
-                        tp->HwIcVerUnknown,
-                        tp->NotWrRamCodeToMicroP,
-                        tp->NotWrMcuPatchCode,
-                        tp->HwHasWrRamCodeToMicroP,
-                        tp->sw_ram_code_ver,
-                        tp->hw_ram_code_ver,
-                        tp->rtk_enable_diag,
-                        tp->ShortPacketSwChecksum,
-                        tp->UseSwPaddingShortPkt,
-                        tp->RequireAdcBiasPatch,
-                        tp->AdcBiasPatchIoffset,
-                        tp->RequireAdjustUpsTxLinkPulseTiming,
-                        tp->SwrCnt1msIni,
-                        tp->HwSuppNowIsOobVer,
-                        tp->HwFiberModeVer,
-                        tp->HwFiberStat,
-                        tp->HwSwitchMdiToFiber,
-                        tp->HwSuppSerDesPhyVer,
-                        tp->NicCustLedValue,
-                        tp->RequiredSecLanDonglePatch,
-                        tp->HwSuppDashVer,
-                        tp->DASH,
-                        tp->dash_printer_enabled,
-                        tp->HwSuppKCPOffloadVer,
-                        speed_mode,
-                        duplex_mode,
-                        autoneg_mode,
-                        advertising_mode,
-                        aspm,
-                        s5wol,
-                        s5_keep_curr_mac,
-                        tp->eee.eee_enabled,
-                        hwoptimize,
-                        proc_init_num,
-                        s0_magic_packet,
-                        disable_wol_support,
-                        tp->HwSuppMagicPktVer,
-                        tp->HwSuppUpsVer,
-                        tp->HwSuppEsdVer,
-                        tp->HwSuppCheckPhyDisableModeVer,
-                        tp->HwPkgDet,
-                        tp->InitRxDescType,
-                        tp->RxDescLength,
-                        tp->num_rx_rings,
-                        tp->num_tx_rings,
-                        rtl8168_tot_rx_rings(tp),
-                        rtl8168_tot_tx_rings(tp),
-                        tp->HwSuppNumTxQueues,
-                        tp->HwSuppNumRxQueues,
-                        tp->num_hw_tot_en_rx_rings,
-                        tp->EnableRss,
-                        tp->min_irq_nvecs,
-                        tp->max_irq_nvecs,
-                        tp->irq_nvecs,
-                        tp->hw_supp_irq_nvecs,
-                        tp->ring_lib_enabled,
-                        tp->random_mac,
-                        tp->org_mac_addr,
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
-                        dev->perm_addr,
-#endif
-                        dev->dev_addr
-                       );
-
-        rtnl_unlock();
-
-        len += snprintf(page + len, count - len, "\n");
-
-        *eof = 1;
-        return len;
-}
-
-static int proc_get_tally_counter(char *page, char **start,
-                                  off_t offset, int count,
-                                  int *eof, void *data)
-{
-        struct net_device *dev = data;
-        struct rtl8168_private *tp = netdev_priv(dev);
-        struct rtl8168_counters *counters;
-        dma_addr_t paddr;
-        u32 cmd;
-        u32 WaitCnt;
-        int len = 0;
-
-        len += snprintf(page + len, count - len,
-                        "\nDump Tally Counter\n");
-
-        rtnl_lock();
-
-        counters = tp->tally_vaddr;
-        paddr = tp->tally_paddr;
-        if (!counters) {
-                len += snprintf(page + len, count - len,
-                                "\nDump Tally Counter Fail\n");
-                goto out_unlock;
-        }
-
-        rtl8168_dump_tally_counter(tp, paddr);
-
-        len += snprintf(page + len, count - len,
-                        "Statistics\tValue\n----------\t-----\n");
-
-        len += snprintf(page + len, count - len,
-                        "tx_packets\t%lld\n"
-                        "rx_packets\t%lld\n"
-                        "tx_errors\t%lld\n"
-                        "rx_errors\t%d\n"
-                        "rx_missed\t%d\n"
-                        "align_errors\t%d\n"
-                        "tx_one_collision\t%d\n"
-                        "tx_multi_collision\t%d\n"
-                        "rx_unicast\t%lld\n"
-                        "rx_broadcast\t%lld\n"
-                        "rx_multicast\t%d\n"
-                        "tx_aborted\t%d\n"
-                        "tx_underrun\t%d\n",
-                        le64_to_cpu(counters->tx_packets),
-                        le64_to_cpu(counters->rx_packets),
-                        le64_to_cpu(counters->tx_errors),
-                        le32_to_cpu(counters->rx_errors),
-                        le16_to_cpu(counters->rx_missed),
-                        le16_to_cpu(counters->align_errors),
-                        le32_to_cpu(counters->tx_one_collision),
-                        le32_to_cpu(counters->tx_multi_collision),
-                        le64_to_cpu(counters->rx_unicast),
-                        le64_to_cpu(counters->rx_broadcast),
-                        le32_to_cpu(counters->rx_multicast),
-                        le16_to_cpu(counters->tx_aborted),
-                        le16_to_cpu(counters->tx_underrun)
-                       );
-
-        len += snprintf(page + len, count - len, "\n");
-out_unlock:
-        rtnl_unlock();
-
-        *eof = 1;
-        return len;
-}
-
-static int proc_get_registers(char *page, char **start,
-                              off_t offset, int count,
-                              int *eof, void *data)
-{
-        struct net_device *dev = data;
-        int i, n, max = R8168_MAC_REGS_SIZE;
-        u8 byte_rd;
-        struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
-        int len = 0;
-
-        len += snprintf(page + len, count - len,
-                        "\nDump MAC Registers\n"
-                        "Offset\tValue\n------\t-----\n");
-
-        rtnl_lock();
-
-        for (n = 0; n < max;) {
-                len += snprintf(page + len, count - len,
-                                "\n0x%02x:\t",
-                                n);
-
-                for (i = 0; i < 16 && n < max; i++, n++) {
-                        byte_rd = readb(ioaddr + n);
-                        len += snprintf(page + len, count - len,
-                                        "%02x ",
-                                        byte_rd);
-                }
-        }
-
-        rtnl_unlock();
-
-        len += snprintf(page + len, count - len, "\n");
-
-        *eof = 1;
-        return len;
-}
-
-static int proc_get_pcie_phy(char *page, char **start,
-                             off_t offset, int count,
-                             int *eof, void *data)
-{
-        struct net_device *dev = data;
-        int i, n, max = R8168_EPHY_REGS_SIZE/2;
-        u16 word_rd;
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int len = 0;
-
-        len += snprintf(page + len, count - len,
-                        "\nDump PCIE PHY\n"
-                        "Offset\tValue\n------\t-----\n");
-
-        rtnl_lock();
-
-        for (n = 0; n < max;) {
-                len += snprintf(page + len, count - len,
-                                "\n0x%02x:\t",
-                                n);
-
-                for (i = 0; i < 8 && n < max; i++, n++) {
-                        word_rd = rtl8168_ephy_read(tp, n);
-                        len += snprintf(page + len, count - len,
-                                        "%04x ",
-                                        word_rd);
-                }
-        }
-
-        rtnl_unlock();
-
-        len += snprintf(page + len, count - len, "\n");
-
-        *eof = 1;
-        return len;
-}
-
-static int proc_get_eth_phy(char *page, char **start,
-                            off_t offset, int count,
-                            int *eof, void *data)
-{
-        struct net_device *dev = data;
-        int i, n, max = R8168_PHY_REGS_SIZE/2;
-        u16 word_rd;
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int len = 0;
-
-        len += snprintf(page + len, count - len,
-                        "\nDump Ethernet PHY\n"
-                        "Offset\tValue\n------\t-----\n");
-
-        rtnl_lock();
-
-        len += snprintf(page + len, count - len,
-                        "\n####################page 0##################\n");
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        for (n = 0; n < max;) {
-                len += snprintf(page + len, count - len,
-                                "\n0x%02x:\t",
-                                n);
-
-                for (i = 0; i < 8 && n < max; i++, n++) {
-                        word_rd = rtl8168_mdio_read(tp, n);
-                        len += snprintf(page + len, count - len,
-                                        "%04x ",
-                                        word_rd);
-                }
-        }
-
-        rtnl_unlock();
-
-        len += snprintf(page + len, count - len, "\n");
-
-        *eof = 1;
-        return len;
-}
-
-static int proc_get_extended_registers(char *page, char **start,
-                                       off_t offset, int count,
-                                       int *eof, void *data)
-{
-        struct net_device *dev = data;
-        int i, n, max = R8168_ERI_REGS_SIZE;
-        u32 dword_rd;
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int len = 0;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_1:
-        case CFG_METHOD_2:
-        case CFG_METHOD_3:
-                /* RTL8168B does not support Extend GMAC */
-                len += snprintf(page + len, count - len,
-                                "\nNot Support Dump Extended Registers\n");
-
-                goto out;
-        }
-
-        len += snprintf(page + len, count - len,
-                        "\nDump Extended Registers\n"
-                        "Offset\tValue\n------\t-----\n");
-
-        rtnl_lock();
-
-        for (n = 0; n < max;) {
-                len += snprintf(page + len, count - len,
-                                "\n0x%02x:\t",
-                                n);
-
-                for (i = 0; i < 4 && n < max; i++, n+=4) {
-                        dword_rd = rtl8168_eri_read(tp, n, 4, ERIAR_ExGMAC);
-                        len += snprintf(page + len, count - len,
-                                        "%08x ",
-                                        dword_rd);
-                }
-        }
-
-        rtnl_unlock();
-
-        len += snprintf(page + len, count - len, "\n");
-out:
-        *eof = 1;
-        return len;
-}
-
-static int proc_get_pci_registers(char *page, char **start,
-                                  off_t offset, int count,
-                                  int *eof, void *data)
-{
-        struct net_device *dev = data;
-        int i, n, max = R8168_PCI_REGS_SIZE;
-        u32 dword_rd;
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int len = 0;
-
-        len += snprintf(page + len, count - len,
-                        "\nDump PCI Registers\n"
-                        "Offset\tValue\n------\t-----\n");
-
-        rtnl_lock();
-
-        for (n = 0; n < max;) {
-                len += snprintf(page + len, count - len,
-                                "\n0x%03x:\t",
-                                n);
-
-                for (i = 0; i < 4 && n < max; i++, n+=4) {
-                        pci_read_config_dword(tp->pci_dev, n, &dword_rd);
-                        len += snprintf(page + len, count - len,
-                                        "%08x ",
-                                        dword_rd);
-                }
-        }
-
-        n = 0x110;
-        pci_read_config_dword(tp->pci_dev, n, &dword_rd);
-        len += snprintf(page + len, count - len,
-                        "\n0x%03x:\t%08x ",
-                        n,
-                        dword_rd);
-        n = 0x70c;
-        pci_read_config_dword(tp->pci_dev, n, &dword_rd);
-        len += snprintf(page + len, count - len,
-                        "\n0x%03x:\t%08x ",
-                        n,
-                        dword_rd);
-
-        rtnl_unlock();
-
-        len += snprintf(page + len, count - len, "\n");
-
-        *eof = 1;
-        return len;
-}
-
-static int proc_get_cable_info(char *page, char **start,
-                               off_t offset, int count,
-                               int *eof, void *data)
-{
-        int i;
-        u16 status;
-        int len = 0;
-        struct net_device *dev = data;
-        int cp_status[RTL8168_CP_NUM] = {0};
-        u16 cp_len[RTL8168_CP_NUM] = {0};
-        struct rtl8168_private *tp = netdev_priv(dev);
-        const char *pair_str[RTL8168_CP_NUM] = {"1-2", "3-6", "4-5", "7-8"};
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_30:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                /* support */
-                break;
-        default:
-                return -EOPNOTSUPP;
-        }
-
-        rtnl_lock();
-
-        status = RTL_R8(tp, PHYstatus);
-        if (status & LinkStatus)
-                len += snprintf(page + len, count - len,
-                                "\nlink speed:%d",
-                                rtl8168_convert_link_speed(status));
-        else
-                len += snprintf(page + len, count - len,
-                                "\nlink status:off");
-
-        rtl8168_get_cp(tp, cp_len, cp_status);
-
-        len += snprintf(page + len, count - len,
-                        "\npair\tlength\tstatus   \tpp\n");
-
-        for (i =0; i<RTL8168_CP_NUM; i++) {
-                len += snprintf(page + len, count - len,
-                                "%s\t%d\t%s\t",
-                                pair_str[i], cp_len[i],
-                                rtl8168_get_cp_status_string(cp_status[i]));
-                if (cp_status[i] == rtl8168_cp_normal)
-                        len += snprintf(page + len, count - len, "none\n");
-                else
-                        len += snprintf(page + len, count - len, "%dm\n",
-                                        rtl8168_get_cp_pp(tp, i));
-        }
-
-        rtnl_unlock();
-
-        len += snprintf(page + len, count - len, "\n");
-
-        *eof = 1;
-        return len;
-}
-
-static int proc_dump_rx_desc(char *page, char **start,
-                             off_t offset, int count,
-                             int *eof, void *data)
-{
-        int i;
-        int len = 0;
-        u32 *pdword;
-        struct net_device *dev = data;
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        if (!tp->RxDescArray)
-                return -EOPNOTSUPP;
-
-        rtnl_lock();
-
-        len += snprintf(page + len, count - len,
-                        "\ndump rx desc:%d",
-                        tp->num_rx_desc);
-
-        pdword = (u32*)tp->RxDescArray;
-        for (i=0; i<(tp->RxDescAllocSize/4); i++) {
-                if (!(i % 4))
-                        len += snprintf(page + len, count - len,
-                                        "\n%04x ",
-                                        i);
-                len += snprintf(page + len, count - len,
-                                "%08x ",
-                                pdword[i]);
-        }
-
-        rtnl_unlock();
-
-        len += snprintf(page + len, count - len, "\n");
-
-        *eof = 1;
-
-        return len;
-}
-
-static int proc_dump_rx_desc_2(char *page, char **start,
-                               off_t offset, int count,
-                               int *eof, void *data)
-{
-        int i, j, k;
-        int len = 0;
-        u32 *pdword;
-        struct net_device *dev = data;
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        if (!tp->RxDescArray)
-                return -EOPNOTSUPP;
-
-        rtnl_lock();
-
-        for (k=0; k<tp->num_hw_tot_en_rx_rings; k++) {
-                len += snprintf(page + len, count - len,
-                                "\ndump Q%d rx desc:%d",
-                                k,
-                                tp->num_rx_desc);
-                for (j=0; j<tp->num_rx_desc; j++) {
-                        pdword = (u32*)rtl8168_get_rxdesc(tp,
-                                                          tp->RxDescArray,
-                                                          j, k);
-                        for (i=0; i<(tp->RxDescLength/4); i++) {
-                                if (!(i % 4))
-                                        len += snprintf(page + len, count - len,
-                                                        "\n%04llx ",
-                                                        ((u64)pdword + (i * 4) -
-                                                         (u64)tp->RxDescArray));
-                                len += snprintf(page + len, count - len,
-                                                "%08x ",
-                                                pdword[i]);
-                        }
-                }
-
-                len += snprintf(page + len, count - len, "\n");
-        }
-
-        rtnl_unlock();
-
-        len += snprintf(page + len, count - len, "\n");
-
-        *eof = 1;
-
-        return len;
-}
-
-void _proc_dump_tx_desc(char *page, int *page_len, int *count,
-                        struct TxDesc *desc_base,
-                        u32 alloc_size, u32 num_desc)
-{
-        int i;
-        int len = 0;
-        u32 *pdword;
-
-        if (desc_base == NULL ||
-            alloc_size == 0 ||
-            num_desc == 0)
-                return;
-
-        len = *page_len;
-        pdword = (u32*)desc_base;
-        for (i=0; i<(alloc_size/4); i++) {
-                if (!(i % 4))
-                        len += snprintf(page + len, *count - len,
-                                        "\n%04x ",
-                                        i);
-                len += snprintf(page + len, *count - len,
-                                "%08x ",
-                                pdword[i]);
-        }
-
-        len += snprintf(page + len, count - len, "\n");
-
-        *page_len = len;
-        return;
-}
-
-static int proc_dump_tx_desc(char *page, char **start,
-                             off_t offset, int count,
-                             int *eof, void *data)
-{
-        int i;
-        int len = 0;
-        u32 *pdword;
-        struct net_device *dev = data;
-        struct rtl8168_private *tp = netdev_priv(dev);
-        struct rtl8168_tx_ring *ring = &tp->tx_ring[0];
-
-        if (!ring->TxDescArray)
-                return -EOPNOTSUPP;
-
-        rtnl_lock();
-
-        for (i=0; i<tp->HwSuppNumTxQueues; i++) {
-                struct rtl8168_tx_ring *ring = &tp->tx_ring[i];
-                if (!ring->TxDescArray)
-                        continue;
-                len += snprintf(page + len, count - len,
-                                "\ndump Q%d tx desc:%d",
-                                i,
-                                ring->num_tx_desc);
-                _proc_dump_tx_desc(page, &len, &count,
-                                   ring->TxDescArray,
-                                   ring->TxDescAllocSize,
-                                   ring->num_tx_desc);
-        }
-
-#ifdef ENABLE_LIB_SUPPORT
-        for (i=0; i<tp->HwSuppNumTxQueues; i++) {
-                struct rtl8168_ring *ring = &tp->lib_tx_ring[i];
-                if (!ring->desc_addr)
-                        continue;
-                len += snprintf(page + len, count - len,
-                                "\ndump lib Q%d tx desc:%d",
-                                i,
-                                ring->ring_size);
-                _proc_dump_tx_desc(page, &len, ring->desc_addr,
-                                   ring->desc_size,
-                                   ring->ring_size);
-        }
-#endif //ENABLE_LIB_SUPPORT
-
-        rtnl_unlock();
-
-        len += snprintf(page + len, count - len, "\n");
-
-        *eof = 1;
-
-        return len;
-}
-
-static int proc_dump_tx_desc(char *page, char **start,
-                             off_t offset, int count,
-                             int *eof, void *data)
-{
-        int i;
-        struct net_device *dev = m->private;
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_1 ... CFG_METHOD_8:
-                return -EOPNOTSUPP;
-        default:
-                break;
-        }
-
-        rtnl_lock();
-
-        len += snprintf(page + len, count - len,
-                        "\ndump MSI-X Table. Total Entry %d. \n",
-                        R8168_MAX_MSIX_VEC);
-
-        for (i=0; i<R8168_MAX_MSIX_VEC; i++) {
-                len += snprintf(page + len, count - len,
-                                "\n%04x ",
-                                i);
-                len += snprintf(page + len, count - len,
-                                "%08x ",
-                                rtl8168_eri_read(tp, i*0x10, 4,
-                                                 ERIAR_MSIX));
-                len += snprintf(page + len, count - len,
-                                "%08x ",
-                                rtl8168_eri_read(tp, i*0x10 + 4, 4,
-                                                 ERIAR_MSIX));
-                len += snprintf(page + len, count - len,
-                                "%08x ",
-                                rtl8168_eri_read(tp, i*0x10 + 8, 4,
-                                                 ERIAR_MSIX));
-                len += snprintf(page + len, count - len,
-                                "%08x ",
-                                rtl8168_eri_read(tp, i*0x10 + 12, 4,
-                                                 ERIAR_MSIX));
-        }
-
-        rtnl_unlock();
-
-        len += snprintf(page + len, count - len, "\n");
-
-        *eof = 1;
-
-        return len;
-}
-
-static int proc_dump_msix_tbl(char *page, char **start,
-                              off_t offset, int count,
-                              int *eof, void *data)
-{
-        int i, j;
-        int len = 0;
-        struct net_device *dev = data;
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        rtnl_lock();
-
-        len += snprintf(page + len, count - len,
-                        "\ndump MSI-X Table. Total Entry %d. \n",
-                        tp->hw_supp_irq_nvecs);
-
-        for (i=0; i<tp->hw_supp_irq_nvecs; i++) {
-                len += snprintf(page + len, count - len,
-                                "\n%04x ", i);
-                for (j=0; j<4; j++)
-                        len += snprintf(page + len, count - len, "%08x ",
-                                        rtl8168_eri_read(tp, i*0x10 + 4*j, 4,
-                                                         ERIAR_MSIX));
-        }
-
-        rtnl_unlock();
-
-        len += snprintf(page + len, count - len, "\n");
-
-        *eof = 1;
-        return 0;
-}
-#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
-
-static void rtl8168_proc_module_init(void)
-{
-        //create /proc/net/r8168
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)
-        rtl8168_proc = proc_mkdir(MODULENAME, init_net.proc_net);
-#else
-        rtl8168_proc = proc_mkdir(MODULENAME, proc_net);
-#endif
-        if (!rtl8168_proc)
-                dprintk("cannot create %s proc entry \n", MODULENAME);
-}
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
-/*
- * seq_file wrappers for procfile show routines.
- */
-static int rtl8168_proc_open(struct inode *inode, struct file *file)
-{
-        struct net_device *dev = proc_get_parent_data(inode);
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
-        int (*show)(struct seq_file *, void *) = pde_data(inode);
-#else
-        int (*show)(struct seq_file *, void *) = PDE_DATA(inode);
-#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
-
-        return single_open(file, show, dev);
-}
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0)
-static const struct proc_ops rtl8168_proc_fops = {
-        .proc_open           = rtl8168_proc_open,
-        .proc_read           = seq_read,
-        .proc_lseek          = seq_lseek,
-        .proc_release        = single_release,
-};
-#else
-static const struct file_operations rtl8168_proc_fops = {
-        .open           = rtl8168_proc_open,
-        .read           = seq_read,
-        .llseek         = seq_lseek,
-        .release        = single_release,
-};
-#endif
-
-#endif
-
-/*
- * Table of proc files we need to create.
- */
-struct rtl8168_proc_file {
-        char name[12];
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
-        int (*show)(struct seq_file *, void *);
-#else
-        int (*show)(char *, char **, off_t, int, int *, void *);
-#endif
-};
-
-static const struct rtl8168_proc_file rtl8168_proc_files[] = {
-        { "driver_var", &proc_get_driver_variable },
-        { "tally", &proc_get_tally_counter },
-        { "registers", &proc_get_registers },
-        { "pcie_phy", &proc_get_pcie_phy },
-        { "eth_phy", &proc_get_eth_phy },
-        { "ext_regs", &proc_get_extended_registers },
-        { "pci_regs", &proc_get_pci_registers },
-        { "cdt", &proc_get_cable_info },
-        { "tx_desc", &proc_dump_tx_desc },
-        { "rx_desc", &proc_dump_rx_desc },
-        { "rx_desc_2", &proc_dump_rx_desc_2 },
-        { "msix_tbl", &proc_dump_msix_tbl },
-        { "" }
-};
-
-static void rtl8168_proc_init(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        const struct rtl8168_proc_file *f;
-        struct proc_dir_entry *dir;
-
-        if (rtl8168_proc && !tp->proc_dir) {
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
-                dir = proc_mkdir_data(dev->name, 0, rtl8168_proc, dev);
-                if (!dir) {
-                        printk("Unable to initialize /proc/net/%s/%s\n",
-                               MODULENAME, dev->name);
-                        return;
-                }
-
-                tp->proc_dir = dir;
-                proc_init_num++;
-
-                for (f = rtl8168_proc_files; f->name[0]; f++) {
-                        if (!proc_create_data(f->name, S_IFREG | S_IRUGO, dir,
-                                              &rtl8168_proc_fops, f->show)) {
-                                printk("Unable to initialize "
-                                       "/proc/net/%s/%s/%s\n",
-                                       MODULENAME, dev->name, f->name);
-                                return;
-                        }
-                }
-#else
-                dir = proc_mkdir(dev->name, rtl8168_proc);
-                if (!dir) {
-                        printk("Unable to initialize /proc/net/%s/%s\n",
-                               MODULENAME, dev->name);
-                        return;
-                }
-
-                tp->proc_dir = dir;
-                proc_init_num++;
-
-                for (f = rtl8168_proc_files; f->name[0]; f++) {
-                        if (!create_proc_read_entry(f->name, S_IFREG | S_IRUGO,
-                                                    dir, f->show, dev)) {
-                                printk("Unable to initialize "
-                                       "/proc/net/%s/%s/%s\n",
-                                       MODULENAME, dev->name, f->name);
-                                return;
-                        }
-                }
-#endif
-        }
-}
-
-static void rtl8168_proc_remove(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        if (tp->proc_dir) {
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
-                remove_proc_subtree(dev->name, rtl8168_proc);
-                proc_init_num--;
-
-#else
-                const struct rtl8168_proc_file *f;
-                struct rtl8168_private *tp = netdev_priv(dev);
-
-                for (f = rtl8168_proc_files; f->name[0]; f++)
-                        remove_proc_entry(f->name, tp->proc_dir);
-
-                remove_proc_entry(dev->name, rtl8168_proc);
-                proc_init_num--;
-#endif
-                tp->proc_dir = NULL;
-        }
-}
-
-#endif //ENABLE_R8168_PROCFS
-
-static inline u16 map_phy_ocp_addr(u16 PageNum, u8 RegNum)
-{
-        u16 OcpPageNum = 0;
-        u8 OcpRegNum = 0;
-        u16 OcpPhyAddress = 0;
-
-        if ( PageNum == 0 ) {
-                OcpPageNum = OCP_STD_PHY_BASE_PAGE + ( RegNum / 8 );
-                OcpRegNum = 0x10 + ( RegNum % 8 );
-        } else {
-                OcpPageNum = PageNum;
-                OcpRegNum = RegNum;
-        }
-
-        OcpPageNum <<= 4;
-
-        if ( OcpRegNum < 16 ) {
-                OcpPhyAddress = 0;
-        } else {
-                OcpRegNum -= 16;
-                OcpRegNum <<= 1;
-
-                OcpPhyAddress = OcpPageNum + OcpRegNum;
-        }
-
-
-        return OcpPhyAddress;
-}
-
-static void mdio_real_direct_write_phy_ocp(struct rtl8168_private *tp,
-                u32 RegAddr,
-                u32 value)
-{
-        u32 data32;
-        int i;
-
-        if (tp->HwSuppPhyOcpVer == 0)
-                goto out;
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
-        WARN_ON_ONCE(RegAddr % 2);
-#endif
-        data32 = RegAddr/2;
-        data32 <<= OCPR_Addr_Reg_shift;
-        data32 |= OCPR_Write | value;
-
-        RTL_W32(tp, PHYOCP, data32);
-        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
-                udelay(R8168_CHANNEL_WAIT_TIME);
-
-                if (!(RTL_R32(tp, PHYOCP) & OCPR_Flag))
-                        break;
-        }
-out:
-        return;
-}
-
-static void mdio_direct_write_phy_ocp(struct rtl8168_private *tp,
-                                      u16 RegAddr,
-                                      u16 value)
-{
-        if (tp->rtk_enable_diag)
-                return;
-
-        mdio_real_direct_write_phy_ocp(tp, RegAddr, value);
-}
-
-static void rtl8168_mdio_write_phy_ocp(struct rtl8168_private *tp,
-                                       u16 PageNum,
-                                       u32 RegAddr,
-                                       u32 value)
-{
-        u16 ocp_addr;
-
-        if (tp->rtk_enable_diag)
-                return;
-
-        ocp_addr = map_phy_ocp_addr(PageNum, RegAddr);
-
-        mdio_direct_write_phy_ocp(tp, ocp_addr, value);
-}
-
-static void rtl8168_mdio_real_write_phy_ocp(struct rtl8168_private *tp,
-                u16 PageNum,
-                u32 RegAddr,
-                u32 value)
-{
-        u16 ocp_addr;
-
-        ocp_addr = map_phy_ocp_addr(PageNum, RegAddr);
-
-        mdio_real_direct_write_phy_ocp(tp, ocp_addr, value);
-}
-
-static void mdio_real_write(struct rtl8168_private *tp,
-                            u32 RegAddr,
-                            u32 value)
-{
-        int i;
-
-        if (RegAddr == 0x1F) {
-                tp->cur_page = value;
-        }
-
-        if (tp->mcfg == CFG_METHOD_11) {
-                RTL_W32(tp, OCPDR, OCPDR_Write |
-                        (RegAddr & OCPDR_Reg_Mask) << OCPDR_GPHY_Reg_shift |
-                        (value & OCPDR_Data_Mask));
-                RTL_W32(tp, OCPAR, OCPAR_GPHY_Write);
-                RTL_W32(tp, EPHY_RXER_NUM, 0);
-
-                for (i = 0; i < 100; i++) {
-                        mdelay(1);
-                        if (!(RTL_R32(tp, OCPAR) & OCPAR_Flag))
-                                break;
-                }
-        } else {
-                if (tp->HwSuppPhyOcpVer > 0) {
-                        if (RegAddr == 0x1F) {
-                                return;
-                        }
-                        rtl8168_mdio_real_write_phy_ocp(tp, tp->cur_page, RegAddr, value);
-                } else {
-                        if (tp->mcfg == CFG_METHOD_12 || tp->mcfg == CFG_METHOD_13)
-                                RTL_W32(tp, 0xD0, RTL_R32(tp, 0xD0) & ~0x00020000);
-
-                        RTL_W32(tp, PHYAR, PHYAR_Write |
-                                (RegAddr & PHYAR_Reg_Mask) << PHYAR_Reg_shift |
-                                (value & PHYAR_Data_Mask));
-
-                        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
-                                udelay(R8168_CHANNEL_WAIT_TIME);
-
-                                /* Check if the RTL8168 has completed writing to the specified MII register */
-                                if (!(RTL_R32(tp, PHYAR) & PHYAR_Flag)) {
-                                        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
-                                        break;
-                                }
-                        }
-
-                        if (tp->mcfg == CFG_METHOD_12 || tp->mcfg == CFG_METHOD_13)
-                                RTL_W32(tp, 0xD0, RTL_R32(tp, 0xD0) | 0x00020000);
-                }
-        }
-}
-
-void rtl8168_mdio_write(struct rtl8168_private *tp,
-                        u16 RegAddr,
-                        u16 value)
-{
-        if (tp->rtk_enable_diag)
-                return;
-
-        mdio_real_write(tp, RegAddr, value);
-}
-
-void rtl8168_mdio_prot_write(struct rtl8168_private *tp,
-                             u32 RegAddr,
-                             u32 value)
-{
-        mdio_real_write(tp, RegAddr, value);
-}
-
-void rtl8168_mdio_prot_direct_write_phy_ocp(struct rtl8168_private *tp,
-                u32 RegAddr,
-                u32 value)
-{
-        mdio_real_direct_write_phy_ocp(tp, RegAddr, value);
-}
-
-static u32 mdio_real_direct_read_phy_ocp(struct rtl8168_private *tp,
-                u32 RegAddr)
-{
-        u32 data32;
-        int i, value = 0;
-
-        if (tp->HwSuppPhyOcpVer == 0)
-                goto out;
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
-        WARN_ON_ONCE(RegAddr % 2);
-#endif
-        data32 = RegAddr/2;
-        data32 <<= OCPR_Addr_Reg_shift;
-
-        RTL_W32(tp, PHYOCP, data32);
-        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
-                udelay(R8168_CHANNEL_WAIT_TIME);
-
-                if (RTL_R32(tp, PHYOCP) & OCPR_Flag)
-                        break;
-        }
-        value = RTL_R32(tp, PHYOCP) & OCPDR_Data_Mask;
-
-out:
-        return value;
-}
-
-static u32 mdio_direct_read_phy_ocp(struct rtl8168_private *tp,
-                                    u16 RegAddr)
-{
-        if (tp->rtk_enable_diag)
-                return 0xffffffff;
-
-        return mdio_real_direct_read_phy_ocp(tp, RegAddr);
-}
-
-static u32 rtl8168_mdio_read_phy_ocp(struct rtl8168_private *tp,
-                                     u16 PageNum,
-                                     u32 RegAddr)
-{
-        u16 ocp_addr;
-
-        if (tp->rtk_enable_diag)
-                return 0xffffffff;
-
-        ocp_addr = map_phy_ocp_addr(PageNum, RegAddr);
-
-        return mdio_direct_read_phy_ocp(tp, ocp_addr);
-}
-
-static u32 rtl8168_mdio_real_read_phy_ocp(struct rtl8168_private *tp,
-                u16 PageNum,
-                u32 RegAddr)
-{
-        u16 ocp_addr;
-
-        ocp_addr = map_phy_ocp_addr(PageNum, RegAddr);
-
-        return mdio_real_direct_read_phy_ocp(tp, ocp_addr);
-}
-
-u32 mdio_real_read(struct rtl8168_private *tp,
-                   u32 RegAddr)
-{
-        int i, value = 0;
-
-        if (tp->mcfg==CFG_METHOD_11) {
-                RTL_W32(tp, OCPDR, OCPDR_Read |
-                        (RegAddr & OCPDR_Reg_Mask) << OCPDR_GPHY_Reg_shift);
-                RTL_W32(tp, OCPAR, OCPAR_GPHY_Write);
-                RTL_W32(tp, EPHY_RXER_NUM, 0);
-
-                for (i = 0; i < 100; i++) {
-                        mdelay(1);
-                        if (!(RTL_R32(tp, OCPAR) & OCPAR_Flag))
-                                break;
-                }
-
-                mdelay(1);
-                RTL_W32(tp, OCPAR, OCPAR_GPHY_Read);
-                RTL_W32(tp, EPHY_RXER_NUM, 0);
-
-                for (i = 0; i < 100; i++) {
-                        mdelay(1);
-                        if (RTL_R32(tp, OCPAR) & OCPAR_Flag)
-                                break;
-                }
-
-                value = RTL_R32(tp, OCPDR) & OCPDR_Data_Mask;
-        } else {
-                if (tp->HwSuppPhyOcpVer > 0) {
-                        value = rtl8168_mdio_real_read_phy_ocp(tp, tp->cur_page, RegAddr);
-                } else {
-                        if (tp->mcfg == CFG_METHOD_12 || tp->mcfg == CFG_METHOD_13)
-                                RTL_W32(tp, 0xD0, RTL_R32(tp, 0xD0) & ~0x00020000);
-
-                        RTL_W32(tp, PHYAR,
-                                PHYAR_Read | (RegAddr & PHYAR_Reg_Mask) << PHYAR_Reg_shift);
-
-                        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
-                                udelay(R8168_CHANNEL_WAIT_TIME);
-
-                                /* Check if the RTL8168 has completed retrieving data from the specified MII register */
-                                if (RTL_R32(tp, PHYAR) & PHYAR_Flag) {
-                                        value = RTL_R32(tp, PHYAR) & PHYAR_Data_Mask;
-                                        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
-                                        break;
-                                }
-                        }
-
-                        if (tp->mcfg == CFG_METHOD_12 || tp->mcfg == CFG_METHOD_13)
-                                RTL_W32(tp, 0xD0, RTL_R32(tp, 0xD0) | 0x00020000);
-                }
-        }
-
-        return value;
-}
-
-u32 rtl8168_mdio_read(struct rtl8168_private *tp,
-                      u16 RegAddr)
-{
-        if (tp->rtk_enable_diag)
-                return 0xffffffff;
-
-        return mdio_real_read(tp, RegAddr);
-}
-
-u32 rtl8168_mdio_prot_read(struct rtl8168_private *tp,
-                           u32 RegAddr)
-{
-        return mdio_real_read(tp, RegAddr);
-}
-
-u32 rtl8168_mdio_prot_direct_read_phy_ocp(struct rtl8168_private *tp,
-                u32 RegAddr)
-{
-        return mdio_real_direct_read_phy_ocp(tp, RegAddr);
-}
-
-static void ClearAndSetEthPhyBit(struct rtl8168_private *tp, u8  addr, u16 clearmask, u16 setmask)
-{
-        u16 PhyRegValue;
-
-
-        PhyRegValue = rtl8168_mdio_read(tp, addr);
-        PhyRegValue &= ~clearmask;
-        PhyRegValue |= setmask;
-        rtl8168_mdio_write(tp, addr, PhyRegValue);
-}
-
-void rtl8168_clear_eth_phy_bit(struct rtl8168_private *tp, u8 addr, u16 mask)
-{
-        ClearAndSetEthPhyBit(tp,
-                             addr,
-                             mask,
-                             0
-                            );
-}
-
-void rtl8168_set_eth_phy_bit(struct rtl8168_private *tp, u8  addr, u16  mask)
-{
-        ClearAndSetEthPhyBit(tp,
-                             addr,
-                             0,
-                             mask
-                            );
-}
-
-void rtl8168_mac_ocp_write(struct rtl8168_private *tp, u16 reg_addr, u16 value)
-{
-        u32 data32;
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
-        WARN_ON_ONCE(reg_addr % 2);
-#endif
-
-        data32 = reg_addr/2;
-        data32 <<= OCPR_Addr_Reg_shift;
-        data32 += value;
-        data32 |= OCPR_Write;
-
-        RTL_W32(tp, MACOCP, data32);
-}
-
-u16 rtl8168_mac_ocp_read(struct rtl8168_private *tp, u16 reg_addr)
-{
-        u32 data32;
-        u16 data16 = 0;
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
-        WARN_ON_ONCE(reg_addr % 2);
-#endif
-
-        data32 = reg_addr/2;
-        data32 <<= OCPR_Addr_Reg_shift;
-
-        RTL_W32(tp, MACOCP, data32);
-        data16 = (u16)RTL_R32(tp, MACOCP);
-
-        return data16;
-}
-
-#ifdef ENABLE_USE_FIRMWARE_FILE
-static void mac_mcu_write(struct rtl8168_private *tp, u16 reg, u16 value)
-{
-        if (reg == 0x1f) {
-                tp->ocp_base = value << 4;
-                return;
-        }
-
-        rtl8168_mac_ocp_write(tp, tp->ocp_base + reg, value);
-}
-
-static u32 mac_mcu_read(struct rtl8168_private *tp, u16 reg)
-{
-        return rtl8168_mac_ocp_read(tp, tp->ocp_base + reg);
-}
-#endif
-
-static void
-rtl8168_clear_and_set_mcu_ocp_bit(
-        struct rtl8168_private *tp,
-        u16   addr,
-        u16   clearmask,
-        u16   setmask
-)
-{
-        u16 RegValue;
-
-        RegValue = rtl8168_mac_ocp_read(tp, addr);
-        RegValue &= ~clearmask;
-        RegValue |= setmask;
-        rtl8168_mac_ocp_write(tp, addr, RegValue);
-}
-
-static void
-rtl8168_clear_mcu_ocp_bit(
-        struct rtl8168_private *tp,
-        u16   addr,
-        u16   mask
-)
-{
-        rtl8168_clear_and_set_mcu_ocp_bit(tp,
-                                          addr,
-                                          mask,
-                                          0
-                                         );
-}
-
-static void
-rtl8168_set_mcu_ocp_bit(
-        struct rtl8168_private *tp,
-        u16   addr,
-        u16   mask
-)
-{
-        rtl8168_clear_and_set_mcu_ocp_bit(tp,
-                                          addr,
-                                          0,
-                                          mask
-                                         );
-}
-
-static u32 real_ocp_read(struct rtl8168_private *tp, u16 addr, u8 len)
-{
-        int i, val_shift, shift = 0;
-        u32 value1 = 0, value2 = 0, mask;
-
-        if (len > 4 || len <= 0)
-                return -1;
-
-        while (len > 0) {
-                val_shift = addr % 4;
-                addr = addr & ~0x3;
-
-                RTL_W32(tp, OCPAR, (0x0F<<12) | (addr&0xFFF));
-
-                for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
-                        udelay(R8168_CHANNEL_WAIT_TIME);
-                        if (RTL_R32(tp, OCPAR) & OCPAR_Flag)
-                                break;
-                }
-
-                if (len == 1)       mask = (0xFF << (val_shift * 8)) & 0xFFFFFFFF;
-                else if (len == 2)  mask = (0xFFFF << (val_shift * 8)) & 0xFFFFFFFF;
-                else if (len == 3)  mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
-                else            mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
-
-                value1 = RTL_R32(tp, OCPDR) & mask;
-                value2 |= (value1 >> val_shift * 8) << shift * 8;
-
-                if (len <= 4 - val_shift) {
-                        len = 0;
-                } else {
-                        len -= (4 - val_shift);
-                        shift = 4 - val_shift;
-                        addr += 4;
-                }
-        }
-
-        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
-
-        return value2;
-}
-
-u32 rtl8168_ocp_read_with_oob_base_address(struct rtl8168_private *tp, u16 addr, u8 len, const u32 base_address)
-{
-        return rtl8168_eri_read_with_oob_base_address(tp, addr, len, ERIAR_OOB, base_address);
-}
-
-u32 rtl8168_ocp_read(struct rtl8168_private *tp, u16 addr, u8 len)
-{
-        u32 value = 0;
-
-        if (HW_DASH_SUPPORT_TYPE_2(tp))
-                value = rtl8168_ocp_read_with_oob_base_address(tp, addr, len, NO_BASE_ADDRESS);
-        else if (HW_DASH_SUPPORT_TYPE_3(tp))
-                value = rtl8168_ocp_read_with_oob_base_address(tp, addr, len, RTL8168FP_OOBMAC_BASE);
-        else
-                value = real_ocp_read(tp, addr, len);
-
-        return value;
-}
-
-static int real_ocp_write(struct rtl8168_private *tp, u16 addr, u8 len, u32 value)
-{
-        int i, val_shift, shift = 0;
-        u32 value1 = 0, mask;
-
-        if (len > 4 || len <= 0)
-                return -1;
-
-        while (len > 0) {
-                val_shift = addr % 4;
-                addr = addr & ~0x3;
-
-                if (len == 1)       mask = (0xFF << (val_shift * 8)) & 0xFFFFFFFF;
-                else if (len == 2)  mask = (0xFFFF << (val_shift * 8)) & 0xFFFFFFFF;
-                else if (len == 3)  mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
-                else            mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
-
-                value1 = rtl8168_ocp_read(tp, addr, 4) & ~mask;
-                value1 |= ((value << val_shift * 8) >> shift * 8);
-
-                RTL_W32(tp, OCPDR, value1);
-                RTL_W32(tp, OCPAR, OCPAR_Flag | (0x0F<<12) | (addr&0xFFF));
-
-                for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
-                        udelay(R8168_CHANNEL_WAIT_TIME);
-
-                        /* Check if the RTL8168 has completed ERI write */
-                        if (!(RTL_R32(tp, OCPAR) & OCPAR_Flag))
-                                break;
-                }
-
-                if (len <= 4 - val_shift) {
-                        len = 0;
-                } else {
-                        len -= (4 - val_shift);
-                        shift = 4 - val_shift;
-                        addr += 4;
-                }
-        }
-
-        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
-
-        return 0;
-}
-
-u32 rtl8168_ocp_write_with_oob_base_address(struct rtl8168_private *tp, u16 addr, u8 len, u32 value, const u32 base_address)
-{
-        return rtl8168_eri_write_with_oob_base_address(tp, addr, len, value, ERIAR_OOB, base_address);
-}
-
-void rtl8168_ocp_write(struct rtl8168_private *tp, u16 addr, u8 len, u32 value)
-{
-        if (HW_DASH_SUPPORT_TYPE_2(tp))
-                rtl8168_ocp_write_with_oob_base_address(tp, addr, len, value, NO_BASE_ADDRESS);
-        else if (HW_DASH_SUPPORT_TYPE_3(tp))
-                rtl8168_ocp_write_with_oob_base_address(tp, addr, len, value, RTL8168FP_OOBMAC_BASE);
-        else
-                real_ocp_write(tp, addr, len, value);
-}
-
-void rtl8168_oob_mutex_lock(struct rtl8168_private *tp)
-{
-        u8 reg_16, reg_a0;
-        u32 wait_cnt_0, wait_Cnt_1;
-        u16 ocp_reg_mutex_ib;
-        u16 ocp_reg_mutex_oob;
-        u16 ocp_reg_mutex_prio;
-
-        if (!tp->DASH)
-                return;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_11:
-        case CFG_METHOD_12:
-                ocp_reg_mutex_oob = 0x16;
-                ocp_reg_mutex_ib = 0x17;
-                ocp_reg_mutex_prio = 0x9C;
-                break;
-        case CFG_METHOD_13:
-                ocp_reg_mutex_oob = 0x06;
-                ocp_reg_mutex_ib = 0x07;
-                ocp_reg_mutex_prio = 0x9C;
-                break;
-        case CFG_METHOD_23:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        default:
-                ocp_reg_mutex_oob = 0x110;
-                ocp_reg_mutex_ib = 0x114;
-                ocp_reg_mutex_prio = 0x11C;
-                break;
-        }
-
-        rtl8168_ocp_write(tp, ocp_reg_mutex_ib, 1, BIT_0);
-        reg_16 = rtl8168_ocp_read(tp, ocp_reg_mutex_oob, 1);
-        wait_cnt_0 = 0;
-        while(reg_16) {
-                reg_a0 = rtl8168_ocp_read(tp, ocp_reg_mutex_prio, 1);
-                if (reg_a0) {
-                        rtl8168_ocp_write(tp, ocp_reg_mutex_ib, 1, 0x00);
-                        reg_a0 = rtl8168_ocp_read(tp, ocp_reg_mutex_prio, 1);
-                        wait_Cnt_1 = 0;
-                        while(reg_a0) {
-                                reg_a0 = rtl8168_ocp_read(tp, ocp_reg_mutex_prio, 1);
-
-                                wait_Cnt_1++;
-
-                                if (wait_Cnt_1 > 2000)
-                                        break;
-                        };
-                        rtl8168_ocp_write(tp, ocp_reg_mutex_ib, 1, BIT_0);
-
-                }
-                reg_16 = rtl8168_ocp_read(tp, ocp_reg_mutex_oob, 1);
-
-                wait_cnt_0++;
-
-                if (wait_cnt_0 > 2000)
-                        break;
-        };
-}
-
-void rtl8168_oob_mutex_unlock(struct rtl8168_private *tp)
-{
-        u16 ocp_reg_mutex_ib;
-        u16 ocp_reg_mutex_oob;
-        u16 ocp_reg_mutex_prio;
-
-        if (!tp->DASH)
-                return;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_11:
-        case CFG_METHOD_12:
-                ocp_reg_mutex_oob = 0x16;
-                ocp_reg_mutex_ib = 0x17;
-                ocp_reg_mutex_prio = 0x9C;
-                break;
-        case CFG_METHOD_13:
-                ocp_reg_mutex_oob = 0x06;
-                ocp_reg_mutex_ib = 0x07;
-                ocp_reg_mutex_prio = 0x9C;
-                break;
-        case CFG_METHOD_23:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        default:
-                ocp_reg_mutex_oob = 0x110;
-                ocp_reg_mutex_ib = 0x114;
-                ocp_reg_mutex_prio = 0x11C;
-                break;
-        }
-
-        rtl8168_ocp_write(tp, ocp_reg_mutex_prio, 1, BIT_0);
-        rtl8168_ocp_write(tp, ocp_reg_mutex_ib, 1, 0x00);
-}
-
-void rtl8168_oob_notify(struct rtl8168_private *tp, u8 cmd)
-{
-        rtl8168_eri_write(tp, 0xE8, 1, cmd, ERIAR_ExGMAC);
-
-        rtl8168_ocp_write(tp, 0x30, 1, 0x01);
-}
-
-static int rtl8168_check_dash(struct rtl8168_private *tp)
-{
-        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                if (rtl8168_ocp_read(tp, 0x128, 1) & BIT_0)
-                        return 1;
-                else
-                        return 0;
-        } else {
-                u32 reg;
-
-                if (tp->mcfg == CFG_METHOD_13)
-                        reg = 0xb8;
-                else
-                        reg = 0x10;
-
-                if (rtl8168_ocp_read(tp, reg, 2) & 0x00008000)
-                        return 1;
-                else
-                        return 0;
-        }
-}
-
-void rtl8168_dash2_disable_tx(struct rtl8168_private *tp)
-{
-        if (!tp->DASH)
-                return;
-
-        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                u16 WaitCnt;
-                u8 TmpUchar;
-
-                //Disable oob Tx
-                RTL_CMAC_W8(tp, CMAC_IBCR2, RTL_CMAC_R8(tp, CMAC_IBCR2) & ~( BIT_0 ));
-                WaitCnt = 0;
-
-                //wait oob tx disable
-                do {
-                        TmpUchar = RTL_CMAC_R8(tp, CMAC_IBISR0);
-
-                        if ( TmpUchar & ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE ) {
-                                break;
-                        }
-
-                        udelay( 50 );
-                        WaitCnt++;
-                } while(WaitCnt < 2000);
-
-                //Clear ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE
-                RTL_CMAC_W8(tp, CMAC_IBISR0, RTL_CMAC_R8(tp, CMAC_IBISR0) | ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE);
-        }
-}
-
-void rtl8168_dash2_enable_tx(struct rtl8168_private *tp)
-{
-        if (!tp->DASH)
-                return;
-
-        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                RTL_CMAC_W8(tp, CMAC_IBCR2, RTL_CMAC_R8(tp, CMAC_IBCR2) | BIT_0);
-        }
-}
-
-void rtl8168_dash2_disable_rx(struct rtl8168_private *tp)
-{
-        if (!tp->DASH)
-                return;
-
-        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                RTL_CMAC_W8(tp, CMAC_IBCR0, RTL_CMAC_R8(tp, CMAC_IBCR0) & ~( BIT_0 ));
-        }
-}
-
-void rtl8168_dash2_enable_rx(struct rtl8168_private *tp)
-{
-        if (!tp->DASH)
-                return;
-
-        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                RTL_CMAC_W8(tp, CMAC_IBCR0, RTL_CMAC_R8(tp, CMAC_IBCR0) | BIT_0);
-        }
-}
-
-static void rtl8168_dash2_disable_txrx(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                rtl8168_dash2_disable_tx( tp );
-                rtl8168_dash2_disable_rx( tp );
-        }
-}
-
-static u8 rtl8168_check_ephy_addr(struct rtl8168_private *tp, int addr)
-{
-        if (tp->mcfg != CFG_METHOD_35 && tp->mcfg != CFG_METHOD_36)
-                goto exit;
-
-        if (addr & (BIT_6 | BIT_5))
-                rtl8168_clear_and_set_mcu_ocp_bit(tp, 0xDE28,
-                                                  (BIT_1 | BIT_0),
-                                                  (addr >> 5) & (BIT_1 | BIT_0));
-
-        addr &= 0x1F;
-
-exit:
-        return addr;
-}
-
-static void _rtl8168_ephy_write(struct rtl8168_private *tp, int addr, int value)
-{
-        int i;
-
-        RTL_W32(tp, EPHYAR,
-                EPHYAR_Write |
-                (addr & EPHYAR_Reg_Mask) << EPHYAR_Reg_shift |
-                (value & EPHYAR_Data_Mask));
-
-        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
-                udelay(R8168_CHANNEL_WAIT_TIME);
-
-                /* Check if the RTL8168 has completed EPHY write */
-                if (!(RTL_R32(tp, EPHYAR) & EPHYAR_Flag))
-                        break;
-        }
-
-        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
-}
-
-void rtl8168_ephy_write(struct rtl8168_private *tp, int addr, int value)
-{
-        _rtl8168_ephy_write(tp, rtl8168_check_ephy_addr(tp, addr), value);
-}
-
-static u16 _rtl8168_ephy_read(struct rtl8168_private *tp, int addr)
-{
-        int i;
-        u16 value = 0xffff;
-
-        RTL_W32(tp, EPHYAR,
-                EPHYAR_Read | (addr & EPHYAR_Reg_Mask) << EPHYAR_Reg_shift);
-
-        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
-                udelay(R8168_CHANNEL_WAIT_TIME);
-
-                /* Check if the RTL8168 has completed EPHY read */
-                if (RTL_R32(tp, EPHYAR) & EPHYAR_Flag) {
-                        value = (u16) (RTL_R32(tp, EPHYAR) & EPHYAR_Data_Mask);
-                        break;
-                }
-        }
-
-        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
-
-        return value;
-}
-
-u16 rtl8168_ephy_read(struct rtl8168_private *tp, int addr)
-{
-        return _rtl8168_ephy_read(tp, rtl8168_check_ephy_addr(tp, addr));
-}
-
-static void ClearAndSetPCIePhyBit(struct rtl8168_private *tp, u8 addr, u16 clearmask, u16 setmask)
-{
-        u16 EphyValue;
-
-        EphyValue = rtl8168_ephy_read(tp, addr);
-        EphyValue &= ~clearmask;
-        EphyValue |= setmask;
-        rtl8168_ephy_write(tp, addr, EphyValue);
-}
-
-static void ClearPCIePhyBit(struct rtl8168_private *tp, u8 addr, u16 mask)
-{
-        ClearAndSetPCIePhyBit( tp,
-                               addr,
-                               mask,
-                               0
-                             );
-}
-
-static void SetPCIePhyBit( struct rtl8168_private *tp, u8 addr, u16 mask)
-{
-        ClearAndSetPCIePhyBit( tp,
-                               addr,
-                               0,
-                               mask
-                             );
-}
-
-static u32
-rtl8168_csi_other_fun_read(struct rtl8168_private *tp,
-                           u8 multi_fun_sel_bit,
-                           u32 addr)
-{
-        u32 cmd;
-        int i;
-        u32 value = 0;
-
-        cmd = CSIAR_Read | CSIAR_ByteEn << CSIAR_ByteEn_shift | (addr & CSIAR_Addr_Mask);
-
-        if (tp->mcfg != CFG_METHOD_20 && tp->mcfg != CFG_METHOD_23 &&
-            tp->mcfg != CFG_METHOD_26 && tp->mcfg != CFG_METHOD_27 &&
-            tp->mcfg != CFG_METHOD_28 && tp->mcfg != CFG_METHOD_31 &&
-            tp->mcfg != CFG_METHOD_32 && tp->mcfg != CFG_METHOD_33 &&
-            tp->mcfg != CFG_METHOD_34) {
-                multi_fun_sel_bit = 0;
-        }
-
-        if ( multi_fun_sel_bit > 7 ) {
-                return 0xffffffff;
-        }
-
-        cmd |= multi_fun_sel_bit << 16;
-
-        RTL_W32(tp, CSIAR, cmd);
-
-        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
-                udelay(R8168_CHANNEL_WAIT_TIME);
-
-                /* Check if the RTL8168 has completed CSI read */
-                if (RTL_R32(tp, CSIAR) & CSIAR_Flag) {
-                        value = (u32)RTL_R32(tp, CSIDR);
-                        break;
-                }
-        }
-
-        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
-
-        return value;
-}
-
-static void
-rtl8168_csi_other_fun_write(struct rtl8168_private *tp,
-                            u8 multi_fun_sel_bit,
-                            u32 addr,
-                            u32 value)
-{
-        u32 cmd;
-        int i;
-
-        RTL_W32(tp, CSIDR, value);
-        cmd = CSIAR_Write | CSIAR_ByteEn << CSIAR_ByteEn_shift | (addr & CSIAR_Addr_Mask);
-        if (tp->mcfg != CFG_METHOD_20 && tp->mcfg != CFG_METHOD_23 &&
-            tp->mcfg != CFG_METHOD_26 && tp->mcfg != CFG_METHOD_27 &&
-            tp->mcfg != CFG_METHOD_28 && tp->mcfg != CFG_METHOD_31 &&
-            tp->mcfg != CFG_METHOD_32 && tp->mcfg != CFG_METHOD_33 &&
-            tp->mcfg != CFG_METHOD_34) {
-                multi_fun_sel_bit = 0;
-        }
-
-        if ( multi_fun_sel_bit > 7 ) {
-                return;
-        }
-
-        cmd |= multi_fun_sel_bit << 16;
-
-        RTL_W32(tp, CSIAR, cmd);
-
-        for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
-                udelay(R8168_CHANNEL_WAIT_TIME);
-
-                /* Check if the RTL8168 has completed CSI write */
-                if (!(RTL_R32(tp, CSIAR) & CSIAR_Flag))
-                        break;
-        }
-
-        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
-}
-
-static u32
-rtl8168_csi_read(struct rtl8168_private *tp,
-                 u32 addr)
-{
-        u8 multi_fun_sel_bit;
-
-        if (tp->mcfg == CFG_METHOD_20)
-                multi_fun_sel_bit = 2;
-        else if (tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_31 ||
-                 tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33 ||
-                 tp->mcfg == CFG_METHOD_34)
-                multi_fun_sel_bit = 1;
-        else
-                multi_fun_sel_bit = 0;
-
-        return rtl8168_csi_other_fun_read(tp, multi_fun_sel_bit, addr);
-}
-
-static void
-rtl8168_csi_write(struct rtl8168_private *tp,
-                  u32 addr,
-                  u32 value)
-{
-        u8 multi_fun_sel_bit;
-
-        if (tp->mcfg == CFG_METHOD_20)
-                multi_fun_sel_bit = 2;
-        else if (tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_31 ||
-                 tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33 ||
-                 tp->mcfg == CFG_METHOD_34)
-                multi_fun_sel_bit = 1;
-        else
-                multi_fun_sel_bit = 0;
-
-        rtl8168_csi_other_fun_write(tp, multi_fun_sel_bit, addr, value);
-}
-
-static u8
-rtl8168_csi_fun0_read_byte(struct rtl8168_private *tp,
-                           u32 addr)
-{
-        u8 RetVal = 0;
-
-        if (tp->mcfg == CFG_METHOD_20 || tp->mcfg == CFG_METHOD_26 ||
-            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) {
-                u32 TmpUlong;
-                u16 RegAlignAddr;
-                u8 ShiftByte;
-
-                RegAlignAddr = addr & ~(0x3);
-                ShiftByte = addr & (0x3);
-                TmpUlong = rtl8168_csi_other_fun_read(tp, 0, RegAlignAddr);
-                TmpUlong >>= (8*ShiftByte);
-                RetVal = (u8)TmpUlong;
-        } else {
-                struct pci_dev *pdev = tp->pci_dev;
-
-                pci_read_config_byte(pdev, addr, &RetVal);
-        }
-
-        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
-
-        return RetVal;
-}
-
-static void
-rtl8168_csi_fun0_write_byte(struct rtl8168_private *tp,
-                            u32 addr,
-                            u8 value)
-{
-        if (tp->mcfg == CFG_METHOD_20 || tp->mcfg == CFG_METHOD_26 ||
-            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) {
-                u32 TmpUlong;
-                u16 RegAlignAddr;
-                u8 ShiftByte;
-
-                RegAlignAddr = addr & ~(0x3);
-                ShiftByte = addr & (0x3);
-                TmpUlong = rtl8168_csi_other_fun_read(tp, 0, RegAlignAddr);
-                TmpUlong &= ~(0xFF << (8*ShiftByte));
-                TmpUlong |= (value << (8*ShiftByte));
-                rtl8168_csi_other_fun_write( tp, 0, RegAlignAddr, TmpUlong );
-        } else {
-                struct pci_dev *pdev = tp->pci_dev;
-
-                pci_write_config_byte(pdev, addr, value);
-        }
-
-        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
-}
-
-static void
-rtl8168_clear_and_set_other_fun_pci_bit(struct rtl8168_private *tp,
-                                        u8 multi_fun_sel_bit,
-                                        u32 addr,
-                                        u32 clearmask,
-                                        u32 setmask)
-{
-        u32 TmpUlong;
-
-        TmpUlong = rtl8168_csi_other_fun_read(tp, multi_fun_sel_bit, addr);
-        TmpUlong &= ~clearmask;
-        TmpUlong |= setmask;
-        rtl8168_csi_other_fun_write(tp, multi_fun_sel_bit, addr, TmpUlong);
-}
-
-static void
-rtl8168_other_fun_dev_pci_setting(struct rtl8168_private *tp,
-                                  u32 addr,
-                                  u32 clearmask,
-                                  u32 setmask,
-                                  u8 multi_fun_sel_bit)
-{
-        u32 TmpUlong;
-        u8 i;
-        u8 FunBit;
-
-        for (i = 0; i < 8; i++) {
-                FunBit = (1 << i);
-                if (FunBit & multi_fun_sel_bit) {
-                        u8 set_other_fun = TRUE;
-
-                        switch(tp->mcfg) {
-                        case CFG_METHOD_23:
-                        case CFG_METHOD_27:
-                        case CFG_METHOD_28:
-                                //0: UMAC, 1: TCR1, 2: TCR2, 3: KCS, 4: EHCI(Control by EHCI Driver)
-                                if (i < 5) {
-                                        TmpUlong = rtl8168_csi_other_fun_read(tp, i, 0x00);
-                                        if (TmpUlong == 0xFFFFFFFF)
-                                                set_other_fun = TRUE;
-                                        else
-                                                set_other_fun = FALSE;
-                                }
-                                break;
-                        case CFG_METHOD_31:
-                        case CFG_METHOD_32:
-                        case CFG_METHOD_33:
-                        case CFG_METHOD_34:
-                                //0: BMC, 1: NIC, 2: TCR, 3: VGA/PCIE_TO_USB, 4: EHCI, 5: WIFI, 6: WIFI, 7: KCS
-                                if (i == 5 || i == 6) {
-                                        if (tp->DASH) {
-                                                TmpUlong = rtl8168_ocp_read(tp, 0x184, 4);
-                                                if (TmpUlong & BIT_26)
-                                                        set_other_fun = FALSE;
-                                                else
-                                                        set_other_fun = TRUE;
-                                        }
-                                } else { //function 0/1/2/3/4/7
-                                        TmpUlong = rtl8168_csi_other_fun_read(tp, i, 0x00);
-                                        if (TmpUlong == 0xFFFFFFFF)
-                                                set_other_fun = TRUE;
-                                        else
-                                                set_other_fun = FALSE;
-                                }
-                                break;
-                        default:
-                                return;
-                        }
-
-                        if (set_other_fun)
-                                rtl8168_clear_and_set_other_fun_pci_bit(tp, i, addr, clearmask, setmask);
-                }
-        }
-}
-
-static void
-rtl8168_set_dash_other_fun_dev_state_change(struct rtl8168_private *tp,
-                u8 dev_state,
-                u8 multi_fun_sel_bit)
-{
-        u32 clearmask;
-        u32 setmask;
-
-        if (dev_state == 0) {
-                //
-                // goto D0
-                //
-                clearmask = (BIT_0 | BIT_1);
-                setmask = 0;
-
-                rtl8168_other_fun_dev_pci_setting(tp, 0x44, clearmask, setmask, multi_fun_sel_bit);
-        } else {
-                //
-                // goto D3
-                //
-                clearmask = 0;
-                setmask = (BIT_0 | BIT_1);
-
-                rtl8168_other_fun_dev_pci_setting(tp, 0x44, clearmask, setmask, multi_fun_sel_bit);
-        }
-}
-
-static void
-rtl8168_set_dash_other_fun_dev_aspm_clkreq(struct rtl8168_private *tp,
-                u8 aspm_val,
-                u8 clkreq_en,
-                u8 multi_fun_sel_bit)
-{
-        u32 clearmask;
-        u32 setmask;
-
-        aspm_val &= (BIT_0 | BIT_1);
-        clearmask = (BIT_0 | BIT_1 | BIT_8);
-        setmask = aspm_val;
-        if (clkreq_en)
-                setmask |= BIT_8;
-
-        rtl8168_other_fun_dev_pci_setting(tp, 0x80, clearmask, setmask, multi_fun_sel_bit);
-}
-
-/*
-static void
-rtl8168_set_dash_other_fun_dev_pci_cmd_register(struct rtl8168_private *tp,
-                u8 pci_cmd_reg,
-                u8 multi_fun_sel_bit)
-{
-        u32 clearmask;
-        u32 setmask;
-
-        pci_cmd_reg &= (BIT_0 | BIT_1 | BIT_2);
-
-        clearmask = (BIT_0 | BIT_1 | BIT_2);
-        setmask = pci_cmd_reg;
-
-        rtl8168_other_fun_dev_pci_setting(tp, 0x04, clearmask, setmask, multi_fun_sel_bit);
-}
-*/
-
-u32 rtl8168_eri_read_with_oob_base_address(struct rtl8168_private *tp, int addr, int len, int type, const u32 base_address)
-{
-        int i, val_shift, shift = 0;
-        u32 value1 = 0, value2 = 0, mask;
-        u32 eri_cmd;
-        const u32 transformed_base_address = ((base_address & 0x00FFF000) << 6) | (base_address & 0x000FFF);
-
-        if (len > 4 || len <= 0)
-                return -1;
-
-        while (len > 0) {
-                val_shift = addr % ERIAR_Addr_Align;
-                addr = addr & ~0x3;
-
-                eri_cmd = ERIAR_Read |
-                          transformed_base_address |
-                          type << ERIAR_Type_shift |
-                          ERIAR_ByteEn << ERIAR_ByteEn_shift |
-                          (addr & 0x0FFF);
-                if (addr & 0xF000) {
-                        u32 tmp;
-
-                        tmp = addr & 0xF000;
-                        tmp >>= 12;
-                        eri_cmd |= (tmp << 20) & 0x00F00000;
-                }
-
-                RTL_W32(tp, ERIAR, eri_cmd);
-
-                for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
-                        udelay(R8168_CHANNEL_WAIT_TIME);
-
-                        /* Check if the RTL8168 has completed ERI read */
-                        if (RTL_R32(tp, ERIAR) & ERIAR_Flag)
-                                break;
-                }
-
-                if (len == 1)       mask = (0xFF << (val_shift * 8)) & 0xFFFFFFFF;
-                else if (len == 2)  mask = (0xFFFF << (val_shift * 8)) & 0xFFFFFFFF;
-                else if (len == 3)  mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
-                else            mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
-
-                value1 = RTL_R32(tp, ERIDR) & mask;
-                value2 |= (value1 >> val_shift * 8) << shift * 8;
-
-                if (len <= 4 - val_shift) {
-                        len = 0;
-                } else {
-                        len -= (4 - val_shift);
-                        shift = 4 - val_shift;
-                        addr += 4;
-                }
-        }
-
-        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
-
-        return value2;
-}
-
-u32 rtl8168_eri_read(struct rtl8168_private *tp, int addr, int len, int type)
-{
-        return rtl8168_eri_read_with_oob_base_address(tp, addr, len, type, 0);
-}
-
-int rtl8168_eri_write_with_oob_base_address(struct rtl8168_private *tp, int addr, int len, u32 value, int type, const u32 base_address)
-{
-        int i, val_shift, shift = 0;
-        u32 value1 = 0, mask;
-        u32 eri_cmd;
-        const u32 transformed_base_address = ((base_address & 0x00FFF000) << 6) | (base_address & 0x000FFF);
-
-        if (len > 4 || len <= 0)
-                return -1;
-
-        while (len > 0) {
-                val_shift = addr % ERIAR_Addr_Align;
-                addr = addr & ~0x3;
-
-                if (len == 1)       mask = (0xFF << (val_shift * 8)) & 0xFFFFFFFF;
-                else if (len == 2)  mask = (0xFFFF << (val_shift * 8)) & 0xFFFFFFFF;
-                else if (len == 3)  mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
-                else            mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF;
-
-                value1 = rtl8168_eri_read_with_oob_base_address(tp, addr, 4, type, base_address) & ~mask;
-                value1 |= ((value << val_shift * 8) >> shift * 8);
-
-                RTL_W32(tp, ERIDR, value1);
-
-                eri_cmd = ERIAR_Write |
-                          transformed_base_address |
-                          type << ERIAR_Type_shift |
-                          ERIAR_ByteEn << ERIAR_ByteEn_shift |
-                          (addr & 0x0FFF);
-                if (addr & 0xF000) {
-                        u32 tmp;
-
-                        tmp = addr & 0xF000;
-                        tmp >>= 12;
-                        eri_cmd |= (tmp << 20) & 0x00F00000;
-                }
-
-                RTL_W32(tp, ERIAR, eri_cmd);
-
-                for (i = 0; i < R8168_CHANNEL_WAIT_COUNT; i++) {
-                        udelay(R8168_CHANNEL_WAIT_TIME);
-
-                        /* Check if the RTL8168 has completed ERI write */
-                        if (!(RTL_R32(tp, ERIAR) & ERIAR_Flag))
-                                break;
-                }
-
-                if (len <= 4 - val_shift) {
-                        len = 0;
-                } else {
-                        len -= (4 - val_shift);
-                        shift = 4 - val_shift;
-                        addr += 4;
-                }
-        }
-
-        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
-
-        return 0;
-}
-
-int rtl8168_eri_write(struct rtl8168_private *tp, int addr, int len, u32 value, int type)
-{
-        return rtl8168_eri_write_with_oob_base_address(tp, addr, len, value, type, NO_BASE_ADDRESS);
-}
-
-static void
-rtl8168_enable_rxdvgate(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_3);
-                mdelay(2);
-                break;
-        }
-}
-
-static void
-rtl8168_disable_rxdvgate(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_3);
-                mdelay(2);
-                break;
-        }
-}
-
-static u8
-rtl8168_is_gpio_low(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u8 gpio_low = FALSE;
-
-        switch (tp->HwSuppCheckPhyDisableModeVer) {
-        case 1:
-        case 2:
-                if (!(rtl8168_mac_ocp_read(tp, 0xDC04) & BIT_9))
-                        gpio_low = TRUE;
-                break;
-        case 3:
-                if (!(rtl8168_mac_ocp_read(tp, 0xDC04) & BIT_13))
-                        gpio_low = TRUE;
-                break;
-        }
-
-        if (gpio_low)
-                dprintk("gpio is low.\n");
-
-        return gpio_low;
-}
-
-static u8
-rtl8168_is_phy_disable_mode_enabled(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u8 phy_disable_mode_enabled = FALSE;
-
-        switch (tp->HwSuppCheckPhyDisableModeVer) {
-        case 1:
-                if (rtl8168_mac_ocp_read(tp, 0xDC20) & BIT_1)
-                        phy_disable_mode_enabled = TRUE;
-                break;
-        case 2:
-        case 3:
-                if (RTL_R8(tp, 0xF2) & BIT_5)
-                        phy_disable_mode_enabled = TRUE;
-                break;
-        }
-
-        if (phy_disable_mode_enabled)
-                dprintk("phy disable mode enabled.\n");
-
-        return phy_disable_mode_enabled;
-}
-
-static u8
-rtl8168_is_in_phy_disable_mode(struct net_device *dev)
-{
-        u8 in_phy_disable_mode = FALSE;
-
-        if (rtl8168_is_phy_disable_mode_enabled(dev) && rtl8168_is_gpio_low(dev))
-                in_phy_disable_mode = TRUE;
-
-        if (in_phy_disable_mode)
-                dprintk("Hardware is in phy disable mode.\n");
-
-        return in_phy_disable_mode;
-}
-
-void
-rtl8168_wait_txrx_fifo_empty(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int i;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                for (i = 0; i < 10; i++) {
-                        udelay(100);
-                        if (RTL_R32(tp, TxConfig) & BIT_11)
-                                break;
-                }
-
-                for (i = 0; i < 10; i++) {
-                        udelay(100);
-                        if ((RTL_R8(tp, MCUCmd_reg) & (Txfifo_empty | Rxfifo_empty)) == (Txfifo_empty | Rxfifo_empty))
-                                break;
-                }
-
-                mdelay(1);
-                break;
-        }
-}
-
-static int rtl8168_wait_dash_fw_ready(struct rtl8168_private *tp)
-{
-        int rc = -1;
-
-        if (!HW_DASH_SUPPORT_DASH(tp))
-                goto out;
-
-        if (!tp->DASH)
-                goto out;
-
-        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                int timeout;
-
-                for (timeout = 0; timeout < 10; timeout++) {
-                        mdelay(10);
-                        if (rtl8168_ocp_read(tp, 0x124, 1) & BIT_0) {
-                                rc = 1;
-                                goto out;
-                        }
-                }
-        } else {
-                u32 reg;
-                int timeout;
-
-                if (tp->mcfg == CFG_METHOD_13)
-                        reg = 0xB8;
-                else
-                        reg = 0x10;
-
-                for (timeout = 0; timeout < 10; timeout++) {
-                        mdelay(10);
-                        if (rtl8168_ocp_read(tp, reg, 2) & BIT_11) {
-                                rc = 1;
-                                goto out;
-                        }
-                }
-        }
-
-        rc = 0;
-
-out:
-        return rc;
-}
-
-static void rtl8168_driver_start(struct rtl8168_private *tp)
-{
-        //change other device state to D0.
-        switch (tp->mcfg) {
-        case CFG_METHOD_23:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-                rtl8168_set_dash_other_fun_dev_aspm_clkreq(tp, 3, 1, 0x1E);
-                rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0x1E);
-                break;
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-                rtl8168_set_dash_other_fun_dev_aspm_clkreq(tp, 3, 1, 0xFC);
-                rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0xFC);
-                break;
-        }
-
-        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                u32 tmp_value;
-
-                rtl8168_ocp_write(tp, 0x180, 1, OOB_CMD_DRIVER_START);
-                tmp_value = rtl8168_ocp_read(tp, 0x30, 1);
-                tmp_value |= BIT_0;
-                rtl8168_ocp_write(tp, 0x30, 1, tmp_value);
-
-                rtl8168_wait_dash_fw_ready(tp);
-        } else {
-
-                if (tp->mcfg == CFG_METHOD_13)
-                        RTL_W8(tp, TwiCmdReg, RTL_R8(tp, TwiCmdReg) | ( BIT_7 ));
-
-                rtl8168_oob_notify(tp, OOB_CMD_DRIVER_START);
-
-                rtl8168_wait_dash_fw_ready(tp);
-        }
-}
-
-static void rtl8168_driver_stop(struct rtl8168_private *tp)
-{
-        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                struct net_device *dev = tp->dev;
-                u32 tmp_value;
-
-                rtl8168_dash2_disable_txrx(dev);
-
-                rtl8168_ocp_write(tp, 0x180, 1, OOB_CMD_DRIVER_STOP);
-                tmp_value = rtl8168_ocp_read(tp, 0x30, 1);
-                tmp_value |= BIT_0;
-                rtl8168_ocp_write(tp, 0x30, 1, tmp_value);
-
-                rtl8168_wait_dash_fw_ready(tp);
-        } else {
-                rtl8168_oob_notify(tp, OOB_CMD_DRIVER_STOP);
-
-                rtl8168_wait_dash_fw_ready(tp);
-
-                if (tp->mcfg == CFG_METHOD_13)
-                        RTL_W8(tp, TwiCmdReg, RTL_R8(tp, TwiCmdReg) & ~( BIT_7 ));
-        }
-
-        //change other device state to D3.
-        switch (tp->mcfg) {
-        case CFG_METHOD_23:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-                rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0x0E);
-                break;
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-                rtl8168_set_dash_other_fun_dev_state_change(tp, 3, 0xFD);
-                break;
-        }
-}
-
-
-static inline u16 rtl8168_get_isr_by_vector(struct rtl8168_private *tp,
-                u32 message_id)
-{
-        if (message_id >= R8168_MAX_MSIX_VEC)
-                return 0;
-
-        if (message_id == 0)
-                return RTL_R16(tp, tp->isr_reg[0]);
-        else
-                return RTL_R8(tp, tp->isr_reg[message_id]);
-}
-
-static inline void rtl8168_clear_isr_by_vector(struct rtl8168_private *tp,
-                u32 message_id, u16 val)
-{
-        if (message_id >= R8168_MAX_MSIX_VEC)
-                return;
-
-        if (message_id == 0) {
-                RTL_W16(tp, tp->isr_reg[0], val);
-
-                if (val & RxDescUnavail)
-                        tp->rx_ring[message_id].rdu++;
-                if (val & TxDescUnavail)
-                        tp->tx_ring[message_id].tdu++;
-        } else {
-                RTL_W8(tp, tp->isr_reg[message_id], val);
-
-                if (val & RxDU1)
-                        tp->rx_ring[message_id].rdu++;
-        }
-}
-
-static inline void rtl8168_self_clear_isr_by_vector(struct rtl8168_private *tp,
-                u32 message_id)
-{
-        u16 val;
-
-        if (message_id >= R8168_MAX_MSIX_VEC)
-                return;
-
-        val = rtl8168_get_isr_by_vector(tp, message_id);
-        if ((message_id == 0) && (val & RxFIFOOver))
-                tp->rx_fifo_of++;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_9 ... CFG_METHOD_37:
-                /* RX_OVERFLOW RE-START mechanism now HW handles it automatically*/
-                if (message_id == 0)
-                        val &= ~RxFIFOOver;
-                break;
-        default:
-                break;
-        }
-        rtl8168_clear_isr_by_vector(tp, message_id, val);
-}
-
-#ifdef ENABLE_DASH_SUPPORT
-
-inline void
-rtl8168_enable_dash2_interrupt(struct rtl8168_private *tp)
-{
-        if (!tp->DASH)
-                return;
-
-        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                RTL_CMAC_W8(tp, CMAC_IBIMR0, ( ISRIMR_DASH_TYPE2_ROK | ISRIMR_DASH_TYPE2_TOK | ISRIMR_DASH_TYPE2_TDU | ISRIMR_DASH_TYPE2_RDU | ISRIMR_DASH_TYPE2_RX_DISABLE_IDLE ));
-        }
-}
-
-static inline void
-rtl8168_disable_dash2_interrupt(struct rtl8168_private *tp)
-{
-        if (!tp->DASH)
-                return;
-
-        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                RTL_CMAC_W8(tp, CMAC_IBIMR0, 0);
-        }
-}
-#endif
-
-static inline void
-rtl8168_enable_interrupt(struct rtl8168_private *tp)
-{
-        int i;
-        for (i=0; i<tp->num_rx_rings; i++)
-                rtl8168_enable_interrupt_by_vector(tp, i);
-}
-
-static inline void
-rtl8168_enable_lib_interrupt(struct rtl8168_private *tp)
-{
-        int i;
-
-        for (i=1; i<rtl8168_tot_rx_rings(tp); i++)
-                rtl8168_enable_interrupt_by_vector(tp, i);
-}
-
-static inline void
-rtl8168_disable_interrupt(struct rtl8168_private *tp)
-{
-        int i;
-
-        for (i=0; i<tp->num_rx_rings; i++)
-                rtl8168_disable_interrupt_by_vector(tp, i);
-}
-
-static inline void
-rtl8168_disable_lib_interrupt(struct rtl8168_private *tp)
-{
-        int i;
-
-        for (i=1; i<rtl8168_tot_rx_rings(tp); i++)
-                rtl8168_disable_interrupt_by_vector(tp, i);
-}
-
-static inline void
-rtl8168_disable_all_interrupt(struct rtl8168_private *tp)
-{
-        int i;
-
-        for (i=0; i<tp->hw_supp_irq_nvecs; i++)
-                rtl8168_disable_interrupt_by_vector(tp, i);
-}
-
-static inline void
-rtl8168_switch_to_hw_interrupt(struct rtl8168_private *tp)
-{
-        RTL_W32(tp, TimeInt0, 0x0000);
-
-        rtl8168_enable_interrupt(tp);
-
-        rtl8168_enable_lib_interrupt(tp);
-}
-
-static inline void
-rtl8168_switch_to_timer_interrupt(struct rtl8168_private *tp)
-{
-        if (tp->use_timer_interrrupt) {
-                RTL_W32(tp, TimeInt0, timer_count);
-                RTL_W32(tp, TCTR, timer_count);
-                RTL_W16(tp, tp->imr_reg[0], tp->timer_intr_mask);
-
-#ifdef ENABLE_DASH_SUPPORT
-                if (tp->DASH)
-                        rtl8168_enable_dash2_interrupt(tp);
-#endif
-        } else {
-                rtl8168_switch_to_hw_interrupt(tp);
-        }
-}
-
-static void
-rtl8168_irq_mask_and_ack(struct rtl8168_private *tp)
-{
-        rtl8168_disable_all_interrupt(tp);
-#ifdef ENABLE_DASH_SUPPORT
-        if (tp->DASH) {
-                if (tp->dash_printer_enabled) {
-                        rtl8168_clear_isr_by_vector(tp, 0,
-                                                    rtl8168_get_hw_isr_by_vector(tp, 0) &
-                                                    ~(ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET));
-                } else {
-                        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                                RTL_CMAC_W8(tp, CMAC_IBISR0, RTL_CMAC_R8(tp, CMAC_IBISR0));
-                        }
-                }
-        } else {
-                rtl8168_self_clear_isr_by_vector(tp, 0);
-        }
-#else
-        rtl8168_self_clear_isr_by_vector(tp, 0);
-#endif
-        if (tp->hw_supp_irq_nvecs > 1) {
-                int i;
-                for (i=1; i<tp->hw_supp_irq_nvecs; i++)
-                        rtl8168_self_clear_isr_by_vector(tp, i);
-        }
-}
-
-static void
-rtl8168_disable_rx_packet_filter(struct rtl8168_private *tp)
-{
-
-        RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) &
-                ~(AcceptErr | AcceptRunt |AcceptBroadcast | AcceptMulticast |
-                  AcceptMyPhys |  AcceptAllPhys));
-}
-
-static void
-rtl8168_nic_reset(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int i;
-
-        rtl8168_disable_rx_packet_filter(tp);
-
-        rtl8168_enable_rxdvgate(dev);
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_1:
-        case CFG_METHOD_2:
-        case CFG_METHOD_3:
-                mdelay(10);
-                break;
-        case CFG_METHOD_4:
-        case CFG_METHOD_5:
-        case CFG_METHOD_6:
-        case CFG_METHOD_7:
-        case CFG_METHOD_8:
-        case CFG_METHOD_9:
-        case CFG_METHOD_10:
-        case CFG_METHOD_14:
-        case CFG_METHOD_15:
-                RTL_W8(tp, ChipCmd, StopReq | CmdRxEnb | CmdTxEnb);
-                udelay(100);
-                break;
-        case CFG_METHOD_11:
-        case CFG_METHOD_12:
-        case CFG_METHOD_13:
-                for (i = 0; i < 2000; i++) {
-                        if (!(RTL_R8(tp, TxPoll) & NPQ)) break;
-                        udelay(100);
-                }
-                break;
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                mdelay(2);
-                break;
-        default:
-                mdelay(10);
-                break;
-        }
-
-        rtl8168_wait_txrx_fifo_empty(dev);
-
-        /* Soft reset the chip. */
-        RTL_W8(tp, ChipCmd, CmdReset);
-
-        /* Check that the chip has finished the reset. */
-        for (i = 100; i > 0; i--) {
-                udelay(100);
-                if ((RTL_R8(tp, ChipCmd) & CmdReset) == 0)
-                        break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_11:
-                rtl8168_oob_mutex_lock(tp);
-                rtl8168_ocp_write(tp, 0x10, 2, rtl8168_ocp_read(tp, 0x010, 2)&~0x00004000);
-                rtl8168_oob_mutex_unlock(tp);
-
-                rtl8168_oob_notify(tp, OOB_CMD_RESET);
-
-                for (i = 0; i < 10; i++) {
-                        mdelay(10);
-                        if (rtl8168_ocp_read(tp, 0x010, 2)&0x00004000)
-                                break;
-                }
-
-                for (i = 0; i < 5; i++) {
-                        if ( rtl8168_ocp_read(tp, 0x034, 1) == 0)
-                                break;
-                }
-                break;
-        }
-}
-
-static void
-rtl8168_hw_clear_timer_int(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        RTL_W32(tp, TimeInt0, 0x0000);
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_4:
-        case CFG_METHOD_5:
-        case CFG_METHOD_6:
-        case CFG_METHOD_7:
-        case CFG_METHOD_8:
-                RTL_W32(tp, TimeInt1, 0x0000);
-                break;
-        case CFG_METHOD_9:
-        case CFG_METHOD_10:
-        case CFG_METHOD_11:
-        case CFG_METHOD_12:
-        case CFG_METHOD_13:
-        case CFG_METHOD_14:
-        case CFG_METHOD_15:
-        case CFG_METHOD_16:
-        case CFG_METHOD_17:
-        case CFG_METHOD_18:
-        case CFG_METHOD_19:
-        case CFG_METHOD_20:
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                RTL_W32(tp, TimeInt1, 0x0000);
-                RTL_W32(tp, TimeInt2, 0x0000);
-                RTL_W32(tp, TimeInt3, 0x0000);
-                break;
-        }
-}
-
-void
-rtl8168_hw_reset(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        rtl8168_lib_reset_prepare(tp);
-
-        /* Disable interrupts */
-        rtl8168_irq_mask_and_ack(tp);
-
-        rtl8168_hw_clear_timer_int(dev);
-
-        rtl8168_nic_reset(dev);
-}
-
-static void rtl8168_doorbell(struct rtl8168_tx_ring *ring)
-{
-        struct rtl8168_private *tp = ring->priv;
-
-        if (ring->index > 0)
-                RTL_W8(tp, TxPoll, HPQ);
-        else
-                RTL_W8(tp, TxPoll, NPQ);
-}
-
-static void rtl8168_mac_loopback_test(struct rtl8168_private *tp)
-{
-        struct rtl8168_tx_ring *tx_ring = &tp->tx_ring[0];
-        struct rtl8168_rx_ring *rx_ring = &tp->rx_ring[0];
-        struct pci_dev *pdev = tp->pci_dev;
-        struct net_device *dev = tp->dev;
-        struct sk_buff *skb, *rx_skb;
-        dma_addr_t mapping;
-        struct TxDesc *txd;
-        struct RxDesc *rxd;
-        void *tmpAddr;
-        u32 len, rx_len, rx_cmd = 0;
-        u16 type;
-        u8 pattern;
-        int i;
-
-        if (tp->DASH)
-                return;
-
-        pattern = 0x5A;
-        len = 60;
-        type = htons(ETH_P_IP);
-        txd = tx_ring->TxDescArray;
-        rxd = rtl8168_get_rxdesc(tp, tp->RxDescArray, 0, rx_ring->index);
-        rx_skb = rx_ring->Rx_skbuff[0];
-        RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) & ~0x00060000) | 0x00020000);
-
-        do {
-                skb = dev_alloc_skb(len + RTK_RX_ALIGN);
-                if (unlikely(!skb))
-                        dev_printk(KERN_NOTICE, tp_to_dev(tp), "-ENOMEM;\n");
-        } while (unlikely(skb == NULL));
-        skb_reserve(skb, RTK_RX_ALIGN);
-
-        memcpy(skb_put(skb, dev->addr_len), dev->dev_addr, dev->addr_len);
-        memcpy(skb_put(skb, dev->addr_len), dev->dev_addr, dev->addr_len);
-        memcpy(skb_put(skb, sizeof(type)), &type, sizeof(type));
-        tmpAddr = skb_put(skb, len - 14);
-
-        mapping = dma_map_single(tp_to_dev(tp), skb->data, len, DMA_TO_DEVICE);
-        dma_sync_single_for_cpu(tp_to_dev(tp), le64_to_cpu(mapping),
-                                len, DMA_TO_DEVICE);
-        txd->addr = cpu_to_le64(mapping);
-        txd->opts2 = 0;
-        while (1) {
-                mem_clear(tmpAddr, len - 14);
-                dma_sync_single_for_device(&tp->pci_dev->dev,
-                                           le64_to_cpu(mapping),
-                                           len, DMA_TO_DEVICE);
-                txd->opts1 = cpu_to_le32(DescOwn | FirstFrag | LastFrag | len);
-
-                RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig)  | AcceptMyPhys);
-
-                smp_wmb();
-                rtl8168_doorbell(tx_ring);    /* set polling bit */
-
-                for (i = 0; i < 50; i++) {
-                        udelay(200);
-                        rx_cmd = le32_to_cpu(rxd->opts1);
-                        if ((rx_cmd & DescOwn) == 0)
-                                break;
-                }
-
-                RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) & ~(AcceptErr | AcceptRunt | AcceptBroadcast | AcceptMulticast | AcceptMyPhys |  AcceptAllPhys));
-
-                rx_len = rx_cmd & 0x3FFF;
-                rx_len -= 4;
-                rxd->opts1 = cpu_to_le32(DescOwn | tp->rx_buf_sz);
-
-                dma_sync_single_for_cpu(tp_to_dev(tp), le64_to_cpu(mapping), len, DMA_TO_DEVICE);
-
-                if (rx_len == len) {
-                        dma_sync_single_for_cpu(tp_to_dev(tp), le64_to_cpu(rxd->addr), tp->rx_buf_sz, DMA_FROM_DEVICE);
-                        i = memcmp(skb->data, rx_skb->data, rx_len);
-                        dma_sync_single_for_device(&tp->pci_dev->dev, le64_to_cpu(rxd->addr), tp->rx_buf_sz, DMA_FROM_DEVICE);
-                        if (i == 0) {
-//              dev_printk(KERN_INFO, tp_to_dev(tp), "loopback test finished\n",rx_len,len);
-                                break;
-                        }
-                }
-
-                rtl8168_hw_reset(dev);
-                rtl8168_disable_rxdvgate(dev);
-                RTL_W8(tp, ChipCmd, CmdTxEnb | CmdRxEnb);
-        }
-        tx_ring->dirty_tx++;
-        rx_ring->dirty_rx++;
-        tx_ring->cur_tx++;
-        rx_ring->cur_rx++;
-        dma_unmap_single(&pdev->dev, le64_to_cpu(mapping),
-                         len, DMA_TO_DEVICE);
-        RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) & ~0x00060000);
-        dev_kfree_skb_any(skb);
-        rtl8168_clear_isr_by_vector(tp, 0, 0xFFBF);
-}
-
-static unsigned int
-rtl8168_xmii_reset_pending(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        unsigned int retval;
-
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        retval = rtl8168_mdio_read(tp, MII_BMCR) & BMCR_RESET;
-
-        return retval;
-}
-
-static unsigned int
-rtl8168_xmii_link_ok(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u8 status;
-
-        status = RTL_R8(tp, PHYstatus);
-        if (status == 0xff)
-                return 0;
-
-        return (status & LinkStatus) ? 1 : 0;
-}
-
-static int
-rtl8168_wait_phy_reset_complete(struct rtl8168_private *tp)
-{
-        int i, val;
-
-        for (i = 0; i < 2500; i++) {
-                val = rtl8168_mdio_read(tp, MII_BMCR) & BMCR_RESET;
-                if (!val)
-                        return 0;
-
-                mdelay(1);
-        }
-
-        return -1;
-}
-
-static void
-rtl8168_xmii_reset_enable(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        if (rtl8168_is_in_phy_disable_mode(dev))
-                return;
-
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, MII_ADVERTISE, rtl8168_mdio_read(tp, MII_ADVERTISE) &
-                           ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
-                             ADVERTISE_100HALF | ADVERTISE_100FULL));
-        rtl8168_mdio_write(tp, MII_CTRL1000, rtl8168_mdio_read(tp, MII_CTRL1000) &
-                           ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL));
-        rtl8168_mdio_write(tp, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
-
-        if (rtl8168_wait_phy_reset_complete(tp) == 0)
-                return;
-
-        if (netif_msg_link(tp))
-                printk(KERN_ERR "%s: PHY reset failed.\n", dev->name);
-}
-
-static void
-rtl8168dp_10mbps_gphy_para(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u8 status = RTL_R8(tp, PHYstatus);
-
-        if ((status & LinkStatus) && (status & _10bps)) {
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                rtl8168_mdio_write(tp, 0x10, 0x04EE);
-        } else {
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                rtl8168_mdio_write(tp, 0x10, 0x01EE);
-        }
-}
-
-void rtl8168_init_ring_indexes(struct rtl8168_private *tp)
-{
-        int i;
-
-        for (i = 0; i < tp->HwSuppNumTxQueues; i++) {
-                struct rtl8168_tx_ring *ring = &tp->tx_ring[i];
-                ring->dirty_tx = ring->cur_tx = 0;
-                ring->index = i;
-                ring->priv = tp;
-        }
-
-        for (i = 0; i < tp->HwSuppNumRxQueues; i++) {
-                struct rtl8168_rx_ring *ring = &tp->rx_ring[i];
-                ring->dirty_rx = ring->cur_rx = 0;
-                ring->index = i;
-                ring->priv = tp;
-        }
-
-#ifdef ENABLE_LIB_SUPPORT
-        for (i = 0; i < tp->HwSuppNumTxQueues; i++) {
-                struct rtl8168_ring *ring = &tp->lib_tx_ring[i];
-                ring->direction = RTL8168_CH_DIR_TX;
-                ring->queue_num = i;
-                ring->private = tp;
-        }
-
-        for (i = 0; i < tp->HwSuppNumRxQueues; i++) {
-                struct rtl8168_ring *ring = &tp->lib_rx_ring[i];
-                ring->direction = RTL8168_CH_DIR_RX;
-                ring->queue_num = i;
-                ring->private = tp;
-        }
-#endif
-}
-
-static void
-rtl8168_issue_offset_99_event(struct rtl8168_private *tp)
-{
-        u32 csi_tmp;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-                if (tp->mcfg == CFG_METHOD_24 || tp->mcfg == CFG_METHOD_25 ||
-                    tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28) {
-                        rtl8168_eri_write(tp, 0x3FC, 4, 0x00000000, ERIAR_ExGMAC);
-                } else {
-                        rtl8168_eri_write(tp, 0x3FC, 4, 0x083C083C, ERIAR_ExGMAC);
-                }
-                csi_tmp = rtl8168_eri_read(tp, 0x3F8, 1, ERIAR_ExGMAC);
-                csi_tmp |= BIT_0;
-                rtl8168_eri_write(tp, 0x3F8, 1, csi_tmp, ERIAR_ExGMAC);
-                break;
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                csi_tmp = rtl8168_eri_read(tp, 0x1EA, 1, ERIAR_ExGMAC);
-                csi_tmp |= BIT_0;
-                rtl8168_eri_write(tp, 0x1EA, 1, csi_tmp, ERIAR_ExGMAC);
-                break;
-        }
-}
-
-static void
-rtl8168_enable_cfg9346_write(struct rtl8168_private *tp)
-{
-        RTL_W8(tp, Cfg9346, RTL_R8(tp, Cfg9346) | Cfg9346_Unlock);
-}
-
-static void
-rtl8168_disable_cfg9346_write(struct rtl8168_private *tp)
-{
-        RTL_W8(tp, Cfg9346, RTL_R8(tp, Cfg9346) & ~Cfg9346_Unlock);
-}
-
-static void
-rtl8168_enable_exit_l1_mask(struct rtl8168_private *tp)
-{
-        u32 csi_tmp;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_16:
-        case CFG_METHOD_17:
-        case CFG_METHOD_18:
-        case CFG_METHOD_19:
-                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
-                csi_tmp |= (BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
-                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
-                break;
-        case CFG_METHOD_20:
-                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
-                csi_tmp |= (BIT_10 | BIT_11);
-                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
-                break;
-        case CFG_METHOD_21 ... CFG_METHOD_37:
-                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
-                csi_tmp |= (BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
-                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
-                break;
-        }
-}
-
-static void
-rtl8168_disable_exit_l1_mask(struct rtl8168_private *tp)
-{
-        u32 csi_tmp;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_16:
-        case CFG_METHOD_17:
-        case CFG_METHOD_18:
-        case CFG_METHOD_19:
-                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
-                csi_tmp &= ~(BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
-                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
-                break;
-        case CFG_METHOD_20:
-                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
-                csi_tmp &= ~(BIT_10 | BIT_11);
-                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
-                break;
-        case CFG_METHOD_21 ... CFG_METHOD_37:
-                csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
-                csi_tmp &= ~(BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12);
-                rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
-                break;
-        }
-}
-
-static void
-rtl8168_hw_aspm_clkreq_enable(struct rtl8168_private *tp, bool enable)
-{
-        if (!tp->HwSuppAspmClkIntrLock)
-                return;
-
-        if (enable && aspm) {
-                RTL_W8(tp, Config5, RTL_R8(tp, Config5) | ASPM_en);
-                RTL_W8(tp, Config2, RTL_R8(tp, Config2) | ClkReqEn);
-        } else {
-                RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~ClkReqEn);
-                RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~ASPM_en);
-        }
-
-        udelay(10);
-}
-
-#ifdef ENABLE_DASH_SUPPORT
-static void
-NICChkTypeEnableDashInterrupt(struct rtl8168_private *tp)
-{
-        if (tp->DASH) {
-                //
-                // even disconnected, enable 3 dash interrupt mask bits for in-band/out-band communication
-                //
-                if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                        rtl8168_enable_dash2_interrupt(tp);
-                        RTL_W16(tp, tp->imr_reg[0], (ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET));
-                } else {
-                        RTL_W16(tp, tp->imr_reg[0], (ISRIMR_DP_DASH_OK | ISRIMR_DP_HOST_OK | ISRIMR_DP_REQSYS_OK));
-                }
-        }
-}
-#endif
-
-static void
-rtl8168_link_on_patch(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        rtl8168_hw_config(dev);
-
-        if (tp->mcfg == CFG_METHOD_18 || tp->mcfg == CFG_METHOD_19 || tp->mcfg == CFG_METHOD_20) {
-                if (RTL_R8(tp, PHYstatus) & _1000bpsF) {
-                        rtl8168_eri_write(tp, 0x1bc, 4, 0x00000011, ERIAR_ExGMAC);
-                        rtl8168_eri_write(tp, 0x1dc, 4, 0x0000001f, ERIAR_ExGMAC);
-                } else if (RTL_R8(tp, PHYstatus) & _100bps) {
-                        rtl8168_eri_write(tp, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
-                        rtl8168_eri_write(tp, 0x1dc, 4, 0x0000001f, ERIAR_ExGMAC);
-                } else {
-                        rtl8168_eri_write(tp, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
-                        rtl8168_eri_write(tp, 0x1dc, 4, 0x0000002d, ERIAR_ExGMAC);
-                }
-        } else if ((tp->mcfg == CFG_METHOD_16 || tp->mcfg == CFG_METHOD_17) && netif_running(dev)) {
-                if (tp->mcfg == CFG_METHOD_16 && (RTL_R8(tp, PHYstatus) & _10bps)) {
-                        RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) | AcceptAllPhys);
-                } else if (tp->mcfg == CFG_METHOD_17) {
-                        if (RTL_R8(tp, PHYstatus) & _1000bpsF) {
-                                rtl8168_eri_write(tp, 0x1bc, 4, 0x00000011, ERIAR_ExGMAC);
-                                rtl8168_eri_write(tp, 0x1dc, 4, 0x00000005, ERIAR_ExGMAC);
-                        } else if (RTL_R8(tp, PHYstatus) & _100bps) {
-                                rtl8168_eri_write(tp, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
-                                rtl8168_eri_write(tp, 0x1dc, 4, 0x00000005, ERIAR_ExGMAC);
-                        } else {
-                                rtl8168_eri_write(tp, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
-                                rtl8168_eri_write(tp, 0x1dc, 4, 0x0000003f, ERIAR_ExGMAC);
-                        }
-                }
-        } else if ((tp->mcfg == CFG_METHOD_14 || tp->mcfg == CFG_METHOD_15) && tp->eee.eee_enabled == 1) {
-                /*Full -Duplex  mode*/
-                if (RTL_R8(tp, PHYstatus)&FullDup) {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0006);
-                        rtl8168_mdio_write(tp, 0x00, 0x5a30);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                        if (RTL_R8(tp, PHYstatus) & (_10bps | _100bps))
-                                RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) & ~BIT_19) | BIT_25);
-
-                } else {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0006);
-                        rtl8168_mdio_write(tp, 0x00, 0x5a00);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                        if (RTL_R8(tp, PHYstatus) & (_10bps | _100bps))
-                                RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) & ~BIT_19) | (InterFrameGap << TxInterFrameGapShift));
-                }
-        } else if ((tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
-                    tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_24 ||
-                    tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
-                    tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
-                    tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-                    tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                    tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
-                    tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
-                    tp->mcfg == CFG_METHOD_37) && netif_running(dev)) {
-                if (RTL_R8(tp, PHYstatus)&FullDup)
-                        RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) | (BIT_24 | BIT_25)) & ~BIT_19);
-                else
-                        RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) | BIT_25) & ~(BIT_19 | BIT_24));
-        }
-
-        if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
-            tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
-            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) {
-                /*half mode*/
-                if (!(RTL_R8(tp, PHYstatus)&FullDup)) {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                        rtl8168_mdio_write(tp, MII_ADVERTISE, rtl8168_mdio_read(tp, MII_ADVERTISE)&~(ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM));
-                }
-        }
-
-        if ((tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-             tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) &&
-            (RTL_R8(tp, PHYstatus) & _10bps)) {
-                u32 csi_tmp;
-
-                csi_tmp = rtl8168_eri_read(tp, 0x1D0, 1, ERIAR_ExGMAC);
-                csi_tmp |= BIT_1;
-                rtl8168_eri_write(tp, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
-        }
-
-        rtl8168_hw_start(dev);
-
-        netif_carrier_on(dev);
-
-        netif_tx_wake_all_queues(dev);
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        tp->phy_reg_aner = rtl8168_mdio_read(tp, MII_EXPANSION);
-        tp->phy_reg_anlpar = rtl8168_mdio_read(tp, MII_LPA);
-        tp->phy_reg_gbsr = rtl8168_mdio_read(tp, MII_STAT1000);
-}
-
-static void
-rtl8168_link_down_patch(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        tp->phy_reg_aner = 0;
-        tp->phy_reg_anlpar = 0;
-        tp->phy_reg_gbsr = 0;
-
-        netif_carrier_off(dev);
-
-        netif_tx_disable(dev);
-
-        rtl8168_hw_reset(dev);
-
-        rtl8168_tx_clear(tp);
-
-        rtl8168_rx_clear(tp);
-
-        rtl8168_init_ring(dev);
-
-        if (dynamic_aspm) {
-                rtl8168_enable_cfg9346_write(tp);
-                rtl8168_hw_aspm_clkreq_enable(tp, true);
-                rtl8168_disable_cfg9346_write(tp);
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-                if (tp->org_pci_offset_99 & BIT_2)
-                        tp->issue_offset_99_event = TRUE;
-                break;
-        }
-
-#ifdef ENABLE_DASH_SUPPORT
-        if (tp->DASH) {
-                NICChkTypeEnableDashInterrupt(tp);
-        }
-#endif
-}
-
-static void
-rtl8168_check_link_status(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int link_status_on;
-
-#ifdef ENABLE_FIBER_SUPPORT
-        rtl8168_check_fiber_link_status(tp);
-#endif //ENABLE_FIBER_SUPPORT
-
-        link_status_on = tp->link_ok(dev);
-
-        if (tp->mcfg == CFG_METHOD_11)
-                rtl8168dp_10mbps_gphy_para(dev);
-
-        if (netif_carrier_ok(dev) != link_status_on) {
-                if (link_status_on) {
-                        rtl8168_link_on_patch(dev);
-
-                        if (netif_msg_ifup(tp))
-                                printk(KERN_INFO PFX "%s: link up\n", dev->name);
-                } else {
-                        if (netif_msg_ifdown(tp))
-                                printk(KERN_INFO PFX "%s: link down\n", dev->name);
-
-                        rtl8168_link_down_patch(dev);
-                }
-        }
-
-        if (!link_status_on) {
-                switch (tp->mcfg) {
-                case CFG_METHOD_21:
-                case CFG_METHOD_22:
-                case CFG_METHOD_23:
-                case CFG_METHOD_24:
-                case CFG_METHOD_25:
-                case CFG_METHOD_27:
-                case CFG_METHOD_28:
-                case CFG_METHOD_31:
-                case CFG_METHOD_32:
-                case CFG_METHOD_33:
-                case CFG_METHOD_34:
-                        if (tp->issue_offset_99_event) {
-                                if (!(RTL_R8(tp, PHYstatus) & PowerSaveStatus)) {
-                                        tp->issue_offset_99_event = FALSE;
-                                        rtl8168_issue_offset_99_event(tp);
-                                }
-                        }
-                        break;
-                }
-        } else {
-                if (dynamic_aspm) {
-                        bool enable_hw_aspm_clkreq = true;
-                        if (tp->dynamic_aspm_packet_count > dynamic_aspm_packet_threshold)
-                                enable_hw_aspm_clkreq = false;
-
-                        rtl8168_enable_cfg9346_write(tp);
-                        rtl8168_hw_aspm_clkreq_enable(tp, enable_hw_aspm_clkreq);
-                        rtl8168_disable_cfg9346_write(tp);
-                }
-                tp->dynamic_aspm_packet_count = 0;
-        }
-}
-
-static void
-rtl8168_link_option(u8 *aut,
-                    u32 *spd,
-                    u8 *dup,
-                    u32 *adv)
-{
-        if ((*spd != SPEED_1000) && (*spd != SPEED_100) && (*spd != SPEED_10))
-                *spd = SPEED_1000;
-
-        if ((*dup != DUPLEX_FULL) && (*dup != DUPLEX_HALF))
-                *dup = DUPLEX_FULL;
-
-        if ((*aut != AUTONEG_ENABLE) && (*aut != AUTONEG_DISABLE))
-                *aut = AUTONEG_ENABLE;
-
-        *adv &= (ADVERTISED_10baseT_Half |
-                 ADVERTISED_10baseT_Full |
-                 ADVERTISED_100baseT_Half |
-                 ADVERTISED_100baseT_Full |
-                 ADVERTISED_1000baseT_Half |
-                 ADVERTISED_1000baseT_Full);
-        if (*adv == 0)
-                *adv = (ADVERTISED_10baseT_Half |
-                        ADVERTISED_10baseT_Full |
-                        ADVERTISED_100baseT_Half |
-                        ADVERTISED_100baseT_Full |
-                        ADVERTISED_1000baseT_Half |
-                        ADVERTISED_1000baseT_Full);
-}
-
-static void
-rtl8168_enable_ocp_phy_power_saving(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u16 val;
-
-        if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
-            tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
-            tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
-            tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
-            tp->mcfg == CFG_METHOD_37) {
-                val = rtl8168_mdio_read_phy_ocp(tp, 0x0C41, 0x13);
-                if (val != 0x0050) {
-                        rtl8168_set_phy_mcu_patch_request(tp);
-                        rtl8168_mdio_write_phy_ocp(tp, 0x0C41, 0x13, 0x0000);
-                        rtl8168_mdio_write_phy_ocp(tp, 0x0C41, 0x13, 0x0050);
-                        rtl8168_clear_phy_mcu_patch_request(tp);
-                }
-        }
-}
-
-static void
-rtl8168_disable_ocp_phy_power_saving(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u16 val;
-
-        if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
-            tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
-            tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
-            tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
-            tp->mcfg == CFG_METHOD_37) {
-                val = rtl8168_mdio_read_phy_ocp(tp, 0x0C41, 0x13);
-                if (val != 0x0500) {
-                        rtl8168_set_phy_mcu_patch_request(tp);
-                        rtl8168_mdio_write_phy_ocp(tp, 0x0C41, 0x13, 0x0000);
-                        rtl8168_mdio_write_phy_ocp(tp, 0x0C41, 0x13, 0x0500);
-                        rtl8168_clear_phy_mcu_patch_request(tp);
-                }
-        }
-}
-
-void
-rtl8168_wait_ll_share_fifo_ready(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int i;
-
-        for (i = 0; i < 10; i++) {
-                udelay(100);
-                if (RTL_R16(tp, 0xD2) & BIT_9)
-                        break;
-        }
-}
-
-static void
-rtl8168_disable_pci_offset_99(struct rtl8168_private *tp)
-{
-        u32 csi_tmp;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                csi_tmp = rtl8168_eri_read(tp, 0x3F2, 2, ERIAR_ExGMAC);
-                csi_tmp &= ~(BIT_0 | BIT_1);
-                rtl8168_eri_write(tp, 0x3F2, 2, csi_tmp, ERIAR_ExGMAC);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_26:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                rtl8168_csi_fun0_write_byte(tp, 0x99, 0x00);
-                break;
-        }
-}
-
-static void
-rtl8168_enable_pci_offset_99(struct rtl8168_private *tp)
-{
-        u32 csi_tmp;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_26:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                rtl8168_csi_fun0_write_byte(tp, 0x99, tp->org_pci_offset_99);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                csi_tmp = rtl8168_eri_read(tp, 0x3F2, 2, ERIAR_ExGMAC);
-                csi_tmp &= ~(BIT_0 | BIT_1);
-                if (tp->org_pci_offset_99 & (BIT_5 | BIT_6))
-                        csi_tmp |= BIT_1;
-                if (tp->org_pci_offset_99 & BIT_2)
-                        csi_tmp |= BIT_0;
-                rtl8168_eri_write(tp, 0x3F2, 2, csi_tmp, ERIAR_ExGMAC);
-                break;
-        }
-}
-
-static void
-rtl8168_init_pci_offset_99(struct rtl8168_private *tp)
-{
-        u32 csi_tmp;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_26:
-                if (tp->org_pci_offset_99 & BIT_2) {
-                        csi_tmp = rtl8168_eri_read(tp, 0x5C2, 1, ERIAR_ExGMAC);
-                        csi_tmp &= ~BIT_1;
-                        rtl8168_eri_write(tp, 0x5C2, 1, csi_tmp, ERIAR_ExGMAC);
-                }
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                csi_tmp = rtl8168_eri_read(tp, 0x3F2, 2, ERIAR_ExGMAC);
-                csi_tmp &= ~( BIT_8 | BIT_9  | BIT_10 | BIT_11  | BIT_12  | BIT_13  | BIT_14 | BIT_15 );
-                csi_tmp |= ( BIT_9 | BIT_10 | BIT_13  | BIT_14 | BIT_15 );
-                rtl8168_eri_write(tp, 0x3F2, 2, csi_tmp, ERIAR_ExGMAC);
-                csi_tmp = rtl8168_eri_read(tp, 0x3F5, 1, ERIAR_ExGMAC);
-                csi_tmp |= BIT_6 | BIT_7;
-                rtl8168_eri_write(tp, 0x3F5, 1, csi_tmp, ERIAR_ExGMAC);
-                rtl8168_mac_ocp_write(tp, 0xE02C, 0x1880);
-                rtl8168_mac_ocp_write(tp, 0xE02E, 0x4880);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_26:
-                rtl8168_eri_write(tp, 0x5C0, 1, 0xFA, ERIAR_ExGMAC);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_26:
-                if (tp->org_pci_offset_99 & BIT_2) {
-                        csi_tmp = rtl8168_eri_read(tp, 0x5C8, 1, ERIAR_ExGMAC);
-                        csi_tmp |= BIT_0;
-                        rtl8168_eri_write(tp, 0x5C8, 1, csi_tmp, ERIAR_ExGMAC);
-                }
-                break;
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                if (tp->org_pci_offset_99 & BIT_2)
-                        rtl8168_mac_ocp_write(tp, 0xE0A2, rtl8168_mac_ocp_read(tp, 0xE0A2) | BIT_0);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_23:
-                rtl8168_eri_write(tp, 0x2E8, 2, 0x883C, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0x2EA, 2, 0x8C12, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0x2EC, 2, 0x9003, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0x2E2, 2, 0x883C, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0x2E4, 2, 0x8C12, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0x2E6, 2, 0x9003, ERIAR_ExGMAC);
-                break;
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                rtl8168_eri_write(tp, 0x2E8, 2, 0x9003, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0x2EA, 2, 0x9003, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0x2EC, 2, 0x9003, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0x2E2, 2, 0x883C, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0x2E4, 2, 0x8C12, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0x2E6, 2, 0x9003, ERIAR_ExGMAC);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-                csi_tmp = rtl8168_eri_read(tp, 0x3FA, 2, ERIAR_ExGMAC);
-                csi_tmp |= BIT_14;
-                rtl8168_eri_write(tp, 0x3FA, 2, csi_tmp, ERIAR_ExGMAC);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_26:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                if (tp->org_pci_offset_99 & BIT_2)
-                        RTL_W8(tp, 0xB6, RTL_R8(tp, 0xB6) | BIT_0);
-                break;
-        }
-
-        rtl8168_enable_pci_offset_99(tp);
-}
-
-static void
-rtl8168_disable_pci_offset_180(struct rtl8168_private *tp)
-{
-        u32 csi_tmp;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                csi_tmp = rtl8168_eri_read(tp, 0x1E2, 1, ERIAR_ExGMAC);
-                csi_tmp &= ~BIT_2;
-                rtl8168_eri_write(tp, 0x1E2, 1, csi_tmp, ERIAR_ExGMAC);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_26:
-                rtl8168_eri_write(tp, 0x1E9, 1, 0x0A, ERIAR_ExGMAC);
-                break;
-        }
-}
-
-static void
-rtl8168_enable_pci_offset_180(struct rtl8168_private *tp)
-{
-        u32 csi_tmp;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_25:
-        case CFG_METHOD_28:
-                csi_tmp = rtl8168_eri_read(tp, 0x1E8, 4, ERIAR_ExGMAC);
-                csi_tmp &= ~(0x0000FF00);
-                csi_tmp |= (0x00006400);
-                rtl8168_eri_write(tp, 0x1E8, 4, csi_tmp, ERIAR_ExGMAC);
-
-                csi_tmp = rtl8168_eri_read(tp, 0x1E4, 4, ERIAR_ExGMAC);
-                csi_tmp &= ~(0x0000FF00);
-                rtl8168_eri_write(tp, 0x1E4, 4, csi_tmp, ERIAR_ExGMAC);
-                break;
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-                csi_tmp = rtl8168_eri_read(tp, 0x1E8, 4, ERIAR_ExGMAC);
-                csi_tmp &= ~(0x0000FFF0);
-                csi_tmp |= (0x00000640);
-                rtl8168_eri_write(tp, 0x1E8, 4, csi_tmp, ERIAR_ExGMAC);
-
-                csi_tmp = rtl8168_eri_read(tp, 0x1E4, 4, ERIAR_ExGMAC);
-                csi_tmp &= ~(0x0000FF00);
-                rtl8168_eri_write(tp, 0x1E4, 4, csi_tmp, ERIAR_ExGMAC);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-                csi_tmp = rtl8168_eri_read(tp, 0x1E8, 2, ERIAR_ExGMAC);
-                csi_tmp &= ~(0xFFF0);
-                csi_tmp |= 0x0640;
-                rtl8168_eri_write(tp,0x1E8, 2, csi_tmp, ERIAR_ExGMAC);
-
-                csi_tmp = rtl8168_eri_read(tp, 0x1E4, 2, ERIAR_ExGMAC);
-                csi_tmp &= ~(0xFF00);
-                rtl8168_eri_write(tp, 0x1E4, 2, csi_tmp, ERIAR_ExGMAC);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                csi_tmp = rtl8168_eri_read(tp, 0x1E2, 1, ERIAR_ExGMAC);
-                csi_tmp |= BIT_2;
-                rtl8168_eri_write(tp, 0x1E2, 1, csi_tmp, ERIAR_ExGMAC);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_26:
-                rtl8168_eri_write(tp, 0x1E9, 1, 0x64, ERIAR_ExGMAC);
-                break;
-        }
-
-        rtl8168_mac_ocp_write(tp, 0xE094, 0x0000);
-}
-
-static void
-rtl8168_init_pci_offset_180(struct rtl8168_private *tp)
-{
-        rtl8168_enable_pci_offset_180(tp);
-}
-
-static void
-rtl8168_set_pci_99_180_exit_driver_para(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                if (tp->org_pci_offset_99 & BIT_2)
-                        rtl8168_issue_offset_99_event(tp);
-                rtl8168_disable_pci_offset_99(tp);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                rtl8168_disable_pci_offset_180(tp);
-                break;
-        }
-}
-
-static void
-rtl8168_set_rx_q_num(struct rtl8168_private *tp,
-                     unsigned int num_rx_queues)
-{
-        u16 q_ctrl;
-        u16 rx_q_num;
-
-        if (tp->HwSuppRxDescType != RX_DESC_RING_TYPE_2)
-                return;
-
-        if (num_rx_queues > tp->HwSuppNumRxQueues ||
-            num_rx_queues < 1)
-                num_rx_queues = 1;
-
-        rx_q_num = (u16)ilog2(num_rx_queues);
-        rx_q_num &= (BIT_0 | BIT_1 | BIT_2);
-        rx_q_num <<= 2;
-        q_ctrl = rtl8168_eri_read(tp, Q_NUM_CTRL_8168, 2, ERIAR_ExGMAC);
-        q_ctrl &= ~(BIT_2 | BIT_3 | BIT_4);
-        q_ctrl |= rx_q_num;
-        rtl8168_eri_write(tp, Q_NUM_CTRL_8168, 2, q_ctrl, ERIAR_ExGMAC);
-}
-
-void
-rtl8168_set_rx_vlan_filter(struct rtl8168_private *tp)
-{
-        int i;
-
-        if (tp->HwSuppRxDescType != RX_DESC_RING_TYPE_2)
-                return;
-
-        for (i = 1; i < 16; i++) {
-                rtl8168_eri_write(tp, 0xf0 + 8*i, 4, 0xffff0000, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xf4 + 8*i, 4, 0xffffffff, ERIAR_ExGMAC);
-        }
-}
-
-static void
-rtl8168_hw_d3_para(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_1 ... CFG_METHOD_26:
-                RTL_W16(tp, RxMaxSize, RX_BUF_SIZE + 1);
-                break;
-        default:
-                RTL_W16(tp, RxMaxSize, RX_BUF_SIZE);
-                break;
-        }
-
-        if (tp->HwSuppAspmClkIntrLock) {
-                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7);
-                rtl8168_enable_cfg9346_write(tp);
-                rtl8168_hw_aspm_clkreq_enable(tp, false);
-                rtl8168_disable_cfg9346_write(tp);
-        }
-
-        rtl8168_disable_exit_l1_mask(tp);
-
-#ifdef ENABLE_REALWOW_SUPPORT
-        rtl8168_set_realwow_d3_para(dev);
-#endif
-        rtl8168_set_rx_q_num(tp, 1);
-
-        if (tp->mcfg == CFG_METHOD_18 || tp->mcfg == CFG_METHOD_19 || tp->mcfg == CFG_METHOD_20) {
-                rtl8168_eri_write(tp, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0x1dc, 4, 0x0000002d, ERIAR_ExGMAC);
-        } else if (tp->mcfg == CFG_METHOD_16) {
-                rtl8168_eri_write(tp, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0x1dc, 4, 0x0000003f, ERIAR_ExGMAC);
-        }
-
-        if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
-            tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_24 ||
-            tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
-            tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28)
-                rtl8168_eri_write(tp, 0x2F8, 2, 0x0064, ERIAR_ExGMAC);
-
-        if (tp->bios_setting & BIT_28) {
-                if (tp->mcfg == CFG_METHOD_18 || tp->mcfg == CFG_METHOD_19 ||
-                    tp->mcfg == CFG_METHOD_20) {
-                        u32 gphy_val;
-
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                        rtl8168_mdio_write(tp, 0x04, 0x0061);
-                        rtl8168_mdio_write(tp, 0x09, 0x0000);
-                        rtl8168_mdio_write(tp, 0x00, 0x9200);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                        rtl8168_mdio_write(tp, 0x05, 0x8B80);
-                        gphy_val = rtl8168_mdio_read(tp, 0x06);
-                        gphy_val &= ~BIT_7;
-                        rtl8168_mdio_write(tp, 0x06, gphy_val);
-                        mdelay(1);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                        rtl8168_mdio_write(tp, 0x1E, 0x002C);
-                        gphy_val = rtl8168_mdio_read(tp, 0x16);
-                        gphy_val &= ~BIT_10;
-                        rtl8168_mdio_write(tp, 0x16, gphy_val);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                }
-        }
-
-        rtl8168_set_pci_99_180_exit_driver_para(dev);
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-                rtl8168_set_mcu_ocp_bit(tp, 0xD438, BIT_3);
-                rtl8168_set_mcu_ocp_bit(tp, 0xD438, BIT_2);
-                rtl8168_clear_mcu_ocp_bit(tp, 0xDE28, (BIT_1 | BIT_0));
-                rtl8168_set_mcu_ocp_bit(tp, 0xD438, (BIT_1 | BIT_0));
-                break;
-        }
-
-        /*disable ocp phy power saving*/
-        if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
-            tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
-            tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
-            tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
-            tp->mcfg == CFG_METHOD_37)
-                if (!tp->dash_printer_enabled)
-                        rtl8168_disable_ocp_phy_power_saving(dev);
-
-        rtl8168_disable_rxdvgate(dev);
-}
-
-static void
-rtl8168_enable_magic_packet(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u32 csi_tmp;
-
-        switch (tp->HwSuppMagicPktVer) {
-        case WAKEUP_MAGIC_PACKET_V1:
-                rtl8168_enable_cfg9346_write(tp);
-                RTL_W8(tp, Config3, RTL_R8(tp, Config3) | MagicPacket);
-                rtl8168_disable_cfg9346_write(tp);
-                break;
-        case WAKEUP_MAGIC_PACKET_V2:
-                csi_tmp = rtl8168_eri_read(tp, 0xDE, 1, ERIAR_ExGMAC);
-                csi_tmp |= BIT_0;
-                rtl8168_eri_write(tp, 0xDE, 1, csi_tmp, ERIAR_ExGMAC);
-                break;
-        }
-}
-static void
-rtl8168_disable_magic_packet(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u32 csi_tmp;
-
-        switch (tp->HwSuppMagicPktVer) {
-        case WAKEUP_MAGIC_PACKET_V1:
-                rtl8168_enable_cfg9346_write(tp);
-                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~MagicPacket);
-                rtl8168_disable_cfg9346_write(tp);
-                break;
-        case WAKEUP_MAGIC_PACKET_V2:
-                csi_tmp = rtl8168_eri_read(tp, 0xDE, 1, ERIAR_ExGMAC);
-                csi_tmp &= ~BIT_0;
-                rtl8168_eri_write(tp, 0xDE, 1, csi_tmp, ERIAR_ExGMAC);
-                break;
-        }
-}
-
-#define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
-
-static void
-rtl8168_get_hw_wol(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u8 options;
-        u32 csi_tmp;
-
-        if (disable_wol_support)
-                goto out;
-
-        tp->wol_opts = 0;
-        options = RTL_R8(tp, Config1);
-        if (!(options & PMEnable))
-                goto out;
-
-        options = RTL_R8(tp, Config3);
-        if (options & LinkUp)
-                tp->wol_opts |= WAKE_PHY;
-
-        switch (tp->HwSuppMagicPktVer) {
-        case WAKEUP_MAGIC_PACKET_V2:
-                csi_tmp = rtl8168_eri_read(tp, 0xDE, 1, ERIAR_ExGMAC);
-                if (csi_tmp & BIT_0)
-                        tp->wol_opts |= WAKE_MAGIC;
-                break;
-        default:
-                if (options & MagicPacket)
-                        tp->wol_opts |= WAKE_MAGIC;
-                break;
-        }
-
-        options = RTL_R8(tp, Config5);
-        if (options & UWF)
-                tp->wol_opts |= WAKE_UCAST;
-        if (options & BWF)
-                tp->wol_opts |= WAKE_BCAST;
-        if (options & MWF)
-                tp->wol_opts |= WAKE_MCAST;
-
-out:
-        tp->wol_enabled = (tp->wol_opts || tp->dash_printer_enabled) ? WOL_ENABLED : WOL_DISABLED;
-}
-
-static void
-rtl8168_set_hw_wol(struct net_device *dev, u32 wolopts)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int i,tmp;
-        static struct {
-                u32 opt;
-                u16 reg;
-                u8  mask;
-        } cfg[] = {
-                { WAKE_PHY,   Config3, LinkUp },
-                { WAKE_UCAST, Config5, UWF },
-                { WAKE_BCAST, Config5, BWF },
-                { WAKE_MCAST, Config5, MWF },
-                { WAKE_ANY,   Config5, LanWake },
-                { WAKE_MAGIC, Config3, MagicPacket },
-        };
-
-        switch (tp->HwSuppMagicPktVer) {
-        case WAKEUP_MAGIC_PACKET_V2:
-                tmp = ARRAY_SIZE(cfg) - 1;
-
-                if (wolopts & WAKE_MAGIC)
-                        rtl8168_enable_magic_packet(dev);
-                else
-                        rtl8168_disable_magic_packet(dev);
-                break;
-        default:
-                tmp = ARRAY_SIZE(cfg);
-                break;
-        }
-
-        rtl8168_enable_cfg9346_write(tp);
-
-        for (i = 0; i < tmp; i++) {
-                u8 options = RTL_R8(tp, cfg[i].reg) & ~cfg[i].mask;
-                if (wolopts & cfg[i].opt)
-                        options |= cfg[i].mask;
-                RTL_W8(tp, cfg[i].reg, options);
-        }
-
-        if (tp->dash_printer_enabled)
-                RTL_W8(tp, Config5, RTL_R8(tp, Config5) | LanWake);
-
-        rtl8168_disable_cfg9346_write(tp);
-}
-
-static void
-rtl8168_phy_restart_nway(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        if (rtl8168_is_in_phy_disable_mode(dev))
-                return;
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        rtl8168_mdio_write(tp, MII_BMCR, BMCR_RESET | BMCR_ANENABLE | BMCR_ANRESTART);
-}
-
-static void
-rtl8168_phy_setup_force_mode(struct net_device *dev, u32 speed, u8 duplex)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u16 bmcr_true_force = 0;
-
-        if (rtl8168_is_in_phy_disable_mode(dev))
-                return;
-
-        if ((speed == SPEED_10) && (duplex == DUPLEX_HALF)) {
-                bmcr_true_force = BMCR_SPEED10;
-        } else if ((speed == SPEED_10) && (duplex == DUPLEX_FULL)) {
-                bmcr_true_force = BMCR_SPEED10 | BMCR_FULLDPLX;
-        } else if ((speed == SPEED_100) && (duplex == DUPLEX_HALF)) {
-                bmcr_true_force = BMCR_SPEED100;
-        } else if ((speed == SPEED_100) && (duplex == DUPLEX_FULL)) {
-                bmcr_true_force = BMCR_SPEED100 | BMCR_FULLDPLX;
-        } else {
-                netif_err(tp, drv, dev, "Failed to set phy force mode!\n");
-                return;
-        }
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        rtl8168_mdio_write(tp, MII_BMCR, bmcr_true_force);
-}
-
-static void
-rtl8168_set_pci_pme(struct rtl8168_private *tp, int set)
-{
-        struct pci_dev *pdev = tp->pci_dev;
-        u16 pmc;
-
-        if (!pdev->pm_cap)
-                return;
-
-        pci_read_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, &pmc);
-        pmc |= PCI_PM_CTRL_PME_STATUS;
-        if (set)
-                pmc |= PCI_PM_CTRL_PME_ENABLE;
-        else
-                pmc &= ~PCI_PM_CTRL_PME_ENABLE;
-        pci_write_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, pmc);
-}
-
-static void
-rtl8168_set_wol_link_speed(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int auto_nego;
-        int giga_ctrl;
-        u32 adv;
-        u16 anlpar;
-        u16 gbsr;
-        u16 aner;
-
-        if (tp->autoneg != AUTONEG_ENABLE)
-                goto exit;
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-        auto_nego = rtl8168_mdio_read(tp, MII_ADVERTISE);
-        auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL
-                       | ADVERTISE_100HALF | ADVERTISE_100FULL);
-
-        giga_ctrl = rtl8168_mdio_read(tp, MII_CTRL1000);
-        giga_ctrl &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL);
-
-        aner = tp->phy_reg_aner;
-        anlpar = tp->phy_reg_anlpar;
-        gbsr = tp->phy_reg_gbsr;
-        if (tp->link_ok(dev)) {
-                aner = rtl8168_mdio_read(tp, MII_EXPANSION);
-                anlpar = rtl8168_mdio_read(tp, MII_LPA);
-                gbsr = rtl8168_mdio_read(tp, MII_STAT1000);
-        }
-
-        adv = tp->advertising;
-        if ((aner | anlpar | gbsr) == 0) {
-                int auto_nego_tmp = 0;
-
-                if (adv & ADVERTISED_10baseT_Half)
-                        auto_nego_tmp |= ADVERTISE_10HALF;
-                if (adv & ADVERTISED_10baseT_Full)
-                        auto_nego_tmp |= ADVERTISE_10FULL;
-                if (adv & ADVERTISED_100baseT_Half)
-                        auto_nego_tmp |= ADVERTISE_100HALF;
-                if (adv & ADVERTISED_100baseT_Full)
-                        auto_nego_tmp |= ADVERTISE_100FULL;
-
-                if (auto_nego_tmp == 0)
-                        goto exit;
-
-                auto_nego |= auto_nego_tmp;
-                goto skip_check_lpa;
-        }
-        if (!(aner & EXPANSION_NWAY))
-                goto exit;
-
-        if ((adv & ADVERTISED_10baseT_Half) && (anlpar & LPA_10HALF))
-                auto_nego |= ADVERTISE_10HALF;
-        else if ((adv & ADVERTISED_10baseT_Full) && (anlpar & LPA_10FULL))
-                auto_nego |= ADVERTISE_10FULL;
-        else if ((adv & ADVERTISED_100baseT_Half) && (anlpar & LPA_100HALF))
-                auto_nego |= ADVERTISE_100HALF;
-        else if ((adv & ADVERTISED_100baseT_Full) && (anlpar & LPA_100FULL))
-                auto_nego |= ADVERTISE_100FULL;
-        else if (adv & ADVERTISED_1000baseT_Half && (gbsr & LPA_1000HALF))
-                giga_ctrl |= ADVERTISE_1000HALF;
-        else if (adv & ADVERTISED_1000baseT_Full && (gbsr & LPA_1000FULL))
-                giga_ctrl |= ADVERTISE_1000FULL;
-        else
-                goto exit;
-
-skip_check_lpa:
-        if (tp->DASH)
-                auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL);
-
-        if (((tp->mcfg == CFG_METHOD_7) || (tp->mcfg == CFG_METHOD_8)) && (RTL_R16(tp, CPlusCmd) & ASF))
-                auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL);
-
-#ifdef CONFIG_DOWN_SPEED_100
-        auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL);
-#endif
-
-        rtl8168_mdio_write(tp, MII_ADVERTISE, auto_nego);
-        rtl8168_mdio_write(tp, MII_CTRL1000, giga_ctrl);
-
-        rtl8168_phy_restart_nway(dev);
-
-exit:
-        return;
-}
-
-static void
-rtl8168_powerdown_pll(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        if (tp->wol_enabled == WOL_ENABLED || tp->DASH || tp->EnableKCPOffload) {
-                rtl8168_set_hw_wol(dev, tp->wol_opts);
-
-                if (tp->mcfg == CFG_METHOD_16 || tp->mcfg == CFG_METHOD_17 ||
-                    tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
-                    tp->mcfg == CFG_METHOD_24 || tp->mcfg == CFG_METHOD_25 ||
-                    tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_23 ||
-                    tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
-                    tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-                    tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                    tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
-                    tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36) {
-                        rtl8168_enable_cfg9346_write(tp);
-                        RTL_W8(tp, Config2, RTL_R8(tp, Config2) | PMSTS_En);
-                        rtl8168_disable_cfg9346_write(tp);
-                }
-
-                /* Enable the PME and clear the status */
-                rtl8168_set_pci_pme(tp, 1);
-
-#ifdef ENABLE_FIBER_SUPPORT
-                if (HW_FIBER_MODE_ENABLED(tp))
-                        return;
-#endif //ENABLE_FIBER_SUPPORT
-
-                if (HW_SUPP_SERDES_PHY(tp))
-                        return;
-
-                rtl8168_set_wol_link_speed(dev);
-
-                RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) | AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
-
-                return;
-        }
-
-        rtl8168_set_hw_wol(dev, 0);
-
-#ifdef ENABLE_FIBER_SUPPORT
-        if (HW_FIBER_MODE_ENABLED(tp))
-                return;
-#endif //ENABLE_FIBER_SUPPORT
-
-        if (tp->DASH)
-                return;
-
-        if (((tp->mcfg == CFG_METHOD_7) || (tp->mcfg == CFG_METHOD_8)) && (RTL_R16(tp, CPlusCmd) & ASF))
-                return;
-
-        rtl8168_phy_power_down(dev);
-
-        if (!tp->HwIcVerUnknown) {
-                switch (tp->mcfg) {
-                case CFG_METHOD_9:
-                case CFG_METHOD_10:
-                //case CFG_METHOD_11:
-                case CFG_METHOD_12:
-                case CFG_METHOD_13:
-                case CFG_METHOD_14:
-                case CFG_METHOD_15:
-                case CFG_METHOD_17:
-                case CFG_METHOD_18:
-                case CFG_METHOD_19:
-                case CFG_METHOD_21:
-                case CFG_METHOD_22:
-                case CFG_METHOD_24:
-                case CFG_METHOD_25:
-                case CFG_METHOD_26:
-                case CFG_METHOD_27:
-                case CFG_METHOD_28:
-                case CFG_METHOD_29:
-                case CFG_METHOD_30:
-                case CFG_METHOD_31:
-                case CFG_METHOD_32:
-                case CFG_METHOD_33:
-                case CFG_METHOD_34:
-                case CFG_METHOD_35:
-                case CFG_METHOD_36:
-                        RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~BIT_7);
-                        break;
-                }
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_14 ... CFG_METHOD_15:
-                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_6);
-                break;
-        case CFG_METHOD_16 ... CFG_METHOD_36:
-                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_6);
-                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_6);
-                break;
-        }
-}
-
-static void rtl8168_powerup_pll(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_9:
-        case CFG_METHOD_10:
-        case CFG_METHOD_11:
-        case CFG_METHOD_12:
-        case CFG_METHOD_13:
-        case CFG_METHOD_14:
-        case CFG_METHOD_15:
-        case CFG_METHOD_17:
-        case CFG_METHOD_18:
-        case CFG_METHOD_19:
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-                RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | BIT_7 | BIT_6);
-                break;
-        }
-
-        rtl8168_phy_power_up(dev);
-}
-
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
-static void
-rtl8168_get_wol(struct net_device *dev,
-                struct ethtool_wolinfo *wol)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u8 options;
-
-        wol->wolopts = wol->supported = 0;
-
-        if (disable_wol_support)
-                return;
-
-        wol->supported = WAKE_ANY;
-
-        options = RTL_R8(tp, Config1);
-        if (!(options & PMEnable))
-                return;
-
-        wol->wolopts = tp->wol_opts;
-}
-
-static int
-rtl8168_set_wol(struct net_device *dev,
-                struct ethtool_wolinfo *wol)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        if (disable_wol_support)
-                return -EOPNOTSUPP;
-
-        tp->wol_opts = wol->wolopts;
-
-        tp->wol_enabled = (tp->wol_opts || tp->dash_printer_enabled) ? WOL_ENABLED : WOL_DISABLED;
-
-        device_set_wakeup_enable(tp_to_dev(tp), tp->wol_enabled);
-
-        return 0;
-}
-
-static void
-rtl8168_get_drvinfo(struct net_device *dev,
-                    struct ethtool_drvinfo *info)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        struct rtl8168_fw *rtl_fw = tp->rtl_fw;
-
-        strcpy(info->driver, MODULENAME);
-        strcpy(info->version, RTL8168_VERSION);
-        strncpy(info->bus_info, pci_name(tp->pci_dev), sizeof(info->bus_info) - 1);
-        info->regdump_len = R8168_REGS_DUMP_SIZE;
-        info->eedump_len = tp->eeprom_len;
-        BUILD_BUG_ON(sizeof(info->fw_version) < sizeof(rtl_fw->version));
-        if (rtl_fw)
-                strlcpy(info->fw_version, rtl_fw->version,
-                        sizeof(info->fw_version));
-}
-
-static int
-rtl8168_get_regs_len(struct net_device *dev)
-{
-        return R8168_REGS_DUMP_SIZE;
-}
-#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
-
-static int
-rtl8168_set_speed_xmii(struct net_device *dev,
-                       u8 autoneg,
-                       u32 speed,
-                       u8 duplex,
-                       u32 adv)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int auto_nego = 0;
-        int giga_ctrl = 0;
-        int rc = -EINVAL;
-
-        if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
-            tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36) {
-                //Disable Giga Lite
-                rtl8168_mdio_write(tp, 0x1F, 0x0A42);
-                rtl8168_clear_eth_phy_bit(tp, 0x14, BIT_9);
-                if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                    tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34)
-                        rtl8168_clear_eth_phy_bit(tp, 0x14, BIT_7);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A40);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        }
-
-        if ((speed != SPEED_1000) &&
-            (speed != SPEED_100) &&
-            (speed != SPEED_10)) {
-                speed = SPEED_1000;
-                duplex = DUPLEX_FULL;
-        }
-
-        giga_ctrl = rtl8168_mdio_read(tp, MII_CTRL1000);
-        giga_ctrl &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL);
-
-        if (autoneg == AUTONEG_ENABLE) {
-                /*n-way force*/
-                auto_nego = rtl8168_mdio_read(tp, MII_ADVERTISE);
-                auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
-                               ADVERTISE_100HALF | ADVERTISE_100FULL |
-                               ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
-
-                if (adv & ADVERTISED_10baseT_Half)
-                        auto_nego |= ADVERTISE_10HALF;
-                if (adv & ADVERTISED_10baseT_Full)
-                        auto_nego |= ADVERTISE_10FULL;
-                if (adv & ADVERTISED_100baseT_Half)
-                        auto_nego |= ADVERTISE_100HALF;
-                if (adv & ADVERTISED_100baseT_Full)
-                        auto_nego |= ADVERTISE_100FULL;
-                if (adv & ADVERTISED_1000baseT_Half)
-                        giga_ctrl |= ADVERTISE_1000HALF;
-                if (adv & ADVERTISED_1000baseT_Full)
-                        giga_ctrl |= ADVERTISE_1000FULL;
-
-                //flow control
-                switch (tp->mcfg) {
-                case CFG_METHOD_1 ... CFG_METHOD_20:
-                        if (dev->mtu <= ETH_DATA_LEN && tp->fcpause == rtl8168_fc_full)
-                                auto_nego |= ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM;
-                        break;
-                default:
-                        if (tp->fcpause == rtl8168_fc_full)
-                                auto_nego |= ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM;
-                        break;
-                }
-
-                tp->phy_auto_nego_reg = auto_nego;
-                tp->phy_1000_ctrl_reg = giga_ctrl;
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                rtl8168_mdio_write(tp, MII_ADVERTISE, auto_nego);
-                rtl8168_mdio_write(tp, MII_CTRL1000, giga_ctrl);
-                rtl8168_phy_restart_nway(dev);
-                mdelay(20);
-        } else {
-                /*true force*/
-                if (speed == SPEED_10 || speed == SPEED_100)
-                        rtl8168_phy_setup_force_mode(dev, speed, duplex);
-                else
-                        goto out;
-        }
-
-        tp->autoneg = autoneg;
-        tp->speed = speed;
-        tp->duplex = duplex;
-        tp->advertising = adv;
-
-        if (tp->mcfg == CFG_METHOD_11)
-                rtl8168dp_10mbps_gphy_para(dev);
-
-        rc = 0;
-out:
-        return rc;
-}
-
-static int
-rtl8168_set_speed(struct net_device *dev,
-                  u8 autoneg,
-                  u32 speed,
-                  u8 duplex,
-                  u32 adv)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int ret;
-
-        ret = tp->set_speed(dev, autoneg, speed, duplex, adv);
-
-        return ret;
-}
-
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
-static int
-rtl8168_set_settings(struct net_device *dev,
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
-                     struct ethtool_cmd *cmd
-#else
-                     const struct ethtool_link_ksettings *cmd
-#endif
-                    )
-{
-        int ret;
-        u8 autoneg;
-        u32 speed;
-        u8 duplex;
-        u32 supported, advertising;
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
-        autoneg = cmd->autoneg;
-        speed = cmd->speed;
-        duplex = cmd->duplex;
-        supported = cmd->supported;
-        advertising = cmd->advertising;
-#else
-        const struct ethtool_link_settings *base = &cmd->base;
-        autoneg = base->autoneg;
-        speed = base->speed;
-        duplex = base->duplex;
-        ethtool_convert_link_mode_to_legacy_u32(&supported,
-                                                cmd->link_modes.supported);
-        ethtool_convert_link_mode_to_legacy_u32(&advertising,
-                                                cmd->link_modes.advertising);
-#endif
-        if (advertising & ~supported)
-                return -EINVAL;
-
-        ret = rtl8168_set_speed(dev, autoneg, speed, duplex, advertising);
-
-        return ret;
-}
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
-static u32
-rtl8168_get_tx_csum(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u32 ret;
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
-        ret = ((dev->features & NETIF_F_IP_CSUM) != 0);
-#else
-        ret = ((dev->features & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)) != 0);
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
-
-        return ret;
-}
-
-static u32
-rtl8168_get_rx_csum(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u32 ret;
-
-        ret = tp->cp_cmd & RxChkSum;
-
-        return ret;
-}
-
-static int
-rtl8168_set_tx_csum(struct net_device *dev,
-                    u32 data)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        if (tp->mcfg == CFG_METHOD_DEFAULT)
-                return -EOPNOTSUPP;
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
-        if (data)
-                dev->features |= NETIF_F_IP_CSUM;
-        else
-                dev->features &= ~NETIF_F_IP_CSUM;
-#else
-        if (data)
-                if ((tp->mcfg == CFG_METHOD_1) || (tp->mcfg == CFG_METHOD_2) || (tp->mcfg == CFG_METHOD_3))
-                        dev->features |= NETIF_F_IP_CSUM;
-                else
-                        dev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
-        else
-                dev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
-
-        return 0;
-}
-
-static int
-rtl8168_set_rx_csum(struct net_device *dev,
-                    u32 data)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        if (tp->mcfg == CFG_METHOD_DEFAULT)
-                return -EOPNOTSUPP;
-
-        if (data)
-                tp->cp_cmd |= RxChkSum;
-        else
-                tp->cp_cmd &= ~RxChkSum;
-
-        RTL_W16(tp, CPlusCmd, tp->cp_cmd);
-
-        return 0;
-}
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
-#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
-
-#ifdef CONFIG_R8168_VLAN
-
-static inline u32
-rtl8168_tx_vlan_tag(struct rtl8168_private *tp,
-                    struct sk_buff *skb)
-{
-        u32 tag;
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
-        tag = (tp->vlgrp && vlan_tx_tag_present(skb)) ?
-              TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
-#elif LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0)
-        tag = (vlan_tx_tag_present(skb)) ?
-              TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00;
-#else
-        tag = (skb_vlan_tag_present(skb)) ?
-              TxVlanTag | swab16(skb_vlan_tag_get(skb)) : 0x00;
-#endif
-
-        return tag;
-}
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
-
-static void
-rtl8168_vlan_rx_register(struct net_device *dev,
-                         struct vlan_group *grp)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        tp->vlgrp = grp;
-        if (tp->vlgrp)
-                tp->cp_cmd |= RxVlan;
-        else
-                tp->cp_cmd &= ~RxVlan;
-        RTL_W16(tp, CPlusCmd, tp->cp_cmd);
-        RTL_R16(tp, CPlusCmd);
-}
-
-#endif
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
-static void
-rtl8168_vlan_rx_kill_vid(struct net_device *dev,
-                         unsigned short vid)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)
-        if (tp->vlgrp)
-                tp->vlgrp->vlan_devices[vid] = NULL;
-#else
-        vlan_group_set_device(tp->vlgrp, vid, NULL);
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)
-}
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
-
-static int
-rtl8168_rx_vlan_skb(struct rtl8168_private *tp,
-                    struct RxDesc *desc,
-                    struct sk_buff *skb)
-{
-        u32 opts2 = le32_to_cpu(desc->opts2);
-        int ret = -1;
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
-        if (tp->vlgrp && (opts2 & RxVlanTag)) {
-                rtl8168_rx_hwaccel_skb(skb, tp->vlgrp,
-                                       swab16(opts2 & 0xffff));
-                ret = 0;
-        }
-#elif LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0)
-        if (opts2 & RxVlanTag)
-                __vlan_hwaccel_put_tag(skb, swab16(opts2 & 0xffff));
-#else
-        if (opts2 & RxVlanTag)
-                __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), swab16(opts2 & 0xffff));
-#endif
-
-        desc->opts2 = 0;
-        return ret;
-}
-
-#else /* !CONFIG_R8168_VLAN */
-
-static inline u32
-rtl8168_tx_vlan_tag(struct rtl8168_private *tp,
-                    struct sk_buff *skb)
-{
-        return 0;
-}
-
-static int
-rtl8168_rx_vlan_skb(struct rtl8168_private *tp,
-                    struct RxDesc *desc,
-                    struct sk_buff *skb)
-{
-        return -1;
-}
-
-#endif
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)
-
-static netdev_features_t rtl8168_fix_features(struct net_device *dev,
-                netdev_features_t features)
-{
-        if (dev->mtu > MSS_MAX)
-                features &= ~NETIF_F_ALL_TSO;
-        if (dev->mtu > ETH_DATA_LEN) {
-                features &= ~NETIF_F_ALL_TSO;
-                features &= ~NETIF_F_ALL_CSUM;
-        }
-
-        return features;
-}
-
-static int rtl8168_hw_set_features(struct net_device *dev,
-                                   netdev_features_t features)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u32 rx_config;
-
-        rx_config = RTL_R32(tp, RxConfig);
-        if (features & NETIF_F_RXALL)
-                rx_config |= (AcceptErr | AcceptRunt);
-        else
-                rx_config &= ~(AcceptErr | AcceptRunt);
-
-        RTL_W32(tp, RxConfig, rx_config);
-
-        if (features & NETIF_F_RXCSUM)
-                tp->cp_cmd |= RxChkSum;
-        else
-                tp->cp_cmd &= ~RxChkSum;
-
-        if (features & NETIF_F_HW_VLAN_RX)
-                tp->cp_cmd |= RxVlan;
-        else
-                tp->cp_cmd &= ~RxVlan;
-
-        RTL_W16(tp, CPlusCmd, tp->cp_cmd);
-        RTL_R16(tp, CPlusCmd);
-
-        return 0;
-}
-
-static int rtl8168_set_features(struct net_device *dev,
-                                netdev_features_t features)
-{
-        features &= NETIF_F_RXALL | NETIF_F_RXCSUM | NETIF_F_HW_VLAN_RX;
-
-        if (features ^ dev->features)
-                rtl8168_hw_set_features(dev, features);
-
-        return 0;
-}
-
-#endif
-
-static void rtl8168_gset_xmii(struct net_device *dev,
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
-                              struct ethtool_cmd *cmd
-#else
-                              struct ethtool_link_ksettings *cmd
-#endif
-                             )
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u8 status;
-        u8 autoneg, duplex;
-        u32 speed = 0;
-        u16 bmcr, bmsr, anlpar, ctrl1000 = 0, stat1000 = 0;
-        u32 supported, advertising, lp_advertising;
-
-        supported = SUPPORTED_10baseT_Half |
-                    SUPPORTED_10baseT_Full |
-                    SUPPORTED_100baseT_Half |
-                    SUPPORTED_100baseT_Full |
-                    SUPPORTED_1000baseT_Full |
-                    SUPPORTED_Autoneg |
-                    SUPPORTED_TP |
-                    SUPPORTED_Pause |
-                    SUPPORTED_Asym_Pause;
-
-        advertising = ADVERTISED_TP;
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        bmcr = rtl8168_mdio_read(tp, MII_BMCR);
-        bmsr = rtl8168_mdio_read(tp, MII_BMSR);
-        anlpar = rtl8168_mdio_read(tp, MII_LPA);
-        ctrl1000 = rtl8168_mdio_read(tp, MII_CTRL1000);
-        stat1000 = rtl8168_mdio_read(tp, MII_STAT1000);
-
-        if (bmcr & BMCR_ANENABLE) {
-                advertising |= ADVERTISED_Autoneg;
-                autoneg = AUTONEG_ENABLE;
-
-                if (bmsr & BMSR_ANEGCOMPLETE) {
-                        lp_advertising = mii_lpa_to_ethtool_lpa_t(anlpar);
-                        lp_advertising |=
-                                mii_stat1000_to_ethtool_lpa_t(stat1000);
-                } else {
-                        lp_advertising = 0;
-                }
-
-                if (tp->phy_auto_nego_reg & ADVERTISE_10HALF)
-                        advertising |= ADVERTISED_10baseT_Half;
-                if (tp->phy_auto_nego_reg & ADVERTISE_10FULL)
-                        advertising |= ADVERTISED_10baseT_Full;
-                if (tp->phy_auto_nego_reg & ADVERTISE_100HALF)
-                        advertising |= ADVERTISED_100baseT_Half;
-                if (tp->phy_auto_nego_reg & ADVERTISE_100FULL)
-                        advertising |= ADVERTISED_100baseT_Full;
-                if (tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL)
-                        advertising |= ADVERTISED_1000baseT_Full;
-        } else {
-                autoneg = AUTONEG_DISABLE;
-                lp_advertising = 0;
-        }
-
-        status = RTL_R8(tp, PHYstatus);
-
-        if (status & LinkStatus) {
-                /*link on*/
-                if (status & _1000bpsF)
-                        speed = SPEED_1000;
-                else if (status & _100bps)
-                        speed = SPEED_100;
-                else if (status & _10bps)
-                        speed = SPEED_10;
-
-                if (status & TxFlowCtrl)
-                        advertising |= ADVERTISED_Asym_Pause;
-
-                if (status & RxFlowCtrl)
-                        advertising |= ADVERTISED_Pause;
-
-                duplex = ((status & _1000bpsF) || (status & FullDup)) ?
-                         DUPLEX_FULL : DUPLEX_HALF;
-        } else {
-                /*link down*/
-                speed = SPEED_UNKNOWN;
-                duplex = DUPLEX_UNKNOWN;
-        }
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
-        cmd->supported = supported;
-        cmd->advertising = advertising;
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,30)
-        cmd->lp_advertising = lp_advertising;
-#endif
-        cmd->autoneg = autoneg;
-        cmd->speed = speed;
-        cmd->duplex = duplex;
-        cmd->port = PORT_TP;
-#else
-        ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
-                                                supported);
-        ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
-                                                advertising);
-        ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.lp_advertising,
-                                                lp_advertising);
-        cmd->base.autoneg = autoneg;
-        cmd->base.speed = speed;
-        cmd->base.duplex = duplex;
-        cmd->base.port = PORT_TP;
-#endif
-}
-
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
-static int
-rtl8168_get_settings(struct net_device *dev,
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
-                     struct ethtool_cmd *cmd
-#else
-                     struct ethtool_link_ksettings *cmd
-#endif
-                    )
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        tp->get_settings(dev, cmd);
-
-        return 0;
-}
-
-static void rtl8168_get_regs(struct net_device *dev, struct ethtool_regs *regs,
-                             void *p)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
-        unsigned int i;
-        u8 *data = p;
-
-        if (regs->len < R8168_REGS_DUMP_SIZE)
-                return /* -EINVAL */;
-
-        mem_clear(p, regs->len);
-
-        for (i = 0; i < R8168_MAC_REGS_SIZE; i++)
-                *data++ = readb(ioaddr + i);
-        data = (u8*)p + 256;
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        for (i = 0; i < R8168_PHY_REGS_SIZE/2; i++) {
-                *(u16*)data = rtl8168_mdio_read(tp, i);
-                data += 2;
-        }
-        data = (u8*)p + 256 * 2;
-
-        for (i = 0; i < R8168_EPHY_REGS_SIZE/2; i++) {
-                *(u16*)data = rtl8168_ephy_read(tp, i);
-                data += 2;
-        }
-        data = (u8*)p + 256 * 3;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_1:
-        case CFG_METHOD_2:
-        case CFG_METHOD_3:
-                /* RTL8168B does not support Extend GMAC */
-                break;
-        default:
-                for (i = 0; i < R8168_ERI_REGS_SIZE; i+=4) {
-                        *(u32*)data = rtl8168_eri_read(tp, i , 4, ERIAR_ExGMAC);
-                        data += 4;
-                }
-                break;
-        }
-}
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-static void rtl8168_get_pauseparam(struct net_device *dev,
-                                   struct ethtool_pauseparam *pause)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        pause->autoneg = (tp->autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
-        if (tp->fcpause == rtl8168_fc_rx_pause)
-                pause->rx_pause = 1;
-        else if (tp->fcpause == rtl8168_fc_tx_pause)
-                pause->tx_pause = 1;
-        else if (tp->fcpause == rtl8168_fc_full) {
-                pause->rx_pause = 1;
-                pause->tx_pause = 1;
-        }
-}
-
-static int rtl8168_set_pauseparam(struct net_device *dev,
-                                  struct ethtool_pauseparam *pause)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        enum rtl8168_fc_mode newfc;
-
-        if (pause->tx_pause || pause->rx_pause)
-                newfc = rtl8168_fc_full;
-        else
-                newfc = rtl8168_fc_none;
-
-        if (tp->fcpause != newfc) {
-                tp->fcpause = newfc;
-
-                rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
-        }
-
-        return 0;
-
-}
-#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-
-static u32
-rtl8168_get_msglevel(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        return tp->msg_enable;
-}
-
-static void
-rtl8168_set_msglevel(struct net_device *dev,
-                     u32 value)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        tp->msg_enable = value;
-}
-
-static const char rtl8168_gstrings[][ETH_GSTRING_LEN] = {
-        "tx_packets",
-        "rx_packets",
-        "tx_errors",
-        "rx_errors",
-        "rx_missed",
-        "align_errors",
-        "tx_single_collisions",
-        "tx_multi_collisions",
-        "unicast",
-        "broadcast",
-        "multicast",
-        "tx_aborted",
-        "tx_underrun",
-};
-#endif //#LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
-static int rtl8168_get_stats_count(struct net_device *dev)
-{
-        return ARRAY_SIZE(rtl8168_gstrings);
-}
-#endif //#LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
-#else
-static int rtl8168_get_sset_count(struct net_device *dev, int sset)
-{
-        switch (sset) {
-        case ETH_SS_STATS:
-                return ARRAY_SIZE(rtl8168_gstrings);
-        default:
-                return -EOPNOTSUPP;
-        }
-}
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
-
-static void
-rtl8168_set_ring_size(struct rtl8168_private *tp, u32 rx, u32 tx)
-{
-        int i;
-
-        tp->num_rx_desc = rx;
-
-        for (i = 0; i < tp->num_tx_rings; i++)
-                tp->tx_ring[i].num_tx_desc = tx;
-}
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
-static void rtl8168_get_ringparam(struct net_device *dev,
-                                  struct ethtool_ringparam *ring,
-                                  struct kernel_ethtool_ringparam *kernel_ring,
-                                  struct netlink_ext_ack *extack)
-#else
-static void rtl8168_get_ringparam(struct net_device *dev,
-                                  struct ethtool_ringparam *ring)
-#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        ring->rx_max_pending = MAX_NUM_TX_DESC;
-        ring->tx_max_pending = MAX_NUM_RX_DESC;
-        ring->rx_pending = tp->num_rx_desc;
-        ring->tx_pending = tp->tx_ring[0].num_tx_desc;
-}
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
-static int rtl8168_set_ringparam(struct net_device *dev,
-                                 struct ethtool_ringparam *ring,
-                                 struct kernel_ethtool_ringparam *kernel_ring,
-                                 struct netlink_ext_ack *extack)
-#else
-static int rtl8168_set_ringparam(struct net_device *dev,
-                                 struct ethtool_ringparam *ring)
-#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u32 new_rx_count, new_tx_count;
-        int rc = 0;
-
-        if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
-                return -EINVAL;
-
-        new_tx_count = clamp_t(u32, ring->tx_pending,
-                               MIN_NUM_TX_DESC, MAX_NUM_TX_DESC);
-
-        new_rx_count = clamp_t(u32, ring->rx_pending,
-                               MIN_NUM_RX_DESC, MAX_NUM_RX_DESC);
-
-        if ((new_rx_count == tp->num_rx_desc) &&
-            (new_tx_count == tp->tx_ring[0].num_tx_desc)) {
-                /* nothing to do */
-                return 0;
-        }
-
-        if (netif_running(dev)) {
-                rtl8168_wait_for_quiescence(dev);
-                rtl8168_close(dev);
-        }
-
-        rtl8168_set_ring_size(tp, new_rx_count, new_tx_count);
-
-        if (netif_running(dev))
-                rc = rtl8168_open(dev);
-
-        return rc;
-}
-#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
-static void
-rtl8168_get_ethtool_stats(struct net_device *dev,
-                          struct ethtool_stats *stats,
-                          u64 *data)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        struct rtl8168_counters *counters;
-        dma_addr_t paddr;
-
-        ASSERT_RTNL();
-
-        counters = tp->tally_vaddr;
-        paddr = tp->tally_paddr;
-        if (!counters)
-                return;
-
-        rtl8168_dump_tally_counter(tp, paddr);
-
-        data[0] = le64_to_cpu(counters->tx_packets);
-        data[1] = le64_to_cpu(counters->rx_packets);
-        data[2] = le64_to_cpu(counters->tx_errors);
-        data[3] = le32_to_cpu(counters->rx_errors);
-        data[4] = le16_to_cpu(counters->rx_missed);
-        data[5] = le16_to_cpu(counters->align_errors);
-        data[6] = le32_to_cpu(counters->tx_one_collision);
-        data[7] = le32_to_cpu(counters->tx_multi_collision);
-        data[8] = le64_to_cpu(counters->rx_unicast);
-        data[9] = le64_to_cpu(counters->rx_broadcast);
-        data[10] = le32_to_cpu(counters->rx_multicast);
-        data[11] = le16_to_cpu(counters->tx_aborted);
-        data[12] = le16_to_cpu(counters->tx_underrun);
-}
-
-static void
-rtl8168_get_strings(struct net_device *dev,
-                    u32 stringset,
-                    u8 *data)
-{
-        switch (stringset) {
-        case ETH_SS_STATS:
-                memcpy(data, rtl8168_gstrings, sizeof(rtl8168_gstrings));
-                break;
-        }
-}
-#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
-
-static int rtl_get_eeprom_len(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        return tp->eeprom_len;
-}
-
-static int rtl_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *buf)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int i,j,ret;
-        int start_w, end_w;
-        int VPD_addr, VPD_data;
-        u32 *eeprom_buff;
-        u16 tmp;
-
-        if (tp->eeprom_type == EEPROM_TYPE_NONE) {
-                dev_printk(KERN_DEBUG, tp_to_dev(tp), "Detect none EEPROM\n");
-                return -EOPNOTSUPP;
-        } else if (eeprom->len == 0 || (eeprom->offset+eeprom->len) > tp->eeprom_len) {
-                dev_printk(KERN_DEBUG, tp_to_dev(tp), "Invalid parameter\n");
-                return -EINVAL;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_9:
-        case CFG_METHOD_10:
-                VPD_addr = 0xCE;
-                VPD_data = 0xD0;
-                break;
-
-        case CFG_METHOD_1:
-        case CFG_METHOD_2:
-        case CFG_METHOD_3:
-        case CFG_METHOD_11:
-        case CFG_METHOD_12:
-        case CFG_METHOD_13:
-                return -EOPNOTSUPP;
-        default:
-                VPD_addr = 0xD2;
-                VPD_data = 0xD4;
-                break;
-        }
-
-        start_w = eeprom->offset >> 2;
-        end_w = (eeprom->offset + eeprom->len - 1) >> 2;
-
-        eeprom_buff = kmalloc(sizeof(u32)*(end_w - start_w + 1), GFP_KERNEL);
-        if (!eeprom_buff)
-                return -ENOMEM;
-
-        rtl8168_enable_cfg9346_write(tp);
-        ret = -EFAULT;
-        for (i=start_w; i<=end_w; i++) {
-                pci_write_config_word(tp->pci_dev, VPD_addr, (u16)i*4);
-                ret = -EFAULT;
-                for (j = 0; j < 10; j++) {
-                        udelay(400);
-                        pci_read_config_word(tp->pci_dev, VPD_addr, &tmp);
-                        if (tmp&0x8000) {
-                                ret = 0;
-                                break;
-                        }
-                }
-
-                if (ret)
-                        break;
-
-                pci_read_config_dword(tp->pci_dev, VPD_data, &eeprom_buff[i-start_w]);
-        }
-        rtl8168_disable_cfg9346_write(tp);
-
-        if (!ret)
-                memcpy(buf, (u8 *)eeprom_buff + (eeprom->offset & 3), eeprom->len);
-
-        kfree(eeprom_buff);
-
-        return ret;
-}
-
-#undef ethtool_op_get_link
-#define ethtool_op_get_link _kc_ethtool_op_get_link
-static u32 _kc_ethtool_op_get_link(struct net_device *dev)
-{
-        return netif_carrier_ok(dev) ? 1 : 0;
-}
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
-#undef ethtool_op_get_sg
-#define ethtool_op_get_sg _kc_ethtool_op_get_sg
-static u32 _kc_ethtool_op_get_sg(struct net_device *dev)
-{
-#ifdef NETIF_F_SG
-        return (dev->features & NETIF_F_SG) != 0;
-#else
-        return 0;
-#endif
-}
-
-#undef ethtool_op_set_sg
-#define ethtool_op_set_sg _kc_ethtool_op_set_sg
-static int _kc_ethtool_op_set_sg(struct net_device *dev, u32 data)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        if (tp->mcfg == CFG_METHOD_DEFAULT)
-                return -EOPNOTSUPP;
-
-#ifdef NETIF_F_SG
-        if (data)
-                dev->features |= NETIF_F_SG;
-        else
-                dev->features &= ~NETIF_F_SG;
-#endif
-
-        return 0;
-}
-#endif
-
-static void
-rtl8168_set_eee_lpi_timer(struct rtl8168_private *tp)
-{
-        u16 dev_lpi_timer;
-
-        dev_lpi_timer = tp->eee.tx_lpi_timer;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                rtl8168_mac_ocp_write(tp, EEE_TXIDLE_TIMER_8168, dev_lpi_timer);
-                break;
-        default:
-                break;
-        }
-}
-
-static int rtl8168_enable_eee(struct rtl8168_private *tp)
-{
-        int ret;
-        u16 data;
-        u32 csi_tmp;
-        struct ethtool_eee *eee = &tp->eee;
-        u16 eee_adv_t = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
-
-        ret = 0;
-        switch (tp->mcfg) {
-        case CFG_METHOD_14:
-        case CFG_METHOD_15:
-                rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                rtl8168_mdio_write(tp, 0x1E, 0x0020);
-                data = rtl8168_mdio_read(tp, 0x15) | 0x0100;
-                rtl8168_mdio_write(tp, 0x15, data);
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B85);
-                data = rtl8168_mdio_read(tp, 0x06) | 0x2000;
-                rtl8168_mdio_write(tp, 0x06, data);
-                rtl8168_mdio_write(tp, 0x1F, 0x0006);
-                rtl8168_mdio_write(tp, 0x00, 0x5A30);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                rtl8168_mdio_write(tp, 0x0D, 0x0007);
-                rtl8168_mdio_write(tp, 0x0E, 0x003C);
-                rtl8168_mdio_write(tp, 0x0D, 0x4007);
-                rtl8168_mdio_write(tp, 0x0E, 0x0006);
-                rtl8168_mdio_write(tp, 0x0D, 0x0000);
-                if ((RTL_R8(tp, Config4)&0x40) && (RTL_R8(tp, 0x6D) & BIT_7)) {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                        rtl8168_mdio_write(tp, 0x05, 0x8AC8);
-                        rtl8168_mdio_write(tp, 0x06, RTL_R16(tp, tp->NicCustLedValue));
-                        rtl8168_mdio_write(tp, 0x05, 0x8B82);
-                        data = rtl8168_mdio_read(tp, 0x06) | 0x0010;
-                        rtl8168_mdio_write(tp, 0x05, 0x8B82);
-                        rtl8168_mdio_write(tp, 0x06, data);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                }
-                break;
-
-        case CFG_METHOD_16:
-        case CFG_METHOD_17:
-                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC) | 0x0003;
-                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
-                rtl8168_mdio_write(tp,0x1F , 0x0004);
-                rtl8168_mdio_write(tp,0x1F , 0x0007);
-                rtl8168_mdio_write(tp,0x1E , 0x0020);
-                data = rtl8168_mdio_read(tp, 0x15)|0x0100;
-                rtl8168_mdio_write(tp,0x15 , data);
-                rtl8168_mdio_write(tp,0x1F , 0x0002);
-                rtl8168_mdio_write(tp,0x1F , 0x0005);
-                rtl8168_mdio_write(tp,0x05 , 0x8B85);
-                data = rtl8168_mdio_read(tp, 0x06)|0x2000;
-                rtl8168_mdio_write(tp,0x06 , data);
-                rtl8168_mdio_write(tp,0x1F , 0x0000);
-                rtl8168_mdio_write(tp,0x0D , 0x0007);
-                rtl8168_mdio_write(tp,0x0E , 0x003C);
-                rtl8168_mdio_write(tp,0x0D , 0x4007);
-                rtl8168_mdio_write(tp,0x0E , 0x0006);
-                rtl8168_mdio_write(tp,0x0D , 0x0000);
-                break;
-
-        case CFG_METHOD_18:
-        case CFG_METHOD_19:
-        case CFG_METHOD_20:
-                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
-                csi_tmp |= BIT_1 | BIT_0;
-                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
-                rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                rtl8168_mdio_write(tp, 0x1e, 0x0020);
-                data = rtl8168_mdio_read(tp, 0x15);
-                data |= BIT_8;
-                rtl8168_mdio_write(tp, 0x15, data);
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B85);
-                data = rtl8168_mdio_read(tp, 0x06);
-                data |= BIT_13;
-                rtl8168_mdio_write(tp, 0x06, data);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                rtl8168_mdio_write(tp, 0x0D, 0x0007);
-                rtl8168_mdio_write(tp, 0x0E, 0x003C);
-                rtl8168_mdio_write(tp, 0x0D, 0x4007);
-                rtl8168_mdio_write(tp, 0x0E, 0x0006);
-                rtl8168_mdio_write(tp, 0x0D, 0x0000);
-                break;
-
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
-                csi_tmp |= BIT_1 | BIT_0;
-                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                data = rtl8168_mdio_read(tp, 0x11);
-                rtl8168_mdio_write(tp, 0x11, data | BIT_4);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A5D);
-                rtl8168_mdio_write(tp, 0x10, eee_adv_t);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                break;
-
-        default:
-//      dev_printk(KERN_DEBUG, tp_to_dev(tp), "Not Support EEE\n");
-                ret = -EOPNOTSUPP;
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-                rtl8168_mdio_write(tp, 0x1F, 0x0A4A);
-                rtl8168_set_eth_phy_bit(tp, 0x11, BIT_9);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A42);
-                rtl8168_set_eth_phy_bit(tp, 0x14, BIT_7);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                break;
-        }
-
-        /*Advanced EEE*/
-        switch (tp->mcfg) {
-        case CFG_METHOD_23:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-                rtl8168_oob_mutex_lock(tp);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-                rtl8168_set_phy_mcu_patch_request(tp);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_25:
-                rtl8168_eri_write(tp, 0x1EA, 1, 0xFA, ERIAR_ExGMAC);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                data = rtl8168_mdio_read(tp, 0x10);
-                if (data & BIT_10) {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0A42);
-                        data = rtl8168_mdio_read(tp, 0x16);
-                        data &= ~(BIT_1);
-                        rtl8168_mdio_write(tp, 0x16, data);
-                } else {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0A42);
-                        data = rtl8168_mdio_read(tp, 0x16);
-                        data |= BIT_1;
-                        rtl8168_mdio_write(tp, 0x16, data);
-                }
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                break;
-        case CFG_METHOD_26:
-                data = rtl8168_mac_ocp_read(tp, 0xE052);
-                data |= BIT_0;
-                rtl8168_mac_ocp_write(tp, 0xE052, data);
-                data = rtl8168_mac_ocp_read(tp, 0xE056);
-                data &= 0xFF0F;
-                data |= (BIT_4 | BIT_5 | BIT_6);
-                rtl8168_mac_ocp_write(tp, 0xE056, data);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                data = rtl8168_mdio_read(tp, 0x10);
-                if (data & BIT_10) {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0A42);
-                        data = rtl8168_mdio_read(tp, 0x16);
-                        data &= ~(BIT_1);
-                        rtl8168_mdio_write(tp, 0x16, data);
-                } else {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0A42);
-                        data = rtl8168_mdio_read(tp, 0x16);
-                        data |= BIT_1;
-                        rtl8168_mdio_write(tp, 0x16, data);
-                }
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                break;
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-                data = rtl8168_mac_ocp_read(tp, 0xE052);
-                data &= ~BIT_0;
-                rtl8168_mac_ocp_write(tp, 0xE052, data);
-                data = rtl8168_mac_ocp_read(tp, 0xE056);
-                data &= 0xFF0F;
-                data |= (BIT_4 | BIT_5 | BIT_6);
-                rtl8168_mac_ocp_write(tp, 0xE056, data);
-                break;
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-                data = rtl8168_mac_ocp_read(tp, 0xE052);
-                data &= ~(BIT_0);
-                rtl8168_mac_ocp_write(tp, 0xE052, data);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                data = rtl8168_mdio_read(tp, 0x10) | BIT_15;
-                rtl8168_mdio_write(tp, 0x10, data);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
-                data = rtl8168_mdio_read(tp, 0x11) | BIT_13 | BIT_14;
-                data &= ~(BIT_12);
-                rtl8168_mdio_write(tp, 0x11, data);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                break;
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-                data = rtl8168_mac_ocp_read(tp, 0xE052);
-                data &= ~(BIT_0);
-                if (tp->HwPkgDet == 0x0F)
-                        data |= BIT_0;
-                rtl8168_mac_ocp_write(tp, 0xE052, data);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                data = rtl8168_mdio_read(tp, 0x10) | BIT_15;
-                rtl8168_mdio_write(tp, 0x10, data);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
-                data = rtl8168_mdio_read(tp, 0x11) | BIT_13 | BIT_14;
-                data &= ~(BIT_12);
-                rtl8168_mdio_write(tp, 0x11, data);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-                rtl8168_clear_phy_mcu_patch_request(tp);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_23:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-                rtl8168_oob_mutex_unlock(tp);
-                break;
-        }
-
-        return ret;
-}
-
-static int rtl8168_disable_eee(struct rtl8168_private *tp)
-{
-        int ret;
-        u16 data;
-        u32 csi_tmp;
-
-        ret = 0;
-        switch (tp->mcfg) {
-        case CFG_METHOD_14:
-        case CFG_METHOD_15:
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B85);
-                data = rtl8168_mdio_read(tp, 0x06) & ~0x2000;
-                rtl8168_mdio_write(tp, 0x06, data);
-                rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                rtl8168_mdio_write(tp, 0x1E, 0x0020);
-                data = rtl8168_mdio_read(tp, 0x15) & ~0x0100;
-                rtl8168_mdio_write(tp, 0x15, data);
-                rtl8168_mdio_write(tp, 0x1F, 0x0006);
-                rtl8168_mdio_write(tp, 0x00, 0x5A00);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                rtl8168_mdio_write(tp, 0x0D, 0x0007);
-                rtl8168_mdio_write(tp, 0x0E, 0x003C);
-                rtl8168_mdio_write(tp, 0x0D, 0x4007);
-                rtl8168_mdio_write(tp, 0x0E, 0x0000);
-                rtl8168_mdio_write(tp, 0x0D, 0x0000);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                if (RTL_R8(tp, Config4) & 0x40) {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                        rtl8168_mdio_write(tp, 0x05, 0x8B82);
-                        data = rtl8168_mdio_read(tp, 0x06) & ~0x0010;
-                        rtl8168_mdio_write(tp, 0x05, 0x8B82);
-                        rtl8168_mdio_write(tp, 0x06, data);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                }
-                break;
-
-        case CFG_METHOD_16:
-        case CFG_METHOD_17:
-                csi_tmp = rtl8168_eri_read(tp, 0x1B0,4, ERIAR_ExGMAC)& ~0x0003;
-                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B85);
-                data = rtl8168_mdio_read(tp, 0x06) & ~0x2000;
-                rtl8168_mdio_write(tp, 0x06, data);
-                rtl8168_mdio_write(tp, 0x1F, 0x0004);
-                rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                rtl8168_mdio_write(tp, 0x1E, 0x0020);
-                data = rtl8168_mdio_read(tp, 0x15) & ~0x0100;
-                rtl8168_mdio_write(tp,0x15 , data);
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                rtl8168_mdio_write(tp, 0x0D, 0x0007);
-                rtl8168_mdio_write(tp, 0x0E, 0x003C);
-                rtl8168_mdio_write(tp, 0x0D, 0x4007);
-                rtl8168_mdio_write(tp, 0x0E, 0x0000);
-                rtl8168_mdio_write(tp, 0x0D, 0x0000);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                break;
-
-        case CFG_METHOD_18:
-        case CFG_METHOD_19:
-        case CFG_METHOD_20:
-                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
-                csi_tmp &= ~(BIT_1 | BIT_0);
-                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B85);
-                data = rtl8168_mdio_read(tp, 0x06);
-                data &= ~BIT_13;
-                rtl8168_mdio_write(tp, 0x06, data);
-                rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                rtl8168_mdio_write(tp, 0x1e, 0x0020);
-                data = rtl8168_mdio_read(tp, 0x15);
-                data &= ~BIT_8;
-                rtl8168_mdio_write(tp, 0x15, data);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                rtl8168_mdio_write(tp, 0x0D, 0x0007);
-                rtl8168_mdio_write(tp, 0x0E, 0x003C);
-                rtl8168_mdio_write(tp, 0x0D, 0x4007);
-                rtl8168_mdio_write(tp, 0x0E, 0x0000);
-                rtl8168_mdio_write(tp, 0x0D, 0x0000);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                break;
-
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
-                csi_tmp &= ~(BIT_1 | BIT_0);
-                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                data = rtl8168_mdio_read(tp, 0x11);
-                if (tp->mcfg == CFG_METHOD_36)
-                        rtl8168_mdio_write(tp, 0x11, data | BIT_4);
-                else
-                        rtl8168_mdio_write(tp, 0x11, data & ~BIT_4);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A5D);
-                rtl8168_mdio_write(tp, 0x10, 0x0000);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                break;
-
-        default:
-//      dev_printk(KERN_DEBUG, tp_to_dev(tp), "Not Support EEE\n");
-                ret = -EOPNOTSUPP;
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-                rtl8168_mdio_write(tp, 0x1F, 0x0A42);
-                rtl8168_clear_eth_phy_bit(tp, 0x14, BIT_7);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A4A);
-                rtl8168_clear_eth_phy_bit(tp, 0x11, BIT_9);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                break;
-        }
-
-        /*Advanced EEE*/
-        switch (tp->mcfg) {
-        case CFG_METHOD_23:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-                rtl8168_oob_mutex_lock(tp);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-                rtl8168_set_phy_mcu_patch_request(tp);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_25:
-                rtl8168_eri_write(tp, 0x1EA, 1, 0x00, ERIAR_ExGMAC);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A42);
-                data = rtl8168_mdio_read(tp, 0x16);
-                data &= ~(BIT_1);
-                rtl8168_mdio_write(tp, 0x16, data);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                break;
-        case CFG_METHOD_26:
-                data = rtl8168_mac_ocp_read(tp, 0xE052);
-                data &= ~(BIT_0);
-                rtl8168_mac_ocp_write(tp, 0xE052, data);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A42);
-                data = rtl8168_mdio_read(tp, 0x16);
-                data &= ~(BIT_1);
-                rtl8168_mdio_write(tp, 0x16, data);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                break;
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-                data = rtl8168_mac_ocp_read(tp, 0xE052);
-                data &= ~(BIT_0);
-                rtl8168_mac_ocp_write(tp, 0xE052, data);
-                break;
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-                data = rtl8168_mac_ocp_read(tp, 0xE052);
-                data &= ~(BIT_0);
-                rtl8168_mac_ocp_write(tp, 0xE052, data);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                data = rtl8168_mdio_read(tp, 0x10) & ~(BIT_15);
-                rtl8168_mdio_write(tp, 0x10, data);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
-                data = rtl8168_mdio_read(tp, 0x11) & ~(BIT_12 | BIT_13 | BIT_14);
-                rtl8168_mdio_write(tp, 0x11, data);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-                rtl8168_clear_phy_mcu_patch_request(tp);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_23:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-                rtl8168_oob_mutex_unlock(tp);
-                break;
-        }
-
-        return ret;
-}
-
-static int rtl_nway_reset(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int ret, bmcr;
-
-        if (unlikely(tp->rtk_enable_diag))
-                return -EBUSY;
-
-        /* if autoneg is off, it's an error */
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        bmcr = rtl8168_mdio_read(tp, MII_BMCR);
-
-        if (bmcr & BMCR_ANENABLE) {
-                bmcr |= BMCR_ANRESTART;
-                rtl8168_mdio_write(tp, MII_BMCR, bmcr);
-                ret = 0;
-        } else {
-                ret = -EINVAL;
-        }
-
-        return ret;
-}
-static bool
-rtl8168_support_eee(struct rtl8168_private *tp)
-{
-        switch (tp->mcfg) {
-        case CFG_METHOD_21 ... CFG_METHOD_36:
-                return 1;
-        default:
-                return 0;
-        }
-}
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)
-static u32
-rtl8168_device_lpi_t_to_ethtool_lpi_t(struct rtl8168_private *tp , u32 lpi_timer)
-{
-        u32 to_us;
-        u8 status;
-
-        //Giga: lpi_timer * 8ns
-        //100M : lpi_timer * 80ns
-        to_us = 0;
-        status = RTL_R8(tp, PHYstatus);
-        if (status & LinkStatus) {
-                /*link on*/
-                if (status & _1000bpsF)
-                        to_us = lpi_timer * 8;
-                else if (status & _100bps)
-                        to_us = lpi_timer * 80;
-        }
-
-        //ns to us
-        to_us /= 1000;
-
-        return to_us;
-}
-
-static int
-rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
-{
-        struct rtl8168_private *tp = netdev_priv(net);
-        struct ethtool_eee *eee = &tp->eee;
-        u32 lp, adv, tx_lpi_timer, supported = 0;
-        u16 val;
-
-        if (!rtl8168_support_eee(tp))
-                return -EOPNOTSUPP;
-
-        if (unlikely(tp->rtk_enable_diag))
-                return -EBUSY;
-
-        /* Get Supported EEE */
-        supported = eee->supported;
-
-        /* Get advertisement EEE */
-        adv = eee->advertised;
-
-        /* Get LP advertisement EEE */
-        rtl8168_mdio_write(tp, 0x1F, 0x0A5D);
-        val = rtl8168_mdio_read(tp, 0x11);
-        lp = mmd_eee_adv_to_ethtool_adv_t(val);
-
-        /* Get EEE Tx LPI timer*/
-        tx_lpi_timer = rtl8168_device_lpi_t_to_ethtool_lpi_t(tp, eee->tx_lpi_timer);
-
-        val = rtl8168_eri_read(tp, 0x1B0, 2, ERIAR_ExGMAC);
-        val &= BIT_1 | BIT_0;
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-        edata->eee_enabled = !!val;
-        edata->eee_active = !!(supported & adv & lp);
-        edata->supported = supported;
-        edata->advertised = adv;
-        edata->lp_advertised = lp;
-        edata->tx_lpi_enabled = edata->eee_enabled;
-        edata->tx_lpi_timer = tx_lpi_timer;
-
-        return 0;
-}
-
-static int
-rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
-{
-        struct rtl8168_private *tp = netdev_priv(net);
-        struct ethtool_eee *eee = &tp->eee;
-        u32 advertising;
-        int rc = 0;
-
-        if (!rtl8168_support_eee(tp))
-                return -EOPNOTSUPP;
-
-        if (HW_SUPP_SERDES_PHY(tp) ||
-            !HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp) ||
-            tp->DASH)
-                return -EOPNOTSUPP;
-
-        if (unlikely(tp->rtk_enable_diag)) {
-                dev_printk(KERN_WARNING, tp_to_dev(tp), "Diag Enabled\n");
-                rc = -EBUSY;
-                goto out;
-        }
-
-        if (tp->autoneg != AUTONEG_ENABLE) {
-                dev_printk(KERN_WARNING, tp_to_dev(tp), "EEE requires autoneg\n");
-                rc = -EINVAL;
-                goto out;
-        }
-
-        advertising = tp->advertising;
-        if (!edata->advertised) {
-                edata->advertised = advertising & eee->supported;
-        } else if (edata->advertised & ~advertising) {
-                dev_printk(KERN_WARNING, tp_to_dev(tp), "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
-                           edata->advertised, advertising);
-                rc = -EINVAL;
-                goto out;
-        }
-
-        if (edata->advertised & ~eee->supported) {
-                dev_printk(KERN_WARNING, tp_to_dev(tp), "EEE advertised %x must be a subset of support %x\n",
-                           edata->advertised, eee->supported);
-                rc = -EINVAL;
-                goto out;
-        }
-
-        eee->advertised = edata->advertised;
-        eee->eee_enabled = edata->eee_enabled;
-
-        if (eee->eee_enabled)
-                rtl8168_enable_eee(tp);
-        else
-                rtl8168_disable_eee(tp);
-
-        rtl_nway_reset(net);
-
-        return rc;
-
-out:
-
-        return rc;
-}
-#endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0) */
-
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
-static const struct ethtool_ops rtl8168_ethtool_ops = {
-        .get_drvinfo        = rtl8168_get_drvinfo,
-        .get_regs_len       = rtl8168_get_regs_len,
-        .get_link           = ethtool_op_get_link,
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-        .get_ringparam      = rtl8168_get_ringparam,
-        .set_ringparam      = rtl8168_set_ringparam,
-#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
-        .get_settings       = rtl8168_get_settings,
-        .set_settings       = rtl8168_set_settings,
-#else
-        .get_link_ksettings       = rtl8168_get_settings,
-        .set_link_ksettings       = rtl8168_set_settings,
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-        .get_pauseparam     = rtl8168_get_pauseparam,
-        .set_pauseparam     = rtl8168_set_pauseparam,
-#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
-        .get_msglevel       = rtl8168_get_msglevel,
-        .set_msglevel       = rtl8168_set_msglevel,
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
-        .get_rx_csum        = rtl8168_get_rx_csum,
-        .set_rx_csum        = rtl8168_set_rx_csum,
-        .get_tx_csum        = rtl8168_get_tx_csum,
-        .set_tx_csum        = rtl8168_set_tx_csum,
-        .get_sg         = ethtool_op_get_sg,
-        .set_sg         = ethtool_op_set_sg,
-#ifdef NETIF_F_TSO
-        .get_tso        = ethtool_op_get_tso,
-        .set_tso        = ethtool_op_set_tso,
-#endif //NETIF_F_TSO
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0)
-        .get_regs       = rtl8168_get_regs,
-        .get_wol        = rtl8168_get_wol,
-        .set_wol        = rtl8168_set_wol,
-        .get_strings        = rtl8168_get_strings,
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
-        .get_stats_count    = rtl8168_get_stats_count,
-#else
-        .get_sset_count     = rtl8168_get_sset_count,
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33)
-        .get_ethtool_stats  = rtl8168_get_ethtool_stats,
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
-#ifdef ETHTOOL_GPERMADDR
-        .get_perm_addr      = ethtool_op_get_perm_addr,
-#endif
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)
-        .get_eeprom     = rtl_get_eeprom,
-        .get_eeprom_len     = rtl_get_eeprom_len,
-#ifdef ENABLE_RSS_SUPPORT
-        .get_rxnfc		= rtl8168_get_rxnfc,
-        .set_rxnfc		= rtl8168_set_rxnfc,
-        .get_rxfh_indir_size	= rtl8168_rss_indir_size,
-        .get_rxfh_key_size	= rtl8168_get_rxfh_key_size,
-        .get_rxfh		= rtl8168_get_rxfh,
-        .set_rxfh		= rtl8168_set_rxfh,
-#endif
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0)
-        .get_ts_info        = ethtool_op_get_ts_info,
-#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0)
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0)
-        .get_eee = rtl_ethtool_get_eee,
-        .set_eee = rtl_ethtool_set_eee,
-#endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0) */
-        .nway_reset = rtl_nway_reset,
-};
-#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
-
-static void rtl8168_get_mac_version(struct rtl8168_private *tp)
-{
-        u32 reg,val32;
-        u32 ICVerID;
-
-        val32 = RTL_R32(tp, TxConfig);
-        reg = val32 & 0x7c800000;
-        ICVerID = val32 & 0x00700000;
-
-        switch (reg) {
-        case 0x30000000:
-                tp->mcfg = CFG_METHOD_1;
-                tp->efuse_ver = EFUSE_NOT_SUPPORT;
-                break;
-        case 0x38000000:
-                if (ICVerID == 0x00000000) {
-                        tp->mcfg = CFG_METHOD_2;
-                } else if (ICVerID == 0x00500000) {
-                        tp->mcfg = CFG_METHOD_3;
-                } else {
-                        tp->mcfg = CFG_METHOD_3;
-                        tp->HwIcVerUnknown = TRUE;
-                }
-                tp->efuse_ver = EFUSE_NOT_SUPPORT;
-                break;
-        case 0x3C000000:
-                if (ICVerID == 0x00000000) {
-                        tp->mcfg = CFG_METHOD_4;
-                } else if (ICVerID == 0x00200000) {
-                        tp->mcfg = CFG_METHOD_5;
-                } else if (ICVerID == 0x00400000) {
-                        tp->mcfg = CFG_METHOD_6;
-                } else {
-                        tp->mcfg = CFG_METHOD_6;
-                        tp->HwIcVerUnknown = TRUE;
-                }
-                tp->efuse_ver = EFUSE_NOT_SUPPORT;
-                break;
-        case 0x3C800000:
-                if (ICVerID == 0x00100000) {
-                        tp->mcfg = CFG_METHOD_7;
-                } else if (ICVerID == 0x00300000) {
-                        tp->mcfg = CFG_METHOD_8;
-                } else {
-                        tp->mcfg = CFG_METHOD_8;
-                        tp->HwIcVerUnknown = TRUE;
-                }
-                tp->efuse_ver = EFUSE_NOT_SUPPORT;
-                break;
-        case 0x28000000:
-                if (ICVerID == 0x00100000) {
-                        tp->mcfg = CFG_METHOD_9;
-                } else if (ICVerID == 0x00300000) {
-                        tp->mcfg = CFG_METHOD_10;
-                } else {
-                        tp->mcfg = CFG_METHOD_10;
-                        tp->HwIcVerUnknown = TRUE;
-                }
-                tp->efuse_ver = EFUSE_SUPPORT_V1;
-                break;
-        case 0x28800000:
-                if (ICVerID == 0x00000000) {
-                        tp->mcfg = CFG_METHOD_11;
-                } else if (ICVerID == 0x00200000) {
-                        tp->mcfg = CFG_METHOD_12;
-                        RTL_W32(tp, 0xD0, RTL_R32(tp, 0xD0) | 0x00020000);
-                } else if (ICVerID == 0x00300000) {
-                        tp->mcfg = CFG_METHOD_13;
-                } else {
-                        tp->mcfg = CFG_METHOD_13;
-                        tp->HwIcVerUnknown = TRUE;
-                }
-                tp->efuse_ver = EFUSE_SUPPORT_V1;
-                break;
-        case 0x2C000000:
-                if (ICVerID == 0x00100000) {
-                        tp->mcfg = CFG_METHOD_14;
-                } else if (ICVerID == 0x00200000) {
-                        tp->mcfg = CFG_METHOD_15;
-                } else {
-                        tp->mcfg = CFG_METHOD_15;
-                        tp->HwIcVerUnknown = TRUE;
-                }
-                tp->efuse_ver = EFUSE_SUPPORT_V2;
-                break;
-        case 0x2C800000:
-                if (ICVerID == 0x00000000) {
-                        tp->mcfg = CFG_METHOD_16;
-                } else if (ICVerID == 0x00100000) {
-                        tp->mcfg = CFG_METHOD_17;
-                } else {
-                        tp->mcfg = CFG_METHOD_17;
-                        tp->HwIcVerUnknown = TRUE;
-                }
-                tp->efuse_ver = EFUSE_SUPPORT_V3;
-                break;
-        case 0x48000000:
-                if (ICVerID == 0x00000000) {
-                        tp->mcfg = CFG_METHOD_18;
-                } else if (ICVerID == 0x00100000) {
-                        tp->mcfg = CFG_METHOD_19;
-                } else {
-                        tp->mcfg = CFG_METHOD_19;
-                        tp->HwIcVerUnknown = TRUE;
-                }
-                tp->efuse_ver = EFUSE_SUPPORT_V3;
-                break;
-        case 0x48800000:
-                if (ICVerID == 0x00000000) {
-                        tp->mcfg = CFG_METHOD_20;
-                } else {
-                        tp->mcfg = CFG_METHOD_20;
-                        tp->HwIcVerUnknown = TRUE;
-                }
-
-                tp->efuse_ver = EFUSE_SUPPORT_V3;
-                break;
-        case 0x4C000000:
-                if (ICVerID == 0x00000000) {
-                        tp->mcfg = CFG_METHOD_21;
-                } else if (ICVerID == 0x00100000) {
-                        tp->mcfg = CFG_METHOD_22;
-                } else {
-                        tp->mcfg = CFG_METHOD_22;
-                        tp->HwIcVerUnknown = TRUE;
-                }
-                tp->efuse_ver = EFUSE_SUPPORT_V3;
-                break;
-        case 0x50000000:
-                if (ICVerID == 0x00000000) {
-                        tp->mcfg = CFG_METHOD_23;
-                } else if (ICVerID == 0x00100000) {
-                        tp->mcfg = CFG_METHOD_27;
-                } else if (ICVerID == 0x00200000) {
-                        tp->mcfg = CFG_METHOD_28;
-                } else {
-                        tp->mcfg = CFG_METHOD_28;
-                        tp->HwIcVerUnknown = TRUE;
-                }
-                tp->efuse_ver = EFUSE_SUPPORT_V3;
-                break;
-        case 0x50800000:
-                if (ICVerID == 0x00000000) {
-                        tp->mcfg = CFG_METHOD_24;
-                } else if (ICVerID == 0x00100000) {
-                        tp->mcfg = CFG_METHOD_25;
-                } else {
-                        tp->mcfg = CFG_METHOD_25;
-                        tp->HwIcVerUnknown = TRUE;
-                }
-                tp->efuse_ver = EFUSE_SUPPORT_V3;
-                break;
-        case 0x5C800000:
-                if (ICVerID == 0x00000000) {
-                        tp->mcfg = CFG_METHOD_26;
-                } else {
-                        tp->mcfg = CFG_METHOD_26;
-                        tp->HwIcVerUnknown = TRUE;
-                }
-
-                tp->efuse_ver = EFUSE_SUPPORT_V3;
-                break;
-        case 0x54000000:
-                if (ICVerID == 0x00000000) {
-                        tp->mcfg = CFG_METHOD_29;
-                } else if (ICVerID == 0x00100000) {
-                        tp->mcfg = CFG_METHOD_30;
-                } else {
-                        tp->mcfg = CFG_METHOD_30;
-                        tp->HwIcVerUnknown = TRUE;
-                }
-
-                if (tp->mcfg == CFG_METHOD_30) {
-                        if ((rtl8168_mac_ocp_read(tp, 0xD006) & 0xFF00) ==
-                            0x0100)
-                                tp->mcfg = CFG_METHOD_35;
-                        else if ((rtl8168_mac_ocp_read(tp, 0xD006) & 0xFF00) ==
-                                 0x0300)
-                                tp->mcfg = CFG_METHOD_36;
-                }
-
-                tp->efuse_ver = EFUSE_SUPPORT_V3;
-                break;
-        case 0x6C000000:
-                if (ICVerID == 0x00000000) {
-                        tp->mcfg = CFG_METHOD_37;
-                } else {
-                        tp->mcfg = CFG_METHOD_37;
-                        tp->HwIcVerUnknown = TRUE;
-                }
-
-                tp->efuse_ver = EFUSE_SUPPORT_V3;
-                break;
-        case 0x54800000:
-                if (ICVerID == 0x00100000) {
-                        tp->mcfg = CFG_METHOD_31;
-                } else if (ICVerID == 0x00200000) {
-                        tp->mcfg = CFG_METHOD_32;
-                } else if (ICVerID == 0x00300000) {
-                        tp->mcfg = CFG_METHOD_33;
-                } else if (ICVerID == 0x00400000) {
-                        tp->mcfg = CFG_METHOD_34;
-                } else {
-                        tp->mcfg = CFG_METHOD_34;
-                        tp->HwIcVerUnknown = TRUE;
-                }
-
-                tp->efuse_ver = EFUSE_SUPPORT_V3;
-                break;
-        default:
-                printk("unknown chip version (%x)\n",reg);
-                tp->mcfg = CFG_METHOD_DEFAULT;
-                tp->HwIcVerUnknown = TRUE;
-                tp->efuse_ver = EFUSE_NOT_SUPPORT;
-                break;
-        }
-}
-
-static void
-rtl8168_print_mac_version(struct rtl8168_private *tp)
-{
-        int i;
-        for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) {
-                if (tp->mcfg == rtl_chip_info[i].mcfg) {
-                        dprintk("Realtek PCIe GbE Family Controller mcfg = %04d\n",
-                                rtl_chip_info[i].mcfg);
-                        return;
-                }
-        }
-
-        dprintk("mac_version == Unknown\n");
-}
-
-static u8 rtl8168_calc_efuse_dummy_bit(u16 reg)
-{
-        int s,a,b;
-        u8 dummyBitPos = 0;
-
-
-        s=reg% 32;
-        a=s % 16;
-        b=s/16;
-
-        if (s/16) {
-                dummyBitPos = (u8)(16-a);
-        } else {
-                dummyBitPos = (u8)a;
-        }
-
-        return dummyBitPos;
-}
-
-static u32 rtl8168_decode_efuse_cmd(struct rtl8168_private *tp, u32 DwCmd)
-{
-        u16 reg = (u16)((DwCmd & 0x00FE0000) >> 17);
-        u32 DummyPos = rtl8168_calc_efuse_dummy_bit(reg);
-        u32 DeCodeDwCmd;
-        u32 Dw17BitData;
-
-        if (tp->efuse_ver < 3) {
-                DeCodeDwCmd = (DwCmd>>(DummyPos+1))<<DummyPos;
-                if (DummyPos > 0) {
-                        DeCodeDwCmd |= ((DwCmd<<(32-DummyPos))>>(32-DummyPos));
-                }
-        } else {
-                reg = (u16)((DwCmd & 0x007F0000) >> 16);
-                DummyPos = rtl8168_calc_efuse_dummy_bit(reg);
-                Dw17BitData = ((DwCmd & BIT_23) >> 23);
-                Dw17BitData <<= 16;
-                Dw17BitData |= (DwCmd & 0x0000FFFF);
-                DeCodeDwCmd = (Dw17BitData>>(DummyPos+1))<<DummyPos;
-                if (DummyPos > 0) {
-                        DeCodeDwCmd |= ((Dw17BitData<<(32-DummyPos))>>(32-DummyPos));
-                }
-        }
-
-        return DeCodeDwCmd;
-}
-
-static u8 rtl8168_efuse_read(struct rtl8168_private *tp, u16 reg)
-{
-        u8 efuse_data = 0;
-        u32 temp;
-        int cnt;
-
-        if (tp->efuse_ver == EFUSE_NOT_SUPPORT)
-                return EFUSE_READ_FAIL;
-
-        if (tp->efuse_ver == EFUSE_SUPPORT_V1) {
-                temp = EFUSE_READ | ((reg & EFUSE_Reg_Mask) << EFUSE_Reg_Shift);
-                RTL_W32(tp, EFUSEAR, temp);
-
-                cnt = 0;
-                do {
-                        udelay(100);
-                        temp = RTL_R32(tp, EFUSEAR);
-                        cnt++;
-                } while (!(temp & EFUSE_READ_OK) && (cnt < EFUSE_Check_Cnt));
-
-                if (cnt == EFUSE_Check_Cnt)
-                        efuse_data = EFUSE_READ_FAIL;
-                else
-                        efuse_data = (u8)(RTL_R32(tp, EFUSEAR) & EFUSE_Data_Mask);
-        } else  if (tp->efuse_ver == EFUSE_SUPPORT_V2) {
-                temp = (reg/2) & 0x03ff;
-                temp <<= 17;
-                temp |= EFUSE_READ;
-                RTL_W32(tp, EFUSEAR, temp);
-
-                cnt = 0;
-                do {
-                        udelay(100);
-                        temp = RTL_R32(tp, EFUSEAR);
-                        cnt++;
-                } while (!(temp & EFUSE_READ_OK) && (cnt < EFUSE_Check_Cnt));
-
-                if (cnt == EFUSE_Check_Cnt) {
-                        efuse_data = EFUSE_READ_FAIL;
-                } else {
-                        temp = RTL_R32(tp, EFUSEAR);
-                        temp = rtl8168_decode_efuse_cmd(tp, temp);
-
-                        if (reg%2) {
-                                temp >>= 8;
-                                efuse_data = (u8)temp;
-                        } else {
-                                efuse_data = (u8)temp;
-                        }
-                }
-        } else  if (tp->efuse_ver == EFUSE_SUPPORT_V3) {
-                temp = (reg/2) & 0x03ff;
-                temp <<= 16;
-                temp |= EFUSE_READ_V3;
-                RTL_W32(tp, EFUSEAR, temp);
-
-                cnt = 0;
-                do {
-                        udelay(100);
-                        temp = RTL_R32(tp, EFUSEAR);
-                        cnt++;
-                } while ((temp & BIT_31) && (cnt < EFUSE_Check_Cnt));
-
-                if (cnt == EFUSE_Check_Cnt) {
-                        efuse_data = EFUSE_READ_FAIL;
-                } else {
-                        temp = RTL_R32(tp, EFUSEAR);
-                        temp = rtl8168_decode_efuse_cmd(tp, temp);
-
-                        if (reg%2) {
-                                temp >>= 8;
-                                efuse_data = (u8)temp;
-                        } else {
-                                efuse_data = (u8)temp;
-                        }
-                }
-        }
-
-        udelay(R8168_CHANNEL_EXIT_DELAY_TIME);
-
-        return efuse_data;
-}
-
-static void
-rtl8168_tally_counter_addr_fill(struct rtl8168_private *tp)
-{
-        if (!tp->tally_paddr)
-                return;
-
-        RTL_W32(tp, CounterAddrHigh, (u64)tp->tally_paddr >> 32);
-        RTL_W32(tp, CounterAddrLow, (u64)tp->tally_paddr & (DMA_BIT_MASK(32)));
-}
-
-static void
-rtl8168_tally_counter_clear(struct rtl8168_private *tp)
-{
-        if (tp->mcfg == CFG_METHOD_1 || tp->mcfg == CFG_METHOD_2 ||
-            tp->mcfg == CFG_METHOD_3 )
-                return;
-
-        if (!tp->tally_paddr)
-                return;
-
-        RTL_W32(tp, CounterAddrHigh, (u64)tp->tally_paddr >> 32);
-        RTL_W32(tp, CounterAddrLow, ((u64)tp->tally_paddr & (DMA_BIT_MASK(32))) | CounterReset);
-}
-
-static
-u16
-rtl8168_get_phy_state(struct rtl8168_private *tp)
-{
-        u16 PhyState = 0xFF;
-
-        if (HW_SUPPORT_UPS_MODE(tp) == FALSE)
-                goto exit;
-
-        switch (tp->HwSuppUpsVer) {
-        case 1:
-                PhyState = rtl8168_mdio_read_phy_ocp(tp, 0x0A42, 0x10);
-                PhyState &= 0x7;  //bit[2:0]
-                break;
-        }
-
-exit:
-        return PhyState;
-}
-
-static
-bool
-rtl8168_wait_phy_state_ready(struct rtl8168_private *tp,
-                             u16 PhyState,
-                             u32 MicroSecondTimeout
-                            )
-{
-        u16 TmpPhyState;
-        u32 WaitCount;
-        u32 i = 0;
-        bool PhyStateReady = TRUE;
-
-        if (HW_SUPPORT_UPS_MODE(tp) == FALSE)
-                goto exit;
-
-        WaitCount = MicroSecondTimeout / 1000;
-        if (WaitCount == 0) WaitCount = 100;
-
-        do {
-                TmpPhyState = rtl8168_get_phy_state(tp);
-                mdelay(1);
-                i++;
-        } while ((i < WaitCount) && (TmpPhyState != PhyState));
-
-        PhyStateReady = (i == WaitCount && TmpPhyState != PhyState) ? FALSE : TRUE;
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
-        WARN_ON_ONCE(i == WaitCount);
-#endif
-
-exit:
-        return PhyStateReady;
-}
-
-static
-bool
-rtl8168_test_phy_ocp_v2(struct rtl8168_private *tp)
-{
-        bool RestorePhyOcpReg = FALSE;
-
-        u16 PhyRegValue;
-        u8 ResetPhyType = 0;
-
-        if (HW_PHY_STATUS_INI == rtl8168_get_phy_state(tp)) {
-                ResetPhyType = 1;
-        } else {
-                rtl8168_mdio_write(tp, 0x1F, 0x0C40);
-                PhyRegValue = rtl8168_mdio_read(tp, 0x12);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                if ((PhyRegValue & 0x03) != 0x00) {
-                        ResetPhyType = 2;
-                }
-        }
-
-        if (ResetPhyType == 0)
-                goto exit;
-
-        netif_err(tp, drv, tp->dev, "test_phy_ocp ResetPhyType = 0x%02x\n.\n",
-                  ResetPhyType);
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0C41);
-        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        mdelay(24); //24ms
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
-        PhyRegValue = rtl8168_mdio_read(tp, 0x12);
-        if ((PhyRegValue & 0x03) != 0x00) {
-                u32 WaitCnt = 0;
-                while ((PhyRegValue & 0x03) != 0x00 && WaitCnt < 5) {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
-                        rtl8168_set_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
-                        rtl8168_clear_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
-                        mdelay(100);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
-                        PhyRegValue = rtl8168_mdio_read(tp, 0x12);
-                        WaitCnt++;
-                }
-        }
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
-        rtl8168_mdio_write(tp, 0x10, tp->BackupPhyFuseDout_15_0);
-        rtl8168_mdio_write(tp, 0x12, tp->BackupPhyFuseDout_47_32);
-        rtl8168_mdio_write(tp, 0x13, tp->BackupPhyFuseDout_63_48);
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_INI, 5000000);
-        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
-        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_LAN_ON, 500000);
-
-        tp->HwHasWrRamCodeToMicroP = FALSE;
-
-        RestorePhyOcpReg = TRUE;
-
-exit:
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-        return RestorePhyOcpReg;
-}
-
-static
-bool
-rtl8168_test_phy_ocp_v3(struct rtl8168_private *tp)
-{
-        bool RestorePhyOcpReg = FALSE;
-
-        u16 PhyRegValue;
-        u8 ResetPhyType = 0;
-        u8 watch_dog = 0;
-        u8 uc_response;
-        u8 nctl_pc_range_fail;
-        u8 nctl_pc_stuck_fail;
-
-        if (FALSE == HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp))
-                goto exit;
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0B82);
-        uc_response = !!(rtl8168_mdio_read(tp, 0x10) & BIT_5);
-        rtl8168_mdio_write(tp, 0x1F, 0x0B84);
-        nctl_pc_range_fail = !!(rtl8168_mdio_read(tp, 0x11) & BIT_1);
-        nctl_pc_stuck_fail = !!(rtl8168_mdio_read(tp, 0x11) & BIT_2);
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-        if (uc_response || nctl_pc_range_fail || nctl_pc_stuck_fail) {
-                ResetPhyType = 3;
-        } else {
-                rtl8168_mdio_write(tp, 0x1F, 0x0C40);
-                PhyRegValue = rtl8168_mdio_read(tp, 0x12);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                if ((PhyRegValue & 0x03) != 0x00) {
-                        watch_dog = (u8)(PhyRegValue & 0x03);
-                        ResetPhyType = 2;
-                }
-        }
-
-        if (ResetPhyType == 0)
-                goto exit;
-
-        netif_err(tp, drv, tp->dev, "test_phy_ocp ResetPhyType = 0x%02x\n.\n",
-                  ResetPhyType);
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0C41);
-        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        mdelay(24000); //24ms
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
-        PhyRegValue = rtl8168_mdio_read(tp, 0x12);
-        if ((PhyRegValue & 0x03) != 0x00) {
-                u32 WaitCnt = 0;
-                while ((PhyRegValue & 0x03) != 0x00 && WaitCnt < 5) {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
-                        rtl8168_set_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
-                        rtl8168_clear_eth_phy_bit(tp, 0x11, (BIT_15 | BIT_14));
-                        mdelay(100000);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0C40);
-                        PhyRegValue = rtl8168_mdio_read(tp, 0x12);
-                        WaitCnt++;
-                }
-        }
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-        //issue9
-        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
-        rtl8168_mdio_write(tp, 0x10, tp->BackupPhyFuseDout_15_0);
-        rtl8168_mdio_write(tp, 0x11, tp->BackupPhyFuseDout_31_16);
-        rtl8168_mdio_write(tp, 0x12, tp->BackupPhyFuseDout_47_32);
-        rtl8168_mdio_write(tp, 0x13, tp->BackupPhyFuseDout_63_48);
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_INI, 5000000);
-        rtl8168_mdio_write(tp, 0x1F, 0x0A46);
-        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_0);
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        rtl8168_wait_phy_state_ready(tp, HW_PHY_STATUS_LAN_ON, 500000);
-
-        //record fail case
-        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x801C);
-        PhyRegValue = watch_dog & 0x03;
-        PhyRegValue <<= 14;
-        if (uc_response) PhyRegValue |= BIT_13;
-        if (nctl_pc_range_fail) PhyRegValue |= BIT_12;
-        if (nctl_pc_stuck_fail) PhyRegValue |= BIT_11;
-        ClearAndSetEthPhyBit(tp,
-                             0x14,
-                             0xF800,
-                             PhyRegValue);
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-        tp->HwHasWrRamCodeToMicroP = FALSE;
-
-        RestorePhyOcpReg = TRUE;
-
-exit:
-        //set uc_response to 1 and gphy should auto clear it.
-        rtl8168_mdio_write(tp, 0x1F, 0x0B82);
-        rtl8168_set_eth_phy_bit(tp, 0x10, BIT_5);
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-        return RestorePhyOcpReg;
-}
-
-static
-bool
-rtl8168_test_phy_ocp(struct rtl8168_private *tp)
-{
-        bool RestorePhyOcpReg = FALSE;
-
-        if (tp->TestPhyOcpReg == FALSE)
-                goto exit;
-
-        switch (tp->HwSuppEsdVer) {
-        case 2:
-                RestorePhyOcpReg = rtl8168_test_phy_ocp_v2(tp);
-                break;
-        case 3:
-                RestorePhyOcpReg = rtl8168_test_phy_ocp_v3(tp);
-                break;
-        default:
-                break;
-        }
-
-exit:
-        return RestorePhyOcpReg;
-}
-
-static int
-rtl8168_is_ups_resume(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        return (rtl8168_mac_ocp_read(tp, 0xD408) & BIT_0);
-}
-
-static void
-rtl8168_clear_ups_resume_bit(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        rtl8168_mac_ocp_write(tp, 0xD408, rtl8168_mac_ocp_read(tp, 0xD408) & ~(BIT_0));
-}
-
-static void
-rtl8168_wait_phy_ups_resume(struct net_device *dev, u16 PhyState)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u16 TmpPhyState;
-        int i = 0;
-
-        do {
-                TmpPhyState = rtl8168_mdio_read_phy_ocp(tp, 0x0A42, 0x10);
-                TmpPhyState &= 0x7;
-                mdelay(1);
-                i++;
-        } while ((i < 100) && (TmpPhyState != PhyState));
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18)
-        WARN_ON_ONCE(i == 100);
-#endif
-}
-
-void
-rtl8168_enable_now_is_oob(struct rtl8168_private *tp)
-{
-        if ( tp->HwSuppNowIsOobVer == 1 ) {
-                RTL_W8(tp, MCUCmd_reg, RTL_R8(tp, MCUCmd_reg) | Now_is_oob);
-        }
-}
-
-void
-rtl8168_disable_now_is_oob(struct rtl8168_private *tp)
-{
-        if ( tp->HwSuppNowIsOobVer == 1 ) {
-                RTL_W8(tp, MCUCmd_reg, RTL_R8(tp, MCUCmd_reg) & ~Now_is_oob);
-        }
-}
-
-static void
-rtl8168_switch_to_sgmii_mode(
-        struct rtl8168_private *tp
-)
-{
-        if (FALSE == HW_SUPP_SERDES_PHY(tp))
-                return;
-
-        switch (tp->HwSuppSerDesPhyVer) {
-        case 1:
-                rtl8168_mac_ocp_write(tp, 0xEB00, 0x2);
-                rtl8168_set_mcu_ocp_bit(tp, 0xEB16, BIT_1);
-                break;
-        }
-}
-
-static void
-rtl8168_exit_oob(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u16 data16;
-
-        rtl8168_disable_rx_packet_filter(tp);
-
-        if (HW_SUPP_SERDES_PHY(tp)) {
-                if (tp->HwSuppSerDesPhyVer == 1) {
-                        rtl8168_switch_to_sgmii_mode(tp);
-                }
-        }
-
-        if (HW_DASH_SUPPORT_DASH(tp)) {
-                rtl8168_driver_start(tp);
-                rtl8168_dash2_disable_txrx(dev);
-#ifdef ENABLE_DASH_SUPPORT
-                DashHwInit(dev);
-#endif
-        }
-
-        //Disable realwow  function
-        switch (tp->mcfg) {
-        case CFG_METHOD_18:
-        case CFG_METHOD_19:
-                RTL_W32(tp, MACOCP, 0xE5A90000);
-                RTL_W32(tp, MACOCP, 0xF2100010);
-                break;
-        case CFG_METHOD_20:
-                RTL_W32(tp, MACOCP, 0xE5A90000);
-                RTL_W32(tp, MACOCP, 0xE4640000);
-                RTL_W32(tp, MACOCP, 0xF2100010);
-                break;
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-                RTL_W32(tp, MACOCP, 0x605E0000);
-                RTL_W32(tp, MACOCP, (0xE05E << 16) | (RTL_R32(tp, MACOCP) & 0xFFFE));
-                RTL_W32(tp, MACOCP, 0xE9720000);
-                RTL_W32(tp, MACOCP, 0xF2140010);
-                break;
-        case CFG_METHOD_26:
-                RTL_W32(tp, MACOCP, 0xE05E00FF);
-                RTL_W32(tp, MACOCP, 0xE9720000);
-                rtl8168_mac_ocp_write(tp, 0xE428, 0x0010);
-                break;
-        }
-
-#ifdef ENABLE_REALWOW_SUPPORT
-        rtl8168_realwow_hw_init(dev);
-#else
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-                rtl8168_eri_write(tp, 0x174, 2, 0x0000, ERIAR_ExGMAC);
-                rtl8168_mac_ocp_write(tp, 0xE428, 0x0010);
-                break;
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_28:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-                rtl8168_eri_write(tp, 0x174, 2, 0x00FF, ERIAR_ExGMAC);
-                rtl8168_mac_ocp_write(tp, 0xE428, 0x0010);
-                break;
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37: {
-                u32 csi_tmp;
-                csi_tmp = rtl8168_eri_read(tp, 0x174, 2, ERIAR_ExGMAC);
-                csi_tmp &= ~(BIT_8);
-                csi_tmp |= (BIT_15);
-                rtl8168_eri_write(tp, 0x174, 2, csi_tmp, ERIAR_ExGMAC);
-                rtl8168_mac_ocp_write(tp, 0xE428, 0x0010);
-        }
-        break;
-        }
-#endif //ENABLE_REALWOW_SUPPORT
-
-        rtl8168_nic_reset(dev);
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_20:
-                rtl8168_wait_ll_share_fifo_ready(dev);
-
-                data16 = rtl8168_mac_ocp_read(tp, 0xD4DE) | BIT_15;
-                rtl8168_mac_ocp_write(tp, 0xD4DE, data16);
-
-                rtl8168_wait_ll_share_fifo_ready(dev);
-                break;
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                rtl8168_disable_now_is_oob(tp);
-
-                data16 = rtl8168_mac_ocp_read(tp, 0xE8DE) & ~BIT_14;
-                rtl8168_mac_ocp_write(tp, 0xE8DE, data16);
-                rtl8168_wait_ll_share_fifo_ready(dev);
-
-                data16 = rtl8168_mac_ocp_read(tp, 0xE8DE) | BIT_15;
-                rtl8168_mac_ocp_write(tp, 0xE8DE, data16);
-
-                rtl8168_wait_ll_share_fifo_ready(dev);
-                break;
-        }
-
-        //wait ups resume (phy state 2)
-        if (HW_SUPPORT_UPS_MODE(tp))
-                if (rtl8168_is_ups_resume(dev)) {
-                        rtl8168_wait_phy_ups_resume(dev, HW_PHY_STATUS_EXT_INI);
-                        rtl8168_clear_ups_resume_bit(dev);
-                }
-
-#ifdef ENABLE_FIBER_SUPPORT
-        if (HW_FIBER_MODE_ENABLED(tp))
-                rtl8168_hw_init_fiber_nic(tp);
-#endif //ENABLE_FIBER_SUPPORT
-}
-
-void
-rtl8168_hw_disable_mac_mcu_bps(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        if (tp->HwSuppAspmClkIntrLock) {
-                rtl8168_enable_cfg9346_write(tp);
-                rtl8168_hw_aspm_clkreq_enable(tp, false);
-                rtl8168_disable_cfg9346_write(tp);
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                rtl8168_mac_ocp_write(tp, 0xFC38, 0x0000);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                rtl8168_mac_ocp_write(tp, 0xFC28, 0x0000);
-                rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0000);
-                rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0000);
-                rtl8168_mac_ocp_write(tp, 0xFC2E, 0x0000);
-                rtl8168_mac_ocp_write(tp, 0xFC30, 0x0000);
-                rtl8168_mac_ocp_write(tp, 0xFC32, 0x0000);
-                rtl8168_mac_ocp_write(tp, 0xFC34, 0x0000);
-                rtl8168_mac_ocp_write(tp, 0xFC36, 0x0000);
-                mdelay(3);
-                rtl8168_mac_ocp_write(tp, 0xFC26, 0x0000);
-                break;
-        }
-}
-
-#ifndef ENABLE_USE_FIRMWARE_FILE
-static void
-rtl8168_set_mac_mcu_8168g_1(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        rtl8168_mac_ocp_write(tp, 0xE43C, 0x0000);
-        rtl8168_mac_ocp_write(tp, 0xE43E, 0x0000);
-
-        rtl8168_mac_ocp_write(tp, 0xE434, 0x0004);
-        rtl8168_mac_ocp_write(tp, 0xE43C, 0x0004);
-
-        rtl8168_hw_disable_mac_mcu_bps(dev);
-
-        rtl8168_mac_ocp_write( tp, 0xF800, 0xE008 );
-        rtl8168_mac_ocp_write( tp, 0xF802, 0xE01B );
-        rtl8168_mac_ocp_write( tp, 0xF804, 0xE022 );
-        rtl8168_mac_ocp_write( tp, 0xF806, 0xE094 );
-        rtl8168_mac_ocp_write( tp, 0xF808, 0xE097 );
-        rtl8168_mac_ocp_write( tp, 0xF80A, 0xE09A );
-        rtl8168_mac_ocp_write( tp, 0xF80C, 0xE0B3 );
-        rtl8168_mac_ocp_write( tp, 0xF80E, 0xE0BA );
-        rtl8168_mac_ocp_write( tp, 0xF810, 0x49D2 );
-        rtl8168_mac_ocp_write( tp, 0xF812, 0xF10D );
-        rtl8168_mac_ocp_write( tp, 0xF814, 0x766C );
-        rtl8168_mac_ocp_write( tp, 0xF816, 0x49E2 );
-        rtl8168_mac_ocp_write( tp, 0xF818, 0xF00A );
-        rtl8168_mac_ocp_write( tp, 0xF81A, 0x1EC0 );
-        rtl8168_mac_ocp_write( tp, 0xF81C, 0x8EE1 );
-        rtl8168_mac_ocp_write( tp, 0xF81E, 0xC60A );
-        rtl8168_mac_ocp_write( tp, 0xF820, 0x77C0 );
-        rtl8168_mac_ocp_write( tp, 0xF822, 0x4870 );
-        rtl8168_mac_ocp_write( tp, 0xF824, 0x9FC0 );
-        rtl8168_mac_ocp_write( tp, 0xF826, 0x1EA0 );
-        rtl8168_mac_ocp_write( tp, 0xF828, 0xC707 );
-        rtl8168_mac_ocp_write( tp, 0xF82A, 0x8EE1 );
-        rtl8168_mac_ocp_write( tp, 0xF82C, 0x9D6C );
-        rtl8168_mac_ocp_write( tp, 0xF82E, 0xC603 );
-        rtl8168_mac_ocp_write( tp, 0xF830, 0xBE00 );
-        rtl8168_mac_ocp_write( tp, 0xF832, 0xB416 );
-        rtl8168_mac_ocp_write( tp, 0xF834, 0x0076 );
-        rtl8168_mac_ocp_write( tp, 0xF836, 0xE86C );
-        rtl8168_mac_ocp_write( tp, 0xF838, 0xC406 );
-        rtl8168_mac_ocp_write( tp, 0xF83A, 0x7580 );
-        rtl8168_mac_ocp_write( tp, 0xF83C, 0x4852 );
-        rtl8168_mac_ocp_write( tp, 0xF83E, 0x8D80 );
-        rtl8168_mac_ocp_write( tp, 0xF840, 0xC403 );
-        rtl8168_mac_ocp_write( tp, 0xF842, 0xBC00 );
-        rtl8168_mac_ocp_write( tp, 0xF844, 0xD3E0 );
-        rtl8168_mac_ocp_write( tp, 0xF846, 0x02C8 );
-        rtl8168_mac_ocp_write( tp, 0xF848, 0x8918 );
-        rtl8168_mac_ocp_write( tp, 0xF84A, 0xE815 );
-        rtl8168_mac_ocp_write( tp, 0xF84C, 0x1100 );
-        rtl8168_mac_ocp_write( tp, 0xF84E, 0xF011 );
-        rtl8168_mac_ocp_write( tp, 0xF850, 0xE812 );
-        rtl8168_mac_ocp_write( tp, 0xF852, 0x4990 );
-        rtl8168_mac_ocp_write( tp, 0xF854, 0xF002 );
-        rtl8168_mac_ocp_write( tp, 0xF856, 0xE817 );
-        rtl8168_mac_ocp_write( tp, 0xF858, 0xE80E );
-        rtl8168_mac_ocp_write( tp, 0xF85A, 0x4992 );
-        rtl8168_mac_ocp_write( tp, 0xF85C, 0xF002 );
-        rtl8168_mac_ocp_write( tp, 0xF85E, 0xE80E );
-        rtl8168_mac_ocp_write( tp, 0xF860, 0xE80A );
-        rtl8168_mac_ocp_write( tp, 0xF862, 0x4993 );
-        rtl8168_mac_ocp_write( tp, 0xF864, 0xF002 );
-        rtl8168_mac_ocp_write( tp, 0xF866, 0xE818 );
-        rtl8168_mac_ocp_write( tp, 0xF868, 0xE806 );
-        rtl8168_mac_ocp_write( tp, 0xF86A, 0x4991 );
-        rtl8168_mac_ocp_write( tp, 0xF86C, 0xF002 );
-        rtl8168_mac_ocp_write( tp, 0xF86E, 0xE838 );
-        rtl8168_mac_ocp_write( tp, 0xF870, 0xC25E );
-        rtl8168_mac_ocp_write( tp, 0xF872, 0xBA00 );
-        rtl8168_mac_ocp_write( tp, 0xF874, 0xC056 );
-        rtl8168_mac_ocp_write( tp, 0xF876, 0x7100 );
-        rtl8168_mac_ocp_write( tp, 0xF878, 0xFF80 );
-        rtl8168_mac_ocp_write( tp, 0xF87A, 0x7100 );
-        rtl8168_mac_ocp_write( tp, 0xF87C, 0x4892 );
-        rtl8168_mac_ocp_write( tp, 0xF87E, 0x4813 );
-        rtl8168_mac_ocp_write( tp, 0xF880, 0x8900 );
-        rtl8168_mac_ocp_write( tp, 0xF882, 0xE00A );
-        rtl8168_mac_ocp_write( tp, 0xF884, 0x7100 );
-        rtl8168_mac_ocp_write( tp, 0xF886, 0x4890 );
-        rtl8168_mac_ocp_write( tp, 0xF888, 0x4813 );
-        rtl8168_mac_ocp_write( tp, 0xF88A, 0x8900 );
-        rtl8168_mac_ocp_write( tp, 0xF88C, 0xC74B );
-        rtl8168_mac_ocp_write( tp, 0xF88E, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xF890, 0x48C2 );
-        rtl8168_mac_ocp_write( tp, 0xF892, 0x4841 );
-        rtl8168_mac_ocp_write( tp, 0xF894, 0x8CF8 );
-        rtl8168_mac_ocp_write( tp, 0xF896, 0xC746 );
-        rtl8168_mac_ocp_write( tp, 0xF898, 0x74FC );
-        rtl8168_mac_ocp_write( tp, 0xF89A, 0x49C0 );
-        rtl8168_mac_ocp_write( tp, 0xF89C, 0xF120 );
-        rtl8168_mac_ocp_write( tp, 0xF89E, 0x49C1 );
-        rtl8168_mac_ocp_write( tp, 0xF8A0, 0xF11E );
-        rtl8168_mac_ocp_write( tp, 0xF8A2, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xF8A4, 0x49C0 );
-        rtl8168_mac_ocp_write( tp, 0xF8A6, 0xF01B );
-        rtl8168_mac_ocp_write( tp, 0xF8A8, 0x49C6 );
-        rtl8168_mac_ocp_write( tp, 0xF8AA, 0xF119 );
-        rtl8168_mac_ocp_write( tp, 0xF8AC, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xF8AE, 0x49C4 );
-        rtl8168_mac_ocp_write( tp, 0xF8B0, 0xF013 );
-        rtl8168_mac_ocp_write( tp, 0xF8B2, 0xC536 );
-        rtl8168_mac_ocp_write( tp, 0xF8B4, 0x74B0 );
-        rtl8168_mac_ocp_write( tp, 0xF8B6, 0x49C1 );
-        rtl8168_mac_ocp_write( tp, 0xF8B8, 0xF1FD );
-        rtl8168_mac_ocp_write( tp, 0xF8BA, 0xC537 );
-        rtl8168_mac_ocp_write( tp, 0xF8BC, 0xC434 );
-        rtl8168_mac_ocp_write( tp, 0xF8BE, 0x9CA0 );
-        rtl8168_mac_ocp_write( tp, 0xF8C0, 0xC435 );
-        rtl8168_mac_ocp_write( tp, 0xF8C2, 0x1C13 );
-        rtl8168_mac_ocp_write( tp, 0xF8C4, 0x484F );
-        rtl8168_mac_ocp_write( tp, 0xF8C6, 0x9CA2 );
-        rtl8168_mac_ocp_write( tp, 0xF8C8, 0xC52B );
-        rtl8168_mac_ocp_write( tp, 0xF8CA, 0x74B0 );
-        rtl8168_mac_ocp_write( tp, 0xF8CC, 0x49C1 );
-        rtl8168_mac_ocp_write( tp, 0xF8CE, 0xF1FD );
-        rtl8168_mac_ocp_write( tp, 0xF8D0, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xF8D2, 0x48C4 );
-        rtl8168_mac_ocp_write( tp, 0xF8D4, 0x8CF8 );
-        rtl8168_mac_ocp_write( tp, 0xF8D6, 0x7100 );
-        rtl8168_mac_ocp_write( tp, 0xF8D8, 0x4893 );
-        rtl8168_mac_ocp_write( tp, 0xF8DA, 0x8900 );
-        rtl8168_mac_ocp_write( tp, 0xF8DC, 0xFF80 );
-        rtl8168_mac_ocp_write( tp, 0xF8DE, 0xC520 );
-        rtl8168_mac_ocp_write( tp, 0xF8E0, 0x74B0 );
-        rtl8168_mac_ocp_write( tp, 0xF8E2, 0x49C1 );
-        rtl8168_mac_ocp_write( tp, 0xF8E4, 0xF11C );
-        rtl8168_mac_ocp_write( tp, 0xF8E6, 0xC71E );
-        rtl8168_mac_ocp_write( tp, 0xF8E8, 0x74FC );
-        rtl8168_mac_ocp_write( tp, 0xF8EA, 0x49C1 );
-        rtl8168_mac_ocp_write( tp, 0xF8EC, 0xF118 );
-        rtl8168_mac_ocp_write( tp, 0xF8EE, 0x49C0 );
-        rtl8168_mac_ocp_write( tp, 0xF8F0, 0xF116 );
-        rtl8168_mac_ocp_write( tp, 0xF8F2, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xF8F4, 0x49C0 );
-        rtl8168_mac_ocp_write( tp, 0xF8F6, 0xF013 );
-        rtl8168_mac_ocp_write( tp, 0xF8F8, 0x48C3 );
-        rtl8168_mac_ocp_write( tp, 0xF8FA, 0x8CF8 );
-        rtl8168_mac_ocp_write( tp, 0xF8FC, 0xC516 );
-        rtl8168_mac_ocp_write( tp, 0xF8FE, 0x74A2 );
-        rtl8168_mac_ocp_write( tp, 0xF900, 0x49CE );
-        rtl8168_mac_ocp_write( tp, 0xF902, 0xF1FE );
-        rtl8168_mac_ocp_write( tp, 0xF904, 0xC411 );
-        rtl8168_mac_ocp_write( tp, 0xF906, 0x9CA0 );
-        rtl8168_mac_ocp_write( tp, 0xF908, 0xC411 );
-        rtl8168_mac_ocp_write( tp, 0xF90A, 0x1C13 );
-        rtl8168_mac_ocp_write( tp, 0xF90C, 0x484F );
-        rtl8168_mac_ocp_write( tp, 0xF90E, 0x9CA2 );
-        rtl8168_mac_ocp_write( tp, 0xF910, 0x74A2 );
-        rtl8168_mac_ocp_write( tp, 0xF912, 0x49CF );
-        rtl8168_mac_ocp_write( tp, 0xF914, 0xF1FE );
-        rtl8168_mac_ocp_write( tp, 0xF916, 0x7100 );
-        rtl8168_mac_ocp_write( tp, 0xF918, 0x4891 );
-        rtl8168_mac_ocp_write( tp, 0xF91A, 0x8900 );
-        rtl8168_mac_ocp_write( tp, 0xF91C, 0xFF80 );
-        rtl8168_mac_ocp_write( tp, 0xF91E, 0xE400 );
-        rtl8168_mac_ocp_write( tp, 0xF920, 0xD3E0 );
-        rtl8168_mac_ocp_write( tp, 0xF922, 0xE000 );
-        rtl8168_mac_ocp_write( tp, 0xF924, 0x0481 );
-        rtl8168_mac_ocp_write( tp, 0xF926, 0x0C81 );
-        rtl8168_mac_ocp_write( tp, 0xF928, 0xDE20 );
-        rtl8168_mac_ocp_write( tp, 0xF92A, 0x0000 );
-        rtl8168_mac_ocp_write( tp, 0xF92C, 0x0992 );
-        rtl8168_mac_ocp_write( tp, 0xF92E, 0x1B76 );
-        rtl8168_mac_ocp_write( tp, 0xF930, 0xC602 );
-        rtl8168_mac_ocp_write( tp, 0xF932, 0xBE00 );
-        rtl8168_mac_ocp_write( tp, 0xF934, 0x059C );
-        rtl8168_mac_ocp_write( tp, 0xF936, 0x1B76 );
-        rtl8168_mac_ocp_write( tp, 0xF938, 0xC602 );
-        rtl8168_mac_ocp_write( tp, 0xF93A, 0xBE00 );
-        rtl8168_mac_ocp_write( tp, 0xF93C, 0x065A );
-        rtl8168_mac_ocp_write( tp, 0xF93E, 0xB400 );
-        rtl8168_mac_ocp_write( tp, 0xF940, 0x18DE );
-        rtl8168_mac_ocp_write( tp, 0xF942, 0x2008 );
-        rtl8168_mac_ocp_write( tp, 0xF944, 0x4001 );
-        rtl8168_mac_ocp_write( tp, 0xF946, 0xF10F );
-        rtl8168_mac_ocp_write( tp, 0xF948, 0x7342 );
-        rtl8168_mac_ocp_write( tp, 0xF94A, 0x1880 );
-        rtl8168_mac_ocp_write( tp, 0xF94C, 0x2008 );
-        rtl8168_mac_ocp_write( tp, 0xF94E, 0x0009 );
-        rtl8168_mac_ocp_write( tp, 0xF950, 0x4018 );
-        rtl8168_mac_ocp_write( tp, 0xF952, 0xF109 );
-        rtl8168_mac_ocp_write( tp, 0xF954, 0x7340 );
-        rtl8168_mac_ocp_write( tp, 0xF956, 0x25BC );
-        rtl8168_mac_ocp_write( tp, 0xF958, 0x130F );
-        rtl8168_mac_ocp_write( tp, 0xF95A, 0xF105 );
-        rtl8168_mac_ocp_write( tp, 0xF95C, 0xC00A );
-        rtl8168_mac_ocp_write( tp, 0xF95E, 0x7300 );
-        rtl8168_mac_ocp_write( tp, 0xF960, 0x4831 );
-        rtl8168_mac_ocp_write( tp, 0xF962, 0x9B00 );
-        rtl8168_mac_ocp_write( tp, 0xF964, 0xB000 );
-        rtl8168_mac_ocp_write( tp, 0xF966, 0x7340 );
-        rtl8168_mac_ocp_write( tp, 0xF968, 0x8320 );
-        rtl8168_mac_ocp_write( tp, 0xF96A, 0xC302 );
-        rtl8168_mac_ocp_write( tp, 0xF96C, 0xBB00 );
-        rtl8168_mac_ocp_write( tp, 0xF96E, 0x0C12 );
-        rtl8168_mac_ocp_write( tp, 0xF970, 0xE860 );
-        rtl8168_mac_ocp_write( tp, 0xF972, 0xC406 );
-        rtl8168_mac_ocp_write( tp, 0xF974, 0x7580 );
-        rtl8168_mac_ocp_write( tp, 0xF976, 0x4851 );
-        rtl8168_mac_ocp_write( tp, 0xF978, 0x8D80 );
-        rtl8168_mac_ocp_write( tp, 0xF97A, 0xC403 );
-        rtl8168_mac_ocp_write( tp, 0xF97C, 0xBC00 );
-        rtl8168_mac_ocp_write( tp, 0xF97E, 0xD3E0 );
-        rtl8168_mac_ocp_write( tp, 0xF980, 0x02C8 );
-        rtl8168_mac_ocp_write( tp, 0xF982, 0xC406 );
-        rtl8168_mac_ocp_write( tp, 0xF984, 0x7580 );
-        rtl8168_mac_ocp_write( tp, 0xF986, 0x4850 );
-        rtl8168_mac_ocp_write( tp, 0xF988, 0x8D80 );
-        rtl8168_mac_ocp_write( tp, 0xF98A, 0xC403 );
-        rtl8168_mac_ocp_write( tp, 0xF98C, 0xBC00 );
-        rtl8168_mac_ocp_write( tp, 0xF98E, 0xD3E0 );
-        rtl8168_mac_ocp_write( tp, 0xF990, 0x0298 );
-
-        rtl8168_mac_ocp_write( tp, 0xDE30, 0x0080 );
-
-        rtl8168_mac_ocp_write( tp, 0xFC26, 0x8000 );
-
-        rtl8168_mac_ocp_write( tp, 0xFC28, 0x0075 );
-        rtl8168_mac_ocp_write( tp, 0xFC2A, 0x02B1 );
-        rtl8168_mac_ocp_write( tp, 0xFC2C, 0x0991 );
-        rtl8168_mac_ocp_write( tp, 0xFC2E, 0x059B );
-        rtl8168_mac_ocp_write( tp, 0xFC30, 0x0659 );
-        rtl8168_mac_ocp_write( tp, 0xFC32, 0x0000 );
-        rtl8168_mac_ocp_write( tp, 0xFC34, 0x02C7 );
-        rtl8168_mac_ocp_write( tp, 0xFC36, 0x0279 );
-}
-
-static void
-rtl8168_set_mac_mcu_8168gu_1(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        rtl8168_hw_disable_mac_mcu_bps(dev);
-
-        rtl8168_mac_ocp_write( tp, 0xF800, 0xE008 );
-        rtl8168_mac_ocp_write( tp, 0xF802, 0xE011 );
-        rtl8168_mac_ocp_write( tp, 0xF804, 0xE015 );
-        rtl8168_mac_ocp_write( tp, 0xF806, 0xE018 );
-        rtl8168_mac_ocp_write( tp, 0xF808, 0xE01B );
-        rtl8168_mac_ocp_write( tp, 0xF80A, 0xE027 );
-        rtl8168_mac_ocp_write( tp, 0xF80C, 0xE043 );
-        rtl8168_mac_ocp_write( tp, 0xF80E, 0xE065 );
-        rtl8168_mac_ocp_write( tp, 0xF810, 0x49E2 );
-        rtl8168_mac_ocp_write( tp, 0xF812, 0xF005 );
-        rtl8168_mac_ocp_write( tp, 0xF814, 0x49EA );
-        rtl8168_mac_ocp_write( tp, 0xF816, 0xF003 );
-        rtl8168_mac_ocp_write( tp, 0xF818, 0xC404 );
-        rtl8168_mac_ocp_write( tp, 0xF81A, 0xBC00 );
-        rtl8168_mac_ocp_write( tp, 0xF81C, 0xC403 );
-        rtl8168_mac_ocp_write( tp, 0xF81E, 0xBC00 );
-        rtl8168_mac_ocp_write( tp, 0xF820, 0x0496 );
-        rtl8168_mac_ocp_write( tp, 0xF822, 0x051A );
-        rtl8168_mac_ocp_write( tp, 0xF824, 0x1D01 );
-        rtl8168_mac_ocp_write( tp, 0xF826, 0x8DE8 );
-        rtl8168_mac_ocp_write( tp, 0xF828, 0xC602 );
-        rtl8168_mac_ocp_write( tp, 0xF82A, 0xBE00 );
-        rtl8168_mac_ocp_write( tp, 0xF82C, 0x0206 );
-        rtl8168_mac_ocp_write( tp, 0xF82E, 0x1B76 );
-        rtl8168_mac_ocp_write( tp, 0xF830, 0xC202 );
-        rtl8168_mac_ocp_write( tp, 0xF832, 0xBA00 );
-        rtl8168_mac_ocp_write( tp, 0xF834, 0x058A );
-        rtl8168_mac_ocp_write( tp, 0xF836, 0x1B76 );
-        rtl8168_mac_ocp_write( tp, 0xF838, 0xC602 );
-        rtl8168_mac_ocp_write( tp, 0xF83A, 0xBE00 );
-        rtl8168_mac_ocp_write( tp, 0xF83C, 0x0648 );
-        rtl8168_mac_ocp_write( tp, 0xF83E, 0x74E6 );
-        rtl8168_mac_ocp_write( tp, 0xF840, 0x1B78 );
-        rtl8168_mac_ocp_write( tp, 0xF842, 0x46DC );
-        rtl8168_mac_ocp_write( tp, 0xF844, 0x1300 );
-        rtl8168_mac_ocp_write( tp, 0xF846, 0xF005 );
-        rtl8168_mac_ocp_write( tp, 0xF848, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xF84A, 0x48C3 );
-        rtl8168_mac_ocp_write( tp, 0xF84C, 0x48C4 );
-        rtl8168_mac_ocp_write( tp, 0xF84E, 0x8CF8 );
-        rtl8168_mac_ocp_write( tp, 0xF850, 0x64E7 );
-        rtl8168_mac_ocp_write( tp, 0xF852, 0xC302 );
-        rtl8168_mac_ocp_write( tp, 0xF854, 0xBB00 );
-        rtl8168_mac_ocp_write( tp, 0xF856, 0x068E );
-        rtl8168_mac_ocp_write( tp, 0xF858, 0x74E4 );
-        rtl8168_mac_ocp_write( tp, 0xF85A, 0x49C5 );
-        rtl8168_mac_ocp_write( tp, 0xF85C, 0xF106 );
-        rtl8168_mac_ocp_write( tp, 0xF85E, 0x49C6 );
-        rtl8168_mac_ocp_write( tp, 0xF860, 0xF107 );
-        rtl8168_mac_ocp_write( tp, 0xF862, 0x48C8 );
-        rtl8168_mac_ocp_write( tp, 0xF864, 0x48C9 );
-        rtl8168_mac_ocp_write( tp, 0xF866, 0xE011 );
-        rtl8168_mac_ocp_write( tp, 0xF868, 0x48C9 );
-        rtl8168_mac_ocp_write( tp, 0xF86A, 0x4848 );
-        rtl8168_mac_ocp_write( tp, 0xF86C, 0xE00E );
-        rtl8168_mac_ocp_write( tp, 0xF86E, 0x4848 );
-        rtl8168_mac_ocp_write( tp, 0xF870, 0x49C7 );
-        rtl8168_mac_ocp_write( tp, 0xF872, 0xF00A );
-        rtl8168_mac_ocp_write( tp, 0xF874, 0x48C9 );
-        rtl8168_mac_ocp_write( tp, 0xF876, 0xC60D );
-        rtl8168_mac_ocp_write( tp, 0xF878, 0x1D1F );
-        rtl8168_mac_ocp_write( tp, 0xF87A, 0x8DC2 );
-        rtl8168_mac_ocp_write( tp, 0xF87C, 0x1D00 );
-        rtl8168_mac_ocp_write( tp, 0xF87E, 0x8DC3 );
-        rtl8168_mac_ocp_write( tp, 0xF880, 0x1D11 );
-        rtl8168_mac_ocp_write( tp, 0xF882, 0x8DC0 );
-        rtl8168_mac_ocp_write( tp, 0xF884, 0xE002 );
-        rtl8168_mac_ocp_write( tp, 0xF886, 0x4849 );
-        rtl8168_mac_ocp_write( tp, 0xF888, 0x94E5 );
-        rtl8168_mac_ocp_write( tp, 0xF88A, 0xC602 );
-        rtl8168_mac_ocp_write( tp, 0xF88C, 0xBE00 );
-        rtl8168_mac_ocp_write( tp, 0xF88E, 0x0238 );
-        rtl8168_mac_ocp_write( tp, 0xF890, 0xE434 );
-        rtl8168_mac_ocp_write( tp, 0xF892, 0x49D9 );
-        rtl8168_mac_ocp_write( tp, 0xF894, 0xF01B );
-        rtl8168_mac_ocp_write( tp, 0xF896, 0xC31E );
-        rtl8168_mac_ocp_write( tp, 0xF898, 0x7464 );
-        rtl8168_mac_ocp_write( tp, 0xF89A, 0x49C4 );
-        rtl8168_mac_ocp_write( tp, 0xF89C, 0xF114 );
-        rtl8168_mac_ocp_write( tp, 0xF89E, 0xC31B );
-        rtl8168_mac_ocp_write( tp, 0xF8A0, 0x6460 );
-        rtl8168_mac_ocp_write( tp, 0xF8A2, 0x14FA );
-        rtl8168_mac_ocp_write( tp, 0xF8A4, 0xFA02 );
-        rtl8168_mac_ocp_write( tp, 0xF8A6, 0xE00F );
-        rtl8168_mac_ocp_write( tp, 0xF8A8, 0xC317 );
-        rtl8168_mac_ocp_write( tp, 0xF8AA, 0x7460 );
-        rtl8168_mac_ocp_write( tp, 0xF8AC, 0x49C0 );
-        rtl8168_mac_ocp_write( tp, 0xF8AE, 0xF10B );
-        rtl8168_mac_ocp_write( tp, 0xF8B0, 0xC311 );
-        rtl8168_mac_ocp_write( tp, 0xF8B2, 0x7462 );
-        rtl8168_mac_ocp_write( tp, 0xF8B4, 0x48C1 );
-        rtl8168_mac_ocp_write( tp, 0xF8B6, 0x9C62 );
-        rtl8168_mac_ocp_write( tp, 0xF8B8, 0x4841 );
-        rtl8168_mac_ocp_write( tp, 0xF8BA, 0x9C62 );
-        rtl8168_mac_ocp_write( tp, 0xF8BC, 0xC30A );
-        rtl8168_mac_ocp_write( tp, 0xF8BE, 0x1C04 );
-        rtl8168_mac_ocp_write( tp, 0xF8C0, 0x8C60 );
-        rtl8168_mac_ocp_write( tp, 0xF8C2, 0xE004 );
-        rtl8168_mac_ocp_write( tp, 0xF8C4, 0x1C15 );
-        rtl8168_mac_ocp_write( tp, 0xF8C6, 0xC305 );
-        rtl8168_mac_ocp_write( tp, 0xF8C8, 0x8C60 );
-        rtl8168_mac_ocp_write( tp, 0xF8CA, 0xC602 );
-        rtl8168_mac_ocp_write( tp, 0xF8CC, 0xBE00 );
-        rtl8168_mac_ocp_write( tp, 0xF8CE, 0x0374 );
-        rtl8168_mac_ocp_write( tp, 0xF8D0, 0xE434 );
-        rtl8168_mac_ocp_write( tp, 0xF8D2, 0xE030 );
-        rtl8168_mac_ocp_write( tp, 0xF8D4, 0xE61C );
-        rtl8168_mac_ocp_write( tp, 0xF8D6, 0xE906 );
-        rtl8168_mac_ocp_write( tp, 0xF8D8, 0xC602 );
-        rtl8168_mac_ocp_write( tp, 0xF8DA, 0xBE00 );
-        rtl8168_mac_ocp_write( tp, 0xF8DC, 0x0000 );
-
-        rtl8168_mac_ocp_write( tp, 0xFC26, 0x8000 );
-
-        rtl8168_mac_ocp_write( tp, 0xFC28, 0x0493 );
-        rtl8168_mac_ocp_write( tp, 0xFC2A, 0x0205 );
-        rtl8168_mac_ocp_write( tp, 0xFC2C, 0x0589 );
-        rtl8168_mac_ocp_write( tp, 0xFC2E, 0x0647 );
-        rtl8168_mac_ocp_write( tp, 0xFC30, 0x0000 );
-        rtl8168_mac_ocp_write( tp, 0xFC32, 0x0215 );
-        rtl8168_mac_ocp_write( tp, 0xFC34, 0x0285 );
-}
-
-static void
-rtl8168_set_mac_mcu_8168gu_2(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        rtl8168_hw_disable_mac_mcu_bps(dev);
-
-        rtl8168_mac_ocp_write( tp, 0xF800, 0xE008 );
-        rtl8168_mac_ocp_write( tp, 0xF802, 0xE00A );
-        rtl8168_mac_ocp_write( tp, 0xF804, 0xE00D );
-        rtl8168_mac_ocp_write( tp, 0xF806, 0xE02F );
-        rtl8168_mac_ocp_write( tp, 0xF808, 0xE031 );
-        rtl8168_mac_ocp_write( tp, 0xF80A, 0xE038 );
-        rtl8168_mac_ocp_write( tp, 0xF80C, 0xE03A );
-        rtl8168_mac_ocp_write( tp, 0xF80E, 0xE051 );
-        rtl8168_mac_ocp_write( tp, 0xF810, 0xC202 );
-        rtl8168_mac_ocp_write( tp, 0xF812, 0xBA00 );
-        rtl8168_mac_ocp_write( tp, 0xF814, 0x0DFC );
-        rtl8168_mac_ocp_write( tp, 0xF816, 0x7444 );
-        rtl8168_mac_ocp_write( tp, 0xF818, 0xC502 );
-        rtl8168_mac_ocp_write( tp, 0xF81A, 0xBD00 );
-        rtl8168_mac_ocp_write( tp, 0xF81C, 0x0A30 );
-        rtl8168_mac_ocp_write( tp, 0xF81E, 0x49D9 );
-        rtl8168_mac_ocp_write( tp, 0xF820, 0xF019 );
-        rtl8168_mac_ocp_write( tp, 0xF822, 0xC520 );
-        rtl8168_mac_ocp_write( tp, 0xF824, 0x64A5 );
-        rtl8168_mac_ocp_write( tp, 0xF826, 0x1400 );
-        rtl8168_mac_ocp_write( tp, 0xF828, 0xF007 );
-        rtl8168_mac_ocp_write( tp, 0xF82A, 0x0C01 );
-        rtl8168_mac_ocp_write( tp, 0xF82C, 0x8CA5 );
-        rtl8168_mac_ocp_write( tp, 0xF82E, 0x1C15 );
-        rtl8168_mac_ocp_write( tp, 0xF830, 0xC515 );
-        rtl8168_mac_ocp_write( tp, 0xF832, 0x9CA0 );
-        rtl8168_mac_ocp_write( tp, 0xF834, 0xE00F );
-        rtl8168_mac_ocp_write( tp, 0xF836, 0xC513 );
-        rtl8168_mac_ocp_write( tp, 0xF838, 0x74A0 );
-        rtl8168_mac_ocp_write( tp, 0xF83A, 0x48C8 );
-        rtl8168_mac_ocp_write( tp, 0xF83C, 0x48CA );
-        rtl8168_mac_ocp_write( tp, 0xF83E, 0x9CA0 );
-        rtl8168_mac_ocp_write( tp, 0xF840, 0xC510 );
-        rtl8168_mac_ocp_write( tp, 0xF842, 0x1B00 );
-        rtl8168_mac_ocp_write( tp, 0xF844, 0x9BA0 );
-        rtl8168_mac_ocp_write( tp, 0xF846, 0x1B1C );
-        rtl8168_mac_ocp_write( tp, 0xF848, 0x483F );
-        rtl8168_mac_ocp_write( tp, 0xF84A, 0x9BA2 );
-        rtl8168_mac_ocp_write( tp, 0xF84C, 0x1B04 );
-        rtl8168_mac_ocp_write( tp, 0xF84E, 0xC506 );
-        rtl8168_mac_ocp_write( tp, 0xF850, 0x9BA0 );
-        rtl8168_mac_ocp_write( tp, 0xF852, 0xC603 );
-        rtl8168_mac_ocp_write( tp, 0xF854, 0xBE00 );
-        rtl8168_mac_ocp_write( tp, 0xF856, 0x0298 );
-        rtl8168_mac_ocp_write( tp, 0xF858, 0x03DE );
-        rtl8168_mac_ocp_write( tp, 0xF85A, 0xE434 );
-        rtl8168_mac_ocp_write( tp, 0xF85C, 0xE096 );
-        rtl8168_mac_ocp_write( tp, 0xF85E, 0xE860 );
-        rtl8168_mac_ocp_write( tp, 0xF860, 0xDE20 );
-        rtl8168_mac_ocp_write( tp, 0xF862, 0xD3C0 );
-        rtl8168_mac_ocp_write( tp, 0xF864, 0xC602 );
-        rtl8168_mac_ocp_write( tp, 0xF866, 0xBE00 );
-        rtl8168_mac_ocp_write( tp, 0xF868, 0x0A64 );
-        rtl8168_mac_ocp_write( tp, 0xF86A, 0xC707 );
-        rtl8168_mac_ocp_write( tp, 0xF86C, 0x1D00 );
-        rtl8168_mac_ocp_write( tp, 0xF86E, 0x8DE2 );
-        rtl8168_mac_ocp_write( tp, 0xF870, 0x48C1 );
-        rtl8168_mac_ocp_write( tp, 0xF872, 0xC502 );
-        rtl8168_mac_ocp_write( tp, 0xF874, 0xBD00 );
-        rtl8168_mac_ocp_write( tp, 0xF876, 0x00AA );
-        rtl8168_mac_ocp_write( tp, 0xF878, 0xE0C0 );
-        rtl8168_mac_ocp_write( tp, 0xF87A, 0xC502 );
-        rtl8168_mac_ocp_write( tp, 0xF87C, 0xBD00 );
-        rtl8168_mac_ocp_write( tp, 0xF87E, 0x0132 );
-        rtl8168_mac_ocp_write( tp, 0xF880, 0xC50C );
-        rtl8168_mac_ocp_write( tp, 0xF882, 0x74A2 );
-        rtl8168_mac_ocp_write( tp, 0xF884, 0x49CE );
-        rtl8168_mac_ocp_write( tp, 0xF886, 0xF1FE );
-        rtl8168_mac_ocp_write( tp, 0xF888, 0x1C00 );
-        rtl8168_mac_ocp_write( tp, 0xF88A, 0x9EA0 );
-        rtl8168_mac_ocp_write( tp, 0xF88C, 0x1C1C );
-        rtl8168_mac_ocp_write( tp, 0xF88E, 0x484F );
-        rtl8168_mac_ocp_write( tp, 0xF890, 0x9CA2 );
-        rtl8168_mac_ocp_write( tp, 0xF892, 0xC402 );
-        rtl8168_mac_ocp_write( tp, 0xF894, 0xBC00 );
-        rtl8168_mac_ocp_write( tp, 0xF896, 0x0AFA );
-        rtl8168_mac_ocp_write( tp, 0xF898, 0xDE20 );
-        rtl8168_mac_ocp_write( tp, 0xF89A, 0xE000 );
-        rtl8168_mac_ocp_write( tp, 0xF89C, 0xE092 );
-        rtl8168_mac_ocp_write( tp, 0xF89E, 0xE430 );
-        rtl8168_mac_ocp_write( tp, 0xF8A0, 0xDE20 );
-        rtl8168_mac_ocp_write( tp, 0xF8A2, 0xE0C0 );
-        rtl8168_mac_ocp_write( tp, 0xF8A4, 0xE860 );
-        rtl8168_mac_ocp_write( tp, 0xF8A6, 0xE84C );
-        rtl8168_mac_ocp_write( tp, 0xF8A8, 0xB400 );
-        rtl8168_mac_ocp_write( tp, 0xF8AA, 0xB430 );
-        rtl8168_mac_ocp_write( tp, 0xF8AC, 0xE410 );
-        rtl8168_mac_ocp_write( tp, 0xF8AE, 0xC0AE );
-        rtl8168_mac_ocp_write( tp, 0xF8B0, 0xB407 );
-        rtl8168_mac_ocp_write( tp, 0xF8B2, 0xB406 );
-        rtl8168_mac_ocp_write( tp, 0xF8B4, 0xB405 );
-        rtl8168_mac_ocp_write( tp, 0xF8B6, 0xB404 );
-        rtl8168_mac_ocp_write( tp, 0xF8B8, 0xB403 );
-        rtl8168_mac_ocp_write( tp, 0xF8BA, 0xB402 );
-        rtl8168_mac_ocp_write( tp, 0xF8BC, 0xB401 );
-        rtl8168_mac_ocp_write( tp, 0xF8BE, 0xC7EE );
-        rtl8168_mac_ocp_write( tp, 0xF8C0, 0x76F4 );
-        rtl8168_mac_ocp_write( tp, 0xF8C2, 0xC2ED );
-        rtl8168_mac_ocp_write( tp, 0xF8C4, 0xC3ED );
-        rtl8168_mac_ocp_write( tp, 0xF8C6, 0xC1EF );
-        rtl8168_mac_ocp_write( tp, 0xF8C8, 0xC5F3 );
-        rtl8168_mac_ocp_write( tp, 0xF8CA, 0x74A0 );
-        rtl8168_mac_ocp_write( tp, 0xF8CC, 0x49CD );
-        rtl8168_mac_ocp_write( tp, 0xF8CE, 0xF001 );
-        rtl8168_mac_ocp_write( tp, 0xF8D0, 0xC5EE );
-        rtl8168_mac_ocp_write( tp, 0xF8D2, 0x74A0 );
-        rtl8168_mac_ocp_write( tp, 0xF8D4, 0x49C1 );
-        rtl8168_mac_ocp_write( tp, 0xF8D6, 0xF105 );
-        rtl8168_mac_ocp_write( tp, 0xF8D8, 0xC5E4 );
-        rtl8168_mac_ocp_write( tp, 0xF8DA, 0x74A2 );
-        rtl8168_mac_ocp_write( tp, 0xF8DC, 0x49CE );
-        rtl8168_mac_ocp_write( tp, 0xF8DE, 0xF00B );
-        rtl8168_mac_ocp_write( tp, 0xF8E0, 0x7444 );
-        rtl8168_mac_ocp_write( tp, 0xF8E2, 0x484B );
-        rtl8168_mac_ocp_write( tp, 0xF8E4, 0x9C44 );
-        rtl8168_mac_ocp_write( tp, 0xF8E6, 0x1C10 );
-        rtl8168_mac_ocp_write( tp, 0xF8E8, 0x9C62 );
-        rtl8168_mac_ocp_write( tp, 0xF8EA, 0x1C11 );
-        rtl8168_mac_ocp_write( tp, 0xF8EC, 0x8C60 );
-        rtl8168_mac_ocp_write( tp, 0xF8EE, 0x1C00 );
-        rtl8168_mac_ocp_write( tp, 0xF8F0, 0x9CF6 );
-        rtl8168_mac_ocp_write( tp, 0xF8F2, 0xE0EC );
-        rtl8168_mac_ocp_write( tp, 0xF8F4, 0x49E7 );
-        rtl8168_mac_ocp_write( tp, 0xF8F6, 0xF016 );
-        rtl8168_mac_ocp_write( tp, 0xF8F8, 0x1D80 );
-        rtl8168_mac_ocp_write( tp, 0xF8FA, 0x8DF4 );
-        rtl8168_mac_ocp_write( tp, 0xF8FC, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xF8FE, 0x4843 );
-        rtl8168_mac_ocp_write( tp, 0xF900, 0x8CF8 );
-        rtl8168_mac_ocp_write( tp, 0xF902, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xF904, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xF906, 0x7444 );
-        rtl8168_mac_ocp_write( tp, 0xF908, 0x48C8 );
-        rtl8168_mac_ocp_write( tp, 0xF90A, 0x48C9 );
-        rtl8168_mac_ocp_write( tp, 0xF90C, 0x48CA );
-        rtl8168_mac_ocp_write( tp, 0xF90E, 0x9C44 );
-        rtl8168_mac_ocp_write( tp, 0xF910, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xF912, 0x4844 );
-        rtl8168_mac_ocp_write( tp, 0xF914, 0x8CF8 );
-        rtl8168_mac_ocp_write( tp, 0xF916, 0x1E01 );
-        rtl8168_mac_ocp_write( tp, 0xF918, 0xE8DB );
-        rtl8168_mac_ocp_write( tp, 0xF91A, 0x7420 );
-        rtl8168_mac_ocp_write( tp, 0xF91C, 0x48C1 );
-        rtl8168_mac_ocp_write( tp, 0xF91E, 0x9C20 );
-        rtl8168_mac_ocp_write( tp, 0xF920, 0xE0D5 );
-        rtl8168_mac_ocp_write( tp, 0xF922, 0x49E6 );
-        rtl8168_mac_ocp_write( tp, 0xF924, 0xF02A );
-        rtl8168_mac_ocp_write( tp, 0xF926, 0x1D40 );
-        rtl8168_mac_ocp_write( tp, 0xF928, 0x8DF4 );
-        rtl8168_mac_ocp_write( tp, 0xF92A, 0x74FC );
-        rtl8168_mac_ocp_write( tp, 0xF92C, 0x49C0 );
-        rtl8168_mac_ocp_write( tp, 0xF92E, 0xF124 );
-        rtl8168_mac_ocp_write( tp, 0xF930, 0x49C1 );
-        rtl8168_mac_ocp_write( tp, 0xF932, 0xF122 );
-        rtl8168_mac_ocp_write( tp, 0xF934, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xF936, 0x49C0 );
-        rtl8168_mac_ocp_write( tp, 0xF938, 0xF01F );
-        rtl8168_mac_ocp_write( tp, 0xF93A, 0xE8D3 );
-        rtl8168_mac_ocp_write( tp, 0xF93C, 0x48C4 );
-        rtl8168_mac_ocp_write( tp, 0xF93E, 0x8CF8 );
-        rtl8168_mac_ocp_write( tp, 0xF940, 0x1E00 );
-        rtl8168_mac_ocp_write( tp, 0xF942, 0xE8C6 );
-        rtl8168_mac_ocp_write( tp, 0xF944, 0xC5B1 );
-        rtl8168_mac_ocp_write( tp, 0xF946, 0x74A0 );
-        rtl8168_mac_ocp_write( tp, 0xF948, 0x49C3 );
-        rtl8168_mac_ocp_write( tp, 0xF94A, 0xF016 );
-        rtl8168_mac_ocp_write( tp, 0xF94C, 0xC5AF );
-        rtl8168_mac_ocp_write( tp, 0xF94E, 0x74A4 );
-        rtl8168_mac_ocp_write( tp, 0xF950, 0x49C2 );
-        rtl8168_mac_ocp_write( tp, 0xF952, 0xF005 );
-        rtl8168_mac_ocp_write( tp, 0xF954, 0xC5AA );
-        rtl8168_mac_ocp_write( tp, 0xF956, 0x74B2 );
-        rtl8168_mac_ocp_write( tp, 0xF958, 0x49C9 );
-        rtl8168_mac_ocp_write( tp, 0xF95A, 0xF10E );
-        rtl8168_mac_ocp_write( tp, 0xF95C, 0xC5A6 );
-        rtl8168_mac_ocp_write( tp, 0xF95E, 0x74A8 );
-        rtl8168_mac_ocp_write( tp, 0xF960, 0x4845 );
-        rtl8168_mac_ocp_write( tp, 0xF962, 0x4846 );
-        rtl8168_mac_ocp_write( tp, 0xF964, 0x4847 );
-        rtl8168_mac_ocp_write( tp, 0xF966, 0x4848 );
-        rtl8168_mac_ocp_write( tp, 0xF968, 0x9CA8 );
-        rtl8168_mac_ocp_write( tp, 0xF96A, 0x74B2 );
-        rtl8168_mac_ocp_write( tp, 0xF96C, 0x4849 );
-        rtl8168_mac_ocp_write( tp, 0xF96E, 0x9CB2 );
-        rtl8168_mac_ocp_write( tp, 0xF970, 0x74A0 );
-        rtl8168_mac_ocp_write( tp, 0xF972, 0x484F );
-        rtl8168_mac_ocp_write( tp, 0xF974, 0x9CA0 );
-        rtl8168_mac_ocp_write( tp, 0xF976, 0xE0AA );
-        rtl8168_mac_ocp_write( tp, 0xF978, 0x49E4 );
-        rtl8168_mac_ocp_write( tp, 0xF97A, 0xF018 );
-        rtl8168_mac_ocp_write( tp, 0xF97C, 0x1D10 );
-        rtl8168_mac_ocp_write( tp, 0xF97E, 0x8DF4 );
-        rtl8168_mac_ocp_write( tp, 0xF980, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xF982, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xF984, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xF986, 0x4843 );
-        rtl8168_mac_ocp_write( tp, 0xF988, 0x8CF8 );
-        rtl8168_mac_ocp_write( tp, 0xF98A, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xF98C, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xF98E, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xF990, 0x4844 );
-        rtl8168_mac_ocp_write( tp, 0xF992, 0x4842 );
-        rtl8168_mac_ocp_write( tp, 0xF994, 0x4841 );
-        rtl8168_mac_ocp_write( tp, 0xF996, 0x8CF8 );
-        rtl8168_mac_ocp_write( tp, 0xF998, 0x1E01 );
-        rtl8168_mac_ocp_write( tp, 0xF99A, 0xE89A );
-        rtl8168_mac_ocp_write( tp, 0xF99C, 0x7420 );
-        rtl8168_mac_ocp_write( tp, 0xF99E, 0x4841 );
-        rtl8168_mac_ocp_write( tp, 0xF9A0, 0x9C20 );
-        rtl8168_mac_ocp_write( tp, 0xF9A2, 0x7444 );
-        rtl8168_mac_ocp_write( tp, 0xF9A4, 0x4848 );
-        rtl8168_mac_ocp_write( tp, 0xF9A6, 0x9C44 );
-        rtl8168_mac_ocp_write( tp, 0xF9A8, 0xE091 );
-        rtl8168_mac_ocp_write( tp, 0xF9AA, 0x49E5 );
-        rtl8168_mac_ocp_write( tp, 0xF9AC, 0xF03E );
-        rtl8168_mac_ocp_write( tp, 0xF9AE, 0x1D20 );
-        rtl8168_mac_ocp_write( tp, 0xF9B0, 0x8DF4 );
-        rtl8168_mac_ocp_write( tp, 0xF9B2, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xF9B4, 0x48C2 );
-        rtl8168_mac_ocp_write( tp, 0xF9B6, 0x4841 );
-        rtl8168_mac_ocp_write( tp, 0xF9B8, 0x8CF8 );
-        rtl8168_mac_ocp_write( tp, 0xF9BA, 0x1E01 );
-        rtl8168_mac_ocp_write( tp, 0xF9BC, 0x7444 );
-        rtl8168_mac_ocp_write( tp, 0xF9BE, 0x49CA );
-        rtl8168_mac_ocp_write( tp, 0xF9C0, 0xF103 );
-        rtl8168_mac_ocp_write( tp, 0xF9C2, 0x49C2 );
-        rtl8168_mac_ocp_write( tp, 0xF9C4, 0xF00C );
-        rtl8168_mac_ocp_write( tp, 0xF9C6, 0x49C1 );
-        rtl8168_mac_ocp_write( tp, 0xF9C8, 0xF004 );
-        rtl8168_mac_ocp_write( tp, 0xF9CA, 0x6447 );
-        rtl8168_mac_ocp_write( tp, 0xF9CC, 0x2244 );
-        rtl8168_mac_ocp_write( tp, 0xF9CE, 0xE002 );
-        rtl8168_mac_ocp_write( tp, 0xF9D0, 0x1C01 );
-        rtl8168_mac_ocp_write( tp, 0xF9D2, 0x9C62 );
-        rtl8168_mac_ocp_write( tp, 0xF9D4, 0x1C11 );
-        rtl8168_mac_ocp_write( tp, 0xF9D6, 0x8C60 );
-        rtl8168_mac_ocp_write( tp, 0xF9D8, 0x1C00 );
-        rtl8168_mac_ocp_write( tp, 0xF9DA, 0x9CF6 );
-        rtl8168_mac_ocp_write( tp, 0xF9DC, 0x7444 );
-        rtl8168_mac_ocp_write( tp, 0xF9DE, 0x49C8 );
-        rtl8168_mac_ocp_write( tp, 0xF9E0, 0xF01D );
-        rtl8168_mac_ocp_write( tp, 0xF9E2, 0x74FC );
-        rtl8168_mac_ocp_write( tp, 0xF9E4, 0x49C0 );
-        rtl8168_mac_ocp_write( tp, 0xF9E6, 0xF11A );
-        rtl8168_mac_ocp_write( tp, 0xF9E8, 0x49C1 );
-        rtl8168_mac_ocp_write( tp, 0xF9EA, 0xF118 );
-        rtl8168_mac_ocp_write( tp, 0xF9EC, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xF9EE, 0x49C0 );
-        rtl8168_mac_ocp_write( tp, 0xF9F0, 0xF015 );
-        rtl8168_mac_ocp_write( tp, 0xF9F2, 0x49C6 );
-        rtl8168_mac_ocp_write( tp, 0xF9F4, 0xF113 );
-        rtl8168_mac_ocp_write( tp, 0xF9F6, 0xE875 );
-        rtl8168_mac_ocp_write( tp, 0xF9F8, 0x48C4 );
-        rtl8168_mac_ocp_write( tp, 0xF9FA, 0x8CF8 );
-        rtl8168_mac_ocp_write( tp, 0xF9FC, 0x7420 );
-        rtl8168_mac_ocp_write( tp, 0xF9FE, 0x48C1 );
-        rtl8168_mac_ocp_write( tp, 0xFA00, 0x9C20 );
-        rtl8168_mac_ocp_write( tp, 0xFA02, 0xC50A );
-        rtl8168_mac_ocp_write( tp, 0xFA04, 0x74A2 );
-        rtl8168_mac_ocp_write( tp, 0xFA06, 0x8CA5 );
-        rtl8168_mac_ocp_write( tp, 0xFA08, 0x74A0 );
-        rtl8168_mac_ocp_write( tp, 0xFA0A, 0xC505 );
-        rtl8168_mac_ocp_write( tp, 0xFA0C, 0x9CA2 );
-        rtl8168_mac_ocp_write( tp, 0xFA0E, 0x1C11 );
-        rtl8168_mac_ocp_write( tp, 0xFA10, 0x9CA0 );
-        rtl8168_mac_ocp_write( tp, 0xFA12, 0xE00A );
-        rtl8168_mac_ocp_write( tp, 0xFA14, 0xE434 );
-        rtl8168_mac_ocp_write( tp, 0xFA16, 0xD3C0 );
-        rtl8168_mac_ocp_write( tp, 0xFA18, 0xDC00 );
-        rtl8168_mac_ocp_write( tp, 0xFA1A, 0x7444 );
-        rtl8168_mac_ocp_write( tp, 0xFA1C, 0x49CA );
-        rtl8168_mac_ocp_write( tp, 0xFA1E, 0xF004 );
-        rtl8168_mac_ocp_write( tp, 0xFA20, 0x48CA );
-        rtl8168_mac_ocp_write( tp, 0xFA22, 0x9C44 );
-        rtl8168_mac_ocp_write( tp, 0xFA24, 0xE855 );
-        rtl8168_mac_ocp_write( tp, 0xFA26, 0xE052 );
-        rtl8168_mac_ocp_write( tp, 0xFA28, 0x49E8 );
-        rtl8168_mac_ocp_write( tp, 0xFA2A, 0xF024 );
-        rtl8168_mac_ocp_write( tp, 0xFA2C, 0x1D01 );
-        rtl8168_mac_ocp_write( tp, 0xFA2E, 0x8DF5 );
-        rtl8168_mac_ocp_write( tp, 0xFA30, 0x7440 );
-        rtl8168_mac_ocp_write( tp, 0xFA32, 0x49C0 );
-        rtl8168_mac_ocp_write( tp, 0xFA34, 0xF11E );
-        rtl8168_mac_ocp_write( tp, 0xFA36, 0x7444 );
-        rtl8168_mac_ocp_write( tp, 0xFA38, 0x49C8 );
-        rtl8168_mac_ocp_write( tp, 0xFA3A, 0xF01B );
-        rtl8168_mac_ocp_write( tp, 0xFA3C, 0x49CA );
-        rtl8168_mac_ocp_write( tp, 0xFA3E, 0xF119 );
-        rtl8168_mac_ocp_write( tp, 0xFA40, 0xC5EC );
-        rtl8168_mac_ocp_write( tp, 0xFA42, 0x76A4 );
-        rtl8168_mac_ocp_write( tp, 0xFA44, 0x49E3 );
-        rtl8168_mac_ocp_write( tp, 0xFA46, 0xF015 );
-        rtl8168_mac_ocp_write( tp, 0xFA48, 0x49C0 );
-        rtl8168_mac_ocp_write( tp, 0xFA4A, 0xF103 );
-        rtl8168_mac_ocp_write( tp, 0xFA4C, 0x49C1 );
-        rtl8168_mac_ocp_write( tp, 0xFA4E, 0xF011 );
-        rtl8168_mac_ocp_write( tp, 0xFA50, 0x4849 );
-        rtl8168_mac_ocp_write( tp, 0xFA52, 0x9C44 );
-        rtl8168_mac_ocp_write( tp, 0xFA54, 0x1C00 );
-        rtl8168_mac_ocp_write( tp, 0xFA56, 0x9CF6 );
-        rtl8168_mac_ocp_write( tp, 0xFA58, 0x7444 );
-        rtl8168_mac_ocp_write( tp, 0xFA5A, 0x49C1 );
-        rtl8168_mac_ocp_write( tp, 0xFA5C, 0xF004 );
-        rtl8168_mac_ocp_write( tp, 0xFA5E, 0x6446 );
-        rtl8168_mac_ocp_write( tp, 0xFA60, 0x1E07 );
-        rtl8168_mac_ocp_write( tp, 0xFA62, 0xE003 );
-        rtl8168_mac_ocp_write( tp, 0xFA64, 0x1C01 );
-        rtl8168_mac_ocp_write( tp, 0xFA66, 0x1E03 );
-        rtl8168_mac_ocp_write( tp, 0xFA68, 0x9C62 );
-        rtl8168_mac_ocp_write( tp, 0xFA6A, 0x1C11 );
-        rtl8168_mac_ocp_write( tp, 0xFA6C, 0x8C60 );
-        rtl8168_mac_ocp_write( tp, 0xFA6E, 0xE830 );
-        rtl8168_mac_ocp_write( tp, 0xFA70, 0xE02D );
-        rtl8168_mac_ocp_write( tp, 0xFA72, 0x49E9 );
-        rtl8168_mac_ocp_write( tp, 0xFA74, 0xF004 );
-        rtl8168_mac_ocp_write( tp, 0xFA76, 0x1D02 );
-        rtl8168_mac_ocp_write( tp, 0xFA78, 0x8DF5 );
-        rtl8168_mac_ocp_write( tp, 0xFA7A, 0xE79C );
-        rtl8168_mac_ocp_write( tp, 0xFA7C, 0x49E3 );
-        rtl8168_mac_ocp_write( tp, 0xFA7E, 0xF006 );
-        rtl8168_mac_ocp_write( tp, 0xFA80, 0x1D08 );
-        rtl8168_mac_ocp_write( tp, 0xFA82, 0x8DF4 );
-        rtl8168_mac_ocp_write( tp, 0xFA84, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xFA86, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xFA88, 0xE73A );
-        rtl8168_mac_ocp_write( tp, 0xFA8A, 0x49E1 );
-        rtl8168_mac_ocp_write( tp, 0xFA8C, 0xF007 );
-        rtl8168_mac_ocp_write( tp, 0xFA8E, 0x1D02 );
-        rtl8168_mac_ocp_write( tp, 0xFA90, 0x8DF4 );
-        rtl8168_mac_ocp_write( tp, 0xFA92, 0x1E01 );
-        rtl8168_mac_ocp_write( tp, 0xFA94, 0xE7A7 );
-        rtl8168_mac_ocp_write( tp, 0xFA96, 0xDE20 );
-        rtl8168_mac_ocp_write( tp, 0xFA98, 0xE410 );
-        rtl8168_mac_ocp_write( tp, 0xFA9A, 0x49E0 );
-        rtl8168_mac_ocp_write( tp, 0xFA9C, 0xF017 );
-        rtl8168_mac_ocp_write( tp, 0xFA9E, 0x1D01 );
-        rtl8168_mac_ocp_write( tp, 0xFAA0, 0x8DF4 );
-        rtl8168_mac_ocp_write( tp, 0xFAA2, 0xC5FA );
-        rtl8168_mac_ocp_write( tp, 0xFAA4, 0x1C00 );
-        rtl8168_mac_ocp_write( tp, 0xFAA6, 0x8CA0 );
-        rtl8168_mac_ocp_write( tp, 0xFAA8, 0x1C1B );
-        rtl8168_mac_ocp_write( tp, 0xFAAA, 0x9CA2 );
-        rtl8168_mac_ocp_write( tp, 0xFAAC, 0x74A2 );
-        rtl8168_mac_ocp_write( tp, 0xFAAE, 0x49CF );
-        rtl8168_mac_ocp_write( tp, 0xFAB0, 0xF0FE );
-        rtl8168_mac_ocp_write( tp, 0xFAB2, 0xC5F3 );
-        rtl8168_mac_ocp_write( tp, 0xFAB4, 0x74A0 );
-        rtl8168_mac_ocp_write( tp, 0xFAB6, 0x4849 );
-        rtl8168_mac_ocp_write( tp, 0xFAB8, 0x9CA0 );
-        rtl8168_mac_ocp_write( tp, 0xFABA, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xFABC, 0x49C0 );
-        rtl8168_mac_ocp_write( tp, 0xFABE, 0xF006 );
-        rtl8168_mac_ocp_write( tp, 0xFAC0, 0x48C3 );
-        rtl8168_mac_ocp_write( tp, 0xFAC2, 0x8CF8 );
-        rtl8168_mac_ocp_write( tp, 0xFAC4, 0xE820 );
-        rtl8168_mac_ocp_write( tp, 0xFAC6, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xFAC8, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xFACA, 0xC432 );
-        rtl8168_mac_ocp_write( tp, 0xFACC, 0xBC00 );
-        rtl8168_mac_ocp_write( tp, 0xFACE, 0xC5E4 );
-        rtl8168_mac_ocp_write( tp, 0xFAD0, 0x74A2 );
-        rtl8168_mac_ocp_write( tp, 0xFAD2, 0x49CE );
-        rtl8168_mac_ocp_write( tp, 0xFAD4, 0xF1FE );
-        rtl8168_mac_ocp_write( tp, 0xFAD6, 0x9EA0 );
-        rtl8168_mac_ocp_write( tp, 0xFAD8, 0x1C1C );
-        rtl8168_mac_ocp_write( tp, 0xFADA, 0x484F );
-        rtl8168_mac_ocp_write( tp, 0xFADC, 0x9CA2 );
-        rtl8168_mac_ocp_write( tp, 0xFADE, 0xFF80 );
-        rtl8168_mac_ocp_write( tp, 0xFAE0, 0xB404 );
-        rtl8168_mac_ocp_write( tp, 0xFAE2, 0xB405 );
-        rtl8168_mac_ocp_write( tp, 0xFAE4, 0xC5D9 );
-        rtl8168_mac_ocp_write( tp, 0xFAE6, 0x74A2 );
-        rtl8168_mac_ocp_write( tp, 0xFAE8, 0x49CE );
-        rtl8168_mac_ocp_write( tp, 0xFAEA, 0xF1FE );
-        rtl8168_mac_ocp_write( tp, 0xFAEC, 0xC41F );
-        rtl8168_mac_ocp_write( tp, 0xFAEE, 0x9CA0 );
-        rtl8168_mac_ocp_write( tp, 0xFAF0, 0xC41C );
-        rtl8168_mac_ocp_write( tp, 0xFAF2, 0x1C13 );
-        rtl8168_mac_ocp_write( tp, 0xFAF4, 0x484F );
-        rtl8168_mac_ocp_write( tp, 0xFAF6, 0x9CA2 );
-        rtl8168_mac_ocp_write( tp, 0xFAF8, 0x74A2 );
-        rtl8168_mac_ocp_write( tp, 0xFAFA, 0x49CF );
-        rtl8168_mac_ocp_write( tp, 0xFAFC, 0xF1FE );
-        rtl8168_mac_ocp_write( tp, 0xFAFE, 0xB005 );
-        rtl8168_mac_ocp_write( tp, 0xFB00, 0xB004 );
-        rtl8168_mac_ocp_write( tp, 0xFB02, 0xFF80 );
-        rtl8168_mac_ocp_write( tp, 0xFB04, 0xB404 );
-        rtl8168_mac_ocp_write( tp, 0xFB06, 0xB405 );
-        rtl8168_mac_ocp_write( tp, 0xFB08, 0xC5C7 );
-        rtl8168_mac_ocp_write( tp, 0xFB0A, 0x74A2 );
-        rtl8168_mac_ocp_write( tp, 0xFB0C, 0x49CE );
-        rtl8168_mac_ocp_write( tp, 0xFB0E, 0xF1FE );
-        rtl8168_mac_ocp_write( tp, 0xFB10, 0xC40E );
-        rtl8168_mac_ocp_write( tp, 0xFB12, 0x9CA0 );
-        rtl8168_mac_ocp_write( tp, 0xFB14, 0xC40A );
-        rtl8168_mac_ocp_write( tp, 0xFB16, 0x1C13 );
-        rtl8168_mac_ocp_write( tp, 0xFB18, 0x484F );
-        rtl8168_mac_ocp_write( tp, 0xFB1A, 0x9CA2 );
-        rtl8168_mac_ocp_write( tp, 0xFB1C, 0x74A2 );
-        rtl8168_mac_ocp_write( tp, 0xFB1E, 0x49CF );
-        rtl8168_mac_ocp_write( tp, 0xFB20, 0xF1FE );
-        rtl8168_mac_ocp_write( tp, 0xFB22, 0xB005 );
-        rtl8168_mac_ocp_write( tp, 0xFB24, 0xB004 );
-        rtl8168_mac_ocp_write( tp, 0xFB26, 0xFF80 );
-        rtl8168_mac_ocp_write( tp, 0xFB28, 0x0000 );
-        rtl8168_mac_ocp_write( tp, 0xFB2A, 0x0481 );
-        rtl8168_mac_ocp_write( tp, 0xFB2C, 0x0C81 );
-        rtl8168_mac_ocp_write( tp, 0xFB2E, 0x0AE0 );
-
-
-        rtl8168_mac_ocp_write( tp, 0xFC26, 0x8000 );
-
-        rtl8168_mac_ocp_write( tp, 0xFC28, 0x0000 );
-        rtl8168_mac_ocp_write( tp, 0xFC2A, 0x0000 );
-        rtl8168_mac_ocp_write( tp, 0xFC2C, 0x0297 );
-        rtl8168_mac_ocp_write( tp, 0xFC2E, 0x0000 );
-        rtl8168_mac_ocp_write( tp, 0xFC30, 0x00A9 );
-        rtl8168_mac_ocp_write( tp, 0xFC32, 0x012D );
-        rtl8168_mac_ocp_write( tp, 0xFC34, 0x0000 );
-        rtl8168_mac_ocp_write( tp, 0xFC36, 0x08DF );
-}
-
-static void
-rtl8168_set_mac_mcu_8411b_1(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        rtl8168_hw_disable_mac_mcu_bps(dev);
-
-        rtl8168_mac_ocp_write( tp, 0xF800, 0xE008 );
-        rtl8168_mac_ocp_write( tp, 0xF802, 0xE00A );
-        rtl8168_mac_ocp_write( tp, 0xF804, 0xE00C );
-        rtl8168_mac_ocp_write( tp, 0xF806, 0xE00E );
-        rtl8168_mac_ocp_write( tp, 0xF808, 0xE027 );
-        rtl8168_mac_ocp_write( tp, 0xF80A, 0xE04F );
-        rtl8168_mac_ocp_write( tp, 0xF80C, 0xE05E );
-        rtl8168_mac_ocp_write( tp, 0xF80E, 0xE065 );
-        rtl8168_mac_ocp_write( tp, 0xF810, 0xC602 );
-        rtl8168_mac_ocp_write( tp, 0xF812, 0xBE00 );
-        rtl8168_mac_ocp_write( tp, 0xF814, 0x0000 );
-        rtl8168_mac_ocp_write( tp, 0xF816, 0xC502 );
-        rtl8168_mac_ocp_write( tp, 0xF818, 0xBD00 );
-        rtl8168_mac_ocp_write( tp, 0xF81A, 0x074C );
-        rtl8168_mac_ocp_write( tp, 0xF81C, 0xC302 );
-        rtl8168_mac_ocp_write( tp, 0xF81E, 0xBB00 );
-        rtl8168_mac_ocp_write( tp, 0xF820, 0x080A );
-        rtl8168_mac_ocp_write( tp, 0xF822, 0x6420 );
-        rtl8168_mac_ocp_write( tp, 0xF824, 0x48C2 );
-        rtl8168_mac_ocp_write( tp, 0xF826, 0x8C20 );
-        rtl8168_mac_ocp_write( tp, 0xF828, 0xC516 );
-        rtl8168_mac_ocp_write( tp, 0xF82A, 0x64A4 );
-        rtl8168_mac_ocp_write( tp, 0xF82C, 0x49C0 );
-        rtl8168_mac_ocp_write( tp, 0xF82E, 0xF009 );
-        rtl8168_mac_ocp_write( tp, 0xF830, 0x74A2 );
-        rtl8168_mac_ocp_write( tp, 0xF832, 0x8CA5 );
-        rtl8168_mac_ocp_write( tp, 0xF834, 0x74A0 );
-        rtl8168_mac_ocp_write( tp, 0xF836, 0xC50E );
-        rtl8168_mac_ocp_write( tp, 0xF838, 0x9CA2 );
-        rtl8168_mac_ocp_write( tp, 0xF83A, 0x1C11 );
-        rtl8168_mac_ocp_write( tp, 0xF83C, 0x9CA0 );
-        rtl8168_mac_ocp_write( tp, 0xF83E, 0xE006 );
-        rtl8168_mac_ocp_write( tp, 0xF840, 0x74F8 );
-        rtl8168_mac_ocp_write( tp, 0xF842, 0x48C4 );
-        rtl8168_mac_ocp_write( tp, 0xF844, 0x8CF8 );
-        rtl8168_mac_ocp_write( tp, 0xF846, 0xC404 );
-        rtl8168_mac_ocp_write( tp, 0xF848, 0xBC00 );
-        rtl8168_mac_ocp_write( tp, 0xF84A, 0xC403 );
-        rtl8168_mac_ocp_write( tp, 0xF84C, 0xBC00 );
-        rtl8168_mac_ocp_write( tp, 0xF84E, 0x0BF2 );
-        rtl8168_mac_ocp_write( tp, 0xF850, 0x0C0A );
-        rtl8168_mac_ocp_write( tp, 0xF852, 0xE434 );
-        rtl8168_mac_ocp_write( tp, 0xF854, 0xD3C0 );
-        rtl8168_mac_ocp_write( tp, 0xF856, 0x49D9 );
-        rtl8168_mac_ocp_write( tp, 0xF858, 0xF01F );
-        rtl8168_mac_ocp_write( tp, 0xF85A, 0xC526 );
-        rtl8168_mac_ocp_write( tp, 0xF85C, 0x64A5 );
-        rtl8168_mac_ocp_write( tp, 0xF85E, 0x1400 );
-        rtl8168_mac_ocp_write( tp, 0xF860, 0xF007 );
-        rtl8168_mac_ocp_write( tp, 0xF862, 0x0C01 );
-        rtl8168_mac_ocp_write( tp, 0xF864, 0x8CA5 );
-        rtl8168_mac_ocp_write( tp, 0xF866, 0x1C15 );
-        rtl8168_mac_ocp_write( tp, 0xF868, 0xC51B );
-        rtl8168_mac_ocp_write( tp, 0xF86A, 0x9CA0 );
-        rtl8168_mac_ocp_write( tp, 0xF86C, 0xE013 );
-        rtl8168_mac_ocp_write( tp, 0xF86E, 0xC519 );
-        rtl8168_mac_ocp_write( tp, 0xF870, 0x74A0 );
-        rtl8168_mac_ocp_write( tp, 0xF872, 0x48C4 );
-        rtl8168_mac_ocp_write( tp, 0xF874, 0x8CA0 );
-        rtl8168_mac_ocp_write( tp, 0xF876, 0xC516 );
-        rtl8168_mac_ocp_write( tp, 0xF878, 0x74A4 );
-        rtl8168_mac_ocp_write( tp, 0xF87A, 0x48C8 );
-        rtl8168_mac_ocp_write( tp, 0xF87C, 0x48CA );
-        rtl8168_mac_ocp_write( tp, 0xF87E, 0x9CA4 );
-        rtl8168_mac_ocp_write( tp, 0xF880, 0xC512 );
-        rtl8168_mac_ocp_write( tp, 0xF882, 0x1B00 );
-        rtl8168_mac_ocp_write( tp, 0xF884, 0x9BA0 );
-        rtl8168_mac_ocp_write( tp, 0xF886, 0x1B1C );
-        rtl8168_mac_ocp_write( tp, 0xF888, 0x483F );
-        rtl8168_mac_ocp_write( tp, 0xF88A, 0x9BA2 );
-        rtl8168_mac_ocp_write( tp, 0xF88C, 0x1B04 );
-        rtl8168_mac_ocp_write( tp, 0xF88E, 0xC508 );
-        rtl8168_mac_ocp_write( tp, 0xF890, 0x9BA0 );
-        rtl8168_mac_ocp_write( tp, 0xF892, 0xC505 );
-        rtl8168_mac_ocp_write( tp, 0xF894, 0xBD00 );
-        rtl8168_mac_ocp_write( tp, 0xF896, 0xC502 );
-        rtl8168_mac_ocp_write( tp, 0xF898, 0xBD00 );
-        rtl8168_mac_ocp_write( tp, 0xF89A, 0x0300 );
-        rtl8168_mac_ocp_write( tp, 0xF89C, 0x051E );
-        rtl8168_mac_ocp_write( tp, 0xF89E, 0xE434 );
-        rtl8168_mac_ocp_write( tp, 0xF8A0, 0xE018 );
-        rtl8168_mac_ocp_write( tp, 0xF8A2, 0xE092 );
-        rtl8168_mac_ocp_write( tp, 0xF8A4, 0xDE20 );
-        rtl8168_mac_ocp_write( tp, 0xF8A6, 0xD3C0 );
-        rtl8168_mac_ocp_write( tp, 0xF8A8, 0xC50F );
-        rtl8168_mac_ocp_write( tp, 0xF8AA, 0x76A4 );
-        rtl8168_mac_ocp_write( tp, 0xF8AC, 0x49E3 );
-        rtl8168_mac_ocp_write( tp, 0xF8AE, 0xF007 );
-        rtl8168_mac_ocp_write( tp, 0xF8B0, 0x49C0 );
-        rtl8168_mac_ocp_write( tp, 0xF8B2, 0xF103 );
-        rtl8168_mac_ocp_write( tp, 0xF8B4, 0xC607 );
-        rtl8168_mac_ocp_write( tp, 0xF8B6, 0xBE00 );
-        rtl8168_mac_ocp_write( tp, 0xF8B8, 0xC606 );
-        rtl8168_mac_ocp_write( tp, 0xF8BA, 0xBE00 );
-        rtl8168_mac_ocp_write( tp, 0xF8BC, 0xC602 );
-        rtl8168_mac_ocp_write( tp, 0xF8BE, 0xBE00 );
-        rtl8168_mac_ocp_write( tp, 0xF8C0, 0x0C4C );
-        rtl8168_mac_ocp_write( tp, 0xF8C2, 0x0C28 );
-        rtl8168_mac_ocp_write( tp, 0xF8C4, 0x0C2C );
-        rtl8168_mac_ocp_write( tp, 0xF8C6, 0xDC00 );
-        rtl8168_mac_ocp_write( tp, 0xF8C8, 0xC707 );
-        rtl8168_mac_ocp_write( tp, 0xF8CA, 0x1D00 );
-        rtl8168_mac_ocp_write( tp, 0xF8CC, 0x8DE2 );
-        rtl8168_mac_ocp_write( tp, 0xF8CE, 0x48C1 );
-        rtl8168_mac_ocp_write( tp, 0xF8D0, 0xC502 );
-        rtl8168_mac_ocp_write( tp, 0xF8D2, 0xBD00 );
-        rtl8168_mac_ocp_write( tp, 0xF8D4, 0x00AA );
-        rtl8168_mac_ocp_write( tp, 0xF8D6, 0xE0C0 );
-        rtl8168_mac_ocp_write( tp, 0xF8D8, 0xC502 );
-        rtl8168_mac_ocp_write( tp, 0xF8DA, 0xBD00 );
-        rtl8168_mac_ocp_write( tp, 0xF8DC, 0x0132 );
-
-        rtl8168_mac_ocp_write( tp, 0xFC26, 0x8000 );
-
-        rtl8168_mac_ocp_write( tp, 0xFC2A, 0x0743 );
-        rtl8168_mac_ocp_write( tp, 0xFC2C, 0x0801 );
-        rtl8168_mac_ocp_write( tp, 0xFC2E, 0x0BE9 );
-        rtl8168_mac_ocp_write( tp, 0xFC30, 0x02FD );
-        rtl8168_mac_ocp_write( tp, 0xFC32, 0x0C25 );
-        rtl8168_mac_ocp_write( tp, 0xFC34, 0x00A9 );
-        rtl8168_mac_ocp_write( tp, 0xFC36, 0x012D );
-}
-
-static void
-rtl8168_set_mac_mcu_8168ep_1(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u16 i;
-        static const u16 mcu_patch_code_8168ep_1[] = {
-                0xE008, 0xE0D3, 0xE0D6, 0xE0D9, 0xE0DB, 0xE0DD, 0xE0DF, 0xE0E1, 0xC251,
-                0x7340, 0x49B1, 0xF010, 0x1D02, 0x8D40, 0xC202, 0xBA00, 0x2C3A, 0xC0F0,
-                0xE8DE, 0x2000, 0x8000, 0xC0B6, 0x268C, 0x752C, 0x49D4, 0xF112, 0xE025,
-                0xC2F6, 0x7146, 0xC2F5, 0x7340, 0x49BE, 0xF103, 0xC7F2, 0xE002, 0xC7F1,
-                0x304F, 0x6226, 0x49A1, 0xF1F0, 0x7222, 0x49A0, 0xF1ED, 0x2525, 0x1F28,
-                0x3097, 0x3091, 0x9A36, 0x752C, 0x21DC, 0x25BC, 0xC6E2, 0x77C0, 0x1304,
-                0xF014, 0x1303, 0xF014, 0x1302, 0xF014, 0x1301, 0xF014, 0x49D4, 0xF103,
-                0xC3D7, 0xBB00, 0xC618, 0x67C6, 0x752E, 0x22D7, 0x26DD, 0x1505, 0xF013,
-                0xC60A, 0xBE00, 0xC309, 0xBB00, 0xC308, 0xBB00, 0xC307, 0xBB00, 0xC306,
-                0xBB00, 0x25C8, 0x25A6, 0x25AC, 0x25B2, 0x25B8, 0xCD08, 0x0000, 0xC0BC,
-                0xC2FF, 0x7340, 0x49B0, 0xF04E, 0x1F46, 0x308F, 0xC3F7, 0x1C04, 0xE84D,
-                0x1401, 0xF147, 0x7226, 0x49A7, 0xF044, 0x7222, 0x2525, 0x1F30, 0x3097,
-                0x3091, 0x7340, 0xC4EA, 0x401C, 0xF006, 0xC6E8, 0x75C0, 0x49D7, 0xF105,
-                0xE036, 0x1D08, 0x8DC1, 0x0208, 0x6640, 0x2764, 0x1606, 0xF12F, 0x6346,
-                0x133B, 0xF12C, 0x9B34, 0x1B18, 0x3093, 0xC32A, 0x1C10, 0xE82A, 0x1401,
-                0xF124, 0x1A36, 0x308A, 0x7322, 0x25B5, 0x0B0E, 0x1C00, 0xE82C, 0xC71F,
-                0x4027, 0xF11A, 0xE838, 0x1F42, 0x308F, 0x1B08, 0xE824, 0x7236, 0x7746,
-                0x1700, 0xF00D, 0xC313, 0x401F, 0xF103, 0x1F00, 0x9F46, 0x7744, 0x449F,
-                0x445F, 0xE817, 0xC70A, 0x4027, 0xF105, 0xC302, 0xBB00, 0x2E08, 0x2DC2,
-                0xC7FF, 0xBF00, 0xCDB8, 0xFFFF, 0x0C02, 0xA554, 0xA5DC, 0x402F, 0xF105,
-                0x1400, 0xF1FA, 0x1C01, 0xE002, 0x1C00, 0xFF80, 0x49B0, 0xF004, 0x0B01,
-                0xA1D3, 0xE003, 0x0B02, 0xA5D3, 0x3127, 0x3720, 0x0B02, 0xA5D3, 0x3127,
-                0x3720, 0x1300, 0xF1FB, 0xFF80, 0x7322, 0x25B5, 0x1E28, 0x30DE, 0x30D9,
-                0x7264, 0x1E11, 0x2368, 0x3116, 0xFF80, 0x1B7E, 0xC602, 0xBE00, 0x06A6,
-                0x1B7E, 0xC602, 0xBE00, 0x0764, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
-                0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
-                0x0000
-        };
-
-        rtl8168_hw_disable_mac_mcu_bps(dev);
-
-        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168ep_1); i++) {
-                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168ep_1[i]);
-        }
-
-        rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
-
-        rtl8168_mac_ocp_write(tp, 0xFC28, 0x2549);
-        rtl8168_mac_ocp_write(tp, 0xFC2A, 0x06A5);
-        rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0763);
-}
-
-static bool
-rtl8168_check_dash_other_fun_present(struct rtl8168_private *tp)
-{
-        //check if func 2 exist
-        if (rtl8168_csi_other_fun_read(tp, 2, 0x00) != 0xffffffff)
-                return true;
-
-        return false;
-}
-
-static void
-rtl8168_set_mac_mcu_8168ep_2(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u16 i;
-        static const u16 mcu_patch_code_8168ep_2[] = {
-                0xE008, 0xE017, 0xE052, 0xE056, 0xE058, 0xE05A, 0xE05C, 0xE05E, 0xC50F,
-                0x76A4, 0x49E3, 0xF007, 0x49C0, 0xF103, 0xC607, 0xBE00, 0xC606, 0xBE00,
-                0xC602, 0xBE00, 0x0BDA, 0x0BB6, 0x0BBA, 0xDC00, 0xB400, 0xB401, 0xB402,
-                0xB403, 0xB404, 0xC02E, 0x7206, 0x49AE, 0xF1FE, 0xC12B, 0x9904, 0xC12A,
-                0x9906, 0x7206, 0x49AE, 0xF1FE, 0x7200, 0x49A0, 0xF117, 0xC123, 0xC223,
-                0xC323, 0xE808, 0xC322, 0xE806, 0xC321, 0xE804, 0xC320, 0xE802, 0xE00C,
-                0x740E, 0x49CE, 0xF1FE, 0x9908, 0x990A, 0x9A0C, 0x9B0E, 0x740E, 0x49CE,
-                0xF1FE, 0xFF80, 0xB004, 0xB003, 0xB002, 0xB001, 0xB000, 0xC604, 0xC002,
-                0xB800, 0x1FC8, 0xE000, 0xE8E0, 0xF128, 0x0002, 0xFFFF, 0xF000, 0x8001,
-                0x8002, 0x8003, 0x8004, 0x48C1, 0x48C2, 0xC502, 0xBD00, 0x0490, 0xC602,
-                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
-                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
-        };
-
-        rtl8168_hw_disable_mac_mcu_bps(dev);
-
-        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168ep_2); i++) {
-                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168ep_2[i]);
-        }
-
-        rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
-
-        rtl8168_mac_ocp_write(tp, 0xFC28, 0x0BB3);
-        if (false == rtl8168_check_dash_other_fun_present(tp))
-                rtl8168_mac_ocp_write(tp, 0xFC2A, 0x1FC7);
-        //rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0485);
-}
-
-static void
-rtl8168_set_mac_mcu_8168h_1(struct net_device *dev)
-{
-        rtl8168_hw_disable_mac_mcu_bps(dev);
-}
-
-static void
-rtl8168_set_mac_mcu_8168h_2(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u16 i;
-        static const u16 mcu_patch_code_8168h_1[] = {
-                0xE008, 0xE00F, 0xE011, 0xE047, 0xE049, 0xE073, 0xE075, 0xE07A, 0xC707,
-                0x1D00, 0x8DE2, 0x48C1, 0xC502, 0xBD00, 0x00E4, 0xE0C0, 0xC502, 0xBD00,
-                0x0216, 0xC634, 0x75C0, 0x49D3, 0xF027, 0xC631, 0x75C0, 0x49D3, 0xF123,
-                0xC627, 0x75C0, 0xB405, 0xC525, 0x9DC0, 0xC621, 0x75C8, 0x49D5, 0xF00A,
-                0x49D6, 0xF008, 0x49D7, 0xF006, 0x49D8, 0xF004, 0x75D2, 0x49D9, 0xF111,
-                0xC517, 0x9DC8, 0xC516, 0x9DD2, 0xC618, 0x75C0, 0x49D4, 0xF003, 0x49D0,
-                0xF104, 0xC60A, 0xC50E, 0x9DC0, 0xB005, 0xC607, 0x9DC0, 0xB007, 0xC602,
-                0xBE00, 0x1A06, 0xB400, 0xE86C, 0xA000, 0x01E1, 0x0200, 0x9200, 0xE84C,
-                0xE004, 0xE908, 0xC502, 0xBD00, 0x0B58, 0xB407, 0xB404, 0x2195, 0x25BD,
-                0x9BE0, 0x1C1C, 0x484F, 0x9CE2, 0x72E2, 0x49AE, 0xF1FE, 0x0B00, 0xF116,
-                0xC71C, 0xC419, 0x9CE0, 0x1C13, 0x484F, 0x9CE2, 0x74E2, 0x49CE, 0xF1FE,
-                0xC412, 0x9CE0, 0x1C13, 0x484F, 0x9CE2, 0x74E2, 0x49CE, 0xF1FE, 0xC70C,
-                0x74F8, 0x48C3, 0x8CF8, 0xB004, 0xB007, 0xC502, 0xBD00, 0x0F24, 0x0481,
-                0x0C81, 0xDE24, 0xE000, 0xC602, 0xBE00, 0x0CA4, 0x48C1, 0x48C2, 0x9C46,
-                0xC402, 0xBC00, 0x0578, 0xC602, 0xBE00, 0x0000
-        };
-
-        rtl8168_hw_disable_mac_mcu_bps(dev);
-
-        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168h_1); i++) {
-                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168h_1[i]);
-        }
-
-        rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
-
-        rtl8168_mac_ocp_write(tp, 0xFC28, 0x00E2);
-        rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0210);
-        rtl8168_mac_ocp_write(tp, 0xFC2C, 0x1A04);
-        rtl8168_mac_ocp_write(tp, 0xFC2E, 0x0B26);
-        rtl8168_mac_ocp_write(tp, 0xFC30, 0x0F02);
-        rtl8168_mac_ocp_write(tp, 0xFC32, 0x0CA0);
-        //rtl8168_mac_ocp_write(tp, 0xFC34, 0x056C);
-
-        rtl8168_mac_ocp_write(tp, 0xFC38, 0x003F);
-}
-
-static void
-rtl8168_set_mac_mcu_8168h_3(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u16 i;
-        static const u16 mcu_patch_code_8168h_3[] = {
-                0xE008, 0xE00A, 0xE00C, 0xE00E, 0xE010, 0xE03E, 0xE040, 0xE069, 0xC602,
-                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC002, 0xB800, 0x0000, 0xC602,
-                0xBE00, 0x0000, 0xC72B, 0x76E2, 0x49EE, 0xF1FD, 0x1E00, 0x9EE0, 0x1E1C,
-                0x9EE2, 0x76E2, 0x49EE, 0xF1FE, 0xC621, 0x9EE0, 0x1E1D, 0x486F, 0x9EE2,
-                0x76E2, 0x49EE, 0xF1FE, 0xC71A, 0x76E0, 0x48E8, 0x48E9, 0x48EA, 0x48EB,
-                0x48EC, 0x9EE0, 0xC70D, 0xC60D, 0x9EF4, 0xC60C, 0x9EF6, 0xC70E, 0x76E0,
-                0x4863, 0x9EE0, 0xB007, 0xC602, 0xBE00, 0x0ACC, 0xE000, 0x03BF, 0x07FF,
-                0xDE24, 0x3200, 0xE096, 0xD438, 0xC602, 0xBE00, 0x0000, 0x8EE6, 0xC726,
-                0x76E2, 0x49EE, 0xF1FD, 0x1E00, 0x8EE0, 0x1E1C, 0x8EE2, 0x76E2, 0x49EE,
-                0xF1FE, 0xC61C, 0x8EE0, 0x1E1D, 0x486F, 0x8EE2, 0x76E2, 0x49EE, 0xF1FE,
-                0xC715, 0x76E0, 0x48E8, 0x48E9, 0x48EA, 0x48EB, 0x48EC, 0x9EE0, 0xC708,
-                0xC608, 0x9EF4, 0xC607, 0x9EF6, 0xC602, 0xBE00, 0x0ABE, 0xE000, 0x03BF,
-                0x07FF, 0xDE24, 0x3200, 0xE096, 0xC602, 0xBE00, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-                0x0000, 0x0000, 0x0000, 0x0000, 0x6838, 0x0A17, 0x0613, 0x0D26
-        };
-
-        rtl8168_hw_disable_mac_mcu_bps(dev);
-
-        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168h_3); i++) {
-                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168h_3[i]);
-        }
-
-        rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
-
-        rtl8168_mac_ocp_write(tp, 0xFC30, 0x0ACA);
-
-        rtl8168_clear_mcu_ocp_bit(tp, 0xD438, BIT_3);
-
-        rtl8168_mac_ocp_write(tp, 0xFC38, 0x0010);
-}
-
-static void
-rtl8168_set_mac_mcu_8168h_4(struct net_device *dev)
-{
-        rtl8168_hw_disable_mac_mcu_bps(dev);
-}
-
-static void
-rtl8168_set_mac_mcu_8168fp_1(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u16 i;
-        u16 breakPointEnabled = 0;
-
-        rtl8168_hw_disable_mac_mcu_bps(dev);
-
-        if(tp->HwPkgDet == 0x00 || tp->HwPkgDet == 0x0F) {
-                static const u16 mcu_patch_code_8168fp_1_1[] = {
-                        0xE00A, 0xE0C1, 0xE104, 0xE108, 0xE10D, 0xE112, 0xE11C, 0xE121, 0xE000,
-                        0xE0C8, 0xB400, 0xC1FE, 0x49E2, 0xF04C, 0x49EA, 0xF04A, 0x74E6, 0xC246,
-                        0x7542, 0x73EC, 0x1800, 0x49C0, 0xF10D, 0x49C1, 0xF10B, 0x49C2, 0xF109,
-                        0x49B0, 0xF107, 0x49B1, 0xF105, 0x7220, 0x49A2, 0xF102, 0xE002, 0x4800,
-                        0x49D0, 0xF10A, 0x49D1, 0xF108, 0x49D2, 0xF106, 0x49D3, 0xF104, 0x49DF,
-                        0xF102, 0xE00C, 0x4801, 0x72E4, 0x49AD, 0xF108, 0xC225, 0x6741, 0x48F0,
-                        0x8F41, 0x4870, 0x8F41, 0xC7CF, 0x49B5, 0xF01F, 0x49B2, 0xF00B, 0x4980,
-                        0xF003, 0x484E, 0x94E7, 0x4981, 0xF004, 0x485E, 0xC212, 0x9543, 0xE071,
-                        0x49B6, 0xF003, 0x49B3, 0xF10F, 0x4980, 0xF003, 0x484E, 0x94E7, 0x4981,
-                        0xF004, 0x485E, 0xC204, 0x9543, 0xE005, 0xE000, 0xE0FC, 0xE0FA, 0xE065,
-                        0x49B7, 0xF007, 0x4980, 0xF005, 0x1A38, 0x46D4, 0x1200, 0xF109, 0x4981,
-                        0xF055, 0x49C3, 0xF105, 0x1A30, 0x46D5, 0x1200, 0xF04F, 0x7220, 0x49A2,
-                        0xF130, 0x49C1, 0xF12E, 0x49B0, 0xF12C, 0xC2E6, 0x7240, 0x49A8, 0xF003,
-                        0x49D0, 0xF126, 0x49A9, 0xF003, 0x49D1, 0xF122, 0x49AA, 0xF003, 0x49D2,
-                        0xF11E, 0x49AB, 0xF003, 0x49DF, 0xF11A, 0x49AC, 0xF003, 0x49D3, 0xF116,
-                        0x4980, 0xF003, 0x49C7, 0xF105, 0x4981, 0xF02C, 0x49D7, 0xF02A, 0x49C0,
-                        0xF00C, 0xC721, 0x62F4, 0x49A0, 0xF008, 0x49A4, 0xF106, 0x4824, 0x8AF4,
-                        0xC71A, 0x1A40, 0x9AE0, 0x49B6, 0xF017, 0x200E, 0xC7B8, 0x72E0, 0x4710,
-                        0x92E1, 0xC70E, 0x77E0, 0x49F0, 0xF112, 0xC70B, 0x77E0, 0x27FE, 0x1AFA,
-                        0x4317, 0xC705, 0x9AE2, 0x1A11, 0x8AE0, 0xE008, 0xE41C, 0xC0AE, 0xD23A,
-                        0xC7A2, 0x74E6, 0x484F, 0x94E7, 0xC79E, 0x8CE6, 0x8BEC, 0xC29C, 0x8D42,
-                        0x7220, 0xB000, 0xC502, 0xBD00, 0x0932, 0xB400, 0xC240, 0xC340, 0x7060,
-                        0x498F, 0xF014, 0x488F, 0x9061, 0x744C, 0x49C3, 0xF004, 0x7562, 0x485E,
-                        0x9563, 0x7446, 0x49C3, 0xF106, 0x7562, 0x1C30, 0x46E5, 0x1200, 0xF004,
-                        0x7446, 0x484F, 0x9447, 0xC32A, 0x7466, 0x49C0, 0xF00F, 0x48C0, 0x9C66,
-                        0x7446, 0x4840, 0x4841, 0x4842, 0x9C46, 0x744C, 0x4840, 0x9C4C, 0x744A,
-                        0x484A, 0x9C4A, 0xE013, 0x498E, 0xF011, 0x488E, 0x9061, 0x744C, 0x49C3,
-                        0xF004, 0x7446, 0x484E, 0x9447, 0x7446, 0x1D38, 0x46EC, 0x1500, 0xF004,
-                        0x7446, 0x484F, 0x9447, 0xB000, 0xC502, 0xBD00, 0x074C, 0xE000, 0xE0FC,
-                        0xE0C0, 0x4830, 0x4837, 0xC502, 0xBD00, 0x0978, 0x63E2, 0x4830, 0x4837,
-                        0xC502, 0xBD00, 0x09FE, 0x73E2, 0x4830, 0x8BE2, 0xC302, 0xBB00, 0x0A12,
-                        0x73E2, 0x48B0, 0x48B3, 0x48B4, 0x48B5, 0x48B6, 0x48B7, 0x8BE2, 0xC302,
-                        0xBB00, 0x0A5A, 0x73E2, 0x4830, 0x8BE2, 0xC302, 0xBB00, 0x0A6C, 0x73E2,
-                        0x4830, 0x4837, 0xC502, 0xBD00, 0x0A86
-                };
-
-                for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_1_1); i++) {
-                        rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168fp_1_1[i]);
-                }
-
-                rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
-
-                rtl8168_mac_ocp_write(tp, 0xFC28, 0x0890);
-                rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0712);
-                rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0974);
-                rtl8168_mac_ocp_write(tp, 0xFC2E, 0x09FC);
-                rtl8168_mac_ocp_write(tp, 0xFC30, 0x0A0E);
-                rtl8168_mac_ocp_write(tp, 0xFC32, 0x0A56);
-                rtl8168_mac_ocp_write(tp, 0xFC34, 0x0A68);
-                rtl8168_mac_ocp_write(tp, 0xFC36, 0x0A84);
-
-        } else if (tp->HwPkgDet == 0x05 || tp->HwPkgDet == 0x06) {
-                static const u16 mcu_patch_code_8168fp_1_2[] = {
-                        0xE008, 0xE00A, 0xE031, 0xE033, 0xE035, 0xE144, 0xE166, 0xE168, 0xC502,
-                        0xBD00, 0x0000, 0xC725, 0x75E0, 0x48D0, 0x9DE0, 0xC722, 0x75E0, 0x1C78,
-                        0x416C, 0x1530, 0xF111, 0xC71D, 0x75F6, 0x49D1, 0xF00D, 0x75E0, 0x1C1F,
-                        0x416C, 0x1502, 0xF108, 0x75FA, 0x49D3, 0xF005, 0x75EC, 0x9DE4, 0x4853,
-                        0x9DFA, 0xC70B, 0x75E0, 0x4852, 0x4850, 0x9DE0, 0xC602, 0xBE00, 0x04B8,
-                        0xE420, 0xE000, 0xE0FC, 0xE43C, 0xDC00, 0xEB00, 0xC202, 0xBA00, 0x0000,
-                        0xC002, 0xB800, 0x0000, 0xB401, 0xB402, 0xB403, 0xB404, 0xB405, 0xB406,
-                        0xC44D, 0xC54D, 0x1867, 0xE8A2, 0x2318, 0x276E, 0x1601, 0xF106, 0x1A07,
-                        0xE861, 0xE86B, 0xE873, 0xE037, 0x231E, 0x276E, 0x1602, 0xF10B, 0x1A07,
-                        0xE858, 0xE862, 0xC247, 0xC344, 0xE8E3, 0xC73B, 0x66E0, 0xE8B5, 0xE029,
-                        0x231A, 0x276C, 0xC733, 0x9EE0, 0x1866, 0xE885, 0x251C, 0x120F, 0xF011,
-                        0x1209, 0xF011, 0x2014, 0x240E, 0x1000, 0xF007, 0x120C, 0xF00D, 0x1203,
-                        0xF00D, 0x1200, 0xF00D, 0x120C, 0xF00D, 0x1203, 0xF00D, 0x1A03, 0xE00C,
-                        0x1A07, 0xE00A, 0x1A00, 0xE008, 0x1A01, 0xE006, 0x1A02, 0xE004, 0x1A04,
-                        0xE002, 0x1A05, 0xE829, 0xE833, 0xB006, 0xB005, 0xB004, 0xB003, 0xB002,
-                        0xB001, 0x60C4, 0xC702, 0xBF00, 0x2786, 0xDD00, 0xD030, 0xE0C4, 0xE0F8,
-                        0xDC42, 0xD3F0, 0x0000, 0x0004, 0x0007, 0x0014, 0x0090, 0x1000, 0x0F00,
-                        0x1004, 0x1008, 0x3000, 0x3004, 0x3008, 0x4000, 0x7777, 0x8000, 0x8001,
-                        0x8008, 0x8003, 0x8004, 0xC000, 0xC004, 0xF004, 0xFFFF, 0xB406, 0xB407,
-                        0xC6E5, 0x77C0, 0x27F3, 0x23F3, 0x47FA, 0x9FC0, 0xB007, 0xB006, 0xFF80,
-                        0xB405, 0xB407, 0xC7D8, 0x75E0, 0x48D0, 0x9DE0, 0xB007, 0xB005, 0xFF80,
-                        0xB401, 0xC0EA, 0xC2DC, 0xC3D8, 0xE865, 0xC0D3, 0xC1E0, 0xC2E3, 0xE861,
-                        0xE817, 0xC0CD, 0xC2CF, 0xE85D, 0xC0C9, 0xC1D6, 0xC2DB, 0xE859, 0xE80F,
-                        0xC1C7, 0xC2CE, 0xE855, 0xC0C0, 0xC1D1, 0xC2D3, 0xE851, 0xE807, 0xC0BE,
-                        0xC2C2, 0xE84D, 0xE803, 0xB001, 0xFF80, 0xB402, 0xC2C6, 0xE859, 0x499F,
-                        0xF1FE, 0xB002, 0xFF80, 0xB402, 0xB403, 0xB407, 0xE821, 0x8882, 0x1980,
-                        0x8983, 0xE81D, 0x7180, 0x218B, 0x25BB, 0x1310, 0xF014, 0x1310, 0xFB03,
-                        0x1F20, 0x38FB, 0x3288, 0x434B, 0x2491, 0x430B, 0x1F0F, 0x38FB, 0x4313,
-                        0x2121, 0x4353, 0x2521, 0x418A, 0x6282, 0x2527, 0x212F, 0x418A, 0xB007,
-                        0xB003, 0xB002, 0xFF80, 0x6183, 0x2496, 0x1100, 0xF1FD, 0xFF80, 0x4800,
-                        0x4801, 0xC213, 0xC313, 0xE815, 0x4860, 0x8EE0, 0xC210, 0xC310, 0xE822,
-                        0x481E, 0xC20C, 0xC30C, 0xE80C, 0xC206, 0x7358, 0x483A, 0x9B58, 0xFF80,
-                        0xE8E0, 0xE000, 0x1008, 0x0F00, 0x800C, 0x0F00, 0xB407, 0xB406, 0xB403,
-                        0xC7F7, 0x98E0, 0x99E2, 0x9AE4, 0x21B2, 0x4831, 0x483F, 0x9BE6, 0x66E7,
-                        0x49E6, 0xF1FE, 0xB003, 0xB006, 0xB007, 0xFF80, 0xB407, 0xB406, 0xB403,
-                        0xC7E5, 0x9AE4, 0x21B2, 0x4831, 0x9BE6, 0x66E7, 0x49E6, 0xF1FE, 0x70E0,
-                        0x71E2, 0xB003, 0xB006, 0xB007, 0xFF80, 0x4882, 0xB406, 0xB405, 0xC71E,
-                        0x76E0, 0x1D78, 0x4175, 0x1630, 0xF10C, 0xC715, 0x76E0, 0x4861, 0x9EE0,
-                        0xC713, 0x1EFF, 0x9EE2, 0x75E0, 0x4850, 0x9DE0, 0xE005, 0xC70B, 0x76E0,
-                        0x4865, 0x9EE0, 0xB005, 0xB006, 0xC708, 0xC102, 0xB900, 0x279E, 0xEB16,
-                        0xEB00, 0xE43C, 0xDC00, 0xD3EC, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00,
-                        0x0000
-                };
-
-                for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_1_2); i++) {
-                        rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168fp_1_2[i]);
-                }
-
-                rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
-
-                rtl8168_mac_ocp_write(tp, 0xFC28, 0x0000);
-                rtl8168_mac_ocp_write(tp, 0xFC2A, 0x04b4);
-                rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0000);
-                rtl8168_mac_ocp_write(tp, 0xFC2E, 0x0000);
-                rtl8168_mac_ocp_write(tp, 0xFC30, 0x0000);
-                rtl8168_mac_ocp_write(tp, 0xFC32, 0x279C);
-                rtl8168_mac_ocp_write(tp, 0xFC34, 0x0000);
-                rtl8168_mac_ocp_write(tp, 0xFC36, 0x0000);
-        }
-
-        if (tp->HwPkgDet == 0x00)
-                breakPointEnabled = 0x00FC;
-        else if (tp->HwPkgDet == 0x0F)
-                breakPointEnabled = 0x00FF;
-        else if (tp->HwPkgDet == 0x05 || tp->HwPkgDet == 0x06)
-                breakPointEnabled = 0x0022;
-
-        rtl8168_mac_ocp_write(tp, 0xFC38, breakPointEnabled);
-}
-
-static void
-rtl8168_set_mac_mcu_8168fp_8116as_2(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u16 i;
-        static const u16 mcu_patch_code_8168fp_8116as_2[] = {
-                0xE008, 0xE00A, 0xE00F, 0xE014, 0xE016, 0xE018, 0xE01A, 0xE01C, 0xC602,
-                0xBE00, 0x2AB2, 0x1BC0, 0x46EB, 0x1BFE, 0xC102, 0xB900, 0x0B1A, 0x1BC0,
-                0x46EB, 0x1B7E, 0xC102, 0xB900, 0x0BEA, 0xC602, 0xBE00, 0x0000, 0xC602,
-                0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602,
-                0xBE00, 0x0000
-        };
-
-        rtl8168_hw_disable_mac_mcu_bps(dev);
-
-        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_8116as_2); i++) {
-                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168fp_8116as_2[i]);
-        }
-
-        rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
-
-        rtl8168_mac_ocp_write(tp, 0xFC28, 0x2AAC);
-        rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0B14);
-        rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0BE4);
-
-        rtl8168_mac_ocp_write(tp, 0xFC38, 0x0007);
-}
-
-static void
-_rtl8168_set_mac_mcu_8168fp_2(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u16 i;
-        static const u16 mcu_patch_code_8168fp_2[] = {
-                0xE008, 0xE00A, 0xE00F, 0xE014, 0xE05F, 0xE064, 0xE066, 0xE068, 0xC602,
-                0xBE00, 0x0000, 0x1BC0, 0x46EB, 0x1BFE, 0xC102, 0xB900, 0x0B1A, 0x1BC0,
-                0x46EB, 0x1B7E, 0xC102, 0xB900, 0x0BEA, 0xB400, 0xB401, 0xB402, 0xB403,
-                0xB404, 0xB405, 0xC03A, 0x7206, 0x49AE, 0xF1FE, 0xC137, 0x9904, 0xC136,
-                0x9906, 0x7206, 0x49AE, 0xF1FE, 0x7200, 0x49A0, 0xF10B, 0xC52F, 0xC12E,
-                0xC232, 0xC332, 0xE812, 0xC331, 0xE810, 0xC330, 0xE80E, 0xE018, 0xC126,
-                0xC229, 0xC525, 0xC328, 0xE808, 0xC523, 0xC326, 0xE805, 0xC521, 0xC324,
-                0xE802, 0xE00C, 0x740E, 0x49CE, 0xF1FE, 0x9908, 0x9D0A, 0x9A0C, 0x9B0E,
-                0x740E, 0x49CE, 0xF1FE, 0xFF80, 0xB005, 0xB004, 0xB003, 0xB002, 0xB001,
-                0xB000, 0xC604, 0xC002, 0xB800, 0x2A5E, 0xE000, 0xE8E0, 0xF128, 0x3DC2,
-                0xFFFF, 0x10EC, 0x816A, 0x816D, 0x816C, 0xF000, 0x8002, 0x8004, 0x8007,
-                0x48C1, 0x48C2, 0x9C46, 0xC402, 0xBC00, 0x07BC, 0xC602, 0xBE00, 0x0000,
-                0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
-        };
-
-        rtl8168_hw_disable_mac_mcu_bps(dev);
-
-        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_2); i++) {
-                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168fp_2[i]);
-        }
-
-        rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
-
-        rtl8168_mac_ocp_write(tp, 0xFC28, 0x2AAC);
-        rtl8168_mac_ocp_write(tp, 0xFC2A, 0x0B14);
-        rtl8168_mac_ocp_write(tp, 0xFC2C, 0x0BE4);
-        rtl8168_mac_ocp_write(tp, 0xFC2E, 0x2A5C);
-        //rtl8168_mac_ocp_write(tp, 0xFC30, 0x07B0);
-
-        if (true == rtl8168_check_dash_other_fun_present(tp))
-                rtl8168_mac_ocp_write(tp, 0xFC38, 0x0006);
-        else
-                rtl8168_mac_ocp_write(tp, 0xFC38, 0x000E);
-}
-
-static void
-rtl8168_set_mac_mcu_8168fp_2(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        if (tp->HwSuppSerDesPhyVer == 1)
-                rtl8168_set_mac_mcu_8168fp_8116as_2(dev);
-        else
-                _rtl8168_set_mac_mcu_8168fp_2(dev);
-}
-
-static void
-rtl8168_set_mac_mcu_8168fp_3(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u16 i;
-        static const u16 mcu_patch_code_8168fp_3[] = {
-                0xE008, 0xE053, 0xE058, 0xE05A, 0xE05C, 0xE05E, 0xE060, 0xE062, 0xB400,
-                0xB401, 0xB402, 0xB403, 0xB404, 0xB405, 0xC03A, 0x7206, 0x49AE, 0xF1FE,
-                0xC137, 0x9904, 0xC136, 0x9906, 0x7206, 0x49AE, 0xF1FE, 0x7200, 0x49A0,
-                0xF10B, 0xC52F, 0xC12E, 0xC232, 0xC332, 0xE812, 0xC331, 0xE810, 0xC330,
-                0xE80E, 0xE018, 0xC126, 0xC229, 0xC525, 0xC328, 0xE808, 0xC523, 0xC326,
-                0xE805, 0xC521, 0xC324, 0xE802, 0xE00C, 0x740E, 0x49CE, 0xF1FE, 0x9908,
-                0x9D0A, 0x9A0C, 0x9B0E, 0x740E, 0x49CE, 0xF1FE, 0xFF80, 0xB005, 0xB004,
-                0xB003, 0xB002, 0xB001, 0xB000, 0xC604, 0xC002, 0xB800, 0x2B16, 0xE000,
-                0xE8E0, 0xF128, 0x3DC2, 0xFFFF, 0x10EC, 0x816A, 0x816D, 0x816C, 0xF000,
-                0x8002, 0x8004, 0x8007, 0x48C1, 0x48C2, 0x9C46, 0xC402, 0xBC00, 0x07BC,
-                0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000,
-                0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000
-        };
-
-        rtl8168_hw_disable_mac_mcu_bps(dev);
-
-        for (i = 0; i < ARRAY_SIZE(mcu_patch_code_8168fp_3); i++) {
-                rtl8168_mac_ocp_write(tp, 0xF800 + i * 2, mcu_patch_code_8168fp_3[i]);
-        }
-
-        rtl8168_mac_ocp_write(tp, 0xFC26, 0x8000);
-
-        rtl8168_mac_ocp_write(tp, 0xFC28, 0x2B14);
-        //rtl8168_mac_ocp_write(tp, 0xFC2A, 0x07B0);
-
-        if (true == rtl8168_check_dash_other_fun_present(tp))
-                rtl8168_mac_ocp_write(tp, 0xFC38, 0x0000);
-        else
-                rtl8168_mac_ocp_write(tp, 0xFC38, 0x0001);
-}
-
-static void
-rtl8168_hw_mac_mcu_config(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        if (tp->NotWrMcuPatchCode == TRUE)
-                return;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-                rtl8168_set_mac_mcu_8168g_1(dev);
-                break;
-        case CFG_METHOD_24:
-                rtl8168_set_mac_mcu_8168gu_1(dev);
-                break;
-        case CFG_METHOD_25:
-                rtl8168_set_mac_mcu_8168gu_2(dev);
-                break;
-        case CFG_METHOD_26:
-                rtl8168_set_mac_mcu_8411b_1(dev);
-                break;
-        case CFG_METHOD_27:
-                rtl8168_set_mac_mcu_8168ep_1(dev);
-                break;
-        case CFG_METHOD_28:
-                rtl8168_set_mac_mcu_8168ep_2(dev);
-                break;
-        case CFG_METHOD_29:
-                rtl8168_set_mac_mcu_8168h_1(dev);
-                break;
-        case CFG_METHOD_30:
-        case CFG_METHOD_37:
-                rtl8168_set_mac_mcu_8168h_2(dev);
-                break;
-        case CFG_METHOD_31:
-                rtl8168_set_mac_mcu_8168fp_1(dev);
-                break;
-        case CFG_METHOD_32:
-                rtl8168_set_mac_mcu_8168fp_2(dev);
-                break;
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-                rtl8168_set_mac_mcu_8168fp_3(dev);
-                break;
-        case CFG_METHOD_35:
-                rtl8168_set_mac_mcu_8168h_3(dev);
-                break;
-        case CFG_METHOD_36:
-                rtl8168_set_mac_mcu_8168h_4(dev);
-                break;
-        }
-}
-#endif
-
-#ifdef ENABLE_USE_FIRMWARE_FILE
-static void rtl8168_release_firmware(struct rtl8168_private *tp)
-{
-        if (tp->rtl_fw) {
-                rtl8168_fw_release_firmware(tp->rtl_fw);
-                kfree(tp->rtl_fw);
-                tp->rtl_fw = NULL;
-        }
-}
-
-void rtl8168_apply_firmware(struct rtl8168_private *tp)
-{
-        /* TODO: release firmware if rtl_fw_write_firmware signals failure. */
-        if (tp->rtl_fw) {
-                rtl8168_fw_write_firmware(tp, tp->rtl_fw);
-                /* At least one firmware doesn't reset tp->ocp_base. */
-                tp->ocp_base = OCP_STD_PHY_BASE;
-
-                /* PHY soft reset may still be in progress */
-                //phy_read_poll_timeout(tp->phydev, MII_BMCR, val,
-                //		      !(val & BMCR_RESET),
-                //		      50000, 600000, true);
-                rtl8168_wait_phy_reset_complete(tp);
-
-                tp->hw_ram_code_ver = rtl8168_get_hw_phy_mcu_code_ver(tp);
-                tp->sw_ram_code_ver = tp->hw_ram_code_ver;
-                tp->HwHasWrRamCodeToMicroP = TRUE;
-        }
-}
-#endif
-
-static void
-rtl8168_hw_init(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u32 csi_tmp;
-
-        if (tp->HwSuppAspmClkIntrLock) {
-                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7);
-                rtl8168_enable_cfg9346_write(tp);
-                rtl8168_hw_aspm_clkreq_enable(tp, false);
-                rtl8168_disable_cfg9346_write(tp);
-        }
-
-        //Disable UPS
-        if (HW_SUPPORT_UPS_MODE(tp))
-                rtl8168_mac_ocp_write(tp, 0xD400, rtl8168_mac_ocp_read( tp, 0xD400) & ~(BIT_0));
-
-        //Disable DMA Aggregation
-        switch (tp->mcfg) {
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                rtl8168_mac_ocp_write(tp, 0xE63E, rtl8168_mac_ocp_read( tp, 0xE63E) & ~(BIT_3 | BIT_2 | BIT_1));
-                rtl8168_mac_ocp_write(tp, 0xE63E, rtl8168_mac_ocp_read( tp, 0xE63E) | (BIT_0));
-                rtl8168_mac_ocp_write(tp, 0xE63E, rtl8168_mac_ocp_read( tp, 0xE63E) & ~(BIT_0));
-                rtl8168_mac_ocp_write(tp, 0xC094, 0x0);
-                rtl8168_mac_ocp_write(tp, 0xC09E, 0x0);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_9:
-        case CFG_METHOD_10:
-                RTL_W8(tp, DBG_reg, RTL_R8(tp, DBG_reg) | BIT_1 | BIT_7);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_14:
-        case CFG_METHOD_15:
-        case CFG_METHOD_16:
-        case CFG_METHOD_17:
-        case CFG_METHOD_18:
-        case CFG_METHOD_19:
-                RTL_W8(tp, 0xF2, (RTL_R8(tp, 0xF2) & ~(BIT_2 | BIT_1 | BIT_0)));
-                break;
-        }
-
-        if (tp->mcfg == CFG_METHOD_10 || tp->mcfg == CFG_METHOD_14 || tp->mcfg == CFG_METHOD_15)
-                RTL_W8(tp, 0xF3, RTL_R8(tp, 0xF3) | BIT_2);
-
-#ifndef ENABLE_USE_FIRMWARE_FILE
-        if (!tp->rtl_fw)
-                rtl8168_hw_mac_mcu_config(dev);
-#endif
-
-        /*disable ocp phy power saving*/
-        if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
-            tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
-            tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
-            tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
-            tp->mcfg == CFG_METHOD_37)
-                if (!tp->dash_printer_enabled)
-                        rtl8168_disable_ocp_phy_power_saving(dev);
-
-        //Set PCIE uncorrectable error status mask pcie 0x108
-        csi_tmp = rtl8168_csi_read(tp, 0x108);
-        csi_tmp |= BIT_20;
-        rtl8168_csi_write(tp, 0x108, csi_tmp);
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-                csi_tmp = rtl8168_eri_read(tp, 0x1AB, 1, ERIAR_ExGMAC);
-                csi_tmp |= ( BIT_2 | BIT_3 | BIT_4 | BIT_5 | BIT_6 | BIT_7 );
-                rtl8168_eri_write(tp, 0x1AB, 1, csi_tmp, ERIAR_ExGMAC);
-                break;
-        }
-
-        rtl8168_set_pci_pme(tp, 0);
-
-        if (s0_magic_packet == 1)
-                rtl8168_enable_magic_packet(dev);
-        else
-                rtl8168_disable_magic_packet(dev);
-
-#ifdef ENABLE_USE_FIRMWARE_FILE
-        if (tp->rtl_fw &&
-            !(HW_DASH_SUPPORT_TYPE_3(tp) &&
-              tp->HwPkgDet == 0x06))
-                rtl8168_apply_firmware(tp);
-#endif
-}
-
-static void
-rtl8168_hw_ephy_config(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u16 ephy_data;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_4:
-                /*Set EPHY registers    begin*/
-                /*Set EPHY register offset 0x02 bit 11 to 0 and bit 12 to 1*/
-                ephy_data = rtl8168_ephy_read(tp, 0x02);
-                ephy_data &= ~BIT_11;
-                ephy_data |= BIT_12;
-                rtl8168_ephy_write(tp, 0x02, ephy_data);
-
-                /*Set EPHY register offset 0x03 bit 1 to 1*/
-                ephy_data = rtl8168_ephy_read(tp, 0x03);
-                ephy_data |= (1 << 1);
-                rtl8168_ephy_write(tp, 0x03, ephy_data);
-
-                /*Set EPHY register offset 0x06 bit 7 to 0*/
-                ephy_data = rtl8168_ephy_read(tp, 0x06);
-                ephy_data &= ~(1 << 7);
-                rtl8168_ephy_write(tp, 0x06, ephy_data);
-                /*Set EPHY registers    end*/
-
-                break;
-        case CFG_METHOD_5:
-                /* set EPHY registers */
-                SetPCIePhyBit(tp, 0x01, BIT_0);
-
-                ClearAndSetPCIePhyBit(tp,
-                                      0x03,
-                                      BIT_10,
-                                      BIT_5
-                                     );
-
-                break;
-        case CFG_METHOD_9:
-                /* set EPHY registers */
-                rtl8168_ephy_write(tp, 0x01, 0x7C7F);
-                rtl8168_ephy_write(tp, 0x02, 0x011F);
-                if (tp->eeprom_type != EEPROM_TYPE_NONE) {
-                        ClearAndSetPCIePhyBit(tp,
-                                              0x03,
-                                              0xFFB0,
-                                              0x05B0
-                                             );
-                } else {
-                        ClearAndSetPCIePhyBit(tp,
-                                              0x03,
-                                              0xFFF0,
-                                              0x05F0
-                                             );
-                }
-                rtl8168_ephy_write(tp, 0x06, 0xB271);
-                rtl8168_ephy_write(tp, 0x07, 0xCE00);
-
-                break;
-        case CFG_METHOD_10:
-                /* set EPHY registers */
-                rtl8168_ephy_write(tp, 0x01, 0x6C7F);
-                rtl8168_ephy_write(tp, 0x02, 0x011F);
-                ClearAndSetPCIePhyBit(tp,
-                                      0x03,
-                                      0xFFF0,
-                                      0x01B0
-                                     );
-                rtl8168_ephy_write(tp, 0x1A, 0x0546);
-                rtl8168_ephy_write(tp, 0x1C, 0x80C4);
-                rtl8168_ephy_write(tp, 0x1D, 0x78E5);
-                rtl8168_ephy_write(tp, 0x0A, 0x8100);
-
-                break;
-        case CFG_METHOD_12:
-        case CFG_METHOD_13:
-                ephy_data = rtl8168_ephy_read(tp, 0x0B);
-                rtl8168_ephy_write(tp, 0x0B, ephy_data|0x48);
-                ephy_data = rtl8168_ephy_read(tp, 0x19);
-                ephy_data &= ~0x20;
-                rtl8168_ephy_write(tp, 0x19, ephy_data|0x50);
-                ephy_data = rtl8168_ephy_read(tp, 0x0C);
-                ephy_data &= ~0x100;
-                rtl8168_ephy_write(tp, 0x0C, ephy_data|0x20);
-                ephy_data = rtl8168_ephy_read(tp, 0x10);
-                ephy_data &= ~0x04;
-                rtl8168_ephy_write(tp, 0x10, ephy_data);
-
-                break;
-        case CFG_METHOD_14:
-        case CFG_METHOD_15:
-                /* set EPHY registers */
-                ephy_data = rtl8168_ephy_read(tp, 0x00) & ~0x0200;
-                ephy_data |= 0x0100;
-                rtl8168_ephy_write(tp, 0x00, ephy_data);
-
-                ephy_data = rtl8168_ephy_read(tp, 0x00);
-                ephy_data |= 0x0004;
-                rtl8168_ephy_write(tp, 0x00, ephy_data);
-
-                ephy_data = rtl8168_ephy_read(tp, 0x06) & ~0x0002;
-                ephy_data |= 0x0001;
-                rtl8168_ephy_write(tp, 0x06, ephy_data);
-
-                ephy_data = rtl8168_ephy_read(tp, 0x06);
-                ephy_data |= 0x0030;
-                rtl8168_ephy_write(tp, 0x06, ephy_data);
-
-                ephy_data = rtl8168_ephy_read(tp, 0x07);
-                ephy_data |= 0x2000;
-                rtl8168_ephy_write(tp, 0x07, ephy_data);
-
-                ephy_data = rtl8168_ephy_read(tp, 0x00);
-                ephy_data |= 0x0020;
-                rtl8168_ephy_write(tp, 0x00, ephy_data);
-
-                ephy_data = rtl8168_ephy_read(tp, 0x03) & ~0x5800;
-                ephy_data |= 0x2000;
-                rtl8168_ephy_write(tp, 0x03, ephy_data);
-
-                ephy_data = rtl8168_ephy_read(tp, 0x03);
-                ephy_data |= 0x0001;
-                rtl8168_ephy_write(tp, 0x03, ephy_data);
-
-                ephy_data = rtl8168_ephy_read(tp, 0x01) & ~0x0800;
-                ephy_data |= 0x1000;
-                rtl8168_ephy_write(tp, 0x01, ephy_data);
-
-                ephy_data = rtl8168_ephy_read(tp, 0x07);
-                ephy_data |= 0x4000;
-                rtl8168_ephy_write(tp, 0x07, ephy_data);
-
-                ephy_data = rtl8168_ephy_read(tp, 0x1E);
-                ephy_data |= 0x2000;
-                rtl8168_ephy_write(tp, 0x1E, ephy_data);
-
-                rtl8168_ephy_write(tp, 0x19, 0xFE6C);
-
-                ephy_data = rtl8168_ephy_read(tp, 0x0A);
-                ephy_data |= 0x0040;
-                rtl8168_ephy_write(tp, 0x0A, ephy_data);
-
-                break;
-        case CFG_METHOD_16:
-        case CFG_METHOD_17:
-                if (tp->mcfg == CFG_METHOD_16) {
-                        rtl8168_ephy_write(tp, 0x06, 0xF020);
-                        rtl8168_ephy_write(tp, 0x07, 0x01FF);
-                        rtl8168_ephy_write(tp, 0x00, 0x5027);
-                        rtl8168_ephy_write(tp, 0x01, 0x0003);
-                        rtl8168_ephy_write(tp, 0x02, 0x2D16);
-                        rtl8168_ephy_write(tp, 0x03, 0x6D49);
-                        rtl8168_ephy_write(tp, 0x08, 0x0006);
-                        rtl8168_ephy_write(tp, 0x0A, 0x00C8);
-                }
-
-                ephy_data = rtl8168_ephy_read(tp, 0x09);
-                ephy_data |= BIT_7;
-                rtl8168_ephy_write(tp, 0x09, ephy_data);
-
-                ephy_data = rtl8168_ephy_read(tp, 0x19);
-                ephy_data |= (BIT_2 | BIT_5 | BIT_9);
-                rtl8168_ephy_write(tp, 0x19, ephy_data);
-
-                ephy_data = rtl8168_ephy_read(tp, 0x00);
-                ephy_data |= BIT_3;
-                rtl8168_ephy_write(tp, 0x00, ephy_data);
-                ephy_data = rtl8168_ephy_read(tp, 0x0C);
-                ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4);
-                ephy_data |= BIT_9;
-                rtl8168_ephy_write(tp, 0x0C, ephy_data);
-
-                break;
-        case CFG_METHOD_18:
-        case CFG_METHOD_19:
-                if (tp->mcfg == CFG_METHOD_18) {
-                        ephy_data = rtl8168_ephy_read(tp, 0x06);
-                        ephy_data |= BIT_5;
-                        ephy_data &= ~(BIT_7 | BIT_6);
-                        rtl8168_ephy_write(tp, 0x06, ephy_data);
-
-                        ephy_data = rtl8168_ephy_read(tp, 0x08);
-                        ephy_data |= BIT_1;
-                        ephy_data &= ~BIT_0;
-                        rtl8168_ephy_write(tp, 0x08, ephy_data);
-                }
-
-                ephy_data = rtl8168_ephy_read(tp, 0x09);
-                ephy_data |= BIT_7;
-                rtl8168_ephy_write(tp, 0x09, ephy_data);
-
-                ephy_data = rtl8168_ephy_read(tp, 0x19);
-                ephy_data |= (BIT_2 | BIT_5 | BIT_9);
-                rtl8168_ephy_write(tp, 0x19, ephy_data);
-
-                ephy_data = rtl8168_ephy_read(tp, 0x00);
-                ephy_data |= BIT_3;
-                rtl8168_ephy_write(tp, 0x00, ephy_data);
-                ephy_data = rtl8168_ephy_read(tp, 0x0C);
-                ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4);
-                ephy_data |= BIT_9;
-                rtl8168_ephy_write(tp, 0x0C, ephy_data);
-
-                break;
-        case CFG_METHOD_20:
-                ephy_data = rtl8168_ephy_read(tp, 0x06);
-                ephy_data |= BIT_5;
-                ephy_data &= ~(BIT_7 | BIT_6);
-                rtl8168_ephy_write(tp, 0x06, ephy_data);
-
-                rtl8168_ephy_write(tp, 0x0f, 0x5200);
-
-                ephy_data = rtl8168_ephy_read(tp, 0x19);
-                ephy_data |= (BIT_2 | BIT_5 | BIT_9);
-                rtl8168_ephy_write(tp, 0x19, ephy_data);
-
-                ephy_data = rtl8168_ephy_read(tp, 0x00);
-                ephy_data |= BIT_3;
-                rtl8168_ephy_write(tp, 0x00, ephy_data);
-                ephy_data = rtl8168_ephy_read(tp, 0x0C);
-                ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4);
-                ephy_data |= BIT_9;
-                rtl8168_ephy_write(tp, 0x0C, ephy_data);
-
-                break;
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-
-                ephy_data = rtl8168_ephy_read(tp, 0x00);
-                ephy_data &= ~(BIT_3);
-                rtl8168_ephy_write(tp, 0x00, ephy_data);
-                ephy_data = rtl8168_ephy_read(tp, 0x0C);
-                ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4);
-                ephy_data |= (BIT_5 | BIT_11);
-                rtl8168_ephy_write(tp, 0x0C, ephy_data);
-
-                ephy_data = rtl8168_ephy_read(tp, 0x1E);
-                ephy_data |= (BIT_0);
-                rtl8168_ephy_write(tp, 0x1E, ephy_data);
-
-                ephy_data = rtl8168_ephy_read(tp, 0x19);
-                ephy_data &= ~(BIT_15);
-                rtl8168_ephy_write(tp, 0x19, ephy_data);
-
-                break;
-        case CFG_METHOD_25:
-                ephy_data = rtl8168_ephy_read(tp, 0x00);
-                ephy_data &= ~BIT_3;
-                rtl8168_ephy_write(tp, 0x00, ephy_data);
-                ephy_data = rtl8168_ephy_read(tp, 0x0C);
-                ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10| BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4);
-                ephy_data |= (BIT_5 | BIT_11);
-                rtl8168_ephy_write(tp, 0x0C, ephy_data);
-
-                rtl8168_ephy_write(tp, 0x19, 0x7C00);
-                rtl8168_ephy_write(tp, 0x1E, 0x20EB);
-                rtl8168_ephy_write(tp, 0x0D, 0x1666);
-                rtl8168_ephy_write(tp, 0x00, 0x10A3);
-                rtl8168_ephy_write(tp, 0x06, 0xF050);
-
-                SetPCIePhyBit(tp, 0x04, BIT_4);
-                ClearPCIePhyBit(tp, 0x1D, BIT_14);
-
-                break;
-        case CFG_METHOD_26:
-                ClearPCIePhyBit(tp, 0x00, BIT_3);
-                ClearAndSetPCIePhyBit( tp,
-                                       0x0C,
-                                       (BIT_13 | BIT_12 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_4),
-                                       (BIT_5 | BIT_11)
-                                     );
-                SetPCIePhyBit(tp, 0x1E, BIT_0);
-                ClearPCIePhyBit(tp, 0x19, BIT_15);
-
-                ClearPCIePhyBit(tp, 0x19, (BIT_5 | BIT_0));
-
-                SetPCIePhyBit(tp, 0x1E, BIT_13);
-                ClearPCIePhyBit(tp, 0x0D, BIT_8);
-                SetPCIePhyBit(tp, 0x0D, BIT_9);
-                SetPCIePhyBit(tp, 0x00, BIT_7);
-
-                SetPCIePhyBit(tp, 0x06, BIT_4);
-
-                SetPCIePhyBit(tp, 0x04, BIT_4);
-                SetPCIePhyBit(tp, 0x1D, BIT_14);
-
-                break;
-        case CFG_METHOD_23:
-                rtl8168_ephy_write(tp, 0x00, 0x10AB);
-                rtl8168_ephy_write(tp, 0x06, 0xf030);
-                rtl8168_ephy_write(tp, 0x08, 0x2006);
-                rtl8168_ephy_write(tp, 0x0D, 0x1666);
-
-                ephy_data = rtl8168_ephy_read(tp, 0x0C);
-                ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4);
-                rtl8168_ephy_write(tp, 0x0C, ephy_data);
-
-                break;
-        case CFG_METHOD_27:
-                rtl8168_ephy_write(tp, 0x00, 0x10A3);
-                rtl8168_ephy_write(tp, 0x19, 0xFC00);
-                rtl8168_ephy_write(tp, 0x1E, 0x20EA);
-
-                break;
-        case CFG_METHOD_28:
-                rtl8168_ephy_write(tp, 0x00, 0x10AB);
-                rtl8168_ephy_write(tp, 0x19, 0xFC00);
-                rtl8168_ephy_write(tp, 0x1E, 0x20EB);
-                rtl8168_ephy_write(tp, 0x0D, 0x1666);
-                ClearPCIePhyBit(tp, 0x0B, BIT_0);
-                SetPCIePhyBit(tp, 0x1D, BIT_14);
-                ClearAndSetPCIePhyBit(tp,
-                                      0x0C,
-                                      BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_8 | BIT_7 | BIT_6 | BIT_5,
-                                      BIT_9 | BIT_4
-                                     );
-
-                break;
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_37:
-                ClearPCIePhyBit(tp, 0x1E, BIT_11);
-
-                SetPCIePhyBit(tp, 0x1E, BIT_0);
-                SetPCIePhyBit(tp, 0x1D, BIT_11);
-
-                rtl8168_ephy_write(tp, 0x05, 0x2089);
-                rtl8168_ephy_write(tp, 0x06, 0x5881);
-
-                rtl8168_ephy_write(tp, 0x04, 0x854A);
-                rtl8168_ephy_write(tp, 0x01, 0x068B);
-
-                break;
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-                ClearAndSetPCIePhyBit(tp,
-                                      0x19,
-                                      BIT_6,
-                                      (BIT_12| BIT_8)
-                                     );
-                ClearAndSetPCIePhyBit(tp,
-                                      0x59,
-                                      BIT_6,
-                                      (BIT_12| BIT_8)
-                                     );
-
-                ClearPCIePhyBit(tp, 0x0C, BIT_4);
-                ClearPCIePhyBit(tp, 0x4C, BIT_4);
-                ClearPCIePhyBit(tp, 0x0B, BIT_0);
-
-                break;
-        case CFG_METHOD_35:
-                rtl8168_clear_mcu_ocp_bit(tp, 0xD438, BIT_2);
-
-                ClearPCIePhyBit(tp, 0x24, BIT_9);
-
-                rtl8168_clear_mcu_ocp_bit(tp, 0xDE28, (BIT_1 | BIT_0));
-
-                rtl8168_set_mcu_ocp_bit(tp, 0xD438, BIT_2);
-
-                break;
-        case CFG_METHOD_36:
-                rtl8168_clear_mcu_ocp_bit(tp, 0xD438, BIT_2);
-
-                rtl8168_clear_mcu_ocp_bit(tp, 0xDE28, (BIT_1 | BIT_0));
-
-                rtl8168_set_mcu_ocp_bit(tp, 0xD438, BIT_2);
-
-                break;
-        }
-}
-
-static int
-rtl8168_set_phy_mcu_patch_request(struct rtl8168_private *tp)
-{
-        u16 PhyRegValue;
-        u32 WaitCnt;
-        int retval = TRUE;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21 ... CFG_METHOD_37:
-                rtl8168_mdio_write(tp,0x1f, 0x0B82);
-                rtl8168_set_eth_phy_bit(tp, 0x10, BIT_4);
-
-                rtl8168_mdio_write(tp,0x1f, 0x0B80);
-                WaitCnt = 0;
-                do {
-                        PhyRegValue = rtl8168_mdio_read(tp, 0x10);
-                        udelay(100);
-                        WaitCnt++;
-                }  while (!(PhyRegValue & BIT_6) && (WaitCnt < 1000));
-
-                if (!(PhyRegValue & BIT_6) && (WaitCnt == 1000))
-                        retval = FALSE;
-
-                rtl8168_mdio_write(tp,0x1f, 0x0000);
-                break;
-        }
-
-        return retval;
-}
-
-static int
-rtl8168_clear_phy_mcu_patch_request(struct rtl8168_private *tp)
-{
-        u16 PhyRegValue;
-        u32 WaitCnt;
-        int retval = TRUE;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21 ... CFG_METHOD_37:
-                rtl8168_mdio_write(tp, 0x1f, 0x0B82);
-                rtl8168_clear_eth_phy_bit(tp, 0x10, BIT_4);
-
-                rtl8168_mdio_write(tp,0x1f, 0x0B80);
-                WaitCnt = 0;
-                do {
-                        PhyRegValue = rtl8168_mdio_read(tp, 0x10);
-                        udelay(100);
-                        WaitCnt++;
-                } while ((PhyRegValue & BIT_6) && (WaitCnt < 1000));
-
-                if ((PhyRegValue & BIT_6) && (WaitCnt == 1000))
-                        retval = FALSE;
-
-                rtl8168_mdio_write(tp,0x1f, 0x0000);
-                break;
-        }
-
-        return retval;
-}
-
-static u16
-rtl8168_get_hw_phy_mcu_code_ver(struct rtl8168_private *tp)
-{
-        u16 hw_ram_code_ver = ~0;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_14:
-        case CFG_METHOD_15:
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B60);
-                hw_ram_code_ver = rtl8168_mdio_read(tp, 0x06);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                break;
-        case CFG_METHOD_16:
-        case CFG_METHOD_17:
-        case CFG_METHOD_18:
-        case CFG_METHOD_19:
-        case CFG_METHOD_20:
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B30);
-                hw_ram_code_ver = rtl8168_mdio_read(tp, 0x06);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                break;
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x801E);
-                hw_ram_code_ver = rtl8168_mdio_read(tp, 0x14);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                break;
-        default:
-                tp->hw_ram_code_ver = ~0;
-                break;
-        }
-
-        return hw_ram_code_ver;
-}
-
-#ifndef ENABLE_USE_FIRMWARE_FILE
-static void
-rtl8168_enable_phy_disable_mode(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        switch (tp->HwSuppCheckPhyDisableModeVer) {
-        case 1:
-                rtl8168_mac_ocp_write(tp, 0xDC20, rtl8168_mac_ocp_read(tp, 0xDC20) | BIT_1);
-                break;
-        case 2:
-        case 3:
-                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_5);
-                break;
-        }
-
-        dprintk("enable phy disable mode.\n");
-}
-
-static void
-rtl8168_disable_phy_disable_mode(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        switch (tp->HwSuppCheckPhyDisableModeVer) {
-        case 1:
-                rtl8168_mac_ocp_write(tp, 0xDC20, rtl8168_mac_ocp_read(tp, 0xDC20) & ~BIT_1);
-                break;
-        case 2:
-        case 3:
-                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_5);
-                break;
-        }
-
-        mdelay(1);
-
-        dprintk("disable phy disable mode.\n");
-}
-
-static int
-rtl8168_check_hw_phy_mcu_code_ver(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int ram_code_ver_match = 0;
-
-        tp->hw_ram_code_ver = rtl8168_get_hw_phy_mcu_code_ver(tp);
-
-        if ( tp->hw_ram_code_ver == tp->sw_ram_code_ver) {
-                ram_code_ver_match = 1;
-                tp->HwHasWrRamCodeToMicroP = TRUE;
-        }
-
-        return ram_code_ver_match;
-}
-
-static void
-rtl8168_write_hw_phy_mcu_code_ver(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_14:
-        case CFG_METHOD_15:
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B60);
-                rtl8168_mdio_write(tp, 0x06, tp->sw_ram_code_ver);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                tp->hw_ram_code_ver = tp->sw_ram_code_ver;
-                break;
-        case CFG_METHOD_16:
-        case CFG_METHOD_17:
-        case CFG_METHOD_18:
-        case CFG_METHOD_19:
-        case CFG_METHOD_20:
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B30);
-                rtl8168_mdio_write(tp, 0x06, tp->sw_ram_code_ver);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                tp->hw_ram_code_ver = tp->sw_ram_code_ver;
-                break;
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x801E);
-                rtl8168_mdio_write(tp, 0x14, tp->sw_ram_code_ver);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                tp->hw_ram_code_ver = tp->sw_ram_code_ver;
-                break;
-        }
-}
-static int
-rtl8168_phy_ram_code_check(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u16 PhyRegValue;
-        int retval = TRUE;
-
-        switch(tp->mcfg) {
-        case CFG_METHOD_21:
-                rtl8168_mdio_write(tp, 0x1f, 0x0A40);
-                PhyRegValue = rtl8168_mdio_read(tp, 0x10);
-                PhyRegValue &= ~(BIT_11);
-                rtl8168_mdio_write(tp, 0x10, PhyRegValue);
-
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0A00);
-                PhyRegValue = rtl8168_mdio_read(tp, 0x10);
-                PhyRegValue &= ~(BIT_12 | BIT_13 | BIT_14 | BIT_15);
-                rtl8168_mdio_write(tp, 0x10, PhyRegValue);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x8010);
-                PhyRegValue = rtl8168_mdio_read(tp, 0x14);
-                PhyRegValue &= ~(BIT_11);
-                rtl8168_mdio_write(tp, 0x14, PhyRegValue);
-
-                rtl8168_set_phy_mcu_patch_request(tp);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0A40);
-                rtl8168_mdio_write(tp, 0x10, 0x0140);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0A4A);
-                PhyRegValue = rtl8168_mdio_read(tp, 0x13);
-                PhyRegValue &= ~(BIT_6);
-                PhyRegValue |= (BIT_7);
-                rtl8168_mdio_write(tp, 0x13, PhyRegValue);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0A44);
-                PhyRegValue = rtl8168_mdio_read(tp, 0x14);
-                PhyRegValue |= (BIT_2);
-                rtl8168_mdio_write(tp, 0x14, PhyRegValue);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0A50);
-                PhyRegValue = rtl8168_mdio_read(tp, 0x11);
-                PhyRegValue |= (BIT_11|BIT_12);
-                rtl8168_mdio_write(tp, 0x11, PhyRegValue);
-
-                rtl8168_clear_phy_mcu_patch_request(tp);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0A40);
-                rtl8168_mdio_write(tp, 0x10, 0x1040);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0A4A);
-                PhyRegValue = rtl8168_mdio_read(tp, 0x13);
-                PhyRegValue &= ~(BIT_6|BIT_7);
-                rtl8168_mdio_write(tp, 0x13, PhyRegValue);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0A44);
-                PhyRegValue = rtl8168_mdio_read(tp, 0x14);
-                PhyRegValue &= ~(BIT_2);
-                rtl8168_mdio_write(tp, 0x14, PhyRegValue);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0A50);
-                PhyRegValue = rtl8168_mdio_read(tp, 0x11);
-                PhyRegValue &= ~(BIT_11|BIT_12);
-                rtl8168_mdio_write(tp, 0x11, PhyRegValue);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x8010);
-                PhyRegValue = rtl8168_mdio_read(tp, 0x14);
-                PhyRegValue |= (BIT_11);
-                rtl8168_mdio_write(tp, 0x14, PhyRegValue);
-
-                rtl8168_set_phy_mcu_patch_request(tp);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0A20);
-                PhyRegValue = rtl8168_mdio_read(tp, 0x13);
-                if (PhyRegValue & BIT_11) {
-                        if (PhyRegValue & BIT_10) {
-                                retval = FALSE;
-                        }
-                }
-
-                rtl8168_clear_phy_mcu_patch_request(tp);
-
-                mdelay(2);
-                break;
-        default:
-                break;
-        }
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-        return retval;
-}
-
-static void
-rtl8168_set_phy_ram_code_check_fail_flag(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u16 TmpUshort;
-
-        switch(tp->mcfg) {
-        case CFG_METHOD_21:
-                TmpUshort = rtl8168_mac_ocp_read(tp, 0xD3C0);
-                TmpUshort |= BIT_0;
-                rtl8168_mac_ocp_write(tp, 0xD3C0, TmpUshort);
-                break;
-        }
-}
-
-static void
-rtl8168_set_phy_mcu_8168e_1(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        unsigned int gphy_val,i;
-
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x00, 0x1800);
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1e, 0x0023);
-        rtl8168_mdio_write(tp, 0x17, 0x0117);
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1E, 0x002C);
-        rtl8168_mdio_write(tp, 0x1B, 0x5000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x16, 0x4104);
-        for (i = 0; i < 200; i++) {
-                udelay(100);
-                gphy_val = rtl8168_mdio_read(tp, 0x1E);
-                gphy_val &= 0x03FF;
-                if (gphy_val == 0x000C)
-                        break;
-        }
-        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-        for (i = 0; i < 200; i++) {
-                udelay(100);
-                gphy_val = rtl8168_mdio_read(tp, 0x07);
-                if ((gphy_val & BIT_5) == 0)
-                        break;
-        }
-        gphy_val = rtl8168_mdio_read(tp, 0x07);
-        if (gphy_val & BIT_5) {
-                rtl8168_mdio_write(tp, 0x1f, 0x0007);
-                rtl8168_mdio_write(tp, 0x1e, 0x00a1);
-                rtl8168_mdio_write(tp, 0x17, 0x1000);
-                rtl8168_mdio_write(tp, 0x17, 0x0000);
-                rtl8168_mdio_write(tp, 0x17, 0x2000);
-                rtl8168_mdio_write(tp, 0x1e, 0x002f);
-                rtl8168_mdio_write(tp, 0x18, 0x9bfb);
-                rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                rtl8168_mdio_write(tp, 0x07, 0x0000);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        }
-        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-        rtl8168_mdio_write(tp, 0x05, 0xfff6);
-        rtl8168_mdio_write(tp, 0x06, 0x0080);
-        gphy_val = rtl8168_mdio_read(tp, 0x00);
-        gphy_val &= ~(BIT_7);
-        rtl8168_mdio_write(tp, 0x00, gphy_val);
-        rtl8168_mdio_write(tp, 0x1f, 0x0002);
-        gphy_val = rtl8168_mdio_read(tp, 0x08);
-        gphy_val &= ~(BIT_7);
-        rtl8168_mdio_write(tp, 0x08, gphy_val);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1e, 0x0023);
-        rtl8168_mdio_write(tp, 0x16, 0x0306);
-        rtl8168_mdio_write(tp, 0x16, 0x0307);
-        rtl8168_mdio_write(tp, 0x15, 0x000e);
-        rtl8168_mdio_write(tp, 0x19, 0x000a);
-        rtl8168_mdio_write(tp, 0x15, 0x0010);
-        rtl8168_mdio_write(tp, 0x19, 0x0008);
-        rtl8168_mdio_write(tp, 0x15, 0x0018);
-        rtl8168_mdio_write(tp, 0x19, 0x4801);
-        rtl8168_mdio_write(tp, 0x15, 0x0019);
-        rtl8168_mdio_write(tp, 0x19, 0x6801);
-        rtl8168_mdio_write(tp, 0x15, 0x001a);
-        rtl8168_mdio_write(tp, 0x19, 0x66a1);
-        rtl8168_mdio_write(tp, 0x15, 0x001f);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0020);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0021);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0022);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0023);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0024);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0025);
-        rtl8168_mdio_write(tp, 0x19, 0x64a1);
-        rtl8168_mdio_write(tp, 0x15, 0x0026);
-        rtl8168_mdio_write(tp, 0x19, 0x40ea);
-        rtl8168_mdio_write(tp, 0x15, 0x0027);
-        rtl8168_mdio_write(tp, 0x19, 0x4503);
-        rtl8168_mdio_write(tp, 0x15, 0x0028);
-        rtl8168_mdio_write(tp, 0x19, 0x9f00);
-        rtl8168_mdio_write(tp, 0x15, 0x0029);
-        rtl8168_mdio_write(tp, 0x19, 0xa631);
-        rtl8168_mdio_write(tp, 0x15, 0x002a);
-        rtl8168_mdio_write(tp, 0x19, 0x9717);
-        rtl8168_mdio_write(tp, 0x15, 0x002b);
-        rtl8168_mdio_write(tp, 0x19, 0x302c);
-        rtl8168_mdio_write(tp, 0x15, 0x002c);
-        rtl8168_mdio_write(tp, 0x19, 0x4802);
-        rtl8168_mdio_write(tp, 0x15, 0x002d);
-        rtl8168_mdio_write(tp, 0x19, 0x58da);
-        rtl8168_mdio_write(tp, 0x15, 0x002e);
-        rtl8168_mdio_write(tp, 0x19, 0x400d);
-        rtl8168_mdio_write(tp, 0x15, 0x002f);
-        rtl8168_mdio_write(tp, 0x19, 0x4488);
-        rtl8168_mdio_write(tp, 0x15, 0x0030);
-        rtl8168_mdio_write(tp, 0x19, 0x9e00);
-        rtl8168_mdio_write(tp, 0x15, 0x0031);
-        rtl8168_mdio_write(tp, 0x19, 0x63c8);
-        rtl8168_mdio_write(tp, 0x15, 0x0032);
-        rtl8168_mdio_write(tp, 0x19, 0x6481);
-        rtl8168_mdio_write(tp, 0x15, 0x0033);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0034);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0035);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0036);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0037);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0038);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0039);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x003a);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x003b);
-        rtl8168_mdio_write(tp, 0x19, 0x63e8);
-        rtl8168_mdio_write(tp, 0x15, 0x003c);
-        rtl8168_mdio_write(tp, 0x19, 0x7d00);
-        rtl8168_mdio_write(tp, 0x15, 0x003d);
-        rtl8168_mdio_write(tp, 0x19, 0x59d4);
-        rtl8168_mdio_write(tp, 0x15, 0x003e);
-        rtl8168_mdio_write(tp, 0x19, 0x63f8);
-        rtl8168_mdio_write(tp, 0x15, 0x0040);
-        rtl8168_mdio_write(tp, 0x19, 0x64a1);
-        rtl8168_mdio_write(tp, 0x15, 0x0041);
-        rtl8168_mdio_write(tp, 0x19, 0x30de);
-        rtl8168_mdio_write(tp, 0x15, 0x0044);
-        rtl8168_mdio_write(tp, 0x19, 0x480f);
-        rtl8168_mdio_write(tp, 0x15, 0x0045);
-        rtl8168_mdio_write(tp, 0x19, 0x6800);
-        rtl8168_mdio_write(tp, 0x15, 0x0046);
-        rtl8168_mdio_write(tp, 0x19, 0x6680);
-        rtl8168_mdio_write(tp, 0x15, 0x0047);
-        rtl8168_mdio_write(tp, 0x19, 0x7c10);
-        rtl8168_mdio_write(tp, 0x15, 0x0048);
-        rtl8168_mdio_write(tp, 0x19, 0x63c8);
-        rtl8168_mdio_write(tp, 0x15, 0x0049);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x004a);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x004b);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x004c);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x004d);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x004e);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x004f);
-        rtl8168_mdio_write(tp, 0x19, 0x40ea);
-        rtl8168_mdio_write(tp, 0x15, 0x0050);
-        rtl8168_mdio_write(tp, 0x19, 0x4503);
-        rtl8168_mdio_write(tp, 0x15, 0x0051);
-        rtl8168_mdio_write(tp, 0x19, 0x58ca);
-        rtl8168_mdio_write(tp, 0x15, 0x0052);
-        rtl8168_mdio_write(tp, 0x19, 0x63c8);
-        rtl8168_mdio_write(tp, 0x15, 0x0053);
-        rtl8168_mdio_write(tp, 0x19, 0x63d8);
-        rtl8168_mdio_write(tp, 0x15, 0x0054);
-        rtl8168_mdio_write(tp, 0x19, 0x66a0);
-        rtl8168_mdio_write(tp, 0x15, 0x0055);
-        rtl8168_mdio_write(tp, 0x19, 0x9f00);
-        rtl8168_mdio_write(tp, 0x15, 0x0056);
-        rtl8168_mdio_write(tp, 0x19, 0x3000);
-        rtl8168_mdio_write(tp, 0x15, 0x006E);
-        rtl8168_mdio_write(tp, 0x19, 0x9afa);
-        rtl8168_mdio_write(tp, 0x15, 0x00a1);
-        rtl8168_mdio_write(tp, 0x19, 0x3044);
-        rtl8168_mdio_write(tp, 0x15, 0x00ab);
-        rtl8168_mdio_write(tp, 0x19, 0x5820);
-        rtl8168_mdio_write(tp, 0x15, 0x00ac);
-        rtl8168_mdio_write(tp, 0x19, 0x5e04);
-        rtl8168_mdio_write(tp, 0x15, 0x00ad);
-        rtl8168_mdio_write(tp, 0x19, 0xb60c);
-        rtl8168_mdio_write(tp, 0x15, 0x00af);
-        rtl8168_mdio_write(tp, 0x19, 0x000a);
-        rtl8168_mdio_write(tp, 0x15, 0x00b2);
-        rtl8168_mdio_write(tp, 0x19, 0x30b9);
-        rtl8168_mdio_write(tp, 0x15, 0x00b9);
-        rtl8168_mdio_write(tp, 0x19, 0x4408);
-        rtl8168_mdio_write(tp, 0x15, 0x00ba);
-        rtl8168_mdio_write(tp, 0x19, 0x480b);
-        rtl8168_mdio_write(tp, 0x15, 0x00bb);
-        rtl8168_mdio_write(tp, 0x19, 0x5e00);
-        rtl8168_mdio_write(tp, 0x15, 0x00bc);
-        rtl8168_mdio_write(tp, 0x19, 0x405f);
-        rtl8168_mdio_write(tp, 0x15, 0x00bd);
-        rtl8168_mdio_write(tp, 0x19, 0x4448);
-        rtl8168_mdio_write(tp, 0x15, 0x00be);
-        rtl8168_mdio_write(tp, 0x19, 0x4020);
-        rtl8168_mdio_write(tp, 0x15, 0x00bf);
-        rtl8168_mdio_write(tp, 0x19, 0x4468);
-        rtl8168_mdio_write(tp, 0x15, 0x00c0);
-        rtl8168_mdio_write(tp, 0x19, 0x9c02);
-        rtl8168_mdio_write(tp, 0x15, 0x00c1);
-        rtl8168_mdio_write(tp, 0x19, 0x58a0);
-        rtl8168_mdio_write(tp, 0x15, 0x00c2);
-        rtl8168_mdio_write(tp, 0x19, 0xb605);
-        rtl8168_mdio_write(tp, 0x15, 0x00c3);
-        rtl8168_mdio_write(tp, 0x19, 0xc0d3);
-        rtl8168_mdio_write(tp, 0x15, 0x00c4);
-        rtl8168_mdio_write(tp, 0x19, 0x00e6);
-        rtl8168_mdio_write(tp, 0x15, 0x00c5);
-        rtl8168_mdio_write(tp, 0x19, 0xdaec);
-        rtl8168_mdio_write(tp, 0x15, 0x00c6);
-        rtl8168_mdio_write(tp, 0x19, 0x00fa);
-        rtl8168_mdio_write(tp, 0x15, 0x00c7);
-        rtl8168_mdio_write(tp, 0x19, 0x9df9);
-        rtl8168_mdio_write(tp, 0x15, 0x00c8);
-        rtl8168_mdio_write(tp, 0x19, 0x307a);
-        rtl8168_mdio_write(tp, 0x15, 0x0112);
-        rtl8168_mdio_write(tp, 0x19, 0x6421);
-        rtl8168_mdio_write(tp, 0x15, 0x0113);
-        rtl8168_mdio_write(tp, 0x19, 0x7c08);
-        rtl8168_mdio_write(tp, 0x15, 0x0114);
-        rtl8168_mdio_write(tp, 0x19, 0x63f0);
-        rtl8168_mdio_write(tp, 0x15, 0x0115);
-        rtl8168_mdio_write(tp, 0x19, 0x4003);
-        rtl8168_mdio_write(tp, 0x15, 0x0116);
-        rtl8168_mdio_write(tp, 0x19, 0x4418);
-        rtl8168_mdio_write(tp, 0x15, 0x0117);
-        rtl8168_mdio_write(tp, 0x19, 0x9b00);
-        rtl8168_mdio_write(tp, 0x15, 0x0118);
-        rtl8168_mdio_write(tp, 0x19, 0x6461);
-        rtl8168_mdio_write(tp, 0x15, 0x0119);
-        rtl8168_mdio_write(tp, 0x19, 0x64e1);
-        rtl8168_mdio_write(tp, 0x15, 0x011a);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0150);
-        rtl8168_mdio_write(tp, 0x19, 0x7c80);
-        rtl8168_mdio_write(tp, 0x15, 0x0151);
-        rtl8168_mdio_write(tp, 0x19, 0x6461);
-        rtl8168_mdio_write(tp, 0x15, 0x0152);
-        rtl8168_mdio_write(tp, 0x19, 0x4003);
-        rtl8168_mdio_write(tp, 0x15, 0x0153);
-        rtl8168_mdio_write(tp, 0x19, 0x4540);
-        rtl8168_mdio_write(tp, 0x15, 0x0154);
-        rtl8168_mdio_write(tp, 0x19, 0x9f00);
-        rtl8168_mdio_write(tp, 0x15, 0x0155);
-        rtl8168_mdio_write(tp, 0x19, 0x9d00);
-        rtl8168_mdio_write(tp, 0x15, 0x0156);
-        rtl8168_mdio_write(tp, 0x19, 0x7c40);
-        rtl8168_mdio_write(tp, 0x15, 0x0157);
-        rtl8168_mdio_write(tp, 0x19, 0x6421);
-        rtl8168_mdio_write(tp, 0x15, 0x0158);
-        rtl8168_mdio_write(tp, 0x19, 0x7c80);
-        rtl8168_mdio_write(tp, 0x15, 0x0159);
-        rtl8168_mdio_write(tp, 0x19, 0x64a1);
-        rtl8168_mdio_write(tp, 0x15, 0x015a);
-        rtl8168_mdio_write(tp, 0x19, 0x30fe);
-        rtl8168_mdio_write(tp, 0x15, 0x021e);
-        rtl8168_mdio_write(tp, 0x19, 0x5410);
-        rtl8168_mdio_write(tp, 0x15, 0x0225);
-        rtl8168_mdio_write(tp, 0x19, 0x5400);
-        rtl8168_mdio_write(tp, 0x15, 0x023D);
-        rtl8168_mdio_write(tp, 0x19, 0x4050);
-        rtl8168_mdio_write(tp, 0x15, 0x0295);
-        rtl8168_mdio_write(tp, 0x19, 0x6c08);
-        rtl8168_mdio_write(tp, 0x15, 0x02bd);
-        rtl8168_mdio_write(tp, 0x19, 0xa523);
-        rtl8168_mdio_write(tp, 0x15, 0x02be);
-        rtl8168_mdio_write(tp, 0x19, 0x32ca);
-        rtl8168_mdio_write(tp, 0x15, 0x02ca);
-        rtl8168_mdio_write(tp, 0x19, 0x48b3);
-        rtl8168_mdio_write(tp, 0x15, 0x02cb);
-        rtl8168_mdio_write(tp, 0x19, 0x4020);
-        rtl8168_mdio_write(tp, 0x15, 0x02cc);
-        rtl8168_mdio_write(tp, 0x19, 0x4823);
-        rtl8168_mdio_write(tp, 0x15, 0x02cd);
-        rtl8168_mdio_write(tp, 0x19, 0x4510);
-        rtl8168_mdio_write(tp, 0x15, 0x02ce);
-        rtl8168_mdio_write(tp, 0x19, 0xb63a);
-        rtl8168_mdio_write(tp, 0x15, 0x02cf);
-        rtl8168_mdio_write(tp, 0x19, 0x7dc8);
-        rtl8168_mdio_write(tp, 0x15, 0x02d6);
-        rtl8168_mdio_write(tp, 0x19, 0x9bf8);
-        rtl8168_mdio_write(tp, 0x15, 0x02d8);
-        rtl8168_mdio_write(tp, 0x19, 0x85f6);
-        rtl8168_mdio_write(tp, 0x15, 0x02d9);
-        rtl8168_mdio_write(tp, 0x19, 0x32e0);
-        rtl8168_mdio_write(tp, 0x15, 0x02e0);
-        rtl8168_mdio_write(tp, 0x19, 0x4834);
-        rtl8168_mdio_write(tp, 0x15, 0x02e1);
-        rtl8168_mdio_write(tp, 0x19, 0x6c08);
-        rtl8168_mdio_write(tp, 0x15, 0x02e2);
-        rtl8168_mdio_write(tp, 0x19, 0x4020);
-        rtl8168_mdio_write(tp, 0x15, 0x02e3);
-        rtl8168_mdio_write(tp, 0x19, 0x4824);
-        rtl8168_mdio_write(tp, 0x15, 0x02e4);
-        rtl8168_mdio_write(tp, 0x19, 0x4520);
-        rtl8168_mdio_write(tp, 0x15, 0x02e5);
-        rtl8168_mdio_write(tp, 0x19, 0x4008);
-        rtl8168_mdio_write(tp, 0x15, 0x02e6);
-        rtl8168_mdio_write(tp, 0x19, 0x4560);
-        rtl8168_mdio_write(tp, 0x15, 0x02e7);
-        rtl8168_mdio_write(tp, 0x19, 0x9d04);
-        rtl8168_mdio_write(tp, 0x15, 0x02e8);
-        rtl8168_mdio_write(tp, 0x19, 0x48c4);
-        rtl8168_mdio_write(tp, 0x15, 0x02e9);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02ea);
-        rtl8168_mdio_write(tp, 0x19, 0x4844);
-        rtl8168_mdio_write(tp, 0x15, 0x02eb);
-        rtl8168_mdio_write(tp, 0x19, 0x7dc8);
-        rtl8168_mdio_write(tp, 0x15, 0x02f0);
-        rtl8168_mdio_write(tp, 0x19, 0x9cf7);
-        rtl8168_mdio_write(tp, 0x15, 0x02f1);
-        rtl8168_mdio_write(tp, 0x19, 0xdf94);
-        rtl8168_mdio_write(tp, 0x15, 0x02f2);
-        rtl8168_mdio_write(tp, 0x19, 0x0002);
-        rtl8168_mdio_write(tp, 0x15, 0x02f3);
-        rtl8168_mdio_write(tp, 0x19, 0x6810);
-        rtl8168_mdio_write(tp, 0x15, 0x02f4);
-        rtl8168_mdio_write(tp, 0x19, 0xb614);
-        rtl8168_mdio_write(tp, 0x15, 0x02f5);
-        rtl8168_mdio_write(tp, 0x19, 0xc42b);
-        rtl8168_mdio_write(tp, 0x15, 0x02f6);
-        rtl8168_mdio_write(tp, 0x19, 0x00d4);
-        rtl8168_mdio_write(tp, 0x15, 0x02f7);
-        rtl8168_mdio_write(tp, 0x19, 0xc455);
-        rtl8168_mdio_write(tp, 0x15, 0x02f8);
-        rtl8168_mdio_write(tp, 0x19, 0x0093);
-        rtl8168_mdio_write(tp, 0x15, 0x02f9);
-        rtl8168_mdio_write(tp, 0x19, 0x92ee);
-        rtl8168_mdio_write(tp, 0x15, 0x02fa);
-        rtl8168_mdio_write(tp, 0x19, 0xefed);
-        rtl8168_mdio_write(tp, 0x15, 0x02fb);
-        rtl8168_mdio_write(tp, 0x19, 0x3312);
-        rtl8168_mdio_write(tp, 0x15, 0x0312);
-        rtl8168_mdio_write(tp, 0x19, 0x49b5);
-        rtl8168_mdio_write(tp, 0x15, 0x0313);
-        rtl8168_mdio_write(tp, 0x19, 0x7d00);
-        rtl8168_mdio_write(tp, 0x15, 0x0314);
-        rtl8168_mdio_write(tp, 0x19, 0x4d00);
-        rtl8168_mdio_write(tp, 0x15, 0x0315);
-        rtl8168_mdio_write(tp, 0x19, 0x6810);
-        rtl8168_mdio_write(tp, 0x15, 0x031e);
-        rtl8168_mdio_write(tp, 0x19, 0x404f);
-        rtl8168_mdio_write(tp, 0x15, 0x031f);
-        rtl8168_mdio_write(tp, 0x19, 0x44c8);
-        rtl8168_mdio_write(tp, 0x15, 0x0320);
-        rtl8168_mdio_write(tp, 0x19, 0xd64f);
-        rtl8168_mdio_write(tp, 0x15, 0x0321);
-        rtl8168_mdio_write(tp, 0x19, 0x00e7);
-        rtl8168_mdio_write(tp, 0x15, 0x0322);
-        rtl8168_mdio_write(tp, 0x19, 0x7c08);
-        rtl8168_mdio_write(tp, 0x15, 0x0323);
-        rtl8168_mdio_write(tp, 0x19, 0x8203);
-        rtl8168_mdio_write(tp, 0x15, 0x0324);
-        rtl8168_mdio_write(tp, 0x19, 0x4d48);
-        rtl8168_mdio_write(tp, 0x15, 0x0325);
-        rtl8168_mdio_write(tp, 0x19, 0x3327);
-        rtl8168_mdio_write(tp, 0x15, 0x0326);
-        rtl8168_mdio_write(tp, 0x19, 0x4d40);
-        rtl8168_mdio_write(tp, 0x15, 0x0327);
-        rtl8168_mdio_write(tp, 0x19, 0xc8d7);
-        rtl8168_mdio_write(tp, 0x15, 0x0328);
-        rtl8168_mdio_write(tp, 0x19, 0x0003);
-        rtl8168_mdio_write(tp, 0x15, 0x0329);
-        rtl8168_mdio_write(tp, 0x19, 0x7c20);
-        rtl8168_mdio_write(tp, 0x15, 0x032a);
-        rtl8168_mdio_write(tp, 0x19, 0x4c20);
-        rtl8168_mdio_write(tp, 0x15, 0x032b);
-        rtl8168_mdio_write(tp, 0x19, 0xc8ed);
-        rtl8168_mdio_write(tp, 0x15, 0x032c);
-        rtl8168_mdio_write(tp, 0x19, 0x00f4);
-        rtl8168_mdio_write(tp, 0x15, 0x032d);
-        rtl8168_mdio_write(tp, 0x19, 0x82b3);
-        rtl8168_mdio_write(tp, 0x15, 0x032e);
-        rtl8168_mdio_write(tp, 0x19, 0xd11d);
-        rtl8168_mdio_write(tp, 0x15, 0x032f);
-        rtl8168_mdio_write(tp, 0x19, 0x00b1);
-        rtl8168_mdio_write(tp, 0x15, 0x0330);
-        rtl8168_mdio_write(tp, 0x19, 0xde18);
-        rtl8168_mdio_write(tp, 0x15, 0x0331);
-        rtl8168_mdio_write(tp, 0x19, 0x0008);
-        rtl8168_mdio_write(tp, 0x15, 0x0332);
-        rtl8168_mdio_write(tp, 0x19, 0x91ee);
-        rtl8168_mdio_write(tp, 0x15, 0x0333);
-        rtl8168_mdio_write(tp, 0x19, 0x3339);
-        rtl8168_mdio_write(tp, 0x15, 0x033a);
-        rtl8168_mdio_write(tp, 0x19, 0x4064);
-        rtl8168_mdio_write(tp, 0x15, 0x0340);
-        rtl8168_mdio_write(tp, 0x19, 0x9e06);
-        rtl8168_mdio_write(tp, 0x15, 0x0341);
-        rtl8168_mdio_write(tp, 0x19, 0x7c08);
-        rtl8168_mdio_write(tp, 0x15, 0x0342);
-        rtl8168_mdio_write(tp, 0x19, 0x8203);
-        rtl8168_mdio_write(tp, 0x15, 0x0343);
-        rtl8168_mdio_write(tp, 0x19, 0x4d48);
-        rtl8168_mdio_write(tp, 0x15, 0x0344);
-        rtl8168_mdio_write(tp, 0x19, 0x3346);
-        rtl8168_mdio_write(tp, 0x15, 0x0345);
-        rtl8168_mdio_write(tp, 0x19, 0x4d40);
-        rtl8168_mdio_write(tp, 0x15, 0x0346);
-        rtl8168_mdio_write(tp, 0x19, 0xd11d);
-        rtl8168_mdio_write(tp, 0x15, 0x0347);
-        rtl8168_mdio_write(tp, 0x19, 0x0099);
-        rtl8168_mdio_write(tp, 0x15, 0x0348);
-        rtl8168_mdio_write(tp, 0x19, 0xbb17);
-        rtl8168_mdio_write(tp, 0x15, 0x0349);
-        rtl8168_mdio_write(tp, 0x19, 0x8102);
-        rtl8168_mdio_write(tp, 0x15, 0x034a);
-        rtl8168_mdio_write(tp, 0x19, 0x334d);
-        rtl8168_mdio_write(tp, 0x15, 0x034b);
-        rtl8168_mdio_write(tp, 0x19, 0xa22c);
-        rtl8168_mdio_write(tp, 0x15, 0x034c);
-        rtl8168_mdio_write(tp, 0x19, 0x3397);
-        rtl8168_mdio_write(tp, 0x15, 0x034d);
-        rtl8168_mdio_write(tp, 0x19, 0x91f2);
-        rtl8168_mdio_write(tp, 0x15, 0x034e);
-        rtl8168_mdio_write(tp, 0x19, 0xc218);
-        rtl8168_mdio_write(tp, 0x15, 0x034f);
-        rtl8168_mdio_write(tp, 0x19, 0x00f0);
-        rtl8168_mdio_write(tp, 0x15, 0x0350);
-        rtl8168_mdio_write(tp, 0x19, 0x3397);
-        rtl8168_mdio_write(tp, 0x15, 0x0351);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0364);
-        rtl8168_mdio_write(tp, 0x19, 0xbc05);
-        rtl8168_mdio_write(tp, 0x15, 0x0367);
-        rtl8168_mdio_write(tp, 0x19, 0xa1fc);
-        rtl8168_mdio_write(tp, 0x15, 0x0368);
-        rtl8168_mdio_write(tp, 0x19, 0x3377);
-        rtl8168_mdio_write(tp, 0x15, 0x0369);
-        rtl8168_mdio_write(tp, 0x19, 0x328b);
-        rtl8168_mdio_write(tp, 0x15, 0x036a);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0377);
-        rtl8168_mdio_write(tp, 0x19, 0x4b97);
-        rtl8168_mdio_write(tp, 0x15, 0x0378);
-        rtl8168_mdio_write(tp, 0x19, 0x6818);
-        rtl8168_mdio_write(tp, 0x15, 0x0379);
-        rtl8168_mdio_write(tp, 0x19, 0x4b07);
-        rtl8168_mdio_write(tp, 0x15, 0x037a);
-        rtl8168_mdio_write(tp, 0x19, 0x40ac);
-        rtl8168_mdio_write(tp, 0x15, 0x037b);
-        rtl8168_mdio_write(tp, 0x19, 0x4445);
-        rtl8168_mdio_write(tp, 0x15, 0x037c);
-        rtl8168_mdio_write(tp, 0x19, 0x404e);
-        rtl8168_mdio_write(tp, 0x15, 0x037d);
-        rtl8168_mdio_write(tp, 0x19, 0x4461);
-        rtl8168_mdio_write(tp, 0x15, 0x037e);
-        rtl8168_mdio_write(tp, 0x19, 0x9c09);
-        rtl8168_mdio_write(tp, 0x15, 0x037f);
-        rtl8168_mdio_write(tp, 0x19, 0x63da);
-        rtl8168_mdio_write(tp, 0x15, 0x0380);
-        rtl8168_mdio_write(tp, 0x19, 0x5440);
-        rtl8168_mdio_write(tp, 0x15, 0x0381);
-        rtl8168_mdio_write(tp, 0x19, 0x4b98);
-        rtl8168_mdio_write(tp, 0x15, 0x0382);
-        rtl8168_mdio_write(tp, 0x19, 0x7c60);
-        rtl8168_mdio_write(tp, 0x15, 0x0383);
-        rtl8168_mdio_write(tp, 0x19, 0x4c00);
-        rtl8168_mdio_write(tp, 0x15, 0x0384);
-        rtl8168_mdio_write(tp, 0x19, 0x4b08);
-        rtl8168_mdio_write(tp, 0x15, 0x0385);
-        rtl8168_mdio_write(tp, 0x19, 0x63d8);
-        rtl8168_mdio_write(tp, 0x15, 0x0386);
-        rtl8168_mdio_write(tp, 0x19, 0x338d);
-        rtl8168_mdio_write(tp, 0x15, 0x0387);
-        rtl8168_mdio_write(tp, 0x19, 0xd64f);
-        rtl8168_mdio_write(tp, 0x15, 0x0388);
-        rtl8168_mdio_write(tp, 0x19, 0x0080);
-        rtl8168_mdio_write(tp, 0x15, 0x0389);
-        rtl8168_mdio_write(tp, 0x19, 0x820c);
-        rtl8168_mdio_write(tp, 0x15, 0x038a);
-        rtl8168_mdio_write(tp, 0x19, 0xa10b);
-        rtl8168_mdio_write(tp, 0x15, 0x038b);
-        rtl8168_mdio_write(tp, 0x19, 0x9df3);
-        rtl8168_mdio_write(tp, 0x15, 0x038c);
-        rtl8168_mdio_write(tp, 0x19, 0x3395);
-        rtl8168_mdio_write(tp, 0x15, 0x038d);
-        rtl8168_mdio_write(tp, 0x19, 0xd64f);
-        rtl8168_mdio_write(tp, 0x15, 0x038e);
-        rtl8168_mdio_write(tp, 0x19, 0x00f9);
-        rtl8168_mdio_write(tp, 0x15, 0x038f);
-        rtl8168_mdio_write(tp, 0x19, 0xc017);
-        rtl8168_mdio_write(tp, 0x15, 0x0390);
-        rtl8168_mdio_write(tp, 0x19, 0x0005);
-        rtl8168_mdio_write(tp, 0x15, 0x0391);
-        rtl8168_mdio_write(tp, 0x19, 0x6c0b);
-        rtl8168_mdio_write(tp, 0x15, 0x0392);
-        rtl8168_mdio_write(tp, 0x19, 0xa103);
-        rtl8168_mdio_write(tp, 0x15, 0x0393);
-        rtl8168_mdio_write(tp, 0x19, 0x6c08);
-        rtl8168_mdio_write(tp, 0x15, 0x0394);
-        rtl8168_mdio_write(tp, 0x19, 0x9df9);
-        rtl8168_mdio_write(tp, 0x15, 0x0395);
-        rtl8168_mdio_write(tp, 0x19, 0x6c08);
-        rtl8168_mdio_write(tp, 0x15, 0x0396);
-        rtl8168_mdio_write(tp, 0x19, 0x3397);
-        rtl8168_mdio_write(tp, 0x15, 0x0399);
-        rtl8168_mdio_write(tp, 0x19, 0x6810);
-        rtl8168_mdio_write(tp, 0x15, 0x03a4);
-        rtl8168_mdio_write(tp, 0x19, 0x7c08);
-        rtl8168_mdio_write(tp, 0x15, 0x03a5);
-        rtl8168_mdio_write(tp, 0x19, 0x8203);
-        rtl8168_mdio_write(tp, 0x15, 0x03a6);
-        rtl8168_mdio_write(tp, 0x19, 0x4d08);
-        rtl8168_mdio_write(tp, 0x15, 0x03a7);
-        rtl8168_mdio_write(tp, 0x19, 0x33a9);
-        rtl8168_mdio_write(tp, 0x15, 0x03a8);
-        rtl8168_mdio_write(tp, 0x19, 0x4d00);
-        rtl8168_mdio_write(tp, 0x15, 0x03a9);
-        rtl8168_mdio_write(tp, 0x19, 0x9bfa);
-        rtl8168_mdio_write(tp, 0x15, 0x03aa);
-        rtl8168_mdio_write(tp, 0x19, 0x33b6);
-        rtl8168_mdio_write(tp, 0x15, 0x03bb);
-        rtl8168_mdio_write(tp, 0x19, 0x4056);
-        rtl8168_mdio_write(tp, 0x15, 0x03bc);
-        rtl8168_mdio_write(tp, 0x19, 0x44e9);
-        rtl8168_mdio_write(tp, 0x15, 0x03bd);
-        rtl8168_mdio_write(tp, 0x19, 0x405e);
-        rtl8168_mdio_write(tp, 0x15, 0x03be);
-        rtl8168_mdio_write(tp, 0x19, 0x44f8);
-        rtl8168_mdio_write(tp, 0x15, 0x03bf);
-        rtl8168_mdio_write(tp, 0x19, 0xd64f);
-        rtl8168_mdio_write(tp, 0x15, 0x03c0);
-        rtl8168_mdio_write(tp, 0x19, 0x0037);
-        rtl8168_mdio_write(tp, 0x15, 0x03c1);
-        rtl8168_mdio_write(tp, 0x19, 0xbd37);
-        rtl8168_mdio_write(tp, 0x15, 0x03c2);
-        rtl8168_mdio_write(tp, 0x19, 0x9cfd);
-        rtl8168_mdio_write(tp, 0x15, 0x03c3);
-        rtl8168_mdio_write(tp, 0x19, 0xc639);
-        rtl8168_mdio_write(tp, 0x15, 0x03c4);
-        rtl8168_mdio_write(tp, 0x19, 0x0011);
-        rtl8168_mdio_write(tp, 0x15, 0x03c5);
-        rtl8168_mdio_write(tp, 0x19, 0x9b03);
-        rtl8168_mdio_write(tp, 0x15, 0x03c6);
-        rtl8168_mdio_write(tp, 0x19, 0x7c01);
-        rtl8168_mdio_write(tp, 0x15, 0x03c7);
-        rtl8168_mdio_write(tp, 0x19, 0x4c01);
-        rtl8168_mdio_write(tp, 0x15, 0x03c8);
-        rtl8168_mdio_write(tp, 0x19, 0x9e03);
-        rtl8168_mdio_write(tp, 0x15, 0x03c9);
-        rtl8168_mdio_write(tp, 0x19, 0x7c20);
-        rtl8168_mdio_write(tp, 0x15, 0x03ca);
-        rtl8168_mdio_write(tp, 0x19, 0x4c20);
-        rtl8168_mdio_write(tp, 0x15, 0x03cb);
-        rtl8168_mdio_write(tp, 0x19, 0x9af4);
-        rtl8168_mdio_write(tp, 0x15, 0x03cc);
-        rtl8168_mdio_write(tp, 0x19, 0x7c12);
-        rtl8168_mdio_write(tp, 0x15, 0x03cd);
-        rtl8168_mdio_write(tp, 0x19, 0x4c52);
-        rtl8168_mdio_write(tp, 0x15, 0x03ce);
-        rtl8168_mdio_write(tp, 0x19, 0x4470);
-        rtl8168_mdio_write(tp, 0x15, 0x03cf);
-        rtl8168_mdio_write(tp, 0x19, 0x7c12);
-        rtl8168_mdio_write(tp, 0x15, 0x03d0);
-        rtl8168_mdio_write(tp, 0x19, 0x4c40);
-        rtl8168_mdio_write(tp, 0x15, 0x03d1);
-        rtl8168_mdio_write(tp, 0x19, 0x33bf);
-        rtl8168_mdio_write(tp, 0x15, 0x03d6);
-        rtl8168_mdio_write(tp, 0x19, 0x4047);
-        rtl8168_mdio_write(tp, 0x15, 0x03d7);
-        rtl8168_mdio_write(tp, 0x19, 0x4469);
-        rtl8168_mdio_write(tp, 0x15, 0x03d8);
-        rtl8168_mdio_write(tp, 0x19, 0x492b);
-        rtl8168_mdio_write(tp, 0x15, 0x03d9);
-        rtl8168_mdio_write(tp, 0x19, 0x4479);
-        rtl8168_mdio_write(tp, 0x15, 0x03da);
-        rtl8168_mdio_write(tp, 0x19, 0x7c09);
-        rtl8168_mdio_write(tp, 0x15, 0x03db);
-        rtl8168_mdio_write(tp, 0x19, 0x8203);
-        rtl8168_mdio_write(tp, 0x15, 0x03dc);
-        rtl8168_mdio_write(tp, 0x19, 0x4d48);
-        rtl8168_mdio_write(tp, 0x15, 0x03dd);
-        rtl8168_mdio_write(tp, 0x19, 0x33df);
-        rtl8168_mdio_write(tp, 0x15, 0x03de);
-        rtl8168_mdio_write(tp, 0x19, 0x4d40);
-        rtl8168_mdio_write(tp, 0x15, 0x03df);
-        rtl8168_mdio_write(tp, 0x19, 0xd64f);
-        rtl8168_mdio_write(tp, 0x15, 0x03e0);
-        rtl8168_mdio_write(tp, 0x19, 0x0017);
-        rtl8168_mdio_write(tp, 0x15, 0x03e1);
-        rtl8168_mdio_write(tp, 0x19, 0xbd17);
-        rtl8168_mdio_write(tp, 0x15, 0x03e2);
-        rtl8168_mdio_write(tp, 0x19, 0x9b03);
-        rtl8168_mdio_write(tp, 0x15, 0x03e3);
-        rtl8168_mdio_write(tp, 0x19, 0x7c20);
-        rtl8168_mdio_write(tp, 0x15, 0x03e4);
-        rtl8168_mdio_write(tp, 0x19, 0x4c20);
-        rtl8168_mdio_write(tp, 0x15, 0x03e5);
-        rtl8168_mdio_write(tp, 0x19, 0x88f5);
-        rtl8168_mdio_write(tp, 0x15, 0x03e6);
-        rtl8168_mdio_write(tp, 0x19, 0xc428);
-        rtl8168_mdio_write(tp, 0x15, 0x03e7);
-        rtl8168_mdio_write(tp, 0x19, 0x0008);
-        rtl8168_mdio_write(tp, 0x15, 0x03e8);
-        rtl8168_mdio_write(tp, 0x19, 0x9af2);
-        rtl8168_mdio_write(tp, 0x15, 0x03e9);
-        rtl8168_mdio_write(tp, 0x19, 0x7c12);
-        rtl8168_mdio_write(tp, 0x15, 0x03ea);
-        rtl8168_mdio_write(tp, 0x19, 0x4c52);
-        rtl8168_mdio_write(tp, 0x15, 0x03eb);
-        rtl8168_mdio_write(tp, 0x19, 0x4470);
-        rtl8168_mdio_write(tp, 0x15, 0x03ec);
-        rtl8168_mdio_write(tp, 0x19, 0x7c12);
-        rtl8168_mdio_write(tp, 0x15, 0x03ed);
-        rtl8168_mdio_write(tp, 0x19, 0x4c40);
-        rtl8168_mdio_write(tp, 0x15, 0x03ee);
-        rtl8168_mdio_write(tp, 0x19, 0x33da);
-        rtl8168_mdio_write(tp, 0x15, 0x03ef);
-        rtl8168_mdio_write(tp, 0x19, 0x3312);
-        rtl8168_mdio_write(tp, 0x16, 0x0306);
-        rtl8168_mdio_write(tp, 0x16, 0x0300);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x17, 0x2179);
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1e, 0x0040);
-        rtl8168_mdio_write(tp, 0x18, 0x0645);
-        rtl8168_mdio_write(tp, 0x19, 0xe200);
-        rtl8168_mdio_write(tp, 0x18, 0x0655);
-        rtl8168_mdio_write(tp, 0x19, 0x9000);
-        rtl8168_mdio_write(tp, 0x18, 0x0d05);
-        rtl8168_mdio_write(tp, 0x19, 0xbe00);
-        rtl8168_mdio_write(tp, 0x18, 0x0d15);
-        rtl8168_mdio_write(tp, 0x19, 0xd300);
-        rtl8168_mdio_write(tp, 0x18, 0x0d25);
-        rtl8168_mdio_write(tp, 0x19, 0xfe00);
-        rtl8168_mdio_write(tp, 0x18, 0x0d35);
-        rtl8168_mdio_write(tp, 0x19, 0x4000);
-        rtl8168_mdio_write(tp, 0x18, 0x0d45);
-        rtl8168_mdio_write(tp, 0x19, 0x7f00);
-        rtl8168_mdio_write(tp, 0x18, 0x0d55);
-        rtl8168_mdio_write(tp, 0x19, 0x1000);
-        rtl8168_mdio_write(tp, 0x18, 0x0d65);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x18, 0x0d75);
-        rtl8168_mdio_write(tp, 0x19, 0x8200);
-        rtl8168_mdio_write(tp, 0x18, 0x0d85);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x18, 0x0d95);
-        rtl8168_mdio_write(tp, 0x19, 0x7000);
-        rtl8168_mdio_write(tp, 0x18, 0x0da5);
-        rtl8168_mdio_write(tp, 0x19, 0x0f00);
-        rtl8168_mdio_write(tp, 0x18, 0x0db5);
-        rtl8168_mdio_write(tp, 0x19, 0x0100);
-        rtl8168_mdio_write(tp, 0x18, 0x0dc5);
-        rtl8168_mdio_write(tp, 0x19, 0x9b00);
-        rtl8168_mdio_write(tp, 0x18, 0x0dd5);
-        rtl8168_mdio_write(tp, 0x19, 0x7f00);
-        rtl8168_mdio_write(tp, 0x18, 0x0de5);
-        rtl8168_mdio_write(tp, 0x19, 0xe000);
-        rtl8168_mdio_write(tp, 0x18, 0x0df5);
-        rtl8168_mdio_write(tp, 0x19, 0xef00);
-        rtl8168_mdio_write(tp, 0x18, 0x16d5);
-        rtl8168_mdio_write(tp, 0x19, 0xe200);
-        rtl8168_mdio_write(tp, 0x18, 0x16e5);
-        rtl8168_mdio_write(tp, 0x19, 0xab00);
-        rtl8168_mdio_write(tp, 0x18, 0x2904);
-        rtl8168_mdio_write(tp, 0x19, 0x4000);
-        rtl8168_mdio_write(tp, 0x18, 0x2914);
-        rtl8168_mdio_write(tp, 0x19, 0x7f00);
-        rtl8168_mdio_write(tp, 0x18, 0x2924);
-        rtl8168_mdio_write(tp, 0x19, 0x0100);
-        rtl8168_mdio_write(tp, 0x18, 0x2934);
-        rtl8168_mdio_write(tp, 0x19, 0x2000);
-        rtl8168_mdio_write(tp, 0x18, 0x2944);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x18, 0x2954);
-        rtl8168_mdio_write(tp, 0x19, 0x4600);
-        rtl8168_mdio_write(tp, 0x18, 0x2964);
-        rtl8168_mdio_write(tp, 0x19, 0xfc00);
-        rtl8168_mdio_write(tp, 0x18, 0x2974);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x18, 0x2984);
-        rtl8168_mdio_write(tp, 0x19, 0x5000);
-        rtl8168_mdio_write(tp, 0x18, 0x2994);
-        rtl8168_mdio_write(tp, 0x19, 0x9d00);
-        rtl8168_mdio_write(tp, 0x18, 0x29a4);
-        rtl8168_mdio_write(tp, 0x19, 0xff00);
-        rtl8168_mdio_write(tp, 0x18, 0x29b4);
-        rtl8168_mdio_write(tp, 0x19, 0x4000);
-        rtl8168_mdio_write(tp, 0x18, 0x29c4);
-        rtl8168_mdio_write(tp, 0x19, 0x7f00);
-        rtl8168_mdio_write(tp, 0x18, 0x29d4);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x18, 0x29e4);
-        rtl8168_mdio_write(tp, 0x19, 0x2000);
-        rtl8168_mdio_write(tp, 0x18, 0x29f4);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x18, 0x2a04);
-        rtl8168_mdio_write(tp, 0x19, 0xe600);
-        rtl8168_mdio_write(tp, 0x18, 0x2a14);
-        rtl8168_mdio_write(tp, 0x19, 0xff00);
-        rtl8168_mdio_write(tp, 0x18, 0x2a24);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x18, 0x2a34);
-        rtl8168_mdio_write(tp, 0x19, 0x5000);
-        rtl8168_mdio_write(tp, 0x18, 0x2a44);
-        rtl8168_mdio_write(tp, 0x19, 0x8500);
-        rtl8168_mdio_write(tp, 0x18, 0x2a54);
-        rtl8168_mdio_write(tp, 0x19, 0x7f00);
-        rtl8168_mdio_write(tp, 0x18, 0x2a64);
-        rtl8168_mdio_write(tp, 0x19, 0xac00);
-        rtl8168_mdio_write(tp, 0x18, 0x2a74);
-        rtl8168_mdio_write(tp, 0x19, 0x0800);
-        rtl8168_mdio_write(tp, 0x18, 0x2a84);
-        rtl8168_mdio_write(tp, 0x19, 0xfc00);
-        rtl8168_mdio_write(tp, 0x18, 0x2a94);
-        rtl8168_mdio_write(tp, 0x19, 0xe000);
-        rtl8168_mdio_write(tp, 0x18, 0x2aa4);
-        rtl8168_mdio_write(tp, 0x19, 0x7400);
-        rtl8168_mdio_write(tp, 0x18, 0x2ab4);
-        rtl8168_mdio_write(tp, 0x19, 0x4000);
-        rtl8168_mdio_write(tp, 0x18, 0x2ac4);
-        rtl8168_mdio_write(tp, 0x19, 0x7f00);
-        rtl8168_mdio_write(tp, 0x18, 0x2ad4);
-        rtl8168_mdio_write(tp, 0x19, 0x0100);
-        rtl8168_mdio_write(tp, 0x18, 0x2ae4);
-        rtl8168_mdio_write(tp, 0x19, 0xff00);
-        rtl8168_mdio_write(tp, 0x18, 0x2af4);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x18, 0x2b04);
-        rtl8168_mdio_write(tp, 0x19, 0x4400);
-        rtl8168_mdio_write(tp, 0x18, 0x2b14);
-        rtl8168_mdio_write(tp, 0x19, 0xfc00);
-        rtl8168_mdio_write(tp, 0x18, 0x2b24);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x18, 0x2b34);
-        rtl8168_mdio_write(tp, 0x19, 0x4000);
-        rtl8168_mdio_write(tp, 0x18, 0x2b44);
-        rtl8168_mdio_write(tp, 0x19, 0x9d00);
-        rtl8168_mdio_write(tp, 0x18, 0x2b54);
-        rtl8168_mdio_write(tp, 0x19, 0xff00);
-        rtl8168_mdio_write(tp, 0x18, 0x2b64);
-        rtl8168_mdio_write(tp, 0x19, 0x4000);
-        rtl8168_mdio_write(tp, 0x18, 0x2b74);
-        rtl8168_mdio_write(tp, 0x19, 0x7f00);
-        rtl8168_mdio_write(tp, 0x18, 0x2b84);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x18, 0x2b94);
-        rtl8168_mdio_write(tp, 0x19, 0xff00);
-        rtl8168_mdio_write(tp, 0x18, 0x2ba4);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x18, 0x2bb4);
-        rtl8168_mdio_write(tp, 0x19, 0xfc00);
-        rtl8168_mdio_write(tp, 0x18, 0x2bc4);
-        rtl8168_mdio_write(tp, 0x19, 0xff00);
-        rtl8168_mdio_write(tp, 0x18, 0x2bd4);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x18, 0x2be4);
-        rtl8168_mdio_write(tp, 0x19, 0x4000);
-        rtl8168_mdio_write(tp, 0x18, 0x2bf4);
-        rtl8168_mdio_write(tp, 0x19, 0x8900);
-        rtl8168_mdio_write(tp, 0x18, 0x2c04);
-        rtl8168_mdio_write(tp, 0x19, 0x8300);
-        rtl8168_mdio_write(tp, 0x18, 0x2c14);
-        rtl8168_mdio_write(tp, 0x19, 0xe000);
-        rtl8168_mdio_write(tp, 0x18, 0x2c24);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x18, 0x2c34);
-        rtl8168_mdio_write(tp, 0x19, 0xac00);
-        rtl8168_mdio_write(tp, 0x18, 0x2c44);
-        rtl8168_mdio_write(tp, 0x19, 0x0800);
-        rtl8168_mdio_write(tp, 0x18, 0x2c54);
-        rtl8168_mdio_write(tp, 0x19, 0xfa00);
-        rtl8168_mdio_write(tp, 0x18, 0x2c64);
-        rtl8168_mdio_write(tp, 0x19, 0xe100);
-        rtl8168_mdio_write(tp, 0x18, 0x2c74);
-        rtl8168_mdio_write(tp, 0x19, 0x7f00);
-        rtl8168_mdio_write(tp, 0x18, 0x0001);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x17, 0x2100);
-        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-        rtl8168_mdio_write(tp, 0x05, 0xfff6);
-        rtl8168_mdio_write(tp, 0x06, 0x0080);
-        rtl8168_mdio_write(tp, 0x05, 0x8b88);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x05, 0x8000);
-        rtl8168_mdio_write(tp, 0x06, 0xd480);
-        rtl8168_mdio_write(tp, 0x06, 0xc1e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b9a);
-        rtl8168_mdio_write(tp, 0x06, 0xe58b);
-        rtl8168_mdio_write(tp, 0x06, 0x9bee);
-        rtl8168_mdio_write(tp, 0x06, 0x8b83);
-        rtl8168_mdio_write(tp, 0x06, 0x41bf);
-        rtl8168_mdio_write(tp, 0x06, 0x8b88);
-        rtl8168_mdio_write(tp, 0x06, 0xec00);
-        rtl8168_mdio_write(tp, 0x06, 0x19a9);
-        rtl8168_mdio_write(tp, 0x06, 0x8b90);
-        rtl8168_mdio_write(tp, 0x06, 0xf9ee);
-        rtl8168_mdio_write(tp, 0x06, 0xfff6);
-        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-        rtl8168_mdio_write(tp, 0x06, 0xfff7);
-        rtl8168_mdio_write(tp, 0x06, 0xffe0);
-        rtl8168_mdio_write(tp, 0x06, 0xe140);
-        rtl8168_mdio_write(tp, 0x06, 0xe1e1);
-        rtl8168_mdio_write(tp, 0x06, 0x41f7);
-        rtl8168_mdio_write(tp, 0x06, 0x2ff6);
-        rtl8168_mdio_write(tp, 0x06, 0x28e4);
-        rtl8168_mdio_write(tp, 0x06, 0xe140);
-        rtl8168_mdio_write(tp, 0x06, 0xe5e1);
-        rtl8168_mdio_write(tp, 0x06, 0x41f7);
-        rtl8168_mdio_write(tp, 0x06, 0x0002);
-        rtl8168_mdio_write(tp, 0x06, 0x020c);
-        rtl8168_mdio_write(tp, 0x06, 0x0202);
-        rtl8168_mdio_write(tp, 0x06, 0x1d02);
-        rtl8168_mdio_write(tp, 0x06, 0x0230);
-        rtl8168_mdio_write(tp, 0x06, 0x0202);
-        rtl8168_mdio_write(tp, 0x06, 0x4002);
-        rtl8168_mdio_write(tp, 0x06, 0x028b);
-        rtl8168_mdio_write(tp, 0x06, 0x0280);
-        rtl8168_mdio_write(tp, 0x06, 0x6c02);
-        rtl8168_mdio_write(tp, 0x06, 0x8085);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x88e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b89);
-        rtl8168_mdio_write(tp, 0x06, 0x1e01);
-        rtl8168_mdio_write(tp, 0x06, 0xe18b);
-        rtl8168_mdio_write(tp, 0x06, 0x8a1e);
-        rtl8168_mdio_write(tp, 0x06, 0x01e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8b);
-        rtl8168_mdio_write(tp, 0x06, 0x1e01);
-        rtl8168_mdio_write(tp, 0x06, 0xe18b);
-        rtl8168_mdio_write(tp, 0x06, 0x8c1e);
-        rtl8168_mdio_write(tp, 0x06, 0x01e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
-        rtl8168_mdio_write(tp, 0x06, 0x1e01);
-        rtl8168_mdio_write(tp, 0x06, 0xe18b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e1e);
-        rtl8168_mdio_write(tp, 0x06, 0x01a0);
-        rtl8168_mdio_write(tp, 0x06, 0x00c7);
-        rtl8168_mdio_write(tp, 0x06, 0xaec3);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
-        rtl8168_mdio_write(tp, 0x06, 0xad20);
-        rtl8168_mdio_write(tp, 0x06, 0x10ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
-        rtl8168_mdio_write(tp, 0x06, 0x0002);
-        rtl8168_mdio_write(tp, 0x06, 0x1310);
-        rtl8168_mdio_write(tp, 0x06, 0x021f);
-        rtl8168_mdio_write(tp, 0x06, 0x9d02);
-        rtl8168_mdio_write(tp, 0x06, 0x1f0c);
-        rtl8168_mdio_write(tp, 0x06, 0x0227);
-        rtl8168_mdio_write(tp, 0x06, 0x49fc);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ead);
-        rtl8168_mdio_write(tp, 0x06, 0x200b);
-        rtl8168_mdio_write(tp, 0x06, 0xf620);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e02);
-        rtl8168_mdio_write(tp, 0x06, 0x830e);
-        rtl8168_mdio_write(tp, 0x06, 0x021b);
-        rtl8168_mdio_write(tp, 0x06, 0x67ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2211);
-        rtl8168_mdio_write(tp, 0x06, 0xf622);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e02);
-        rtl8168_mdio_write(tp, 0x06, 0x2ba5);
-        rtl8168_mdio_write(tp, 0x06, 0x022a);
-        rtl8168_mdio_write(tp, 0x06, 0x2402);
-        rtl8168_mdio_write(tp, 0x06, 0x80c6);
-        rtl8168_mdio_write(tp, 0x06, 0x022a);
-        rtl8168_mdio_write(tp, 0x06, 0xf0ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2511);
-        rtl8168_mdio_write(tp, 0x06, 0xf625);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e02);
-        rtl8168_mdio_write(tp, 0x06, 0x8226);
-        rtl8168_mdio_write(tp, 0x06, 0x0204);
-        rtl8168_mdio_write(tp, 0x06, 0x0302);
-        rtl8168_mdio_write(tp, 0x06, 0x19cc);
-        rtl8168_mdio_write(tp, 0x06, 0x022b);
-        rtl8168_mdio_write(tp, 0x06, 0x5bfc);
-        rtl8168_mdio_write(tp, 0x06, 0x04ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
-        rtl8168_mdio_write(tp, 0x06, 0x0105);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b83);
-        rtl8168_mdio_write(tp, 0x06, 0xad24);
-        rtl8168_mdio_write(tp, 0x06, 0x44e0);
-        rtl8168_mdio_write(tp, 0x06, 0xe022);
-        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-        rtl8168_mdio_write(tp, 0x06, 0x23ad);
-        rtl8168_mdio_write(tp, 0x06, 0x223b);
-        rtl8168_mdio_write(tp, 0x06, 0xe08a);
-        rtl8168_mdio_write(tp, 0x06, 0xbea0);
-        rtl8168_mdio_write(tp, 0x06, 0x0005);
-        rtl8168_mdio_write(tp, 0x06, 0x0228);
-        rtl8168_mdio_write(tp, 0x06, 0xdeae);
-        rtl8168_mdio_write(tp, 0x06, 0x42a0);
-        rtl8168_mdio_write(tp, 0x06, 0x0105);
-        rtl8168_mdio_write(tp, 0x06, 0x0228);
-        rtl8168_mdio_write(tp, 0x06, 0xf1ae);
-        rtl8168_mdio_write(tp, 0x06, 0x3aa0);
-        rtl8168_mdio_write(tp, 0x06, 0x0205);
-        rtl8168_mdio_write(tp, 0x06, 0x0281);
-        rtl8168_mdio_write(tp, 0x06, 0x25ae);
-        rtl8168_mdio_write(tp, 0x06, 0x32a0);
-        rtl8168_mdio_write(tp, 0x06, 0x0305);
-        rtl8168_mdio_write(tp, 0x06, 0x0229);
-        rtl8168_mdio_write(tp, 0x06, 0x9aae);
-        rtl8168_mdio_write(tp, 0x06, 0x2aa0);
-        rtl8168_mdio_write(tp, 0x06, 0x0405);
-        rtl8168_mdio_write(tp, 0x06, 0x0229);
-        rtl8168_mdio_write(tp, 0x06, 0xaeae);
-        rtl8168_mdio_write(tp, 0x06, 0x22a0);
-        rtl8168_mdio_write(tp, 0x06, 0x0505);
-        rtl8168_mdio_write(tp, 0x06, 0x0229);
-        rtl8168_mdio_write(tp, 0x06, 0xd7ae);
-        rtl8168_mdio_write(tp, 0x06, 0x1aa0);
-        rtl8168_mdio_write(tp, 0x06, 0x0605);
-        rtl8168_mdio_write(tp, 0x06, 0x0229);
-        rtl8168_mdio_write(tp, 0x06, 0xfeae);
-        rtl8168_mdio_write(tp, 0x06, 0x12ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac0);
-        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac1);
-        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac6);
-        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8abe);
-        rtl8168_mdio_write(tp, 0x06, 0x00ae);
-        rtl8168_mdio_write(tp, 0x06, 0x00fc);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0x022a);
-        rtl8168_mdio_write(tp, 0x06, 0x67e0);
-        rtl8168_mdio_write(tp, 0x06, 0xe022);
-        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-        rtl8168_mdio_write(tp, 0x06, 0x230d);
-        rtl8168_mdio_write(tp, 0x06, 0x0658);
-        rtl8168_mdio_write(tp, 0x06, 0x03a0);
-        rtl8168_mdio_write(tp, 0x06, 0x0202);
-        rtl8168_mdio_write(tp, 0x06, 0xae2d);
-        rtl8168_mdio_write(tp, 0x06, 0xa001);
-        rtl8168_mdio_write(tp, 0x06, 0x02ae);
-        rtl8168_mdio_write(tp, 0x06, 0x2da0);
-        rtl8168_mdio_write(tp, 0x06, 0x004d);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e2);
-        rtl8168_mdio_write(tp, 0x06, 0x00e1);
-        rtl8168_mdio_write(tp, 0x06, 0xe201);
-        rtl8168_mdio_write(tp, 0x06, 0xad24);
-        rtl8168_mdio_write(tp, 0x06, 0x44e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac2);
-        rtl8168_mdio_write(tp, 0x06, 0xe48a);
-        rtl8168_mdio_write(tp, 0x06, 0xc4e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac3);
-        rtl8168_mdio_write(tp, 0x06, 0xe48a);
-        rtl8168_mdio_write(tp, 0x06, 0xc5ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8abe);
-        rtl8168_mdio_write(tp, 0x06, 0x03e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b83);
-        rtl8168_mdio_write(tp, 0x06, 0xad25);
-        rtl8168_mdio_write(tp, 0x06, 0x3aee);
-        rtl8168_mdio_write(tp, 0x06, 0x8abe);
-        rtl8168_mdio_write(tp, 0x06, 0x05ae);
-        rtl8168_mdio_write(tp, 0x06, 0x34e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8ace);
-        rtl8168_mdio_write(tp, 0x06, 0xae03);
-        rtl8168_mdio_write(tp, 0x06, 0xe08a);
-        rtl8168_mdio_write(tp, 0x06, 0xcfe1);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac2);
-        rtl8168_mdio_write(tp, 0x06, 0x4905);
-        rtl8168_mdio_write(tp, 0x06, 0xe58a);
-        rtl8168_mdio_write(tp, 0x06, 0xc4e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac3);
-        rtl8168_mdio_write(tp, 0x06, 0x4905);
-        rtl8168_mdio_write(tp, 0x06, 0xe58a);
-        rtl8168_mdio_write(tp, 0x06, 0xc5ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8abe);
-        rtl8168_mdio_write(tp, 0x06, 0x0502);
-        rtl8168_mdio_write(tp, 0x06, 0x2ab6);
-        rtl8168_mdio_write(tp, 0x06, 0xac20);
-        rtl8168_mdio_write(tp, 0x06, 0x1202);
-        rtl8168_mdio_write(tp, 0x06, 0x819b);
-        rtl8168_mdio_write(tp, 0x06, 0xac20);
-        rtl8168_mdio_write(tp, 0x06, 0x0cee);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac1);
-        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac6);
-        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8abe);
-        rtl8168_mdio_write(tp, 0x06, 0x02fc);
-        rtl8168_mdio_write(tp, 0x06, 0x04d0);
-        rtl8168_mdio_write(tp, 0x06, 0x0002);
-        rtl8168_mdio_write(tp, 0x06, 0x81ad);
-        rtl8168_mdio_write(tp, 0x06, 0x590f);
-        rtl8168_mdio_write(tp, 0x06, 0x3902);
-        rtl8168_mdio_write(tp, 0x06, 0xaa04);
-        rtl8168_mdio_write(tp, 0x06, 0xd001);
-        rtl8168_mdio_write(tp, 0x06, 0xae02);
-        rtl8168_mdio_write(tp, 0x06, 0xd000);
-        rtl8168_mdio_write(tp, 0x06, 0x04f9);
-        rtl8168_mdio_write(tp, 0x06, 0xfae2);
-        rtl8168_mdio_write(tp, 0x06, 0xe2d2);
-        rtl8168_mdio_write(tp, 0x06, 0xe3e2);
-        rtl8168_mdio_write(tp, 0x06, 0xd3f9);
-        rtl8168_mdio_write(tp, 0x06, 0x5af7);
-        rtl8168_mdio_write(tp, 0x06, 0xe6e2);
-        rtl8168_mdio_write(tp, 0x06, 0xd2e7);
-        rtl8168_mdio_write(tp, 0x06, 0xe2d3);
-        rtl8168_mdio_write(tp, 0x06, 0xe2e0);
-        rtl8168_mdio_write(tp, 0x06, 0x2ce3);
-        rtl8168_mdio_write(tp, 0x06, 0xe02d);
-        rtl8168_mdio_write(tp, 0x06, 0xf95b);
-        rtl8168_mdio_write(tp, 0x06, 0xe01e);
-        rtl8168_mdio_write(tp, 0x06, 0x30e6);
-        rtl8168_mdio_write(tp, 0x06, 0xe02c);
-        rtl8168_mdio_write(tp, 0x06, 0xe7e0);
-        rtl8168_mdio_write(tp, 0x06, 0x2de2);
-        rtl8168_mdio_write(tp, 0x06, 0xe2cc);
-        rtl8168_mdio_write(tp, 0x06, 0xe3e2);
-        rtl8168_mdio_write(tp, 0x06, 0xcdf9);
-        rtl8168_mdio_write(tp, 0x06, 0x5a0f);
-        rtl8168_mdio_write(tp, 0x06, 0x6a50);
-        rtl8168_mdio_write(tp, 0x06, 0xe6e2);
-        rtl8168_mdio_write(tp, 0x06, 0xcce7);
-        rtl8168_mdio_write(tp, 0x06, 0xe2cd);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-        rtl8168_mdio_write(tp, 0x06, 0x3ce1);
-        rtl8168_mdio_write(tp, 0x06, 0xe03d);
-        rtl8168_mdio_write(tp, 0x06, 0xef64);
-        rtl8168_mdio_write(tp, 0x06, 0xfde0);
-        rtl8168_mdio_write(tp, 0x06, 0xe2cc);
-        rtl8168_mdio_write(tp, 0x06, 0xe1e2);
-        rtl8168_mdio_write(tp, 0x06, 0xcd58);
-        rtl8168_mdio_write(tp, 0x06, 0x0f5a);
-        rtl8168_mdio_write(tp, 0x06, 0xf01e);
-        rtl8168_mdio_write(tp, 0x06, 0x02e4);
-        rtl8168_mdio_write(tp, 0x06, 0xe2cc);
-        rtl8168_mdio_write(tp, 0x06, 0xe5e2);
-        rtl8168_mdio_write(tp, 0x06, 0xcdfd);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-        rtl8168_mdio_write(tp, 0x06, 0x2ce1);
-        rtl8168_mdio_write(tp, 0x06, 0xe02d);
-        rtl8168_mdio_write(tp, 0x06, 0x59e0);
-        rtl8168_mdio_write(tp, 0x06, 0x5b1f);
-        rtl8168_mdio_write(tp, 0x06, 0x1e13);
-        rtl8168_mdio_write(tp, 0x06, 0xe4e0);
-        rtl8168_mdio_write(tp, 0x06, 0x2ce5);
-        rtl8168_mdio_write(tp, 0x06, 0xe02d);
-        rtl8168_mdio_write(tp, 0x06, 0xfde0);
-        rtl8168_mdio_write(tp, 0x06, 0xe2d2);
-        rtl8168_mdio_write(tp, 0x06, 0xe1e2);
-        rtl8168_mdio_write(tp, 0x06, 0xd358);
-        rtl8168_mdio_write(tp, 0x06, 0xf75a);
-        rtl8168_mdio_write(tp, 0x06, 0x081e);
-        rtl8168_mdio_write(tp, 0x06, 0x02e4);
-        rtl8168_mdio_write(tp, 0x06, 0xe2d2);
-        rtl8168_mdio_write(tp, 0x06, 0xe5e2);
-        rtl8168_mdio_write(tp, 0x06, 0xd3ef);
-        rtl8168_mdio_write(tp, 0x06, 0x46fe);
-        rtl8168_mdio_write(tp, 0x06, 0xfd04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8f9);
-        rtl8168_mdio_write(tp, 0x06, 0xfaef);
-        rtl8168_mdio_write(tp, 0x06, 0x69e0);
-        rtl8168_mdio_write(tp, 0x06, 0xe022);
-        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-        rtl8168_mdio_write(tp, 0x06, 0x2358);
-        rtl8168_mdio_write(tp, 0x06, 0xc4e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b6e);
-        rtl8168_mdio_write(tp, 0x06, 0x1f10);
-        rtl8168_mdio_write(tp, 0x06, 0x9e58);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x6ead);
-        rtl8168_mdio_write(tp, 0x06, 0x2222);
-        rtl8168_mdio_write(tp, 0x06, 0xac27);
-        rtl8168_mdio_write(tp, 0x06, 0x55ac);
-        rtl8168_mdio_write(tp, 0x06, 0x2602);
-        rtl8168_mdio_write(tp, 0x06, 0xae1a);
-        rtl8168_mdio_write(tp, 0x06, 0xd106);
-        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
-        rtl8168_mdio_write(tp, 0x06, 0xba02);
-        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
-        rtl8168_mdio_write(tp, 0x06, 0xd107);
-        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
-        rtl8168_mdio_write(tp, 0x06, 0xbd02);
-        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
-        rtl8168_mdio_write(tp, 0x06, 0xd107);
-        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
-        rtl8168_mdio_write(tp, 0x06, 0xc002);
-        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
-        rtl8168_mdio_write(tp, 0x06, 0xae30);
-        rtl8168_mdio_write(tp, 0x06, 0xd103);
-        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
-        rtl8168_mdio_write(tp, 0x06, 0xc302);
-        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
-        rtl8168_mdio_write(tp, 0x06, 0xd100);
-        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
-        rtl8168_mdio_write(tp, 0x06, 0xc602);
-        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
-        rtl8168_mdio_write(tp, 0x06, 0xd100);
-        rtl8168_mdio_write(tp, 0x06, 0xbf82);
-        rtl8168_mdio_write(tp, 0x06, 0xca02);
-        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
-        rtl8168_mdio_write(tp, 0x06, 0xd10f);
-        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
-        rtl8168_mdio_write(tp, 0x06, 0xba02);
-        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
-        rtl8168_mdio_write(tp, 0x06, 0xd101);
-        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
-        rtl8168_mdio_write(tp, 0x06, 0xbd02);
-        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
-        rtl8168_mdio_write(tp, 0x06, 0xd101);
-        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
-        rtl8168_mdio_write(tp, 0x06, 0xc002);
-        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
-        rtl8168_mdio_write(tp, 0x06, 0xef96);
-        rtl8168_mdio_write(tp, 0x06, 0xfefd);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xd100);
-        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
-        rtl8168_mdio_write(tp, 0x06, 0xc302);
-        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
-        rtl8168_mdio_write(tp, 0x06, 0xd011);
-        rtl8168_mdio_write(tp, 0x06, 0x022b);
-        rtl8168_mdio_write(tp, 0x06, 0xfb59);
-        rtl8168_mdio_write(tp, 0x06, 0x03ef);
-        rtl8168_mdio_write(tp, 0x06, 0x01d1);
-        rtl8168_mdio_write(tp, 0x06, 0x00a0);
-        rtl8168_mdio_write(tp, 0x06, 0x0002);
-        rtl8168_mdio_write(tp, 0x06, 0xd101);
-        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
-        rtl8168_mdio_write(tp, 0x06, 0xc602);
-        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
-        rtl8168_mdio_write(tp, 0x06, 0xd111);
-        rtl8168_mdio_write(tp, 0x06, 0xad20);
-        rtl8168_mdio_write(tp, 0x06, 0x020c);
-        rtl8168_mdio_write(tp, 0x06, 0x11ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2102);
-        rtl8168_mdio_write(tp, 0x06, 0x0c12);
-        rtl8168_mdio_write(tp, 0x06, 0xbf82);
-        rtl8168_mdio_write(tp, 0x06, 0xca02);
-        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
-        rtl8168_mdio_write(tp, 0x06, 0xaec8);
-        rtl8168_mdio_write(tp, 0x06, 0x70e4);
-        rtl8168_mdio_write(tp, 0x06, 0x2602);
-        rtl8168_mdio_write(tp, 0x06, 0x82d1);
-        rtl8168_mdio_write(tp, 0x06, 0x05f8);
-        rtl8168_mdio_write(tp, 0x06, 0xfaef);
-        rtl8168_mdio_write(tp, 0x06, 0x69e0);
-        rtl8168_mdio_write(tp, 0x06, 0xe2fe);
-        rtl8168_mdio_write(tp, 0x06, 0xe1e2);
-        rtl8168_mdio_write(tp, 0x06, 0xffad);
-        rtl8168_mdio_write(tp, 0x06, 0x2d1a);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e1);
-        rtl8168_mdio_write(tp, 0x06, 0x4ee1);
-        rtl8168_mdio_write(tp, 0x06, 0xe14f);
-        rtl8168_mdio_write(tp, 0x06, 0xac2d);
-        rtl8168_mdio_write(tp, 0x06, 0x22f6);
-        rtl8168_mdio_write(tp, 0x06, 0x0302);
-        rtl8168_mdio_write(tp, 0x06, 0x033b);
-        rtl8168_mdio_write(tp, 0x06, 0xf703);
-        rtl8168_mdio_write(tp, 0x06, 0xf706);
-        rtl8168_mdio_write(tp, 0x06, 0xbf84);
-        rtl8168_mdio_write(tp, 0x06, 0x4402);
-        rtl8168_mdio_write(tp, 0x06, 0x2d21);
-        rtl8168_mdio_write(tp, 0x06, 0xae11);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e1);
-        rtl8168_mdio_write(tp, 0x06, 0x4ee1);
-        rtl8168_mdio_write(tp, 0x06, 0xe14f);
-        rtl8168_mdio_write(tp, 0x06, 0xad2d);
-        rtl8168_mdio_write(tp, 0x06, 0x08bf);
-        rtl8168_mdio_write(tp, 0x06, 0x844f);
-        rtl8168_mdio_write(tp, 0x06, 0x022d);
-        rtl8168_mdio_write(tp, 0x06, 0x21f6);
-        rtl8168_mdio_write(tp, 0x06, 0x06ef);
-        rtl8168_mdio_write(tp, 0x06, 0x96fe);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8fa);
-        rtl8168_mdio_write(tp, 0x06, 0xef69);
-        rtl8168_mdio_write(tp, 0x06, 0x0283);
-        rtl8168_mdio_write(tp, 0x06, 0x4502);
-        rtl8168_mdio_write(tp, 0x06, 0x83a2);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-        rtl8168_mdio_write(tp, 0x06, 0x00e1);
-        rtl8168_mdio_write(tp, 0x06, 0xe001);
-        rtl8168_mdio_write(tp, 0x06, 0xad27);
-        rtl8168_mdio_write(tp, 0x06, 0x1fd1);
-        rtl8168_mdio_write(tp, 0x06, 0x01bf);
-        rtl8168_mdio_write(tp, 0x06, 0x843b);
-        rtl8168_mdio_write(tp, 0x06, 0x022d);
-        rtl8168_mdio_write(tp, 0x06, 0xc1e0);
-        rtl8168_mdio_write(tp, 0x06, 0xe020);
-        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-        rtl8168_mdio_write(tp, 0x06, 0x21ad);
-        rtl8168_mdio_write(tp, 0x06, 0x200e);
-        rtl8168_mdio_write(tp, 0x06, 0xd100);
-        rtl8168_mdio_write(tp, 0x06, 0xbf84);
-        rtl8168_mdio_write(tp, 0x06, 0x3b02);
-        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
-        rtl8168_mdio_write(tp, 0x06, 0xbf3b);
-        rtl8168_mdio_write(tp, 0x06, 0x9602);
-        rtl8168_mdio_write(tp, 0x06, 0x2d21);
-        rtl8168_mdio_write(tp, 0x06, 0xef96);
-        rtl8168_mdio_write(tp, 0x06, 0xfefc);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xf9fa);
-        rtl8168_mdio_write(tp, 0x06, 0xef69);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x87ad);
-        rtl8168_mdio_write(tp, 0x06, 0x204c);
-        rtl8168_mdio_write(tp, 0x06, 0xd200);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e2);
-        rtl8168_mdio_write(tp, 0x06, 0x0058);
-        rtl8168_mdio_write(tp, 0x06, 0x010c);
-        rtl8168_mdio_write(tp, 0x06, 0x021e);
-        rtl8168_mdio_write(tp, 0x06, 0x20e0);
-        rtl8168_mdio_write(tp, 0x06, 0xe000);
-        rtl8168_mdio_write(tp, 0x06, 0x5810);
-        rtl8168_mdio_write(tp, 0x06, 0x1e20);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-        rtl8168_mdio_write(tp, 0x06, 0x3658);
-        rtl8168_mdio_write(tp, 0x06, 0x031e);
-        rtl8168_mdio_write(tp, 0x06, 0x20e0);
-        rtl8168_mdio_write(tp, 0x06, 0xe022);
-        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-        rtl8168_mdio_write(tp, 0x06, 0x2358);
-        rtl8168_mdio_write(tp, 0x06, 0xe01e);
-        rtl8168_mdio_write(tp, 0x06, 0x20e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b64);
-        rtl8168_mdio_write(tp, 0x06, 0x1f02);
-        rtl8168_mdio_write(tp, 0x06, 0x9e22);
-        rtl8168_mdio_write(tp, 0x06, 0xe68b);
-        rtl8168_mdio_write(tp, 0x06, 0x64ad);
-        rtl8168_mdio_write(tp, 0x06, 0x3214);
-        rtl8168_mdio_write(tp, 0x06, 0xad34);
-        rtl8168_mdio_write(tp, 0x06, 0x11ef);
-        rtl8168_mdio_write(tp, 0x06, 0x0258);
-        rtl8168_mdio_write(tp, 0x06, 0x039e);
-        rtl8168_mdio_write(tp, 0x06, 0x07ad);
-        rtl8168_mdio_write(tp, 0x06, 0x3508);
-        rtl8168_mdio_write(tp, 0x06, 0x5ac0);
-        rtl8168_mdio_write(tp, 0x06, 0x9f04);
-        rtl8168_mdio_write(tp, 0x06, 0xd101);
-        rtl8168_mdio_write(tp, 0x06, 0xae02);
-        rtl8168_mdio_write(tp, 0x06, 0xd100);
-        rtl8168_mdio_write(tp, 0x06, 0xbf84);
-        rtl8168_mdio_write(tp, 0x06, 0x3e02);
-        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
-        rtl8168_mdio_write(tp, 0x06, 0xef96);
-        rtl8168_mdio_write(tp, 0x06, 0xfefd);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8f9);
-        rtl8168_mdio_write(tp, 0x06, 0xfbe0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b85);
-        rtl8168_mdio_write(tp, 0x06, 0xad25);
-        rtl8168_mdio_write(tp, 0x06, 0x22e0);
-        rtl8168_mdio_write(tp, 0x06, 0xe022);
-        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-        rtl8168_mdio_write(tp, 0x06, 0x23e2);
-        rtl8168_mdio_write(tp, 0x06, 0xe036);
-        rtl8168_mdio_write(tp, 0x06, 0xe3e0);
-        rtl8168_mdio_write(tp, 0x06, 0x375a);
-        rtl8168_mdio_write(tp, 0x06, 0xc40d);
-        rtl8168_mdio_write(tp, 0x06, 0x0158);
-        rtl8168_mdio_write(tp, 0x06, 0x021e);
-        rtl8168_mdio_write(tp, 0x06, 0x20e3);
-        rtl8168_mdio_write(tp, 0x06, 0x8ae7);
-        rtl8168_mdio_write(tp, 0x06, 0xac31);
-        rtl8168_mdio_write(tp, 0x06, 0x60ac);
-        rtl8168_mdio_write(tp, 0x06, 0x3a08);
-        rtl8168_mdio_write(tp, 0x06, 0xac3e);
-        rtl8168_mdio_write(tp, 0x06, 0x26ae);
-        rtl8168_mdio_write(tp, 0x06, 0x67af);
-        rtl8168_mdio_write(tp, 0x06, 0x8437);
-        rtl8168_mdio_write(tp, 0x06, 0xad37);
-        rtl8168_mdio_write(tp, 0x06, 0x61e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8ae8);
-        rtl8168_mdio_write(tp, 0x06, 0x10e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8ae8);
-        rtl8168_mdio_write(tp, 0x06, 0xe18a);
-        rtl8168_mdio_write(tp, 0x06, 0xe91b);
-        rtl8168_mdio_write(tp, 0x06, 0x109e);
-        rtl8168_mdio_write(tp, 0x06, 0x02ae);
-        rtl8168_mdio_write(tp, 0x06, 0x51d1);
-        rtl8168_mdio_write(tp, 0x06, 0x00bf);
-        rtl8168_mdio_write(tp, 0x06, 0x8441);
-        rtl8168_mdio_write(tp, 0x06, 0x022d);
-        rtl8168_mdio_write(tp, 0x06, 0xc1ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8ae8);
-        rtl8168_mdio_write(tp, 0x06, 0x00ae);
-        rtl8168_mdio_write(tp, 0x06, 0x43ad);
-        rtl8168_mdio_write(tp, 0x06, 0x3627);
-        rtl8168_mdio_write(tp, 0x06, 0xe08a);
-        rtl8168_mdio_write(tp, 0x06, 0xeee1);
-        rtl8168_mdio_write(tp, 0x06, 0x8aef);
-        rtl8168_mdio_write(tp, 0x06, 0xef74);
-        rtl8168_mdio_write(tp, 0x06, 0xe08a);
-        rtl8168_mdio_write(tp, 0x06, 0xeae1);
-        rtl8168_mdio_write(tp, 0x06, 0x8aeb);
-        rtl8168_mdio_write(tp, 0x06, 0x1b74);
-        rtl8168_mdio_write(tp, 0x06, 0x9e2e);
-        rtl8168_mdio_write(tp, 0x06, 0x14e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8aea);
-        rtl8168_mdio_write(tp, 0x06, 0xe58a);
-        rtl8168_mdio_write(tp, 0x06, 0xebef);
-        rtl8168_mdio_write(tp, 0x06, 0x74e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8aee);
-        rtl8168_mdio_write(tp, 0x06, 0xe18a);
-        rtl8168_mdio_write(tp, 0x06, 0xef1b);
-        rtl8168_mdio_write(tp, 0x06, 0x479e);
-        rtl8168_mdio_write(tp, 0x06, 0x0fae);
-        rtl8168_mdio_write(tp, 0x06, 0x19ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8aea);
-        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8aeb);
-        rtl8168_mdio_write(tp, 0x06, 0x00ae);
-        rtl8168_mdio_write(tp, 0x06, 0x0fac);
-        rtl8168_mdio_write(tp, 0x06, 0x390c);
-        rtl8168_mdio_write(tp, 0x06, 0xd101);
-        rtl8168_mdio_write(tp, 0x06, 0xbf84);
-        rtl8168_mdio_write(tp, 0x06, 0x4102);
-        rtl8168_mdio_write(tp, 0x06, 0x2dc1);
-        rtl8168_mdio_write(tp, 0x06, 0xee8a);
-        rtl8168_mdio_write(tp, 0x06, 0xe800);
-        rtl8168_mdio_write(tp, 0x06, 0xe68a);
-        rtl8168_mdio_write(tp, 0x06, 0xe7ff);
-        rtl8168_mdio_write(tp, 0x06, 0xfdfc);
-        rtl8168_mdio_write(tp, 0x06, 0x0400);
-        rtl8168_mdio_write(tp, 0x06, 0xe234);
-        rtl8168_mdio_write(tp, 0x06, 0xcce2);
-        rtl8168_mdio_write(tp, 0x06, 0x0088);
-        rtl8168_mdio_write(tp, 0x06, 0xe200);
-        rtl8168_mdio_write(tp, 0x06, 0xa725);
-        rtl8168_mdio_write(tp, 0x06, 0xe50a);
-        rtl8168_mdio_write(tp, 0x06, 0x1de5);
-        rtl8168_mdio_write(tp, 0x06, 0x0a2c);
-        rtl8168_mdio_write(tp, 0x06, 0xe50a);
-        rtl8168_mdio_write(tp, 0x06, 0x6de5);
-        rtl8168_mdio_write(tp, 0x06, 0x0a1d);
-        rtl8168_mdio_write(tp, 0x06, 0xe50a);
-        rtl8168_mdio_write(tp, 0x06, 0x1ce5);
-        rtl8168_mdio_write(tp, 0x06, 0x0a2d);
-        rtl8168_mdio_write(tp, 0x06, 0xa755);
-        rtl8168_mdio_write(tp, 0x05, 0x8b64);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x05, 0x8b94);
-        rtl8168_mdio_write(tp, 0x06, 0x82cd);
-        rtl8168_mdio_write(tp, 0x05, 0x8b85);
-        rtl8168_mdio_write(tp, 0x06, 0x2000);
-        rtl8168_mdio_write(tp, 0x05, 0x8aee);
-        rtl8168_mdio_write(tp, 0x06, 0x03b8);
-        rtl8168_mdio_write(tp, 0x05, 0x8ae8);
-        rtl8168_mdio_write(tp, 0x06, 0x0002);
-        gphy_val = rtl8168_mdio_read(tp, 0x01);
-        gphy_val |= BIT_0;
-        rtl8168_mdio_write(tp, 0x01, gphy_val);
-        gphy_val = rtl8168_mdio_read(tp, 0x00);
-        gphy_val |= BIT_0;
-        rtl8168_mdio_write(tp, 0x00, gphy_val);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-        for (i = 0; i < 200; i++) {
-                udelay(100);
-                gphy_val = rtl8168_mdio_read(tp, 0x00);
-                if (gphy_val & BIT_7)
-                        break;
-        }
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1e, 0x0023);
-        gphy_val = rtl8168_mdio_read(tp, 0x17);
-        gphy_val &= ~(BIT_0);
-        if (tp->RequiredSecLanDonglePatch)
-                gphy_val &= ~(BIT_2);
-        rtl8168_mdio_write(tp, 0x17, gphy_val);
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1e, 0x0028);
-        rtl8168_mdio_write(tp, 0x15, 0x0010);
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1e, 0x0041);
-        rtl8168_mdio_write(tp, 0x15, 0x0802);
-        rtl8168_mdio_write(tp, 0x16, 0x2185);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-}
-
-static void
-rtl8168_set_phy_mcu_8168e_2(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        unsigned int gphy_val,i;
-
-        if (rtl8168_efuse_read(tp, 0x22) == 0x0c) {
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                rtl8168_mdio_write(tp, 0x00, 0x1800);
-                rtl8168_mdio_write(tp, 0x1f, 0x0007);
-                rtl8168_mdio_write(tp, 0x1e, 0x0023);
-                rtl8168_mdio_write(tp, 0x17, 0x0117);
-                rtl8168_mdio_write(tp, 0x1f, 0x0007);
-                rtl8168_mdio_write(tp, 0x1E, 0x002C);
-                rtl8168_mdio_write(tp, 0x1B, 0x5000);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                rtl8168_mdio_write(tp, 0x16, 0x4104);
-                for (i = 0; i < 200; i++) {
-                        udelay(100);
-                        gphy_val = rtl8168_mdio_read(tp, 0x1E);
-                        gphy_val &= 0x03FF;
-                        if (gphy_val==0x000C)
-                                break;
-                }
-                rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                for (i = 0; i < 200; i++) {
-                        udelay(100);
-                        gphy_val = rtl8168_mdio_read(tp, 0x07);
-                        if ((gphy_val & BIT_5) == 0)
-                                break;
-                }
-                gphy_val = rtl8168_mdio_read(tp, 0x07);
-                if (gphy_val & BIT_5) {
-                        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-                        rtl8168_mdio_write(tp, 0x1e, 0x00a1);
-                        rtl8168_mdio_write(tp, 0x17, 0x1000);
-                        rtl8168_mdio_write(tp, 0x17, 0x0000);
-                        rtl8168_mdio_write(tp, 0x17, 0x2000);
-                        rtl8168_mdio_write(tp, 0x1e, 0x002f);
-                        rtl8168_mdio_write(tp, 0x18, 0x9bfb);
-                        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                        rtl8168_mdio_write(tp, 0x07, 0x0000);
-                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                }
-                rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0xfff6);
-                rtl8168_mdio_write(tp, 0x06, 0x0080);
-                gphy_val = rtl8168_mdio_read(tp, 0x00);
-                gphy_val &= ~(BIT_7);
-                rtl8168_mdio_write(tp, 0x00, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0002);
-                gphy_val = rtl8168_mdio_read(tp, 0x08);
-                gphy_val &= ~(BIT_7);
-                rtl8168_mdio_write(tp, 0x08, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0007);
-                rtl8168_mdio_write(tp, 0x1e, 0x0023);
-                rtl8168_mdio_write(tp, 0x16, 0x0306);
-                rtl8168_mdio_write(tp, 0x16, 0x0307);
-                rtl8168_mdio_write(tp, 0x15, 0x000e);
-                rtl8168_mdio_write(tp, 0x19, 0x000a);
-                rtl8168_mdio_write(tp, 0x15, 0x0010);
-                rtl8168_mdio_write(tp, 0x19, 0x0008);
-                rtl8168_mdio_write(tp, 0x15, 0x0018);
-                rtl8168_mdio_write(tp, 0x19, 0x4801);
-                rtl8168_mdio_write(tp, 0x15, 0x0019);
-                rtl8168_mdio_write(tp, 0x19, 0x6801);
-                rtl8168_mdio_write(tp, 0x15, 0x001a);
-                rtl8168_mdio_write(tp, 0x19, 0x66a1);
-                rtl8168_mdio_write(tp, 0x15, 0x001f);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0020);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0021);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0022);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0023);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0024);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0025);
-                rtl8168_mdio_write(tp, 0x19, 0x64a1);
-                rtl8168_mdio_write(tp, 0x15, 0x0026);
-                rtl8168_mdio_write(tp, 0x19, 0x40ea);
-                rtl8168_mdio_write(tp, 0x15, 0x0027);
-                rtl8168_mdio_write(tp, 0x19, 0x4503);
-                rtl8168_mdio_write(tp, 0x15, 0x0028);
-                rtl8168_mdio_write(tp, 0x19, 0x9f00);
-                rtl8168_mdio_write(tp, 0x15, 0x0029);
-                rtl8168_mdio_write(tp, 0x19, 0xa631);
-                rtl8168_mdio_write(tp, 0x15, 0x002a);
-                rtl8168_mdio_write(tp, 0x19, 0x9717);
-                rtl8168_mdio_write(tp, 0x15, 0x002b);
-                rtl8168_mdio_write(tp, 0x19, 0x302c);
-                rtl8168_mdio_write(tp, 0x15, 0x002c);
-                rtl8168_mdio_write(tp, 0x19, 0x4802);
-                rtl8168_mdio_write(tp, 0x15, 0x002d);
-                rtl8168_mdio_write(tp, 0x19, 0x58da);
-                rtl8168_mdio_write(tp, 0x15, 0x002e);
-                rtl8168_mdio_write(tp, 0x19, 0x400d);
-                rtl8168_mdio_write(tp, 0x15, 0x002f);
-                rtl8168_mdio_write(tp, 0x19, 0x4488);
-                rtl8168_mdio_write(tp, 0x15, 0x0030);
-                rtl8168_mdio_write(tp, 0x19, 0x9e00);
-                rtl8168_mdio_write(tp, 0x15, 0x0031);
-                rtl8168_mdio_write(tp, 0x19, 0x63c8);
-                rtl8168_mdio_write(tp, 0x15, 0x0032);
-                rtl8168_mdio_write(tp, 0x19, 0x6481);
-                rtl8168_mdio_write(tp, 0x15, 0x0033);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0034);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0035);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0036);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0037);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0038);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0039);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x003a);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x003b);
-                rtl8168_mdio_write(tp, 0x19, 0x63e8);
-                rtl8168_mdio_write(tp, 0x15, 0x003c);
-                rtl8168_mdio_write(tp, 0x19, 0x7d00);
-                rtl8168_mdio_write(tp, 0x15, 0x003d);
-                rtl8168_mdio_write(tp, 0x19, 0x59d4);
-                rtl8168_mdio_write(tp, 0x15, 0x003e);
-                rtl8168_mdio_write(tp, 0x19, 0x63f8);
-                rtl8168_mdio_write(tp, 0x15, 0x0040);
-                rtl8168_mdio_write(tp, 0x19, 0x64a1);
-                rtl8168_mdio_write(tp, 0x15, 0x0041);
-                rtl8168_mdio_write(tp, 0x19, 0x30de);
-                rtl8168_mdio_write(tp, 0x15, 0x0044);
-                rtl8168_mdio_write(tp, 0x19, 0x480f);
-                rtl8168_mdio_write(tp, 0x15, 0x0045);
-                rtl8168_mdio_write(tp, 0x19, 0x6800);
-                rtl8168_mdio_write(tp, 0x15, 0x0046);
-                rtl8168_mdio_write(tp, 0x19, 0x6680);
-                rtl8168_mdio_write(tp, 0x15, 0x0047);
-                rtl8168_mdio_write(tp, 0x19, 0x7c10);
-                rtl8168_mdio_write(tp, 0x15, 0x0048);
-                rtl8168_mdio_write(tp, 0x19, 0x63c8);
-                rtl8168_mdio_write(tp, 0x15, 0x0049);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x004a);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x004b);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x004c);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x004d);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x004e);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x004f);
-                rtl8168_mdio_write(tp, 0x19, 0x40ea);
-                rtl8168_mdio_write(tp, 0x15, 0x0050);
-                rtl8168_mdio_write(tp, 0x19, 0x4503);
-                rtl8168_mdio_write(tp, 0x15, 0x0051);
-                rtl8168_mdio_write(tp, 0x19, 0x58ca);
-                rtl8168_mdio_write(tp, 0x15, 0x0052);
-                rtl8168_mdio_write(tp, 0x19, 0x63c8);
-                rtl8168_mdio_write(tp, 0x15, 0x0053);
-                rtl8168_mdio_write(tp, 0x19, 0x63d8);
-                rtl8168_mdio_write(tp, 0x15, 0x0054);
-                rtl8168_mdio_write(tp, 0x19, 0x66a0);
-                rtl8168_mdio_write(tp, 0x15, 0x0055);
-                rtl8168_mdio_write(tp, 0x19, 0x9f00);
-                rtl8168_mdio_write(tp, 0x15, 0x0056);
-                rtl8168_mdio_write(tp, 0x19, 0x3000);
-                rtl8168_mdio_write(tp, 0x15, 0x00a1);
-                rtl8168_mdio_write(tp, 0x19, 0x3044);
-                rtl8168_mdio_write(tp, 0x15, 0x00ab);
-                rtl8168_mdio_write(tp, 0x19, 0x5820);
-                rtl8168_mdio_write(tp, 0x15, 0x00ac);
-                rtl8168_mdio_write(tp, 0x19, 0x5e04);
-                rtl8168_mdio_write(tp, 0x15, 0x00ad);
-                rtl8168_mdio_write(tp, 0x19, 0xb60c);
-                rtl8168_mdio_write(tp, 0x15, 0x00af);
-                rtl8168_mdio_write(tp, 0x19, 0x000a);
-                rtl8168_mdio_write(tp, 0x15, 0x00b2);
-                rtl8168_mdio_write(tp, 0x19, 0x30b9);
-                rtl8168_mdio_write(tp, 0x15, 0x00b9);
-                rtl8168_mdio_write(tp, 0x19, 0x4408);
-                rtl8168_mdio_write(tp, 0x15, 0x00ba);
-                rtl8168_mdio_write(tp, 0x19, 0x480b);
-                rtl8168_mdio_write(tp, 0x15, 0x00bb);
-                rtl8168_mdio_write(tp, 0x19, 0x5e00);
-                rtl8168_mdio_write(tp, 0x15, 0x00bc);
-                rtl8168_mdio_write(tp, 0x19, 0x405f);
-                rtl8168_mdio_write(tp, 0x15, 0x00bd);
-                rtl8168_mdio_write(tp, 0x19, 0x4448);
-                rtl8168_mdio_write(tp, 0x15, 0x00be);
-                rtl8168_mdio_write(tp, 0x19, 0x4020);
-                rtl8168_mdio_write(tp, 0x15, 0x00bf);
-                rtl8168_mdio_write(tp, 0x19, 0x4468);
-                rtl8168_mdio_write(tp, 0x15, 0x00c0);
-                rtl8168_mdio_write(tp, 0x19, 0x9c02);
-                rtl8168_mdio_write(tp, 0x15, 0x00c1);
-                rtl8168_mdio_write(tp, 0x19, 0x58a0);
-                rtl8168_mdio_write(tp, 0x15, 0x00c2);
-                rtl8168_mdio_write(tp, 0x19, 0xb605);
-                rtl8168_mdio_write(tp, 0x15, 0x00c3);
-                rtl8168_mdio_write(tp, 0x19, 0xc0d3);
-                rtl8168_mdio_write(tp, 0x15, 0x00c4);
-                rtl8168_mdio_write(tp, 0x19, 0x00e6);
-                rtl8168_mdio_write(tp, 0x15, 0x00c5);
-                rtl8168_mdio_write(tp, 0x19, 0xdaec);
-                rtl8168_mdio_write(tp, 0x15, 0x00c6);
-                rtl8168_mdio_write(tp, 0x19, 0x00fa);
-                rtl8168_mdio_write(tp, 0x15, 0x00c7);
-                rtl8168_mdio_write(tp, 0x19, 0x9df9);
-                rtl8168_mdio_write(tp, 0x15, 0x0112);
-                rtl8168_mdio_write(tp, 0x19, 0x6421);
-                rtl8168_mdio_write(tp, 0x15, 0x0113);
-                rtl8168_mdio_write(tp, 0x19, 0x7c08);
-                rtl8168_mdio_write(tp, 0x15, 0x0114);
-                rtl8168_mdio_write(tp, 0x19, 0x63f0);
-                rtl8168_mdio_write(tp, 0x15, 0x0115);
-                rtl8168_mdio_write(tp, 0x19, 0x4003);
-                rtl8168_mdio_write(tp, 0x15, 0x0116);
-                rtl8168_mdio_write(tp, 0x19, 0x4418);
-                rtl8168_mdio_write(tp, 0x15, 0x0117);
-                rtl8168_mdio_write(tp, 0x19, 0x9b00);
-                rtl8168_mdio_write(tp, 0x15, 0x0118);
-                rtl8168_mdio_write(tp, 0x19, 0x6461);
-                rtl8168_mdio_write(tp, 0x15, 0x0119);
-                rtl8168_mdio_write(tp, 0x19, 0x64e1);
-                rtl8168_mdio_write(tp, 0x15, 0x011a);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0150);
-                rtl8168_mdio_write(tp, 0x19, 0x7c80);
-                rtl8168_mdio_write(tp, 0x15, 0x0151);
-                rtl8168_mdio_write(tp, 0x19, 0x6461);
-                rtl8168_mdio_write(tp, 0x15, 0x0152);
-                rtl8168_mdio_write(tp, 0x19, 0x4003);
-                rtl8168_mdio_write(tp, 0x15, 0x0153);
-                rtl8168_mdio_write(tp, 0x19, 0x4540);
-                rtl8168_mdio_write(tp, 0x15, 0x0154);
-                rtl8168_mdio_write(tp, 0x19, 0x9f00);
-                rtl8168_mdio_write(tp, 0x15, 0x0155);
-                rtl8168_mdio_write(tp, 0x19, 0x9d00);
-                rtl8168_mdio_write(tp, 0x15, 0x0156);
-                rtl8168_mdio_write(tp, 0x19, 0x7c40);
-                rtl8168_mdio_write(tp, 0x15, 0x0157);
-                rtl8168_mdio_write(tp, 0x19, 0x6421);
-                rtl8168_mdio_write(tp, 0x15, 0x0158);
-                rtl8168_mdio_write(tp, 0x19, 0x7c80);
-                rtl8168_mdio_write(tp, 0x15, 0x0159);
-                rtl8168_mdio_write(tp, 0x19, 0x64a1);
-                rtl8168_mdio_write(tp, 0x15, 0x015a);
-                rtl8168_mdio_write(tp, 0x19, 0x30fe);
-                rtl8168_mdio_write(tp, 0x15, 0x029c);
-                rtl8168_mdio_write(tp, 0x19, 0x0070);
-                rtl8168_mdio_write(tp, 0x15, 0x02b2);
-                rtl8168_mdio_write(tp, 0x19, 0x005a);
-                rtl8168_mdio_write(tp, 0x15, 0x02bd);
-                rtl8168_mdio_write(tp, 0x19, 0xa522);
-                rtl8168_mdio_write(tp, 0x15, 0x02ce);
-                rtl8168_mdio_write(tp, 0x19, 0xb63e);
-                rtl8168_mdio_write(tp, 0x15, 0x02d9);
-                rtl8168_mdio_write(tp, 0x19, 0x32df);
-                rtl8168_mdio_write(tp, 0x15, 0x02df);
-                rtl8168_mdio_write(tp, 0x19, 0x4500);
-                rtl8168_mdio_write(tp, 0x15, 0x02e7);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x02f4);
-                rtl8168_mdio_write(tp, 0x19, 0xb618);
-                rtl8168_mdio_write(tp, 0x15, 0x02fb);
-                rtl8168_mdio_write(tp, 0x19, 0xb900);
-                rtl8168_mdio_write(tp, 0x15, 0x02fc);
-                rtl8168_mdio_write(tp, 0x19, 0x49b5);
-                rtl8168_mdio_write(tp, 0x15, 0x02fd);
-                rtl8168_mdio_write(tp, 0x19, 0x6812);
-                rtl8168_mdio_write(tp, 0x15, 0x02fe);
-                rtl8168_mdio_write(tp, 0x19, 0x66a0);
-                rtl8168_mdio_write(tp, 0x15, 0x02ff);
-                rtl8168_mdio_write(tp, 0x19, 0x9900);
-                rtl8168_mdio_write(tp, 0x15, 0x0300);
-                rtl8168_mdio_write(tp, 0x19, 0x64a0);
-                rtl8168_mdio_write(tp, 0x15, 0x0301);
-                rtl8168_mdio_write(tp, 0x19, 0x3316);
-                rtl8168_mdio_write(tp, 0x15, 0x0308);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x030c);
-                rtl8168_mdio_write(tp, 0x19, 0x3000);
-                rtl8168_mdio_write(tp, 0x15, 0x0312);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0313);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0314);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0315);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0316);
-                rtl8168_mdio_write(tp, 0x19, 0x49b5);
-                rtl8168_mdio_write(tp, 0x15, 0x0317);
-                rtl8168_mdio_write(tp, 0x19, 0x7d00);
-                rtl8168_mdio_write(tp, 0x15, 0x0318);
-                rtl8168_mdio_write(tp, 0x19, 0x4d00);
-                rtl8168_mdio_write(tp, 0x15, 0x0319);
-                rtl8168_mdio_write(tp, 0x19, 0x6810);
-                rtl8168_mdio_write(tp, 0x15, 0x031a);
-                rtl8168_mdio_write(tp, 0x19, 0x6c08);
-                rtl8168_mdio_write(tp, 0x15, 0x031b);
-                rtl8168_mdio_write(tp, 0x19, 0x4925);
-                rtl8168_mdio_write(tp, 0x15, 0x031c);
-                rtl8168_mdio_write(tp, 0x19, 0x403b);
-                rtl8168_mdio_write(tp, 0x15, 0x031d);
-                rtl8168_mdio_write(tp, 0x19, 0xa602);
-                rtl8168_mdio_write(tp, 0x15, 0x031e);
-                rtl8168_mdio_write(tp, 0x19, 0x402f);
-                rtl8168_mdio_write(tp, 0x15, 0x031f);
-                rtl8168_mdio_write(tp, 0x19, 0x4484);
-                rtl8168_mdio_write(tp, 0x15, 0x0320);
-                rtl8168_mdio_write(tp, 0x19, 0x40c8);
-                rtl8168_mdio_write(tp, 0x15, 0x0321);
-                rtl8168_mdio_write(tp, 0x19, 0x44c4);
-                rtl8168_mdio_write(tp, 0x15, 0x0322);
-                rtl8168_mdio_write(tp, 0x19, 0x404f);
-                rtl8168_mdio_write(tp, 0x15, 0x0323);
-                rtl8168_mdio_write(tp, 0x19, 0x44c8);
-                rtl8168_mdio_write(tp, 0x15, 0x0324);
-                rtl8168_mdio_write(tp, 0x19, 0xd64f);
-                rtl8168_mdio_write(tp, 0x15, 0x0325);
-                rtl8168_mdio_write(tp, 0x19, 0x00e7);
-                rtl8168_mdio_write(tp, 0x15, 0x0326);
-                rtl8168_mdio_write(tp, 0x19, 0x7c08);
-                rtl8168_mdio_write(tp, 0x15, 0x0327);
-                rtl8168_mdio_write(tp, 0x19, 0x8203);
-                rtl8168_mdio_write(tp, 0x15, 0x0328);
-                rtl8168_mdio_write(tp, 0x19, 0x4d48);
-                rtl8168_mdio_write(tp, 0x15, 0x0329);
-                rtl8168_mdio_write(tp, 0x19, 0x332b);
-                rtl8168_mdio_write(tp, 0x15, 0x032a);
-                rtl8168_mdio_write(tp, 0x19, 0x4d40);
-                rtl8168_mdio_write(tp, 0x15, 0x032c);
-                rtl8168_mdio_write(tp, 0x19, 0x00f8);
-                rtl8168_mdio_write(tp, 0x15, 0x032d);
-                rtl8168_mdio_write(tp, 0x19, 0x82b2);
-                rtl8168_mdio_write(tp, 0x15, 0x032f);
-                rtl8168_mdio_write(tp, 0x19, 0x00b0);
-                rtl8168_mdio_write(tp, 0x15, 0x0332);
-                rtl8168_mdio_write(tp, 0x19, 0x91f2);
-                rtl8168_mdio_write(tp, 0x15, 0x033f);
-                rtl8168_mdio_write(tp, 0x19, 0xb6cd);
-                rtl8168_mdio_write(tp, 0x15, 0x0340);
-                rtl8168_mdio_write(tp, 0x19, 0x9e01);
-                rtl8168_mdio_write(tp, 0x15, 0x0341);
-                rtl8168_mdio_write(tp, 0x19, 0xd11d);
-                rtl8168_mdio_write(tp, 0x15, 0x0342);
-                rtl8168_mdio_write(tp, 0x19, 0x009d);
-                rtl8168_mdio_write(tp, 0x15, 0x0343);
-                rtl8168_mdio_write(tp, 0x19, 0xbb1c);
-                rtl8168_mdio_write(tp, 0x15, 0x0344);
-                rtl8168_mdio_write(tp, 0x19, 0x8102);
-                rtl8168_mdio_write(tp, 0x15, 0x0345);
-                rtl8168_mdio_write(tp, 0x19, 0x3348);
-                rtl8168_mdio_write(tp, 0x15, 0x0346);
-                rtl8168_mdio_write(tp, 0x19, 0xa231);
-                rtl8168_mdio_write(tp, 0x15, 0x0347);
-                rtl8168_mdio_write(tp, 0x19, 0x335b);
-                rtl8168_mdio_write(tp, 0x15, 0x0348);
-                rtl8168_mdio_write(tp, 0x19, 0x91f7);
-                rtl8168_mdio_write(tp, 0x15, 0x0349);
-                rtl8168_mdio_write(tp, 0x19, 0xc218);
-                rtl8168_mdio_write(tp, 0x15, 0x034a);
-                rtl8168_mdio_write(tp, 0x19, 0x00f5);
-                rtl8168_mdio_write(tp, 0x15, 0x034b);
-                rtl8168_mdio_write(tp, 0x19, 0x335b);
-                rtl8168_mdio_write(tp, 0x15, 0x034c);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x034d);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x034e);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x034f);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0350);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x035b);
-                rtl8168_mdio_write(tp, 0x19, 0xa23c);
-                rtl8168_mdio_write(tp, 0x15, 0x035c);
-                rtl8168_mdio_write(tp, 0x19, 0x7c08);
-                rtl8168_mdio_write(tp, 0x15, 0x035d);
-                rtl8168_mdio_write(tp, 0x19, 0x4c00);
-                rtl8168_mdio_write(tp, 0x15, 0x035e);
-                rtl8168_mdio_write(tp, 0x19, 0x3397);
-                rtl8168_mdio_write(tp, 0x15, 0x0363);
-                rtl8168_mdio_write(tp, 0x19, 0xb6a9);
-                rtl8168_mdio_write(tp, 0x15, 0x0366);
-                rtl8168_mdio_write(tp, 0x19, 0x00f5);
-                rtl8168_mdio_write(tp, 0x15, 0x0382);
-                rtl8168_mdio_write(tp, 0x19, 0x7c40);
-                rtl8168_mdio_write(tp, 0x15, 0x0388);
-                rtl8168_mdio_write(tp, 0x19, 0x0084);
-                rtl8168_mdio_write(tp, 0x15, 0x0389);
-                rtl8168_mdio_write(tp, 0x19, 0xdd17);
-                rtl8168_mdio_write(tp, 0x15, 0x038a);
-                rtl8168_mdio_write(tp, 0x19, 0x000b);
-                rtl8168_mdio_write(tp, 0x15, 0x038b);
-                rtl8168_mdio_write(tp, 0x19, 0xa10a);
-                rtl8168_mdio_write(tp, 0x15, 0x038c);
-                rtl8168_mdio_write(tp, 0x19, 0x337e);
-                rtl8168_mdio_write(tp, 0x15, 0x038d);
-                rtl8168_mdio_write(tp, 0x19, 0x6c0b);
-                rtl8168_mdio_write(tp, 0x15, 0x038e);
-                rtl8168_mdio_write(tp, 0x19, 0xa107);
-                rtl8168_mdio_write(tp, 0x15, 0x038f);
-                rtl8168_mdio_write(tp, 0x19, 0x6c08);
-                rtl8168_mdio_write(tp, 0x15, 0x0390);
-                rtl8168_mdio_write(tp, 0x19, 0xc017);
-                rtl8168_mdio_write(tp, 0x15, 0x0391);
-                rtl8168_mdio_write(tp, 0x19, 0x0004);
-                rtl8168_mdio_write(tp, 0x15, 0x0392);
-                rtl8168_mdio_write(tp, 0x19, 0xd64f);
-                rtl8168_mdio_write(tp, 0x15, 0x0393);
-                rtl8168_mdio_write(tp, 0x19, 0x00f4);
-                rtl8168_mdio_write(tp, 0x15, 0x0397);
-                rtl8168_mdio_write(tp, 0x19, 0x4098);
-                rtl8168_mdio_write(tp, 0x15, 0x0398);
-                rtl8168_mdio_write(tp, 0x19, 0x4408);
-                rtl8168_mdio_write(tp, 0x15, 0x0399);
-                rtl8168_mdio_write(tp, 0x19, 0x55bf);
-                rtl8168_mdio_write(tp, 0x15, 0x039a);
-                rtl8168_mdio_write(tp, 0x19, 0x4bb9);
-                rtl8168_mdio_write(tp, 0x15, 0x039b);
-                rtl8168_mdio_write(tp, 0x19, 0x6810);
-                rtl8168_mdio_write(tp, 0x15, 0x039c);
-                rtl8168_mdio_write(tp, 0x19, 0x4b29);
-                rtl8168_mdio_write(tp, 0x15, 0x039d);
-                rtl8168_mdio_write(tp, 0x19, 0x4041);
-                rtl8168_mdio_write(tp, 0x15, 0x039e);
-                rtl8168_mdio_write(tp, 0x19, 0x442a);
-                rtl8168_mdio_write(tp, 0x15, 0x039f);
-                rtl8168_mdio_write(tp, 0x19, 0x4029);
-                rtl8168_mdio_write(tp, 0x15, 0x03aa);
-                rtl8168_mdio_write(tp, 0x19, 0x33b8);
-                rtl8168_mdio_write(tp, 0x15, 0x03b6);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03b7);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03b8);
-                rtl8168_mdio_write(tp, 0x19, 0x543f);
-                rtl8168_mdio_write(tp, 0x15, 0x03b9);
-                rtl8168_mdio_write(tp, 0x19, 0x499a);
-                rtl8168_mdio_write(tp, 0x15, 0x03ba);
-                rtl8168_mdio_write(tp, 0x19, 0x7c40);
-                rtl8168_mdio_write(tp, 0x15, 0x03bb);
-                rtl8168_mdio_write(tp, 0x19, 0x4c40);
-                rtl8168_mdio_write(tp, 0x15, 0x03bc);
-                rtl8168_mdio_write(tp, 0x19, 0x490a);
-                rtl8168_mdio_write(tp, 0x15, 0x03bd);
-                rtl8168_mdio_write(tp, 0x19, 0x405e);
-                rtl8168_mdio_write(tp, 0x15, 0x03c2);
-                rtl8168_mdio_write(tp, 0x19, 0x9a03);
-                rtl8168_mdio_write(tp, 0x15, 0x03c4);
-                rtl8168_mdio_write(tp, 0x19, 0x0015);
-                rtl8168_mdio_write(tp, 0x15, 0x03c5);
-                rtl8168_mdio_write(tp, 0x19, 0x9e03);
-                rtl8168_mdio_write(tp, 0x15, 0x03c8);
-                rtl8168_mdio_write(tp, 0x19, 0x9cf7);
-                rtl8168_mdio_write(tp, 0x15, 0x03c9);
-                rtl8168_mdio_write(tp, 0x19, 0x7c12);
-                rtl8168_mdio_write(tp, 0x15, 0x03ca);
-                rtl8168_mdio_write(tp, 0x19, 0x4c52);
-                rtl8168_mdio_write(tp, 0x15, 0x03cb);
-                rtl8168_mdio_write(tp, 0x19, 0x4458);
-                rtl8168_mdio_write(tp, 0x15, 0x03cd);
-                rtl8168_mdio_write(tp, 0x19, 0x4c40);
-                rtl8168_mdio_write(tp, 0x15, 0x03ce);
-                rtl8168_mdio_write(tp, 0x19, 0x33bf);
-                rtl8168_mdio_write(tp, 0x15, 0x03cf);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03d0);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03d1);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03d5);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03d6);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03d7);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03d8);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03d9);
-                rtl8168_mdio_write(tp, 0x19, 0x49bb);
-                rtl8168_mdio_write(tp, 0x15, 0x03da);
-                rtl8168_mdio_write(tp, 0x19, 0x4478);
-                rtl8168_mdio_write(tp, 0x15, 0x03db);
-                rtl8168_mdio_write(tp, 0x19, 0x492b);
-                rtl8168_mdio_write(tp, 0x15, 0x03dc);
-                rtl8168_mdio_write(tp, 0x19, 0x7c01);
-                rtl8168_mdio_write(tp, 0x15, 0x03dd);
-                rtl8168_mdio_write(tp, 0x19, 0x4c00);
-                rtl8168_mdio_write(tp, 0x15, 0x03de);
-                rtl8168_mdio_write(tp, 0x19, 0xbd1a);
-                rtl8168_mdio_write(tp, 0x15, 0x03df);
-                rtl8168_mdio_write(tp, 0x19, 0xc428);
-                rtl8168_mdio_write(tp, 0x15, 0x03e0);
-                rtl8168_mdio_write(tp, 0x19, 0x0008);
-                rtl8168_mdio_write(tp, 0x15, 0x03e1);
-                rtl8168_mdio_write(tp, 0x19, 0x9cfd);
-                rtl8168_mdio_write(tp, 0x15, 0x03e2);
-                rtl8168_mdio_write(tp, 0x19, 0x7c12);
-                rtl8168_mdio_write(tp, 0x15, 0x03e3);
-                rtl8168_mdio_write(tp, 0x19, 0x4c52);
-                rtl8168_mdio_write(tp, 0x15, 0x03e4);
-                rtl8168_mdio_write(tp, 0x19, 0x4458);
-                rtl8168_mdio_write(tp, 0x15, 0x03e5);
-                rtl8168_mdio_write(tp, 0x19, 0x7c12);
-                rtl8168_mdio_write(tp, 0x15, 0x03e6);
-                rtl8168_mdio_write(tp, 0x19, 0x4c40);
-                rtl8168_mdio_write(tp, 0x15, 0x03e7);
-                rtl8168_mdio_write(tp, 0x19, 0x33de);
-                rtl8168_mdio_write(tp, 0x15, 0x03e8);
-                rtl8168_mdio_write(tp, 0x19, 0xc218);
-                rtl8168_mdio_write(tp, 0x15, 0x03e9);
-                rtl8168_mdio_write(tp, 0x19, 0x0002);
-                rtl8168_mdio_write(tp, 0x15, 0x03ea);
-                rtl8168_mdio_write(tp, 0x19, 0x32df);
-                rtl8168_mdio_write(tp, 0x15, 0x03eb);
-                rtl8168_mdio_write(tp, 0x19, 0x3316);
-                rtl8168_mdio_write(tp, 0x15, 0x03ec);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03ed);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03ee);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03ef);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03f7);
-                rtl8168_mdio_write(tp, 0x19, 0x330c);
-                rtl8168_mdio_write(tp, 0x16, 0x0306);
-                rtl8168_mdio_write(tp, 0x16, 0x0300);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0xfff6);
-                rtl8168_mdio_write(tp, 0x06, 0x0080);
-                rtl8168_mdio_write(tp, 0x05, 0x8000);
-                rtl8168_mdio_write(tp, 0x06, 0x0280);
-                rtl8168_mdio_write(tp, 0x06, 0x48f7);
-                rtl8168_mdio_write(tp, 0x06, 0x00e0);
-                rtl8168_mdio_write(tp, 0x06, 0xfff7);
-                rtl8168_mdio_write(tp, 0x06, 0xa080);
-                rtl8168_mdio_write(tp, 0x06, 0x02ae);
-                rtl8168_mdio_write(tp, 0x06, 0xf602);
-                rtl8168_mdio_write(tp, 0x06, 0x0200);
-                rtl8168_mdio_write(tp, 0x06, 0x0280);
-                rtl8168_mdio_write(tp, 0x06, 0x9002);
-                rtl8168_mdio_write(tp, 0x06, 0x0224);
-                rtl8168_mdio_write(tp, 0x06, 0x0202);
-                rtl8168_mdio_write(tp, 0x06, 0x3402);
-                rtl8168_mdio_write(tp, 0x06, 0x027f);
-                rtl8168_mdio_write(tp, 0x06, 0x0280);
-                rtl8168_mdio_write(tp, 0x06, 0xa602);
-                rtl8168_mdio_write(tp, 0x06, 0x80bf);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x88e1);
-                rtl8168_mdio_write(tp, 0x06, 0x8b89);
-                rtl8168_mdio_write(tp, 0x06, 0x1e01);
-                rtl8168_mdio_write(tp, 0x06, 0xe18b);
-                rtl8168_mdio_write(tp, 0x06, 0x8a1e);
-                rtl8168_mdio_write(tp, 0x06, 0x01e1);
-                rtl8168_mdio_write(tp, 0x06, 0x8b8b);
-                rtl8168_mdio_write(tp, 0x06, 0x1e01);
-                rtl8168_mdio_write(tp, 0x06, 0xe18b);
-                rtl8168_mdio_write(tp, 0x06, 0x8c1e);
-                rtl8168_mdio_write(tp, 0x06, 0x01e1);
-                rtl8168_mdio_write(tp, 0x06, 0x8b8d);
-                rtl8168_mdio_write(tp, 0x06, 0x1e01);
-                rtl8168_mdio_write(tp, 0x06, 0xe18b);
-                rtl8168_mdio_write(tp, 0x06, 0x8e1e);
-                rtl8168_mdio_write(tp, 0x06, 0x01a0);
-                rtl8168_mdio_write(tp, 0x06, 0x00c7);
-                rtl8168_mdio_write(tp, 0x06, 0xaebb);
-                rtl8168_mdio_write(tp, 0x06, 0xee8a);
-                rtl8168_mdio_write(tp, 0x06, 0xe600);
-                rtl8168_mdio_write(tp, 0x06, 0xee8a);
-                rtl8168_mdio_write(tp, 0x06, 0xee03);
-                rtl8168_mdio_write(tp, 0x06, 0xee8a);
-                rtl8168_mdio_write(tp, 0x06, 0xefb8);
-                rtl8168_mdio_write(tp, 0x06, 0xee8a);
-                rtl8168_mdio_write(tp, 0x06, 0xe902);
-                rtl8168_mdio_write(tp, 0x06, 0xee8b);
-                rtl8168_mdio_write(tp, 0x06, 0x8285);
-                rtl8168_mdio_write(tp, 0x06, 0xee8b);
-                rtl8168_mdio_write(tp, 0x06, 0x8520);
-                rtl8168_mdio_write(tp, 0x06, 0xee8b);
-                rtl8168_mdio_write(tp, 0x06, 0x8701);
-                rtl8168_mdio_write(tp, 0x06, 0xd481);
-                rtl8168_mdio_write(tp, 0x06, 0x35e4);
-                rtl8168_mdio_write(tp, 0x06, 0x8b94);
-                rtl8168_mdio_write(tp, 0x06, 0xe58b);
-                rtl8168_mdio_write(tp, 0x06, 0x95bf);
-                rtl8168_mdio_write(tp, 0x06, 0x8b88);
-                rtl8168_mdio_write(tp, 0x06, 0xec00);
-                rtl8168_mdio_write(tp, 0x06, 0x19a9);
-                rtl8168_mdio_write(tp, 0x06, 0x8b90);
-                rtl8168_mdio_write(tp, 0x06, 0xf9ee);
-                rtl8168_mdio_write(tp, 0x06, 0xfff6);
-                rtl8168_mdio_write(tp, 0x06, 0x00ee);
-                rtl8168_mdio_write(tp, 0x06, 0xfff7);
-                rtl8168_mdio_write(tp, 0x06, 0xffe0);
-                rtl8168_mdio_write(tp, 0x06, 0xe140);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e1);
-                rtl8168_mdio_write(tp, 0x06, 0x41f7);
-                rtl8168_mdio_write(tp, 0x06, 0x2ff6);
-                rtl8168_mdio_write(tp, 0x06, 0x28e4);
-                rtl8168_mdio_write(tp, 0x06, 0xe140);
-                rtl8168_mdio_write(tp, 0x06, 0xe5e1);
-                rtl8168_mdio_write(tp, 0x06, 0x4104);
-                rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b89);
-                rtl8168_mdio_write(tp, 0x06, 0xad20);
-                rtl8168_mdio_write(tp, 0x06, 0x0dee);
-                rtl8168_mdio_write(tp, 0x06, 0x8b89);
-                rtl8168_mdio_write(tp, 0x06, 0x0002);
-                rtl8168_mdio_write(tp, 0x06, 0x82f4);
-                rtl8168_mdio_write(tp, 0x06, 0x021f);
-                rtl8168_mdio_write(tp, 0x06, 0x4102);
-                rtl8168_mdio_write(tp, 0x06, 0x2812);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b8d);
-                rtl8168_mdio_write(tp, 0x06, 0xad20);
-                rtl8168_mdio_write(tp, 0x06, 0x10ee);
-                rtl8168_mdio_write(tp, 0x06, 0x8b8d);
-                rtl8168_mdio_write(tp, 0x06, 0x0002);
-                rtl8168_mdio_write(tp, 0x06, 0x139d);
-                rtl8168_mdio_write(tp, 0x06, 0x0281);
-                rtl8168_mdio_write(tp, 0x06, 0xd602);
-                rtl8168_mdio_write(tp, 0x06, 0x1f99);
-                rtl8168_mdio_write(tp, 0x06, 0x0227);
-                rtl8168_mdio_write(tp, 0x06, 0xeafc);
-                rtl8168_mdio_write(tp, 0x06, 0x04f8);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x8ead);
-                rtl8168_mdio_write(tp, 0x06, 0x2014);
-                rtl8168_mdio_write(tp, 0x06, 0xf620);
-                rtl8168_mdio_write(tp, 0x06, 0xe48b);
-                rtl8168_mdio_write(tp, 0x06, 0x8e02);
-                rtl8168_mdio_write(tp, 0x06, 0x8104);
-                rtl8168_mdio_write(tp, 0x06, 0x021b);
-                rtl8168_mdio_write(tp, 0x06, 0xf402);
-                rtl8168_mdio_write(tp, 0x06, 0x2c9c);
-                rtl8168_mdio_write(tp, 0x06, 0x0281);
-                rtl8168_mdio_write(tp, 0x06, 0x7902);
-                rtl8168_mdio_write(tp, 0x06, 0x8443);
-                rtl8168_mdio_write(tp, 0x06, 0xad22);
-                rtl8168_mdio_write(tp, 0x06, 0x11f6);
-                rtl8168_mdio_write(tp, 0x06, 0x22e4);
-                rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-                rtl8168_mdio_write(tp, 0x06, 0x022c);
-                rtl8168_mdio_write(tp, 0x06, 0x4602);
-                rtl8168_mdio_write(tp, 0x06, 0x2ac5);
-                rtl8168_mdio_write(tp, 0x06, 0x0229);
-                rtl8168_mdio_write(tp, 0x06, 0x2002);
-                rtl8168_mdio_write(tp, 0x06, 0x2b91);
-                rtl8168_mdio_write(tp, 0x06, 0xad25);
-                rtl8168_mdio_write(tp, 0x06, 0x11f6);
-                rtl8168_mdio_write(tp, 0x06, 0x25e4);
-                rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-                rtl8168_mdio_write(tp, 0x06, 0x0284);
-                rtl8168_mdio_write(tp, 0x06, 0xe202);
-                rtl8168_mdio_write(tp, 0x06, 0x043a);
-                rtl8168_mdio_write(tp, 0x06, 0x021a);
-                rtl8168_mdio_write(tp, 0x06, 0x5902);
-                rtl8168_mdio_write(tp, 0x06, 0x2bfc);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xf8fa);
-                rtl8168_mdio_write(tp, 0x06, 0xef69);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-                rtl8168_mdio_write(tp, 0x06, 0x00e1);
-                rtl8168_mdio_write(tp, 0x06, 0xe001);
-                rtl8168_mdio_write(tp, 0x06, 0xad27);
-                rtl8168_mdio_write(tp, 0x06, 0x1fd1);
-                rtl8168_mdio_write(tp, 0x06, 0x01bf);
-                rtl8168_mdio_write(tp, 0x06, 0x8638);
-                rtl8168_mdio_write(tp, 0x06, 0x022f);
-                rtl8168_mdio_write(tp, 0x06, 0x50e0);
-                rtl8168_mdio_write(tp, 0x06, 0xe020);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-                rtl8168_mdio_write(tp, 0x06, 0x21ad);
-                rtl8168_mdio_write(tp, 0x06, 0x200e);
-                rtl8168_mdio_write(tp, 0x06, 0xd100);
-                rtl8168_mdio_write(tp, 0x06, 0xbf86);
-                rtl8168_mdio_write(tp, 0x06, 0x3802);
-                rtl8168_mdio_write(tp, 0x06, 0x2f50);
-                rtl8168_mdio_write(tp, 0x06, 0xbf3d);
-                rtl8168_mdio_write(tp, 0x06, 0x3902);
-                rtl8168_mdio_write(tp, 0x06, 0x2eb0);
-                rtl8168_mdio_write(tp, 0x06, 0xef96);
-                rtl8168_mdio_write(tp, 0x06, 0xfefc);
-                rtl8168_mdio_write(tp, 0x06, 0x0402);
-                rtl8168_mdio_write(tp, 0x06, 0x8591);
-                rtl8168_mdio_write(tp, 0x06, 0x0281);
-                rtl8168_mdio_write(tp, 0x06, 0x3c05);
-                rtl8168_mdio_write(tp, 0x06, 0xf8fa);
-                rtl8168_mdio_write(tp, 0x06, 0xef69);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
-                rtl8168_mdio_write(tp, 0x06, 0xfee1);
-                rtl8168_mdio_write(tp, 0x06, 0xe2ff);
-                rtl8168_mdio_write(tp, 0x06, 0xad2d);
-                rtl8168_mdio_write(tp, 0x06, 0x1ae0);
-                rtl8168_mdio_write(tp, 0x06, 0xe14e);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e1);
-                rtl8168_mdio_write(tp, 0x06, 0x4fac);
-                rtl8168_mdio_write(tp, 0x06, 0x2d22);
-                rtl8168_mdio_write(tp, 0x06, 0xf603);
-                rtl8168_mdio_write(tp, 0x06, 0x0203);
-                rtl8168_mdio_write(tp, 0x06, 0x36f7);
-                rtl8168_mdio_write(tp, 0x06, 0x03f7);
-                rtl8168_mdio_write(tp, 0x06, 0x06bf);
-                rtl8168_mdio_write(tp, 0x06, 0x8622);
-                rtl8168_mdio_write(tp, 0x06, 0x022e);
-                rtl8168_mdio_write(tp, 0x06, 0xb0ae);
-                rtl8168_mdio_write(tp, 0x06, 0x11e0);
-                rtl8168_mdio_write(tp, 0x06, 0xe14e);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e1);
-                rtl8168_mdio_write(tp, 0x06, 0x4fad);
-                rtl8168_mdio_write(tp, 0x06, 0x2d08);
-                rtl8168_mdio_write(tp, 0x06, 0xbf86);
-                rtl8168_mdio_write(tp, 0x06, 0x2d02);
-                rtl8168_mdio_write(tp, 0x06, 0x2eb0);
-                rtl8168_mdio_write(tp, 0x06, 0xf606);
-                rtl8168_mdio_write(tp, 0x06, 0xef96);
-                rtl8168_mdio_write(tp, 0x06, 0xfefc);
-                rtl8168_mdio_write(tp, 0x06, 0x04f8);
-                rtl8168_mdio_write(tp, 0x06, 0xf9fa);
-                rtl8168_mdio_write(tp, 0x06, 0xef69);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x87ad);
-                rtl8168_mdio_write(tp, 0x06, 0x204c);
-                rtl8168_mdio_write(tp, 0x06, 0xd200);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
-                rtl8168_mdio_write(tp, 0x06, 0x0058);
-                rtl8168_mdio_write(tp, 0x06, 0x010c);
-                rtl8168_mdio_write(tp, 0x06, 0x021e);
-                rtl8168_mdio_write(tp, 0x06, 0x20e0);
-                rtl8168_mdio_write(tp, 0x06, 0xe000);
-                rtl8168_mdio_write(tp, 0x06, 0x5810);
-                rtl8168_mdio_write(tp, 0x06, 0x1e20);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-                rtl8168_mdio_write(tp, 0x06, 0x3658);
-                rtl8168_mdio_write(tp, 0x06, 0x031e);
-                rtl8168_mdio_write(tp, 0x06, 0x20e0);
-                rtl8168_mdio_write(tp, 0x06, 0xe022);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-                rtl8168_mdio_write(tp, 0x06, 0x2358);
-                rtl8168_mdio_write(tp, 0x06, 0xe01e);
-                rtl8168_mdio_write(tp, 0x06, 0x20e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8ae6);
-                rtl8168_mdio_write(tp, 0x06, 0x1f02);
-                rtl8168_mdio_write(tp, 0x06, 0x9e22);
-                rtl8168_mdio_write(tp, 0x06, 0xe68a);
-                rtl8168_mdio_write(tp, 0x06, 0xe6ad);
-                rtl8168_mdio_write(tp, 0x06, 0x3214);
-                rtl8168_mdio_write(tp, 0x06, 0xad34);
-                rtl8168_mdio_write(tp, 0x06, 0x11ef);
-                rtl8168_mdio_write(tp, 0x06, 0x0258);
-                rtl8168_mdio_write(tp, 0x06, 0x039e);
-                rtl8168_mdio_write(tp, 0x06, 0x07ad);
-                rtl8168_mdio_write(tp, 0x06, 0x3508);
-                rtl8168_mdio_write(tp, 0x06, 0x5ac0);
-                rtl8168_mdio_write(tp, 0x06, 0x9f04);
-                rtl8168_mdio_write(tp, 0x06, 0xd101);
-                rtl8168_mdio_write(tp, 0x06, 0xae02);
-                rtl8168_mdio_write(tp, 0x06, 0xd100);
-                rtl8168_mdio_write(tp, 0x06, 0xbf86);
-                rtl8168_mdio_write(tp, 0x06, 0x3e02);
-                rtl8168_mdio_write(tp, 0x06, 0x2f50);
-                rtl8168_mdio_write(tp, 0x06, 0xef96);
-                rtl8168_mdio_write(tp, 0x06, 0xfefd);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xf8f9);
-                rtl8168_mdio_write(tp, 0x06, 0xfae0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b81);
-                rtl8168_mdio_write(tp, 0x06, 0xac26);
-                rtl8168_mdio_write(tp, 0x06, 0x0ee0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b81);
-                rtl8168_mdio_write(tp, 0x06, 0xac21);
-                rtl8168_mdio_write(tp, 0x06, 0x08e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b87);
-                rtl8168_mdio_write(tp, 0x06, 0xac24);
-                rtl8168_mdio_write(tp, 0x06, 0x02ae);
-                rtl8168_mdio_write(tp, 0x06, 0x6bee);
-                rtl8168_mdio_write(tp, 0x06, 0xe0ea);
-                rtl8168_mdio_write(tp, 0x06, 0x00ee);
-                rtl8168_mdio_write(tp, 0x06, 0xe0eb);
-                rtl8168_mdio_write(tp, 0x06, 0x00e2);
-                rtl8168_mdio_write(tp, 0x06, 0xe07c);
-                rtl8168_mdio_write(tp, 0x06, 0xe3e0);
-                rtl8168_mdio_write(tp, 0x06, 0x7da5);
-                rtl8168_mdio_write(tp, 0x06, 0x1111);
-                rtl8168_mdio_write(tp, 0x06, 0x15d2);
-                rtl8168_mdio_write(tp, 0x06, 0x60d6);
-                rtl8168_mdio_write(tp, 0x06, 0x6666);
-                rtl8168_mdio_write(tp, 0x06, 0x0207);
-                rtl8168_mdio_write(tp, 0x06, 0xf9d2);
-                rtl8168_mdio_write(tp, 0x06, 0xa0d6);
-                rtl8168_mdio_write(tp, 0x06, 0xaaaa);
-                rtl8168_mdio_write(tp, 0x06, 0x0207);
-                rtl8168_mdio_write(tp, 0x06, 0xf902);
-                rtl8168_mdio_write(tp, 0x06, 0x825c);
-                rtl8168_mdio_write(tp, 0x06, 0xae44);
-                rtl8168_mdio_write(tp, 0x06, 0xa566);
-                rtl8168_mdio_write(tp, 0x06, 0x6602);
-                rtl8168_mdio_write(tp, 0x06, 0xae38);
-                rtl8168_mdio_write(tp, 0x06, 0xa5aa);
-                rtl8168_mdio_write(tp, 0x06, 0xaa02);
-                rtl8168_mdio_write(tp, 0x06, 0xae32);
-                rtl8168_mdio_write(tp, 0x06, 0xeee0);
-                rtl8168_mdio_write(tp, 0x06, 0xea04);
-                rtl8168_mdio_write(tp, 0x06, 0xeee0);
-                rtl8168_mdio_write(tp, 0x06, 0xeb06);
-                rtl8168_mdio_write(tp, 0x06, 0xe2e0);
-                rtl8168_mdio_write(tp, 0x06, 0x7ce3);
-                rtl8168_mdio_write(tp, 0x06, 0xe07d);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-                rtl8168_mdio_write(tp, 0x06, 0x38e1);
-                rtl8168_mdio_write(tp, 0x06, 0xe039);
-                rtl8168_mdio_write(tp, 0x06, 0xad2e);
-                rtl8168_mdio_write(tp, 0x06, 0x21ad);
-                rtl8168_mdio_write(tp, 0x06, 0x3f13);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e4);
-                rtl8168_mdio_write(tp, 0x06, 0x14e1);
-                rtl8168_mdio_write(tp, 0x06, 0xe415);
-                rtl8168_mdio_write(tp, 0x06, 0x6880);
-                rtl8168_mdio_write(tp, 0x06, 0xe4e4);
-                rtl8168_mdio_write(tp, 0x06, 0x14e5);
-                rtl8168_mdio_write(tp, 0x06, 0xe415);
-                rtl8168_mdio_write(tp, 0x06, 0x0282);
-                rtl8168_mdio_write(tp, 0x06, 0x5cae);
-                rtl8168_mdio_write(tp, 0x06, 0x0bac);
-                rtl8168_mdio_write(tp, 0x06, 0x3e02);
-                rtl8168_mdio_write(tp, 0x06, 0xae06);
-                rtl8168_mdio_write(tp, 0x06, 0x0282);
-                rtl8168_mdio_write(tp, 0x06, 0x8602);
-                rtl8168_mdio_write(tp, 0x06, 0x82b0);
-                rtl8168_mdio_write(tp, 0x06, 0xfefd);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xf8e1);
-                rtl8168_mdio_write(tp, 0x06, 0x8b2e);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x81ad);
-                rtl8168_mdio_write(tp, 0x06, 0x2605);
-                rtl8168_mdio_write(tp, 0x06, 0x0221);
-                rtl8168_mdio_write(tp, 0x06, 0xf3f7);
-                rtl8168_mdio_write(tp, 0x06, 0x28e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b81);
-                rtl8168_mdio_write(tp, 0x06, 0xad21);
-                rtl8168_mdio_write(tp, 0x06, 0x0502);
-                rtl8168_mdio_write(tp, 0x06, 0x22f8);
-                rtl8168_mdio_write(tp, 0x06, 0xf729);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x87ad);
-                rtl8168_mdio_write(tp, 0x06, 0x2405);
-                rtl8168_mdio_write(tp, 0x06, 0x0282);
-                rtl8168_mdio_write(tp, 0x06, 0xebf7);
-                rtl8168_mdio_write(tp, 0x06, 0x2ae5);
-                rtl8168_mdio_write(tp, 0x06, 0x8b2e);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b81);
-                rtl8168_mdio_write(tp, 0x06, 0xad26);
-                rtl8168_mdio_write(tp, 0x06, 0x0302);
-                rtl8168_mdio_write(tp, 0x06, 0x2134);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x81ad);
-                rtl8168_mdio_write(tp, 0x06, 0x2109);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x2eac);
-                rtl8168_mdio_write(tp, 0x06, 0x2003);
-                rtl8168_mdio_write(tp, 0x06, 0x0283);
-                rtl8168_mdio_write(tp, 0x06, 0x52e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b87);
-                rtl8168_mdio_write(tp, 0x06, 0xad24);
-                rtl8168_mdio_write(tp, 0x06, 0x09e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b2e);
-                rtl8168_mdio_write(tp, 0x06, 0xac21);
-                rtl8168_mdio_write(tp, 0x06, 0x0302);
-                rtl8168_mdio_write(tp, 0x06, 0x8337);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xf8e1);
-                rtl8168_mdio_write(tp, 0x06, 0x8b2e);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x81ad);
-                rtl8168_mdio_write(tp, 0x06, 0x2608);
-                rtl8168_mdio_write(tp, 0x06, 0xe085);
-                rtl8168_mdio_write(tp, 0x06, 0xd2ad);
-                rtl8168_mdio_write(tp, 0x06, 0x2502);
-                rtl8168_mdio_write(tp, 0x06, 0xf628);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x81ad);
-                rtl8168_mdio_write(tp, 0x06, 0x210a);
-                rtl8168_mdio_write(tp, 0x06, 0xe086);
-                rtl8168_mdio_write(tp, 0x06, 0x0af6);
-                rtl8168_mdio_write(tp, 0x06, 0x27a0);
-                rtl8168_mdio_write(tp, 0x06, 0x0502);
-                rtl8168_mdio_write(tp, 0x06, 0xf629);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x87ad);
-                rtl8168_mdio_write(tp, 0x06, 0x2408);
-                rtl8168_mdio_write(tp, 0x06, 0xe08a);
-                rtl8168_mdio_write(tp, 0x06, 0xedad);
-                rtl8168_mdio_write(tp, 0x06, 0x2002);
-                rtl8168_mdio_write(tp, 0x06, 0xf62a);
-                rtl8168_mdio_write(tp, 0x06, 0xe58b);
-                rtl8168_mdio_write(tp, 0x06, 0x2ea1);
-                rtl8168_mdio_write(tp, 0x06, 0x0003);
-                rtl8168_mdio_write(tp, 0x06, 0x0221);
-                rtl8168_mdio_write(tp, 0x06, 0x11fc);
-                rtl8168_mdio_write(tp, 0x06, 0x04ee);
-                rtl8168_mdio_write(tp, 0x06, 0x8aed);
-                rtl8168_mdio_write(tp, 0x06, 0x00ee);
-                rtl8168_mdio_write(tp, 0x06, 0x8aec);
-                rtl8168_mdio_write(tp, 0x06, 0x0004);
-                rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b87);
-                rtl8168_mdio_write(tp, 0x06, 0xad24);
-                rtl8168_mdio_write(tp, 0x06, 0x3ae0);
-                rtl8168_mdio_write(tp, 0x06, 0xe0ea);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-                rtl8168_mdio_write(tp, 0x06, 0xeb58);
-                rtl8168_mdio_write(tp, 0x06, 0xf8d1);
-                rtl8168_mdio_write(tp, 0x06, 0x01e4);
-                rtl8168_mdio_write(tp, 0x06, 0xe0ea);
-                rtl8168_mdio_write(tp, 0x06, 0xe5e0);
-                rtl8168_mdio_write(tp, 0x06, 0xebe0);
-                rtl8168_mdio_write(tp, 0x06, 0xe07c);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-                rtl8168_mdio_write(tp, 0x06, 0x7d5c);
-                rtl8168_mdio_write(tp, 0x06, 0x00ff);
-                rtl8168_mdio_write(tp, 0x06, 0x3c00);
-                rtl8168_mdio_write(tp, 0x06, 0x1eab);
-                rtl8168_mdio_write(tp, 0x06, 0x1ce0);
-                rtl8168_mdio_write(tp, 0x06, 0xe04c);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-                rtl8168_mdio_write(tp, 0x06, 0x4d58);
-                rtl8168_mdio_write(tp, 0x06, 0xc1e4);
-                rtl8168_mdio_write(tp, 0x06, 0xe04c);
-                rtl8168_mdio_write(tp, 0x06, 0xe5e0);
-                rtl8168_mdio_write(tp, 0x06, 0x4de0);
-                rtl8168_mdio_write(tp, 0x06, 0xe0ee);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-                rtl8168_mdio_write(tp, 0x06, 0xef69);
-                rtl8168_mdio_write(tp, 0x06, 0x3ce4);
-                rtl8168_mdio_write(tp, 0x06, 0xe0ee);
-                rtl8168_mdio_write(tp, 0x06, 0xe5e0);
-                rtl8168_mdio_write(tp, 0x06, 0xeffc);
-                rtl8168_mdio_write(tp, 0x06, 0x04f8);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x87ad);
-                rtl8168_mdio_write(tp, 0x06, 0x2412);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-                rtl8168_mdio_write(tp, 0x06, 0xeee1);
-                rtl8168_mdio_write(tp, 0x06, 0xe0ef);
-                rtl8168_mdio_write(tp, 0x06, 0x59c3);
-                rtl8168_mdio_write(tp, 0x06, 0xe4e0);
-                rtl8168_mdio_write(tp, 0x06, 0xeee5);
-                rtl8168_mdio_write(tp, 0x06, 0xe0ef);
-                rtl8168_mdio_write(tp, 0x06, 0xee8a);
-                rtl8168_mdio_write(tp, 0x06, 0xed01);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b81);
-                rtl8168_mdio_write(tp, 0x06, 0xac25);
-                rtl8168_mdio_write(tp, 0x06, 0x0502);
-                rtl8168_mdio_write(tp, 0x06, 0x8363);
-                rtl8168_mdio_write(tp, 0x06, 0xae03);
-                rtl8168_mdio_write(tp, 0x06, 0x0225);
-                rtl8168_mdio_write(tp, 0x06, 0x16fc);
-                rtl8168_mdio_write(tp, 0x06, 0x04f8);
-                rtl8168_mdio_write(tp, 0x06, 0xf9fa);
-                rtl8168_mdio_write(tp, 0x06, 0xef69);
-                rtl8168_mdio_write(tp, 0x06, 0xfae0);
-                rtl8168_mdio_write(tp, 0x06, 0x860a);
-                rtl8168_mdio_write(tp, 0x06, 0xa000);
-                rtl8168_mdio_write(tp, 0x06, 0x19e0);
-                rtl8168_mdio_write(tp, 0x06, 0x860b);
-                rtl8168_mdio_write(tp, 0x06, 0xe18b);
-                rtl8168_mdio_write(tp, 0x06, 0x331b);
-                rtl8168_mdio_write(tp, 0x06, 0x109e);
-                rtl8168_mdio_write(tp, 0x06, 0x04aa);
-                rtl8168_mdio_write(tp, 0x06, 0x02ae);
-                rtl8168_mdio_write(tp, 0x06, 0x06ee);
-                rtl8168_mdio_write(tp, 0x06, 0x860a);
-                rtl8168_mdio_write(tp, 0x06, 0x01ae);
-                rtl8168_mdio_write(tp, 0x06, 0xe602);
-                rtl8168_mdio_write(tp, 0x06, 0x241e);
-                rtl8168_mdio_write(tp, 0x06, 0xae14);
-                rtl8168_mdio_write(tp, 0x06, 0xa001);
-                rtl8168_mdio_write(tp, 0x06, 0x1402);
-                rtl8168_mdio_write(tp, 0x06, 0x2426);
-                rtl8168_mdio_write(tp, 0x06, 0xbf26);
-                rtl8168_mdio_write(tp, 0x06, 0x6d02);
-                rtl8168_mdio_write(tp, 0x06, 0x2eb0);
-                rtl8168_mdio_write(tp, 0x06, 0xee86);
-                rtl8168_mdio_write(tp, 0x06, 0x0b00);
-                rtl8168_mdio_write(tp, 0x06, 0xee86);
-                rtl8168_mdio_write(tp, 0x06, 0x0a02);
-                rtl8168_mdio_write(tp, 0x06, 0xaf84);
-                rtl8168_mdio_write(tp, 0x06, 0x3ca0);
-                rtl8168_mdio_write(tp, 0x06, 0x0252);
-                rtl8168_mdio_write(tp, 0x06, 0xee86);
-                rtl8168_mdio_write(tp, 0x06, 0x0400);
-                rtl8168_mdio_write(tp, 0x06, 0xee86);
-                rtl8168_mdio_write(tp, 0x06, 0x0500);
-                rtl8168_mdio_write(tp, 0x06, 0xe086);
-                rtl8168_mdio_write(tp, 0x06, 0x0be1);
-                rtl8168_mdio_write(tp, 0x06, 0x8b32);
-                rtl8168_mdio_write(tp, 0x06, 0x1b10);
-                rtl8168_mdio_write(tp, 0x06, 0x9e04);
-                rtl8168_mdio_write(tp, 0x06, 0xaa02);
-                rtl8168_mdio_write(tp, 0x06, 0xaecb);
-                rtl8168_mdio_write(tp, 0x06, 0xee86);
-                rtl8168_mdio_write(tp, 0x06, 0x0b00);
-                rtl8168_mdio_write(tp, 0x06, 0x0224);
-                rtl8168_mdio_write(tp, 0x06, 0x3ae2);
-                rtl8168_mdio_write(tp, 0x06, 0x8604);
-                rtl8168_mdio_write(tp, 0x06, 0xe386);
-                rtl8168_mdio_write(tp, 0x06, 0x05ef);
-                rtl8168_mdio_write(tp, 0x06, 0x65e2);
-                rtl8168_mdio_write(tp, 0x06, 0x8606);
-                rtl8168_mdio_write(tp, 0x06, 0xe386);
-                rtl8168_mdio_write(tp, 0x06, 0x071b);
-                rtl8168_mdio_write(tp, 0x06, 0x56aa);
-                rtl8168_mdio_write(tp, 0x06, 0x0eef);
-                rtl8168_mdio_write(tp, 0x06, 0x56e6);
-                rtl8168_mdio_write(tp, 0x06, 0x8606);
-                rtl8168_mdio_write(tp, 0x06, 0xe786);
-                rtl8168_mdio_write(tp, 0x06, 0x07e2);
-                rtl8168_mdio_write(tp, 0x06, 0x8609);
-                rtl8168_mdio_write(tp, 0x06, 0xe686);
-                rtl8168_mdio_write(tp, 0x06, 0x08e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8609);
-                rtl8168_mdio_write(tp, 0x06, 0xa000);
-                rtl8168_mdio_write(tp, 0x06, 0x07ee);
-                rtl8168_mdio_write(tp, 0x06, 0x860a);
-                rtl8168_mdio_write(tp, 0x06, 0x03af);
-                rtl8168_mdio_write(tp, 0x06, 0x8369);
-                rtl8168_mdio_write(tp, 0x06, 0x0224);
-                rtl8168_mdio_write(tp, 0x06, 0x8e02);
-                rtl8168_mdio_write(tp, 0x06, 0x2426);
-                rtl8168_mdio_write(tp, 0x06, 0xae48);
-                rtl8168_mdio_write(tp, 0x06, 0xa003);
-                rtl8168_mdio_write(tp, 0x06, 0x21e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8608);
-                rtl8168_mdio_write(tp, 0x06, 0xe186);
-                rtl8168_mdio_write(tp, 0x06, 0x091b);
-                rtl8168_mdio_write(tp, 0x06, 0x019e);
-                rtl8168_mdio_write(tp, 0x06, 0x0caa);
-                rtl8168_mdio_write(tp, 0x06, 0x0502);
-                rtl8168_mdio_write(tp, 0x06, 0x249d);
-                rtl8168_mdio_write(tp, 0x06, 0xaee7);
-                rtl8168_mdio_write(tp, 0x06, 0x0224);
-                rtl8168_mdio_write(tp, 0x06, 0x8eae);
-                rtl8168_mdio_write(tp, 0x06, 0xe2ee);
-                rtl8168_mdio_write(tp, 0x06, 0x860a);
-                rtl8168_mdio_write(tp, 0x06, 0x04ee);
-                rtl8168_mdio_write(tp, 0x06, 0x860b);
-                rtl8168_mdio_write(tp, 0x06, 0x00af);
-                rtl8168_mdio_write(tp, 0x06, 0x8369);
-                rtl8168_mdio_write(tp, 0x06, 0xa004);
-                rtl8168_mdio_write(tp, 0x06, 0x15e0);
-                rtl8168_mdio_write(tp, 0x06, 0x860b);
-                rtl8168_mdio_write(tp, 0x06, 0xe18b);
-                rtl8168_mdio_write(tp, 0x06, 0x341b);
-                rtl8168_mdio_write(tp, 0x06, 0x109e);
-                rtl8168_mdio_write(tp, 0x06, 0x05aa);
-                rtl8168_mdio_write(tp, 0x06, 0x03af);
-                rtl8168_mdio_write(tp, 0x06, 0x8383);
-                rtl8168_mdio_write(tp, 0x06, 0xee86);
-                rtl8168_mdio_write(tp, 0x06, 0x0a05);
-                rtl8168_mdio_write(tp, 0x06, 0xae0c);
-                rtl8168_mdio_write(tp, 0x06, 0xa005);
-                rtl8168_mdio_write(tp, 0x06, 0x02ae);
-                rtl8168_mdio_write(tp, 0x06, 0x0702);
-                rtl8168_mdio_write(tp, 0x06, 0x2309);
-                rtl8168_mdio_write(tp, 0x06, 0xee86);
-                rtl8168_mdio_write(tp, 0x06, 0x0a00);
-                rtl8168_mdio_write(tp, 0x06, 0xfeef);
-                rtl8168_mdio_write(tp, 0x06, 0x96fe);
-                rtl8168_mdio_write(tp, 0x06, 0xfdfc);
-                rtl8168_mdio_write(tp, 0x06, 0x04f8);
-                rtl8168_mdio_write(tp, 0x06, 0xf9fa);
-                rtl8168_mdio_write(tp, 0x06, 0xef69);
-                rtl8168_mdio_write(tp, 0x06, 0xfbe0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b85);
-                rtl8168_mdio_write(tp, 0x06, 0xad25);
-                rtl8168_mdio_write(tp, 0x06, 0x22e0);
-                rtl8168_mdio_write(tp, 0x06, 0xe022);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-                rtl8168_mdio_write(tp, 0x06, 0x23e2);
-                rtl8168_mdio_write(tp, 0x06, 0xe036);
-                rtl8168_mdio_write(tp, 0x06, 0xe3e0);
-                rtl8168_mdio_write(tp, 0x06, 0x375a);
-                rtl8168_mdio_write(tp, 0x06, 0xc40d);
-                rtl8168_mdio_write(tp, 0x06, 0x0158);
-                rtl8168_mdio_write(tp, 0x06, 0x021e);
-                rtl8168_mdio_write(tp, 0x06, 0x20e3);
-                rtl8168_mdio_write(tp, 0x06, 0x8ae7);
-                rtl8168_mdio_write(tp, 0x06, 0xac31);
-                rtl8168_mdio_write(tp, 0x06, 0x60ac);
-                rtl8168_mdio_write(tp, 0x06, 0x3a08);
-                rtl8168_mdio_write(tp, 0x06, 0xac3e);
-                rtl8168_mdio_write(tp, 0x06, 0x26ae);
-                rtl8168_mdio_write(tp, 0x06, 0x67af);
-                rtl8168_mdio_write(tp, 0x06, 0x84db);
-                rtl8168_mdio_write(tp, 0x06, 0xad37);
-                rtl8168_mdio_write(tp, 0x06, 0x61e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8ae8);
-                rtl8168_mdio_write(tp, 0x06, 0x10e4);
-                rtl8168_mdio_write(tp, 0x06, 0x8ae8);
-                rtl8168_mdio_write(tp, 0x06, 0xe18a);
-                rtl8168_mdio_write(tp, 0x06, 0xe91b);
-                rtl8168_mdio_write(tp, 0x06, 0x109e);
-                rtl8168_mdio_write(tp, 0x06, 0x02ae);
-                rtl8168_mdio_write(tp, 0x06, 0x51d1);
-                rtl8168_mdio_write(tp, 0x06, 0x00bf);
-                rtl8168_mdio_write(tp, 0x06, 0x863b);
-                rtl8168_mdio_write(tp, 0x06, 0x022f);
-                rtl8168_mdio_write(tp, 0x06, 0x50ee);
-                rtl8168_mdio_write(tp, 0x06, 0x8ae8);
-                rtl8168_mdio_write(tp, 0x06, 0x00ae);
-                rtl8168_mdio_write(tp, 0x06, 0x43ad);
-                rtl8168_mdio_write(tp, 0x06, 0x3627);
-                rtl8168_mdio_write(tp, 0x06, 0xe08a);
-                rtl8168_mdio_write(tp, 0x06, 0xeee1);
-                rtl8168_mdio_write(tp, 0x06, 0x8aef);
-                rtl8168_mdio_write(tp, 0x06, 0xef74);
-                rtl8168_mdio_write(tp, 0x06, 0xe08a);
-                rtl8168_mdio_write(tp, 0x06, 0xeae1);
-                rtl8168_mdio_write(tp, 0x06, 0x8aeb);
-                rtl8168_mdio_write(tp, 0x06, 0x1b74);
-                rtl8168_mdio_write(tp, 0x06, 0x9e2e);
-                rtl8168_mdio_write(tp, 0x06, 0x14e4);
-                rtl8168_mdio_write(tp, 0x06, 0x8aea);
-                rtl8168_mdio_write(tp, 0x06, 0xe58a);
-                rtl8168_mdio_write(tp, 0x06, 0xebef);
-                rtl8168_mdio_write(tp, 0x06, 0x74e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8aee);
-                rtl8168_mdio_write(tp, 0x06, 0xe18a);
-                rtl8168_mdio_write(tp, 0x06, 0xef1b);
-                rtl8168_mdio_write(tp, 0x06, 0x479e);
-                rtl8168_mdio_write(tp, 0x06, 0x0fae);
-                rtl8168_mdio_write(tp, 0x06, 0x19ee);
-                rtl8168_mdio_write(tp, 0x06, 0x8aea);
-                rtl8168_mdio_write(tp, 0x06, 0x00ee);
-                rtl8168_mdio_write(tp, 0x06, 0x8aeb);
-                rtl8168_mdio_write(tp, 0x06, 0x00ae);
-                rtl8168_mdio_write(tp, 0x06, 0x0fac);
-                rtl8168_mdio_write(tp, 0x06, 0x390c);
-                rtl8168_mdio_write(tp, 0x06, 0xd101);
-                rtl8168_mdio_write(tp, 0x06, 0xbf86);
-                rtl8168_mdio_write(tp, 0x06, 0x3b02);
-                rtl8168_mdio_write(tp, 0x06, 0x2f50);
-                rtl8168_mdio_write(tp, 0x06, 0xee8a);
-                rtl8168_mdio_write(tp, 0x06, 0xe800);
-                rtl8168_mdio_write(tp, 0x06, 0xe68a);
-                rtl8168_mdio_write(tp, 0x06, 0xe7ff);
-                rtl8168_mdio_write(tp, 0x06, 0xef96);
-                rtl8168_mdio_write(tp, 0x06, 0xfefd);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xf8f9);
-                rtl8168_mdio_write(tp, 0x06, 0xfaef);
-                rtl8168_mdio_write(tp, 0x06, 0x69e0);
-                rtl8168_mdio_write(tp, 0x06, 0xe022);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-                rtl8168_mdio_write(tp, 0x06, 0x2358);
-                rtl8168_mdio_write(tp, 0x06, 0xc4e1);
-                rtl8168_mdio_write(tp, 0x06, 0x8b6e);
-                rtl8168_mdio_write(tp, 0x06, 0x1f10);
-                rtl8168_mdio_write(tp, 0x06, 0x9e24);
-                rtl8168_mdio_write(tp, 0x06, 0xe48b);
-                rtl8168_mdio_write(tp, 0x06, 0x6ead);
-                rtl8168_mdio_write(tp, 0x06, 0x2218);
-                rtl8168_mdio_write(tp, 0x06, 0xac27);
-                rtl8168_mdio_write(tp, 0x06, 0x0dac);
-                rtl8168_mdio_write(tp, 0x06, 0x2605);
-                rtl8168_mdio_write(tp, 0x06, 0x0203);
-                rtl8168_mdio_write(tp, 0x06, 0x8fae);
-                rtl8168_mdio_write(tp, 0x06, 0x1302);
-                rtl8168_mdio_write(tp, 0x06, 0x03c8);
-                rtl8168_mdio_write(tp, 0x06, 0xae0e);
-                rtl8168_mdio_write(tp, 0x06, 0x0203);
-                rtl8168_mdio_write(tp, 0x06, 0xe102);
-                rtl8168_mdio_write(tp, 0x06, 0x8520);
-                rtl8168_mdio_write(tp, 0x06, 0xae06);
-                rtl8168_mdio_write(tp, 0x06, 0x0203);
-                rtl8168_mdio_write(tp, 0x06, 0x8f02);
-                rtl8168_mdio_write(tp, 0x06, 0x8566);
-                rtl8168_mdio_write(tp, 0x06, 0xef96);
-                rtl8168_mdio_write(tp, 0x06, 0xfefd);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xf8fa);
-                rtl8168_mdio_write(tp, 0x06, 0xef69);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x82ad);
-                rtl8168_mdio_write(tp, 0x06, 0x2737);
-                rtl8168_mdio_write(tp, 0x06, 0xbf86);
-                rtl8168_mdio_write(tp, 0x06, 0x4402);
-                rtl8168_mdio_write(tp, 0x06, 0x2f23);
-                rtl8168_mdio_write(tp, 0x06, 0xac28);
-                rtl8168_mdio_write(tp, 0x06, 0x2ed1);
-                rtl8168_mdio_write(tp, 0x06, 0x01bf);
-                rtl8168_mdio_write(tp, 0x06, 0x8647);
-                rtl8168_mdio_write(tp, 0x06, 0x022f);
-                rtl8168_mdio_write(tp, 0x06, 0x50bf);
-                rtl8168_mdio_write(tp, 0x06, 0x8641);
-                rtl8168_mdio_write(tp, 0x06, 0x022f);
-                rtl8168_mdio_write(tp, 0x06, 0x23e5);
-                rtl8168_mdio_write(tp, 0x06, 0x8af0);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-                rtl8168_mdio_write(tp, 0x06, 0x22e1);
-                rtl8168_mdio_write(tp, 0x06, 0xe023);
-                rtl8168_mdio_write(tp, 0x06, 0xac2e);
-                rtl8168_mdio_write(tp, 0x06, 0x04d1);
-                rtl8168_mdio_write(tp, 0x06, 0x01ae);
-                rtl8168_mdio_write(tp, 0x06, 0x02d1);
-                rtl8168_mdio_write(tp, 0x06, 0x00bf);
-                rtl8168_mdio_write(tp, 0x06, 0x8641);
-                rtl8168_mdio_write(tp, 0x06, 0x022f);
-                rtl8168_mdio_write(tp, 0x06, 0x50d1);
-                rtl8168_mdio_write(tp, 0x06, 0x01bf);
-                rtl8168_mdio_write(tp, 0x06, 0x8644);
-                rtl8168_mdio_write(tp, 0x06, 0x022f);
-                rtl8168_mdio_write(tp, 0x06, 0x50ef);
-                rtl8168_mdio_write(tp, 0x06, 0x96fe);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xf8fa);
-                rtl8168_mdio_write(tp, 0x06, 0xef69);
-                rtl8168_mdio_write(tp, 0x06, 0xbf86);
-                rtl8168_mdio_write(tp, 0x06, 0x4702);
-                rtl8168_mdio_write(tp, 0x06, 0x2f23);
-                rtl8168_mdio_write(tp, 0x06, 0xad28);
-                rtl8168_mdio_write(tp, 0x06, 0x19d1);
-                rtl8168_mdio_write(tp, 0x06, 0x00bf);
-                rtl8168_mdio_write(tp, 0x06, 0x8644);
-                rtl8168_mdio_write(tp, 0x06, 0x022f);
-                rtl8168_mdio_write(tp, 0x06, 0x50e1);
-                rtl8168_mdio_write(tp, 0x06, 0x8af0);
-                rtl8168_mdio_write(tp, 0x06, 0xbf86);
-                rtl8168_mdio_write(tp, 0x06, 0x4102);
-                rtl8168_mdio_write(tp, 0x06, 0x2f50);
-                rtl8168_mdio_write(tp, 0x06, 0xd100);
-                rtl8168_mdio_write(tp, 0x06, 0xbf86);
-                rtl8168_mdio_write(tp, 0x06, 0x4702);
-                rtl8168_mdio_write(tp, 0x06, 0x2f50);
-                rtl8168_mdio_write(tp, 0x06, 0xef96);
-                rtl8168_mdio_write(tp, 0x06, 0xfefc);
-                rtl8168_mdio_write(tp, 0x06, 0x04f8);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
-                rtl8168_mdio_write(tp, 0x06, 0xfee1);
-                rtl8168_mdio_write(tp, 0x06, 0xe2ff);
-                rtl8168_mdio_write(tp, 0x06, 0xad2e);
-                rtl8168_mdio_write(tp, 0x06, 0x63e0);
-                rtl8168_mdio_write(tp, 0x06, 0xe038);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-                rtl8168_mdio_write(tp, 0x06, 0x39ad);
-                rtl8168_mdio_write(tp, 0x06, 0x2f10);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-                rtl8168_mdio_write(tp, 0x06, 0x34e1);
-                rtl8168_mdio_write(tp, 0x06, 0xe035);
-                rtl8168_mdio_write(tp, 0x06, 0xf726);
-                rtl8168_mdio_write(tp, 0x06, 0xe4e0);
-                rtl8168_mdio_write(tp, 0x06, 0x34e5);
-                rtl8168_mdio_write(tp, 0x06, 0xe035);
-                rtl8168_mdio_write(tp, 0x06, 0xae0e);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
-                rtl8168_mdio_write(tp, 0x06, 0xd6e1);
-                rtl8168_mdio_write(tp, 0x06, 0xe2d7);
-                rtl8168_mdio_write(tp, 0x06, 0xf728);
-                rtl8168_mdio_write(tp, 0x06, 0xe4e2);
-                rtl8168_mdio_write(tp, 0x06, 0xd6e5);
-                rtl8168_mdio_write(tp, 0x06, 0xe2d7);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
-                rtl8168_mdio_write(tp, 0x06, 0x34e1);
-                rtl8168_mdio_write(tp, 0x06, 0xe235);
-                rtl8168_mdio_write(tp, 0x06, 0xf72b);
-                rtl8168_mdio_write(tp, 0x06, 0xe4e2);
-                rtl8168_mdio_write(tp, 0x06, 0x34e5);
-                rtl8168_mdio_write(tp, 0x06, 0xe235);
-                rtl8168_mdio_write(tp, 0x06, 0xd07d);
-                rtl8168_mdio_write(tp, 0x06, 0xb0fe);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
-                rtl8168_mdio_write(tp, 0x06, 0x34e1);
-                rtl8168_mdio_write(tp, 0x06, 0xe235);
-                rtl8168_mdio_write(tp, 0x06, 0xf62b);
-                rtl8168_mdio_write(tp, 0x06, 0xe4e2);
-                rtl8168_mdio_write(tp, 0x06, 0x34e5);
-                rtl8168_mdio_write(tp, 0x06, 0xe235);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-                rtl8168_mdio_write(tp, 0x06, 0x34e1);
-                rtl8168_mdio_write(tp, 0x06, 0xe035);
-                rtl8168_mdio_write(tp, 0x06, 0xf626);
-                rtl8168_mdio_write(tp, 0x06, 0xe4e0);
-                rtl8168_mdio_write(tp, 0x06, 0x34e5);
-                rtl8168_mdio_write(tp, 0x06, 0xe035);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
-                rtl8168_mdio_write(tp, 0x06, 0xd6e1);
-                rtl8168_mdio_write(tp, 0x06, 0xe2d7);
-                rtl8168_mdio_write(tp, 0x06, 0xf628);
-                rtl8168_mdio_write(tp, 0x06, 0xe4e2);
-                rtl8168_mdio_write(tp, 0x06, 0xd6e5);
-                rtl8168_mdio_write(tp, 0x06, 0xe2d7);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xae20);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0xa725);
-                rtl8168_mdio_write(tp, 0x06, 0xe50a);
-                rtl8168_mdio_write(tp, 0x06, 0x1de5);
-                rtl8168_mdio_write(tp, 0x06, 0x0a2c);
-                rtl8168_mdio_write(tp, 0x06, 0xe50a);
-                rtl8168_mdio_write(tp, 0x06, 0x6de5);
-                rtl8168_mdio_write(tp, 0x06, 0x0a1d);
-                rtl8168_mdio_write(tp, 0x06, 0xe50a);
-                rtl8168_mdio_write(tp, 0x06, 0x1ce5);
-                rtl8168_mdio_write(tp, 0x06, 0x0a2d);
-                rtl8168_mdio_write(tp, 0x06, 0xa755);
-                rtl8168_mdio_write(tp, 0x06, 0x00e2);
-                rtl8168_mdio_write(tp, 0x06, 0x3488);
-                rtl8168_mdio_write(tp, 0x06, 0xe200);
-                rtl8168_mdio_write(tp, 0x06, 0xcce2);
-                rtl8168_mdio_write(tp, 0x06, 0x0055);
-                rtl8168_mdio_write(tp, 0x06, 0xe020);
-                rtl8168_mdio_write(tp, 0x06, 0x55e2);
-                rtl8168_mdio_write(tp, 0x06, 0xd600);
-                rtl8168_mdio_write(tp, 0x06, 0xe24a);
-                gphy_val = rtl8168_mdio_read(tp, 0x01);
-                gphy_val |= BIT_0;
-                rtl8168_mdio_write(tp, 0x01, gphy_val);
-                gphy_val = rtl8168_mdio_read(tp, 0x00);
-                gphy_val |= BIT_0;
-                rtl8168_mdio_write(tp, 0x00, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                rtl8168_mdio_write(tp, 0x17, 0x2179);
-                rtl8168_mdio_write(tp, 0x1f, 0x0001);
-                rtl8168_mdio_write(tp, 0x10, 0xf274);
-                rtl8168_mdio_write(tp, 0x1f, 0x0007);
-                rtl8168_mdio_write(tp, 0x1e, 0x0042);
-                rtl8168_mdio_write(tp, 0x15, 0x0f00);
-                rtl8168_mdio_write(tp, 0x15, 0x0f00);
-                rtl8168_mdio_write(tp, 0x16, 0x7408);
-                rtl8168_mdio_write(tp, 0x15, 0x0e00);
-                rtl8168_mdio_write(tp, 0x15, 0x0f00);
-                rtl8168_mdio_write(tp, 0x15, 0x0f01);
-                rtl8168_mdio_write(tp, 0x16, 0x4000);
-                rtl8168_mdio_write(tp, 0x15, 0x0e01);
-                rtl8168_mdio_write(tp, 0x15, 0x0f01);
-                rtl8168_mdio_write(tp, 0x15, 0x0f02);
-                rtl8168_mdio_write(tp, 0x16, 0x9400);
-                rtl8168_mdio_write(tp, 0x15, 0x0e02);
-                rtl8168_mdio_write(tp, 0x15, 0x0f02);
-                rtl8168_mdio_write(tp, 0x15, 0x0f03);
-                rtl8168_mdio_write(tp, 0x16, 0x7408);
-                rtl8168_mdio_write(tp, 0x15, 0x0e03);
-                rtl8168_mdio_write(tp, 0x15, 0x0f03);
-                rtl8168_mdio_write(tp, 0x15, 0x0f04);
-                rtl8168_mdio_write(tp, 0x16, 0x4008);
-                rtl8168_mdio_write(tp, 0x15, 0x0e04);
-                rtl8168_mdio_write(tp, 0x15, 0x0f04);
-                rtl8168_mdio_write(tp, 0x15, 0x0f05);
-                rtl8168_mdio_write(tp, 0x16, 0x9400);
-                rtl8168_mdio_write(tp, 0x15, 0x0e05);
-                rtl8168_mdio_write(tp, 0x15, 0x0f05);
-                rtl8168_mdio_write(tp, 0x15, 0x0f06);
-                rtl8168_mdio_write(tp, 0x16, 0x0803);
-                rtl8168_mdio_write(tp, 0x15, 0x0e06);
-                rtl8168_mdio_write(tp, 0x15, 0x0f06);
-                rtl8168_mdio_write(tp, 0x15, 0x0d00);
-                rtl8168_mdio_write(tp, 0x15, 0x0100);
-                rtl8168_mdio_write(tp, 0x1f, 0x0001);
-                rtl8168_mdio_write(tp, 0x10, 0xf074);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                rtl8168_mdio_write(tp, 0x17, 0x2149);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                for (i = 0; i < 200; i++) {
-                        udelay(100);
-                        gphy_val = rtl8168_mdio_read(tp, 0x00);
-                        if (gphy_val & BIT_7)
-                                break;
-                }
-                rtl8168_mdio_write(tp, 0x1f, 0x0007);
-                rtl8168_mdio_write(tp, 0x1e, 0x0023);
-                gphy_val = rtl8168_mdio_read(tp, 0x17);
-                gphy_val &= ~(BIT_0);
-                if (tp->RequiredSecLanDonglePatch)
-                        gphy_val &= ~(BIT_2);
-                rtl8168_mdio_write(tp, 0x17, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                rtl8168_mdio_write(tp, 0x1f, 0x0007);
-                rtl8168_mdio_write(tp, 0x1e, 0x0023);
-                gphy_val = rtl8168_mdio_read(tp, 0x17);
-                gphy_val |= BIT_14;
-                rtl8168_mdio_write(tp, 0x17, gphy_val);
-                rtl8168_mdio_write(tp, 0x1e, 0x0020);
-                gphy_val = rtl8168_mdio_read(tp, 0x1b);
-                gphy_val |= BIT_7;
-                rtl8168_mdio_write(tp, 0x1b, gphy_val);
-                rtl8168_mdio_write(tp, 0x1e, 0x0041);
-                rtl8168_mdio_write(tp, 0x15, 0x0e02);
-                rtl8168_mdio_write(tp, 0x1e, 0x0028);
-                gphy_val = rtl8168_mdio_read(tp, 0x19);
-                gphy_val |= BIT_15;
-                rtl8168_mdio_write(tp, 0x19, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        } else {
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                rtl8168_mdio_write(tp, 0x00, 0x1800);
-                rtl8168_mdio_write(tp, 0x1f, 0x0007);
-                rtl8168_mdio_write(tp, 0x1e, 0x0023);
-                rtl8168_mdio_write(tp, 0x17, 0x0117);
-                rtl8168_mdio_write(tp, 0x1f, 0x0007);
-                rtl8168_mdio_write(tp, 0x1E, 0x002C);
-                rtl8168_mdio_write(tp, 0x1B, 0x5000);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                rtl8168_mdio_write(tp, 0x16, 0x4104);
-                for (i = 0; i < 200; i++) {
-                        udelay(100);
-                        gphy_val = rtl8168_mdio_read(tp, 0x1E);
-                        gphy_val &= 0x03FF;
-                        if (gphy_val==0x000C)
-                                break;
-                }
-                rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                for (i = 0; i < 200; i++) {
-                        udelay(100);
-                        gphy_val = rtl8168_mdio_read(tp, 0x07);
-                        if ((gphy_val & BIT_5) == 0)
-                                break;
-                }
-                gphy_val = rtl8168_mdio_read(tp, 0x07);
-                if (gphy_val & BIT_5) {
-                        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-                        rtl8168_mdio_write(tp, 0x1e, 0x00a1);
-                        rtl8168_mdio_write(tp, 0x17, 0x1000);
-                        rtl8168_mdio_write(tp, 0x17, 0x0000);
-                        rtl8168_mdio_write(tp, 0x17, 0x2000);
-                        rtl8168_mdio_write(tp, 0x1e, 0x002f);
-                        rtl8168_mdio_write(tp, 0x18, 0x9bfb);
-                        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                        rtl8168_mdio_write(tp, 0x07, 0x0000);
-                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                }
-                rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0xfff6);
-                rtl8168_mdio_write(tp, 0x06, 0x0080);
-                gphy_val = rtl8168_mdio_read(tp, 0x00);
-                gphy_val &= ~(BIT_7);
-                rtl8168_mdio_write(tp, 0x00, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0002);
-                gphy_val = rtl8168_mdio_read(tp, 0x08);
-                gphy_val &= ~(BIT_7);
-                rtl8168_mdio_write(tp, 0x08, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0007);
-                rtl8168_mdio_write(tp, 0x1e, 0x0023);
-                rtl8168_mdio_write(tp, 0x16, 0x0306);
-                rtl8168_mdio_write(tp, 0x16, 0x0307);
-                rtl8168_mdio_write(tp, 0x15, 0x000e);
-                rtl8168_mdio_write(tp, 0x19, 0x000a);
-                rtl8168_mdio_write(tp, 0x15, 0x0010);
-                rtl8168_mdio_write(tp, 0x19, 0x0008);
-                rtl8168_mdio_write(tp, 0x15, 0x0018);
-                rtl8168_mdio_write(tp, 0x19, 0x4801);
-                rtl8168_mdio_write(tp, 0x15, 0x0019);
-                rtl8168_mdio_write(tp, 0x19, 0x6801);
-                rtl8168_mdio_write(tp, 0x15, 0x001a);
-                rtl8168_mdio_write(tp, 0x19, 0x66a1);
-                rtl8168_mdio_write(tp, 0x15, 0x001f);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0020);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0021);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0022);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0023);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0024);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0025);
-                rtl8168_mdio_write(tp, 0x19, 0x64a1);
-                rtl8168_mdio_write(tp, 0x15, 0x0026);
-                rtl8168_mdio_write(tp, 0x19, 0x40ea);
-                rtl8168_mdio_write(tp, 0x15, 0x0027);
-                rtl8168_mdio_write(tp, 0x19, 0x4503);
-                rtl8168_mdio_write(tp, 0x15, 0x0028);
-                rtl8168_mdio_write(tp, 0x19, 0x9f00);
-                rtl8168_mdio_write(tp, 0x15, 0x0029);
-                rtl8168_mdio_write(tp, 0x19, 0xa631);
-                rtl8168_mdio_write(tp, 0x15, 0x002a);
-                rtl8168_mdio_write(tp, 0x19, 0x9717);
-                rtl8168_mdio_write(tp, 0x15, 0x002b);
-                rtl8168_mdio_write(tp, 0x19, 0x302c);
-                rtl8168_mdio_write(tp, 0x15, 0x002c);
-                rtl8168_mdio_write(tp, 0x19, 0x4802);
-                rtl8168_mdio_write(tp, 0x15, 0x002d);
-                rtl8168_mdio_write(tp, 0x19, 0x58da);
-                rtl8168_mdio_write(tp, 0x15, 0x002e);
-                rtl8168_mdio_write(tp, 0x19, 0x400d);
-                rtl8168_mdio_write(tp, 0x15, 0x002f);
-                rtl8168_mdio_write(tp, 0x19, 0x4488);
-                rtl8168_mdio_write(tp, 0x15, 0x0030);
-                rtl8168_mdio_write(tp, 0x19, 0x9e00);
-                rtl8168_mdio_write(tp, 0x15, 0x0031);
-                rtl8168_mdio_write(tp, 0x19, 0x63c8);
-                rtl8168_mdio_write(tp, 0x15, 0x0032);
-                rtl8168_mdio_write(tp, 0x19, 0x6481);
-                rtl8168_mdio_write(tp, 0x15, 0x0033);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0034);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0035);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0036);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0037);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0038);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0039);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x003a);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x003b);
-                rtl8168_mdio_write(tp, 0x19, 0x63e8);
-                rtl8168_mdio_write(tp, 0x15, 0x003c);
-                rtl8168_mdio_write(tp, 0x19, 0x7d00);
-                rtl8168_mdio_write(tp, 0x15, 0x003d);
-                rtl8168_mdio_write(tp, 0x19, 0x59d4);
-                rtl8168_mdio_write(tp, 0x15, 0x003e);
-                rtl8168_mdio_write(tp, 0x19, 0x63f8);
-                rtl8168_mdio_write(tp, 0x15, 0x0040);
-                rtl8168_mdio_write(tp, 0x19, 0x64a1);
-                rtl8168_mdio_write(tp, 0x15, 0x0041);
-                rtl8168_mdio_write(tp, 0x19, 0x30de);
-                rtl8168_mdio_write(tp, 0x15, 0x0044);
-                rtl8168_mdio_write(tp, 0x19, 0x480f);
-                rtl8168_mdio_write(tp, 0x15, 0x0045);
-                rtl8168_mdio_write(tp, 0x19, 0x6800);
-                rtl8168_mdio_write(tp, 0x15, 0x0046);
-                rtl8168_mdio_write(tp, 0x19, 0x6680);
-                rtl8168_mdio_write(tp, 0x15, 0x0047);
-                rtl8168_mdio_write(tp, 0x19, 0x7c10);
-                rtl8168_mdio_write(tp, 0x15, 0x0048);
-                rtl8168_mdio_write(tp, 0x19, 0x63c8);
-                rtl8168_mdio_write(tp, 0x15, 0x0049);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x004a);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x004b);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x004c);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x004d);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x004e);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x004f);
-                rtl8168_mdio_write(tp, 0x19, 0x40ea);
-                rtl8168_mdio_write(tp, 0x15, 0x0050);
-                rtl8168_mdio_write(tp, 0x19, 0x4503);
-                rtl8168_mdio_write(tp, 0x15, 0x0051);
-                rtl8168_mdio_write(tp, 0x19, 0x58ca);
-                rtl8168_mdio_write(tp, 0x15, 0x0052);
-                rtl8168_mdio_write(tp, 0x19, 0x63c8);
-                rtl8168_mdio_write(tp, 0x15, 0x0053);
-                rtl8168_mdio_write(tp, 0x19, 0x63d8);
-                rtl8168_mdio_write(tp, 0x15, 0x0054);
-                rtl8168_mdio_write(tp, 0x19, 0x66a0);
-                rtl8168_mdio_write(tp, 0x15, 0x0055);
-                rtl8168_mdio_write(tp, 0x19, 0x9f00);
-                rtl8168_mdio_write(tp, 0x15, 0x0056);
-                rtl8168_mdio_write(tp, 0x19, 0x3000);
-                rtl8168_mdio_write(tp, 0x15, 0x00a1);
-                rtl8168_mdio_write(tp, 0x19, 0x3044);
-                rtl8168_mdio_write(tp, 0x15, 0x00ab);
-                rtl8168_mdio_write(tp, 0x19, 0x5820);
-                rtl8168_mdio_write(tp, 0x15, 0x00ac);
-                rtl8168_mdio_write(tp, 0x19, 0x5e04);
-                rtl8168_mdio_write(tp, 0x15, 0x00ad);
-                rtl8168_mdio_write(tp, 0x19, 0xb60c);
-                rtl8168_mdio_write(tp, 0x15, 0x00af);
-                rtl8168_mdio_write(tp, 0x19, 0x000a);
-                rtl8168_mdio_write(tp, 0x15, 0x00b2);
-                rtl8168_mdio_write(tp, 0x19, 0x30b9);
-                rtl8168_mdio_write(tp, 0x15, 0x00b9);
-                rtl8168_mdio_write(tp, 0x19, 0x4408);
-                rtl8168_mdio_write(tp, 0x15, 0x00ba);
-                rtl8168_mdio_write(tp, 0x19, 0x480b);
-                rtl8168_mdio_write(tp, 0x15, 0x00bb);
-                rtl8168_mdio_write(tp, 0x19, 0x5e00);
-                rtl8168_mdio_write(tp, 0x15, 0x00bc);
-                rtl8168_mdio_write(tp, 0x19, 0x405f);
-                rtl8168_mdio_write(tp, 0x15, 0x00bd);
-                rtl8168_mdio_write(tp, 0x19, 0x4448);
-                rtl8168_mdio_write(tp, 0x15, 0x00be);
-                rtl8168_mdio_write(tp, 0x19, 0x4020);
-                rtl8168_mdio_write(tp, 0x15, 0x00bf);
-                rtl8168_mdio_write(tp, 0x19, 0x4468);
-                rtl8168_mdio_write(tp, 0x15, 0x00c0);
-                rtl8168_mdio_write(tp, 0x19, 0x9c02);
-                rtl8168_mdio_write(tp, 0x15, 0x00c1);
-                rtl8168_mdio_write(tp, 0x19, 0x58a0);
-                rtl8168_mdio_write(tp, 0x15, 0x00c2);
-                rtl8168_mdio_write(tp, 0x19, 0xb605);
-                rtl8168_mdio_write(tp, 0x15, 0x00c3);
-                rtl8168_mdio_write(tp, 0x19, 0xc0d3);
-                rtl8168_mdio_write(tp, 0x15, 0x00c4);
-                rtl8168_mdio_write(tp, 0x19, 0x00e6);
-                rtl8168_mdio_write(tp, 0x15, 0x00c5);
-                rtl8168_mdio_write(tp, 0x19, 0xdaec);
-                rtl8168_mdio_write(tp, 0x15, 0x00c6);
-                rtl8168_mdio_write(tp, 0x19, 0x00fa);
-                rtl8168_mdio_write(tp, 0x15, 0x00c7);
-                rtl8168_mdio_write(tp, 0x19, 0x9df9);
-                rtl8168_mdio_write(tp, 0x15, 0x0112);
-                rtl8168_mdio_write(tp, 0x19, 0x6421);
-                rtl8168_mdio_write(tp, 0x15, 0x0113);
-                rtl8168_mdio_write(tp, 0x19, 0x7c08);
-                rtl8168_mdio_write(tp, 0x15, 0x0114);
-                rtl8168_mdio_write(tp, 0x19, 0x63f0);
-                rtl8168_mdio_write(tp, 0x15, 0x0115);
-                rtl8168_mdio_write(tp, 0x19, 0x4003);
-                rtl8168_mdio_write(tp, 0x15, 0x0116);
-                rtl8168_mdio_write(tp, 0x19, 0x4418);
-                rtl8168_mdio_write(tp, 0x15, 0x0117);
-                rtl8168_mdio_write(tp, 0x19, 0x9b00);
-                rtl8168_mdio_write(tp, 0x15, 0x0118);
-                rtl8168_mdio_write(tp, 0x19, 0x6461);
-                rtl8168_mdio_write(tp, 0x15, 0x0119);
-                rtl8168_mdio_write(tp, 0x19, 0x64e1);
-                rtl8168_mdio_write(tp, 0x15, 0x011a);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0150);
-                rtl8168_mdio_write(tp, 0x19, 0x7c80);
-                rtl8168_mdio_write(tp, 0x15, 0x0151);
-                rtl8168_mdio_write(tp, 0x19, 0x6461);
-                rtl8168_mdio_write(tp, 0x15, 0x0152);
-                rtl8168_mdio_write(tp, 0x19, 0x4003);
-                rtl8168_mdio_write(tp, 0x15, 0x0153);
-                rtl8168_mdio_write(tp, 0x19, 0x4540);
-                rtl8168_mdio_write(tp, 0x15, 0x0154);
-                rtl8168_mdio_write(tp, 0x19, 0x9f00);
-                rtl8168_mdio_write(tp, 0x15, 0x0155);
-                rtl8168_mdio_write(tp, 0x19, 0x9d00);
-                rtl8168_mdio_write(tp, 0x15, 0x0156);
-                rtl8168_mdio_write(tp, 0x19, 0x7c40);
-                rtl8168_mdio_write(tp, 0x15, 0x0157);
-                rtl8168_mdio_write(tp, 0x19, 0x6421);
-                rtl8168_mdio_write(tp, 0x15, 0x0158);
-                rtl8168_mdio_write(tp, 0x19, 0x7c80);
-                rtl8168_mdio_write(tp, 0x15, 0x0159);
-                rtl8168_mdio_write(tp, 0x19, 0x64a1);
-                rtl8168_mdio_write(tp, 0x15, 0x015a);
-                rtl8168_mdio_write(tp, 0x19, 0x30fe);
-                rtl8168_mdio_write(tp, 0x15, 0x029c);
-                rtl8168_mdio_write(tp, 0x19, 0x0070);
-                rtl8168_mdio_write(tp, 0x15, 0x02b2);
-                rtl8168_mdio_write(tp, 0x19, 0x005a);
-                rtl8168_mdio_write(tp, 0x15, 0x02bd);
-                rtl8168_mdio_write(tp, 0x19, 0xa522);
-                rtl8168_mdio_write(tp, 0x15, 0x02ce);
-                rtl8168_mdio_write(tp, 0x19, 0xb63e);
-                rtl8168_mdio_write(tp, 0x15, 0x02d9);
-                rtl8168_mdio_write(tp, 0x19, 0x32df);
-                rtl8168_mdio_write(tp, 0x15, 0x02df);
-                rtl8168_mdio_write(tp, 0x19, 0x4500);
-                rtl8168_mdio_write(tp, 0x15, 0x02f4);
-                rtl8168_mdio_write(tp, 0x19, 0xb618);
-                rtl8168_mdio_write(tp, 0x15, 0x02fb);
-                rtl8168_mdio_write(tp, 0x19, 0xb900);
-                rtl8168_mdio_write(tp, 0x15, 0x02fc);
-                rtl8168_mdio_write(tp, 0x19, 0x49b5);
-                rtl8168_mdio_write(tp, 0x15, 0x02fd);
-                rtl8168_mdio_write(tp, 0x19, 0x6812);
-                rtl8168_mdio_write(tp, 0x15, 0x02fe);
-                rtl8168_mdio_write(tp, 0x19, 0x66a0);
-                rtl8168_mdio_write(tp, 0x15, 0x02ff);
-                rtl8168_mdio_write(tp, 0x19, 0x9900);
-                rtl8168_mdio_write(tp, 0x15, 0x0300);
-                rtl8168_mdio_write(tp, 0x19, 0x64a0);
-                rtl8168_mdio_write(tp, 0x15, 0x0301);
-                rtl8168_mdio_write(tp, 0x19, 0x3316);
-                rtl8168_mdio_write(tp, 0x15, 0x0308);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x030c);
-                rtl8168_mdio_write(tp, 0x19, 0x3000);
-                rtl8168_mdio_write(tp, 0x15, 0x0312);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0313);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0314);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0315);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0316);
-                rtl8168_mdio_write(tp, 0x19, 0x49b5);
-                rtl8168_mdio_write(tp, 0x15, 0x0317);
-                rtl8168_mdio_write(tp, 0x19, 0x7d00);
-                rtl8168_mdio_write(tp, 0x15, 0x0318);
-                rtl8168_mdio_write(tp, 0x19, 0x4d00);
-                rtl8168_mdio_write(tp, 0x15, 0x0319);
-                rtl8168_mdio_write(tp, 0x19, 0x6810);
-                rtl8168_mdio_write(tp, 0x15, 0x031a);
-                rtl8168_mdio_write(tp, 0x19, 0x6c08);
-                rtl8168_mdio_write(tp, 0x15, 0x031b);
-                rtl8168_mdio_write(tp, 0x19, 0x4925);
-                rtl8168_mdio_write(tp, 0x15, 0x031c);
-                rtl8168_mdio_write(tp, 0x19, 0x403b);
-                rtl8168_mdio_write(tp, 0x15, 0x031d);
-                rtl8168_mdio_write(tp, 0x19, 0xa602);
-                rtl8168_mdio_write(tp, 0x15, 0x031e);
-                rtl8168_mdio_write(tp, 0x19, 0x402f);
-                rtl8168_mdio_write(tp, 0x15, 0x031f);
-                rtl8168_mdio_write(tp, 0x19, 0x4484);
-                rtl8168_mdio_write(tp, 0x15, 0x0320);
-                rtl8168_mdio_write(tp, 0x19, 0x40c8);
-                rtl8168_mdio_write(tp, 0x15, 0x0321);
-                rtl8168_mdio_write(tp, 0x19, 0x44c4);
-                rtl8168_mdio_write(tp, 0x15, 0x0322);
-                rtl8168_mdio_write(tp, 0x19, 0x404f);
-                rtl8168_mdio_write(tp, 0x15, 0x0323);
-                rtl8168_mdio_write(tp, 0x19, 0x44c8);
-                rtl8168_mdio_write(tp, 0x15, 0x0324);
-                rtl8168_mdio_write(tp, 0x19, 0xd64f);
-                rtl8168_mdio_write(tp, 0x15, 0x0325);
-                rtl8168_mdio_write(tp, 0x19, 0x00e7);
-                rtl8168_mdio_write(tp, 0x15, 0x0326);
-                rtl8168_mdio_write(tp, 0x19, 0x7c08);
-                rtl8168_mdio_write(tp, 0x15, 0x0327);
-                rtl8168_mdio_write(tp, 0x19, 0x8203);
-                rtl8168_mdio_write(tp, 0x15, 0x0328);
-                rtl8168_mdio_write(tp, 0x19, 0x4d48);
-                rtl8168_mdio_write(tp, 0x15, 0x0329);
-                rtl8168_mdio_write(tp, 0x19, 0x332b);
-                rtl8168_mdio_write(tp, 0x15, 0x032a);
-                rtl8168_mdio_write(tp, 0x19, 0x4d40);
-                rtl8168_mdio_write(tp, 0x15, 0x032c);
-                rtl8168_mdio_write(tp, 0x19, 0x00f8);
-                rtl8168_mdio_write(tp, 0x15, 0x032d);
-                rtl8168_mdio_write(tp, 0x19, 0x82b2);
-                rtl8168_mdio_write(tp, 0x15, 0x032f);
-                rtl8168_mdio_write(tp, 0x19, 0x00b0);
-                rtl8168_mdio_write(tp, 0x15, 0x0332);
-                rtl8168_mdio_write(tp, 0x19, 0x91f2);
-                rtl8168_mdio_write(tp, 0x15, 0x033f);
-                rtl8168_mdio_write(tp, 0x19, 0xb6cd);
-                rtl8168_mdio_write(tp, 0x15, 0x0340);
-                rtl8168_mdio_write(tp, 0x19, 0x9e01);
-                rtl8168_mdio_write(tp, 0x15, 0x0341);
-                rtl8168_mdio_write(tp, 0x19, 0xd11d);
-                rtl8168_mdio_write(tp, 0x15, 0x0342);
-                rtl8168_mdio_write(tp, 0x19, 0x009d);
-                rtl8168_mdio_write(tp, 0x15, 0x0343);
-                rtl8168_mdio_write(tp, 0x19, 0xbb1c);
-                rtl8168_mdio_write(tp, 0x15, 0x0344);
-                rtl8168_mdio_write(tp, 0x19, 0x8102);
-                rtl8168_mdio_write(tp, 0x15, 0x0345);
-                rtl8168_mdio_write(tp, 0x19, 0x3348);
-                rtl8168_mdio_write(tp, 0x15, 0x0346);
-                rtl8168_mdio_write(tp, 0x19, 0xa231);
-                rtl8168_mdio_write(tp, 0x15, 0x0347);
-                rtl8168_mdio_write(tp, 0x19, 0x335b);
-                rtl8168_mdio_write(tp, 0x15, 0x0348);
-                rtl8168_mdio_write(tp, 0x19, 0x91f7);
-                rtl8168_mdio_write(tp, 0x15, 0x0349);
-                rtl8168_mdio_write(tp, 0x19, 0xc218);
-                rtl8168_mdio_write(tp, 0x15, 0x034a);
-                rtl8168_mdio_write(tp, 0x19, 0x00f5);
-                rtl8168_mdio_write(tp, 0x15, 0x034b);
-                rtl8168_mdio_write(tp, 0x19, 0x335b);
-                rtl8168_mdio_write(tp, 0x15, 0x034c);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x034d);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x034e);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x034f);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x0350);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x035b);
-                rtl8168_mdio_write(tp, 0x19, 0xa23c);
-                rtl8168_mdio_write(tp, 0x15, 0x035c);
-                rtl8168_mdio_write(tp, 0x19, 0x7c08);
-                rtl8168_mdio_write(tp, 0x15, 0x035d);
-                rtl8168_mdio_write(tp, 0x19, 0x4c00);
-                rtl8168_mdio_write(tp, 0x15, 0x035e);
-                rtl8168_mdio_write(tp, 0x19, 0x3397);
-                rtl8168_mdio_write(tp, 0x15, 0x0363);
-                rtl8168_mdio_write(tp, 0x19, 0xb6a9);
-                rtl8168_mdio_write(tp, 0x15, 0x0366);
-                rtl8168_mdio_write(tp, 0x19, 0x00f5);
-                rtl8168_mdio_write(tp, 0x15, 0x0382);
-                rtl8168_mdio_write(tp, 0x19, 0x7c40);
-                rtl8168_mdio_write(tp, 0x15, 0x0388);
-                rtl8168_mdio_write(tp, 0x19, 0x0084);
-                rtl8168_mdio_write(tp, 0x15, 0x0389);
-                rtl8168_mdio_write(tp, 0x19, 0xdd17);
-                rtl8168_mdio_write(tp, 0x15, 0x038a);
-                rtl8168_mdio_write(tp, 0x19, 0x000b);
-                rtl8168_mdio_write(tp, 0x15, 0x038b);
-                rtl8168_mdio_write(tp, 0x19, 0xa10a);
-                rtl8168_mdio_write(tp, 0x15, 0x038c);
-                rtl8168_mdio_write(tp, 0x19, 0x337e);
-                rtl8168_mdio_write(tp, 0x15, 0x038d);
-                rtl8168_mdio_write(tp, 0x19, 0x6c0b);
-                rtl8168_mdio_write(tp, 0x15, 0x038e);
-                rtl8168_mdio_write(tp, 0x19, 0xa107);
-                rtl8168_mdio_write(tp, 0x15, 0x038f);
-                rtl8168_mdio_write(tp, 0x19, 0x6c08);
-                rtl8168_mdio_write(tp, 0x15, 0x0390);
-                rtl8168_mdio_write(tp, 0x19, 0xc017);
-                rtl8168_mdio_write(tp, 0x15, 0x0391);
-                rtl8168_mdio_write(tp, 0x19, 0x0004);
-                rtl8168_mdio_write(tp, 0x15, 0x0392);
-                rtl8168_mdio_write(tp, 0x19, 0xd64f);
-                rtl8168_mdio_write(tp, 0x15, 0x0393);
-                rtl8168_mdio_write(tp, 0x19, 0x00f4);
-                rtl8168_mdio_write(tp, 0x15, 0x0397);
-                rtl8168_mdio_write(tp, 0x19, 0x4098);
-                rtl8168_mdio_write(tp, 0x15, 0x0398);
-                rtl8168_mdio_write(tp, 0x19, 0x4408);
-                rtl8168_mdio_write(tp, 0x15, 0x0399);
-                rtl8168_mdio_write(tp, 0x19, 0x55bf);
-                rtl8168_mdio_write(tp, 0x15, 0x039a);
-                rtl8168_mdio_write(tp, 0x19, 0x4bb9);
-                rtl8168_mdio_write(tp, 0x15, 0x039b);
-                rtl8168_mdio_write(tp, 0x19, 0x6810);
-                rtl8168_mdio_write(tp, 0x15, 0x039c);
-                rtl8168_mdio_write(tp, 0x19, 0x4b29);
-                rtl8168_mdio_write(tp, 0x15, 0x039d);
-                rtl8168_mdio_write(tp, 0x19, 0x4041);
-                rtl8168_mdio_write(tp, 0x15, 0x039e);
-                rtl8168_mdio_write(tp, 0x19, 0x442a);
-                rtl8168_mdio_write(tp, 0x15, 0x039f);
-                rtl8168_mdio_write(tp, 0x19, 0x4029);
-                rtl8168_mdio_write(tp, 0x15, 0x03aa);
-                rtl8168_mdio_write(tp, 0x19, 0x33b8);
-                rtl8168_mdio_write(tp, 0x15, 0x03b6);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03b7);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03b8);
-                rtl8168_mdio_write(tp, 0x19, 0x543f);
-                rtl8168_mdio_write(tp, 0x15, 0x03b9);
-                rtl8168_mdio_write(tp, 0x19, 0x499a);
-                rtl8168_mdio_write(tp, 0x15, 0x03ba);
-                rtl8168_mdio_write(tp, 0x19, 0x7c40);
-                rtl8168_mdio_write(tp, 0x15, 0x03bb);
-                rtl8168_mdio_write(tp, 0x19, 0x4c40);
-                rtl8168_mdio_write(tp, 0x15, 0x03bc);
-                rtl8168_mdio_write(tp, 0x19, 0x490a);
-                rtl8168_mdio_write(tp, 0x15, 0x03bd);
-                rtl8168_mdio_write(tp, 0x19, 0x405e);
-                rtl8168_mdio_write(tp, 0x15, 0x03c2);
-                rtl8168_mdio_write(tp, 0x19, 0x9a03);
-                rtl8168_mdio_write(tp, 0x15, 0x03c4);
-                rtl8168_mdio_write(tp, 0x19, 0x0015);
-                rtl8168_mdio_write(tp, 0x15, 0x03c5);
-                rtl8168_mdio_write(tp, 0x19, 0x9e03);
-                rtl8168_mdio_write(tp, 0x15, 0x03c8);
-                rtl8168_mdio_write(tp, 0x19, 0x9cf7);
-                rtl8168_mdio_write(tp, 0x15, 0x03c9);
-                rtl8168_mdio_write(tp, 0x19, 0x7c12);
-                rtl8168_mdio_write(tp, 0x15, 0x03ca);
-                rtl8168_mdio_write(tp, 0x19, 0x4c52);
-                rtl8168_mdio_write(tp, 0x15, 0x03cb);
-                rtl8168_mdio_write(tp, 0x19, 0x4458);
-                rtl8168_mdio_write(tp, 0x15, 0x03cd);
-                rtl8168_mdio_write(tp, 0x19, 0x4c40);
-                rtl8168_mdio_write(tp, 0x15, 0x03ce);
-                rtl8168_mdio_write(tp, 0x19, 0x33bf);
-                rtl8168_mdio_write(tp, 0x15, 0x03cf);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03d0);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03d1);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03d5);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03d6);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03d7);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03d8);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03d9);
-                rtl8168_mdio_write(tp, 0x19, 0x49bb);
-                rtl8168_mdio_write(tp, 0x15, 0x03da);
-                rtl8168_mdio_write(tp, 0x19, 0x4478);
-                rtl8168_mdio_write(tp, 0x15, 0x03db);
-                rtl8168_mdio_write(tp, 0x19, 0x492b);
-                rtl8168_mdio_write(tp, 0x15, 0x03dc);
-                rtl8168_mdio_write(tp, 0x19, 0x7c01);
-                rtl8168_mdio_write(tp, 0x15, 0x03dd);
-                rtl8168_mdio_write(tp, 0x19, 0x4c00);
-                rtl8168_mdio_write(tp, 0x15, 0x03de);
-                rtl8168_mdio_write(tp, 0x19, 0xbd1a);
-                rtl8168_mdio_write(tp, 0x15, 0x03df);
-                rtl8168_mdio_write(tp, 0x19, 0xc428);
-                rtl8168_mdio_write(tp, 0x15, 0x03e0);
-                rtl8168_mdio_write(tp, 0x19, 0x0008);
-                rtl8168_mdio_write(tp, 0x15, 0x03e1);
-                rtl8168_mdio_write(tp, 0x19, 0x9cfd);
-                rtl8168_mdio_write(tp, 0x15, 0x03e2);
-                rtl8168_mdio_write(tp, 0x19, 0x7c12);
-                rtl8168_mdio_write(tp, 0x15, 0x03e3);
-                rtl8168_mdio_write(tp, 0x19, 0x4c52);
-                rtl8168_mdio_write(tp, 0x15, 0x03e4);
-                rtl8168_mdio_write(tp, 0x19, 0x4458);
-                rtl8168_mdio_write(tp, 0x15, 0x03e5);
-                rtl8168_mdio_write(tp, 0x19, 0x7c12);
-                rtl8168_mdio_write(tp, 0x15, 0x03e6);
-                rtl8168_mdio_write(tp, 0x19, 0x4c40);
-                rtl8168_mdio_write(tp, 0x15, 0x03e7);
-                rtl8168_mdio_write(tp, 0x19, 0x33de);
-                rtl8168_mdio_write(tp, 0x15, 0x03e8);
-                rtl8168_mdio_write(tp, 0x19, 0xc218);
-                rtl8168_mdio_write(tp, 0x15, 0x03e9);
-                rtl8168_mdio_write(tp, 0x19, 0x0002);
-                rtl8168_mdio_write(tp, 0x15, 0x03ea);
-                rtl8168_mdio_write(tp, 0x19, 0x32df);
-                rtl8168_mdio_write(tp, 0x15, 0x03eb);
-                rtl8168_mdio_write(tp, 0x19, 0x3316);
-                rtl8168_mdio_write(tp, 0x15, 0x03ec);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03ed);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03ee);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03ef);
-                rtl8168_mdio_write(tp, 0x19, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x03f7);
-                rtl8168_mdio_write(tp, 0x19, 0x330c);
-                rtl8168_mdio_write(tp, 0x16, 0x0306);
-                rtl8168_mdio_write(tp, 0x16, 0x0300);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0xfff6);
-                rtl8168_mdio_write(tp, 0x06, 0x0080);
-                rtl8168_mdio_write(tp, 0x05, 0x8000);
-                rtl8168_mdio_write(tp, 0x06, 0x0280);
-                rtl8168_mdio_write(tp, 0x06, 0x48f7);
-                rtl8168_mdio_write(tp, 0x06, 0x00e0);
-                rtl8168_mdio_write(tp, 0x06, 0xfff7);
-                rtl8168_mdio_write(tp, 0x06, 0xa080);
-                rtl8168_mdio_write(tp, 0x06, 0x02ae);
-                rtl8168_mdio_write(tp, 0x06, 0xf602);
-                rtl8168_mdio_write(tp, 0x06, 0x0200);
-                rtl8168_mdio_write(tp, 0x06, 0x0280);
-                rtl8168_mdio_write(tp, 0x06, 0x9002);
-                rtl8168_mdio_write(tp, 0x06, 0x0224);
-                rtl8168_mdio_write(tp, 0x06, 0x0202);
-                rtl8168_mdio_write(tp, 0x06, 0x3402);
-                rtl8168_mdio_write(tp, 0x06, 0x027f);
-                rtl8168_mdio_write(tp, 0x06, 0x0280);
-                rtl8168_mdio_write(tp, 0x06, 0xa602);
-                rtl8168_mdio_write(tp, 0x06, 0x80bf);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x88e1);
-                rtl8168_mdio_write(tp, 0x06, 0x8b89);
-                rtl8168_mdio_write(tp, 0x06, 0x1e01);
-                rtl8168_mdio_write(tp, 0x06, 0xe18b);
-                rtl8168_mdio_write(tp, 0x06, 0x8a1e);
-                rtl8168_mdio_write(tp, 0x06, 0x01e1);
-                rtl8168_mdio_write(tp, 0x06, 0x8b8b);
-                rtl8168_mdio_write(tp, 0x06, 0x1e01);
-                rtl8168_mdio_write(tp, 0x06, 0xe18b);
-                rtl8168_mdio_write(tp, 0x06, 0x8c1e);
-                rtl8168_mdio_write(tp, 0x06, 0x01e1);
-                rtl8168_mdio_write(tp, 0x06, 0x8b8d);
-                rtl8168_mdio_write(tp, 0x06, 0x1e01);
-                rtl8168_mdio_write(tp, 0x06, 0xe18b);
-                rtl8168_mdio_write(tp, 0x06, 0x8e1e);
-                rtl8168_mdio_write(tp, 0x06, 0x01a0);
-                rtl8168_mdio_write(tp, 0x06, 0x00c7);
-                rtl8168_mdio_write(tp, 0x06, 0xaebb);
-                rtl8168_mdio_write(tp, 0x06, 0xee8a);
-                rtl8168_mdio_write(tp, 0x06, 0xe600);
-                rtl8168_mdio_write(tp, 0x06, 0xee8a);
-                rtl8168_mdio_write(tp, 0x06, 0xee03);
-                rtl8168_mdio_write(tp, 0x06, 0xee8a);
-                rtl8168_mdio_write(tp, 0x06, 0xefb8);
-                rtl8168_mdio_write(tp, 0x06, 0xee8a);
-                rtl8168_mdio_write(tp, 0x06, 0xe902);
-                rtl8168_mdio_write(tp, 0x06, 0xee8b);
-                rtl8168_mdio_write(tp, 0x06, 0x8285);
-                rtl8168_mdio_write(tp, 0x06, 0xee8b);
-                rtl8168_mdio_write(tp, 0x06, 0x8520);
-                rtl8168_mdio_write(tp, 0x06, 0xee8b);
-                rtl8168_mdio_write(tp, 0x06, 0x8701);
-                rtl8168_mdio_write(tp, 0x06, 0xd481);
-                rtl8168_mdio_write(tp, 0x06, 0x35e4);
-                rtl8168_mdio_write(tp, 0x06, 0x8b94);
-                rtl8168_mdio_write(tp, 0x06, 0xe58b);
-                rtl8168_mdio_write(tp, 0x06, 0x95bf);
-                rtl8168_mdio_write(tp, 0x06, 0x8b88);
-                rtl8168_mdio_write(tp, 0x06, 0xec00);
-                rtl8168_mdio_write(tp, 0x06, 0x19a9);
-                rtl8168_mdio_write(tp, 0x06, 0x8b90);
-                rtl8168_mdio_write(tp, 0x06, 0xf9ee);
-                rtl8168_mdio_write(tp, 0x06, 0xfff6);
-                rtl8168_mdio_write(tp, 0x06, 0x00ee);
-                rtl8168_mdio_write(tp, 0x06, 0xfff7);
-                rtl8168_mdio_write(tp, 0x06, 0xffe0);
-                rtl8168_mdio_write(tp, 0x06, 0xe140);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e1);
-                rtl8168_mdio_write(tp, 0x06, 0x41f7);
-                rtl8168_mdio_write(tp, 0x06, 0x2ff6);
-                rtl8168_mdio_write(tp, 0x06, 0x28e4);
-                rtl8168_mdio_write(tp, 0x06, 0xe140);
-                rtl8168_mdio_write(tp, 0x06, 0xe5e1);
-                rtl8168_mdio_write(tp, 0x06, 0x4104);
-                rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b89);
-                rtl8168_mdio_write(tp, 0x06, 0xad20);
-                rtl8168_mdio_write(tp, 0x06, 0x0dee);
-                rtl8168_mdio_write(tp, 0x06, 0x8b89);
-                rtl8168_mdio_write(tp, 0x06, 0x0002);
-                rtl8168_mdio_write(tp, 0x06, 0x82f4);
-                rtl8168_mdio_write(tp, 0x06, 0x021f);
-                rtl8168_mdio_write(tp, 0x06, 0x4102);
-                rtl8168_mdio_write(tp, 0x06, 0x2812);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b8d);
-                rtl8168_mdio_write(tp, 0x06, 0xad20);
-                rtl8168_mdio_write(tp, 0x06, 0x10ee);
-                rtl8168_mdio_write(tp, 0x06, 0x8b8d);
-                rtl8168_mdio_write(tp, 0x06, 0x0002);
-                rtl8168_mdio_write(tp, 0x06, 0x139d);
-                rtl8168_mdio_write(tp, 0x06, 0x0281);
-                rtl8168_mdio_write(tp, 0x06, 0xd602);
-                rtl8168_mdio_write(tp, 0x06, 0x1f99);
-                rtl8168_mdio_write(tp, 0x06, 0x0227);
-                rtl8168_mdio_write(tp, 0x06, 0xeafc);
-                rtl8168_mdio_write(tp, 0x06, 0x04f8);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x8ead);
-                rtl8168_mdio_write(tp, 0x06, 0x2014);
-                rtl8168_mdio_write(tp, 0x06, 0xf620);
-                rtl8168_mdio_write(tp, 0x06, 0xe48b);
-                rtl8168_mdio_write(tp, 0x06, 0x8e02);
-                rtl8168_mdio_write(tp, 0x06, 0x8104);
-                rtl8168_mdio_write(tp, 0x06, 0x021b);
-                rtl8168_mdio_write(tp, 0x06, 0xf402);
-                rtl8168_mdio_write(tp, 0x06, 0x2c9c);
-                rtl8168_mdio_write(tp, 0x06, 0x0281);
-                rtl8168_mdio_write(tp, 0x06, 0x7902);
-                rtl8168_mdio_write(tp, 0x06, 0x8443);
-                rtl8168_mdio_write(tp, 0x06, 0xad22);
-                rtl8168_mdio_write(tp, 0x06, 0x11f6);
-                rtl8168_mdio_write(tp, 0x06, 0x22e4);
-                rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-                rtl8168_mdio_write(tp, 0x06, 0x022c);
-                rtl8168_mdio_write(tp, 0x06, 0x4602);
-                rtl8168_mdio_write(tp, 0x06, 0x2ac5);
-                rtl8168_mdio_write(tp, 0x06, 0x0229);
-                rtl8168_mdio_write(tp, 0x06, 0x2002);
-                rtl8168_mdio_write(tp, 0x06, 0x2b91);
-                rtl8168_mdio_write(tp, 0x06, 0xad25);
-                rtl8168_mdio_write(tp, 0x06, 0x11f6);
-                rtl8168_mdio_write(tp, 0x06, 0x25e4);
-                rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-                rtl8168_mdio_write(tp, 0x06, 0x0284);
-                rtl8168_mdio_write(tp, 0x06, 0xe202);
-                rtl8168_mdio_write(tp, 0x06, 0x043a);
-                rtl8168_mdio_write(tp, 0x06, 0x021a);
-                rtl8168_mdio_write(tp, 0x06, 0x5902);
-                rtl8168_mdio_write(tp, 0x06, 0x2bfc);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xf8fa);
-                rtl8168_mdio_write(tp, 0x06, 0xef69);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-                rtl8168_mdio_write(tp, 0x06, 0x00e1);
-                rtl8168_mdio_write(tp, 0x06, 0xe001);
-                rtl8168_mdio_write(tp, 0x06, 0xad27);
-                rtl8168_mdio_write(tp, 0x06, 0x1fd1);
-                rtl8168_mdio_write(tp, 0x06, 0x01bf);
-                rtl8168_mdio_write(tp, 0x06, 0x8638);
-                rtl8168_mdio_write(tp, 0x06, 0x022f);
-                rtl8168_mdio_write(tp, 0x06, 0x50e0);
-                rtl8168_mdio_write(tp, 0x06, 0xe020);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-                rtl8168_mdio_write(tp, 0x06, 0x21ad);
-                rtl8168_mdio_write(tp, 0x06, 0x200e);
-                rtl8168_mdio_write(tp, 0x06, 0xd100);
-                rtl8168_mdio_write(tp, 0x06, 0xbf86);
-                rtl8168_mdio_write(tp, 0x06, 0x3802);
-                rtl8168_mdio_write(tp, 0x06, 0x2f50);
-                rtl8168_mdio_write(tp, 0x06, 0xbf3d);
-                rtl8168_mdio_write(tp, 0x06, 0x3902);
-                rtl8168_mdio_write(tp, 0x06, 0x2eb0);
-                rtl8168_mdio_write(tp, 0x06, 0xef96);
-                rtl8168_mdio_write(tp, 0x06, 0xfefc);
-                rtl8168_mdio_write(tp, 0x06, 0x0402);
-                rtl8168_mdio_write(tp, 0x06, 0x8591);
-                rtl8168_mdio_write(tp, 0x06, 0x0281);
-                rtl8168_mdio_write(tp, 0x06, 0x3c05);
-                rtl8168_mdio_write(tp, 0x06, 0xf8fa);
-                rtl8168_mdio_write(tp, 0x06, 0xef69);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
-                rtl8168_mdio_write(tp, 0x06, 0xfee1);
-                rtl8168_mdio_write(tp, 0x06, 0xe2ff);
-                rtl8168_mdio_write(tp, 0x06, 0xad2d);
-                rtl8168_mdio_write(tp, 0x06, 0x1ae0);
-                rtl8168_mdio_write(tp, 0x06, 0xe14e);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e1);
-                rtl8168_mdio_write(tp, 0x06, 0x4fac);
-                rtl8168_mdio_write(tp, 0x06, 0x2d22);
-                rtl8168_mdio_write(tp, 0x06, 0xf603);
-                rtl8168_mdio_write(tp, 0x06, 0x0203);
-                rtl8168_mdio_write(tp, 0x06, 0x36f7);
-                rtl8168_mdio_write(tp, 0x06, 0x03f7);
-                rtl8168_mdio_write(tp, 0x06, 0x06bf);
-                rtl8168_mdio_write(tp, 0x06, 0x8622);
-                rtl8168_mdio_write(tp, 0x06, 0x022e);
-                rtl8168_mdio_write(tp, 0x06, 0xb0ae);
-                rtl8168_mdio_write(tp, 0x06, 0x11e0);
-                rtl8168_mdio_write(tp, 0x06, 0xe14e);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e1);
-                rtl8168_mdio_write(tp, 0x06, 0x4fad);
-                rtl8168_mdio_write(tp, 0x06, 0x2d08);
-                rtl8168_mdio_write(tp, 0x06, 0xbf86);
-                rtl8168_mdio_write(tp, 0x06, 0x2d02);
-                rtl8168_mdio_write(tp, 0x06, 0x2eb0);
-                rtl8168_mdio_write(tp, 0x06, 0xf606);
-                rtl8168_mdio_write(tp, 0x06, 0xef96);
-                rtl8168_mdio_write(tp, 0x06, 0xfefc);
-                rtl8168_mdio_write(tp, 0x06, 0x04f8);
-                rtl8168_mdio_write(tp, 0x06, 0xf9fa);
-                rtl8168_mdio_write(tp, 0x06, 0xef69);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x87ad);
-                rtl8168_mdio_write(tp, 0x06, 0x204c);
-                rtl8168_mdio_write(tp, 0x06, 0xd200);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
-                rtl8168_mdio_write(tp, 0x06, 0x0058);
-                rtl8168_mdio_write(tp, 0x06, 0x010c);
-                rtl8168_mdio_write(tp, 0x06, 0x021e);
-                rtl8168_mdio_write(tp, 0x06, 0x20e0);
-                rtl8168_mdio_write(tp, 0x06, 0xe000);
-                rtl8168_mdio_write(tp, 0x06, 0x5810);
-                rtl8168_mdio_write(tp, 0x06, 0x1e20);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-                rtl8168_mdio_write(tp, 0x06, 0x3658);
-                rtl8168_mdio_write(tp, 0x06, 0x031e);
-                rtl8168_mdio_write(tp, 0x06, 0x20e0);
-                rtl8168_mdio_write(tp, 0x06, 0xe022);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-                rtl8168_mdio_write(tp, 0x06, 0x2358);
-                rtl8168_mdio_write(tp, 0x06, 0xe01e);
-                rtl8168_mdio_write(tp, 0x06, 0x20e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8ae6);
-                rtl8168_mdio_write(tp, 0x06, 0x1f02);
-                rtl8168_mdio_write(tp, 0x06, 0x9e22);
-                rtl8168_mdio_write(tp, 0x06, 0xe68a);
-                rtl8168_mdio_write(tp, 0x06, 0xe6ad);
-                rtl8168_mdio_write(tp, 0x06, 0x3214);
-                rtl8168_mdio_write(tp, 0x06, 0xad34);
-                rtl8168_mdio_write(tp, 0x06, 0x11ef);
-                rtl8168_mdio_write(tp, 0x06, 0x0258);
-                rtl8168_mdio_write(tp, 0x06, 0x039e);
-                rtl8168_mdio_write(tp, 0x06, 0x07ad);
-                rtl8168_mdio_write(tp, 0x06, 0x3508);
-                rtl8168_mdio_write(tp, 0x06, 0x5ac0);
-                rtl8168_mdio_write(tp, 0x06, 0x9f04);
-                rtl8168_mdio_write(tp, 0x06, 0xd101);
-                rtl8168_mdio_write(tp, 0x06, 0xae02);
-                rtl8168_mdio_write(tp, 0x06, 0xd100);
-                rtl8168_mdio_write(tp, 0x06, 0xbf86);
-                rtl8168_mdio_write(tp, 0x06, 0x3e02);
-                rtl8168_mdio_write(tp, 0x06, 0x2f50);
-                rtl8168_mdio_write(tp, 0x06, 0xef96);
-                rtl8168_mdio_write(tp, 0x06, 0xfefd);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xf8f9);
-                rtl8168_mdio_write(tp, 0x06, 0xfae0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b81);
-                rtl8168_mdio_write(tp, 0x06, 0xac26);
-                rtl8168_mdio_write(tp, 0x06, 0x0ee0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b81);
-                rtl8168_mdio_write(tp, 0x06, 0xac21);
-                rtl8168_mdio_write(tp, 0x06, 0x08e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b87);
-                rtl8168_mdio_write(tp, 0x06, 0xac24);
-                rtl8168_mdio_write(tp, 0x06, 0x02ae);
-                rtl8168_mdio_write(tp, 0x06, 0x6bee);
-                rtl8168_mdio_write(tp, 0x06, 0xe0ea);
-                rtl8168_mdio_write(tp, 0x06, 0x00ee);
-                rtl8168_mdio_write(tp, 0x06, 0xe0eb);
-                rtl8168_mdio_write(tp, 0x06, 0x00e2);
-                rtl8168_mdio_write(tp, 0x06, 0xe07c);
-                rtl8168_mdio_write(tp, 0x06, 0xe3e0);
-                rtl8168_mdio_write(tp, 0x06, 0x7da5);
-                rtl8168_mdio_write(tp, 0x06, 0x1111);
-                rtl8168_mdio_write(tp, 0x06, 0x15d2);
-                rtl8168_mdio_write(tp, 0x06, 0x60d6);
-                rtl8168_mdio_write(tp, 0x06, 0x6666);
-                rtl8168_mdio_write(tp, 0x06, 0x0207);
-                rtl8168_mdio_write(tp, 0x06, 0xf9d2);
-                rtl8168_mdio_write(tp, 0x06, 0xa0d6);
-                rtl8168_mdio_write(tp, 0x06, 0xaaaa);
-                rtl8168_mdio_write(tp, 0x06, 0x0207);
-                rtl8168_mdio_write(tp, 0x06, 0xf902);
-                rtl8168_mdio_write(tp, 0x06, 0x825c);
-                rtl8168_mdio_write(tp, 0x06, 0xae44);
-                rtl8168_mdio_write(tp, 0x06, 0xa566);
-                rtl8168_mdio_write(tp, 0x06, 0x6602);
-                rtl8168_mdio_write(tp, 0x06, 0xae38);
-                rtl8168_mdio_write(tp, 0x06, 0xa5aa);
-                rtl8168_mdio_write(tp, 0x06, 0xaa02);
-                rtl8168_mdio_write(tp, 0x06, 0xae32);
-                rtl8168_mdio_write(tp, 0x06, 0xeee0);
-                rtl8168_mdio_write(tp, 0x06, 0xea04);
-                rtl8168_mdio_write(tp, 0x06, 0xeee0);
-                rtl8168_mdio_write(tp, 0x06, 0xeb06);
-                rtl8168_mdio_write(tp, 0x06, 0xe2e0);
-                rtl8168_mdio_write(tp, 0x06, 0x7ce3);
-                rtl8168_mdio_write(tp, 0x06, 0xe07d);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-                rtl8168_mdio_write(tp, 0x06, 0x38e1);
-                rtl8168_mdio_write(tp, 0x06, 0xe039);
-                rtl8168_mdio_write(tp, 0x06, 0xad2e);
-                rtl8168_mdio_write(tp, 0x06, 0x21ad);
-                rtl8168_mdio_write(tp, 0x06, 0x3f13);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e4);
-                rtl8168_mdio_write(tp, 0x06, 0x14e1);
-                rtl8168_mdio_write(tp, 0x06, 0xe415);
-                rtl8168_mdio_write(tp, 0x06, 0x6880);
-                rtl8168_mdio_write(tp, 0x06, 0xe4e4);
-                rtl8168_mdio_write(tp, 0x06, 0x14e5);
-                rtl8168_mdio_write(tp, 0x06, 0xe415);
-                rtl8168_mdio_write(tp, 0x06, 0x0282);
-                rtl8168_mdio_write(tp, 0x06, 0x5cae);
-                rtl8168_mdio_write(tp, 0x06, 0x0bac);
-                rtl8168_mdio_write(tp, 0x06, 0x3e02);
-                rtl8168_mdio_write(tp, 0x06, 0xae06);
-                rtl8168_mdio_write(tp, 0x06, 0x0282);
-                rtl8168_mdio_write(tp, 0x06, 0x8602);
-                rtl8168_mdio_write(tp, 0x06, 0x82b0);
-                rtl8168_mdio_write(tp, 0x06, 0xfefd);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xf8e1);
-                rtl8168_mdio_write(tp, 0x06, 0x8b2e);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x81ad);
-                rtl8168_mdio_write(tp, 0x06, 0x2605);
-                rtl8168_mdio_write(tp, 0x06, 0x0221);
-                rtl8168_mdio_write(tp, 0x06, 0xf3f7);
-                rtl8168_mdio_write(tp, 0x06, 0x28e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b81);
-                rtl8168_mdio_write(tp, 0x06, 0xad21);
-                rtl8168_mdio_write(tp, 0x06, 0x0502);
-                rtl8168_mdio_write(tp, 0x06, 0x22f8);
-                rtl8168_mdio_write(tp, 0x06, 0xf729);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x87ad);
-                rtl8168_mdio_write(tp, 0x06, 0x2405);
-                rtl8168_mdio_write(tp, 0x06, 0x0282);
-                rtl8168_mdio_write(tp, 0x06, 0xebf7);
-                rtl8168_mdio_write(tp, 0x06, 0x2ae5);
-                rtl8168_mdio_write(tp, 0x06, 0x8b2e);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b81);
-                rtl8168_mdio_write(tp, 0x06, 0xad26);
-                rtl8168_mdio_write(tp, 0x06, 0x0302);
-                rtl8168_mdio_write(tp, 0x06, 0x2134);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x81ad);
-                rtl8168_mdio_write(tp, 0x06, 0x2109);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x2eac);
-                rtl8168_mdio_write(tp, 0x06, 0x2003);
-                rtl8168_mdio_write(tp, 0x06, 0x0283);
-                rtl8168_mdio_write(tp, 0x06, 0x52e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b87);
-                rtl8168_mdio_write(tp, 0x06, 0xad24);
-                rtl8168_mdio_write(tp, 0x06, 0x09e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b2e);
-                rtl8168_mdio_write(tp, 0x06, 0xac21);
-                rtl8168_mdio_write(tp, 0x06, 0x0302);
-                rtl8168_mdio_write(tp, 0x06, 0x8337);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xf8e1);
-                rtl8168_mdio_write(tp, 0x06, 0x8b2e);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x81ad);
-                rtl8168_mdio_write(tp, 0x06, 0x2608);
-                rtl8168_mdio_write(tp, 0x06, 0xe085);
-                rtl8168_mdio_write(tp, 0x06, 0xd2ad);
-                rtl8168_mdio_write(tp, 0x06, 0x2502);
-                rtl8168_mdio_write(tp, 0x06, 0xf628);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x81ad);
-                rtl8168_mdio_write(tp, 0x06, 0x210a);
-                rtl8168_mdio_write(tp, 0x06, 0xe086);
-                rtl8168_mdio_write(tp, 0x06, 0x0af6);
-                rtl8168_mdio_write(tp, 0x06, 0x27a0);
-                rtl8168_mdio_write(tp, 0x06, 0x0502);
-                rtl8168_mdio_write(tp, 0x06, 0xf629);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x87ad);
-                rtl8168_mdio_write(tp, 0x06, 0x2408);
-                rtl8168_mdio_write(tp, 0x06, 0xe08a);
-                rtl8168_mdio_write(tp, 0x06, 0xedad);
-                rtl8168_mdio_write(tp, 0x06, 0x2002);
-                rtl8168_mdio_write(tp, 0x06, 0xf62a);
-                rtl8168_mdio_write(tp, 0x06, 0xe58b);
-                rtl8168_mdio_write(tp, 0x06, 0x2ea1);
-                rtl8168_mdio_write(tp, 0x06, 0x0003);
-                rtl8168_mdio_write(tp, 0x06, 0x0221);
-                rtl8168_mdio_write(tp, 0x06, 0x11fc);
-                rtl8168_mdio_write(tp, 0x06, 0x04ee);
-                rtl8168_mdio_write(tp, 0x06, 0x8aed);
-                rtl8168_mdio_write(tp, 0x06, 0x00ee);
-                rtl8168_mdio_write(tp, 0x06, 0x8aec);
-                rtl8168_mdio_write(tp, 0x06, 0x0004);
-                rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b87);
-                rtl8168_mdio_write(tp, 0x06, 0xad24);
-                rtl8168_mdio_write(tp, 0x06, 0x3ae0);
-                rtl8168_mdio_write(tp, 0x06, 0xe0ea);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-                rtl8168_mdio_write(tp, 0x06, 0xeb58);
-                rtl8168_mdio_write(tp, 0x06, 0xf8d1);
-                rtl8168_mdio_write(tp, 0x06, 0x01e4);
-                rtl8168_mdio_write(tp, 0x06, 0xe0ea);
-                rtl8168_mdio_write(tp, 0x06, 0xe5e0);
-                rtl8168_mdio_write(tp, 0x06, 0xebe0);
-                rtl8168_mdio_write(tp, 0x06, 0xe07c);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-                rtl8168_mdio_write(tp, 0x06, 0x7d5c);
-                rtl8168_mdio_write(tp, 0x06, 0x00ff);
-                rtl8168_mdio_write(tp, 0x06, 0x3c00);
-                rtl8168_mdio_write(tp, 0x06, 0x1eab);
-                rtl8168_mdio_write(tp, 0x06, 0x1ce0);
-                rtl8168_mdio_write(tp, 0x06, 0xe04c);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-                rtl8168_mdio_write(tp, 0x06, 0x4d58);
-                rtl8168_mdio_write(tp, 0x06, 0xc1e4);
-                rtl8168_mdio_write(tp, 0x06, 0xe04c);
-                rtl8168_mdio_write(tp, 0x06, 0xe5e0);
-                rtl8168_mdio_write(tp, 0x06, 0x4de0);
-                rtl8168_mdio_write(tp, 0x06, 0xe0ee);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-                rtl8168_mdio_write(tp, 0x06, 0xef69);
-                rtl8168_mdio_write(tp, 0x06, 0x3ce4);
-                rtl8168_mdio_write(tp, 0x06, 0xe0ee);
-                rtl8168_mdio_write(tp, 0x06, 0xe5e0);
-                rtl8168_mdio_write(tp, 0x06, 0xeffc);
-                rtl8168_mdio_write(tp, 0x06, 0x04f8);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x87ad);
-                rtl8168_mdio_write(tp, 0x06, 0x2412);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-                rtl8168_mdio_write(tp, 0x06, 0xeee1);
-                rtl8168_mdio_write(tp, 0x06, 0xe0ef);
-                rtl8168_mdio_write(tp, 0x06, 0x59c3);
-                rtl8168_mdio_write(tp, 0x06, 0xe4e0);
-                rtl8168_mdio_write(tp, 0x06, 0xeee5);
-                rtl8168_mdio_write(tp, 0x06, 0xe0ef);
-                rtl8168_mdio_write(tp, 0x06, 0xee8a);
-                rtl8168_mdio_write(tp, 0x06, 0xed01);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b81);
-                rtl8168_mdio_write(tp, 0x06, 0xac25);
-                rtl8168_mdio_write(tp, 0x06, 0x0502);
-                rtl8168_mdio_write(tp, 0x06, 0x8363);
-                rtl8168_mdio_write(tp, 0x06, 0xae03);
-                rtl8168_mdio_write(tp, 0x06, 0x0225);
-                rtl8168_mdio_write(tp, 0x06, 0x16fc);
-                rtl8168_mdio_write(tp, 0x06, 0x04f8);
-                rtl8168_mdio_write(tp, 0x06, 0xf9fa);
-                rtl8168_mdio_write(tp, 0x06, 0xef69);
-                rtl8168_mdio_write(tp, 0x06, 0xfae0);
-                rtl8168_mdio_write(tp, 0x06, 0x860a);
-                rtl8168_mdio_write(tp, 0x06, 0xa000);
-                rtl8168_mdio_write(tp, 0x06, 0x19e0);
-                rtl8168_mdio_write(tp, 0x06, 0x860b);
-                rtl8168_mdio_write(tp, 0x06, 0xe18b);
-                rtl8168_mdio_write(tp, 0x06, 0x331b);
-                rtl8168_mdio_write(tp, 0x06, 0x109e);
-                rtl8168_mdio_write(tp, 0x06, 0x04aa);
-                rtl8168_mdio_write(tp, 0x06, 0x02ae);
-                rtl8168_mdio_write(tp, 0x06, 0x06ee);
-                rtl8168_mdio_write(tp, 0x06, 0x860a);
-                rtl8168_mdio_write(tp, 0x06, 0x01ae);
-                rtl8168_mdio_write(tp, 0x06, 0xe602);
-                rtl8168_mdio_write(tp, 0x06, 0x241e);
-                rtl8168_mdio_write(tp, 0x06, 0xae14);
-                rtl8168_mdio_write(tp, 0x06, 0xa001);
-                rtl8168_mdio_write(tp, 0x06, 0x1402);
-                rtl8168_mdio_write(tp, 0x06, 0x2426);
-                rtl8168_mdio_write(tp, 0x06, 0xbf26);
-                rtl8168_mdio_write(tp, 0x06, 0x6d02);
-                rtl8168_mdio_write(tp, 0x06, 0x2eb0);
-                rtl8168_mdio_write(tp, 0x06, 0xee86);
-                rtl8168_mdio_write(tp, 0x06, 0x0b00);
-                rtl8168_mdio_write(tp, 0x06, 0xee86);
-                rtl8168_mdio_write(tp, 0x06, 0x0a02);
-                rtl8168_mdio_write(tp, 0x06, 0xaf84);
-                rtl8168_mdio_write(tp, 0x06, 0x3ca0);
-                rtl8168_mdio_write(tp, 0x06, 0x0252);
-                rtl8168_mdio_write(tp, 0x06, 0xee86);
-                rtl8168_mdio_write(tp, 0x06, 0x0400);
-                rtl8168_mdio_write(tp, 0x06, 0xee86);
-                rtl8168_mdio_write(tp, 0x06, 0x0500);
-                rtl8168_mdio_write(tp, 0x06, 0xe086);
-                rtl8168_mdio_write(tp, 0x06, 0x0be1);
-                rtl8168_mdio_write(tp, 0x06, 0x8b32);
-                rtl8168_mdio_write(tp, 0x06, 0x1b10);
-                rtl8168_mdio_write(tp, 0x06, 0x9e04);
-                rtl8168_mdio_write(tp, 0x06, 0xaa02);
-                rtl8168_mdio_write(tp, 0x06, 0xaecb);
-                rtl8168_mdio_write(tp, 0x06, 0xee86);
-                rtl8168_mdio_write(tp, 0x06, 0x0b00);
-                rtl8168_mdio_write(tp, 0x06, 0x0224);
-                rtl8168_mdio_write(tp, 0x06, 0x3ae2);
-                rtl8168_mdio_write(tp, 0x06, 0x8604);
-                rtl8168_mdio_write(tp, 0x06, 0xe386);
-                rtl8168_mdio_write(tp, 0x06, 0x05ef);
-                rtl8168_mdio_write(tp, 0x06, 0x65e2);
-                rtl8168_mdio_write(tp, 0x06, 0x8606);
-                rtl8168_mdio_write(tp, 0x06, 0xe386);
-                rtl8168_mdio_write(tp, 0x06, 0x071b);
-                rtl8168_mdio_write(tp, 0x06, 0x56aa);
-                rtl8168_mdio_write(tp, 0x06, 0x0eef);
-                rtl8168_mdio_write(tp, 0x06, 0x56e6);
-                rtl8168_mdio_write(tp, 0x06, 0x8606);
-                rtl8168_mdio_write(tp, 0x06, 0xe786);
-                rtl8168_mdio_write(tp, 0x06, 0x07e2);
-                rtl8168_mdio_write(tp, 0x06, 0x8609);
-                rtl8168_mdio_write(tp, 0x06, 0xe686);
-                rtl8168_mdio_write(tp, 0x06, 0x08e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8609);
-                rtl8168_mdio_write(tp, 0x06, 0xa000);
-                rtl8168_mdio_write(tp, 0x06, 0x07ee);
-                rtl8168_mdio_write(tp, 0x06, 0x860a);
-                rtl8168_mdio_write(tp, 0x06, 0x03af);
-                rtl8168_mdio_write(tp, 0x06, 0x8369);
-                rtl8168_mdio_write(tp, 0x06, 0x0224);
-                rtl8168_mdio_write(tp, 0x06, 0x8e02);
-                rtl8168_mdio_write(tp, 0x06, 0x2426);
-                rtl8168_mdio_write(tp, 0x06, 0xae48);
-                rtl8168_mdio_write(tp, 0x06, 0xa003);
-                rtl8168_mdio_write(tp, 0x06, 0x21e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8608);
-                rtl8168_mdio_write(tp, 0x06, 0xe186);
-                rtl8168_mdio_write(tp, 0x06, 0x091b);
-                rtl8168_mdio_write(tp, 0x06, 0x019e);
-                rtl8168_mdio_write(tp, 0x06, 0x0caa);
-                rtl8168_mdio_write(tp, 0x06, 0x0502);
-                rtl8168_mdio_write(tp, 0x06, 0x249d);
-                rtl8168_mdio_write(tp, 0x06, 0xaee7);
-                rtl8168_mdio_write(tp, 0x06, 0x0224);
-                rtl8168_mdio_write(tp, 0x06, 0x8eae);
-                rtl8168_mdio_write(tp, 0x06, 0xe2ee);
-                rtl8168_mdio_write(tp, 0x06, 0x860a);
-                rtl8168_mdio_write(tp, 0x06, 0x04ee);
-                rtl8168_mdio_write(tp, 0x06, 0x860b);
-                rtl8168_mdio_write(tp, 0x06, 0x00af);
-                rtl8168_mdio_write(tp, 0x06, 0x8369);
-                rtl8168_mdio_write(tp, 0x06, 0xa004);
-                rtl8168_mdio_write(tp, 0x06, 0x15e0);
-                rtl8168_mdio_write(tp, 0x06, 0x860b);
-                rtl8168_mdio_write(tp, 0x06, 0xe18b);
-                rtl8168_mdio_write(tp, 0x06, 0x341b);
-                rtl8168_mdio_write(tp, 0x06, 0x109e);
-                rtl8168_mdio_write(tp, 0x06, 0x05aa);
-                rtl8168_mdio_write(tp, 0x06, 0x03af);
-                rtl8168_mdio_write(tp, 0x06, 0x8383);
-                rtl8168_mdio_write(tp, 0x06, 0xee86);
-                rtl8168_mdio_write(tp, 0x06, 0x0a05);
-                rtl8168_mdio_write(tp, 0x06, 0xae0c);
-                rtl8168_mdio_write(tp, 0x06, 0xa005);
-                rtl8168_mdio_write(tp, 0x06, 0x02ae);
-                rtl8168_mdio_write(tp, 0x06, 0x0702);
-                rtl8168_mdio_write(tp, 0x06, 0x2309);
-                rtl8168_mdio_write(tp, 0x06, 0xee86);
-                rtl8168_mdio_write(tp, 0x06, 0x0a00);
-                rtl8168_mdio_write(tp, 0x06, 0xfeef);
-                rtl8168_mdio_write(tp, 0x06, 0x96fe);
-                rtl8168_mdio_write(tp, 0x06, 0xfdfc);
-                rtl8168_mdio_write(tp, 0x06, 0x04f8);
-                rtl8168_mdio_write(tp, 0x06, 0xf9fa);
-                rtl8168_mdio_write(tp, 0x06, 0xef69);
-                rtl8168_mdio_write(tp, 0x06, 0xfbe0);
-                rtl8168_mdio_write(tp, 0x06, 0x8b85);
-                rtl8168_mdio_write(tp, 0x06, 0xad25);
-                rtl8168_mdio_write(tp, 0x06, 0x22e0);
-                rtl8168_mdio_write(tp, 0x06, 0xe022);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-                rtl8168_mdio_write(tp, 0x06, 0x23e2);
-                rtl8168_mdio_write(tp, 0x06, 0xe036);
-                rtl8168_mdio_write(tp, 0x06, 0xe3e0);
-                rtl8168_mdio_write(tp, 0x06, 0x375a);
-                rtl8168_mdio_write(tp, 0x06, 0xc40d);
-                rtl8168_mdio_write(tp, 0x06, 0x0158);
-                rtl8168_mdio_write(tp, 0x06, 0x021e);
-                rtl8168_mdio_write(tp, 0x06, 0x20e3);
-                rtl8168_mdio_write(tp, 0x06, 0x8ae7);
-                rtl8168_mdio_write(tp, 0x06, 0xac31);
-                rtl8168_mdio_write(tp, 0x06, 0x60ac);
-                rtl8168_mdio_write(tp, 0x06, 0x3a08);
-                rtl8168_mdio_write(tp, 0x06, 0xac3e);
-                rtl8168_mdio_write(tp, 0x06, 0x26ae);
-                rtl8168_mdio_write(tp, 0x06, 0x67af);
-                rtl8168_mdio_write(tp, 0x06, 0x84db);
-                rtl8168_mdio_write(tp, 0x06, 0xad37);
-                rtl8168_mdio_write(tp, 0x06, 0x61e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8ae8);
-                rtl8168_mdio_write(tp, 0x06, 0x10e4);
-                rtl8168_mdio_write(tp, 0x06, 0x8ae8);
-                rtl8168_mdio_write(tp, 0x06, 0xe18a);
-                rtl8168_mdio_write(tp, 0x06, 0xe91b);
-                rtl8168_mdio_write(tp, 0x06, 0x109e);
-                rtl8168_mdio_write(tp, 0x06, 0x02ae);
-                rtl8168_mdio_write(tp, 0x06, 0x51d1);
-                rtl8168_mdio_write(tp, 0x06, 0x00bf);
-                rtl8168_mdio_write(tp, 0x06, 0x863b);
-                rtl8168_mdio_write(tp, 0x06, 0x022f);
-                rtl8168_mdio_write(tp, 0x06, 0x50ee);
-                rtl8168_mdio_write(tp, 0x06, 0x8ae8);
-                rtl8168_mdio_write(tp, 0x06, 0x00ae);
-                rtl8168_mdio_write(tp, 0x06, 0x43ad);
-                rtl8168_mdio_write(tp, 0x06, 0x3627);
-                rtl8168_mdio_write(tp, 0x06, 0xe08a);
-                rtl8168_mdio_write(tp, 0x06, 0xeee1);
-                rtl8168_mdio_write(tp, 0x06, 0x8aef);
-                rtl8168_mdio_write(tp, 0x06, 0xef74);
-                rtl8168_mdio_write(tp, 0x06, 0xe08a);
-                rtl8168_mdio_write(tp, 0x06, 0xeae1);
-                rtl8168_mdio_write(tp, 0x06, 0x8aeb);
-                rtl8168_mdio_write(tp, 0x06, 0x1b74);
-                rtl8168_mdio_write(tp, 0x06, 0x9e2e);
-                rtl8168_mdio_write(tp, 0x06, 0x14e4);
-                rtl8168_mdio_write(tp, 0x06, 0x8aea);
-                rtl8168_mdio_write(tp, 0x06, 0xe58a);
-                rtl8168_mdio_write(tp, 0x06, 0xebef);
-                rtl8168_mdio_write(tp, 0x06, 0x74e0);
-                rtl8168_mdio_write(tp, 0x06, 0x8aee);
-                rtl8168_mdio_write(tp, 0x06, 0xe18a);
-                rtl8168_mdio_write(tp, 0x06, 0xef1b);
-                rtl8168_mdio_write(tp, 0x06, 0x479e);
-                rtl8168_mdio_write(tp, 0x06, 0x0fae);
-                rtl8168_mdio_write(tp, 0x06, 0x19ee);
-                rtl8168_mdio_write(tp, 0x06, 0x8aea);
-                rtl8168_mdio_write(tp, 0x06, 0x00ee);
-                rtl8168_mdio_write(tp, 0x06, 0x8aeb);
-                rtl8168_mdio_write(tp, 0x06, 0x00ae);
-                rtl8168_mdio_write(tp, 0x06, 0x0fac);
-                rtl8168_mdio_write(tp, 0x06, 0x390c);
-                rtl8168_mdio_write(tp, 0x06, 0xd101);
-                rtl8168_mdio_write(tp, 0x06, 0xbf86);
-                rtl8168_mdio_write(tp, 0x06, 0x3b02);
-                rtl8168_mdio_write(tp, 0x06, 0x2f50);
-                rtl8168_mdio_write(tp, 0x06, 0xee8a);
-                rtl8168_mdio_write(tp, 0x06, 0xe800);
-                rtl8168_mdio_write(tp, 0x06, 0xe68a);
-                rtl8168_mdio_write(tp, 0x06, 0xe7ff);
-                rtl8168_mdio_write(tp, 0x06, 0xef96);
-                rtl8168_mdio_write(tp, 0x06, 0xfefd);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xf8f9);
-                rtl8168_mdio_write(tp, 0x06, 0xfaef);
-                rtl8168_mdio_write(tp, 0x06, 0x69e0);
-                rtl8168_mdio_write(tp, 0x06, 0xe022);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-                rtl8168_mdio_write(tp, 0x06, 0x2358);
-                rtl8168_mdio_write(tp, 0x06, 0xc4e1);
-                rtl8168_mdio_write(tp, 0x06, 0x8b6e);
-                rtl8168_mdio_write(tp, 0x06, 0x1f10);
-                rtl8168_mdio_write(tp, 0x06, 0x9e24);
-                rtl8168_mdio_write(tp, 0x06, 0xe48b);
-                rtl8168_mdio_write(tp, 0x06, 0x6ead);
-                rtl8168_mdio_write(tp, 0x06, 0x2218);
-                rtl8168_mdio_write(tp, 0x06, 0xac27);
-                rtl8168_mdio_write(tp, 0x06, 0x0dac);
-                rtl8168_mdio_write(tp, 0x06, 0x2605);
-                rtl8168_mdio_write(tp, 0x06, 0x0203);
-                rtl8168_mdio_write(tp, 0x06, 0x8fae);
-                rtl8168_mdio_write(tp, 0x06, 0x1302);
-                rtl8168_mdio_write(tp, 0x06, 0x03c8);
-                rtl8168_mdio_write(tp, 0x06, 0xae0e);
-                rtl8168_mdio_write(tp, 0x06, 0x0203);
-                rtl8168_mdio_write(tp, 0x06, 0xe102);
-                rtl8168_mdio_write(tp, 0x06, 0x8520);
-                rtl8168_mdio_write(tp, 0x06, 0xae06);
-                rtl8168_mdio_write(tp, 0x06, 0x0203);
-                rtl8168_mdio_write(tp, 0x06, 0x8f02);
-                rtl8168_mdio_write(tp, 0x06, 0x8566);
-                rtl8168_mdio_write(tp, 0x06, 0xef96);
-                rtl8168_mdio_write(tp, 0x06, 0xfefd);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xf8fa);
-                rtl8168_mdio_write(tp, 0x06, 0xef69);
-                rtl8168_mdio_write(tp, 0x06, 0xe08b);
-                rtl8168_mdio_write(tp, 0x06, 0x82ad);
-                rtl8168_mdio_write(tp, 0x06, 0x2737);
-                rtl8168_mdio_write(tp, 0x06, 0xbf86);
-                rtl8168_mdio_write(tp, 0x06, 0x4402);
-                rtl8168_mdio_write(tp, 0x06, 0x2f23);
-                rtl8168_mdio_write(tp, 0x06, 0xac28);
-                rtl8168_mdio_write(tp, 0x06, 0x2ed1);
-                rtl8168_mdio_write(tp, 0x06, 0x01bf);
-                rtl8168_mdio_write(tp, 0x06, 0x8647);
-                rtl8168_mdio_write(tp, 0x06, 0x022f);
-                rtl8168_mdio_write(tp, 0x06, 0x50bf);
-                rtl8168_mdio_write(tp, 0x06, 0x8641);
-                rtl8168_mdio_write(tp, 0x06, 0x022f);
-                rtl8168_mdio_write(tp, 0x06, 0x23e5);
-                rtl8168_mdio_write(tp, 0x06, 0x8af0);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-                rtl8168_mdio_write(tp, 0x06, 0x22e1);
-                rtl8168_mdio_write(tp, 0x06, 0xe023);
-                rtl8168_mdio_write(tp, 0x06, 0xac2e);
-                rtl8168_mdio_write(tp, 0x06, 0x04d1);
-                rtl8168_mdio_write(tp, 0x06, 0x01ae);
-                rtl8168_mdio_write(tp, 0x06, 0x02d1);
-                rtl8168_mdio_write(tp, 0x06, 0x00bf);
-                rtl8168_mdio_write(tp, 0x06, 0x8641);
-                rtl8168_mdio_write(tp, 0x06, 0x022f);
-                rtl8168_mdio_write(tp, 0x06, 0x50d1);
-                rtl8168_mdio_write(tp, 0x06, 0x01bf);
-                rtl8168_mdio_write(tp, 0x06, 0x8644);
-                rtl8168_mdio_write(tp, 0x06, 0x022f);
-                rtl8168_mdio_write(tp, 0x06, 0x50ef);
-                rtl8168_mdio_write(tp, 0x06, 0x96fe);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xf8fa);
-                rtl8168_mdio_write(tp, 0x06, 0xef69);
-                rtl8168_mdio_write(tp, 0x06, 0xbf86);
-                rtl8168_mdio_write(tp, 0x06, 0x4702);
-                rtl8168_mdio_write(tp, 0x06, 0x2f23);
-                rtl8168_mdio_write(tp, 0x06, 0xad28);
-                rtl8168_mdio_write(tp, 0x06, 0x19d1);
-                rtl8168_mdio_write(tp, 0x06, 0x00bf);
-                rtl8168_mdio_write(tp, 0x06, 0x8644);
-                rtl8168_mdio_write(tp, 0x06, 0x022f);
-                rtl8168_mdio_write(tp, 0x06, 0x50e1);
-                rtl8168_mdio_write(tp, 0x06, 0x8af0);
-                rtl8168_mdio_write(tp, 0x06, 0xbf86);
-                rtl8168_mdio_write(tp, 0x06, 0x4102);
-                rtl8168_mdio_write(tp, 0x06, 0x2f50);
-                rtl8168_mdio_write(tp, 0x06, 0xd100);
-                rtl8168_mdio_write(tp, 0x06, 0xbf86);
-                rtl8168_mdio_write(tp, 0x06, 0x4702);
-                rtl8168_mdio_write(tp, 0x06, 0x2f50);
-                rtl8168_mdio_write(tp, 0x06, 0xef96);
-                rtl8168_mdio_write(tp, 0x06, 0xfefc);
-                rtl8168_mdio_write(tp, 0x06, 0x04f8);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
-                rtl8168_mdio_write(tp, 0x06, 0xfee1);
-                rtl8168_mdio_write(tp, 0x06, 0xe2ff);
-                rtl8168_mdio_write(tp, 0x06, 0xad2e);
-                rtl8168_mdio_write(tp, 0x06, 0x63e0);
-                rtl8168_mdio_write(tp, 0x06, 0xe038);
-                rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-                rtl8168_mdio_write(tp, 0x06, 0x39ad);
-                rtl8168_mdio_write(tp, 0x06, 0x2f10);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-                rtl8168_mdio_write(tp, 0x06, 0x34e1);
-                rtl8168_mdio_write(tp, 0x06, 0xe035);
-                rtl8168_mdio_write(tp, 0x06, 0xf726);
-                rtl8168_mdio_write(tp, 0x06, 0xe4e0);
-                rtl8168_mdio_write(tp, 0x06, 0x34e5);
-                rtl8168_mdio_write(tp, 0x06, 0xe035);
-                rtl8168_mdio_write(tp, 0x06, 0xae0e);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
-                rtl8168_mdio_write(tp, 0x06, 0xd6e1);
-                rtl8168_mdio_write(tp, 0x06, 0xe2d7);
-                rtl8168_mdio_write(tp, 0x06, 0xf728);
-                rtl8168_mdio_write(tp, 0x06, 0xe4e2);
-                rtl8168_mdio_write(tp, 0x06, 0xd6e5);
-                rtl8168_mdio_write(tp, 0x06, 0xe2d7);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
-                rtl8168_mdio_write(tp, 0x06, 0x34e1);
-                rtl8168_mdio_write(tp, 0x06, 0xe235);
-                rtl8168_mdio_write(tp, 0x06, 0xf72b);
-                rtl8168_mdio_write(tp, 0x06, 0xe4e2);
-                rtl8168_mdio_write(tp, 0x06, 0x34e5);
-                rtl8168_mdio_write(tp, 0x06, 0xe235);
-                rtl8168_mdio_write(tp, 0x06, 0xd07d);
-                rtl8168_mdio_write(tp, 0x06, 0xb0fe);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
-                rtl8168_mdio_write(tp, 0x06, 0x34e1);
-                rtl8168_mdio_write(tp, 0x06, 0xe235);
-                rtl8168_mdio_write(tp, 0x06, 0xf62b);
-                rtl8168_mdio_write(tp, 0x06, 0xe4e2);
-                rtl8168_mdio_write(tp, 0x06, 0x34e5);
-                rtl8168_mdio_write(tp, 0x06, 0xe235);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-                rtl8168_mdio_write(tp, 0x06, 0x34e1);
-                rtl8168_mdio_write(tp, 0x06, 0xe035);
-                rtl8168_mdio_write(tp, 0x06, 0xf626);
-                rtl8168_mdio_write(tp, 0x06, 0xe4e0);
-                rtl8168_mdio_write(tp, 0x06, 0x34e5);
-                rtl8168_mdio_write(tp, 0x06, 0xe035);
-                rtl8168_mdio_write(tp, 0x06, 0xe0e2);
-                rtl8168_mdio_write(tp, 0x06, 0xd6e1);
-                rtl8168_mdio_write(tp, 0x06, 0xe2d7);
-                rtl8168_mdio_write(tp, 0x06, 0xf628);
-                rtl8168_mdio_write(tp, 0x06, 0xe4e2);
-                rtl8168_mdio_write(tp, 0x06, 0xd6e5);
-                rtl8168_mdio_write(tp, 0x06, 0xe2d7);
-                rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                rtl8168_mdio_write(tp, 0x06, 0xae20);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x06, 0xa725);
-                rtl8168_mdio_write(tp, 0x06, 0xe50a);
-                rtl8168_mdio_write(tp, 0x06, 0x1de5);
-                rtl8168_mdio_write(tp, 0x06, 0x0a2c);
-                rtl8168_mdio_write(tp, 0x06, 0xe50a);
-                rtl8168_mdio_write(tp, 0x06, 0x6de5);
-                rtl8168_mdio_write(tp, 0x06, 0x0a1d);
-                rtl8168_mdio_write(tp, 0x06, 0xe50a);
-                rtl8168_mdio_write(tp, 0x06, 0x1ce5);
-                rtl8168_mdio_write(tp, 0x06, 0x0a2d);
-                rtl8168_mdio_write(tp, 0x06, 0xa755);
-                rtl8168_mdio_write(tp, 0x06, 0x00e2);
-                rtl8168_mdio_write(tp, 0x06, 0x3488);
-                rtl8168_mdio_write(tp, 0x06, 0xe200);
-                rtl8168_mdio_write(tp, 0x06, 0xcce2);
-                rtl8168_mdio_write(tp, 0x06, 0x0055);
-                rtl8168_mdio_write(tp, 0x06, 0xe020);
-                rtl8168_mdio_write(tp, 0x06, 0x55e2);
-                rtl8168_mdio_write(tp, 0x06, 0xd600);
-                rtl8168_mdio_write(tp, 0x06, 0xe24a);
-                gphy_val = rtl8168_mdio_read(tp, 0x01);
-                gphy_val |= BIT_0;
-                rtl8168_mdio_write(tp, 0x01, gphy_val);
-                gphy_val = rtl8168_mdio_read(tp, 0x00);
-                gphy_val |= BIT_0;
-                rtl8168_mdio_write(tp, 0x00, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                for (i = 0; i < 200; i++) {
-                        udelay(100);
-                        gphy_val = rtl8168_mdio_read(tp, 0x00);
-                        if (gphy_val & BIT_7)
-                                break;
-                }
-                rtl8168_mdio_write(tp, 0x1f, 0x0007);
-                rtl8168_mdio_write(tp, 0x1e, 0x0023);
-                gphy_val = rtl8168_mdio_read(tp, 0x17);
-                gphy_val &= ~(BIT_0);
-                if (tp->RequiredSecLanDonglePatch)
-                        gphy_val &= ~(BIT_2);
-                rtl8168_mdio_write(tp, 0x17, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        }
-}
-
-static void
-rtl8168_set_phy_mcu_8168evl_1(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        unsigned int gphy_val,i;
-
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x00, 0x1800);
-        gphy_val = rtl8168_mdio_read(tp, 0x15);
-        gphy_val &= ~(BIT_12);
-        rtl8168_mdio_write(tp, 0x15, gphy_val);
-        mdelay(20);
-        rtl8168_mdio_write(tp, 0x1f, 0x0004);
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1e, 0x0023);
-        gphy_val = rtl8168_mdio_read(tp, 0x17);
-        if ((gphy_val & BIT_11) == 0x0000) {
-                gphy_val |= BIT_0;
-                rtl8168_mdio_write(tp, 0x17, gphy_val);
-                for (i = 0; i < 200; i++) {
-                        udelay(100);
-                        gphy_val = rtl8168_mdio_read(tp, 0x17);
-                        if (gphy_val & BIT_11)
-                                break;
-                }
-        }
-        gphy_val = rtl8168_mdio_read(tp, 0x17);
-        gphy_val |= BIT_0;
-        rtl8168_mdio_write(tp, 0x17, gphy_val);
-        rtl8168_mdio_write(tp, 0x1f, 0x0004);
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1E, 0x002C);
-        rtl8168_mdio_write(tp, 0x1B, 0x5000);
-        rtl8168_mdio_write(tp, 0x1E, 0x002d);
-        rtl8168_mdio_write(tp, 0x19, 0x0004);
-        rtl8168_mdio_write(tp, 0x1f, 0x0002);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        for (i = 0; i < 200; i++) {
-                udelay(100);
-                gphy_val = rtl8168_mdio_read(tp, 0x1E);
-                if ((gphy_val & 0x03FF) == 0x0014)
-                        break;
-        }
-        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-        for (i = 0; i < 200; i++) {
-                udelay(100);
-                gphy_val = rtl8168_mdio_read(tp, 0x07);
-                if ((gphy_val & BIT_5) == 0)
-                        break;
-        }
-        gphy_val = rtl8168_mdio_read(tp, 0x07);
-        if (gphy_val & BIT_5) {
-                rtl8168_mdio_write(tp, 0x1f, 0x0004);
-                rtl8168_mdio_write(tp, 0x1f, 0x0007);
-                rtl8168_mdio_write(tp, 0x1e, 0x00a1);
-                rtl8168_mdio_write(tp, 0x17, 0x1000);
-                rtl8168_mdio_write(tp, 0x17, 0x0000);
-                rtl8168_mdio_write(tp, 0x17, 0x2000);
-                rtl8168_mdio_write(tp, 0x1e, 0x002f);
-                rtl8168_mdio_write(tp, 0x18, 0x9bfb);
-                rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                rtl8168_mdio_write(tp, 0x07, 0x0000);
-                rtl8168_mdio_write(tp, 0x1f, 0x0002);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        }
-        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-        rtl8168_mdio_write(tp, 0x05, 0xfff6);
-        rtl8168_mdio_write(tp, 0x06, 0x0080);
-        gphy_val = rtl8168_mdio_read(tp, 0x00);
-        gphy_val &= ~(BIT_7);
-        rtl8168_mdio_write(tp, 0x00, gphy_val);
-        rtl8168_mdio_write(tp, 0x1f, 0x0004);
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1e, 0x0023);
-        rtl8168_mdio_write(tp, 0x16, 0x0306);
-        rtl8168_mdio_write(tp, 0x16, 0x0307);
-        rtl8168_mdio_write(tp, 0x15, 0x0000);
-        rtl8168_mdio_write(tp, 0x19, 0x407d);
-        rtl8168_mdio_write(tp, 0x15, 0x0001);
-        rtl8168_mdio_write(tp, 0x19, 0x440f);
-        rtl8168_mdio_write(tp, 0x15, 0x0002);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x0003);
-        rtl8168_mdio_write(tp, 0x19, 0x6c03);
-        rtl8168_mdio_write(tp, 0x15, 0x0004);
-        rtl8168_mdio_write(tp, 0x19, 0xc4d5);
-        rtl8168_mdio_write(tp, 0x15, 0x0005);
-        rtl8168_mdio_write(tp, 0x19, 0x00ff);
-        rtl8168_mdio_write(tp, 0x15, 0x0006);
-        rtl8168_mdio_write(tp, 0x19, 0x74f0);
-        rtl8168_mdio_write(tp, 0x15, 0x0007);
-        rtl8168_mdio_write(tp, 0x19, 0x4880);
-        rtl8168_mdio_write(tp, 0x15, 0x0008);
-        rtl8168_mdio_write(tp, 0x19, 0x4c00);
-        rtl8168_mdio_write(tp, 0x15, 0x0009);
-        rtl8168_mdio_write(tp, 0x19, 0x4800);
-        rtl8168_mdio_write(tp, 0x15, 0x000a);
-        rtl8168_mdio_write(tp, 0x19, 0x5000);
-        rtl8168_mdio_write(tp, 0x15, 0x000b);
-        rtl8168_mdio_write(tp, 0x19, 0x4400);
-        rtl8168_mdio_write(tp, 0x15, 0x000c);
-        rtl8168_mdio_write(tp, 0x19, 0x7801);
-        rtl8168_mdio_write(tp, 0x15, 0x000d);
-        rtl8168_mdio_write(tp, 0x19, 0x4000);
-        rtl8168_mdio_write(tp, 0x15, 0x000e);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x000f);
-        rtl8168_mdio_write(tp, 0x19, 0x7010);
-        rtl8168_mdio_write(tp, 0x15, 0x0010);
-        rtl8168_mdio_write(tp, 0x19, 0x6804);
-        rtl8168_mdio_write(tp, 0x15, 0x0011);
-        rtl8168_mdio_write(tp, 0x19, 0x64a0);
-        rtl8168_mdio_write(tp, 0x15, 0x0012);
-        rtl8168_mdio_write(tp, 0x19, 0x63da);
-        rtl8168_mdio_write(tp, 0x15, 0x0013);
-        rtl8168_mdio_write(tp, 0x19, 0x63d8);
-        rtl8168_mdio_write(tp, 0x15, 0x0014);
-        rtl8168_mdio_write(tp, 0x19, 0x6f05);
-        rtl8168_mdio_write(tp, 0x15, 0x0015);
-        rtl8168_mdio_write(tp, 0x19, 0x5420);
-        rtl8168_mdio_write(tp, 0x15, 0x0016);
-        rtl8168_mdio_write(tp, 0x19, 0x58ce);
-        rtl8168_mdio_write(tp, 0x15, 0x0017);
-        rtl8168_mdio_write(tp, 0x19, 0x5cf3);
-        rtl8168_mdio_write(tp, 0x15, 0x0018);
-        rtl8168_mdio_write(tp, 0x19, 0xb600);
-        rtl8168_mdio_write(tp, 0x15, 0x0019);
-        rtl8168_mdio_write(tp, 0x19, 0xc659);
-        rtl8168_mdio_write(tp, 0x15, 0x001a);
-        rtl8168_mdio_write(tp, 0x19, 0x0018);
-        rtl8168_mdio_write(tp, 0x15, 0x001b);
-        rtl8168_mdio_write(tp, 0x19, 0xc403);
-        rtl8168_mdio_write(tp, 0x15, 0x001c);
-        rtl8168_mdio_write(tp, 0x19, 0x0016);
-        rtl8168_mdio_write(tp, 0x15, 0x001d);
-        rtl8168_mdio_write(tp, 0x19, 0xaa05);
-        rtl8168_mdio_write(tp, 0x15, 0x001e);
-        rtl8168_mdio_write(tp, 0x19, 0xc503);
-        rtl8168_mdio_write(tp, 0x15, 0x001f);
-        rtl8168_mdio_write(tp, 0x19, 0x0003);
-        rtl8168_mdio_write(tp, 0x15, 0x0020);
-        rtl8168_mdio_write(tp, 0x19, 0x89f8);
-        rtl8168_mdio_write(tp, 0x15, 0x0021);
-        rtl8168_mdio_write(tp, 0x19, 0x32ae);
-        rtl8168_mdio_write(tp, 0x15, 0x0022);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x0023);
-        rtl8168_mdio_write(tp, 0x19, 0x6c03);
-        rtl8168_mdio_write(tp, 0x15, 0x0024);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x0025);
-        rtl8168_mdio_write(tp, 0x19, 0x6801);
-        rtl8168_mdio_write(tp, 0x15, 0x0026);
-        rtl8168_mdio_write(tp, 0x19, 0x66a0);
-        rtl8168_mdio_write(tp, 0x15, 0x0027);
-        rtl8168_mdio_write(tp, 0x19, 0xa300);
-        rtl8168_mdio_write(tp, 0x15, 0x0028);
-        rtl8168_mdio_write(tp, 0x19, 0x64a0);
-        rtl8168_mdio_write(tp, 0x15, 0x0029);
-        rtl8168_mdio_write(tp, 0x19, 0x76f0);
-        rtl8168_mdio_write(tp, 0x15, 0x002a);
-        rtl8168_mdio_write(tp, 0x19, 0x7670);
-        rtl8168_mdio_write(tp, 0x15, 0x002b);
-        rtl8168_mdio_write(tp, 0x19, 0x7630);
-        rtl8168_mdio_write(tp, 0x15, 0x002c);
-        rtl8168_mdio_write(tp, 0x19, 0x31a6);
-        rtl8168_mdio_write(tp, 0x15, 0x002d);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x002e);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x002f);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0030);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0031);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0032);
-        rtl8168_mdio_write(tp, 0x19, 0x4801);
-        rtl8168_mdio_write(tp, 0x15, 0x0033);
-        rtl8168_mdio_write(tp, 0x19, 0x6803);
-        rtl8168_mdio_write(tp, 0x15, 0x0034);
-        rtl8168_mdio_write(tp, 0x19, 0x66a1);
-        rtl8168_mdio_write(tp, 0x15, 0x0035);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x0036);
-        rtl8168_mdio_write(tp, 0x19, 0x6c03);
-        rtl8168_mdio_write(tp, 0x15, 0x0037);
-        rtl8168_mdio_write(tp, 0x19, 0xa300);
-        rtl8168_mdio_write(tp, 0x15, 0x0038);
-        rtl8168_mdio_write(tp, 0x19, 0x64a1);
-        rtl8168_mdio_write(tp, 0x15, 0x0039);
-        rtl8168_mdio_write(tp, 0x19, 0x7c08);
-        rtl8168_mdio_write(tp, 0x15, 0x003a);
-        rtl8168_mdio_write(tp, 0x19, 0x74f8);
-        rtl8168_mdio_write(tp, 0x15, 0x003b);
-        rtl8168_mdio_write(tp, 0x19, 0x63d0);
-        rtl8168_mdio_write(tp, 0x15, 0x003c);
-        rtl8168_mdio_write(tp, 0x19, 0x7ff0);
-        rtl8168_mdio_write(tp, 0x15, 0x003d);
-        rtl8168_mdio_write(tp, 0x19, 0x77f0);
-        rtl8168_mdio_write(tp, 0x15, 0x003e);
-        rtl8168_mdio_write(tp, 0x19, 0x7ff0);
-        rtl8168_mdio_write(tp, 0x15, 0x003f);
-        rtl8168_mdio_write(tp, 0x19, 0x7750);
-        rtl8168_mdio_write(tp, 0x15, 0x0040);
-        rtl8168_mdio_write(tp, 0x19, 0x63d8);
-        rtl8168_mdio_write(tp, 0x15, 0x0041);
-        rtl8168_mdio_write(tp, 0x19, 0x7cf0);
-        rtl8168_mdio_write(tp, 0x15, 0x0042);
-        rtl8168_mdio_write(tp, 0x19, 0x7708);
-        rtl8168_mdio_write(tp, 0x15, 0x0043);
-        rtl8168_mdio_write(tp, 0x19, 0xa654);
-        rtl8168_mdio_write(tp, 0x15, 0x0044);
-        rtl8168_mdio_write(tp, 0x19, 0x304a);
-        rtl8168_mdio_write(tp, 0x15, 0x0045);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0046);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0047);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0048);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0049);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x004a);
-        rtl8168_mdio_write(tp, 0x19, 0x4802);
-        rtl8168_mdio_write(tp, 0x15, 0x004b);
-        rtl8168_mdio_write(tp, 0x19, 0x4003);
-        rtl8168_mdio_write(tp, 0x15, 0x004c);
-        rtl8168_mdio_write(tp, 0x19, 0x4440);
-        rtl8168_mdio_write(tp, 0x15, 0x004d);
-        rtl8168_mdio_write(tp, 0x19, 0x63c8);
-        rtl8168_mdio_write(tp, 0x15, 0x004e);
-        rtl8168_mdio_write(tp, 0x19, 0x6481);
-        rtl8168_mdio_write(tp, 0x15, 0x004f);
-        rtl8168_mdio_write(tp, 0x19, 0x9d00);
-        rtl8168_mdio_write(tp, 0x15, 0x0050);
-        rtl8168_mdio_write(tp, 0x19, 0x63e8);
-        rtl8168_mdio_write(tp, 0x15, 0x0051);
-        rtl8168_mdio_write(tp, 0x19, 0x7d00);
-        rtl8168_mdio_write(tp, 0x15, 0x0052);
-        rtl8168_mdio_write(tp, 0x19, 0x5900);
-        rtl8168_mdio_write(tp, 0x15, 0x0053);
-        rtl8168_mdio_write(tp, 0x19, 0x63f8);
-        rtl8168_mdio_write(tp, 0x15, 0x0054);
-        rtl8168_mdio_write(tp, 0x19, 0x64a1);
-        rtl8168_mdio_write(tp, 0x15, 0x0055);
-        rtl8168_mdio_write(tp, 0x19, 0x3116);
-        rtl8168_mdio_write(tp, 0x15, 0x0056);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0057);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0058);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0059);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x005a);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x005b);
-        rtl8168_mdio_write(tp, 0x19, 0x6c03);
-        rtl8168_mdio_write(tp, 0x15, 0x005c);
-        rtl8168_mdio_write(tp, 0x19, 0x7c08);
-        rtl8168_mdio_write(tp, 0x15, 0x005d);
-        rtl8168_mdio_write(tp, 0x19, 0x6000);
-        rtl8168_mdio_write(tp, 0x15, 0x005e);
-        rtl8168_mdio_write(tp, 0x19, 0x59ce);
-        rtl8168_mdio_write(tp, 0x15, 0x005f);
-        rtl8168_mdio_write(tp, 0x19, 0x4400);
-        rtl8168_mdio_write(tp, 0x15, 0x0060);
-        rtl8168_mdio_write(tp, 0x19, 0x7d00);
-        rtl8168_mdio_write(tp, 0x15, 0x0061);
-        rtl8168_mdio_write(tp, 0x19, 0x72b0);
-        rtl8168_mdio_write(tp, 0x15, 0x0062);
-        rtl8168_mdio_write(tp, 0x19, 0x400e);
-        rtl8168_mdio_write(tp, 0x15, 0x0063);
-        rtl8168_mdio_write(tp, 0x19, 0x4440);
-        rtl8168_mdio_write(tp, 0x15, 0x0064);
-        rtl8168_mdio_write(tp, 0x19, 0x9d00);
-        rtl8168_mdio_write(tp, 0x15, 0x0065);
-        rtl8168_mdio_write(tp, 0x19, 0x7f00);
-        rtl8168_mdio_write(tp, 0x15, 0x0066);
-        rtl8168_mdio_write(tp, 0x19, 0x70b0);
-        rtl8168_mdio_write(tp, 0x15, 0x0067);
-        rtl8168_mdio_write(tp, 0x19, 0x7c08);
-        rtl8168_mdio_write(tp, 0x15, 0x0068);
-        rtl8168_mdio_write(tp, 0x19, 0x6008);
-        rtl8168_mdio_write(tp, 0x15, 0x0069);
-        rtl8168_mdio_write(tp, 0x19, 0x7cf0);
-        rtl8168_mdio_write(tp, 0x15, 0x006a);
-        rtl8168_mdio_write(tp, 0x19, 0x7750);
-        rtl8168_mdio_write(tp, 0x15, 0x006b);
-        rtl8168_mdio_write(tp, 0x19, 0x4007);
-        rtl8168_mdio_write(tp, 0x15, 0x006c);
-        rtl8168_mdio_write(tp, 0x19, 0x4500);
-        rtl8168_mdio_write(tp, 0x15, 0x006d);
-        rtl8168_mdio_write(tp, 0x19, 0x4023);
-        rtl8168_mdio_write(tp, 0x15, 0x006e);
-        rtl8168_mdio_write(tp, 0x19, 0x4580);
-        rtl8168_mdio_write(tp, 0x15, 0x006f);
-        rtl8168_mdio_write(tp, 0x19, 0x9f00);
-        rtl8168_mdio_write(tp, 0x15, 0x0070);
-        rtl8168_mdio_write(tp, 0x19, 0xcd78);
-        rtl8168_mdio_write(tp, 0x15, 0x0071);
-        rtl8168_mdio_write(tp, 0x19, 0x0003);
-        rtl8168_mdio_write(tp, 0x15, 0x0072);
-        rtl8168_mdio_write(tp, 0x19, 0xbe02);
-        rtl8168_mdio_write(tp, 0x15, 0x0073);
-        rtl8168_mdio_write(tp, 0x19, 0x3070);
-        rtl8168_mdio_write(tp, 0x15, 0x0074);
-        rtl8168_mdio_write(tp, 0x19, 0x7cf0);
-        rtl8168_mdio_write(tp, 0x15, 0x0075);
-        rtl8168_mdio_write(tp, 0x19, 0x77f0);
-        rtl8168_mdio_write(tp, 0x15, 0x0076);
-        rtl8168_mdio_write(tp, 0x19, 0x4400);
-        rtl8168_mdio_write(tp, 0x15, 0x0077);
-        rtl8168_mdio_write(tp, 0x19, 0x4007);
-        rtl8168_mdio_write(tp, 0x15, 0x0078);
-        rtl8168_mdio_write(tp, 0x19, 0x4500);
-        rtl8168_mdio_write(tp, 0x15, 0x0079);
-        rtl8168_mdio_write(tp, 0x19, 0x4023);
-        rtl8168_mdio_write(tp, 0x15, 0x007a);
-        rtl8168_mdio_write(tp, 0x19, 0x4580);
-        rtl8168_mdio_write(tp, 0x15, 0x007b);
-        rtl8168_mdio_write(tp, 0x19, 0x9f00);
-        rtl8168_mdio_write(tp, 0x15, 0x007c);
-        rtl8168_mdio_write(tp, 0x19, 0xce80);
-        rtl8168_mdio_write(tp, 0x15, 0x007d);
-        rtl8168_mdio_write(tp, 0x19, 0x0004);
-        rtl8168_mdio_write(tp, 0x15, 0x007e);
-        rtl8168_mdio_write(tp, 0x19, 0xce80);
-        rtl8168_mdio_write(tp, 0x15, 0x007f);
-        rtl8168_mdio_write(tp, 0x19, 0x0002);
-        rtl8168_mdio_write(tp, 0x15, 0x0080);
-        rtl8168_mdio_write(tp, 0x19, 0x307c);
-        rtl8168_mdio_write(tp, 0x15, 0x0081);
-        rtl8168_mdio_write(tp, 0x19, 0x4400);
-        rtl8168_mdio_write(tp, 0x15, 0x0082);
-        rtl8168_mdio_write(tp, 0x19, 0x480f);
-        rtl8168_mdio_write(tp, 0x15, 0x0083);
-        rtl8168_mdio_write(tp, 0x19, 0x6802);
-        rtl8168_mdio_write(tp, 0x15, 0x0084);
-        rtl8168_mdio_write(tp, 0x19, 0x6680);
-        rtl8168_mdio_write(tp, 0x15, 0x0085);
-        rtl8168_mdio_write(tp, 0x19, 0x7c10);
-        rtl8168_mdio_write(tp, 0x15, 0x0086);
-        rtl8168_mdio_write(tp, 0x19, 0x6010);
-        rtl8168_mdio_write(tp, 0x15, 0x0087);
-        rtl8168_mdio_write(tp, 0x19, 0x400a);
-        rtl8168_mdio_write(tp, 0x15, 0x0088);
-        rtl8168_mdio_write(tp, 0x19, 0x4580);
-        rtl8168_mdio_write(tp, 0x15, 0x0089);
-        rtl8168_mdio_write(tp, 0x19, 0x9e00);
-        rtl8168_mdio_write(tp, 0x15, 0x008a);
-        rtl8168_mdio_write(tp, 0x19, 0x7d00);
-        rtl8168_mdio_write(tp, 0x15, 0x008b);
-        rtl8168_mdio_write(tp, 0x19, 0x5800);
-        rtl8168_mdio_write(tp, 0x15, 0x008c);
-        rtl8168_mdio_write(tp, 0x19, 0x63c8);
-        rtl8168_mdio_write(tp, 0x15, 0x008d);
-        rtl8168_mdio_write(tp, 0x19, 0x63d8);
-        rtl8168_mdio_write(tp, 0x15, 0x008e);
-        rtl8168_mdio_write(tp, 0x19, 0x66a0);
-        rtl8168_mdio_write(tp, 0x15, 0x008f);
-        rtl8168_mdio_write(tp, 0x19, 0x8300);
-        rtl8168_mdio_write(tp, 0x15, 0x0090);
-        rtl8168_mdio_write(tp, 0x19, 0x7ff0);
-        rtl8168_mdio_write(tp, 0x15, 0x0091);
-        rtl8168_mdio_write(tp, 0x19, 0x74f0);
-        rtl8168_mdio_write(tp, 0x15, 0x0092);
-        rtl8168_mdio_write(tp, 0x19, 0x3006);
-        rtl8168_mdio_write(tp, 0x15, 0x0093);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0094);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0095);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0096);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0097);
-        rtl8168_mdio_write(tp, 0x19, 0x4803);
-        rtl8168_mdio_write(tp, 0x15, 0x0098);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x0099);
-        rtl8168_mdio_write(tp, 0x19, 0x6c03);
-        rtl8168_mdio_write(tp, 0x15, 0x009a);
-        rtl8168_mdio_write(tp, 0x19, 0xa203);
-        rtl8168_mdio_write(tp, 0x15, 0x009b);
-        rtl8168_mdio_write(tp, 0x19, 0x64b1);
-        rtl8168_mdio_write(tp, 0x15, 0x009c);
-        rtl8168_mdio_write(tp, 0x19, 0x309e);
-        rtl8168_mdio_write(tp, 0x15, 0x009d);
-        rtl8168_mdio_write(tp, 0x19, 0x64b3);
-        rtl8168_mdio_write(tp, 0x15, 0x009e);
-        rtl8168_mdio_write(tp, 0x19, 0x4030);
-        rtl8168_mdio_write(tp, 0x15, 0x009f);
-        rtl8168_mdio_write(tp, 0x19, 0x440e);
-        rtl8168_mdio_write(tp, 0x15, 0x00a0);
-        rtl8168_mdio_write(tp, 0x19, 0x4020);
-        rtl8168_mdio_write(tp, 0x15, 0x00a1);
-        rtl8168_mdio_write(tp, 0x19, 0x4419);
-        rtl8168_mdio_write(tp, 0x15, 0x00a2);
-        rtl8168_mdio_write(tp, 0x19, 0x7801);
-        rtl8168_mdio_write(tp, 0x15, 0x00a3);
-        rtl8168_mdio_write(tp, 0x19, 0xc520);
-        rtl8168_mdio_write(tp, 0x15, 0x00a4);
-        rtl8168_mdio_write(tp, 0x19, 0x000b);
-        rtl8168_mdio_write(tp, 0x15, 0x00a5);
-        rtl8168_mdio_write(tp, 0x19, 0x4020);
-        rtl8168_mdio_write(tp, 0x15, 0x00a6);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x00a7);
-        rtl8168_mdio_write(tp, 0x19, 0x58a4);
-        rtl8168_mdio_write(tp, 0x15, 0x00a8);
-        rtl8168_mdio_write(tp, 0x19, 0x63da);
-        rtl8168_mdio_write(tp, 0x15, 0x00a9);
-        rtl8168_mdio_write(tp, 0x19, 0x5cb0);
-        rtl8168_mdio_write(tp, 0x15, 0x00aa);
-        rtl8168_mdio_write(tp, 0x19, 0x7d00);
-        rtl8168_mdio_write(tp, 0x15, 0x00ab);
-        rtl8168_mdio_write(tp, 0x19, 0x72b0);
-        rtl8168_mdio_write(tp, 0x15, 0x00ac);
-        rtl8168_mdio_write(tp, 0x19, 0x7f00);
-        rtl8168_mdio_write(tp, 0x15, 0x00ad);
-        rtl8168_mdio_write(tp, 0x19, 0x70b0);
-        rtl8168_mdio_write(tp, 0x15, 0x00ae);
-        rtl8168_mdio_write(tp, 0x19, 0x30b8);
-        rtl8168_mdio_write(tp, 0x15, 0x00AF);
-        rtl8168_mdio_write(tp, 0x19, 0x4060);
-        rtl8168_mdio_write(tp, 0x15, 0x00B0);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x00B1);
-        rtl8168_mdio_write(tp, 0x19, 0x7e00);
-        rtl8168_mdio_write(tp, 0x15, 0x00B2);
-        rtl8168_mdio_write(tp, 0x19, 0x72B0);
-        rtl8168_mdio_write(tp, 0x15, 0x00B3);
-        rtl8168_mdio_write(tp, 0x19, 0x7F00);
-        rtl8168_mdio_write(tp, 0x15, 0x00B4);
-        rtl8168_mdio_write(tp, 0x19, 0x73B0);
-        rtl8168_mdio_write(tp, 0x15, 0x00b5);
-        rtl8168_mdio_write(tp, 0x19, 0x58a0);
-        rtl8168_mdio_write(tp, 0x15, 0x00b6);
-        rtl8168_mdio_write(tp, 0x19, 0x63d2);
-        rtl8168_mdio_write(tp, 0x15, 0x00b7);
-        rtl8168_mdio_write(tp, 0x19, 0x5c00);
-        rtl8168_mdio_write(tp, 0x15, 0x00b8);
-        rtl8168_mdio_write(tp, 0x19, 0x5780);
-        rtl8168_mdio_write(tp, 0x15, 0x00b9);
-        rtl8168_mdio_write(tp, 0x19, 0xb60d);
-        rtl8168_mdio_write(tp, 0x15, 0x00ba);
-        rtl8168_mdio_write(tp, 0x19, 0x9bff);
-        rtl8168_mdio_write(tp, 0x15, 0x00bb);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x00bc);
-        rtl8168_mdio_write(tp, 0x19, 0x6001);
-        rtl8168_mdio_write(tp, 0x15, 0x00bd);
-        rtl8168_mdio_write(tp, 0x19, 0xc020);
-        rtl8168_mdio_write(tp, 0x15, 0x00be);
-        rtl8168_mdio_write(tp, 0x19, 0x002b);
-        rtl8168_mdio_write(tp, 0x15, 0x00bf);
-        rtl8168_mdio_write(tp, 0x19, 0xc137);
-        rtl8168_mdio_write(tp, 0x15, 0x00c0);
-        rtl8168_mdio_write(tp, 0x19, 0x0006);
-        rtl8168_mdio_write(tp, 0x15, 0x00c1);
-        rtl8168_mdio_write(tp, 0x19, 0x9af8);
-        rtl8168_mdio_write(tp, 0x15, 0x00c2);
-        rtl8168_mdio_write(tp, 0x19, 0x30c6);
-        rtl8168_mdio_write(tp, 0x15, 0x00c3);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x00c4);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x00c5);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x00c6);
-        rtl8168_mdio_write(tp, 0x19, 0x7d00);
-        rtl8168_mdio_write(tp, 0x15, 0x00c7);
-        rtl8168_mdio_write(tp, 0x19, 0x70b0);
-        rtl8168_mdio_write(tp, 0x15, 0x00c8);
-        rtl8168_mdio_write(tp, 0x19, 0x4400);
-        rtl8168_mdio_write(tp, 0x15, 0x00c9);
-        rtl8168_mdio_write(tp, 0x19, 0x4804);
-        rtl8168_mdio_write(tp, 0x15, 0x00ca);
-        rtl8168_mdio_write(tp, 0x19, 0x7c80);
-        rtl8168_mdio_write(tp, 0x15, 0x00cb);
-        rtl8168_mdio_write(tp, 0x19, 0x5c80);
-        rtl8168_mdio_write(tp, 0x15, 0x00cc);
-        rtl8168_mdio_write(tp, 0x19, 0x4010);
-        rtl8168_mdio_write(tp, 0x15, 0x00cd);
-        rtl8168_mdio_write(tp, 0x19, 0x4415);
-        rtl8168_mdio_write(tp, 0x15, 0x00ce);
-        rtl8168_mdio_write(tp, 0x19, 0x9b00);
-        rtl8168_mdio_write(tp, 0x15, 0x00cf);
-        rtl8168_mdio_write(tp, 0x19, 0x7f00);
-        rtl8168_mdio_write(tp, 0x15, 0x00d0);
-        rtl8168_mdio_write(tp, 0x19, 0x70b0);
-        rtl8168_mdio_write(tp, 0x15, 0x00d1);
-        rtl8168_mdio_write(tp, 0x19, 0x3177);
-        rtl8168_mdio_write(tp, 0x15, 0x00d2);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x00d3);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x00d4);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x00d5);
-        rtl8168_mdio_write(tp, 0x19, 0x4808);
-        rtl8168_mdio_write(tp, 0x15, 0x00d6);
-        rtl8168_mdio_write(tp, 0x19, 0x4007);
-        rtl8168_mdio_write(tp, 0x15, 0x00d7);
-        rtl8168_mdio_write(tp, 0x19, 0x4420);
-        rtl8168_mdio_write(tp, 0x15, 0x00d8);
-        rtl8168_mdio_write(tp, 0x19, 0x63d8);
-        rtl8168_mdio_write(tp, 0x15, 0x00d9);
-        rtl8168_mdio_write(tp, 0x19, 0xb608);
-        rtl8168_mdio_write(tp, 0x15, 0x00da);
-        rtl8168_mdio_write(tp, 0x19, 0xbcbd);
-        rtl8168_mdio_write(tp, 0x15, 0x00db);
-        rtl8168_mdio_write(tp, 0x19, 0xc60b);
-        rtl8168_mdio_write(tp, 0x15, 0x00dc);
-        rtl8168_mdio_write(tp, 0x19, 0x00fd);
-        rtl8168_mdio_write(tp, 0x15, 0x00dd);
-        rtl8168_mdio_write(tp, 0x19, 0x30e1);
-        rtl8168_mdio_write(tp, 0x15, 0x00de);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x00df);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x00e0);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x00e1);
-        rtl8168_mdio_write(tp, 0x19, 0x4809);
-        rtl8168_mdio_write(tp, 0x15, 0x00e2);
-        rtl8168_mdio_write(tp, 0x19, 0x7e40);
-        rtl8168_mdio_write(tp, 0x15, 0x00e3);
-        rtl8168_mdio_write(tp, 0x19, 0x5a40);
-        rtl8168_mdio_write(tp, 0x15, 0x00e4);
-        rtl8168_mdio_write(tp, 0x19, 0x305a);
-        rtl8168_mdio_write(tp, 0x15, 0x00e5);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x00e6);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x00e7);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x00e8);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x00e9);
-        rtl8168_mdio_write(tp, 0x19, 0x480a);
-        rtl8168_mdio_write(tp, 0x15, 0x00ea);
-        rtl8168_mdio_write(tp, 0x19, 0x5820);
-        rtl8168_mdio_write(tp, 0x15, 0x00eb);
-        rtl8168_mdio_write(tp, 0x19, 0x6c03);
-        rtl8168_mdio_write(tp, 0x15, 0x00ec);
-        rtl8168_mdio_write(tp, 0x19, 0xb60a);
-        rtl8168_mdio_write(tp, 0x15, 0x00ed);
-        rtl8168_mdio_write(tp, 0x19, 0xda07);
-        rtl8168_mdio_write(tp, 0x15, 0x00ee);
-        rtl8168_mdio_write(tp, 0x19, 0x0008);
-        rtl8168_mdio_write(tp, 0x15, 0x00ef);
-        rtl8168_mdio_write(tp, 0x19, 0xc60b);
-        rtl8168_mdio_write(tp, 0x15, 0x00f0);
-        rtl8168_mdio_write(tp, 0x19, 0x00fc);
-        rtl8168_mdio_write(tp, 0x15, 0x00f1);
-        rtl8168_mdio_write(tp, 0x19, 0x30f6);
-        rtl8168_mdio_write(tp, 0x15, 0x00f2);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x00f3);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x00f4);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x00f5);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x00f6);
-        rtl8168_mdio_write(tp, 0x19, 0x4408);
-        rtl8168_mdio_write(tp, 0x15, 0x00f7);
-        rtl8168_mdio_write(tp, 0x19, 0x480b);
-        rtl8168_mdio_write(tp, 0x15, 0x00f8);
-        rtl8168_mdio_write(tp, 0x19, 0x6f03);
-        rtl8168_mdio_write(tp, 0x15, 0x00f9);
-        rtl8168_mdio_write(tp, 0x19, 0x405f);
-        rtl8168_mdio_write(tp, 0x15, 0x00fa);
-        rtl8168_mdio_write(tp, 0x19, 0x4448);
-        rtl8168_mdio_write(tp, 0x15, 0x00fb);
-        rtl8168_mdio_write(tp, 0x19, 0x4020);
-        rtl8168_mdio_write(tp, 0x15, 0x00fc);
-        rtl8168_mdio_write(tp, 0x19, 0x4468);
-        rtl8168_mdio_write(tp, 0x15, 0x00fd);
-        rtl8168_mdio_write(tp, 0x19, 0x9c03);
-        rtl8168_mdio_write(tp, 0x15, 0x00fe);
-        rtl8168_mdio_write(tp, 0x19, 0x6f07);
-        rtl8168_mdio_write(tp, 0x15, 0x00ff);
-        rtl8168_mdio_write(tp, 0x19, 0x58a0);
-        rtl8168_mdio_write(tp, 0x15, 0x0100);
-        rtl8168_mdio_write(tp, 0x19, 0xd6d1);
-        rtl8168_mdio_write(tp, 0x15, 0x0101);
-        rtl8168_mdio_write(tp, 0x19, 0x0004);
-        rtl8168_mdio_write(tp, 0x15, 0x0102);
-        rtl8168_mdio_write(tp, 0x19, 0xc137);
-        rtl8168_mdio_write(tp, 0x15, 0x0103);
-        rtl8168_mdio_write(tp, 0x19, 0x0002);
-        rtl8168_mdio_write(tp, 0x15, 0x0104);
-        rtl8168_mdio_write(tp, 0x19, 0xa0e5);
-        rtl8168_mdio_write(tp, 0x15, 0x0105);
-        rtl8168_mdio_write(tp, 0x19, 0x9df8);
-        rtl8168_mdio_write(tp, 0x15, 0x0106);
-        rtl8168_mdio_write(tp, 0x19, 0x30c6);
-        rtl8168_mdio_write(tp, 0x15, 0x0107);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0108);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0109);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x010a);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x010b);
-        rtl8168_mdio_write(tp, 0x19, 0x4808);
-        rtl8168_mdio_write(tp, 0x15, 0x010c);
-        rtl8168_mdio_write(tp, 0x19, 0xc32d);
-        rtl8168_mdio_write(tp, 0x15, 0x010d);
-        rtl8168_mdio_write(tp, 0x19, 0x0003);
-        rtl8168_mdio_write(tp, 0x15, 0x010e);
-        rtl8168_mdio_write(tp, 0x19, 0xc8b3);
-        rtl8168_mdio_write(tp, 0x15, 0x010f);
-        rtl8168_mdio_write(tp, 0x19, 0x00fc);
-        rtl8168_mdio_write(tp, 0x15, 0x0110);
-        rtl8168_mdio_write(tp, 0x19, 0x4400);
-        rtl8168_mdio_write(tp, 0x15, 0x0111);
-        rtl8168_mdio_write(tp, 0x19, 0x3116);
-        rtl8168_mdio_write(tp, 0x15, 0x0112);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0113);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0114);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0115);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0116);
-        rtl8168_mdio_write(tp, 0x19, 0x4803);
-        rtl8168_mdio_write(tp, 0x15, 0x0117);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x0118);
-        rtl8168_mdio_write(tp, 0x19, 0x6c02);
-        rtl8168_mdio_write(tp, 0x15, 0x0119);
-        rtl8168_mdio_write(tp, 0x19, 0x7c04);
-        rtl8168_mdio_write(tp, 0x15, 0x011a);
-        rtl8168_mdio_write(tp, 0x19, 0x6000);
-        rtl8168_mdio_write(tp, 0x15, 0x011b);
-        rtl8168_mdio_write(tp, 0x19, 0x5cf7);
-        rtl8168_mdio_write(tp, 0x15, 0x011c);
-        rtl8168_mdio_write(tp, 0x19, 0x7c2a);
-        rtl8168_mdio_write(tp, 0x15, 0x011d);
-        rtl8168_mdio_write(tp, 0x19, 0x5800);
-        rtl8168_mdio_write(tp, 0x15, 0x011e);
-        rtl8168_mdio_write(tp, 0x19, 0x5400);
-        rtl8168_mdio_write(tp, 0x15, 0x011f);
-        rtl8168_mdio_write(tp, 0x19, 0x7c08);
-        rtl8168_mdio_write(tp, 0x15, 0x0120);
-        rtl8168_mdio_write(tp, 0x19, 0x74f0);
-        rtl8168_mdio_write(tp, 0x15, 0x0121);
-        rtl8168_mdio_write(tp, 0x19, 0x4019);
-        rtl8168_mdio_write(tp, 0x15, 0x0122);
-        rtl8168_mdio_write(tp, 0x19, 0x440d);
-        rtl8168_mdio_write(tp, 0x15, 0x0123);
-        rtl8168_mdio_write(tp, 0x19, 0xb6c1);
-        rtl8168_mdio_write(tp, 0x15, 0x0124);
-        rtl8168_mdio_write(tp, 0x19, 0xc05b);
-        rtl8168_mdio_write(tp, 0x15, 0x0125);
-        rtl8168_mdio_write(tp, 0x19, 0x00bf);
-        rtl8168_mdio_write(tp, 0x15, 0x0126);
-        rtl8168_mdio_write(tp, 0x19, 0xc025);
-        rtl8168_mdio_write(tp, 0x15, 0x0127);
-        rtl8168_mdio_write(tp, 0x19, 0x00bd);
-        rtl8168_mdio_write(tp, 0x15, 0x0128);
-        rtl8168_mdio_write(tp, 0x19, 0xc603);
-        rtl8168_mdio_write(tp, 0x15, 0x0129);
-        rtl8168_mdio_write(tp, 0x19, 0x00bb);
-        rtl8168_mdio_write(tp, 0x15, 0x012a);
-        rtl8168_mdio_write(tp, 0x19, 0x8805);
-        rtl8168_mdio_write(tp, 0x15, 0x012b);
-        rtl8168_mdio_write(tp, 0x19, 0x7801);
-        rtl8168_mdio_write(tp, 0x15, 0x012c);
-        rtl8168_mdio_write(tp, 0x19, 0x4001);
-        rtl8168_mdio_write(tp, 0x15, 0x012d);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x012e);
-        rtl8168_mdio_write(tp, 0x19, 0xa3dd);
-        rtl8168_mdio_write(tp, 0x15, 0x012f);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x0130);
-        rtl8168_mdio_write(tp, 0x19, 0x6c03);
-        rtl8168_mdio_write(tp, 0x15, 0x0131);
-        rtl8168_mdio_write(tp, 0x19, 0x8407);
-        rtl8168_mdio_write(tp, 0x15, 0x0132);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x0133);
-        rtl8168_mdio_write(tp, 0x19, 0x6c02);
-        rtl8168_mdio_write(tp, 0x15, 0x0134);
-        rtl8168_mdio_write(tp, 0x19, 0xd9b8);
-        rtl8168_mdio_write(tp, 0x15, 0x0135);
-        rtl8168_mdio_write(tp, 0x19, 0x0003);
-        rtl8168_mdio_write(tp, 0x15, 0x0136);
-        rtl8168_mdio_write(tp, 0x19, 0xc240);
-        rtl8168_mdio_write(tp, 0x15, 0x0137);
-        rtl8168_mdio_write(tp, 0x19, 0x0015);
-        rtl8168_mdio_write(tp, 0x15, 0x0138);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x0139);
-        rtl8168_mdio_write(tp, 0x19, 0x6c02);
-        rtl8168_mdio_write(tp, 0x15, 0x013a);
-        rtl8168_mdio_write(tp, 0x19, 0x9ae9);
-        rtl8168_mdio_write(tp, 0x15, 0x013b);
-        rtl8168_mdio_write(tp, 0x19, 0x3140);
-        rtl8168_mdio_write(tp, 0x15, 0x013c);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x013d);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x013e);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x013f);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0140);
-        rtl8168_mdio_write(tp, 0x19, 0x4807);
-        rtl8168_mdio_write(tp, 0x15, 0x0141);
-        rtl8168_mdio_write(tp, 0x19, 0x4004);
-        rtl8168_mdio_write(tp, 0x15, 0x0142);
-        rtl8168_mdio_write(tp, 0x19, 0x4410);
-        rtl8168_mdio_write(tp, 0x15, 0x0143);
-        rtl8168_mdio_write(tp, 0x19, 0x7c0c);
-        rtl8168_mdio_write(tp, 0x15, 0x0144);
-        rtl8168_mdio_write(tp, 0x19, 0x600c);
-        rtl8168_mdio_write(tp, 0x15, 0x0145);
-        rtl8168_mdio_write(tp, 0x19, 0x9b00);
-        rtl8168_mdio_write(tp, 0x15, 0x0146);
-        rtl8168_mdio_write(tp, 0x19, 0xa68f);
-        rtl8168_mdio_write(tp, 0x15, 0x0147);
-        rtl8168_mdio_write(tp, 0x19, 0x3116);
-        rtl8168_mdio_write(tp, 0x15, 0x0148);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0149);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x014a);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x014b);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x014c);
-        rtl8168_mdio_write(tp, 0x19, 0x4804);
-        rtl8168_mdio_write(tp, 0x15, 0x014d);
-        rtl8168_mdio_write(tp, 0x19, 0x54c0);
-        rtl8168_mdio_write(tp, 0x15, 0x014e);
-        rtl8168_mdio_write(tp, 0x19, 0xb703);
-        rtl8168_mdio_write(tp, 0x15, 0x014f);
-        rtl8168_mdio_write(tp, 0x19, 0x5cff);
-        rtl8168_mdio_write(tp, 0x15, 0x0150);
-        rtl8168_mdio_write(tp, 0x19, 0x315f);
-        rtl8168_mdio_write(tp, 0x15, 0x0151);
-        rtl8168_mdio_write(tp, 0x19, 0x7c08);
-        rtl8168_mdio_write(tp, 0x15, 0x0152);
-        rtl8168_mdio_write(tp, 0x19, 0x74f8);
-        rtl8168_mdio_write(tp, 0x15, 0x0153);
-        rtl8168_mdio_write(tp, 0x19, 0x6421);
-        rtl8168_mdio_write(tp, 0x15, 0x0154);
-        rtl8168_mdio_write(tp, 0x19, 0x7c08);
-        rtl8168_mdio_write(tp, 0x15, 0x0155);
-        rtl8168_mdio_write(tp, 0x19, 0x6000);
-        rtl8168_mdio_write(tp, 0x15, 0x0156);
-        rtl8168_mdio_write(tp, 0x19, 0x4003);
-        rtl8168_mdio_write(tp, 0x15, 0x0157);
-        rtl8168_mdio_write(tp, 0x19, 0x4418);
-        rtl8168_mdio_write(tp, 0x15, 0x0158);
-        rtl8168_mdio_write(tp, 0x19, 0x9b00);
-        rtl8168_mdio_write(tp, 0x15, 0x0159);
-        rtl8168_mdio_write(tp, 0x19, 0x6461);
-        rtl8168_mdio_write(tp, 0x15, 0x015a);
-        rtl8168_mdio_write(tp, 0x19, 0x64e1);
-        rtl8168_mdio_write(tp, 0x15, 0x015b);
-        rtl8168_mdio_write(tp, 0x19, 0x7c20);
-        rtl8168_mdio_write(tp, 0x15, 0x015c);
-        rtl8168_mdio_write(tp, 0x19, 0x5820);
-        rtl8168_mdio_write(tp, 0x15, 0x015d);
-        rtl8168_mdio_write(tp, 0x19, 0x5ccf);
-        rtl8168_mdio_write(tp, 0x15, 0x015e);
-        rtl8168_mdio_write(tp, 0x19, 0x7050);
-        rtl8168_mdio_write(tp, 0x15, 0x015f);
-        rtl8168_mdio_write(tp, 0x19, 0xd9b8);
-        rtl8168_mdio_write(tp, 0x15, 0x0160);
-        rtl8168_mdio_write(tp, 0x19, 0x0008);
-        rtl8168_mdio_write(tp, 0x15, 0x0161);
-        rtl8168_mdio_write(tp, 0x19, 0xdab1);
-        rtl8168_mdio_write(tp, 0x15, 0x0162);
-        rtl8168_mdio_write(tp, 0x19, 0x0015);
-        rtl8168_mdio_write(tp, 0x15, 0x0163);
-        rtl8168_mdio_write(tp, 0x19, 0xc244);
-        rtl8168_mdio_write(tp, 0x15, 0x0164);
-        rtl8168_mdio_write(tp, 0x19, 0x0013);
-        rtl8168_mdio_write(tp, 0x15, 0x0165);
-        rtl8168_mdio_write(tp, 0x19, 0xc021);
-        rtl8168_mdio_write(tp, 0x15, 0x0166);
-        rtl8168_mdio_write(tp, 0x19, 0x00f9);
-        rtl8168_mdio_write(tp, 0x15, 0x0167);
-        rtl8168_mdio_write(tp, 0x19, 0x3177);
-        rtl8168_mdio_write(tp, 0x15, 0x0168);
-        rtl8168_mdio_write(tp, 0x19, 0x5cf7);
-        rtl8168_mdio_write(tp, 0x15, 0x0169);
-        rtl8168_mdio_write(tp, 0x19, 0x4010);
-        rtl8168_mdio_write(tp, 0x15, 0x016a);
-        rtl8168_mdio_write(tp, 0x19, 0x4428);
-        rtl8168_mdio_write(tp, 0x15, 0x016b);
-        rtl8168_mdio_write(tp, 0x19, 0x9c00);
-        rtl8168_mdio_write(tp, 0x15, 0x016c);
-        rtl8168_mdio_write(tp, 0x19, 0x7c08);
-        rtl8168_mdio_write(tp, 0x15, 0x016d);
-        rtl8168_mdio_write(tp, 0x19, 0x6008);
-        rtl8168_mdio_write(tp, 0x15, 0x016e);
-        rtl8168_mdio_write(tp, 0x19, 0x7c08);
-        rtl8168_mdio_write(tp, 0x15, 0x016f);
-        rtl8168_mdio_write(tp, 0x19, 0x74f0);
-        rtl8168_mdio_write(tp, 0x15, 0x0170);
-        rtl8168_mdio_write(tp, 0x19, 0x6461);
-        rtl8168_mdio_write(tp, 0x15, 0x0171);
-        rtl8168_mdio_write(tp, 0x19, 0x6421);
-        rtl8168_mdio_write(tp, 0x15, 0x0172);
-        rtl8168_mdio_write(tp, 0x19, 0x64a1);
-        rtl8168_mdio_write(tp, 0x15, 0x0173);
-        rtl8168_mdio_write(tp, 0x19, 0x3116);
-        rtl8168_mdio_write(tp, 0x15, 0x0174);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0175);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0176);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0177);
-        rtl8168_mdio_write(tp, 0x19, 0x4805);
-        rtl8168_mdio_write(tp, 0x15, 0x0178);
-        rtl8168_mdio_write(tp, 0x19, 0xa103);
-        rtl8168_mdio_write(tp, 0x15, 0x0179);
-        rtl8168_mdio_write(tp, 0x19, 0x7c02);
-        rtl8168_mdio_write(tp, 0x15, 0x017a);
-        rtl8168_mdio_write(tp, 0x19, 0x6002);
-        rtl8168_mdio_write(tp, 0x15, 0x017b);
-        rtl8168_mdio_write(tp, 0x19, 0x7e00);
-        rtl8168_mdio_write(tp, 0x15, 0x017c);
-        rtl8168_mdio_write(tp, 0x19, 0x5400);
-        rtl8168_mdio_write(tp, 0x15, 0x017d);
-        rtl8168_mdio_write(tp, 0x19, 0x7c6b);
-        rtl8168_mdio_write(tp, 0x15, 0x017e);
-        rtl8168_mdio_write(tp, 0x19, 0x5c63);
-        rtl8168_mdio_write(tp, 0x15, 0x017f);
-        rtl8168_mdio_write(tp, 0x19, 0x407d);
-        rtl8168_mdio_write(tp, 0x15, 0x0180);
-        rtl8168_mdio_write(tp, 0x19, 0xa602);
-        rtl8168_mdio_write(tp, 0x15, 0x0181);
-        rtl8168_mdio_write(tp, 0x19, 0x4001);
-        rtl8168_mdio_write(tp, 0x15, 0x0182);
-        rtl8168_mdio_write(tp, 0x19, 0x4420);
-        rtl8168_mdio_write(tp, 0x15, 0x0183);
-        rtl8168_mdio_write(tp, 0x19, 0x4020);
-        rtl8168_mdio_write(tp, 0x15, 0x0184);
-        rtl8168_mdio_write(tp, 0x19, 0x44a1);
-        rtl8168_mdio_write(tp, 0x15, 0x0185);
-        rtl8168_mdio_write(tp, 0x19, 0xd6e0);
-        rtl8168_mdio_write(tp, 0x15, 0x0186);
-        rtl8168_mdio_write(tp, 0x19, 0x0009);
-        rtl8168_mdio_write(tp, 0x15, 0x0187);
-        rtl8168_mdio_write(tp, 0x19, 0x9efe);
-        rtl8168_mdio_write(tp, 0x15, 0x0188);
-        rtl8168_mdio_write(tp, 0x19, 0x7c02);
-        rtl8168_mdio_write(tp, 0x15, 0x0189);
-        rtl8168_mdio_write(tp, 0x19, 0x6000);
-        rtl8168_mdio_write(tp, 0x15, 0x018a);
-        rtl8168_mdio_write(tp, 0x19, 0x9c00);
-        rtl8168_mdio_write(tp, 0x15, 0x018b);
-        rtl8168_mdio_write(tp, 0x19, 0x318f);
-        rtl8168_mdio_write(tp, 0x15, 0x018c);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x018d);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x018e);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x018f);
-        rtl8168_mdio_write(tp, 0x19, 0x4806);
-        rtl8168_mdio_write(tp, 0x15, 0x0190);
-        rtl8168_mdio_write(tp, 0x19, 0x7c10);
-        rtl8168_mdio_write(tp, 0x15, 0x0191);
-        rtl8168_mdio_write(tp, 0x19, 0x5c10);
-        rtl8168_mdio_write(tp, 0x15, 0x0192);
-        rtl8168_mdio_write(tp, 0x19, 0x40fa);
-        rtl8168_mdio_write(tp, 0x15, 0x0193);
-        rtl8168_mdio_write(tp, 0x19, 0xa602);
-        rtl8168_mdio_write(tp, 0x15, 0x0194);
-        rtl8168_mdio_write(tp, 0x19, 0x4010);
-        rtl8168_mdio_write(tp, 0x15, 0x0195);
-        rtl8168_mdio_write(tp, 0x19, 0x4440);
-        rtl8168_mdio_write(tp, 0x15, 0x0196);
-        rtl8168_mdio_write(tp, 0x19, 0x9d00);
-        rtl8168_mdio_write(tp, 0x15, 0x0197);
-        rtl8168_mdio_write(tp, 0x19, 0x7c80);
-        rtl8168_mdio_write(tp, 0x15, 0x0198);
-        rtl8168_mdio_write(tp, 0x19, 0x6400);
-        rtl8168_mdio_write(tp, 0x15, 0x0199);
-        rtl8168_mdio_write(tp, 0x19, 0x4003);
-        rtl8168_mdio_write(tp, 0x15, 0x019a);
-        rtl8168_mdio_write(tp, 0x19, 0x4540);
-        rtl8168_mdio_write(tp, 0x15, 0x019b);
-        rtl8168_mdio_write(tp, 0x19, 0x7c08);
-        rtl8168_mdio_write(tp, 0x15, 0x019c);
-        rtl8168_mdio_write(tp, 0x19, 0x6008);
-        rtl8168_mdio_write(tp, 0x15, 0x019d);
-        rtl8168_mdio_write(tp, 0x19, 0x9f00);
-        rtl8168_mdio_write(tp, 0x15, 0x019e);
-        rtl8168_mdio_write(tp, 0x19, 0x7c40);
-        rtl8168_mdio_write(tp, 0x15, 0x019f);
-        rtl8168_mdio_write(tp, 0x19, 0x6400);
-        rtl8168_mdio_write(tp, 0x15, 0x01a0);
-        rtl8168_mdio_write(tp, 0x19, 0x7c80);
-        rtl8168_mdio_write(tp, 0x15, 0x01a1);
-        rtl8168_mdio_write(tp, 0x19, 0x6480);
-        rtl8168_mdio_write(tp, 0x15, 0x01a2);
-        rtl8168_mdio_write(tp, 0x19, 0x3140);
-        rtl8168_mdio_write(tp, 0x15, 0x01a3);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x01a4);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x01a5);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x01a6);
-        rtl8168_mdio_write(tp, 0x19, 0x4400);
-        rtl8168_mdio_write(tp, 0x15, 0x01a7);
-        rtl8168_mdio_write(tp, 0x19, 0x7c0b);
-        rtl8168_mdio_write(tp, 0x15, 0x01a8);
-        rtl8168_mdio_write(tp, 0x19, 0x6c01);
-        rtl8168_mdio_write(tp, 0x15, 0x01a9);
-        rtl8168_mdio_write(tp, 0x19, 0x64a8);
-        rtl8168_mdio_write(tp, 0x15, 0x01aa);
-        rtl8168_mdio_write(tp, 0x19, 0x6800);
-        rtl8168_mdio_write(tp, 0x15, 0x01ab);
-        rtl8168_mdio_write(tp, 0x19, 0x5cf0);
-        rtl8168_mdio_write(tp, 0x15, 0x01ac);
-        rtl8168_mdio_write(tp, 0x19, 0x588f);
-        rtl8168_mdio_write(tp, 0x15, 0x01ad);
-        rtl8168_mdio_write(tp, 0x19, 0xb628);
-        rtl8168_mdio_write(tp, 0x15, 0x01ae);
-        rtl8168_mdio_write(tp, 0x19, 0xc053);
-        rtl8168_mdio_write(tp, 0x15, 0x01af);
-        rtl8168_mdio_write(tp, 0x19, 0x0026);
-        rtl8168_mdio_write(tp, 0x15, 0x01b0);
-        rtl8168_mdio_write(tp, 0x19, 0xc02d);
-        rtl8168_mdio_write(tp, 0x15, 0x01b1);
-        rtl8168_mdio_write(tp, 0x19, 0x0024);
-        rtl8168_mdio_write(tp, 0x15, 0x01b2);
-        rtl8168_mdio_write(tp, 0x19, 0xc603);
-        rtl8168_mdio_write(tp, 0x15, 0x01b3);
-        rtl8168_mdio_write(tp, 0x19, 0x0022);
-        rtl8168_mdio_write(tp, 0x15, 0x01b4);
-        rtl8168_mdio_write(tp, 0x19, 0x8cf9);
-        rtl8168_mdio_write(tp, 0x15, 0x01b5);
-        rtl8168_mdio_write(tp, 0x19, 0x31ba);
-        rtl8168_mdio_write(tp, 0x15, 0x01b6);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x01b7);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x01b8);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x01b9);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x01ba);
-        rtl8168_mdio_write(tp, 0x19, 0x4400);
-        rtl8168_mdio_write(tp, 0x15, 0x01bb);
-        rtl8168_mdio_write(tp, 0x19, 0x5420);
-        rtl8168_mdio_write(tp, 0x15, 0x01bc);
-        rtl8168_mdio_write(tp, 0x19, 0x4811);
-        rtl8168_mdio_write(tp, 0x15, 0x01bd);
-        rtl8168_mdio_write(tp, 0x19, 0x5000);
-        rtl8168_mdio_write(tp, 0x15, 0x01be);
-        rtl8168_mdio_write(tp, 0x19, 0x4801);
-        rtl8168_mdio_write(tp, 0x15, 0x01bf);
-        rtl8168_mdio_write(tp, 0x19, 0x6800);
-        rtl8168_mdio_write(tp, 0x15, 0x01c0);
-        rtl8168_mdio_write(tp, 0x19, 0x31f5);
-        rtl8168_mdio_write(tp, 0x15, 0x01c1);
-        rtl8168_mdio_write(tp, 0x19, 0xb614);
-        rtl8168_mdio_write(tp, 0x15, 0x01c2);
-        rtl8168_mdio_write(tp, 0x19, 0x8ce4);
-        rtl8168_mdio_write(tp, 0x15, 0x01c3);
-        rtl8168_mdio_write(tp, 0x19, 0xb30c);
-        rtl8168_mdio_write(tp, 0x15, 0x01c4);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x01c5);
-        rtl8168_mdio_write(tp, 0x19, 0x6c02);
-        rtl8168_mdio_write(tp, 0x15, 0x01c6);
-        rtl8168_mdio_write(tp, 0x19, 0x8206);
-        rtl8168_mdio_write(tp, 0x15, 0x01c7);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x01c8);
-        rtl8168_mdio_write(tp, 0x19, 0x6c00);
-        rtl8168_mdio_write(tp, 0x15, 0x01c9);
-        rtl8168_mdio_write(tp, 0x19, 0x7c04);
-        rtl8168_mdio_write(tp, 0x15, 0x01ca);
-        rtl8168_mdio_write(tp, 0x19, 0x7404);
-        rtl8168_mdio_write(tp, 0x15, 0x01cb);
-        rtl8168_mdio_write(tp, 0x19, 0x31c0);
-        rtl8168_mdio_write(tp, 0x15, 0x01cc);
-        rtl8168_mdio_write(tp, 0x19, 0x7c04);
-        rtl8168_mdio_write(tp, 0x15, 0x01cd);
-        rtl8168_mdio_write(tp, 0x19, 0x7400);
-        rtl8168_mdio_write(tp, 0x15, 0x01ce);
-        rtl8168_mdio_write(tp, 0x19, 0x31c0);
-        rtl8168_mdio_write(tp, 0x15, 0x01cf);
-        rtl8168_mdio_write(tp, 0x19, 0x8df1);
-        rtl8168_mdio_write(tp, 0x15, 0x01d0);
-        rtl8168_mdio_write(tp, 0x19, 0x3248);
-        rtl8168_mdio_write(tp, 0x15, 0x01d1);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x01d2);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x01d3);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x01d4);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x01d5);
-        rtl8168_mdio_write(tp, 0x19, 0x4400);
-        rtl8168_mdio_write(tp, 0x15, 0x01d6);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x01d7);
-        rtl8168_mdio_write(tp, 0x19, 0x6c03);
-        rtl8168_mdio_write(tp, 0x15, 0x01d8);
-        rtl8168_mdio_write(tp, 0x19, 0x7670);
-        rtl8168_mdio_write(tp, 0x15, 0x01d9);
-        rtl8168_mdio_write(tp, 0x19, 0x4023);
-        rtl8168_mdio_write(tp, 0x15, 0x01da);
-        rtl8168_mdio_write(tp, 0x19, 0x4500);
-        rtl8168_mdio_write(tp, 0x15, 0x01db);
-        rtl8168_mdio_write(tp, 0x19, 0x4069);
-        rtl8168_mdio_write(tp, 0x15, 0x01dc);
-        rtl8168_mdio_write(tp, 0x19, 0x4580);
-        rtl8168_mdio_write(tp, 0x15, 0x01dd);
-        rtl8168_mdio_write(tp, 0x19, 0x9f00);
-        rtl8168_mdio_write(tp, 0x15, 0x01de);
-        rtl8168_mdio_write(tp, 0x19, 0xcff5);
-        rtl8168_mdio_write(tp, 0x15, 0x01df);
-        rtl8168_mdio_write(tp, 0x19, 0x00ff);
-        rtl8168_mdio_write(tp, 0x15, 0x01e0);
-        rtl8168_mdio_write(tp, 0x19, 0x76f0);
-        rtl8168_mdio_write(tp, 0x15, 0x01e1);
-        rtl8168_mdio_write(tp, 0x19, 0x4400);
-        rtl8168_mdio_write(tp, 0x15, 0x01e2);
-        rtl8168_mdio_write(tp, 0x19, 0x4023);
-        rtl8168_mdio_write(tp, 0x15, 0x01e3);
-        rtl8168_mdio_write(tp, 0x19, 0x4500);
-        rtl8168_mdio_write(tp, 0x15, 0x01e4);
-        rtl8168_mdio_write(tp, 0x19, 0x4069);
-        rtl8168_mdio_write(tp, 0x15, 0x01e5);
-        rtl8168_mdio_write(tp, 0x19, 0x4580);
-        rtl8168_mdio_write(tp, 0x15, 0x01e6);
-        rtl8168_mdio_write(tp, 0x19, 0x9f00);
-        rtl8168_mdio_write(tp, 0x15, 0x01e7);
-        rtl8168_mdio_write(tp, 0x19, 0xd0f5);
-        rtl8168_mdio_write(tp, 0x15, 0x01e8);
-        rtl8168_mdio_write(tp, 0x19, 0x00ff);
-        rtl8168_mdio_write(tp, 0x15, 0x01e9);
-        rtl8168_mdio_write(tp, 0x19, 0x4400);
-        rtl8168_mdio_write(tp, 0x15, 0x01ea);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x01eb);
-        rtl8168_mdio_write(tp, 0x19, 0x6800);
-        rtl8168_mdio_write(tp, 0x15, 0x01ec);
-        rtl8168_mdio_write(tp, 0x19, 0x66a0);
-        rtl8168_mdio_write(tp, 0x15, 0x01ed);
-        rtl8168_mdio_write(tp, 0x19, 0x8300);
-        rtl8168_mdio_write(tp, 0x15, 0x01ee);
-        rtl8168_mdio_write(tp, 0x19, 0x74f0);
-        rtl8168_mdio_write(tp, 0x15, 0x01ef);
-        rtl8168_mdio_write(tp, 0x19, 0x3006);
-        rtl8168_mdio_write(tp, 0x15, 0x01f0);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x01f1);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x01f2);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x01f3);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x01f4);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x01f5);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x01f6);
-        rtl8168_mdio_write(tp, 0x19, 0x6c02);
-        rtl8168_mdio_write(tp, 0x15, 0x01f7);
-        rtl8168_mdio_write(tp, 0x19, 0x409d);
-        rtl8168_mdio_write(tp, 0x15, 0x01f8);
-        rtl8168_mdio_write(tp, 0x19, 0x7c87);
-        rtl8168_mdio_write(tp, 0x15, 0x01f9);
-        rtl8168_mdio_write(tp, 0x19, 0xae14);
-        rtl8168_mdio_write(tp, 0x15, 0x01fa);
-        rtl8168_mdio_write(tp, 0x19, 0x4400);
-        rtl8168_mdio_write(tp, 0x15, 0x01fb);
-        rtl8168_mdio_write(tp, 0x19, 0x7c40);
-        rtl8168_mdio_write(tp, 0x15, 0x01fc);
-        rtl8168_mdio_write(tp, 0x19, 0x6800);
-        rtl8168_mdio_write(tp, 0x15, 0x01fd);
-        rtl8168_mdio_write(tp, 0x19, 0x7801);
-        rtl8168_mdio_write(tp, 0x15, 0x01fe);
-        rtl8168_mdio_write(tp, 0x19, 0x980e);
-        rtl8168_mdio_write(tp, 0x15, 0x01ff);
-        rtl8168_mdio_write(tp, 0x19, 0x930c);
-        rtl8168_mdio_write(tp, 0x15, 0x0200);
-        rtl8168_mdio_write(tp, 0x19, 0x9206);
-        rtl8168_mdio_write(tp, 0x15, 0x0201);
-        rtl8168_mdio_write(tp, 0x19, 0x4002);
-        rtl8168_mdio_write(tp, 0x15, 0x0202);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x0203);
-        rtl8168_mdio_write(tp, 0x19, 0x588f);
-        rtl8168_mdio_write(tp, 0x15, 0x0204);
-        rtl8168_mdio_write(tp, 0x19, 0x5520);
-        rtl8168_mdio_write(tp, 0x15, 0x0205);
-        rtl8168_mdio_write(tp, 0x19, 0x320c);
-        rtl8168_mdio_write(tp, 0x15, 0x0206);
-        rtl8168_mdio_write(tp, 0x19, 0x4000);
-        rtl8168_mdio_write(tp, 0x15, 0x0207);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x0208);
-        rtl8168_mdio_write(tp, 0x19, 0x588d);
-        rtl8168_mdio_write(tp, 0x15, 0x0209);
-        rtl8168_mdio_write(tp, 0x19, 0x5500);
-        rtl8168_mdio_write(tp, 0x15, 0x020a);
-        rtl8168_mdio_write(tp, 0x19, 0x320c);
-        rtl8168_mdio_write(tp, 0x15, 0x020b);
-        rtl8168_mdio_write(tp, 0x19, 0x4002);
-        rtl8168_mdio_write(tp, 0x15, 0x020c);
-        rtl8168_mdio_write(tp, 0x19, 0x3220);
-        rtl8168_mdio_write(tp, 0x15, 0x020d);
-        rtl8168_mdio_write(tp, 0x19, 0x4480);
-        rtl8168_mdio_write(tp, 0x15, 0x020e);
-        rtl8168_mdio_write(tp, 0x19, 0x9e03);
-        rtl8168_mdio_write(tp, 0x15, 0x020f);
-        rtl8168_mdio_write(tp, 0x19, 0x7c40);
-        rtl8168_mdio_write(tp, 0x15, 0x0210);
-        rtl8168_mdio_write(tp, 0x19, 0x6840);
-        rtl8168_mdio_write(tp, 0x15, 0x0211);
-        rtl8168_mdio_write(tp, 0x19, 0x7801);
-        rtl8168_mdio_write(tp, 0x15, 0x0212);
-        rtl8168_mdio_write(tp, 0x19, 0x980e);
-        rtl8168_mdio_write(tp, 0x15, 0x0213);
-        rtl8168_mdio_write(tp, 0x19, 0x930c);
-        rtl8168_mdio_write(tp, 0x15, 0x0214);
-        rtl8168_mdio_write(tp, 0x19, 0x9206);
-        rtl8168_mdio_write(tp, 0x15, 0x0215);
-        rtl8168_mdio_write(tp, 0x19, 0x4000);
-        rtl8168_mdio_write(tp, 0x15, 0x0216);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x0217);
-        rtl8168_mdio_write(tp, 0x19, 0x588f);
-        rtl8168_mdio_write(tp, 0x15, 0x0218);
-        rtl8168_mdio_write(tp, 0x19, 0x5520);
-        rtl8168_mdio_write(tp, 0x15, 0x0219);
-        rtl8168_mdio_write(tp, 0x19, 0x3220);
-        rtl8168_mdio_write(tp, 0x15, 0x021a);
-        rtl8168_mdio_write(tp, 0x19, 0x4002);
-        rtl8168_mdio_write(tp, 0x15, 0x021b);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x021c);
-        rtl8168_mdio_write(tp, 0x19, 0x588d);
-        rtl8168_mdio_write(tp, 0x15, 0x021d);
-        rtl8168_mdio_write(tp, 0x19, 0x5540);
-        rtl8168_mdio_write(tp, 0x15, 0x021e);
-        rtl8168_mdio_write(tp, 0x19, 0x3220);
-        rtl8168_mdio_write(tp, 0x15, 0x021f);
-        rtl8168_mdio_write(tp, 0x19, 0x4000);
-        rtl8168_mdio_write(tp, 0x15, 0x0220);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x0221);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x0222);
-        rtl8168_mdio_write(tp, 0x19, 0x6c00);
-        rtl8168_mdio_write(tp, 0x15, 0x0223);
-        rtl8168_mdio_write(tp, 0x19, 0x3231);
-        rtl8168_mdio_write(tp, 0x15, 0x0224);
-        rtl8168_mdio_write(tp, 0x19, 0xab06);
-        rtl8168_mdio_write(tp, 0x15, 0x0225);
-        rtl8168_mdio_write(tp, 0x19, 0xbf08);
-        rtl8168_mdio_write(tp, 0x15, 0x0226);
-        rtl8168_mdio_write(tp, 0x19, 0x4076);
-        rtl8168_mdio_write(tp, 0x15, 0x0227);
-        rtl8168_mdio_write(tp, 0x19, 0x7d07);
-        rtl8168_mdio_write(tp, 0x15, 0x0228);
-        rtl8168_mdio_write(tp, 0x19, 0x4502);
-        rtl8168_mdio_write(tp, 0x15, 0x0229);
-        rtl8168_mdio_write(tp, 0x19, 0x3231);
-        rtl8168_mdio_write(tp, 0x15, 0x022a);
-        rtl8168_mdio_write(tp, 0x19, 0x7d80);
-        rtl8168_mdio_write(tp, 0x15, 0x022b);
-        rtl8168_mdio_write(tp, 0x19, 0x5180);
-        rtl8168_mdio_write(tp, 0x15, 0x022c);
-        rtl8168_mdio_write(tp, 0x19, 0x322f);
-        rtl8168_mdio_write(tp, 0x15, 0x022d);
-        rtl8168_mdio_write(tp, 0x19, 0x7d80);
-        rtl8168_mdio_write(tp, 0x15, 0x022e);
-        rtl8168_mdio_write(tp, 0x19, 0x5000);
-        rtl8168_mdio_write(tp, 0x15, 0x022f);
-        rtl8168_mdio_write(tp, 0x19, 0x7d07);
-        rtl8168_mdio_write(tp, 0x15, 0x0230);
-        rtl8168_mdio_write(tp, 0x19, 0x4402);
-        rtl8168_mdio_write(tp, 0x15, 0x0231);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x0232);
-        rtl8168_mdio_write(tp, 0x19, 0x6c02);
-        rtl8168_mdio_write(tp, 0x15, 0x0233);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x0234);
-        rtl8168_mdio_write(tp, 0x19, 0xb309);
-        rtl8168_mdio_write(tp, 0x15, 0x0235);
-        rtl8168_mdio_write(tp, 0x19, 0xb204);
-        rtl8168_mdio_write(tp, 0x15, 0x0236);
-        rtl8168_mdio_write(tp, 0x19, 0xb105);
-        rtl8168_mdio_write(tp, 0x15, 0x0237);
-        rtl8168_mdio_write(tp, 0x19, 0x6c00);
-        rtl8168_mdio_write(tp, 0x15, 0x0238);
-        rtl8168_mdio_write(tp, 0x19, 0x31c1);
-        rtl8168_mdio_write(tp, 0x15, 0x0239);
-        rtl8168_mdio_write(tp, 0x19, 0x6c00);
-        rtl8168_mdio_write(tp, 0x15, 0x023a);
-        rtl8168_mdio_write(tp, 0x19, 0x3261);
-        rtl8168_mdio_write(tp, 0x15, 0x023b);
-        rtl8168_mdio_write(tp, 0x19, 0x6c00);
-        rtl8168_mdio_write(tp, 0x15, 0x023c);
-        rtl8168_mdio_write(tp, 0x19, 0x3250);
-        rtl8168_mdio_write(tp, 0x15, 0x023d);
-        rtl8168_mdio_write(tp, 0x19, 0xb203);
-        rtl8168_mdio_write(tp, 0x15, 0x023e);
-        rtl8168_mdio_write(tp, 0x19, 0x6c00);
-        rtl8168_mdio_write(tp, 0x15, 0x023f);
-        rtl8168_mdio_write(tp, 0x19, 0x327a);
-        rtl8168_mdio_write(tp, 0x15, 0x0240);
-        rtl8168_mdio_write(tp, 0x19, 0x6c00);
-        rtl8168_mdio_write(tp, 0x15, 0x0241);
-        rtl8168_mdio_write(tp, 0x19, 0x3293);
-        rtl8168_mdio_write(tp, 0x15, 0x0242);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0243);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0244);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0245);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0246);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0247);
-        rtl8168_mdio_write(tp, 0x19, 0x32a3);
-        rtl8168_mdio_write(tp, 0x15, 0x0248);
-        rtl8168_mdio_write(tp, 0x19, 0x5520);
-        rtl8168_mdio_write(tp, 0x15, 0x0249);
-        rtl8168_mdio_write(tp, 0x19, 0x403d);
-        rtl8168_mdio_write(tp, 0x15, 0x024a);
-        rtl8168_mdio_write(tp, 0x19, 0x440c);
-        rtl8168_mdio_write(tp, 0x15, 0x024b);
-        rtl8168_mdio_write(tp, 0x19, 0x4812);
-        rtl8168_mdio_write(tp, 0x15, 0x024c);
-        rtl8168_mdio_write(tp, 0x19, 0x5001);
-        rtl8168_mdio_write(tp, 0x15, 0x024d);
-        rtl8168_mdio_write(tp, 0x19, 0x4802);
-        rtl8168_mdio_write(tp, 0x15, 0x024e);
-        rtl8168_mdio_write(tp, 0x19, 0x6880);
-        rtl8168_mdio_write(tp, 0x15, 0x024f);
-        rtl8168_mdio_write(tp, 0x19, 0x31f5);
-        rtl8168_mdio_write(tp, 0x15, 0x0250);
-        rtl8168_mdio_write(tp, 0x19, 0xb685);
-        rtl8168_mdio_write(tp, 0x15, 0x0251);
-        rtl8168_mdio_write(tp, 0x19, 0x801c);
-        rtl8168_mdio_write(tp, 0x15, 0x0252);
-        rtl8168_mdio_write(tp, 0x19, 0xbaf5);
-        rtl8168_mdio_write(tp, 0x15, 0x0253);
-        rtl8168_mdio_write(tp, 0x19, 0xc07c);
-        rtl8168_mdio_write(tp, 0x15, 0x0254);
-        rtl8168_mdio_write(tp, 0x19, 0x00fb);
-        rtl8168_mdio_write(tp, 0x15, 0x0255);
-        rtl8168_mdio_write(tp, 0x19, 0x325a);
-        rtl8168_mdio_write(tp, 0x15, 0x0256);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0257);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0258);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0259);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x025a);
-        rtl8168_mdio_write(tp, 0x19, 0x481a);
-        rtl8168_mdio_write(tp, 0x15, 0x025b);
-        rtl8168_mdio_write(tp, 0x19, 0x5001);
-        rtl8168_mdio_write(tp, 0x15, 0x025c);
-        rtl8168_mdio_write(tp, 0x19, 0x401b);
-        rtl8168_mdio_write(tp, 0x15, 0x025d);
-        rtl8168_mdio_write(tp, 0x19, 0x480a);
-        rtl8168_mdio_write(tp, 0x15, 0x025e);
-        rtl8168_mdio_write(tp, 0x19, 0x4418);
-        rtl8168_mdio_write(tp, 0x15, 0x025f);
-        rtl8168_mdio_write(tp, 0x19, 0x6900);
-        rtl8168_mdio_write(tp, 0x15, 0x0260);
-        rtl8168_mdio_write(tp, 0x19, 0x31f5);
-        rtl8168_mdio_write(tp, 0x15, 0x0261);
-        rtl8168_mdio_write(tp, 0x19, 0xb64b);
-        rtl8168_mdio_write(tp, 0x15, 0x0262);
-        rtl8168_mdio_write(tp, 0x19, 0xdb00);
-        rtl8168_mdio_write(tp, 0x15, 0x0263);
-        rtl8168_mdio_write(tp, 0x19, 0x0048);
-        rtl8168_mdio_write(tp, 0x15, 0x0264);
-        rtl8168_mdio_write(tp, 0x19, 0xdb7d);
-        rtl8168_mdio_write(tp, 0x15, 0x0265);
-        rtl8168_mdio_write(tp, 0x19, 0x0002);
-        rtl8168_mdio_write(tp, 0x15, 0x0266);
-        rtl8168_mdio_write(tp, 0x19, 0xa0fa);
-        rtl8168_mdio_write(tp, 0x15, 0x0267);
-        rtl8168_mdio_write(tp, 0x19, 0x4408);
-        rtl8168_mdio_write(tp, 0x15, 0x0268);
-        rtl8168_mdio_write(tp, 0x19, 0x3248);
-        rtl8168_mdio_write(tp, 0x15, 0x0269);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x026a);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x026b);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x026c);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x026d);
-        rtl8168_mdio_write(tp, 0x19, 0xb806);
-        rtl8168_mdio_write(tp, 0x15, 0x026e);
-        rtl8168_mdio_write(tp, 0x19, 0x588d);
-        rtl8168_mdio_write(tp, 0x15, 0x026f);
-        rtl8168_mdio_write(tp, 0x19, 0x5500);
-        rtl8168_mdio_write(tp, 0x15, 0x0270);
-        rtl8168_mdio_write(tp, 0x19, 0x7801);
-        rtl8168_mdio_write(tp, 0x15, 0x0271);
-        rtl8168_mdio_write(tp, 0x19, 0x4002);
-        rtl8168_mdio_write(tp, 0x15, 0x0272);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x0273);
-        rtl8168_mdio_write(tp, 0x19, 0x4814);
-        rtl8168_mdio_write(tp, 0x15, 0x0274);
-        rtl8168_mdio_write(tp, 0x19, 0x500b);
-        rtl8168_mdio_write(tp, 0x15, 0x0275);
-        rtl8168_mdio_write(tp, 0x19, 0x4804);
-        rtl8168_mdio_write(tp, 0x15, 0x0276);
-        rtl8168_mdio_write(tp, 0x19, 0x40c4);
-        rtl8168_mdio_write(tp, 0x15, 0x0277);
-        rtl8168_mdio_write(tp, 0x19, 0x4425);
-        rtl8168_mdio_write(tp, 0x15, 0x0278);
-        rtl8168_mdio_write(tp, 0x19, 0x6a00);
-        rtl8168_mdio_write(tp, 0x15, 0x0279);
-        rtl8168_mdio_write(tp, 0x19, 0x31f5);
-        rtl8168_mdio_write(tp, 0x15, 0x027a);
-        rtl8168_mdio_write(tp, 0x19, 0xb632);
-        rtl8168_mdio_write(tp, 0x15, 0x027b);
-        rtl8168_mdio_write(tp, 0x19, 0xdc03);
-        rtl8168_mdio_write(tp, 0x15, 0x027c);
-        rtl8168_mdio_write(tp, 0x19, 0x0027);
-        rtl8168_mdio_write(tp, 0x15, 0x027d);
-        rtl8168_mdio_write(tp, 0x19, 0x80fc);
-        rtl8168_mdio_write(tp, 0x15, 0x027e);
-        rtl8168_mdio_write(tp, 0x19, 0x3283);
-        rtl8168_mdio_write(tp, 0x15, 0x027f);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0280);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0281);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0282);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0283);
-        rtl8168_mdio_write(tp, 0x19, 0xb806);
-        rtl8168_mdio_write(tp, 0x15, 0x0284);
-        rtl8168_mdio_write(tp, 0x19, 0x588f);
-        rtl8168_mdio_write(tp, 0x15, 0x0285);
-        rtl8168_mdio_write(tp, 0x19, 0x5520);
-        rtl8168_mdio_write(tp, 0x15, 0x0286);
-        rtl8168_mdio_write(tp, 0x19, 0x7801);
-        rtl8168_mdio_write(tp, 0x15, 0x0287);
-        rtl8168_mdio_write(tp, 0x19, 0x4000);
-        rtl8168_mdio_write(tp, 0x15, 0x0288);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x0289);
-        rtl8168_mdio_write(tp, 0x19, 0x4818);
-        rtl8168_mdio_write(tp, 0x15, 0x028a);
-        rtl8168_mdio_write(tp, 0x19, 0x5051);
-        rtl8168_mdio_write(tp, 0x15, 0x028b);
-        rtl8168_mdio_write(tp, 0x19, 0x4808);
-        rtl8168_mdio_write(tp, 0x15, 0x028c);
-        rtl8168_mdio_write(tp, 0x19, 0x4050);
-        rtl8168_mdio_write(tp, 0x15, 0x028d);
-        rtl8168_mdio_write(tp, 0x19, 0x4462);
-        rtl8168_mdio_write(tp, 0x15, 0x028e);
-        rtl8168_mdio_write(tp, 0x19, 0x40c4);
-        rtl8168_mdio_write(tp, 0x15, 0x028f);
-        rtl8168_mdio_write(tp, 0x19, 0x4473);
-        rtl8168_mdio_write(tp, 0x15, 0x0290);
-        rtl8168_mdio_write(tp, 0x19, 0x5041);
-        rtl8168_mdio_write(tp, 0x15, 0x0291);
-        rtl8168_mdio_write(tp, 0x19, 0x6b00);
-        rtl8168_mdio_write(tp, 0x15, 0x0292);
-        rtl8168_mdio_write(tp, 0x19, 0x31f5);
-        rtl8168_mdio_write(tp, 0x15, 0x0293);
-        rtl8168_mdio_write(tp, 0x19, 0xb619);
-        rtl8168_mdio_write(tp, 0x15, 0x0294);
-        rtl8168_mdio_write(tp, 0x19, 0x80d9);
-        rtl8168_mdio_write(tp, 0x15, 0x0295);
-        rtl8168_mdio_write(tp, 0x19, 0xbd06);
-        rtl8168_mdio_write(tp, 0x15, 0x0296);
-        rtl8168_mdio_write(tp, 0x19, 0xbb0d);
-        rtl8168_mdio_write(tp, 0x15, 0x0297);
-        rtl8168_mdio_write(tp, 0x19, 0xaf14);
-        rtl8168_mdio_write(tp, 0x15, 0x0298);
-        rtl8168_mdio_write(tp, 0x19, 0x8efa);
-        rtl8168_mdio_write(tp, 0x15, 0x0299);
-        rtl8168_mdio_write(tp, 0x19, 0x5049);
-        rtl8168_mdio_write(tp, 0x15, 0x029a);
-        rtl8168_mdio_write(tp, 0x19, 0x3248);
-        rtl8168_mdio_write(tp, 0x15, 0x029b);
-        rtl8168_mdio_write(tp, 0x19, 0x4c10);
-        rtl8168_mdio_write(tp, 0x15, 0x029c);
-        rtl8168_mdio_write(tp, 0x19, 0x44b0);
-        rtl8168_mdio_write(tp, 0x15, 0x029d);
-        rtl8168_mdio_write(tp, 0x19, 0x4c00);
-        rtl8168_mdio_write(tp, 0x15, 0x029e);
-        rtl8168_mdio_write(tp, 0x19, 0x3292);
-        rtl8168_mdio_write(tp, 0x15, 0x029f);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02a0);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02a1);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02a2);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02a3);
-        rtl8168_mdio_write(tp, 0x19, 0x481f);
-        rtl8168_mdio_write(tp, 0x15, 0x02a4);
-        rtl8168_mdio_write(tp, 0x19, 0x5005);
-        rtl8168_mdio_write(tp, 0x15, 0x02a5);
-        rtl8168_mdio_write(tp, 0x19, 0x480f);
-        rtl8168_mdio_write(tp, 0x15, 0x02a6);
-        rtl8168_mdio_write(tp, 0x19, 0xac00);
-        rtl8168_mdio_write(tp, 0x15, 0x02a7);
-        rtl8168_mdio_write(tp, 0x19, 0x31a6);
-        rtl8168_mdio_write(tp, 0x15, 0x02a8);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02a9);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02aa);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02ab);
-        rtl8168_mdio_write(tp, 0x19, 0x31ba);
-        rtl8168_mdio_write(tp, 0x15, 0x02ac);
-        rtl8168_mdio_write(tp, 0x19, 0x31d5);
-        rtl8168_mdio_write(tp, 0x15, 0x02ad);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02ae);
-        rtl8168_mdio_write(tp, 0x19, 0x5cf0);
-        rtl8168_mdio_write(tp, 0x15, 0x02af);
-        rtl8168_mdio_write(tp, 0x19, 0x588c);
-        rtl8168_mdio_write(tp, 0x15, 0x02b0);
-        rtl8168_mdio_write(tp, 0x19, 0x542f);
-        rtl8168_mdio_write(tp, 0x15, 0x02b1);
-        rtl8168_mdio_write(tp, 0x19, 0x7ffb);
-        rtl8168_mdio_write(tp, 0x15, 0x02b2);
-        rtl8168_mdio_write(tp, 0x19, 0x6ff8);
-        rtl8168_mdio_write(tp, 0x15, 0x02b3);
-        rtl8168_mdio_write(tp, 0x19, 0x64a4);
-        rtl8168_mdio_write(tp, 0x15, 0x02b4);
-        rtl8168_mdio_write(tp, 0x19, 0x64a0);
-        rtl8168_mdio_write(tp, 0x15, 0x02b5);
-        rtl8168_mdio_write(tp, 0x19, 0x6800);
-        rtl8168_mdio_write(tp, 0x15, 0x02b6);
-        rtl8168_mdio_write(tp, 0x19, 0x4400);
-        rtl8168_mdio_write(tp, 0x15, 0x02b7);
-        rtl8168_mdio_write(tp, 0x19, 0x4020);
-        rtl8168_mdio_write(tp, 0x15, 0x02b8);
-        rtl8168_mdio_write(tp, 0x19, 0x4480);
-        rtl8168_mdio_write(tp, 0x15, 0x02b9);
-        rtl8168_mdio_write(tp, 0x19, 0x9e00);
-        rtl8168_mdio_write(tp, 0x15, 0x02ba);
-        rtl8168_mdio_write(tp, 0x19, 0x4891);
-        rtl8168_mdio_write(tp, 0x15, 0x02bb);
-        rtl8168_mdio_write(tp, 0x19, 0x4cc0);
-        rtl8168_mdio_write(tp, 0x15, 0x02bc);
-        rtl8168_mdio_write(tp, 0x19, 0x4801);
-        rtl8168_mdio_write(tp, 0x15, 0x02bd);
-        rtl8168_mdio_write(tp, 0x19, 0xa609);
-        rtl8168_mdio_write(tp, 0x15, 0x02be);
-        rtl8168_mdio_write(tp, 0x19, 0xd64f);
-        rtl8168_mdio_write(tp, 0x15, 0x02bf);
-        rtl8168_mdio_write(tp, 0x19, 0x004e);
-        rtl8168_mdio_write(tp, 0x15, 0x02c0);
-        rtl8168_mdio_write(tp, 0x19, 0x87fe);
-        rtl8168_mdio_write(tp, 0x15, 0x02c1);
-        rtl8168_mdio_write(tp, 0x19, 0x32c6);
-        rtl8168_mdio_write(tp, 0x15, 0x02c2);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02c3);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02c4);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02c5);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02c6);
-        rtl8168_mdio_write(tp, 0x19, 0x48b2);
-        rtl8168_mdio_write(tp, 0x15, 0x02c7);
-        rtl8168_mdio_write(tp, 0x19, 0x4020);
-        rtl8168_mdio_write(tp, 0x15, 0x02c8);
-        rtl8168_mdio_write(tp, 0x19, 0x4822);
-        rtl8168_mdio_write(tp, 0x15, 0x02c9);
-        rtl8168_mdio_write(tp, 0x19, 0x4488);
-        rtl8168_mdio_write(tp, 0x15, 0x02ca);
-        rtl8168_mdio_write(tp, 0x19, 0xd64f);
-        rtl8168_mdio_write(tp, 0x15, 0x02cb);
-        rtl8168_mdio_write(tp, 0x19, 0x0042);
-        rtl8168_mdio_write(tp, 0x15, 0x02cc);
-        rtl8168_mdio_write(tp, 0x19, 0x8203);
-        rtl8168_mdio_write(tp, 0x15, 0x02cd);
-        rtl8168_mdio_write(tp, 0x19, 0x4cc8);
-        rtl8168_mdio_write(tp, 0x15, 0x02ce);
-        rtl8168_mdio_write(tp, 0x19, 0x32d0);
-        rtl8168_mdio_write(tp, 0x15, 0x02cf);
-        rtl8168_mdio_write(tp, 0x19, 0x4cc0);
-        rtl8168_mdio_write(tp, 0x15, 0x02d0);
-        rtl8168_mdio_write(tp, 0x19, 0xc4d4);
-        rtl8168_mdio_write(tp, 0x15, 0x02d1);
-        rtl8168_mdio_write(tp, 0x19, 0x00f9);
-        rtl8168_mdio_write(tp, 0x15, 0x02d2);
-        rtl8168_mdio_write(tp, 0x19, 0xa51a);
-        rtl8168_mdio_write(tp, 0x15, 0x02d3);
-        rtl8168_mdio_write(tp, 0x19, 0x32d9);
-        rtl8168_mdio_write(tp, 0x15, 0x02d4);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02d5);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02d6);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02d7);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02d8);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02d9);
-        rtl8168_mdio_write(tp, 0x19, 0x48b3);
-        rtl8168_mdio_write(tp, 0x15, 0x02da);
-        rtl8168_mdio_write(tp, 0x19, 0x4020);
-        rtl8168_mdio_write(tp, 0x15, 0x02db);
-        rtl8168_mdio_write(tp, 0x19, 0x4823);
-        rtl8168_mdio_write(tp, 0x15, 0x02dc);
-        rtl8168_mdio_write(tp, 0x19, 0x4410);
-        rtl8168_mdio_write(tp, 0x15, 0x02dd);
-        rtl8168_mdio_write(tp, 0x19, 0xb630);
-        rtl8168_mdio_write(tp, 0x15, 0x02de);
-        rtl8168_mdio_write(tp, 0x19, 0x7dc8);
-        rtl8168_mdio_write(tp, 0x15, 0x02df);
-        rtl8168_mdio_write(tp, 0x19, 0x8203);
-        rtl8168_mdio_write(tp, 0x15, 0x02e0);
-        rtl8168_mdio_write(tp, 0x19, 0x4c48);
-        rtl8168_mdio_write(tp, 0x15, 0x02e1);
-        rtl8168_mdio_write(tp, 0x19, 0x32e3);
-        rtl8168_mdio_write(tp, 0x15, 0x02e2);
-        rtl8168_mdio_write(tp, 0x19, 0x4c40);
-        rtl8168_mdio_write(tp, 0x15, 0x02e3);
-        rtl8168_mdio_write(tp, 0x19, 0x9bfa);
-        rtl8168_mdio_write(tp, 0x15, 0x02e4);
-        rtl8168_mdio_write(tp, 0x19, 0x84ca);
-        rtl8168_mdio_write(tp, 0x15, 0x02e5);
-        rtl8168_mdio_write(tp, 0x19, 0x85f8);
-        rtl8168_mdio_write(tp, 0x15, 0x02e6);
-        rtl8168_mdio_write(tp, 0x19, 0x32ec);
-        rtl8168_mdio_write(tp, 0x15, 0x02e7);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02e8);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02e9);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02ea);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02eb);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x02ec);
-        rtl8168_mdio_write(tp, 0x19, 0x48d4);
-        rtl8168_mdio_write(tp, 0x15, 0x02ed);
-        rtl8168_mdio_write(tp, 0x19, 0x4020);
-        rtl8168_mdio_write(tp, 0x15, 0x02ee);
-        rtl8168_mdio_write(tp, 0x19, 0x4844);
-        rtl8168_mdio_write(tp, 0x15, 0x02ef);
-        rtl8168_mdio_write(tp, 0x19, 0x4420);
-        rtl8168_mdio_write(tp, 0x15, 0x02f0);
-        rtl8168_mdio_write(tp, 0x19, 0x6800);
-        rtl8168_mdio_write(tp, 0x15, 0x02f1);
-        rtl8168_mdio_write(tp, 0x19, 0x7dc0);
-        rtl8168_mdio_write(tp, 0x15, 0x02f2);
-        rtl8168_mdio_write(tp, 0x19, 0x4c40);
-        rtl8168_mdio_write(tp, 0x15, 0x02f3);
-        rtl8168_mdio_write(tp, 0x19, 0x7c0b);
-        rtl8168_mdio_write(tp, 0x15, 0x02f4);
-        rtl8168_mdio_write(tp, 0x19, 0x6c08);
-        rtl8168_mdio_write(tp, 0x15, 0x02f5);
-        rtl8168_mdio_write(tp, 0x19, 0x3311);
-        rtl8168_mdio_write(tp, 0x15, 0x02f6);
-        rtl8168_mdio_write(tp, 0x19, 0x9cfd);
-        rtl8168_mdio_write(tp, 0x15, 0x02f7);
-        rtl8168_mdio_write(tp, 0x19, 0xb616);
-        rtl8168_mdio_write(tp, 0x15, 0x02f8);
-        rtl8168_mdio_write(tp, 0x19, 0xc42b);
-        rtl8168_mdio_write(tp, 0x15, 0x02f9);
-        rtl8168_mdio_write(tp, 0x19, 0x00e0);
-        rtl8168_mdio_write(tp, 0x15, 0x02fa);
-        rtl8168_mdio_write(tp, 0x19, 0xc455);
-        rtl8168_mdio_write(tp, 0x15, 0x02fb);
-        rtl8168_mdio_write(tp, 0x19, 0x00b3);
-        rtl8168_mdio_write(tp, 0x15, 0x02fc);
-        rtl8168_mdio_write(tp, 0x19, 0xb20a);
-        rtl8168_mdio_write(tp, 0x15, 0x02fd);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x02fe);
-        rtl8168_mdio_write(tp, 0x19, 0x6c02);
-        rtl8168_mdio_write(tp, 0x15, 0x02ff);
-        rtl8168_mdio_write(tp, 0x19, 0x8204);
-        rtl8168_mdio_write(tp, 0x15, 0x0300);
-        rtl8168_mdio_write(tp, 0x19, 0x7c04);
-        rtl8168_mdio_write(tp, 0x15, 0x0301);
-        rtl8168_mdio_write(tp, 0x19, 0x7404);
-        rtl8168_mdio_write(tp, 0x15, 0x0302);
-        rtl8168_mdio_write(tp, 0x19, 0x32f3);
-        rtl8168_mdio_write(tp, 0x15, 0x0303);
-        rtl8168_mdio_write(tp, 0x19, 0x7c04);
-        rtl8168_mdio_write(tp, 0x15, 0x0304);
-        rtl8168_mdio_write(tp, 0x19, 0x7400);
-        rtl8168_mdio_write(tp, 0x15, 0x0305);
-        rtl8168_mdio_write(tp, 0x19, 0x32f3);
-        rtl8168_mdio_write(tp, 0x15, 0x0306);
-        rtl8168_mdio_write(tp, 0x19, 0xefed);
-        rtl8168_mdio_write(tp, 0x15, 0x0307);
-        rtl8168_mdio_write(tp, 0x19, 0x3342);
-        rtl8168_mdio_write(tp, 0x15, 0x0308);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0309);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x030a);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x030b);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x030c);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x030d);
-        rtl8168_mdio_write(tp, 0x19, 0x3006);
-        rtl8168_mdio_write(tp, 0x15, 0x030e);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x030f);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0310);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0311);
-        rtl8168_mdio_write(tp, 0x19, 0x7c08);
-        rtl8168_mdio_write(tp, 0x15, 0x0312);
-        rtl8168_mdio_write(tp, 0x19, 0xa207);
-        rtl8168_mdio_write(tp, 0x15, 0x0313);
-        rtl8168_mdio_write(tp, 0x19, 0x4c00);
-        rtl8168_mdio_write(tp, 0x15, 0x0314);
-        rtl8168_mdio_write(tp, 0x19, 0x3322);
-        rtl8168_mdio_write(tp, 0x15, 0x0315);
-        rtl8168_mdio_write(tp, 0x19, 0x4041);
-        rtl8168_mdio_write(tp, 0x15, 0x0316);
-        rtl8168_mdio_write(tp, 0x19, 0x7d07);
-        rtl8168_mdio_write(tp, 0x15, 0x0317);
-        rtl8168_mdio_write(tp, 0x19, 0x4502);
-        rtl8168_mdio_write(tp, 0x15, 0x0318);
-        rtl8168_mdio_write(tp, 0x19, 0x3322);
-        rtl8168_mdio_write(tp, 0x15, 0x0319);
-        rtl8168_mdio_write(tp, 0x19, 0x4c08);
-        rtl8168_mdio_write(tp, 0x15, 0x031a);
-        rtl8168_mdio_write(tp, 0x19, 0x3322);
-        rtl8168_mdio_write(tp, 0x15, 0x031b);
-        rtl8168_mdio_write(tp, 0x19, 0x7d80);
-        rtl8168_mdio_write(tp, 0x15, 0x031c);
-        rtl8168_mdio_write(tp, 0x19, 0x5180);
-        rtl8168_mdio_write(tp, 0x15, 0x031d);
-        rtl8168_mdio_write(tp, 0x19, 0x3320);
-        rtl8168_mdio_write(tp, 0x15, 0x031e);
-        rtl8168_mdio_write(tp, 0x19, 0x7d80);
-        rtl8168_mdio_write(tp, 0x15, 0x031f);
-        rtl8168_mdio_write(tp, 0x19, 0x5000);
-        rtl8168_mdio_write(tp, 0x15, 0x0320);
-        rtl8168_mdio_write(tp, 0x19, 0x7d07);
-        rtl8168_mdio_write(tp, 0x15, 0x0321);
-        rtl8168_mdio_write(tp, 0x19, 0x4402);
-        rtl8168_mdio_write(tp, 0x15, 0x0322);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x0323);
-        rtl8168_mdio_write(tp, 0x19, 0x6c02);
-        rtl8168_mdio_write(tp, 0x15, 0x0324);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x0325);
-        rtl8168_mdio_write(tp, 0x19, 0xb30c);
-        rtl8168_mdio_write(tp, 0x15, 0x0326);
-        rtl8168_mdio_write(tp, 0x19, 0xb206);
-        rtl8168_mdio_write(tp, 0x15, 0x0327);
-        rtl8168_mdio_write(tp, 0x19, 0xb103);
-        rtl8168_mdio_write(tp, 0x15, 0x0328);
-        rtl8168_mdio_write(tp, 0x19, 0x6c00);
-        rtl8168_mdio_write(tp, 0x15, 0x0329);
-        rtl8168_mdio_write(tp, 0x19, 0x32f6);
-        rtl8168_mdio_write(tp, 0x15, 0x032a);
-        rtl8168_mdio_write(tp, 0x19, 0x6c00);
-        rtl8168_mdio_write(tp, 0x15, 0x032b);
-        rtl8168_mdio_write(tp, 0x19, 0x3352);
-        rtl8168_mdio_write(tp, 0x15, 0x032c);
-        rtl8168_mdio_write(tp, 0x19, 0xb103);
-        rtl8168_mdio_write(tp, 0x15, 0x032d);
-        rtl8168_mdio_write(tp, 0x19, 0x6c00);
-        rtl8168_mdio_write(tp, 0x15, 0x032e);
-        rtl8168_mdio_write(tp, 0x19, 0x336a);
-        rtl8168_mdio_write(tp, 0x15, 0x032f);
-        rtl8168_mdio_write(tp, 0x19, 0x6c00);
-        rtl8168_mdio_write(tp, 0x15, 0x0330);
-        rtl8168_mdio_write(tp, 0x19, 0x3382);
-        rtl8168_mdio_write(tp, 0x15, 0x0331);
-        rtl8168_mdio_write(tp, 0x19, 0xb206);
-        rtl8168_mdio_write(tp, 0x15, 0x0332);
-        rtl8168_mdio_write(tp, 0x19, 0xb103);
-        rtl8168_mdio_write(tp, 0x15, 0x0333);
-        rtl8168_mdio_write(tp, 0x19, 0x6c00);
-        rtl8168_mdio_write(tp, 0x15, 0x0334);
-        rtl8168_mdio_write(tp, 0x19, 0x3395);
-        rtl8168_mdio_write(tp, 0x15, 0x0335);
-        rtl8168_mdio_write(tp, 0x19, 0x6c00);
-        rtl8168_mdio_write(tp, 0x15, 0x0336);
-        rtl8168_mdio_write(tp, 0x19, 0x33c6);
-        rtl8168_mdio_write(tp, 0x15, 0x0337);
-        rtl8168_mdio_write(tp, 0x19, 0xb103);
-        rtl8168_mdio_write(tp, 0x15, 0x0338);
-        rtl8168_mdio_write(tp, 0x19, 0x6c00);
-        rtl8168_mdio_write(tp, 0x15, 0x0339);
-        rtl8168_mdio_write(tp, 0x19, 0x33d7);
-        rtl8168_mdio_write(tp, 0x15, 0x033a);
-        rtl8168_mdio_write(tp, 0x19, 0x6c00);
-        rtl8168_mdio_write(tp, 0x15, 0x033b);
-        rtl8168_mdio_write(tp, 0x19, 0x33f2);
-        rtl8168_mdio_write(tp, 0x15, 0x033c);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x033d);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x033e);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x033f);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0340);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0341);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0342);
-        rtl8168_mdio_write(tp, 0x19, 0x49b5);
-        rtl8168_mdio_write(tp, 0x15, 0x0343);
-        rtl8168_mdio_write(tp, 0x19, 0x7d00);
-        rtl8168_mdio_write(tp, 0x15, 0x0344);
-        rtl8168_mdio_write(tp, 0x19, 0x4d00);
-        rtl8168_mdio_write(tp, 0x15, 0x0345);
-        rtl8168_mdio_write(tp, 0x19, 0x6880);
-        rtl8168_mdio_write(tp, 0x15, 0x0346);
-        rtl8168_mdio_write(tp, 0x19, 0x7c08);
-        rtl8168_mdio_write(tp, 0x15, 0x0347);
-        rtl8168_mdio_write(tp, 0x19, 0x6c08);
-        rtl8168_mdio_write(tp, 0x15, 0x0348);
-        rtl8168_mdio_write(tp, 0x19, 0x4925);
-        rtl8168_mdio_write(tp, 0x15, 0x0349);
-        rtl8168_mdio_write(tp, 0x19, 0x403b);
-        rtl8168_mdio_write(tp, 0x15, 0x034a);
-        rtl8168_mdio_write(tp, 0x19, 0xa602);
-        rtl8168_mdio_write(tp, 0x15, 0x034b);
-        rtl8168_mdio_write(tp, 0x19, 0x402f);
-        rtl8168_mdio_write(tp, 0x15, 0x034c);
-        rtl8168_mdio_write(tp, 0x19, 0x4484);
-        rtl8168_mdio_write(tp, 0x15, 0x034d);
-        rtl8168_mdio_write(tp, 0x19, 0x40c8);
-        rtl8168_mdio_write(tp, 0x15, 0x034e);
-        rtl8168_mdio_write(tp, 0x19, 0x44c4);
-        rtl8168_mdio_write(tp, 0x15, 0x034f);
-        rtl8168_mdio_write(tp, 0x19, 0xd64f);
-        rtl8168_mdio_write(tp, 0x15, 0x0350);
-        rtl8168_mdio_write(tp, 0x19, 0x00bd);
-        rtl8168_mdio_write(tp, 0x15, 0x0351);
-        rtl8168_mdio_write(tp, 0x19, 0x3311);
-        rtl8168_mdio_write(tp, 0x15, 0x0352);
-        rtl8168_mdio_write(tp, 0x19, 0xc8ed);
-        rtl8168_mdio_write(tp, 0x15, 0x0353);
-        rtl8168_mdio_write(tp, 0x19, 0x00fc);
-        rtl8168_mdio_write(tp, 0x15, 0x0354);
-        rtl8168_mdio_write(tp, 0x19, 0x8221);
-        rtl8168_mdio_write(tp, 0x15, 0x0355);
-        rtl8168_mdio_write(tp, 0x19, 0xd11d);
-        rtl8168_mdio_write(tp, 0x15, 0x0356);
-        rtl8168_mdio_write(tp, 0x19, 0x001f);
-        rtl8168_mdio_write(tp, 0x15, 0x0357);
-        rtl8168_mdio_write(tp, 0x19, 0xde18);
-        rtl8168_mdio_write(tp, 0x15, 0x0358);
-        rtl8168_mdio_write(tp, 0x19, 0x0008);
-        rtl8168_mdio_write(tp, 0x15, 0x0359);
-        rtl8168_mdio_write(tp, 0x19, 0x91f6);
-        rtl8168_mdio_write(tp, 0x15, 0x035a);
-        rtl8168_mdio_write(tp, 0x19, 0x3360);
-        rtl8168_mdio_write(tp, 0x15, 0x035b);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x035c);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x035d);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x035e);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x035f);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0360);
-        rtl8168_mdio_write(tp, 0x19, 0x4bb6);
-        rtl8168_mdio_write(tp, 0x15, 0x0361);
-        rtl8168_mdio_write(tp, 0x19, 0x4064);
-        rtl8168_mdio_write(tp, 0x15, 0x0362);
-        rtl8168_mdio_write(tp, 0x19, 0x4b26);
-        rtl8168_mdio_write(tp, 0x15, 0x0363);
-        rtl8168_mdio_write(tp, 0x19, 0x4410);
-        rtl8168_mdio_write(tp, 0x15, 0x0364);
-        rtl8168_mdio_write(tp, 0x19, 0x4006);
-        rtl8168_mdio_write(tp, 0x15, 0x0365);
-        rtl8168_mdio_write(tp, 0x19, 0x4490);
-        rtl8168_mdio_write(tp, 0x15, 0x0366);
-        rtl8168_mdio_write(tp, 0x19, 0x6900);
-        rtl8168_mdio_write(tp, 0x15, 0x0367);
-        rtl8168_mdio_write(tp, 0x19, 0xb6a6);
-        rtl8168_mdio_write(tp, 0x15, 0x0368);
-        rtl8168_mdio_write(tp, 0x19, 0x9e02);
-        rtl8168_mdio_write(tp, 0x15, 0x0369);
-        rtl8168_mdio_write(tp, 0x19, 0x3311);
-        rtl8168_mdio_write(tp, 0x15, 0x036a);
-        rtl8168_mdio_write(tp, 0x19, 0xd11d);
-        rtl8168_mdio_write(tp, 0x15, 0x036b);
-        rtl8168_mdio_write(tp, 0x19, 0x000a);
-        rtl8168_mdio_write(tp, 0x15, 0x036c);
-        rtl8168_mdio_write(tp, 0x19, 0xbb0f);
-        rtl8168_mdio_write(tp, 0x15, 0x036d);
-        rtl8168_mdio_write(tp, 0x19, 0x8102);
-        rtl8168_mdio_write(tp, 0x15, 0x036e);
-        rtl8168_mdio_write(tp, 0x19, 0x3371);
-        rtl8168_mdio_write(tp, 0x15, 0x036f);
-        rtl8168_mdio_write(tp, 0x19, 0xa21e);
-        rtl8168_mdio_write(tp, 0x15, 0x0370);
-        rtl8168_mdio_write(tp, 0x19, 0x33b6);
-        rtl8168_mdio_write(tp, 0x15, 0x0371);
-        rtl8168_mdio_write(tp, 0x19, 0x91f6);
-        rtl8168_mdio_write(tp, 0x15, 0x0372);
-        rtl8168_mdio_write(tp, 0x19, 0xc218);
-        rtl8168_mdio_write(tp, 0x15, 0x0373);
-        rtl8168_mdio_write(tp, 0x19, 0x00f4);
-        rtl8168_mdio_write(tp, 0x15, 0x0374);
-        rtl8168_mdio_write(tp, 0x19, 0x33b6);
-        rtl8168_mdio_write(tp, 0x15, 0x0375);
-        rtl8168_mdio_write(tp, 0x19, 0x32ec);
-        rtl8168_mdio_write(tp, 0x15, 0x0376);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0377);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0378);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x0379);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x037a);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x037b);
-        rtl8168_mdio_write(tp, 0x19, 0x4b97);
-        rtl8168_mdio_write(tp, 0x15, 0x037c);
-        rtl8168_mdio_write(tp, 0x19, 0x402b);
-        rtl8168_mdio_write(tp, 0x15, 0x037d);
-        rtl8168_mdio_write(tp, 0x19, 0x4b07);
-        rtl8168_mdio_write(tp, 0x15, 0x037e);
-        rtl8168_mdio_write(tp, 0x19, 0x4422);
-        rtl8168_mdio_write(tp, 0x15, 0x037f);
-        rtl8168_mdio_write(tp, 0x19, 0x6980);
-        rtl8168_mdio_write(tp, 0x15, 0x0380);
-        rtl8168_mdio_write(tp, 0x19, 0xb608);
-        rtl8168_mdio_write(tp, 0x15, 0x0381);
-        rtl8168_mdio_write(tp, 0x19, 0x3311);
-        rtl8168_mdio_write(tp, 0x15, 0x0382);
-        rtl8168_mdio_write(tp, 0x19, 0xbc05);
-        rtl8168_mdio_write(tp, 0x15, 0x0383);
-        rtl8168_mdio_write(tp, 0x19, 0xc21c);
-        rtl8168_mdio_write(tp, 0x15, 0x0384);
-        rtl8168_mdio_write(tp, 0x19, 0x0032);
-        rtl8168_mdio_write(tp, 0x15, 0x0385);
-        rtl8168_mdio_write(tp, 0x19, 0xa1fb);
-        rtl8168_mdio_write(tp, 0x15, 0x0386);
-        rtl8168_mdio_write(tp, 0x19, 0x338d);
-        rtl8168_mdio_write(tp, 0x15, 0x0387);
-        rtl8168_mdio_write(tp, 0x19, 0x32ae);
-        rtl8168_mdio_write(tp, 0x15, 0x0388);
-        rtl8168_mdio_write(tp, 0x19, 0x330d);
-        rtl8168_mdio_write(tp, 0x15, 0x0389);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x038a);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x038b);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x038c);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x038d);
-        rtl8168_mdio_write(tp, 0x19, 0x4b97);
-        rtl8168_mdio_write(tp, 0x15, 0x038e);
-        rtl8168_mdio_write(tp, 0x19, 0x6a08);
-        rtl8168_mdio_write(tp, 0x15, 0x038f);
-        rtl8168_mdio_write(tp, 0x19, 0x4b07);
-        rtl8168_mdio_write(tp, 0x15, 0x0390);
-        rtl8168_mdio_write(tp, 0x19, 0x40ac);
-        rtl8168_mdio_write(tp, 0x15, 0x0391);
-        rtl8168_mdio_write(tp, 0x19, 0x4445);
-        rtl8168_mdio_write(tp, 0x15, 0x0392);
-        rtl8168_mdio_write(tp, 0x19, 0x404e);
-        rtl8168_mdio_write(tp, 0x15, 0x0393);
-        rtl8168_mdio_write(tp, 0x19, 0x4461);
-        rtl8168_mdio_write(tp, 0x15, 0x0394);
-        rtl8168_mdio_write(tp, 0x19, 0x3311);
-        rtl8168_mdio_write(tp, 0x15, 0x0395);
-        rtl8168_mdio_write(tp, 0x19, 0x9c0a);
-        rtl8168_mdio_write(tp, 0x15, 0x0396);
-        rtl8168_mdio_write(tp, 0x19, 0x63da);
-        rtl8168_mdio_write(tp, 0x15, 0x0397);
-        rtl8168_mdio_write(tp, 0x19, 0x6f0c);
-        rtl8168_mdio_write(tp, 0x15, 0x0398);
-        rtl8168_mdio_write(tp, 0x19, 0x5440);
-        rtl8168_mdio_write(tp, 0x15, 0x0399);
-        rtl8168_mdio_write(tp, 0x19, 0x4b98);
-        rtl8168_mdio_write(tp, 0x15, 0x039a);
-        rtl8168_mdio_write(tp, 0x19, 0x7c40);
-        rtl8168_mdio_write(tp, 0x15, 0x039b);
-        rtl8168_mdio_write(tp, 0x19, 0x4c00);
-        rtl8168_mdio_write(tp, 0x15, 0x039c);
-        rtl8168_mdio_write(tp, 0x19, 0x4b08);
-        rtl8168_mdio_write(tp, 0x15, 0x039d);
-        rtl8168_mdio_write(tp, 0x19, 0x63d8);
-        rtl8168_mdio_write(tp, 0x15, 0x039e);
-        rtl8168_mdio_write(tp, 0x19, 0x33a5);
-        rtl8168_mdio_write(tp, 0x15, 0x039f);
-        rtl8168_mdio_write(tp, 0x19, 0xd64f);
-        rtl8168_mdio_write(tp, 0x15, 0x03a0);
-        rtl8168_mdio_write(tp, 0x19, 0x00e8);
-        rtl8168_mdio_write(tp, 0x15, 0x03a1);
-        rtl8168_mdio_write(tp, 0x19, 0x820e);
-        rtl8168_mdio_write(tp, 0x15, 0x03a2);
-        rtl8168_mdio_write(tp, 0x19, 0xa10d);
-        rtl8168_mdio_write(tp, 0x15, 0x03a3);
-        rtl8168_mdio_write(tp, 0x19, 0x9df1);
-        rtl8168_mdio_write(tp, 0x15, 0x03a4);
-        rtl8168_mdio_write(tp, 0x19, 0x33af);
-        rtl8168_mdio_write(tp, 0x15, 0x03a5);
-        rtl8168_mdio_write(tp, 0x19, 0xd64f);
-        rtl8168_mdio_write(tp, 0x15, 0x03a6);
-        rtl8168_mdio_write(tp, 0x19, 0x00f9);
-        rtl8168_mdio_write(tp, 0x15, 0x03a7);
-        rtl8168_mdio_write(tp, 0x19, 0xc017);
-        rtl8168_mdio_write(tp, 0x15, 0x03a8);
-        rtl8168_mdio_write(tp, 0x19, 0x0007);
-        rtl8168_mdio_write(tp, 0x15, 0x03a9);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x03aa);
-        rtl8168_mdio_write(tp, 0x19, 0x6c03);
-        rtl8168_mdio_write(tp, 0x15, 0x03ab);
-        rtl8168_mdio_write(tp, 0x19, 0xa104);
-        rtl8168_mdio_write(tp, 0x15, 0x03ac);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x03ad);
-        rtl8168_mdio_write(tp, 0x19, 0x6c00);
-        rtl8168_mdio_write(tp, 0x15, 0x03ae);
-        rtl8168_mdio_write(tp, 0x19, 0x9df7);
-        rtl8168_mdio_write(tp, 0x15, 0x03af);
-        rtl8168_mdio_write(tp, 0x19, 0x7c03);
-        rtl8168_mdio_write(tp, 0x15, 0x03b0);
-        rtl8168_mdio_write(tp, 0x19, 0x6c08);
-        rtl8168_mdio_write(tp, 0x15, 0x03b1);
-        rtl8168_mdio_write(tp, 0x19, 0x33b6);
-        rtl8168_mdio_write(tp, 0x15, 0x03b2);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x03b3);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x03b4);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x03b5);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x03b6);
-        rtl8168_mdio_write(tp, 0x19, 0x55af);
-        rtl8168_mdio_write(tp, 0x15, 0x03b7);
-        rtl8168_mdio_write(tp, 0x19, 0x7ff0);
-        rtl8168_mdio_write(tp, 0x15, 0x03b8);
-        rtl8168_mdio_write(tp, 0x19, 0x6ff0);
-        rtl8168_mdio_write(tp, 0x15, 0x03b9);
-        rtl8168_mdio_write(tp, 0x19, 0x4bb9);
-        rtl8168_mdio_write(tp, 0x15, 0x03ba);
-        rtl8168_mdio_write(tp, 0x19, 0x6a80);
-        rtl8168_mdio_write(tp, 0x15, 0x03bb);
-        rtl8168_mdio_write(tp, 0x19, 0x4b29);
-        rtl8168_mdio_write(tp, 0x15, 0x03bc);
-        rtl8168_mdio_write(tp, 0x19, 0x4041);
-        rtl8168_mdio_write(tp, 0x15, 0x03bd);
-        rtl8168_mdio_write(tp, 0x19, 0x440a);
-        rtl8168_mdio_write(tp, 0x15, 0x03be);
-        rtl8168_mdio_write(tp, 0x19, 0x4029);
-        rtl8168_mdio_write(tp, 0x15, 0x03bf);
-        rtl8168_mdio_write(tp, 0x19, 0x4418);
-        rtl8168_mdio_write(tp, 0x15, 0x03c0);
-        rtl8168_mdio_write(tp, 0x19, 0x4090);
-        rtl8168_mdio_write(tp, 0x15, 0x03c1);
-        rtl8168_mdio_write(tp, 0x19, 0x4438);
-        rtl8168_mdio_write(tp, 0x15, 0x03c2);
-        rtl8168_mdio_write(tp, 0x19, 0x40c4);
-        rtl8168_mdio_write(tp, 0x15, 0x03c3);
-        rtl8168_mdio_write(tp, 0x19, 0x447b);
-        rtl8168_mdio_write(tp, 0x15, 0x03c4);
-        rtl8168_mdio_write(tp, 0x19, 0xb6c4);
-        rtl8168_mdio_write(tp, 0x15, 0x03c5);
-        rtl8168_mdio_write(tp, 0x19, 0x3311);
-        rtl8168_mdio_write(tp, 0x15, 0x03c6);
-        rtl8168_mdio_write(tp, 0x19, 0x9bfe);
-        rtl8168_mdio_write(tp, 0x15, 0x03c7);
-        rtl8168_mdio_write(tp, 0x19, 0x33cc);
-        rtl8168_mdio_write(tp, 0x15, 0x03c8);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x03c9);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x03ca);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x03cb);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x03cc);
-        rtl8168_mdio_write(tp, 0x19, 0x542f);
-        rtl8168_mdio_write(tp, 0x15, 0x03cd);
-        rtl8168_mdio_write(tp, 0x19, 0x499a);
-        rtl8168_mdio_write(tp, 0x15, 0x03ce);
-        rtl8168_mdio_write(tp, 0x19, 0x7c40);
-        rtl8168_mdio_write(tp, 0x15, 0x03cf);
-        rtl8168_mdio_write(tp, 0x19, 0x4c40);
-        rtl8168_mdio_write(tp, 0x15, 0x03d0);
-        rtl8168_mdio_write(tp, 0x19, 0x490a);
-        rtl8168_mdio_write(tp, 0x15, 0x03d1);
-        rtl8168_mdio_write(tp, 0x19, 0x405e);
-        rtl8168_mdio_write(tp, 0x15, 0x03d2);
-        rtl8168_mdio_write(tp, 0x19, 0x44f8);
-        rtl8168_mdio_write(tp, 0x15, 0x03d3);
-        rtl8168_mdio_write(tp, 0x19, 0x6b00);
-        rtl8168_mdio_write(tp, 0x15, 0x03d4);
-        rtl8168_mdio_write(tp, 0x19, 0xd64f);
-        rtl8168_mdio_write(tp, 0x15, 0x03d5);
-        rtl8168_mdio_write(tp, 0x19, 0x0028);
-        rtl8168_mdio_write(tp, 0x15, 0x03d6);
-        rtl8168_mdio_write(tp, 0x19, 0x3311);
-        rtl8168_mdio_write(tp, 0x15, 0x03d7);
-        rtl8168_mdio_write(tp, 0x19, 0xbd27);
-        rtl8168_mdio_write(tp, 0x15, 0x03d8);
-        rtl8168_mdio_write(tp, 0x19, 0x9cfc);
-        rtl8168_mdio_write(tp, 0x15, 0x03d9);
-        rtl8168_mdio_write(tp, 0x19, 0xc639);
-        rtl8168_mdio_write(tp, 0x15, 0x03da);
-        rtl8168_mdio_write(tp, 0x19, 0x000f);
-        rtl8168_mdio_write(tp, 0x15, 0x03db);
-        rtl8168_mdio_write(tp, 0x19, 0x9e03);
-        rtl8168_mdio_write(tp, 0x15, 0x03dc);
-        rtl8168_mdio_write(tp, 0x19, 0x7c01);
-        rtl8168_mdio_write(tp, 0x15, 0x03dd);
-        rtl8168_mdio_write(tp, 0x19, 0x4c01);
-        rtl8168_mdio_write(tp, 0x15, 0x03de);
-        rtl8168_mdio_write(tp, 0x19, 0x9af6);
-        rtl8168_mdio_write(tp, 0x15, 0x03df);
-        rtl8168_mdio_write(tp, 0x19, 0x7c12);
-        rtl8168_mdio_write(tp, 0x15, 0x03e0);
-        rtl8168_mdio_write(tp, 0x19, 0x4c52);
-        rtl8168_mdio_write(tp, 0x15, 0x03e1);
-        rtl8168_mdio_write(tp, 0x19, 0x4470);
-        rtl8168_mdio_write(tp, 0x15, 0x03e2);
-        rtl8168_mdio_write(tp, 0x19, 0x7c12);
-        rtl8168_mdio_write(tp, 0x15, 0x03e3);
-        rtl8168_mdio_write(tp, 0x19, 0x4c40);
-        rtl8168_mdio_write(tp, 0x15, 0x03e4);
-        rtl8168_mdio_write(tp, 0x19, 0x33d4);
-        rtl8168_mdio_write(tp, 0x15, 0x03e5);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x03e6);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x03e7);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x03e8);
-        rtl8168_mdio_write(tp, 0x19, 0x0000);
-        rtl8168_mdio_write(tp, 0x15, 0x03e9);
-        rtl8168_mdio_write(tp, 0x19, 0x49bb);
-        rtl8168_mdio_write(tp, 0x15, 0x03ea);
-        rtl8168_mdio_write(tp, 0x19, 0x4478);
-        rtl8168_mdio_write(tp, 0x15, 0x03eb);
-        rtl8168_mdio_write(tp, 0x19, 0x492b);
-        rtl8168_mdio_write(tp, 0x15, 0x03ec);
-        rtl8168_mdio_write(tp, 0x19, 0x6b80);
-        rtl8168_mdio_write(tp, 0x15, 0x03ed);
-        rtl8168_mdio_write(tp, 0x19, 0x7c01);
-        rtl8168_mdio_write(tp, 0x15, 0x03ee);
-        rtl8168_mdio_write(tp, 0x19, 0x4c00);
-        rtl8168_mdio_write(tp, 0x15, 0x03ef);
-        rtl8168_mdio_write(tp, 0x19, 0xd64f);
-        rtl8168_mdio_write(tp, 0x15, 0x03f0);
-        rtl8168_mdio_write(tp, 0x19, 0x000d);
-        rtl8168_mdio_write(tp, 0x15, 0x03f1);
-        rtl8168_mdio_write(tp, 0x19, 0x3311);
-        rtl8168_mdio_write(tp, 0x15, 0x03f2);
-        rtl8168_mdio_write(tp, 0x19, 0xbd0c);
-        rtl8168_mdio_write(tp, 0x15, 0x03f3);
-        rtl8168_mdio_write(tp, 0x19, 0xc428);
-        rtl8168_mdio_write(tp, 0x15, 0x03f4);
-        rtl8168_mdio_write(tp, 0x19, 0x0008);
-        rtl8168_mdio_write(tp, 0x15, 0x03f5);
-        rtl8168_mdio_write(tp, 0x19, 0x9afa);
-        rtl8168_mdio_write(tp, 0x15, 0x03f6);
-        rtl8168_mdio_write(tp, 0x19, 0x7c12);
-        rtl8168_mdio_write(tp, 0x15, 0x03f7);
-        rtl8168_mdio_write(tp, 0x19, 0x4c52);
-        rtl8168_mdio_write(tp, 0x15, 0x03f8);
-        rtl8168_mdio_write(tp, 0x19, 0x4470);
-        rtl8168_mdio_write(tp, 0x15, 0x03f9);
-        rtl8168_mdio_write(tp, 0x19, 0x7c12);
-        rtl8168_mdio_write(tp, 0x15, 0x03fa);
-        rtl8168_mdio_write(tp, 0x19, 0x4c40);
-        rtl8168_mdio_write(tp, 0x15, 0x03fb);
-        rtl8168_mdio_write(tp, 0x19, 0x33ef);
-        rtl8168_mdio_write(tp, 0x15, 0x03fc);
-        rtl8168_mdio_write(tp, 0x19, 0x3342);
-        rtl8168_mdio_write(tp, 0x15, 0x03fd);
-        rtl8168_mdio_write(tp, 0x19, 0x330d);
-        rtl8168_mdio_write(tp, 0x15, 0x03fe);
-        rtl8168_mdio_write(tp, 0x19, 0x32ae);
-        rtl8168_mdio_write(tp, 0x15, 0x0000);
-        rtl8168_mdio_write(tp, 0x16, 0x0306);
-        rtl8168_mdio_write(tp, 0x16, 0x0300);
-        rtl8168_mdio_write(tp, 0x1f, 0x0002);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-        rtl8168_mdio_write(tp, 0x05, 0xfff6);
-        rtl8168_mdio_write(tp, 0x06, 0x0080);
-        rtl8168_mdio_write(tp, 0x05, 0x8000);
-        rtl8168_mdio_write(tp, 0x06, 0x0280);
-        rtl8168_mdio_write(tp, 0x06, 0x48f7);
-        rtl8168_mdio_write(tp, 0x06, 0x00e0);
-        rtl8168_mdio_write(tp, 0x06, 0xfff7);
-        rtl8168_mdio_write(tp, 0x06, 0xa080);
-        rtl8168_mdio_write(tp, 0x06, 0x02ae);
-        rtl8168_mdio_write(tp, 0x06, 0xf602);
-        rtl8168_mdio_write(tp, 0x06, 0x0112);
-        rtl8168_mdio_write(tp, 0x06, 0x0201);
-        rtl8168_mdio_write(tp, 0x06, 0x1f02);
-        rtl8168_mdio_write(tp, 0x06, 0x012c);
-        rtl8168_mdio_write(tp, 0x06, 0x0201);
-        rtl8168_mdio_write(tp, 0x06, 0x3c02);
-        rtl8168_mdio_write(tp, 0x06, 0x0156);
-        rtl8168_mdio_write(tp, 0x06, 0x0201);
-        rtl8168_mdio_write(tp, 0x06, 0x6d02);
-        rtl8168_mdio_write(tp, 0x06, 0x809d);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x88e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b89);
-        rtl8168_mdio_write(tp, 0x06, 0x1e01);
-        rtl8168_mdio_write(tp, 0x06, 0xe18b);
-        rtl8168_mdio_write(tp, 0x06, 0x8a1e);
-        rtl8168_mdio_write(tp, 0x06, 0x01e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8b);
-        rtl8168_mdio_write(tp, 0x06, 0x1e01);
-        rtl8168_mdio_write(tp, 0x06, 0xe18b);
-        rtl8168_mdio_write(tp, 0x06, 0x8c1e);
-        rtl8168_mdio_write(tp, 0x06, 0x01e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
-        rtl8168_mdio_write(tp, 0x06, 0x1e01);
-        rtl8168_mdio_write(tp, 0x06, 0xe18b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e1e);
-        rtl8168_mdio_write(tp, 0x06, 0x01a0);
-        rtl8168_mdio_write(tp, 0x06, 0x00c7);
-        rtl8168_mdio_write(tp, 0x06, 0xaebb);
-        rtl8168_mdio_write(tp, 0x06, 0xd100);
-        rtl8168_mdio_write(tp, 0x06, 0xbf82);
-        rtl8168_mdio_write(tp, 0x06, 0xc702);
-        rtl8168_mdio_write(tp, 0x06, 0x320a);
-        rtl8168_mdio_write(tp, 0x06, 0xd105);
-        rtl8168_mdio_write(tp, 0x06, 0xbf82);
-        rtl8168_mdio_write(tp, 0x06, 0xcd02);
-        rtl8168_mdio_write(tp, 0x06, 0x320a);
-        rtl8168_mdio_write(tp, 0x06, 0xd100);
-        rtl8168_mdio_write(tp, 0x06, 0xbf82);
-        rtl8168_mdio_write(tp, 0x06, 0xca02);
-        rtl8168_mdio_write(tp, 0x06, 0x320a);
-        rtl8168_mdio_write(tp, 0x06, 0xd105);
-        rtl8168_mdio_write(tp, 0x06, 0xbf82);
-        rtl8168_mdio_write(tp, 0x06, 0xd002);
-        rtl8168_mdio_write(tp, 0x06, 0x320a);
-        rtl8168_mdio_write(tp, 0x06, 0xd481);
-        rtl8168_mdio_write(tp, 0x06, 0xc9e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b90);
-        rtl8168_mdio_write(tp, 0x06, 0xe58b);
-        rtl8168_mdio_write(tp, 0x06, 0x91d4);
-        rtl8168_mdio_write(tp, 0x06, 0x81b8);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x92e5);
-        rtl8168_mdio_write(tp, 0x06, 0x8b93);
-        rtl8168_mdio_write(tp, 0x06, 0xbf8b);
-        rtl8168_mdio_write(tp, 0x06, 0x88ec);
-        rtl8168_mdio_write(tp, 0x06, 0x0019);
-        rtl8168_mdio_write(tp, 0x06, 0xa98b);
-        rtl8168_mdio_write(tp, 0x06, 0x90f9);
-        rtl8168_mdio_write(tp, 0x06, 0xeeff);
-        rtl8168_mdio_write(tp, 0x06, 0xf600);
-        rtl8168_mdio_write(tp, 0x06, 0xeeff);
-        rtl8168_mdio_write(tp, 0x06, 0xf7fc);
-        rtl8168_mdio_write(tp, 0x06, 0xd100);
-        rtl8168_mdio_write(tp, 0x06, 0xbf82);
-        rtl8168_mdio_write(tp, 0x06, 0xc102);
-        rtl8168_mdio_write(tp, 0x06, 0x320a);
-        rtl8168_mdio_write(tp, 0x06, 0xd101);
-        rtl8168_mdio_write(tp, 0x06, 0xbf82);
-        rtl8168_mdio_write(tp, 0x06, 0xc402);
-        rtl8168_mdio_write(tp, 0x06, 0x320a);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ead);
-        rtl8168_mdio_write(tp, 0x06, 0x201a);
-        rtl8168_mdio_write(tp, 0x06, 0xf620);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e02);
-        rtl8168_mdio_write(tp, 0x06, 0x824b);
-        rtl8168_mdio_write(tp, 0x06, 0x0281);
-        rtl8168_mdio_write(tp, 0x06, 0x1902);
-        rtl8168_mdio_write(tp, 0x06, 0x2c9d);
-        rtl8168_mdio_write(tp, 0x06, 0x0203);
-        rtl8168_mdio_write(tp, 0x06, 0x9602);
-        rtl8168_mdio_write(tp, 0x06, 0x0473);
-        rtl8168_mdio_write(tp, 0x06, 0x022e);
-        rtl8168_mdio_write(tp, 0x06, 0x3902);
-        rtl8168_mdio_write(tp, 0x06, 0x044d);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ead);
-        rtl8168_mdio_write(tp, 0x06, 0x210b);
-        rtl8168_mdio_write(tp, 0x06, 0xf621);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e02);
-        rtl8168_mdio_write(tp, 0x06, 0x0416);
-        rtl8168_mdio_write(tp, 0x06, 0x021b);
-        rtl8168_mdio_write(tp, 0x06, 0xa4e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xad22);
-        rtl8168_mdio_write(tp, 0x06, 0x05f6);
-        rtl8168_mdio_write(tp, 0x06, 0x22e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ead);
-        rtl8168_mdio_write(tp, 0x06, 0x2305);
-        rtl8168_mdio_write(tp, 0x06, 0xf623);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ee0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xad24);
-        rtl8168_mdio_write(tp, 0x06, 0x05f6);
-        rtl8168_mdio_write(tp, 0x06, 0x24e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ead);
-        rtl8168_mdio_write(tp, 0x06, 0x2505);
-        rtl8168_mdio_write(tp, 0x06, 0xf625);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ee0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xad26);
-        rtl8168_mdio_write(tp, 0x06, 0x08f6);
-        rtl8168_mdio_write(tp, 0x06, 0x26e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0x0281);
-        rtl8168_mdio_write(tp, 0x06, 0xdae0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xad27);
-        rtl8168_mdio_write(tp, 0x06, 0x05f6);
-        rtl8168_mdio_write(tp, 0x06, 0x27e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0x0203);
-        rtl8168_mdio_write(tp, 0x06, 0x5cfc);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xfaef);
-        rtl8168_mdio_write(tp, 0x06, 0x69e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b85);
-        rtl8168_mdio_write(tp, 0x06, 0xad21);
-        rtl8168_mdio_write(tp, 0x06, 0x57e0);
-        rtl8168_mdio_write(tp, 0x06, 0xe022);
-        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-        rtl8168_mdio_write(tp, 0x06, 0x2358);
-        rtl8168_mdio_write(tp, 0x06, 0xc059);
-        rtl8168_mdio_write(tp, 0x06, 0x021e);
-        rtl8168_mdio_write(tp, 0x06, 0x01e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b3c);
-        rtl8168_mdio_write(tp, 0x06, 0x1f10);
-        rtl8168_mdio_write(tp, 0x06, 0x9e44);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x3cad);
-        rtl8168_mdio_write(tp, 0x06, 0x211d);
-        rtl8168_mdio_write(tp, 0x06, 0xe18b);
-        rtl8168_mdio_write(tp, 0x06, 0x84f7);
-        rtl8168_mdio_write(tp, 0x06, 0x29e5);
-        rtl8168_mdio_write(tp, 0x06, 0x8b84);
-        rtl8168_mdio_write(tp, 0x06, 0xac27);
-        rtl8168_mdio_write(tp, 0x06, 0x0dac);
-        rtl8168_mdio_write(tp, 0x06, 0x2605);
-        rtl8168_mdio_write(tp, 0x06, 0x0281);
-        rtl8168_mdio_write(tp, 0x06, 0x7fae);
-        rtl8168_mdio_write(tp, 0x06, 0x2b02);
-        rtl8168_mdio_write(tp, 0x06, 0x2c23);
-        rtl8168_mdio_write(tp, 0x06, 0xae26);
-        rtl8168_mdio_write(tp, 0x06, 0x022c);
-        rtl8168_mdio_write(tp, 0x06, 0x41ae);
-        rtl8168_mdio_write(tp, 0x06, 0x21e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b87);
-        rtl8168_mdio_write(tp, 0x06, 0xad22);
-        rtl8168_mdio_write(tp, 0x06, 0x18e0);
-        rtl8168_mdio_write(tp, 0x06, 0xfff7);
-        rtl8168_mdio_write(tp, 0x06, 0x58fc);
-        rtl8168_mdio_write(tp, 0x06, 0xe4ff);
-        rtl8168_mdio_write(tp, 0x06, 0xf7d1);
-        rtl8168_mdio_write(tp, 0x06, 0x00bf);
-        rtl8168_mdio_write(tp, 0x06, 0x2eee);
-        rtl8168_mdio_write(tp, 0x06, 0x0232);
-        rtl8168_mdio_write(tp, 0x06, 0x0ad1);
-        rtl8168_mdio_write(tp, 0x06, 0x00bf);
-        rtl8168_mdio_write(tp, 0x06, 0x82e8);
-        rtl8168_mdio_write(tp, 0x06, 0x0232);
-        rtl8168_mdio_write(tp, 0x06, 0x0a02);
-        rtl8168_mdio_write(tp, 0x06, 0x2bdf);
-        rtl8168_mdio_write(tp, 0x06, 0xef96);
-        rtl8168_mdio_write(tp, 0x06, 0xfefc);
-        rtl8168_mdio_write(tp, 0x06, 0x04d0);
-        rtl8168_mdio_write(tp, 0x06, 0x0202);
-        rtl8168_mdio_write(tp, 0x06, 0x1e97);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x87ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2228);
-        rtl8168_mdio_write(tp, 0x06, 0xd100);
-        rtl8168_mdio_write(tp, 0x06, 0xbf82);
-        rtl8168_mdio_write(tp, 0x06, 0xd302);
-        rtl8168_mdio_write(tp, 0x06, 0x320a);
-        rtl8168_mdio_write(tp, 0x06, 0xd10c);
-        rtl8168_mdio_write(tp, 0x06, 0xbf82);
-        rtl8168_mdio_write(tp, 0x06, 0xd602);
-        rtl8168_mdio_write(tp, 0x06, 0x320a);
-        rtl8168_mdio_write(tp, 0x06, 0xd104);
-        rtl8168_mdio_write(tp, 0x06, 0xbf82);
-        rtl8168_mdio_write(tp, 0x06, 0xd902);
-        rtl8168_mdio_write(tp, 0x06, 0x320a);
-        rtl8168_mdio_write(tp, 0x06, 0xd101);
-        rtl8168_mdio_write(tp, 0x06, 0xbf82);
-        rtl8168_mdio_write(tp, 0x06, 0xe802);
-        rtl8168_mdio_write(tp, 0x06, 0x320a);
-        rtl8168_mdio_write(tp, 0x06, 0xe0ff);
-        rtl8168_mdio_write(tp, 0x06, 0xf768);
-        rtl8168_mdio_write(tp, 0x06, 0x03e4);
-        rtl8168_mdio_write(tp, 0x06, 0xfff7);
-        rtl8168_mdio_write(tp, 0x06, 0xd004);
-        rtl8168_mdio_write(tp, 0x06, 0x0228);
-        rtl8168_mdio_write(tp, 0x06, 0x7a04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-        rtl8168_mdio_write(tp, 0x06, 0xe234);
-        rtl8168_mdio_write(tp, 0x06, 0xe1e2);
-        rtl8168_mdio_write(tp, 0x06, 0x35f6);
-        rtl8168_mdio_write(tp, 0x06, 0x2be4);
-        rtl8168_mdio_write(tp, 0x06, 0xe234);
-        rtl8168_mdio_write(tp, 0x06, 0xe5e2);
-        rtl8168_mdio_write(tp, 0x06, 0x35fc);
-        rtl8168_mdio_write(tp, 0x06, 0x05f8);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e2);
-        rtl8168_mdio_write(tp, 0x06, 0x34e1);
-        rtl8168_mdio_write(tp, 0x06, 0xe235);
-        rtl8168_mdio_write(tp, 0x06, 0xf72b);
-        rtl8168_mdio_write(tp, 0x06, 0xe4e2);
-        rtl8168_mdio_write(tp, 0x06, 0x34e5);
-        rtl8168_mdio_write(tp, 0x06, 0xe235);
-        rtl8168_mdio_write(tp, 0x06, 0xfc05);
-        rtl8168_mdio_write(tp, 0x06, 0xf8f9);
-        rtl8168_mdio_write(tp, 0x06, 0xfaef);
-        rtl8168_mdio_write(tp, 0x06, 0x69ac);
-        rtl8168_mdio_write(tp, 0x06, 0x1b4c);
-        rtl8168_mdio_write(tp, 0x06, 0xbf2e);
-        rtl8168_mdio_write(tp, 0x06, 0x3002);
-        rtl8168_mdio_write(tp, 0x06, 0x31dd);
-        rtl8168_mdio_write(tp, 0x06, 0xef01);
-        rtl8168_mdio_write(tp, 0x06, 0xe28a);
-        rtl8168_mdio_write(tp, 0x06, 0x76e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8a76);
-        rtl8168_mdio_write(tp, 0x06, 0x1f12);
-        rtl8168_mdio_write(tp, 0x06, 0x9e3a);
-        rtl8168_mdio_write(tp, 0x06, 0xef12);
-        rtl8168_mdio_write(tp, 0x06, 0x5907);
-        rtl8168_mdio_write(tp, 0x06, 0x9f12);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b40);
-        rtl8168_mdio_write(tp, 0x06, 0xf721);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x40d0);
-        rtl8168_mdio_write(tp, 0x06, 0x0302);
-        rtl8168_mdio_write(tp, 0x06, 0x287a);
-        rtl8168_mdio_write(tp, 0x06, 0x0282);
-        rtl8168_mdio_write(tp, 0x06, 0x34fc);
-        rtl8168_mdio_write(tp, 0x06, 0xa000);
-        rtl8168_mdio_write(tp, 0x06, 0x1002);
-        rtl8168_mdio_write(tp, 0x06, 0x2dc3);
-        rtl8168_mdio_write(tp, 0x06, 0x022e);
-        rtl8168_mdio_write(tp, 0x06, 0x21e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b40);
-        rtl8168_mdio_write(tp, 0x06, 0xf621);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x40ae);
-        rtl8168_mdio_write(tp, 0x06, 0x0fbf);
-        rtl8168_mdio_write(tp, 0x06, 0x3fa5);
-        rtl8168_mdio_write(tp, 0x06, 0x0231);
-        rtl8168_mdio_write(tp, 0x06, 0x6cbf);
-        rtl8168_mdio_write(tp, 0x06, 0x3fa2);
-        rtl8168_mdio_write(tp, 0x06, 0x0231);
-        rtl8168_mdio_write(tp, 0x06, 0x6c02);
-        rtl8168_mdio_write(tp, 0x06, 0x2dc3);
-        rtl8168_mdio_write(tp, 0x06, 0xef96);
-        rtl8168_mdio_write(tp, 0x06, 0xfefd);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-        rtl8168_mdio_write(tp, 0x06, 0xe2f4);
-        rtl8168_mdio_write(tp, 0x06, 0xe1e2);
-        rtl8168_mdio_write(tp, 0x06, 0xf5e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8a78);
-        rtl8168_mdio_write(tp, 0x06, 0xe58a);
-        rtl8168_mdio_write(tp, 0x06, 0x79ee);
-        rtl8168_mdio_write(tp, 0x06, 0xe2f4);
-        rtl8168_mdio_write(tp, 0x06, 0xd8ee);
-        rtl8168_mdio_write(tp, 0x06, 0xe2f5);
-        rtl8168_mdio_write(tp, 0x06, 0x20fc);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xf9fa);
-        rtl8168_mdio_write(tp, 0x06, 0xef69);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x87ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2065);
-        rtl8168_mdio_write(tp, 0x06, 0xd200);
-        rtl8168_mdio_write(tp, 0x06, 0xbf2e);
-        rtl8168_mdio_write(tp, 0x06, 0xe802);
-        rtl8168_mdio_write(tp, 0x06, 0x31dd);
-        rtl8168_mdio_write(tp, 0x06, 0x1e21);
-        rtl8168_mdio_write(tp, 0x06, 0xbf82);
-        rtl8168_mdio_write(tp, 0x06, 0xdf02);
-        rtl8168_mdio_write(tp, 0x06, 0x31dd);
-        rtl8168_mdio_write(tp, 0x06, 0x0c11);
-        rtl8168_mdio_write(tp, 0x06, 0x1e21);
-        rtl8168_mdio_write(tp, 0x06, 0xbf82);
-        rtl8168_mdio_write(tp, 0x06, 0xe202);
-        rtl8168_mdio_write(tp, 0x06, 0x31dd);
-        rtl8168_mdio_write(tp, 0x06, 0x0c12);
-        rtl8168_mdio_write(tp, 0x06, 0x1e21);
-        rtl8168_mdio_write(tp, 0x06, 0xbf82);
-        rtl8168_mdio_write(tp, 0x06, 0xe502);
-        rtl8168_mdio_write(tp, 0x06, 0x31dd);
-        rtl8168_mdio_write(tp, 0x06, 0x0c13);
-        rtl8168_mdio_write(tp, 0x06, 0x1e21);
-        rtl8168_mdio_write(tp, 0x06, 0xbf1f);
-        rtl8168_mdio_write(tp, 0x06, 0x5302);
-        rtl8168_mdio_write(tp, 0x06, 0x31dd);
-        rtl8168_mdio_write(tp, 0x06, 0x0c14);
-        rtl8168_mdio_write(tp, 0x06, 0x1e21);
-        rtl8168_mdio_write(tp, 0x06, 0xbf82);
-        rtl8168_mdio_write(tp, 0x06, 0xeb02);
-        rtl8168_mdio_write(tp, 0x06, 0x31dd);
-        rtl8168_mdio_write(tp, 0x06, 0x0c16);
-        rtl8168_mdio_write(tp, 0x06, 0x1e21);
-        rtl8168_mdio_write(tp, 0x06, 0xe083);
-        rtl8168_mdio_write(tp, 0x06, 0xe01f);
-        rtl8168_mdio_write(tp, 0x06, 0x029e);
-        rtl8168_mdio_write(tp, 0x06, 0x22e6);
-        rtl8168_mdio_write(tp, 0x06, 0x83e0);
-        rtl8168_mdio_write(tp, 0x06, 0xad31);
-        rtl8168_mdio_write(tp, 0x06, 0x14ad);
-        rtl8168_mdio_write(tp, 0x06, 0x3011);
-        rtl8168_mdio_write(tp, 0x06, 0xef02);
-        rtl8168_mdio_write(tp, 0x06, 0x580c);
-        rtl8168_mdio_write(tp, 0x06, 0x9e07);
-        rtl8168_mdio_write(tp, 0x06, 0xad36);
-        rtl8168_mdio_write(tp, 0x06, 0x085a);
-        rtl8168_mdio_write(tp, 0x06, 0x309f);
-        rtl8168_mdio_write(tp, 0x06, 0x04d1);
-        rtl8168_mdio_write(tp, 0x06, 0x01ae);
-        rtl8168_mdio_write(tp, 0x06, 0x02d1);
-        rtl8168_mdio_write(tp, 0x06, 0x00bf);
-        rtl8168_mdio_write(tp, 0x06, 0x82dc);
-        rtl8168_mdio_write(tp, 0x06, 0x0232);
-        rtl8168_mdio_write(tp, 0x06, 0x0aef);
-        rtl8168_mdio_write(tp, 0x06, 0x96fe);
-        rtl8168_mdio_write(tp, 0x06, 0xfdfc);
-        rtl8168_mdio_write(tp, 0x06, 0x0400);
-        rtl8168_mdio_write(tp, 0x06, 0xe140);
-        rtl8168_mdio_write(tp, 0x06, 0x77e1);
-        rtl8168_mdio_write(tp, 0x06, 0x4010);
-        rtl8168_mdio_write(tp, 0x06, 0xe150);
-        rtl8168_mdio_write(tp, 0x06, 0x32e1);
-        rtl8168_mdio_write(tp, 0x06, 0x5030);
-        rtl8168_mdio_write(tp, 0x06, 0xe144);
-        rtl8168_mdio_write(tp, 0x06, 0x74e1);
-        rtl8168_mdio_write(tp, 0x06, 0x44bb);
-        rtl8168_mdio_write(tp, 0x06, 0xe2d2);
-        rtl8168_mdio_write(tp, 0x06, 0x40e0);
-        rtl8168_mdio_write(tp, 0x06, 0x2cfc);
-        rtl8168_mdio_write(tp, 0x06, 0xe2cc);
-        rtl8168_mdio_write(tp, 0x06, 0xcce2);
-        rtl8168_mdio_write(tp, 0x06, 0x00cc);
-        rtl8168_mdio_write(tp, 0x06, 0xe000);
-        rtl8168_mdio_write(tp, 0x06, 0x99e0);
-        rtl8168_mdio_write(tp, 0x06, 0x3688);
-        rtl8168_mdio_write(tp, 0x06, 0xe036);
-        rtl8168_mdio_write(tp, 0x06, 0x99e1);
-        rtl8168_mdio_write(tp, 0x06, 0x40dd);
-        rtl8168_mdio_write(tp, 0x06, 0xe022);
-        rtl8168_mdio_write(tp, 0x05, 0xe142);
-        gphy_val = rtl8168_mdio_read(tp, 0x06);
-        gphy_val |= BIT_0;
-        rtl8168_mdio_write(tp, 0x06, gphy_val);
-        rtl8168_mdio_write(tp, 0x05, 0xe140);
-        gphy_val = rtl8168_mdio_read(tp, 0x06);
-        gphy_val |= BIT_0;
-        rtl8168_mdio_write(tp, 0x06, gphy_val);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-        for (i = 0; i < 200; i++) {
-                udelay(100);
-                gphy_val = rtl8168_mdio_read(tp, 0x00);
-                if (gphy_val & BIT_7)
-                        break;
-        }
-        rtl8168_mdio_write(tp, 0x1f, 0x0004);
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1e, 0x0023);
-        gphy_val = rtl8168_mdio_read(tp, 0x17);
-        gphy_val &= ~(BIT_0);
-        gphy_val |= BIT_2;
-        rtl8168_mdio_write(tp, 0x17, gphy_val);
-        rtl8168_mdio_write(tp, 0x1f, 0x0002);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-}
-
-static void
-rtl8168_set_phy_mcu_8168evl_2(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        struct pci_dev *pdev = tp->pci_dev;
-        unsigned int gphy_val,i;
-
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x00, 0x1800);
-        gphy_val = rtl8168_mdio_read(tp, 0x15);
-        gphy_val &= ~(BIT_12);
-        rtl8168_mdio_write(tp, 0x15, gphy_val);
-        rtl8168_mdio_write(tp, 0x00, 0x4800);
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1e, 0x002f);
-        for (i = 0; i < 1000; i++) {
-                udelay(100);
-                gphy_val = rtl8168_mdio_read(tp, 0x1c);
-                if ((gphy_val & 0x0080) == 0x0080)
-                        break;
-        }
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x00, 0x1800);
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1e, 0x0023);
-        for (i = 0; i < 200; i++) {
-                udelay(100);
-                gphy_val = rtl8168_mdio_read(tp, 0x17);
-                if (!(gphy_val & 0x0001))
-                        break;
-        }
-        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-        rtl8168_mdio_write(tp, 0x05, 0xfff6);
-        rtl8168_mdio_write(tp, 0x06, 0x0080);
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1e, 0x0023);
-        rtl8168_mdio_write(tp, 0x16, 0x0306);
-        rtl8168_mdio_write(tp, 0x16, 0x0307);
-        rtl8168_mdio_write(tp, 0x15, 0x00AF);
-        rtl8168_mdio_write(tp, 0x19, 0x4060);
-        rtl8168_mdio_write(tp, 0x15, 0x00B0);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x00B1);
-        rtl8168_mdio_write(tp, 0x19, 0x7e00);
-        rtl8168_mdio_write(tp, 0x15, 0x00B2);
-        rtl8168_mdio_write(tp, 0x19, 0x72B0);
-        rtl8168_mdio_write(tp, 0x15, 0x00B3);
-        rtl8168_mdio_write(tp, 0x19, 0x7F00);
-        rtl8168_mdio_write(tp, 0x15, 0x00B4);
-        rtl8168_mdio_write(tp, 0x19, 0x73B0);
-        rtl8168_mdio_write(tp, 0x15, 0x0101);
-        rtl8168_mdio_write(tp, 0x19, 0x0005);
-        rtl8168_mdio_write(tp, 0x15, 0x0103);
-        rtl8168_mdio_write(tp, 0x19, 0x0003);
-        rtl8168_mdio_write(tp, 0x15, 0x0105);
-        rtl8168_mdio_write(tp, 0x19, 0x30FD);
-        rtl8168_mdio_write(tp, 0x15, 0x0106);
-        rtl8168_mdio_write(tp, 0x19, 0x9DF7);
-        rtl8168_mdio_write(tp, 0x15, 0x0107);
-        rtl8168_mdio_write(tp, 0x19, 0x30C6);
-        rtl8168_mdio_write(tp, 0x15, 0x0098);
-        rtl8168_mdio_write(tp, 0x19, 0x7c0b);
-        rtl8168_mdio_write(tp, 0x15, 0x0099);
-        rtl8168_mdio_write(tp, 0x19, 0x6c0b);
-        rtl8168_mdio_write(tp, 0x15, 0x00eb);
-        rtl8168_mdio_write(tp, 0x19, 0x6c0b);
-        rtl8168_mdio_write(tp, 0x15, 0x00f8);
-        rtl8168_mdio_write(tp, 0x19, 0x6f0b);
-        rtl8168_mdio_write(tp, 0x15, 0x00fe);
-        rtl8168_mdio_write(tp, 0x19, 0x6f0f);
-        rtl8168_mdio_write(tp, 0x15, 0x00db);
-        rtl8168_mdio_write(tp, 0x19, 0x6f09);
-        rtl8168_mdio_write(tp, 0x15, 0x00dc);
-        rtl8168_mdio_write(tp, 0x19, 0xaefd);
-        rtl8168_mdio_write(tp, 0x15, 0x00dd);
-        rtl8168_mdio_write(tp, 0x19, 0x6f0b);
-        rtl8168_mdio_write(tp, 0x15, 0x00de);
-        rtl8168_mdio_write(tp, 0x19, 0xc60b);
-        rtl8168_mdio_write(tp, 0x15, 0x00df);
-        rtl8168_mdio_write(tp, 0x19, 0x00fa);
-        rtl8168_mdio_write(tp, 0x15, 0x00e0);
-        rtl8168_mdio_write(tp, 0x19, 0x30e1);
-        rtl8168_mdio_write(tp, 0x15, 0x020c);
-        rtl8168_mdio_write(tp, 0x19, 0x3224);
-        rtl8168_mdio_write(tp, 0x15, 0x020e);
-        rtl8168_mdio_write(tp, 0x19, 0x9813);
-        rtl8168_mdio_write(tp, 0x15, 0x020f);
-        rtl8168_mdio_write(tp, 0x19, 0x7801);
-        rtl8168_mdio_write(tp, 0x15, 0x0210);
-        rtl8168_mdio_write(tp, 0x19, 0x930f);
-        rtl8168_mdio_write(tp, 0x15, 0x0211);
-        rtl8168_mdio_write(tp, 0x19, 0x9206);
-        rtl8168_mdio_write(tp, 0x15, 0x0212);
-        rtl8168_mdio_write(tp, 0x19, 0x4002);
-        rtl8168_mdio_write(tp, 0x15, 0x0213);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x0214);
-        rtl8168_mdio_write(tp, 0x19, 0x588f);
-        rtl8168_mdio_write(tp, 0x15, 0x0215);
-        rtl8168_mdio_write(tp, 0x19, 0x5520);
-        rtl8168_mdio_write(tp, 0x15, 0x0216);
-        rtl8168_mdio_write(tp, 0x19, 0x3224);
-        rtl8168_mdio_write(tp, 0x15, 0x0217);
-        rtl8168_mdio_write(tp, 0x19, 0x4002);
-        rtl8168_mdio_write(tp, 0x15, 0x0218);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x0219);
-        rtl8168_mdio_write(tp, 0x19, 0x588d);
-        rtl8168_mdio_write(tp, 0x15, 0x021a);
-        rtl8168_mdio_write(tp, 0x19, 0x5540);
-        rtl8168_mdio_write(tp, 0x15, 0x021b);
-        rtl8168_mdio_write(tp, 0x19, 0x9e03);
-        rtl8168_mdio_write(tp, 0x15, 0x021c);
-        rtl8168_mdio_write(tp, 0x19, 0x7c40);
-        rtl8168_mdio_write(tp, 0x15, 0x021d);
-        rtl8168_mdio_write(tp, 0x19, 0x6840);
-        rtl8168_mdio_write(tp, 0x15, 0x021e);
-        rtl8168_mdio_write(tp, 0x19, 0x3224);
-        rtl8168_mdio_write(tp, 0x15, 0x021f);
-        rtl8168_mdio_write(tp, 0x19, 0x4002);
-        rtl8168_mdio_write(tp, 0x15, 0x0220);
-        rtl8168_mdio_write(tp, 0x19, 0x3224);
-        rtl8168_mdio_write(tp, 0x15, 0x0221);
-        rtl8168_mdio_write(tp, 0x19, 0x9e03);
-        rtl8168_mdio_write(tp, 0x15, 0x0222);
-        rtl8168_mdio_write(tp, 0x19, 0x7c40);
-        rtl8168_mdio_write(tp, 0x15, 0x0223);
-        rtl8168_mdio_write(tp, 0x19, 0x6840);
-        rtl8168_mdio_write(tp, 0x15, 0x0224);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x0225);
-        rtl8168_mdio_write(tp, 0x19, 0x3231);
-        rtl8168_mdio_write(tp, 0x15, 0x0000);
-        rtl8168_mdio_write(tp, 0x16, 0x0306);
-        rtl8168_mdio_write(tp, 0x16, 0x0300);
-        rtl8168_mdio_write(tp, 0x1f, 0x0002);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x17, 0x2160);
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1e, 0x0040);
-        rtl8168_mdio_write(tp, 0x18, 0x0004);
-        if (pdev->subsystem_vendor == 0x144d &&
-            pdev->subsystem_device == 0xc0a6) {
-                rtl8168_mdio_write(tp, 0x18, 0x0724);
-                rtl8168_mdio_write(tp, 0x19, 0xfe00);
-                rtl8168_mdio_write(tp, 0x18, 0x0734);
-                rtl8168_mdio_write(tp, 0x19, 0xfd00);
-                rtl8168_mdio_write(tp, 0x18, 0x1824);
-                rtl8168_mdio_write(tp, 0x19, 0xfc00);
-                rtl8168_mdio_write(tp, 0x18, 0x1834);
-                rtl8168_mdio_write(tp, 0x19, 0xfd00);
-        }
-        rtl8168_mdio_write(tp, 0x18, 0x09d4);
-        rtl8168_mdio_write(tp, 0x19, 0x4000);
-        rtl8168_mdio_write(tp, 0x18, 0x09e4);
-        rtl8168_mdio_write(tp, 0x19, 0x0800);
-        rtl8168_mdio_write(tp, 0x18, 0x09f4);
-        rtl8168_mdio_write(tp, 0x19, 0xff00);
-        rtl8168_mdio_write(tp, 0x18, 0x0a04);
-        rtl8168_mdio_write(tp, 0x19, 0x4000);
-        rtl8168_mdio_write(tp, 0x18, 0x0a14);
-        rtl8168_mdio_write(tp, 0x19, 0x0c00);
-        rtl8168_mdio_write(tp, 0x18, 0x0a24);
-        rtl8168_mdio_write(tp, 0x19, 0xff00);
-        rtl8168_mdio_write(tp, 0x18, 0x0a74);
-        rtl8168_mdio_write(tp, 0x19, 0xf600);
-        rtl8168_mdio_write(tp, 0x18, 0x1a24);
-        rtl8168_mdio_write(tp, 0x19, 0x7d00);
-        rtl8168_mdio_write(tp, 0x18, 0x1a64);
-        rtl8168_mdio_write(tp, 0x19, 0x0500);
-        rtl8168_mdio_write(tp, 0x18, 0x1a74);
-        rtl8168_mdio_write(tp, 0x19, 0x9500);
-        rtl8168_mdio_write(tp, 0x18, 0x1a84);
-        rtl8168_mdio_write(tp, 0x19, 0x8000);
-        rtl8168_mdio_write(tp, 0x18, 0x1a94);
-        rtl8168_mdio_write(tp, 0x19, 0x7d00);
-        rtl8168_mdio_write(tp, 0x18, 0x1aa4);
-        rtl8168_mdio_write(tp, 0x19, 0x9600);
-        rtl8168_mdio_write(tp, 0x18, 0x1ac4);
-        rtl8168_mdio_write(tp, 0x19, 0x4000);
-        rtl8168_mdio_write(tp, 0x18, 0x1ad4);
-        rtl8168_mdio_write(tp, 0x19, 0x0800);
-        rtl8168_mdio_write(tp, 0x18, 0x1af4);
-        rtl8168_mdio_write(tp, 0x19, 0xc400);
-        rtl8168_mdio_write(tp, 0x18, 0x1b04);
-        rtl8168_mdio_write(tp, 0x19, 0x4000);
-        rtl8168_mdio_write(tp, 0x18, 0x1b14);
-        rtl8168_mdio_write(tp, 0x19, 0x0800);
-        rtl8168_mdio_write(tp, 0x18, 0x1b24);
-        rtl8168_mdio_write(tp, 0x19, 0xfd00);
-        rtl8168_mdio_write(tp, 0x18, 0x1b34);
-        rtl8168_mdio_write(tp, 0x19, 0x4000);
-        rtl8168_mdio_write(tp, 0x18, 0x1b44);
-        rtl8168_mdio_write(tp, 0x19, 0x0400);
-        rtl8168_mdio_write(tp, 0x18, 0x1b94);
-        rtl8168_mdio_write(tp, 0x19, 0xf100);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x17, 0x2100);
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1e, 0x0040);
-        rtl8168_mdio_write(tp, 0x18, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-        rtl8168_mdio_write(tp, 0x05, 0xfff6);
-        rtl8168_mdio_write(tp, 0x06, 0x0080);
-        rtl8168_mdio_write(tp, 0x05, 0x8000);
-        rtl8168_mdio_write(tp, 0x06, 0x0280);
-        rtl8168_mdio_write(tp, 0x06, 0x48f7);
-        rtl8168_mdio_write(tp, 0x06, 0x00e0);
-        rtl8168_mdio_write(tp, 0x06, 0xfff7);
-        rtl8168_mdio_write(tp, 0x06, 0xa080);
-        rtl8168_mdio_write(tp, 0x06, 0x02ae);
-        rtl8168_mdio_write(tp, 0x06, 0xf602);
-        rtl8168_mdio_write(tp, 0x06, 0x0115);
-        rtl8168_mdio_write(tp, 0x06, 0x0201);
-        rtl8168_mdio_write(tp, 0x06, 0x2202);
-        rtl8168_mdio_write(tp, 0x06, 0x80a0);
-        rtl8168_mdio_write(tp, 0x06, 0x0201);
-        rtl8168_mdio_write(tp, 0x06, 0x3f02);
-        rtl8168_mdio_write(tp, 0x06, 0x0159);
-        rtl8168_mdio_write(tp, 0x06, 0x0280);
-        rtl8168_mdio_write(tp, 0x06, 0xbd02);
-        rtl8168_mdio_write(tp, 0x06, 0x80da);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x88e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b89);
-        rtl8168_mdio_write(tp, 0x06, 0x1e01);
-        rtl8168_mdio_write(tp, 0x06, 0xe18b);
-        rtl8168_mdio_write(tp, 0x06, 0x8a1e);
-        rtl8168_mdio_write(tp, 0x06, 0x01e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8b);
-        rtl8168_mdio_write(tp, 0x06, 0x1e01);
-        rtl8168_mdio_write(tp, 0x06, 0xe18b);
-        rtl8168_mdio_write(tp, 0x06, 0x8c1e);
-        rtl8168_mdio_write(tp, 0x06, 0x01e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
-        rtl8168_mdio_write(tp, 0x06, 0x1e01);
-        rtl8168_mdio_write(tp, 0x06, 0xe18b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e1e);
-        rtl8168_mdio_write(tp, 0x06, 0x01a0);
-        rtl8168_mdio_write(tp, 0x06, 0x00c7);
-        rtl8168_mdio_write(tp, 0x06, 0xaebb);
-        rtl8168_mdio_write(tp, 0x06, 0xd481);
-        rtl8168_mdio_write(tp, 0x06, 0xd2e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b92);
-        rtl8168_mdio_write(tp, 0x06, 0xe58b);
-        rtl8168_mdio_write(tp, 0x06, 0x93d1);
-        rtl8168_mdio_write(tp, 0x06, 0x03bf);
-        rtl8168_mdio_write(tp, 0x06, 0x859e);
-        rtl8168_mdio_write(tp, 0x06, 0x0237);
-        rtl8168_mdio_write(tp, 0x06, 0x23d1);
-        rtl8168_mdio_write(tp, 0x06, 0x02bf);
-        rtl8168_mdio_write(tp, 0x06, 0x85a1);
-        rtl8168_mdio_write(tp, 0x06, 0x0237);
-        rtl8168_mdio_write(tp, 0x06, 0x23ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8608);
-        rtl8168_mdio_write(tp, 0x06, 0x03ee);
-        rtl8168_mdio_write(tp, 0x06, 0x860a);
-        rtl8168_mdio_write(tp, 0x06, 0x60ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8610);
-        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8611);
-        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8abe);
-        rtl8168_mdio_write(tp, 0x06, 0x07ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8abf);
-        rtl8168_mdio_write(tp, 0x06, 0x73ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8a95);
-        rtl8168_mdio_write(tp, 0x06, 0x02bf);
-        rtl8168_mdio_write(tp, 0x06, 0x8b88);
-        rtl8168_mdio_write(tp, 0x06, 0xec00);
-        rtl8168_mdio_write(tp, 0x06, 0x19a9);
-        rtl8168_mdio_write(tp, 0x06, 0x8b90);
-        rtl8168_mdio_write(tp, 0x06, 0xf9ee);
-        rtl8168_mdio_write(tp, 0x06, 0xfff6);
-        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-        rtl8168_mdio_write(tp, 0x06, 0xfff7);
-        rtl8168_mdio_write(tp, 0x06, 0xfed1);
-        rtl8168_mdio_write(tp, 0x06, 0x00bf);
-        rtl8168_mdio_write(tp, 0x06, 0x8595);
-        rtl8168_mdio_write(tp, 0x06, 0x0237);
-        rtl8168_mdio_write(tp, 0x06, 0x23d1);
-        rtl8168_mdio_write(tp, 0x06, 0x01bf);
-        rtl8168_mdio_write(tp, 0x06, 0x8598);
-        rtl8168_mdio_write(tp, 0x06, 0x0237);
-        rtl8168_mdio_write(tp, 0x06, 0x2304);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8a);
-        rtl8168_mdio_write(tp, 0x06, 0xad20);
-        rtl8168_mdio_write(tp, 0x06, 0x14ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8a);
-        rtl8168_mdio_write(tp, 0x06, 0x0002);
-        rtl8168_mdio_write(tp, 0x06, 0x1f9a);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e4);
-        rtl8168_mdio_write(tp, 0x06, 0x26e1);
-        rtl8168_mdio_write(tp, 0x06, 0xe427);
-        rtl8168_mdio_write(tp, 0x06, 0xeee4);
-        rtl8168_mdio_write(tp, 0x06, 0x2623);
-        rtl8168_mdio_write(tp, 0x06, 0xe5e4);
-        rtl8168_mdio_write(tp, 0x06, 0x27fc);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8dad);
-        rtl8168_mdio_write(tp, 0x06, 0x2014);
-        rtl8168_mdio_write(tp, 0x06, 0xee8b);
-        rtl8168_mdio_write(tp, 0x06, 0x8d00);
-        rtl8168_mdio_write(tp, 0x06, 0xe08a);
-        rtl8168_mdio_write(tp, 0x06, 0x5a78);
-        rtl8168_mdio_write(tp, 0x06, 0x039e);
-        rtl8168_mdio_write(tp, 0x06, 0x0902);
-        rtl8168_mdio_write(tp, 0x06, 0x05db);
-        rtl8168_mdio_write(tp, 0x06, 0x0282);
-        rtl8168_mdio_write(tp, 0x06, 0x7b02);
-        rtl8168_mdio_write(tp, 0x06, 0x3231);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xad20);
-        rtl8168_mdio_write(tp, 0x06, 0x1df6);
-        rtl8168_mdio_write(tp, 0x06, 0x20e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0x0281);
-        rtl8168_mdio_write(tp, 0x06, 0x5c02);
-        rtl8168_mdio_write(tp, 0x06, 0x2bcb);
-        rtl8168_mdio_write(tp, 0x06, 0x022d);
-        rtl8168_mdio_write(tp, 0x06, 0x2902);
-        rtl8168_mdio_write(tp, 0x06, 0x03b4);
-        rtl8168_mdio_write(tp, 0x06, 0x0285);
-        rtl8168_mdio_write(tp, 0x06, 0x6402);
-        rtl8168_mdio_write(tp, 0x06, 0x2eca);
-        rtl8168_mdio_write(tp, 0x06, 0x0284);
-        rtl8168_mdio_write(tp, 0x06, 0xcd02);
-        rtl8168_mdio_write(tp, 0x06, 0x046f);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ead);
-        rtl8168_mdio_write(tp, 0x06, 0x210b);
-        rtl8168_mdio_write(tp, 0x06, 0xf621);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e02);
-        rtl8168_mdio_write(tp, 0x06, 0x8520);
-        rtl8168_mdio_write(tp, 0x06, 0x021b);
-        rtl8168_mdio_write(tp, 0x06, 0xe8e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xad22);
-        rtl8168_mdio_write(tp, 0x06, 0x05f6);
-        rtl8168_mdio_write(tp, 0x06, 0x22e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ead);
-        rtl8168_mdio_write(tp, 0x06, 0x2308);
-        rtl8168_mdio_write(tp, 0x06, 0xf623);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e02);
-        rtl8168_mdio_write(tp, 0x06, 0x311c);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ead);
-        rtl8168_mdio_write(tp, 0x06, 0x2405);
-        rtl8168_mdio_write(tp, 0x06, 0xf624);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ee0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xad25);
-        rtl8168_mdio_write(tp, 0x06, 0x05f6);
-        rtl8168_mdio_write(tp, 0x06, 0x25e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ead);
-        rtl8168_mdio_write(tp, 0x06, 0x2608);
-        rtl8168_mdio_write(tp, 0x06, 0xf626);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e02);
-        rtl8168_mdio_write(tp, 0x06, 0x2df5);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ead);
-        rtl8168_mdio_write(tp, 0x06, 0x2705);
-        rtl8168_mdio_write(tp, 0x06, 0xf627);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e02);
-        rtl8168_mdio_write(tp, 0x06, 0x037a);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8f9);
-        rtl8168_mdio_write(tp, 0x06, 0xfaef);
-        rtl8168_mdio_write(tp, 0x06, 0x69e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b87);
-        rtl8168_mdio_write(tp, 0x06, 0xad20);
-        rtl8168_mdio_write(tp, 0x06, 0x65d2);
-        rtl8168_mdio_write(tp, 0x06, 0x00bf);
-        rtl8168_mdio_write(tp, 0x06, 0x2fe9);
-        rtl8168_mdio_write(tp, 0x06, 0x0236);
-        rtl8168_mdio_write(tp, 0x06, 0xf61e);
-        rtl8168_mdio_write(tp, 0x06, 0x21bf);
-        rtl8168_mdio_write(tp, 0x06, 0x2ff5);
-        rtl8168_mdio_write(tp, 0x06, 0x0236);
-        rtl8168_mdio_write(tp, 0x06, 0xf60c);
-        rtl8168_mdio_write(tp, 0x06, 0x111e);
-        rtl8168_mdio_write(tp, 0x06, 0x21bf);
-        rtl8168_mdio_write(tp, 0x06, 0x2ff8);
-        rtl8168_mdio_write(tp, 0x06, 0x0236);
-        rtl8168_mdio_write(tp, 0x06, 0xf60c);
-        rtl8168_mdio_write(tp, 0x06, 0x121e);
-        rtl8168_mdio_write(tp, 0x06, 0x21bf);
-        rtl8168_mdio_write(tp, 0x06, 0x2ffb);
-        rtl8168_mdio_write(tp, 0x06, 0x0236);
-        rtl8168_mdio_write(tp, 0x06, 0xf60c);
-        rtl8168_mdio_write(tp, 0x06, 0x131e);
-        rtl8168_mdio_write(tp, 0x06, 0x21bf);
-        rtl8168_mdio_write(tp, 0x06, 0x1f97);
-        rtl8168_mdio_write(tp, 0x06, 0x0236);
-        rtl8168_mdio_write(tp, 0x06, 0xf60c);
-        rtl8168_mdio_write(tp, 0x06, 0x141e);
-        rtl8168_mdio_write(tp, 0x06, 0x21bf);
-        rtl8168_mdio_write(tp, 0x06, 0x859b);
-        rtl8168_mdio_write(tp, 0x06, 0x0236);
-        rtl8168_mdio_write(tp, 0x06, 0xf60c);
-        rtl8168_mdio_write(tp, 0x06, 0x161e);
-        rtl8168_mdio_write(tp, 0x06, 0x21e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8a8c);
-        rtl8168_mdio_write(tp, 0x06, 0x1f02);
-        rtl8168_mdio_write(tp, 0x06, 0x9e22);
-        rtl8168_mdio_write(tp, 0x06, 0xe68a);
-        rtl8168_mdio_write(tp, 0x06, 0x8cad);
-        rtl8168_mdio_write(tp, 0x06, 0x3114);
-        rtl8168_mdio_write(tp, 0x06, 0xad30);
-        rtl8168_mdio_write(tp, 0x06, 0x11ef);
-        rtl8168_mdio_write(tp, 0x06, 0x0258);
-        rtl8168_mdio_write(tp, 0x06, 0x0c9e);
-        rtl8168_mdio_write(tp, 0x06, 0x07ad);
-        rtl8168_mdio_write(tp, 0x06, 0x3608);
-        rtl8168_mdio_write(tp, 0x06, 0x5a30);
-        rtl8168_mdio_write(tp, 0x06, 0x9f04);
-        rtl8168_mdio_write(tp, 0x06, 0xd101);
-        rtl8168_mdio_write(tp, 0x06, 0xae02);
-        rtl8168_mdio_write(tp, 0x06, 0xd100);
-        rtl8168_mdio_write(tp, 0x06, 0xbf2f);
-        rtl8168_mdio_write(tp, 0x06, 0xf202);
-        rtl8168_mdio_write(tp, 0x06, 0x3723);
-        rtl8168_mdio_write(tp, 0x06, 0xef96);
-        rtl8168_mdio_write(tp, 0x06, 0xfefd);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8f9);
-        rtl8168_mdio_write(tp, 0x06, 0xface);
-        rtl8168_mdio_write(tp, 0x06, 0xfaef);
-        rtl8168_mdio_write(tp, 0x06, 0x69fa);
-        rtl8168_mdio_write(tp, 0x06, 0xd401);
-        rtl8168_mdio_write(tp, 0x06, 0x55b4);
-        rtl8168_mdio_write(tp, 0x06, 0xfebf);
-        rtl8168_mdio_write(tp, 0x06, 0x85a7);
-        rtl8168_mdio_write(tp, 0x06, 0x0236);
-        rtl8168_mdio_write(tp, 0x06, 0xf6ac);
-        rtl8168_mdio_write(tp, 0x06, 0x280b);
-        rtl8168_mdio_write(tp, 0x06, 0xbf85);
-        rtl8168_mdio_write(tp, 0x06, 0xa402);
-        rtl8168_mdio_write(tp, 0x06, 0x36f6);
-        rtl8168_mdio_write(tp, 0x06, 0xac28);
-        rtl8168_mdio_write(tp, 0x06, 0x49ae);
-        rtl8168_mdio_write(tp, 0x06, 0x64bf);
-        rtl8168_mdio_write(tp, 0x06, 0x85a4);
-        rtl8168_mdio_write(tp, 0x06, 0x0236);
-        rtl8168_mdio_write(tp, 0x06, 0xf6ac);
-        rtl8168_mdio_write(tp, 0x06, 0x285b);
-        rtl8168_mdio_write(tp, 0x06, 0xd000);
-        rtl8168_mdio_write(tp, 0x06, 0x0282);
-        rtl8168_mdio_write(tp, 0x06, 0x60ac);
-        rtl8168_mdio_write(tp, 0x06, 0x2105);
-        rtl8168_mdio_write(tp, 0x06, 0xac22);
-        rtl8168_mdio_write(tp, 0x06, 0x02ae);
-        rtl8168_mdio_write(tp, 0x06, 0x4ebf);
-        rtl8168_mdio_write(tp, 0x06, 0xe0c4);
-        rtl8168_mdio_write(tp, 0x06, 0xbe86);
-        rtl8168_mdio_write(tp, 0x06, 0x14d2);
-        rtl8168_mdio_write(tp, 0x06, 0x04d8);
-        rtl8168_mdio_write(tp, 0x06, 0x19d9);
-        rtl8168_mdio_write(tp, 0x06, 0x1907);
-        rtl8168_mdio_write(tp, 0x06, 0xdc19);
-        rtl8168_mdio_write(tp, 0x06, 0xdd19);
-        rtl8168_mdio_write(tp, 0x06, 0x0789);
-        rtl8168_mdio_write(tp, 0x06, 0x89ef);
-        rtl8168_mdio_write(tp, 0x06, 0x645e);
-        rtl8168_mdio_write(tp, 0x06, 0x07ff);
-        rtl8168_mdio_write(tp, 0x06, 0x0d65);
-        rtl8168_mdio_write(tp, 0x06, 0x5cf8);
-        rtl8168_mdio_write(tp, 0x06, 0x001e);
-        rtl8168_mdio_write(tp, 0x06, 0x46dc);
-        rtl8168_mdio_write(tp, 0x06, 0x19dd);
-        rtl8168_mdio_write(tp, 0x06, 0x19b2);
-        rtl8168_mdio_write(tp, 0x06, 0xe2d4);
-        rtl8168_mdio_write(tp, 0x06, 0x0001);
-        rtl8168_mdio_write(tp, 0x06, 0xbf85);
-        rtl8168_mdio_write(tp, 0x06, 0xa402);
-        rtl8168_mdio_write(tp, 0x06, 0x3723);
-        rtl8168_mdio_write(tp, 0x06, 0xae1d);
-        rtl8168_mdio_write(tp, 0x06, 0xbee0);
-        rtl8168_mdio_write(tp, 0x06, 0xc4bf);
-        rtl8168_mdio_write(tp, 0x06, 0x8614);
-        rtl8168_mdio_write(tp, 0x06, 0xd204);
-        rtl8168_mdio_write(tp, 0x06, 0xd819);
-        rtl8168_mdio_write(tp, 0x06, 0xd919);
-        rtl8168_mdio_write(tp, 0x06, 0x07dc);
-        rtl8168_mdio_write(tp, 0x06, 0x19dd);
-        rtl8168_mdio_write(tp, 0x06, 0x1907);
-        rtl8168_mdio_write(tp, 0x06, 0xb2f4);
-        rtl8168_mdio_write(tp, 0x06, 0xd400);
-        rtl8168_mdio_write(tp, 0x06, 0x00bf);
-        rtl8168_mdio_write(tp, 0x06, 0x85a4);
-        rtl8168_mdio_write(tp, 0x06, 0x0237);
-        rtl8168_mdio_write(tp, 0x06, 0x23fe);
-        rtl8168_mdio_write(tp, 0x06, 0xef96);
-        rtl8168_mdio_write(tp, 0x06, 0xfec6);
-        rtl8168_mdio_write(tp, 0x06, 0xfefd);
-        rtl8168_mdio_write(tp, 0x06, 0xfc05);
-        rtl8168_mdio_write(tp, 0x06, 0xf9e2);
-        rtl8168_mdio_write(tp, 0x06, 0xe0ea);
-        rtl8168_mdio_write(tp, 0x06, 0xe3e0);
-        rtl8168_mdio_write(tp, 0x06, 0xeb5a);
-        rtl8168_mdio_write(tp, 0x06, 0x070c);
-        rtl8168_mdio_write(tp, 0x06, 0x031e);
-        rtl8168_mdio_write(tp, 0x06, 0x20e6);
-        rtl8168_mdio_write(tp, 0x06, 0xe0ea);
-        rtl8168_mdio_write(tp, 0x06, 0xe7e0);
-        rtl8168_mdio_write(tp, 0x06, 0xebe0);
-        rtl8168_mdio_write(tp, 0x06, 0xe0fc);
-        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-        rtl8168_mdio_write(tp, 0x06, 0xfdfd);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xf9e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b81);
-        rtl8168_mdio_write(tp, 0x06, 0xac26);
-        rtl8168_mdio_write(tp, 0x06, 0x1ae0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b81);
-        rtl8168_mdio_write(tp, 0x06, 0xac21);
-        rtl8168_mdio_write(tp, 0x06, 0x14e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b85);
-        rtl8168_mdio_write(tp, 0x06, 0xac20);
-        rtl8168_mdio_write(tp, 0x06, 0x0ee0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b85);
-        rtl8168_mdio_write(tp, 0x06, 0xac23);
-        rtl8168_mdio_write(tp, 0x06, 0x08e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b87);
-        rtl8168_mdio_write(tp, 0x06, 0xac24);
-        rtl8168_mdio_write(tp, 0x06, 0x02ae);
-        rtl8168_mdio_write(tp, 0x06, 0x3802);
-        rtl8168_mdio_write(tp, 0x06, 0x1ab5);
-        rtl8168_mdio_write(tp, 0x06, 0xeee4);
-        rtl8168_mdio_write(tp, 0x06, 0x1c04);
-        rtl8168_mdio_write(tp, 0x06, 0xeee4);
-        rtl8168_mdio_write(tp, 0x06, 0x1d04);
-        rtl8168_mdio_write(tp, 0x06, 0xe2e0);
-        rtl8168_mdio_write(tp, 0x06, 0x7ce3);
-        rtl8168_mdio_write(tp, 0x06, 0xe07d);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-        rtl8168_mdio_write(tp, 0x06, 0x38e1);
-        rtl8168_mdio_write(tp, 0x06, 0xe039);
-        rtl8168_mdio_write(tp, 0x06, 0xad2e);
-        rtl8168_mdio_write(tp, 0x06, 0x1bad);
-        rtl8168_mdio_write(tp, 0x06, 0x390d);
-        rtl8168_mdio_write(tp, 0x06, 0xd101);
-        rtl8168_mdio_write(tp, 0x06, 0xbf21);
-        rtl8168_mdio_write(tp, 0x06, 0xd502);
-        rtl8168_mdio_write(tp, 0x06, 0x3723);
-        rtl8168_mdio_write(tp, 0x06, 0x0282);
-        rtl8168_mdio_write(tp, 0x06, 0xd8ae);
-        rtl8168_mdio_write(tp, 0x06, 0x0bac);
-        rtl8168_mdio_write(tp, 0x06, 0x3802);
-        rtl8168_mdio_write(tp, 0x06, 0xae06);
-        rtl8168_mdio_write(tp, 0x06, 0x0283);
-        rtl8168_mdio_write(tp, 0x06, 0x1802);
-        rtl8168_mdio_write(tp, 0x06, 0x8360);
-        rtl8168_mdio_write(tp, 0x06, 0x021a);
-        rtl8168_mdio_write(tp, 0x06, 0xc6fd);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8af4);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x81ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2605);
-        rtl8168_mdio_write(tp, 0x06, 0x0222);
-        rtl8168_mdio_write(tp, 0x06, 0xa4f7);
-        rtl8168_mdio_write(tp, 0x06, 0x28e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b81);
-        rtl8168_mdio_write(tp, 0x06, 0xad21);
-        rtl8168_mdio_write(tp, 0x06, 0x0502);
-        rtl8168_mdio_write(tp, 0x06, 0x23a9);
-        rtl8168_mdio_write(tp, 0x06, 0xf729);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x85ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2005);
-        rtl8168_mdio_write(tp, 0x06, 0x0214);
-        rtl8168_mdio_write(tp, 0x06, 0xabf7);
-        rtl8168_mdio_write(tp, 0x06, 0x2ae0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b85);
-        rtl8168_mdio_write(tp, 0x06, 0xad23);
-        rtl8168_mdio_write(tp, 0x06, 0x0502);
-        rtl8168_mdio_write(tp, 0x06, 0x12e7);
-        rtl8168_mdio_write(tp, 0x06, 0xf72b);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x87ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2405);
-        rtl8168_mdio_write(tp, 0x06, 0x0283);
-        rtl8168_mdio_write(tp, 0x06, 0xbcf7);
-        rtl8168_mdio_write(tp, 0x06, 0x2ce5);
-        rtl8168_mdio_write(tp, 0x06, 0x8af4);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b81);
-        rtl8168_mdio_write(tp, 0x06, 0xad26);
-        rtl8168_mdio_write(tp, 0x06, 0x0302);
-        rtl8168_mdio_write(tp, 0x06, 0x21e5);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x81ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2109);
-        rtl8168_mdio_write(tp, 0x06, 0xe08a);
-        rtl8168_mdio_write(tp, 0x06, 0xf4ac);
-        rtl8168_mdio_write(tp, 0x06, 0x2003);
-        rtl8168_mdio_write(tp, 0x06, 0x0223);
-        rtl8168_mdio_write(tp, 0x06, 0x98e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b85);
-        rtl8168_mdio_write(tp, 0x06, 0xad20);
-        rtl8168_mdio_write(tp, 0x06, 0x09e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8af4);
-        rtl8168_mdio_write(tp, 0x06, 0xac21);
-        rtl8168_mdio_write(tp, 0x06, 0x0302);
-        rtl8168_mdio_write(tp, 0x06, 0x13fb);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x85ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2309);
-        rtl8168_mdio_write(tp, 0x06, 0xe08a);
-        rtl8168_mdio_write(tp, 0x06, 0xf4ac);
-        rtl8168_mdio_write(tp, 0x06, 0x2203);
-        rtl8168_mdio_write(tp, 0x06, 0x0212);
-        rtl8168_mdio_write(tp, 0x06, 0xfae0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b87);
-        rtl8168_mdio_write(tp, 0x06, 0xad24);
-        rtl8168_mdio_write(tp, 0x06, 0x09e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8af4);
-        rtl8168_mdio_write(tp, 0x06, 0xac23);
-        rtl8168_mdio_write(tp, 0x06, 0x0302);
-        rtl8168_mdio_write(tp, 0x06, 0x83c1);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8af4);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x81ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2608);
-        rtl8168_mdio_write(tp, 0x06, 0xe083);
-        rtl8168_mdio_write(tp, 0x06, 0xd2ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2502);
-        rtl8168_mdio_write(tp, 0x06, 0xf628);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x81ad);
-        rtl8168_mdio_write(tp, 0x06, 0x210a);
-        rtl8168_mdio_write(tp, 0x06, 0xe084);
-        rtl8168_mdio_write(tp, 0x06, 0x0af6);
-        rtl8168_mdio_write(tp, 0x06, 0x27a0);
-        rtl8168_mdio_write(tp, 0x06, 0x0502);
-        rtl8168_mdio_write(tp, 0x06, 0xf629);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x85ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2008);
-        rtl8168_mdio_write(tp, 0x06, 0xe08a);
-        rtl8168_mdio_write(tp, 0x06, 0xe8ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2102);
-        rtl8168_mdio_write(tp, 0x06, 0xf62a);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x85ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2308);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x20a0);
-        rtl8168_mdio_write(tp, 0x06, 0x0302);
-        rtl8168_mdio_write(tp, 0x06, 0xf62b);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x87ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2408);
-        rtl8168_mdio_write(tp, 0x06, 0xe086);
-        rtl8168_mdio_write(tp, 0x06, 0x02a0);
-        rtl8168_mdio_write(tp, 0x06, 0x0302);
-        rtl8168_mdio_write(tp, 0x06, 0xf62c);
-        rtl8168_mdio_write(tp, 0x06, 0xe58a);
-        rtl8168_mdio_write(tp, 0x06, 0xf4a1);
-        rtl8168_mdio_write(tp, 0x06, 0x0008);
-        rtl8168_mdio_write(tp, 0x06, 0xd100);
-        rtl8168_mdio_write(tp, 0x06, 0xbf21);
-        rtl8168_mdio_write(tp, 0x06, 0xd502);
-        rtl8168_mdio_write(tp, 0x06, 0x3723);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xee86);
-        rtl8168_mdio_write(tp, 0x06, 0x0200);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x87ad);
-        rtl8168_mdio_write(tp, 0x06, 0x241e);
-        rtl8168_mdio_write(tp, 0x06, 0xe086);
-        rtl8168_mdio_write(tp, 0x06, 0x02a0);
-        rtl8168_mdio_write(tp, 0x06, 0x0005);
-        rtl8168_mdio_write(tp, 0x06, 0x0283);
-        rtl8168_mdio_write(tp, 0x06, 0xe8ae);
-        rtl8168_mdio_write(tp, 0x06, 0xf5a0);
-        rtl8168_mdio_write(tp, 0x06, 0x0105);
-        rtl8168_mdio_write(tp, 0x06, 0x0283);
-        rtl8168_mdio_write(tp, 0x06, 0xf8ae);
-        rtl8168_mdio_write(tp, 0x06, 0x0ba0);
-        rtl8168_mdio_write(tp, 0x06, 0x0205);
-        rtl8168_mdio_write(tp, 0x06, 0x0284);
-        rtl8168_mdio_write(tp, 0x06, 0x14ae);
-        rtl8168_mdio_write(tp, 0x06, 0x03a0);
-        rtl8168_mdio_write(tp, 0x06, 0x0300);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8fa);
-        rtl8168_mdio_write(tp, 0x06, 0xef69);
-        rtl8168_mdio_write(tp, 0x06, 0x0284);
-        rtl8168_mdio_write(tp, 0x06, 0x2bee);
-        rtl8168_mdio_write(tp, 0x06, 0x8602);
-        rtl8168_mdio_write(tp, 0x06, 0x01ef);
-        rtl8168_mdio_write(tp, 0x06, 0x96fe);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8609);
-        rtl8168_mdio_write(tp, 0x06, 0x0002);
-        rtl8168_mdio_write(tp, 0x06, 0x8461);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xae10);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8608);
-        rtl8168_mdio_write(tp, 0x06, 0xe186);
-        rtl8168_mdio_write(tp, 0x06, 0x091f);
-        rtl8168_mdio_write(tp, 0x06, 0x019e);
-        rtl8168_mdio_write(tp, 0x06, 0x0611);
-        rtl8168_mdio_write(tp, 0x06, 0xe586);
-        rtl8168_mdio_write(tp, 0x06, 0x09ae);
-        rtl8168_mdio_write(tp, 0x06, 0x04ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8602);
-        rtl8168_mdio_write(tp, 0x06, 0x01fc);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xf9fa);
-        rtl8168_mdio_write(tp, 0x06, 0xef69);
-        rtl8168_mdio_write(tp, 0x06, 0xfbbf);
-        rtl8168_mdio_write(tp, 0x06, 0x8604);
-        rtl8168_mdio_write(tp, 0x06, 0xef79);
-        rtl8168_mdio_write(tp, 0x06, 0xd200);
-        rtl8168_mdio_write(tp, 0x06, 0xd400);
-        rtl8168_mdio_write(tp, 0x06, 0x221e);
-        rtl8168_mdio_write(tp, 0x06, 0x02bf);
-        rtl8168_mdio_write(tp, 0x06, 0x2fec);
-        rtl8168_mdio_write(tp, 0x06, 0x0237);
-        rtl8168_mdio_write(tp, 0x06, 0x23bf);
-        rtl8168_mdio_write(tp, 0x06, 0x13f2);
-        rtl8168_mdio_write(tp, 0x06, 0x0236);
-        rtl8168_mdio_write(tp, 0x06, 0xf60d);
-        rtl8168_mdio_write(tp, 0x06, 0x4559);
-        rtl8168_mdio_write(tp, 0x06, 0x1fef);
-        rtl8168_mdio_write(tp, 0x06, 0x97dd);
-        rtl8168_mdio_write(tp, 0x06, 0xd308);
-        rtl8168_mdio_write(tp, 0x06, 0x1a93);
-        rtl8168_mdio_write(tp, 0x06, 0xdd12);
-        rtl8168_mdio_write(tp, 0x06, 0x17a2);
-        rtl8168_mdio_write(tp, 0x06, 0x04de);
-        rtl8168_mdio_write(tp, 0x06, 0xffef);
-        rtl8168_mdio_write(tp, 0x06, 0x96fe);
-        rtl8168_mdio_write(tp, 0x06, 0xfdfc);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xf9fa);
-        rtl8168_mdio_write(tp, 0x06, 0xef69);
-        rtl8168_mdio_write(tp, 0x06, 0xfbee);
-        rtl8168_mdio_write(tp, 0x06, 0x8602);
-        rtl8168_mdio_write(tp, 0x06, 0x03d5);
-        rtl8168_mdio_write(tp, 0x06, 0x0080);
-        rtl8168_mdio_write(tp, 0x06, 0xbf86);
-        rtl8168_mdio_write(tp, 0x06, 0x04ef);
-        rtl8168_mdio_write(tp, 0x06, 0x79ef);
-        rtl8168_mdio_write(tp, 0x06, 0x45bf);
-        rtl8168_mdio_write(tp, 0x06, 0x2fec);
-        rtl8168_mdio_write(tp, 0x06, 0x0237);
-        rtl8168_mdio_write(tp, 0x06, 0x23bf);
-        rtl8168_mdio_write(tp, 0x06, 0x13f2);
-        rtl8168_mdio_write(tp, 0x06, 0x0236);
-        rtl8168_mdio_write(tp, 0x06, 0xf6ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2702);
-        rtl8168_mdio_write(tp, 0x06, 0x78ff);
-        rtl8168_mdio_write(tp, 0x06, 0xe186);
-        rtl8168_mdio_write(tp, 0x06, 0x0a1b);
-        rtl8168_mdio_write(tp, 0x06, 0x01aa);
-        rtl8168_mdio_write(tp, 0x06, 0x2eef);
-        rtl8168_mdio_write(tp, 0x06, 0x97d9);
-        rtl8168_mdio_write(tp, 0x06, 0x7900);
-        rtl8168_mdio_write(tp, 0x06, 0x9e2b);
-        rtl8168_mdio_write(tp, 0x06, 0x81dd);
-        rtl8168_mdio_write(tp, 0x06, 0xbf85);
-        rtl8168_mdio_write(tp, 0x06, 0xad02);
-        rtl8168_mdio_write(tp, 0x06, 0x3723);
-        rtl8168_mdio_write(tp, 0x06, 0xd101);
-        rtl8168_mdio_write(tp, 0x06, 0xef02);
-        rtl8168_mdio_write(tp, 0x06, 0x100c);
-        rtl8168_mdio_write(tp, 0x06, 0x11b0);
-        rtl8168_mdio_write(tp, 0x06, 0xfc0d);
-        rtl8168_mdio_write(tp, 0x06, 0x11bf);
-        rtl8168_mdio_write(tp, 0x06, 0x85aa);
-        rtl8168_mdio_write(tp, 0x06, 0x0237);
-        rtl8168_mdio_write(tp, 0x06, 0x23d1);
-        rtl8168_mdio_write(tp, 0x06, 0x00bf);
-        rtl8168_mdio_write(tp, 0x06, 0x85aa);
-        rtl8168_mdio_write(tp, 0x06, 0x0237);
-        rtl8168_mdio_write(tp, 0x06, 0x23ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8602);
-        rtl8168_mdio_write(tp, 0x06, 0x02ae);
-        rtl8168_mdio_write(tp, 0x06, 0x0413);
-        rtl8168_mdio_write(tp, 0x06, 0xa38b);
-        rtl8168_mdio_write(tp, 0x06, 0xb4d3);
-        rtl8168_mdio_write(tp, 0x06, 0x8012);
-        rtl8168_mdio_write(tp, 0x06, 0x17a2);
-        rtl8168_mdio_write(tp, 0x06, 0x04ad);
-        rtl8168_mdio_write(tp, 0x06, 0xffef);
-        rtl8168_mdio_write(tp, 0x06, 0x96fe);
-        rtl8168_mdio_write(tp, 0x06, 0xfdfc);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xf9e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b85);
-        rtl8168_mdio_write(tp, 0x06, 0xad25);
-        rtl8168_mdio_write(tp, 0x06, 0x48e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8a96);
-        rtl8168_mdio_write(tp, 0x06, 0xe18a);
-        rtl8168_mdio_write(tp, 0x06, 0x977c);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x9e35);
-        rtl8168_mdio_write(tp, 0x06, 0xee8a);
-        rtl8168_mdio_write(tp, 0x06, 0x9600);
-        rtl8168_mdio_write(tp, 0x06, 0xee8a);
-        rtl8168_mdio_write(tp, 0x06, 0x9700);
-        rtl8168_mdio_write(tp, 0x06, 0xe08a);
-        rtl8168_mdio_write(tp, 0x06, 0xbee1);
-        rtl8168_mdio_write(tp, 0x06, 0x8abf);
-        rtl8168_mdio_write(tp, 0x06, 0xe286);
-        rtl8168_mdio_write(tp, 0x06, 0x10e3);
-        rtl8168_mdio_write(tp, 0x06, 0x8611);
-        rtl8168_mdio_write(tp, 0x06, 0x0236);
-        rtl8168_mdio_write(tp, 0x06, 0x1aad);
-        rtl8168_mdio_write(tp, 0x06, 0x2012);
-        rtl8168_mdio_write(tp, 0x06, 0xee8a);
-        rtl8168_mdio_write(tp, 0x06, 0x9603);
-        rtl8168_mdio_write(tp, 0x06, 0xee8a);
-        rtl8168_mdio_write(tp, 0x06, 0x97b7);
-        rtl8168_mdio_write(tp, 0x06, 0xee86);
-        rtl8168_mdio_write(tp, 0x06, 0x1000);
-        rtl8168_mdio_write(tp, 0x06, 0xee86);
-        rtl8168_mdio_write(tp, 0x06, 0x1100);
-        rtl8168_mdio_write(tp, 0x06, 0xae11);
-        rtl8168_mdio_write(tp, 0x06, 0x15e6);
-        rtl8168_mdio_write(tp, 0x06, 0x8610);
-        rtl8168_mdio_write(tp, 0x06, 0xe786);
-        rtl8168_mdio_write(tp, 0x06, 0x11ae);
-        rtl8168_mdio_write(tp, 0x06, 0x08ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8610);
-        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8611);
-        rtl8168_mdio_write(tp, 0x06, 0x00fd);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8fa);
-        rtl8168_mdio_write(tp, 0x06, 0xef69);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-        rtl8168_mdio_write(tp, 0x06, 0x00e1);
-        rtl8168_mdio_write(tp, 0x06, 0xe001);
-        rtl8168_mdio_write(tp, 0x06, 0xad27);
-        rtl8168_mdio_write(tp, 0x06, 0x32e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b40);
-        rtl8168_mdio_write(tp, 0x06, 0xf720);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x40bf);
-        rtl8168_mdio_write(tp, 0x06, 0x31f5);
-        rtl8168_mdio_write(tp, 0x06, 0x0236);
-        rtl8168_mdio_write(tp, 0x06, 0xf6ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2821);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-        rtl8168_mdio_write(tp, 0x06, 0x20e1);
-        rtl8168_mdio_write(tp, 0x06, 0xe021);
-        rtl8168_mdio_write(tp, 0x06, 0xad20);
-        rtl8168_mdio_write(tp, 0x06, 0x18e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b40);
-        rtl8168_mdio_write(tp, 0x06, 0xf620);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x40ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8b3b);
-        rtl8168_mdio_write(tp, 0x06, 0xffe0);
-        rtl8168_mdio_write(tp, 0x06, 0x8a8a);
-        rtl8168_mdio_write(tp, 0x06, 0xe18a);
-        rtl8168_mdio_write(tp, 0x06, 0x8be4);
-        rtl8168_mdio_write(tp, 0x06, 0xe000);
-        rtl8168_mdio_write(tp, 0x06, 0xe5e0);
-        rtl8168_mdio_write(tp, 0x06, 0x01ef);
-        rtl8168_mdio_write(tp, 0x06, 0x96fe);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8fa);
-        rtl8168_mdio_write(tp, 0x06, 0xef69);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x80ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2722);
-        rtl8168_mdio_write(tp, 0x06, 0xbf44);
-        rtl8168_mdio_write(tp, 0x06, 0xfc02);
-        rtl8168_mdio_write(tp, 0x06, 0x36f6);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x441f);
-        rtl8168_mdio_write(tp, 0x06, 0x019e);
-        rtl8168_mdio_write(tp, 0x06, 0x15e5);
-        rtl8168_mdio_write(tp, 0x06, 0x8b44);
-        rtl8168_mdio_write(tp, 0x06, 0xad29);
-        rtl8168_mdio_write(tp, 0x06, 0x07ac);
-        rtl8168_mdio_write(tp, 0x06, 0x2804);
-        rtl8168_mdio_write(tp, 0x06, 0xd101);
-        rtl8168_mdio_write(tp, 0x06, 0xae02);
-        rtl8168_mdio_write(tp, 0x06, 0xd100);
-        rtl8168_mdio_write(tp, 0x06, 0xbf85);
-        rtl8168_mdio_write(tp, 0x06, 0xb002);
-        rtl8168_mdio_write(tp, 0x06, 0x3723);
-        rtl8168_mdio_write(tp, 0x06, 0xef96);
-        rtl8168_mdio_write(tp, 0x06, 0xfefc);
-        rtl8168_mdio_write(tp, 0x06, 0x0400);
-        rtl8168_mdio_write(tp, 0x06, 0xe140);
-        rtl8168_mdio_write(tp, 0x06, 0x77e1);
-        rtl8168_mdio_write(tp, 0x06, 0x40dd);
-        rtl8168_mdio_write(tp, 0x06, 0xe022);
-        rtl8168_mdio_write(tp, 0x06, 0x32e1);
-        rtl8168_mdio_write(tp, 0x06, 0x5074);
-        rtl8168_mdio_write(tp, 0x06, 0xe144);
-        rtl8168_mdio_write(tp, 0x06, 0xffe0);
-        rtl8168_mdio_write(tp, 0x06, 0xdaff);
-        rtl8168_mdio_write(tp, 0x06, 0xe0c0);
-        rtl8168_mdio_write(tp, 0x06, 0x52e0);
-        rtl8168_mdio_write(tp, 0x06, 0xeed9);
-        rtl8168_mdio_write(tp, 0x06, 0xe04c);
-        rtl8168_mdio_write(tp, 0x06, 0xbbe0);
-        rtl8168_mdio_write(tp, 0x06, 0x2a00);
-        rtl8168_mdio_write(tp, 0x05, 0xe142);
-        gphy_val = rtl8168_mdio_read(tp, 0x06);
-        gphy_val |= BIT_0;
-        rtl8168_mdio_write(tp, 0x06, gphy_val);
-        rtl8168_mdio_write(tp, 0x05, 0xe140);
-        gphy_val = rtl8168_mdio_read(tp, 0x06);
-        gphy_val |= BIT_0;
-        rtl8168_mdio_write(tp, 0x06, gphy_val);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-        for (i = 0; i < 200; i++) {
-                udelay(100);
-                gphy_val = rtl8168_mdio_read(tp, 0x00);
-                if (gphy_val & BIT_7)
-                        break;
-        }
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1e, 0x0042);
-        rtl8168_mdio_write(tp, 0x18, 0x2300);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1e, 0x0023);
-        if (tp->RequiredSecLanDonglePatch) {
-                gphy_val = rtl8168_mdio_read(tp, 0x17);
-                gphy_val &= ~BIT_2;
-                rtl8168_mdio_write(tp, 0x17, gphy_val);
-        }
-
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x00, 0x9200);
-}
-
-static void
-rtl8168_set_phy_mcu_8168f_1(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        unsigned int gphy_val,i;
-
-        rtl8168_mdio_write(tp,0x1f, 0x0000);
-        rtl8168_mdio_write(tp,0x00, 0x1800);
-        gphy_val = rtl8168_mdio_read(tp, 0x15);
-        gphy_val &= ~(BIT_12);
-        rtl8168_mdio_write(tp,0x15, gphy_val);
-        rtl8168_mdio_write(tp,0x00, 0x4800);
-        rtl8168_mdio_write(tp,0x1f, 0x0007);
-        rtl8168_mdio_write(tp,0x1e, 0x002f);
-        for (i = 0; i < 1000; i++) {
-                udelay(100);
-                gphy_val = rtl8168_mdio_read(tp, 0x1c);
-                if (gphy_val & 0x0080)
-                        break;
-        }
-        rtl8168_mdio_write(tp,0x1f, 0x0000);
-        rtl8168_mdio_write(tp,0x00, 0x1800);
-        rtl8168_mdio_write(tp,0x1f, 0x0007);
-        rtl8168_mdio_write(tp,0x1e, 0x0023);
-        for (i = 0; i < 200; i++) {
-                udelay(100);
-                gphy_val = rtl8168_mdio_read(tp, 0x18);
-                if (!(gphy_val & 0x0001))
-                        break;
-        }
-        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-        rtl8168_mdio_write(tp, 0x05, 0xfff6);
-        rtl8168_mdio_write(tp, 0x06, 0x0080);
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1e, 0x0023);
-        rtl8168_mdio_write(tp, 0x16, 0x0306);
-        rtl8168_mdio_write(tp, 0x16, 0x0307);
-        rtl8168_mdio_write(tp, 0x15, 0x0194);
-        rtl8168_mdio_write(tp, 0x19, 0x407D);
-        rtl8168_mdio_write(tp, 0x15, 0x0098);
-        rtl8168_mdio_write(tp, 0x19, 0x7c0b);
-        rtl8168_mdio_write(tp, 0x15, 0x0099);
-        rtl8168_mdio_write(tp, 0x19, 0x6c0b);
-        rtl8168_mdio_write(tp, 0x15, 0x00eb);
-        rtl8168_mdio_write(tp, 0x19, 0x6c0b);
-        rtl8168_mdio_write(tp, 0x15, 0x00f8);
-        rtl8168_mdio_write(tp, 0x19, 0x6f0b);
-        rtl8168_mdio_write(tp, 0x15, 0x00fe);
-        rtl8168_mdio_write(tp, 0x19, 0x6f0f);
-        rtl8168_mdio_write(tp, 0x15, 0x00db);
-        rtl8168_mdio_write(tp, 0x19, 0x6f09);
-        rtl8168_mdio_write(tp, 0x15, 0x00dc);
-        rtl8168_mdio_write(tp, 0x19, 0xaefd);
-        rtl8168_mdio_write(tp, 0x15, 0x00dd);
-        rtl8168_mdio_write(tp, 0x19, 0x6f0b);
-        rtl8168_mdio_write(tp, 0x15, 0x00de);
-        rtl8168_mdio_write(tp, 0x19, 0xc60b);
-        rtl8168_mdio_write(tp, 0x15, 0x00df);
-        rtl8168_mdio_write(tp, 0x19, 0x00fa);
-        rtl8168_mdio_write(tp, 0x15, 0x00e0);
-        rtl8168_mdio_write(tp, 0x19, 0x30e1);
-        rtl8168_mdio_write(tp, 0x15, 0x020c);
-        rtl8168_mdio_write(tp, 0x19, 0x3224);
-        rtl8168_mdio_write(tp, 0x15, 0x020e);
-        rtl8168_mdio_write(tp, 0x19, 0x9813);
-        rtl8168_mdio_write(tp, 0x15, 0x020f);
-        rtl8168_mdio_write(tp, 0x19, 0x7801);
-        rtl8168_mdio_write(tp, 0x15, 0x0210);
-        rtl8168_mdio_write(tp, 0x19, 0x930f);
-        rtl8168_mdio_write(tp, 0x15, 0x0211);
-        rtl8168_mdio_write(tp, 0x19, 0x9206);
-        rtl8168_mdio_write(tp, 0x15, 0x0212);
-        rtl8168_mdio_write(tp, 0x19, 0x4002);
-        rtl8168_mdio_write(tp, 0x15, 0x0213);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x0214);
-        rtl8168_mdio_write(tp, 0x19, 0x588f);
-        rtl8168_mdio_write(tp, 0x15, 0x0215);
-        rtl8168_mdio_write(tp, 0x19, 0x5520);
-        rtl8168_mdio_write(tp, 0x15, 0x0216);
-        rtl8168_mdio_write(tp, 0x19, 0x3224);
-        rtl8168_mdio_write(tp, 0x15, 0x0217);
-        rtl8168_mdio_write(tp, 0x19, 0x4002);
-        rtl8168_mdio_write(tp, 0x15, 0x0218);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x0219);
-        rtl8168_mdio_write(tp, 0x19, 0x588d);
-        rtl8168_mdio_write(tp, 0x15, 0x021a);
-        rtl8168_mdio_write(tp, 0x19, 0x5540);
-        rtl8168_mdio_write(tp, 0x15, 0x021b);
-        rtl8168_mdio_write(tp, 0x19, 0x9e03);
-        rtl8168_mdio_write(tp, 0x15, 0x021c);
-        rtl8168_mdio_write(tp, 0x19, 0x7c40);
-        rtl8168_mdio_write(tp, 0x15, 0x021d);
-        rtl8168_mdio_write(tp, 0x19, 0x6840);
-        rtl8168_mdio_write(tp, 0x15, 0x021e);
-        rtl8168_mdio_write(tp, 0x19, 0x3224);
-        rtl8168_mdio_write(tp, 0x15, 0x021f);
-        rtl8168_mdio_write(tp, 0x19, 0x4002);
-        rtl8168_mdio_write(tp, 0x15, 0x0220);
-        rtl8168_mdio_write(tp, 0x19, 0x3224);
-        rtl8168_mdio_write(tp, 0x15, 0x0221);
-        rtl8168_mdio_write(tp, 0x19, 0x9e03);
-        rtl8168_mdio_write(tp, 0x15, 0x0222);
-        rtl8168_mdio_write(tp, 0x19, 0x7c40);
-        rtl8168_mdio_write(tp, 0x15, 0x0223);
-        rtl8168_mdio_write(tp, 0x19, 0x6840);
-        rtl8168_mdio_write(tp, 0x15, 0x0224);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x0225);
-        rtl8168_mdio_write(tp, 0x19, 0x3231);
-        rtl8168_mdio_write(tp, 0x15, 0x0000);
-        rtl8168_mdio_write(tp, 0x16, 0x0306);
-        rtl8168_mdio_write(tp, 0x16, 0x0300);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-        rtl8168_mdio_write(tp, 0x05, 0xfff6);
-        rtl8168_mdio_write(tp, 0x06, 0x0080);
-        rtl8168_mdio_write(tp, 0x05, 0x8000);
-        rtl8168_mdio_write(tp, 0x06, 0x0280);
-        rtl8168_mdio_write(tp, 0x06, 0x48f7);
-        rtl8168_mdio_write(tp, 0x06, 0x00e0);
-        rtl8168_mdio_write(tp, 0x06, 0xfff7);
-        rtl8168_mdio_write(tp, 0x06, 0xa080);
-        rtl8168_mdio_write(tp, 0x06, 0x02ae);
-        rtl8168_mdio_write(tp, 0x06, 0xf602);
-        rtl8168_mdio_write(tp, 0x06, 0x0118);
-        rtl8168_mdio_write(tp, 0x06, 0x0201);
-        rtl8168_mdio_write(tp, 0x06, 0x2502);
-        rtl8168_mdio_write(tp, 0x06, 0x8090);
-        rtl8168_mdio_write(tp, 0x06, 0x0201);
-        rtl8168_mdio_write(tp, 0x06, 0x4202);
-        rtl8168_mdio_write(tp, 0x06, 0x015c);
-        rtl8168_mdio_write(tp, 0x06, 0x0280);
-        rtl8168_mdio_write(tp, 0x06, 0xad02);
-        rtl8168_mdio_write(tp, 0x06, 0x80ca);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x88e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b89);
-        rtl8168_mdio_write(tp, 0x06, 0x1e01);
-        rtl8168_mdio_write(tp, 0x06, 0xe18b);
-        rtl8168_mdio_write(tp, 0x06, 0x8a1e);
-        rtl8168_mdio_write(tp, 0x06, 0x01e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8b);
-        rtl8168_mdio_write(tp, 0x06, 0x1e01);
-        rtl8168_mdio_write(tp, 0x06, 0xe18b);
-        rtl8168_mdio_write(tp, 0x06, 0x8c1e);
-        rtl8168_mdio_write(tp, 0x06, 0x01e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
-        rtl8168_mdio_write(tp, 0x06, 0x1e01);
-        rtl8168_mdio_write(tp, 0x06, 0xe18b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e1e);
-        rtl8168_mdio_write(tp, 0x06, 0x01a0);
-        rtl8168_mdio_write(tp, 0x06, 0x00c7);
-        rtl8168_mdio_write(tp, 0x06, 0xaebb);
-        rtl8168_mdio_write(tp, 0x06, 0xd484);
-        rtl8168_mdio_write(tp, 0x06, 0x3ce4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b92);
-        rtl8168_mdio_write(tp, 0x06, 0xe58b);
-        rtl8168_mdio_write(tp, 0x06, 0x93ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac8);
-        rtl8168_mdio_write(tp, 0x06, 0x03ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8aca);
-        rtl8168_mdio_write(tp, 0x06, 0x60ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac0);
-        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac1);
-        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8abe);
-        rtl8168_mdio_write(tp, 0x06, 0x07ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8abf);
-        rtl8168_mdio_write(tp, 0x06, 0x73ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8a95);
-        rtl8168_mdio_write(tp, 0x06, 0x02bf);
-        rtl8168_mdio_write(tp, 0x06, 0x8b88);
-        rtl8168_mdio_write(tp, 0x06, 0xec00);
-        rtl8168_mdio_write(tp, 0x06, 0x19a9);
-        rtl8168_mdio_write(tp, 0x06, 0x8b90);
-        rtl8168_mdio_write(tp, 0x06, 0xf9ee);
-        rtl8168_mdio_write(tp, 0x06, 0xfff6);
-        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-        rtl8168_mdio_write(tp, 0x06, 0xfff7);
-        rtl8168_mdio_write(tp, 0x06, 0xfed1);
-        rtl8168_mdio_write(tp, 0x06, 0x00bf);
-        rtl8168_mdio_write(tp, 0x06, 0x85a4);
-        rtl8168_mdio_write(tp, 0x06, 0x0238);
-        rtl8168_mdio_write(tp, 0x06, 0x7dd1);
-        rtl8168_mdio_write(tp, 0x06, 0x01bf);
-        rtl8168_mdio_write(tp, 0x06, 0x85a7);
-        rtl8168_mdio_write(tp, 0x06, 0x0238);
-        rtl8168_mdio_write(tp, 0x06, 0x7d04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8a);
-        rtl8168_mdio_write(tp, 0x06, 0xad20);
-        rtl8168_mdio_write(tp, 0x06, 0x14ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8a);
-        rtl8168_mdio_write(tp, 0x06, 0x0002);
-        rtl8168_mdio_write(tp, 0x06, 0x204b);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e4);
-        rtl8168_mdio_write(tp, 0x06, 0x26e1);
-        rtl8168_mdio_write(tp, 0x06, 0xe427);
-        rtl8168_mdio_write(tp, 0x06, 0xeee4);
-        rtl8168_mdio_write(tp, 0x06, 0x2623);
-        rtl8168_mdio_write(tp, 0x06, 0xe5e4);
-        rtl8168_mdio_write(tp, 0x06, 0x27fc);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8dad);
-        rtl8168_mdio_write(tp, 0x06, 0x2014);
-        rtl8168_mdio_write(tp, 0x06, 0xee8b);
-        rtl8168_mdio_write(tp, 0x06, 0x8d00);
-        rtl8168_mdio_write(tp, 0x06, 0xe08a);
-        rtl8168_mdio_write(tp, 0x06, 0x5a78);
-        rtl8168_mdio_write(tp, 0x06, 0x039e);
-        rtl8168_mdio_write(tp, 0x06, 0x0902);
-        rtl8168_mdio_write(tp, 0x06, 0x05e8);
-        rtl8168_mdio_write(tp, 0x06, 0x0281);
-        rtl8168_mdio_write(tp, 0x06, 0x4f02);
-        rtl8168_mdio_write(tp, 0x06, 0x326c);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xad20);
-        rtl8168_mdio_write(tp, 0x06, 0x1df6);
-        rtl8168_mdio_write(tp, 0x06, 0x20e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0x022f);
-        rtl8168_mdio_write(tp, 0x06, 0x0902);
-        rtl8168_mdio_write(tp, 0x06, 0x2ab0);
-        rtl8168_mdio_write(tp, 0x06, 0x0285);
-        rtl8168_mdio_write(tp, 0x06, 0x1602);
-        rtl8168_mdio_write(tp, 0x06, 0x03ba);
-        rtl8168_mdio_write(tp, 0x06, 0x0284);
-        rtl8168_mdio_write(tp, 0x06, 0xe502);
-        rtl8168_mdio_write(tp, 0x06, 0x2df1);
-        rtl8168_mdio_write(tp, 0x06, 0x0283);
-        rtl8168_mdio_write(tp, 0x06, 0x8302);
-        rtl8168_mdio_write(tp, 0x06, 0x0475);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ead);
-        rtl8168_mdio_write(tp, 0x06, 0x210b);
-        rtl8168_mdio_write(tp, 0x06, 0xf621);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e02);
-        rtl8168_mdio_write(tp, 0x06, 0x83f8);
-        rtl8168_mdio_write(tp, 0x06, 0x021c);
-        rtl8168_mdio_write(tp, 0x06, 0x99e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xad22);
-        rtl8168_mdio_write(tp, 0x06, 0x08f6);
-        rtl8168_mdio_write(tp, 0x06, 0x22e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0x0235);
-        rtl8168_mdio_write(tp, 0x06, 0x63e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xad23);
-        rtl8168_mdio_write(tp, 0x06, 0x08f6);
-        rtl8168_mdio_write(tp, 0x06, 0x23e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0x0231);
-        rtl8168_mdio_write(tp, 0x06, 0x57e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xad24);
-        rtl8168_mdio_write(tp, 0x06, 0x05f6);
-        rtl8168_mdio_write(tp, 0x06, 0x24e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ead);
-        rtl8168_mdio_write(tp, 0x06, 0x2505);
-        rtl8168_mdio_write(tp, 0x06, 0xf625);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ee0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xad26);
-        rtl8168_mdio_write(tp, 0x06, 0x08f6);
-        rtl8168_mdio_write(tp, 0x06, 0x26e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0x022d);
-        rtl8168_mdio_write(tp, 0x06, 0x1ce0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xad27);
-        rtl8168_mdio_write(tp, 0x06, 0x05f6);
-        rtl8168_mdio_write(tp, 0x06, 0x27e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0x0203);
-        rtl8168_mdio_write(tp, 0x06, 0x80fc);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xf9e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b81);
-        rtl8168_mdio_write(tp, 0x06, 0xac26);
-        rtl8168_mdio_write(tp, 0x06, 0x1ae0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b81);
-        rtl8168_mdio_write(tp, 0x06, 0xac21);
-        rtl8168_mdio_write(tp, 0x06, 0x14e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b85);
-        rtl8168_mdio_write(tp, 0x06, 0xac20);
-        rtl8168_mdio_write(tp, 0x06, 0x0ee0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b85);
-        rtl8168_mdio_write(tp, 0x06, 0xac23);
-        rtl8168_mdio_write(tp, 0x06, 0x08e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b87);
-        rtl8168_mdio_write(tp, 0x06, 0xac24);
-        rtl8168_mdio_write(tp, 0x06, 0x02ae);
-        rtl8168_mdio_write(tp, 0x06, 0x3802);
-        rtl8168_mdio_write(tp, 0x06, 0x1ac2);
-        rtl8168_mdio_write(tp, 0x06, 0xeee4);
-        rtl8168_mdio_write(tp, 0x06, 0x1c04);
-        rtl8168_mdio_write(tp, 0x06, 0xeee4);
-        rtl8168_mdio_write(tp, 0x06, 0x1d04);
-        rtl8168_mdio_write(tp, 0x06, 0xe2e0);
-        rtl8168_mdio_write(tp, 0x06, 0x7ce3);
-        rtl8168_mdio_write(tp, 0x06, 0xe07d);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-        rtl8168_mdio_write(tp, 0x06, 0x38e1);
-        rtl8168_mdio_write(tp, 0x06, 0xe039);
-        rtl8168_mdio_write(tp, 0x06, 0xad2e);
-        rtl8168_mdio_write(tp, 0x06, 0x1bad);
-        rtl8168_mdio_write(tp, 0x06, 0x390d);
-        rtl8168_mdio_write(tp, 0x06, 0xd101);
-        rtl8168_mdio_write(tp, 0x06, 0xbf22);
-        rtl8168_mdio_write(tp, 0x06, 0x7a02);
-        rtl8168_mdio_write(tp, 0x06, 0x387d);
-        rtl8168_mdio_write(tp, 0x06, 0x0281);
-        rtl8168_mdio_write(tp, 0x06, 0xacae);
-        rtl8168_mdio_write(tp, 0x06, 0x0bac);
-        rtl8168_mdio_write(tp, 0x06, 0x3802);
-        rtl8168_mdio_write(tp, 0x06, 0xae06);
-        rtl8168_mdio_write(tp, 0x06, 0x0281);
-        rtl8168_mdio_write(tp, 0x06, 0xe902);
-        rtl8168_mdio_write(tp, 0x06, 0x822e);
-        rtl8168_mdio_write(tp, 0x06, 0x021a);
-        rtl8168_mdio_write(tp, 0x06, 0xd3fd);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8af4);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x81ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2602);
-        rtl8168_mdio_write(tp, 0x06, 0xf728);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x81ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2105);
-        rtl8168_mdio_write(tp, 0x06, 0x0222);
-        rtl8168_mdio_write(tp, 0x06, 0x8ef7);
-        rtl8168_mdio_write(tp, 0x06, 0x29e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b85);
-        rtl8168_mdio_write(tp, 0x06, 0xad20);
-        rtl8168_mdio_write(tp, 0x06, 0x0502);
-        rtl8168_mdio_write(tp, 0x06, 0x14b8);
-        rtl8168_mdio_write(tp, 0x06, 0xf72a);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x85ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2305);
-        rtl8168_mdio_write(tp, 0x06, 0x0212);
-        rtl8168_mdio_write(tp, 0x06, 0xf4f7);
-        rtl8168_mdio_write(tp, 0x06, 0x2be0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b87);
-        rtl8168_mdio_write(tp, 0x06, 0xad24);
-        rtl8168_mdio_write(tp, 0x06, 0x0502);
-        rtl8168_mdio_write(tp, 0x06, 0x8284);
-        rtl8168_mdio_write(tp, 0x06, 0xf72c);
-        rtl8168_mdio_write(tp, 0x06, 0xe58a);
-        rtl8168_mdio_write(tp, 0x06, 0xf4fc);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x81ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2600);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x81ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2109);
-        rtl8168_mdio_write(tp, 0x06, 0xe08a);
-        rtl8168_mdio_write(tp, 0x06, 0xf4ac);
-        rtl8168_mdio_write(tp, 0x06, 0x2003);
-        rtl8168_mdio_write(tp, 0x06, 0x0222);
-        rtl8168_mdio_write(tp, 0x06, 0x7de0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b85);
-        rtl8168_mdio_write(tp, 0x06, 0xad20);
-        rtl8168_mdio_write(tp, 0x06, 0x09e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8af4);
-        rtl8168_mdio_write(tp, 0x06, 0xac21);
-        rtl8168_mdio_write(tp, 0x06, 0x0302);
-        rtl8168_mdio_write(tp, 0x06, 0x1408);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x85ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2309);
-        rtl8168_mdio_write(tp, 0x06, 0xe08a);
-        rtl8168_mdio_write(tp, 0x06, 0xf4ac);
-        rtl8168_mdio_write(tp, 0x06, 0x2203);
-        rtl8168_mdio_write(tp, 0x06, 0x0213);
-        rtl8168_mdio_write(tp, 0x06, 0x07e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b87);
-        rtl8168_mdio_write(tp, 0x06, 0xad24);
-        rtl8168_mdio_write(tp, 0x06, 0x09e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8af4);
-        rtl8168_mdio_write(tp, 0x06, 0xac23);
-        rtl8168_mdio_write(tp, 0x06, 0x0302);
-        rtl8168_mdio_write(tp, 0x06, 0x8289);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8af4);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x81ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2602);
-        rtl8168_mdio_write(tp, 0x06, 0xf628);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x81ad);
-        rtl8168_mdio_write(tp, 0x06, 0x210a);
-        rtl8168_mdio_write(tp, 0x06, 0xe083);
-        rtl8168_mdio_write(tp, 0x06, 0xecf6);
-        rtl8168_mdio_write(tp, 0x06, 0x27a0);
-        rtl8168_mdio_write(tp, 0x06, 0x0502);
-        rtl8168_mdio_write(tp, 0x06, 0xf629);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x85ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2008);
-        rtl8168_mdio_write(tp, 0x06, 0xe08a);
-        rtl8168_mdio_write(tp, 0x06, 0xe8ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2102);
-        rtl8168_mdio_write(tp, 0x06, 0xf62a);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x85ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2308);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x20a0);
-        rtl8168_mdio_write(tp, 0x06, 0x0302);
-        rtl8168_mdio_write(tp, 0x06, 0xf62b);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x87ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2408);
-        rtl8168_mdio_write(tp, 0x06, 0xe08a);
-        rtl8168_mdio_write(tp, 0x06, 0xc2a0);
-        rtl8168_mdio_write(tp, 0x06, 0x0302);
-        rtl8168_mdio_write(tp, 0x06, 0xf62c);
-        rtl8168_mdio_write(tp, 0x06, 0xe58a);
-        rtl8168_mdio_write(tp, 0x06, 0xf4a1);
-        rtl8168_mdio_write(tp, 0x06, 0x0008);
-        rtl8168_mdio_write(tp, 0x06, 0xd100);
-        rtl8168_mdio_write(tp, 0x06, 0xbf22);
-        rtl8168_mdio_write(tp, 0x06, 0x7a02);
-        rtl8168_mdio_write(tp, 0x06, 0x387d);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xee8a);
-        rtl8168_mdio_write(tp, 0x06, 0xc200);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x87ad);
-        rtl8168_mdio_write(tp, 0x06, 0x241e);
-        rtl8168_mdio_write(tp, 0x06, 0xe08a);
-        rtl8168_mdio_write(tp, 0x06, 0xc2a0);
-        rtl8168_mdio_write(tp, 0x06, 0x0005);
-        rtl8168_mdio_write(tp, 0x06, 0x0282);
-        rtl8168_mdio_write(tp, 0x06, 0xb0ae);
-        rtl8168_mdio_write(tp, 0x06, 0xf5a0);
-        rtl8168_mdio_write(tp, 0x06, 0x0105);
-        rtl8168_mdio_write(tp, 0x06, 0x0282);
-        rtl8168_mdio_write(tp, 0x06, 0xc0ae);
-        rtl8168_mdio_write(tp, 0x06, 0x0ba0);
-        rtl8168_mdio_write(tp, 0x06, 0x0205);
-        rtl8168_mdio_write(tp, 0x06, 0x0282);
-        rtl8168_mdio_write(tp, 0x06, 0xcaae);
-        rtl8168_mdio_write(tp, 0x06, 0x03a0);
-        rtl8168_mdio_write(tp, 0x06, 0x0300);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8fa);
-        rtl8168_mdio_write(tp, 0x06, 0xef69);
-        rtl8168_mdio_write(tp, 0x06, 0x0282);
-        rtl8168_mdio_write(tp, 0x06, 0xe1ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac2);
-        rtl8168_mdio_write(tp, 0x06, 0x01ef);
-        rtl8168_mdio_write(tp, 0x06, 0x96fe);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac9);
-        rtl8168_mdio_write(tp, 0x06, 0x0002);
-        rtl8168_mdio_write(tp, 0x06, 0x8317);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac8);
-        rtl8168_mdio_write(tp, 0x06, 0xe18a);
-        rtl8168_mdio_write(tp, 0x06, 0xc91f);
-        rtl8168_mdio_write(tp, 0x06, 0x019e);
-        rtl8168_mdio_write(tp, 0x06, 0x0611);
-        rtl8168_mdio_write(tp, 0x06, 0xe58a);
-        rtl8168_mdio_write(tp, 0x06, 0xc9ae);
-        rtl8168_mdio_write(tp, 0x06, 0x04ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac2);
-        rtl8168_mdio_write(tp, 0x06, 0x01fc);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xf9fa);
-        rtl8168_mdio_write(tp, 0x06, 0xef69);
-        rtl8168_mdio_write(tp, 0x06, 0xfbbf);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac4);
-        rtl8168_mdio_write(tp, 0x06, 0xef79);
-        rtl8168_mdio_write(tp, 0x06, 0xd200);
-        rtl8168_mdio_write(tp, 0x06, 0xd400);
-        rtl8168_mdio_write(tp, 0x06, 0x221e);
-        rtl8168_mdio_write(tp, 0x06, 0x02bf);
-        rtl8168_mdio_write(tp, 0x06, 0x3024);
-        rtl8168_mdio_write(tp, 0x06, 0x0238);
-        rtl8168_mdio_write(tp, 0x06, 0x7dbf);
-        rtl8168_mdio_write(tp, 0x06, 0x13ff);
-        rtl8168_mdio_write(tp, 0x06, 0x0238);
-        rtl8168_mdio_write(tp, 0x06, 0x500d);
-        rtl8168_mdio_write(tp, 0x06, 0x4559);
-        rtl8168_mdio_write(tp, 0x06, 0x1fef);
-        rtl8168_mdio_write(tp, 0x06, 0x97dd);
-        rtl8168_mdio_write(tp, 0x06, 0xd308);
-        rtl8168_mdio_write(tp, 0x06, 0x1a93);
-        rtl8168_mdio_write(tp, 0x06, 0xdd12);
-        rtl8168_mdio_write(tp, 0x06, 0x17a2);
-        rtl8168_mdio_write(tp, 0x06, 0x04de);
-        rtl8168_mdio_write(tp, 0x06, 0xffef);
-        rtl8168_mdio_write(tp, 0x06, 0x96fe);
-        rtl8168_mdio_write(tp, 0x06, 0xfdfc);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xf9fa);
-        rtl8168_mdio_write(tp, 0x06, 0xef69);
-        rtl8168_mdio_write(tp, 0x06, 0xfbee);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac2);
-        rtl8168_mdio_write(tp, 0x06, 0x03d5);
-        rtl8168_mdio_write(tp, 0x06, 0x0080);
-        rtl8168_mdio_write(tp, 0x06, 0xbf8a);
-        rtl8168_mdio_write(tp, 0x06, 0xc4ef);
-        rtl8168_mdio_write(tp, 0x06, 0x79ef);
-        rtl8168_mdio_write(tp, 0x06, 0x45bf);
-        rtl8168_mdio_write(tp, 0x06, 0x3024);
-        rtl8168_mdio_write(tp, 0x06, 0x0238);
-        rtl8168_mdio_write(tp, 0x06, 0x7dbf);
-        rtl8168_mdio_write(tp, 0x06, 0x13ff);
-        rtl8168_mdio_write(tp, 0x06, 0x0238);
-        rtl8168_mdio_write(tp, 0x06, 0x50ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2702);
-        rtl8168_mdio_write(tp, 0x06, 0x78ff);
-        rtl8168_mdio_write(tp, 0x06, 0xe18a);
-        rtl8168_mdio_write(tp, 0x06, 0xca1b);
-        rtl8168_mdio_write(tp, 0x06, 0x01aa);
-        rtl8168_mdio_write(tp, 0x06, 0x2eef);
-        rtl8168_mdio_write(tp, 0x06, 0x97d9);
-        rtl8168_mdio_write(tp, 0x06, 0x7900);
-        rtl8168_mdio_write(tp, 0x06, 0x9e2b);
-        rtl8168_mdio_write(tp, 0x06, 0x81dd);
-        rtl8168_mdio_write(tp, 0x06, 0xbf85);
-        rtl8168_mdio_write(tp, 0x06, 0xad02);
-        rtl8168_mdio_write(tp, 0x06, 0x387d);
-        rtl8168_mdio_write(tp, 0x06, 0xd101);
-        rtl8168_mdio_write(tp, 0x06, 0xef02);
-        rtl8168_mdio_write(tp, 0x06, 0x100c);
-        rtl8168_mdio_write(tp, 0x06, 0x11b0);
-        rtl8168_mdio_write(tp, 0x06, 0xfc0d);
-        rtl8168_mdio_write(tp, 0x06, 0x11bf);
-        rtl8168_mdio_write(tp, 0x06, 0x85aa);
-        rtl8168_mdio_write(tp, 0x06, 0x0238);
-        rtl8168_mdio_write(tp, 0x06, 0x7dd1);
-        rtl8168_mdio_write(tp, 0x06, 0x00bf);
-        rtl8168_mdio_write(tp, 0x06, 0x85aa);
-        rtl8168_mdio_write(tp, 0x06, 0x0238);
-        rtl8168_mdio_write(tp, 0x06, 0x7dee);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac2);
-        rtl8168_mdio_write(tp, 0x06, 0x02ae);
-        rtl8168_mdio_write(tp, 0x06, 0x0413);
-        rtl8168_mdio_write(tp, 0x06, 0xa38b);
-        rtl8168_mdio_write(tp, 0x06, 0xb4d3);
-        rtl8168_mdio_write(tp, 0x06, 0x8012);
-        rtl8168_mdio_write(tp, 0x06, 0x17a2);
-        rtl8168_mdio_write(tp, 0x06, 0x04ad);
-        rtl8168_mdio_write(tp, 0x06, 0xffef);
-        rtl8168_mdio_write(tp, 0x06, 0x96fe);
-        rtl8168_mdio_write(tp, 0x06, 0xfdfc);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xf9e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b85);
-        rtl8168_mdio_write(tp, 0x06, 0xad25);
-        rtl8168_mdio_write(tp, 0x06, 0x48e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8a96);
-        rtl8168_mdio_write(tp, 0x06, 0xe18a);
-        rtl8168_mdio_write(tp, 0x06, 0x977c);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x9e35);
-        rtl8168_mdio_write(tp, 0x06, 0xee8a);
-        rtl8168_mdio_write(tp, 0x06, 0x9600);
-        rtl8168_mdio_write(tp, 0x06, 0xee8a);
-        rtl8168_mdio_write(tp, 0x06, 0x9700);
-        rtl8168_mdio_write(tp, 0x06, 0xe08a);
-        rtl8168_mdio_write(tp, 0x06, 0xbee1);
-        rtl8168_mdio_write(tp, 0x06, 0x8abf);
-        rtl8168_mdio_write(tp, 0x06, 0xe28a);
-        rtl8168_mdio_write(tp, 0x06, 0xc0e3);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac1);
-        rtl8168_mdio_write(tp, 0x06, 0x0237);
-        rtl8168_mdio_write(tp, 0x06, 0x74ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2012);
-        rtl8168_mdio_write(tp, 0x06, 0xee8a);
-        rtl8168_mdio_write(tp, 0x06, 0x9603);
-        rtl8168_mdio_write(tp, 0x06, 0xee8a);
-        rtl8168_mdio_write(tp, 0x06, 0x97b7);
-        rtl8168_mdio_write(tp, 0x06, 0xee8a);
-        rtl8168_mdio_write(tp, 0x06, 0xc000);
-        rtl8168_mdio_write(tp, 0x06, 0xee8a);
-        rtl8168_mdio_write(tp, 0x06, 0xc100);
-        rtl8168_mdio_write(tp, 0x06, 0xae11);
-        rtl8168_mdio_write(tp, 0x06, 0x15e6);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac0);
-        rtl8168_mdio_write(tp, 0x06, 0xe78a);
-        rtl8168_mdio_write(tp, 0x06, 0xc1ae);
-        rtl8168_mdio_write(tp, 0x06, 0x08ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac0);
-        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8ac1);
-        rtl8168_mdio_write(tp, 0x06, 0x00fd);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xae20);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0x0000);
-        rtl8168_mdio_write(tp, 0x06, 0xf8fa);
-        rtl8168_mdio_write(tp, 0x06, 0xef69);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-        rtl8168_mdio_write(tp, 0x06, 0x00e1);
-        rtl8168_mdio_write(tp, 0x06, 0xe001);
-        rtl8168_mdio_write(tp, 0x06, 0xad27);
-        rtl8168_mdio_write(tp, 0x06, 0x32e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b40);
-        rtl8168_mdio_write(tp, 0x06, 0xf720);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x40bf);
-        rtl8168_mdio_write(tp, 0x06, 0x3230);
-        rtl8168_mdio_write(tp, 0x06, 0x0238);
-        rtl8168_mdio_write(tp, 0x06, 0x50ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2821);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-        rtl8168_mdio_write(tp, 0x06, 0x20e1);
-        rtl8168_mdio_write(tp, 0x06, 0xe021);
-        rtl8168_mdio_write(tp, 0x06, 0xad20);
-        rtl8168_mdio_write(tp, 0x06, 0x18e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b40);
-        rtl8168_mdio_write(tp, 0x06, 0xf620);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x40ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8b3b);
-        rtl8168_mdio_write(tp, 0x06, 0xffe0);
-        rtl8168_mdio_write(tp, 0x06, 0x8a8a);
-        rtl8168_mdio_write(tp, 0x06, 0xe18a);
-        rtl8168_mdio_write(tp, 0x06, 0x8be4);
-        rtl8168_mdio_write(tp, 0x06, 0xe000);
-        rtl8168_mdio_write(tp, 0x06, 0xe5e0);
-        rtl8168_mdio_write(tp, 0x06, 0x01ef);
-        rtl8168_mdio_write(tp, 0x06, 0x96fe);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8f9);
-        rtl8168_mdio_write(tp, 0x06, 0xface);
-        rtl8168_mdio_write(tp, 0x06, 0xfaef);
-        rtl8168_mdio_write(tp, 0x06, 0x69fa);
-        rtl8168_mdio_write(tp, 0x06, 0xd401);
-        rtl8168_mdio_write(tp, 0x06, 0x55b4);
-        rtl8168_mdio_write(tp, 0x06, 0xfebf);
-        rtl8168_mdio_write(tp, 0x06, 0x1c1e);
-        rtl8168_mdio_write(tp, 0x06, 0x0238);
-        rtl8168_mdio_write(tp, 0x06, 0x50ac);
-        rtl8168_mdio_write(tp, 0x06, 0x280b);
-        rtl8168_mdio_write(tp, 0x06, 0xbf1c);
-        rtl8168_mdio_write(tp, 0x06, 0x1b02);
-        rtl8168_mdio_write(tp, 0x06, 0x3850);
-        rtl8168_mdio_write(tp, 0x06, 0xac28);
-        rtl8168_mdio_write(tp, 0x06, 0x49ae);
-        rtl8168_mdio_write(tp, 0x06, 0x64bf);
-        rtl8168_mdio_write(tp, 0x06, 0x1c1b);
-        rtl8168_mdio_write(tp, 0x06, 0x0238);
-        rtl8168_mdio_write(tp, 0x06, 0x50ac);
-        rtl8168_mdio_write(tp, 0x06, 0x285b);
-        rtl8168_mdio_write(tp, 0x06, 0xd000);
-        rtl8168_mdio_write(tp, 0x06, 0x0284);
-        rtl8168_mdio_write(tp, 0x06, 0xcaac);
-        rtl8168_mdio_write(tp, 0x06, 0x2105);
-        rtl8168_mdio_write(tp, 0x06, 0xac22);
-        rtl8168_mdio_write(tp, 0x06, 0x02ae);
-        rtl8168_mdio_write(tp, 0x06, 0x4ebf);
-        rtl8168_mdio_write(tp, 0x06, 0xe0c4);
-        rtl8168_mdio_write(tp, 0x06, 0xbe85);
-        rtl8168_mdio_write(tp, 0x06, 0xf6d2);
-        rtl8168_mdio_write(tp, 0x06, 0x04d8);
-        rtl8168_mdio_write(tp, 0x06, 0x19d9);
-        rtl8168_mdio_write(tp, 0x06, 0x1907);
-        rtl8168_mdio_write(tp, 0x06, 0xdc19);
-        rtl8168_mdio_write(tp, 0x06, 0xdd19);
-        rtl8168_mdio_write(tp, 0x06, 0x0789);
-        rtl8168_mdio_write(tp, 0x06, 0x89ef);
-        rtl8168_mdio_write(tp, 0x06, 0x645e);
-        rtl8168_mdio_write(tp, 0x06, 0x07ff);
-        rtl8168_mdio_write(tp, 0x06, 0x0d65);
-        rtl8168_mdio_write(tp, 0x06, 0x5cf8);
-        rtl8168_mdio_write(tp, 0x06, 0x001e);
-        rtl8168_mdio_write(tp, 0x06, 0x46dc);
-        rtl8168_mdio_write(tp, 0x06, 0x19dd);
-        rtl8168_mdio_write(tp, 0x06, 0x19b2);
-        rtl8168_mdio_write(tp, 0x06, 0xe2d4);
-        rtl8168_mdio_write(tp, 0x06, 0x0001);
-        rtl8168_mdio_write(tp, 0x06, 0xbf1c);
-        rtl8168_mdio_write(tp, 0x06, 0x1b02);
-        rtl8168_mdio_write(tp, 0x06, 0x387d);
-        rtl8168_mdio_write(tp, 0x06, 0xae1d);
-        rtl8168_mdio_write(tp, 0x06, 0xbee0);
-        rtl8168_mdio_write(tp, 0x06, 0xc4bf);
-        rtl8168_mdio_write(tp, 0x06, 0x85f6);
-        rtl8168_mdio_write(tp, 0x06, 0xd204);
-        rtl8168_mdio_write(tp, 0x06, 0xd819);
-        rtl8168_mdio_write(tp, 0x06, 0xd919);
-        rtl8168_mdio_write(tp, 0x06, 0x07dc);
-        rtl8168_mdio_write(tp, 0x06, 0x19dd);
-        rtl8168_mdio_write(tp, 0x06, 0x1907);
-        rtl8168_mdio_write(tp, 0x06, 0xb2f4);
-        rtl8168_mdio_write(tp, 0x06, 0xd400);
-        rtl8168_mdio_write(tp, 0x06, 0x00bf);
-        rtl8168_mdio_write(tp, 0x06, 0x1c1b);
-        rtl8168_mdio_write(tp, 0x06, 0x0238);
-        rtl8168_mdio_write(tp, 0x06, 0x7dfe);
-        rtl8168_mdio_write(tp, 0x06, 0xef96);
-        rtl8168_mdio_write(tp, 0x06, 0xfec6);
-        rtl8168_mdio_write(tp, 0x06, 0xfefd);
-        rtl8168_mdio_write(tp, 0x06, 0xfc05);
-        rtl8168_mdio_write(tp, 0x06, 0xf9e2);
-        rtl8168_mdio_write(tp, 0x06, 0xe0ea);
-        rtl8168_mdio_write(tp, 0x06, 0xe3e0);
-        rtl8168_mdio_write(tp, 0x06, 0xeb5a);
-        rtl8168_mdio_write(tp, 0x06, 0x070c);
-        rtl8168_mdio_write(tp, 0x06, 0x031e);
-        rtl8168_mdio_write(tp, 0x06, 0x20e6);
-        rtl8168_mdio_write(tp, 0x06, 0xe0ea);
-        rtl8168_mdio_write(tp, 0x06, 0xe7e0);
-        rtl8168_mdio_write(tp, 0x06, 0xebe0);
-        rtl8168_mdio_write(tp, 0x06, 0xe0fc);
-        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-        rtl8168_mdio_write(tp, 0x06, 0xfdfd);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xfaef);
-        rtl8168_mdio_write(tp, 0x06, 0x69e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b80);
-        rtl8168_mdio_write(tp, 0x06, 0xad27);
-        rtl8168_mdio_write(tp, 0x06, 0x22bf);
-        rtl8168_mdio_write(tp, 0x06, 0x4616);
-        rtl8168_mdio_write(tp, 0x06, 0x0238);
-        rtl8168_mdio_write(tp, 0x06, 0x50e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b44);
-        rtl8168_mdio_write(tp, 0x06, 0x1f01);
-        rtl8168_mdio_write(tp, 0x06, 0x9e15);
-        rtl8168_mdio_write(tp, 0x06, 0xe58b);
-        rtl8168_mdio_write(tp, 0x06, 0x44ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2907);
-        rtl8168_mdio_write(tp, 0x06, 0xac28);
-        rtl8168_mdio_write(tp, 0x06, 0x04d1);
-        rtl8168_mdio_write(tp, 0x06, 0x01ae);
-        rtl8168_mdio_write(tp, 0x06, 0x02d1);
-        rtl8168_mdio_write(tp, 0x06, 0x00bf);
-        rtl8168_mdio_write(tp, 0x06, 0x85b0);
-        rtl8168_mdio_write(tp, 0x06, 0x0238);
-        rtl8168_mdio_write(tp, 0x06, 0x7def);
-        rtl8168_mdio_write(tp, 0x06, 0x96fe);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b85);
-        rtl8168_mdio_write(tp, 0x06, 0xad26);
-        rtl8168_mdio_write(tp, 0x06, 0x30e0);
-        rtl8168_mdio_write(tp, 0x06, 0xe036);
-        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-        rtl8168_mdio_write(tp, 0x06, 0x37e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b3f);
-        rtl8168_mdio_write(tp, 0x06, 0x1f10);
-        rtl8168_mdio_write(tp, 0x06, 0x9e23);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x3fac);
-        rtl8168_mdio_write(tp, 0x06, 0x200b);
-        rtl8168_mdio_write(tp, 0x06, 0xac21);
-        rtl8168_mdio_write(tp, 0x06, 0x0dac);
-        rtl8168_mdio_write(tp, 0x06, 0x250f);
-        rtl8168_mdio_write(tp, 0x06, 0xac27);
-        rtl8168_mdio_write(tp, 0x06, 0x11ae);
-        rtl8168_mdio_write(tp, 0x06, 0x1202);
-        rtl8168_mdio_write(tp, 0x06, 0x2c47);
-        rtl8168_mdio_write(tp, 0x06, 0xae0d);
-        rtl8168_mdio_write(tp, 0x06, 0x0285);
-        rtl8168_mdio_write(tp, 0x06, 0x4fae);
-        rtl8168_mdio_write(tp, 0x06, 0x0802);
-        rtl8168_mdio_write(tp, 0x06, 0x2c69);
-        rtl8168_mdio_write(tp, 0x06, 0xae03);
-        rtl8168_mdio_write(tp, 0x06, 0x022c);
-        rtl8168_mdio_write(tp, 0x06, 0x7cfc);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xfaef);
-        rtl8168_mdio_write(tp, 0x06, 0x6902);
-        rtl8168_mdio_write(tp, 0x06, 0x856c);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-        rtl8168_mdio_write(tp, 0x06, 0x14e1);
-        rtl8168_mdio_write(tp, 0x06, 0xe015);
-        rtl8168_mdio_write(tp, 0x06, 0xad26);
-        rtl8168_mdio_write(tp, 0x06, 0x08d1);
-        rtl8168_mdio_write(tp, 0x06, 0x1ebf);
-        rtl8168_mdio_write(tp, 0x06, 0x2cd9);
-        rtl8168_mdio_write(tp, 0x06, 0x0238);
-        rtl8168_mdio_write(tp, 0x06, 0x7def);
-        rtl8168_mdio_write(tp, 0x06, 0x96fe);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b85);
-        rtl8168_mdio_write(tp, 0x06, 0xad27);
-        rtl8168_mdio_write(tp, 0x06, 0x2fd0);
-        rtl8168_mdio_write(tp, 0x06, 0x0b02);
-        rtl8168_mdio_write(tp, 0x06, 0x3682);
-        rtl8168_mdio_write(tp, 0x06, 0x5882);
-        rtl8168_mdio_write(tp, 0x06, 0x7882);
-        rtl8168_mdio_write(tp, 0x06, 0x9f24);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x32e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b33);
-        rtl8168_mdio_write(tp, 0x06, 0x1f10);
-        rtl8168_mdio_write(tp, 0x06, 0x9e1a);
-        rtl8168_mdio_write(tp, 0x06, 0x10e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b32);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-        rtl8168_mdio_write(tp, 0x06, 0x28e1);
-        rtl8168_mdio_write(tp, 0x06, 0xe029);
-        rtl8168_mdio_write(tp, 0x06, 0xf72c);
-        rtl8168_mdio_write(tp, 0x06, 0xe4e0);
-        rtl8168_mdio_write(tp, 0x06, 0x28e5);
-        rtl8168_mdio_write(tp, 0x06, 0xe029);
-        rtl8168_mdio_write(tp, 0x06, 0xf62c);
-        rtl8168_mdio_write(tp, 0x06, 0xe4e0);
-        rtl8168_mdio_write(tp, 0x06, 0x28e5);
-        rtl8168_mdio_write(tp, 0x06, 0xe029);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0x00e1);
-        rtl8168_mdio_write(tp, 0x06, 0x4077);
-        rtl8168_mdio_write(tp, 0x06, 0xe140);
-        rtl8168_mdio_write(tp, 0x06, 0x52e0);
-        rtl8168_mdio_write(tp, 0x06, 0xeed9);
-        rtl8168_mdio_write(tp, 0x06, 0xe04c);
-        rtl8168_mdio_write(tp, 0x06, 0xbbe0);
-        rtl8168_mdio_write(tp, 0x06, 0x2a00);
-        rtl8168_mdio_write(tp, 0x05, 0xe142);
-        gphy_val = rtl8168_mdio_read(tp, 0x06);
-        gphy_val |= BIT_0;
-        rtl8168_mdio_write(tp,0x06, gphy_val);
-        rtl8168_mdio_write(tp, 0x05, 0xe140);
-        gphy_val = rtl8168_mdio_read(tp, 0x06);
-        gphy_val |= BIT_0;
-        rtl8168_mdio_write(tp,0x06, gphy_val);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp,0x1f, 0x0005);
-        for (i = 0; i < 200; i++) {
-                udelay(100);
-                gphy_val = rtl8168_mdio_read(tp, 0x00);
-                if (gphy_val & BIT_7)
-                        break;
-        }
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1e, 0x0023);
-        gphy_val = rtl8168_mdio_read(tp, 0x17);
-        gphy_val |= BIT_1;
-        if (tp->RequiredSecLanDonglePatch)
-                gphy_val &= ~BIT_2;
-        rtl8168_mdio_write(tp, 0x17, gphy_val);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0003);
-        rtl8168_mdio_write(tp, 0x09, 0xA20F);
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0003);
-        rtl8168_mdio_write(tp, 0x01, 0x328A);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x00, 0x9200);
-}
-
-static void
-rtl8168_set_phy_mcu_8168f_2(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        unsigned int gphy_val,i;
-
-        rtl8168_mdio_write(tp,0x1f, 0x0000);
-        rtl8168_mdio_write(tp,0x00, 0x1800);
-        gphy_val = rtl8168_mdio_read(tp, 0x15);
-        gphy_val &= ~(BIT_12);
-        rtl8168_mdio_write(tp,0x15, gphy_val);
-        rtl8168_mdio_write(tp,0x00, 0x4800);
-        rtl8168_mdio_write(tp,0x1f, 0x0007);
-        rtl8168_mdio_write(tp,0x1e, 0x002f);
-        for (i = 0; i < 1000; i++) {
-                udelay(100);
-                gphy_val = rtl8168_mdio_read(tp, 0x1c);
-                if (gphy_val & 0x0080)
-                        break;
-        }
-        rtl8168_mdio_write(tp,0x1f, 0x0000);
-        rtl8168_mdio_write(tp,0x00, 0x1800);
-        rtl8168_mdio_write(tp,0x1f, 0x0007);
-        rtl8168_mdio_write(tp,0x1e, 0x0023);
-        for (i = 0; i < 200; i++) {
-                udelay(100);
-                gphy_val = rtl8168_mdio_read(tp, 0x18);
-                if (!(gphy_val & 0x0001))
-                        break;
-        }
-        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-        rtl8168_mdio_write(tp, 0x05, 0xfff6);
-        rtl8168_mdio_write(tp, 0x06, 0x0080);
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1e, 0x0023);
-        rtl8168_mdio_write(tp, 0x16, 0x0306);
-        rtl8168_mdio_write(tp, 0x16, 0x0307);
-        rtl8168_mdio_write(tp, 0x15, 0x0098);
-        rtl8168_mdio_write(tp, 0x19, 0x7c0b);
-        rtl8168_mdio_write(tp, 0x15, 0x0099);
-        rtl8168_mdio_write(tp, 0x19, 0x6c0b);
-        rtl8168_mdio_write(tp, 0x15, 0x00eb);
-        rtl8168_mdio_write(tp, 0x19, 0x6c0b);
-        rtl8168_mdio_write(tp, 0x15, 0x00f8);
-        rtl8168_mdio_write(tp, 0x19, 0x6f0b);
-        rtl8168_mdio_write(tp, 0x15, 0x00fe);
-        rtl8168_mdio_write(tp, 0x19, 0x6f0f);
-        rtl8168_mdio_write(tp, 0x15, 0x00db);
-        rtl8168_mdio_write(tp, 0x19, 0x6f09);
-        rtl8168_mdio_write(tp, 0x15, 0x00dc);
-        rtl8168_mdio_write(tp, 0x19, 0xaefd);
-        rtl8168_mdio_write(tp, 0x15, 0x00dd);
-        rtl8168_mdio_write(tp, 0x19, 0x6f0b);
-        rtl8168_mdio_write(tp, 0x15, 0x00de);
-        rtl8168_mdio_write(tp, 0x19, 0xc60b);
-        rtl8168_mdio_write(tp, 0x15, 0x00df);
-        rtl8168_mdio_write(tp, 0x19, 0x00fa);
-        rtl8168_mdio_write(tp, 0x15, 0x00e0);
-        rtl8168_mdio_write(tp, 0x19, 0x30e1);
-        rtl8168_mdio_write(tp, 0x15, 0x020c);
-        rtl8168_mdio_write(tp, 0x19, 0x3224);
-        rtl8168_mdio_write(tp, 0x15, 0x020e);
-        rtl8168_mdio_write(tp, 0x19, 0x9813);
-        rtl8168_mdio_write(tp, 0x15, 0x020f);
-        rtl8168_mdio_write(tp, 0x19, 0x7801);
-        rtl8168_mdio_write(tp, 0x15, 0x0210);
-        rtl8168_mdio_write(tp, 0x19, 0x930f);
-        rtl8168_mdio_write(tp, 0x15, 0x0211);
-        rtl8168_mdio_write(tp, 0x19, 0x9206);
-        rtl8168_mdio_write(tp, 0x15, 0x0212);
-        rtl8168_mdio_write(tp, 0x19, 0x4002);
-        rtl8168_mdio_write(tp, 0x15, 0x0213);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x0214);
-        rtl8168_mdio_write(tp, 0x19, 0x588f);
-        rtl8168_mdio_write(tp, 0x15, 0x0215);
-        rtl8168_mdio_write(tp, 0x19, 0x5520);
-        rtl8168_mdio_write(tp, 0x15, 0x0216);
-        rtl8168_mdio_write(tp, 0x19, 0x3224);
-        rtl8168_mdio_write(tp, 0x15, 0x0217);
-        rtl8168_mdio_write(tp, 0x19, 0x4002);
-        rtl8168_mdio_write(tp, 0x15, 0x0218);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x0219);
-        rtl8168_mdio_write(tp, 0x19, 0x588d);
-        rtl8168_mdio_write(tp, 0x15, 0x021a);
-        rtl8168_mdio_write(tp, 0x19, 0x5540);
-        rtl8168_mdio_write(tp, 0x15, 0x021b);
-        rtl8168_mdio_write(tp, 0x19, 0x9e03);
-        rtl8168_mdio_write(tp, 0x15, 0x021c);
-        rtl8168_mdio_write(tp, 0x19, 0x7c40);
-        rtl8168_mdio_write(tp, 0x15, 0x021d);
-        rtl8168_mdio_write(tp, 0x19, 0x6840);
-        rtl8168_mdio_write(tp, 0x15, 0x021e);
-        rtl8168_mdio_write(tp, 0x19, 0x3224);
-        rtl8168_mdio_write(tp, 0x15, 0x021f);
-        rtl8168_mdio_write(tp, 0x19, 0x4002);
-        rtl8168_mdio_write(tp, 0x15, 0x0220);
-        rtl8168_mdio_write(tp, 0x19, 0x3224);
-        rtl8168_mdio_write(tp, 0x15, 0x0221);
-        rtl8168_mdio_write(tp, 0x19, 0x9e03);
-        rtl8168_mdio_write(tp, 0x15, 0x0222);
-        rtl8168_mdio_write(tp, 0x19, 0x7c40);
-        rtl8168_mdio_write(tp, 0x15, 0x0223);
-        rtl8168_mdio_write(tp, 0x19, 0x6840);
-        rtl8168_mdio_write(tp, 0x15, 0x0224);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x0225);
-        rtl8168_mdio_write(tp, 0x19, 0x3231);
-        rtl8168_mdio_write(tp, 0x15, 0x0000);
-        rtl8168_mdio_write(tp, 0x16, 0x0306);
-        rtl8168_mdio_write(tp, 0x16, 0x0300);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-        rtl8168_mdio_write(tp, 0x05, 0xfff6);
-        rtl8168_mdio_write(tp, 0x06, 0x0080);
-        rtl8168_mdio_write(tp, 0x05, 0x8000);
-        rtl8168_mdio_write(tp, 0x06, 0x0280);
-        rtl8168_mdio_write(tp, 0x06, 0x48f7);
-        rtl8168_mdio_write(tp, 0x06, 0x00e0);
-        rtl8168_mdio_write(tp, 0x06, 0xfff7);
-        rtl8168_mdio_write(tp, 0x06, 0xa080);
-        rtl8168_mdio_write(tp, 0x06, 0x02ae);
-        rtl8168_mdio_write(tp, 0x06, 0xf602);
-        rtl8168_mdio_write(tp, 0x06, 0x011b);
-        rtl8168_mdio_write(tp, 0x06, 0x0201);
-        rtl8168_mdio_write(tp, 0x06, 0x2802);
-        rtl8168_mdio_write(tp, 0x06, 0x0135);
-        rtl8168_mdio_write(tp, 0x06, 0x0201);
-        rtl8168_mdio_write(tp, 0x06, 0x4502);
-        rtl8168_mdio_write(tp, 0x06, 0x015f);
-        rtl8168_mdio_write(tp, 0x06, 0x0280);
-        rtl8168_mdio_write(tp, 0x06, 0x6b02);
-        rtl8168_mdio_write(tp, 0x06, 0x80e5);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x88e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b89);
-        rtl8168_mdio_write(tp, 0x06, 0x1e01);
-        rtl8168_mdio_write(tp, 0x06, 0xe18b);
-        rtl8168_mdio_write(tp, 0x06, 0x8a1e);
-        rtl8168_mdio_write(tp, 0x06, 0x01e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8b);
-        rtl8168_mdio_write(tp, 0x06, 0x1e01);
-        rtl8168_mdio_write(tp, 0x06, 0xe18b);
-        rtl8168_mdio_write(tp, 0x06, 0x8c1e);
-        rtl8168_mdio_write(tp, 0x06, 0x01e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
-        rtl8168_mdio_write(tp, 0x06, 0x1e01);
-        rtl8168_mdio_write(tp, 0x06, 0xe18b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e1e);
-        rtl8168_mdio_write(tp, 0x06, 0x01a0);
-        rtl8168_mdio_write(tp, 0x06, 0x00c7);
-        rtl8168_mdio_write(tp, 0x06, 0xaebb);
-        rtl8168_mdio_write(tp, 0x06, 0xbf8b);
-        rtl8168_mdio_write(tp, 0x06, 0x88ec);
-        rtl8168_mdio_write(tp, 0x06, 0x0019);
-        rtl8168_mdio_write(tp, 0x06, 0xa98b);
-        rtl8168_mdio_write(tp, 0x06, 0x90f9);
-        rtl8168_mdio_write(tp, 0x06, 0xeeff);
-        rtl8168_mdio_write(tp, 0x06, 0xf600);
-        rtl8168_mdio_write(tp, 0x06, 0xeeff);
-        rtl8168_mdio_write(tp, 0x06, 0xf7fe);
-        rtl8168_mdio_write(tp, 0x06, 0xd100);
-        rtl8168_mdio_write(tp, 0x06, 0xbf81);
-        rtl8168_mdio_write(tp, 0x06, 0x9802);
-        rtl8168_mdio_write(tp, 0x06, 0x39f3);
-        rtl8168_mdio_write(tp, 0x06, 0xd101);
-        rtl8168_mdio_write(tp, 0x06, 0xbf81);
-        rtl8168_mdio_write(tp, 0x06, 0x9b02);
-        rtl8168_mdio_write(tp, 0x06, 0x39f3);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8dad);
-        rtl8168_mdio_write(tp, 0x06, 0x2014);
-        rtl8168_mdio_write(tp, 0x06, 0xee8b);
-        rtl8168_mdio_write(tp, 0x06, 0x8d00);
-        rtl8168_mdio_write(tp, 0x06, 0xe08a);
-        rtl8168_mdio_write(tp, 0x06, 0x5a78);
-        rtl8168_mdio_write(tp, 0x06, 0x039e);
-        rtl8168_mdio_write(tp, 0x06, 0x0902);
-        rtl8168_mdio_write(tp, 0x06, 0x05fc);
-        rtl8168_mdio_write(tp, 0x06, 0x0280);
-        rtl8168_mdio_write(tp, 0x06, 0x8802);
-        rtl8168_mdio_write(tp, 0x06, 0x32dd);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8f9);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x81ac);
-        rtl8168_mdio_write(tp, 0x06, 0x261a);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x81ac);
-        rtl8168_mdio_write(tp, 0x06, 0x2114);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x85ac);
-        rtl8168_mdio_write(tp, 0x06, 0x200e);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x85ac);
-        rtl8168_mdio_write(tp, 0x06, 0x2308);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x87ac);
-        rtl8168_mdio_write(tp, 0x06, 0x2402);
-        rtl8168_mdio_write(tp, 0x06, 0xae38);
-        rtl8168_mdio_write(tp, 0x06, 0x021a);
-        rtl8168_mdio_write(tp, 0x06, 0xd6ee);
-        rtl8168_mdio_write(tp, 0x06, 0xe41c);
-        rtl8168_mdio_write(tp, 0x06, 0x04ee);
-        rtl8168_mdio_write(tp, 0x06, 0xe41d);
-        rtl8168_mdio_write(tp, 0x06, 0x04e2);
-        rtl8168_mdio_write(tp, 0x06, 0xe07c);
-        rtl8168_mdio_write(tp, 0x06, 0xe3e0);
-        rtl8168_mdio_write(tp, 0x06, 0x7de0);
-        rtl8168_mdio_write(tp, 0x06, 0xe038);
-        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-        rtl8168_mdio_write(tp, 0x06, 0x39ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2e1b);
-        rtl8168_mdio_write(tp, 0x06, 0xad39);
-        rtl8168_mdio_write(tp, 0x06, 0x0dd1);
-        rtl8168_mdio_write(tp, 0x06, 0x01bf);
-        rtl8168_mdio_write(tp, 0x06, 0x22c8);
-        rtl8168_mdio_write(tp, 0x06, 0x0239);
-        rtl8168_mdio_write(tp, 0x06, 0xf302);
-        rtl8168_mdio_write(tp, 0x06, 0x21f0);
-        rtl8168_mdio_write(tp, 0x06, 0xae0b);
-        rtl8168_mdio_write(tp, 0x06, 0xac38);
-        rtl8168_mdio_write(tp, 0x06, 0x02ae);
-        rtl8168_mdio_write(tp, 0x06, 0x0602);
-        rtl8168_mdio_write(tp, 0x06, 0x222d);
-        rtl8168_mdio_write(tp, 0x06, 0x0222);
-        rtl8168_mdio_write(tp, 0x06, 0x7202);
-        rtl8168_mdio_write(tp, 0x06, 0x1ae7);
-        rtl8168_mdio_write(tp, 0x06, 0xfdfc);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ead);
-        rtl8168_mdio_write(tp, 0x06, 0x201a);
-        rtl8168_mdio_write(tp, 0x06, 0xf620);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e02);
-        rtl8168_mdio_write(tp, 0x06, 0x2afe);
-        rtl8168_mdio_write(tp, 0x06, 0x022c);
-        rtl8168_mdio_write(tp, 0x06, 0x5c02);
-        rtl8168_mdio_write(tp, 0x06, 0x03c5);
-        rtl8168_mdio_write(tp, 0x06, 0x0281);
-        rtl8168_mdio_write(tp, 0x06, 0x6702);
-        rtl8168_mdio_write(tp, 0x06, 0x2e4f);
-        rtl8168_mdio_write(tp, 0x06, 0x0204);
-        rtl8168_mdio_write(tp, 0x06, 0x8902);
-        rtl8168_mdio_write(tp, 0x06, 0x2f7a);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ead);
-        rtl8168_mdio_write(tp, 0x06, 0x210b);
-        rtl8168_mdio_write(tp, 0x06, 0xf621);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e02);
-        rtl8168_mdio_write(tp, 0x06, 0x0445);
-        rtl8168_mdio_write(tp, 0x06, 0x021c);
-        rtl8168_mdio_write(tp, 0x06, 0xb8e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xad22);
-        rtl8168_mdio_write(tp, 0x06, 0x08f6);
-        rtl8168_mdio_write(tp, 0x06, 0x22e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0x0235);
-        rtl8168_mdio_write(tp, 0x06, 0xd4e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xad23);
-        rtl8168_mdio_write(tp, 0x06, 0x08f6);
-        rtl8168_mdio_write(tp, 0x06, 0x23e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0x0231);
-        rtl8168_mdio_write(tp, 0x06, 0xc8e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xad24);
-        rtl8168_mdio_write(tp, 0x06, 0x05f6);
-        rtl8168_mdio_write(tp, 0x06, 0x24e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ead);
-        rtl8168_mdio_write(tp, 0x06, 0x2505);
-        rtl8168_mdio_write(tp, 0x06, 0xf625);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ee0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xad26);
-        rtl8168_mdio_write(tp, 0x06, 0x08f6);
-        rtl8168_mdio_write(tp, 0x06, 0x26e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0x022d);
-        rtl8168_mdio_write(tp, 0x06, 0x6ae0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xad27);
-        rtl8168_mdio_write(tp, 0x06, 0x05f6);
-        rtl8168_mdio_write(tp, 0x06, 0x27e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0x0203);
-        rtl8168_mdio_write(tp, 0x06, 0x8bfc);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xfaef);
-        rtl8168_mdio_write(tp, 0x06, 0x69e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b80);
-        rtl8168_mdio_write(tp, 0x06, 0xad27);
-        rtl8168_mdio_write(tp, 0x06, 0x22bf);
-        rtl8168_mdio_write(tp, 0x06, 0x479a);
-        rtl8168_mdio_write(tp, 0x06, 0x0239);
-        rtl8168_mdio_write(tp, 0x06, 0xc6e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b44);
-        rtl8168_mdio_write(tp, 0x06, 0x1f01);
-        rtl8168_mdio_write(tp, 0x06, 0x9e15);
-        rtl8168_mdio_write(tp, 0x06, 0xe58b);
-        rtl8168_mdio_write(tp, 0x06, 0x44ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2907);
-        rtl8168_mdio_write(tp, 0x06, 0xac28);
-        rtl8168_mdio_write(tp, 0x06, 0x04d1);
-        rtl8168_mdio_write(tp, 0x06, 0x01ae);
-        rtl8168_mdio_write(tp, 0x06, 0x02d1);
-        rtl8168_mdio_write(tp, 0x06, 0x00bf);
-        rtl8168_mdio_write(tp, 0x06, 0x819e);
-        rtl8168_mdio_write(tp, 0x06, 0x0239);
-        rtl8168_mdio_write(tp, 0x06, 0xf3ef);
-        rtl8168_mdio_write(tp, 0x06, 0x96fe);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0x00e1);
-        rtl8168_mdio_write(tp, 0x06, 0x4077);
-        rtl8168_mdio_write(tp, 0x06, 0xe140);
-        rtl8168_mdio_write(tp, 0x06, 0xbbe0);
-        rtl8168_mdio_write(tp, 0x06, 0x2a00);
-        rtl8168_mdio_write(tp, 0x05, 0xe142);
-        gphy_val = rtl8168_mdio_read(tp, 0x06);
-        gphy_val |= BIT_0;
-        rtl8168_mdio_write(tp, 0x06, gphy_val);
-        rtl8168_mdio_write(tp, 0x05, 0xe140);
-        gphy_val = rtl8168_mdio_read(tp, 0x06);
-        gphy_val |= BIT_0;
-        rtl8168_mdio_write(tp, 0x06, gphy_val);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp,0x1f, 0x0005);
-        for (i = 0; i < 200; i++) {
-                udelay(100);
-                gphy_val = rtl8168_mdio_read(tp, 0x00);
-                if (gphy_val & BIT_7)
-                        break;
-        }
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1e, 0x0023);
-        gphy_val = rtl8168_mdio_read(tp, 0x17);
-        gphy_val |= BIT_1;
-        if (tp->RequiredSecLanDonglePatch)
-                gphy_val &= ~BIT_2;
-        rtl8168_mdio_write(tp, 0x17, gphy_val);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x00, 0x9200);
-}
-
-static void
-rtl8168_set_phy_mcu_8411_1(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        unsigned int gphy_val,i;
-
-        rtl8168_mdio_write(tp,0x1f, 0x0000);
-        rtl8168_mdio_write(tp,0x00, 0x1800);
-        gphy_val = rtl8168_mdio_read(tp, 0x15);
-        gphy_val &= ~(BIT_12);
-        rtl8168_mdio_write(tp,0x15, gphy_val);
-        rtl8168_mdio_write(tp,0x00, 0x4800);
-        rtl8168_mdio_write(tp,0x1f, 0x0007);
-        rtl8168_mdio_write(tp,0x1e, 0x002f);
-        for (i = 0; i < 1000; i++) {
-                udelay(100);
-                gphy_val = rtl8168_mdio_read(tp, 0x1c);
-                if (gphy_val & 0x0080)
-                        break;
-        }
-        rtl8168_mdio_write(tp,0x1f, 0x0000);
-        rtl8168_mdio_write(tp,0x00, 0x1800);
-        rtl8168_mdio_write(tp,0x1f, 0x0007);
-        rtl8168_mdio_write(tp,0x1e, 0x0023);
-        for (i = 0; i < 200; i++) {
-                udelay(100);
-                gphy_val = rtl8168_mdio_read(tp, 0x18);
-                if (!(gphy_val & 0x0001))
-                        break;
-        }
-        rtl8168_mdio_write(tp,0x1f, 0x0005);
-        rtl8168_mdio_write(tp,0x05, 0xfff6);
-        rtl8168_mdio_write(tp,0x06, 0x0080);
-        rtl8168_mdio_write(tp, 0x1f, 0x0007);
-        rtl8168_mdio_write(tp, 0x1e, 0x0023);
-        rtl8168_mdio_write(tp, 0x16, 0x0306);
-        rtl8168_mdio_write(tp, 0x16, 0x0307);
-        rtl8168_mdio_write(tp, 0x15, 0x0098);
-        rtl8168_mdio_write(tp, 0x19, 0x7c0b);
-        rtl8168_mdio_write(tp, 0x15, 0x0099);
-        rtl8168_mdio_write(tp, 0x19, 0x6c0b);
-        rtl8168_mdio_write(tp, 0x15, 0x00eb);
-        rtl8168_mdio_write(tp, 0x19, 0x6c0b);
-        rtl8168_mdio_write(tp, 0x15, 0x00f8);
-        rtl8168_mdio_write(tp, 0x19, 0x6f0b);
-        rtl8168_mdio_write(tp, 0x15, 0x00fe);
-        rtl8168_mdio_write(tp, 0x19, 0x6f0f);
-        rtl8168_mdio_write(tp, 0x15, 0x00db);
-        rtl8168_mdio_write(tp, 0x19, 0x6f09);
-        rtl8168_mdio_write(tp, 0x15, 0x00dc);
-        rtl8168_mdio_write(tp, 0x19, 0xaefd);
-        rtl8168_mdio_write(tp, 0x15, 0x00dd);
-        rtl8168_mdio_write(tp, 0x19, 0x6f0b);
-        rtl8168_mdio_write(tp, 0x15, 0x00de);
-        rtl8168_mdio_write(tp, 0x19, 0xc60b);
-        rtl8168_mdio_write(tp, 0x15, 0x00df);
-        rtl8168_mdio_write(tp, 0x19, 0x00fa);
-        rtl8168_mdio_write(tp, 0x15, 0x00e0);
-        rtl8168_mdio_write(tp, 0x19, 0x30e1);
-        rtl8168_mdio_write(tp, 0x15, 0x020c);
-        rtl8168_mdio_write(tp, 0x19, 0x3224);
-        rtl8168_mdio_write(tp, 0x15, 0x020e);
-        rtl8168_mdio_write(tp, 0x19, 0x9813);
-        rtl8168_mdio_write(tp, 0x15, 0x020f);
-        rtl8168_mdio_write(tp, 0x19, 0x7801);
-        rtl8168_mdio_write(tp, 0x15, 0x0210);
-        rtl8168_mdio_write(tp, 0x19, 0x930f);
-        rtl8168_mdio_write(tp, 0x15, 0x0211);
-        rtl8168_mdio_write(tp, 0x19, 0x9206);
-        rtl8168_mdio_write(tp, 0x15, 0x0212);
-        rtl8168_mdio_write(tp, 0x19, 0x4002);
-        rtl8168_mdio_write(tp, 0x15, 0x0213);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x0214);
-        rtl8168_mdio_write(tp, 0x19, 0x588f);
-        rtl8168_mdio_write(tp, 0x15, 0x0215);
-        rtl8168_mdio_write(tp, 0x19, 0x5520);
-        rtl8168_mdio_write(tp, 0x15, 0x0216);
-        rtl8168_mdio_write(tp, 0x19, 0x3224);
-        rtl8168_mdio_write(tp, 0x15, 0x0217);
-        rtl8168_mdio_write(tp, 0x19, 0x4002);
-        rtl8168_mdio_write(tp, 0x15, 0x0218);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x0219);
-        rtl8168_mdio_write(tp, 0x19, 0x588d);
-        rtl8168_mdio_write(tp, 0x15, 0x021a);
-        rtl8168_mdio_write(tp, 0x19, 0x5540);
-        rtl8168_mdio_write(tp, 0x15, 0x021b);
-        rtl8168_mdio_write(tp, 0x19, 0x9e03);
-        rtl8168_mdio_write(tp, 0x15, 0x021c);
-        rtl8168_mdio_write(tp, 0x19, 0x7c40);
-        rtl8168_mdio_write(tp, 0x15, 0x021d);
-        rtl8168_mdio_write(tp, 0x19, 0x6840);
-        rtl8168_mdio_write(tp, 0x15, 0x021e);
-        rtl8168_mdio_write(tp, 0x19, 0x3224);
-        rtl8168_mdio_write(tp, 0x15, 0x021f);
-        rtl8168_mdio_write(tp, 0x19, 0x4002);
-        rtl8168_mdio_write(tp, 0x15, 0x0220);
-        rtl8168_mdio_write(tp, 0x19, 0x3224);
-        rtl8168_mdio_write(tp, 0x15, 0x0221);
-        rtl8168_mdio_write(tp, 0x19, 0x9e03);
-        rtl8168_mdio_write(tp, 0x15, 0x0222);
-        rtl8168_mdio_write(tp, 0x19, 0x7c40);
-        rtl8168_mdio_write(tp, 0x15, 0x0223);
-        rtl8168_mdio_write(tp, 0x19, 0x6840);
-        rtl8168_mdio_write(tp, 0x15, 0x0224);
-        rtl8168_mdio_write(tp, 0x19, 0x7800);
-        rtl8168_mdio_write(tp, 0x15, 0x0225);
-        rtl8168_mdio_write(tp, 0x19, 0x3231);
-        rtl8168_mdio_write(tp, 0x15, 0x0000);
-        rtl8168_mdio_write(tp, 0x16, 0x0306);
-        rtl8168_mdio_write(tp, 0x16, 0x0300);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-        rtl8168_mdio_write(tp, 0x05, 0xfff6);
-        rtl8168_mdio_write(tp, 0x06, 0x0080);
-        rtl8168_mdio_write(tp, 0x05, 0x8000);
-        rtl8168_mdio_write(tp, 0x06, 0x0280);
-        rtl8168_mdio_write(tp, 0x06, 0x48f7);
-        rtl8168_mdio_write(tp, 0x06, 0x00e0);
-        rtl8168_mdio_write(tp, 0x06, 0xfff7);
-        rtl8168_mdio_write(tp, 0x06, 0xa080);
-        rtl8168_mdio_write(tp, 0x06, 0x02ae);
-        rtl8168_mdio_write(tp, 0x06, 0xf602);
-        rtl8168_mdio_write(tp, 0x06, 0x011e);
-        rtl8168_mdio_write(tp, 0x06, 0x0201);
-        rtl8168_mdio_write(tp, 0x06, 0x2b02);
-        rtl8168_mdio_write(tp, 0x06, 0x8077);
-        rtl8168_mdio_write(tp, 0x06, 0x0201);
-        rtl8168_mdio_write(tp, 0x06, 0x4802);
-        rtl8168_mdio_write(tp, 0x06, 0x0162);
-        rtl8168_mdio_write(tp, 0x06, 0x0280);
-        rtl8168_mdio_write(tp, 0x06, 0x9402);
-        rtl8168_mdio_write(tp, 0x06, 0x810e);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x88e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b89);
-        rtl8168_mdio_write(tp, 0x06, 0x1e01);
-        rtl8168_mdio_write(tp, 0x06, 0xe18b);
-        rtl8168_mdio_write(tp, 0x06, 0x8a1e);
-        rtl8168_mdio_write(tp, 0x06, 0x01e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8b);
-        rtl8168_mdio_write(tp, 0x06, 0x1e01);
-        rtl8168_mdio_write(tp, 0x06, 0xe18b);
-        rtl8168_mdio_write(tp, 0x06, 0x8c1e);
-        rtl8168_mdio_write(tp, 0x06, 0x01e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
-        rtl8168_mdio_write(tp, 0x06, 0x1e01);
-        rtl8168_mdio_write(tp, 0x06, 0xe18b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e1e);
-        rtl8168_mdio_write(tp, 0x06, 0x01a0);
-        rtl8168_mdio_write(tp, 0x06, 0x00c7);
-        rtl8168_mdio_write(tp, 0x06, 0xaebb);
-        rtl8168_mdio_write(tp, 0x06, 0xd481);
-        rtl8168_mdio_write(tp, 0x06, 0xd4e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b92);
-        rtl8168_mdio_write(tp, 0x06, 0xe58b);
-        rtl8168_mdio_write(tp, 0x06, 0x9302);
-        rtl8168_mdio_write(tp, 0x06, 0x2e5a);
-        rtl8168_mdio_write(tp, 0x06, 0xbf8b);
-        rtl8168_mdio_write(tp, 0x06, 0x88ec);
-        rtl8168_mdio_write(tp, 0x06, 0x0019);
-        rtl8168_mdio_write(tp, 0x06, 0xa98b);
-        rtl8168_mdio_write(tp, 0x06, 0x90f9);
-        rtl8168_mdio_write(tp, 0x06, 0xeeff);
-        rtl8168_mdio_write(tp, 0x06, 0xf600);
-        rtl8168_mdio_write(tp, 0x06, 0xeeff);
-        rtl8168_mdio_write(tp, 0x06, 0xf7fc);
-        rtl8168_mdio_write(tp, 0x06, 0xd100);
-        rtl8168_mdio_write(tp, 0x06, 0xbf83);
-        rtl8168_mdio_write(tp, 0x06, 0x3c02);
-        rtl8168_mdio_write(tp, 0x06, 0x3a21);
-        rtl8168_mdio_write(tp, 0x06, 0xd101);
-        rtl8168_mdio_write(tp, 0x06, 0xbf83);
-        rtl8168_mdio_write(tp, 0x06, 0x3f02);
-        rtl8168_mdio_write(tp, 0x06, 0x3a21);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8aad);
-        rtl8168_mdio_write(tp, 0x06, 0x2014);
-        rtl8168_mdio_write(tp, 0x06, 0xee8b);
-        rtl8168_mdio_write(tp, 0x06, 0x8a00);
-        rtl8168_mdio_write(tp, 0x06, 0x0220);
-        rtl8168_mdio_write(tp, 0x06, 0x8be0);
-        rtl8168_mdio_write(tp, 0x06, 0xe426);
-        rtl8168_mdio_write(tp, 0x06, 0xe1e4);
-        rtl8168_mdio_write(tp, 0x06, 0x27ee);
-        rtl8168_mdio_write(tp, 0x06, 0xe426);
-        rtl8168_mdio_write(tp, 0x06, 0x23e5);
-        rtl8168_mdio_write(tp, 0x06, 0xe427);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
-        rtl8168_mdio_write(tp, 0x06, 0xad20);
-        rtl8168_mdio_write(tp, 0x06, 0x14ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8d);
-        rtl8168_mdio_write(tp, 0x06, 0x00e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8a5a);
-        rtl8168_mdio_write(tp, 0x06, 0x7803);
-        rtl8168_mdio_write(tp, 0x06, 0x9e09);
-        rtl8168_mdio_write(tp, 0x06, 0x0206);
-        rtl8168_mdio_write(tp, 0x06, 0x2802);
-        rtl8168_mdio_write(tp, 0x06, 0x80b1);
-        rtl8168_mdio_write(tp, 0x06, 0x0232);
-        rtl8168_mdio_write(tp, 0x06, 0xfdfc);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xf9e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b81);
-        rtl8168_mdio_write(tp, 0x06, 0xac26);
-        rtl8168_mdio_write(tp, 0x06, 0x1ae0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b81);
-        rtl8168_mdio_write(tp, 0x06, 0xac21);
-        rtl8168_mdio_write(tp, 0x06, 0x14e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b85);
-        rtl8168_mdio_write(tp, 0x06, 0xac20);
-        rtl8168_mdio_write(tp, 0x06, 0x0ee0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b85);
-        rtl8168_mdio_write(tp, 0x06, 0xac23);
-        rtl8168_mdio_write(tp, 0x06, 0x08e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b87);
-        rtl8168_mdio_write(tp, 0x06, 0xac24);
-        rtl8168_mdio_write(tp, 0x06, 0x02ae);
-        rtl8168_mdio_write(tp, 0x06, 0x3802);
-        rtl8168_mdio_write(tp, 0x06, 0x1b02);
-        rtl8168_mdio_write(tp, 0x06, 0xeee4);
-        rtl8168_mdio_write(tp, 0x06, 0x1c04);
-        rtl8168_mdio_write(tp, 0x06, 0xeee4);
-        rtl8168_mdio_write(tp, 0x06, 0x1d04);
-        rtl8168_mdio_write(tp, 0x06, 0xe2e0);
-        rtl8168_mdio_write(tp, 0x06, 0x7ce3);
-        rtl8168_mdio_write(tp, 0x06, 0xe07d);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-        rtl8168_mdio_write(tp, 0x06, 0x38e1);
-        rtl8168_mdio_write(tp, 0x06, 0xe039);
-        rtl8168_mdio_write(tp, 0x06, 0xad2e);
-        rtl8168_mdio_write(tp, 0x06, 0x1bad);
-        rtl8168_mdio_write(tp, 0x06, 0x390d);
-        rtl8168_mdio_write(tp, 0x06, 0xd101);
-        rtl8168_mdio_write(tp, 0x06, 0xbf22);
-        rtl8168_mdio_write(tp, 0x06, 0xe802);
-        rtl8168_mdio_write(tp, 0x06, 0x3a21);
-        rtl8168_mdio_write(tp, 0x06, 0x0222);
-        rtl8168_mdio_write(tp, 0x06, 0x10ae);
-        rtl8168_mdio_write(tp, 0x06, 0x0bac);
-        rtl8168_mdio_write(tp, 0x06, 0x3802);
-        rtl8168_mdio_write(tp, 0x06, 0xae06);
-        rtl8168_mdio_write(tp, 0x06, 0x0222);
-        rtl8168_mdio_write(tp, 0x06, 0x4d02);
-        rtl8168_mdio_write(tp, 0x06, 0x2292);
-        rtl8168_mdio_write(tp, 0x06, 0x021b);
-        rtl8168_mdio_write(tp, 0x06, 0x13fd);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xad20);
-        rtl8168_mdio_write(tp, 0x06, 0x1af6);
-        rtl8168_mdio_write(tp, 0x06, 0x20e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0x022b);
-        rtl8168_mdio_write(tp, 0x06, 0x1e02);
-        rtl8168_mdio_write(tp, 0x06, 0x82ae);
-        rtl8168_mdio_write(tp, 0x06, 0x0203);
-        rtl8168_mdio_write(tp, 0x06, 0xc002);
-        rtl8168_mdio_write(tp, 0x06, 0x827d);
-        rtl8168_mdio_write(tp, 0x06, 0x022e);
-        rtl8168_mdio_write(tp, 0x06, 0x6f02);
-        rtl8168_mdio_write(tp, 0x06, 0x047b);
-        rtl8168_mdio_write(tp, 0x06, 0x022f);
-        rtl8168_mdio_write(tp, 0x06, 0x9ae0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xad21);
-        rtl8168_mdio_write(tp, 0x06, 0x0bf6);
-        rtl8168_mdio_write(tp, 0x06, 0x21e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0x0281);
-        rtl8168_mdio_write(tp, 0x06, 0x9002);
-        rtl8168_mdio_write(tp, 0x06, 0x1cd9);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ead);
-        rtl8168_mdio_write(tp, 0x06, 0x2208);
-        rtl8168_mdio_write(tp, 0x06, 0xf622);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e02);
-        rtl8168_mdio_write(tp, 0x06, 0x35f4);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ead);
-        rtl8168_mdio_write(tp, 0x06, 0x2308);
-        rtl8168_mdio_write(tp, 0x06, 0xf623);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e02);
-        rtl8168_mdio_write(tp, 0x06, 0x31e8);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ead);
-        rtl8168_mdio_write(tp, 0x06, 0x2405);
-        rtl8168_mdio_write(tp, 0x06, 0xf624);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ee0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xad25);
-        rtl8168_mdio_write(tp, 0x06, 0x05f6);
-        rtl8168_mdio_write(tp, 0x06, 0x25e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b8e);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ead);
-        rtl8168_mdio_write(tp, 0x06, 0x2608);
-        rtl8168_mdio_write(tp, 0x06, 0xf626);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e02);
-        rtl8168_mdio_write(tp, 0x06, 0x2d8a);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x8ead);
-        rtl8168_mdio_write(tp, 0x06, 0x2705);
-        rtl8168_mdio_write(tp, 0x06, 0xf627);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x8e02);
-        rtl8168_mdio_write(tp, 0x06, 0x0386);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8fa);
-        rtl8168_mdio_write(tp, 0x06, 0xef69);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-        rtl8168_mdio_write(tp, 0x06, 0x00e1);
-        rtl8168_mdio_write(tp, 0x06, 0xe001);
-        rtl8168_mdio_write(tp, 0x06, 0xad27);
-        rtl8168_mdio_write(tp, 0x06, 0x32e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b40);
-        rtl8168_mdio_write(tp, 0x06, 0xf720);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x40bf);
-        rtl8168_mdio_write(tp, 0x06, 0x32c1);
-        rtl8168_mdio_write(tp, 0x06, 0x0239);
-        rtl8168_mdio_write(tp, 0x06, 0xf4ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2821);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-        rtl8168_mdio_write(tp, 0x06, 0x20e1);
-        rtl8168_mdio_write(tp, 0x06, 0xe021);
-        rtl8168_mdio_write(tp, 0x06, 0xad20);
-        rtl8168_mdio_write(tp, 0x06, 0x18e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b40);
-        rtl8168_mdio_write(tp, 0x06, 0xf620);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x40ee);
-        rtl8168_mdio_write(tp, 0x06, 0x8b3b);
-        rtl8168_mdio_write(tp, 0x06, 0xffe0);
-        rtl8168_mdio_write(tp, 0x06, 0x8a8a);
-        rtl8168_mdio_write(tp, 0x06, 0xe18a);
-        rtl8168_mdio_write(tp, 0x06, 0x8be4);
-        rtl8168_mdio_write(tp, 0x06, 0xe000);
-        rtl8168_mdio_write(tp, 0x06, 0xe5e0);
-        rtl8168_mdio_write(tp, 0x06, 0x01ef);
-        rtl8168_mdio_write(tp, 0x06, 0x96fe);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8f9);
-        rtl8168_mdio_write(tp, 0x06, 0xface);
-        rtl8168_mdio_write(tp, 0x06, 0xfaef);
-        rtl8168_mdio_write(tp, 0x06, 0x69fa);
-        rtl8168_mdio_write(tp, 0x06, 0xd401);
-        rtl8168_mdio_write(tp, 0x06, 0x55b4);
-        rtl8168_mdio_write(tp, 0x06, 0xfebf);
-        rtl8168_mdio_write(tp, 0x06, 0x1c5e);
-        rtl8168_mdio_write(tp, 0x06, 0x0239);
-        rtl8168_mdio_write(tp, 0x06, 0xf4ac);
-        rtl8168_mdio_write(tp, 0x06, 0x280b);
-        rtl8168_mdio_write(tp, 0x06, 0xbf1c);
-        rtl8168_mdio_write(tp, 0x06, 0x5b02);
-        rtl8168_mdio_write(tp, 0x06, 0x39f4);
-        rtl8168_mdio_write(tp, 0x06, 0xac28);
-        rtl8168_mdio_write(tp, 0x06, 0x49ae);
-        rtl8168_mdio_write(tp, 0x06, 0x64bf);
-        rtl8168_mdio_write(tp, 0x06, 0x1c5b);
-        rtl8168_mdio_write(tp, 0x06, 0x0239);
-        rtl8168_mdio_write(tp, 0x06, 0xf4ac);
-        rtl8168_mdio_write(tp, 0x06, 0x285b);
-        rtl8168_mdio_write(tp, 0x06, 0xd000);
-        rtl8168_mdio_write(tp, 0x06, 0x0282);
-        rtl8168_mdio_write(tp, 0x06, 0x62ac);
-        rtl8168_mdio_write(tp, 0x06, 0x2105);
-        rtl8168_mdio_write(tp, 0x06, 0xac22);
-        rtl8168_mdio_write(tp, 0x06, 0x02ae);
-        rtl8168_mdio_write(tp, 0x06, 0x4ebf);
-        rtl8168_mdio_write(tp, 0x06, 0xe0c4);
-        rtl8168_mdio_write(tp, 0x06, 0xbe85);
-        rtl8168_mdio_write(tp, 0x06, 0xecd2);
-        rtl8168_mdio_write(tp, 0x06, 0x04d8);
-        rtl8168_mdio_write(tp, 0x06, 0x19d9);
-        rtl8168_mdio_write(tp, 0x06, 0x1907);
-        rtl8168_mdio_write(tp, 0x06, 0xdc19);
-        rtl8168_mdio_write(tp, 0x06, 0xdd19);
-        rtl8168_mdio_write(tp, 0x06, 0x0789);
-        rtl8168_mdio_write(tp, 0x06, 0x89ef);
-        rtl8168_mdio_write(tp, 0x06, 0x645e);
-        rtl8168_mdio_write(tp, 0x06, 0x07ff);
-        rtl8168_mdio_write(tp, 0x06, 0x0d65);
-        rtl8168_mdio_write(tp, 0x06, 0x5cf8);
-        rtl8168_mdio_write(tp, 0x06, 0x001e);
-        rtl8168_mdio_write(tp, 0x06, 0x46dc);
-        rtl8168_mdio_write(tp, 0x06, 0x19dd);
-        rtl8168_mdio_write(tp, 0x06, 0x19b2);
-        rtl8168_mdio_write(tp, 0x06, 0xe2d4);
-        rtl8168_mdio_write(tp, 0x06, 0x0001);
-        rtl8168_mdio_write(tp, 0x06, 0xbf1c);
-        rtl8168_mdio_write(tp, 0x06, 0x5b02);
-        rtl8168_mdio_write(tp, 0x06, 0x3a21);
-        rtl8168_mdio_write(tp, 0x06, 0xae1d);
-        rtl8168_mdio_write(tp, 0x06, 0xbee0);
-        rtl8168_mdio_write(tp, 0x06, 0xc4bf);
-        rtl8168_mdio_write(tp, 0x06, 0x85ec);
-        rtl8168_mdio_write(tp, 0x06, 0xd204);
-        rtl8168_mdio_write(tp, 0x06, 0xd819);
-        rtl8168_mdio_write(tp, 0x06, 0xd919);
-        rtl8168_mdio_write(tp, 0x06, 0x07dc);
-        rtl8168_mdio_write(tp, 0x06, 0x19dd);
-        rtl8168_mdio_write(tp, 0x06, 0x1907);
-        rtl8168_mdio_write(tp, 0x06, 0xb2f4);
-        rtl8168_mdio_write(tp, 0x06, 0xd400);
-        rtl8168_mdio_write(tp, 0x06, 0x00bf);
-        rtl8168_mdio_write(tp, 0x06, 0x1c5b);
-        rtl8168_mdio_write(tp, 0x06, 0x023a);
-        rtl8168_mdio_write(tp, 0x06, 0x21fe);
-        rtl8168_mdio_write(tp, 0x06, 0xef96);
-        rtl8168_mdio_write(tp, 0x06, 0xfec6);
-        rtl8168_mdio_write(tp, 0x06, 0xfefd);
-        rtl8168_mdio_write(tp, 0x06, 0xfc05);
-        rtl8168_mdio_write(tp, 0x06, 0xf9e2);
-        rtl8168_mdio_write(tp, 0x06, 0xe0ea);
-        rtl8168_mdio_write(tp, 0x06, 0xe3e0);
-        rtl8168_mdio_write(tp, 0x06, 0xeb5a);
-        rtl8168_mdio_write(tp, 0x06, 0x070c);
-        rtl8168_mdio_write(tp, 0x06, 0x031e);
-        rtl8168_mdio_write(tp, 0x06, 0x20e6);
-        rtl8168_mdio_write(tp, 0x06, 0xe0ea);
-        rtl8168_mdio_write(tp, 0x06, 0xe7e0);
-        rtl8168_mdio_write(tp, 0x06, 0xebe0);
-        rtl8168_mdio_write(tp, 0x06, 0xe0fc);
-        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-        rtl8168_mdio_write(tp, 0x06, 0xfdfd);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xfaef);
-        rtl8168_mdio_write(tp, 0x06, 0x69e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b80);
-        rtl8168_mdio_write(tp, 0x06, 0xad27);
-        rtl8168_mdio_write(tp, 0x06, 0x22bf);
-        rtl8168_mdio_write(tp, 0x06, 0x47ba);
-        rtl8168_mdio_write(tp, 0x06, 0x0239);
-        rtl8168_mdio_write(tp, 0x06, 0xf4e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b44);
-        rtl8168_mdio_write(tp, 0x06, 0x1f01);
-        rtl8168_mdio_write(tp, 0x06, 0x9e15);
-        rtl8168_mdio_write(tp, 0x06, 0xe58b);
-        rtl8168_mdio_write(tp, 0x06, 0x44ad);
-        rtl8168_mdio_write(tp, 0x06, 0x2907);
-        rtl8168_mdio_write(tp, 0x06, 0xac28);
-        rtl8168_mdio_write(tp, 0x06, 0x04d1);
-        rtl8168_mdio_write(tp, 0x06, 0x01ae);
-        rtl8168_mdio_write(tp, 0x06, 0x02d1);
-        rtl8168_mdio_write(tp, 0x06, 0x00bf);
-        rtl8168_mdio_write(tp, 0x06, 0x8342);
-        rtl8168_mdio_write(tp, 0x06, 0x023a);
-        rtl8168_mdio_write(tp, 0x06, 0x21ef);
-        rtl8168_mdio_write(tp, 0x06, 0x96fe);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b85);
-        rtl8168_mdio_write(tp, 0x06, 0xad26);
-        rtl8168_mdio_write(tp, 0x06, 0x30e0);
-        rtl8168_mdio_write(tp, 0x06, 0xe036);
-        rtl8168_mdio_write(tp, 0x06, 0xe1e0);
-        rtl8168_mdio_write(tp, 0x06, 0x37e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b3f);
-        rtl8168_mdio_write(tp, 0x06, 0x1f10);
-        rtl8168_mdio_write(tp, 0x06, 0x9e23);
-        rtl8168_mdio_write(tp, 0x06, 0xe48b);
-        rtl8168_mdio_write(tp, 0x06, 0x3fac);
-        rtl8168_mdio_write(tp, 0x06, 0x200b);
-        rtl8168_mdio_write(tp, 0x06, 0xac21);
-        rtl8168_mdio_write(tp, 0x06, 0x0dac);
-        rtl8168_mdio_write(tp, 0x06, 0x250f);
-        rtl8168_mdio_write(tp, 0x06, 0xac27);
-        rtl8168_mdio_write(tp, 0x06, 0x11ae);
-        rtl8168_mdio_write(tp, 0x06, 0x1202);
-        rtl8168_mdio_write(tp, 0x06, 0x2cb5);
-        rtl8168_mdio_write(tp, 0x06, 0xae0d);
-        rtl8168_mdio_write(tp, 0x06, 0x0282);
-        rtl8168_mdio_write(tp, 0x06, 0xe7ae);
-        rtl8168_mdio_write(tp, 0x06, 0x0802);
-        rtl8168_mdio_write(tp, 0x06, 0x2cd7);
-        rtl8168_mdio_write(tp, 0x06, 0xae03);
-        rtl8168_mdio_write(tp, 0x06, 0x022c);
-        rtl8168_mdio_write(tp, 0x06, 0xeafc);
-        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-        rtl8168_mdio_write(tp, 0x06, 0xfaef);
-        rtl8168_mdio_write(tp, 0x06, 0x6902);
-        rtl8168_mdio_write(tp, 0x06, 0x8304);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-        rtl8168_mdio_write(tp, 0x06, 0x14e1);
-        rtl8168_mdio_write(tp, 0x06, 0xe015);
-        rtl8168_mdio_write(tp, 0x06, 0xad26);
-        rtl8168_mdio_write(tp, 0x06, 0x08d1);
-        rtl8168_mdio_write(tp, 0x06, 0x1ebf);
-        rtl8168_mdio_write(tp, 0x06, 0x2d47);
-        rtl8168_mdio_write(tp, 0x06, 0x023a);
-        rtl8168_mdio_write(tp, 0x06, 0x21ef);
-        rtl8168_mdio_write(tp, 0x06, 0x96fe);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-        rtl8168_mdio_write(tp, 0x06, 0x8b85);
-        rtl8168_mdio_write(tp, 0x06, 0xad27);
-        rtl8168_mdio_write(tp, 0x06, 0x2fd0);
-        rtl8168_mdio_write(tp, 0x06, 0x0b02);
-        rtl8168_mdio_write(tp, 0x06, 0x3826);
-        rtl8168_mdio_write(tp, 0x06, 0x5882);
-        rtl8168_mdio_write(tp, 0x06, 0x7882);
-        rtl8168_mdio_write(tp, 0x06, 0x9f24);
-        rtl8168_mdio_write(tp, 0x06, 0xe08b);
-        rtl8168_mdio_write(tp, 0x06, 0x32e1);
-        rtl8168_mdio_write(tp, 0x06, 0x8b33);
-        rtl8168_mdio_write(tp, 0x06, 0x1f10);
-        rtl8168_mdio_write(tp, 0x06, 0x9e1a);
-        rtl8168_mdio_write(tp, 0x06, 0x10e4);
-        rtl8168_mdio_write(tp, 0x06, 0x8b32);
-        rtl8168_mdio_write(tp, 0x06, 0xe0e0);
-        rtl8168_mdio_write(tp, 0x06, 0x28e1);
-        rtl8168_mdio_write(tp, 0x06, 0xe029);
-        rtl8168_mdio_write(tp, 0x06, 0xf72c);
-        rtl8168_mdio_write(tp, 0x06, 0xe4e0);
-        rtl8168_mdio_write(tp, 0x06, 0x28e5);
-        rtl8168_mdio_write(tp, 0x06, 0xe029);
-        rtl8168_mdio_write(tp, 0x06, 0xf62c);
-        rtl8168_mdio_write(tp, 0x06, 0xe4e0);
-        rtl8168_mdio_write(tp, 0x06, 0x28e5);
-        rtl8168_mdio_write(tp, 0x06, 0xe029);
-        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-        rtl8168_mdio_write(tp, 0x06, 0x00e1);
-        rtl8168_mdio_write(tp, 0x06, 0x4077);
-        rtl8168_mdio_write(tp, 0x06, 0xe140);
-        rtl8168_mdio_write(tp, 0x06, 0xbbe0);
-        rtl8168_mdio_write(tp, 0x06, 0x2a00);
-        rtl8168_mdio_write(tp, 0x05, 0xe142);
-        gphy_val = rtl8168_mdio_read(tp, 0x06);
-        gphy_val |= BIT_0;
-        rtl8168_mdio_write(tp,0x06, gphy_val);
-        rtl8168_mdio_write(tp, 0x05, 0xe140);
-        gphy_val = rtl8168_mdio_read(tp, 0x06);
-        gphy_val |= BIT_0;
-        rtl8168_mdio_write(tp,0x06, gphy_val);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        rtl8168_mdio_write(tp,0x1f, 0x0005);
-        for (i = 0; i < 200; i++) {
-                udelay(100);
-                gphy_val = rtl8168_mdio_read(tp, 0x00);
-                if (gphy_val & BIT_7)
-                        break;
-        }
-        rtl8168_mdio_write(tp,0x1f, 0x0007);
-        rtl8168_mdio_write(tp,0x1e, 0x0023);
-        gphy_val = rtl8168_mdio_read(tp, 0x17);
-        gphy_val |= BIT_1;
-        if (tp->RequiredSecLanDonglePatch)
-                gphy_val &= ~BIT_2;
-        rtl8168_mdio_write(tp,0x17, gphy_val);
-        rtl8168_mdio_write(tp,0x1f, 0x0000);
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0003);
-        rtl8168_mdio_write(tp, 0x09, 0xA20F);
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0003);
-        rtl8168_mdio_write(tp, 0x01, 0x328A);
-        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-        rtl8168_mdio_write(tp,0x1f, 0x0000);
-        rtl8168_mdio_write(tp,0x00, 0x9200);
-}
-
-static void
-rtl8168_set_phy_mcu_8168g_1(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        unsigned int gphy_val;
-
-        rtl8168_set_phy_mcu_patch_request(tp);
-        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x8146);
-        rtl8168_mdio_write(tp, 0x14, 0x2300);
-        rtl8168_mdio_write(tp, 0x13, 0xB820);
-        rtl8168_mdio_write(tp, 0x14, 0x0210);
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0xB820);
-        rtl8168_mdio_write(tp, 0x14, 0x0290);
-        rtl8168_mdio_write(tp, 0x13, 0xA012);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-        rtl8168_mdio_write(tp, 0x13, 0xA014);
-        rtl8168_mdio_write(tp, 0x14, 0x2c04);
-        rtl8168_mdio_write(tp, 0x14, 0x2c0c);
-        rtl8168_mdio_write(tp, 0x14, 0x2c6c);
-        rtl8168_mdio_write(tp, 0x14, 0x2d0d);
-        rtl8168_mdio_write(tp, 0x14, 0x31ce);
-        rtl8168_mdio_write(tp, 0x14, 0x506d);
-        rtl8168_mdio_write(tp, 0x14, 0xd708);
-        rtl8168_mdio_write(tp, 0x14, 0x3108);
-        rtl8168_mdio_write(tp, 0x14, 0x106d);
-        rtl8168_mdio_write(tp, 0x14, 0x1560);
-        rtl8168_mdio_write(tp, 0x14, 0x15a9);
-        rtl8168_mdio_write(tp, 0x14, 0x206e);
-        rtl8168_mdio_write(tp, 0x14, 0x175b);
-        rtl8168_mdio_write(tp, 0x14, 0x6062);
-        rtl8168_mdio_write(tp, 0x14, 0xd700);
-        rtl8168_mdio_write(tp, 0x14, 0x5fae);
-        rtl8168_mdio_write(tp, 0x14, 0xd708);
-        rtl8168_mdio_write(tp, 0x14, 0x3107);
-        rtl8168_mdio_write(tp, 0x14, 0x4c1e);
-        rtl8168_mdio_write(tp, 0x14, 0x4169);
-        rtl8168_mdio_write(tp, 0x14, 0x316a);
-        rtl8168_mdio_write(tp, 0x14, 0x0c19);
-        rtl8168_mdio_write(tp, 0x14, 0x31aa);
-        rtl8168_mdio_write(tp, 0x14, 0x0c19);
-        rtl8168_mdio_write(tp, 0x14, 0x2c1b);
-        rtl8168_mdio_write(tp, 0x14, 0x5e62);
-        rtl8168_mdio_write(tp, 0x14, 0x26b5);
-        rtl8168_mdio_write(tp, 0x14, 0x31ab);
-        rtl8168_mdio_write(tp, 0x14, 0x5c1e);
-        rtl8168_mdio_write(tp, 0x14, 0x2c0c);
-        rtl8168_mdio_write(tp, 0x14, 0xc040);
-        rtl8168_mdio_write(tp, 0x14, 0x8808);
-        rtl8168_mdio_write(tp, 0x14, 0xc520);
-        rtl8168_mdio_write(tp, 0x14, 0xc421);
-        rtl8168_mdio_write(tp, 0x14, 0xd05a);
-        rtl8168_mdio_write(tp, 0x14, 0xd19a);
-        rtl8168_mdio_write(tp, 0x14, 0xd709);
-        rtl8168_mdio_write(tp, 0x14, 0x608f);
-        rtl8168_mdio_write(tp, 0x14, 0xd06b);
-        rtl8168_mdio_write(tp, 0x14, 0xd18a);
-        rtl8168_mdio_write(tp, 0x14, 0x2c2c);
-        rtl8168_mdio_write(tp, 0x14, 0xd0be);
-        rtl8168_mdio_write(tp, 0x14, 0xd188);
-        rtl8168_mdio_write(tp, 0x14, 0x2c2c);
-        rtl8168_mdio_write(tp, 0x14, 0xd708);
-        rtl8168_mdio_write(tp, 0x14, 0x4072);
-        rtl8168_mdio_write(tp, 0x14, 0xc104);
-        rtl8168_mdio_write(tp, 0x14, 0x2c3e);
-        rtl8168_mdio_write(tp, 0x14, 0x4076);
-        rtl8168_mdio_write(tp, 0x14, 0xc110);
-        rtl8168_mdio_write(tp, 0x14, 0x2c3e);
-        rtl8168_mdio_write(tp, 0x14, 0x4071);
-        rtl8168_mdio_write(tp, 0x14, 0xc102);
-        rtl8168_mdio_write(tp, 0x14, 0x2c3e);
-        rtl8168_mdio_write(tp, 0x14, 0x4070);
-        rtl8168_mdio_write(tp, 0x14, 0xc101);
-        rtl8168_mdio_write(tp, 0x14, 0x2c3e);
-        rtl8168_mdio_write(tp, 0x14, 0x175b);
-        rtl8168_mdio_write(tp, 0x14, 0xd709);
-        rtl8168_mdio_write(tp, 0x14, 0x3390);
-        rtl8168_mdio_write(tp, 0x14, 0x5c39);
-        rtl8168_mdio_write(tp, 0x14, 0x2c4e);
-        rtl8168_mdio_write(tp, 0x14, 0x175b);
-        rtl8168_mdio_write(tp, 0x14, 0xd708);
-        rtl8168_mdio_write(tp, 0x14, 0x6193);
-        rtl8168_mdio_write(tp, 0x14, 0xd709);
-        rtl8168_mdio_write(tp, 0x14, 0x5f9d);
-        rtl8168_mdio_write(tp, 0x14, 0x408b);
-        rtl8168_mdio_write(tp, 0x14, 0xd71e);
-        rtl8168_mdio_write(tp, 0x14, 0x6042);
-        rtl8168_mdio_write(tp, 0x14, 0xb401);
-        rtl8168_mdio_write(tp, 0x14, 0x175b);
-        rtl8168_mdio_write(tp, 0x14, 0xd708);
-        rtl8168_mdio_write(tp, 0x14, 0x6073);
-        rtl8168_mdio_write(tp, 0x14, 0x5fbc);
-        rtl8168_mdio_write(tp, 0x14, 0x2c4d);
-        rtl8168_mdio_write(tp, 0x14, 0x26ed);
-        rtl8168_mdio_write(tp, 0x14, 0xb280);
-        rtl8168_mdio_write(tp, 0x14, 0xa841);
-        rtl8168_mdio_write(tp, 0x14, 0x9420);
-        rtl8168_mdio_write(tp, 0x14, 0x8710);
-        rtl8168_mdio_write(tp, 0x14, 0xd709);
-        rtl8168_mdio_write(tp, 0x14, 0x42ec);
-        rtl8168_mdio_write(tp, 0x14, 0x606d);
-        rtl8168_mdio_write(tp, 0x14, 0xd207);
-        rtl8168_mdio_write(tp, 0x14, 0x2c57);
-        rtl8168_mdio_write(tp, 0x14, 0xd203);
-        rtl8168_mdio_write(tp, 0x14, 0x33ff);
-        rtl8168_mdio_write(tp, 0x14, 0x563b);
-        rtl8168_mdio_write(tp, 0x14, 0x3275);
-        rtl8168_mdio_write(tp, 0x14, 0x7c5e);
-        rtl8168_mdio_write(tp, 0x14, 0xb240);
-        rtl8168_mdio_write(tp, 0x14, 0xb402);
-        rtl8168_mdio_write(tp, 0x14, 0x263b);
-        rtl8168_mdio_write(tp, 0x14, 0x6096);
-        rtl8168_mdio_write(tp, 0x14, 0xb240);
-        rtl8168_mdio_write(tp, 0x14, 0xb406);
-        rtl8168_mdio_write(tp, 0x14, 0x263b);
-        rtl8168_mdio_write(tp, 0x14, 0x31d7);
-        rtl8168_mdio_write(tp, 0x14, 0x7c67);
-        rtl8168_mdio_write(tp, 0x14, 0xb240);
-        rtl8168_mdio_write(tp, 0x14, 0xb40e);
-        rtl8168_mdio_write(tp, 0x14, 0x263b);
-        rtl8168_mdio_write(tp, 0x14, 0xb410);
-        rtl8168_mdio_write(tp, 0x14, 0x8802);
-        rtl8168_mdio_write(tp, 0x14, 0xb240);
-        rtl8168_mdio_write(tp, 0x14, 0x940e);
-        rtl8168_mdio_write(tp, 0x14, 0x263b);
-        rtl8168_mdio_write(tp, 0x14, 0xba04);
-        rtl8168_mdio_write(tp, 0x14, 0x1cd6);
-        rtl8168_mdio_write(tp, 0x14, 0xa902);
-        rtl8168_mdio_write(tp, 0x14, 0xd711);
-        rtl8168_mdio_write(tp, 0x14, 0x4045);
-        rtl8168_mdio_write(tp, 0x14, 0xa980);
-        rtl8168_mdio_write(tp, 0x14, 0x3003);
-        rtl8168_mdio_write(tp, 0x14, 0x59b1);
-        rtl8168_mdio_write(tp, 0x14, 0xa540);
-        rtl8168_mdio_write(tp, 0x14, 0xa601);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x4043);
-        rtl8168_mdio_write(tp, 0x14, 0xa910);
-        rtl8168_mdio_write(tp, 0x14, 0xd711);
-        rtl8168_mdio_write(tp, 0x14, 0x60a0);
-        rtl8168_mdio_write(tp, 0x14, 0xca33);
-        rtl8168_mdio_write(tp, 0x14, 0xcb33);
-        rtl8168_mdio_write(tp, 0x14, 0xa941);
-        rtl8168_mdio_write(tp, 0x14, 0x2c82);
-        rtl8168_mdio_write(tp, 0x14, 0xcaff);
-        rtl8168_mdio_write(tp, 0x14, 0xcbff);
-        rtl8168_mdio_write(tp, 0x14, 0xa921);
-        rtl8168_mdio_write(tp, 0x14, 0xce02);
-        rtl8168_mdio_write(tp, 0x14, 0xe070);
-        rtl8168_mdio_write(tp, 0x14, 0x0f10);
-        rtl8168_mdio_write(tp, 0x14, 0xaf01);
-        rtl8168_mdio_write(tp, 0x14, 0x8f01);
-        rtl8168_mdio_write(tp, 0x14, 0x1766);
-        rtl8168_mdio_write(tp, 0x14, 0x8e02);
-        rtl8168_mdio_write(tp, 0x14, 0x1787);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x609c);
-        rtl8168_mdio_write(tp, 0x14, 0xd71e);
-        rtl8168_mdio_write(tp, 0x14, 0x7fa4);
-        rtl8168_mdio_write(tp, 0x14, 0x2cd4);
-        rtl8168_mdio_write(tp, 0x14, 0x1ce9);
-        rtl8168_mdio_write(tp, 0x14, 0xce04);
-        rtl8168_mdio_write(tp, 0x14, 0xe070);
-        rtl8168_mdio_write(tp, 0x14, 0x0f20);
-        rtl8168_mdio_write(tp, 0x14, 0xaf01);
-        rtl8168_mdio_write(tp, 0x14, 0x8f01);
-        rtl8168_mdio_write(tp, 0x14, 0x1766);
-        rtl8168_mdio_write(tp, 0x14, 0x8e04);
-        rtl8168_mdio_write(tp, 0x14, 0x6044);
-        rtl8168_mdio_write(tp, 0x14, 0x2cd4);
-        rtl8168_mdio_write(tp, 0x14, 0xa520);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x4043);
-        rtl8168_mdio_write(tp, 0x14, 0x2cc1);
-        rtl8168_mdio_write(tp, 0x14, 0xe00f);
-        rtl8168_mdio_write(tp, 0x14, 0x0501);
-        rtl8168_mdio_write(tp, 0x14, 0x1cef);
-        rtl8168_mdio_write(tp, 0x14, 0xb801);
-        rtl8168_mdio_write(tp, 0x14, 0xd71e);
-        rtl8168_mdio_write(tp, 0x14, 0x4060);
-        rtl8168_mdio_write(tp, 0x14, 0x7fc4);
-        rtl8168_mdio_write(tp, 0x14, 0x2cd4);
-        rtl8168_mdio_write(tp, 0x14, 0x1cf5);
-        rtl8168_mdio_write(tp, 0x14, 0xe00f);
-        rtl8168_mdio_write(tp, 0x14, 0x0502);
-        rtl8168_mdio_write(tp, 0x14, 0x1cef);
-        rtl8168_mdio_write(tp, 0x14, 0xb802);
-        rtl8168_mdio_write(tp, 0x14, 0xd71e);
-        rtl8168_mdio_write(tp, 0x14, 0x4061);
-        rtl8168_mdio_write(tp, 0x14, 0x7fc4);
-        rtl8168_mdio_write(tp, 0x14, 0x2cd4);
-        rtl8168_mdio_write(tp, 0x14, 0x1cf5);
-        rtl8168_mdio_write(tp, 0x14, 0xe00f);
-        rtl8168_mdio_write(tp, 0x14, 0x0504);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x6099);
-        rtl8168_mdio_write(tp, 0x14, 0xd71e);
-        rtl8168_mdio_write(tp, 0x14, 0x7fa4);
-        rtl8168_mdio_write(tp, 0x14, 0x2cd4);
-        rtl8168_mdio_write(tp, 0x14, 0xc17f);
-        rtl8168_mdio_write(tp, 0x14, 0xc200);
-        rtl8168_mdio_write(tp, 0x14, 0xc43f);
-        rtl8168_mdio_write(tp, 0x14, 0xcc03);
-        rtl8168_mdio_write(tp, 0x14, 0xa701);
-        rtl8168_mdio_write(tp, 0x14, 0xa510);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x4018);
-        rtl8168_mdio_write(tp, 0x14, 0x9910);
-        rtl8168_mdio_write(tp, 0x14, 0x8510);
-        rtl8168_mdio_write(tp, 0x14, 0x2860);
-        rtl8168_mdio_write(tp, 0x14, 0xe00f);
-        rtl8168_mdio_write(tp, 0x14, 0x0504);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x6099);
-        rtl8168_mdio_write(tp, 0x14, 0xd71e);
-        rtl8168_mdio_write(tp, 0x14, 0x7fa4);
-        rtl8168_mdio_write(tp, 0x14, 0x2cd4);
-        rtl8168_mdio_write(tp, 0x14, 0xa608);
-        rtl8168_mdio_write(tp, 0x14, 0xc17d);
-        rtl8168_mdio_write(tp, 0x14, 0xc200);
-        rtl8168_mdio_write(tp, 0x14, 0xc43f);
-        rtl8168_mdio_write(tp, 0x14, 0xcc03);
-        rtl8168_mdio_write(tp, 0x14, 0xa701);
-        rtl8168_mdio_write(tp, 0x14, 0xa510);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x4018);
-        rtl8168_mdio_write(tp, 0x14, 0x9910);
-        rtl8168_mdio_write(tp, 0x14, 0x8510);
-        rtl8168_mdio_write(tp, 0x14, 0x2926);
-        rtl8168_mdio_write(tp, 0x14, 0x1792);
-        rtl8168_mdio_write(tp, 0x14, 0x27db);
-        rtl8168_mdio_write(tp, 0x14, 0xc000);
-        rtl8168_mdio_write(tp, 0x14, 0xc100);
-        rtl8168_mdio_write(tp, 0x14, 0xc200);
-        rtl8168_mdio_write(tp, 0x14, 0xc300);
-        rtl8168_mdio_write(tp, 0x14, 0xc400);
-        rtl8168_mdio_write(tp, 0x14, 0xc500);
-        rtl8168_mdio_write(tp, 0x14, 0xc600);
-        rtl8168_mdio_write(tp, 0x14, 0xc7c1);
-        rtl8168_mdio_write(tp, 0x14, 0xc800);
-        rtl8168_mdio_write(tp, 0x14, 0xcc00);
-        rtl8168_mdio_write(tp, 0x14, 0x0800);
-        rtl8168_mdio_write(tp, 0x14, 0xca0f);
-        rtl8168_mdio_write(tp, 0x14, 0xcbff);
-        rtl8168_mdio_write(tp, 0x14, 0xa901);
-        rtl8168_mdio_write(tp, 0x14, 0x8902);
-        rtl8168_mdio_write(tp, 0x14, 0xc900);
-        rtl8168_mdio_write(tp, 0x14, 0xca00);
-        rtl8168_mdio_write(tp, 0x14, 0xcb00);
-        rtl8168_mdio_write(tp, 0x14, 0x0800);
-        rtl8168_mdio_write(tp, 0x14, 0xb804);
-        rtl8168_mdio_write(tp, 0x14, 0x0800);
-        rtl8168_mdio_write(tp, 0x14, 0xd71e);
-        rtl8168_mdio_write(tp, 0x14, 0x6044);
-        rtl8168_mdio_write(tp, 0x14, 0x9804);
-        rtl8168_mdio_write(tp, 0x14, 0x0800);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x6099);
-        rtl8168_mdio_write(tp, 0x14, 0xd71e);
-        rtl8168_mdio_write(tp, 0x14, 0x7fa4);
-        rtl8168_mdio_write(tp, 0x14, 0x2cd4);
-        rtl8168_mdio_write(tp, 0x14, 0x0800);
-        rtl8168_mdio_write(tp, 0x14, 0xa510);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x6098);
-        rtl8168_mdio_write(tp, 0x14, 0xd71e);
-        rtl8168_mdio_write(tp, 0x14, 0x7fa4);
-        rtl8168_mdio_write(tp, 0x14, 0x2cd4);
-        rtl8168_mdio_write(tp, 0x14, 0x8510);
-        rtl8168_mdio_write(tp, 0x14, 0x0800);
-        rtl8168_mdio_write(tp, 0x14, 0xd711);
-        rtl8168_mdio_write(tp, 0x14, 0x3003);
-        rtl8168_mdio_write(tp, 0x14, 0x1d01);
-        rtl8168_mdio_write(tp, 0x14, 0x2d0b);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x60be);
-        rtl8168_mdio_write(tp, 0x14, 0xe060);
-        rtl8168_mdio_write(tp, 0x14, 0x0920);
-        rtl8168_mdio_write(tp, 0x14, 0x1cd6);
-        rtl8168_mdio_write(tp, 0x14, 0x2c89);
-        rtl8168_mdio_write(tp, 0x14, 0xd71e);
-        rtl8168_mdio_write(tp, 0x14, 0x3063);
-        rtl8168_mdio_write(tp, 0x14, 0x1948);
-        rtl8168_mdio_write(tp, 0x14, 0x288a);
-        rtl8168_mdio_write(tp, 0x14, 0x1cd6);
-        rtl8168_mdio_write(tp, 0x14, 0x29bd);
-        rtl8168_mdio_write(tp, 0x14, 0xa802);
-        rtl8168_mdio_write(tp, 0x14, 0xa303);
-        rtl8168_mdio_write(tp, 0x14, 0x843f);
-        rtl8168_mdio_write(tp, 0x14, 0x81ff);
-        rtl8168_mdio_write(tp, 0x14, 0x8208);
-        rtl8168_mdio_write(tp, 0x14, 0xa201);
-        rtl8168_mdio_write(tp, 0x14, 0xc001);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x30a0);
-        rtl8168_mdio_write(tp, 0x14, 0x0d1c);
-        rtl8168_mdio_write(tp, 0x14, 0x30a0);
-        rtl8168_mdio_write(tp, 0x14, 0x3d13);
-        rtl8168_mdio_write(tp, 0x14, 0xd71e);
-        rtl8168_mdio_write(tp, 0x14, 0x7f4c);
-        rtl8168_mdio_write(tp, 0x14, 0x2ab6);
-        rtl8168_mdio_write(tp, 0x14, 0xe003);
-        rtl8168_mdio_write(tp, 0x14, 0x0202);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x6090);
-        rtl8168_mdio_write(tp, 0x14, 0xd71e);
-        rtl8168_mdio_write(tp, 0x14, 0x7fac);
-        rtl8168_mdio_write(tp, 0x14, 0x2ab6);
-        rtl8168_mdio_write(tp, 0x14, 0xa20c);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x6091);
-        rtl8168_mdio_write(tp, 0x14, 0xd71e);
-        rtl8168_mdio_write(tp, 0x14, 0x7fac);
-        rtl8168_mdio_write(tp, 0x14, 0x2ab6);
-        rtl8168_mdio_write(tp, 0x14, 0x820e);
-        rtl8168_mdio_write(tp, 0x14, 0xa3e0);
-        rtl8168_mdio_write(tp, 0x14, 0xa520);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x609d);
-        rtl8168_mdio_write(tp, 0x14, 0xd71e);
-        rtl8168_mdio_write(tp, 0x14, 0x7fac);
-        rtl8168_mdio_write(tp, 0x14, 0x2ab6);
-        rtl8168_mdio_write(tp, 0x14, 0x8520);
-        rtl8168_mdio_write(tp, 0x14, 0x6703);
-        rtl8168_mdio_write(tp, 0x14, 0x2d34);
-        rtl8168_mdio_write(tp, 0x14, 0xa13e);
-        rtl8168_mdio_write(tp, 0x14, 0xc001);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x4000);
-        rtl8168_mdio_write(tp, 0x14, 0x6046);
-        rtl8168_mdio_write(tp, 0x14, 0x2d0d);
-        rtl8168_mdio_write(tp, 0x14, 0xa43f);
-        rtl8168_mdio_write(tp, 0x14, 0xa101);
-        rtl8168_mdio_write(tp, 0x14, 0xc020);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x3121);
-        rtl8168_mdio_write(tp, 0x14, 0x0d45);
-        rtl8168_mdio_write(tp, 0x14, 0x30c0);
-        rtl8168_mdio_write(tp, 0x14, 0x3d0d);
-        rtl8168_mdio_write(tp, 0x14, 0xd71e);
-        rtl8168_mdio_write(tp, 0x14, 0x7f4c);
-        rtl8168_mdio_write(tp, 0x14, 0x2ab6);
-        rtl8168_mdio_write(tp, 0x14, 0xa540);
-        rtl8168_mdio_write(tp, 0x14, 0xc001);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x4001);
-        rtl8168_mdio_write(tp, 0x14, 0xe00f);
-        rtl8168_mdio_write(tp, 0x14, 0x0501);
-        rtl8168_mdio_write(tp, 0x14, 0x1dac);
-        rtl8168_mdio_write(tp, 0x14, 0xc1c4);
-        rtl8168_mdio_write(tp, 0x14, 0xa268);
-        rtl8168_mdio_write(tp, 0x14, 0xa303);
-        rtl8168_mdio_write(tp, 0x14, 0x8420);
-        rtl8168_mdio_write(tp, 0x14, 0xe00f);
-        rtl8168_mdio_write(tp, 0x14, 0x0502);
-        rtl8168_mdio_write(tp, 0x14, 0x1dac);
-        rtl8168_mdio_write(tp, 0x14, 0xc002);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x4000);
-        rtl8168_mdio_write(tp, 0x14, 0x8208);
-        rtl8168_mdio_write(tp, 0x14, 0x8410);
-        rtl8168_mdio_write(tp, 0x14, 0xa121);
-        rtl8168_mdio_write(tp, 0x14, 0xc002);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x4000);
-        rtl8168_mdio_write(tp, 0x14, 0x8120);
-        rtl8168_mdio_write(tp, 0x14, 0x8180);
-        rtl8168_mdio_write(tp, 0x14, 0x1d97);
-        rtl8168_mdio_write(tp, 0x14, 0xa180);
-        rtl8168_mdio_write(tp, 0x14, 0xa13a);
-        rtl8168_mdio_write(tp, 0x14, 0x8240);
-        rtl8168_mdio_write(tp, 0x14, 0xa430);
-        rtl8168_mdio_write(tp, 0x14, 0xc010);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x30e1);
-        rtl8168_mdio_write(tp, 0x14, 0x0abc);
-        rtl8168_mdio_write(tp, 0x14, 0xd71e);
-        rtl8168_mdio_write(tp, 0x14, 0x7f8c);
-        rtl8168_mdio_write(tp, 0x14, 0x2ab6);
-        rtl8168_mdio_write(tp, 0x14, 0xa480);
-        rtl8168_mdio_write(tp, 0x14, 0xa230);
-        rtl8168_mdio_write(tp, 0x14, 0xa303);
-        rtl8168_mdio_write(tp, 0x14, 0xc001);
-        rtl8168_mdio_write(tp, 0x14, 0xd70c);
-        rtl8168_mdio_write(tp, 0x14, 0x4124);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x6120);
-        rtl8168_mdio_write(tp, 0x14, 0xd711);
-        rtl8168_mdio_write(tp, 0x14, 0x3128);
-        rtl8168_mdio_write(tp, 0x14, 0x3d76);
-        rtl8168_mdio_write(tp, 0x14, 0x2d70);
-        rtl8168_mdio_write(tp, 0x14, 0xa801);
-        rtl8168_mdio_write(tp, 0x14, 0x2d6c);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x4000);
-        rtl8168_mdio_write(tp, 0x14, 0xe018);
-        rtl8168_mdio_write(tp, 0x14, 0x0208);
-        rtl8168_mdio_write(tp, 0x14, 0xa1f8);
-        rtl8168_mdio_write(tp, 0x14, 0x8480);
-        rtl8168_mdio_write(tp, 0x14, 0xc004);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x4000);
-        rtl8168_mdio_write(tp, 0x14, 0x6046);
-        rtl8168_mdio_write(tp, 0x14, 0x2d0d);
-        rtl8168_mdio_write(tp, 0x14, 0xa43f);
-        rtl8168_mdio_write(tp, 0x14, 0xa105);
-        rtl8168_mdio_write(tp, 0x14, 0x8228);
-        rtl8168_mdio_write(tp, 0x14, 0xc004);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x4000);
-        rtl8168_mdio_write(tp, 0x14, 0x81bc);
-        rtl8168_mdio_write(tp, 0x14, 0xa220);
-        rtl8168_mdio_write(tp, 0x14, 0x1d97);
-        rtl8168_mdio_write(tp, 0x14, 0x8220);
-        rtl8168_mdio_write(tp, 0x14, 0xa1bc);
-        rtl8168_mdio_write(tp, 0x14, 0xc040);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x30e1);
-        rtl8168_mdio_write(tp, 0x14, 0x0abc);
-        rtl8168_mdio_write(tp, 0x14, 0x30e1);
-        rtl8168_mdio_write(tp, 0x14, 0x3d0d);
-        rtl8168_mdio_write(tp, 0x14, 0xd71e);
-        rtl8168_mdio_write(tp, 0x14, 0x7f4c);
-        rtl8168_mdio_write(tp, 0x14, 0x2ab6);
-        rtl8168_mdio_write(tp, 0x14, 0xa802);
-        rtl8168_mdio_write(tp, 0x14, 0xd70c);
-        rtl8168_mdio_write(tp, 0x14, 0x4244);
-        rtl8168_mdio_write(tp, 0x14, 0xa301);
-        rtl8168_mdio_write(tp, 0x14, 0xc004);
-        rtl8168_mdio_write(tp, 0x14, 0xd711);
-        rtl8168_mdio_write(tp, 0x14, 0x3128);
-        rtl8168_mdio_write(tp, 0x14, 0x3da5);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x5f80);
-        rtl8168_mdio_write(tp, 0x14, 0xd711);
-        rtl8168_mdio_write(tp, 0x14, 0x3109);
-        rtl8168_mdio_write(tp, 0x14, 0x3da7);
-        rtl8168_mdio_write(tp, 0x14, 0x2dab);
-        rtl8168_mdio_write(tp, 0x14, 0xa801);
-        rtl8168_mdio_write(tp, 0x14, 0x2d9a);
-        rtl8168_mdio_write(tp, 0x14, 0xa802);
-        rtl8168_mdio_write(tp, 0x14, 0xc004);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x4000);
-        rtl8168_mdio_write(tp, 0x14, 0x0800);
-        rtl8168_mdio_write(tp, 0x14, 0xa510);
-        rtl8168_mdio_write(tp, 0x14, 0xd710);
-        rtl8168_mdio_write(tp, 0x14, 0x609a);
-        rtl8168_mdio_write(tp, 0x14, 0xd71e);
-        rtl8168_mdio_write(tp, 0x14, 0x7fac);
-        rtl8168_mdio_write(tp, 0x14, 0x2ab6);
-        rtl8168_mdio_write(tp, 0x14, 0x8510);
-        rtl8168_mdio_write(tp, 0x14, 0x0800);
-        rtl8168_mdio_write(tp, 0x13, 0xA01A);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-        rtl8168_mdio_write(tp, 0x13, 0xA006);
-        rtl8168_mdio_write(tp, 0x14, 0x0ad6);
-        rtl8168_mdio_write(tp, 0x13, 0xA004);
-        rtl8168_mdio_write(tp, 0x14, 0x07f5);
-        rtl8168_mdio_write(tp, 0x13, 0xA002);
-        rtl8168_mdio_write(tp, 0x14, 0x06a9);
-        rtl8168_mdio_write(tp, 0x13, 0xA000);
-        rtl8168_mdio_write(tp, 0x14, 0xf069);
-        rtl8168_mdio_write(tp, 0x13, 0xB820);
-        rtl8168_mdio_write(tp, 0x14, 0x0210);
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x83a0);
-        rtl8168_mdio_write(tp, 0x14, 0xaf83);
-        rtl8168_mdio_write(tp, 0x14, 0xacaf);
-        rtl8168_mdio_write(tp, 0x14, 0x83b8);
-        rtl8168_mdio_write(tp, 0x14, 0xaf83);
-        rtl8168_mdio_write(tp, 0x14, 0xcdaf);
-        rtl8168_mdio_write(tp, 0x14, 0x83d3);
-        rtl8168_mdio_write(tp, 0x14, 0x0204);
-        rtl8168_mdio_write(tp, 0x14, 0x9a02);
-        rtl8168_mdio_write(tp, 0x14, 0x09a9);
-        rtl8168_mdio_write(tp, 0x14, 0x0284);
-        rtl8168_mdio_write(tp, 0x14, 0x61af);
-        rtl8168_mdio_write(tp, 0x14, 0x02fc);
-        rtl8168_mdio_write(tp, 0x14, 0xad20);
-        rtl8168_mdio_write(tp, 0x14, 0x0302);
-        rtl8168_mdio_write(tp, 0x14, 0x867c);
-        rtl8168_mdio_write(tp, 0x14, 0xad21);
-        rtl8168_mdio_write(tp, 0x14, 0x0302);
-        rtl8168_mdio_write(tp, 0x14, 0x85c9);
-        rtl8168_mdio_write(tp, 0x14, 0xad22);
-        rtl8168_mdio_write(tp, 0x14, 0x0302);
-        rtl8168_mdio_write(tp, 0x14, 0x1bc0);
-        rtl8168_mdio_write(tp, 0x14, 0xaf17);
-        rtl8168_mdio_write(tp, 0x14, 0xe302);
-        rtl8168_mdio_write(tp, 0x14, 0x8703);
-        rtl8168_mdio_write(tp, 0x14, 0xaf18);
-        rtl8168_mdio_write(tp, 0x14, 0x6201);
-        rtl8168_mdio_write(tp, 0x14, 0x06e0);
-        rtl8168_mdio_write(tp, 0x14, 0x8148);
-        rtl8168_mdio_write(tp, 0x14, 0xaf3c);
-        rtl8168_mdio_write(tp, 0x14, 0x69f8);
-        rtl8168_mdio_write(tp, 0x14, 0xf9fa);
-        rtl8168_mdio_write(tp, 0x14, 0xef69);
-        rtl8168_mdio_write(tp, 0x14, 0xee80);
-        rtl8168_mdio_write(tp, 0x14, 0x10f7);
-        rtl8168_mdio_write(tp, 0x14, 0xee80);
-        rtl8168_mdio_write(tp, 0x14, 0x131f);
-        rtl8168_mdio_write(tp, 0x14, 0xd104);
-        rtl8168_mdio_write(tp, 0x14, 0xbf87);
-        rtl8168_mdio_write(tp, 0x14, 0xf302);
-        rtl8168_mdio_write(tp, 0x14, 0x4259);
-        rtl8168_mdio_write(tp, 0x14, 0x0287);
-        rtl8168_mdio_write(tp, 0x14, 0x88bf);
-        rtl8168_mdio_write(tp, 0x14, 0x87cf);
-        rtl8168_mdio_write(tp, 0x14, 0xd7b8);
-        rtl8168_mdio_write(tp, 0x14, 0x22d0);
-        rtl8168_mdio_write(tp, 0x14, 0x0c02);
-        rtl8168_mdio_write(tp, 0x14, 0x4252);
-        rtl8168_mdio_write(tp, 0x14, 0xee80);
-        rtl8168_mdio_write(tp, 0x14, 0xcda0);
-        rtl8168_mdio_write(tp, 0x14, 0xee80);
-        rtl8168_mdio_write(tp, 0x14, 0xce8b);
-        rtl8168_mdio_write(tp, 0x14, 0xee80);
-        rtl8168_mdio_write(tp, 0x14, 0xd1f5);
-        rtl8168_mdio_write(tp, 0x14, 0xee80);
-        rtl8168_mdio_write(tp, 0x14, 0xd2a9);
-        rtl8168_mdio_write(tp, 0x14, 0xee80);
-        rtl8168_mdio_write(tp, 0x14, 0xd30a);
-        rtl8168_mdio_write(tp, 0x14, 0xee80);
-        rtl8168_mdio_write(tp, 0x14, 0xf010);
-        rtl8168_mdio_write(tp, 0x14, 0xee80);
-        rtl8168_mdio_write(tp, 0x14, 0xf38f);
-        rtl8168_mdio_write(tp, 0x14, 0xee81);
-        rtl8168_mdio_write(tp, 0x14, 0x011e);
-        rtl8168_mdio_write(tp, 0x14, 0xee81);
-        rtl8168_mdio_write(tp, 0x14, 0x0b4a);
-        rtl8168_mdio_write(tp, 0x14, 0xee81);
-        rtl8168_mdio_write(tp, 0x14, 0x0c7c);
-        rtl8168_mdio_write(tp, 0x14, 0xee81);
-        rtl8168_mdio_write(tp, 0x14, 0x127f);
-        rtl8168_mdio_write(tp, 0x14, 0xd100);
-        rtl8168_mdio_write(tp, 0x14, 0x0210);
-        rtl8168_mdio_write(tp, 0x14, 0xb5ee);
-        rtl8168_mdio_write(tp, 0x14, 0x8088);
-        rtl8168_mdio_write(tp, 0x14, 0xa4ee);
-        rtl8168_mdio_write(tp, 0x14, 0x8089);
-        rtl8168_mdio_write(tp, 0x14, 0x44ee);
-        rtl8168_mdio_write(tp, 0x14, 0x809a);
-        rtl8168_mdio_write(tp, 0x14, 0xa4ee);
-        rtl8168_mdio_write(tp, 0x14, 0x809b);
-        rtl8168_mdio_write(tp, 0x14, 0x44ee);
-        rtl8168_mdio_write(tp, 0x14, 0x809c);
-        rtl8168_mdio_write(tp, 0x14, 0xa7ee);
-        rtl8168_mdio_write(tp, 0x14, 0x80a5);
-        rtl8168_mdio_write(tp, 0x14, 0xa7d2);
-        rtl8168_mdio_write(tp, 0x14, 0x0002);
-        rtl8168_mdio_write(tp, 0x14, 0x0e66);
-        rtl8168_mdio_write(tp, 0x14, 0x0285);
-        rtl8168_mdio_write(tp, 0x14, 0xc0ee);
-        rtl8168_mdio_write(tp, 0x14, 0x87fc);
-        rtl8168_mdio_write(tp, 0x14, 0x00e0);
-        rtl8168_mdio_write(tp, 0x14, 0x8245);
-        rtl8168_mdio_write(tp, 0x14, 0xf622);
-        rtl8168_mdio_write(tp, 0x14, 0xe482);
-        rtl8168_mdio_write(tp, 0x14, 0x45ef);
-        rtl8168_mdio_write(tp, 0x14, 0x96fe);
-        rtl8168_mdio_write(tp, 0x14, 0xfdfc);
-        rtl8168_mdio_write(tp, 0x14, 0x0402);
-        rtl8168_mdio_write(tp, 0x14, 0x847a);
-        rtl8168_mdio_write(tp, 0x14, 0x0284);
-        rtl8168_mdio_write(tp, 0x14, 0xb302);
-        rtl8168_mdio_write(tp, 0x14, 0x0cab);
-        rtl8168_mdio_write(tp, 0x14, 0x020c);
-        rtl8168_mdio_write(tp, 0x14, 0xc402);
-        rtl8168_mdio_write(tp, 0x14, 0x0cef);
-        rtl8168_mdio_write(tp, 0x14, 0x020d);
-        rtl8168_mdio_write(tp, 0x14, 0x0802);
-        rtl8168_mdio_write(tp, 0x14, 0x0d33);
-        rtl8168_mdio_write(tp, 0x14, 0x020c);
-        rtl8168_mdio_write(tp, 0x14, 0x3d04);
-        rtl8168_mdio_write(tp, 0x14, 0xf8fa);
-        rtl8168_mdio_write(tp, 0x14, 0xef69);
-        rtl8168_mdio_write(tp, 0x14, 0xe182);
-        rtl8168_mdio_write(tp, 0x14, 0x2fac);
-        rtl8168_mdio_write(tp, 0x14, 0x291a);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x24ac);
-        rtl8168_mdio_write(tp, 0x14, 0x2102);
-        rtl8168_mdio_write(tp, 0x14, 0xae22);
-        rtl8168_mdio_write(tp, 0x14, 0x0210);
-        rtl8168_mdio_write(tp, 0x14, 0x57f6);
-        rtl8168_mdio_write(tp, 0x14, 0x21e4);
-        rtl8168_mdio_write(tp, 0x14, 0x8224);
-        rtl8168_mdio_write(tp, 0x14, 0xd101);
-        rtl8168_mdio_write(tp, 0x14, 0xbf44);
-        rtl8168_mdio_write(tp, 0x14, 0xd202);
-        rtl8168_mdio_write(tp, 0x14, 0x4259);
-        rtl8168_mdio_write(tp, 0x14, 0xae10);
-        rtl8168_mdio_write(tp, 0x14, 0x0212);
-        rtl8168_mdio_write(tp, 0x14, 0x4cf6);
-        rtl8168_mdio_write(tp, 0x14, 0x29e5);
-        rtl8168_mdio_write(tp, 0x14, 0x822f);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x24f6);
-        rtl8168_mdio_write(tp, 0x14, 0x21e4);
-        rtl8168_mdio_write(tp, 0x14, 0x8224);
-        rtl8168_mdio_write(tp, 0x14, 0xef96);
-        rtl8168_mdio_write(tp, 0x14, 0xfefc);
-        rtl8168_mdio_write(tp, 0x14, 0x04f8);
-        rtl8168_mdio_write(tp, 0x14, 0xe182);
-        rtl8168_mdio_write(tp, 0x14, 0x2fac);
-        rtl8168_mdio_write(tp, 0x14, 0x2a18);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x24ac);
-        rtl8168_mdio_write(tp, 0x14, 0x2202);
-        rtl8168_mdio_write(tp, 0x14, 0xae26);
-        rtl8168_mdio_write(tp, 0x14, 0x0284);
-        rtl8168_mdio_write(tp, 0x14, 0xf802);
-        rtl8168_mdio_write(tp, 0x14, 0x8565);
-        rtl8168_mdio_write(tp, 0x14, 0xd101);
-        rtl8168_mdio_write(tp, 0x14, 0xbf44);
-        rtl8168_mdio_write(tp, 0x14, 0xd502);
-        rtl8168_mdio_write(tp, 0x14, 0x4259);
-        rtl8168_mdio_write(tp, 0x14, 0xae0e);
-        rtl8168_mdio_write(tp, 0x14, 0x0284);
-        rtl8168_mdio_write(tp, 0x14, 0xea02);
-        rtl8168_mdio_write(tp, 0x14, 0x85a9);
-        rtl8168_mdio_write(tp, 0x14, 0xe182);
-        rtl8168_mdio_write(tp, 0x14, 0x2ff6);
-        rtl8168_mdio_write(tp, 0x14, 0x2ae5);
-        rtl8168_mdio_write(tp, 0x14, 0x822f);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x24f6);
-        rtl8168_mdio_write(tp, 0x14, 0x22e4);
-        rtl8168_mdio_write(tp, 0x14, 0x8224);
-        rtl8168_mdio_write(tp, 0x14, 0xfc04);
-        rtl8168_mdio_write(tp, 0x14, 0xf9e2);
-        rtl8168_mdio_write(tp, 0x14, 0x8011);
-        rtl8168_mdio_write(tp, 0x14, 0xad31);
-        rtl8168_mdio_write(tp, 0x14, 0x05d2);
-        rtl8168_mdio_write(tp, 0x14, 0x0002);
-        rtl8168_mdio_write(tp, 0x14, 0x0e66);
-        rtl8168_mdio_write(tp, 0x14, 0xfd04);
-        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
-        rtl8168_mdio_write(tp, 0x14, 0xfaef);
-        rtl8168_mdio_write(tp, 0x14, 0x69e0);
-        rtl8168_mdio_write(tp, 0x14, 0x8011);
-        rtl8168_mdio_write(tp, 0x14, 0xad21);
-        rtl8168_mdio_write(tp, 0x14, 0x5cbf);
-        rtl8168_mdio_write(tp, 0x14, 0x43be);
-        rtl8168_mdio_write(tp, 0x14, 0x0242);
-        rtl8168_mdio_write(tp, 0x14, 0x97ac);
-        rtl8168_mdio_write(tp, 0x14, 0x281b);
-        rtl8168_mdio_write(tp, 0x14, 0xbf43);
-        rtl8168_mdio_write(tp, 0x14, 0xc102);
-        rtl8168_mdio_write(tp, 0x14, 0x4297);
-        rtl8168_mdio_write(tp, 0x14, 0xac28);
-        rtl8168_mdio_write(tp, 0x14, 0x12bf);
-        rtl8168_mdio_write(tp, 0x14, 0x43c7);
-        rtl8168_mdio_write(tp, 0x14, 0x0242);
-        rtl8168_mdio_write(tp, 0x14, 0x97ac);
-        rtl8168_mdio_write(tp, 0x14, 0x2804);
-        rtl8168_mdio_write(tp, 0x14, 0xd300);
-        rtl8168_mdio_write(tp, 0x14, 0xae07);
-        rtl8168_mdio_write(tp, 0x14, 0xd306);
-        rtl8168_mdio_write(tp, 0x14, 0xaf85);
-        rtl8168_mdio_write(tp, 0x14, 0x56d3);
-        rtl8168_mdio_write(tp, 0x14, 0x03e0);
-        rtl8168_mdio_write(tp, 0x14, 0x8011);
-        rtl8168_mdio_write(tp, 0x14, 0xad26);
-        rtl8168_mdio_write(tp, 0x14, 0x25bf);
-        rtl8168_mdio_write(tp, 0x14, 0x4559);
-        rtl8168_mdio_write(tp, 0x14, 0x0242);
-        rtl8168_mdio_write(tp, 0x14, 0x97e2);
-        rtl8168_mdio_write(tp, 0x14, 0x8073);
-        rtl8168_mdio_write(tp, 0x14, 0x0d21);
-        rtl8168_mdio_write(tp, 0x14, 0xf637);
-        rtl8168_mdio_write(tp, 0x14, 0x0d11);
-        rtl8168_mdio_write(tp, 0x14, 0xf62f);
-        rtl8168_mdio_write(tp, 0x14, 0x1b21);
-        rtl8168_mdio_write(tp, 0x14, 0xaa02);
-        rtl8168_mdio_write(tp, 0x14, 0xae10);
-        rtl8168_mdio_write(tp, 0x14, 0xe280);
-        rtl8168_mdio_write(tp, 0x14, 0x740d);
-        rtl8168_mdio_write(tp, 0x14, 0x21f6);
-        rtl8168_mdio_write(tp, 0x14, 0x371b);
-        rtl8168_mdio_write(tp, 0x14, 0x21aa);
-        rtl8168_mdio_write(tp, 0x14, 0x0313);
-        rtl8168_mdio_write(tp, 0x14, 0xae02);
-        rtl8168_mdio_write(tp, 0x14, 0x2b02);
-        rtl8168_mdio_write(tp, 0x14, 0x020e);
-        rtl8168_mdio_write(tp, 0x14, 0x5102);
-        rtl8168_mdio_write(tp, 0x14, 0x0e66);
-        rtl8168_mdio_write(tp, 0x14, 0x020f);
-        rtl8168_mdio_write(tp, 0x14, 0xa3ef);
-        rtl8168_mdio_write(tp, 0x14, 0x96fe);
-        rtl8168_mdio_write(tp, 0x14, 0xfdfc);
-        rtl8168_mdio_write(tp, 0x14, 0x04f8);
-        rtl8168_mdio_write(tp, 0x14, 0xf9fa);
-        rtl8168_mdio_write(tp, 0x14, 0xef69);
-        rtl8168_mdio_write(tp, 0x14, 0xe080);
-        rtl8168_mdio_write(tp, 0x14, 0x12ad);
-        rtl8168_mdio_write(tp, 0x14, 0x2733);
-        rtl8168_mdio_write(tp, 0x14, 0xbf43);
-        rtl8168_mdio_write(tp, 0x14, 0xbe02);
-        rtl8168_mdio_write(tp, 0x14, 0x4297);
-        rtl8168_mdio_write(tp, 0x14, 0xac28);
-        rtl8168_mdio_write(tp, 0x14, 0x09bf);
-        rtl8168_mdio_write(tp, 0x14, 0x43c1);
-        rtl8168_mdio_write(tp, 0x14, 0x0242);
-        rtl8168_mdio_write(tp, 0x14, 0x97ad);
-        rtl8168_mdio_write(tp, 0x14, 0x2821);
-        rtl8168_mdio_write(tp, 0x14, 0xbf45);
-        rtl8168_mdio_write(tp, 0x14, 0x5902);
-        rtl8168_mdio_write(tp, 0x14, 0x4297);
-        rtl8168_mdio_write(tp, 0x14, 0xe387);
-        rtl8168_mdio_write(tp, 0x14, 0xffd2);
-        rtl8168_mdio_write(tp, 0x14, 0x001b);
-        rtl8168_mdio_write(tp, 0x14, 0x45ac);
-        rtl8168_mdio_write(tp, 0x14, 0x2711);
-        rtl8168_mdio_write(tp, 0x14, 0xe187);
-        rtl8168_mdio_write(tp, 0x14, 0xfebf);
-        rtl8168_mdio_write(tp, 0x14, 0x87e4);
-        rtl8168_mdio_write(tp, 0x14, 0x0242);
-        rtl8168_mdio_write(tp, 0x14, 0x590d);
-        rtl8168_mdio_write(tp, 0x14, 0x11bf);
-        rtl8168_mdio_write(tp, 0x14, 0x87e7);
-        rtl8168_mdio_write(tp, 0x14, 0x0242);
-        rtl8168_mdio_write(tp, 0x14, 0x59ef);
-        rtl8168_mdio_write(tp, 0x14, 0x96fe);
-        rtl8168_mdio_write(tp, 0x14, 0xfdfc);
-        rtl8168_mdio_write(tp, 0x14, 0x04f8);
-        rtl8168_mdio_write(tp, 0x14, 0xfaef);
-        rtl8168_mdio_write(tp, 0x14, 0x69d1);
-        rtl8168_mdio_write(tp, 0x14, 0x00bf);
-        rtl8168_mdio_write(tp, 0x14, 0x87e4);
-        rtl8168_mdio_write(tp, 0x14, 0x0242);
-        rtl8168_mdio_write(tp, 0x14, 0x59bf);
-        rtl8168_mdio_write(tp, 0x14, 0x87e7);
-        rtl8168_mdio_write(tp, 0x14, 0x0242);
-        rtl8168_mdio_write(tp, 0x14, 0x59ef);
-        rtl8168_mdio_write(tp, 0x14, 0x96fe);
-        rtl8168_mdio_write(tp, 0x14, 0xfc04);
-        rtl8168_mdio_write(tp, 0x14, 0xee87);
-        rtl8168_mdio_write(tp, 0x14, 0xff46);
-        rtl8168_mdio_write(tp, 0x14, 0xee87);
-        rtl8168_mdio_write(tp, 0x14, 0xfe01);
-        rtl8168_mdio_write(tp, 0x14, 0x04f8);
-        rtl8168_mdio_write(tp, 0x14, 0xfaef);
-        rtl8168_mdio_write(tp, 0x14, 0x69e0);
-        rtl8168_mdio_write(tp, 0x14, 0x8241);
-        rtl8168_mdio_write(tp, 0x14, 0xa000);
-        rtl8168_mdio_write(tp, 0x14, 0x0502);
-        rtl8168_mdio_write(tp, 0x14, 0x85eb);
-        rtl8168_mdio_write(tp, 0x14, 0xae0e);
-        rtl8168_mdio_write(tp, 0x14, 0xa001);
-        rtl8168_mdio_write(tp, 0x14, 0x0502);
-        rtl8168_mdio_write(tp, 0x14, 0x1a5a);
-        rtl8168_mdio_write(tp, 0x14, 0xae06);
-        rtl8168_mdio_write(tp, 0x14, 0xa002);
-        rtl8168_mdio_write(tp, 0x14, 0x0302);
-        rtl8168_mdio_write(tp, 0x14, 0x1ae6);
-        rtl8168_mdio_write(tp, 0x14, 0xef96);
-        rtl8168_mdio_write(tp, 0x14, 0xfefc);
-        rtl8168_mdio_write(tp, 0x14, 0x04f8);
-        rtl8168_mdio_write(tp, 0x14, 0xf9fa);
-        rtl8168_mdio_write(tp, 0x14, 0xef69);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x29f6);
-        rtl8168_mdio_write(tp, 0x14, 0x21e4);
-        rtl8168_mdio_write(tp, 0x14, 0x8229);
-        rtl8168_mdio_write(tp, 0x14, 0xe080);
-        rtl8168_mdio_write(tp, 0x14, 0x10ac);
-        rtl8168_mdio_write(tp, 0x14, 0x2202);
-        rtl8168_mdio_write(tp, 0x14, 0xae76);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x27f7);
-        rtl8168_mdio_write(tp, 0x14, 0x21e4);
-        rtl8168_mdio_write(tp, 0x14, 0x8227);
-        rtl8168_mdio_write(tp, 0x14, 0xbf43);
-        rtl8168_mdio_write(tp, 0x14, 0x1302);
-        rtl8168_mdio_write(tp, 0x14, 0x4297);
-        rtl8168_mdio_write(tp, 0x14, 0xef21);
-        rtl8168_mdio_write(tp, 0x14, 0xbf43);
-        rtl8168_mdio_write(tp, 0x14, 0x1602);
-        rtl8168_mdio_write(tp, 0x14, 0x4297);
-        rtl8168_mdio_write(tp, 0x14, 0x0c11);
-        rtl8168_mdio_write(tp, 0x14, 0x1e21);
-        rtl8168_mdio_write(tp, 0x14, 0xbf43);
-        rtl8168_mdio_write(tp, 0x14, 0x1902);
-        rtl8168_mdio_write(tp, 0x14, 0x4297);
-        rtl8168_mdio_write(tp, 0x14, 0x0c12);
-        rtl8168_mdio_write(tp, 0x14, 0x1e21);
-        rtl8168_mdio_write(tp, 0x14, 0xe682);
-        rtl8168_mdio_write(tp, 0x14, 0x43a2);
-        rtl8168_mdio_write(tp, 0x14, 0x000a);
-        rtl8168_mdio_write(tp, 0x14, 0xe182);
-        rtl8168_mdio_write(tp, 0x14, 0x27f6);
-        rtl8168_mdio_write(tp, 0x14, 0x29e5);
-        rtl8168_mdio_write(tp, 0x14, 0x8227);
-        rtl8168_mdio_write(tp, 0x14, 0xae42);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x44f7);
-        rtl8168_mdio_write(tp, 0x14, 0x21e4);
-        rtl8168_mdio_write(tp, 0x14, 0x8244);
-        rtl8168_mdio_write(tp, 0x14, 0x0246);
-        rtl8168_mdio_write(tp, 0x14, 0xaebf);
-        rtl8168_mdio_write(tp, 0x14, 0x4325);
-        rtl8168_mdio_write(tp, 0x14, 0x0242);
-        rtl8168_mdio_write(tp, 0x14, 0x97ef);
-        rtl8168_mdio_write(tp, 0x14, 0x21bf);
-        rtl8168_mdio_write(tp, 0x14, 0x431c);
-        rtl8168_mdio_write(tp, 0x14, 0x0242);
-        rtl8168_mdio_write(tp, 0x14, 0x970c);
-        rtl8168_mdio_write(tp, 0x14, 0x121e);
-        rtl8168_mdio_write(tp, 0x14, 0x21bf);
-        rtl8168_mdio_write(tp, 0x14, 0x431f);
-        rtl8168_mdio_write(tp, 0x14, 0x0242);
-        rtl8168_mdio_write(tp, 0x14, 0x970c);
-        rtl8168_mdio_write(tp, 0x14, 0x131e);
-        rtl8168_mdio_write(tp, 0x14, 0x21bf);
-        rtl8168_mdio_write(tp, 0x14, 0x4328);
-        rtl8168_mdio_write(tp, 0x14, 0x0242);
-        rtl8168_mdio_write(tp, 0x14, 0x970c);
-        rtl8168_mdio_write(tp, 0x14, 0x141e);
-        rtl8168_mdio_write(tp, 0x14, 0x21bf);
-        rtl8168_mdio_write(tp, 0x14, 0x44b1);
-        rtl8168_mdio_write(tp, 0x14, 0x0242);
-        rtl8168_mdio_write(tp, 0x14, 0x970c);
-        rtl8168_mdio_write(tp, 0x14, 0x161e);
-        rtl8168_mdio_write(tp, 0x14, 0x21e6);
-        rtl8168_mdio_write(tp, 0x14, 0x8242);
-        rtl8168_mdio_write(tp, 0x14, 0xee82);
-        rtl8168_mdio_write(tp, 0x14, 0x4101);
-        rtl8168_mdio_write(tp, 0x14, 0xef96);
-        rtl8168_mdio_write(tp, 0x14, 0xfefd);
-        rtl8168_mdio_write(tp, 0x14, 0xfc04);
-        rtl8168_mdio_write(tp, 0x14, 0xf8fa);
-        rtl8168_mdio_write(tp, 0x14, 0xef69);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x46a0);
-        rtl8168_mdio_write(tp, 0x14, 0x0005);
-        rtl8168_mdio_write(tp, 0x14, 0x0286);
-        rtl8168_mdio_write(tp, 0x14, 0x96ae);
-        rtl8168_mdio_write(tp, 0x14, 0x06a0);
-        rtl8168_mdio_write(tp, 0x14, 0x0103);
-        rtl8168_mdio_write(tp, 0x14, 0x0219);
-        rtl8168_mdio_write(tp, 0x14, 0x19ef);
-        rtl8168_mdio_write(tp, 0x14, 0x96fe);
-        rtl8168_mdio_write(tp, 0x14, 0xfc04);
-        rtl8168_mdio_write(tp, 0x14, 0xf8fa);
-        rtl8168_mdio_write(tp, 0x14, 0xef69);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x29f6);
-        rtl8168_mdio_write(tp, 0x14, 0x20e4);
-        rtl8168_mdio_write(tp, 0x14, 0x8229);
-        rtl8168_mdio_write(tp, 0x14, 0xe080);
-        rtl8168_mdio_write(tp, 0x14, 0x10ac);
-        rtl8168_mdio_write(tp, 0x14, 0x2102);
-        rtl8168_mdio_write(tp, 0x14, 0xae54);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x27f7);
-        rtl8168_mdio_write(tp, 0x14, 0x20e4);
-        rtl8168_mdio_write(tp, 0x14, 0x8227);
-        rtl8168_mdio_write(tp, 0x14, 0xbf42);
-        rtl8168_mdio_write(tp, 0x14, 0xe602);
-        rtl8168_mdio_write(tp, 0x14, 0x4297);
-        rtl8168_mdio_write(tp, 0x14, 0xac28);
-        rtl8168_mdio_write(tp, 0x14, 0x22bf);
-        rtl8168_mdio_write(tp, 0x14, 0x430d);
-        rtl8168_mdio_write(tp, 0x14, 0x0242);
-        rtl8168_mdio_write(tp, 0x14, 0x97e5);
-        rtl8168_mdio_write(tp, 0x14, 0x8247);
-        rtl8168_mdio_write(tp, 0x14, 0xac28);
-        rtl8168_mdio_write(tp, 0x14, 0x20d1);
-        rtl8168_mdio_write(tp, 0x14, 0x03bf);
-        rtl8168_mdio_write(tp, 0x14, 0x4307);
-        rtl8168_mdio_write(tp, 0x14, 0x0242);
-        rtl8168_mdio_write(tp, 0x14, 0x59ee);
-        rtl8168_mdio_write(tp, 0x14, 0x8246);
-        rtl8168_mdio_write(tp, 0x14, 0x00e1);
-        rtl8168_mdio_write(tp, 0x14, 0x8227);
-        rtl8168_mdio_write(tp, 0x14, 0xf628);
-        rtl8168_mdio_write(tp, 0x14, 0xe582);
-        rtl8168_mdio_write(tp, 0x14, 0x27ae);
-        rtl8168_mdio_write(tp, 0x14, 0x21d1);
-        rtl8168_mdio_write(tp, 0x14, 0x04bf);
-        rtl8168_mdio_write(tp, 0x14, 0x4307);
-        rtl8168_mdio_write(tp, 0x14, 0x0242);
-        rtl8168_mdio_write(tp, 0x14, 0x59ae);
-        rtl8168_mdio_write(tp, 0x14, 0x08d1);
-        rtl8168_mdio_write(tp, 0x14, 0x05bf);
-        rtl8168_mdio_write(tp, 0x14, 0x4307);
-        rtl8168_mdio_write(tp, 0x14, 0x0242);
-        rtl8168_mdio_write(tp, 0x14, 0x59e0);
-        rtl8168_mdio_write(tp, 0x14, 0x8244);
-        rtl8168_mdio_write(tp, 0x14, 0xf720);
-        rtl8168_mdio_write(tp, 0x14, 0xe482);
-        rtl8168_mdio_write(tp, 0x14, 0x4402);
-        rtl8168_mdio_write(tp, 0x14, 0x46ae);
-        rtl8168_mdio_write(tp, 0x14, 0xee82);
-        rtl8168_mdio_write(tp, 0x14, 0x4601);
-        rtl8168_mdio_write(tp, 0x14, 0xef96);
-        rtl8168_mdio_write(tp, 0x14, 0xfefc);
-        rtl8168_mdio_write(tp, 0x14, 0x04f8);
-        rtl8168_mdio_write(tp, 0x14, 0xfaef);
-        rtl8168_mdio_write(tp, 0x14, 0x69e0);
-        rtl8168_mdio_write(tp, 0x14, 0x8013);
-        rtl8168_mdio_write(tp, 0x14, 0xad24);
-        rtl8168_mdio_write(tp, 0x14, 0x1cbf);
-        rtl8168_mdio_write(tp, 0x14, 0x87f0);
-        rtl8168_mdio_write(tp, 0x14, 0x0242);
-        rtl8168_mdio_write(tp, 0x14, 0x97ad);
-        rtl8168_mdio_write(tp, 0x14, 0x2813);
-        rtl8168_mdio_write(tp, 0x14, 0xe087);
-        rtl8168_mdio_write(tp, 0x14, 0xfca0);
-        rtl8168_mdio_write(tp, 0x14, 0x0005);
-        rtl8168_mdio_write(tp, 0x14, 0x0287);
-        rtl8168_mdio_write(tp, 0x14, 0x36ae);
-        rtl8168_mdio_write(tp, 0x14, 0x10a0);
-        rtl8168_mdio_write(tp, 0x14, 0x0105);
-        rtl8168_mdio_write(tp, 0x14, 0x0287);
-        rtl8168_mdio_write(tp, 0x14, 0x48ae);
-        rtl8168_mdio_write(tp, 0x14, 0x08e0);
-        rtl8168_mdio_write(tp, 0x14, 0x8230);
-        rtl8168_mdio_write(tp, 0x14, 0xf626);
-        rtl8168_mdio_write(tp, 0x14, 0xe482);
-        rtl8168_mdio_write(tp, 0x14, 0x30ef);
-        rtl8168_mdio_write(tp, 0x14, 0x96fe);
-        rtl8168_mdio_write(tp, 0x14, 0xfc04);
-        rtl8168_mdio_write(tp, 0x14, 0xf8e0);
-        rtl8168_mdio_write(tp, 0x14, 0x8245);
-        rtl8168_mdio_write(tp, 0x14, 0xf722);
-        rtl8168_mdio_write(tp, 0x14, 0xe482);
-        rtl8168_mdio_write(tp, 0x14, 0x4502);
-        rtl8168_mdio_write(tp, 0x14, 0x46ae);
-        rtl8168_mdio_write(tp, 0x14, 0xee87);
-        rtl8168_mdio_write(tp, 0x14, 0xfc01);
-        rtl8168_mdio_write(tp, 0x14, 0xfc04);
-        rtl8168_mdio_write(tp, 0x14, 0xf8fa);
-        rtl8168_mdio_write(tp, 0x14, 0xef69);
-        rtl8168_mdio_write(tp, 0x14, 0xfb02);
-        rtl8168_mdio_write(tp, 0x14, 0x46d3);
-        rtl8168_mdio_write(tp, 0x14, 0xad50);
-        rtl8168_mdio_write(tp, 0x14, 0x2fbf);
-        rtl8168_mdio_write(tp, 0x14, 0x87ed);
-        rtl8168_mdio_write(tp, 0x14, 0xd101);
-        rtl8168_mdio_write(tp, 0x14, 0x0242);
-        rtl8168_mdio_write(tp, 0x14, 0x59bf);
-        rtl8168_mdio_write(tp, 0x14, 0x87ed);
-        rtl8168_mdio_write(tp, 0x14, 0xd100);
-        rtl8168_mdio_write(tp, 0x14, 0x0242);
-        rtl8168_mdio_write(tp, 0x14, 0x59e0);
-        rtl8168_mdio_write(tp, 0x14, 0x8245);
-        rtl8168_mdio_write(tp, 0x14, 0xf622);
-        rtl8168_mdio_write(tp, 0x14, 0xe482);
-        rtl8168_mdio_write(tp, 0x14, 0x4502);
-        rtl8168_mdio_write(tp, 0x14, 0x46ae);
-        rtl8168_mdio_write(tp, 0x14, 0xd100);
-        rtl8168_mdio_write(tp, 0x14, 0xbf87);
-        rtl8168_mdio_write(tp, 0x14, 0xf002);
-        rtl8168_mdio_write(tp, 0x14, 0x4259);
-        rtl8168_mdio_write(tp, 0x14, 0xee87);
-        rtl8168_mdio_write(tp, 0x14, 0xfc00);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x30f6);
-        rtl8168_mdio_write(tp, 0x14, 0x26e4);
-        rtl8168_mdio_write(tp, 0x14, 0x8230);
-        rtl8168_mdio_write(tp, 0x14, 0xffef);
-        rtl8168_mdio_write(tp, 0x14, 0x96fe);
-        rtl8168_mdio_write(tp, 0x14, 0xfc04);
-        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
-        rtl8168_mdio_write(tp, 0x14, 0xface);
-        rtl8168_mdio_write(tp, 0x14, 0xfaef);
-        rtl8168_mdio_write(tp, 0x14, 0x69fb);
-        rtl8168_mdio_write(tp, 0x14, 0xbf87);
-        rtl8168_mdio_write(tp, 0x14, 0xb3d7);
-        rtl8168_mdio_write(tp, 0x14, 0x001c);
-        rtl8168_mdio_write(tp, 0x14, 0xd819);
-        rtl8168_mdio_write(tp, 0x14, 0xd919);
-        rtl8168_mdio_write(tp, 0x14, 0xda19);
-        rtl8168_mdio_write(tp, 0x14, 0xdb19);
-        rtl8168_mdio_write(tp, 0x14, 0x07ef);
-        rtl8168_mdio_write(tp, 0x14, 0x9502);
-        rtl8168_mdio_write(tp, 0x14, 0x4259);
-        rtl8168_mdio_write(tp, 0x14, 0x073f);
-        rtl8168_mdio_write(tp, 0x14, 0x0004);
-        rtl8168_mdio_write(tp, 0x14, 0x9fec);
-        rtl8168_mdio_write(tp, 0x14, 0xffef);
-        rtl8168_mdio_write(tp, 0x14, 0x96fe);
-        rtl8168_mdio_write(tp, 0x14, 0xc6fe);
-        rtl8168_mdio_write(tp, 0x14, 0xfdfc);
-        rtl8168_mdio_write(tp, 0x14, 0x0400);
-        rtl8168_mdio_write(tp, 0x14, 0x0145);
-        rtl8168_mdio_write(tp, 0x14, 0x7d00);
-        rtl8168_mdio_write(tp, 0x14, 0x0345);
-        rtl8168_mdio_write(tp, 0x14, 0x5c00);
-        rtl8168_mdio_write(tp, 0x14, 0x0143);
-        rtl8168_mdio_write(tp, 0x14, 0x4f00);
-        rtl8168_mdio_write(tp, 0x14, 0x0387);
-        rtl8168_mdio_write(tp, 0x14, 0xdb00);
-        rtl8168_mdio_write(tp, 0x14, 0x0987);
-        rtl8168_mdio_write(tp, 0x14, 0xde00);
-        rtl8168_mdio_write(tp, 0x14, 0x0987);
-        rtl8168_mdio_write(tp, 0x14, 0xe100);
-        rtl8168_mdio_write(tp, 0x14, 0x0087);
-        rtl8168_mdio_write(tp, 0x14, 0xeaa4);
-        rtl8168_mdio_write(tp, 0x14, 0x00b8);
-        rtl8168_mdio_write(tp, 0x14, 0x20c4);
-        rtl8168_mdio_write(tp, 0x14, 0x1600);
-        rtl8168_mdio_write(tp, 0x14, 0x000f);
-        rtl8168_mdio_write(tp, 0x14, 0xf800);
-        rtl8168_mdio_write(tp, 0x14, 0x7098);
-        rtl8168_mdio_write(tp, 0x14, 0xa58a);
-        rtl8168_mdio_write(tp, 0x14, 0xb6a8);
-        rtl8168_mdio_write(tp, 0x14, 0x3e50);
-        rtl8168_mdio_write(tp, 0x14, 0xa83e);
-        rtl8168_mdio_write(tp, 0x14, 0x33bc);
-        rtl8168_mdio_write(tp, 0x14, 0xc622);
-        rtl8168_mdio_write(tp, 0x14, 0xbcc6);
-        rtl8168_mdio_write(tp, 0x14, 0xaaa4);
-        rtl8168_mdio_write(tp, 0x14, 0x42ff);
-        rtl8168_mdio_write(tp, 0x14, 0xc408);
-        rtl8168_mdio_write(tp, 0x14, 0x00c4);
-        rtl8168_mdio_write(tp, 0x14, 0x16a8);
-        rtl8168_mdio_write(tp, 0x14, 0xbcc0);
-        rtl8168_mdio_write(tp, 0x13, 0xb818);
-        rtl8168_mdio_write(tp, 0x14, 0x02f3);
-        rtl8168_mdio_write(tp, 0x13, 0xb81a);
-        rtl8168_mdio_write(tp, 0x14, 0x17d1);
-        rtl8168_mdio_write(tp, 0x13, 0xb81c);
-        rtl8168_mdio_write(tp, 0x14, 0x185a);
-        rtl8168_mdio_write(tp, 0x13, 0xb81e);
-        rtl8168_mdio_write(tp, 0x14, 0x3c66);
-        rtl8168_mdio_write(tp, 0x13, 0xb820);
-        rtl8168_mdio_write(tp, 0x14, 0x021f);
-        rtl8168_mdio_write(tp, 0x13, 0xc416);
-        rtl8168_mdio_write(tp, 0x14, 0x0500);
-        rtl8168_mdio_write(tp, 0x13, 0xb82e);
-        rtl8168_mdio_write(tp, 0x14, 0xfffc);
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x0000);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0B82);
-        gphy_val = rtl8168_mdio_read(tp, 0x10);
-        gphy_val &= ~(BIT_9);
-        rtl8168_mdio_write(tp, 0x10, gphy_val);
-        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x8146);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-
-        rtl8168_clear_phy_mcu_patch_request(tp);
-}
-
-static void
-rtl8168_set_phy_mcu_8168gu_2(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        unsigned int gphy_val;
-
-        rtl8168_set_phy_mcu_patch_request(tp);
-        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x8146);
-        rtl8168_mdio_write(tp, 0x14, 0x0300);
-        rtl8168_mdio_write(tp, 0x13, 0xB82E);
-        rtl8168_mdio_write(tp, 0x14, 0x0001);
-        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0xb820);
-        rtl8168_mdio_write(tp, 0x14, 0x0290);
-        rtl8168_mdio_write(tp, 0x13, 0xa012);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-        rtl8168_mdio_write(tp, 0x13, 0xa014);
-        rtl8168_mdio_write(tp, 0x14, 0x2c04);
-        rtl8168_mdio_write(tp, 0x14, 0x2c07);
-        rtl8168_mdio_write(tp, 0x14, 0x2c07);
-        rtl8168_mdio_write(tp, 0x14, 0x2c07);
-        rtl8168_mdio_write(tp, 0x14, 0xa304);
-        rtl8168_mdio_write(tp, 0x14, 0xa301);
-        rtl8168_mdio_write(tp, 0x14, 0x207e);
-        rtl8168_mdio_write(tp, 0x13, 0xa01a);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-        rtl8168_mdio_write(tp, 0x13, 0xa006);
-        rtl8168_mdio_write(tp, 0x14, 0x0fff);
-        rtl8168_mdio_write(tp, 0x13, 0xa004);
-        rtl8168_mdio_write(tp, 0x14, 0x0fff);
-        rtl8168_mdio_write(tp, 0x13, 0xa002);
-        rtl8168_mdio_write(tp, 0x14, 0x0fff);
-        rtl8168_mdio_write(tp, 0x13, 0xa000);
-        rtl8168_mdio_write(tp, 0x14, 0x107c);
-        rtl8168_mdio_write(tp, 0x13, 0xb820);
-        rtl8168_mdio_write(tp, 0x14, 0x0210);
-        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x0000);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0B82);
-        gphy_val = rtl8168_mdio_read(tp, 0x17);
-        gphy_val &= ~(BIT_0);
-        rtl8168_mdio_write(tp, 0x17, gphy_val);
-        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x8146);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-
-        rtl8168_clear_phy_mcu_patch_request(tp);
-}
-
-static void
-rtl8168_set_phy_mcu_8411b_1(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        unsigned int gphy_val;
-
-        rtl8168_set_phy_mcu_patch_request(tp);
-
-        rtl8168_mdio_write(tp,0x1f, 0x0A43);
-        rtl8168_mdio_write(tp,0x13, 0x8146);
-        rtl8168_mdio_write(tp,0x14, 0x0100);
-        rtl8168_mdio_write(tp,0x13, 0xB82E);
-        rtl8168_mdio_write(tp,0x14, 0x0001);
-
-
-        rtl8168_mdio_write(tp,0x1F, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0xb820);
-        rtl8168_mdio_write(tp, 0x14, 0x0290);
-        rtl8168_mdio_write(tp, 0x13, 0xa012);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-        rtl8168_mdio_write(tp, 0x13, 0xa014);
-        rtl8168_mdio_write(tp, 0x14, 0x2c04);
-        rtl8168_mdio_write(tp, 0x14, 0x2c07);
-        rtl8168_mdio_write(tp, 0x14, 0x2c07);
-        rtl8168_mdio_write(tp, 0x14, 0x2c07);
-        rtl8168_mdio_write(tp, 0x14, 0xa304);
-        rtl8168_mdio_write(tp, 0x14, 0xa301);
-        rtl8168_mdio_write(tp, 0x14, 0x207e);
-        rtl8168_mdio_write(tp, 0x13, 0xa01a);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-        rtl8168_mdio_write(tp, 0x13, 0xa006);
-        rtl8168_mdio_write(tp, 0x14, 0x0fff);
-        rtl8168_mdio_write(tp, 0x13, 0xa004);
-        rtl8168_mdio_write(tp, 0x14, 0x0fff);
-        rtl8168_mdio_write(tp, 0x13, 0xa002);
-        rtl8168_mdio_write(tp, 0x14, 0x0fff);
-        rtl8168_mdio_write(tp, 0x13, 0xa000);
-        rtl8168_mdio_write(tp, 0x14, 0x107c);
-        rtl8168_mdio_write(tp, 0x13, 0xb820);
-        rtl8168_mdio_write(tp, 0x14, 0x0210);
-
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x0000);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0B82);
-        gphy_val = rtl8168_mdio_read(tp, 0x17);
-        gphy_val &= ~(BIT_0);
-        rtl8168_mdio_write(tp, 0x17, gphy_val);
-        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x8146);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-
-        rtl8168_clear_phy_mcu_patch_request(tp);
-}
-
-static void
-rtl8168_set_phy_mcu_8168ep_2(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        unsigned int gphy_val;
-
-        rtl8168_set_phy_mcu_patch_request(tp);
-
-        rtl8168_mdio_write(tp,0x1f, 0x0A43);
-        rtl8168_mdio_write(tp,0x13, 0x8146);
-        rtl8168_mdio_write(tp,0x14, 0x8700);
-        rtl8168_mdio_write(tp,0x13, 0xB82E);
-        rtl8168_mdio_write(tp,0x14, 0x0001);
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-
-        rtl8168_mdio_write(tp, 0x13, 0x83DD);
-        rtl8168_mdio_write(tp, 0x14, 0xAF83);
-        rtl8168_mdio_write(tp, 0x14, 0xE9AF);
-        rtl8168_mdio_write(tp, 0x14, 0x83EE);
-        rtl8168_mdio_write(tp, 0x14, 0xAF83);
-        rtl8168_mdio_write(tp, 0x14, 0xF1A1);
-        rtl8168_mdio_write(tp, 0x14, 0x83F4);
-        rtl8168_mdio_write(tp, 0x14, 0xD149);
-        rtl8168_mdio_write(tp, 0x14, 0xAF06);
-        rtl8168_mdio_write(tp, 0x14, 0x47AF);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-        rtl8168_mdio_write(tp, 0x14, 0xAF00);
-        rtl8168_mdio_write(tp, 0x14, 0x00AF);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-
-        rtl8168_mdio_write(tp, 0x13, 0xB818);
-        rtl8168_mdio_write(tp, 0x14, 0x0645);
-
-        rtl8168_mdio_write(tp, 0x13, 0xB81A);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-
-        rtl8168_mdio_write(tp, 0x13, 0xB81C);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-
-        rtl8168_mdio_write(tp, 0x13, 0xB81E);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-
-        rtl8168_mdio_write(tp, 0x13, 0xB832);
-        rtl8168_mdio_write(tp, 0x14, 0x0001);
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x0000);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0B82);
-        gphy_val = rtl8168_mdio_read(tp, 0x17);
-        gphy_val &= ~(BIT_0);
-        rtl8168_mdio_write(tp, 0x17, gphy_val);
-        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x8146);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-
-        rtl8168_clear_phy_mcu_patch_request(tp);
-}
-
-static void
-rtl8168_set_phy_mcu_8168h_1(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        unsigned int gphy_val;
-
-        rtl8168_set_phy_mcu_patch_request(tp);
-
-        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x8028);
-        rtl8168_mdio_write(tp, 0x14, 0x6200);
-        rtl8168_mdio_write(tp, 0x13, 0xB82E);
-        rtl8168_mdio_write(tp, 0x14, 0x0001);
-
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0xB820);
-        rtl8168_mdio_write(tp, 0x14, 0x0290);
-        rtl8168_mdio_write(tp, 0x13, 0xA012);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-        rtl8168_mdio_write(tp, 0x13, 0xA014);
-        rtl8168_mdio_write(tp, 0x14, 0x2c04);
-        rtl8168_mdio_write(tp, 0x14, 0x2c10);
-        rtl8168_mdio_write(tp, 0x14, 0x2c10);
-        rtl8168_mdio_write(tp, 0x14, 0x2c10);
-        rtl8168_mdio_write(tp, 0x14, 0xa210);
-        rtl8168_mdio_write(tp, 0x14, 0xa101);
-        rtl8168_mdio_write(tp, 0x14, 0xce10);
-        rtl8168_mdio_write(tp, 0x14, 0xe070);
-        rtl8168_mdio_write(tp, 0x14, 0x0f40);
-        rtl8168_mdio_write(tp, 0x14, 0xaf01);
-        rtl8168_mdio_write(tp, 0x14, 0x8f01);
-        rtl8168_mdio_write(tp, 0x14, 0x183e);
-        rtl8168_mdio_write(tp, 0x14, 0x8e10);
-        rtl8168_mdio_write(tp, 0x14, 0x8101);
-        rtl8168_mdio_write(tp, 0x14, 0x8210);
-        rtl8168_mdio_write(tp, 0x14, 0x28da);
-        rtl8168_mdio_write(tp, 0x13, 0xA01A);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-        rtl8168_mdio_write(tp, 0x13, 0xA006);
-        rtl8168_mdio_write(tp, 0x14, 0x0017);
-        rtl8168_mdio_write(tp, 0x13, 0xA004);
-        rtl8168_mdio_write(tp, 0x14, 0x0015);
-        rtl8168_mdio_write(tp, 0x13, 0xA002);
-        rtl8168_mdio_write(tp, 0x14, 0x0013);
-        rtl8168_mdio_write(tp, 0x13, 0xA000);
-        rtl8168_mdio_write(tp, 0x14, 0x18d1);
-        rtl8168_mdio_write(tp, 0x13, 0xB820);
-        rtl8168_mdio_write(tp, 0x14, 0x0210);
-
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x0000);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0B82);
-        gphy_val = rtl8168_mdio_read(tp, 0x17);
-        gphy_val &= ~(BIT_0);
-        rtl8168_mdio_write(tp, 0x17, gphy_val);
-        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x8028);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-
-        rtl8168_clear_phy_mcu_patch_request(tp);
-}
-
-static void
-rtl8168_set_phy_mcu_8168h_2(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        unsigned int gphy_val;
-
-        rtl8168_set_phy_mcu_patch_request(tp);
-
-        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x8028);
-        rtl8168_mdio_write(tp, 0x14, 0x6201);
-        rtl8168_mdio_write(tp, 0x13, 0xB82E);
-        rtl8168_mdio_write(tp, 0x14, 0x0001);
-
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0xB820);
-        rtl8168_mdio_write(tp, 0x14, 0x0290);
-        rtl8168_mdio_write(tp, 0x13, 0xA012);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-        rtl8168_mdio_write(tp, 0x13, 0xA014);
-        rtl8168_mdio_write(tp, 0x14, 0x2c04);
-        rtl8168_mdio_write(tp, 0x14, 0x2c09);
-        rtl8168_mdio_write(tp, 0x14, 0x2c0d);
-        rtl8168_mdio_write(tp, 0x14, 0x2c12);
-        rtl8168_mdio_write(tp, 0x14, 0xad01);
-        rtl8168_mdio_write(tp, 0x14, 0xad01);
-        rtl8168_mdio_write(tp, 0x14, 0xad01);
-        rtl8168_mdio_write(tp, 0x14, 0xad01);
-        rtl8168_mdio_write(tp, 0x14, 0x236c);
-        rtl8168_mdio_write(tp, 0x14, 0xd03c);
-        rtl8168_mdio_write(tp, 0x14, 0xd1aa);
-        rtl8168_mdio_write(tp, 0x14, 0xc010);
-        rtl8168_mdio_write(tp, 0x14, 0x2745);
-        rtl8168_mdio_write(tp, 0x14, 0x33de);
-        rtl8168_mdio_write(tp, 0x14, 0x16ba);
-        rtl8168_mdio_write(tp, 0x14, 0x31ee);
-        rtl8168_mdio_write(tp, 0x14, 0x2712);
-        rtl8168_mdio_write(tp, 0x14, 0x274e);
-        rtl8168_mdio_write(tp, 0x14, 0xc2bb);
-        rtl8168_mdio_write(tp, 0x14, 0xd500);
-        rtl8168_mdio_write(tp, 0x14, 0xc426);
-        rtl8168_mdio_write(tp, 0x14, 0xd01d);
-        rtl8168_mdio_write(tp, 0x14, 0xd1c3);
-        rtl8168_mdio_write(tp, 0x14, 0x401c);
-        rtl8168_mdio_write(tp, 0x14, 0xd501);
-        rtl8168_mdio_write(tp, 0x14, 0xc2b3);
-        rtl8168_mdio_write(tp, 0x14, 0xd500);
-        rtl8168_mdio_write(tp, 0x14, 0xd00b);
-        rtl8168_mdio_write(tp, 0x14, 0xd1c3);
-        rtl8168_mdio_write(tp, 0x14, 0x401c);
-        rtl8168_mdio_write(tp, 0x14, 0x241a);
-        rtl8168_mdio_write(tp, 0x13, 0xA01A);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-        rtl8168_mdio_write(tp, 0x13, 0xA006);
-        rtl8168_mdio_write(tp, 0x14, 0x0414);
-        rtl8168_mdio_write(tp, 0x13, 0xA004);
-        rtl8168_mdio_write(tp, 0x14, 0x074c);
-        rtl8168_mdio_write(tp, 0x13, 0xA002);
-        rtl8168_mdio_write(tp, 0x14, 0x0744);
-        rtl8168_mdio_write(tp, 0x13, 0xA000);
-        rtl8168_mdio_write(tp, 0x14, 0xf36b);
-        rtl8168_mdio_write(tp, 0x13, 0xB820);
-        rtl8168_mdio_write(tp, 0x14, 0x0210);
-
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x8323);
-        rtl8168_mdio_write(tp, 0x14, 0xaf83);
-        rtl8168_mdio_write(tp, 0x14, 0x2faf);
-        rtl8168_mdio_write(tp, 0x14, 0x853d);
-        rtl8168_mdio_write(tp, 0x14, 0xaf85);
-        rtl8168_mdio_write(tp, 0x14, 0x3daf);
-        rtl8168_mdio_write(tp, 0x14, 0x853d);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x45ad);
-        rtl8168_mdio_write(tp, 0x14, 0x2052);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x7ae3);
-        rtl8168_mdio_write(tp, 0x14, 0x85fe);
-        rtl8168_mdio_write(tp, 0x14, 0x1a03);
-        rtl8168_mdio_write(tp, 0x14, 0x10e4);
-        rtl8168_mdio_write(tp, 0x14, 0x85f6);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x7a1b);
-        rtl8168_mdio_write(tp, 0x14, 0x03e4);
-        rtl8168_mdio_write(tp, 0x14, 0x85fa);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x7be3);
-        rtl8168_mdio_write(tp, 0x14, 0x85fe);
-        rtl8168_mdio_write(tp, 0x14, 0x1a03);
-        rtl8168_mdio_write(tp, 0x14, 0x10e4);
-        rtl8168_mdio_write(tp, 0x14, 0x85f7);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x7b1b);
-        rtl8168_mdio_write(tp, 0x14, 0x03e4);
-        rtl8168_mdio_write(tp, 0x14, 0x85fb);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x7ce3);
-        rtl8168_mdio_write(tp, 0x14, 0x85fe);
-        rtl8168_mdio_write(tp, 0x14, 0x1a03);
-        rtl8168_mdio_write(tp, 0x14, 0x10e4);
-        rtl8168_mdio_write(tp, 0x14, 0x85f8);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x7c1b);
-        rtl8168_mdio_write(tp, 0x14, 0x03e4);
-        rtl8168_mdio_write(tp, 0x14, 0x85fc);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x7de3);
-        rtl8168_mdio_write(tp, 0x14, 0x85fe);
-        rtl8168_mdio_write(tp, 0x14, 0x1a03);
-        rtl8168_mdio_write(tp, 0x14, 0x10e4);
-        rtl8168_mdio_write(tp, 0x14, 0x85f9);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x7d1b);
-        rtl8168_mdio_write(tp, 0x14, 0x03e4);
-        rtl8168_mdio_write(tp, 0x14, 0x85fd);
-        rtl8168_mdio_write(tp, 0x14, 0xae50);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x7ee3);
-        rtl8168_mdio_write(tp, 0x14, 0x85ff);
-        rtl8168_mdio_write(tp, 0x14, 0x1a03);
-        rtl8168_mdio_write(tp, 0x14, 0x10e4);
-        rtl8168_mdio_write(tp, 0x14, 0x85f6);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x7e1b);
-        rtl8168_mdio_write(tp, 0x14, 0x03e4);
-        rtl8168_mdio_write(tp, 0x14, 0x85fa);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x7fe3);
-        rtl8168_mdio_write(tp, 0x14, 0x85ff);
-        rtl8168_mdio_write(tp, 0x14, 0x1a03);
-        rtl8168_mdio_write(tp, 0x14, 0x10e4);
-        rtl8168_mdio_write(tp, 0x14, 0x85f7);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x7f1b);
-        rtl8168_mdio_write(tp, 0x14, 0x03e4);
-        rtl8168_mdio_write(tp, 0x14, 0x85fb);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x80e3);
-        rtl8168_mdio_write(tp, 0x14, 0x85ff);
-        rtl8168_mdio_write(tp, 0x14, 0x1a03);
-        rtl8168_mdio_write(tp, 0x14, 0x10e4);
-        rtl8168_mdio_write(tp, 0x14, 0x85f8);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x801b);
-        rtl8168_mdio_write(tp, 0x14, 0x03e4);
-        rtl8168_mdio_write(tp, 0x14, 0x85fc);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x81e3);
-        rtl8168_mdio_write(tp, 0x14, 0x85ff);
-        rtl8168_mdio_write(tp, 0x14, 0x1a03);
-        rtl8168_mdio_write(tp, 0x14, 0x10e4);
-        rtl8168_mdio_write(tp, 0x14, 0x85f9);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x811b);
-        rtl8168_mdio_write(tp, 0x14, 0x03e4);
-        rtl8168_mdio_write(tp, 0x14, 0x85fd);
-        rtl8168_mdio_write(tp, 0x14, 0xe085);
-        rtl8168_mdio_write(tp, 0x14, 0xf6ad);
-        rtl8168_mdio_write(tp, 0x14, 0x2404);
-        rtl8168_mdio_write(tp, 0x14, 0xee85);
-        rtl8168_mdio_write(tp, 0x14, 0xf610);
-        rtl8168_mdio_write(tp, 0x14, 0xe085);
-        rtl8168_mdio_write(tp, 0x14, 0xf7ad);
-        rtl8168_mdio_write(tp, 0x14, 0x2404);
-        rtl8168_mdio_write(tp, 0x14, 0xee85);
-        rtl8168_mdio_write(tp, 0x14, 0xf710);
-        rtl8168_mdio_write(tp, 0x14, 0xe085);
-        rtl8168_mdio_write(tp, 0x14, 0xf8ad);
-        rtl8168_mdio_write(tp, 0x14, 0x2404);
-        rtl8168_mdio_write(tp, 0x14, 0xee85);
-        rtl8168_mdio_write(tp, 0x14, 0xf810);
-        rtl8168_mdio_write(tp, 0x14, 0xe085);
-        rtl8168_mdio_write(tp, 0x14, 0xf9ad);
-        rtl8168_mdio_write(tp, 0x14, 0x2404);
-        rtl8168_mdio_write(tp, 0x14, 0xee85);
-        rtl8168_mdio_write(tp, 0x14, 0xf910);
-        rtl8168_mdio_write(tp, 0x14, 0xe085);
-        rtl8168_mdio_write(tp, 0x14, 0xfaad);
-        rtl8168_mdio_write(tp, 0x14, 0x2704);
-        rtl8168_mdio_write(tp, 0x14, 0xee85);
-        rtl8168_mdio_write(tp, 0x14, 0xfa00);
-        rtl8168_mdio_write(tp, 0x14, 0xe085);
-        rtl8168_mdio_write(tp, 0x14, 0xfbad);
-        rtl8168_mdio_write(tp, 0x14, 0x2704);
-        rtl8168_mdio_write(tp, 0x14, 0xee85);
-        rtl8168_mdio_write(tp, 0x14, 0xfb00);
-        rtl8168_mdio_write(tp, 0x14, 0xe085);
-        rtl8168_mdio_write(tp, 0x14, 0xfcad);
-        rtl8168_mdio_write(tp, 0x14, 0x2704);
-        rtl8168_mdio_write(tp, 0x14, 0xee85);
-        rtl8168_mdio_write(tp, 0x14, 0xfc00);
-        rtl8168_mdio_write(tp, 0x14, 0xe085);
-        rtl8168_mdio_write(tp, 0x14, 0xfdad);
-        rtl8168_mdio_write(tp, 0x14, 0x2704);
-        rtl8168_mdio_write(tp, 0x14, 0xee85);
-        rtl8168_mdio_write(tp, 0x14, 0xfd00);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x44ad);
-        rtl8168_mdio_write(tp, 0x14, 0x203f);
-        rtl8168_mdio_write(tp, 0x14, 0xe085);
-        rtl8168_mdio_write(tp, 0x14, 0xf6e4);
-        rtl8168_mdio_write(tp, 0x14, 0x8288);
-        rtl8168_mdio_write(tp, 0x14, 0xe085);
-        rtl8168_mdio_write(tp, 0x14, 0xfae4);
-        rtl8168_mdio_write(tp, 0x14, 0x8289);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x440d);
-        rtl8168_mdio_write(tp, 0x14, 0x0458);
-        rtl8168_mdio_write(tp, 0x14, 0x01bf);
-        rtl8168_mdio_write(tp, 0x14, 0x8264);
-        rtl8168_mdio_write(tp, 0x14, 0x0215);
-        rtl8168_mdio_write(tp, 0x14, 0x38bf);
-        rtl8168_mdio_write(tp, 0x14, 0x824e);
-        rtl8168_mdio_write(tp, 0x14, 0x0213);
-        rtl8168_mdio_write(tp, 0x14, 0x06a0);
-        rtl8168_mdio_write(tp, 0x14, 0x010f);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x44f6);
-        rtl8168_mdio_write(tp, 0x14, 0x20e4);
-        rtl8168_mdio_write(tp, 0x14, 0x8244);
-        rtl8168_mdio_write(tp, 0x14, 0x580f);
-        rtl8168_mdio_write(tp, 0x14, 0xe582);
-        rtl8168_mdio_write(tp, 0x14, 0x5aae);
-        rtl8168_mdio_write(tp, 0x14, 0x0ebf);
-        rtl8168_mdio_write(tp, 0x14, 0x825e);
-        rtl8168_mdio_write(tp, 0x14, 0xe382);
-        rtl8168_mdio_write(tp, 0x14, 0x44f7);
-        rtl8168_mdio_write(tp, 0x14, 0x3ce7);
-        rtl8168_mdio_write(tp, 0x14, 0x8244);
-        rtl8168_mdio_write(tp, 0x14, 0x0212);
-        rtl8168_mdio_write(tp, 0x14, 0xf0ad);
-        rtl8168_mdio_write(tp, 0x14, 0x213f);
-        rtl8168_mdio_write(tp, 0x14, 0xe085);
-        rtl8168_mdio_write(tp, 0x14, 0xf7e4);
-        rtl8168_mdio_write(tp, 0x14, 0x8288);
-        rtl8168_mdio_write(tp, 0x14, 0xe085);
-        rtl8168_mdio_write(tp, 0x14, 0xfbe4);
-        rtl8168_mdio_write(tp, 0x14, 0x8289);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x440d);
-        rtl8168_mdio_write(tp, 0x14, 0x0558);
-        rtl8168_mdio_write(tp, 0x14, 0x01bf);
-        rtl8168_mdio_write(tp, 0x14, 0x826b);
-        rtl8168_mdio_write(tp, 0x14, 0x0215);
-        rtl8168_mdio_write(tp, 0x14, 0x38bf);
-        rtl8168_mdio_write(tp, 0x14, 0x824f);
-        rtl8168_mdio_write(tp, 0x14, 0x0213);
-        rtl8168_mdio_write(tp, 0x14, 0x06a0);
-        rtl8168_mdio_write(tp, 0x14, 0x010f);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x44f6);
-        rtl8168_mdio_write(tp, 0x14, 0x21e4);
-        rtl8168_mdio_write(tp, 0x14, 0x8244);
-        rtl8168_mdio_write(tp, 0x14, 0x580f);
-        rtl8168_mdio_write(tp, 0x14, 0xe582);
-        rtl8168_mdio_write(tp, 0x14, 0x5bae);
-        rtl8168_mdio_write(tp, 0x14, 0x0ebf);
-        rtl8168_mdio_write(tp, 0x14, 0x8265);
-        rtl8168_mdio_write(tp, 0x14, 0xe382);
-        rtl8168_mdio_write(tp, 0x14, 0x44f7);
-        rtl8168_mdio_write(tp, 0x14, 0x3de7);
-        rtl8168_mdio_write(tp, 0x14, 0x8244);
-        rtl8168_mdio_write(tp, 0x14, 0x0212);
-        rtl8168_mdio_write(tp, 0x14, 0xf0ad);
-        rtl8168_mdio_write(tp, 0x14, 0x223f);
-        rtl8168_mdio_write(tp, 0x14, 0xe085);
-        rtl8168_mdio_write(tp, 0x14, 0xf8e4);
-        rtl8168_mdio_write(tp, 0x14, 0x8288);
-        rtl8168_mdio_write(tp, 0x14, 0xe085);
-        rtl8168_mdio_write(tp, 0x14, 0xfce4);
-        rtl8168_mdio_write(tp, 0x14, 0x8289);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x440d);
-        rtl8168_mdio_write(tp, 0x14, 0x0658);
-        rtl8168_mdio_write(tp, 0x14, 0x01bf);
-        rtl8168_mdio_write(tp, 0x14, 0x8272);
-        rtl8168_mdio_write(tp, 0x14, 0x0215);
-        rtl8168_mdio_write(tp, 0x14, 0x38bf);
-        rtl8168_mdio_write(tp, 0x14, 0x8250);
-        rtl8168_mdio_write(tp, 0x14, 0x0213);
-        rtl8168_mdio_write(tp, 0x14, 0x06a0);
-        rtl8168_mdio_write(tp, 0x14, 0x010f);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x44f6);
-        rtl8168_mdio_write(tp, 0x14, 0x22e4);
-        rtl8168_mdio_write(tp, 0x14, 0x8244);
-        rtl8168_mdio_write(tp, 0x14, 0x580f);
-        rtl8168_mdio_write(tp, 0x14, 0xe582);
-        rtl8168_mdio_write(tp, 0x14, 0x5cae);
-        rtl8168_mdio_write(tp, 0x14, 0x0ebf);
-        rtl8168_mdio_write(tp, 0x14, 0x826c);
-        rtl8168_mdio_write(tp, 0x14, 0xe382);
-        rtl8168_mdio_write(tp, 0x14, 0x44f7);
-        rtl8168_mdio_write(tp, 0x14, 0x3ee7);
-        rtl8168_mdio_write(tp, 0x14, 0x8244);
-        rtl8168_mdio_write(tp, 0x14, 0x0212);
-        rtl8168_mdio_write(tp, 0x14, 0xf0ad);
-        rtl8168_mdio_write(tp, 0x14, 0x233f);
-        rtl8168_mdio_write(tp, 0x14, 0xe085);
-        rtl8168_mdio_write(tp, 0x14, 0xf9e4);
-        rtl8168_mdio_write(tp, 0x14, 0x8288);
-        rtl8168_mdio_write(tp, 0x14, 0xe085);
-        rtl8168_mdio_write(tp, 0x14, 0xfde4);
-        rtl8168_mdio_write(tp, 0x14, 0x8289);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x440d);
-        rtl8168_mdio_write(tp, 0x14, 0x0758);
-        rtl8168_mdio_write(tp, 0x14, 0x01bf);
-        rtl8168_mdio_write(tp, 0x14, 0x8279);
-        rtl8168_mdio_write(tp, 0x14, 0x0215);
-        rtl8168_mdio_write(tp, 0x14, 0x38bf);
-        rtl8168_mdio_write(tp, 0x14, 0x8251);
-        rtl8168_mdio_write(tp, 0x14, 0x0213);
-        rtl8168_mdio_write(tp, 0x14, 0x06a0);
-        rtl8168_mdio_write(tp, 0x14, 0x010f);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0x44f6);
-        rtl8168_mdio_write(tp, 0x14, 0x23e4);
-        rtl8168_mdio_write(tp, 0x14, 0x8244);
-        rtl8168_mdio_write(tp, 0x14, 0x580f);
-        rtl8168_mdio_write(tp, 0x14, 0xe582);
-        rtl8168_mdio_write(tp, 0x14, 0x5dae);
-        rtl8168_mdio_write(tp, 0x14, 0x0ebf);
-        rtl8168_mdio_write(tp, 0x14, 0x8273);
-        rtl8168_mdio_write(tp, 0x14, 0xe382);
-        rtl8168_mdio_write(tp, 0x14, 0x44f7);
-        rtl8168_mdio_write(tp, 0x14, 0x3fe7);
-        rtl8168_mdio_write(tp, 0x14, 0x8244);
-        rtl8168_mdio_write(tp, 0x14, 0x0212);
-        rtl8168_mdio_write(tp, 0x14, 0xf0ee);
-        rtl8168_mdio_write(tp, 0x14, 0x8288);
-        rtl8168_mdio_write(tp, 0x14, 0x10ee);
-        rtl8168_mdio_write(tp, 0x14, 0x8289);
-        rtl8168_mdio_write(tp, 0x14, 0x00af);
-        rtl8168_mdio_write(tp, 0x14, 0x14aa);
-        rtl8168_mdio_write(tp, 0x13, 0xb818);
-        rtl8168_mdio_write(tp, 0x14, 0x13cf);
-        rtl8168_mdio_write(tp, 0x13, 0xb81a);
-        rtl8168_mdio_write(tp, 0x14, 0xfffd);
-        rtl8168_mdio_write(tp, 0x13, 0xb81c);
-        rtl8168_mdio_write(tp, 0x14, 0xfffd);
-        rtl8168_mdio_write(tp, 0x13, 0xb81e);
-        rtl8168_mdio_write(tp, 0x14, 0xfffd);
-        rtl8168_mdio_write(tp, 0x13, 0xb832);
-        rtl8168_mdio_write(tp, 0x14, 0x0001);
-
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x0000);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0B82);
-        gphy_val = rtl8168_mdio_read(tp, 0x17);
-        gphy_val &= ~(BIT_0);
-        rtl8168_mdio_write(tp, 0x17, gphy_val);
-        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x8028);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-
-        rtl8168_clear_phy_mcu_patch_request(tp);
-
-        if (tp->RequiredSecLanDonglePatch) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                gphy_val = rtl8168_mdio_read(tp, 0x11);
-                gphy_val &= ~BIT_6;
-                rtl8168_mdio_write(tp, 0x11, gphy_val);
-        }
-}
-
-static void
-rtl8168_set_phy_mcu_8168h_3(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        unsigned int gphy_val;
-
-        rtl8168_set_phy_mcu_patch_request(tp);
-
-
-        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x8042);
-        rtl8168_mdio_write(tp, 0x14, 0x3800);
-        rtl8168_mdio_write(tp, 0x13, 0xB82E);
-        rtl8168_mdio_write(tp, 0x14, 0x0001);
-
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0xB820);
-        rtl8168_mdio_write(tp, 0x14, 0x0090);
-        rtl8168_mdio_write(tp, 0x13, 0xA016);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-        rtl8168_mdio_write(tp, 0x13, 0xA012);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-        rtl8168_mdio_write(tp, 0x13, 0xA014);
-        rtl8168_mdio_write(tp, 0x14, 0x1800);
-        rtl8168_mdio_write(tp, 0x14, 0x8010);
-        rtl8168_mdio_write(tp, 0x14, 0x1800);
-        rtl8168_mdio_write(tp, 0x14, 0x8014);
-        rtl8168_mdio_write(tp, 0x14, 0x1800);
-        rtl8168_mdio_write(tp, 0x14, 0x8022);
-        rtl8168_mdio_write(tp, 0x14, 0x1800);
-        rtl8168_mdio_write(tp, 0x14, 0x8022);
-        rtl8168_mdio_write(tp, 0x14, 0x1800);
-        rtl8168_mdio_write(tp, 0x14, 0x8022);
-        rtl8168_mdio_write(tp, 0x14, 0x1800);
-        rtl8168_mdio_write(tp, 0x14, 0x8022);
-        rtl8168_mdio_write(tp, 0x14, 0x1800);
-        rtl8168_mdio_write(tp, 0x14, 0x8022);
-        rtl8168_mdio_write(tp, 0x14, 0x1800);
-        rtl8168_mdio_write(tp, 0x14, 0x8022);
-        rtl8168_mdio_write(tp, 0x14, 0x2b5d);
-        rtl8168_mdio_write(tp, 0x14, 0x0c68);
-        rtl8168_mdio_write(tp, 0x14, 0x1800);
-        rtl8168_mdio_write(tp, 0x14, 0x0b3c);
-        rtl8168_mdio_write(tp, 0x14, 0xc2bb);
-        rtl8168_mdio_write(tp, 0x14, 0xd500);
-        rtl8168_mdio_write(tp, 0x14, 0xc426);
-        rtl8168_mdio_write(tp, 0x14, 0xd01d);
-        rtl8168_mdio_write(tp, 0x14, 0xd1c3);
-        rtl8168_mdio_write(tp, 0x14, 0x401c);
-        rtl8168_mdio_write(tp, 0x14, 0xd501);
-        rtl8168_mdio_write(tp, 0x14, 0xc2b3);
-        rtl8168_mdio_write(tp, 0x14, 0xd500);
-        rtl8168_mdio_write(tp, 0x14, 0xd00b);
-        rtl8168_mdio_write(tp, 0x14, 0xd1c3);
-        rtl8168_mdio_write(tp, 0x14, 0x401c);
-        rtl8168_mdio_write(tp, 0x14, 0x1800);
-        rtl8168_mdio_write(tp, 0x14, 0x0478);
-        rtl8168_mdio_write(tp, 0x13, 0xA026);
-        rtl8168_mdio_write(tp, 0x14, 0x0fff);
-        rtl8168_mdio_write(tp, 0x13, 0xA024);
-        rtl8168_mdio_write(tp, 0x14, 0x0fff);
-        rtl8168_mdio_write(tp, 0x13, 0xA022);
-        rtl8168_mdio_write(tp, 0x14, 0x0fff);
-        rtl8168_mdio_write(tp, 0x13, 0xA020);
-        rtl8168_mdio_write(tp, 0x14, 0x0fff);
-        rtl8168_mdio_write(tp, 0x13, 0xA006);
-        rtl8168_mdio_write(tp, 0x14, 0x0fff);
-        rtl8168_mdio_write(tp, 0x13, 0xA004);
-        rtl8168_mdio_write(tp, 0x14, 0x0fff);
-        rtl8168_mdio_write(tp, 0x13, 0xA002);
-        rtl8168_mdio_write(tp, 0x14, 0x0472);
-        rtl8168_mdio_write(tp, 0x13, 0xA000);
-        rtl8168_mdio_write(tp, 0x14, 0x0b3a);
-        rtl8168_mdio_write(tp, 0x13, 0xA008);
-        rtl8168_mdio_write(tp, 0x14, 0x0300);
-        rtl8168_mdio_write(tp, 0x13, 0xB820);
-        rtl8168_mdio_write(tp, 0x14, 0x0010);
-
-
-        rtl8168_mdio_write(tp, 0x13, 0x83f3);
-        rtl8168_mdio_write(tp, 0x14, 0xaf84);
-        rtl8168_mdio_write(tp, 0x14, 0x0baf);
-        rtl8168_mdio_write(tp, 0x14, 0x8466);
-        rtl8168_mdio_write(tp, 0x14, 0xaf84);
-        rtl8168_mdio_write(tp, 0x14, 0xcdaf);
-        rtl8168_mdio_write(tp, 0x14, 0x873c);
-        rtl8168_mdio_write(tp, 0x14, 0xaf87);
-        rtl8168_mdio_write(tp, 0x14, 0x3faf);
-        rtl8168_mdio_write(tp, 0x14, 0x8760);
-        rtl8168_mdio_write(tp, 0x14, 0xaf87);
-        rtl8168_mdio_write(tp, 0x14, 0x60af);
-        rtl8168_mdio_write(tp, 0x14, 0x8760);
-        rtl8168_mdio_write(tp, 0x14, 0xef79);
-        rtl8168_mdio_write(tp, 0x14, 0xfb89);
-        rtl8168_mdio_write(tp, 0x14, 0xe987);
-        rtl8168_mdio_write(tp, 0x14, 0xffd7);
-        rtl8168_mdio_write(tp, 0x14, 0x0017);
-        rtl8168_mdio_write(tp, 0x14, 0xd400);
-        rtl8168_mdio_write(tp, 0x14, 0x051c);
-        rtl8168_mdio_write(tp, 0x14, 0x421a);
-        rtl8168_mdio_write(tp, 0x14, 0x741b);
-        rtl8168_mdio_write(tp, 0x14, 0x97e9);
-        rtl8168_mdio_write(tp, 0x14, 0x87fe);
-        rtl8168_mdio_write(tp, 0x14, 0xffef);
-        rtl8168_mdio_write(tp, 0x14, 0x97e0);
-        rtl8168_mdio_write(tp, 0x14, 0x82aa);
-        rtl8168_mdio_write(tp, 0x14, 0xa000);
-        rtl8168_mdio_write(tp, 0x14, 0x08ef);
-        rtl8168_mdio_write(tp, 0x14, 0x46dc);
-        rtl8168_mdio_write(tp, 0x14, 0x19dd);
-        rtl8168_mdio_write(tp, 0x14, 0xaf1a);
-        rtl8168_mdio_write(tp, 0x14, 0x37a0);
-        rtl8168_mdio_write(tp, 0x14, 0x012d);
-        rtl8168_mdio_write(tp, 0x14, 0xe082);
-        rtl8168_mdio_write(tp, 0x14, 0xa7ac);
-        rtl8168_mdio_write(tp, 0x14, 0x2013);
-        rtl8168_mdio_write(tp, 0x14, 0xe087);
-        rtl8168_mdio_write(tp, 0x14, 0xffe1);
-        rtl8168_mdio_write(tp, 0x14, 0x87fe);
-        rtl8168_mdio_write(tp, 0x14, 0xac27);
-        rtl8168_mdio_write(tp, 0x14, 0x05a1);
-        rtl8168_mdio_write(tp, 0x14, 0x0807);
-        rtl8168_mdio_write(tp, 0x14, 0xae0f);
-        rtl8168_mdio_write(tp, 0x14, 0xa107);
-        rtl8168_mdio_write(tp, 0x14, 0x02ae);
-        rtl8168_mdio_write(tp, 0x14, 0x0aef);
-        rtl8168_mdio_write(tp, 0x14, 0x4619);
-        rtl8168_mdio_write(tp, 0x14, 0x19dc);
-        rtl8168_mdio_write(tp, 0x14, 0x19dd);
-        rtl8168_mdio_write(tp, 0x14, 0xaf1a);
-        rtl8168_mdio_write(tp, 0x14, 0x37d8);
-        rtl8168_mdio_write(tp, 0x14, 0x19d9);
-        rtl8168_mdio_write(tp, 0x14, 0x19dc);
-        rtl8168_mdio_write(tp, 0x14, 0x19dd);
-        rtl8168_mdio_write(tp, 0x14, 0xaf1a);
-        rtl8168_mdio_write(tp, 0x14, 0x3719);
-        rtl8168_mdio_write(tp, 0x14, 0x19ae);
-        rtl8168_mdio_write(tp, 0x14, 0xcfbf);
-        rtl8168_mdio_write(tp, 0x14, 0x878a);
-        rtl8168_mdio_write(tp, 0x14, 0x0244);
-        rtl8168_mdio_write(tp, 0x14, 0xdc3c);
-        rtl8168_mdio_write(tp, 0x14, 0x0005);
-        rtl8168_mdio_write(tp, 0x14, 0xaaf5);
-        rtl8168_mdio_write(tp, 0x14, 0x0249);
-        rtl8168_mdio_write(tp, 0x14, 0xcaef);
-        rtl8168_mdio_write(tp, 0x14, 0x67d7);
-        rtl8168_mdio_write(tp, 0x14, 0x0014);
-        rtl8168_mdio_write(tp, 0x14, 0x0249);
-        rtl8168_mdio_write(tp, 0x14, 0xe5ad);
-        rtl8168_mdio_write(tp, 0x14, 0x50f7);
-        rtl8168_mdio_write(tp, 0x14, 0xd400);
-        rtl8168_mdio_write(tp, 0x14, 0x01bf);
-        rtl8168_mdio_write(tp, 0x14, 0x46a7);
-        rtl8168_mdio_write(tp, 0x14, 0x0244);
-        rtl8168_mdio_write(tp, 0x14, 0x98bf);
-        rtl8168_mdio_write(tp, 0x14, 0x465c);
-        rtl8168_mdio_write(tp, 0x14, 0x024a);
-        rtl8168_mdio_write(tp, 0x14, 0x5fd4);
-        rtl8168_mdio_write(tp, 0x14, 0x0003);
-        rtl8168_mdio_write(tp, 0x14, 0xbf87);
-        rtl8168_mdio_write(tp, 0x14, 0x9c02);
-        rtl8168_mdio_write(tp, 0x14, 0x4498);
-        rtl8168_mdio_write(tp, 0x14, 0xbf87);
-        rtl8168_mdio_write(tp, 0x14, 0x9902);
-        rtl8168_mdio_write(tp, 0x14, 0x4a5f);
-        rtl8168_mdio_write(tp, 0x14, 0xbf87);
-        rtl8168_mdio_write(tp, 0x14, 0x8d02);
-        rtl8168_mdio_write(tp, 0x14, 0x4a5f);
-        rtl8168_mdio_write(tp, 0x14, 0xbf87);
-        rtl8168_mdio_write(tp, 0x14, 0x9002);
-        rtl8168_mdio_write(tp, 0x14, 0x44dc);
-        rtl8168_mdio_write(tp, 0x14, 0xad28);
-        rtl8168_mdio_write(tp, 0x14, 0xf7bf);
-        rtl8168_mdio_write(tp, 0x14, 0x8796);
-        rtl8168_mdio_write(tp, 0x14, 0x0244);
-        rtl8168_mdio_write(tp, 0x14, 0xdcad);
-        rtl8168_mdio_write(tp, 0x14, 0x28f7);
-        rtl8168_mdio_write(tp, 0x14, 0xbf87);
-        rtl8168_mdio_write(tp, 0x14, 0x9302);
-        rtl8168_mdio_write(tp, 0x14, 0x4a5f);
-        rtl8168_mdio_write(tp, 0x14, 0xbf87);
-        rtl8168_mdio_write(tp, 0x14, 0x9302);
-        rtl8168_mdio_write(tp, 0x14, 0x4a56);
-        rtl8168_mdio_write(tp, 0x14, 0xbf46);
-        rtl8168_mdio_write(tp, 0x14, 0x5c02);
-        rtl8168_mdio_write(tp, 0x14, 0x4a56);
-        rtl8168_mdio_write(tp, 0x14, 0xbf45);
-        rtl8168_mdio_write(tp, 0x14, 0x21af);
-        rtl8168_mdio_write(tp, 0x14, 0x020e);
-        rtl8168_mdio_write(tp, 0x14, 0xee82);
-        rtl8168_mdio_write(tp, 0x14, 0x5000);
-        rtl8168_mdio_write(tp, 0x14, 0x0284);
-        rtl8168_mdio_write(tp, 0x14, 0xdd02);
-        rtl8168_mdio_write(tp, 0x14, 0x8521);
-        rtl8168_mdio_write(tp, 0x14, 0x0285);
-        rtl8168_mdio_write(tp, 0x14, 0x36af);
-        rtl8168_mdio_write(tp, 0x14, 0x03d2);
-        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
-        rtl8168_mdio_write(tp, 0x14, 0xfafb);
-        rtl8168_mdio_write(tp, 0x14, 0xef59);
-        rtl8168_mdio_write(tp, 0x14, 0xbf45);
-        rtl8168_mdio_write(tp, 0x14, 0x3002);
-        rtl8168_mdio_write(tp, 0x14, 0x44dc);
-        rtl8168_mdio_write(tp, 0x14, 0x3c00);
-        rtl8168_mdio_write(tp, 0x14, 0x03aa);
-        rtl8168_mdio_write(tp, 0x14, 0x2cbf);
-        rtl8168_mdio_write(tp, 0x14, 0x8790);
-        rtl8168_mdio_write(tp, 0x14, 0x0244);
-        rtl8168_mdio_write(tp, 0x14, 0xdcad);
-        rtl8168_mdio_write(tp, 0x14, 0x2823);
-        rtl8168_mdio_write(tp, 0x14, 0xbf87);
-        rtl8168_mdio_write(tp, 0x14, 0x9602);
-        rtl8168_mdio_write(tp, 0x14, 0x44dc);
-        rtl8168_mdio_write(tp, 0x14, 0xad28);
-        rtl8168_mdio_write(tp, 0x14, 0x1a02);
-        rtl8168_mdio_write(tp, 0x14, 0x49ca);
-        rtl8168_mdio_write(tp, 0x14, 0xef67);
-        rtl8168_mdio_write(tp, 0x14, 0xd700);
-        rtl8168_mdio_write(tp, 0x14, 0x0202);
-        rtl8168_mdio_write(tp, 0x14, 0x49e5);
-        rtl8168_mdio_write(tp, 0x14, 0xad50);
-        rtl8168_mdio_write(tp, 0x14, 0xf7bf);
-        rtl8168_mdio_write(tp, 0x14, 0x8793);
-        rtl8168_mdio_write(tp, 0x14, 0x024a);
-        rtl8168_mdio_write(tp, 0x14, 0x5fbf);
-        rtl8168_mdio_write(tp, 0x14, 0x8793);
-        rtl8168_mdio_write(tp, 0x14, 0x024a);
-        rtl8168_mdio_write(tp, 0x14, 0x56ef);
-        rtl8168_mdio_write(tp, 0x14, 0x95ff);
-        rtl8168_mdio_write(tp, 0x14, 0xfefd);
-        rtl8168_mdio_write(tp, 0x14, 0xfc04);
-        rtl8168_mdio_write(tp, 0x14, 0xf8fa);
-        rtl8168_mdio_write(tp, 0x14, 0xef69);
-        rtl8168_mdio_write(tp, 0x14, 0xe080);
-        rtl8168_mdio_write(tp, 0x14, 0x15ad);
-        rtl8168_mdio_write(tp, 0x14, 0x2406);
-        rtl8168_mdio_write(tp, 0x14, 0xbf87);
-        rtl8168_mdio_write(tp, 0x14, 0x8702);
-        rtl8168_mdio_write(tp, 0x14, 0x4a56);
-        rtl8168_mdio_write(tp, 0x14, 0xef96);
-        rtl8168_mdio_write(tp, 0x14, 0xfefc);
-        rtl8168_mdio_write(tp, 0x14, 0x04f8);
-        rtl8168_mdio_write(tp, 0x14, 0xe087);
-        rtl8168_mdio_write(tp, 0x14, 0xf9e1);
-        rtl8168_mdio_write(tp, 0x14, 0x87fa);
-        rtl8168_mdio_write(tp, 0x14, 0x1b10);
-        rtl8168_mdio_write(tp, 0x14, 0x9f1e);
-        rtl8168_mdio_write(tp, 0x14, 0xee87);
-        rtl8168_mdio_write(tp, 0x14, 0xf900);
-        rtl8168_mdio_write(tp, 0x14, 0xe080);
-        rtl8168_mdio_write(tp, 0x14, 0x15ac);
-        rtl8168_mdio_write(tp, 0x14, 0x2606);
-        rtl8168_mdio_write(tp, 0x14, 0xee87);
-        rtl8168_mdio_write(tp, 0x14, 0xf700);
-        rtl8168_mdio_write(tp, 0x14, 0xae12);
-        rtl8168_mdio_write(tp, 0x14, 0x0286);
-        rtl8168_mdio_write(tp, 0x14, 0x9d02);
-        rtl8168_mdio_write(tp, 0x14, 0x8565);
-        rtl8168_mdio_write(tp, 0x14, 0x0285);
-        rtl8168_mdio_write(tp, 0x14, 0x9d02);
-        rtl8168_mdio_write(tp, 0x14, 0x8660);
-        rtl8168_mdio_write(tp, 0x14, 0xae04);
-        rtl8168_mdio_write(tp, 0x14, 0x10e4);
-        rtl8168_mdio_write(tp, 0x14, 0x87f9);
-        rtl8168_mdio_write(tp, 0x14, 0xfc04);
-        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
-        rtl8168_mdio_write(tp, 0x14, 0xfaef);
-        rtl8168_mdio_write(tp, 0x14, 0x69fa);
-        rtl8168_mdio_write(tp, 0x14, 0xbf45);
-        rtl8168_mdio_write(tp, 0x14, 0x3002);
-        rtl8168_mdio_write(tp, 0x14, 0x44dc);
-        rtl8168_mdio_write(tp, 0x14, 0xa103);
-        rtl8168_mdio_write(tp, 0x14, 0x22e0);
-        rtl8168_mdio_write(tp, 0x14, 0x87eb);
-        rtl8168_mdio_write(tp, 0x14, 0xe187);
-        rtl8168_mdio_write(tp, 0x14, 0xecef);
-        rtl8168_mdio_write(tp, 0x14, 0x64bf);
-        rtl8168_mdio_write(tp, 0x14, 0x876f);
-        rtl8168_mdio_write(tp, 0x14, 0x0244);
-        rtl8168_mdio_write(tp, 0x14, 0xdc1b);
-        rtl8168_mdio_write(tp, 0x14, 0x46aa);
-        rtl8168_mdio_write(tp, 0x14, 0x0abf);
-        rtl8168_mdio_write(tp, 0x14, 0x8772);
-        rtl8168_mdio_write(tp, 0x14, 0x0244);
-        rtl8168_mdio_write(tp, 0x14, 0xdc1b);
-        rtl8168_mdio_write(tp, 0x14, 0x46ab);
-        rtl8168_mdio_write(tp, 0x14, 0x06bf);
-        rtl8168_mdio_write(tp, 0x14, 0x876c);
-        rtl8168_mdio_write(tp, 0x14, 0x024a);
-        rtl8168_mdio_write(tp, 0x14, 0x5ffe);
-        rtl8168_mdio_write(tp, 0x14, 0xef96);
-        rtl8168_mdio_write(tp, 0x14, 0xfefd);
-        rtl8168_mdio_write(tp, 0x14, 0xfc04);
-        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
-        rtl8168_mdio_write(tp, 0x14, 0xef59);
-        rtl8168_mdio_write(tp, 0x14, 0xf9bf);
-        rtl8168_mdio_write(tp, 0x14, 0x4530);
-        rtl8168_mdio_write(tp, 0x14, 0x0244);
-        rtl8168_mdio_write(tp, 0x14, 0xdca1);
-        rtl8168_mdio_write(tp, 0x14, 0x0310);
-        rtl8168_mdio_write(tp, 0x14, 0xe087);
-        rtl8168_mdio_write(tp, 0x14, 0xf7ac);
-        rtl8168_mdio_write(tp, 0x14, 0x2605);
-        rtl8168_mdio_write(tp, 0x14, 0x0285);
-        rtl8168_mdio_write(tp, 0x14, 0xc9ae);
-        rtl8168_mdio_write(tp, 0x14, 0x0d02);
-        rtl8168_mdio_write(tp, 0x14, 0x8613);
-        rtl8168_mdio_write(tp, 0x14, 0xae08);
-        rtl8168_mdio_write(tp, 0x14, 0xe287);
-        rtl8168_mdio_write(tp, 0x14, 0xf7f6);
-        rtl8168_mdio_write(tp, 0x14, 0x36e6);
-        rtl8168_mdio_write(tp, 0x14, 0x87f7);
-        rtl8168_mdio_write(tp, 0x14, 0xfdef);
-        rtl8168_mdio_write(tp, 0x14, 0x95fd);
-        rtl8168_mdio_write(tp, 0x14, 0xfc04);
-        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
-        rtl8168_mdio_write(tp, 0x14, 0xfafb);
-        rtl8168_mdio_write(tp, 0x14, 0xef79);
-        rtl8168_mdio_write(tp, 0x14, 0xfbbf);
-        rtl8168_mdio_write(tp, 0x14, 0x876f);
-        rtl8168_mdio_write(tp, 0x14, 0x0244);
-        rtl8168_mdio_write(tp, 0x14, 0xdcef);
-        rtl8168_mdio_write(tp, 0x14, 0x64e2);
-        rtl8168_mdio_write(tp, 0x14, 0x87e9);
-        rtl8168_mdio_write(tp, 0x14, 0xe387);
-        rtl8168_mdio_write(tp, 0x14, 0xea1b);
-        rtl8168_mdio_write(tp, 0x14, 0x659e);
-        rtl8168_mdio_write(tp, 0x14, 0x10e4);
-        rtl8168_mdio_write(tp, 0x14, 0x87e9);
-        rtl8168_mdio_write(tp, 0x14, 0xe587);
-        rtl8168_mdio_write(tp, 0x14, 0xeae2);
-        rtl8168_mdio_write(tp, 0x14, 0x87f7);
-        rtl8168_mdio_write(tp, 0x14, 0xf636);
-        rtl8168_mdio_write(tp, 0x14, 0xe687);
-        rtl8168_mdio_write(tp, 0x14, 0xf7ae);
-        rtl8168_mdio_write(tp, 0x14, 0x19e2);
-        rtl8168_mdio_write(tp, 0x14, 0x87f7);
-        rtl8168_mdio_write(tp, 0x14, 0xf736);
-        rtl8168_mdio_write(tp, 0x14, 0xe687);
-        rtl8168_mdio_write(tp, 0x14, 0xf700);
-        rtl8168_mdio_write(tp, 0x14, 0x00ae);
-        rtl8168_mdio_write(tp, 0x14, 0x0200);
-        rtl8168_mdio_write(tp, 0x14, 0x0002);
-        rtl8168_mdio_write(tp, 0x14, 0x49ca);
-        rtl8168_mdio_write(tp, 0x14, 0xef57);
-        rtl8168_mdio_write(tp, 0x14, 0xe687);
-        rtl8168_mdio_write(tp, 0x14, 0xe7e7);
-        rtl8168_mdio_write(tp, 0x14, 0x87e8);
-        rtl8168_mdio_write(tp, 0x14, 0xffef);
-        rtl8168_mdio_write(tp, 0x14, 0x97ff);
-        rtl8168_mdio_write(tp, 0x14, 0xfefd);
-        rtl8168_mdio_write(tp, 0x14, 0xfc04);
-        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
-        rtl8168_mdio_write(tp, 0x14, 0xfafb);
-        rtl8168_mdio_write(tp, 0x14, 0xef79);
-        rtl8168_mdio_write(tp, 0x14, 0xfbe2);
-        rtl8168_mdio_write(tp, 0x14, 0x87e7);
-        rtl8168_mdio_write(tp, 0x14, 0xe387);
-        rtl8168_mdio_write(tp, 0x14, 0xe8ef);
-        rtl8168_mdio_write(tp, 0x14, 0x65e2);
-        rtl8168_mdio_write(tp, 0x14, 0x87fb);
-        rtl8168_mdio_write(tp, 0x14, 0xe387);
-        rtl8168_mdio_write(tp, 0x14, 0xfcef);
-        rtl8168_mdio_write(tp, 0x14, 0x7502);
-        rtl8168_mdio_write(tp, 0x14, 0x49e5);
-        rtl8168_mdio_write(tp, 0x14, 0xac50);
-        rtl8168_mdio_write(tp, 0x14, 0x1abf);
-        rtl8168_mdio_write(tp, 0x14, 0x876f);
-        rtl8168_mdio_write(tp, 0x14, 0x0244);
-        rtl8168_mdio_write(tp, 0x14, 0xdcef);
-        rtl8168_mdio_write(tp, 0x14, 0x64e2);
-        rtl8168_mdio_write(tp, 0x14, 0x87e9);
-        rtl8168_mdio_write(tp, 0x14, 0xe387);
-        rtl8168_mdio_write(tp, 0x14, 0xea1b);
-        rtl8168_mdio_write(tp, 0x14, 0x659e);
-        rtl8168_mdio_write(tp, 0x14, 0x16e4);
-        rtl8168_mdio_write(tp, 0x14, 0x87e9);
-        rtl8168_mdio_write(tp, 0x14, 0xe587);
-        rtl8168_mdio_write(tp, 0x14, 0xeaae);
-        rtl8168_mdio_write(tp, 0x14, 0x06bf);
-        rtl8168_mdio_write(tp, 0x14, 0x876c);
-        rtl8168_mdio_write(tp, 0x14, 0x024a);
-        rtl8168_mdio_write(tp, 0x14, 0x5fe2);
-        rtl8168_mdio_write(tp, 0x14, 0x87f7);
-        rtl8168_mdio_write(tp, 0x14, 0xf636);
-        rtl8168_mdio_write(tp, 0x14, 0xe687);
-        rtl8168_mdio_write(tp, 0x14, 0xf7ff);
-        rtl8168_mdio_write(tp, 0x14, 0xef97);
-        rtl8168_mdio_write(tp, 0x14, 0xfffe);
-        rtl8168_mdio_write(tp, 0x14, 0xfdfc);
-        rtl8168_mdio_write(tp, 0x14, 0x04f8);
-        rtl8168_mdio_write(tp, 0x14, 0xf9fa);
-        rtl8168_mdio_write(tp, 0x14, 0xef69);
-        rtl8168_mdio_write(tp, 0x14, 0xbf87);
-        rtl8168_mdio_write(tp, 0x14, 0x6602);
-        rtl8168_mdio_write(tp, 0x14, 0x44dc);
-        rtl8168_mdio_write(tp, 0x14, 0xad28);
-        rtl8168_mdio_write(tp, 0x14, 0x29bf);
-        rtl8168_mdio_write(tp, 0x14, 0x8763);
-        rtl8168_mdio_write(tp, 0x14, 0x0244);
-        rtl8168_mdio_write(tp, 0x14, 0xdcef);
-        rtl8168_mdio_write(tp, 0x14, 0x54bf);
-        rtl8168_mdio_write(tp, 0x14, 0x8760);
-        rtl8168_mdio_write(tp, 0x14, 0x0244);
-        rtl8168_mdio_write(tp, 0x14, 0xdcac);
-        rtl8168_mdio_write(tp, 0x14, 0x290d);
-        rtl8168_mdio_write(tp, 0x14, 0xac28);
-        rtl8168_mdio_write(tp, 0x14, 0x05a3);
-        rtl8168_mdio_write(tp, 0x14, 0x020c);
-        rtl8168_mdio_write(tp, 0x14, 0xae10);
-        rtl8168_mdio_write(tp, 0x14, 0xa303);
-        rtl8168_mdio_write(tp, 0x14, 0x07ae);
-        rtl8168_mdio_write(tp, 0x14, 0x0ba3);
-        rtl8168_mdio_write(tp, 0x14, 0x0402);
-        rtl8168_mdio_write(tp, 0x14, 0xae06);
-        rtl8168_mdio_write(tp, 0x14, 0xbf87);
-        rtl8168_mdio_write(tp, 0x14, 0x6c02);
-        rtl8168_mdio_write(tp, 0x14, 0x4a5f);
-        rtl8168_mdio_write(tp, 0x14, 0xef96);
-        rtl8168_mdio_write(tp, 0x14, 0xfefd);
-        rtl8168_mdio_write(tp, 0x14, 0xfc04);
-        rtl8168_mdio_write(tp, 0x14, 0xf8f9);
-        rtl8168_mdio_write(tp, 0x14, 0xfafb);
-        rtl8168_mdio_write(tp, 0x14, 0xef69);
-        rtl8168_mdio_write(tp, 0x14, 0xfae0);
-        rtl8168_mdio_write(tp, 0x14, 0x8015);
-        rtl8168_mdio_write(tp, 0x14, 0xad25);
-        rtl8168_mdio_write(tp, 0x14, 0x41d2);
-        rtl8168_mdio_write(tp, 0x14, 0x0002);
-        rtl8168_mdio_write(tp, 0x14, 0x86f3);
-        rtl8168_mdio_write(tp, 0x14, 0xe087);
-        rtl8168_mdio_write(tp, 0x14, 0xebe1);
-        rtl8168_mdio_write(tp, 0x14, 0x87ec);
-        rtl8168_mdio_write(tp, 0x14, 0x1b46);
-        rtl8168_mdio_write(tp, 0x14, 0xab26);
-        rtl8168_mdio_write(tp, 0x14, 0xd40b);
-        rtl8168_mdio_write(tp, 0x14, 0xff1b);
-        rtl8168_mdio_write(tp, 0x14, 0x46aa);
-        rtl8168_mdio_write(tp, 0x14, 0x1fac);
-        rtl8168_mdio_write(tp, 0x14, 0x3204);
-        rtl8168_mdio_write(tp, 0x14, 0xef32);
-        rtl8168_mdio_write(tp, 0x14, 0xae02);
-        rtl8168_mdio_write(tp, 0x14, 0xd304);
-        rtl8168_mdio_write(tp, 0x14, 0x0c31);
-        rtl8168_mdio_write(tp, 0x14, 0xbf87);
-        rtl8168_mdio_write(tp, 0x14, 0xeb1a);
-        rtl8168_mdio_write(tp, 0x14, 0x93d8);
-        rtl8168_mdio_write(tp, 0x14, 0x19d9);
-        rtl8168_mdio_write(tp, 0x14, 0x1b46);
-        rtl8168_mdio_write(tp, 0x14, 0xab0e);
-        rtl8168_mdio_write(tp, 0x14, 0x19d8);
-        rtl8168_mdio_write(tp, 0x14, 0x19d9);
-        rtl8168_mdio_write(tp, 0x14, 0x1b46);
-        rtl8168_mdio_write(tp, 0x14, 0xaa06);
-        rtl8168_mdio_write(tp, 0x14, 0x12a2);
-        rtl8168_mdio_write(tp, 0x14, 0x08c9);
-        rtl8168_mdio_write(tp, 0x14, 0xae06);
-        rtl8168_mdio_write(tp, 0x14, 0xbf87);
-        rtl8168_mdio_write(tp, 0x14, 0x6902);
-        rtl8168_mdio_write(tp, 0x14, 0x4a5f);
-        rtl8168_mdio_write(tp, 0x14, 0xfeef);
-        rtl8168_mdio_write(tp, 0x14, 0x96ff);
-        rtl8168_mdio_write(tp, 0x14, 0xfefd);
-        rtl8168_mdio_write(tp, 0x14, 0xfc04);
-        rtl8168_mdio_write(tp, 0x14, 0xf8fb);
-        rtl8168_mdio_write(tp, 0x14, 0xef79);
-        rtl8168_mdio_write(tp, 0x14, 0xa200);
-        rtl8168_mdio_write(tp, 0x14, 0x05bf);
-        rtl8168_mdio_write(tp, 0x14, 0x876f);
-        rtl8168_mdio_write(tp, 0x14, 0xae33);
-        rtl8168_mdio_write(tp, 0x14, 0xa201);
-        rtl8168_mdio_write(tp, 0x14, 0x05bf);
-        rtl8168_mdio_write(tp, 0x14, 0x8772);
-        rtl8168_mdio_write(tp, 0x14, 0xae2b);
-        rtl8168_mdio_write(tp, 0x14, 0xa202);
-        rtl8168_mdio_write(tp, 0x14, 0x05bf);
-        rtl8168_mdio_write(tp, 0x14, 0x8775);
-        rtl8168_mdio_write(tp, 0x14, 0xae23);
-        rtl8168_mdio_write(tp, 0x14, 0xa203);
-        rtl8168_mdio_write(tp, 0x14, 0x05bf);
-        rtl8168_mdio_write(tp, 0x14, 0x8778);
-        rtl8168_mdio_write(tp, 0x14, 0xae1b);
-        rtl8168_mdio_write(tp, 0x14, 0xa204);
-        rtl8168_mdio_write(tp, 0x14, 0x05bf);
-        rtl8168_mdio_write(tp, 0x14, 0x877b);
-        rtl8168_mdio_write(tp, 0x14, 0xae13);
-        rtl8168_mdio_write(tp, 0x14, 0xa205);
-        rtl8168_mdio_write(tp, 0x14, 0x05bf);
-        rtl8168_mdio_write(tp, 0x14, 0x877e);
-        rtl8168_mdio_write(tp, 0x14, 0xae0b);
-        rtl8168_mdio_write(tp, 0x14, 0xa206);
-        rtl8168_mdio_write(tp, 0x14, 0x05bf);
-        rtl8168_mdio_write(tp, 0x14, 0x8781);
-        rtl8168_mdio_write(tp, 0x14, 0xae03);
-        rtl8168_mdio_write(tp, 0x14, 0xbf87);
-        rtl8168_mdio_write(tp, 0x14, 0x8402);
-        rtl8168_mdio_write(tp, 0x14, 0x44dc);
-        rtl8168_mdio_write(tp, 0x14, 0xef64);
-        rtl8168_mdio_write(tp, 0x14, 0xef97);
-        rtl8168_mdio_write(tp, 0x14, 0xfffc);
-        rtl8168_mdio_write(tp, 0x14, 0x04af);
-        rtl8168_mdio_write(tp, 0x14, 0x00ed);
-        rtl8168_mdio_write(tp, 0x14, 0x0220);
-        rtl8168_mdio_write(tp, 0x14, 0xa5f8);
-        rtl8168_mdio_write(tp, 0x14, 0xfaef);
-        rtl8168_mdio_write(tp, 0x14, 0x69bf);
-        rtl8168_mdio_write(tp, 0x14, 0x4554);
-        rtl8168_mdio_write(tp, 0x14, 0x0244);
-        rtl8168_mdio_write(tp, 0x14, 0xdce0);
-        rtl8168_mdio_write(tp, 0x14, 0x87ff);
-        rtl8168_mdio_write(tp, 0x14, 0x1f01);
-        rtl8168_mdio_write(tp, 0x14, 0x9e06);
-        rtl8168_mdio_write(tp, 0x14, 0xe587);
-        rtl8168_mdio_write(tp, 0x14, 0xff02);
-        rtl8168_mdio_write(tp, 0x14, 0x4b05);
-        rtl8168_mdio_write(tp, 0x14, 0xef96);
-        rtl8168_mdio_write(tp, 0x14, 0xfefc);
-        rtl8168_mdio_write(tp, 0x14, 0xaf03);
-        rtl8168_mdio_write(tp, 0x14, 0x8c54);
-        rtl8168_mdio_write(tp, 0x14, 0xa434);
-        rtl8168_mdio_write(tp, 0x14, 0x74a6);
-        rtl8168_mdio_write(tp, 0x14, 0x0022);
-        rtl8168_mdio_write(tp, 0x14, 0xa434);
-        rtl8168_mdio_write(tp, 0x14, 0x11b8);
-        rtl8168_mdio_write(tp, 0x14, 0x4222);
-        rtl8168_mdio_write(tp, 0x14, 0xb842);
-        rtl8168_mdio_write(tp, 0x14, 0xf0a2);
-        rtl8168_mdio_write(tp, 0x14, 0x00f0);
-        rtl8168_mdio_write(tp, 0x14, 0xa202);
-        rtl8168_mdio_write(tp, 0x14, 0xf0a2);
-        rtl8168_mdio_write(tp, 0x14, 0x04f0);
-        rtl8168_mdio_write(tp, 0x14, 0xa206);
-        rtl8168_mdio_write(tp, 0x14, 0xf0a2);
-        rtl8168_mdio_write(tp, 0x14, 0x08f0);
-        rtl8168_mdio_write(tp, 0x14, 0xa20a);
-        rtl8168_mdio_write(tp, 0x14, 0xf0a2);
-        rtl8168_mdio_write(tp, 0x14, 0x0cf0);
-        rtl8168_mdio_write(tp, 0x14, 0xa20e);
-        rtl8168_mdio_write(tp, 0x14, 0x55b8);
-        rtl8168_mdio_write(tp, 0x14, 0x20d9);
-        rtl8168_mdio_write(tp, 0x14, 0xc608);
-        rtl8168_mdio_write(tp, 0x14, 0xaac4);
-        rtl8168_mdio_write(tp, 0x14, 0x3000);
-        rtl8168_mdio_write(tp, 0x14, 0xc614);
-        rtl8168_mdio_write(tp, 0x14, 0x33c4);
-        rtl8168_mdio_write(tp, 0x14, 0x1a88);
-        rtl8168_mdio_write(tp, 0x14, 0xc42e);
-        rtl8168_mdio_write(tp, 0x14, 0x22c4);
-        rtl8168_mdio_write(tp, 0x14, 0x2e54);
-        rtl8168_mdio_write(tp, 0x14, 0xc41a);
-        rtl8168_mdio_write(tp, 0x13, 0xb818);
-        rtl8168_mdio_write(tp, 0x14, 0x1a01);
-        rtl8168_mdio_write(tp, 0x13, 0xb81a);
-        rtl8168_mdio_write(tp, 0x14, 0x020b);
-        rtl8168_mdio_write(tp, 0x13, 0xb81c);
-        rtl8168_mdio_write(tp, 0x14, 0x03ce);
-        rtl8168_mdio_write(tp, 0x13, 0xb81e);
-        rtl8168_mdio_write(tp, 0x14, 0x00e7);
-        rtl8168_mdio_write(tp, 0x13, 0xb846);
-        rtl8168_mdio_write(tp, 0x14, 0x0389);
-        rtl8168_mdio_write(tp, 0x13, 0xb848);
-        rtl8168_mdio_write(tp, 0x14, 0xffff);
-        rtl8168_mdio_write(tp, 0x13, 0xb84a);
-        rtl8168_mdio_write(tp, 0x14, 0xffff);
-        rtl8168_mdio_write(tp, 0x13, 0xb84c);
-        rtl8168_mdio_write(tp, 0x14, 0xffff);
-        rtl8168_mdio_write(tp, 0x13, 0xb832);
-        rtl8168_mdio_write(tp, 0x14, 0x001f);
-
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x0000);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-        rtl8168_mdio_write(tp, 0x1f, 0x0B82);
-        gphy_val = rtl8168_mdio_read(tp, 0x17);
-        gphy_val &= ~(BIT_0);
-        rtl8168_mdio_write(tp, 0x17, gphy_val);
-        rtl8168_mdio_write(tp, 0x1f, 0x0A43);
-        rtl8168_mdio_write(tp, 0x13, 0x8042);
-        rtl8168_mdio_write(tp, 0x14, 0x0000);
-
-
-        rtl8168_clear_phy_mcu_patch_request(tp);
-
-        if (tp->RequiredSecLanDonglePatch) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                gphy_val = rtl8168_mdio_read(tp, 0x11);
-                gphy_val &= ~BIT_6;
-                rtl8168_mdio_write(tp, 0x11, gphy_val);
-        }
-}
-
-static void
-rtl8168_init_hw_phy_mcu(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u8 require_disable_phy_disable_mode = FALSE;
-
-        if (tp->NotWrRamCodeToMicroP == TRUE)
-                return;
-        if (rtl8168_check_hw_phy_mcu_code_ver(dev))
-                return;
-
-        if (FALSE == rtl8168_phy_ram_code_check(dev)) {
-                rtl8168_set_phy_ram_code_check_fail_flag(dev);
-                return;
-        }
-
-        if (HW_SUPPORT_CHECK_PHY_DISABLE_MODE(tp) && rtl8168_is_in_phy_disable_mode(dev))
-                require_disable_phy_disable_mode = TRUE;
-
-        if (require_disable_phy_disable_mode)
-                rtl8168_disable_phy_disable_mode(dev);
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_14:
-                rtl8168_set_phy_mcu_8168e_1(dev);
-                break;
-        case CFG_METHOD_15:
-                rtl8168_set_phy_mcu_8168e_2(dev);
-                break;
-        case CFG_METHOD_16:
-                rtl8168_set_phy_mcu_8168evl_1(dev);
-                break;
-        case CFG_METHOD_17:
-                rtl8168_set_phy_mcu_8168evl_2(dev);
-                break;
-        case CFG_METHOD_18:
-                rtl8168_set_phy_mcu_8168f_1(dev);
-                break;
-        case CFG_METHOD_19:
-                rtl8168_set_phy_mcu_8168f_2(dev);
-                break;
-        case CFG_METHOD_20:
-                rtl8168_set_phy_mcu_8411_1(dev);
-                break;
-        case CFG_METHOD_21:
-                rtl8168_set_phy_mcu_8168g_1(dev);
-                break;
-        case CFG_METHOD_25:
-                rtl8168_set_phy_mcu_8168gu_2(dev);
-                break;
-        case CFG_METHOD_26:
-                rtl8168_set_phy_mcu_8411b_1(dev);
-                break;
-        case CFG_METHOD_28:
-                rtl8168_set_phy_mcu_8168ep_2(dev);
-                break;
-        case CFG_METHOD_29:
-                rtl8168_set_phy_mcu_8168h_1(dev);
-                break;
-        case CFG_METHOD_30:
-        case CFG_METHOD_37:
-                rtl8168_set_phy_mcu_8168h_2(dev);
-                break;
-        case CFG_METHOD_35:
-                rtl8168_set_phy_mcu_8168h_3(dev);
-                break;
-        case CFG_METHOD_36:
-                break;
-        }
-
-        if (require_disable_phy_disable_mode)
-                rtl8168_enable_phy_disable_mode(dev);
-
-        rtl8168_write_hw_phy_mcu_code_ver(dev);
-
-        rtl8168_mdio_write(tp,0x1F, 0x0000);
-
-        tp->HwHasWrRamCodeToMicroP = TRUE;
-}
-#endif
-
-static void
-rtl8168_hw_phy_config(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        struct pci_dev *pdev = tp->pci_dev;
-        u16 gphy_val;
-        unsigned int i;
-
-        tp->phy_reset_enable(dev);
-
-        if (HW_DASH_SUPPORT_TYPE_3(tp) && tp->HwPkgDet == 0x06)
-                return;
-
-#ifndef ENABLE_USE_FIRMWARE_FILE
-        if (!tp->rtl_fw) {
-                rtl8168_init_hw_phy_mcu(dev);
-        }
-#endif
-
-        if (tp->mcfg == CFG_METHOD_1) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x0B, 0x94B0);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x12, 0x6096);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x0D, 0xF8A0);
-        } else if (tp->mcfg == CFG_METHOD_2) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x0B, 0x94B0);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x12, 0x6096);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        } else if (tp->mcfg == CFG_METHOD_3) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x0B, 0x94B0);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x12, 0x6096);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        } else if (tp->mcfg == CFG_METHOD_4) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x12, 0x2300);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x16, 0x000A);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x12, 0xC096);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x00, 0x88DE);
-                rtl8168_mdio_write(tp, 0x01, 0x82B1);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x08, 0x9E30);
-                rtl8168_mdio_write(tp, 0x09, 0x01F0);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x0A, 0x5500);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x03, 0x7002);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x0C, 0x00C8);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) | (1 << 5));
-                rtl8168_mdio_write(tp, 0x0D, rtl8168_mdio_read(tp, 0x0D) & ~(1 << 5));
-        } else if (tp->mcfg == CFG_METHOD_5) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x12, 0x2300);
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x16, 0x0F0A);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x00, 0x88DE);
-                rtl8168_mdio_write(tp, 0x01, 0x82B1);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x0C, 0x7EB8);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x06, 0x0761);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x03, 0x802F);
-                rtl8168_mdio_write(tp, 0x02, 0x4F02);
-                rtl8168_mdio_write(tp, 0x01, 0x0409);
-                rtl8168_mdio_write(tp, 0x00, 0xF099);
-                rtl8168_mdio_write(tp, 0x04, 0x9800);
-                rtl8168_mdio_write(tp, 0x04, 0x9000);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                rtl8168_mdio_write(tp, 0x16, rtl8168_mdio_read(tp, 0x16) | (1 << 0));
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) | (1 << 5));
-                rtl8168_mdio_write(tp, 0x0D, rtl8168_mdio_read(tp, 0x0D) & ~(1 << 5));
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x1D, 0x3D98);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x17, 0x0CC0);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        } else if (tp->mcfg == CFG_METHOD_6) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x12, 0x2300);
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x16, 0x0F0A);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x00, 0x88DE);
-                rtl8168_mdio_write(tp, 0x01, 0x82B1);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x0C, 0x7EB8);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x06, 0x5461);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x06, 0x5461);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                rtl8168_mdio_write(tp, 0x16, rtl8168_mdio_read(tp, 0x16) | (1 << 0));
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) | (1 << 5));
-                rtl8168_mdio_write(tp, 0x0D, rtl8168_mdio_read(tp, 0x0D) & ~(1 << 5));
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x1D, 0x3D98);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0001);
-                rtl8168_mdio_write(tp, 0x17, 0x0CC0);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        } else if (tp->mcfg == CFG_METHOD_7) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) | (1 << 5));
-                rtl8168_mdio_write(tp, 0x0D, rtl8168_mdio_read(tp, 0x0D) & ~(1 << 5));
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x1D, 0x3D98);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x14, 0xCAA3);
-                rtl8168_mdio_write(tp, 0x1C, 0x000A);
-                rtl8168_mdio_write(tp, 0x18, 0x65D0);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x17, 0xB580);
-                rtl8168_mdio_write(tp, 0x18, 0xFF54);
-                rtl8168_mdio_write(tp, 0x19, 0x3954);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x0D, 0x310C);
-                rtl8168_mdio_write(tp, 0x0E, 0x310C);
-                rtl8168_mdio_write(tp, 0x0F, 0x311C);
-                rtl8168_mdio_write(tp, 0x06, 0x0761);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x18, 0xFF55);
-                rtl8168_mdio_write(tp, 0x19, 0x3955);
-                rtl8168_mdio_write(tp, 0x18, 0xFF54);
-                rtl8168_mdio_write(tp, 0x19, 0x3954);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x17, 0x0CC0);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        } else if (tp->mcfg == CFG_METHOD_8) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) | (1 << 5));
-                rtl8168_mdio_write(tp, 0x0D, rtl8168_mdio_read(tp, 0x0D) & ~(1 << 5));
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x14, 0xCAA3);
-                rtl8168_mdio_write(tp, 0x1C, 0x000A);
-                rtl8168_mdio_write(tp, 0x18, 0x65D0);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x17, 0xB580);
-                rtl8168_mdio_write(tp, 0x18, 0xFF54);
-                rtl8168_mdio_write(tp, 0x19, 0x3954);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x0D, 0x310C);
-                rtl8168_mdio_write(tp, 0x0E, 0x310C);
-                rtl8168_mdio_write(tp, 0x0F, 0x311C);
-                rtl8168_mdio_write(tp, 0x06, 0x0761);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x18, 0xFF55);
-                rtl8168_mdio_write(tp, 0x19, 0x3955);
-                rtl8168_mdio_write(tp, 0x18, 0xFF54);
-                rtl8168_mdio_write(tp, 0x19, 0x3954);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x17, 0x0CC0);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                rtl8168_mdio_write(tp, 0x16, rtl8168_mdio_read(tp, 0x16) | (1 << 0));
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        } else if (tp->mcfg == CFG_METHOD_9) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x06, 0x4064);
-                rtl8168_mdio_write(tp, 0x07, 0x2863);
-                rtl8168_mdio_write(tp, 0x08, 0x059C);
-                rtl8168_mdio_write(tp, 0x09, 0x26B4);
-                rtl8168_mdio_write(tp, 0x0A, 0x6A19);
-                rtl8168_mdio_write(tp, 0x0B, 0xDCC8);
-                rtl8168_mdio_write(tp, 0x10, 0xF06D);
-                rtl8168_mdio_write(tp, 0x14, 0x7F68);
-                rtl8168_mdio_write(tp, 0x18, 0x7FD9);
-                rtl8168_mdio_write(tp, 0x1C, 0xF0FF);
-                rtl8168_mdio_write(tp, 0x1D, 0x3D9C);
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x12, 0xF49F);
-                rtl8168_mdio_write(tp, 0x13, 0x070B);
-                rtl8168_mdio_write(tp, 0x1A, 0x05AD);
-                rtl8168_mdio_write(tp, 0x14, 0x94C0);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                gphy_val = rtl8168_mdio_read(tp, 0x0B) & 0xFF00;
-                gphy_val |= 0x10;
-                rtl8168_mdio_write(tp, 0x0B, gphy_val);
-                gphy_val = rtl8168_mdio_read(tp, 0x0C) & 0x00FF;
-                gphy_val |= 0xA200;
-                rtl8168_mdio_write(tp, 0x0C, gphy_val);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x06, 0x5561);
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8332);
-                rtl8168_mdio_write(tp, 0x06, 0x5561);
-
-                if (rtl8168_efuse_read(tp, 0x01) == 0xb1) {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                        rtl8168_mdio_write(tp, 0x05, 0x669A);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                        rtl8168_mdio_write(tp, 0x05, 0x8330);
-                        rtl8168_mdio_write(tp, 0x06, 0x669A);
-
-                        rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                        gphy_val = rtl8168_mdio_read(tp, 0x0D);
-                        if ((gphy_val & 0x00FF) != 0x006C) {
-                                gphy_val &= 0xFF00;
-                                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x0065);
-                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x0066);
-                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x0067);
-                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x0068);
-                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x0069);
-                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x006A);
-                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x006B);
-                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x006C);
-                        }
-                } else {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                        rtl8168_mdio_write(tp, 0x05, 0x6662);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                        rtl8168_mdio_write(tp, 0x05, 0x8330);
-                        rtl8168_mdio_write(tp, 0x06, 0x6662);
-                }
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                gphy_val = rtl8168_mdio_read(tp, 0x0D);
-                gphy_val |= BIT_9;
-                gphy_val |= BIT_8;
-                rtl8168_mdio_write(tp, 0x0D, gphy_val);
-                gphy_val = rtl8168_mdio_read(tp, 0x0F);
-                gphy_val |= BIT_4;
-                rtl8168_mdio_write(tp, 0x0F, gphy_val);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                gphy_val = rtl8168_mdio_read(tp, 0x02);
-                gphy_val &= ~BIT_10;
-                gphy_val &= ~BIT_9;
-                gphy_val |= BIT_8;
-                rtl8168_mdio_write(tp, 0x02, gphy_val);
-                gphy_val = rtl8168_mdio_read(tp, 0x03);
-                gphy_val &= ~BIT_15;
-                gphy_val &= ~BIT_14;
-                gphy_val &= ~BIT_13;
-                rtl8168_mdio_write(tp, 0x03, gphy_val);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x17, 0x0CC0);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x001B);
-                if (rtl8168_mdio_read(tp, 0x06) == 0xBF00) {
-                        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                        rtl8168_mdio_write(tp, 0x05, 0xfff6);
-                        rtl8168_mdio_write(tp, 0x06, 0x0080);
-                        rtl8168_mdio_write(tp, 0x05, 0x8000);
-                        rtl8168_mdio_write(tp, 0x06, 0xf8f9);
-                        rtl8168_mdio_write(tp, 0x06, 0xfaef);
-                        rtl8168_mdio_write(tp, 0x06, 0x59ee);
-                        rtl8168_mdio_write(tp, 0x06, 0xf8ea);
-                        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-                        rtl8168_mdio_write(tp, 0x06, 0xf8eb);
-                        rtl8168_mdio_write(tp, 0x06, 0x00e0);
-                        rtl8168_mdio_write(tp, 0x06, 0xf87c);
-                        rtl8168_mdio_write(tp, 0x06, 0xe1f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x7d59);
-                        rtl8168_mdio_write(tp, 0x06, 0x0fef);
-                        rtl8168_mdio_write(tp, 0x06, 0x0139);
-                        rtl8168_mdio_write(tp, 0x06, 0x029e);
-                        rtl8168_mdio_write(tp, 0x06, 0x06ef);
-                        rtl8168_mdio_write(tp, 0x06, 0x1039);
-                        rtl8168_mdio_write(tp, 0x06, 0x089f);
-                        rtl8168_mdio_write(tp, 0x06, 0x2aee);
-                        rtl8168_mdio_write(tp, 0x06, 0xf8ea);
-                        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-                        rtl8168_mdio_write(tp, 0x06, 0xf8eb);
-                        rtl8168_mdio_write(tp, 0x06, 0x01e0);
-                        rtl8168_mdio_write(tp, 0x06, 0xf87c);
-                        rtl8168_mdio_write(tp, 0x06, 0xe1f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x7d58);
-                        rtl8168_mdio_write(tp, 0x06, 0x409e);
-                        rtl8168_mdio_write(tp, 0x06, 0x0f39);
-                        rtl8168_mdio_write(tp, 0x06, 0x46aa);
-                        rtl8168_mdio_write(tp, 0x06, 0x0bbf);
-                        rtl8168_mdio_write(tp, 0x06, 0x8290);
-                        rtl8168_mdio_write(tp, 0x06, 0xd682);
-                        rtl8168_mdio_write(tp, 0x06, 0x9802);
-                        rtl8168_mdio_write(tp, 0x06, 0x014f);
-                        rtl8168_mdio_write(tp, 0x06, 0xae09);
-                        rtl8168_mdio_write(tp, 0x06, 0xbf82);
-                        rtl8168_mdio_write(tp, 0x06, 0x98d6);
-                        rtl8168_mdio_write(tp, 0x06, 0x82a0);
-                        rtl8168_mdio_write(tp, 0x06, 0x0201);
-                        rtl8168_mdio_write(tp, 0x06, 0x4fef);
-                        rtl8168_mdio_write(tp, 0x06, 0x95fe);
-                        rtl8168_mdio_write(tp, 0x06, 0xfdfc);
-                        rtl8168_mdio_write(tp, 0x06, 0x05f8);
-                        rtl8168_mdio_write(tp, 0x06, 0xf9fa);
-                        rtl8168_mdio_write(tp, 0x06, 0xeef8);
-                        rtl8168_mdio_write(tp, 0x06, 0xea00);
-                        rtl8168_mdio_write(tp, 0x06, 0xeef8);
-                        rtl8168_mdio_write(tp, 0x06, 0xeb00);
-                        rtl8168_mdio_write(tp, 0x06, 0xe2f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x7ce3);
-                        rtl8168_mdio_write(tp, 0x06, 0xf87d);
-                        rtl8168_mdio_write(tp, 0x06, 0xa511);
-                        rtl8168_mdio_write(tp, 0x06, 0x1112);
-                        rtl8168_mdio_write(tp, 0x06, 0xd240);
-                        rtl8168_mdio_write(tp, 0x06, 0xd644);
-                        rtl8168_mdio_write(tp, 0x06, 0x4402);
-                        rtl8168_mdio_write(tp, 0x06, 0x8217);
-                        rtl8168_mdio_write(tp, 0x06, 0xd2a0);
-                        rtl8168_mdio_write(tp, 0x06, 0xd6aa);
-                        rtl8168_mdio_write(tp, 0x06, 0xaa02);
-                        rtl8168_mdio_write(tp, 0x06, 0x8217);
-                        rtl8168_mdio_write(tp, 0x06, 0xae0f);
-                        rtl8168_mdio_write(tp, 0x06, 0xa544);
-                        rtl8168_mdio_write(tp, 0x06, 0x4402);
-                        rtl8168_mdio_write(tp, 0x06, 0xae4d);
-                        rtl8168_mdio_write(tp, 0x06, 0xa5aa);
-                        rtl8168_mdio_write(tp, 0x06, 0xaa02);
-                        rtl8168_mdio_write(tp, 0x06, 0xae47);
-                        rtl8168_mdio_write(tp, 0x06, 0xaf82);
-                        rtl8168_mdio_write(tp, 0x06, 0x13ee);
-                        rtl8168_mdio_write(tp, 0x06, 0x834e);
-                        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-                        rtl8168_mdio_write(tp, 0x06, 0x834d);
-                        rtl8168_mdio_write(tp, 0x06, 0x0fee);
-                        rtl8168_mdio_write(tp, 0x06, 0x834c);
-                        rtl8168_mdio_write(tp, 0x06, 0x0fee);
-                        rtl8168_mdio_write(tp, 0x06, 0x834f);
-                        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-                        rtl8168_mdio_write(tp, 0x06, 0x8351);
-                        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-                        rtl8168_mdio_write(tp, 0x06, 0x834a);
-                        rtl8168_mdio_write(tp, 0x06, 0xffee);
-                        rtl8168_mdio_write(tp, 0x06, 0x834b);
-                        rtl8168_mdio_write(tp, 0x06, 0xffe0);
-                        rtl8168_mdio_write(tp, 0x06, 0x8330);
-                        rtl8168_mdio_write(tp, 0x06, 0xe183);
-                        rtl8168_mdio_write(tp, 0x06, 0x3158);
-                        rtl8168_mdio_write(tp, 0x06, 0xfee4);
-                        rtl8168_mdio_write(tp, 0x06, 0xf88a);
-                        rtl8168_mdio_write(tp, 0x06, 0xe5f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x8be0);
-                        rtl8168_mdio_write(tp, 0x06, 0x8332);
-                        rtl8168_mdio_write(tp, 0x06, 0xe183);
-                        rtl8168_mdio_write(tp, 0x06, 0x3359);
-                        rtl8168_mdio_write(tp, 0x06, 0x0fe2);
-                        rtl8168_mdio_write(tp, 0x06, 0x834d);
-                        rtl8168_mdio_write(tp, 0x06, 0x0c24);
-                        rtl8168_mdio_write(tp, 0x06, 0x5af0);
-                        rtl8168_mdio_write(tp, 0x06, 0x1e12);
-                        rtl8168_mdio_write(tp, 0x06, 0xe4f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x8ce5);
-                        rtl8168_mdio_write(tp, 0x06, 0xf88d);
-                        rtl8168_mdio_write(tp, 0x06, 0xaf82);
-                        rtl8168_mdio_write(tp, 0x06, 0x13e0);
-                        rtl8168_mdio_write(tp, 0x06, 0x834f);
-                        rtl8168_mdio_write(tp, 0x06, 0x10e4);
-                        rtl8168_mdio_write(tp, 0x06, 0x834f);
-                        rtl8168_mdio_write(tp, 0x06, 0xe083);
-                        rtl8168_mdio_write(tp, 0x06, 0x4e78);
-                        rtl8168_mdio_write(tp, 0x06, 0x009f);
-                        rtl8168_mdio_write(tp, 0x06, 0x0ae0);
-                        rtl8168_mdio_write(tp, 0x06, 0x834f);
-                        rtl8168_mdio_write(tp, 0x06, 0xa010);
-                        rtl8168_mdio_write(tp, 0x06, 0xa5ee);
-                        rtl8168_mdio_write(tp, 0x06, 0x834e);
-                        rtl8168_mdio_write(tp, 0x06, 0x01e0);
-                        rtl8168_mdio_write(tp, 0x06, 0x834e);
-                        rtl8168_mdio_write(tp, 0x06, 0x7805);
-                        rtl8168_mdio_write(tp, 0x06, 0x9e9a);
-                        rtl8168_mdio_write(tp, 0x06, 0xe083);
-                        rtl8168_mdio_write(tp, 0x06, 0x4e78);
-                        rtl8168_mdio_write(tp, 0x06, 0x049e);
-                        rtl8168_mdio_write(tp, 0x06, 0x10e0);
-                        rtl8168_mdio_write(tp, 0x06, 0x834e);
-                        rtl8168_mdio_write(tp, 0x06, 0x7803);
-                        rtl8168_mdio_write(tp, 0x06, 0x9e0f);
-                        rtl8168_mdio_write(tp, 0x06, 0xe083);
-                        rtl8168_mdio_write(tp, 0x06, 0x4e78);
-                        rtl8168_mdio_write(tp, 0x06, 0x019e);
-                        rtl8168_mdio_write(tp, 0x06, 0x05ae);
-                        rtl8168_mdio_write(tp, 0x06, 0x0caf);
-                        rtl8168_mdio_write(tp, 0x06, 0x81f8);
-                        rtl8168_mdio_write(tp, 0x06, 0xaf81);
-                        rtl8168_mdio_write(tp, 0x06, 0xa3af);
-                        rtl8168_mdio_write(tp, 0x06, 0x81dc);
-                        rtl8168_mdio_write(tp, 0x06, 0xaf82);
-                        rtl8168_mdio_write(tp, 0x06, 0x13ee);
-                        rtl8168_mdio_write(tp, 0x06, 0x8348);
-                        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-                        rtl8168_mdio_write(tp, 0x06, 0x8349);
-                        rtl8168_mdio_write(tp, 0x06, 0x00e0);
-                        rtl8168_mdio_write(tp, 0x06, 0x8351);
-                        rtl8168_mdio_write(tp, 0x06, 0x10e4);
-                        rtl8168_mdio_write(tp, 0x06, 0x8351);
-                        rtl8168_mdio_write(tp, 0x06, 0x5801);
-                        rtl8168_mdio_write(tp, 0x06, 0x9fea);
-                        rtl8168_mdio_write(tp, 0x06, 0xd000);
-                        rtl8168_mdio_write(tp, 0x06, 0xd180);
-                        rtl8168_mdio_write(tp, 0x06, 0x1f66);
-                        rtl8168_mdio_write(tp, 0x06, 0xe2f8);
-                        rtl8168_mdio_write(tp, 0x06, 0xeae3);
-                        rtl8168_mdio_write(tp, 0x06, 0xf8eb);
-                        rtl8168_mdio_write(tp, 0x06, 0x5af8);
-                        rtl8168_mdio_write(tp, 0x06, 0x1e20);
-                        rtl8168_mdio_write(tp, 0x06, 0xe6f8);
-                        rtl8168_mdio_write(tp, 0x06, 0xeae5);
-                        rtl8168_mdio_write(tp, 0x06, 0xf8eb);
-                        rtl8168_mdio_write(tp, 0x06, 0xd302);
-                        rtl8168_mdio_write(tp, 0x06, 0xb3fe);
-                        rtl8168_mdio_write(tp, 0x06, 0xe2f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x7cef);
-                        rtl8168_mdio_write(tp, 0x06, 0x325b);
-                        rtl8168_mdio_write(tp, 0x06, 0x80e3);
-                        rtl8168_mdio_write(tp, 0x06, 0xf87d);
-                        rtl8168_mdio_write(tp, 0x06, 0x9e03);
-                        rtl8168_mdio_write(tp, 0x06, 0x7dff);
-                        rtl8168_mdio_write(tp, 0x06, 0xff0d);
-                        rtl8168_mdio_write(tp, 0x06, 0x581c);
-                        rtl8168_mdio_write(tp, 0x06, 0x551a);
-                        rtl8168_mdio_write(tp, 0x06, 0x6511);
-                        rtl8168_mdio_write(tp, 0x06, 0xa190);
-                        rtl8168_mdio_write(tp, 0x06, 0xd3e2);
-                        rtl8168_mdio_write(tp, 0x06, 0x8348);
-                        rtl8168_mdio_write(tp, 0x06, 0xe383);
-                        rtl8168_mdio_write(tp, 0x06, 0x491b);
-                        rtl8168_mdio_write(tp, 0x06, 0x56ab);
-                        rtl8168_mdio_write(tp, 0x06, 0x08ef);
-                        rtl8168_mdio_write(tp, 0x06, 0x56e6);
-                        rtl8168_mdio_write(tp, 0x06, 0x8348);
-                        rtl8168_mdio_write(tp, 0x06, 0xe783);
-                        rtl8168_mdio_write(tp, 0x06, 0x4910);
-                        rtl8168_mdio_write(tp, 0x06, 0xd180);
-                        rtl8168_mdio_write(tp, 0x06, 0x1f66);
-                        rtl8168_mdio_write(tp, 0x06, 0xa004);
-                        rtl8168_mdio_write(tp, 0x06, 0xb9e2);
-                        rtl8168_mdio_write(tp, 0x06, 0x8348);
-                        rtl8168_mdio_write(tp, 0x06, 0xe383);
-                        rtl8168_mdio_write(tp, 0x06, 0x49ef);
-                        rtl8168_mdio_write(tp, 0x06, 0x65e2);
-                        rtl8168_mdio_write(tp, 0x06, 0x834a);
-                        rtl8168_mdio_write(tp, 0x06, 0xe383);
-                        rtl8168_mdio_write(tp, 0x06, 0x4b1b);
-                        rtl8168_mdio_write(tp, 0x06, 0x56aa);
-                        rtl8168_mdio_write(tp, 0x06, 0x0eef);
-                        rtl8168_mdio_write(tp, 0x06, 0x56e6);
-                        rtl8168_mdio_write(tp, 0x06, 0x834a);
-                        rtl8168_mdio_write(tp, 0x06, 0xe783);
-                        rtl8168_mdio_write(tp, 0x06, 0x4be2);
-                        rtl8168_mdio_write(tp, 0x06, 0x834d);
-                        rtl8168_mdio_write(tp, 0x06, 0xe683);
-                        rtl8168_mdio_write(tp, 0x06, 0x4ce0);
-                        rtl8168_mdio_write(tp, 0x06, 0x834d);
-                        rtl8168_mdio_write(tp, 0x06, 0xa000);
-                        rtl8168_mdio_write(tp, 0x06, 0x0caf);
-                        rtl8168_mdio_write(tp, 0x06, 0x81dc);
-                        rtl8168_mdio_write(tp, 0x06, 0xe083);
-                        rtl8168_mdio_write(tp, 0x06, 0x4d10);
-                        rtl8168_mdio_write(tp, 0x06, 0xe483);
-                        rtl8168_mdio_write(tp, 0x06, 0x4dae);
-                        rtl8168_mdio_write(tp, 0x06, 0x0480);
-                        rtl8168_mdio_write(tp, 0x06, 0xe483);
-                        rtl8168_mdio_write(tp, 0x06, 0x4de0);
-                        rtl8168_mdio_write(tp, 0x06, 0x834e);
-                        rtl8168_mdio_write(tp, 0x06, 0x7803);
-                        rtl8168_mdio_write(tp, 0x06, 0x9e0b);
-                        rtl8168_mdio_write(tp, 0x06, 0xe083);
-                        rtl8168_mdio_write(tp, 0x06, 0x4e78);
-                        rtl8168_mdio_write(tp, 0x06, 0x049e);
-                        rtl8168_mdio_write(tp, 0x06, 0x04ee);
-                        rtl8168_mdio_write(tp, 0x06, 0x834e);
-                        rtl8168_mdio_write(tp, 0x06, 0x02e0);
-                        rtl8168_mdio_write(tp, 0x06, 0x8332);
-                        rtl8168_mdio_write(tp, 0x06, 0xe183);
-                        rtl8168_mdio_write(tp, 0x06, 0x3359);
-                        rtl8168_mdio_write(tp, 0x06, 0x0fe2);
-                        rtl8168_mdio_write(tp, 0x06, 0x834d);
-                        rtl8168_mdio_write(tp, 0x06, 0x0c24);
-                        rtl8168_mdio_write(tp, 0x06, 0x5af0);
-                        rtl8168_mdio_write(tp, 0x06, 0x1e12);
-                        rtl8168_mdio_write(tp, 0x06, 0xe4f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x8ce5);
-                        rtl8168_mdio_write(tp, 0x06, 0xf88d);
-                        rtl8168_mdio_write(tp, 0x06, 0xe083);
-                        rtl8168_mdio_write(tp, 0x06, 0x30e1);
-                        rtl8168_mdio_write(tp, 0x06, 0x8331);
-                        rtl8168_mdio_write(tp, 0x06, 0x6801);
-                        rtl8168_mdio_write(tp, 0x06, 0xe4f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x8ae5);
-                        rtl8168_mdio_write(tp, 0x06, 0xf88b);
-                        rtl8168_mdio_write(tp, 0x06, 0xae37);
-                        rtl8168_mdio_write(tp, 0x06, 0xee83);
-                        rtl8168_mdio_write(tp, 0x06, 0x4e03);
-                        rtl8168_mdio_write(tp, 0x06, 0xe083);
-                        rtl8168_mdio_write(tp, 0x06, 0x4ce1);
-                        rtl8168_mdio_write(tp, 0x06, 0x834d);
-                        rtl8168_mdio_write(tp, 0x06, 0x1b01);
-                        rtl8168_mdio_write(tp, 0x06, 0x9e04);
-                        rtl8168_mdio_write(tp, 0x06, 0xaaa1);
-                        rtl8168_mdio_write(tp, 0x06, 0xaea8);
-                        rtl8168_mdio_write(tp, 0x06, 0xee83);
-                        rtl8168_mdio_write(tp, 0x06, 0x4e04);
-                        rtl8168_mdio_write(tp, 0x06, 0xee83);
-                        rtl8168_mdio_write(tp, 0x06, 0x4f00);
-                        rtl8168_mdio_write(tp, 0x06, 0xaeab);
-                        rtl8168_mdio_write(tp, 0x06, 0xe083);
-                        rtl8168_mdio_write(tp, 0x06, 0x4f78);
-                        rtl8168_mdio_write(tp, 0x06, 0x039f);
-                        rtl8168_mdio_write(tp, 0x06, 0x14ee);
-                        rtl8168_mdio_write(tp, 0x06, 0x834e);
-                        rtl8168_mdio_write(tp, 0x06, 0x05d2);
-                        rtl8168_mdio_write(tp, 0x06, 0x40d6);
-                        rtl8168_mdio_write(tp, 0x06, 0x5554);
-                        rtl8168_mdio_write(tp, 0x06, 0x0282);
-                        rtl8168_mdio_write(tp, 0x06, 0x17d2);
-                        rtl8168_mdio_write(tp, 0x06, 0xa0d6);
-                        rtl8168_mdio_write(tp, 0x06, 0xba00);
-                        rtl8168_mdio_write(tp, 0x06, 0x0282);
-                        rtl8168_mdio_write(tp, 0x06, 0x17fe);
-                        rtl8168_mdio_write(tp, 0x06, 0xfdfc);
-                        rtl8168_mdio_write(tp, 0x06, 0x05f8);
-                        rtl8168_mdio_write(tp, 0x06, 0xe0f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x60e1);
-                        rtl8168_mdio_write(tp, 0x06, 0xf861);
-                        rtl8168_mdio_write(tp, 0x06, 0x6802);
-                        rtl8168_mdio_write(tp, 0x06, 0xe4f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x60e5);
-                        rtl8168_mdio_write(tp, 0x06, 0xf861);
-                        rtl8168_mdio_write(tp, 0x06, 0xe0f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x48e1);
-                        rtl8168_mdio_write(tp, 0x06, 0xf849);
-                        rtl8168_mdio_write(tp, 0x06, 0x580f);
-                        rtl8168_mdio_write(tp, 0x06, 0x1e02);
-                        rtl8168_mdio_write(tp, 0x06, 0xe4f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x48e5);
-                        rtl8168_mdio_write(tp, 0x06, 0xf849);
-                        rtl8168_mdio_write(tp, 0x06, 0xd000);
-                        rtl8168_mdio_write(tp, 0x06, 0x0282);
-                        rtl8168_mdio_write(tp, 0x06, 0x5bbf);
-                        rtl8168_mdio_write(tp, 0x06, 0x8350);
-                        rtl8168_mdio_write(tp, 0x06, 0xef46);
-                        rtl8168_mdio_write(tp, 0x06, 0xdc19);
-                        rtl8168_mdio_write(tp, 0x06, 0xddd0);
-                        rtl8168_mdio_write(tp, 0x06, 0x0102);
-                        rtl8168_mdio_write(tp, 0x06, 0x825b);
-                        rtl8168_mdio_write(tp, 0x06, 0x0282);
-                        rtl8168_mdio_write(tp, 0x06, 0x77e0);
-                        rtl8168_mdio_write(tp, 0x06, 0xf860);
-                        rtl8168_mdio_write(tp, 0x06, 0xe1f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x6158);
-                        rtl8168_mdio_write(tp, 0x06, 0xfde4);
-                        rtl8168_mdio_write(tp, 0x06, 0xf860);
-                        rtl8168_mdio_write(tp, 0x06, 0xe5f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x61fc);
-                        rtl8168_mdio_write(tp, 0x06, 0x04f9);
-                        rtl8168_mdio_write(tp, 0x06, 0xfafb);
-                        rtl8168_mdio_write(tp, 0x06, 0xc6bf);
-                        rtl8168_mdio_write(tp, 0x06, 0xf840);
-                        rtl8168_mdio_write(tp, 0x06, 0xbe83);
-                        rtl8168_mdio_write(tp, 0x06, 0x50a0);
-                        rtl8168_mdio_write(tp, 0x06, 0x0101);
-                        rtl8168_mdio_write(tp, 0x06, 0x071b);
-                        rtl8168_mdio_write(tp, 0x06, 0x89cf);
-                        rtl8168_mdio_write(tp, 0x06, 0xd208);
-                        rtl8168_mdio_write(tp, 0x06, 0xebdb);
-                        rtl8168_mdio_write(tp, 0x06, 0x19b2);
-                        rtl8168_mdio_write(tp, 0x06, 0xfbff);
-                        rtl8168_mdio_write(tp, 0x06, 0xfefd);
-                        rtl8168_mdio_write(tp, 0x06, 0x04f8);
-                        rtl8168_mdio_write(tp, 0x06, 0xe0f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x48e1);
-                        rtl8168_mdio_write(tp, 0x06, 0xf849);
-                        rtl8168_mdio_write(tp, 0x06, 0x6808);
-                        rtl8168_mdio_write(tp, 0x06, 0xe4f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x48e5);
-                        rtl8168_mdio_write(tp, 0x06, 0xf849);
-                        rtl8168_mdio_write(tp, 0x06, 0x58f7);
-                        rtl8168_mdio_write(tp, 0x06, 0xe4f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x48e5);
-                        rtl8168_mdio_write(tp, 0x06, 0xf849);
-                        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                        rtl8168_mdio_write(tp, 0x06, 0x4d20);
-                        rtl8168_mdio_write(tp, 0x06, 0x0002);
-                        rtl8168_mdio_write(tp, 0x06, 0x4e22);
-                        rtl8168_mdio_write(tp, 0x06, 0x0002);
-                        rtl8168_mdio_write(tp, 0x06, 0x4ddf);
-                        rtl8168_mdio_write(tp, 0x06, 0xff01);
-                        rtl8168_mdio_write(tp, 0x06, 0x4edd);
-                        rtl8168_mdio_write(tp, 0x06, 0xff01);
-                        rtl8168_mdio_write(tp, 0x06, 0xf8fa);
-                        rtl8168_mdio_write(tp, 0x06, 0xfbef);
-                        rtl8168_mdio_write(tp, 0x06, 0x79bf);
-                        rtl8168_mdio_write(tp, 0x06, 0xf822);
-                        rtl8168_mdio_write(tp, 0x06, 0xd819);
-                        rtl8168_mdio_write(tp, 0x06, 0xd958);
-                        rtl8168_mdio_write(tp, 0x06, 0x849f);
-                        rtl8168_mdio_write(tp, 0x06, 0x09bf);
-                        rtl8168_mdio_write(tp, 0x06, 0x82be);
-                        rtl8168_mdio_write(tp, 0x06, 0xd682);
-                        rtl8168_mdio_write(tp, 0x06, 0xc602);
-                        rtl8168_mdio_write(tp, 0x06, 0x014f);
-                        rtl8168_mdio_write(tp, 0x06, 0xef97);
-                        rtl8168_mdio_write(tp, 0x06, 0xfffe);
-                        rtl8168_mdio_write(tp, 0x06, 0xfc05);
-                        rtl8168_mdio_write(tp, 0x06, 0x17ff);
-                        rtl8168_mdio_write(tp, 0x06, 0xfe01);
-                        rtl8168_mdio_write(tp, 0x06, 0x1700);
-                        rtl8168_mdio_write(tp, 0x06, 0x0102);
-                        rtl8168_mdio_write(tp, 0x05, 0x83d8);
-                        rtl8168_mdio_write(tp, 0x06, 0x8051);
-                        rtl8168_mdio_write(tp, 0x05, 0x83d6);
-                        rtl8168_mdio_write(tp, 0x06, 0x82a0);
-                        rtl8168_mdio_write(tp, 0x05, 0x83d4);
-                        rtl8168_mdio_write(tp, 0x06, 0x8000);
-                        rtl8168_mdio_write(tp, 0x02, 0x2010);
-                        rtl8168_mdio_write(tp, 0x03, 0xdc00);
-                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                        rtl8168_mdio_write(tp, 0x0b, 0x0600);
-                        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                        rtl8168_mdio_write(tp, 0x05, 0xfff6);
-                        rtl8168_mdio_write(tp, 0x06, 0x00fc);
-                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                }
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                rtl8168_mdio_write(tp, 0x0D, 0xF880);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        } else if (tp->mcfg == CFG_METHOD_10) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x06, 0x4064);
-                rtl8168_mdio_write(tp, 0x07, 0x2863);
-                rtl8168_mdio_write(tp, 0x08, 0x059C);
-                rtl8168_mdio_write(tp, 0x09, 0x26B4);
-                rtl8168_mdio_write(tp, 0x0A, 0x6A19);
-                rtl8168_mdio_write(tp, 0x0B, 0xDCC8);
-                rtl8168_mdio_write(tp, 0x10, 0xF06D);
-                rtl8168_mdio_write(tp, 0x14, 0x7F68);
-                rtl8168_mdio_write(tp, 0x18, 0x7FD9);
-                rtl8168_mdio_write(tp, 0x1C, 0xF0FF);
-                rtl8168_mdio_write(tp, 0x1D, 0x3D9C);
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x12, 0xF49F);
-                rtl8168_mdio_write(tp, 0x13, 0x070B);
-                rtl8168_mdio_write(tp, 0x1A, 0x05AD);
-                rtl8168_mdio_write(tp, 0x14, 0x94C0);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x06, 0x5561);
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8332);
-                rtl8168_mdio_write(tp, 0x06, 0x5561);
-
-                if (rtl8168_efuse_read(tp, 0x01) == 0xb1) {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                        rtl8168_mdio_write(tp, 0x05, 0x669A);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                        rtl8168_mdio_write(tp, 0x05, 0x8330);
-                        rtl8168_mdio_write(tp, 0x06, 0x669A);
-
-                        rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                        gphy_val = rtl8168_mdio_read(tp, 0x0D);
-                        if ((gphy_val & 0x00FF) != 0x006C) {
-                                gphy_val &= 0xFF00;
-                                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x0065);
-                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x0066);
-                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x0067);
-                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x0068);
-                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x0069);
-                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x006A);
-                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x006B);
-                                rtl8168_mdio_write(tp, 0x0D, gphy_val | 0x006C);
-                        }
-                } else {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                        rtl8168_mdio_write(tp, 0x05, 0x2642);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                        rtl8168_mdio_write(tp, 0x05, 0x8330);
-                        rtl8168_mdio_write(tp, 0x06, 0x2642);
-                }
-
-                if (rtl8168_efuse_read(tp, 0x30) == 0x98) {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                        rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) & ~BIT_1);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                        rtl8168_mdio_write(tp, 0x01, rtl8168_mdio_read(tp, 0x01) | BIT_9);
-                } else if (rtl8168_efuse_read(tp, 0x30) == 0x90) {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                        rtl8168_mdio_write(tp, 0x01, rtl8168_mdio_read(tp, 0x01) & ~BIT_9);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                        rtl8168_mdio_write(tp, 0x16, 0x5101);
-                }
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                gphy_val = rtl8168_mdio_read(tp, 0x02);
-                gphy_val &= ~BIT_10;
-                gphy_val &= ~BIT_9;
-                gphy_val |= BIT_8;
-                rtl8168_mdio_write(tp, 0x02, gphy_val);
-                gphy_val = rtl8168_mdio_read(tp, 0x03);
-                gphy_val &= ~BIT_15;
-                gphy_val &= ~BIT_14;
-                gphy_val &= ~BIT_13;
-                rtl8168_mdio_write(tp, 0x03, gphy_val);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x17, 0x0CC0);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                gphy_val = rtl8168_mdio_read(tp, 0x0F);
-                gphy_val |= BIT_4;
-                gphy_val |= BIT_2;
-                gphy_val |= BIT_1;
-                gphy_val |= BIT_0;
-                rtl8168_mdio_write(tp, 0x0F, gphy_val);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x001B);
-                if (rtl8168_mdio_read(tp, 0x06) == 0xB300) {
-                        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                        rtl8168_mdio_write(tp, 0x05, 0xfff6);
-                        rtl8168_mdio_write(tp, 0x06, 0x0080);
-                        rtl8168_mdio_write(tp, 0x05, 0x8000);
-                        rtl8168_mdio_write(tp, 0x06, 0xf8f9);
-                        rtl8168_mdio_write(tp, 0x06, 0xfaee);
-                        rtl8168_mdio_write(tp, 0x06, 0xf8ea);
-                        rtl8168_mdio_write(tp, 0x06, 0x00ee);
-                        rtl8168_mdio_write(tp, 0x06, 0xf8eb);
-                        rtl8168_mdio_write(tp, 0x06, 0x00e2);
-                        rtl8168_mdio_write(tp, 0x06, 0xf87c);
-                        rtl8168_mdio_write(tp, 0x06, 0xe3f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x7da5);
-                        rtl8168_mdio_write(tp, 0x06, 0x1111);
-                        rtl8168_mdio_write(tp, 0x06, 0x12d2);
-                        rtl8168_mdio_write(tp, 0x06, 0x40d6);
-                        rtl8168_mdio_write(tp, 0x06, 0x4444);
-                        rtl8168_mdio_write(tp, 0x06, 0x0281);
-                        rtl8168_mdio_write(tp, 0x06, 0xc6d2);
-                        rtl8168_mdio_write(tp, 0x06, 0xa0d6);
-                        rtl8168_mdio_write(tp, 0x06, 0xaaaa);
-                        rtl8168_mdio_write(tp, 0x06, 0x0281);
-                        rtl8168_mdio_write(tp, 0x06, 0xc6ae);
-                        rtl8168_mdio_write(tp, 0x06, 0x0fa5);
-                        rtl8168_mdio_write(tp, 0x06, 0x4444);
-                        rtl8168_mdio_write(tp, 0x06, 0x02ae);
-                        rtl8168_mdio_write(tp, 0x06, 0x4da5);
-                        rtl8168_mdio_write(tp, 0x06, 0xaaaa);
-                        rtl8168_mdio_write(tp, 0x06, 0x02ae);
-                        rtl8168_mdio_write(tp, 0x06, 0x47af);
-                        rtl8168_mdio_write(tp, 0x06, 0x81c2);
-                        rtl8168_mdio_write(tp, 0x06, 0xee83);
-                        rtl8168_mdio_write(tp, 0x06, 0x4e00);
-                        rtl8168_mdio_write(tp, 0x06, 0xee83);
-                        rtl8168_mdio_write(tp, 0x06, 0x4d0f);
-                        rtl8168_mdio_write(tp, 0x06, 0xee83);
-                        rtl8168_mdio_write(tp, 0x06, 0x4c0f);
-                        rtl8168_mdio_write(tp, 0x06, 0xee83);
-                        rtl8168_mdio_write(tp, 0x06, 0x4f00);
-                        rtl8168_mdio_write(tp, 0x06, 0xee83);
-                        rtl8168_mdio_write(tp, 0x06, 0x5100);
-                        rtl8168_mdio_write(tp, 0x06, 0xee83);
-                        rtl8168_mdio_write(tp, 0x06, 0x4aff);
-                        rtl8168_mdio_write(tp, 0x06, 0xee83);
-                        rtl8168_mdio_write(tp, 0x06, 0x4bff);
-                        rtl8168_mdio_write(tp, 0x06, 0xe083);
-                        rtl8168_mdio_write(tp, 0x06, 0x30e1);
-                        rtl8168_mdio_write(tp, 0x06, 0x8331);
-                        rtl8168_mdio_write(tp, 0x06, 0x58fe);
-                        rtl8168_mdio_write(tp, 0x06, 0xe4f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x8ae5);
-                        rtl8168_mdio_write(tp, 0x06, 0xf88b);
-                        rtl8168_mdio_write(tp, 0x06, 0xe083);
-                        rtl8168_mdio_write(tp, 0x06, 0x32e1);
-                        rtl8168_mdio_write(tp, 0x06, 0x8333);
-                        rtl8168_mdio_write(tp, 0x06, 0x590f);
-                        rtl8168_mdio_write(tp, 0x06, 0xe283);
-                        rtl8168_mdio_write(tp, 0x06, 0x4d0c);
-                        rtl8168_mdio_write(tp, 0x06, 0x245a);
-                        rtl8168_mdio_write(tp, 0x06, 0xf01e);
-                        rtl8168_mdio_write(tp, 0x06, 0x12e4);
-                        rtl8168_mdio_write(tp, 0x06, 0xf88c);
-                        rtl8168_mdio_write(tp, 0x06, 0xe5f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x8daf);
-                        rtl8168_mdio_write(tp, 0x06, 0x81c2);
-                        rtl8168_mdio_write(tp, 0x06, 0xe083);
-                        rtl8168_mdio_write(tp, 0x06, 0x4f10);
-                        rtl8168_mdio_write(tp, 0x06, 0xe483);
-                        rtl8168_mdio_write(tp, 0x06, 0x4fe0);
-                        rtl8168_mdio_write(tp, 0x06, 0x834e);
-                        rtl8168_mdio_write(tp, 0x06, 0x7800);
-                        rtl8168_mdio_write(tp, 0x06, 0x9f0a);
-                        rtl8168_mdio_write(tp, 0x06, 0xe083);
-                        rtl8168_mdio_write(tp, 0x06, 0x4fa0);
-                        rtl8168_mdio_write(tp, 0x06, 0x10a5);
-                        rtl8168_mdio_write(tp, 0x06, 0xee83);
-                        rtl8168_mdio_write(tp, 0x06, 0x4e01);
-                        rtl8168_mdio_write(tp, 0x06, 0xe083);
-                        rtl8168_mdio_write(tp, 0x06, 0x4e78);
-                        rtl8168_mdio_write(tp, 0x06, 0x059e);
-                        rtl8168_mdio_write(tp, 0x06, 0x9ae0);
-                        rtl8168_mdio_write(tp, 0x06, 0x834e);
-                        rtl8168_mdio_write(tp, 0x06, 0x7804);
-                        rtl8168_mdio_write(tp, 0x06, 0x9e10);
-                        rtl8168_mdio_write(tp, 0x06, 0xe083);
-                        rtl8168_mdio_write(tp, 0x06, 0x4e78);
-                        rtl8168_mdio_write(tp, 0x06, 0x039e);
-                        rtl8168_mdio_write(tp, 0x06, 0x0fe0);
-                        rtl8168_mdio_write(tp, 0x06, 0x834e);
-                        rtl8168_mdio_write(tp, 0x06, 0x7801);
-                        rtl8168_mdio_write(tp, 0x06, 0x9e05);
-                        rtl8168_mdio_write(tp, 0x06, 0xae0c);
-                        rtl8168_mdio_write(tp, 0x06, 0xaf81);
-                        rtl8168_mdio_write(tp, 0x06, 0xa7af);
-                        rtl8168_mdio_write(tp, 0x06, 0x8152);
-                        rtl8168_mdio_write(tp, 0x06, 0xaf81);
-                        rtl8168_mdio_write(tp, 0x06, 0x8baf);
-                        rtl8168_mdio_write(tp, 0x06, 0x81c2);
-                        rtl8168_mdio_write(tp, 0x06, 0xee83);
-                        rtl8168_mdio_write(tp, 0x06, 0x4800);
-                        rtl8168_mdio_write(tp, 0x06, 0xee83);
-                        rtl8168_mdio_write(tp, 0x06, 0x4900);
-                        rtl8168_mdio_write(tp, 0x06, 0xe083);
-                        rtl8168_mdio_write(tp, 0x06, 0x5110);
-                        rtl8168_mdio_write(tp, 0x06, 0xe483);
-                        rtl8168_mdio_write(tp, 0x06, 0x5158);
-                        rtl8168_mdio_write(tp, 0x06, 0x019f);
-                        rtl8168_mdio_write(tp, 0x06, 0xead0);
-                        rtl8168_mdio_write(tp, 0x06, 0x00d1);
-                        rtl8168_mdio_write(tp, 0x06, 0x801f);
-                        rtl8168_mdio_write(tp, 0x06, 0x66e2);
-                        rtl8168_mdio_write(tp, 0x06, 0xf8ea);
-                        rtl8168_mdio_write(tp, 0x06, 0xe3f8);
-                        rtl8168_mdio_write(tp, 0x06, 0xeb5a);
-                        rtl8168_mdio_write(tp, 0x06, 0xf81e);
-                        rtl8168_mdio_write(tp, 0x06, 0x20e6);
-                        rtl8168_mdio_write(tp, 0x06, 0xf8ea);
-                        rtl8168_mdio_write(tp, 0x06, 0xe5f8);
-                        rtl8168_mdio_write(tp, 0x06, 0xebd3);
-                        rtl8168_mdio_write(tp, 0x06, 0x02b3);
-                        rtl8168_mdio_write(tp, 0x06, 0xfee2);
-                        rtl8168_mdio_write(tp, 0x06, 0xf87c);
-                        rtl8168_mdio_write(tp, 0x06, 0xef32);
-                        rtl8168_mdio_write(tp, 0x06, 0x5b80);
-                        rtl8168_mdio_write(tp, 0x06, 0xe3f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x7d9e);
-                        rtl8168_mdio_write(tp, 0x06, 0x037d);
-                        rtl8168_mdio_write(tp, 0x06, 0xffff);
-                        rtl8168_mdio_write(tp, 0x06, 0x0d58);
-                        rtl8168_mdio_write(tp, 0x06, 0x1c55);
-                        rtl8168_mdio_write(tp, 0x06, 0x1a65);
-                        rtl8168_mdio_write(tp, 0x06, 0x11a1);
-                        rtl8168_mdio_write(tp, 0x06, 0x90d3);
-                        rtl8168_mdio_write(tp, 0x06, 0xe283);
-                        rtl8168_mdio_write(tp, 0x06, 0x48e3);
-                        rtl8168_mdio_write(tp, 0x06, 0x8349);
-                        rtl8168_mdio_write(tp, 0x06, 0x1b56);
-                        rtl8168_mdio_write(tp, 0x06, 0xab08);
-                        rtl8168_mdio_write(tp, 0x06, 0xef56);
-                        rtl8168_mdio_write(tp, 0x06, 0xe683);
-                        rtl8168_mdio_write(tp, 0x06, 0x48e7);
-                        rtl8168_mdio_write(tp, 0x06, 0x8349);
-                        rtl8168_mdio_write(tp, 0x06, 0x10d1);
-                        rtl8168_mdio_write(tp, 0x06, 0x801f);
-                        rtl8168_mdio_write(tp, 0x06, 0x66a0);
-                        rtl8168_mdio_write(tp, 0x06, 0x04b9);
-                        rtl8168_mdio_write(tp, 0x06, 0xe283);
-                        rtl8168_mdio_write(tp, 0x06, 0x48e3);
-                        rtl8168_mdio_write(tp, 0x06, 0x8349);
-                        rtl8168_mdio_write(tp, 0x06, 0xef65);
-                        rtl8168_mdio_write(tp, 0x06, 0xe283);
-                        rtl8168_mdio_write(tp, 0x06, 0x4ae3);
-                        rtl8168_mdio_write(tp, 0x06, 0x834b);
-                        rtl8168_mdio_write(tp, 0x06, 0x1b56);
-                        rtl8168_mdio_write(tp, 0x06, 0xaa0e);
-                        rtl8168_mdio_write(tp, 0x06, 0xef56);
-                        rtl8168_mdio_write(tp, 0x06, 0xe683);
-                        rtl8168_mdio_write(tp, 0x06, 0x4ae7);
-                        rtl8168_mdio_write(tp, 0x06, 0x834b);
-                        rtl8168_mdio_write(tp, 0x06, 0xe283);
-                        rtl8168_mdio_write(tp, 0x06, 0x4de6);
-                        rtl8168_mdio_write(tp, 0x06, 0x834c);
-                        rtl8168_mdio_write(tp, 0x06, 0xe083);
-                        rtl8168_mdio_write(tp, 0x06, 0x4da0);
-                        rtl8168_mdio_write(tp, 0x06, 0x000c);
-                        rtl8168_mdio_write(tp, 0x06, 0xaf81);
-                        rtl8168_mdio_write(tp, 0x06, 0x8be0);
-                        rtl8168_mdio_write(tp, 0x06, 0x834d);
-                        rtl8168_mdio_write(tp, 0x06, 0x10e4);
-                        rtl8168_mdio_write(tp, 0x06, 0x834d);
-                        rtl8168_mdio_write(tp, 0x06, 0xae04);
-                        rtl8168_mdio_write(tp, 0x06, 0x80e4);
-                        rtl8168_mdio_write(tp, 0x06, 0x834d);
-                        rtl8168_mdio_write(tp, 0x06, 0xe083);
-                        rtl8168_mdio_write(tp, 0x06, 0x4e78);
-                        rtl8168_mdio_write(tp, 0x06, 0x039e);
-                        rtl8168_mdio_write(tp, 0x06, 0x0be0);
-                        rtl8168_mdio_write(tp, 0x06, 0x834e);
-                        rtl8168_mdio_write(tp, 0x06, 0x7804);
-                        rtl8168_mdio_write(tp, 0x06, 0x9e04);
-                        rtl8168_mdio_write(tp, 0x06, 0xee83);
-                        rtl8168_mdio_write(tp, 0x06, 0x4e02);
-                        rtl8168_mdio_write(tp, 0x06, 0xe083);
-                        rtl8168_mdio_write(tp, 0x06, 0x32e1);
-                        rtl8168_mdio_write(tp, 0x06, 0x8333);
-                        rtl8168_mdio_write(tp, 0x06, 0x590f);
-                        rtl8168_mdio_write(tp, 0x06, 0xe283);
-                        rtl8168_mdio_write(tp, 0x06, 0x4d0c);
-                        rtl8168_mdio_write(tp, 0x06, 0x245a);
-                        rtl8168_mdio_write(tp, 0x06, 0xf01e);
-                        rtl8168_mdio_write(tp, 0x06, 0x12e4);
-                        rtl8168_mdio_write(tp, 0x06, 0xf88c);
-                        rtl8168_mdio_write(tp, 0x06, 0xe5f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x8de0);
-                        rtl8168_mdio_write(tp, 0x06, 0x8330);
-                        rtl8168_mdio_write(tp, 0x06, 0xe183);
-                        rtl8168_mdio_write(tp, 0x06, 0x3168);
-                        rtl8168_mdio_write(tp, 0x06, 0x01e4);
-                        rtl8168_mdio_write(tp, 0x06, 0xf88a);
-                        rtl8168_mdio_write(tp, 0x06, 0xe5f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x8bae);
-                        rtl8168_mdio_write(tp, 0x06, 0x37ee);
-                        rtl8168_mdio_write(tp, 0x06, 0x834e);
-                        rtl8168_mdio_write(tp, 0x06, 0x03e0);
-                        rtl8168_mdio_write(tp, 0x06, 0x834c);
-                        rtl8168_mdio_write(tp, 0x06, 0xe183);
-                        rtl8168_mdio_write(tp, 0x06, 0x4d1b);
-                        rtl8168_mdio_write(tp, 0x06, 0x019e);
-                        rtl8168_mdio_write(tp, 0x06, 0x04aa);
-                        rtl8168_mdio_write(tp, 0x06, 0xa1ae);
-                        rtl8168_mdio_write(tp, 0x06, 0xa8ee);
-                        rtl8168_mdio_write(tp, 0x06, 0x834e);
-                        rtl8168_mdio_write(tp, 0x06, 0x04ee);
-                        rtl8168_mdio_write(tp, 0x06, 0x834f);
-                        rtl8168_mdio_write(tp, 0x06, 0x00ae);
-                        rtl8168_mdio_write(tp, 0x06, 0xabe0);
-                        rtl8168_mdio_write(tp, 0x06, 0x834f);
-                        rtl8168_mdio_write(tp, 0x06, 0x7803);
-                        rtl8168_mdio_write(tp, 0x06, 0x9f14);
-                        rtl8168_mdio_write(tp, 0x06, 0xee83);
-                        rtl8168_mdio_write(tp, 0x06, 0x4e05);
-                        rtl8168_mdio_write(tp, 0x06, 0xd240);
-                        rtl8168_mdio_write(tp, 0x06, 0xd655);
-                        rtl8168_mdio_write(tp, 0x06, 0x5402);
-                        rtl8168_mdio_write(tp, 0x06, 0x81c6);
-                        rtl8168_mdio_write(tp, 0x06, 0xd2a0);
-                        rtl8168_mdio_write(tp, 0x06, 0xd6ba);
-                        rtl8168_mdio_write(tp, 0x06, 0x0002);
-                        rtl8168_mdio_write(tp, 0x06, 0x81c6);
-                        rtl8168_mdio_write(tp, 0x06, 0xfefd);
-                        rtl8168_mdio_write(tp, 0x06, 0xfc05);
-                        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-                        rtl8168_mdio_write(tp, 0x06, 0xf860);
-                        rtl8168_mdio_write(tp, 0x06, 0xe1f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x6168);
-                        rtl8168_mdio_write(tp, 0x06, 0x02e4);
-                        rtl8168_mdio_write(tp, 0x06, 0xf860);
-                        rtl8168_mdio_write(tp, 0x06, 0xe5f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x61e0);
-                        rtl8168_mdio_write(tp, 0x06, 0xf848);
-                        rtl8168_mdio_write(tp, 0x06, 0xe1f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x4958);
-                        rtl8168_mdio_write(tp, 0x06, 0x0f1e);
-                        rtl8168_mdio_write(tp, 0x06, 0x02e4);
-                        rtl8168_mdio_write(tp, 0x06, 0xf848);
-                        rtl8168_mdio_write(tp, 0x06, 0xe5f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x49d0);
-                        rtl8168_mdio_write(tp, 0x06, 0x0002);
-                        rtl8168_mdio_write(tp, 0x06, 0x820a);
-                        rtl8168_mdio_write(tp, 0x06, 0xbf83);
-                        rtl8168_mdio_write(tp, 0x06, 0x50ef);
-                        rtl8168_mdio_write(tp, 0x06, 0x46dc);
-                        rtl8168_mdio_write(tp, 0x06, 0x19dd);
-                        rtl8168_mdio_write(tp, 0x06, 0xd001);
-                        rtl8168_mdio_write(tp, 0x06, 0x0282);
-                        rtl8168_mdio_write(tp, 0x06, 0x0a02);
-                        rtl8168_mdio_write(tp, 0x06, 0x8226);
-                        rtl8168_mdio_write(tp, 0x06, 0xe0f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x60e1);
-                        rtl8168_mdio_write(tp, 0x06, 0xf861);
-                        rtl8168_mdio_write(tp, 0x06, 0x58fd);
-                        rtl8168_mdio_write(tp, 0x06, 0xe4f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x60e5);
-                        rtl8168_mdio_write(tp, 0x06, 0xf861);
-                        rtl8168_mdio_write(tp, 0x06, 0xfc04);
-                        rtl8168_mdio_write(tp, 0x06, 0xf9fa);
-                        rtl8168_mdio_write(tp, 0x06, 0xfbc6);
-                        rtl8168_mdio_write(tp, 0x06, 0xbff8);
-                        rtl8168_mdio_write(tp, 0x06, 0x40be);
-                        rtl8168_mdio_write(tp, 0x06, 0x8350);
-                        rtl8168_mdio_write(tp, 0x06, 0xa001);
-                        rtl8168_mdio_write(tp, 0x06, 0x0107);
-                        rtl8168_mdio_write(tp, 0x06, 0x1b89);
-                        rtl8168_mdio_write(tp, 0x06, 0xcfd2);
-                        rtl8168_mdio_write(tp, 0x06, 0x08eb);
-                        rtl8168_mdio_write(tp, 0x06, 0xdb19);
-                        rtl8168_mdio_write(tp, 0x06, 0xb2fb);
-                        rtl8168_mdio_write(tp, 0x06, 0xfffe);
-                        rtl8168_mdio_write(tp, 0x06, 0xfd04);
-                        rtl8168_mdio_write(tp, 0x06, 0xf8e0);
-                        rtl8168_mdio_write(tp, 0x06, 0xf848);
-                        rtl8168_mdio_write(tp, 0x06, 0xe1f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x4968);
-                        rtl8168_mdio_write(tp, 0x06, 0x08e4);
-                        rtl8168_mdio_write(tp, 0x06, 0xf848);
-                        rtl8168_mdio_write(tp, 0x06, 0xe5f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x4958);
-                        rtl8168_mdio_write(tp, 0x06, 0xf7e4);
-                        rtl8168_mdio_write(tp, 0x06, 0xf848);
-                        rtl8168_mdio_write(tp, 0x06, 0xe5f8);
-                        rtl8168_mdio_write(tp, 0x06, 0x49fc);
-                        rtl8168_mdio_write(tp, 0x06, 0x044d);
-                        rtl8168_mdio_write(tp, 0x06, 0x2000);
-                        rtl8168_mdio_write(tp, 0x06, 0x024e);
-                        rtl8168_mdio_write(tp, 0x06, 0x2200);
-                        rtl8168_mdio_write(tp, 0x06, 0x024d);
-                        rtl8168_mdio_write(tp, 0x06, 0xdfff);
-                        rtl8168_mdio_write(tp, 0x06, 0x014e);
-                        rtl8168_mdio_write(tp, 0x06, 0xddff);
-                        rtl8168_mdio_write(tp, 0x06, 0x01f8);
-                        rtl8168_mdio_write(tp, 0x06, 0xfafb);
-                        rtl8168_mdio_write(tp, 0x06, 0xef79);
-                        rtl8168_mdio_write(tp, 0x06, 0xbff8);
-                        rtl8168_mdio_write(tp, 0x06, 0x22d8);
-                        rtl8168_mdio_write(tp, 0x06, 0x19d9);
-                        rtl8168_mdio_write(tp, 0x06, 0x5884);
-                        rtl8168_mdio_write(tp, 0x06, 0x9f09);
-                        rtl8168_mdio_write(tp, 0x06, 0xbf82);
-                        rtl8168_mdio_write(tp, 0x06, 0x6dd6);
-                        rtl8168_mdio_write(tp, 0x06, 0x8275);
-                        rtl8168_mdio_write(tp, 0x06, 0x0201);
-                        rtl8168_mdio_write(tp, 0x06, 0x4fef);
-                        rtl8168_mdio_write(tp, 0x06, 0x97ff);
-                        rtl8168_mdio_write(tp, 0x06, 0xfefc);
-                        rtl8168_mdio_write(tp, 0x06, 0x0517);
-                        rtl8168_mdio_write(tp, 0x06, 0xfffe);
-                        rtl8168_mdio_write(tp, 0x06, 0x0117);
-                        rtl8168_mdio_write(tp, 0x06, 0x0001);
-                        rtl8168_mdio_write(tp, 0x06, 0x0200);
-                        rtl8168_mdio_write(tp, 0x05, 0x83d8);
-                        rtl8168_mdio_write(tp, 0x06, 0x8000);
-                        rtl8168_mdio_write(tp, 0x05, 0x83d6);
-                        rtl8168_mdio_write(tp, 0x06, 0x824f);
-                        rtl8168_mdio_write(tp, 0x02, 0x2010);
-                        rtl8168_mdio_write(tp, 0x03, 0xdc00);
-                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                        rtl8168_mdio_write(tp, 0x0b, 0x0600);
-                        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                        rtl8168_mdio_write(tp, 0x05, 0xfff6);
-                        rtl8168_mdio_write(tp, 0x06, 0x00fc);
-                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                }
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                rtl8168_mdio_write(tp, 0x0D, 0xF880);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        } else if (tp->mcfg == CFG_METHOD_11) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x10, 0x0008);
-                rtl8168_mdio_write(tp, 0x0D, 0x006C);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x17, 0x0CC0);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x0B, 0xA4D8);
-                rtl8168_mdio_write(tp, 0x09, 0x281C);
-                rtl8168_mdio_write(tp, 0x07, 0x2883);
-                rtl8168_mdio_write(tp, 0x0A, 0x6B35);
-                rtl8168_mdio_write(tp, 0x1D, 0x3DA4);
-                rtl8168_mdio_write(tp, 0x1C, 0xEFFD);
-                rtl8168_mdio_write(tp, 0x14, 0x7F52);
-                rtl8168_mdio_write(tp, 0x18, 0x7FC6);
-                rtl8168_mdio_write(tp, 0x08, 0x0601);
-                rtl8168_mdio_write(tp, 0x06, 0x4063);
-                rtl8168_mdio_write(tp, 0x10, 0xF074);
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x13, 0x0789);
-                rtl8168_mdio_write(tp, 0x12, 0xF4BD);
-                rtl8168_mdio_write(tp, 0x1A, 0x04FD);
-                rtl8168_mdio_write(tp, 0x14, 0x84B0);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                rtl8168_mdio_write(tp, 0x00, 0x9200);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x01, 0x0340);
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x04, 0x4000);
-                rtl8168_mdio_write(tp, 0x03, 0x1D21);
-                rtl8168_mdio_write(tp, 0x02, 0x0C32);
-                rtl8168_mdio_write(tp, 0x01, 0x0200);
-                rtl8168_mdio_write(tp, 0x00, 0x5554);
-                rtl8168_mdio_write(tp, 0x04, 0x4800);
-                rtl8168_mdio_write(tp, 0x04, 0x4000);
-                rtl8168_mdio_write(tp, 0x04, 0xF000);
-                rtl8168_mdio_write(tp, 0x03, 0xDF01);
-                rtl8168_mdio_write(tp, 0x02, 0xDF20);
-                rtl8168_mdio_write(tp, 0x01, 0x101A);
-                rtl8168_mdio_write(tp, 0x00, 0xA0FF);
-                rtl8168_mdio_write(tp, 0x04, 0xF800);
-                rtl8168_mdio_write(tp, 0x04, 0xF000);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                rtl8168_mdio_write(tp, 0x1E, 0x0023);
-                rtl8168_mdio_write(tp, 0x16, 0x0000);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                gphy_val = rtl8168_mdio_read(tp, 0x0D);
-                gphy_val |= BIT_5;
-                rtl8168_mdio_write(tp, 0x0D, gphy_val);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                gphy_val = rtl8168_mdio_read(tp, 0x0C);
-                gphy_val |= BIT_10;
-                rtl8168_mdio_write(tp, 0x0C, gphy_val);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        } else if (tp->mcfg == CFG_METHOD_12) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x17, 0x0CC0);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                gphy_val = rtl8168_mdio_read(tp, 0x0D);
-                gphy_val |= BIT_5;
-                rtl8168_mdio_write(tp, 0x0D, gphy_val);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                gphy_val = rtl8168_mdio_read(tp, 0x0C);
-                gphy_val |= BIT_10;
-                rtl8168_mdio_write(tp, 0x0C, gphy_val);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                rtl8168_mdio_write(tp, 0x1E, 0x002C);
-                rtl8168_mdio_write(tp, 0x15, 0x035D);
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x01, 0x0300);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        } else if (tp->mcfg == CFG_METHOD_13) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                gphy_val = rtl8168_mdio_read(tp, 0x0D);
-                gphy_val |= BIT_5;
-                rtl8168_mdio_write(tp, 0x0D, gphy_val);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                gphy_val = rtl8168_mdio_read(tp, 0x0C);
-                gphy_val |= BIT_10;
-                rtl8168_mdio_write(tp, 0x0C, gphy_val);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        } else if (tp->mcfg == CFG_METHOD_14 || tp->mcfg == CFG_METHOD_15) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                rtl8168_mdio_write(tp, 0x1E, 0x0023);
-                gphy_val = rtl8168_mdio_read(tp, 0x17) | BIT_1;
-                if (tp->RequiredSecLanDonglePatch)
-                        gphy_val &= ~(BIT_2);
-                else
-                        gphy_val |= (BIT_2);
-                rtl8168_mdio_write(tp, 0x17, gphy_val);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8b80);
-                rtl8168_mdio_write(tp, 0x06, 0xc896);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x0B, 0x6C20);
-                rtl8168_mdio_write(tp, 0x07, 0x2872);
-                rtl8168_mdio_write(tp, 0x1C, 0xEFFF);
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x14, 0x6420);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                gphy_val = rtl8168_mdio_read(tp, 0x08) & 0x00FF;
-                rtl8168_mdio_write(tp, 0x08, gphy_val | 0x8000);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                rtl8168_mdio_write(tp, 0x1E, 0x002D);
-                gphy_val = rtl8168_mdio_read(tp, 0x18);
-                rtl8168_mdio_write(tp, 0x18, gphy_val | 0x0010);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                gphy_val = rtl8168_mdio_read(tp, 0x14);
-                rtl8168_mdio_write(tp, 0x14, gphy_val | 0x8000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x00, 0x080B);
-                rtl8168_mdio_write(tp, 0x0B, 0x09D7);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                if (aspm) {
-                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                                rtl8168_mdio_write(tp, 0x15, 0x1006);
-                        }
-                }
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x19, 0x7F46);
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8AD2);
-                rtl8168_mdio_write(tp, 0x06, 0x6810);
-                rtl8168_mdio_write(tp, 0x05, 0x8AD4);
-                rtl8168_mdio_write(tp, 0x06, 0x8002);
-                rtl8168_mdio_write(tp, 0x05, 0x8ADE);
-                rtl8168_mdio_write(tp, 0x06, 0x8025);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                rtl8168_mdio_write(tp, 0x1E, 0x002F);
-                rtl8168_mdio_write(tp, 0x15, 0x1919);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                rtl8168_mdio_write(tp, 0x1E, 0x002D);
-                gphy_val = rtl8168_mdio_read(tp, 0x18);
-                rtl8168_mdio_write(tp, 0x18, gphy_val | 0x0040);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B86);
-                gphy_val = rtl8168_mdio_read(tp, 0x06);
-                rtl8168_mdio_write(tp, 0x06, gphy_val | 0x0001);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                rtl8168_mdio_write(tp, 0x1E, 0x00AC);
-                rtl8168_mdio_write(tp, 0x18, 0x0006);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        } else if (tp->mcfg == CFG_METHOD_16) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B80);
-                gphy_val = rtl8168_mdio_read(tp, 0x06);
-                gphy_val |= BIT_2 | BIT_1;
-                rtl8168_mdio_write(tp, 0x06, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0004);
-                rtl8168_mdio_write(tp, 0x1f, 0x0007);
-                rtl8168_mdio_write(tp, 0x1e, 0x002D);
-                gphy_val = rtl8168_mdio_read(tp, 0x18);
-                gphy_val |= BIT_4;
-                rtl8168_mdio_write(tp, 0x18, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0002);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                gphy_val = rtl8168_mdio_read(tp, 0x14);
-                gphy_val |= BIT_15;
-                rtl8168_mdio_write(tp, 0x14, gphy_val);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                rtl8168_mdio_write(tp, 0x15, 0x1006);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B86);
-                gphy_val = rtl8168_mdio_read(tp, 0x06);
-                gphy_val |= BIT_0;
-                rtl8168_mdio_write(tp, 0x06, gphy_val);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                rtl8168_mdio_write(tp, 0x0B, 0x6C14);
-                rtl8168_mdio_write(tp, 0x14, 0x7F3D);
-                rtl8168_mdio_write(tp, 0x1C, 0xFAFE);
-                rtl8168_mdio_write(tp, 0x08, 0x07C5);
-                rtl8168_mdio_write(tp, 0x10, 0xF090);
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x14, 0x641A);
-                rtl8168_mdio_write(tp, 0x1A, 0x0606);
-                rtl8168_mdio_write(tp, 0x12, 0xF480);
-                rtl8168_mdio_write(tp, 0x13, 0x0747);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0004);
-                rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                rtl8168_mdio_write(tp, 0x1E, 0x0078);
-                rtl8168_mdio_write(tp, 0x15, 0xA408);
-                rtl8168_mdio_write(tp, 0x17, 0x5100);
-                rtl8168_mdio_write(tp, 0x19, 0x0008);
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x0D, 0x0207);
-                rtl8168_mdio_write(tp, 0x02, 0x5FD0);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0004);
-                rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                rtl8168_mdio_write(tp, 0x1E, 0x00A1);
-                gphy_val = rtl8168_mdio_read(tp, 0x1A);
-                gphy_val &= ~BIT_2;
-                rtl8168_mdio_write(tp, 0x1A, gphy_val);
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0004);
-                rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                rtl8168_mdio_write(tp, 0x1E, 0x002D);
-                gphy_val = rtl8168_mdio_read(tp, 0x16);
-                gphy_val |= BIT_5;
-                rtl8168_mdio_write(tp, 0x16, gphy_val);
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0004);
-                rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                rtl8168_mdio_write(tp, 0x1E, 0x00AC);
-                rtl8168_mdio_write(tp, 0x18, 0x0006);
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x09, 0xA20F);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B5B);
-                rtl8168_mdio_write(tp, 0x06, 0x9222);
-                rtl8168_mdio_write(tp, 0x05, 0x8B6D);
-                rtl8168_mdio_write(tp, 0x06, 0x8000);
-                rtl8168_mdio_write(tp, 0x05, 0x8B76);
-                rtl8168_mdio_write(tp, 0x06, 0x8000);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                if (pdev->subsystem_vendor == 0x1043 &&
-                    pdev->subsystem_device == 0x13F7) {
-
-                        static const u16 evl_phy_value[] = {
-                                0x8B56, 0x8B5F, 0x8B68, 0x8B71,
-                                0x8B7A, 0x8A7B, 0x8A7E, 0x8A81,
-                                0x8A84, 0x8A87
-                        };
-
-                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                        for (i = 0; i < ARRAY_SIZE(evl_phy_value); i++) {
-                                rtl8168_mdio_write(tp, 0x05, evl_phy_value[i]);
-                                gphy_val = (0xAA << 8) | (rtl8168_mdio_read(tp, 0x06) & 0xFF);
-                                rtl8168_mdio_write(tp, 0x06, gphy_val);
-                        }
-                        rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                        rtl8168_mdio_write(tp, 0x1E, 0x0078);
-                        rtl8168_mdio_write(tp, 0x17, 0x51AA);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                }
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B54);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_11);
-                rtl8168_mdio_write(tp, 0x05, 0x8B5D);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_11);
-                rtl8168_mdio_write(tp, 0x05, 0x8A7C);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x05, 0x8A7F);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) | BIT_8);
-                rtl8168_mdio_write(tp, 0x05, 0x8A82);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x05, 0x8A85);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x05, 0x8A88);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B85);
-                gphy_val = rtl8168_mdio_read(tp, 0x06) | BIT_14 | BIT_15;
-                rtl8168_mdio_write(tp, 0x06, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-        } else if (tp->mcfg == CFG_METHOD_17) {
-                if (pdev->subsystem_vendor == 0x144d &&
-                    pdev->subsystem_device == 0xc0a6) {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0001);
-                        rtl8168_mdio_write(tp, 0x0e, 0x6b7f);
-                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                        rtl8168_mdio_write(tp, 0x05, 0x8B86);
-                        gphy_val = rtl8168_mdio_read(tp, 0x06);
-                        gphy_val |= BIT_4;
-                        rtl8168_mdio_write(tp, 0x06, gphy_val);
-                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                } else {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                        rtl8168_mdio_write(tp, 0x05, 0x8B80);
-                        gphy_val = rtl8168_mdio_read(tp, 0x06);
-                        gphy_val |= BIT_2 | BIT_1;
-                        rtl8168_mdio_write(tp, 0x06, gphy_val);
-                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                        rtl8168_mdio_write(tp, 0x05, 0x8B86);
-                        gphy_val = rtl8168_mdio_read(tp, 0x06);
-                        gphy_val &= ~BIT_4;
-                        rtl8168_mdio_write(tp, 0x06, gphy_val);
-                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                }
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0004);
-                rtl8168_mdio_write(tp, 0x1f, 0x0007);
-                rtl8168_mdio_write(tp, 0x1e, 0x002D);
-                gphy_val = rtl8168_mdio_read(tp, 0x18);
-                gphy_val |= BIT_4;
-                rtl8168_mdio_write(tp, 0x18, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0002);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                gphy_val = rtl8168_mdio_read(tp, 0x14);
-                gphy_val |= BIT_15;
-                rtl8168_mdio_write(tp, 0x14, gphy_val);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B86);
-                gphy_val = rtl8168_mdio_read(tp, 0x06);
-                gphy_val |= BIT_0;
-                rtl8168_mdio_write(tp, 0x06, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0004);
-                rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                rtl8168_mdio_write(tp, 0x1E, 0x00AC);
-                rtl8168_mdio_write(tp, 0x18, 0x0006);
-                rtl8168_mdio_write(tp, 0x1F, 0x0002);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x09, 0xA20F);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B85);
-                gphy_val = rtl8168_mdio_read(tp, 0x06) | BIT_14 | BIT_15;
-                rtl8168_mdio_write(tp, 0x06, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B5B);
-                rtl8168_mdio_write(tp, 0x06, 0x9222);
-                rtl8168_mdio_write(tp, 0x05, 0x8B6D);
-                rtl8168_mdio_write(tp, 0x06, 0x8000);
-                rtl8168_mdio_write(tp, 0x05, 0x8B76);
-                rtl8168_mdio_write(tp, 0x06, 0x8000);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                if (pdev->subsystem_vendor == 0x1043 &&
-                    pdev->subsystem_device == 0x13F7) {
-
-                        static const u16 evl_phy_value[] = {
-                                0x8B56, 0x8B5F, 0x8B68, 0x8B71,
-                                0x8B7A, 0x8A7B, 0x8A7E, 0x8A81,
-                                0x8A84, 0x8A87
-                        };
-
-                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                        for (i = 0; i < ARRAY_SIZE(evl_phy_value); i++) {
-                                rtl8168_mdio_write(tp, 0x05, evl_phy_value[i]);
-                                gphy_val = (0xAA << 8) | (rtl8168_mdio_read(tp, 0x06) & 0xFF);
-                                rtl8168_mdio_write(tp, 0x06, gphy_val);
-                        }
-                        rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                        rtl8168_mdio_write(tp, 0x1E, 0x0078);
-                        rtl8168_mdio_write(tp, 0x17, 0x51AA);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                }
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B54);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_11);
-                rtl8168_mdio_write(tp, 0x05, 0x8B5D);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_11);
-                rtl8168_mdio_write(tp, 0x05, 0x8A7C);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x05, 0x8A7F);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) | BIT_8);
-                rtl8168_mdio_write(tp, 0x05, 0x8A82);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x05, 0x8A85);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x05, 0x8A88);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-                if (aspm) {
-                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                                gphy_val = rtl8168_mdio_read(tp, 0x15);
-                                gphy_val |= BIT_12;
-                                rtl8168_mdio_write(tp, 0x15, gphy_val);
-                        }
-                }
-        } else if (tp->mcfg == CFG_METHOD_18) {
-                if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                        rtl8168_mdio_write(tp, 0x05, 0x8b80);
-                        gphy_val = rtl8168_mdio_read(tp, 0x06);
-                        gphy_val |= BIT_2 | BIT_1;
-                        rtl8168_mdio_write(tp, 0x06, gphy_val);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                }
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0007);
-                rtl8168_mdio_write(tp, 0x1e, 0x002D);
-                gphy_val = rtl8168_mdio_read(tp, 0x18);
-                gphy_val |= BIT_4;
-                rtl8168_mdio_write(tp, 0x18, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                gphy_val = rtl8168_mdio_read(tp, 0x14);
-                gphy_val |= BIT_15;
-                rtl8168_mdio_write(tp, 0x14, gphy_val);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B86);
-                gphy_val = rtl8168_mdio_read(tp, 0x06);
-                gphy_val |= BIT_0;
-                rtl8168_mdio_write(tp, 0x06, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B85);
-                gphy_val = rtl8168_mdio_read(tp, 0x06);
-                gphy_val |= BIT_14;
-                rtl8168_mdio_write(tp, 0x06, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x09, 0xA20F);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B55);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x05, 0x8B5E);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x05, 0x8B67);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x05, 0x8B70);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                rtl8168_mdio_write(tp, 0x1E, 0x0078);
-                rtl8168_mdio_write(tp, 0x17, 0x0000);
-                rtl8168_mdio_write(tp, 0x19, 0x00FB);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B79);
-                rtl8168_mdio_write(tp, 0x06, 0xAA00);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0003);
-                rtl8168_mdio_write(tp, 0x01, 0x328A);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B54);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_11);
-                rtl8168_mdio_write(tp, 0x05, 0x8B5D);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_11);
-                rtl8168_mdio_write(tp, 0x05, 0x8A7C);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x05, 0x8A7F);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) | BIT_8);
-                rtl8168_mdio_write(tp, 0x05, 0x8A82);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x05, 0x8A85);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x05, 0x8A88);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-                if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                        rtl8168_mdio_write(tp, 0x05, 0x8b85);
-                        rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) | BIT_15);
-                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                }
-
-                if (aspm) {
-                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                                gphy_val = rtl8168_mdio_read(tp, 0x15);
-                                gphy_val |= BIT_12;
-                                rtl8168_mdio_write(tp, 0x15, gphy_val);
-                        }
-                }
-        } else if (tp->mcfg == CFG_METHOD_19) {
-                if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                        rtl8168_mdio_write(tp, 0x05, 0x8b80);
-                        gphy_val = rtl8168_mdio_read(tp, 0x06);
-                        gphy_val |= BIT_2 | BIT_1;
-                        rtl8168_mdio_write(tp, 0x06, gphy_val);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                }
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0007);
-                rtl8168_mdio_write(tp, 0x1e, 0x002D);
-                gphy_val = rtl8168_mdio_read(tp, 0x18);
-                gphy_val |= BIT_4;
-                rtl8168_mdio_write(tp, 0x18, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                gphy_val = rtl8168_mdio_read(tp, 0x14);
-                gphy_val |= BIT_15;
-                rtl8168_mdio_write(tp, 0x14, gphy_val);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B86);
-                gphy_val = rtl8168_mdio_read(tp, 0x06);
-                gphy_val |= BIT_0;
-                rtl8168_mdio_write(tp, 0x06, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B54);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_11);
-                rtl8168_mdio_write(tp, 0x05, 0x8B5D);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_11);
-                rtl8168_mdio_write(tp, 0x05, 0x8A7C);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x05, 0x8A7F);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) | BIT_8);
-                rtl8168_mdio_write(tp, 0x05, 0x8A82);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x05, 0x8A85);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x05, 0x8A88);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                rtl8168_mdio_write(tp, 0x1E, 0x0023);
-                rtl8168_clear_eth_phy_bit(tp, 0x17, BIT_1);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-
-                if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                        rtl8168_mdio_write(tp, 0x05, 0x8b85);
-                        rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) | BIT_15);
-                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                }
-
-                if (aspm) {
-                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                                gphy_val = rtl8168_mdio_read(tp, 0x15);
-                                gphy_val |= BIT_12;
-                                rtl8168_mdio_write(tp, 0x15, gphy_val);
-                        }
-                }
-        } else if (tp->mcfg == CFG_METHOD_20) {
-
-                if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                        rtl8168_mdio_write(tp, 0x05, 0x8b80);
-                        gphy_val = rtl8168_mdio_read(tp, 0x06);
-                        gphy_val |= BIT_2 | BIT_1;
-                        rtl8168_mdio_write(tp, 0x06, gphy_val);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                }
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0007);
-                rtl8168_mdio_write(tp, 0x1e, 0x002D);
-                gphy_val = rtl8168_mdio_read(tp, 0x18);
-                gphy_val |= BIT_4;
-                rtl8168_mdio_write(tp, 0x18, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                gphy_val = rtl8168_mdio_read(tp, 0x14);
-                gphy_val |= BIT_15;
-                rtl8168_mdio_write(tp, 0x14, gphy_val);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B86);
-                gphy_val = rtl8168_mdio_read(tp, 0x06);
-                gphy_val |= BIT_0;
-                rtl8168_mdio_write(tp, 0x06, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B85);
-                gphy_val = rtl8168_mdio_read(tp, 0x06);
-                gphy_val |= BIT_14;
-                rtl8168_mdio_write(tp, 0x06, gphy_val);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0003);
-                rtl8168_mdio_write(tp, 0x09, 0xA20F);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B55);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x05, 0x8B5E);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x05, 0x8B67);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x05, 0x8B70);
-                rtl8168_mdio_write(tp, 0x06, 0x0000);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                rtl8168_mdio_write(tp, 0x1E, 0x0078);
-                rtl8168_mdio_write(tp, 0x17, 0x0000);
-                rtl8168_mdio_write(tp, 0x19, 0x00FB);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B79);
-                rtl8168_mdio_write(tp, 0x06, 0xAA00);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                rtl8168_mdio_write(tp, 0x05, 0x8B54);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_11);
-                rtl8168_mdio_write(tp, 0x05, 0x8B5D);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_11);
-                rtl8168_mdio_write(tp, 0x05, 0x8A7C);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x05, 0x8A7F);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) | BIT_8);
-                rtl8168_mdio_write(tp, 0x05, 0x8A82);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x05, 0x8A85);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x05, 0x8A88);
-                rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-
-                if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                        rtl8168_mdio_write(tp, 0x1f, 0x0005);
-                        rtl8168_mdio_write(tp, 0x05, 0x8b85);
-                        rtl8168_mdio_write(tp, 0x06, rtl8168_mdio_read(tp, 0x06) | BIT_15);
-                        rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                }
-
-                if (aspm) {
-                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                                rtl8168_mdio_write(tp, 0x1f, 0x0000);
-                                gphy_val = rtl8168_mdio_read(tp, 0x15);
-                                gphy_val |= BIT_12;
-                                rtl8168_mdio_write(tp, 0x15, gphy_val);
-                        }
-                }
-        } else if (tp->mcfg == CFG_METHOD_21) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0A46);
-                gphy_val = rtl8168_mdio_read(tp, 0x10);
-                rtl8168_mdio_write(tp, 0x1F, 0x0BCC);
-                if (gphy_val & BIT_8)
-                        rtl8168_clear_eth_phy_bit(tp, 0x12, BIT_15);
-                else
-                        rtl8168_set_eth_phy_bit(tp, 0x12, BIT_15);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A46);
-                gphy_val = rtl8168_mdio_read(tp, 0x13);
-                rtl8168_mdio_write(tp, 0x1F, 0x0C41);
-                if (gphy_val & BIT_8)
-                        rtl8168_set_eth_phy_bit(tp, 0x15, BIT_1);
-                else
-                        rtl8168_clear_eth_phy_bit(tp, 0x15, BIT_1);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
-                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_2 | BIT_3);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0BCC);
-                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
-                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_7);
-                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_6);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x8084);
-                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) & ~(BIT_14 | BIT_13));
-                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_12);
-                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_1);
-                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_0);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A4B);
-                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_2);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x8012);
-                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) | BIT_15);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0C42);
-                gphy_val = rtl8168_mdio_read(tp, 0x11);
-                gphy_val |= BIT_14;
-                gphy_val &= ~BIT_13;
-                rtl8168_mdio_write(tp, 0x11, gphy_val);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x809A);
-                rtl8168_mdio_write(tp, 0x14, 0x8022);
-                rtl8168_mdio_write(tp, 0x13, 0x80A0);
-                gphy_val = rtl8168_mdio_read(tp, 0x14) & 0x00FF;
-                gphy_val |= 0x1000;
-                rtl8168_mdio_write(tp, 0x14, gphy_val);
-                rtl8168_mdio_write(tp, 0x13, 0x8088);
-                rtl8168_mdio_write(tp, 0x14, 0x9222);
-
-                if (aspm) {
-                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_2);
-                        }
-                }
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        } else if (tp->mcfg == CFG_METHOD_22) {
-                //do nothing
-        } else if (tp->mcfg == CFG_METHOD_23) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
-                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | (BIT_3 | BIT_2));
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0BCC);
-                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
-                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_7);
-                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_6);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x8084);
-                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) & ~(BIT_14 | BIT_13));
-                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_12);
-                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_1);
-                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_0);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A4B);
-                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_2);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x8012);
-                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) | BIT_15);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0C42);
-                ClearAndSetEthPhyBit(tp,
-                                     0x11,
-                                     BIT_13,
-                                     BIT_14
-                                    );
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                if (aspm) {
-                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_2);
-                        }
-                }
-        } else if (tp->mcfg == CFG_METHOD_24) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0BCC);
-                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
-                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_7);
-                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_6);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x8084);
-                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) & ~(BIT_14 | BIT_13));
-                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_12);
-                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_1);
-                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_0);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x8012);
-                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) | BIT_15);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0C42);
-                gphy_val = rtl8168_mdio_read(tp, 0x11);
-                gphy_val |= BIT_14;
-                gphy_val &= ~BIT_13;
-                rtl8168_mdio_write(tp, 0x11, gphy_val);
-
-                if (aspm) {
-                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_2);
-                        }
-                }
-        } else if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0BCC);
-                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
-                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_7);
-                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_6);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x8084);
-                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) & ~(BIT_14 | BIT_13));
-                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_12);
-                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_1);
-                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_0);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x8012);
-                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) | BIT_15);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0BCE);
-                rtl8168_mdio_write(tp, 0x12, 0x8860);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x80F3);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x8B00);
-                rtl8168_mdio_write(tp, 0x13, 0x80F0);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x3A00);
-                rtl8168_mdio_write(tp, 0x13, 0x80EF);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x0500);
-                rtl8168_mdio_write(tp, 0x13, 0x80F6);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x6E00);
-                rtl8168_mdio_write(tp, 0x13, 0x80EC);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x6800);
-                rtl8168_mdio_write(tp, 0x13, 0x80ED);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x7C00);
-                rtl8168_mdio_write(tp, 0x13, 0x80F2);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0xF400);
-                rtl8168_mdio_write(tp, 0x13, 0x80F4);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x8500);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x8110);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0xA800);
-                rtl8168_mdio_write(tp, 0x13, 0x810F);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x1D00);
-                rtl8168_mdio_write(tp, 0x13, 0x8111);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0xF500);
-                rtl8168_mdio_write(tp, 0x13, 0x8113);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x6100);
-                rtl8168_mdio_write(tp, 0x13, 0x8115);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x9200);
-                rtl8168_mdio_write(tp, 0x13, 0x810E);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x0400);
-                rtl8168_mdio_write(tp, 0x13, 0x810C);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x7C00);
-                rtl8168_mdio_write(tp, 0x13, 0x810B);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x5A00);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x80D1);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0xFF00);
-                rtl8168_mdio_write(tp, 0x13, 0x80CD);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x9E00);
-                rtl8168_mdio_write(tp, 0x13, 0x80D3);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x0E00);
-                rtl8168_mdio_write(tp, 0x13, 0x80D5);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0xCA00);
-                rtl8168_mdio_write(tp, 0x13, 0x80D7);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x8400);
-
-                if (aspm) {
-                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_2);
-                        }
-                }
-        } else if (tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0BCC);
-                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) & ~BIT_8);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
-                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_7);
-                rtl8168_mdio_write(tp, 0x11, rtl8168_mdio_read(tp, 0x11) | BIT_6);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x8084);
-                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) & ~(BIT_14 | BIT_13));
-                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_12);
-                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_1);
-                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_0);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x8012);
-                rtl8168_mdio_write(tp, 0x14, rtl8168_mdio_read(tp, 0x14) | BIT_15);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0C42);
-                rtl8168_mdio_write(tp, 0x11, (rtl8168_mdio_read(tp, 0x11) & ~BIT_13) | BIT_14);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x80F3);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x8B00);
-                rtl8168_mdio_write(tp, 0x13, 0x80F0);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x3A00);
-                rtl8168_mdio_write(tp, 0x13, 0x80EF);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x0500);
-                rtl8168_mdio_write(tp, 0x13, 0x80F6);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x6E00);
-                rtl8168_mdio_write(tp, 0x13, 0x80EC);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x6800);
-                rtl8168_mdio_write(tp, 0x13, 0x80ED);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x7C00);
-                rtl8168_mdio_write(tp, 0x13, 0x80F2);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0xF400);
-                rtl8168_mdio_write(tp, 0x13, 0x80F4);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x8500);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x8110);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0xA800);
-                rtl8168_mdio_write(tp, 0x13, 0x810F);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x1D00);
-                rtl8168_mdio_write(tp, 0x13, 0x8111);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0xF500);
-                rtl8168_mdio_write(tp, 0x13, 0x8113);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x6100);
-                rtl8168_mdio_write(tp, 0x13, 0x8115);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x9200);
-                rtl8168_mdio_write(tp, 0x13, 0x810E);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x0400);
-                rtl8168_mdio_write(tp, 0x13, 0x810C);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x7C00);
-                rtl8168_mdio_write(tp, 0x13, 0x810B);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x5A00);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x80D1);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0xFF00);
-                rtl8168_mdio_write(tp, 0x13, 0x80CD);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x9E00);
-                rtl8168_mdio_write(tp, 0x13, 0x80D3);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x0E00);
-                rtl8168_mdio_write(tp, 0x13, 0x80D5);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0xCA00);
-                rtl8168_mdio_write(tp, 0x13, 0x80D7);
-                rtl8168_mdio_write(tp, 0x14, (rtl8168_mdio_read(tp, 0x14) & ~0xFF00) | 0x8400);
-
-                if (aspm) {
-                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                                rtl8168_mdio_write(tp, 0x10, rtl8168_mdio_read(tp, 0x10) | BIT_2);
-                        }
-                }
-        } else if (tp->mcfg == CFG_METHOD_29) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x809b);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xF800 ,
-                                      0x8000
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x80A2);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xFF00 ,
-                                      0x8000
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x80A4);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xFF00 ,
-                                      0x8500
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x809C);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xFF00 ,
-                                      0xbd00
-                                    );
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x80AD);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xF800 ,
-                                      0x7000
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x80B4);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xFF00 ,
-                                      0x5000
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x80AC);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xFF00 ,
-                                      0x4000
-                                    );
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x808E);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xFF00 ,
-                                      0x1200
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x8090);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xFF00 ,
-                                      0xE500
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x8092);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xFF00 ,
-                                      0x9F00
-                                    );
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                        u16 dout_tapbin;
-
-                        dout_tapbin = 0x0000;
-                        rtl8168_mdio_write( tp, 0x1F, 0x0A46 );
-                        gphy_val = rtl8168_mdio_read( tp, 0x13 );
-                        gphy_val &= (BIT_1|BIT_0);
-                        gphy_val <<= 2;
-                        dout_tapbin |= gphy_val;
-
-                        gphy_val = rtl8168_mdio_read( tp, 0x12 );
-                        gphy_val &= (BIT_15|BIT_14);
-                        gphy_val >>= 14;
-                        dout_tapbin |= gphy_val;
-
-                        dout_tapbin = ~( dout_tapbin^BIT_3 );
-                        dout_tapbin <<= 12;
-                        dout_tapbin &= 0xF000;
-
-                        rtl8168_mdio_write( tp, 0x1F, 0x0A43 );
-
-                        rtl8168_mdio_write( tp, 0x13, 0x827A );
-                        ClearAndSetEthPhyBit( tp,
-                                              0x14,
-                                              BIT_15|BIT_14|BIT_13|BIT_12,
-                                              dout_tapbin
-                                            );
-
-
-                        rtl8168_mdio_write( tp, 0x13, 0x827B );
-                        ClearAndSetEthPhyBit( tp,
-                                              0x14,
-                                              BIT_15|BIT_14|BIT_13|BIT_12,
-                                              dout_tapbin
-                                            );
-
-
-                        rtl8168_mdio_write( tp, 0x13, 0x827C );
-                        ClearAndSetEthPhyBit( tp,
-                                              0x14,
-                                              BIT_15|BIT_14|BIT_13|BIT_12,
-                                              dout_tapbin
-                                            );
-
-
-                        rtl8168_mdio_write( tp, 0x13, 0x827D );
-                        ClearAndSetEthPhyBit( tp,
-                                              0x14,
-                                              BIT_15|BIT_14|BIT_13|BIT_12,
-                                              dout_tapbin
-                                            );
-
-                        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                        rtl8168_mdio_write(tp, 0x13, 0x8011);
-                        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_11);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0A42);
-                        rtl8168_set_eth_phy_bit(tp, 0x16, BIT_1);
-                }
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
-                rtl8168_set_eth_phy_bit( tp, 0x11, BIT_11 );
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0BCA);
-                ClearAndSetEthPhyBit( tp,
-                                      0x17,
-                                      (BIT_13 | BIT_12) ,
-                                      BIT_14
-                                    );
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x803F);
-                rtl8168_clear_eth_phy_bit( tp, 0x14, (BIT_13 | BIT_12));
-                rtl8168_mdio_write(tp, 0x13, 0x8047);
-                rtl8168_clear_eth_phy_bit( tp, 0x14, (BIT_13 | BIT_12));
-                rtl8168_mdio_write(tp, 0x13, 0x804F);
-                rtl8168_clear_eth_phy_bit( tp, 0x14, (BIT_13 | BIT_12));
-                rtl8168_mdio_write(tp, 0x13, 0x8057);
-                rtl8168_clear_eth_phy_bit( tp, 0x14, (BIT_13 | BIT_12));
-                rtl8168_mdio_write(tp, 0x13, 0x805F);
-                rtl8168_clear_eth_phy_bit( tp, 0x14, (BIT_13 | BIT_12));
-                rtl8168_mdio_write(tp, 0x13, 0x8067 );
-                rtl8168_clear_eth_phy_bit( tp, 0x14, (BIT_13 | BIT_12));
-                rtl8168_mdio_write(tp, 0x13, 0x806F );
-                rtl8168_clear_eth_phy_bit( tp, 0x14, (BIT_13 | BIT_12));
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                if (aspm) {
-                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                                rtl8168_set_eth_phy_bit( tp, 0x10, BIT_2 );
-                                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                        }
-                }
-        } else if (tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_37) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x808A);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0,
-                                      0x0A );
-
-                if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                        rtl8168_mdio_write(tp, 0x13, 0x8011);
-                        rtl8168_set_eth_phy_bit(tp, 0x14, BIT_11);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0A42);
-                        rtl8168_set_eth_phy_bit(tp, 0x16, BIT_1);
-                }
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
-                rtl8168_set_eth_phy_bit( tp, 0x11, BIT_11 );
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                if (tp->RequireAdcBiasPatch) {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0BCF);
-                        rtl8168_mdio_write(tp, 0x16, tp->AdcBiasPatchIoffset);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                }
-
-                {
-                        u16 rlen;
-
-                        rtl8168_mdio_write(tp, 0x1F, 0x0BCD);
-                        gphy_val = rtl8168_mdio_read( tp, 0x16 );
-                        gphy_val &= 0x000F;
-
-                        if ( gphy_val > 3 ) {
-                                rlen = gphy_val - 3;
-                        } else {
-                                rlen = 0;
-                        }
-
-                        gphy_val = rlen | (rlen<<4) | (rlen<<8) | (rlen<<12);
-
-                        rtl8168_mdio_write(tp, 0x1F, 0x0BCD);
-                        rtl8168_mdio_write(tp, 0x17, gphy_val);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                }
-
-                if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                        rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                        rtl8168_mdio_write(tp, 0x13, 0x85FE);
-                        ClearAndSetEthPhyBit(
-                                tp,
-                                0x14,
-                                BIT_15|BIT_14|BIT_13|BIT_12|BIT_11|BIT_10|BIT_8,
-                                BIT_9);
-                        rtl8168_mdio_write(tp, 0x13, 0x85FF);
-                        ClearAndSetEthPhyBit(
-                                tp,
-                                0x14,
-                                BIT_15|BIT_14|BIT_13|BIT_12,
-                                BIT_11|BIT_10|BIT_9|BIT_8);
-                        rtl8168_mdio_write(tp, 0x13, 0x814B);
-                        ClearAndSetEthPhyBit(
-                                tp,
-                                0x14,
-                                BIT_15|BIT_14|BIT_13|BIT_11|BIT_10|BIT_9|BIT_8,
-                                BIT_12);
-                }
-
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0C41);
-                rtl8168_clear_eth_phy_bit(tp, 0x15, BIT_1);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_set_eth_phy_bit(tp, 0x10, BIT_0);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-
-                if (aspm) {
-                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                                rtl8168_set_eth_phy_bit( tp, 0x10, BIT_2 );
-                                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                        }
-                }
-        } else if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                   tp->mcfg == CFG_METHOD_33 ||  tp->mcfg == CFG_METHOD_34) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x808E);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xFF00 ,
-                                      0x4800
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x8090);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xFF00 ,
-                                      0xCC00
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x8092);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xFF00 ,
-                                      0xB000
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x8088);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xFF00 ,
-                                      0x6000
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x808B);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0x3F00 ,
-                                      0x0B00
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x808D);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0x1F00 ,
-                                      0x0600
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x808C);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xFF00 ,
-                                      0xB000
-                                    );
-
-                rtl8168_mdio_write(tp, 0x13, 0x80A0);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xFF00 ,
-                                      0x2800
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x80A2);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xFF00 ,
-                                      0x5000
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x809B);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xF800 ,
-                                      0xB000
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x809A);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xFF00 ,
-                                      0x4B00
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x809D);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0x3F00 ,
-                                      0x0800
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x80A1);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xFF00 ,
-                                      0x7000
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x809F);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0x1F00 ,
-                                      0x0300
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x809E);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xFF00 ,
-                                      0x8800
-                                    );
-
-                rtl8168_mdio_write(tp, 0x13, 0x80B2);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xFF00 ,
-                                      0x2200
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x80AD);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xF800 ,
-                                      0x9800
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x80AF);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0x3F00 ,
-                                      0x0800
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x80B3);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xFF00 ,
-                                      0x6F00
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x80B1);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0x1F00 ,
-                                      0x0300
-                                    );
-                rtl8168_mdio_write(tp, 0x13, 0x80B0);
-                ClearAndSetEthPhyBit( tp,
-                                      0x14,
-                                      0xFF00 ,
-                                      0x9300
-                                    );
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x8011);
-                rtl8168_clear_eth_phy_bit(tp, 0x14, BIT_11);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
-                rtl8168_set_eth_phy_bit(tp, 0x11, BIT_11);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x8016);
-                rtl8168_set_eth_phy_bit(tp, 0x14, BIT_10);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                if (aspm) {
-                        if (!HW_SUPP_SERDES_PHY(tp) &&
-                            HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                                rtl8168_set_eth_phy_bit( tp, 0x10, BIT_2 );
-                                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                        }
-                }
-        } else if (tp->mcfg == CFG_METHOD_35) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
-                rtl8168_set_eth_phy_bit(tp, 0x11, BIT_11);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A4C);
-                rtl8168_clear_eth_phy_bit(tp, 0x15, (BIT_14 | BIT_13));
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x81B9);
-                rtl8168_mdio_write(tp, 0x14, 0x2000);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x81D4);
-                ClearAndSetEthPhyBit(tp,
-                                     0x14,
-                                     0xFF00,
-                                     0x6600);
-                rtl8168_mdio_write(tp, 0x13, 0x81CB);
-                ClearAndSetEthPhyBit(tp,
-                                     0x14,
-                                     0xFF00,
-                                     0x3500);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A80);
-                ClearAndSetEthPhyBit(tp,
-                                     0x16,
-                                     0x000F,
-                                     0x0005);
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x8016);
-                rtl8168_set_eth_phy_bit(tp, 0x14, BIT_13);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x811E);
-                rtl8168_mdio_write(tp, 0x14, 0xDECA);
-
-                rtl8168_mdio_write(tp, 0x13, 0x811C);
-                rtl8168_mdio_write(tp, 0x14, 0x8008);
-                rtl8168_mdio_write(tp, 0x13, 0x8118);
-                rtl8168_mdio_write(tp, 0x14, 0xF8B4);
-                rtl8168_mdio_write(tp, 0x13, 0x811A);
-                rtl8168_mdio_write(tp, 0x14, 0x1A04);
-
-                rtl8168_mdio_write(tp, 0x13, 0x8134);
-                rtl8168_mdio_write(tp, 0x14, 0xDECA);
-                rtl8168_mdio_write(tp, 0x13, 0x8132);
-                rtl8168_mdio_write(tp, 0x14, 0xA008);
-                rtl8168_mdio_write(tp, 0x13, 0x812E);
-                rtl8168_mdio_write(tp, 0x14, 0x00B5);
-                rtl8168_mdio_write(tp, 0x13, 0x8130);
-                rtl8168_mdio_write(tp, 0x14, 0x1A04);
-
-                rtl8168_mdio_write(tp, 0x13, 0x8112);
-                ClearAndSetEthPhyBit(tp,
-                                     0x14,
-                                     0xFF00,
-                                     0x7300);
-                rtl8168_mdio_write(tp, 0x13, 0x8106);
-                rtl8168_mdio_write(tp, 0x14, 0xA209);
-                rtl8168_mdio_write(tp, 0x13, 0x8108);
-                rtl8168_mdio_write(tp, 0x14, 0x13B0);
-                rtl8168_mdio_write(tp, 0x13, 0x8103);
-                ClearAndSetEthPhyBit(tp,
-                                     0x14,
-                                     0xF800,
-                                     0xB800);
-                rtl8168_mdio_write(tp, 0x13, 0x8105);
-                ClearAndSetEthPhyBit(tp,
-                                     0x14,
-                                     0xFF00,
-                                     0x0A00);
-
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x87EB);
-                rtl8168_mdio_write(tp, 0x14, 0x0018);
-                rtl8168_mdio_write(tp, 0x13, 0x87EB);
-                rtl8168_mdio_write(tp, 0x14, 0x0018);
-                rtl8168_mdio_write(tp, 0x13, 0x87ED);
-                rtl8168_mdio_write(tp, 0x14, 0x0733);
-                rtl8168_mdio_write(tp, 0x13, 0x87EF);
-                rtl8168_mdio_write(tp, 0x14, 0x08DC);
-                rtl8168_mdio_write(tp, 0x13, 0x87F1);
-                rtl8168_mdio_write(tp, 0x14, 0x08DF);
-                rtl8168_mdio_write(tp, 0x13, 0x87F3);
-                rtl8168_mdio_write(tp, 0x14, 0x0C79);
-                rtl8168_mdio_write(tp, 0x13, 0x87F5);
-                rtl8168_mdio_write(tp, 0x14, 0x0D93);
-                rtl8168_mdio_write(tp, 0x13, 0x87F9);
-                rtl8168_mdio_write(tp, 0x14, 0x0010);
-                rtl8168_mdio_write(tp, 0x13, 0x87FB);
-                rtl8168_mdio_write(tp, 0x14, 0x0800);
-                rtl8168_mdio_write(tp, 0x13, 0x8015);
-                ClearAndSetEthPhyBit(tp,
-                                     0x14,
-                                     0x7000,
-                                     0x7000);
-
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                rtl8168_mdio_write(tp, 0x13, 0x8111);
-                ClearAndSetEthPhyBit(tp,
-                                     0x14,
-                                     0xFF00,
-                                     0x7C00);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                if (aspm) {
-                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                                rtl8168_set_eth_phy_bit( tp, 0x10, BIT_2 );
-                                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                        }
-                }
-        } else if (tp->mcfg == CFG_METHOD_36) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
-                rtl8168_set_eth_phy_bit(tp, 0x11, BIT_11);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0C41);
-                rtl8168_clear_eth_phy_bit(tp, 0x15, BIT_1);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-
-                if (aspm) {
-                        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                                rtl8168_mdio_write(tp, 0x1F, 0x0A43);
-                                rtl8168_set_eth_phy_bit( tp, 0x10, BIT_2 );
-                                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                        }
-                }
-        }
-
-#ifdef ENABLE_FIBER_SUPPORT
-        if (HW_FIBER_MODE_ENABLED(tp))
-                rtl8168_hw_fiber_phy_config(tp);
-#endif //ENABLE_FIBER_SUPPORT
-
-        //EthPhyPPSW
-        if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
-            tp->mcfg == CFG_METHOD_24 || tp->mcfg == CFG_METHOD_25 ||
-            tp->mcfg == CFG_METHOD_26) {
-                //disable EthPhyPPSW
-                rtl8168_mdio_write(tp, 0x1F, 0x0BCD);
-                rtl8168_mdio_write(tp, 0x14, 0x5065);
-                rtl8168_mdio_write(tp, 0x14, 0xD065);
-                rtl8168_mdio_write(tp, 0x1F, 0x0BC8);
-                rtl8168_mdio_write(tp, 0x11, 0x5655);
-                rtl8168_mdio_write(tp, 0x1F, 0x0BCD);
-                rtl8168_mdio_write(tp, 0x14, 0x1065);
-                rtl8168_mdio_write(tp, 0x14, 0x9065);
-                rtl8168_mdio_write(tp, 0x14, 0x1065);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-                   tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                   tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
-                   tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36) {
-                //enable EthPhyPPSW
-                rtl8168_mdio_write(tp, 0x1F, 0x0A44);
-                rtl8168_set_eth_phy_bit( tp, 0x11, BIT_7 );
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        }
-
-        /*ocp phy power saving*/
-        if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
-            tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 ||
-            tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-            tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34 ||
-            tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
-            tp->mcfg == CFG_METHOD_37) {
-                if (aspm)
-                        rtl8168_enable_ocp_phy_power_saving(dev);
-        }
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-        if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) {
-                if (tp->eee.eee_enabled)
-                        rtl8168_enable_eee(tp);
-                else
-                        rtl8168_disable_eee(tp);
-        }
-}
-
-/*
-static inline void rtl8168_delete_esd_timer(struct net_device *dev, struct timer_list *timer)
-{
-        del_timer_sync(timer);
-}
-
-static inline void rtl8168_request_esd_timer(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        struct timer_list *timer = &tp->esd_timer;
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
-        setup_timer(timer, rtl8168_esd_timer, (unsigned long)dev);
-#else
-        timer_setup(timer, rtl8168_esd_timer, 0);
-#endif
-        mod_timer(timer, jiffies + RTL8168_ESD_TIMEOUT);
-}
-
-static inline void rtl8168_delete_link_timer(struct net_device *dev, struct timer_list *timer)
-{
-        del_timer_sync(timer);
-}
-
-static inline void rtl8168_request_link_timer(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        struct timer_list *timer = &tp->link_timer;
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
-        setup_timer(timer, rtl8168_link_timer, (unsigned long)dev);
-#else
-        timer_setup(timer, rtl8168_link_timer, 0);
-#endif
-        mod_timer(timer, jiffies + RTL8168_LINK_TIMEOUT);
-}
-*/
-
-#ifdef CONFIG_NET_POLL_CONTROLLER
-/*
- * Polling 'interrupt' - used by things like netconsole to send skbs
- * without having to re-enable interrupts. It's not called while
- * the interrupt routine is executing.
- */
-static void
-rtl8168_netpoll(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int i;
-        for (i = 0; i < tp->irq_nvecs; i++) {
-                struct r8168_irq *irq = &tp->irq_tbl[i];
-                struct r8168_napi *r8168napi = &tp->r8168napi[i];
-
-                disable_irq(irq->vector);
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0)
-                irq->handler(irq->vector, r8168napi);
-#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
-                irq->handler(irq->vector, r8168napi, NULL);
-#else
-                irq->handler(irq->vector, r8168napi);
-#endif
-                enable_irq(irq->vector);
-        }
-}
-
-#endif //CONFIG_NET_POLL_CONTROLLER
-
-static void
-rtl8168_get_bios_setting(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_9:
-        case CFG_METHOD_10:
-        case CFG_METHOD_11:
-        case CFG_METHOD_12:
-        case CFG_METHOD_13:
-        case CFG_METHOD_14:
-        case CFG_METHOD_15:
-        case CFG_METHOD_16:
-        case CFG_METHOD_17:
-        case CFG_METHOD_18:
-        case CFG_METHOD_19:
-        case CFG_METHOD_20:
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                tp->bios_setting = RTL_R32(tp, 0x8c);
-                break;
-        }
-}
-
-static void
-rtl8168_set_bios_setting(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_9:
-        case CFG_METHOD_10:
-        case CFG_METHOD_11:
-        case CFG_METHOD_12:
-        case CFG_METHOD_13:
-        case CFG_METHOD_14:
-        case CFG_METHOD_15:
-        case CFG_METHOD_16:
-        case CFG_METHOD_17:
-        case CFG_METHOD_18:
-        case CFG_METHOD_19:
-        case CFG_METHOD_20:
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                RTL_W32(tp, 0x8C, tp->bios_setting);
-                break;
-        }
-}
-
-static void
-rtl8168_setup_mqs_reg(struct rtl8168_private *tp)
-{
-        //tx
-        tp->tx_ring[0].tdsar_reg = TxDescStartAddrLow;
-        tp->tx_ring[1].tdsar_reg = TxHDescStartAddrLow;
-
-        tp->isr_reg[0] = IntrStatus;
-        tp->isr_reg[1] = IntrStatus1;
-        tp->isr_reg[2] = IntrStatus2;
-        tp->isr_reg[3] = IntrStatus3;
-
-        tp->imr_reg[0] = IntrMask;
-        tp->imr_reg[1] = IntrMask1;
-        tp->imr_reg[2] = IntrMask2;
-        tp->imr_reg[3] = IntrMask3;
-}
-
-static void
-rtl8168_init_software_variable(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        struct pci_dev *pdev = tp->pci_dev;
-
-        rtl8168_get_bios_setting(dev);
-
-#ifdef ENABLE_LIB_SUPPORT
-        tp->ring_lib_enabled = 1;
-#endif
-
-        if (tp->mcfg == CFG_METHOD_DEFAULT)
-                disable_wol_support = 1;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_11:
-        case CFG_METHOD_12:
-        case CFG_METHOD_13:
-                tp->HwSuppDashVer = 1;
-                break;
-        case CFG_METHOD_23:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-                tp->HwSuppDashVer = 2;
-                break;
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-                tp->HwSuppDashVer = 3;
-                break;
-        default:
-                tp->HwSuppDashVer = 0;
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-                tp->HwPkgDet = rtl8168_mac_ocp_read(tp, 0xDC00);
-                tp->HwPkgDet = (tp->HwPkgDet >> 3) & 0x0F;
-                break;
-        }
-
-        if (HW_SUPP_SERDES_PHY(tp))
-                eee_enable = 0;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                tp->HwSuppNowIsOobVer = 1;
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                tp->HwSuppPhyOcpVer = 1;
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-                tp->HwSuppUpsVer = 1;
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-                tp->HwPcieSNOffset = 0x16C;
-                break;
-        case CFG_METHOD_DEFAULT:
-                tp->HwPcieSNOffset = 0;
-                break;
-        default:
-                tp->HwPcieSNOffset = 0x164;
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_14:
-        case CFG_METHOD_15:
-        case CFG_METHOD_16:
-        case CFG_METHOD_17:
-        case CFG_METHOD_18:
-        case CFG_METHOD_19:
-        case CFG_METHOD_20:
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                tp->HwSuppAspmClkIntrLock = 1;
-                break;
-        }
-
-        if (!aspm || !tp->HwSuppAspmClkIntrLock)
-                dynamic_aspm = 0;
-
-#ifdef ENABLE_REALWOW_SUPPORT
-        rtl8168_get_realwow_hw_version(dev);
-#endif //ENABLE_REALWOW_SUPPORT
-
-        if (HW_DASH_SUPPORT_DASH(tp) && rtl8168_check_dash(tp))
-                tp->DASH = 1;
-        else
-                tp->DASH = 0;
-
-        if (tp->DASH) {
-                if (HW_DASH_SUPPORT_TYPE_3(tp)) {
-                        u64 CmacMemPhysAddress;
-                        void __iomem *cmac_ioaddr = NULL;
-                        struct pci_dev *pdev_cmac;
-                        int ret;
-
-                        pdev_cmac = pci_get_slot(pdev->bus, PCI_DEVFN(PCI_SLOT(pdev->devfn), 0));
-                        ret = pci_enable_device(pdev_cmac);
-                        if (ret < 0) {
-                                dev_err(&pdev_cmac->dev, "eable device fail %d\n", ret);
-                                goto err1;
-                        }
-
-                        ret = pci_request_regions(pdev_cmac, MODULENAME);
-                        if (ret < 0) {
-                                dev_err(&pdev_cmac->dev, "could not request regions %d\n", ret);
-                                goto err2;
-                        }
-
-                        //map CMAC IO space
-                        CmacMemPhysAddress = pci_resource_start(pdev_cmac, 2);
-
-                        /* ioremap MMIO region */
-                        cmac_ioaddr = ioremap(CmacMemPhysAddress, R8168_REGS_SIZE);
-
-                        if (cmac_ioaddr == NULL) {
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-                                if (netif_msg_probe(tp))
-                                        dev_err(&pdev->dev, "cannot remap CMAC MMIO, aborting\n");
-#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-                                pci_release_regions(pdev_cmac);
-err2:
-                                pci_disable_device(pdev_cmac);
-err1:
-                                tp->DASH = 0;
-                        } else {
-                                pci_set_master(pdev_cmac);
-                                tp->cmac_ioaddr = cmac_ioaddr;
-                                tp->pdev_cmac = pdev_cmac;
-                        }
-                }
-
-                eee_enable = 0;
-        }
-
-#ifdef ENABLE_DASH_SUPPORT
-#ifdef ENABLE_DASH_PRINTER_SUPPORT
-        if (tp->DASH) {
-                if (HW_DASH_SUPPORT_TYPE_3(tp) && tp->HwPkgDet == 0x0F)
-                        tp->dash_printer_enabled = 1;
-                else if (HW_DASH_SUPPORT_TYPE_2(tp))
-                        tp->dash_printer_enabled = 1;
-        }
-#endif //ENABLE_DASH_PRINTER_SUPPORT
-#endif //ENABLE_DASH_SUPPORT
-
-        if (HW_DASH_SUPPORT_TYPE_2(tp))
-                tp->cmac_ioaddr = tp->mmio_addr;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_1:
-                tp->intr_mask = RxDescUnavail | RxFIFOOver | TxDescUnavail | TxOK | RxOK | SWInt;
-                tp->timer_intr_mask = PCSTimeout | RxFIFOOver;
-                break;
-        case CFG_METHOD_2:
-        case CFG_METHOD_3:
-        case CFG_METHOD_4:
-                tp->intr_mask = RxDescUnavail | TxDescUnavail | TxOK | RxOK | SWInt;
-                tp->timer_intr_mask = PCSTimeout;
-                break;
-        default:
-                tp->intr_mask = RxDescUnavail | TxOK | RxOK | SWInt;
-                tp->timer_intr_mask = PCSTimeout;
-                break;
-        }
-
-#ifdef ENABLE_DASH_SUPPORT
-        if (tp->DASH) {
-                if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                        tp->timer_intr_mask |= ( ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET);
-                        tp->intr_mask |= ( ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET);
-                } else {
-                        tp->timer_intr_mask |= ( ISRIMR_DP_DASH_OK | ISRIMR_DP_HOST_OK | ISRIMR_DP_REQSYS_OK );
-                        tp->intr_mask |= ( ISRIMR_DP_DASH_OK | ISRIMR_DP_HOST_OK | ISRIMR_DP_REQSYS_OK );
-                }
-        }
-#endif
-        if (aspm) {
-                switch (tp->mcfg) {
-                case CFG_METHOD_21:
-                case CFG_METHOD_22:
-                case CFG_METHOD_23:
-                case CFG_METHOD_24:
-                case CFG_METHOD_25:
-                case CFG_METHOD_26:
-                case CFG_METHOD_27:
-                case CFG_METHOD_28:
-                case CFG_METHOD_29:
-                case CFG_METHOD_30:
-                case CFG_METHOD_31:
-                case CFG_METHOD_32:
-                case CFG_METHOD_33:
-                case CFG_METHOD_34:
-                case CFG_METHOD_35:
-                case CFG_METHOD_36:
-                case CFG_METHOD_37:
-                        tp->org_pci_offset_99 = rtl8168_csi_fun0_read_byte(tp, 0x99);
-                        tp->org_pci_offset_99 &= ~(BIT_5|BIT_6);
-                        break;
-                }
-                switch (tp->mcfg) {
-                case CFG_METHOD_24:
-                case CFG_METHOD_25:
-                case CFG_METHOD_26:
-                case CFG_METHOD_27:
-                case CFG_METHOD_28:
-                case CFG_METHOD_29:
-                case CFG_METHOD_30:
-                case CFG_METHOD_35:
-                case CFG_METHOD_36:
-                case CFG_METHOD_37:
-                        tp->org_pci_offset_180 = rtl8168_csi_fun0_read_byte(tp, 0x180);
-                        break;
-                case CFG_METHOD_31:
-                case CFG_METHOD_32:
-                case CFG_METHOD_33:
-                case CFG_METHOD_34:
-                        tp->org_pci_offset_180 = rtl8168_csi_fun0_read_byte(tp, 0x214);
-                        break;
-                }
-
-                switch (tp->mcfg) {
-                case CFG_METHOD_21:
-                case CFG_METHOD_22:
-                case CFG_METHOD_23:
-                case CFG_METHOD_24:
-                case CFG_METHOD_25:
-                case CFG_METHOD_27:
-                case CFG_METHOD_28:
-                case CFG_METHOD_31:
-                case CFG_METHOD_32:
-                case CFG_METHOD_33:
-                case CFG_METHOD_34:
-                        if (tp->org_pci_offset_99 & BIT_2)
-                                tp->issue_offset_99_event = TRUE;
-                        break;
-                }
-        }
-
-        pci_read_config_byte(pdev, 0x80, &tp->org_pci_offset_80);
-        pci_read_config_byte(pdev, 0x81, &tp->org_pci_offset_81);
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_16:
-        case CFG_METHOD_17:
-        case CFG_METHOD_18:
-        case CFG_METHOD_19:
-        case CFG_METHOD_20:
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-                if ((tp->features & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX)) &&
-                    (tp->org_pci_offset_80 & BIT_1))
-                        tp->use_timer_interrrupt = FALSE;
-                else
-                        tp->use_timer_interrrupt = TRUE;
-                break;
-        default:
-                tp->use_timer_interrrupt = TRUE;
-                break;
-        }
-
-        if (timer_count == 0 || tp->mcfg == CFG_METHOD_DEFAULT ||
-            (tp->features & RTL_FEATURE_MSIX))
-                tp->use_timer_interrrupt = FALSE;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_1:
-        case CFG_METHOD_2:
-        case CFG_METHOD_3:
-                tp->ShortPacketSwChecksum = TRUE;
-                break;
-        case CFG_METHOD_16:
-        case CFG_METHOD_17:
-                tp->ShortPacketSwChecksum = TRUE;
-                tp->UseSwPaddingShortPkt = TRUE;
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_30:
-        case CFG_METHOD_37: {
-                u16 ioffset_p3, ioffset_p2, ioffset_p1, ioffset_p0;
-                u16 TmpUshort;
-
-                rtl8168_mac_ocp_write( tp, 0xDD02, 0x807D);
-                TmpUshort = rtl8168_mac_ocp_read( tp, 0xDD02 );
-                ioffset_p3 = ( (TmpUshort & BIT_7) >>7 );
-                ioffset_p3 <<= 3;
-                TmpUshort = rtl8168_mac_ocp_read( tp, 0xDD00 );
-
-                ioffset_p3 |= ((TmpUshort & (BIT_15 | BIT_14 | BIT_13))>>13);
-
-                ioffset_p2 = ((TmpUshort & (BIT_12|BIT_11|BIT_10|BIT_9))>>9);
-                ioffset_p1 = ((TmpUshort & (BIT_8|BIT_7|BIT_6|BIT_5))>>5);
-
-                ioffset_p0 = ( (TmpUshort & BIT_4) >>4 );
-                ioffset_p0 <<= 3;
-                ioffset_p0 |= (TmpUshort & (BIT_2| BIT_1 | BIT_0));
-
-                if ((ioffset_p3 == 0x0F) && (ioffset_p2 == 0x0F) && (ioffset_p1 == 0x0F) && (ioffset_p0 == 0x0F)) {
-                        tp->RequireAdcBiasPatch = FALSE;
-                } else {
-                        tp->RequireAdcBiasPatch = TRUE;
-                        tp->AdcBiasPatchIoffset = (ioffset_p3<<12)|(ioffset_p2<<8)|(ioffset_p1<<4)|(ioffset_p0);
-                }
-        }
-        break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37: {
-                u16 rg_saw_cnt;
-
-                rtl8168_mdio_write(tp, 0x1F, 0x0C42);
-                rg_saw_cnt = rtl8168_mdio_read(tp, 0x13);
-                rg_saw_cnt &= ~(BIT_15|BIT_14);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                if (rg_saw_cnt > 0) {
-                        tp->SwrCnt1msIni = 16000000/rg_saw_cnt;
-                        tp->SwrCnt1msIni &= 0x0FFF;
-
-                        tp->RequireAdjustUpsTxLinkPulseTiming = TRUE;
-                }
-        }
-        break;
-        }
-
-#ifdef ENABLE_FIBER_SUPPORT
-        rtl8168_check_hw_fiber_mode_support(tp);
-#endif //ENABLE_FIBER_SUPPORT
-
-        switch(tp->mcfg) {
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-                if (tp->HwPkgDet == 0x06) {
-                        u8 tmpUchar = rtl8168_eri_read(tp, 0xE6, 1, ERIAR_ExGMAC);
-                        if (tmpUchar == 0x02)
-                                tp->HwSuppSerDesPhyVer = 1;
-                        else if (tmpUchar == 0x00)
-                                tp->HwSuppSerDesPhyVer = 2;
-                }
-                break;
-        }
-
-        if (pdev->subsystem_vendor == 0x144d) {
-                if (pdev->subsystem_device == 0xc098 ||
-                    pdev->subsystem_device == 0xc0b1 ||
-                    pdev->subsystem_device == 0xc0b8)
-                        hwoptimize |= HW_PATCH_SAMSUNG_LAN_DONGLE;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_18:
-        case CFG_METHOD_19:
-                if (pdev->subsystem_vendor == 0x13fe) {
-                        if (pdev->subsystem_device == 0x00ec)
-                                hwoptimize |= HW_PATCH_SAMSUNG_LAN_DONGLE;
-                }
-                break;
-        }
-
-#ifdef CONFIG_CTAP_SHORT_OFF
-        hwoptimize |= HW_PATCH_SAMSUNG_LAN_DONGLE;
-#endif //CONFIG_CTAP_SHORT_OFF
-
-        if (hwoptimize & HW_PATCH_SAMSUNG_LAN_DONGLE) {
-                switch (tp->mcfg) {
-                case CFG_METHOD_14:
-                case CFG_METHOD_15:
-                case CFG_METHOD_16:
-                case CFG_METHOD_17:
-                case CFG_METHOD_18:
-                case CFG_METHOD_19:
-                case CFG_METHOD_20:
-                case CFG_METHOD_30:
-                case CFG_METHOD_37:
-                        tp->RequiredSecLanDonglePatch = TRUE;
-                        break;
-                }
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_16:
-        case CFG_METHOD_17:
-        case CFG_METHOD_18:
-        case CFG_METHOD_19:
-        case CFG_METHOD_20:
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                tp->HwSuppMagicPktVer = WAKEUP_MAGIC_PACKET_V2;
-                break;
-        case CFG_METHOD_DEFAULT:
-                tp->HwSuppMagicPktVer = WAKEUP_MAGIC_PACKET_NOT_SUPPORT;
-                break;
-        default:
-                tp->HwSuppMagicPktVer = WAKEUP_MAGIC_PACKET_V1;
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-                tp->HwSuppEsdVer = 2;
-                break;
-        case CFG_METHOD_35:
-                tp->HwSuppEsdVer = 3;
-                break;
-        default:
-                tp->HwSuppEsdVer = 1;
-                break;
-        }
-
-        if (tp->HwSuppEsdVer == 2 ||
-            tp->HwSuppEsdVer == 3) {
-                rtl8168_mdio_write(tp, 0x1F, 0x0A46);
-                tp->BackupPhyFuseDout_15_0 = rtl8168_mdio_read(tp, 0x10);
-                tp->BackupPhyFuseDout_31_16 = rtl8168_mdio_read(tp, 0x11);
-                tp->BackupPhyFuseDout_47_32 = rtl8168_mdio_read(tp, 0x12);
-                tp->BackupPhyFuseDout_63_48 = rtl8168_mdio_read(tp, 0x13);
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-
-                tp->TestPhyOcpReg = TRUE;
-#ifdef ENABLE_USE_FIRMWARE_FILE
-                if (tp->HwSuppEsdVer == 3)
-                        tp->TestPhyOcpReg = FALSE;
-#endif
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_16:
-        case CFG_METHOD_17:
-                tp->HwSuppCheckPhyDisableModeVer = 1;
-                break;
-        case CFG_METHOD_18:
-        case CFG_METHOD_19:
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                tp->HwSuppCheckPhyDisableModeVer = 2;
-                break;
-        case CFG_METHOD_23:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-                tp->HwSuppCheckPhyDisableModeVer = 3;
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_14:
-        case CFG_METHOD_15:
-                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_14;
-                break;
-        case CFG_METHOD_16:
-        case CFG_METHOD_17:
-                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_16;
-                break;
-        case CFG_METHOD_18:
-        case CFG_METHOD_19:
-                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_18;
-                break;
-        case CFG_METHOD_20:
-                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_20;
-                break;
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_21;
-                break;
-        case CFG_METHOD_23:
-        case CFG_METHOD_27:
-                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_23;
-                break;
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_24;
-                break;
-        case CFG_METHOD_26:
-                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_26;
-                break;
-        case CFG_METHOD_28:
-                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_28;
-                break;
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_37:
-                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_29;
-                break;
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_31;
-                break;
-        case CFG_METHOD_35:
-                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_35;
-                break;
-        case CFG_METHOD_36:
-                tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_36;
-                break;
-        }
-
-        if (tp->HwIcVerUnknown) {
-                tp->NotWrRamCodeToMicroP = TRUE;
-                tp->NotWrMcuPatchCode = TRUE;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_16 ... CFG_METHOD_37:
-                tp->HwSuppRxDescType = RX_DESC_RING_TYPE_2;
-                break;
-        default:
-                tp->HwSuppRxDescType = RX_DESC_RING_TYPE_1;
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                tp->HwSuppNumTxQueues = 2;
-                tp->HwSuppNumRxQueues = 4;
-                break;
-        default:
-                tp->HwSuppNumTxQueues = 1;
-                tp->HwSuppNumRxQueues = 1;
-                break;
-        }
-
-        tp->num_tx_rings = 1;
-#ifdef ENABLE_MULTIPLE_TX_QUEUE
-#ifndef ENABLE_LIB_SUPPORT
-        tp->num_tx_rings = tp->HwSuppNumTxQueues;
-#endif
-#endif
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                tp->HwSuppRssVer = 2;
-                tp->HwSuppIndirTblEntries = RTL8168_MAX_INDIRECTION_TABLE_ENTRIES;
-                break;
-        }
-
-        tp->num_rx_rings = 1;
-#ifdef ENABLE_RSS_SUPPORT
-        if (HW_RSS_SUPPORT_RSS(tp)) {
-#ifdef ENABLE_LIB_SUPPORT
-                tp->EnableRss = 1;
-#else
-                u8 rss_queue_num = netif_get_num_default_rss_queues();
-                tp->num_rx_rings = (tp->HwSuppNumRxQueues > rss_queue_num)?
-                                   rss_queue_num : tp->HwSuppNumRxQueues;
-                if (tp->num_rx_rings >= 2)
-                        tp->EnableRss = 1;
-#endif
-        }
-#endif
-        if (!tp->EnableRss || tp->num_rx_rings < 1)
-                tp->num_rx_rings = 1;
-
-#ifdef ENABLE_LIB_SUPPORT
-        tp->num_hw_tot_en_rx_rings = 2;
-#else
-        tp->num_hw_tot_en_rx_rings = tp->num_rx_rings;
-#endif //ENABLE_LIB_SUPPORT
-
-        rtl8168_setup_mqs_reg(tp);
-
-        rtl8168_set_ring_size(tp, NUM_RX_DESC, NUM_TX_DESC);
-
-        tp->InitRxDescType = RX_DESC_RING_TYPE_1;
-        if (tp->EnableRss)
-                tp->InitRxDescType = RX_DESC_RING_TYPE_2;
-
-        tp->RxDescLength = RX_DESC_LEN_TYPE_1;
-        if (tp->InitRxDescType == RX_DESC_RING_TYPE_2)
-                tp->RxDescLength = RX_DESC_LEN_TYPE_2;
-
-        tp->NicCustLedValue = RTL_R16(tp, CustomLED);
-
-        rtl8168_get_hw_wol(dev);
-
-        rtl8168_link_option((u8*)&autoneg_mode, (u32*)&speed_mode, (u8*)&duplex_mode, (u32*)&advertising_mode);
-
-        tp->autoneg = autoneg_mode;
-        tp->speed = speed_mode;
-        tp->duplex = duplex_mode;
-        tp->advertising = advertising_mode;
-        tp->fcpause = rtl8168_fc_full;
-
-        tp->max_jumbo_frame_size = rtl_chip_info[tp->chipset].jumbo_frame_sz;
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0)
-        /* MTU range: 60 - hw-specific max */
-        dev->min_mtu = ETH_MIN_MTU;
-        dev->max_mtu = tp->max_jumbo_frame_size;
-#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0)
-
-        if (rtl8168_support_eee(tp)) {
-                struct ethtool_eee *eee = &tp->eee;
-
-                eee->eee_enabled = eee_enable;
-                eee->supported  = SUPPORTED_100baseT_Full |
-                                  SUPPORTED_1000baseT_Full;
-                eee->advertised = mmd_eee_adv_to_ethtool_adv_t(MDIO_EEE_1000T | MDIO_EEE_100TX);
-                eee->tx_lpi_enabled = eee_enable;
-                eee->tx_lpi_timer = dev->mtu + ETH_HLEN + 0x20;
-        }
-
-#ifdef ENABLE_FIBER_SUPPORT
-        if (HW_FIBER_MODE_ENABLED(tp))
-                rtl8168_set_fiber_mode_software_variable(tp);
-#endif //ENABLE_FIBER_SUPPORT
-
-#ifdef ENABLE_RSS_SUPPORT
-        if (tp->EnableRss)
-                rtl8168_init_rss(tp);
-#endif
-}
-
-static void
-rtl8168_release_board(struct pci_dev *pdev,
-                      struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->mmio_addr;
-
-        rtl8168_set_bios_setting(dev);
-        rtl8168_rar_set(tp, tp->org_mac_addr);
-        tp->wol_enabled = WOL_DISABLED;
-
-        if (!tp->DASH)
-                rtl8168_phy_power_down(dev);
-
-#ifdef ENABLE_DASH_SUPPORT
-        if (tp->DASH)
-                FreeAllocatedDashShareMemory(dev);
-#endif
-
-        if (tp->pdev_cmac) {
-                iounmap(tp->cmac_ioaddr);
-                pci_clear_master(tp->pdev_cmac);
-                pci_release_regions(tp->pdev_cmac);
-                pci_disable_device(tp->pdev_cmac);
-                tp->pdev_cmac = NULL;
-        }
-
-        iounmap(ioaddr);
-        pci_release_regions(pdev);
-        pci_clear_mwi(pdev);
-        pci_disable_device(pdev);
-        free_netdev(dev);
-}
-
-static void
-rtl8168_hw_address_set(struct net_device *dev, u8 mac_addr[MAC_ADDR_LEN])
-{
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
-        eth_hw_addr_set(dev, mac_addr);
-#else
-        memcpy(dev->dev_addr, mac_addr, MAC_ADDR_LEN);
-#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0)
-}
-
-static int
-rtl8168_get_mac_address(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int i;
-        u8 mac_addr[MAC_ADDR_LEN];
-
-        for (i = 0; i < MAC_ADDR_LEN; i++)
-                mac_addr[i] = RTL_R8(tp, MAC0 + i);
-
-        if (tp->mcfg == CFG_METHOD_18 ||
-            tp->mcfg == CFG_METHOD_19 ||
-            tp->mcfg == CFG_METHOD_20 ||
-            tp->mcfg == CFG_METHOD_21 ||
-            tp->mcfg == CFG_METHOD_22 ||
-            tp->mcfg == CFG_METHOD_23 ||
-            tp->mcfg == CFG_METHOD_24 ||
-            tp->mcfg == CFG_METHOD_25 ||
-            tp->mcfg == CFG_METHOD_26 ||
-            tp->mcfg == CFG_METHOD_27 ||
-            tp->mcfg == CFG_METHOD_28 ||
-            tp->mcfg == CFG_METHOD_29 ||
-            tp->mcfg == CFG_METHOD_30 ||
-            tp->mcfg == CFG_METHOD_31 ||
-            tp->mcfg == CFG_METHOD_32 ||
-            tp->mcfg == CFG_METHOD_33 ||
-            tp->mcfg == CFG_METHOD_34 ||
-            tp->mcfg == CFG_METHOD_35 ||
-            tp->mcfg == CFG_METHOD_36 ||
-            tp->mcfg == CFG_METHOD_37) {
-                *(u32*)&mac_addr[0] = rtl8168_eri_read(tp, 0xE0, 4, ERIAR_ExGMAC);
-                *(u16*)&mac_addr[4] = rtl8168_eri_read(tp, 0xE4, 2, ERIAR_ExGMAC);
-        } else {
-                if (tp->eeprom_type != EEPROM_TYPE_NONE) {
-                        u16 *pUshort = (u16*)mac_addr;
-                        /* Get MAC address from EEPROM */
-                        if (tp->mcfg == CFG_METHOD_16 ||
-                            tp->mcfg == CFG_METHOD_17 ||
-                            tp->mcfg == CFG_METHOD_18 ||
-                            tp->mcfg == CFG_METHOD_19 ||
-                            tp->mcfg == CFG_METHOD_20 ||
-                            tp->mcfg == CFG_METHOD_21 ||
-                            tp->mcfg == CFG_METHOD_22 ||
-                            tp->mcfg == CFG_METHOD_23 ||
-                            tp->mcfg == CFG_METHOD_24 ||
-                            tp->mcfg == CFG_METHOD_25 ||
-                            tp->mcfg == CFG_METHOD_26 ||
-                            tp->mcfg == CFG_METHOD_27 ||
-                            tp->mcfg == CFG_METHOD_28 ||
-                            tp->mcfg == CFG_METHOD_29 ||
-                            tp->mcfg == CFG_METHOD_30 ||
-                            tp->mcfg == CFG_METHOD_31 ||
-                            tp->mcfg == CFG_METHOD_32 ||
-                            tp->mcfg == CFG_METHOD_33 ||
-                            tp->mcfg == CFG_METHOD_34 ||
-                            tp->mcfg == CFG_METHOD_35 ||
-                            tp->mcfg == CFG_METHOD_36 ||
-                            tp->mcfg == CFG_METHOD_37) {
-                                *pUshort++ = rtl8168_eeprom_read_sc(tp, 1);
-                                *pUshort++ = rtl8168_eeprom_read_sc(tp, 2);
-                                *pUshort = rtl8168_eeprom_read_sc(tp, 3);
-                        } else {
-                                *pUshort++ = rtl8168_eeprom_read_sc(tp, 7);
-                                *pUshort++ = rtl8168_eeprom_read_sc(tp, 8);
-                                *pUshort = rtl8168_eeprom_read_sc(tp, 9);
-                        }
-                }
-        }
-
-        if (!is_valid_ether_addr(mac_addr)) {
-                netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
-                          mac_addr);
-                eth_random_addr(mac_addr);
-                dev->addr_assign_type = NET_ADDR_RANDOM;
-                netif_info(tp, probe, dev, "Random ether addr %pM\n",
-                           mac_addr);
-                tp->random_mac = 1;
-        }
-
-        rtl8168_hw_address_set(dev, mac_addr);
-        rtl8168_rar_set(tp, mac_addr);
-
-        /* keep the original MAC address */
-        memcpy(tp->org_mac_addr, dev->dev_addr, MAC_ADDR_LEN);
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
-        memcpy(dev->perm_addr, dev->dev_addr, MAC_ADDR_LEN);
-#endif
-        return 0;
-}
-
-/**
- * rtl8168_set_mac_address - Change the Ethernet Address of the NIC
- * @dev: network interface device structure
- * @p:   pointer to an address structure
- *
- * Return 0 on success, negative on failure
- **/
-static int
-rtl8168_set_mac_address(struct net_device *dev,
-                        void *p)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        struct sockaddr *addr = p;
-
-        if (!is_valid_ether_addr(addr->sa_data))
-                return -EADDRNOTAVAIL;
-
-        rtl8168_hw_address_set(dev, addr->sa_data);
-
-        rtl8168_rar_set(tp, dev->dev_addr);
-
-        return 0;
-}
-
-/******************************************************************************
- * rtl8168_rar_set - Puts an ethernet address into a receive address register.
- *
- * tp - The private data structure for driver
- * addr - Address to put into receive address register
- *****************************************************************************/
-void
-rtl8168_rar_set(struct rtl8168_private *tp,
-                const u8 *addr)
-{
-        uint32_t rar_low = 0;
-        uint32_t rar_high = 0;
-
-        rar_low = ((uint32_t) addr[0] |
-                   ((uint32_t) addr[1] << 8) |
-                   ((uint32_t) addr[2] << 16) |
-                   ((uint32_t) addr[3] << 24));
-
-        rar_high = ((uint32_t) addr[4] |
-                    ((uint32_t) addr[5] << 8));
-
-        rtl8168_enable_cfg9346_write(tp);
-        RTL_W32(tp, MAC0, rar_low);
-        RTL_W32(tp, MAC4, rar_high);
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_14:
-        case CFG_METHOD_15:
-                RTL_W32(tp, SecMAC0, rar_low);
-                RTL_W16(tp, SecMAC4, (uint16_t)rar_high);
-                break;
-        }
-
-        if (tp->mcfg == CFG_METHOD_17) {
-                rtl8168_eri_write(tp, 0xf0, 4, rar_low << 16, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xf4, 4, rar_low >> 16 | rar_high << 16, ERIAR_ExGMAC);
-        }
-
-        rtl8168_disable_cfg9346_write(tp);
-}
-
-#ifdef ETHTOOL_OPS_COMPAT
-static int ethtool_get_settings(struct net_device *dev, void *useraddr)
-{
-        struct ethtool_cmd cmd = { ETHTOOL_GSET };
-        int err;
-
-        if (!ethtool_ops->get_settings)
-                return -EOPNOTSUPP;
-
-        err = ethtool_ops->get_settings(dev, &cmd);
-        if (err < 0)
-                return err;
-
-        if (copy_to_user(useraddr, &cmd, sizeof(cmd)))
-                return -EFAULT;
-        return 0;
-}
-
-static int ethtool_set_settings(struct net_device *dev, void *useraddr)
-{
-        struct ethtool_cmd cmd;
-
-        if (!ethtool_ops->set_settings)
-                return -EOPNOTSUPP;
-
-        if (copy_from_user(&cmd, useraddr, sizeof(cmd)))
-                return -EFAULT;
-
-        return ethtool_ops->set_settings(dev, &cmd);
-}
-
-static int ethtool_get_drvinfo(struct net_device *dev, void *useraddr)
-{
-        struct ethtool_drvinfo info;
-        struct ethtool_ops *ops = ethtool_ops;
-
-        if (!ops->get_drvinfo)
-                return -EOPNOTSUPP;
-
-        mem_clear(&info, sizeof(info));
-        info.cmd = ETHTOOL_GDRVINFO;
-        ops->get_drvinfo(dev, &info);
-
-        if (ops->self_test_count)
-                info.testinfo_len = ops->self_test_count(dev);
-        if (ops->get_stats_count)
-                info.n_stats = ops->get_stats_count(dev);
-        if (ops->get_regs_len)
-                info.regdump_len = ops->get_regs_len(dev);
-        if (ops->get_eeprom_len)
-                info.eedump_len = ops->get_eeprom_len(dev);
-
-        if (copy_to_user(useraddr, &info, sizeof(info)))
-                return -EFAULT;
-        return 0;
-}
-
-static int ethtool_get_regs(struct net_device *dev, char *useraddr)
-{
-        struct ethtool_regs regs;
-        struct ethtool_ops *ops = ethtool_ops;
-        void *regbuf;
-        int reglen, ret;
-
-        if (!ops->get_regs || !ops->get_regs_len)
-                return -EOPNOTSUPP;
-
-        if (copy_from_user(&regs, useraddr, sizeof(regs)))
-                return -EFAULT;
-
-        reglen = ops->get_regs_len(dev);
-        if (regs.len > reglen)
-                regs.len = reglen;
-
-        regbuf = kmalloc(reglen, GFP_USER);
-        if (!regbuf)
-                return -ENOMEM;
-
-        ops->get_regs(dev, &regs, regbuf);
-
-        ret = -EFAULT;
-        if (copy_to_user(useraddr, &regs, sizeof(regs)))
-                goto out;
-        useraddr += offsetof(struct ethtool_regs, data);
-        if (copy_to_user(useraddr, regbuf, reglen))
-                goto out;
-        ret = 0;
-
-out:
-        kfree(regbuf);
-        return ret;
-}
-
-static int ethtool_get_wol(struct net_device *dev, char *useraddr)
-{
-        struct ethtool_wolinfo wol = { ETHTOOL_GWOL };
-
-        if (!ethtool_ops->get_wol)
-                return -EOPNOTSUPP;
-
-        ethtool_ops->get_wol(dev, &wol);
-
-        if (copy_to_user(useraddr, &wol, sizeof(wol)))
-                return -EFAULT;
-        return 0;
-}
-
-static int ethtool_set_wol(struct net_device *dev, char *useraddr)
-{
-        struct ethtool_wolinfo wol;
-
-        if (!ethtool_ops->set_wol)
-                return -EOPNOTSUPP;
-
-        if (copy_from_user(&wol, useraddr, sizeof(wol)))
-                return -EFAULT;
-
-        return ethtool_ops->set_wol(dev, &wol);
-}
-
-static int ethtool_get_msglevel(struct net_device *dev, char *useraddr)
-{
-        struct ethtool_value edata = { ETHTOOL_GMSGLVL };
-
-        if (!ethtool_ops->get_msglevel)
-                return -EOPNOTSUPP;
-
-        edata.data = ethtool_ops->get_msglevel(dev);
-
-        if (copy_to_user(useraddr, &edata, sizeof(edata)))
-                return -EFAULT;
-        return 0;
-}
-
-static int ethtool_set_msglevel(struct net_device *dev, char *useraddr)
-{
-        struct ethtool_value edata;
-
-        if (!ethtool_ops->set_msglevel)
-                return -EOPNOTSUPP;
-
-        if (copy_from_user(&edata, useraddr, sizeof(edata)))
-                return -EFAULT;
-
-        ethtool_ops->set_msglevel(dev, edata.data);
-        return 0;
-}
-
-static int ethtool_nway_reset(struct net_device *dev)
-{
-        if (!ethtool_ops->nway_reset)
-                return -EOPNOTSUPP;
-
-        return ethtool_ops->nway_reset(dev);
-}
-
-static int ethtool_get_link(struct net_device *dev, void *useraddr)
-{
-        struct ethtool_value edata = { ETHTOOL_GLINK };
-
-        if (!ethtool_ops->get_link)
-                return -EOPNOTSUPP;
-
-        edata.data = ethtool_ops->get_link(dev);
-
-        if (copy_to_user(useraddr, &edata, sizeof(edata)))
-                return -EFAULT;
-        return 0;
-}
-
-static int ethtool_get_eeprom(struct net_device *dev, void *useraddr)
-{
-        struct ethtool_eeprom eeprom;
-        struct ethtool_ops *ops = ethtool_ops;
-        u8 *data;
-        int ret;
-
-        if (!ops->get_eeprom || !ops->get_eeprom_len)
-                return -EOPNOTSUPP;
-
-        if (copy_from_user(&eeprom, useraddr, sizeof(eeprom)))
-                return -EFAULT;
-
-        /* Check for wrap and zero */
-        if (eeprom.offset + eeprom.len <= eeprom.offset)
-                return -EINVAL;
-
-        /* Check for exceeding total eeprom len */
-        if (eeprom.offset + eeprom.len > ops->get_eeprom_len(dev))
-                return -EINVAL;
-
-        data = kmalloc(eeprom.len, GFP_USER);
-        if (!data)
-                return -ENOMEM;
-
-        ret = -EFAULT;
-        if (copy_from_user(data, useraddr + sizeof(eeprom), eeprom.len))
-                goto out;
-
-        ret = ops->get_eeprom(dev, &eeprom, data);
-        if (ret)
-                goto out;
-
-        ret = -EFAULT;
-        if (copy_to_user(useraddr, &eeprom, sizeof(eeprom)))
-                goto out;
-        if (copy_to_user(useraddr + sizeof(eeprom), data, eeprom.len))
-                goto out;
-        ret = 0;
-
-out:
-        kfree(data);
-        return ret;
-}
-
-static int ethtool_set_eeprom(struct net_device *dev, void *useraddr)
-{
-        struct ethtool_eeprom eeprom;
-        struct ethtool_ops *ops = ethtool_ops;
-        u8 *data;
-        int ret;
-
-        if (!ops->set_eeprom || !ops->get_eeprom_len)
-                return -EOPNOTSUPP;
-
-        if (copy_from_user(&eeprom, useraddr, sizeof(eeprom)))
-                return -EFAULT;
-
-        /* Check for wrap and zero */
-        if (eeprom.offset + eeprom.len <= eeprom.offset)
-                return -EINVAL;
-
-        /* Check for exceeding total eeprom len */
-        if (eeprom.offset + eeprom.len > ops->get_eeprom_len(dev))
-                return -EINVAL;
-
-        data = kmalloc(eeprom.len, GFP_USER);
-        if (!data)
-                return -ENOMEM;
-
-        ret = -EFAULT;
-        if (copy_from_user(data, useraddr + sizeof(eeprom), eeprom.len))
-                goto out;
-
-        ret = ops->set_eeprom(dev, &eeprom, data);
-        if (ret)
-                goto out;
-
-        if (copy_to_user(useraddr + sizeof(eeprom), data, eeprom.len))
-                ret = -EFAULT;
-
-out:
-        kfree(data);
-        return ret;
-}
-
-static int ethtool_get_coalesce(struct net_device *dev, void *useraddr)
-{
-        struct ethtool_coalesce coalesce = { ETHTOOL_GCOALESCE };
-
-        if (!ethtool_ops->get_coalesce)
-                return -EOPNOTSUPP;
-
-        ethtool_ops->get_coalesce(dev, &coalesce);
-
-        if (copy_to_user(useraddr, &coalesce, sizeof(coalesce)))
-                return -EFAULT;
-        return 0;
-}
-
-static int ethtool_set_coalesce(struct net_device *dev, void *useraddr)
-{
-        struct ethtool_coalesce coalesce;
-
-        if (!ethtool_ops->get_coalesce)
-                return -EOPNOTSUPP;
-
-        if (copy_from_user(&coalesce, useraddr, sizeof(coalesce)))
-                return -EFAULT;
-
-        return ethtool_ops->set_coalesce(dev, &coalesce);
-}
-
-static int ethtool_get_ringparam(struct net_device *dev, void *useraddr)
-{
-        struct ethtool_ringparam ringparam = { ETHTOOL_GRINGPARAM };
-
-        if (!ethtool_ops->get_ringparam)
-                return -EOPNOTSUPP;
-
-        ethtool_ops->get_ringparam(dev, &ringparam);
-
-        if (copy_to_user(useraddr, &ringparam, sizeof(ringparam)))
-                return -EFAULT;
-        return 0;
-}
-
-static int ethtool_set_ringparam(struct net_device *dev, void *useraddr)
-{
-        struct ethtool_ringparam ringparam;
-
-        if (!ethtool_ops->get_ringparam)
-                return -EOPNOTSUPP;
-
-        if (copy_from_user(&ringparam, useraddr, sizeof(ringparam)))
-                return -EFAULT;
-
-        return ethtool_ops->set_ringparam(dev, &ringparam);
-}
-
-static int ethtool_get_pauseparam(struct net_device *dev, void *useraddr)
-{
-        struct ethtool_pauseparam pauseparam = { ETHTOOL_GPAUSEPARAM };
-
-        if (!ethtool_ops->get_pauseparam)
-                return -EOPNOTSUPP;
-
-        ethtool_ops->get_pauseparam(dev, &pauseparam);
-
-        if (copy_to_user(useraddr, &pauseparam, sizeof(pauseparam)))
-                return -EFAULT;
-        return 0;
-}
-
-static int ethtool_set_pauseparam(struct net_device *dev, void *useraddr)
-{
-        struct ethtool_pauseparam pauseparam;
-
-        if (!ethtool_ops->get_pauseparam)
-                return -EOPNOTSUPP;
-
-        if (copy_from_user(&pauseparam, useraddr, sizeof(pauseparam)))
-                return -EFAULT;
-
-        return ethtool_ops->set_pauseparam(dev, &pauseparam);
-}
-
-static int ethtool_get_rx_csum(struct net_device *dev, char *useraddr)
-{
-        struct ethtool_value edata = { ETHTOOL_GRXCSUM };
-
-        if (!ethtool_ops->get_rx_csum)
-                return -EOPNOTSUPP;
-
-        edata.data = ethtool_ops->get_rx_csum(dev);
-
-        if (copy_to_user(useraddr, &edata, sizeof(edata)))
-                return -EFAULT;
-        return 0;
-}
-
-static int ethtool_set_rx_csum(struct net_device *dev, char *useraddr)
-{
-        struct ethtool_value edata;
-
-        if (!ethtool_ops->set_rx_csum)
-                return -EOPNOTSUPP;
-
-        if (copy_from_user(&edata, useraddr, sizeof(edata)))
-                return -EFAULT;
-
-        ethtool_ops->set_rx_csum(dev, edata.data);
-        return 0;
-}
-
-static int ethtool_get_tx_csum(struct net_device *dev, char *useraddr)
-{
-        struct ethtool_value edata = { ETHTOOL_GTXCSUM };
-
-        if (!ethtool_ops->get_tx_csum)
-                return -EOPNOTSUPP;
-
-        edata.data = ethtool_ops->get_tx_csum(dev);
-
-        if (copy_to_user(useraddr, &edata, sizeof(edata)))
-                return -EFAULT;
-        return 0;
-}
-
-static int ethtool_set_tx_csum(struct net_device *dev, char *useraddr)
-{
-        struct ethtool_value edata;
-
-        if (!ethtool_ops->set_tx_csum)
-                return -EOPNOTSUPP;
-
-        if (copy_from_user(&edata, useraddr, sizeof(edata)))
-                return -EFAULT;
-
-        return ethtool_ops->set_tx_csum(dev, edata.data);
-}
-
-static int ethtool_get_sg(struct net_device *dev, char *useraddr)
-{
-        struct ethtool_value edata = { ETHTOOL_GSG };
-
-        if (!ethtool_ops->get_sg)
-                return -EOPNOTSUPP;
-
-        edata.data = ethtool_ops->get_sg(dev);
-
-        if (copy_to_user(useraddr, &edata, sizeof(edata)))
-                return -EFAULT;
-        return 0;
-}
-
-static int ethtool_set_sg(struct net_device *dev, char *useraddr)
-{
-        struct ethtool_value edata;
-
-        if (!ethtool_ops->set_sg)
-                return -EOPNOTSUPP;
-
-        if (copy_from_user(&edata, useraddr, sizeof(edata)))
-                return -EFAULT;
-
-        return ethtool_ops->set_sg(dev, edata.data);
-}
-
-static int ethtool_get_tso(struct net_device *dev, char *useraddr)
-{
-        struct ethtool_value edata = { ETHTOOL_GTSO };
-
-        if (!ethtool_ops->get_tso)
-                return -EOPNOTSUPP;
-
-        edata.data = ethtool_ops->get_tso(dev);
-
-        if (copy_to_user(useraddr, &edata, sizeof(edata)))
-                return -EFAULT;
-        return 0;
-}
-
-static int ethtool_set_tso(struct net_device *dev, char *useraddr)
-{
-        struct ethtool_value edata;
-
-        if (!ethtool_ops->set_tso)
-                return -EOPNOTSUPP;
-
-        if (copy_from_user(&edata, useraddr, sizeof(edata)))
-                return -EFAULT;
-
-        return ethtool_ops->set_tso(dev, edata.data);
-}
-
-static int ethtool_self_test(struct net_device *dev, char *useraddr)
-{
-        struct ethtool_test test;
-        struct ethtool_ops *ops = ethtool_ops;
-        u64 *data;
-        int ret;
-
-        if (!ops->self_test || !ops->self_test_count)
-                return -EOPNOTSUPP;
-
-        if (copy_from_user(&test, useraddr, sizeof(test)))
-                return -EFAULT;
-
-        test.len = ops->self_test_count(dev);
-        data = kmalloc(test.len * sizeof(u64), GFP_USER);
-        if (!data)
-                return -ENOMEM;
-
-        ops->self_test(dev, &test, data);
-
-        ret = -EFAULT;
-        if (copy_to_user(useraddr, &test, sizeof(test)))
-                goto out;
-        useraddr += sizeof(test);
-        if (copy_to_user(useraddr, data, test.len * sizeof(u64)))
-                goto out;
-        ret = 0;
-
-out:
-        kfree(data);
-        return ret;
-}
-
-static int ethtool_get_strings(struct net_device *dev, void *useraddr)
-{
-        struct ethtool_gstrings gstrings;
-        struct ethtool_ops *ops = ethtool_ops;
-        u8 *data;
-        int ret;
-
-        if (!ops->get_strings)
-                return -EOPNOTSUPP;
-
-        if (copy_from_user(&gstrings, useraddr, sizeof(gstrings)))
-                return -EFAULT;
-
-        switch (gstrings.string_set) {
-        case ETH_SS_TEST:
-                if (!ops->self_test_count)
-                        return -EOPNOTSUPP;
-                gstrings.len = ops->self_test_count(dev);
-                break;
-        case ETH_SS_STATS:
-                if (!ops->get_stats_count)
-                        return -EOPNOTSUPP;
-                gstrings.len = ops->get_stats_count(dev);
-                break;
-        default:
-                return -EINVAL;
-        }
-
-        data = kmalloc(gstrings.len * ETH_GSTRING_LEN, GFP_USER);
-        if (!data)
-                return -ENOMEM;
-
-        ops->get_strings(dev, gstrings.string_set, data);
-
-        ret = -EFAULT;
-        if (copy_to_user(useraddr, &gstrings, sizeof(gstrings)))
-                goto out;
-        useraddr += sizeof(gstrings);
-        if (copy_to_user(useraddr, data, gstrings.len * ETH_GSTRING_LEN))
-                goto out;
-        ret = 0;
-
-out:
-        kfree(data);
-        return ret;
-}
-
-static int ethtool_phys_id(struct net_device *dev, void *useraddr)
-{
-        struct ethtool_value id;
-
-        if (!ethtool_ops->phys_id)
-                return -EOPNOTSUPP;
-
-        if (copy_from_user(&id, useraddr, sizeof(id)))
-                return -EFAULT;
-
-        return ethtool_ops->phys_id(dev, id.data);
-}
-
-static int ethtool_get_stats(struct net_device *dev, void *useraddr)
-{
-        struct ethtool_stats stats;
-        struct ethtool_ops *ops = ethtool_ops;
-        u64 *data;
-        int ret;
-
-        if (!ops->get_ethtool_stats || !ops->get_stats_count)
-                return -EOPNOTSUPP;
-
-        if (copy_from_user(&stats, useraddr, sizeof(stats)))
-                return -EFAULT;
-
-        stats.n_stats = ops->get_stats_count(dev);
-        data = kmalloc(stats.n_stats * sizeof(u64), GFP_USER);
-        if (!data)
-                return -ENOMEM;
-
-        ops->get_ethtool_stats(dev, &stats, data);
-
-        ret = -EFAULT;
-        if (copy_to_user(useraddr, &stats, sizeof(stats)))
-                goto out;
-        useraddr += sizeof(stats);
-        if (copy_to_user(useraddr, data, stats.n_stats * sizeof(u64)))
-                goto out;
-        ret = 0;
-
-out:
-        kfree(data);
-        return ret;
-}
-
-static int ethtool_ioctl(struct ifreq *ifr)
-{
-        struct net_device *dev = __dev_get_by_name(ifr->ifr_name);
-        void *useraddr = (void *) ifr->ifr_data;
-        u32 ethcmd;
-
-        /*
-         * XXX: This can be pushed down into the ethtool_* handlers that
-         * need it.  Keep existing behaviour for the moment.
-         */
-        if (!capable(CAP_NET_ADMIN))
-                return -EPERM;
-
-        if (!dev || !netif_device_present(dev))
-                return -ENODEV;
-
-        if (copy_from_user(&ethcmd, useraddr, sizeof (ethcmd)))
-                return -EFAULT;
-
-        switch (ethcmd) {
-        case ETHTOOL_GSET:
-                return ethtool_get_settings(dev, useraddr);
-        case ETHTOOL_SSET:
-                return ethtool_set_settings(dev, useraddr);
-        case ETHTOOL_GDRVINFO:
-                return ethtool_get_drvinfo(dev, useraddr);
-        case ETHTOOL_GREGS:
-                return ethtool_get_regs(dev, useraddr);
-        case ETHTOOL_GWOL:
-                return ethtool_get_wol(dev, useraddr);
-        case ETHTOOL_SWOL:
-                return ethtool_set_wol(dev, useraddr);
-        case ETHTOOL_GMSGLVL:
-                return ethtool_get_msglevel(dev, useraddr);
-        case ETHTOOL_SMSGLVL:
-                return ethtool_set_msglevel(dev, useraddr);
-        case ETHTOOL_NWAY_RST:
-                return ethtool_nway_reset(dev);
-        case ETHTOOL_GLINK:
-                return ethtool_get_link(dev, useraddr);
-        case ETHTOOL_GEEPROM:
-                return ethtool_get_eeprom(dev, useraddr);
-        case ETHTOOL_SEEPROM:
-                return ethtool_set_eeprom(dev, useraddr);
-        case ETHTOOL_GCOALESCE:
-                return ethtool_get_coalesce(dev, useraddr);
-        case ETHTOOL_SCOALESCE:
-                return ethtool_set_coalesce(dev, useraddr);
-        case ETHTOOL_GRINGPARAM:
-                return ethtool_get_ringparam(dev, useraddr);
-        case ETHTOOL_SRINGPARAM:
-                return ethtool_set_ringparam(dev, useraddr);
-        case ETHTOOL_GPAUSEPARAM:
-                return ethtool_get_pauseparam(dev, useraddr);
-        case ETHTOOL_SPAUSEPARAM:
-                return ethtool_set_pauseparam(dev, useraddr);
-        case ETHTOOL_GRXCSUM:
-                return ethtool_get_rx_csum(dev, useraddr);
-        case ETHTOOL_SRXCSUM:
-                return ethtool_set_rx_csum(dev, useraddr);
-        case ETHTOOL_GTXCSUM:
-                return ethtool_get_tx_csum(dev, useraddr);
-        case ETHTOOL_STXCSUM:
-                return ethtool_set_tx_csum(dev, useraddr);
-        case ETHTOOL_GSG:
-                return ethtool_get_sg(dev, useraddr);
-        case ETHTOOL_SSG:
-                return ethtool_set_sg(dev, useraddr);
-        case ETHTOOL_GTSO:
-                return ethtool_get_tso(dev, useraddr);
-        case ETHTOOL_STSO:
-                return ethtool_set_tso(dev, useraddr);
-        case ETHTOOL_TEST:
-                return ethtool_self_test(dev, useraddr);
-        case ETHTOOL_GSTRINGS:
-                return ethtool_get_strings(dev, useraddr);
-        case ETHTOOL_PHYS_ID:
-                return ethtool_phys_id(dev, useraddr);
-        case ETHTOOL_GSTATS:
-                return ethtool_get_stats(dev, useraddr);
-        default:
-                return -EOPNOTSUPP;
-        }
-
-        return -EOPNOTSUPP;
-}
-#endif //ETHTOOL_OPS_COMPAT
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)
-static int rtl8168_siocdevprivate(struct net_device *dev, struct ifreq *ifr,
-                                  void __user *data, int cmd)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int ret = 0;
-
-        switch (cmd) {
-        case SIOCDEVPRIVATE_RTLASF:
-                if (!netif_running(dev)) {
-                        ret = -ENODEV;
-                        break;
-                }
-
-                ret = rtl8168_asf_ioctl(dev, ifr);
-                break;
-
-#ifdef ENABLE_DASH_SUPPORT
-        case SIOCDEVPRIVATE_RTLDASH:
-                if (!netif_running(dev)) {
-                        ret = -ENODEV;
-                        break;
-                }
-
-                if (!capable(CAP_NET_ADMIN)) {
-                        ret = -EPERM;
-                        break;
-                }
-
-                ret = rtl8168_dash_ioctl(dev, ifr);
-                break;
-#endif
-
-#ifdef ENABLE_REALWOW_SUPPORT
-        case SIOCDEVPRIVATE_RTLREALWOW:
-                if (!netif_running(dev)) {
-                        ret = -ENODEV;
-                        break;
-                }
-
-                if (!capable(CAP_NET_ADMIN)) {
-                        ret = -EPERM;
-                        break;
-                }
-
-                ret = rtl8168_realwow_ioctl(dev, ifr);
-                break;
-#endif
-
-        case SIOCRTLTOOL:
-                if (!capable(CAP_NET_ADMIN)) {
-                        ret = -EPERM;
-                        break;
-                }
-
-                ret = rtl8168_tool_ioctl(tp, ifr);
-                break;
-
-        default:
-                ret = -EOPNOTSUPP;
-        }
-
-        return ret;
-}
-#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)
-
-static int
-rtl8168_do_ioctl(struct net_device *dev,
-                 struct ifreq *ifr,
-                 int cmd)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        struct mii_ioctl_data *data = if_mii(ifr);
-        int ret;
-
-        ret = 0;
-        switch (cmd) {
-        case SIOCGMIIPHY:
-                data->phy_id = 32; /* Internal PHY */
-                break;
-
-        case SIOCGMIIREG:
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                data->val_out = rtl8168_mdio_read(tp, data->reg_num);
-                break;
-
-        case SIOCSMIIREG:
-                if (!capable(CAP_NET_ADMIN))
-                        return -EPERM;
-                rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                rtl8168_mdio_write(tp, data->reg_num, data->val_in);
-                break;
-
-#ifdef ETHTOOL_OPS_COMPAT
-        case SIOCETHTOOL:
-                ret = ethtool_ioctl(ifr);
-                break;
-#endif
-        case SIOCDEVPRIVATE_RTLASF:
-                if (!netif_running(dev)) {
-                        ret = -ENODEV;
-                        break;
-                }
-
-                ret = rtl8168_asf_ioctl(dev, ifr);
-                break;
-
-#ifdef ENABLE_DASH_SUPPORT
-        case SIOCDEVPRIVATE_RTLDASH:
-                if (!netif_running(dev)) {
-                        ret = -ENODEV;
-                        break;
-                }
-                if (!capable(CAP_NET_ADMIN)) {
-                        ret = -EPERM;
-                        break;
-                }
-
-                ret = rtl8168_dash_ioctl(dev, ifr);
-                break;
-#endif
-
-#ifdef ENABLE_REALWOW_SUPPORT
-        case SIOCDEVPRIVATE_RTLREALWOW:
-                if (!netif_running(dev)) {
-                        ret = -ENODEV;
-                        break;
-                }
-
-                if (!capable(CAP_NET_ADMIN)) {
-                        ret = -EPERM;
-                        break;
-                }
-
-                ret = rtl8168_realwow_ioctl(dev, ifr);
-                break;
-#endif
-
-        case SIOCRTLTOOL:
-                if (!capable(CAP_NET_ADMIN)) {
-                        ret = -EPERM;
-                        break;
-                }
-
-                ret = rtl8168_tool_ioctl(tp, ifr);
-                break;
-
-        default:
-                ret = -EOPNOTSUPP;
-                break;
-        }
-
-        return ret;
-}
-
-static void
-rtl8168_phy_power_up(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        if (rtl8168_is_in_phy_disable_mode(dev))
-                return;
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        switch (tp->mcfg) {
-        case CFG_METHOD_1:
-        case CFG_METHOD_2:
-        case CFG_METHOD_3:
-        case CFG_METHOD_4:
-        case CFG_METHOD_5:
-        case CFG_METHOD_6:
-        case CFG_METHOD_7:
-        case CFG_METHOD_8:
-        case CFG_METHOD_9:
-        case CFG_METHOD_10:
-        case CFG_METHOD_11:
-        case CFG_METHOD_12:
-        case CFG_METHOD_13:
-                rtl8168_mdio_write(tp, 0x0E, 0x0000);
-                break;
-        }
-        rtl8168_mdio_write(tp, MII_BMCR, BMCR_ANENABLE);
-
-        //wait mdc/mdio ready
-        switch (tp->mcfg) {
-        case CFG_METHOD_23:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-                mdelay(10);
-                break;
-        }
-
-        //wait ups resume (phy state 3)
-        if (HW_SUPPORT_UPS_MODE(tp))
-                rtl8168_wait_phy_ups_resume(dev, HW_PHY_STATUS_LAN_ON);
-}
-
-static void
-rtl8168_phy_power_down(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u32 csi_tmp;
-
-#ifdef ENABLE_FIBER_SUPPORT
-        if (HW_FIBER_MODE_ENABLED(tp))
-                return;
-#endif //ENABLE_FIBER_SUPPORT
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-                csi_tmp = rtl8168_eri_read(tp, 0x1AB, 1, ERIAR_ExGMAC);
-                csi_tmp &= ~( BIT_2 | BIT_3 | BIT_4 | BIT_5 | BIT_6 | BIT_7 );
-                rtl8168_eri_write(tp, 0x1AB, 1, csi_tmp, ERIAR_ExGMAC);
-                break;
-        }
-
-        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-        switch (tp->mcfg) {
-        case CFG_METHOD_1:
-        case CFG_METHOD_2:
-        case CFG_METHOD_3:
-        case CFG_METHOD_4:
-        case CFG_METHOD_5:
-        case CFG_METHOD_6:
-        case CFG_METHOD_7:
-        case CFG_METHOD_8:
-        case CFG_METHOD_9:
-        case CFG_METHOD_10:
-        case CFG_METHOD_11:
-        case CFG_METHOD_12:
-        case CFG_METHOD_13:
-                rtl8168_mdio_write(tp, 0x0E, 0x0200);
-                rtl8168_mdio_write(tp, MII_BMCR, BMCR_PDOWN);
-                break;
-        case CFG_METHOD_14:
-        case CFG_METHOD_15:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                rtl8168_mdio_write(tp, MII_BMCR, BMCR_ANENABLE | BMCR_PDOWN);
-                break;
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-                rtl8168_mdio_write(tp, MII_BMCR, BMCR_ANENABLE | BMCR_PDOWN);
-                break;
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-                rtl8168_mdio_write(tp, MII_BMCR, BMCR_ANENABLE | BMCR_PDOWN);
-                break;
-        default:
-                rtl8168_mdio_write(tp, MII_BMCR, BMCR_PDOWN);
-                break;
-        }
-}
-
-static int __devinit
-rtl8168_init_board(struct pci_dev *pdev,
-                   struct net_device **dev_out,
-                   void __iomem **ioaddr_out)
-{
-        void __iomem *ioaddr;
-        struct net_device *dev;
-        struct rtl8168_private *tp;
-        int rc = -ENOMEM, i, pm_cap;
-
-        assert(ioaddr_out != NULL);
-
-        /* dev zeroed in alloc_etherdev */
-        dev = alloc_etherdev_mq(sizeof (*tp), R8168_MAX_QUEUES);
-        if (dev == NULL) {
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-                if (netif_msg_drv(&debug))
-                        dev_err(&pdev->dev, "unable to alloc new ethernet\n");
-#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-                goto err_out;
-        }
-
-        SET_MODULE_OWNER(dev);
-        SET_NETDEV_DEV(dev, &pdev->dev);
-        tp = netdev_priv(dev);
-        tp->dev = dev;
-        tp->pci_dev = pdev;
-        tp->msg_enable = netif_msg_init(debug.msg_enable, R8168_MSG_DEFAULT);
-
-        if (!aspm || tp->mcfg == CFG_METHOD_9) {
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)
-                pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
-                                       PCIE_LINK_STATE_CLKPM);
-#endif
-        }
-
-        /* enable device (incl. PCI PM wakeup and hotplug setup) */
-        rc = pci_enable_device(pdev);
-        if (rc < 0) {
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-                if (netif_msg_probe(tp))
-                        dev_err(&pdev->dev, "enable failure\n");
-#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-                goto err_out_free_dev;
-        }
-
-        if (pci_set_mwi(pdev) < 0) {
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-                if (netif_msg_drv(&debug))
-                        dev_info(&pdev->dev, "Mem-Wr-Inval unavailable.\n");
-#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-        }
-
-        /* save power state before pci_enable_device overwrites it */
-        pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
-        if (pm_cap) {
-                u16 pwr_command;
-
-                pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pwr_command);
-        } else {
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-                if (netif_msg_probe(tp)) {
-                        dev_err(&pdev->dev, "PowerManagement capability not found.\n");
-                }
-#else
-                printk("PowerManagement capability not found.\n");
-#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-
-        }
-
-        /* make sure PCI base addr 1 is MMIO */
-        if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-                if (netif_msg_probe(tp))
-                        dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n");
-#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-                rc = -ENODEV;
-                goto err_out_mwi;
-        }
-        /* check for weird/broken PCI region reporting */
-        if (pci_resource_len(pdev, 2) < R8168_REGS_SIZE) {
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-                if (netif_msg_probe(tp))
-                        dev_err(&pdev->dev, "Invalid PCI region size(s), aborting\n");
-#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-                rc = -ENODEV;
-                goto err_out_mwi;
-        }
-
-        rc = pci_request_regions(pdev, MODULENAME);
-        if (rc < 0) {
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-                if (netif_msg_probe(tp))
-                        dev_err(&pdev->dev, "could not request regions.\n");
-#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-                goto err_out_mwi;
-        }
-
-        if ((sizeof(dma_addr_t) > 4) &&
-            use_dac &&
-            !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
-            !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
-                dev->features |= NETIF_F_HIGHDMA;
-        } else {
-                rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
-                if (rc < 0) {
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-                        if (netif_msg_probe(tp))
-                                dev_err(&pdev->dev, "DMA configuration failed.\n");
-#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-                        goto err_out_free_res;
-                }
-        }
-
-        /* ioremap MMIO region */
-        ioaddr = ioremap(pci_resource_start(pdev, 2), R8168_REGS_SIZE);
-        if (ioaddr == NULL) {
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-                if (netif_msg_probe(tp))
-                        dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
-#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-                rc = -EIO;
-                goto err_out_free_res;
-        }
-
-        tp->mmio_addr = ioaddr;
-
-        /* Identify chip attached to board */
-        rtl8168_get_mac_version(tp);
-
-        rtl8168_print_mac_version(tp);
-
-        for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) {
-                if (tp->mcfg == rtl_chip_info[i].mcfg)
-                        break;
-        }
-
-        if (i < 0) {
-                /* Unknown chip: assume array element #0, original RTL-8168 */
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-                if (netif_msg_probe(tp))
-                        dev_printk(KERN_DEBUG, &pdev->dev, "unknown chip version, assuming %s\n", rtl_chip_info[0].name);
-#else
-                printk("Realtek unknown chip version, assuming %s\n", rtl_chip_info[0].name);
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
-                i++;
-        }
-
-        tp->chipset = i;
-
-        *ioaddr_out = ioaddr;
-        *dev_out = dev;
-out:
-        return rc;
-
-err_out_free_res:
-        pci_release_regions(pdev);
-err_out_mwi:
-        pci_clear_mwi(pdev);
-        pci_disable_device(pdev);
-err_out_free_dev:
-        free_netdev(dev);
-err_out:
-        *ioaddr_out = NULL;
-        *dev_out = NULL;
-        goto out;
-}
-
-static void
-rtl8168_esd_checker(struct rtl8168_private *tp)
-{
-        struct net_device *dev = tp->dev;
-        struct pci_dev *pdev = tp->pci_dev;
-        u8 cmd;
-        u16 io_base_l;
-        u16 mem_base_l;
-        u16 mem_base_h;
-        u8 ilr;
-        u16 resv_0x1c_h;
-        u16 resv_0x1c_l;
-        u16 resv_0x20_l;
-        u16 resv_0x20_h;
-        u16 resv_0x24_l;
-        u16 resv_0x24_h;
-        u16 resv_0x2c_h;
-        u16 resv_0x2c_l;
-        u32 pci_sn_l;
-        u32 pci_sn_h;
-
-        if (unlikely(tp->rtk_enable_diag))
-                goto exit;
-
-        tp->esd_flag = 0;
-
-        pci_read_config_byte(pdev, PCI_COMMAND, &cmd);
-        if (cmd != tp->pci_cfg_space.cmd) {
-                printk(KERN_ERR "%s: cmd = 0x%02x, should be 0x%02x \n.", dev->name, cmd, tp->pci_cfg_space.cmd);
-                pci_write_config_byte(pdev, PCI_COMMAND, tp->pci_cfg_space.cmd);
-                tp->esd_flag |= BIT_0;
-
-                pci_read_config_byte(pdev, PCI_COMMAND, &cmd);
-                if (cmd == 0xff) {
-                        printk(KERN_ERR "%s: pci link is down \n.", dev->name);
-                        goto exit;
-                }
-        }
-
-        pci_read_config_word(pdev, PCI_BASE_ADDRESS_0, &io_base_l);
-        if (io_base_l != tp->pci_cfg_space.io_base_l) {
-                printk(KERN_ERR "%s: io_base_l = 0x%04x, should be 0x%04x \n.", dev->name, io_base_l, tp->pci_cfg_space.io_base_l);
-                pci_write_config_word(pdev, PCI_BASE_ADDRESS_0, tp->pci_cfg_space.io_base_l);
-                tp->esd_flag |= BIT_1;
-        }
-
-        pci_read_config_word(pdev, PCI_BASE_ADDRESS_2, &mem_base_l);
-        if (mem_base_l != tp->pci_cfg_space.mem_base_l) {
-                printk(KERN_ERR "%s: mem_base_l = 0x%04x, should be 0x%04x \n.", dev->name, mem_base_l, tp->pci_cfg_space.mem_base_l);
-                pci_write_config_word(pdev, PCI_BASE_ADDRESS_2, tp->pci_cfg_space.mem_base_l);
-                tp->esd_flag |= BIT_2;
-        }
-
-        pci_read_config_word(pdev, PCI_BASE_ADDRESS_2 + 2, &mem_base_h);
-        if (mem_base_h!= tp->pci_cfg_space.mem_base_h) {
-                printk(KERN_ERR "%s: mem_base_h = 0x%04x, should be 0x%04x \n.", dev->name, mem_base_h, tp->pci_cfg_space.mem_base_h);
-                pci_write_config_word(pdev, PCI_BASE_ADDRESS_2 + 2, tp->pci_cfg_space.mem_base_h);
-                tp->esd_flag |= BIT_3;
-        }
-
-        pci_read_config_word(pdev, PCI_BASE_ADDRESS_3, &resv_0x1c_l);
-        if (resv_0x1c_l != tp->pci_cfg_space.resv_0x1c_l) {
-                printk(KERN_ERR "%s: resv_0x1c_l = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x1c_l, tp->pci_cfg_space.resv_0x1c_l);
-                pci_write_config_word(pdev, PCI_BASE_ADDRESS_3, tp->pci_cfg_space.resv_0x1c_l);
-                tp->esd_flag |= BIT_4;
-        }
-
-        pci_read_config_word(pdev, PCI_BASE_ADDRESS_3 + 2, &resv_0x1c_h);
-        if (resv_0x1c_h != tp->pci_cfg_space.resv_0x1c_h) {
-                printk(KERN_ERR "%s: resv_0x1c_h = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x1c_h, tp->pci_cfg_space.resv_0x1c_h);
-                pci_write_config_word(pdev, PCI_BASE_ADDRESS_3 + 2, tp->pci_cfg_space.resv_0x1c_h);
-                tp->esd_flag |= BIT_5;
-        }
-
-        pci_read_config_word(pdev, PCI_BASE_ADDRESS_4, &resv_0x20_l);
-        if (resv_0x20_l != tp->pci_cfg_space.resv_0x20_l) {
-                printk(KERN_ERR "%s: resv_0x20_l = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x20_l, tp->pci_cfg_space.resv_0x20_l);
-                pci_write_config_word(pdev, PCI_BASE_ADDRESS_4, tp->pci_cfg_space.resv_0x20_l);
-                tp->esd_flag |= BIT_6;
-        }
-
-        pci_read_config_word(pdev, PCI_BASE_ADDRESS_4 + 2, &resv_0x20_h);
-        if (resv_0x20_h != tp->pci_cfg_space.resv_0x20_h) {
-                printk(KERN_ERR "%s: resv_0x20_h = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x20_h, tp->pci_cfg_space.resv_0x20_h);
-                pci_write_config_word(pdev, PCI_BASE_ADDRESS_4 + 2, tp->pci_cfg_space.resv_0x20_h);
-                tp->esd_flag |= BIT_7;
-        }
-
-        pci_read_config_word(pdev, PCI_BASE_ADDRESS_5, &resv_0x24_l);
-        if (resv_0x24_l != tp->pci_cfg_space.resv_0x24_l) {
-                printk(KERN_ERR "%s: resv_0x24_l = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x24_l, tp->pci_cfg_space.resv_0x24_l);
-                pci_write_config_word(pdev, PCI_BASE_ADDRESS_5, tp->pci_cfg_space.resv_0x24_l);
-                tp->esd_flag |= BIT_8;
-        }
-
-        pci_read_config_word(pdev, PCI_BASE_ADDRESS_5 + 2, &resv_0x24_h);
-        if (resv_0x24_h != tp->pci_cfg_space.resv_0x24_h) {
-                printk(KERN_ERR "%s: resv_0x24_h = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x24_h, tp->pci_cfg_space.resv_0x24_h);
-                pci_write_config_word(pdev, PCI_BASE_ADDRESS_5 + 2, tp->pci_cfg_space.resv_0x24_h);
-                tp->esd_flag |= BIT_9;
-        }
-
-        pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ilr);
-        if (ilr != tp->pci_cfg_space.ilr) {
-                printk(KERN_ERR "%s: ilr = 0x%02x, should be 0x%02x \n.", dev->name, ilr, tp->pci_cfg_space.ilr);
-                pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, tp->pci_cfg_space.ilr);
-                tp->esd_flag |= BIT_10;
-        }
-
-        pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &resv_0x2c_l);
-        if (resv_0x2c_l != tp->pci_cfg_space.resv_0x2c_l) {
-                printk(KERN_ERR "%s: resv_0x2c_l = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x2c_l, tp->pci_cfg_space.resv_0x2c_l);
-                pci_write_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, tp->pci_cfg_space.resv_0x2c_l);
-                tp->esd_flag |= BIT_11;
-        }
-
-        pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID + 2, &resv_0x2c_h);
-        if (resv_0x2c_h != tp->pci_cfg_space.resv_0x2c_h) {
-                printk(KERN_ERR "%s: resv_0x2c_h = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x2c_h, tp->pci_cfg_space.resv_0x2c_h);
-                pci_write_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID + 2, tp->pci_cfg_space.resv_0x2c_h);
-                tp->esd_flag |= BIT_12;
-        }
-
-        if (tp->HwPcieSNOffset > 0) {
-                pci_sn_l = rtl8168_csi_read(tp, tp->HwPcieSNOffset);
-                if (pci_sn_l != tp->pci_cfg_space.pci_sn_l) {
-                        printk(KERN_ERR "%s: pci_sn_l = 0x%08x, should be 0x%08x \n.", dev->name, pci_sn_l, tp->pci_cfg_space.pci_sn_l);
-                        rtl8168_csi_write(tp, tp->HwPcieSNOffset, tp->pci_cfg_space.pci_sn_l);
-                        tp->esd_flag |= BIT_13;
-                }
-
-                pci_sn_h = rtl8168_csi_read(tp, tp->HwPcieSNOffset + 4);
-                if (pci_sn_h != tp->pci_cfg_space.pci_sn_h) {
-                        printk(KERN_ERR "%s: pci_sn_h = 0x%08x, should be 0x%08x \n.", dev->name, pci_sn_h, tp->pci_cfg_space.pci_sn_h);
-                        rtl8168_csi_write(tp, tp->HwPcieSNOffset + 4, tp->pci_cfg_space.pci_sn_h);
-                        tp->esd_flag |= BIT_14;
-                }
-        }
-
-        if (tp->TestPhyOcpReg && rtl8168_test_phy_ocp(tp))
-                tp->esd_flag |= BIT_15;
-
-        if (tp->esd_flag != 0) {
-                printk(KERN_ERR "%s: esd_flag = 0x%04x\n.\n", dev->name, tp->esd_flag);
-                netif_carrier_off(dev);
-                netif_tx_disable(dev);
-                rtl8168_hw_reset(dev);
-                rtl8168_tx_clear(tp);
-                rtl8168_rx_clear(tp);
-                rtl8168_init_ring(dev);
-                rtl8168_hw_init(dev);
-                rtl8168_powerup_pll(dev);
-                rtl8168_hw_ephy_config(dev);
-                rtl8168_hw_phy_config(dev);
-                rtl8168_hw_config(dev);
-                rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
-                tp->esd_flag = 0;
-        }
-
-exit:
-        return;
-}
-
-/*
-static void
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
-rtl8168_esd_timer(unsigned long __opaque)
-#else
-rtl8168_esd_timer(struct timer_list *t)
-#endif
-{
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
-        struct net_device *dev = (struct net_device *)__opaque;
-        struct rtl8168_private *tp = netdev_priv(dev);
-        struct timer_list *timer = &tp->esd_timer;
-#else
-        struct rtl8168_private *tp = from_timer(tp, t, esd_timer);
-        //struct net_device *dev = tp->dev;
-        struct timer_list *timer = t;
-#endif
-        rtl8168_esd_checker(tp);
-
-        mod_timer(timer, jiffies + timeout);
-}
-*/
-
-/*
-static void
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
-rtl8168_link_timer(unsigned long __opaque)
-#else
-rtl8168_link_timer(struct timer_list *t)
-#endif
-{
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0)
-        struct net_device *dev = (struct net_device *)__opaque;
-        struct rtl8168_private *tp = netdev_priv(dev);
-        struct timer_list *timer = &tp->link_timer;
-#else
-        struct rtl8168_private *tp = from_timer(tp, t, link_timer);
-        struct net_device *dev = tp->dev;
-        struct timer_list *timer = t;
-#endif
-        rtl8168_check_link_status(dev);
-
-        mod_timer(timer, jiffies + RTL8168_LINK_TIMEOUT);
-}
-*/
-
-int rtl8168_enable_msix(struct rtl8168_private *tp)
-{
-        int i, nvecs = 0;
-        struct msix_entry msix_ent[R8168_MAX_MSIX_VEC];
-        //struct net_device *dev = tp->dev;
-        //const int len = sizeof(tp->irq_tbl[0].name);
-
-        for (i = 0; i < R8168_MAX_MSIX_VEC; i++) {
-                msix_ent[i].entry = i;
-                msix_ent[i].vector = 0;
-        }
-
-        nvecs = pci_enable_msix_range(tp->pci_dev, msix_ent,
-                                      tp->min_irq_nvecs, tp->max_irq_nvecs);
-        if (nvecs < 0)
-                goto out;
-
-        for (i = 0; i < nvecs; i++) {
-                struct r8168_irq *irq = &tp->irq_tbl[i];
-                irq->vector = msix_ent[i].vector;
-                //snprintf(irq->name, len, "%s-%d", dev->name, i);
-                //irq->handler = rtl8168_interrupt_msix;
-        }
-
-out:
-        return nvecs;
-}
-
-/* Cfg9346_Unlock assumed. */
-static int rtl8168_try_msi(struct rtl8168_private *tp)
-{
-        struct pci_dev *pdev = tp->pci_dev;
-        unsigned int hw_supp_irq_nvecs;
-        unsigned msi = 0;
-        int nvecs = 1;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_4 ... CFG_METHOD_8:
-                hw_supp_irq_nvecs = 2;
-                break;
-        case CFG_METHOD_9 ... CFG_METHOD_37:
-                hw_supp_irq_nvecs = 4;
-                break;
-        default:
-                hw_supp_irq_nvecs = 1;
-                break;
-        }
-        tp->hw_supp_irq_nvecs = clamp_val(hw_supp_irq_nvecs, 1,
-                                          R8168_MAX_MSIX_VEC);
-
-        tp->max_irq_nvecs = 1;
-        tp->min_irq_nvecs = 1;
-
-#ifdef ENABLE_RSS_SUPPORT
-        if (!pci_enable_msi(pdev))
-                msi |= RTL_FEATURE_MSI;
-        else
-                dev_info(&pdev->dev, "Default use INTx.\n");
-#else
-        switch (tp->mcfg) {
-        case CFG_METHOD_1:
-        case CFG_METHOD_2:
-        case CFG_METHOD_3:
-        case CFG_METHOD_4:
-        case CFG_METHOD_5:
-        case CFG_METHOD_6:
-        case CFG_METHOD_7:
-        case CFG_METHOD_8:
-                dev_info(&pdev->dev, "Default use INTx.\n");
-                break;
-        default:
-#if defined(RTL_USE_NEW_INTR_API)
-                if ((nvecs = pci_alloc_irq_vectors(pdev, tp->min_irq_nvecs, tp->max_irq_nvecs, PCI_IRQ_MSIX)) > 0)
-                        msi |= RTL_FEATURE_MSIX;
-                else if ((nvecs = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES)) > 0 &&
-                         pci_dev_msi_enabled(pdev))
-                        msi |= RTL_FEATURE_MSI;
-#elif LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
-                if ((nvecs = rtl8168_enable_msix(tp)) > 0)
-                        msi |= RTL_FEATURE_MSIX;
-                else if (!pci_enable_msi(pdev))
-                        msi |= RTL_FEATURE_MSI;
-#endif
-                break;
-        }
-#endif //ENABLE_RSS_SUPPORT
-        if (!(msi & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX)))
-                dev_info(&pdev->dev, "no MSI. Back to INTx.\n");
-
-        if (!(msi & RTL_FEATURE_MSIX) || nvecs < 1)
-                nvecs = 1;
-
-        tp->irq_nvecs = nvecs;
-
-        tp->features |= msi;
-
-        return nvecs;
-}
-
-static void rtl8168_disable_msi(struct pci_dev *pdev, struct rtl8168_private *tp)
-{
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0)
-        if (tp->features & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX))
-                pci_free_irq_vectors(pdev);
-#elif LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13)
-        if (tp->features & (RTL_FEATURE_MSIX))
-                pci_disable_msix(pdev);
-        else if (tp->features & (RTL_FEATURE_MSI))
-                pci_disable_msi(pdev);
-#endif
-        tp->features &= ~(RTL_FEATURE_MSI | RTL_FEATURE_MSIX);
-}
-
-static int rtl8168_get_irq(struct pci_dev *pdev)
-{
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0)
-        return pci_irq_vector(pdev, 0);
-#else
-        return pdev->irq;
-#endif
-}
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
-static const struct net_device_ops rtl8168_netdev_ops = {
-        .ndo_open       = rtl8168_open,
-        .ndo_stop       = rtl8168_close,
-        .ndo_get_stats      = rtl8168_get_stats,
-        .ndo_start_xmit     = rtl8168_start_xmit,
-        .ndo_tx_timeout     = rtl8168_tx_timeout,
-        .ndo_change_mtu     = rtl8168_change_mtu,
-        .ndo_set_mac_address    = rtl8168_set_mac_address,
-#if LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)
-        .ndo_do_ioctl       = rtl8168_do_ioctl,
-#else
-        .ndo_siocdevprivate = rtl8168_siocdevprivate,
-        .ndo_eth_ioctl      = rtl8168_do_ioctl,
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0)
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)
-        .ndo_set_multicast_list = rtl8168_set_rx_mode,
-#else
-        .ndo_set_rx_mode    = rtl8168_set_rx_mode,
-#endif
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
-#ifdef CONFIG_R8168_VLAN
-        .ndo_vlan_rx_register   = rtl8168_vlan_rx_register,
-#endif
-#else
-        .ndo_fix_features   = rtl8168_fix_features,
-        .ndo_set_features   = rtl8168_set_features,
-#endif
-#ifdef CONFIG_NET_POLL_CONTROLLER
-        .ndo_poll_controller    = rtl8168_netpoll,
-#endif
-};
-#endif
-
-#ifdef  CONFIG_R8168_NAPI
-
-void rtl8168_enable_napi(struct rtl8168_private *tp)
-{
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-        int i;
-
-        for (i = 0; i < tp->irq_nvecs; i++)
-                RTL_NAPI_ENABLE(tp->dev, &tp->r8168napi[i].napi);
-#endif
-}
-
-static void rtl8168_disable_napi(struct rtl8168_private *tp)
-{
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-        int i;
-
-        for (i = 0; i < tp->irq_nvecs; i++)
-                RTL_NAPI_DISABLE(tp->dev, &tp->r8168napi[i].napi);
-#endif
-}
-
-static void rtl8168_del_napi(struct rtl8168_private *tp)
-{
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-        int i;
-
-        for (i = 0; i < tp->irq_nvecs; i++)
-                RTL_NAPI_DEL((&tp->r8168napi[i]));
-#endif
-}
-#endif //CONFIG_R8168_NAPI
-
-static void rtl8168_init_napi(struct rtl8168_private *tp)
-{
-        int i;
-
-        for (i=0; i<tp->irq_nvecs; i++) {
-                struct r8168_napi *r8168napi = &tp->r8168napi[i];
-#ifdef CONFIG_R8168_NAPI
-                int (*poll)(struct napi_struct *, int);
-
-                if (tp->features & RTL_FEATURE_MSIX) {
-                        if (i == 0)
-                                poll = rtl8168_poll_msix_ring;
-                        else
-                                poll = rtl8168_poll_msix_rx;
-                } else {
-                        poll = rtl8168_poll;
-                }
-
-                RTL_NAPI_CONFIG(tp->dev, r8168napi, poll, R8168_NAPI_WEIGHT);
-#endif
-
-                r8168napi->priv = tp;
-                r8168napi->index = i;
-        }
-}
-
-static int
-rtl8168_set_real_num_queue(struct rtl8168_private *tp)
-{
-        int retval = 0;
-
-        retval = netif_set_real_num_tx_queues(tp->dev, tp->num_tx_rings);
-        if (retval < 0)
-                goto exit;
-
-        retval = netif_set_real_num_rx_queues(tp->dev, tp->num_rx_rings);
-        if (retval < 0)
-                goto exit;
-
-exit:
-        return retval;
-}
-
-static int __devinit
-rtl8168_init_one(struct pci_dev *pdev,
-                 const struct pci_device_id *ent)
-{
-        struct net_device *dev = NULL;
-        struct rtl8168_private *tp;
-        void __iomem *ioaddr = NULL;
-        static int board_idx = -1;
-
-        int rc;
-
-        assert(pdev != NULL);
-        assert(ent != NULL);
-
-        board_idx++;
-
-        if (netif_msg_drv(&debug))
-                printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n",
-                       MODULENAME, RTL8168_VERSION);
-
-        rc = rtl8168_init_board(pdev, &dev, &ioaddr);
-        if (rc)
-                goto out;
-
-        tp = netdev_priv(dev);
-        assert(ioaddr != NULL);
-
-        tp->set_speed = rtl8168_set_speed_xmii;
-        tp->get_settings = rtl8168_gset_xmii;
-        tp->phy_reset_enable = rtl8168_xmii_reset_enable;
-        tp->phy_reset_pending = rtl8168_xmii_reset_pending;
-        tp->link_ok = rtl8168_xmii_link_ok;
-
-        rc = rtl8168_try_msi(tp);
-        if (rc < 0) {
-                dev_err(&pdev->dev, "Can't allocate interrupt\n");
-                goto err_out_1;
-        }
-
-        rtl8168_init_software_variable(dev);
-
-        RTL_NET_DEVICE_OPS(rtl8168_netdev_ops);
-
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)
-        SET_ETHTOOL_OPS(dev, &rtl8168_ethtool_ops);
-#endif
-
-        dev->watchdog_timeo = RTL8168_TX_TIMEOUT;
-        dev->irq = rtl8168_get_irq(pdev);
-        dev->base_addr = (unsigned long) ioaddr;
-
-        rtl8168_init_napi(tp);
-
-#ifdef CONFIG_R8168_VLAN
-        if (tp->mcfg != CFG_METHOD_DEFAULT) {
-                dev->features |= NETIF_F_HW_VLAN_TX;
-#ifndef ENABLE_LIB_SUPPORT
-                dev->features |= NETIF_F_HW_VLAN_RX;
-#endif //!ENABLE_LIB_SUPPORT
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
-                dev->vlan_rx_kill_vid = rtl8168_vlan_rx_kill_vid;
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
-        }
-#endif
-
-        /* There has been a number of reports that using SG/TSO results in
-         * tx timeouts. However for a lot of people SG/TSO works fine.
-         * Therefore disable both features by default, but allow users to
-         * enable them. Use at own risk!
-         */
-        tp->cp_cmd |= RTL_R16(tp, CPlusCmd);
-        if (tp->mcfg != CFG_METHOD_DEFAULT) {
-                dev->features |= NETIF_F_IP_CSUM;
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
-                tp->cp_cmd |= RxChkSum;
-#else
-                dev->features |= NETIF_F_RXCSUM;
-                dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM |
-                                   NETIF_F_RXCSUM | NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
-                dev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM |
-                                     NETIF_F_HIGHDMA;
-                if ((tp->mcfg != CFG_METHOD_16) && (tp->mcfg != CFG_METHOD_17)) {
-                        dev->hw_features |= NETIF_F_TSO;
-                        dev->vlan_features |= NETIF_F_TSO;
-                        switch (tp->mcfg) {
-                        case CFG_METHOD_1 ... CFG_METHOD_26:
-                                /* nothing to do */
-                                break;
-                        default:
-                                dev->features |= NETIF_F_SG | NETIF_F_TSO;
-                                break;
-                        };
-                }
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,15,0)
-                dev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
-#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,15,0)
-                dev->hw_features |= NETIF_F_RXALL;
-                dev->hw_features |= NETIF_F_RXFCS;
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
-                if ((tp->mcfg == CFG_METHOD_1) || (tp->mcfg == CFG_METHOD_2) || (tp->mcfg == CFG_METHOD_3)) {
-                        dev->hw_features &= ~NETIF_F_IPV6_CSUM;
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0)
-                        netif_set_tso_max_size(dev, LSO_64K);
-                        netif_set_tso_max_segs(dev, NIC_MAX_PHYS_BUF_COUNT_LSO2);
-#else //LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0)
-                        netif_set_gso_max_size(dev, LSO_32K);
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,0)
-                        dev->gso_max_segs = NIC_MAX_PHYS_BUF_COUNT_LSO_64K;
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0)
-                        dev->gso_min_segs = NIC_MIN_PHYS_BUF_COUNT;
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0)
-#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,0)
-#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0)
-                } else {
-                        dev->hw_features |= NETIF_F_IPV6_CSUM;
-                        dev->features |=  NETIF_F_IPV6_CSUM;
-                        if ((tp->mcfg != CFG_METHOD_16) && (tp->mcfg != CFG_METHOD_17)) {
-                                dev->hw_features |= NETIF_F_TSO6;
-                                switch (tp->mcfg) {
-                                case CFG_METHOD_1 ... CFG_METHOD_26:
-                                        /* nothing to do */
-                                        break;
-                                default:
-                                        dev->features |=  NETIF_F_TSO6;
-                                        break;
-                                };
-                        }
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0)
-                        netif_set_tso_max_size(dev, LSO_64K);
-                        netif_set_tso_max_segs(dev, NIC_MAX_PHYS_BUF_COUNT_LSO2);
-#else //LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0)
-                        netif_set_gso_max_size(dev, LSO_64K);
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,0)
-                        dev->gso_max_segs = NIC_MAX_PHYS_BUF_COUNT_LSO2;
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0)
-                        dev->gso_min_segs = NIC_MIN_PHYS_BUF_COUNT;
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0)
-#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,0)
-#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0)
-                }
-#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
-        }
-
-#ifdef ENABLE_RSS_SUPPORT
-        if (tp->EnableRss) {
-                dev->hw_features |= NETIF_F_RXHASH;
-                dev->features |=  NETIF_F_RXHASH;
-        }
-#endif
-
-#ifdef ENABLE_DASH_SUPPORT
-        if (tp->DASH)
-                AllocateDashShareMemory(dev);
-#endif
-
-#ifdef ENABLE_LIB_SUPPORT
-        BLOCKING_INIT_NOTIFIER_HEAD(&tp->lib_nh);
-#endif
-        rtl8168_init_all_schedule_work(tp);
-
-        rc = rtl8168_set_real_num_queue(tp);
-        if (rc < 0)
-                goto err_out;
-
-        rtl8168_exit_oob(dev);
-
-        rtl8168_hw_init(dev);
-
-        rtl8168_hw_reset(dev);
-
-        /* Get production from EEPROM */
-        if (((tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
-              tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_29 ||
-              tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_35 ||
-              tp->mcfg == CFG_METHOD_36 || tp->mcfg == CFG_METHOD_37) &&
-             (rtl8168_mac_ocp_read(tp, 0xDC00) & BIT_3)) ||
-            ((tp->mcfg == CFG_METHOD_26) && (rtl8168_mac_ocp_read(tp, 0xDC00) & BIT_4)))
-                tp->eeprom_type = EEPROM_TYPE_NONE;
-        else
-                rtl8168_eeprom_type(tp);
-
-        if (tp->eeprom_type == EEPROM_TYPE_93C46 || tp->eeprom_type == EEPROM_TYPE_93C56)
-                rtl8168_set_eeprom_sel_low(tp);
-
-        rtl8168_get_mac_address(dev);
-
-        tp->fw_name = rtl_chip_fw_infos[tp->mcfg].fw_name;
-
-#if defined(ENABLE_DASH_PRINTER_SUPPORT)
-        init_completion(&tp->fw_host_ok);
-        init_completion(&tp->fw_ack);
-        init_completion(&tp->fw_req);
-#endif
-
-        tp->tally_vaddr = dma_alloc_coherent(&pdev->dev, sizeof(*tp->tally_vaddr),
-                                             &tp->tally_paddr, GFP_KERNEL);
-        if (!tp->tally_vaddr) {
-                rc = -ENOMEM;
-                goto err_out;
-        }
-
-        rtl8168_tally_counter_clear(tp);
-
-        pci_set_drvdata(pdev, dev);
-
-        rc = register_netdev(dev);
-        if (rc)
-                goto err_out;
-
-        printk(KERN_INFO "%s: This product is covered by one or more of the following patents: US6,570,884, US6,115,776, and US6,327,625.\n", MODULENAME);
-
-        rtl8168_disable_rxdvgate(dev);
-
-        device_set_wakeup_enable(&pdev->dev, tp->wol_enabled);
-
-        netif_carrier_off(dev);
-
-        printk("%s", GPL_CLAIM);
-
-out:
-        return rc;
-
-err_out:
-        if (tp->tally_vaddr != NULL) {
-                dma_free_coherent(&pdev->dev, sizeof(*tp->tally_vaddr), tp->tally_vaddr,
-                                  tp->tally_paddr);
-
-                tp->tally_vaddr = NULL;
-        }
-#ifdef  CONFIG_R8168_NAPI
-        rtl8168_del_napi(tp);
-#endif
-        rtl8168_disable_msi(pdev, tp);
-
-err_out_1:
-        rtl8168_release_board(pdev, dev);
-
-        goto out;
-}
-
-static void __devexit
-rtl8168_remove_one(struct pci_dev *pdev)
-{
-        struct net_device *dev = pci_get_drvdata(pdev);
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        assert(dev != NULL);
-        assert(tp != NULL);
-
-        set_bit(R8168_FLAG_DOWN, tp->task_flags);
-
-        rtl8168_cancel_all_schedule_work(tp);
-
-#ifdef  CONFIG_R8168_NAPI
-        rtl8168_del_napi(tp);
-#endif
-        if (HW_DASH_SUPPORT_DASH(tp))
-                rtl8168_driver_stop(tp);
-
-        unregister_netdev(dev);
-        rtl8168_disable_msi(pdev, tp);
-#ifdef ENABLE_R8168_PROCFS
-        rtl8168_proc_remove(dev);
-#endif
-        if (tp->tally_vaddr != NULL) {
-                dma_free_coherent(&pdev->dev, sizeof(*tp->tally_vaddr), tp->tally_vaddr, tp->tally_paddr);
-                tp->tally_vaddr = NULL;
-        }
-
-        rtl8168_release_board(pdev, dev);
-
-#ifdef ENABLE_USE_FIRMWARE_FILE
-        rtl8168_release_firmware(tp);
-#endif
-
-        pci_set_drvdata(pdev, NULL);
-}
-
-static void rtl8168_free_irq(struct rtl8168_private *tp)
-{
-        int i;
-
-        for (i=0; i<tp->irq_nvecs; i++) {
-                struct r8168_irq *irq = &tp->irq_tbl[i];
-                struct r8168_napi *r8168napi = &tp->r8168napi[i];
-
-                if (irq->requested) {
-                        irq->requested = 0;
-#if defined(RTL_USE_NEW_INTR_API)
-                        pci_free_irq(tp->pci_dev, i, r8168napi);
-#else
-                        free_irq(irq->vector, r8168napi);
-#endif
-                }
-        }
-}
-
-static int rtl8168_alloc_irq(struct rtl8168_private *tp)
-{
-        struct net_device *dev = tp->dev;
-        int rc = 0;
-        struct r8168_irq *irq;
-        struct r8168_napi *r8168napi;
-        int i = 0;
-        const int len = sizeof(tp->irq_tbl[0].name);
-
-#if defined(RTL_USE_NEW_INTR_API)
-        for (i=0; i<tp->irq_nvecs; i++) {
-                irq = &tp->irq_tbl[i];
-                if (tp->features & RTL_FEATURE_MSIX)
-                        irq->handler = rtl8168_interrupt_msix;
-                else
-                        irq->handler = rtl8168_interrupt;
-
-                r8168napi = &tp->r8168napi[i];
-                snprintf(irq->name, len, "%s-%d", dev->name, i);
-                rc = pci_request_irq(tp->pci_dev, i, irq->handler, NULL, r8168napi,
-                                     irq->name);
-                if (rc)
-                        break;
-
-                irq->vector = pci_irq_vector(tp->pci_dev, i);
-                irq->requested = 1;
-        }
-#else
-        unsigned long irq_flags = 0;
-#ifdef ENABLE_LIB_SUPPORT
-        if (tp->features & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX))
-                irq_flags |= IRQF_NO_SUSPEND;
-#endif //ENABLE_LIB_SUPPORT
-        if (tp->features & RTL_FEATURE_MSIX) {
-                for (i=0; i<tp->irq_nvecs; i++) {
-                        irq = &tp->irq_tbl[i];
-                        irq->handler = rtl8168_interrupt_msix;
-                        r8168napi = &tp->r8168napi[i];
-                        snprintf(irq->name, len, "%s-%d", dev->name, i);
-                        rc = request_irq(irq->vector, irq->handler, irq_flags, irq->name, r8168napi);
-
-                        if (rc)
-                                break;
-
-                        irq->requested = 1;
-                }
-        } else {
-                irq = &tp->irq_tbl[0];
-                irq->handler = rtl8168_interrupt;
-                r8168napi = &tp->r8168napi[0];
-                snprintf(irq->name, len, "%s-0", dev->name);
-                irq->vector = dev->irq;
-                irq_flags |= (tp->features & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX)) ? 0 : SA_SHIRQ;
-                rc = request_irq(irq->vector, irq->handler, irq_flags, irq->name, r8168napi);
-
-                if (rc == 0)
-                        irq->requested = 1;
-        }
-#endif
-        if (rc)
-                rtl8168_free_irq(tp);
-
-        return rc;
-}
-
-static void
-rtl8168_set_rxbufsize(struct rtl8168_private *tp,
-                      struct net_device *dev)
-{
-        unsigned int mtu = dev->mtu;
-
-        tp->rx_buf_sz = (mtu > ETH_DATA_LEN) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE;
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_1 ... CFG_METHOD_26:
-                tp->rx_buf_sz += 1;
-                break;
-        default:
-                break;
-        }
-}
-
-static int rtl8168_alloc_tx_desc(struct rtl8168_private *tp)
-{
-        struct pci_dev *pdev = tp->pci_dev;
-        struct rtl8168_tx_ring *ring;
-        int i;
-
-        for (i = 0; i < tp->num_tx_rings; i++) {
-                ring = &tp->tx_ring[i];
-                ring->TxDescAllocSize = (ring->num_tx_desc + 1) * sizeof(struct TxDesc);
-                ring->TxDescArray = dma_alloc_coherent(&pdev->dev,
-                                                       ring->TxDescAllocSize,
-                                                       &ring->TxPhyAddr,
-                                                       GFP_KERNEL);
-
-                if (!ring->TxDescArray)
-                        return -1;
-        }
-
-        return 0;
-}
-
-static int rtl8168_alloc_rx_desc(struct rtl8168_private *tp)
-{
-        struct pci_dev *pdev = tp->pci_dev;
-
-        if (tp->InitRxDescType == RX_DESC_RING_TYPE_2)
-                tp->RxDescAllocSize = ((tp->num_rx_desc + 1) * tp->num_hw_tot_en_rx_rings)
-                                      * tp->RxDescLength;
-        else
-                tp->RxDescAllocSize = (tp->num_rx_desc + 1) * tp->RxDescLength;
-
-        tp->RxDescArray = dma_alloc_coherent(&pdev->dev, tp->RxDescAllocSize,
-                                             &tp->RxPhyAddr, GFP_KERNEL);
-        if (!tp->RxDescArray)
-                return -1;
-
-        return 0;
-}
-
-static void rtl8168_free_tx_desc(struct rtl8168_private *tp)
-{
-        struct rtl8168_tx_ring *ring;
-        struct pci_dev *pdev = tp->pci_dev;
-        int i;
-
-        for (i = 0; i < tp->num_tx_rings; i++) {
-                ring = &tp->tx_ring[i];
-                if (ring->TxDescArray) {
-                        dma_free_coherent(&pdev->dev,
-                                          ring->TxDescAllocSize,
-                                          ring->TxDescArray,
-                                          ring->TxPhyAddr);
-                        ring->TxDescArray = NULL;
-                }
-        }
-}
-
-static void rtl8168_free_rx_desc(struct rtl8168_private *tp)
-{
-        struct pci_dev *pdev = tp->pci_dev;
-
-        if (tp->RxDescArray) {
-                dma_free_coherent(&pdev->dev, tp->RxDescAllocSize, tp->RxDescArray,
-                                  tp->RxPhyAddr);
-                tp->RxDescArray = NULL;
-        }
-}
-
-static void rtl8168_free_alloc_resources(struct rtl8168_private *tp)
-{
-        rtl8168_free_rx_desc(tp);
-
-        rtl8168_free_tx_desc(tp);
-}
-
-#ifdef ENABLE_USE_FIRMWARE_FILE
-static void rtl8168_request_firmware(struct rtl8168_private *tp)
-{
-        struct rtl8168_fw *rtl_fw;
-
-        /* firmware loaded already or no firmware available */
-        if (tp->rtl_fw || !tp->fw_name)
-                return;
-
-        rtl_fw = kzalloc(sizeof(*rtl_fw), GFP_KERNEL);
-        if (!rtl_fw)
-                return;
-
-        rtl_fw->phy_write = rtl8168_mdio_write;
-        rtl_fw->phy_read = rtl8168_mdio_read;
-        rtl_fw->mac_mcu_write = mac_mcu_write;
-        rtl_fw->mac_mcu_read = mac_mcu_read;
-        rtl_fw->fw_name = tp->fw_name;
-        rtl_fw->dev = tp_to_dev(tp);
-
-        if (rtl8168_fw_request_firmware(rtl_fw))
-                kfree(rtl_fw);
-        else
-                tp->rtl_fw = rtl_fw;
-}
-#endif
-
-int rtl8168_open(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        struct pci_dev *pdev = tp->pci_dev;
-        int retval;
-
-        retval = -ENOMEM;
-
-#ifdef ENABLE_R8168_PROCFS
-        rtl8168_proc_init(dev);
-#endif
-        rtl8168_set_rxbufsize(tp, dev);
-        /*
-        * Rx and Tx descriptors needs 256 bytes alignment.
-        * pci_alloc_consistent provides more.
-        */
-        if (rtl8168_alloc_tx_desc(tp) < 0 || rtl8168_alloc_rx_desc(tp) < 0)
-                goto err_free_all_allocated_mem;
-
-        retval = rtl8168_init_ring(dev);
-        if (retval < 0)
-                goto err_free_all_allocated_mem;
-
-        retval = rtl8168_alloc_irq(tp);
-        if (retval<0)
-                goto err_free_all_allocated_mem;
-
-        if (netif_msg_probe(tp)) {
-                printk(KERN_INFO "%s: 0x%lx, "
-                       "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
-                       "IRQ %d\n",
-                       dev->name,
-                       dev->base_addr,
-                       dev->dev_addr[0], dev->dev_addr[1],
-                       dev->dev_addr[2], dev->dev_addr[3],
-                       dev->dev_addr[4], dev->dev_addr[5], dev->irq);
-        }
-
-#ifdef ENABLE_USE_FIRMWARE_FILE
-        rtl8168_request_firmware(tp);
-#endif
-        /*
-        #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
-                INIT_WORK(&tp->task, rtl8168_reset_task, dev);
-        #else
-                INIT_DELAYED_WORK(&tp->task, rtl8168_reset_task);
-        #endif
-        */
-        pci_set_master(pdev);
-
-#ifdef  CONFIG_R8168_NAPI
-        rtl8168_enable_napi(tp);
-#endif
-        rtl8168_exit_oob(dev);
-
-        rtl8168_hw_init(dev);
-
-        rtl8168_hw_reset(dev);
-
-        rtl8168_powerup_pll(dev);
-
-        rtl8168_hw_ephy_config(dev);
-
-        rtl8168_hw_phy_config(dev);
-
-        rtl8168_hw_config(dev);
-
-        rtl8168_dsm(dev, DSM_IF_UP);
-
-        clear_bit(R8168_FLAG_DOWN, tp->task_flags);
-
-        rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
-
-        if (tp->esd_flag == 0) {
-                //rtl8168_request_esd_timer(dev);
-                rtl8168_schedule_esd_work(tp);
-        }
-
-        //rtl8168_request_link_timer(dev);
-        rtl8168_schedule_linkchg_work(tp);
-
-out:
-
-        return retval;
-
-err_free_all_allocated_mem:
-        rtl8168_free_alloc_resources(tp);
-
-        goto out;
-}
-
-static void
-rtl8168_dsm(struct net_device *dev, int dev_state)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        switch (dev_state) {
-        case DSM_MAC_INIT:
-                if ((tp->mcfg == CFG_METHOD_5) || (tp->mcfg == CFG_METHOD_6)) {
-                        if (RTL_R8(tp, MACDBG) & 0x80)
-                                RTL_W8(tp, GPIO, RTL_R8(tp, GPIO) | GPIO_en);
-                        else
-                                RTL_W8(tp, GPIO, RTL_R8(tp, GPIO) & ~GPIO_en);
-                }
-
-                break;
-        case DSM_NIC_GOTO_D3:
-        case DSM_IF_DOWN:
-                if ((tp->mcfg == CFG_METHOD_5) || (tp->mcfg == CFG_METHOD_6)) {
-                        if (RTL_R8(tp, MACDBG) & 0x80)
-                                RTL_W8(tp, GPIO, RTL_R8(tp, GPIO) & ~GPIO_en);
-                }
-                break;
-
-        case DSM_NIC_RESUME_D3:
-        case DSM_IF_UP:
-                if ((tp->mcfg == CFG_METHOD_5) || (tp->mcfg == CFG_METHOD_6)) {
-                        if (RTL_R8(tp, MACDBG) & 0x80)
-                                RTL_W8(tp, GPIO, RTL_R8(tp, GPIO) | GPIO_en);
-                }
-
-                break;
-        }
-}
-
-static void
-set_offset70F(struct rtl8168_private *tp, u8 setting)
-{
-        u32 csi_tmp;
-        u32 temp = (u32)setting;
-        temp = temp << 24;
-        /*set PCI configuration space offset 0x70F to setting*/
-        /*When the register offset of PCI configuration space larger than 0xff, use CSI to access it.*/
-
-        csi_tmp = rtl8168_csi_read(tp, 0x70c) & 0x00ffffff;
-        rtl8168_csi_write(tp, 0x70c, csi_tmp | temp);
-}
-
-static void
-set_offset79(struct rtl8168_private *tp, u8 setting)
-{
-        //Set PCI configuration space offset 0x79 to setting
-
-        struct pci_dev *pdev = tp->pci_dev;
-        u8 device_control;
-
-        if (hwoptimize & HW_PATCH_SOC_LAN)
-                return;
-
-        pci_read_config_byte(pdev, 0x79, &device_control);
-        device_control &= ~0x70;
-        device_control |= setting;
-        pci_write_config_byte(pdev, 0x79, device_control);
-}
-
-static void
-set_offset711(struct rtl8168_private *tp, u8 setting)
-{
-        u32 csi_tmp;
-        u32 temp = (u32)setting;
-        temp &= 0x0f;
-        temp = temp << 12;
-        /*set PCI configuration space offset 0x711 to setting*/
-
-        csi_tmp = rtl8168_csi_read(tp, 0x710) & 0xffff0fff;
-        rtl8168_csi_write(tp, 0x710, csi_tmp | temp);
-}
-
-static void
-rtl8168_hw_set_rx_packet_filter(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u32 mc_filter[2];   /* Multicast hash filter */
-        int rx_mode;
-        u32 tmp = 0;
-
-        if (dev->flags & IFF_PROMISC) {
-                /* Unconditionally log net taps. */
-                if (netif_msg_link(tp))
-                        printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n",
-                               dev->name);
-
-                rx_mode =
-                        AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
-                        AcceptAllPhys;
-                mc_filter[1] = mc_filter[0] = 0xffffffff;
-        } else if ((netdev_mc_count(dev) > multicast_filter_limit)
-                   || (dev->flags & IFF_ALLMULTI)) {
-                /* Too many to filter perfectly -- accept all multicasts. */
-                rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
-                mc_filter[1] = mc_filter[0] = 0xffffffff;
-        } else {
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35)
-                struct dev_mc_list *mclist;
-                unsigned int i;
-
-                rx_mode = AcceptBroadcast | AcceptMyPhys;
-                mc_filter[1] = mc_filter[0] = 0;
-                for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
-                     i++, mclist = mclist->next) {
-                        int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
-                        mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
-                        rx_mode |= AcceptMulticast;
-                }
-#else
-                struct netdev_hw_addr *ha;
-
-                rx_mode = AcceptBroadcast | AcceptMyPhys;
-                mc_filter[1] = mc_filter[0] = 0;
-                netdev_for_each_mc_addr(ha, dev) {
-                        int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
-                        mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
-                        rx_mode |= AcceptMulticast;
-                }
-#endif
-        }
-
-        if (dev->features & NETIF_F_RXALL)
-                rx_mode |= (AcceptErr | AcceptRunt);
-
-        tmp = mc_filter[0];
-        mc_filter[0] = swab32(mc_filter[1]);
-        mc_filter[1] = swab32(tmp);
-
-        tp->rtl8168_rx_config = rtl_chip_info[tp->chipset].RCR_Cfg;
-        switch (tp->mcfg) {
-        case CFG_METHOD_21 ... CFG_METHOD_35:
-                if (tp->EnableRss)
-                        tp->rtl8168_rx_config &= ~Rx_Single_fetch_V2;
-                else
-                        tp->rtl8168_rx_config |= Rx_Single_fetch_V2;
-                break;
-        default:
-                break;
-        }
-        if (tp->InitRxDescType == RX_DESC_RING_TYPE_2)
-                tp->rtl8168_rx_config |= RxCfg_rx_desc_v2_en;
-        tmp = tp->rtl8168_rx_config | rx_mode | (RTL_R32(tp, RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask);
-
-        RTL_W32(tp, RxConfig, tmp);
-        RTL_W32(tp, MAR0 + 0, mc_filter[0]);
-        RTL_W32(tp, MAR0 + 4, mc_filter[1]);
-}
-
-static void
-rtl8168_set_rx_mode(struct net_device *dev)
-{
-        rtl8168_hw_set_rx_packet_filter(dev);
-}
-
-void
-rtl8168_hw_config(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        struct pci_dev *pdev = tp->pci_dev;
-        u8 device_control;
-        u16 mac_ocp_data;
-        u32 csi_tmp;
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
-        if (dev->mtu > ETH_DATA_LEN) {
-                dev->features &= ~(NETIF_F_IP_CSUM);
-        } else {
-                dev->features |= NETIF_F_IP_CSUM;
-        }
-#endif
-        rtl8168_disable_rx_packet_filter(tp);
-
-        rtl8168_hw_reset(dev);
-
-        rtl8168_enable_cfg9346_write(tp);
-        if (tp->HwSuppAspmClkIntrLock) {
-                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7);
-                rtl8168_hw_aspm_clkreq_enable(tp, false);
-        }
-
-        rtl8168_set_eee_lpi_timer(tp);
-
-        //clear io_rdy_l23
-        switch (tp->mcfg) {
-        case CFG_METHOD_20:
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~BIT_1);
-                break;
-        }
-
-        //keep magic packet only
-        switch (tp->mcfg) {
-        case CFG_METHOD_16:
-        case CFG_METHOD_17:
-        case CFG_METHOD_18:
-        case CFG_METHOD_19:
-        case CFG_METHOD_20:
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                csi_tmp = rtl8168_eri_read(tp, 0xDE, 1, ERIAR_ExGMAC);
-                csi_tmp &= BIT_0;
-                rtl8168_eri_write(tp, 0xDE, 1, csi_tmp, ERIAR_ExGMAC);
-                break;
-        }
-
-        RTL_W8(tp, MTPS, Reserved1_data);
-
-        tp->cp_cmd |= INTT_1;
-        if (tp->use_timer_interrrupt)
-                tp->cp_cmd |= PktCntrDisable;
-        else
-                tp->cp_cmd &= ~PktCntrDisable;
-
-        RTL_W16(tp, IntrMitigate, 0x5f51);
-
-        rtl8168_tally_counter_addr_fill(tp);
-
-        rtl8168_desc_addr_fill(tp);
-
-        /* Set DMA burst size and Interframe Gap Time */
-        if (tp->mcfg == CFG_METHOD_1)
-                RTL_W32(tp, TxConfig, (TX_DMA_BURST_512 << TxDMAShift) |
-                        (InterFrameGap << TxInterFrameGapShift));
-        else
-                RTL_W32(tp, TxConfig, (TX_DMA_BURST_unlimited << TxDMAShift) |
-                        (InterFrameGap << TxInterFrameGapShift));
-
-        if (tp->mcfg == CFG_METHOD_4) {
-                set_offset70F(tp, 0x27);
-
-                RTL_W8(tp, DBG_reg, (0x0E << 4) | Fix_Nak_1 | Fix_Nak_2);
-
-                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
-
-                //disable clock request.
-                pci_write_config_byte(pdev, 0x81, 0x00);
-
-                if (dev->mtu > ETH_DATA_LEN) {
-                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
-                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
-
-                        set_offset79(tp, 0x20);
-                } else {
-                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
-                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
-
-                        set_offset79(tp, 0x50);
-                }
-
-                //rx checksum offload enable
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
-                tp->cp_cmd |= RxChkSum;
-#else
-                dev->features |= NETIF_F_RXCSUM;
-#endif
-
-                tp->cp_cmd &= ~(EnableBist | Macdbgo_oe | Force_halfdup |
-                                Force_rxflow_en | Force_txflow_en | Cxpl_dbg_sel |
-                                ASF | PktCntrDisable | Macdbgo_sel);
-        } else if (tp->mcfg == CFG_METHOD_5) {
-
-                set_offset70F(tp, 0x27);
-
-                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
-
-                //disable clock request.
-                pci_write_config_byte(pdev, 0x81, 0x00);
-
-                if (dev->mtu > ETH_DATA_LEN) {
-                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
-                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
-
-                        set_offset79(tp, 0x20);
-                } else {
-                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
-                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
-
-                        set_offset79(tp, 0x50);
-                }
-
-                //rx checksum offload enable
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
-                tp->cp_cmd |= RxChkSum;
-#else
-                dev->features |= NETIF_F_RXCSUM;
-#endif
-        } else if (tp->mcfg == CFG_METHOD_6) {
-                set_offset70F(tp, 0x27);
-
-                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
-
-                //disable clock request.
-                pci_write_config_byte(pdev, 0x81, 0x00);
-
-                if (dev->mtu > ETH_DATA_LEN) {
-                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
-                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
-
-                        set_offset79(tp, 0x20);
-                } else {
-                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
-                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
-
-                        set_offset79(tp, 0x50);
-                }
-
-                //rx checksum offload enable
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
-                tp->cp_cmd |= RxChkSum;
-#else
-                dev->features |= NETIF_F_RXCSUM;
-#endif
-        } else if (tp->mcfg == CFG_METHOD_7) {
-                set_offset70F(tp, 0x27);
-
-                rtl8168_eri_write(tp, 0x1EC, 1, 0x07, ERIAR_ASF);
-
-                //disable clock request.
-                pci_write_config_byte(pdev, 0x81, 0x00);
-
-                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
-
-                if (dev->mtu > ETH_DATA_LEN) {
-                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
-                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
-
-                        set_offset79(tp, 0x20);
-                } else {
-                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
-                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
-
-
-                        set_offset79(tp, 0x50);
-                }
-        } else if (tp->mcfg == CFG_METHOD_8) {
-
-                set_offset70F(tp, 0x27);
-
-                rtl8168_eri_write(tp, 0x1EC, 1, 0x07, ERIAR_ASF);
-
-                //disable clock request.
-                pci_write_config_byte(pdev, 0x81, 0x00);
-
-                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
-
-                RTL_W8(tp, 0xD1, 0x20);
-
-                if (dev->mtu > ETH_DATA_LEN) {
-                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
-                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
-
-                        set_offset79(tp, 0x20);
-                } else {
-                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
-                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
-
-                        set_offset79(tp, 0x50);
-                }
-        } else if (tp->mcfg == CFG_METHOD_9) {
-                set_offset70F(tp, 0x27);
-
-                /* disable clock request. */
-                pci_write_config_byte(pdev, 0x81, 0x00);
-
-                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~BIT_4);
-                RTL_W8(tp, DBG_reg, RTL_R8(tp, DBG_reg) | BIT_7 | BIT_1);
-
-                if (dev->mtu > ETH_DATA_LEN) {
-                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
-                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
-
-                        set_offset79(tp, 0x20);
-                } else {
-                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
-                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
-
-                        set_offset79(tp, 0x50);
-                }
-
-                RTL_W8(tp, TDFNR, 0x8);
-
-        } else if (tp->mcfg == CFG_METHOD_10) {
-                set_offset70F(tp, 0x27);
-
-                RTL_W8(tp, DBG_reg, RTL_R8(tp, DBG_reg) | BIT_7 | BIT_1);
-
-                if (dev->mtu > ETH_DATA_LEN) {
-                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
-                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | Jumbo_En1);
-
-                        set_offset79(tp, 0x20);
-                } else {
-                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
-                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
-
-                        set_offset79(tp, 0x50);
-                }
-
-                RTL_W8(tp, TDFNR, 0x8);
-
-                RTL_W8(tp, Config1, RTL_R8(tp, Config1) | 0x10);
-
-                /* disable clock request. */
-                pci_write_config_byte(pdev, 0x81, 0x00);
-        } else if (tp->mcfg == CFG_METHOD_11 || tp->mcfg == CFG_METHOD_13) {
-                set_offset70F(tp, 0x27);
-                set_offset79(tp, 0x50);
-
-                if (dev->mtu > ETH_DATA_LEN)
-                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
-                else
-                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
-
-                pci_write_config_byte(pdev, 0x81, 0x00);
-
-                RTL_W8(tp, Config1, RTL_R8(tp, Config1) | 0x10);
-
-        } else if (tp->mcfg == CFG_METHOD_12) {
-                set_offset70F(tp, 0x27);
-                set_offset79(tp, 0x50);
-
-                if (dev->mtu > ETH_DATA_LEN)
-                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
-                else
-                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
-
-                pci_write_config_byte(pdev, 0x81, 0x01);
-
-                RTL_W8(tp, Config1, RTL_R8(tp, Config1) | 0x10);
-
-        } else if (tp->mcfg == CFG_METHOD_14 || tp->mcfg == CFG_METHOD_15) {
-
-                set_offset70F(tp, 0x27);
-                set_offset79(tp, 0x50);
-
-                if (dev->mtu > ETH_DATA_LEN) {
-                        RTL_W8(tp, MTPS, 0x24);
-                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) | Jumbo_En0);
-                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | 0x01);
-                } else {
-                        RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
-                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~0x01);
-                }
-
-                RTL_W8(tp, 0xF3, RTL_R8(tp, 0xF3) | BIT_5);
-                RTL_W8(tp, 0xF3, RTL_R8(tp, 0xF3) & ~BIT_5);
-
-                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_7 | BIT_6);
-
-                RTL_W8(tp, 0xD1, RTL_R8(tp, 0xD1) | BIT_2 | BIT_3);
-
-                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_6 | BIT_5 | BIT_4 | BIT_2 | BIT_1);
-
-                RTL_W8(tp, TDFNR, 0x8);
-
-                /*
-                if (aspm)
-                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
-                */
-
-                RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_3);
-
-                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
-
-                RTL_W8(tp, Config1, RTL_R8(tp, Config1) & ~0x10);
-        } else if (tp->mcfg == CFG_METHOD_16 || tp->mcfg == CFG_METHOD_17) {
-                set_offset70F(tp, 0x27);
-                set_offset79(tp, 0x50);
-
-                rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xC8, 4, 0x00100002, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
-                csi_tmp = rtl8168_eri_read(tp, 0x1D0, 4, ERIAR_ExGMAC);
-                csi_tmp |= BIT_1;
-                rtl8168_eri_write(tp, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
-
-                csi_tmp = rtl8168_eri_read(tp, 0xDC, 1, ERIAR_ExGMAC);
-                csi_tmp &= ~BIT_0;
-                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
-                csi_tmp |= BIT_0;
-                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
-
-                RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) | BIT_7);
-                RTL_W8(tp, 0xD3, RTL_R8(tp, 0xD3) & ~BIT_7);
-                RTL_W8(tp, 0x1B, RTL_R8(tp, 0x1B) & ~0x07);
-
-                if (tp->mcfg == CFG_METHOD_16) {
-                        RTL_W32(tp, 0xB0, 0xEE480010);
-                        RTL_W8(tp, 0x1A, RTL_R8(tp, 0x1A) & ~(BIT_2|BIT_3));
-                        rtl8168_eri_write(tp, 0x1DC, 1, 0x64, ERIAR_ExGMAC);
-                } else {
-                        csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
-                        csi_tmp |= BIT_4;
-                        rtl8168_eri_write(tp, 0x1B0, 1, csi_tmp, ERIAR_ExGMAC);
-                        rtl8168_eri_write(tp, 0xCC, 4, 0x00000050, ERIAR_ExGMAC);
-                        rtl8168_eri_write(tp, 0xD0, 4, 0x07ff0060, ERIAR_ExGMAC);
-                }
-
-                RTL_W8(tp, TDFNR, 0x8);
-
-                RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~PMSTS_En);
-
-                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_6);
-                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_6);
-
-                if (dev->mtu > ETH_DATA_LEN)
-                        RTL_W8(tp, MTPS, 0x27);
-
-                /* disable clock request. */
-                pci_write_config_byte(pdev, 0x81, 0x00);
-
-        } else if (tp->mcfg == CFG_METHOD_18 || tp->mcfg == CFG_METHOD_19) {
-                set_offset70F(tp, 0x27);
-                set_offset79(tp, 0x50);
-
-                rtl8168_eri_write(tp, 0xC8, 4, 0x00100002, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
-                RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) | BIT_7);
-                RTL_W8(tp, 0xD3, RTL_R8(tp, 0xD3) & ~BIT_7);
-                csi_tmp = rtl8168_eri_read(tp, 0xDC, 1, ERIAR_ExGMAC);
-                csi_tmp &= ~BIT_0;
-                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
-                csi_tmp |= BIT_0;
-                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
-
-                /*
-                if (aspm)
-                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
-                */
-
-                if (dev->mtu > ETH_DATA_LEN)
-                        RTL_W8(tp, MTPS, 0x27);
-
-                RTL_W8(tp, TDFNR, 0x8);
-
-                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_6);
-                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_6);
-
-                rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
-                RTL_W8(tp, 0x1B,RTL_R8(tp, 0x1B) & ~0x07);
-
-                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 1, ERIAR_ExGMAC);
-                csi_tmp |= BIT_4;
-                rtl8168_eri_write(tp, 0x1B0, 1, csi_tmp, ERIAR_ExGMAC);
-                csi_tmp = rtl8168_eri_read(tp, 0x1d0, 1, ERIAR_ExGMAC);
-                csi_tmp |= BIT_4 | BIT_1;
-                rtl8168_eri_write(tp, 0x1d0, 1, csi_tmp, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xCC, 4, 0x00000050, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xd0, 4, 0x00000060, ERIAR_ExGMAC);
-        } else if (tp->mcfg == CFG_METHOD_20) {
-                set_offset70F(tp, 0x27);
-                set_offset79(tp, 0x50);
-
-                rtl8168_eri_write(tp, 0xC8, 4, 0x00100002, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
-                RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) | BIT_7);
-                RTL_W8(tp, 0xD3, RTL_R8(tp, 0xD3) & ~BIT_7);
-                csi_tmp = rtl8168_eri_read(tp, 0xDC, 1, ERIAR_ExGMAC);
-                csi_tmp &= ~BIT_0;
-                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
-                csi_tmp |= BIT_0;
-                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
-
-                /*
-                if (aspm)
-                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
-                */
-
-                if (dev->mtu > ETH_DATA_LEN)
-                        RTL_W8(tp, MTPS, 0x27);
-
-                RTL_W8(tp, TDFNR, 0x8);
-
-                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_6);
-                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_6);
-                rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
-
-                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 1, ERIAR_ExGMAC);
-                csi_tmp |= BIT_4;
-                rtl8168_eri_write(tp, 0x1B0, 1, csi_tmp, ERIAR_ExGMAC);
-                csi_tmp = rtl8168_eri_read(tp, 0x1d0, 1, ERIAR_ExGMAC);
-                csi_tmp |= BIT_4 | BIT_1;
-                rtl8168_eri_write(tp, 0x1d0, 1, csi_tmp, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xCC, 4, 0x00000050, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xd0, 4, 0x00000060, ERIAR_ExGMAC);
-        } else if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
-                   tp->mcfg == CFG_METHOD_24 || tp->mcfg == CFG_METHOD_25 ||
-                   tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_29 ||
-                   tp->mcfg == CFG_METHOD_30 || tp->mcfg == CFG_METHOD_35 ||
-                   tp->mcfg == CFG_METHOD_36 || tp->mcfg == CFG_METHOD_37) {
-                set_offset70F(tp, 0x27);
-                set_offset79(tp, 0x50);
-                if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22)
-                        set_offset711(tp, 0x04);
-
-                rtl8168_eri_write(tp, 0xC8, 4, 0x00080002, ERIAR_ExGMAC);
-#ifdef ENABLE_LIB_SUPPORT
-                rtl8168_eri_write(tp, 0xCC, 1, 0x60, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xD0, 1, 0x70, ERIAR_ExGMAC);
-#else
-                rtl8168_eri_write(tp, 0xCC, 1, 0x38, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xD0, 1, 0x48, ERIAR_ExGMAC);
-#endif //ENABLE_LIB_SUPPORT
-                rtl8168_eri_write(tp, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
-
-                RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) | BIT_7);
-
-                csi_tmp = rtl8168_eri_read(tp, 0xDC, 1, ERIAR_ExGMAC);
-                csi_tmp &= ~BIT_0;
-                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
-                csi_tmp |= BIT_0;
-                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
-
-                if (tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36)
-                        rtl8168_set_mcu_ocp_bit(tp, 0xD438, (BIT_1 | BIT_0));
-
-                if (tp->mcfg == CFG_METHOD_26) {
-                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3C0);
-                        mac_ocp_data &= ~(BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
-                        mac_ocp_data |= 0x0FFF;
-                        rtl8168_mac_ocp_write(tp, 0xD3C0, mac_ocp_data);
-                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3C2);
-                        mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
-                        rtl8168_mac_ocp_write(tp, 0xD3C2, mac_ocp_data);
-                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3C4);
-                        mac_ocp_data |= BIT_0;
-                        rtl8168_mac_ocp_write(tp, 0xD3C4, mac_ocp_data);
-                } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-                           tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
-                           tp->mcfg == CFG_METHOD_37) {
-
-                        if (tp->RequireAdjustUpsTxLinkPulseTiming) {
-                                mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD412);
-                                mac_ocp_data &= ~(0x0FFF);
-                                mac_ocp_data |= tp->SwrCnt1msIni;
-                                rtl8168_mac_ocp_write(tp, 0xD412, mac_ocp_data);
-                        }
-
-                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE056);
-                        mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4);
-                        //mac_ocp_data |= (BIT_6 | BIT_5 | BIT_4);
-                        rtl8168_mac_ocp_write(tp, 0xE056, mac_ocp_data);
-
-                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE052);
-                        mac_ocp_data &= ~(BIT_15 | BIT_14 | BIT_13 | BIT_3);
-                        mac_ocp_data |= BIT_15;
-                        //mac_ocp_data |= BIT_3;
-                        rtl8168_mac_ocp_write(tp, 0xE052, mac_ocp_data);
-
-                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD420);
-                        mac_ocp_data &= ~(BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
-                        mac_ocp_data |= 0x45F;
-                        rtl8168_mac_ocp_write(tp, 0xD420, mac_ocp_data);
-
-                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE0D6);
-                        mac_ocp_data &= ~(BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
-                        mac_ocp_data |= 0x17F;
-                        rtl8168_mac_ocp_write(tp, 0xE0D6, mac_ocp_data);
-                }
-
-                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
-
-                RTL_W8(tp, 0x1B, RTL_R8(tp, 0x1B) & ~0x07);
-
-                RTL_W8(tp, TDFNR, 0x4);
-
-                RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~PMSTS_En);
-
-                /*
-                if (aspm)
-                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
-                */
-
-                if (dev->mtu > ETH_DATA_LEN)
-                        RTL_W8(tp, MTPS, 0x27);
-
-                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_6);
-                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_6);
-
-                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_7);
-
-                rtl8168_eri_write(tp, RSS_CTRL_8168, 4, 0x00000000, ERIAR_ExGMAC);
-
-                if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-                    tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
-                    tp->mcfg == CFG_METHOD_37) {
-                        rtl8168_mac_ocp_write(tp, 0xE054, 0x0000);
-
-                        rtl8168_eri_write(tp, 0x5F0, 2, 0x4000, ERIAR_ExGMAC);
-                } else {
-                        rtl8168_eri_write(tp, 0x5F0, 2, 0x4F87, ERIAR_ExGMAC);
-                }
-
-                if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-                    tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
-                    tp->mcfg == CFG_METHOD_37) {
-                        csi_tmp = rtl8168_eri_read(tp, 0xDC, 4, ERIAR_ExGMAC);
-                        csi_tmp |= (BIT_2 | BIT_3 | BIT_4);
-                        rtl8168_eri_write(tp, 0xDC, 4, csi_tmp, ERIAR_ExGMAC);
-                }
-
-                if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
-                    tp->mcfg == CFG_METHOD_24 || tp->mcfg == CFG_METHOD_25) {
-                        rtl8168_mac_ocp_write(tp, 0xC140, 0xFFFF);
-                } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-                           tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
-                           tp->mcfg == CFG_METHOD_37) {
-                        rtl8168_mac_ocp_write(tp, 0xC140, 0xFFFF);
-                        rtl8168_mac_ocp_write(tp, 0xC142, 0xFFFF);
-                }
-
-                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
-                csi_tmp &= ~BIT_12;
-                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
-
-                if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30 ||
-                    tp->mcfg == CFG_METHOD_35 || tp->mcfg == CFG_METHOD_36 ||
-                    tp->mcfg == CFG_METHOD_37) {
-                        csi_tmp = rtl8168_eri_read(tp, 0x2FC, 1, ERIAR_ExGMAC);
-                        csi_tmp &= ~(BIT_2);
-                        rtl8168_eri_write(tp, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
-                } else {
-                        csi_tmp = rtl8168_eri_read(tp, 0x2FC, 1, ERIAR_ExGMAC);
-                        csi_tmp &= ~(BIT_0 | BIT_1 | BIT_2);
-                        csi_tmp |= BIT_0;
-                        rtl8168_eri_write(tp, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
-                }
-
-                if (tp->mcfg != CFG_METHOD_37) {
-                        csi_tmp = rtl8168_eri_read(tp, 0x1D0, 1, ERIAR_ExGMAC);
-                        csi_tmp |= BIT_1;
-                        rtl8168_eri_write(tp, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
-                }
-        } else if (tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_27 ||
-                   tp->mcfg == CFG_METHOD_28) {
-                set_offset70F(tp, 0x27);
-                set_offset79(tp, 0x50);
-
-                rtl8168_eri_write(tp, 0xC8, 4, 0x00080002, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xCC, 1, 0x2F, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xD0, 1, 0x5F, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
-
-                RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) | BIT_7);
-
-                csi_tmp = rtl8168_eri_read(tp, 0xDC, 1, ERIAR_ExGMAC);
-                csi_tmp &= ~BIT_0;
-                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
-                csi_tmp |= BIT_0;
-                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
-
-                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
-
-                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_6);
-                RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_6);
-
-                RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_7);
-
-                rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
-                RTL_W8(tp, 0x1B, RTL_R8(tp, 0x1B) & ~0x07);
-
-                RTL_W8(tp, TDFNR, 0x4);
-
-                /*
-                if (aspm)
-                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
-                */
-
-                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
-                csi_tmp &= ~BIT_12;
-                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
-
-                csi_tmp = rtl8168_eri_read(tp, 0x2FC, 1, ERIAR_ExGMAC);
-                csi_tmp &= ~(BIT_0 | BIT_1 | BIT_2);
-                csi_tmp |= (BIT_0 | BIT_1);
-                rtl8168_eri_write(tp, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
-
-                csi_tmp = rtl8168_eri_read(tp, 0x1D0, 1, ERIAR_ExGMAC);
-                csi_tmp |= BIT_1;
-                rtl8168_eri_write(tp, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
-
-                if (dev->mtu > ETH_DATA_LEN)
-                        RTL_W8(tp, MTPS, 0x27);
-
-                if (tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28) {
-                        rtl8168_oob_mutex_lock(tp);
-                        rtl8168_eri_write(tp, 0x5F0, 2, 0x4F87, ERIAR_ExGMAC);
-                        rtl8168_oob_mutex_unlock(tp);
-                }
-
-                rtl8168_mac_ocp_write(tp, 0xC140, 0xFFFF);
-                rtl8168_mac_ocp_write(tp, 0xC142, 0xFFFF);
-
-                if (tp->mcfg == CFG_METHOD_28) {
-                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3E2);
-                        mac_ocp_data &= 0xF000;
-                        mac_ocp_data |= 0xAFD;
-                        rtl8168_mac_ocp_write(tp, 0xD3E2, mac_ocp_data);
-
-                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD3E4);
-                        mac_ocp_data &= 0xFF00;
-                        rtl8168_mac_ocp_write(tp, 0xD3E4, mac_ocp_data);
-
-                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE860);
-                        mac_ocp_data |= BIT_7;
-                        rtl8168_mac_ocp_write(tp, 0xE860, mac_ocp_data);
-                }
-        } else if (tp->mcfg == CFG_METHOD_31 || tp->mcfg == CFG_METHOD_32 ||
-                   tp->mcfg == CFG_METHOD_33 || tp->mcfg == CFG_METHOD_34) {
-                set_offset70F(tp, 0x27);
-                set_offset79(tp, 0x50);
-
-                rtl8168_eri_write(tp, 0xC8, 4, 0x00080002, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xCC, 1, 0x2F, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xD0, 1, 0x5F, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xE8, 4, 0x00100006, ERIAR_ExGMAC);
-
-                RTL_W32(tp, TxConfig, RTL_R32(tp, TxConfig) | BIT_7);
-
-                csi_tmp = rtl8168_eri_read(tp, 0xDC, 1, ERIAR_ExGMAC);
-                csi_tmp &= ~BIT_0;
-                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
-                csi_tmp |= BIT_0;
-                rtl8168_eri_write(tp, 0xDC, 1, csi_tmp, ERIAR_ExGMAC);
-
-                if (tp->RequireAdjustUpsTxLinkPulseTiming) {
-                        mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD412);
-                        mac_ocp_data &= ~(0x0FFF);
-                        mac_ocp_data |= tp->SwrCnt1msIni;
-                        rtl8168_mac_ocp_write(tp, 0xD412, mac_ocp_data);
-                }
-
-                mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE056);
-                mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4);
-                if (tp->HwPkgDet == 0x0F)
-                        mac_ocp_data |= (BIT_6 | BIT_5 | BIT_4);
-                rtl8168_mac_ocp_write(tp, 0xE056, mac_ocp_data);
-                if (tp->HwPkgDet == 0x0F)
-                        rtl8168_mac_ocp_write(tp, 0xEA80, 0x0003);
-                else
-                        rtl8168_mac_ocp_write(tp, 0xEA80, 0x0000);
-
-                rtl8168_oob_mutex_lock(tp);
-                mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xE052);
-                mac_ocp_data &= ~(BIT_3 | BIT_0);
-                if (tp->HwPkgDet == 0x0F)
-                        mac_ocp_data |= BIT_0;
-                rtl8168_mac_ocp_write(tp, 0xE052, mac_ocp_data);
-                rtl8168_oob_mutex_unlock(tp);
-
-                mac_ocp_data = rtl8168_mac_ocp_read(tp, 0xD420);
-                mac_ocp_data &= ~(BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0);
-                mac_ocp_data |= 0x45F;
-                rtl8168_mac_ocp_write(tp, 0xD420, mac_ocp_data);
-
-                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
-
-                RTL_W8(tp, 0x1B, RTL_R8(tp, 0x1B) & ~0x07);
-
-                RTL_W8(tp, TDFNR, 0x4);
-
-                RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~PMSTS_En);
-
-                /*
-                if (aspm)
-                RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7);
-                */
-
-                if (dev->mtu > ETH_DATA_LEN)
-                        RTL_W8(tp, MTPS, 0x27);
-
-                if (FALSE == HW_SUPP_SERDES_PHY(tp)) {
-                        RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_6);
-                        RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_6);
-                        RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_7);
-                } else {
-                        RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_6);
-                        RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_6);
-                        RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_7);
-                }
-
-                rtl8168_eri_write(tp, 0xC0, 2, 0x0000, ERIAR_ExGMAC);
-                rtl8168_eri_write(tp, 0xB8, 4, 0x00000000, ERIAR_ExGMAC);
-
-                rtl8168_oob_mutex_lock(tp);
-                if (tp->HwPkgDet == 0x0F)
-                        rtl8168_eri_write(tp, 0x5F0, 2, 0x4F00, ERIAR_ExGMAC);
-                else
-                        rtl8168_eri_write(tp, 0x5F0, 2, 0x4000, ERIAR_ExGMAC);
-                rtl8168_oob_mutex_unlock(tp);
-
-                csi_tmp = rtl8168_eri_read(tp, 0xDC, 4, ERIAR_ExGMAC);
-                csi_tmp |= (BIT_2 | BIT_3);
-                rtl8168_eri_write(tp, 0xDC, 4, csi_tmp, ERIAR_ExGMAC);
-
-                if (tp->mcfg == CFG_METHOD_32 || tp->mcfg == CFG_METHOD_33 ||
-                    tp->mcfg == CFG_METHOD_34) {
-                        csi_tmp = rtl8168_eri_read(tp, 0xD4, 4, ERIAR_ExGMAC);
-                        csi_tmp |= BIT_4;
-                        rtl8168_eri_write(tp, 0xD4, 4, csi_tmp, ERIAR_ExGMAC);
-                }
-
-                rtl8168_mac_ocp_write(tp, 0xC140, 0xFFFF);
-                rtl8168_mac_ocp_write(tp, 0xC142, 0xFFFF);
-
-                csi_tmp = rtl8168_eri_read(tp, 0x1B0, 4, ERIAR_ExGMAC);
-                csi_tmp &= ~BIT_12;
-                rtl8168_eri_write(tp, 0x1B0, 4, csi_tmp, ERIAR_ExGMAC);
-
-                csi_tmp = rtl8168_eri_read(tp, 0x2FC, 1, ERIAR_ExGMAC);
-                csi_tmp &= ~(BIT_0 | BIT_1);
-                csi_tmp |= BIT_0;
-                rtl8168_eri_write(tp, 0x2FC, 1, csi_tmp, ERIAR_ExGMAC);
-
-                csi_tmp = rtl8168_eri_read(tp, 0x1D0, 1, ERIAR_ExGMAC);
-                csi_tmp &= ~BIT_1;
-                rtl8168_eri_write(tp, 0x1D0, 1, csi_tmp, ERIAR_ExGMAC);
-        } else if (tp->mcfg == CFG_METHOD_1) {
-                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
-
-                if (dev->mtu > ETH_DATA_LEN) {
-                        pci_read_config_byte(pdev, 0x69, &device_control);
-                        device_control &= ~0x70;
-                        device_control |= 0x28;
-                        pci_write_config_byte(pdev, 0x69, device_control);
-                } else {
-                        pci_read_config_byte(pdev, 0x69, &device_control);
-                        device_control &= ~0x70;
-                        device_control |= 0x58;
-                        pci_write_config_byte(pdev, 0x69, device_control);
-                }
-        } else if (tp->mcfg == CFG_METHOD_2) {
-                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
-
-                if (dev->mtu > ETH_DATA_LEN) {
-                        pci_read_config_byte(pdev, 0x69, &device_control);
-                        device_control &= ~0x70;
-                        device_control |= 0x28;
-                        pci_write_config_byte(pdev, 0x69, device_control);
-
-                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | (1 << 0));
-                } else {
-                        pci_read_config_byte(pdev, 0x69, &device_control);
-                        device_control &= ~0x70;
-                        device_control |= 0x58;
-                        pci_write_config_byte(pdev, 0x69, device_control);
-
-                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~(1 << 0));
-                }
-        } else if (tp->mcfg == CFG_METHOD_3) {
-                RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
-
-                if (dev->mtu > ETH_DATA_LEN) {
-                        pci_read_config_byte(pdev, 0x69, &device_control);
-                        device_control &= ~0x70;
-                        device_control |= 0x28;
-                        pci_write_config_byte(pdev, 0x69, device_control);
-
-                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) | (1 << 0));
-                } else {
-                        pci_read_config_byte(pdev, 0x69, &device_control);
-                        device_control &= ~0x70;
-                        device_control |= 0x58;
-                        pci_write_config_byte(pdev, 0x69, device_control);
-
-                        RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~(1 << 0));
-                }
-        }
-
-        if ((tp->mcfg == CFG_METHOD_1) || (tp->mcfg == CFG_METHOD_2) || (tp->mcfg == CFG_METHOD_3)) {
-                /* csum offload command for RTL8168B/8111B */
-                tp->tx_tcp_csum_cmd = TxTCPCS;
-                tp->tx_udp_csum_cmd = TxUDPCS;
-                tp->tx_ip_csum_cmd = TxIPCS;
-                tp->tx_ipv6_csum_cmd = 0;
-        } else {
-                /* csum offload command for RTL8168C/8111C and RTL8168CP/8111CP */
-                tp->tx_tcp_csum_cmd = TxTCPCS_C;
-                tp->tx_udp_csum_cmd = TxUDPCS_C;
-                tp->tx_ip_csum_cmd = TxIPCS_C;
-                tp->tx_ipv6_csum_cmd = TxIPV6F_C;
-        }
-
-
-        //other hw parameters
-        if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 ||
-            tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_24 ||
-            tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 ||
-            tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28)
-                rtl8168_eri_write(tp, 0x2F8, 2, 0x1D8F, ERIAR_ExGMAC);
-
-        if (tp->bios_setting & BIT_28) {
-                if (tp->mcfg == CFG_METHOD_18 || tp->mcfg == CFG_METHOD_19 ||
-                    tp->mcfg == CFG_METHOD_20) {
-                        u32 gphy_val;
-
-                        rtl8168_mdio_write(tp, 0x1F, 0x0007);
-                        rtl8168_mdio_write(tp, 0x1E, 0x002C);
-                        gphy_val = rtl8168_mdio_read(tp, 0x16);
-                        gphy_val |= BIT_10;
-                        rtl8168_mdio_write(tp, 0x16, gphy_val);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0005);
-                        rtl8168_mdio_write(tp, 0x05, 0x8B80);
-                        gphy_val = rtl8168_mdio_read(tp, 0x06);
-                        gphy_val |= BIT_7;
-                        rtl8168_mdio_write(tp, 0x06, gphy_val);
-                        rtl8168_mdio_write(tp, 0x1F, 0x0000);
-                }
-        }
-
-        rtl8168_set_rx_q_num(tp, tp->num_hw_tot_en_rx_rings);
-
-        rtl8168_set_rx_vlan_filter(tp);
-#ifdef ENABLE_RSS_SUPPORT
-#ifdef ENABLE_LIB_SUPPORT
-        /* if lib queue not exist, default use rx queue 0 */
-        if (rtl8168_num_lib_rx_rings(tp) == 0)
-                mem_clear(tp->rss_indir_tbl, sizeof(tp->rss_indir_tbl));
-#endif //ENABLE_LIB_SUPPORT
-        rtl8168_config_rss(tp);
-#endif //ENABLE_RSS_SUPPORT
-        rtl8168_hw_clear_timer_int(dev);
-
-        rtl8168_enable_exit_l1_mask(tp);
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_25:
-                rtl8168_mac_ocp_write(tp, 0xD3C0, 0x0B00);
-                rtl8168_mac_ocp_write(tp, 0xD3C2, 0x0000);
-                break;
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                rtl8168_mac_ocp_write(tp, 0xE098, 0x0AA2);
-                break;
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-                rtl8168_mac_ocp_write(tp, 0xE098, 0xC302);
-                break;
-        }
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_23:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                rtl8168_disable_pci_offset_99(tp);
-                if (aspm) {
-                        if (tp->org_pci_offset_99 & (BIT_2 | BIT_5 | BIT_6))
-                                rtl8168_init_pci_offset_99(tp);
-                }
-                break;
-        }
-        switch (tp->mcfg) {
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26:
-        case CFG_METHOD_27:
-        case CFG_METHOD_28:
-        case CFG_METHOD_29:
-        case CFG_METHOD_30:
-        case CFG_METHOD_31:
-        case CFG_METHOD_32:
-        case CFG_METHOD_33:
-        case CFG_METHOD_34:
-        case CFG_METHOD_35:
-        case CFG_METHOD_36:
-        case CFG_METHOD_37:
-                rtl8168_disable_pci_offset_180(tp);
-                if (aspm) {
-                        if (tp->org_pci_offset_180 & (BIT_0|BIT_1))
-                                rtl8168_init_pci_offset_180(tp);
-                }
-                break;
-        }
-
-        tp->cp_cmd &= ~(EnableBist | Macdbgo_oe | Force_halfdup |
-                        Force_rxflow_en | Force_txflow_en | Cxpl_dbg_sel |
-                        ASF | Macdbgo_sel);
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0)
-        RTL_W16(tp, CPlusCmd, tp->cp_cmd);
-#else
-        rtl8168_hw_set_features(dev, dev->features);
-#endif
-
-        switch (tp->mcfg) {
-        case CFG_METHOD_16:
-        case CFG_METHOD_17:
-        case CFG_METHOD_18:
-        case CFG_METHOD_19:
-        case CFG_METHOD_20:
-        case CFG_METHOD_21:
-        case CFG_METHOD_22:
-        case CFG_METHOD_24:
-        case CFG_METHOD_25:
-        case CFG_METHOD_26: {
-                int timeout;
-                for (timeout = 0; timeout < 10; timeout++) {
-                        if ((rtl8168_eri_read(tp, 0x1AE, 2, ERIAR_ExGMAC) & BIT_13)==0)
-                                break;
-                        mdelay(1);
-                }
-        }
-        break;
-        }
-
-        RTL_W16(tp, RxMaxSize, tp->rx_buf_sz);
-
-        rtl8168_disable_rxdvgate(dev);
-
-        if (tp->mcfg == CFG_METHOD_11 || tp->mcfg == CFG_METHOD_12)
-                rtl8168_mac_loopback_test(tp);
-
-        if (!tp->pci_cfg_is_read) {
-                pci_read_config_byte(pdev, PCI_COMMAND, &tp->pci_cfg_space.cmd);
-                pci_read_config_word(pdev, PCI_BASE_ADDRESS_0, &tp->pci_cfg_space.io_base_l);
-                pci_read_config_word(pdev, PCI_BASE_ADDRESS_0 + 2, &tp->pci_cfg_space.io_base_h);
-                pci_read_config_word(pdev, PCI_BASE_ADDRESS_2, &tp->pci_cfg_space.mem_base_l);
-                pci_read_config_word(pdev, PCI_BASE_ADDRESS_2 + 2, &tp->pci_cfg_space.mem_base_h);
-                pci_read_config_word(pdev, PCI_BASE_ADDRESS_3, &tp->pci_cfg_space.resv_0x1c_l);
-                pci_read_config_word(pdev, PCI_BASE_ADDRESS_3 + 2, &tp->pci_cfg_space.resv_0x1c_h);
-                pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &tp->pci_cfg_space.ilr);
-                pci_read_config_word(pdev, PCI_BASE_ADDRESS_4, &tp->pci_cfg_space.resv_0x20_l);
-                pci_read_config_word(pdev, PCI_BASE_ADDRESS_4 + 2, &tp->pci_cfg_space.resv_0x20_h);
-                pci_read_config_word(pdev, PCI_BASE_ADDRESS_5, &tp->pci_cfg_space.resv_0x24_l);
-                pci_read_config_word(pdev, PCI_BASE_ADDRESS_5 + 2, &tp->pci_cfg_space.resv_0x24_h);
-                pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &tp->pci_cfg_space.resv_0x2c_l);
-                pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID + 2, &tp->pci_cfg_space.resv_0x2c_h);
-                if (tp->HwPcieSNOffset > 0) {
-                        tp->pci_cfg_space.pci_sn_l = rtl8168_csi_read(tp, tp->HwPcieSNOffset);
-                        tp->pci_cfg_space.pci_sn_h = rtl8168_csi_read(tp, tp->HwPcieSNOffset + 4);
-                }
-
-                tp->pci_cfg_is_read = 1;
-        }
-
-        rtl8168_dsm(dev, DSM_MAC_INIT);
-
-        /* Set Rx packet filter */
-        rtl8168_hw_set_rx_packet_filter(dev);
-
-#ifdef ENABLE_DASH_SUPPORT
-        if (tp->DASH && !tp->dash_printer_enabled)
-                NICChkTypeEnableDashInterrupt(tp);
-#endif
-
-        if (tp->HwSuppAspmClkIntrLock)
-                rtl8168_hw_aspm_clkreq_enable(tp, true);
-
-        rtl8168_disable_cfg9346_write(tp);
-
-        udelay(10);
-}
-
-void
-rtl8168_hw_start(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-#ifdef ENABLE_LIB_SUPPORT
-        rtl8168_init_lib_ring(tp);
-#endif
-
-        RTL_W8(tp, ChipCmd, CmdTxEnb | CmdRxEnb);
-
-        rtl8168_enable_interrupt(tp);
-
-        rtl8168_lib_reset_complete(tp);
-}
-
-static int
-rtl8168_change_mtu(struct net_device *dev,
-                   int new_mtu)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int ret = 0;
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0)
-        if (new_mtu < ETH_MIN_MTU)
-                return -EINVAL;
-        else if (new_mtu > tp->max_jumbo_frame_size)
-                new_mtu = tp->max_jumbo_frame_size;
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0)
-
-        dev->mtu = new_mtu;
-
-        tp->eee.tx_lpi_timer = dev->mtu + ETH_HLEN + 0x20;
-
-        if (!netif_running(dev))
-                goto out;
-
-        rtl8168_down(dev);
-
-        rtl8168_set_rxbufsize(tp, dev);
-
-        ret = rtl8168_init_ring(dev);
-
-        if (ret < 0)
-                goto err_out;
-
-#ifdef CONFIG_R8168_NAPI
-        rtl8168_enable_napi(tp);
-#endif//CONFIG_R8168_NAPI
-
-        if (tp->link_ok(dev))
-                rtl8168_link_on_patch(dev);
-        else
-                rtl8168_link_down_patch(dev);
-
-        //mod_timer(&tp->esd_timer, jiffies + RTL8168_ESD_TIMEOUT);
-        //mod_timer(&tp->link_timer, jiffies + RTL8168_LINK_TIMEOUT);
-out:
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0)
-        netdev_update_features(dev);
-#endif
-
-err_out:
-        return ret;
-}
-
-static inline void
-rtl8168_make_unusable_by_asic(struct RxDesc *desc)
-{
-        desc->addr = 0x0badbadbadbadbadull;
-        desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask);
-}
-
-static void
-rtl8168_free_rx_skb(struct rtl8168_private *tp,
-                    struct rtl8168_rx_ring *ring,
-                    struct sk_buff **sk_buff,
-                    struct RxDesc *desc,
-                    const u32 cur_rx)
-{
-        struct pci_dev *pdev = tp->pci_dev;
-
-        dma_unmap_single(&pdev->dev, ring->RxDescPhyAddr[cur_rx], tp->rx_buf_sz,
-                         DMA_FROM_DEVICE);
-        dev_kfree_skb(*sk_buff);
-        *sk_buff = NULL;
-        rtl8168_make_unusable_by_asic(desc);
-}
-
-void
-rtl8168_mark_to_asic(struct RxDesc *desc,
-                     u32 rx_buf_sz)
-{
-        u32 eor = le32_to_cpu(desc->opts1) & RingEnd;
-
-        WRITE_ONCE(desc->opts1, cpu_to_le32(DescOwn | eor | rx_buf_sz));
-}
-
-static inline void
-rtl8168_map_to_asic(struct RxDesc *desc,
-                    struct rtl8168_rx_ring *ring,
-                    dma_addr_t mapping,
-                    u32 rx_buf_sz,
-                    const u32 cur_rx)
-{
-        ring->RxDescPhyAddr[cur_rx] = mapping;
-        desc->addr = cpu_to_le64(mapping);
-        wmb();
-        rtl8168_mark_to_asic(desc, rx_buf_sz);
-}
-
-static int
-rtl8168_alloc_rx_skb(struct rtl8168_private *tp,
-                     struct rtl8168_rx_ring *ring,
-                     struct sk_buff **sk_buff,
-                     struct RxDesc *desc,
-                     int rx_buf_sz,
-                     const u32 cur_rx,
-                     u8 in_intr)
-{
-        struct sk_buff *skb;
-        dma_addr_t mapping;
-        int ret = 0;
-
-        if (in_intr)
-                skb = RTL_ALLOC_SKB_INTR(&tp->r8168napi[ring->index].napi,
-                                         rx_buf_sz + RTK_RX_ALIGN);
-        else
-                skb = dev_alloc_skb(rx_buf_sz + RTK_RX_ALIGN);
-
-        if (unlikely(!skb))
-                goto err_out;
-
-        if (!in_intr || !R8168_USE_NAPI_ALLOC_SKB)
-                skb_reserve(skb, RTK_RX_ALIGN);
-
-        mapping = dma_map_single(tp_to_dev(tp), skb->data, rx_buf_sz,
-                                 DMA_FROM_DEVICE);
-        if (unlikely(dma_mapping_error(tp_to_dev(tp), mapping))) {
-                if (unlikely(net_ratelimit()))
-                        netif_err(tp, drv, tp->dev, "Failed to map RX DMA!\n");
-                goto err_out;
-        }
-
-        *sk_buff = skb;
-        rtl8168_map_to_asic(desc, ring, mapping, rx_buf_sz, cur_rx);
-out:
-        return ret;
-
-err_out:
-        if (skb)
-                dev_kfree_skb(skb);
-        ret = -ENOMEM;
-        rtl8168_make_unusable_by_asic(desc);
-        goto out;
-}
-
-static void
-_rtl8168_rx_clear(struct rtl8168_private *tp, struct rtl8168_rx_ring *ring)
-{
-        int i;
-
-        for (i = 0; i < tp->num_rx_desc; i++) {
-                if (ring->Rx_skbuff[i]) {
-                        rtl8168_free_rx_skb(tp,
-                                            ring,
-                                            ring->Rx_skbuff + i,
-                                            rtl8168_get_rxdesc(tp,
-                                                               tp->RxDescArray,
-                                                               i,
-                                                               ring->index),
-                                            i);
-                        ring->Rx_skbuff[i] = NULL;
-                }
-        }
-}
-
-void
-rtl8168_rx_clear(struct rtl8168_private *tp)
-{
-        int i;
-
-        for (i = 0; i < tp->num_rx_rings; i++)
-                _rtl8168_rx_clear(tp, &tp->rx_ring[i]);
-}
-
-static u32
-rtl8168_rx_fill(struct rtl8168_private *tp,
-                struct rtl8168_rx_ring *ring,
-                struct net_device *dev,
-                u32 start,
-                u32 end,
-                u8 in_intr)
-{
-        u32 cur;
-
-        for (cur = start; end - cur > 0; cur++) {
-                int ret, i = cur % tp->num_rx_desc;
-
-                if (ring->Rx_skbuff[i])
-                        continue;
-
-                ret = rtl8168_alloc_rx_skb(tp,
-                                           ring,
-                                           ring->Rx_skbuff + i,
-                                           rtl8168_get_rxdesc(tp,
-                                                           tp->RxDescArray,
-                                                           i, ring->index),
-                                           tp->rx_buf_sz,
-                                           i,
-                                           in_intr);
-                if (ret < 0)
-                        break;
-        }
-        return cur - start;
-}
-
-static inline void
-rtl8168_mark_as_last_descriptor(struct RxDesc *desc)
-{
-        desc->opts1 |= cpu_to_le32(RingEnd);
-}
-
-static void
-rtl8168_desc_addr_fill(struct rtl8168_private *tp)
-{
-        int i;
-
-        for (i = 0; i < tp->num_tx_rings; i++) {
-                struct rtl8168_tx_ring *ring = &tp->tx_ring[i];
-                RTL_W32(tp, ring->tdsar_reg, ((u64)ring->TxPhyAddr & DMA_BIT_MASK(32)));
-                RTL_W32(tp, ring->tdsar_reg + 4, ((u64)ring->TxPhyAddr >> 32));
-        }
-
-#ifdef ENABLE_LIB_SUPPORT
-        /*
-         * The lib tx q1 polling may be set after tx is disabled. If lib tx q1
-         * is released, after enable tx, device will try to access invalid tx q1
-         * desc base address. Set tx q1 desc base address to tx q0 desc base
-         * address to let device to access the valid address and clear tx q1
-         * polling bit after enable tx.
-         */
-        if (rtl8168_lib_tx_ring_released(tp)) {
-                struct rtl8168_tx_ring *ring = &tp->tx_ring[0];
-                u16 tdsar_reg = TxHDescStartAddrLow;
-                RTL_W32(tp, tdsar_reg, ((u64)ring->TxPhyAddr & DMA_BIT_MASK(32)));
-                RTL_W32(tp, tdsar_reg + 4, ((u64)ring->TxPhyAddr >> 32));
-        }
-#endif
-
-        RTL_W32(tp, RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_BIT_MASK(32)));
-        RTL_W32(tp, RxDescAddrLow + 4, ((u64) tp->RxPhyAddr >> 32));
-}
-
-static void
-rtl8168_tx_desc_init(struct rtl8168_private *tp)
-{
-        int i;
-
-        for (i = 0; i < tp->num_tx_rings; i++) {
-                struct rtl8168_tx_ring *ring = &tp->tx_ring[i];
-                mem_clear(ring->TxDescArray, ring->TxDescAllocSize);
-
-                ring->TxDescArray[ring->num_tx_desc - 1].opts1 = cpu_to_le32(RingEnd);
-        }
-}
-
-static void
-rtl8168_rx_desc_offset0_init(struct rtl8168_private *tp, int own)
-{
-        struct rtl8168_rx_ring *ring = &tp->rx_ring[0];
-        struct RxDesc *desc;
-        int ownbit = 0;
-        int i;
-
-        if (tp->RxDescArray == NULL)
-                return;
-
-        if (own)
-                ownbit = DescOwn;
-
-        for (i = 0; i < tp->num_rx_desc; i++) {
-                desc = rtl8168_get_rxdesc(tp, tp->RxDescArray, i,
-                                          ring->index);
-                if (i == (tp->num_rx_desc - 1))
-                        desc->opts1 = cpu_to_le32((ownbit | RingEnd) | (unsigned long)tp->rx_buf_sz);
-                else
-                        desc->opts1 = cpu_to_le32(ownbit | (unsigned long)tp->rx_buf_sz);
-        }
-}
-
-static void
-rtl8168_rx_desc_init(struct rtl8168_private *tp)
-{
-        if (!tp->RxDescArray)
-                return;
-
-        if (rtl8168_num_lib_rx_rings(tp) > 0)
-                return;
-
-        mem_clear(tp->RxDescArray, tp->RxDescAllocSize);
-}
-
-int
-rtl8168_init_ring(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int i;
-
-        rtl8168_init_ring_indexes(tp);
-
-        rtl8168_tx_desc_init(tp);
-        rtl8168_rx_desc_init(tp);
-
-        for (i = 0; i < tp->num_tx_rings; i++) {
-                struct rtl8168_tx_ring *ring = &tp->tx_ring[i];
-                mem_clear(ring->tx_skb, sizeof(ring->tx_skb));
-        }
-
-        for (i = 0; i < tp->num_rx_rings; i++) {
-                struct rtl8168_rx_ring *ring = &tp->rx_ring[i];
-
-                mem_clear(ring->Rx_skbuff, sizeof(ring->Rx_skbuff));
-                if (rtl8168_rx_fill(tp, ring, dev, 0, tp->num_rx_desc, 0) != tp->num_rx_desc)
-                        goto err_out;
-
-                rtl8168_mark_as_last_descriptor(rtl8168_get_rxdesc(tp,
-                                                tp->RxDescArray,
-                                                tp->num_rx_desc - 1,
-                                                ring->index));
-        }
-
-
-        return 0;
-
-err_out:
-        rtl8168_rx_clear(tp);
-        return -ENOMEM;
-}
-
-static void
-rtl8168_unmap_tx_skb(struct pci_dev *pdev,
-                     struct ring_info *tx_skb,
-                     struct TxDesc *desc)
-{
-        unsigned int len = tx_skb->len;
-
-        dma_unmap_single(&pdev->dev, le64_to_cpu(desc->addr), len, DMA_TO_DEVICE);
-
-        desc->opts1 = cpu_to_le32(RTK_MAGIC_DEBUG_VALUE);
-        desc->opts2 = 0x00;
-        desc->addr = 0x00;
-        tx_skb->len = 0;
-}
-
-static void
-rtl8168_tx_clear_range(struct rtl8168_private *tp,
-                       struct rtl8168_tx_ring *ring,
-                       u32 start,
-                       unsigned int n)
-{
-        unsigned int i;
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)
-        struct net_device *dev = tp->dev;
-#endif
-
-        for (i = 0; i < n; i++) {
-                unsigned int entry = (start + i) % ring->num_tx_desc;
-                struct ring_info *tx_skb = ring->tx_skb + entry;
-                unsigned int len = tx_skb->len;
-
-                if (len) {
-                        struct sk_buff *skb = tx_skb->skb;
-
-                        rtl8168_unmap_tx_skb(tp->pci_dev, tx_skb,
-                                             ring->TxDescArray + entry);
-                        if (skb) {
-                                RTLDEV->stats.tx_dropped++;
-                                dev_kfree_skb_any(skb);
-                                tx_skb->skb = NULL;
-                        }
-                }
-        }
-}
-
-void
-rtl8168_tx_clear(struct rtl8168_private *tp)
-{
-        int i;
-
-        for (i = 0; i < tp->num_tx_rings; i++) {
-                struct rtl8168_tx_ring *ring = &tp->tx_ring[i];
-                rtl8168_tx_clear_range(tp, ring, ring->dirty_tx, ring->num_tx_desc);
-                ring->cur_tx = ring->dirty_tx = 0;
-        }
-}
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
-static void rtl8168_schedule_reset_work(struct rtl8168_private *tp)
-{
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-        set_bit(R8168_FLAG_TASK_RESET_PENDING, tp->task_flags);
-        schedule_delayed_work(&tp->reset_task, 4);
-#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-}
-
-static void rtl8168_schedule_esd_work(struct rtl8168_private *tp)
-{
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-        set_bit(R8168_FLAG_TASK_ESD_CHECK_PENDING, tp->task_flags);
-        schedule_delayed_work(&tp->esd_task, RTL8168_ESD_TIMEOUT);
-#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-}
-
-static void rtl8168_schedule_linkchg_work(struct rtl8168_private *tp)
-{
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-        set_bit(R8168_FLAG_TASK_LINKCHG_CHECK_PENDING, tp->task_flags);
-        schedule_delayed_work(&tp->linkchg_task, RTL8168_LINK_TIMEOUT);
-#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-}
-
-#define rtl8168_cancel_schedule_reset_work(a)
-#define rtl8168_cancel_schedule_esd_work(a)
-#define rtl8168_cancel_schedule_linkchg_work(a)
-
-#else
-static void rtl8168_schedule_reset_work(struct rtl8168_private *tp)
-{
-        set_bit(R8168_FLAG_TASK_RESET_PENDING, tp->task_flags);
-        schedule_delayed_work(&tp->reset_task, 4);
-}
-
-static void rtl8168_cancel_schedule_reset_work(struct rtl8168_private *tp)
-{
-        struct work_struct *work = &tp->reset_task.work;
-
-        if (!work->func) return;
-
-        cancel_delayed_work_sync(&tp->reset_task);
-}
-
-static void rtl8168_schedule_esd_work(struct rtl8168_private *tp)
-{
-        set_bit(R8168_FLAG_TASK_ESD_CHECK_PENDING, tp->task_flags);
-        schedule_delayed_work(&tp->esd_task, RTL8168_ESD_TIMEOUT);
-}
-
-static void rtl8168_cancel_schedule_esd_work(struct rtl8168_private *tp)
-{
-        struct work_struct *work = &tp->esd_task.work;
-
-        if (!work->func) return;
-
-        cancel_delayed_work_sync(&tp->esd_task);
-}
-
-static void rtl8168_schedule_linkchg_work(struct rtl8168_private *tp)
-{
-        set_bit(R8168_FLAG_TASK_LINKCHG_CHECK_PENDING, tp->task_flags);
-        schedule_delayed_work(&tp->linkchg_task, RTL8168_LINK_TIMEOUT);
-}
-
-static void rtl8168_cancel_schedule_linkchg_work(struct rtl8168_private *tp)
-{
-        struct work_struct *work = &tp->linkchg_task.work;
-
-        if (!work->func) return;
-
-        cancel_delayed_work_sync(&tp->linkchg_task);
-}
-#endif
-
-static void rtl8168_init_all_schedule_work(struct rtl8168_private *tp)
-{
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
-        INIT_WORK(&tp->reset_task, rtl8168_reset_task, dev);
-        INIT_WORK(&tp->esd_task, rtl8168_esd_task, dev);
-        INIT_WORK(&tp->linkchg_task, rtl8168_linkchg_task, dev);
-#else
-        INIT_DELAYED_WORK(&tp->reset_task, rtl8168_reset_task);
-        INIT_DELAYED_WORK(&tp->esd_task, rtl8168_esd_task);
-        INIT_DELAYED_WORK(&tp->linkchg_task, rtl8168_linkchg_task);
-#endif
-}
-
-static void rtl8168_cancel_all_schedule_work(struct rtl8168_private *tp)
-{
-        rtl8168_cancel_schedule_reset_work(tp);
-        rtl8168_cancel_schedule_esd_work(tp);
-        rtl8168_cancel_schedule_linkchg_work(tp);
-}
-
-static void
-rtl8168_wait_for_irq_complete(struct rtl8168_private *tp)
-{
-        if (tp->features & RTL_FEATURE_MSIX) {
-                int i;
-                for (i = 0; i < tp->irq_nvecs; i++)
-                        synchronize_irq(tp->irq_tbl[i].vector);
-        } else {
-                synchronize_irq(tp->dev->irq);
-        }
-}
-
-void
-_rtl8168_wait_for_quiescence(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        /* Wait for any pending NAPI task to complete */
-#ifdef CONFIG_R8168_NAPI
-        rtl8168_disable_napi(tp);
-#endif//CONFIG_R8168_NAPI
-
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,67)
-        /* Give a racing hard_start_xmit a few cycles to complete. */
-        synchronize_net();
-#endif
-        rtl8168_irq_mask_and_ack(tp);
-
-        rtl8168_wait_for_irq_complete(tp);
-}
-
-static void
-rtl8168_wait_for_quiescence(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        //suppress unused variable
-        (void)(tp);
-
-        _rtl8168_wait_for_quiescence(dev);
-
-#ifdef CONFIG_R8168_NAPI
-        rtl8168_enable_napi(tp);
-#endif //CONFIG_R8168_NAPI
-}
-
-static int rtl8168_rx_nostuck(struct rtl8168_private *tp)
-{
-        int i, ret = 1;
-        for (i = 0; i < tp->num_rx_rings; i++)
-                ret &= (tp->rx_ring[i].dirty_rx == tp->rx_ring[i].cur_rx);
-        return ret;
-}
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
-static void rtl8168_reset_task(void *_data)
-{
-        struct net_device *dev = _data;
-        struct rtl8168_private *tp = netdev_priv(dev);
-#else
-static void rtl8168_reset_task(struct work_struct *work)
-{
-        struct rtl8168_private *tp =
-                container_of(work, struct rtl8168_private, reset_task.work);
-        struct net_device *dev = tp->dev;
-#endif
-        u32 budget = ~(u32)0;
-        int i;
-
-        rtnl_lock();
-
-        if (!netif_running(dev) ||
-            test_bit(R8168_FLAG_DOWN, tp->task_flags) ||
-            !test_and_clear_bit(R8168_FLAG_TASK_RESET_PENDING, tp->task_flags))
-                goto out_unlock;
-
-        rtl8168_wait_for_quiescence(dev);
-
-        for (i = 0; i < tp->num_rx_rings; i++) {
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
-                rtl8168_rx_interrupt(dev, tp, &tp->rx_ring[i], &budget);
-#else
-                rtl8168_rx_interrupt(dev, tp, &tp->rx_ring[i], budget);
-#endif	//LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
-        }
-
-        netif_carrier_off(dev);
-        netif_tx_disable(dev);
-        rtl8168_hw_reset(dev);
-
-        rtl8168_tx_clear(tp);
-
-        if (rtl8168_rx_nostuck(tp)) {
-                rtl8168_rx_clear(tp);
-                rtl8168_init_ring(dev);
-                rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising);
-        } else {
-                if (unlikely(net_ratelimit())) {
-                        struct rtl8168_private *tp = netdev_priv(dev);
-
-                        if (netif_msg_intr(tp)) {
-                                printk(PFX KERN_EMERG
-                                       "%s: Rx buffers shortage\n", dev->name);
-                        }
-                }
-                rtl8168_schedule_reset_work(tp);
-        }
-
-out_unlock:
-        rtnl_unlock();
-}
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
-static void rtl8168_esd_task(void *_data)
-{
-        struct net_device *dev = _data;
-        struct rtl8168_private *tp = netdev_priv(dev);
-#else
-static void rtl8168_esd_task(struct work_struct *work)
-{
-        struct rtl8168_private *tp =
-                container_of(work, struct rtl8168_private, esd_task.work);
-        struct net_device *dev = tp->dev;
-#endif
-        rtnl_lock();
-
-        if (!netif_running(dev) ||
-            test_bit(R8168_FLAG_DOWN, tp->task_flags) ||
-            !test_and_clear_bit(R8168_FLAG_TASK_ESD_CHECK_PENDING, tp->task_flags))
-                goto out_unlock;
-
-        rtl8168_esd_checker(tp);
-
-        rtl8168_schedule_esd_work(tp);
-
-out_unlock:
-        rtnl_unlock();
-}
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)
-static void rtl8168_linkchg_task(void *_data)
-{
-        struct net_device *dev = _data;
-        //struct rtl8168_private *tp = netdev_priv(dev);
-#else
-static void rtl8168_linkchg_task(struct work_struct *work)
-{
-        struct rtl8168_private *tp =
-                container_of(work, struct rtl8168_private, linkchg_task.work);
-        struct net_device *dev = tp->dev;
-#endif
-        rtnl_lock();
-
-        if (!netif_running(dev) ||
-            test_bit(R8168_FLAG_DOWN, tp->task_flags) ||
-            !test_and_clear_bit(R8168_FLAG_TASK_LINKCHG_CHECK_PENDING, tp->task_flags))
-                goto out_unlock;
-
-        rtl8168_check_link_status(dev);
-
-        rtl8168_schedule_linkchg_work(tp);
-
-out_unlock:
-        rtnl_unlock();
-}
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0)
-static void
-rtl8168_tx_timeout(struct net_device *dev, unsigned int txqueue)
-#else
-static void
-rtl8168_tx_timeout(struct net_device *dev)
-#endif
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        /* Let's wait a bit while any (async) irq lands on */
-        rtl8168_schedule_reset_work(tp);
-}
-
-static u32
-rtl8168_get_txd_opts1(struct rtl8168_tx_ring *ring,
-                      u32 opts1,
-                      u32 len,
-                      unsigned int entry)
-{
-        u32 status = opts1 | len;
-
-        if (entry == ring->num_tx_desc - 1)
-                status |= RingEnd;
-
-        return status;
-}
-
-static int
-rtl8168_xmit_frags(struct rtl8168_private *tp,
-                   struct rtl8168_tx_ring *ring,
-                   struct sk_buff *skb,
-                   const u32 *opts)
-{
-        struct skb_shared_info *info = skb_shinfo(skb);
-        unsigned int cur_frag, entry;
-        struct TxDesc *txd = NULL;
-        const unsigned char nr_frags = info->nr_frags;
-
-        entry = ring->cur_tx;
-        for (cur_frag = 0; cur_frag < nr_frags; cur_frag++) {
-                skb_frag_t *frag = info->frags + cur_frag;
-                dma_addr_t mapping;
-                u32 status, len;
-                void *addr;
-
-                entry = (entry + 1) % ring->num_tx_desc;
-
-                txd = ring->TxDescArray + entry;
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0)
-                len = frag->size;
-                addr = ((void *) page_address(frag->page)) + frag->page_offset;
-#else
-                len = skb_frag_size(frag);
-                addr = skb_frag_address(frag);
-#endif
-                mapping = dma_map_single(tp_to_dev(tp), addr, len, DMA_TO_DEVICE);
-
-                if (unlikely(dma_mapping_error(tp_to_dev(tp), mapping))) {
-                        if (unlikely(net_ratelimit()))
-                                netif_err(tp, drv, tp->dev,
-                                          "Failed to map TX fragments DMA!\n");
-                        goto err_out;
-                }
-
-                /* anti gcc 2.95.3 bugware (sic) */
-                status = rtl8168_get_txd_opts1(ring, opts[0], len, entry);
-                if (cur_frag == (nr_frags - 1)) {
-                        ring->tx_skb[entry].skb = skb;
-                        status |= LastFrag;
-                }
-
-                txd->addr = cpu_to_le64(mapping);
-
-                ring->tx_skb[entry].len = len;
-
-                txd->opts2 = cpu_to_le32(opts[1]);
-                wmb();
-                txd->opts1 = cpu_to_le32(status);
-        }
-
-        return cur_frag;
-
-err_out:
-        rtl8168_tx_clear_range(tp, ring, ring->cur_tx + 1, cur_frag);
-        return -EIO;
-}
-
-static inline
-__be16 get_protocol(struct sk_buff *skb)
-{
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)
-        return vlan_get_protocol(skb);
-#else
-        __be16 protocol;
-
-        if (skb->protocol == htons(ETH_P_8021Q))
-                protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
-        else
-                protocol = skb->protocol;
-
-        return protocol;
-#endif
-}
-
-static bool rtl8168_skb_pad(struct sk_buff *skb)
-{
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,19,0)
-        if (skb_padto(skb, ETH_ZLEN))
-                return false;
-        skb_put(skb, ETH_ZLEN - skb->len);
-        return true;
-#else
-        return !eth_skb_pad(skb);
-#endif
-}
-
-static inline bool
-rtl8168_tx_csum(struct sk_buff *skb,
-                struct net_device *dev,
-                u32 *opts)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u32 csum_cmd = 0;
-        u8 sw_calc_csum = FALSE;
-
-        if (skb->ip_summed == CHECKSUM_PARTIAL) {
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
-                const struct iphdr *ip = skb->nh.iph;
-
-                if (dev->features & NETIF_F_IP_CSUM) {
-                        if (ip->protocol == IPPROTO_TCP)
-                                csum_cmd = tp->tx_ip_csum_cmd | tp->tx_tcp_csum_cmd;
-                        else if (ip->protocol == IPPROTO_UDP)
-                                csum_cmd = tp->tx_ip_csum_cmd | tp->tx_udp_csum_cmd;
-                        else if (ip->protocol == IPPROTO_IP)
-                                csum_cmd = tp->tx_ip_csum_cmd;
-                }
-#else
-                u8 ip_protocol = IPPROTO_RAW;
-
-                switch (get_protocol(skb)) {
-                case  __constant_htons(ETH_P_IP):
-                        if (dev->features & NETIF_F_IP_CSUM) {
-                                ip_protocol = ip_hdr(skb)->protocol;
-                                csum_cmd = tp->tx_ip_csum_cmd;
-                        }
-                        break;
-                case  __constant_htons(ETH_P_IPV6):
-                        if (dev->features & NETIF_F_IPV6_CSUM) {
-                                if (skb_transport_offset(skb) > 0 && skb_transport_offset(skb) <= TCPHO_MAX) {
-                                        ip_protocol = ipv6_hdr(skb)->nexthdr;
-                                        csum_cmd = tp->tx_ipv6_csum_cmd;
-                                        csum_cmd |= skb_transport_offset(skb) << TCPHO_SHIFT;
-                                }
-                        }
-                        break;
-                default:
-                        if (unlikely(net_ratelimit()))
-                                dprintk("checksum_partial proto=%x!\n", skb->protocol);
-                        break;
-                }
-
-                if (ip_protocol == IPPROTO_TCP)
-                        csum_cmd |= tp->tx_tcp_csum_cmd;
-                else if (ip_protocol == IPPROTO_UDP)
-                        csum_cmd |= tp->tx_udp_csum_cmd;
-#endif
-                if (csum_cmd == 0) {
-                        sw_calc_csum = TRUE;
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-                        WARN_ON(1); /* we need a WARN() */
-#endif
-                }
-        }
-
-        if (csum_cmd != 0) {
-                if (tp->ShortPacketSwChecksum && skb->len < ETH_ZLEN) {
-                        sw_calc_csum = TRUE;
-                        if (!rtl8168_skb_pad(skb))
-                                return false;
-                } else {
-                        if ((tp->mcfg == CFG_METHOD_1) || (tp->mcfg == CFG_METHOD_2) || (tp->mcfg == CFG_METHOD_3))
-                                opts[0] |= csum_cmd;
-                        else
-                                opts[1] |= csum_cmd;
-                }
-        }
-
-        if (tp->UseSwPaddingShortPkt && skb->len < ETH_ZLEN)
-                if (!rtl8168_skb_pad(skb))
-                        return false;
-
-        if (sw_calc_csum) {
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) && LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,7)
-                skb_checksum_help(&skb, 0);
-#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) && LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10)
-                skb_checksum_help(skb, 0);
-#else
-                skb_checksum_help(skb);
-#endif
-        }
-
-        return true;
-}
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)
-/* r8169_csum_workaround()
- * The hw limits the value the transport offset. When the offset is out of the
- * range, calculate the checksum by sw.
- */
-static void r8168_csum_workaround(struct rtl8168_private *tp,
-                                  struct sk_buff *skb)
-{
-        if (skb_shinfo(skb)->gso_size) {
-                netdev_features_t features = tp->dev->features;
-                struct sk_buff *segs, *nskb;
-
-                features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
-                segs = skb_gso_segment(skb, features);
-                if (IS_ERR(segs) || !segs)
-                        goto drop;
-
-                do {
-                        nskb = segs;
-                        segs = segs->next;
-                        nskb->next = NULL;
-                        rtl8168_start_xmit(nskb, tp->dev);
-                } while (segs);
-
-                dev_consume_skb_any(skb);
-        } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
-                if (skb_checksum_help(skb) < 0)
-                        goto drop;
-
-                rtl8168_start_xmit(skb, tp->dev);
-        } else {
-                struct net_device_stats *stats;
-
-drop:
-                stats = &tp->dev->stats;
-                stats->tx_dropped++;
-                dev_kfree_skb_any(skb);
-        }
-}
-
-/* msdn_giant_send_check()
- * According to the document of microsoft, the TCP Pseudo Header excludes the
- * packet length for IPv6 TCP large packets.
- */
-static int msdn_giant_send_check(struct sk_buff *skb)
-{
-        const struct ipv6hdr *ipv6h;
-        struct tcphdr *th;
-        int ret;
-
-        ret = skb_cow_head(skb, 0);
-        if (ret)
-                return ret;
-
-        ipv6h = ipv6_hdr(skb);
-        th = tcp_hdr(skb);
-
-        th->check = 0;
-        th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
-
-        return ret;
-}
-#endif
-
-static bool rtl8168_tx_slots_avail(struct rtl8168_private *tp,
-                                   struct rtl8168_tx_ring *ring)
-{
-        unsigned int slots_avail = READ_ONCE(ring->dirty_tx) + ring->num_tx_desc
-                                   - READ_ONCE(ring->cur_tx);
-
-        /* A skbuff with nr_frags needs nr_frags+1 entries in the tx queue */
-        return slots_avail > MAX_SKB_FRAGS;
-}
-
-static netdev_tx_t
-rtl8168_start_xmit(struct sk_buff *skb,
-                   struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        unsigned int entry;
-        struct TxDesc *txd;
-        dma_addr_t mapping;
-        u32 len;
-        u32 opts[2];
-        netdev_tx_t ret = NETDEV_TX_OK;
-        unsigned long large_send;
-        int frags;
-        const u16 queue_mapping = skb_get_queue_mapping(skb);
-        struct rtl8168_tx_ring *ring;
-        bool stop_queue;
-
-        assert(queue_mapping < tp->num_tx_rings);
-
-        ring = &tp->tx_ring[queue_mapping];
-
-        if (unlikely(!rtl8168_tx_slots_avail(tp, ring))) {
-                if (netif_msg_drv(tp)) {
-                        printk(KERN_ERR
-                               "%s: BUG! Tx Ring full when queue awake!\n",
-                               dev->name);
-                }
-                goto err_stop;
-        }
-
-        entry = ring->cur_tx % ring->num_tx_desc;
-        txd = ring->TxDescArray + entry;
-
-        if (unlikely(le32_to_cpu(txd->opts1) & DescOwn)) {
-                if (netif_msg_drv(tp)) {
-                        printk(KERN_ERR
-                               "%s: BUG! Tx Desc is own by hardware!\n",
-                               dev->name);
-                }
-                goto err_stop;
-        }
-
-        opts[0] = DescOwn;
-        opts[1] = rtl8168_tx_vlan_tag(tp, skb);
-
-        large_send = 0;
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-        if (dev->features & (NETIF_F_TSO | NETIF_F_TSO6)) {
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
-                u32 mss = skb_shinfo(skb)->tso_size;
-#else
-                u32 mss = skb_shinfo(skb)->gso_size;
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)
-
-                /* TCP Segmentation Offload (or TCP Large Send) */
-                if (mss) {
-                        if ((tp->mcfg == CFG_METHOD_1) ||
-                            (tp->mcfg == CFG_METHOD_2) ||
-                            (tp->mcfg == CFG_METHOD_3)) {
-                                opts[0] |= LargeSend | (min(mss, MSS_MAX) << 16);
-                                large_send = 1;
-                        } else {
-                                switch (get_protocol(skb)) {
-                                case __constant_htons(ETH_P_IP):
-                                        if (skb_transport_offset(skb) <= GTTCPHO_MAX) {
-                                                opts[0] |= GiantSendv4;
-                                                opts[0] |= skb_transport_offset(skb) << GTTCPHO_SHIFT;
-                                                opts[1] |= min(mss, MSS_MAX) << 18;
-                                                large_send = 1;
-                                        }
-                                        break;
-                                case __constant_htons(ETH_P_IPV6):
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)
-                                        if (msdn_giant_send_check(skb)) {
-                                                r8168_csum_workaround(tp, skb);
-                                                goto out;
-                                        }
-#endif
-                                        if (skb_transport_offset(skb) <= GTTCPHO_MAX) {
-                                                opts[0] |= GiantSendv6;
-                                                opts[0] |= skb_transport_offset(skb) << GTTCPHO_SHIFT;
-                                                opts[1] |= min(mss, MSS_MAX) << 18;
-                                                large_send = 1;
-                                        }
-                                        break;
-                                default:
-                                        if (unlikely(net_ratelimit()))
-                                                dprintk("tso proto=%x!\n", skb->protocol);
-                                        break;
-                                }
-                        }
-
-                        if (large_send == 0)
-                                goto err_dma_0;
-                }
-        }
-#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-
-        if (large_send == 0) {
-                if (unlikely(!rtl8168_tx_csum(skb, dev, opts)))
-                        goto err_dma_0;
-        }
-
-        frags = rtl8168_xmit_frags(tp, ring, skb, opts);
-        if (unlikely(frags < 0))
-                goto err_dma_0;
-        if (frags) {
-                len = skb_headlen(skb);
-                opts[0] |= FirstFrag;
-        } else {
-                len = skb->len;
-
-                ring->tx_skb[entry].skb = skb;
-
-                opts[0] |= FirstFrag | LastFrag;
-        }
-
-        opts[0] = rtl8168_get_txd_opts1(ring, opts[0], len, entry);
-        mapping = dma_map_single(tp_to_dev(tp), skb->data, len, DMA_TO_DEVICE);
-        if (unlikely(dma_mapping_error(tp_to_dev(tp), mapping))) {
-                if (unlikely(net_ratelimit()))
-                        netif_err(tp, drv, dev, "Failed to map TX DMA!\n");
-                goto err_dma_1;
-        }
-        ring->tx_skb[entry].len = len;
-        txd->addr = cpu_to_le64(mapping);
-        txd->opts2 = cpu_to_le32(opts[1]);
-        wmb();
-        txd->opts1 = cpu_to_le32(opts[0]);
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0)
-        dev->trans_start = jiffies;
-#else
-        skb_tx_timestamp(skb);
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0)
-
-        /* rtl_tx needs to see descriptor changes before updated ring->cur_tx */
-        smp_wmb();
-
-        WRITE_ONCE(ring->cur_tx, ring->cur_tx + frags + 1);
-
-        stop_queue = !rtl8168_tx_slots_avail(tp, ring);
-        if (unlikely(stop_queue)) {
-                /* Avoid wrongly optimistic queue wake-up: rtl_tx thread must
-                 * not miss a ring update when it notices a stopped queue.
-                 */
-                smp_wmb();
-                netif_stop_subqueue(dev, queue_mapping);
-        }
-
-        rtl8168_doorbell(ring);    /* set polling bit */
-
-        if (unlikely(stop_queue)) {
-                /* Sync with rtl_tx:
-                 * - publish queue status and cur_tx ring index (write barrier)
-                 * - refresh dirty_tx ring index (read barrier).
-                 * May the current thread have a pessimistic view of the ring
-                 * status and forget to wake up queue, a racing rtl_tx thread
-                 * can't.
-                 */
-                smp_mb();
-                if (rtl8168_tx_slots_avail(tp, ring))
-                        netif_start_subqueue(dev, queue_mapping);
-        }
-
-out:
-        return ret;
-err_dma_1:
-        ring->tx_skb[entry].skb = NULL;
-        rtl8168_tx_clear_range(tp, ring, ring->cur_tx + 1, frags);
-err_dma_0:
-        RTLDEV->stats.tx_dropped++;
-        dev_kfree_skb_any(skb);
-        ret = NETDEV_TX_OK;
-        goto out;
-err_stop:
-        netif_tx_disable(dev);
-        ret = NETDEV_TX_BUSY;
-        RTLDEV->stats.tx_dropped++;
-        goto out;
-}
-
-static void
-rtl8168_tx_interrupt(struct rtl8168_tx_ring *ring)
-{
-        struct rtl8168_private *tp = ring->priv;
-        struct net_device *dev = tp->dev;
-        unsigned int dirty_tx, tx_left;
-
-        assert(dev != NULL);
-        assert(tp != NULL);
-
-#ifdef ENABLE_LIB_SUPPORT
-        if (ring->index > 0) {
-                rtl8168_lib_tx_interrupt(tp);
-                return;
-        }
-#endif
-        dirty_tx = ring->dirty_tx;
-        smp_rmb();
-        tx_left = READ_ONCE(ring->cur_tx) - dirty_tx;
-        tp->dynamic_aspm_packet_count += tx_left;
-
-        while (tx_left > 0) {
-                unsigned int entry = dirty_tx % ring->num_tx_desc;
-                struct ring_info *tx_skb = ring->tx_skb + entry;
-                u32 len = tx_skb->len;
-                u32 status;
-
-                rmb();
-                status = le32_to_cpu(ring->TxDescArray[entry].opts1);
-                if (status & DescOwn)
-                        break;
-
-                RTLDEV->stats.tx_bytes += len;
-                RTLDEV->stats.tx_packets++;
-
-                rtl8168_unmap_tx_skb(tp->pci_dev,
-                                     tx_skb,
-                                     ring->TxDescArray + entry);
-
-                if (tx_skb->skb!=NULL) {
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0)
-                        dev_consume_skb_any(tx_skb->skb);
-#else
-                        dev_kfree_skb_any(tx_skb->skb);
-#endif
-                        tx_skb->skb = NULL;
-                }
-                dirty_tx++;
-                tx_left--;
-        }
-
-        tp->dynamic_aspm_packet_count -= tx_left;
-
-        if (ring->dirty_tx != dirty_tx) {
-                WRITE_ONCE(ring->dirty_tx, dirty_tx);
-                smp_wmb();
-                if (netif_queue_stopped(dev) &&
-                    (rtl8168_tx_slots_avail(tp, ring))) {
-                        netif_start_subqueue(dev, ring->index);
-                }
-                smp_rmb();
-                if (ring->cur_tx != dirty_tx)
-                        rtl8168_doorbell(ring);
-        }
-}
-
-static void
-rtl8168_tx_all_interrupt(struct rtl8168_private *tp)
-{
-        int i;
-
-        for (i = 0; i < rtl8168_tot_tx_rings(tp); i++)
-                rtl8168_tx_interrupt(&tp->tx_ring[i]);
-}
-
-static inline int
-rtl8168_fragmented_frame(u32 status)
-{
-        return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag);
-}
-
-static inline void
-rtl8168_rx_csum(struct rtl8168_private *tp,
-                struct sk_buff *skb,
-                struct RxDesc *desc)
-{
-        u32 opts1 = le32_to_cpu(desc->opts1);
-        u32 opts2 = le32_to_cpu(desc->opts2);
-
-        if ((tp->mcfg == CFG_METHOD_1) ||
-            (tp->mcfg == CFG_METHOD_2) ||
-            (tp->mcfg == CFG_METHOD_3)) {
-                u32 status = opts1 & RxProtoMask;
-
-                /* rx csum offload for RTL8168B/8111B */
-                if (((status == RxProtoTCP) && !(opts1 & (RxTCPF | RxIPF))) ||
-                    ((status == RxProtoUDP) && !(opts1 & (RxUDPF | RxIPF))))
-                        skb->ip_summed = CHECKSUM_UNNECESSARY;
-                else
-                        skb->ip_summed = CHECKSUM_NONE;
-        } else {
-                /* rx csum offload for RTL8168C/8111C and RTL8168CP/8111CP */
-                if (((opts2 & RxV4F) && !(opts1 & RxIPF)) || (opts2 & RxV6F)) {
-                        if (((opts1 & RxTCPT) && !(opts1 & RxTCPF)) ||
-                            ((opts1 & RxUDPT) && !(opts1 & RxUDPF)))
-                                skb->ip_summed = CHECKSUM_UNNECESSARY;
-                        else
-                                skb->ip_summed = CHECKSUM_NONE;
-                } else
-                        skb->ip_summed = CHECKSUM_NONE;
-        }
-}
-
-/*
-static inline int
-rtl8168_try_rx_copy(struct rtl8168_private *tp,
-                    struct rtl8168_rx_ring *ring,
-                    struct sk_buff **sk_buff,
-                    int pkt_size,
-                    struct RxDesc *desc,
-                    int rx_buf_sz)
-{
-        int ret = -1;
-
-        struct sk_buff *skb;
-
-        skb = RTL_ALLOC_SKB_INTR(&tp->r8168napi[ring->index].napi,
-                                 pkt_size + RTK_RX_ALIGN);
-        if (skb) {
-                u8 *data;
-
-                data = sk_buff[0]->data;
-                skb_reserve(skb, RTK_RX_ALIGN);
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37)
-                prefetch(data - RTK_RX_ALIGN);
-#endif
-                eth_copy_and_sum(skb, data, pkt_size, 0);
-                *sk_buff = skb;
-                rtl8168_mark_to_asic(desc, rx_buf_sz);
-                ret = 0;
-        }
-
-        return ret;
-}
-*/
-
-static inline void
-rtl8168_rx_skb(struct rtl8168_private *tp,
-               struct sk_buff *skb,
-               u32 ring_index)
-{
-#ifdef CONFIG_R8168_NAPI
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
-        netif_receive_skb(skb);
-#else
-        napi_gro_receive(&tp->r8168napi[ring_index].napi, skb);
-#endif
-#else
-        netif_rx(skb);
-#endif
-}
-
-static int
-rtl8168_rx_interrupt(struct net_device *dev,
-                     struct rtl8168_private *tp,
-                     struct rtl8168_rx_ring *ring,
-                     napi_budget budget)
-{
-        unsigned int cur_rx, rx_left;
-        unsigned int count = 0;
-        u32 ring_index = ring->index;
-        unsigned int entry;
-        struct RxDesc *desc;
-        u32 status;
-        u32 rx_quota;
-        u64 rx_buf_phy_addr;
-
-        assert(dev != NULL);
-        assert(tp != NULL);
-
-        if (!tp->RxDescArray)
-                goto rx_out;
-
-#ifdef ENABLE_LIB_SUPPORT
-        if (ring->index > 0) {
-                rtl8168_lib_rx_interrupt(tp);
-                goto rx_out;
-        }
-#endif
-        rx_quota = RTL_RX_QUOTA(budget);
-        cur_rx = ring->cur_rx;
-        rx_left = tp->num_rx_desc + ring->dirty_rx - cur_rx;
-        rx_left = rtl8168_rx_quota(rx_left, (u32)rx_quota);
-
-        for (; rx_left > 0; rx_left--, cur_rx++) {
-                int pkt_size;
-                const void *rx_buf;
-                struct sk_buff *skb;
-
-                entry = cur_rx % tp->num_rx_desc;
-                desc = rtl8168_get_rxdesc(tp, tp->RxDescArray, entry, ring_index);
-                status = le32_to_cpu(desc->opts1);
-                if (status & DescOwn)
-                        break;
-
-                rmb();
-
-                if (unlikely(status & RxRES)) {
-                        if (netif_msg_rx_err(tp)) {
-                                printk(KERN_INFO
-                                       "%s: Rx ERROR. status = %08x\n",
-                                       dev->name, status);
-                        }
-
-                        RTLDEV->stats.rx_errors++;
-
-                        if (status & (RxRWT | RxRUNT))
-                                RTLDEV->stats.rx_length_errors++;
-                        if (status & RxCRC)
-                                RTLDEV->stats.rx_crc_errors++;
-
-                        if (!(dev->features & NETIF_F_RXALL))
-                                goto release_descriptor;
-                }
-
-                pkt_size = status & 0x00003fff;
-                if (likely(!(dev->features & NETIF_F_RXFCS)))
-                        pkt_size -= ETH_FCS_LEN;
-
-                /*
-                 * The driver does not support incoming fragmented
-                 * frames. They are seen as a symptom of over-mtu
-                 * sized frames.
-                 */
-                if (unlikely(rtl8168_fragmented_frame(status)) ||
-                    unlikely(pkt_size > tp->rx_buf_sz)) {
-                        RTLDEV->stats.rx_dropped++;
-                        RTLDEV->stats.rx_length_errors++;
-                        goto release_descriptor;
-                }
-
-                skb = RTL_ALLOC_SKB_INTR(&tp->r8168napi[ring_index].napi, pkt_size + RTK_RX_ALIGN);
-                if (!skb) {
-                        RTLDEV->stats.rx_dropped++;
-                        RTLDEV->stats.rx_length_errors++;
-                        //netdev_err(tp->dev, "Failed to allocate RX skb!\n");
-                        goto release_descriptor;
-                }
-
-                rx_buf_phy_addr = ring->RxDescPhyAddr[entry];
-                dma_sync_single_for_cpu(tp_to_dev(tp),
-                                        rx_buf_phy_addr, tp->rx_buf_sz,
-                                        DMA_FROM_DEVICE);
-
-                rx_buf = ring->Rx_skbuff[entry]->data;
-                if (!R8168_USE_NAPI_ALLOC_SKB)
-                        skb_reserve(skb, RTK_RX_ALIGN);
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37)
-                prefetch(rx_buf);
-#endif
-                eth_copy_and_sum(skb, rx_buf, pkt_size, 0);
-
-                dma_sync_single_for_device(tp_to_dev(tp), rx_buf_phy_addr,
-                                           tp->rx_buf_sz, DMA_FROM_DEVICE);
-
-#ifdef ENABLE_RSS_SUPPORT
-                rtl8168_rx_hash(tp, (struct RxDescV2 *)desc, skb);
-#endif
-                if (tp->cp_cmd & RxChkSum)
-                        rtl8168_rx_csum(tp, skb, desc);
-
-                skb->dev = dev;
-                skb_put(skb, pkt_size);
-                skb->protocol = eth_type_trans(skb, dev);
-
-                if (skb->pkt_type == PACKET_MULTICAST)
-                        RTLDEV->stats.multicast++;
-
-                if (rtl8168_rx_vlan_skb(tp, desc, skb) < 0)
-                        rtl8168_rx_skb(tp, skb, ring_index);
-#if LINUX_VERSION_CODE < KERNEL_VERSION(4,11,0)
-                dev->last_rx = jiffies;
-#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,11,0)
-                RTLDEV->stats.rx_bytes += pkt_size;
-                RTLDEV->stats.rx_packets++;
-
-release_descriptor:
-                rtl8168_mark_to_asic(desc, tp->rx_buf_sz);
-        }
-
-        count = cur_rx - ring->cur_rx;
-        ring->cur_rx = cur_rx;
-        ring->dirty_rx += count;
-
-        tp->dynamic_aspm_packet_count += count;
-
-rx_out:
-        return count;
-}
-
-/*
- *The interrupt handler does all of the Rx thread work and cleans up after
- *the Tx thread.
- */
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
-static irqreturn_t rtl8168_interrupt(int irq, void *dev_instance, struct pt_regs *regs)
-#else
-static irqreturn_t rtl8168_interrupt(int irq, void *dev_instance)
-#endif
-{
-        struct r8168_napi *r8168napi = dev_instance;
-        struct rtl8168_private *tp = r8168napi->priv;
-        struct net_device *dev = tp->dev;
-        u8 other_q_status = 0;
-        int handled = 0;
-        int status;
-        int i;
-
-        do {
-                status = RTL_R16(tp, tp->isr_reg[0]);
-#ifdef ENABLE_RSS_SUPPORT
-                if (R8168_MULTI_RX_Q(tp)) {
-                        for (i=1; i<rtl8168_tot_rx_rings(tp); i++)
-                                other_q_status |= RTL_R8(tp, tp->isr_reg[i]);
-                }
-#endif
-                if (!(tp->features & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX))) {
-                        /* hotplug/major error/no more work/shared irq */
-                        if ((status == 0xFFFF) || (!status && !other_q_status))
-                                break;
-
-                        if (!(status & (tp->intr_mask | tp->timer_intr_mask)) &&
-                            !(other_q_status & other_q_intr_mask))
-                                break;
-                }
-
-                handled = 1;
-
-                rtl8168_disable_interrupt(tp);
-                rtl8168_disable_lib_interrupt(tp);
-
-                switch (tp->mcfg) {
-                case CFG_METHOD_9 ... CFG_METHOD_37:
-                        /* RX_OVERFLOW RE-START mechanism now HW handles it automatically*/
-                        rtl8168_clear_isr_by_vector(tp, 0, status&~RxFIFOOver);
-                        break;
-                default:
-                        rtl8168_clear_isr_by_vector(tp, 0, status);
-                        break;
-                }
-
-                //Work around for rx fifo overflow
-                if (unlikely(status & RxFIFOOver)) {
-                        if (tp->mcfg == CFG_METHOD_1) {
-                                netif_tx_disable(dev);
-                                udelay(300);
-                                rtl8168_hw_reset(dev);
-                                rtl8168_tx_clear(tp);
-                                rtl8168_rx_clear(tp);
-                                rtl8168_init_ring(dev);
-                                rtl8168_hw_config(dev);
-                                rtl8168_hw_start(dev);
-                                netif_tx_wake_all_queues(dev);
-                        }
-                        tp->rx_fifo_of++;
-                }
-
-                if (other_q_status) {
-                        for (i=1; i<rtl8168_tot_rx_rings(tp); i++)
-                                rtl8168_clear_isr_by_vector(tp, i, other_q_status);
-                }
-
-#ifdef ENABLE_DASH_SUPPORT
-                if ( tp->DASH ) {
-                        if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) {
-                                u8 DashIntType2Status;
-
-                                if (status & ISRIMR_DASH_INTR_CMAC_RESET)
-                                        tp->CmacResetIntr = TRUE;
-
-                                DashIntType2Status = RTL_CMAC_R8(tp, CMAC_IBISR0);
-                                if (DashIntType2Status & ISRIMR_DASH_TYPE2_ROK) {
-                                        tp->RcvFwDashOkEvt = TRUE;
-                                }
-                                if (DashIntType2Status & ISRIMR_DASH_TYPE2_TOK) {
-                                        tp->SendFwHostOkEvt = TRUE;
-                                }
-                                if (DashIntType2Status & ISRIMR_DASH_TYPE2_RX_DISABLE_IDLE) {
-                                        tp->DashFwDisableRx = TRUE;
-                                }
-
-                                RTL_CMAC_W8(tp, CMAC_IBISR0, DashIntType2Status);
-                        } else {
-                                if (status & ISRIMR_DP_REQSYS_OK) {
-                                        tp->RcvFwReqSysOkEvt = TRUE;
-                                }
-                                if (status & ISRIMR_DP_DASH_OK) {
-                                        tp->RcvFwDashOkEvt = TRUE;
-                                }
-                                if (status & ISRIMR_DP_HOST_OK) {
-                                        tp->SendFwHostOkEvt = TRUE;
-                                }
-                        }
-                }
-#endif
-
-#ifdef CONFIG_R8168_NAPI
-                if ((status & tp->intr_mask) ||
-                    (other_q_status & other_q_intr_mask) ||
-                    tp->keep_intr_cnt-- > 0) {
-                        if ((status & tp->intr_mask) ||
-                            (other_q_status & other_q_intr_mask))
-                                tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT;
-
-                        if (likely(RTL_NETIF_RX_SCHEDULE_PREP(dev, &tp->r8168napi[0].napi)))
-                                __RTL_NETIF_RX_SCHEDULE(dev, &tp->r8168napi[0].napi);
-                        else if (netif_msg_intr(tp))
-                                printk(KERN_INFO "%s: interrupt %04x in poll\n",
-                                       dev->name, status);
-                } else {
-                        tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT;
-                        rtl8168_switch_to_hw_interrupt(tp);
-                }
-#else
-                if ((status & tp->intr_mask) ||
-                    (other_q_status & other_q_intr_mask) ||
-                    tp->keep_intr_cnt-- > 0) {
-                        u32 const max_rx_queue =
-                                (other_q_status & other_q_intr_mask) > 0 ?
-                                rtl8168_tot_rx_rings(tp) : 1;
-                        u32 budget = ~(u32)0;
-
-                        if ((status & tp->intr_mask) ||
-                            (other_q_status & other_q_intr_mask))
-                                tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT;
-
-                        rtl8168_tx_all_interrupt(tp);
-
-                        for (i = 0; i < max_rx_queue; i++) {
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
-                                rtl8168_rx_interrupt(dev, tp, &tp->rx_ring[i], &budget);
-#else
-                                rtl8168_rx_interrupt(dev, tp, &tp->rx_ring[i], budget);
-#endif	//LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
-                        }
-
-#ifdef ENABLE_DASH_SUPPORT
-                        if ( tp->DASH ) {
-                                struct net_device *dev = tp->dev;
-
-                                HandleDashInterrupt(dev);
-                        }
-#endif
-
-                        rtl8168_switch_to_timer_interrupt(tp);
-                } else {
-                        tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT;
-                        rtl8168_switch_to_hw_interrupt(tp);
-                }
-#endif
-
-        } while (false);
-
-        return IRQ_RETVAL(handled);
-}
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19)
-static irqreturn_t rtl8168_interrupt_msix(int irq, void *dev_instance, struct pt_regs *regs)
-#else
-static irqreturn_t rtl8168_interrupt_msix(int irq, void *dev_instance)
-#endif
-{
-        struct r8168_napi *r8168napi = dev_instance;
-        struct rtl8168_private *tp = r8168napi->priv;
-        struct net_device *dev = tp->dev;
-        int message_id = r8168napi->index;
-#ifndef CONFIG_R8168_NAPI
-        u32 budget = ~(u32)0;
-#endif
-
-        do {
-#if defined(RTL_USE_NEW_INTR_API)
-                if (!tp->irq_tbl[message_id].requested)
-                        break;
-#endif
-                /*
-                 * Other rx queue may incur interrupt due to rdu.
-                 * Skip its interrupt here or its queue will be initialized
-                 * incorrectly.
-                 */
-                if (message_id >= tp->num_rx_rings)
-                        break;
-
-#ifdef CONFIG_R8168_NAPI
-                if (likely(RTL_NETIF_RX_SCHEDULE_PREP(dev, &r8168napi->napi))) {
-                        rtl8168_disable_interrupt_by_vector(tp, message_id);
-                        __RTL_NETIF_RX_SCHEDULE(dev, &r8168napi->napi);
-                } else if (netif_msg_intr(tp))
-                        printk(KERN_INFO "%s: interrupt message id %d in poll_msix\n",
-                               dev->name, message_id);
-                rtl8168_self_clear_isr_by_vector(tp, message_id);
-#else
-                if (message_id == 0)
-                        rtl8168_tx_all_interrupt(tp);
-
-                if (message_id < tp->num_rx_rings) {
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
-                        rtl8168_rx_interrupt(dev, tp, &tp->rx_ring[message_id], &budget);
-#else
-                        rtl8168_rx_interrupt(dev, tp, &tp->rx_ring[message_id], budget);
-#endif	//LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)
-                }
-
-                rtl8168_enable_interrupt_by_vector(tp, message_id);
-#endif
-
-        } while (false);
-
-        return IRQ_HANDLED;
-}
-
-#ifdef CONFIG_R8168_NAPI
-static int rtl8168_poll_vector(napi_ptr napi, napi_budget budget, bool all_rx_q)
-{
-        struct r8168_napi *r8168napi = RTL_GET_PRIV(napi, struct r8168_napi);
-        struct rtl8168_private *tp = r8168napi->priv;
-        const int message_id = r8168napi->index;
-        RTL_GET_NETDEV(tp)
-        unsigned int work_to_do = RTL_NAPI_QUOTA(budget, dev);
-        unsigned int work_done = 0;
-        int i;
-
-        if (message_id == 0)
-                rtl8168_tx_all_interrupt(tp);
-
-        if (all_rx_q)
-                for (i = 0; i < tp->num_rx_rings; i++)
-                        work_done += rtl8168_rx_interrupt(dev, tp, &tp->rx_ring[i], budget);
-        else
-                work_done += rtl8168_rx_interrupt(dev, tp, &tp->rx_ring[message_id], budget);
-
-        RTL_NAPI_QUOTA_UPDATE(dev, work_done, budget);
-
-        if (work_done < work_to_do) {
-#ifdef ENABLE_DASH_SUPPORT
-                if (message_id == 0) {
-                        if ( tp->DASH ) {
-                                struct net_device *dev = tp->dev;
-
-                                HandleDashInterrupt(dev);
-                        }
-                }
-#endif
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0)
-                if (RTL_NETIF_RX_COMPLETE(dev, napi, work_done) == FALSE)
-                        return RTL_NAPI_RETURN_VALUE;
-#else
-                RTL_NETIF_RX_COMPLETE(dev, napi, work_done);
-#endif
-                /*
-                 * 20040426: the barrier is not strictly required but the
-                 * behavior of the irq handler could be less predictable
-                 * without it. Btw, the lack of flush for the posted pci
-                 * write is safe - FR
-                 */
-                smp_wmb();
-                //if (message_id == 0)
-                //        rtl8168_switch_to_timer_interrupt(tp);
-                //else
-                rtl8168_enable_interrupt_by_vector(tp, message_id);
-        }
-
-        return RTL_NAPI_RETURN_VALUE;
-}
-
-static int rtl8168_poll(napi_ptr napi, napi_budget budget)
-{
-        return rtl8168_poll_vector(napi, budget, 1);
-}
-
-static int rtl8168_poll_msix_ring(napi_ptr napi, napi_budget budget)
-{
-        return rtl8168_poll_vector(napi, budget, 0);
-}
-static int rtl8168_poll_msix_rx(napi_ptr napi, napi_budget budget)
-{
-        struct r8168_napi *r8168napi = RTL_GET_PRIV(napi, struct r8168_napi);
-        struct rtl8168_private *tp = r8168napi->priv;
-        const int message_id = r8168napi->index;
-        RTL_GET_NETDEV(tp)
-        unsigned int work_to_do = RTL_NAPI_QUOTA(budget, dev);
-        unsigned int work_done = 0;
-
-        work_done += rtl8168_rx_interrupt(dev, tp, &tp->rx_ring[message_id], budget);
-
-        RTL_NAPI_QUOTA_UPDATE(dev, work_done, budget);
-
-        if (work_done < work_to_do) {
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0)
-                if (RTL_NETIF_RX_COMPLETE(dev, napi, work_done) == FALSE)
-                        return RTL_NAPI_RETURN_VALUE;
-#else
-                RTL_NETIF_RX_COMPLETE(dev, napi, work_done);
-#endif
-                /*
-                 * 20040426: the barrier is not strictly required but the
-                 * behavior of the irq handler could be less predictable
-                 * without it. Btw, the lack of flush for the posted pci
-                 * write is safe - FR
-                 */
-                smp_wmb();
-                //if (message_id == 0)
-                //        rtl8168_switch_to_timer_interrupt(tp);
-                //else
-                rtl8168_enable_interrupt_by_vector(tp, message_id);
-        }
-
-        return RTL_NAPI_RETURN_VALUE;
-}
-#endif//CONFIG_R8168_NAPI
-
-static void rtl8168_sleep_rx_enable(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        if (tp->wol_enabled != WOL_ENABLED)
-                return;
-
-        if ((tp->mcfg == CFG_METHOD_1) || (tp->mcfg == CFG_METHOD_2)) {
-                RTL_W8(tp, ChipCmd, CmdReset);
-                rtl8168_rx_desc_offset0_init(tp, 0);
-                RTL_W8(tp, ChipCmd, CmdRxEnb);
-        } else if (tp->mcfg == CFG_METHOD_14 || tp->mcfg == CFG_METHOD_15) {
-                rtl8168_ephy_write(tp, 0x19, 0xFF64);
-                RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) | AcceptBroadcast | AcceptMulticast | AcceptMyPhys);
-        }
-}
-
-static void rtl8168_down(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        //rtl8168_delete_esd_timer(dev, &tp->esd_timer);
-        //rtl8168_delete_link_timer(dev, &tp->link_timer);
-
-        netif_carrier_off(dev);
-
-        netif_tx_disable(dev);
-
-        _rtl8168_wait_for_quiescence(dev);
-
-        rtl8168_dsm(dev, DSM_IF_DOWN);
-
-        rtl8168_hw_reset(dev);
-
-        rtl8168_tx_clear(tp);
-
-        rtl8168_rx_clear(tp);
-}
-
-static int rtl8168_resource_freed(struct rtl8168_private *tp)
-{
-        int i;
-
-        for (i = 0; i < tp->num_tx_rings; i++)
-                if (tp->tx_ring[i].TxDescArray) return 0;
-
-        if (tp->RxDescArray)
-                return 0;
-
-        return 1;
-}
-
-int rtl8168_close(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        if (!rtl8168_resource_freed(tp)) {
-                set_bit(R8168_FLAG_DOWN, tp->task_flags);
-
-                rtl8168_down(dev);
-
-                pci_clear_master(tp->pci_dev);
-
-                rtl8168_hw_d3_para(dev);
-
-                rtl8168_powerdown_pll(dev);
-
-                rtl8168_sleep_rx_enable(dev);
-
-                rtl8168_free_irq(tp);
-
-                rtl8168_free_alloc_resources(tp);
-        } else {
-                rtl8168_hw_d3_para(dev);
-
-                rtl8168_powerdown_pll(dev);
-        }
-
-        return 0;
-}
-
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,11)
-static void rtl8168_shutdown(struct pci_dev *pdev)
-{
-        struct net_device *dev = pci_get_drvdata(pdev);
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        rtnl_lock();
-
-        if (HW_DASH_SUPPORT_DASH(tp))
-                rtl8168_driver_stop(tp);
-
-        rtl8168_set_bios_setting(dev);
-        if (s5_keep_curr_mac == 0 && tp->random_mac == 0)
-                rtl8168_rar_set(tp, tp->org_mac_addr);
-
-#ifdef ENABLE_FIBER_SUPPORT
-        rtl8168_hw_fiber_nic_d3_para(tp);
-#endif  //ENABLE_FIBER_SUPPORT
-
-        if (s5wol == 0)
-                tp->wol_enabled = WOL_DISABLED;
-
-        rtl8168_close(dev);
-        rtl8168_disable_msi(pdev, tp);
-
-        rtnl_unlock();
-
-        if (system_state == SYSTEM_POWER_OFF) {
-                pci_clear_master(tp->pci_dev);
-                rtl8168_sleep_rx_enable(dev);
-                pci_wake_from_d3(pdev, tp->wol_enabled);
-                pci_set_power_state(pdev, PCI_D3hot);
-        }
-}
-#endif
-
-/**
- *  rtl8168_get_stats - Get rtl8168 read/write statistics
- *  @dev: The Ethernet Device to get statistics for
- *
- *  Get TX/RX statistics for rtl8168
- */
-static struct
-net_device_stats *rtl8168_get_stats(struct net_device *dev)
-{
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)
-        struct rtl8168_private *tp = netdev_priv(dev);
-#endif
-        return &RTLDEV->stats;
-}
-
-#ifdef CONFIG_PM
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11)
-static int
-rtl8168_suspend(struct pci_dev *pdev, u32 state)
-#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
-static int
-rtl8168_suspend(struct device *device)
-#else
-static int
-rtl8168_suspend(struct pci_dev *pdev, pm_message_t state)
-#endif
-{
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
-        struct pci_dev *pdev = to_pci_dev(device);
-#endif
-        struct net_device *dev = pci_get_drvdata(pdev);
-        struct rtl8168_private *tp = netdev_priv(dev);
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
-        u32 pci_pm_state = pci_choose_state(pdev, state);
-#endif
-        if (!netif_running(dev))
-                goto out;
-
-        //rtl8168_cancel_schedule_work(dev);
-
-        //rtl8168_delete_esd_timer(dev, &tp->esd_timer);
-
-        //rtl8168_delete_link_timer(dev, &tp->link_timer);
-
-        rtnl_lock();
-
-        set_bit(R8168_FLAG_DOWN, tp->task_flags);
-
-        netif_carrier_off(dev);
-
-        netif_tx_disable(dev);
-
-        netif_device_detach(dev);
-
-        rtl8168_dsm(dev, DSM_NIC_GOTO_D3);
-
-        rtl8168_hw_reset(dev);
-
-        pci_clear_master(pdev);
-
-        rtl8168_hw_d3_para(dev);
-
-#ifdef ENABLE_FIBER_SUPPORT
-        rtl8168_hw_fiber_nic_d3_para(tp);
-#endif  //ENABLE_FIBER_SUPPORT
-
-        rtl8168_powerdown_pll(dev);
-
-        rtl8168_sleep_rx_enable(dev);
-
-        rtnl_unlock();
-
-out:
-        if (HW_DASH_SUPPORT_DASH(tp))
-                rtl8168_driver_stop(tp);
-
-        pci_disable_device(pdev);
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
-        pci_save_state(pdev, &pci_pm_state);
-#else
-        pci_save_state(pdev);
-#endif
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
-        pci_enable_wake(pdev, pci_choose_state(pdev, state), tp->wol_enabled);
-#endif
-
-        pci_prepare_to_sleep(pdev);
-
-        return 0;
-}
-
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
-static int
-rtl8168_resume(struct pci_dev *pdev)
-#else
-static int
-rtl8168_resume(struct device *device)
-#endif
-{
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
-        struct pci_dev *pdev = to_pci_dev(device);
-#endif
-        struct net_device *dev = pci_get_drvdata(pdev);
-        struct rtl8168_private *tp = netdev_priv(dev);
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
-        u32 pci_pm_state = PCI_D0;
-#endif
-        int err;
-
-        rtnl_lock();
-
-        err = pci_enable_device(pdev);
-        if (err) {
-                dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
-                goto out_unlock;
-        }
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
-        pci_restore_state(pdev, &pci_pm_state);
-#else
-        pci_restore_state(pdev);
-#endif
-        pci_enable_wake(pdev, PCI_D0, 0);
-
-        /* restore last modified mac address */
-        rtl8168_rar_set(tp, dev->dev_addr);
-
-        if (!netif_running(dev)) {
-                if (HW_DASH_SUPPORT_DASH(tp)) {
-                        rtl8168_driver_start(tp);
-                }
-                goto out_unlock;
-        }
-
-        pci_set_master(pdev);
-
-        rtl8168_exit_oob(dev);
-
-        rtl8168_dsm(dev, DSM_NIC_RESUME_D3);
-
-        rtl8168_hw_init(dev);
-
-        rtl8168_powerup_pll(dev);
-
-        rtl8168_hw_ephy_config(dev);
-
-        rtl8168_hw_phy_config(dev);
-
-        rtl8168_hw_config(dev);
-
-        clear_bit(R8168_FLAG_DOWN, tp->task_flags);
-
-        rtl8168_schedule_reset_work(tp);
-
-        rtl8168_schedule_esd_work(tp);
-
-        rtl8168_schedule_linkchg_work(tp);
-
-        //mod_timer(&tp->esd_timer, jiffies + RTL8168_ESD_TIMEOUT);
-        //mod_timer(&tp->link_timer, jiffies + RTL8168_LINK_TIMEOUT);
-out_unlock:
-        netif_device_attach(dev);
-
-        rtnl_unlock();
-
-        return err;
-}
-
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29)
-
-static struct dev_pm_ops rtl8168_pm_ops = {
-        .suspend = rtl8168_suspend,
-        .resume = rtl8168_resume,
-        .freeze = rtl8168_suspend,
-        .thaw = rtl8168_resume,
-        .poweroff = rtl8168_suspend,
-        .restore = rtl8168_resume,
-};
-
-#define RTL8168_PM_OPS (&rtl8168_pm_ops)
-
-#endif
-
-#else /* !CONFIG_PM */
-
-#define RTL8168_PM_OPS NULL
-
-#endif /* CONFIG_PM */
-
-static struct pci_driver rtl8168_pci_driver = {
-        .name       = MODULENAME,
-        .id_table   = rtl8168_pci_tbl,
-        .probe      = rtl8168_init_one,
-        .remove     = __devexit_p(rtl8168_remove_one),
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,11)
-        .shutdown   = rtl8168_shutdown,
-#endif
-#ifdef CONFIG_PM
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29)
-        .suspend    = rtl8168_suspend,
-        .resume     = rtl8168_resume,
-#else /* CONFIG_PM */
-        .driver.pm  = RTL8168_PM_OPS,
-#endif
-#endif /* CONFIG_PM */
-};
-
-static int __init
-rtl8168_init_module(void)
-{
-#ifdef ENABLE_R8168_PROCFS
-        rtl8168_proc_module_init();
-#endif
-#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0)
-        return pci_register_driver(&rtl8168_pci_driver);
-#else
-        return pci_module_init(&rtl8168_pci_driver);
-#endif
-}
-
-static void __exit
-rtl8168_cleanup_module(void)
-{
-        pci_unregister_driver(&rtl8168_pci_driver);
-#ifdef ENABLE_R8168_PROCFS
-        if (rtl8168_proc) {
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
-                remove_proc_subtree(MODULENAME, init_net.proc_net);
-#else
-#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)
-                remove_proc_entry(MODULENAME, init_net.proc_net);
-#else
-                remove_proc_entry(MODULENAME, proc_net);
-#endif  //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32)
-#endif  //LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
-                rtl8168_proc = NULL;
-        }
-#endif
-}
-
-module_init(rtl8168_init_module);
-module_exit(rtl8168_cleanup_module);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_realwow.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_realwow.h
deleted file mode 100644
index d3fb2e7143ac..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_realwow.h
+++ /dev/null
@@ -1,118 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
-################################################################################
-#
-# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
-# controllers with PCI-Express interface.
-#
-# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License as published by the Free
-# Software Foundation; either version 2 of the License, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-# more details.
-#
-# You should have received a copy of the GNU General Public License along with
-# this program; if not, see <http://www.gnu.org/licenses/>.
-#
-# Author:
-# Realtek NIC software team <nicfae@realtek.com>
-# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
-#
-################################################################################
-*/
-
-/************************************************************************************
- *  This product is covered by one or more of the following patents:
- *  US6,570,884, US6,115,776, and US6,327,625.
- ***********************************************************************************/
-
-#ifndef _LINUX_R8168_REALWOW_H
-#define _LINUX_R8168_REALWOW_H
-
-#define SIOCDEVPRIVATE_RTLREALWOW   SIOCDEVPRIVATE+3
-
-#define MAX_RealWoW_KCP_SIZE (100)
-#define MAX_RealWoW_Payload (64)
-
-#define KA_TX_PACKET_SIZE (100)
-#define KA_WAKEUP_PATTERN_SIZE (120)
-
-//HwSuppKeepAliveOffloadVer
-#define HW_SUPPORT_KCP_OFFLOAD(_M)        ((_M)->HwSuppKCPOffloadVer > 0)
-
-enum rtl_realwow_cmd {
-
-        RTL_REALWOW_SET_KCP_DISABLE=0,
-        RTL_REALWOW_SET_KCP_INFO,
-        RTL_REALWOW_SET_KCP_CONTENT,
-
-        RTL_REALWOW_SET_KCP_ACKPKTINFO,
-        RTL_REALWOW_SET_KCP_WPINFO,
-        RTL_REALWOW_SET_KCPDHCP_TIMEOUT,
-
-        RTLT_REALWOW_COMMAND_INVALID
-};
-
-struct rtl_realwow_ioctl_struct {
-        __u32	cmd;
-        __u32	offset;
-        __u32	len;
-        union {
-                __u32	data;
-                void *data_buffer;
-        };
-};
-
-typedef struct _MP_KCPInfo {
-        u8 DIPv4[4];
-        u8 MacID[6];
-        u16 UdpPort[2];
-        u8 PKTLEN[2];
-
-        u16 ackLostCnt;
-        u8 KCP_WakePattern[MAX_RealWoW_Payload];
-        u8 KCP_AckPacket[MAX_RealWoW_Payload];
-        u32 KCP_interval;
-        u8 KCP_WakePattern_Len;
-        u8 KCP_AckPacket_Len;
-        u8 KCP_TxPacket[2][KA_TX_PACKET_SIZE];
-} MP_KCP_INFO, *PMP_KCP_INFO;
-
-typedef struct _KCPInfo {
-        u32 nId; // = id
-        u8 DIPv4[4];
-        u8 MacID[6];
-        u16 UdpPort;
-        u16 PKTLEN;
-} KCPInfo, *PKCPInfo;
-
-typedef struct _KCPContent {
-        u32 id; // = id
-        u32 mSec; // = msec
-        u32 size; // =size
-        u8 bPacket[MAX_RealWoW_KCP_SIZE]; // put packet here
-} KCPContent, *PKCPContent;
-
-typedef struct _RealWoWAckPktInfo {
-        u16 ackLostCnt;
-        u16 patterntSize;
-        u8 pattern[MAX_RealWoW_Payload];
-} RealWoWAckPktInfo,*PRealWoWAckPktInfo;
-
-typedef struct _RealWoWWPInfo {
-        u16 patterntSize;
-        u8 pattern[MAX_RealWoW_Payload];
-} RealWoWWPInfo,*PRealWoWWPInfo;
-
-int rtl8168_realwow_ioctl(struct net_device *dev, struct ifreq *ifr);
-void rtl8168_realwow_hw_init(struct net_device *dev);
-void rtl8168_get_realwow_hw_version(struct net_device *dev);
-void rtl8168_set_realwow_d3_para(struct net_device *dev);
-
-#endif /* _LINUX_R8168_REALWOW_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_rss.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_rss.c
deleted file mode 100644
index bf44a15c734e..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_rss.c
+++ /dev/null
@@ -1,439 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
-################################################################################
-#
-# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
-# controllers with PCI-Express interface.
-#
-# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License as published by the Free
-# Software Foundation; either version 2 of the License, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-# more details.
-#
-# You should have received a copy of the GNU General Public License along with
-# this program; if not, see <http://www.gnu.org/licenses/>.
-#
-# Author:
-# Realtek NIC software team <nicfae@realtek.com>
-# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
-#
-################################################################################
-*/
-
-/************************************************************************************
- *  This product is covered by one or more of the following patents:
- *  US6,570,884, US6,115,776, and US6,327,625.
- ***********************************************************************************/
-
-#include <linux/version.h>
-#include "r8168.h"
-
-enum rtl8168_rss_register_content {
-        /* RSS */
-        RSS_CTRL_TCP_IPV4_SUPP = (1 << 0),
-        RSS_CTRL_IPV4_SUPP  = (1 << 1),
-        RSS_CTRL_TCP_IPV6_SUPP  = (1 << 2),
-        RSS_CTRL_IPV6_SUPP  = (1 << 3),
-        RSS_CTRL_IPV6_EXT_SUPP  = (1 << 4),
-        RSS_CTRL_TCP_IPV6_EXT_SUPP  = (1 << 5),
-        RSS_HALF_SUPP  = (1 << 7),
-        RSS_QUAD_CPU_EN  = (1 << 16),
-        RSS_HQ_Q_SUP_R  = (1 << 31),
-};
-
-static int rtl8168_get_rss_hash_opts(struct rtl8168_private *tp,
-                                     struct ethtool_rxnfc *cmd)
-{
-        cmd->data = 0;
-
-        /* Report default options for RSS */
-        switch (cmd->flow_type) {
-        case TCP_V4_FLOW:
-                cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
-        /* fallthrough */
-        case IPV4_FLOW:
-                cmd->data |= RXH_IP_SRC | RXH_IP_DST;
-                break;
-        case TCP_V6_FLOW:
-                cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
-        /* fallthrough */
-        case IPV6_FLOW:
-                cmd->data |= RXH_IP_SRC | RXH_IP_DST;
-                break;
-        default:
-                return -EINVAL;
-        }
-
-        return 0;
-}
-
-int rtl8168_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
-                      u32 *rule_locs)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int ret = -EOPNOTSUPP;
-
-        netif_info(tp, drv, tp->dev, "rss get rxnfc\n");
-
-        if (!(dev->features & NETIF_F_RXHASH))
-                return ret;
-
-        switch (cmd->cmd) {
-        case ETHTOOL_GRXRINGS:
-                cmd->data = rtl8168_tot_rx_rings(tp);
-                ret = 0;
-                break;
-        case ETHTOOL_GRXFH:
-                ret = rtl8168_get_rss_hash_opts(tp, cmd);
-                break;
-        default:
-                break;
-        }
-
-        return ret;
-}
-
-u32 rtl8168_rss_indir_tbl_entries(struct rtl8168_private *tp)
-{
-        return tp->HwSuppIndirTblEntries;
-}
-
-#define RSS_MASK_BITS_OFFSET (8)
-static int _rtl8168_set_rss_hash_opt(struct rtl8168_private *tp)
-{
-        u32 hash_mask_len;
-        u32 rss_ctrl;
-
-        /* Perform hash on these packet types */
-        rss_ctrl = RSS_CTRL_TCP_IPV4_SUPP
-                   | RSS_CTRL_IPV4_SUPP
-                   | RSS_CTRL_IPV6_SUPP
-                   | RSS_CTRL_IPV6_EXT_SUPP
-                   | RSS_CTRL_TCP_IPV6_SUPP
-                   | RSS_CTRL_TCP_IPV6_EXT_SUPP;
-
-        if (R8168_MULTI_RSS_4Q(tp))
-                rss_ctrl |= RSS_QUAD_CPU_EN;
-
-        hash_mask_len = ilog2(rtl8168_rss_indir_tbl_entries(tp));
-        hash_mask_len &= (BIT_0 | BIT_1 | BIT_2);
-        rss_ctrl |= hash_mask_len << RSS_MASK_BITS_OFFSET;
-
-        rtl8168_eri_write(tp, RSS_CTRL_8168, 4, rss_ctrl, ERIAR_ExGMAC);
-
-        return 0;
-}
-
-static int rtl8168_set_rss_hash_opt(struct rtl8168_private *tp,
-                                    struct ethtool_rxnfc *nfc)
-{
-        u32 rss_flags = tp->rss_flags;
-
-        netif_info(tp, drv, tp->dev, "rss set hash\n");
-
-        /*
-         * RSS does not support anything other than hashing
-         * to queues on src and dst IPs and ports
-         */
-        if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
-                          RXH_L4_B_0_1 | RXH_L4_B_2_3))
-                return -EINVAL;
-
-        switch (nfc->flow_type) {
-        case TCP_V4_FLOW:
-        case TCP_V6_FLOW:
-                if (!(nfc->data & RXH_IP_SRC) ||
-                    !(nfc->data & RXH_IP_DST) ||
-                    !(nfc->data & RXH_L4_B_0_1) ||
-                    !(nfc->data & RXH_L4_B_2_3))
-                        return -EINVAL;
-                break;
-        case SCTP_V4_FLOW:
-        case AH_ESP_V4_FLOW:
-        case AH_V4_FLOW:
-        case ESP_V4_FLOW:
-        case SCTP_V6_FLOW:
-        case AH_ESP_V6_FLOW:
-        case AH_V6_FLOW:
-        case ESP_V6_FLOW:
-        case IP_USER_FLOW:
-        case ETHER_FLOW:
-                /* RSS is not supported for these protocols */
-                if (nfc->data) {
-                        netif_err(tp, drv, tp->dev, "Command parameters not supported\n");
-                        return -EINVAL;
-                }
-                return 0;
-        default:
-                return -EINVAL;
-        }
-
-        /* if we changed something we need to update flags */
-        if (rss_flags != tp->rss_flags) {
-                u32 rss_ctrl = rtl8168_eri_read(tp, RSS_CTRL_8168, 4, ERIAR_ExGMAC);
-
-                tp->rss_flags = rss_flags;
-
-                /* Perform hash on these packet types */
-                rss_ctrl |= RSS_CTRL_TCP_IPV4_SUPP
-                            | RSS_CTRL_IPV4_SUPP
-                            | RSS_CTRL_IPV6_SUPP
-                            | RSS_CTRL_IPV6_EXT_SUPP
-                            | RSS_CTRL_TCP_IPV6_SUPP
-                            | RSS_CTRL_TCP_IPV6_EXT_SUPP;
-
-                if (R8168_MULTI_RSS_4Q(tp))
-                        rss_ctrl |= RSS_QUAD_CPU_EN;
-                else
-                        rss_ctrl &= ~RSS_QUAD_CPU_EN;
-
-                rtl8168_eri_write(tp, RSS_CTRL_8168, 4, rss_ctrl, ERIAR_ExGMAC);
-        }
-
-        return 0;
-}
-
-int rtl8168_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        int ret = -EOPNOTSUPP;
-
-        netif_info(tp, drv, tp->dev, "rss set rxnfc\n");
-
-        if (!(dev->features & NETIF_F_RXHASH))
-                return ret;
-
-        switch (cmd->cmd) {
-        case ETHTOOL_SRXFH:
-                ret = rtl8168_set_rss_hash_opt(tp, cmd);
-                break;
-        default:
-                break;
-        }
-
-        return ret;
-}
-
-static u32 _rtl8168_get_rxfh_key_size(struct rtl8168_private *tp)
-{
-        return sizeof(tp->rss_key);
-}
-
-u32 rtl8168_get_rxfh_key_size(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        netif_info(tp, drv, tp->dev, "rss get key size\n");
-
-        if (!(dev->features & NETIF_F_RXHASH))
-                return 0;
-
-        return _rtl8168_get_rxfh_key_size(tp);
-}
-
-u32 rtl8168_rss_indir_size(struct net_device *dev)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        netif_info(tp, drv, tp->dev, "rss get indir tbl size\n");
-
-        if (!(dev->features & NETIF_F_RXHASH))
-                return 0;
-
-        return rtl8168_rss_indir_tbl_entries(tp);
-}
-
-static void rtl8168_get_reta(struct rtl8168_private *tp, u32 *indir)
-{
-        int i, reta_size = rtl8168_rss_indir_tbl_entries(tp);
-
-        for (i = 0; i < reta_size; i++)
-                indir[i] = tp->rss_indir_tbl[i];
-}
-
-int rtl8168_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
-                     u8 *hfunc)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-
-        netif_info(tp, drv, tp->dev, "rss get rxfh\n");
-
-        if (!(dev->features & NETIF_F_RXHASH))
-                return -EOPNOTSUPP;
-
-        if (hfunc)
-                *hfunc = ETH_RSS_HASH_TOP;
-
-        if (indir)
-                rtl8168_get_reta(tp, indir);
-
-        if (key)
-                memcpy(key, tp->rss_key, RTL8168_RSS_KEY_SIZE);
-
-        return 0;
-}
-
-static u32 rtl8168_rss_key_reg(struct rtl8168_private *tp)
-{
-        return RSS_KEY_8168;
-}
-
-static u32 rtl8168_rss_indir_tbl_reg(struct rtl8168_private *tp)
-{
-        return Rss_indir_tbl;
-}
-
-static void rtl8168_store_reta(struct rtl8168_private *tp)
-{
-        u32 reta_entries = rtl8168_rss_indir_tbl_entries(tp);
-        u16 indir_tbl_reg = rtl8168_rss_indir_tbl_reg(tp);
-        u32 hw_indir[RTL8168_RSS_INDIR_TBL_SIZE] = {0};
-        u8 *indir = tp->rss_indir_tbl;
-        u32 bit_on_cnt = 0x00000001;
-        u32 i, j;
-
-        /* Mapping redirection table to HW */
-        for (i = 0, j = 0; i < reta_entries; i++) {
-                if ((indir[i] & 2) && R8168_MULTI_RSS_4Q(tp))
-                        hw_indir[j + 4] |= bit_on_cnt;
-                if (indir[i] & 1)
-                        hw_indir[j] |= bit_on_cnt;
-
-                if (bit_on_cnt == 0x80000000) {
-                        bit_on_cnt = 0x00000001;
-                        j++;
-                        continue;
-                }
-                bit_on_cnt <<= 1;
-        }
-
-        /* Write redirection table to HW */
-        for (i = 0; i < RTL8168_RSS_INDIR_TBL_SIZE; i++)
-                RTL_W32(tp, indir_tbl_reg + i*4, hw_indir[i]);
-}
-
-static void rtl8168_store_rss_key(struct rtl8168_private *tp)
-{
-        const u16 rss_key_reg = rtl8168_rss_key_reg(tp);
-        u32 i, rss_key_size = _rtl8168_get_rxfh_key_size(tp);
-        u32 *rss_key = (u32*)tp->rss_key;
-
-        /* Write redirection table to HW */
-        for (i = 0; i < rss_key_size; i+=4)
-                rtl8168_eri_write(tp, rss_key_reg + i, 4, *rss_key++, ERIAR_ExGMAC);
-}
-
-int rtl8168_set_rxfh(struct net_device *dev, const u32 *indir,
-                     const u8 *key, const u8 hfunc)
-{
-        struct rtl8168_private *tp = netdev_priv(dev);
-        u32 reta_entries = rtl8168_rss_indir_tbl_entries(tp);
-        int i;
-
-        netif_info(tp, drv, tp->dev, "rss set rxfh\n");
-
-        /* We require at least one supported parameter to be changed and no
-         * change in any of the unsupported parameters
-         */
-        if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
-                return -EOPNOTSUPP;
-
-        /* Fill out the redirection table */
-        if (indir) {
-                int max_queues = tp->num_rx_rings;
-
-                /* Verify user input. */
-                for (i = 0; i < reta_entries; i++)
-                        if (indir[i] >= max_queues)
-                                return -EINVAL;
-
-                for (i = 0; i < reta_entries; i++)
-                        tp->rss_indir_tbl[i] = indir[i];
-        }
-
-        /* Fill out the rss hash key */
-        if (key)
-                memcpy(tp->rss_key, key, RTL8168_RSS_KEY_SIZE);
-
-        rtl8168_store_reta(tp);
-
-        rtl8168_store_rss_key(tp);
-
-        return 0;
-}
-
-static u32 rtl8168_get_rx_desc_hash(struct rtl8168_private *tp,
-                                    struct RxDescV2 *desc)
-{
-        if (!desc->RSSResult)
-                udelay(1);
-        return le32_to_cpu(desc->RSSResult);
-}
-
-#define RXS_8168_RSS_IPV4 BIT(17)
-#define RXS_8168_RSS_IPV6 BIT(18)
-#define RXS_8168_RSS_TCP BIT(19)
-#define RTL8168_RXS_RSS_L3_TYPE_MASK (RXS_8168_RSS_IPV4 | RXS_8168_RSS_IPV6)
-#define RTL8168_RXS_RSS_L4_TYPE_MASK (RXS_8168_RSS_TCP)
-void rtl8168_rx_hash(struct rtl8168_private *tp,
-                     struct RxDescV2 *desc,
-                     struct sk_buff *skb)
-{
-        u32 rss_header_info;
-
-        if (!(tp->dev->features & NETIF_F_RXHASH))
-                return;
-
-        rss_header_info = le32_to_cpu(desc->opts2);
-
-        if (!(rss_header_info & RTL8168_RXS_RSS_L3_TYPE_MASK))
-                return;
-
-        skb_set_hash(skb, rtl8168_get_rx_desc_hash(tp, desc),
-                     (RTL8168_RXS_RSS_L4_TYPE_MASK & rss_header_info) ?
-                     PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
-}
-
-void rtl8168_disable_rss(struct rtl8168_private *tp)
-{
-        rtl8168_eri_write(tp, RSS_CTRL_8168, 4, 0x00000000, ERIAR_ExGMAC);
-}
-
-void _rtl8168_config_rss(struct rtl8168_private *tp)
-{
-        _rtl8168_set_rss_hash_opt(tp);
-
-        rtl8168_store_reta(tp);
-
-        rtl8168_store_rss_key(tp);
-}
-
-void rtl8168_config_rss(struct rtl8168_private *tp)
-{
-        if (!HW_RSS_SUPPORT_RSS(tp))
-                return;
-
-        if (!tp->EnableRss) {
-                rtl8168_disable_rss(tp);
-                return;
-        }
-
-        _rtl8168_config_rss(tp);
-}
-
-void rtl8168_init_rss(struct rtl8168_private *tp)
-{
-        int i;
-
-        for (i = 0; i < rtl8168_rss_indir_tbl_entries(tp); i++)
-                tp->rss_indir_tbl[i] = ethtool_rxfh_indir_default(i, tp->num_rx_rings);
-
-        netdev_rss_key_fill(tp->rss_key, RTL8168_RSS_KEY_SIZE);
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_rss.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_rss.h
deleted file mode 100644
index 77c8320412c5..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/r8168_rss.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
-################################################################################
-#
-# r8125 is the Linux device driver released for Realtek 2.5Gigabit Ethernet
-# controllers with PCI-Express interface.
-#
-# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License as published by the Free
-# Software Foundation; either version 2 of the License, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-# more details.
-#
-# You should have received a copy of the GNU General Public License along with
-# this program; if not, see <http://www.gnu.org/licenses/>.
-#
-# Author:
-# Realtek NIC software team <nicfae@realtek.com>
-# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
-#
-################################################################################
-*/
-
-/************************************************************************************
- *  This product is covered by one or more of the following patents:
- *  US6,570,884, US6,115,776, and US6,327,625.
- ***********************************************************************************/
-
-#ifndef _LINUX_RTL8168_RSS_H
-#define _LINUX_RTL8168_RSS_H
-
-#include <linux/netdevice.h>
-#include <linux/types.h>
-
-#define RTL8168_RSS_INDIR_TBL_SIZE 8
-#define RTL8168_RSS_KEY_SIZE     40  /* size of RSS Hash Key in bytes */
-#define RTL8168_MAX_INDIRECTION_TABLE_ENTRIES 128
-
-struct rtl8168_private;
-struct RxDescV2;
-
-int rtl8168_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
-                      u32 *rule_locs);
-int rtl8168_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd);
-u32 rtl8168_get_rxfh_key_size(struct net_device *netdev);
-u32 rtl8168_rss_indir_size(struct net_device *netdev);
-int rtl8168_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
-                     u8 *hfunc);
-int rtl8168_set_rxfh(struct net_device *netdev, const u32 *indir,
-                     const u8 *key, const u8 hfunc);
-void rtl8168_rx_hash(struct rtl8168_private *tp,
-                     struct RxDescV2 *desc,
-                     struct sk_buff *skb);
-void _rtl8168_config_rss(struct rtl8168_private *tp);
-void rtl8168_config_rss(struct rtl8168_private *tp);
-void rtl8168_init_rss(struct rtl8168_private *tp);
-u32 rtl8168_rss_indir_tbl_entries(struct rtl8168_private *tp);
-void rtl8168_disable_rss(struct rtl8168_private *tp);
-
-#endif /* _LINUX_RTL8168_RSS_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtl_eeprom.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtl_eeprom.c
deleted file mode 100644
index 1f361a15af01..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtl_eeprom.c
+++ /dev/null
@@ -1,289 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
-################################################################################
-#
-# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
-# controllers with PCI-Express interface.
-#
-# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License as published by the Free
-# Software Foundation; either version 2 of the License, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-# more details.
-#
-# You should have received a copy of the GNU General Public License along with
-# this program; if not, see <http://www.gnu.org/licenses/>.
-#
-# Author:
-# Realtek NIC software team <nicfae@realtek.com>
-# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
-#
-################################################################################
-*/
-
-/************************************************************************************
- *  This product is covered by one or more of the following patents:
- *  US6,570,884, US6,115,776, and US6,327,625.
- ***********************************************************************************/
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/version.h>
-#include <linux/ethtool.h>
-#include <linux/netdevice.h>
-#include <linux/delay.h>
-
-#include <asm/io.h>
-
-#include "r8168.h"
-#include "rtl_eeprom.h"
-
-//-------------------------------------------------------------------
-//rtl8168_eeprom_type():
-//  tell the eeprom type
-//return value:
-//  0: the eeprom type is 93C46
-//  1: the eeprom type is 93C56 or 93C66
-//-------------------------------------------------------------------
-void rtl8168_eeprom_type(struct rtl8168_private *tp)
-{
-        u16 magic = 0;
-
-        if (tp->mcfg == CFG_METHOD_DEFAULT)
-                goto out_no_eeprom;
-
-        if(RTL_R8(tp, 0xD2)&0x04) {
-                //not support
-                //tp->eeprom_type = EEPROM_TWSI;
-                //tp->eeprom_len = 256;
-                goto out_no_eeprom;
-        } else if(RTL_R32(tp, RxConfig) & RxCfg_9356SEL) {
-                tp->eeprom_type = EEPROM_TYPE_93C56;
-                tp->eeprom_len = 256;
-        } else {
-                tp->eeprom_type = EEPROM_TYPE_93C46;
-                tp->eeprom_len = 128;
-        }
-
-        magic = rtl8168_eeprom_read_sc(tp, 0);
-
-out_no_eeprom:
-        if ((magic != 0x8129) && (magic != 0x8128)) {
-                tp->eeprom_type = EEPROM_TYPE_NONE;
-                tp->eeprom_len = 0;
-        }
-}
-
-void rtl8168_eeprom_cleanup(struct rtl8168_private *tp)
-{
-        u8 x;
-
-        x = RTL_R8(tp, Cfg9346);
-        x &= ~(Cfg9346_EEDI | Cfg9346_EECS);
-
-        RTL_W8(tp, Cfg9346, x);
-
-        rtl8168_raise_clock(tp, &x);
-        rtl8168_lower_clock(tp, &x);
-}
-
-int rtl8168_eeprom_cmd_done(struct rtl8168_private *tp)
-{
-        u8 x;
-        int i;
-
-        rtl8168_stand_by(tp);
-
-        for (i = 0; i < 50000; i++) {
-                x = RTL_R8(tp, Cfg9346);
-
-                if (x & Cfg9346_EEDO) {
-                        udelay(RTL_CLOCK_RATE * 2 * 3);
-                        return 0;
-                }
-                udelay(1);
-        }
-
-        return -1;
-}
-
-//-------------------------------------------------------------------
-//rtl8168_eeprom_read_sc():
-//  read one word from eeprom
-//-------------------------------------------------------------------
-u16 rtl8168_eeprom_read_sc(struct rtl8168_private *tp, u16 reg)
-{
-        int addr_sz = 6;
-        u8 x;
-        u16 data;
-
-        if(tp->eeprom_type == EEPROM_TYPE_NONE) {
-                return -1;
-        }
-
-        if (tp->eeprom_type==EEPROM_TYPE_93C46)
-                addr_sz = 6;
-        else if (tp->eeprom_type==EEPROM_TYPE_93C56)
-                addr_sz = 8;
-
-        x = Cfg9346_EEM1 | Cfg9346_EECS;
-        RTL_W8(tp, Cfg9346, x);
-
-        rtl8168_shift_out_bits(tp, RTL_EEPROM_READ_OPCODE, 3);
-        rtl8168_shift_out_bits(tp, reg, addr_sz);
-
-        data = rtl8168_shift_in_bits(tp);
-
-        rtl8168_eeprom_cleanup(tp);
-
-        RTL_W8(tp, Cfg9346, 0);
-
-        return data;
-}
-
-//-------------------------------------------------------------------
-//rtl8168_eeprom_write_sc():
-//  write one word to a specific address in the eeprom
-//-------------------------------------------------------------------
-void rtl8168_eeprom_write_sc(struct rtl8168_private *tp, u16 reg, u16 data)
-{
-        u8 x;
-        int addr_sz = 6;
-        int w_dummy_addr = 4;
-
-        if(tp->eeprom_type == EEPROM_TYPE_NONE) {
-                return ;
-        }
-
-        if (tp->eeprom_type==EEPROM_TYPE_93C46) {
-                addr_sz = 6;
-                w_dummy_addr = 4;
-        } else if (tp->eeprom_type==EEPROM_TYPE_93C56) {
-                addr_sz = 8;
-                w_dummy_addr = 6;
-        }
-
-        x = Cfg9346_EEM1 | Cfg9346_EECS;
-        RTL_W8(tp, Cfg9346, x);
-
-        rtl8168_shift_out_bits(tp, RTL_EEPROM_EWEN_OPCODE, 5);
-        rtl8168_shift_out_bits(tp, reg, w_dummy_addr);
-        rtl8168_stand_by(tp);
-
-        rtl8168_shift_out_bits(tp, RTL_EEPROM_ERASE_OPCODE, 3);
-        rtl8168_shift_out_bits(tp, reg, addr_sz);
-        if (rtl8168_eeprom_cmd_done(tp) < 0) {
-                return;
-        }
-        rtl8168_stand_by(tp);
-
-        rtl8168_shift_out_bits(tp, RTL_EEPROM_WRITE_OPCODE, 3);
-        rtl8168_shift_out_bits(tp, reg, addr_sz);
-        rtl8168_shift_out_bits(tp, data, 16);
-        if (rtl8168_eeprom_cmd_done(tp) < 0) {
-                return;
-        }
-        rtl8168_stand_by(tp);
-
-        rtl8168_shift_out_bits(tp, RTL_EEPROM_EWDS_OPCODE, 5);
-        rtl8168_shift_out_bits(tp, reg, w_dummy_addr);
-
-        rtl8168_eeprom_cleanup(tp);
-        RTL_W8(tp, Cfg9346, 0);
-}
-
-void rtl8168_raise_clock(struct rtl8168_private *tp, u8 *x)
-{
-        *x = *x | Cfg9346_EESK;
-        RTL_W8(tp, Cfg9346, *x);
-        udelay(RTL_CLOCK_RATE);
-}
-
-void rtl8168_lower_clock(struct rtl8168_private *tp, u8 *x)
-{
-
-        *x = *x & ~Cfg9346_EESK;
-        RTL_W8(tp, Cfg9346, *x);
-        udelay(RTL_CLOCK_RATE);
-}
-
-void rtl8168_shift_out_bits(struct rtl8168_private *tp, int data, int count)
-{
-        u8 x;
-        int  mask;
-
-        mask = 0x01 << (count - 1);
-        x = RTL_R8(tp, Cfg9346);
-        x &= ~(Cfg9346_EEDI | Cfg9346_EEDO);
-
-        do {
-                if (data & mask)
-                        x |= Cfg9346_EEDI;
-                else
-                        x &= ~Cfg9346_EEDI;
-
-                RTL_W8(tp, Cfg9346, x);
-                udelay(RTL_CLOCK_RATE);
-                rtl8168_raise_clock(tp, &x);
-                rtl8168_lower_clock(tp, &x);
-                mask = mask >> 1;
-        } while(mask);
-
-        x &= ~Cfg9346_EEDI;
-        RTL_W8(tp, Cfg9346, x);
-}
-
-u16 rtl8168_shift_in_bits(struct rtl8168_private *tp)
-{
-        u8 x;
-        u16 d, i;
-
-        x = RTL_R8(tp, Cfg9346);
-        x &= ~(Cfg9346_EEDI | Cfg9346_EEDO);
-
-        d = 0;
-
-        for (i = 0; i < 16; i++) {
-                d = d << 1;
-                rtl8168_raise_clock(tp, &x);
-
-                x = RTL_R8(tp, Cfg9346);
-                x &= ~Cfg9346_EEDI;
-
-                if (x & Cfg9346_EEDO)
-                        d |= 1;
-
-                rtl8168_lower_clock(tp, &x);
-        }
-
-        return d;
-}
-
-void rtl8168_stand_by(struct rtl8168_private *tp)
-{
-        u8 x;
-
-        x = RTL_R8(tp, Cfg9346);
-        x &= ~(Cfg9346_EECS | Cfg9346_EESK);
-        RTL_W8(tp, Cfg9346, x);
-        udelay(RTL_CLOCK_RATE);
-
-        x |= Cfg9346_EECS;
-        RTL_W8(tp, Cfg9346, x);
-}
-
-void rtl8168_set_eeprom_sel_low(struct rtl8168_private *tp)
-{
-        RTL_W8(tp, Cfg9346, Cfg9346_EEM1);
-        RTL_W8(tp, Cfg9346, Cfg9346_EEM1 | Cfg9346_EESK);
-
-        udelay(20);
-
-        RTL_W8(tp, Cfg9346, Cfg9346_EEM1);
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtl_eeprom.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtl_eeprom.h
deleted file mode 100644
index cf42fb60855c..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtl_eeprom.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
-################################################################################
-#
-# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
-# controllers with PCI-Express interface.
-#
-# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License as published by the Free
-# Software Foundation; either version 2 of the License, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-# more details.
-#
-# You should have received a copy of the GNU General Public License along with
-# this program; if not, see <http://www.gnu.org/licenses/>.
-#
-# Author:
-# Realtek NIC software team <nicfae@realtek.com>
-# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
-#
-################################################################################
-*/
-
-/************************************************************************************
- *  This product is covered by one or more of the following patents:
- *  US6,570,884, US6,115,776, and US6,327,625.
- ***********************************************************************************/
-
-//EEPROM opcodes
-#define RTL_EEPROM_READ_OPCODE      06
-#define RTL_EEPROM_WRITE_OPCODE     05
-#define RTL_EEPROM_ERASE_OPCODE     07
-#define RTL_EEPROM_EWEN_OPCODE      19
-#define RTL_EEPROM_EWDS_OPCODE      16
-
-#define RTL_CLOCK_RATE  3
-
-void rtl8168_eeprom_type(struct rtl8168_private *tp);
-void rtl8168_eeprom_cleanup(struct rtl8168_private *tp);
-u16 rtl8168_eeprom_read_sc(struct rtl8168_private *tp, u16 reg);
-void rtl8168_eeprom_write_sc(struct rtl8168_private *tp, u16 reg, u16 data);
-void rtl8168_shift_out_bits(struct rtl8168_private *tp, int data, int count);
-u16 rtl8168_shift_in_bits(struct rtl8168_private *tp);
-void rtl8168_raise_clock(struct rtl8168_private *tp, u8 *x);
-void rtl8168_lower_clock(struct rtl8168_private *tp, u8 *x);
-void rtl8168_stand_by(struct rtl8168_private *tp);
-void rtl8168_set_eeprom_sel_low(struct rtl8168_private *tp);
-
-
-
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtltool.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtltool.c
deleted file mode 100644
index a6a98c83163b..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtltool.c
+++ /dev/null
@@ -1,232 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
-################################################################################
-#
-# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
-# controllers with PCI-Express interface.
-#
-# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License as published by the Free
-# Software Foundation; either version 2 of the License, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-# more details.
-#
-# You should have received a copy of the GNU General Public License along with
-# this program; if not, see <http://www.gnu.org/licenses/>.
-#
-# Author:
-# Realtek NIC software team <nicfae@realtek.com>
-# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
-#
-################################################################################
-*/
-
-/************************************************************************************
- *  This product is covered by one or more of the following patents:
- *  US6,570,884, US6,115,776, and US6,327,625.
- ***********************************************************************************/
-
-#include <linux/module.h>
-#include <linux/version.h>
-#include <linux/pci.h>
-#include <linux/netdevice.h>
-#include <linux/delay.h>
-#include <linux/in.h>
-#include <linux/ethtool.h>
-#include <asm/uaccess.h>
-#include "r8168.h"
-#include "rtl_eeprom.h"
-#include "rtltool.h"
-
-int rtl8168_tool_ioctl(struct rtl8168_private *tp, struct ifreq *ifr)
-{
-        struct rtltool_cmd my_cmd;
-        int ret;
-
-        if (copy_from_user(&my_cmd, ifr->ifr_data, sizeof(my_cmd)))
-                return -EFAULT;
-
-        ret = 0;
-        switch (my_cmd.cmd) {
-        case RTLTOOL_READ_MAC:
-                if (my_cmd.len==1)
-                        my_cmd.data = readb(tp->mmio_addr+my_cmd.offset);
-                else if (my_cmd.len==2)
-                        my_cmd.data = readw(tp->mmio_addr+(my_cmd.offset&~1));
-                else if (my_cmd.len==4)
-                        my_cmd.data = readl(tp->mmio_addr+(my_cmd.offset&~3));
-                else {
-                        ret = -EOPNOTSUPP;
-                        break;
-                }
-
-                if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
-                        ret = -EFAULT;
-                        break;
-                }
-                break;
-        case RTLTOOL_WRITE_MAC:
-                if (my_cmd.len==1)
-                        writeb(my_cmd.data, tp->mmio_addr+my_cmd.offset);
-                else if (my_cmd.len==2)
-                        writew(my_cmd.data, tp->mmio_addr+(my_cmd.offset&~1));
-                else if (my_cmd.len==4)
-                        writel(my_cmd.data, tp->mmio_addr+(my_cmd.offset&~3));
-                else {
-                        ret = -EOPNOTSUPP;
-                        break;
-                }
-                break;
-        case RTLTOOL_READ_PHY:
-                my_cmd.data = rtl8168_mdio_prot_read(tp, my_cmd.offset);
-                if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
-                        ret = -EFAULT;
-                        break;
-                }
-                break;
-        case RTLTOOL_WRITE_PHY:
-                rtl8168_mdio_prot_write(tp, my_cmd.offset, my_cmd.data);
-                break;
-        case RTLTOOL_READ_EPHY:
-                my_cmd.data = rtl8168_ephy_read(tp, my_cmd.offset);
-                if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
-                        ret = -EFAULT;
-                        break;
-                }
-                break;
-        case RTLTOOL_WRITE_EPHY:
-                rtl8168_ephy_write(tp, my_cmd.offset, my_cmd.data);
-                break;
-        case RTLTOOL_READ_ERI:
-                my_cmd.data = 0;
-                if (my_cmd.len==1 || my_cmd.len==2 || my_cmd.len==4) {
-                        my_cmd.data = rtl8168_eri_read(tp, my_cmd.offset, my_cmd.len, ERIAR_ExGMAC);
-                } else {
-                        ret = -EOPNOTSUPP;
-                        break;
-                }
-
-                if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
-                        ret = -EFAULT;
-                        break;
-                }
-                break;
-        case RTLTOOL_WRITE_ERI:
-                if (my_cmd.len==1 || my_cmd.len==2 || my_cmd.len==4) {
-                        rtl8168_eri_write(tp, my_cmd.offset, my_cmd.len, my_cmd.data, ERIAR_ExGMAC);
-                } else {
-                        ret = -EOPNOTSUPP;
-                        break;
-                }
-                break;
-        case RTLTOOL_READ_PCI:
-                my_cmd.data = 0;
-                if (my_cmd.len==1)
-                        pci_read_config_byte(tp->pci_dev, my_cmd.offset,
-                                             (u8 *)&my_cmd.data);
-                else if (my_cmd.len==2)
-                        pci_read_config_word(tp->pci_dev, my_cmd.offset,
-                                             (u16 *)&my_cmd.data);
-                else if (my_cmd.len==4)
-                        pci_read_config_dword(tp->pci_dev, my_cmd.offset,
-                                              &my_cmd.data);
-                else {
-                        ret = -EOPNOTSUPP;
-                        break;
-                }
-
-                if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
-                        ret = -EFAULT;
-                        break;
-                }
-                break;
-        case RTLTOOL_WRITE_PCI:
-                if (my_cmd.len==1)
-                        pci_write_config_byte(tp->pci_dev, my_cmd.offset,
-                                              my_cmd.data);
-                else if (my_cmd.len==2)
-                        pci_write_config_word(tp->pci_dev, my_cmd.offset,
-                                              my_cmd.data);
-                else if (my_cmd.len==4)
-                        pci_write_config_dword(tp->pci_dev, my_cmd.offset,
-                                               my_cmd.data);
-                else {
-                        ret = -EOPNOTSUPP;
-                        break;
-                }
-                break;
-        case RTLTOOL_READ_EEPROM:
-                my_cmd.data = rtl8168_eeprom_read_sc(tp, my_cmd.offset);
-                if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
-                        ret = -EFAULT;
-                        break;
-                }
-                break;
-        case RTLTOOL_WRITE_EEPROM:
-                rtl8168_eeprom_write_sc(tp, my_cmd.offset, my_cmd.data);
-                break;
-        case RTL_READ_OOB_MAC:
-                rtl8168_oob_mutex_lock(tp);
-                my_cmd.data = rtl8168_ocp_read(tp, my_cmd.offset, 4);
-                rtl8168_oob_mutex_unlock(tp);
-
-                if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
-                        ret = -EFAULT;
-                        break;
-                }
-                break;
-        case RTL_WRITE_OOB_MAC:
-                if (my_cmd.len == 0 || my_cmd.len > 4)
-                        return -EOPNOTSUPP;
-
-                rtl8168_oob_mutex_lock(tp);
-                rtl8168_ocp_write(tp, my_cmd.offset, my_cmd.len, my_cmd.data);
-                rtl8168_oob_mutex_unlock(tp);
-                break;
-        case RTL_ENABLE_PCI_DIAG:
-                tp->rtk_enable_diag = 1;
-                dprintk("enable rtk diag\n");
-                break;
-        case RTL_DISABLE_PCI_DIAG:
-                tp->rtk_enable_diag = 0;
-                dprintk("disable rtk diag\n");
-                break;
-        case RTL_READ_MAC_OCP:
-                if (my_cmd.offset % 2)
-                        return -EOPNOTSUPP;
-
-                my_cmd.data = rtl8168_mac_ocp_read(tp, my_cmd.offset);
-                if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
-                        ret = -EFAULT;
-                        break;
-                }
-                break;
-        case RTL_WRITE_MAC_OCP:
-                if ((my_cmd.offset % 2) || (my_cmd.len != 2))
-                        return -EOPNOTSUPP;
-
-                rtl8168_mac_ocp_write(tp, my_cmd.offset, (u16)my_cmd.data);
-                break;
-        case RTL_DIRECT_READ_PHY_OCP:
-                my_cmd.data = rtl8168_mdio_prot_direct_read_phy_ocp(tp, my_cmd.offset);
-                if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) {
-                        ret = -EFAULT;
-                        break;
-                }
-                break;
-        case RTL_DIRECT_WRITE_PHY_OCP:
-                rtl8168_mdio_prot_direct_write_phy_ocp(tp, my_cmd.offset, my_cmd.data);
-                break;
-        default:
-                ret = -EOPNOTSUPP;
-                break;
-        }
-
-        return ret;
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtltool.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtltool.h
deleted file mode 100644
index 7988810acd29..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/r8168/rtltool.h
+++ /dev/null
@@ -1,86 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/*
-################################################################################
-#
-# r8168 is the Linux device driver released for Realtek Gigabit Ethernet
-# controllers with PCI-Express interface.
-#
-# Copyright(c) 2023 Realtek Semiconductor Corp. All rights reserved.
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License as published by the Free
-# Software Foundation; either version 2 of the License, or (at your option)
-# any later version.
-#
-# This program is distributed in the hope that it will be useful, but WITHOUT
-# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
-# more details.
-#
-# You should have received a copy of the GNU General Public License along with
-# this program; if not, see <http://www.gnu.org/licenses/>.
-#
-# Author:
-# Realtek NIC software team <nicfae@realtek.com>
-# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
-#
-################################################################################
-*/
-
-/************************************************************************************
- *  This product is covered by one or more of the following patents:
- *  US6,570,884, US6,115,776, and US6,327,625.
- ***********************************************************************************/
-
-#ifndef _LINUX_RTLTOOL_H
-#define _LINUX_RTLTOOL_H
-
-#define SIOCRTLTOOL		SIOCDEVPRIVATE+1
-
-enum rtl_cmd {
-        RTLTOOL_READ_MAC=0,
-        RTLTOOL_WRITE_MAC,
-        RTLTOOL_READ_PHY,
-        RTLTOOL_WRITE_PHY,
-        RTLTOOL_READ_EPHY,
-        RTLTOOL_WRITE_EPHY,
-        RTLTOOL_READ_ERI,
-        RTLTOOL_WRITE_ERI,
-        RTLTOOL_READ_PCI,
-        RTLTOOL_WRITE_PCI,
-        RTLTOOL_READ_EEPROM,
-        RTLTOOL_WRITE_EEPROM,
-
-        RTL_READ_OOB_MAC,
-        RTL_WRITE_OOB_MAC,
-
-        RTL_ENABLE_PCI_DIAG,
-        RTL_DISABLE_PCI_DIAG,
-
-        RTL_READ_MAC_OCP,
-        RTL_WRITE_MAC_OCP,
-
-        RTL_DIRECT_READ_PHY_OCP,
-        RTL_DIRECT_WRITE_PHY_OCP,
-
-        RTLTOOL_INVALID
-};
-
-struct rtltool_cmd {
-        __u32	cmd;
-        __u32	offset;
-        __u32	len;
-        __u32	data;
-};
-
-enum mode_access {
-        MODE_NONE=0,
-        MODE_READ,
-        MODE_WRITE
-};
-
-#ifdef __KERNEL__
-int rtl8168_tool_ioctl(struct rtl8168_private *tp, struct ifreq *ifr);
-#endif
-
-#endif /* _LINUX_RTLTOOL_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/Makefile b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/Makefile
deleted file mode 100644
index 6831a03a60fd..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/Makefile
+++ /dev/null
@@ -1,18 +0,0 @@
-PWD		= $(shell pwd)
-
-EXTRA_CFLAGS:= -I$(M)/include
-EXTRA_CFLAGS+= -Wall
-
-sdhci_pci-objs := sdhci-pci-core.o sdhci-pci-o2micro.o sdhci-pci-arasan.o \
-				   sdhci-pci-dwc-mshc.o sdhci-pci-gli.o
-obj-m += sdhci_pci.o
-
-
-all:
-	$(MAKE) -C $(KERNEL_SRC)/build M=$(PWD) modules
-	@if [ ! -d $(module_out_put_dir) ]; then mkdir -p $(module_out_put_dir) ;fi
-	@if [ -f $(PWD)/*.ko ]; then cp -p $(PWD)/*.ko $(module_out_put_dir);fi
-clean:
-	rm -f $(PWD)/*.o $(PWD)/*.ko $(PWD)/*.mod.c $(PWD)/.*.cmd 
-	rm -f $(PWD)/Module.markers $(PWD)/Module.symvers $(PWD)/modules.order 
-	rm -rf $(PWD)/.tmp_versions  
\ No newline at end of file
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/cqhci.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/cqhci.h
deleted file mode 100644
index ba9387ed90eb..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/cqhci.h
+++ /dev/null
@@ -1,324 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
- */
-#ifndef LINUX_MMC_CQHCI_H
-#define LINUX_MMC_CQHCI_H
-
-#include <linux/compiler.h>
-#include <linux/bitops.h>
-#include <linux/spinlock_types.h>
-#include <linux/types.h>
-#include <linux/completion.h>
-#include <linux/wait.h>
-#include <linux/irqreturn.h>
-#include <asm/io.h>
-
-/* registers */
-/* version */
-#define CQHCI_VER			0x00
-#define CQHCI_VER_MAJOR(x)		(((x) & GENMASK(11, 8)) >> 8)
-#define CQHCI_VER_MINOR1(x)		(((x) & GENMASK(7, 4)) >> 4)
-#define CQHCI_VER_MINOR2(x)		((x) & GENMASK(3, 0))
-
-/* capabilities */
-#define CQHCI_CAP			0x04
-#define CQHCI_CAP_CS			0x10000000 /* Crypto Support */
-
-/* configuration */
-#define CQHCI_CFG			0x08
-#define CQHCI_DCMD			0x00001000
-#define CQHCI_TASK_DESC_SZ		0x00000100
-#define CQHCI_CRYPTO_GENERAL_ENABLE	0x00000002
-#define CQHCI_ENABLE			0x00000001
-
-/* control */
-#define CQHCI_CTL			0x0C
-#define CQHCI_CLEAR_ALL_TASKS		0x00000100
-#define CQHCI_HALT			0x00000001
-
-/* interrupt status */
-#define CQHCI_IS			0x10
-#define CQHCI_IS_HAC			BIT(0)
-#define CQHCI_IS_TCC			BIT(1)
-#define CQHCI_IS_RED			BIT(2)
-#define CQHCI_IS_TCL			BIT(3)
-#define CQHCI_IS_GCE			BIT(4) /* General Crypto Error */
-#define CQHCI_IS_ICCE			BIT(5) /* Invalid Crypto Config Error */
-
-#define CQHCI_IS_MASK (CQHCI_IS_TCC | CQHCI_IS_RED | \
-		       CQHCI_IS_GCE | CQHCI_IS_ICCE)
-
-/* interrupt status enable */
-#define CQHCI_ISTE			0x14
-
-/* interrupt signal enable */
-#define CQHCI_ISGE			0x18
-
-/* interrupt coalescing */
-#define CQHCI_IC			0x1C
-#define CQHCI_IC_ENABLE			BIT(31)
-#define CQHCI_IC_RESET			BIT(16)
-#define CQHCI_IC_ICCTHWEN		BIT(15)
-#define CQHCI_IC_ICCTH(x)		(((x) & 0x1F) << 8)
-#define CQHCI_IC_ICTOVALWEN		BIT(7)
-#define CQHCI_IC_ICTOVAL(x)		((x) & 0x7F)
-
-/* task list base address */
-#define CQHCI_TDLBA			0x20
-
-/* task list base address upper */
-#define CQHCI_TDLBAU			0x24
-
-/* door-bell */
-#define CQHCI_TDBR			0x28
-
-/* task completion notification */
-#define CQHCI_TCN			0x2C
-
-/* device queue status */
-#define CQHCI_DQS			0x30
-
-/* device pending tasks */
-#define CQHCI_DPT			0x34
-
-/* task clear */
-#define CQHCI_TCLR			0x38
-
-/* task descriptor processing error */
-#define CQHCI_TDPE			0x3c
-
-/* send status config 1 */
-#define CQHCI_SSC1			0x40
-#define CQHCI_SSC1_CBC_MASK		GENMASK(19, 16)
-
-/* send status config 2 */
-#define CQHCI_SSC2			0x44
-
-/* response for dcmd */
-#define CQHCI_CRDCT			0x48
-
-/* response mode error mask */
-#define CQHCI_RMEM			0x50
-
-/* task error info */
-#define CQHCI_TERRI			0x54
-
-#define CQHCI_TERRI_C_INDEX(x)		((x) & GENMASK(5, 0))
-#define CQHCI_TERRI_C_TASK(x)		(((x) & GENMASK(12, 8)) >> 8)
-#define CQHCI_TERRI_C_VALID(x)		((x) & BIT(15))
-#define CQHCI_TERRI_D_INDEX(x)		(((x) & GENMASK(21, 16)) >> 16)
-#define CQHCI_TERRI_D_TASK(x)		(((x) & GENMASK(28, 24)) >> 24)
-#define CQHCI_TERRI_D_VALID(x)		((x) & BIT(31))
-
-/* command response index */
-#define CQHCI_CRI			0x58
-
-/* command response argument */
-#define CQHCI_CRA			0x5C
-
-/* crypto capabilities */
-#define CQHCI_CCAP			0x100
-#define CQHCI_CRYPTOCAP			0x104
-
-#define CQHCI_INT_ALL			0xF
-#define CQHCI_IC_DEFAULT_ICCTH		31
-#define CQHCI_IC_DEFAULT_ICTOVAL	1
-
-/* attribute fields */
-#define CQHCI_VALID(x)			(((x) & 1) << 0)
-#define CQHCI_END(x)			(((x) & 1) << 1)
-#define CQHCI_INT(x)			(((x) & 1) << 2)
-#define CQHCI_ACT(x)			(((x) & 0x7) << 3)
-
-/* data command task descriptor fields */
-#define CQHCI_FORCED_PROG(x)		(((x) & 1) << 6)
-#define CQHCI_CONTEXT(x)		(((x) & 0xF) << 7)
-#define CQHCI_DATA_TAG(x)		(((x) & 1) << 11)
-#define CQHCI_DATA_DIR(x)		(((x) & 1) << 12)
-#define CQHCI_PRIORITY(x)		(((x) & 1) << 13)
-#define CQHCI_QBAR(x)			(((x) & 1) << 14)
-#define CQHCI_REL_WRITE(x)		(((x) & 1) << 15)
-#define CQHCI_BLK_COUNT(x)		(((x) & 0xFFFF) << 16)
-#define CQHCI_BLK_ADDR(x)		(((x) & 0xFFFFFFFF) << 32)
-
-/* direct command task descriptor fields */
-#define CQHCI_CMD_INDEX(x)		(((x) & 0x3F) << 16)
-#define CQHCI_CMD_TIMING(x)		(((x) & 1) << 22)
-#define CQHCI_RESP_TYPE(x)		(((x) & 0x3) << 23)
-
-/* crypto task descriptor fields (for bits 64-127 of task descriptor) */
-#define CQHCI_CRYPTO_ENABLE_BIT		(1ULL << 47)
-#define CQHCI_CRYPTO_KEYSLOT(x)		((u64)(x) << 32)
-
-/* transfer descriptor fields */
-#define CQHCI_DAT_LENGTH(x)		(((x) & 0xFFFF) << 16)
-#define CQHCI_DAT_ADDR_LO(x)		(((x) & 0xFFFFFFFF) << 32)
-#define CQHCI_DAT_ADDR_HI(x)		(((x) & 0xFFFFFFFF) << 0)
-
-/* CCAP - Crypto Capability 100h */
-union cqhci_crypto_capabilities {
-	__le32 reg_val;
-	struct {
-		u8 num_crypto_cap;
-		u8 config_count;
-		u8 reserved;
-		u8 config_array_ptr;
-	};
-};
-
-enum cqhci_crypto_key_size {
-	CQHCI_CRYPTO_KEY_SIZE_INVALID	= 0,
-	CQHCI_CRYPTO_KEY_SIZE_128	= 1,
-	CQHCI_CRYPTO_KEY_SIZE_192	= 2,
-	CQHCI_CRYPTO_KEY_SIZE_256	= 3,
-	CQHCI_CRYPTO_KEY_SIZE_512	= 4,
-};
-
-enum cqhci_crypto_alg {
-	CQHCI_CRYPTO_ALG_AES_XTS		= 0,
-	CQHCI_CRYPTO_ALG_BITLOCKER_AES_CBC	= 1,
-	CQHCI_CRYPTO_ALG_AES_ECB		= 2,
-	CQHCI_CRYPTO_ALG_ESSIV_AES_CBC		= 3,
-};
-
-/* x-CRYPTOCAP - Crypto Capability X */
-union cqhci_crypto_cap_entry {
-	__le32 reg_val;
-	struct {
-		u8 algorithm_id;
-		u8 sdus_mask; /* Supported data unit size mask */
-		u8 key_size;
-		u8 reserved;
-	};
-};
-
-#define CQHCI_CRYPTO_CONFIGURATION_ENABLE (1 << 7)
-#define CQHCI_CRYPTO_KEY_MAX_SIZE 64
-/* x-CRYPTOCFG - Crypto Configuration X */
-union cqhci_crypto_cfg_entry {
-	__le32 reg_val[32];
-	struct {
-		u8 crypto_key[CQHCI_CRYPTO_KEY_MAX_SIZE];
-		u8 data_unit_size;
-		u8 crypto_cap_idx;
-		u8 reserved_1;
-		u8 config_enable;
-		u8 reserved_multi_host;
-		u8 reserved_2;
-		u8 vsb[2];
-		u8 reserved_3[56];
-	};
-};
-
-struct cqhci_host_ops;
-struct mmc_host;
-struct mmc_request;
-struct cqhci_slot;
-
-struct cqhci_host {
-	const struct cqhci_host_ops *ops;
-	void __iomem *mmio;
-	struct mmc_host *mmc;
-
-	spinlock_t lock;
-
-	/* relative card address of device */
-	unsigned int rca;
-
-	/* 64 bit DMA */
-	bool dma64;
-	int num_slots;
-	int qcnt;
-
-	u32 dcmd_slot;
-	u32 caps;
-#define CQHCI_TASK_DESC_SZ_128		0x1
-
-	u32 quirks;
-#define CQHCI_QUIRK_SHORT_TXFR_DESC_SZ	0x1
-
-	bool enabled;
-	bool halted;
-	bool init_done;
-	bool activated;
-	bool waiting_for_idle;
-	bool recovery_halt;
-
-	size_t desc_size;
-	size_t data_size;
-
-	u8 *desc_base;
-
-	/* total descriptor size */
-	u8 slot_sz;
-
-	/* 64/128 bit depends on CQHCI_CFG */
-	u8 task_desc_len;
-
-	/* 64 bit on 32-bit arch, 128 bit on 64-bit */
-	u8 link_desc_len;
-
-	u8 *trans_desc_base;
-	/* same length as transfer descriptor */
-	u8 trans_desc_len;
-
-	dma_addr_t desc_dma_base;
-	dma_addr_t trans_desc_dma_base;
-
-	struct completion halt_comp;
-	wait_queue_head_t wait_queue;
-	struct cqhci_slot *slot;
-
-#ifdef CONFIG_MMC_CRYPTO
-	union cqhci_crypto_capabilities crypto_capabilities;
-	union cqhci_crypto_cap_entry *crypto_cap_array;
-	u32 crypto_cfg_register;
-#endif
-};
-
-struct cqhci_host_ops {
-	void (*dumpregs)(struct mmc_host *mmc);
-	void (*write_l)(struct cqhci_host *host, u32 val, int reg);
-	u32 (*read_l)(struct cqhci_host *host, int reg);
-	void (*enable)(struct mmc_host *mmc);
-	void (*disable)(struct mmc_host *mmc, bool recovery);
-	void (*update_dcmd_desc)(struct mmc_host *mmc, struct mmc_request *mrq,
-				 u64 *data);
-	void (*pre_enable)(struct mmc_host *mmc);
-	void (*post_disable)(struct mmc_host *mmc);
-#ifdef CONFIG_MMC_CRYPTO
-	int (*program_key)(struct cqhci_host *cq_host,
-			   const union cqhci_crypto_cfg_entry *cfg, int slot);
-#endif
-};
-
-static inline void cqhci_writel(struct cqhci_host *host, u32 val, int reg)
-{
-	if (unlikely(host->ops->write_l))
-		host->ops->write_l(host, val, reg);
-	else
-		writel_relaxed(val, host->mmio + reg);
-}
-
-static inline u32 cqhci_readl(struct cqhci_host *host, int reg)
-{
-	if (unlikely(host->ops->read_l))
-		return host->ops->read_l(host, reg);
-	else
-		return readl_relaxed(host->mmio + reg);
-}
-
-struct platform_device;
-
-irqreturn_t cqhci_irq(struct mmc_host *mmc, u32 intmask, int cmd_error,
-		      int data_error);
-int cqhci_init(struct cqhci_host *cq_host, struct mmc_host *mmc, bool dma64);
-struct cqhci_host *cqhci_pltfm_init(struct platform_device *pdev);
-int cqhci_deactivate(struct mmc_host *mmc);
-static inline int cqhci_suspend(struct mmc_host *mmc)
-{
-	return cqhci_deactivate(mmc);
-}
-int cqhci_resume(struct mmc_host *mmc);
-
-#endif
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-arasan.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-arasan.c
deleted file mode 100644
index 499f3205ec5c..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-arasan.c
+++ /dev/null
@@ -1,331 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * sdhci-pci-arasan.c - Driver for Arasan PCI Controller with
- * integrated phy.
- *
- * Copyright (C) 2017 Arasan Chip Systems Inc.
- *
- * Author: Atul Garg <agarg@arasan.com>
- */
-
-#include <linux/pci.h>
-#include <linux/delay.h>
-
-#include "sdhci.h"
-#include "sdhci-pci.h"
-
-/* Extra registers for Arasan SD/SDIO/MMC Host Controller with PHY */
-#define PHY_ADDR_REG	0x300
-#define PHY_DAT_REG	0x304
-
-#define PHY_WRITE	BIT(8)
-#define PHY_BUSY	BIT(9)
-#define DATA_MASK	0xFF
-
-/* PHY Specific Registers */
-#define DLL_STATUS	0x00
-#define IPAD_CTRL1	0x01
-#define IPAD_CTRL2	0x02
-#define IPAD_STS	0x03
-#define IOREN_CTRL1	0x06
-#define IOREN_CTRL2	0x07
-#define IOPU_CTRL1	0x08
-#define IOPU_CTRL2	0x09
-#define ITAP_DELAY	0x0C
-#define OTAP_DELAY	0x0D
-#define STRB_SEL	0x0E
-#define CLKBUF_SEL	0x0F
-#define MODE_CTRL	0x11
-#define DLL_TRIM	0x12
-#define CMD_CTRL	0x20
-#define DATA_CTRL	0x21
-#define STRB_CTRL	0x22
-#define CLK_CTRL	0x23
-#define PHY_CTRL	0x24
-
-#define DLL_ENBL	BIT(3)
-#define RTRIM_EN	BIT(1)
-#define PDB_ENBL	BIT(1)
-#define RETB_ENBL	BIT(6)
-#define ODEN_CMD	BIT(1)
-#define ODEN_DAT	0xFF
-#define REN_STRB	BIT(0)
-#define REN_CMND	BIT(1)
-#define REN_DATA	0xFF
-#define PU_CMD		BIT(1)
-#define PU_DAT		0xFF
-#define ITAPDLY_EN	BIT(0)
-#define OTAPDLY_EN	BIT(0)
-#define OD_REL_CMD	BIT(1)
-#define OD_REL_DAT	0xFF
-#define DLLTRM_ICP	0x8
-#define PDB_CMND	BIT(0)
-#define PDB_DATA	0xFF
-#define PDB_STRB	BIT(0)
-#define PDB_CLOCK	BIT(0)
-#define CALDONE_MASK	0x10
-#define DLL_RDY_MASK	0x10
-#define MAX_CLK_BUF	0x7
-
-/* Mode Controls */
-#define ENHSTRB_MODE	BIT(0)
-#define HS400_MODE	BIT(1)
-#define LEGACY_MODE	BIT(2)
-#define DDR50_MODE	BIT(3)
-
-/*
- * Controller has no specific bits for HS200/HS.
- * Used BIT(4), BIT(5) for software programming.
- */
-#define HS200_MODE	BIT(4)
-#define HISPD_MODE	BIT(5)
-
-#define OTAPDLY(x)	(((x) << 1) | OTAPDLY_EN)
-#define ITAPDLY(x)	(((x) << 1) | ITAPDLY_EN)
-#define FREQSEL(x)	(((x) << 5) | DLL_ENBL)
-#define IOPAD(x, y)	((x) | ((y) << 2))
-
-/* Arasan private data */
-struct arasan_host {
-	u32 chg_clk;
-};
-
-static int arasan_phy_addr_poll(struct sdhci_host *host, u32 offset, u32 mask)
-{
-	ktime_t timeout = ktime_add_us(ktime_get(), 100);
-	bool failed;
-	u8 val = 0;
-
-	while (1) {
-		failed = ktime_after(ktime_get(), timeout);
-		val = sdhci_readw(host, PHY_ADDR_REG);
-		if (!(val & mask))
-			return 0;
-		if (failed)
-			return -EBUSY;
-	}
-}
-
-static int arasan_phy_write(struct sdhci_host *host, u8 data, u8 offset)
-{
-	sdhci_writew(host, data, PHY_DAT_REG);
-	sdhci_writew(host, (PHY_WRITE | offset), PHY_ADDR_REG);
-	return arasan_phy_addr_poll(host, PHY_ADDR_REG, PHY_BUSY);
-}
-
-static int arasan_phy_read(struct sdhci_host *host, u8 offset, u8 *data)
-{
-	int ret;
-
-	sdhci_writew(host, 0, PHY_DAT_REG);
-	sdhci_writew(host, offset, PHY_ADDR_REG);
-	ret = arasan_phy_addr_poll(host, PHY_ADDR_REG, PHY_BUSY);
-
-	/* Masking valid data bits */
-	*data = sdhci_readw(host, PHY_DAT_REG) & DATA_MASK;
-	return ret;
-}
-
-static int arasan_phy_sts_poll(struct sdhci_host *host, u32 offset, u32 mask)
-{
-	int ret;
-	ktime_t timeout = ktime_add_us(ktime_get(), 100);
-	bool failed;
-	u8 val = 0;
-
-	while (1) {
-		failed = ktime_after(ktime_get(), timeout);
-		ret = arasan_phy_read(host, offset, &val);
-		if (ret)
-			return -EBUSY;
-		else if (val & mask)
-			return 0;
-		if (failed)
-			return -EBUSY;
-	}
-}
-
-/* Initialize the Arasan PHY */
-static int arasan_phy_init(struct sdhci_host *host)
-{
-	int ret;
-	u8 val;
-
-	/* Program IOPADs and wait for calibration to be done */
-	if (arasan_phy_read(host, IPAD_CTRL1, &val) ||
-	    arasan_phy_write(host, val | RETB_ENBL | PDB_ENBL, IPAD_CTRL1) ||
-	    arasan_phy_read(host, IPAD_CTRL2, &val) ||
-	    arasan_phy_write(host, val | RTRIM_EN, IPAD_CTRL2))
-		return -EBUSY;
-	ret = arasan_phy_sts_poll(host, IPAD_STS, CALDONE_MASK);
-	if (ret)
-		return -EBUSY;
-
-	/* Program CMD/Data lines */
-	if (arasan_phy_read(host, IOREN_CTRL1, &val) ||
-	    arasan_phy_write(host, val | REN_CMND | REN_STRB, IOREN_CTRL1) ||
-	    arasan_phy_read(host, IOPU_CTRL1, &val) ||
-	    arasan_phy_write(host, val | PU_CMD, IOPU_CTRL1) ||
-	    arasan_phy_read(host, CMD_CTRL, &val) ||
-	    arasan_phy_write(host, val | PDB_CMND, CMD_CTRL) ||
-	    arasan_phy_read(host, IOREN_CTRL2, &val) ||
-	    arasan_phy_write(host, val | REN_DATA, IOREN_CTRL2) ||
-	    arasan_phy_read(host, IOPU_CTRL2, &val) ||
-	    arasan_phy_write(host, val | PU_DAT, IOPU_CTRL2) ||
-	    arasan_phy_read(host, DATA_CTRL, &val) ||
-	    arasan_phy_write(host, val | PDB_DATA, DATA_CTRL) ||
-	    arasan_phy_read(host, STRB_CTRL, &val) ||
-	    arasan_phy_write(host, val | PDB_STRB, STRB_CTRL) ||
-	    arasan_phy_read(host, CLK_CTRL, &val) ||
-	    arasan_phy_write(host, val | PDB_CLOCK, CLK_CTRL) ||
-	    arasan_phy_read(host, CLKBUF_SEL, &val) ||
-	    arasan_phy_write(host, val | MAX_CLK_BUF, CLKBUF_SEL) ||
-	    arasan_phy_write(host, LEGACY_MODE, MODE_CTRL))
-		return -EBUSY;
-	return 0;
-}
-
-/* Set Arasan PHY for different modes */
-static int arasan_phy_set(struct sdhci_host *host, u8 mode, u8 otap,
-			  u8 drv_type, u8 itap, u8 trim, u8 clk)
-{
-	u8 val;
-	int ret;
-
-	if (mode == HISPD_MODE || mode == HS200_MODE)
-		ret = arasan_phy_write(host, 0x0, MODE_CTRL);
-	else
-		ret = arasan_phy_write(host, mode, MODE_CTRL);
-	if (ret)
-		return ret;
-	if (mode == HS400_MODE || mode == HS200_MODE) {
-		ret = arasan_phy_read(host, IPAD_CTRL1, &val);
-		if (ret)
-			return ret;
-		ret = arasan_phy_write(host, IOPAD(val, drv_type), IPAD_CTRL1);
-		if (ret)
-			return ret;
-	}
-	if (mode == LEGACY_MODE) {
-		ret = arasan_phy_write(host, 0x0, OTAP_DELAY);
-		if (ret)
-			return ret;
-		ret = arasan_phy_write(host, 0x0, ITAP_DELAY);
-	} else {
-		ret = arasan_phy_write(host, OTAPDLY(otap), OTAP_DELAY);
-		if (ret)
-			return ret;
-		if (mode != HS200_MODE)
-			ret = arasan_phy_write(host, ITAPDLY(itap), ITAP_DELAY);
-		else
-			ret = arasan_phy_write(host, 0x0, ITAP_DELAY);
-	}
-	if (ret)
-		return ret;
-	if (mode != LEGACY_MODE) {
-		ret = arasan_phy_write(host, trim, DLL_TRIM);
-		if (ret)
-			return ret;
-	}
-	ret = arasan_phy_write(host, 0, DLL_STATUS);
-	if (ret)
-		return ret;
-	if (mode != LEGACY_MODE) {
-		ret = arasan_phy_write(host, FREQSEL(clk), DLL_STATUS);
-		if (ret)
-			return ret;
-		ret = arasan_phy_sts_poll(host, DLL_STATUS, DLL_RDY_MASK);
-		if (ret)
-			return -EBUSY;
-	}
-	return 0;
-}
-
-static int arasan_select_phy_clock(struct sdhci_host *host)
-{
-	struct sdhci_pci_slot *slot = sdhci_priv(host);
-	struct arasan_host *arasan_host = sdhci_pci_priv(slot);
-	u8 clk;
-
-	if (arasan_host->chg_clk == host->mmc->ios.clock)
-		return 0;
-
-	arasan_host->chg_clk = host->mmc->ios.clock;
-	if (host->mmc->ios.clock == 200000000)
-		clk = 0x0;
-	else if (host->mmc->ios.clock == 100000000)
-		clk = 0x2;
-	else if (host->mmc->ios.clock == 50000000)
-		clk = 0x1;
-	else
-		clk = 0x0;
-
-	if (host->mmc_host_ops.hs400_enhanced_strobe) {
-		arasan_phy_set(host, ENHSTRB_MODE, 1, 0x0, 0x0,
-			       DLLTRM_ICP, clk);
-	} else {
-		switch (host->mmc->ios.timing) {
-		case MMC_TIMING_LEGACY:
-			arasan_phy_set(host, LEGACY_MODE, 0x0, 0x0, 0x0,
-				       0x0, 0x0);
-			break;
-		case MMC_TIMING_MMC_HS:
-		case MMC_TIMING_SD_HS:
-			arasan_phy_set(host, HISPD_MODE, 0x3, 0x0, 0x2,
-				       DLLTRM_ICP, clk);
-			break;
-		case MMC_TIMING_MMC_HS200:
-		case MMC_TIMING_UHS_SDR104:
-			arasan_phy_set(host, HS200_MODE, 0x2,
-				       host->mmc->ios.drv_type, 0x0,
-				       DLLTRM_ICP, clk);
-			break;
-		case MMC_TIMING_MMC_DDR52:
-		case MMC_TIMING_UHS_DDR50:
-			arasan_phy_set(host, DDR50_MODE, 0x1, 0x0,
-				       0x0, DLLTRM_ICP, clk);
-			break;
-		case MMC_TIMING_MMC_HS400:
-			arasan_phy_set(host, HS400_MODE, 0x1,
-				       host->mmc->ios.drv_type, 0xa,
-				       DLLTRM_ICP, clk);
-			break;
-		default:
-			break;
-		}
-	}
-	return 0;
-}
-
-static int arasan_pci_probe_slot(struct sdhci_pci_slot *slot)
-{
-	int err;
-
-	slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE | MMC_CAP_8_BIT_DATA;
-	err = arasan_phy_init(slot->host);
-	if (err)
-		return -ENODEV;
-	return 0;
-}
-
-static void arasan_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
-{
-	sdhci_set_clock(host, clock);
-
-	/* Change phy settings for the new clock */
-	arasan_select_phy_clock(host);
-}
-
-static const struct sdhci_ops arasan_sdhci_pci_ops = {
-	.set_clock	= arasan_sdhci_set_clock,
-	.enable_dma	= sdhci_pci_enable_dma,
-	.set_bus_width	= sdhci_set_bus_width,
-	.reset		= sdhci_reset,
-	.set_uhs_signaling	= sdhci_set_uhs_signaling,
-};
-
-const struct sdhci_pci_fixes sdhci_arasan = {
-	.probe_slot = arasan_pci_probe_slot,
-	.ops        = &arasan_sdhci_pci_ops,
-	.priv_size  = sizeof(struct arasan_host),
-};
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-core.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-core.c
deleted file mode 100644
index e9c31674613e..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-core.c
+++ /dev/null
@@ -1,2468 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*  linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
- *
- *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
- *
- * Thanks to the following companies for their support:
- *
- *     - JMicron (hardware and technical support)
- */
-
-#include <linux/bitfield.h>
-#include <linux/string.h>
-#include <linux/delay.h>
-#include <linux/highmem.h>
-#include <linux/module.h>
-#include <linux/pci.h>
-#include <linux/dma-mapping.h>
-#include <linux/slab.h>
-#include <linux/device.h>
-#include <linux/scatterlist.h>
-#include <linux/io.h>
-#include <linux/iopoll.h>
-#include <linux/gpio.h>
-#include <linux/pm_runtime.h>
-#include <linux/pm_qos.h>
-#include <linux/debugfs.h>
-#include <linux/acpi.h>
-#include <linux/dmi.h>
-#include <linux/init.h>
-
-#include <linux/mmc/host.h>
-#include <linux/mmc/mmc.h>
-#include <linux/mmc/slot-gpio.h>
-
-#ifdef CONFIG_X86
-#include <asm/iosf_mbi.h>
-#endif
-
-#include "cqhci.h"
-
-#include "sdhci.h"
-#include "sdhci-pci.h"
-
-#define mem_clear(data, size) memset((data), 0, (size))
-
-static int wb_sdhci_pci = 0;
-module_param(wb_sdhci_pci, int, S_IRUGO);
-
-static void sdhci_pci_hw_reset(struct sdhci_host *host);
-
-#ifdef CONFIG_PM_SLEEP
-static int sdhci_pci_init_wakeup(struct sdhci_pci_chip *chip)
-{
-	mmc_pm_flag_t pm_flags = 0;
-	bool cap_cd_wake = false;
-	int i;
-
-	for (i = 0; i < chip->num_slots; i++) {
-		struct sdhci_pci_slot *slot = chip->slots[i];
-
-		if (slot) {
-			pm_flags |= slot->host->mmc->pm_flags;
-			if (slot->host->mmc->caps & MMC_CAP_CD_WAKE)
-				cap_cd_wake = true;
-		}
-	}
-
-	if ((pm_flags & MMC_PM_KEEP_POWER) && (pm_flags & MMC_PM_WAKE_SDIO_IRQ))
-		return device_wakeup_enable(&chip->pdev->dev);
-	else if (!cap_cd_wake)
-		return device_wakeup_disable(&chip->pdev->dev);
-
-	return 0;
-}
-
-static int sdhci_pci_suspend_host(struct sdhci_pci_chip *chip)
-{
-	int i, ret;
-
-	sdhci_pci_init_wakeup(chip);
-
-	for (i = 0; i < chip->num_slots; i++) {
-		struct sdhci_pci_slot *slot = chip->slots[i];
-		struct sdhci_host *host;
-
-		if (!slot)
-			continue;
-
-		host = slot->host;
-
-		if (chip->pm_retune && host->tuning_mode != SDHCI_TUNING_MODE_3)
-			mmc_retune_needed(host->mmc);
-
-		ret = sdhci_suspend_host(host);
-		if (ret)
-			goto err_pci_suspend;
-
-		if (device_may_wakeup(&chip->pdev->dev))
-			mmc_gpio_set_cd_wake(host->mmc, true);
-	}
-
-	return 0;
-
-err_pci_suspend:
-	while (--i >= 0)
-		sdhci_resume_host(chip->slots[i]->host);
-	return ret;
-}
-
-int sdhci_pci_resume_host(struct sdhci_pci_chip *chip)
-{
-	struct sdhci_pci_slot *slot;
-	int i, ret;
-
-	for (i = 0; i < chip->num_slots; i++) {
-		slot = chip->slots[i];
-		if (!slot)
-			continue;
-
-		ret = sdhci_resume_host(slot->host);
-		if (ret)
-			return ret;
-
-		mmc_gpio_set_cd_wake(slot->host->mmc, false);
-	}
-
-	return 0;
-}
-
-static int sdhci_cqhci_suspend(struct sdhci_pci_chip *chip)
-{
-	int ret;
-
-	ret = cqhci_suspend(chip->slots[0]->host->mmc);
-	if (ret)
-		return ret;
-
-	return sdhci_pci_suspend_host(chip);
-}
-
-static int sdhci_cqhci_resume(struct sdhci_pci_chip *chip)
-{
-	int ret;
-
-	ret = sdhci_pci_resume_host(chip);
-	if (ret)
-		return ret;
-
-	return cqhci_resume(chip->slots[0]->host->mmc);
-}
-#endif
-
-#ifdef CONFIG_PM
-static int sdhci_pci_runtime_suspend_host(struct sdhci_pci_chip *chip)
-{
-	struct sdhci_pci_slot *slot;
-	struct sdhci_host *host;
-	int i, ret;
-
-	for (i = 0; i < chip->num_slots; i++) {
-		slot = chip->slots[i];
-		if (!slot)
-			continue;
-
-		host = slot->host;
-
-		ret = sdhci_runtime_suspend_host(host);
-		if (ret)
-			goto err_pci_runtime_suspend;
-
-		if (chip->rpm_retune &&
-		    host->tuning_mode != SDHCI_TUNING_MODE_3)
-			mmc_retune_needed(host->mmc);
-	}
-
-	return 0;
-
-err_pci_runtime_suspend:
-	while (--i >= 0)
-		sdhci_runtime_resume_host(chip->slots[i]->host, 0);
-	return ret;
-}
-
-static int sdhci_pci_runtime_resume_host(struct sdhci_pci_chip *chip)
-{
-	struct sdhci_pci_slot *slot;
-	int i, ret;
-
-	for (i = 0; i < chip->num_slots; i++) {
-		slot = chip->slots[i];
-		if (!slot)
-			continue;
-
-		ret = sdhci_runtime_resume_host(slot->host, 0);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-
-static int sdhci_cqhci_runtime_suspend(struct sdhci_pci_chip *chip)
-{
-	int ret;
-
-	ret = cqhci_suspend(chip->slots[0]->host->mmc);
-	if (ret)
-		return ret;
-
-	return sdhci_pci_runtime_suspend_host(chip);
-}
-
-static int sdhci_cqhci_runtime_resume(struct sdhci_pci_chip *chip)
-{
-	int ret;
-
-	ret = sdhci_pci_runtime_resume_host(chip);
-	if (ret)
-		return ret;
-
-	return cqhci_resume(chip->slots[0]->host->mmc);
-}
-#endif
-
-static u32 sdhci_cqhci_irq(struct sdhci_host *host, u32 intmask)
-{
-	int cmd_error = 0;
-	int data_error = 0;
-
-	if (!sdhci_cqe_irq(host, intmask, &cmd_error, &data_error))
-		return intmask;
-
-	cqhci_irq(host->mmc, intmask, cmd_error, data_error);
-
-	return 0;
-}
-
-static void sdhci_pci_dumpregs(struct mmc_host *mmc)
-{
-	sdhci_dumpregs(mmc_priv(mmc));
-}
-
-static void sdhci_cqhci_reset(struct sdhci_host *host, u8 mask)
-{
-	if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL) &&
-	    host->mmc->cqe_private)
-		cqhci_deactivate(host->mmc);
-	sdhci_reset(host, mask);
-}
-
-/*****************************************************************************\
- *                                                                           *
- * Hardware specific quirk handling                                          *
- *                                                                           *
-\*****************************************************************************/
-
-static int ricoh_probe(struct sdhci_pci_chip *chip)
-{
-	if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
-	    chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
-		chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
-	return 0;
-}
-
-static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
-{
-	slot->host->caps =
-		FIELD_PREP(SDHCI_TIMEOUT_CLK_MASK, 0x21) |
-		FIELD_PREP(SDHCI_CLOCK_BASE_MASK, 0x21) |
-		SDHCI_TIMEOUT_CLK_UNIT |
-		SDHCI_CAN_VDD_330 |
-		SDHCI_CAN_DO_HISPD |
-		SDHCI_CAN_DO_SDMA;
-	return 0;
-}
-
-#ifdef CONFIG_PM_SLEEP
-static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
-{
-	/* Apply a delay to allow controller to settle */
-	/* Otherwise it becomes confused if card state changed
-		during suspend */
-	msleep(500);
-	return sdhci_pci_resume_host(chip);
-}
-#endif
-
-static const struct sdhci_pci_fixes sdhci_ricoh = {
-	.probe		= ricoh_probe,
-	.quirks		= SDHCI_QUIRK_32BIT_DMA_ADDR |
-			  SDHCI_QUIRK_FORCE_DMA |
-			  SDHCI_QUIRK_CLOCK_BEFORE_RESET,
-};
-
-static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
-	.probe_slot	= ricoh_mmc_probe_slot,
-#ifdef CONFIG_PM_SLEEP
-	.resume		= ricoh_mmc_resume,
-#endif
-	.quirks		= SDHCI_QUIRK_32BIT_DMA_ADDR |
-			  SDHCI_QUIRK_CLOCK_BEFORE_RESET |
-			  SDHCI_QUIRK_NO_CARD_NO_RESET |
-			  SDHCI_QUIRK_MISSING_CAPS
-};
-
-static void ene_714_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
-{
-	struct sdhci_host *host = mmc_priv(mmc);
-
-	sdhci_set_ios(mmc, ios);
-
-	/*
-	 * Some (ENE) controllers misbehave on some ios operations,
-	 * signalling timeout and CRC errors even on CMD0. Resetting
-	 * it on each ios seems to solve the problem.
-	 */
-	if (!(host->flags & SDHCI_DEVICE_DEAD))
-		sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
-}
-
-static int ene_714_probe_slot(struct sdhci_pci_slot *slot)
-{
-	slot->host->mmc_host_ops.set_ios = ene_714_set_ios;
-	return 0;
-}
-
-static const struct sdhci_pci_fixes sdhci_ene_712 = {
-	.quirks		= SDHCI_QUIRK_SINGLE_POWER_WRITE |
-			  SDHCI_QUIRK_BROKEN_DMA,
-};
-
-static const struct sdhci_pci_fixes sdhci_ene_714 = {
-	.quirks		= SDHCI_QUIRK_SINGLE_POWER_WRITE |
-			  SDHCI_QUIRK_BROKEN_DMA,
-	.probe_slot	= ene_714_probe_slot,
-};
-
-static const struct sdhci_pci_fixes sdhci_cafe = {
-	.quirks		= SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
-			  SDHCI_QUIRK_NO_BUSY_IRQ |
-			  SDHCI_QUIRK_BROKEN_CARD_DETECTION |
-			  SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
-};
-
-static const struct sdhci_pci_fixes sdhci_intel_qrk = {
-	.quirks		= SDHCI_QUIRK_NO_HISPD_BIT,
-};
-
-static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
-{
-	slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
-	return 0;
-}
-
-/*
- * ADMA operation is disabled for Moorestown platform due to
- * hardware bugs.
- */
-static int mrst_hc_probe(struct sdhci_pci_chip *chip)
-{
-	/*
-	 * slots number is fixed here for MRST as SDIO3/5 are never used and
-	 * have hardware bugs.
-	 */
-	chip->num_slots = 1;
-	return 0;
-}
-
-static int pch_hc_probe_slot(struct sdhci_pci_slot *slot)
-{
-	slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
-	return 0;
-}
-
-static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
-{
-	slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
-	slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC;
-	return 0;
-}
-
-static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot)
-{
-	slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
-	return 0;
-}
-
-static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
-	.quirks		= SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
-	.probe_slot	= mrst_hc_probe_slot,
-};
-
-static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
-	.quirks		= SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
-	.probe		= mrst_hc_probe,
-};
-
-static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
-	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
-	.allow_runtime_pm = true,
-	.own_cd_for_runtime_pm = true,
-};
-
-static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = {
-	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
-	.quirks2	= SDHCI_QUIRK2_HOST_OFF_CARD_ON,
-	.allow_runtime_pm = true,
-	.probe_slot	= mfd_sdio_probe_slot,
-};
-
-static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = {
-	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
-	.allow_runtime_pm = true,
-	.probe_slot	= mfd_emmc_probe_slot,
-};
-
-static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = {
-	.quirks		= SDHCI_QUIRK_BROKEN_ADMA,
-	.probe_slot	= pch_hc_probe_slot,
-};
-
-#ifdef CONFIG_X86
-
-#define BYT_IOSF_SCCEP			0x63
-#define BYT_IOSF_OCP_NETCTRL0		0x1078
-#define BYT_IOSF_OCP_TIMEOUT_BASE	GENMASK(10, 8)
-
-static void byt_ocp_setting(struct pci_dev *pdev)
-{
-	u32 val = 0;
-
-	if (pdev->device != PCI_DEVICE_ID_INTEL_BYT_EMMC &&
-	    pdev->device != PCI_DEVICE_ID_INTEL_BYT_SDIO &&
-	    pdev->device != PCI_DEVICE_ID_INTEL_BYT_SD &&
-	    pdev->device != PCI_DEVICE_ID_INTEL_BYT_EMMC2)
-		return;
-
-	if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0,
-			  &val)) {
-		dev_err(&pdev->dev, "%s read error\n", __func__);
-		return;
-	}
-
-	if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE))
-		return;
-
-	val &= ~BYT_IOSF_OCP_TIMEOUT_BASE;
-
-	if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0,
-			   val)) {
-		dev_err(&pdev->dev, "%s write error\n", __func__);
-		return;
-	}
-
-	dev_dbg(&pdev->dev, "%s completed\n", __func__);
-}
-
-#else
-
-static inline void byt_ocp_setting(struct pci_dev *pdev)
-{
-}
-
-#endif
-
-enum {
-	INTEL_DSM_FNS		=  0,
-	INTEL_DSM_V18_SWITCH	=  3,
-	INTEL_DSM_V33_SWITCH	=  4,
-	INTEL_DSM_DRV_STRENGTH	=  9,
-	INTEL_DSM_D3_RETUNE	= 10,
-};
-
-struct intel_host {
-	u32	dsm_fns;
-	int	drv_strength;
-	bool	d3_retune;
-	bool	rpm_retune_ok;
-	bool	needs_pwr_off;
-	u32	glk_rx_ctrl1;
-	u32	glk_tun_val;
-	u32	active_ltr;
-	u32	idle_ltr;
-};
-
-static const guid_t intel_dsm_guid =
-	GUID_INIT(0xF6C13EA5, 0x65CD, 0x461F,
-		  0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61);
-
-static int __intel_dsm(struct intel_host *intel_host, struct device *dev,
-		       unsigned int fn, u32 *result)
-{
-	union acpi_object *obj;
-	int err = 0;
-	size_t len;
-
-	obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), &intel_dsm_guid, 0, fn, NULL);
-	if (!obj)
-		return -EOPNOTSUPP;
-
-	if (obj->type != ACPI_TYPE_BUFFER || obj->buffer.length < 1) {
-		err = -EINVAL;
-		goto out;
-	}
-
-	len = min_t(size_t, obj->buffer.length, 4);
-
-	*result = 0;
-	memcpy(result, obj->buffer.pointer, len);
-out:
-	ACPI_FREE(obj);
-
-	return err;
-}
-
-static int intel_dsm(struct intel_host *intel_host, struct device *dev,
-		     unsigned int fn, u32 *result)
-{
-	if (fn > 31 || !(intel_host->dsm_fns & (1 << fn)))
-		return -EOPNOTSUPP;
-
-	return __intel_dsm(intel_host, dev, fn, result);
-}
-
-static void intel_dsm_init(struct intel_host *intel_host, struct device *dev,
-			   struct mmc_host *mmc)
-{
-	int err;
-	u32 val;
-
-	intel_host->d3_retune = true;
-
-	err = __intel_dsm(intel_host, dev, INTEL_DSM_FNS, &intel_host->dsm_fns);
-	if (err) {
-		pr_debug("%s: DSM not supported, error %d\n",
-			 mmc_hostname(mmc), err);
-		return;
-	}
-
-	pr_debug("%s: DSM function mask %#x\n",
-		 mmc_hostname(mmc), intel_host->dsm_fns);
-
-	err = intel_dsm(intel_host, dev, INTEL_DSM_DRV_STRENGTH, &val);
-	intel_host->drv_strength = err ? 0 : val;
-
-	err = intel_dsm(intel_host, dev, INTEL_DSM_D3_RETUNE, &val);
-	intel_host->d3_retune = err ? true : !!val;
-}
-
-static void sdhci_pci_int_hw_reset(struct sdhci_host *host)
-{
-	u8 reg;
-
-	reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
-	reg |= 0x10;
-	sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
-	/* For eMMC, minimum is 1us but give it 9us for good measure */
-	udelay(9);
-	reg &= ~0x10;
-	sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
-	/* For eMMC, minimum is 200us but give it 300us for good measure */
-	usleep_range(300, 1000);
-}
-
-static int intel_select_drive_strength(struct mmc_card *card,
-				       unsigned int max_dtr, int host_drv,
-				       int card_drv, int *drv_type)
-{
-	struct sdhci_host *host = mmc_priv(card->host);
-	struct sdhci_pci_slot *slot = sdhci_priv(host);
-	struct intel_host *intel_host = sdhci_pci_priv(slot);
-
-	if (!(mmc_driver_type_mask(intel_host->drv_strength) & card_drv))
-		return 0;
-
-	return intel_host->drv_strength;
-}
-
-static int bxt_get_cd(struct mmc_host *mmc)
-{
-	int gpio_cd = mmc_gpio_get_cd(mmc);
-
-	if (!gpio_cd)
-		return 0;
-
-	return sdhci_get_cd_nogpio(mmc);
-}
-
-static int mrfld_get_cd(struct mmc_host *mmc)
-{
-	return sdhci_get_cd_nogpio(mmc);
-}
-
-#define SDHCI_INTEL_PWR_TIMEOUT_CNT	20
-#define SDHCI_INTEL_PWR_TIMEOUT_UDELAY	100
-
-static void sdhci_intel_set_power(struct sdhci_host *host, unsigned char mode,
-				  unsigned short vdd)
-{
-	struct sdhci_pci_slot *slot = sdhci_priv(host);
-	struct intel_host *intel_host = sdhci_pci_priv(slot);
-	int cntr;
-	u8 reg;
-
-	/*
-	 * Bus power may control card power, but a full reset still may not
-	 * reset the power, whereas a direct write to SDHCI_POWER_CONTROL can.
-	 * That might be needed to initialize correctly, if the card was left
-	 * powered on previously.
-	 */
-	if (intel_host->needs_pwr_off) {
-		intel_host->needs_pwr_off = false;
-		if (mode != MMC_POWER_OFF) {
-			sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
-			usleep_range(10000, 12500);
-		}
-	}
-
-	sdhci_set_power(host, mode, vdd);
-
-	if (mode == MMC_POWER_OFF)
-		return;
-
-	/*
-	 * Bus power might not enable after D3 -> D0 transition due to the
-	 * present state not yet having propagated. Retry for up to 2ms.
-	 */
-	for (cntr = 0; cntr < SDHCI_INTEL_PWR_TIMEOUT_CNT; cntr++) {
-		reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
-		if (reg & SDHCI_POWER_ON)
-			break;
-		udelay(SDHCI_INTEL_PWR_TIMEOUT_UDELAY);
-		reg |= SDHCI_POWER_ON;
-		sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
-	}
-}
-
-static void sdhci_intel_set_uhs_signaling(struct sdhci_host *host,
-					  unsigned int timing)
-{
-	/* Set UHS timing to SDR25 for High Speed mode */
-	if (timing == MMC_TIMING_MMC_HS || timing == MMC_TIMING_SD_HS)
-		timing = MMC_TIMING_UHS_SDR25;
-	sdhci_set_uhs_signaling(host, timing);
-}
-
-#define INTEL_HS400_ES_REG 0x78
-#define INTEL_HS400_ES_BIT BIT(0)
-
-static void intel_hs400_enhanced_strobe(struct mmc_host *mmc,
-					struct mmc_ios *ios)
-{
-	struct sdhci_host *host = mmc_priv(mmc);
-	u32 val;
-
-	val = sdhci_readl(host, INTEL_HS400_ES_REG);
-	if (ios->enhanced_strobe)
-		val |= INTEL_HS400_ES_BIT;
-	else
-		val &= ~INTEL_HS400_ES_BIT;
-	sdhci_writel(host, val, INTEL_HS400_ES_REG);
-}
-
-static int intel_start_signal_voltage_switch(struct mmc_host *mmc,
-					     struct mmc_ios *ios)
-{
-	struct device *dev = mmc_dev(mmc);
-	struct sdhci_host *host = mmc_priv(mmc);
-	struct sdhci_pci_slot *slot = sdhci_priv(host);
-	struct intel_host *intel_host = sdhci_pci_priv(slot);
-	unsigned int fn;
-	u32 result = 0;
-	int err;
-
-	err = sdhci_start_signal_voltage_switch(mmc, ios);
-	if (err)
-		return err;
-
-	switch (ios->signal_voltage) {
-	case MMC_SIGNAL_VOLTAGE_330:
-		fn = INTEL_DSM_V33_SWITCH;
-		break;
-	case MMC_SIGNAL_VOLTAGE_180:
-		fn = INTEL_DSM_V18_SWITCH;
-		break;
-	default:
-		return 0;
-	}
-
-	err = intel_dsm(intel_host, dev, fn, &result);
-	pr_debug("%s: %s DSM fn %u error %d result %u\n",
-		 mmc_hostname(mmc), __func__, fn, err, result);
-
-	return 0;
-}
-
-static const struct sdhci_ops sdhci_intel_byt_ops = {
-	.set_clock		= sdhci_set_clock,
-	.set_power		= sdhci_intel_set_power,
-	.enable_dma		= sdhci_pci_enable_dma,
-	.set_bus_width		= sdhci_set_bus_width,
-	.reset			= sdhci_reset,
-	.set_uhs_signaling	= sdhci_intel_set_uhs_signaling,
-	.hw_reset		= sdhci_pci_hw_reset,
-};
-
-static const struct sdhci_ops sdhci_intel_glk_ops = {
-	.set_clock		= sdhci_set_clock,
-	.set_power		= sdhci_intel_set_power,
-	.enable_dma		= sdhci_pci_enable_dma,
-	.set_bus_width		= sdhci_set_bus_width,
-	.reset			= sdhci_cqhci_reset,
-	.set_uhs_signaling	= sdhci_intel_set_uhs_signaling,
-	.hw_reset		= sdhci_pci_hw_reset,
-	.irq			= sdhci_cqhci_irq,
-};
-
-static void byt_read_dsm(struct sdhci_pci_slot *slot)
-{
-	struct intel_host *intel_host = sdhci_pci_priv(slot);
-	struct device *dev = &slot->chip->pdev->dev;
-	struct mmc_host *mmc = slot->host->mmc;
-
-	intel_dsm_init(intel_host, dev, mmc);
-	slot->chip->rpm_retune = intel_host->d3_retune;
-}
-
-static int intel_execute_tuning(struct mmc_host *mmc, u32 opcode)
-{
-	int err = sdhci_execute_tuning(mmc, opcode);
-	struct sdhci_host *host = mmc_priv(mmc);
-
-	if (err)
-		return err;
-
-	/*
-	 * Tuning can leave the IP in an active state (Buffer Read Enable bit
-	 * set) which prevents the entry to low power states (i.e. S0i3). Data
-	 * reset will clear it.
-	 */
-	sdhci_reset(host, SDHCI_RESET_DATA);
-
-	return 0;
-}
-
-#define INTEL_ACTIVELTR		0x804
-#define INTEL_IDLELTR		0x808
-
-#define INTEL_LTR_REQ		BIT(15)
-#define INTEL_LTR_SCALE_MASK	GENMASK(11, 10)
-#define INTEL_LTR_SCALE_1US	(2 << 10)
-#define INTEL_LTR_SCALE_32US	(3 << 10)
-#define INTEL_LTR_VALUE_MASK	GENMASK(9, 0)
-
-static void intel_cache_ltr(struct sdhci_pci_slot *slot)
-{
-	struct intel_host *intel_host = sdhci_pci_priv(slot);
-	struct sdhci_host *host = slot->host;
-
-	intel_host->active_ltr = readl(host->ioaddr + INTEL_ACTIVELTR);
-	intel_host->idle_ltr = readl(host->ioaddr + INTEL_IDLELTR);
-}
-
-static void intel_ltr_set(struct device *dev, s32 val)
-{
-	struct sdhci_pci_chip *chip = dev_get_drvdata(dev);
-	struct sdhci_pci_slot *slot = chip->slots[0];
-	struct intel_host *intel_host = sdhci_pci_priv(slot);
-	struct sdhci_host *host = slot->host;
-	u32 ltr;
-
-	pm_runtime_get_sync(dev);
-
-	/*
-	 * Program latency tolerance (LTR) accordingly what has been asked
-	 * by the PM QoS layer or disable it in case we were passed
-	 * negative value or PM_QOS_LATENCY_ANY.
-	 */
-	ltr = readl(host->ioaddr + INTEL_ACTIVELTR);
-
-	if (val == PM_QOS_LATENCY_ANY || val < 0) {
-		ltr &= ~INTEL_LTR_REQ;
-	} else {
-		ltr |= INTEL_LTR_REQ;
-		ltr &= ~INTEL_LTR_SCALE_MASK;
-		ltr &= ~INTEL_LTR_VALUE_MASK;
-
-		if (val > INTEL_LTR_VALUE_MASK) {
-			val >>= 5;
-			if (val > INTEL_LTR_VALUE_MASK)
-				val = INTEL_LTR_VALUE_MASK;
-			ltr |= INTEL_LTR_SCALE_32US | val;
-		} else {
-			ltr |= INTEL_LTR_SCALE_1US | val;
-		}
-	}
-
-	if (ltr == intel_host->active_ltr)
-		goto out;
-
-	writel(ltr, host->ioaddr + INTEL_ACTIVELTR);
-	writel(ltr, host->ioaddr + INTEL_IDLELTR);
-
-	/* Cache the values into lpss structure */
-	intel_cache_ltr(slot);
-out:
-	pm_runtime_put_autosuspend(dev);
-}
-
-static bool intel_use_ltr(struct sdhci_pci_chip *chip)
-{
-	switch (chip->pdev->device) {
-	case PCI_DEVICE_ID_INTEL_BYT_EMMC:
-	case PCI_DEVICE_ID_INTEL_BYT_EMMC2:
-	case PCI_DEVICE_ID_INTEL_BYT_SDIO:
-	case PCI_DEVICE_ID_INTEL_BYT_SD:
-	case PCI_DEVICE_ID_INTEL_BSW_EMMC:
-	case PCI_DEVICE_ID_INTEL_BSW_SDIO:
-	case PCI_DEVICE_ID_INTEL_BSW_SD:
-		return false;
-	default:
-		return true;
-	}
-}
-
-static void intel_ltr_expose(struct sdhci_pci_chip *chip)
-{
-	struct device *dev = &chip->pdev->dev;
-
-	if (!intel_use_ltr(chip))
-		return;
-
-	dev->power.set_latency_tolerance = intel_ltr_set;
-	dev_pm_qos_expose_latency_tolerance(dev);
-}
-
-static void intel_ltr_hide(struct sdhci_pci_chip *chip)
-{
-	struct device *dev = &chip->pdev->dev;
-
-	if (!intel_use_ltr(chip))
-		return;
-
-	dev_pm_qos_hide_latency_tolerance(dev);
-	dev->power.set_latency_tolerance = NULL;
-}
-
-static void byt_probe_slot(struct sdhci_pci_slot *slot)
-{
-	struct mmc_host_ops *ops = &slot->host->mmc_host_ops;
-	struct device *dev = &slot->chip->pdev->dev;
-	struct mmc_host *mmc = slot->host->mmc;
-
-	byt_read_dsm(slot);
-
-	byt_ocp_setting(slot->chip->pdev);
-
-	ops->execute_tuning = intel_execute_tuning;
-	ops->start_signal_voltage_switch = intel_start_signal_voltage_switch;
-
-	device_property_read_u32(dev, "max-frequency", &mmc->f_max);
-
-	if (!mmc->slotno) {
-		slot->chip->slots[mmc->slotno] = slot;
-		intel_ltr_expose(slot->chip);
-	}
-}
-
-static void byt_add_debugfs(struct sdhci_pci_slot *slot)
-{
-	struct intel_host *intel_host = sdhci_pci_priv(slot);
-	struct mmc_host *mmc = slot->host->mmc;
-	struct dentry *dir = mmc->debugfs_root;
-
-	if (!intel_use_ltr(slot->chip))
-		return;
-
-	debugfs_create_x32("active_ltr", 0444, dir, &intel_host->active_ltr);
-	debugfs_create_x32("idle_ltr", 0444, dir, &intel_host->idle_ltr);
-
-	intel_cache_ltr(slot);
-}
-
-static int byt_add_host(struct sdhci_pci_slot *slot)
-{
-	int ret = sdhci_add_host(slot->host);
-
-	if (!ret)
-		byt_add_debugfs(slot);
-	return ret;
-}
-
-static void byt_remove_slot(struct sdhci_pci_slot *slot, int dead)
-{
-	struct mmc_host *mmc = slot->host->mmc;
-
-	if (!mmc->slotno)
-		intel_ltr_hide(slot->chip);
-}
-
-static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
-{
-	byt_probe_slot(slot);
-	slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
-				 MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
-				 MMC_CAP_CMD_DURING_TFR |
-				 MMC_CAP_WAIT_WHILE_BUSY;
-	slot->hw_reset = sdhci_pci_int_hw_reset;
-	if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BSW_EMMC)
-		slot->host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
-	slot->host->mmc_host_ops.select_drive_strength =
-						intel_select_drive_strength;
-	return 0;
-}
-
-static int dnv_emmc_hs_probe_slot(struct sdhci_pci_slot *slot)
-{
-    /* Remove 1.8V capability, if 1.8V is supported, it will be negotiated to DDR mode */
-	slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
-				 MMC_CAP_HW_RESET |
-				 MMC_CAP_CMD_DURING_TFR |
-				 MMC_CAP_WAIT_WHILE_BUSY;
-	slot->hw_reset = sdhci_pci_int_hw_reset;
-	return 0;
-}
-
-static bool glk_broken_cqhci(struct sdhci_pci_slot *slot)
-{
-	return slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_GLK_EMMC &&
-	       (dmi_match(DMI_BIOS_VENDOR, "LENOVO") ||
-		dmi_match(DMI_SYS_VENDOR, "IRBIS"));
-}
-
-static bool jsl_broken_hs400es(struct sdhci_pci_slot *slot)
-{
-	return slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_JSL_EMMC &&
-			dmi_match(DMI_BIOS_VENDOR, "ASUSTeK COMPUTER INC.");
-}
-
-static int glk_emmc_probe_slot(struct sdhci_pci_slot *slot)
-{
-	int ret = byt_emmc_probe_slot(slot);
-
-	if (!glk_broken_cqhci(slot))
-		slot->host->mmc->caps2 |= MMC_CAP2_CQE;
-
-	if (slot->chip->pdev->device != PCI_DEVICE_ID_INTEL_GLK_EMMC) {
-		if (!jsl_broken_hs400es(slot)) {
-			slot->host->mmc->caps2 |= MMC_CAP2_HS400_ES;
-			slot->host->mmc_host_ops.hs400_enhanced_strobe =
-							intel_hs400_enhanced_strobe;
-		}
-		slot->host->mmc->caps2 |= MMC_CAP2_CQE_DCMD;
-	}
-
-	return ret;
-}
-
-static const struct cqhci_host_ops glk_cqhci_ops = {
-	.enable		= sdhci_cqe_enable,
-	.disable	= sdhci_cqe_disable,
-	.dumpregs	= sdhci_pci_dumpregs,
-};
-
-static int glk_emmc_add_host(struct sdhci_pci_slot *slot)
-{
-	struct device *dev = &slot->chip->pdev->dev;
-	struct sdhci_host *host = slot->host;
-	struct cqhci_host *cq_host;
-	bool dma64;
-	int ret;
-
-	ret = sdhci_setup_host(host);
-	if (ret)
-		return ret;
-
-	cq_host = devm_kzalloc(dev, sizeof(*cq_host), GFP_KERNEL);
-	if (!cq_host) {
-		ret = -ENOMEM;
-		goto cleanup;
-	}
-
-	cq_host->mmio = host->ioaddr + 0x200;
-	cq_host->quirks |= CQHCI_QUIRK_SHORT_TXFR_DESC_SZ;
-	cq_host->ops = &glk_cqhci_ops;
-
-	dma64 = host->flags & SDHCI_USE_64_BIT_DMA;
-	if (dma64)
-		cq_host->caps |= CQHCI_TASK_DESC_SZ_128;
-
-	ret = cqhci_init(cq_host, host->mmc, dma64);
-	if (ret)
-		goto cleanup;
-
-	ret = __sdhci_add_host(host);
-	if (ret)
-		goto cleanup;
-
-	byt_add_debugfs(slot);
-
-	return 0;
-
-cleanup:
-	sdhci_cleanup_host(host);
-	return ret;
-}
-
-#ifdef CONFIG_PM
-#define GLK_RX_CTRL1	0x834
-#define GLK_TUN_VAL	0x840
-#define GLK_PATH_PLL	GENMASK(13, 8)
-#define GLK_DLY		GENMASK(6, 0)
-/* Workaround firmware failing to restore the tuning value */
-static void glk_rpm_retune_wa(struct sdhci_pci_chip *chip, bool susp)
-{
-	struct sdhci_pci_slot *slot = chip->slots[0];
-	struct intel_host *intel_host = sdhci_pci_priv(slot);
-	struct sdhci_host *host = slot->host;
-	u32 glk_rx_ctrl1;
-	u32 glk_tun_val;
-	u32 dly;
-
-	if (intel_host->rpm_retune_ok || !mmc_can_retune(host->mmc))
-		return;
-
-	glk_rx_ctrl1 = sdhci_readl(host, GLK_RX_CTRL1);
-	glk_tun_val = sdhci_readl(host, GLK_TUN_VAL);
-
-	if (susp) {
-		intel_host->glk_rx_ctrl1 = glk_rx_ctrl1;
-		intel_host->glk_tun_val = glk_tun_val;
-		return;
-	}
-
-	if (!intel_host->glk_tun_val)
-		return;
-
-	if (glk_rx_ctrl1 != intel_host->glk_rx_ctrl1) {
-		intel_host->rpm_retune_ok = true;
-		return;
-	}
-
-	dly = FIELD_PREP(GLK_DLY, FIELD_GET(GLK_PATH_PLL, glk_rx_ctrl1) +
-				  (intel_host->glk_tun_val << 1));
-	if (dly == FIELD_GET(GLK_DLY, glk_rx_ctrl1))
-		return;
-
-	glk_rx_ctrl1 = (glk_rx_ctrl1 & ~GLK_DLY) | dly;
-	sdhci_writel(host, glk_rx_ctrl1, GLK_RX_CTRL1);
-
-	intel_host->rpm_retune_ok = true;
-	chip->rpm_retune = true;
-	mmc_retune_needed(host->mmc);
-	pr_info("%s: Requiring re-tune after rpm resume", mmc_hostname(host->mmc));
-}
-
-static void glk_rpm_retune_chk(struct sdhci_pci_chip *chip, bool susp)
-{
-	if (chip->pdev->device == PCI_DEVICE_ID_INTEL_GLK_EMMC &&
-	    !chip->rpm_retune)
-		glk_rpm_retune_wa(chip, susp);
-}
-
-static int glk_runtime_suspend(struct sdhci_pci_chip *chip)
-{
-	glk_rpm_retune_chk(chip, true);
-
-	return sdhci_cqhci_runtime_suspend(chip);
-}
-
-static int glk_runtime_resume(struct sdhci_pci_chip *chip)
-{
-	glk_rpm_retune_chk(chip, false);
-
-	return sdhci_cqhci_runtime_resume(chip);
-}
-#endif
-
-#ifdef CONFIG_ACPI
-static int ni_set_max_freq(struct sdhci_pci_slot *slot)
-{
-	acpi_status status;
-	unsigned long long max_freq;
-
-	status = acpi_evaluate_integer(ACPI_HANDLE(&slot->chip->pdev->dev),
-				       "MXFQ", NULL, &max_freq);
-	if (ACPI_FAILURE(status)) {
-		dev_err(&slot->chip->pdev->dev,
-			"MXFQ not found in acpi table\n");
-		return -EINVAL;
-	}
-
-	slot->host->mmc->f_max = max_freq * 1000000;
-
-	return 0;
-}
-#else
-static inline int ni_set_max_freq(struct sdhci_pci_slot *slot)
-{
-	return 0;
-}
-#endif
-
-static int ni_byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
-{
-	int err;
-
-	byt_probe_slot(slot);
-
-	err = ni_set_max_freq(slot);
-	if (err)
-		return err;
-
-	slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE |
-				 MMC_CAP_WAIT_WHILE_BUSY;
-	return 0;
-}
-
-static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
-{
-	byt_probe_slot(slot);
-	slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE |
-				 MMC_CAP_WAIT_WHILE_BUSY;
-	return 0;
-}
-
-static void byt_needs_pwr_off(struct sdhci_pci_slot *slot)
-{
-	struct intel_host *intel_host = sdhci_pci_priv(slot);
-	u8 reg = sdhci_readb(slot->host, SDHCI_POWER_CONTROL);
-
-	intel_host->needs_pwr_off = reg  & SDHCI_POWER_ON;
-}
-
-static int byt_sd_probe_slot(struct sdhci_pci_slot *slot)
-{
-	byt_probe_slot(slot);
-	slot->host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY |
-				 MMC_CAP_AGGRESSIVE_PM | MMC_CAP_CD_WAKE;
-	slot->cd_idx = 0;
-	slot->cd_override_level = true;
-	if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXT_SD ||
-	    slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXTM_SD ||
-	    slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_APL_SD ||
-	    slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_GLK_SD)
-		slot->host->mmc_host_ops.get_cd = bxt_get_cd;
-
-	if (slot->chip->pdev->subsystem_vendor == PCI_VENDOR_ID_NI &&
-	    slot->chip->pdev->subsystem_device == PCI_SUBDEVICE_ID_NI_78E3)
-		slot->host->mmc->caps2 |= MMC_CAP2_AVOID_3_3V;
-
-	byt_needs_pwr_off(slot);
-
-	return 0;
-}
-
-#ifdef CONFIG_PM_SLEEP
-
-static int byt_resume(struct sdhci_pci_chip *chip)
-{
-	byt_ocp_setting(chip->pdev);
-
-	return sdhci_pci_resume_host(chip);
-}
-
-#endif
-
-#ifdef CONFIG_PM
-
-static int byt_runtime_resume(struct sdhci_pci_chip *chip)
-{
-	byt_ocp_setting(chip->pdev);
-
-	return sdhci_pci_runtime_resume_host(chip);
-}
-
-#endif
-
-static struct sdhci_pci_fixes sdhci_intel_dnv_emmc = {
-#ifdef CONFIG_PM_SLEEP
-	.resume		= byt_resume,
-#endif
-#ifdef CONFIG_PM
-	.runtime_resume	= byt_runtime_resume,
-#endif
-	.allow_runtime_pm = true,
-	.probe_slot	= byt_emmc_probe_slot,
-	.add_host	= byt_add_host,
-	.remove_slot	= byt_remove_slot,
-	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
-			  SDHCI_QUIRK_NO_LED,
-	.quirks2	= SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
-			  SDHCI_QUIRK2_STOP_WITH_TC,
-	.ops		= &sdhci_intel_byt_ops,
-	.priv_size	= sizeof(struct intel_host),
-};
-
-static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = {
-#ifdef CONFIG_PM_SLEEP
-	.resume		= byt_resume,
-#endif
-#ifdef CONFIG_PM
-	.runtime_resume	= byt_runtime_resume,
-#endif
-	.allow_runtime_pm = true,
-	.probe_slot	= byt_emmc_probe_slot,
-	.add_host	= byt_add_host,
-	.remove_slot	= byt_remove_slot,
-	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
-			  SDHCI_QUIRK_NO_LED,
-	.quirks2	= SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
-			  SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 |
-			  SDHCI_QUIRK2_STOP_WITH_TC,
-	.ops		= &sdhci_intel_byt_ops,
-	.priv_size	= sizeof(struct intel_host),
-};
-
-static const struct sdhci_pci_fixes sdhci_intel_glk_emmc = {
-	.allow_runtime_pm	= true,
-	.probe_slot		= glk_emmc_probe_slot,
-	.add_host		= glk_emmc_add_host,
-	.remove_slot		= byt_remove_slot,
-#ifdef CONFIG_PM_SLEEP
-	.suspend		= sdhci_cqhci_suspend,
-	.resume			= sdhci_cqhci_resume,
-#endif
-#ifdef CONFIG_PM
-	.runtime_suspend	= glk_runtime_suspend,
-	.runtime_resume		= glk_runtime_resume,
-#endif
-	.quirks			= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
-				  SDHCI_QUIRK_NO_LED,
-	.quirks2		= SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
-				  SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 |
-				  SDHCI_QUIRK2_STOP_WITH_TC,
-	.ops			= &sdhci_intel_glk_ops,
-	.priv_size		= sizeof(struct intel_host),
-};
-
-static const struct sdhci_pci_fixes sdhci_ni_byt_sdio = {
-#ifdef CONFIG_PM_SLEEP
-	.resume		= byt_resume,
-#endif
-#ifdef CONFIG_PM
-	.runtime_resume	= byt_runtime_resume,
-#endif
-	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
-			  SDHCI_QUIRK_NO_LED,
-	.quirks2	= SDHCI_QUIRK2_HOST_OFF_CARD_ON |
-			  SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
-	.allow_runtime_pm = true,
-	.probe_slot	= ni_byt_sdio_probe_slot,
-	.add_host	= byt_add_host,
-	.remove_slot	= byt_remove_slot,
-	.ops		= &sdhci_intel_byt_ops,
-	.priv_size	= sizeof(struct intel_host),
-};
-
-static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = {
-#ifdef CONFIG_PM_SLEEP
-	.resume		= byt_resume,
-#endif
-#ifdef CONFIG_PM
-	.runtime_resume	= byt_runtime_resume,
-#endif
-	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
-			  SDHCI_QUIRK_NO_LED,
-	.quirks2	= SDHCI_QUIRK2_HOST_OFF_CARD_ON |
-			SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
-	.allow_runtime_pm = true,
-	.probe_slot	= byt_sdio_probe_slot,
-	.add_host	= byt_add_host,
-	.remove_slot	= byt_remove_slot,
-	.ops		= &sdhci_intel_byt_ops,
-	.priv_size	= sizeof(struct intel_host),
-};
-
-static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
-#ifdef CONFIG_PM_SLEEP
-	.resume		= byt_resume,
-#endif
-#ifdef CONFIG_PM
-	.runtime_resume	= byt_runtime_resume,
-#endif
-	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
-			  SDHCI_QUIRK_NO_LED,
-	.quirks2	= SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
-			  SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
-			  SDHCI_QUIRK2_STOP_WITH_TC,
-	.allow_runtime_pm = true,
-	.own_cd_for_runtime_pm = true,
-	.probe_slot	= byt_sd_probe_slot,
-	.add_host	= byt_add_host,
-	.remove_slot	= byt_remove_slot,
-	.ops		= &sdhci_intel_byt_ops,
-	.priv_size	= sizeof(struct intel_host),
-};
-
-/* Define Host controllers for Intel Merrifield platform */
-#define INTEL_MRFLD_EMMC_0	0
-#define INTEL_MRFLD_EMMC_1	1
-#define INTEL_MRFLD_SD		2
-#define INTEL_MRFLD_SDIO	3
-
-#ifdef CONFIG_ACPI
-static void intel_mrfld_mmc_fix_up_power_slot(struct sdhci_pci_slot *slot)
-{
-	struct acpi_device *device;
-
-	device = ACPI_COMPANION(&slot->chip->pdev->dev);
-	if (device)
-		acpi_device_fix_up_power_extended(device);
-}
-#else
-static inline void intel_mrfld_mmc_fix_up_power_slot(struct sdhci_pci_slot *slot) {}
-#endif
-
-static int intel_mrfld_mmc_probe_slot(struct sdhci_pci_slot *slot)
-{
-	unsigned int func = PCI_FUNC(slot->chip->pdev->devfn);
-
-	switch (func) {
-	case INTEL_MRFLD_EMMC_0:
-	case INTEL_MRFLD_EMMC_1:
-		slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE |
-					 MMC_CAP_8_BIT_DATA |
-					 MMC_CAP_1_8V_DDR;
-		break;
-	case INTEL_MRFLD_SD:
-		slot->cd_idx = 0;
-		slot->cd_override_level = true;
-		/*
-		 * There are two PCB designs of SD card slot with the opposite
-		 * card detection sense. Quirk this out by ignoring GPIO state
-		 * completely in the custom ->get_cd() callback.
-		 */
-		slot->host->mmc_host_ops.get_cd = mrfld_get_cd;
-		slot->host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
-		break;
-	case INTEL_MRFLD_SDIO:
-		/* Advertise 2.0v for compatibility with the SDIO card's OCR */
-		slot->host->ocr_mask = MMC_VDD_20_21 | MMC_VDD_165_195;
-		slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE |
-					 MMC_CAP_POWER_OFF_CARD;
-		break;
-	default:
-		return -ENODEV;
-	}
-
-	intel_mrfld_mmc_fix_up_power_slot(slot);
-	return 0;
-}
-
-static const struct sdhci_pci_fixes sdhci_intel_mrfld_mmc = {
-	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
-	.quirks2	= SDHCI_QUIRK2_BROKEN_HS200 |
-			SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
-	.allow_runtime_pm = true,
-	.probe_slot	= intel_mrfld_mmc_probe_slot,
-};
-
-static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
-{
-	u8 scratch;
-	int ret;
-
-	ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
-	if (ret)
-		return ret;
-
-	/*
-	 * Turn PMOS on [bit 0], set over current detection to 2.4 V
-	 * [bit 1:2] and enable over current debouncing [bit 6].
-	 */
-	if (on)
-		scratch |= 0x47;
-	else
-		scratch &= ~0x47;
-
-	return pci_write_config_byte(chip->pdev, 0xAE, scratch);
-}
-
-static int jmicron_probe(struct sdhci_pci_chip *chip)
-{
-	int ret;
-	u16 mmcdev = 0;
-
-	if (chip->pdev->revision == 0) {
-		chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
-			  SDHCI_QUIRK_32BIT_DMA_SIZE |
-			  SDHCI_QUIRK_32BIT_ADMA_SIZE |
-			  SDHCI_QUIRK_RESET_AFTER_REQUEST |
-			  SDHCI_QUIRK_BROKEN_SMALL_PIO;
-	}
-
-	/*
-	 * JMicron chips can have two interfaces to the same hardware
-	 * in order to work around limitations in Microsoft's driver.
-	 * We need to make sure we only bind to one of them.
-	 *
-	 * This code assumes two things:
-	 *
-	 * 1. The PCI code adds subfunctions in order.
-	 *
-	 * 2. The MMC interface has a lower subfunction number
-	 *    than the SD interface.
-	 */
-	if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
-		mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
-	else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
-		mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
-
-	if (mmcdev) {
-		struct pci_dev *sd_dev;
-
-		sd_dev = NULL;
-		while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
-						mmcdev, sd_dev)) != NULL) {
-			if ((PCI_SLOT(chip->pdev->devfn) ==
-				PCI_SLOT(sd_dev->devfn)) &&
-				(chip->pdev->bus == sd_dev->bus))
-				break;
-		}
-
-		if (sd_dev) {
-			pci_dev_put(sd_dev);
-			dev_info(&chip->pdev->dev, "Refusing to bind to "
-				"secondary interface.\n");
-			return -ENODEV;
-		}
-	}
-
-	/*
-	 * JMicron chips need a bit of a nudge to enable the power
-	 * output pins.
-	 */
-	ret = jmicron_pmos(chip, 1);
-	if (ret) {
-		dev_err(&chip->pdev->dev, "Failure enabling card power\n");
-		return ret;
-	}
-
-	/* quirk for unsable RO-detection on JM388 chips */
-	if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
-	    chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
-		chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;
-
-	return 0;
-}
-
-static void jmicron_enable_mmc(struct sdhci_host *host, int on)
-{
-	u8 scratch;
-
-	scratch = readb(host->ioaddr + 0xC0);
-
-	if (on)
-		scratch |= 0x01;
-	else
-		scratch &= ~0x01;
-
-	writeb(scratch, host->ioaddr + 0xC0);
-}
-
-static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
-{
-	if (slot->chip->pdev->revision == 0) {
-		u16 version;
-
-		version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
-		version = (version & SDHCI_VENDOR_VER_MASK) >>
-			SDHCI_VENDOR_VER_SHIFT;
-
-		/*
-		 * Older versions of the chip have lots of nasty glitches
-		 * in the ADMA engine. It's best just to avoid it
-		 * completely.
-		 */
-		if (version < 0xAC)
-			slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
-	}
-
-	/* JM388 MMC doesn't support 1.8V while SD supports it */
-	if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
-		slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
-			MMC_VDD_29_30 | MMC_VDD_30_31 |
-			MMC_VDD_165_195; /* allow 1.8V */
-		slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
-			MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
-	}
-
-	/*
-	 * The secondary interface requires a bit set to get the
-	 * interrupts.
-	 */
-	if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
-	    slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
-		jmicron_enable_mmc(slot->host, 1);
-
-	slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
-
-	return 0;
-}
-
-static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
-{
-	if (dead)
-		return;
-
-	if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
-	    slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
-		jmicron_enable_mmc(slot->host, 0);
-}
-
-#ifdef CONFIG_PM_SLEEP
-static int jmicron_suspend(struct sdhci_pci_chip *chip)
-{
-	int i, ret;
-
-	ret = sdhci_pci_suspend_host(chip);
-	if (ret)
-		return ret;
-
-	if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
-	    chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
-		for (i = 0; i < chip->num_slots; i++)
-			jmicron_enable_mmc(chip->slots[i]->host, 0);
-	}
-
-	return 0;
-}
-
-static int jmicron_resume(struct sdhci_pci_chip *chip)
-{
-	int ret, i;
-
-	if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
-	    chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
-		for (i = 0; i < chip->num_slots; i++)
-			jmicron_enable_mmc(chip->slots[i]->host, 1);
-	}
-
-	ret = jmicron_pmos(chip, 1);
-	if (ret) {
-		dev_err(&chip->pdev->dev, "Failure enabling card power\n");
-		return ret;
-	}
-
-	return sdhci_pci_resume_host(chip);
-}
-#endif
-
-static const struct sdhci_pci_fixes sdhci_jmicron = {
-	.probe		= jmicron_probe,
-
-	.probe_slot	= jmicron_probe_slot,
-	.remove_slot	= jmicron_remove_slot,
-
-#ifdef CONFIG_PM_SLEEP
-	.suspend	= jmicron_suspend,
-	.resume		= jmicron_resume,
-#endif
-};
-
-/* SysKonnect CardBus2SDIO extra registers */
-#define SYSKT_CTRL		0x200
-#define SYSKT_RDFIFO_STAT	0x204
-#define SYSKT_WRFIFO_STAT	0x208
-#define SYSKT_POWER_DATA	0x20c
-#define   SYSKT_POWER_330	0xef
-#define   SYSKT_POWER_300	0xf8
-#define   SYSKT_POWER_184	0xcc
-#define SYSKT_POWER_CMD		0x20d
-#define   SYSKT_POWER_START	(1 << 7)
-#define SYSKT_POWER_STATUS	0x20e
-#define   SYSKT_POWER_STATUS_OK	(1 << 0)
-#define SYSKT_BOARD_REV		0x210
-#define SYSKT_CHIP_REV		0x211
-#define SYSKT_CONF_DATA		0x212
-#define   SYSKT_CONF_DATA_1V8	(1 << 2)
-#define   SYSKT_CONF_DATA_2V5	(1 << 1)
-#define   SYSKT_CONF_DATA_3V3	(1 << 0)
-
-static int syskt_probe(struct sdhci_pci_chip *chip)
-{
-	if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
-		chip->pdev->class &= ~0x0000FF;
-		chip->pdev->class |= PCI_SDHCI_IFDMA;
-	}
-	return 0;
-}
-
-static int syskt_probe_slot(struct sdhci_pci_slot *slot)
-{
-	int tm, ps;
-
-	u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
-	u8  chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
-	dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
-					 "board rev %d.%d, chip rev %d.%d\n",
-					 board_rev >> 4, board_rev & 0xf,
-					 chip_rev >> 4,  chip_rev & 0xf);
-	if (chip_rev >= 0x20)
-		slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
-
-	writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
-	writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
-	udelay(50);
-	tm = 10;  /* Wait max 1 ms */
-	do {
-		ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
-		if (ps & SYSKT_POWER_STATUS_OK)
-			break;
-		udelay(100);
-	} while (--tm);
-	if (!tm) {
-		dev_err(&slot->chip->pdev->dev,
-			"power regulator never stabilized");
-		writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
-		return -ENODEV;
-	}
-
-	return 0;
-}
-
-static const struct sdhci_pci_fixes sdhci_syskt = {
-	.quirks		= SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
-	.probe		= syskt_probe,
-	.probe_slot	= syskt_probe_slot,
-};
-
-static int via_probe(struct sdhci_pci_chip *chip)
-{
-	if (chip->pdev->revision == 0x10)
-		chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
-
-	return 0;
-}
-
-static const struct sdhci_pci_fixes sdhci_via = {
-	.probe		= via_probe,
-};
-
-static int rtsx_probe_slot(struct sdhci_pci_slot *slot)
-{
-	slot->host->mmc->caps2 |= MMC_CAP2_HS200;
-	return 0;
-}
-
-static const struct sdhci_pci_fixes sdhci_rtsx = {
-	.quirks2	= SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
-			SDHCI_QUIRK2_BROKEN_64_BIT_DMA |
-			SDHCI_QUIRK2_BROKEN_DDR50,
-	.probe_slot	= rtsx_probe_slot,
-};
-
-/*AMD chipset generation*/
-enum amd_chipset_gen {
-	AMD_CHIPSET_BEFORE_ML,
-	AMD_CHIPSET_CZ,
-	AMD_CHIPSET_NL,
-	AMD_CHIPSET_UNKNOWN,
-};
-
-/* AMD registers */
-#define AMD_SD_AUTO_PATTERN		0xB8
-#define AMD_MSLEEP_DURATION		4
-#define AMD_SD_MISC_CONTROL		0xD0
-#define AMD_MAX_TUNE_VALUE		0x0B
-#define AMD_AUTO_TUNE_SEL		0x10800
-#define AMD_FIFO_PTR			0x30
-#define AMD_BIT_MASK			0x1F
-
-static void amd_tuning_reset(struct sdhci_host *host)
-{
-	unsigned int val;
-
-	val = sdhci_readw(host, SDHCI_HOST_CONTROL2);
-	val |= SDHCI_CTRL_PRESET_VAL_ENABLE | SDHCI_CTRL_EXEC_TUNING;
-	sdhci_writew(host, val, SDHCI_HOST_CONTROL2);
-
-	val = sdhci_readw(host, SDHCI_HOST_CONTROL2);
-	val &= ~SDHCI_CTRL_EXEC_TUNING;
-	sdhci_writew(host, val, SDHCI_HOST_CONTROL2);
-}
-
-static void amd_config_tuning_phase(struct pci_dev *pdev, u8 phase)
-{
-	unsigned int val;
-
-	pci_read_config_dword(pdev, AMD_SD_AUTO_PATTERN, &val);
-	val &= ~AMD_BIT_MASK;
-	val |= (AMD_AUTO_TUNE_SEL | (phase << 1));
-	pci_write_config_dword(pdev, AMD_SD_AUTO_PATTERN, val);
-}
-
-static void amd_enable_manual_tuning(struct pci_dev *pdev)
-{
-	unsigned int val;
-
-	pci_read_config_dword(pdev, AMD_SD_MISC_CONTROL, &val);
-	val |= AMD_FIFO_PTR;
-	pci_write_config_dword(pdev, AMD_SD_MISC_CONTROL, val);
-}
-
-static int amd_execute_tuning_hs200(struct sdhci_host *host, u32 opcode)
-{
-	struct sdhci_pci_slot *slot = sdhci_priv(host);
-	struct pci_dev *pdev = slot->chip->pdev;
-	u8 valid_win = 0;
-	u8 valid_win_max = 0;
-	u8 valid_win_end = 0;
-	u8 ctrl, tune_around;
-
-	amd_tuning_reset(host);
-
-	for (tune_around = 0; tune_around < 12; tune_around++) {
-		amd_config_tuning_phase(pdev, tune_around);
-
-		if (mmc_send_tuning(host->mmc, opcode, NULL)) {
-			valid_win = 0;
-			msleep(AMD_MSLEEP_DURATION);
-			ctrl = SDHCI_RESET_CMD | SDHCI_RESET_DATA;
-			sdhci_writeb(host, ctrl, SDHCI_SOFTWARE_RESET);
-		} else if (++valid_win > valid_win_max) {
-			valid_win_max = valid_win;
-			valid_win_end = tune_around;
-		}
-	}
-
-	if (!valid_win_max) {
-		dev_err(&pdev->dev, "no tuning point found\n");
-		return -EIO;
-	}
-
-	amd_config_tuning_phase(pdev, valid_win_end - valid_win_max / 2);
-
-	amd_enable_manual_tuning(pdev);
-
-	host->mmc->retune_period = 0;
-
-	return 0;
-}
-
-static int amd_execute_tuning(struct mmc_host *mmc, u32 opcode)
-{
-	struct sdhci_host *host = mmc_priv(mmc);
-
-	/* AMD requires custom HS200 tuning */
-	if (host->timing == MMC_TIMING_MMC_HS200)
-		return amd_execute_tuning_hs200(host, opcode);
-
-	/* Otherwise perform standard SDHCI tuning */
-	return sdhci_execute_tuning(mmc, opcode);
-}
-
-static int amd_probe_slot(struct sdhci_pci_slot *slot)
-{
-	struct mmc_host_ops *ops = &slot->host->mmc_host_ops;
-
-	ops->execute_tuning = amd_execute_tuning;
-
-	return 0;
-}
-
-static int amd_probe(struct sdhci_pci_chip *chip)
-{
-	struct pci_dev	*smbus_dev;
-	enum amd_chipset_gen gen;
-
-	smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
-			PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL);
-	if (smbus_dev) {
-		gen = AMD_CHIPSET_BEFORE_ML;
-	} else {
-		smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
-				PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, NULL);
-		if (smbus_dev) {
-			if (smbus_dev->revision < 0x51)
-				gen = AMD_CHIPSET_CZ;
-			else
-				gen = AMD_CHIPSET_NL;
-		} else {
-			gen = AMD_CHIPSET_UNKNOWN;
-		}
-	}
-
-    if (smbus_dev) {
-        pci_dev_put(smbus_dev);
-    }
-
-	if (gen == AMD_CHIPSET_BEFORE_ML || gen == AMD_CHIPSET_CZ)
-		chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD;
-
-	return 0;
-}
-
-static u32 sdhci_read_present_state(struct sdhci_host *host)
-{
-	return sdhci_readl(host, SDHCI_PRESENT_STATE);
-}
-
-static void amd_sdhci_reset(struct sdhci_host *host, u8 mask)
-{
-	struct sdhci_pci_slot *slot = sdhci_priv(host);
-	struct pci_dev *pdev = slot->chip->pdev;
-	u32 present_state;
-
-	/*
-	 * SDHC 0x7906 requires a hard reset to clear all internal state.
-	 * Otherwise it can get into a bad state where the DATA lines are always
-	 * read as zeros.
-	 */
-	if (pdev->device == 0x7906 && (mask & SDHCI_RESET_ALL)) {
-		pci_clear_master(pdev);
-
-		pci_save_state(pdev);
-
-		pci_set_power_state(pdev, PCI_D3cold);
-		pr_debug("%s: power_state=%u\n", mmc_hostname(host->mmc),
-			pdev->current_state);
-		pci_set_power_state(pdev, PCI_D0);
-
-		pci_restore_state(pdev);
-
-		/*
-		 * SDHCI_RESET_ALL says the card detect logic should not be
-		 * reset, but since we need to reset the entire controller
-		 * we should wait until the card detect logic has stabilized.
-		 *
-		 * This normally takes about 40ms.
-		 */
-		readx_poll_timeout(
-			sdhci_read_present_state,
-			host,
-			present_state,
-			present_state & SDHCI_CD_STABLE,
-			10000,
-			100000
-		);
-	}
-
-	return sdhci_reset(host, mask);
-}
-
-static const struct sdhci_ops amd_sdhci_pci_ops = {
-	.set_clock			= sdhci_set_clock,
-	.enable_dma			= sdhci_pci_enable_dma,
-	.set_bus_width			= sdhci_set_bus_width,
-	.reset				= amd_sdhci_reset,
-	.set_uhs_signaling		= sdhci_set_uhs_signaling,
-};
-
-static const struct sdhci_pci_fixes sdhci_amd = {
-	.probe		= amd_probe,
-	.ops		= &amd_sdhci_pci_ops,
-	.probe_slot	= amd_probe_slot,
-};
-
-static const struct pci_device_id pci_ids[] = {
-	SDHCI_PCI_DEVICE(RICOH, R5C822,  ricoh),
-	SDHCI_PCI_DEVICE(RICOH, R5C843,  ricoh_mmc),
-	SDHCI_PCI_DEVICE(RICOH, R5CE822, ricoh_mmc),
-	SDHCI_PCI_DEVICE(RICOH, R5CE823, ricoh_mmc),
-	SDHCI_PCI_DEVICE(ENE, CB712_SD,   ene_712),
-	SDHCI_PCI_DEVICE(ENE, CB712_SD_2, ene_712),
-	SDHCI_PCI_DEVICE(ENE, CB714_SD,   ene_714),
-	SDHCI_PCI_DEVICE(ENE, CB714_SD_2, ene_714),
-	SDHCI_PCI_DEVICE(MARVELL, 88ALP01_SD, cafe),
-	SDHCI_PCI_DEVICE(JMICRON, JMB38X_SD,  jmicron),
-	SDHCI_PCI_DEVICE(JMICRON, JMB38X_MMC, jmicron),
-	SDHCI_PCI_DEVICE(JMICRON, JMB388_SD,  jmicron),
-	SDHCI_PCI_DEVICE(JMICRON, JMB388_ESD, jmicron),
-	SDHCI_PCI_DEVICE(SYSKONNECT, 8000, syskt),
-	SDHCI_PCI_DEVICE(VIA, 95D0, via),
-	SDHCI_PCI_DEVICE(REALTEK, 5250, rtsx),
-	SDHCI_PCI_DEVICE(INTEL, QRK_SD,    intel_qrk),
-	SDHCI_PCI_DEVICE(INTEL, MRST_SD0,  intel_mrst_hc0),
-	SDHCI_PCI_DEVICE(INTEL, MRST_SD1,  intel_mrst_hc1_hc2),
-	SDHCI_PCI_DEVICE(INTEL, MRST_SD2,  intel_mrst_hc1_hc2),
-	SDHCI_PCI_DEVICE(INTEL, MFD_SD,    intel_mfd_sd),
-	SDHCI_PCI_DEVICE(INTEL, MFD_SDIO1, intel_mfd_sdio),
-	SDHCI_PCI_DEVICE(INTEL, MFD_SDIO2, intel_mfd_sdio),
-	SDHCI_PCI_DEVICE(INTEL, MFD_EMMC0, intel_mfd_emmc),
-	SDHCI_PCI_DEVICE(INTEL, MFD_EMMC1, intel_mfd_emmc),
-	SDHCI_PCI_DEVICE(INTEL, PCH_SDIO0, intel_pch_sdio),
-	SDHCI_PCI_DEVICE(INTEL, PCH_SDIO1, intel_pch_sdio),
-	SDHCI_PCI_DEVICE(INTEL, BYT_EMMC,  intel_byt_emmc),
-	SDHCI_PCI_SUBDEVICE(INTEL, BYT_SDIO, NI, 7884, ni_byt_sdio),
-	SDHCI_PCI_DEVICE(INTEL, BYT_SDIO,  intel_byt_sdio),
-	SDHCI_PCI_DEVICE(INTEL, BYT_SD,    intel_byt_sd),
-	SDHCI_PCI_DEVICE(INTEL, BYT_EMMC2, intel_byt_emmc),
-	SDHCI_PCI_DEVICE(INTEL, BSW_EMMC,  intel_byt_emmc),
-	SDHCI_PCI_DEVICE(INTEL, BSW_SDIO,  intel_byt_sdio),
-	SDHCI_PCI_DEVICE(INTEL, BSW_SD,    intel_byt_sd),
-	SDHCI_PCI_DEVICE(INTEL, CLV_SDIO0, intel_mfd_sd),
-	SDHCI_PCI_DEVICE(INTEL, CLV_SDIO1, intel_mfd_sdio),
-	SDHCI_PCI_DEVICE(INTEL, CLV_SDIO2, intel_mfd_sdio),
-	SDHCI_PCI_DEVICE(INTEL, CLV_EMMC0, intel_mfd_emmc),
-	SDHCI_PCI_DEVICE(INTEL, CLV_EMMC1, intel_mfd_emmc),
-	SDHCI_PCI_DEVICE(INTEL, MRFLD_MMC, intel_mrfld_mmc),
-	SDHCI_PCI_DEVICE(INTEL, SPT_EMMC,  intel_byt_emmc),
-	SDHCI_PCI_DEVICE(INTEL, SPT_SDIO,  intel_byt_sdio),
-	SDHCI_PCI_DEVICE(INTEL, SPT_SD,    intel_byt_sd),
-	SDHCI_PCI_DEVICE(INTEL, DNV_EMMC,  intel_dnv_emmc),
-	SDHCI_PCI_DEVICE(INTEL, CDF_EMMC,  intel_glk_emmc),
-	SDHCI_PCI_DEVICE(INTEL, BXT_EMMC,  intel_byt_emmc),
-	SDHCI_PCI_DEVICE(INTEL, BXT_SDIO,  intel_byt_sdio),
-	SDHCI_PCI_DEVICE(INTEL, BXT_SD,    intel_byt_sd),
-	SDHCI_PCI_DEVICE(INTEL, BXTM_EMMC, intel_byt_emmc),
-	SDHCI_PCI_DEVICE(INTEL, BXTM_SDIO, intel_byt_sdio),
-	SDHCI_PCI_DEVICE(INTEL, BXTM_SD,   intel_byt_sd),
-	SDHCI_PCI_DEVICE(INTEL, APL_EMMC,  intel_byt_emmc),
-	SDHCI_PCI_DEVICE(INTEL, APL_SDIO,  intel_byt_sdio),
-	SDHCI_PCI_DEVICE(INTEL, APL_SD,    intel_byt_sd),
-	SDHCI_PCI_DEVICE(INTEL, GLK_EMMC,  intel_glk_emmc),
-	SDHCI_PCI_DEVICE(INTEL, GLK_SDIO,  intel_byt_sdio),
-	SDHCI_PCI_DEVICE(INTEL, GLK_SD,    intel_byt_sd),
-	SDHCI_PCI_DEVICE(INTEL, CNP_EMMC,  intel_glk_emmc),
-	SDHCI_PCI_DEVICE(INTEL, CNP_SD,    intel_byt_sd),
-	SDHCI_PCI_DEVICE(INTEL, CNPH_SD,   intel_byt_sd),
-	SDHCI_PCI_DEVICE(INTEL, ICP_EMMC,  intel_glk_emmc),
-	SDHCI_PCI_DEVICE(INTEL, ICP_SD,    intel_byt_sd),
-	SDHCI_PCI_DEVICE(INTEL, EHL_EMMC,  intel_glk_emmc),
-	SDHCI_PCI_DEVICE(INTEL, EHL_SD,    intel_byt_sd),
-	SDHCI_PCI_DEVICE(INTEL, CML_EMMC,  intel_glk_emmc),
-	SDHCI_PCI_DEVICE(INTEL, CML_SD,    intel_byt_sd),
-	SDHCI_PCI_DEVICE(INTEL, CMLH_SD,   intel_byt_sd),
-	SDHCI_PCI_DEVICE(INTEL, JSL_EMMC,  intel_glk_emmc),
-	SDHCI_PCI_DEVICE(INTEL, JSL_SD,    intel_byt_sd),
-	SDHCI_PCI_DEVICE(INTEL, LKF_EMMC,  intel_glk_emmc),
-	SDHCI_PCI_DEVICE(INTEL, LKF_SD,    intel_byt_sd),
-	SDHCI_PCI_DEVICE(INTEL, ADL_EMMC,  intel_glk_emmc),
-	SDHCI_PCI_DEVICE(O2, 8120,     o2),
-	SDHCI_PCI_DEVICE(O2, 8220,     o2),
-	SDHCI_PCI_DEVICE(O2, 8221,     o2),
-	SDHCI_PCI_DEVICE(O2, 8320,     o2),
-	SDHCI_PCI_DEVICE(O2, 8321,     o2),
-	SDHCI_PCI_DEVICE(O2, FUJIN2,   o2),
-	SDHCI_PCI_DEVICE(O2, SDS0,     o2),
-	SDHCI_PCI_DEVICE(O2, SDS1,     o2),
-	SDHCI_PCI_DEVICE(O2, SEABIRD0, o2),
-	SDHCI_PCI_DEVICE(O2, SEABIRD1, o2),
-	SDHCI_PCI_DEVICE(ARASAN, PHY_EMMC, arasan),
-	SDHCI_PCI_DEVICE(SYNOPSYS, DWC_MSHC, snps),
-	SDHCI_PCI_DEVICE(GLI, 9750, gl9750),
-	SDHCI_PCI_DEVICE(GLI, 9755, gl9755),
-	SDHCI_PCI_DEVICE(GLI, 9763E, gl9763e),
-	SDHCI_PCI_DEVICE_CLASS(AMD, SYSTEM_SDHCI, PCI_CLASS_MASK, amd),
-	/* Generic SD host controller */
-	{PCI_DEVICE_CLASS(SYSTEM_SDHCI, PCI_CLASS_MASK)},
-	{ /* end: all zeroes */ },
-};
-
-MODULE_DEVICE_TABLE(pci, pci_ids);
-
-/*****************************************************************************\
- *                                                                           *
- * SDHCI core callbacks                                                      *
- *                                                                           *
-\*****************************************************************************/
-
-int sdhci_pci_enable_dma(struct sdhci_host *host)
-{
-	struct sdhci_pci_slot *slot;
-	struct pci_dev *pdev;
-
-	slot = sdhci_priv(host);
-	pdev = slot->chip->pdev;
-
-	if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
-		((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
-		(host->flags & SDHCI_USE_SDMA)) {
-		dev_warn(&pdev->dev, "Will use DMA mode even though HW "
-			"doesn't fully claim to support it.\n");
-	}
-
-	pci_set_master(pdev);
-
-	return 0;
-}
-
-static void sdhci_pci_hw_reset(struct sdhci_host *host)
-{
-	struct sdhci_pci_slot *slot = sdhci_priv(host);
-
-	if (slot->hw_reset)
-		slot->hw_reset(host);
-}
-
-static const struct sdhci_ops sdhci_pci_ops = {
-	.set_clock	= sdhci_set_clock,
-	.enable_dma	= sdhci_pci_enable_dma,
-	.set_bus_width	= sdhci_set_bus_width,
-	.reset		= sdhci_reset,
-	.set_uhs_signaling = sdhci_set_uhs_signaling,
-	.hw_reset		= sdhci_pci_hw_reset,
-};
-
-/*****************************************************************************\
- *                                                                           *
- * Suspend/resume                                                            *
- *                                                                           *
-\*****************************************************************************/
-
-#ifdef CONFIG_PM_SLEEP
-static int sdhci_pci_suspend(struct device *dev)
-{
-	struct sdhci_pci_chip *chip = dev_get_drvdata(dev);
-
-	if (!chip)
-		return 0;
-
-	if (chip->fixes && chip->fixes->suspend)
-		return chip->fixes->suspend(chip);
-
-	return sdhci_pci_suspend_host(chip);
-}
-
-static int sdhci_pci_resume(struct device *dev)
-{
-	struct sdhci_pci_chip *chip = dev_get_drvdata(dev);
-
-	if (!chip)
-		return 0;
-
-	if (chip->fixes && chip->fixes->resume)
-		return chip->fixes->resume(chip);
-
-	return sdhci_pci_resume_host(chip);
-}
-#endif
-
-#ifdef CONFIG_PM
-static int sdhci_pci_runtime_suspend(struct device *dev)
-{
-	struct sdhci_pci_chip *chip = dev_get_drvdata(dev);
-
-	if (!chip)
-		return 0;
-
-	if (chip->fixes && chip->fixes->runtime_suspend)
-		return chip->fixes->runtime_suspend(chip);
-
-	return sdhci_pci_runtime_suspend_host(chip);
-}
-
-static int sdhci_pci_runtime_resume(struct device *dev)
-{
-	struct sdhci_pci_chip *chip = dev_get_drvdata(dev);
-
-	if (!chip)
-		return 0;
-
-	if (chip->fixes && chip->fixes->runtime_resume)
-		return chip->fixes->runtime_resume(chip);
-
-	return sdhci_pci_runtime_resume_host(chip);
-}
-#endif
-
-static const struct dev_pm_ops sdhci_pci_pm_ops = {
-	SET_SYSTEM_SLEEP_PM_OPS(sdhci_pci_suspend, sdhci_pci_resume)
-	SET_RUNTIME_PM_OPS(sdhci_pci_runtime_suspend,
-			sdhci_pci_runtime_resume, NULL)
-};
-
-/*****************************************************************************\
- *                                                                           *
- * Device probing/removal                                                    *
- *                                                                           *
-\*****************************************************************************/
-
-static struct sdhci_pci_slot *sdhci_pci_probe_slot(
-	struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar,
-	int slotno)
-{
-	struct sdhci_pci_slot *slot;
-	struct sdhci_host *host;
-	int ret, bar = first_bar + slotno;
-	size_t priv_size = chip->fixes ? chip->fixes->priv_size : 0;
-
-	if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
-		dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
-		return ERR_PTR(-ENODEV);
-	}
-
-	if (pci_resource_len(pdev, bar) < 0x100) {
-		dev_err(&pdev->dev, "Invalid iomem size. You may "
-			"experience problems.\n");
-	}
-
-	if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
-		dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
-		return ERR_PTR(-ENODEV);
-	}
-
-	if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
-		dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
-		return ERR_PTR(-ENODEV);
-	}
-
-	host = sdhci_alloc_host(&pdev->dev, sizeof(*slot) + priv_size);
-	if (IS_ERR(host)) {
-		dev_err(&pdev->dev, "cannot allocate host\n");
-		return ERR_CAST(host);
-	}
-
-	slot = sdhci_priv(host);
-
-	slot->chip = chip;
-	slot->host = host;
-	slot->cd_idx = -1;
-
-	host->hw_name = "PCI";
-	host->ops = chip->fixes && chip->fixes->ops ?
-		    chip->fixes->ops :
-		    &sdhci_pci_ops;
-	host->quirks = chip->quirks;
-	host->quirks2 = chip->quirks2;
-
-	host->irq = pdev->irq;
-
-	ret = pcim_iomap_regions(pdev, BIT(bar), mmc_hostname(host->mmc));
-	if (ret) {
-		dev_err(&pdev->dev, "cannot request region\n");
-		goto cleanup;
-	}
-
-	host->ioaddr = pcim_iomap_table(pdev)[bar];
-
-	if (chip->fixes && chip->fixes->probe_slot) {
-		ret = chip->fixes->probe_slot(slot);
-		if (ret)
-			goto cleanup;
-	}
-
-	host->mmc->pm_caps = MMC_PM_KEEP_POWER;
-	host->mmc->slotno = slotno;
-	host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
-
-	if (device_can_wakeup(&pdev->dev))
-		host->mmc->pm_caps |= MMC_PM_WAKE_SDIO_IRQ;
-
-	if (host->mmc->caps & MMC_CAP_CD_WAKE)
-		device_init_wakeup(&pdev->dev, true);
-
-	if (slot->cd_idx >= 0) {
-		ret = mmc_gpiod_request_cd(host->mmc, "cd", slot->cd_idx,
-					   slot->cd_override_level, 0);
-		if (ret && ret != -EPROBE_DEFER)
-			ret = mmc_gpiod_request_cd(host->mmc, NULL,
-						   slot->cd_idx,
-						   slot->cd_override_level,
-						   0);
-		if (ret == -EPROBE_DEFER)
-			goto remove;
-
-		if (ret) {
-			dev_warn(&pdev->dev, "failed to setup card detect gpio\n");
-			slot->cd_idx = -1;
-		}
-	}
-
-	if (chip->fixes && chip->fixes->add_host)
-		ret = chip->fixes->add_host(slot);
-	else
-		ret = sdhci_add_host(host);
-	if (ret)
-		goto remove;
-
-	/*
-	 * Check if the chip needs a separate GPIO for card detect to wake up
-	 * from runtime suspend.  If it is not there, don't allow runtime PM.
-	 */
-	if (chip->fixes && chip->fixes->own_cd_for_runtime_pm && slot->cd_idx < 0)
-		chip->allow_runtime_pm = false;
-
-	return slot;
-
-remove:
-	if (chip->fixes && chip->fixes->remove_slot)
-		chip->fixes->remove_slot(slot, 0);
-
-cleanup:
-	sdhci_free_host(host);
-
-	return ERR_PTR(ret);
-}
-
-static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
-{
-	int dead;
-	u32 scratch;
-
-	dead = 0;
-	scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
-	if (scratch == (u32)-1)
-		dead = 1;
-
-	sdhci_remove_host(slot->host, dead);
-
-	if (slot->chip->fixes && slot->chip->fixes->remove_slot)
-		slot->chip->fixes->remove_slot(slot, dead);
-
-	sdhci_free_host(slot->host);
-}
-
-static void sdhci_pci_runtime_pm_allow(struct device *dev)
-{
-	pm_suspend_ignore_children(dev, 1);
-	pm_runtime_set_autosuspend_delay(dev, 50);
-	pm_runtime_use_autosuspend(dev);
-	pm_runtime_allow(dev);
-	/* Stay active until mmc core scans for a card */
-	pm_runtime_put_noidle(dev);
-}
-
-static void sdhci_pci_runtime_pm_forbid(struct device *dev)
-{
-	pm_runtime_forbid(dev);
-	pm_runtime_get_noresume(dev);
-}
-
-/* define by gohi, set in bios acpi dsdt table */
-#define EMMC_DSDT_MODE_HS400    0
-#define EMMC_DSDT_MODE_HS200    1
-#define EMMC_DSDT_MODE_DDR52    2
-#define EMMC_DSDT_MODE_SDR52    3
-
-static int sdhci_set_quirks2_by_dsdt(struct pci_dev *pdev)
-{
-    struct acpi_device *acpi_dev;
-    struct fwnode_handle *pfwnod = pdev->dev.fwnode;
-    u64 mode;
-	int ret;
-
-    /* Find acpi node through pci,
-    * the relationship between pci and acpi devices can be viewed through the /sys/bus file */
-    acpi_dev = container_of(pfwnod, struct acpi_device, fwnode);
-
-    /* DSDT need take node as: "Name (MODE, 0x0-)" */
-   	ret = acpi_evaluate_integer(acpi_dev->handle, "MODE", NULL, &mode);
-	if (ACPI_SUCCESS(ret)) {
-        dev_info(&pdev->dev, "SD controller get bus mode:0x%lld from dsts success.\n", mode);
-        switch(mode) {
-        case EMMC_DSDT_MODE_SDR52:
-            sdhci_intel_dnv_emmc.quirks2 |= SDHCI_QUIRK2_BROKEN_DDR50 | SDHCI_QUIRK2_BROKEN_HS200;
-            sdhci_intel_dnv_emmc.probe_slot = dnv_emmc_hs_probe_slot;
-            dev_info(&pdev->dev, "Configure SDHCI as SDR52 attribute through dsdt.\n");
-            break;
-        case EMMC_DSDT_MODE_DDR52:
-            sdhci_intel_dnv_emmc.quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;
-            dev_info(&pdev->dev, "Configure SDHCI as DDR52 attribute through dsdt.\n");
-            break;
-        case EMMC_DSDT_MODE_HS200:
-            dev_info(&pdev->dev, "Configure SDHCI as HS200 attribute through dsdt.\n");
-            break;
-        case EMMC_DSDT_MODE_HS400:
-            sdhci_intel_dnv_emmc.quirks2 |= SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400;
-            dev_info(&pdev->dev, "Configure SDHCI as HS400 attribute through dsdt.\n");
-            break;
-        default:
-            ret = EINVAL;
-            break;
-        }
-    } else {
-        ret = EINVAL;
-    }
-
-    return ret;
-}
-
-#ifndef COMMAND_LINE_SIZE
-#define COMMAND_LINE_SIZE 1024
-#endif
-
-int sdhci_cmdline_read(char *cmdline)
-{
-    struct file *filp;
-    int ret = 0;
-    loff_t pos;
-
-    /* Basically, the kernel parameters with arch are not exported.
-     * In order to not have too much influence and generalization,
-     * use the proc file to obtain parameter information. */
-    filp = filp_open("/proc/cmdline", O_RDONLY, 0);
-    if (IS_ERR(filp)) {
-        filp = NULL;
-        goto exit;
-    }
-    pos = 0;
-    ret = kernel_read(filp, cmdline, COMMAND_LINE_SIZE, &pos);
-    if (ret < 0) {
-        goto exit;
-    }
-    filp_close(filp, NULL);
-
-    return 0;
-
-exit:
-    if (filp != NULL) {
-        filp_close(filp, NULL);
-    }
-    return -1;
-}
-
-static int sdhci_set_quirks2_by_cmdline(struct pci_dev *pdev)
-{
-    char *option, cmdline[COMMAND_LINE_SIZE];
-    int ret = 0;
-
-    mem_clear(cmdline, COMMAND_LINE_SIZE);
-
-    ret = sdhci_cmdline_read(cmdline);
-    if (ret) {
-        return ret;
-    }
-
-    option = strstr(cmdline, "sdhcimode=");
-    if (option == NULL) {
-        return EINVAL;
-    }
-
-    /* Count, sdhcimode= is it 10 bytes? */
-    option += 10;
-
-    if (!strncmp(option, "sdr52", 5)) {
-        sdhci_intel_dnv_emmc.quirks2 |= SDHCI_QUIRK2_BROKEN_DDR50 | SDHCI_QUIRK2_BROKEN_HS200;
-        /* Remove 1.8V ability */
-        sdhci_intel_dnv_emmc.probe_slot = dnv_emmc_hs_probe_slot;
-        dev_info(&pdev->dev, "Configure SDHCI as SDR52 attribute through cmdline.\n");
-    } else if (!strncmp(option, "ddr52", 5)) {
-        sdhci_intel_dnv_emmc.quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;
-        dev_info(&pdev->dev, "Configure SDHCI as DDR52 attribute through cmdline.\n");
-    } else if (!strncmp(option, "hs200", 5)) {
-        dev_info(&pdev->dev, "Configure SDHCI as HS200 attribute through cmdline.\n");
-        ;
-    } else if (!strncmp(option, "hs400", 5)) {
-        sdhci_intel_dnv_emmc.quirks2 |= SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400;
-        dev_info(&pdev->dev, "Configure SDHCI as HS400 attribute through cmdline.\n");
-    } else {
-        dev_info(&pdev->dev, "CSDHCI: Unknown cmdline option.\n");
-        return EINVAL;
-	}
-
-    return 0;
-}
-
-static int sdhci_pci_probe(struct pci_dev *pdev,
-				     const struct pci_device_id *ent)
-{
-	struct sdhci_pci_chip *chip;
-	struct sdhci_pci_slot *slot;
-
-	u8 slots, first_bar;
-	int ret, i;
-
-	BUG_ON(pdev == NULL);
-	BUG_ON(ent == NULL);
-
-	dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
-		 (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
-
-    /* cmdline setting priority, the kernel parameters can be changed flexibly,
-     *  and Bios upgrades are not convenient or secure. */
-    ret = sdhci_set_quirks2_by_cmdline(pdev);
-    if (ret) {
-        ret = sdhci_set_quirks2_by_dsdt(pdev);
-        if (ret) {
-            sdhci_intel_dnv_emmc.quirks2 |= SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400;
-            dev_info(&pdev->dev, "Configure SDHCI as default[HS400].\n");
-        }
-    }
-
-	ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
-	if (ret)
-		return ret;
-
-	slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
-	dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
-
-	BUG_ON(slots > MAX_SLOTS);
-
-	ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
-	if (ret)
-		return ret;
-
-	first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
-
-	if (first_bar > 5) {
-		dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
-		return -ENODEV;
-	}
-
-	ret = pcim_enable_device(pdev);
-	if (ret)
-		return ret;
-
-	chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
-	if (!chip)
-		return -ENOMEM;
-
-	chip->pdev = pdev;
-	chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
-	if (chip->fixes) {
-		chip->quirks = chip->fixes->quirks;
-		chip->quirks2 = chip->fixes->quirks2;
-		chip->allow_runtime_pm = chip->fixes->allow_runtime_pm;
-	}
-	chip->num_slots = slots;
-	chip->pm_retune = true;
-	chip->rpm_retune = true;
-
-	pci_set_drvdata(pdev, chip);
-
-	if (chip->fixes && chip->fixes->probe) {
-		ret = chip->fixes->probe(chip);
-		if (ret)
-			return ret;
-	}
-
-	slots = chip->num_slots;	/* Quirk may have changed this */
-
-	for (i = 0; i < slots; i++) {
-		slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i);
-		if (IS_ERR(slot)) {
-			for (i--; i >= 0; i--)
-				sdhci_pci_remove_slot(chip->slots[i]);
-			return PTR_ERR(slot);
-		}
-
-		chip->slots[i] = slot;
-	}
-
-	if (chip->allow_runtime_pm)
-		sdhci_pci_runtime_pm_allow(&pdev->dev);
-
-	return 0;
-}
-
-static void sdhci_pci_remove(struct pci_dev *pdev)
-{
-	int i;
-	struct sdhci_pci_chip *chip = pci_get_drvdata(pdev);
-
-	if (chip->allow_runtime_pm)
-		sdhci_pci_runtime_pm_forbid(&pdev->dev);
-
-	for (i = 0; i < chip->num_slots; i++)
-		sdhci_pci_remove_slot(chip->slots[i]);
-}
-
-static struct pci_driver sdhci_driver = {
-	.name =		"sdhci-pci",
-	.id_table =	pci_ids,
-	.probe =	sdhci_pci_probe,
-	.remove =	sdhci_pci_remove,
-	.driver =	{
-		.pm =   &sdhci_pci_pm_ops
-	},
-};
-
-module_pci_driver(sdhci_driver);
-
-MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
-MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-dwc-mshc.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-dwc-mshc.c
deleted file mode 100644
index f78d65448d17..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-dwc-mshc.c
+++ /dev/null
@@ -1,84 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * SDHCI driver for Synopsys DWC_MSHC controller
- *
- * Copyright (C) 2018 Synopsys, Inc. (www.synopsys.com)
- *
- * Authors:
- *	Prabu Thangamuthu <prabu.t@synopsys.com>
- *	Manjunath M B <manjumb@synopsys.com>
- */
-
-#include "sdhci.h"
-#include "sdhci-pci.h"
-
-#define SDHCI_VENDOR_PTR_R	0xE8
-
-/* Synopsys vendor specific registers */
-#define SDHC_GPIO_OUT		0x34
-#define SDHC_AT_CTRL_R		0x40
-#define SDHC_SW_TUNE_EN		0x00000010
-
-/* MMCM DRP */
-#define SDHC_MMCM_DIV_REG	0x1020
-#define DIV_REG_100_MHZ		0x1145
-#define DIV_REG_200_MHZ		0x1083
-#define SDHC_MMCM_CLKFBOUT	0x1024
-#define CLKFBOUT_100_MHZ	0x0000
-#define CLKFBOUT_200_MHZ	0x0080
-#define SDHC_CCLK_MMCM_RST	0x00000001
-
-static void sdhci_snps_set_clock(struct sdhci_host *host, unsigned int clock)
-{
-	u16 clk;
-	u32 reg, vendor_ptr;
-
-	vendor_ptr = sdhci_readw(host, SDHCI_VENDOR_PTR_R);
-
-	/* Disable software managed rx tuning */
-	reg = sdhci_readl(host, (SDHC_AT_CTRL_R + vendor_ptr));
-	reg &= ~SDHC_SW_TUNE_EN;
-	sdhci_writel(host, reg, (SDHC_AT_CTRL_R + vendor_ptr));
-
-	if (clock <= 52000000) {
-		sdhci_set_clock(host, clock);
-	} else {
-		/* Assert reset to MMCM */
-		reg = sdhci_readl(host, (SDHC_GPIO_OUT + vendor_ptr));
-		reg |= SDHC_CCLK_MMCM_RST;
-		sdhci_writel(host, reg, (SDHC_GPIO_OUT + vendor_ptr));
-
-		/* Configure MMCM */
-		if (clock == 100000000) {
-			sdhci_writel(host, DIV_REG_100_MHZ, SDHC_MMCM_DIV_REG);
-			sdhci_writel(host, CLKFBOUT_100_MHZ,
-					SDHC_MMCM_CLKFBOUT);
-		} else {
-			sdhci_writel(host, DIV_REG_200_MHZ, SDHC_MMCM_DIV_REG);
-			sdhci_writel(host, CLKFBOUT_200_MHZ,
-					SDHC_MMCM_CLKFBOUT);
-		}
-
-		/* De-assert reset to MMCM */
-		reg = sdhci_readl(host, (SDHC_GPIO_OUT + vendor_ptr));
-		reg &= ~SDHC_CCLK_MMCM_RST;
-		sdhci_writel(host, reg, (SDHC_GPIO_OUT + vendor_ptr));
-
-		/* Enable clock */
-		clk = SDHCI_PROG_CLOCK_MODE | SDHCI_CLOCK_INT_EN |
-			SDHCI_CLOCK_CARD_EN;
-		sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
-	}
-}
-
-static const struct sdhci_ops sdhci_snps_ops = {
-	.set_clock	= sdhci_snps_set_clock,
-	.enable_dma	= sdhci_pci_enable_dma,
-	.set_bus_width	= sdhci_set_bus_width,
-	.reset		= sdhci_reset,
-	.set_uhs_signaling = sdhci_set_uhs_signaling,
-};
-
-const struct sdhci_pci_fixes sdhci_snps = {
-	.ops		= &sdhci_snps_ops,
-};
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-gli.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-gli.c
deleted file mode 100644
index 4d509f656188..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-gli.c
+++ /dev/null
@@ -1,1159 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2019 Genesys Logic, Inc.
- *
- * Authors: Ben Chuang <ben.chuang@genesyslogic.com.tw>
- *
- * Version: v0.9.0 (2019-08-08)
- */
-
-#include <linux/bitfield.h>
-#include <linux/bits.h>
-#include <linux/pci.h>
-#include <linux/mmc/mmc.h>
-#include <linux/delay.h>
-#include <linux/of.h>
-#include <linux/iopoll.h>
-#include "sdhci.h"
-#include "sdhci-pci.h"
-#include "cqhci.h"
-
-/*  Genesys Logic extra registers */
-#define SDHCI_GLI_9750_WT         0x800
-#define   SDHCI_GLI_9750_WT_EN      BIT(0)
-#define   GLI_9750_WT_EN_ON	    0x1
-#define   GLI_9750_WT_EN_OFF	    0x0
-
-#define SDHCI_GLI_9750_CFG2          0x848
-#define   SDHCI_GLI_9750_CFG2_L1DLY    GENMASK(28, 24)
-#define   GLI_9750_CFG2_L1DLY_VALUE    0x1F
-
-#define SDHCI_GLI_9750_DRIVING      0x860
-#define   SDHCI_GLI_9750_DRIVING_1    GENMASK(11, 0)
-#define   SDHCI_GLI_9750_DRIVING_2    GENMASK(27, 26)
-#define   GLI_9750_DRIVING_1_VALUE    0xFFF
-#define   GLI_9750_DRIVING_2_VALUE    0x3
-#define   SDHCI_GLI_9750_SEL_1        BIT(29)
-#define   SDHCI_GLI_9750_SEL_2        BIT(31)
-#define   SDHCI_GLI_9750_ALL_RST      (BIT(24)|BIT(25)|BIT(28)|BIT(30))
-
-#define SDHCI_GLI_9750_PLL	      0x864
-#define   SDHCI_GLI_9750_PLL_LDIV       GENMASK(9, 0)
-#define   SDHCI_GLI_9750_PLL_PDIV       GENMASK(14, 12)
-#define   SDHCI_GLI_9750_PLL_DIR        BIT(15)
-#define   SDHCI_GLI_9750_PLL_TX2_INV    BIT(23)
-#define   SDHCI_GLI_9750_PLL_TX2_DLY    GENMASK(22, 20)
-#define   GLI_9750_PLL_TX2_INV_VALUE    0x1
-#define   GLI_9750_PLL_TX2_DLY_VALUE    0x0
-#define   SDHCI_GLI_9750_PLLSSC_STEP    GENMASK(28, 24)
-#define   SDHCI_GLI_9750_PLLSSC_EN      BIT(31)
-
-#define SDHCI_GLI_9750_PLLSSC        0x86C
-#define   SDHCI_GLI_9750_PLLSSC_PPM    GENMASK(31, 16)
-
-#define SDHCI_GLI_9750_SW_CTRL      0x874
-#define   SDHCI_GLI_9750_SW_CTRL_4    GENMASK(7, 6)
-#define   GLI_9750_SW_CTRL_4_VALUE    0x3
-
-#define SDHCI_GLI_9750_MISC            0x878
-#define   SDHCI_GLI_9750_MISC_TX1_INV    BIT(2)
-#define   SDHCI_GLI_9750_MISC_RX_INV     BIT(3)
-#define   SDHCI_GLI_9750_MISC_TX1_DLY    GENMASK(6, 4)
-#define   GLI_9750_MISC_TX1_INV_VALUE    0x0
-#define   GLI_9750_MISC_RX_INV_ON        0x1
-#define   GLI_9750_MISC_RX_INV_OFF       0x0
-#define   GLI_9750_MISC_RX_INV_VALUE     GLI_9750_MISC_RX_INV_OFF
-#define   GLI_9750_MISC_TX1_DLY_VALUE    0x5
-#define   SDHCI_GLI_9750_MISC_SSC_OFF    BIT(26)
-
-#define SDHCI_GLI_9750_TUNING_CONTROL	          0x540
-#define   SDHCI_GLI_9750_TUNING_CONTROL_EN          BIT(4)
-#define   GLI_9750_TUNING_CONTROL_EN_ON             0x1
-#define   GLI_9750_TUNING_CONTROL_EN_OFF            0x0
-#define   SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_1    BIT(16)
-#define   SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_2    GENMASK(20, 19)
-#define   GLI_9750_TUNING_CONTROL_GLITCH_1_VALUE    0x1
-#define   GLI_9750_TUNING_CONTROL_GLITCH_2_VALUE    0x2
-
-#define SDHCI_GLI_9750_TUNING_PARAMETERS           0x544
-#define   SDHCI_GLI_9750_TUNING_PARAMETERS_RX_DLY    GENMASK(2, 0)
-#define   GLI_9750_TUNING_PARAMETERS_RX_DLY_VALUE    0x1
-
-#define SDHCI_GLI_9763E_CTRL_HS400  0x7
-
-#define SDHCI_GLI_9763E_HS400_ES_REG      0x52C
-#define   SDHCI_GLI_9763E_HS400_ES_BIT      BIT(8)
-
-#define PCIE_GLI_9763E_VHS	 0x884
-#define   GLI_9763E_VHS_REV	   GENMASK(19, 16)
-#define   GLI_9763E_VHS_REV_R      0x0
-#define   GLI_9763E_VHS_REV_M      0x1
-#define   GLI_9763E_VHS_REV_W      0x2
-#define PCIE_GLI_9763E_MB	 0x888
-#define   GLI_9763E_MB_CMDQ_OFF	   BIT(19)
-#define   GLI_9763E_MB_ERP_ON      BIT(7)
-#define PCIE_GLI_9763E_SCR	 0x8E0
-#define   GLI_9763E_SCR_AXI_REQ	   BIT(9)
-
-#define PCIE_GLI_9763E_CFG       0x8A0
-#define   GLI_9763E_CFG_LPSN_DIS   BIT(12)
-
-#define PCIE_GLI_9763E_CFG2      0x8A4
-#define   GLI_9763E_CFG2_L1DLY     GENMASK(28, 19)
-#define   GLI_9763E_CFG2_L1DLY_MID 0x54
-
-#define PCIE_GLI_9763E_MMC_CTRL  0x960
-#define   GLI_9763E_HS400_SLOW     BIT(3)
-
-#define PCIE_GLI_9763E_CLKRXDLY  0x934
-#define   GLI_9763E_HS400_RXDLY    GENMASK(31, 28)
-#define   GLI_9763E_HS400_RXDLY_5  0x5
-
-#define SDHCI_GLI_9763E_CQE_BASE_ADDR	 0x200
-#define GLI_9763E_CQE_TRNS_MODE	   (SDHCI_TRNS_MULTI | \
-				    SDHCI_TRNS_BLK_CNT_EN | \
-				    SDHCI_TRNS_DMA)
-
-#define PCI_GLI_9755_WT       0x800
-#define   PCI_GLI_9755_WT_EN    BIT(0)
-#define   GLI_9755_WT_EN_ON     0x1
-#define   GLI_9755_WT_EN_OFF    0x0
-
-#define PCI_GLI_9755_PECONF   0x44
-#define   PCI_GLI_9755_LFCLK    GENMASK(14, 12)
-#define   PCI_GLI_9755_DMACLK   BIT(29)
-#define   PCI_GLI_9755_INVERT_CD  BIT(30)
-#define   PCI_GLI_9755_INVERT_WP  BIT(31)
-
-#define PCI_GLI_9755_CFG2          0x48
-#define   PCI_GLI_9755_CFG2_L1DLY    GENMASK(28, 24)
-#define   GLI_9755_CFG2_L1DLY_VALUE  0x1F
-
-#define PCI_GLI_9755_PLL            0x64
-#define   PCI_GLI_9755_PLL_LDIV       GENMASK(9, 0)
-#define   PCI_GLI_9755_PLL_PDIV       GENMASK(14, 12)
-#define   PCI_GLI_9755_PLL_DIR        BIT(15)
-#define   PCI_GLI_9755_PLLSSC_STEP    GENMASK(28, 24)
-#define   PCI_GLI_9755_PLLSSC_EN      BIT(31)
-
-#define PCI_GLI_9755_PLLSSC        0x68
-#define   PCI_GLI_9755_PLLSSC_PPM    GENMASK(15, 0)
-
-#define PCI_GLI_9755_SerDes  0x70
-#define PCI_GLI_9755_SCP_DIS   BIT(19)
-
-#define PCI_GLI_9755_MISC	    0x78
-#define   PCI_GLI_9755_MISC_SSC_OFF    BIT(26)
-
-#define PCI_GLI_9755_PM_CTRL     0xFC
-#define   PCI_GLI_9755_PM_STATE    GENMASK(1, 0)
-
-#define GLI_MAX_TUNING_LOOP 40
-
-/* Genesys Logic chipset */
-static inline void gl9750_wt_on(struct sdhci_host *host)
-{
-	u32 wt_value;
-	u32 wt_enable;
-
-	wt_value = sdhci_readl(host, SDHCI_GLI_9750_WT);
-	wt_enable = FIELD_GET(SDHCI_GLI_9750_WT_EN, wt_value);
-
-	if (wt_enable == GLI_9750_WT_EN_ON)
-		return;
-
-	wt_value &= ~SDHCI_GLI_9750_WT_EN;
-	wt_value |= FIELD_PREP(SDHCI_GLI_9750_WT_EN, GLI_9750_WT_EN_ON);
-
-	sdhci_writel(host, wt_value, SDHCI_GLI_9750_WT);
-}
-
-static inline void gl9750_wt_off(struct sdhci_host *host)
-{
-	u32 wt_value;
-	u32 wt_enable;
-
-	wt_value = sdhci_readl(host, SDHCI_GLI_9750_WT);
-	wt_enable = FIELD_GET(SDHCI_GLI_9750_WT_EN, wt_value);
-
-	if (wt_enable == GLI_9750_WT_EN_OFF)
-		return;
-
-	wt_value &= ~SDHCI_GLI_9750_WT_EN;
-	wt_value |= FIELD_PREP(SDHCI_GLI_9750_WT_EN, GLI_9750_WT_EN_OFF);
-
-	sdhci_writel(host, wt_value, SDHCI_GLI_9750_WT);
-}
-
-static void gli_set_9750(struct sdhci_host *host)
-{
-	u32 driving_value;
-	u32 pll_value;
-	u32 sw_ctrl_value;
-	u32 misc_value;
-	u32 parameter_value;
-	u32 control_value;
-	u16 ctrl2;
-
-	gl9750_wt_on(host);
-
-	driving_value = sdhci_readl(host, SDHCI_GLI_9750_DRIVING);
-	pll_value = sdhci_readl(host, SDHCI_GLI_9750_PLL);
-	sw_ctrl_value = sdhci_readl(host, SDHCI_GLI_9750_SW_CTRL);
-	misc_value = sdhci_readl(host, SDHCI_GLI_9750_MISC);
-	parameter_value = sdhci_readl(host, SDHCI_GLI_9750_TUNING_PARAMETERS);
-	control_value = sdhci_readl(host, SDHCI_GLI_9750_TUNING_CONTROL);
-
-	driving_value &= ~(SDHCI_GLI_9750_DRIVING_1);
-	driving_value &= ~(SDHCI_GLI_9750_DRIVING_2);
-	driving_value |= FIELD_PREP(SDHCI_GLI_9750_DRIVING_1,
-				    GLI_9750_DRIVING_1_VALUE);
-	driving_value |= FIELD_PREP(SDHCI_GLI_9750_DRIVING_2,
-				    GLI_9750_DRIVING_2_VALUE);
-	driving_value &= ~(SDHCI_GLI_9750_SEL_1|SDHCI_GLI_9750_SEL_2|SDHCI_GLI_9750_ALL_RST);
-	driving_value |= SDHCI_GLI_9750_SEL_2;
-	sdhci_writel(host, driving_value, SDHCI_GLI_9750_DRIVING);
-
-	sw_ctrl_value &= ~SDHCI_GLI_9750_SW_CTRL_4;
-	sw_ctrl_value |= FIELD_PREP(SDHCI_GLI_9750_SW_CTRL_4,
-				    GLI_9750_SW_CTRL_4_VALUE);
-	sdhci_writel(host, sw_ctrl_value, SDHCI_GLI_9750_SW_CTRL);
-
-	/* reset the tuning flow after reinit and before starting tuning */
-	pll_value &= ~SDHCI_GLI_9750_PLL_TX2_INV;
-	pll_value &= ~SDHCI_GLI_9750_PLL_TX2_DLY;
-	pll_value |= FIELD_PREP(SDHCI_GLI_9750_PLL_TX2_INV,
-				GLI_9750_PLL_TX2_INV_VALUE);
-	pll_value |= FIELD_PREP(SDHCI_GLI_9750_PLL_TX2_DLY,
-				GLI_9750_PLL_TX2_DLY_VALUE);
-
-	misc_value &= ~SDHCI_GLI_9750_MISC_TX1_INV;
-	misc_value &= ~SDHCI_GLI_9750_MISC_RX_INV;
-	misc_value &= ~SDHCI_GLI_9750_MISC_TX1_DLY;
-	misc_value |= FIELD_PREP(SDHCI_GLI_9750_MISC_TX1_INV,
-				 GLI_9750_MISC_TX1_INV_VALUE);
-	misc_value |= FIELD_PREP(SDHCI_GLI_9750_MISC_RX_INV,
-				 GLI_9750_MISC_RX_INV_VALUE);
-	misc_value |= FIELD_PREP(SDHCI_GLI_9750_MISC_TX1_DLY,
-				 GLI_9750_MISC_TX1_DLY_VALUE);
-
-	parameter_value &= ~SDHCI_GLI_9750_TUNING_PARAMETERS_RX_DLY;
-	parameter_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_PARAMETERS_RX_DLY,
-				      GLI_9750_TUNING_PARAMETERS_RX_DLY_VALUE);
-
-	control_value &= ~SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_1;
-	control_value &= ~SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_2;
-	control_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_1,
-				    GLI_9750_TUNING_CONTROL_GLITCH_1_VALUE);
-	control_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_CONTROL_GLITCH_2,
-				    GLI_9750_TUNING_CONTROL_GLITCH_2_VALUE);
-
-	sdhci_writel(host, pll_value, SDHCI_GLI_9750_PLL);
-	sdhci_writel(host, misc_value, SDHCI_GLI_9750_MISC);
-
-	/* disable tuned clk */
-	ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
-	ctrl2 &= ~SDHCI_CTRL_TUNED_CLK;
-	sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2);
-
-	/* enable tuning parameters control */
-	control_value &= ~SDHCI_GLI_9750_TUNING_CONTROL_EN;
-	control_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_CONTROL_EN,
-				    GLI_9750_TUNING_CONTROL_EN_ON);
-	sdhci_writel(host, control_value, SDHCI_GLI_9750_TUNING_CONTROL);
-
-	/* write tuning parameters */
-	sdhci_writel(host, parameter_value, SDHCI_GLI_9750_TUNING_PARAMETERS);
-
-	/* disable tuning parameters control */
-	control_value &= ~SDHCI_GLI_9750_TUNING_CONTROL_EN;
-	control_value |= FIELD_PREP(SDHCI_GLI_9750_TUNING_CONTROL_EN,
-				    GLI_9750_TUNING_CONTROL_EN_OFF);
-	sdhci_writel(host, control_value, SDHCI_GLI_9750_TUNING_CONTROL);
-
-	/* clear tuned clk */
-	ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
-	ctrl2 &= ~SDHCI_CTRL_TUNED_CLK;
-	sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2);
-
-	gl9750_wt_off(host);
-}
-
-static void gli_set_9750_rx_inv(struct sdhci_host *host, bool b)
-{
-	u32 misc_value;
-
-	gl9750_wt_on(host);
-
-	misc_value = sdhci_readl(host, SDHCI_GLI_9750_MISC);
-	misc_value &= ~SDHCI_GLI_9750_MISC_RX_INV;
-	if (b) {
-		misc_value |= FIELD_PREP(SDHCI_GLI_9750_MISC_RX_INV,
-					 GLI_9750_MISC_RX_INV_ON);
-	} else {
-		misc_value |= FIELD_PREP(SDHCI_GLI_9750_MISC_RX_INV,
-					 GLI_9750_MISC_RX_INV_OFF);
-	}
-	sdhci_writel(host, misc_value, SDHCI_GLI_9750_MISC);
-
-	gl9750_wt_off(host);
-}
-
-static int __sdhci_execute_tuning_9750(struct sdhci_host *host, u32 opcode)
-{
-	int i;
-	int rx_inv;
-
-	for (rx_inv = 0; rx_inv < 2; rx_inv++) {
-		gli_set_9750_rx_inv(host, !!rx_inv);
-		sdhci_start_tuning(host);
-
-		for (i = 0; i < GLI_MAX_TUNING_LOOP; i++) {
-			u16 ctrl;
-
-			sdhci_send_tuning(host, opcode);
-
-			if (!host->tuning_done) {
-				sdhci_abort_tuning(host, opcode);
-				break;
-			}
-
-			ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
-			if (!(ctrl & SDHCI_CTRL_EXEC_TUNING)) {
-				if (ctrl & SDHCI_CTRL_TUNED_CLK)
-					return 0; /* Success! */
-				break;
-			}
-		}
-	}
-	if (!host->tuning_done) {
-		pr_info("%s: Tuning timeout, falling back to fixed sampling clock\n",
-			mmc_hostname(host->mmc));
-		return -ETIMEDOUT;
-	}
-
-	pr_info("%s: Tuning failed, falling back to fixed sampling clock\n",
-		mmc_hostname(host->mmc));
-	sdhci_reset_tuning(host);
-
-	return -EAGAIN;
-}
-
-static int gl9750_execute_tuning(struct sdhci_host *host, u32 opcode)
-{
-	host->mmc->retune_period = 0;
-	if (host->tuning_mode == SDHCI_TUNING_MODE_1)
-		host->mmc->retune_period = host->tuning_count;
-
-	gli_set_9750(host);
-	host->tuning_err = __sdhci_execute_tuning_9750(host, opcode);
-	sdhci_end_tuning(host);
-
-	return 0;
-}
-
-static void gl9750_disable_ssc_pll(struct sdhci_host *host)
-{
-	u32 pll;
-
-	gl9750_wt_on(host);
-	pll = sdhci_readl(host, SDHCI_GLI_9750_PLL);
-	pll &= ~(SDHCI_GLI_9750_PLL_DIR | SDHCI_GLI_9750_PLLSSC_EN);
-	sdhci_writel(host, pll, SDHCI_GLI_9750_PLL);
-	gl9750_wt_off(host);
-}
-
-static void gl9750_set_pll(struct sdhci_host *host, u8 dir, u16 ldiv, u8 pdiv)
-{
-	u32 pll;
-
-	gl9750_wt_on(host);
-	pll = sdhci_readl(host, SDHCI_GLI_9750_PLL);
-	pll &= ~(SDHCI_GLI_9750_PLL_LDIV |
-		 SDHCI_GLI_9750_PLL_PDIV |
-		 SDHCI_GLI_9750_PLL_DIR);
-	pll |= FIELD_PREP(SDHCI_GLI_9750_PLL_LDIV, ldiv) |
-	       FIELD_PREP(SDHCI_GLI_9750_PLL_PDIV, pdiv) |
-	       FIELD_PREP(SDHCI_GLI_9750_PLL_DIR, dir);
-	sdhci_writel(host, pll, SDHCI_GLI_9750_PLL);
-	gl9750_wt_off(host);
-
-	/* wait for pll stable */
-	mdelay(1);
-}
-
-static bool gl9750_ssc_enable(struct sdhci_host *host)
-{
-	u32 misc;
-	u8 off;
-
-	gl9750_wt_on(host);
-	misc = sdhci_readl(host, SDHCI_GLI_9750_MISC);
-	off = FIELD_GET(SDHCI_GLI_9750_MISC_SSC_OFF, misc);
-	gl9750_wt_off(host);
-
-	return !off;
-}
-
-static void gl9750_set_ssc(struct sdhci_host *host, u8 enable, u8 step, u16 ppm)
-{
-	u32 pll;
-	u32 ssc;
-
-	gl9750_wt_on(host);
-	pll = sdhci_readl(host, SDHCI_GLI_9750_PLL);
-	ssc = sdhci_readl(host, SDHCI_GLI_9750_PLLSSC);
-	pll &= ~(SDHCI_GLI_9750_PLLSSC_STEP |
-		 SDHCI_GLI_9750_PLLSSC_EN);
-	ssc &= ~SDHCI_GLI_9750_PLLSSC_PPM;
-	pll |= FIELD_PREP(SDHCI_GLI_9750_PLLSSC_STEP, step) |
-	       FIELD_PREP(SDHCI_GLI_9750_PLLSSC_EN, enable);
-	ssc |= FIELD_PREP(SDHCI_GLI_9750_PLLSSC_PPM, ppm);
-	sdhci_writel(host, ssc, SDHCI_GLI_9750_PLLSSC);
-	sdhci_writel(host, pll, SDHCI_GLI_9750_PLL);
-	gl9750_wt_off(host);
-}
-
-static void gl9750_set_ssc_pll_205mhz(struct sdhci_host *host)
-{
-	bool enable = gl9750_ssc_enable(host);
-
-	/* set pll to 205MHz and ssc */
-	gl9750_set_ssc(host, enable, 0xF, 0x5A1D);
-	gl9750_set_pll(host, 0x1, 0x246, 0x0);
-}
-
-static void gl9750_set_ssc_pll_100mhz(struct sdhci_host *host)
-{
-	bool enable = gl9750_ssc_enable(host);
-
-	/* set pll to 100MHz and ssc */
-	gl9750_set_ssc(host, enable, 0xE, 0x51EC);
-	gl9750_set_pll(host, 0x1, 0x244, 0x1);
-}
-
-static void gl9750_set_ssc_pll_50mhz(struct sdhci_host *host)
-{
-	bool enable = gl9750_ssc_enable(host);
-
-	/* set pll to 50MHz and ssc */
-	gl9750_set_ssc(host, enable, 0xE, 0x51EC);
-	gl9750_set_pll(host, 0x1, 0x244, 0x3);
-}
-
-static void sdhci_gl9750_set_clock(struct sdhci_host *host, unsigned int clock)
-{
-	struct mmc_ios *ios = &host->mmc->ios;
-	u16 clk;
-
-	host->mmc->actual_clock = 0;
-
-	gl9750_disable_ssc_pll(host);
-	sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
-
-	if (clock == 0)
-		return;
-
-	clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);
-	if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {
-		host->mmc->actual_clock = 205000000;
-		gl9750_set_ssc_pll_205mhz(host);
-	} else if (clock == 100000000) {
-		gl9750_set_ssc_pll_100mhz(host);
-	} else if (clock == 50000000) {
-		gl9750_set_ssc_pll_50mhz(host);
-	}
-
-	sdhci_enable_clk(host, clk);
-}
-
-static void gl9750_hw_setting(struct sdhci_host *host)
-{
-	u32 value;
-
-	gl9750_wt_on(host);
-
-	value = sdhci_readl(host, SDHCI_GLI_9750_CFG2);
-	value &= ~SDHCI_GLI_9750_CFG2_L1DLY;
-	/* set ASPM L1 entry delay to 7.9us */
-	value |= FIELD_PREP(SDHCI_GLI_9750_CFG2_L1DLY,
-			    GLI_9750_CFG2_L1DLY_VALUE);
-	sdhci_writel(host, value, SDHCI_GLI_9750_CFG2);
-
-	gl9750_wt_off(host);
-}
-
-static void gli_pcie_enable_msi(struct sdhci_pci_slot *slot)
-{
-	int ret;
-
-	ret = pci_alloc_irq_vectors(slot->chip->pdev, 1, 1,
-				    PCI_IRQ_MSI | PCI_IRQ_MSIX);
-	if (ret < 0) {
-		pr_warn("%s: enable PCI MSI failed, error=%d\n",
-		       mmc_hostname(slot->host->mmc), ret);
-		return;
-	}
-
-	slot->host->irq = pci_irq_vector(slot->chip->pdev, 0);
-}
-
-static inline void gl9755_wt_on(struct pci_dev *pdev)
-{
-	u32 wt_value;
-	u32 wt_enable;
-
-	pci_read_config_dword(pdev, PCI_GLI_9755_WT, &wt_value);
-	wt_enable = FIELD_GET(PCI_GLI_9755_WT_EN, wt_value);
-
-	if (wt_enable == GLI_9755_WT_EN_ON)
-		return;
-
-	wt_value &= ~PCI_GLI_9755_WT_EN;
-	wt_value |= FIELD_PREP(PCI_GLI_9755_WT_EN, GLI_9755_WT_EN_ON);
-
-	pci_write_config_dword(pdev, PCI_GLI_9755_WT, wt_value);
-}
-
-static inline void gl9755_wt_off(struct pci_dev *pdev)
-{
-	u32 wt_value;
-	u32 wt_enable;
-
-	pci_read_config_dword(pdev, PCI_GLI_9755_WT, &wt_value);
-	wt_enable = FIELD_GET(PCI_GLI_9755_WT_EN, wt_value);
-
-	if (wt_enable == GLI_9755_WT_EN_OFF)
-		return;
-
-	wt_value &= ~PCI_GLI_9755_WT_EN;
-	wt_value |= FIELD_PREP(PCI_GLI_9755_WT_EN, GLI_9755_WT_EN_OFF);
-
-	pci_write_config_dword(pdev, PCI_GLI_9755_WT, wt_value);
-}
-
-static void gl9755_disable_ssc_pll(struct pci_dev *pdev)
-{
-	u32 pll;
-
-	gl9755_wt_on(pdev);
-	pci_read_config_dword(pdev, PCI_GLI_9755_PLL, &pll);
-	pll &= ~(PCI_GLI_9755_PLL_DIR | PCI_GLI_9755_PLLSSC_EN);
-	pci_write_config_dword(pdev, PCI_GLI_9755_PLL, pll);
-	gl9755_wt_off(pdev);
-}
-
-static void gl9755_set_pll(struct pci_dev *pdev, u8 dir, u16 ldiv, u8 pdiv)
-{
-	u32 pll;
-
-	gl9755_wt_on(pdev);
-	pci_read_config_dword(pdev, PCI_GLI_9755_PLL, &pll);
-	pll &= ~(PCI_GLI_9755_PLL_LDIV |
-		 PCI_GLI_9755_PLL_PDIV |
-		 PCI_GLI_9755_PLL_DIR);
-	pll |= FIELD_PREP(PCI_GLI_9755_PLL_LDIV, ldiv) |
-	       FIELD_PREP(PCI_GLI_9755_PLL_PDIV, pdiv) |
-	       FIELD_PREP(PCI_GLI_9755_PLL_DIR, dir);
-	pci_write_config_dword(pdev, PCI_GLI_9755_PLL, pll);
-	gl9755_wt_off(pdev);
-
-	/* wait for pll stable */
-	mdelay(1);
-}
-
-static bool gl9755_ssc_enable(struct pci_dev *pdev)
-{
-	u32 misc;
-	u8 off;
-
-	gl9755_wt_on(pdev);
-	pci_read_config_dword(pdev, PCI_GLI_9755_MISC, &misc);
-	off = FIELD_GET(PCI_GLI_9755_MISC_SSC_OFF, misc);
-	gl9755_wt_off(pdev);
-
-	return !off;
-}
-
-static void gl9755_set_ssc(struct pci_dev *pdev, u8 enable, u8 step, u16 ppm)
-{
-	u32 pll;
-	u32 ssc;
-
-	gl9755_wt_on(pdev);
-	pci_read_config_dword(pdev, PCI_GLI_9755_PLL, &pll);
-	pci_read_config_dword(pdev, PCI_GLI_9755_PLLSSC, &ssc);
-	pll &= ~(PCI_GLI_9755_PLLSSC_STEP |
-		 PCI_GLI_9755_PLLSSC_EN);
-	ssc &= ~PCI_GLI_9755_PLLSSC_PPM;
-	pll |= FIELD_PREP(PCI_GLI_9755_PLLSSC_STEP, step) |
-	       FIELD_PREP(PCI_GLI_9755_PLLSSC_EN, enable);
-	ssc |= FIELD_PREP(PCI_GLI_9755_PLLSSC_PPM, ppm);
-	pci_write_config_dword(pdev, PCI_GLI_9755_PLLSSC, ssc);
-	pci_write_config_dword(pdev, PCI_GLI_9755_PLL, pll);
-	gl9755_wt_off(pdev);
-}
-
-static void gl9755_set_ssc_pll_205mhz(struct pci_dev *pdev)
-{
-	bool enable = gl9755_ssc_enable(pdev);
-
-	/* set pll to 205MHz and ssc */
-	gl9755_set_ssc(pdev, enable, 0xF, 0x5A1D);
-	gl9755_set_pll(pdev, 0x1, 0x246, 0x0);
-}
-
-static void gl9755_set_ssc_pll_100mhz(struct pci_dev *pdev)
-{
-	bool enable = gl9755_ssc_enable(pdev);
-
-	/* set pll to 100MHz and ssc */
-	gl9755_set_ssc(pdev, enable, 0xE, 0x51EC);
-	gl9755_set_pll(pdev, 0x1, 0x244, 0x1);
-}
-
-static void gl9755_set_ssc_pll_50mhz(struct pci_dev *pdev)
-{
-	bool enable = gl9755_ssc_enable(pdev);
-
-	/* set pll to 50MHz and ssc */
-	gl9755_set_ssc(pdev, enable, 0xE, 0x51EC);
-	gl9755_set_pll(pdev, 0x1, 0x244, 0x3);
-}
-
-static void sdhci_gl9755_set_clock(struct sdhci_host *host, unsigned int clock)
-{
-	struct sdhci_pci_slot *slot = sdhci_priv(host);
-	struct mmc_ios *ios = &host->mmc->ios;
-	struct pci_dev *pdev;
-	u16 clk;
-
-	pdev = slot->chip->pdev;
-	host->mmc->actual_clock = 0;
-
-	gl9755_disable_ssc_pll(pdev);
-	sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
-
-	if (clock == 0)
-		return;
-
-	clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);
-	if (clock == 200000000 && ios->timing == MMC_TIMING_UHS_SDR104) {
-		host->mmc->actual_clock = 205000000;
-		gl9755_set_ssc_pll_205mhz(pdev);
-	} else if (clock == 100000000) {
-		gl9755_set_ssc_pll_100mhz(pdev);
-	} else if (clock == 50000000) {
-		gl9755_set_ssc_pll_50mhz(pdev);
-	}
-
-	sdhci_enable_clk(host, clk);
-}
-
-static void gl9755_hw_setting(struct sdhci_pci_slot *slot)
-{
-	struct pci_dev *pdev = slot->chip->pdev;
-	u32 value;
-
-	gl9755_wt_on(pdev);
-
-	pci_read_config_dword(pdev, PCI_GLI_9755_PECONF, &value);
-	/*
-	 * Apple ARM64 platforms using these chips may have
-	 * inverted CD/WP detection.
-	 */
-	if (of_property_read_bool(pdev->dev.of_node, "cd-inverted"))
-		value |= PCI_GLI_9755_INVERT_CD;
-	if (of_property_read_bool(pdev->dev.of_node, "wp-inverted"))
-		value |= PCI_GLI_9755_INVERT_WP;
-	value &= ~PCI_GLI_9755_LFCLK;
-	value &= ~PCI_GLI_9755_DMACLK;
-	pci_write_config_dword(pdev, PCI_GLI_9755_PECONF, value);
-
-	/* enable short circuit protection */
-	pci_read_config_dword(pdev, PCI_GLI_9755_SerDes, &value);
-	value &= ~PCI_GLI_9755_SCP_DIS;
-	pci_write_config_dword(pdev, PCI_GLI_9755_SerDes, value);
-
-	pci_read_config_dword(pdev, PCI_GLI_9755_CFG2, &value);
-	value &= ~PCI_GLI_9755_CFG2_L1DLY;
-	/* set ASPM L1 entry delay to 7.9us */
-	value |= FIELD_PREP(PCI_GLI_9755_CFG2_L1DLY,
-			    GLI_9755_CFG2_L1DLY_VALUE);
-	pci_write_config_dword(pdev, PCI_GLI_9755_CFG2, value);
-
-	/* toggle PM state to allow GL9755 to enter ASPM L1.2 */
-	pci_read_config_dword(pdev, PCI_GLI_9755_PM_CTRL, &value);
-	value |= PCI_GLI_9755_PM_STATE;
-	pci_write_config_dword(pdev, PCI_GLI_9755_PM_CTRL, value);
-	value &= ~PCI_GLI_9755_PM_STATE;
-	pci_write_config_dword(pdev, PCI_GLI_9755_PM_CTRL, value);
-
-	gl9755_wt_off(pdev);
-}
-
-static int gli_probe_slot_gl9750(struct sdhci_pci_slot *slot)
-{
-	struct sdhci_host *host = slot->host;
-
-	gl9750_hw_setting(host);
-	gli_pcie_enable_msi(slot);
-	slot->host->mmc->caps2 |= MMC_CAP2_NO_SDIO;
-	sdhci_enable_v4_mode(host);
-
-	return 0;
-}
-
-static int gli_probe_slot_gl9755(struct sdhci_pci_slot *slot)
-{
-	struct sdhci_host *host = slot->host;
-
-	gl9755_hw_setting(slot);
-	gli_pcie_enable_msi(slot);
-	slot->host->mmc->caps2 |= MMC_CAP2_NO_SDIO;
-	sdhci_enable_v4_mode(host);
-
-	return 0;
-}
-
-static void sdhci_gli_voltage_switch(struct sdhci_host *host)
-{
-	/*
-	 * According to Section 3.6.1 signal voltage switch procedure in
-	 * SD Host Controller Simplified Spec. 4.20, steps 6~8 are as
-	 * follows:
-	 * (6) Set 1.8V Signal Enable in the Host Control 2 register.
-	 * (7) Wait 5ms. 1.8V voltage regulator shall be stable within this
-	 *     period.
-	 * (8) If 1.8V Signal Enable is cleared by Host Controller, go to
-	 *     step (12).
-	 *
-	 * Wait 5ms after set 1.8V signal enable in Host Control 2 register
-	 * to ensure 1.8V signal enable bit is set by GL9750/GL9755.
-	 *
-	 * ...however, the controller in the NUC10i3FNK4 (a 9755) requires
-	 * slightly longer than 5ms before the control register reports that
-	 * 1.8V is ready, and far longer still before the card will actually
-	 * work reliably.
-	 */
-	usleep_range(100000, 110000);
-}
-
-static void sdhci_gl9750_reset(struct sdhci_host *host, u8 mask)
-{
-	sdhci_reset(host, mask);
-	gli_set_9750(host);
-}
-
-static u32 sdhci_gl9750_readl(struct sdhci_host *host, int reg)
-{
-	u32 value;
-
-	value = readl(host->ioaddr + reg);
-	if (unlikely(reg == SDHCI_MAX_CURRENT && !(value & 0xff)))
-		value |= 0xc8;
-
-	return value;
-}
-
-#ifdef CONFIG_PM_SLEEP
-static int sdhci_pci_gli_resume(struct sdhci_pci_chip *chip)
-{
-	struct sdhci_pci_slot *slot = chip->slots[0];
-
-	pci_free_irq_vectors(slot->chip->pdev);
-	gli_pcie_enable_msi(slot);
-
-	return sdhci_pci_resume_host(chip);
-}
-
-static int sdhci_cqhci_gli_resume(struct sdhci_pci_chip *chip)
-{
-	struct sdhci_pci_slot *slot = chip->slots[0];
-	int ret;
-
-	ret = sdhci_pci_gli_resume(chip);
-	if (ret)
-		return ret;
-
-	return cqhci_resume(slot->host->mmc);
-}
-
-static int sdhci_cqhci_gli_suspend(struct sdhci_pci_chip *chip)
-{
-	struct sdhci_pci_slot *slot = chip->slots[0];
-	int ret;
-
-	ret = cqhci_suspend(slot->host->mmc);
-	if (ret)
-		return ret;
-
-	return sdhci_suspend_host(slot->host);
-}
-#endif
-
-static void gl9763e_hs400_enhanced_strobe(struct mmc_host *mmc,
-					  struct mmc_ios *ios)
-{
-	struct sdhci_host *host = mmc_priv(mmc);
-	u32 val;
-
-	val = sdhci_readl(host, SDHCI_GLI_9763E_HS400_ES_REG);
-	if (ios->enhanced_strobe)
-		val |= SDHCI_GLI_9763E_HS400_ES_BIT;
-	else
-		val &= ~SDHCI_GLI_9763E_HS400_ES_BIT;
-
-	sdhci_writel(host, val, SDHCI_GLI_9763E_HS400_ES_REG);
-}
-
-static void sdhci_set_gl9763e_signaling(struct sdhci_host *host,
-					unsigned int timing)
-{
-	u16 ctrl_2;
-
-	ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2);
-	ctrl_2 &= ~SDHCI_CTRL_UHS_MASK;
-	if (timing == MMC_TIMING_MMC_HS200)
-		ctrl_2 |= SDHCI_CTRL_UHS_SDR104;
-	else if (timing == MMC_TIMING_MMC_HS)
-		ctrl_2 |= SDHCI_CTRL_UHS_SDR25;
-	else if (timing == MMC_TIMING_MMC_DDR52)
-		ctrl_2 |= SDHCI_CTRL_UHS_DDR50;
-	else if (timing == MMC_TIMING_MMC_HS400)
-		ctrl_2 |= SDHCI_GLI_9763E_CTRL_HS400;
-
-	sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2);
-}
-
-static void sdhci_gl9763e_dumpregs(struct mmc_host *mmc)
-{
-	sdhci_dumpregs(mmc_priv(mmc));
-}
-
-static void sdhci_gl9763e_cqe_pre_enable(struct mmc_host *mmc)
-{
-	struct cqhci_host *cq_host = mmc->cqe_private;
-	u32 value;
-
-	value = cqhci_readl(cq_host, CQHCI_CFG);
-	value |= CQHCI_ENABLE;
-	cqhci_writel(cq_host, value, CQHCI_CFG);
-}
-
-static void sdhci_gl9763e_cqe_enable(struct mmc_host *mmc)
-{
-	struct sdhci_host *host = mmc_priv(mmc);
-
-	sdhci_writew(host, GLI_9763E_CQE_TRNS_MODE, SDHCI_TRANSFER_MODE);
-	sdhci_cqe_enable(mmc);
-}
-
-static u32 sdhci_gl9763e_cqhci_irq(struct sdhci_host *host, u32 intmask)
-{
-	int cmd_error = 0;
-	int data_error = 0;
-
-	if (!sdhci_cqe_irq(host, intmask, &cmd_error, &data_error))
-		return intmask;
-
-	cqhci_irq(host->mmc, intmask, cmd_error, data_error);
-
-	return 0;
-}
-
-static void sdhci_gl9763e_cqe_post_disable(struct mmc_host *mmc)
-{
-	struct sdhci_host *host = mmc_priv(mmc);
-	struct cqhci_host *cq_host = mmc->cqe_private;
-	u32 value;
-
-	value = cqhci_readl(cq_host, CQHCI_CFG);
-	value &= ~CQHCI_ENABLE;
-	cqhci_writel(cq_host, value, CQHCI_CFG);
-	sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE);
-}
-
-static const struct cqhci_host_ops sdhci_gl9763e_cqhci_ops = {
-	.enable         = sdhci_gl9763e_cqe_enable,
-	.disable        = sdhci_cqe_disable,
-	.dumpregs       = sdhci_gl9763e_dumpregs,
-	.pre_enable     = sdhci_gl9763e_cqe_pre_enable,
-	.post_disable   = sdhci_gl9763e_cqe_post_disable,
-};
-
-static int gl9763e_add_host(struct sdhci_pci_slot *slot)
-{
-	struct device *dev = &slot->chip->pdev->dev;
-	struct sdhci_host *host = slot->host;
-	struct cqhci_host *cq_host;
-	bool dma64;
-	int ret;
-
-	ret = sdhci_setup_host(host);
-	if (ret)
-		return ret;
-
-	cq_host = devm_kzalloc(dev, sizeof(*cq_host), GFP_KERNEL);
-	if (!cq_host) {
-		ret = -ENOMEM;
-		goto cleanup;
-	}
-
-	cq_host->mmio = host->ioaddr + SDHCI_GLI_9763E_CQE_BASE_ADDR;
-	cq_host->ops = &sdhci_gl9763e_cqhci_ops;
-
-	dma64 = host->flags & SDHCI_USE_64_BIT_DMA;
-	if (dma64)
-		cq_host->caps |= CQHCI_TASK_DESC_SZ_128;
-
-	ret = cqhci_init(cq_host, host->mmc, dma64);
-	if (ret)
-		goto cleanup;
-
-	ret = __sdhci_add_host(host);
-	if (ret)
-		goto cleanup;
-
-	return 0;
-
-cleanup:
-	sdhci_cleanup_host(host);
-	return ret;
-}
-
-static void sdhci_gl9763e_reset(struct sdhci_host *host, u8 mask)
-{
-	if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL) &&
-	    host->mmc->cqe_private)
-		cqhci_deactivate(host->mmc);
-	sdhci_reset(host, mask);
-}
-
-static void gli_set_gl9763e(struct sdhci_pci_slot *slot)
-{
-	struct pci_dev *pdev = slot->chip->pdev;
-	u32 value;
-
-	pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
-	value &= ~GLI_9763E_VHS_REV;
-	value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_W);
-	pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
-
-	pci_read_config_dword(pdev, PCIE_GLI_9763E_SCR, &value);
-	value |= GLI_9763E_SCR_AXI_REQ;
-	pci_write_config_dword(pdev, PCIE_GLI_9763E_SCR, value);
-
-	pci_read_config_dword(pdev, PCIE_GLI_9763E_MMC_CTRL, &value);
-	value &= ~GLI_9763E_HS400_SLOW;
-	pci_write_config_dword(pdev, PCIE_GLI_9763E_MMC_CTRL, value);
-
-	pci_read_config_dword(pdev, PCIE_GLI_9763E_CFG2, &value);
-	value &= ~GLI_9763E_CFG2_L1DLY;
-	/* set ASPM L1 entry delay to 21us */
-	value |= FIELD_PREP(GLI_9763E_CFG2_L1DLY, GLI_9763E_CFG2_L1DLY_MID);
-	pci_write_config_dword(pdev, PCIE_GLI_9763E_CFG2, value);
-
-	pci_read_config_dword(pdev, PCIE_GLI_9763E_CLKRXDLY, &value);
-	value &= ~GLI_9763E_HS400_RXDLY;
-	value |= FIELD_PREP(GLI_9763E_HS400_RXDLY, GLI_9763E_HS400_RXDLY_5);
-	pci_write_config_dword(pdev, PCIE_GLI_9763E_CLKRXDLY, value);
-
-	pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
-	value &= ~GLI_9763E_VHS_REV;
-	value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_R);
-	pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
-}
-
-#ifdef CONFIG_PM
-static void gl9763e_set_low_power_negotiation(struct sdhci_pci_slot *slot, bool enable)
-{
-	struct pci_dev *pdev = slot->chip->pdev;
-	u32 value;
-
-	pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
-	value &= ~GLI_9763E_VHS_REV;
-	value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_W);
-	pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
-
-	pci_read_config_dword(pdev, PCIE_GLI_9763E_CFG, &value);
-
-	if (enable)
-		value &= ~GLI_9763E_CFG_LPSN_DIS;
-	else
-		value |= GLI_9763E_CFG_LPSN_DIS;
-
-	pci_write_config_dword(pdev, PCIE_GLI_9763E_CFG, value);
-
-	pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
-	value &= ~GLI_9763E_VHS_REV;
-	value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_R);
-	pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
-}
-
-static int gl9763e_runtime_suspend(struct sdhci_pci_chip *chip)
-{
-	struct sdhci_pci_slot *slot = chip->slots[0];
-	struct sdhci_host *host = slot->host;
-	u16 clock;
-
-	/* Enable LPM negotiation to allow entering L1 state */
-	gl9763e_set_low_power_negotiation(slot, true);
-
-	clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
-	clock &= ~(SDHCI_CLOCK_PLL_EN | SDHCI_CLOCK_CARD_EN);
-	sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
-
-	return 0;
-}
-
-static int gl9763e_runtime_resume(struct sdhci_pci_chip *chip)
-{
-	struct sdhci_pci_slot *slot = chip->slots[0];
-	struct sdhci_host *host = slot->host;
-	u16 clock;
-
-	if (host->mmc->ios.power_mode != MMC_POWER_ON)
-		return 0;
-
-	clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
-
-	clock |= SDHCI_CLOCK_PLL_EN;
-	clock &= ~SDHCI_CLOCK_INT_STABLE;
-	sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
-
-	/* Wait max 150 ms */
-	if (read_poll_timeout(sdhci_readw, clock, (clock & SDHCI_CLOCK_INT_STABLE),
-			      1000, 150000, false, host, SDHCI_CLOCK_CONTROL)) {
-		pr_err("%s: PLL clock never stabilised.\n",
-		       mmc_hostname(host->mmc));
-		sdhci_dumpregs(host);
-	}
-
-	clock |= SDHCI_CLOCK_CARD_EN;
-	sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL);
-
-	/* Disable LPM negotiation to avoid entering L1 state. */
-	gl9763e_set_low_power_negotiation(slot, false);
-
-	return 0;
-}
-#endif
-
-static int gli_probe_slot_gl9763e(struct sdhci_pci_slot *slot)
-{
-	struct pci_dev *pdev = slot->chip->pdev;
-	struct sdhci_host *host = slot->host;
-	u32 value;
-
-	host->mmc->caps |= MMC_CAP_8_BIT_DATA |
-			   MMC_CAP_1_8V_DDR |
-			   MMC_CAP_NONREMOVABLE;
-	host->mmc->caps2 |= MMC_CAP2_HS200_1_8V_SDR |
-			    MMC_CAP2_HS400_1_8V |
-			    MMC_CAP2_HS400_ES |
-			    MMC_CAP2_NO_SDIO |
-			    MMC_CAP2_NO_SD;
-
-	pci_read_config_dword(pdev, PCIE_GLI_9763E_MB, &value);
-	if (!(value & GLI_9763E_MB_CMDQ_OFF))
-		if (value & GLI_9763E_MB_ERP_ON)
-			host->mmc->caps2 |= MMC_CAP2_CQE | MMC_CAP2_CQE_DCMD;
-
-	gli_pcie_enable_msi(slot);
-	host->mmc_host_ops.hs400_enhanced_strobe =
-					gl9763e_hs400_enhanced_strobe;
-	gli_set_gl9763e(slot);
-	sdhci_enable_v4_mode(host);
-
-	return 0;
-}
-
-#define REG_OFFSET_IN_BITS(reg) ((reg) << 3 & 0x18)
-
-static u16 sdhci_gli_readw(struct sdhci_host *host, int reg)
-{
-	u32 val = readl(host->ioaddr + (reg & ~3));
-	u16 word;
-
-	word = (val >> REG_OFFSET_IN_BITS(reg)) & 0xffff;
-	return word;
-}
-
-static u8 sdhci_gli_readb(struct sdhci_host *host, int reg)
-{
-	u32 val = readl(host->ioaddr + (reg & ~3));
-	u8 byte = (val >> REG_OFFSET_IN_BITS(reg)) & 0xff;
-
-	return byte;
-}
-
-static const struct sdhci_ops sdhci_gl9755_ops = {
-	.read_w			= sdhci_gli_readw,
-	.read_b			= sdhci_gli_readb,
-	.set_clock		= sdhci_gl9755_set_clock,
-	.enable_dma		= sdhci_pci_enable_dma,
-	.set_bus_width		= sdhci_set_bus_width,
-	.reset			= sdhci_reset,
-	.set_uhs_signaling	= sdhci_set_uhs_signaling,
-	.voltage_switch		= sdhci_gli_voltage_switch,
-};
-
-const struct sdhci_pci_fixes sdhci_gl9755 = {
-	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
-	.quirks2	= SDHCI_QUIRK2_BROKEN_DDR50,
-	.probe_slot	= gli_probe_slot_gl9755,
-	.ops            = &sdhci_gl9755_ops,
-#ifdef CONFIG_PM_SLEEP
-	.resume         = sdhci_pci_gli_resume,
-#endif
-};
-
-static const struct sdhci_ops sdhci_gl9750_ops = {
-	.read_w			= sdhci_gli_readw,
-	.read_b			= sdhci_gli_readb,
-	.read_l                 = sdhci_gl9750_readl,
-	.set_clock		= sdhci_gl9750_set_clock,
-	.enable_dma		= sdhci_pci_enable_dma,
-	.set_bus_width		= sdhci_set_bus_width,
-	.reset			= sdhci_gl9750_reset,
-	.set_uhs_signaling	= sdhci_set_uhs_signaling,
-	.voltage_switch		= sdhci_gli_voltage_switch,
-	.platform_execute_tuning = gl9750_execute_tuning,
-};
-
-const struct sdhci_pci_fixes sdhci_gl9750 = {
-	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
-	.quirks2	= SDHCI_QUIRK2_BROKEN_DDR50,
-	.probe_slot	= gli_probe_slot_gl9750,
-	.ops            = &sdhci_gl9750_ops,
-#ifdef CONFIG_PM_SLEEP
-	.resume         = sdhci_pci_gli_resume,
-#endif
-};
-
-static const struct sdhci_ops sdhci_gl9763e_ops = {
-	.set_clock		= sdhci_set_clock,
-	.enable_dma		= sdhci_pci_enable_dma,
-	.set_bus_width		= sdhci_set_bus_width,
-	.reset			= sdhci_gl9763e_reset,
-	.set_uhs_signaling	= sdhci_set_gl9763e_signaling,
-	.voltage_switch		= sdhci_gli_voltage_switch,
-	.irq                    = sdhci_gl9763e_cqhci_irq,
-};
-
-const struct sdhci_pci_fixes sdhci_gl9763e = {
-	.quirks		= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
-	.probe_slot	= gli_probe_slot_gl9763e,
-	.ops            = &sdhci_gl9763e_ops,
-#ifdef CONFIG_PM_SLEEP
-	.resume		= sdhci_cqhci_gli_resume,
-	.suspend	= sdhci_cqhci_gli_suspend,
-#endif
-#ifdef CONFIG_PM
-	.runtime_suspend = gl9763e_runtime_suspend,
-	.runtime_resume  = gl9763e_runtime_resume,
-	.allow_runtime_pm = true,
-#endif
-	.add_host       = gl9763e_add_host,
-};
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-o2micro.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-o2micro.c
deleted file mode 100644
index bca1d095b759..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci-o2micro.c
+++ /dev/null
@@ -1,926 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (C) 2013 BayHub Technology Ltd.
- *
- * Authors: Peter Guo <peter.guo@bayhubtech.com>
- *          Adam Lee <adam.lee@canonical.com>
- *          Ernest Zhang <ernest.zhang@bayhubtech.com>
- */
-
-#include <linux/pci.h>
-#include <linux/mmc/host.h>
-#include <linux/mmc/mmc.h>
-#include <linux/delay.h>
-#include <linux/iopoll.h>
-#include <linux/bitfield.h>
-
-#include "sdhci.h"
-#include "sdhci-pci.h"
-
-/*
- * O2Micro device registers
- */
-
-#define O2_SD_MISC_REG5		0x64
-#define O2_SD_LD0_CTRL		0x68
-#define O2_SD_DEV_CTRL		0x88
-#define O2_SD_LOCK_WP		0xD3
-#define O2_SD_TEST_REG		0xD4
-#define O2_SD_FUNC_REG0		0xDC
-#define O2_SD_MULTI_VCC3V	0xEE
-#define O2_SD_CLKREQ		0xEC
-#define O2_SD_CAPS		0xE0
-#define O2_SD_ADMA1		0xE2
-#define O2_SD_ADMA2		0xE7
-#define O2_SD_MISC_CTRL2	0xF0
-#define O2_SD_INF_MOD		0xF1
-#define O2_SD_MISC_CTRL4	0xFC
-#define O2_SD_MISC_CTRL		0x1C0
-#define O2_SD_PWR_FORCE_L0	0x0002
-#define O2_SD_TUNING_CTRL	0x300
-#define O2_SD_PLL_SETTING	0x304
-#define O2_SD_MISC_SETTING	0x308
-#define O2_SD_CLK_SETTING	0x328
-#define O2_SD_CAP_REG2		0x330
-#define O2_SD_CAP_REG0		0x334
-#define O2_SD_UHS1_CAP_SETTING	0x33C
-#define O2_SD_DELAY_CTRL	0x350
-#define O2_SD_OUTPUT_CLK_SOURCE_SWITCH	0x354
-#define O2_SD_UHS2_L1_CTRL	0x35C
-#define O2_SD_FUNC_REG3		0x3E0
-#define O2_SD_FUNC_REG4		0x3E4
-#define O2_SD_LED_ENABLE	BIT(6)
-#define O2_SD_FREG0_LEDOFF	BIT(13)
-#define O2_SD_SEL_DLL		BIT(16)
-#define O2_SD_FREG4_ENABLE_CLK_SET	BIT(22)
-#define O2_SD_PHASE_MASK	GENMASK(23, 20)
-#define O2_SD_FIX_PHASE		FIELD_PREP(O2_SD_PHASE_MASK, 0x9)
-
-#define O2_SD_VENDOR_SETTING	0x110
-#define O2_SD_VENDOR_SETTING2	0x1C8
-#define O2_SD_HW_TUNING_DISABLE	BIT(4)
-
-#define O2_PLL_DLL_WDT_CONTROL1	0x1CC
-#define  O2_PLL_FORCE_ACTIVE	BIT(18)
-#define  O2_PLL_LOCK_STATUS	BIT(14)
-#define  O2_PLL_SOFT_RESET	BIT(12)
-#define  O2_DLL_LOCK_STATUS	BIT(11)
-
-#define O2_SD_DETECT_SETTING 0x324
-
-static const u32 dmdn_table[] = {0x2B1C0000,
-	0x2C1A0000, 0x371B0000, 0x35100000};
-#define DMDN_SZ ARRAY_SIZE(dmdn_table)
-
-struct o2_host {
-	u8 dll_adjust_count;
-};
-
-static void sdhci_o2_wait_card_detect_stable(struct sdhci_host *host)
-{
-	ktime_t timeout;
-	u32 scratch32;
-
-	/* Wait max 50 ms */
-	timeout = ktime_add_ms(ktime_get(), 50);
-	while (1) {
-		bool timedout = ktime_after(ktime_get(), timeout);
-
-		scratch32 = sdhci_readl(host, SDHCI_PRESENT_STATE);
-		if ((scratch32 & SDHCI_CARD_PRESENT) >> SDHCI_CARD_PRES_SHIFT
-		    == (scratch32 & SDHCI_CD_LVL) >> SDHCI_CD_LVL_SHIFT)
-			break;
-
-		if (timedout) {
-			pr_err("%s: Card Detect debounce never finished.\n",
-			       mmc_hostname(host->mmc));
-			sdhci_dumpregs(host);
-			return;
-		}
-		udelay(10);
-	}
-}
-
-static void sdhci_o2_enable_internal_clock(struct sdhci_host *host)
-{
-	ktime_t timeout;
-	u16 scratch;
-	u32 scratch32;
-
-	/* PLL software reset */
-	scratch32 = sdhci_readl(host, O2_PLL_DLL_WDT_CONTROL1);
-	scratch32 |= O2_PLL_SOFT_RESET;
-	sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1);
-	udelay(1);
-	scratch32 &= ~(O2_PLL_SOFT_RESET);
-	sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1);
-
-	/* PLL force active */
-	scratch32 |= O2_PLL_FORCE_ACTIVE;
-	sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1);
-
-	/* Wait max 20 ms */
-	timeout = ktime_add_ms(ktime_get(), 20);
-	while (1) {
-		bool timedout = ktime_after(ktime_get(), timeout);
-
-		scratch = sdhci_readw(host, O2_PLL_DLL_WDT_CONTROL1);
-		if (scratch & O2_PLL_LOCK_STATUS)
-			break;
-		if (timedout) {
-			pr_err("%s: Internal clock never stabilised.\n",
-			       mmc_hostname(host->mmc));
-			sdhci_dumpregs(host);
-			goto out;
-		}
-		udelay(10);
-	}
-
-	/* Wait for card detect finish */
-	udelay(1);
-	sdhci_o2_wait_card_detect_stable(host);
-
-out:
-	/* Cancel PLL force active */
-	scratch32 = sdhci_readl(host, O2_PLL_DLL_WDT_CONTROL1);
-	scratch32 &= ~O2_PLL_FORCE_ACTIVE;
-	sdhci_writel(host, scratch32, O2_PLL_DLL_WDT_CONTROL1);
-}
-
-static int sdhci_o2_get_cd(struct mmc_host *mmc)
-{
-	struct sdhci_host *host = mmc_priv(mmc);
-
-	if (!(sdhci_readw(host, O2_PLL_DLL_WDT_CONTROL1) & O2_PLL_LOCK_STATUS))
-		sdhci_o2_enable_internal_clock(host);
-	else
-		sdhci_o2_wait_card_detect_stable(host);
-
-	return !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
-}
-
-static void o2_pci_set_baseclk(struct sdhci_pci_chip *chip, u32 value)
-{
-	u32 scratch_32;
-
-	pci_read_config_dword(chip->pdev,
-			      O2_SD_PLL_SETTING, &scratch_32);
-
-	scratch_32 &= 0x0000FFFF;
-	scratch_32 |= value;
-
-	pci_write_config_dword(chip->pdev,
-			       O2_SD_PLL_SETTING, scratch_32);
-}
-
-static u32 sdhci_o2_pll_dll_wdt_control(struct sdhci_host *host)
-{
-	return sdhci_readl(host, O2_PLL_DLL_WDT_CONTROL1);
-}
-
-/*
- * This function is used to detect dll lock status.
- * Since the dll lock status bit will toggle randomly
- * with very short interval which needs to be polled
- * as fast as possible. Set sleep_us as 1 microsecond.
- */
-static int sdhci_o2_wait_dll_detect_lock(struct sdhci_host *host)
-{
-	u32	scratch32 = 0;
-
-	return readx_poll_timeout(sdhci_o2_pll_dll_wdt_control, host,
-		scratch32, !(scratch32 & O2_DLL_LOCK_STATUS), 1, 1000000);
-}
-
-static void sdhci_o2_set_tuning_mode(struct sdhci_host *host)
-{
-	u16 reg;
-
-	/* enable hardware tuning */
-	reg = sdhci_readw(host, O2_SD_VENDOR_SETTING);
-	reg &= ~O2_SD_HW_TUNING_DISABLE;
-	sdhci_writew(host, reg, O2_SD_VENDOR_SETTING);
-}
-
-static void __sdhci_o2_execute_tuning(struct sdhci_host *host, u32 opcode)
-{
-	int i;
-
-	sdhci_send_tuning(host, opcode);
-
-	for (i = 0; i < 150; i++) {
-		u16 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
-
-		if (!(ctrl & SDHCI_CTRL_EXEC_TUNING)) {
-			if (ctrl & SDHCI_CTRL_TUNED_CLK) {
-				host->tuning_done = true;
-				return;
-			}
-			pr_warn("%s: HW tuning failed !\n",
-				mmc_hostname(host->mmc));
-			break;
-		}
-
-		mdelay(1);
-	}
-
-	pr_info("%s: Tuning failed, falling back to fixed sampling clock\n",
-		mmc_hostname(host->mmc));
-	sdhci_reset_tuning(host);
-}
-
-/*
- * This function is used to fix o2 dll shift issue.
- * It isn't necessary to detect card present before recovery.
- * Firstly, it is used by bht emmc card, which is embedded.
- * Second, before call recovery card present will be detected
- * outside of the execute tuning function.
- */
-static int sdhci_o2_dll_recovery(struct sdhci_host *host)
-{
-	int ret = 0;
-	u8 scratch_8 = 0;
-	u32 scratch_32 = 0;
-	struct sdhci_pci_slot *slot = sdhci_priv(host);
-	struct sdhci_pci_chip *chip = slot->chip;
-	struct o2_host *o2_host = sdhci_pci_priv(slot);
-
-	/* UnLock WP */
-	pci_read_config_byte(chip->pdev,
-			O2_SD_LOCK_WP, &scratch_8);
-	scratch_8 &= 0x7f;
-	pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
-	while (o2_host->dll_adjust_count < DMDN_SZ && !ret) {
-		/* Disable clock */
-		sdhci_writeb(host, 0, SDHCI_CLOCK_CONTROL);
-
-		/* PLL software reset */
-		scratch_32 = sdhci_readl(host, O2_PLL_DLL_WDT_CONTROL1);
-		scratch_32 |= O2_PLL_SOFT_RESET;
-		sdhci_writel(host, scratch_32, O2_PLL_DLL_WDT_CONTROL1);
-
-		pci_read_config_dword(chip->pdev,
-					    O2_SD_FUNC_REG4,
-					    &scratch_32);
-		/* Enable Base Clk setting change */
-		scratch_32 |= O2_SD_FREG4_ENABLE_CLK_SET;
-		pci_write_config_dword(chip->pdev, O2_SD_FUNC_REG4, scratch_32);
-		o2_pci_set_baseclk(chip, dmdn_table[o2_host->dll_adjust_count]);
-
-		/* Enable internal clock */
-		scratch_8 = SDHCI_CLOCK_INT_EN;
-		sdhci_writeb(host, scratch_8, SDHCI_CLOCK_CONTROL);
-
-		if (sdhci_o2_get_cd(host->mmc)) {
-			/*
-			 * need wait at least 5ms for dll status stable,
-			 * after enable internal clock
-			 */
-			usleep_range(5000, 6000);
-			if (sdhci_o2_wait_dll_detect_lock(host)) {
-				scratch_8 |= SDHCI_CLOCK_CARD_EN;
-				sdhci_writeb(host, scratch_8,
-					SDHCI_CLOCK_CONTROL);
-				ret = 1;
-			} else {
-				pr_warn("%s: DLL unlocked when dll_adjust_count is %d.\n",
-					mmc_hostname(host->mmc),
-					o2_host->dll_adjust_count);
-			}
-		} else {
-			pr_err("%s: card present detect failed.\n",
-				mmc_hostname(host->mmc));
-			break;
-		}
-
-		o2_host->dll_adjust_count++;
-	}
-	if (!ret && o2_host->dll_adjust_count == DMDN_SZ)
-		pr_err("%s: DLL adjust over max times\n",
-		mmc_hostname(host->mmc));
-	/* Lock WP */
-	pci_read_config_byte(chip->pdev,
-				   O2_SD_LOCK_WP, &scratch_8);
-	scratch_8 |= 0x80;
-	pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
-	return ret;
-}
-
-static int sdhci_o2_execute_tuning(struct mmc_host *mmc, u32 opcode)
-{
-	struct sdhci_host *host = mmc_priv(mmc);
-	struct sdhci_pci_slot *slot = sdhci_priv(host);
-	struct sdhci_pci_chip *chip = slot->chip;
-	int current_bus_width = 0;
-	u32 scratch32 = 0;
-	u16 scratch = 0;
-	u8  scratch_8 = 0;
-	u32 reg_val;
-
-	/*
-	 * This handler implements the hardware tuning that is specific to
-	 * this controller.  Fall back to the standard method for other TIMING.
-	 */
-	if ((host->timing != MMC_TIMING_MMC_HS200) &&
-		(host->timing != MMC_TIMING_UHS_SDR104) &&
-		(host->timing != MMC_TIMING_UHS_SDR50))
-		return sdhci_execute_tuning(mmc, opcode);
-
-	if (WARN_ON((opcode != MMC_SEND_TUNING_BLOCK_HS200) &&
-			(opcode != MMC_SEND_TUNING_BLOCK)))
-		return -EINVAL;
-
-	/* Force power mode enter L0 */
-	scratch = sdhci_readw(host, O2_SD_MISC_CTRL);
-	scratch |= O2_SD_PWR_FORCE_L0;
-	sdhci_writew(host, scratch, O2_SD_MISC_CTRL);
-
-	/* Stop clk */
-	reg_val = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
-	reg_val &= ~SDHCI_CLOCK_CARD_EN;
-	sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL);
-
-	/* UnLock WP */
-	pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);
-	scratch_8 &= 0x7f;
-	pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
-
-	/* Set pcr 0x354[16] to choose dll clock, and set the default phase */
-	pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &reg_val);
-	reg_val &= ~(O2_SD_SEL_DLL | O2_SD_PHASE_MASK);
-	reg_val |= (O2_SD_SEL_DLL | O2_SD_FIX_PHASE);
-	pci_write_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, reg_val);
-
-	/* Lock WP */
-	pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch_8);
-	scratch_8 |= 0x80;
-	pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch_8);
-
-	/* Start clk */
-	reg_val = sdhci_readw(host, SDHCI_CLOCK_CONTROL);
-	reg_val |= SDHCI_CLOCK_CARD_EN;
-	sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL);
-
-	/* wait DLL lock, timeout value 5ms */
-	if (readx_poll_timeout(sdhci_o2_pll_dll_wdt_control, host,
-		scratch32, (scratch32 & O2_DLL_LOCK_STATUS), 1, 5000))
-		pr_warn("%s: DLL can't lock in 5ms after force L0 during tuning.\n",
-				mmc_hostname(host->mmc));
-	/*
-	 * Judge the tuning reason, whether caused by dll shift
-	 * If cause by dll shift, should call sdhci_o2_dll_recovery
-	 */
-	if (!sdhci_o2_wait_dll_detect_lock(host))
-		if (!sdhci_o2_dll_recovery(host)) {
-			pr_err("%s: o2 dll recovery failed\n",
-				mmc_hostname(host->mmc));
-			return -EINVAL;
-		}
-	/*
-	 * o2 sdhci host didn't support 8bit emmc tuning
-	 */
-	if (mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
-		current_bus_width = mmc->ios.bus_width;
-		mmc->ios.bus_width = MMC_BUS_WIDTH_4;
-		sdhci_set_bus_width(host, MMC_BUS_WIDTH_4);
-	}
-
-	sdhci_o2_set_tuning_mode(host);
-
-	sdhci_start_tuning(host);
-
-	__sdhci_o2_execute_tuning(host, opcode);
-
-	sdhci_end_tuning(host);
-
-	if (current_bus_width == MMC_BUS_WIDTH_8) {
-		mmc->ios.bus_width = MMC_BUS_WIDTH_8;
-		sdhci_set_bus_width(host, current_bus_width);
-	}
-
-	/* Cancel force power mode enter L0 */
-	scratch = sdhci_readw(host, O2_SD_MISC_CTRL);
-	scratch &= ~(O2_SD_PWR_FORCE_L0);
-	sdhci_writew(host, scratch, O2_SD_MISC_CTRL);
-
-	sdhci_reset(host, SDHCI_RESET_CMD);
-	sdhci_reset(host, SDHCI_RESET_DATA);
-
-	host->flags &= ~SDHCI_HS400_TUNING;
-	return 0;
-}
-
-static void o2_pci_led_enable(struct sdhci_pci_chip *chip)
-{
-	int ret;
-	u32 scratch_32;
-
-	/* Set led of SD host function enable */
-	ret = pci_read_config_dword(chip->pdev,
-				    O2_SD_FUNC_REG0, &scratch_32);
-	if (ret)
-		return;
-
-	scratch_32 &= ~O2_SD_FREG0_LEDOFF;
-	pci_write_config_dword(chip->pdev,
-			       O2_SD_FUNC_REG0, scratch_32);
-
-	ret = pci_read_config_dword(chip->pdev,
-				    O2_SD_TEST_REG, &scratch_32);
-	if (ret)
-		return;
-
-	scratch_32 |= O2_SD_LED_ENABLE;
-	pci_write_config_dword(chip->pdev,
-			       O2_SD_TEST_REG, scratch_32);
-}
-
-static void sdhci_pci_o2_fujin2_pci_init(struct sdhci_pci_chip *chip)
-{
-	u32 scratch_32;
-	int ret;
-	/* Improve write performance for SD3.0 */
-	ret = pci_read_config_dword(chip->pdev, O2_SD_DEV_CTRL, &scratch_32);
-	if (ret)
-		return;
-	scratch_32 &= ~((1 << 12) | (1 << 13) | (1 << 14));
-	pci_write_config_dword(chip->pdev, O2_SD_DEV_CTRL, scratch_32);
-
-	/* Enable Link abnormal reset generating Reset */
-	ret = pci_read_config_dword(chip->pdev, O2_SD_MISC_REG5, &scratch_32);
-	if (ret)
-		return;
-	scratch_32 &= ~((1 << 19) | (1 << 11));
-	scratch_32 |= (1 << 10);
-	pci_write_config_dword(chip->pdev, O2_SD_MISC_REG5, scratch_32);
-
-	/* set card power over current protection */
-	ret = pci_read_config_dword(chip->pdev, O2_SD_TEST_REG, &scratch_32);
-	if (ret)
-		return;
-	scratch_32 |= (1 << 4);
-	pci_write_config_dword(chip->pdev, O2_SD_TEST_REG, scratch_32);
-
-	/* adjust the output delay for SD mode */
-	pci_write_config_dword(chip->pdev, O2_SD_DELAY_CTRL, 0x00002492);
-
-	/* Set the output voltage setting of Aux 1.2v LDO */
-	ret = pci_read_config_dword(chip->pdev, O2_SD_LD0_CTRL, &scratch_32);
-	if (ret)
-		return;
-	scratch_32 &= ~(3 << 12);
-	pci_write_config_dword(chip->pdev, O2_SD_LD0_CTRL, scratch_32);
-
-	/* Set Max power supply capability of SD host */
-	ret = pci_read_config_dword(chip->pdev, O2_SD_CAP_REG0, &scratch_32);
-	if (ret)
-		return;
-	scratch_32 &= ~(0x01FE);
-	scratch_32 |= 0x00CC;
-	pci_write_config_dword(chip->pdev, O2_SD_CAP_REG0, scratch_32);
-	/* Set DLL Tuning Window */
-	ret = pci_read_config_dword(chip->pdev,
-				    O2_SD_TUNING_CTRL, &scratch_32);
-	if (ret)
-		return;
-	scratch_32 &= ~(0x000000FF);
-	scratch_32 |= 0x00000066;
-	pci_write_config_dword(chip->pdev, O2_SD_TUNING_CTRL, scratch_32);
-
-	/* Set UHS2 T_EIDLE */
-	ret = pci_read_config_dword(chip->pdev,
-				    O2_SD_UHS2_L1_CTRL, &scratch_32);
-	if (ret)
-		return;
-	scratch_32 &= ~(0x000000FC);
-	scratch_32 |= 0x00000084;
-	pci_write_config_dword(chip->pdev, O2_SD_UHS2_L1_CTRL, scratch_32);
-
-	/* Set UHS2 Termination */
-	ret = pci_read_config_dword(chip->pdev, O2_SD_FUNC_REG3, &scratch_32);
-	if (ret)
-		return;
-	scratch_32 &= ~((1 << 21) | (1 << 30));
-
-	pci_write_config_dword(chip->pdev, O2_SD_FUNC_REG3, scratch_32);
-
-	/* Set L1 Entrance Timer */
-	ret = pci_read_config_dword(chip->pdev, O2_SD_CAPS, &scratch_32);
-	if (ret)
-		return;
-	scratch_32 &= ~(0xf0000000);
-	scratch_32 |= 0x30000000;
-	pci_write_config_dword(chip->pdev, O2_SD_CAPS, scratch_32);
-
-	ret = pci_read_config_dword(chip->pdev,
-				    O2_SD_MISC_CTRL4, &scratch_32);
-	if (ret)
-		return;
-	scratch_32 &= ~(0x000f0000);
-	scratch_32 |= 0x00080000;
-	pci_write_config_dword(chip->pdev, O2_SD_MISC_CTRL4, scratch_32);
-}
-
-static void sdhci_pci_o2_enable_msi(struct sdhci_pci_chip *chip,
-				    struct sdhci_host *host)
-{
-	int ret;
-
-	ret = pci_find_capability(chip->pdev, PCI_CAP_ID_MSI);
-	if (!ret) {
-		pr_info("%s: unsupported MSI, use INTx irq\n",
-			mmc_hostname(host->mmc));
-		return;
-	}
-
-	ret = pci_alloc_irq_vectors(chip->pdev, 1, 1,
-				    PCI_IRQ_MSI | PCI_IRQ_MSIX);
-	if (ret < 0) {
-		pr_err("%s: enable PCI MSI failed, err=%d\n",
-		       mmc_hostname(host->mmc), ret);
-		return;
-	}
-
-	host->irq = pci_irq_vector(chip->pdev, 0);
-}
-
-static void sdhci_o2_enable_clk(struct sdhci_host *host, u16 clk)
-{
-	/* Enable internal clock */
-	clk |= SDHCI_CLOCK_INT_EN;
-	sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
-
-	sdhci_o2_enable_internal_clock(host);
-	if (sdhci_o2_get_cd(host->mmc)) {
-		clk |= SDHCI_CLOCK_CARD_EN;
-		sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
-	}
-}
-
-static void sdhci_pci_o2_set_clock(struct sdhci_host *host, unsigned int clock)
-{
-	u16 clk;
-	u8 scratch;
-	u32 scratch_32;
-	struct sdhci_pci_slot *slot = sdhci_priv(host);
-	struct sdhci_pci_chip *chip = slot->chip;
-
-	host->mmc->actual_clock = 0;
-
-	sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
-
-	if (clock == 0)
-		return;
-
-	/* UnLock WP */
-	pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
-	scratch &= 0x7f;
-	pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
-
-	if ((host->timing == MMC_TIMING_UHS_SDR104) && (clock == 200000000)) {
-		pci_read_config_dword(chip->pdev, O2_SD_PLL_SETTING, &scratch_32);
-
-		if ((scratch_32 & 0xFFFF0000) != 0x2c280000)
-			o2_pci_set_baseclk(chip, 0x2c280000);
-	} else {
-		pci_read_config_dword(chip->pdev, O2_SD_PLL_SETTING, &scratch_32);
-
-		if ((scratch_32 & 0xFFFF0000) != 0x25100000)
-			o2_pci_set_baseclk(chip, 0x25100000);
-	}
-
-	pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &scratch_32);
-	scratch_32 &= ~(O2_SD_SEL_DLL | O2_SD_PHASE_MASK);
-	pci_write_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, scratch_32);
-
-	/* Lock WP */
-	pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
-	scratch |= 0x80;
-	pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
-
-	clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock);
-	sdhci_o2_enable_clk(host, clk);
-}
-
-static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot)
-{
-	struct sdhci_pci_chip *chip;
-	struct sdhci_host *host;
-	struct o2_host *o2_host = sdhci_pci_priv(slot);
-	u32 reg, caps;
-	int ret;
-
-	chip = slot->chip;
-	host = slot->host;
-
-	o2_host->dll_adjust_count = 0;
-	caps = sdhci_readl(host, SDHCI_CAPABILITIES);
-
-	/*
-	 * mmc_select_bus_width() will test the bus to determine the actual bus
-	 * width.
-	 */
-	if (caps & SDHCI_CAN_DO_8BIT)
-		host->mmc->caps |= MMC_CAP_8_BIT_DATA;
-
-	switch (chip->pdev->device) {
-	case PCI_DEVICE_ID_O2_SDS0:
-	case PCI_DEVICE_ID_O2_SEABIRD0:
-	case PCI_DEVICE_ID_O2_SEABIRD1:
-	case PCI_DEVICE_ID_O2_SDS1:
-	case PCI_DEVICE_ID_O2_FUJIN2:
-		reg = sdhci_readl(host, O2_SD_VENDOR_SETTING);
-		if (reg & 0x1)
-			host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
-
-		host->quirks2 |= SDHCI_QUIRK2_BROKEN_DDR50;
-
-		sdhci_pci_o2_enable_msi(chip, host);
-
-		if (chip->pdev->device == PCI_DEVICE_ID_O2_SEABIRD0) {
-			ret = pci_read_config_dword(chip->pdev,
-						    O2_SD_MISC_SETTING, &reg);
-			if (ret)
-				return -EIO;
-			if (reg & (1 << 4)) {
-				pr_info("%s: emmc 1.8v flag is set, force 1.8v signaling voltage\n",
-					mmc_hostname(host->mmc));
-				host->flags &= ~SDHCI_SIGNALING_330;
-				host->flags |= SDHCI_SIGNALING_180;
-				host->mmc->caps2 |= MMC_CAP2_NO_SD;
-				host->mmc->caps2 |= MMC_CAP2_NO_SDIO;
-				pci_write_config_dword(chip->pdev,
-						       O2_SD_DETECT_SETTING, 3);
-			}
-
-			slot->host->mmc_host_ops.get_cd = sdhci_o2_get_cd;
-		}
-
-		if (chip->pdev->device == PCI_DEVICE_ID_O2_SEABIRD1) {
-			slot->host->mmc_host_ops.get_cd = sdhci_o2_get_cd;
-			host->mmc->caps2 |= MMC_CAP2_NO_SDIO;
-			host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
-		}
-
-		host->mmc_host_ops.execute_tuning = sdhci_o2_execute_tuning;
-
-		if (chip->pdev->device != PCI_DEVICE_ID_O2_FUJIN2)
-			break;
-		/* set dll watch dog timer */
-		reg = sdhci_readl(host, O2_SD_VENDOR_SETTING2);
-		reg |= (1 << 12);
-		sdhci_writel(host, reg, O2_SD_VENDOR_SETTING2);
-
-		break;
-	default:
-		break;
-	}
-
-	return 0;
-}
-
-static int sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
-{
-	int ret;
-	u8 scratch;
-	u32 scratch_32;
-
-	switch (chip->pdev->device) {
-	case PCI_DEVICE_ID_O2_8220:
-	case PCI_DEVICE_ID_O2_8221:
-	case PCI_DEVICE_ID_O2_8320:
-	case PCI_DEVICE_ID_O2_8321:
-		/* This extra setup is required due to broken ADMA. */
-		ret = pci_read_config_byte(chip->pdev,
-				O2_SD_LOCK_WP, &scratch);
-		if (ret)
-			return ret;
-		scratch &= 0x7f;
-		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
-
-		/* Set Multi 3 to VCC3V# */
-		pci_write_config_byte(chip->pdev, O2_SD_MULTI_VCC3V, 0x08);
-
-		/* Disable CLK_REQ# support after media DET */
-		ret = pci_read_config_byte(chip->pdev,
-				O2_SD_CLKREQ, &scratch);
-		if (ret)
-			return ret;
-		scratch |= 0x20;
-		pci_write_config_byte(chip->pdev, O2_SD_CLKREQ, scratch);
-
-		/* Choose capabilities, enable SDMA.  We have to write 0x01
-		 * to the capabilities register first to unlock it.
-		 */
-		ret = pci_read_config_byte(chip->pdev, O2_SD_CAPS, &scratch);
-		if (ret)
-			return ret;
-		scratch |= 0x01;
-		pci_write_config_byte(chip->pdev, O2_SD_CAPS, scratch);
-		pci_write_config_byte(chip->pdev, O2_SD_CAPS, 0x73);
-
-		/* Disable ADMA1/2 */
-		pci_write_config_byte(chip->pdev, O2_SD_ADMA1, 0x39);
-		pci_write_config_byte(chip->pdev, O2_SD_ADMA2, 0x08);
-
-		/* Disable the infinite transfer mode */
-		ret = pci_read_config_byte(chip->pdev,
-				O2_SD_INF_MOD, &scratch);
-		if (ret)
-			return ret;
-		scratch |= 0x08;
-		pci_write_config_byte(chip->pdev, O2_SD_INF_MOD, scratch);
-
-		/* Lock WP */
-		ret = pci_read_config_byte(chip->pdev,
-				O2_SD_LOCK_WP, &scratch);
-		if (ret)
-			return ret;
-		scratch |= 0x80;
-		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
-		break;
-	case PCI_DEVICE_ID_O2_SDS0:
-	case PCI_DEVICE_ID_O2_SDS1:
-	case PCI_DEVICE_ID_O2_FUJIN2:
-		/* UnLock WP */
-		ret = pci_read_config_byte(chip->pdev,
-				O2_SD_LOCK_WP, &scratch);
-		if (ret)
-			return ret;
-
-		scratch &= 0x7f;
-		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
-
-		/* DevId=8520 subId= 0x11 or 0x12  Type Chip support */
-		if (chip->pdev->device == PCI_DEVICE_ID_O2_FUJIN2) {
-			ret = pci_read_config_dword(chip->pdev,
-						    O2_SD_FUNC_REG0,
-						    &scratch_32);
-			if (ret)
-				return ret;
-			scratch_32 = ((scratch_32 & 0xFF000000) >> 24);
-
-			/* Check Whether subId is 0x11 or 0x12 */
-			if ((scratch_32 == 0x11) || (scratch_32 == 0x12)) {
-				scratch_32 = 0x25100000;
-
-				o2_pci_set_baseclk(chip, scratch_32);
-				ret = pci_read_config_dword(chip->pdev,
-							    O2_SD_FUNC_REG4,
-							    &scratch_32);
-				if (ret)
-					return ret;
-
-				/* Enable Base Clk setting change */
-				scratch_32 |= O2_SD_FREG4_ENABLE_CLK_SET;
-				pci_write_config_dword(chip->pdev,
-						       O2_SD_FUNC_REG4,
-						       scratch_32);
-
-				/* Set Tuning Window to 4 */
-				pci_write_config_byte(chip->pdev,
-						      O2_SD_TUNING_CTRL, 0x44);
-
-				break;
-			}
-		}
-
-		/* Enable 8520 led function */
-		o2_pci_led_enable(chip);
-
-		/* Set timeout CLK */
-		ret = pci_read_config_dword(chip->pdev,
-					    O2_SD_CLK_SETTING, &scratch_32);
-		if (ret)
-			return ret;
-
-		scratch_32 &= ~(0xFF00);
-		scratch_32 |= 0x07E0C800;
-		pci_write_config_dword(chip->pdev,
-				       O2_SD_CLK_SETTING, scratch_32);
-
-		ret = pci_read_config_dword(chip->pdev,
-					    O2_SD_CLKREQ, &scratch_32);
-		if (ret)
-			return ret;
-		scratch_32 |= 0x3;
-		pci_write_config_dword(chip->pdev, O2_SD_CLKREQ, scratch_32);
-
-		ret = pci_read_config_dword(chip->pdev,
-					    O2_SD_PLL_SETTING, &scratch_32);
-		if (ret)
-			return ret;
-
-		scratch_32 &= ~(0x1F3F070E);
-		scratch_32 |= 0x18270106;
-		pci_write_config_dword(chip->pdev,
-				       O2_SD_PLL_SETTING, scratch_32);
-
-		/* Disable UHS1 funciton */
-		ret = pci_read_config_dword(chip->pdev,
-					    O2_SD_CAP_REG2, &scratch_32);
-		if (ret)
-			return ret;
-		scratch_32 &= ~(0xE0);
-		pci_write_config_dword(chip->pdev,
-				       O2_SD_CAP_REG2, scratch_32);
-
-		if (chip->pdev->device == PCI_DEVICE_ID_O2_FUJIN2)
-			sdhci_pci_o2_fujin2_pci_init(chip);
-
-		/* Lock WP */
-		ret = pci_read_config_byte(chip->pdev,
-					   O2_SD_LOCK_WP, &scratch);
-		if (ret)
-			return ret;
-		scratch |= 0x80;
-		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
-		break;
-	case PCI_DEVICE_ID_O2_SEABIRD0:
-	case PCI_DEVICE_ID_O2_SEABIRD1:
-		/* UnLock WP */
-		ret = pci_read_config_byte(chip->pdev,
-				O2_SD_LOCK_WP, &scratch);
-		if (ret)
-			return ret;
-
-		scratch &= 0x7f;
-		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
-
-		ret = pci_read_config_dword(chip->pdev,
-					    O2_SD_PLL_SETTING, &scratch_32);
-		if (ret)
-			return ret;
-
-		if ((scratch_32 & 0xff000000) == 0x01000000) {
-			scratch_32 &= 0x0000FFFF;
-			scratch_32 |= 0x1F340000;
-
-			pci_write_config_dword(chip->pdev,
-					       O2_SD_PLL_SETTING, scratch_32);
-		} else {
-			scratch_32 &= 0x0000FFFF;
-			scratch_32 |= 0x25100000;
-
-			pci_write_config_dword(chip->pdev,
-					       O2_SD_PLL_SETTING, scratch_32);
-
-			ret = pci_read_config_dword(chip->pdev,
-						    O2_SD_FUNC_REG4,
-						    &scratch_32);
-			if (ret)
-				return ret;
-			scratch_32 |= (1 << 22);
-			pci_write_config_dword(chip->pdev,
-					       O2_SD_FUNC_REG4, scratch_32);
-		}
-
-		/* Set Tuning Windows to 5 */
-		pci_write_config_byte(chip->pdev,
-				O2_SD_TUNING_CTRL, 0x55);
-		//Adjust 1st and 2nd CD debounce time
-		pci_read_config_dword(chip->pdev, O2_SD_MISC_CTRL2, &scratch_32);
-		scratch_32 &= 0xFFE7FFFF;
-		scratch_32 |= 0x00180000;
-		pci_write_config_dword(chip->pdev, O2_SD_MISC_CTRL2, scratch_32);
-		pci_write_config_dword(chip->pdev, O2_SD_DETECT_SETTING, 1);
-		/* Lock WP */
-		ret = pci_read_config_byte(chip->pdev,
-					   O2_SD_LOCK_WP, &scratch);
-		if (ret)
-			return ret;
-		scratch |= 0x80;
-		pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
-		break;
-	}
-
-	return 0;
-}
-
-#ifdef CONFIG_PM_SLEEP
-static int sdhci_pci_o2_resume(struct sdhci_pci_chip *chip)
-{
-	sdhci_pci_o2_probe(chip);
-	return sdhci_pci_resume_host(chip);
-}
-#endif
-
-static const struct sdhci_ops sdhci_pci_o2_ops = {
-	.set_clock = sdhci_pci_o2_set_clock,
-	.enable_dma = sdhci_pci_enable_dma,
-	.set_bus_width = sdhci_set_bus_width,
-	.reset = sdhci_reset,
-	.set_uhs_signaling = sdhci_set_uhs_signaling,
-};
-
-const struct sdhci_pci_fixes sdhci_o2 = {
-	.probe = sdhci_pci_o2_probe,
-	.quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
-	.quirks2 = SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD,
-	.probe_slot = sdhci_pci_o2_probe_slot,
-#ifdef CONFIG_PM_SLEEP
-	.resume = sdhci_pci_o2_resume,
-#endif
-	.ops = &sdhci_pci_o2_ops,
-	.priv_size = sizeof(struct o2_host),
-};
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci.h
deleted file mode 100644
index 3661a224fb04..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci-pci.h
+++ /dev/null
@@ -1,199 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __SDHCI_PCI_H
-#define __SDHCI_PCI_H
-
-/*
- * PCI device IDs, sub IDs
- */
-
-#define PCI_DEVICE_ID_O2_SDS0		0x8420
-#define PCI_DEVICE_ID_O2_SDS1		0x8421
-#define PCI_DEVICE_ID_O2_FUJIN2		0x8520
-#define PCI_DEVICE_ID_O2_SEABIRD0	0x8620
-#define PCI_DEVICE_ID_O2_SEABIRD1	0x8621
-
-#define PCI_DEVICE_ID_INTEL_PCH_SDIO0	0x8809
-#define PCI_DEVICE_ID_INTEL_PCH_SDIO1	0x880a
-#define PCI_DEVICE_ID_INTEL_BYT_EMMC	0x0f14
-#define PCI_DEVICE_ID_INTEL_BYT_SDIO	0x0f15
-#define PCI_DEVICE_ID_INTEL_BYT_SD	0x0f16
-#define PCI_DEVICE_ID_INTEL_BYT_EMMC2	0x0f50
-#define PCI_DEVICE_ID_INTEL_BSW_EMMC	0x2294
-#define PCI_DEVICE_ID_INTEL_BSW_SDIO	0x2295
-#define PCI_DEVICE_ID_INTEL_BSW_SD	0x2296
-#define PCI_DEVICE_ID_INTEL_MRFLD_MMC	0x1190
-#define PCI_DEVICE_ID_INTEL_CLV_SDIO0	0x08f9
-#define PCI_DEVICE_ID_INTEL_CLV_SDIO1	0x08fa
-#define PCI_DEVICE_ID_INTEL_CLV_SDIO2	0x08fb
-#define PCI_DEVICE_ID_INTEL_CLV_EMMC0	0x08e5
-#define PCI_DEVICE_ID_INTEL_CLV_EMMC1	0x08e6
-#define PCI_DEVICE_ID_INTEL_QRK_SD	0x08A7
-#define PCI_DEVICE_ID_INTEL_SPT_EMMC	0x9d2b
-#define PCI_DEVICE_ID_INTEL_SPT_SDIO	0x9d2c
-#define PCI_DEVICE_ID_INTEL_SPT_SD	0x9d2d
-#define PCI_DEVICE_ID_INTEL_DNV_EMMC	0x19db
-#define PCI_DEVICE_ID_INTEL_CDF_EMMC	0x18db
-#define PCI_DEVICE_ID_INTEL_BXT_SD	0x0aca
-#define PCI_DEVICE_ID_INTEL_BXT_EMMC	0x0acc
-#define PCI_DEVICE_ID_INTEL_BXT_SDIO	0x0ad0
-#define PCI_DEVICE_ID_INTEL_BXTM_SD	0x1aca
-#define PCI_DEVICE_ID_INTEL_BXTM_EMMC	0x1acc
-#define PCI_DEVICE_ID_INTEL_BXTM_SDIO	0x1ad0
-#define PCI_DEVICE_ID_INTEL_APL_SD	0x5aca
-#define PCI_DEVICE_ID_INTEL_APL_EMMC	0x5acc
-#define PCI_DEVICE_ID_INTEL_APL_SDIO	0x5ad0
-#define PCI_DEVICE_ID_INTEL_GLK_SD	0x31ca
-#define PCI_DEVICE_ID_INTEL_GLK_EMMC	0x31cc
-#define PCI_DEVICE_ID_INTEL_GLK_SDIO	0x31d0
-#define PCI_DEVICE_ID_INTEL_CNP_EMMC	0x9dc4
-#define PCI_DEVICE_ID_INTEL_CNP_SD	0x9df5
-#define PCI_DEVICE_ID_INTEL_CNPH_SD	0xa375
-#define PCI_DEVICE_ID_INTEL_ICP_EMMC	0x34c4
-#define PCI_DEVICE_ID_INTEL_ICP_SD	0x34f8
-#define PCI_DEVICE_ID_INTEL_EHL_EMMC	0x4b47
-#define PCI_DEVICE_ID_INTEL_EHL_SD	0x4b48
-#define PCI_DEVICE_ID_INTEL_CML_EMMC	0x02c4
-#define PCI_DEVICE_ID_INTEL_CML_SD	0x02f5
-#define PCI_DEVICE_ID_INTEL_CMLH_SD	0x06f5
-#define PCI_DEVICE_ID_INTEL_JSL_EMMC	0x4dc4
-#define PCI_DEVICE_ID_INTEL_JSL_SD	0x4df8
-#define PCI_DEVICE_ID_INTEL_LKF_EMMC	0x98c4
-#define PCI_DEVICE_ID_INTEL_LKF_SD	0x98f8
-#define PCI_DEVICE_ID_INTEL_ADL_EMMC	0x54c4
-
-#define PCI_DEVICE_ID_SYSKONNECT_8000	0x8000
-#define PCI_DEVICE_ID_VIA_95D0		0x95d0
-#define PCI_DEVICE_ID_REALTEK_5250	0x5250
-
-#define PCI_SUBDEVICE_ID_NI_7884	0x7884
-#define PCI_SUBDEVICE_ID_NI_78E3	0x78e3
-
-#define PCI_VENDOR_ID_ARASAN		0x16e6
-#define PCI_DEVICE_ID_ARASAN_PHY_EMMC	0x0670
-
-#define PCI_DEVICE_ID_SYNOPSYS_DWC_MSHC 0xc202
-
-#define PCI_DEVICE_ID_GLI_9755		0x9755
-#define PCI_DEVICE_ID_GLI_9750		0x9750
-#define PCI_DEVICE_ID_GLI_9763E		0xe763
-
-/*
- * PCI device class and mask
- */
-
-#define SYSTEM_SDHCI			(PCI_CLASS_SYSTEM_SDHCI << 8)
-#define PCI_CLASS_MASK			0xFFFF00
-
-/*
- * Macros for PCI device-description
- */
-
-#define _PCI_VEND(vend) PCI_VENDOR_ID_##vend
-#define _PCI_DEV(vend, dev) PCI_DEVICE_ID_##vend##_##dev
-#define _PCI_SUBDEV(subvend, subdev) PCI_SUBDEVICE_ID_##subvend##_##subdev
-
-#define SDHCI_PCI_DEVICE(vend, dev, cfg) { \
-	.vendor = _PCI_VEND(vend), .device = _PCI_DEV(vend, dev), \
-	.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \
-	.driver_data = (kernel_ulong_t)&(sdhci_##cfg) \
-}
-
-#define SDHCI_PCI_SUBDEVICE(vend, dev, subvend, subdev, cfg) { \
-	.vendor = _PCI_VEND(vend), .device = _PCI_DEV(vend, dev), \
-	.subvendor = _PCI_VEND(subvend), \
-	.subdevice = _PCI_SUBDEV(subvend, subdev), \
-	.driver_data = (kernel_ulong_t)&(sdhci_##cfg) \
-}
-
-#define SDHCI_PCI_DEVICE_CLASS(vend, cl, cl_msk, cfg) { \
-	.vendor = _PCI_VEND(vend), .device = PCI_ANY_ID, \
-	.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \
-	.class = (cl), .class_mask = (cl_msk), \
-	.driver_data = (kernel_ulong_t)&(sdhci_##cfg) \
-}
-
-/*
- * PCI registers
- */
-
-#define PCI_SDHCI_IFPIO			0x00
-#define PCI_SDHCI_IFDMA			0x01
-#define PCI_SDHCI_IFVENDOR		0x02
-
-#define PCI_SLOT_INFO			0x40	/* 8 bits */
-#define  PCI_SLOT_INFO_SLOTS(x)		((x >> 4) & 7)
-#define  PCI_SLOT_INFO_FIRST_BAR_MASK	0x07
-
-#define MAX_SLOTS			8
-
-struct sdhci_pci_chip;
-struct sdhci_pci_slot;
-
-struct sdhci_pci_fixes {
-	unsigned int		quirks;
-	unsigned int		quirks2;
-	bool			allow_runtime_pm;
-	bool			own_cd_for_runtime_pm;
-
-	int			(*probe) (struct sdhci_pci_chip *);
-
-	int			(*probe_slot) (struct sdhci_pci_slot *);
-	int			(*add_host) (struct sdhci_pci_slot *);
-	void			(*remove_slot) (struct sdhci_pci_slot *, int);
-
-#ifdef CONFIG_PM_SLEEP
-	int			(*suspend) (struct sdhci_pci_chip *);
-	int			(*resume) (struct sdhci_pci_chip *);
-#endif
-#ifdef CONFIG_PM
-	int			(*runtime_suspend) (struct sdhci_pci_chip *);
-	int			(*runtime_resume) (struct sdhci_pci_chip *);
-#endif
-
-	const struct sdhci_ops	*ops;
-	size_t			priv_size;
-};
-
-struct sdhci_pci_slot {
-	struct sdhci_pci_chip	*chip;
-	struct sdhci_host	*host;
-
-	int			cd_idx;
-	bool			cd_override_level;
-
-	void (*hw_reset)(struct sdhci_host *host);
-	unsigned long		private[] ____cacheline_aligned;
-};
-
-struct sdhci_pci_chip {
-	struct pci_dev		*pdev;
-
-	unsigned int		quirks;
-	unsigned int		quirks2;
-	bool			allow_runtime_pm;
-	bool			pm_retune;
-	bool			rpm_retune;
-	const struct sdhci_pci_fixes *fixes;
-
-	int			num_slots;	/* Slots on controller */
-	struct sdhci_pci_slot	*slots[MAX_SLOTS]; /* Pointers to host slots */
-};
-
-static inline void *sdhci_pci_priv(struct sdhci_pci_slot *slot)
-{
-	return (void *)slot->private;
-}
-
-#ifdef CONFIG_PM_SLEEP
-int sdhci_pci_resume_host(struct sdhci_pci_chip *chip);
-#endif
-int sdhci_pci_enable_dma(struct sdhci_host *host);
-
-extern const struct sdhci_pci_fixes sdhci_arasan;
-extern const struct sdhci_pci_fixes sdhci_snps;
-extern const struct sdhci_pci_fixes sdhci_o2;
-extern const struct sdhci_pci_fixes sdhci_gl9750;
-extern const struct sdhci_pci_fixes sdhci_gl9755;
-extern const struct sdhci_pci_fixes sdhci_gl9763e;
-
-#endif /* __SDHCI_PCI_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci.h
deleted file mode 100644
index 5ce7cdcc192f..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/sdhci/sdhci.h
+++ /dev/null
@@ -1,822 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- *  linux/drivers/mmc/host/sdhci.h - Secure Digital Host Controller Interface driver
- *
- * Header file for Host Controller registers and I/O accessors.
- *
- *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
- */
-#ifndef __SDHCI_HW_H
-#define __SDHCI_HW_H
-
-#include <linux/bits.h>
-#include <linux/scatterlist.h>
-#include <linux/compiler.h>
-#include <linux/types.h>
-#include <linux/io.h>
-#include <linux/leds.h>
-#include <linux/interrupt.h>
-
-#include <linux/mmc/host.h>
-
-/*
- * Controller registers
- */
-
-#define SDHCI_DMA_ADDRESS	0x00
-#define SDHCI_ARGUMENT2		SDHCI_DMA_ADDRESS
-#define SDHCI_32BIT_BLK_CNT	SDHCI_DMA_ADDRESS
-
-#define SDHCI_BLOCK_SIZE	0x04
-#define  SDHCI_MAKE_BLKSZ(dma, blksz) (((dma & 0x7) << 12) | (blksz & 0xFFF))
-
-#define SDHCI_BLOCK_COUNT	0x06
-
-#define SDHCI_ARGUMENT		0x08
-
-#define SDHCI_TRANSFER_MODE	0x0C
-#define  SDHCI_TRNS_DMA		0x01
-#define  SDHCI_TRNS_BLK_CNT_EN	0x02
-#define  SDHCI_TRNS_AUTO_CMD12	0x04
-#define  SDHCI_TRNS_AUTO_CMD23	0x08
-#define  SDHCI_TRNS_AUTO_SEL	0x0C
-#define  SDHCI_TRNS_READ	0x10
-#define  SDHCI_TRNS_MULTI	0x20
-
-#define SDHCI_COMMAND		0x0E
-#define  SDHCI_CMD_RESP_MASK	0x03
-#define  SDHCI_CMD_CRC		0x08
-#define  SDHCI_CMD_INDEX	0x10
-#define  SDHCI_CMD_DATA		0x20
-#define  SDHCI_CMD_ABORTCMD	0xC0
-
-#define  SDHCI_CMD_RESP_NONE	0x00
-#define  SDHCI_CMD_RESP_LONG	0x01
-#define  SDHCI_CMD_RESP_SHORT	0x02
-#define  SDHCI_CMD_RESP_SHORT_BUSY 0x03
-
-#define SDHCI_MAKE_CMD(c, f) (((c & 0xff) << 8) | (f & 0xff))
-#define SDHCI_GET_CMD(c) ((c>>8) & 0x3f)
-
-#define SDHCI_RESPONSE		0x10
-
-#define SDHCI_BUFFER		0x20
-
-#define SDHCI_PRESENT_STATE	0x24
-#define  SDHCI_CMD_INHIBIT	0x00000001
-#define  SDHCI_DATA_INHIBIT	0x00000002
-#define  SDHCI_DOING_WRITE	0x00000100
-#define  SDHCI_DOING_READ	0x00000200
-#define  SDHCI_SPACE_AVAILABLE	0x00000400
-#define  SDHCI_DATA_AVAILABLE	0x00000800
-#define  SDHCI_CARD_PRESENT	0x00010000
-#define   SDHCI_CARD_PRES_SHIFT	16
-#define  SDHCI_CD_STABLE	0x00020000
-#define  SDHCI_CD_LVL		0x00040000
-#define   SDHCI_CD_LVL_SHIFT	18
-#define  SDHCI_WRITE_PROTECT	0x00080000
-#define  SDHCI_DATA_LVL_MASK	0x00F00000
-#define   SDHCI_DATA_LVL_SHIFT	20
-#define   SDHCI_DATA_0_LVL_MASK	0x00100000
-#define  SDHCI_CMD_LVL		0x01000000
-
-#define SDHCI_HOST_CONTROL	0x28
-#define  SDHCI_CTRL_LED		0x01
-#define  SDHCI_CTRL_4BITBUS	0x02
-#define  SDHCI_CTRL_HISPD	0x04
-#define  SDHCI_CTRL_DMA_MASK	0x18
-#define   SDHCI_CTRL_SDMA	0x00
-#define   SDHCI_CTRL_ADMA1	0x08
-#define   SDHCI_CTRL_ADMA32	0x10
-#define   SDHCI_CTRL_ADMA64	0x18
-#define   SDHCI_CTRL_ADMA3	0x18
-#define  SDHCI_CTRL_8BITBUS	0x20
-#define  SDHCI_CTRL_CDTEST_INS	0x40
-#define  SDHCI_CTRL_CDTEST_EN	0x80
-
-#define SDHCI_POWER_CONTROL	0x29
-#define  SDHCI_POWER_ON		0x01
-#define  SDHCI_POWER_180	0x0A
-#define  SDHCI_POWER_300	0x0C
-#define  SDHCI_POWER_330	0x0E
-
-#define SDHCI_BLOCK_GAP_CONTROL	0x2A
-
-#define SDHCI_WAKE_UP_CONTROL	0x2B
-#define  SDHCI_WAKE_ON_INT	0x01
-#define  SDHCI_WAKE_ON_INSERT	0x02
-#define  SDHCI_WAKE_ON_REMOVE	0x04
-
-#define SDHCI_CLOCK_CONTROL	0x2C
-#define  SDHCI_DIVIDER_SHIFT	8
-#define  SDHCI_DIVIDER_HI_SHIFT	6
-#define  SDHCI_DIV_MASK	0xFF
-#define  SDHCI_DIV_MASK_LEN	8
-#define  SDHCI_DIV_HI_MASK	0x300
-#define  SDHCI_PROG_CLOCK_MODE	0x0020
-#define  SDHCI_CLOCK_CARD_EN	0x0004
-#define  SDHCI_CLOCK_PLL_EN	0x0008
-#define  SDHCI_CLOCK_INT_STABLE	0x0002
-#define  SDHCI_CLOCK_INT_EN	0x0001
-
-#define SDHCI_TIMEOUT_CONTROL	0x2E
-
-#define SDHCI_SOFTWARE_RESET	0x2F
-#define  SDHCI_RESET_ALL	0x01
-#define  SDHCI_RESET_CMD	0x02
-#define  SDHCI_RESET_DATA	0x04
-
-#define SDHCI_INT_STATUS	0x30
-#define SDHCI_INT_ENABLE	0x34
-#define SDHCI_SIGNAL_ENABLE	0x38
-#define  SDHCI_INT_RESPONSE	0x00000001
-#define  SDHCI_INT_DATA_END	0x00000002
-#define  SDHCI_INT_BLK_GAP	0x00000004
-#define  SDHCI_INT_DMA_END	0x00000008
-#define  SDHCI_INT_SPACE_AVAIL	0x00000010
-#define  SDHCI_INT_DATA_AVAIL	0x00000020
-#define  SDHCI_INT_CARD_INSERT	0x00000040
-#define  SDHCI_INT_CARD_REMOVE	0x00000080
-#define  SDHCI_INT_CARD_INT	0x00000100
-#define  SDHCI_INT_RETUNE	0x00001000
-#define  SDHCI_INT_CQE		0x00004000
-#define  SDHCI_INT_ERROR	0x00008000
-#define  SDHCI_INT_TIMEOUT	0x00010000
-#define  SDHCI_INT_CRC		0x00020000
-#define  SDHCI_INT_END_BIT	0x00040000
-#define  SDHCI_INT_INDEX	0x00080000
-#define  SDHCI_INT_DATA_TIMEOUT	0x00100000
-#define  SDHCI_INT_DATA_CRC	0x00200000
-#define  SDHCI_INT_DATA_END_BIT	0x00400000
-#define  SDHCI_INT_BUS_POWER	0x00800000
-#define  SDHCI_INT_AUTO_CMD_ERR	0x01000000
-#define  SDHCI_INT_ADMA_ERROR	0x02000000
-
-#define  SDHCI_INT_NORMAL_MASK	0x00007FFF
-#define  SDHCI_INT_ERROR_MASK	0xFFFF8000
-
-#define  SDHCI_INT_CMD_MASK	(SDHCI_INT_RESPONSE | SDHCI_INT_TIMEOUT | \
-		SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX | \
-		SDHCI_INT_AUTO_CMD_ERR)
-#define  SDHCI_INT_DATA_MASK	(SDHCI_INT_DATA_END | SDHCI_INT_DMA_END | \
-		SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL | \
-		SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_DATA_CRC | \
-		SDHCI_INT_DATA_END_BIT | SDHCI_INT_ADMA_ERROR | \
-		SDHCI_INT_BLK_GAP)
-#define SDHCI_INT_ALL_MASK	((unsigned int)-1)
-
-#define SDHCI_CQE_INT_ERR_MASK ( \
-	SDHCI_INT_ADMA_ERROR | SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | \
-	SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX | \
-	SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT)
-
-#define SDHCI_CQE_INT_MASK (SDHCI_CQE_INT_ERR_MASK | SDHCI_INT_CQE)
-
-#define SDHCI_AUTO_CMD_STATUS	0x3C
-#define  SDHCI_AUTO_CMD_TIMEOUT	0x00000002
-#define  SDHCI_AUTO_CMD_CRC	0x00000004
-#define  SDHCI_AUTO_CMD_END_BIT	0x00000008
-#define  SDHCI_AUTO_CMD_INDEX	0x00000010
-
-#define SDHCI_HOST_CONTROL2		0x3E
-#define  SDHCI_CTRL_UHS_MASK		0x0007
-#define   SDHCI_CTRL_UHS_SDR12		0x0000
-#define   SDHCI_CTRL_UHS_SDR25		0x0001
-#define   SDHCI_CTRL_UHS_SDR50		0x0002
-#define   SDHCI_CTRL_UHS_SDR104		0x0003
-#define   SDHCI_CTRL_UHS_DDR50		0x0004
-#define   SDHCI_CTRL_HS400		0x0005 /* Non-standard */
-#define  SDHCI_CTRL_VDD_180		0x0008
-#define  SDHCI_CTRL_DRV_TYPE_MASK	0x0030
-#define   SDHCI_CTRL_DRV_TYPE_B		0x0000
-#define   SDHCI_CTRL_DRV_TYPE_A		0x0010
-#define   SDHCI_CTRL_DRV_TYPE_C		0x0020
-#define   SDHCI_CTRL_DRV_TYPE_D		0x0030
-#define  SDHCI_CTRL_EXEC_TUNING		0x0040
-#define  SDHCI_CTRL_TUNED_CLK		0x0080
-#define  SDHCI_CMD23_ENABLE		0x0800
-#define  SDHCI_CTRL_V4_MODE		0x1000
-#define  SDHCI_CTRL_64BIT_ADDR		0x2000
-#define  SDHCI_CTRL_PRESET_VAL_ENABLE	0x8000
-
-#define SDHCI_CAPABILITIES	0x40
-#define  SDHCI_TIMEOUT_CLK_MASK		GENMASK(5, 0)
-#define  SDHCI_TIMEOUT_CLK_SHIFT 0
-#define  SDHCI_TIMEOUT_CLK_UNIT	0x00000080
-#define  SDHCI_CLOCK_BASE_MASK		GENMASK(13, 8)
-#define  SDHCI_CLOCK_BASE_SHIFT	8
-#define  SDHCI_CLOCK_V3_BASE_MASK	GENMASK(15, 8)
-#define  SDHCI_MAX_BLOCK_MASK	0x00030000
-#define  SDHCI_MAX_BLOCK_SHIFT  16
-#define  SDHCI_CAN_DO_8BIT	0x00040000
-#define  SDHCI_CAN_DO_ADMA2	0x00080000
-#define  SDHCI_CAN_DO_ADMA1	0x00100000
-#define  SDHCI_CAN_DO_HISPD	0x00200000
-#define  SDHCI_CAN_DO_SDMA	0x00400000
-#define  SDHCI_CAN_DO_SUSPEND	0x00800000
-#define  SDHCI_CAN_VDD_330	0x01000000
-#define  SDHCI_CAN_VDD_300	0x02000000
-#define  SDHCI_CAN_VDD_180	0x04000000
-#define  SDHCI_CAN_64BIT_V4	0x08000000
-#define  SDHCI_CAN_64BIT	0x10000000
-
-#define SDHCI_CAPABILITIES_1	0x44
-#define  SDHCI_SUPPORT_SDR50	0x00000001
-#define  SDHCI_SUPPORT_SDR104	0x00000002
-#define  SDHCI_SUPPORT_DDR50	0x00000004
-#define  SDHCI_DRIVER_TYPE_A	0x00000010
-#define  SDHCI_DRIVER_TYPE_C	0x00000020
-#define  SDHCI_DRIVER_TYPE_D	0x00000040
-#define  SDHCI_RETUNING_TIMER_COUNT_MASK	GENMASK(11, 8)
-#define  SDHCI_USE_SDR50_TUNING			0x00002000
-#define  SDHCI_RETUNING_MODE_MASK		GENMASK(15, 14)
-#define  SDHCI_CLOCK_MUL_MASK			GENMASK(23, 16)
-#define  SDHCI_CAN_DO_ADMA3	0x08000000
-#define  SDHCI_SUPPORT_HS400	0x80000000 /* Non-standard */
-
-#define SDHCI_MAX_CURRENT		0x48
-#define  SDHCI_MAX_CURRENT_LIMIT	GENMASK(7, 0)
-#define  SDHCI_MAX_CURRENT_330_MASK	GENMASK(7, 0)
-#define  SDHCI_MAX_CURRENT_300_MASK	GENMASK(15, 8)
-#define  SDHCI_MAX_CURRENT_180_MASK	GENMASK(23, 16)
-#define   SDHCI_MAX_CURRENT_MULTIPLIER	4
-
-/* 4C-4F reserved for more max current */
-
-#define SDHCI_SET_ACMD12_ERROR	0x50
-#define SDHCI_SET_INT_ERROR	0x52
-
-#define SDHCI_ADMA_ERROR	0x54
-
-/* 55-57 reserved */
-
-#define SDHCI_ADMA_ADDRESS	0x58
-#define SDHCI_ADMA_ADDRESS_HI	0x5C
-
-/* 60-FB reserved */
-
-#define SDHCI_PRESET_FOR_HIGH_SPEED	0x64
-#define SDHCI_PRESET_FOR_SDR12 0x66
-#define SDHCI_PRESET_FOR_SDR25 0x68
-#define SDHCI_PRESET_FOR_SDR50 0x6A
-#define SDHCI_PRESET_FOR_SDR104        0x6C
-#define SDHCI_PRESET_FOR_DDR50 0x6E
-#define SDHCI_PRESET_FOR_HS400 0x74 /* Non-standard */
-#define SDHCI_PRESET_DRV_MASK		GENMASK(15, 14)
-#define SDHCI_PRESET_CLKGEN_SEL		BIT(10)
-#define SDHCI_PRESET_SDCLK_FREQ_MASK	GENMASK(9, 0)
-
-#define SDHCI_SLOT_INT_STATUS	0xFC
-
-#define SDHCI_HOST_VERSION	0xFE
-#define  SDHCI_VENDOR_VER_MASK	0xFF00
-#define  SDHCI_VENDOR_VER_SHIFT	8
-#define  SDHCI_SPEC_VER_MASK	0x00FF
-#define  SDHCI_SPEC_VER_SHIFT	0
-#define   SDHCI_SPEC_100	0
-#define   SDHCI_SPEC_200	1
-#define   SDHCI_SPEC_300	2
-#define   SDHCI_SPEC_400	3
-#define   SDHCI_SPEC_410	4
-#define   SDHCI_SPEC_420	5
-
-/*
- * End of controller registers.
- */
-
-#define SDHCI_MAX_DIV_SPEC_200	256
-#define SDHCI_MAX_DIV_SPEC_300	2046
-
-/*
- * Host SDMA buffer boundary. Valid values from 4K to 512K in powers of 2.
- */
-#define SDHCI_DEFAULT_BOUNDARY_SIZE  (512 * 1024)
-#define SDHCI_DEFAULT_BOUNDARY_ARG   (ilog2(SDHCI_DEFAULT_BOUNDARY_SIZE) - 12)
-
-/* ADMA2 32-bit DMA descriptor size */
-#define SDHCI_ADMA2_32_DESC_SZ	8
-
-/* ADMA2 32-bit descriptor */
-struct sdhci_adma2_32_desc {
-	__le16	cmd;
-	__le16	len;
-	__le32	addr;
-}  __packed __aligned(4);
-
-/* ADMA2 data alignment */
-#define SDHCI_ADMA2_ALIGN	4
-#define SDHCI_ADMA2_MASK	(SDHCI_ADMA2_ALIGN - 1)
-
-/*
- * ADMA2 descriptor alignment.  Some controllers (e.g. Intel) require 8 byte
- * alignment for the descriptor table even in 32-bit DMA mode.  Memory
- * allocation is at least 8 byte aligned anyway, so just stipulate 8 always.
- */
-#define SDHCI_ADMA2_DESC_ALIGN	8
-
-/*
- * ADMA2 64-bit DMA descriptor size
- * According to SD Host Controller spec v4.10, there are two kinds of
- * descriptors for 64-bit addressing mode: 96-bit Descriptor and 128-bit
- * Descriptor, if Host Version 4 Enable is set in the Host Control 2
- * register, 128-bit Descriptor will be selected.
- */
-#define SDHCI_ADMA2_64_DESC_SZ(host)	((host)->v4_mode ? 16 : 12)
-
-/*
- * ADMA2 64-bit descriptor. Note 12-byte descriptor can't always be 8-byte
- * aligned.
- */
-struct sdhci_adma2_64_desc {
-	__le16	cmd;
-	__le16	len;
-	__le32	addr_lo;
-	__le32	addr_hi;
-}  __packed __aligned(4);
-
-#define ADMA2_TRAN_VALID	0x21
-#define ADMA2_NOP_END_VALID	0x3
-#define ADMA2_END		0x2
-
-/*
- * Maximum segments assuming a 512KiB maximum requisition size and a minimum
- * 4KiB page size. Note this also allows enough for multiple descriptors in
- * case of PAGE_SIZE >= 64KiB.
- */
-#define SDHCI_MAX_SEGS		128
-
-/* Allow for a a command request and a data request at the same time */
-#define SDHCI_MAX_MRQS		2
-
-/*
- * 48bit command and 136 bit response in 100KHz clock could take upto 2.48ms.
- * However since the start time of the command, the time between
- * command and response, and the time between response and start of data is
- * not known, set the command transfer time to 10ms.
- */
-#define MMC_CMD_TRANSFER_TIME	(10 * NSEC_PER_MSEC) /* max 10 ms */
-
-#define sdhci_err_stats_inc(host, err_name) \
-	mmc_debugfs_err_stats_inc((host)->mmc, MMC_ERR_##err_name)
-
-enum sdhci_cookie {
-	COOKIE_UNMAPPED,
-	COOKIE_PRE_MAPPED,	/* mapped by sdhci_pre_req() */
-	COOKIE_MAPPED,		/* mapped by sdhci_prepare_data() */
-};
-
-struct sdhci_host {
-	/* Data set by hardware interface driver */
-	const char *hw_name;	/* Hardware bus name */
-
-	unsigned int quirks;	/* Deviations from spec. */
-
-/* Controller doesn't honor resets unless we touch the clock register */
-#define SDHCI_QUIRK_CLOCK_BEFORE_RESET			(1<<0)
-/* Controller has bad caps bits, but really supports DMA */
-#define SDHCI_QUIRK_FORCE_DMA				(1<<1)
-/* Controller doesn't like to be reset when there is no card inserted. */
-#define SDHCI_QUIRK_NO_CARD_NO_RESET			(1<<2)
-/* Controller doesn't like clearing the power reg before a change */
-#define SDHCI_QUIRK_SINGLE_POWER_WRITE			(1<<3)
-/* Controller has an unusable DMA engine */
-#define SDHCI_QUIRK_BROKEN_DMA				(1<<5)
-/* Controller has an unusable ADMA engine */
-#define SDHCI_QUIRK_BROKEN_ADMA				(1<<6)
-/* Controller can only DMA from 32-bit aligned addresses */
-#define SDHCI_QUIRK_32BIT_DMA_ADDR			(1<<7)
-/* Controller can only DMA chunk sizes that are a multiple of 32 bits */
-#define SDHCI_QUIRK_32BIT_DMA_SIZE			(1<<8)
-/* Controller can only ADMA chunks that are a multiple of 32 bits */
-#define SDHCI_QUIRK_32BIT_ADMA_SIZE			(1<<9)
-/* Controller needs to be reset after each request to stay stable */
-#define SDHCI_QUIRK_RESET_AFTER_REQUEST			(1<<10)
-/* Controller needs voltage and power writes to happen separately */
-#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER		(1<<11)
-/* Controller provides an incorrect timeout value for transfers */
-#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL			(1<<12)
-/* Controller has an issue with buffer bits for small transfers */
-#define SDHCI_QUIRK_BROKEN_SMALL_PIO			(1<<13)
-/* Controller does not provide transfer-complete interrupt when not busy */
-#define SDHCI_QUIRK_NO_BUSY_IRQ				(1<<14)
-/* Controller has unreliable card detection */
-#define SDHCI_QUIRK_BROKEN_CARD_DETECTION		(1<<15)
-/* Controller reports inverted write-protect state */
-#define SDHCI_QUIRK_INVERTED_WRITE_PROTECT		(1<<16)
-/* Controller has unusable command queue engine */
-#define SDHCI_QUIRK_BROKEN_CQE				(1<<17)
-/* Controller does not like fast PIO transfers */
-#define SDHCI_QUIRK_PIO_NEEDS_DELAY			(1<<18)
-/* Controller does not have a LED */
-#define SDHCI_QUIRK_NO_LED				(1<<19)
-/* Controller has to be forced to use block size of 2048 bytes */
-#define SDHCI_QUIRK_FORCE_BLK_SZ_2048			(1<<20)
-/* Controller cannot do multi-block transfers */
-#define SDHCI_QUIRK_NO_MULTIBLOCK			(1<<21)
-/* Controller can only handle 1-bit data transfers */
-#define SDHCI_QUIRK_FORCE_1_BIT_DATA			(1<<22)
-/* Controller needs 10ms delay between applying power and clock */
-#define SDHCI_QUIRK_DELAY_AFTER_POWER			(1<<23)
-/* Controller uses SDCLK instead of TMCLK for data timeouts */
-#define SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK		(1<<24)
-/* Controller reports wrong base clock capability */
-#define SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN		(1<<25)
-/* Controller cannot support End Attribute in NOP ADMA descriptor */
-#define SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC		(1<<26)
-/* Controller is missing device caps. Use caps provided by host */
-#define SDHCI_QUIRK_MISSING_CAPS			(1<<27)
-/* Controller uses Auto CMD12 command to stop the transfer */
-#define SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12		(1<<28)
-/* Controller doesn't have HISPD bit field in HI-SPEED SD card */
-#define SDHCI_QUIRK_NO_HISPD_BIT			(1<<29)
-/* Controller treats ADMA descriptors with length 0000h incorrectly */
-#define SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC		(1<<30)
-/* The read-only detection via SDHCI_PRESENT_STATE register is unstable */
-#define SDHCI_QUIRK_UNSTABLE_RO_DETECT			(1<<31)
-
-	unsigned int quirks2;	/* More deviations from spec. */
-
-#define SDHCI_QUIRK2_HOST_OFF_CARD_ON			(1<<0)
-#define SDHCI_QUIRK2_HOST_NO_CMD23			(1<<1)
-/* The system physically doesn't support 1.8v, even if the host does */
-#define SDHCI_QUIRK2_NO_1_8_V				(1<<2)
-#define SDHCI_QUIRK2_PRESET_VALUE_BROKEN		(1<<3)
-#define SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON		(1<<4)
-/* Controller has a non-standard host control register */
-#define SDHCI_QUIRK2_BROKEN_HOST_CONTROL		(1<<5)
-/* Controller does not support HS200 */
-#define SDHCI_QUIRK2_BROKEN_HS200			(1<<6)
-/* Controller does not support DDR50 */
-#define SDHCI_QUIRK2_BROKEN_DDR50			(1<<7)
-/* Stop command (CMD12) can set Transfer Complete when not using MMC_RSP_BUSY */
-#define SDHCI_QUIRK2_STOP_WITH_TC			(1<<8)
-/* Controller does not support 64-bit DMA */
-#define SDHCI_QUIRK2_BROKEN_64_BIT_DMA			(1<<9)
-/* need clear transfer mode register before send cmd */
-#define SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD	(1<<10)
-/* Capability register bit-63 indicates HS400 support */
-#define SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400		(1<<11)
-/* forced tuned clock */
-#define SDHCI_QUIRK2_TUNING_WORK_AROUND			(1<<12)
-/* disable the block count for single block transactions */
-#define SDHCI_QUIRK2_SUPPORT_SINGLE			(1<<13)
-/* Controller broken with using ACMD23 */
-#define SDHCI_QUIRK2_ACMD23_BROKEN			(1<<14)
-/* Broken Clock divider zero in controller */
-#define SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN		(1<<15)
-/* Controller has CRC in 136 bit Command Response */
-#define SDHCI_QUIRK2_RSP_136_HAS_CRC			(1<<16)
-/*
- * Disable HW timeout if the requested timeout is more than the maximum
- * obtainable timeout.
- */
-#define SDHCI_QUIRK2_DISABLE_HW_TIMEOUT			(1<<17)
-/*
- * 32-bit block count may not support eMMC where upper bits of CMD23 are used
- * for other purposes.  Consequently we support 16-bit block count by default.
- * Otherwise, SDHCI_QUIRK2_USE_32BIT_BLK_CNT can be selected to use 32-bit
- * block count.
- */
-#define SDHCI_QUIRK2_USE_32BIT_BLK_CNT			(1<<18)
-/* Issue CMD and DATA reset together */
-#define SDHCI_QUIRK2_ISSUE_CMD_DAT_RESET_TOGETHER	(1<<19)
-
-	int irq;		/* Device IRQ */
-	void __iomem *ioaddr;	/* Mapped address */
-	phys_addr_t mapbase;	/* physical address base */
-	char *bounce_buffer;	/* For packing SDMA reads/writes */
-	dma_addr_t bounce_addr;
-	unsigned int bounce_buffer_size;
-
-	const struct sdhci_ops *ops;	/* Low level hw interface */
-
-	/* Internal data */
-	struct mmc_host *mmc;	/* MMC structure */
-	struct mmc_host_ops mmc_host_ops;	/* MMC host ops */
-	u64 dma_mask;		/* custom DMA mask */
-
-#if IS_ENABLED(CONFIG_LEDS_CLASS)
-	struct led_classdev led;	/* LED control */
-	char led_name[32];
-#endif
-
-	spinlock_t lock;	/* Mutex */
-
-	int flags;		/* Host attributes */
-#define SDHCI_USE_SDMA		(1<<0)	/* Host is SDMA capable */
-#define SDHCI_USE_ADMA		(1<<1)	/* Host is ADMA capable */
-#define SDHCI_REQ_USE_DMA	(1<<2)	/* Use DMA for this req. */
-#define SDHCI_DEVICE_DEAD	(1<<3)	/* Device unresponsive */
-#define SDHCI_SDR50_NEEDS_TUNING (1<<4)	/* SDR50 needs tuning */
-#define SDHCI_AUTO_CMD12	(1<<6)	/* Auto CMD12 support */
-#define SDHCI_AUTO_CMD23	(1<<7)	/* Auto CMD23 support */
-#define SDHCI_PV_ENABLED	(1<<8)	/* Preset value enabled */
-#define SDHCI_USE_64_BIT_DMA	(1<<12)	/* Use 64-bit DMA */
-#define SDHCI_HS400_TUNING	(1<<13)	/* Tuning for HS400 */
-#define SDHCI_SIGNALING_330	(1<<14)	/* Host is capable of 3.3V signaling */
-#define SDHCI_SIGNALING_180	(1<<15)	/* Host is capable of 1.8V signaling */
-#define SDHCI_SIGNALING_120	(1<<16)	/* Host is capable of 1.2V signaling */
-
-	unsigned int version;	/* SDHCI spec. version */
-
-	unsigned int max_clk;	/* Max possible freq (MHz) */
-	unsigned int timeout_clk;	/* Timeout freq (KHz) */
-	u8 max_timeout_count;	/* Vendor specific max timeout count */
-	unsigned int clk_mul;	/* Clock Muliplier value */
-
-	unsigned int clock;	/* Current clock (MHz) */
-	u8 pwr;			/* Current voltage */
-	u8 drv_type;		/* Current UHS-I driver type */
-	bool reinit_uhs;	/* Force UHS-related re-initialization */
-
-	bool runtime_suspended;	/* Host is runtime suspended */
-	bool bus_on;		/* Bus power prevents runtime suspend */
-	bool preset_enabled;	/* Preset is enabled */
-	bool pending_reset;	/* Cmd/data reset is pending */
-	bool irq_wake_enabled;	/* IRQ wakeup is enabled */
-	bool v4_mode;		/* Host Version 4 Enable */
-	bool use_external_dma;	/* Host selects to use external DMA */
-	bool always_defer_done;	/* Always defer to complete requests */
-
-	struct mmc_request *mrqs_done[SDHCI_MAX_MRQS];	/* Requests done */
-	struct mmc_command *cmd;	/* Current command */
-	struct mmc_command *data_cmd;	/* Current data command */
-	struct mmc_command *deferred_cmd;	/* Deferred command */
-	struct mmc_data *data;	/* Current data request */
-	unsigned int data_early:1;	/* Data finished before cmd */
-
-	struct sg_mapping_iter sg_miter;	/* SG state for PIO */
-	unsigned int blocks;	/* remaining PIO blocks */
-
-	int sg_count;		/* Mapped sg entries */
-	int max_adma;		/* Max. length in ADMA descriptor */
-
-	void *adma_table;	/* ADMA descriptor table */
-	void *align_buffer;	/* Bounce buffer */
-
-	size_t adma_table_sz;	/* ADMA descriptor table size */
-	size_t align_buffer_sz;	/* Bounce buffer size */
-
-	dma_addr_t adma_addr;	/* Mapped ADMA descr. table */
-	dma_addr_t align_addr;	/* Mapped bounce buffer */
-
-	unsigned int desc_sz;	/* ADMA current descriptor size */
-	unsigned int alloc_desc_sz;	/* ADMA descr. max size host supports */
-
-	struct workqueue_struct *complete_wq;	/* Request completion wq */
-	struct work_struct	complete_work;	/* Request completion work */
-
-	struct timer_list timer;	/* Timer for timeouts */
-	struct timer_list data_timer;	/* Timer for data timeouts */
-
-#if IS_ENABLED(CONFIG_MMC_SDHCI_EXTERNAL_DMA)
-	struct dma_chan *rx_chan;
-	struct dma_chan *tx_chan;
-#endif
-
-	u32 caps;		/* CAPABILITY_0 */
-	u32 caps1;		/* CAPABILITY_1 */
-	bool read_caps;		/* Capability flags have been read */
-
-	bool sdhci_core_to_disable_vqmmc;  /* sdhci core can disable vqmmc */
-	unsigned int            ocr_avail_sdio;	/* OCR bit masks */
-	unsigned int            ocr_avail_sd;
-	unsigned int            ocr_avail_mmc;
-	u32 ocr_mask;		/* available voltages */
-
-	unsigned		timing;		/* Current timing */
-
-	u32			thread_isr;
-
-	/* cached registers */
-	u32			ier;
-
-	bool			cqe_on;		/* CQE is operating */
-	u32			cqe_ier;	/* CQE interrupt mask */
-	u32			cqe_err_ier;	/* CQE error interrupt mask */
-
-	wait_queue_head_t	buf_ready_int;	/* Waitqueue for Buffer Read Ready interrupt */
-	unsigned int		tuning_done;	/* Condition flag set when CMD19 succeeds */
-
-	unsigned int		tuning_count;	/* Timer count for re-tuning */
-	unsigned int		tuning_mode;	/* Re-tuning mode supported by host */
-	unsigned int		tuning_err;	/* Error code for re-tuning */
-#define SDHCI_TUNING_MODE_1	0
-#define SDHCI_TUNING_MODE_2	1
-#define SDHCI_TUNING_MODE_3	2
-	/* Delay (ms) between tuning commands */
-	int			tuning_delay;
-	int			tuning_loop_count;
-
-	/* Host SDMA buffer boundary. */
-	u32			sdma_boundary;
-
-	/* Host ADMA table count */
-	u32			adma_table_cnt;
-
-	u64			data_timeout;
-
-	unsigned long private[] ____cacheline_aligned;
-};
-
-struct sdhci_ops {
-#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
-	u32		(*read_l)(struct sdhci_host *host, int reg);
-	u16		(*read_w)(struct sdhci_host *host, int reg);
-	u8		(*read_b)(struct sdhci_host *host, int reg);
-	void		(*write_l)(struct sdhci_host *host, u32 val, int reg);
-	void		(*write_w)(struct sdhci_host *host, u16 val, int reg);
-	void		(*write_b)(struct sdhci_host *host, u8 val, int reg);
-#endif
-
-	void	(*set_clock)(struct sdhci_host *host, unsigned int clock);
-	void	(*set_power)(struct sdhci_host *host, unsigned char mode,
-			     unsigned short vdd);
-
-	u32		(*irq)(struct sdhci_host *host, u32 intmask);
-
-	int		(*set_dma_mask)(struct sdhci_host *host);
-	int		(*enable_dma)(struct sdhci_host *host);
-	unsigned int	(*get_max_clock)(struct sdhci_host *host);
-	unsigned int	(*get_min_clock)(struct sdhci_host *host);
-	/* get_timeout_clock should return clk rate in unit of Hz */
-	unsigned int	(*get_timeout_clock)(struct sdhci_host *host);
-	unsigned int	(*get_max_timeout_count)(struct sdhci_host *host);
-	void		(*set_timeout)(struct sdhci_host *host,
-				       struct mmc_command *cmd);
-	void		(*set_bus_width)(struct sdhci_host *host, int width);
-	void (*platform_send_init_74_clocks)(struct sdhci_host *host,
-					     u8 power_mode);
-	unsigned int    (*get_ro)(struct sdhci_host *host);
-	void		(*reset)(struct sdhci_host *host, u8 mask);
-	int	(*platform_execute_tuning)(struct sdhci_host *host, u32 opcode);
-	void	(*set_uhs_signaling)(struct sdhci_host *host, unsigned int uhs);
-	void	(*hw_reset)(struct sdhci_host *host);
-	void    (*adma_workaround)(struct sdhci_host *host, u32 intmask);
-	void    (*card_event)(struct sdhci_host *host);
-	void	(*voltage_switch)(struct sdhci_host *host);
-	void	(*adma_write_desc)(struct sdhci_host *host, void **desc,
-				   dma_addr_t addr, int len, unsigned int cmd);
-	void	(*copy_to_bounce_buffer)(struct sdhci_host *host,
-					 struct mmc_data *data,
-					 unsigned int length);
-	void	(*request_done)(struct sdhci_host *host,
-				struct mmc_request *mrq);
-	void    (*dump_vendor_regs)(struct sdhci_host *host);
-};
-
-#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
-
-static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg)
-{
-	if (unlikely(host->ops->write_l))
-		host->ops->write_l(host, val, reg);
-	else
-		writel(val, host->ioaddr + reg);
-}
-
-static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg)
-{
-	if (unlikely(host->ops->write_w))
-		host->ops->write_w(host, val, reg);
-	else
-		writew(val, host->ioaddr + reg);
-}
-
-static inline void sdhci_writeb(struct sdhci_host *host, u8 val, int reg)
-{
-	if (unlikely(host->ops->write_b))
-		host->ops->write_b(host, val, reg);
-	else
-		writeb(val, host->ioaddr + reg);
-}
-
-static inline u32 sdhci_readl(struct sdhci_host *host, int reg)
-{
-	if (unlikely(host->ops->read_l))
-		return host->ops->read_l(host, reg);
-	else
-		return readl(host->ioaddr + reg);
-}
-
-static inline u16 sdhci_readw(struct sdhci_host *host, int reg)
-{
-	if (unlikely(host->ops->read_w))
-		return host->ops->read_w(host, reg);
-	else
-		return readw(host->ioaddr + reg);
-}
-
-static inline u8 sdhci_readb(struct sdhci_host *host, int reg)
-{
-	if (unlikely(host->ops->read_b))
-		return host->ops->read_b(host, reg);
-	else
-		return readb(host->ioaddr + reg);
-}
-
-#else
-
-static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg)
-{
-	writel(val, host->ioaddr + reg);
-}
-
-static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg)
-{
-	writew(val, host->ioaddr + reg);
-}
-
-static inline void sdhci_writeb(struct sdhci_host *host, u8 val, int reg)
-{
-	writeb(val, host->ioaddr + reg);
-}
-
-static inline u32 sdhci_readl(struct sdhci_host *host, int reg)
-{
-	return readl(host->ioaddr + reg);
-}
-
-static inline u16 sdhci_readw(struct sdhci_host *host, int reg)
-{
-	return readw(host->ioaddr + reg);
-}
-
-static inline u8 sdhci_readb(struct sdhci_host *host, int reg)
-{
-	return readb(host->ioaddr + reg);
-}
-
-#endif /* CONFIG_MMC_SDHCI_IO_ACCESSORS */
-
-struct sdhci_host *sdhci_alloc_host(struct device *dev, size_t priv_size);
-void sdhci_free_host(struct sdhci_host *host);
-
-static inline void *sdhci_priv(struct sdhci_host *host)
-{
-	return host->private;
-}
-
-void __sdhci_read_caps(struct sdhci_host *host, const u16 *ver,
-		       const u32 *caps, const u32 *caps1);
-int sdhci_setup_host(struct sdhci_host *host);
-void sdhci_cleanup_host(struct sdhci_host *host);
-int __sdhci_add_host(struct sdhci_host *host);
-int sdhci_add_host(struct sdhci_host *host);
-void sdhci_remove_host(struct sdhci_host *host, int dead);
-
-static inline void sdhci_read_caps(struct sdhci_host *host)
-{
-	__sdhci_read_caps(host, NULL, NULL, NULL);
-}
-
-u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock,
-		   unsigned int *actual_clock);
-void sdhci_set_clock(struct sdhci_host *host, unsigned int clock);
-void sdhci_enable_clk(struct sdhci_host *host, u16 clk);
-void sdhci_set_power(struct sdhci_host *host, unsigned char mode,
-		     unsigned short vdd);
-void sdhci_set_power_and_bus_voltage(struct sdhci_host *host,
-				     unsigned char mode,
-				     unsigned short vdd);
-void sdhci_set_power_noreg(struct sdhci_host *host, unsigned char mode,
-			   unsigned short vdd);
-int sdhci_get_cd_nogpio(struct mmc_host *mmc);
-void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq);
-int sdhci_request_atomic(struct mmc_host *mmc, struct mmc_request *mrq);
-void sdhci_set_bus_width(struct sdhci_host *host, int width);
-void sdhci_reset(struct sdhci_host *host, u8 mask);
-void sdhci_set_uhs_signaling(struct sdhci_host *host, unsigned timing);
-int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode);
-void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios);
-int sdhci_start_signal_voltage_switch(struct mmc_host *mmc,
-				      struct mmc_ios *ios);
-void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable);
-void sdhci_adma_write_desc(struct sdhci_host *host, void **desc,
-			   dma_addr_t addr, int len, unsigned int cmd);
-
-#ifdef CONFIG_PM
-int sdhci_suspend_host(struct sdhci_host *host);
-int sdhci_resume_host(struct sdhci_host *host);
-int sdhci_runtime_suspend_host(struct sdhci_host *host);
-int sdhci_runtime_resume_host(struct sdhci_host *host, int soft_reset);
-#endif
-
-void sdhci_cqe_enable(struct mmc_host *mmc);
-void sdhci_cqe_disable(struct mmc_host *mmc, bool recovery);
-bool sdhci_cqe_irq(struct sdhci_host *host, u32 intmask, int *cmd_error,
-		   int *data_error);
-
-void sdhci_dumpregs(struct sdhci_host *host);
-void sdhci_enable_v4_mode(struct sdhci_host *host);
-
-void sdhci_start_tuning(struct sdhci_host *host);
-void sdhci_end_tuning(struct sdhci_host *host);
-void sdhci_reset_tuning(struct sdhci_host *host);
-void sdhci_send_tuning(struct sdhci_host *host, u32 opcode);
-void sdhci_abort_tuning(struct sdhci_host *host, u32 opcode);
-void sdhci_switch_external_dma(struct sdhci_host *host, bool en);
-void sdhci_set_data_timeout_irq(struct sdhci_host *host, bool enable);
-void __sdhci_set_timeout(struct sdhci_host *host, struct mmc_command *cmd);
-
-#endif /* __SDHCI_HW_H */
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/spi-bitbang-txrx.h b/platform/broadcom/sonic-platform-modules-micas/common/modules/spi-bitbang-txrx.h
deleted file mode 100644
index 47bb9b898dfd..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/spi-bitbang-txrx.h
+++ /dev/null
@@ -1,107 +0,0 @@
-/*
- * Mix this utility code with some glue code to get one of several types of
- * simple SPI master driver.  Two do polled word-at-a-time I/O:
- *
- *   -	GPIO/parport bitbangers.  Provide chipselect() and txrx_word[](),
- *	expanding the per-word routines from the inline templates below.
- *
- *   -	Drivers for controllers resembling bare shift registers.  Provide
- *	chipselect() and txrx_word[](), with custom setup()/cleanup() methods
- *	that use your controller's clock and chipselect registers.
- *
- * Some hardware works well with requests at spi_transfer scope:
- *
- *   -	Drivers leveraging smarter hardware, with fifos or DMA; or for half
- *	duplex (MicroWire) controllers.  Provide chipselect() and txrx_bufs(),
- *	and custom setup()/cleanup() methods.
- */
-
-/*
- * The code that knows what GPIO pins do what should have declared four
- * functions, ideally as inlines, before including this header:
- *
- *  void setsck(struct spi_device *, int is_on);
- *  void setmosi(struct spi_device *, int is_on);
- *  int getmiso(struct spi_device *);
- *  void spidelay(unsigned);
- *
- * setsck()'s is_on parameter is a zero/nonzero boolean.
- *
- * setmosi()'s is_on parameter is a zero/nonzero boolean.
- *
- * getmiso() is required to return 0 or 1 only. Any other value is invalid
- * and will result in improper operation.
- *
- * A non-inlined routine would call bitbang_txrx_*() routines.  The
- * main loop could easily compile down to a handful of instructions,
- * especially if the delay is a NOP (to run at peak speed).
- *
- * Since this is software, the timings may not be exactly what your board's
- * chips need ... there may be several reasons you'd need to tweak timings
- * in these routines, not just to make it faster or slower to match a
- * particular CPU clock rate.
- */
-
-static inline u32
-bitbang_txrx_be_cpha0(struct spi_device *spi,
-		unsigned nsecs, unsigned cpol, unsigned flags,
-		u32 word, u8 bits)
-{
-	/* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */
-
-	u32 oldbit = (!(word & (1<<(bits-1)))) << 31;
-	/* clock starts at inactive polarity */
-	for (word <<= (32 - bits); likely(bits); bits--) {
-
-		/* setup MSB (to slave) on trailing edge */
-		if ((flags & SPI_MASTER_NO_TX) == 0) {
-			if ((word & (1 << 31)) != oldbit) {
-				setmosi(spi, word & (1 << 31));
-				oldbit = word & (1 << 31);
-			}
-		}
-		spidelay(nsecs);	/* T(setup) */
-
-		setsck(spi, !cpol);
-		spidelay(nsecs);
-
-		/* sample MSB (from slave) on leading edge */
-		word <<= 1;
-		if ((flags & SPI_MASTER_NO_RX) == 0)
-			word |= getmiso(spi);
-		setsck(spi, cpol);
-	}
-	return word;
-}
-
-static inline u32
-bitbang_txrx_be_cpha1(struct spi_device *spi,
-		unsigned nsecs, unsigned cpol, unsigned flags,
-		u32 word, u8 bits)
-{
-	/* if (cpol == 0) this is SPI_MODE_1; else this is SPI_MODE_3 */
-
-	u32 oldbit = (!(word & (1<<(bits-1)))) << 31;
-	/* clock starts at inactive polarity */
-	for (word <<= (32 - bits); likely(bits); bits--) {
-
-		/* setup MSB (to slave) on leading edge */
-		setsck(spi, !cpol);
-		if ((flags & SPI_MASTER_NO_TX) == 0) {
-			if ((word & (1 << 31)) != oldbit) {
-				setmosi(spi, word & (1 << 31));
-				oldbit = word & (1 << 31);
-			}
-		}
-		spidelay(nsecs); /* T(setup) */
-
-		setsck(spi, cpol);
-		spidelay(nsecs);
-
-		/* sample MSB (from slave) on trailing edge */
-		word <<= 1;
-		if ((flags & SPI_MASTER_NO_RX) == 0)
-			word |= getmiso(spi);
-	}
-	return word;
-}
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_eeprom_93xx46.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_eeprom_93xx46.c
deleted file mode 100644
index 0f65d26774b3..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_eeprom_93xx46.c
+++ /dev/null
@@ -1,558 +0,0 @@
-/*
- * Driver for 93xx46 EEPROMs
- *
- * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/delay.h>
-#include <linux/device.h>
-#include <linux/gpio/consumer.h>
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/mutex.h>
-#include <linux/of.h>
-#include <linux/of_device.h>
-#include <linux/of_gpio.h>
-#include <linux/slab.h>
-#include <linux/spi/spi.h>
-#include <linux/nvmem-provider.h>
-#include <linux/eeprom_93xx46.h>
-#include <linux/string.h>
-
-#define mem_clear(data, size) memset((data), 0, (size))
-
-#define OP_START	0x4
-#define OP_WRITE	(OP_START | 0x1)
-#define OP_READ		(OP_START | 0x2)
-#define ADDR_EWDS	0x00
-#define ADDR_ERAL	0x20
-#define ADDR_EWEN	0x30
-
-static int g_wb_eeprom_93xx46_debug = 0;
-
-module_param(g_wb_eeprom_93xx46_debug, int, S_IRUGO | S_IWUSR);
-
-#define SPI_93xx46_DEBUG_VERBOSE(fmt, args...) do {                                        \
-    if (g_wb_eeprom_93xx46_debug) { \
-        printk(KERN_INFO "[EEPROM-93xx46][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-struct eeprom_93xx46_devtype_data {
-	unsigned int quirks;
-};
-
-static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = {
-	.quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ |
-		  EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH,
-};
-
-struct eeprom_93xx46_dev {
-	struct spi_device *spi;
-	struct eeprom_93xx46_platform_data *pdata;
-	struct mutex lock;
-	struct nvmem_config nvmem_config;
-	struct nvmem_device *nvmem;
-	int addrlen;
-	int size;
-};
-
-static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
-{
-	return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
-}
-
-static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
-{
-	return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
-}
-
-static int eeprom_93xx46_read(void *priv, unsigned int off,
-			      void *val, size_t count)
-{
-	struct eeprom_93xx46_dev *edev = priv;
-	char *buf = val;
-	int err = 0;
-
-	if (unlikely(off >= edev->size))
-		return 0;
-	if ((off + count) > edev->size)
-		count = edev->size - off;
-	if (unlikely(!count))
-		return count;
-
-	mutex_lock(&edev->lock);
-
-	if (edev->pdata->prepare)
-		edev->pdata->prepare(edev);
-
-	while (count) {
-		struct spi_message m;
-		struct spi_transfer t[2] = { { 0 } };
-		u16 cmd_addr = OP_READ << edev->addrlen;
-		size_t nbytes = count;
-		int bits;
-        int data_bit;
-
-		if (edev->addrlen == 7) {
-			cmd_addr |= off & 0x7f;
-			bits = 10;
-            data_bit = 8;
-			if (has_quirk_single_word_read(edev))
-				nbytes = 1;
-		} else {
-			cmd_addr |= (off >> 1) & 0x3f;
-			bits = 9;
-            data_bit = 16;
-			if (has_quirk_single_word_read(edev))
-				nbytes = 2;
-		}
-
-		dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
-			cmd_addr, edev->spi->max_speed_hz);
-
-		spi_message_init(&m);
-
-		t[0].tx_buf = (char *)&cmd_addr;
-		t[0].len = 2;
-		t[0].bits_per_word = bits;
-		spi_message_add_tail(&t[0], &m);
-
-		t[1].rx_buf = buf;
-		t[1].len = nbytes;
-		t[1].bits_per_word = data_bit;
-		spi_message_add_tail(&t[1], &m);
-
-		err = spi_sync(edev->spi, &m);
-		/* have to wait at least Tcsl ns */
-		ndelay(250);
-
-		if (err) {
-			dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
-				nbytes, (int)off, err);
-			break;
-		}
-
-		buf += nbytes;
-		off += nbytes;
-		count -= nbytes;
-	}
-
-	if (edev->pdata->finish)
-		edev->pdata->finish(edev);
-
-	mutex_unlock(&edev->lock);
-
-	return err;
-}
-
-static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
-{
-	struct spi_message m;
-	struct spi_transfer t;
-	int bits, ret;
-	u16 cmd_addr;
-
-	cmd_addr = OP_START << edev->addrlen;
-	if (edev->addrlen == 7) {
-		cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
-		bits = 10;
-	} else {
-		cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
-		bits = 9;
-	}
-
-	if (has_quirk_instruction_length(edev)) {
-		cmd_addr <<= 2;
-		bits += 2;
-	}
-
-	dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
-			is_on ? "en" : "ds", cmd_addr, bits);
-
-	spi_message_init(&m);
-	mem_clear(&t, sizeof(t));
-
-	t.tx_buf = &cmd_addr;
-	t.len = 2;
-	t.bits_per_word = bits;
-	spi_message_add_tail(&t, &m);
-
-	mutex_lock(&edev->lock);
-
-	if (edev->pdata->prepare)
-		edev->pdata->prepare(edev);
-
-	ret = spi_sync(edev->spi, &m);
-	/* have to wait at least Tcsl ns */
-	ndelay(250);
-	if (ret)
-		dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
-			is_on ? "en" : "dis", ret);
-
-	if (edev->pdata->finish)
-		edev->pdata->finish(edev);
-
-	mutex_unlock(&edev->lock);
-	return ret;
-}
-
-static ssize_t
-eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
-			 char *buf, unsigned off)
-{
-	struct spi_message m;
-	struct spi_transfer t[2];
-	int bits, data_len, ret;
-	u16 cmd_addr;
-    int data_bit;
-
-	cmd_addr = OP_WRITE << edev->addrlen;
-
-	if (edev->addrlen == 7) {
-		cmd_addr |= off & 0x7f;
-		bits = 10;
-		data_len = 1;
-        data_bit = 8;
-	} else {
-		cmd_addr |= (off >> 1) & 0x3f;
-		bits = 9;
-		data_len = 2;
-        data_bit = 16;
-	}
-
-	dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
-
-	spi_message_init(&m);
-	mem_clear(t, sizeof(t));
-
-	t[0].tx_buf = (char *)&cmd_addr;
-	t[0].len = 2;
-	t[0].bits_per_word = bits;
-	spi_message_add_tail(&t[0], &m);
-
-	t[1].tx_buf = buf;
-	t[1].len = data_len;
-	t[1].bits_per_word = data_bit;
-	spi_message_add_tail(&t[1], &m);
-
-	ret = spi_sync(edev->spi, &m);
-	/* have to wait program cycle time Twc ms */
-	mdelay(6);
-	return ret;
-}
-
-static int eeprom_93xx46_write(void *priv, unsigned int off,
-				   void *val, size_t count)
-{
-	struct eeprom_93xx46_dev *edev = priv;
-	char *buf = val;
-	int i, ret, step = 1;
-
-	if (unlikely(off >= edev->size))
-		return -EFBIG;
-	if ((off + count) > edev->size)
-		count = edev->size - off;
-	if (unlikely(!count))
-		return count;
-
-	/* only write even number of bytes on 16-bit devices */
-	if (edev->addrlen == 6) {
-		step = 2;
-		count &= ~1;
-	}
-
-	/* erase/write enable */
-	ret = eeprom_93xx46_ew(edev, 1);
-	if (ret)
-		return ret;
-
-	mutex_lock(&edev->lock);
-
-	if (edev->pdata->prepare)
-		edev->pdata->prepare(edev);
-
-	for (i = 0; i < count; i += step) {
-		ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
-		if (ret) {
-			dev_err(&edev->spi->dev, "write failed at %d: %d\n",
-				(int)off + i, ret);
-			break;
-		}
-	}
-
-	if (edev->pdata->finish)
-		edev->pdata->finish(edev);
-
-	mutex_unlock(&edev->lock);
-
-	/* erase/write disable */
-	eeprom_93xx46_ew(edev, 0);
-	return ret;
-}
-
-static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
-{
-	struct eeprom_93xx46_platform_data *pd = edev->pdata;
-	struct spi_message m;
-	struct spi_transfer t;
-	int bits, ret;
-	u16 cmd_addr;
-
-	cmd_addr = OP_START << edev->addrlen;
-	if (edev->addrlen == 7) {
-		cmd_addr |= ADDR_ERAL << 1;
-		bits = 10;
-	} else {
-		cmd_addr |= ADDR_ERAL;
-		bits = 9;
-	}
-
-	if (has_quirk_instruction_length(edev)) {
-		cmd_addr <<= 2;
-		bits += 2;
-	}
-
-	dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
-
-	spi_message_init(&m);
-	mem_clear(&t, sizeof(t));
-
-	t.tx_buf = &cmd_addr;
-	t.len = 2;
-	t.bits_per_word = bits;
-	spi_message_add_tail(&t, &m);
-
-	mutex_lock(&edev->lock);
-
-	if (edev->pdata->prepare)
-		edev->pdata->prepare(edev);
-
-	ret = spi_sync(edev->spi, &m);
-	if (ret)
-		dev_err(&edev->spi->dev, "erase error %d\n", ret);
-	/* have to wait erase cycle time Tec ms */
-	mdelay(6);
-
-	if (pd->finish)
-		pd->finish(edev);
-
-	mutex_unlock(&edev->lock);
-	return ret;
-}
-
-static ssize_t eeprom_93xx46_store_erase(struct device *dev,
-					 struct device_attribute *attr,
-					 const char *buf, size_t count)
-{
-	struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
-	int erase = 0, ret;
-
-	sscanf(buf, "%d", &erase);
-	if (erase) {
-		ret = eeprom_93xx46_ew(edev, 1);
-		if (ret)
-			return ret;
-		ret = eeprom_93xx46_eral(edev);
-		if (ret)
-			return ret;
-		ret = eeprom_93xx46_ew(edev, 0);
-		if (ret)
-			return ret;
-	}
-	return count;
-}
-static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
-
-static void select_assert(void *context)
-{
-	struct eeprom_93xx46_dev *edev = context;
-
-	gpiod_set_value_cansleep(edev->pdata->select, 1);
-}
-
-static void select_deassert(void *context)
-{
-	struct eeprom_93xx46_dev *edev = context;
-
-	gpiod_set_value_cansleep(edev->pdata->select, 0);
-}
-
-static const struct of_device_id eeprom_93xx46_of_table[] = {
-	{ .compatible = "eeprom-93xx46", },
-	{ .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, },
-	{}
-};
-MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table);
-
-static int eeprom_93xx46_probe_dt(struct spi_device *spi)
-{
-	const struct of_device_id *of_id =
-		of_match_device(eeprom_93xx46_of_table, &spi->dev);
-	struct device_node *np = spi->dev.of_node;
-	struct eeprom_93xx46_platform_data *pd;
-	u32 tmp;
-	int gpio;
-	enum of_gpio_flags of_flags;
-	int ret;
-
-	pd = devm_kzalloc(&spi->dev, sizeof(*pd), GFP_KERNEL);
-	if (!pd)
-		return -ENOMEM;
-
-	ret = of_property_read_u32(np, "data-size", &tmp);
-	if (ret < 0) {
-		dev_err(&spi->dev, "data-size property not found\n");
-		return ret;
-	}
-
-	if (tmp == 8) {
-		pd->flags |= EE_ADDR8;
-	} else if (tmp == 16) {
-		pd->flags |= EE_ADDR16;
-	} else {
-		dev_err(&spi->dev, "invalid data-size (%d)\n", tmp);
-		return -EINVAL;
-	}
-
-	if (of_property_read_bool(np, "read-only"))
-		pd->flags |= EE_READONLY;
-
-	gpio = of_get_named_gpio_flags(np, "select-gpios", 0, &of_flags);
-	if (gpio_is_valid(gpio)) {
-		unsigned long flags =
-			of_flags == OF_GPIO_ACTIVE_LOW ? GPIOF_ACTIVE_LOW : 0;
-
-		ret = devm_gpio_request_one(&spi->dev, gpio, flags,
-					    "eeprom_93xx46_select");
-		if (ret)
-			return ret;
-
-		pd->select = gpio_to_desc(gpio);
-		pd->prepare = select_assert;
-		pd->finish = select_deassert;
-
-		gpiod_direction_output(pd->select, 0);
-	}
-
-    if (of_id) {
-        if (of_id->data) {
-            const struct eeprom_93xx46_devtype_data *data = of_id->data;
-
-            pd->quirks = data->quirks;
-        }
-    }
-
-	spi->dev.platform_data = pd;
-
-	return 0;
-}
-
-static int eeprom_93xx46_probe(struct spi_device *spi)
-{
-	struct eeprom_93xx46_platform_data *pd;
-	struct eeprom_93xx46_dev *edev;
-	int err;
-
-	if (spi->dev.of_node) {
-		err = eeprom_93xx46_probe_dt(spi);
-		if (err < 0)
-			return err;
-	}
-
-	pd = spi->dev.platform_data;
-	if (!pd) {
-		dev_err(&spi->dev, "missing platform data\n");
-		return -ENODEV;
-	}
-
-	edev = kzalloc(sizeof(*edev), GFP_KERNEL);
-	if (!edev)
-		return -ENOMEM;
-
-	if (pd->flags & EE_ADDR8)
-		edev->addrlen = 7;
-	else if (pd->flags & EE_ADDR16)
-		edev->addrlen = 6;
-	else {
-		dev_err(&spi->dev, "unspecified address type\n");
-		err = -EINVAL;
-		goto fail;
-	}
-
-	mutex_init(&edev->lock);
-
-	edev->spi = spi;
-	edev->pdata = pd;
-
-	edev->size = 128;
-	edev->nvmem_config.name = dev_name(&spi->dev);
-	edev->nvmem_config.dev = &spi->dev;
-	edev->nvmem_config.read_only = pd->flags & EE_READONLY;
-	edev->nvmem_config.root_only = true;
-	edev->nvmem_config.owner = THIS_MODULE;
-	edev->nvmem_config.compat = true;
-	edev->nvmem_config.base_dev = &spi->dev;
-	edev->nvmem_config.reg_read = eeprom_93xx46_read;
-	edev->nvmem_config.reg_write = eeprom_93xx46_write;
-	edev->nvmem_config.priv = edev;
-	edev->nvmem_config.stride = 4;
-	edev->nvmem_config.word_size = 1;
-	edev->nvmem_config.size = edev->size;
-
-	edev->nvmem = nvmem_register(&edev->nvmem_config);
-	if (IS_ERR(edev->nvmem)) {
-		err = PTR_ERR(edev->nvmem);
-		goto fail;
-	}
-
-    if (g_wb_eeprom_93xx46_debug) {
-        dev_info(&spi->dev, "%d-bit eeprom %s\n",
-            (pd->flags & EE_ADDR8) ? 8 : 16,
-            (pd->flags & EE_READONLY) ? "(readonly)" : "");
-    }
-
-	if (!(pd->flags & EE_READONLY)) {
-		if (device_create_file(&spi->dev, &dev_attr_erase))
-			dev_err(&spi->dev, "can't create erase interface\n");
-	}
-
-	spi_set_drvdata(spi, edev);
-	return 0;
-fail:
-	kfree(edev);
-	return err;
-}
-
-static void eeprom_93xx46_remove(struct spi_device *spi)
-{
-	struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
-
-	nvmem_unregister(edev->nvmem);
-
-	if (!(edev->pdata->flags & EE_READONLY))
-		device_remove_file(&spi->dev, &dev_attr_erase);
-
-	kfree(edev);
-	return;
-}
-
-static struct spi_driver wb_eeprom_93xx46_driver = {
-	.driver = {
-		.name	= "wb_93xx46",
-		.of_match_table = of_match_ptr(eeprom_93xx46_of_table),
-	},
-	.probe		= eeprom_93xx46_probe,
-	.remove		= eeprom_93xx46_remove,
-};
-
-module_spi_driver(wb_eeprom_93xx46_driver);
-
-MODULE_LICENSE("GPL");
-MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
-MODULE_AUTHOR("support");
-MODULE_ALIAS("spi:93xx46");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/phy/wb_mdio_gpio_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mdio_gpio_device.c
similarity index 100%
rename from platform/broadcom/sonic-platform-modules-micas/common/modules/phy/wb_mdio_gpio_device.c
rename to platform/broadcom/sonic-platform-modules-micas/common/modules/wb_mdio_gpio_device.c
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_93xx46.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_93xx46.c
deleted file mode 100644
index abc4f1567aec..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_93xx46.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/*
- * EEPROMs access control driver for display configuration EEPROMs
- * on DigsyMTC board.
- *
- * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/module.h>
-#include <linux/gpio.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/spi_gpio.h>
-#include <linux/eeprom_93xx46.h>
-
-#define DEFAULT_SPI_BUS_NUM     (0)
-#define DEFAULT_SPI_CS_NUM      (0)
-#define DEFAULT_SPI_HZ          (100000)
-
-#define GPIO_EEPROM_CS          (-1)
-
-int g_wb_spi_93xx46_debug = 0;
-int g_wb_spi_93xx46_error = 0;
-int spi_bus_num = DEFAULT_SPI_BUS_NUM;
-int spi_cs_gpio = GPIO_EEPROM_CS;
-
-module_param(g_wb_spi_93xx46_debug, int, S_IRUGO | S_IWUSR);
-module_param(g_wb_spi_93xx46_error, int, S_IRUGO | S_IWUSR);
-module_param(spi_bus_num, int, S_IRUGO | S_IWUSR);
-module_param(spi_cs_gpio, int, S_IRUGO | S_IWUSR);
-
-#define SPI_93xx46_DEBUG_VERBOSE(fmt, args...) do {                                        \
-    if (g_wb_spi_93xx46_debug) { \
-        printk(KERN_INFO "[SPI-93xx46][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-#define SPI_93xx46_DEBUG_ERROR(fmt, args...) do {                                        \
-    if (g_wb_spi_93xx46_error) { \
-        printk(KERN_ERR "[SPI-93xx46][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-struct eeprom_93xx46_platform_data eeprom_data = {
-    .flags      = EE_ADDR16,
-    .quirks     = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ,
-};
-
-struct spi_board_info eeprom_93xx46_info __initdata = {
-        .modalias           = "wb_93xx46",
-        .max_speed_hz       = DEFAULT_SPI_HZ,
-        .bus_num            = DEFAULT_SPI_BUS_NUM,
-        .chip_select        = DEFAULT_SPI_CS_NUM,
-        .mode               = SPI_MODE_0 | SPI_CS_HIGH,
-        .controller_data    = (void *)GPIO_EEPROM_CS,
-        .platform_data      = &eeprom_data,
-};
-
-static struct spi_device *g_spi_device;
-
-static int __init wb_spi_93xx46_init(void)
-{
-    struct spi_master *master;
-
-    SPI_93xx46_DEBUG_VERBOSE("Enter.\n");
-
-    eeprom_93xx46_info.bus_num = spi_bus_num;
-    eeprom_93xx46_info.controller_data = (void *)(long)spi_cs_gpio;
-    master = spi_busnum_to_master(eeprom_93xx46_info.bus_num);
-    if (!master) {
-        SPI_93xx46_DEBUG_ERROR("get bus_num %u spi master failed.\n",
-            eeprom_93xx46_info.bus_num);
-        return -EINVAL;
-    }
-
-    g_spi_device = spi_new_device(master, &eeprom_93xx46_info);
-    put_device(&master->dev);
-    if (!g_spi_device) {
-        SPI_93xx46_DEBUG_ERROR("register spi new device failed.\n");
-        return -EPERM;
-    }
-
-    if (g_wb_spi_93xx46_debug) {
-        dev_info(&g_spi_device->dev, "register %u bus_num spi 93xx46 eeprom success\n",
-            eeprom_93xx46_info.bus_num);
-    }
-
-    return 0;
-}
-
-static void __exit wb_spi_93xx46_exit(void)
-{
-    spi_unregister_device(g_spi_device);
-
-    if (g_wb_spi_93xx46_debug) {
-        dev_info(&g_spi_device->dev, "unregister spi 93xx46 eeprom success\n");
-    }
-
-    return;
-}
-
-module_init(wb_spi_93xx46_init);
-module_exit(wb_spi_93xx46_exit);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("create 93xx46 eeprom device");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio.c
deleted file mode 100644
index 16408f067be1..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_gpio.c
+++ /dev/null
@@ -1,477 +0,0 @@
-/*
- * SPI master driver using generic bitbanged GPIO
- *
- * Copyright (C) 2006,2008 David Brownell
- * Copyright (C) 2017 Linus Walleij
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/gpio/consumer.h>
-#include <linux/of.h>
-#include <linux/of_device.h>
-
-#include <linux/spi/spi.h>
-#include <linux/spi/spi_bitbang.h>
-#include <linux/spi/spi_gpio.h>
-
-/*
- * This bitbanging SPI master driver should help make systems usable
- * when a native hardware SPI engine is not available, perhaps because
- * its driver isn't yet working or because the I/O pins it requires
- * are used for other purposes.
- *
- * platform_device->driver_data ... points to spi_gpio
- *
- * spi->controller_state ... reserved for bitbang framework code
- * spi->controller_data ... holds chipselect GPIO
- *
- * spi->master->dev.driver_data ... points to spi_gpio->bitbang
- */
-
-struct spi_gpio {
-	struct spi_bitbang		bitbang;
-	struct spi_gpio_platform_data	pdata;
-	struct platform_device		*pdev;
-	struct gpio_desc		*sck;
-	struct gpio_desc		*miso;
-	struct gpio_desc		*mosi;
-	struct gpio_desc		**cs_gpios;
-	bool				has_cs;
-};
-
-/*----------------------------------------------------------------------*/
-
-/*
- * Because the overhead of going through four GPIO procedure calls
- * per transferred bit can make performance a problem, this code
- * is set up so that you can use it in either of two ways:
- *
- *   - The slow generic way:  set up platform_data to hold the GPIO
- *     numbers used for MISO/MOSI/SCK, and issue procedure calls for
- *     each of them.  This driver can handle several such busses.
- *
- *   - The quicker inlined way:  only helps with platform GPIO code
- *     that inlines operations for constant GPIOs.  This can give
- *     you tight (fast!) inner loops, but each such bus needs a
- *     new driver.  You'll define a new C file, with Makefile and
- *     Kconfig support; the C code can be a total of six lines:
- *
- *		#define DRIVER_NAME	"myboard_spi2"
- *		#define	SPI_MISO_GPIO	119
- *		#define	SPI_MOSI_GPIO	120
- *		#define	SPI_SCK_GPIO	121
- *		#define	SPI_N_CHIPSEL	4
- *		#include "spi-gpio.c"
- */
-
-#ifndef DRIVER_NAME
-#define DRIVER_NAME	"wb_spi_gpio"
-
-#define GENERIC_BITBANG	/* vs tight inlines */
-
-#endif
-
-/*----------------------------------------------------------------------*/
-
-static inline struct spi_gpio *__pure
-spi_to_spi_gpio(const struct spi_device *spi)
-{
-	const struct spi_bitbang	*bang;
-	struct spi_gpio			*spi_gpio;
-
-	bang = spi_master_get_devdata(spi->master);
-	spi_gpio = container_of(bang, struct spi_gpio, bitbang);
-	return spi_gpio;
-}
-
-static inline struct spi_gpio_platform_data *__pure
-spi_to_pdata(const struct spi_device *spi)
-{
-	return &spi_to_spi_gpio(spi)->pdata;
-}
-
-/* These helpers are in turn called by the bitbang inlines */
-static inline void setsck(const struct spi_device *spi, int is_on)
-{
-	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
-
-	gpiod_set_value_cansleep(spi_gpio->sck, is_on);
-}
-
-static inline void setmosi(const struct spi_device *spi, int is_on)
-{
-	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
-
-	gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
-}
-
-static inline int getmiso(const struct spi_device *spi)
-{
-	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
-
-	if (spi->mode & SPI_3WIRE)
-		return !!gpiod_get_value_cansleep(spi_gpio->mosi);
-	else
-		return !!gpiod_get_value_cansleep(spi_gpio->miso);
-}
-
-/*
- * NOTE:  this clocks "as fast as we can".  It "should" be a function of the
- * requested device clock.  Software overhead means we usually have trouble
- * reaching even one Mbit/sec (except when we can inline bitops), so for now
- * we'll just assume we never need additional per-bit slowdowns.
- */
-#define spidelay(nsecs)	do {} while (0)
-
-#include "spi-bitbang-txrx.h"
-
-/*
- * These functions can leverage inline expansion of GPIO calls to shrink
- * costs for a txrx bit, often by factors of around ten (by instruction
- * count).  That is particularly visible for larger word sizes, but helps
- * even with default 8-bit words.
- *
- * REVISIT overheads calling these functions for each word also have
- * significant performance costs.  Having txrx_bufs() calls that inline
- * the txrx_word() logic would help performance, e.g. on larger blocks
- * used with flash storage or MMC/SD.  There should also be ways to make
- * GCC be less stupid about reloading registers inside the I/O loops,
- * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
- */
-
-static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
-		unsigned nsecs, u32 word, u8 bits, unsigned flags)
-{
-	return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
-}
-
-static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
-		unsigned nsecs, u32 word, u8 bits, unsigned flags)
-{
-	return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
-}
-
-static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
-		unsigned nsecs, u32 word, u8 bits, unsigned flags)
-{
-	return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
-}
-
-static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
-		unsigned nsecs, u32 word, u8 bits, unsigned flags)
-{
-	return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
-}
-
-/*
- * These functions do not call setmosi or getmiso if respective flag
- * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
- * call when such pin is not present or defined in the controller.
- * A separate set of callbacks is defined to get highest possible
- * speed in the generic case (when both MISO and MOSI lines are
- * available), as optimiser will remove the checks when argument is
- * constant.
- */
-
-static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
-		unsigned nsecs, u32 word, u8 bits, unsigned flags)
-{
-	flags = spi->master->flags;
-	return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
-}
-
-static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
-		unsigned nsecs, u32 word, u8 bits, unsigned flags)
-{
-	flags = spi->master->flags;
-	return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
-}
-
-static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
-		unsigned nsecs, u32 word, u8 bits, unsigned flags)
-{
-	flags = spi->master->flags;
-	return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
-}
-
-static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
-		unsigned nsecs, u32 word, u8 bits, unsigned flags)
-{
-	flags = spi->master->flags;
-	return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
-}
-
-/*----------------------------------------------------------------------*/
-
-static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
-{
-	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
-
-	/* set initial clock line level */
-	if (is_active)
-		gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
-
-	/* Drive chip select line, if we have one */
-	if (spi_gpio->has_cs) {
-		struct gpio_desc *cs = spi_gpio->cs_gpios[spi->chip_select];
-
-		/* SPI chip selects are normally active-low */
-		gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
-	}
-}
-
-static int spi_gpio_setup(struct spi_device *spi)
-{
-	struct gpio_desc	*cs;
-	int			status = 0;
-	struct spi_gpio		*spi_gpio = spi_to_spi_gpio(spi);
-
-	/*
-	 * The CS GPIOs have already been
-	 * initialized from the descriptor lookup.
-	 */
-	cs = spi_gpio->cs_gpios[spi->chip_select];
-	if (!spi->controller_state && cs)
-		status = gpiod_direction_output(cs,
-						!(spi->mode & SPI_CS_HIGH));
-
-	if (!status)
-		status = spi_bitbang_setup(spi);
-
-	return status;
-}
-
-static int spi_gpio_set_direction(struct spi_device *spi, bool output)
-{
-	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
-
-	if (output)
-		return gpiod_direction_output(spi_gpio->mosi, 1);
-	else
-		return gpiod_direction_input(spi_gpio->mosi);
-}
-
-static void spi_gpio_cleanup(struct spi_device *spi)
-{
-	spi_bitbang_cleanup(spi);
-}
-
-/*
- * It can be convenient to use this driver with pins that have alternate
- * functions associated with a "native" SPI controller if a driver for that
- * controller is not available, or is missing important functionality.
- *
- * On platforms which can do so, configure MISO with a weak pullup unless
- * there's an external pullup on that signal.  That saves power by avoiding
- * floating signals.  (A weak pulldown would save power too, but many
- * drivers expect to see all-ones data as the no slave "response".)
- */
-static int spi_gpio_request(struct device *dev,
-			    struct spi_gpio *spi_gpio,
-			    unsigned int num_chipselects,
-			    u16 *mflags)
-{
-	int i;
-
-	spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
-	if (IS_ERR(spi_gpio->mosi))
-		return PTR_ERR(spi_gpio->mosi);
-	if (!spi_gpio->mosi)
-		/* HW configuration without MOSI pin */
-		*mflags |= SPI_MASTER_NO_TX;
-
-	spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
-	if (IS_ERR(spi_gpio->miso))
-		return PTR_ERR(spi_gpio->miso);
-	/*
-	 * No setting SPI_MASTER_NO_RX here - if there is only a MOSI
-	 * pin connected the host can still do RX by changing the
-	 * direction of the line.
-	 */
-
-	spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
-	if (IS_ERR(spi_gpio->sck))
-		return PTR_ERR(spi_gpio->sck);
-
-	for (i = 0; i < num_chipselects; i++) {
-		spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs",
-							     i, GPIOD_OUT_HIGH);
-		if (IS_ERR(spi_gpio->cs_gpios[i]))
-			return PTR_ERR(spi_gpio->cs_gpios[i]);
-	}
-
-	return 0;
-}
-
-#ifdef CONFIG_OF
-static const struct of_device_id spi_gpio_dt_ids[] = {
-	{ .compatible = "wb-spi-gpio" },
-	{}
-};
-MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
-
-static int spi_gpio_probe_dt(struct platform_device *pdev)
-{
-	int ret;
-	u32 tmp;
-	struct spi_gpio_platform_data	*pdata;
-	struct device_node *np = pdev->dev.of_node;
-	const struct of_device_id *of_id =
-			of_match_device(spi_gpio_dt_ids, &pdev->dev);
-
-	if (!of_id)
-		return 0;
-
-	pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
-	if (!pdata)
-		return -ENOMEM;
-
-	ret = of_property_read_u32(np, "num-chipselects", &tmp);
-	if (ret < 0) {
-		dev_err(&pdev->dev, "num-chipselects property not found\n");
-		goto error_free;
-	}
-
-	pdata->num_chipselect = tmp;
-	pdev->dev.platform_data = pdata;
-
-	return 1;
-
-error_free:
-	devm_kfree(&pdev->dev, pdata);
-	return ret;
-}
-#else
-static inline int spi_gpio_probe_dt(struct platform_device *pdev)
-{
-	return 0;
-}
-#endif
-
-static int spi_gpio_probe(struct platform_device *pdev)
-{
-	int				status;
-	struct spi_master		*master;
-	struct spi_gpio			*spi_gpio;
-	struct spi_gpio_platform_data	*pdata;
-	u16 master_flags = 0;
-	bool use_of = 0;
-
-	status = spi_gpio_probe_dt(pdev);
-	if (status < 0)
-		return status;
-	if (status > 0)
-		use_of = 1;
-
-	pdata = dev_get_platdata(&pdev->dev);
-#ifdef GENERIC_BITBANG
-	if (!pdata || (!use_of && !pdata->num_chipselect))
-		return -ENODEV;
-#endif
-
-	master = spi_alloc_master(&pdev->dev, sizeof(*spi_gpio));
-	if (!master)
-		return -ENOMEM;
-
-	spi_gpio = spi_master_get_devdata(master);
-
-	spi_gpio->cs_gpios = devm_kcalloc(&pdev->dev,
-				pdata->num_chipselect,
-				sizeof(*spi_gpio->cs_gpios),
-				GFP_KERNEL);
-	if (!spi_gpio->cs_gpios)
-		return -ENOMEM;
-
-	platform_set_drvdata(pdev, spi_gpio);
-
-	/* Determine if we have chip selects connected */
-	spi_gpio->has_cs = !!pdata->num_chipselect;
-
-	spi_gpio->pdev = pdev;
-	if (pdata)
-		spi_gpio->pdata = *pdata;
-
-	status = spi_gpio_request(&pdev->dev, spi_gpio,
-				  pdata->num_chipselect, &master_flags);
-	if (status)
-		return status;
-
-	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
-	master->mode_bits = SPI_3WIRE | SPI_CPHA | SPI_CPOL | SPI_CS_HIGH;
-	master->flags = master_flags;
-	master->bus_num = pdev->id;
-	/* The master needs to think there is a chipselect even if not connected */
-	master->num_chipselect = spi_gpio->has_cs ? pdata->num_chipselect : 1;
-	master->setup = spi_gpio_setup;
-	master->cleanup = spi_gpio_cleanup;
-
-	if (pdev->dev.of_node) {
-		master->dev.of_node = pdev->dev.of_node;
-	}
-
-	spi_gpio->bitbang.master = master;
-	spi_gpio->bitbang.chipselect = spi_gpio_chipselect;
-	spi_gpio->bitbang.set_line_direction = spi_gpio_set_direction;
-
-	if ((master_flags & SPI_MASTER_NO_TX) == 0) {
-		spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
-		spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
-		spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
-		spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
-	} else {
-		spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
-		spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
-		spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
-		spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
-	}
-	spi_gpio->bitbang.setup_transfer = spi_bitbang_setup_transfer;
-
-	status = spi_bitbang_start(&spi_gpio->bitbang);
-	if (status)
-		spi_master_put(master);
-
-	return status;
-}
-
-static int spi_gpio_remove(struct platform_device *pdev)
-{
-	struct spi_gpio			*spi_gpio;
-	struct spi_gpio_platform_data	*pdata;
-
-	spi_gpio = platform_get_drvdata(pdev);
-	pdata = dev_get_platdata(&pdev->dev);
-
-	/* stop() unregisters child devices too */
-	spi_bitbang_stop(&spi_gpio->bitbang);
-
-	spi_master_put(spi_gpio->bitbang.master);
-
-	return 0;
-}
-
-MODULE_ALIAS("platform:" DRIVER_NAME);
-
-static struct platform_driver spi_gpio_driver = {
-	.driver = {
-		.name	= DRIVER_NAME,
-		.of_match_table = of_match_ptr(spi_gpio_dt_ids),
-	},
-	.probe		= spi_gpio_probe,
-	.remove		= spi_gpio_remove,
-};
-module_platform_driver(spi_gpio_driver);
-
-MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
-MODULE_AUTHOR("support");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_nor_device.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_nor_device.c
deleted file mode 100644
index 4196601f717b..000000000000
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/wb_spi_nor_device.c
+++ /dev/null
@@ -1,87 +0,0 @@
-#include <linux/module.h>
-#include <linux/gpio.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/spi_gpio.h>
-
-/* The SPI Bus number that the device is mounted on can be specified manually when this module is loaded */
-#define DEFAULT_SPI_BUS_NUM     (0)
-#define DEFAULT_SPI_CS_NUM      (0)
-#define DEFAULT_SPI_HZ          (100000)
-
-int g_wb_spi_nor_dev_debug = 0;
-int g_wb_spi_nor_dev_error = 0;
-int spi_bus_num = DEFAULT_SPI_BUS_NUM;
-
-module_param(g_wb_spi_nor_dev_debug, int, S_IRUGO | S_IWUSR);
-module_param(g_wb_spi_nor_dev_error, int, S_IRUGO | S_IWUSR);
-module_param(spi_bus_num, int, S_IRUGO | S_IWUSR);
-
-#define SPI_NOR_DEV_DEBUG_VERBOSE(fmt, args...) do {                                        \
-    if (g_wb_spi_nor_dev_debug) { \
-        printk(KERN_INFO "[SPI_NOR_DEV][VER][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-#define SPI_NOR_DEV_DEBUG_ERROR(fmt, args...) do {                                        \
-    if (g_wb_spi_nor_dev_error) { \
-        printk(KERN_ERR "[SPI_NOR_DEV][ERR][func:%s line:%d]\r\n"fmt, __func__, __LINE__, ## args); \
-    } \
-} while (0)
-
-struct spi_board_info spi_nor_device_info __initdata= {
-    .modalias           = "mx25l6405d",
-    .bus_num            = DEFAULT_SPI_BUS_NUM,
-    .chip_select        = DEFAULT_SPI_CS_NUM,
-    .max_speed_hz       = 10 * 1000 * 1000,
-};
-
-static struct spi_device *g_spi_device;
-
-static int __init wb_spi_nor_dev_init(void)
-{
-    struct spi_master *master;
-
-    SPI_NOR_DEV_DEBUG_VERBOSE("Enter.\n");
-
-    spi_nor_device_info.bus_num = spi_bus_num;
-    master = spi_busnum_to_master(spi_nor_device_info.bus_num);  /* Get the controller according to the SPI Bus number */
-    if (!master) {
-        SPI_NOR_DEV_DEBUG_ERROR("get bus_num %u spi master failed.\n",
-            spi_nor_device_info.bus_num);
-        return -EINVAL;
-    }
-
-    g_spi_device = spi_new_device(master, &spi_nor_device_info);
-    put_device(&master->dev);
-    if (!g_spi_device) {
-        SPI_NOR_DEV_DEBUG_ERROR("register spi new device failed.\n");
-        return -EPERM;
-    }
-
-    if (g_wb_spi_nor_dev_debug) {
-        dev_info(&g_spi_device->dev, "register %u bus_num spi nor device success\n",
-            spi_nor_device_info.bus_num);
-    }
-
-    return 0;
-}
-
-static void __exit wb_spi_nor_dev_exit(void)
-{
-    spi_unregister_device(g_spi_device);
-
-    if (g_wb_spi_nor_dev_debug) {
-        dev_info(&g_spi_device->dev, "unregister spi nor device success\n");
-    }
-
-    return;
-}
-
-module_init(wb_spi_nor_dev_init);
-module_exit(wb_spi_nor_dev_exit);
-
-MODULE_AUTHOR("support");
-MODULE_DESCRIPTION("create spi nor device");
-MODULE_LICENSE("GPL");
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py
index 63d69f102b7a..cea20393195f 100755
--- a/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py
+++ b/platform/broadcom/sonic-platform-modules-micas/common/script/platform_sensors.py
@@ -243,12 +243,14 @@ def print_boarddcdc():
     if len(val_ret) != 0:
         print_info_str += toptile + '\n'
         for item in val_ret:
-            if float(item["dcdc_input"]) > float(item["dcdc_max"]) or float(item["dcdc_input"]) < float(item["dcdc_min"]):
-                item["dcdc_status"] = "NOT OK"
-                formatstr = nok_formatstr
+            if item.get('errcode', 0) == 0:
+                if float(item["dcdc_input"]) > float(item["dcdc_max"]) or float(item["dcdc_input"]) < float(item["dcdc_min"]):
+                    item["dcdc_status"] = "NOT OK"
+                    realformat = nok_formatstr
+                else:
+                    realformat = ok_formatstr
             else:
-                formatstr = ok_formatstr
-            realformat = formatstr if item.get('errcode', 0) == 0 else errformat
+                realformat = errformat
             print_info_str += realformat.format(**item) + '\n'
         print_console(print_info_str)
 
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/service/subnetwork.service b/platform/broadcom/sonic-platform-modules-micas/common/service/subnetwork.service
old mode 100755
new mode 100644

From 3b3579a3d80b89469bccb25958eb5401383f0d51 Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Tue, 14 May 2024 22:24:05 +0800
Subject: [PATCH 29/32] fix strncpy semgrep

Signed-off-by: philo <philo@micasnetworks.com>
---
 .../common/modules/linux/wb_pmbus_core.c                  | 4 ++--
 .../common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c       | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus_core.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus_core.c
index 7ede09a56986..3a86ade43b7e 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus_core.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/linux/wb_pmbus_core.c
@@ -1238,8 +1238,8 @@ static int pmbus_add_label(struct pmbus_data *data,
     snprintf(label->name, sizeof(label->name), "%s%d_label", name, seq);
     if (!index) {
         if (phase == 0xff)
-            strncpy(label->label, lstring,
-                sizeof(label->label) - 1);
+            strlcpy(label->label, lstring,
+                sizeof(label->label));
         else
             snprintf(label->label, sizeof(label->label), "%s.%d",
                  lstring, phase);
diff --git a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c
index 3d05621ef031..22962556eb0d 100644
--- a/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c
+++ b/platform/broadcom/sonic-platform-modules-micas/common/modules/plat_sysfs/dev_cfg/cfg/dfd_cfg.c
@@ -226,7 +226,7 @@ static int dfd_ko_cfg_add_str_item(int key, char *str, int line_num)
             return -1;
         }
         mem_clear(str_cfg, DFD_CFG_STR_MAX_LEN);
-        strncpy(str_cfg, str, DFD_CFG_STR_MAX_LEN - 1);
+        strlcpy(str_cfg, str, DFD_CFG_STR_MAX_LEN);
 
         rv = lnode_insert_node(&dfd_ko_cfg_list_root, key, str_cfg);
         if (rv == 0) {
@@ -240,7 +240,7 @@ static int dfd_ko_cfg_add_str_item(int key, char *str, int line_num)
     } else {
         DBG_DEBUG(DBG_WARN, "line%d: replace string item[%s->%s], key=0x%08x\n", line_num, str_cfg, str, key);
         mem_clear(str_cfg, DFD_CFG_STR_MAX_LEN);
-        strncpy(str_cfg, str, DFD_CFG_STR_MAX_LEN - 1);
+        strlcpy(str_cfg, str, DFD_CFG_STR_MAX_LEN);
     }
 
     return 0;
@@ -434,7 +434,7 @@ static void dfd_ko_cfg_set_info_ctrl_mem_value(info_ctrl_t *info_ctrl, info_ctrl
         break;
     case INFO_CTRL_MEM_FPATH:
         mem_clear(info_ctrl->fpath, sizeof(info_ctrl->fpath));
-        strncpy(info_ctrl->fpath, buf_val, sizeof(info_ctrl->fpath) - 1);
+        strlcpy(info_ctrl->fpath, buf_val, sizeof(info_ctrl->fpath));
         break;
     case INFO_CTRL_MEM_ADDR:
         dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->addr), line_num);
@@ -447,7 +447,7 @@ static void dfd_ko_cfg_set_info_ctrl_mem_value(info_ctrl_t *info_ctrl, info_ctrl
         break;
     case INFO_CTRL_MEM_STR_CONS:
         mem_clear(info_ctrl->str_cons, sizeof(info_ctrl->str_cons));
-        strncpy(info_ctrl->str_cons, buf_val, sizeof(info_ctrl->str_cons) - 1);
+        strlcpy(info_ctrl->str_cons, buf_val, sizeof(info_ctrl->str_cons));
         break;
     case INFO_CTRL_MEM_INT_EXTRA1:
         dfd_ko_cfg_get_value_from_char(buf_val, &(info_ctrl->int_extra1), line_num);

From 550654c34834b49e2b22be3e0b25d4e03b143a35 Mon Sep 17 00:00:00 2001
From: philo <philo@micasnetworks.com>
Date: Wed, 15 May 2024 10:39:56 +0800
Subject: [PATCH 30/32] fix-xml-to-lxml

Signed-off-by: philo <philo@micasnetworks.com>
---
 device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py
index bdeaf190f099..7a97218a2430 100644
--- a/device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py
+++ b/device/micas/x86_64-micas_m2-w6510-48v8c-r0/monitor.py
@@ -4,7 +4,7 @@
 #   * PSU
 #
 import os
-import xml.etree.ElementTree as ET
+from lxml import etree as ET
 import glob
 import json
 from decimal import Decimal
@@ -259,7 +259,7 @@ def getETValue(a, filename, tagname):
         root = status.getETroot(filename)
         for neighbor in root.iter(tagname):
             prob_t = {}
-            prob_t = neighbor.attrib
+            prob_t.update(neighbor.attrib)
             prob_t['errcode'] = 0
             prob_t['errmsg'] = ''
             for pros in neighbor.iter("property"):

From 177d9e57a57eb149526271a74e4246e6a03040d2 Mon Sep 17 00:00:00 2001
From: Philo <135693886+philo-micas@users.noreply.github.com>
Date: Thu, 16 May 2024 07:06:38 +0800
Subject: [PATCH 31/32] trigger rebuild

---
 .../sonic-platform-modules-micas/m2-w6510-48v8c/Makefile         | 1 +
 1 file changed, 1 insertion(+)

diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile
index 052a5a6a0773..8149a2701fb2 100644
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile
@@ -8,6 +8,7 @@ INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
 INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages
 INSTALL_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/plat_sysfs_cfg
 
+
 all:
 	$(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules
 	@if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi

From 1195cdc222aeda526a741d57525d5c408026caea Mon Sep 17 00:00:00 2001
From: Philo <135693886+philo-micas@users.noreply.github.com>
Date: Sun, 19 May 2024 07:05:16 +0800
Subject: [PATCH 32/32] trigger rebuild

---
 .../sonic-platform-modules-micas/m2-w6510-48v8c/Makefile         | 1 -
 1 file changed, 1 deletion(-)

diff --git a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile
index 8149a2701fb2..052a5a6a0773 100644
--- a/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile
+++ b/platform/broadcom/sonic-platform-modules-micas/m2-w6510-48v8c/Makefile
@@ -8,7 +8,6 @@ INSTALL_SCRIPT_DIR = $(SUB_BUILD_DIR)/usr/local/bin
 INSTALL_LIB_DIR = $(SUB_BUILD_DIR)/usr/lib/python3/dist-packages
 INSTALL_SYSFS_CFG_DIR = $(SUB_BUILD_DIR)/etc/plat_sysfs_cfg
 
-
 all:
 	$(MAKE) -C $(KBUILD_OUTPUT) M=$(DIR_KERNEL_SRC) modules
 	@if [ ! -d ${INSTALL_DIR} ]; then mkdir -p ${INSTALL_DIR} ;fi