From 7bea886f1d5a15c68e34c12195c927ed42fdf92e Mon Sep 17 00:00:00 2001 From: mssonicbld <79238446+mssonicbld@users.noreply.github.com> Date: Mon, 14 Aug 2023 18:32:40 +0800 Subject: [PATCH 1/4] [submodule] Update submodule sonic-utilities to the latest HEAD automatically (#16123) #### Why I did it src/sonic-utilities ``` * 5b492d54 - (HEAD -> master, origin/master, origin/HEAD) [chassis][voq] clear: Fix clear queuecounters to also clear VOQ counters (#2878) (2 days ago) [Patrick MacArthur] ``` #### How I did it #### How to verify it #### Description for the changelog --- src/sonic-utilities | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/sonic-utilities b/src/sonic-utilities index cf346a310a3a..5b492d546ef8 160000 --- a/src/sonic-utilities +++ b/src/sonic-utilities @@ -1 +1 @@ -Subproject commit cf346a310a3a8981905d57f31987a6c8d9aa5085 +Subproject commit 5b492d546ef8a76cd90c4d15f645df1c730184ae From dfe5ea6e5235cfafe179901a8872b26e6cbf78c3 Mon Sep 17 00:00:00 2001 From: Saikrishna Arcot Date: Mon, 14 Aug 2023 10:00:30 -0700 Subject: [PATCH 2/4] Fix the clean target reporting "Is a directory" error (#16029) ### Why I did it Since directories are being removed, the `-r` flag is required. Fixes #15922 ##### Work item tracking - Microsoft ADO **(number only)**: 24752770 --- slave.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/slave.mk b/slave.mk index 7603b5f8c453..2d5d8d840b37 100644 --- a/slave.mk +++ b/slave.mk @@ -1519,7 +1519,7 @@ SONIC_CLEAN_TARGETS += $(addsuffix -clean,$(addprefix $(TARGET_PATH)/, \ $(SONIC_SIMPLE_DOCKER_IMAGES) \ $(SONIC_INSTALLERS))) $(SONIC_CLEAN_TARGETS) :: $(TARGET_PATH)/%-clean : .platform - $(Q)rm -f $(TARGET_PATH)/$* target/versions/dockers/$(subst .gz,,$*) + $(Q)rm -rf $(TARGET_PATH)/$* target/versions/dockers/$(subst .gz,,$*) SONIC_CLEAN_STDEB_DEBS = $(addsuffix -clean,$(addprefix $(PYTHON_DEBS_PATH)/, \ $(SONIC_PYTHON_STDEB_DEBS))) From 1acafa48732c2f7f3c519e5b2ff51ee4eae6019f Mon Sep 17 00:00:00 2001 From: Nonodark Huang Date: Tue, 15 Aug 2023 06:56:03 +0800 Subject: [PATCH 3/4] [Ufispace][PDDF] Add PDDF support on S9110-32X, S8901-54XC, S7801-54XS and S6301-56ST (#16017) Why I did it Add PDDF support on following Ufispace platforms with Broadcom ASIC S9110-32X S8901-54XC S7801-54XS S6301-56ST How I did it Add PDDF configuration files, scripts and python files How to verify it Run pddf commands and show commands. Signed-off-by: nonodark --- .../UFISPACE-S6301-56ST/hwsku.json | 221 + .../UFISPACE-S6301-56ST/sai.profile | 1 + .../td3-x2-s6301-56st.config.bcm | 295 + .../custom_led.bin | Bin 0 -> 508 bytes .../x86_64-ufispace_s6301_56st-r0/default_sku | 1 + .../x86_64-ufispace_s6301_56st-r0/fancontrol | 10 + .../installer.conf | 4 + .../led_proc_init.soc | 4 + .../x86_64-ufispace_s6301_56st-r0/pcie.yaml | 178 + .../pddf/pd-plugin.json | 79 + .../pddf/pddf-device.json | 2277 +++++ .../pddf_support | 0 .../platform.json | 651 ++ .../platform_asic | 1 + .../platform_components.json | 10 + .../platform_env.conf | 2 + .../pmon_daemon_control.json | 9 + .../sensors.conf | 1 + .../system_health_monitoring_config.json | 15 + .../UFISPACE-S7801-54XS/hwsku.json | 166 + .../UFISPACE-S7801-54XS/sai.profile | 1 + .../td3-x5-s7801-54xs.config.bcm | 502 ++ .../custom_led.bin | Bin 0 -> 392 bytes .../x86_64-ufispace_s7801_54xs-r0/default_sku | 1 + .../x86_64-ufispace_s7801_54xs-r0/fancontrol | 10 + .../installer.conf | 4 + .../led_proc_init.soc | 3 + .../x86_64-ufispace_s7801_54xs-r0/pcie.yaml | 172 + .../pddf/pd-plugin.json | 97 + .../pddf/pddf-device.json | 7850 +++++++++++++++++ .../pddf_support | 0 .../platform.json | 691 ++ .../platform_asic | 1 + .../platform_components.json | 12 + .../platform_env.conf | 1 + .../pmon_daemon_control.json | 9 + .../sensors.conf | 1 + .../system_health_monitoring_config.json | 15 + .../UFISPACE-S8901-54XC/hwsku.json | 166 + .../UFISPACE-S8901-54XC/sai.profile | 1 + .../td3-x5-s8901-54xc.config.bcm | 502 ++ .../custom_led.bin | Bin 0 -> 392 bytes .../x86_64-ufispace_s8901_54xc-r0/default_sku | 1 + .../x86_64-ufispace_s8901_54xc-r0/fancontrol | 10 + .../installer.conf | 4 + .../led_proc_init.soc | 3 + .../x86_64-ufispace_s8901_54xc-r0/pcie.yaml | 172 + .../pddf/pd-plugin.json | 97 + .../pddf/pddf-device.json | 7850 +++++++++++++++++ .../pddf_support | 0 .../platform.json | 691 ++ .../platform_asic | 1 + .../platform_components.json | 12 + .../platform_env.conf | 1 + .../pmon_daemon_control.json | 9 + .../sensors.conf | 1 + .../system_health_monitoring_config.json | 15 + .../UFISPACE-S9110-32X/hwsku.json | 136 + .../UFISPACE-S9110-32X/sai.profile | 1 + .../td3-x7-s9110-32x.config.bcm | 671 ++ .../custom_led.bin | Bin 0 -> 640 bytes .../x86_64-ufispace_s9110_32x-r0/default_sku | 1 + .../x86_64-ufispace_s9110_32x-r0/fancontrol | 10 + .../installer.conf | 4 + .../led_proc_init.soc | 4 + .../x86_64-ufispace_s9110_32x-r0/pcie.yaml | 172 + .../pddf/pd-plugin.json | 85 + .../pddf/pddf-device-beta.json | 4629 ++++++++++ .../pddf/pddf-device-pvt.json | 4585 ++++++++++ .../pddf/pddf-device.json | 1 + .../x86_64-ufispace_s9110_32x-r0/pddf_support | 0 .../platform-beta.json | 596 ++ .../platform-pvt.json | 590 ++ .../platform.json | 1 + .../platform_asic | 1 + .../platform_components.json | 12 + .../platform_env.conf | 1 + .../pmon_daemon_control.json | 9 + .../x86_64-ufispace_s9110_32x-r0/sensors.conf | 1 + .../system_health_monitoring_config.json | 15 + platform/broadcom/one-image.mk | 6 +- .../broadcom/platform-modules-ufispace.mk | 23 + .../debian/changelog | 24 + .../debian/control | 17 +- .../debian/rules | 4 + ...sonic-platform-ufispace-s6301-56st.install | 1 + ...onic-platform-ufispace-s6301-56st.postinst | 3 + .../sonic-platform-ufispace-s6301-56st.prerm | 2 + ...sonic-platform-ufispace-s7801-54xs.install | 1 + ...onic-platform-ufispace-s7801-54xs.postinst | 3 + .../sonic-platform-ufispace-s7801-54xs.prerm | 2 + ...sonic-platform-ufispace-s8901-54xc.install | 1 + ...onic-platform-ufispace-s8901-54xc.postinst | 3 + .../sonic-platform-ufispace-s8901-54xc.prerm | 2 + .../sonic-platform-ufispace-s9110-32x.install | 1 + ...sonic-platform-ufispace-s9110-32x.postinst | 3 + .../sonic-platform-ufispace-s9110-32x.prerm | 2 + .../s6301-56st/modules/Makefile | 6 + .../modules/x86-64-ufispace-s6301-56st-lpc.c | 829 ++ .../x86-64-ufispace-s6301-56st-sys-eeprom.c | 273 + .../service/pddf-platform-init.service | 1 + .../s6301-56st/sonic_platform/__init__.py | 4 + .../s6301-56st/sonic_platform/chassis.py | 220 + .../s6301-56st/sonic_platform/component.py | 108 + .../s6301-56st/sonic_platform/eeprom.py | 21 + .../s6301-56st/sonic_platform/fan.py | 153 + .../s6301-56st/sonic_platform/fan_drawer.py | 17 + .../s6301-56st/sonic_platform/platform.py | 25 + .../s6301-56st/sonic_platform/psu.py | 67 + .../s6301-56st/sonic_platform/psu_fru.py | 52 + .../s6301-56st/sonic_platform/sfp.py | 40 + .../s6301-56st/sonic_platform/thermal.py | 17 + .../s6301-56st/sonic_platform/watchdog.py | 23 + .../s6301-56st/sonic_platform_setup.py | 27 + .../utils/pddf_post_device_create.sh | 11 + .../utils/pddf_post_driver_install.sh | 2 + .../utils/pddf_pre_driver_install.sh | 11 + .../s6301-56st/utils/pddf_switch_svc.py | 86 + .../s7801-54xs/modules/Makefile | 6 + .../modules/pddf_custom_sysstatus_module.c | 276 + .../modules/x86-64-ufispace-s7801-54xs-cpld.c | 1512 ++++ .../modules/x86-64-ufispace-s7801-54xs-cpld.h | 269 + .../modules/x86-64-ufispace-s7801-54xs-lpc.c | 883 ++ .../x86-64-ufispace-s7801-54xs-sys-eeprom.c | 272 + .../service/pddf-platform-init.service | 1 + .../s7801-54xs/sonic_platform/__init__.py | 4 + .../s7801-54xs/sonic_platform/chassis.py | 193 + .../s7801-54xs/sonic_platform/component.py | 125 + .../s7801-54xs/sonic_platform/eeprom.py | 21 + .../s7801-54xs/sonic_platform/fan.py | 158 + .../s7801-54xs/sonic_platform/fan_drawer.py | 17 + .../s7801-54xs/sonic_platform/platform.py | 25 + .../s7801-54xs/sonic_platform/psu.py | 38 + .../s7801-54xs/sonic_platform/sfp.py | 49 + .../s7801-54xs/sonic_platform/thermal.py | 17 + .../s7801-54xs/sonic_platform_setup.py | 27 + .../utils/pddf_post_device_create.sh | 16 + .../utils/pddf_post_driver_install.sh | 2 + .../utils/pddf_pre_driver_install.sh | 8 + .../s7801-54xs/utils/pddf_switch_svc.py | 50 + .../s7801-54xs/utils/pre_pddf_init.sh | 5 + .../s8901-54xc/modules/Makefile | 6 + .../modules/pddf_custom_sysstatus_module.c | 276 + .../modules/x86-64-ufispace-s8901-54xc-cpld.c | 1512 ++++ .../modules/x86-64-ufispace-s8901-54xc-cpld.h | 269 + .../modules/x86-64-ufispace-s8901-54xc-lpc.c | 883 ++ .../x86-64-ufispace-s8901-54xc-sys-eeprom.c | 272 + .../service/pddf-platform-init.service | 1 + .../s8901-54xc/sonic_platform/__init__.py | 4 + .../s8901-54xc/sonic_platform/chassis.py | 193 + .../s8901-54xc/sonic_platform/component.py | 125 + .../s8901-54xc/sonic_platform/eeprom.py | 21 + .../s8901-54xc/sonic_platform/fan.py | 158 + .../s8901-54xc/sonic_platform/fan_drawer.py | 17 + .../s8901-54xc/sonic_platform/platform.py | 25 + .../s8901-54xc/sonic_platform/psu.py | 38 + .../s8901-54xc/sonic_platform/sfp.py | 49 + .../s8901-54xc/sonic_platform/thermal.py | 17 + .../s8901-54xc/sonic_platform_setup.py | 27 + .../utils/pddf_post_device_create.sh | 16 + .../utils/pddf_post_driver_install.sh | 2 + .../utils/pddf_pre_driver_install.sh | 8 + .../s8901-54xc/utils/pddf_switch_svc.py | 50 + .../s8901-54xc/utils/pre_pddf_init.sh | 5 + .../s9110-32x/modules/Makefile | 6 + .../modules/pddf_custom_sysstatus_module.c | 274 + .../modules/x86-64-ufispace-s9110-32x-cpld.c | 1475 ++++ .../modules/x86-64-ufispace-s9110-32x-cpld.h | 149 + .../modules/x86-64-ufispace-s9110-32x-lpc.c | 981 ++ .../x86-64-ufispace-s9110-32x-sys-eeprom.c | 272 + .../service/pddf-platform-init.service | 1 + .../s9110-32x/sonic_platform/__init__.py | 4 + .../s9110-32x/sonic_platform/chassis.py | 191 + .../s9110-32x/sonic_platform/component.py | 125 + .../s9110-32x/sonic_platform/eeprom.py | 21 + .../s9110-32x/sonic_platform/fan.py | 147 + .../s9110-32x/sonic_platform/fan_drawer.py | 17 + .../s9110-32x/sonic_platform/platform.py | 25 + .../s9110-32x/sonic_platform/psu.py | 38 + .../s9110-32x/sonic_platform/sfp.py | 31 + .../s9110-32x/sonic_platform/thermal.py | 17 + .../s9110-32x/sonic_platform_setup.py | 27 + .../utils/pddf_post_device_create.sh | 14 + .../utils/pddf_post_driver_install.sh | 2 + .../s9110-32x/utils/pddf_pre_device_create.sh | 74 + .../utils/pddf_pre_driver_install.sh | 11 + .../s9110-32x/utils/pddf_switch_svc.py | 86 + 187 files changed, 48381 insertions(+), 2 deletions(-) create mode 100644 device/ufispace/x86_64-ufispace_s6301_56st-r0/UFISPACE-S6301-56ST/hwsku.json create mode 100644 device/ufispace/x86_64-ufispace_s6301_56st-r0/UFISPACE-S6301-56ST/sai.profile create mode 100644 device/ufispace/x86_64-ufispace_s6301_56st-r0/UFISPACE-S6301-56ST/td3-x2-s6301-56st.config.bcm create mode 100644 device/ufispace/x86_64-ufispace_s6301_56st-r0/custom_led.bin create mode 100644 device/ufispace/x86_64-ufispace_s6301_56st-r0/default_sku create mode 100644 device/ufispace/x86_64-ufispace_s6301_56st-r0/fancontrol create mode 100644 device/ufispace/x86_64-ufispace_s6301_56st-r0/installer.conf create mode 100644 device/ufispace/x86_64-ufispace_s6301_56st-r0/led_proc_init.soc create mode 100644 device/ufispace/x86_64-ufispace_s6301_56st-r0/pcie.yaml create mode 100644 device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pd-plugin.json create mode 100644 device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf/pddf-device.json create mode 100644 device/ufispace/x86_64-ufispace_s6301_56st-r0/pddf_support create mode 100644 device/ufispace/x86_64-ufispace_s6301_56st-r0/platform.json create mode 100644 device/ufispace/x86_64-ufispace_s6301_56st-r0/platform_asic create mode 100644 device/ufispace/x86_64-ufispace_s6301_56st-r0/platform_components.json create mode 100644 device/ufispace/x86_64-ufispace_s6301_56st-r0/platform_env.conf create mode 100644 device/ufispace/x86_64-ufispace_s6301_56st-r0/pmon_daemon_control.json create mode 100644 device/ufispace/x86_64-ufispace_s6301_56st-r0/sensors.conf create mode 100644 device/ufispace/x86_64-ufispace_s6301_56st-r0/system_health_monitoring_config.json create mode 100644 device/ufispace/x86_64-ufispace_s7801_54xs-r0/UFISPACE-S7801-54XS/hwsku.json create mode 100644 device/ufispace/x86_64-ufispace_s7801_54xs-r0/UFISPACE-S7801-54XS/sai.profile create mode 100644 device/ufispace/x86_64-ufispace_s7801_54xs-r0/UFISPACE-S7801-54XS/td3-x5-s7801-54xs.config.bcm create mode 100644 device/ufispace/x86_64-ufispace_s7801_54xs-r0/custom_led.bin create mode 100644 device/ufispace/x86_64-ufispace_s7801_54xs-r0/default_sku create mode 100644 device/ufispace/x86_64-ufispace_s7801_54xs-r0/fancontrol create mode 100644 device/ufispace/x86_64-ufispace_s7801_54xs-r0/installer.conf create mode 100644 device/ufispace/x86_64-ufispace_s7801_54xs-r0/led_proc_init.soc create mode 100644 device/ufispace/x86_64-ufispace_s7801_54xs-r0/pcie.yaml create mode 100644 device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pd-plugin.json create mode 100644 device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf/pddf-device.json create mode 100644 device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf_support create mode 100644 device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform.json create mode 100644 device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform_asic create mode 100644 device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform_components.json create mode 100644 device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform_env.conf create mode 100644 device/ufispace/x86_64-ufispace_s7801_54xs-r0/pmon_daemon_control.json create mode 100644 device/ufispace/x86_64-ufispace_s7801_54xs-r0/sensors.conf create mode 100644 device/ufispace/x86_64-ufispace_s7801_54xs-r0/system_health_monitoring_config.json create mode 100644 device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/hwsku.json create mode 100644 device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/sai.profile create mode 100644 device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/td3-x5-s8901-54xc.config.bcm create mode 100644 device/ufispace/x86_64-ufispace_s8901_54xc-r0/custom_led.bin create mode 100644 device/ufispace/x86_64-ufispace_s8901_54xc-r0/default_sku create mode 100644 device/ufispace/x86_64-ufispace_s8901_54xc-r0/fancontrol create mode 100644 device/ufispace/x86_64-ufispace_s8901_54xc-r0/installer.conf create mode 100644 device/ufispace/x86_64-ufispace_s8901_54xc-r0/led_proc_init.soc create mode 100644 device/ufispace/x86_64-ufispace_s8901_54xc-r0/pcie.yaml create mode 100644 device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pd-plugin.json create mode 100644 device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf/pddf-device.json create mode 100644 device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf_support create mode 100644 device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform.json create mode 100644 device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform_asic create mode 100644 device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform_components.json create mode 100644 device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform_env.conf create mode 100644 device/ufispace/x86_64-ufispace_s8901_54xc-r0/pmon_daemon_control.json create mode 100644 device/ufispace/x86_64-ufispace_s8901_54xc-r0/sensors.conf create mode 100644 device/ufispace/x86_64-ufispace_s8901_54xc-r0/system_health_monitoring_config.json create mode 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/hwsku.json create mode 100755 device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/sai.profile create mode 100755 device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/td3-x7-s9110-32x.config.bcm create mode 100755 device/ufispace/x86_64-ufispace_s9110_32x-r0/custom_led.bin create mode 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/default_sku create mode 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/fancontrol create mode 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/installer.conf create mode 100755 device/ufispace/x86_64-ufispace_s9110_32x-r0/led_proc_init.soc create mode 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/pcie.yaml create mode 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pd-plugin.json create mode 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-beta.json create mode 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json create mode 120000 device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device.json create mode 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf_support create mode 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/platform-beta.json create mode 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/platform-pvt.json create mode 120000 device/ufispace/x86_64-ufispace_s9110_32x-r0/platform.json create mode 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/platform_asic create mode 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/platform_components.json create mode 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/platform_env.conf create mode 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/pmon_daemon_control.json create mode 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/sensors.conf create mode 100644 device/ufispace/x86_64-ufispace_s9110_32x-r0/system_health_monitoring_config.json create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s6301-56st.install create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s6301-56st.postinst create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s6301-56st.prerm create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s7801-54xs.install create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s7801-54xs.postinst create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s7801-54xs.prerm create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s8901-54xc.install create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s8901-54xc.postinst create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s8901-54xc.prerm create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9110-32x.install create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9110-32x.postinst create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9110-32x.prerm create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/Makefile create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-lpc.c create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-sys-eeprom.c create mode 120000 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/service/pddf-platform-init.service create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/__init__.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/chassis.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/component.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/eeprom.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan_drawer.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/platform.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu_fru.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/sfp.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/thermal.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/watchdog.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform_setup.py create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_post_device_create.sh create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_post_driver_install.sh create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_pre_driver_install.sh create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_switch_svc.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/Makefile create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/pddf_custom_sysstatus_module.c create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.c create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.h create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-lpc.c create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-sys-eeprom.c create mode 120000 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/service/pddf-platform-init.service create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/__init__.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/chassis.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/component.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/eeprom.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/fan.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/fan_drawer.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/platform.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/psu.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/sfp.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/thermal.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform_setup.py create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_device_create.sh create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_driver_install.sh create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_pre_driver_install.sh create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_switch_svc.py create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pre_pddf_init.sh create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/Makefile create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/pddf_custom_sysstatus_module.c create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.c create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.h create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-lpc.c create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-sys-eeprom.c create mode 120000 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/service/pddf-platform-init.service create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/__init__.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/chassis.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/component.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/eeprom.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/fan.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/fan_drawer.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/platform.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/psu.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/sfp.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/thermal.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform_setup.py create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_device_create.sh create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_driver_install.sh create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_pre_driver_install.sh create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_switch_svc.py create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pre_pddf_init.sh create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/Makefile create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/pddf_custom_sysstatus_module.c create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.c create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.h create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-lpc.c create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-sys-eeprom.c create mode 120000 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/service/pddf-platform-init.service create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/__init__.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/chassis.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/component.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/eeprom.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan_drawer.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/platform.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/psu.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/sfp.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/thermal.py create mode 100644 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform_setup.py create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_device_create.sh create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_driver_install.sh create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_pre_device_create.sh create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_pre_driver_install.sh create mode 100755 platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_switch_svc.py diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/UFISPACE-S6301-56ST/hwsku.json b/device/ufispace/x86_64-ufispace_s6301_56st-r0/UFISPACE-S6301-56ST/hwsku.json new file mode 100644 index 000000000000..4f341c2eddce --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/UFISPACE-S6301-56ST/hwsku.json @@ -0,0 +1,221 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet1": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet2": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet3": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet4": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet5": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet6": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet7": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet8": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet9": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet10": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet11": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet12": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet13": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet14": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet15": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet16": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet17": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet18": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet19": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet20": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet21": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet22": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet23": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet24": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet25": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet26": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet27": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet28": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet29": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet30": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet31": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet32": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet33": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet34": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet35": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet36": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet37": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet38": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet39": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet40": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet41": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet42": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet43": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet44": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet45": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet46": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet47": { + "default_brkout_mode": "1x1G", + "autoneg": "on" + }, + "Ethernet48": { + "default_brkout_mode": "1x10G" + }, + "Ethernet49": { + "default_brkout_mode": "1x10G" + }, + "Ethernet50": { + "default_brkout_mode": "1x10G" + }, + "Ethernet51": { + "default_brkout_mode": "1x10G" + }, + "Ethernet52": { + "default_brkout_mode": "1x10G" + }, + "Ethernet53": { + "default_brkout_mode": "1x10G" + }, + "Ethernet54": { + "default_brkout_mode": "1x10G" + }, + "Ethernet55": { + "default_brkout_mode": "1x10G" + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/UFISPACE-S6301-56ST/sai.profile b/device/ufispace/x86_64-ufispace_s6301_56st-r0/UFISPACE-S6301-56ST/sai.profile new file mode 100644 index 000000000000..33b427a78fce --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/UFISPACE-S6301-56ST/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-x2-s6301-56st.config.bcm diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/UFISPACE-S6301-56ST/td3-x2-s6301-56st.config.bcm b/device/ufispace/x86_64-ufispace_s6301_56st-r0/UFISPACE-S6301-56ST/td3-x2-s6301-56st.config.bcm new file mode 100644 index 000000000000..7bf91509ca39 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s6301_56st-r0/UFISPACE-S6301-56ST/td3-x2-s6301-56st.config.bcm @@ -0,0 +1,295 @@ +# r2, 20230713 + +sram_scan_enable=0 +stable_size=0x5500000 +tdma_timeout_usec=15000000 +tslam_timeout_usec=15000000 +sai_mdio_access_clause22=1 +sai_verify_incoming_chksum=0 +robust_hash_disable_egress_vlan=1 +robust_hash_disable_mpls=1 +robust_hash_disable_vlan=1 +port_flex_enable=1 +arl_clean_timeout_usec=15000000 +asf_mem_profile=0 +bcm_num_cos=9 +bcm_stat_flags=1 +bcm_stat_jumbo=9236 +cdma_timeout_usec=15000000 +disable_pcie_firmware_check=1 +dma_desc_timeout_usec=15000000 +fpem_mem_entries=0 +higig2_hdr_mode=1 +ifp_inports_support_enable=1 +ipv6_lpm_128b_enable=1 +l2xmsg_mode=1 +l2_mem_entries=65536 +l3_mem_entries=32768 +max_vp_lags=0 +mem_scan_enable=1 +miim_intr_enable=0 +module_64ports=1 +multicast_l2_range=4095 +multicast_l3_range=0 +os=unix + +# global setting + +pbmp_xport_xe=0x1fe00000000000000 +pbmp_xport_ge=0x00001fffffffffffe + +phy_chain_tx_lane_map_physical{25}=0x2310 +phy_chain_rx_lane_map_physical{25}=0x2310 + +phy_chain_tx_lane_map_physical{41}=0x3102 +phy_chain_rx_lane_map_physical{41}=0x3102 + +port_gmii_mode_25=1 +port_gmii_mode_26=1 +port_gmii_mode_27=1 +port_gmii_mode_28=1 +port_gmii_mode_29=1 +port_gmii_mode_30=1 +port_gmii_mode_31=1 +port_gmii_mode_32=1 + +port_gmii_mode_33=1 +port_gmii_mode_34=1 +port_gmii_mode_35=1 +port_gmii_mode_36=1 +port_gmii_mode_37=1 +port_gmii_mode_38=1 +port_gmii_mode_39=1 +port_gmii_mode_40=1 + +port_gmii_mode_41=1 +port_gmii_mode_42=1 +port_gmii_mode_43=1 +port_gmii_mode_44=1 +port_gmii_mode_45=1 +port_gmii_mode_46=1 +port_gmii_mode_47=1 +port_gmii_mode_48=1 + +# GPHY0 +portmap_1=1:1 +portmap_2=2:1 +portmap_3=3:1 +portmap_4=4:1 + +# GPHY1 +portmap_5=5:1 +portmap_6=6:1 +portmap_7=7:1 +portmap_8=8:1 + +# GPHY2 +portmap_9=9:1 +portmap_10=10:1 +portmap_11=11:1 +portmap_12=12:1 + +# GPHY3 +portmap_13=13:1 +portmap_14=14:1 +portmap_15=15:1 +portmap_16=16:1 + +# GPHY4 +portmap_17=17:1 +portmap_18=18:1 +portmap_19=19:1 +portmap_20=20:1 + +# GPHY5 +portmap_21=21:1 +portmap_22=22:1 +portmap_23=23:1 +portmap_24=24:1 + +phy_port_primary_and_offset_1.0=0x0100 +phy_port_primary_and_offset_2.0=0x0101 +phy_port_primary_and_offset_3.0=0x0102 +phy_port_primary_and_offset_4.0=0x0103 +phy_port_primary_and_offset_5.0=0x0104 +phy_port_primary_and_offset_6.0=0x0105 +phy_port_primary_and_offset_7.0=0x0106 +phy_port_primary_and_offset_8.0=0x0107 + +phy_port_primary_and_offset_9.0=0x0900 +phy_port_primary_and_offset_10.0=0x0901 +phy_port_primary_and_offset_11.0=0x0902 +phy_port_primary_and_offset_12.0=0x0903 +phy_port_primary_and_offset_13.0=0x0904 +phy_port_primary_and_offset_14.0=0x0905 +phy_port_primary_and_offset_15.0=0x0906 +phy_port_primary_and_offset_16.0=0x0907 + +phy_port_primary_and_offset_17.0=0x1100 +phy_port_primary_and_offset_18.0=0x1101 +phy_port_primary_and_offset_19.0=0x1102 +phy_port_primary_and_offset_20.0=0x1103 +phy_port_primary_and_offset_21.0=0x1104 +phy_port_primary_and_offset_22.0=0x1105 +phy_port_primary_and_offset_23.0=0x1106 +phy_port_primary_and_offset_24.0=0x1107 + +# Comment out configuration on PHY ports + +# MCQ 0 - QSGMII +portmap_25=25:1 +portmap_26=26:1 +portmap_27=27:1 +portmap_28=28:1 +portmap_29=29:1 +portmap_30=30:1 +portmap_31=31:1 +portmap_32=32:1 + +# 54182_1 PHY ADDR 0x1-0x8 +port_phy_addr_25=0x01 +port_phy_addr_26=0x02 +port_phy_addr_27=0x03 +port_phy_addr_28=0x04 +port_phy_addr_29=0x05 +port_phy_addr_30=0x06 +port_phy_addr_31=0x07 +port_phy_addr_32=0x08 +phy_port_primary_and_offset_25.0=0x1900 +phy_port_primary_and_offset_26.0=0x1901 +phy_port_primary_and_offset_27.0=0x1902 +phy_port_primary_and_offset_28.0=0x1903 +phy_port_primary_and_offset_29.0=0x1904 +phy_port_primary_and_offset_30.0=0x1905 +phy_port_primary_and_offset_31.0=0x1906 +phy_port_primary_and_offset_32.0=0x1907 + +# MCQ 1 - QSGMII +portmap_33=33:1 +portmap_34=34:1 +portmap_35=35:1 +portmap_36=36:1 +portmap_37=37:1 +portmap_38=38:1 +portmap_39=39:1 +portmap_40=40:1 + +# 54182_2 PHY ADDR 0x21-0x28 +port_phy_addr_33=0x21 +port_phy_addr_34=0x22 +port_phy_addr_35=0x23 +port_phy_addr_36=0x24 +port_phy_addr_37=0x25 +port_phy_addr_38=0x26 +port_phy_addr_39=0x27 +port_phy_addr_40=0x28 + +phy_port_primary_and_offset_33.0=0x2100 +phy_port_primary_and_offset_34.0=0x2101 +phy_port_primary_and_offset_35.0=0x2102 +phy_port_primary_and_offset_36.0=0x2103 +phy_port_primary_and_offset_37.0=0x2104 +phy_port_primary_and_offset_38.0=0x2105 +phy_port_primary_and_offset_39.0=0x2106 +phy_port_primary_and_offset_40.0=0x2107 + +# MCQ2-2L 50182 +portmap_41=41:1 +portmap_42=42:1 +portmap_43=43:1 +portmap_44=44:1 +portmap_45=45:1 +portmap_46=46:1 +portmap_47=47:1 +portmap_48=48:1 + +# 54182_3 PHY ADDR 0x41-0x48 +port_phy_addr_41=0x41 +port_phy_addr_42=0x42 +port_phy_addr_43=0x43 +port_phy_addr_44=0x44 +port_phy_addr_45=0x45 +port_phy_addr_46=0x46 +port_phy_addr_47=0x47 +port_phy_addr_48=0x48 + +phy_port_primary_and_offset_41.0=0x2900 +phy_port_primary_and_offset_42.0=0x2901 +phy_port_primary_and_offset_43.0=0x2902 +phy_port_primary_and_offset_44.0=0x2903 +phy_port_primary_and_offset_45.0=0x2904 +phy_port_primary_and_offset_46.0=0x2905 +phy_port_primary_and_offset_47.0=0x2906 +phy_port_primary_and_offset_48.0=0x2907 + +# TSCF SFP +portmap_57=57:10 +portmap_58=58:10 +portmap_59=59:10 +portmap_60=60:10 + +portmap_61=61:10 +portmap_62=62:10 +portmap_63=63:10 +portmap_64=64:10 + + +dport_map_enable=1 + +dport_map_port_25=1 +dport_map_port_26=2 +dport_map_port_27=3 +dport_map_port_28=4 +dport_map_port_29=5 +dport_map_port_30=6 +dport_map_port_31=7 +dport_map_port_32=8 +dport_map_port_33=9 +dport_map_port_34=10 +dport_map_port_35=11 +dport_map_port_36=12 +dport_map_port_37=13 +dport_map_port_38=14 +dport_map_port_39=15 +dport_map_port_40=16 +dport_map_port_41=17 +dport_map_port_42=18 +dport_map_port_43=19 +dport_map_port_44=20 +dport_map_port_45=21 +dport_map_port_46=22 +dport_map_port_47=23 +dport_map_port_48=24 +dport_map_port_1=25 +dport_map_port_2=26 +dport_map_port_3=27 +dport_map_port_4=28 +dport_map_port_5=29 +dport_map_port_6=30 +dport_map_port_7=31 +dport_map_port_8=32 +dport_map_port_9=33 +dport_map_port_10=34 +dport_map_port_11=35 +dport_map_port_12=36 +dport_map_port_13=37 +dport_map_port_14=38 +dport_map_port_15=39 +dport_map_port_16=40 +dport_map_port_17=41 +dport_map_port_18=42 +dport_map_port_19=43 +dport_map_port_20=44 +dport_map_port_21=45 +dport_map_port_22=46 +dport_map_port_23=47 +dport_map_port_24=48 +dport_map_port_57=49 +dport_map_port_58=50 +dport_map_port_59=51 +dport_map_port_60=52 +dport_map_port_64=53 +dport_map_port_63=54 +dport_map_port_62=55 +dport_map_port_61=56 + diff --git a/device/ufispace/x86_64-ufispace_s6301_56st-r0/custom_led.bin b/device/ufispace/x86_64-ufispace_s6301_56st-r0/custom_led.bin new file mode 100644 index 0000000000000000000000000000000000000000..cb3a607afed6ff3e71a02cd9c8d2201734c8fd0f GIT binary patch literal 508 zcmW;Gy)OfC90u^;uXnwpN>9BNr}(v$7Hz#m)LS)t6B0`$h9ZvX2LA*mraB_QL~J5y z8a5VxL5T}uxx`?wH2wh|hR^UU&-0XT*J+s+X_m@2yM;aa37xSW^JSHVrWX!L6RC8b zBymKkG`DhO=eB~EMHcUPykLrXys}Ay8L7m?Jng9wn~9_nw!an2$2<4QnzLrI89q2R zd0kZd1FzercWpzhdp=kFHW!+cAr_TOJEnhagFNX9C#6bg_-k_6{FFH^F>AIg$wN-; z;gRd!q+8cUWW9bkkl-PXM=a7LEOK=R!~ue{^j_4G+K4u+C2~O?lS)rT9#u;< z&L(+`xRE7cD8|?4Us|B3k@?RbpFTs5Id4*7;x11obU{~CzSqYXOEAXbFaZ6~2Qi33 zFZ4hJx}gig5CQ?6&;jibgf`Hj6ONcmfHFX`q5M*rf0=P)+YHp`t{hvQAh6X)zO=%to=|kej&P%6}R5rOW2lIQx;11 z9wl^>T3`|<=q9~nMXR)>qqLjmY5tUVyf0l{Ha~@AKs$2h?$>WE;_z!}cbL<<+V#1*a) TWAz`+Z9Cky%WeDIcF1jiGL0/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "PSU1-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU1-EEPROM", + "device_parent": "MUX1", + "virt_parent": "PSU1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x50", + "dev_type": "psu_eeprom" + }, + "attr_list": [ + { + "attr_name":"psu_present", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x1", + "attr_cmpval":"0x0", + "attr_len":"1" + }, + { + "attr_name":"psu_power_good", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x10", + "attr_cmpval":"0x10", + "attr_len":"1" + } + ] + } + }, + "PSU2": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU2", + "device_parent": "MUX1" + }, + "dev_attr": { + "dev_idx": "2", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [ + { "itf":"eeprom", "dev":"PSU2-EEPROM" } + ] + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr -c get PSU1_TEMP1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_TEMP1", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get PSU1_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_FAN1", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr -c get PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_VOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr -c get PSU1_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_IOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + + { + "attr_name": "psu_fan_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "PSU2-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU2-EEPROM", + "device_parent": "MUX1", + "virt_parent": "PSU2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x51", + "dev_type": "psu_eeprom" + }, + "attr_list": [ + { + "attr_name":"psu_present", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x2", + "attr_cmpval":"0x0", + "attr_len":"1" + }, + { + "attr_name":"psu_power_good", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x20", + "attr_cmpval":"0x20", + "attr_len":"1" + } + ] + } + }, + "FAN-CTRL": { + "dev_info": { + "device_type": "FAN", + "device_name": "FAN-CTRL", + "device_parent": "" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "fan1_present", + "bmc_cmd": "ipmitool sdr -c get FAN0_PRSNT_L", + "raw": "0", + "field_name": "FAN0_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan2_present", + "bmc_cmd": "ipmitool sdr -c get FAN1_PRSNT_L", + "raw": "0", + "field_name": "FAN1_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan3_present", + "bmc_cmd": "ipmitool sdr -c get FAN2_PRSNT_L", + "raw": "0", + "field_name": "FAN2_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan4_present", + "bmc_cmd": "ipmitool sdr -c get FAN3_PRSNT_L", + "raw": "0", + "field_name": "FAN3_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan5_present", + "bmc_cmd": "ipmitool sdr -c get FAN4_PRSNT_L", + "raw": "0", + "field_name": "FAN4_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan1_input", + "bmc_cmd": "ipmitool sdr -c get FAN0_RPM | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN0_RPM", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan2_input", + "bmc_cmd": "ipmitool sdr -c get FAN1_RPM | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN1_RPM", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan3_input", + "bmc_cmd": "ipmitool sdr -c get FAN2_RPM | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN2_RPM", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan4_input", + "bmc_cmd": "ipmitool sdr -c get FAN3_RPM | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN3_RPM", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan5_input", + "bmc_cmd": "ipmitool sdr -c get FAN4_RPM | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN4_RPM", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan1_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan2_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan3_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f3", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan4_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f4", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan5_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f5", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "SYNC_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "DIAG_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x82" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x82" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x82" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x82" + }, + { + "attr_name": "off", + "bits": "3:2", + "descr": "Off", + "value": "0x1;0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x82" + } + ] + } + }, + "SYS_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "SYS_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "off", + "bits": "7:6", + "descr": "Off", + "value": "0x01;0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + } + ] + } + }, + "FAN_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FAN_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + } + ] + } + }, + "PSU1_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "PSU2_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "1", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "7", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "ID_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "LOC_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "blue", + "bits": "3:1", + "descr": "Blue", + "value": "0x04;0x05", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "blue_blink", + "bits": "3:1", + "descr": "Blue Blinking", + "value": "0x06;0x07", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "off", + "bits": "3:2", + "descr": "Off", + "value": "0x01;0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + } + ] + } + }, + "PORT1": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT1", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "1" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT1-EEPROM" + }, + { + "itf": "control", + "dev": "PORT1-CTRL" + } + ] + } + }, + "PORT1-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT1-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT2": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT2", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "2" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT2-EEPROM" + }, + { + "itf": "control", + "dev": "PORT2-CTRL" + } + ] + } + }, + "PORT2-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT2-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT3": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT3", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "3" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT3-EEPROM" + }, + { + "itf": "control", + "dev": "PORT3-CTRL" + } + ] + } + }, + "PORT3-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1c", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT3-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT4": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT4", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "4" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT4-EEPROM" + }, + { + "itf": "control", + "dev": "PORT4-CTRL" + } + ] + } + }, + "PORT4-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT4-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT5": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT5", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "5" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT5-EEPROM" + }, + { + "itf": "control", + "dev": "PORT5-CTRL" + } + ] + } + }, + "PORT5-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT5-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT6": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT6", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "6" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT6-EEPROM" + }, + { + "itf": "control", + "dev": "PORT6-CTRL" + } + ] + } + }, + "PORT6-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT6-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT7": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT7", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "7" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT7-EEPROM" + }, + { + "itf": "control", + "dev": "PORT7-CTRL" + } + ] + } + }, + "PORT7-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT7-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT8": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT8", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "8" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT8-EEPROM" + }, + { + "itf": "control", + "dev": "PORT8-CTRL" + } + ] + } + }, + "PORT8-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT8-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT9": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT9", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "9" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT9-EEPROM" + }, + { + "itf": "control", + "dev": "PORT9-CTRL" + } + ] + } + }, + "PORT9-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT9-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT10": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT10", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "10" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT10-EEPROM" + }, + { + "itf": "control", + "dev": "PORT10-CTRL" + } + ] + } + }, + "PORT10-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT10-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT11": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT11", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "11" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT11-EEPROM" + }, + { + "itf": "control", + "dev": "PORT11-CTRL" + } + ] + } + }, + "PORT11-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT11-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT12": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT12", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "12" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT12-EEPROM" + }, + { + "itf": "control", + "dev": "PORT12-CTRL" + } + ] + } + }, + "PORT12-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT12-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT13": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT13", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "13" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT13-EEPROM" + }, + { + "itf": "control", + "dev": "PORT13-CTRL" + } + ] + } + }, + "PORT13-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT13-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT14": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT14", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "14" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT14-EEPROM" + }, + { + "itf": "control", + "dev": "PORT14-CTRL" + } + ] + } + }, + "PORT14-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT14-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT15": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT15", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "15" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT15-EEPROM" + }, + { + "itf": "control", + "dev": "PORT15-CTRL" + } + ] + } + }, + "PORT15-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT15-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT16": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT16", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "16" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT16-EEPROM" + }, + { + "itf": "control", + "dev": "PORT16-CTRL" + } + ] + } + }, + "PORT16-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT16-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT17": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT17", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "17" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT17-EEPROM" + }, + { + "itf": "control", + "dev": "PORT17-CTRL" + } + ] + } + }, + "PORT17-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT17-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT18": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT18", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "18" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT18-EEPROM" + }, + { + "itf": "control", + "dev": "PORT18-CTRL" + } + ] + } + }, + "PORT18-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2b", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT18-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT19": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT19", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "19" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT19-EEPROM" + }, + { + "itf": "control", + "dev": "PORT19-CTRL" + } + ] + } + }, + "PORT19-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2c", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT19-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT20": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT20", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "20" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT20-EEPROM" + }, + { + "itf": "control", + "dev": "PORT20-CTRL" + } + ] + } + }, + "PORT20-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT20-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT21": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT21", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "21" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT21-EEPROM" + }, + { + "itf": "control", + "dev": "PORT21-CTRL" + } + ] + } + }, + "PORT21-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT21-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT22": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT22", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "22" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT22-EEPROM" + }, + { + "itf": "control", + "dev": "PORT22-CTRL" + } + ] + } + }, + "PORT22-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2f", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT22-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT23": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT23", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "23" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT23-EEPROM" + }, + { + "itf": "control", + "dev": "PORT23-CTRL" + } + ] + } + }, + "PORT23-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT23-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT24": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT24", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "24" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT24-EEPROM" + }, + { + "itf": "control", + "dev": "PORT24-CTRL" + } + ] + } + }, + "PORT24-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x31", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT24-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x31", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT25": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT25", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "25" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT25-EEPROM" + }, + { + "itf": "control", + "dev": "PORT25-CTRL" + } + ] + } + }, + "PORT25-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x32", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT25-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x32", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT26": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT26", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "26" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT26-EEPROM" + }, + { + "itf": "control", + "dev": "PORT26-CTRL" + } + ] + } + }, + "PORT26-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x33", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT26-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x33", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT27": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT27", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "27" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT27-EEPROM" + }, + { + "itf": "control", + "dev": "PORT27-CTRL" + } + ] + } + }, + "PORT27-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x34", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT27-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x34", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT28": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT28", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "28" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT28-EEPROM" + }, + { + "itf": "control", + "dev": "PORT28-CTRL" + } + ] + } + }, + "PORT28-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x35", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT28-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x35", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT29": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT29", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "29" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT29-EEPROM" + }, + { + "itf": "control", + "dev": "PORT29-CTRL" + } + ] + } + }, + "PORT29-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x36", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT29-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x36", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT30": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT30", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "30" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT30-EEPROM" + }, + { + "itf": "control", + "dev": "PORT30-CTRL" + } + ] + } + }, + "PORT30-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x37", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT30-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x37", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT31": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT31", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "31" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT31-EEPROM" + }, + { + "itf": "control", + "dev": "PORT31-CTRL" + } + ] + } + }, + "PORT31-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x38", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT31-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x38", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT32": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT32", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "32" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT32-EEPROM" + }, + { + "itf": "control", + "dev": "PORT32-CTRL" + } + ] + } + }, + "PORT32-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x39", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT32-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x39", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT33": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT33", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "33" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT33-EEPROM" + }, + { + "itf": "control", + "dev": "PORT33-CTRL" + } + ] + } + }, + "PORT33-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT33-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3a", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT33-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT33-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT34": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT34", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "34" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT34-EEPROM" + }, + { + "itf": "control", + "dev": "PORT34-CTRL" + } + ] + } + }, + "PORT34-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT34-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT34" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3b", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT34-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT34-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT34" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT35": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT35", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "35" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT35-EEPROM" + }, + { + "itf": "control", + "dev": "PORT35-CTRL" + } + ] + } + }, + "PORT35-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT35-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT35" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3c", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT35-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT35-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT35" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT36": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT36", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "36" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT36-EEPROM" + }, + { + "itf": "control", + "dev": "PORT36-CTRL" + } + ] + } + }, + "PORT36-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT36-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT36" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3d", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT36-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT36-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT36" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT37": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT37", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "37" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT37-EEPROM" + }, + { + "itf": "control", + "dev": "PORT37-CTRL" + } + ] + } + }, + "PORT37-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT37-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT37" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3e", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT37-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT37-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT37" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT38": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT38", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "38" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT38-EEPROM" + }, + { + "itf": "control", + "dev": "PORT38-CTRL" + } + ] + } + }, + "PORT38-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT38-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT38" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3f", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT38-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT38-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT38" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT39": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT39", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "39" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT39-EEPROM" + }, + { + "itf": "control", + "dev": "PORT39-CTRL" + } + ] + } + }, + "PORT39-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT39-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT39" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x40", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT39-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT39-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT39" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x40", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT40": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT40", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "40" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT40-EEPROM" + }, + { + "itf": "control", + "dev": "PORT40-CTRL" + } + ] + } + }, + "PORT40-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT40-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT40" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x41", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT40-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT40-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT40" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x41", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT41": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT41", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "41" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT41-EEPROM" + }, + { + "itf": "control", + "dev": "PORT41-CTRL" + } + ] + } + }, + "PORT41-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT41-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT41" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x42", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT41-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT41-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT41" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x42", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT42": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT42", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "42" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT42-EEPROM" + }, + { + "itf": "control", + "dev": "PORT42-CTRL" + } + ] + } + }, + "PORT42-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT42-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT42" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x43", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT42-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT42-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT42" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x43", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT43": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT43", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "43" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT43-EEPROM" + }, + { + "itf": "control", + "dev": "PORT43-CTRL" + } + ] + } + }, + "PORT43-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT43-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT43" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x44", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT43-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT43-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT43" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x44", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT44": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT44", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "44" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT44-EEPROM" + }, + { + "itf": "control", + "dev": "PORT44-CTRL" + } + ] + } + }, + "PORT44-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT44-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT44" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x45", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT44-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT44-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT44" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x45", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT45": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT45", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "45" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT45-EEPROM" + }, + { + "itf": "control", + "dev": "PORT45-CTRL" + } + ] + } + }, + "PORT45-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT45-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT45" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x46", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT45-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT45-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT45" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x46", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT46": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT46", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "46" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT46-EEPROM" + }, + { + "itf": "control", + "dev": "PORT46-CTRL" + } + ] + } + }, + "PORT46-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT46-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT46" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x47", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT46-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT46-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT46" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x47", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT47": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT47", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "47" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT47-EEPROM" + }, + { + "itf": "control", + "dev": "PORT47-CTRL" + } + ] + } + }, + "PORT47-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT47-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT47" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x48", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT47-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT47-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT47" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x48", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT48": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT48", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "48" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT48-EEPROM" + }, + { + "itf": "control", + "dev": "PORT48-CTRL" + } + ] + } + }, + "PORT48-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT48-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT48" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x49", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT48-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT48-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT48" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x49", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT49": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT49", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "49" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT49-EEPROM" + }, + { + "itf": "control", + "dev": "PORT49-CTRL" + } + ] + } + }, + "PORT49-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT49-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT49" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4a", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT49-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT49-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT49" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT50": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT50", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "50" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT50-EEPROM" + }, + { + "itf": "control", + "dev": "PORT50-CTRL" + } + ] + } + }, + "PORT50-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT50-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT50" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4b", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT50-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT50-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT50" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT51": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT51", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "51" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT51-EEPROM" + }, + { + "itf": "control", + "dev": "PORT51-CTRL" + } + ] + } + }, + "PORT51-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT51-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT51" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4c", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT51-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT51-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT51" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT52": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT52", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "52" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT52-EEPROM" + }, + { + "itf": "control", + "dev": "PORT52-CTRL" + } + ] + } + }, + "PORT52-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT52-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT52" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4d", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT52-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT52-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT52" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT53": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT53", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "53" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT53-EEPROM" + }, + { + "itf": "control", + "dev": "PORT53-CTRL" + } + ] + } + }, + "PORT53-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT53-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT53" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4e", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT53-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT53-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT53" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT54": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT54", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "54" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT54-EEPROM" + }, + { + "itf": "control", + "dev": "PORT54-CTRL" + } + ] + } + }, + "PORT54-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT54-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT54" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4f", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT54-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT54-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT54" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf_support b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pddf_support new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform.json b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform.json new file mode 100644 index 000000000000..7800ce50ddc2 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform.json @@ -0,0 +1,691 @@ +{ + "chassis": { + "name": "S7801-54XS", + "components": [ + { + "name": "CPLD1" + }, + { + "name": "CPLD2" + }, + { + "name": "BIOS" + }, + { + "name": "BMC" + } + ], + "fans": [ + { + "name": "Fan_1" + }, + { + "name": "Fan_2" + }, + { + "name": "Fan_3" + }, + { + "name": "Fan_4" + }, + { + "name": "Fan_5" + } + ], + "fan_drawers":[ + { + "name": "Fantray1", + "num_fans" : 1, + "fans": [ + { + "name": "Fan_1" + } + ] + }, + { + "name": "Fantray2", + "num_fans" : 1, + "fans": [ + { + "name": "Fan_2" + } + ] + }, + { + "name": "Fantray3", + "num_fans" : 1, + "fans": [ + { + "name": "Fan_3" + } + ] + }, + { + "name": "Fantray4", + "num_fans" : 1, + "fans": [ + { + "name": "Fan_4" + } + ] + }, + { + "name": "Fantray5", + "num_fans" : 1, + "fans": [ + { + "name": "Fan_5" + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "fans": [ + { + "name": "PSU1_FAN1" + } + ], + "thermals": [ + { + "name": "PSU1_TEMP1" + } + ] + }, + { + "name": "PSU2", + "fans": [ + { + "name": "PSU2_FAN1" + } + ], + "thermals": [ + { + "name": "PSU2_TEMP1" + } + ] + } + ], + "thermals": [ + { + "name": "TEMP_MAC" + }, + { + "name": "TEMP_ENV_MACCASE" + }, + { + "name": "TEMP_ENV_PSUCASE" + }, + { + "name": "TEMP_ENV_FANCONN" + }, + { + "name": "TEMP_ENV_FANCARD" + }, + { + "name": "TEMP_ENV_BMC" + }, + { + "name": "PSU-0-Thermal" + }, + { + "name": "PSU-1-Thermal" + } + ], + "sfps": [ + { + "name": "Ethernet0" + }, + { + "name": "Ethernet1" + }, + { + "name": "Ethernet2" + }, + { + "name": "Ethernet3" + }, + { + "name": "Ethernet4" + }, + { + "name": "Ethernet5" + }, + { + "name": "Ethernet6" + }, + { + "name": "Ethernet7" + }, + { + "name": "Ethernet8" + }, + { + "name": "Ethernet9" + }, + { + "name": "Ethernet10" + }, + { + "name": "Ethernet11" + }, + { + "name": "Ethernet12" + }, + { + "name": "Ethernet13" + }, + { + "name": "Ethernet14" + }, + { + "name": "Ethernet15" + }, + { + "name": "Ethernet16" + }, + { + "name": "Ethernet17" + }, + { + "name": "Ethernet18" + }, + { + "name": "Ethernet19" + }, + { + "name": "Ethernet20" + }, + { + "name": "Ethernet21" + }, + { + "name": "Ethernet22" + }, + { + "name": "Ethernet23" + }, + { + "name": "Ethernet24" + }, + { + "name": "Ethernet25" + }, + { + "name": "Ethernet26" + }, + { + "name": "Ethernet27" + }, + { + "name": "Ethernet28" + }, + { + "name": "Ethernet29" + }, + { + "name": "Ethernet30" + }, + { + "name": "Ethernet31" + }, + { + "name": "Ethernet32" + }, + { + "name": "Ethernet33" + }, + { + "name": "Ethernet34" + }, + { + "name": "Ethernet35" + }, + { + "name": "Ethernet36" + }, + { + "name": "Ethernet37" + }, + { + "name": "Ethernet38" + }, + { + "name": "Ethernet39" + }, + { + "name": "Ethernet40" + }, + { + "name": "Ethernet41" + }, + { + "name": "Ethernet42" + }, + { + "name": "Ethernet43" + }, + { + "name": "Ethernet44" + }, + { + "name": "Ethernet45" + }, + { + "name": "Ethernet46" + }, + { + "name": "Ethernet47" + }, + { + "name": "Ethernet48" + }, + { + "name": "Ethernet52" + }, + { + "name": "Ethernet56" + }, + { + "name": "Ethernet60" + }, + { + "name": "Ethernet64" + }, + { + "name": "Ethernet68" + }, + { + "name": "Ethernet72" + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "0", + "lanes": "1", + "breakout_modes": { + "1x10G" : [ "Eth0(Port0)" ] + } + }, + "Ethernet1": { + "index": "1", + "lanes": "2", + "breakout_modes": { + "1x10G" : [ "Eth1(Port1)" ] + } + }, + "Ethernet2": { + "index": "2", + "lanes": "3", + "breakout_modes": { + "1x10G" : [ "Eth2(Port2)" ] + } + }, + "Ethernet3": { + "index": "3", + "lanes": "4", + "breakout_modes": { + "1x10G" : [ "Eth3(Port3)" ] + } + }, + "Ethernet4": { + "index": "4", + "lanes": "5", + "breakout_modes": { + "1x10G" : [ "Eth4(Port4)" ] + } + }, + "Ethernet5": { + "index": "5", + "lanes": "6", + "breakout_modes": { + "1x10G" : [ "Eth5(Port5)" ] + } + }, + "Ethernet6": { + "index": "6", + "lanes": "7", + "breakout_modes": { + "1x10G" : [ "Eth6(Port6)" ] + } + }, + "Ethernet7": { + "index": "7", + "lanes": "8", + "breakout_modes": { + "1x10G" : [ "Eth7(Port7)" ] + } + }, + "Ethernet8": { + "index": "8", + "lanes": "9", + "breakout_modes": { + "1x10G" : [ "Eth8(Port8)" ] + } + }, + "Ethernet9": { + "index": "9", + "lanes": "10", + "breakout_modes": { + "1x10G" : [ "Eth9(Port9)" ] + } + }, + "Ethernet10": { + "index": "10", + "lanes": "11", + "breakout_modes": { + "1x10G" : [ "Eth10(Port10)" ] + } + }, + "Ethernet11": { + "index": "11", + "lanes": "12", + "breakout_modes": { + "1x10G" : [ "Eth11(Port11)" ] + } + }, + "Ethernet12": { + "index": "12", + "lanes": "13", + "breakout_modes": { + "1x10G" : [ "Eth12(Port12)" ] + } + }, + "Ethernet13": { + "index": "13", + "lanes": "14", + "breakout_modes": { + "1x10G" : [ "Eth13(Port13)" ] + } + }, + "Ethernet14": { + "index": "14", + "lanes": "15", + "breakout_modes": { + "1x10G" : [ "Eth14(Port14)" ] + } + }, + "Ethernet15": { + "index": "15", + "lanes": "16", + "breakout_modes": { + "1x10G" : [ "Eth15(Port15)" ] + } + }, + "Ethernet16": { + "index": "16", + "lanes": "17", + "breakout_modes": { + "1x10G" : [ "Eth16(Port16)" ] + } + }, + "Ethernet17": { + "index": "17", + "lanes": "18", + "breakout_modes": { + "1x10G" : [ "Eth17(Port17)" ] + } + }, + "Ethernet18": { + "index": "18", + "lanes": "19", + "breakout_modes": { + "1x10G" : [ "Eth18(Port18)" ] + } + }, + "Ethernet19": { + "index": "19", + "lanes": "20", + "breakout_modes": { + "1x10G" : [ "Eth19(Port19)" ] + } + }, + "Ethernet20": { + "index": "20", + "lanes": "21", + "breakout_modes": { + "1x10G" : [ "Eth20(Port20)" ] + } + }, + "Ethernet21": { + "index": "21", + "lanes": "22", + "breakout_modes": { + "1x10G" : [ "Eth21(Port21)" ] + } + }, + "Ethernet22": { + "index": "22", + "lanes": "23", + "breakout_modes": { + "1x10G" : [ "Eth22(Port22)" ] + } + }, + "Ethernet23": { + "index": "23", + "lanes": "24", + "breakout_modes": { + "1x10G" : [ "Eth23(Port23)" ] + } + }, + "Ethernet24": { + "index": "24", + "lanes": "25", + "breakout_modes": { + "1x10G" : [ "Eth24(Port24)" ] + } + }, + "Ethernet25": { + "index": "25", + "lanes": "26", + "breakout_modes": { + "1x10G" : [ "Eth25(Port25)" ] + } + }, + "Ethernet26": { + "index": "26", + "lanes": "27", + "breakout_modes": { + "1x10G" : [ "Eth26(Port26)" ] + } + }, + "Ethernet27": { + "index": "27", + "lanes": "28", + "breakout_modes": { + "1x10G" : [ "Eth27(Port27)" ] + } + }, + "Ethernet28": { + "index": "28", + "lanes": "41", + "breakout_modes": { + "1x10G" : [ "Eth28(Port28)" ] + } + }, + "Ethernet29": { + "index": "29", + "lanes": "42", + "breakout_modes": { + "1x10G" : [ "Eth29(Port29)" ] + } + }, + "Ethernet30": { + "index": "30", + "lanes": "43", + "breakout_modes": { + "1x10G" : [ "Eth30(Port30)" ] + } + }, + "Ethernet31": { + "index": "31", + "lanes": "44", + "breakout_modes": { + "1x10G" : [ "Eth31(Port31)" ] + } + }, + "Ethernet32": { + "index": "32", + "lanes": "61", + "breakout_modes": { + "1x10G" : [ "Eth32(Port32)" ] + } + }, + "Ethernet33": { + "index": "33", + "lanes": "62", + "breakout_modes": { + "1x10G" : [ "Eth33(Port33)" ] + } + }, + "Ethernet34": { + "index": "34", + "lanes": "63", + "breakout_modes": { + "1x10G" : [ "Eth34(Port34)" ] + } + }, + "Ethernet35": { + "index": "35", + "lanes": "64", + "breakout_modes": { + "1x10G" : [ "Eth35(Port35)" ] + } + }, + "Ethernet36": { + "index": "36", + "lanes": "65", + "breakout_modes": { + "1x10G" : [ "Eth36(Port36)" ] + } + }, + "Ethernet37": { + "index": "37", + "lanes": "66", + "breakout_modes": { + "1x10G" : [ "Eth37(Port37)" ] + } + }, + "Ethernet38": { + "index": "38", + "lanes": "67", + "breakout_modes": { + "1x10G" : [ "Eth38(Port38)" ] + } + }, + "Ethernet39": { + "index": "39", + "lanes": "68", + "breakout_modes": { + "1x10G" : [ "Eth39(Port39)" ] + } + }, + "Ethernet40": { + "index": "40", + "lanes": "69", + "breakout_modes": { + "1x10G" : [ "Eth40(Port40)" ] + } + }, + "Ethernet41": { + "index": "41", + "lanes": "70", + "breakout_modes": { + "1x10G" : [ "Eth41(Port41)" ] + } + }, + "Ethernet42": { + "index": "42", + "lanes": "71", + "breakout_modes": { + "1x10G" : [ "Eth42(Port42)" ] + } + }, + "Ethernet43": { + "index": "43", + "lanes": "72", + "breakout_modes": { + "1x10G" : [ "Eth43(Port43)" ] + } + }, + "Ethernet44": { + "index": "44", + "lanes": "73", + "breakout_modes": { + "1x10G" : [ "Eth44(Port44)" ] + } + }, + "Ethernet45": { + "index": "45", + "lanes": "74", + "breakout_modes": { + "1x10G" : [ "Eth45(Port45)" ] + } + }, + "Ethernet46": { + "index": "46", + "lanes": "75", + "breakout_modes": { + "1x10G" : [ "Eth46(Port46)" ] + } + }, + "Ethernet47": { + "index": "47", + "lanes": "76", + "breakout_modes": { + "1x10G" : [ "Eth47(Port47)" ] + } + }, + "Ethernet48": { + "index": "48,48,48,48", + "lanes": "37,38,39,40", + "breakout_modes": { + "1x100G[40G]" : [ "Eth48(Port48)" ] + } + }, + "Ethernet52": { + "index": "49,49,49,49", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x100G[40G]" : [ "Eth49(Port49)" ] + } + }, + "Ethernet56": { + "index": "50,50,50,50", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x100G[40G]" : [ "Eth50(Port50)" ] + } + }, + "Ethernet60": { + "index": "51,51,51,51", + "lanes": "49,50,51,52", + "breakout_modes": { + "1x100G[40G]" : [ "Eth51(Port51)" ] + } + }, + "Ethernet64": { + "index": "52,52,52,52", + "lanes": "53,54,55,56", + "breakout_modes": { + "1x100G[40G]": ["Eth52(Port52)"], + "2x50G": ["Eth52/1(Port52)", "Eth52/2(Port52)"], + "4x25G": ["Eth52/1(Port52)", "Eth52/2(Port52)", "Eth52/3(Port52)", "Eth52/4(Port52)"], + "4x10G": ["Eth52/1(Port52)", "Eth52/2(Port52)", "Eth52/3(Port52)", "Eth52/4(Port52)"] + } + }, + "Ethernet68": { + "index": "53,53,53,53", + "lanes": "57,58,59,60", + "breakout_modes": { + "1x100G[40G]": ["Eth53(Port53)"], + "2x50G": ["Eth53/1(Port53)", "Eth53/2(Port53)"], + "4x25G": ["Eth53/1(Port53)", "Eth53/2(Port53)", "Eth53/3(Port53)", "Eth53/4(Port53)"], + "4x10G": ["Eth53/1(Port53)", "Eth53/2(Port53)", "Eth53/3(Port53)", "Eth53/4(Port53)"] + } + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform_asic b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform_asic new file mode 100644 index 000000000000..960467652765 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform_components.json b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform_components.json new file mode 100644 index 000000000000..5ab2d23557f3 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform_components.json @@ -0,0 +1,12 @@ +{ + "chassis": { + "x86_64-ufispace_s7801_54xs-r0": { + "component": { + "CPLD1": { }, + "CPLD2": { }, + "BIOS": { }, + "BMC": {} + } + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform_env.conf b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform_env.conf new file mode 100644 index 000000000000..77fd88ac3678 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/platform_env.conf @@ -0,0 +1 @@ +SYNCD_SHM_SIZE=256m diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pmon_daemon_control.json b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pmon_daemon_control.json new file mode 100644 index 000000000000..e348e0168fa5 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/pmon_daemon_control.json @@ -0,0 +1,9 @@ +{ + "skip_pcied": false, + "skip_fancontrol": false, + "skip_thermalctld": false, + "skip_ledd": true, + "skip_xcvrd": false, + "skip_psud": false, + "skip_syseepromd": false +} diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/sensors.conf b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/sensors.conf new file mode 100644 index 000000000000..b1a69433405b --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/sensors.conf @@ -0,0 +1 @@ +# libsensors configuration file diff --git a/device/ufispace/x86_64-ufispace_s7801_54xs-r0/system_health_monitoring_config.json b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/system_health_monitoring_config.json new file mode 100644 index 000000000000..467d81304de0 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s7801_54xs-r0/system_health_monitoring_config.json @@ -0,0 +1,15 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu", + "fan" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "yellow", + "normal": "green", + "booting": "green_blink" + } +} diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/hwsku.json b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/hwsku.json new file mode 100644 index 000000000000..041ad2b5df26 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/hwsku.json @@ -0,0 +1,166 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet1": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet2": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet3": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet4": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet5": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet6": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet7": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet8": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet9": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet10": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet11": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet12": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet13": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet14": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet15": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet16": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet17": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet18": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet19": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet20": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet21": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet22": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet23": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet24": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet25": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet26": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet27": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet28": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet29": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet30": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet31": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet32": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet33": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet34": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet35": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet36": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet37": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet38": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet39": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet40": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet41": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet42": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet43": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet44": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet45": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet46": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet47": { + "default_brkout_mode": "1x25G[10G]" + }, + "Ethernet48": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet52": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet56": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet60": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet64": { + "default_brkout_mode": "1x100G[40G]" + }, + "Ethernet68": { + "default_brkout_mode": "1x100G[40G]" + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/sai.profile b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/sai.profile new file mode 100644 index 000000000000..39a5f795f1a3 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-x5-s8901-54xc.config.bcm \ No newline at end of file diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/td3-x5-s8901-54xc.config.bcm b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/td3-x5-s8901-54xc.config.bcm new file mode 100644 index 000000000000..37d9d8ec80d9 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/UFISPACE-S8901-54XC/td3-x5-s8901-54xc.config.bcm @@ -0,0 +1,502 @@ +# cfg version: r2, 20230515 + +pbmp_xport_xe=0x7fffffffffffffffdfffffffffffffffe + + +#FC 0 +phy_chain_tx_polarity_flip_physical{1}=0x0 +phy_chain_tx_polarity_flip_physical{2}=0x0 +phy_chain_tx_polarity_flip_physical{3}=0x0 +phy_chain_tx_polarity_flip_physical{4}=0x0 + +phy_chain_rx_polarity_flip_physical{1}=0x0 +phy_chain_rx_polarity_flip_physical{2}=0x0 +phy_chain_rx_polarity_flip_physical{3}=0x0 +phy_chain_rx_polarity_flip_physical{4}=0x0 + +phy_chain_tx_lane_map_physical{1.0}=0x0123 +phy_chain_rx_lane_map_physical{1.0}=0x0123 + +#FC 1 +phy_chain_tx_polarity_flip_physical{5}=0x0 +phy_chain_tx_polarity_flip_physical{6}=0x0 +phy_chain_tx_polarity_flip_physical{7}=0x0 +phy_chain_tx_polarity_flip_physical{8}=0x0 + +phy_chain_rx_polarity_flip_physical{5}=0x1 +phy_chain_rx_polarity_flip_physical{6}=0x1 +phy_chain_rx_polarity_flip_physical{7}=0x1 +phy_chain_rx_polarity_flip_physical{8}=0x1 + +phy_chain_tx_lane_map_physical{5.0}=0x0123 +phy_chain_rx_lane_map_physical{5.0}=0x0123 + +#FC 2 +phy_chain_tx_polarity_flip_physical{9}=0x0 +phy_chain_tx_polarity_flip_physical{10}=0x0 +phy_chain_tx_polarity_flip_physical{11}=0x0 +phy_chain_tx_polarity_flip_physical{12}=0x0 + +phy_chain_rx_polarity_flip_physical{9}=0x1 +phy_chain_rx_polarity_flip_physical{10}=0x1 +phy_chain_rx_polarity_flip_physical{11}=0x1 +phy_chain_rx_polarity_flip_physical{12}=0x1 + +phy_chain_tx_lane_map_physical{9.0}=0x0123 +phy_chain_rx_lane_map_physical{9.0}=0x0123 + +#FC 3 +phy_chain_tx_polarity_flip_physical{13}=0x0 +phy_chain_tx_polarity_flip_physical{14}=0x0 +phy_chain_tx_polarity_flip_physical{15}=0x0 +phy_chain_tx_polarity_flip_physical{16}=0x0 + +phy_chain_rx_polarity_flip_physical{13}=0x1 +phy_chain_rx_polarity_flip_physical{14}=0x1 +phy_chain_rx_polarity_flip_physical{15}=0x1 +phy_chain_rx_polarity_flip_physical{16}=0x1 + +phy_chain_tx_lane_map_physical{13.0}=0x0123 +phy_chain_rx_lane_map_physical{13.0}=0x0123 + +#FC 4 +phy_chain_tx_polarity_flip_physical{17}=0x0 +phy_chain_tx_polarity_flip_physical{18}=0x0 +phy_chain_tx_polarity_flip_physical{19}=0x0 +phy_chain_tx_polarity_flip_physical{20}=0x0 + +phy_chain_rx_polarity_flip_physical{17}=0x0 +phy_chain_rx_polarity_flip_physical{18}=0x0 +phy_chain_rx_polarity_flip_physical{19}=0x0 +phy_chain_rx_polarity_flip_physical{20}=0x0 + +phy_chain_tx_lane_map_physical{17.0}=0x0123 +phy_chain_rx_lane_map_physical{17.0}=0x0123 + +#FC 5 +phy_chain_tx_polarity_flip_physical{21}=0x0 +phy_chain_tx_polarity_flip_physical{22}=0x0 +phy_chain_tx_polarity_flip_physical{23}=0x0 +phy_chain_tx_polarity_flip_physical{24}=0x0 + +phy_chain_rx_polarity_flip_physical{21}=0x1 +phy_chain_rx_polarity_flip_physical{22}=0x1 +phy_chain_rx_polarity_flip_physical{23}=0x1 +phy_chain_rx_polarity_flip_physical{24}=0x1 + +phy_chain_tx_lane_map_physical{21.0}=0x0123 +phy_chain_rx_lane_map_physical{21.0}=0x0123 + +#FC 6 +phy_chain_tx_polarity_flip_physical{25}=0x0 +phy_chain_tx_polarity_flip_physical{26}=0x0 +phy_chain_tx_polarity_flip_physical{27}=0x0 +phy_chain_tx_polarity_flip_physical{28}=0x0 + +phy_chain_rx_polarity_flip_physical{25}=0x1 +phy_chain_rx_polarity_flip_physical{26}=0x1 +phy_chain_rx_polarity_flip_physical{27}=0x1 +phy_chain_rx_polarity_flip_physical{28}=0x1 + +phy_chain_tx_lane_map_physical{25.0}=0x0123 +phy_chain_rx_lane_map_physical{25.0}=0x0123 + +#FC 7 not use +phy_chain_tx_polarity_flip_physical{29}=0x0 +phy_chain_tx_polarity_flip_physical{30}=0x0 +phy_chain_tx_polarity_flip_physical{31}=0x0 +phy_chain_tx_polarity_flip_physical{32}=0x0 + +phy_chain_rx_polarity_flip_physical{29}=0x0 +phy_chain_rx_polarity_flip_physical{30}=0x0 +phy_chain_rx_polarity_flip_physical{31}=0x0 +phy_chain_rx_polarity_flip_physical{32}=0x0 + +phy_chain_tx_lane_map_physical{29.0}=0x0123 +phy_chain_rx_lane_map_physical{29.0}=0x0123 + +#FC 8 +phy_chain_tx_polarity_flip_physical{33}=0x1 +phy_chain_tx_polarity_flip_physical{34}=0x0 +phy_chain_tx_polarity_flip_physical{35}=0x1 +phy_chain_tx_polarity_flip_physical{36}=0x1 + +phy_chain_rx_polarity_flip_physical{33}=0x0 +phy_chain_rx_polarity_flip_physical{34}=0x0 +phy_chain_rx_polarity_flip_physical{35}=0x1 +phy_chain_rx_polarity_flip_physical{36}=0x0 + +phy_chain_tx_lane_map_physical{33.0}=0x3120 +phy_chain_rx_lane_map_physical{33.0}=0x0213 + +#FC 9 +phy_chain_tx_polarity_flip_physical{37}=0x0 +phy_chain_tx_polarity_flip_physical{38}=0x0 +phy_chain_tx_polarity_flip_physical{39}=0x1 +phy_chain_tx_polarity_flip_physical{40}=0x1 + +phy_chain_rx_polarity_flip_physical{37}=0x1 +phy_chain_rx_polarity_flip_physical{38}=0x1 +phy_chain_rx_polarity_flip_physical{39}=0x0 +phy_chain_rx_polarity_flip_physical{40}=0x0 + +phy_chain_tx_lane_map_physical{37.0}=0x2031 +phy_chain_rx_lane_map_physical{37.0}=0x1302 + +#FC 10 +phy_chain_tx_polarity_flip_physical{41}=0x0 +phy_chain_tx_polarity_flip_physical{42}=0x0 +phy_chain_tx_polarity_flip_physical{43}=0x0 +phy_chain_tx_polarity_flip_physical{44}=0x0 + +phy_chain_rx_polarity_flip_physical{41}=0x1 +phy_chain_rx_polarity_flip_physical{42}=0x1 +phy_chain_rx_polarity_flip_physical{43}=0x1 +phy_chain_rx_polarity_flip_physical{44}=0x1 + +phy_chain_tx_lane_map_physical{41.0}=0x3210 +phy_chain_rx_lane_map_physical{41.0}=0x0123 + +#FC 11 +phy_chain_tx_polarity_flip_physical{45}=0x0 +phy_chain_tx_polarity_flip_physical{46}=0x0 +phy_chain_tx_polarity_flip_physical{47}=0x1 +phy_chain_tx_polarity_flip_physical{48}=0x1 + +phy_chain_rx_polarity_flip_physical{45}=0x0 +phy_chain_rx_polarity_flip_physical{46}=0x0 +phy_chain_rx_polarity_flip_physical{47}=0x0 +phy_chain_rx_polarity_flip_physical{48}=0x1 + +phy_chain_tx_lane_map_physical{45.0}=0x3120 +phy_chain_rx_lane_map_physical{45.0}=0x2130 + +#FC 12 +phy_chain_tx_polarity_flip_physical{49}=0x1 +phy_chain_tx_polarity_flip_physical{50}=0x0 +phy_chain_tx_polarity_flip_physical{51}=0x0 +phy_chain_tx_polarity_flip_physical{52}=0x1 + +phy_chain_rx_polarity_flip_physical{49}=0x0 +phy_chain_rx_polarity_flip_physical{50}=0x1 +phy_chain_rx_polarity_flip_physical{51}=0x1 +phy_chain_rx_polarity_flip_physical{52}=0x0 + +phy_chain_tx_lane_map_physical{49.0}=0x3201 +phy_chain_rx_lane_map_physical{49.0}=0x1023 + +#FC 13 +phy_chain_tx_polarity_flip_physical{53}=0x0 +phy_chain_tx_polarity_flip_physical{54}=0x0 +phy_chain_tx_polarity_flip_physical{55}=0x1 +phy_chain_tx_polarity_flip_physical{56}=0x1 + +phy_chain_rx_polarity_flip_physical{53}=0x0 +phy_chain_rx_polarity_flip_physical{54}=0x0 +phy_chain_rx_polarity_flip_physical{55}=0x0 +phy_chain_rx_polarity_flip_physical{56}=0x1 + +phy_chain_tx_lane_map_physical{53.0}=0x3120 +phy_chain_rx_lane_map_physical{53.0}=0x2130 + +#FC 14 +phy_chain_tx_polarity_flip_physical{57}=0x1 +phy_chain_tx_polarity_flip_physical{58}=0x0 +phy_chain_tx_polarity_flip_physical{59}=0x0 +phy_chain_tx_polarity_flip_physical{60}=0x1 + +phy_chain_rx_polarity_flip_physical{57}=0x0 +phy_chain_rx_polarity_flip_physical{58}=0x1 +phy_chain_rx_polarity_flip_physical{59}=0x1 +phy_chain_rx_polarity_flip_physical{60}=0x0 + +phy_chain_tx_lane_map_physical{57.0}=0x3201 +phy_chain_rx_lane_map_physical{57.0}=0x1023 + +#FC 15 +phy_chain_tx_polarity_flip_physical{61}=0x0 +phy_chain_tx_polarity_flip_physical{62}=0x0 +phy_chain_tx_polarity_flip_physical{63}=0x0 +phy_chain_tx_polarity_flip_physical{64}=0x0 + +phy_chain_rx_polarity_flip_physical{61}=0x0 +phy_chain_rx_polarity_flip_physical{62}=0x0 +phy_chain_rx_polarity_flip_physical{63}=0x0 +phy_chain_rx_polarity_flip_physical{64}=0x0 + +phy_chain_tx_lane_map_physical{61.0}=0x3210 +phy_chain_rx_lane_map_physical{61.0}=0x3210 + +#FC 16 +phy_chain_tx_polarity_flip_physical{65}=0x0 +phy_chain_tx_polarity_flip_physical{66}=0x0 +phy_chain_tx_polarity_flip_physical{67}=0x0 +phy_chain_tx_polarity_flip_physical{68}=0x0 + +phy_chain_rx_polarity_flip_physical{65}=0x1 +phy_chain_rx_polarity_flip_physical{66}=0x1 +phy_chain_rx_polarity_flip_physical{67}=0x1 +phy_chain_rx_polarity_flip_physical{68}=0x1 + +phy_chain_tx_lane_map_physical{65.0}=0x3210 +phy_chain_rx_lane_map_physical{65.0}=0x3210 + +#FC 17 +phy_chain_tx_polarity_flip_physical{69}=0x0 +phy_chain_tx_polarity_flip_physical{70}=0x0 +phy_chain_tx_polarity_flip_physical{71}=0x0 +phy_chain_tx_polarity_flip_physical{72}=0x0 + +phy_chain_rx_polarity_flip_physical{69}=0x1 +phy_chain_rx_polarity_flip_physical{70}=0x1 +phy_chain_rx_polarity_flip_physical{71}=0x1 +phy_chain_rx_polarity_flip_physical{72}=0x1 + +phy_chain_tx_lane_map_physical{69.0}=0x3210 +phy_chain_rx_lane_map_physical{69.0}=0x3210 + +#FC 18 +phy_chain_tx_polarity_flip_physical{73}=0x0 +phy_chain_tx_polarity_flip_physical{74}=0x0 +phy_chain_tx_polarity_flip_physical{75}=0x0 +phy_chain_tx_polarity_flip_physical{76}=0x0 + +phy_chain_rx_polarity_flip_physical{73}=0x1 +phy_chain_rx_polarity_flip_physical{74}=0x1 +phy_chain_rx_polarity_flip_physical{75}=0x1 +phy_chain_rx_polarity_flip_physical{76}=0x1 + +phy_chain_tx_lane_map_physical{73.0}=0x3210 +phy_chain_rx_lane_map_physical{73.0}=0x3210 + +#FC 19 not use +phy_chain_tx_polarity_flip_physical{77}=0x0 +phy_chain_tx_polarity_flip_physical{78}=0x0 +phy_chain_tx_polarity_flip_physical{79}=0x0 +phy_chain_tx_polarity_flip_physical{80}=0x0 + +phy_chain_rx_polarity_flip_physical{77}=0x0 +phy_chain_rx_polarity_flip_physical{78}=0x0 +phy_chain_rx_polarity_flip_physical{79}=0x0 +phy_chain_rx_polarity_flip_physical{80}=0x0 + +phy_chain_tx_lane_map_physical{77.0}=0x3210 +phy_chain_rx_lane_map_physical{77.0}=0x3210 + + +#FC0 sfp28 port 0-3 +portmap_1=1:25 +portmap_2=2:25 +portmap_3=3:25 +portmap_4=4:25 + +#FC1 sfp28 port 4-7 +portmap_5=5:25 +portmap_6=6:25 +portmap_7=7:25 +portmap_8=8:25 + +#FC2 sfp28 port 8-11 +portmap_9=9:25 +portmap_10=10:25 +portmap_11=11:25 +portmap_12=12:25 + +#FC3 sfp28 port 12-15 +portmap_13=13:25 +portmap_14=14:25 +portmap_15=15:25 +portmap_16=16:25 + +#FC4 sfp28 port 16-19 +portmap_17=17:25 +portmap_18=18:25 +portmap_19=19:25 +portmap_20=20:25 + +#FC5 sfp28 port 20-23 +portmap_21=21:25 +portmap_22=22:25 +portmap_23=23:25 +portmap_24=24:25 + +#FC6 sfp28 port 24-27 +portmap_25=25:25 +portmap_26=26:25 +portmap_27=27:25 +portmap_28=28:25 + +#FC7 not use + +#FC10 sfp28 port 28-31 +portmap_33=41:25 +portmap_34=42:25 +portmap_35=43:25 +portmap_36=44:25 + +#FC15 sfp28 port 32-35 +portmap_37=61:25 +portmap_38=62:25 +portmap_39=63:25 +portmap_40=64:25 + +#FC16 sfp28 port 36-39 +portmap_41=65:25 +portmap_42=66:25 +portmap_43=67:25 +portmap_44=68:25 + +#FC17 sfp28 port 40-43 +portmap_45=69:25 +portmap_46=70:25 +portmap_47=71:25 +portmap_48=72:25 + +#FC18 sfp28 port 44-47 +portmap_49=73:25 +portmap_50=74:25 +portmap_51=75:25 +portmap_52=76:25 + +#FC9 qsfp port 48 +portmap_29=37:100 + +#FC8 qsfp port 49 +portmap_30=33:100 + +#FC11 qsfp port 50 +portmap_53=45:100 + +#FC12 qsfp port 51 +portmap_54=49:100 + +#FC13 qsfp port 52 +portmap_55=53:100 + +#FC14 qsfp port 53 +portmap_59=57:100 + +#FC19 not use + +# dport +dport_map_enable=1 + +dport_map_port_1=1 +dport_map_port_2=2 +dport_map_port_3=3 +dport_map_port_4=4 +dport_map_port_5=5 +dport_map_port_6=6 +dport_map_port_7=7 +dport_map_port_8=8 +dport_map_port_9=9 +dport_map_port_10=10 +dport_map_port_11=11 +dport_map_port_12=12 +dport_map_port_13=13 +dport_map_port_14=14 +dport_map_port_15=15 +dport_map_port_16=16 +dport_map_port_17=17 +dport_map_port_18=18 +dport_map_port_19=19 +dport_map_port_20=20 +dport_map_port_21=21 +dport_map_port_22=22 +dport_map_port_23=23 +dport_map_port_24=24 +dport_map_port_25=25 +dport_map_port_26=26 +dport_map_port_27=27 +dport_map_port_28=28 +dport_map_port_33=29 +dport_map_port_34=30 +dport_map_port_35=31 +dport_map_port_36=32 +dport_map_port_37=33 +dport_map_port_38=34 +dport_map_port_39=35 +dport_map_port_40=36 +dport_map_port_41=37 +dport_map_port_42=38 +dport_map_port_43=39 +dport_map_port_44=40 +dport_map_port_45=41 +dport_map_port_46=42 +dport_map_port_47=43 +dport_map_port_48=44 +dport_map_port_49=45 +dport_map_port_50=46 +dport_map_port_51=47 +dport_map_port_52=48 +dport_map_port_29=49 +dport_map_port_30=50 +dport_map_port_53=51 +dport_map_port_54=52 +dport_map_port_55=53 +dport_map_port_59=54 + +# cfg for timing +ptp_bs_fref_0=50000000 +ptp_bs_fref_1=50000000 + +port_flex_enable=1 +oversubscribe_mode=1 +core_clock_frequency=1525 + +#25G,10G and 1G support +serdes_10g_at_25g_vco=1 +serdes_1000x_at_25g_vco=1 + +l2xmsg_mode=1 +l2xmsg_hostbuf_size=16384 +module_64ports=0 + +#Interrupts and Parity +max_vp_lags=0 +schan_intr_enable=0 +tdma_timeout_usec=5000000 +stable_size=0x5500000 + +#Default L3 profile +l2_mem_entries=40960 +l3_alpm_enable=2 +l3_alpm_ipv6_128b_bkt_rsvd=1 +l3_mem_entries=40960 + +#Tunnels +use_all_splithorizon_groups=1 +sai_tunnel_support=1 +bcm_tunnel_term_compatible_mode=1 + +#RIOT Enable +riot_enable=1 +riot_overlay_l3_intf_mem_size=8192 +riot_overlay_l3_egress_mem_size=32768 +l3_ecmp_levels=2 +riot_overlay_ecmp_resilient_hash_size=16384 +pfc_deadlock_seq_control=1 + +mem_cache_enable=0 +ifp_inports_support_enable=1 +ipv6_lpm_128b_enable=0x1 +l3_max_ecmp_mode=1 +lpm_scaling_enable=0 +bcm_num_cos=10 +default_cpu_tx_queue=9 +mmu_lossless=0 +host_as_route_disable=1 +sai_fast_convergence_support=1 +flow_init_mode=1 +sai_interface_type_auto_detect=0 +mpls_mem_entries=16384 +vlan_xlate_1_mem_entries=65536 +vlan_xlate_2_mem_entries=16384 +sai_nbr_bcast_ifp_optimized=1 +sai_brcm_sonic_acl_enhancements=1 + +# Reduced Trap Group QSET for BRCM Sonic +sai_brcm_sonic_trap_group=1 +l2_entry_used_as_my_station=1 +multi_hash_recurse_depth_l3=2 + diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/custom_led.bin b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/custom_led.bin new file mode 100644 index 0000000000000000000000000000000000000000..af49a6baba156c23cb95a4bc6bf55c4a2073107a GIT binary patch literal 392 zcmZ9ONcmfHFX`q5M*rf0=P)+YHp`t{hvQAh6X)zO=%to=|kej&P%6}R5rOW2lIQx;11 z9wl^>T3`|<=q9~nMXR)>qqLjmY5tUVyf0l{Ha~@AKs$2h?$>WE;_z!}cbL<<+V#1*a) TWAz`+Z9Cky%WeDIcF1jiGL0/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "PSU1-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU1-EEPROM", + "device_parent": "MUX1", + "virt_parent": "PSU1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x50", + "dev_type": "psu_eeprom" + }, + "attr_list": [ + { + "attr_name":"psu_present", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x1", + "attr_cmpval":"0x0", + "attr_len":"1" + }, + { + "attr_name":"psu_power_good", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x10", + "attr_cmpval":"0x10", + "attr_len":"1" + } + ] + } + }, + "PSU2": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU2", + "device_parent": "MUX1" + }, + "dev_attr": { + "dev_idx": "2", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [ + { "itf":"eeprom", "dev":"PSU2-EEPROM" } + ] + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr -c get PSU1_TEMP1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_TEMP1", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr -c get PSU1_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_FAN1", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr -c get PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_VOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr -c get PSU1_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "PSU1_IOUT", + "field_pos": "2", + "mult": "1000", + "separator": "," + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + + { + "attr_name": "psu_fan_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "PSU2-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU2-EEPROM", + "device_parent": "MUX1", + "virt_parent": "PSU2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x51", + "dev_type": "psu_eeprom" + }, + "attr_list": [ + { + "attr_name":"psu_present", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x2", + "attr_cmpval":"0x0", + "attr_len":"1" + }, + { + "attr_name":"psu_power_good", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x20", + "attr_cmpval":"0x20", + "attr_len":"1" + } + ] + } + }, + "FAN-CTRL": { + "dev_info": { + "device_type": "FAN", + "device_name": "FAN-CTRL", + "device_parent": "" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "fan1_present", + "bmc_cmd": "ipmitool sdr -c get FAN0_PRSNT_L", + "raw": "0", + "field_name": "FAN0_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan2_present", + "bmc_cmd": "ipmitool sdr -c get FAN1_PRSNT_L", + "raw": "0", + "field_name": "FAN1_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan3_present", + "bmc_cmd": "ipmitool sdr -c get FAN2_PRSNT_L", + "raw": "0", + "field_name": "FAN2_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan4_present", + "bmc_cmd": "ipmitool sdr -c get FAN3_PRSNT_L", + "raw": "0", + "field_name": "FAN3_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan5_present", + "bmc_cmd": "ipmitool sdr -c get FAN4_PRSNT_L", + "raw": "0", + "field_name": "FAN4_PRSNT_L", + "field_pos": "5", + "separator": "," + }, + { + "attr_name": "fan1_input", + "bmc_cmd": "ipmitool sdr -c get FAN0_RPM | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN0_RPM", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan2_input", + "bmc_cmd": "ipmitool sdr -c get FAN1_RPM | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN1_RPM", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan3_input", + "bmc_cmd": "ipmitool sdr -c get FAN2_RPM | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN2_RPM", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan4_input", + "bmc_cmd": "ipmitool sdr -c get FAN3_RPM | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN3_RPM", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan5_input", + "bmc_cmd": "ipmitool sdr -c get FAN4_RPM | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "field_name": "FAN4_RPM", + "field_pos": "2", + "separator": "," + }, + { + "attr_name": "fan1_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan2_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan3_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f3", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan4_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f4", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan5_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f5", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "SYNC_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "DIAG_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x82" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x82" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x82" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x82" + }, + { + "attr_name": "off", + "bits": "3:2", + "descr": "Off", + "value": "0x1;0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x82" + } + ] + } + }, + "SYS_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "SYS_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "off", + "bits": "7:6", + "descr": "Off", + "value": "0x01;0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + } + ] + } + }, + "FAN_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FAN_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + } + ] + } + }, + "PSU1_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "PSU2_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "1", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "7", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "ID_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "LOC_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "blue", + "bits": "3:1", + "descr": "Blue", + "value": "0x04;0x05", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "blue_blink", + "bits": "3:1", + "descr": "Blue Blinking", + "value": "0x06;0x07", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "off", + "bits": "3:2", + "descr": "Off", + "value": "0x01;0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + } + ] + } + }, + "PORT1": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT1", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "1" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT1-EEPROM" + }, + { + "itf": "control", + "dev": "PORT1-CTRL" + } + ] + } + }, + "PORT1-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT1-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT2": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT2", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "2" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT2-EEPROM" + }, + { + "itf": "control", + "dev": "PORT2-CTRL" + } + ] + } + }, + "PORT2-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT2-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT3": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT3", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "3" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT3-EEPROM" + }, + { + "itf": "control", + "dev": "PORT3-CTRL" + } + ] + } + }, + "PORT3-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1c", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT3-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT4": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT4", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "4" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT4-EEPROM" + }, + { + "itf": "control", + "dev": "PORT4-CTRL" + } + ] + } + }, + "PORT4-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT4-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT5": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT5", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "5" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT5-EEPROM" + }, + { + "itf": "control", + "dev": "PORT5-CTRL" + } + ] + } + }, + "PORT5-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT5-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT6": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT6", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "6" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT6-EEPROM" + }, + { + "itf": "control", + "dev": "PORT6-CTRL" + } + ] + } + }, + "PORT6-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT6-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT7": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT7", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "7" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT7-EEPROM" + }, + { + "itf": "control", + "dev": "PORT7-CTRL" + } + ] + } + }, + "PORT7-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT7-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT8": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT8", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "8" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT8-EEPROM" + }, + { + "itf": "control", + "dev": "PORT8-CTRL" + } + ] + } + }, + "PORT8-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT8-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x70", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT9": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT9", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "9" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT9-EEPROM" + }, + { + "itf": "control", + "dev": "PORT9-CTRL" + } + ] + } + }, + "PORT9-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT9-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT10": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT10", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "10" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT10-EEPROM" + }, + { + "itf": "control", + "dev": "PORT10-CTRL" + } + ] + } + }, + "PORT10-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT10-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT11": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT11", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "11" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT11-EEPROM" + }, + { + "itf": "control", + "dev": "PORT11-CTRL" + } + ] + } + }, + "PORT11-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT11-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT12": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT12", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "12" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT12-EEPROM" + }, + { + "itf": "control", + "dev": "PORT12-CTRL" + } + ] + } + }, + "PORT12-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT12-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT13": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT13", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "13" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT13-EEPROM" + }, + { + "itf": "control", + "dev": "PORT13-CTRL" + } + ] + } + }, + "PORT13-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT13-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT14": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT14", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "14" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT14-EEPROM" + }, + { + "itf": "control", + "dev": "PORT14-CTRL" + } + ] + } + }, + "PORT14-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT14-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT15": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT15", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "15" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT15-EEPROM" + }, + { + "itf": "control", + "dev": "PORT15-CTRL" + } + ] + } + }, + "PORT15-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT15-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT16": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT16", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "16" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT16-EEPROM" + }, + { + "itf": "control", + "dev": "PORT16-CTRL" + } + ] + } + }, + "PORT16-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT16-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x71", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT17": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT17", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "17" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT17-EEPROM" + }, + { + "itf": "control", + "dev": "PORT17-CTRL" + } + ] + } + }, + "PORT17-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT17-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT18": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT18", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "18" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT18-EEPROM" + }, + { + "itf": "control", + "dev": "PORT18-CTRL" + } + ] + } + }, + "PORT18-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2b", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT18-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT19": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT19", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "19" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT19-EEPROM" + }, + { + "itf": "control", + "dev": "PORT19-CTRL" + } + ] + } + }, + "PORT19-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2c", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT19-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT20": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT20", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "20" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT20-EEPROM" + }, + { + "itf": "control", + "dev": "PORT20-CTRL" + } + ] + } + }, + "PORT20-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT20-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT21": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT21", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "21" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT21-EEPROM" + }, + { + "itf": "control", + "dev": "PORT21-CTRL" + } + ] + } + }, + "PORT21-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT21-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT22": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT22", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "22" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT22-EEPROM" + }, + { + "itf": "control", + "dev": "PORT22-CTRL" + } + ] + } + }, + "PORT22-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2f", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT22-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT23": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT23", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "23" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT23-EEPROM" + }, + { + "itf": "control", + "dev": "PORT23-CTRL" + } + ] + } + }, + "PORT23-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT23-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT24": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT24", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "24" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT24-EEPROM" + }, + { + "itf": "control", + "dev": "PORT24-CTRL" + } + ] + } + }, + "PORT24-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x31", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT24-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x31", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x72", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT25": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT25", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "25" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT25-EEPROM" + }, + { + "itf": "control", + "dev": "PORT25-CTRL" + } + ] + } + }, + "PORT25-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x32", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT25-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x32", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT26": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT26", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "26" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT26-EEPROM" + }, + { + "itf": "control", + "dev": "PORT26-CTRL" + } + ] + } + }, + "PORT26-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x33", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT26-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x33", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT27": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT27", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "27" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT27-EEPROM" + }, + { + "itf": "control", + "dev": "PORT27-CTRL" + } + ] + } + }, + "PORT27-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x34", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT27-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x34", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT28": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT28", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "28" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT28-EEPROM" + }, + { + "itf": "control", + "dev": "PORT28-CTRL" + } + ] + } + }, + "PORT28-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x35", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT28-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x35", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT29": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT29", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "29" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT29-EEPROM" + }, + { + "itf": "control", + "dev": "PORT29-CTRL" + } + ] + } + }, + "PORT29-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x36", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT29-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x36", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT30": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT30", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "30" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT30-EEPROM" + }, + { + "itf": "control", + "dev": "PORT30-CTRL" + } + ] + } + }, + "PORT30-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x37", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT30-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x37", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT31": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT31", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "31" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT31-EEPROM" + }, + { + "itf": "control", + "dev": "PORT31-CTRL" + } + ] + } + }, + "PORT31-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x38", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT31-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x38", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT32": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT32", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "32" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT32-EEPROM" + }, + { + "itf": "control", + "dev": "PORT32-CTRL" + } + ] + } + }, + "PORT32-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-EEPROM", + "device_parent": "MUX7", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x39", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT32-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x39", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x49", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x73", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT33": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT33", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "33" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT33-EEPROM" + }, + { + "itf": "control", + "dev": "PORT33-CTRL" + } + ] + } + }, + "PORT33-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT33-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3a", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT33-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT33-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT34": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT34", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "34" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT34-EEPROM" + }, + { + "itf": "control", + "dev": "PORT34-CTRL" + } + ] + } + }, + "PORT34-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT34-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT34" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3b", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT34-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT34-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT34" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT35": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT35", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "35" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT35-EEPROM" + }, + { + "itf": "control", + "dev": "PORT35-CTRL" + } + ] + } + }, + "PORT35-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT35-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT35" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3c", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT35-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT35-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT35" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT36": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT36", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "36" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT36-EEPROM" + }, + { + "itf": "control", + "dev": "PORT36-CTRL" + } + ] + } + }, + "PORT36-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT36-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT36" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3d", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT36-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT36-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT36" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT37": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT37", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "37" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT37-EEPROM" + }, + { + "itf": "control", + "dev": "PORT37-CTRL" + } + ] + } + }, + "PORT37-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT37-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT37" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3e", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT37-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT37-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT37" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT38": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT38", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "38" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT38-EEPROM" + }, + { + "itf": "control", + "dev": "PORT38-CTRL" + } + ] + } + }, + "PORT38-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT38-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT38" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3f", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT38-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT38-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT38" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x3f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT39": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT39", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "39" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT39-EEPROM" + }, + { + "itf": "control", + "dev": "PORT39-CTRL" + } + ] + } + }, + "PORT39-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT39-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT39" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x40", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT39-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT39-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT39" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x40", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT40": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT40", + "device_parent": "MUX8" + }, + "dev_attr": { + "dev_idx": "40" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT40-EEPROM" + }, + { + "itf": "control", + "dev": "PORT40-CTRL" + } + ] + } + }, + "PORT40-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT40-EEPROM", + "device_parent": "MUX8", + "virt_parent": "PORT40" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x41", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT40-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT40-CTRL", + "device_parent": "MUX8", + "virt_parent": "PORT40" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x41", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4a", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x74", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT41": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT41", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "41" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT41-EEPROM" + }, + { + "itf": "control", + "dev": "PORT41-CTRL" + } + ] + } + }, + "PORT41-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT41-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT41" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x42", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT41-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT41-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT41" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x42", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT42": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT42", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "42" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT42-EEPROM" + }, + { + "itf": "control", + "dev": "PORT42-CTRL" + } + ] + } + }, + "PORT42-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT42-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT42" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x43", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT42-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT42-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT42" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x43", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT43": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT43", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "43" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT43-EEPROM" + }, + { + "itf": "control", + "dev": "PORT43-CTRL" + } + ] + } + }, + "PORT43-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT43-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT43" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x44", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT43-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT43-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT43" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x44", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT44": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT44", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "44" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT44-EEPROM" + }, + { + "itf": "control", + "dev": "PORT44-CTRL" + } + ] + } + }, + "PORT44-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT44-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT44" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x45", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT44-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT44-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT44" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x45", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT45": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT45", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "45" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT45-EEPROM" + }, + { + "itf": "control", + "dev": "PORT45-CTRL" + } + ] + } + }, + "PORT45-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT45-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT45" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x46", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT45-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT45-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT45" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x46", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT46": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT46", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "46" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT46-EEPROM" + }, + { + "itf": "control", + "dev": "PORT46-CTRL" + } + ] + } + }, + "PORT46-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT46-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT46" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x47", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT46-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT46-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT46" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x47", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT47": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT47", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "47" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT47-EEPROM" + }, + { + "itf": "control", + "dev": "PORT47-CTRL" + } + ] + } + }, + "PORT47-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT47-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT47" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x48", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT47-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT47-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT47" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x48", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT48": { + "dev_info": { + "device_type": "SFP28", + "device_name": "PORT48", + "device_parent": "MUX9" + }, + "dev_attr": { + "dev_idx": "48" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT48-EEPROM" + }, + { + "itf": "control", + "dev": "PORT48-CTRL" + } + ] + } + }, + "PORT48-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT48-EEPROM", + "device_parent": "MUX9", + "virt_parent": "PORT48" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x49", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT48-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT48-CTRL", + "device_parent": "MUX9", + "virt_parent": "PORT48" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x49", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0x7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x4b", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x75", + "attr_mask": "0x7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT49": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT49", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "49" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT49-EEPROM" + }, + { + "itf": "control", + "dev": "PORT49-CTRL" + } + ] + } + }, + "PORT49-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT49-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT49" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4a", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT49-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT49-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT49" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4a", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT50": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT50", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "50" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT50-EEPROM" + }, + { + "itf": "control", + "dev": "PORT50-CTRL" + } + ] + } + }, + "PORT50-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT50-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT50" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4b", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT50-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT50-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT50" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4b", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT51": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT51", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "51" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT51-EEPROM" + }, + { + "itf": "control", + "dev": "PORT51-CTRL" + } + ] + } + }, + "PORT51-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT51-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT51" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4c", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT51-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT51-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT51" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4c", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT52": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT52", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "52" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT52-EEPROM" + }, + { + "itf": "control", + "dev": "PORT52-CTRL" + } + ] + } + }, + "PORT52-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT52-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT52" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4d", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT52-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT52-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT52" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4d", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT53": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT53", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "53" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT53-EEPROM" + }, + { + "itf": "control", + "dev": "PORT53-CTRL" + } + ] + } + }, + "PORT53-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT53-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT53" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4e", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT53-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT53-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT53" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4e", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT54": { + "dev_info": { + "device_type": "QSFP28", + "device_name": "PORT54", + "device_parent": "MUX10" + }, + "dev_attr": { + "dev_idx": "54" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT54-EEPROM" + }, + { + "itf": "control", + "dev": "PORT54-CTRL" + } + ] + } + }, + "PORT54-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT54-EEPROM", + "device_parent": "MUX10", + "virt_parent": "PORT54" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4f", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT54-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT54-CTRL", + "device_parent": "MUX10", + "virt_parent": "PORT54" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x4f", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x76", + "attr_mask": "0x5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x77", + "attr_mask": "0x5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf_support b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pddf_support new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform.json b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform.json new file mode 100644 index 000000000000..3db26c98428e --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform.json @@ -0,0 +1,691 @@ +{ + "chassis": { + "name": "S8901-54XC", + "components": [ + { + "name": "CPLD1" + }, + { + "name": "CPLD2" + }, + { + "name": "BIOS" + }, + { + "name": "BMC" + } + ], + "fans": [ + { + "name": "Fan_1" + }, + { + "name": "Fan_2" + }, + { + "name": "Fan_3" + }, + { + "name": "Fan_4" + }, + { + "name": "Fan_5" + } + ], + "fan_drawers":[ + { + "name": "Fantray1", + "num_fans" : 1, + "fans": [ + { + "name": "Fan_1" + } + ] + }, + { + "name": "Fantray2", + "num_fans" : 1, + "fans": [ + { + "name": "Fan_2" + } + ] + }, + { + "name": "Fantray3", + "num_fans" : 1, + "fans": [ + { + "name": "Fan_3" + } + ] + }, + { + "name": "Fantray4", + "num_fans" : 1, + "fans": [ + { + "name": "Fan_4" + } + ] + }, + { + "name": "Fantray5", + "num_fans" : 1, + "fans": [ + { + "name": "Fan_5" + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "fans": [ + { + "name": "PSU1_FAN1" + } + ], + "thermals": [ + { + "name": "PSU1_TEMP1" + } + ] + }, + { + "name": "PSU2", + "fans": [ + { + "name": "PSU2_FAN1" + } + ], + "thermals": [ + { + "name": "PSU2_TEMP1" + } + ] + } + ], + "thermals": [ + { + "name": "TEMP_MAC" + }, + { + "name": "TEMP_ENV_MACCASE" + }, + { + "name": "TEMP_ENV_PSUCASE" + }, + { + "name": "TEMP_ENV_FANCONN" + }, + { + "name": "TEMP_ENV_FANCARD" + }, + { + "name": "TEMP_ENV_BMC" + }, + { + "name": "PSU-0-Thermal" + }, + { + "name": "PSU-1-Thermal" + } + ], + "sfps": [ + { + "name": "Ethernet0" + }, + { + "name": "Ethernet1" + }, + { + "name": "Ethernet2" + }, + { + "name": "Ethernet3" + }, + { + "name": "Ethernet4" + }, + { + "name": "Ethernet5" + }, + { + "name": "Ethernet6" + }, + { + "name": "Ethernet7" + }, + { + "name": "Ethernet8" + }, + { + "name": "Ethernet9" + }, + { + "name": "Ethernet10" + }, + { + "name": "Ethernet11" + }, + { + "name": "Ethernet12" + }, + { + "name": "Ethernet13" + }, + { + "name": "Ethernet14" + }, + { + "name": "Ethernet15" + }, + { + "name": "Ethernet16" + }, + { + "name": "Ethernet17" + }, + { + "name": "Ethernet18" + }, + { + "name": "Ethernet19" + }, + { + "name": "Ethernet20" + }, + { + "name": "Ethernet21" + }, + { + "name": "Ethernet22" + }, + { + "name": "Ethernet23" + }, + { + "name": "Ethernet24" + }, + { + "name": "Ethernet25" + }, + { + "name": "Ethernet26" + }, + { + "name": "Ethernet27" + }, + { + "name": "Ethernet28" + }, + { + "name": "Ethernet29" + }, + { + "name": "Ethernet30" + }, + { + "name": "Ethernet31" + }, + { + "name": "Ethernet32" + }, + { + "name": "Ethernet33" + }, + { + "name": "Ethernet34" + }, + { + "name": "Ethernet35" + }, + { + "name": "Ethernet36" + }, + { + "name": "Ethernet37" + }, + { + "name": "Ethernet38" + }, + { + "name": "Ethernet39" + }, + { + "name": "Ethernet40" + }, + { + "name": "Ethernet41" + }, + { + "name": "Ethernet42" + }, + { + "name": "Ethernet43" + }, + { + "name": "Ethernet44" + }, + { + "name": "Ethernet45" + }, + { + "name": "Ethernet46" + }, + { + "name": "Ethernet47" + }, + { + "name": "Ethernet48" + }, + { + "name": "Ethernet52" + }, + { + "name": "Ethernet56" + }, + { + "name": "Ethernet60" + }, + { + "name": "Ethernet64" + }, + { + "name": "Ethernet68" + }, + { + "name": "Ethernet72" + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "0", + "lanes": "1", + "breakout_modes": { + "1x25G[10G]" : [ "Eth0(Port0)" ] + } + }, + "Ethernet1": { + "index": "1", + "lanes": "2", + "breakout_modes": { + "1x25G[10G]" : [ "Eth1(Port1)" ] + } + }, + "Ethernet2": { + "index": "2", + "lanes": "3", + "breakout_modes": { + "1x25G[10G]" : [ "Eth2(Port2)" ] + } + }, + "Ethernet3": { + "index": "3", + "lanes": "4", + "breakout_modes": { + "1x25G[10G]" : [ "Eth3(Port3)" ] + } + }, + "Ethernet4": { + "index": "4", + "lanes": "5", + "breakout_modes": { + "1x25G[10G]" : [ "Eth4(Port4)" ] + } + }, + "Ethernet5": { + "index": "5", + "lanes": "6", + "breakout_modes": { + "1x25G[10G]" : [ "Eth5(Port5)" ] + } + }, + "Ethernet6": { + "index": "6", + "lanes": "7", + "breakout_modes": { + "1x25G[10G]" : [ "Eth6(Port6)" ] + } + }, + "Ethernet7": { + "index": "7", + "lanes": "8", + "breakout_modes": { + "1x25G[10G]" : [ "Eth7(Port7)" ] + } + }, + "Ethernet8": { + "index": "8", + "lanes": "9", + "breakout_modes": { + "1x25G[10G]" : [ "Eth8(Port8)" ] + } + }, + "Ethernet9": { + "index": "9", + "lanes": "10", + "breakout_modes": { + "1x25G[10G]" : [ "Eth9(Port9)" ] + } + }, + "Ethernet10": { + "index": "10", + "lanes": "11", + "breakout_modes": { + "1x25G[10G]" : [ "Eth10(Port10)" ] + } + }, + "Ethernet11": { + "index": "11", + "lanes": "12", + "breakout_modes": { + "1x25G[10G]" : [ "Eth11(Port11)" ] + } + }, + "Ethernet12": { + "index": "12", + "lanes": "13", + "breakout_modes": { + "1x25G[10G]" : [ "Eth12(Port12)" ] + } + }, + "Ethernet13": { + "index": "13", + "lanes": "14", + "breakout_modes": { + "1x25G[10G]" : [ "Eth13(Port13)" ] + } + }, + "Ethernet14": { + "index": "14", + "lanes": "15", + "breakout_modes": { + "1x25G[10G]" : [ "Eth14(Port14)" ] + } + }, + "Ethernet15": { + "index": "15", + "lanes": "16", + "breakout_modes": { + "1x25G[10G]" : [ "Eth15(Port15)" ] + } + }, + "Ethernet16": { + "index": "16", + "lanes": "17", + "breakout_modes": { + "1x25G[10G]" : [ "Eth16(Port16)" ] + } + }, + "Ethernet17": { + "index": "17", + "lanes": "18", + "breakout_modes": { + "1x25G[10G]" : [ "Eth17(Port17)" ] + } + }, + "Ethernet18": { + "index": "18", + "lanes": "19", + "breakout_modes": { + "1x25G[10G]" : [ "Eth18(Port18)" ] + } + }, + "Ethernet19": { + "index": "19", + "lanes": "20", + "breakout_modes": { + "1x25G[10G]" : [ "Eth19(Port19)" ] + } + }, + "Ethernet20": { + "index": "20", + "lanes": "21", + "breakout_modes": { + "1x25G[10G]" : [ "Eth20(Port20)" ] + } + }, + "Ethernet21": { + "index": "21", + "lanes": "22", + "breakout_modes": { + "1x25G[10G]" : [ "Eth21(Port21)" ] + } + }, + "Ethernet22": { + "index": "22", + "lanes": "23", + "breakout_modes": { + "1x25G[10G]" : [ "Eth22(Port22)" ] + } + }, + "Ethernet23": { + "index": "23", + "lanes": "24", + "breakout_modes": { + "1x25G[10G]" : [ "Eth23(Port23)" ] + } + }, + "Ethernet24": { + "index": "24", + "lanes": "25", + "breakout_modes": { + "1x25G[10G]" : [ "Eth24(Port24)" ] + } + }, + "Ethernet25": { + "index": "25", + "lanes": "26", + "breakout_modes": { + "1x25G[10G]" : [ "Eth25(Port25)" ] + } + }, + "Ethernet26": { + "index": "26", + "lanes": "27", + "breakout_modes": { + "1x25G[10G]" : [ "Eth26(Port26)" ] + } + }, + "Ethernet27": { + "index": "27", + "lanes": "28", + "breakout_modes": { + "1x25G[10G]" : [ "Eth27(Port27)" ] + } + }, + "Ethernet28": { + "index": "28", + "lanes": "41", + "breakout_modes": { + "1x25G[10G]" : [ "Eth28(Port28)" ] + } + }, + "Ethernet29": { + "index": "29", + "lanes": "42", + "breakout_modes": { + "1x25G[10G]" : [ "Eth29(Port29)" ] + } + }, + "Ethernet30": { + "index": "30", + "lanes": "43", + "breakout_modes": { + "1x25G[10G]" : [ "Eth30(Port30)" ] + } + }, + "Ethernet31": { + "index": "31", + "lanes": "44", + "breakout_modes": { + "1x25G[10G]" : [ "Eth31(Port31)" ] + } + }, + "Ethernet32": { + "index": "32", + "lanes": "61", + "breakout_modes": { + "1x25G[10G]" : [ "Eth32(Port32)" ] + } + }, + "Ethernet33": { + "index": "33", + "lanes": "62", + "breakout_modes": { + "1x25G[10G]" : [ "Eth33(Port33)" ] + } + }, + "Ethernet34": { + "index": "34", + "lanes": "63", + "breakout_modes": { + "1x25G[10G]" : [ "Eth34(Port34)" ] + } + }, + "Ethernet35": { + "index": "35", + "lanes": "64", + "breakout_modes": { + "1x25G[10G]" : [ "Eth35(Port35)" ] + } + }, + "Ethernet36": { + "index": "36", + "lanes": "65", + "breakout_modes": { + "1x25G[10G]" : [ "Eth36(Port36)" ] + } + }, + "Ethernet37": { + "index": "37", + "lanes": "66", + "breakout_modes": { + "1x25G[10G]" : [ "Eth37(Port37)" ] + } + }, + "Ethernet38": { + "index": "38", + "lanes": "67", + "breakout_modes": { + "1x25G[10G]" : [ "Eth38(Port38)" ] + } + }, + "Ethernet39": { + "index": "39", + "lanes": "68", + "breakout_modes": { + "1x25G[10G]" : [ "Eth39(Port39)" ] + } + }, + "Ethernet40": { + "index": "40", + "lanes": "69", + "breakout_modes": { + "1x25G[10G]" : [ "Eth40(Port40)" ] + } + }, + "Ethernet41": { + "index": "41", + "lanes": "70", + "breakout_modes": { + "1x25G[10G]" : [ "Eth41(Port41)" ] + } + }, + "Ethernet42": { + "index": "42", + "lanes": "71", + "breakout_modes": { + "1x25G[10G]" : [ "Eth42(Port42)" ] + } + }, + "Ethernet43": { + "index": "43", + "lanes": "72", + "breakout_modes": { + "1x25G[10G]" : [ "Eth43(Port43)" ] + } + }, + "Ethernet44": { + "index": "44", + "lanes": "73", + "breakout_modes": { + "1x25G[10G]" : [ "Eth44(Port44)" ] + } + }, + "Ethernet45": { + "index": "45", + "lanes": "74", + "breakout_modes": { + "1x25G[10G]" : [ "Eth45(Port45)" ] + } + }, + "Ethernet46": { + "index": "46", + "lanes": "75", + "breakout_modes": { + "1x25G[10G]" : [ "Eth46(Port46)" ] + } + }, + "Ethernet47": { + "index": "47", + "lanes": "76", + "breakout_modes": { + "1x25G[10G]" : [ "Eth47(Port47)" ] + } + }, + "Ethernet48": { + "index": "48,48,48,48", + "lanes": "37,38,39,40", + "breakout_modes": { + "1x100G[40G]" : [ "Eth48(Port48)" ] + } + }, + "Ethernet52": { + "index": "49,49,49,49", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x100G[40G]" : [ "Eth49(Port49)" ] + } + }, + "Ethernet56": { + "index": "50,50,50,50", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x100G[40G]" : [ "Eth50(Port50)" ] + } + }, + "Ethernet60": { + "index": "51,51,51,51", + "lanes": "49,50,51,52", + "breakout_modes": { + "1x100G[40G]" : [ "Eth51(Port51)" ] + } + }, + "Ethernet64": { + "index": "52,52,52,52", + "lanes": "53,54,55,56", + "breakout_modes": { + "1x100G[40G]" : [ "Eth52(Port52)" ], + "2x50G": ["Eth52/1(Port52)", "Eth52/2(Port52)"], + "4x25G": ["Eth52/1(Port52)", "Eth52/2(Port52)", "Eth52/3(Port52)", "Eth52/4(Port52)"], + "4x10G": ["Eth52/1(Port52)", "Eth52/2(Port52)", "Eth52/3(Port52)", "Eth52/4(Port52)"] + } + }, + "Ethernet68": { + "index": "53,53,53,53", + "lanes": "57,58,59,60", + "breakout_modes": { + "1x100G[40G]" : [ "Eth53(Port53)" ], + "2x50G": ["Eth53/1(Port53)", "Eth53/2(Port53)"], + "4x25G": ["Eth53/1(Port53)", "Eth53/2(Port53)", "Eth53/3(Port53)", "Eth53/4(Port53)"], + "4x10G": ["Eth53/1(Port53)", "Eth53/2(Port53)", "Eth53/3(Port53)", "Eth53/4(Port53)"] + } + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform_asic b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform_asic new file mode 100644 index 000000000000..960467652765 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform_components.json b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform_components.json new file mode 100644 index 000000000000..d122f45806c0 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform_components.json @@ -0,0 +1,12 @@ +{ + "chassis": { + "x86_64-ufispace_s8901_54xc-r0": { + "component": { + "CPLD1": { }, + "CPLD2": { }, + "BIOS": { }, + "BMC": {} + } + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform_env.conf b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform_env.conf new file mode 100644 index 000000000000..77fd88ac3678 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/platform_env.conf @@ -0,0 +1 @@ +SYNCD_SHM_SIZE=256m diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pmon_daemon_control.json b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pmon_daemon_control.json new file mode 100644 index 000000000000..e348e0168fa5 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/pmon_daemon_control.json @@ -0,0 +1,9 @@ +{ + "skip_pcied": false, + "skip_fancontrol": false, + "skip_thermalctld": false, + "skip_ledd": true, + "skip_xcvrd": false, + "skip_psud": false, + "skip_syseepromd": false +} diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/sensors.conf b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/sensors.conf new file mode 100644 index 000000000000..b1a69433405b --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/sensors.conf @@ -0,0 +1 @@ +# libsensors configuration file diff --git a/device/ufispace/x86_64-ufispace_s8901_54xc-r0/system_health_monitoring_config.json b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/system_health_monitoring_config.json new file mode 100644 index 000000000000..467d81304de0 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s8901_54xc-r0/system_health_monitoring_config.json @@ -0,0 +1,15 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu", + "fan" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "yellow", + "normal": "green", + "booting": "green_blink" + } +} diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/hwsku.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/hwsku.json new file mode 100644 index 000000000000..52ee4d8e9daa --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/hwsku.json @@ -0,0 +1,136 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet4": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet8": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet12": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet16": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet20": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet24": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet28": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet32": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet36": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet40": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet44": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet48": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet52": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet56": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet60": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet64": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet68": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet72": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet76": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet80": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet84": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet88": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet92": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet96": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet100": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet104": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet108": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet112": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet116": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet120": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet124": { + "default_brkout_mode": "1x100G[40G]" + }, + + "Ethernet128": { + "default_brkout_mode": "1x10G" + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/sai.profile b/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/sai.profile new file mode 100755 index 000000000000..f602ed298f70 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/td3-x7-s9110-32x.config.bcm diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/td3-x7-s9110-32x.config.bcm b/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/td3-x7-s9110-32x.config.bcm new file mode 100755 index 000000000000..94e9aa183a45 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/UFISPACE-S9110-32X/td3-x7-s9110-32x.config.bcm @@ -0,0 +1,671 @@ +# cfg version: r2, 20230713 + +pbmp_xport_xe=0xFFFFFFFFFFFFFFFFFfffffffffffffffe + +# Software config lane swaps + +#FC0 QSFP port 0 +phy_chain_rx_lane_map_physical{1}=0x2310 +phy_chain_tx_lane_map_physical{1}=0x0132 + +#FC1 QSFP port 1 +phy_chain_rx_lane_map_physical{5}=0x3120 +phy_chain_tx_lane_map_physical{5}=0x1203 + +#FC2 QSFP port 2 +phy_chain_rx_lane_map_physical{9}=0x2310 +phy_chain_tx_lane_map_physical{9}=0x0213 + +#FC3 QSFP port 3 +phy_chain_rx_lane_map_physical{13}=0x3120 +phy_chain_tx_lane_map_physical{13}=0x1203 + +#FC4 QSFP port 4 +phy_chain_rx_lane_map_physical{17}=0x2310 +phy_chain_tx_lane_map_physical{17}=0x0132 + +#FC5 QSFP port 5 +phy_chain_rx_lane_map_physical{21}=0x3120 +phy_chain_tx_lane_map_physical{21}=0x1203 + +#FC6 QSFP port 6 +phy_chain_rx_lane_map_physical{25}=0x2310 +phy_chain_tx_lane_map_physical{25}=0x0132 + +#FC7 QSFP port 7 +phy_chain_rx_lane_map_physical{29}=0x3120 +phy_chain_tx_lane_map_physical{29}=0x1203 + +#FC8 QSFP port 8 +phy_chain_rx_lane_map_physical{33}=0x2310 +phy_chain_tx_lane_map_physical{33}=0x0132 + +#FC9 QSFP port 9 +phy_chain_rx_lane_map_physical{37}=0x3120 +phy_chain_tx_lane_map_physical{37}=0x1203 + +#FC10 QSFP port 10 +phy_chain_rx_lane_map_physical{41}=0x2310 +phy_chain_tx_lane_map_physical{41}=0x0132 + +#FC11 QSFP port 11 +phy_chain_rx_lane_map_physical{45}=0x3120 +phy_chain_tx_lane_map_physical{45}=0x1203 + +#FC12 QSFP port 12 +phy_chain_rx_lane_map_physical{49}=0x1320 +phy_chain_tx_lane_map_physical{49}=0x0231 + +#FC13 QSFP port 13 +phy_chain_rx_lane_map_physical{53}=0x3120 +phy_chain_tx_lane_map_physical{53}=0x1203 + +#FC14 QSFP port 14 +phy_chain_rx_lane_map_physical{57}=0x2310 +phy_chain_tx_lane_map_physical{57}=0x0132 + +#FC15 QSFP port 15 +phy_chain_rx_lane_map_physical{61}=0x3120 +phy_chain_tx_lane_map_physical{61}=0x1203 + +#FC16 QSFP port 17 +phy_chain_rx_lane_map_physical{65}=0x3021 +phy_chain_tx_lane_map_physical{65}=0x0312 + +#FC17 QSFP port 16 +phy_chain_rx_lane_map_physical{69}=0x1032 +phy_chain_tx_lane_map_physical{69}=0x3201 + +#FC18 QSFP port 19 +phy_chain_rx_lane_map_physical{73}=0x3021 +phy_chain_tx_lane_map_physical{73}=0x1302 + +#FC19 QSFP port 18 +phy_chain_rx_lane_map_physical{77}=0x2013 +phy_chain_tx_lane_map_physical{77}=0x3210 + +#FC20 QSFP port 21 +phy_chain_rx_lane_map_physical{81}=0x3021 +phy_chain_tx_lane_map_physical{81}=0x1302 + +#FC21 QSFP port 20 +phy_chain_rx_lane_map_physical{85}=0x2031 +phy_chain_tx_lane_map_physical{85}=0x3201 + +#FC22 QSFP port 23 +phy_chain_rx_lane_map_physical{89}=0x3021 +phy_chain_tx_lane_map_physical{89}=0x1302 + +#FC23 QSFP port 22 +phy_chain_rx_lane_map_physical{93}=0x2031 +phy_chain_tx_lane_map_physical{93}=0x3201 + +#FC24 QSFP port 25 +phy_chain_rx_lane_map_physical{97}=0x3021 +phy_chain_tx_lane_map_physical{97}=0x1302 + +#FC25 QSFP port 24 +phy_chain_rx_lane_map_physical{101}=0x2031 +phy_chain_tx_lane_map_physical{101}=0x1302 + +#FC26 QSFP port 27 +phy_chain_rx_lane_map_physical{105}=0x3021 +phy_chain_tx_lane_map_physical{105}=0x1302 + +#FC27 QSFP port 26 +phy_chain_rx_lane_map_physical{109}=0x2031 +phy_chain_tx_lane_map_physical{109}=0x1302 + +#FC28 QSFP port 29 +phy_chain_rx_lane_map_physical{113}=0x2031 +phy_chain_tx_lane_map_physical{113}=0x1302 + +#FC29 QSFP port 28 +phy_chain_rx_lane_map_physical{117}=0x2031 +phy_chain_tx_lane_map_physical{117}=0x1302 + +#FC30 QSFP port 31 +phy_chain_rx_lane_map_physical{121}=0x2031 +phy_chain_tx_lane_map_physical{121}=0x1302 + +#FC31 QSFP port 30 +phy_chain_rx_lane_map_physical{125}=0x2031 +phy_chain_tx_lane_map_physical{125}=0x3201 + +#MC management port (front port) +phy_chain_rx_lane_map_physical{129}=0x3210 +phy_chain_tx_lane_map_physical{129}=0x3210 + + +####### Polarity flips after lane swaps ###### + +#FC0 QSFP port 0 +phy_chain_rx_polarity_flip_physical{1}=0x1 +phy_chain_rx_polarity_flip_physical{2}=0x0 +phy_chain_rx_polarity_flip_physical{3}=0x0 +phy_chain_rx_polarity_flip_physical{4}=0x1 + +phy_chain_tx_polarity_flip_physical{1}=0x1 +phy_chain_tx_polarity_flip_physical{2}=0x0 +phy_chain_tx_polarity_flip_physical{3}=0x0 +phy_chain_tx_polarity_flip_physical{4}=0x1 + +#FC1 QSFP port 1 +phy_chain_rx_polarity_flip_physical{5}=0x0 +phy_chain_rx_polarity_flip_physical{6}=0x0 +phy_chain_rx_polarity_flip_physical{7}=0x1 +phy_chain_rx_polarity_flip_physical{8}=0x1 + +phy_chain_tx_polarity_flip_physical{5}=0x0 +phy_chain_tx_polarity_flip_physical{6}=0x1 +phy_chain_tx_polarity_flip_physical{7}=0x1 +phy_chain_tx_polarity_flip_physical{8}=0x1 + +#FC2 QSFP port 2 +phy_chain_rx_polarity_flip_physical{9}=0x1 +phy_chain_rx_polarity_flip_physical{10}=0x0 +phy_chain_rx_polarity_flip_physical{11}=0x0 +phy_chain_rx_polarity_flip_physical{12}=0x1 + +phy_chain_tx_polarity_flip_physical{9}=0x0 +phy_chain_tx_polarity_flip_physical{10}=0x1 +phy_chain_tx_polarity_flip_physical{11}=0x1 +phy_chain_tx_polarity_flip_physical{12}=0x0 + +#FC3 QSFP port 3 +phy_chain_rx_polarity_flip_physical{13}=0x0 +phy_chain_rx_polarity_flip_physical{14}=0x0 +phy_chain_rx_polarity_flip_physical{15}=0x1 +phy_chain_rx_polarity_flip_physical{16}=0x1 + +phy_chain_tx_polarity_flip_physical{13}=0x0 +phy_chain_tx_polarity_flip_physical{14}=0x1 +phy_chain_tx_polarity_flip_physical{15}=0x1 +phy_chain_tx_polarity_flip_physical{16}=0x1 + +#FC4 QSFP port 4 +phy_chain_rx_polarity_flip_physical{17}=0x1 +phy_chain_rx_polarity_flip_physical{18}=0x0 +phy_chain_rx_polarity_flip_physical{19}=0x0 +phy_chain_rx_polarity_flip_physical{20}=0x1 + +phy_chain_tx_polarity_flip_physical{17}=0x0 +phy_chain_tx_polarity_flip_physical{18}=0x0 +phy_chain_tx_polarity_flip_physical{19}=0x1 +phy_chain_tx_polarity_flip_physical{20}=0x1 + +#FC5 QSFP port 5 +phy_chain_rx_polarity_flip_physical{21}=0x0 +phy_chain_rx_polarity_flip_physical{22}=0x0 +phy_chain_rx_polarity_flip_physical{23}=0x1 +phy_chain_rx_polarity_flip_physical{24}=0x1 + +phy_chain_tx_polarity_flip_physical{21}=0x0 +phy_chain_tx_polarity_flip_physical{22}=0x1 +phy_chain_tx_polarity_flip_physical{23}=0x1 +phy_chain_tx_polarity_flip_physical{24}=0x1 + +#FC6 QSFP port 6 +phy_chain_rx_polarity_flip_physical{25}=0x0 +phy_chain_rx_polarity_flip_physical{26}=0x1 +phy_chain_rx_polarity_flip_physical{27}=0x1 +phy_chain_rx_polarity_flip_physical{28}=0x0 + +phy_chain_tx_polarity_flip_physical{25}=0x1 +phy_chain_tx_polarity_flip_physical{26}=0x0 +phy_chain_tx_polarity_flip_physical{27}=0x0 +phy_chain_tx_polarity_flip_physical{28}=0x0 + +#FC7 QSFP port 7 +phy_chain_rx_polarity_flip_physical{29}=0x1 +phy_chain_rx_polarity_flip_physical{30}=0x1 +phy_chain_rx_polarity_flip_physical{31}=0x0 +phy_chain_rx_polarity_flip_physical{32}=0x0 + +phy_chain_tx_polarity_flip_physical{29}=0x0 +phy_chain_tx_polarity_flip_physical{30}=0x1 +phy_chain_tx_polarity_flip_physical{31}=0x1 +phy_chain_tx_polarity_flip_physical{32}=0x1 + +#FC8 QSFP port 8 +phy_chain_rx_polarity_flip_physical{33}=0x0 +phy_chain_rx_polarity_flip_physical{34}=0x1 +phy_chain_rx_polarity_flip_physical{35}=0x1 +phy_chain_rx_polarity_flip_physical{36}=0x0 + +phy_chain_tx_polarity_flip_physical{33}=0x0 +phy_chain_tx_polarity_flip_physical{34}=0x0 +phy_chain_tx_polarity_flip_physical{35}=0x1 +phy_chain_tx_polarity_flip_physical{36}=0x1 + +#FC9 QSFP port 9 +phy_chain_rx_polarity_flip_physical{37}=0x1 +phy_chain_rx_polarity_flip_physical{38}=0x1 +phy_chain_rx_polarity_flip_physical{39}=0x0 +phy_chain_rx_polarity_flip_physical{40}=0x0 + +phy_chain_tx_polarity_flip_physical{37}=0x0 +phy_chain_tx_polarity_flip_physical{38}=0x1 +phy_chain_tx_polarity_flip_physical{39}=0x1 +phy_chain_tx_polarity_flip_physical{40}=0x1 + +#FC10 QSFP port 10 +phy_chain_rx_polarity_flip_physical{41}=0x0 +phy_chain_rx_polarity_flip_physical{42}=0x1 +phy_chain_rx_polarity_flip_physical{43}=0x1 +phy_chain_rx_polarity_flip_physical{44}=0x0 + +phy_chain_tx_polarity_flip_physical{41}=0x1 +phy_chain_tx_polarity_flip_physical{42}=0x0 +phy_chain_tx_polarity_flip_physical{43}=0x0 +phy_chain_tx_polarity_flip_physical{44}=0x1 + +#FC11 QSFP port 11 +phy_chain_rx_polarity_flip_physical{45}=0x1 +phy_chain_rx_polarity_flip_physical{46}=0x1 +phy_chain_rx_polarity_flip_physical{47}=0x0 +phy_chain_rx_polarity_flip_physical{48}=0x0 + +phy_chain_tx_polarity_flip_physical{45}=0x0 +phy_chain_tx_polarity_flip_physical{46}=0x1 +phy_chain_tx_polarity_flip_physical{47}=0x1 +phy_chain_tx_polarity_flip_physical{48}=0x1 + +#FC12 QSFP port 12 +phy_chain_rx_polarity_flip_physical{49}=0x0 +phy_chain_rx_polarity_flip_physical{50}=0x0 +phy_chain_rx_polarity_flip_physical{51}=0x1 +phy_chain_rx_polarity_flip_physical{52}=0x1 + +phy_chain_tx_polarity_flip_physical{49}=0x1 +phy_chain_tx_polarity_flip_physical{50}=0x0 +phy_chain_tx_polarity_flip_physical{51}=0x0 +phy_chain_tx_polarity_flip_physical{52}=0x1 + +#FC13 QSFP port 13 +phy_chain_rx_polarity_flip_physical{53}=0x0 +phy_chain_rx_polarity_flip_physical{54}=0x0 +phy_chain_rx_polarity_flip_physical{55}=0x1 +phy_chain_rx_polarity_flip_physical{56}=0x1 + +phy_chain_tx_polarity_flip_physical{53}=0x1 +phy_chain_tx_polarity_flip_physical{54}=0x0 +phy_chain_tx_polarity_flip_physical{55}=0x0 +phy_chain_tx_polarity_flip_physical{56}=0x0 + +#FC14 QSFP port 14 +phy_chain_rx_polarity_flip_physical{57}=0x1 +phy_chain_rx_polarity_flip_physical{58}=0x0 +phy_chain_rx_polarity_flip_physical{59}=0x0 +phy_chain_rx_polarity_flip_physical{60}=0x1 + +phy_chain_tx_polarity_flip_physical{57}=0x1 +phy_chain_tx_polarity_flip_physical{58}=0x1 +phy_chain_tx_polarity_flip_physical{59}=0x1 +phy_chain_tx_polarity_flip_physical{60}=0x0 + +#FC15 QSFP port 15 +phy_chain_rx_polarity_flip_physical{61}=0x0 +phy_chain_rx_polarity_flip_physical{62}=0x0 +phy_chain_rx_polarity_flip_physical{63}=0x1 +phy_chain_rx_polarity_flip_physical{64}=0x1 + +phy_chain_tx_polarity_flip_physical{61}=0x1 +phy_chain_tx_polarity_flip_physical{62}=0x0 +phy_chain_tx_polarity_flip_physical{63}=0x0 +phy_chain_tx_polarity_flip_physical{64}=0x0 + +#FC16 QSFP port 17 +phy_chain_rx_polarity_flip_physical{65}=0x1 +phy_chain_rx_polarity_flip_physical{66}=0x1 +phy_chain_rx_polarity_flip_physical{67}=0x0 +phy_chain_rx_polarity_flip_physical{68}=0x0 + +phy_chain_tx_polarity_flip_physical{65}=0x1 +phy_chain_tx_polarity_flip_physical{66}=0x0 +phy_chain_tx_polarity_flip_physical{67}=0x0 +phy_chain_tx_polarity_flip_physical{68}=0x0 + +#FC17 QSFP port 16 +phy_chain_rx_polarity_flip_physical{69}=0x1 +phy_chain_rx_polarity_flip_physical{70}=0x0 +phy_chain_rx_polarity_flip_physical{71}=0x1 +phy_chain_rx_polarity_flip_physical{72}=0x1 + +phy_chain_tx_polarity_flip_physical{69}=0x1 +phy_chain_tx_polarity_flip_physical{70}=0x0 +phy_chain_tx_polarity_flip_physical{71}=0x0 +phy_chain_tx_polarity_flip_physical{72}=0x0 + +#FC18 QSFP port 19 +phy_chain_rx_polarity_flip_physical{73}=0x1 +phy_chain_rx_polarity_flip_physical{74}=0x1 +phy_chain_rx_polarity_flip_physical{75}=0x0 +phy_chain_rx_polarity_flip_physical{76}=0x0 + +phy_chain_tx_polarity_flip_physical{73}=0x1 +phy_chain_tx_polarity_flip_physical{74}=0x1 +phy_chain_tx_polarity_flip_physical{75}=0x0 +phy_chain_tx_polarity_flip_physical{76}=0x1 + +#FC19 QSFP port 18 +phy_chain_rx_polarity_flip_physical{77}=0x0 +phy_chain_rx_polarity_flip_physical{78}=0x0 +phy_chain_rx_polarity_flip_physical{79}=0x1 +phy_chain_rx_polarity_flip_physical{80}=0x1 + +phy_chain_tx_polarity_flip_physical{77}=0x0 +phy_chain_tx_polarity_flip_physical{78}=0x0 +phy_chain_tx_polarity_flip_physical{79}=0x0 +phy_chain_tx_polarity_flip_physical{80}=0x0 + +#FC20 QSFP port 21 +phy_chain_rx_polarity_flip_physical{81}=0x1 +phy_chain_rx_polarity_flip_physical{82}=0x1 +phy_chain_rx_polarity_flip_physical{83}=0x0 +phy_chain_rx_polarity_flip_physical{84}=0x0 + +phy_chain_tx_polarity_flip_physical{81}=0x1 +phy_chain_tx_polarity_flip_physical{82}=0x1 +phy_chain_tx_polarity_flip_physical{83}=0x0 +phy_chain_tx_polarity_flip_physical{84}=0x1 + +#FC21 QSFP port 20 +phy_chain_rx_polarity_flip_physical{85}=0x0 +phy_chain_rx_polarity_flip_physical{86}=0x1 +phy_chain_rx_polarity_flip_physical{87}=0x1 +phy_chain_rx_polarity_flip_physical{88}=0x0 + +phy_chain_tx_polarity_flip_physical{85}=0x0 +phy_chain_tx_polarity_flip_physical{86}=0x0 +phy_chain_tx_polarity_flip_physical{87}=0x1 +phy_chain_tx_polarity_flip_physical{88}=0x0 + +#FC22 QSFP port 23 +phy_chain_rx_polarity_flip_physical{89}=0x1 +phy_chain_rx_polarity_flip_physical{90}=0x1 +phy_chain_rx_polarity_flip_physical{91}=0x0 +phy_chain_rx_polarity_flip_physical{92}=0x0 + +phy_chain_tx_polarity_flip_physical{89}=0x1 +phy_chain_tx_polarity_flip_physical{90}=0x1 +phy_chain_tx_polarity_flip_physical{91}=0x0 +phy_chain_tx_polarity_flip_physical{92}=0x1 + +#FC23 QSFP port 22 +phy_chain_rx_polarity_flip_physical{93}=0x0 +phy_chain_rx_polarity_flip_physical{94}=0x1 +phy_chain_rx_polarity_flip_physical{95}=0x1 +phy_chain_rx_polarity_flip_physical{96}=0x0 + +phy_chain_tx_polarity_flip_physical{93}=0x0 +phy_chain_tx_polarity_flip_physical{94}=0x1 +phy_chain_tx_polarity_flip_physical{95}=0x1 +phy_chain_tx_polarity_flip_physical{96}=0x0 + +#FC24 QSFP port 25 +phy_chain_rx_polarity_flip_physical{97}=0x1 +phy_chain_rx_polarity_flip_physical{98}=0x1 +phy_chain_rx_polarity_flip_physical{99}=0x0 +phy_chain_rx_polarity_flip_physical{100}=0x0 + +phy_chain_tx_polarity_flip_physical{97}=0x1 +phy_chain_tx_polarity_flip_physical{98}=0x1 +phy_chain_tx_polarity_flip_physical{99}=0x0 +phy_chain_tx_polarity_flip_physical{100}=0x1 + +#FC25 QSFP port 24 +phy_chain_rx_polarity_flip_physical{101}=0x0 +phy_chain_rx_polarity_flip_physical{102}=0x1 +phy_chain_rx_polarity_flip_physical{103}=0x1 +phy_chain_rx_polarity_flip_physical{104}=0x0 + +phy_chain_tx_polarity_flip_physical{101}=0x1 +phy_chain_tx_polarity_flip_physical{102}=0x0 +phy_chain_tx_polarity_flip_physical{103}=0x0 +phy_chain_tx_polarity_flip_physical{104}=0x1 + +#FC26 QSFP port 27 +phy_chain_rx_polarity_flip_physical{105}=0x0 +phy_chain_rx_polarity_flip_physical{106}=0x0 +phy_chain_rx_polarity_flip_physical{107}=0x1 +phy_chain_rx_polarity_flip_physical{108}=0x1 + +phy_chain_tx_polarity_flip_physical{105}=0x1 +phy_chain_tx_polarity_flip_physical{106}=0x1 +phy_chain_tx_polarity_flip_physical{107}=0x0 +phy_chain_tx_polarity_flip_physical{108}=0x1 + +#FC27 QSFP port 26 +phy_chain_rx_polarity_flip_physical{109}=0x1 +phy_chain_rx_polarity_flip_physical{110}=0x0 +phy_chain_rx_polarity_flip_physical{111}=0x0 +phy_chain_rx_polarity_flip_physical{112}=0x1 + +phy_chain_tx_polarity_flip_physical{109}=0x1 +phy_chain_tx_polarity_flip_physical{110}=0x0 +phy_chain_tx_polarity_flip_physical{111}=0x0 +phy_chain_tx_polarity_flip_physical{112}=0x0 + +#FC28 QSFP port 29 +phy_chain_rx_polarity_flip_physical{113}=0x0 +phy_chain_rx_polarity_flip_physical{114}=0x1 +phy_chain_rx_polarity_flip_physical{115}=0x1 +phy_chain_rx_polarity_flip_physical{116}=0x0 + +phy_chain_tx_polarity_flip_physical{113}=0x1 +phy_chain_tx_polarity_flip_physical{114}=0x1 +phy_chain_tx_polarity_flip_physical{115}=0x0 +phy_chain_tx_polarity_flip_physical{116}=0x1 + +#FC29 QSFP port 28 +phy_chain_rx_polarity_flip_physical{117}=0x1 +phy_chain_rx_polarity_flip_physical{118}=0x0 +phy_chain_rx_polarity_flip_physical{119}=0x0 +phy_chain_rx_polarity_flip_physical{120}=0x1 + +phy_chain_tx_polarity_flip_physical{117}=0x1 +phy_chain_tx_polarity_flip_physical{118}=0x0 +phy_chain_tx_polarity_flip_physical{119}=0x0 +phy_chain_tx_polarity_flip_physical{120}=0x1 + +#FC30 QSFP port 31 +phy_chain_rx_polarity_flip_physical{121}=0x1 +phy_chain_rx_polarity_flip_physical{122}=0x1 +phy_chain_rx_polarity_flip_physical{123}=0x0 +phy_chain_rx_polarity_flip_physical{124}=0x0 + +phy_chain_tx_polarity_flip_physical{121}=0x1 +phy_chain_tx_polarity_flip_physical{122}=0x1 +phy_chain_tx_polarity_flip_physical{123}=0x0 +phy_chain_tx_polarity_flip_physical{124}=0x1 + +#FC31 QSFP port 30 +phy_chain_rx_polarity_flip_physical{125}=0x1 +phy_chain_rx_polarity_flip_physical{126}=0x0 +phy_chain_rx_polarity_flip_physical{127}=0x0 +phy_chain_rx_polarity_flip_physical{128}=0x1 + +phy_chain_tx_polarity_flip_physical{125}=0x0 +phy_chain_tx_polarity_flip_physical{126}=0x0 +phy_chain_tx_polarity_flip_physical{127}=0x1 +phy_chain_tx_polarity_flip_physical{128}=0x0 + +#MC +phy_chain_rx_polarity_flip_physical{129}=0x0 +phy_chain_rx_polarity_flip_physical{130}=0x0 +phy_chain_rx_polarity_flip_physical{131}=0x0 +phy_chain_rx_polarity_flip_physical{132}=0x0 + +phy_chain_tx_polarity_flip_physical{129}=0x0 +phy_chain_tx_polarity_flip_physical{130}=0x0 +phy_chain_tx_polarity_flip_physical{131}=0x0 +phy_chain_tx_polarity_flip_physical{132}=0x0 + + +#Portmap setting +#FC0 QSFP port 0 +portmap_1=1:100 + +#FC1 QSFP port 1 +portmap_5=5:100 + +#FC2 QSFP port 2 +portmap_9=9:100 + +#FC3 QSFP port 3 +portmap_13=13:100 + +#FC4 QSFP port 4 +portmap_17=17:100 + +#FC5 QSFP port 5 +portmap_21=21:100 + +#FC6 QSFP port 6 +portmap_25=25:100 + +#FC7 QSFP port 7 +portmap_29=29:100 + +#FC8 QSFP port 8 +portmap_33=33:100 + +#FC9 QSFP port 9 +portmap_37=37:100 + +#FC10 QSFP port 10 +portmap_41=41:100 + +#FC11 QSFP port 11 +portmap_45=45:100 + +#FC12 QSFP port 12 +portmap_49=49:100 + +#FC13 QSFP port 13 +portmap_53=53:100 + +#FC14 QSFP port 14 +portmap_57=57:100 + +#FC15 QSFP port 15 +portmap_61=61:100 + +#MC port 66 - management port (front port) +portmap_66=129:10:m + + +#FC16 QSFP port 17 +portmap_67=65:100 + +#FC17 QSFP port 16 +portmap_71=69:100 + +#FC18 QSFP port 19 +portmap_75=73:100 + +#FC19 QSFP port 18 +portmap_79=77:100 + +#FC20 QSFP port 21 +portmap_83=81:100 + +#FC21 QSFP port 20 +portmap_87=85:100 + +#FC22 QSFP port 23 +portmap_91=89:100 + +#FC23 QSFP port 22 +portmap_95=93:100 + +#FC24 QSFP port 25 +portmap_99=97:100 + +#FC25 QSFP port 24 +portmap_103=101:100 + +#FC26 QSFP port 27 +portmap_107=105:100 + +#FC27 QSFP port 26 +portmap_111=109:100 + +#FC28 QSFP port 29 +portmap_115=113:100 + +#FC29 QSFP port 28 +portmap_119=117:100 + +#FC30 QSFP port 31 +portmap_123=121:100 + +#FC31 QSFP port 30 +portmap_127=125:100 + + +dport_map_enable=1 + +dport_map_port_1=1 +dport_map_port_5=2 +dport_map_port_9=3 +dport_map_port_13=4 +dport_map_port_17=5 +dport_map_port_21=6 +dport_map_port_25=7 +dport_map_port_29=8 +dport_map_port_33=9 +dport_map_port_37=10 +dport_map_port_41=11 +dport_map_port_45=12 +dport_map_port_49=13 +dport_map_port_53=14 +dport_map_port_57=15 +dport_map_port_61=16 +dport_map_port_71=17 +dport_map_port_67=18 +dport_map_port_79=19 +dport_map_port_75=20 +dport_map_port_87=21 +dport_map_port_83=22 +dport_map_port_95=23 +dport_map_port_91=24 +dport_map_port_103=25 +dport_map_port_99=26 +dport_map_port_111=27 +dport_map_port_107=28 +dport_map_port_119=29 +dport_map_port_115=30 +dport_map_port_127=31 +dport_map_port_123=32 +dport_map_port_66=33 + + +core_clock_frequency=1525 +dpp_clock_ratio=2:3 +oversubscribe_mode=1 +parity_enable=0 +mem_cache_enable=0 +l2_mem_entries=32768 +l3_mem_entries=16384 +fpem_mem_entries=131072 +l2xmsg_mode=1 +bcm_num_cos=10 +bcm_stat_interval=2000000 +cdma_timeout_usec=3000000 +ipv6_lpm_128b_enable=0x1 +l3_max_ecmp_mode=1 +lpm_scaling_enable=0 +max_vp_lags=0 +miim_intr_enable=0 +module_64ports=1 +schan_intr_enable=0 +stable_size=0x5500000 +tdma_timeout_usec=3000000 +skip_L2_USER_ENTRY=0 +bcm_tunnel_term_compatible_mode=1 +ifp_inports_support_enable=1 +port_flex_enable=1 + + diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/custom_led.bin b/device/ufispace/x86_64-ufispace_s9110_32x-r0/custom_led.bin new file mode 100755 index 0000000000000000000000000000000000000000..82315db109edeb939dfa87e5a89513c04c7b097a GIT binary patch literal 640 zcmY+%F-rnb00;2*^cqAO8XBY;?oNY{hKitw=hbTK!tMf`uD|$7kw0@h;_M7_qmTr12{H!_hl*xFBNlj36;+NuaoWyC| zaitAyVkdTT<9xpA+4yNs2r1^}aJGcA0?u5VZQyJRXZtu?z}X_smT|U*vl7lWakh)I tL!6!9>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "PSU1-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU1-EEPROM", + "device_parent": "MUX1", + "virt_parent": "PSU1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x5a", + "dev_type": "psu_eeprom" + }, + "attr_list": [ + { + "attr_name":"psu_present", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x1", + "attr_cmpval":"0x0", + "attr_len":"1" + }, + { + "attr_name":"psu_power_good", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x10", + "attr_cmpval":"0x10", + "attr_len":"1" + } + ] + } + }, + "PSU2": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU2", + "device_parent": "MUX1" + }, + "dev_attr": { + "dev_idx": "2", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [ + { "itf":"eeprom", "dev":"PSU2-EEPROM" } + ] + }, + "bmc": { + "ipmitool": { + "attr_list": + [ + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr get -c PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_VOUT", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr get -c PSU1_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_IOUT", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr get -c PSU1_TEMP1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_TEMP1", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr get -c PSU1_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_FAN1", + "field_pos": "2" + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "PSU2-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU2-EEPROM", + "device_parent": "MUX1", + "virt_parent": "PSU2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x5b", + "dev_type": "psu_eeprom" + }, + "attr_list": [ + { + "attr_name":"psu_present", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x2", + "attr_cmpval":"0x0", + "attr_len":"1" + }, + { + "attr_name":"psu_power_good", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x20", + "attr_cmpval":"0x20", + "attr_len":"1" + } + ] + } + }, + "FAN-CTRL": { + "dev_info": { + "device_type": "FAN", + "device_name": "FAN-CTRL", + "device_parent": "" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "fan1_present", + "bmc_cmd": "ipmitool sdr get -c FAN0_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN0_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan2_present", + "bmc_cmd": "ipmitool sdr get -c FAN0_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN0_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan3_present", + "bmc_cmd": "ipmitool sdr get -c FAN1_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN1_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan4_present", + "bmc_cmd": "ipmitool sdr get -c FAN1_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN1_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan5_present", + "bmc_cmd": "ipmitool sdr get -c FAN2_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN2_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan6_present", + "bmc_cmd": "ipmitool sdr get -c FAN2_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN2_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan7_present", + "bmc_cmd": "ipmitool sdr get -c FAN3_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN3_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan8_present", + "bmc_cmd": "ipmitool sdr get -c FAN3_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN3_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan1_input", + "bmc_cmd": "ipmitool sdr get -c FAN0_RPM_F | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN0_RPM_F", + "field_pos": "2" + }, + { + "attr_name": "fan2_input", + "bmc_cmd": "ipmitool sdr get -c FAN0_RPM_R | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN0_RPM_R", + "field_pos": "2" + }, + { + "attr_name": "fan3_input", + "bmc_cmd": "ipmitool sdr get -c FAN1_RPM_F | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN1_RPM_F", + "field_pos": "2" + }, + { + "attr_name": "fan4_input", + "bmc_cmd": "ipmitool sdr get -c FAN1_RPM_R | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN1_RPM_R", + "field_pos": "2" + }, + { + "attr_name": "fan5_input", + "bmc_cmd": "ipmitool sdr get -c FAN2_RPM_F | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN2_RPM_F", + "field_pos": "2" + }, + { + "attr_name": "fan6_input", + "bmc_cmd": "ipmitool sdr get -c FAN2_RPM_R | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN2_RPM_R", + "field_pos": "2" + }, + { + "attr_name": "fan7_input", + "bmc_cmd": "ipmitool sdr get -c FAN3_RPM_F | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN3_RPM_F", + "field_pos": "2" + }, + { + "attr_name": "fan8_input", + "bmc_cmd": "ipmitool sdr get -c FAN3_RPM_R | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN3_RPM_R", + "field_pos": "2" + }, + { + "attr_name": "fan1_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan2_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan3_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan4_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan5_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f3", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan6_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f3", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan7_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f4", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan8_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f4", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "SYS_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "SYS_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "off", + "bits": "7:6", + "descr": "Off", + "value": "0x01;0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + } + ] + } + }, + "FAN_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FAN_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + } + ] + } + }, + "PSU1_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "PSU2_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "1", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "7", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "ID_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "LOC_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "blue", + "bits": "3:1", + "descr": "Blue", + "value": "0x04;0x05", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "blue_blink", + "bits": "3:1", + "descr": "Blue Blinking", + "value": "0x06;0x07", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "off", + "bits": "3:2", + "descr": "Off", + "value": "0x01;0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + } + ] + } + }, + "PORT1": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT1", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "1" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT1-EEPROM" + }, + { + "itf": "control", + "dev": "PORT1-CTRL" + } + ] + } + }, + "PORT1-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT1-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT2": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT2", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "2" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT2-EEPROM" + }, + { + "itf": "control", + "dev": "PORT2-CTRL" + } + ] + } + }, + "PORT2-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT2-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT3": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT3", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "3" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT3-EEPROM" + }, + { + "itf": "control", + "dev": "PORT3-CTRL" + } + ] + } + }, + "PORT3-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT3-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT4": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT4", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "4" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT4-EEPROM" + }, + { + "itf": "control", + "dev": "PORT4-CTRL" + } + ] + } + }, + "PORT4-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT4-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT5": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT5", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "5" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT5-EEPROM" + }, + { + "itf": "control", + "dev": "PORT5-CTRL" + } + ] + } + }, + "PORT5-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT5-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT6": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT6", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "6" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT6-EEPROM" + }, + { + "itf": "control", + "dev": "PORT6-CTRL" + } + ] + } + }, + "PORT6-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT6-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT7": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT7", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "7" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT7-EEPROM" + }, + { + "itf": "control", + "dev": "PORT7-CTRL" + } + ] + } + }, + "PORT7-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT7-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT8": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT8", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "8" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT8-EEPROM" + }, + { + "itf": "control", + "dev": "PORT8-CTRL" + } + ] + } + }, + "PORT8-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT8-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT9": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT9", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "9" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT9-EEPROM" + }, + { + "itf": "control", + "dev": "PORT9-CTRL" + } + ] + } + }, + "PORT9-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1A", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT9-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1A", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT10": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT10", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "10" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT10-EEPROM" + }, + { + "itf": "control", + "dev": "PORT10-CTRL" + } + ] + } + }, + "PORT10-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1B", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT10-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1B", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT11": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT11", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "11" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT11-EEPROM" + }, + { + "itf": "control", + "dev": "PORT11-CTRL" + } + ] + } + }, + "PORT11-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1C", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT11-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1C", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT12": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT12", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "12" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT12-EEPROM" + }, + { + "itf": "control", + "dev": "PORT12-CTRL" + } + ] + } + }, + "PORT12-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1D", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT12-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1D", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT13": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT13", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "13" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT13-EEPROM" + }, + { + "itf": "control", + "dev": "PORT13-CTRL" + } + ] + } + }, + "PORT13-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1E", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT13-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1E", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT14": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT14", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "14" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT14-EEPROM" + }, + { + "itf": "control", + "dev": "PORT14-CTRL" + } + ] + } + }, + "PORT14-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1F", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT14-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1F", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT15": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT15", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "15" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT15-EEPROM" + }, + { + "itf": "control", + "dev": "PORT15-CTRL" + } + ] + } + }, + "PORT15-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT15-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT16": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT16", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "16" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT16-EEPROM" + }, + { + "itf": "control", + "dev": "PORT16-CTRL" + } + ] + } + }, + "PORT16-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT16-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT17": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT17", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "17" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT17-EEPROM" + }, + { + "itf": "control", + "dev": "PORT17-CTRL" + } + ] + } + }, + "PORT17-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT17-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT18": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT18", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "18" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT18-EEPROM" + }, + { + "itf": "control", + "dev": "PORT18-CTRL" + } + ] + } + }, + "PORT18-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT18-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT19": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT19", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "19" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT19-EEPROM" + }, + { + "itf": "control", + "dev": "PORT19-CTRL" + } + ] + } + }, + "PORT19-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT19-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT20": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT20", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "20" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT20-EEPROM" + }, + { + "itf": "control", + "dev": "PORT20-CTRL" + } + ] + } + }, + "PORT20-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT20-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT21": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT21", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "21" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT21-EEPROM" + }, + { + "itf": "control", + "dev": "PORT21-CTRL" + } + ] + } + }, + "PORT21-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT21-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT22": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT22", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "22" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT22-EEPROM" + }, + { + "itf": "control", + "dev": "PORT22-CTRL" + } + ] + } + }, + "PORT22-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT22-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT23": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT23", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "23" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT23-EEPROM" + }, + { + "itf": "control", + "dev": "PORT23-CTRL" + } + ] + } + }, + "PORT23-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT23-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT24": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT24", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "24" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT24-EEPROM" + }, + { + "itf": "control", + "dev": "PORT24-CTRL" + } + ] + } + }, + "PORT24-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT24-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT25": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT25", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "25" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT25-EEPROM" + }, + { + "itf": "control", + "dev": "PORT25-CTRL" + } + ] + } + }, + "PORT25-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2A", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT25-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2A", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT26": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT26", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "26" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT26-EEPROM" + }, + { + "itf": "control", + "dev": "PORT26-CTRL" + } + ] + } + }, + "PORT26-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2B", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT26-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2B", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT27": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT27", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "27" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT27-EEPROM" + }, + { + "itf": "control", + "dev": "PORT27-CTRL" + } + ] + } + }, + "PORT27-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2C", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT27-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2C", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT28": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT28", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "28" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT28-EEPROM" + }, + { + "itf": "control", + "dev": "PORT28-CTRL" + } + ] + } + }, + "PORT28-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2D", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT28-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2D", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT29": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT29", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "29" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT29-EEPROM" + }, + { + "itf": "control", + "dev": "PORT29-CTRL" + } + ] + } + }, + "PORT29-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2E", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT29-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2E", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT30": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT30", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "30" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT30-EEPROM" + }, + { + "itf": "control", + "dev": "PORT30-CTRL" + } + ] + } + }, + "PORT30-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2F", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT30-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2F", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT31": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT31", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "31" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT31-EEPROM" + }, + { + "itf": "control", + "dev": "PORT31-CTRL" + } + ] + } + }, + "PORT31-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT31-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT32": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT32", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "32" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT32-EEPROM" + }, + { + "itf": "control", + "dev": "PORT32-CTRL" + } + ] + } + }, + "PORT32-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x31", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT32-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x31", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT33": { + "dev_info": { + "device_type": "SFP", + "device_name": "PORT33", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "33" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT33-EEPROM" + }, + { + "itf": "control", + "dev": "PORT33-CTRL" + } + ] + } + }, + "PORT33-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT33", + "device_parent": "MUX7", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x33", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT33-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT33-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x33", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x18", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x19", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1A", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + } + +} diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json new file mode 100644 index 000000000000..4f86b045c858 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device-pvt.json @@ -0,0 +1,4585 @@ +{ + "PLATFORM": { + "num_psus": 2, + "num_fantrays": 3, + "num_fans_pertray": 2, + "num_ports": 33, + "num_temps": 7, + "pddf_dev_types": { + "description": "PDDF supported devices", + "CPLD": [ + "i2c_cpld" + ], + "PSU": [ + "psu_eeprom", + "psu_pmbus" + ], + "PORT_MODULE": [ + "pddf_xcvr" + ] + }, + "std_kos": [ + "i2c_i801", + "i2c-ismt", + "i2c_dev", + "i2c_mux_pca954x", + "optoe" + ], + "pddf_kos": [ + "pddf_client_module", + "pddf_cpld_module", + "pddf_cpld_driver", + "pddf_mux_module", + "pddf_xcvr_module", + "pddf_xcvr_driver_module", + "pddf_psu_driver_module", + "pddf_psu_module", + "pddf_fan_driver_module", + "pddf_fan_module", + "pddf_led_module" + ], + "custom_kos": [ + "x86-64-ufispace-s9110-32x-lpc", + "x86-64-ufispace-s9110-32x-sys-eeprom", + "pddf_custom_sysstatus_module" + ] + }, + "SYSTEM": { + "dev_info": { + "device_type": "CPU", + "device_name": "ROOT_COMPLEX", + "device_parent": null + }, + "i2c": { + "CONTROLLERS": [ + { + "dev_name": "i2c-1", + "dev": "SMBUS1" + }, + { + "dev_name": "i2c-0", + "dev": "SMBUS0" + } + ] + } + }, + "SMBUS1": { + "dev_info": { + "device_type": "SMBUS", "device_name": "SMBUS1", "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x1" + }, + "DEVICES": [ + { + "dev": "EEPROM1" + }, + { + "dev": "MUX1" + } + ] + } + }, + "EEPROM1": { + "dev_info": { + "device_type": "EEPROM", + "device_name": "EEPROM1", + "device_parent": "SMBUS1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1", + "dev_addr": "0x57", + "dev_type": "sys_eeprom" + }, + "dev_attr": { + "access_mode": "BLOCK" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "MUX1": { + "dev_info": { "device_type": "MUX", "device_name": "MUX1", "device_parent": "SMBUS1"}, + "i2c": { + "topo_info": { + "parent_bus": "0x1", + "dev_addr": "0x70", + "dev_type": "pca9548" + }, + "dev_attr": { + "virt_bus": "0x2", + "idle_state": "-2" + }, + "channel": [ + { + "chn": "0", + "dev": "CPLD1" + }, + { + "chn": "0", + "dev": "CPLD2" + }, + { + "chn": "0", + "dev": "PSU1" + }, + { + "chn": "0", + "dev": "PSU2" + } + ] + } + }, + "CPLD1": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD1", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x30", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "CPLD2": { + "dev_info": { + "device_type": "CPLD", + "device_name": "CPLD2", + "device_parent": "MUX1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x31", + "dev_type": "i2c_cpld" + }, + "dev_attr": {} + } + }, + "SMBUS0": { + "dev_info": { + "device_type": "SMBUS", "device_name": "SMBUS0", "device_parent": "SYSTEM" + }, + "i2c": { + "topo_info": { + "dev_addr": "0x0" + }, + "DEVICES": [ + { + "dev": "MUX2" + } + ] + } + }, + "MUX2": { + "dev_info": { "device_type":"MUX", "device_name":"MUX2", "device_parent":"SMBUS0"}, + "i2c": + { + "topo_info": { "parent_bus":"0x0", "dev_addr":"0x72", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0xa", "idle_state":"-2"}, + "channel": + [ + { "chn":"0", "dev":"MUX3" }, + { "chn":"1", "dev":"MUX4" }, + { "chn":"2", "dev":"MUX5" }, + { "chn":"3", "dev":"MUX6" }, + { "chn":"4", "dev":"MUX7" } + ] + } + }, + "MUX3": { + "dev_info": { "device_type":"MUX", "device_name":"MUX3", "device_parent":"MUX2"}, + "i2c": { + "topo_info": { "parent_bus":"0xa", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x12", "idle_state":"-2"}, + "channel": [ + { "chn":"0", "dev":"PORT1" }, + { "chn":"1", "dev":"PORT2" }, + { "chn":"2", "dev":"PORT3" }, + { "chn":"3", "dev":"PORT4" }, + { "chn":"4", "dev":"PORT5" }, + { "chn":"5", "dev":"PORT6" }, + { "chn":"6", "dev":"PORT7" }, + { "chn":"7", "dev":"PORT8" } + ] + } + }, + "MUX4": { + "dev_info": { "device_type":"MUX", "device_name":"MUX4", "device_parent":"MUX2"}, + "i2c": { + "topo_info": { "parent_bus":"0xb", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x1a", "idle_state":"-2"}, + "channel": [ + { "chn":"0", "dev":"PORT9" }, + { "chn":"1", "dev":"PORT10" }, + { "chn":"2", "dev":"PORT11" }, + { "chn":"3", "dev":"PORT12" }, + { "chn":"4", "dev":"PORT13" }, + { "chn":"5", "dev":"PORT14" }, + { "chn":"6", "dev":"PORT15" }, + { "chn":"7", "dev":"PORT16" } + ] + } + }, + "MUX5": { + "dev_info": { "device_type":"MUX", "device_name":"MUX5", "device_parent":"MUX2"}, + "i2c": { + "topo_info": { "parent_bus":"0xc", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x22", "idle_state":"-2"}, + "channel": [ + { "chn":"0", "dev":"PORT17" }, + { "chn":"1", "dev":"PORT18" }, + { "chn":"2", "dev":"PORT19" }, + { "chn":"3", "dev":"PORT20" }, + { "chn":"4", "dev":"PORT21" }, + { "chn":"5", "dev":"PORT22" }, + { "chn":"6", "dev":"PORT23" }, + { "chn":"7", "dev":"PORT24" } + ] + } + }, + "MUX6": { + "dev_info": { "device_type":"MUX", "device_name":"MUX6", "device_parent":"MUX2"}, + "i2c": { + "topo_info": { "parent_bus":"0xd", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x2a", "idle_state":"-2"}, + "channel": [ + { "chn":"0", "dev":"PORT25" }, + { "chn":"1", "dev":"PORT26" }, + { "chn":"2", "dev":"PORT27" }, + { "chn":"3", "dev":"PORT28" }, + { "chn":"4", "dev":"PORT29" }, + { "chn":"5", "dev":"PORT30" }, + { "chn":"6", "dev":"PORT31" }, + { "chn":"7", "dev":"PORT32" } + ] + } + }, + "MUX7": { + "dev_info": { "device_type":"MUX", "device_name":"MUX7", "device_parent":"MUX2"}, + "i2c": { + "topo_info": { "parent_bus":"0xe", "dev_addr":"0x73", "dev_type":"pca9548"}, + "dev_attr": { "virt_bus":"0x32", "idle_state":"-2"}, + "channel": [ + { "chn":"1", "dev":"PORT33" } + ] + } + }, + "TEMP1": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP1", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_MAC" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr get -c TEMP_MAC", + "raw": "0", + "separator": ",", + "field_name": "TEMP_MAC", + "field_pos": "2" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_MAC", + "raw": "0", + "separator": ",", + "field_name": "TEMP_MAC", + "field_pos": "13" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_MAC", + "raw": "0", + "separator": ",", + "field_name": "TEMP_MAC", + "field_pos": "12" + } + ] + } + } + }, + "TEMP2": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP2", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_MACCASE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_MACCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_MACCASE", + "field_pos": "2" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_MACCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_MACCASE", + "field_pos": "13" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_MACCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_MACCASE", + "field_pos": "12" + } + ] + } + } + }, + "TEMP3": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP3", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_SSDCASE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_SSDCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_SSDCASE", + "field_pos": "2" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_SSDCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_SSDCASE", + "field_pos": "13" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_SSDCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_SSDCASE", + "field_pos": "12" + } + ] + } + } + }, + "TEMP4": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP4", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_PSUCASE" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_PSUCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_PSUCASE", + "field_pos": "2" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_PSUCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_PSUCASE", + "field_pos": "13" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_PSUCASE", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_PSUCASE", + "field_pos": "12" + } + ] + } + } + }, + "TEMP5": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP5", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_ENV_BMC" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_BMC", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_BMC", + "field_pos": "2" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_BMC", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_BMC", + "field_pos": "13" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr get -c TEMP_ENV_BMC", + "raw": "0", + "separator": ",", + "field_name": "TEMP_ENV_BMC", + "field_pos": "12" + } + ] + } + } + }, + "TEMP6": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP6", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_PSU0_TEMP1" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr get -c PSU0_TEMP1 | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_TEMP1", + "field_pos": "2" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr get -c PSU0_TEMP1", + "raw": "0", + "separator": ",", + "field_name": "PSU0_TEMP1", + "field_pos": "13" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr get -c PSU0_TEMP1", + "raw": "0", + "separator": ",", + "field_name": "PSU0_TEMP1", + "field_pos": "12" + } + ] + } + } + }, + "TEMP7": { + "dev_info": { + "device_type": "TEMP_SENSOR", + "device_name": "TEMP7", + "device_parent": "SMBUS0" + }, + "dev_attr": { + "display_name": "TEMP_PSU1_TEMP1" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "temp1_input", + "bmc_cmd": "ipmitool sdr get -c PSU1_TEMP1 | sed -e 's/,,/,0,/g' -e 's/,,/,0,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_TEMP1", + "field_pos": "2" + }, + { + "attr_name": "temp1_high_threshold", + "bmc_cmd": "ipmitool sdr get -c PSU1_TEMP1", + "raw": "0", + "separator": ",", + "field_name": "PSU1_TEMP1", + "field_pos": "13" + }, + { + "attr_name": "temp1_high_crit_threshold", + "bmc_cmd": "ipmitool sdr get -c PSU1_TEMP1", + "raw": "0", + "separator": ",", + "field_name": "PSU1_TEMP1", + "field_pos": "12" + } + ] + } + } + }, + "SYSSTATUS": { + "dev_info": { + "device_type": "SYSSTAT", + "device_name": "SYSSTATUS" + }, + "dev_attr": {}, + "attr_list": + [ + { + "attr_name": "board_sku_id", + "attr_devaddr": "0x30", + "attr_offset": "0x0", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "board_hw_id", + "attr_devaddr": "0x30", + "attr_offset": "0x1", + "attr_mask": "0x03", + "attr_len": "0x1" + }, + { + "attr_name": "board_deph_id", + "attr_devaddr": "0x30", + "attr_offset": "0x1", + "attr_mask": "0x4", + "attr_len": "0x1" + }, + { + "attr_name": "board_build_id", + "attr_devaddr": "0x30", + "attr_offset": "0x1", + "attr_mask": "0x18", + "attr_len": "0x1" + }, + { + "attr_name": "cpld1_major_ver", + "attr_devaddr": "0x30", + "attr_offset": "0x2", + "attr_mask": "0xc0", + "attr_len": "0x1" + }, + { + "attr_name": "cpld1_minor_ver", + "attr_devaddr": "0x30", + "attr_offset": "0x2", + "attr_mask": "0x3f", + "attr_len": "0x1" + }, + { + "attr_name": "cpld1_build", + "attr_devaddr": "0x30", + "attr_offset": "0x4", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "cpld2_major_ver", + "attr_devaddr": "0x31", + "attr_offset": "0x2", + "attr_mask": "0xc0", + "attr_len": "0x1" + }, + { + "attr_name": "cpld2_minor_ver", + "attr_devaddr": "0x31", + "attr_offset": "0x2", + "attr_mask": "0x3f", + "attr_len": "0x1" + }, + { + "attr_name": "cpld2_build", + "attr_devaddr": "0x31", + "attr_offset": "0x4", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "psu_status", + "attr_devaddr": "0x30", + "attr_offset": "0x51", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_psu", + "attr_devaddr": "0x30", + "attr_offset": "0x80", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_sys", + "attr_devaddr": "0x30", + "attr_offset": "0x81", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_fan", + "attr_devaddr": "0x30", + "attr_offset": "0x83", + "attr_mask": "0xff", + "attr_len": "0x1" + }, + { + "attr_name": "system_led_id", + "attr_devaddr": "0x30", + "attr_offset": "0x84", + "attr_mask": "0xff", + "attr_len": "0x1" + } + ] + }, + "PSU1": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU1", + "device_parent": "MUX1" + }, + "dev_attr": { + "dev_idx": "1", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [ + { "itf":"eeprom", "dev":"PSU1-EEPROM" } + ] + }, + "bmc": { + "ipmitool": { + "attr_list": + [ + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr get -c PSU0_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_VOUT", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr get -c PSU0_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_IOUT", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr get -c PSU0_TEMP1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_TEMP1", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr get -c PSU0_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU0_FAN1", + "field_pos": "2" + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 1 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "PSU1-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU1-EEPROM", + "device_parent": "MUX1", + "virt_parent": "PSU1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x5a", + "dev_type": "psu_eeprom" + }, + "attr_list": [ + { + "attr_name":"psu_present", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x1", + "attr_cmpval":"0x0", + "attr_len":"1" + }, + { + "attr_name":"psu_power_good", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x10", + "attr_cmpval":"0x10", + "attr_len":"1" + } + ] + } + }, + "PSU2": { + "dev_info": { + "device_type": "PSU", + "device_name": "PSU2", + "device_parent": "MUX1" + }, + "dev_attr": { + "dev_idx": "2", + "num_psu_fans": "1" + }, + "i2c": { + "interface": [ + { "itf":"eeprom", "dev":"PSU2-EEPROM" } + ] + }, + "bmc": { + "ipmitool": { + "attr_list": + [ + { + "attr_name": "psu_v_out", + "bmc_cmd": "ipmitool sdr get -c PSU1_VOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_VOUT", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_i_out", + "bmc_cmd": "ipmitool sdr get -c PSU1_IOUT | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_IOUT", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_temp1_input", + "bmc_cmd": "ipmitool sdr get -c PSU1_TEMP1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_TEMP1", + "field_pos": "2", + "mult": "1000" + }, + { + "attr_name": "psu_fan1_speed_rpm", + "bmc_cmd": "ipmitool sdr get -c PSU1_FAN1 | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "PSU1_FAN1", + "field_pos": "2" + }, + { + "attr_name": "psu_mfr_id", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Manufacturer') && echo $_rv || echo 'Manufacturer : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Manufacturer", + "field_pos": "2" + }, + { + "attr_name": "psu_model_name", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Name') && echo $_rv || echo 'Name : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Name", + "field_pos": "2" + }, + { + "attr_name": "psu_serial_num", + "bmc_cmd": "_rv=$(ipmitool fru print 2 2>/dev/null | tr -s ' ' | cut -d' ' -f3-5 | grep 'Serial') && echo $_rv || echo 'Serial : N/A'", + "raw": "0", + "separator": ":", + "field_name": "Serial", + "field_pos": "2" + }, + { + "attr_name": "psu_fan_dir", + "bmc_cmd": "ipmitool raw 0x3c 0x30 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "PSU2-EEPROM": { + "dev_info": { + "device_type": "PSU-EEPROM", + "device_name": "PSU2-EEPROM", + "device_parent": "MUX1", + "virt_parent": "PSU2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2", + "dev_addr": "0x5b", + "dev_type": "psu_eeprom" + }, + "attr_list": [ + { + "attr_name":"psu_present", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x2", + "attr_cmpval":"0x0", + "attr_len":"1" + }, + { + "attr_name":"psu_power_good", + "attr_devaddr":"0x30", + "attr_devtype":"cpld", + "attr_offset":"0x51", + "attr_mask":"0x20", + "attr_cmpval":"0x20", + "attr_len":"1" + } + ] + } + }, + "FAN-CTRL": { + "dev_info": { + "device_type": "FAN", + "device_name": "FAN-CTRL", + "device_parent": "" + }, + "bmc": { + "ipmitool": { + "attr_list": [ + { + "attr_name": "fan1_present", + "bmc_cmd": "ipmitool sdr get -c FAN0_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN0_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan2_present", + "bmc_cmd": "ipmitool sdr get -c FAN0_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN0_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan3_present", + "bmc_cmd": "ipmitool sdr get -c FAN1_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN1_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan4_present", + "bmc_cmd": "ipmitool sdr get -c FAN1_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN1_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan5_present", + "bmc_cmd": "ipmitool sdr get -c FAN2_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN2_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan6_present", + "bmc_cmd": "ipmitool sdr get -c FAN2_PRSNT_L", + "raw": "0", + "separator": ",", + "field_name": "FAN2_PRSNT_L", + "field_pos": "5" + }, + { + "attr_name": "fan1_input", + "bmc_cmd": "ipmitool sdr get -c FAN0_RPM_F | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN0_RPM_F", + "field_pos": "2" + }, + { + "attr_name": "fan2_input", + "bmc_cmd": "ipmitool sdr get -c FAN0_RPM_R | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN0_RPM_R", + "field_pos": "2" + }, + { + "attr_name": "fan3_input", + "bmc_cmd": "ipmitool sdr get -c FAN1_RPM_F | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN1_RPM_F", + "field_pos": "2" + }, + { + "attr_name": "fan4_input", + "bmc_cmd": "ipmitool sdr get -c FAN1_RPM_R | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN1_RPM_R", + "field_pos": "2" + }, + { + "attr_name": "fan5_input", + "bmc_cmd": "ipmitool sdr get -c FAN2_RPM_F | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN2_RPM_F", + "field_pos": "2" + }, + { + "attr_name": "fan6_input", + "bmc_cmd": "ipmitool sdr get -c FAN2_RPM_R | sed -e 's/,,/,N\\/A,/g' -e 's/,,/,N\\/A,/g'", + "raw": "0", + "separator": ",", + "field_name": "FAN2_RPM_R", + "field_pos": "2" + }, + { + "attr_name": "fan1_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan2_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f1", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan3_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan4_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f2", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan5_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f3", + "raw": "1", + "type": "raw" + }, + { + "attr_name": "fan6_direction", + "bmc_cmd": "ipmitool raw 0x3c 0x31 0x0 | xargs | cut -d' ' -f3", + "raw": "1", + "type": "raw" + } + ] + } + } + }, + "SYS_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "SYS_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + }, + { + "attr_name": "off", + "bits": "7:6", + "descr": "Off", + "value": "0x01;0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x81" + } + ] + } + }, + "FAN_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "FAN_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x83" + } + ] + } + }, + "PSU1_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "0", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "3:0", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "3:0", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "3:0", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "3:0", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "3", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "PSU2_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "PSU_LED" + }, + "dev_attr": { + "index": "1", + "flag": "ro" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "green", + "bits": "7:4", + "descr": "Green", + "value": "0x09;0x0b", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "green_blink", + "bits": "7:4", + "descr": "Green Blinking", + "value": "0x0d;0x0f", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow", + "bits": "7:4", + "descr": "Yellow", + "value": "0x08;0x0a", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "yellow_blink", + "bits": "7:4", + "descr": "Yellow Blinking", + "value": "0x0c;0x0e", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + }, + { + "attr_name": "off", + "bits": "7", + "descr": "Off", + "value": "0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x80" + } + ] + } + }, + "ID_LED": { + "dev_info": { + "device_type": "LED", + "device_name": "LOC_LED" + }, + "dev_attr": { + "index": "0", + "flag": "rw" + }, + "i2c": { + "attr_list": [ + { + "attr_name": "blue", + "bits": "3:1", + "descr": "Blue", + "value": "0x04;0x05", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "blue_blink", + "bits": "3:1", + "descr": "Blue Blinking", + "value": "0x06;0x07", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + }, + { + "attr_name": "off", + "bits": "3:2", + "descr": "Off", + "value": "0x01;0x0", + "swpld_addr": "0x30", + "swpld_addr_offset": "0x84" + } + ] + } + }, + "PORT1": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT1", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "1" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT1-EEPROM" + }, + { + "itf": "control", + "dev": "PORT1-CTRL" + } + ] + } + }, + "PORT1-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT1-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT1-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT1" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x12", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT2": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT2", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "2" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT2-EEPROM" + }, + { + "itf": "control", + "dev": "PORT2-CTRL" + } + ] + } + }, + "PORT2-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT2-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT2-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT2" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x13", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT3": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT3", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "3" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT3-EEPROM" + }, + { + "itf": "control", + "dev": "PORT3-CTRL" + } + ] + } + }, + "PORT3-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT3-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT3-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT3" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x14", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT4": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT4", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "4" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT4-EEPROM" + }, + { + "itf": "control", + "dev": "PORT4-CTRL" + } + ] + } + }, + "PORT4-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT4-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT4-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT4" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x15", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT5": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT5", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "5" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT5-EEPROM" + }, + { + "itf": "control", + "dev": "PORT5-CTRL" + } + ] + } + }, + "PORT5-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT5-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT5-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT5" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x16", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT6": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT6", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "6" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT6-EEPROM" + }, + { + "itf": "control", + "dev": "PORT6-CTRL" + } + ] + } + }, + "PORT6-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT6-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT6-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT6" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x17", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT7": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT7", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "7" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT7-EEPROM" + }, + { + "itf": "control", + "dev": "PORT7-CTRL" + } + ] + } + }, + "PORT7-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT7-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT7-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT7" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x18", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT8": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT8", + "device_parent": "MUX3" + }, + "dev_attr": { + "dev_idx": "8" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT8-EEPROM" + }, + { + "itf": "control", + "dev": "PORT8-CTRL" + } + ] + } + }, + "PORT8-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-EEPROM", + "device_parent": "MUX3", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT8-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT8-CTRL", + "device_parent": "MUX3", + "virt_parent": "PORT8" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x19", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x14", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x10", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x40", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x44", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT9": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT9", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "9" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT9-EEPROM" + }, + { + "itf": "control", + "dev": "PORT9-CTRL" + } + ] + } + }, + "PORT9-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1A", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT9-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT9-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT9" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1A", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT10": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT10", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "10" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT10-EEPROM" + }, + { + "itf": "control", + "dev": "PORT10-CTRL" + } + ] + } + }, + "PORT10-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1B", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT10-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT10-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT10" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1B", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT11": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT11", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "11" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT11-EEPROM" + }, + { + "itf": "control", + "dev": "PORT11-CTRL" + } + ] + } + }, + "PORT11-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1C", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT11-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT11-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT11" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1C", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT12": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT12", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "12" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT12-EEPROM" + }, + { + "itf": "control", + "dev": "PORT12-CTRL" + } + ] + } + }, + "PORT12-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1D", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT12-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT12-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT12" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1D", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT13": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT13", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "13" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT13-EEPROM" + }, + { + "itf": "control", + "dev": "PORT13-CTRL" + } + ] + } + }, + "PORT13-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1E", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT13-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT13-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT13" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1E", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT14": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT14", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "14" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT14-EEPROM" + }, + { + "itf": "control", + "dev": "PORT14-CTRL" + } + ] + } + }, + "PORT14-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1F", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT14-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT14-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT14" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x1F", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT15": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT15", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "15" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT15-EEPROM" + }, + { + "itf": "control", + "dev": "PORT15-CTRL" + } + ] + } + }, + "PORT15-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT15-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT15-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT15" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x20", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT16": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT16", + "device_parent": "MUX4" + }, + "dev_attr": { + "dev_idx": "16" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT16-EEPROM" + }, + { + "itf": "control", + "dev": "PORT16-CTRL" + } + ] + } + }, + "PORT16-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-EEPROM", + "device_parent": "MUX4", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT16-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT16-CTRL", + "device_parent": "MUX4", + "virt_parent": "PORT16" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x21", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x15", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x11", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x41", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x45", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT17": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT17", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "17" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT17-EEPROM" + }, + { + "itf": "control", + "dev": "PORT17-CTRL" + } + ] + } + }, + "PORT17-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT17-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT17-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT17" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x22", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT18": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT18", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "18" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT18-EEPROM" + }, + { + "itf": "control", + "dev": "PORT18-CTRL" + } + ] + } + }, + "PORT18-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT18-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT18-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT18" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x23", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT19": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT19", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "19" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT19-EEPROM" + }, + { + "itf": "control", + "dev": "PORT19-CTRL" + } + ] + } + }, + "PORT19-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT19-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT19-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT19" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x24", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT20": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT20", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "20" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT20-EEPROM" + }, + { + "itf": "control", + "dev": "PORT20-CTRL" + } + ] + } + }, + "PORT20-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT20-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT20-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT20" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x25", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT21": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT21", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "21" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT21-EEPROM" + }, + { + "itf": "control", + "dev": "PORT21-CTRL" + } + ] + } + }, + "PORT21-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT21-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT21-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT21" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x26", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT22": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT22", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "22" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT22-EEPROM" + }, + { + "itf": "control", + "dev": "PORT22-CTRL" + } + ] + } + }, + "PORT22-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT22-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT22-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT22" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x27", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT23": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT23", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "23" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT23-EEPROM" + }, + { + "itf": "control", + "dev": "PORT23-CTRL" + } + ] + } + }, + "PORT23-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT23-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT23-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT23" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x28", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT24": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT24", + "device_parent": "MUX5" + }, + "dev_attr": { + "dev_idx": "24" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT24-EEPROM" + }, + { + "itf": "control", + "dev": "PORT24-CTRL" + } + ] + } + }, + "PORT24-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-EEPROM", + "device_parent": "MUX5", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT24-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT24-CTRL", + "device_parent": "MUX5", + "virt_parent": "PORT24" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x29", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x16", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x12", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x42", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x46", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT25": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT25", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "25" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT25-EEPROM" + }, + { + "itf": "control", + "dev": "PORT25-CTRL" + } + ] + } + }, + "PORT25-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2A", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT25-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT25-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT25" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2A", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "0", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "0", + "attr_cmpval": "0x1", + "attr_len": "1" + } + ] + } + }, + "PORT26": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT26", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "26" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT26-EEPROM" + }, + { + "itf": "control", + "dev": "PORT26-CTRL" + } + ] + } + }, + "PORT26-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2B", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT26-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT26-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT26" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2B", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + }, + "PORT27": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT27", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "27" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT27-EEPROM" + }, + { + "itf": "control", + "dev": "PORT27-CTRL" + } + ] + } + }, + "PORT27-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2C", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT27-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT27-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT27" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2C", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "2", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "2", + "attr_cmpval": "0x4", + "attr_len": "1" + } + ] + } + }, + "PORT28": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT28", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "28" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT28-EEPROM" + }, + { + "itf": "control", + "dev": "PORT28-CTRL" + } + ] + } + }, + "PORT28-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2D", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT28-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT28-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT28" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2D", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "3", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "3", + "attr_cmpval": "0x8", + "attr_len": "1" + } + ] + } + }, + "PORT29": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT29", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "29" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT29-EEPROM" + }, + { + "itf": "control", + "dev": "PORT29-CTRL" + } + ] + } + }, + "PORT29-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2E", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT29-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT29-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT29" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2E", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "4", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "4", + "attr_cmpval": "0x10", + "attr_len": "1" + } + ] + } + }, + "PORT30": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT30", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "30" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT30-EEPROM" + }, + { + "itf": "control", + "dev": "PORT30-CTRL" + } + ] + } + }, + "PORT30-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2F", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT30-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT30-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT30" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x2F", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "5", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "5", + "attr_cmpval": "0x20", + "attr_len": "1" + } + ] + } + }, + "PORT31": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT31", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "31" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT31-EEPROM" + }, + { + "itf": "control", + "dev": "PORT31-CTRL" + } + ] + } + }, + "PORT31-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT31-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT31-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT31" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x30", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "6", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "6", + "attr_cmpval": "0x40", + "attr_len": "1" + } + ] + } + }, + "PORT32": { + "dev_info": { + "device_type": "QSFP", + "device_name": "PORT32", + "device_parent": "MUX6" + }, + "dev_attr": { + "dev_idx": "32" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT32-EEPROM" + }, + { + "itf": "control", + "dev": "PORT32-CTRL" + } + ] + } + }, + "PORT32-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-EEPROM", + "device_parent": "MUX6", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x31", + "dev_addr": "0x50", + "dev_type": "optoe1" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT32-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT32-CTRL", + "device_parent": "MUX6", + "virt_parent": "PORT32" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x31", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_intr_status", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x17", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x13", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_reset", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x43", + "attr_mask": "7", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_lpmode", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x47", + "attr_mask": "7", + "attr_cmpval": "0x80", + "attr_len": "1" + } + ] + } + }, + "PORT33": { + "dev_info": { + "device_type": "SFP", + "device_name": "PORT33", + "device_parent": "MUX7" + }, + "dev_attr": { + "dev_idx": "33" + }, + "i2c": { + "interface": [ + { + "itf": "eeprom", + "dev": "PORT33-EEPROM" + }, + { + "itf": "control", + "dev": "PORT33-CTRL" + } + ] + } + }, + "PORT33-EEPROM": { + "dev_info": { + "device_type": "", + "device_name": "PORT33", + "device_parent": "MUX7", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x33", + "dev_addr": "0x50", + "dev_type": "optoe2" + }, + "attr_list": [ + { + "attr_name": "eeprom" + } + ] + } + }, + "PORT33-CTRL": { + "dev_info": { + "device_type": "", + "device_name": "PORT33-CTRL", + "device_parent": "MUX7", + "virt_parent": "PORT33" + }, + "i2c": { + "topo_info": { + "parent_bus": "0x33", + "dev_addr": "0x53", + "dev_type": "pddf_xcvr" + }, + "attr_list": [ + { + "attr_name": "xcvr_present", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x18", + "attr_mask": "1", + "attr_cmpval": "0x0", + "attr_len": "1" + }, + { + "attr_name": "xcvr_rxlos", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x19", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txfault", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x1A", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + }, + { + "attr_name": "xcvr_txdisable", + "attr_devaddr": "0x31", + "attr_devname": "CPLD2", + "attr_devtype": "cpld", + "attr_offset": "0x48", + "attr_mask": "1", + "attr_cmpval": "0x2", + "attr_len": "1" + } + ] + } + } + +} diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device.json new file mode 120000 index 000000000000..28f5a100186a --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf/pddf-device.json @@ -0,0 +1 @@ +pddf-device-pvt.json \ No newline at end of file diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf_support b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pddf_support new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform-beta.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform-beta.json new file mode 100644 index 000000000000..717adf878d7e --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform-beta.json @@ -0,0 +1,596 @@ +{ + "chassis": { + "name": "S9110-32X", + "components": [ + { + "name": "CPLD1" + }, + { + "name": "CPLD2" + }, + { + "name": "BIOS" + }, + { + "name": "BMC" + } + ], + "fans": [ + { + "name": "Fantray1_1" + }, + { + "name": "Fantray1_2" + }, + { + "name": "Fantray2_1" + }, + { + "name": "Fantray2_2" + }, + { + "name": "Fantray3_1" + }, + { + "name": "Fantray3_2" + }, + { + "name": "Fantray4_1" + }, + { + "name": "Fantray4_2" + } + ], + "fan_drawers":[ + { + "name": "Fantray1", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray1_1" + }, + { + "name": "Fantray1_2" + } + ] + }, + { + "name": "Fantray2", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray2_1" + }, + { + "name": "Fantray2_2" + } + ] + }, + { + "name": "Fantray3", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray3_1" + }, + { + "name": "Fantray3_2" + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "fans": [ + { + "name": "PSU1_FAN1" + } + ], + "thermals": [ + { + "name": "PSU1_TEMP1" + } + ] + }, + { + "name": "PSU2", + "fans": [ + { + "name": "PSU2_FAN1" + } + ], + "thermals": [ + { + "name": "PSU2_TEMP1" + } + ] + } + ], + "thermals": [ + { + "name": "TEMP_MAC" + }, + { + "name": "TEMP_ENV_MACCASE" + }, + { + "name": "TEMP_ENV_SSDCASE" + }, + { + "name": "TEMP_ENV_PSUCASE" + }, + { + "name": "TEMP_ENV_BMC" + }, + { + "name": "TEMP_PSU0_TEMP1" + }, + { + "name": "TEMP_PSU1_TEMP1" + } + ], + "sfps": [ + { + "name": "Ethernet0" + }, + { + "name": "Ethernet4" + }, + { + "name": "Ethernet8" + }, + { + "name": "Ethernet12" + }, + { + "name": "Ethernet16" + }, + { + "name": "Ethernet20" + }, + { + "name": "Ethernet24" + }, + { + "name": "Ethernet28" + }, + { + "name": "Ethernet32" + }, + { + "name": "Ethernet36" + }, + { + "name": "Ethernet40" + }, + { + "name": "Ethernet44" + }, + { + "name": "Ethernet48" + }, + { + "name": "Ethernet52" + }, + { + "name": "Ethernet56" + }, + { + "name": "Ethernet60" + }, + { + "name": "Ethernet64" + }, + { + "name": "Ethernet68" + }, + { + "name": "Ethernet72" + }, + { + "name": "Ethernet76" + }, + { + "name": "Ethernet80" + }, + { + "name": "Ethernet84" + }, + { + "name": "Ethernet88" + }, + { + "name": "Ethernet92" + }, + { + "name": "Ethernet96" + }, + { + "name": "Ethernet100" + }, + { + "name": "Ethernet104" + }, + { + "name": "Ethernet108" + }, + { + "name": "Ethernet112" + }, + { + "name": "Ethernet116" + }, + { + "name": "Ethernet120" + }, + { + "name": "Ethernet124" + }, + { + "name": "Ethernet128" + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "0,0,0,0", + "lanes": "1,2,3,4", + "breakout_modes": { + "1x100G[40G]": ["Eth0(Port0)"], + "2x50G": ["Eth0/1(Port0)", "Eth0/2(Port0)"], + "4x25G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"], + "4x10G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"] + } + }, + + "Ethernet4": { + "index": "1,1,1,1", + "lanes": "5,6,7,8", + "breakout_modes": { + "1x100G[40G]": ["Eth1(Port1)"], + "2x50G": ["Eth1/1(Port1)", "Eth1/2(Port1)"], + "4x25G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"], + "4x10G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"] + } + }, + + "Ethernet8": { + "index": "2,2,2,2", + "lanes": "9,10,11,12", + "breakout_modes": { + "1x100G[40G]": ["Eth2(Port2)"], + "2x50G": ["Eth2/1(Port2)", "Eth2/2(Port2)"], + "4x25G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"], + "4x10G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"] + } + }, + + "Ethernet12": { + "index": "3,3,3,3", + "lanes": "13,14,15,16", + "breakout_modes": { + "1x100G[40G]": ["Eth3(Port3)"], + "2x50G": ["Eth3/1(Port3)", "Eth3/2(Port3)"], + "4x25G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"], + "4x10G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"] + } + }, + + "Ethernet16": { + "index": "4,4,4,4", + "lanes": "17,18,19,20", + "breakout_modes": { + "1x100G[40G]": ["Eth4(Port4)"], + "2x50G": ["Eth4/1(Port4)", "Eth4/2(Port4)"], + "4x25G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"], + "4x10G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"] + } + }, + + "Ethernet20": { + "index": "5,5,5,5", + "lanes": "21,22,23,24", + "breakout_modes": { + "1x100G[40G]": ["Eth5(Port5)"], + "2x50G": ["Eth5/1(Port5)", "Eth5/2(Port5)"], + "4x25G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"], + "4x10G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"] + } + }, + + "Ethernet24": { + "index": "6,6,6,6", + "lanes": "25,26,27,28", + "breakout_modes": { + "1x100G[40G]": ["Eth6(Port6)"], + "2x50G": ["Eth6/1(Port6)", "Eth6/2(Port6)"], + "4x25G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"], + "4x10G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"] + } + }, + + "Ethernet28": { + "index": "7,7,7,7", + "lanes": "29,30,31,32", + "breakout_modes": { + "1x100G[40G]": ["Eth7(Port7)"], + "2x50G": ["Eth7/1(Port7)", "Eth7/2(Port7)"], + "4x25G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"], + "4x10G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"] + } + }, + + "Ethernet32": { + "index": "8,8,8,8", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x100G[40G]": ["Eth8(Port8)"], + "2x50G": ["Eth8/1(Port8)", "Eth8/2(Port8)"], + "4x25G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"], + "4x10G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"] + } + }, + + "Ethernet36": { + "index": "9,9,9,9", + "lanes": "37,38,39,40", + "breakout_modes": { + "1x100G[40G]": ["Eth9(Port9)"], + "2x50G": ["Eth9/1(Port9)", "Eth9/2(Port9)"], + "4x25G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"], + "4x10G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"] + } + }, + + "Ethernet40": { + "index": "10,10,10,10", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x100G[40G]": ["Eth10(Port10)"], + "2x50G": ["Eth10/1(Port10)", "Eth10/2(Port10)"], + "4x25G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"], + "4x10G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"] + } + }, + + "Ethernet44": { + "index": "11,11,11,11", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x100G[40G]": ["Eth11(Port11)"], + "2x50G": ["Eth11/1(Port11)", "Eth11/2(Port11)"], + "4x25G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"], + "4x10G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"] + } + }, + + "Ethernet48": { + "index": "12,12,12,12", + "lanes": "49,50,51,52", + "breakout_modes": { + "1x100G[40G]": ["Eth12(Port12)"], + "2x50G": ["Eth12/1(Port12)", "Eth12/2(Port12)"], + "4x25G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"], + "4x10G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"] + } + }, + + "Ethernet52": { + "index": "13,13,13,13", + "lanes": "53,54,55,56", + "breakout_modes": { + "1x100G[40G]": ["Eth13(Port13)"], + "2x50G": ["Eth13/1(Port13)", "Eth13/2(Port13)"], + "4x25G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"], + "4x10G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"] + } + }, + + "Ethernet56": { + "index": "14,14,14,14", + "lanes": "57,58,59,60", + "breakout_modes": { + "1x100G[40G]": ["Eth14(Port14)"], + "2x50G": ["Eth14/1(Port14)", "Eth14/2(Port14)"], + "4x25G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"], + "4x10G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"] + } + }, + + "Ethernet60": { + "index": "15,15,15,15", + "lanes": "61,62,63,64", + "breakout_modes": { + "1x100G[40G]": ["Eth15(Port15)"], + "2x50G": ["Eth15/1(Port15)", "Eth15/2(Port15)"], + "4x25G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"], + "4x10G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"] + } + }, + + "Ethernet64": { + "index": "16,16,16,16", + "lanes": "69,70,71,72", + "breakout_modes": { + "1x100G[40G]": ["Eth16(Port16)"], + "2x50G": ["Eth16/1(Port16)", "Eth16/2(Port16)"], + "4x25G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"], + "4x10G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"] + } + }, + + "Ethernet68": { + "index": "17,17,17,17", + "lanes": "65,66,67,68", + "breakout_modes": { + "1x100G[40G]": ["Eth17(Port17)"], + "2x50G": ["Eth17/1(Port17)", "Eth17/2(Port17)"], + "4x25G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"], + "4x10G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"] + } + }, + + "Ethernet72": { + "index": "18,18,18,18", + "lanes": "77,78,79,80", + "breakout_modes": { + "1x100G[40G]": ["Eth18(Port18)"], + "2x50G": ["Eth18/1(Port18)", "Eth18/2(Port18)"], + "4x25G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"], + "4x10G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"] + } + }, + + "Ethernet76": { + "index": "19,19,19,19", + "lanes": "73,74,75,76", + "breakout_modes": { + "1x100G[40G]": ["Eth19(Port19)"], + "2x50G": ["Eth19/1(Port19)", "Eth19/2(Port19)"], + "4x25G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"], + "4x10G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"] + } + }, + + "Ethernet80": { + "index": "20,20,20,20", + "lanes": "85,86,87,88", + "breakout_modes": { + "1x100G[40G]": ["Eth20(Port20)"], + "2x50G": ["Eth20/1(Port20)", "Eth20/2(Port20)"], + "4x25G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"], + "4x10G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"] + } + }, + + "Ethernet84": { + "index": "21,21,21,21", + "lanes": "81,82,83,84", + "breakout_modes": { + "1x100G[40G]": ["Eth21(Port21)"], + "2x50G": ["Eth21/1(Port21)", "Eth21/2(Port21)"], + "4x25G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"], + "4x10G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"] + } + }, + + "Ethernet88": { + "index": "22,22,22,22", + "lanes": "93,94,95,96", + "breakout_modes": { + "1x100G[40G]": ["Eth22(Port22)"], + "2x50G": ["Eth22/1(Port22)", "Eth22/2(Port22)"], + "4x25G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"], + "4x10G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"] + } + }, + + "Ethernet92": { + "index": "23,23,23,23", + "lanes": "89,90,91,92", + "breakout_modes": { + "1x100G[40G]": ["Eth23(Port23)"], + "2x50G": ["Eth23/1(Port23)", "Eth23/2(Port23)"], + "4x25G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"], + "4x10G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"] + } + }, + + "Ethernet96": { + "index": "24,24,24,24", + "lanes": "101,102,103,104", + "breakout_modes": { + "1x100G[40G]": ["Eth24(Port24)"], + "2x50G": ["Eth24/1(Port24)", "Eth24/2(Port24)"], + "4x25G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"], + "4x10G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"] + } + }, + + "Ethernet100": { + "index": "25,25,25,25", + "lanes": "97,98,99,100", + "breakout_modes": { + "1x100G[40G]": ["Eth25(Port25)"], + "2x50G": ["Eth25/1(Port25)", "Eth25/2(Port25)"], + "4x25G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"], + "4x10G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"] + } + }, + + "Ethernet104": { + "index": "26,26,26,26", + "lanes": "109,110,111,112", + "breakout_modes": { + "1x100G[40G]": ["Eth26(Port26)"], + "2x50G": ["Eth26/1(Port26)", "Eth26/2(Port26)"], + "4x25G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"], + "4x10G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"] + } + }, + + "Ethernet108": { + "index": "27,27,27,27", + "lanes": "105,106,107,108", + "breakout_modes": { + "1x100G[40G]": ["Eth27(Port27)"], + "2x50G": ["Eth27/1(Port27)", "Eth27/2(Port27)"], + "4x25G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"], + "4x10G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"] + } + }, + + "Ethernet112": { + "index": "28,28,28,28", + "lanes": "117,118,119,120", + "breakout_modes": { + "1x100G[40G]": ["Eth28(Port28)"], + "2x50G": ["Eth28/1(Port28)", "Eth28/2(Port28)"], + "4x25G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"], + "4x10G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"] + } + }, + + "Ethernet116": { + "index": "29,29,29,29", + "lanes": "113,114,115,116", + "breakout_modes": { + "1x100G[40G]": ["Eth29(Port29)"], + "2x50G": ["Eth29/1(Port29)", "Eth29/2(Port29)"], + "4x25G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"], + "4x10G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"] + } + }, + + "Ethernet120": { + "index": "30,30,30,30", + "lanes": "125,126,127,128", + "breakout_modes": { + "1x100G[40G]": ["Eth30(Port30)"], + "2x50G": ["Eth30/1(Port30)", "Eth30/2(Port30)"], + "4x25G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"], + "4x10G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"] + } + }, + + "Ethernet124": { + "index": "31,31,31,31", + "lanes": "121,122,123,124", + "breakout_modes": { + "1x100G[40G]": ["Eth31(Port31)"], + "2x50G": ["Eth31/1(Port31)", "Eth31/2(Port31)"], + "4x25G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"], + "4x10G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"] + } + }, + "Ethernet128": { + "index": "32", + "lanes": "129", + "breakout_modes": { + "1x10G": ["Eth32(Port32)"] + } + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform-pvt.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform-pvt.json new file mode 100644 index 000000000000..6114bf5ef460 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform-pvt.json @@ -0,0 +1,590 @@ +{ + "chassis": { + "name": "S9110-32X", + "components": [ + { + "name": "CPLD1" + }, + { + "name": "CPLD2" + }, + { + "name": "BIOS" + }, + { + "name": "BMC" + } + ], + "fans": [ + { + "name": "Fantray1_1" + }, + { + "name": "Fantray1_2" + }, + { + "name": "Fantray2_1" + }, + { + "name": "Fantray2_2" + }, + { + "name": "Fantray3_1" + }, + { + "name": "Fantray3_2" + } + ], + "fan_drawers":[ + { + "name": "Fantray1", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray1_1" + }, + { + "name": "Fantray1_2" + } + ] + }, + { + "name": "Fantray2", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray2_1" + }, + { + "name": "Fantray2_2" + } + ] + }, + { + "name": "Fantray3", + "num_fans" : 2, + "fans": [ + { + "name": "Fantray3_1" + }, + { + "name": "Fantray3_2" + } + ] + } + ], + "psus": [ + { + "name": "PSU1", + "fans": [ + { + "name": "PSU1_FAN1" + } + ], + "thermals": [ + { + "name": "PSU1_TEMP1" + } + ] + }, + { + "name": "PSU2", + "fans": [ + { + "name": "PSU2_FAN1" + } + ], + "thermals": [ + { + "name": "PSU2_TEMP1" + } + ] + } + ], + "thermals": [ + { + "name": "TEMP_MAC" + }, + { + "name": "TEMP_ENV_MACCASE" + }, + { + "name": "TEMP_ENV_SSDCASE" + }, + { + "name": "TEMP_ENV_PSUCASE" + }, + { + "name": "TEMP_ENV_BMC" + }, + { + "name": "TEMP_PSU0_TEMP1" + }, + { + "name": "TEMP_PSU1_TEMP1" + } + ], + "sfps": [ + { + "name": "Ethernet0" + }, + { + "name": "Ethernet4" + }, + { + "name": "Ethernet8" + }, + { + "name": "Ethernet12" + }, + { + "name": "Ethernet16" + }, + { + "name": "Ethernet20" + }, + { + "name": "Ethernet24" + }, + { + "name": "Ethernet28" + }, + { + "name": "Ethernet32" + }, + { + "name": "Ethernet36" + }, + { + "name": "Ethernet40" + }, + { + "name": "Ethernet44" + }, + { + "name": "Ethernet48" + }, + { + "name": "Ethernet52" + }, + { + "name": "Ethernet56" + }, + { + "name": "Ethernet60" + }, + { + "name": "Ethernet64" + }, + { + "name": "Ethernet68" + }, + { + "name": "Ethernet72" + }, + { + "name": "Ethernet76" + }, + { + "name": "Ethernet80" + }, + { + "name": "Ethernet84" + }, + { + "name": "Ethernet88" + }, + { + "name": "Ethernet92" + }, + { + "name": "Ethernet96" + }, + { + "name": "Ethernet100" + }, + { + "name": "Ethernet104" + }, + { + "name": "Ethernet108" + }, + { + "name": "Ethernet112" + }, + { + "name": "Ethernet116" + }, + { + "name": "Ethernet120" + }, + { + "name": "Ethernet124" + }, + { + "name": "Ethernet128" + } + ] + }, + "interfaces": { + "Ethernet0": { + "index": "0,0,0,0", + "lanes": "1,2,3,4", + "breakout_modes": { + "1x100G[40G]": ["Eth0(Port0)"], + "2x50G": ["Eth0/1(Port0)", "Eth0/2(Port0)"], + "4x25G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"], + "4x10G": ["Eth0/1(Port0)", "Eth0/2(Port0)", "Eth0/3(Port0)", "Eth0/4(Port0)"] + } + }, + + "Ethernet4": { + "index": "1,1,1,1", + "lanes": "5,6,7,8", + "breakout_modes": { + "1x100G[40G]": ["Eth1(Port1)"], + "2x50G": ["Eth1/1(Port1)", "Eth1/2(Port1)"], + "4x25G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"], + "4x10G": ["Eth1/1(Port1)", "Eth1/2(Port1)", "Eth1/3(Port1)", "Eth1/4(Port1)"] + } + }, + + "Ethernet8": { + "index": "2,2,2,2", + "lanes": "9,10,11,12", + "breakout_modes": { + "1x100G[40G]": ["Eth2(Port2)"], + "2x50G": ["Eth2/1(Port2)", "Eth2/2(Port2)"], + "4x25G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"], + "4x10G": ["Eth2/1(Port2)", "Eth2/2(Port2)", "Eth2/3(Port2)", "Eth2/4(Port2)"] + } + }, + + "Ethernet12": { + "index": "3,3,3,3", + "lanes": "13,14,15,16", + "breakout_modes": { + "1x100G[40G]": ["Eth3(Port3)"], + "2x50G": ["Eth3/1(Port3)", "Eth3/2(Port3)"], + "4x25G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"], + "4x10G": ["Eth3/1(Port3)", "Eth3/2(Port3)", "Eth3/3(Port3)", "Eth3/4(Port3)"] + } + }, + + "Ethernet16": { + "index": "4,4,4,4", + "lanes": "17,18,19,20", + "breakout_modes": { + "1x100G[40G]": ["Eth4(Port4)"], + "2x50G": ["Eth4/1(Port4)", "Eth4/2(Port4)"], + "4x25G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"], + "4x10G": ["Eth4/1(Port4)", "Eth4/2(Port4)", "Eth4/3(Port4)", "Eth4/4(Port4)"] + } + }, + + "Ethernet20": { + "index": "5,5,5,5", + "lanes": "21,22,23,24", + "breakout_modes": { + "1x100G[40G]": ["Eth5(Port5)"], + "2x50G": ["Eth5/1(Port5)", "Eth5/2(Port5)"], + "4x25G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"], + "4x10G": ["Eth5/1(Port5)", "Eth5/2(Port5)", "Eth5/3(Port5)", "Eth5/4(Port5)"] + } + }, + + "Ethernet24": { + "index": "6,6,6,6", + "lanes": "25,26,27,28", + "breakout_modes": { + "1x100G[40G]": ["Eth6(Port6)"], + "2x50G": ["Eth6/1(Port6)", "Eth6/2(Port6)"], + "4x25G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"], + "4x10G": ["Eth6/1(Port6)", "Eth6/2(Port6)", "Eth6/3(Port6)", "Eth6/4(Port6)"] + } + }, + + "Ethernet28": { + "index": "7,7,7,7", + "lanes": "29,30,31,32", + "breakout_modes": { + "1x100G[40G]": ["Eth7(Port7)"], + "2x50G": ["Eth7/1(Port7)", "Eth7/2(Port7)"], + "4x25G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"], + "4x10G": ["Eth7/1(Port7)", "Eth7/2(Port7)", "Eth7/3(Port7)", "Eth7/4(Port7)"] + } + }, + + "Ethernet32": { + "index": "8,8,8,8", + "lanes": "33,34,35,36", + "breakout_modes": { + "1x100G[40G]": ["Eth8(Port8)"], + "2x50G": ["Eth8/1(Port8)", "Eth8/2(Port8)"], + "4x25G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"], + "4x10G": ["Eth8/1(Port8)", "Eth8/2(Port8)", "Eth8/3(Port8)", "Eth8/4(Port8)"] + } + }, + + "Ethernet36": { + "index": "9,9,9,9", + "lanes": "37,38,39,40", + "breakout_modes": { + "1x100G[40G]": ["Eth9(Port9)"], + "2x50G": ["Eth9/1(Port9)", "Eth9/2(Port9)"], + "4x25G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"], + "4x10G": ["Eth9/1(Port9)", "Eth9/2(Port9)", "Eth9/3(Port9)", "Eth9/4(Port9)"] + } + }, + + "Ethernet40": { + "index": "10,10,10,10", + "lanes": "41,42,43,44", + "breakout_modes": { + "1x100G[40G]": ["Eth10(Port10)"], + "2x50G": ["Eth10/1(Port10)", "Eth10/2(Port10)"], + "4x25G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"], + "4x10G": ["Eth10/1(Port10)", "Eth10/2(Port10)", "Eth10/3(Port10)", "Eth10/4(Port10)"] + } + }, + + "Ethernet44": { + "index": "11,11,11,11", + "lanes": "45,46,47,48", + "breakout_modes": { + "1x100G[40G]": ["Eth11(Port11)"], + "2x50G": ["Eth11/1(Port11)", "Eth11/2(Port11)"], + "4x25G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"], + "4x10G": ["Eth11/1(Port11)", "Eth11/2(Port11)", "Eth11/3(Port11)", "Eth11/4(Port11)"] + } + }, + + "Ethernet48": { + "index": "12,12,12,12", + "lanes": "49,50,51,52", + "breakout_modes": { + "1x100G[40G]": ["Eth12(Port12)"], + "2x50G": ["Eth12/1(Port12)", "Eth12/2(Port12)"], + "4x25G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"], + "4x10G": ["Eth12/1(Port12)", "Eth12/2(Port12)", "Eth12/3(Port12)", "Eth12/4(Port12)"] + } + }, + + "Ethernet52": { + "index": "13,13,13,13", + "lanes": "53,54,55,56", + "breakout_modes": { + "1x100G[40G]": ["Eth13(Port13)"], + "2x50G": ["Eth13/1(Port13)", "Eth13/2(Port13)"], + "4x25G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"], + "4x10G": ["Eth13/1(Port13)", "Eth13/2(Port13)", "Eth13/3(Port13)", "Eth13/4(Port13)"] + } + }, + + "Ethernet56": { + "index": "14,14,14,14", + "lanes": "57,58,59,60", + "breakout_modes": { + "1x100G[40G]": ["Eth14(Port14)"], + "2x50G": ["Eth14/1(Port14)", "Eth14/2(Port14)"], + "4x25G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"], + "4x10G": ["Eth14/1(Port14)", "Eth14/2(Port14)", "Eth14/3(Port14)", "Eth14/4(Port14)"] + } + }, + + "Ethernet60": { + "index": "15,15,15,15", + "lanes": "61,62,63,64", + "breakout_modes": { + "1x100G[40G]": ["Eth15(Port15)"], + "2x50G": ["Eth15/1(Port15)", "Eth15/2(Port15)"], + "4x25G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"], + "4x10G": ["Eth15/1(Port15)", "Eth15/2(Port15)", "Eth15/3(Port15)", "Eth15/4(Port15)"] + } + }, + + "Ethernet64": { + "index": "16,16,16,16", + "lanes": "69,70,71,72", + "breakout_modes": { + "1x100G[40G]": ["Eth16(Port16)"], + "2x50G": ["Eth16/1(Port16)", "Eth16/2(Port16)"], + "4x25G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"], + "4x10G": ["Eth16/1(Port16)", "Eth16/2(Port16)", "Eth16/3(Port16)", "Eth16/4(Port16)"] + } + }, + + "Ethernet68": { + "index": "17,17,17,17", + "lanes": "65,66,67,68", + "breakout_modes": { + "1x100G[40G]": ["Eth17(Port17)"], + "2x50G": ["Eth17/1(Port17)", "Eth17/2(Port17)"], + "4x25G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"], + "4x10G": ["Eth17/1(Port17)", "Eth17/2(Port17)", "Eth17/3(Port17)", "Eth17/4(Port17)"] + } + }, + + "Ethernet72": { + "index": "18,18,18,18", + "lanes": "77,78,79,80", + "breakout_modes": { + "1x100G[40G]": ["Eth18(Port18)"], + "2x50G": ["Eth18/1(Port18)", "Eth18/2(Port18)"], + "4x25G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"], + "4x10G": ["Eth18/1(Port18)", "Eth18/2(Port18)", "Eth18/3(Port18)", "Eth18/4(Port18)"] + } + }, + + "Ethernet76": { + "index": "19,19,19,19", + "lanes": "73,74,75,76", + "breakout_modes": { + "1x100G[40G]": ["Eth19(Port19)"], + "2x50G": ["Eth19/1(Port19)", "Eth19/2(Port19)"], + "4x25G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"], + "4x10G": ["Eth19/1(Port19)", "Eth19/2(Port19)", "Eth19/3(Port19)", "Eth19/4(Port19)"] + } + }, + + "Ethernet80": { + "index": "20,20,20,20", + "lanes": "85,86,87,88", + "breakout_modes": { + "1x100G[40G]": ["Eth20(Port20)"], + "2x50G": ["Eth20/1(Port20)", "Eth20/2(Port20)"], + "4x25G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"], + "4x10G": ["Eth20/1(Port20)", "Eth20/2(Port20)", "Eth20/3(Port20)", "Eth20/4(Port20)"] + } + }, + + "Ethernet84": { + "index": "21,21,21,21", + "lanes": "81,82,83,84", + "breakout_modes": { + "1x100G[40G]": ["Eth21(Port21)"], + "2x50G": ["Eth21/1(Port21)", "Eth21/2(Port21)"], + "4x25G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"], + "4x10G": ["Eth21/1(Port21)", "Eth21/2(Port21)", "Eth21/3(Port21)", "Eth21/4(Port21)"] + } + }, + + "Ethernet88": { + "index": "22,22,22,22", + "lanes": "93,94,95,96", + "breakout_modes": { + "1x100G[40G]": ["Eth22(Port22)"], + "2x50G": ["Eth22/1(Port22)", "Eth22/2(Port22)"], + "4x25G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"], + "4x10G": ["Eth22/1(Port22)", "Eth22/2(Port22)", "Eth22/3(Port22)", "Eth22/4(Port22)"] + } + }, + + "Ethernet92": { + "index": "23,23,23,23", + "lanes": "89,90,91,92", + "breakout_modes": { + "1x100G[40G]": ["Eth23(Port23)"], + "2x50G": ["Eth23/1(Port23)", "Eth23/2(Port23)"], + "4x25G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"], + "4x10G": ["Eth23/1(Port23)", "Eth23/2(Port23)", "Eth23/3(Port23)", "Eth23/4(Port23)"] + } + }, + + "Ethernet96": { + "index": "24,24,24,24", + "lanes": "101,102,103,104", + "breakout_modes": { + "1x100G[40G]": ["Eth24(Port24)"], + "2x50G": ["Eth24/1(Port24)", "Eth24/2(Port24)"], + "4x25G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"], + "4x10G": ["Eth24/1(Port24)", "Eth24/2(Port24)", "Eth24/3(Port24)", "Eth24/4(Port24)"] + } + }, + + "Ethernet100": { + "index": "25,25,25,25", + "lanes": "97,98,99,100", + "breakout_modes": { + "1x100G[40G]": ["Eth25(Port25)"], + "2x50G": ["Eth25/1(Port25)", "Eth25/2(Port25)"], + "4x25G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"], + "4x10G": ["Eth25/1(Port25)", "Eth25/2(Port25)", "Eth25/3(Port25)", "Eth25/4(Port25)"] + } + }, + + "Ethernet104": { + "index": "26,26,26,26", + "lanes": "109,110,111,112", + "breakout_modes": { + "1x100G[40G]": ["Eth26(Port26)"], + "2x50G": ["Eth26/1(Port26)", "Eth26/2(Port26)"], + "4x25G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"], + "4x10G": ["Eth26/1(Port26)", "Eth26/2(Port26)", "Eth26/3(Port26)", "Eth26/4(Port26)"] + } + }, + + "Ethernet108": { + "index": "27,27,27,27", + "lanes": "105,106,107,108", + "breakout_modes": { + "1x100G[40G]": ["Eth27(Port27)"], + "2x50G": ["Eth27/1(Port27)", "Eth27/2(Port27)"], + "4x25G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"], + "4x10G": ["Eth27/1(Port27)", "Eth27/2(Port27)", "Eth27/3(Port27)", "Eth27/4(Port27)"] + } + }, + + "Ethernet112": { + "index": "28,28,28,28", + "lanes": "117,118,119,120", + "breakout_modes": { + "1x100G[40G]": ["Eth28(Port28)"], + "2x50G": ["Eth28/1(Port28)", "Eth28/2(Port28)"], + "4x25G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"], + "4x10G": ["Eth28/1(Port28)", "Eth28/2(Port28)", "Eth28/3(Port28)", "Eth28/4(Port28)"] + } + }, + + "Ethernet116": { + "index": "29,29,29,29", + "lanes": "113,114,115,116", + "breakout_modes": { + "1x100G[40G]": ["Eth29(Port29)"], + "2x50G": ["Eth29/1(Port29)", "Eth29/2(Port29)"], + "4x25G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"], + "4x10G": ["Eth29/1(Port29)", "Eth29/2(Port29)", "Eth29/3(Port29)", "Eth29/4(Port29)"] + } + }, + + "Ethernet120": { + "index": "30,30,30,30", + "lanes": "125,126,127,128", + "breakout_modes": { + "1x100G[40G]": ["Eth30(Port30)"], + "2x50G": ["Eth30/1(Port30)", "Eth30/2(Port30)"], + "4x25G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"], + "4x10G": ["Eth30/1(Port30)", "Eth30/2(Port30)", "Eth30/3(Port30)", "Eth30/4(Port30)"] + } + }, + + "Ethernet124": { + "index": "31,31,31,31", + "lanes": "121,122,123,124", + "breakout_modes": { + "1x100G[40G]": ["Eth31(Port31)"], + "2x50G": ["Eth31/1(Port31)", "Eth31/2(Port31)"], + "4x25G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"], + "4x10G": ["Eth31/1(Port31)", "Eth31/2(Port31)", "Eth31/3(Port31)", "Eth31/4(Port31)"] + } + }, + "Ethernet128": { + "index": "32", + "lanes": "129", + "breakout_modes": { + "1x10G": ["Eth32(Port32)"] + } + } + } +} + diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform.json new file mode 120000 index 000000000000..bb59660c3c3a --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform.json @@ -0,0 +1 @@ +platform-pvt.json \ No newline at end of file diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform_asic b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform_asic new file mode 100644 index 000000000000..960467652765 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform_asic @@ -0,0 +1 @@ +broadcom diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform_components.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform_components.json new file mode 100644 index 000000000000..a5bb2093cbaa --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform_components.json @@ -0,0 +1,12 @@ +{ + "chassis": { + "x86_64-ufispace_s9110_32x-r0": { + "component": { + "CPLD1": { }, + "CPLD2": { }, + "BIOS": { }, + "BMC": {} + } + } + } +} diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform_env.conf b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform_env.conf new file mode 100644 index 000000000000..77fd88ac3678 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/platform_env.conf @@ -0,0 +1 @@ +SYNCD_SHM_SIZE=256m diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/pmon_daemon_control.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pmon_daemon_control.json new file mode 100644 index 000000000000..e348e0168fa5 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/pmon_daemon_control.json @@ -0,0 +1,9 @@ +{ + "skip_pcied": false, + "skip_fancontrol": false, + "skip_thermalctld": false, + "skip_ledd": true, + "skip_xcvrd": false, + "skip_psud": false, + "skip_syseepromd": false +} diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/sensors.conf b/device/ufispace/x86_64-ufispace_s9110_32x-r0/sensors.conf new file mode 100644 index 000000000000..29e3604b4127 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/sensors.conf @@ -0,0 +1 @@ +# libsensors configuration file \ No newline at end of file diff --git a/device/ufispace/x86_64-ufispace_s9110_32x-r0/system_health_monitoring_config.json b/device/ufispace/x86_64-ufispace_s9110_32x-r0/system_health_monitoring_config.json new file mode 100644 index 000000000000..43816ab55169 --- /dev/null +++ b/device/ufispace/x86_64-ufispace_s9110_32x-r0/system_health_monitoring_config.json @@ -0,0 +1,15 @@ +{ + "services_to_ignore": [], + "devices_to_ignore": [ + "asic", + "psu", + "fan" + ], + "user_defined_checkers": [], + "polling_interval": 60, + "led_color": { + "fault": "yellow_blink", + "normal": "green", + "booting": "green_blink" + } +} \ No newline at end of file diff --git a/platform/broadcom/one-image.mk b/platform/broadcom/one-image.mk index b35e69c77d36..c9660299ed7e 100755 --- a/platform/broadcom/one-image.mk +++ b/platform/broadcom/one-image.mk @@ -82,7 +82,11 @@ $(SONIC_ONE_IMAGE)_LAZY_INSTALLS += $(DELL_S6000_PLATFORM_MODULE) \ $(NOKIA_IXR7250_PLATFORM_MODULE) \ $(TENCENT_TCS8400_PLATFORM_MODULE) \ $(TENCENT_TCS9400_PLATFORM_MODULE) \ - $(UFISPACE_S9300_32D_PLATFORM_MODULE) + $(UFISPACE_S9300_32D_PLATFORM_MODULE) \ + $(UFISPACE_S9110_32X_PLATFORM_MODULE) \ + $(UFISPACE_S8901_54XC_PLATFORM_MODULE) \ + $(UFISPACE_S7801_54XS_PLATFORM_MODULE) \ + $(UFISPACE_S6301_56ST_PLATFORM_MODULE) $(SONIC_ONE_IMAGE)_LAZY_BUILD_INSTALLS = $(BRCM_OPENNSL_KERNEL) $(BRCM_DNX_OPENNSL_KERNEL) ifeq ($(INSTALL_DEBUG_TOOLS),y) diff --git a/platform/broadcom/platform-modules-ufispace.mk b/platform/broadcom/platform-modules-ufispace.mk index 1e0c4638c9de..3fc5f6e72fec 100644 --- a/platform/broadcom/platform-modules-ufispace.mk +++ b/platform/broadcom/platform-modules-ufispace.mk @@ -1,8 +1,16 @@ # UfiSpace Platform modules UFISPACE_S9300_32D_PLATFORM_MODULE_VERSION = 1.0.0 +UFISPACE_S9110_32X_PLATFORM_MODULE_VERSION = 1.0.0 +UFISPACE_S8901_54XC_PLATFORM_MODULE_VERSION = 1.0.0 +UFISPACE_S7801_54XS_PLATFORM_MODULE_VERSION = 1.0.0 +UFISPACE_S6301_56ST_PLATFORM_MODULE_VERSION = 1.0.0 export UFISPACE_S9300_32D_PLATFORM_MODULE_VERSION +export UFISPACE_S9110_32X_PLATFORM_MODULE_VERSION +export UFISPACE_S8901_54XC_PLATFORM_MODULE_VERSION +export UFISPACE_S7801_54XS_PLATFORM_MODULE_VERSION +export UFISPACE_S6301_56ST_PLATFORM_MODULE_VERSION UFISPACE_S9300_32D_PLATFORM_MODULE = sonic-platform-ufispace-s9300-32d_$(UFISPACE_S9300_32D_PLATFORM_MODULE_VERSION)_amd64.deb $(UFISPACE_S9300_32D_PLATFORM_MODULE)_SRC_PATH = $(PLATFORM_PATH)/sonic-platform-modules-ufispace @@ -10,3 +18,18 @@ $(UFISPACE_S9300_32D_PLATFORM_MODULE)_DEPENDS += $(LINUX_HEADERS) $(LINUX_HEADER $(UFISPACE_S9300_32D_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9300_32d-r0 SONIC_DPKG_DEBS += $(UFISPACE_S9300_32D_PLATFORM_MODULE) +UFISPACE_S9110_32X_PLATFORM_MODULE = sonic-platform-ufispace-s9110-32x_$(UFISPACE_S9110_32X_PLATFORM_MODULE_VERSION)_amd64.deb +$(UFISPACE_S9110_32X_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s9110_32x-r0 +$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S9110_32X_PLATFORM_MODULE))) + +UFISPACE_S8901_54XC_PLATFORM_MODULE = sonic-platform-ufispace-s8901-54xc_$(UFISPACE_S8901_54XC_PLATFORM_MODULE_VERSION)_amd64.deb +$(UFISPACE_S8901_54XC_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s8901_54xc-r0 +$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S8901_54XC_PLATFORM_MODULE))) + +UFISPACE_S7801_54XS_PLATFORM_MODULE = sonic-platform-ufispace-s7801-54xs_$(UFISPACE_S7801_54XS_PLATFORM_MODULE_VERSION)_amd64.deb +$(UFISPACE_S7801_54XS_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s7801_54xs-r0 +$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S7801_54XS_PLATFORM_MODULE))) + +UFISPACE_S6301_56ST_PLATFORM_MODULE = sonic-platform-ufispace-s6301-56st_$(UFISPACE_S6301_56ST_PLATFORM_MODULE_VERSION)_amd64.deb +$(UFISPACE_S6301_56ST_PLATFORM_MODULE)_PLATFORM = x86_64-ufispace_s6301_56st-r0 +$(eval $(call add_extra_package,$(UFISPACE_S9300_32D_PLATFORM_MODULE),$(UFISPACE_S6301_56ST_PLATFORM_MODULE))) \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/changelog b/platform/broadcom/sonic-platform-modules-ufispace/debian/changelog index a4e712e2a1aa..029c0374df67 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/debian/changelog +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/changelog @@ -1,3 +1,27 @@ +sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low + + * Add support for S6301-56ST + + -- Ufispace Thu, 27 Jul 2023 15:50:23 +0800 + +sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low + + * Add support for S7801-54XS + + -- Ufispace Thu, 27 Jul 2023 11:49:07 +0800 + +sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low + + * Add support for S8901-54XC + + -- Ufispace Thu, 27 Jul 2023 11:12:21 +0800 + +sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low + + * Add support for S9110-32X. + + -- Ufispace Wed, 26 Jul 2023 18:03:14 +0800 + sonic-ufispace-platform-modules (1.0.0) unstable; urgency=low * Add support for S9300-32D. diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/control b/platform/broadcom/sonic-platform-modules-ufispace/debian/control index afee144752e2..798179f6e394 100644 --- a/platform/broadcom/sonic-platform-modules-ufispace/debian/control +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/control @@ -1,7 +1,7 @@ Source: sonic-ufispace-platform-modules Section: main Priority: extra -Maintainer: Leo Lin +Maintainer: Leo Lin , Nonodark Huang , Jason Tsai Build-Depends: debhelper (>= 9), bzip2 Standards-Version: 1.0.0 @@ -9,3 +9,18 @@ Package: sonic-platform-ufispace-s9300-32d Architecture: amd64 Description: This package contains s9300-32d platform driver utility for SONiC project. +Package: sonic-platform-ufispace-s9110-32x +Architecture: amd64 +Description: This package contains s9110-32x platform driver utility for SONiC project. + +Package: sonic-platform-ufispace-s8901-54xc +Architecture: amd64 +Description: This package contains s8901-54xc platform driver utility for SONiC project. + +Package: sonic-platform-ufispace-s7801-54xs +Architecture: amd64 +Description: This package contains s7801-54xs platform driver utility for SONiC project. + +Package: sonic-platform-ufispace-s6301-56st +Architecture: amd64 +Description: This package contains s6301-56st platform driver utility for SONiC project. \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/rules b/platform/broadcom/sonic-platform-modules-ufispace/debian/rules index 78a77f9b5b69..d36b48dbc53c 100755 --- a/platform/broadcom/sonic-platform-modules-ufispace/debian/rules +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/rules @@ -20,6 +20,10 @@ KVERSION ?= $(shell uname -r) KERNEL_SRC := /lib/modules/$(KVERSION) MOD_SRC_DIR:= $(shell pwd) MODULE_DIRS:= s9300-32d +MODULE_DIRS += s9110-32x +MODULE_DIRS += s8901-54xc +MODULE_DIRS += s7801-54xs +MODULE_DIRS += s6301-56st MODULE_DIR := modules UTILS_DIR := utils SERVICE_DIR := service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s6301-56st.install b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s6301-56st.install new file mode 100644 index 000000000000..869c48e4a1ea --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s6301-56st.install @@ -0,0 +1 @@ +s6301-56st/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s6301_56st-r0/pddf diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s6301-56st.postinst b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s6301-56st.postinst new file mode 100644 index 000000000000..01666039ca26 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s6301-56st.postinst @@ -0,0 +1,3 @@ +depmod -a +systemctl enable pddf-platform-init.service +systemctl start pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s6301-56st.prerm b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s6301-56st.prerm new file mode 100644 index 000000000000..f9fe8c017ab0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s6301-56st.prerm @@ -0,0 +1,2 @@ +systemctl stop pddf-platform-init.service +systemctl disable pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s7801-54xs.install b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s7801-54xs.install new file mode 100644 index 000000000000..3c1b791bbf56 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s7801-54xs.install @@ -0,0 +1 @@ +s7801-54xs/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s7801_54xs-r0/pddf diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s7801-54xs.postinst b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s7801-54xs.postinst new file mode 100644 index 000000000000..01666039ca26 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s7801-54xs.postinst @@ -0,0 +1,3 @@ +depmod -a +systemctl enable pddf-platform-init.service +systemctl start pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s7801-54xs.prerm b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s7801-54xs.prerm new file mode 100644 index 000000000000..4b887ab38a28 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s7801-54xs.prerm @@ -0,0 +1,2 @@ +systemctl stop pddf-platform-init.service +systemctl disable pddf-platform-init.service \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s8901-54xc.install b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s8901-54xc.install new file mode 100644 index 000000000000..685e023830d3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s8901-54xc.install @@ -0,0 +1 @@ +s8901-54xc/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s8901_54xc-r0/pddf diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s8901-54xc.postinst b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s8901-54xc.postinst new file mode 100644 index 000000000000..01666039ca26 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s8901-54xc.postinst @@ -0,0 +1,3 @@ +depmod -a +systemctl enable pddf-platform-init.service +systemctl start pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s8901-54xc.prerm b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s8901-54xc.prerm new file mode 100644 index 000000000000..4b887ab38a28 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s8901-54xc.prerm @@ -0,0 +1,2 @@ +systemctl stop pddf-platform-init.service +systemctl disable pddf-platform-init.service \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9110-32x.install b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9110-32x.install new file mode 100644 index 000000000000..6982e6b1965d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9110-32x.install @@ -0,0 +1 @@ +s9110-32x/sonic_platform-1.0-py3-none-any.whl usr/share/sonic/device/x86_64-ufispace_s9110_32x-r0/pddf diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9110-32x.postinst b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9110-32x.postinst new file mode 100644 index 000000000000..01666039ca26 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9110-32x.postinst @@ -0,0 +1,3 @@ +depmod -a +systemctl enable pddf-platform-init.service +systemctl start pddf-platform-init.service diff --git a/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9110-32x.prerm b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9110-32x.prerm new file mode 100644 index 000000000000..4b887ab38a28 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/debian/sonic-platform-ufispace-s9110-32x.prerm @@ -0,0 +1,2 @@ +systemctl stop pddf-platform-init.service +systemctl disable pddf-platform-init.service \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/Makefile b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/Makefile new file mode 100644 index 000000000000..7c2273d0063b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/Makefile @@ -0,0 +1,6 @@ + +MODULE_NAME = x86-64-ufispace-s6301-56st-sys-eeprom.o x86-64-ufispace-s6301-56st-lpc.o +obj-m := $(MODULE_NAME) + +CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include +KBUILD_EXTRA_SYMBOLS := $(M)/../../../../pddf/i2c/Module.symvers.PDDF diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-lpc.c new file mode 100644 index 000000000000..9b42c8f2b88f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-lpc.c @@ -0,0 +1,829 @@ +/* + * A lpc driver for the ufispace_s6301_56st + * + * Copyright (C) 2017-2020 UfiSpace Technology Corporation. + * Jason Tsai + * Leo Lin + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include +#include + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args) +#define DRIVER_NAME "x86_64_ufispace_s6301_56st_lpc" + +/* LPC registers */ + +#define REG_BASE_CPU 0x600 +#define REG_BASE_MB 0x700 + +//MB CPLD +#define REG_MB_BRD_ID_0 (REG_BASE_MB + 0x00) +#define REG_MB_BRD_ID_1 (REG_BASE_MB + 0x01) +#define REG_MB_CPLD_VERSION (REG_BASE_MB + 0x02) +#define REG_MB_CPLD_BUILD (REG_BASE_MB + 0x04) +#define REG_MB_EXTEND_ID (REG_BASE_MB + 0x06) +#define REG_MB_MUX_RESET (REG_BASE_MB + 0x43) +#define REG_MB_FAN_STATUS (REG_BASE_MB + 0x55) +#define REG_MB_PSU_STATUS (REG_BASE_MB + 0x59) +#define REG_MB_PORT_LED_CLR (REG_BASE_MB + 0x80) +#define REG_MB_SYS_LED_CTRL_1 (REG_BASE_MB + 0x81) +#define REG_MB_SYS_LED_STATUS_1 (REG_BASE_MB + 0x82) +#define REG_MB_SYS_LED_STATUS_2 (REG_BASE_MB + 0x83) +#define REG_MB_SYS_LED_STATUS_3 (REG_BASE_MB + 0x84) + +#define MASK_ALL (0xFF) + +#define MDELAY_LPC (5) +#define MDELAY_RESET_INTERVAL (100) +#define MDELAY_RESET_FINISH (500) + +#define MULTIBIT_SET(addr, mask, value) (((addr)&((0xff)^(mask)))|((value)&(mask))) + + +/* LPC sysfs attributes index */ +enum lpc_sysfs_attributes { + //MB CPLD + ATT_MB_BRD_ID_0, + ATT_MB_BRD_ID_1, + ATT_MB_CPLD_1_VERSION, + ATT_MB_CPLD_1_VERSION_H, + ATT_MB_BRD_SKU_ID, + ATT_MB_BRD_HW_ID, + ATT_MB_BRD_ID_TYPE, + ATT_MB_BRD_BUILD_ID, + ATT_MB_BRD_DEPH_ID, + ATT_MB_BRD_EXT_ID, + ATT_MB_MUX_RESET, + ATT_MB_FAN_STATUS, + ATT_MB_PSU_STATUS, + ATT_MB_PORT_LED_CLR, + ATT_MB_LED_SYS, + ATT_MB_LED_ID, + ATT_MB_LED_POE, + ATT_MB_LED_SPD, + ATT_MB_LED_FAN, + ATT_MB_LED_LNK, + ATT_MB_LED_PWR0, + ATT_MB_LED_PWR1, + //BSP + ATT_BSP_VERSION, + ATT_BSP_DEBUG, + ATT_BSP_PR_INFO, + ATT_BSP_PR_ERR, + ATT_BSP_REG, + ATT_BSP_REG_VALUE, + ATT_BSP_GPIO_MAX, + ATT_MAX +}; + +enum bases { + BASE_DEC, + BASE_HEX, + BASE_NONE + +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE, + LOG_SYS +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +struct lpc_data_s { + struct mutex access_lock; +}; + +struct lpc_data_s *lpc_data; +char bsp_version[16]; +char bsp_debug[32]; +char bsp_reg[8]="0x0"; +u8 enable_log_read=LOG_DISABLE; +u8 enable_log_write=LOG_DISABLE; +u8 enable_log_sys=LOG_ENABLE; + +/* mask len and shift */ +static void _get_len_shift(u8 mask, u8 *len, u8 *shift) +{ + int i; + bool found=false; + *len=0; + *shift=0; + + for(i=0; i<8; ++i) { + if(mask & 1) { + *len = *len + 1; + if(!found) { + *shift = i; + found = true; + } + } + mask >>= 1; + } +} + +/* reg mask and shift */ +static u8 _mask_shift(u8 val, u8 mask) +{ + u8 shift=0; + u8 len; + + _get_len_shift(mask, &len, &shift); + + return (val & mask) >> shift; +} + +static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val) +{ + if(bit_val == 0) + reg_val = reg_val & ~(1 << bit); + else + reg_val = reg_val | (1 << bit); + return reg_val; +} + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write) || + (log_type==LOG_SYS && enable_log_sys) ) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +/* get lpc register value */ +static u8 _read_lpc_reg(u16 reg, u8 mask) +{ + u8 reg_val=0x0, reg_mk_shf_val=0x0; + + mutex_lock(&lpc_data->access_lock); + reg_val = inb(reg); + mutex_unlock(&lpc_data->access_lock); + + reg_mk_shf_val = _mask_shift(reg_val, mask); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x, mask=0x%02x, reg_mk_shf_val=0x%02x", reg, reg_val, mask, reg_mk_shf_val); + + return reg_mk_shf_val; +} + +/* get lpc register value */ +static ssize_t read_lpc_reg(u16 reg, u8 mask, u8 base, char *buf) +{ + u8 reg_val; + int len=0; + + reg_val = _read_lpc_reg(reg, mask); + if(base == BASE_HEX) { + len=sprintf(buf, "0x%02x\n", reg_val); + } else { + len=sprintf(buf,"%d\n", reg_val); + } + + return len; +} + +/* set lpc register value */ +static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count) +{ + u8 reg_val, reg_val_now, shift, mask_len; + + if(kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + _get_len_shift(mask, &mask_len, &shift); + + // set signal bit + if(mask_len == 1) { + reg_val_now = _read_lpc_reg(reg, MASK_ALL); + reg_val = _bit_operation(reg_val_now, shift, reg_val); + // set multi bit + } else if (mask_len > 1) { + reg_val_now = _read_lpc_reg(reg, MASK_ALL); + reg_val = MULTIBIT_SET(reg_val_now, mask, reg_val<access_lock); + + outb(reg_val, reg); + mdelay(MDELAY_LPC); + + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x, mask=0x%02x", reg, reg_val, mask); + + return count; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + mutex_lock(&lpc_data->access_lock); + len=sprintf(buf, "%s", str); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + mutex_lock(&lpc_data->access_lock); + snprintf(str, str_len, "%s", buf); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get mb cpld version in human readable format */ +static ssize_t read_mb_cpld_1_version_h(struct device *dev, + struct device_attribute *da, char *buf) +{ + ssize_t len=0; + u16 reg = REG_MB_CPLD_VERSION; + u8 mask = MASK_ALL; + u8 mask_major = 0b11000000; + u8 mask_minor = 0b00111111; + u8 reg_val; + u8 major, minor, build; + + mutex_lock(&lpc_data->access_lock); + reg_val = _mask_shift(inb(reg), mask); + mutex_unlock(&lpc_data->access_lock); + major = _mask_shift(reg_val, mask_major); + minor = _mask_shift(reg_val, mask_minor); + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + reg = REG_MB_CPLD_BUILD; + mutex_lock(&lpc_data->access_lock); + reg_val = _mask_shift(inb(reg), mask); + mutex_unlock(&lpc_data->access_lock); + build = reg_val; + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x", reg, reg_val); + + len=sprintf(buf, "%d.%02d.%03d\n", major, minor, build); + return len; +} + +/* set mb_mux_reset register value */ +static ssize_t write_mb_mux_reset(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + u8 val = 0; + u8 reg_val = 0; + static int mux_reset_flag = 0; + + if(kstrtou8(buf, 0, &val) < 0) + return -EINVAL; + + if(mux_reset_flag == 0) { + if(val == 0) { + mutex_lock(&lpc_data->access_lock); + mux_reset_flag = 1; + printk(KERN_INFO "i2c mux reset is triggered...\n"); + reg_val = inb(REG_MB_MUX_RESET); + outb((reg_val & 0b11111000), REG_MB_MUX_RESET); + mdelay(100); + outb((reg_val | 0b00000111), REG_MB_MUX_RESET); + mdelay(500); + mux_reset_flag = 0; + mutex_unlock(&lpc_data->access_lock); + } else { + return -EINVAL; + } + } else { + printk(KERN_INFO "i2c mux is resetting... (ignore)\n"); + mutex_lock(&lpc_data->access_lock); + mutex_unlock(&lpc_data->access_lock); + } + + return count; +} + +/* get lpc register value */ +static ssize_t read_lpc_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + u8 base = BASE_DEC; + + switch (attr->index) { + //MB CPLD + case ATT_MB_BRD_ID_0: + reg = REG_MB_BRD_ID_0; + break; + case ATT_MB_BRD_ID_1: + reg = REG_MB_BRD_ID_1; + break; + case ATT_MB_CPLD_1_VERSION: + reg = REG_MB_CPLD_VERSION; + break; + case ATT_MB_BRD_SKU_ID: + reg = REG_MB_BRD_ID_0; + mask = 0xFF; + break; + case ATT_MB_BRD_HW_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x3; + break; + case ATT_MB_BRD_ID_TYPE: + reg = REG_MB_BRD_ID_1; + mask = 0x80; + break; + case ATT_MB_BRD_BUILD_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x18; + break; + case ATT_MB_BRD_DEPH_ID: + reg = REG_MB_BRD_ID_1; + mask = 0x4; + break; + case ATT_MB_BRD_EXT_ID: + reg = REG_MB_EXTEND_ID; + mask = 0x07; + break; + case ATT_MB_MUX_RESET: + reg = REG_MB_MUX_RESET; + mask = 0x07; + base = BASE_HEX; + break; + case ATT_MB_FAN_STATUS: + reg = REG_MB_FAN_STATUS; + base = BASE_HEX; + break; + case ATT_MB_PSU_STATUS: + reg = REG_MB_PSU_STATUS; + base = BASE_HEX; + break; + case ATT_MB_PORT_LED_CLR: + reg = REG_MB_PORT_LED_CLR; + mask = 0x1; + base = BASE_HEX; + break; + case ATT_MB_LED_SYS: + reg = REG_MB_SYS_LED_CTRL_1; + mask = 0xF0; + base = BASE_HEX; + break; + case ATT_MB_LED_ID: + reg = REG_MB_SYS_LED_CTRL_1; + mask = 0xF; + base = BASE_HEX; + break; + case ATT_MB_LED_POE: + reg = REG_MB_SYS_LED_STATUS_1; + mask = 0xF0; + base = BASE_HEX; + break; + case ATT_MB_LED_SPD: + reg = REG_MB_SYS_LED_STATUS_1; + mask = 0xF; + base = BASE_HEX; + break; + case ATT_MB_LED_FAN: + reg = REG_MB_SYS_LED_STATUS_2; + mask = 0xF0; + base = BASE_HEX; + break; + case ATT_MB_LED_LNK: + reg = REG_MB_SYS_LED_STATUS_2; + mask = 0xF; + base = BASE_HEX; + break; + case ATT_MB_LED_PWR1: + reg = REG_MB_SYS_LED_STATUS_3; + mask = 0xF0; + base = BASE_HEX; + break; + case ATT_MB_LED_PWR0: + reg = REG_MB_SYS_LED_STATUS_3; + mask = 0xF; + base = BASE_HEX; + break; + //BSP + case ATT_BSP_REG_VALUE: + if (kstrtou16(bsp_reg, 0, ®) < 0) + return -EINVAL; + + mask = MASK_ALL; + break; + default: + return -EINVAL; + } + return read_lpc_reg(reg, mask, base, buf); +} + +/* set lpc register value */ +static ssize_t write_lpc_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + + switch (attr->index) { + case ATT_MB_PORT_LED_CLR: + reg = REG_MB_PORT_LED_CLR; + mask = 0x1; + break; + case ATT_MB_LED_SYS: + reg = REG_MB_SYS_LED_CTRL_1; + mask = 0xF0; + break; + case ATT_MB_LED_ID: + reg = REG_MB_SYS_LED_CTRL_1; + mask = 0xF; + break; + default: + return -EINVAL; + } + return write_lpc_reg(reg, mask, buf, count); +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(bsp_version); + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + case ATT_BSP_REG: + str = bsp_reg; + str_len = sizeof(bsp_reg); + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + u16 reg = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(str); + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(str); + break; + case ATT_BSP_REG: + if(kstrtou16(buf, 0, ®) < 0) + return -EINVAL; + + str = bsp_reg; + str_len = sizeof(str); + break; + default: + return -EINVAL; + } + + if(attr->index == ATT_BSP_DEBUG) { + if(kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + } + + return write_bsp(buf, str, str_len, count); +} + +static ssize_t write_bsp_pr_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len = strlen(buf); + + if(str_len <= 0) + return str_len; + + switch (attr->index) { + case ATT_BSP_PR_INFO: + BSP_PR(KERN_INFO, "%s", buf); + break; + case ATT_BSP_PR_ERR: + BSP_PR(KERN_ERR, "%s", buf); + break; + default: + return -EINVAL; + } + + return str_len; +} + +/* get gpio max value */ +static ssize_t read_gpio_max_callback(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + if (attr->index == ATT_BSP_GPIO_MAX) { + return sprintf(buf, "%d\n", ARCH_NR_GPIOS-1); + } + return -1; +} + +//SENSOR_DEVICE_ATTR - MB +static SENSOR_DEVICE_ATTR(board_id_0, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_0); +static SENSOR_DEVICE_ATTR(board_id_1, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_1); +static SENSOR_DEVICE_ATTR(mb_cpld_1_version, S_IRUGO, read_lpc_callback, NULL, ATT_MB_CPLD_1_VERSION); +static SENSOR_DEVICE_ATTR(mb_cpld_1_version_h, S_IRUGO, read_mb_cpld_1_version_h, NULL, ATT_MB_CPLD_1_VERSION_H); +static SENSOR_DEVICE_ATTR(board_sku_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_SKU_ID); +static SENSOR_DEVICE_ATTR(board_hw_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_HW_ID); +static SENSOR_DEVICE_ATTR(board_id_type, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_ID_TYPE); +static SENSOR_DEVICE_ATTR(board_build_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_BUILD_ID); +static SENSOR_DEVICE_ATTR(board_deph_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_DEPH_ID); +static SENSOR_DEVICE_ATTR(board_ext_id, S_IRUGO, read_lpc_callback, NULL, ATT_MB_BRD_EXT_ID); +static SENSOR_DEVICE_ATTR(mux_reset, S_IRUGO | S_IWUSR, read_lpc_callback, write_mb_mux_reset, ATT_MB_MUX_RESET); +static SENSOR_DEVICE_ATTR(fan_status, S_IRUGO, read_lpc_callback, NULL, ATT_MB_FAN_STATUS); +static SENSOR_DEVICE_ATTR(psu_status, S_IRUGO, read_lpc_callback, NULL, ATT_MB_PSU_STATUS); +static SENSOR_DEVICE_ATTR(port_led_clear, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_PORT_LED_CLR); +static SENSOR_DEVICE_ATTR(led_sys, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_LED_SYS); +static SENSOR_DEVICE_ATTR(led_id, S_IRUGO | S_IWUSR, read_lpc_callback, write_lpc_callback, ATT_MB_LED_ID); +static SENSOR_DEVICE_ATTR(led_poe, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_POE); +static SENSOR_DEVICE_ATTR(led_spd, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_SPD); +static SENSOR_DEVICE_ATTR(led_fan, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_FAN); +static SENSOR_DEVICE_ATTR(led_lnk, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_LNK); +static SENSOR_DEVICE_ATTR(led_pwr1, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_PWR1); +static SENSOR_DEVICE_ATTR(led_pwr0, S_IRUGO, read_lpc_callback, NULL, ATT_MB_LED_PWR0); + +//SENSOR_DEVICE_ATTR - BSP +static SENSOR_DEVICE_ATTR(bsp_version , S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_VERSION); +static SENSOR_DEVICE_ATTR(bsp_debug , S_IRUGO | S_IWUSR, read_bsp_callback, write_bsp_callback, ATT_BSP_DEBUG); +static SENSOR_DEVICE_ATTR(bsp_pr_info , S_IWUSR , NULL , write_bsp_pr_callback, ATT_BSP_PR_INFO); +static SENSOR_DEVICE_ATTR(bsp_pr_err , S_IWUSR , NULL , write_bsp_pr_callback, ATT_BSP_PR_ERR); +static SENSOR_DEVICE_ATTR(bsp_reg , S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG); +static SENSOR_DEVICE_ATTR(bsp_reg_value, S_IRUGO , read_lpc_callback, NULL, ATT_BSP_REG_VALUE); +static SENSOR_DEVICE_ATTR(bsp_gpio_max, S_IRUGO , read_gpio_max_callback, NULL, ATT_BSP_GPIO_MAX); + + +static struct attribute *mb_cpld_attrs[] = { + &sensor_dev_attr_board_id_0.dev_attr.attr, + &sensor_dev_attr_board_id_1.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_version.dev_attr.attr, + &sensor_dev_attr_mb_cpld_1_version_h.dev_attr.attr, + &sensor_dev_attr_board_sku_id.dev_attr.attr, + &sensor_dev_attr_board_hw_id.dev_attr.attr, + &sensor_dev_attr_board_id_type.dev_attr.attr, + &sensor_dev_attr_board_build_id.dev_attr.attr, + &sensor_dev_attr_board_deph_id.dev_attr.attr, + &sensor_dev_attr_board_ext_id.dev_attr.attr, + &sensor_dev_attr_mux_reset.dev_attr.attr, + &sensor_dev_attr_fan_status.dev_attr.attr, + &sensor_dev_attr_psu_status.dev_attr.attr, + &sensor_dev_attr_port_led_clear.dev_attr.attr, + &sensor_dev_attr_led_sys.dev_attr.attr, + &sensor_dev_attr_led_id.dev_attr.attr, + &sensor_dev_attr_led_poe.dev_attr.attr, + &sensor_dev_attr_led_spd.dev_attr.attr, + &sensor_dev_attr_led_fan.dev_attr.attr, + &sensor_dev_attr_led_lnk.dev_attr.attr, + &sensor_dev_attr_led_pwr0.dev_attr.attr, + &sensor_dev_attr_led_pwr1.dev_attr.attr, + NULL, +}; + +static struct attribute *bsp_attrs[] = { + &sensor_dev_attr_bsp_version.dev_attr.attr, + &sensor_dev_attr_bsp_debug.dev_attr.attr, + &sensor_dev_attr_bsp_pr_info.dev_attr.attr, + &sensor_dev_attr_bsp_pr_err.dev_attr.attr, + &sensor_dev_attr_bsp_reg.dev_attr.attr, + &sensor_dev_attr_bsp_reg_value.dev_attr.attr, + &sensor_dev_attr_bsp_gpio_max.dev_attr.attr, + NULL, +}; + +static struct attribute_group mb_cpld_attr_grp = { + .name = "mb_cpld", + .attrs = mb_cpld_attrs, +}; + +static struct attribute_group bsp_attr_grp = { + .name = "bsp", + .attrs = bsp_attrs, +}; + +static void lpc_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device lpc_dev = { + .name = DRIVER_NAME, + .id = -1, + .dev = { + .release = lpc_dev_release, + } +}; + +static int lpc_drv_probe(struct platform_device *pdev) +{ + int i = 0, grp_num = 2; + int err[5] = {0}; + struct attribute_group *grp; + + lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s), + GFP_KERNEL); + if(!lpc_data) + return -ENOMEM; + + mutex_init(&lpc_data->access_lock); + + for (i=0; idev.kobj, grp); + if(err[i]) { + printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name); + goto exit; + } else { + continue; + } + } + + return 0; + +exit: + for (i=0; idev.kobj, grp); + if(!err[i]) { + //remove previous successful cases + continue; + } else { + //remove first failed case, then return + return err[i]; + } + } + return 0; +} + +static int lpc_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp); + + return 0; +} + +static struct platform_driver lpc_drv = { + .probe = lpc_drv_probe, + .remove = __exit_p(lpc_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int lpc_init(void) +{ + int err = 0; + + err = platform_driver_register(&lpc_drv); + if(err) { + printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n", + __func__, __LINE__, err); + + return err; + } + + err = platform_device_register(&lpc_dev); + if(err) { + printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n", + __func__, __LINE__, err); + platform_driver_unregister(&lpc_drv); + return err; + } + + return err; +} + +void lpc_exit(void) +{ + platform_driver_unregister(&lpc_drv); + platform_device_unregister(&lpc_dev); +} + +MODULE_AUTHOR("Leo Lin "); +MODULE_DESCRIPTION("x86_64_ufispace_s6301_56st_lpc driver"); +MODULE_LICENSE("GPL"); + +module_init(lpc_init); +module_exit(lpc_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-sys-eeprom.c new file mode 100644 index 000000000000..5c6dec193ef6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/modules/x86-64-ufispace-s6301-56st-sys-eeprom.c @@ -0,0 +1,273 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* enable dev_dbg print out */ +//#define DEBUG + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57,*/ I2C_CLIENT_END }; + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 512 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void sys_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF)); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + sys_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + int ret; + int i; + u8 cmd; + u16 value16; + + dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count); + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + mutex_lock(&data->update_lock); + + for(i=0; i < count; i++) { + /* write command */ + cmd = (off >> 8) & 0xff; + value16 = off & 0xff; + value16 |= buf[i] << 8; + ret = i2c_smbus_write_word_data(client, cmd, value16); + + if (ret < 0) { + dev_err(&client->dev, "write address failed at %d \n", (int)off); + goto exit; + } + + off++; + + /* need to wait for write complete */ + udelay(10000); + } +exit: + mutex_unlock(&data->update_lock); + /* force to update client when reading */ + for(i=0; i < SLICE_NUM; i++) { + data->last_updated[i] = 0; + } + + return count; +} + +static struct bin_attribute sys_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUSR, + }, + .size = EEPROM_SIZE, + .read = sys_eeprom_read, + .write = sys_eeprom_write, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline + attaching to addresses >= 0x56 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int sys_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + +#ifdef __STDC_LIB_EXT1__ + memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE); +#else + memset(data->data, 0xff, EEPROM_SIZE); +#endif + + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int sys_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id sys_eeprom_id[] = { + { "sys_eeprom", 0 }, + { } +}; + +static struct i2c_driver sys_eeprom_driver = { + .driver = { + .name = "sys_eeprom", + }, + .probe = sys_eeprom_probe, + .remove = sys_eeprom_remove, + .id_table = sys_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = sys_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(sys_eeprom_driver); + +MODULE_AUTHOR("Leo Lin "); +MODULE_DESCRIPTION("UfiSpace System EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/service/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/service/pddf-platform-init.service new file mode 120000 index 000000000000..0fd9f25b6c5e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/service/pddf-platform-init.service @@ -0,0 +1 @@ +../../../../pddf/i2c/service/pddf-platform-init.service \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/__init__.py new file mode 100644 index 000000000000..593867d31c9d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/__init__.py @@ -0,0 +1,4 @@ +# All the derived classes for PDDF +__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan"] +from . import platform + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/chassis.py new file mode 100644 index 000000000000..ab3e44f74432 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/chassis.py @@ -0,0 +1,220 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Chassis API +# +############################################################################# + +try: + import time + from sonic_platform_pddf_base.pddf_chassis import PddfChassis + from sonic_py_common import device_info +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_COMPONENT = 2 + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + + port_dict = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + self._initialize_components() + + def _initialize_components(self): + from sonic_platform.component import Component + for index in range(NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + return device_info.get_platform() + + def initizalize_system_led(self): + return True + + def get_status_led(self): + return self.get_system_led("SYS_LED") + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + Returns: + (bool, dict): + - bool: True if call successful, False if not; + - dict: A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, where device_id is the device ID + for this device and device_event. + The known devices's device_id and device_event was defined as table below. + ----------------------------------------------------------------- + device | device_id | device_event | annotate + ----------------------------------------------------------------- + 'sfp' '' '0' Sfp removed + '1' Sfp inserted + '2' I2C bus stuck + '3' Bad eeprom + '4' Unsupported cable + '5' High Temperature + '6' Bad cable + -------------------------------------------------------------------- + Ex. 'sfp':{'11':'0', '12':'1'}, + Indicates that: + sfp 11 has been removed, sfp 12 has been inserted. + Note: For sfp, when event 3-6 happened, the module will not be avalaible, + XCVRD shall stop to read eeprom before SFP recovered from error status. + """ + + change_event_dict = {"sfp": {}} + + start_time = time.time() + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print("get_change_event:Invalid timeout value", timeout) + return False, change_event_dict + + end_time = start_time + timeout + if start_time > end_time: + print( + "get_change_event:" "time wrap / invalid timeout value", + timeout, + ) + return False, change_event_dict # Time wrap or possibly incorrect timeout + try: + while timeout >= 0: + # check for sfp + sfp_change_dict = self.get_transceiver_change_event() + + if sfp_change_dict: + change_event_dict["sfp"] = sfp_change_dict + return True, change_event_dict + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, change_event_dict + except Exception as e: + print(e) + print("get_change_event: Should not reach here.") + return False, change_event_dict + + def get_transceiver_change_event(self, timeout=0): + current_port_dict = {} + ret_dict = {} + + # Check for OIR events and return ret_dict + for index in range(self.platform_inventory['num_ports']): + if self._sfp_list[index].get_presence(): + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['inserted'] + else: + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['removed'] + + if len(self.port_dict) == 0: # first time + self.port_dict = current_port_dict + return {} + + if current_port_dict == self.port_dict: + return {} + + # Update reg value + for index, status in current_port_dict.items(): + if self.port_dict[index] != status: + ret_dict[index] = status + #ret_dict[str(index)] = status + self.port_dict = current_port_dict + for index, status in ret_dict.items(): + if int(status) == 1: + pass + #self._sfp_list[int(index)].check_sfp_optoe_type() + return ret_dict + + def get_sfp(self, index): + """ + Retrieves sfp represented by (1-based) index + + Args: + index: An integer, the index (1-based) of the sfp to retrieve. + The index should be the sequence of a physical port in a chassis, + starting from 1. + For example, 1 for Ethernet0, 2 for Ethernet4 and so on. + + Returns: + An object derived from SfpBase representing the specified sfp + """ + sfp = None + + try: + # The index will start from 1 + # sfputil already convert to physical port index according to config + sfp = self._sfp_list[index] + except IndexError: + sys.stderr.write("SFP index {} out of range (1-{})\n".format( + index, len(self._sfp_list))) + return sfp + + def set_system_led(self, led_device_name, color): + """ + Sets the color of an System LED device + Args: + led_device_name: a pre-defined LED device name list used in pddf-device.json. + color: A string representing the color with which to set a LED + Returns: + bool: True if the LED state is set successfully, False if not + """ + + if led_device_name in self.plugin_data['LED']['capability']['rw']: + result, msg = self.pddf_obj.set_system_led_color(led_device_name, color) + if not result and msg: + print(msg) + return (result) + else: + print("Not Support") + return False + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + reboot_cause_path = self.plugin_data['REBOOT_CAUSE']['reboot_cause_file'] + + try: + with open(reboot_cause_path, 'r', errors='replace') as fd: + data = fd.read() + sw_reboot_cause = data.strip() + except IOError: + sw_reboot_cause = "Unknown" + + return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause) \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/component.py new file mode 100644 index 000000000000..c0b7816d4a82 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/component.py @@ -0,0 +1,108 @@ +############################################################################# +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +try: + import subprocess + from sonic_platform_base.component_base import ComponentBase +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +CPLD_SYSFS = { + "CPLD1": "/sys/devices/platform/x86_64_ufispace_s6301_56st_lpc/mb_cpld/mb_cpld_1_version_h", +} + +BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version" +COMPONENT_LIST= [ + ("CPLD1", "CPLD 1"), + ("BIOS", "Basic Input/Output System"), +] + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index=0): + self.index = component_index + self.name = self.get_name() + + def _run_command(self, command): + # Run bash command and print output to stdout + try: + process = subprocess.Popen( + shlex.split(command), stdout=subprocess.PIPE) + while True: + output = process.stdout.readline() + if output == '' and process.poll() is not None: + break + rc = process.poll() + if rc != 0: + return False + except Exception: + return False + return True + + def _get_bios_version(self): + # Retrieves the BIOS firmware version + try: + with open(BIOS_VERSION_PATH, 'r') as fd: + bios_version = fd.read() + return bios_version.strip() + except Exception as e: + return None + + def _get_cpld_version(self): + # Retrieves the CPLD firmware version + cpld_version = dict() + for cpld_name in CPLD_SYSFS: + cmd = "cat {}".format(CPLD_SYSFS[cpld_name]) + status, value = subprocess.getstatusoutput(cmd) + if not status: + cpld_version[cpld_name] = value.rstrip() + + return cpld_version + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_LIST[self.index][0] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + return COMPONENT_LIST[self.index][1] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = None + + if self.name == "BIOS": + fw_version = self._get_bios_version() + elif "CPLD" in self.name: + cpld_version = self._get_cpld_version() + fw_version = cpld_version.get(self.name) + return fw_version + + def install_firmware(self, image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/eeprom.py new file mode 100644 index 000000000000..90ab1c779a48 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Eeprom(PddfEeprom): + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfEeprom.__init__(self, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + + def platform_name_str(self): + (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_PLATFORM_NAME) + if not is_valid: + return "N/A" + + return results[2].decode('ascii') \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan.py new file mode 100644 index 000000000000..2eadfd0a465a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan.py @@ -0,0 +1,153 @@ +#!/usr/bin/env python + +import os + +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan + from sonic_platform.psu_fru import PsuFru +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten + # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake' + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed_percentage = 0 + if self.is_psu_fan: + max_speed = int(self.plugin_data['PSU']['PSU_FAN_MAX_SPEED']) + else: + max_speed = int(self.plugin_data['FAN']['FAN_MAX_SPEED']) + + speed = int(self.get_speed_rpm()) + + + speed_percentage = round((speed*100)/max_speed) + return min(speed_percentage, 100) + + def get_speed_rpm(self): + """ + Retrieves the speed of fan in RPM + + Returns: + An integer, Speed of fan in RPM + """ + rpm_speed = 0 + if self.is_psu_fan: + attr = "psu_fan{}_speed_rpm".format(self.fan_index) + device = "PSU{}".format(self.fans_psu_index) + output = self.pddf_obj.get_attr_name_output(device, attr) + if output is None: + return rpm_speed + + output['status'] = output['status'].rstrip() + if output['status'].isalpha(): + return rpm_speed + else: + rpm_speed = int(float(output['status'])) + else: + ucd_path = "/sys/bus/i2c/devices/5-0034/hwmon/" + if os.path.exists(ucd_path): + hwmon_dir = os.listdir(ucd_path) + with open("{}/{}/temp{}_input".format(ucd_path, hwmon_dir[0], self.fantray_index), "rb") as f: + rpm_speed = int(f.read().strip()) + + return rpm_speed + + def get_direction(self): + """ + Retrieves the direction of fan + Returns: + A string, either FAN_DIRECTION_INTAKE or FAN_DIRECTION_EXHAUST + depending on fan direction + """ + direction = self.FAN_DIRECTION_NOT_APPLICABLE + if self.is_psu_fan: + psu_fru = PsuFru(self.fans_psu_index) + if psu_fru.mfr_id == "not available": + return direction + for dev in self.plugin_data['PSU']['psu_support_list']: + if dev['Mfr_id'] == psu_fru.mfr_id and dev['Model'] == psu_fru.model: + dir = dev['Dir'] + break + else: + attr = "fan{}_direction".format(self.fantray_index) + device = "FAN-CTRL" + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return direction + mode = output['mode'] + val = output['status'].strip() + vmap = self.plugin_data['FAN']['direction'][mode]['valmap'] + if val in vmap: + dir = vmap[val] + + return dir + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + presence = False + if self.is_psu_fan: + attr = "psu_present" + device = "PSU{}".format(self.fans_psu_index) + else: + attr = "fan{}_present".format(self.fantray_index) + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr) + if not output: + return presence + + + mode = output['mode'] + val = output['status'].strip() + vmap = self.plugin_data['FAN']['present'][mode]['valmap'] + + if val in vmap: + presence = vmap[val] + + return presence + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + + return self.get_speed() + + def set_speed(self, speed): + """ + Sets the fan speed + + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + + Returns: + A boolean, True if speed is set successfully, False if not + """ + + print("Setting Fan speed is not allowed") + return False + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan_drawer.py new file mode 100644 index 000000000000..3b9bb607f632 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/fan_drawer.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(PddfFanDrawer): + """PDDF Platform-Specific Fan-Drawer class""" + + def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): + # idx is 0-based + PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/platform.py new file mode 100644 index 000000000000..406b1179ae1b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/platform.py @@ -0,0 +1,25 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + + +try: + from sonic_platform_pddf_base.pddf_platform import PddfPlatform +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PddfPlatform): + """ + PDDF Platform-Specific Platform Class + """ + + def __init__(self): + PddfPlatform.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu.py new file mode 100644 index 000000000000..008aa600cdf8 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu.py @@ -0,0 +1,67 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu + from sonic_platform.psu_fru import PsuFru +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + PLATFORM_PSU_CAPACITY = 750 + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + self.psu_fru = PsuFru(self.psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return float(self.PLATFORM_PSU_CAPACITY) + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + + # power is returned in micro watts + return round(float(self.get_voltage()*self.get_current()), 2) + + def get_mfr_id(self): + """ + Retrieves the manufacturer's name (or id) of the device + + Returns: + string: Manufacturer's id of device + """ + return self.psu_fru.mfr_id.rstrip() + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + return self.psu_fru.model.rstrip() + + def get_serial(self): + """ + Retrieves the serial number of the device + + Returns: + string: Serial number of device + """ + return self.psu_fru.serial.rstrip() diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu_fru.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu_fru.py new file mode 100644 index 000000000000..7f640352be7f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/psu_fru.py @@ -0,0 +1,52 @@ +#!/usr/bin/env python + +class PsuFru: + """PSU FRU class""" + eeprom = "" + mfr_id = "not available" + model = "not available" + serial = "not available" + + def __init__(self, psu_index): + self.psu_index = psu_index + self.eeprom = "/sys/bus/i2c/devices/2-00{}/eeprom".format(49 + psu_index) + self._parse_fru_eeprom() + + def _parse_fru_eeprom(self): + """ + Parsing eeprom fru content of PSU + """ + try: + with open(self.eeprom, 'rb') as eeprom: + data = eeprom.read() + + # check if dummy content + if data[0] == 0xff: + return + + i = 11 + + data_len = (data[i]&0x3f) + i += 1 + self.mfr_id = data[i:i+data_len].decode('utf-8') + i += data_len + + data_len = (data[i]&0x3f) + i += 1 + i += data_len + + data_len = (data[i]&0x3f) + i += 1 + self.model = data[i:i+data_len].decode('utf-8') + i += data_len + + data_len = (data[i]&0x3f) + i += 1 + i += data_len + + data_len = (data[i]&0x3f) + i += 1 + self.serial = data[i:i+data_len].decode('utf-8') + except Exception as e: + return + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/sfp.py new file mode 100644 index 000000000000..22229484ae60 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/sfp.py @@ -0,0 +1,40 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_sfp import PddfSfp +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + self.index = index + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_error_description(self): + """ + Retrives the error descriptions of the SFP module + Returns: + String that represents the current error descriptions of vendor specific errors + In case there are multiple errors, they should be joined by '|', + like: "Bad EEPROM|Unsupported cable" + """ + if not self.get_presence(): + return self.SFP_STATUS_UNPLUGGED + + return self.SFP_STATUS_OK + + def get_lpmode(self): + return False + + def set_lpmode(self, lpmode): + return False + + def reset(self): + return False diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/thermal.py new file mode 100644 index 000000000000..77d6ec7ae886 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/thermal.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/watchdog.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/watchdog.py new file mode 100644 index 000000000000..88660b1a1faa --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform/watchdog.py @@ -0,0 +1,23 @@ +#!/usr/bin/env python + +############################################################################# +# +# Module contains an implementation of platform specific watchdog API's +# +############################################################################# + +try: + from sonic_platform_pddf_base.pddf_watchdog import PddfWatchdog +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +class Watchdog(PddfWatchdog): + """ + PDDF Platform-specific Chassis class + """ + + def __init__(self): + PddfWatchdog.__init__(self) + self.timeout= 180 + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform_setup.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform_setup.py new file mode 100644 index 000000000000..3661c84a0cd6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/sonic_platform_setup.py @@ -0,0 +1,27 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on ufispace platform', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Leo Lin', + maintainer_email='leo.yt.lin@ufispace.com', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_post_device_create.sh new file mode 100755 index 000000000000..5905a4e14b9b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_post_device_create.sh @@ -0,0 +1,11 @@ +#!/bin/bash +echo "Reset port led" +echo 0 > /sys/devices/platform/x86_64_ufispace_s6301_56st_lpc//mb_cpld/port_led_clear +sleep 0.5 +echo 1 > /sys/devices/platform/x86_64_ufispace_s6301_56st_lpc//mb_cpld/port_led_clear + +curr_led=$(pddf_ledutil getstatusled SYS_LED) +pddf_ledutil setstatusled SYS_LED green +echo "Set System $curr_led to green" + +echo "PDDF device post-create completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_post_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_post_driver_install.sh new file mode 100755 index 000000000000..ed2559977e42 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_post_driver_install.sh @@ -0,0 +1,2 @@ +#!/bin/bash +echo "PDDF driver post-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_pre_driver_install.sh new file mode 100755 index 000000000000..187943061e6c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_pre_driver_install.sh @@ -0,0 +1,11 @@ +#!/bin/bash +#rmmod gpio_ich +if [ ! -f /tmp/._pddf_pre_driver_init_completion ]; then + # make sure igb/i40e init in correct order + rmmod i2c-i801 + rmmod i2c_ismt + modprobe -r i2c-i801 + modprobe -r i2c_ismt + date > /tmp/._pddf_pre_driver_init_completion +fi +echo "PDDF driver pre-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_switch_svc.py b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_switch_svc.py new file mode 100644 index 000000000000..88c1a3b3e572 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s6301-56st/utils/pddf_switch_svc.py @@ -0,0 +1,86 @@ +#!/usr/bin/env python +# Script to stop and start the respective platforms default services. +# This will be used while switching the pddf->non-pddf mode and vice versa +import commands + +def check_pddf_support(): + return True + +def stop_platform_svc(): + + ''' + status, output = commands.getstatusoutput("systemctl stop s6301-56st-platform-monitor-fan.service") + if status: + print "Stop s6301-56st-platform-fan.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl stop s6301-56st-platform-monitor-psu.service") + if status: + print "Stop s6301-56st-platform-psu.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl stop s6301-56st-platform-monitor.service") + if status: + print "Stop s6301-56st-platform-init.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl disable s6301-56st-platform-monitor.service") + if status: + print "Disable s6301-56st-platform-monitor.service failed %d"%status + return False + ''' + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py deinit") + if status: + print "platform_utility.py deinit command failed %d"%status + return False + + # HACK , stop the pddf-platform-init service if it is active + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service along with other platform serives failed %d"%status + return False + + return True + +def start_platform_svc(): + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py init") + if status: + print "platform_utility.py init command failed %d"%status + return False + + ''' + status, output = commands.getstatusoutput("systemctl enable s6301-56st-platform-monitor.service") + if status: + print "Enable s6301-56st-platform-monitor.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl start s6301-56st-platform-monitor-fan.service") + if status: + print "Start s6301-56st-platform-monitor-fan.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl start s6301-56st-platform-monitor-psu.service") + if status: + print "Start s6301-56st-platform-monitor-psu.service failed %d"%status + return False + ''' + return True + +def start_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service") + if status: + print "Start pddf-platform-init.service failed %d"%status + return False + + return True + +def stop_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service failed %d"%status + return False + + return True + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/Makefile b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/Makefile new file mode 100644 index 000000000000..f399cd24e23a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/Makefile @@ -0,0 +1,6 @@ + +MODULE_NAME = x86-64-ufispace-s7801-54xs-cpld.o x86-64-ufispace-s7801-54xs-sys-eeprom.o x86-64-ufispace-s7801-54xs-lpc.o pddf_custom_sysstatus_module.o +obj-m := $(MODULE_NAME) + +CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include +KBUILD_EXTRA_SYMBOLS := $(M)/../../../../pddf/i2c/Module.symvers.PDDF diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/pddf_custom_sysstatus_module.c new file mode 100644 index 000000000000..b50bb428000a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/pddf_custom_sysstatus_module.c @@ -0,0 +1,276 @@ +/* + * Copyright 2019 Broadcom. + * The term ��Broadcom�� refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module for system status registers + */ + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h" + + +SYSSTATUS_DATA sysstatus_data = {0}; + +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf); +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + + +PDDF_DATA_ATTR(attr_name, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_CHAR, 32, + (void*)&sysstatus_data.sysstatus_addr_attr.aname, NULL); +PDDF_DATA_ATTR(attr_devaddr, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.devaddr , NULL); +PDDF_DATA_ATTR(attr_offset, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.offset, NULL); +PDDF_DATA_ATTR(attr_mask, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.mask , NULL); +PDDF_DATA_ATTR(attr_len, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.len , NULL); +PDDF_DATA_ATTR(attr_ops, S_IWUSR, NULL, do_attr_operation, PDDF_CHAR, 8, (void*)&sysstatus_data, NULL); + + + +static struct attribute *sysstatus_addr_attributes[] = { + &attr_attr_name.dev_attr.attr, + &attr_attr_devaddr.dev_attr.attr, + &attr_attr_offset.dev_attr.attr, + &attr_attr_mask.dev_attr.attr, + &attr_attr_len.dev_attr.attr, + &attr_attr_ops.dev_attr.attr, + NULL +}; + +PDDF_DATA_ATTR(board_sku_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(board_hw_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(board_deph_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(board_build_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_major_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_minor_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_build , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_major_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_minor_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_build , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(psu_status , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_psu , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_sys , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_sync, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_fan , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_id , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); + +static struct attribute *sysstatus_data_attributes[] = { + &attr_board_sku_id.dev_attr.attr, + &attr_board_hw_id.dev_attr.attr, + &attr_board_deph_id.dev_attr.attr, + &attr_board_build_id.dev_attr.attr, + &attr_cpld1_major_ver.dev_attr.attr, + &attr_cpld1_minor_ver.dev_attr.attr, + &attr_cpld1_build.dev_attr.attr, + &attr_cpld2_major_ver.dev_attr.attr, + &attr_cpld2_minor_ver.dev_attr.attr, + &attr_cpld2_build.dev_attr.attr, + &attr_psu_status.dev_attr.attr, + &attr_system_led_psu.dev_attr.attr, + &attr_system_led_sys.dev_attr.attr, + &attr_system_led_sync.dev_attr.attr, + &attr_system_led_fan.dev_attr.attr, + &attr_system_led_id.dev_attr.attr, + NULL +}; + + +static const struct attribute_group pddf_sysstatus_addr_group = { + .attrs = sysstatus_addr_attributes, +}; + + +static const struct attribute_group pddf_sysstatus_data_group = { + .attrs = sysstatus_data_attributes, +}; + + +static struct kobject *sysstatus_addr_kobj; +static struct kobject *sysstatus_data_kobj; + + + +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf) +{ + + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + + } + } + + if (sysstatus_addr_attrs==NULL ) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname); + status = 0; + } + else + { + status = board_i2c_cpld_read( sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset); + } + + return sprintf(buf, "0x%x\n", (status&sysstatus_addr_attrs->mask)); + +} + +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + u8 reg_val; + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + } + } + + if (sysstatus_addr_attrs==NULL) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname); + return -EINVAL; + } + else + { + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + status = board_i2c_cpld_write(sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset, reg_val); + + if (status!=0) + { + printk(KERN_DEBUG "store_sysstatus_data() %s failed, status=%d\n",data->sysstatus_addr_attrs[i].aname, status); + return status; + } + } + + return count; +} + + + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + PDDF_ATTR *ptr = (PDDF_ATTR *)da; + SYSSTATUS_DATA *pdata = (SYSSTATUS_DATA *)(ptr->addr); + + pdata->sysstatus_addr_attrs[pdata->len] = pdata->sysstatus_addr_attr; + pdata->len++; + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Populating the data for %s\n", __FUNCTION__, pdata->sysstatus_addr_attr.aname); + +#ifdef __STDC_LIB_EXT1__ + memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); +#else + memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); +#endif + + return count; +} + + + + +int __init sysstatus_data_init(void) +{ + struct kobject *device_kobj; + int ret = 0; + + + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. init\n"); + + device_kobj = get_device_i2c_kobj(); + if(!device_kobj) + return -ENOMEM; + + sysstatus_addr_kobj = kobject_create_and_add("sysstatus", device_kobj); + if(!sysstatus_addr_kobj) + return -ENOMEM; + + sysstatus_data_kobj = kobject_create_and_add("sysstatus_data", sysstatus_addr_kobj); + if(!sysstatus_data_kobj) + return -ENOMEM; + + + ret = sysfs_create_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + if (ret) + { + kobject_put(sysstatus_addr_kobj); + return ret; + } + + ret = sysfs_create_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + if (ret) + { + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + return ret; + } + + + return ret; +} + +void __exit sysstatus_data_exit(void) +{ + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. exit\n"); + sysfs_remove_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Removed the kobjects for 'SYSSTATUS'\n",__FUNCTION__); + return; +} + +module_init(sysstatus_data_init); +module_exit(sysstatus_data_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("SYSSTATUS platform data"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.c b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.c new file mode 100644 index 000000000000..0cefcb8aac5f --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.c @@ -0,0 +1,1512 @@ +/* + * A i2c cpld driver for the ufispace_s7801_54xs + * + * Copyright (C) 2017-2022 UfiSpace Technology Corporation. + * Jason Tsai + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "x86-64-ufispace-s7801-54xs-cpld.h" + +#ifdef DEBUG +#define DEBUG_PRINT(fmt, args...) \ + printk(KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#else +#define DEBUG_PRINT(fmt, args...) +#endif + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_read_byte_data(i2c_client, reg); \ + mutex_unlock(lock); \ + BSP_LOG_R("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, ret); \ +} + +#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \ + mutex_unlock(lock); \ + BSP_LOG_W("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, val); \ +} + +#define _SENSOR_DEVICE_ATTR_RO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IRUGO, read_##_func, NULL, _index) + +#define _SENSOR_DEVICE_ATTR_WO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IWUSR, NULL, write_##_func, _index) + +#define _SENSOR_DEVICE_ATTR_RW(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IRUGO | S_IWUSR, read_##_func, write_##_func, _index) + +#define _DEVICE_ATTR(_name) \ + &sensor_dev_attr_##_name.dev_attr.attr + +#define I2C_RW_RETRY_COUNT 3 +#define I2C_RW_RETRY_INTERVAL 60 + +/* CPLD sysfs attributes index */ +enum cpld_sysfs_attributes { + //CPLD 1 + + CPLD_BOARD_ID_0, + CPLD_BOARD_ID_1, + CPLD_ID, + CPLD_CHIP, + CPLD_SKU_EXT, + + CPLD_MAJOR_VER, + CPLD_MINOR_VER, + CPLD_BUILD_VER, + CPLD_VERSION_H, + + CPLD_MAC_INTR, + CPLD_HWM_INTR, + CPLD_CPLD2_INTR, + CPLD_NTM_INTR, + CPLD_FAN_PSU_INTR, + CPLD_SFP_IOEXP_INTR, + CPLD_CPU_NMI_INTR, + CPLD_PTP_INTR, + CPLD_SYSTEM_INTR, + + CPLD_MAC_MASK, + CPLD_HWM_MASK, + CPLD_CPLD2_MASK, + CPLD_NTM_MASK, + CPLD_FAN_PSU_MASK, + CPLD_SFP_IOEXP_MASK, + CPLD_CPU_NMI_MASK, + CPLD_PTP_MASK, + CPLD_SYSTEM_MASK, + + CPLD_MAC_EVT, + CPLD_HWM_EVT, + CPLD_CPLD2_EVT, + CPLD_NTM_EVT, + CPLD_FAN_PSU_EVT, + CPLD_SFP_IOEXP_EVT, + CPLD_CPU_NMI_EVT, + CPLD_PTP_EVT, + + CPLD_EVT_CTRL, + + CPLD_MAC_RESET, + CPLD_SYSTEM_RESET, + CPLD_BMC_NTM_RESET, + CPLD_USB_RESET, + CPLD_I2C_MUX_RESET, + CPLD_I2C_MUX_RESET_2, + CPLD_MISC_RESET, + + CPLD_BRD_PRESENT, + CPLD_PSU_STATUS, + CPLD_SYSTEM_PWR, + CPLD_MAC_SYNCE, + CPLD_MAC_AVS, + CPLD_SYSTEM_STATUS, + CPLD_FAN_PRESENT, + CPLD_WATCHDOG, + CPLD_BOOT_SELECT, + CPLD_MUX_CTRL, + CPLD_MISC_CTRL_1, + CPLD_MISC_CTRL_2, + CPLD_TIMING_CTRL, + + CPLD_MAC_TEMP, + + CPLD_SYSTEM_LED_SYNC, + CPLD_SYSTEM_LED_SYS, + CPLD_SYSTEM_LED_FAN, + CPLD_SYSTEM_LED_PSU_0, + CPLD_SYSTEM_LED_PSU_1, + CPLD_SYSTEM_LED_ID, + + DBG_CPLD_MAC_INTR, + DBG_CPLD_HWM_INTR, + DBG_CPLD_CPLD2_INTR, + DBG_CPLD_NTM_INTR, + DBG_CPLD_FAN_PSU_INTR, + DBG_CPLD_SFP_IOEXP_INTR, + DBG_CPLD_PTP_INTR, + + //CPLD 2 + + //interrupt status + CPLD_SFP_INTR_PRESENT_0_7, + CPLD_SFP_INTR_PRESENT_8_15, + CPLD_SFP_INTR_PRESENT_16_23, + CPLD_SFP_INTR_PRESENT_24_31, + CPLD_SFP_INTR_PRESENT_32_39, + CPLD_SFP_INTR_PRESENT_40_47, + CPLD_QSFP_INTR_PRESENT_48_53, + CPLD_QSFP_INTR_PORT_48_53, + + //interrupt mask + CPLD_SFP_MASK_PRESENT_0_7, + CPLD_SFP_MASK_PRESENT_8_15, + CPLD_SFP_MASK_PRESENT_16_23, + CPLD_SFP_MASK_PRESENT_24_31, + CPLD_SFP_MASK_PRESENT_32_39, + CPLD_SFP_MASK_PRESENT_40_47, + CPLD_QSFP_MASK_PRESENT_48_53, + CPLD_QSFP_MASK_PORT_48_53, + + //interrupt event + CPLD_SFP_EVT_PRESENT_0_7, + CPLD_SFP_EVT_PRESENT_8_15, + CPLD_SFP_EVT_PRESENT_16_23, + CPLD_SFP_EVT_PRESENT_24_31, + CPLD_SFP_EVT_PRESENT_32_39, + CPLD_SFP_EVT_PRESENT_40_47, + CPLD_QSFP_EVT_PRESENT_48_53, + CPLD_QSFP_EVT_PORT_48_53, + + CPLD_SFP_INTR_RX_LOS_0_7, + CPLD_SFP_INTR_RX_LOS_8_15, + CPLD_SFP_INTR_RX_LOS_16_23, + CPLD_SFP_INTR_RX_LOS_24_31, + CPLD_SFP_INTR_RX_LOS_32_39, + CPLD_SFP_INTR_RX_LOS_40_47, + + CPLD_SFP_INTR_TX_FAULT_0_7, + CPLD_SFP_INTR_TX_FAULT_8_15, + CPLD_SFP_INTR_TX_FAULT_16_23, + CPLD_SFP_INTR_TX_FAULT_24_31, + CPLD_SFP_INTR_TX_FAULT_32_39, + CPLD_SFP_INTR_TX_FAULT_40_47, + + CPLD_SFP_MASK_RX_LOS_0_7, + CPLD_SFP_MASK_RX_LOS_8_15, + CPLD_SFP_MASK_RX_LOS_16_23, + CPLD_SFP_MASK_RX_LOS_24_31, + CPLD_SFP_MASK_RX_LOS_32_39, + CPLD_SFP_MASK_RX_LOS_40_47, + + CPLD_SFP_MASK_TX_FAULT_0_7, + CPLD_SFP_MASK_TX_FAULT_8_15, + CPLD_SFP_MASK_TX_FAULT_16_23, + CPLD_SFP_MASK_TX_FAULT_24_31, + CPLD_SFP_MASK_TX_FAULT_32_39, + CPLD_SFP_MASK_TX_FAULT_40_47, + + CPLD_SFP_EVT_RX_LOS_0_7, + CPLD_SFP_EVT_RX_LOS_8_15, + CPLD_SFP_EVT_RX_LOS_16_23, + CPLD_SFP_EVT_RX_LOS_24_31, + CPLD_SFP_EVT_RX_LOS_32_39, + CPLD_SFP_EVT_RX_LOS_40_47, + + CPLD_SFP_EVT_TX_FAULT_0_7, + CPLD_SFP_EVT_TX_FAULT_8_15, + CPLD_SFP_EVT_TX_FAULT_16_23, + CPLD_SFP_EVT_TX_FAULT_24_31, + CPLD_SFP_EVT_TX_FAULT_32_39, + CPLD_SFP_EVT_TX_FAULT_40_47, + + CPLD_SFP_TX_DISABLE_0_7, + CPLD_SFP_TX_DISABLE_8_15, + CPLD_SFP_TX_DISABLE_16_23, + CPLD_SFP_TX_DISABLE_24_31, + CPLD_SFP_TX_DISABLE_32_39, + CPLD_SFP_TX_DISABLE_40_47, + + CPLD_QSFP_RESET_48_53, + CPLD_QSFP_LPMODE_48_53, + + //debug interrupt status + DBG_CPLD_SFP_INTR_PRESENT_0_7, + DBG_CPLD_SFP_INTR_PRESENT_8_15, + DBG_CPLD_SFP_INTR_PRESENT_16_23, + DBG_CPLD_SFP_INTR_PRESENT_24_31, + DBG_CPLD_SFP_INTR_PRESENT_32_39, + DBG_CPLD_SFP_INTR_PRESENT_40_47, + DBG_CPLD_QSFP_INTR_PRESENT_48_53, + DBG_CPLD_QSFP_INTR_PORT_48_53, + + //debug interrupt mask + DBG_CPLD_SFP_INTR_RX_LOS_0_7, + DBG_CPLD_SFP_INTR_RX_LOS_8_15, + DBG_CPLD_SFP_INTR_RX_LOS_16_23, + DBG_CPLD_SFP_INTR_RX_LOS_24_31, + DBG_CPLD_SFP_INTR_RX_LOS_32_39, + DBG_CPLD_SFP_INTR_RX_LOS_40_47, + + DBG_CPLD_SFP_INTR_TX_FAULT_0_7, + DBG_CPLD_SFP_INTR_TX_FAULT_8_15, + DBG_CPLD_SFP_INTR_TX_FAULT_16_23, + DBG_CPLD_SFP_INTR_TX_FAULT_24_31, + DBG_CPLD_SFP_INTR_TX_FAULT_32_39, + DBG_CPLD_SFP_INTR_TX_FAULT_40_47, + + //BSP DEBUG + BSP_DEBUG +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +/* CPLD sysfs attributes hook functions */ +static ssize_t read_cpld_callback(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_cpld_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static u8 _read_cpld_reg(struct device *dev, u8 reg, u8 mask); +static ssize_t read_cpld_reg(struct device *dev, char *buf, u8 reg, u8 mask); +static ssize_t write_cpld_reg(struct device *dev, const char *buf, size_t count, u8 reg, u8 mask); +static ssize_t read_bsp(char *buf, char *str); +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count); +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_cpld_version_h(struct device *dev, + struct device_attribute *da, + char *buf); + +static LIST_HEAD(cpld_client_list); /* client list for cpld */ +static struct mutex list_lock; /* mutex for client list */ + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +struct cpld_data { + int index; /* CPLD index */ + struct mutex access_lock; /* mutex for cpld access */ + u8 access_reg; /* register to access */ +}; + +typedef struct sysfs_info_s +{ + u8 reg; + u8 mask; + u8 permission; +} sysfs_info_t; + +static sysfs_info_t sysfs_info[] = { + //CPLD 1 + + [CPLD_BOARD_ID_0] = {CPLD_BOARD_ID_0_REG, MASK_ALL, PERM_R}, + [CPLD_BOARD_ID_1] = {CPLD_BOARD_ID_1_REG, MASK_ALL, PERM_R}, + [CPLD_ID] = {CPLD_ID_REG, MASK_ALL, PERM_R}, + [CPLD_CHIP] = {CPLD_CHIP_REG, MASK_ALL, PERM_R}, + [CPLD_SKU_EXT] = {CPLD_SKU_EXT_REG, MASK_ALL, PERM_R}, + + [CPLD_MAJOR_VER] = {CPLD_VERSION_REG, MASK_CPLD_MAJOR_VER, PERM_R}, + [CPLD_MINOR_VER] = {CPLD_VERSION_REG, MASK_CPLD_MINOR_VER, PERM_R}, + [CPLD_BUILD_VER] = {CPLD_BUILD_REG, MASK_ALL, PERM_R}, + [CPLD_VERSION_H] = {CPLD_VERSION_REG, MASK_ALL, PERM_R}, + + [CPLD_MAC_INTR] = {CPLD_MAC_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_HWM_INTR] = {CPLD_HWM_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_CPLD2_INTR] = {CPLD_CPLD2_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_NTM_INTR] = {CPLD_NTM_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_FAN_PSU_INTR] = {CPLD_FAN_PSU_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_IOEXP_INTR] = {CPLD_SFP_IOEXP_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_CPU_NMI_INTR] = {CPLD_CPU_NMI_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_PTP_INTR] = {CPLD_PTP_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_SYSTEM_INTR] = {CPLD_SYSTEM_INTR_REG, MASK_ALL, PERM_R}, + + [CPLD_MAC_MASK] = {CPLD_MAC_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_HWM_MASK] = {CPLD_HWM_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_CPLD2_MASK] = {CPLD_CPLD2_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_NTM_MASK] = {CPLD_NTM_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_FAN_PSU_MASK] = {CPLD_FAN_PSU_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_IOEXP_MASK] = {CPLD_SFP_IOEXP_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_CPU_NMI_MASK] = {CPLD_CPU_NMI_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_PTP_MASK] = {CPLD_PTP_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_SYSTEM_MASK] = {CPLD_SYSTEM_MASK_REG, MASK_ALL, PERM_RW}, + + [CPLD_MAC_EVT] = {CPLD_MAC_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_HWM_EVT] = {CPLD_HWM_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_CPLD2_EVT] = {CPLD_CPLD2_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_NTM_EVT] = {CPLD_NTM_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_FAN_PSU_EVT] = {CPLD_FAN_PSU_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_IOEXP_EVT] = {CPLD_SFP_IOEXP_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_CPU_NMI_EVT] = {CPLD_CPU_NMI_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_PTP_EVT] = {CPLD_PTP_EVT_REG, MASK_ALL, PERM_R}, + + [CPLD_EVT_CTRL] = {CPLD_EVT_CTRL_REG, MASK_ALL, PERM_RW}, + + [CPLD_MAC_RESET] = {CPLD_MAC_RESET_REG, MASK_ALL, PERM_RW}, + [CPLD_SYSTEM_RESET] = {CPLD_SYSTEM_RESET_REG, MASK_ALL, PERM_RW}, + [CPLD_BMC_NTM_RESET] = {CPLD_BMC_NTM_RESET_REG, MASK_ALL, PERM_RW}, + [CPLD_USB_RESET] = {CPLD_USB_RESET_REG, MASK_ALL, PERM_RW}, + [CPLD_I2C_MUX_RESET] = {CPLD_I2C_MUX_RESET_REG, MASK_ALL, PERM_RW}, + [CPLD_I2C_MUX_RESET_2] = {CPLD_I2C_MUX_RESET_2_REG, MASK_ALL, PERM_RW}, + [CPLD_MISC_RESET] = {CPLD_MISC_RESET_REG, MASK_ALL, PERM_RW}, + + [CPLD_BRD_PRESENT] = {CPLD_BRD_PRESENT_REG, MASK_ALL, PERM_R}, + [CPLD_PSU_STATUS] = {CPLD_PSU_STATUS_REG, MASK_ALL, PERM_R}, + [CPLD_SYSTEM_PWR] = {CPLD_SYSTEM_PWR_REG, MASK_ALL, PERM_R}, + [CPLD_MAC_SYNCE] = {CPLD_MAC_SYNCE_REG, MASK_ALL, PERM_R}, + [CPLD_MAC_AVS] = {CPLD_MAC_AVS_REG, MASK_ALL, PERM_R}, + [CPLD_SYSTEM_STATUS] = {CPLD_SYSTEM_STATUS_REG, MASK_ALL, PERM_R}, + [CPLD_FAN_PRESENT] = {CPLD_FAN_PRESENT_REG, MASK_ALL, PERM_R}, + [CPLD_WATCHDOG] = {CPLD_WATCHDOG_REG, MASK_ALL, PERM_RW}, + [CPLD_BOOT_SELECT] = {CPLD_BOOT_SELECT_REG, MASK_ALL, PERM_RW}, + [CPLD_MUX_CTRL] = {CPLD_MUX_CTRL_REG, MASK_ALL, PERM_RW}, + [CPLD_MISC_CTRL_1] = {CPLD_MISC_CTRL_1_REG, MASK_ALL, PERM_RW}, + [CPLD_MISC_CTRL_2] = {CPLD_MISC_CTRL_2_REG, MASK_ALL, PERM_RW}, + [CPLD_TIMING_CTRL] = {CPLD_TIMING_CTRL_REG, MASK_ALL, PERM_RW}, + + [CPLD_MAC_TEMP] = {CPLD_MAC_TEMP_REG, MASK_ALL, PERM_R}, + + [CPLD_SYSTEM_LED_SYNC] = {CPLD_SYSTEM_LED_SYNC_REG, CPLD_SYSTEM_LED_SYNC_MASK, PERM_RW}, + [CPLD_SYSTEM_LED_SYS] = {CPLD_SYSTEM_LED_SYS_REG, CPLD_SYSTEM_LED_SYS_MASK, PERM_RW}, + [CPLD_SYSTEM_LED_FAN] = {CPLD_SYSTEM_LED_FAN_REG, CPLD_SYSTEM_LED_FAN_MASK, PERM_RW}, + [CPLD_SYSTEM_LED_PSU_0] = {CPLD_SYSTEM_LED_PSU_REG, CPLD_SYSTEM_LED_PSU_0_MASK, PERM_RW}, + [CPLD_SYSTEM_LED_PSU_1] = {CPLD_SYSTEM_LED_PSU_REG, CPLD_SYSTEM_LED_PSU_1_MASK, PERM_RW}, + [CPLD_SYSTEM_LED_ID] = {CPLD_SYSTEM_LED_ID_REG, CPLD_SYSTEM_LED_ID_MASK, PERM_RW}, + + [DBG_CPLD_MAC_INTR] = {DBG_CPLD_MAC_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_HWM_INTR] = {DBG_CPLD_HWM_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_CPLD2_INTR] = {DBG_CPLD_CPLD2_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_NTM_INTR] = {DBG_CPLD_NTM_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_FAN_PSU_INTR] = {DBG_CPLD_FAN_PSU_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_SFP_IOEXP_INTR] = {DBG_CPLD_SFP_IOEXP_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_PTP_INTR] = {DBG_CPLD_PTP_INTR_REG, MASK_ALL, PERM_RW}, + + //CPLD 2 + + //interrupt status + [CPLD_SFP_INTR_PRESENT_0_7] = {CPLD_SFP_INTR_PRESENT_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_PRESENT_8_15] = {CPLD_SFP_INTR_PRESENT_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_PRESENT_16_23] = {CPLD_SFP_INTR_PRESENT_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_PRESENT_24_31] = {CPLD_SFP_INTR_PRESENT_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_PRESENT_32_39] = {CPLD_SFP_INTR_PRESENT_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_PRESENT_40_47] = {CPLD_SFP_INTR_PRESENT_40_47_REG, MASK_ALL, PERM_R}, + [CPLD_QSFP_INTR_PRESENT_48_53] = {CPLD_QSFP_INTR_PRESENT_48_53_REG, MASK_ALL, PERM_R}, + [CPLD_QSFP_INTR_PORT_48_53] = {CPLD_QSFP_INTR_PORT_48_53_REG, MASK_ALL, PERM_R}, + + //interrupt mask + [CPLD_SFP_MASK_PRESENT_0_7] = {CPLD_SFP_MASK_PRESENT_0_7_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_PRESENT_8_15] = {CPLD_SFP_MASK_PRESENT_8_15_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_PRESENT_16_23] = {CPLD_SFP_MASK_PRESENT_16_23_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_PRESENT_24_31] = {CPLD_SFP_MASK_PRESENT_24_31_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_PRESENT_32_39] = {CPLD_SFP_MASK_PRESENT_32_39_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_PRESENT_40_47] = {CPLD_SFP_MASK_PRESENT_40_47_REG, MASK_ALL, PERM_RW}, + [CPLD_QSFP_MASK_PRESENT_48_53] = {CPLD_QSFP_MASK_PRESENT_48_53_REG, MASK_ALL, PERM_RW}, + [CPLD_QSFP_MASK_PORT_48_53] = {CPLD_QSFP_MASK_PORT_48_53_REG, MASK_ALL, PERM_RW}, + + //interrupt event + [CPLD_SFP_EVT_PRESENT_0_7] = {CPLD_SFP_EVT_PRESENT_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_PRESENT_8_15] = {CPLD_SFP_EVT_PRESENT_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_PRESENT_16_23] = {CPLD_SFP_EVT_PRESENT_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_PRESENT_24_31] = {CPLD_SFP_EVT_PRESENT_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_PRESENT_32_39] = {CPLD_SFP_EVT_PRESENT_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_PRESENT_40_47] = {CPLD_SFP_EVT_PRESENT_40_47_REG, MASK_ALL, PERM_R}, + [CPLD_QSFP_EVT_PRESENT_48_53] = {CPLD_QSFP_EVT_PRESENT_48_53_REG, MASK_ALL, PERM_R}, + [CPLD_QSFP_EVT_PORT_48_53] = {CPLD_QSFP_EVT_PORT_48_53_REG, MASK_ALL, PERM_R}, + + [CPLD_SFP_INTR_RX_LOS_0_7] = {CPLD_SFP_INTR_RX_LOS_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_RX_LOS_8_15] = {CPLD_SFP_INTR_RX_LOS_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_RX_LOS_16_23] = {CPLD_SFP_INTR_RX_LOS_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_RX_LOS_24_31] = {CPLD_SFP_INTR_RX_LOS_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_RX_LOS_32_39] = {CPLD_SFP_INTR_RX_LOS_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_RX_LOS_40_47] = {CPLD_SFP_INTR_RX_LOS_40_47_REG, MASK_ALL, PERM_R}, + + [CPLD_SFP_INTR_TX_FAULT_0_7] = {CPLD_SFP_INTR_TX_FAULT_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_TX_FAULT_8_15] = {CPLD_SFP_INTR_TX_FAULT_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_TX_FAULT_16_23] = {CPLD_SFP_INTR_TX_FAULT_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_TX_FAULT_24_31] = {CPLD_SFP_INTR_TX_FAULT_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_TX_FAULT_32_39] = {CPLD_SFP_INTR_TX_FAULT_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_TX_FAULT_40_47] = {CPLD_SFP_INTR_TX_FAULT_40_47_REG, MASK_ALL, PERM_R}, + + [CPLD_SFP_MASK_RX_LOS_0_7] = {CPLD_SFP_MASK_RX_LOS_0_7_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_RX_LOS_8_15] = {CPLD_SFP_MASK_RX_LOS_8_15_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_RX_LOS_16_23] = {CPLD_SFP_MASK_RX_LOS_16_23_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_RX_LOS_24_31] = {CPLD_SFP_MASK_RX_LOS_24_31_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_RX_LOS_32_39] = {CPLD_SFP_MASK_RX_LOS_32_39_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_RX_LOS_40_47] = {CPLD_SFP_MASK_RX_LOS_40_47_REG, MASK_ALL, PERM_RW}, + + [CPLD_SFP_MASK_TX_FAULT_0_7] = {CPLD_SFP_MASK_TX_FAULT_0_7_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_TX_FAULT_8_15] = {CPLD_SFP_MASK_TX_FAULT_8_15_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_TX_FAULT_16_23] = {CPLD_SFP_MASK_TX_FAULT_16_23_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_TX_FAULT_24_31] = {CPLD_SFP_MASK_TX_FAULT_24_31_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_TX_FAULT_32_39] = {CPLD_SFP_MASK_TX_FAULT_32_39_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_TX_FAULT_40_47] = {CPLD_SFP_MASK_TX_FAULT_40_47_REG, MASK_ALL, PERM_RW}, + + [CPLD_SFP_EVT_RX_LOS_0_7] = {CPLD_SFP_EVT_RX_LOS_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_RX_LOS_8_15] = {CPLD_SFP_EVT_RX_LOS_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_RX_LOS_16_23] = {CPLD_SFP_EVT_RX_LOS_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_RX_LOS_24_31] = {CPLD_SFP_EVT_RX_LOS_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_RX_LOS_32_39] = {CPLD_SFP_EVT_RX_LOS_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_RX_LOS_40_47] = {CPLD_SFP_EVT_RX_LOS_40_47_REG, MASK_ALL, PERM_R}, + + [CPLD_SFP_EVT_TX_FAULT_0_7] = {CPLD_SFP_EVT_TX_FAULT_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_TX_FAULT_8_15] = {CPLD_SFP_EVT_TX_FAULT_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_TX_FAULT_16_23] = {CPLD_SFP_EVT_TX_FAULT_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_TX_FAULT_24_31] = {CPLD_SFP_EVT_TX_FAULT_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_TX_FAULT_32_39] = {CPLD_SFP_EVT_TX_FAULT_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_TX_FAULT_40_47] = {CPLD_SFP_EVT_TX_FAULT_40_47_REG, MASK_ALL, PERM_R}, + + [CPLD_SFP_TX_DISABLE_0_7] = {CPLD_SFP_TX_DISABLE_0_7_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_TX_DISABLE_8_15] = {CPLD_SFP_TX_DISABLE_8_15_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_TX_DISABLE_16_23] = {CPLD_SFP_TX_DISABLE_16_23_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_TX_DISABLE_24_31] = {CPLD_SFP_TX_DISABLE_24_31_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_TX_DISABLE_32_39] = {CPLD_SFP_TX_DISABLE_32_39_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_TX_DISABLE_40_47] = {CPLD_SFP_TX_DISABLE_40_47_REG, MASK_ALL, PERM_RW}, + + [CPLD_QSFP_RESET_48_53] = {CPLD_QSFP_RESET_48_53_REG, MASK_ALL, PERM_RW}, + [CPLD_QSFP_LPMODE_48_53] = {CPLD_QSFP_LPMODE_48_53_REG, MASK_ALL, PERM_RW}, + + //debug interrupt status + [DBG_CPLD_SFP_INTR_PRESENT_0_7] = {DBG_CPLD_SFP_INTR_PRESENT_0_7_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_PRESENT_8_15] = {DBG_CPLD_SFP_INTR_PRESENT_8_15_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_PRESENT_16_23] = {DBG_CPLD_SFP_INTR_PRESENT_16_23_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_PRESENT_24_31] = {DBG_CPLD_SFP_INTR_PRESENT_24_31_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_PRESENT_32_39] = {DBG_CPLD_SFP_INTR_PRESENT_32_39_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_PRESENT_40_47] = {DBG_CPLD_SFP_INTR_PRESENT_40_47_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_QSFP_INTR_PRESENT_48_53] = {DBG_CPLD_QSFP_INTR_PRESENT_48_53_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_QSFP_INTR_PORT_48_53] = {DBG_CPLD_QSFP_INTR_PORT_48_53_REG, MASK_ALL, PERM_R}, + + //debug interrupt mask + [DBG_CPLD_SFP_INTR_RX_LOS_0_7] = {DBG_CPLD_SFP_INTR_RX_LOS_0_7_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_RX_LOS_8_15] = {DBG_CPLD_SFP_INTR_RX_LOS_8_15_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_RX_LOS_16_23] = {DBG_CPLD_SFP_INTR_RX_LOS_16_23_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_RX_LOS_24_31] = {DBG_CPLD_SFP_INTR_RX_LOS_24_31_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_RX_LOS_32_39] = {DBG_CPLD_SFP_INTR_RX_LOS_32_39_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_RX_LOS_40_47] = {DBG_CPLD_SFP_INTR_RX_LOS_40_47_REG, MASK_ALL, PERM_R}, + + [DBG_CPLD_SFP_INTR_TX_FAULT_0_7] = {DBG_CPLD_SFP_INTR_TX_FAULT_0_7_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_TX_FAULT_8_15] = {DBG_CPLD_SFP_INTR_TX_FAULT_8_15_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_TX_FAULT_16_23] = {DBG_CPLD_SFP_INTR_TX_FAULT_16_23_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_TX_FAULT_24_31] = {DBG_CPLD_SFP_INTR_TX_FAULT_24_31_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_TX_FAULT_32_39] = {DBG_CPLD_SFP_INTR_TX_FAULT_32_39_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_TX_FAULT_40_47] = {DBG_CPLD_SFP_INTR_TX_FAULT_40_47_REG, MASK_ALL, PERM_R}, +}; + +/* CPLD device id and data */ +static const struct i2c_device_id cpld_id[] = { + { "s7801_54xs_cpld1", cpld1 }, + { "s7801_54xs_cpld2", cpld2 }, + {} +}; + +char bsp_debug[2]="0"; +u8 enable_log_read=LOG_DISABLE; +u8 enable_log_write=LOG_DISABLE; + +/* Addresses scanned for cpld */ +static const unsigned short cpld_i2c_addr[] = { 0x30, 0x31, I2C_CLIENT_END }; + +/* define all support register access of cpld in attribute */ + +// CPLD common +static _SENSOR_DEVICE_ATTR_RO(cpld_board_id_0, cpld_callback, CPLD_BOARD_ID_0); +static _SENSOR_DEVICE_ATTR_RO(cpld_board_id_1, cpld_callback, CPLD_BOARD_ID_1); +static _SENSOR_DEVICE_ATTR_RO(cpld_id, cpld_callback, CPLD_ID); +static _SENSOR_DEVICE_ATTR_RO(cpld_chip, cpld_callback, CPLD_CHIP); +static _SENSOR_DEVICE_ATTR_RO(cpld_sku_ext, cpld_callback, CPLD_SKU_EXT); + +static _SENSOR_DEVICE_ATTR_RO(cpld_major_ver, cpld_callback, CPLD_MAJOR_VER); +static _SENSOR_DEVICE_ATTR_RO(cpld_minor_ver, cpld_callback, CPLD_MINOR_VER); +static _SENSOR_DEVICE_ATTR_RO(cpld_build_ver, cpld_callback, CPLD_BUILD_VER); +static _SENSOR_DEVICE_ATTR_RO(cpld_version_h, cpld_version_h, CPLD_VERSION_H); + +static _SENSOR_DEVICE_ATTR_RW(cpld_evt_ctrl, cpld_callback, CPLD_EVT_CTRL); + +//CPLD 1 +static _SENSOR_DEVICE_ATTR_RO(cpld_mac_intr, cpld_callback, CPLD_MAC_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_hwm_intr, cpld_callback, CPLD_HWM_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_cpld2_intr, cpld_callback, CPLD_CPLD2_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_ntm_intr, cpld_callback, CPLD_NTM_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_fan_psu_intr, cpld_callback, CPLD_FAN_PSU_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_ioexp_intr, cpld_callback, CPLD_SFP_IOEXP_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_cpu_nmi_intr, cpld_callback, CPLD_CPU_NMI_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_ptp_intr, cpld_callback, CPLD_PTP_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_system_intr, cpld_callback, CPLD_SYSTEM_INTR); + +static _SENSOR_DEVICE_ATTR_RW(cpld_mac_mask, cpld_callback, CPLD_MAC_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_hwm_mask, cpld_callback, CPLD_HWM_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_cpld2_mask, cpld_callback, CPLD_CPLD2_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_ntm_mask, cpld_callback, CPLD_NTM_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_fan_psu_mask, cpld_callback, CPLD_FAN_PSU_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_ioexp_mask, cpld_callback, CPLD_SFP_IOEXP_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_cpu_nmi_mask, cpld_callback, CPLD_CPU_NMI_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_ptp_mask, cpld_callback, CPLD_PTP_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_mask, cpld_callback, CPLD_SYSTEM_MASK); + +static _SENSOR_DEVICE_ATTR_RO(cpld_mac_evt, cpld_callback, CPLD_MAC_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_hwm_evt, cpld_callback, CPLD_HWM_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_cpld2_evt, cpld_callback, CPLD_CPLD2_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_ntm_evt, cpld_callback, CPLD_NTM_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_fan_psu_evt, cpld_callback, CPLD_FAN_PSU_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_ioexp_evt, cpld_callback, CPLD_SFP_IOEXP_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_cpu_nmi_evt, cpld_callback, CPLD_CPU_NMI_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_ptp_evt, cpld_callback, CPLD_PTP_EVT); + +static _SENSOR_DEVICE_ATTR_RW(cpld_mac_reset, cpld_callback, CPLD_MAC_RESET); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_reset, cpld_callback, CPLD_SYSTEM_RESET); +static _SENSOR_DEVICE_ATTR_RW(cpld_bmc_ntm_reset, cpld_callback, CPLD_BMC_NTM_RESET); +static _SENSOR_DEVICE_ATTR_RW(cpld_usb_reset, cpld_callback, CPLD_USB_RESET); +static _SENSOR_DEVICE_ATTR_RW(cpld_i2c_mux_reset, cpld_callback, CPLD_I2C_MUX_RESET); +static _SENSOR_DEVICE_ATTR_RW(cpld_i2c_mux_reset_2, cpld_callback, CPLD_I2C_MUX_RESET_2); +static _SENSOR_DEVICE_ATTR_RW(cpld_misc_reset, cpld_callback, CPLD_MISC_RESET); + +static _SENSOR_DEVICE_ATTR_RO(cpld_psu_status, cpld_callback, CPLD_PSU_STATUS); +static _SENSOR_DEVICE_ATTR_RO(cpld_mac_synce, cpld_callback, CPLD_MAC_SYNCE); +static _SENSOR_DEVICE_ATTR_RO(cpld_fan_present, cpld_callback, CPLD_FAN_PRESENT); +static _SENSOR_DEVICE_ATTR_RW(cpld_mux_ctrl, cpld_callback, CPLD_MUX_CTRL); + +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_sync, cpld_callback, CPLD_SYSTEM_LED_SYNC); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_sys, cpld_callback, CPLD_SYSTEM_LED_SYS); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_fan, cpld_callback, CPLD_SYSTEM_LED_FAN); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_psu_0, cpld_callback, CPLD_SYSTEM_LED_PSU_0); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_psu_1, cpld_callback, CPLD_SYSTEM_LED_PSU_1); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_id, cpld_callback, CPLD_SYSTEM_LED_ID); + +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_mac_intr, cpld_callback, DBG_CPLD_MAC_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_hwm_intr, cpld_callback, DBG_CPLD_HWM_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_cpld2_intr, cpld_callback, DBG_CPLD_CPLD2_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_ntm_intr, cpld_callback, DBG_CPLD_NTM_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_fan_psu_intr, cpld_callback, DBG_CPLD_FAN_PSU_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_ioexp_intr, cpld_callback, DBG_CPLD_SFP_IOEXP_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_ptp_intr, cpld_callback, DBG_CPLD_PTP_INTR); + +//CPLD 2 +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_0_7, cpld_callback, CPLD_SFP_INTR_PRESENT_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_8_15, cpld_callback, CPLD_SFP_INTR_PRESENT_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_16_23, cpld_callback, CPLD_SFP_INTR_PRESENT_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_24_31, cpld_callback, CPLD_SFP_INTR_PRESENT_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_32_39, cpld_callback, CPLD_SFP_INTR_PRESENT_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_40_47, cpld_callback, CPLD_SFP_INTR_PRESENT_40_47); + +static _SENSOR_DEVICE_ATTR_RO(cpld_qsfp_intr_present_48_53, cpld_callback, CPLD_QSFP_INTR_PRESENT_48_53); +static _SENSOR_DEVICE_ATTR_RO(cpld_qsfp_intr_port_48_53, cpld_callback, CPLD_QSFP_INTR_PORT_48_53); + +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_0_7, cpld_callback, CPLD_SFP_MASK_PRESENT_0_7); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_8_15, cpld_callback, CPLD_SFP_MASK_PRESENT_8_15); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_16_23, cpld_callback, CPLD_SFP_MASK_PRESENT_16_23); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_24_31, cpld_callback, CPLD_SFP_MASK_PRESENT_24_31); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_32_39, cpld_callback, CPLD_SFP_MASK_PRESENT_32_39); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_40_47, cpld_callback, CPLD_SFP_MASK_PRESENT_40_47); + +static _SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_present_48_53, cpld_callback, CPLD_QSFP_MASK_PRESENT_48_53); +static _SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_port_48_53, cpld_callback, CPLD_QSFP_MASK_PORT_48_53); + +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_0_7, cpld_callback, CPLD_SFP_EVT_PRESENT_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_8_15, cpld_callback, CPLD_SFP_EVT_PRESENT_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_16_23, cpld_callback, CPLD_SFP_EVT_PRESENT_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_24_31, cpld_callback, CPLD_SFP_EVT_PRESENT_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_32_39, cpld_callback, CPLD_SFP_EVT_PRESENT_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_40_47, cpld_callback, CPLD_SFP_EVT_PRESENT_40_47); + +static _SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_present_48_53, cpld_callback, CPLD_QSFP_EVT_PRESENT_48_53); +static _SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_port_48_53, cpld_callback, CPLD_QSFP_EVT_PORT_48_53); + +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_0_7, cpld_callback, CPLD_SFP_INTR_RX_LOS_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_8_15, cpld_callback, CPLD_SFP_INTR_RX_LOS_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_16_23, cpld_callback, CPLD_SFP_INTR_RX_LOS_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_24_31, cpld_callback, CPLD_SFP_INTR_RX_LOS_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_32_39, cpld_callback, CPLD_SFP_INTR_RX_LOS_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_40_47, cpld_callback, CPLD_SFP_INTR_RX_LOS_40_47); + +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_0_7, cpld_callback, CPLD_SFP_INTR_TX_FAULT_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_8_15, cpld_callback, CPLD_SFP_INTR_TX_FAULT_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_16_23, cpld_callback, CPLD_SFP_INTR_TX_FAULT_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_24_31, cpld_callback, CPLD_SFP_INTR_TX_FAULT_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_32_39, cpld_callback, CPLD_SFP_INTR_TX_FAULT_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_40_47, cpld_callback, CPLD_SFP_INTR_TX_FAULT_40_47); + +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_0_7, cpld_callback, CPLD_SFP_MASK_RX_LOS_0_7); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_8_15, cpld_callback, CPLD_SFP_MASK_RX_LOS_8_15); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_16_23, cpld_callback, CPLD_SFP_MASK_RX_LOS_16_23); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_24_31, cpld_callback, CPLD_SFP_MASK_RX_LOS_24_31); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_32_39, cpld_callback, CPLD_SFP_MASK_RX_LOS_32_39); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_40_47, cpld_callback, CPLD_SFP_MASK_RX_LOS_40_47); + +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_0_7, cpld_callback, CPLD_SFP_MASK_TX_FAULT_0_7); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_8_15, cpld_callback, CPLD_SFP_MASK_TX_FAULT_8_15); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_16_23, cpld_callback, CPLD_SFP_MASK_TX_FAULT_16_23); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_24_31, cpld_callback, CPLD_SFP_MASK_TX_FAULT_24_31); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_32_39, cpld_callback, CPLD_SFP_MASK_TX_FAULT_32_39); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_40_47, cpld_callback, CPLD_SFP_MASK_TX_FAULT_40_47); + +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_0_7, cpld_callback, CPLD_SFP_EVT_RX_LOS_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_8_15, cpld_callback, CPLD_SFP_EVT_RX_LOS_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_16_23, cpld_callback, CPLD_SFP_EVT_RX_LOS_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_24_31, cpld_callback, CPLD_SFP_EVT_RX_LOS_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_32_39, cpld_callback, CPLD_SFP_EVT_RX_LOS_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_40_47, cpld_callback, CPLD_SFP_EVT_RX_LOS_40_47); + +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_0_7, cpld_callback, CPLD_SFP_EVT_TX_FAULT_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_8_15, cpld_callback, CPLD_SFP_EVT_TX_FAULT_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_16_23, cpld_callback, CPLD_SFP_EVT_TX_FAULT_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_24_31, cpld_callback, CPLD_SFP_EVT_TX_FAULT_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_32_39, cpld_callback, CPLD_SFP_EVT_TX_FAULT_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_40_47, cpld_callback, CPLD_SFP_EVT_TX_FAULT_40_47); + +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_0_7, cpld_callback, CPLD_SFP_TX_DISABLE_0_7); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_8_15, cpld_callback, CPLD_SFP_TX_DISABLE_8_15); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_16_23, cpld_callback, CPLD_SFP_TX_DISABLE_16_23); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_24_31, cpld_callback, CPLD_SFP_TX_DISABLE_24_31); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_32_39, cpld_callback, CPLD_SFP_TX_DISABLE_32_39); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_40_47, cpld_callback, CPLD_SFP_TX_DISABLE_40_47); + +static _SENSOR_DEVICE_ATTR_RW(cpld_qsfp_reset_48_53, cpld_callback, CPLD_QSFP_RESET_48_53); +static _SENSOR_DEVICE_ATTR_RW(cpld_qsfp_lpmode_48_53, cpld_callback, CPLD_QSFP_LPMODE_48_53); + +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_0_7, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_0_7); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_8_15, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_8_15); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_16_23, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_16_23); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_24_31, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_24_31); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_32_39, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_32_39); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_40_47, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_40_47); + +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_qsfp_intr_present_48_53, cpld_callback, DBG_CPLD_QSFP_INTR_PRESENT_48_53); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_qsfp_intr_port_48_53, cpld_callback, DBG_CPLD_QSFP_INTR_PORT_48_53); + +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_0_7, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_0_7); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_8_15, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_8_15); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_16_23, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_16_23); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_24_31, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_24_31); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_32_39, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_32_39); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_40_47, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_40_47); + +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_0_7, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_0_7); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_8_15, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_8_15); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_16_23, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_16_23); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_24_31, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_24_31); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_32_39, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_32_39); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_40_47, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_40_47); + +//BSP DEBUG +static _SENSOR_DEVICE_ATTR_RW(bsp_debug, bsp_callback, BSP_DEBUG); + +/* define support attributes of cpldx */ + +/* cpld 1 */ +static struct attribute *cpld1_attributes[] = { + _DEVICE_ATTR(cpld_board_id_0), + _DEVICE_ATTR(cpld_board_id_1), + + _DEVICE_ATTR(cpld_id), + _DEVICE_ATTR(cpld_chip), + _DEVICE_ATTR(cpld_sku_ext), + + _DEVICE_ATTR(cpld_major_ver), + _DEVICE_ATTR(cpld_minor_ver), + _DEVICE_ATTR(cpld_build_ver), + _DEVICE_ATTR(cpld_version_h), + + _DEVICE_ATTR(cpld_mac_intr), + _DEVICE_ATTR(cpld_hwm_intr), + _DEVICE_ATTR(cpld_cpld2_intr), + _DEVICE_ATTR(cpld_ntm_intr), + _DEVICE_ATTR(cpld_fan_psu_intr), + _DEVICE_ATTR(cpld_sfp_ioexp_intr), + _DEVICE_ATTR(cpld_cpu_nmi_intr), + _DEVICE_ATTR(cpld_ptp_intr), + _DEVICE_ATTR(cpld_system_intr), + + _DEVICE_ATTR(cpld_mac_mask), + _DEVICE_ATTR(cpld_hwm_mask), + _DEVICE_ATTR(cpld_cpld2_mask), + _DEVICE_ATTR(cpld_ntm_mask), + _DEVICE_ATTR(cpld_fan_psu_mask), + _DEVICE_ATTR(cpld_sfp_ioexp_mask), + _DEVICE_ATTR(cpld_cpu_nmi_mask), + _DEVICE_ATTR(cpld_ptp_mask), + _DEVICE_ATTR(cpld_system_mask), + + _DEVICE_ATTR(cpld_mac_evt), + _DEVICE_ATTR(cpld_hwm_evt), + _DEVICE_ATTR(cpld_cpld2_evt), + _DEVICE_ATTR(cpld_ntm_evt), + _DEVICE_ATTR(cpld_fan_psu_evt), + _DEVICE_ATTR(cpld_sfp_ioexp_evt), + _DEVICE_ATTR(cpld_cpu_nmi_evt), + _DEVICE_ATTR(cpld_ptp_evt), + + _DEVICE_ATTR(cpld_evt_ctrl), + + _DEVICE_ATTR(cpld_mac_reset), + _DEVICE_ATTR(cpld_system_reset), + _DEVICE_ATTR(cpld_bmc_ntm_reset), + _DEVICE_ATTR(cpld_usb_reset), + _DEVICE_ATTR(cpld_i2c_mux_reset), + _DEVICE_ATTR(cpld_i2c_mux_reset_2), + _DEVICE_ATTR(cpld_misc_reset), + + _DEVICE_ATTR(cpld_psu_status), + _DEVICE_ATTR(cpld_mac_synce), + _DEVICE_ATTR(cpld_fan_present), + _DEVICE_ATTR(cpld_mux_ctrl), + + _DEVICE_ATTR(cpld_system_led_sync), + _DEVICE_ATTR(cpld_system_led_sys), + _DEVICE_ATTR(cpld_system_led_fan), + _DEVICE_ATTR(cpld_system_led_psu_0), + _DEVICE_ATTR(cpld_system_led_psu_1), + _DEVICE_ATTR(cpld_system_led_id), + + _DEVICE_ATTR(dbg_cpld_mac_intr), + _DEVICE_ATTR(dbg_cpld_hwm_intr), + _DEVICE_ATTR(dbg_cpld_cpld2_intr), + _DEVICE_ATTR(dbg_cpld_ntm_intr), + _DEVICE_ATTR(dbg_cpld_fan_psu_intr), + _DEVICE_ATTR(dbg_cpld_sfp_ioexp_intr), + _DEVICE_ATTR(dbg_cpld_ptp_intr), + + _DEVICE_ATTR(bsp_debug), + + NULL +}; + +/* cpld 2 */ +static struct attribute *cpld2_attributes[] = { + _DEVICE_ATTR(cpld_id), + _DEVICE_ATTR(cpld_chip), + + _DEVICE_ATTR(cpld_major_ver), + _DEVICE_ATTR(cpld_minor_ver), + _DEVICE_ATTR(cpld_build_ver), + _DEVICE_ATTR(cpld_version_h), + + _DEVICE_ATTR(cpld_sfp_intr_present_0_7), + _DEVICE_ATTR(cpld_sfp_intr_present_8_15), + _DEVICE_ATTR(cpld_sfp_intr_present_16_23), + _DEVICE_ATTR(cpld_sfp_intr_present_24_31), + _DEVICE_ATTR(cpld_sfp_intr_present_32_39), + _DEVICE_ATTR(cpld_sfp_intr_present_40_47), + + _DEVICE_ATTR(cpld_qsfp_intr_present_48_53), + _DEVICE_ATTR(cpld_qsfp_intr_port_48_53), + + _DEVICE_ATTR(cpld_sfp_mask_present_0_7), + _DEVICE_ATTR(cpld_sfp_mask_present_8_15), + _DEVICE_ATTR(cpld_sfp_mask_present_16_23), + _DEVICE_ATTR(cpld_sfp_mask_present_24_31), + _DEVICE_ATTR(cpld_sfp_mask_present_32_39), + _DEVICE_ATTR(cpld_sfp_mask_present_40_47), + + _DEVICE_ATTR(cpld_qsfp_mask_present_48_53), + _DEVICE_ATTR(cpld_qsfp_mask_port_48_53), + + _DEVICE_ATTR(cpld_sfp_evt_present_0_7), + _DEVICE_ATTR(cpld_sfp_evt_present_8_15), + _DEVICE_ATTR(cpld_sfp_evt_present_16_23), + _DEVICE_ATTR(cpld_sfp_evt_present_24_31), + _DEVICE_ATTR(cpld_sfp_evt_present_32_39), + _DEVICE_ATTR(cpld_sfp_evt_present_40_47), + + _DEVICE_ATTR(cpld_qsfp_evt_present_48_53), + _DEVICE_ATTR(cpld_qsfp_evt_port_48_53), + + _DEVICE_ATTR(cpld_evt_ctrl), + + _DEVICE_ATTR(cpld_sfp_intr_rx_los_0_7), + _DEVICE_ATTR(cpld_sfp_intr_rx_los_8_15), + _DEVICE_ATTR(cpld_sfp_intr_rx_los_16_23), + _DEVICE_ATTR(cpld_sfp_intr_rx_los_24_31), + _DEVICE_ATTR(cpld_sfp_intr_rx_los_32_39), + _DEVICE_ATTR(cpld_sfp_intr_rx_los_40_47), + + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_0_7), + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_8_15), + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_16_23), + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_24_31), + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_32_39), + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_40_47), + + _DEVICE_ATTR(cpld_sfp_mask_rx_los_0_7), + _DEVICE_ATTR(cpld_sfp_mask_rx_los_8_15), + _DEVICE_ATTR(cpld_sfp_mask_rx_los_16_23), + _DEVICE_ATTR(cpld_sfp_mask_rx_los_24_31), + _DEVICE_ATTR(cpld_sfp_mask_rx_los_32_39), + _DEVICE_ATTR(cpld_sfp_mask_rx_los_40_47), + + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_0_7), + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_8_15), + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_16_23), + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_24_31), + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_32_39), + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_40_47), + + _DEVICE_ATTR(cpld_sfp_evt_rx_los_0_7), + _DEVICE_ATTR(cpld_sfp_evt_rx_los_8_15), + _DEVICE_ATTR(cpld_sfp_evt_rx_los_16_23), + _DEVICE_ATTR(cpld_sfp_evt_rx_los_24_31), + _DEVICE_ATTR(cpld_sfp_evt_rx_los_32_39), + _DEVICE_ATTR(cpld_sfp_evt_rx_los_40_47), + + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_0_7), + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_8_15), + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_16_23), + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_24_31), + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_32_39), + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_40_47), + + _DEVICE_ATTR(cpld_sfp_tx_disable_0_7), + _DEVICE_ATTR(cpld_sfp_tx_disable_8_15), + _DEVICE_ATTR(cpld_sfp_tx_disable_16_23), + _DEVICE_ATTR(cpld_sfp_tx_disable_24_31), + _DEVICE_ATTR(cpld_sfp_tx_disable_32_39), + _DEVICE_ATTR(cpld_sfp_tx_disable_40_47), + + _DEVICE_ATTR(cpld_qsfp_reset_48_53), + _DEVICE_ATTR(cpld_qsfp_lpmode_48_53), + + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_0_7), + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_8_15), + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_16_23), + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_24_31), + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_32_39), + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_40_47), + + _DEVICE_ATTR(dbg_cpld_qsfp_intr_present_48_53), + _DEVICE_ATTR(dbg_cpld_qsfp_intr_port_48_53), + + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_0_7), + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_8_15), + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_16_23), + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_24_31), + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_32_39), + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_40_47), + + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_0_7), + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_8_15), + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_16_23), + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_24_31), + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_32_39), + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_40_47), + + NULL +}; + +/* cpld 1 attributes group */ +static const struct attribute_group cpld1_group = { + .attrs = cpld1_attributes, +}; + +/* cpld 2 attributes group */ +static const struct attribute_group cpld2_group = { + .attrs = cpld2_attributes, +}; + +/* reg shift */ +static u8 _shift(u8 mask) +{ + int i=0, mask_one=1; + + for(i=0; i<8; ++i) { + if ((mask & mask_one) == 1) + return i; + else + mask >>= 1; + } + + return -1; +} + +/* reg mask and shift */ +static u8 _mask_shift(u8 val, u8 mask) +{ + int shift=0; + + shift = _shift(mask); + + return (val & mask) >> shift; +} + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if ((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write)) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + len=sprintf(buf, "%s", str); + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + snprintf(str, str_len, "%s", buf); + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + + switch (attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + ssize_t ret = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(str); + ret = write_bsp(buf, str, str_len, count); + + if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + return ret; + default: + return -EINVAL; + } + return 0; +} + +/* get cpld register value */ +static ssize_t read_cpld_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + u8 mask = MASK_ALL; + + if (IS_PERM_R(sysfs_info[attr->index].permission)) { + reg = sysfs_info[attr->index].reg; + mask = sysfs_info[attr->index].mask; + } else { + dev_err(dev, "%s() error, attr->index=%d\n", __func__, attr->index); + return -EINVAL; + } + + return read_cpld_reg(dev, buf, reg, mask); +} + +/* set cpld register value */ +static ssize_t write_cpld_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + u8 mask = MASK_ALL; + + if (IS_PERM_W(sysfs_info[attr->index].permission)) { + reg = sysfs_info[attr->index].reg; + mask = sysfs_info[attr->index].mask; + } else { + dev_err(dev, "%s() error, attr->index=%d\n", __func__, attr->index); + return -EINVAL; + } + + return write_cpld_reg(dev, buf, count, reg, mask); +} + +/* get cpld register value */ +static u8 _read_cpld_reg(struct device *dev, + u8 reg, + u8 mask) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int reg_val; + + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + + if (unlikely(reg_val < 0)) { + return reg_val; + } else { + reg_val=_mask_shift(reg_val, mask); + return reg_val; + } +} + +/* get cpld register value */ +static ssize_t read_cpld_reg(struct device *dev, + char *buf, + u8 reg, + u8 mask) +{ + int reg_val; + + reg_val = _read_cpld_reg(dev, reg, mask); + if (unlikely(reg_val < 0)) { + dev_err(dev, "read_cpld_reg() error, reg_val=%d\n", reg_val); + return reg_val; + } else { + return sprintf(buf, "0x%02x\n", reg_val); + } +} + +/* set cpld register value */ +static ssize_t write_cpld_reg(struct device *dev, + const char *buf, + size_t count, + u8 reg, + u8 mask) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg_val, reg_val_now, shift; + int ret = 0; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + //apply continuous bits operation if mask is specified, discontinuous bits are not supported + if (mask != MASK_ALL) { + reg_val_now = _read_cpld_reg(dev, reg, MASK_ALL); + if (unlikely(reg_val_now < 0)) { + dev_err(dev, "write_cpld_reg() error, reg_val_now=%d\n", reg_val_now); + return reg_val_now; + } else { + //clear bits in reg_val_now by the mask + reg_val_now &= ~mask; + //get bit shift by the mask + shift = _shift(mask); + //calculate new reg_val + reg_val = reg_val_now | (reg_val << shift); + } + } + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + + if (unlikely(ret < 0)) { + dev_err(dev, "write_cpld_reg() error, return=%d\n", ret); + return ret; + } + + return count; +} + +/* get qsfp port config register value */ +static ssize_t read_cpld_version_h(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + if (attr->index >= CPLD_VERSION_H) { + return sprintf(buf, "%d.%02d.%03d", + _read_cpld_reg(dev, CPLD_VERSION_REG, MASK_CPLD_MAJOR_VER), + _read_cpld_reg(dev, CPLD_VERSION_REG, MASK_CPLD_MINOR_VER), + _read_cpld_reg(dev, CPLD_BUILD_REG, MASK_ALL)); + } + return -1; +} + +/* add valid cpld client to list */ +static void cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = NULL; + + node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + if (!node) { + dev_info(&client->dev, + "Can't allocate cpld_client_node for index %d\n", + client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +/* remove exist cpld client in list */ +static void cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + mutex_unlock(&list_lock); +} + +/* cpld drvier probe */ +static int cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct cpld_data *data = NULL; + int ret = -EPERM; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* init cpld data for client */ + i2c_set_clientdata(client, data); + mutex_init(&data->access_lock); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_info(&client->dev, + "i2c_check_functionality failed (0x%x)\n", + client->addr); + status = -EIO; + goto exit; + } + + /* get cpld id from device */ + ret = i2c_smbus_read_byte_data(client, CPLD_ID_REG); + + if (ret < 0) { + dev_info(&client->dev, + "fail to get cpld id (0x%x) at addr (0x%x)\n", + CPLD_ID_REG, client->addr); + status = -EIO; + goto exit; + } + + if (INVALID(ret, cpld1, cpld2)) { + dev_info(&client->dev, + "cpld id %d(device) not valid\n", ret); + //status = -EPERM; + //goto exit; + } + +#if 0 + /* change client name for each cpld with index */ + snprintf(client->name, sizeof(client->name), "%s_%d", client->name, + data->index); +#endif + + data->index = dev_id->driver_data; + + /* register sysfs hooks for different cpld group */ + dev_info(&client->dev, "probe cpld with index %d\n", data->index); + switch (data->index) { + case cpld1: + status = sysfs_create_group(&client->dev.kobj, + &cpld1_group); + break; + case cpld2: + status = sysfs_create_group(&client->dev.kobj, + &cpld2_group); + break; + default: + status = -EINVAL; + } + + if (status) + goto exit; + + dev_info(&client->dev, "chip found\n"); + + /* add probe chip to client list */ + cpld_add_client(client); + + return 0; +exit: + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &cpld2_group); + break; + default: + break; + } + return status; +} + +/* cpld drvier remove */ +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &cpld2_group); + break; + } + + cpld_remove_client(client); + return 0; +} + +static int s7801_54xs_cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int retry = I2C_RW_RETRY_COUNT; + int reg_val = 0; + struct cpld_data *data = i2c_get_clientdata(client); + + while (retry) { + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (unlikely(reg_val < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + + if (retry == 0) { + dev_err(&client->dev, "%s() retry %d times but still failed, reg=%x\n", __func__, I2C_RW_RETRY_COUNT, reg); + } + + continue; + } + + break; + } + + return reg_val; +} + +static int s7801_54xs_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value) +{ + int ret = 0, retry = I2C_RW_RETRY_COUNT; + struct cpld_data *data = i2c_get_clientdata(client); + + while (retry) { + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, value); + if (unlikely(ret < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + + if (retry == 0) { + dev_err(&client->dev, "%s() retry %d times but still failed, reg=%x\n", __func__, I2C_RW_RETRY_COUNT, reg); + } + + continue; + } + break; + } + + return ret; +} + +/* +int s7801_54xs_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = s7801_54xs_cpld_write_internal(cpld_node->client, reg, value); + break; + } else { + pr_err("cpld_node->client->addr=%x, cpld_addr=%x\n", cpld_node->client->addr, cpld_addr); + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(s7801_54xs_cpld_write); +*/ + +int s7801_54xs_cpld_psu_mux_sel(u8 mux_sel) +{ + unsigned short cpld_addr = cpld_i2c_addr[0]; + u8 reg = CPLD_MUX_CTRL_REG; + u8 reg_val = 0; + u8 psu_mux_mask = 0x06; + u8 mux_sel_val = 0; + + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + switch(mux_sel) { + case 0: + //psu 0 + mux_sel_val = 0x04; + break; + case 1: + //psu 1 + mux_sel_val = 0x02; + break; + default: + //bmc + mux_sel_val = psu_mux_mask; + break; + } + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + //read current reg value + reg_val = s7801_54xs_cpld_read_internal(cpld_node->client, reg); + //clear psu_mux_sel bits (bit 1 and 2) + reg_val &= ~psu_mux_mask; + //modify psu_mux_sel bits (bit 1 and 2) + reg_val |= mux_sel_val; + //write reg value + s7801_54xs_cpld_write_internal(cpld_node->client, reg, reg_val); + + break; + } else { + pr_err("cpld_node->client->addr=%x, cpld_addr=%x\n", cpld_node->client->addr, cpld_addr); + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(s7801_54xs_cpld_psu_mux_sel); + +MODULE_DEVICE_TABLE(i2c, cpld_id); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "x86_64_ufispace_s7801_54xs_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_id, + .address_list = cpld_i2c_addr, +}; + +static int __init cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&cpld_driver); +} + +static void __exit cpld_exit(void) +{ + i2c_del_driver(&cpld_driver); +} + +MODULE_AUTHOR("Jason Tsai "); +MODULE_DESCRIPTION("x86_64_ufispace_s7801_54xs_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(cpld_init); +module_exit(cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.h b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.h new file mode 100644 index 000000000000..3e9c457095cc --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-cpld.h @@ -0,0 +1,269 @@ +/* header file for i2c cpld driver of ufispace_s7801_54xs + * + * Copyright (C) 2022 UfiSpace Technology Corporation. + * Jason Tsai + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef UFISPACE_s7801_54xs_CPLD_H +#define UFISPACE_s7801_54xs_CPLD_H + +/* CPLD device index value */ +enum cpld_id { + cpld1, + cpld2 +}; + +/* CPLD common registers */ +#define CPLD_VERSION_REG 0x02 +#define CPLD_ID_REG 0x03 +#define CPLD_BUILD_REG 0x04 +#define CPLD_CHIP_REG 0x05 + +#define CPLD_EVT_CTRL_REG 0x3F + +/* CPLD 1 registers */ +#define CPLD_BOARD_ID_0_REG 0x00 +#define CPLD_BOARD_ID_1_REG 0x01 +#define CPLD_SKU_EXT_REG 0x06 + +#define CPLD_MAC_INTR_REG 0x10 +#define CPLD_HWM_INTR_REG 0x13 +#define CPLD_CPLD2_INTR_REG 0x14 +#define CPLD_NTM_INTR_REG 0x15 +#define CPLD_FAN_PSU_INTR_REG 0x16 +#define CPLD_SFP_IOEXP_INTR_REG 0x18 +#define CPLD_CPU_NMI_INTR_REG 0x19 +#define CPLD_PTP_INTR_REG 0x1B +#define CPLD_SYSTEM_INTR_REG 0x1C + +#define CPLD_MAC_MASK_REG 0x20 +#define CPLD_HWM_MASK_REG 0x23 +#define CPLD_CPLD2_MASK_REG 0x24 +#define CPLD_NTM_MASK_REG 0x25 +#define CPLD_FAN_PSU_MASK_REG 0x26 +#define CPLD_SFP_IOEXP_MASK_REG 0x28 +#define CPLD_CPU_NMI_MASK_REG 0x29 +#define CPLD_PTP_MASK_REG 0x2B +#define CPLD_SYSTEM_MASK_REG 0x2C + +#define CPLD_MAC_EVT_REG 0x30 +#define CPLD_HWM_EVT_REG 0x33 +#define CPLD_CPLD2_EVT_REG 0x34 +#define CPLD_NTM_EVT_REG 0x35 +#define CPLD_FAN_PSU_EVT_REG 0x36 +#define CPLD_SFP_IOEXP_EVT_REG 0x38 +#define CPLD_CPU_NMI_EVT_REG 0x39 +#define CPLD_PTP_EVT_REG 0x3B + +#define CPLD_MAC_RESET_REG 0x40 +#define CPLD_SYSTEM_RESET_REG 0x41 +#define CPLD_BMC_NTM_RESET_REG 0x43 +#define CPLD_USB_RESET_REG 0x44 +#define CPLD_I2C_MUX_RESET_REG 0x46 +#define CPLD_I2C_MUX_RESET_2_REG 0x47 +#define CPLD_MISC_RESET_REG 0x48 + +#define CPLD_BRD_PRESENT_REG 0x50 +#define CPLD_PSU_STATUS_REG 0x51 +#define CPLD_SYSTEM_PWR_REG 0x52 +#define CPLD_MAC_SYNCE_REG 0x53 +#define CPLD_MAC_AVS_REG 0x54 +#define CPLD_SYSTEM_STATUS_REG 0x55 +#define CPLD_FAN_PRESENT_REG 0x56 +#define CPLD_WATCHDOG_REG 0x5A +#define CPLD_BOOT_SELECT_REG 0x5B +#define CPLD_MUX_CTRL_REG 0x5C +#define CPLD_MISC_CTRL_1_REG 0x5D +#define CPLD_MISC_CTRL_2_REG 0x5E +#define CPLD_TIMING_CTRL_REG 0x5F + +#define CPLD_MAC_TEMP_REG 0x61 + +/* +#define CPLD_SYSTEM_LED_SYS_FAN_REG 0x80 +#define CPLD_SYSTEM_LED_PSU_REG 0x81 +#define CPLD_SYSTEM_LED_SYNC_REG 0x82 +#define CPLD_SYSTEM_LED_ID_REG 0x84 +*/ +#define CPLD_SYSTEM_LED_PSU_REG 0x80 +#define CPLD_SYSTEM_LED_SYS_REG 0x81 +#define CPLD_SYSTEM_LED_SYNC_REG 0x82 +#define CPLD_SYSTEM_LED_FAN_REG 0x83 +#define CPLD_SYSTEM_LED_ID_REG 0x84 + +#define CPLD_MAC_PG_REG 0x90 +#define CPLD_MISC_PG_REG 0x92 +#define CPLD_MAC_PG_EN_REG 0x93 +#define CPLD_MISC_PG_EN_REG 0x95 + +#define DBG_CPLD_MAC_INTR_REG 0xE0 +#define DBG_CPLD_HWM_INTR_REG 0xE3 +#define DBG_CPLD_CPLD2_INTR_REG 0xE4 +#define DBG_CPLD_NTM_INTR_REG 0xE5 +#define DBG_CPLD_FAN_PSU_INTR_REG 0xE6 +#define DBG_CPLD_SFP_IOEXP_INTR_REG 0xE8 +#define DBG_CPLD_PTP_INTR_REG 0xEB + +#define CPLD_UPG_RESET_REG 0xF0 + +/* CPLD 2*/ + +//interrupt status +#define CPLD_SFP_INTR_PRESENT_0_7_REG 0x10 +#define CPLD_SFP_INTR_PRESENT_8_15_REG 0x11 +#define CPLD_SFP_INTR_PRESENT_16_23_REG 0x12 +#define CPLD_SFP_INTR_PRESENT_24_31_REG 0x13 +#define CPLD_SFP_INTR_PRESENT_32_39_REG 0x14 +#define CPLD_SFP_INTR_PRESENT_40_47_REG 0x15 +#define CPLD_QSFP_INTR_PRESENT_48_53_REG 0x16 +#define CPLD_QSFP_INTR_PORT_48_53_REG 0x17 + +//interrupt mask +#define CPLD_SFP_MASK_PRESENT_0_7_REG 0x20 +#define CPLD_SFP_MASK_PRESENT_8_15_REG 0x21 +#define CPLD_SFP_MASK_PRESENT_16_23_REG 0x22 +#define CPLD_SFP_MASK_PRESENT_24_31_REG 0x23 +#define CPLD_SFP_MASK_PRESENT_32_39_REG 0x24 +#define CPLD_SFP_MASK_PRESENT_40_47_REG 0x25 +#define CPLD_QSFP_MASK_PRESENT_48_53_REG 0x26 +#define CPLD_QSFP_MASK_PORT_48_53_REG 0x27 + +//interrupt event +#define CPLD_SFP_EVT_PRESENT_0_7_REG 0x30 +#define CPLD_SFP_EVT_PRESENT_8_15_REG 0x31 +#define CPLD_SFP_EVT_PRESENT_16_23_REG 0x32 +#define CPLD_SFP_EVT_PRESENT_24_31_REG 0x33 +#define CPLD_SFP_EVT_PRESENT_32_39_REG 0x34 +#define CPLD_SFP_EVT_PRESENT_40_47_REG 0x35 +#define CPLD_QSFP_EVT_PRESENT_48_53_REG 0x36 +#define CPLD_QSFP_EVT_PORT_48_53_REG 0x37 + +#define CPLD_SFP_INTR_RX_LOS_0_7_REG 0x40 +#define CPLD_SFP_INTR_RX_LOS_8_15_REG 0x41 +#define CPLD_SFP_INTR_RX_LOS_16_23_REG 0x42 +#define CPLD_SFP_INTR_RX_LOS_24_31_REG 0x43 +#define CPLD_SFP_INTR_RX_LOS_32_39_REG 0x44 +#define CPLD_SFP_INTR_RX_LOS_40_47_REG 0x45 + +#define CPLD_SFP_INTR_TX_FAULT_0_7_REG 0x46 +#define CPLD_SFP_INTR_TX_FAULT_8_15_REG 0x47 +#define CPLD_SFP_INTR_TX_FAULT_16_23_REG 0x48 +#define CPLD_SFP_INTR_TX_FAULT_24_31_REG 0x49 +#define CPLD_SFP_INTR_TX_FAULT_32_39_REG 0x4A +#define CPLD_SFP_INTR_TX_FAULT_40_47_REG 0x4B + +//#define CPLD_SFP_RX_LOS_BASE_REG 0x40 +//#define CPLD_SFP_TX_FAULT_BASE_REG 0x46 + +#define CPLD_SFP_MASK_RX_LOS_0_7_REG 0x50 +#define CPLD_SFP_MASK_RX_LOS_8_15_REG 0x51 +#define CPLD_SFP_MASK_RX_LOS_16_23_REG 0x52 +#define CPLD_SFP_MASK_RX_LOS_24_31_REG 0x53 +#define CPLD_SFP_MASK_RX_LOS_32_39_REG 0x54 +#define CPLD_SFP_MASK_RX_LOS_40_47_REG 0x55 + +#define CPLD_SFP_MASK_TX_FAULT_0_7_REG 0x56 +#define CPLD_SFP_MASK_TX_FAULT_8_15_REG 0x57 +#define CPLD_SFP_MASK_TX_FAULT_16_23_REG 0x58 +#define CPLD_SFP_MASK_TX_FAULT_24_31_REG 0x59 +#define CPLD_SFP_MASK_TX_FAULT_32_39_REG 0x5A +#define CPLD_SFP_MASK_TX_FAULT_40_47_REG 0x5B + +//#define CPLD_SFP_RX_LOS_MASK_BASE_REG 0x50 +//#define CPLD_SFP_TX_FAULT_MASK_BASE_REG 0x56 + +#define CPLD_SFP_EVT_RX_LOS_0_7_REG 0x60 +#define CPLD_SFP_EVT_RX_LOS_8_15_REG 0x61 +#define CPLD_SFP_EVT_RX_LOS_16_23_REG 0x62 +#define CPLD_SFP_EVT_RX_LOS_24_31_REG 0x63 +#define CPLD_SFP_EVT_RX_LOS_32_39_REG 0x64 +#define CPLD_SFP_EVT_RX_LOS_40_47_REG 0x65 + +#define CPLD_SFP_EVT_TX_FAULT_0_7_REG 0x66 +#define CPLD_SFP_EVT_TX_FAULT_8_15_REG 0x67 +#define CPLD_SFP_EVT_TX_FAULT_16_23_REG 0x68 +#define CPLD_SFP_EVT_TX_FAULT_24_31_REG 0x69 +#define CPLD_SFP_EVT_TX_FAULT_32_39_REG 0x6A +#define CPLD_SFP_EVT_TX_FAULT_40_47_REG 0x6B + +//#define CPLD_SFP_RX_LOS_EVT_BASE_REG 0x60 +//#define CPLD_SFP_TX_FAULT_EVT_BASE_REG 0x66 + +#define CPLD_SFP_TX_DISABLE_0_7_REG 0x70 +#define CPLD_SFP_TX_DISABLE_8_15_REG 0x71 +#define CPLD_SFP_TX_DISABLE_16_23_REG 0x72 +#define CPLD_SFP_TX_DISABLE_24_31_REG 0x73 +#define CPLD_SFP_TX_DISABLE_32_39_REG 0x74 +#define CPLD_SFP_TX_DISABLE_40_47_REG 0x75 + +//#define CPLD_SFP_TX_DISABLE_BASE_REG 0x70 +#define CPLD_QSFP_RESET_48_53_REG 0x76 +#define CPLD_QSFP_LPMODE_48_53_REG 0x77 + +//debug interrupt status +#define DBG_CPLD_SFP_INTR_PRESENT_BASE_REG 0xD0 +#define DBG_CPLD_SFP_INTR_PRESENT_0_7_REG 0xD0 +#define DBG_CPLD_SFP_INTR_PRESENT_8_15_REG 0xD1 +#define DBG_CPLD_SFP_INTR_PRESENT_16_23_REG 0xD2 +#define DBG_CPLD_SFP_INTR_PRESENT_24_31_REG 0xD3 +#define DBG_CPLD_SFP_INTR_PRESENT_32_39_REG 0xD4 +#define DBG_CPLD_SFP_INTR_PRESENT_40_47_REG 0xD5 +#define DBG_CPLD_QSFP_INTR_PRESENT_48_53_REG 0xD6 +#define DBG_CPLD_QSFP_INTR_PORT_48_53_REG 0xD7 + +//debug interrupt mask +#define DBG_CPLD_SFP_INTR_RX_LOS_0_7_REG 0xE0 +#define DBG_CPLD_SFP_INTR_RX_LOS_8_15_REG 0xE1 +#define DBG_CPLD_SFP_INTR_RX_LOS_16_23_REG 0xE2 +#define DBG_CPLD_SFP_INTR_RX_LOS_24_31_REG 0xE3 +#define DBG_CPLD_SFP_INTR_RX_LOS_32_39_REG 0xE4 +#define DBG_CPLD_SFP_INTR_RX_LOS_40_47_REG 0xE5 + +#define DBG_CPLD_SFP_INTR_TX_FAULT_0_7_REG 0xE6 +#define DBG_CPLD_SFP_INTR_TX_FAULT_8_15_REG 0xE7 +#define DBG_CPLD_SFP_INTR_TX_FAULT_16_23_REG 0xE8 +#define DBG_CPLD_SFP_INTR_TX_FAULT_24_31_REG 0xE9 +#define DBG_CPLD_SFP_INTR_TX_FAULT_32_39_REG 0xEA +#define DBG_CPLD_SFP_INTR_TX_FAULT_40_47_REG 0xEB + +//#define DBG_CPLD_SFP_RX_LOS_BASE_REG 0xE0 +//#define DBG_CPLD_SFP_TX_FAULT_BASE_REG 0xE6 + +//MASK +#define MASK_ALL (0xFF) +#define MASK_HB (0b11110000) +#define MASK_LB (0b00001111) +#define MASK_CPLD_MAJOR_VER (0b11000000) +#define MASK_CPLD_MINOR_VER (0b00111111) +#define CPLD_SYSTEM_LED_SYS_MASK MASK_HB +#define CPLD_SYSTEM_LED_FAN_MASK MASK_LB +#define CPLD_SYSTEM_LED_PSU_0_MASK MASK_LB +#define CPLD_SYSTEM_LED_PSU_1_MASK MASK_HB +#define CPLD_SYSTEM_LED_SYNC_MASK MASK_LB +#define CPLD_SYSTEM_LED_ID_MASK MASK_LB +#define CPLD_SFP_LED_MASK_0 (0b00000011) +#define CPLD_SFP_LED_MASK_1 (0b00001100) +#define PERM_R (0b00000001) +#define PERM_W (0b00000010) +#define PERM_RW (PERM_R | PERM_W) +#define IS_PERM_R(perm) (perm & PERM_R ? 1u : 0u) +#define IS_PERM_W(perm) (perm & PERM_W ? 1u : 0u) + +/* common manipulation */ +#define INVALID(i, min, max) ((i < min) || (i > max) ? 1u : 0u) + +#endif diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-lpc.c new file mode 100644 index 000000000000..397604f6deb4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-lpc.c @@ -0,0 +1,883 @@ +/* + * A lpc driver for the ufispace_s7801_54xs + * + * Copyright (C) 2017-2022 UfiSpace Technology Corporation. + * Jason Tsai + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args) + +#define _SENSOR_DEVICE_ATTR_RO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IRUGO, read_##_func, NULL, _index) + +#define _SENSOR_DEVICE_ATTR_WO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IWUSR, NULL, write_##_func, _index) + +#define _SENSOR_DEVICE_ATTR_RW(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IRUGO | S_IWUSR, read_##_func, write_##_func, _index) + +#define _DEVICE_ATTR(_name) \ + &sensor_dev_attr_##_name.dev_attr.attr + +#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args) + +#define DRIVER_NAME "x86_64_ufispace_s7801_54xs_lpc" + +/* LPC registers */ + +#define REG_BASE_MB 0x700 +#define REG_BASE_EC 0xE300 + +#define REG_NONE 0x00 +//MB CPLD +#define REG_BRD_ID_0 (REG_BASE_MB + 0x00) +#define REG_BRD_ID_1 (REG_BASE_MB + 0x01) +#define REG_CPLD_VERSION (REG_BASE_MB + 0x02) +#define REG_CPLD_ID (REG_BASE_MB + 0x03) +#define REG_CPLD_BUILD (REG_BASE_MB + 0x04) +#define REG_CPLD_CHIP (REG_BASE_MB + 0x05) +#define REG_BRD_EXT_ID (REG_BASE_MB + 0x06) +#define REG_I2C_MUX_RESET (REG_BASE_MB + 0x46) +#define REG_I2C_MUX_RESET_2 (REG_BASE_MB + 0x47) +#define REG_MUX_CTRL (REG_BASE_MB + 0x5C) +#define REG_MISC_CTRL (REG_BASE_MB + 0x5D) +#define REG_MISC_CTRL_2 (REG_BASE_MB + 0x5E) + +//EC +#define REG_BIOS_BOOT (REG_BASE_EC + 0x0C) +#define REG_CPU_REV (REG_BASE_EC + 0x17) + +// BMC mailbox +#define REG_TEMP_MAC_HWM (REG_BASE_MB + 0xC0) + +//MASK +#define MASK_ALL (0xFF) +#define MASK_CPLD_MAJOR_VER (0b11000000) +#define MASK_CPLD_MINOR_VER (0b00111111) +#define MASK_HW_ID (0b00000011) +#define MASK_DEPH_ID (0b00000100) +#define MASK_BUILD_ID (0b00011000) +#define MASK_EXT_ID (0b00000111) +#define MASK_MUX_RESET_ALL (0x37) // 2#00110111 +#define MASK_MUX_RESET (MASK_ALL) +#define MASK_BIOS_BOOT_ROM (0b01000000) + +#define LPC_MDELAY (5) +#define MDELAY_RESET_INTERVAL (100) +#define MDELAY_RESET_FINISH (500) + +/* LPC sysfs attributes index */ +enum lpc_sysfs_attributes { + //MB CPLD + ATT_BRD_ID_0, + ATT_BRD_ID_1, + ATT_BRD_SKU_ID, + ATT_BRD_HW_ID, + ATT_BRD_DEPH_ID, + ATT_BRD_BUILD_ID, + ATT_BRD_EXT_ID, + + ATT_CPLD_ID, + ATT_CPLD_BUILD, + ATT_CPLD_CHIP, + + ATT_CPLD_VERSION_MAJOR, + ATT_CPLD_VERSION_MINOR, + ATT_CPLD_VERSION_BUILD, + ATT_CPLD_VERSION_H, + + ATT_MUX_RESET, + ATT_MUX_CTRL, + + //EC + ATT_CPU_HW_ID, + ATT_CPU_DEPH_ID, + ATT_CPU_BUILD_ID, + ATT_BIOS_BOOT_ROM, + //BMC mailbox + ATT_TEMP_MAC_HWM, + + //BSP + ATT_BSP_VERSION, + ATT_BSP_DEBUG, + ATT_BSP_PR_INFO, + ATT_BSP_PR_ERR, + ATT_BSP_REG, + ATT_BSP_GPIO_MAX, + ATT_MAX +}; + +enum data_type { + DATA_HEX, + DATA_DEC, + DATA_S_DEC, + DATA_UNK, +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE, + LOG_SYS +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +struct lpc_data_s { + struct mutex access_lock; +}; + +typedef struct sysfs_info_s +{ + u16 reg; + u8 mask; + u8 data_type; +} sysfs_info_t; + +static sysfs_info_t sysfs_info[] = { + [ATT_BRD_ID_0] = {REG_BRD_ID_0, MASK_ALL, DATA_HEX}, + [ATT_BRD_ID_1] = {REG_BRD_ID_1, MASK_ALL, DATA_HEX}, + [ATT_BRD_SKU_ID] = {REG_BRD_ID_0, MASK_ALL, DATA_DEC}, + [ATT_BRD_HW_ID] = {REG_BRD_ID_1, MASK_HW_ID, DATA_DEC}, + [ATT_BRD_DEPH_ID] = {REG_BRD_ID_1, MASK_DEPH_ID, DATA_DEC}, + [ATT_BRD_BUILD_ID] = {REG_BRD_ID_1, MASK_BUILD_ID, DATA_DEC}, + [ATT_BRD_EXT_ID] = {REG_BRD_EXT_ID, MASK_EXT_ID, DATA_DEC}, + + [ATT_CPLD_ID] = {REG_CPLD_ID, MASK_ALL, DATA_DEC}, + [ATT_CPLD_BUILD] = {REG_CPLD_BUILD, MASK_ALL, DATA_DEC}, + [ATT_CPLD_CHIP] = {REG_CPLD_CHIP, MASK_ALL, DATA_DEC}, + + [ATT_CPLD_VERSION_MAJOR] = {REG_CPLD_VERSION, MASK_CPLD_MAJOR_VER, DATA_DEC}, + [ATT_CPLD_VERSION_MINOR] = {REG_CPLD_VERSION, MASK_CPLD_MINOR_VER, DATA_DEC}, + [ATT_CPLD_VERSION_BUILD] = {REG_CPLD_BUILD, MASK_ALL, DATA_DEC}, + [ATT_CPLD_VERSION_H] = {REG_CPLD_VERSION, MASK_ALL, DATA_UNK}, + + [ATT_MUX_RESET] = {REG_NONE, MASK_ALL, DATA_DEC}, + [ATT_MUX_CTRL] = {REG_MUX_CTRL, MASK_ALL, DATA_HEX}, + + //EC + [ATT_CPU_HW_ID] = {REG_CPU_REV, MASK_HW_ID, DATA_DEC}, + [ATT_CPU_DEPH_ID] = {REG_CPU_REV, MASK_DEPH_ID, DATA_DEC}, + [ATT_CPU_BUILD_ID] = {REG_CPU_REV, MASK_BUILD_ID, DATA_DEC}, + [ATT_BIOS_BOOT_ROM] = {REG_BIOS_BOOT, MASK_BIOS_BOOT_ROM, DATA_DEC}, + + //BMC mailbox + [ATT_TEMP_MAC_HWM] = {REG_TEMP_MAC_HWM , MASK_ALL, DATA_S_DEC}, + + //BSP + [ATT_BSP_VERSION] = {REG_NONE, MASK_ALL, DATA_UNK}, + [ATT_BSP_DEBUG] = {REG_NONE, MASK_ALL, DATA_UNK}, + [ATT_BSP_PR_INFO] = {REG_NONE, MASK_ALL, DATA_UNK}, + [ATT_BSP_PR_ERR] = {REG_NONE, MASK_ALL, DATA_UNK}, + [ATT_BSP_REG] = {REG_NONE, MASK_ALL, DATA_HEX}, +}; + +struct lpc_data_s *lpc_data; +char bsp_version[16]=""; +char bsp_debug[2]="0"; +char bsp_reg[8]="0x0"; +u8 enable_log_read = LOG_DISABLE; +u8 enable_log_write = LOG_DISABLE; +u8 enable_log_sys = LOG_ENABLE; +u8 mailbox_inited=0; + +/* reg shift */ +static u8 _shift(u8 mask) +{ + int i=0, mask_one=1; + + for(i=0; i<8; ++i) { + if ((mask & mask_one) == 1) + return i; + else + mask >>= 1; + } + + return -1; +} + +/* reg mask and shift */ +static u8 _mask_shift(u8 val, u8 mask) +{ + int shift=0; + + shift = _shift(mask); + + return (val & mask) >> shift; +} + +static u8 _parse_data(char *buf, unsigned int data, u8 data_type) +{ + if(buf == NULL) { + return -1; + } + + if(data_type == DATA_HEX) { + return sprintf(buf, "0x%02x", data); + } else if(data_type == DATA_DEC) { + return sprintf(buf, "%u", data); + } else { + return -1; + } + return 0; +} + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if ((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write) || + (log_type==LOG_SYS && enable_log_sys) ) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +static void _outb(u8 data, u16 port) +{ + outb(data, port); + mdelay(LPC_MDELAY); +} + +/* init bmc mailbox, get from BMC team */ +static int bmc_mailbox_init(void) +{ + if (mailbox_inited) { + return mailbox_inited; + } + + //Enable super io writing + _outb(0xa5, 0x2e); + _outb(0xa5, 0x2e); + + //Logic device number + _outb(0x07, 0x2e); + _outb(0x0e, 0x2f); + + //Disable mailbox + _outb(0x30, 0x2e); + _outb(0x00, 0x2f); + + //Set base address bit + _outb(0x60, 0x2e); + _outb(0x07, 0x2f); + _outb(0x61, 0x2e); + _outb(0xc0, 0x2f); + + //Select bit[3:0] of SIRQ + _outb(0x70, 0x2e); + _outb(0x07, 0x2f); + + //Low level trigger + _outb(0x71, 0x2e); + _outb(0x01, 0x2f); + + //Enable mailbox + _outb(0x30, 0x2e); + _outb(0x01, 0x2f); + + //Disable super io writing + _outb(0xaa, 0x2e); + + //Mailbox initial + _outb(0x00, 0x786); + _outb(0x00, 0x787); + + //set mailbox_inited + mailbox_inited = 1; + + return mailbox_inited; +} + +/* get lpc register value */ +static u8 _read_lpc_reg(u16 reg, u8 mask) +{ + u8 reg_val=0x0, reg_mk_shf_val = 0x0; + + mutex_lock(&lpc_data->access_lock); + reg_val = inb(reg); + mutex_unlock(&lpc_data->access_lock); + + reg_mk_shf_val = _mask_shift(reg_val, mask); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x, mask=0x%02x, reg_mk_shf_val=0x%02x", reg, reg_val, mask, reg_mk_shf_val); + + return reg_mk_shf_val; +} + +/* get lpc register value */ +static ssize_t read_lpc_reg(u16 reg, u8 mask, char *buf, u8 data_type) +{ + u8 reg_val; + int len=0; + + reg_val = _read_lpc_reg(reg, mask); + + // may need to change to hex value ? + len=_parse_data(buf, reg_val, data_type); + + return len; +} + +/* set lpc register value */ +static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count, u8 data_type) +{ + u8 reg_val, reg_val_now, shift; + + if (kstrtou8(buf, 0, ®_val) < 0) { + if(data_type == DATA_S_DEC) { + if (kstrtos8(buf, 0, ®_val) < 0) { + return -EINVAL; + } + } else { + return -EINVAL; + } + } + + //apply continuous bits operation if mask is specified, discontinuous bits are not supported + if (mask != MASK_ALL) { + reg_val_now = _read_lpc_reg(reg, MASK_ALL); + //clear bits in reg_val_now by the mask + reg_val_now &= ~mask; + //get bit shift by the mask + shift = _shift(mask); + //calculate new reg_val + reg_val = reg_val_now | (reg_val << shift); + } + + mutex_lock(&lpc_data->access_lock); + + _outb(reg_val, reg); + + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x, mask=0x%02x", reg, reg_val, mask); + + return count; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + mutex_lock(&lpc_data->access_lock); + len=sprintf(buf, "%s", str); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + mutex_lock(&lpc_data->access_lock); + snprintf(str, str_len, "%s", buf); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get gpio max value */ +static ssize_t read_gpio_max(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + if (attr->index == ATT_BSP_GPIO_MAX) { + return sprintf(buf, "%d\n", ARCH_NR_GPIOS-1); + } + return -1; +} + +/* get mb cpld version in human readable format */ +static ssize_t read_mb_cpld_version_h(struct device *dev, + struct device_attribute *da, char *buf) +{ + ssize_t len=0; + u8 major = 0, minor = 0, build = 0; + major = _read_lpc_reg(REG_CPLD_VERSION, MASK_CPLD_MAJOR_VER); + minor = _read_lpc_reg(REG_CPLD_VERSION, MASK_CPLD_MINOR_VER); + build = _read_lpc_reg(REG_CPLD_BUILD, MASK_ALL); + len=sprintf(buf, "%u.%02u.%03u", major, minor, build); + + return len; +} + +/* get lpc register value */ +static ssize_t read_lpc_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + u8 data_type = DATA_UNK; + + if (attr->index == ATT_BSP_REG) { + //copy value from bsp_reg + if (kstrtou16(bsp_reg, 0, ®) < 0) + return -EINVAL; + + data_type = sysfs_info[attr->index].data_type; + } else { + reg = sysfs_info[attr->index].reg; + mask = sysfs_info[attr->index].mask; + data_type = sysfs_info[attr->index].data_type; + } + + return read_lpc_reg(reg, mask, buf, data_type); +} + +/* set lpc register value */ +static ssize_t write_lpc_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + u8 data_type = DATA_UNK; + + reg = sysfs_info[attr->index].reg; + mask = sysfs_info[attr->index].mask; + data_type = sysfs_info[attr->index].data_type; + + if(attr->index == ATT_TEMP_MAC_HWM) { + bmc_mailbox_init(); + } + + return write_lpc_reg(reg, mask, buf, count, data_type); +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + char *str=NULL; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + break; + case ATT_BSP_REG: + str = bsp_reg; + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + u16 reg = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(bsp_version); + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + case ATT_BSP_REG: + if (kstrtou16(buf, 0, ®) < 0) + return -EINVAL; + + str = bsp_reg; + str_len = sizeof(bsp_reg); + break; + default: + return -EINVAL; + } + + if (attr->index == ATT_BSP_DEBUG) { + if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + } + + return write_bsp(buf, str, str_len, count); +} + +static ssize_t write_bsp_pr_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len = strlen(buf); + + if(str_len <= 0) + return str_len; + + switch (attr->index) { + case ATT_BSP_PR_INFO: + BSP_PR(KERN_INFO, "%s", buf); + break; + case ATT_BSP_PR_ERR: + BSP_PR(KERN_ERR, "%s", buf); + break; + default: + return -EINVAL; + } + + return str_len; +} + +/* set mux_reset register value */ +static ssize_t write_mux_reset(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + u16 reg = REG_I2C_MUX_RESET; + u8 val = 0; + u8 mux_reset_reg_val = 0; + static int mux_reset_flag = 0; + + if (kstrtou8(buf, 0, &val) < 0) + return -EINVAL; + + if (mux_reset_flag == 0) { + if (val == 0) { + mutex_lock(&lpc_data->access_lock); + mux_reset_flag = 1; + BSP_LOG_W("i2c mux reset is triggered..."); + + //reset mux on SFP/QSFP ports + mux_reset_reg_val = inb(reg); + _outb((mux_reset_reg_val & (u8) (~MASK_MUX_RESET)), reg); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, mux_reset_reg_val & 0x0); + + //unset mux on SFP/QSFP ports + outb((mux_reset_reg_val | MASK_MUX_RESET), reg); + mdelay(500); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, mux_reset_reg_val | 0xFF); + + mux_reset_flag = 0; + mutex_unlock(&lpc_data->access_lock); + } else { + return -EINVAL; + } + } else { + BSP_LOG_W("i2c mux is resetting... (ignore)"); + mutex_lock(&lpc_data->access_lock); + mutex_unlock(&lpc_data->access_lock); + } + + return count; +} + +//SENSOR_DEVICE_ATTR - MB +static _SENSOR_DEVICE_ATTR_RO(board_id_0, lpc_callback, ATT_BRD_ID_0); +static _SENSOR_DEVICE_ATTR_RO(board_id_1, lpc_callback, ATT_BRD_ID_1); +static _SENSOR_DEVICE_ATTR_RO(board_sku_id, lpc_callback, ATT_BRD_SKU_ID); +static _SENSOR_DEVICE_ATTR_RO(board_hw_id, lpc_callback, ATT_BRD_HW_ID); +static _SENSOR_DEVICE_ATTR_RO(board_deph_id, lpc_callback, ATT_BRD_DEPH_ID); +static _SENSOR_DEVICE_ATTR_RO(board_build_id, lpc_callback, ATT_BRD_BUILD_ID); +static _SENSOR_DEVICE_ATTR_RO(board_ext_id, lpc_callback, ATT_BRD_EXT_ID); +static _SENSOR_DEVICE_ATTR_RO(cpld_version_major, lpc_callback, ATT_CPLD_VERSION_MAJOR); +static _SENSOR_DEVICE_ATTR_RO(cpld_version_minor, lpc_callback, ATT_CPLD_VERSION_MINOR); +static _SENSOR_DEVICE_ATTR_RO(cpld_version_build, lpc_callback, ATT_CPLD_VERSION_BUILD); +static _SENSOR_DEVICE_ATTR_RO(cpld_version_h, mb_cpld_version_h, ATT_CPLD_VERSION_H); +static _SENSOR_DEVICE_ATTR_RO(cpld_id, lpc_callback, ATT_CPLD_ID); + +static _SENSOR_DEVICE_ATTR_WO(mux_reset, mux_reset, ATT_MUX_RESET); +static _SENSOR_DEVICE_ATTR_RW(mux_ctrl, lpc_callback, ATT_MUX_CTRL); + +//SENSOR_DEVICE_ATTR - BMC mailbox +static _SENSOR_DEVICE_ATTR_WO(temp_mac_hwm , lpc_callback , ATT_TEMP_MAC_HWM); + +//SENSOR_DEVICE_ATTR - EC +static _SENSOR_DEVICE_ATTR_RO(cpu_hw_id, lpc_callback, ATT_CPU_HW_ID); +static _SENSOR_DEVICE_ATTR_RO(cpu_deph_id, lpc_callback, ATT_CPU_DEPH_ID); +static _SENSOR_DEVICE_ATTR_RO(cpu_build_id, lpc_callback, ATT_CPU_BUILD_ID); +static _SENSOR_DEVICE_ATTR_RO(bios_boot_rom, lpc_callback, ATT_BIOS_BOOT_ROM); + +//SENSOR_DEVICE_ATTR - BSP +static _SENSOR_DEVICE_ATTR_RW(bsp_version, bsp_callback, ATT_BSP_VERSION); +static _SENSOR_DEVICE_ATTR_RW(bsp_debug, bsp_callback, ATT_BSP_DEBUG); +static _SENSOR_DEVICE_ATTR_WO(bsp_pr_info, bsp_pr_callback, ATT_BSP_PR_INFO); +static _SENSOR_DEVICE_ATTR_WO(bsp_pr_err, bsp_pr_callback, ATT_BSP_PR_ERR); +static SENSOR_DEVICE_ATTR(bsp_reg, S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG); +static SENSOR_DEVICE_ATTR(bsp_gpio_max, S_IRUGO, read_gpio_max, NULL, ATT_BSP_GPIO_MAX); + +static struct attribute *mb_cpld_attrs[] = { + _DEVICE_ATTR(board_id_0), + _DEVICE_ATTR(board_id_1), + _DEVICE_ATTR(board_sku_id), + _DEVICE_ATTR(board_hw_id), + _DEVICE_ATTR(board_deph_id), + _DEVICE_ATTR(board_build_id), + _DEVICE_ATTR(board_ext_id), + _DEVICE_ATTR(cpld_version_major), + _DEVICE_ATTR(cpld_version_minor), + _DEVICE_ATTR(cpld_version_build), + _DEVICE_ATTR(cpld_version_h), + _DEVICE_ATTR(cpld_id), + _DEVICE_ATTR(mux_reset), + _DEVICE_ATTR(mux_ctrl), + NULL, +}; + +static struct attribute *bsp_attrs[] = { + _DEVICE_ATTR(bsp_version), + _DEVICE_ATTR(bsp_debug), + _DEVICE_ATTR(bsp_pr_info), + _DEVICE_ATTR(bsp_pr_err), + _DEVICE_ATTR(bsp_reg), + _DEVICE_ATTR(bsp_gpio_max), + NULL, +}; + +static struct attribute *ec_attrs[] = { + _DEVICE_ATTR(cpu_hw_id), + _DEVICE_ATTR(cpu_deph_id), + _DEVICE_ATTR(cpu_build_id), + _DEVICE_ATTR(bios_boot_rom), + NULL, +}; + +static struct attribute *bmc_mailbox_attrs[] = { + _DEVICE_ATTR(temp_mac_hwm), + NULL, +}; + +static struct attribute_group mb_cpld_attr_grp = { + .name = "mb_cpld", + .attrs = mb_cpld_attrs, +}; + +static struct attribute_group bsp_attr_grp = { + .name = "bsp", + .attrs = bsp_attrs, +}; + +static struct attribute_group ec_attr_grp = { + .name = "ec", + .attrs = ec_attrs, +}; + +static struct attribute_group bmc_mailbox_attr_grp = { + .name = "bmc_mailbox", + .attrs = bmc_mailbox_attrs, +}; + +static void lpc_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device lpc_dev = { + .name = DRIVER_NAME, + .id = -1, + .dev = { + .release = lpc_dev_release, + } +}; + +static int lpc_drv_probe(struct platform_device *pdev) +{ + int i = 0, grp_num = 4; + int err[4] = {0}; + struct attribute_group *grp; + + lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s), + GFP_KERNEL); + if (!lpc_data) + return -ENOMEM; + + mutex_init(&lpc_data->access_lock); + + for (i=0; idev.kobj, grp); + if (err[i]) { + printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name); + goto exit; + } else { + continue; + } + } + + return 0; + +exit: + for (i=0; idev.kobj, grp); + if (!err[i]) { + //remove previous successful cases + continue; + } else { + //remove first failed case, then return + return err[i]; + } + } + return 0; +} + +static int lpc_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bmc_mailbox_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &ec_attr_grp); + + return 0; +} + +static struct platform_driver lpc_drv = { + .probe = lpc_drv_probe, + .remove = __exit_p(lpc_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int lpc_init(void) +{ + int err = 0; + + err = platform_driver_register(&lpc_drv); + if (err) { + printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n", + __func__, __LINE__, err); + + return err; + } + + err = platform_device_register(&lpc_dev); + if (err) { + printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n", + __func__, __LINE__, err); + platform_driver_unregister(&lpc_drv); + return err; + } + + return err; +} + +void lpc_exit(void) +{ + platform_driver_unregister(&lpc_drv); + platform_device_unregister(&lpc_dev); +} + +MODULE_AUTHOR("Jason Tsai "); +MODULE_DESCRIPTION("x86_64_ufispace_s7801_54xs_lpc driver"); +MODULE_LICENSE("GPL"); + +module_init(lpc_init); +module_exit(lpc_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-sys-eeprom.c new file mode 100644 index 000000000000..f9f7728deb3d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/modules/x86-64-ufispace-s7801-54xs-sys-eeprom.c @@ -0,0 +1,272 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* enable dev_dbg print out */ +//#define DEBUG + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57,*/ I2C_CLIENT_END }; + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 512 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void sys_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF)); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + sys_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + int ret; + int i; + u8 cmd; + u16 value16; + + dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count); + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + mutex_lock(&data->update_lock); + + for(i=0; i < count; i++) { + /* write command */ + cmd = (off >> 8) & 0xff; + value16 = off & 0xff; + value16 |= buf[i] << 8; + ret = i2c_smbus_write_word_data(client, cmd, value16); + + if (ret < 0) { + dev_err(&client->dev, "write address failed at %d \n", (int)off); + goto exit; + } + + off++; + + /* need to wait for write complete */ + udelay(10000); + } +exit: + mutex_unlock(&data->update_lock); + /* force to update client when reading */ + for(i=0; i < SLICE_NUM; i++) { + data->last_updated[i] = 0; + } + + return count; +} + +static struct bin_attribute sys_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUSR, + }, + .size = EEPROM_SIZE, + .read = sys_eeprom_read, + .write = sys_eeprom_write, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline + attaching to addresses >= 0x56 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int sys_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + +#ifdef __STDC_LIB_EXT1__ + memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE); +#else + memset(data->data, 0xff, EEPROM_SIZE); +#endif + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int sys_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id sys_eeprom_id[] = { + { "sys_eeprom", 0 }, + { } +}; + +static struct i2c_driver sys_eeprom_driver = { + .driver = { + .name = "sys_eeprom", + }, + .probe = sys_eeprom_probe, + .remove = sys_eeprom_remove, + .id_table = sys_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = sys_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(sys_eeprom_driver); + +MODULE_AUTHOR("Jason "); +MODULE_DESCRIPTION("UfiSpace System EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/service/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/service/pddf-platform-init.service new file mode 120000 index 000000000000..0fd9f25b6c5e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/service/pddf-platform-init.service @@ -0,0 +1 @@ +../../../../pddf/i2c/service/pddf-platform-init.service \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/__init__.py new file mode 100644 index 000000000000..593867d31c9d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/__init__.py @@ -0,0 +1,4 @@ +# All the derived classes for PDDF +__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan"] +from . import platform + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/chassis.py new file mode 100644 index 000000000000..085f2af2ff85 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/chassis.py @@ -0,0 +1,193 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Chassis API +# +############################################################################# + +try: + import time + from sonic_platform_pddf_base.pddf_chassis import PddfChassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_COMPONENT = 4 + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + + SYSLED_DEV_NAME = "SYS_LED" + port_dict = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + self._initialize_components() + + def _initialize_components(self): + from sonic_platform.component import Component + for index in range(NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + # return device_info.get_hwsku() + return self._eeprom.platform_name_str() + + def initizalize_system_led(self): + return True + + def get_status_led(self): + return self.get_system_led(self.SYSLED_DEV_NAME) + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + Returns: + (bool, dict): + - bool: True if call successful, False if not; + - dict: A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, where device_id is the device ID + for this device and device_event. + The known devices's device_id and device_event was defined as table below. + ----------------------------------------------------------------- + device | device_id | device_event | annotate + ----------------------------------------------------------------- + 'fan' '' '0' Fan removed + '1' Fan inserted + 'sfp' '' '0' Sfp removed + '1' Sfp inserted + '2' I2C bus stuck + '3' Bad eeprom + '4' Unsupported cable + '5' High Temperature + '6' Bad cable + 'voltage' '' '0' Vout normal + '1' Vout abnormal + -------------------------------------------------------------------- + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'}, + 'voltage':{'U20':'0', 'U21':'1'}} + Indicates that: + fan 0 has been removed, fan 2 has been inserted. + sfp 11 has been removed, sfp 12 has been inserted. + monitored voltage U20 became normal, voltage U21 became abnormal. + Note: For sfp, when event 3-6 happened, the module will not be avalaible, + XCVRD shall stop to read eeprom before SFP recovered from error status. + """ + + change_event_dict = {"fan": {}, "sfp": {}, "voltage": {}} + + start_time = time.time() + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print("get_change_event:Invalid timeout value", timeout) + return False, change_event_dict + + end_time = start_time + timeout + if start_time > end_time: + print( + "get_change_event:" "time wrap / invalid timeout value", + timeout, + ) + return False, change_event_dict # Time wrap or possibly incorrect timeout + try: + while timeout >= 0: + # check for sfp + sfp_change_dict = self.get_transceiver_change_event() + # check for fan + # fan_change_dict = self.get_fan_change_event() + # check for voltage + # voltage_change_dict = self.get_voltage_change_event() + + if sfp_change_dict: + change_event_dict["sfp"] = sfp_change_dict + # change_event_dict["fan"] = fan_change_dict + # change_event_dict["voltage"] = voltage_change_dict + return True, change_event_dict + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, change_event_dict + except Exception as e: + print(e) + print("get_change_event: Should not reach here.") + return False, change_event_dict + + def get_transceiver_change_event(self): + current_port_dict = {} + ret_dict = {} + + # Check for OIR events and return ret_dict + for index in range(self.platform_inventory['num_ports']): + if self._sfp_list[index].get_presence(): + #current_port_dict[index] = self.STATUS_INSERTED + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['inserted'] + else: + #current_port_dict[index] = self.STATUS_REMOVED + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['removed'] + + if len(self.port_dict) == 0: # first time + self.port_dict = current_port_dict + return {} + + if current_port_dict == self.port_dict: + return {} + + # Update reg value + for index, status in current_port_dict.items(): + if self.port_dict[index] != status: + ret_dict[index] = status + #ret_dict[str(index)] = status + self.port_dict = current_port_dict + for index, status in ret_dict.items(): + if int(status) == 1: + pass + #self._sfp_list[int(index)].check_sfp_optoe_type() + return ret_dict + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + reboot_cause_path = self.plugin_data['REBOOT_CAUSE']['reboot_cause_file'] + + try: + with open(reboot_cause_path, 'r', errors='replace') as fd: + data = fd.read() + sw_reboot_cause = data.strip() + except IOError: + sw_reboot_cause = "Unknown" + + return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/component.py new file mode 100644 index 000000000000..1c583079f8c2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/component.py @@ -0,0 +1,125 @@ +############################################################################# +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +try: + import subprocess + from sonic_platform_base.component_base import ComponentBase + from sonic_platform_pddf_base import pddfapi +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +CPLD_SYSFS = { + "CPLD1": {"major": "cpld1_major_ver", "minor": "cpld1_minor_ver", "build": "cpld1_build"}, + "CPLD2": {"major": "cpld2_major_ver", "minor": "cpld2_minor_ver", "build": "cpld2_build"}, +} + +BMC_CMDS = { + "VER1": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f1", + "VER2": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f2", + "VER3": "echo $((`ipmitool mc info | grep 'Aux Firmware Rev Info' -A 2 | sed -n '2p'` + 0))", +} + +BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version" +COMPONENT_LIST= [ + ("CPLD1", "CPLD 1"), + ("CPLD2", "CPLD 2"), + ("BIOS", "Basic Input/Output System"), + ("BMC", "BMC"), +] + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index=0): + self.pddf_obj = pddfapi.PddfApi() + self.index = component_index + self.name = self.get_name() + + def _get_bios_version(self): + # Retrieves the BIOS firmware version + try: + with open(BIOS_VERSION_PATH, 'r') as fd: + bios_version = fd.read() + return bios_version.strip() + except Exception as e: + return None + + def _get_cpld_version(self): + # Retrieves the CPLD firmware version + cpld_version = dict() + for cpld_name, elem in CPLD_SYSFS.items(): + device = "SYSSTATUS" + major = self.pddf_obj.get_attr_name_output(device, elem["major"]) + minor = self.pddf_obj.get_attr_name_output(device, elem["minor"]) + build = self.pddf_obj.get_attr_name_output(device, elem["build"]) + if major and minor and build: + major = int(major['status'].rstrip(),0) + minor = int(minor['status'].rstrip(),0) + build = int(build['status'].rstrip(),0) + cpld_version[cpld_name] = "{}.{:02d}.{:03d}".format(major, minor, build) + else: + cpld_version[cpld_name] = "N/A" + return cpld_version + + def _get_bmc_version(self): + # Retrieves the BMC firmware version + bmc_ver = dict() + for ver in BMC_CMDS: + status, value = subprocess.getstatusoutput(BMC_CMDS[ver]) + if not status: + bmc_ver[ver] = int(value.rstrip()) + else: + return None + + bmc_version = "{}.{}.{}".format(bmc_ver["VER1"], bmc_ver["VER2"], bmc_ver["VER3"]) + + return bmc_version + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_LIST[self.index][0] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + return COMPONENT_LIST[self.index][1] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = None + + if self.name == "BIOS": + fw_version = self._get_bios_version() + elif "CPLD" in self.name: + cpld_version = self._get_cpld_version() + fw_version = cpld_version.get(self.name) + elif self.name == "BMC": + fw_version = self._get_bmc_version() + return fw_version + + def install_firmware(self, image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/eeprom.py new file mode 100644 index 000000000000..90ab1c779a48 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Eeprom(PddfEeprom): + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfEeprom.__init__(self, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + + def platform_name_str(self): + (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_PLATFORM_NAME) + if not is_valid: + return "N/A" + + return results[2].decode('ascii') \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/fan.py new file mode 100644 index 000000000000..c3cb875646b0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/fan.py @@ -0,0 +1,158 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten + # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake' + + def get_mfr_id(self): + """ + Retrieves the manufacturer id of the device + + Returns: + string: Manufacturer Id of device + """ + if self.is_psu_fan: + device = "PSU{}".format(self.fans_psu_index) + output = self.pddf_obj.get_attr_name_output(device, "psu_mfr_id") + else: + raise NotImplementedError + + if not output: + return None + + mfr = output['status'] + + # strip_non_ascii + stripped = (c for c in mfr if 0 < ord(c) < 127) + mfr = ''.join(stripped) + + return mfr.rstrip('\n') + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + if self.is_psu_fan: + device = "PSU{}".format(self.fans_psu_index) + output = self.pddf_obj.get_attr_name_output(device, "psu_model_name") + else: + raise NotImplementedError + + if not output: + return None + + model = output['status'] + + # strip_non_ascii + stripped = (c for c in model if 0 < ord(c) < 127) + model = ''.join(stripped) + + return model.rstrip('\n') + + def get_max_speed(self): + """ + Retrieves the max speed + + Returns: + An Integer, the max speed + """ + if self.is_psu_fan: + mfr = self.get_mfr_id() + model = self.get_model() + + max_speed = int(self.plugin_data['PSU']['valmap']['PSU_FAN_MAX_SPEED_AC']) + if mfr and model : + for dev in self.plugin_data['PSU']['psu_support_list']: + if dev['Manufacturer'] == mfr and dev['Name'] == model: + max_speed = int(self.plugin_data['PSU']['valmap'][dev['MaxSpd']]) + break + else: + max_speed = int(self.plugin_data['FAN']['FAN_MAX_SPEED']) + + return max_speed + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed_percentage = 0 + + max_speed = self.get_max_speed() + rpm_speed = self.get_speed_rpm() + + speed_percentage = round((rpm_speed*100)/max_speed) + + return min(speed_percentage, 100) + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + if self.is_psu_fan: + attr_name = "psu_present" + device = "PSU{}".format(self.fans_psu_index) + else: + idx = (self.fantray_index-1)*self.platform['num_fans_pertray'] + self.fan_index + attr_name = "fan" + str(idx) + "_present" + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr_name) + if not output: + return False + + mode = output['mode'] + presence = output['status'].rstrip() + vmap = self.plugin_data['FAN']['present'][mode]['valmap'] + + if presence in vmap: + status = vmap[presence] + else: + status = False + + return status + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + return self.get_speed() + + def set_speed(self, speed): + """ + Sets the fan speed + + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + + Returns: + A boolean, True if speed is set successfully, False if not + """ + + print("Setting Fan speed is not allowed") + return False diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/fan_drawer.py new file mode 100644 index 000000000000..3b9bb607f632 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/fan_drawer.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(PddfFanDrawer): + """PDDF Platform-Specific Fan-Drawer class""" + + def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): + # idx is 0-based + PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/platform.py new file mode 100644 index 000000000000..406b1179ae1b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/platform.py @@ -0,0 +1,25 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + + +try: + from sonic_platform_pddf_base.pddf_platform import PddfPlatform +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PddfPlatform): + """ + PDDF Platform-Specific Platform Class + """ + + def __init__(self): + PddfPlatform.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/psu.py new file mode 100644 index 000000000000..38b32412d024 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/psu.py @@ -0,0 +1,38 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + PLATFORM_PSU_CAPACITY = 450 + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return float(self.PLATFORM_PSU_CAPACITY) + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + + # power is returned in micro watts + return round(float(self.get_voltage()*self.get_current()), 2) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/sfp.py new file mode 100644 index 000000000000..8ab43117d54c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/sfp.py @@ -0,0 +1,49 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_sfp import PddfSfp +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + self.index = index + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_lpmode(self): + if self.sfp_type == "QSFP28": + return super().get_lpmode() + else: + return False + + def set_lpmode(self, lpmode): + if self.sfp_type == "QSFP28": + return super().set_lpmode(lpmode) + else: + return False + + def reset(self): + if self.sfp_type == "QSFP28": + return super().reset() + else: + return False + + def get_error_description(self): + """ + Retrives the error descriptions of the SFP module + Returns: + String that represents the current error descriptions of vendor specific errors + In case there are multiple errors, they should be joined by '|', + like: "Bad EEPROM|Unsupported cable" + """ + if not self.get_presence(): + return self.SFP_STATUS_UNPLUGGED + + return self.SFP_STATUS_OK diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/thermal.py new file mode 100644 index 000000000000..77d6ec7ae886 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform/thermal.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform_setup.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform_setup.py new file mode 100644 index 000000000000..c0a485320cb7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/sonic_platform_setup.py @@ -0,0 +1,27 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on ufispace platform', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Jason Tsai', + maintainer_email='jason.cy.tsai@ufispace.com', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_device_create.sh new file mode 100755 index 000000000000..4a55252ea936 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_device_create.sh @@ -0,0 +1,16 @@ +#!/bin/bash + +#disable bmc watchdog +echo "Disable BMC watchdog" +timeout 3 ipmitool mc watchdog off + +pddf_ledutil setstatusled SYNC_LED off +pddf_ledutil setstatusled SYS_LED off +pddf_ledutil setstatusled ID_LED off + +#set status led to green to indicate platform init done +curr_led=$(pddf_ledutil getstatusled SYS_LED) +pddf_ledutil setstatusled SYS_LED green +echo "Set SYS_LED from $curr_led to green" + +echo "PDDF device post-create completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_driver_install.sh new file mode 100755 index 000000000000..ed2559977e42 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_post_driver_install.sh @@ -0,0 +1,2 @@ +#!/bin/bash +echo "PDDF driver post-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_pre_driver_install.sh new file mode 100755 index 000000000000..9ada6c235c48 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_pre_driver_install.sh @@ -0,0 +1,8 @@ +#!/bin/bash +#rmmod gpio_ich +if [ ! -f /tmp/._pddf_pre_driver_init_completion ]; then + rmmod i2c_i801 + rmmod i2c_ismt + date > /tmp/._pddf_pre_driver_init_completion +fi +echo "PDDF driver pre-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_switch_svc.py b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_switch_svc.py new file mode 100755 index 000000000000..ca34fe9442c9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pddf_switch_svc.py @@ -0,0 +1,50 @@ +#!/usr/bin/env python +# Script to stop and start the respective platforms default services. +# This will be used while switching the pddf->non-pddf mode and vice versa +import commands + +def check_pddf_support(): + return True + +def stop_platform_svc(): + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py deinit") + if status: + print "platform_utility.py deinit command failed %d"%status + return False + + # HACK , stop the pddf-platform-init service if it is active + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service along with other platform serives failed %d"%status + return False + + return True + +def start_platform_svc(): + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py init") + if status: + print "platform_utility.py init command failed %d"%status + return False + + return True + +def start_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service") + if status: + print "Start pddf-platform-init.service failed %d"%status + return False + + return True + +def stop_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service failed %d"%status + return False + + return True + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pre_pddf_init.sh b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pre_pddf_init.sh new file mode 100755 index 000000000000..63a2e205808e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s7801-54xs/utils/pre_pddf_init.sh @@ -0,0 +1,5 @@ +#!/bin/bash +#rmmod gpio_ich +modprobe -rq i2c_i801 +modprobe -rq i2c_smbus +echo "Pre PDDF init steps completed successully" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/Makefile b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/Makefile new file mode 100644 index 000000000000..e441986ded77 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/Makefile @@ -0,0 +1,6 @@ + +MODULE_NAME = x86-64-ufispace-s8901-54xc-cpld.o x86-64-ufispace-s8901-54xc-sys-eeprom.o x86-64-ufispace-s8901-54xc-lpc.o pddf_custom_sysstatus_module.o +obj-m := $(MODULE_NAME) + +CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include +KBUILD_EXTRA_SYMBOLS := $(M)/../../../../pddf/i2c/Module.symvers.PDDF diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/pddf_custom_sysstatus_module.c new file mode 100644 index 000000000000..b50bb428000a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/pddf_custom_sysstatus_module.c @@ -0,0 +1,276 @@ +/* + * Copyright 2019 Broadcom. + * The term ��Broadcom�� refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module for system status registers + */ + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h" + + +SYSSTATUS_DATA sysstatus_data = {0}; + +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf); +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + + +PDDF_DATA_ATTR(attr_name, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_CHAR, 32, + (void*)&sysstatus_data.sysstatus_addr_attr.aname, NULL); +PDDF_DATA_ATTR(attr_devaddr, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.devaddr , NULL); +PDDF_DATA_ATTR(attr_offset, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.offset, NULL); +PDDF_DATA_ATTR(attr_mask, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.mask , NULL); +PDDF_DATA_ATTR(attr_len, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.len , NULL); +PDDF_DATA_ATTR(attr_ops, S_IWUSR, NULL, do_attr_operation, PDDF_CHAR, 8, (void*)&sysstatus_data, NULL); + + + +static struct attribute *sysstatus_addr_attributes[] = { + &attr_attr_name.dev_attr.attr, + &attr_attr_devaddr.dev_attr.attr, + &attr_attr_offset.dev_attr.attr, + &attr_attr_mask.dev_attr.attr, + &attr_attr_len.dev_attr.attr, + &attr_attr_ops.dev_attr.attr, + NULL +}; + +PDDF_DATA_ATTR(board_sku_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(board_hw_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(board_deph_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(board_build_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_major_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_minor_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_build , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_major_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_minor_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_build , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(psu_status , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_psu , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_sys , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_sync, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_fan , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_id , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); + +static struct attribute *sysstatus_data_attributes[] = { + &attr_board_sku_id.dev_attr.attr, + &attr_board_hw_id.dev_attr.attr, + &attr_board_deph_id.dev_attr.attr, + &attr_board_build_id.dev_attr.attr, + &attr_cpld1_major_ver.dev_attr.attr, + &attr_cpld1_minor_ver.dev_attr.attr, + &attr_cpld1_build.dev_attr.attr, + &attr_cpld2_major_ver.dev_attr.attr, + &attr_cpld2_minor_ver.dev_attr.attr, + &attr_cpld2_build.dev_attr.attr, + &attr_psu_status.dev_attr.attr, + &attr_system_led_psu.dev_attr.attr, + &attr_system_led_sys.dev_attr.attr, + &attr_system_led_sync.dev_attr.attr, + &attr_system_led_fan.dev_attr.attr, + &attr_system_led_id.dev_attr.attr, + NULL +}; + + +static const struct attribute_group pddf_sysstatus_addr_group = { + .attrs = sysstatus_addr_attributes, +}; + + +static const struct attribute_group pddf_sysstatus_data_group = { + .attrs = sysstatus_data_attributes, +}; + + +static struct kobject *sysstatus_addr_kobj; +static struct kobject *sysstatus_data_kobj; + + + +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf) +{ + + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + + } + } + + if (sysstatus_addr_attrs==NULL ) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname); + status = 0; + } + else + { + status = board_i2c_cpld_read( sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset); + } + + return sprintf(buf, "0x%x\n", (status&sysstatus_addr_attrs->mask)); + +} + +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + u8 reg_val; + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + } + } + + if (sysstatus_addr_attrs==NULL) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname); + return -EINVAL; + } + else + { + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + status = board_i2c_cpld_write(sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset, reg_val); + + if (status!=0) + { + printk(KERN_DEBUG "store_sysstatus_data() %s failed, status=%d\n",data->sysstatus_addr_attrs[i].aname, status); + return status; + } + } + + return count; +} + + + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + PDDF_ATTR *ptr = (PDDF_ATTR *)da; + SYSSTATUS_DATA *pdata = (SYSSTATUS_DATA *)(ptr->addr); + + pdata->sysstatus_addr_attrs[pdata->len] = pdata->sysstatus_addr_attr; + pdata->len++; + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Populating the data for %s\n", __FUNCTION__, pdata->sysstatus_addr_attr.aname); + +#ifdef __STDC_LIB_EXT1__ + memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); +#else + memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); +#endif + + return count; +} + + + + +int __init sysstatus_data_init(void) +{ + struct kobject *device_kobj; + int ret = 0; + + + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. init\n"); + + device_kobj = get_device_i2c_kobj(); + if(!device_kobj) + return -ENOMEM; + + sysstatus_addr_kobj = kobject_create_and_add("sysstatus", device_kobj); + if(!sysstatus_addr_kobj) + return -ENOMEM; + + sysstatus_data_kobj = kobject_create_and_add("sysstatus_data", sysstatus_addr_kobj); + if(!sysstatus_data_kobj) + return -ENOMEM; + + + ret = sysfs_create_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + if (ret) + { + kobject_put(sysstatus_addr_kobj); + return ret; + } + + ret = sysfs_create_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + if (ret) + { + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + return ret; + } + + + return ret; +} + +void __exit sysstatus_data_exit(void) +{ + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. exit\n"); + sysfs_remove_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Removed the kobjects for 'SYSSTATUS'\n",__FUNCTION__); + return; +} + +module_init(sysstatus_data_init); +module_exit(sysstatus_data_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("SYSSTATUS platform data"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.c b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.c new file mode 100644 index 000000000000..63eec91d4819 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.c @@ -0,0 +1,1512 @@ +/* + * A i2c cpld driver for the ufispace_s8901_54xc + * + * Copyright (C) 2017-2022 UfiSpace Technology Corporation. + * Jason Tsai + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "x86-64-ufispace-s8901-54xc-cpld.h" + +#ifdef DEBUG +#define DEBUG_PRINT(fmt, args...) \ + printk(KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#else +#define DEBUG_PRINT(fmt, args...) +#endif + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_read_byte_data(i2c_client, reg); \ + mutex_unlock(lock); \ + BSP_LOG_R("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, ret); \ +} + +#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \ + mutex_unlock(lock); \ + BSP_LOG_W("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, val); \ +} + +#define _SENSOR_DEVICE_ATTR_RO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IRUGO, read_##_func, NULL, _index) + +#define _SENSOR_DEVICE_ATTR_WO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IWUSR, NULL, write_##_func, _index) + +#define _SENSOR_DEVICE_ATTR_RW(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IRUGO | S_IWUSR, read_##_func, write_##_func, _index) + +#define _DEVICE_ATTR(_name) \ + &sensor_dev_attr_##_name.dev_attr.attr + +#define I2C_RW_RETRY_COUNT 3 +#define I2C_RW_RETRY_INTERVAL 60 + +/* CPLD sysfs attributes index */ +enum cpld_sysfs_attributes { + //CPLD 1 + + CPLD_BOARD_ID_0, + CPLD_BOARD_ID_1, + CPLD_ID, + CPLD_CHIP, + CPLD_SKU_EXT, + + CPLD_MAJOR_VER, + CPLD_MINOR_VER, + CPLD_BUILD_VER, + CPLD_VERSION_H, + + CPLD_MAC_INTR, + CPLD_HWM_INTR, + CPLD_CPLD2_INTR, + CPLD_NTM_INTR, + CPLD_FAN_PSU_INTR, + CPLD_SFP_IOEXP_INTR, + CPLD_CPU_NMI_INTR, + CPLD_PTP_INTR, + CPLD_SYSTEM_INTR, + + CPLD_MAC_MASK, + CPLD_HWM_MASK, + CPLD_CPLD2_MASK, + CPLD_NTM_MASK, + CPLD_FAN_PSU_MASK, + CPLD_SFP_IOEXP_MASK, + CPLD_CPU_NMI_MASK, + CPLD_PTP_MASK, + CPLD_SYSTEM_MASK, + + CPLD_MAC_EVT, + CPLD_HWM_EVT, + CPLD_CPLD2_EVT, + CPLD_NTM_EVT, + CPLD_FAN_PSU_EVT, + CPLD_SFP_IOEXP_EVT, + CPLD_CPU_NMI_EVT, + CPLD_PTP_EVT, + + CPLD_EVT_CTRL, + + CPLD_MAC_RESET, + CPLD_SYSTEM_RESET, + CPLD_BMC_NTM_RESET, + CPLD_USB_RESET, + CPLD_I2C_MUX_RESET, + CPLD_I2C_MUX_RESET_2, + CPLD_MISC_RESET, + + CPLD_BRD_PRESENT, + CPLD_PSU_STATUS, + CPLD_SYSTEM_PWR, + CPLD_MAC_SYNCE, + CPLD_MAC_AVS, + CPLD_SYSTEM_STATUS, + CPLD_FAN_PRESENT, + CPLD_WATCHDOG, + CPLD_BOOT_SELECT, + CPLD_MUX_CTRL, + CPLD_MISC_CTRL_1, + CPLD_MISC_CTRL_2, + CPLD_TIMING_CTRL, + + CPLD_MAC_TEMP, + + CPLD_SYSTEM_LED_SYNC, + CPLD_SYSTEM_LED_SYS, + CPLD_SYSTEM_LED_FAN, + CPLD_SYSTEM_LED_PSU_0, + CPLD_SYSTEM_LED_PSU_1, + CPLD_SYSTEM_LED_ID, + + DBG_CPLD_MAC_INTR, + DBG_CPLD_HWM_INTR, + DBG_CPLD_CPLD2_INTR, + DBG_CPLD_NTM_INTR, + DBG_CPLD_FAN_PSU_INTR, + DBG_CPLD_SFP_IOEXP_INTR, + DBG_CPLD_PTP_INTR, + + //CPLD 2 + + //interrupt status + CPLD_SFP_INTR_PRESENT_0_7, + CPLD_SFP_INTR_PRESENT_8_15, + CPLD_SFP_INTR_PRESENT_16_23, + CPLD_SFP_INTR_PRESENT_24_31, + CPLD_SFP_INTR_PRESENT_32_39, + CPLD_SFP_INTR_PRESENT_40_47, + CPLD_QSFP_INTR_PRESENT_48_53, + CPLD_QSFP_INTR_PORT_48_53, + + //interrupt mask + CPLD_SFP_MASK_PRESENT_0_7, + CPLD_SFP_MASK_PRESENT_8_15, + CPLD_SFP_MASK_PRESENT_16_23, + CPLD_SFP_MASK_PRESENT_24_31, + CPLD_SFP_MASK_PRESENT_32_39, + CPLD_SFP_MASK_PRESENT_40_47, + CPLD_QSFP_MASK_PRESENT_48_53, + CPLD_QSFP_MASK_PORT_48_53, + + //interrupt event + CPLD_SFP_EVT_PRESENT_0_7, + CPLD_SFP_EVT_PRESENT_8_15, + CPLD_SFP_EVT_PRESENT_16_23, + CPLD_SFP_EVT_PRESENT_24_31, + CPLD_SFP_EVT_PRESENT_32_39, + CPLD_SFP_EVT_PRESENT_40_47, + CPLD_QSFP_EVT_PRESENT_48_53, + CPLD_QSFP_EVT_PORT_48_53, + + CPLD_SFP_INTR_RX_LOS_0_7, + CPLD_SFP_INTR_RX_LOS_8_15, + CPLD_SFP_INTR_RX_LOS_16_23, + CPLD_SFP_INTR_RX_LOS_24_31, + CPLD_SFP_INTR_RX_LOS_32_39, + CPLD_SFP_INTR_RX_LOS_40_47, + + CPLD_SFP_INTR_TX_FAULT_0_7, + CPLD_SFP_INTR_TX_FAULT_8_15, + CPLD_SFP_INTR_TX_FAULT_16_23, + CPLD_SFP_INTR_TX_FAULT_24_31, + CPLD_SFP_INTR_TX_FAULT_32_39, + CPLD_SFP_INTR_TX_FAULT_40_47, + + CPLD_SFP_MASK_RX_LOS_0_7, + CPLD_SFP_MASK_RX_LOS_8_15, + CPLD_SFP_MASK_RX_LOS_16_23, + CPLD_SFP_MASK_RX_LOS_24_31, + CPLD_SFP_MASK_RX_LOS_32_39, + CPLD_SFP_MASK_RX_LOS_40_47, + + CPLD_SFP_MASK_TX_FAULT_0_7, + CPLD_SFP_MASK_TX_FAULT_8_15, + CPLD_SFP_MASK_TX_FAULT_16_23, + CPLD_SFP_MASK_TX_FAULT_24_31, + CPLD_SFP_MASK_TX_FAULT_32_39, + CPLD_SFP_MASK_TX_FAULT_40_47, + + CPLD_SFP_EVT_RX_LOS_0_7, + CPLD_SFP_EVT_RX_LOS_8_15, + CPLD_SFP_EVT_RX_LOS_16_23, + CPLD_SFP_EVT_RX_LOS_24_31, + CPLD_SFP_EVT_RX_LOS_32_39, + CPLD_SFP_EVT_RX_LOS_40_47, + + CPLD_SFP_EVT_TX_FAULT_0_7, + CPLD_SFP_EVT_TX_FAULT_8_15, + CPLD_SFP_EVT_TX_FAULT_16_23, + CPLD_SFP_EVT_TX_FAULT_24_31, + CPLD_SFP_EVT_TX_FAULT_32_39, + CPLD_SFP_EVT_TX_FAULT_40_47, + + CPLD_SFP_TX_DISABLE_0_7, + CPLD_SFP_TX_DISABLE_8_15, + CPLD_SFP_TX_DISABLE_16_23, + CPLD_SFP_TX_DISABLE_24_31, + CPLD_SFP_TX_DISABLE_32_39, + CPLD_SFP_TX_DISABLE_40_47, + + CPLD_QSFP_RESET_48_53, + CPLD_QSFP_LPMODE_48_53, + + //debug interrupt status + DBG_CPLD_SFP_INTR_PRESENT_0_7, + DBG_CPLD_SFP_INTR_PRESENT_8_15, + DBG_CPLD_SFP_INTR_PRESENT_16_23, + DBG_CPLD_SFP_INTR_PRESENT_24_31, + DBG_CPLD_SFP_INTR_PRESENT_32_39, + DBG_CPLD_SFP_INTR_PRESENT_40_47, + DBG_CPLD_QSFP_INTR_PRESENT_48_53, + DBG_CPLD_QSFP_INTR_PORT_48_53, + + //debug interrupt mask + DBG_CPLD_SFP_INTR_RX_LOS_0_7, + DBG_CPLD_SFP_INTR_RX_LOS_8_15, + DBG_CPLD_SFP_INTR_RX_LOS_16_23, + DBG_CPLD_SFP_INTR_RX_LOS_24_31, + DBG_CPLD_SFP_INTR_RX_LOS_32_39, + DBG_CPLD_SFP_INTR_RX_LOS_40_47, + + DBG_CPLD_SFP_INTR_TX_FAULT_0_7, + DBG_CPLD_SFP_INTR_TX_FAULT_8_15, + DBG_CPLD_SFP_INTR_TX_FAULT_16_23, + DBG_CPLD_SFP_INTR_TX_FAULT_24_31, + DBG_CPLD_SFP_INTR_TX_FAULT_32_39, + DBG_CPLD_SFP_INTR_TX_FAULT_40_47, + + //BSP DEBUG + BSP_DEBUG +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +/* CPLD sysfs attributes hook functions */ +static ssize_t read_cpld_callback(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_cpld_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static u8 _read_cpld_reg(struct device *dev, u8 reg, u8 mask); +static ssize_t read_cpld_reg(struct device *dev, char *buf, u8 reg, u8 mask); +static ssize_t write_cpld_reg(struct device *dev, const char *buf, size_t count, u8 reg, u8 mask); +static ssize_t read_bsp(char *buf, char *str); +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count); +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t read_cpld_version_h(struct device *dev, + struct device_attribute *da, + char *buf); + +static LIST_HEAD(cpld_client_list); /* client list for cpld */ +static struct mutex list_lock; /* mutex for client list */ + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +struct cpld_data { + int index; /* CPLD index */ + struct mutex access_lock; /* mutex for cpld access */ + u8 access_reg; /* register to access */ +}; + +typedef struct sysfs_info_s +{ + u8 reg; + u8 mask; + u8 permission; +} sysfs_info_t; + +static sysfs_info_t sysfs_info[] = { + //CPLD 1 + + [CPLD_BOARD_ID_0] = {CPLD_BOARD_ID_0_REG, MASK_ALL, PERM_R}, + [CPLD_BOARD_ID_1] = {CPLD_BOARD_ID_1_REG, MASK_ALL, PERM_R}, + [CPLD_ID] = {CPLD_ID_REG, MASK_ALL, PERM_R}, + [CPLD_CHIP] = {CPLD_CHIP_REG, MASK_ALL, PERM_R}, + [CPLD_SKU_EXT] = {CPLD_SKU_EXT_REG, MASK_ALL, PERM_R}, + + [CPLD_MAJOR_VER] = {CPLD_VERSION_REG, MASK_CPLD_MAJOR_VER, PERM_R}, + [CPLD_MINOR_VER] = {CPLD_VERSION_REG, MASK_CPLD_MINOR_VER, PERM_R}, + [CPLD_BUILD_VER] = {CPLD_BUILD_REG, MASK_ALL, PERM_R}, + [CPLD_VERSION_H] = {CPLD_VERSION_REG, MASK_ALL, PERM_R}, + + [CPLD_MAC_INTR] = {CPLD_MAC_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_HWM_INTR] = {CPLD_HWM_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_CPLD2_INTR] = {CPLD_CPLD2_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_NTM_INTR] = {CPLD_NTM_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_FAN_PSU_INTR] = {CPLD_FAN_PSU_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_IOEXP_INTR] = {CPLD_SFP_IOEXP_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_CPU_NMI_INTR] = {CPLD_CPU_NMI_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_PTP_INTR] = {CPLD_PTP_INTR_REG, MASK_ALL, PERM_R}, + [CPLD_SYSTEM_INTR] = {CPLD_SYSTEM_INTR_REG, MASK_ALL, PERM_R}, + + [CPLD_MAC_MASK] = {CPLD_MAC_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_HWM_MASK] = {CPLD_HWM_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_CPLD2_MASK] = {CPLD_CPLD2_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_NTM_MASK] = {CPLD_NTM_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_FAN_PSU_MASK] = {CPLD_FAN_PSU_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_IOEXP_MASK] = {CPLD_SFP_IOEXP_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_CPU_NMI_MASK] = {CPLD_CPU_NMI_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_PTP_MASK] = {CPLD_PTP_MASK_REG, MASK_ALL, PERM_RW}, + [CPLD_SYSTEM_MASK] = {CPLD_SYSTEM_MASK_REG, MASK_ALL, PERM_RW}, + + [CPLD_MAC_EVT] = {CPLD_MAC_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_HWM_EVT] = {CPLD_HWM_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_CPLD2_EVT] = {CPLD_CPLD2_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_NTM_EVT] = {CPLD_NTM_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_FAN_PSU_EVT] = {CPLD_FAN_PSU_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_IOEXP_EVT] = {CPLD_SFP_IOEXP_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_CPU_NMI_EVT] = {CPLD_CPU_NMI_EVT_REG, MASK_ALL, PERM_R}, + [CPLD_PTP_EVT] = {CPLD_PTP_EVT_REG, MASK_ALL, PERM_R}, + + [CPLD_EVT_CTRL] = {CPLD_EVT_CTRL_REG, MASK_ALL, PERM_RW}, + + [CPLD_MAC_RESET] = {CPLD_MAC_RESET_REG, MASK_ALL, PERM_RW}, + [CPLD_SYSTEM_RESET] = {CPLD_SYSTEM_RESET_REG, MASK_ALL, PERM_RW}, + [CPLD_BMC_NTM_RESET] = {CPLD_BMC_NTM_RESET_REG, MASK_ALL, PERM_RW}, + [CPLD_USB_RESET] = {CPLD_USB_RESET_REG, MASK_ALL, PERM_RW}, + [CPLD_I2C_MUX_RESET] = {CPLD_I2C_MUX_RESET_REG, MASK_ALL, PERM_RW}, + [CPLD_I2C_MUX_RESET_2] = {CPLD_I2C_MUX_RESET_2_REG, MASK_ALL, PERM_RW}, + [CPLD_MISC_RESET] = {CPLD_MISC_RESET_REG, MASK_ALL, PERM_RW}, + + [CPLD_BRD_PRESENT] = {CPLD_BRD_PRESENT_REG, MASK_ALL, PERM_R}, + [CPLD_PSU_STATUS] = {CPLD_PSU_STATUS_REG, MASK_ALL, PERM_R}, + [CPLD_SYSTEM_PWR] = {CPLD_SYSTEM_PWR_REG, MASK_ALL, PERM_R}, + [CPLD_MAC_SYNCE] = {CPLD_MAC_SYNCE_REG, MASK_ALL, PERM_R}, + [CPLD_MAC_AVS] = {CPLD_MAC_AVS_REG, MASK_ALL, PERM_R}, + [CPLD_SYSTEM_STATUS] = {CPLD_SYSTEM_STATUS_REG, MASK_ALL, PERM_R}, + [CPLD_FAN_PRESENT] = {CPLD_FAN_PRESENT_REG, MASK_ALL, PERM_R}, + [CPLD_WATCHDOG] = {CPLD_WATCHDOG_REG, MASK_ALL, PERM_RW}, + [CPLD_BOOT_SELECT] = {CPLD_BOOT_SELECT_REG, MASK_ALL, PERM_RW}, + [CPLD_MUX_CTRL] = {CPLD_MUX_CTRL_REG, MASK_ALL, PERM_RW}, + [CPLD_MISC_CTRL_1] = {CPLD_MISC_CTRL_1_REG, MASK_ALL, PERM_RW}, + [CPLD_MISC_CTRL_2] = {CPLD_MISC_CTRL_2_REG, MASK_ALL, PERM_RW}, + [CPLD_TIMING_CTRL] = {CPLD_TIMING_CTRL_REG, MASK_ALL, PERM_RW}, + + [CPLD_MAC_TEMP] = {CPLD_MAC_TEMP_REG, MASK_ALL, PERM_R}, + + [CPLD_SYSTEM_LED_SYNC] = {CPLD_SYSTEM_LED_SYNC_REG, CPLD_SYSTEM_LED_SYNC_MASK, PERM_RW}, + [CPLD_SYSTEM_LED_SYS] = {CPLD_SYSTEM_LED_SYS_REG, CPLD_SYSTEM_LED_SYS_MASK, PERM_RW}, + [CPLD_SYSTEM_LED_FAN] = {CPLD_SYSTEM_LED_FAN_REG, CPLD_SYSTEM_LED_FAN_MASK, PERM_RW}, + [CPLD_SYSTEM_LED_PSU_0] = {CPLD_SYSTEM_LED_PSU_REG, CPLD_SYSTEM_LED_PSU_0_MASK, PERM_RW}, + [CPLD_SYSTEM_LED_PSU_1] = {CPLD_SYSTEM_LED_PSU_REG, CPLD_SYSTEM_LED_PSU_1_MASK, PERM_RW}, + [CPLD_SYSTEM_LED_ID] = {CPLD_SYSTEM_LED_ID_REG, CPLD_SYSTEM_LED_ID_MASK, PERM_RW}, + + [DBG_CPLD_MAC_INTR] = {DBG_CPLD_MAC_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_HWM_INTR] = {DBG_CPLD_HWM_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_CPLD2_INTR] = {DBG_CPLD_CPLD2_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_NTM_INTR] = {DBG_CPLD_NTM_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_FAN_PSU_INTR] = {DBG_CPLD_FAN_PSU_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_SFP_IOEXP_INTR] = {DBG_CPLD_SFP_IOEXP_INTR_REG, MASK_ALL, PERM_RW}, + [DBG_CPLD_PTP_INTR] = {DBG_CPLD_PTP_INTR_REG, MASK_ALL, PERM_RW}, + + //CPLD 2 + + //interrupt status + [CPLD_SFP_INTR_PRESENT_0_7] = {CPLD_SFP_INTR_PRESENT_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_PRESENT_8_15] = {CPLD_SFP_INTR_PRESENT_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_PRESENT_16_23] = {CPLD_SFP_INTR_PRESENT_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_PRESENT_24_31] = {CPLD_SFP_INTR_PRESENT_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_PRESENT_32_39] = {CPLD_SFP_INTR_PRESENT_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_PRESENT_40_47] = {CPLD_SFP_INTR_PRESENT_40_47_REG, MASK_ALL, PERM_R}, + [CPLD_QSFP_INTR_PRESENT_48_53] = {CPLD_QSFP_INTR_PRESENT_48_53_REG, MASK_ALL, PERM_R}, + [CPLD_QSFP_INTR_PORT_48_53] = {CPLD_QSFP_INTR_PORT_48_53_REG, MASK_ALL, PERM_R}, + + //interrupt mask + [CPLD_SFP_MASK_PRESENT_0_7] = {CPLD_SFP_MASK_PRESENT_0_7_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_PRESENT_8_15] = {CPLD_SFP_MASK_PRESENT_8_15_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_PRESENT_16_23] = {CPLD_SFP_MASK_PRESENT_16_23_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_PRESENT_24_31] = {CPLD_SFP_MASK_PRESENT_24_31_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_PRESENT_32_39] = {CPLD_SFP_MASK_PRESENT_32_39_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_PRESENT_40_47] = {CPLD_SFP_MASK_PRESENT_40_47_REG, MASK_ALL, PERM_RW}, + [CPLD_QSFP_MASK_PRESENT_48_53] = {CPLD_QSFP_MASK_PRESENT_48_53_REG, MASK_ALL, PERM_RW}, + [CPLD_QSFP_MASK_PORT_48_53] = {CPLD_QSFP_MASK_PORT_48_53_REG, MASK_ALL, PERM_RW}, + + //interrupt event + [CPLD_SFP_EVT_PRESENT_0_7] = {CPLD_SFP_EVT_PRESENT_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_PRESENT_8_15] = {CPLD_SFP_EVT_PRESENT_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_PRESENT_16_23] = {CPLD_SFP_EVT_PRESENT_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_PRESENT_24_31] = {CPLD_SFP_EVT_PRESENT_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_PRESENT_32_39] = {CPLD_SFP_EVT_PRESENT_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_PRESENT_40_47] = {CPLD_SFP_EVT_PRESENT_40_47_REG, MASK_ALL, PERM_R}, + [CPLD_QSFP_EVT_PRESENT_48_53] = {CPLD_QSFP_EVT_PRESENT_48_53_REG, MASK_ALL, PERM_R}, + [CPLD_QSFP_EVT_PORT_48_53] = {CPLD_QSFP_EVT_PORT_48_53_REG, MASK_ALL, PERM_R}, + + [CPLD_SFP_INTR_RX_LOS_0_7] = {CPLD_SFP_INTR_RX_LOS_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_RX_LOS_8_15] = {CPLD_SFP_INTR_RX_LOS_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_RX_LOS_16_23] = {CPLD_SFP_INTR_RX_LOS_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_RX_LOS_24_31] = {CPLD_SFP_INTR_RX_LOS_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_RX_LOS_32_39] = {CPLD_SFP_INTR_RX_LOS_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_RX_LOS_40_47] = {CPLD_SFP_INTR_RX_LOS_40_47_REG, MASK_ALL, PERM_R}, + + [CPLD_SFP_INTR_TX_FAULT_0_7] = {CPLD_SFP_INTR_TX_FAULT_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_TX_FAULT_8_15] = {CPLD_SFP_INTR_TX_FAULT_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_TX_FAULT_16_23] = {CPLD_SFP_INTR_TX_FAULT_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_TX_FAULT_24_31] = {CPLD_SFP_INTR_TX_FAULT_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_TX_FAULT_32_39] = {CPLD_SFP_INTR_TX_FAULT_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_INTR_TX_FAULT_40_47] = {CPLD_SFP_INTR_TX_FAULT_40_47_REG, MASK_ALL, PERM_R}, + + [CPLD_SFP_MASK_RX_LOS_0_7] = {CPLD_SFP_MASK_RX_LOS_0_7_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_RX_LOS_8_15] = {CPLD_SFP_MASK_RX_LOS_8_15_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_RX_LOS_16_23] = {CPLD_SFP_MASK_RX_LOS_16_23_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_RX_LOS_24_31] = {CPLD_SFP_MASK_RX_LOS_24_31_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_RX_LOS_32_39] = {CPLD_SFP_MASK_RX_LOS_32_39_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_RX_LOS_40_47] = {CPLD_SFP_MASK_RX_LOS_40_47_REG, MASK_ALL, PERM_RW}, + + [CPLD_SFP_MASK_TX_FAULT_0_7] = {CPLD_SFP_MASK_TX_FAULT_0_7_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_TX_FAULT_8_15] = {CPLD_SFP_MASK_TX_FAULT_8_15_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_TX_FAULT_16_23] = {CPLD_SFP_MASK_TX_FAULT_16_23_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_TX_FAULT_24_31] = {CPLD_SFP_MASK_TX_FAULT_24_31_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_TX_FAULT_32_39] = {CPLD_SFP_MASK_TX_FAULT_32_39_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_MASK_TX_FAULT_40_47] = {CPLD_SFP_MASK_TX_FAULT_40_47_REG, MASK_ALL, PERM_RW}, + + [CPLD_SFP_EVT_RX_LOS_0_7] = {CPLD_SFP_EVT_RX_LOS_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_RX_LOS_8_15] = {CPLD_SFP_EVT_RX_LOS_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_RX_LOS_16_23] = {CPLD_SFP_EVT_RX_LOS_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_RX_LOS_24_31] = {CPLD_SFP_EVT_RX_LOS_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_RX_LOS_32_39] = {CPLD_SFP_EVT_RX_LOS_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_RX_LOS_40_47] = {CPLD_SFP_EVT_RX_LOS_40_47_REG, MASK_ALL, PERM_R}, + + [CPLD_SFP_EVT_TX_FAULT_0_7] = {CPLD_SFP_EVT_TX_FAULT_0_7_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_TX_FAULT_8_15] = {CPLD_SFP_EVT_TX_FAULT_8_15_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_TX_FAULT_16_23] = {CPLD_SFP_EVT_TX_FAULT_16_23_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_TX_FAULT_24_31] = {CPLD_SFP_EVT_TX_FAULT_24_31_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_TX_FAULT_32_39] = {CPLD_SFP_EVT_TX_FAULT_32_39_REG, MASK_ALL, PERM_R}, + [CPLD_SFP_EVT_TX_FAULT_40_47] = {CPLD_SFP_EVT_TX_FAULT_40_47_REG, MASK_ALL, PERM_R}, + + [CPLD_SFP_TX_DISABLE_0_7] = {CPLD_SFP_TX_DISABLE_0_7_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_TX_DISABLE_8_15] = {CPLD_SFP_TX_DISABLE_8_15_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_TX_DISABLE_16_23] = {CPLD_SFP_TX_DISABLE_16_23_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_TX_DISABLE_24_31] = {CPLD_SFP_TX_DISABLE_24_31_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_TX_DISABLE_32_39] = {CPLD_SFP_TX_DISABLE_32_39_REG, MASK_ALL, PERM_RW}, + [CPLD_SFP_TX_DISABLE_40_47] = {CPLD_SFP_TX_DISABLE_40_47_REG, MASK_ALL, PERM_RW}, + + [CPLD_QSFP_RESET_48_53] = {CPLD_QSFP_RESET_48_53_REG, MASK_ALL, PERM_RW}, + [CPLD_QSFP_LPMODE_48_53] = {CPLD_QSFP_LPMODE_48_53_REG, MASK_ALL, PERM_RW}, + + //debug interrupt status + [DBG_CPLD_SFP_INTR_PRESENT_0_7] = {DBG_CPLD_SFP_INTR_PRESENT_0_7_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_PRESENT_8_15] = {DBG_CPLD_SFP_INTR_PRESENT_8_15_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_PRESENT_16_23] = {DBG_CPLD_SFP_INTR_PRESENT_16_23_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_PRESENT_24_31] = {DBG_CPLD_SFP_INTR_PRESENT_24_31_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_PRESENT_32_39] = {DBG_CPLD_SFP_INTR_PRESENT_32_39_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_PRESENT_40_47] = {DBG_CPLD_SFP_INTR_PRESENT_40_47_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_QSFP_INTR_PRESENT_48_53] = {DBG_CPLD_QSFP_INTR_PRESENT_48_53_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_QSFP_INTR_PORT_48_53] = {DBG_CPLD_QSFP_INTR_PORT_48_53_REG, MASK_ALL, PERM_R}, + + //debug interrupt mask + [DBG_CPLD_SFP_INTR_RX_LOS_0_7] = {DBG_CPLD_SFP_INTR_RX_LOS_0_7_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_RX_LOS_8_15] = {DBG_CPLD_SFP_INTR_RX_LOS_8_15_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_RX_LOS_16_23] = {DBG_CPLD_SFP_INTR_RX_LOS_16_23_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_RX_LOS_24_31] = {DBG_CPLD_SFP_INTR_RX_LOS_24_31_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_RX_LOS_32_39] = {DBG_CPLD_SFP_INTR_RX_LOS_32_39_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_RX_LOS_40_47] = {DBG_CPLD_SFP_INTR_RX_LOS_40_47_REG, MASK_ALL, PERM_R}, + + [DBG_CPLD_SFP_INTR_TX_FAULT_0_7] = {DBG_CPLD_SFP_INTR_TX_FAULT_0_7_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_TX_FAULT_8_15] = {DBG_CPLD_SFP_INTR_TX_FAULT_8_15_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_TX_FAULT_16_23] = {DBG_CPLD_SFP_INTR_TX_FAULT_16_23_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_TX_FAULT_24_31] = {DBG_CPLD_SFP_INTR_TX_FAULT_24_31_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_TX_FAULT_32_39] = {DBG_CPLD_SFP_INTR_TX_FAULT_32_39_REG, MASK_ALL, PERM_R}, + [DBG_CPLD_SFP_INTR_TX_FAULT_40_47] = {DBG_CPLD_SFP_INTR_TX_FAULT_40_47_REG, MASK_ALL, PERM_R}, +}; + +/* CPLD device id and data */ +static const struct i2c_device_id cpld_id[] = { + { "s8901_54xc_cpld1", cpld1 }, + { "s8901_54xc_cpld2", cpld2 }, + {} +}; + +char bsp_debug[2]="0"; +u8 enable_log_read=LOG_DISABLE; +u8 enable_log_write=LOG_DISABLE; + +/* Addresses scanned for cpld */ +static const unsigned short cpld_i2c_addr[] = { 0x30, 0x31, I2C_CLIENT_END }; + +/* define all support register access of cpld in attribute */ + +// CPLD common +static _SENSOR_DEVICE_ATTR_RO(cpld_board_id_0, cpld_callback, CPLD_BOARD_ID_0); +static _SENSOR_DEVICE_ATTR_RO(cpld_board_id_1, cpld_callback, CPLD_BOARD_ID_1); +static _SENSOR_DEVICE_ATTR_RO(cpld_id, cpld_callback, CPLD_ID); +static _SENSOR_DEVICE_ATTR_RO(cpld_chip, cpld_callback, CPLD_CHIP); +static _SENSOR_DEVICE_ATTR_RO(cpld_sku_ext, cpld_callback, CPLD_SKU_EXT); + +static _SENSOR_DEVICE_ATTR_RO(cpld_major_ver, cpld_callback, CPLD_MAJOR_VER); +static _SENSOR_DEVICE_ATTR_RO(cpld_minor_ver, cpld_callback, CPLD_MINOR_VER); +static _SENSOR_DEVICE_ATTR_RO(cpld_build_ver, cpld_callback, CPLD_BUILD_VER); +static _SENSOR_DEVICE_ATTR_RO(cpld_version_h, cpld_version_h, CPLD_VERSION_H); + +static _SENSOR_DEVICE_ATTR_RW(cpld_evt_ctrl, cpld_callback, CPLD_EVT_CTRL); + +//CPLD 1 +static _SENSOR_DEVICE_ATTR_RO(cpld_mac_intr, cpld_callback, CPLD_MAC_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_hwm_intr, cpld_callback, CPLD_HWM_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_cpld2_intr, cpld_callback, CPLD_CPLD2_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_ntm_intr, cpld_callback, CPLD_NTM_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_fan_psu_intr, cpld_callback, CPLD_FAN_PSU_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_ioexp_intr, cpld_callback, CPLD_SFP_IOEXP_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_cpu_nmi_intr, cpld_callback, CPLD_CPU_NMI_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_ptp_intr, cpld_callback, CPLD_PTP_INTR); +static _SENSOR_DEVICE_ATTR_RO(cpld_system_intr, cpld_callback, CPLD_SYSTEM_INTR); + +static _SENSOR_DEVICE_ATTR_RW(cpld_mac_mask, cpld_callback, CPLD_MAC_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_hwm_mask, cpld_callback, CPLD_HWM_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_cpld2_mask, cpld_callback, CPLD_CPLD2_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_ntm_mask, cpld_callback, CPLD_NTM_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_fan_psu_mask, cpld_callback, CPLD_FAN_PSU_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_ioexp_mask, cpld_callback, CPLD_SFP_IOEXP_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_cpu_nmi_mask, cpld_callback, CPLD_CPU_NMI_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_ptp_mask, cpld_callback, CPLD_PTP_MASK); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_mask, cpld_callback, CPLD_SYSTEM_MASK); + +static _SENSOR_DEVICE_ATTR_RO(cpld_mac_evt, cpld_callback, CPLD_MAC_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_hwm_evt, cpld_callback, CPLD_HWM_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_cpld2_evt, cpld_callback, CPLD_CPLD2_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_ntm_evt, cpld_callback, CPLD_NTM_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_fan_psu_evt, cpld_callback, CPLD_FAN_PSU_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_ioexp_evt, cpld_callback, CPLD_SFP_IOEXP_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_cpu_nmi_evt, cpld_callback, CPLD_CPU_NMI_EVT); +static _SENSOR_DEVICE_ATTR_RO(cpld_ptp_evt, cpld_callback, CPLD_PTP_EVT); + +static _SENSOR_DEVICE_ATTR_RW(cpld_mac_reset, cpld_callback, CPLD_MAC_RESET); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_reset, cpld_callback, CPLD_SYSTEM_RESET); +static _SENSOR_DEVICE_ATTR_RW(cpld_bmc_ntm_reset, cpld_callback, CPLD_BMC_NTM_RESET); +static _SENSOR_DEVICE_ATTR_RW(cpld_usb_reset, cpld_callback, CPLD_USB_RESET); +static _SENSOR_DEVICE_ATTR_RW(cpld_i2c_mux_reset, cpld_callback, CPLD_I2C_MUX_RESET); +static _SENSOR_DEVICE_ATTR_RW(cpld_i2c_mux_reset_2, cpld_callback, CPLD_I2C_MUX_RESET_2); +static _SENSOR_DEVICE_ATTR_RW(cpld_misc_reset, cpld_callback, CPLD_MISC_RESET); + +static _SENSOR_DEVICE_ATTR_RO(cpld_psu_status, cpld_callback, CPLD_PSU_STATUS); +static _SENSOR_DEVICE_ATTR_RO(cpld_mac_synce, cpld_callback, CPLD_MAC_SYNCE); +static _SENSOR_DEVICE_ATTR_RO(cpld_fan_present, cpld_callback, CPLD_FAN_PRESENT); +static _SENSOR_DEVICE_ATTR_RW(cpld_mux_ctrl, cpld_callback, CPLD_MUX_CTRL); + +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_sync, cpld_callback, CPLD_SYSTEM_LED_SYNC); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_sys, cpld_callback, CPLD_SYSTEM_LED_SYS); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_fan, cpld_callback, CPLD_SYSTEM_LED_FAN); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_psu_0, cpld_callback, CPLD_SYSTEM_LED_PSU_0); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_psu_1, cpld_callback, CPLD_SYSTEM_LED_PSU_1); +static _SENSOR_DEVICE_ATTR_RW(cpld_system_led_id, cpld_callback, CPLD_SYSTEM_LED_ID); + +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_mac_intr, cpld_callback, DBG_CPLD_MAC_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_hwm_intr, cpld_callback, DBG_CPLD_HWM_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_cpld2_intr, cpld_callback, DBG_CPLD_CPLD2_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_ntm_intr, cpld_callback, DBG_CPLD_NTM_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_fan_psu_intr, cpld_callback, DBG_CPLD_FAN_PSU_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_ioexp_intr, cpld_callback, DBG_CPLD_SFP_IOEXP_INTR); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_ptp_intr, cpld_callback, DBG_CPLD_PTP_INTR); + +//CPLD 2 +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_0_7, cpld_callback, CPLD_SFP_INTR_PRESENT_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_8_15, cpld_callback, CPLD_SFP_INTR_PRESENT_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_16_23, cpld_callback, CPLD_SFP_INTR_PRESENT_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_24_31, cpld_callback, CPLD_SFP_INTR_PRESENT_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_32_39, cpld_callback, CPLD_SFP_INTR_PRESENT_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_present_40_47, cpld_callback, CPLD_SFP_INTR_PRESENT_40_47); + +static _SENSOR_DEVICE_ATTR_RO(cpld_qsfp_intr_present_48_53, cpld_callback, CPLD_QSFP_INTR_PRESENT_48_53); +static _SENSOR_DEVICE_ATTR_RO(cpld_qsfp_intr_port_48_53, cpld_callback, CPLD_QSFP_INTR_PORT_48_53); + +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_0_7, cpld_callback, CPLD_SFP_MASK_PRESENT_0_7); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_8_15, cpld_callback, CPLD_SFP_MASK_PRESENT_8_15); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_16_23, cpld_callback, CPLD_SFP_MASK_PRESENT_16_23); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_24_31, cpld_callback, CPLD_SFP_MASK_PRESENT_24_31); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_32_39, cpld_callback, CPLD_SFP_MASK_PRESENT_32_39); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_present_40_47, cpld_callback, CPLD_SFP_MASK_PRESENT_40_47); + +static _SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_present_48_53, cpld_callback, CPLD_QSFP_MASK_PRESENT_48_53); +static _SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_port_48_53, cpld_callback, CPLD_QSFP_MASK_PORT_48_53); + +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_0_7, cpld_callback, CPLD_SFP_EVT_PRESENT_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_8_15, cpld_callback, CPLD_SFP_EVT_PRESENT_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_16_23, cpld_callback, CPLD_SFP_EVT_PRESENT_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_24_31, cpld_callback, CPLD_SFP_EVT_PRESENT_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_32_39, cpld_callback, CPLD_SFP_EVT_PRESENT_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_present_40_47, cpld_callback, CPLD_SFP_EVT_PRESENT_40_47); + +static _SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_present_48_53, cpld_callback, CPLD_QSFP_EVT_PRESENT_48_53); +static _SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_port_48_53, cpld_callback, CPLD_QSFP_EVT_PORT_48_53); + +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_0_7, cpld_callback, CPLD_SFP_INTR_RX_LOS_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_8_15, cpld_callback, CPLD_SFP_INTR_RX_LOS_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_16_23, cpld_callback, CPLD_SFP_INTR_RX_LOS_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_24_31, cpld_callback, CPLD_SFP_INTR_RX_LOS_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_32_39, cpld_callback, CPLD_SFP_INTR_RX_LOS_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_rx_los_40_47, cpld_callback, CPLD_SFP_INTR_RX_LOS_40_47); + +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_0_7, cpld_callback, CPLD_SFP_INTR_TX_FAULT_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_8_15, cpld_callback, CPLD_SFP_INTR_TX_FAULT_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_16_23, cpld_callback, CPLD_SFP_INTR_TX_FAULT_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_24_31, cpld_callback, CPLD_SFP_INTR_TX_FAULT_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_32_39, cpld_callback, CPLD_SFP_INTR_TX_FAULT_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_intr_tx_fault_40_47, cpld_callback, CPLD_SFP_INTR_TX_FAULT_40_47); + +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_0_7, cpld_callback, CPLD_SFP_MASK_RX_LOS_0_7); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_8_15, cpld_callback, CPLD_SFP_MASK_RX_LOS_8_15); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_16_23, cpld_callback, CPLD_SFP_MASK_RX_LOS_16_23); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_24_31, cpld_callback, CPLD_SFP_MASK_RX_LOS_24_31); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_32_39, cpld_callback, CPLD_SFP_MASK_RX_LOS_32_39); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rx_los_40_47, cpld_callback, CPLD_SFP_MASK_RX_LOS_40_47); + +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_0_7, cpld_callback, CPLD_SFP_MASK_TX_FAULT_0_7); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_8_15, cpld_callback, CPLD_SFP_MASK_TX_FAULT_8_15); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_16_23, cpld_callback, CPLD_SFP_MASK_TX_FAULT_16_23); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_24_31, cpld_callback, CPLD_SFP_MASK_TX_FAULT_24_31); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_32_39, cpld_callback, CPLD_SFP_MASK_TX_FAULT_32_39); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_tx_fault_40_47, cpld_callback, CPLD_SFP_MASK_TX_FAULT_40_47); + +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_0_7, cpld_callback, CPLD_SFP_EVT_RX_LOS_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_8_15, cpld_callback, CPLD_SFP_EVT_RX_LOS_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_16_23, cpld_callback, CPLD_SFP_EVT_RX_LOS_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_24_31, cpld_callback, CPLD_SFP_EVT_RX_LOS_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_32_39, cpld_callback, CPLD_SFP_EVT_RX_LOS_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rx_los_40_47, cpld_callback, CPLD_SFP_EVT_RX_LOS_40_47); + +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_0_7, cpld_callback, CPLD_SFP_EVT_TX_FAULT_0_7); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_8_15, cpld_callback, CPLD_SFP_EVT_TX_FAULT_8_15); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_16_23, cpld_callback, CPLD_SFP_EVT_TX_FAULT_16_23); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_24_31, cpld_callback, CPLD_SFP_EVT_TX_FAULT_24_31); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_32_39, cpld_callback, CPLD_SFP_EVT_TX_FAULT_32_39); +static _SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_tx_fault_40_47, cpld_callback, CPLD_SFP_EVT_TX_FAULT_40_47); + +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_0_7, cpld_callback, CPLD_SFP_TX_DISABLE_0_7); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_8_15, cpld_callback, CPLD_SFP_TX_DISABLE_8_15); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_16_23, cpld_callback, CPLD_SFP_TX_DISABLE_16_23); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_24_31, cpld_callback, CPLD_SFP_TX_DISABLE_24_31); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_32_39, cpld_callback, CPLD_SFP_TX_DISABLE_32_39); +static _SENSOR_DEVICE_ATTR_RW(cpld_sfp_tx_disable_40_47, cpld_callback, CPLD_SFP_TX_DISABLE_40_47); + +static _SENSOR_DEVICE_ATTR_RW(cpld_qsfp_reset_48_53, cpld_callback, CPLD_QSFP_RESET_48_53); +static _SENSOR_DEVICE_ATTR_RW(cpld_qsfp_lpmode_48_53, cpld_callback, CPLD_QSFP_LPMODE_48_53); + +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_0_7, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_0_7); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_8_15, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_8_15); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_16_23, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_16_23); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_24_31, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_24_31); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_32_39, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_32_39); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_present_40_47, cpld_callback, DBG_CPLD_SFP_INTR_PRESENT_40_47); + +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_qsfp_intr_present_48_53, cpld_callback, DBG_CPLD_QSFP_INTR_PRESENT_48_53); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_qsfp_intr_port_48_53, cpld_callback, DBG_CPLD_QSFP_INTR_PORT_48_53); + +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_0_7, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_0_7); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_8_15, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_8_15); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_16_23, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_16_23); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_24_31, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_24_31); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_32_39, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_32_39); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_rx_los_40_47, cpld_callback, DBG_CPLD_SFP_INTR_RX_LOS_40_47); + +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_0_7, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_0_7); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_8_15, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_8_15); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_16_23, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_16_23); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_24_31, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_24_31); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_32_39, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_32_39); +static _SENSOR_DEVICE_ATTR_RW(dbg_cpld_sfp_intr_tx_fault_40_47, cpld_callback, DBG_CPLD_SFP_INTR_TX_FAULT_40_47); + +//BSP DEBUG +static _SENSOR_DEVICE_ATTR_RW(bsp_debug, bsp_callback, BSP_DEBUG); + +/* define support attributes of cpldx */ + +/* cpld 1 */ +static struct attribute *cpld1_attributes[] = { + _DEVICE_ATTR(cpld_board_id_0), + _DEVICE_ATTR(cpld_board_id_1), + + _DEVICE_ATTR(cpld_id), + _DEVICE_ATTR(cpld_chip), + _DEVICE_ATTR(cpld_sku_ext), + + _DEVICE_ATTR(cpld_major_ver), + _DEVICE_ATTR(cpld_minor_ver), + _DEVICE_ATTR(cpld_build_ver), + _DEVICE_ATTR(cpld_version_h), + + _DEVICE_ATTR(cpld_mac_intr), + _DEVICE_ATTR(cpld_hwm_intr), + _DEVICE_ATTR(cpld_cpld2_intr), + _DEVICE_ATTR(cpld_ntm_intr), + _DEVICE_ATTR(cpld_fan_psu_intr), + _DEVICE_ATTR(cpld_sfp_ioexp_intr), + _DEVICE_ATTR(cpld_cpu_nmi_intr), + _DEVICE_ATTR(cpld_ptp_intr), + _DEVICE_ATTR(cpld_system_intr), + + _DEVICE_ATTR(cpld_mac_mask), + _DEVICE_ATTR(cpld_hwm_mask), + _DEVICE_ATTR(cpld_cpld2_mask), + _DEVICE_ATTR(cpld_ntm_mask), + _DEVICE_ATTR(cpld_fan_psu_mask), + _DEVICE_ATTR(cpld_sfp_ioexp_mask), + _DEVICE_ATTR(cpld_cpu_nmi_mask), + _DEVICE_ATTR(cpld_ptp_mask), + _DEVICE_ATTR(cpld_system_mask), + + _DEVICE_ATTR(cpld_mac_evt), + _DEVICE_ATTR(cpld_hwm_evt), + _DEVICE_ATTR(cpld_cpld2_evt), + _DEVICE_ATTR(cpld_ntm_evt), + _DEVICE_ATTR(cpld_fan_psu_evt), + _DEVICE_ATTR(cpld_sfp_ioexp_evt), + _DEVICE_ATTR(cpld_cpu_nmi_evt), + _DEVICE_ATTR(cpld_ptp_evt), + + _DEVICE_ATTR(cpld_evt_ctrl), + + _DEVICE_ATTR(cpld_mac_reset), + _DEVICE_ATTR(cpld_system_reset), + _DEVICE_ATTR(cpld_bmc_ntm_reset), + _DEVICE_ATTR(cpld_usb_reset), + _DEVICE_ATTR(cpld_i2c_mux_reset), + _DEVICE_ATTR(cpld_i2c_mux_reset_2), + _DEVICE_ATTR(cpld_misc_reset), + + _DEVICE_ATTR(cpld_psu_status), + _DEVICE_ATTR(cpld_mac_synce), + _DEVICE_ATTR(cpld_fan_present), + _DEVICE_ATTR(cpld_mux_ctrl), + + _DEVICE_ATTR(cpld_system_led_sync), + _DEVICE_ATTR(cpld_system_led_sys), + _DEVICE_ATTR(cpld_system_led_fan), + _DEVICE_ATTR(cpld_system_led_psu_0), + _DEVICE_ATTR(cpld_system_led_psu_1), + _DEVICE_ATTR(cpld_system_led_id), + + _DEVICE_ATTR(dbg_cpld_mac_intr), + _DEVICE_ATTR(dbg_cpld_hwm_intr), + _DEVICE_ATTR(dbg_cpld_cpld2_intr), + _DEVICE_ATTR(dbg_cpld_ntm_intr), + _DEVICE_ATTR(dbg_cpld_fan_psu_intr), + _DEVICE_ATTR(dbg_cpld_sfp_ioexp_intr), + _DEVICE_ATTR(dbg_cpld_ptp_intr), + + _DEVICE_ATTR(bsp_debug), + + NULL +}; + +/* cpld 2 */ +static struct attribute *cpld2_attributes[] = { + _DEVICE_ATTR(cpld_id), + _DEVICE_ATTR(cpld_chip), + + _DEVICE_ATTR(cpld_major_ver), + _DEVICE_ATTR(cpld_minor_ver), + _DEVICE_ATTR(cpld_build_ver), + _DEVICE_ATTR(cpld_version_h), + + _DEVICE_ATTR(cpld_sfp_intr_present_0_7), + _DEVICE_ATTR(cpld_sfp_intr_present_8_15), + _DEVICE_ATTR(cpld_sfp_intr_present_16_23), + _DEVICE_ATTR(cpld_sfp_intr_present_24_31), + _DEVICE_ATTR(cpld_sfp_intr_present_32_39), + _DEVICE_ATTR(cpld_sfp_intr_present_40_47), + + _DEVICE_ATTR(cpld_qsfp_intr_present_48_53), + _DEVICE_ATTR(cpld_qsfp_intr_port_48_53), + + _DEVICE_ATTR(cpld_sfp_mask_present_0_7), + _DEVICE_ATTR(cpld_sfp_mask_present_8_15), + _DEVICE_ATTR(cpld_sfp_mask_present_16_23), + _DEVICE_ATTR(cpld_sfp_mask_present_24_31), + _DEVICE_ATTR(cpld_sfp_mask_present_32_39), + _DEVICE_ATTR(cpld_sfp_mask_present_40_47), + + _DEVICE_ATTR(cpld_qsfp_mask_present_48_53), + _DEVICE_ATTR(cpld_qsfp_mask_port_48_53), + + _DEVICE_ATTR(cpld_sfp_evt_present_0_7), + _DEVICE_ATTR(cpld_sfp_evt_present_8_15), + _DEVICE_ATTR(cpld_sfp_evt_present_16_23), + _DEVICE_ATTR(cpld_sfp_evt_present_24_31), + _DEVICE_ATTR(cpld_sfp_evt_present_32_39), + _DEVICE_ATTR(cpld_sfp_evt_present_40_47), + + _DEVICE_ATTR(cpld_qsfp_evt_present_48_53), + _DEVICE_ATTR(cpld_qsfp_evt_port_48_53), + + _DEVICE_ATTR(cpld_evt_ctrl), + + _DEVICE_ATTR(cpld_sfp_intr_rx_los_0_7), + _DEVICE_ATTR(cpld_sfp_intr_rx_los_8_15), + _DEVICE_ATTR(cpld_sfp_intr_rx_los_16_23), + _DEVICE_ATTR(cpld_sfp_intr_rx_los_24_31), + _DEVICE_ATTR(cpld_sfp_intr_rx_los_32_39), + _DEVICE_ATTR(cpld_sfp_intr_rx_los_40_47), + + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_0_7), + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_8_15), + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_16_23), + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_24_31), + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_32_39), + _DEVICE_ATTR(cpld_sfp_intr_tx_fault_40_47), + + _DEVICE_ATTR(cpld_sfp_mask_rx_los_0_7), + _DEVICE_ATTR(cpld_sfp_mask_rx_los_8_15), + _DEVICE_ATTR(cpld_sfp_mask_rx_los_16_23), + _DEVICE_ATTR(cpld_sfp_mask_rx_los_24_31), + _DEVICE_ATTR(cpld_sfp_mask_rx_los_32_39), + _DEVICE_ATTR(cpld_sfp_mask_rx_los_40_47), + + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_0_7), + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_8_15), + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_16_23), + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_24_31), + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_32_39), + _DEVICE_ATTR(cpld_sfp_mask_tx_fault_40_47), + + _DEVICE_ATTR(cpld_sfp_evt_rx_los_0_7), + _DEVICE_ATTR(cpld_sfp_evt_rx_los_8_15), + _DEVICE_ATTR(cpld_sfp_evt_rx_los_16_23), + _DEVICE_ATTR(cpld_sfp_evt_rx_los_24_31), + _DEVICE_ATTR(cpld_sfp_evt_rx_los_32_39), + _DEVICE_ATTR(cpld_sfp_evt_rx_los_40_47), + + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_0_7), + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_8_15), + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_16_23), + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_24_31), + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_32_39), + _DEVICE_ATTR(cpld_sfp_evt_tx_fault_40_47), + + _DEVICE_ATTR(cpld_sfp_tx_disable_0_7), + _DEVICE_ATTR(cpld_sfp_tx_disable_8_15), + _DEVICE_ATTR(cpld_sfp_tx_disable_16_23), + _DEVICE_ATTR(cpld_sfp_tx_disable_24_31), + _DEVICE_ATTR(cpld_sfp_tx_disable_32_39), + _DEVICE_ATTR(cpld_sfp_tx_disable_40_47), + + _DEVICE_ATTR(cpld_qsfp_reset_48_53), + _DEVICE_ATTR(cpld_qsfp_lpmode_48_53), + + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_0_7), + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_8_15), + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_16_23), + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_24_31), + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_32_39), + _DEVICE_ATTR(dbg_cpld_sfp_intr_present_40_47), + + _DEVICE_ATTR(dbg_cpld_qsfp_intr_present_48_53), + _DEVICE_ATTR(dbg_cpld_qsfp_intr_port_48_53), + + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_0_7), + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_8_15), + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_16_23), + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_24_31), + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_32_39), + _DEVICE_ATTR(dbg_cpld_sfp_intr_rx_los_40_47), + + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_0_7), + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_8_15), + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_16_23), + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_24_31), + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_32_39), + _DEVICE_ATTR(dbg_cpld_sfp_intr_tx_fault_40_47), + + NULL +}; + +/* cpld 1 attributes group */ +static const struct attribute_group cpld1_group = { + .attrs = cpld1_attributes, +}; + +/* cpld 2 attributes group */ +static const struct attribute_group cpld2_group = { + .attrs = cpld2_attributes, +}; + +/* reg shift */ +static u8 _shift(u8 mask) +{ + int i=0, mask_one=1; + + for(i=0; i<8; ++i) { + if ((mask & mask_one) == 1) + return i; + else + mask >>= 1; + } + + return -1; +} + +/* reg mask and shift */ +static u8 _mask_shift(u8 val, u8 mask) +{ + int shift=0; + + shift = _shift(mask); + + return (val & mask) >> shift; +} + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if ((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write)) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + len=sprintf(buf, "%s", str); + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + snprintf(str, str_len, "%s", buf); + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + + switch (attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + ssize_t ret = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(str); + ret = write_bsp(buf, str, str_len, count); + + if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + return ret; + default: + return -EINVAL; + } + return 0; +} + +/* get cpld register value */ +static ssize_t read_cpld_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + u8 mask = MASK_ALL; + + if (IS_PERM_R(sysfs_info[attr->index].permission)) { + reg = sysfs_info[attr->index].reg; + mask = sysfs_info[attr->index].mask; + } else { + dev_err(dev, "%s() error, attr->index=%d\n", __func__, attr->index); + return -EINVAL; + } + + return read_cpld_reg(dev, buf, reg, mask); +} + +/* set cpld register value */ +static ssize_t write_cpld_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + u8 mask = MASK_ALL; + + if (IS_PERM_W(sysfs_info[attr->index].permission)) { + reg = sysfs_info[attr->index].reg; + mask = sysfs_info[attr->index].mask; + } else { + dev_err(dev, "%s() error, attr->index=%d\n", __func__, attr->index); + return -EINVAL; + } + + return write_cpld_reg(dev, buf, count, reg, mask); +} + +/* get cpld register value */ +static u8 _read_cpld_reg(struct device *dev, + u8 reg, + u8 mask) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int reg_val; + + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + + if (unlikely(reg_val < 0)) { + return reg_val; + } else { + reg_val=_mask_shift(reg_val, mask); + return reg_val; + } +} + +/* get cpld register value */ +static ssize_t read_cpld_reg(struct device *dev, + char *buf, + u8 reg, + u8 mask) +{ + int reg_val; + + reg_val = _read_cpld_reg(dev, reg, mask); + if (unlikely(reg_val < 0)) { + dev_err(dev, "read_cpld_reg() error, reg_val=%d\n", reg_val); + return reg_val; + } else { + return sprintf(buf, "0x%02x\n", reg_val); + } +} + +/* set cpld register value */ +static ssize_t write_cpld_reg(struct device *dev, + const char *buf, + size_t count, + u8 reg, + u8 mask) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg_val, reg_val_now, shift; + int ret = 0; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + //apply continuous bits operation if mask is specified, discontinuous bits are not supported + if (mask != MASK_ALL) { + reg_val_now = _read_cpld_reg(dev, reg, MASK_ALL); + if (unlikely(reg_val_now < 0)) { + dev_err(dev, "write_cpld_reg() error, reg_val_now=%d\n", reg_val_now); + return reg_val_now; + } else { + //clear bits in reg_val_now by the mask + reg_val_now &= ~mask; + //get bit shift by the mask + shift = _shift(mask); + //calculate new reg_val + reg_val = reg_val_now | (reg_val << shift); + } + } + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + + if (unlikely(ret < 0)) { + dev_err(dev, "write_cpld_reg() error, return=%d\n", ret); + return ret; + } + + return count; +} + +/* get qsfp port config register value */ +static ssize_t read_cpld_version_h(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + if (attr->index >= CPLD_VERSION_H) { + return sprintf(buf, "%d.%02d.%03d", + _read_cpld_reg(dev, CPLD_VERSION_REG, MASK_CPLD_MAJOR_VER), + _read_cpld_reg(dev, CPLD_VERSION_REG, MASK_CPLD_MINOR_VER), + _read_cpld_reg(dev, CPLD_BUILD_REG, MASK_ALL)); + } + return -1; +} + +/* add valid cpld client to list */ +static void cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = NULL; + + node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + if (!node) { + dev_info(&client->dev, + "Can't allocate cpld_client_node for index %d\n", + client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +/* remove exist cpld client in list */ +static void cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + mutex_unlock(&list_lock); +} + +/* cpld drvier probe */ +static int cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct cpld_data *data = NULL; + int ret = -EPERM; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* init cpld data for client */ + i2c_set_clientdata(client, data); + mutex_init(&data->access_lock); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_info(&client->dev, + "i2c_check_functionality failed (0x%x)\n", + client->addr); + status = -EIO; + goto exit; + } + + /* get cpld id from device */ + ret = i2c_smbus_read_byte_data(client, CPLD_ID_REG); + + if (ret < 0) { + dev_info(&client->dev, + "fail to get cpld id (0x%x) at addr (0x%x)\n", + CPLD_ID_REG, client->addr); + status = -EIO; + goto exit; + } + + if (INVALID(ret, cpld1, cpld2)) { + dev_info(&client->dev, + "cpld id %d(device) not valid\n", ret); + //status = -EPERM; + //goto exit; + } + +#if 0 + /* change client name for each cpld with index */ + snprintf(client->name, sizeof(client->name), "%s_%d", client->name, + data->index); +#endif + + data->index = dev_id->driver_data; + + /* register sysfs hooks for different cpld group */ + dev_info(&client->dev, "probe cpld with index %d\n", data->index); + switch (data->index) { + case cpld1: + status = sysfs_create_group(&client->dev.kobj, + &cpld1_group); + break; + case cpld2: + status = sysfs_create_group(&client->dev.kobj, + &cpld2_group); + break; + default: + status = -EINVAL; + } + + if (status) + goto exit; + + dev_info(&client->dev, "chip found\n"); + + /* add probe chip to client list */ + cpld_add_client(client); + + return 0; +exit: + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &cpld2_group); + break; + default: + break; + } + return status; +} + +/* cpld drvier remove */ +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &cpld2_group); + break; + } + + cpld_remove_client(client); + return 0; +} + +static int s8901_54xc_cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int retry = I2C_RW_RETRY_COUNT; + int reg_val = 0; + struct cpld_data *data = i2c_get_clientdata(client); + + while (retry) { + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (unlikely(reg_val < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + + if (retry == 0) { + dev_err(&client->dev, "%s() retry %d times but still failed, reg=%x\n", __func__, I2C_RW_RETRY_COUNT, reg); + } + + continue; + } + + break; + } + + return reg_val; +} + +static int s8901_54xc_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value) +{ + int ret = 0, retry = I2C_RW_RETRY_COUNT; + struct cpld_data *data = i2c_get_clientdata(client); + + while (retry) { + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, value); + if (unlikely(ret < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + + if (retry == 0) { + dev_err(&client->dev, "%s() retry %d times but still failed, reg=%x\n", __func__, I2C_RW_RETRY_COUNT, reg); + } + + continue; + } + break; + } + + return ret; +} + +/* +int s8901_54xc_cpld_write(unsigned short cpld_addr, u8 reg, u8 value) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + ret = s8901_54xc_cpld_write_internal(cpld_node->client, reg, value); + break; + } else { + pr_err("cpld_node->client->addr=%x, cpld_addr=%x\n", cpld_node->client->addr, cpld_addr); + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(s8901_54xc_cpld_write); +*/ + +int s8901_54xc_cpld_psu_mux_sel(u8 mux_sel) +{ + unsigned short cpld_addr = cpld_i2c_addr[0]; + u8 reg = CPLD_MUX_CTRL_REG; + u8 reg_val = 0; + u8 psu_mux_mask = 0x06; + u8 mux_sel_val = 0; + + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + switch(mux_sel) { + case 0: + //psu 0 + mux_sel_val = 0x04; + break; + case 1: + //psu 1 + mux_sel_val = 0x02; + break; + default: + //bmc + mux_sel_val = psu_mux_mask; + break; + } + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + //read current reg value + reg_val = s8901_54xc_cpld_read_internal(cpld_node->client, reg); + //clear psu_mux_sel bits (bit 1 and 2) + reg_val &= ~psu_mux_mask; + //modify psu_mux_sel bits (bit 1 and 2) + reg_val |= mux_sel_val; + //write reg value + s8901_54xc_cpld_write_internal(cpld_node->client, reg, reg_val); + + break; + } else { + pr_err("cpld_node->client->addr=%x, cpld_addr=%x\n", cpld_node->client->addr, cpld_addr); + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(s8901_54xc_cpld_psu_mux_sel); + +MODULE_DEVICE_TABLE(i2c, cpld_id); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "x86_64_ufispace_s8901_54xc_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_id, + .address_list = cpld_i2c_addr, +}; + +static int __init cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&cpld_driver); +} + +static void __exit cpld_exit(void) +{ + i2c_del_driver(&cpld_driver); +} + +MODULE_AUTHOR("Jason Tsai "); +MODULE_DESCRIPTION("x86_64_ufispace_s8901_54xc_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(cpld_init); +module_exit(cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.h b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.h new file mode 100644 index 000000000000..36521635fdc6 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-cpld.h @@ -0,0 +1,269 @@ +/* header file for i2c cpld driver of ufispace_s8901_54xc + * + * Copyright (C) 2022 UfiSpace Technology Corporation. + * Jason Tsai + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef UFISPACE_S8901_54XC_CPLD_H +#define UFISPACE_S8901_54XC_CPLD_H + +/* CPLD device index value */ +enum cpld_id { + cpld1, + cpld2 +}; + +/* CPLD common registers */ +#define CPLD_VERSION_REG 0x02 +#define CPLD_ID_REG 0x03 +#define CPLD_BUILD_REG 0x04 +#define CPLD_CHIP_REG 0x05 + +#define CPLD_EVT_CTRL_REG 0x3F + +/* CPLD 1 registers */ +#define CPLD_BOARD_ID_0_REG 0x00 +#define CPLD_BOARD_ID_1_REG 0x01 +#define CPLD_SKU_EXT_REG 0x06 + +#define CPLD_MAC_INTR_REG 0x10 +#define CPLD_HWM_INTR_REG 0x13 +#define CPLD_CPLD2_INTR_REG 0x14 +#define CPLD_NTM_INTR_REG 0x15 +#define CPLD_FAN_PSU_INTR_REG 0x16 +#define CPLD_SFP_IOEXP_INTR_REG 0x18 +#define CPLD_CPU_NMI_INTR_REG 0x19 +#define CPLD_PTP_INTR_REG 0x1B +#define CPLD_SYSTEM_INTR_REG 0x1C + +#define CPLD_MAC_MASK_REG 0x20 +#define CPLD_HWM_MASK_REG 0x23 +#define CPLD_CPLD2_MASK_REG 0x24 +#define CPLD_NTM_MASK_REG 0x25 +#define CPLD_FAN_PSU_MASK_REG 0x26 +#define CPLD_SFP_IOEXP_MASK_REG 0x28 +#define CPLD_CPU_NMI_MASK_REG 0x29 +#define CPLD_PTP_MASK_REG 0x2B +#define CPLD_SYSTEM_MASK_REG 0x2C + +#define CPLD_MAC_EVT_REG 0x30 +#define CPLD_HWM_EVT_REG 0x33 +#define CPLD_CPLD2_EVT_REG 0x34 +#define CPLD_NTM_EVT_REG 0x35 +#define CPLD_FAN_PSU_EVT_REG 0x36 +#define CPLD_SFP_IOEXP_EVT_REG 0x38 +#define CPLD_CPU_NMI_EVT_REG 0x39 +#define CPLD_PTP_EVT_REG 0x3B + +#define CPLD_MAC_RESET_REG 0x40 +#define CPLD_SYSTEM_RESET_REG 0x41 +#define CPLD_BMC_NTM_RESET_REG 0x43 +#define CPLD_USB_RESET_REG 0x44 +#define CPLD_I2C_MUX_RESET_REG 0x46 +#define CPLD_I2C_MUX_RESET_2_REG 0x47 +#define CPLD_MISC_RESET_REG 0x48 + +#define CPLD_BRD_PRESENT_REG 0x50 +#define CPLD_PSU_STATUS_REG 0x51 +#define CPLD_SYSTEM_PWR_REG 0x52 +#define CPLD_MAC_SYNCE_REG 0x53 +#define CPLD_MAC_AVS_REG 0x54 +#define CPLD_SYSTEM_STATUS_REG 0x55 +#define CPLD_FAN_PRESENT_REG 0x56 +#define CPLD_WATCHDOG_REG 0x5A +#define CPLD_BOOT_SELECT_REG 0x5B +#define CPLD_MUX_CTRL_REG 0x5C +#define CPLD_MISC_CTRL_1_REG 0x5D +#define CPLD_MISC_CTRL_2_REG 0x5E +#define CPLD_TIMING_CTRL_REG 0x5F + +#define CPLD_MAC_TEMP_REG 0x61 + +/* +#define CPLD_SYSTEM_LED_SYS_FAN_REG 0x80 +#define CPLD_SYSTEM_LED_PSU_REG 0x81 +#define CPLD_SYSTEM_LED_SYNC_REG 0x82 +#define CPLD_SYSTEM_LED_ID_REG 0x84 +*/ +#define CPLD_SYSTEM_LED_PSU_REG 0x80 +#define CPLD_SYSTEM_LED_SYS_REG 0x81 +#define CPLD_SYSTEM_LED_SYNC_REG 0x82 +#define CPLD_SYSTEM_LED_FAN_REG 0x83 +#define CPLD_SYSTEM_LED_ID_REG 0x84 + +#define CPLD_MAC_PG_REG 0x90 +#define CPLD_MISC_PG_REG 0x92 +#define CPLD_MAC_PG_EN_REG 0x93 +#define CPLD_MISC_PG_EN_REG 0x95 + +#define DBG_CPLD_MAC_INTR_REG 0xE0 +#define DBG_CPLD_HWM_INTR_REG 0xE3 +#define DBG_CPLD_CPLD2_INTR_REG 0xE4 +#define DBG_CPLD_NTM_INTR_REG 0xE5 +#define DBG_CPLD_FAN_PSU_INTR_REG 0xE6 +#define DBG_CPLD_SFP_IOEXP_INTR_REG 0xE8 +#define DBG_CPLD_PTP_INTR_REG 0xEB + +#define CPLD_UPG_RESET_REG 0xF0 + +/* CPLD 2*/ + +//interrupt status +#define CPLD_SFP_INTR_PRESENT_0_7_REG 0x10 +#define CPLD_SFP_INTR_PRESENT_8_15_REG 0x11 +#define CPLD_SFP_INTR_PRESENT_16_23_REG 0x12 +#define CPLD_SFP_INTR_PRESENT_24_31_REG 0x13 +#define CPLD_SFP_INTR_PRESENT_32_39_REG 0x14 +#define CPLD_SFP_INTR_PRESENT_40_47_REG 0x15 +#define CPLD_QSFP_INTR_PRESENT_48_53_REG 0x16 +#define CPLD_QSFP_INTR_PORT_48_53_REG 0x17 + +//interrupt mask +#define CPLD_SFP_MASK_PRESENT_0_7_REG 0x20 +#define CPLD_SFP_MASK_PRESENT_8_15_REG 0x21 +#define CPLD_SFP_MASK_PRESENT_16_23_REG 0x22 +#define CPLD_SFP_MASK_PRESENT_24_31_REG 0x23 +#define CPLD_SFP_MASK_PRESENT_32_39_REG 0x24 +#define CPLD_SFP_MASK_PRESENT_40_47_REG 0x25 +#define CPLD_QSFP_MASK_PRESENT_48_53_REG 0x26 +#define CPLD_QSFP_MASK_PORT_48_53_REG 0x27 + +//interrupt event +#define CPLD_SFP_EVT_PRESENT_0_7_REG 0x30 +#define CPLD_SFP_EVT_PRESENT_8_15_REG 0x31 +#define CPLD_SFP_EVT_PRESENT_16_23_REG 0x32 +#define CPLD_SFP_EVT_PRESENT_24_31_REG 0x33 +#define CPLD_SFP_EVT_PRESENT_32_39_REG 0x34 +#define CPLD_SFP_EVT_PRESENT_40_47_REG 0x35 +#define CPLD_QSFP_EVT_PRESENT_48_53_REG 0x36 +#define CPLD_QSFP_EVT_PORT_48_53_REG 0x37 + +#define CPLD_SFP_INTR_RX_LOS_0_7_REG 0x40 +#define CPLD_SFP_INTR_RX_LOS_8_15_REG 0x41 +#define CPLD_SFP_INTR_RX_LOS_16_23_REG 0x42 +#define CPLD_SFP_INTR_RX_LOS_24_31_REG 0x43 +#define CPLD_SFP_INTR_RX_LOS_32_39_REG 0x44 +#define CPLD_SFP_INTR_RX_LOS_40_47_REG 0x45 + +#define CPLD_SFP_INTR_TX_FAULT_0_7_REG 0x46 +#define CPLD_SFP_INTR_TX_FAULT_8_15_REG 0x47 +#define CPLD_SFP_INTR_TX_FAULT_16_23_REG 0x48 +#define CPLD_SFP_INTR_TX_FAULT_24_31_REG 0x49 +#define CPLD_SFP_INTR_TX_FAULT_32_39_REG 0x4A +#define CPLD_SFP_INTR_TX_FAULT_40_47_REG 0x4B + +//#define CPLD_SFP_RX_LOS_BASE_REG 0x40 +//#define CPLD_SFP_TX_FAULT_BASE_REG 0x46 + +#define CPLD_SFP_MASK_RX_LOS_0_7_REG 0x50 +#define CPLD_SFP_MASK_RX_LOS_8_15_REG 0x51 +#define CPLD_SFP_MASK_RX_LOS_16_23_REG 0x52 +#define CPLD_SFP_MASK_RX_LOS_24_31_REG 0x53 +#define CPLD_SFP_MASK_RX_LOS_32_39_REG 0x54 +#define CPLD_SFP_MASK_RX_LOS_40_47_REG 0x55 + +#define CPLD_SFP_MASK_TX_FAULT_0_7_REG 0x56 +#define CPLD_SFP_MASK_TX_FAULT_8_15_REG 0x57 +#define CPLD_SFP_MASK_TX_FAULT_16_23_REG 0x58 +#define CPLD_SFP_MASK_TX_FAULT_24_31_REG 0x59 +#define CPLD_SFP_MASK_TX_FAULT_32_39_REG 0x5A +#define CPLD_SFP_MASK_TX_FAULT_40_47_REG 0x5B + +//#define CPLD_SFP_RX_LOS_MASK_BASE_REG 0x50 +//#define CPLD_SFP_TX_FAULT_MASK_BASE_REG 0x56 + +#define CPLD_SFP_EVT_RX_LOS_0_7_REG 0x60 +#define CPLD_SFP_EVT_RX_LOS_8_15_REG 0x61 +#define CPLD_SFP_EVT_RX_LOS_16_23_REG 0x62 +#define CPLD_SFP_EVT_RX_LOS_24_31_REG 0x63 +#define CPLD_SFP_EVT_RX_LOS_32_39_REG 0x64 +#define CPLD_SFP_EVT_RX_LOS_40_47_REG 0x65 + +#define CPLD_SFP_EVT_TX_FAULT_0_7_REG 0x66 +#define CPLD_SFP_EVT_TX_FAULT_8_15_REG 0x67 +#define CPLD_SFP_EVT_TX_FAULT_16_23_REG 0x68 +#define CPLD_SFP_EVT_TX_FAULT_24_31_REG 0x69 +#define CPLD_SFP_EVT_TX_FAULT_32_39_REG 0x6A +#define CPLD_SFP_EVT_TX_FAULT_40_47_REG 0x6B + +//#define CPLD_SFP_RX_LOS_EVT_BASE_REG 0x60 +//#define CPLD_SFP_TX_FAULT_EVT_BASE_REG 0x66 + +#define CPLD_SFP_TX_DISABLE_0_7_REG 0x70 +#define CPLD_SFP_TX_DISABLE_8_15_REG 0x71 +#define CPLD_SFP_TX_DISABLE_16_23_REG 0x72 +#define CPLD_SFP_TX_DISABLE_24_31_REG 0x73 +#define CPLD_SFP_TX_DISABLE_32_39_REG 0x74 +#define CPLD_SFP_TX_DISABLE_40_47_REG 0x75 + +//#define CPLD_SFP_TX_DISABLE_BASE_REG 0x70 +#define CPLD_QSFP_RESET_48_53_REG 0x76 +#define CPLD_QSFP_LPMODE_48_53_REG 0x77 + +//debug interrupt status +#define DBG_CPLD_SFP_INTR_PRESENT_BASE_REG 0xD0 +#define DBG_CPLD_SFP_INTR_PRESENT_0_7_REG 0xD0 +#define DBG_CPLD_SFP_INTR_PRESENT_8_15_REG 0xD1 +#define DBG_CPLD_SFP_INTR_PRESENT_16_23_REG 0xD2 +#define DBG_CPLD_SFP_INTR_PRESENT_24_31_REG 0xD3 +#define DBG_CPLD_SFP_INTR_PRESENT_32_39_REG 0xD4 +#define DBG_CPLD_SFP_INTR_PRESENT_40_47_REG 0xD5 +#define DBG_CPLD_QSFP_INTR_PRESENT_48_53_REG 0xD6 +#define DBG_CPLD_QSFP_INTR_PORT_48_53_REG 0xD7 + +//debug interrupt mask +#define DBG_CPLD_SFP_INTR_RX_LOS_0_7_REG 0xE0 +#define DBG_CPLD_SFP_INTR_RX_LOS_8_15_REG 0xE1 +#define DBG_CPLD_SFP_INTR_RX_LOS_16_23_REG 0xE2 +#define DBG_CPLD_SFP_INTR_RX_LOS_24_31_REG 0xE3 +#define DBG_CPLD_SFP_INTR_RX_LOS_32_39_REG 0xE4 +#define DBG_CPLD_SFP_INTR_RX_LOS_40_47_REG 0xE5 + +#define DBG_CPLD_SFP_INTR_TX_FAULT_0_7_REG 0xE6 +#define DBG_CPLD_SFP_INTR_TX_FAULT_8_15_REG 0xE7 +#define DBG_CPLD_SFP_INTR_TX_FAULT_16_23_REG 0xE8 +#define DBG_CPLD_SFP_INTR_TX_FAULT_24_31_REG 0xE9 +#define DBG_CPLD_SFP_INTR_TX_FAULT_32_39_REG 0xEA +#define DBG_CPLD_SFP_INTR_TX_FAULT_40_47_REG 0xEB + +//#define DBG_CPLD_SFP_RX_LOS_BASE_REG 0xE0 +//#define DBG_CPLD_SFP_TX_FAULT_BASE_REG 0xE6 + +//MASK +#define MASK_ALL (0xFF) +#define MASK_HB (0b11110000) +#define MASK_LB (0b00001111) +#define MASK_CPLD_MAJOR_VER (0b11000000) +#define MASK_CPLD_MINOR_VER (0b00111111) +#define CPLD_SYSTEM_LED_SYS_MASK MASK_HB +#define CPLD_SYSTEM_LED_FAN_MASK MASK_LB +#define CPLD_SYSTEM_LED_PSU_0_MASK MASK_LB +#define CPLD_SYSTEM_LED_PSU_1_MASK MASK_HB +#define CPLD_SYSTEM_LED_SYNC_MASK MASK_LB +#define CPLD_SYSTEM_LED_ID_MASK MASK_LB +#define CPLD_SFP_LED_MASK_0 (0b00000011) +#define CPLD_SFP_LED_MASK_1 (0b00001100) +#define PERM_R (0b00000001) +#define PERM_W (0b00000010) +#define PERM_RW (PERM_R | PERM_W) +#define IS_PERM_R(perm) (perm & PERM_R ? 1u : 0u) +#define IS_PERM_W(perm) (perm & PERM_W ? 1u : 0u) + +/* common manipulation */ +#define INVALID(i, min, max) ((i < min) || (i > max) ? 1u : 0u) + +#endif diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-lpc.c new file mode 100644 index 000000000000..72de01c48c4a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-lpc.c @@ -0,0 +1,883 @@ +/* + * A lpc driver for the ufispace_s8901_54xc + * + * Copyright (C) 2017-2022 UfiSpace Technology Corporation. + * Jason Tsai + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args) + +#define _SENSOR_DEVICE_ATTR_RO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IRUGO, read_##_func, NULL, _index) + +#define _SENSOR_DEVICE_ATTR_WO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IWUSR, NULL, write_##_func, _index) + +#define _SENSOR_DEVICE_ATTR_RW(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, S_IRUGO | S_IWUSR, read_##_func, write_##_func, _index) + +#define _DEVICE_ATTR(_name) \ + &sensor_dev_attr_##_name.dev_attr.attr + +#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args) + +#define DRIVER_NAME "x86_64_ufispace_s8901_54xc_lpc" + +/* LPC registers */ + +#define REG_BASE_MB 0x700 +#define REG_BASE_EC 0xE300 + +#define REG_NONE 0x00 +//MB CPLD +#define REG_BRD_ID_0 (REG_BASE_MB + 0x00) +#define REG_BRD_ID_1 (REG_BASE_MB + 0x01) +#define REG_CPLD_VERSION (REG_BASE_MB + 0x02) +#define REG_CPLD_ID (REG_BASE_MB + 0x03) +#define REG_CPLD_BUILD (REG_BASE_MB + 0x04) +#define REG_CPLD_CHIP (REG_BASE_MB + 0x05) +#define REG_BRD_EXT_ID (REG_BASE_MB + 0x06) +#define REG_I2C_MUX_RESET (REG_BASE_MB + 0x46) +#define REG_I2C_MUX_RESET_2 (REG_BASE_MB + 0x47) +#define REG_MUX_CTRL (REG_BASE_MB + 0x5C) +#define REG_MISC_CTRL (REG_BASE_MB + 0x5D) +#define REG_MISC_CTRL_2 (REG_BASE_MB + 0x5E) + +//EC +#define REG_BIOS_BOOT (REG_BASE_EC + 0x0C) +#define REG_CPU_REV (REG_BASE_EC + 0x17) + +// BMC mailbox +#define REG_TEMP_MAC_HWM (REG_BASE_MB + 0xC0) + +//MASK +#define MASK_ALL (0xFF) +#define MASK_CPLD_MAJOR_VER (0b11000000) +#define MASK_CPLD_MINOR_VER (0b00111111) +#define MASK_HW_ID (0b00000011) +#define MASK_DEPH_ID (0b00000100) +#define MASK_BUILD_ID (0b00011000) +#define MASK_EXT_ID (0b00000111) +#define MASK_MUX_RESET_ALL (0x37) // 2#00110111 +#define MASK_MUX_RESET (MASK_ALL) +#define MASK_BIOS_BOOT_ROM (0b01000000) + +#define LPC_MDELAY (5) +#define MDELAY_RESET_INTERVAL (100) +#define MDELAY_RESET_FINISH (500) + +/* LPC sysfs attributes index */ +enum lpc_sysfs_attributes { + //MB CPLD + ATT_BRD_ID_0, + ATT_BRD_ID_1, + ATT_BRD_SKU_ID, + ATT_BRD_HW_ID, + ATT_BRD_DEPH_ID, + ATT_BRD_BUILD_ID, + ATT_BRD_EXT_ID, + + ATT_CPLD_ID, + ATT_CPLD_BUILD, + ATT_CPLD_CHIP, + + ATT_CPLD_VERSION_MAJOR, + ATT_CPLD_VERSION_MINOR, + ATT_CPLD_VERSION_BUILD, + ATT_CPLD_VERSION_H, + + ATT_MUX_RESET, + ATT_MUX_CTRL, + + //EC + ATT_CPU_HW_ID, + ATT_CPU_DEPH_ID, + ATT_CPU_BUILD_ID, + ATT_BIOS_BOOT_ROM, + //BMC mailbox + ATT_TEMP_MAC_HWM, + + //BSP + ATT_BSP_VERSION, + ATT_BSP_DEBUG, + ATT_BSP_PR_INFO, + ATT_BSP_PR_ERR, + ATT_BSP_REG, + ATT_BSP_GPIO_MAX, + ATT_MAX +}; + +enum data_type { + DATA_HEX, + DATA_DEC, + DATA_S_DEC, + DATA_UNK, +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE, + LOG_SYS +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +struct lpc_data_s { + struct mutex access_lock; +}; + +typedef struct sysfs_info_s +{ + u16 reg; + u8 mask; + u8 data_type; +} sysfs_info_t; + +static sysfs_info_t sysfs_info[] = { + [ATT_BRD_ID_0] = {REG_BRD_ID_0, MASK_ALL, DATA_HEX}, + [ATT_BRD_ID_1] = {REG_BRD_ID_1, MASK_ALL, DATA_HEX}, + [ATT_BRD_SKU_ID] = {REG_BRD_ID_0, MASK_ALL, DATA_DEC}, + [ATT_BRD_HW_ID] = {REG_BRD_ID_1, MASK_HW_ID, DATA_DEC}, + [ATT_BRD_DEPH_ID] = {REG_BRD_ID_1, MASK_DEPH_ID, DATA_DEC}, + [ATT_BRD_BUILD_ID] = {REG_BRD_ID_1, MASK_BUILD_ID, DATA_DEC}, + [ATT_BRD_EXT_ID] = {REG_BRD_EXT_ID, MASK_EXT_ID, DATA_DEC}, + + [ATT_CPLD_ID] = {REG_CPLD_ID, MASK_ALL, DATA_DEC}, + [ATT_CPLD_BUILD] = {REG_CPLD_BUILD, MASK_ALL, DATA_DEC}, + [ATT_CPLD_CHIP] = {REG_CPLD_CHIP, MASK_ALL, DATA_DEC}, + + [ATT_CPLD_VERSION_MAJOR] = {REG_CPLD_VERSION, MASK_CPLD_MAJOR_VER, DATA_DEC}, + [ATT_CPLD_VERSION_MINOR] = {REG_CPLD_VERSION, MASK_CPLD_MINOR_VER, DATA_DEC}, + [ATT_CPLD_VERSION_BUILD] = {REG_CPLD_BUILD, MASK_ALL, DATA_DEC}, + [ATT_CPLD_VERSION_H] = {REG_CPLD_VERSION, MASK_ALL, DATA_UNK}, + + [ATT_MUX_RESET] = {REG_NONE, MASK_ALL, DATA_DEC}, + [ATT_MUX_CTRL] = {REG_MUX_CTRL, MASK_ALL, DATA_HEX}, + + //EC + [ATT_CPU_HW_ID] = {REG_CPU_REV, MASK_HW_ID, DATA_DEC}, + [ATT_CPU_DEPH_ID] = {REG_CPU_REV, MASK_DEPH_ID, DATA_DEC}, + [ATT_CPU_BUILD_ID] = {REG_CPU_REV, MASK_BUILD_ID, DATA_DEC}, + [ATT_BIOS_BOOT_ROM] = {REG_BIOS_BOOT, MASK_BIOS_BOOT_ROM, DATA_DEC}, + + //BMC mailbox + [ATT_TEMP_MAC_HWM] = {REG_TEMP_MAC_HWM , MASK_ALL, DATA_S_DEC}, + + //BSP + [ATT_BSP_VERSION] = {REG_NONE, MASK_ALL, DATA_UNK}, + [ATT_BSP_DEBUG] = {REG_NONE, MASK_ALL, DATA_UNK}, + [ATT_BSP_PR_INFO] = {REG_NONE, MASK_ALL, DATA_UNK}, + [ATT_BSP_PR_ERR] = {REG_NONE, MASK_ALL, DATA_UNK}, + [ATT_BSP_REG] = {REG_NONE, MASK_ALL, DATA_HEX}, +}; + +struct lpc_data_s *lpc_data; +char bsp_version[16]=""; +char bsp_debug[2]="0"; +char bsp_reg[8]="0x0"; +u8 enable_log_read = LOG_DISABLE; +u8 enable_log_write = LOG_DISABLE; +u8 enable_log_sys = LOG_ENABLE; +u8 mailbox_inited=0; + +/* reg shift */ +static u8 _shift(u8 mask) +{ + int i=0, mask_one=1; + + for(i=0; i<8; ++i) { + if ((mask & mask_one) == 1) + return i; + else + mask >>= 1; + } + + return -1; +} + +/* reg mask and shift */ +static u8 _mask_shift(u8 val, u8 mask) +{ + int shift=0; + + shift = _shift(mask); + + return (val & mask) >> shift; +} + +static u8 _parse_data(char *buf, unsigned int data, u8 data_type) +{ + if(buf == NULL) { + return -1; + } + + if(data_type == DATA_HEX) { + return sprintf(buf, "0x%02x", data); + } else if(data_type == DATA_DEC) { + return sprintf(buf, "%u", data); + } else { + return -1; + } + return 0; +} + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if ((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write) || + (log_type==LOG_SYS && enable_log_sys) ) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +static void _outb(u8 data, u16 port) +{ + outb(data, port); + mdelay(LPC_MDELAY); +} + +/* init bmc mailbox, get from BMC team */ +static int bmc_mailbox_init(void) +{ + if (mailbox_inited) { + return mailbox_inited; + } + + //Enable super io writing + _outb(0xa5, 0x2e); + _outb(0xa5, 0x2e); + + //Logic device number + _outb(0x07, 0x2e); + _outb(0x0e, 0x2f); + + //Disable mailbox + _outb(0x30, 0x2e); + _outb(0x00, 0x2f); + + //Set base address bit + _outb(0x60, 0x2e); + _outb(0x07, 0x2f); + _outb(0x61, 0x2e); + _outb(0xc0, 0x2f); + + //Select bit[3:0] of SIRQ + _outb(0x70, 0x2e); + _outb(0x07, 0x2f); + + //Low level trigger + _outb(0x71, 0x2e); + _outb(0x01, 0x2f); + + //Enable mailbox + _outb(0x30, 0x2e); + _outb(0x01, 0x2f); + + //Disable super io writing + _outb(0xaa, 0x2e); + + //Mailbox initial + _outb(0x00, 0x786); + _outb(0x00, 0x787); + + //set mailbox_inited + mailbox_inited = 1; + + return mailbox_inited; +} + +/* get lpc register value */ +static u8 _read_lpc_reg(u16 reg, u8 mask) +{ + u8 reg_val=0x0, reg_mk_shf_val = 0x0; + + mutex_lock(&lpc_data->access_lock); + reg_val = inb(reg); + mutex_unlock(&lpc_data->access_lock); + + reg_mk_shf_val = _mask_shift(reg_val, mask); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x, mask=0x%02x, reg_mk_shf_val=0x%02x", reg, reg_val, mask, reg_mk_shf_val); + + return reg_mk_shf_val; +} + +/* get lpc register value */ +static ssize_t read_lpc_reg(u16 reg, u8 mask, char *buf, u8 data_type) +{ + u8 reg_val; + int len=0; + + reg_val = _read_lpc_reg(reg, mask); + + // may need to change to hex value ? + len=_parse_data(buf, reg_val, data_type); + + return len; +} + +/* set lpc register value */ +static ssize_t write_lpc_reg(u16 reg, u8 mask, const char *buf, size_t count, u8 data_type) +{ + u8 reg_val, reg_val_now, shift; + + if (kstrtou8(buf, 0, ®_val) < 0) { + if(data_type == DATA_S_DEC) { + if (kstrtos8(buf, 0, ®_val) < 0) { + return -EINVAL; + } + } else { + return -EINVAL; + } + } + + //apply continuous bits operation if mask is specified, discontinuous bits are not supported + if (mask != MASK_ALL) { + reg_val_now = _read_lpc_reg(reg, MASK_ALL); + //clear bits in reg_val_now by the mask + reg_val_now &= ~mask; + //get bit shift by the mask + shift = _shift(mask); + //calculate new reg_val + reg_val = reg_val_now | (reg_val << shift); + } + + mutex_lock(&lpc_data->access_lock); + + _outb(reg_val, reg); + + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x, mask=0x%02x", reg, reg_val, mask); + + return count; +} + +/* get bsp value */ +static ssize_t read_bsp(char *buf, char *str) +{ + ssize_t len=0; + + mutex_lock(&lpc_data->access_lock); + len=sprintf(buf, "%s", str); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t write_bsp(const char *buf, char *str, size_t str_len, size_t count) +{ + mutex_lock(&lpc_data->access_lock); + snprintf(str, str_len, "%s", buf); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get gpio max value */ +static ssize_t read_gpio_max(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + if (attr->index == ATT_BSP_GPIO_MAX) { + return sprintf(buf, "%d\n", ARCH_NR_GPIOS-1); + } + return -1; +} + +/* get mb cpld version in human readable format */ +static ssize_t read_mb_cpld_version_h(struct device *dev, + struct device_attribute *da, char *buf) +{ + ssize_t len=0; + u8 major = 0, minor = 0, build = 0; + major = _read_lpc_reg(REG_CPLD_VERSION, MASK_CPLD_MAJOR_VER); + minor = _read_lpc_reg(REG_CPLD_VERSION, MASK_CPLD_MINOR_VER); + build = _read_lpc_reg(REG_CPLD_BUILD, MASK_ALL); + len=sprintf(buf, "%u.%02u.%03u", major, minor, build); + + return len; +} + +/* get lpc register value */ +static ssize_t read_lpc_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + u8 data_type = DATA_UNK; + + if (attr->index == ATT_BSP_REG) { + //copy value from bsp_reg + if (kstrtou16(bsp_reg, 0, ®) < 0) + return -EINVAL; + + data_type = sysfs_info[attr->index].data_type; + } else { + reg = sysfs_info[attr->index].reg; + mask = sysfs_info[attr->index].mask; + data_type = sysfs_info[attr->index].data_type; + } + + return read_lpc_reg(reg, mask, buf, data_type); +} + +/* set lpc register value */ +static ssize_t write_lpc_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_ALL; + u8 data_type = DATA_UNK; + + reg = sysfs_info[attr->index].reg; + mask = sysfs_info[attr->index].mask; + data_type = sysfs_info[attr->index].data_type; + + if(attr->index == ATT_TEMP_MAC_HWM) { + bmc_mailbox_init(); + } + + return write_lpc_reg(reg, mask, buf, count, data_type); +} + +/* get bsp parameter value */ +static ssize_t read_bsp_callback(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + char *str=NULL; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + break; + case ATT_BSP_REG: + str = bsp_reg; + break; + default: + return -EINVAL; + } + return read_bsp(buf, str); +} + +/* set bsp parameter value */ +static ssize_t write_bsp_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + u16 reg = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(bsp_version); + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + case ATT_BSP_REG: + if (kstrtou16(buf, 0, ®) < 0) + return -EINVAL; + + str = bsp_reg; + str_len = sizeof(bsp_reg); + break; + default: + return -EINVAL; + } + + if (attr->index == ATT_BSP_DEBUG) { + if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + } + + return write_bsp(buf, str, str_len, count); +} + +static ssize_t write_bsp_pr_callback(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len = strlen(buf); + + if(str_len <= 0) + return str_len; + + switch (attr->index) { + case ATT_BSP_PR_INFO: + BSP_PR(KERN_INFO, "%s", buf); + break; + case ATT_BSP_PR_ERR: + BSP_PR(KERN_ERR, "%s", buf); + break; + default: + return -EINVAL; + } + + return str_len; +} + +/* set mux_reset register value */ +static ssize_t write_mux_reset(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + u16 reg = REG_I2C_MUX_RESET; + u8 val = 0; + u8 mux_reset_reg_val = 0; + static int mux_reset_flag = 0; + + if (kstrtou8(buf, 0, &val) < 0) + return -EINVAL; + + if (mux_reset_flag == 0) { + if (val == 0) { + mutex_lock(&lpc_data->access_lock); + mux_reset_flag = 1; + BSP_LOG_W("i2c mux reset is triggered..."); + + //reset mux on SFP/QSFP ports + mux_reset_reg_val = inb(reg); + _outb((mux_reset_reg_val & (u8) (~MASK_MUX_RESET)), reg); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, mux_reset_reg_val & 0x0); + + //unset mux on SFP/QSFP ports + outb((mux_reset_reg_val | MASK_MUX_RESET), reg); + mdelay(500); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, mux_reset_reg_val | 0xFF); + + mux_reset_flag = 0; + mutex_unlock(&lpc_data->access_lock); + } else { + return -EINVAL; + } + } else { + BSP_LOG_W("i2c mux is resetting... (ignore)"); + mutex_lock(&lpc_data->access_lock); + mutex_unlock(&lpc_data->access_lock); + } + + return count; +} + +//SENSOR_DEVICE_ATTR - MB +static _SENSOR_DEVICE_ATTR_RO(board_id_0, lpc_callback, ATT_BRD_ID_0); +static _SENSOR_DEVICE_ATTR_RO(board_id_1, lpc_callback, ATT_BRD_ID_1); +static _SENSOR_DEVICE_ATTR_RO(board_sku_id, lpc_callback, ATT_BRD_SKU_ID); +static _SENSOR_DEVICE_ATTR_RO(board_hw_id, lpc_callback, ATT_BRD_HW_ID); +static _SENSOR_DEVICE_ATTR_RO(board_deph_id, lpc_callback, ATT_BRD_DEPH_ID); +static _SENSOR_DEVICE_ATTR_RO(board_build_id, lpc_callback, ATT_BRD_BUILD_ID); +static _SENSOR_DEVICE_ATTR_RO(board_ext_id, lpc_callback, ATT_BRD_EXT_ID); +static _SENSOR_DEVICE_ATTR_RO(cpld_version_major, lpc_callback, ATT_CPLD_VERSION_MAJOR); +static _SENSOR_DEVICE_ATTR_RO(cpld_version_minor, lpc_callback, ATT_CPLD_VERSION_MINOR); +static _SENSOR_DEVICE_ATTR_RO(cpld_version_build, lpc_callback, ATT_CPLD_VERSION_BUILD); +static _SENSOR_DEVICE_ATTR_RO(cpld_version_h, mb_cpld_version_h, ATT_CPLD_VERSION_H); +static _SENSOR_DEVICE_ATTR_RO(cpld_id, lpc_callback, ATT_CPLD_ID); + +static _SENSOR_DEVICE_ATTR_WO(mux_reset, mux_reset, ATT_MUX_RESET); +static _SENSOR_DEVICE_ATTR_RW(mux_ctrl, lpc_callback, ATT_MUX_CTRL); + +//SENSOR_DEVICE_ATTR - BMC mailbox +static _SENSOR_DEVICE_ATTR_WO(temp_mac_hwm , lpc_callback , ATT_TEMP_MAC_HWM); + +//SENSOR_DEVICE_ATTR - EC +static _SENSOR_DEVICE_ATTR_RO(cpu_hw_id, lpc_callback, ATT_CPU_HW_ID); +static _SENSOR_DEVICE_ATTR_RO(cpu_deph_id, lpc_callback, ATT_CPU_DEPH_ID); +static _SENSOR_DEVICE_ATTR_RO(cpu_build_id, lpc_callback, ATT_CPU_BUILD_ID); +static _SENSOR_DEVICE_ATTR_RO(bios_boot_rom, lpc_callback, ATT_BIOS_BOOT_ROM); + +//SENSOR_DEVICE_ATTR - BSP +static _SENSOR_DEVICE_ATTR_RW(bsp_version, bsp_callback, ATT_BSP_VERSION); +static _SENSOR_DEVICE_ATTR_RW(bsp_debug, bsp_callback, ATT_BSP_DEBUG); +static _SENSOR_DEVICE_ATTR_WO(bsp_pr_info, bsp_pr_callback, ATT_BSP_PR_INFO); +static _SENSOR_DEVICE_ATTR_WO(bsp_pr_err, bsp_pr_callback, ATT_BSP_PR_ERR); +static SENSOR_DEVICE_ATTR(bsp_reg, S_IRUGO | S_IWUSR, read_lpc_callback, write_bsp_callback, ATT_BSP_REG); +static SENSOR_DEVICE_ATTR(bsp_gpio_max, S_IRUGO, read_gpio_max, NULL, ATT_BSP_GPIO_MAX); + +static struct attribute *mb_cpld_attrs[] = { + _DEVICE_ATTR(board_id_0), + _DEVICE_ATTR(board_id_1), + _DEVICE_ATTR(board_sku_id), + _DEVICE_ATTR(board_hw_id), + _DEVICE_ATTR(board_deph_id), + _DEVICE_ATTR(board_build_id), + _DEVICE_ATTR(board_ext_id), + _DEVICE_ATTR(cpld_version_major), + _DEVICE_ATTR(cpld_version_minor), + _DEVICE_ATTR(cpld_version_build), + _DEVICE_ATTR(cpld_version_h), + _DEVICE_ATTR(cpld_id), + _DEVICE_ATTR(mux_reset), + _DEVICE_ATTR(mux_ctrl), + NULL, +}; + +static struct attribute *bsp_attrs[] = { + _DEVICE_ATTR(bsp_version), + _DEVICE_ATTR(bsp_debug), + _DEVICE_ATTR(bsp_pr_info), + _DEVICE_ATTR(bsp_pr_err), + _DEVICE_ATTR(bsp_reg), + _DEVICE_ATTR(bsp_gpio_max), + NULL, +}; + +static struct attribute *ec_attrs[] = { + _DEVICE_ATTR(cpu_hw_id), + _DEVICE_ATTR(cpu_deph_id), + _DEVICE_ATTR(cpu_build_id), + _DEVICE_ATTR(bios_boot_rom), + NULL, +}; + +static struct attribute *bmc_mailbox_attrs[] = { + _DEVICE_ATTR(temp_mac_hwm), + NULL, +}; + +static struct attribute_group mb_cpld_attr_grp = { + .name = "mb_cpld", + .attrs = mb_cpld_attrs, +}; + +static struct attribute_group bsp_attr_grp = { + .name = "bsp", + .attrs = bsp_attrs, +}; + +static struct attribute_group ec_attr_grp = { + .name = "ec", + .attrs = ec_attrs, +}; + +static struct attribute_group bmc_mailbox_attr_grp = { + .name = "bmc_mailbox", + .attrs = bmc_mailbox_attrs, +}; + +static void lpc_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device lpc_dev = { + .name = DRIVER_NAME, + .id = -1, + .dev = { + .release = lpc_dev_release, + } +}; + +static int lpc_drv_probe(struct platform_device *pdev) +{ + int i = 0, grp_num = 4; + int err[4] = {0}; + struct attribute_group *grp; + + lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s), + GFP_KERNEL); + if (!lpc_data) + return -ENOMEM; + + mutex_init(&lpc_data->access_lock); + + for (i=0; idev.kobj, grp); + if (err[i]) { + printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name); + goto exit; + } else { + continue; + } + } + + return 0; + +exit: + for (i=0; idev.kobj, grp); + if (!err[i]) { + //remove previous successful cases + continue; + } else { + //remove first failed case, then return + return err[i]; + } + } + return 0; +} + +static int lpc_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bmc_mailbox_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &ec_attr_grp); + + return 0; +} + +static struct platform_driver lpc_drv = { + .probe = lpc_drv_probe, + .remove = __exit_p(lpc_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int lpc_init(void) +{ + int err = 0; + + err = platform_driver_register(&lpc_drv); + if (err) { + printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n", + __func__, __LINE__, err); + + return err; + } + + err = platform_device_register(&lpc_dev); + if (err) { + printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n", + __func__, __LINE__, err); + platform_driver_unregister(&lpc_drv); + return err; + } + + return err; +} + +void lpc_exit(void) +{ + platform_driver_unregister(&lpc_drv); + platform_device_unregister(&lpc_dev); +} + +MODULE_AUTHOR("Jason Tsai "); +MODULE_DESCRIPTION("x86_64_ufispace_s8901_54xc_lpc driver"); +MODULE_LICENSE("GPL"); + +module_init(lpc_init); +module_exit(lpc_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-sys-eeprom.c new file mode 100644 index 000000000000..f9f7728deb3d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/modules/x86-64-ufispace-s8901-54xc-sys-eeprom.c @@ -0,0 +1,272 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* enable dev_dbg print out */ +//#define DEBUG + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57,*/ I2C_CLIENT_END }; + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 512 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void sys_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF)); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + sys_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + int ret; + int i; + u8 cmd; + u16 value16; + + dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count); + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + mutex_lock(&data->update_lock); + + for(i=0; i < count; i++) { + /* write command */ + cmd = (off >> 8) & 0xff; + value16 = off & 0xff; + value16 |= buf[i] << 8; + ret = i2c_smbus_write_word_data(client, cmd, value16); + + if (ret < 0) { + dev_err(&client->dev, "write address failed at %d \n", (int)off); + goto exit; + } + + off++; + + /* need to wait for write complete */ + udelay(10000); + } +exit: + mutex_unlock(&data->update_lock); + /* force to update client when reading */ + for(i=0; i < SLICE_NUM; i++) { + data->last_updated[i] = 0; + } + + return count; +} + +static struct bin_attribute sys_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUSR, + }, + .size = EEPROM_SIZE, + .read = sys_eeprom_read, + .write = sys_eeprom_write, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline + attaching to addresses >= 0x56 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int sys_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + +#ifdef __STDC_LIB_EXT1__ + memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE); +#else + memset(data->data, 0xff, EEPROM_SIZE); +#endif + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int sys_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id sys_eeprom_id[] = { + { "sys_eeprom", 0 }, + { } +}; + +static struct i2c_driver sys_eeprom_driver = { + .driver = { + .name = "sys_eeprom", + }, + .probe = sys_eeprom_probe, + .remove = sys_eeprom_remove, + .id_table = sys_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = sys_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(sys_eeprom_driver); + +MODULE_AUTHOR("Jason "); +MODULE_DESCRIPTION("UfiSpace System EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/service/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/service/pddf-platform-init.service new file mode 120000 index 000000000000..0fd9f25b6c5e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/service/pddf-platform-init.service @@ -0,0 +1 @@ +../../../../pddf/i2c/service/pddf-platform-init.service \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/__init__.py new file mode 100644 index 000000000000..593867d31c9d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/__init__.py @@ -0,0 +1,4 @@ +# All the derived classes for PDDF +__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan"] +from . import platform + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/chassis.py new file mode 100644 index 000000000000..085f2af2ff85 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/chassis.py @@ -0,0 +1,193 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Chassis API +# +############################################################################# + +try: + import time + from sonic_platform_pddf_base.pddf_chassis import PddfChassis +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_COMPONENT = 4 + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + + SYSLED_DEV_NAME = "SYS_LED" + port_dict = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + self._initialize_components() + + def _initialize_components(self): + from sonic_platform.component import Component + for index in range(NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + # return device_info.get_hwsku() + return self._eeprom.platform_name_str() + + def initizalize_system_led(self): + return True + + def get_status_led(self): + return self.get_system_led(self.SYSLED_DEV_NAME) + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + Returns: + (bool, dict): + - bool: True if call successful, False if not; + - dict: A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, where device_id is the device ID + for this device and device_event. + The known devices's device_id and device_event was defined as table below. + ----------------------------------------------------------------- + device | device_id | device_event | annotate + ----------------------------------------------------------------- + 'fan' '' '0' Fan removed + '1' Fan inserted + 'sfp' '' '0' Sfp removed + '1' Sfp inserted + '2' I2C bus stuck + '3' Bad eeprom + '4' Unsupported cable + '5' High Temperature + '6' Bad cable + 'voltage' '' '0' Vout normal + '1' Vout abnormal + -------------------------------------------------------------------- + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'}, + 'voltage':{'U20':'0', 'U21':'1'}} + Indicates that: + fan 0 has been removed, fan 2 has been inserted. + sfp 11 has been removed, sfp 12 has been inserted. + monitored voltage U20 became normal, voltage U21 became abnormal. + Note: For sfp, when event 3-6 happened, the module will not be avalaible, + XCVRD shall stop to read eeprom before SFP recovered from error status. + """ + + change_event_dict = {"fan": {}, "sfp": {}, "voltage": {}} + + start_time = time.time() + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print("get_change_event:Invalid timeout value", timeout) + return False, change_event_dict + + end_time = start_time + timeout + if start_time > end_time: + print( + "get_change_event:" "time wrap / invalid timeout value", + timeout, + ) + return False, change_event_dict # Time wrap or possibly incorrect timeout + try: + while timeout >= 0: + # check for sfp + sfp_change_dict = self.get_transceiver_change_event() + # check for fan + # fan_change_dict = self.get_fan_change_event() + # check for voltage + # voltage_change_dict = self.get_voltage_change_event() + + if sfp_change_dict: + change_event_dict["sfp"] = sfp_change_dict + # change_event_dict["fan"] = fan_change_dict + # change_event_dict["voltage"] = voltage_change_dict + return True, change_event_dict + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, change_event_dict + except Exception as e: + print(e) + print("get_change_event: Should not reach here.") + return False, change_event_dict + + def get_transceiver_change_event(self): + current_port_dict = {} + ret_dict = {} + + # Check for OIR events and return ret_dict + for index in range(self.platform_inventory['num_ports']): + if self._sfp_list[index].get_presence(): + #current_port_dict[index] = self.STATUS_INSERTED + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['inserted'] + else: + #current_port_dict[index] = self.STATUS_REMOVED + current_port_dict[index] = self.plugin_data['XCVR']['plug_status']['removed'] + + if len(self.port_dict) == 0: # first time + self.port_dict = current_port_dict + return {} + + if current_port_dict == self.port_dict: + return {} + + # Update reg value + for index, status in current_port_dict.items(): + if self.port_dict[index] != status: + ret_dict[index] = status + #ret_dict[str(index)] = status + self.port_dict = current_port_dict + for index, status in ret_dict.items(): + if int(status) == 1: + pass + #self._sfp_list[int(index)].check_sfp_optoe_type() + return ret_dict + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + reboot_cause_path = self.plugin_data['REBOOT_CAUSE']['reboot_cause_file'] + + try: + with open(reboot_cause_path, 'r', errors='replace') as fd: + data = fd.read() + sw_reboot_cause = data.strip() + except IOError: + sw_reboot_cause = "Unknown" + + return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/component.py new file mode 100644 index 000000000000..1c583079f8c2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/component.py @@ -0,0 +1,125 @@ +############################################################################# +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +try: + import subprocess + from sonic_platform_base.component_base import ComponentBase + from sonic_platform_pddf_base import pddfapi +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +CPLD_SYSFS = { + "CPLD1": {"major": "cpld1_major_ver", "minor": "cpld1_minor_ver", "build": "cpld1_build"}, + "CPLD2": {"major": "cpld2_major_ver", "minor": "cpld2_minor_ver", "build": "cpld2_build"}, +} + +BMC_CMDS = { + "VER1": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f1", + "VER2": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f2", + "VER3": "echo $((`ipmitool mc info | grep 'Aux Firmware Rev Info' -A 2 | sed -n '2p'` + 0))", +} + +BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version" +COMPONENT_LIST= [ + ("CPLD1", "CPLD 1"), + ("CPLD2", "CPLD 2"), + ("BIOS", "Basic Input/Output System"), + ("BMC", "BMC"), +] + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index=0): + self.pddf_obj = pddfapi.PddfApi() + self.index = component_index + self.name = self.get_name() + + def _get_bios_version(self): + # Retrieves the BIOS firmware version + try: + with open(BIOS_VERSION_PATH, 'r') as fd: + bios_version = fd.read() + return bios_version.strip() + except Exception as e: + return None + + def _get_cpld_version(self): + # Retrieves the CPLD firmware version + cpld_version = dict() + for cpld_name, elem in CPLD_SYSFS.items(): + device = "SYSSTATUS" + major = self.pddf_obj.get_attr_name_output(device, elem["major"]) + minor = self.pddf_obj.get_attr_name_output(device, elem["minor"]) + build = self.pddf_obj.get_attr_name_output(device, elem["build"]) + if major and minor and build: + major = int(major['status'].rstrip(),0) + minor = int(minor['status'].rstrip(),0) + build = int(build['status'].rstrip(),0) + cpld_version[cpld_name] = "{}.{:02d}.{:03d}".format(major, minor, build) + else: + cpld_version[cpld_name] = "N/A" + return cpld_version + + def _get_bmc_version(self): + # Retrieves the BMC firmware version + bmc_ver = dict() + for ver in BMC_CMDS: + status, value = subprocess.getstatusoutput(BMC_CMDS[ver]) + if not status: + bmc_ver[ver] = int(value.rstrip()) + else: + return None + + bmc_version = "{}.{}.{}".format(bmc_ver["VER1"], bmc_ver["VER2"], bmc_ver["VER3"]) + + return bmc_version + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_LIST[self.index][0] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + return COMPONENT_LIST[self.index][1] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = None + + if self.name == "BIOS": + fw_version = self._get_bios_version() + elif "CPLD" in self.name: + cpld_version = self._get_cpld_version() + fw_version = cpld_version.get(self.name) + elif self.name == "BMC": + fw_version = self._get_bmc_version() + return fw_version + + def install_firmware(self, image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/eeprom.py new file mode 100644 index 000000000000..90ab1c779a48 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Eeprom(PddfEeprom): + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfEeprom.__init__(self, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + + def platform_name_str(self): + (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_PLATFORM_NAME) + if not is_valid: + return "N/A" + + return results[2].decode('ascii') \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/fan.py new file mode 100644 index 000000000000..c3cb875646b0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/fan.py @@ -0,0 +1,158 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten + # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake' + + def get_mfr_id(self): + """ + Retrieves the manufacturer id of the device + + Returns: + string: Manufacturer Id of device + """ + if self.is_psu_fan: + device = "PSU{}".format(self.fans_psu_index) + output = self.pddf_obj.get_attr_name_output(device, "psu_mfr_id") + else: + raise NotImplementedError + + if not output: + return None + + mfr = output['status'] + + # strip_non_ascii + stripped = (c for c in mfr if 0 < ord(c) < 127) + mfr = ''.join(stripped) + + return mfr.rstrip('\n') + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + if self.is_psu_fan: + device = "PSU{}".format(self.fans_psu_index) + output = self.pddf_obj.get_attr_name_output(device, "psu_model_name") + else: + raise NotImplementedError + + if not output: + return None + + model = output['status'] + + # strip_non_ascii + stripped = (c for c in model if 0 < ord(c) < 127) + model = ''.join(stripped) + + return model.rstrip('\n') + + def get_max_speed(self): + """ + Retrieves the max speed + + Returns: + An Integer, the max speed + """ + if self.is_psu_fan: + mfr = self.get_mfr_id() + model = self.get_model() + + max_speed = int(self.plugin_data['PSU']['valmap']['PSU_FAN_MAX_SPEED_AC']) + if mfr and model : + for dev in self.plugin_data['PSU']['psu_support_list']: + if dev['Manufacturer'] == mfr and dev['Name'] == model: + max_speed = int(self.plugin_data['PSU']['valmap'][dev['MaxSpd']]) + break + else: + max_speed = int(self.plugin_data['FAN']['FAN_MAX_SPEED']) + + return max_speed + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed_percentage = 0 + + max_speed = self.get_max_speed() + rpm_speed = self.get_speed_rpm() + + speed_percentage = round((rpm_speed*100)/max_speed) + + return min(speed_percentage, 100) + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + if self.is_psu_fan: + attr_name = "psu_present" + device = "PSU{}".format(self.fans_psu_index) + else: + idx = (self.fantray_index-1)*self.platform['num_fans_pertray'] + self.fan_index + attr_name = "fan" + str(idx) + "_present" + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr_name) + if not output: + return False + + mode = output['mode'] + presence = output['status'].rstrip() + vmap = self.plugin_data['FAN']['present'][mode]['valmap'] + + if presence in vmap: + status = vmap[presence] + else: + status = False + + return status + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + return self.get_speed() + + def set_speed(self, speed): + """ + Sets the fan speed + + Args: + speed: An integer, the percentage of full fan speed to set fan to, + in the range 0 (off) to 100 (full speed) + + Returns: + A boolean, True if speed is set successfully, False if not + """ + + print("Setting Fan speed is not allowed") + return False diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/fan_drawer.py new file mode 100644 index 000000000000..3b9bb607f632 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/fan_drawer.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(PddfFanDrawer): + """PDDF Platform-Specific Fan-Drawer class""" + + def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): + # idx is 0-based + PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/platform.py new file mode 100644 index 000000000000..406b1179ae1b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/platform.py @@ -0,0 +1,25 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + + +try: + from sonic_platform_pddf_base.pddf_platform import PddfPlatform +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PddfPlatform): + """ + PDDF Platform-Specific Platform Class + """ + + def __init__(self): + PddfPlatform.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/psu.py new file mode 100644 index 000000000000..38b32412d024 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/psu.py @@ -0,0 +1,38 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + PLATFORM_PSU_CAPACITY = 450 + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return float(self.PLATFORM_PSU_CAPACITY) + + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + + # power is returned in micro watts + return round(float(self.get_voltage()*self.get_current()), 2) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/sfp.py new file mode 100644 index 000000000000..8ab43117d54c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/sfp.py @@ -0,0 +1,49 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_sfp import PddfSfp +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + self.index = index + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_lpmode(self): + if self.sfp_type == "QSFP28": + return super().get_lpmode() + else: + return False + + def set_lpmode(self, lpmode): + if self.sfp_type == "QSFP28": + return super().set_lpmode(lpmode) + else: + return False + + def reset(self): + if self.sfp_type == "QSFP28": + return super().reset() + else: + return False + + def get_error_description(self): + """ + Retrives the error descriptions of the SFP module + Returns: + String that represents the current error descriptions of vendor specific errors + In case there are multiple errors, they should be joined by '|', + like: "Bad EEPROM|Unsupported cable" + """ + if not self.get_presence(): + return self.SFP_STATUS_UNPLUGGED + + return self.SFP_STATUS_OK diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/thermal.py new file mode 100644 index 000000000000..77d6ec7ae886 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform/thermal.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform_setup.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform_setup.py new file mode 100644 index 000000000000..c0a485320cb7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/sonic_platform_setup.py @@ -0,0 +1,27 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on ufispace platform', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Jason Tsai', + maintainer_email='jason.cy.tsai@ufispace.com', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_device_create.sh new file mode 100755 index 000000000000..4a55252ea936 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_device_create.sh @@ -0,0 +1,16 @@ +#!/bin/bash + +#disable bmc watchdog +echo "Disable BMC watchdog" +timeout 3 ipmitool mc watchdog off + +pddf_ledutil setstatusled SYNC_LED off +pddf_ledutil setstatusled SYS_LED off +pddf_ledutil setstatusled ID_LED off + +#set status led to green to indicate platform init done +curr_led=$(pddf_ledutil getstatusled SYS_LED) +pddf_ledutil setstatusled SYS_LED green +echo "Set SYS_LED from $curr_led to green" + +echo "PDDF device post-create completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_driver_install.sh new file mode 100755 index 000000000000..ed2559977e42 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_post_driver_install.sh @@ -0,0 +1,2 @@ +#!/bin/bash +echo "PDDF driver post-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_pre_driver_install.sh new file mode 100755 index 000000000000..9ada6c235c48 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_pre_driver_install.sh @@ -0,0 +1,8 @@ +#!/bin/bash +#rmmod gpio_ich +if [ ! -f /tmp/._pddf_pre_driver_init_completion ]; then + rmmod i2c_i801 + rmmod i2c_ismt + date > /tmp/._pddf_pre_driver_init_completion +fi +echo "PDDF driver pre-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_switch_svc.py b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_switch_svc.py new file mode 100755 index 000000000000..ca34fe9442c9 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pddf_switch_svc.py @@ -0,0 +1,50 @@ +#!/usr/bin/env python +# Script to stop and start the respective platforms default services. +# This will be used while switching the pddf->non-pddf mode and vice versa +import commands + +def check_pddf_support(): + return True + +def stop_platform_svc(): + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py deinit") + if status: + print "platform_utility.py deinit command failed %d"%status + return False + + # HACK , stop the pddf-platform-init service if it is active + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service along with other platform serives failed %d"%status + return False + + return True + +def start_platform_svc(): + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py init") + if status: + print "platform_utility.py init command failed %d"%status + return False + + return True + +def start_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service") + if status: + print "Start pddf-platform-init.service failed %d"%status + return False + + return True + +def stop_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service failed %d"%status + return False + + return True + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pre_pddf_init.sh b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pre_pddf_init.sh new file mode 100755 index 000000000000..63a2e205808e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s8901-54xc/utils/pre_pddf_init.sh @@ -0,0 +1,5 @@ +#!/bin/bash +#rmmod gpio_ich +modprobe -rq i2c_i801 +modprobe -rq i2c_smbus +echo "Pre PDDF init steps completed successully" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/Makefile b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/Makefile new file mode 100644 index 000000000000..93d0f3e46fdb --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/Makefile @@ -0,0 +1,6 @@ + +MODULE_NAME = x86-64-ufispace-s9110-32x-cpld.o x86-64-ufispace-s9110-32x-sys-eeprom.o x86-64-ufispace-s9110-32x-lpc.o pddf_custom_sysstatus_module.o +obj-m := $(MODULE_NAME) + +CFLAGS_pddf_custom_sysstatus_module.o := -I$(M)/../../../../pddf/i2c/modules/include +KBUILD_EXTRA_SYMBOLS := $(M)/../../../../pddf/i2c/Module.symvers.PDDF diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/pddf_custom_sysstatus_module.c b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/pddf_custom_sysstatus_module.c new file mode 100644 index 000000000000..35a032f4277e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/pddf_custom_sysstatus_module.c @@ -0,0 +1,274 @@ +/* + * Copyright 2019 Broadcom. + * The term ��Broadcom�� refers to Broadcom Inc. and/or its subsidiaries. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * + * A pddf kernel module for system status registers + */ + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "../../../../pddf/i2c/modules/include/pddf_client_defs.h" +#include "../../../../pddf/i2c/modules/include/pddf_sysstatus_defs.h" + + +SYSSTATUS_DATA sysstatus_data = {0}; + +extern int board_i2c_cpld_read(unsigned short cpld_addr, u8 reg); +extern int board_i2c_cpld_write(unsigned short cpld_addr, u8 reg, u8 value); + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count); +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf); +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count); + + +PDDF_DATA_ATTR(attr_name, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_CHAR, 32, + (void*)&sysstatus_data.sysstatus_addr_attr.aname, NULL); +PDDF_DATA_ATTR(attr_devaddr, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.devaddr , NULL); +PDDF_DATA_ATTR(attr_offset, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.offset, NULL); +PDDF_DATA_ATTR(attr_mask, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.mask , NULL); +PDDF_DATA_ATTR(attr_len, S_IWUSR|S_IRUGO, show_pddf_data, store_pddf_data, PDDF_UINT32, + sizeof(uint32_t), (void*)&sysstatus_data.sysstatus_addr_attr.len , NULL); +PDDF_DATA_ATTR(attr_ops, S_IWUSR, NULL, do_attr_operation, PDDF_CHAR, 8, (void*)&sysstatus_data, NULL); + + + +static struct attribute *sysstatus_addr_attributes[] = { + &attr_attr_name.dev_attr.attr, + &attr_attr_devaddr.dev_attr.attr, + &attr_attr_offset.dev_attr.attr, + &attr_attr_mask.dev_attr.attr, + &attr_attr_len.dev_attr.attr, + &attr_attr_ops.dev_attr.attr, + NULL +}; + +PDDF_DATA_ATTR(board_sku_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(board_hw_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(board_deph_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(board_build_id , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_major_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_minor_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld1_build , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_major_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_minor_ver, S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(cpld2_build , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(psu_status , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_psu , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_sys , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_fan , S_IRUGO, show_sysstatus_data, NULL, PDDF_UCHAR, sizeof(u8), NULL, NULL); +PDDF_DATA_ATTR(system_led_id , S_IWUSR|S_IRUGO, show_sysstatus_data, store_sysstatus_data, PDDF_UCHAR, sizeof(u8), NULL, NULL); + +static struct attribute *sysstatus_data_attributes[] = { + &attr_board_sku_id.dev_attr.attr, + &attr_board_hw_id.dev_attr.attr, + &attr_board_deph_id.dev_attr.attr, + &attr_board_build_id.dev_attr.attr, + &attr_cpld1_major_ver.dev_attr.attr, + &attr_cpld1_minor_ver.dev_attr.attr, + &attr_cpld1_build.dev_attr.attr, + &attr_cpld2_major_ver.dev_attr.attr, + &attr_cpld2_minor_ver.dev_attr.attr, + &attr_cpld2_build.dev_attr.attr, + &attr_psu_status.dev_attr.attr, + &attr_system_led_psu.dev_attr.attr, + &attr_system_led_sys.dev_attr.attr, + &attr_system_led_fan.dev_attr.attr, + &attr_system_led_id.dev_attr.attr, + NULL +}; + + +static const struct attribute_group pddf_sysstatus_addr_group = { + .attrs = sysstatus_addr_attributes, +}; + + +static const struct attribute_group pddf_sysstatus_data_group = { + .attrs = sysstatus_data_attributes, +}; + + +static struct kobject *sysstatus_addr_kobj; +static struct kobject *sysstatus_data_kobj; + + + +ssize_t show_sysstatus_data(struct device *dev, struct device_attribute *da, char *buf) +{ + + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + + } + } + + if (sysstatus_addr_attrs==NULL ) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname); + status = 0; + } + else + { + status = board_i2c_cpld_read( sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset); + } + + return sprintf(buf, "0x%x\n", (status&sysstatus_addr_attrs->mask)); + +} + +ssize_t store_sysstatus_data(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + SYSSTATUS_DATA *data = &sysstatus_data; + struct SYSSTATUS_ADDR_ATTR *sysstatus_addr_attrs = NULL; + int i, status ; + u8 reg_val; + + for (i=0;isysstatus_addr_attrs[i].aname, attr->dev_attr.attr.name) == 0 ) + { + sysstatus_addr_attrs = &data->sysstatus_addr_attrs[i]; + } + } + + if (sysstatus_addr_attrs==NULL) + { + printk(KERN_DEBUG "%s is not supported attribute for this client\n",data->sysstatus_addr_attrs[i].aname); + return -EINVAL; + } + else + { + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + status = board_i2c_cpld_write(sysstatus_addr_attrs->devaddr, sysstatus_addr_attrs->offset, reg_val); + + if (status!=0) + { + printk(KERN_DEBUG "store_sysstatus_data() %s failed, status=%d\n",data->sysstatus_addr_attrs[i].aname, status); + return status; + } + } + + return count; +} + + + +static ssize_t do_attr_operation(struct device *dev, struct device_attribute *da, const char *buf, size_t count) +{ + PDDF_ATTR *ptr = (PDDF_ATTR *)da; + SYSSTATUS_DATA *pdata = (SYSSTATUS_DATA *)(ptr->addr); + + pdata->sysstatus_addr_attrs[pdata->len] = pdata->sysstatus_addr_attr; + pdata->len++; + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Populating the data for %s\n", __FUNCTION__, pdata->sysstatus_addr_attr.aname); + +#ifdef __STDC_LIB_EXT1__ + memset_s(&pdata->sysstatus_addr_attr, sizeof(pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); +#else + memset(&pdata->sysstatus_addr_attr, 0, sizeof(pdata->sysstatus_addr_attr)); +#endif + + return count; +} + + + + +int __init sysstatus_data_init(void) +{ + struct kobject *device_kobj; + int ret = 0; + + + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. init\n"); + + device_kobj = get_device_i2c_kobj(); + if(!device_kobj) + return -ENOMEM; + + sysstatus_addr_kobj = kobject_create_and_add("sysstatus", device_kobj); + if(!sysstatus_addr_kobj) + return -ENOMEM; + + sysstatus_data_kobj = kobject_create_and_add("sysstatus_data", sysstatus_addr_kobj); + if(!sysstatus_data_kobj) + return -ENOMEM; + + + ret = sysfs_create_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + if (ret) + { + kobject_put(sysstatus_addr_kobj); + return ret; + } + + ret = sysfs_create_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + if (ret) + { + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + return ret; + } + + + return ret; +} + +void __exit sysstatus_data_exit(void) +{ + pddf_dbg(SYSSTATUS, "PDDF SYSSTATUS MODULE.. exit\n"); + sysfs_remove_group(sysstatus_data_kobj, &pddf_sysstatus_data_group); + sysfs_remove_group(sysstatus_addr_kobj, &pddf_sysstatus_addr_group); + kobject_put(sysstatus_data_kobj); + kobject_put(sysstatus_addr_kobj); + pddf_dbg(SYSSTATUS, KERN_ERR "%s: Removed the kobjects for 'SYSSTATUS'\n",__FUNCTION__); + return; +} + +module_init(sysstatus_data_init); +module_exit(sysstatus_data_exit); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("SYSSTATUS platform data"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.c b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.c new file mode 100644 index 000000000000..af54108ee1b3 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.c @@ -0,0 +1,1475 @@ +/* + * A i2c cpld driver for the ufispace_s9110_32x + * + * Copyright (C) 2022 UfiSpace Technology Corporation. + * Nonodark Huang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "x86-64-ufispace-s9110-32x-cpld.h" + +#if !defined(SENSOR_DEVICE_ATTR_RO) +#define SENSOR_DEVICE_ATTR_RO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, 0444, _func##_show, NULL, _index) +#endif + +#if !defined(SENSOR_DEVICE_ATTR_RW) +#define SENSOR_DEVICE_ATTR_RW(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, 0644, _func##_show, _func##_store, _index) + +#endif + +#if !defined(SENSOR_DEVICE_ATTR_WO) +#define SENSOR_DEVICE_ATTR_WO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, 0200, NULL, _func##_store, _index) +#endif + + +#ifdef DEBUG +#define DEBUG_PRINT(fmt, args...) \ + printk(KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#else +#define DEBUG_PRINT(fmt, args...) +#endif + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define I2C_READ_BYTE_DATA(ret, lock, i2c_client, reg) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_read_byte_data(i2c_client, reg); \ + mutex_unlock(lock); \ + BSP_LOG_R("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, ret); \ +} + +#define I2C_WRITE_BYTE_DATA(ret, lock, i2c_client, reg, val) \ +{ \ + mutex_lock(lock); \ + ret = i2c_smbus_write_byte_data(i2c_client, reg, val); \ + mutex_unlock(lock); \ + BSP_LOG_W("cpld[%d], reg=0x%03x, reg_val=0x%02x", data->index, reg, val); \ +} + +#define _DEVICE_ATTR(_name) \ + &sensor_dev_attr_##_name.dev_attr.attr + + +/* CPLD sysfs attributes index */ +enum cpld_sysfs_attributes { + //CPLD 1 & CPLD 2 + CPLD_MAJOR_VER, + CPLD_MINOR_VER, + CPLD_ID, + CPLD_BUILD, + CPLD_VERSION_H, + CPLD_CHIP, + CPLD_EVT_CTRL, + + //CPLD 1 + CPLD_BOARD_ID_0, + CPLD_BOARD_ID_1, + CPLD_SKU_EXT, + + CPLD_MAC_INTR, + CPLD_HWM_INTR, + CPLD_CPLD2_INTR, + CPLD_PTP_INTR, + CPLD_SYSTEM_INTR, + + CPLD_MAC_MASK, + CPLD_HWM_MASK, + CPLD_CPLD2_MASK, + CPLD_PTP_MASK, + CPLD_SYSTEM_MASK, + + CPLD_MAC_EVT, + CPLD_HWM_EVT, + CPLD_CPLD2_EVT, + + CPLD_MAC_RESET, + CPLD_SYSTEM_RESET, + CPLD_BMC_NTM_RESET, + CPLD_USB_RESET, + CPLD_I2C_MUX_RESET, + CPLD_MISC_RESET, + + CPLD_BRD_PRESENT, + CPLD_PSU_STATUS, + CPLD_SYSTEM_PWR, + CPLD_MAC_SYNCE, + CPLD_MAC_AVS, + CPLD_SYSTEM_STATUS, + CPLD_WATCHDOG, + CPLD_BOOT_SELECT, + CPLD_MUX_CTRL, + CPLD_MISC_CTRL_1, + CPLD_MISC_CTRL_2, + CPLD_MAC_TEMP, + + CPLD_SYSTEM_LED_PSU, + CPLD_SYSTEM_LED_SYS, + CPLD_SYSTEM_LED_FAN, + CPLD_SYSTEM_LED_ID, + + DBG_CPLD_MAC_INTR, + DBG_CPLD_HWM_INTR, + DBG_CPLD_CPLD2_INTR, + DBG_CPLD_PTP_INTR, + + //CPLD 2 + CPLD_QSFP_ABS_0_7, + CPLD_QSFP_ABS_8_15, + CPLD_QSFP_ABS_16_23, + CPLD_QSFP_ABS_24_31, + + CPLD_QSFP_INTR_0_7, + CPLD_QSFP_INTR_8_15, + CPLD_QSFP_INTR_16_23, + CPLD_QSFP_INTR_24_31, + + CPLD_SFP_ABS_0_1, + CPLD_SFP_RXLOS_0_1, + CPLD_SFP_TXFLT_0_1, + + CPLD_QSFP_MASK_ABS_0_7, + CPLD_QSFP_MASK_ABS_8_15, + CPLD_QSFP_MASK_ABS_16_23, + CPLD_QSFP_MASK_ABS_24_31, + + CPLD_QSFP_MASK_INTR_0_7, + CPLD_QSFP_MASK_INTR_8_15, + CPLD_QSFP_MASK_INTR_16_23, + CPLD_QSFP_MASK_INTR_24_31, + + CPLD_SFP_MASK_ABS_0_1, + CPLD_SFP_MASK_RXLOS_0_1, + CPLD_SFP_MASK_TXFLT_0_1, + + CPLD_QSFP_EVT_ABS_0_7, + CPLD_QSFP_EVT_ABS_8_15, + CPLD_QSFP_EVT_ABS_16_23, + CPLD_QSFP_EVT_ABS_24_31, + + CPLD_QSFP_EVT_INTR_0_7, + CPLD_QSFP_EVT_INTR_8_15, + CPLD_QSFP_EVT_INTR_16_23, + CPLD_QSFP_EVT_INTR_24_31, + + CPLD_SFP_EVT_ABS_0_1, + CPLD_SFP_EVT_RXLOS_0_1, + CPLD_SFP_EVT_TXFLT_0_1, + + CPLD_QSFP_RESET_0_7, + CPLD_QSFP_RESET_8_15, + CPLD_QSFP_RESET_16_23, + CPLD_QSFP_RESET_24_31, + + CPLD_QSFP_LPMODE_0_7, + CPLD_QSFP_LPMODE_8_15, + CPLD_QSFP_LPMODE_16_23, + CPLD_QSFP_LPMODE_24_31, + + CPLD_SFP_TXDIS_0_1, + CPLD_SFP_TS_0_1, + CPLD_SFP_RS_0_1, + + DBG_CPLD_QSFP_ABS_0_7, + DBG_CPLD_QSFP_ABS_8_15, + DBG_CPLD_QSFP_ABS_16_23, + DBG_CPLD_QSFP_ABS_24_31, + + DBG_CPLD_QSFP_INTR_0_7, + DBG_CPLD_QSFP_INTR_8_15, + DBG_CPLD_QSFP_INTR_16_23, + DBG_CPLD_QSFP_INTR_24_31, + + DBG_CPLD_SFP_ABS_0_1, + DBG_CPLD_SFP_RXLOS_0_1, + DBG_CPLD_SFP_TXFLT_0_1, + + //BSP DEBUG + BSP_DEBUG +}; + +enum data_type { + DATA_HEX, + DATA_DEC, + DATA_UNK, +}; + +typedef struct { + u8 reg; + u8 mask; + u8 data_type; +} attr_reg_map_t; + +static attr_reg_map_t attr_reg[]= { + + //CPLD 1 & CPLD 2 + [CPLD_MAJOR_VER] = {CPLD_VERSION_REG , MASK_1100_0000, DATA_DEC}, + [CPLD_MINOR_VER] = {CPLD_VERSION_REG , MASK_0011_1111, DATA_DEC}, + [CPLD_ID] = {CPLD_ID_REG , MASK_0000_0111, DATA_DEC}, + [CPLD_BUILD] = {CPLD_BUILD_REG , MASK_ALL , DATA_DEC}, + [CPLD_VERSION_H] = {CPLD_NONE_REG , MASK_NONE , DATA_UNK}, + [CPLD_CHIP] = {CPLD_CHIP_REG , MASK_ALL , DATA_HEX}, + [CPLD_EVT_CTRL] = {CPLD_EVT_CTRL_REG , MASK_ALL , DATA_HEX}, + + //CPLD 1 + [CPLD_BOARD_ID_0] = {CPLD_BOARD_ID_0_REG , MASK_ALL , DATA_HEX}, + [CPLD_BOARD_ID_1] = {CPLD_BOARD_ID_1_REG , MASK_ALL , DATA_HEX}, + [CPLD_SKU_EXT] = {CPLD_SKU_EXT_REG , MASK_ALL , DATA_DEC}, + + [CPLD_MAC_INTR] = {CPLD_MAC_INTR_REG , MASK_ALL , DATA_HEX}, + [CPLD_HWM_INTR] = {CPLD_HWM_INTR_REG , MASK_ALL , DATA_HEX}, + [CPLD_CPLD2_INTR] = {CPLD_CPLD2_INTR_REG , MASK_ALL , DATA_HEX}, + [CPLD_PTP_INTR] = {CPLD_PTP_INTR_REG , MASK_ALL , DATA_HEX}, + [CPLD_SYSTEM_INTR] = {CPLD_SYSTEM_INTR_REG , MASK_ALL , DATA_HEX}, + + [CPLD_MAC_MASK] = {CPLD_MAC_MASK_REG , MASK_ALL , DATA_HEX}, + [CPLD_HWM_MASK] = {CPLD_HWM_MASK_REG , MASK_ALL , DATA_HEX}, + [CPLD_CPLD2_MASK] = {CPLD_CPLD2_MASK_REG , MASK_ALL , DATA_HEX}, + [CPLD_PTP_MASK] = {CPLD_PTP_MASK_REG , MASK_ALL , DATA_HEX}, + [CPLD_SYSTEM_MASK] = {CPLD_SYSTEM_MASK_REG , MASK_ALL , DATA_HEX}, + + [CPLD_MAC_EVT] = {CPLD_MAC_EVT_REG , MASK_ALL , DATA_HEX}, + [CPLD_HWM_EVT] = {CPLD_HWM_EVT_REG , MASK_ALL , DATA_HEX}, + [CPLD_CPLD2_EVT] = {CPLD_CPLD2_EVT_REG , MASK_ALL , DATA_HEX}, + + [CPLD_MAC_RESET] = {CPLD_MAC_RESET_REG , MASK_ALL , DATA_HEX}, + [CPLD_SYSTEM_RESET] = {CPLD_SYSTEM_RESET_REG , MASK_ALL , DATA_HEX}, + [CPLD_BMC_NTM_RESET] = {CPLD_BMC_NTM_RESET_REG , MASK_ALL , DATA_HEX}, + [CPLD_USB_RESET] = {CPLD_USB_RESET_REG , MASK_ALL , DATA_HEX}, + [CPLD_I2C_MUX_RESET] = {CPLD_I2C_MUX_RESET_REG , MASK_ALL , DATA_HEX}, + [CPLD_MISC_RESET] = {CPLD_MISC_RESET_REG , MASK_ALL , DATA_HEX}, + + [CPLD_BRD_PRESENT] = {CPLD_BRD_PRESENT_REG , MASK_ALL , DATA_HEX}, + [CPLD_PSU_STATUS] = {CPLD_PSU_STATUS_REG , MASK_ALL , DATA_HEX}, + [CPLD_SYSTEM_PWR] = {CPLD_SYSTEM_PWR_REG , MASK_ALL , DATA_HEX}, + [CPLD_MAC_SYNCE] = {CPLD_MAC_SYNCE_REG , MASK_ALL , DATA_HEX}, + [CPLD_MAC_AVS] = {CPLD_MAC_AVS_REG , MASK_ALL , DATA_HEX}, + [CPLD_SYSTEM_STATUS] = {CPLD_SYSTEM_STATUS_REG , MASK_ALL , DATA_HEX}, + [CPLD_WATCHDOG] = {CPLD_WATCHDOG_REG , MASK_ALL , DATA_HEX}, + [CPLD_BOOT_SELECT] = {CPLD_BOOT_SELECT_REG , MASK_ALL , DATA_HEX}, + [CPLD_MUX_CTRL] = {CPLD_MUX_CTRL_REG , MASK_ALL , DATA_HEX}, + [CPLD_MISC_CTRL_1] = {CPLD_MISC_CTRL_1_REG , MASK_ALL , DATA_HEX}, + [CPLD_MISC_CTRL_2] = {CPLD_MISC_CTRL_2_REG , MASK_ALL , DATA_HEX}, + [CPLD_MAC_TEMP] = {CPLD_MAC_TEMP_REG , MASK_ALL , DATA_HEX}, + + [CPLD_SYSTEM_LED_PSU] = {CPLD_SYSTEM_LED_PSU_REG , MASK_ALL , DATA_HEX}, + [CPLD_SYSTEM_LED_SYS] = {CPLD_SYSTEM_LED_SYS_REG , MASK_ALL , DATA_HEX}, + [CPLD_SYSTEM_LED_FAN] = {CPLD_SYSTEM_LED_FAN_REG , MASK_ALL , DATA_HEX}, + [CPLD_SYSTEM_LED_ID] = {CPLD_SYSTEM_LED_ID_REG , MASK_ALL , DATA_HEX}, + + [DBG_CPLD_MAC_INTR] = {DBG_CPLD_MAC_INTR_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_HWM_INTR] = {DBG_CPLD_HWM_INTR_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_CPLD2_INTR] = {DBG_CPLD_CPLD2_INTR_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_PTP_INTR] = {DBG_CPLD_PTP_INTR_REG , MASK_ALL , DATA_HEX}, + + //CPLD 2 + [CPLD_QSFP_ABS_0_7] = {CPLD_QSFP_ABS_0_7_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_ABS_8_15] = {CPLD_QSFP_ABS_8_15_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_ABS_16_23] = {CPLD_QSFP_ABS_16_23_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_ABS_24_31] = {CPLD_QSFP_ABS_24_31_REG , MASK_ALL , DATA_HEX}, + + [CPLD_QSFP_INTR_0_7] = {CPLD_QSFP_INTR_0_7_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_INTR_8_15] = {CPLD_QSFP_INTR_8_15_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_INTR_16_23] = {CPLD_QSFP_INTR_16_23_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_INTR_24_31] = {CPLD_QSFP_INTR_24_31_REG , MASK_ALL , DATA_HEX}, + + [CPLD_SFP_ABS_0_1] = {CPLD_SFP_ABS_0_1_REG , MASK_ALL , DATA_HEX}, + [CPLD_SFP_RXLOS_0_1] = {CPLD_SFP_RXLOS_0_1_REG , MASK_ALL , DATA_HEX}, + [CPLD_SFP_TXFLT_0_1] = {CPLD_SFP_TXFLT_0_1_REG , MASK_ALL , DATA_HEX}, + + [CPLD_QSFP_MASK_ABS_0_7] = {CPLD_QSFP_MASK_ABS_0_7_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_MASK_ABS_8_15] = {CPLD_QSFP_MASK_ABS_8_15_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_MASK_ABS_16_23] = {CPLD_QSFP_MASK_ABS_16_23_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_MASK_ABS_24_31] = {CPLD_QSFP_MASK_ABS_24_31_REG , MASK_ALL , DATA_HEX}, + + [CPLD_QSFP_MASK_INTR_0_7] = {CPLD_QSFP_MASK_INTR_0_7_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_MASK_INTR_8_15] = {CPLD_QSFP_MASK_INTR_8_15_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_MASK_INTR_16_23]= {CPLD_QSFP_MASK_INTR_16_23_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_MASK_INTR_24_31]= {CPLD_QSFP_MASK_INTR_24_31_REG , MASK_ALL , DATA_HEX}, + + [CPLD_SFP_MASK_ABS_0_1] = {CPLD_SFP_MASK_ABS_0_1_REG , MASK_ALL , DATA_HEX}, + [CPLD_SFP_MASK_RXLOS_0_1] = {CPLD_SFP_MASK_RXLOS_0_1_REG , MASK_ALL , DATA_HEX}, + [CPLD_SFP_MASK_TXFLT_0_1] = {CPLD_SFP_MASK_TXFLT_0_1_REG , MASK_ALL , DATA_HEX}, + + [CPLD_QSFP_EVT_ABS_0_7] = {CPLD_QSFP_EVT_ABS_0_7_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_EVT_ABS_8_15] = {CPLD_QSFP_EVT_ABS_8_15_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_EVT_ABS_16_23] = {CPLD_QSFP_EVT_ABS_16_23_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_EVT_ABS_24_31] = {CPLD_QSFP_EVT_ABS_24_31_REG , MASK_ALL , DATA_HEX}, + + [CPLD_QSFP_EVT_INTR_0_7] = {CPLD_QSFP_EVT_INTR_0_7_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_EVT_INTR_8_15] = {CPLD_QSFP_EVT_INTR_8_15_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_EVT_INTR_16_23] = {CPLD_QSFP_EVT_INTR_16_23_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_EVT_INTR_24_31] = {CPLD_QSFP_EVT_INTR_24_31_REG , MASK_ALL , DATA_HEX}, + + [CPLD_SFP_EVT_ABS_0_1] = {CPLD_SFP_EVT_ABS_0_1_REG , MASK_ALL , DATA_HEX}, + [CPLD_SFP_EVT_RXLOS_0_1] = {CPLD_SFP_EVT_RXLOS_0_1_REG , MASK_ALL , DATA_HEX}, + [CPLD_SFP_EVT_TXFLT_0_1] = {CPLD_SFP_EVT_TXFLT_0_1_REG , MASK_ALL , DATA_HEX}, + + [CPLD_QSFP_RESET_0_7] = {CPLD_QSFP_RESET_0_7_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_RESET_8_15] = {CPLD_QSFP_RESET_8_15_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_RESET_16_23] = {CPLD_QSFP_RESET_16_23_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_RESET_24_31] = {CPLD_QSFP_RESET_24_31_REG , MASK_ALL , DATA_HEX}, + + [CPLD_QSFP_LPMODE_0_7] = {CPLD_QSFP_LPMODE_0_7_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_LPMODE_8_15] = {CPLD_QSFP_LPMODE_8_15_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_LPMODE_16_23] = {CPLD_QSFP_LPMODE_16_23_REG , MASK_ALL , DATA_HEX}, + [CPLD_QSFP_LPMODE_24_31] = {CPLD_QSFP_LPMODE_24_31_REG , MASK_ALL , DATA_HEX}, + + [CPLD_SFP_TXDIS_0_1] = {CPLD_SFP_TXDIS_0_1_REG , MASK_ALL , DATA_HEX}, + [CPLD_SFP_TS_0_1] = {CPLD_SFP_TS_0_1_REG , MASK_ALL , DATA_HEX}, + [CPLD_SFP_RS_0_1] = {CPLD_SFP_RS_0_1_REG , MASK_ALL , DATA_HEX}, + + [DBG_CPLD_QSFP_ABS_0_7] = {DBG_CPLD_QSFP_ABS_0_7_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_QSFP_ABS_8_15] = {DBG_CPLD_QSFP_ABS_8_15_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_QSFP_ABS_16_23] = {DBG_CPLD_QSFP_ABS_16_23_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_QSFP_ABS_24_31] = {DBG_CPLD_QSFP_ABS_24_31_REG , MASK_ALL , DATA_HEX}, + + [DBG_CPLD_QSFP_INTR_0_7] = {DBG_CPLD_QSFP_INTR_0_7_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_QSFP_INTR_8_15] = {DBG_CPLD_QSFP_INTR_8_15_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_QSFP_INTR_16_23] = {DBG_CPLD_QSFP_INTR_16_23_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_QSFP_INTR_24_31] = {DBG_CPLD_QSFP_INTR_24_31_REG , MASK_ALL , DATA_HEX}, + + [DBG_CPLD_SFP_ABS_0_1] = {DBG_CPLD_SFP_ABS_0_1_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_SFP_RXLOS_0_1] = {DBG_CPLD_SFP_RXLOS_0_1_REG , MASK_ALL , DATA_HEX}, + [DBG_CPLD_SFP_TXFLT_0_1] = {DBG_CPLD_SFP_TXFLT_0_1_REG , MASK_ALL , DATA_HEX}, + + //BSP DEBUG + [BSP_DEBUG] = {CPLD_NONE_REG , MASK_NONE , DATA_UNK}, +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +/* CPLD sysfs attributes hook functions */ +static ssize_t cpld_show(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t cpld_store(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static u8 _cpld_reg_read(struct device *dev, u8 reg, u8 mask); +static ssize_t cpld_reg_read(struct device *dev, char *buf, u8 reg, u8 mask, u8 data_type); +static ssize_t cpld_reg_write(struct device *dev, const char *buf, size_t count, u8 reg, u8 mask); +static ssize_t bsp_read(char *buf, char *str); +static ssize_t bsp_write(const char *buf, char *str, size_t str_len, size_t count); +static ssize_t bsp_callback_show(struct device *dev, + struct device_attribute *da, char *buf); +static ssize_t bsp_callback_store(struct device *dev, + struct device_attribute *da, const char *buf, size_t count); +static ssize_t cpld_version_h_show(struct device *dev, + struct device_attribute *da, + char *buf); + +static LIST_HEAD(cpld_client_list); /* client list for cpld */ +static struct mutex list_lock; /* mutex for client list */ + +struct cpld_client_node { + struct i2c_client *client; + struct list_head list; +}; + +struct cpld_data { + int index; /* CPLD index */ + struct mutex access_lock; /* mutex for cpld access */ + u8 access_reg; /* register to access */ +}; + +/* CPLD device id and data */ +static const struct i2c_device_id cpld_id[] = { + { "s9110_32x_cpld1", cpld1 }, + { "s9110_32x_cpld2", cpld2 }, + {} +}; + +char bsp_debug[2]="0"; +u8 enable_log_read=LOG_DISABLE; +u8 enable_log_write=LOG_DISABLE; + +/* Addresses scanned for cpld */ +static const unsigned short cpld_i2c_addr[] = { 0x30, 0x31, I2C_CLIENT_END }; + +/* define all support register access of cpld in attribute */ + +// CPLD 1 & CPLD2 +static SENSOR_DEVICE_ATTR_RO(cpld_major_ver , cpld, CPLD_MAJOR_VER); +static SENSOR_DEVICE_ATTR_RO(cpld_minor_ver , cpld, CPLD_MINOR_VER); +static SENSOR_DEVICE_ATTR_RO(cpld_id , cpld, CPLD_ID); +static SENSOR_DEVICE_ATTR_RO(cpld_build , cpld, CPLD_BUILD); +static SENSOR_DEVICE_ATTR_RO(cpld_version_h , cpld_version_h, CPLD_VERSION_H); +static SENSOR_DEVICE_ATTR_RO(cpld_chip , cpld, CPLD_CHIP); +static SENSOR_DEVICE_ATTR_RW(cpld_evt_ctrl , cpld, CPLD_EVT_CTRL); + +//CPLD 1 +static SENSOR_DEVICE_ATTR_RO(cpld_board_id_0 , cpld, CPLD_BOARD_ID_0); +static SENSOR_DEVICE_ATTR_RO(cpld_board_id_1 , cpld, CPLD_BOARD_ID_1); +static SENSOR_DEVICE_ATTR_RO(cpld_sku_ext , cpld, CPLD_SKU_EXT); + +static SENSOR_DEVICE_ATTR_RO(cpld_mac_intr , cpld, CPLD_MAC_INTR); +static SENSOR_DEVICE_ATTR_RO(cpld_hwm_intr , cpld, CPLD_HWM_INTR); +static SENSOR_DEVICE_ATTR_RO(cpld_cpld2_intr , cpld, CPLD_CPLD2_INTR); +static SENSOR_DEVICE_ATTR_RO(cpld_ptp_intr , cpld, CPLD_PTP_INTR); +static SENSOR_DEVICE_ATTR_RO(cpld_system_intr , cpld, CPLD_SYSTEM_INTR); + +static SENSOR_DEVICE_ATTR_RW(cpld_mac_mask , cpld, CPLD_MAC_MASK); +static SENSOR_DEVICE_ATTR_RW(cpld_hwm_mask , cpld, CPLD_HWM_MASK); +static SENSOR_DEVICE_ATTR_RW(cpld_cpld2_mask , cpld, CPLD_CPLD2_MASK); +static SENSOR_DEVICE_ATTR_RW(cpld_ptp_mask , cpld, CPLD_PTP_MASK); +static SENSOR_DEVICE_ATTR_RW(cpld_system_mask , cpld, CPLD_SYSTEM_MASK); + +static SENSOR_DEVICE_ATTR_RO(cpld_mac_evt , cpld, CPLD_MAC_EVT); +static SENSOR_DEVICE_ATTR_RO(cpld_hwm_evt , cpld, CPLD_HWM_EVT); +static SENSOR_DEVICE_ATTR_RO(cpld_cpld2_evt , cpld, CPLD_CPLD2_EVT); + +static SENSOR_DEVICE_ATTR_RW(cpld_mac_reset , cpld, CPLD_MAC_RESET); +static SENSOR_DEVICE_ATTR_RW(cpld_system_reset , cpld, CPLD_SYSTEM_RESET); +static SENSOR_DEVICE_ATTR_RW(cpld_bmc_ntm_reset , cpld, CPLD_BMC_NTM_RESET); +static SENSOR_DEVICE_ATTR_RW(cpld_usb_reset , cpld, CPLD_USB_RESET); +static SENSOR_DEVICE_ATTR_RW(cpld_i2c_mux_reset , cpld, CPLD_I2C_MUX_RESET); +static SENSOR_DEVICE_ATTR_RW(cpld_misc_reset , cpld, CPLD_MISC_RESET); + +static SENSOR_DEVICE_ATTR_RO(cpld_brd_present , cpld, CPLD_BRD_PRESENT); +static SENSOR_DEVICE_ATTR_RO(cpld_psu_status , cpld, CPLD_PSU_STATUS); +static SENSOR_DEVICE_ATTR_RO(cpld_system_pwr , cpld, CPLD_SYSTEM_PWR); +static SENSOR_DEVICE_ATTR_RO(cpld_mac_synce , cpld, CPLD_MAC_SYNCE); +static SENSOR_DEVICE_ATTR_RO(cpld_mac_avs , cpld, CPLD_MAC_AVS); +static SENSOR_DEVICE_ATTR_RO(cpld_system_status , cpld, CPLD_SYSTEM_STATUS); +static SENSOR_DEVICE_ATTR_RO(cpld_watchdog , cpld, CPLD_WATCHDOG); +static SENSOR_DEVICE_ATTR_RW(cpld_boot_select , cpld, CPLD_BOOT_SELECT); +static SENSOR_DEVICE_ATTR_RW(cpld_mux_ctrl , cpld, CPLD_MUX_CTRL); +static SENSOR_DEVICE_ATTR_RW(cpld_misc_ctrl_1 , cpld, CPLD_MISC_CTRL_1); +static SENSOR_DEVICE_ATTR_RW(cpld_misc_ctrl_2 , cpld, CPLD_MISC_CTRL_2); +static SENSOR_DEVICE_ATTR_RO(cpld_mac_temp , cpld, CPLD_MAC_TEMP); + +static SENSOR_DEVICE_ATTR_RO(cpld_system_led_psu , cpld, CPLD_SYSTEM_LED_PSU); +static SENSOR_DEVICE_ATTR_RW(cpld_system_led_sys , cpld, CPLD_SYSTEM_LED_SYS); +static SENSOR_DEVICE_ATTR_RO(cpld_system_led_fan , cpld, CPLD_SYSTEM_LED_FAN); +static SENSOR_DEVICE_ATTR_RW(cpld_system_led_id , cpld, CPLD_SYSTEM_LED_ID); + +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_mac_intr , cpld, DBG_CPLD_MAC_INTR); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_hwm_intr , cpld, DBG_CPLD_HWM_INTR); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_cpld2_intr , cpld, DBG_CPLD_CPLD2_INTR); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_ptp_intr , cpld, DBG_CPLD_PTP_INTR); + +//CPLD 2 +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_abs_0_7 , cpld, CPLD_QSFP_ABS_0_7); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_abs_8_15 , cpld, CPLD_QSFP_ABS_8_15); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_abs_16_23 , cpld, CPLD_QSFP_ABS_16_23); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_abs_24_31 , cpld, CPLD_QSFP_ABS_24_31); + +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_intr_0_7 , cpld, CPLD_QSFP_INTR_0_7); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_intr_8_15 , cpld, CPLD_QSFP_INTR_8_15); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_intr_16_23 , cpld, CPLD_QSFP_INTR_16_23); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_intr_24_31 , cpld, CPLD_QSFP_INTR_24_31); + +static SENSOR_DEVICE_ATTR_RO(cpld_sfp_abs_0_1 , cpld, CPLD_SFP_ABS_0_1); +static SENSOR_DEVICE_ATTR_RO(cpld_sfp_rxlos_0_1 , cpld, CPLD_SFP_RXLOS_0_1); +static SENSOR_DEVICE_ATTR_RO(cpld_sfp_txflt_0_1 , cpld, CPLD_SFP_TXFLT_0_1); + +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_abs_0_7 , cpld, CPLD_QSFP_MASK_ABS_0_7); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_abs_8_15 , cpld, CPLD_QSFP_MASK_ABS_8_15); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_abs_16_23 , cpld, CPLD_QSFP_MASK_ABS_16_23); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_abs_24_31 , cpld, CPLD_QSFP_MASK_ABS_24_31); + +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_intr_0_7 , cpld, CPLD_QSFP_MASK_INTR_0_7); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_intr_8_15 , cpld, CPLD_QSFP_MASK_INTR_8_15); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_intr_16_23, cpld, CPLD_QSFP_MASK_INTR_16_23); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_mask_intr_24_31, cpld, CPLD_QSFP_MASK_INTR_24_31); + +static SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_abs_0_1 , cpld, CPLD_SFP_MASK_ABS_0_1); +static SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_rxlos_0_1 , cpld, CPLD_SFP_MASK_RXLOS_0_1); +static SENSOR_DEVICE_ATTR_RW(cpld_sfp_mask_txflt_0_1 , cpld, CPLD_SFP_MASK_TXFLT_0_1); + +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_abs_0_7 , cpld, CPLD_QSFP_EVT_ABS_0_7); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_abs_8_15 , cpld, CPLD_QSFP_EVT_ABS_8_15); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_abs_16_23 , cpld, CPLD_QSFP_EVT_ABS_16_23); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_abs_24_31 , cpld, CPLD_QSFP_EVT_ABS_24_31); + +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_intr_0_7 , cpld, CPLD_QSFP_EVT_INTR_0_7); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_intr_8_15 , cpld, CPLD_QSFP_EVT_INTR_8_15); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_intr_16_23 , cpld, CPLD_QSFP_EVT_INTR_16_23); +static SENSOR_DEVICE_ATTR_RO(cpld_qsfp_evt_intr_24_31 , cpld, CPLD_QSFP_EVT_INTR_24_31); + +static SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_abs_0_1 , cpld, CPLD_SFP_EVT_ABS_0_1); +static SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_rxlos_0_1 , cpld, CPLD_SFP_EVT_RXLOS_0_1); +static SENSOR_DEVICE_ATTR_RO(cpld_sfp_evt_txflt_0_1 , cpld, CPLD_SFP_EVT_TXFLT_0_1); + +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_reset_0_7 , cpld, CPLD_QSFP_RESET_0_7); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_reset_8_15 , cpld, CPLD_QSFP_RESET_8_15); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_reset_16_23 , cpld, CPLD_QSFP_RESET_16_23); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_reset_24_31 , cpld, CPLD_QSFP_RESET_24_31); + +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_lpmode_0_7 , cpld, CPLD_QSFP_LPMODE_0_7); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_lpmode_8_15 , cpld, CPLD_QSFP_LPMODE_8_15); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_lpmode_16_23 , cpld, CPLD_QSFP_LPMODE_16_23); +static SENSOR_DEVICE_ATTR_RW(cpld_qsfp_lpmode_24_31 , cpld, CPLD_QSFP_LPMODE_24_31); + +static SENSOR_DEVICE_ATTR_RW(cpld_sfp_txdis_0_1 , cpld, CPLD_SFP_TXDIS_0_1); +static SENSOR_DEVICE_ATTR_RW(cpld_sfp_ts_0_1 , cpld, CPLD_SFP_TS_0_1); +static SENSOR_DEVICE_ATTR_RW(cpld_sfp_rs_0_1 , cpld, CPLD_SFP_RS_0_1); + +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_qsfp_abs_0_7 , cpld, DBG_CPLD_QSFP_ABS_0_7); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_qsfp_abs_8_15 , cpld, DBG_CPLD_QSFP_ABS_8_15); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_qsfp_abs_16_23 , cpld, DBG_CPLD_QSFP_ABS_16_23); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_qsfp_abs_24_31 , cpld, DBG_CPLD_QSFP_ABS_24_31); + +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_qsfp_intr_0_7 , cpld, DBG_CPLD_QSFP_INTR_0_7); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_qsfp_intr_8_15 , cpld, DBG_CPLD_QSFP_INTR_8_15); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_qsfp_intr_16_23 , cpld, DBG_CPLD_QSFP_INTR_16_23); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_qsfp_intr_24_31 , cpld, DBG_CPLD_QSFP_INTR_24_31); + +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_sfp_abs_0_1 , cpld, DBG_CPLD_SFP_ABS_0_1); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_sfp_rxlos_0_1 , cpld, DBG_CPLD_SFP_RXLOS_0_1); +static SENSOR_DEVICE_ATTR_RO(dbg_cpld_sfp_txflt_0_1 , cpld, DBG_CPLD_SFP_TXFLT_0_1); + +//BSP DEBUG +static SENSOR_DEVICE_ATTR_RW(bsp_debug , bsp_callback, BSP_DEBUG); + +/* define support attributes of cpldx */ + +/* cpld 1 */ +static struct attribute *cpld1_attributes[] = { + _DEVICE_ATTR(cpld_board_id_0), + _DEVICE_ATTR(cpld_board_id_1), + _DEVICE_ATTR(cpld_sku_ext), + + _DEVICE_ATTR(cpld_major_ver), + _DEVICE_ATTR(cpld_minor_ver), + _DEVICE_ATTR(cpld_id), + _DEVICE_ATTR(cpld_build), + _DEVICE_ATTR(cpld_version_h), + _DEVICE_ATTR(cpld_chip), + + _DEVICE_ATTR(cpld_mac_intr), + _DEVICE_ATTR(cpld_hwm_intr), + _DEVICE_ATTR(cpld_cpld2_intr), + _DEVICE_ATTR(cpld_ptp_intr), + _DEVICE_ATTR(cpld_system_intr), + + _DEVICE_ATTR(cpld_mac_mask), + _DEVICE_ATTR(cpld_hwm_mask), + _DEVICE_ATTR(cpld_cpld2_mask), + _DEVICE_ATTR(cpld_ptp_mask), + _DEVICE_ATTR(cpld_system_mask), + + _DEVICE_ATTR(cpld_mac_evt), + _DEVICE_ATTR(cpld_hwm_evt), + _DEVICE_ATTR(cpld_cpld2_evt), + + _DEVICE_ATTR(cpld_evt_ctrl), + + _DEVICE_ATTR(cpld_mac_reset), + _DEVICE_ATTR(cpld_system_reset), + _DEVICE_ATTR(cpld_bmc_ntm_reset), + _DEVICE_ATTR(cpld_usb_reset), + _DEVICE_ATTR(cpld_i2c_mux_reset), + _DEVICE_ATTR(cpld_misc_reset), + + _DEVICE_ATTR(cpld_brd_present), + _DEVICE_ATTR(cpld_psu_status), + _DEVICE_ATTR(cpld_system_pwr), + _DEVICE_ATTR(cpld_mac_synce), + _DEVICE_ATTR(cpld_mac_avs), + _DEVICE_ATTR(cpld_system_status), + _DEVICE_ATTR(cpld_watchdog), + _DEVICE_ATTR(cpld_boot_select), + _DEVICE_ATTR(cpld_mux_ctrl), + _DEVICE_ATTR(cpld_misc_ctrl_1), + _DEVICE_ATTR(cpld_misc_ctrl_2), + _DEVICE_ATTR(cpld_mac_temp), + + _DEVICE_ATTR(cpld_system_led_psu), + _DEVICE_ATTR(cpld_system_led_sys), + _DEVICE_ATTR(cpld_system_led_fan), + _DEVICE_ATTR(cpld_system_led_id), + + _DEVICE_ATTR(dbg_cpld_mac_intr), + _DEVICE_ATTR(dbg_cpld_hwm_intr), + _DEVICE_ATTR(dbg_cpld_cpld2_intr), + _DEVICE_ATTR(dbg_cpld_ptp_intr), + + _DEVICE_ATTR(bsp_debug), + + NULL +}; + +/* cpld 2 */ +static struct attribute *cpld2_attributes[] = { + + _DEVICE_ATTR(cpld_major_ver), + _DEVICE_ATTR(cpld_minor_ver), + _DEVICE_ATTR(cpld_id), + _DEVICE_ATTR(cpld_build), + _DEVICE_ATTR(cpld_version_h), + _DEVICE_ATTR(cpld_chip), + + _DEVICE_ATTR(cpld_qsfp_abs_0_7), + _DEVICE_ATTR(cpld_qsfp_abs_8_15), + _DEVICE_ATTR(cpld_qsfp_abs_16_23), + _DEVICE_ATTR(cpld_qsfp_abs_24_31), + + _DEVICE_ATTR(cpld_qsfp_intr_0_7), + _DEVICE_ATTR(cpld_qsfp_intr_8_15), + _DEVICE_ATTR(cpld_qsfp_intr_16_23), + _DEVICE_ATTR(cpld_qsfp_intr_24_31), + + _DEVICE_ATTR(cpld_sfp_abs_0_1), + _DEVICE_ATTR(cpld_sfp_rxlos_0_1), + _DEVICE_ATTR(cpld_sfp_txflt_0_1), + + _DEVICE_ATTR(cpld_qsfp_mask_abs_0_7), + _DEVICE_ATTR(cpld_qsfp_mask_abs_8_15), + _DEVICE_ATTR(cpld_qsfp_mask_abs_16_23), + _DEVICE_ATTR(cpld_qsfp_mask_abs_24_31), + + _DEVICE_ATTR(cpld_qsfp_mask_intr_0_7), + _DEVICE_ATTR(cpld_qsfp_mask_intr_8_15), + _DEVICE_ATTR(cpld_qsfp_mask_intr_16_23), + _DEVICE_ATTR(cpld_qsfp_mask_intr_24_31), + + _DEVICE_ATTR(cpld_sfp_mask_abs_0_1), + _DEVICE_ATTR(cpld_sfp_mask_rxlos_0_1), + _DEVICE_ATTR(cpld_sfp_mask_txflt_0_1), + + _DEVICE_ATTR(cpld_qsfp_evt_abs_0_7), + _DEVICE_ATTR(cpld_qsfp_evt_abs_8_15), + _DEVICE_ATTR(cpld_qsfp_evt_abs_16_23), + _DEVICE_ATTR(cpld_qsfp_evt_abs_24_31), + + _DEVICE_ATTR(cpld_qsfp_evt_intr_0_7), + _DEVICE_ATTR(cpld_qsfp_evt_intr_8_15), + _DEVICE_ATTR(cpld_qsfp_evt_intr_16_23), + _DEVICE_ATTR(cpld_qsfp_evt_intr_24_31), + + _DEVICE_ATTR(cpld_sfp_evt_abs_0_1), + _DEVICE_ATTR(cpld_sfp_evt_rxlos_0_1), + _DEVICE_ATTR(cpld_sfp_evt_txflt_0_1), + + _DEVICE_ATTR(cpld_evt_ctrl), + + _DEVICE_ATTR(cpld_qsfp_reset_0_7), + _DEVICE_ATTR(cpld_qsfp_reset_8_15), + _DEVICE_ATTR(cpld_qsfp_reset_16_23), + _DEVICE_ATTR(cpld_qsfp_reset_24_31), + + _DEVICE_ATTR(cpld_qsfp_lpmode_0_7), + _DEVICE_ATTR(cpld_qsfp_lpmode_8_15), + _DEVICE_ATTR(cpld_qsfp_lpmode_16_23), + _DEVICE_ATTR(cpld_qsfp_lpmode_24_31), + + _DEVICE_ATTR(cpld_sfp_txdis_0_1), + _DEVICE_ATTR(cpld_sfp_ts_0_1), + _DEVICE_ATTR(cpld_sfp_rs_0_1), + + _DEVICE_ATTR(dbg_cpld_qsfp_abs_0_7), + _DEVICE_ATTR(dbg_cpld_qsfp_abs_8_15), + _DEVICE_ATTR(dbg_cpld_qsfp_abs_16_23), + _DEVICE_ATTR(dbg_cpld_qsfp_abs_24_31), + + _DEVICE_ATTR(dbg_cpld_qsfp_intr_0_7), + _DEVICE_ATTR(dbg_cpld_qsfp_intr_8_15), + _DEVICE_ATTR(dbg_cpld_qsfp_intr_16_23), + _DEVICE_ATTR(dbg_cpld_qsfp_intr_24_31), + + _DEVICE_ATTR(dbg_cpld_sfp_abs_0_1), + _DEVICE_ATTR(dbg_cpld_sfp_rxlos_0_1), + _DEVICE_ATTR(dbg_cpld_sfp_txflt_0_1), + + NULL +}; + +/* cpld 1 attributes group */ +static const struct attribute_group cpld1_group = { + .attrs = cpld1_attributes, +}; + +/* cpld 2 attributes group */ +static const struct attribute_group cpld2_group = { + .attrs = cpld2_attributes, +}; + +/* reg shift */ +static u8 _shift(u8 mask) +{ + int i=0, mask_one=1; + + for(i=0; i<8; ++i) { + if ((mask & mask_one) == 1) + return i; + else + mask >>= 1; + } + + return -1; +} + +/* reg mask and shift */ +static u8 _mask_shift(u8 val, u8 mask) +{ + int shift=0; + + shift = _shift(mask); + + return (val & mask) >> shift; +} + +static u8 _parse_data(char *buf, unsigned int data, u8 data_type) +{ + if(buf == NULL) { + return -1; + } + + if(data_type == DATA_HEX) { + return sprintf(buf, "0x%02x", data); + } else if(data_type == DATA_DEC) { + return sprintf(buf, "%u", data); + } else { + return -1; + } + return 0; +} + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if ((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write)) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _config_bsp_log(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +/* get bsp value */ +static ssize_t bsp_read(char *buf, char *str) +{ + ssize_t len=0; + + len=sprintf(buf, "%s", str); + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t bsp_write(const char *buf, char *str, size_t str_len, size_t count) +{ + snprintf(str, str_len, "%s", buf); + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get bsp parameter value */ +static ssize_t bsp_callback_show(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + + switch (attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + default: + return -EINVAL; + } + return bsp_read(buf, str); +} + +/* set bsp parameter value */ +static ssize_t bsp_callback_store(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + ssize_t ret = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case BSP_DEBUG: + str = bsp_debug; + str_len = sizeof(str); + ret = bsp_write(buf, str, str_len, count); + + if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_config_bsp_log(bsp_debug_u8) < 0) { + return -EINVAL; + } + return ret; + default: + return -EINVAL; + } + return 0; +} + +/* get cpld register value */ +static ssize_t cpld_show(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + u8 mask = MASK_NONE; + u8 data_type=DATA_UNK; + + switch (attr->index) { + //CPLD 1 & CPLD 2 + case CPLD_MAJOR_VER: + case CPLD_MINOR_VER: + case CPLD_ID: + case CPLD_BUILD: + case CPLD_CHIP: + case CPLD_EVT_CTRL: + + //CPLD 1 + case CPLD_BOARD_ID_0: + case CPLD_BOARD_ID_1: + case CPLD_SKU_EXT: + + case CPLD_MAC_INTR: + case CPLD_HWM_INTR: + case CPLD_CPLD2_INTR: + case CPLD_PTP_INTR: + case CPLD_SYSTEM_INTR: + + case CPLD_MAC_MASK: + case CPLD_HWM_MASK: + case CPLD_CPLD2_MASK: + case CPLD_PTP_MASK: + case CPLD_SYSTEM_MASK: + + case CPLD_MAC_EVT: + case CPLD_HWM_EVT: + case CPLD_CPLD2_EVT: + + case CPLD_MAC_RESET: + case CPLD_SYSTEM_RESET: + case CPLD_BMC_NTM_RESET: + case CPLD_USB_RESET: + case CPLD_I2C_MUX_RESET: + case CPLD_MISC_RESET: + + case CPLD_BRD_PRESENT: + case CPLD_PSU_STATUS: + case CPLD_SYSTEM_PWR: + case CPLD_MAC_SYNCE: + case CPLD_MAC_AVS: + case CPLD_SYSTEM_STATUS: + case CPLD_WATCHDOG: + case CPLD_BOOT_SELECT: + case CPLD_MUX_CTRL: + case CPLD_MISC_CTRL_1: + case CPLD_MISC_CTRL_2: + case CPLD_MAC_TEMP: + + case CPLD_SYSTEM_LED_PSU: + case CPLD_SYSTEM_LED_SYS: + case CPLD_SYSTEM_LED_FAN: + case CPLD_SYSTEM_LED_ID: + + case DBG_CPLD_MAC_INTR: + case DBG_CPLD_HWM_INTR: + case DBG_CPLD_CPLD2_INTR: + case DBG_CPLD_PTP_INTR: + + //CPLD 2 + case CPLD_QSFP_ABS_0_7: + case CPLD_QSFP_ABS_8_15: + case CPLD_QSFP_ABS_16_23: + case CPLD_QSFP_ABS_24_31: + + case CPLD_QSFP_INTR_0_7: + case CPLD_QSFP_INTR_8_15: + case CPLD_QSFP_INTR_16_23: + case CPLD_QSFP_INTR_24_31: + + case CPLD_SFP_ABS_0_1: + case CPLD_SFP_RXLOS_0_1: + case CPLD_SFP_TXFLT_0_1: + + case CPLD_QSFP_MASK_ABS_0_7: + case CPLD_QSFP_MASK_ABS_8_15: + case CPLD_QSFP_MASK_ABS_16_23: + case CPLD_QSFP_MASK_ABS_24_31: + + case CPLD_QSFP_MASK_INTR_0_7: + case CPLD_QSFP_MASK_INTR_8_15: + case CPLD_QSFP_MASK_INTR_16_23: + case CPLD_QSFP_MASK_INTR_24_31: + + case CPLD_SFP_MASK_ABS_0_1: + case CPLD_SFP_MASK_RXLOS_0_1: + case CPLD_SFP_MASK_TXFLT_0_1: + + case CPLD_QSFP_EVT_ABS_0_7: + case CPLD_QSFP_EVT_ABS_8_15: + case CPLD_QSFP_EVT_ABS_16_23: + case CPLD_QSFP_EVT_ABS_24_31: + + case CPLD_QSFP_EVT_INTR_0_7: + case CPLD_QSFP_EVT_INTR_8_15: + case CPLD_QSFP_EVT_INTR_16_23: + case CPLD_QSFP_EVT_INTR_24_31: + + case CPLD_SFP_EVT_ABS_0_1: + case CPLD_SFP_EVT_RXLOS_0_1: + case CPLD_SFP_EVT_TXFLT_0_1: + + case CPLD_QSFP_RESET_0_7: + case CPLD_QSFP_RESET_8_15: + case CPLD_QSFP_RESET_16_23: + case CPLD_QSFP_RESET_24_31: + + case CPLD_QSFP_LPMODE_0_7: + case CPLD_QSFP_LPMODE_8_15: + case CPLD_QSFP_LPMODE_16_23: + case CPLD_QSFP_LPMODE_24_31: + + case CPLD_SFP_TXDIS_0_1: + case CPLD_SFP_TS_0_1: + case CPLD_SFP_RS_0_1: + + case DBG_CPLD_QSFP_ABS_0_7: + case DBG_CPLD_QSFP_ABS_8_15: + case DBG_CPLD_QSFP_ABS_16_23: + case DBG_CPLD_QSFP_ABS_24_31: + + case DBG_CPLD_QSFP_INTR_0_7: + case DBG_CPLD_QSFP_INTR_8_15: + case DBG_CPLD_QSFP_INTR_16_23: + case DBG_CPLD_QSFP_INTR_24_31: + + case DBG_CPLD_SFP_ABS_0_1: + case DBG_CPLD_SFP_RXLOS_0_1: + case DBG_CPLD_SFP_TXFLT_0_1: + reg = attr_reg[attr->index].reg; + mask= attr_reg[attr->index].mask; + data_type = attr_reg[attr->index].data_type; + break; + default: + return -EINVAL; + } + return cpld_reg_read(dev, buf, reg, mask, data_type); +} + +/* set cpld register value */ +static ssize_t cpld_store(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u8 reg = 0; + u8 mask = MASK_NONE; + + switch (attr->index) { + + // CPLD 1 & CPLD2 + case CPLD_EVT_CTRL: + + //CPLD 1 + case CPLD_MAC_MASK: + case CPLD_HWM_MASK: + case CPLD_CPLD2_MASK: + case CPLD_PTP_MASK: + case CPLD_SYSTEM_MASK: + case CPLD_MAC_RESET: + case CPLD_SYSTEM_RESET: + case CPLD_BMC_NTM_RESET: + case CPLD_USB_RESET: + case CPLD_I2C_MUX_RESET: + case CPLD_MISC_RESET: + case CPLD_BOOT_SELECT: + case CPLD_MUX_CTRL: + case CPLD_MISC_CTRL_1: + case CPLD_MISC_CTRL_2: + case CPLD_SYSTEM_LED_PSU: + case CPLD_SYSTEM_LED_SYS: + case CPLD_SYSTEM_LED_FAN: + case CPLD_SYSTEM_LED_ID: + + //CPLD 2 + case CPLD_QSFP_MASK_ABS_0_7: + case CPLD_QSFP_MASK_ABS_8_15: + case CPLD_QSFP_MASK_ABS_16_23: + case CPLD_QSFP_MASK_ABS_24_31: + case CPLD_QSFP_MASK_INTR_0_7: + case CPLD_QSFP_MASK_INTR_8_15: + case CPLD_QSFP_MASK_INTR_16_23: + case CPLD_QSFP_MASK_INTR_24_31: + case CPLD_SFP_MASK_ABS_0_1: + case CPLD_SFP_MASK_RXLOS_0_1: + case CPLD_SFP_MASK_TXFLT_0_1: + case CPLD_QSFP_RESET_0_7: + case CPLD_QSFP_RESET_8_15: + case CPLD_QSFP_RESET_16_23: + case CPLD_QSFP_RESET_24_31: + case CPLD_QSFP_LPMODE_0_7: + case CPLD_QSFP_LPMODE_8_15: + case CPLD_QSFP_LPMODE_16_23: + case CPLD_QSFP_LPMODE_24_31: + case CPLD_SFP_TXDIS_0_1: + case CPLD_SFP_TS_0_1: + case CPLD_SFP_RS_0_1: + reg = attr_reg[attr->index].reg; + mask= attr_reg[attr->index].mask; + break; + default: + return -EINVAL; + } + return cpld_reg_write(dev, buf, count, reg, mask); +} + +/* get cpld register value */ +static u8 _cpld_reg_read(struct device *dev, + u8 reg, + u8 mask) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + int reg_val; + + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + + if (unlikely(reg_val < 0)) { + return reg_val; + } else { + reg_val=_mask_shift(reg_val, mask); + return reg_val; + } +} + +/* get cpld register value */ +static ssize_t cpld_reg_read(struct device *dev, + char *buf, + u8 reg, + u8 mask, + u8 data_type) +{ + int reg_val; + + reg_val = _cpld_reg_read(dev, reg, mask); + if (unlikely(reg_val < 0)) { + dev_err(dev, "cpld_reg_read() error, reg_val=%d\n", reg_val); + return reg_val; + } else { + return _parse_data(buf, reg_val, data_type); + } +} + +/* set cpld register value */ +static ssize_t cpld_reg_write(struct device *dev, + const char *buf, + size_t count, + u8 reg, + u8 mask) +{ + struct i2c_client *client = to_i2c_client(dev); + struct cpld_data *data = i2c_get_clientdata(client); + u8 reg_val, reg_val_now, shift; + int ret = 0; + + if (kstrtou8(buf, 0, ®_val) < 0) + return -EINVAL; + + //apply continuous bits operation if mask is specified, discontinuous bits are not supported + if (mask != MASK_ALL) { + reg_val_now = _cpld_reg_read(dev, reg, MASK_ALL); + if (unlikely(reg_val_now < 0)) { + dev_err(dev, "cpld_reg_write() error, reg_val_now=%d\n", reg_val_now); + return reg_val_now; + } else { + //clear bits in reg_val_now by the mask + reg_val_now &= ~mask; + //get bit shift by the mask + shift = _shift(mask); + //calculate new reg_val + reg_val = reg_val_now | (reg_val << shift); + } + } + + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, + client, reg, reg_val); + + if (unlikely(ret < 0)) { + dev_err(dev, "cpld_reg_write() error, return=%d\n", ret); + return ret; + } + + return count; +} + +/* get qsfp port config register value */ +static ssize_t cpld_version_h_show(struct device *dev, + struct device_attribute *da, + char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + if (attr->index == CPLD_VERSION_H) { + return sprintf(buf, "%d.%02d.%03d", + _cpld_reg_read(dev, attr_reg[CPLD_MAJOR_VER].reg, attr_reg[CPLD_MAJOR_VER].mask), + _cpld_reg_read(dev, attr_reg[CPLD_MINOR_VER].reg, attr_reg[CPLD_MINOR_VER].mask), + _cpld_reg_read(dev, attr_reg[CPLD_BUILD].reg, attr_reg[CPLD_BUILD].mask)); + } + return -1; +} + +/* add valid cpld client to list */ +static void cpld_add_client(struct i2c_client *client) +{ + struct cpld_client_node *node = NULL; + + node = kzalloc(sizeof(struct cpld_client_node), GFP_KERNEL); + if (!node) { + dev_info(&client->dev, + "Can't allocate cpld_client_node for index %d\n", + client->addr); + return; + } + + node->client = client; + + mutex_lock(&list_lock); + list_add(&node->list, &cpld_client_list); + mutex_unlock(&list_lock); +} + +/* remove exist cpld client in list */ +static void cpld_remove_client(struct i2c_client *client) +{ + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int found = 0; + + mutex_lock(&list_lock); + list_for_each(list_node, &cpld_client_list) { + cpld_node = list_entry(list_node, + struct cpld_client_node, list); + + if (cpld_node->client == client) { + found = 1; + break; + } + } + + if (found) { + list_del(list_node); + kfree(cpld_node); + } + mutex_unlock(&list_lock); +} + +/* cpld drvier probe */ +static int cpld_probe(struct i2c_client *client, + const struct i2c_device_id *dev_id) +{ + int status; + struct cpld_data *data = NULL; + int ret = -EPERM; + + data = kzalloc(sizeof(struct cpld_data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + /* init cpld data for client */ + i2c_set_clientdata(client, data); + mutex_init(&data->access_lock); + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_BYTE_DATA)) { + dev_info(&client->dev, + "i2c_check_functionality failed (0x%x)\n", + client->addr); + status = -EIO; + goto exit; + } + + /* get cpld id from device */ + ret = i2c_smbus_read_byte_data(client, CPLD_ID_REG); + + if (ret < 0) { + dev_info(&client->dev, + "fail to get cpld id (0x%x) at addr (0x%x)\n", + CPLD_ID_REG, client->addr); + status = -EIO; + goto exit; + } + + if (INVALID(ret, cpld1, cpld2)) { + dev_info(&client->dev, + "cpld id %d(device) not valid\n", ret); + //status = -EPERM; + //goto exit; + } + + data->index = dev_id->driver_data; + + /* register sysfs hooks for different cpld group */ + dev_info(&client->dev, "probe cpld with index %d\n", data->index); + switch (data->index) { + case cpld1: + status = sysfs_create_group(&client->dev.kobj, + &cpld1_group); + break; + case cpld2: + status = sysfs_create_group(&client->dev.kobj, + &cpld2_group); + break; + default: + status = -EINVAL; + } + + if (status) + goto exit; + + dev_info(&client->dev, "chip found\n"); + + /* add probe chip to client list */ + cpld_add_client(client); + + return 0; +exit: + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &cpld2_group); + break; + default: + break; + } + return status; +} + +/* cpld drvier remove */ +static int cpld_remove(struct i2c_client *client) +{ + struct cpld_data *data = i2c_get_clientdata(client); + + switch (data->index) { + case cpld1: + sysfs_remove_group(&client->dev.kobj, &cpld1_group); + break; + case cpld2: + sysfs_remove_group(&client->dev.kobj, &cpld2_group); + break; + } + + cpld_remove_client(client); + return 0; +} + +#if 0 /* FIXME */ +#define I2C_RW_RETRY_COUNT 3 +#define I2C_RW_RETRY_INTERVAL 60 + +static int s9110_32x_cpld_read_internal(struct i2c_client *client, u8 reg) +{ + int retry = I2C_RW_RETRY_COUNT; + int reg_val = 0; + struct cpld_data *data = i2c_get_clientdata(client); + + while (retry) { + I2C_READ_BYTE_DATA(reg_val, &data->access_lock, client, reg); + if (unlikely(reg_val < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + + if (retry == 0) { + dev_err(&client->dev, "%s() retry %d times but still failed, reg=%x\n", __func__, I2C_RW_RETRY_COUNT, reg); + } + + continue; + } + + break; + } + + return reg_val; +} + +static int s9110_32x_cpld_write_internal(struct i2c_client *client, u8 reg, u8 value) +{ + int ret = 0, retry = I2C_RW_RETRY_COUNT; + struct cpld_data *data = i2c_get_clientdata(client); + + while (retry) { + I2C_WRITE_BYTE_DATA(ret, &data->access_lock, client, reg, value); + if (unlikely(ret < 0)) { + msleep(I2C_RW_RETRY_INTERVAL); + retry--; + + if (retry == 0) { + dev_err(&client->dev, "%s() retry %d times but still failed, reg=%x\n", __func__, I2C_RW_RETRY_COUNT, reg); + } + + continue; + } + break; + } + + return ret; +} + + +int s9110_32x_cpld_psu_mux_sel(u8 mux_sel) +{ + unsigned short cpld_addr = cpld_i2c_addr[0]; + u8 reg = CPLD_MUX_CTRL_REG; + u8 reg_val = 0; + u8 psu_mux_mask = 0x06; + u8 mux_sel_val = 0; + + struct list_head *list_node = NULL; + struct cpld_client_node *cpld_node = NULL; + int ret = -EIO; + + switch(mux_sel) { + case 0: + //psu 0 + mux_sel_val = 0x04; + break; + case 1: + //psu 1 + mux_sel_val = 0x02; + break; + default: + //bmc + mux_sel_val = psu_mux_mask; + break; + } + + mutex_lock(&list_lock); + + list_for_each(list_node, &cpld_client_list) + { + cpld_node = list_entry(list_node, struct cpld_client_node, list); + + if (cpld_node->client->addr == cpld_addr) { + //read current reg value + reg_val = s9110_32x_cpld_read_internal(cpld_node->client, reg); + //clear psu_mux_sel bits (bit 1 and 2) + reg_val &= ~psu_mux_mask; + //modify psu_mux_sel bits (bit 1 and 2) + reg_val |= mux_sel_val; + //write reg value + s9110_32x_cpld_write_internal(cpld_node->client, reg, reg_val); + + break; + } else { + pr_err("cpld_node->client->addr=%x, cpld_addr=%x\n", cpld_node->client->addr, cpld_addr); + } + } + + mutex_unlock(&list_lock); + + return ret; +} +EXPORT_SYMBOL(s9110_32x_cpld_psu_mux_sel); +#endif + +MODULE_DEVICE_TABLE(i2c, cpld_id); + +static struct i2c_driver cpld_driver = { + .class = I2C_CLASS_HWMON, + .driver = { + .name = "x86_64_ufispace_s9110_32x_cpld", + }, + .probe = cpld_probe, + .remove = cpld_remove, + .id_table = cpld_id, + .address_list = cpld_i2c_addr, +}; + +static int __init cpld_init(void) +{ + mutex_init(&list_lock); + return i2c_add_driver(&cpld_driver); +} + +static void __exit cpld_exit(void) +{ + i2c_del_driver(&cpld_driver); +} + +MODULE_AUTHOR("Nonodark Huang "); +MODULE_DESCRIPTION("x86_64_ufispace_s9110_32x_cpld driver"); +MODULE_LICENSE("GPL"); + +module_init(cpld_init); +module_exit(cpld_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.h b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.h new file mode 100644 index 000000000000..74db9cab4a69 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-cpld.h @@ -0,0 +1,149 @@ +/* header file for i2c cpld driver of ufispace_s9110_32x + * + * Copyright (C) 2022 UfiSpace Technology Corporation. + * Jason Tsai + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef UFISPACE_S9110_32X_CPLD_H +#define UFISPACE_S9110_32X_CPLD_H + +/* CPLD device index value */ +enum cpld_id { + cpld1, + cpld2 +}; + +/* CPLD 1 & CPLD 2 registers */ +#define CPLD_NONE_REG 0x00 +#define CPLD_VERSION_REG 0x02 +#define CPLD_ID_REG 0x03 +#define CPLD_BUILD_REG 0x04 +#define CPLD_CHIP_REG 0x05 +#define CPLD_EVT_CTRL_REG 0x3F + +/* CPLD 1 registers */ +#define CPLD_BOARD_ID_0_REG 0x00 +#define CPLD_BOARD_ID_1_REG 0x01 +#define CPLD_SKU_EXT_REG 0x06 +#define CPLD_MAC_INTR_REG 0x10 +#define CPLD_HWM_INTR_REG 0x13 +#define CPLD_CPLD2_INTR_REG 0x14 +#define CPLD_PTP_INTR_REG 0x1B +#define CPLD_SYSTEM_INTR_REG 0x1C +#define CPLD_MAC_MASK_REG 0x20 +#define CPLD_HWM_MASK_REG 0x23 +#define CPLD_CPLD2_MASK_REG 0x24 +#define CPLD_PTP_MASK_REG 0x2B +#define CPLD_SYSTEM_MASK_REG 0x2C +#define CPLD_MAC_EVT_REG 0x30 +#define CPLD_HWM_EVT_REG 0x33 +#define CPLD_CPLD2_EVT_REG 0x34 +#define CPLD_MAC_RESET_REG 0x40 +#define CPLD_SYSTEM_RESET_REG 0x41 +#define CPLD_BMC_NTM_RESET_REG 0x43 +#define CPLD_USB_RESET_REG 0x44 +#define CPLD_I2C_MUX_RESET_REG 0x46 +#define CPLD_MISC_RESET_REG 0x48 +#define CPLD_BRD_PRESENT_REG 0x50 +#define CPLD_PSU_STATUS_REG 0x51 +#define CPLD_SYSTEM_PWR_REG 0x52 +#define CPLD_MAC_SYNCE_REG 0x53 +#define CPLD_MAC_AVS_REG 0x54 +#define CPLD_SYSTEM_STATUS_REG 0x55 +#define CPLD_WATCHDOG_REG 0x5A +#define CPLD_BOOT_SELECT_REG 0x5B +#define CPLD_MUX_CTRL_REG 0x5C +#define CPLD_MISC_CTRL_1_REG 0x5D +#define CPLD_MISC_CTRL_2_REG 0x5E +#define CPLD_MAC_TEMP_REG 0x61 +#define CPLD_SYSTEM_LED_PSU_REG 0x80 +#define CPLD_SYSTEM_LED_SYS_REG 0x81 +#define CPLD_SYSTEM_LED_FAN_REG 0x83 +#define CPLD_SYSTEM_LED_ID_REG 0x84 +#define DBG_CPLD_MAC_INTR_REG 0xE0 +#define DBG_CPLD_HWM_INTR_REG 0xE3 +#define DBG_CPLD_CPLD2_INTR_REG 0xE4 +#define DBG_CPLD_PTP_INTR_REG 0xEB + +/* CPLD 2*/ +#define CPLD_QSFP_ABS_0_7_REG 0x10 +#define CPLD_QSFP_ABS_8_15_REG 0x11 +#define CPLD_QSFP_ABS_16_23_REG 0x12 +#define CPLD_QSFP_ABS_24_31_REG 0x13 +#define CPLD_QSFP_INTR_0_7_REG 0x14 +#define CPLD_QSFP_INTR_8_15_REG 0x15 +#define CPLD_QSFP_INTR_16_23_REG 0x16 +#define CPLD_QSFP_INTR_24_31_REG 0x17 +#define CPLD_SFP_ABS_0_1_REG 0x18 +#define CPLD_SFP_RXLOS_0_1_REG 0x19 +#define CPLD_SFP_TXFLT_0_1_REG 0x1a +#define CPLD_QSFP_MASK_ABS_0_7_REG 0x20 +#define CPLD_QSFP_MASK_ABS_8_15_REG 0x21 +#define CPLD_QSFP_MASK_ABS_16_23_REG 0x22 +#define CPLD_QSFP_MASK_ABS_24_31_REG 0x23 +#define CPLD_QSFP_MASK_INTR_0_7_REG 0x24 +#define CPLD_QSFP_MASK_INTR_8_15_REG 0x25 +#define CPLD_QSFP_MASK_INTR_16_23_REG 0x26 +#define CPLD_QSFP_MASK_INTR_24_31_REG 0x27 +#define CPLD_SFP_MASK_ABS_0_1_REG 0x28 +#define CPLD_SFP_MASK_RXLOS_0_1_REG 0x29 +#define CPLD_SFP_MASK_TXFLT_0_1_REG 0x2A +#define CPLD_QSFP_EVT_ABS_0_7_REG 0x30 +#define CPLD_QSFP_EVT_ABS_8_15_REG 0x31 +#define CPLD_QSFP_EVT_ABS_16_23_REG 0x32 +#define CPLD_QSFP_EVT_ABS_24_31_REG 0x33 +#define CPLD_QSFP_EVT_INTR_0_7_REG 0x34 +#define CPLD_QSFP_EVT_INTR_8_15_REG 0x35 +#define CPLD_QSFP_EVT_INTR_16_23_REG 0x36 +#define CPLD_QSFP_EVT_INTR_24_31_REG 0x37 +#define CPLD_SFP_EVT_ABS_0_1_REG 0x38 +#define CPLD_SFP_EVT_RXLOS_0_1_REG 0x39 +#define CPLD_SFP_EVT_TXFLT_0_1_REG 0x3A +#define CPLD_QSFP_RESET_0_7_REG 0x40 +#define CPLD_QSFP_RESET_8_15_REG 0x41 +#define CPLD_QSFP_RESET_16_23_REG 0x42 +#define CPLD_QSFP_RESET_24_31_REG 0x43 +#define CPLD_QSFP_LPMODE_0_7_REG 0x44 +#define CPLD_QSFP_LPMODE_8_15_REG 0x45 +#define CPLD_QSFP_LPMODE_16_23_REG 0x46 +#define CPLD_QSFP_LPMODE_24_31_REG 0x47 +#define CPLD_SFP_TXDIS_0_1_REG 0x48 +#define CPLD_SFP_TS_0_1_REG 0x49 +#define CPLD_SFP_RS_0_1_REG 0x4A +#define DBG_CPLD_QSFP_ABS_0_7_REG 0xD0 +#define DBG_CPLD_QSFP_ABS_8_15_REG 0xD1 +#define DBG_CPLD_QSFP_ABS_16_23_REG 0xD2 +#define DBG_CPLD_QSFP_ABS_24_31_REG 0xD3 +#define DBG_CPLD_QSFP_INTR_0_7_REG 0xD4 +#define DBG_CPLD_QSFP_INTR_8_15_REG 0xD5 +#define DBG_CPLD_QSFP_INTR_16_23_REG 0xD6 +#define DBG_CPLD_QSFP_INTR_24_31_REG 0xD7 +#define DBG_CPLD_SFP_ABS_0_1_REG 0xD8 +#define DBG_CPLD_SFP_RXLOS_0_1_REG 0xD9 +#define DBG_CPLD_SFP_TXFLT_0_1_REG 0xDA + +//MASK +#define MASK_ALL (0xFF) +#define MASK_NONE (0x00) +#define MASK_0000_0111 (0x07) +#define MASK_0011_1111 (0x3F) +#define MASK_1100_0000 (0xC0) + +/* common manipulation */ +#define INVALID(i, min, max) ((i < min) || (i > max) ? 1u : 0u) + +#endif diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-lpc.c b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-lpc.c new file mode 100644 index 000000000000..14d7c7ec6e4a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-lpc.c @@ -0,0 +1,981 @@ +/* + * A lpc driver for the ufispace_s9110_32x + * + * Copyright (C) 2022 UfiSpace Technology Corporation. + * Nonodark Huang + * + * Based on ad7414.c + * Copyright 2006 Stefan Roese , DENX Software Engineering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include +#include +#include +#include +#include +#include + +#if !defined(SENSOR_DEVICE_ATTR_RO) +#define SENSOR_DEVICE_ATTR_RO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, 0444, _func##_show, NULL, _index) +#endif + +#if !defined(SENSOR_DEVICE_ATTR_RW) +#define SENSOR_DEVICE_ATTR_RW(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, 0644, _func##_show, _func##_store, _index) + +#endif + +#if !defined(SENSOR_DEVICE_ATTR_WO) +#define SENSOR_DEVICE_ATTR_WO(_name, _func, _index) \ + SENSOR_DEVICE_ATTR(_name, 0200, NULL, _func##_store, _index) +#endif + +#define BSP_LOG_R(fmt, args...) \ + _bsp_log (LOG_READ, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) +#define BSP_LOG_W(fmt, args...) \ + _bsp_log (LOG_WRITE, KERN_INFO "%s:%s[%d]: " fmt "\r\n", \ + __FILE__, __func__, __LINE__, ##args) + +#define _DEVICE_ATTR(_name) \ + &sensor_dev_attr_##_name.dev_attr.attr + +#define BSP_PR(level, fmt, args...) _bsp_log (LOG_SYS, level "[BSP]" fmt "\r\n", ##args) + +#define DRIVER_NAME "x86_64_ufispace_s9110_32x_lpc" + +/* LPC registers */ + +#define REG_BASE_MB 0x700 +#define REG_BASE_EC 0xE300 + +#define REG_NONE 0x00 +//MB CPLD +#define REG_BRD_ID_0 (REG_BASE_MB + 0x00) +#define REG_BRD_ID_1 (REG_BASE_MB + 0x01) +#define REG_CPLD_VERSION (REG_BASE_MB + 0x02) +#define REG_CPLD_ID (REG_BASE_MB + 0x03) +#define REG_CPLD_BUILD (REG_BASE_MB + 0x04) +#define REG_CPLD_CHIP (REG_BASE_MB + 0x05) +#define REG_BRD_EXT_ID (REG_BASE_MB + 0x06) +#define REG_I2C_MUX_RESET (REG_BASE_MB + 0x46) +#define REG_MUX_CTRL (REG_BASE_MB + 0x5C) +#define REG_CPLD1_MISC_CTRL (REG_BASE_MB + 0x5D) +#define REG_CPLD1_MISC_CTRL_2 (REG_BASE_MB + 0x5E) + +//EC +#define REG_MISC_CTRL (REG_BASE_EC + 0x0C) +#define REG_CPU_REV (REG_BASE_EC + 0x17) + +// BMC mailbox +#define REG_TEMP_MAC_HWM (REG_BASE_MB + 0xC0) + +#define MASK_ALL (0xFF) +#define MASK_NONE (0x00) +#define MASK_0000_0011 (0x03) +#define MASK_0000_0100 (0x04) +#define MASK_0000_0111 (0x07) +#define MASK_0001_1000 (0x18) +#define MASK_0010_0000 (0x20) +#define MASK_0011_0111 (0x37) +#define MASK_0011_1111 (0x3F) +#define MASK_0100_0000 (0x40) +#define MASK_1000_0000 (0x80) +#define MASK_1100_0000 (0xC0) + +#define LPC_MDELAY (5) +#define MDELAY_RESET_INTERVAL (100) +#define MDELAY_RESET_FINISH (500) + +/* LPC sysfs attributes index */ +enum lpc_sysfs_attributes { + //MB CPLD + ATT_BRD_ID_0, + ATT_BRD_SKU_ID, + ATT_BRD_ID_1, + ATT_BRD_HW_ID, + ATT_BRD_DEPH_ID, + ATT_BRD_BUILD_ID, + ATT_BRD_BIT_SEL, + ATT_BRD_CPLD_ID_TYPE, + ATT_CPLD_VERSION_MAJOR, + ATT_CPLD_VERSION_MINOR, + ATT_CPLD_ID, + ATT_CPLD_BUILD, + ATT_CPLD_VERSION_H, + ATT_CPLD_CHIP, + ATT_BRD_EXT_ID, + ATT_MUX_RESET_ALL, + ATT_MUX_CTRL, + ATT_UART_CTRL, + ATT_USB_CTRL, + + //EC + ATT_BIOS_BOOT_SEL, + ATT_CPU_REV_HW_REV, + ATT_CPU_REV_DEV_PHASE, + ATT_CPU_REV_BUILD_ID, + + //BMC mailbox + ATT_TEMP_MAC_HWM, + + //BSP + ATT_BSP_VERSION, + ATT_BSP_DEBUG, + ATT_BSP_PR_INFO, + ATT_BSP_PR_ERR, + ATT_BSP_REG, + ATT_BSP_REG_VALUE, + ATT_BSP_GPIO_MAX, + ATT_MAX +}; + +enum data_type { + DATA_HEX, + DATA_DEC, + DATA_S_DEC, + DATA_UNK, +}; + +typedef struct { + u16 reg; + u8 mask; + u8 data_type; +} attr_reg_map_t; + +attr_reg_map_t attr_reg[]= { + + //MB CPLD + [ATT_BRD_ID_0] = {REG_BRD_ID_0 , MASK_ALL , DATA_HEX}, + [ATT_BRD_SKU_ID] = {REG_BRD_ID_0 , MASK_ALL , DATA_DEC}, + [ATT_BRD_ID_1] = {REG_BRD_ID_1 , MASK_ALL , DATA_HEX}, + [ATT_BRD_HW_ID] = {REG_BRD_ID_1 , MASK_0000_0011, DATA_DEC}, + [ATT_BRD_DEPH_ID] = {REG_BRD_ID_1 , MASK_0000_0100, DATA_DEC}, + [ATT_BRD_BUILD_ID] = {REG_BRD_ID_1 , MASK_0001_1000, DATA_DEC}, + [ATT_BRD_BIT_SEL] = {REG_BRD_ID_1 , MASK_0010_0000, DATA_DEC}, + [ATT_BRD_CPLD_ID_TYPE] = {REG_BRD_ID_1 , MASK_1000_0000, DATA_DEC}, + [ATT_CPLD_VERSION_MAJOR] = {REG_CPLD_VERSION , MASK_1100_0000, DATA_DEC}, + [ATT_CPLD_VERSION_MINOR] = {REG_CPLD_VERSION , MASK_0011_1111, DATA_DEC}, + [ATT_CPLD_ID] = {REG_CPLD_ID , MASK_0000_0111, DATA_DEC}, + [ATT_CPLD_BUILD] = {REG_CPLD_BUILD , MASK_ALL , DATA_DEC}, + [ATT_CPLD_VERSION_H] = {REG_NONE , MASK_NONE , DATA_UNK}, + [ATT_CPLD_CHIP] = {REG_CPLD_CHIP , MASK_0000_0011, DATA_DEC}, + [ATT_BRD_EXT_ID] = {REG_BRD_EXT_ID , MASK_0000_0111, DATA_DEC}, + [ATT_MUX_RESET_ALL] = {REG_I2C_MUX_RESET, MASK_0011_1111, DATA_DEC}, + [ATT_MUX_CTRL] = {REG_MUX_CTRL , MASK_ALL , DATA_HEX}, + [ATT_UART_CTRL] = {REG_MUX_CTRL , MASK_0010_0000, DATA_DEC}, + [ATT_USB_CTRL] = {REG_MUX_CTRL , MASK_1000_0000, DATA_DEC}, + + //EC + [ATT_BIOS_BOOT_SEL] = {REG_MISC_CTRL , MASK_0100_0000, DATA_DEC}, + [ATT_CPU_REV_HW_REV] = {REG_CPU_REV , MASK_0000_0011, DATA_DEC}, + [ATT_CPU_REV_DEV_PHASE] = {REG_CPU_REV , MASK_0000_0100, DATA_DEC}, + [ATT_CPU_REV_BUILD_ID] = {REG_CPU_REV , MASK_0001_1000, DATA_DEC}, + + //BMC mailbox + [ATT_TEMP_MAC_HWM] = {REG_TEMP_MAC_HWM , MASK_ALL , DATA_S_DEC}, + + //BSP + [ATT_BSP_VERSION] = {REG_NONE , MASK_NONE , DATA_UNK}, + [ATT_BSP_DEBUG] = {REG_NONE , MASK_NONE , DATA_UNK}, + [ATT_BSP_PR_INFO] = {REG_NONE , MASK_NONE , DATA_UNK}, + [ATT_BSP_PR_ERR] = {REG_NONE , MASK_NONE , DATA_UNK}, + [ATT_BSP_REG] = {REG_NONE , MASK_NONE , DATA_UNK}, + [ATT_BSP_REG_VALUE] = {REG_NONE , MASK_NONE , DATA_HEX}, + [ATT_BSP_GPIO_MAX] = {REG_NONE , MASK_NONE , DATA_DEC}, +}; + +enum bsp_log_types { + LOG_NONE, + LOG_RW, + LOG_READ, + LOG_WRITE, + LOG_SYS +}; + +enum bsp_log_ctrl { + LOG_DISABLE, + LOG_ENABLE +}; + +struct lpc_data_s { + struct mutex access_lock; +}; + +struct lpc_data_s *lpc_data; +char bsp_version[16]=""; +char bsp_debug[2]="0"; +char bsp_reg[8]="0x0"; +u8 enable_log_read = LOG_DISABLE; +u8 enable_log_write = LOG_DISABLE; +u8 enable_log_sys = LOG_ENABLE; +u8 mailbox_inited=0; + +/* reg shift */ +static u8 _shift(u8 mask) +{ + int i=0, mask_one=1; + + for(i=0; i<8; ++i) { + if ((mask & mask_one) == 1) + return i; + else + mask >>= 1; + } + + return -1; +} + +/* reg mask and shift */ +static u8 _mask_shift(u8 val, u8 mask) +{ + int shift=0; + + shift = _shift(mask); + + return (val & mask) >> shift; +} + +static u8 _bit_operation(u8 reg_val, u8 bit, u8 bit_val) +{ + if (bit_val == 0) + reg_val = reg_val & ~(1 << bit); + else + reg_val = reg_val | (1 << bit); + return reg_val; +} + +static u8 _parse_data(char *buf, unsigned int data, u8 data_type) +{ + if(buf == NULL) { + return -1; + } + + if(data_type == DATA_HEX) { + return sprintf(buf, "0x%02x", data); + } else if(data_type == DATA_DEC) { + return sprintf(buf, "%u", data); + } else { + return -1; + } + return 0; +} + +static int _bsp_log(u8 log_type, char *fmt, ...) +{ + if ((log_type==LOG_READ && enable_log_read) || + (log_type==LOG_WRITE && enable_log_write) || + (log_type==LOG_SYS && enable_log_sys) ) { + va_list args; + int r; + + va_start(args, fmt); + r = vprintk(fmt, args); + va_end(args); + + return r; + } else { + return 0; + } +} + +static int _bsp_log_config(u8 log_type) +{ + switch(log_type) { + case LOG_NONE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_RW: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_ENABLE; + break; + case LOG_READ: + enable_log_read = LOG_ENABLE; + enable_log_write = LOG_DISABLE; + break; + case LOG_WRITE: + enable_log_read = LOG_DISABLE; + enable_log_write = LOG_ENABLE; + break; + default: + return -EINVAL; + } + return 0; +} + +static void _outb(u8 data, u16 port) +{ + outb(data, port); + mdelay(LPC_MDELAY); +} + +/* init bmc mailbox, get from BMC team */ +static int bmc_mailbox_init(void) +{ + if (mailbox_inited) { + return mailbox_inited; + } + + //Enable super io writing + _outb(0xa5, 0x2e); + _outb(0xa5, 0x2e); + + //Logic device number + _outb(0x07, 0x2e); + _outb(0x0e, 0x2f); + + //Disable mailbox + _outb(0x30, 0x2e); + _outb(0x00, 0x2f); + + //Set base address bit + _outb(0x60, 0x2e); + _outb(0x07, 0x2f); + _outb(0x61, 0x2e); + _outb(0xc0, 0x2f); + + //Select bit[3:0] of SIRQ + _outb(0x70, 0x2e); + _outb(0x07, 0x2f); + + //Low level trigger + _outb(0x71, 0x2e); + _outb(0x01, 0x2f); + + //Enable mailbox + _outb(0x30, 0x2e); + _outb(0x01, 0x2f); + + //Disable super io writing + _outb(0xaa, 0x2e); + + //Mailbox initial + _outb(0x00, 0x786); + _outb(0x00, 0x787); + + //set mailbox_inited + mailbox_inited = 1; + + return mailbox_inited; +} + +/* get lpc register value */ +static u8 _lpc_reg_read(u16 reg, u8 mask) +{ + u8 reg_val=0x0, reg_mk_shf_val = 0x0; + + mutex_lock(&lpc_data->access_lock); + reg_val = inb(reg); + mutex_unlock(&lpc_data->access_lock); + + reg_mk_shf_val = _mask_shift(reg_val, mask); + + BSP_LOG_R("reg=0x%03x, reg_val=0x%02x, mask=0x%02x, reg_mk_shf_val=0x%02x", reg, reg_val, mask, reg_mk_shf_val); + + return reg_mk_shf_val; +} + +/* get lpc register value */ +static ssize_t lpc_reg_read(u16 reg, u8 mask, char *buf, u8 data_type) +{ + u8 reg_val; + int len=0; + + reg_val = _lpc_reg_read(reg, mask); + + // may need to change to hex value ? + len=_parse_data(buf, reg_val, data_type); + + return len; +} + +/* set lpc register value */ +static ssize_t lpc_reg_write(u16 reg, u8 mask, const char *buf, size_t count, u8 data_type) +{ + u8 reg_val, reg_val_now, shift; + + if (kstrtou8(buf, 0, ®_val) < 0) { + if(data_type == DATA_S_DEC) { + if (kstrtos8(buf, 0, ®_val) < 0) { + return -EINVAL; + } + } else { + return -EINVAL; + } + } + + //apply continuous bits operation if mask is specified, discontinuous bits are not supported + if (mask != MASK_ALL) { + reg_val_now = _lpc_reg_read(reg, MASK_ALL); + //clear bits in reg_val_now by the mask + reg_val_now &= ~mask; + //get bit shift by the mask + shift = _shift(mask); + //calculate new reg_val + reg_val = _bit_operation(reg_val_now, shift, reg_val); + } + + mutex_lock(&lpc_data->access_lock); + + _outb(reg_val, reg); + + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x, mask=0x%02x", reg, reg_val, mask); + + return count; +} + +/* get bsp value */ +static ssize_t bsp_read(char *buf, char *str) +{ + ssize_t len=0; + + mutex_lock(&lpc_data->access_lock); + len=sprintf(buf, "%s", str); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_R("reg_val=%s", str); + + return len; +} + +/* set bsp value */ +static ssize_t bsp_write(const char *buf, char *str, size_t str_len, size_t count) +{ + mutex_lock(&lpc_data->access_lock); + snprintf(str, str_len, "%s", buf); + mutex_unlock(&lpc_data->access_lock); + + BSP_LOG_W("reg_val=%s", str); + + return count; +} + +/* get gpio max value */ +static ssize_t gpio_max_show(struct device *dev, + struct device_attribute *da, + char *buf) +{ + u8 data_type=DATA_UNK; + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + if (attr->index == ATT_BSP_GPIO_MAX) { + data_type = attr_reg[attr->index].data_type; + return _parse_data(buf, ARCH_NR_GPIOS-1, data_type); + } + return -1; +} + +/* get mb cpld version in human readable format */ +static ssize_t mb_cpld_version_h_show(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + + unsigned int attr_major = 0; + unsigned int attr_minor = 0; + unsigned int attr_build = 0; + + switch (attr->index) { + case ATT_CPLD_VERSION_H: + attr_major = ATT_CPLD_VERSION_MAJOR; + attr_minor = ATT_CPLD_VERSION_MINOR; + attr_build = ATT_CPLD_BUILD; + break; + default: + return -1; + } + + return sprintf(buf, "%d.%02d.%03d", _lpc_reg_read(attr_reg[attr_major].reg, attr_reg[attr_major].mask), + _lpc_reg_read(attr_reg[attr_minor].reg, attr_reg[attr_minor].mask), + _lpc_reg_read(attr_reg[attr_build].reg, attr_reg[attr_build].mask)); + +} + +/* get lpc register value */ +static ssize_t lpc_callback_show(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_NONE; + u8 data_type=DATA_UNK; + + switch (attr->index) { + // MB CPLD + case ATT_BRD_ID_0: + case ATT_BRD_SKU_ID: + case ATT_BRD_ID_1: + case ATT_BRD_HW_ID: + case ATT_BRD_DEPH_ID: + case ATT_BRD_BUILD_ID: + case ATT_BRD_BIT_SEL: + case ATT_BRD_CPLD_ID_TYPE: + case ATT_CPLD_VERSION_MAJOR: + case ATT_CPLD_VERSION_MINOR: + case ATT_CPLD_ID: + case ATT_CPLD_BUILD: + case ATT_CPLD_VERSION_H: + case ATT_CPLD_CHIP: + case ATT_BRD_EXT_ID: + case ATT_MUX_RESET_ALL: + case ATT_MUX_CTRL: + case ATT_UART_CTRL: + case ATT_USB_CTRL: + + // EC + case ATT_BIOS_BOOT_SEL: + case ATT_CPU_REV_HW_REV: + case ATT_CPU_REV_DEV_PHASE: + case ATT_CPU_REV_BUILD_ID: + + //BSP + case ATT_BSP_GPIO_MAX: + reg = attr_reg[attr->index].reg; + mask= attr_reg[attr->index].mask; + data_type = attr_reg[attr->index].data_type; + break; + case ATT_BSP_REG_VALUE: + if (kstrtou16(bsp_reg, 0, ®) < 0) + return -EINVAL; + + mask = MASK_ALL; + break; + default: + return -EINVAL; + } + return lpc_reg_read(reg, mask, buf, data_type); +} + +/* set lpc register value */ +static ssize_t lpc_callback_store(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_NONE; + u8 data_type=DATA_UNK; + + switch (attr->index) { + //MB CPLD + case ATT_MUX_CTRL: + case ATT_UART_CTRL: + case ATT_USB_CTRL: + + //BMC mailbox + case ATT_TEMP_MAC_HWM: + reg = attr_reg[attr->index].reg; + mask= attr_reg[attr->index].mask; + data_type = attr_reg[attr->index].data_type; + break; + default: + return -EINVAL; + } + + if(attr->index == ATT_TEMP_MAC_HWM) { + bmc_mailbox_init(); + } + + return lpc_reg_write(reg, mask, buf, count, data_type); + +} + +/* get bsp parameter value */ +static ssize_t bsp_callback_show(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + char *str=NULL; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + break; + case ATT_BSP_DEBUG: + str = bsp_debug; + break; + case ATT_BSP_REG: + str = bsp_reg; + break; + default: + return -EINVAL; + } + return bsp_read(buf, str); +} + +/* set bsp parameter value */ +static ssize_t bsp_callback_store(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len=0; + char *str=NULL; + u16 reg = 0; + u8 bsp_debug_u8 = 0; + + switch (attr->index) { + case ATT_BSP_VERSION: + str = bsp_version; + str_len = sizeof(bsp_version); + break; + case ATT_BSP_DEBUG: + if (kstrtou8(buf, 0, &bsp_debug_u8) < 0) { + return -EINVAL; + } else if (_bsp_log_config(bsp_debug_u8) < 0) { + return -EINVAL; + } + + str = bsp_debug; + str_len = sizeof(bsp_debug); + break; + case ATT_BSP_REG: + if (kstrtou16(buf, 0, ®) < 0) + return -EINVAL; + + str = bsp_reg; + str_len = sizeof(bsp_reg); + break; + default: + return -EINVAL; + } + + return bsp_write(buf, str, str_len, count); +} + +static ssize_t bsp_pr_callback_store(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + int str_len = strlen(buf); + + if(str_len <= 0) + return str_len; + + switch (attr->index) { + case ATT_BSP_PR_INFO: + BSP_PR(KERN_INFO, "%s", buf); + break; + case ATT_BSP_PR_ERR: + BSP_PR(KERN_ERR, "%s", buf); + break; + default: + return -EINVAL; + } + + return str_len; +} + +/* set mux_reset register value */ +static ssize_t mux_reset_all_store(struct device *dev, + struct device_attribute *da, const char *buf, size_t count) +{ + struct sensor_device_attribute *attr = to_sensor_dev_attr(da); + u16 reg = 0; + u8 mask = MASK_NONE; + u8 val = 0; + u8 mux_reset_reg_val = 0; + static int mux_reset_flag = 0; + + switch (attr->index) { + case ATT_MUX_RESET_ALL: + reg = attr_reg[attr->index].reg; + mask= attr_reg[attr->index].mask; + break; + default: + return -EINVAL; + } + + if (kstrtou8(buf, 0, &val) < 0) + return -EINVAL; + + if (mux_reset_flag == 0) { + if (val == 0) { + mutex_lock(&lpc_data->access_lock); + mux_reset_flag = 1; + BSP_LOG_W("i2c mux reset is triggered..."); + + //reset mux on ports + mux_reset_reg_val = inb(reg); + outb((mux_reset_reg_val & (u8)(~mask)), reg); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, mux_reset_reg_val & (u8)(~mask)); + + mdelay(MDELAY_RESET_INTERVAL); + + //unset mux on ports + outb((mux_reset_reg_val | mask), reg); + BSP_LOG_W("reg=0x%03x, reg_val=0x%02x", reg, mux_reset_reg_val | mask); + mdelay(MDELAY_RESET_FINISH); + mux_reset_flag = 0; + mutex_unlock(&lpc_data->access_lock); + } else { + return -EINVAL; + } + } else { + BSP_LOG_W("i2c mux is resetting... (ignore)"); + mutex_lock(&lpc_data->access_lock); + mutex_unlock(&lpc_data->access_lock); + } + return count; +} + +//SENSOR_DEVICE_ATTR - MB +static SENSOR_DEVICE_ATTR_RO(board_id_0 , lpc_callback , ATT_BRD_ID_0); +static SENSOR_DEVICE_ATTR_RO(board_sku_id , lpc_callback , ATT_BRD_SKU_ID); +static SENSOR_DEVICE_ATTR_RO(board_id_1 , lpc_callback , ATT_BRD_ID_1); +static SENSOR_DEVICE_ATTR_RO(board_hw_id , lpc_callback , ATT_BRD_HW_ID); +static SENSOR_DEVICE_ATTR_RO(board_deph_id , lpc_callback , ATT_BRD_DEPH_ID); +static SENSOR_DEVICE_ATTR_RO(board_build_id , lpc_callback , ATT_BRD_BUILD_ID); +static SENSOR_DEVICE_ATTR_RO(board_bit_sel , lpc_callback , ATT_BRD_BIT_SEL); +static SENSOR_DEVICE_ATTR_RO(board_cpld_id_type , lpc_callback , ATT_BRD_CPLD_ID_TYPE); +static SENSOR_DEVICE_ATTR_RO(cpld_version_major , lpc_callback , ATT_CPLD_VERSION_MAJOR); +static SENSOR_DEVICE_ATTR_RO(cpld_version_minor , lpc_callback , ATT_CPLD_VERSION_MINOR); +static SENSOR_DEVICE_ATTR_RO(cpld_id , lpc_callback , ATT_CPLD_ID); +static SENSOR_DEVICE_ATTR_RO(cpld_build , lpc_callback , ATT_CPLD_BUILD); +static SENSOR_DEVICE_ATTR_RO(cpld_version_h , mb_cpld_version_h, ATT_CPLD_VERSION_H); +static SENSOR_DEVICE_ATTR_RO(cpld_chip , lpc_callback , ATT_CPLD_CHIP); +static SENSOR_DEVICE_ATTR_RO(board_ext_id , lpc_callback , ATT_BRD_EXT_ID); +static SENSOR_DEVICE_ATTR_WO(mux_reset_all , mux_reset_all , ATT_MUX_RESET_ALL); +static SENSOR_DEVICE_ATTR_RW(mux_ctrl , lpc_callback , ATT_MUX_CTRL); +static SENSOR_DEVICE_ATTR_RW(uart_ctrl , lpc_callback , ATT_UART_CTRL); +static SENSOR_DEVICE_ATTR_RW(usb_ctrl , lpc_callback , ATT_USB_CTRL); + +//SENSOR_DEVICE_ATTR - EC +static SENSOR_DEVICE_ATTR_RO(bios_boot_sel , lpc_callback , ATT_BIOS_BOOT_SEL); +static SENSOR_DEVICE_ATTR_RO(cpu_rev_hw_rev , lpc_callback , ATT_CPU_REV_HW_REV); +static SENSOR_DEVICE_ATTR_RO(cpu_rev_dev_phase , lpc_callback , ATT_CPU_REV_DEV_PHASE); +static SENSOR_DEVICE_ATTR_RO(cpu_rev_build_id , lpc_callback , ATT_CPU_REV_BUILD_ID); + +//SENSOR_DEVICE_ATTR - BMC mailbox +static SENSOR_DEVICE_ATTR_WO(temp_mac_hwm , lpc_callback , ATT_TEMP_MAC_HWM); + +//SENSOR_DEVICE_ATTR - BSP +static SENSOR_DEVICE_ATTR_RW(bsp_version , bsp_callback , ATT_BSP_VERSION); +static SENSOR_DEVICE_ATTR_RW(bsp_debug , bsp_callback , ATT_BSP_DEBUG); +static SENSOR_DEVICE_ATTR_WO(bsp_pr_info , bsp_pr_callback , ATT_BSP_PR_INFO); +static SENSOR_DEVICE_ATTR_WO(bsp_pr_err , bsp_pr_callback , ATT_BSP_PR_ERR); +static SENSOR_DEVICE_ATTR_RW(bsp_reg , bsp_callback , ATT_BSP_REG); +static SENSOR_DEVICE_ATTR_RO(bsp_reg_value , lpc_callback , ATT_BSP_REG_VALUE); +static SENSOR_DEVICE_ATTR_RO(bsp_gpio_max , gpio_max , ATT_BSP_GPIO_MAX); + +static struct attribute *mb_cpld_attrs[] = { + _DEVICE_ATTR(board_id_0), + _DEVICE_ATTR(board_sku_id), + _DEVICE_ATTR(board_id_1), + _DEVICE_ATTR(board_hw_id), + _DEVICE_ATTR(board_deph_id), + _DEVICE_ATTR(board_build_id), + _DEVICE_ATTR(board_bit_sel), + _DEVICE_ATTR(board_cpld_id_type), + _DEVICE_ATTR(cpld_version_major), + _DEVICE_ATTR(cpld_version_minor), + _DEVICE_ATTR(cpld_id), + _DEVICE_ATTR(cpld_build), + _DEVICE_ATTR(cpld_version_h), + _DEVICE_ATTR(cpld_chip), + _DEVICE_ATTR(board_ext_id), + _DEVICE_ATTR(mux_reset_all), + _DEVICE_ATTR(mux_ctrl), + _DEVICE_ATTR(uart_ctrl), + _DEVICE_ATTR(usb_ctrl), + NULL, +}; + +static struct attribute *ec_attrs[] = { + _DEVICE_ATTR(bios_boot_sel), + _DEVICE_ATTR(cpu_rev_hw_rev), + _DEVICE_ATTR(cpu_rev_dev_phase), + _DEVICE_ATTR(cpu_rev_build_id), + NULL, +}; + + +static struct attribute *bmc_mailbox_attrs[] = { + _DEVICE_ATTR(temp_mac_hwm), + NULL, +}; + +static struct attribute *bsp_attrs[] = { + _DEVICE_ATTR(bsp_version), + _DEVICE_ATTR(bsp_debug), + _DEVICE_ATTR(bsp_pr_info), + _DEVICE_ATTR(bsp_pr_err), + _DEVICE_ATTR(bsp_reg), + _DEVICE_ATTR(bsp_reg_value), + _DEVICE_ATTR(bsp_gpio_max), + NULL, +}; + +static struct attribute_group mb_cpld_attr_grp = { + .name = "mb_cpld", + .attrs = mb_cpld_attrs, +}; + +static struct attribute_group bsp_attr_grp = { + .name = "bsp", + .attrs = bsp_attrs, +}; + +static struct attribute_group ec_attr_grp = { + .name = "ec", + .attrs = ec_attrs, +}; + +static struct attribute_group bmc_mailbox_attr_grp = { + .name = "bmc_mailbox", + .attrs = bmc_mailbox_attrs, +}; + +static void lpc_dev_release( struct device * dev) +{ + return; +} + +static struct platform_device lpc_dev = { + .name = DRIVER_NAME, + .id = -1, + .dev = { + .release = lpc_dev_release, + } +}; + +static int lpc_drv_probe(struct platform_device *pdev) +{ + int i = 0, grp_num = 4; + int err[4] = {0}; + struct attribute_group *grp; + + lpc_data = devm_kzalloc(&pdev->dev, sizeof(struct lpc_data_s), + GFP_KERNEL); + if (!lpc_data) + return -ENOMEM; + + mutex_init(&lpc_data->access_lock); + + for (i=0; idev.kobj, grp); + if (err[i]) { + printk(KERN_ERR "Cannot create sysfs for group %s\n", grp->name); + goto exit; + } else { + continue; + } + } + + return 0; + +exit: + for (i=0; idev.kobj, grp); + if (!err[i]) { + //remove previous successful cases + continue; + } else { + //remove first failed case, then return + return err[i]; + } + } + return 0; +} + +static int lpc_drv_remove(struct platform_device *pdev) +{ + sysfs_remove_group(&pdev->dev.kobj, &mb_cpld_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bsp_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &ec_attr_grp); + sysfs_remove_group(&pdev->dev.kobj, &bmc_mailbox_attr_grp); + return 0; +} + +static struct platform_driver lpc_drv = { + .probe = lpc_drv_probe, + .remove = __exit_p(lpc_drv_remove), + .driver = { + .name = DRIVER_NAME, + }, +}; + +int lpc_init(void) +{ + int err = 0; + + err = platform_driver_register(&lpc_drv); + if (err) { + printk(KERN_ERR "%s(#%d): platform_driver_register failed(%d)\n", + __func__, __LINE__, err); + + return err; + } + + err = platform_device_register(&lpc_dev); + if (err) { + printk(KERN_ERR "%s(#%d): platform_device_register failed(%d)\n", + __func__, __LINE__, err); + platform_driver_unregister(&lpc_drv); + return err; + } + + return err; +} + +void lpc_exit(void) +{ + platform_driver_unregister(&lpc_drv); + platform_device_unregister(&lpc_dev); +} + +MODULE_AUTHOR("Nonodark Huang "); +MODULE_DESCRIPTION("x86_64_ufispace_s9110_32x_lpc driver"); +MODULE_LICENSE("GPL"); + +module_init(lpc_init); +module_exit(lpc_exit); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-sys-eeprom.c b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-sys-eeprom.c new file mode 100644 index 000000000000..976ba05052e7 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/modules/x86-64-ufispace-s9110-32x-sys-eeprom.c @@ -0,0 +1,272 @@ +/* + * Copyright (C) 1998, 1999 Frodo Looijaard and + * Philip Edelbrock + * Copyright (C) 2003 Greg Kroah-Hartman + * Copyright (C) 2003 IBM Corp. + * Copyright (C) 2004 Jean Delvare + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* enable dev_dbg print out */ +//#define DEBUG + +#define __STDC_WANT_LIB_EXT1__ 1 +#include +#include +#include +#include +#include +#include +#include + +/* Addresses to scan */ +static const unsigned short normal_i2c[] = { /*0x50, 0x51, 0x52, 0x53, 0x54, + 0x55, 0x56, 0x57,*/ I2C_CLIENT_END }; + +/* Size of EEPROM in bytes */ +#define EEPROM_SIZE 512 + +#define SLICE_BITS (6) +#define SLICE_SIZE (1 << SLICE_BITS) +#define SLICE_NUM (EEPROM_SIZE/SLICE_SIZE) + +/* Each client has this additional data */ +struct eeprom_data { + struct mutex update_lock; + u8 valid; /* bitfield, bit!=0 if slice is valid */ + unsigned long last_updated[SLICE_NUM]; /* In jiffies, 8 slices */ + u8 data[EEPROM_SIZE]; /* Register values */ +}; + + +static void sys_eeprom_update_client(struct i2c_client *client, u8 slice) +{ + struct eeprom_data *data = i2c_get_clientdata(client); + int i, j; + int ret; + int addr; + + mutex_lock(&data->update_lock); + + if (!(data->valid & (1 << slice)) || + time_after(jiffies, data->last_updated[slice] + 300 * HZ)) { + dev_dbg(&client->dev, "Starting eeprom update, slice %u\n", slice); + + addr = slice << SLICE_BITS; + + ret = i2c_smbus_write_byte_data(client, (u8)((addr >> 8) & 0xFF), (u8)(addr & 0xFF)); + /* select the eeprom address */ + if (ret < 0) { + dev_err(&client->dev, "address set failed\n"); + goto exit; + } + + if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_READ_BYTE)) { + goto exit; + } + + for (i = slice << SLICE_BITS; i < (slice + 1) << SLICE_BITS; i+= SLICE_SIZE) { + for (j = i; j < (i+SLICE_SIZE); j++) { + int res; + + res = i2c_smbus_read_byte(client); + if (res < 0) { + goto exit; + } + + data->data[j] = res & 0xFF; + } + } + + data->last_updated[slice] = jiffies; + data->valid |= (1 << slice); + } +exit: + mutex_unlock(&data->update_lock); +} + +static ssize_t sys_eeprom_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + u8 slice; + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + /* Only refresh slices which contain requested bytes */ + for (slice = off >> SLICE_BITS; slice <= (off + count - 1) >> SLICE_BITS; slice++) { + sys_eeprom_update_client(client, slice); + } + + memcpy(buf, &data->data[off], count); + + return count; +} + +static ssize_t sys_eeprom_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, + char *buf, loff_t off, size_t count) +{ + struct i2c_client *client = to_i2c_client(container_of(kobj, struct device, kobj)); + struct eeprom_data *data = i2c_get_clientdata(client); + int ret; + int i; + u8 cmd; + u16 value16; + + dev_dbg(&client->dev, "sys_eeprom_write off=%d, count=%d\n", (int)off, (int)count); + + if (off > EEPROM_SIZE) { + return 0; + } + if (off + count > EEPROM_SIZE) { + count = EEPROM_SIZE - off; + } + if (count == 0) { + return 0; + } + + mutex_lock(&data->update_lock); + + for(i=0; i < count; i++) { + /* write command */ + cmd = (off >> 8) & 0xff; + value16 = off & 0xff; + value16 |= buf[i] << 8; + ret = i2c_smbus_write_word_data(client, cmd, value16); + + if (ret < 0) { + dev_err(&client->dev, "write address failed at %d \n", (int)off); + goto exit; + } + + off++; + + /* need to wait for write complete */ + udelay(10000); + } +exit: + mutex_unlock(&data->update_lock); + /* force to update client when reading */ + for(i=0; i < SLICE_NUM; i++) { + data->last_updated[i] = 0; + } + + return count; +} + +static struct bin_attribute sys_eeprom_attr = { + .attr = { + .name = "eeprom", + .mode = S_IRUGO | S_IWUSR, + }, + .size = EEPROM_SIZE, + .read = sys_eeprom_read, + .write = sys_eeprom_write, +}; + +/* Return 0 if detection is successful, -ENODEV otherwise */ +static int sys_eeprom_detect(struct i2c_client *client, struct i2c_board_info *info) +{ + struct i2c_adapter *adapter = client->adapter; + + /* EDID EEPROMs are often 24C00 EEPROMs, which answer to all + addresses 0x50-0x57, but we only care about 0x51 and 0x55. So decline + attaching to addresses >= 0x56 on DDC buses */ + if (!(adapter->class & I2C_CLASS_SPD) && client->addr >= 0x56) { + return -ENODEV; + } + + if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE) + && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { + return -ENODEV; + } + + strlcpy(info->type, "eeprom", I2C_NAME_SIZE); + + return 0; +} + +static int sys_eeprom_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct eeprom_data *data; + int err; + + if (!(data = kzalloc(sizeof(struct eeprom_data), GFP_KERNEL))) { + err = -ENOMEM; + goto exit; + } + +#ifdef __STDC_LIB_EXT1__ + memset_s(data->data, EEPROM_SIZE, 0xff, EEPROM_SIZE); +#else + memset(data->data, 0xff, EEPROM_SIZE); +#endif + i2c_set_clientdata(client, data); + mutex_init(&data->update_lock); + + /* create the sysfs eeprom file */ + err = sysfs_create_bin_file(&client->dev.kobj, &sys_eeprom_attr); + if (err) { + goto exit_kfree; + } + + return 0; + +exit_kfree: + kfree(data); +exit: + return err; +} + +static int sys_eeprom_remove(struct i2c_client *client) +{ + sysfs_remove_bin_file(&client->dev.kobj, &sys_eeprom_attr); + kfree(i2c_get_clientdata(client)); + + return 0; +} + +static const struct i2c_device_id sys_eeprom_id[] = { + { "sys_eeprom", 0 }, + { } +}; + +static struct i2c_driver sys_eeprom_driver = { + .driver = { + .name = "sys_eeprom", + }, + .probe = sys_eeprom_probe, + .remove = sys_eeprom_remove, + .id_table = sys_eeprom_id, + + .class = I2C_CLASS_DDC | I2C_CLASS_SPD, + .detect = sys_eeprom_detect, + .address_list = normal_i2c, +}; + +module_i2c_driver(sys_eeprom_driver); + +MODULE_AUTHOR("Nonodark Huang "); +MODULE_DESCRIPTION("UfiSpace System EEPROM driver"); +MODULE_LICENSE("GPL"); diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/service/pddf-platform-init.service b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/service/pddf-platform-init.service new file mode 120000 index 000000000000..0fd9f25b6c5e --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/service/pddf-platform-init.service @@ -0,0 +1 @@ +../../../../pddf/i2c/service/pddf-platform-init.service \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/__init__.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/__init__.py new file mode 100644 index 000000000000..593867d31c9d --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/__init__.py @@ -0,0 +1,4 @@ +# All the derived classes for PDDF +__all__ = ["platform", "chassis", "sfp", "psu", "thermal", "fan"] +from . import platform + diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/chassis.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/chassis.py new file mode 100644 index 000000000000..530332cf1506 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/chassis.py @@ -0,0 +1,191 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Chassis API +# +############################################################################# + +try: + import time + from sonic_platform_pddf_base.pddf_chassis import PddfChassis + # from sonic_py_common import device_info +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +NUM_COMPONENT = 4 + +class Chassis(PddfChassis): + """ + PDDF Platform-specific Chassis class + """ + + port_dict = {} + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfChassis.__init__(self, pddf_data, pddf_plugin_data) + self._initialize_components() + + def _initialize_components(self): + from sonic_platform.component import Component + for index in range(NUM_COMPONENT): + component = Component(index) + self._component_list.append(component) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_name(self): + """ + Retrieves the name of the chassis + Returns: + string: The name of the chassis + """ + # return device_info.get_hwsku() + return self._eeprom.platform_name_str() + + def initizalize_system_led(self): + return True + + def get_status_led(self): + return self.get_system_led("SYS_LED") + + def get_change_event(self, timeout=0): + """ + Returns a nested dictionary containing all devices which have + experienced a change at chassis level + Args: + timeout: Timeout in milliseconds (optional). If timeout == 0, + this method will block until a change is detected. + Returns: + (bool, dict): + - bool: True if call successful, False if not; + - dict: A nested dictionary where key is a device type, + value is a dictionary with key:value pairs in the format of + {'device_id':'device_event'}, where device_id is the device ID + for this device and device_event. + The known devices's device_id and device_event was defined as table below. + ----------------------------------------------------------------- + device | device_id | device_event | annotate + ----------------------------------------------------------------- + 'fan' '' '0' Fan removed + '1' Fan inserted + 'sfp' '' '0' Sfp removed + '1' Sfp inserted + '2' I2C bus stuck + '3' Bad eeprom + '4' Unsupported cable + '5' High Temperature + '6' Bad cable + 'voltage' '' '0' Vout normal + '1' Vout abnormal + -------------------------------------------------------------------- + Ex. {'fan':{'0':'0', '2':'1'}, 'sfp':{'11':'0', '12':'1'}, + 'voltage':{'U20':'0', 'U21':'1'}} + Indicates that: + fan 0 has been removed, fan 2 has been inserted. + sfp 11 has been removed, sfp 12 has been inserted. + monitored voltage U20 became normal, voltage U21 became abnormal. + Note: For sfp, when event 3-6 happened, the module will not be avalaible, + XCVRD shall stop to read eeprom before SFP recovered from error status. + """ + + change_event_dict = {"fan": {}, "sfp": {}, "voltage": {}} + + start_time = time.time() + forever = False + + if timeout == 0: + forever = True + elif timeout > 0: + timeout = timeout / float(1000) # Convert to secs + else: + print("get_change_event:Invalid timeout value", timeout) + return False, change_event_dict + + end_time = start_time + timeout + if start_time > end_time: + print( + "get_change_event:" "time wrap / invalid timeout value", + timeout, + ) + return False, change_event_dict # Time wrap or possibly incorrect timeout + try: + while timeout >= 0: + # check for sfp + sfp_change_dict = self.get_transceiver_change_event() + # check for fan + # fan_change_dict = self.get_fan_change_event() + # check for voltage + # voltage_change_dict = self.get_voltage_change_event() + + if sfp_change_dict: + change_event_dict["sfp"] = sfp_change_dict + # change_event_dict["fan"] = fan_change_dict + # change_event_dict["voltage"] = voltage_change_dict + return True, change_event_dict + if forever: + time.sleep(1) + else: + timeout = end_time - time.time() + if timeout >= 1: + time.sleep(1) # We poll at 1 second granularity + else: + if timeout > 0: + time.sleep(timeout) + return True, change_event_dict + except Exception as e: + print(e) + print("get_change_event: Should not reach here.") + return False, change_event_dict + + def get_transceiver_change_event(self): + current_port_dict = {} + ret_dict = {} + + # Check for OIR events and return ret_dict + for index in range(0, self.platform_inventory['num_ports']): + if self._sfp_list[index].get_presence(): + current_port_dict[index] = self.plugin_data["XCVR"]["status"]["inserted"] + else: + current_port_dict[index] = self.plugin_data["XCVR"]["status"]["removed"] + + if len(self.port_dict) == 0: # first time + self.port_dict = current_port_dict + return {} + + if current_port_dict == self.port_dict: + return {} + + # Update reg value + for index, status in current_port_dict.items(): + if self.port_dict[index] != status: + ret_dict[index] = status + #ret_dict[str(index)] = status + self.port_dict = current_port_dict + for index, status in ret_dict.items(): + if int(status) == 1: + pass + #self._sfp_list[int(index)].check_sfp_optoe_type() + return ret_dict + + def get_reboot_cause(self): + """ + Retrieves the cause of the previous reboot + + Returns: + A tuple (string, string) where the first element is a string + containing the cause of the previous reboot. This string must be + one of the predefined strings in this class. If the first string + is "REBOOT_CAUSE_HARDWARE_OTHER", the second string can be used + to pass a description of the reboot cause. + """ + + reboot_cause_path = self.plugin_data['REBOOT_CAUSE']['reboot_cause_file'] + + try: + with open(reboot_cause_path, 'r', errors='replace') as fd: + data = fd.read() + sw_reboot_cause = data.strip() + except IOError: + sw_reboot_cause = "Unknown" + + return ('REBOOT_CAUSE_NON_HARDWARE', sw_reboot_cause) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/component.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/component.py new file mode 100644 index 000000000000..1c583079f8c2 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/component.py @@ -0,0 +1,125 @@ +############################################################################# +# +# Component contains an implementation of SONiC Platform Base API and +# provides the components firmware management function +# +############################################################################# + +try: + import subprocess + from sonic_platform_base.component_base import ComponentBase + from sonic_platform_pddf_base import pddfapi +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + +CPLD_SYSFS = { + "CPLD1": {"major": "cpld1_major_ver", "minor": "cpld1_minor_ver", "build": "cpld1_build"}, + "CPLD2": {"major": "cpld2_major_ver", "minor": "cpld2_minor_ver", "build": "cpld2_build"}, +} + +BMC_CMDS = { + "VER1": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f1", + "VER2": "ipmitool mc info | grep 'Firmware Revision' | cut -d':' -f2 | cut -d'.' -f2", + "VER3": "echo $((`ipmitool mc info | grep 'Aux Firmware Rev Info' -A 2 | sed -n '2p'` + 0))", +} + +BIOS_VERSION_PATH = "/sys/class/dmi/id/bios_version" +COMPONENT_LIST= [ + ("CPLD1", "CPLD 1"), + ("CPLD2", "CPLD 2"), + ("BIOS", "Basic Input/Output System"), + ("BMC", "BMC"), +] + +class Component(ComponentBase): + """Platform-specific Component class""" + + DEVICE_TYPE = "component" + + def __init__(self, component_index=0): + self.pddf_obj = pddfapi.PddfApi() + self.index = component_index + self.name = self.get_name() + + def _get_bios_version(self): + # Retrieves the BIOS firmware version + try: + with open(BIOS_VERSION_PATH, 'r') as fd: + bios_version = fd.read() + return bios_version.strip() + except Exception as e: + return None + + def _get_cpld_version(self): + # Retrieves the CPLD firmware version + cpld_version = dict() + for cpld_name, elem in CPLD_SYSFS.items(): + device = "SYSSTATUS" + major = self.pddf_obj.get_attr_name_output(device, elem["major"]) + minor = self.pddf_obj.get_attr_name_output(device, elem["minor"]) + build = self.pddf_obj.get_attr_name_output(device, elem["build"]) + if major and minor and build: + major = int(major['status'].rstrip(),0) + minor = int(minor['status'].rstrip(),0) + build = int(build['status'].rstrip(),0) + cpld_version[cpld_name] = "{}.{:02d}.{:03d}".format(major, minor, build) + else: + cpld_version[cpld_name] = "N/A" + return cpld_version + + def _get_bmc_version(self): + # Retrieves the BMC firmware version + bmc_ver = dict() + for ver in BMC_CMDS: + status, value = subprocess.getstatusoutput(BMC_CMDS[ver]) + if not status: + bmc_ver[ver] = int(value.rstrip()) + else: + return None + + bmc_version = "{}.{}.{}".format(bmc_ver["VER1"], bmc_ver["VER2"], bmc_ver["VER3"]) + + return bmc_version + + def get_name(self): + """ + Retrieves the name of the component + Returns: + A string containing the name of the component + """ + return COMPONENT_LIST[self.index][0] + + def get_description(self): + """ + Retrieves the description of the component + Returns: + A string containing the description of the component + """ + return COMPONENT_LIST[self.index][1] + + def get_firmware_version(self): + """ + Retrieves the firmware version of module + Returns: + string: The firmware versions of the module + """ + fw_version = None + + if self.name == "BIOS": + fw_version = self._get_bios_version() + elif "CPLD" in self.name: + cpld_version = self._get_cpld_version() + fw_version = cpld_version.get(self.name) + elif self.name == "BMC": + fw_version = self._get_bmc_version() + return fw_version + + def install_firmware(self, image_path): + """ + Install firmware to module + Args: + image_path: A string, path to firmware image + Returns: + A boolean, True if install successfully, False if not + """ + raise NotImplementedError diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/eeprom.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/eeprom.py new file mode 100644 index 000000000000..90ab1c779a48 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/eeprom.py @@ -0,0 +1,21 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_eeprom import PddfEeprom +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Eeprom(PddfEeprom): + + def __init__(self, pddf_data=None, pddf_plugin_data=None): + PddfEeprom.__init__(self, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + + def platform_name_str(self): + (is_valid, results) = self.get_tlv_field(self.eeprom_data, self._TLV_CODE_PLATFORM_NAME) + if not is_valid: + return "N/A" + + return results[2].decode('ascii') \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan.py new file mode 100644 index 000000000000..c38ebdedea5b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan.py @@ -0,0 +1,147 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan import PddfFan +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Fan(PddfFan): + """PDDF Platform-Specific Fan class""" + + def __init__(self, tray_idx, fan_idx=0, pddf_data=None, pddf_plugin_data=None, is_psu_fan=False, psu_index=0): + # idx is 0-based + PddfFan.__init__(self, tray_idx, fan_idx, pddf_data, pddf_plugin_data, is_psu_fan, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten + # Since psu_fan airflow direction cant be read from sysfs, it is fixed as 'F2B' or 'intake' + + def get_mfr_id(self): + """ + Retrieves the manufacturer id of the device + + Returns: + string: Manufacturer Id of device + """ + if self.is_psu_fan: + device = "PSU{}".format(self.fans_psu_index) + output = self.pddf_obj.get_attr_name_output(device, "psu_mfr_id") + else: + raise NotImplementedError + + if not output: + return None + + mfr = output['status'] + + # strip_non_ascii + stripped = (c for c in mfr if 0 < ord(c) < 127) + mfr = ''.join(stripped) + + return mfr.rstrip('\n') + + def get_model(self): + """ + Retrieves the model number (or part number) of the device + + Returns: + string: Model/part number of device + """ + if self.is_psu_fan: + device = "PSU{}".format(self.fans_psu_index) + output = self.pddf_obj.get_attr_name_output(device, "psu_model_name") + else: + raise NotImplementedError + + if not output: + return None + + model = output['status'] + + # strip_non_ascii + stripped = (c for c in model if 0 < ord(c) < 127) + model = ''.join(stripped) + + return model.rstrip('\n') + + def get_max_speed(self): + """ + Retrieves the model name + + Returns: + An string, the model name + """ + if self.is_psu_fan: + mfr = self.get_mfr_id() + model = self.get_model() + + max_speed = int(self.plugin_data['PSU']['valmap']['PSU_AC_FAN_MAX_SPEED']) + if mfr and model : + for dev in self.plugin_data['PSU']['psu_support_list']: + if dev['Manufacturer'] == mfr and dev['Name'] == model: + max_speed = int(self.plugin_data['PSU']['valmap'][dev['MaxSpd']]) + break + else: + if self.fan_index == 1: + max_speed = int(self.plugin_data['FAN']['FAN_F_MAX_SPEED']) + else: + max_speed = int(self.plugin_data['FAN']['FAN_R_MAX_SPEED']) + + return max_speed + + def get_presence(self): + """ + Retrieves the presence of the device + Returns: + bool: True if device is present, False if not + """ + if self.is_psu_fan: + attr_name = "psu_present" + device = "PSU{}".format(self.fans_psu_index) + else: + idx = (self.fantray_index-1)*self.platform['num_fans_pertray'] + self.fan_index + attr_name = "fan" + str(idx) + "_present" + device = "FAN-CTRL" + + output = self.pddf_obj.get_attr_name_output(device, attr_name) + if not output: + return False + + + mode = output['mode'] + presence = output['status'].rstrip() + vmap = self.plugin_data['FAN']['present'][mode]['valmap'] + + if presence in vmap: + status = vmap[presence] + else: + status = False + + return status + + def get_speed(self): + """ + Retrieves the speed of fan as a percentage of full speed + + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + speed_percentage = 0 + + max_speed = self.get_max_speed() + rpm_speed = self.get_speed_rpm() + + speed_percentage = round((rpm_speed*100)/max_speed) + + return min(speed_percentage, 100) + + def get_target_speed(self): + """ + Retrieves the target (expected) speed of the fan + Returns: + An integer, the percentage of full fan speed, in the range 0 (off) + to 100 (full speed) + """ + return self.get_speed() \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan_drawer.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan_drawer.py new file mode 100644 index 000000000000..3b9bb607f632 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/fan_drawer.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_fan_drawer import PddfFanDrawer +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class FanDrawer(PddfFanDrawer): + """PDDF Platform-Specific Fan-Drawer class""" + + def __init__(self, tray_idx, pddf_data=None, pddf_plugin_data=None): + # idx is 0-based + PddfFanDrawer.__init__(self, tray_idx, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/platform.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/platform.py new file mode 100644 index 000000000000..406b1179ae1b --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/platform.py @@ -0,0 +1,25 @@ +#!/usr/bin/env python + +############################################################################# +# PDDF +# Module contains an implementation of SONiC Platform Base API and +# provides the platform information +# +############################################################################# + + +try: + from sonic_platform_pddf_base.pddf_platform import PddfPlatform +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + +class Platform(PddfPlatform): + """ + PDDF Platform-Specific Platform Class + """ + + def __init__(self): + PddfPlatform.__init__(self) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/psu.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/psu.py new file mode 100644 index 000000000000..4f7e843361d4 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/psu.py @@ -0,0 +1,38 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_psu import PddfPsu +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Psu(PddfPsu): + """PDDF Platform-Specific PSU class""" + + PLATFORM_PSU_CAPACITY = 750 + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfPsu.__init__(self, index, pddf_data, pddf_plugin_data) + + # Provide the functions/variables below for which implementation is to be overwritten + def get_power(self): + """ + Retrieves current energy supplied by PSU + + Returns: + A float number, the power in watts, + e.g. 302.6 + """ + + # power is returned in micro watts + return round(float(self.get_voltage()*self.get_current()), 2) + + def get_maximum_supplied_power(self): + """ + Retrieves the maximum supplied power by PSU (or PSU capacity) + Returns: + A float number, the maximum power output in Watts. + e.g. 1200.1 + """ + return float(self.PLATFORM_PSU_CAPACITY) \ No newline at end of file diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/sfp.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/sfp.py new file mode 100644 index 000000000000..c7919482f69c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/sfp.py @@ -0,0 +1,31 @@ +#!/usr/bin/env python + +try: + from sonic_platform_pddf_base.pddf_sfp import PddfSfp +except ImportError as e: + raise ImportError (str(e) + "- required module not found") + + +class Sfp(PddfSfp): + """ + PDDF Platform-Specific Sfp class + """ + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None): + PddfSfp.__init__(self, index, pddf_data, pddf_plugin_data) + self.index = index + + # Provide the functions/variables below for which implementation is to be overwritten + + def get_error_description(self): + """ + Retrives the error descriptions of the SFP module + Returns: + String that represents the current error descriptions of vendor specific errors + In case there are multiple errors, they should be joined by '|', + like: "Bad EEPROM|Unsupported cable" + """ + if not self.get_presence(): + return self.SFP_STATUS_UNPLUGGED + + return self.SFP_STATUS_OK diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/thermal.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/thermal.py new file mode 100644 index 000000000000..77d6ec7ae886 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform/thermal.py @@ -0,0 +1,17 @@ +#!/usr/bin/env python + + +try: + from sonic_platform_pddf_base.pddf_thermal import PddfThermal +except ImportError as e: + raise ImportError(str(e) + "- required module not found") + + + +class Thermal(PddfThermal): + """PDDF Platform-Specific Thermal class""" + + def __init__(self, index, pddf_data=None, pddf_plugin_data=None, is_psu_thermal=False, psu_index=0): + PddfThermal.__init__(self, index, pddf_data, pddf_plugin_data, is_psu_thermal, psu_index) + + # Provide the functions/variables below for which implementation is to be overwritten diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform_setup.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform_setup.py new file mode 100644 index 000000000000..2152c64d420a --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/sonic_platform_setup.py @@ -0,0 +1,27 @@ +from setuptools import setup + +setup( + name='sonic-platform', + version='1.0', + description='SONiC platform API implementation on ufispace platform', + license='Apache 2.0', + author='SONiC Team', + author_email='linuxnetdev@microsoft.com', + url='https://github.com/Azure/sonic-buildimage', + maintainer='Nonodark Huangn', + maintainer_email='nonodark.huang@ufispace.com', + packages=['sonic_platform'], + classifiers=[ + 'Development Status :: 3 - Alpha', + 'Environment :: Plugins', + 'Intended Audience :: Developers', + 'Intended Audience :: Information Technology', + 'Intended Audience :: System Administrators', + 'License :: OSI Approved :: Apache Software License', + 'Natural Language :: English', + 'Operating System :: POSIX :: Linux', + 'Programming Language :: Python :: 3.7', + 'Topic :: Utilities', + ], + keywords='sonic SONiC platform PLATFORM', +) diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_device_create.sh new file mode 100755 index 000000000000..47076d99c4ca --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_device_create.sh @@ -0,0 +1,14 @@ +#!/bin/bash + +#disable bmc watchdog +echo "Disable BMC watchdog" +timeout 3 ipmitool mc watchdog off + +pddf_ledutil setstatusled SYS_LED off +pddf_ledutil setstatusled ID_LED off + +curr_led=$(pddf_ledutil getstatusled SYS_LED) +pddf_ledutil setstatusled SYS_LED green +echo "Set System $curr_led to green" + +echo "PDDF device post-create completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_driver_install.sh new file mode 100755 index 000000000000..ed2559977e42 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_post_driver_install.sh @@ -0,0 +1,2 @@ +#!/bin/bash +echo "PDDF driver post-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_pre_device_create.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_pre_device_create.sh new file mode 100755 index 000000000000..df19dd9338a0 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_pre_device_create.sh @@ -0,0 +1,74 @@ +#!/bin/bash + +# import sonic env +[ -f /etc/sonic/sonic-environment ] && . /etc/sonic/sonic-environment + +TRUE=0 +FALSE=1 + +PROTO=0 +ALPHA=1 +BETA=2 +PVT=3 + +PLATFORM=${PLATFORM:-x86_64-ufispace_s9110_32x-r0} +PLAT_CONF_PATH="/usr/share/sonic/device/$PLATFORM" +PLAT_CONF_FILE="/usr/share/sonic/device/$PLATFORM/platform.json" +PDDF_DEV_PATH="/usr/share/sonic/device/$PLATFORM/pddf" +PDDF_DEV_FILE="/usr/share/sonic/device/$PLATFORM/pddf/pddf-device.json" +IO_PORT_FILE="/dev/port" + +function _check_filepath { + filepath=$1 + if [ -z "${filepath}" ]; then + echo "[ERR] the ipnut string is empty!!!" + return ${FALSE} + elif [ ! -f "$filepath" ] && [ ! -c "$filepath" ]; then + echo "[ERR] No such file: ${filepath}" + return ${FALSE} + else + return ${TRUE} + fi +} + +if _check_filepath "$IO_PORT_FILE" ; then + MASK=2#00000011 + REG="0x$(xxd -s 0x701 -p -l 1 -c 1 /dev/port)" + HW_REV_ID=$(( $REG & $MASK )) +else + HW_REV_ID=$PVT +fi + +if [ "$HW_REV_ID" = "$BETA" ]; then + + src="$PDDF_DEV_PATH/pddf-device-beta.json" + if _check_filepath $src; then + ln -rsf "$src" "$PDDF_DEV_FILE" + fi + + src="$PLAT_CONF_PATH/platform-beta.json" + if _check_filepath $src; then + ln -rsf $src "$PLAT_CONF_FILE" + fi + +elif [ "$HW_REV_ID" -ge "$PVT" ]; then + src="$PDDF_DEV_PATH/pddf-device-pvt.json" + if _check_filepath $src; then + ln -rsf "$src" "$PDDF_DEV_FILE" + fi + + src="$PLAT_CONF_PATH/platform-pvt.json" + if _check_filepath $src; then + ln -rsf $src "$PLAT_CONF_FILE" + fi +else + src="$PDDF_DEV_PATH/pddf-device-pvt.json" + if _check_filepath $src; then + ln -rsf "$src" "$PDDF_DEV_FILE" + fi + + src="$PLAT_CONF_PATH/platform-pvt.json" + if _check_filepath $src; then + ln -rsf $src "$PLAT_CONF_FILE" + fi +fi diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_pre_driver_install.sh b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_pre_driver_install.sh new file mode 100755 index 000000000000..187943061e6c --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_pre_driver_install.sh @@ -0,0 +1,11 @@ +#!/bin/bash +#rmmod gpio_ich +if [ ! -f /tmp/._pddf_pre_driver_init_completion ]; then + # make sure igb/i40e init in correct order + rmmod i2c-i801 + rmmod i2c_ismt + modprobe -r i2c-i801 + modprobe -r i2c_ismt + date > /tmp/._pddf_pre_driver_init_completion +fi +echo "PDDF driver pre-install completed" diff --git a/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_switch_svc.py b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_switch_svc.py new file mode 100755 index 000000000000..c556d77f1c66 --- /dev/null +++ b/platform/broadcom/sonic-platform-modules-ufispace/s9110-32x/utils/pddf_switch_svc.py @@ -0,0 +1,86 @@ +#!/usr/bin/env python +# Script to stop and start the respective platforms default services. +# This will be used while switching the pddf->non-pddf mode and vice versa +import commands + +def check_pddf_support(): + return True + +def stop_platform_svc(): + + ''' + status, output = commands.getstatusoutput("systemctl stop s9110-32x-platform-monitor-fan.service") + if status: + print "Stop s9110-32x-platform-fan.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl stop s9110-32x-platform-monitor-psu.service") + if status: + print "Stop s9110-32x-platform-psu.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl stop s9110-32x-platform-monitor.service") + if status: + print "Stop s9110-32x-platform-init.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl disable s9110-32x-platform-monitor.service") + if status: + print "Disable s9110-32x-platform-monitor.service failed %d"%status + return False + ''' + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py deinit") + if status: + print "platform_utility.py deinit command failed %d"%status + return False + + # HACK , stop the pddf-platform-init service if it is active + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service along with other platform serives failed %d"%status + return False + + return True + +def start_platform_svc(): + + status, output = commands.getstatusoutput("/usr/local/bin/platform_utility.py init") + if status: + print "platform_utility.py init command failed %d"%status + return False + + ''' + status, output = commands.getstatusoutput("systemctl enable s9110-32x-platform-monitor.service") + if status: + print "Enable s9110-32x-platform-monitor.service failed %d"%status + return False + status, output = commands.getstatusoutput("systemctl start s9110-32x-platform-monitor-fan.service") + if status: + print "Start s9110-32x-platform-monitor-fan.service failed %d"%status + return False + + status, output = commands.getstatusoutput("systemctl start s9110-32x-platform-monitor-psu.service") + if status: + print "Start s9110-32x-platform-monitor-psu.service failed %d"%status + return False + ''' + return True + +def start_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl start pddf-platform-init.service") + if status: + print "Start pddf-platform-init.service failed %d"%status + return False + + return True + +def stop_platform_pddf(): + + status, output = commands.getstatusoutput("systemctl stop pddf-platform-init.service") + if status: + print "Stop pddf-platform-init.service failed %d"%status + return False + + return True + From 286ec3edbf91ec1bd09b6eae3a4d69801bdd94a9 Mon Sep 17 00:00:00 2001 From: Zhaohui Sun <94606222+ZhaohuiS@users.noreply.github.com> Date: Tue, 15 Aug 2023 08:49:49 +0800 Subject: [PATCH 4/4] Change orchagent pop batch size from 8192 to 1024 (#16125) ### Why I did it Background running lua script may cause redis-server quite busy if batch size is 8192. If handling time exceeded default 5s, the redis-server will not response to other process and will cause syncd crash. ``` Aug 9 07:46:29.512326 str-s6100-acs-5 INFO database#supervisord: redis 68:M 09 Aug 2023 07:46:29.511 # Lua slow script detected: still in execution after 5186 milliseconds. You can try killing the script using the SCRIPT KILL command. Script SHA1 is: 88270a7c5c90583e56425aca8af8a4b8c39fe757 Aug 9 07:46:29.523716 str-s6100-acs-5 ERR syncd#syncd: :- checkReplyType: Expected to get redis type 5 got type 6, err: BUSY Redis is busy running a script. You can only call SCRIPT KILL or SHUTDOWN NOSAVE. Aug 9 07:46:29.524818 str-s6100-acs-5 INFO syncd#supervisord: syncd terminate called after throwing an instance of ' Aug 9 07:46:29.525268 str-s6100-acs-5 ERR pmon#CCmisApi: :- checkReplyType: Expected to get redis type 5 got type 6, err: BUSY Redis is busy running a script. You can only call SCRIPT KILL or SHUTDOWN NOSAVE. Aug 9 07:46:29.526148 str-s6100-acs-5 INFO syncd#supervisord: syncd std::system_error' Aug 9 07:46:29.528308 str-s6100-acs-5 ERR pmon#psud[32]: :- checkReplyType: Expected to get redis type 5 got type 6, err: BUSY Redis is busy running a script. You can only call SCRIPT KILL or SHUTDOWN NOSAVE. Aug 9 07:46:29.529048 str-s6100-acs-5 ERR lldp#python3: :- guard: RedisReply catches system_error: command: *2#015#012$3#015#012DEL#015#012$27#015#012LLDP_ENTRY_TABLE:Ethernet37#015#012, reason: BUSY Redis is busy running a script. You can only call SCRIPT KILL or SHUTDOWN NOSAVE.: Input/output error Aug 9 07:46:29.529720 str-s6100-acs-5 ERR snmp#python3: :- guard: RedisReply catches system_error: command: *2#015#012$7#015#012HGETALL#015#012$28#015#012COUNTERS:oid:0x100000000000a#015#012, reason: BUSY Redis is busy running a script. You can only call SCRIPT KILL or SHUTDOWN NOSAVE.: Input/output error ``` 88270a7c5c90583e56425aca8af8a4b8c39fe757 is /usr/share/swss/consumer_state_table_pops.lua ##### Work item tracking - Microsoft ADO **24741990**: #### How I did it Change batch size from 8192 to1024. #### How to verify it Run all test cases in sonic-mgmt to verify the system stability. ### Tested branch (Please provide the tested image version) - [x] 20220531.36 --- dockers/docker-orchagent/orchagent.sh | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/dockers/docker-orchagent/orchagent.sh b/dockers/docker-orchagent/orchagent.sh index 7585e4896cf4..45571944db30 100755 --- a/dockers/docker-orchagent/orchagent.sh +++ b/dockers/docker-orchagent/orchagent.sh @@ -17,8 +17,8 @@ fi mkdir -p /var/log/swss ORCHAGENT_ARGS="-d /var/log/swss " -# Set orchagent pop batch size to 8192 -ORCHAGENT_ARGS+="-b 8192 " +# Set orchagent pop batch size to 1024 +ORCHAGENT_ARGS+="-b 1024 " # Set synchronous mode if it is enabled in CONFIG_DB SYNC_MODE=$(echo $SWSS_VARS | jq -r '.synchronous_mode')