diff --git a/core/cache_subsystem/wt_cache_subsystem.sv b/core/cache_subsystem/wt_cache_subsystem.sv index a7fd308d79..25333163f5 100644 --- a/core/cache_subsystem/wt_cache_subsystem.sv +++ b/core/cache_subsystem/wt_cache_subsystem.sv @@ -25,8 +25,8 @@ module wt_cache_subsystem import ariane_pkg::*; import wt_cache_pkg::*; #( parameter int unsigned AxiAddrWidth = 0, parameter int unsigned AxiDataWidth = 0, parameter int unsigned AxiIdWidth = 0, - parameter type axi_req_t = ariane_axi::req_t, - parameter type axi_rsp_t = ariane_axi::resp_t + parameter type noc_req_t = ariane_axi::req_t, + parameter type noc_resp_t = ariane_axi::resp_t ) ( input logic clk_i, input logic rst_ni, @@ -57,15 +57,9 @@ module wt_cache_subsystem import ariane_pkg::*; import wt_cache_pkg::*; #( // writebuffer status output logic wbuffer_empty_o, output logic wbuffer_not_ni_o, -`ifdef PITON_ARIANE - // L15 (memory side) - output l15_req_t l15_req_o, - input l15_rtrn_t l15_rtrn_i -`else // memory side - output axi_req_t axi_req_o, - input axi_rsp_t axi_resp_i -`endif + output noc_req_t noc_req_o, + input noc_resp_t noc_resp_i // TODO: interrupt interface ); @@ -153,16 +147,16 @@ module wt_cache_subsystem import ariane_pkg::*; import wt_cache_pkg::*; #( .dcache_data_i ( dcache_adapter ), .dcache_rtrn_vld_o ( adapter_dcache_rtrn_vld ), .dcache_rtrn_o ( adapter_dcache ), - .l15_req_o ( l15_req_o ), - .l15_rtrn_i ( l15_rtrn_i ) + .l15_req_o ( noc_req_o ), + .l15_rtrn_i ( noc_rtrn_i ) ); `else wt_axi_adapter #( .AxiAddrWidth ( AxiAddrWidth ), .AxiDataWidth ( AxiDataWidth ), .AxiIdWidth ( AxiIdWidth ), - .axi_req_t ( axi_req_t ), - .axi_rsp_t ( axi_rsp_t ) + .axi_req_t ( noc_req_t ), + .axi_rsp_t ( noc_resp_t ) ) i_adapter ( .clk_i ( clk_i ), .rst_ni ( rst_ni ), @@ -176,8 +170,8 @@ module wt_cache_subsystem import ariane_pkg::*; import wt_cache_pkg::*; #( .dcache_data_i ( dcache_adapter ), .dcache_rtrn_vld_o ( adapter_dcache_rtrn_vld ), .dcache_rtrn_o ( adapter_dcache ), - .axi_req_o ( axi_req_o ), - .axi_resp_i ( axi_resp_i ) + .axi_req_o ( noc_req_o ), + .axi_resp_i ( noc_resp_i ) ); `endif diff --git a/core/cva6.sv b/core/cva6.sv index 4d3e630fe0..32a92665ca 100644 --- a/core/cva6.sv +++ b/core/cva6.sv @@ -21,8 +21,8 @@ module cva6 import ariane_pkg::*; #( parameter type axi_ar_chan_t = ariane_axi::ar_chan_t, parameter type axi_aw_chan_t = ariane_axi::aw_chan_t, parameter type axi_w_chan_t = ariane_axi::w_chan_t, - parameter type axi_req_t = ariane_axi::req_t, - parameter type axi_rsp_t = ariane_axi::resp_t + parameter type noc_req_t = ariane_axi::req_t, + parameter type noc_resp_t = ariane_axi::resp_t ) ( input logic clk_i, input logic rst_ni, @@ -39,14 +39,12 @@ module cva6 import ariane_pkg::*; #( // RISC-V formal interface port (`rvfi`): // Can be left open when formal tracing is not needed. output ariane_pkg::rvfi_port_t rvfi_o, + // cvxif output cvxif_pkg::cvxif_req_t cvxif_req_o, input cvxif_pkg::cvxif_resp_t cvxif_resp_i, - // L15 (memory side) - output wt_cache_pkg::l15_req_t l15_req_o, - input wt_cache_pkg::l15_rtrn_t l15_rtrn_i, - // memory side, AXI Master - output axi_req_t axi_req_o, - input axi_rsp_t axi_resp_i + // memory side + output noc_req_t noc_req_o, + input noc_resp_t noc_resp_i ); // ------------------------------------------ @@ -691,8 +689,8 @@ module cva6 import ariane_pkg::*; #( .AxiAddrWidth ( AxiAddrWidth ), .AxiDataWidth ( AxiDataWidth ), .AxiIdWidth ( AxiIdWidth ), - .axi_req_t ( axi_req_t ), - .axi_rsp_t ( axi_rsp_t ) + .noc_req_t ( noc_req_t ), + .noc_resp_t ( noc_resp_t ) ) i_cache_subsystem ( // to D$ .clk_i ( clk_i ), @@ -720,14 +718,9 @@ module cva6 import ariane_pkg::*; #( // write buffer status .wbuffer_empty_o ( dcache_commit_wbuffer_empty ), .wbuffer_not_ni_o ( dcache_commit_wbuffer_not_ni ), -`ifdef PITON_ARIANE - .l15_req_o ( l15_req_o ), - .l15_rtrn_i ( l15_rtrn_i ) -`else // memory side - .axi_req_o ( axi_req_o ), - .axi_resp_i ( axi_resp_i ) -`endif + .noc_req_o ( noc_req_o ), + .noc_resp_i ( noc_resp_i ) ); end else begin @@ -742,8 +735,8 @@ module cva6 import ariane_pkg::*; #( .axi_ar_chan_t ( axi_ar_chan_t ), .axi_aw_chan_t ( axi_aw_chan_t ), .axi_w_chan_t ( axi_w_chan_t ), - .axi_req_t ( axi_req_t ), - .axi_rsp_t ( axi_rsp_t ) + .axi_req_t ( noc_req_t ), + .axi_rsp_t ( noc_resp_t ) ) i_cache_subsystem ( // to D$ .clk_i ( clk_i ), @@ -771,8 +764,8 @@ module cva6 import ariane_pkg::*; #( .dcache_req_ports_i ( dcache_req_ports_ex_cache ), .dcache_req_ports_o ( dcache_req_ports_cache_ex ), // memory side - .axi_req_o ( axi_req_o ), - .axi_resp_i ( axi_resp_i ) + .axi_req_o ( noc_req_o ), + .axi_resp_i ( noc_resp_i ) ); assign dcache_commit_wbuffer_not_ni = 1'b1; end diff --git a/corev_apu/fpga/src/ariane_xilinx.sv b/corev_apu/fpga/src/ariane_xilinx.sv index 9ccaab0ae6..47a8af6996 100644 --- a/corev_apu/fpga/src/ariane_xilinx.sv +++ b/corev_apu/fpga/src/ariane_xilinx.sv @@ -697,7 +697,9 @@ ariane_axi::req_t axi_ariane_req; ariane_axi::resp_t axi_ariane_resp; ariane #( - .ArianeCfg ( ariane_soc::ArianeSocCfg ) + .ArianeCfg ( ariane_soc::ArianeSocCfg ), + .noc_req_t ( ariane_axi::req_t ), + .noc_resp_t ( ariane_axi::resp_t ) ) i_ariane ( .clk_i ( clk ), .rst_ni ( ndmreset_n ), @@ -707,8 +709,8 @@ ariane #( .ipi_i ( ipi ), .time_irq_i ( timer_irq ), .debug_req_i ( debug_req_irq ), - .axi_req_o ( axi_ariane_req ), - .axi_resp_i ( axi_ariane_resp ) + .noc_req_o ( axi_ariane_req ), + .noc_resp_i ( axi_ariane_resp ) ); `AXI_ASSIGN_FROM_REQ(slave[0], axi_ariane_req) diff --git a/corev_apu/openpiton/ariane_verilog_wrap.sv b/corev_apu/openpiton/ariane_verilog_wrap.sv index 6979a88ca5..5622c6c142 100644 --- a/corev_apu/openpiton/ariane_verilog_wrap.sv +++ b/corev_apu/openpiton/ariane_verilog_wrap.sv @@ -194,7 +194,9 @@ module ariane_verilog_wrap }; ariane #( - .ArianeCfg ( ArianeOpenPitonCfg ) + .ArianeCfg ( ArianeOpenPitonCfg ), + .noc_req_t ( wt_cache_pkg::l15_req_t ), + .noc_resp_t ( wt_cache_pkg::l15_rtrn_t ) ) ariane ( .clk_i ( clk_i ), .rst_ni ( spc_grst_l ), @@ -205,11 +207,11 @@ module ariane_verilog_wrap .time_irq_i ( time_irq ), .debug_req_i ( debug_req ), `ifdef PITON_ARIANE - .l15_req_o ( l15_req ), - .l15_rtrn_i ( l15_rtrn ) + .noc_req_o ( l15_req ), + .noc_resp_i ( l15_rtrn ) `else - .axi_req_o ( axi_req ), - .axi_resp_i ( axi_resp ) + .noc_req_o ( axi_req ), + .noc_resp_i ( axi_resp ) `endif ); diff --git a/corev_apu/src/ariane.sv b/corev_apu/src/ariane.sv index a61ebecf49..dd190370be 100644 --- a/corev_apu/src/ariane.sv +++ b/corev_apu/src/ariane.sv @@ -21,8 +21,8 @@ module ariane import ariane_pkg::*; #( parameter type axi_ar_chan_t = ariane_axi::ar_chan_t, parameter type axi_aw_chan_t = ariane_axi::aw_chan_t, parameter type axi_w_chan_t = ariane_axi::w_chan_t, - parameter type axi_req_t = ariane_axi::req_t, - parameter type axi_rsp_t = ariane_axi::resp_t + parameter type noc_req_t = ariane_axi::req_t, + parameter type noc_resp_t = ariane_axi::resp_t ) ( input logic clk_i, input logic rst_ni, @@ -41,15 +41,9 @@ module ariane import ariane_pkg::*; #( // Can be left open when formal tracing is not needed. output rvfi_port_t rvfi_o, `endif -`ifdef PITON_ARIANE - // L15 (memory side) - output wt_cache_pkg::l15_req_t l15_req_o, - input wt_cache_pkg::l15_rtrn_t l15_rtrn_i -`else // memory side, AXI Master - output axi_req_t axi_req_o, - input axi_rsp_t axi_resp_i -`endif + output noc_req_t noc_req_o, + input noc_resp_t noc_resp_i ); cvxif_pkg::cvxif_req_t cvxif_req; @@ -63,8 +57,8 @@ module ariane import ariane_pkg::*; #( .axi_ar_chan_t (axi_ar_chan_t), .axi_aw_chan_t (axi_aw_chan_t), .axi_w_chan_t (axi_w_chan_t), - .axi_req_t (axi_req_t), - .axi_rsp_t (axi_rsp_t) + .noc_req_t (noc_req_t), + .noc_resp_t (noc_resp_t) ) i_cva6 ( .clk_i ( clk_i ), .rst_ni ( rst_ni ), @@ -81,17 +75,8 @@ module ariane import ariane_pkg::*; #( `endif .cvxif_req_o ( cvxif_req ), .cvxif_resp_i ( cvxif_resp ), -`ifdef PITON_ARIANE - .l15_req_o ( l15_req_o ), - .l15_rtrn_i ( l15_rtrn_i ), - .axi_req_o ( ), - .axi_resp_i ( '0 ) -`else - .l15_req_o ( ), - .l15_rtrn_i ( '0 ), - .axi_req_o ( axi_req_o ), - .axi_resp_i ( axi_resp_i ) -`endif + .noc_req_o ( noc_req_o ), + .noc_resp_i ( noc_resp_i ) ); if (ariane_pkg::CVXIF_PRESENT) begin : gen_example_coprocessor diff --git a/corev_apu/tb/ariane_testharness.sv b/corev_apu/tb/ariane_testharness.sv index 4ed753aa50..9b093d5393 100644 --- a/corev_apu/tb/ariane_testharness.sv +++ b/corev_apu/tb/ariane_testharness.sv @@ -607,7 +607,9 @@ module ariane_testharness #( ariane_pkg::rvfi_port_t rvfi; ariane #( - .ArianeCfg ( ariane_soc::ArianeSocCfg ) + .ArianeCfg ( ariane_soc::ArianeSocCfg ), + .noc_req_t ( ariane_axi::req_t ), + .noc_resp_t ( ariane_axi::resp_t ) ) i_ariane ( .clk_i ( clk_i ), .rst_ni ( ndmreset_n ), @@ -625,8 +627,8 @@ module ariane_testharness #( `else .debug_req_i ( debug_req_core ), `endif - .axi_req_o ( axi_ariane_req ), - .axi_resp_i ( axi_ariane_resp ) + .noc_req_o ( axi_ariane_req ), + .noc_resp_i ( axi_ariane_resp ) ); `AXI_ASSIGN_FROM_REQ(slave[0], axi_ariane_req)