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This is a miscompilation as the fld/fstp instructions will convert bit patterns that are signalling NaNs to quiet NaNs (e.g. 0xff800001 -> 0xffc00001).
This can cause miscompilations like this one, where the optimiser replaced an integer load/store with a float load/store, ultimately resulting in a segfault.
This is a miscompilation as the fld/fstp instructions will convert bit patterns that are signalling NaNs to quiet NaNs (e.g. 0xff800001 -> 0xffc00001).
This can cause miscompilations like this one, where the optimiser replaced an integer load/store with a float load/store, ultimately resulting in a segfault.
In LLVM IR, it is valid to transform
into
(alive2)
However, the 32-bit x86 backend will (when SSE is disabled) miscompile the second example:
(comparison)
This is a miscompilation as the
fld
/fstp
instructions will convert bit patterns that are signalling NaNs to quiet NaNs (e.g. 0xff800001 -> 0xffc00001).This can cause miscompilations like this one, where the optimiser replaced an integer load/store with a float load/store, ultimately resulting in a segfault.
Related to #44218.
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