From 83e2710eb014c9a7fcb764b0270077e4f00cdab6 Mon Sep 17 00:00:00 2001 From: Dylan McKay Date: Fri, 5 Feb 2021 02:02:49 +1300 Subject: [PATCH] [AVR] Remove an assertion that causes generic CodeGen tests to fail It was discussed a few years ago and agreed that it makes sense to remove this assertion as other targets do not perform similar register size checking in inline assembly constraint logic, so the check just adds a needless barrier on AVR. This patch removes the assertion and removes 'XFAIL' from two Generic CodeGen tests for AVR as a result. --- llvm/lib/Target/AVR/AVRISelLowering.cpp | 1 - llvm/test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll | 1 - llvm/test/CodeGen/Generic/inline-asm-mem-clobber.ll | 3 --- 3 files changed, 5 deletions(-) diff --git a/llvm/lib/Target/AVR/AVRISelLowering.cpp b/llvm/lib/Target/AVR/AVRISelLowering.cpp index 2085acb7f23c30..eb719415395b51 100644 --- a/llvm/lib/Target/AVR/AVRISelLowering.cpp +++ b/llvm/lib/Target/AVR/AVRISelLowering.cpp @@ -1938,7 +1938,6 @@ AVRTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, if (VT == MVT::i8) return std::make_pair(0U, &AVR::GPR8RegClass); - assert(VT == MVT::i16 && "inline asm constraint too large"); return std::make_pair(0U, &AVR::DREGSRegClass); case 't': // Temporary register: r0. return std::make_pair(unsigned(AVR::R0), &AVR::GPR8RegClass); diff --git a/llvm/test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll b/llvm/test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll index e961ea764ec28d..cb0951dec4487e 100644 --- a/llvm/test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll +++ b/llvm/test/CodeGen/Generic/2007-04-08-MultipleFrameIndices.ll @@ -4,7 +4,6 @@ ; PR1557 ; Bug: PR31336 -; XFAIL: avr define i32 @stuff(i32, ...) { %foo = alloca i8* diff --git a/llvm/test/CodeGen/Generic/inline-asm-mem-clobber.ll b/llvm/test/CodeGen/Generic/inline-asm-mem-clobber.ll index 6184f803b71f6e..be1e0a39b3b0db 100644 --- a/llvm/test/CodeGen/Generic/inline-asm-mem-clobber.ll +++ b/llvm/test/CodeGen/Generic/inline-asm-mem-clobber.ll @@ -1,8 +1,5 @@ ; RUN: llc -O2 -no-integrated-as < %s | FileCheck %s -; Test uses 32-bit registers which aren't supported on AVR. -; XFAIL: avr - @G = common global i32 0, align 4 define i32 @foo(i8* %p) nounwind uwtable {