From 514c28a0480d912a6ffd40b7063e8b1f752d3d35 Mon Sep 17 00:00:00 2001 From: Alex Beregszaszi Date: Sun, 23 Apr 2017 02:11:16 +0100 Subject: [PATCH 1/8] Add bitwise shift instructions --- libevm/Instruction.cpp | 3 +++ libevm/Instruction.h | 5 ++++- libevm/VMConfig.h | 6 +++--- 3 files changed, 10 insertions(+), 4 deletions(-) diff --git a/libevm/Instruction.cpp b/libevm/Instruction.cpp index faab1c5e389..d3c3e2685e0 100644 --- a/libevm/Instruction.cpp +++ b/libevm/Instruction.cpp @@ -45,6 +45,9 @@ static const std::map c_instructionInfo = { Instruction::OR, { "OR", 0, 2, 1, Tier::VeryLow } }, { Instruction::XOR, { "XOR", 0, 2, 1, Tier::VeryLow } }, { Instruction::BYTE, { "BYTE", 0, 2, 1, Tier::VeryLow } }, + { Instruction::SHL, { "SHL", 0, 2, 1, Tier::VeryLow } }, + { Instruction::SHR, { "SHR", 0, 2, 1, Tier::VeryLow } }, + { Instruction::SAR, { "SAR", 0, 2, 1, Tier::VeryLow } }, { Instruction::ADDMOD, { "ADDMOD", 0, 3, 1, Tier::Mid } }, { Instruction::MULMOD, { "MULMOD", 0, 3, 1, Tier::Mid } }, { Instruction::SIGNEXTEND, { "SIGNEXTEND", 0, 2, 1, Tier::Low } }, diff --git a/libevm/Instruction.h b/libevm/Instruction.h index 081449e5a23..876cd509be8 100644 --- a/libevm/Instruction.h +++ b/libevm/Instruction.h @@ -50,8 +50,11 @@ enum class Instruction: uint8_t AND, ///< bitwise AND operation OR, ///< bitwise OR operation XOR, ///< bitwise XOR operation - NOT, ///< bitwise NOT opertation + NOT, ///< bitwise NOT operation BYTE, ///< retrieve single byte from word + SHL, ///< logical shift left operation + SHR, ///< logical shift right operation + SAR, ///< arithmetic shift right operation SHA3 = 0x20, ///< compute SHA3-256 hash diff --git a/libevm/VMConfig.h b/libevm/VMConfig.h index 0b3ade7198b..f2f10f31ad6 100644 --- a/libevm/VMConfig.h +++ b/libevm/VMConfig.h @@ -185,9 +185,9 @@ namespace eth &&XOR, \ &&NOT, \ &&BYTE, \ - &&INVALID, \ - &&INVALID, \ - &&INVALID, \ + &&SHL, \ + &&SHR, \ + &&SAR, \ &&INVALID, \ &&INVALID, \ &&SHA3, /* 20, */ \ From 213e0c8d8c9b81233b6bada8c2d96f0f0e278786 Mon Sep 17 00:00:00 2001 From: Alex Beregszaszi Date: Sun, 23 Apr 2017 02:11:27 +0100 Subject: [PATCH 2/8] Implement shift opcodes --- libevm/VM.cpp | 47 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/libevm/VM.cpp b/libevm/VM.cpp index 0ece8e4240b..ad8b379de1b 100644 --- a/libevm/VM.cpp +++ b/libevm/VM.cpp @@ -626,6 +626,53 @@ void VM::interpretCases() } NEXT +#if EVM_USE_BITSHIFT + CASE(SHL) + { + ON_OP(); + updateIOGas(); + + if (m_SP[0] >= 256) + m_SPP[0] = 0; + else + /// TODO: confirm shift >= 256 results in 0 on Boost + m_SPP[0] = m_SP[1] << m_SP[0]; + } + NEXT + + CASE(SHR) + { + ON_OP(); + updateIOGas(); + + if (m_SP[0] >= 256) + m_SPP[0] = 0; + else + /// TODO: confirm shift >= 256 results in 0 on Boost + m_SPP[0] = m_SP[1] >> m_SP[0]; + } + NEXT + + CASE(SAR) + { + ON_OP(); + updateIOGas(); + + s256 value = u2s(m_SP[1]); + u256 shift = m_SP[0]; + if (shift >= 256) + { + if (value >= 0) + m_SPP[0] = 0; + else + m_SPP[0] = s2u(-1); + } + else + m_SPP[0] = s2u(divWorkaround(value, exp256(2, shift))); + } + NEXT +#endif + CASE(ADDMOD) { ON_OP(); From 02d77f11f1d4828b89b809f06f32e83e48295112 Mon Sep 17 00:00:00 2001 From: Alex Beregszaszi Date: Thu, 4 May 2017 18:09:20 +0100 Subject: [PATCH 3/8] Workaround bug in Boost --- libevm/VM.cpp | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/libevm/VM.cpp b/libevm/VM.cpp index ad8b379de1b..4823c129831 100644 --- a/libevm/VM.cpp +++ b/libevm/VM.cpp @@ -635,8 +635,11 @@ void VM::interpretCases() if (m_SP[0] >= 256) m_SPP[0] = 0; else - /// TODO: confirm shift >= 256 results in 0 on Boost - m_SPP[0] = m_SP[1] << m_SP[0]; + { + /// This workarounds a bug in Boost... + u256 mask = (u256(1) << (256 - m_SP[0])) - 1; + m_SPP[0] = (m_SP[1] & mask) << m_SP[0]; + } } NEXT From 1bd656d8971377fc1c021fb40a7838534d8f248b Mon Sep 17 00:00:00 2001 From: gcolvin Date: Sat, 23 Sep 2017 01:12:35 -0600 Subject: [PATCH 4/8] Rewrite shift implementation --- libevm/VM.cpp | 31 +++++++++++++++++-------------- 1 file changed, 17 insertions(+), 14 deletions(-) diff --git a/libevm/VM.cpp b/libevm/VM.cpp index 4823c129831..4de97dc23f3 100644 --- a/libevm/VM.cpp +++ b/libevm/VM.cpp @@ -635,11 +635,7 @@ void VM::interpretCases() if (m_SP[0] >= 256) m_SPP[0] = 0; else - { - /// This workarounds a bug in Boost... - u256 mask = (u256(1) << (256 - m_SP[0])) - 1; - m_SPP[0] = (m_SP[1] & mask) << m_SP[0]; - } + m_SPP[0] = m_SP[1] << unsigned(m_SP[0]); } NEXT @@ -651,8 +647,7 @@ void VM::interpretCases() if (m_SP[0] >= 256) m_SPP[0] = 0; else - /// TODO: confirm shift >= 256 results in 0 on Boost - m_SPP[0] = m_SP[1] >> m_SP[0]; + m_SPP[0] = m_SP[1] >> unsigned(m_SP[0]); } NEXT @@ -661,17 +656,25 @@ void VM::interpretCases() ON_OP(); updateIOGas(); - s256 value = u2s(m_SP[1]); - u256 shift = m_SP[0]; - if (shift >= 256) + static u256 const hibit = u256(1) << 255; + static u256 const allbits = + u256("0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff"); + + u256 shiftee = m_SP[1]; + if (m_SP[0] >= 256) { - if (value >= 0) - m_SPP[0] = 0; + if (shiftee & hibit) + m_SPP[0] = allbits; else - m_SPP[0] = s2u(-1); + m_SPP[0] = 0; } else - m_SPP[0] = s2u(divWorkaround(value, exp256(2, shift))); + { + unsigned amount = unsigned(m_SP[0]); + m_SPP[0] = shiftee >> amount; + if (shiftee & hibit) + m_SPP[0] |= allbits << (256 - amount); + } } NEXT #endif From 8d3fcd0ae4b6493c674e500e65b664c42f218378 Mon Sep 17 00:00:00 2001 From: Alex Beregszaszi Date: Tue, 3 Oct 2017 17:09:03 +0100 Subject: [PATCH 5/8] Add back guard when shifts are disabled --- libevm/VM.cpp | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/libevm/VM.cpp b/libevm/VM.cpp index 4de97dc23f3..0f7634ca87b 100644 --- a/libevm/VM.cpp +++ b/libevm/VM.cpp @@ -677,6 +677,13 @@ void VM::interpretCases() } } NEXT +#else + CASE(SHL) + CASE(SHR) + CASE(SAR) + { + throwBadInstruction(); + } #endif CASE(ADDMOD) From fcda859b396a18d4ca33ee7052dd7ed37ebdb05d Mon Sep 17 00:00:00 2001 From: Alex Beregszaszi Date: Tue, 3 Oct 2017 17:10:09 +0100 Subject: [PATCH 6/8] Add option guard for turning shifts off by default --- libevm/VMConfig.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/libevm/VMConfig.h b/libevm/VMConfig.h index f2f10f31ad6..38956441949 100644 --- a/libevm/VMConfig.h +++ b/libevm/VMConfig.h @@ -25,6 +25,8 @@ namespace eth // // interpreter configuration macros for development, optimizations and tracing // +// EVM_USE_BITSHIFT - EIP145 bitwise shifting +// // EIP_615 - subroutines and static jumps // EIP_616 - SIMD // @@ -37,6 +39,10 @@ namespace eth // // EVM_TRACE - provides various levels of tracing +#ifndef EVM_USE_BITSHIFT + #define EVM_USE_BITSHIFT false +#endif + #ifndef EIP_615 #define EIP_615 false #endif From 843f97d5a35e52ba1e39ecf520b439113c20dbc6 Mon Sep 17 00:00:00 2001 From: gcolvin Date: Tue, 3 Oct 2017 23:00:57 -0600 Subject: [PATCH 7/8] Update shift test examples --- libevm/VM.cpp | 2 +- libevm/VMConfig.h | 8 +- test/unittests/performance/rc5.sol | 16 +- test/unittests/performance/shift-tests.asm | 225 +++++++++++++++++++++ 4 files changed, 234 insertions(+), 17 deletions(-) create mode 100755 test/unittests/performance/shift-tests.asm diff --git a/libevm/VM.cpp b/libevm/VM.cpp index 0f7634ca87b..321c7760e34 100644 --- a/libevm/VM.cpp +++ b/libevm/VM.cpp @@ -626,7 +626,7 @@ void VM::interpretCases() } NEXT -#if EVM_USE_BITSHIFT +#if EIP_145 CASE(SHL) { ON_OP(); diff --git a/libevm/VMConfig.h b/libevm/VMConfig.h index 38956441949..f70ab7e53d4 100644 --- a/libevm/VMConfig.h +++ b/libevm/VMConfig.h @@ -25,11 +25,13 @@ namespace eth // // interpreter configuration macros for development, optimizations and tracing // -// EVM_USE_BITSHIFT - EIP145 bitwise shifting +// EIP_145 - bitwise shifting // // EIP_615 - subroutines and static jumps // EIP_616 - SIMD // +// EVM_OPTIMIZE - all optimizations off when false (TO DO - MAKE DYNAMIC) +// // EVM_SWITCH_DISPATCH - dispatch via loop and switch // EVM_JUMP_DISPATCH - dispatch via a jump table - available only on GCC // @@ -39,8 +41,8 @@ namespace eth // // EVM_TRACE - provides various levels of tracing -#ifndef EVM_USE_BITSHIFT - #define EVM_USE_BITSHIFT false +#ifndef EIP_145 + #define EIP_145 false #endif #ifndef EIP_615 diff --git a/test/unittests/performance/rc5.sol b/test/unittests/performance/rc5.sol index 1f08c39e0ef..4d3bb4e122b 100755 --- a/test/unittests/performance/rc5.sol +++ b/test/unittests/performance/rc5.sol @@ -3,25 +3,15 @@ pragma solidity ^0.4.0; // https://people.csail.mit.edu/rivest/Rivest-rc5rev.pdf contract rc5 { - - // don't I wish we had opcodes and operators for these - - function shift_left(uint32 v, uint32 n) internal returns (uint32) { - return v *= uint32(2)**n; - } - - function shift_right(uint32 v, uint32 n) internal returns (uint32) { - return v *= uint32(2)**n; - } function rotate_left(uint32 v, uint32 n) internal returns (uint32) { n &= 0x1f; - return shift_left(v, n) | shift_right(v, 32 - n); + return v << n | v >> (32 - n); } function rotate_right(uint32 v, uint32 n) internal returns (uint32) { n &= 0x1f; - return shift_right(v, n) | shift_left(v, 32 - n); + return v >> n | v << (32 - n); } function encrypt(uint32[26] S, uint32[4] inout) { @@ -94,4 +84,4 @@ contract rc5 { for (int i = 0; i < 43690; ++i) test(box, messg); } -} +} \ No newline at end of file diff --git a/test/unittests/performance/shift-tests.asm b/test/unittests/performance/shift-tests.asm new file mode 100755 index 00000000000..1ab34950b49 --- /dev/null +++ b/test/unittests/performance/shift-tests.asm @@ -0,0 +1,225 @@ +{ + let r := 0 + 0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff + 256 + shl + =: r + switch r + case 0 { + } + default { + 0 + 0 + revert + } + + /// + r := 0 + 2 + 1 + shl + =: r + switch r + case 4 { + } + default { + 0 + 0 + revert + } + + /// + r := 0 + 0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff + 1 + shl + =: r + switch r + case 0xfffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe { + } + default { + 0 + 0 + revert + } + + /// + r := 0 + 0x8000000000000000000000000000000000000000000000000000000000000000 + 1 + shl + =: r + switch r + case 0 { + } + default { + 0 + 0 + revert + } + + /// + r := 0 + 3 + 255 + shl + =: r + switch r + case 0x8000000000000000000000000000000000000000000000000000000000000000 { + } + default { + 0 + 0 + revert + } + + /// + r := 0 + 0xffffffff + 224 + shl + =: r + switch r + case 0xffffffff00000000000000000000000000000000000000000000000000000000 { + } + default { + 0 + 0 + revert + } + + /// + r := 0 + 2 + 1 + shr + =: r + switch r + case 1 { + } + default { + 0 + 0 + revert + } + + /// + r := 0 + 0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff + 256 + shr + =: r + switch r + case 0 { + } + default { + 0 + 0 + revert + } + + /// + r := 0 + 0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff + 1 + shr + =: r + switch r + case 0x7fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff { + } + default { + 0 + 0 + revert + } + + /// + r := 0 + 0x7fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff + 1 + shr + =: r + switch r + case 0x3fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff { + } + default { + 0 + 0 + revert + } + + /// + r := 0 + 0x8000000000000000000000000000000000000000000000000000000000000000 + 1 + shr + =: r + switch r + case 0x4000000000000000000000000000000000000000000000000000000000000000 { + } + default { + 0 + 0 + revert + } + + /// + r := 0 + 0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff + 256 + sar + =: r + switch r + case 0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff { + } + default { + 0 + 0 + revert + } + + /// + 0x7fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff + 256 + sar + =: r + switch r + case 0 { + } + default { + 0 + 0 + revert + } + + /// + r := 0 + 0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff + 1 + sar + =: r + switch r + case 0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff { + } + default { + 0 + 0 + revert + } + + /// + r := 0 + 0x7fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff + 1 + sar + =: r + switch r + case 0x3fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff { + stop + } + default { + 0 + 0 + revert + } +} From a3d93a8fb80c2620449e4d399507dd5ac77ecaae Mon Sep 17 00:00:00 2001 From: Tim Siwula Date: Wed, 7 Feb 2018 22:29:45 +0000 Subject: [PATCH 8/8] conditionally enable bitshift on ConstantinopleForkBlock --- libethcore/EVMSchedule.h | 2 + libevm/VM.cpp | 107 ++++++++++++++++++++------------------- libevm/VMConfig.h | 6 --- 3 files changed, 57 insertions(+), 58 deletions(-) diff --git a/libethcore/EVMSchedule.h b/libethcore/EVMSchedule.h index bab76449ecf..f2b6dfdf7a5 100644 --- a/libethcore/EVMSchedule.h +++ b/libethcore/EVMSchedule.h @@ -33,6 +33,7 @@ struct EVMSchedule bool haveDelegateCall = true; bool eip150Mode = false; bool eip158Mode = false; + bool haveBitwiseShifting = false; bool haveRevert = false; bool haveReturnData = false; bool haveStaticCall = false; @@ -130,6 +131,7 @@ static const EVMSchedule ConstantinopleSchedule = [] EVMSchedule schedule = ByzantiumSchedule; schedule.blockhashGas = 800; schedule.haveCreate2 = true; + schedule.haveBitwiseShifting = true; return schedule; }(); diff --git a/libevm/VM.cpp b/libevm/VM.cpp index 321c7760e34..3b788afe8c1 100644 --- a/libevm/VM.cpp +++ b/libevm/VM.cpp @@ -68,15 +68,15 @@ uint64_t VM::decodeJumpvDest(const byte* const _code, uint64_t& _pc, byte _voff) // byte opcode // byte n_jumps // byte table[n_jumps][2] - // + // uint64_t pc = _pc; byte n = _code[++pc]; // byte after opcode is number of jumps if (_voff >= n) _voff = n - 1; // if offset overflows use default jump pc += _voff * 2; // adjust inout pc before index destination in table - + uint64_t dest = decodeJumpDest(_code, pc); - - _pc += 1 + n * 2; // adust inout _pc to opcode after table + + _pc += 1 + n * 2; // adust inout _pc to opcode after table return dest; } @@ -206,7 +206,7 @@ owning_bytes_ref VM::exec(u256& _io_gas, ExtVMFace& _ext, OnOpFunc const& _onOp) do (this->*m_bounce)(); while (m_bounce); - + } catch (...) { @@ -225,7 +225,7 @@ void VM::interpretCases() { INIT_CASES DO_CASES - { + { // // Call-related instructions // @@ -239,7 +239,7 @@ void VM::interpretCases() m_bounce = &VM::caseCreate; } BREAK - + CASE(CREATE) { ON_OP(); @@ -296,7 +296,7 @@ void VM::interpretCases() owning_bytes_ref output{move(m_mem), b, s}; throwRevertInstruction(move(output)); } - BREAK; + BREAK; CASE(SUICIDE) { @@ -327,12 +327,12 @@ void VM::interpretCases() m_bounce = 0; } BREAK - - + + // // instructions potentially expanding memory // - + CASE(MLOAD) { ON_OP(); @@ -439,7 +439,7 @@ void VM::interpretCases() m_ext->log({m_SP[2], m_SP[3], m_SP[4], m_SP[5]}, bytesConstRef(m_mem.data() + (uint64_t)m_SP[0], (uint64_t)m_SP[1])); } - NEXT + NEXT CASE(EXP) { @@ -626,9 +626,12 @@ void VM::interpretCases() } NEXT -#if EIP_145 CASE(SHL) { + // Pre-constantinople + if (!m_schedule->haveBitwiseShifting) + throwBadInstruction(); + ON_OP(); updateIOGas(); @@ -641,6 +644,10 @@ void VM::interpretCases() CASE(SHR) { + // Pre-constantinople + if (!m_schedule->haveBitwiseShifting) + throwBadInstruction(); + ON_OP(); updateIOGas(); @@ -653,6 +660,10 @@ void VM::interpretCases() CASE(SAR) { + // Pre-constantinople + if (!m_schedule->haveBitwiseShifting) + throwBadInstruction(); + ON_OP(); updateIOGas(); @@ -677,14 +688,6 @@ void VM::interpretCases() } } NEXT -#else - CASE(SHL) - CASE(SHR) - CASE(SAR) - { - throwBadInstruction(); - } -#endif CASE(ADDMOD) { @@ -720,14 +723,14 @@ void VM::interpretCases() number &= mask; } } - NEXT + NEXT #if EIP_615 CASE(JUMPTO) { ON_OP(); updateIOGas(); - + m_PC = decodeJumpDest(m_code.data(), m_PC); } CONTINUE @@ -736,7 +739,7 @@ void VM::interpretCases() { ON_OP(); updateIOGas(); - + if (m_SP[0]) m_PC = decodeJumpDest(m_code.data(), m_PC); else @@ -774,7 +777,7 @@ void VM::interpretCases() { ON_OP(); updateIOGas(); - + m_PC = *m_RP--; } NEXT @@ -785,7 +788,7 @@ void VM::interpretCases() updateIOGas(); } NEXT - + CASE(BEGINDATA) { @@ -826,7 +829,7 @@ void VM::interpretCases() #endif #if EIP_616 - + CASE(XADD) { ON_OP(); @@ -835,7 +838,7 @@ void VM::interpretCases() xadd(simdType()); } CONTINUE - + CASE(XMUL) { ON_OP(); @@ -844,7 +847,7 @@ void VM::interpretCases() xmul(simdType()); } CONTINUE - + CASE(XSUB) { ON_OP(); @@ -853,7 +856,7 @@ void VM::interpretCases() xsub(simdType()); } CONTINUE - + CASE(XDIV) { ON_OP(); @@ -862,7 +865,7 @@ void VM::interpretCases() xdiv(simdType()); } CONTINUE - + CASE(XSDIV) { ON_OP(); @@ -871,7 +874,7 @@ void VM::interpretCases() xsdiv(simdType()); } CONTINUE - + CASE(XMOD) { ON_OP(); @@ -880,7 +883,7 @@ void VM::interpretCases() xmod(simdType()); } CONTINUE - + CASE(XSMOD) { ON_OP(); @@ -889,7 +892,7 @@ void VM::interpretCases() xsmod(simdType()); } CONTINUE - + CASE(XLT) { ON_OP(); @@ -898,7 +901,7 @@ void VM::interpretCases() xlt(simdType()); } CONTINUE - + CASE(XGT) { ON_OP(); @@ -907,7 +910,7 @@ void VM::interpretCases() xgt(simdType()); } CONTINUE - + CASE(XSLT) { ON_OP(); @@ -916,7 +919,7 @@ void VM::interpretCases() xslt(simdType()); } CONTINUE - + CASE(XSGT) { ON_OP(); @@ -925,7 +928,7 @@ void VM::interpretCases() xsgt(simdType()); } CONTINUE - + CASE(XEQ) { ON_OP(); @@ -934,7 +937,7 @@ void VM::interpretCases() xeq(simdType()); } CONTINUE - + CASE(XISZERO) { ON_OP(); @@ -943,7 +946,7 @@ void VM::interpretCases() xzero(simdType()); } CONTINUE - + CASE(XAND) { ON_OP(); @@ -952,7 +955,7 @@ void VM::interpretCases() xand(simdType()); } CONTINUE - + CASE(XOOR) { ON_OP(); @@ -961,7 +964,7 @@ void VM::interpretCases() xoor(simdType()); } CONTINUE - + CASE(XXOR) { ON_OP(); @@ -970,7 +973,7 @@ void VM::interpretCases() xxor(simdType()); } CONTINUE - + CASE(XNOT) { ON_OP(); @@ -979,7 +982,7 @@ void VM::interpretCases() xnot(simdType()); } CONTINUE - + CASE(XSHL) { ON_OP(); @@ -988,7 +991,7 @@ void VM::interpretCases() xshl(simdType()); } CONTINUE - + CASE(XSHR) { ON_OP(); @@ -997,7 +1000,7 @@ void VM::interpretCases() xshr(simdType()); } CONTINUE - + CASE(XSAR) { ON_OP(); @@ -1006,7 +1009,7 @@ void VM::interpretCases() xsar(simdType()); } CONTINUE - + CASE(XROL) { ON_OP(); @@ -1015,7 +1018,7 @@ void VM::interpretCases() xrol(simdType()); } CONTINUE - + CASE(XROR) { ON_OP(); @@ -1063,7 +1066,7 @@ void VM::interpretCases() updateSSGas(); ON_OP(); updateIOGas(); - + xsstore(simdType()); } CONTINUE @@ -1606,10 +1609,10 @@ void VM::interpretCases() ON_OP(); if (m_ext->staticCall) throwDisallowedStateChange(); - + updateSSGas(); updateIOGas(); - + m_ext->setStore(m_SP[0], m_SP[1]); } NEXT @@ -1654,6 +1657,6 @@ void VM::interpretCases() { throwBadInstruction(); } - } + } WHILE_CASES } diff --git a/libevm/VMConfig.h b/libevm/VMConfig.h index f70ab7e53d4..c8c709e826f 100644 --- a/libevm/VMConfig.h +++ b/libevm/VMConfig.h @@ -25,8 +25,6 @@ namespace eth // // interpreter configuration macros for development, optimizations and tracing // -// EIP_145 - bitwise shifting -// // EIP_615 - subroutines and static jumps // EIP_616 - SIMD // @@ -41,10 +39,6 @@ namespace eth // // EVM_TRACE - provides various levels of tracing -#ifndef EIP_145 - #define EIP_145 false -#endif - #ifndef EIP_615 #define EIP_615 false #endif