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esp-hal

GitHub Workflow Status MIT/Apache-2.0 licensed Matrix

Hardware Abstraction Layer crates for the ESP32, ESP32-C3, ESP32-S2, and ESP32-S3 from Espressif.

These HALs are no_std; if you are looking for std support please use esp-idf-hal instead.

This project is still in the early stages of development, and as such there should be no expectation of API stability. A significant number of peripherals currently have drivers implemented (you can see a full list here) but have varying levels of functionality. For most basic tasks, this should be usable already.

If you have any questions, comments, or concerns please open an issue, start a new discussion, or join us on Matrix. For additional information regarding any of the crates in this repository please refer to the crate's README.

Crate Target Technical Reference Manual
esp32-hal xtensa-esp32-none-elf ESP32
esp32c3-hal riscv32imc-unknown-none-elf
riscv32imac-unknown-none-elf*
ESP32-C3
esp32s2-hal xtensa-esp32s2-none-elf ESP32-S2
esp32s3-hal xtensa-esp32s3-none-elf ESP32-S3

* via atomic emulation

MSRV

The Minimum Supported Rust Versions are:

  • 1.60.0 for RISC-V devices (ESP32-C3)
  • 1.60.0 for Xtensa devices (ESP32, ESP32-S2, ESP32-S3)

Note that targeting the Xtensa ISA currently requires the use of the esp-rs/rust compiler fork. The esp-rs/rust-build repository has pre-compiled release artifacts for most common platforms, and provides installation scripts to aid you in the process.

RISC-V is officially supported by the official Rust compiler.

License

Licensed under either of:

at your option.

Contribution

Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you, as defined in the Apache-2.0 license, shall be dual licensed as above, without any additional terms or conditions.