Optimized the abort handler a little more

Gericom · Jul 1, 2019 · 03f8646 · 03f8646
1 parent e592198
commit 03f8646
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Showing 3 changed files with 74 additions and 74 deletions.
diff --git a/arm9/source/aborthandler_asm.s b/arm9/source/aborthandler_asm.s
@@ -55,47 +55,19 @@ data_abort_handler_arm_svc:
 	stmia r0, {r1-r12,sp,lr}
 	b data_abort_handler_cont
 
-.global data_abort_handler_arm_usr_sys
-data_abort_handler_arm_usr_sys:
-	stmdb r13, {r0-r14}^
-
-data_abort_handler_cont:
-	msr cpsr_c, #(CPSR_IRQ_FIQ_BITS | 0x11)	
-	add r11, r12, #(address_arm_table_dtcm - reg_table)
-
-#ifdef HANDLER_STATISTICS
-	mov r8, r10, lsr #19
-	mov r8, r8, lsl #4
-	tst r10, #(1 << 15)
-	orrne r8, #(1 << 3)
-	tst r10, #(1 << 3)
-	orrne r8, #1
-	and r9, r10, #(3 << 5)
-	orr r8, r9, lsr #4
-	ldr r9,= STATISTICS_ADDRESS
-	ldr r8, [r9, r8, lsl #2]!
-	add r8, #1
-	str r8, [r9]
-#endif
-
-	and r8, r10, #(0xF << 16)
-	ldr r9, [r12, r8, lsr #14]
-
-	ldr pc, [r11, r13, lsr #18]//todo: this construct actually involves an interlock!
-
 .global data_abort_handler_cont_finish
 data_abort_handler_cont_finish:
-	//important! this should set the v flag to 0
-	msr cpsr_fc, #(CPSR_IRQ_FIQ_BITS | 0x17)
+	msr cpsr_c, #(CPSR_IRQ_FIQ_BITS | 0x17)
 
 	//lr still contains spsr << 27
-	movs lr, lr, lsl #1
+	cmp lr, #(0x12 << 27)
 
-	bgt data_abort_handler_cont2
+	ldr lr, [r13, #4] //pu_data_permissions
+
+	beq data_abort_handler_cont2
 data_abort_handler_cont3:
 	ldmdb r13, {r0-r14}^
-
-	ldr lr, [r13, #4] //pu_data_permissions
+
 	mcr p15, 0, lr, c5, c0, 2
 
 	//assume the dtcm is always accessible
@@ -105,13 +77,10 @@ data_abort_handler_cont3:
 
 data_abort_handler_cont2:
 	sub r12, r13, #(4 * 15)
-	mov lr, lr, lsr #28
-	orr lr, lr, #(CPSR_IRQ_FIQ_BITS | 0x10)
-	msr cpsr_c, lr
+	msr cpsr_c, #(CPSR_IRQ_FIQ_BITS | 0x12)
 	ldmia r12, {r0-r14}
 	msr cpsr_c, #(CPSR_IRQ_FIQ_BITS | 0x17)
 
-	ldr lr, [r13, #4] //pu_data_permissions
 	mcr p15, 0, lr, c5, c0, 2
 
 	//assume the dtcm is always accessible
@@ -170,18 +139,45 @@ address_calc_unknown:
 	b .
 
 .global abt_handleArm
-abt_handleArm:
-	ldr r14, [r12, #0x48] //0x08088008
+abt_handleArm:	
 	ldr r10, [r11, #-8]
-    //fills in the interlock cycle that would otherwise be wasted    
-	add r9, r12, #(address_jumptab_armLo - reg_table)
+	ldr r14, [r12, #0x48] //0x08088008
 .global addrhack1
 addrhack1:
 	and r13, r10, pc, ror #14 //specially crafted value of pc serves as mask, pc + 8 should be 0x1803FC
-	tst r10, r14
+	tst r10, r14	
+	add r14, r12, #(address_jumptab_armLo - reg_table)
     //conditional is faster than branching here
 	orreq r13, r13, lsl #13
-	ldreq pc, [r9, r13, lsr #16]
+	ldreq pc, [r14, r13, lsr #16]
 handleArmHi:
 	msr cpsr_c, #(CPSR_IRQ_FIQ_BITS | 0x17)
-	ldr pc, [r13, lr, lsr #25] //todo: this construct actually involves an interlock!
+	cmp lr, #(0x12 << 27)
+	beq data_abort_handler_arm_irq
+
+.global data_abort_handler_arm_usr_sys
+data_abort_handler_arm_usr_sys:
+	stmdb r13, {r0-r14}^
+
+data_abort_handler_cont:
+	msr cpsr_c, #(CPSR_IRQ_FIQ_BITS | 0x11)	
+
+#ifdef HANDLER_STATISTICS
+	mov r8, r10, lsr #19
+	mov r8, r8, lsl #4
+	tst r10, #(1 << 15)
+	orrne r8, #(1 << 3)
+	tst r10, #(1 << 3)
+	orrne r8, #1
+	and r9, r10, #(3 << 5)
+	orr r8, r9, lsr #4
+	ldr r9,= STATISTICS_ADDRESS
+	ldr r8, [r9, r8, lsl #2]!
+	add r8, #1
+	str r8, [r9]
+#endif
+
+	and r8, r10, #(0xF << 16)
+	ldr r9, [r12, r8, lsr #14]
+
+	ldr pc, [r14, -r13, lsr #18]//todo: this construct actually involves an interlock!
diff --git a/arm9/source/consts.s b/arm9/source/consts.s
@@ -119,8 +119,8 @@
 FIELDS(address_dtcm, 
 	reg_table, 0x40,
 	address_cpu_mode_switch_dtcm, 4 * 31,
-	address_thumb_table_dtcm, 4 * 128,
-	address_arm_table_dtcm, 4 * 256 + 4,
+	address_thumb_table_dtcm, 4 * 128 + 4,
+	address_arm_table_dtcm, 4 * 256,
 	address_jumptab_armLo, 4 * 512,
 	address_count_bit_table, 0x100,
 	address_write_table_32bit_dtcm, 0x108,

diff --git a/arm9/source/dtcm_data.s b/arm9/source/dtcm_data.s
@@ -98,58 +98,62 @@ thumb_table:
 	.word address_calc_unknown
 .endr
 
+.word 0
+.word 0
+
 .global arm_table
 arm_table:
-.macro list_ldrh_strh_variant a,b,c,d,e
-	.word ldrh_strh_address_calc_\a\b\c\d\e
+.rept 96
+	.word address_calc_unknown
+.endr
+
+.macro list_ldm_stm_variant a,b,c,d,e
+	.word ldm_stm_address_calc_\a\b\c\d\e
 .endm
 
-.macro list_all_ldrh_strh_variants arg=0
-	list_ldrh_strh_variant %((\arg>>4)&1),%((\arg>>3)&1),%((\arg>>2)&1),%((\arg>>1)&1),%((\arg>>0)&1)
-.if \arg<0x1F
-	list_all_ldrh_strh_variants %(\arg+1)
+.macro list_all_ldm_stm_variants arg=0x1F
+	list_ldm_stm_variant %((\arg>>4)&1),%((\arg>>3)&1),%((\arg>>2)&1),%((\arg>>1)&1),%((\arg>>0)&1)
+.if \arg>0
+	list_all_ldm_stm_variants %(\arg-1)
 .endif
 .endm
-	list_all_ldrh_strh_variants
+	list_all_ldm_stm_variants
 
-.rept 32
-	.word address_calc_unknown
-.endr
 
 .macro list_ldr_str_variant a,b,c,d,e,f
 	.word ldr_str_address_calc_\a\b\c\d\e\f
 .endm
 
-.altmacro
-.macro list_all_ldr_str_variants arg=0
+.macro list_all_ldr_str_variants arg=0x3F
 	list_ldr_str_variant %((\arg>>5)&1),%((\arg>>4)&1),%((\arg>>3)&1),%((\arg>>2)&1),%((\arg>>1)&1),%((\arg>>0)&1)
-.if \arg<0x3F
-	list_all_ldr_str_variants %(\arg+1)
+.if \arg>0
+	list_all_ldr_str_variants %(\arg-1)
 .endif
 .endm
 
 	list_all_ldr_str_variants
 
-.macro list_ldm_stm_variant a,b,c,d,e
-	.word ldm_stm_address_calc_\a\b\c\d\e
+.rept 32
+	.word address_calc_unknown
+.endr
+
+.macro list_ldrh_strh_variant a,b,c,d,e
+	.word ldrh_strh_address_calc_\a\b\c\d\e
 .endm
 
-.macro list_all_ldm_stm_variants arg=0
-	list_ldm_stm_variant %((\arg>>4)&1),%((\arg>>3)&1),%((\arg>>2)&1),%((\arg>>1)&1),%((\arg>>0)&1)
-.if \arg<0x1F
-	list_all_ldm_stm_variants %(\arg+1)
+.macro list_all_ldrh_strh_variants arg=0x1F
+	list_ldrh_strh_variant %((\arg>>4)&1),%((\arg>>3)&1),%((\arg>>2)&1),%((\arg>>1)&1),%((\arg>>0)&1)
+.if \arg>1
+	list_all_ldrh_strh_variants %(\arg-1)
 .endif
 .endm
-	list_all_ldm_stm_variants
-.rept 96
-	.word address_calc_unknown
-.endr
-
-.word 0
+	list_all_ldrh_strh_variants
 
 .global jumptab_armLo
 jumptab_armLo:
 
+	.word ldrh_strh_address_calc_00000
+
 .macro list_arml_instLdrhStrh pre, up, imm, wrback, load, sign, half
 	.if (!\pre && \wrback) || (\load && !\sign && !\half) || (!\load && !(!\sign && \half)) 
 		.word address_calc_unknown
@@ -165,7 +169,7 @@ jumptab_armLo:
 .endif
 .endm
 
-listAll_arml_instLdrhStrh 0
+listAll_arml_instLdrhStrh 0,1
 listAll_arml_instLdrhStrh 1
 
 .rept 128