diff --git a/examples/picosoc/README.md b/examples/picosoc/README.md new file mode 100644 index 0000000..2f3e561 --- /dev/null +++ b/examples/picosoc/README.md @@ -0,0 +1,74 @@ +# Video Notes + +Git repository https://github.com/mattvenn/TinyFPGA-BX/tree/master/examples/picosoc + +The README.md contains information on: + +* Information about installing the toolchains +* Electrical wiring for the demos +* Precompiled firmware binaries: + * master - starting point + * ws2812 - includes ws2812 driver and serial driver + +# PicoSOC TinyFPGA example + +PicoSOC is an SOC - system on chip. It includes everything you need to +run a RiscV CPU on the TinyFPGA. + +The RiscV CPU is PicoRV32, made by Clifford Wolf. The original repo is here: + +https://github.com/cliffordwolf/picorv32 + +The SOC example that uses the PicoRV32 was originally made for the Lattice 8k evaluation +board. This example has been modified to work with the TinyFPGA by Luke from TinyFPGA. + +# FPGA Toolchain + +You can synthesise the demo with the [icestorm](http://www.clifford.at/icestorm/) toolchain. +A very convient way to install the toolchain is to use [APIO](https://github.com/FPGAwars/apio) +And then set your path to include the installed tools and copy the chipdb and yosys files: + + export PATH=$PATH:~/.apio/packages/toolchain-icestorm/bin/ + sudo cp -r ~/.apio/packages/toolchain-icestorm/share/icebox/ /usr/local/share/ + sudo cp -r ~/.apio/packages/toolchain-icestorm/share/yosys /usr/local/share/ + + +You will also need tinyprog: + + pip install tinyprog + +For more info on the TinyFPGA tools and setup see the TinyFPGA page: https://tinyfpga.com/bx/guide.html + +At this point you should be able to run make upload to synthesise the hardware and program to the TinyFPGA. +I have precompiled the firmware.c and added the firmware.bin and hex files to the repo so you don't need GCC. + +If you just want to see the demos in the video, you can switch to the ws2812 branch + + git checkout ws2812 + +Which should allow you to program the precompiled firmware or run the simulation without installing GCC. + +# GCC for firmware compilation + +As this is a RiscV CPU running on the FPGA, we really need the RiscV GCC tools to get the most out of it! +Fetching the repos and compiling took about 3 hours on my 4 year old T400 Lenovo laptop. Full instructions +here: https://github.com/cliffordwolf/picorv32#building-a-pure-rv32i-toolchain + +What I did was: + + sudo apt-get install autoconf automake autotools-dev curl libmpc-dev \ + libmpfr-dev libgmp-dev gawk build-essential bison flex texinfo \ + gperf libtool patchutils bc zlib1g-dev git libexpat1-dev + + git clone git@github.com:cliffordwolf/picorv32.git + cd picorv32/ + time make -j2 build-riscv32i-tools + export PATH=$PATH:/opt/riscv32i/bin/ + +Then make firmware.bin should work and you can then write your own c program or edit my demos. + +# Wiring for the demo + +* Serial TX is pin 1 +* Serial RX is pin 2 +* WS2812 data is pin 3 diff --git a/examples/picosoc/firmware.bin b/examples/picosoc/firmware.bin new file mode 100755 index 0000000..a4e488c Binary files /dev/null and b/examples/picosoc/firmware.bin differ diff --git a/examples/picosoc/firmware.c b/examples/picosoc/firmware.c index b36463f..cd7f9c6 100644 --- a/examples/picosoc/firmware.c +++ b/examples/picosoc/firmware.c @@ -25,11 +25,6 @@ uint32_t set_irq_mask(uint32_t mask); asm ( void main() { set_irq_mask(0xff); - // zero out .bss section - for (uint32_t *dest = &_sbss; dest < &_ebss;) { - *dest++ = 0; - } - // switch to dual IO mode reg_spictrl = (reg_spictrl & ~0x007F0000) | 0x00400000; diff --git a/examples/picosoc/firmware.elf b/examples/picosoc/firmware.elf new file mode 100755 index 0000000..ea7c870 Binary files /dev/null and b/examples/picosoc/firmware.elf differ diff --git a/examples/picosoc/firmware.map b/examples/picosoc/firmware.map deleted file mode 100644 index 657ca3c..0000000 --- a/examples/picosoc/firmware.map +++ /dev/null @@ -1,80 +0,0 @@ - -Memory Configuration - -Name Origin Length Attributes -FLASH 0x0000000000050000 0x0000000000100000 xr -RAM 0x0000000000000000 0x0000000000002000 xrw -*default* 0x0000000000000000 0xffffffffffffffff - -Linker script and memory map - - -.text 0x0000000000050000 0x1dc - 0x0000000000050000 . = ALIGN (0x4) - *(.text) - .text 0x0000000000050000 0x16a /tmp/ccBvQ25N.o - .text 0x000000000005016a 0x72 /tmp/cchneX8U.o - 0x000000000005016a set_irq_mask - 0x0000000000050170 main - *(.text*) - *(.rodata) - *(.rodata*) - *(.srodata) - *(.srodata*) - *(.eh_frame) - *(.eh_frame*) - 0x00000000000501dc . = ALIGN (0x4) - 0x00000000000501dc _etext = . - 0x00000000000501dc _sidata = _etext - -.rela.dyn 0x00000000000501dc 0x0 - .rela.text 0x00000000000501dc 0x0 /tmp/ccBvQ25N.o - -.data 0x0000000000000000 0x14 load address 0x00000000000501dc - 0x0000000000000000 . = ALIGN (0x4) - 0x0000000000000000 _sdata = . - 0x0000000000000000 _ram_start = . - *(.data) - .data 0x0000000000000000 0x14 /tmp/ccBvQ25N.o - .data 0x0000000000000014 0x0 /tmp/cchneX8U.o - *(.data*) - *(.sdata) - *(.sdata*) - *(.init_array) - *(.init_array*) - 0x0000000000000014 . = ALIGN (0x4) - 0x0000000000000014 _edata = . - -.bss 0x0000000000000014 0x0 load address 0x00000000000501f0 - 0x0000000000000014 . = ALIGN (0x4) - 0x0000000000000014 _sbss = . - *(.bss) - .bss 0x0000000000000014 0x0 /tmp/ccBvQ25N.o - .bss 0x0000000000000014 0x0 /tmp/cchneX8U.o - *(.bss*) - *(.sbss) - *(.sbss*) - *(COMMON) - 0x0000000000000014 . = ALIGN (0x4) - 0x0000000000000014 _ebss = . - -.heap 0x0000000000000014 0x0 - 0x0000000000000014 . = ALIGN (0x4) - 0x0000000000000014 _heap_start = . -LOAD /tmp/ccBvQ25N.o -LOAD /tmp/cchneX8U.o -OUTPUT(firmware.elf elf32-littleriscv) - -.comment 0x0000000000000000 0x11 - .comment 0x0000000000000000 0x11 /tmp/cchneX8U.o - 0x12 (size before relaxing) - -Cross Reference Table - -Symbol File -_ebss /tmp/cchneX8U.o -_sbss /tmp/cchneX8U.o -debug /tmp/ccBvQ25N.o -main /tmp/cchneX8U.o - /tmp/ccBvQ25N.o -set_irq_mask /tmp/cchneX8U.o diff --git a/examples/picosoc/start.S b/examples/picosoc/start.S index 7f2796d..38e4697 100644 --- a/examples/picosoc/start.S +++ b/examples/picosoc/start.S @@ -209,10 +209,36 @@ start: addi x30, zero, 0 addi x31, zero, 0 + # copy data section + la a0, _sidata # load _sidata to a0 + la a1, _sdata # load _sdata to a1 + la a2, _edata # load _edata to a2 + bge a1, a2, end_init_data # if _edata > _sdata jump to end + +loop_init_data: + lw a3, 0(a0) # load data at a0 to a3 + sw a3, 0(a1) # store data in a3 to a1 (_sdata) + addi a0, a0, 4 # add 4 to a0 + addi a1, a1, 4 # add 4 to a1 + blt a1, a2, loop_init_data # if a1 < a2 finish + +end_init_data: + + # zero-init bss section + la a0, _sbss + la a1, _ebss + bge a0, a1, end_init_bss + +loop_init_bss: + sw zero, 0(a0) + addi a0, a0, 4 + blt a0, a1, loop_init_bss + +end_init_bss: + call main - call main loop: - j loop + j loop