From 1c3de30ea1106c3abf6ccdc1d5e25806c6f3aa93 Mon Sep 17 00:00:00 2001 From: ferdymercury Date: Thu, 11 Nov 2021 00:19:43 +0100 Subject: [PATCH] Update README.md https://forum.kicad.info/t/warning-avoid-all-links-to-kicad-pcb-org-use-kicad-org/31521 --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 0a20aea..8f616e8 100644 --- a/README.md +++ b/README.md @@ -52,7 +52,7 @@ If you don't want to go through the hassle of ordering parts, tools, and supplie ## Project Directory Structure ### board -This contains a [KiCad](http://kicad-pcb.org/) project with the schematic and layout of the B-series boards. The board is designed with 4/4mil track size/spacing and 0.2mm hole size. BOM lists for B1 and B2 boards are available here as well. +This contains a [KiCad](http://kicad.org/) project with the schematic and layout of the B-series boards. The board is designed with 4/4mil track size/spacing and 0.2mm hole size. BOM lists for B1 and B2 boards are available here as well. ### bootloader FPGA boards with USB bitstream programming capability typically use an expensive USB interface chip to provide this functionality. The TinyFPGA B-series implement the USB bitstream programming capability within the FPGA itself. This directory contains the verilog code that implements this bootloader. The code is organized as an [iCEcube2](http://www.latticesemi.com/iCEcube2) project. The bootloader itself works in the same way an Arduino bootloader works. It is the first design to boot on the FPGA, if it is connected to a USB host it waits for a new bitstream to be programmed to the SPI flash, then reboots the FPGA to load the user design from flash. If the board is not connected to a USB host or if there is no programmer application running on the host then the bootloader will quickly timeout and load the user design. The bootloader does not consume any FPGA resources while the user design is loaded.