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Auto merge of #143684 - nikic:llvm-21, r=<try>
Update to LLVM 21 r? `@ghost`
2 parents 558d253 + ebb63b9 commit c3e645b

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.gitmodules

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@@ -24,8 +24,8 @@
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shallow = true
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[submodule "src/llvm-project"]
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path = src/llvm-project
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url = https://github.com/rust-lang/llvm-project.git
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branch = rustc/20.1-2025-02-13
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url = https://github.com/nikic/llvm-project.git
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branch = rust-llvm-21
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shallow = true
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[submodule "src/doc/embedded-book"]
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path = src/doc/embedded-book

compiler/rustc_codegen_llvm/src/context.rs

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@@ -206,6 +206,11 @@ pub(crate) unsafe fn create_module<'ll>(
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// LLVM 21 updated the default layout on nvptx: https://github.com/llvm/llvm-project/pull/124961
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target_data_layout = target_data_layout.replace("e-p6:32:32-i64", "e-i64");
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}
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if sess.target.arch == "amdgcn" {
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// LLVM 21 adds the address width for address space 8.
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// See https://github.com/llvm/llvm-project/pull/139419
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target_data_layout = target_data_layout.replace("p8:128:128:128:48", "p8:128:128")
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}
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}
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// Ensure the data-layout values hardcoded remain the defaults.

compiler/rustc_target/src/spec/targets/amdgcn_amd_amdhsa.rs

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@@ -3,7 +3,7 @@ use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, Target, TargetMetadata,
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pub(crate) fn target() -> Target {
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Target {
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arch: "amdgpu".into(),
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data_layout: "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9".into(),
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data_layout: "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128:128:48-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9".into(),
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llvm_target: "amdgcn-amd-amdhsa".into(),
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metadata: TargetMetadata {
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description: Some("AMD GPU".into()),

src/llvm-project

tests/codegen/enum/enum-match.rs

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@@ -98,7 +98,7 @@ pub enum Enum2 {
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E,
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}
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// CHECK-LABEL: define{{( dso_local)?}} noundef{{( range\(i8 [0-9]+, [0-9]+\))?}} i8 @match2(i8{{.+}}%0)
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// CHECK-LABEL: define{{( dso_local)?}} noundef{{( range\(i8 [0-9]+, -?[0-9]+\))?}} i8 @match2(i8{{.+}}%0)
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// CHECK-NEXT: start:
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// CHECK-NEXT: %[[REL_VAR:.+]] = add i8 %0, 2
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// CHECK-NEXT: %[[REL_VAR_WIDE:.+]] = zext i8 %[[REL_VAR]] to i64

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