Skip to content

Commit 56835d7

Browse files
committed
Auto merge of #143888 - matthiaskrgr:rollup-fv9x7kf, r=matthiaskrgr
Rollup of 11 pull requests Successful merges: - #143301 (`tests/ui`: A New Order [26/N]) - #143519 (Check assoc consts and tys later like assoc fns) - #143554 (slice: Mark `rotate_left`, `rotate_right` unstably const) - #143634 (interpret/allocation: expose init + write_wildcards on a range) - #143685 (Resolve: merge `source_bindings` and `target_bindings` into `bindings`) - #143734 (Refactor resolve resolution bindings) - #143774 (constify `From` and `Into`) - #143785 (Add --compile-time-deps argument for x check) - #143786 (Fix fallback for CI_JOB_NAME) - #143825 (clippy: fix test filtering when TESTNAME is empty) - #143826 (Fix command trace) r? `@ghost` `@rustbot` modify labels: rollup
2 parents 7e310f4 + 3ff549f commit 56835d7

File tree

102 files changed

+1032
-581
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

102 files changed

+1032
-581
lines changed

compiler/rustc/Cargo.toml

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -27,6 +27,7 @@ features = ['unprefixed_malloc_on_supported_platforms']
2727

2828
[features]
2929
# tidy-alphabetical-start
30+
check_only = ['rustc_driver_impl/check_only']
3031
jemalloc = ['dep:tikv-jemalloc-sys']
3132
llvm = ['rustc_driver_impl/llvm']
3233
max_level_info = ['rustc_driver_impl/max_level_info']

compiler/rustc_codegen_llvm/Cargo.toml

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -43,3 +43,6 @@ serde_json = "1"
4343
smallvec = { version = "1.8.1", features = ["union", "may_dangle"] }
4444
tracing = "0.1"
4545
# tidy-alphabetical-end
46+
47+
[features]
48+
check_only = ["rustc_llvm/check_only"]

compiler/rustc_const_eval/src/interpret/memory.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1498,7 +1498,7 @@ impl<'tcx, M: Machine<'tcx>> InterpCx<'tcx, M> {
14981498
dest_alloc
14991499
.write_uninit(&tcx, dest_range)
15001500
.map_err(|e| e.to_interp_error(dest_alloc_id))?;
1501-
// We can forget about the provenance, this is all not initialized anyway.
1501+
// `write_uninit` also resets the provenance, so we are done.
15021502
return interp_ok(());
15031503
}
15041504

compiler/rustc_driver_impl/Cargo.toml

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -72,6 +72,7 @@ ctrlc = "3.4.4"
7272

7373
[features]
7474
# tidy-alphabetical-start
75+
check_only = ['rustc_interface/check_only']
7576
llvm = ['rustc_interface/llvm']
7677
max_level_info = ['rustc_log/max_level_info']
7778
rustc_randomized_layouts = [

compiler/rustc_interface/Cargo.toml

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -56,5 +56,6 @@ rustc_abi = { path = "../rustc_abi" }
5656

5757
[features]
5858
# tidy-alphabetical-start
59+
check_only = ['rustc_codegen_llvm?/check_only']
5960
llvm = ['dep:rustc_codegen_llvm']
6061
# tidy-alphabetical-end

compiler/rustc_llvm/Cargo.toml

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -14,3 +14,7 @@ libc = "0.2.73"
1414
# pinned `cc` in `rustc_codegen_ssa` if you update `cc` here.
1515
cc = "=1.2.16"
1616
# tidy-alphabetical-end
17+
18+
[features]
19+
# Used by ./x.py check --compile-time-deps to skip building C++ code
20+
check_only = []

compiler/rustc_llvm/build.rs

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -106,6 +106,10 @@ fn output(cmd: &mut Command) -> String {
106106
}
107107

108108
fn main() {
109+
if cfg!(feature = "check_only") {
110+
return;
111+
}
112+
109113
for component in REQUIRED_COMPONENTS.iter().chain(OPTIONAL_COMPONENTS.iter()) {
110114
println!("cargo:rustc-check-cfg=cfg(llvm_component,values(\"{component}\"))");
111115
}

compiler/rustc_middle/src/mir/interpret/allocation.rs

Lines changed: 15 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -101,6 +101,8 @@ pub struct Allocation<Prov: Provenance = CtfeProvenance, Extra = (), Bytes = Box
101101
/// at the given offset.
102102
provenance: ProvenanceMap<Prov>,
103103
/// Denotes which part of this allocation is initialized.
104+
///
105+
/// Invariant: the uninitialized parts have no provenance.
104106
init_mask: InitMask,
105107
/// The alignment of the allocation to detect unaligned reads.
106108
/// (`Align` guarantees that this is a power of two.)
@@ -796,24 +798,19 @@ impl<Prov: Provenance, Extra, Bytes: AllocBytes> Allocation<Prov, Extra, Bytes>
796798
Ok(())
797799
}
798800

799-
/// Initialize all previously uninitialized bytes in the entire allocation, and set
800-
/// provenance of everything to `Wildcard`. Before calling this, make sure all
801-
/// provenance in this allocation is exposed!
802-
pub fn prepare_for_native_access(&mut self) {
803-
let full_range = AllocRange { start: Size::ZERO, size: Size::from_bytes(self.len()) };
804-
// Overwrite uninitialized bytes with 0, to ensure we don't leak whatever their value happens to be.
805-
for chunk in self.init_mask.range_as_init_chunks(full_range) {
806-
if !chunk.is_init() {
807-
let uninit_bytes = &mut self.bytes
808-
[chunk.range().start.bytes_usize()..chunk.range().end.bytes_usize()];
809-
uninit_bytes.fill(0);
810-
}
811-
}
812-
// Mark everything as initialized now.
813-
self.mark_init(full_range, true);
814-
815-
// Set provenance of all bytes to wildcard.
816-
self.provenance.write_wildcards(self.len());
801+
/// Mark all bytes in the given range as initialised and reset the provenance
802+
/// to wildcards. This entirely breaks the normal mechanisms for tracking
803+
/// initialisation and is only provided for Miri operating in native-lib
804+
/// mode. UB will be missed if the underlying bytes were not actually written to.
805+
///
806+
/// If `range` is `None`, defaults to performing this on the whole allocation.
807+
pub fn process_native_write(&mut self, cx: &impl HasDataLayout, range: Option<AllocRange>) {
808+
let range = range.unwrap_or_else(|| AllocRange {
809+
start: Size::ZERO,
810+
size: Size::from_bytes(self.len()),
811+
});
812+
self.mark_init(range, true);
813+
self.provenance.write_wildcards(cx, range);
817814
}
818815

819816
/// Remove all provenance in the given memory range.

compiler/rustc_middle/src/mir/interpret/allocation/provenance_map.rs

Lines changed: 22 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -212,21 +212,37 @@ impl<Prov: Provenance> ProvenanceMap<Prov> {
212212
Ok(())
213213
}
214214

215-
/// Overwrites all provenance in the allocation with wildcard provenance.
215+
/// Overwrites all provenance in the given range with wildcard provenance.
216+
/// Pointers partially overwritten will have their provenances preserved
217+
/// bytewise on their remaining bytes.
216218
///
217219
/// Provided for usage in Miri and panics otherwise.
218-
pub fn write_wildcards(&mut self, alloc_size: usize) {
220+
pub fn write_wildcards(&mut self, cx: &impl HasDataLayout, range: AllocRange) {
219221
assert!(
220222
Prov::OFFSET_IS_ADDR,
221223
"writing wildcard provenance is not supported when `OFFSET_IS_ADDR` is false"
222224
);
223225
let wildcard = Prov::WILDCARD.unwrap();
224226

225-
// Remove all pointer provenances, then write wildcards into the whole byte range.
226-
self.ptrs.clear();
227-
let last = Size::from_bytes(alloc_size);
228227
let bytes = self.bytes.get_or_insert_with(Box::default);
229-
for offset in Size::ZERO..last {
228+
229+
// Remove pointer provenances that overlap with the range, then readd the edge ones bytewise.
230+
let ptr_range = Self::adjusted_range_ptrs(range, cx);
231+
let ptrs = self.ptrs.range(ptr_range.clone());
232+
if let Some((offset, prov)) = ptrs.first() {
233+
for byte_ofs in *offset..range.start {
234+
bytes.insert(byte_ofs, *prov);
235+
}
236+
}
237+
if let Some((offset, prov)) = ptrs.last() {
238+
for byte_ofs in range.end()..*offset + cx.data_layout().pointer_size() {
239+
bytes.insert(byte_ofs, *prov);
240+
}
241+
}
242+
self.ptrs.remove_range(ptr_range);
243+
244+
// Overwrite bytewise provenance.
245+
for offset in range.start..range.end() {
230246
bytes.insert(offset, wildcard);
231247
}
232248
}

compiler/rustc_passes/src/dead.rs

Lines changed: 46 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@ use rustc_hir::{self as hir, ImplItem, ImplItemKind, Node, PatKind, QPath, TyKin
1818
use rustc_middle::middle::codegen_fn_attrs::CodegenFnAttrFlags;
1919
use rustc_middle::middle::privacy::Level;
2020
use rustc_middle::query::Providers;
21-
use rustc_middle::ty::{self, TyCtxt};
21+
use rustc_middle::ty::{self, AssocTag, TyCtxt};
2222
use rustc_middle::{bug, span_bug};
2323
use rustc_session::lint::builtin::DEAD_CODE;
2424
use rustc_session::lint::{self, LintExpectationId};
@@ -115,7 +115,10 @@ impl<'tcx> MarkSymbolVisitor<'tcx> {
115115

116116
fn handle_res(&mut self, res: Res) {
117117
match res {
118-
Res::Def(DefKind::Const | DefKind::AssocConst | DefKind::TyAlias, def_id) => {
118+
Res::Def(
119+
DefKind::Const | DefKind::AssocConst | DefKind::AssocTy | DefKind::TyAlias,
120+
def_id,
121+
) => {
119122
self.check_def_id(def_id);
120123
}
121124
_ if self.in_pat => {}
@@ -482,7 +485,7 @@ impl<'tcx> MarkSymbolVisitor<'tcx> {
482485
) -> bool {
483486
let trait_def_id = match self.tcx.def_kind(local_def_id) {
484487
// assoc impl items of traits are live if the corresponding trait items are live
485-
DefKind::AssocFn => self
488+
DefKind::AssocConst | DefKind::AssocTy | DefKind::AssocFn => self
486489
.tcx
487490
.associated_item(local_def_id)
488491
.trait_item_def_id
@@ -647,6 +650,31 @@ impl<'tcx> Visitor<'tcx> for MarkSymbolVisitor<'tcx> {
647650

648651
self.in_pat = in_pat;
649652
}
653+
654+
fn visit_trait_ref(&mut self, t: &'tcx hir::TraitRef<'tcx>) {
655+
if let Some(trait_def_id) = t.path.res.opt_def_id()
656+
&& let Some(segment) = t.path.segments.last()
657+
&& let Some(args) = segment.args
658+
{
659+
for constraint in args.constraints {
660+
if let Some(local_def_id) = self
661+
.tcx
662+
.associated_items(trait_def_id)
663+
.find_by_ident_and_kind(
664+
self.tcx,
665+
constraint.ident,
666+
AssocTag::Const,
667+
trait_def_id,
668+
)
669+
.and_then(|item| item.def_id.as_local())
670+
{
671+
self.worklist.push((local_def_id, ComesFromAllowExpect::No));
672+
}
673+
}
674+
}
675+
676+
intravisit::walk_trait_ref(self, t);
677+
}
650678
}
651679

652680
fn has_allow_dead_code_or_lang_attr(
@@ -744,18 +772,12 @@ fn check_item<'tcx>(
744772
{
745773
worklist.push((local_def_id, comes_from_allow));
746774
} else if of_trait {
747-
// FIXME: This condition can be removed
748-
// if we support dead check for assoc consts and tys.
749-
if !matches!(tcx.def_kind(local_def_id), DefKind::AssocFn) {
750-
worklist.push((local_def_id, ComesFromAllowExpect::No));
751-
} else {
752-
// We only care about associated items of traits,
753-
// because they cannot be visited directly,
754-
// so we later mark them as live if their corresponding traits
755-
// or trait items and self types are both live,
756-
// but inherent associated items can be visited and marked directly.
757-
unsolved_items.push((id, local_def_id));
758-
}
775+
// We only care about associated items of traits,
776+
// because they cannot be visited directly,
777+
// so we later mark them as live if their corresponding traits
778+
// or trait items and self types are both live,
779+
// but inherent associated items can be visited and marked directly.
780+
unsolved_items.push((id, local_def_id));
759781
}
760782
}
761783
}
@@ -791,15 +813,14 @@ fn check_trait_item(
791813
worklist: &mut Vec<(LocalDefId, ComesFromAllowExpect)>,
792814
id: hir::TraitItemId,
793815
) {
794-
use hir::TraitItemKind::{Const, Fn};
795-
if matches!(tcx.def_kind(id.owner_id), DefKind::AssocConst | DefKind::AssocFn) {
796-
let trait_item = tcx.hir_trait_item(id);
797-
if matches!(trait_item.kind, Const(_, Some(_)) | Fn(..))
798-
&& let Some(comes_from_allow) =
799-
has_allow_dead_code_or_lang_attr(tcx, trait_item.owner_id.def_id)
800-
{
801-
worklist.push((trait_item.owner_id.def_id, comes_from_allow));
802-
}
816+
use hir::TraitItemKind::{Const, Fn, Type};
817+
818+
let trait_item = tcx.hir_trait_item(id);
819+
if matches!(trait_item.kind, Const(_, Some(_)) | Type(_, Some(_)) | Fn(..))
820+
&& let Some(comes_from_allow) =
821+
has_allow_dead_code_or_lang_attr(tcx, trait_item.owner_id.def_id)
822+
{
823+
worklist.push((trait_item.owner_id.def_id, comes_from_allow));
803824
}
804825
}
805826

@@ -1163,6 +1184,7 @@ impl<'tcx> DeadVisitor<'tcx> {
11631184
}
11641185
match self.tcx.def_kind(def_id) {
11651186
DefKind::AssocConst
1187+
| DefKind::AssocTy
11661188
| DefKind::AssocFn
11671189
| DefKind::Fn
11681190
| DefKind::Static { .. }

0 commit comments

Comments
 (0)