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Ironside v22.0.0+8 tmpfixes #2959
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This was referenced Jun 16, 2025
Conflicts resolved in this commit, will be fixed once this is rebased --- Add support for generating UICR and associated artifacts in a format compatible with IronSide SE, to be used for nRF SoCs in the Haltium family. The main feature added with this is the ability to configure certain global domain peripherals that are managed by the secure domain through setting UICR.PERIPHCONF. This register points at a blob of (register address, register value) pairs which are loaded into the peripherals by IronSide SE ahead of the application boot. The added helper macros in uicr.h can be used to add register configurations to the PERIPHCONF. Entries added through these macros are then extracted by a script, post-processed and placed in a blob located at specific part of MRAM. A default PERIPHCONF configuration has been added for the nrf54h20 soc to support the standard BLE use case (matching the configuration in the soc devicetree). Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
…if present Upstream PR #: 91005 Program the new UICR and PERIPHCONF artifacts if they are generated. These are required for the application to operate properly if they are in use. Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
…rf54l Fix building/running for nrf54h and nrf54l. Signed-off-by: Piotr Kosycarz <piotr.kosycarz@nordicsemi.no> (cherry picked from commit 39ae9c3)
Upstream PR #: 91413 s/IRONside/IronSide/g Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no> (cherry picked from commit d6ad386)
…variants Upstream PR #: 91413 This replaces the legacy SDFW compatible board configuration with the IronSide SE compatible one, thus removing support for running samples and tests on nRF54H20 devices with the old firmware. All applications are expected to work on `nrf54h20dk/nrf54h20/cpuapp` out of the box. For other board targets, all applications are expected to boot, but may require additional peripheral configuration in UICR. Build system support for the new UICR format is to be added separately. Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no> (cherry picked from commit 7c7ad80)
Upstream PR #: 91413 CONFIG_USE_DT_CODE_PARTITION had to be disabled to add MCUboot support. As a result, CONFIG_FLASH_LOAD_SIZE was left at zero, which means that the linker would claim all available MRAM for the app core. For now, we can't allow that, because the default nRF54H20 DK memory map divides MRAM between multiple cores in order to support various samples. Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no> (cherry picked from commit d4ea476)
…F54H Upstream PR #: 91413 nrf-regtool will not be used as part of IronSide SE compatible builds. It will remain in use for the nRF92 series, until that too receives a port of IronSide SE. Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no> (cherry picked from commit 2baf83a)
Enable the `empty_app_core` image when building for `cpurad`. Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
For testing now; will be added upstream. Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
Disable inclusion of the empty app core image when building for cpurad. This may be better solved in a different way. Signed-off-by: Jonathan Nilsen <jonathan.nilsen@nordicsemi.no>
IronSide SE reserves all memory up to 0x0e030000, update memory map accordingly. Signed-off-by: Håkon Amundsen <haakon.amundsen@nordicsemi.no>
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