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[nrf fromlist] samples: subsys: ipc: ipc_service: icmsg: Enable sample on more targets
Extend IPC Service sample: - with configuration that runs on nRF54H20DK and exchanges data between cpuapp and cpuppr using ICMsg backend, - with configuration that runs on nRF54LM20DK and exchanges data between cpuapp and cpuflpr using ICMsg and ICBMsg backends. Upstream PR #: 92287 Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
1 parent 926fafb commit 4268d8e

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+329
-35
lines changed

‎samples/subsys/ipc/ipc_service/icmsg/CMakeLists.txt

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@@ -11,7 +11,9 @@ find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
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if(NOT CONFIG_BOARD_NRF5340DK_NRF5340_CPUAPP AND
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NOT CONFIG_BOARD_NRF5340BSIM_NRF5340_CPUAPP AND
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NOT CONFIG_BOARD_STM32H747I_DISCO AND
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NOT CONFIG_BOARD_NRF54L15DK_NRF54L15_CPUAPP)
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NOT CONFIG_BOARD_NRF54H20DK_NRF54H20_CPUAPP AND
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NOT CONFIG_BOARD_NRF54L15DK_NRF54L15_CPUAPP AND
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NOT CONFIG_BOARD_NRF54LM20DK_NRF54LM20A_CPUAPP)
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message(FATAL_ERROR "${BOARD} is not supported for this sample")
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endif()
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‎samples/subsys/ipc/ipc_service/icmsg/Kconfig.sysbuild

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@@ -5,8 +5,10 @@
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source "share/sysbuild/Kconfig"
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config REMOTE_BOARD
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string
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string "The board used for remote target"
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default "nrf5340dk/nrf5340/cpunet" if $(BOARD) = "nrf5340dk"
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default "nrf5340bsim/nrf5340/cpunet" if $(BOARD) = "nrf5340bsim"
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default "nrf54h20dk/nrf54h20/cpuppr" if BOARD_NRF54H20DK_NRF54H20_CPUAPP
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default "nrf54l15dk/nrf54l15/cpuflpr" if $(BOARD) = "nrf54l15dk"
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default "nrf54lm20dk/nrf54lm20a/cpuflpr" if $(BOARD) = "nrf54lm20dk"
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default "stm32h747i_disco/stm32h747xx/m4" if $(BOARD) = "stm32h747i_disco"

‎samples/subsys/ipc/ipc_service/icmsg/boards/nrf54h20dk_nrf54h20_cpuapp.overlay

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* Replace default ipc0 instance */
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/delete-node/ &ipc0;
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ipc0: &cpuapp_cpuppr_ipc {
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status = "okay";
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};
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&cpuppr_vevif {
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status = "okay";
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};
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&cpuapp_bellboard {
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status = "okay";
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};
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/ {
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chosen {
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/delete-property/ zephyr,bt-hci;
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};
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};

‎samples/subsys/ipc/ipc_service/icmsg/boards/nrf54lm20dk_nrf54lm20a_cpuapp.overlay

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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soc {
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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sram_rx: memory@20057c00 {
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reg = <0x20057c00 0x8000>;
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};
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sram_tx: memory@2005fc00 {
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reg = <0x2005fc00 0x8000>;
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};
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};
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};
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ipc {
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ipc0: ipc0 {
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compatible = "zephyr,ipc-icmsg";
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dcache-alignment = <32>;
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tx-region = <&sram_tx>;
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rx-region = <&sram_rx>;
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mboxes = <&cpuapp_vevif_rx 20>, <&cpuapp_vevif_tx 21>;
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mbox-names = "rx", "tx";
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status = "okay";
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};
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};
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};
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&cpuapp_vevif_rx {
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status = "okay";
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};
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&cpuapp_vevif_tx {
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status = "okay";
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};

‎samples/subsys/ipc/ipc_service/icmsg/boards/nrf54lm20dk_nrf54lm20a_cpuapp_icbmsg.overlay

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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soc {
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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sram_rx: memory@20057c00 {
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reg = <0x20057c00 0x8000>;
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};
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sram_tx: memory@2005fc00 {
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reg = <0x2005fc00 0x8000>;
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};
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};
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};
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ipc {
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ipc0: ipc0 {
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compatible = "zephyr,ipc-icbmsg";
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dcache-alignment = <32>;
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tx-region = <&sram_tx>;
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rx-region = <&sram_rx>;
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tx-blocks = <16>;
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rx-blocks = <18>;
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mboxes = <&cpuapp_vevif_rx 20>, <&cpuapp_vevif_tx 21>;
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mbox-names = "rx", "tx";
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status = "okay";
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};
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};
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};
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&cpuapp_vevif_rx {
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status = "okay";
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};
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&cpuapp_vevif_tx {
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status = "okay";
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};

‎samples/subsys/ipc/ipc_service/icmsg/remote/boards/nrf54h20dk_nrf54h20_cpuppr.conf

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#
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# Copyright (c) 2025 Nordic Semiconductor ASA
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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################################################################################
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CONFIG_LOG=y
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CONFIG_LOG_MODE_MINIMAL=y
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CONFIG_ASSERT=n
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CONFIG_LOG_BACKEND_UART=n
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CONFIG_BOOT_BANNER=n
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CONFIG_EARLY_CONSOLE=y
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CONFIG_HEAP_MEM_POOL_SIZE=1024
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CONFIG_SIZE_OPTIMIZATIONS=y

‎samples/subsys/ipc/ipc_service/icmsg/remote/boards/nrf54h20dk_nrf54h20_cpuppr.overlay

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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* SPDX-License-Identifier: Apache-2.0
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*/
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ipc0: &cpuapp_cpuppr_ipc {
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status = "okay";
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};
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&cpuppr_vevif {
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status = "okay";
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};
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&cpuapp_bellboard {
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status = "okay";
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};
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&uart135 {
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/delete-property/ hw-flow-control;
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};

‎samples/subsys/ipc/ipc_service/icmsg/remote/boards/nrf54lm20dk_nrf54lm20a_cpuflpr.overlay

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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soc {
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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sram_tx: memory@20057c00 {
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reg = <0x20057c00 0x8000>;
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};
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sram_rx: memory@2005fc00 {
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reg = <0x2005fc00 0x8000>;
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};
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};
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};
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ipc {
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ipc0: ipc0 {
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compatible = "zephyr,ipc-icmsg";
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dcache-alignment = <32>;
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tx-region = <&sram_tx>;
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rx-region = <&sram_rx>;
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mboxes = <&cpuflpr_vevif_rx 21>, <&cpuflpr_vevif_tx 20>;
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mbox-names = "rx", "tx";
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status = "okay";
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};
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};
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};
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&cpuflpr_vevif_rx {
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status = "okay";
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};
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&cpuflpr_vevif_tx {
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status = "okay";
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};
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&uart30 {
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/delete-property/ hw-flow-control;
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};

‎samples/subsys/ipc/ipc_service/icmsg/remote/boards/nrf54lm20dk_nrf54lm20a_cpuflpr_icbmsg.overlay

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/ {
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soc {
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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sram_tx: memory@20057c00 {
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reg = <0x20057c00 0x8000>;
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};
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sram_rx: memory@2005fc00 {
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reg = <0x2005fc00 0x8000>;
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};
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};
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};
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ipc {
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ipc0: ipc0 {
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compatible = "zephyr,ipc-icbmsg";
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dcache-alignment = <32>;
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tx-region = <&sram_tx>;
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rx-region = <&sram_rx>;
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tx-blocks = <18>;
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rx-blocks = <16>;
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mboxes = <&cpuflpr_vevif_rx 21>, <&cpuflpr_vevif_tx 20>;
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mbox-names = "rx", "tx";
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status = "okay";
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};
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};
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};
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&cpuflpr_vevif_rx {
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status = "okay";
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};
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&cpuflpr_vevif_tx {
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status = "okay";
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};
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&uart30 {
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/delete-property/ hw-flow-control;
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};

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