From 741c50bb12e655b99282b5aacd31008d2cbb7af1 Mon Sep 17 00:00:00 2001
From: Zhiyang Lu <103179313+alfaloo@users.noreply.github.com>
Date: Wed, 18 Jun 2025 08:06:35 +0800
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 content/english/hpc/external-memory/virtual.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/content/english/hpc/external-memory/virtual.md b/content/english/hpc/external-memory/virtual.md
index 92bb454c..a1587907 100644
--- a/content/english/hpc/external-memory/virtual.md
+++ b/content/english/hpc/external-memory/virtual.md
@@ -17,7 +17,7 @@ Virtual memory gives each process the impression that it fully controls a contig
 
 ![](../img/virtual-memory.jpg)
 
-To achieve this, the memory address space is divided into *pages* (typically 4KB in size), which are the base units of memory that the programs can request from the operating system. The memory system maintains a special hardware data structure called the *page table*, which contains the mappings of virtual page addresses to the physical ones. When a process accesses data using its virtual memory address, the memory system calculates its page number (by right-shifting it by $12$ if $4096=2^{12}$ is the page size), looks up in the page table that its physical address is, and forwards the read or write request to where that data is actually stored.
+To achieve this, the memory address space is divided into *pages* (typically 4KB in size), which are the base units of memory that the programs can request from the operating system. The memory system maintains a special hardware data structure called the *page table*, which contains the mappings of virtual page addresses to the physical ones. When a process accesses data using its virtual memory address, the memory system calculates its page number (by right-shifting it by $12$ if $4096=2^{12}$ is the page size), looks up in the page table what its physical address is, and forwards the read or write request to where that data is actually stored.
 
 Since the address translation needs to be done for each memory request, and the number of memory pages itself may be large (e.g., 16G RAM / 4K page size = 4M pages), address translation poses a difficult problem in itself. One way to speed it up is to use a special cache for the page table itself called *translation lookaside buffer* (TLB), and the other is to [increase the page size](/hpc/cpu-cache/paging) so that the total number of memory pages is made smaller at the cost of reduced granularity.